<instructions>Your goal is to analyze the following comment and estimate how highly it will be upvoted by the Hacker News community.</instructions><comment><author>terafo</author><text>Mill CPU never existed in silicon, so there are questions to that. But IIRC Ivan said that they didn&amp;#x27;t do anything that compilers didn&amp;#x27;t do already for DPSs. He specifically mentioned that they don&amp;#x27;t want to be like Itanic.</text><parent_chain><item><author>nickcw</author><text>Chip designers have noticed this similarity in the past have and attempted to push some of the work done by the CPU back into the compiler. Itanium and the Mill CPU both work(ed) like this I believe.</text></item></parent_chain></comment><story><title>A CPU is a compiler</title><url>https://outerproduct.net/boring/2023-03-22_cpu-compiler-gc-ohmy.html</url></story>
<instructions>Your goal is to analyze the following comment and estimate how highly it will be upvoted by the Hacker News community.</instructions><comment><author>MayeulC</author><text>You can argue that it&amp;#x27;s the RISC approach, to some extent.</text><parent_chain><item><author>nickcw</author><text>Chip designers have noticed this similarity in the past have and attempted to push some of the work done by the CPU back into the compiler. Itanium and the Mill CPU both work(ed) like this I believe.</text></item></parent_chain></comment><story><title>A CPU is a compiler</title><url>https://outerproduct.net/boring/2023-03-22_cpu-compiler-gc-ohmy.html</url></story>