<instructions>Your goal is to analyze the following comment and estimate how highly it will be upvoted by the Hacker News community.</instructions><comment><author>exDM69</author><text>The issue with runtime instruction set detection and dynamic dispatch is that it needs to be at a rather coarse level to be beneficial.&lt;p&gt;Take a simple 4-wide dot product for example, on x86_64 you&amp;#x27;d have 3-4 different implementations (SSE2, SSE3 w&amp;#x2F; hadd, SSE4.2 w&amp;#x2F; dpps). But the function itself is just a few clock cycles, and calling it via function pointer will eliminate any gains and you might as well compute it with a scalar loop at that point.&lt;p&gt;This is further compounded by inhibiting compiler optimizations. You can&amp;#x27;t use the dot product function in higher level code expecting it to be inlined and further optimized (which is really the key to performance) if it&amp;#x27;s behind a dynamic dispatch.&lt;p&gt;A sufficiently smart compiler could maybe propagate the dynamic dispatch above, so that all the dot products get inlined but all code using dot product would get emitted multiple times with different dot product implementations, with the dynamic dispatch only at the top level. This has a slight risk of combinatorial explosion, but there really aren&amp;#x27;t that many combinations of supported ISAs in real hardware out there.&lt;p&gt;Another option you can use without any special compiler support is to take all your performance sensitive parts and pack them into a shared object&amp;#x2F;dll, compile multiple versions with different compiler options and choose the correct dll at runtime. Or even build the entire executable a few times and have some kind of launcher pick the correct one.</text><parent_chain><item><author>kookamamie</author><text>Nice. It would be even nicer, if Zig would support hot-dispatch for SIMD, i.e. the idea that the compiler can emit multiple versions of the same function&amp;#x2F;code for a number of vector widths simultaneously and the runtime selects the best (widest) option available for the hardware running the code - this is something ISPC does and is incredibly useful for targeting a range of architectures.</text></item></parent_chain></comment><story><title>SIMD with Zig</title><url>https://www.openmymind.net/SIMD-With-Zig/</url></story>
<instructions>Your goal is to analyze the following comment and estimate how highly it will be upvoted by the Hacker News community.</instructions><comment><author>AndyKelley</author><text>This is called [function multi-versioning](&lt;a href=&quot;https:&amp;#x2F;&amp;#x2F;github.com&amp;#x2F;ziglang&amp;#x2F;zig&amp;#x2F;issues&amp;#x2F;1018&quot;&gt;https:&amp;#x2F;&amp;#x2F;github.com&amp;#x2F;ziglang&amp;#x2F;zig&amp;#x2F;issues&amp;#x2F;1018&lt;/a&gt;).</text><parent_chain><item><author>kookamamie</author><text>Nice. It would be even nicer, if Zig would support hot-dispatch for SIMD, i.e. the idea that the compiler can emit multiple versions of the same function&amp;#x2F;code for a number of vector widths simultaneously and the runtime selects the best (widest) option available for the hardware running the code - this is something ISPC does and is incredibly useful for targeting a range of architectures.</text></item></parent_chain></comment><story><title>SIMD with Zig</title><url>https://www.openmymind.net/SIMD-With-Zig/</url></story>