<instructions>Your goal is to analyze the following comment and estimate how highly it will be upvoted by the Hacker News community.</instructions><comment><author>__david__</author><text>A quick note:&lt;p&gt;&amp;#62; INCS=-I./&lt;p&gt;This is generally a bad idea, unless you&apos;re explicitly trying to override #include &amp;#60;stdio.h&amp;#62; with a local file (and there are better ways to do that). &amp;#60;&amp;#62; are for system files, &quot;&quot; are for local files.&lt;p&gt;So off the bat, your makefile example is better than most makefiles out there. I still see things that look like some dumb IDE wrote them with explicit .d and x.c: x.o rules littered about.&lt;p&gt;Though I do note you aren&apos;t taking advantage of the built-in makefile rules (which are defined in POSIX), and you aren&apos;t taking advantage of gcc&apos;s -MMD flag, which does the dependencies during compilation instead of a separate step. That eliminates much of the file:&lt;p&gt;&lt;pre&gt;&lt;code&gt;  LDLIBS=-lglfw -lGLEW
  CFLAGS+=-std=gnu99 -g -ggdb -W -Wall -Wextra -pedantic
  CFLAGS+=-MMD
  CFLAGS+=$(INCS)
  CFLAGS+=-march=native -mno-80387 -mfpmath=sse -O3
  SRCS=$(wildcard *.c)
  OBJS=$(SRCS:.c=.o)
  EXECUTABLE=main

  .PHONY: all clean
  all: $(EXECUTABLE)

  $(EXECUTABLE): $(OBJS)
  	$(CC) $(CFLAGS) $(LDLIBS) -o $@ $^

  -include *.d

  clean:
  	rm -f $(EXECUTABLE)
  	rm -f $(OBJS) *.d
&lt;/code&gt;&lt;/pre&gt;
Furthermore, I like to name my objects explicitly instead of using * .c, which lets you order them on the command line, if you find that makes a difference. In particular, if your executable is named the same as one of your C source files then you don&apos;t even need the link line, as long as the C source file is the first dependency:&lt;p&gt;&lt;pre&gt;&lt;code&gt;  LDLIBS=-lglfw -lGLEW
  CFLAGS+=-std=gnu99 -g -ggdb -W -Wall -Wextra -pedantic
  CFLAGS+=-MMD
  CFLAGS+=$(INCS)
  CFLAGS+=-march=native -mno-80387 -mfpmath=sse -O3
  OBJS=main.o obj1.o obj2.o

  .PHONY: all clean
  all: main

  main: $(OBJS)

  -include *.d

  clean:
  	rm -f $(EXECUTABLE)
  	rm -f $(OBJS) *.d
&lt;/code&gt;&lt;/pre&gt;
I tend to like to prefix variables with the thing you are making so that different executables in the same Makefile can have (drastically) different compilation parameters:&lt;p&gt;&lt;pre&gt;&lt;code&gt;  .PHONY: all clean
  all: main

  main: LDLIBS=-lglfw -lGLEW
  main: CFLAGS+=-std=gnu99 -g -ggdb -W -Wall -Wextra -pedantic
  main: CFLAGS+=-MMD
  main: CFLAGS+=$(INCS)
  main: CFLAGS+=-march=native -mno-80387 -mfpmath=sse -O3
  main: OBJS=main.o obj1.o obj2.o

  main: $(OBJS)

  -include *.d

  clean:
  	rm -f $(EXECUTABLE)
  	rm -f $(OBJS) *.d
&lt;/code&gt;&lt;/pre&gt;
If you have an embedded project that needs both compiling and cross-compiling that trick can work wonders.</text><parent_chain><item><author>exDM69</author><text>Thank you for a good article. Even I learned some new stuff. However, there was a major omission: automatic dependency generation. Every now and then I forget how it&apos;s done and try to find a good source on the net, but they&apos;re really scarce. On the other hand, there are tons of small &quot;your first makefile&quot; tutorials (this article is better than the average).&lt;p&gt;Here&apos;s my Makefile boilerplate. It build single executable from all .c files in this directory and scans for include file dependencies to properly cause recompilation when a header file is touched.&lt;p&gt;&lt;pre&gt;&lt;code&gt;  INCS=-I./
  LIBS=-lglfw -lGLEW
  CFLAGS=-std=gnu99 -g -ggdb -W -Wall -Wextra -pedantic
  CFLAGS+=$(INCS)
  CFLAGS+=-march=native -mno-80387 -mfpmath=sse -O3
  SRCS=$(wildcard *.c)
  OBJS=$(SRCS:.c=.o)
  DEPS=$(SRCS:.c=.d)
  EXECUTABLE=main

  .PHONY: all clean
  all: $(EXECUTABLE)

  $(EXECUTABLE): $(OBJS)
  	$(CC) $(CFLAGS) $(LIBS) -o $@ $^
  %.o: %.c
  	$(CC) $(CFLAGS) -c -o $@ $&amp;#60;
  %.d: %.c
  	$(CC) $(CFLAGS) -MM -o $@ $&amp;#60;

  -include $(DEPS)

  clean:
  	rm -f $(EXECUTABLE)
  	rm -f $(OBJS) $(DEPS)
&lt;/code&gt;&lt;/pre&gt;
If anyone has a better one (preferably with out-of-source build to put .d and .o files to a better place), please share it.</text></item></parent_chain></comment><story><title>GNU Make in Detail for Beginners</title><url>http://www.linuxforu.com/2012/06/gnu-make-in-detail-for-beginners/</url></story>
<instructions>Your goal is to analyze the following comment and estimate how highly it will be upvoted by the Hacker News community.</instructions><comment><author>thristian</author><text>I don&apos;t know about out-of-source building, but I know Make has a bunch of built-in rules that you can use to cut down your boilerplate.&lt;p&gt;For example, I&apos;m pretty sure that a filename depending on objects will automatically be created by linking those objects (although you&apos;d have to specify your libraries in LDFLAGS rather than LIBS. Also, your rule for building .o files from .c files would be automatic if you put your include-directives in CPPFLAGS instead of INCS.</text><parent_chain><item><author>exDM69</author><text>Thank you for a good article. Even I learned some new stuff. However, there was a major omission: automatic dependency generation. Every now and then I forget how it&apos;s done and try to find a good source on the net, but they&apos;re really scarce. On the other hand, there are tons of small &quot;your first makefile&quot; tutorials (this article is better than the average).&lt;p&gt;Here&apos;s my Makefile boilerplate. It build single executable from all .c files in this directory and scans for include file dependencies to properly cause recompilation when a header file is touched.&lt;p&gt;&lt;pre&gt;&lt;code&gt;  INCS=-I./
  LIBS=-lglfw -lGLEW
  CFLAGS=-std=gnu99 -g -ggdb -W -Wall -Wextra -pedantic
  CFLAGS+=$(INCS)
  CFLAGS+=-march=native -mno-80387 -mfpmath=sse -O3
  SRCS=$(wildcard *.c)
  OBJS=$(SRCS:.c=.o)
  DEPS=$(SRCS:.c=.d)
  EXECUTABLE=main

  .PHONY: all clean
  all: $(EXECUTABLE)

  $(EXECUTABLE): $(OBJS)
  	$(CC) $(CFLAGS) $(LIBS) -o $@ $^
  %.o: %.c
  	$(CC) $(CFLAGS) -c -o $@ $&amp;#60;
  %.d: %.c
  	$(CC) $(CFLAGS) -MM -o $@ $&amp;#60;

  -include $(DEPS)

  clean:
  	rm -f $(EXECUTABLE)
  	rm -f $(OBJS) $(DEPS)
&lt;/code&gt;&lt;/pre&gt;
If anyone has a better one (preferably with out-of-source build to put .d and .o files to a better place), please share it.</text></item></parent_chain></comment><story><title>GNU Make in Detail for Beginners</title><url>http://www.linuxforu.com/2012/06/gnu-make-in-detail-for-beginners/</url></story>