<instructions>Your goal is to analyze the following comment and estimate how highly it will be upvoted by the Hacker News community.</instructions><comment><author>gpderetta</author><text>32 full width vector ALUs running at 3.5 GHz is probably not realistic. I think that it is running around 2GHz at most [1]. The trick is that FMAs are normally counted as two FLOP.&lt;p&gt;[1] (* (&amp;#x2F; 512 64) 2 2 18 2 1000 1000 1000)  = 1152000000000 FLOPS
(512 unit over 64 bits double) times 2 for FMA times two units, over 18 cores at 2 GHz)&lt;p&gt;edit: the 10 core part has a base clock of 3.3GHz. The 18 core part will probably be in the 2.5 range at best (the best 18 core Broadwell I can find runs at 2.3, but it is a dual socket part). Running in full AVX512 mode will probably downclock the cpu further.</text><parent_chain><item><author>gbrown_</author><text>&amp;gt; Intel hasn’t given many details on AVX-512 yet, regarding whether there is one or two units per CPU, or if it is more granular and is per core.&lt;p&gt;I can&amp;#x27;t imagine it being more than one per core. For context Knights Landing has two per core but that&amp;#x27;s a HPC focused product.&lt;p&gt;&amp;gt; We expect it to be enabled on day one, although I have a suspicion there may be a BIOS flag that needs enabling in order to use it.&lt;p&gt;This seems odd.&lt;p&gt;&amp;gt; With the support of AVX-512, Intel is calling the Core i9-7980X ‘the first TeraFLOP CPU’. I’ve asked details as to how this figure is calculated (software, or theoretical)&lt;p&gt;So lets work backwards here the Core i9-7980XE has 18 cores but as of yet the clock speed is not specified.&lt;p&gt;A couple of assumptions:&lt;p&gt;- We&amp;#x27;re talking double precision FLOPs&lt;p&gt;- We can theoretically do 16 double precision FLOPs per cycle&lt;p&gt;FLOPs per cycle * Cycles per second (frequency) * number of cores  =~ 1TF&lt;p&gt;So we can guesstimate the clock frequency being ~3.47Ghz.&lt;p&gt;Edit: In review such a clock speed seems rather high for an 18 core part. I&amp;#x27;m not sure if consumer parts will do 32DP FLOPs?</text></item></parent_chain></comment><story><title>Intel Announces Skylake-X: Bringing 18-Core HCC Silicon to Consumers</title><url>http://www.anandtech.com/show/11464/intel-announces-skylakex-bringing-18core-hcc-silicon-to-consumers-for-1999</url></story>
<instructions>Your goal is to analyze the following comment and estimate how highly it will be upvoted by the Hacker News community.</instructions><comment><author>gambiting</author><text>&amp;gt;&amp;gt; We expect it to be enabled on day one, although I have a suspicion there may be a BIOS flag that needs enabling in order to use it.&lt;p&gt;&amp;gt;This seems odd.&lt;p&gt;When AES support was first introduced it was incredibly difficult to find a motherboard that would support it from the box, it almost universally required a BIOS update.</text><parent_chain><item><author>gbrown_</author><text>&amp;gt; Intel hasn’t given many details on AVX-512 yet, regarding whether there is one or two units per CPU, or if it is more granular and is per core.&lt;p&gt;I can&amp;#x27;t imagine it being more than one per core. For context Knights Landing has two per core but that&amp;#x27;s a HPC focused product.&lt;p&gt;&amp;gt; We expect it to be enabled on day one, although I have a suspicion there may be a BIOS flag that needs enabling in order to use it.&lt;p&gt;This seems odd.&lt;p&gt;&amp;gt; With the support of AVX-512, Intel is calling the Core i9-7980X ‘the first TeraFLOP CPU’. I’ve asked details as to how this figure is calculated (software, or theoretical)&lt;p&gt;So lets work backwards here the Core i9-7980XE has 18 cores but as of yet the clock speed is not specified.&lt;p&gt;A couple of assumptions:&lt;p&gt;- We&amp;#x27;re talking double precision FLOPs&lt;p&gt;- We can theoretically do 16 double precision FLOPs per cycle&lt;p&gt;FLOPs per cycle * Cycles per second (frequency) * number of cores  =~ 1TF&lt;p&gt;So we can guesstimate the clock frequency being ~3.47Ghz.&lt;p&gt;Edit: In review such a clock speed seems rather high for an 18 core part. I&amp;#x27;m not sure if consumer parts will do 32DP FLOPs?</text></item></parent_chain></comment><story><title>Intel Announces Skylake-X: Bringing 18-Core HCC Silicon to Consumers</title><url>http://www.anandtech.com/show/11464/intel-announces-skylakex-bringing-18core-hcc-silicon-to-consumers-for-1999</url></story>