	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function op_MUL
_op_MUL:                                ## @op_MUL
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %r14
	movq	_SIZE_W@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-36(%rbp), %r8
	movl	$1, %ebx
	xorl	%ecx, %ecx
	movl	$1, %r9d
	callq	_ea_get
	cmpl	$0, -36(%rbp)
	js	LBB0_7
## %bb.1:
	movq	_current_entry@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movq	_reg@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	shll	$2, %esi
	callq	_JIT_EMIT_GET_OP2_REGISTER
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_cc_needed
	movl	%eax, %r14d
	movl	(%rbx), %edi
	testl	$256, %r15d                     ## imm = 0x100
	jne	LBB0_2
## %bb.3:
	callq	_JIT_EMIT_MULU_W
	testl	%r14d, %r14d
	jne	LBB0_5
	jmp	LBB0_6
LBB0_2:
	callq	_JIT_EMIT_MULS_W
	testl	%r14d, %r14d
	je	LBB0_6
LBB0_5:
	movl	(%rbx), %edi
	callq	_JIT_EMIT_SETCC_LOGIC_L
LBB0_6:
	movl	(%rbx), %edi
	movl	(%r12), %esi
	shll	$2, %esi
	callq	_JIT_EMIT_SET_REGISTER_L
	movl	(%rbx), %edi
	movl	-36(%rbp), %esi
	addl	$54, %esi
	callq	_JIT_EMIT_ADD_CYCLES
	xorl	%ebx, %ebx
LBB0_7:
	movl	%ebx, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INSN_GET_REG,4,2               ## @INSN_GET_REG
	.comm	_SIZE_W,4,2                     ## @SIZE_W
	.comm	_current_entry,4,2              ## @current_entry
	.comm	_reg,4,2                        ## @reg
	.no_dead_strip	_op_MUL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function op_MUL
_op_MUL:                                ; @op_MUL
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _SIZE_W@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SIZE_W@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	w21, #1
	add	x4, sp, #12
	mov	w3, #0
	mov	w5, #1
	bl	_ea_get
	ldr	w8, [sp, #12]
	tbnz	w8, #31, LBB0_6
; %bb.1:
Lloh3:
	adrp	x21, _current_entry@GOTPAGE
Lloh4:
	ldr	x21, [x21, _current_entry@GOTPAGEOFF]
	ldr	w0, [x21]
Lloh5:
	adrp	x22, _reg@GOTPAGE
Lloh6:
	ldr	x22, [x22, _reg@GOTPAGEOFF]
	ldr	w8, [x22]
	lsl	w1, w8, #2
	bl	_JIT_EMIT_GET_OP2_REGISTER
	mov	x0, x20
	mov	x1, x19
	bl	_cc_needed
	mov	x20, x0
	ldr	w0, [x21]
	tbnz	w19, #8, LBB0_3
; %bb.2:
	bl	_JIT_EMIT_MULU_W
	cbnz	w20, LBB0_4
	b	LBB0_5
LBB0_3:
	bl	_JIT_EMIT_MULS_W
	cbz	w20, LBB0_5
LBB0_4:
	ldr	w0, [x21]
	bl	_JIT_EMIT_SETCC_LOGIC_L
LBB0_5:
	ldr	w0, [x21]
	ldr	w8, [x22]
	lsl	w1, w8, #2
	bl	_JIT_EMIT_SET_REGISTER_L
	ldr	w0, [x21]
	ldr	w8, [sp, #12]
	add	w1, w8, #54
	bl	_JIT_EMIT_ADD_CYCLES
	mov	w21, #0
LBB0_6:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_INSN_GET_REG,4,2               ; @INSN_GET_REG
	.comm	_SIZE_W,4,2                     ; @SIZE_W
	.comm	_current_entry,4,2              ; @current_entry
	.comm	_reg,4,2                        ; @reg
	.no_dead_strip	_op_MUL
.subsections_via_symbols
