	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vp9_vt_lpf_t4_and_t8_16w
_vp9_vt_lpf_t4_and_t8_16w:              ## @vp9_vt_lpf_t4_and_t8_16w
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$168, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, %r14d
	movl	%r8d, %r12d
	movl	%ecx, %r13d
	movq	%rdx, -48(%rbp)                 ## 8-byte Spill
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	movl	16(%rbp), %r15d
	addq	$-256, %rdi
	movl	$16, %esi
	callq	_LD_UB8
	movl	%r15d, %edi
	callq	___msa_fill_b
	movq	%rax, %r15
	movl	%r12d, %edi
	callq	___msa_fill_b
	movq	%rax, %rbx
	movl	%r14d, %edi
	callq	___msa_fill_b
	movq	%r15, 32(%rsp)
	movq	%rbx, 24(%rsp)
	movq	%rax, 16(%rsp)
	callq	_LPF_MASK_HEV
	callq	_VP9_FLAT4
	callq	_VP9_LPF_FILTER4_4W
	callq	___msa_test_bz_v
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	callq	_ILVR_B2_SH
	callq	_ILVRL_H2_SH
	callq	_ILVL_B2_SH
	callq	_ILVRL_H2_SH
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	leaq	-8(%rbx), %rax
	movl	%r13d, 40(%rsp)
	movq	%rax, 32(%rsp)
	movl	$3, 24(%rsp)
	movl	$2, 16(%rsp)
	movl	$1, 8(%rsp)
	movl	$0, (%rsp)
	movl	$1, %r14d
	xorl	%edx, %edx
	movl	$1, %ecx
	movl	$2, %r8d
	movl	$3, %r9d
	callq	_ST_W8
	leal	(,%r13,8), %eax
	cltq
	leaq	(%rbx,%rax,4), %rax
	addq	$-8, %rax
	movl	%r13d, 40(%rsp)
	movq	%rax, 32(%rsp)
	movl	$3, 24(%rsp)
	movl	$2, 16(%rsp)
	movl	$1, 8(%rsp)
	movl	$0, (%rsp)
	xorl	%edx, %edx
	movl	$1, %ecx
	movl	$2, %r8d
	movl	$3, %r9d
	callq	_ST_W8
	jmp	LBB0_3
LBB0_2:
	movl	$0, 64(%rsp)
	movl	$0, 48(%rsp)
	movl	$0, 32(%rsp)
	movl	$0, 16(%rsp)
	movl	$0, (%rsp)
	xorl	%edi, %edi
	xorl	%edx, %edx
	xorl	%r8d, %r8d
	callq	_ILVR_B8_UH
	callq	_VP9_FILTER8
	movl	$0, (%rsp)
	xorl	%edi, %edi
	xorl	%edx, %edx
	xorl	%r8d, %r8d
	callq	_ILVL_B4_UH
	movl	$0, (%rsp)
	xorl	%edi, %edi
	xorl	%edx, %edx
	xorl	%r8d, %r8d
	callq	_ILVL_B4_UH
	callq	_VP9_FILTER8
	callq	_PCKEV_B4_SH
	callq	_PCKEV_B2_SH
	callq	___msa_bmnz_v
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	callq	___msa_bmnz_v
	movq	%rax, %r12
	callq	___msa_bmnz_v
	movq	%rax, %r13
	callq	___msa_bmnz_v
	movq	%rax, %rbx
	callq	___msa_bmnz_v
	movq	%rax, %r14
	callq	___msa_bmnz_v
	movq	%rax, %r15
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	%r12, %rsi
	movq	%r13, %rdx
	movq	%rbx, %rcx
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %r8
	movl	$16, %r9d
	callq	_ST_UB4
	leaq	256(%rbx), %rdx
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	$16, %ecx
	callq	_ST_UB2
	addq	$384, %rbx                      ## imm = 0x180
	movq	%rbx, %rsi
	xorl	%r14d, %r14d
	callq	_ST_UB
LBB0_3:
	movl	%r14d, %eax
	addq	$168, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_vp9_vt_lpf_t4_and_t8_16w
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vp9_vt_lpf_t4_and_t8_16w
_vp9_vt_lpf_t4_and_t8_16w:              ; @vp9_vt_lpf_t4_and_t8_16w
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #176
	.cfi_def_cfa_offset 176
	stp	x26, x25, [sp, #96]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #112]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #128]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #144]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #160]            ; 16-byte Folded Spill
	add	x29, sp, #160
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x6
	mov	x23, x5
	mov	x24, x4
	mov	x20, x3
	mov	x21, x2
	mov	x19, x1
	sub	x0, x0, #256
	mov	w1, #16
	bl	_LD_UB8
	mov	x0, x22
	bl	___msa_fill_b
	mov	x22, x0
	mov	x0, x24
	bl	___msa_fill_b
	mov	x24, x0
	mov	x0, x23
	bl	___msa_fill_b
	stp	x24, x22, [sp, #8]
	str	x0, [sp]
	bl	_LPF_MASK_HEV
	bl	_VP9_FLAT4
	bl	_VP9_LPF_FILTER4_4W
	bl	___msa_test_bz_v
	cbz	x0, LBB0_2
; %bb.1:
	bl	_ILVR_B2_SH
	bl	_ILVRL_H2_SH
	bl	_ILVL_B2_SH
	bl	_ILVRL_H2_SH
	sub	x21, x21, #8
	str	w20, [sp, #16]
	mov	x22, #2
	movk	x22, #3, lsl #32
	stp	x22, x21, [sp]
	mov	w19, #1
	mov	w2, #0
	mov	w3, #1
	mov	w4, #2
	mov	w5, #3
	mov	w6, #0
	mov	w7, #1
	bl	_ST_W8
	lsl	w8, w20, #3
	add	x8, x21, w8, sxtw #2
	str	w20, [sp, #16]
	stp	x22, x8, [sp]
	mov	w2, #0
	mov	w3, #1
	mov	w4, #2
	mov	w5, #3
	mov	w6, #0
	mov	w7, #1
	bl	_ST_W8
	b	LBB0_3
LBB0_2:
	str	xzr, [sp, #48]
	str	xzr, [sp, #32]
	str	xzr, [sp, #16]
	str	xzr, [sp]
	mov	x2, #0
	mov	x4, #0
	mov	x6, #0
	bl	_ILVR_B8_UH
	bl	_VP9_FILTER8
	mov	x0, #0
	mov	x2, #0
	mov	x4, #0
	mov	x6, #0
	bl	_ILVL_B4_UH
	mov	x0, #0
	mov	x2, #0
	mov	x4, #0
	mov	x6, #0
	bl	_ILVL_B4_UH
	bl	_VP9_FILTER8
	bl	_PCKEV_B4_SH
	bl	_PCKEV_B2_SH
	bl	___msa_bmnz_v
	mov	x20, x0
	bl	___msa_bmnz_v
	mov	x21, x0
	bl	___msa_bmnz_v
	mov	x22, x0
	bl	___msa_bmnz_v
	mov	x23, x0
	bl	___msa_bmnz_v
	mov	x24, x0
	bl	___msa_bmnz_v
	mov	x25, x0
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	mov	x3, x23
	mov	x4, x19
	mov	w5, #16
	bl	_ST_UB4
	add	x2, x19, #256
	mov	x0, x24
	mov	x1, x25
	mov	w3, #16
	bl	_ST_UB2
	add	x1, x19, #384
	bl	_ST_UB
	mov	w19, #0
LBB0_3:
	mov	x0, x19
	ldp	x29, x30, [sp, #160]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #144]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #128]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #112]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #96]             ; 16-byte Folded Reload
	add	sp, sp, #176
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_vp9_vt_lpf_t4_and_t8_16w
.subsections_via_symbols
