	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_AR_StartDMA                    ## -- Begin function AR_StartDMA
	.p2align	4, 0x90
_AR_StartDMA:                           ## @AR_StartDMA
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, -48(%rbp)                 ## 4-byte Spill
	movl	%edx, %r12d
	movl	%esi, %r13d
	movl	%edi, -44(%rbp)                 ## 4-byte Spill
	callq	__CPU_ISR_Disable
	movq	__dspReg@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rax
	movq	%rcx, %r14
	movl	$-1024, %r15d                   ## imm = 0xFC00
	movl	64(%rax), %ebx
	andl	%r15d, %ebx
	movl	%r13d, %edi
	movl	$16, %esi
	movl	$16, %edx
	callq	__SHIFTR
	orl	%ebx, %eax
	movq	(%r14), %rcx
	movl	%eax, 64(%rcx)
	movl	$-65505, %r14d                  ## imm = 0xFFFF001F
	movl	68(%rcx), %ebx
	andl	%r14d, %ebx
	movl	%r13d, %edi
	xorl	%esi, %esi
	movl	$16, %edx
	callq	__SHIFTR
	orl	%ebx, %eax
	movq	__dspReg@GOTPCREL(%rip), %r13
	movq	(%r13), %rcx
	movl	%eax, 68(%rcx)
	andl	72(%rcx), %r15d
	movl	%r12d, %edi
	movl	$16, %esi
	movl	$16, %edx
	callq	__SHIFTR
	orl	%r15d, %eax
	movq	(%r13), %rcx
	movl	%eax, 72(%rcx)
	movl	76(%rcx), %ebx
	andl	%r14d, %ebx
	movl	%r12d, %edi
	xorl	%esi, %esi
	movl	$16, %edx
	callq	__SHIFTR
	orl	%ebx, %eax
	movq	(%r13), %rcx
	movl	%eax, 76(%rcx)
	movl	$-32769, %r15d                  ## imm = 0xFFFF7FFF
	andl	80(%rcx), %r15d
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	movl	$15, %esi
	movl	$1, %edx
	callq	__SHIFTL
	movl	%eax, %ebx
	orl	%r15d, %ebx
	movq	(%r13), %rax
	movl	%ebx, 80(%rax)
	andl	$-1024, %ebx                    ## imm = 0xFC00
	movl	-48(%rbp), %r15d                ## 4-byte Reload
	movl	%r15d, %edi
	movl	$16, %esi
	movl	$16, %edx
	callq	__SHIFTR
	orl	%ebx, %eax
	movq	(%r13), %rcx
	movl	%eax, 80(%rcx)
	andl	84(%rcx), %r14d
	movl	%r15d, %edi
	xorl	%esi, %esi
	movl	$16, %edx
	callq	__SHIFTR
	orl	%r14d, %eax
	movq	(%r13), %rcx
	movl	%eax, 84(%rcx)
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	__CPU_ISR_Restore               ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	__dspReg,8,3                    ## @_dspReg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_AR_StartDMA                    ; -- Begin function AR_StartDMA
	.p2align	2
_AR_StartDMA:                           ; @AR_StartDMA
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x3
	mov	x21, x2
	mov	x22, x1
	mov	x20, x0
	bl	__CPU_ISR_Disable
Lloh0:
	adrp	x23, __dspReg@GOTPAGE
Lloh1:
	ldr	x23, [x23, __dspReg@GOTPAGEOFF]
	ldr	x8, [x23]
	ldr	w8, [x8, #64]
	and	w24, w8, #0xfffffc00
	mov	x0, x22
	mov	w1, #16
	mov	w2, #16
	bl	__SHIFTR
	orr	w8, w24, w0
	ldr	x9, [x23]
	str	w8, [x9, #64]
	ldr	w8, [x9, #68]
	and	w24, w8, #0xffff001f
	mov	x0, x22
	mov	w1, #0
	mov	w2, #16
	bl	__SHIFTR
	orr	w8, w24, w0
	ldr	x9, [x23]
	str	w8, [x9, #68]
	ldr	w8, [x9, #72]
	and	w22, w8, #0xfffffc00
	mov	x0, x21
	mov	w1, #16
	mov	w2, #16
	bl	__SHIFTR
	orr	w8, w22, w0
	ldr	x9, [x23]
	str	w8, [x9, #72]
	ldr	w8, [x9, #76]
	and	w22, w8, #0xffff001f
	mov	x0, x21
	mov	w1, #0
	mov	w2, #16
	bl	__SHIFTR
	orr	w8, w22, w0
	ldr	x9, [x23]
	str	w8, [x9, #76]
	ldr	w8, [x9, #80]
	and	w21, w8, #0xffff7fff
	mov	x0, x20
	mov	w1, #15
	mov	w2, #1
	bl	__SHIFTL
	orr	w8, w21, w0
	ldr	x9, [x23]
	str	w8, [x9, #80]
	and	w20, w8, #0xfffffc00
	mov	x0, x19
	mov	w1, #16
	mov	w2, #16
	bl	__SHIFTR
	orr	w8, w0, w20
	ldr	x9, [x23]
	str	w8, [x9, #80]
	ldr	w8, [x9, #84]
	and	w20, w8, #0xffff001f
	mov	x0, x19
	mov	w1, #0
	mov	w2, #16
	bl	__SHIFTR
	orr	w8, w20, w0
	ldr	x9, [x23]
	str	w8, [x9, #84]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	__CPU_ISR_Restore
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	__dspReg,8,3                    ; @_dspReg
.subsections_via_symbols
