	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_GPU_SetTexture                 ## -- Begin function GPU_SetTexture
	.p2align	4, 0x90
_GPU_SetTexture:                        ## @GPU_SetTexture
	.cfi_startproc
## %bb.0:
	addl	$-128, %edi
	cmpl	$2, %edi
	ja	LBB0_1
## %bb.2:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r15d
	movl	%edx, %ebx
	movq	%rsi, %r12
	movslq	%edi, %rax
	leaq	l_switch.table.GPU_SetTexture(%rip), %rcx
	movq	(%rcx,%rax,8), %rcx
	leaq	l_switch.table.GPU_SetTexture.1(%rip), %rdx
	movq	(%rdx,%rax,8), %r13
	leaq	l_switch.table.GPU_SetTexture.2(%rip), %rdx
	movq	(%rdx,%rax,8), %r14
	leaq	l_switch.table.GPU_SetTexture.3(%rip), %rdx
	movq	(%rdx,%rax,8), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movl	(%rcx), %edi
	movl	%r9d, %esi
	movl	%r8d, -44(%rbp)                 ## 4-byte Spill
	callq	_GPUCMD_AddWrite
	movl	(%r13), %edi
	sarl	$3, %r12d
	movl	%r12d, %esi
	callq	_GPUCMD_AddWrite
	movl	(%r14), %edi
	shll	$16, %ebx
	orl	%r15d, %ebx
	movl	%ebx, %esi
	callq	_GPUCMD_AddWrite
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_GPUCMD_AddWrite                ## TAILCALL
LBB0_1:
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GPUREG_TEXUNIT0_TYPE,4,2       ## @GPUREG_TEXUNIT0_TYPE
	.comm	_GPUREG_TEXUNIT0_ADDR1,4,2      ## @GPUREG_TEXUNIT0_ADDR1
	.comm	_GPUREG_TEXUNIT0_DIM,4,2        ## @GPUREG_TEXUNIT0_DIM
	.comm	_GPUREG_TEXUNIT0_PARAM,4,2      ## @GPUREG_TEXUNIT0_PARAM
	.comm	_GPUREG_TEXUNIT1_TYPE,4,2       ## @GPUREG_TEXUNIT1_TYPE
	.comm	_GPUREG_TEXUNIT1_ADDR,4,2       ## @GPUREG_TEXUNIT1_ADDR
	.comm	_GPUREG_TEXUNIT1_DIM,4,2        ## @GPUREG_TEXUNIT1_DIM
	.comm	_GPUREG_TEXUNIT1_PARAM,4,2      ## @GPUREG_TEXUNIT1_PARAM
	.comm	_GPUREG_TEXUNIT2_TYPE,4,2       ## @GPUREG_TEXUNIT2_TYPE
	.comm	_GPUREG_TEXUNIT2_ADDR,4,2       ## @GPUREG_TEXUNIT2_ADDR
	.comm	_GPUREG_TEXUNIT2_DIM,4,2        ## @GPUREG_TEXUNIT2_DIM
	.comm	_GPUREG_TEXUNIT2_PARAM,4,2      ## @GPUREG_TEXUNIT2_PARAM
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.GPU_SetTexture
l_switch.table.GPU_SetTexture:
	.quad	_GPUREG_TEXUNIT2_TYPE
	.quad	_GPUREG_TEXUNIT1_TYPE
	.quad	_GPUREG_TEXUNIT0_TYPE

	.p2align	3                               ## @switch.table.GPU_SetTexture.1
l_switch.table.GPU_SetTexture.1:
	.quad	_GPUREG_TEXUNIT2_ADDR
	.quad	_GPUREG_TEXUNIT1_ADDR
	.quad	_GPUREG_TEXUNIT0_ADDR1

	.p2align	3                               ## @switch.table.GPU_SetTexture.2
l_switch.table.GPU_SetTexture.2:
	.quad	_GPUREG_TEXUNIT2_DIM
	.quad	_GPUREG_TEXUNIT1_DIM
	.quad	_GPUREG_TEXUNIT0_DIM

	.p2align	3                               ## @switch.table.GPU_SetTexture.3
l_switch.table.GPU_SetTexture.3:
	.quad	_GPUREG_TEXUNIT2_PARAM
	.quad	_GPUREG_TEXUNIT1_PARAM
	.quad	_GPUREG_TEXUNIT0_PARAM

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_GPU_SetTexture                 ; -- Begin function GPU_SetTexture
	.p2align	2
_GPU_SetTexture:                        ; @GPU_SetTexture
	.cfi_startproc
; %bb.0:
	sub	w8, w0, #128
	cmp	w8, #2
	b.hi	LBB0_2
; %bb.1:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x4
	mov	x20, x3
	mov	x21, x2
	mov	x22, x1
	sbfiz	x8, x8, #3, #32
Lloh0:
	adrp	x9, l_switch.table.GPU_SetTexture@PAGE
Lloh1:
	add	x9, x9, l_switch.table.GPU_SetTexture@PAGEOFF
	ldr	x9, [x9, x8]
Lloh2:
	adrp	x10, l_switch.table.GPU_SetTexture.1@PAGE
Lloh3:
	add	x10, x10, l_switch.table.GPU_SetTexture.1@PAGEOFF
	ldr	x23, [x10, x8]
Lloh4:
	adrp	x10, l_switch.table.GPU_SetTexture.2@PAGE
Lloh5:
	add	x10, x10, l_switch.table.GPU_SetTexture.2@PAGEOFF
	ldr	x24, [x10, x8]
Lloh6:
	adrp	x10, l_switch.table.GPU_SetTexture.3@PAGE
Lloh7:
	add	x10, x10, l_switch.table.GPU_SetTexture.3@PAGEOFF
	ldr	x25, [x10, x8]
	ldr	w0, [x9]
	mov	x1, x5
	bl	_GPUCMD_AddWrite
	ldr	w0, [x23]
	asr	w1, w22, #3
	bl	_GPUCMD_AddWrite
	ldr	w0, [x24]
	orr	w1, w20, w21, lsl #16
	bl	_GPUCMD_AddWrite
	ldr	w0, [x25]
	mov	x1, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_GPUCMD_AddWrite
LBB0_2:
	.cfi_def_cfa wsp, 0
	.cfi_same_value w30
	.cfi_same_value w29
	.cfi_same_value w19
	.cfi_same_value w20
	.cfi_same_value w21
	.cfi_same_value w22
	.cfi_same_value w23
	.cfi_same_value w24
	.cfi_same_value w25
	.cfi_same_value w26
	ret
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_GPUREG_TEXUNIT0_TYPE,4,2       ; @GPUREG_TEXUNIT0_TYPE
	.comm	_GPUREG_TEXUNIT0_ADDR1,4,2      ; @GPUREG_TEXUNIT0_ADDR1
	.comm	_GPUREG_TEXUNIT0_DIM,4,2        ; @GPUREG_TEXUNIT0_DIM
	.comm	_GPUREG_TEXUNIT0_PARAM,4,2      ; @GPUREG_TEXUNIT0_PARAM
	.comm	_GPUREG_TEXUNIT1_TYPE,4,2       ; @GPUREG_TEXUNIT1_TYPE
	.comm	_GPUREG_TEXUNIT1_ADDR,4,2       ; @GPUREG_TEXUNIT1_ADDR
	.comm	_GPUREG_TEXUNIT1_DIM,4,2        ; @GPUREG_TEXUNIT1_DIM
	.comm	_GPUREG_TEXUNIT1_PARAM,4,2      ; @GPUREG_TEXUNIT1_PARAM
	.comm	_GPUREG_TEXUNIT2_TYPE,4,2       ; @GPUREG_TEXUNIT2_TYPE
	.comm	_GPUREG_TEXUNIT2_ADDR,4,2       ; @GPUREG_TEXUNIT2_ADDR
	.comm	_GPUREG_TEXUNIT2_DIM,4,2        ; @GPUREG_TEXUNIT2_DIM
	.comm	_GPUREG_TEXUNIT2_PARAM,4,2      ; @GPUREG_TEXUNIT2_PARAM
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.GPU_SetTexture
l_switch.table.GPU_SetTexture:
	.quad	_GPUREG_TEXUNIT2_TYPE
	.quad	_GPUREG_TEXUNIT1_TYPE
	.quad	_GPUREG_TEXUNIT0_TYPE

	.p2align	3                               ; @switch.table.GPU_SetTexture.1
l_switch.table.GPU_SetTexture.1:
	.quad	_GPUREG_TEXUNIT2_ADDR
	.quad	_GPUREG_TEXUNIT1_ADDR
	.quad	_GPUREG_TEXUNIT0_ADDR1

	.p2align	3                               ; @switch.table.GPU_SetTexture.2
l_switch.table.GPU_SetTexture.2:
	.quad	_GPUREG_TEXUNIT2_DIM
	.quad	_GPUREG_TEXUNIT1_DIM
	.quad	_GPUREG_TEXUNIT0_DIM

	.p2align	3                               ; @switch.table.GPU_SetTexture.3
l_switch.table.GPU_SetTexture.3:
	.quad	_GPUREG_TEXUNIT2_PARAM
	.quad	_GPUREG_TEXUNIT1_PARAM
	.quad	_GPUREG_TEXUNIT0_PARAM

.subsections_via_symbols
