	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nvenc_pop_context
_nvenc_pop_context:                     ## @nvenc_pop_context
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	subq	$16, %rsp
	movq	(%rdi), %rcx
	xorl	%eax, %eax
	cmpq	$0, (%rcx)
	jne	LBB0_2
## %bb.1:
	movq	8(%rcx), %rax
	leaq	-4(%rbp), %rdi
	callq	*(%rax)
	movl	%eax, %edi
	callq	_CHECK_CU
LBB0_2:
	addq	$16, %rsp
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_nvenc_pop_context
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nvenc_pop_context
_nvenc_pop_context:                     ; @nvenc_pop_context
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #32
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	ldr	x8, [x0]
	ldr	x9, [x8]
	cbz	x9, LBB0_2
; %bb.1:
	mov	w0, #0
	b	LBB0_3
LBB0_2:
	ldr	x8, [x8, #8]
	ldr	x8, [x8]
	sub	x0, x29, #4
	blr	x8
	bl	_CHECK_CU
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #32
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_nvenc_pop_context
.subsections_via_symbols
