	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_msi_ok
_radeon_msi_ok:                         ## @radeon_msi_ok
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	(%rdi), %rcx
	movq	_CHIP_RV380@GOTPCREL(%rip), %rdx
	xorl	%eax, %eax
	cmpq	(%rdx), %rcx
	jl	LBB0_20
## %bb.1:
	movl	8(%rdi), %edx
	movq	_RADEON_IS_AGP@GOTPCREL(%rip), %rsi
	testl	%edx, (%rsi)
	je	LBB0_2
LBB0_20:
	popq	%rbp
	retq
LBB0_2:
	movq	_radeon_msi@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	cmpl	$1, %esi
	je	LBB0_3
## %bb.4:
	testl	%esi, %esi
	je	LBB0_20
## %bb.5:
	movq	16(%rdi), %rax
	cmpl	$31007, (%rax)                  ## imm = 0x791F
	jne	LBB0_14
## %bb.6:
	movl	4(%rax), %esi
	cmpl	$4136, %esi                     ## imm = 0x1028
	je	LBB0_12
## %bb.7:
	cmpl	$4219, %esi                     ## imm = 0x107B
	je	LBB0_13
## %bb.8:
	cmpl	$4156, %esi                     ## imm = 0x103C
	jne	LBB0_14
## %bb.9:
	cmpl	$12482, 8(%rax)                 ## imm = 0x30C2
	jmp	LBB0_10
LBB0_3:
	movl	%esi, %eax
	popq	%rbp
	retq
LBB0_14:
	movq	_CHIP_RS690@GOTPCREL(%rip), %rsi
	movl	$1, %eax
	cmpq	(%rsi), %rcx
	jne	LBB0_16
	jmp	LBB0_20
LBB0_12:
	movl	8(%rax), %esi
	andl	$-2, %esi
	movl	$1, %eax
	cmpl	$508, %esi                      ## imm = 0x1FC
	jne	LBB0_11
	jmp	LBB0_20
LBB0_13:
	cmpl	$389, 8(%rax)                   ## imm = 0x185
LBB0_10:
	movl	$1, %eax
	je	LBB0_20
LBB0_11:
	movq	_CHIP_RS690@GOTPCREL(%rip), %rsi
	cmpq	(%rsi), %rcx
	je	LBB0_20
LBB0_16:
	movq	_CHIP_RV515@GOTPCREL(%rip), %rsi
	movl	$0, %eax
	cmpq	(%rsi), %rcx
	je	LBB0_20
## %bb.17:
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %rax
	testl	%edx, (%rax)
	je	LBB0_18
## %bb.19:
	movq	_CHIP_PALM@GOTPCREL(%rip), %rdx
	xorl	%eax, %eax
	cmpq	(%rdx), %rcx
	setge	%al
	popq	%rbp
	retq
LBB0_18:
	movl	$1, %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_RV380,8,3                 ## @CHIP_RV380
	.comm	_RADEON_IS_AGP,4,2              ## @RADEON_IS_AGP
	.comm	_radeon_msi,4,2                 ## @radeon_msi
	.comm	_CHIP_RS690,8,3                 ## @CHIP_RS690
	.comm	_CHIP_RV515,8,3                 ## @CHIP_RV515
	.comm	_RADEON_IS_IGP,4,2              ## @RADEON_IS_IGP
	.comm	_CHIP_PALM,8,3                  ## @CHIP_PALM
	.no_dead_strip	_radeon_msi_ok
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_msi_ok
_radeon_msi_ok:                         ; @radeon_msi_ok
	.cfi_startproc
; %bb.0:
	ldr	x9, [x0]
Lloh0:
	adrp	x10, _CHIP_RV380@GOTPAGE
Lloh1:
	ldr	x10, [x10, _CHIP_RV380@GOTPAGEOFF]
Lloh2:
	ldr	x10, [x10]
	cmp	x9, x10
	b.lt	LBB0_2
; %bb.1:
	mov	x8, x0
	ldr	w10, [x0, #8]
Lloh3:
	adrp	x11, _RADEON_IS_AGP@GOTPAGE
Lloh4:
	ldr	x11, [x11, _RADEON_IS_AGP@GOTPAGEOFF]
Lloh5:
	ldr	w11, [x11]
	tst	w11, w10
	b.eq	LBB0_3
LBB0_2:
	mov	w0, #0
	ret
LBB0_3:
Lloh6:
	adrp	x11, _radeon_msi@GOTPAGE
Lloh7:
	ldr	x11, [x11, _radeon_msi@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x11]
	cmp	w0, #1
	b.eq	LBB0_5
; %bb.4:
	cbnz	w0, LBB0_6
LBB0_5:
	ret
LBB0_6:
	ldr	x8, [x8, #16]
	ldr	w11, [x8]
	mov	w12, #31007
	cmp	w11, w12
	b.ne	LBB0_12
; %bb.7:
	ldr	w11, [x8, #4]
	mov	w12, #4136
	cmp	w11, w12
	b.eq	LBB0_17
; %bb.8:
	mov	w12, #4219
	cmp	w11, w12
	b.eq	LBB0_16
; %bb.9:
	mov	w12, #4156
	cmp	w11, w12
	b.ne	LBB0_12
; %bb.10:
	ldr	w8, [x8, #8]
	mov	w0, #1
	mov	w11, #12482
	cmp	w8, w11
	b.eq	LBB0_5
; %bb.11:
Lloh9:
	adrp	x8, _CHIP_RS690@GOTPAGE
Lloh10:
	ldr	x8, [x8, _CHIP_RS690@GOTPAGEOFF]
Lloh11:
	ldr	x8, [x8]
	cmp	x9, x8
	b.ne	LBB0_13
	b	LBB0_5
LBB0_12:
Lloh12:
	adrp	x8, _CHIP_RS690@GOTPAGE
Lloh13:
	ldr	x8, [x8, _CHIP_RS690@GOTPAGEOFF]
Lloh14:
	ldr	x8, [x8]
	cmp	x9, x8
	b.eq	LBB0_18
LBB0_13:
Lloh15:
	adrp	x8, _CHIP_RV515@GOTPAGE
Lloh16:
	ldr	x8, [x8, _CHIP_RV515@GOTPAGEOFF]
Lloh17:
	ldr	x8, [x8]
	cmp	x9, x8
	b.eq	LBB0_2
; %bb.14:
Lloh18:
	adrp	x8, _RADEON_IS_IGP@GOTPAGE
Lloh19:
	ldr	x8, [x8, _RADEON_IS_IGP@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	tst	w8, w10
	b.eq	LBB0_18
; %bb.15:
Lloh21:
	adrp	x8, _CHIP_PALM@GOTPAGE
Lloh22:
	ldr	x8, [x8, _CHIP_PALM@GOTPAGEOFF]
Lloh23:
	ldr	x8, [x8]
	cmp	x9, x8
	cset	w0, ge
	ret
LBB0_16:
	ldr	w8, [x8, #8]
Lloh24:
	adrp	x11, _CHIP_RS690@GOTPAGE
Lloh25:
	ldr	x11, [x11, _CHIP_RS690@GOTPAGEOFF]
Lloh26:
	ldr	x11, [x11]
	cmp	w8, #389
	ccmp	x9, x11, #4, ne
	b.eq	LBB0_18
	b	LBB0_13
LBB0_17:
	ldr	w8, [x8, #8]
	and	w8, w8, #0xfffffffe
Lloh27:
	adrp	x11, _CHIP_RS690@GOTPAGE
Lloh28:
	ldr	x11, [x11, _CHIP_RS690@GOTPAGEOFF]
Lloh29:
	ldr	x11, [x11]
	cmp	w8, #508
	ccmp	x9, x11, #4, ne
	b.ne	LBB0_13
LBB0_18:
	mov	w0, #1
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_RV380,8,3                 ; @CHIP_RV380
	.comm	_RADEON_IS_AGP,4,2              ; @RADEON_IS_AGP
	.comm	_radeon_msi,4,2                 ; @radeon_msi
	.comm	_CHIP_RS690,8,3                 ; @CHIP_RS690
	.comm	_CHIP_RV515,8,3                 ; @CHIP_RV515
	.comm	_RADEON_IS_IGP,4,2              ; @RADEON_IS_IGP
	.comm	_CHIP_PALM,8,3                  ; @CHIP_PALM
	.no_dead_strip	_radeon_msi_ok
.subsections_via_symbols
