	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mcs_setup_transceiver_vishay
_mcs_setup_transceiver_vishay:          ## @mcs_setup_transceiver_vishay
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_MCS_XCVR_REG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-44(%rbp), %rdx
	callq	_mcs_get_reg
	xorl	%edi, %edi
	cmpl	$2, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_EIO@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_5
LBB0_2:
	movq	_MCS_MODE0@GOTPCREL(%rip), %r13
	movq	_MCS_XCVR_CONF@GOTPCREL(%rip), %r12
	movl	(%r12), %eax
	orl	(%r13), %eax
	orl	-44(%rbp), %eax
	movq	_MCS_STFIR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_MCS_MODE1@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movl	%edx, -44(%rbp)
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_mcs_set_reg
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_5
## %bb.3:
	movl	(%r13), %edx
	notl	%edx
	andl	-44(%rbp), %edx
	movl	%edx, -44(%rbp)
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_mcs_set_reg
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_5
## %bb.4:
	movl	(%r12), %edx
	notl	%edx
	andl	-44(%rbp), %edx
	movl	%edx, -44(%rbp)
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_mcs_set_reg
	movl	%eax, %r14d
	movl	%eax, %edi
	callq	_unlikely
	xorl	%ebx, %ebx
	testq	%rax, %rax
	cmovnel	%r14d, %ebx
LBB0_5:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MCS_XCVR_REG,4,2               ## @MCS_XCVR_REG
	.comm	_EIO,4,2                        ## @EIO
	.comm	_MCS_MODE0,4,2                  ## @MCS_MODE0
	.comm	_MCS_XCVR_CONF,4,2              ## @MCS_XCVR_CONF
	.comm	_MCS_STFIR,4,2                  ## @MCS_STFIR
	.comm	_MCS_MODE1,4,2                  ## @MCS_MODE1
	.no_dead_strip	_mcs_setup_transceiver_vishay
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mcs_setup_transceiver_vishay
_mcs_setup_transceiver_vishay:          ; @mcs_setup_transceiver_vishay
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x21, _MCS_XCVR_REG@GOTPAGE
Lloh1:
	ldr	x21, [x21, _MCS_XCVR_REG@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #12
	bl	_mcs_get_reg
	cmp	w0, #2
	cset	w0, ne
	bl	_unlikely
	cbz	x0, LBB0_2
; %bb.1:
Lloh2:
	adrp	x8, _EIO@GOTPAGE
Lloh3:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_5
LBB0_2:
Lloh5:
	adrp	x23, _MCS_MODE0@GOTPAGE
Lloh6:
	ldr	x23, [x23, _MCS_MODE0@GOTPAGEOFF]
	ldr	w8, [x23]
Lloh7:
	adrp	x22, _MCS_XCVR_CONF@GOTPAGE
Lloh8:
	ldr	x22, [x22, _MCS_XCVR_CONF@GOTPAGEOFF]
	ldr	w9, [x22]
	orr	w8, w9, w8
	ldr	w9, [sp, #12]
	orr	w8, w8, w9
Lloh9:
	adrp	x9, _MCS_STFIR@GOTPAGE
Lloh10:
	ldr	x9, [x9, _MCS_STFIR@GOTPAGEOFF]
Lloh11:
	adrp	x10, _MCS_MODE1@GOTPAGE
Lloh12:
	ldr	x10, [x10, _MCS_MODE1@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
Lloh14:
	ldr	w10, [x10]
	orr	w9, w9, w10
	bic	w2, w8, w9
	str	w2, [sp, #12]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_mcs_set_reg
	mov	x20, x0
	bl	_unlikely
	cbnz	x0, LBB0_5
; %bb.3:
	ldr	w8, [x23]
	ldr	w9, [sp, #12]
	bic	w2, w9, w8
	str	w2, [sp, #12]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_mcs_set_reg
	mov	x20, x0
	bl	_unlikely
	cbnz	x0, LBB0_5
; %bb.4:
	ldr	w8, [x22]
	ldr	w9, [sp, #12]
	bic	w2, w9, w8
	str	w2, [sp, #12]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_mcs_set_reg
	mov	x19, x0
	bl	_unlikely
	cmp	x0, #0
	csel	w20, wzr, w19, eq
LBB0_5:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh13
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_MCS_XCVR_REG,4,2               ; @MCS_XCVR_REG
	.comm	_EIO,4,2                        ; @EIO
	.comm	_MCS_MODE0,4,2                  ; @MCS_MODE0
	.comm	_MCS_XCVR_CONF,4,2              ; @MCS_XCVR_CONF
	.comm	_MCS_STFIR,4,2                  ; @MCS_STFIR
	.comm	_MCS_MODE1,4,2                  ; @MCS_MODE1
	.no_dead_strip	_mcs_setup_transceiver_vishay
.subsections_via_symbols
