	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tg3_read_mem
_tg3_read_mem:                          ## @tg3_read_mem
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movq	%rdi, %r15
	callq	_tg3_asic_rev
	movq	_ASIC_REV_5906@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_3
## %bb.1:
	movq	_NIC_SRAM_STATS_BLK@GOTPCREL(%rip), %rax
	cmpq	%rbx, (%rax)
	jg	LBB0_3
## %bb.2:
	movq	_NIC_SRAM_TX_BUFFER_DESC@GOTPCREL(%rip), %rax
	cmpq	%rbx, (%rax)
	jle	LBB0_3
## %bb.7:
	movq	$0, (%r14)
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movq	%r15, %rdi
	callq	_spin_lock_irqsave
	movq	_SRAM_USE_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_tg3_flag
	testq	%rax, %rax
	je	LBB0_5
## %bb.4:
	movl	4(%r15), %edi
	movq	_TG3PCI_MEM_WIN_BASE_ADDR@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdx
	callq	_pci_write_config_dword
	movl	4(%r15), %edi
	movq	_TG3PCI_MEM_WIN_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdx
	callq	_pci_read_config_dword
	movl	4(%r15), %edi
	movl	(%r12), %esi
	xorl	%edx, %edx
	callq	_pci_write_config_dword
	jmp	LBB0_6
LBB0_5:
	movq	_TG3PCI_MEM_WIN_BASE_ADDR@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	%rbx, %rsi
	callq	_tw32_f
	movq	_TG3PCI_MEM_WIN_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_tr32
	movq	%rax, (%r14)
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_tw32_f
LBB0_6:
	movq	%r15, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_spin_unlock_irqrestore         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ASIC_REV_5906,8,3              ## @ASIC_REV_5906
	.comm	_NIC_SRAM_STATS_BLK,8,3         ## @NIC_SRAM_STATS_BLK
	.comm	_NIC_SRAM_TX_BUFFER_DESC,8,3    ## @NIC_SRAM_TX_BUFFER_DESC
	.comm	_SRAM_USE_CONFIG,4,2            ## @SRAM_USE_CONFIG
	.comm	_TG3PCI_MEM_WIN_BASE_ADDR,4,2   ## @TG3PCI_MEM_WIN_BASE_ADDR
	.comm	_TG3PCI_MEM_WIN_DATA,4,2        ## @TG3PCI_MEM_WIN_DATA
	.no_dead_strip	_tg3_read_mem
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tg3_read_mem
_tg3_read_mem:                          ; @tg3_read_mem
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	bl	_tg3_asic_rev
Lloh0:
	adrp	x8, _ASIC_REV_5906@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ASIC_REV_5906@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
Lloh3:
	adrp	x9, _NIC_SRAM_STATS_BLK@GOTPAGE
Lloh4:
	ldr	x9, [x9, _NIC_SRAM_STATS_BLK@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
Lloh6:
	adrp	x10, _NIC_SRAM_TX_BUFFER_DESC@GOTPAGE
Lloh7:
	ldr	x10, [x10, _NIC_SRAM_TX_BUFFER_DESC@GOTPAGEOFF]
Lloh8:
	ldr	x10, [x10]
	cmp	x0, x8
	ccmp	x9, x21, #0, eq
	ccmp	x10, x21, #4, le
	b.gt	LBB0_3
; %bb.1:
	mov	x0, x19
	bl	_spin_lock_irqsave
Lloh9:
	adrp	x8, _SRAM_USE_CONFIG@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SRAM_USE_CONFIG@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_flag
	cbz	x0, LBB0_4
; %bb.2:
	ldr	w0, [x19, #4]
Lloh12:
	adrp	x22, _TG3PCI_MEM_WIN_BASE_ADDR@GOTPAGE
Lloh13:
	ldr	x22, [x22, _TG3PCI_MEM_WIN_BASE_ADDR@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x2, x21
	bl	_pci_write_config_dword
	ldr	w0, [x19, #4]
Lloh14:
	adrp	x8, _TG3PCI_MEM_WIN_DATA@GOTPAGE
Lloh15:
	ldr	x8, [x8, _TG3PCI_MEM_WIN_DATA@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x2, x20
	bl	_pci_read_config_dword
	ldr	w0, [x19, #4]
	ldr	w1, [x22]
	mov	x2, #0
	bl	_pci_write_config_dword
	b	LBB0_5
LBB0_3:
	str	xzr, [x20]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_4:
Lloh17:
	adrp	x22, _TG3PCI_MEM_WIN_BASE_ADDR@GOTPAGE
Lloh18:
	ldr	x22, [x22, _TG3PCI_MEM_WIN_BASE_ADDR@GOTPAGEOFF]
	ldr	w0, [x22]
	mov	x1, x21
	bl	_tw32_f
Lloh19:
	adrp	x8, _TG3PCI_MEM_WIN_DATA@GOTPAGE
Lloh20:
	ldr	x8, [x8, _TG3PCI_MEM_WIN_DATA@GOTPAGEOFF]
Lloh21:
	ldr	w0, [x8]
	bl	_tr32
	str	x0, [x20]
	ldr	w0, [x22]
	mov	x1, #0
	bl	_tw32_f
LBB0_5:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_spin_unlock_irqrestore
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.comm	_ASIC_REV_5906,8,3              ; @ASIC_REV_5906
	.comm	_NIC_SRAM_STATS_BLK,8,3         ; @NIC_SRAM_STATS_BLK
	.comm	_NIC_SRAM_TX_BUFFER_DESC,8,3    ; @NIC_SRAM_TX_BUFFER_DESC
	.comm	_SRAM_USE_CONFIG,4,2            ; @SRAM_USE_CONFIG
	.comm	_TG3PCI_MEM_WIN_BASE_ADDR,4,2   ; @TG3PCI_MEM_WIN_BASE_ADDR
	.comm	_TG3PCI_MEM_WIN_DATA,4,2        ; @TG3PCI_MEM_WIN_DATA
	.no_dead_strip	_tg3_read_mem
.subsections_via_symbols
