	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_cp_dispatch_indices
_radeon_cp_dispatch_indices:            ## @radeon_cp_dispatch_indices
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r15
	movq	%rdx, -56(%rbp)                 ## 8-byte Spill
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	movq	8(%rdi), %rdx
	movq	(%rsi), %rax
	movq	(%rax), %rbx
	movl	(%rcx), %r9d
	movl	4(%rcx), %ecx
	movq	%rdx, -80(%rbp)                 ## 8-byte Spill
	movl	(%rdx), %r14d
	addl	%r9d, %r14d
	movq	_RADEON_INDEX_PRIM_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	addl	%ecx, %r12d
	movl	8(%r15), %r8d
	movl	%r8d, %r13d
	subl	%r12d, %r13d
	sarl	$2, %r13d
	movslq	(%rbx), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movl	12(%r15), %esi
	movl	16(%r15), %edx
	movl	20(%r15), %eax
	movl	%eax, (%rsp)
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG
	movl	12(%r15), %edi
	movl	%r13d, %esi
	callq	_bad_prim_vertex_nr
	testq	%rax, %rax
	je	LBB0_1
## %bb.8:
	movl	12(%r15), %esi
	leaq	L_.str.1(%rip), %rdi
	movl	%r13d, %edx
	xorl	%eax, %eax
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DRM_ERROR                      ## TAILCALL
LBB0_1:
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movl	8(%r15), %esi
	cmpl	%esi, %r12d
	jge	LBB0_9
## %bb.2:
	movslq	4(%r15), %rcx
	testb	$7, %cl
	je	LBB0_3
LBB0_9:
	movl	12(%r15), %esi
	leaq	L_.str.2(%rip), %rdi
	xorl	%eax, %eax
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DRM_ERROR                      ## TAILCALL
LBB0_3:
	subl	%ecx, %esi
	addl	$3, %esi
	movq	(%rax), %rax
	movslq	(%rbx), %r12
	addq	(%rax), %r12
	sarl	$2, %esi
	movq	_RADEON_3D_RNDR_GEN_INDX_PRIM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	$-2, %esi
	movq	%rcx, %rbx
	callq	_CP_PACKET3
	movl	%eax, (%rbx,%r12)
	movl	%r14d, 4(%rbx,%r12)
	movl	20(%r15), %eax
	movl	%eax, 8(%rbx,%r12)
	movl	16(%r15), %eax
	movl	%eax, 12(%rbx,%r12)
	movq	_RADEON_PRIM_WALK_IND@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	12(%r15), %eax
	movq	_RADEON_COLOR_ORDER_RGBA@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_RADEON_VTX_FMT_RADEON_MODE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_RADEON_NUM_VERTICES_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r13d
	orl	%eax, %r13d
	movl	%r13d, 16(%rbx,%r12)
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	cmpl	$2, %eax
	movl	$1, %r14d
	cmovgel	%eax, %r14d
	xorl	%ebx, %ebx
	jmp	LBB0_4
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_4 Depth=1
	movl	4(%r15), %edx
	movl	8(%r15), %ecx
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	_radeon_cp_dispatch_indirect
	incq	%rbx
	cmpq	%r14, %rbx
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	je	LBB0_7
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	cmpq	%rax, %rbx
	jge	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_4 Depth=1
	leaq	(,%rbx,4), %rsi
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	addq	8(%rax), %rsi
	movq	-80(%rbp), %rdi                 ## 8-byte Reload
	callq	_radeon_emit_clip_rect
	jmp	LBB0_6
LBB0_7:
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_INDEX_PRIM_OFFSET,4,2   ## @RADEON_INDEX_PRIM_OFFSET
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"bad prim %x count %d\n"

L_.str.2:                               ## @.str.2
	.asciz	"buffer prim %d\n"

	.comm	_RADEON_3D_RNDR_GEN_INDX_PRIM,4,2 ## @RADEON_3D_RNDR_GEN_INDX_PRIM
	.comm	_RADEON_PRIM_WALK_IND,4,2       ## @RADEON_PRIM_WALK_IND
	.comm	_RADEON_COLOR_ORDER_RGBA,4,2    ## @RADEON_COLOR_ORDER_RGBA
	.comm	_RADEON_VTX_FMT_RADEON_MODE,4,2 ## @RADEON_VTX_FMT_RADEON_MODE
	.comm	_RADEON_NUM_VERTICES_SHIFT,4,2  ## @RADEON_NUM_VERTICES_SHIFT
	.no_dead_strip	_radeon_cp_dispatch_indices
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_cp_dispatch_indices
_radeon_cp_dispatch_indices:            ; @radeon_cp_dispatch_indices
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x3
	mov	x20, x2
	mov	x21, x0
	ldr	x22, [x0, #8]
	ldr	x8, [x1]
	ldr	x25, [x8]
	ldr	w27, [x22]
	ldp	w24, w3, [x3]
Lloh0:
	adrp	x8, _RADEON_INDEX_PRIM_OFFSET@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_INDEX_PRIM_OFFSET@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	ldp	w4, w1, [x19, #8]
	add	w28, w8, w3
	sub	w8, w4, w28
	asr	w23, w8, #2
	ldrsw	x26, [x25]
	ldp	w2, w6, [x19, #16]
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	mov	x5, x24
	bl	_DRM_DEBUG
	ldr	w0, [x19, #12]
	mov	x1, x23
	bl	_bad_prim_vertex_nr
	cbz	x0, LBB0_3
; %bb.1:
	ldr	w1, [x19, #12]
	str	x23, [sp]
Lloh5:
	adrp	x0, l_.str.1@PAGE
Lloh6:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_ERROR
LBB0_2:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_3:
	ldr	w9, [x19, #8]
	cmp	w28, w9
	b.ge	LBB0_5
; %bb.4:
	ldrsw	x8, [x19, #4]
	tst	w8, #0x7
	b.eq	LBB0_6
LBB0_5:
	ldr	w1, [x19, #12]
Lloh7:
	adrp	x0, l_.str.2@PAGE
Lloh8:
	add	x0, x0, l_.str.2@PAGEOFF
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_DRM_ERROR
LBB0_6:
	add	w27, w24, w27
	sub	w9, w9, w8
	add	w9, w9, #3
	asr	w9, w9, #2
	ldr	x10, [x21]
	ldr	x10, [x10]
	ldrsw	x11, [x20]
	add	x10, x10, x11
	add	x28, x10, x8
Lloh9:
	adrp	x8, _RADEON_3D_RNDR_GEN_INDX_PRIM@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RADEON_3D_RNDR_GEN_INDX_PRIM@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	sub	w1, w9, #2
	bl	_CP_PACKET3
	mov	x24, #0
	stp	w0, w27, [x28]
	ldr	w8, [x19, #20]
	str	w8, [x28, #8]
	ldr	w8, [x19, #16]
	str	w8, [x28, #12]
	ldr	w8, [x19, #12]
Lloh12:
	adrp	x9, _RADEON_PRIM_WALK_IND@GOTPAGE
Lloh13:
	ldr	x9, [x9, _RADEON_PRIM_WALK_IND@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh15:
	adrp	x9, _RADEON_COLOR_ORDER_RGBA@GOTPAGE
Lloh16:
	ldr	x9, [x9, _RADEON_COLOR_ORDER_RGBA@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh18:
	adrp	x9, _RADEON_VTX_FMT_RADEON_MODE@GOTPAGE
Lloh19:
	ldr	x9, [x9, _RADEON_VTX_FMT_RADEON_MODE@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh21:
	adrp	x9, _RADEON_NUM_VERTICES_SHIFT@GOTPAGE
Lloh22:
	ldr	x9, [x9, _RADEON_NUM_VERTICES_SHIFT@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	lsl	w9, w23, w9
	orr	w8, w8, w9
	str	w8, [x28, #16]
	cmp	w26, #1
	csinc	w23, w26, wzr, gt
	b	LBB0_8
LBB0_7:                                 ;   in Loop: Header=BB0_8 Depth=1
	ldp	w2, w3, [x19, #4]
	mov	x0, x21
	mov	x1, x20
	bl	_radeon_cp_dispatch_indirect
	add	x24, x24, #1
	cmp	x24, x23
	b.eq	LBB0_2
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	cmp	x24, x26
	b.ge	LBB0_7
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=1
	ldr	x8, [x25, #8]
	add	x1, x8, x24, lsl #2
	mov	x0, x22
	bl	_radeon_emit_clip_rect
	b	LBB0_7
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_INDEX_PRIM_OFFSET,4,2   ; @RADEON_INDEX_PRIM_OFFSET
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"bad prim %x count %d\n"

l_.str.2:                               ; @.str.2
	.asciz	"buffer prim %d\n"

	.comm	_RADEON_3D_RNDR_GEN_INDX_PRIM,4,2 ; @RADEON_3D_RNDR_GEN_INDX_PRIM
	.comm	_RADEON_PRIM_WALK_IND,4,2       ; @RADEON_PRIM_WALK_IND
	.comm	_RADEON_COLOR_ORDER_RGBA,4,2    ; @RADEON_COLOR_ORDER_RGBA
	.comm	_RADEON_VTX_FMT_RADEON_MODE,4,2 ; @RADEON_VTX_FMT_RADEON_MODE
	.comm	_RADEON_NUM_VERTICES_SHIFT,4,2  ; @RADEON_NUM_VERTICES_SHIFT
	.no_dead_strip	_radeon_cp_dispatch_indices
.subsections_via_symbols
