	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function speedstep_target
_speedstep_target:                      ## @speedstep_target
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ecx
	movl	%esi, %edx
	movl	$0, -28(%rbp)
	movq	_speedstep_freqs@GOTPCREL(%rip), %r14
	movq	(%r14), %rsi
	leaq	-28(%rbp), %r8
	callq	_cpufreq_frequency_table_target
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_4
LBB0_2:
	movq	(%r14), %r15
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_speedstep_get_state
	movq	(%r15,%rax,8), %rax
	movq	%rax, -56(%rbp)
	movq	(%r14), %rcx
	movl	-28(%rbp), %edx
	movq	(%rcx,%rdx,8), %rcx
	movq	%rcx, -48(%rbp)
	movq	$0, -40(%rbp)
	cmpq	%rcx, %rax
	je	LBB0_4
## %bb.3:
	movq	_CPUFREQ_PRECHANGE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-56(%rbp), %r14
	movq	%r14, %rdi
	callq	_cpufreq_notify_transition
	movl	-28(%rbp), %edi
	callq	_speedstep_set_state
	movq	_CPUFREQ_POSTCHANGE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_cpufreq_notify_transition
LBB0_4:
	movl	%ebx, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_speedstep_freqs,8,3            ## @speedstep_freqs
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_CPUFREQ_PRECHANGE,4,2          ## @CPUFREQ_PRECHANGE
	.comm	_CPUFREQ_POSTCHANGE,4,2         ## @CPUFREQ_POSTCHANGE
	.no_dead_strip	_speedstep_target
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function speedstep_target
_speedstep_target:                      ; @speedstep_target
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x3, x2
	mov	x2, x1
	stur	wzr, [x29, #-20]
Lloh0:
	adrp	x19, _speedstep_freqs@GOTPAGE
Lloh1:
	ldr	x19, [x19, _speedstep_freqs@GOTPAGEOFF]
	ldr	x1, [x19]
	sub	x4, x29, #20
	bl	_cpufreq_frequency_table_target
	cbz	x0, LBB0_2
; %bb.1:
Lloh2:
	adrp	x8, _EINVAL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_5
LBB0_2:
	ldr	x20, [x19]
	bl	_speedstep_get_state
	ldr	x8, [x20, x0, lsl #3]
	str	x8, [sp]
	ldr	x9, [x19]
	ldur	w10, [x29, #-20]
	ldr	x9, [x9, x10, lsl #3]
	stp	x9, xzr, [sp, #8]
	cmp	x8, x9
	b.eq	LBB0_4
; %bb.3:
Lloh5:
	adrp	x8, _CPUFREQ_PRECHANGE@GOTPAGE
Lloh6:
	ldr	x8, [x8, _CPUFREQ_PRECHANGE@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	mov	x0, sp
	bl	_cpufreq_notify_transition
	ldur	w0, [x29, #-20]
	bl	_speedstep_set_state
Lloh8:
	adrp	x8, _CPUFREQ_POSTCHANGE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _CPUFREQ_POSTCHANGE@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, sp
	bl	_cpufreq_notify_transition
LBB0_4:
	mov	w0, #0
LBB0_5:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_speedstep_freqs,8,3            ; @speedstep_freqs
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_CPUFREQ_PRECHANGE,4,2          ; @CPUFREQ_PRECHANGE
	.comm	_CPUFREQ_POSTCHANGE,4,2         ; @CPUFREQ_POSTCHANGE
	.no_dead_strip	_speedstep_target
.subsections_via_symbols
