	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_do_resume_cp              ## -- Begin function r600_do_resume_cp
	.p2align	4, 0x90
_r600_do_resume_cp:                     ## @r600_do_resume_cp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	(%rdi), %r15
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_RADEON_FAMILY_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	(%r15), %eax
	movq	_CHIP_RV770@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jge	LBB0_1
## %bb.2:
	movq	%rbx, %rdi
	callq	_r600_vm_init
	movq	%r15, %rdi
	callq	_r600_cp_load_microcode
	jmp	LBB0_3
LBB0_1:
	movq	%rbx, %rdi
	callq	_r700_vm_init
	movq	%r15, %rdi
	callq	_r700_cp_load_microcode
LBB0_3:
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	_r600_cp_init_ring_buffer
	movq	%rbx, %rdi
	callq	_r600_do_engine_reset
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\n"

	.comm	_RADEON_FAMILY_MASK,4,2         ## @RADEON_FAMILY_MASK
	.comm	_CHIP_RV770,4,2                 ## @CHIP_RV770
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_do_resume_cp              ; -- Begin function r600_do_resume_cp
	.p2align	2
_r600_do_resume_cp:                     ; @r600_do_resume_cp
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	ldr	x21, [x0]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x21]
Lloh2:
	adrp	x9, _RADEON_FAMILY_MASK@GOTPAGE
Lloh3:
	ldr	x9, [x9, _RADEON_FAMILY_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh5:
	adrp	x9, _CHIP_RV770@GOTPAGE
Lloh6:
	ldr	x9, [x9, _CHIP_RV770@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	mov	x0, x19
	cmp	w8, w9
	b.ge	LBB0_2
; %bb.1:
	bl	_r600_vm_init
	mov	x0, x21
	bl	_r600_cp_load_microcode
	b	LBB0_3
LBB0_2:
	bl	_r700_vm_init
	mov	x0, x21
	bl	_r700_cp_load_microcode
LBB0_3:
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	bl	_r600_cp_init_ring_buffer
	mov	x0, x19
	bl	_r600_do_engine_reset
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\n"

	.comm	_RADEON_FAMILY_MASK,4,2         ; @RADEON_FAMILY_MASK
	.comm	_CHIP_RV770,4,2                 ; @CHIP_RV770
.subsections_via_symbols
