	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_set_autoneg
_bnx2x_set_autoneg:                     ## @bnx2x_set_autoneg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, -56(%rbp)                 ## 8-byte Spill
	movq	%rdx, %r12
	movq	%rdi, %rbx
	movq	(%rsi), %r14
	movq	_MDIO_REG_BANK_COMBO_IEEE0@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	_MDIO_COMBO_IEEE0_MII_CONTROL@GOTPCREL(%rip), %r13
	movl	(%r13), %ecx
	leaq	-44(%rbp), %r8
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_CL22_RD_OVER_CL45
	movq	(%r12), %rax
	movq	_SPEED_AUTO_NEG@GOTPCREL(%rip), %rdx
	movq	_MDIO_COMBO_IEEO_MII_CONTROL_AN_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r8d
	cmpq	(%rdx), %rax
	jne	LBB0_2
## %bb.1:
	orl	-44(%rbp), %r8d
	jmp	LBB0_3
LBB0_2:
	movq	_MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN@GOTPCREL(%rip), %rax
	orl	(%rax), %r8d
	notl	%r8d
	andl	-44(%rbp), %r8d
LBB0_3:
	movl	%r8d, -44(%rbp)
	movl	(%r15), %edx
	movl	(%r13), %ecx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_CL22_WR_OVER_CL45
	movq	_MDIO_REG_BANK_SERDES_DIGITAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1@GOTPCREL(%rip), %r13
	movl	(%r13), %ecx
	leaq	-44(%rbp), %r8
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_CL22_RD_OVER_CL45
	movq	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN@GOTPCREL(%rip), %rax
	movq	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r8d
	orl	(%rax), %r8d
	notl	%r8d
	andl	-44(%rbp), %r8d
	movq	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %r8d
	movq	(%r12), %rax
	movq	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, %edx
	notl	%edx
	andl	%r8d, %edx
	orl	%ecx, %r8d
	movq	_SPEED_AUTO_NEG@GOTPCREL(%rip), %r15
	cmpq	(%r15), %rax
	cmovnel	%edx, %r8d
	movl	%r8d, -44(%rbp)
	movq	_MDIO_REG_BANK_SERDES_DIGITAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r13), %ecx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_CL22_WR_OVER_CL45
	movq	_MDIO_REG_BANK_BAM_NEXT_PAGE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL@GOTPCREL(%rip), %r13
	movl	(%r13), %ecx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	leaq	-44(%rbp), %r8
	callq	_CL22_RD_OVER_CL45
	movq	(%r12), %rax
	movq	_MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE@GOTPCREL(%rip), %rcx
	movq	_MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r8d
	orl	(%rcx), %r8d
	cmpq	(%r15), %rax
	jne	LBB0_5
## %bb.4:
	orl	-44(%rbp), %r8d
	jmp	LBB0_6
LBB0_5:
	notl	%r8d
	andl	-44(%rbp), %r8d
LBB0_6:
	movl	%r8d, -44(%rbp)
	movq	_MDIO_REG_BANK_BAM_NEXT_PAGE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r13), %ecx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_CL22_WR_OVER_CL45
	cmpq	$0, -56(%rbp)                   ## 8-byte Folded Reload
	je	LBB0_7
## %bb.8:
	movq	_MDIO_REG_BANK_CL73_USERB0@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	_MDIO_CL73_USERB0_CL73_UCTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movl	$14, %r8d
	callq	_CL22_WR_OVER_CL45
	movl	(%r15), %edx
	movq	_MDIO_CL73_USERB0_CL73_BAM_CTRL1@GOTPCREL(%rip), %rax
	movq	_MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN@GOTPCREL(%rip), %rcx
	movq	_MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN@GOTPCREL(%rip), %rsi
	movl	(%rsi), %r8d
	orl	(%rcx), %r8d
	movl	(%rax), %ecx
	movq	_MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %r8d
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_CL22_WR_OVER_CL45
	movq	_MDIO_REG_BANK_CL73_IEEEB1@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	_MDIO_CL73_IEEEB1_AN_ADV2@GOTPCREL(%rip), %r12
	movl	(%r12), %ecx
	leaq	-44(%rbp), %r8
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_CL22_RD_OVER_CL45
	movl	(%rbx), %eax
	movq	_PORT_HW_CFG_SPEED_CAPABILITY_D0_10G@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_10
## %bb.9:
	movq	_MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, -44(%rbp)
LBB0_10:
	movq	_PORT_HW_CFG_SPEED_CAPABILITY_D0_1G@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_11
## %bb.12:
	movq	_MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX@GOTPCREL(%rip), %rax
	movl	-44(%rbp), %r8d
	orl	(%rax), %r8d
	movl	%r8d, -44(%rbp)
	jmp	LBB0_13
LBB0_7:
	xorl	%r8d, %r8d
	jmp	LBB0_14
LBB0_11:
	movl	-44(%rbp), %r8d
LBB0_13:
	movl	(%r15), %edx
	movl	(%r12), %ecx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_CL22_WR_OVER_CL45
	movq	_MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
LBB0_14:
	movl	%r8d, -44(%rbp)
	movq	_MDIO_REG_BANK_CL73_IEEEB0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MDIO_CL73_IEEEB0_CL73_AN_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_CL22_WR_OVER_CL45
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MDIO_REG_BANK_COMBO_IEEE0,4,2  ## @MDIO_REG_BANK_COMBO_IEEE0
	.comm	_MDIO_COMBO_IEEE0_MII_CONTROL,4,2 ## @MDIO_COMBO_IEEE0_MII_CONTROL
	.comm	_SPEED_AUTO_NEG,8,3             ## @SPEED_AUTO_NEG
	.comm	_MDIO_COMBO_IEEO_MII_CONTROL_AN_EN,4,2 ## @MDIO_COMBO_IEEO_MII_CONTROL_AN_EN
	.comm	_MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN,4,2 ## @MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN
	.comm	_MDIO_REG_BANK_SERDES_DIGITAL,4,2 ## @MDIO_REG_BANK_SERDES_DIGITAL
	.comm	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1,4,2 ## @MDIO_SERDES_DIGITAL_A_1000X_CONTROL1
	.comm	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN,4,2 ## @MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN
	.comm	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT,4,2 ## @MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT
	.comm	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE,4,2 ## @MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE
	.comm	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET,4,2 ## @MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET
	.comm	_MDIO_REG_BANK_BAM_NEXT_PAGE,4,2 ## @MDIO_REG_BANK_BAM_NEXT_PAGE
	.comm	_MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL,4,2 ## @MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL
	.comm	_MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE,4,2 ## @MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE
	.comm	_MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN,4,2 ## @MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN
	.comm	_MDIO_REG_BANK_CL73_USERB0,4,2  ## @MDIO_REG_BANK_CL73_USERB0
	.comm	_MDIO_CL73_USERB0_CL73_UCTRL,4,2 ## @MDIO_CL73_USERB0_CL73_UCTRL
	.comm	_MDIO_CL73_USERB0_CL73_BAM_CTRL1,4,2 ## @MDIO_CL73_USERB0_CL73_BAM_CTRL1
	.comm	_MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN,4,2 ## @MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN
	.comm	_MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN,4,2 ## @MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN
	.comm	_MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN,4,2 ## @MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN
	.comm	_MDIO_REG_BANK_CL73_IEEEB1,4,2  ## @MDIO_REG_BANK_CL73_IEEEB1
	.comm	_MDIO_CL73_IEEEB1_AN_ADV2,4,2   ## @MDIO_CL73_IEEEB1_AN_ADV2
	.comm	_PORT_HW_CFG_SPEED_CAPABILITY_D0_10G,4,2 ## @PORT_HW_CFG_SPEED_CAPABILITY_D0_10G
	.comm	_MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4,4,2 ## @MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4
	.comm	_PORT_HW_CFG_SPEED_CAPABILITY_D0_1G,4,2 ## @PORT_HW_CFG_SPEED_CAPABILITY_D0_1G
	.comm	_MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX,4,2 ## @MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX
	.comm	_MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN,4,2 ## @MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN
	.comm	_MDIO_REG_BANK_CL73_IEEEB0,4,2  ## @MDIO_REG_BANK_CL73_IEEEB0
	.comm	_MDIO_CL73_IEEEB0_CL73_AN_CONTROL,4,2 ## @MDIO_CL73_IEEEB0_CL73_AN_CONTROL
	.no_dead_strip	_bnx2x_set_autoneg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_set_autoneg
_bnx2x_set_autoneg:                     ; @bnx2x_set_autoneg
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x3
	mov	x22, x2
	mov	x19, x0
	ldr	x20, [x1]
Lloh0:
	adrp	x24, _MDIO_REG_BANK_COMBO_IEEE0@GOTPAGE
Lloh1:
	ldr	x24, [x24, _MDIO_REG_BANK_COMBO_IEEE0@GOTPAGEOFF]
	ldr	w2, [x24]
Lloh2:
	adrp	x25, _MDIO_COMBO_IEEE0_MII_CONTROL@GOTPAGE
Lloh3:
	ldr	x25, [x25, _MDIO_COMBO_IEEE0_MII_CONTROL@GOTPAGEOFF]
	ldr	w3, [x25]
	add	x4, sp, #12
	mov	x0, x20
	mov	x1, x19
	bl	_CL22_RD_OVER_CL45
Lloh4:
	adrp	x23, _SPEED_AUTO_NEG@GOTPAGE
Lloh5:
	ldr	x23, [x23, _SPEED_AUTO_NEG@GOTPAGEOFF]
	ldr	x9, [x22]
	ldr	x10, [x23]
Lloh6:
	adrp	x8, _MDIO_COMBO_IEEO_MII_CONTROL_AN_EN@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MDIO_COMBO_IEEO_MII_CONTROL_AN_EN@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	x9, x10
	b.ne	LBB0_2
; %bb.1:
	ldr	w9, [sp, #12]
	orr	w4, w9, w8
	b	LBB0_3
LBB0_2:
Lloh9:
	adrp	x9, _MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN@GOTPAGE
Lloh10:
	ldr	x9, [x9, _MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [sp, #12]
	bic	w4, w9, w8
LBB0_3:
	str	w4, [sp, #12]
	ldr	w2, [x24]
	ldr	w3, [x25]
	mov	x0, x20
	mov	x1, x19
	bl	_CL22_WR_OVER_CL45
Lloh12:
	adrp	x24, _MDIO_REG_BANK_SERDES_DIGITAL@GOTPAGE
Lloh13:
	ldr	x24, [x24, _MDIO_REG_BANK_SERDES_DIGITAL@GOTPAGEOFF]
	ldr	w2, [x24]
Lloh14:
	adrp	x25, _MDIO_SERDES_DIGITAL_A_1000X_CONTROL1@GOTPAGE
Lloh15:
	ldr	x25, [x25, _MDIO_SERDES_DIGITAL_A_1000X_CONTROL1@GOTPAGEOFF]
	ldr	w3, [x25]
	add	x4, sp, #12
	mov	x0, x20
	mov	x1, x19
	bl	_CL22_RD_OVER_CL45
Lloh16:
	adrp	x8, _MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN@GOTPAGE
Lloh17:
	ldr	x8, [x8, _MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
Lloh19:
	adrp	x9, _MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT@GOTPAGE
Lloh20:
	ldr	x9, [x9, _MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [sp, #12]
	bic	w8, w9, w8
Lloh22:
	adrp	x9, _MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE@GOTPAGE
Lloh23:
	ldr	x9, [x9, _MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	x9, [x22]
	ldr	x10, [x23]
Lloh25:
	adrp	x11, _MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET@GOTPAGE
Lloh26:
	ldr	x11, [x11, _MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET@GOTPAGEOFF]
Lloh27:
	ldr	w11, [x11]
	bic	w12, w8, w11
	orr	w8, w11, w8
	cmp	x9, x10
	csel	w4, w8, w12, eq
	str	w4, [sp, #12]
	ldr	w2, [x24]
	ldr	w3, [x25]
	mov	x0, x20
	mov	x1, x19
	bl	_CL22_WR_OVER_CL45
Lloh28:
	adrp	x24, _MDIO_REG_BANK_BAM_NEXT_PAGE@GOTPAGE
Lloh29:
	ldr	x24, [x24, _MDIO_REG_BANK_BAM_NEXT_PAGE@GOTPAGEOFF]
	ldr	w2, [x24]
Lloh30:
	adrp	x25, _MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL@GOTPAGE
Lloh31:
	ldr	x25, [x25, _MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL@GOTPAGEOFF]
	ldr	w3, [x25]
	add	x4, sp, #12
	mov	x0, x20
	mov	x1, x19
	bl	_CL22_RD_OVER_CL45
	ldr	x9, [x22]
	ldr	x10, [x23]
Lloh32:
	adrp	x8, _MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE@GOTPAGE
Lloh33:
	ldr	x8, [x8, _MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
Lloh35:
	adrp	x11, _MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN@GOTPAGE
Lloh36:
	ldr	x11, [x11, _MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN@GOTPAGEOFF]
Lloh37:
	ldr	w11, [x11]
	orr	w8, w11, w8
	cmp	x9, x10
	b.ne	LBB0_5
; %bb.4:
	ldr	w9, [sp, #12]
	orr	w4, w8, w9
	b	LBB0_6
LBB0_5:
	ldr	w9, [sp, #12]
	bic	w4, w9, w8
LBB0_6:
	str	w4, [sp, #12]
	ldr	w2, [x24]
	ldr	w3, [x25]
	mov	x0, x20
	mov	x1, x19
	bl	_CL22_WR_OVER_CL45
	cbz	x21, LBB0_11
; %bb.7:
Lloh38:
	adrp	x21, _MDIO_REG_BANK_CL73_USERB0@GOTPAGE
Lloh39:
	ldr	x21, [x21, _MDIO_REG_BANK_CL73_USERB0@GOTPAGEOFF]
	ldr	w2, [x21]
Lloh40:
	adrp	x8, _MDIO_CL73_USERB0_CL73_UCTRL@GOTPAGE
Lloh41:
	ldr	x8, [x8, _MDIO_CL73_USERB0_CL73_UCTRL@GOTPAGEOFF]
Lloh42:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w4, #14
	bl	_CL22_WR_OVER_CL45
	ldr	w2, [x21]
Lloh43:
	adrp	x8, _MDIO_CL73_USERB0_CL73_BAM_CTRL1@GOTPAGE
Lloh44:
	ldr	x8, [x8, _MDIO_CL73_USERB0_CL73_BAM_CTRL1@GOTPAGEOFF]
Lloh45:
	ldr	w3, [x8]
Lloh46:
	adrp	x8, _MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN@GOTPAGE
Lloh47:
	ldr	x8, [x8, _MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
Lloh49:
	adrp	x9, _MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN@GOTPAGE
Lloh50:
	ldr	x9, [x9, _MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN@GOTPAGEOFF]
Lloh51:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh52:
	adrp	x9, _MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN@GOTPAGE
Lloh53:
	ldr	x9, [x9, _MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN@GOTPAGEOFF]
Lloh54:
	ldr	w9, [x9]
	orr	w4, w8, w9
	mov	x0, x20
	mov	x1, x19
	bl	_CL22_WR_OVER_CL45
Lloh55:
	adrp	x21, _MDIO_REG_BANK_CL73_IEEEB1@GOTPAGE
Lloh56:
	ldr	x21, [x21, _MDIO_REG_BANK_CL73_IEEEB1@GOTPAGEOFF]
	ldr	w2, [x21]
Lloh57:
	adrp	x22, _MDIO_CL73_IEEEB1_AN_ADV2@GOTPAGE
Lloh58:
	ldr	x22, [x22, _MDIO_CL73_IEEEB1_AN_ADV2@GOTPAGEOFF]
	ldr	w3, [x22]
	add	x4, sp, #12
	mov	x0, x20
	mov	x1, x19
	bl	_CL22_RD_OVER_CL45
	ldr	w8, [x19]
Lloh59:
	adrp	x9, _PORT_HW_CFG_SPEED_CAPABILITY_D0_10G@GOTPAGE
Lloh60:
	ldr	x9, [x9, _PORT_HW_CFG_SPEED_CAPABILITY_D0_10G@GOTPAGEOFF]
Lloh61:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.8:
Lloh62:
	adrp	x9, _MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4@GOTPAGE
Lloh63:
	ldr	x9, [x9, _MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4@GOTPAGEOFF]
Lloh64:
	ldr	w9, [x9]
	ldr	w10, [sp, #12]
	orr	w9, w10, w9
	str	w9, [sp, #12]
LBB0_9:
Lloh65:
	adrp	x9, _PORT_HW_CFG_SPEED_CAPABILITY_D0_1G@GOTPAGE
Lloh66:
	ldr	x9, [x9, _PORT_HW_CFG_SPEED_CAPABILITY_D0_1G@GOTPAGEOFF]
Lloh67:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_12
; %bb.10:
Lloh68:
	adrp	x8, _MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX@GOTPAGE
Lloh69:
	ldr	x8, [x8, _MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX@GOTPAGEOFF]
Lloh70:
	ldr	w8, [x8]
	ldr	w9, [sp, #12]
	orr	w4, w9, w8
	str	w4, [sp, #12]
	b	LBB0_13
LBB0_11:
	mov	w4, #0
	b	LBB0_14
LBB0_12:
	ldr	w4, [sp, #12]
LBB0_13:
	ldr	w2, [x21]
	ldr	w3, [x22]
	mov	x0, x20
	mov	x1, x19
	bl	_CL22_WR_OVER_CL45
Lloh71:
	adrp	x8, _MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN@GOTPAGE
Lloh72:
	ldr	x8, [x8, _MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN@GOTPAGEOFF]
Lloh73:
	ldr	w4, [x8]
LBB0_14:
	str	w4, [sp, #12]
Lloh74:
	adrp	x8, _MDIO_REG_BANK_CL73_IEEEB0@GOTPAGE
Lloh75:
	ldr	x8, [x8, _MDIO_REG_BANK_CL73_IEEEB0@GOTPAGEOFF]
Lloh76:
	ldr	w2, [x8]
Lloh77:
	adrp	x8, _MDIO_CL73_IEEEB0_CL73_AN_CONTROL@GOTPAGE
Lloh78:
	ldr	x8, [x8, _MDIO_CL73_IEEEB0_CL73_AN_CONTROL@GOTPAGEOFF]
Lloh79:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_CL22_WR_OVER_CL45
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.cfi_endproc
                                        ; -- End function
	.comm	_MDIO_REG_BANK_COMBO_IEEE0,4,2  ; @MDIO_REG_BANK_COMBO_IEEE0
	.comm	_MDIO_COMBO_IEEE0_MII_CONTROL,4,2 ; @MDIO_COMBO_IEEE0_MII_CONTROL
	.comm	_SPEED_AUTO_NEG,8,3             ; @SPEED_AUTO_NEG
	.comm	_MDIO_COMBO_IEEO_MII_CONTROL_AN_EN,4,2 ; @MDIO_COMBO_IEEO_MII_CONTROL_AN_EN
	.comm	_MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN,4,2 ; @MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN
	.comm	_MDIO_REG_BANK_SERDES_DIGITAL,4,2 ; @MDIO_REG_BANK_SERDES_DIGITAL
	.comm	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1,4,2 ; @MDIO_SERDES_DIGITAL_A_1000X_CONTROL1
	.comm	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN,4,2 ; @MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN
	.comm	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT,4,2 ; @MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT
	.comm	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE,4,2 ; @MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE
	.comm	_MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET,4,2 ; @MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET
	.comm	_MDIO_REG_BANK_BAM_NEXT_PAGE,4,2 ; @MDIO_REG_BANK_BAM_NEXT_PAGE
	.comm	_MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL,4,2 ; @MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL
	.comm	_MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE,4,2 ; @MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE
	.comm	_MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN,4,2 ; @MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN
	.comm	_MDIO_REG_BANK_CL73_USERB0,4,2  ; @MDIO_REG_BANK_CL73_USERB0
	.comm	_MDIO_CL73_USERB0_CL73_UCTRL,4,2 ; @MDIO_CL73_USERB0_CL73_UCTRL
	.comm	_MDIO_CL73_USERB0_CL73_BAM_CTRL1,4,2 ; @MDIO_CL73_USERB0_CL73_BAM_CTRL1
	.comm	_MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN,4,2 ; @MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN
	.comm	_MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN,4,2 ; @MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN
	.comm	_MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN,4,2 ; @MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN
	.comm	_MDIO_REG_BANK_CL73_IEEEB1,4,2  ; @MDIO_REG_BANK_CL73_IEEEB1
	.comm	_MDIO_CL73_IEEEB1_AN_ADV2,4,2   ; @MDIO_CL73_IEEEB1_AN_ADV2
	.comm	_PORT_HW_CFG_SPEED_CAPABILITY_D0_10G,4,2 ; @PORT_HW_CFG_SPEED_CAPABILITY_D0_10G
	.comm	_MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4,4,2 ; @MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4
	.comm	_PORT_HW_CFG_SPEED_CAPABILITY_D0_1G,4,2 ; @PORT_HW_CFG_SPEED_CAPABILITY_D0_1G
	.comm	_MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX,4,2 ; @MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX
	.comm	_MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN,4,2 ; @MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN
	.comm	_MDIO_REG_BANK_CL73_IEEEB0,4,2  ; @MDIO_REG_BANK_CL73_IEEEB0
	.comm	_MDIO_CL73_IEEEB0_CL73_AN_CONTROL,4,2 ; @MDIO_CL73_IEEEB0_CL73_AN_CONTROL
	.no_dead_strip	_bnx2x_set_autoneg
.subsections_via_symbols
