	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cayman_cp_enable
_cayman_cp_enable:                      ## @cayman_cp_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	testl	%esi, %esi
	je	LBB0_1
## %bb.2:
	movq	_CP_ME_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
LBB0_1:
	movq	%rdi, %rbx
	movl	8(%rdi), %esi
	callq	_radeon_ttm_set_active_vram_size
	movq	_CP_ME_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_CP_ME_HALT@GOTPCREL(%rip), %rax
	movq	_CP_PFP_HALT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	callq	_WREG32
	movq	_SCRATCH_UMSK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	(%rbx), %rax
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	$0, (%rax,%rcx,4)
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CP_ME_CNTL,4,2                 ## @CP_ME_CNTL
	.comm	_CP_ME_HALT,4,2                 ## @CP_ME_HALT
	.comm	_CP_PFP_HALT,4,2                ## @CP_PFP_HALT
	.comm	_SCRATCH_UMSK,4,2               ## @SCRATCH_UMSK
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
	.no_dead_strip	_cayman_cp_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cayman_cp_enable
_cayman_cp_enable:                      ; @cayman_cp_enable
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	cbz	w1, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _CP_ME_CNTL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CP_ME_CNTL@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	w1, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_WREG32
LBB0_2:
	mov	x19, x0
	ldr	w1, [x0, #8]
	bl	_radeon_ttm_set_active_vram_size
Lloh3:
	adrp	x8, _CP_ME_CNTL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CP_ME_CNTL@GOTPAGEOFF]
Lloh5:
	adrp	x9, _CP_ME_HALT@GOTPAGE
Lloh6:
	ldr	x9, [x9, _CP_ME_HALT@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
Lloh8:
	ldr	w8, [x9]
Lloh9:
	adrp	x9, _CP_PFP_HALT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _CP_PFP_HALT@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_WREG32
Lloh12:
	adrp	x8, _SCRATCH_UMSK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SCRATCH_UMSK@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
	ldr	x8, [x19]
Lloh15:
	adrp	x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh16:
	ldr	x9, [x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
	str	wzr, [x8, x9, lsl #2]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_CP_ME_CNTL,4,2                 ; @CP_ME_CNTL
	.comm	_CP_ME_HALT,4,2                 ; @CP_ME_HALT
	.comm	_CP_PFP_HALT,4,2                ; @CP_PFP_HALT
	.comm	_SCRATCH_UMSK,4,2               ; @SCRATCH_UMSK
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
	.no_dead_strip	_cayman_cp_enable
.subsections_via_symbols
