	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_set_swap_lanes
_bnx2x_set_swap_lanes:                  ## @bnx2x_set_swap_lanes
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdi), %ebx
	movq	_PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%ebx, %eax
	movq	_PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movq	_PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %ebx
	movq	_PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %ebx
	movq	%rsi, %r14
	movq	8(%rdi), %r15
	movq	_MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r8d
	orl	%eax, %r8d
	movq	_MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r8d
	xorl	%r12d, %r12d
	cmpl	$27, %eax
	movq	_MDIO_REG_BANK_XGXS_BLOCK2@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	movq	_MDIO_XGXS_BLOCK2_RX_LN_SWAP@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	cmovel	%r12d, %r8d
	movq	%r15, %rdi
	callq	_CL22_WR_OVER_CL45
	movq	_MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	orl	%ebx, %r8d
	cmpl	$27, %ebx
	movl	(%r13), %edx
	movq	_MDIO_XGXS_BLOCK2_TX_LN_SWAP@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	cmovel	%r12d, %r8d
	movq	%r15, %rdi
	movq	%r14, %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_CL22_WR_OVER_CL45              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK,4,2 ## @PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT,4,2 ## @PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK,4,2 ## @PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT,4,2 ## @PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT
	.comm	_MDIO_REG_BANK_XGXS_BLOCK2,4,2  ## @MDIO_REG_BANK_XGXS_BLOCK2
	.comm	_MDIO_XGXS_BLOCK2_RX_LN_SWAP,4,2 ## @MDIO_XGXS_BLOCK2_RX_LN_SWAP
	.comm	_MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE,4,2 ## @MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE
	.comm	_MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE,4,2 ## @MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE
	.comm	_MDIO_XGXS_BLOCK2_TX_LN_SWAP,4,2 ## @MDIO_XGXS_BLOCK2_TX_LN_SWAP
	.comm	_MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE,4,2 ## @MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE
	.no_dead_strip	_bnx2x_set_swap_lanes
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_set_swap_lanes
_bnx2x_set_swap_lanes:                  ; @bnx2x_set_swap_lanes
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	ldr	x20, [x0, #8]
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	and	w9, w9, w8
Lloh3:
	adrp	x10, _PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT@GOTPAGE
Lloh4:
	ldr	x10, [x10, _PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	asr	w9, w9, w10
Lloh6:
	adrp	x10, _PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK@GOTPAGE
Lloh7:
	ldr	x10, [x10, _PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
	and	w8, w10, w8
Lloh9:
	adrp	x10, _PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT@GOTPAGE
Lloh10:
	ldr	x10, [x10, _PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	asr	w21, w8, w10
Lloh12:
	adrp	x22, _MDIO_REG_BANK_XGXS_BLOCK2@GOTPAGE
Lloh13:
	ldr	x22, [x22, _MDIO_REG_BANK_XGXS_BLOCK2@GOTPAGEOFF]
Lloh14:
	adrp	x8, _MDIO_XGXS_BLOCK2_RX_LN_SWAP@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MDIO_XGXS_BLOCK2_RX_LN_SWAP@GOTPAGEOFF]
	ldr	w2, [x22]
Lloh16:
	ldr	w3, [x8]
Lloh17:
	adrp	x8, _MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	orr	w8, w8, w9
Lloh20:
	adrp	x10, _MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE@GOTPAGE
Lloh21:
	ldr	x10, [x10, _MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE@GOTPAGEOFF]
Lloh22:
	ldr	w10, [x10]
	orr	w8, w8, w10
	cmp	w9, #27
	csel	w4, wzr, w8, eq
	mov	x0, x20
	bl	_CL22_WR_OVER_CL45
	ldr	w2, [x22]
Lloh23:
	adrp	x8, _MDIO_XGXS_BLOCK2_TX_LN_SWAP@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MDIO_XGXS_BLOCK2_TX_LN_SWAP@GOTPAGEOFF]
Lloh25:
	ldr	w3, [x8]
Lloh26:
	adrp	x8, _MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	orr	w8, w8, w21
	cmp	w21, #27
	csel	w4, wzr, w8, eq
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_CL22_WR_OVER_CL45
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK,4,2 ; @PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT,4,2 ; @PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK,4,2 ; @PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT,4,2 ; @PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT
	.comm	_MDIO_REG_BANK_XGXS_BLOCK2,4,2  ; @MDIO_REG_BANK_XGXS_BLOCK2
	.comm	_MDIO_XGXS_BLOCK2_RX_LN_SWAP,4,2 ; @MDIO_XGXS_BLOCK2_RX_LN_SWAP
	.comm	_MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE,4,2 ; @MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE
	.comm	_MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE,4,2 ; @MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE
	.comm	_MDIO_XGXS_BLOCK2_TX_LN_SWAP,4,2 ; @MDIO_XGXS_BLOCK2_TX_LN_SWAP
	.comm	_MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE,4,2 ; @MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE
	.no_dead_strip	_bnx2x_set_swap_lanes
.subsections_via_symbols
