	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vmx_vcpu_reset
_vmx_vcpu_reset:                        ## @vmx_vcpu_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_to_vmx
	movq	%rax, %r15
	movq	_VCPU_REGS_RIP@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	movq	_VCPU_REGS_RSP@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$1, %edx
	shll	%cl, %edx
	btsl	%eax, %edx
	notl	%edx
	movl	%edx, 16(%r14)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 48(%r15)
	xorl	%r13d, %r13d
	xorl	%eax, %eax
	callq	_get_rdx_init_val
	leaq	16(%r15), %r12
	movq	32(%r15), %rcx
	movq	_VCPU_REGS_RDX@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movl	%eax, (%rcx,%rdx,4)
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_kvm_set_cr8
	movq	_MSR_IA32_APICBASE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	%r12, %rdi
	callq	_kvm_vcpu_is_bsp
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_MSR_IA32_APICBASE_BSP@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
LBB0_2:
	orl	%r13d, %ebx
	orl	$-18874368, %ebx                ## imm = 0xFEE00000
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_kvm_set_apic_base
	movq	%r12, %rdi
	callq	_fx_init
	movq	_VCPU_SREG_CS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_seg_setup
	movq	%r12, %rdi
	callq	_kvm_vcpu_is_bsp
	movq	_GUEST_CS_SELECTOR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movl	$61440, %esi                    ## imm = 0xF000
	callq	_vmcs_write16
	movq	_GUEST_CS_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$983040, %esi                   ## imm = 0xF0000
	jmp	LBB0_5
LBB0_4:
	movl	(%r12), %esi
	shll	$8, %esi
	callq	_vmcs_write16
	movq	_GUEST_CS_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r12), %esi
	shll	$12, %esi
LBB0_5:
	callq	_vmcs_writel
	movq	_VCPU_SREG_DS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_seg_setup
	movq	_VCPU_SREG_ES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_seg_setup
	movq	_VCPU_SREG_FS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_seg_setup
	movq	_VCPU_SREG_GS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_seg_setup
	movq	_VCPU_SREG_SS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_seg_setup
	movq	_GUEST_TR_SELECTOR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	_vmcs_write16
	movq	_GUEST_TR_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_writel
	movq	_GUEST_TR_LIMIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$65535, %esi                    ## imm = 0xFFFF
	callq	_vmcs_write32
	movq	_GUEST_TR_AR_BYTES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$139, %esi
	callq	_vmcs_write32
	movq	_GUEST_LDTR_SELECTOR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_write16
	movq	_GUEST_LDTR_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_writel
	movq	_GUEST_LDTR_LIMIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$65535, %esi                    ## imm = 0xFFFF
	callq	_vmcs_write32
	movq	_GUEST_LDTR_AR_BYTES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$130, %esi
	callq	_vmcs_write32
	movq	_GUEST_SYSENTER_CS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_write32
	movq	_GUEST_SYSENTER_ESP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_writel
	movq	_GUEST_SYSENTER_EIP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_writel
	movq	_GUEST_RFLAGS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$2, %esi
	callq	_vmcs_writel
	movq	%r12, %rdi
	callq	_kvm_vcpu_is_bsp
	testq	%rax, %rax
	movl	$65520, %esi                    ## imm = 0xFFF0
	cmovel	%ebx, %esi
	movq	%r14, %rdi
	callq	_kvm_rip_write
	movq	_VCPU_REGS_RSP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_kvm_register_write
	movq	_GUEST_DR7@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1024, %esi                     ## imm = 0x400
	callq	_vmcs_writel
	movq	_GUEST_GDTR_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_writel
	movq	_GUEST_GDTR_LIMIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$65535, %esi                    ## imm = 0xFFFF
	callq	_vmcs_write32
	movq	_GUEST_IDTR_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_writel
	movq	_GUEST_IDTR_LIMIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$65535, %esi                    ## imm = 0xFFFF
	callq	_vmcs_write32
	movq	_GUEST_ACTIVITY_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_GUEST_ACTIVITY_ACTIVE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_vmcs_write32
	movq	_GUEST_INTERRUPTIBILITY_INFO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_write32
	movq	_GUEST_PENDING_DBG_EXCEPTIONS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_write32
	movq	_GUEST_IA32_DEBUGCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_write64
	movq	%r15, %rdi
	callq	_setup_msrs
	movq	_VM_ENTRY_INTR_INFO_FIELD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_write32
	xorl	%eax, %eax
	callq	_cpu_has_vmx_tpr_shadow
	testq	%rax, %rax
	je	LBB0_9
## %bb.6:
	movq	_VIRTUAL_APIC_PAGE_ADDR@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_vmcs_write64
	movq	40(%r15), %rdi
	callq	_vm_need_tpr_shadow
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:
	movl	(%rbx), %ebx
	movq	24(%r15), %rax
	movl	(%rax), %edi
	callq	_page_to_phys
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_vmcs_write64
LBB0_8:
	movq	_TPR_THRESHOLD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_vmcs_write32
LBB0_9:
	movq	40(%r15), %rdi
	callq	_vm_need_virtualize_apic_accesses
	testq	%rax, %rax
	je	LBB0_11
## %bb.10:
	movq	_APIC_ACCESS_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	40(%r15), %rax
	movl	(%rax), %edi
	callq	_page_to_phys
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_vmcs_write64
LBB0_11:
	movl	(%r15), %esi
	testl	%esi, %esi
	je	LBB0_13
## %bb.12:
	movq	_VIRTUAL_PROCESSOR_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_vmcs_write16
LBB0_13:
	movq	_X86_CR0_NW@GOTPCREL(%rip), %rax
	movq	_X86_CR0_CD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_X86_CR0_ET@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	%ecx, 20(%r15)
	movq	8(%r14), %rdi
	callq	_srcu_read_lock
	movl	%eax, (%r14)
	movq	%r14, %rdi
	callq	_kvm_read_cr0
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_vmx_set_cr0
	movq	8(%r14), %rdi
	movl	(%r14), %esi
	callq	_srcu_read_unlock
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_vmx_set_cr4
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_vmx_set_efer
	movq	%r12, %rdi
	callq	_vmx_fpu_activate
	movq	%r12, %rdi
	callq	_update_exception_bitmap
	movq	%r15, %rdi
	callq	_vpid_sync_vcpu_all
	movq	$0, 8(%r15)
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VCPU_REGS_RIP,4,2              ## @VCPU_REGS_RIP
	.comm	_VCPU_REGS_RSP,4,2              ## @VCPU_REGS_RSP
	.comm	_VCPU_REGS_RDX,8,3              ## @VCPU_REGS_RDX
	.comm	_MSR_IA32_APICBASE_ENABLE,4,2   ## @MSR_IA32_APICBASE_ENABLE
	.comm	_MSR_IA32_APICBASE_BSP,4,2      ## @MSR_IA32_APICBASE_BSP
	.comm	_VCPU_SREG_CS,4,2               ## @VCPU_SREG_CS
	.comm	_GUEST_CS_SELECTOR,4,2          ## @GUEST_CS_SELECTOR
	.comm	_GUEST_CS_BASE,4,2              ## @GUEST_CS_BASE
	.comm	_VCPU_SREG_DS,4,2               ## @VCPU_SREG_DS
	.comm	_VCPU_SREG_ES,4,2               ## @VCPU_SREG_ES
	.comm	_VCPU_SREG_FS,4,2               ## @VCPU_SREG_FS
	.comm	_VCPU_SREG_GS,4,2               ## @VCPU_SREG_GS
	.comm	_VCPU_SREG_SS,4,2               ## @VCPU_SREG_SS
	.comm	_GUEST_TR_SELECTOR,4,2          ## @GUEST_TR_SELECTOR
	.comm	_GUEST_TR_BASE,4,2              ## @GUEST_TR_BASE
	.comm	_GUEST_TR_LIMIT,4,2             ## @GUEST_TR_LIMIT
	.comm	_GUEST_TR_AR_BYTES,4,2          ## @GUEST_TR_AR_BYTES
	.comm	_GUEST_LDTR_SELECTOR,4,2        ## @GUEST_LDTR_SELECTOR
	.comm	_GUEST_LDTR_BASE,4,2            ## @GUEST_LDTR_BASE
	.comm	_GUEST_LDTR_LIMIT,4,2           ## @GUEST_LDTR_LIMIT
	.comm	_GUEST_LDTR_AR_BYTES,4,2        ## @GUEST_LDTR_AR_BYTES
	.comm	_GUEST_SYSENTER_CS,4,2          ## @GUEST_SYSENTER_CS
	.comm	_GUEST_SYSENTER_ESP,4,2         ## @GUEST_SYSENTER_ESP
	.comm	_GUEST_SYSENTER_EIP,4,2         ## @GUEST_SYSENTER_EIP
	.comm	_GUEST_RFLAGS,4,2               ## @GUEST_RFLAGS
	.comm	_GUEST_DR7,4,2                  ## @GUEST_DR7
	.comm	_GUEST_GDTR_BASE,4,2            ## @GUEST_GDTR_BASE
	.comm	_GUEST_GDTR_LIMIT,4,2           ## @GUEST_GDTR_LIMIT
	.comm	_GUEST_IDTR_BASE,4,2            ## @GUEST_IDTR_BASE
	.comm	_GUEST_IDTR_LIMIT,4,2           ## @GUEST_IDTR_LIMIT
	.comm	_GUEST_ACTIVITY_STATE,4,2       ## @GUEST_ACTIVITY_STATE
	.comm	_GUEST_ACTIVITY_ACTIVE,4,2      ## @GUEST_ACTIVITY_ACTIVE
	.comm	_GUEST_INTERRUPTIBILITY_INFO,4,2 ## @GUEST_INTERRUPTIBILITY_INFO
	.comm	_GUEST_PENDING_DBG_EXCEPTIONS,4,2 ## @GUEST_PENDING_DBG_EXCEPTIONS
	.comm	_GUEST_IA32_DEBUGCTL,4,2        ## @GUEST_IA32_DEBUGCTL
	.comm	_VM_ENTRY_INTR_INFO_FIELD,4,2   ## @VM_ENTRY_INTR_INFO_FIELD
	.comm	_VIRTUAL_APIC_PAGE_ADDR,4,2     ## @VIRTUAL_APIC_PAGE_ADDR
	.comm	_TPR_THRESHOLD,4,2              ## @TPR_THRESHOLD
	.comm	_APIC_ACCESS_ADDR,4,2           ## @APIC_ACCESS_ADDR
	.comm	_VIRTUAL_PROCESSOR_ID,4,2       ## @VIRTUAL_PROCESSOR_ID
	.comm	_X86_CR0_NW,4,2                 ## @X86_CR0_NW
	.comm	_X86_CR0_CD,4,2                 ## @X86_CR0_CD
	.comm	_X86_CR0_ET,4,2                 ## @X86_CR0_ET
	.no_dead_strip	_vmx_vcpu_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vmx_vcpu_reset
_vmx_vcpu_reset:                        ; @vmx_vcpu_reset
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x0
	bl	_to_vmx
	mov	x19, x0
Lloh0:
	adrp	x8, _VCPU_REGS_RIP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VCPU_REGS_RIP@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	mov	w9, #1
	lsl	w8, w9, w8
Lloh3:
	adrp	x22, _VCPU_REGS_RSP@GOTPAGE
Lloh4:
	ldr	x22, [x22, _VCPU_REGS_RSP@GOTPAGEOFF]
	ldr	w10, [x22]
	lsl	w9, w9, w10
	orr	w8, w9, w8
	mvn	w8, w8
	str	w8, [x20, #16]
	stp	xzr, xzr, [x0, #48]
	bl	_get_rdx_init_val
	add	x21, x19, #16
	ldr	x8, [x19, #32]
Lloh5:
	adrp	x9, _VCPU_REGS_RDX@GOTPAGE
Lloh6:
	ldr	x9, [x9, _VCPU_REGS_RDX@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
	str	w0, [x8, x9, lsl #2]
	mov	x0, x21
	mov	w1, #0
	bl	_kvm_set_cr8
Lloh8:
	adrp	x8, _MSR_IA32_APICBASE_ENABLE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MSR_IA32_APICBASE_ENABLE@GOTPAGEOFF]
Lloh10:
	ldr	w23, [x8]
	mov	x0, x21
	bl	_kvm_vcpu_is_bsp
Lloh11:
	adrp	x8, _MSR_IA32_APICBASE_BSP@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MSR_IA32_APICBASE_BSP@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	cmp	x0, #0
	csel	w8, wzr, w8, eq
	orr	w8, w23, w8
	mov	w9, #-18874368
	orr	w1, w8, w9
	mov	x0, x21
	bl	_kvm_set_apic_base
	mov	x0, x21
	bl	_fx_init
Lloh14:
	adrp	x8, _VCPU_SREG_CS@GOTPAGE
Lloh15:
	ldr	x8, [x8, _VCPU_SREG_CS@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	bl	_seg_setup
	mov	x0, x21
	bl	_kvm_vcpu_is_bsp
	mov	x8, x0
Lloh17:
	adrp	x9, _GUEST_CS_SELECTOR@GOTPAGE
Lloh18:
	ldr	x9, [x9, _GUEST_CS_SELECTOR@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x9]
	cbz	x8, LBB0_2
; %bb.1:
	mov	w1, #61440
	bl	_vmcs_write16
Lloh20:
	adrp	x8, _GUEST_CS_BASE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _GUEST_CS_BASE@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	mov	w1, #983040
	b	LBB0_3
LBB0_2:
	ldr	w8, [x21]
	lsl	w1, w8, #8
	bl	_vmcs_write16
Lloh23:
	adrp	x8, _GUEST_CS_BASE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _GUEST_CS_BASE@GOTPAGEOFF]
Lloh25:
	ldr	w0, [x8]
	ldr	w8, [x21]
	lsl	w1, w8, #12
LBB0_3:
	bl	_vmcs_writel
Lloh26:
	adrp	x8, _VCPU_SREG_DS@GOTPAGE
Lloh27:
	ldr	x8, [x8, _VCPU_SREG_DS@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
	bl	_seg_setup
Lloh29:
	adrp	x8, _VCPU_SREG_ES@GOTPAGE
Lloh30:
	ldr	x8, [x8, _VCPU_SREG_ES@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	bl	_seg_setup
Lloh32:
	adrp	x8, _VCPU_SREG_FS@GOTPAGE
Lloh33:
	ldr	x8, [x8, _VCPU_SREG_FS@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
	bl	_seg_setup
Lloh35:
	adrp	x8, _VCPU_SREG_GS@GOTPAGE
Lloh36:
	ldr	x8, [x8, _VCPU_SREG_GS@GOTPAGEOFF]
Lloh37:
	ldr	w0, [x8]
	bl	_seg_setup
Lloh38:
	adrp	x8, _VCPU_SREG_SS@GOTPAGE
Lloh39:
	ldr	x8, [x8, _VCPU_SREG_SS@GOTPAGEOFF]
Lloh40:
	ldr	w0, [x8]
	bl	_seg_setup
Lloh41:
	adrp	x8, _GUEST_TR_SELECTOR@GOTPAGE
Lloh42:
	ldr	x8, [x8, _GUEST_TR_SELECTOR@GOTPAGEOFF]
Lloh43:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_write16
Lloh44:
	adrp	x8, _GUEST_TR_BASE@GOTPAGE
Lloh45:
	ldr	x8, [x8, _GUEST_TR_BASE@GOTPAGEOFF]
Lloh46:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_writel
Lloh47:
	adrp	x8, _GUEST_TR_LIMIT@GOTPAGE
Lloh48:
	ldr	x8, [x8, _GUEST_TR_LIMIT@GOTPAGEOFF]
Lloh49:
	ldr	w0, [x8]
	mov	w1, #65535
	bl	_vmcs_write32
Lloh50:
	adrp	x8, _GUEST_TR_AR_BYTES@GOTPAGE
Lloh51:
	ldr	x8, [x8, _GUEST_TR_AR_BYTES@GOTPAGEOFF]
Lloh52:
	ldr	w0, [x8]
	mov	w1, #139
	bl	_vmcs_write32
Lloh53:
	adrp	x8, _GUEST_LDTR_SELECTOR@GOTPAGE
Lloh54:
	ldr	x8, [x8, _GUEST_LDTR_SELECTOR@GOTPAGEOFF]
Lloh55:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_write16
Lloh56:
	adrp	x8, _GUEST_LDTR_BASE@GOTPAGE
Lloh57:
	ldr	x8, [x8, _GUEST_LDTR_BASE@GOTPAGEOFF]
Lloh58:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_writel
Lloh59:
	adrp	x8, _GUEST_LDTR_LIMIT@GOTPAGE
Lloh60:
	ldr	x8, [x8, _GUEST_LDTR_LIMIT@GOTPAGEOFF]
Lloh61:
	ldr	w0, [x8]
	mov	w1, #65535
	bl	_vmcs_write32
Lloh62:
	adrp	x8, _GUEST_LDTR_AR_BYTES@GOTPAGE
Lloh63:
	ldr	x8, [x8, _GUEST_LDTR_AR_BYTES@GOTPAGEOFF]
Lloh64:
	ldr	w0, [x8]
	mov	w1, #130
	bl	_vmcs_write32
Lloh65:
	adrp	x8, _GUEST_SYSENTER_CS@GOTPAGE
Lloh66:
	ldr	x8, [x8, _GUEST_SYSENTER_CS@GOTPAGEOFF]
Lloh67:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_write32
Lloh68:
	adrp	x8, _GUEST_SYSENTER_ESP@GOTPAGE
Lloh69:
	ldr	x8, [x8, _GUEST_SYSENTER_ESP@GOTPAGEOFF]
Lloh70:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_writel
Lloh71:
	adrp	x8, _GUEST_SYSENTER_EIP@GOTPAGE
Lloh72:
	ldr	x8, [x8, _GUEST_SYSENTER_EIP@GOTPAGEOFF]
Lloh73:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_writel
Lloh74:
	adrp	x8, _GUEST_RFLAGS@GOTPAGE
Lloh75:
	ldr	x8, [x8, _GUEST_RFLAGS@GOTPAGEOFF]
Lloh76:
	ldr	w0, [x8]
	mov	w1, #2
	bl	_vmcs_writel
	mov	x0, x21
	bl	_kvm_vcpu_is_bsp
	cmp	x0, #0
	mov	w8, #65520
	csel	w1, wzr, w8, eq
	mov	x0, x20
	bl	_kvm_rip_write
	ldr	w1, [x22]
	mov	x0, x20
	mov	w2, #0
	bl	_kvm_register_write
Lloh77:
	adrp	x8, _GUEST_DR7@GOTPAGE
Lloh78:
	ldr	x8, [x8, _GUEST_DR7@GOTPAGEOFF]
Lloh79:
	ldr	w0, [x8]
	mov	w1, #1024
	bl	_vmcs_writel
Lloh80:
	adrp	x8, _GUEST_GDTR_BASE@GOTPAGE
Lloh81:
	ldr	x8, [x8, _GUEST_GDTR_BASE@GOTPAGEOFF]
Lloh82:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_writel
Lloh83:
	adrp	x8, _GUEST_GDTR_LIMIT@GOTPAGE
Lloh84:
	ldr	x8, [x8, _GUEST_GDTR_LIMIT@GOTPAGEOFF]
Lloh85:
	ldr	w0, [x8]
	mov	w1, #65535
	bl	_vmcs_write32
Lloh86:
	adrp	x8, _GUEST_IDTR_BASE@GOTPAGE
Lloh87:
	ldr	x8, [x8, _GUEST_IDTR_BASE@GOTPAGEOFF]
Lloh88:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_writel
Lloh89:
	adrp	x8, _GUEST_IDTR_LIMIT@GOTPAGE
Lloh90:
	ldr	x8, [x8, _GUEST_IDTR_LIMIT@GOTPAGEOFF]
Lloh91:
	ldr	w0, [x8]
	mov	w1, #65535
	bl	_vmcs_write32
Lloh92:
	adrp	x8, _GUEST_ACTIVITY_STATE@GOTPAGE
Lloh93:
	ldr	x8, [x8, _GUEST_ACTIVITY_STATE@GOTPAGEOFF]
Lloh94:
	ldr	w0, [x8]
Lloh95:
	adrp	x8, _GUEST_ACTIVITY_ACTIVE@GOTPAGE
Lloh96:
	ldr	x8, [x8, _GUEST_ACTIVITY_ACTIVE@GOTPAGEOFF]
Lloh97:
	ldr	w1, [x8]
	bl	_vmcs_write32
Lloh98:
	adrp	x8, _GUEST_INTERRUPTIBILITY_INFO@GOTPAGE
Lloh99:
	ldr	x8, [x8, _GUEST_INTERRUPTIBILITY_INFO@GOTPAGEOFF]
Lloh100:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_write32
Lloh101:
	adrp	x8, _GUEST_PENDING_DBG_EXCEPTIONS@GOTPAGE
Lloh102:
	ldr	x8, [x8, _GUEST_PENDING_DBG_EXCEPTIONS@GOTPAGEOFF]
Lloh103:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_write32
Lloh104:
	adrp	x8, _GUEST_IA32_DEBUGCTL@GOTPAGE
Lloh105:
	ldr	x8, [x8, _GUEST_IA32_DEBUGCTL@GOTPAGEOFF]
Lloh106:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_write64
	mov	x0, x19
	bl	_setup_msrs
Lloh107:
	adrp	x8, _VM_ENTRY_INTR_INFO_FIELD@GOTPAGE
Lloh108:
	ldr	x8, [x8, _VM_ENTRY_INTR_INFO_FIELD@GOTPAGEOFF]
Lloh109:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_write32
	bl	_cpu_has_vmx_tpr_shadow
	cbz	x0, LBB0_7
; %bb.4:
Lloh110:
	adrp	x22, _VIRTUAL_APIC_PAGE_ADDR@GOTPAGE
Lloh111:
	ldr	x22, [x22, _VIRTUAL_APIC_PAGE_ADDR@GOTPAGEOFF]
	ldr	w0, [x22]
	mov	w1, #0
	bl	_vmcs_write64
	ldr	x0, [x19, #40]
	bl	_vm_need_tpr_shadow
	cbz	x0, LBB0_6
; %bb.5:
	ldr	w22, [x22]
	ldr	x8, [x19, #24]
	ldr	w0, [x8]
	bl	_page_to_phys
	mov	x1, x0
	mov	x0, x22
	bl	_vmcs_write64
LBB0_6:
Lloh112:
	adrp	x8, _TPR_THRESHOLD@GOTPAGE
Lloh113:
	ldr	x8, [x8, _TPR_THRESHOLD@GOTPAGEOFF]
Lloh114:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_vmcs_write32
LBB0_7:
	ldr	x0, [x19, #40]
	bl	_vm_need_virtualize_apic_accesses
	cbz	x0, LBB0_9
; %bb.8:
Lloh115:
	adrp	x8, _APIC_ACCESS_ADDR@GOTPAGE
Lloh116:
	ldr	x8, [x8, _APIC_ACCESS_ADDR@GOTPAGEOFF]
Lloh117:
	ldr	w22, [x8]
	ldr	x8, [x19, #40]
	ldr	w0, [x8]
	bl	_page_to_phys
	mov	x1, x0
	mov	x0, x22
	bl	_vmcs_write64
LBB0_9:
	ldr	w1, [x19]
	cbz	w1, LBB0_11
; %bb.10:
Lloh118:
	adrp	x8, _VIRTUAL_PROCESSOR_ID@GOTPAGE
Lloh119:
	ldr	x8, [x8, _VIRTUAL_PROCESSOR_ID@GOTPAGEOFF]
Lloh120:
	ldr	w0, [x8]
	bl	_vmcs_write16
LBB0_11:
Lloh121:
	adrp	x8, _X86_CR0_NW@GOTPAGE
Lloh122:
	ldr	x8, [x8, _X86_CR0_NW@GOTPAGEOFF]
Lloh123:
	ldr	w8, [x8]
Lloh124:
	adrp	x9, _X86_CR0_CD@GOTPAGE
Lloh125:
	ldr	x9, [x9, _X86_CR0_CD@GOTPAGEOFF]
Lloh126:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh127:
	adrp	x9, _X86_CR0_ET@GOTPAGE
Lloh128:
	ldr	x9, [x9, _X86_CR0_ET@GOTPAGEOFF]
Lloh129:
	ldr	w9, [x9]
	orr	w8, w8, w9
	str	w8, [x19, #20]
	ldr	x0, [x20, #8]
	bl	_srcu_read_lock
	str	w0, [x20]
	mov	x0, x20
	bl	_kvm_read_cr0
	mov	x1, x0
	mov	x0, x21
	bl	_vmx_set_cr0
	ldr	x0, [x20, #8]
	ldr	w1, [x20]
	bl	_srcu_read_unlock
	mov	x0, x21
	mov	w1, #0
	bl	_vmx_set_cr4
	mov	x0, x21
	mov	w1, #0
	bl	_vmx_set_efer
	mov	x0, x21
	bl	_vmx_fpu_activate
	mov	x0, x21
	bl	_update_exception_bitmap
	mov	x0, x19
	bl	_vpid_sync_vcpu_all
	str	xzr, [x19, #8]
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh107, Lloh108, Lloh109
	.loh AdrpLdrGotLdr	Lloh104, Lloh105, Lloh106
	.loh AdrpLdrGotLdr	Lloh101, Lloh102, Lloh103
	.loh AdrpLdrGotLdr	Lloh98, Lloh99, Lloh100
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh97
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh110, Lloh111
	.loh AdrpLdrGotLdr	Lloh112, Lloh113, Lloh114
	.loh AdrpLdrGotLdr	Lloh115, Lloh116, Lloh117
	.loh AdrpLdrGotLdr	Lloh118, Lloh119, Lloh120
	.loh AdrpLdrGotLdr	Lloh127, Lloh128, Lloh129
	.loh AdrpLdrGotLdr	Lloh124, Lloh125, Lloh126
	.loh AdrpLdrGotLdr	Lloh121, Lloh122, Lloh123
	.cfi_endproc
                                        ; -- End function
	.comm	_VCPU_REGS_RIP,4,2              ; @VCPU_REGS_RIP
	.comm	_VCPU_REGS_RSP,4,2              ; @VCPU_REGS_RSP
	.comm	_VCPU_REGS_RDX,8,3              ; @VCPU_REGS_RDX
	.comm	_MSR_IA32_APICBASE_ENABLE,4,2   ; @MSR_IA32_APICBASE_ENABLE
	.comm	_MSR_IA32_APICBASE_BSP,4,2      ; @MSR_IA32_APICBASE_BSP
	.comm	_VCPU_SREG_CS,4,2               ; @VCPU_SREG_CS
	.comm	_GUEST_CS_SELECTOR,4,2          ; @GUEST_CS_SELECTOR
	.comm	_GUEST_CS_BASE,4,2              ; @GUEST_CS_BASE
	.comm	_VCPU_SREG_DS,4,2               ; @VCPU_SREG_DS
	.comm	_VCPU_SREG_ES,4,2               ; @VCPU_SREG_ES
	.comm	_VCPU_SREG_FS,4,2               ; @VCPU_SREG_FS
	.comm	_VCPU_SREG_GS,4,2               ; @VCPU_SREG_GS
	.comm	_VCPU_SREG_SS,4,2               ; @VCPU_SREG_SS
	.comm	_GUEST_TR_SELECTOR,4,2          ; @GUEST_TR_SELECTOR
	.comm	_GUEST_TR_BASE,4,2              ; @GUEST_TR_BASE
	.comm	_GUEST_TR_LIMIT,4,2             ; @GUEST_TR_LIMIT
	.comm	_GUEST_TR_AR_BYTES,4,2          ; @GUEST_TR_AR_BYTES
	.comm	_GUEST_LDTR_SELECTOR,4,2        ; @GUEST_LDTR_SELECTOR
	.comm	_GUEST_LDTR_BASE,4,2            ; @GUEST_LDTR_BASE
	.comm	_GUEST_LDTR_LIMIT,4,2           ; @GUEST_LDTR_LIMIT
	.comm	_GUEST_LDTR_AR_BYTES,4,2        ; @GUEST_LDTR_AR_BYTES
	.comm	_GUEST_SYSENTER_CS,4,2          ; @GUEST_SYSENTER_CS
	.comm	_GUEST_SYSENTER_ESP,4,2         ; @GUEST_SYSENTER_ESP
	.comm	_GUEST_SYSENTER_EIP,4,2         ; @GUEST_SYSENTER_EIP
	.comm	_GUEST_RFLAGS,4,2               ; @GUEST_RFLAGS
	.comm	_GUEST_DR7,4,2                  ; @GUEST_DR7
	.comm	_GUEST_GDTR_BASE,4,2            ; @GUEST_GDTR_BASE
	.comm	_GUEST_GDTR_LIMIT,4,2           ; @GUEST_GDTR_LIMIT
	.comm	_GUEST_IDTR_BASE,4,2            ; @GUEST_IDTR_BASE
	.comm	_GUEST_IDTR_LIMIT,4,2           ; @GUEST_IDTR_LIMIT
	.comm	_GUEST_ACTIVITY_STATE,4,2       ; @GUEST_ACTIVITY_STATE
	.comm	_GUEST_ACTIVITY_ACTIVE,4,2      ; @GUEST_ACTIVITY_ACTIVE
	.comm	_GUEST_INTERRUPTIBILITY_INFO,4,2 ; @GUEST_INTERRUPTIBILITY_INFO
	.comm	_GUEST_PENDING_DBG_EXCEPTIONS,4,2 ; @GUEST_PENDING_DBG_EXCEPTIONS
	.comm	_GUEST_IA32_DEBUGCTL,4,2        ; @GUEST_IA32_DEBUGCTL
	.comm	_VM_ENTRY_INTR_INFO_FIELD,4,2   ; @VM_ENTRY_INTR_INFO_FIELD
	.comm	_VIRTUAL_APIC_PAGE_ADDR,4,2     ; @VIRTUAL_APIC_PAGE_ADDR
	.comm	_TPR_THRESHOLD,4,2              ; @TPR_THRESHOLD
	.comm	_APIC_ACCESS_ADDR,4,2           ; @APIC_ACCESS_ADDR
	.comm	_VIRTUAL_PROCESSOR_ID,4,2       ; @VIRTUAL_PROCESSOR_ID
	.comm	_X86_CR0_NW,4,2                 ; @X86_CR0_NW
	.comm	_X86_CR0_CD,4,2                 ; @X86_CR0_CD
	.comm	_X86_CR0_ET,4,2                 ; @X86_CR0_ET
	.no_dead_strip	_vmx_vcpu_reset
.subsections_via_symbols
