	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_dp_mode_fixup            ## -- Begin function intel_dp_mode_fixup
	.p2align	4, 0x90
_intel_dp_mode_fixup:                   ## @intel_dp_mode_fixup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movq	%rsi, %r14
	movq	(%rdi), %r12
	callq	_enc_to_intel_dp
	movq	%rax, %r13
	movq	32(%rax), %rbx
	movl	24(%rax), %edi
	callq	_drm_dp_max_lane_count
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	%r13, %rdi
	callq	_intel_dp_max_link_bw
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	%r13, %rdi
	callq	_is_edp
	testq	%rax, %rax
	je	LBB0_3
## %bb.1:
	movq	8(%rbx), %rdi
	testq	%rdi, %rdi
	je	LBB0_3
## %bb.2:
	movq	%r15, %rsi
	callq	_intel_fixed_panel_mode
	movl	(%rbx), %esi
	movq	%r12, %rdi
	movq	%r14, %rdx
	movq	%r15, %rcx
	callq	_intel_pch_panel_fitting
LBB0_3:
	movq	_DRM_MODE_FLAG_DBLCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ebx, %ebx
	testl	%eax, (%r15)
	jne	LBB0_19
## %bb.4:
	xorl	%eax, %eax
	cmpq	$128, -56(%rbp)                 ## 8-byte Folded Reload
	sete	%al
	leaq	_intel_dp_mode_fixup.bws(%rip), %rcx
	movl	(%rcx,%rax,4), %edx
	movl	4(%r15), %ecx
	leaq	L_.str(%rip), %rdi
	xorl	%ebx, %ebx
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movq	%r13, %rdi
	movq	%r15, %rsi
	movl	$1, %edx
	callq	_intel_dp_adjust_dithering
	testl	%eax, %eax
	je	LBB0_19
## %bb.5:
	movq	_INTEL_MODE_DP_FORCE_6BPC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	8(%r15), %eax
	movl	$24, %ecx
	movl	$18, %r14d
	cmovel	%ecx, %r14d
	cmpq	$0, 16(%r13)
	je	LBB0_6
## %bb.7:
	testl	%eax, %eax
	jne	LBB0_20
## %bb.8:
	movq	%r15, %rdi
	callq	_drm_match_cea_mode
	cmpl	$2, %eax
	jl	LBB0_20
## %bb.9:
	movq	_DP_COLOR_RANGE_16_235@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 8(%r13)
	jmp	LBB0_10
LBB0_20:
	movq	$0, 8(%r13)
	jmp	LBB0_12
LBB0_6:
	movq	8(%r13), %rax
LBB0_10:
	testq	%rax, %rax
	je	LBB0_12
## %bb.11:
	movq	_INTEL_MODE_LIMITED_COLOR_RANGE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 8(%r15)
LBB0_12:
	xorl	%ebx, %ebx
	cmpq	$128, -56(%rbp)                 ## 8-byte Folded Reload
	sete	%bl
	movl	4(%r15), %edi
	movl	%r14d, -60(%rbp)                ## 4-byte Spill
	movl	%r14d, %esi
	callq	_intel_dp_link_required
	movl	%eax, %r12d
	incq	%rbx
	movq	%rbx, -88(%rbp)                 ## 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	%r15, -80(%rbp)                 ## 8-byte Spill
	movq	%r13, -72(%rbp)                 ## 8-byte Spill
	jmp	LBB0_13
	.p2align	4, 0x90
LBB0_18:                                ##   in Loop: Header=BB0_13 Depth=1
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	incq	%rcx
	xorl	%ebx, %ebx
	movq	%rcx, %rax
	movq	%rcx, -56(%rbp)                 ## 8-byte Spill
	cmpq	-88(%rbp), %rcx                 ## 8-byte Folded Reload
	je	LBB0_19
LBB0_13:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_15 Depth 2
	cmpl	$0, -44(%rbp)                   ## 4-byte Folded Reload
	jle	LBB0_18
## %bb.14:                              ##   in Loop: Header=BB0_13 Depth=1
	leaq	_intel_dp_mode_fixup.bws(%rip), %rax
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movl	(%rax,%rcx,4), %ebx
	movl	$1, %r14d
	.p2align	4, 0x90
LBB0_15:                                ##   Parent Loop BB0_13 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movl	%ebx, %edi
	callq	_drm_dp_bw_code_to_link_rate
	movl	%eax, %r13d
	movl	%eax, %edi
	movl	%r14d, %esi
	callq	_intel_dp_max_data_rate
	cmpl	%eax, %r12d
	jle	LBB0_16
## %bb.17:                              ##   in Loop: Header=BB0_15 Depth=2
	addl	%r14d, %r14d
	cmpl	-44(%rbp), %r14d                ## 4-byte Folded Reload
	jle	LBB0_15
	jmp	LBB0_18
LBB0_16:
	movl	%eax, %r15d
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	movl	%ebx, (%rax)
	movl	%r14d, 4(%rax)
	movq	-80(%rbp), %rax                 ## 8-byte Reload
	movl	%r13d, 4(%rax)
	leaq	L_.str.1(%rip), %rdi
	movl	%ebx, %esi
	movl	%r14d, %edx
	movl	%r13d, %ecx
	movl	-60(%rbp), %r8d                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	leaq	L_.str.2(%rip), %rdi
	movl	%r12d, %esi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movl	$1, %ebx
LBB0_19:
	movl	%ebx, %eax
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	2                               ## @intel_dp_mode_fixup.bws
_intel_dp_mode_fixup.bws:
	.long	129                             ## 0x81
	.long	128                             ## 0x80

	.comm	_DRM_MODE_FLAG_DBLCLK,4,2       ## @DRM_MODE_FLAG_DBLCLK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"DP link computation with max lane count %i max bw %02x pixel clock %iKHz\n"

	.comm	_INTEL_MODE_DP_FORCE_6BPC,4,2   ## @INTEL_MODE_DP_FORCE_6BPC
	.comm	_DP_COLOR_RANGE_16_235,8,3      ## @DP_COLOR_RANGE_16_235
	.comm	_INTEL_MODE_LIMITED_COLOR_RANGE,4,2 ## @INTEL_MODE_LIMITED_COLOR_RANGE
L_.str.1:                               ## @.str.1
	.asciz	"DP link bw %02x lane count %d clock %d bpp %d\n"

L_.str.2:                               ## @.str.2
	.asciz	"DP link bw required %i available %i\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_dp_mode_fixup            ; -- Begin function intel_dp_mode_fixup
	.p2align	2
_intel_dp_mode_fixup:                   ; @intel_dp_mode_fixup
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x2
	mov	x23, x1
	ldr	x24, [x0]
	bl	_enc_to_intel_dp
	mov	x20, x0
	ldr	x25, [x0, #32]
	ldr	w0, [x0, #24]
	bl	_drm_dp_max_lane_count
	mov	x21, x0
	mov	x0, x20
	bl	_intel_dp_max_link_bw
	mov	x22, x0
	mov	x0, x20
	bl	_is_edp
	cbz	x0, LBB0_3
; %bb.1:
	ldr	x0, [x25, #8]
	cbz	x0, LBB0_3
; %bb.2:
	mov	x1, x19
	bl	_intel_fixed_panel_mode
	ldr	w1, [x25]
	mov	x0, x24
	mov	x2, x23
	mov	x3, x19
	bl	_intel_pch_panel_fitting
LBB0_3:
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _DRM_MODE_FLAG_DBLCLK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _DRM_MODE_FLAG_DBLCLK@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_5
; %bb.4:
	mov	w0, #0
	b	LBB0_21
LBB0_5:
	cmp	x22, #128
	cset	w8, eq
Lloh3:
	adrp	x9, _intel_dp_mode_fixup.bws@PAGE
Lloh4:
	add	x9, x9, _intel_dp_mode_fixup.bws@PAGEOFF
	ldr	w2, [x9, w8, uxtw #2]
	ldr	w8, [x19, #4]
	str	x8, [sp]
Lloh5:
	adrp	x0, l_.str@PAGE
Lloh6:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x21
	bl	_DRM_DEBUG_KMS
	mov	x0, x20
	mov	x1, x19
	mov	w2, #1
	bl	_intel_dp_adjust_dithering
	cbz	w0, LBB0_21
; %bb.6:
	ldr	w8, [x19, #8]
Lloh7:
	adrp	x9, _INTEL_MODE_DP_FORCE_6BPC@GOTPAGE
Lloh8:
	ldr	x9, [x9, _INTEL_MODE_DP_FORCE_6BPC@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
	ands	w8, w9, w8
	mov	w9, #18
	mov	w10, #24
	csel	w23, w10, w9, eq
	ldr	x9, [x20, #16]
	cbz	x9, LBB0_11
; %bb.7:
	cbnz	w8, LBB0_10
; %bb.8:
	mov	x0, x19
	bl	_drm_match_cea_mode
	cmp	w0, #2
	b.lt	LBB0_10
; %bb.9:
Lloh10:
	adrp	x8, _DP_COLOR_RANGE_16_235@GOTPAGE
Lloh11:
	ldr	x8, [x8, _DP_COLOR_RANGE_16_235@GOTPAGEOFF]
Lloh12:
	ldr	x8, [x8]
	str	x8, [x20, #8]
	b	LBB0_12
LBB0_10:
	str	xzr, [x20, #8]
	b	LBB0_14
LBB0_11:
	ldr	x8, [x20, #8]
LBB0_12:
	cbz	x8, LBB0_14
; %bb.13:
Lloh13:
	adrp	x8, _INTEL_MODE_LIMITED_COLOR_RANGE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _INTEL_MODE_LIMITED_COLOR_RANGE@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	ldr	w9, [x19, #8]
	orr	w8, w9, w8
	str	w8, [x19, #8]
LBB0_14:
	ldr	w0, [x19, #4]
	str	x23, [sp, #24]                  ; 8-byte Folded Spill
	mov	x1, x23
	bl	_intel_dp_link_required
	mov	x24, x0
	mov	x28, #0
	cmp	x22, #128
	mov	w8, #1
	cinc	x23, x8, eq
	b	LBB0_16
LBB0_15:                                ;   in Loop: Header=BB0_16 Depth=1
	mov	w0, #0
	add	x28, x28, #1
	cmp	x28, x23
	b.eq	LBB0_21
LBB0_16:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_18 Depth 2
	cmp	w21, #1
	b.lt	LBB0_15
; %bb.17:                               ;   in Loop: Header=BB0_16 Depth=1
Lloh16:
	adrp	x8, _intel_dp_mode_fixup.bws@PAGE
Lloh17:
	add	x8, x8, _intel_dp_mode_fixup.bws@PAGEOFF
	ldr	w22, [x8, x28, lsl #2]
	mov	w25, #1
LBB0_18:                                ;   Parent Loop BB0_16 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	mov	x0, x22
	bl	_drm_dp_bw_code_to_link_rate
	mov	x27, x0
	mov	x1, x25
	bl	_intel_dp_max_data_rate
	cmp	w24, w0
	b.le	LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_18 Depth=2
	lsl	w25, w25, #1
	cmp	w25, w21
	b.le	LBB0_18
	b	LBB0_15
LBB0_20:
	mov	x26, x0
	stp	w22, w25, [x20]
	str	w27, [x19, #4]
	ldr	x8, [sp, #24]                   ; 8-byte Folded Reload
	stp	x27, x8, [sp]
Lloh18:
	adrp	x0, l_.str.1@PAGE
Lloh19:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	x1, x22
	mov	x2, x25
	bl	_DRM_DEBUG_KMS
Lloh20:
	adrp	x0, l_.str.2@PAGE
Lloh21:
	add	x0, x0, l_.str.2@PAGEOFF
	mov	x1, x24
	mov	x2, x26
	bl	_DRM_DEBUG_KMS
	mov	w0, #1
LBB0_21:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @intel_dp_mode_fixup.bws
_intel_dp_mode_fixup.bws:
	.long	129                             ; 0x81
	.long	128                             ; 0x80

	.comm	_DRM_MODE_FLAG_DBLCLK,4,2       ; @DRM_MODE_FLAG_DBLCLK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"DP link computation with max lane count %i max bw %02x pixel clock %iKHz\n"

	.comm	_INTEL_MODE_DP_FORCE_6BPC,4,2   ; @INTEL_MODE_DP_FORCE_6BPC
	.comm	_DP_COLOR_RANGE_16_235,8,3      ; @DP_COLOR_RANGE_16_235
	.comm	_INTEL_MODE_LIMITED_COLOR_RANGE,4,2 ; @INTEL_MODE_LIMITED_COLOR_RANGE
l_.str.1:                               ; @.str.1
	.asciz	"DP link bw %02x lane count %d clock %d bpp %d\n"

l_.str.2:                               ; @.str.2
	.asciz	"DP link bw required %i available %i\n"

.subsections_via_symbols
