	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_ddi_mode_set
_intel_ddi_mode_set:                    ## @intel_ddi_mode_set
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, -48(%rbp)                 ## 8-byte Spill
	movq	%rdi, %r12
	movq	(%rdi), %rdi
	callq	_to_intel_crtc
	movq	%rax, %r15
	movq	%r12, %rdi
	callq	_to_intel_encoder
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_intel_ddi_get_encoder_port
	movl	(%r15), %r13d
	movl	(%rbx), %r14d
	movl	%eax, %edi
	callq	_port_name
	movl	%eax, %ebx
	movl	%r13d, %edi
	callq	_pipe_name
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_DRM_DEBUG_KMS
	movl	$0, 4(%r15)
	movq	_INTEL_OUTPUT_DISPLAYPORT@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r14d
	je	LBB0_2
## %bb.1:
	movq	_INTEL_OUTPUT_EDP@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r14d
	je	LBB0_2
## %bb.13:
	movq	_INTEL_OUTPUT_HDMI@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r14d
	jne	LBB0_17
## %bb.14:
	movq	%r12, %rdi
	callq	_enc_to_intel_hdmi
	movq	%rax, %rbx
	cmpq	$0, 8(%rax)
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	je	LBB0_16
## %bb.15:
	movl	(%r15), %edi
	callq	_pipe_name
	leaq	L_.str.4(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
	leaq	L_.str.5(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_intel_write_eld
LBB0_16:
	movq	(%rbx), %rax
	movq	%r12, %rdi
	movq	%r14, %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmpq	*%rax                           ## TAILCALL
LBB0_2:
	movq	%r12, %rdi
	callq	_enc_to_intel_dp
	movq	%rax, %rbx
	movq	%r12, %rdi
	callq	_enc_to_dig_port
	movq	_DDI_BUF_CTL_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_DDI_BUF_EMP_400MV_0DB_HSW@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	%ecx, (%rbx)
	movl	4(%rbx), %edx
	cmpl	$4, %edx
	je	LBB0_8
## %bb.3:
	cmpl	$2, %edx
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	je	LBB0_7
## %bb.4:
	cmpl	$1, %edx
	jne	LBB0_9
## %bb.5:
	movq	_DDI_PORT_WIDTH_X1@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_17:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_8:
	movq	_DDI_PORT_WIDTH_X4@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	%ecx, (%rbx)
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	cmpq	$0, 8(%rbx)
	jne	LBB0_11
	jmp	LBB0_12
LBB0_7:
	movq	_DDI_PORT_WIDTH_X2@GOTPCREL(%rip), %rax
LBB0_6:
	orl	(%rax), %ecx
	movl	%ecx, (%rbx)
	cmpq	$0, 8(%rbx)
	je	LBB0_12
LBB0_11:
	movl	(%r15), %edi
	callq	_pipe_name
	leaq	L_.str.2(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
	leaq	L_.str.3(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_intel_write_eld
LBB0_12:
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_dp_init_link_config      ## TAILCALL
LBB0_9:
	movq	_DDI_PORT_WIDTH_X4@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	%ecx, (%rbx)
	leaq	L_.str.1(%rip), %rsi
	movl	$1, %edi
	callq	_WARN
	cmpq	$0, 8(%rbx)
	jne	LBB0_11
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Preparing DDI mode for Haswell on port %c, pipe %c\n"

	.comm	_INTEL_OUTPUT_DISPLAYPORT,4,2   ## @INTEL_OUTPUT_DISPLAYPORT
	.comm	_INTEL_OUTPUT_EDP,4,2           ## @INTEL_OUTPUT_EDP
	.comm	_DDI_BUF_CTL_ENABLE,4,2         ## @DDI_BUF_CTL_ENABLE
	.comm	_DDI_BUF_EMP_400MV_0DB_HSW,4,2  ## @DDI_BUF_EMP_400MV_0DB_HSW
	.comm	_DDI_PORT_WIDTH_X1,4,2          ## @DDI_PORT_WIDTH_X1
	.comm	_DDI_PORT_WIDTH_X2,4,2          ## @DDI_PORT_WIDTH_X2
	.comm	_DDI_PORT_WIDTH_X4,4,2          ## @DDI_PORT_WIDTH_X4
L_.str.1:                               ## @.str.1
	.asciz	"Unexpected DP lane count %d\n"

L_.str.2:                               ## @.str.2
	.asciz	"DP audio on pipe %c on DDI\n"

L_.str.3:                               ## @.str.3
	.asciz	"DP audio: write eld information\n"

	.comm	_INTEL_OUTPUT_HDMI,4,2          ## @INTEL_OUTPUT_HDMI
L_.str.4:                               ## @.str.4
	.asciz	"HDMI audio on pipe %c on DDI\n"

L_.str.5:                               ## @.str.5
	.asciz	"HDMI audio: write eld information\n"

	.no_dead_strip	_intel_ddi_mode_set
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_ddi_mode_set
_intel_ddi_mode_set:                    ; @intel_ddi_mode_set
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x20, x0
	ldr	x0, [x0]
	bl	_to_intel_crtc
	mov	x21, x0
	mov	x0, x20
	bl	_to_intel_encoder
	mov	x22, x0
	bl	_intel_ddi_get_encoder_port
	ldr	w23, [x21]
	ldr	w24, [x22]
	bl	_port_name
	mov	x22, x0
	mov	x0, x23
	bl	_pipe_name
	mov	x2, x0
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x22
	bl	_DRM_DEBUG_KMS
	str	wzr, [x21, #4]
Lloh2:
	adrp	x8, _INTEL_OUTPUT_DISPLAYPORT@GOTPAGE
Lloh3:
	ldr	x8, [x8, _INTEL_OUTPUT_DISPLAYPORT@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _INTEL_OUTPUT_EDP@GOTPAGE
Lloh6:
	ldr	x9, [x9, _INTEL_OUTPUT_EDP@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	cmp	w24, w8
	ccmp	w24, w9, #4, ne
	b.ne	LBB0_5
; %bb.1:
	mov	x0, x20
	bl	_enc_to_intel_dp
	mov	x22, x0
	mov	x0, x20
	bl	_enc_to_dig_port
	ldr	w8, [x0]
Lloh8:
	adrp	x9, _DDI_BUF_CTL_ENABLE@GOTPAGE
Lloh9:
	ldr	x9, [x9, _DDI_BUF_CTL_ENABLE@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
Lloh11:
	adrp	x10, _DDI_BUF_EMP_400MV_0DB_HSW@GOTPAGE
Lloh12:
	ldr	x10, [x10, _DDI_BUF_EMP_400MV_0DB_HSW@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh13:
	ldr	w9, [x10]
	orr	w8, w8, w9
	str	w8, [x22]
	ldr	w2, [x22, #4]
	cmp	w2, #4
	b.eq	LBB0_10
; %bb.2:
	cmp	w2, #2
	b.eq	LBB0_11
; %bb.3:
	cmp	w2, #1
	b.ne	LBB0_15
; %bb.4:
Lloh14:
	adrp	x9, _DDI_PORT_WIDTH_X1@GOTPAGE
Lloh15:
	ldr	x9, [x9, _DDI_PORT_WIDTH_X1@GOTPAGEOFF]
	b	LBB0_12
LBB0_5:
Lloh16:
	adrp	x8, _INTEL_OUTPUT_HDMI@GOTPAGE
Lloh17:
	ldr	x8, [x8, _INTEL_OUTPUT_HDMI@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	cmp	w24, w8
	b.ne	LBB0_9
; %bb.6:
	mov	x0, x20
	bl	_enc_to_intel_hdmi
	mov	x22, x0
	ldr	x8, [x0, #8]
	cbz	x8, LBB0_8
; %bb.7:
	ldr	w0, [x21]
	bl	_pipe_name
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh19:
	adrp	x0, l_.str.4@PAGE
Lloh20:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
Lloh21:
	adrp	x0, l_.str.5@PAGE
Lloh22:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
	mov	x0, x20
	mov	x1, x19
	bl	_intel_write_eld
LBB0_8:
	ldr	x2, [x22]
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	br	x2
LBB0_9:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_10:
Lloh23:
	adrp	x9, _DDI_PORT_WIDTH_X4@GOTPAGE
Lloh24:
	ldr	x9, [x9, _DDI_PORT_WIDTH_X4@GOTPAGEOFF]
	b	LBB0_12
LBB0_11:
Lloh25:
	adrp	x9, _DDI_PORT_WIDTH_X2@GOTPAGE
Lloh26:
	ldr	x9, [x9, _DDI_PORT_WIDTH_X2@GOTPAGEOFF]
LBB0_12:
	ldr	w9, [x9]
	orr	w8, w9, w8
	str	w8, [x22]
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_14
LBB0_13:
	ldr	w0, [x21]
	bl	_pipe_name
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh27:
	adrp	x0, l_.str.2@PAGE
Lloh28:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
Lloh29:
	adrp	x0, l_.str.3@PAGE
Lloh30:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
	mov	x0, x20
	mov	x1, x19
	bl	_intel_write_eld
LBB0_14:
	mov	x0, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_intel_dp_init_link_config
LBB0_15:
Lloh31:
	adrp	x9, _DDI_PORT_WIDTH_X4@GOTPAGE
Lloh32:
	ldr	x9, [x9, _DDI_PORT_WIDTH_X4@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	orr	w8, w9, w8
	str	w8, [x22]
Lloh34:
	adrp	x1, l_.str.1@PAGE
Lloh35:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	w0, #1
	bl	_WARN
	ldr	x8, [x22, #8]
	cbnz	x8, LBB0_13
	b	LBB0_14
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpAdd	Lloh29, Lloh30
	.loh AdrpAdd	Lloh27, Lloh28
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Preparing DDI mode for Haswell on port %c, pipe %c\n"

	.comm	_INTEL_OUTPUT_DISPLAYPORT,4,2   ; @INTEL_OUTPUT_DISPLAYPORT
	.comm	_INTEL_OUTPUT_EDP,4,2           ; @INTEL_OUTPUT_EDP
	.comm	_DDI_BUF_CTL_ENABLE,4,2         ; @DDI_BUF_CTL_ENABLE
	.comm	_DDI_BUF_EMP_400MV_0DB_HSW,4,2  ; @DDI_BUF_EMP_400MV_0DB_HSW
	.comm	_DDI_PORT_WIDTH_X1,4,2          ; @DDI_PORT_WIDTH_X1
	.comm	_DDI_PORT_WIDTH_X2,4,2          ; @DDI_PORT_WIDTH_X2
	.comm	_DDI_PORT_WIDTH_X4,4,2          ; @DDI_PORT_WIDTH_X4
l_.str.1:                               ; @.str.1
	.asciz	"Unexpected DP lane count %d\n"

l_.str.2:                               ; @.str.2
	.asciz	"DP audio on pipe %c on DDI\n"

l_.str.3:                               ; @.str.3
	.asciz	"DP audio: write eld information\n"

	.comm	_INTEL_OUTPUT_HDMI,4,2          ; @INTEL_OUTPUT_HDMI
l_.str.4:                               ; @.str.4
	.asciz	"HDMI audio on pipe %c on DDI\n"

l_.str.5:                               ; @.str.5
	.asciz	"HDMI audio: write eld information\n"

	.no_dead_strip	_intel_ddi_mode_set
.subsections_via_symbols
