	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rv515_startup
_rv515_startup:                         ## @rv515_startup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	callq	_rv515_mc_program
	movq	%rbx, %rdi
	callq	_rv515_clock_startup
	movq	%rbx, %rdi
	callq	_rv515_gpu_init
	movq	_RADEON_IS_PCIE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_rv370_pcie_gart_enable
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_13
LBB0_2:
	movq	%rbx, %rdi
	callq	_radeon_wb_init
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_13
## %bb.3:
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	movl	%eax, %r14d
	movl	4(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_12
LBB0_5:
	cmpl	$0, 12(%rbx)
	je	LBB0_6
LBB0_7:
	movq	%rbx, %rdi
	callq	_rs600_irq_set
	movq	_RADEON_HOST_PATH_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%eax, 8(%rbx)
	movq	%rbx, %rdi
	movl	$1048576, %esi                  ## imm = 0x100000
	callq	_r100_cp_init
	testl	%eax, %eax
	je	LBB0_9
## %bb.8:
	movl	%eax, %r14d
	movl	4(%rbx), %edi
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_12
LBB0_6:
	movq	%rbx, %rdi
	callq	_radeon_irq_kms_init
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_13
	jmp	LBB0_7
LBB0_9:
	movq	%rbx, %rdi
	callq	_radeon_ib_pool_init
	testl	%eax, %eax
	je	LBB0_10
## %bb.11:
	movl	%eax, %r14d
	movl	4(%rbx), %edi
	leaq	L_.str.2(%rip), %rsi
LBB0_12:
	movl	%r14d, %edx
	callq	_dev_err
LBB0_13:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_10:
	xorl	%r14d, %r14d
	jmp	LBB0_13
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_IS_PCIE,4,2             ## @RADEON_IS_PCIE
	.comm	_RADEON_RING_TYPE_GFX_INDEX,4,2 ## @RADEON_RING_TYPE_GFX_INDEX
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_RADEON_HOST_PATH_CNTL,4,2      ## @RADEON_HOST_PATH_CNTL
L_.str.1:                               ## @.str.1
	.asciz	"failed initializing CP (%d).\n"

L_.str.2:                               ## @.str.2
	.asciz	"IB initialization failed (%d).\n"

	.no_dead_strip	_rv515_startup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rv515_startup
_rv515_startup:                         ; @rv515_startup
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_rv515_mc_program
	mov	x0, x19
	bl	_rv515_clock_startup
	mov	x0, x19
	bl	_rv515_gpu_init
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _RADEON_IS_PCIE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_IS_PCIE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_rv370_pcie_gart_enable
	mov	x20, x0
	cbnz	w0, LBB0_12
LBB0_2:
	mov	x0, x19
	bl	_radeon_wb_init
	mov	x20, x0
	cbnz	w0, LBB0_12
; %bb.3:
Lloh3:
	adrp	x8, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbz	w0, LBB0_5
; %bb.4:
	mov	x20, x0
	ldr	w0, [x19, #4]
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_11
LBB0_5:
	ldr	w8, [x19, #12]
	cbz	w8, LBB0_8
LBB0_6:
	mov	x0, x19
	bl	_rs600_irq_set
Lloh8:
	adrp	x8, _RADEON_HOST_PATH_CNTL@GOTPAGE
Lloh9:
	ldr	x8, [x8, _RADEON_HOST_PATH_CNTL@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	bl	_RREG32
	str	w0, [x19, #8]
	mov	x0, x19
	mov	w1, #1048576
	bl	_r100_cp_init
	cbz	w0, LBB0_9
; %bb.7:
	mov	x20, x0
	ldr	w0, [x19, #4]
Lloh11:
	adrp	x1, l_.str.1@PAGE
Lloh12:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_11
LBB0_8:
	mov	x0, x19
	bl	_radeon_irq_kms_init
	mov	x20, x0
	cbnz	w0, LBB0_12
	b	LBB0_6
LBB0_9:
	mov	x0, x19
	bl	_radeon_ib_pool_init
	mov	x20, x0
	cbz	w0, LBB0_12
; %bb.10:
	ldr	w0, [x19, #4]
Lloh13:
	adrp	x1, l_.str.2@PAGE
Lloh14:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_11:
	mov	x2, x20
	bl	_dev_err
LBB0_12:
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_IS_PCIE,4,2             ; @RADEON_IS_PCIE
	.comm	_RADEON_RING_TYPE_GFX_INDEX,4,2 ; @RADEON_RING_TYPE_GFX_INDEX
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_RADEON_HOST_PATH_CNTL,4,2      ; @RADEON_HOST_PATH_CNTL
l_.str.1:                               ; @.str.1
	.asciz	"failed initializing CP (%d).\n"

l_.str.2:                               ; @.str.2
	.asciz	"IB initialization failed (%d).\n"

	.no_dead_strip	_rv515_startup
.subsections_via_symbols
