	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function async_mode
_async_mode:                            ## @async_mode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_tx_stop
	movq	%rbx, %rdi
	callq	_rx_stop
	xorl	%eax, %eax
	cmpl	$1, 16(%rbx)
	movq	_BIT1@GOTPCREL(%rip), %r14
	movzbl	(%r14), %ecx
	cmovel	%eax, %ecx
	movq	_MD0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movzbl	%cl, %edx
	movq	%rbx, %rdi
	callq	_write_reg
	movl	20(%rbx), %ecx
	cmpl	$5, %ecx
	je	LBB0_4
## %bb.1:
	cmpl	$6, %ecx
	je	LBB0_5
## %bb.2:
	movb	$64, %al
	cmpl	$7, %ecx
	jne	LBB0_8
## %bb.3:
	movq	_BIT4@GOTPCREL(%rip), %rcx
	movq	_BIT2@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_4:
	movq	_BIT5@GOTPCREL(%rip), %rcx
	movq	_BIT4@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	addb	(%rcx), %al
	movq	_BIT3@GOTPCREL(%rip), %rcx
	addb	(%rcx), %al
	movq	_BIT2@GOTPCREL(%rip), %rcx
	jmp	LBB0_7
LBB0_5:
	movq	_BIT5@GOTPCREL(%rip), %rcx
	movq	_BIT3@GOTPCREL(%rip), %rax
LBB0_6:
	movb	(%rax), %al
LBB0_7:
	addb	(%rcx), %al
	orb	$64, %al
LBB0_8:
	movq	24(%rbx), %rcx
	movq	_ASYNC_PARITY_NONE@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	je	LBB0_11
## %bb.9:
	orb	(%r14), %al
	movq	_ASYNC_PARITY_ODD@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jne	LBB0_11
## %bb.10:
	movq	_BIT0@GOTPCREL(%rip), %rcx
	orb	(%rcx), %al
LBB0_11:
	movq	_MD1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movzbl	%al, %edx
	movq	%rbx, %rdi
	callq	_write_reg
	movq	_BIT0@GOTPCREL(%rip), %r15
	movb	(%r15), %al
	addb	(%r14), %al
	xorl	%ecx, %ecx
	cmpq	$0, 40(%rbx)
	movzbl	%al, %eax
	cmovel	%ecx, %eax
	movq	_MD2@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movzbl	%al, %edx
	movq	%rbx, %rdi
	callq	_write_reg
	movq	_BIT6@GOTPCREL(%rip), %r14
	movzbl	(%r14), %edx
	movq	_RXS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_write_reg
	movzbl	(%r14), %edx
	movq	_TXS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_write_reg
	movzbl	(%r15), %eax
	movb	(%rbx), %cl
	addb	%cl, %cl
	shll	%cl, %eax
	movq	48(%rbx), %rcx
	movq	(%rcx), %rcx
	orb	%al, (%rcx)
	movq	%rbx, %rdi
	callq	_write_control_reg
	movq	%rbx, %rdi
	callq	_tx_set_idle
	movq	_RRC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_write_reg
	movq	_TRC0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$16, %edx
	callq	_write_reg
	movq	_TRC1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$30, %edx
	callq	_write_reg
	movq	_SerialSignal_RTS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%edx, %edx
	andl	4(%rbx), %eax
	sete	%dl
	movq	_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	$16, %edx
	movq	%rbx, %rdi
	callq	_write_reg
	movq	_TXINTE@GOTPCREL(%rip), %rax
	movq	_RXINTE@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	addb	(%rax), %cl
	orb	8(%rbx), %cl
	movb	%cl, 8(%rbx)
	movq	_IE0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movzbl	%cl, %edx
	movq	%rbx, %rdi
	callq	_write_reg
	movq	_BRKD@GOTPCREL(%rip), %rax
	movzbl	(%rax), %edx
	movb	%dl, 9(%rbx)
	movq	_IE1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_write_reg
	movq	_OVRN@GOTPCREL(%rip), %rax
	movzbl	(%rax), %edx
	movb	%dl, 10(%rbx)
	movq	_IE2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_write_reg
	movl	32(%rbx), %esi
	shll	$4, %esi
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_set_rate                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_BIT1,1,0                       ## @BIT1
	.comm	_MD0,4,2                        ## @MD0
	.comm	_BIT4,1,0                       ## @BIT4
	.comm	_BIT2,1,0                       ## @BIT2
	.comm	_BIT5,1,0                       ## @BIT5
	.comm	_BIT3,1,0                       ## @BIT3
	.comm	_ASYNC_PARITY_NONE,8,3          ## @ASYNC_PARITY_NONE
	.comm	_ASYNC_PARITY_ODD,8,3           ## @ASYNC_PARITY_ODD
	.comm	_BIT0,1,0                       ## @BIT0
	.comm	_MD1,4,2                        ## @MD1
	.comm	_MD2,4,2                        ## @MD2
	.comm	_BIT6,1,0                       ## @BIT6
	.comm	_RXS,4,2                        ## @RXS
	.comm	_TXS,4,2                        ## @TXS
	.comm	_RRC,4,2                        ## @RRC
	.comm	_TRC0,4,2                       ## @TRC0
	.comm	_TRC1,4,2                       ## @TRC1
	.comm	_SerialSignal_RTS,4,2           ## @SerialSignal_RTS
	.comm	_CTL,4,2                        ## @CTL
	.comm	_TXINTE,1,0                     ## @TXINTE
	.comm	_RXINTE,1,0                     ## @RXINTE
	.comm	_IE0,4,2                        ## @IE0
	.comm	_BRKD,1,0                       ## @BRKD
	.comm	_IE1,4,2                        ## @IE1
	.comm	_OVRN,1,0                       ## @OVRN
	.comm	_IE2,4,2                        ## @IE2
	.no_dead_strip	_async_mode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function async_mode
_async_mode:                            ; @async_mode
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_tx_stop
	mov	x0, x19
	bl	_rx_stop
	ldr	w8, [x19, #16]
Lloh0:
	adrp	x20, _BIT1@GOTPAGE
Lloh1:
	ldr	x20, [x20, _BIT1@GOTPAGEOFF]
	ldrb	w9, [x20]
	cmp	w8, #1
	csel	w8, wzr, w9, eq
Lloh2:
	adrp	x9, _MD0@GOTPAGE
Lloh3:
	ldr	x9, [x9, _MD0@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x9]
	and	w2, w8, #0xff
	mov	x0, x19
	bl	_write_reg
	ldr	w8, [x19, #20]
	cmp	w8, #5
	b.eq	LBB0_4
; %bb.1:
	cmp	w8, #6
	b.eq	LBB0_5
; %bb.2:
	cmp	w8, #7
	b.ne	LBB0_8
; %bb.3:
Lloh5:
	adrp	x8, _BIT4@GOTPAGE
Lloh6:
	ldr	x8, [x8, _BIT4@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh7:
	adrp	x9, _BIT2@GOTPAGE
Lloh8:
	ldr	x9, [x9, _BIT2@GOTPAGEOFF]
	b	LBB0_6
LBB0_4:
Lloh9:
	adrp	x8, _BIT5@GOTPAGE
Lloh10:
	ldr	x8, [x8, _BIT5@GOTPAGEOFF]
Lloh11:
	adrp	x9, _BIT4@GOTPAGE
Lloh12:
	ldr	x9, [x9, _BIT4@GOTPAGEOFF]
	ldrb	w8, [x8]
	ldrb	w9, [x9]
Lloh13:
	adrp	x10, _BIT3@GOTPAGE
Lloh14:
	ldr	x10, [x10, _BIT3@GOTPAGEOFF]
	ldrb	w10, [x10]
	add	w8, w9, w8
	add	w8, w8, w10
Lloh15:
	adrp	x9, _BIT2@GOTPAGE
Lloh16:
	ldr	x9, [x9, _BIT2@GOTPAGEOFF]
	ldrb	w9, [x9]
	add	w8, w8, w9
	b	LBB0_7
LBB0_5:
Lloh17:
	adrp	x8, _BIT5@GOTPAGE
Lloh18:
	ldr	x8, [x8, _BIT5@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh19:
	adrp	x9, _BIT3@GOTPAGE
Lloh20:
	ldr	x9, [x9, _BIT3@GOTPAGEOFF]
LBB0_6:
	ldrb	w9, [x9]
	add	w8, w9, w8
LBB0_7:
	orr	w8, w8, #0x40
	b	LBB0_9
LBB0_8:
	mov	w8, #64
LBB0_9:
	ldr	x9, [x19, #24]
Lloh21:
	adrp	x10, _ASYNC_PARITY_NONE@GOTPAGE
Lloh22:
	ldr	x10, [x10, _ASYNC_PARITY_NONE@GOTPAGEOFF]
Lloh23:
	ldr	x10, [x10]
Lloh24:
	adrp	x21, _BIT0@GOTPAGE
Lloh25:
	ldr	x21, [x21, _BIT0@GOTPAGEOFF]
	cmp	x9, x10
	b.eq	LBB0_12
; %bb.10:
	ldrb	w10, [x20]
	orr	w8, w10, w8
Lloh26:
	adrp	x10, _ASYNC_PARITY_ODD@GOTPAGE
Lloh27:
	ldr	x10, [x10, _ASYNC_PARITY_ODD@GOTPAGEOFF]
Lloh28:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_12
; %bb.11:
	ldrb	w9, [x21]
	orr	w8, w9, w8
LBB0_12:
Lloh29:
	adrp	x9, _MD1@GOTPAGE
Lloh30:
	ldr	x9, [x9, _MD1@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x9]
	and	w2, w8, #0xff
	mov	x0, x19
	bl	_write_reg
	ldr	x8, [x19, #40]
	ldrb	w9, [x20]
	ldrb	w10, [x21]
	add	w9, w10, w9
	cmp	x8, #0
	csel	w8, wzr, w9, eq
Lloh32:
	adrp	x9, _MD2@GOTPAGE
Lloh33:
	ldr	x9, [x9, _MD2@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x9]
	and	w2, w8, #0xff
	mov	x0, x19
	bl	_write_reg
Lloh35:
	adrp	x20, _BIT6@GOTPAGE
Lloh36:
	ldr	x20, [x20, _BIT6@GOTPAGEOFF]
	ldrb	w2, [x20]
Lloh37:
	adrp	x8, _RXS@GOTPAGE
Lloh38:
	ldr	x8, [x8, _RXS@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_write_reg
	ldrb	w2, [x20]
Lloh40:
	adrp	x8, _TXS@GOTPAGE
Lloh41:
	ldr	x8, [x8, _TXS@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_write_reg
	ldrb	w8, [x21]
	ldr	w9, [x19]
	lsl	w9, w9, #1
	lsl	w8, w8, w9
	ldr	x9, [x19, #48]
	ldr	x9, [x9]
	ldrb	w10, [x9]
	orr	w8, w10, w8
	strb	w8, [x9]
	mov	x0, x19
	bl	_write_control_reg
	mov	x0, x19
	bl	_tx_set_idle
Lloh43:
	adrp	x8, _RRC@GOTPAGE
Lloh44:
	ldr	x8, [x8, _RRC@GOTPAGEOFF]
Lloh45:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_write_reg
Lloh46:
	adrp	x8, _TRC0@GOTPAGE
Lloh47:
	ldr	x8, [x8, _TRC0@GOTPAGEOFF]
Lloh48:
	ldr	w1, [x8]
	mov	w20, #16
	mov	x0, x19
	mov	w2, #16
	bl	_write_reg
Lloh49:
	adrp	x8, _TRC1@GOTPAGE
Lloh50:
	ldr	x8, [x8, _TRC1@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #30
	bl	_write_reg
	ldr	w8, [x19, #4]
Lloh52:
	adrp	x9, _SerialSignal_RTS@GOTPAGE
Lloh53:
	ldr	x9, [x9, _SerialSignal_RTS@GOTPAGEOFF]
Lloh54:
	ldr	w9, [x9]
Lloh55:
	adrp	x10, _CTL@GOTPAGE
Lloh56:
	ldr	x10, [x10, _CTL@GOTPAGEOFF]
Lloh57:
	ldr	w1, [x10]
	tst	w9, w8
	cinc	w2, w20, eq
	mov	x0, x19
	bl	_write_reg
Lloh58:
	adrp	x8, _TXINTE@GOTPAGE
Lloh59:
	ldr	x8, [x8, _TXINTE@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh60:
	adrp	x9, _RXINTE@GOTPAGE
Lloh61:
	ldr	x9, [x9, _RXINTE@GOTPAGEOFF]
	ldrb	w9, [x9]
	ldrb	w10, [x19, #8]
	add	w8, w9, w8
	orr	w8, w8, w10
	strb	w8, [x19, #8]
Lloh62:
	adrp	x9, _IE0@GOTPAGE
Lloh63:
	ldr	x9, [x9, _IE0@GOTPAGEOFF]
Lloh64:
	ldr	w1, [x9]
	and	w2, w8, #0xff
	mov	x0, x19
	bl	_write_reg
Lloh65:
	adrp	x8, _BRKD@GOTPAGE
Lloh66:
	ldr	x8, [x8, _BRKD@GOTPAGEOFF]
	ldrb	w2, [x8]
	strb	w2, [x19, #9]
Lloh67:
	adrp	x8, _IE1@GOTPAGE
Lloh68:
	ldr	x8, [x8, _IE1@GOTPAGEOFF]
Lloh69:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_write_reg
Lloh70:
	adrp	x8, _OVRN@GOTPAGE
Lloh71:
	ldr	x8, [x8, _OVRN@GOTPAGEOFF]
	ldrb	w2, [x8]
	strb	w2, [x19, #10]
Lloh72:
	adrp	x8, _IE2@GOTPAGE
Lloh73:
	ldr	x8, [x8, _IE2@GOTPAGEOFF]
Lloh74:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_write_reg
	ldr	w8, [x19, #32]
	lsl	w1, w8, #4
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_set_rate
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGot	Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGot	Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.comm	_BIT1,1,0                       ; @BIT1
	.comm	_MD0,4,2                        ; @MD0
	.comm	_BIT4,1,0                       ; @BIT4
	.comm	_BIT2,1,0                       ; @BIT2
	.comm	_BIT5,1,0                       ; @BIT5
	.comm	_BIT3,1,0                       ; @BIT3
	.comm	_ASYNC_PARITY_NONE,8,3          ; @ASYNC_PARITY_NONE
	.comm	_ASYNC_PARITY_ODD,8,3           ; @ASYNC_PARITY_ODD
	.comm	_BIT0,1,0                       ; @BIT0
	.comm	_MD1,4,2                        ; @MD1
	.comm	_MD2,4,2                        ; @MD2
	.comm	_BIT6,1,0                       ; @BIT6
	.comm	_RXS,4,2                        ; @RXS
	.comm	_TXS,4,2                        ; @TXS
	.comm	_RRC,4,2                        ; @RRC
	.comm	_TRC0,4,2                       ; @TRC0
	.comm	_TRC1,4,2                       ; @TRC1
	.comm	_SerialSignal_RTS,4,2           ; @SerialSignal_RTS
	.comm	_CTL,4,2                        ; @CTL
	.comm	_TXINTE,1,0                     ; @TXINTE
	.comm	_RXINTE,1,0                     ; @RXINTE
	.comm	_IE0,4,2                        ; @IE0
	.comm	_BRKD,1,0                       ; @BRKD
	.comm	_IE1,4,2                        ; @IE1
	.comm	_OVRN,1,0                       ; @OVRN
	.comm	_IE2,4,2                        ; @IE2
	.no_dead_strip	_async_mode
.subsections_via_symbols
