	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_crtc_mode_fixup
_intel_crtc_mode_fixup:                 ## @intel_crtc_mode_fixup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movq	(%rdi), %r15
	movq	%r15, %rdi
	callq	_HAS_PCH_SPLIT
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movl	(%rbx), %eax
	leal	(%rax,%rax,2), %ecx
	movq	_IRONLAKE_FDI_FREQ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	shll	$2, %edx
	xorl	%eax, %eax
	cmpl	%edx, %ecx
	jg	LBB0_8
LBB0_2:
	movq	_INTEL_MODE_CRTC_TIMINGS_SET@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 4(%r14)
	jne	LBB0_4
## %bb.3:
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_drm_mode_set_crtcinfo
LBB0_4:
	movq	%r15, %rdi
	callq	_INTEL_INFO
	cmpl	$4, (%rax)
	jg	LBB0_6
## %bb.5:
	movq	%r15, %rdi
	callq	_IS_G4X
	testq	%rax, %rax
	je	LBB0_7
LBB0_6:
	movq	8(%r14), %rcx
	xorl	%eax, %eax
	cmpq	16(%r14), %rcx
	je	LBB0_8
LBB0_7:
	movl	$1, %eax
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_IRONLAKE_FDI_FREQ,4,2          ## @IRONLAKE_FDI_FREQ
	.comm	_INTEL_MODE_CRTC_TIMINGS_SET,4,2 ## @INTEL_MODE_CRTC_TIMINGS_SET
	.no_dead_strip	_intel_crtc_mode_fixup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_crtc_mode_fixup
_intel_crtc_mode_fixup:                 ; @intel_crtc_mode_fixup
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x21, x1
	ldr	x20, [x0]
	mov	x0, x20
	bl	_HAS_PCH_SPLIT
	cbz	x0, LBB0_2
; %bb.1:
	ldr	w8, [x21]
	add	w8, w8, w8, lsl #1
Lloh0:
	adrp	x9, _IRONLAKE_FDI_FREQ@GOTPAGE
Lloh1:
	ldr	x9, [x9, _IRONLAKE_FDI_FREQ@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	cmp	w8, w9, lsl #2
	b.gt	LBB0_7
LBB0_2:
	ldr	w8, [x19, #4]
Lloh3:
	adrp	x9, _INTEL_MODE_CRTC_TIMINGS_SET@GOTPAGE
Lloh4:
	ldr	x9, [x9, _INTEL_MODE_CRTC_TIMINGS_SET@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_4
; %bb.3:
	mov	x0, x19
	mov	w1, #0
	bl	_drm_mode_set_crtcinfo
LBB0_4:
	mov	x0, x20
	bl	_INTEL_INFO
	ldr	w8, [x0]
	cmp	w8, #4
	b.gt	LBB0_6
; %bb.5:
	mov	x0, x20
	bl	_IS_G4X
	cbz	x0, LBB0_8
LBB0_6:
	ldp	x8, x9, [x19, #8]
	cmp	x8, x9
	b.ne	LBB0_8
LBB0_7:
	mov	w0, #0
	b	LBB0_9
LBB0_8:
	mov	w0, #1
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_IRONLAKE_FDI_FREQ,4,2          ; @IRONLAKE_FDI_FREQ
	.comm	_INTEL_MODE_CRTC_TIMINGS_SET,4,2 ; @INTEL_MODE_CRTC_TIMINGS_SET
	.no_dead_strip	_intel_crtc_mode_fixup
.subsections_via_symbols
