	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_nv04_fifo_chan_fini            ## -- Begin function nv04_fifo_chan_fini
	.p2align	4, 0x90
_nv04_fifo_chan_fini:                   ## @nv04_fifo_chan_fini
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %r15
	movq	(%rdi), %r13
	movq	16(%r13), %rbx
	leaq	4(%r13), %r12
	movq	%r12, %rdi
	callq	_spin_lock_irqsave
	movq	_NV03_PFIFO_CACHES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_nv_wr32
	movq	_NV03_PFIFO_CACHE1_PUSH1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_nv_rd32
	andl	(%r13), %eax
	movl	4(%r15), %ecx
	addq	$4, %r15
	cmpl	%ecx, %eax
	jne	LBB0_6
## %bb.1:
	movq	%r12, -56(%rbp)                 ## 8-byte Spill
	movq	%r15, -64(%rbp)                 ## 8-byte Spill
	movl	%r14d, -44(%rbp)                ## 4-byte Spill
	movq	_NV04_PFIFO_CACHE1_DMA_PUSH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_nv_mask
	movq	_NV03_PFIFO_CACHE1_PUSH0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_nv_wr32
	movq	_NV04_PFIFO_CACHE1_PULL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_nv_mask
	movq	8(%r13), %r15
	movq	(%r15), %rcx
	addq	$32, %r15
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	$-1, %r14
                                        ## kill: def $cl killed $cl killed $rcx
	shlq	%cl, %r14
	notq	%r14
	movzbl	-24(%r15), %ecx
	movzbl	-16(%r15), %eax
	movq	%r14, %r12
	shlq	%cl, %r12
	movl	%eax, %ecx
	shlq	%cl, %r14
	movl	-4(%r15), %esi
	movq	%r13, %rdi
	callq	_nv_rd32
	andl	%eax, %r12d
	movzbl	-24(%r15), %ecx
	sarl	%cl, %r12d
	movl	-8(%r15), %esi
	addl	%r13d, %esi
	movq	%rbx, %rdi
	callq	_nv_ro32
	notl	%r14d
	andl	%eax, %r14d
	movl	-8(%r15), %esi
	addl	%r13d, %esi
	movzbl	-16(%r15), %ecx
	shll	%cl, %r12d
	orl	%r14d, %r12d
	movq	%rbx, %rdi
	movl	%r12d, %edx
	callq	_nv_wo32
	movq	(%r15), %rcx
	addq	$32, %r15
	testq	%rcx, %rcx
	jne	LBB0_2
## %bb.3:
	movq	8(%r13), %rbx
	addq	$32, %rbx
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movl	-4(%rbx), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_nv_wr32
	cmpq	$0, (%rbx)
	leaq	32(%rbx), %rbx
	jne	LBB0_4
## %bb.5:
	movq	_NV03_PFIFO_CACHE1_GET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_nv_wr32
	movq	_NV03_PFIFO_CACHE1_PUT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_nv_wr32
	movq	_NV03_PFIFO_CACHE1_PUSH1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r13), %edx
	movq	%r13, %rdi
	callq	_nv_wr32
	movq	_NV03_PFIFO_CACHE1_PUSH0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_nv_wr32
	movq	_NV04_PFIFO_CACHE1_PULL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_nv_wr32
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	movl	(%r15), %ecx
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	movq	-56(%rbp), %r12                 ## 8-byte Reload
LBB0_6:
	movq	_NV04_PFIFO_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %edx
	movq	%r13, %rdi
	xorl	%ecx, %ecx
	callq	_nv_mask
	movq	_NV03_PFIFO_CACHES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_nv_wr32
	movq	%r12, %rdi
	callq	_spin_unlock_irqrestore
	movq	%r15, %rdi
	movl	%r14d, %esi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_nouveau_fifo_channel_fini      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_NV03_PFIFO_CACHES,4,2          ## @NV03_PFIFO_CACHES
	.comm	_NV03_PFIFO_CACHE1_PUSH1,4,2    ## @NV03_PFIFO_CACHE1_PUSH1
	.comm	_NV04_PFIFO_CACHE1_DMA_PUSH,4,2 ## @NV04_PFIFO_CACHE1_DMA_PUSH
	.comm	_NV03_PFIFO_CACHE1_PUSH0,4,2    ## @NV03_PFIFO_CACHE1_PUSH0
	.comm	_NV04_PFIFO_CACHE1_PULL0,4,2    ## @NV04_PFIFO_CACHE1_PULL0
	.comm	_NV03_PFIFO_CACHE1_GET,4,2      ## @NV03_PFIFO_CACHE1_GET
	.comm	_NV03_PFIFO_CACHE1_PUT,4,2      ## @NV03_PFIFO_CACHE1_PUT
	.comm	_NV04_PFIFO_MODE,4,2            ## @NV04_PFIFO_MODE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_nv04_fifo_chan_fini            ; -- Begin function nv04_fifo_chan_fini
	.p2align	2
_nv04_fifo_chan_fini:                   ; @nv04_fifo_chan_fini
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x1
	mov	x20, x0
	ldr	x22, [x0]
	ldr	x23, [x22, #16]
	add	x21, x22, #4
	mov	x0, x21
	bl	_spin_lock_irqsave
Lloh0:
	adrp	x24, _NV03_PFIFO_CACHES@GOTPAGE
Lloh1:
	ldr	x24, [x24, _NV03_PFIFO_CACHES@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x22
	mov	w2, #0
	bl	_nv_wr32
Lloh2:
	adrp	x25, _NV03_PFIFO_CACHE1_PUSH1@GOTPAGE
Lloh3:
	ldr	x25, [x25, _NV03_PFIFO_CACHE1_PUSH1@GOTPAGEOFF]
	ldr	w1, [x25]
	mov	x0, x22
	bl	_nv_rd32
	ldr	w8, [x22]
	and	w9, w8, w0
	ldr	w8, [x20, #4]!
	cmp	w9, w8
	b.ne	LBB0_6
; %bb.1:
Lloh4:
	adrp	x8, _NV04_PFIFO_CACHE1_DMA_PUSH@GOTPAGE
Lloh5:
	ldr	x8, [x8, _NV04_PFIFO_CACHE1_DMA_PUSH@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
	mov	x0, x22
	mov	w2, #1
	mov	w3, #0
	bl	_nv_mask
Lloh7:
	adrp	x8, _NV03_PFIFO_CACHE1_PUSH0@GOTPAGE
Lloh8:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_PUSH0@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
	mov	x0, x22
	mov	w2, #0
	bl	_nv_wr32
Lloh10:
	adrp	x8, _NV04_PFIFO_CACHE1_PULL0@GOTPAGE
Lloh11:
	ldr	x8, [x8, _NV04_PFIFO_CACHE1_PULL0@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	mov	x0, x22
	mov	w2, #1
	mov	w3, #0
	bl	_nv_mask
	ldr	x28, [x22, #8]
	ldr	x8, [x28], #16
	mov	x26, #-1
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	lsl	x8, x26, x8
	mvn	x8, x8
	ldur	x9, [x28, #-8]
	lsl	x27, x8, x9
	ldr	x9, [x28]
	lsl	x24, x8, x9
	ldr	w1, [x28, #12]
	mov	x0, x22
	bl	_nv_rd32
	and	w8, w0, w27
	ldur	w9, [x28, #-8]
	asr	w27, w8, w9
	ldr	w8, [x28, #8]
	add	w1, w8, w22
	mov	x0, x23
	bl	_nv_ro32
	bic	w8, w0, w24
	ldr	w9, [x28, #8]
	add	w1, w9, w22
	ldr	w9, [x28]
	lsl	w9, w27, w9
	orr	w2, w9, w8
	mov	x0, x23
	bl	_nv_wo32
	ldr	x8, [x28, #16]
	add	x28, x28, #32
	cbnz	x8, LBB0_2
; %bb.3:
	ldr	x8, [x22, #8]
	add	x23, x8, #32
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldur	w1, [x23, #-4]
	mov	x0, x22
	mov	w2, #0
	bl	_nv_wr32
	ldr	x8, [x23], #32
	cbnz	x8, LBB0_4
; %bb.5:
Lloh13:
	adrp	x8, _NV03_PFIFO_CACHE1_GET@GOTPAGE
Lloh14:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_GET@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	x0, x22
	mov	w2, #0
	bl	_nv_wr32
Lloh16:
	adrp	x8, _NV03_PFIFO_CACHE1_PUT@GOTPAGE
Lloh17:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_PUT@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	mov	x0, x22
	mov	w2, #0
	bl	_nv_wr32
	ldr	w1, [x25]
	ldr	w2, [x22]
	mov	x0, x22
	bl	_nv_wr32
Lloh19:
	adrp	x8, _NV03_PFIFO_CACHE1_PUSH0@GOTPAGE
Lloh20:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_PUSH0@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	mov	x0, x22
	mov	w2, #1
	bl	_nv_wr32
Lloh22:
	adrp	x8, _NV04_PFIFO_CACHE1_PULL0@GOTPAGE
Lloh23:
	ldr	x8, [x8, _NV04_PFIFO_CACHE1_PULL0@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	mov	x0, x22
	mov	w2, #1
	bl	_nv_wr32
	ldr	w8, [x20]
Lloh25:
	adrp	x24, _NV03_PFIFO_CACHES@GOTPAGE
Lloh26:
	ldr	x24, [x24, _NV03_PFIFO_CACHES@GOTPAGEOFF]
LBB0_6:
Lloh27:
	adrp	x9, _NV04_PFIFO_MODE@GOTPAGE
Lloh28:
	ldr	x9, [x9, _NV04_PFIFO_MODE@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x9]
	mov	w9, #1
	lsl	w2, w9, w8
	mov	x0, x22
	mov	w3, #0
	bl	_nv_mask
	ldr	w1, [x24]
	mov	x0, x22
	mov	w2, #1
	bl	_nv_wr32
	mov	x0, x21
	bl	_spin_unlock_irqrestore
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_nouveau_fifo_channel_fini
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_NV03_PFIFO_CACHES,4,2          ; @NV03_PFIFO_CACHES
	.comm	_NV03_PFIFO_CACHE1_PUSH1,4,2    ; @NV03_PFIFO_CACHE1_PUSH1
	.comm	_NV04_PFIFO_CACHE1_DMA_PUSH,4,2 ; @NV04_PFIFO_CACHE1_DMA_PUSH
	.comm	_NV03_PFIFO_CACHE1_PUSH0,4,2    ; @NV03_PFIFO_CACHE1_PUSH0
	.comm	_NV04_PFIFO_CACHE1_PULL0,4,2    ; @NV04_PFIFO_CACHE1_PULL0
	.comm	_NV03_PFIFO_CACHE1_GET,4,2      ; @NV03_PFIFO_CACHE1_GET
	.comm	_NV03_PFIFO_CACHE1_PUT,4,2      ; @NV03_PFIFO_CACHE1_PUT
	.comm	_NV04_PFIFO_MODE,4,2            ; @NV04_PFIFO_MODE
.subsections_via_symbols
