	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function r600_do_wait_for_fifo
_r600_do_wait_for_fifo:                 ## @r600_do_wait_for_fifo
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_RADEON_BOX_WAIT_IDLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 8(%rdi)
	cmpl	$0, (%rdi)
	jle	LBB0_7
## %bb.1:
	movq	%rdi, %r15
	movl	%esi, %r14d
	xorl	%ebx, %ebx
	movq	_R700_CMDFIFO_AVAIL_MASK@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	_RADEON_FAMILY_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	4(%r15), %eax
	movq	%r12, %r13
	movq	_CHIP_RV770@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jge	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_R600_CMDFIFO_AVAIL_MASK@GOTPCREL(%rip), %r13
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	_R600_GRBM_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RADEON_READ
	andl	(%r13), %eax
	cmpl	%r14d, %eax
	jge	LBB0_5
## %bb.6:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	$1, %edi
	callq	_DRM_UDELAY
	incl	%ebx
	cmpl	(%r15), %ebx
	jl	LBB0_2
LBB0_7:
	movq	_R600_GRBM_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RADEON_READ
	movl	%eax, %ebx
	movq	_R600_GRBM_STATUS2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RADEON_READ
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_DRM_INFO
	movq	_EBUSY@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_8
LBB0_5:
	xorl	%eax, %eax
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_BOX_WAIT_IDLE,4,2       ## @RADEON_BOX_WAIT_IDLE
	.comm	_RADEON_FAMILY_MASK,4,2         ## @RADEON_FAMILY_MASK
	.comm	_CHIP_RV770,4,2                 ## @CHIP_RV770
	.comm	_R600_GRBM_STATUS,4,2           ## @R600_GRBM_STATUS
	.comm	_R700_CMDFIFO_AVAIL_MASK,4,2    ## @R700_CMDFIFO_AVAIL_MASK
	.comm	_R600_CMDFIFO_AVAIL_MASK,4,2    ## @R600_CMDFIFO_AVAIL_MASK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"wait for fifo failed status : 0x%08X 0x%08X\n"

	.comm	_R600_GRBM_STATUS2,4,2          ## @R600_GRBM_STATUS2
	.comm	_EBUSY,4,2                      ## @EBUSY
	.no_dead_strip	_r600_do_wait_for_fifo
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function r600_do_wait_for_fifo
_r600_do_wait_for_fifo:                 ; @r600_do_wait_for_fifo
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
Lloh0:
	adrp	x8, _RADEON_BOX_WAIT_IDLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_BOX_WAIT_IDLE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	ldr	w9, [x0, #8]
	orr	w8, w9, w8
	str	w8, [x0, #8]
	ldr	w8, [x0]
Lloh3:
	adrp	x21, _R600_GRBM_STATUS@GOTPAGE
Lloh4:
	ldr	x21, [x21, _R600_GRBM_STATUS@GOTPAGEOFF]
	cmp	w8, #1
	b.lt	LBB0_4
; %bb.1:
	mov	x19, x1
	mov	x20, x0
	mov	w22, #0
Lloh5:
	adrp	x23, _RADEON_FAMILY_MASK@GOTPAGE
Lloh6:
	ldr	x23, [x23, _RADEON_FAMILY_MASK@GOTPAGEOFF]
Lloh7:
	adrp	x24, _CHIP_RV770@GOTPAGE
Lloh8:
	ldr	x24, [x24, _CHIP_RV770@GOTPAGEOFF]
Lloh9:
	adrp	x25, _R600_CMDFIFO_AVAIL_MASK@GOTPAGE
Lloh10:
	ldr	x25, [x25, _R600_CMDFIFO_AVAIL_MASK@GOTPAGEOFF]
Lloh11:
	adrp	x26, _R700_CMDFIFO_AVAIL_MASK@GOTPAGE
Lloh12:
	ldr	x26, [x26, _R700_CMDFIFO_AVAIL_MASK@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x20, #4]
	ldr	w9, [x23]
	and	w27, w9, w8
	ldr	w28, [x24]
	ldr	w0, [x21]
	bl	_RADEON_READ
	cmp	w27, w28
	csel	x8, x25, x26, lt
	ldr	w8, [x8]
	and	w8, w8, w0
	cmp	w8, w19
	b.ge	LBB0_5
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	w0, #1
	bl	_DRM_UDELAY
	add	w22, w22, #1
	ldr	w8, [x20]
	cmp	w22, w8
	b.lt	LBB0_2
LBB0_4:
	ldr	w0, [x21]
	bl	_RADEON_READ
	mov	x19, x0
Lloh13:
	adrp	x8, _R600_GRBM_STATUS2@GOTPAGE
Lloh14:
	ldr	x8, [x8, _R600_GRBM_STATUS2@GOTPAGEOFF]
Lloh15:
	ldr	w0, [x8]
	bl	_RADEON_READ
	mov	x2, x0
Lloh16:
	adrp	x0, l_.str@PAGE
Lloh17:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x19
	bl	_DRM_INFO
Lloh18:
	adrp	x8, _EBUSY@GOTPAGE
Lloh19:
	ldr	x8, [x8, _EBUSY@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_6
LBB0_5:
	mov	w0, #0
LBB0_6:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_BOX_WAIT_IDLE,4,2       ; @RADEON_BOX_WAIT_IDLE
	.comm	_RADEON_FAMILY_MASK,4,2         ; @RADEON_FAMILY_MASK
	.comm	_CHIP_RV770,4,2                 ; @CHIP_RV770
	.comm	_R600_GRBM_STATUS,4,2           ; @R600_GRBM_STATUS
	.comm	_R700_CMDFIFO_AVAIL_MASK,4,2    ; @R700_CMDFIFO_AVAIL_MASK
	.comm	_R600_CMDFIFO_AVAIL_MASK,4,2    ; @R600_CMDFIFO_AVAIL_MASK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"wait for fifo failed status : 0x%08X 0x%08X\n"

	.comm	_R600_GRBM_STATUS2,4,2          ; @R600_GRBM_STATUS2
	.comm	_EBUSY,4,2                      ; @EBUSY
	.no_dead_strip	_r600_do_wait_for_fifo
.subsections_via_symbols
