	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_hsw_fdi_link_train             ## -- Begin function hsw_fdi_link_train
	.p2align	4, 0x90
_hsw_fdi_link_train:                    ## @hsw_fdi_link_train
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rax
	movq	(%rax), %r14
	callq	_to_intel_crtc
	movq	%rax, %r15
	movq	__FDI_RXA_MISC@GOTPCREL(%rip), %r13
	movl	(%r13), %r12d
	movl	$2, %edi
	callq	_FDI_RX_PWRDN_LANE1_VAL
	movl	%eax, %ebx
	movl	$2, %edi
	callq	_FDI_RX_PWRDN_LANE0_VAL
	orl	%eax, %ebx
	movq	_FDI_RX_TP1_TO_TP2_48@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_FDI_RX_FDI_DELAY_90@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	%r12d, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movq	_FDI_RX_ENHANCE_FRAME_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	orl	(%r14), %eax
	movq	%r13, %r14
	movq	_FDI_RX_PLL_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r15), %r13d
	shll	$19, %r13d
	addl	$-524288, %r13d                 ## imm = 0xFFF80000
	orl	%eax, %r13d
	movq	__FDI_RXA_CTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movl	%r13d, %esi
	callq	_I915_WRITE
	movl	(%rbx), %edi
	callq	_POSTING_READ
	movl	$220, %edi
	callq	_udelay
	movq	_FDI_PCDCLK@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	movl	(%rbx), %edi
	movl	%r13d, %esi
	callq	_I915_WRITE
	movq	_PORT_E@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_PORT_CLK_SEL
	movq	%r15, -64(%rbp)                 ## 8-byte Spill
	movl	4(%r15), %esi
	movl	%eax, %edi
	callq	_I915_WRITE
	movq	_hsw_ddi_buf_ctl_values@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	jle	LBB0_4
## %bb.1:
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %edi
	callq	_DP_TP_CTL
	movq	_DP_TP_CTL_ENHANCED_FRAME_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_DP_TP_CTL_FDI_AUTOTRAIN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_DP_TP_CTL_LINK_TRAIN_PAT1@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_DP_TP_CTL_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movl	%eax, %edi
	callq	_I915_WRITE
	movl	(%r12), %edi
	callq	_DDI_BUF_CTL
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
	movl	(%rcx), %ecx
	leal	(%rcx,%rcx), %esi
	addl	$-2, %esi
	movq	_DDI_BUF_CTL_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	(%r15), %rcx
	movl	-44(%rbp), %edx                 ## 4-byte Reload
                                        ## kill: def $edx killed $edx def $rdx
	shrl	%edx
	orl	(%rcx,%rdx,4), %esi
	movl	%eax, %edi
	callq	_I915_WRITE
	movl	(%r12), %edi
	callq	_DDI_BUF_CTL
	movl	%eax, %edi
	callq	_POSTING_READ
	movl	$600, %edi                      ## imm = 0x258
	callq	_udelay
	movq	__FDI_RXA_TUSIZE1@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$64, %edi
	callq	_TU_SIZE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	_FDI_RX_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	movq	_FDI_LINK_TRAIN_AUTO@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	movq	__FDI_RXA_CTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movl	%r13d, %esi
	callq	_I915_WRITE
	movl	(%rbx), %edi
	callq	_POSTING_READ
	movl	$30, %edi
	callq	_udelay
	movl	(%r14), %edi
	callq	_I915_READ
	movq	_FDI_RX_PWRDN_LANE0_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_FDI_RX_PWRDN_LANE1_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r14), %edi
	callq	_I915_WRITE
	movl	(%r14), %edi
	callq	_POSTING_READ
	movl	$5, %edi
	callq	_udelay
	movl	(%r12), %edi
	callq	_DP_TP_STATUS
	movl	%eax, %edi
	callq	_I915_READ
	movq	_DP_TP_STATUS_AUTOTRAIN_DONE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_5
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r12), %edi
	callq	_DDI_BUF_CTL
	movl	%eax, %edi
	callq	_I915_READ
	movq	_DDI_BUF_CTL_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	(%r12), %edi
	callq	_DDI_BUF_CTL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	(%r12), %edi
	callq	_DDI_BUF_CTL
	movl	%eax, %edi
	callq	_POSTING_READ
	movl	(%r12), %edi
	callq	_DP_TP_CTL
	movl	%eax, %edi
	callq	_I915_READ
	movq	_DP_TP_CTL_LINK_TRAIN_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_DP_TP_CTL_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movq	_DP_TP_CTL_LINK_TRAIN_PAT1@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	(%r12), %edi
	callq	_DP_TP_CTL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	(%r12), %edi
	callq	_DP_TP_CTL
	movl	%eax, %edi
	callq	_POSTING_READ
	movl	(%r12), %esi
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	_intel_wait_ddi_buf_idle
	movq	_FDI_RX_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r13d
	movq	__FDI_RXA_CTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movl	%r13d, %esi
	callq	_I915_WRITE
	movl	(%rbx), %edi
	callq	_POSTING_READ
	movl	(%r14), %edi
	callq	_I915_READ
	movq	%r14, %r15
	movq	_FDI_RX_PWRDN_LANE0_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	movq	_FDI_RX_PWRDN_LANE1_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r14d
	notl	%r14d
	andl	%eax, %r14d
	movl	$2, %edi
	callq	_FDI_RX_PWRDN_LANE1_VAL
	movl	%eax, %ebx
	movl	$2, %edi
	callq	_FDI_RX_PWRDN_LANE0_VAL
	orl	%eax, %ebx
	orl	%r14d, %ebx
	movq	%r15, %r14
	movq	_PORT_E@GOTPCREL(%rip), %r12
	movl	(%r15), %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	(%r15), %edi
	callq	_POSTING_READ
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	incl	%ebx
	movq	_hsw_ddi_buf_ctl_values@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	callq	_ARRAY_SIZE
	addl	%eax, %eax
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	cmpl	%eax, %ebx
	jl	LBB0_2
LBB0_4:
	leaq	L_.str.1(%rip), %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DRM_ERROR                      ## TAILCALL
LBB0_5:
	leaq	L_.str(%rip), %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_DRM_DEBUG_KMS
	movl	(%r12), %edi
	callq	_DP_TP_CTL
	movq	_DP_TP_CTL_LINK_TRAIN_NORMAL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_DP_TP_CTL_FDI_AUTOTRAIN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_DP_TP_CTL_ENHANCED_FRAME_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_DP_TP_CTL_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movl	%eax, %edi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_I915_WRITE                     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	__FDI_RXA_MISC,4,2              ## @_FDI_RXA_MISC
	.comm	_FDI_RX_TP1_TO_TP2_48,4,2       ## @FDI_RX_TP1_TO_TP2_48
	.comm	_FDI_RX_FDI_DELAY_90,4,2        ## @FDI_RX_FDI_DELAY_90
	.comm	_FDI_RX_ENHANCE_FRAME_ENABLE,4,2 ## @FDI_RX_ENHANCE_FRAME_ENABLE
	.comm	_FDI_RX_PLL_ENABLE,4,2          ## @FDI_RX_PLL_ENABLE
	.comm	__FDI_RXA_CTL,4,2               ## @_FDI_RXA_CTL
	.comm	_FDI_PCDCLK,4,2                 ## @FDI_PCDCLK
	.comm	_PORT_E,4,2                     ## @PORT_E
	.comm	_hsw_ddi_buf_ctl_values,8,3     ## @hsw_ddi_buf_ctl_values
	.comm	_DP_TP_CTL_FDI_AUTOTRAIN,4,2    ## @DP_TP_CTL_FDI_AUTOTRAIN
	.comm	_DP_TP_CTL_ENHANCED_FRAME_ENABLE,4,2 ## @DP_TP_CTL_ENHANCED_FRAME_ENABLE
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT1,4,2  ## @DP_TP_CTL_LINK_TRAIN_PAT1
	.comm	_DP_TP_CTL_ENABLE,4,2           ## @DP_TP_CTL_ENABLE
	.comm	_DDI_BUF_CTL_ENABLE,4,2         ## @DDI_BUF_CTL_ENABLE
	.comm	__FDI_RXA_TUSIZE1,4,2           ## @_FDI_RXA_TUSIZE1
	.comm	_FDI_RX_ENABLE,4,2              ## @FDI_RX_ENABLE
	.comm	_FDI_LINK_TRAIN_AUTO,4,2        ## @FDI_LINK_TRAIN_AUTO
	.comm	_FDI_RX_PWRDN_LANE1_MASK,4,2    ## @FDI_RX_PWRDN_LANE1_MASK
	.comm	_FDI_RX_PWRDN_LANE0_MASK,4,2    ## @FDI_RX_PWRDN_LANE0_MASK
	.comm	_DP_TP_STATUS_AUTOTRAIN_DONE,4,2 ## @DP_TP_STATUS_AUTOTRAIN_DONE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"FDI link training done on step %d\n"

	.comm	_DP_TP_CTL_LINK_TRAIN_NORMAL,4,2 ## @DP_TP_CTL_LINK_TRAIN_NORMAL
	.comm	_DP_TP_CTL_LINK_TRAIN_MASK,4,2  ## @DP_TP_CTL_LINK_TRAIN_MASK
L_.str.1:                               ## @.str.1
	.asciz	"FDI link training failed!\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_hsw_fdi_link_train             ; -- Begin function hsw_fdi_link_train
	.p2align	2
_hsw_fdi_link_train:                    ; @hsw_fdi_link_train
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	x8, [x0]
	ldr	x19, [x8]
	bl	_to_intel_crtc
	mov	x20, x0
Lloh0:
	adrp	x24, __FDI_RXA_MISC@GOTPAGE
Lloh1:
	ldr	x24, [x24, __FDI_RXA_MISC@GOTPAGEOFF]
	ldr	w21, [x24]
	mov	w0, #2
	bl	_FDI_RX_PWRDN_LANE1_VAL
	mov	x22, x0
	mov	w0, #2
	bl	_FDI_RX_PWRDN_LANE0_VAL
	orr	w8, w0, w22
Lloh2:
	adrp	x9, _FDI_RX_TP1_TO_TP2_48@GOTPAGE
Lloh3:
	ldr	x9, [x9, _FDI_RX_TP1_TO_TP2_48@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh5:
	adrp	x9, _FDI_RX_FDI_DELAY_90@GOTPAGE
Lloh6:
	ldr	x9, [x9, _FDI_RX_FDI_DELAY_90@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	orr	w1, w8, w9
	mov	x0, x21
	bl	_I915_WRITE
	str	x19, [sp, #8]                   ; 8-byte Folded Spill
	ldr	w8, [x19]
Lloh8:
	adrp	x9, _FDI_RX_ENHANCE_FRAME_ENABLE@GOTPAGE
Lloh9:
	ldr	x9, [x9, _FDI_RX_ENHANCE_FRAME_ENABLE@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh11:
	adrp	x9, _FDI_RX_PLL_ENABLE@GOTPAGE
Lloh12:
	ldr	x9, [x9, _FDI_RX_PLL_ENABLE@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [x20]
	lsl	w9, w9, #19
	sub	w9, w9, #128, lsl #12           ; =524288
	orr	w21, w8, w9
Lloh14:
	adrp	x25, __FDI_RXA_CTL@GOTPAGE
Lloh15:
	ldr	x25, [x25, __FDI_RXA_CTL@GOTPAGEOFF]
	ldr	w0, [x25]
	mov	x1, x21
	bl	_I915_WRITE
	ldr	w0, [x25]
	bl	_POSTING_READ
	mov	w0, #220
	bl	_udelay
Lloh16:
	adrp	x8, _FDI_PCDCLK@GOTPAGE
Lloh17:
	ldr	x8, [x8, _FDI_PCDCLK@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	orr	w22, w8, w21
	ldr	w0, [x25]
	mov	x1, x22
	bl	_I915_WRITE
Lloh19:
	adrp	x26, _PORT_E@GOTPAGE
Lloh20:
	ldr	x26, [x26, _PORT_E@GOTPAGEOFF]
	ldr	w0, [x26]
	bl	_PORT_CLK_SEL
	str	x20, [sp, #16]                  ; 8-byte Folded Spill
	ldr	w1, [x20, #4]
	bl	_I915_WRITE
Lloh21:
	adrp	x20, _hsw_ddi_buf_ctl_values@GOTPAGE
Lloh22:
	ldr	x20, [x20, _hsw_ddi_buf_ctl_values@GOTPAGEOFF]
	ldr	x0, [x20]
	bl	_ARRAY_SIZE
	cmp	w0, #1
	b.lt	LBB0_4
; %bb.1:
	mov	w21, #0
Lloh23:
	adrp	x19, _DP_TP_CTL_LINK_TRAIN_PAT1@GOTPAGE
Lloh24:
	ldr	x19, [x19, _DP_TP_CTL_LINK_TRAIN_PAT1@GOTPAGEOFF]
Lloh25:
	adrp	x27, _DP_TP_CTL_ENABLE@GOTPAGE
Lloh26:
	ldr	x27, [x27, _DP_TP_CTL_ENABLE@GOTPAGEOFF]
Lloh27:
	adrp	x28, _DDI_BUF_CTL_ENABLE@GOTPAGE
Lloh28:
	ldr	x28, [x28, _DDI_BUF_CTL_ENABLE@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x26]
	bl	_DP_TP_CTL
Lloh29:
	adrp	x8, _DP_TP_CTL_FDI_AUTOTRAIN@GOTPAGE
Lloh30:
	ldr	x8, [x8, _DP_TP_CTL_FDI_AUTOTRAIN@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
Lloh32:
	adrp	x9, _DP_TP_CTL_ENHANCED_FRAME_ENABLE@GOTPAGE
Lloh33:
	ldr	x9, [x9, _DP_TP_CTL_ENHANCED_FRAME_ENABLE@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [x19]
	orr	w8, w8, w9
	ldr	w9, [x27]
	orr	w1, w8, w9
	bl	_I915_WRITE
	ldr	w0, [x26]
	bl	_DDI_BUF_CTL
	ldr	w8, [x28]
	ldr	x9, [sp, #16]                   ; 8-byte Folded Reload
	ldr	w9, [x9]
	lsl	w9, w9, #1
	sub	w9, w9, #2
	orr	w8, w9, w8
	ldr	x9, [x20]
	lsr	w10, w21, #1
	ldr	w9, [x9, w10, uxtw #2]
	orr	w1, w8, w9
	bl	_I915_WRITE
	ldr	w0, [x26]
	bl	_DDI_BUF_CTL
	bl	_POSTING_READ
	mov	w0, #600
	bl	_udelay
Lloh35:
	adrp	x8, __FDI_RXA_TUSIZE1@GOTPAGE
Lloh36:
	ldr	x8, [x8, __FDI_RXA_TUSIZE1@GOTPAGEOFF]
Lloh37:
	ldr	w23, [x8]
	mov	w0, #64
	bl	_TU_SIZE
	mov	x1, x0
	mov	x0, x23
	bl	_I915_WRITE
Lloh38:
	adrp	x8, _FDI_RX_ENABLE@GOTPAGE
Lloh39:
	ldr	x8, [x8, _FDI_RX_ENABLE@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
Lloh41:
	adrp	x9, _FDI_LINK_TRAIN_AUTO@GOTPAGE
Lloh42:
	ldr	x9, [x9, _FDI_LINK_TRAIN_AUTO@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	orr	w8, w8, w22
	orr	w22, w8, w9
	ldr	w0, [x25]
	mov	x1, x22
	bl	_I915_WRITE
	ldr	w0, [x25]
	bl	_POSTING_READ
	mov	w0, #30
	bl	_udelay
	ldr	w0, [x24]
	bl	_I915_READ
Lloh44:
	adrp	x8, _FDI_RX_PWRDN_LANE1_MASK@GOTPAGE
Lloh45:
	ldr	x8, [x8, _FDI_RX_PWRDN_LANE1_MASK@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
Lloh47:
	adrp	x9, _FDI_RX_PWRDN_LANE0_MASK@GOTPAGE
Lloh48:
	ldr	x9, [x9, _FDI_RX_PWRDN_LANE0_MASK@GOTPAGEOFF]
Lloh49:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w1, w0, w8
	ldr	w0, [x24]
	bl	_I915_WRITE
	ldr	w0, [x24]
	bl	_POSTING_READ
	mov	w0, #5
	bl	_udelay
	ldr	w0, [x26]
	bl	_DP_TP_STATUS
	bl	_I915_READ
Lloh50:
	adrp	x8, _DP_TP_STATUS_AUTOTRAIN_DONE@GOTPAGE
Lloh51:
	ldr	x8, [x8, _DP_TP_STATUS_AUTOTRAIN_DONE@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	tst	w8, w0
	b.ne	LBB0_5
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	ldr	w0, [x26]
	bl	_DDI_BUF_CTL
	bl	_I915_READ
	ldr	w8, [x28]
	bic	w23, w0, w8
	ldr	w0, [x26]
	bl	_DDI_BUF_CTL
	mov	x1, x23
	bl	_I915_WRITE
	ldr	w0, [x26]
	bl	_DDI_BUF_CTL
	bl	_POSTING_READ
	ldr	w0, [x26]
	bl	_DP_TP_CTL
	bl	_I915_READ
	ldr	w8, [x27]
Lloh53:
	adrp	x9, _DP_TP_CTL_LINK_TRAIN_MASK@GOTPAGE
Lloh54:
	ldr	x9, [x9, _DP_TP_CTL_LINK_TRAIN_MASK@GOTPAGEOFF]
Lloh55:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w8, w0, w8
	ldr	w9, [x19]
	orr	w23, w8, w9
	ldr	w0, [x26]
	bl	_DP_TP_CTL
	mov	x1, x23
	bl	_I915_WRITE
	ldr	w0, [x26]
	bl	_DP_TP_CTL
	bl	_POSTING_READ
	ldr	w1, [x26]
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
	bl	_intel_wait_ddi_buf_idle
Lloh56:
	adrp	x8, _FDI_RX_ENABLE@GOTPAGE
Lloh57:
	ldr	x8, [x8, _FDI_RX_ENABLE@GOTPAGEOFF]
Lloh58:
	ldr	w8, [x8]
	str	w21, [sp, #28]                  ; 4-byte Folded Spill
	bic	w21, w22, w8
	ldr	w0, [x25]
	mov	x1, x21
	bl	_I915_WRITE
	ldr	w0, [x25]
	bl	_POSTING_READ
	ldr	w0, [x24]
	bl	_I915_READ
Lloh59:
	adrp	x8, _FDI_RX_PWRDN_LANE1_MASK@GOTPAGE
Lloh60:
	ldr	x8, [x8, _FDI_RX_PWRDN_LANE1_MASK@GOTPAGEOFF]
Lloh61:
	ldr	w8, [x8]
Lloh62:
	adrp	x9, _FDI_RX_PWRDN_LANE0_MASK@GOTPAGE
Lloh63:
	ldr	x9, [x9, _FDI_RX_PWRDN_LANE0_MASK@GOTPAGEOFF]
Lloh64:
	ldr	w9, [x9]
	orr	w8, w9, w8
	mov	x22, x26
	mov	x26, x24
	mov	x24, x25
	mov	x25, x28
	mov	x28, x19
	mov	x19, x20
	mov	x20, x27
	bic	w27, w0, w8
	mov	w0, #2
	bl	_FDI_RX_PWRDN_LANE1_VAL
	mov	x23, x0
	mov	w0, #2
	bl	_FDI_RX_PWRDN_LANE0_VAL
	orr	w8, w0, w23
	orr	w1, w8, w27
	mov	x27, x20
	mov	x20, x19
	mov	x19, x28
	mov	x28, x25
	mov	x25, x24
	mov	x24, x26
	mov	x26, x22
	mov	x22, x21
	ldr	w21, [sp, #28]                  ; 4-byte Folded Reload
	ldr	w0, [x24]
	bl	_I915_WRITE
	ldr	w0, [x24]
	bl	_POSTING_READ
	add	w21, w21, #1
	ldr	x0, [x20]
	bl	_ARRAY_SIZE
	cmp	w21, w0, lsl #1
	b.lt	LBB0_2
LBB0_4:
Lloh65:
	adrp	x0, l_.str.1@PAGE
Lloh66:
	add	x0, x0, l_.str.1@PAGEOFF
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	b	_DRM_ERROR
LBB0_5:
Lloh67:
	adrp	x0, l_.str@PAGE
Lloh68:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x21
	bl	_DRM_DEBUG_KMS
	ldr	w0, [x26]
	bl	_DP_TP_CTL
Lloh69:
	adrp	x8, _DP_TP_CTL_FDI_AUTOTRAIN@GOTPAGE
Lloh70:
	ldr	x8, [x8, _DP_TP_CTL_FDI_AUTOTRAIN@GOTPAGEOFF]
Lloh71:
	ldr	w8, [x8]
Lloh72:
	adrp	x9, _DP_TP_CTL_LINK_TRAIN_NORMAL@GOTPAGE
Lloh73:
	ldr	x9, [x9, _DP_TP_CTL_LINK_TRAIN_NORMAL@GOTPAGEOFF]
Lloh74:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh75:
	adrp	x9, _DP_TP_CTL_ENHANCED_FRAME_ENABLE@GOTPAGE
Lloh76:
	ldr	x9, [x9, _DP_TP_CTL_ENHANCED_FRAME_ENABLE@GOTPAGEOFF]
Lloh77:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [x27]
	orr	w1, w8, w9
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	b	_I915_WRITE
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpAdd	Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpAdd	Lloh67, Lloh68
	.cfi_endproc
                                        ; -- End function
	.comm	__FDI_RXA_MISC,4,2              ; @_FDI_RXA_MISC
	.comm	_FDI_RX_TP1_TO_TP2_48,4,2       ; @FDI_RX_TP1_TO_TP2_48
	.comm	_FDI_RX_FDI_DELAY_90,4,2        ; @FDI_RX_FDI_DELAY_90
	.comm	_FDI_RX_ENHANCE_FRAME_ENABLE,4,2 ; @FDI_RX_ENHANCE_FRAME_ENABLE
	.comm	_FDI_RX_PLL_ENABLE,4,2          ; @FDI_RX_PLL_ENABLE
	.comm	__FDI_RXA_CTL,4,2               ; @_FDI_RXA_CTL
	.comm	_FDI_PCDCLK,4,2                 ; @FDI_PCDCLK
	.comm	_PORT_E,4,2                     ; @PORT_E
	.comm	_hsw_ddi_buf_ctl_values,8,3     ; @hsw_ddi_buf_ctl_values
	.comm	_DP_TP_CTL_FDI_AUTOTRAIN,4,2    ; @DP_TP_CTL_FDI_AUTOTRAIN
	.comm	_DP_TP_CTL_ENHANCED_FRAME_ENABLE,4,2 ; @DP_TP_CTL_ENHANCED_FRAME_ENABLE
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT1,4,2  ; @DP_TP_CTL_LINK_TRAIN_PAT1
	.comm	_DP_TP_CTL_ENABLE,4,2           ; @DP_TP_CTL_ENABLE
	.comm	_DDI_BUF_CTL_ENABLE,4,2         ; @DDI_BUF_CTL_ENABLE
	.comm	__FDI_RXA_TUSIZE1,4,2           ; @_FDI_RXA_TUSIZE1
	.comm	_FDI_RX_ENABLE,4,2              ; @FDI_RX_ENABLE
	.comm	_FDI_LINK_TRAIN_AUTO,4,2        ; @FDI_LINK_TRAIN_AUTO
	.comm	_FDI_RX_PWRDN_LANE1_MASK,4,2    ; @FDI_RX_PWRDN_LANE1_MASK
	.comm	_FDI_RX_PWRDN_LANE0_MASK,4,2    ; @FDI_RX_PWRDN_LANE0_MASK
	.comm	_DP_TP_STATUS_AUTOTRAIN_DONE,4,2 ; @DP_TP_STATUS_AUTOTRAIN_DONE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"FDI link training done on step %d\n"

	.comm	_DP_TP_CTL_LINK_TRAIN_NORMAL,4,2 ; @DP_TP_CTL_LINK_TRAIN_NORMAL
	.comm	_DP_TP_CTL_LINK_TRAIN_MASK,4,2  ; @DP_TP_CTL_LINK_TRAIN_MASK
l_.str.1:                               ; @.str.1
	.asciz	"FDI link training failed!\n"

.subsections_via_symbols
