	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nv04_tv_bind
_nv04_tv_bind:                          ## @nv04_tv_bind
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %r14
	xorl	%ebx, %ebx
	testl	%edx, %edx
	setne	%bl
	callq	_nv04_display
	movq	(%rax), %r12
	movslq	%r15d, %r15
	movq	%r15, %r13
	shlq	$4, %r13
	movq	$0, 8(%r12,%r13)
	movq	(%r12,%r13), %rax
	movq	_NV_CIO_CRE_49@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edx
	andl	$-17, %edx
	shll	$4, %ebx
	orl	%edx, %ebx
	movl	%ebx, (%rax,%rcx,4)
	movq	_NV_CIO_CRE_LCD__INDEX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	movl	(%rax,%rdx,4), %ecx
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_NVWriteVgaCrtc
	movq	_NV_CIO_CRE_49@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	(%r12,%r13), %rax
	movl	(%rax,%rdx,4), %ecx
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_NVWriteVgaCrtc
	movq	_NV_PRAMDAC_TV_SETUP@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	8(%r12,%r13), %rcx
	movq	%r14, %rdi
	movl	%r15d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_NVWriteRAMDAC                  ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_NV_CIO_CRE_49,8,3              ## @NV_CIO_CRE_49
	.comm	_NV_CIO_CRE_LCD__INDEX,8,3      ## @NV_CIO_CRE_LCD__INDEX
	.comm	_NV_PRAMDAC_TV_SETUP,4,2        ## @NV_PRAMDAC_TV_SETUP
	.no_dead_strip	_nv04_tv_bind
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nv04_tv_bind
_nv04_tv_bind:                          ; @nv04_tv_bind
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
	cmp	w2, #0
	cset	w21, ne
	bl	_nv04_display
	ldr	x8, [x0]
	add	x22, x8, w19, sxtw #4
	str	xzr, [x22, #8]
	ldr	x8, [x22]
Lloh0:
	adrp	x23, _NV_CIO_CRE_49@GOTPAGE
Lloh1:
	ldr	x23, [x23, _NV_CIO_CRE_49@GOTPAGEOFF]
	ldr	x9, [x23]
	lsl	x9, x9, #2
	ldr	w10, [x8, x9]
	bfi	w10, w21, #4, #1
	str	w10, [x8, x9]
Lloh2:
	adrp	x9, _NV_CIO_CRE_LCD__INDEX@GOTPAGE
Lloh3:
	ldr	x9, [x9, _NV_CIO_CRE_LCD__INDEX@GOTPAGEOFF]
Lloh4:
	ldr	x2, [x9]
	ldr	w3, [x8, x2, lsl #2]
	mov	x0, x20
	mov	x1, x19
	bl	_NVWriteVgaCrtc
	ldr	x2, [x23]
	ldr	x8, [x22]
	ldr	w3, [x8, x2, lsl #2]
	mov	x0, x20
	mov	x1, x19
	bl	_NVWriteVgaCrtc
Lloh5:
	adrp	x8, _NV_PRAMDAC_TV_SETUP@GOTPAGE
Lloh6:
	ldr	x8, [x8, _NV_PRAMDAC_TV_SETUP@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	ldr	x3, [x22, #8]
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_NVWriteRAMDAC
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_NV_CIO_CRE_49,8,3              ; @NV_CIO_CRE_49
	.comm	_NV_CIO_CRE_LCD__INDEX,8,3      ; @NV_CIO_CRE_LCD__INDEX
	.comm	_NV_PRAMDAC_TV_SETUP,4,2        ; @NV_PRAMDAC_TV_SETUP
	.no_dead_strip	_nv04_tv_bind
.subsections_via_symbols
