	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nv50_dmaobj_bind
_nv50_dmaobj_bind:                      ## @nv50_dmaobj_bind
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdx, %rdi
	callq	_nv_mclass
	movl	%eax, %ebx
	movq	_NV_ENGCTX_CLASS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_nv_iclass
	testl	%eax, %eax
	jne	LBB0_3
## %bb.1:
	movq	(%r12), %rdi
	callq	_nv_mclass
	addl	$-136, %eax
	cmpl	$19, %eax
	jae	LBB0_2
LBB0_3:
	movl	(%r15), %r13d
	movl	4(%r15), %eax
	movq	_NV50_DMA_CONF0_ENABLE@GOTPCREL(%rip), %rcx
	testl	%r13d, (%rcx)
	jne	LBB0_5
## %bb.4:
	cmpl	$129, %eax
	movq	_NV50_DMA_CONF0_PRIV_US@GOTPCREL(%rip), %rcx
	cmoveq	_NV50_DMA_CONF0_PRIV_VM@GOTPCREL(%rip), %rcx
	movq	_NV50_DMA_CONF0_PART_256@GOTPCREL(%rip), %rdx
	cmoveq	_NV50_DMA_CONF0_PART_VM@GOTPCREL(%rip), %rdx
	movq	_NV50_DMA_CONF0_COMP_NONE@GOTPCREL(%rip), %rsi
	cmoveq	_NV50_DMA_CONF0_COMP_VM@GOTPCREL(%rip), %rsi
	movq	_NV50_DMA_CONF0_TYPE_LINEAR@GOTPCREL(%rip), %rdi
	cmoveq	_NV50_DMA_CONF0_TYPE_VM@GOTPCREL(%rip), %rdi
	movl	(%rcx), %r13d
	movl	%r13d, (%r15)
	orl	(%rdx), %r13d
	movl	%r13d, (%r15)
	orl	(%rsi), %r13d
	movl	%r13d, (%r15)
	orl	(%rdi), %r13d
	movl	%r13d, (%r15)
LBB0_5:
	addl	$-128, %eax
	cmpl	$3, %eax
	ja	LBB0_2
## %bb.6:
	movq	_NV50_DMA_CONF0_COMP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	_NV50_DMA_CONF0_TYPE@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	andl	%r13d, %ecx
	shll	$22, %ecx
	orl	%ebx, %ecx
	movq	_NV50_DMA_CONF0_PRIV@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	andl	%r13d, %ebx
	orl	%ecx, %ebx
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_9:
	orl	$65536, %ebx                    ## imm = 0x10000
	jmp	LBB0_10
LBB0_2:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_17
LBB0_8:
	orl	$196608, %ebx                   ## imm = 0x30000
	jmp	LBB0_10
LBB0_7:
	orl	$131072, %ebx                   ## imm = 0x20000
LBB0_10:
	movq	_NV50_DMA_CONF0_PART@GOTPCREL(%rip), %rax
	movl	8(%r15), %ecx
	cmpl	$132, %ecx
	je	LBB0_14
## %bb.11:
	cmpl	$134, %ecx
	je	LBB0_14
## %bb.12:
	cmpl	$135, %ecx
	jne	LBB0_15
## %bb.13:
	orl	$262144, %ebx                   ## imm = 0x40000
	jmp	LBB0_15
LBB0_14:
	orl	$524288, %ebx                   ## imm = 0x80000
LBB0_15:
	andl	(%rax), %r13d
	movq	%r12, %rdi
	movq	%r12, %rsi
	movl	$24, %edx
	movl	$32, %ecx
	xorl	%r8d, %r8d
	movq	%r14, %r9
	callq	_nouveau_gpuobj_new
	testl	%eax, %eax
	jne	LBB0_17
## %bb.16:
	movq	(%r14), %rdi
	xorl	%esi, %esi
	movl	%ebx, %edx
	callq	_nv_wo32
	movq	(%r14), %rbx
	movl	16(%r15), %edi
	callq	_lower_32_bits
	movq	%rbx, %rdi
	movl	$4, %esi
	movl	%eax, %edx
	callq	_nv_wo32
	movq	(%r14), %rbx
	movl	12(%r15), %edi
	callq	_lower_32_bits
	movq	%rbx, %rdi
	movl	$8, %esi
	movl	%eax, %edx
	callq	_nv_wo32
	movq	(%r14), %r12
	movl	16(%r15), %edi
	callq	_upper_32_bits
	movl	%eax, %ebx
	shll	$24, %ebx
	movl	12(%r15), %edi
	callq	_upper_32_bits
	orl	%eax, %ebx
	movq	%r12, %rdi
	movl	$12, %esi
	movl	%ebx, %edx
	callq	_nv_wo32
	movq	(%r14), %rdi
	movl	$16, %esi
	xorl	%edx, %edx
	callq	_nv_wo32
	movq	(%r14), %rdi
	movl	$20, %esi
	movl	%r13d, %edx
	callq	_nv_wo32
	xorl	%eax, %eax
LBB0_17:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
LJTI0_0:
	.long	L0_0_set_9
	.long	L0_0_set_10
	.long	L0_0_set_8
	.long	L0_0_set_7
	.end_data_region
                                        ## -- End function
	.comm	_NV_ENGCTX_CLASS,4,2            ## @NV_ENGCTX_CLASS
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_NV50_DMA_CONF0_ENABLE,4,2      ## @NV50_DMA_CONF0_ENABLE
	.comm	_NV50_DMA_CONF0_PRIV_VM,4,2     ## @NV50_DMA_CONF0_PRIV_VM
	.comm	_NV50_DMA_CONF0_PART_VM,4,2     ## @NV50_DMA_CONF0_PART_VM
	.comm	_NV50_DMA_CONF0_COMP_VM,4,2     ## @NV50_DMA_CONF0_COMP_VM
	.comm	_NV50_DMA_CONF0_TYPE_VM,4,2     ## @NV50_DMA_CONF0_TYPE_VM
	.comm	_NV50_DMA_CONF0_PRIV_US,4,2     ## @NV50_DMA_CONF0_PRIV_US
	.comm	_NV50_DMA_CONF0_PART_256,4,2    ## @NV50_DMA_CONF0_PART_256
	.comm	_NV50_DMA_CONF0_COMP_NONE,4,2   ## @NV50_DMA_CONF0_COMP_NONE
	.comm	_NV50_DMA_CONF0_TYPE_LINEAR,4,2 ## @NV50_DMA_CONF0_TYPE_LINEAR
	.comm	_NV50_DMA_CONF0_COMP,4,2        ## @NV50_DMA_CONF0_COMP
	.comm	_NV50_DMA_CONF0_TYPE,4,2        ## @NV50_DMA_CONF0_TYPE
	.comm	_NV50_DMA_CONF0_PRIV,4,2        ## @NV50_DMA_CONF0_PRIV
	.comm	_NV50_DMA_CONF0_PART,4,2        ## @NV50_DMA_CONF0_PART
	.no_dead_strip	_nv50_dmaobj_bind
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nv50_dmaobj_bind
_nv50_dmaobj_bind:                      ; @nv50_dmaobj_bind
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x3
	mov	x20, x2
	mov	x21, x1
	mov	x0, x2
	bl	_nv_mclass
	mov	x22, x0
Lloh0:
	adrp	x8, _NV_ENGCTX_CLASS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NV_ENGCTX_CLASS@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_nv_iclass
	cbnz	w0, LBB0_2
; %bb.1:
	ldr	x0, [x21]
	bl	_nv_mclass
	sub	w8, w0, #136
	cmp	w8, #19
	b.hs	LBB0_7
LBB0_2:
Lloh3:
	adrp	x8, _NV50_DMA_CONF0_ENABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _NV50_DMA_CONF0_ENABLE@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x8]
	ldp	w23, w8, [x20]
	tst	w9, w23
	b.ne	LBB0_4
; %bb.3:
Lloh6:
	adrp	x9, _NV50_DMA_CONF0_PRIV_VM@GOTPAGE
Lloh7:
	ldr	x9, [x9, _NV50_DMA_CONF0_PRIV_VM@GOTPAGEOFF]
Lloh8:
	adrp	x10, _NV50_DMA_CONF0_PRIV_US@GOTPAGE
Lloh9:
	ldr	x10, [x10, _NV50_DMA_CONF0_PRIV_US@GOTPAGEOFF]
	cmp	w8, #129
	csel	x9, x9, x10, eq
	ldr	w9, [x9]
	str	w9, [x20]
Lloh10:
	adrp	x10, _NV50_DMA_CONF0_PART_VM@GOTPAGE
Lloh11:
	ldr	x10, [x10, _NV50_DMA_CONF0_PART_VM@GOTPAGEOFF]
Lloh12:
	adrp	x11, _NV50_DMA_CONF0_PART_256@GOTPAGE
Lloh13:
	ldr	x11, [x11, _NV50_DMA_CONF0_PART_256@GOTPAGEOFF]
	csel	x10, x10, x11, eq
	ldr	w10, [x10]
	orr	w9, w10, w9
	str	w9, [x20]
Lloh14:
	adrp	x10, _NV50_DMA_CONF0_COMP_VM@GOTPAGE
Lloh15:
	ldr	x10, [x10, _NV50_DMA_CONF0_COMP_VM@GOTPAGEOFF]
Lloh16:
	adrp	x11, _NV50_DMA_CONF0_COMP_NONE@GOTPAGE
Lloh17:
	ldr	x11, [x11, _NV50_DMA_CONF0_COMP_NONE@GOTPAGEOFF]
	csel	x10, x10, x11, eq
	ldr	w10, [x10]
	orr	w9, w10, w9
	str	w9, [x20]
Lloh18:
	adrp	x10, _NV50_DMA_CONF0_TYPE_VM@GOTPAGE
Lloh19:
	ldr	x10, [x10, _NV50_DMA_CONF0_TYPE_VM@GOTPAGEOFF]
Lloh20:
	adrp	x11, _NV50_DMA_CONF0_TYPE_LINEAR@GOTPAGE
Lloh21:
	ldr	x11, [x11, _NV50_DMA_CONF0_TYPE_LINEAR@GOTPAGEOFF]
	csel	x10, x10, x11, eq
	ldr	w10, [x10]
	orr	w23, w10, w9
	str	w23, [x20]
LBB0_4:
	sub	w9, w8, #128
	cmp	w9, #3
	b.hi	LBB0_7
; %bb.5:
Lloh22:
	adrp	x8, _NV50_DMA_CONF0_COMP@GOTPAGE
Lloh23:
	ldr	x8, [x8, _NV50_DMA_CONF0_COMP@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
Lloh25:
	adrp	x10, _NV50_DMA_CONF0_TYPE@GOTPAGE
Lloh26:
	ldr	x10, [x10, _NV50_DMA_CONF0_TYPE@GOTPAGEOFF]
Lloh27:
	ldr	w10, [x10]
	orr	w8, w8, w10
	and	w8, w8, w23
	orr	w8, w22, w8, lsl #22
Lloh28:
	adrp	x10, _NV50_DMA_CONF0_PRIV@GOTPAGE
Lloh29:
	ldr	x10, [x10, _NV50_DMA_CONF0_PRIV@GOTPAGEOFF]
Lloh30:
	ldr	w10, [x10]
	and	w10, w10, w23
	orr	w8, w8, w10
Lloh31:
	adrp	x10, lJTI0_0@PAGE
Lloh32:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_6
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_6:
	orr	w8, w8, #0x10000
	b	LBB0_10
LBB0_7:
Lloh33:
	adrp	x8, _EINVAL@GOTPAGE
Lloh34:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_16
LBB0_8:
	orr	w8, w8, #0x30000
	b	LBB0_10
LBB0_9:
	orr	w8, w8, #0x20000
LBB0_10:
Lloh36:
	adrp	x9, _NV50_DMA_CONF0_PART@GOTPAGE
Lloh37:
	ldr	x9, [x9, _NV50_DMA_CONF0_PART@GOTPAGEOFF]
	ldr	w10, [x20, #8]
	cmp	w10, #132
	b.eq	LBB0_13
; %bb.11:
	cmp	w10, #134
	b.eq	LBB0_13
; %bb.12:
	orr	w11, w8, #0x40000
	cmp	w10, #135
	csel	w22, w8, w11, ne
	b	LBB0_14
LBB0_13:
	orr	w22, w8, #0x80000
LBB0_14:
	ldr	w24, [x9]
	mov	x0, x21
	mov	x1, x21
	mov	w2, #24
	mov	w3, #32
	mov	w4, #0
	mov	x5, x19
	bl	_nouveau_gpuobj_new
	cbnz	w0, LBB0_16
; %bb.15:
	and	w21, w24, w23
	ldr	x0, [x19]
	mov	w1, #0
	mov	x2, x22
	bl	_nv_wo32
	ldr	x22, [x19]
	ldr	w0, [x20, #16]
	bl	_lower_32_bits
	mov	x2, x0
	mov	x0, x22
	mov	w1, #4
	bl	_nv_wo32
	ldr	x22, [x19]
	ldr	w0, [x20, #12]
	bl	_lower_32_bits
	mov	x2, x0
	mov	x0, x22
	mov	w1, #8
	bl	_nv_wo32
	ldr	x22, [x19]
	ldr	w0, [x20, #16]
	bl	_upper_32_bits
	mov	x23, x0
	ldr	w0, [x20, #12]
	bl	_upper_32_bits
	orr	w2, w0, w23, lsl #24
	mov	x0, x22
	mov	w1, #12
	bl	_nv_wo32
	ldr	x0, [x19]
	mov	w1, #16
	mov	w2, #0
	bl	_nv_wo32
	ldr	x0, [x19]
	mov	w1, #20
	mov	x2, x21
	bl	_nv_wo32
	mov	w0, #0
LBB0_16:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpAdd	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh36, Lloh37
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_6-LBB0_6)>>2
	.byte	(LBB0_10-LBB0_6)>>2
	.byte	(LBB0_8-LBB0_6)>>2
	.byte	(LBB0_9-LBB0_6)>>2
                                        ; -- End function
	.comm	_NV_ENGCTX_CLASS,4,2            ; @NV_ENGCTX_CLASS
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_NV50_DMA_CONF0_ENABLE,4,2      ; @NV50_DMA_CONF0_ENABLE
	.comm	_NV50_DMA_CONF0_PRIV_VM,4,2     ; @NV50_DMA_CONF0_PRIV_VM
	.comm	_NV50_DMA_CONF0_PART_VM,4,2     ; @NV50_DMA_CONF0_PART_VM
	.comm	_NV50_DMA_CONF0_COMP_VM,4,2     ; @NV50_DMA_CONF0_COMP_VM
	.comm	_NV50_DMA_CONF0_TYPE_VM,4,2     ; @NV50_DMA_CONF0_TYPE_VM
	.comm	_NV50_DMA_CONF0_PRIV_US,4,2     ; @NV50_DMA_CONF0_PRIV_US
	.comm	_NV50_DMA_CONF0_PART_256,4,2    ; @NV50_DMA_CONF0_PART_256
	.comm	_NV50_DMA_CONF0_COMP_NONE,4,2   ; @NV50_DMA_CONF0_COMP_NONE
	.comm	_NV50_DMA_CONF0_TYPE_LINEAR,4,2 ; @NV50_DMA_CONF0_TYPE_LINEAR
	.comm	_NV50_DMA_CONF0_COMP,4,2        ; @NV50_DMA_CONF0_COMP
	.comm	_NV50_DMA_CONF0_TYPE,4,2        ; @NV50_DMA_CONF0_TYPE
	.comm	_NV50_DMA_CONF0_PRIV,4,2        ; @NV50_DMA_CONF0_PRIV
	.comm	_NV50_DMA_CONF0_PART,4,2        ; @NV50_DMA_CONF0_PART
	.no_dead_strip	_nv50_dmaobj_bind
.subsections_via_symbols
