	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_wait_irq
_radeon_wait_irq:                       ## @radeon_wait_irq
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r13d
	movq	(%rdi), %rbx
	movq	_RADEON_LAST_SWI_REG@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_RADEON_READ
	cmpl	%r13d, %eax
	jge	LBB0_2
## %bb.1:
	movq	_RADEON_BOX_WAIT_IDLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 4(%rbx)
	movl	(%rbx), %r14d
	movq	_DRM_HZ@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	leal	(%rax,%rax,2), %r15d
	movl	(%r12), %edi
	callq	_RADEON_READ
	xorl	%ecx, %ecx
	cmpl	%r13d, %eax
	setge	%cl
	xorl	%edi, %edi
	movl	%r14d, %esi
	movl	%r15d, %edx
	callq	_DRM_WAIT_ON
LBB0_2:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_LAST_SWI_REG,4,2        ## @RADEON_LAST_SWI_REG
	.comm	_RADEON_BOX_WAIT_IDLE,4,2       ## @RADEON_BOX_WAIT_IDLE
	.comm	_DRM_HZ,4,2                     ## @DRM_HZ
	.no_dead_strip	_radeon_wait_irq
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_wait_irq
_radeon_wait_irq:                       ; @radeon_wait_irq
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	ldr	x21, [x0]
Lloh0:
	adrp	x22, _RADEON_LAST_SWI_REG@GOTPAGE
Lloh1:
	ldr	x22, [x22, _RADEON_LAST_SWI_REG@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_RADEON_READ
	cmp	w0, w19
	b.ge	LBB0_2
; %bb.1:
Lloh2:
	adrp	x8, _RADEON_BOX_WAIT_IDLE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RADEON_BOX_WAIT_IDLE@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	ldp	w20, w9, [x21]
	orr	w8, w9, w8
	str	w8, [x21, #4]
Lloh5:
	adrp	x8, _DRM_HZ@GOTPAGE
Lloh6:
	ldr	x8, [x8, _DRM_HZ@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	add	w21, w8, w8, lsl #1
	ldr	w0, [x22]
	bl	_RADEON_READ
	cmp	w0, w19
	cset	w3, ge
	mov	w0, #0
	mov	x1, x20
	mov	x2, x21
	bl	_DRM_WAIT_ON
LBB0_2:
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_LAST_SWI_REG,4,2        ; @RADEON_LAST_SWI_REG
	.comm	_RADEON_BOX_WAIT_IDLE,4,2       ; @RADEON_BOX_WAIT_IDLE
	.comm	_DRM_HZ,4,2                     ; @DRM_HZ
	.no_dead_strip	_radeon_wait_irq
.subsections_via_symbols
