	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_cp_getparam
_radeon_cp_getparam:                    ## @radeon_cp_getparam
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	(%rdi), %r15
	movq	_DRM_CURRENTPID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG
	movl	(%r14), %esi
	leal	-128(%rsi), %eax
	cmpl	$15, %eax
	ja	LBB0_7
## %bb.1:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_2:
	movq	%rbx, %rdi
	callq	_radeon_vblank_crtc_get
	jmp	LBB0_29
LBB0_3:
	movl	12(%r15), %eax
	jmp	LBB0_29
LBB0_4:
	cmpl	$0, 28(%r15)
	je	LBB0_23
## %bb.5:
	movq	_RADEON_FAMILY_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	4(%r15), %eax
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jge	LBB0_26
## %bb.6:
	movq	_RADEON_SCRATCH_REG_OFFSET@GOTPCREL(%rip), %rax
	jmp	LBB0_28
LBB0_7:
	leaq	L_.str.1(%rip), %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_DRM_DEBUG
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	jmp	LBB0_32
LBB0_8:
	movq	32(%r15), %rax
	jmp	LBB0_28
LBB0_9:
	movl	24(%r15), %eax
	jmp	LBB0_29
LBB0_10:
	movl	20(%r15), %eax
	jmp	LBB0_29
LBB0_11:
	incl	44(%r15)
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_GET_SCRATCH
	jmp	LBB0_29
LBB0_12:
	movq	%r15, %rdi
	movl	$1, %esi
	callq	_GET_SCRATCH
	jmp	LBB0_29
LBB0_13:
	incl	40(%r15)
	movq	%r15, %rdi
	movl	$2, %esi
	callq	_GET_SCRATCH
	jmp	LBB0_29
LBB0_14:
	movq	_RADEON_FAMILY_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	4(%r15), %eax
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jge	LBB0_22
## %bb.15:
	movq	%rbx, %rdi
	callq	_drm_dev_to_irq
	jmp	LBB0_29
LBB0_16:
	movl	16(%r15), %eax
	jmp	LBB0_29
LBB0_17:
	movl	(%r15), %eax
	jmp	LBB0_29
LBB0_18:
	movl	8(%r15), %eax
	jmp	LBB0_29
LBB0_19:
	movq	%r15, %rdi
	callq	_radeon_read_fb_location
	jmp	LBB0_29
LBB0_20:
	movl	4(%r15), %eax
	movq	_RADEON_IS_PCIE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_24
## %bb.21:
	movq	_RADEON_CARD_PCIE@GOTPCREL(%rip), %rax
	jmp	LBB0_28
LBB0_22:
	movl	$0, -28(%rbp)
	jmp	LBB0_30
LBB0_23:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	jmp	LBB0_32
LBB0_24:
	movq	_RADEON_IS_AGP@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_27
## %bb.25:
	movq	_RADEON_CARD_AGP@GOTPCREL(%rip), %rax
	jmp	LBB0_28
LBB0_26:
	movq	_R600_SCRATCH_REG_OFFSET@GOTPCREL(%rip), %rax
	jmp	LBB0_28
LBB0_27:
	movq	_RADEON_CARD_PCI@GOTPCREL(%rip), %rax
LBB0_28:
	movl	(%rax), %eax
LBB0_29:
	movl	%eax, -28(%rbp)
LBB0_30:
	movl	4(%r14), %edi
	leaq	-28(%rbp), %rsi
	movl	$4, %edx
	callq	_DRM_COPY_TO_USER
	testq	%rax, %rax
	je	LBB0_33
## %bb.31:
	leaq	L_.str.2(%rip), %rdi
	callq	_DRM_ERROR
	movq	_EFAULT@GOTPCREL(%rip), %rcx
LBB0_32:
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_34
LBB0_33:
	xorl	%eax, %eax
LBB0_34:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_12, LBB0_12-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_17, LBB0_17-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_19, LBB0_19-LJTI0_0
.set L0_0_set_20, LBB0_20-LJTI0_0
LJTI0_0:
	.long	L0_0_set_2
	.long	L0_0_set_3
	.long	L0_0_set_4
	.long	L0_0_set_7
	.long	L0_0_set_8
	.long	L0_0_set_9
	.long	L0_0_set_10
	.long	L0_0_set_11
	.long	L0_0_set_12
	.long	L0_0_set_13
	.long	L0_0_set_14
	.long	L0_0_set_16
	.long	L0_0_set_17
	.long	L0_0_set_18
	.long	L0_0_set_19
	.long	L0_0_set_20
	.end_data_region
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"pid=%d\n"

	.comm	_DRM_CURRENTPID,4,2             ## @DRM_CURRENTPID
	.comm	_RADEON_FAMILY_MASK,4,2         ## @RADEON_FAMILY_MASK
	.comm	_CHIP_R600,4,2                  ## @CHIP_R600
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_R600_SCRATCH_REG_OFFSET,4,2    ## @R600_SCRATCH_REG_OFFSET
	.comm	_RADEON_SCRATCH_REG_OFFSET,4,2  ## @RADEON_SCRATCH_REG_OFFSET
	.comm	_RADEON_IS_PCIE,4,2             ## @RADEON_IS_PCIE
	.comm	_RADEON_CARD_PCIE,4,2           ## @RADEON_CARD_PCIE
	.comm	_RADEON_IS_AGP,4,2              ## @RADEON_IS_AGP
	.comm	_RADEON_CARD_AGP,4,2            ## @RADEON_CARD_AGP
	.comm	_RADEON_CARD_PCI,4,2            ## @RADEON_CARD_PCI
L_.str.1:                               ## @.str.1
	.asciz	"Invalid parameter %d\n"

L_.str.2:                               ## @.str.2
	.asciz	"copy_to_user\n"

	.comm	_EFAULT,4,2                     ## @EFAULT
	.no_dead_strip	_radeon_cp_getparam
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_cp_getparam
_radeon_cp_getparam:                    ; @radeon_cp_getparam
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x21, x0
	ldr	x20, [x0]
Lloh0:
	adrp	x8, _DRM_CURRENTPID@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DRM_CURRENTPID@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w1, [x19]
	sub	w8, w1, #128
	cmp	w8, #15
	b.hi	LBB0_7
; %bb.1:
Lloh5:
	adrp	x9, lJTI0_0@PAGE
Lloh6:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
	mov	x0, x21
	bl	_radeon_vblank_crtc_get
	str	w0, [sp, #12]
	b	LBB0_31
LBB0_3:
	ldr	w8, [x20, #12]
	b	LBB0_30
LBB0_4:
	ldr	w8, [x20, #28]
	cbz	w8, LBB0_8
; %bb.5:
	ldr	w8, [x20, #4]
Lloh7:
	adrp	x9, _RADEON_FAMILY_MASK@GOTPAGE
Lloh8:
	ldr	x9, [x9, _RADEON_FAMILY_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh10:
	adrp	x9, _CHIP_R600@GOTPAGE
Lloh11:
	ldr	x9, [x9, _CHIP_R600@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ge	LBB0_27
; %bb.6:
Lloh13:
	adrp	x8, _RADEON_SCRATCH_REG_OFFSET@GOTPAGE
Lloh14:
	ldr	x8, [x8, _RADEON_SCRATCH_REG_OFFSET@GOTPAGEOFF]
	b	LBB0_29
LBB0_7:
Lloh15:
	adrp	x0, l_.str.1@PAGE
Lloh16:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_DEBUG
LBB0_8:
Lloh17:
	adrp	x8, _EINVAL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_33
LBB0_9:
	ldr	x8, [x20, #32]
	b	LBB0_29
LBB0_10:
	ldr	w8, [x20, #24]
	b	LBB0_30
LBB0_11:
	ldr	w8, [x20, #20]
	b	LBB0_30
LBB0_12:
	ldr	w8, [x20, #44]
	add	w8, w8, #1
	str	w8, [x20, #44]
	mov	x0, x20
	mov	w1, #0
	b	LBB0_15
LBB0_13:
	mov	x0, x20
	mov	w1, #1
	b	LBB0_15
LBB0_14:
	ldr	w8, [x20, #40]
	add	w8, w8, #1
	str	w8, [x20, #40]
	mov	x0, x20
	mov	w1, #2
LBB0_15:
	bl	_GET_SCRATCH
	str	w0, [sp, #12]
	b	LBB0_31
LBB0_16:
	ldr	w8, [x20, #4]
Lloh19:
	adrp	x9, _RADEON_FAMILY_MASK@GOTPAGE
Lloh20:
	ldr	x9, [x9, _RADEON_FAMILY_MASK@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh22:
	adrp	x9, _CHIP_R600@GOTPAGE
Lloh23:
	ldr	x9, [x9, _CHIP_R600@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ge	LBB0_24
; %bb.17:
	mov	x0, x21
	bl	_drm_dev_to_irq
	str	w0, [sp, #12]
	b	LBB0_31
LBB0_18:
	ldr	w8, [x20, #16]
	b	LBB0_30
LBB0_19:
	ldr	w8, [x20]
	b	LBB0_30
LBB0_20:
	ldr	w8, [x20, #8]
	b	LBB0_30
LBB0_21:
	mov	x0, x20
	bl	_radeon_read_fb_location
	str	w0, [sp, #12]
	b	LBB0_31
LBB0_22:
	ldr	w8, [x20, #4]
Lloh25:
	adrp	x9, _RADEON_IS_PCIE@GOTPAGE
Lloh26:
	ldr	x9, [x9, _RADEON_IS_PCIE@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_25
; %bb.23:
Lloh28:
	adrp	x8, _RADEON_CARD_PCIE@GOTPAGE
Lloh29:
	ldr	x8, [x8, _RADEON_CARD_PCIE@GOTPAGEOFF]
	b	LBB0_29
LBB0_24:
	str	wzr, [sp, #12]
	b	LBB0_31
LBB0_25:
Lloh30:
	adrp	x9, _RADEON_IS_AGP@GOTPAGE
Lloh31:
	ldr	x9, [x9, _RADEON_IS_AGP@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_28
; %bb.26:
Lloh33:
	adrp	x8, _RADEON_CARD_AGP@GOTPAGE
Lloh34:
	ldr	x8, [x8, _RADEON_CARD_AGP@GOTPAGEOFF]
	b	LBB0_29
LBB0_27:
Lloh35:
	adrp	x8, _R600_SCRATCH_REG_OFFSET@GOTPAGE
Lloh36:
	ldr	x8, [x8, _R600_SCRATCH_REG_OFFSET@GOTPAGEOFF]
	b	LBB0_29
LBB0_28:
Lloh37:
	adrp	x8, _RADEON_CARD_PCI@GOTPAGE
Lloh38:
	ldr	x8, [x8, _RADEON_CARD_PCI@GOTPAGEOFF]
LBB0_29:
	ldr	w8, [x8]
LBB0_30:
	str	w8, [sp, #12]
LBB0_31:
	ldr	w0, [x19, #4]
	add	x1, sp, #12
	mov	w2, #4
	bl	_DRM_COPY_TO_USER
	cbz	x0, LBB0_34
; %bb.32:
Lloh39:
	adrp	x0, l_.str.2@PAGE
Lloh40:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_ERROR
Lloh41:
	adrp	x8, _EFAULT@GOTPAGE
Lloh42:
	ldr	x8, [x8, _EFAULT@GOTPAGEOFF]
LBB0_33:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_34:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpAdd	Lloh39, Lloh40
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
	.byte	(LBB0_9-LBB0_2)>>2
	.byte	(LBB0_10-LBB0_2)>>2
	.byte	(LBB0_11-LBB0_2)>>2
	.byte	(LBB0_12-LBB0_2)>>2
	.byte	(LBB0_13-LBB0_2)>>2
	.byte	(LBB0_14-LBB0_2)>>2
	.byte	(LBB0_16-LBB0_2)>>2
	.byte	(LBB0_18-LBB0_2)>>2
	.byte	(LBB0_19-LBB0_2)>>2
	.byte	(LBB0_20-LBB0_2)>>2
	.byte	(LBB0_21-LBB0_2)>>2
	.byte	(LBB0_22-LBB0_2)>>2
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"pid=%d\n"

	.comm	_DRM_CURRENTPID,4,2             ; @DRM_CURRENTPID
	.comm	_RADEON_FAMILY_MASK,4,2         ; @RADEON_FAMILY_MASK
	.comm	_CHIP_R600,4,2                  ; @CHIP_R600
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_R600_SCRATCH_REG_OFFSET,4,2    ; @R600_SCRATCH_REG_OFFSET
	.comm	_RADEON_SCRATCH_REG_OFFSET,4,2  ; @RADEON_SCRATCH_REG_OFFSET
	.comm	_RADEON_IS_PCIE,4,2             ; @RADEON_IS_PCIE
	.comm	_RADEON_CARD_PCIE,4,2           ; @RADEON_CARD_PCIE
	.comm	_RADEON_IS_AGP,4,2              ; @RADEON_IS_AGP
	.comm	_RADEON_CARD_AGP,4,2            ; @RADEON_CARD_AGP
	.comm	_RADEON_CARD_PCI,4,2            ; @RADEON_CARD_PCI
l_.str.1:                               ; @.str.1
	.asciz	"Invalid parameter %d\n"

l_.str.2:                               ; @.str.2
	.asciz	"copy_to_user\n"

	.comm	_EFAULT,4,2                     ; @EFAULT
	.no_dead_strip	_radeon_cp_getparam
.subsections_via_symbols
