	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_pll_wreg                  ## -- Begin function r100_pll_wreg
	.p2align	4, 0x90
_r100_pll_wreg:                         ## @r100_pll_wreg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%edx, %r14d
	movq	%rdi, %rbx
	movq	_RADEON_CLOCK_CNTL_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	$63, %esi
	movq	_RADEON_PLL_WR_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	callq	_WREG8
	movq	%rbx, %rdi
	callq	_r100_pll_errata_after_index
	movq	_RADEON_CLOCK_CNTL_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	callq	_WREG32
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_r100_pll_errata_after_data     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_CLOCK_CNTL_INDEX,4,2    ## @RADEON_CLOCK_CNTL_INDEX
	.comm	_RADEON_PLL_WR_EN,4,2           ## @RADEON_PLL_WR_EN
	.comm	_RADEON_CLOCK_CNTL_DATA,4,2     ## @RADEON_CLOCK_CNTL_DATA
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_pll_wreg                  ; -- Begin function r100_pll_wreg
	.p2align	2
_r100_pll_wreg:                         ; @r100_pll_wreg
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x2
	mov	x20, x0
Lloh0:
	adrp	x8, _RADEON_CLOCK_CNTL_INDEX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_CLOCK_CNTL_INDEX@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	and	w8, w1, #0x3f
Lloh3:
	adrp	x9, _RADEON_PLL_WR_EN@GOTPAGE
Lloh4:
	ldr	x9, [x9, _RADEON_PLL_WR_EN@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_WREG8
	mov	x0, x20
	bl	_r100_pll_errata_after_index
Lloh6:
	adrp	x8, _RADEON_CLOCK_CNTL_DATA@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RADEON_CLOCK_CNTL_DATA@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_WREG32
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_r100_pll_errata_after_data
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_CLOCK_CNTL_INDEX,4,2    ; @RADEON_CLOCK_CNTL_INDEX
	.comm	_RADEON_PLL_WR_EN,4,2           ; @RADEON_PLL_WR_EN
	.comm	_RADEON_CLOCK_CNTL_DATA,4,2     ; @RADEON_CLOCK_CNTL_DATA
.subsections_via_symbols
