	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function octeon_cf_set_piomode
_octeon_cf_set_piomode:                 ## @octeon_cf_set_piomode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	(%rdi), %rax
	movq	(%rax), %r15
	movl	(%r15), %ebx
	xorl	%eax, %eax
	callq	_octeon_get_clock_rate
	movq	%rax, %rcx
	movabsq	$2000000000000, %rax            ## imm = 0x1D1A94A2000
	xorl	%edx, %edx
	idivq	%rcx
	movl	(%r14), %esi
	leaq	-40(%rbp), %rdx
	movq	%r14, %rdi
	movl	%eax, %ecx
	movl	%eax, %r8d
	callq	_ata_timing_compute
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	xorl	%eax, %eax
	callq	_BUG
LBB0_2:
	movl	$2, %edi
	movl	$20, %esi
	callq	_ns_to_tim_reg
	movl	%ebx, %edi
	callq	_octeon_cf_set_boot_reg_cfg
	cmpq	$0, 8(%r15)
	js	LBB0_4
## %bb.3:
	leal	1(%rbx), %edi
	callq	_octeon_cf_set_boot_reg_cfg
LBB0_4:
	movq	%r14, %rdi
	callq	_ata_pio_need_iordy
	movl	%eax, %r14d
	movl	%ebx, %edi
	callq	_CVMX_MIO_BOOT_REG_TIMX
	movl	%eax, %edi
	callq	_cvmx_read_csr
	movl	$2, %edi
	movl	$5, %esi
	callq	_ns_to_tim_reg
	movl	%ebx, %edi
	callq	_CVMX_MIO_BOOT_REG_TIMX
	movl	%eax, %edi
	movl	%r14d, %esi
	callq	_cvmx_write_csr
	cmpq	$0, 8(%r15)
	js	LBB0_6
## %bb.5:
	incl	%ebx
	movl	%ebx, %edi
	callq	_CVMX_MIO_BOOT_REG_TIMX
	movl	%eax, %edi
	movl	%r14d, %esi
	callq	_cvmx_write_csr
LBB0_6:
	addq	$24, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_octeon_cf_set_piomode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function octeon_cf_set_piomode
_octeon_cf_set_piomode:                 ; @octeon_cf_set_piomode
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	ldr	x8, [x0]
	ldr	x21, [x8]
	ldr	w19, [x21]
	bl	_octeon_get_clock_rate
	mov	x8, #8192
	movk	x8, #43338, lsl #16
	movk	x8, #465, lsl #32
	ldr	w1, [x20]
	sdiv	x3, x8, x0
	mov	x2, sp
	mov	x0, x20
	mov	x4, x3
	bl	_ata_timing_compute
	cbz	x0, LBB0_2
; %bb.1:
	bl	_BUG
LBB0_2:
	mov	w0, #2
	mov	w1, #20
	bl	_ns_to_tim_reg
	mov	x0, x19
	bl	_octeon_cf_set_boot_reg_cfg
	ldr	x8, [x21, #8]
	tbnz	x8, #63, LBB0_4
; %bb.3:
	add	w0, w19, #1
	bl	_octeon_cf_set_boot_reg_cfg
LBB0_4:
	mov	x0, x20
	bl	_ata_pio_need_iordy
	mov	x20, x0
	mov	x0, x19
	bl	_CVMX_MIO_BOOT_REG_TIMX
	bl	_cvmx_read_csr
	mov	w0, #2
	mov	w1, #5
	bl	_ns_to_tim_reg
	mov	x0, x19
	bl	_CVMX_MIO_BOOT_REG_TIMX
	mov	x1, x20
	bl	_cvmx_write_csr
	ldr	x8, [x21, #8]
	tbnz	x8, #63, LBB0_6
; %bb.5:
	add	w0, w19, #1
	bl	_CVMX_MIO_BOOT_REG_TIMX
	mov	x1, x20
	bl	_cvmx_write_csr
LBB0_6:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_octeon_cf_set_piomode
.subsections_via_symbols
