	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_kvm_arch_vcpu_ioctl_set_regs   ## -- Begin function kvm_arch_vcpu_ioctl_set_regs
	.p2align	4, 0x90
_kvm_arch_vcpu_ioctl_set_regs:          ## @kvm_arch_vcpu_ioctl_set_regs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	callq	_vcpu_load
	movq	_VCPU_REGS_RAX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	68(%r14), %edx
	movq	%rbx, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RBX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	64(%r14), %edx
	movq	%rbx, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RCX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	60(%r14), %edx
	movq	%rbx, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RDX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	56(%r14), %edx
	movq	%rbx, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RSI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	52(%r14), %edx
	movq	%rbx, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RDI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r14), %edx
	movq	%rbx, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RSP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	44(%r14), %edx
	movq	%rbx, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RBP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	40(%r14), %edx
	movq	%rbx, %rdi
	callq	_kvm_register_write
	movl	4(%r14), %esi
	movq	%rbx, %rdi
	callq	_kvm_rip_write
	movq	_kvm_x86_ops@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	*(%rax)
	movl	$0, (%rbx)
	movq	%rbx, %rdi
	callq	_vcpu_put
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VCPU_REGS_RAX,4,2              ## @VCPU_REGS_RAX
	.comm	_VCPU_REGS_RBX,4,2              ## @VCPU_REGS_RBX
	.comm	_VCPU_REGS_RCX,4,2              ## @VCPU_REGS_RCX
	.comm	_VCPU_REGS_RDX,4,2              ## @VCPU_REGS_RDX
	.comm	_VCPU_REGS_RSI,4,2              ## @VCPU_REGS_RSI
	.comm	_VCPU_REGS_RDI,4,2              ## @VCPU_REGS_RDI
	.comm	_VCPU_REGS_RSP,4,2              ## @VCPU_REGS_RSP
	.comm	_VCPU_REGS_RBP,4,2              ## @VCPU_REGS_RBP
	.comm	_kvm_x86_ops,8,3                ## @kvm_x86_ops
	.comm	_VCPU_REGS_R10,4,2              ## @VCPU_REGS_R10
	.comm	_VCPU_REGS_R11,4,2              ## @VCPU_REGS_R11
	.comm	_VCPU_REGS_R12,4,2              ## @VCPU_REGS_R12
	.comm	_VCPU_REGS_R13,4,2              ## @VCPU_REGS_R13
	.comm	_VCPU_REGS_R14,4,2              ## @VCPU_REGS_R14
	.comm	_VCPU_REGS_R15,4,2              ## @VCPU_REGS_R15
	.comm	_VCPU_REGS_R8,4,2               ## @VCPU_REGS_R8
	.comm	_VCPU_REGS_R9,4,2               ## @VCPU_REGS_R9
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_kvm_arch_vcpu_ioctl_set_regs   ; -- Begin function kvm_arch_vcpu_ioctl_set_regs
	.p2align	2
_kvm_arch_vcpu_ioctl_set_regs:          ; @kvm_arch_vcpu_ioctl_set_regs
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	bl	_vcpu_load
Lloh0:
	adrp	x8, _VCPU_REGS_RAX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VCPU_REGS_RAX@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	ldr	w2, [x20, #68]
	mov	x0, x19
	bl	_kvm_register_write
Lloh3:
	adrp	x8, _VCPU_REGS_RBX@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VCPU_REGS_RBX@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	w2, [x20, #64]
	mov	x0, x19
	bl	_kvm_register_write
Lloh6:
	adrp	x8, _VCPU_REGS_RCX@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VCPU_REGS_RCX@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	ldr	w2, [x20, #60]
	mov	x0, x19
	bl	_kvm_register_write
Lloh9:
	adrp	x8, _VCPU_REGS_RDX@GOTPAGE
Lloh10:
	ldr	x8, [x8, _VCPU_REGS_RDX@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	w2, [x20, #56]
	mov	x0, x19
	bl	_kvm_register_write
Lloh12:
	adrp	x8, _VCPU_REGS_RSI@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VCPU_REGS_RSI@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	w2, [x20, #52]
	mov	x0, x19
	bl	_kvm_register_write
Lloh15:
	adrp	x8, _VCPU_REGS_RDI@GOTPAGE
Lloh16:
	ldr	x8, [x8, _VCPU_REGS_RDI@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	ldr	w2, [x20, #48]
	mov	x0, x19
	bl	_kvm_register_write
Lloh18:
	adrp	x8, _VCPU_REGS_RSP@GOTPAGE
Lloh19:
	ldr	x8, [x8, _VCPU_REGS_RSP@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	ldr	w2, [x20, #44]
	mov	x0, x19
	bl	_kvm_register_write
Lloh21:
	adrp	x8, _VCPU_REGS_RBP@GOTPAGE
Lloh22:
	ldr	x8, [x8, _VCPU_REGS_RBP@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	ldr	w2, [x20, #40]
	mov	x0, x19
	bl	_kvm_register_write
	ldr	w1, [x20, #4]
	mov	x0, x19
	bl	_kvm_rip_write
Lloh24:
	adrp	x8, _kvm_x86_ops@GOTPAGE
Lloh25:
	ldr	x8, [x8, _kvm_x86_ops@GOTPAGEOFF]
Lloh26:
	ldr	x8, [x8]
	ldr	x8, [x8]
	ldr	w1, [x20]
	mov	x0, x19
	blr	x8
	str	wzr, [x19]
	mov	x0, x19
	bl	_vcpu_put
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_VCPU_REGS_RAX,4,2              ; @VCPU_REGS_RAX
	.comm	_VCPU_REGS_RBX,4,2              ; @VCPU_REGS_RBX
	.comm	_VCPU_REGS_RCX,4,2              ; @VCPU_REGS_RCX
	.comm	_VCPU_REGS_RDX,4,2              ; @VCPU_REGS_RDX
	.comm	_VCPU_REGS_RSI,4,2              ; @VCPU_REGS_RSI
	.comm	_VCPU_REGS_RDI,4,2              ; @VCPU_REGS_RDI
	.comm	_VCPU_REGS_RSP,4,2              ; @VCPU_REGS_RSP
	.comm	_VCPU_REGS_RBP,4,2              ; @VCPU_REGS_RBP
	.comm	_kvm_x86_ops,8,3                ; @kvm_x86_ops
	.comm	_VCPU_REGS_R10,4,2              ; @VCPU_REGS_R10
	.comm	_VCPU_REGS_R11,4,2              ; @VCPU_REGS_R11
	.comm	_VCPU_REGS_R12,4,2              ; @VCPU_REGS_R12
	.comm	_VCPU_REGS_R13,4,2              ; @VCPU_REGS_R13
	.comm	_VCPU_REGS_R14,4,2              ; @VCPU_REGS_R14
	.comm	_VCPU_REGS_R15,4,2              ; @VCPU_REGS_R15
	.comm	_VCPU_REGS_R8,4,2               ; @VCPU_REGS_R8
	.comm	_VCPU_REGS_R9,4,2               ; @VCPU_REGS_R9
.subsections_via_symbols
