	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bcma_pmu_pll_clock_bcm4706
_bcma_pmu_pll_clock_bcm4706:            ## @bcma_pmu_pll_clock_bcm4706
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r15d
	movl	%esi, %ebx
	movq	%rdi, %r14
	testl	%edx, %edx
	sete	%al
	cmpl	$5, %edx
	setge	%cl
	orb	%al, %cl
	movzbl	%cl, %edi
	callq	_BUG_ON
	movq	_BCMA_CC_PMU6_4706_PROCPLL_OFF@GOTPCREL(%rip), %rax
	addl	(%rax), %ebx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_bcma_chipco_pll_read
	movl	%eax, %ebx
	movq	_BCMA_CC_PMU6_4706_PROC_NDIV_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	andl	%ebx, %r12d
	movq	_BCMA_CC_PMU6_4706_PROC_NDIV_INT_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r12d
	movq	_BCMA_CC_PMU6_4706_PROC_P1DIV_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	andl	%ebx, %r13d
	movq	_BCMA_CC_PMU6_4706_PROC_P1DIV_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r13d
	movq	_BCMA_CC_PMU6_4706_PROC_P2DIV_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movq	_BCMA_CC_PMU6_4706_PROC_P2DIV_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %ebx
	movq	_BCMA_CC_CHIPSTAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_bcma_cc_read32
	movq	_BCMA_CC_CHIPST_4706_PKG_OPTION@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	movl	$12500000, %eax                 ## imm = 0xBEBC20
	movl	$6250000, %ecx                  ## imm = 0x5F5E10
	cmovel	%eax, %ecx
	imull	%r12d, %ebx
	imull	%ecx, %ebx
	movl	%ebx, %eax
	cltd
	idivl	%r13d
                                        ## kill: def $eax killed $eax def $rax
	movq	_BCMA_CC_PMU5_MAINPLL_SSB@GOTPCREL(%rip), %rcx
	cmpl	%r15d, (%rcx)
	jne	LBB0_2
## %bb.1:
	leal	3(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$2, %ecx
	movl	%ecx, %eax
LBB0_2:
                                        ## kill: def $eax killed $eax killed $rax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BCMA_CC_PMU6_4706_PROCPLL_OFF,4,2 ## @BCMA_CC_PMU6_4706_PROCPLL_OFF
	.comm	_BCMA_CC_PMU6_4706_PROC_NDIV_INT_MASK,4,2 ## @BCMA_CC_PMU6_4706_PROC_NDIV_INT_MASK
	.comm	_BCMA_CC_PMU6_4706_PROC_NDIV_INT_SHIFT,4,2 ## @BCMA_CC_PMU6_4706_PROC_NDIV_INT_SHIFT
	.comm	_BCMA_CC_PMU6_4706_PROC_P1DIV_MASK,4,2 ## @BCMA_CC_PMU6_4706_PROC_P1DIV_MASK
	.comm	_BCMA_CC_PMU6_4706_PROC_P1DIV_SHIFT,4,2 ## @BCMA_CC_PMU6_4706_PROC_P1DIV_SHIFT
	.comm	_BCMA_CC_PMU6_4706_PROC_P2DIV_MASK,4,2 ## @BCMA_CC_PMU6_4706_PROC_P2DIV_MASK
	.comm	_BCMA_CC_PMU6_4706_PROC_P2DIV_SHIFT,4,2 ## @BCMA_CC_PMU6_4706_PROC_P2DIV_SHIFT
	.comm	_BCMA_CC_CHIPSTAT,4,2           ## @BCMA_CC_CHIPSTAT
	.comm	_BCMA_CC_CHIPST_4706_PKG_OPTION,4,2 ## @BCMA_CC_CHIPST_4706_PKG_OPTION
	.comm	_BCMA_CC_PMU5_MAINPLL_SSB,4,2   ## @BCMA_CC_PMU5_MAINPLL_SSB
	.no_dead_strip	_bcma_pmu_pll_clock_bcm4706
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bcma_pmu_pll_clock_bcm4706
_bcma_pmu_pll_clock_bcm4706:            ; @bcma_pmu_pll_clock_bcm4706
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	cmp	w2, #0
	ccmp	w2, #4, #0, ne
	cset	w0, gt
	bl	_BUG_ON
Lloh0:
	adrp	x8, _BCMA_CC_PMU6_4706_PROCPLL_OFF@GOTPAGE
Lloh1:
	ldr	x8, [x8, _BCMA_CC_PMU6_4706_PROCPLL_OFF@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	add	w1, w8, w20
	mov	x0, x21
	bl	_bcma_chipco_pll_read
Lloh3:
	adrp	x8, _BCMA_CC_PMU6_4706_PROC_NDIV_INT_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _BCMA_CC_PMU6_4706_PROC_NDIV_INT_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh6:
	adrp	x9, _BCMA_CC_PMU6_4706_PROC_NDIV_INT_SHIFT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _BCMA_CC_PMU6_4706_PROC_NDIV_INT_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
Lloh9:
	adrp	x10, _BCMA_CC_PMU6_4706_PROC_P1DIV_MASK@GOTPAGE
Lloh10:
	ldr	x10, [x10, _BCMA_CC_PMU6_4706_PROC_P1DIV_MASK@GOTPAGEOFF]
	asr	w20, w8, w9
Lloh11:
	ldr	w8, [x10]
	and	w8, w8, w0
Lloh12:
	adrp	x9, _BCMA_CC_PMU6_4706_PROC_P1DIV_SHIFT@GOTPAGE
Lloh13:
	ldr	x9, [x9, _BCMA_CC_PMU6_4706_PROC_P1DIV_SHIFT@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	asr	w22, w8, w9
Lloh15:
	adrp	x8, _BCMA_CC_PMU6_4706_PROC_P2DIV_MASK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _BCMA_CC_PMU6_4706_PROC_P2DIV_MASK@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
Lloh18:
	adrp	x9, _BCMA_CC_PMU6_4706_PROC_P2DIV_SHIFT@GOTPAGE
Lloh19:
	ldr	x9, [x9, _BCMA_CC_PMU6_4706_PROC_P2DIV_SHIFT@GOTPAGEOFF]
	and	w8, w8, w0
Lloh20:
	ldr	w9, [x9]
	asr	w23, w8, w9
Lloh21:
	adrp	x8, _BCMA_CC_CHIPSTAT@GOTPAGE
Lloh22:
	ldr	x8, [x8, _BCMA_CC_CHIPSTAT@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_bcma_cc_read32
Lloh24:
	adrp	x8, _BCMA_CC_CHIPST_4706_PKG_OPTION@GOTPAGE
Lloh25:
	ldr	x8, [x8, _BCMA_CC_CHIPST_4706_PKG_OPTION@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	tst	w8, w0
	mov	w8, #24080
	movk	w8, #95, lsl #16
	mov	w9, #48160
	movk	w9, #190, lsl #16
	csel	w8, w9, w8, eq
	mul	w9, w23, w20
	mul	w8, w9, w8
	sdiv	w8, w8, w22
Lloh27:
	adrp	x9, _BCMA_CC_PMU5_MAINPLL_SSB@GOTPAGE
Lloh28:
	ldr	x9, [x9, _BCMA_CC_PMU5_MAINPLL_SSB@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	add	w10, w8, #3
	cmp	w8, #0
	csel	w10, w10, w8, lt
	asr	w10, w10, #2
	cmp	w9, w19
	csel	w0, w10, w8, eq
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_BCMA_CC_PMU6_4706_PROCPLL_OFF,4,2 ; @BCMA_CC_PMU6_4706_PROCPLL_OFF
	.comm	_BCMA_CC_PMU6_4706_PROC_NDIV_INT_MASK,4,2 ; @BCMA_CC_PMU6_4706_PROC_NDIV_INT_MASK
	.comm	_BCMA_CC_PMU6_4706_PROC_NDIV_INT_SHIFT,4,2 ; @BCMA_CC_PMU6_4706_PROC_NDIV_INT_SHIFT
	.comm	_BCMA_CC_PMU6_4706_PROC_P1DIV_MASK,4,2 ; @BCMA_CC_PMU6_4706_PROC_P1DIV_MASK
	.comm	_BCMA_CC_PMU6_4706_PROC_P1DIV_SHIFT,4,2 ; @BCMA_CC_PMU6_4706_PROC_P1DIV_SHIFT
	.comm	_BCMA_CC_PMU6_4706_PROC_P2DIV_MASK,4,2 ; @BCMA_CC_PMU6_4706_PROC_P2DIV_MASK
	.comm	_BCMA_CC_PMU6_4706_PROC_P2DIV_SHIFT,4,2 ; @BCMA_CC_PMU6_4706_PROC_P2DIV_SHIFT
	.comm	_BCMA_CC_CHIPSTAT,4,2           ; @BCMA_CC_CHIPSTAT
	.comm	_BCMA_CC_CHIPST_4706_PKG_OPTION,4,2 ; @BCMA_CC_CHIPST_4706_PKG_OPTION
	.comm	_BCMA_CC_PMU5_MAINPLL_SSB,4,2   ; @BCMA_CC_PMU5_MAINPLL_SSB
	.no_dead_strip	_bcma_pmu_pll_clock_bcm4706
.subsections_via_symbols
