	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_evergreen_pm_misc              ## -- Begin function evergreen_pm_misc
	.p2align	4, 0x90
_evergreen_pm_misc:                     ## @evergreen_pm_misc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movslq	8(%rdi), %r15
	movslq	12(%rdi), %rbx
	movq	56(%rdi), %rax
	movq	(%rax,%r15,8), %r14
	shlq	$4, %rbx
	movq	(%r14,%rbx), %rax
	movq	_VOLTAGE_SW@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_14
## %bb.1:
	movq	%rdi, %r12
	movl	8(%r14,%rbx), %esi
	testl	%esi, %esi
	je	LBB0_5
## %bb.2:
	cmpl	$65281, %esi                    ## imm = 0xFF01
	je	LBB0_14
## %bb.3:
	cmpl	16(%r12), %esi
	je	LBB0_5
## %bb.4:
	leaq	(%r14,%rbx), %r13
	addq	$8, %r13
	movq	_SET_VOLTAGE_TYPE_ASIC_VDDC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_radeon_atom_set_voltage
	movl	(%r13), %esi
	movl	%esi, 16(%r12)
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG
LBB0_5:
	addq	%rbx, %r14
	movq	24(%r12), %rax
	movq	_PM_METHOD_PROFILE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_11
## %bb.6:
	movq	(%r12), %rax
	movq	_CHIP_BARTS@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_11
## %bb.7:
	cmpq	$0, 64(%r12)
	je	LBB0_11
## %bb.8:
	movq	32(%r12), %rax
	movq	_PM_PROFILE_MID_MH_IDX@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_10
## %bb.9:
	movq	_PM_PROFILE_LOW_MH_IDX@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_11
LBB0_10:
	movq	48(%r12), %rax
	movq	56(%r12), %rcx
	movq	_PM_PROFILE_HIGH_MH_IDX@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	(%rax,%rdx,8), %r14
	shlq	$4, %r14
	addq	(%rcx,%r15,8), %r14
LBB0_11:
	movl	12(%r14), %esi
	testl	%esi, %esi
	je	LBB0_14
## %bb.12:
	cmpl	$65281, %esi                    ## imm = 0xFF01
	je	LBB0_14
## %bb.13:
	cmpl	40(%r12), %esi
	jne	LBB0_15
LBB0_14:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_15:
	movq	_SET_VOLTAGE_TYPE_ASIC_VDDCI@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_radeon_atom_set_voltage
	movl	12(%r14), %esi
	movl	%esi, 40(%r12)
	leaq	L_.str.1(%rip), %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DRM_DEBUG                      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VOLTAGE_SW,8,3                 ## @VOLTAGE_SW
	.comm	_SET_VOLTAGE_TYPE_ASIC_VDDC,4,2 ## @SET_VOLTAGE_TYPE_ASIC_VDDC
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Setting: vddc: %d\n"

	.comm	_PM_METHOD_PROFILE,8,3          ## @PM_METHOD_PROFILE
	.comm	_CHIP_BARTS,8,3                 ## @CHIP_BARTS
	.comm	_PM_PROFILE_MID_MH_IDX,8,3      ## @PM_PROFILE_MID_MH_IDX
	.comm	_PM_PROFILE_LOW_MH_IDX,8,3      ## @PM_PROFILE_LOW_MH_IDX
	.comm	_PM_PROFILE_HIGH_MH_IDX,8,3     ## @PM_PROFILE_HIGH_MH_IDX
	.comm	_SET_VOLTAGE_TYPE_ASIC_VDDCI,4,2 ## @SET_VOLTAGE_TYPE_ASIC_VDDCI
L_.str.1:                               ## @.str.1
	.asciz	"Setting: vddci: %d\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_evergreen_pm_misc              ; -- Begin function evergreen_pm_misc
	.p2align	2
_evergreen_pm_misc:                     ; @evergreen_pm_misc
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldpsw	x21, x8, [x0, #8]
	ldr	x9, [x0, #56]
	ldr	x9, [x9, x21, lsl #3]
	add	x20, x9, x8, lsl #4
	ldr	x8, [x20]
Lloh0:
	adrp	x9, _VOLTAGE_SW@GOTPAGE
Lloh1:
	ldr	x9, [x9, _VOLTAGE_SW@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_12
; %bb.1:
	mov	x19, x0
	mov	x22, x20
	ldr	w1, [x22, #8]!
	cbz	w1, LBB0_5
; %bb.2:
	mov	w8, #65281
	cmp	w1, w8
	b.eq	LBB0_12
; %bb.3:
	ldr	w8, [x19, #16]
	cmp	w1, w8
	b.eq	LBB0_5
; %bb.4:
Lloh3:
	adrp	x8, _SET_VOLTAGE_TYPE_ASIC_VDDC@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SET_VOLTAGE_TYPE_ASIC_VDDC@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_radeon_atom_set_voltage
	ldr	w1, [x22]
	str	w1, [x19, #16]
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
LBB0_5:
	ldr	x8, [x19, #24]
Lloh8:
	adrp	x9, _PM_METHOD_PROFILE@GOTPAGE
Lloh9:
	ldr	x9, [x9, _PM_METHOD_PROFILE@GOTPAGEOFF]
Lloh10:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_10
; %bb.6:
	ldr	x8, [x19]
Lloh11:
	adrp	x9, _CHIP_BARTS@GOTPAGE
Lloh12:
	ldr	x9, [x9, _CHIP_BARTS@GOTPAGEOFF]
Lloh13:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_10
; %bb.7:
	ldr	x8, [x19, #64]
	cbz	x8, LBB0_10
; %bb.8:
	ldr	x8, [x19, #32]
Lloh14:
	adrp	x9, _PM_PROFILE_MID_MH_IDX@GOTPAGE
Lloh15:
	ldr	x9, [x9, _PM_PROFILE_MID_MH_IDX@GOTPAGEOFF]
Lloh16:
	ldr	x9, [x9]
Lloh17:
	adrp	x10, _PM_PROFILE_LOW_MH_IDX@GOTPAGE
Lloh18:
	ldr	x10, [x10, _PM_PROFILE_LOW_MH_IDX@GOTPAGEOFF]
Lloh19:
	ldr	x10, [x10]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	b.ne	LBB0_10
; %bb.9:
	ldp	x9, x8, [x19, #48]
	ldr	x8, [x8, x21, lsl #3]
Lloh20:
	adrp	x10, _PM_PROFILE_HIGH_MH_IDX@GOTPAGE
Lloh21:
	ldr	x10, [x10, _PM_PROFILE_HIGH_MH_IDX@GOTPAGEOFF]
Lloh22:
	ldr	x10, [x10]
	ldr	x9, [x9, x10, lsl #3]
	add	x20, x8, x9, lsl #4
LBB0_10:
	ldr	w1, [x20, #12]
	cmp	w1, #0
	mov	w8, #65281
	ccmp	w1, w8, #4, ne
	b.eq	LBB0_12
; %bb.11:
	ldr	w8, [x19, #40]
	cmp	w1, w8
	b.ne	LBB0_13
LBB0_12:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_13:
Lloh23:
	adrp	x8, _SET_VOLTAGE_TYPE_ASIC_VDDCI@GOTPAGE
Lloh24:
	ldr	x8, [x8, _SET_VOLTAGE_TYPE_ASIC_VDDCI@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_radeon_atom_set_voltage
	ldr	w1, [x20, #12]
	str	w1, [x19, #40]
Lloh26:
	adrp	x0, l_.str.1@PAGE
Lloh27:
	add	x0, x0, l_.str.1@PAGEOFF
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_DRM_DEBUG
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_VOLTAGE_SW,8,3                 ; @VOLTAGE_SW
	.comm	_SET_VOLTAGE_TYPE_ASIC_VDDC,4,2 ; @SET_VOLTAGE_TYPE_ASIC_VDDC
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Setting: vddc: %d\n"

	.comm	_PM_METHOD_PROFILE,8,3          ; @PM_METHOD_PROFILE
	.comm	_CHIP_BARTS,8,3                 ; @CHIP_BARTS
	.comm	_PM_PROFILE_MID_MH_IDX,8,3      ; @PM_PROFILE_MID_MH_IDX
	.comm	_PM_PROFILE_LOW_MH_IDX,8,3      ; @PM_PROFILE_LOW_MH_IDX
	.comm	_PM_PROFILE_HIGH_MH_IDX,8,3     ; @PM_PROFILE_HIGH_MH_IDX
	.comm	_SET_VOLTAGE_TYPE_ASIC_VDDCI,4,2 ; @SET_VOLTAGE_TYPE_ASIC_VDDCI
l_.str.1:                               ; @.str.1
	.asciz	"Setting: vddci: %d\n"

.subsections_via_symbols
