	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_cp_performance_boxes
_radeon_cp_performance_boxes:           ## @radeon_cp_performance_boxes
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	cmpl	$1, (%rdi)
	jg	LBB0_2
## %bb.1:
	movq	8(%rbx), %rax
	cmpq	16(%rbx), %rax
	jle	LBB0_3
LBB0_2:
	movq	_RADEON_BOX_WAIT_IDLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 24(%rbx)
LBB0_3:
	cmpq	$0, 32(%rbx)
	je	LBB0_4
## %bb.5:
	movq	_RADEON_BOX_WAIT_IDLE@GOTPCREL(%rip), %rcx
	movl	24(%rbx), %eax
	orl	(%rcx), %eax
	movl	%eax, 24(%rbx)
	jmp	LBB0_6
LBB0_4:
	movl	24(%rbx), %eax
LBB0_6:
	movq	_RADEON_BOX_FLIP@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_8
## %bb.7:
	subq	$8, %rsp
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$4, %edx
	movl	$4, %ecx
	movl	$8, %r8d
	movl	$8, %r9d
	pushq	$255
	pushq	$0
	pushq	$255
	callq	_radeon_clear_box
	addq	$32, %rsp
	movl	24(%rbx), %eax
LBB0_8:
	movq	_RADEON_BOX_WAIT_IDLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_10
## %bb.9:
	subq	$8, %rsp
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$16, %edx
	movl	$4, %ecx
	movl	$8, %r8d
	movl	$8, %r9d
	pushq	$0
	pushq	$0
	pushq	$255
	callq	_radeon_clear_box
	addq	$32, %rsp
	movl	24(%rbx), %eax
LBB0_10:
	movq	_RADEON_BOX_TEXTURE_LOAD@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_12
## %bb.11:
	subq	$8, %rsp
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$40, %edx
	movl	$4, %ecx
	movl	$8, %r8d
	movl	$8, %r9d
	pushq	$0
	pushq	$255
	pushq	$255
	callq	_radeon_clear_box
	addq	$32, %rsp
	movl	24(%rbx), %eax
LBB0_12:
	movq	_RADEON_BOX_DMA_IDLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_14
## %bb.13:
	subq	$8, %rsp
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$64, %edx
	movl	$4, %ecx
	movl	$8, %r8d
	movl	$8, %r9d
	pushq	$0
	pushq	$255
	pushq	$0
	callq	_radeon_clear_box
	addq	$32, %rsp
LBB0_14:
	movl	28(%rbx), %r8d
	testl	%r8d, %r8d
	je	LBB0_18
## %bb.15:
	cmpl	$101, %r8d
	jl	LBB0_17
## %bb.16:
	movl	$100, 28(%rbx)
	movl	$100, %r8d
LBB0_17:
	subq	$8, %rsp
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$4, %edx
	movl	$16, %ecx
	movl	$4, %r9d
	pushq	$128
	pushq	$128
	pushq	$196
	callq	_radeon_clear_box
	addq	$32, %rsp
LBB0_18:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$40, %edx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_memset                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_BOX_WAIT_IDLE,4,2       ## @RADEON_BOX_WAIT_IDLE
	.comm	_RADEON_BOX_FLIP,4,2            ## @RADEON_BOX_FLIP
	.comm	_RADEON_BOX_TEXTURE_LOAD,4,2    ## @RADEON_BOX_TEXTURE_LOAD
	.comm	_RADEON_BOX_DMA_IDLE,4,2        ## @RADEON_BOX_DMA_IDLE
	.no_dead_strip	_radeon_cp_performance_boxes
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_cp_performance_boxes
_radeon_cp_performance_boxes:           ; @radeon_cp_performance_boxes
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	ldr	w8, [x0]
Lloh0:
	adrp	x21, _RADEON_BOX_WAIT_IDLE@GOTPAGE
Lloh1:
	ldr	x21, [x21, _RADEON_BOX_WAIT_IDLE@GOTPAGEOFF]
	cmp	w8, #1
	b.gt	LBB0_2
; %bb.1:
	ldp	x8, x9, [x19, #8]
	cmp	x8, x9
	b.le	LBB0_3
LBB0_2:
	ldr	w8, [x21]
	ldr	w9, [x19, #24]
	orr	w8, w9, w8
	str	w8, [x19, #24]
LBB0_3:
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_5
; %bb.4:
	ldr	w8, [x21]
	ldr	w9, [x19, #24]
	orr	w8, w9, w8
	str	w8, [x19, #24]
	b	LBB0_6
LBB0_5:
	ldr	w8, [x19, #24]
LBB0_6:
Lloh2:
	adrp	x9, _RADEON_BOX_FLIP@GOTPAGE
Lloh3:
	ldr	x9, [x9, _RADEON_BOX_FLIP@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_8
; %bb.7:
	mov	w8, #255
	str	w8, [sp]
	mov	x0, x19
	mov	x1, x20
	mov	w2, #4
	mov	w3, #4
	mov	w4, #8
	mov	w5, #8
	mov	w6, #255
	mov	w7, #0
	bl	_radeon_clear_box
	ldr	w8, [x19, #24]
LBB0_8:
	ldr	w9, [x21]
	tst	w9, w8
	b.eq	LBB0_10
; %bb.9:
	str	wzr, [sp]
	mov	x0, x19
	mov	x1, x20
	mov	w2, #16
	mov	w3, #4
	mov	w4, #8
	mov	w5, #8
	mov	w6, #255
	mov	w7, #0
	bl	_radeon_clear_box
	ldr	w8, [x19, #24]
LBB0_10:
Lloh5:
	adrp	x9, _RADEON_BOX_TEXTURE_LOAD@GOTPAGE
Lloh6:
	ldr	x9, [x9, _RADEON_BOX_TEXTURE_LOAD@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_12
; %bb.11:
	str	wzr, [sp]
	mov	x0, x19
	mov	x1, x20
	mov	w2, #40
	mov	w3, #4
	mov	w4, #8
	mov	w5, #8
	mov	w6, #255
	mov	w7, #255
	bl	_radeon_clear_box
	ldr	w8, [x19, #24]
LBB0_12:
Lloh8:
	adrp	x9, _RADEON_BOX_DMA_IDLE@GOTPAGE
Lloh9:
	ldr	x9, [x9, _RADEON_BOX_DMA_IDLE@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_14
; %bb.13:
	str	wzr, [sp]
	mov	x0, x19
	mov	x1, x20
	mov	w2, #64
	mov	w3, #4
	mov	w4, #8
	mov	w5, #8
	mov	w6, #0
	mov	w7, #255
	bl	_radeon_clear_box
LBB0_14:
	ldr	w4, [x19, #28]
	cbz	w4, LBB0_18
; %bb.15:
	cmp	w4, #101
	b.lt	LBB0_17
; %bb.16:
	mov	w4, #100
	str	w4, [x19, #28]
LBB0_17:
	mov	w8, #128
	str	w8, [sp]
	mov	x0, x19
	mov	x1, x20
	mov	w2, #4
	mov	w3, #16
	mov	w5, #4
	mov	w6, #196
	mov	w7, #128
	bl	_radeon_clear_box
LBB0_18:
	mov	x0, x19
	mov	w1, #0
	mov	w2, #40
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	b	_memset
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_BOX_WAIT_IDLE,4,2       ; @RADEON_BOX_WAIT_IDLE
	.comm	_RADEON_BOX_FLIP,4,2            ; @RADEON_BOX_FLIP
	.comm	_RADEON_BOX_TEXTURE_LOAD,4,2    ; @RADEON_BOX_TEXTURE_LOAD
	.comm	_RADEON_BOX_DMA_IDLE,4,2        ; @RADEON_BOX_DMA_IDLE
	.no_dead_strip	_radeon_cp_performance_boxes
.subsections_via_symbols
