	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function combios_parse_ram_reset_table
_combios_parse_ram_reset_table:         ## @combios_parse_ram_reset_table
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	testq	%rsi, %rsi
	je	LBB0_11
## %bb.1:
	movq	%rsi, %r15
	movq	(%rdi), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	%rsi, %rdi
	callq	_RBIOS8
	cmpl	$255, %eax
	jne	LBB0_2
LBB0_11:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movl	%eax, %ebx
	movq	_RADEON_MEM_STR_CNTL@GOTPCREL(%rip), %r13
	movq	_RADEON_MEM_SDRAM_MODE_REG@GOTPCREL(%rip), %r14
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_3 Depth=1
	movq	%r12, %rdi
	callq	_RBIOS16
	movl	%eax, %r12d
	addq	$3, %r15
	movl	(%r14), %edi
	callq	_RREG32
	movq	_RADEON_SDRAM_MODE_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	orl	%eax, %r12d
	movl	(%r14), %edi
	movl	%r12d, %esi
	callq	_WREG32
	shll	$24, %ebx
	movl	(%r14), %edi
	callq	_RREG32
	movq	_RADEON_B3MEM_RESET_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	orl	%eax, %ebx
	movl	(%r14), %edi
	movl	%ebx, %esi
	callq	_WREG32
	movq	%r15, %r12
LBB0_10:                                ##   in Loop: Header=BB0_3 Depth=1
	movq	%r12, %rdi
	callq	_RBIOS8
	movl	%eax, %ebx
	movq	%r12, %r15
	cmpl	$255, %eax
	je	LBB0_11
LBB0_3:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_7 Depth 2
	leaq	1(%r15), %r12
	cmpl	$15, %ebx
	jne	LBB0_9
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_ASIC_IS_R300
	movq	_R300_MEM_PWRUP_COMPLETE@GOTPCREL(%rip), %rcx
	testq	%rax, %rax
	jne	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	_RADEON_MEM_PWRUP_COMPLETE@GOTPCREL(%rip), %rcx
LBB0_6:                                 ##   in Loop: Header=BB0_3 Depth=1
	movl	(%rcx), %r15d
	movl	$-20001, %ebx                   ## imm = 0xB1DF
	.p2align	4, 0x90
LBB0_7:                                 ##   Parent Loop BB0_3 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	incl	%ebx
	je	LBB0_10
## %bb.8:                               ##   in Loop: Header=BB0_7 Depth=2
	movl	(%r13), %edi
	callq	_RREG32
	notl	%eax
	testl	%eax, %r15d
	jne	LBB0_7
	jmp	LBB0_10
	.cfi_endproc
                                        ## -- End function
	.comm	_R300_MEM_PWRUP_COMPLETE,4,2    ## @R300_MEM_PWRUP_COMPLETE
	.comm	_RADEON_MEM_PWRUP_COMPLETE,4,2  ## @RADEON_MEM_PWRUP_COMPLETE
	.comm	_RADEON_MEM_STR_CNTL,4,2        ## @RADEON_MEM_STR_CNTL
	.comm	_RADEON_MEM_SDRAM_MODE_REG,4,2  ## @RADEON_MEM_SDRAM_MODE_REG
	.comm	_RADEON_SDRAM_MODE_MASK,4,2     ## @RADEON_SDRAM_MODE_MASK
	.comm	_RADEON_B3MEM_RESET_MASK,4,2    ## @RADEON_B3MEM_RESET_MASK
	.no_dead_strip	_combios_parse_ram_reset_table
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function combios_parse_ram_reset_table
_combios_parse_ram_reset_table:         ; @combios_parse_ram_reset_table
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	cbz	x1, LBB0_2
; %bb.1:
	mov	x22, x1
	ldr	x19, [x0]
	mov	x0, x1
	bl	_RBIOS8
	cmp	w0, #255
	b.ne	LBB0_3
LBB0_2:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_3:
	mov	x21, x0
Lloh0:
	adrp	x25, _R300_MEM_PWRUP_COMPLETE@GOTPAGE
Lloh1:
	ldr	x25, [x25, _R300_MEM_PWRUP_COMPLETE@GOTPAGEOFF]
Lloh2:
	adrp	x26, _RADEON_MEM_STR_CNTL@GOTPAGE
Lloh3:
	ldr	x26, [x26, _RADEON_MEM_STR_CNTL@GOTPAGEOFF]
Lloh4:
	adrp	x27, _RADEON_MEM_SDRAM_MODE_REG@GOTPAGE
Lloh5:
	ldr	x27, [x27, _RADEON_MEM_SDRAM_MODE_REG@GOTPAGEOFF]
Lloh6:
	adrp	x28, _RADEON_SDRAM_MODE_MASK@GOTPAGE
Lloh7:
	ldr	x28, [x28, _RADEON_SDRAM_MODE_MASK@GOTPAGEOFF]
Lloh8:
	adrp	x24, _RADEON_B3MEM_RESET_MASK@GOTPAGE
Lloh9:
	ldr	x24, [x24, _RADEON_B3MEM_RESET_MASK@GOTPAGEOFF]
	b	LBB0_6
LBB0_4:                                 ;   in Loop: Header=BB0_6 Depth=1
	mov	x0, x20
	bl	_RBIOS16
	mov	x23, x0
	add	x20, x22, #3
	ldr	w0, [x27]
	bl	_RREG32
	ldr	w8, [x28]
	and	w8, w8, w0
	orr	w1, w8, w23
	ldr	w0, [x27]
	bl	_WREG32
	ldr	w0, [x27]
	bl	_RREG32
	ldr	w8, [x24]
	and	w8, w8, w0
	orr	w1, w8, w21, lsl #24
	ldr	w0, [x27]
	bl	_WREG32
LBB0_5:                                 ;   in Loop: Header=BB0_6 Depth=1
	mov	x0, x20
	bl	_RBIOS8
	mov	x21, x0
	mov	x22, x20
	cmp	w0, #255
	b.eq	LBB0_2
LBB0_6:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_8 Depth 2
	add	x20, x22, #1
	cmp	w21, #15
	b.ne	LBB0_4
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	mov	x0, x19
	bl	_ASIC_IS_R300
	cmp	x0, #0
Lloh10:
	adrp	x8, _RADEON_MEM_PWRUP_COMPLETE@GOTPAGE
Lloh11:
	ldr	x8, [x8, _RADEON_MEM_PWRUP_COMPLETE@GOTPAGEOFF]
	csel	x8, x8, x25, eq
	ldr	w21, [x8]
	mov	w22, #-20001
LBB0_8:                                 ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	adds	w22, w22, #1
	b.hs	LBB0_5
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=2
	ldr	w0, [x26]
	bl	_RREG32
	bics	wzr, w21, w0
	b.ne	LBB0_8
	b	LBB0_5
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_R300_MEM_PWRUP_COMPLETE,4,2    ; @R300_MEM_PWRUP_COMPLETE
	.comm	_RADEON_MEM_PWRUP_COMPLETE,4,2  ; @RADEON_MEM_PWRUP_COMPLETE
	.comm	_RADEON_MEM_STR_CNTL,4,2        ; @RADEON_MEM_STR_CNTL
	.comm	_RADEON_MEM_SDRAM_MODE_REG,4,2  ; @RADEON_MEM_SDRAM_MODE_REG
	.comm	_RADEON_SDRAM_MODE_MASK,4,2     ; @RADEON_SDRAM_MODE_MASK
	.comm	_RADEON_B3MEM_RESET_MASK,4,2    ; @RADEON_B3MEM_RESET_MASK
	.no_dead_strip	_combios_parse_ram_reset_table
.subsections_via_symbols
