	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_fence_driver_force_completion ## -- Begin function radeon_fence_driver_force_completion
	.p2align	4, 0x90
_radeon_fence_driver_force_completion:  ## @radeon_fence_driver_force_completion
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_RADEON_NUM_RINGS@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	testl	%eax, %eax
	jle	LBB0_5
## %bb.1:
	movq	%rdi, %r14
	movl	$8, %r12d
	xorl	%ebx, %ebx
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%rbx
	movslq	%eax, %rcx
	addq	$16, %r12
	cmpq	%rcx, %rbx
	jge	LBB0_5
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r14), %rcx
	cmpl	$0, (%rcx,%r12)
	je	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	-8(%rcx,%r12), %rax
	movl	(%rax,%rbx,4), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_radeon_fence_write
	movl	(%r15), %eax
	jmp	LBB0_4
LBB0_5:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_NUM_RINGS,4,2           ## @RADEON_NUM_RINGS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_fence_driver_force_completion ; -- Begin function radeon_fence_driver_force_completion
	.p2align	2
_radeon_fence_driver_force_completion:  ; @radeon_fence_driver_force_completion
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
Lloh0:
	adrp	x21, _RADEON_NUM_RINGS@GOTPAGE
Lloh1:
	ldr	x21, [x21, _RADEON_NUM_RINGS@GOTPAGEOFF]
	ldr	w8, [x21]
	cmp	w8, #1
	b.lt	LBB0_5
; %bb.1:
	mov	x19, x0
	mov	x22, #0
	mov	x20, #0
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x20, x20, #1
	add	x22, x22, #16
	cmp	x20, w8, sxtw
	b.ge	LBB0_5
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x19]
	add	x10, x9, x22
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	x8, [x9, x22]
	ldr	w1, [x8, x20, lsl #2]
	mov	x0, x19
	mov	x2, x20
	bl	_radeon_fence_write
	ldr	w8, [x21]
	b	LBB0_2
LBB0_5:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_NUM_RINGS,4,2           ; @RADEON_NUM_RINGS
.subsections_via_symbols
