	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function read_dram_ctl_register
_read_dram_ctl_register:                ## @read_dram_ctl_register
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_boot_cpu_data@GOTPCREL(%rip), %rax
	cmpl	$15, (%rax)
	jne	LBB0_1
## %bb.6:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	%rdi, %rbx
	movq	_DCT_SEL_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rdi, %rdx
	callq	_amd64_read_dct_pci_cfg
	testl	%eax, %eax
	jne	LBB0_5
## %bb.2:
	movq	(%rbx), %r14
	movq	%rbx, %rdi
	callq	_dct_sel_baseaddr
	leaq	L_.str(%rip), %rdi
	movq	%r14, %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	_debugf0
	movq	%rbx, %rdi
	callq	_dct_ganging_enabled
	testq	%rax, %rax
	leaq	L_.str.3(%rip), %rax
	leaq	L_.str.2(%rip), %rsi
	cmoveq	%rax, %rsi
	leaq	L_.str.1(%rip), %rdi
	xorl	%eax, %eax
	callq	_debugf0
	movq	%rbx, %rdi
	callq	_dct_ganging_enabled
	testq	%rax, %rax
	jne	LBB0_4
## %bb.3:
	movq	%rbx, %rdi
	callq	_dct_high_range_enabled
	testq	%rax, %rax
	leaq	L_.str.6(%rip), %rax
	leaq	L_.str.5(%rip), %rsi
	cmoveq	%rax, %rsi
	leaq	L_.str.4(%rip), %rdi
	xorl	%eax, %eax
	callq	_debugf0
LBB0_4:
	movq	%rbx, %rdi
	callq	_dct_data_intlv_enabled
	testq	%rax, %rax
	leaq	L_.str.9(%rip), %r12
	leaq	L_.str.8(%rip), %r14
	movq	%r14, %r15
	cmoveq	%r12, %r15
	movq	%rbx, %rdi
	callq	_dct_memory_cleared
	testq	%rax, %rax
	leaq	L_.str.6(%rip), %rax
	leaq	L_.str.5(%rip), %rdx
	cmoveq	%rax, %rdx
	leaq	L_.str.7(%rip), %rdi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_debugf0
	movq	%rbx, %rdi
	callq	_dct_interleave_enabled
	testq	%rax, %rax
	cmoveq	%r12, %r14
	movq	%rbx, %rdi
	callq	_dct_sel_interleave_addr
	leaq	L_.str.10(%rip), %rdi
	movq	%r14, %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	_debugf0
LBB0_5:
	movq	_DCT_SEL_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	8(%rbx), %rdx
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amd64_read_dct_pci_cfg         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_boot_cpu_data,4,2              ## @boot_cpu_data
	.comm	_DCT_SEL_LO,4,2                 ## @DCT_SEL_LO
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"F2x110 (DCTSelLow): 0x%08x, High range addrs at: 0x%x\n"

L_.str.1:                               ## @.str.1
	.asciz	"  DCTs operate in %s mode.\n"

L_.str.2:                               ## @.str.2
	.asciz	"ganged"

L_.str.3:                               ## @.str.3
	.asciz	"unganged"

L_.str.4:                               ## @.str.4
	.asciz	"  Address range split per DCT: %s\n"

L_.str.5:                               ## @.str.5
	.asciz	"yes"

L_.str.6:                               ## @.str.6
	.asciz	"no"

L_.str.7:                               ## @.str.7
	.asciz	"  data interleave for ECC: %s, DRAM cleared since last warm reset: %s\n"

L_.str.8:                               ## @.str.8
	.asciz	"enabled"

L_.str.9:                               ## @.str.9
	.asciz	"disabled"

L_.str.10:                              ## @.str.10
	.asciz	"  channel interleave: %s, interleave bits selector: 0x%x\n"

	.comm	_DCT_SEL_HI,4,2                 ## @DCT_SEL_HI
	.no_dead_strip	_read_dram_ctl_register
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function read_dram_ctl_register
_read_dram_ctl_register:                ; @read_dram_ctl_register
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
Lloh0:
	adrp	x8, _boot_cpu_data@GOTPAGE
Lloh1:
	ldr	x8, [x8, _boot_cpu_data@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, #15
	b.ne	LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_2:
	mov	x19, x0
Lloh3:
	adrp	x8, _DCT_SEL_LO@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DCT_SEL_LO@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x2, x0
	bl	_amd64_read_dct_pci_cfg
	cbnz	w0, LBB0_6
; %bb.3:
	ldr	x20, [x19]
	mov	x0, x19
	bl	_dct_sel_baseaddr
	str	x0, [sp]
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x20
	bl	_debugf0
	mov	x0, x19
	bl	_dct_ganging_enabled
Lloh8:
	adrp	x8, l_.str.2@PAGE
Lloh9:
	add	x8, x8, l_.str.2@PAGEOFF
Lloh10:
	adrp	x9, l_.str.3@PAGE
Lloh11:
	add	x9, x9, l_.str.3@PAGEOFF
	cmp	x0, #0
	csel	x1, x9, x8, eq
Lloh12:
	adrp	x0, l_.str.1@PAGE
Lloh13:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_debugf0
	mov	x0, x19
	bl	_dct_ganging_enabled
Lloh14:
	adrp	x21, l_.str.5@PAGE
Lloh15:
	add	x21, x21, l_.str.5@PAGEOFF
Lloh16:
	adrp	x22, l_.str.6@PAGE
Lloh17:
	add	x22, x22, l_.str.6@PAGEOFF
	cbnz	x0, LBB0_5
; %bb.4:
	mov	x0, x19
	bl	_dct_high_range_enabled
	cmp	x0, #0
	csel	x1, x22, x21, eq
Lloh18:
	adrp	x0, l_.str.4@PAGE
Lloh19:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_debugf0
LBB0_5:
	mov	x0, x19
	bl	_dct_data_intlv_enabled
Lloh20:
	adrp	x23, l_.str.8@PAGE
Lloh21:
	add	x23, x23, l_.str.8@PAGEOFF
Lloh22:
	adrp	x24, l_.str.9@PAGE
Lloh23:
	add	x24, x24, l_.str.9@PAGEOFF
	cmp	x0, #0
	csel	x20, x24, x23, eq
	mov	x0, x19
	bl	_dct_memory_cleared
	cmp	x0, #0
	csel	x8, x22, x21, eq
	str	x8, [sp]
Lloh24:
	adrp	x0, l_.str.7@PAGE
Lloh25:
	add	x0, x0, l_.str.7@PAGEOFF
	mov	x1, x20
	bl	_debugf0
	mov	x0, x19
	bl	_dct_interleave_enabled
	cmp	x0, #0
	csel	x20, x24, x23, eq
	mov	x0, x19
	bl	_dct_sel_interleave_addr
	str	x0, [sp]
Lloh26:
	adrp	x0, l_.str.10@PAGE
Lloh27:
	add	x0, x0, l_.str.10@PAGEOFF
	mov	x1, x20
	bl	_debugf0
LBB0_6:
Lloh28:
	adrp	x8, _DCT_SEL_HI@GOTPAGE
Lloh29:
	ldr	x8, [x8, _DCT_SEL_HI@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
	add	x2, x19, #8
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_amd64_read_dct_pci_cfg
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.cfi_endproc
                                        ; -- End function
	.comm	_boot_cpu_data,4,2              ; @boot_cpu_data
	.comm	_DCT_SEL_LO,4,2                 ; @DCT_SEL_LO
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"F2x110 (DCTSelLow): 0x%08x, High range addrs at: 0x%x\n"

l_.str.1:                               ; @.str.1
	.asciz	"  DCTs operate in %s mode.\n"

l_.str.2:                               ; @.str.2
	.asciz	"ganged"

l_.str.3:                               ; @.str.3
	.asciz	"unganged"

l_.str.4:                               ; @.str.4
	.asciz	"  Address range split per DCT: %s\n"

l_.str.5:                               ; @.str.5
	.asciz	"yes"

l_.str.6:                               ; @.str.6
	.asciz	"no"

l_.str.7:                               ; @.str.7
	.asciz	"  data interleave for ECC: %s, DRAM cleared since last warm reset: %s\n"

l_.str.8:                               ; @.str.8
	.asciz	"enabled"

l_.str.9:                               ; @.str.9
	.asciz	"disabled"

l_.str.10:                              ; @.str.10
	.asciz	"  channel interleave: %s, interleave bits selector: 0x%x\n"

	.comm	_DCT_SEL_HI,4,2                 ; @DCT_SEL_HI
	.no_dead_strip	_read_dram_ctl_register
.subsections_via_symbols
