	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_emit_scalars
_radeon_emit_scalars:                   ## @radeon_emit_scalars
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r14
	movl	%edx, %ebx
	movq	%rsi, %r15
	movq	%rsi, %r12
	shrq	$32, %r12
	leal	3(%rsi), %edi
	callq	_BEGIN_RING
	movq	_RADEON_SE_TCL_SCALAR_INDX_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_CP_PACKET0
	movl	%eax, %edi
	callq	_OUT_RING
	movq	_RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %ebx
	orl	%r12d, %ebx
	movl	%ebx, %edi
	callq	_OUT_RING
	movq	_RADEON_SE_TCL_SCALAR_DATA_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leal	-1(%r15), %esi
	callq	_CP_PACKET0_TABLE
	movl	%eax, %edi
	callq	_OUT_RING
	movl	(%r14), %edi
	movl	%r15d, %esi
	callq	_OUT_RING_DRM_BUFFER
	xorl	%eax, %eax
	callq	_ADVANCE_RING
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RING_LOCALS,4,2                ## @RING_LOCALS
	.comm	_RADEON_SE_TCL_SCALAR_INDX_REG,4,2 ## @RADEON_SE_TCL_SCALAR_INDX_REG
	.comm	_RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT,4,2 ## @RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT
	.comm	_RADEON_SE_TCL_SCALAR_DATA_REG,4,2 ## @RADEON_SE_TCL_SCALAR_DATA_REG
	.no_dead_strip	_radeon_emit_scalars
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_emit_scalars
_radeon_emit_scalars:                   ; @radeon_emit_scalars
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x3
	mov	x20, x2
	mov	x21, x1
	lsr	x22, x1, #32
	add	w0, w21, #3
	bl	_BEGIN_RING
Lloh0:
	adrp	x8, _RADEON_SE_TCL_SCALAR_INDX_REG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_SE_TCL_SCALAR_INDX_REG@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_CP_PACKET0
	bl	_OUT_RING
Lloh3:
	adrp	x8, _RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	lsl	w8, w20, w8
	orr	w0, w8, w22
	bl	_OUT_RING
Lloh6:
	adrp	x8, _RADEON_SE_TCL_SCALAR_DATA_REG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RADEON_SE_TCL_SCALAR_DATA_REG@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	sub	w1, w21, #1
	bl	_CP_PACKET0_TABLE
	bl	_OUT_RING
	ldr	w0, [x19]
	mov	x1, x21
	bl	_OUT_RING_DRM_BUFFER
	bl	_ADVANCE_RING
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RING_LOCALS,4,2                ; @RING_LOCALS
	.comm	_RADEON_SE_TCL_SCALAR_INDX_REG,4,2 ; @RADEON_SE_TCL_SCALAR_INDX_REG
	.comm	_RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT,4,2 ; @RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT
	.comm	_RADEON_SE_TCL_SCALAR_DATA_REG,4,2 ; @RADEON_SE_TCL_SCALAR_DATA_REG
	.no_dead_strip	_radeon_emit_scalars
.subsections_via_symbols
