	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_g4x_find_best_PLL
_intel_g4x_find_best_PLL:               ## @intel_g4x_find_best_PLL
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r9, -64(%rbp)                  ## 8-byte Spill
	movq	%r8, %r12
	movl	%ecx, %r15d
	movl	%edx, %r14d
	movq	%rsi, %rax
	movq	%rdi, %rbx
	movq	(%rsi), %r13
	movq	_INTEL_OUTPUT_LVDS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%rax, %rdi
	callq	_intel_pipe_has_type
	testq	%rax, %rax
	movl	%r14d, -44(%rbp)                ## 4-byte Spill
	je	LBB0_3
## %bb.1:
	movq	%r13, %rdi
	callq	_HAS_PCH_SPLIT
	movq	%r13, %rdi
	callq	_intel_is_dual_link_lvds
	testq	%rax, %rax
	je	LBB0_2
LBB0_5:
	leaq	60(%rbx), %rax
	jmp	LBB0_6
LBB0_3:
	cmpl	%r14d, 56(%rbx)
	jle	LBB0_5
LBB0_2:
	leaq	64(%rbx), %rax
LBB0_6:
	movl	(%rax), %eax
	movl	%eax, -72(%rbp)
	movl	$0, -48(%rbp)                   ## 4-byte Folded Spill
	movq	-64(%rbp), %rdi                 ## 8-byte Reload
	xorl	%esi, %esi
	movl	$56, %edx
	callq	_memset
	movl	48(%rbx), %eax
	movl	52(%rbx), %ecx
	movl	%ecx, -120(%rbp)
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	cmpl	%eax, %ecx
	jle	LBB0_8
LBB0_7:
	movl	-48(%rbp), %eax                 ## 4-byte Reload
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_8:
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	movl	%edx, %eax
	sarl	$8, %eax
	movslq	%edx, %rsi
	movq	%rsi, -128(%rbp)                ## 8-byte Spill
	sarl	$9, %edx
	addl	%eax, %edx
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movq	40(%rbx), %rax
	movl	$0, -48(%rbp)                   ## 4-byte Folded Spill
	leaq	-120(%rbp), %r14
	jmp	LBB0_11
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_11 Depth=1
	movl	-120(%rbp), %ecx
LBB0_10:                                ##   in Loop: Header=BB0_11 Depth=1
	leal	1(%rcx), %edx
	movl	%edx, -120(%rbp)
	cmpl	-52(%rbp), %ecx                 ## 4-byte Folded Reload
	movl	%edx, %ecx
	jge	LBB0_7
LBB0_11:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_15 Depth 2
                                        ##       Child Loop BB0_19 Depth 3
                                        ##         Child Loop BB0_21 Depth 4
	movq	32(%rbx), %rdx
	movq	%rdx, -112(%rbp)
	cmpq	%rax, %rdx
	jl	LBB0_10
## %bb.12:                              ##   in Loop: Header=BB0_11 Depth=1
	movq	24(%rbx), %rcx
	jmp	LBB0_15
	.p2align	4, 0x90
LBB0_13:                                ##   in Loop: Header=BB0_15 Depth=2
	movq	-112(%rbp), %rdx
	movq	40(%rbx), %rax
LBB0_14:                                ##   in Loop: Header=BB0_15 Depth=2
	leaq	-1(%rdx), %rsi
	movq	%rsi, -112(%rbp)
	cmpq	%rax, %rdx
	movq	%rsi, %rdx
	jle	LBB0_9
LBB0_15:                                ##   Parent Loop BB0_11 Depth=1
                                        ## =>  This Loop Header: Depth=2
                                        ##       Child Loop BB0_19 Depth 3
                                        ##         Child Loop BB0_21 Depth 4
	movq	16(%rbx), %rsi
	movq	%rsi, -104(%rbp)
	cmpq	%rcx, %rsi
	jl	LBB0_14
## %bb.16:                              ##   in Loop: Header=BB0_15 Depth=2
	movq	8(%rbx), %rax
	jmp	LBB0_19
	.p2align	4, 0x90
LBB0_17:                                ##   in Loop: Header=BB0_19 Depth=3
	movq	-104(%rbp), %rsi
	movq	24(%rbx), %rcx
LBB0_18:                                ##   in Loop: Header=BB0_19 Depth=3
	leaq	-1(%rsi), %rdx
	movq	%rdx, -104(%rbp)
	cmpq	%rcx, %rsi
	movq	%rdx, %rsi
	jle	LBB0_13
LBB0_19:                                ##   Parent Loop BB0_11 Depth=1
                                        ##     Parent Loop BB0_15 Depth=2
                                        ## =>    This Loop Header: Depth=3
                                        ##         Child Loop BB0_21 Depth 4
	movq	(%rbx), %rdx
	movq	%rdx, -96(%rbp)
	cmpq	%rax, %rdx
	jge	LBB0_21
	jmp	LBB0_18
	.p2align	4, 0x90
LBB0_20:                                ##   in Loop: Header=BB0_21 Depth=4
	movq	-96(%rbp), %rcx
	leaq	-1(%rcx), %rax
	movq	%rax, -96(%rbp)
	movq	8(%rbx), %rax
	cmpq	%rax, %rcx
	jle	LBB0_17
LBB0_21:                                ##   Parent Loop BB0_11 Depth=1
                                        ##     Parent Loop BB0_15 Depth=2
                                        ##       Parent Loop BB0_19 Depth=3
                                        ## =>      This Inner Loop Header: Depth=4
	movq	%r13, %rdi
	movl	%r15d, %esi
	movq	%r14, %rdx
	callq	_intel_clock
	movq	%r13, %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	callq	_intel_PLL_is_valid
	testl	%eax, %eax
	je	LBB0_20
## %bb.22:                              ##   in Loop: Header=BB0_21 Depth=4
	testq	%r12, %r12
	je	LBB0_24
## %bb.23:                              ##   in Loop: Header=BB0_21 Depth=4
	movq	-88(%rbp), %rax
	cmpq	32(%r12), %rax
	jne	LBB0_20
LBB0_24:                                ##   in Loop: Header=BB0_21 Depth=4
	movq	-80(%rbp), %rdi
	subq	-128(%rbp), %rdi                ## 8-byte Folded Reload
	callq	_abs
	cmpl	-44(%rbp), %eax                 ## 4-byte Folded Reload
	jge	LBB0_20
## %bb.25:                              ##   in Loop: Header=BB0_21 Depth=4
	movq	-72(%rbp), %rcx
	movq	-64(%rbp), %rdx                 ## 8-byte Reload
	movq	%rcx, 48(%rdx)
	movups	-120(%rbp), %xmm0
	movups	-104(%rbp), %xmm1
	movups	-88(%rbp), %xmm2
	movups	%xmm2, 32(%rdx)
	movups	%xmm1, 16(%rdx)
	movups	%xmm0, (%rdx)
	movl	$1, -48(%rbp)                   ## 4-byte Folded Spill
	movl	-120(%rbp), %ecx
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	jmp	LBB0_20
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_OUTPUT_LVDS,4,2          ## @INTEL_OUTPUT_LVDS
	.comm	_PCH_LVDS,4,2                   ## @PCH_LVDS
	.comm	_LVDS,4,2                       ## @LVDS
	.no_dead_strip	_intel_g4x_find_best_PLL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_g4x_find_best_PLL
_intel_g4x_find_best_PLL:               ; @intel_g4x_find_best_PLL
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #160
	.cfi_def_cfa_offset 160
	stp	x28, x27, [sp, #64]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #80]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #96]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #112]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #128]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #144]            ; 16-byte Folded Spill
	add	x29, sp, #144
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x5
	mov	x20, x4
	mov	x21, x3
	mov	x25, x2
	mov	x8, x1
	mov	x22, x0
	ldr	x23, [x1]
Lloh0:
	adrp	x9, _INTEL_OUTPUT_LVDS@GOTPAGE
Lloh1:
	ldr	x9, [x9, _INTEL_OUTPUT_LVDS@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x9]
	mov	x0, x8
	bl	_intel_pipe_has_type
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x23
	bl	_HAS_PCH_SPLIT
	mov	x0, x23
	bl	_intel_is_dual_link_lvds
	add	x8, x22, #64
	add	x9, x22, #60
	cmp	x0, #0
	csel	x8, x8, x9, eq
	b	LBB0_3
LBB0_2:
	ldr	w8, [x22, #56]
	cmp	w8, w25
	add	x8, x22, #60
	add	x9, x22, #64
	csel	x8, x8, x9, le
LBB0_3:
	ldr	w8, [x8]
	str	w8, [sp, #56]
	mov	x0, x19
	mov	w1, #0
	mov	w2, #56
	bl	_memset
	mov	w24, #0
	ldp	w26, w9, [x22, #48]
	str	w9, [sp, #8]
	cmp	w9, w26
	b.le	LBB0_5
LBB0_4:
	mov	x0, x24
	ldp	x29, x30, [sp, #144]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #128]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #112]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #96]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #80]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #160
	ret
LBB0_5:
	mov	w24, #0
	asr	w8, w25, #8
	add	w27, w8, w25, asr #9
	sxtw	x25, w25
	ldr	x8, [x22, #40]
	b	LBB0_8
LBB0_6:                                 ;   in Loop: Header=BB0_8 Depth=1
	ldr	w9, [sp, #8]
LBB0_7:                                 ;   in Loop: Header=BB0_8 Depth=1
	add	w10, w9, #1
	str	w10, [sp, #8]
	cmp	w9, w26
	mov	x9, x10
	b.ge	LBB0_4
LBB0_8:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_12 Depth 2
                                        ;       Child Loop BB0_16 Depth 3
                                        ;         Child Loop BB0_18 Depth 4
	ldr	x10, [x22, #32]
	str	x10, [sp, #16]
	cmp	x10, x8
	b.lt	LBB0_7
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=1
	ldr	x9, [x22, #24]
	b	LBB0_12
LBB0_10:                                ;   in Loop: Header=BB0_12 Depth=2
	ldr	x10, [sp, #16]
	ldr	x8, [x22, #40]
LBB0_11:                                ;   in Loop: Header=BB0_12 Depth=2
	sub	x11, x10, #1
	str	x11, [sp, #16]
	cmp	x10, x8
	mov	x10, x11
	b.le	LBB0_6
LBB0_12:                                ;   Parent Loop BB0_8 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_16 Depth 3
                                        ;         Child Loop BB0_18 Depth 4
	ldr	x11, [x22, #16]
	str	x11, [sp, #24]
	cmp	x11, x9
	b.lt	LBB0_11
; %bb.13:                               ;   in Loop: Header=BB0_12 Depth=2
	ldr	x8, [x22, #8]
	b	LBB0_16
LBB0_14:                                ;   in Loop: Header=BB0_16 Depth=3
	ldr	x11, [sp, #24]
	ldr	x9, [x22, #24]
LBB0_15:                                ;   in Loop: Header=BB0_16 Depth=3
	sub	x10, x11, #1
	str	x10, [sp, #24]
	cmp	x11, x9
	mov	x11, x10
	b.le	LBB0_10
LBB0_16:                                ;   Parent Loop BB0_8 Depth=1
                                        ;     Parent Loop BB0_12 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_18 Depth 4
	ldr	x10, [x22]
	str	x10, [sp, #32]
	cmp	x10, x8
	b.ge	LBB0_18
	b	LBB0_15
LBB0_17:                                ;   in Loop: Header=BB0_18 Depth=4
	ldr	x9, [sp, #32]
	sub	x8, x9, #1
	str	x8, [sp, #32]
	ldr	x8, [x22, #8]
	cmp	x9, x8
	b.le	LBB0_14
LBB0_18:                                ;   Parent Loop BB0_8 Depth=1
                                        ;     Parent Loop BB0_12 Depth=2
                                        ;       Parent Loop BB0_16 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	add	x2, sp, #8
	mov	x0, x23
	mov	x1, x21
	bl	_intel_clock
	add	x2, sp, #8
	mov	x0, x23
	mov	x1, x22
	bl	_intel_PLL_is_valid
	cbz	w0, LBB0_17
; %bb.19:                               ;   in Loop: Header=BB0_18 Depth=4
	cbz	x20, LBB0_21
; %bb.20:                               ;   in Loop: Header=BB0_18 Depth=4
	ldr	x8, [sp, #40]
	ldr	x9, [x20, #32]
	cmp	x8, x9
	b.ne	LBB0_17
LBB0_21:                                ;   in Loop: Header=BB0_18 Depth=4
	ldr	x8, [sp, #48]
	sub	x0, x8, x25
	bl	_abs
	cmp	w0, w27
	b.ge	LBB0_17
; %bb.22:                               ;   in Loop: Header=BB0_18 Depth=4
	ldur	q0, [sp, #8]
	ldur	q1, [sp, #24]
	ldur	q2, [sp, #40]
	stp	q0, q1, [x19]
	str	q2, [x19, #32]
	ldr	x8, [sp, #56]
	str	x8, [x19, #48]
	mov	w24, #1
	ldr	w26, [sp, #8]
	mov	x27, x0
	b	LBB0_17
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_OUTPUT_LVDS,4,2          ; @INTEL_OUTPUT_LVDS
	.comm	_PCH_LVDS,4,2                   ; @PCH_LVDS
	.comm	_LVDS,4,2                       ; @LVDS
	.no_dead_strip	_intel_g4x_find_best_PLL
.subsections_via_symbols
