	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_cp_setparam
_radeon_cp_setparam:                    ## @radeon_cp_setparam
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rsi), %eax
	leal	-128(%rax), %ecx
	cmpl	$5, %ecx
	ja	LBB0_3
## %bb.1:
	movq	(%rdi), %r14
	leaq	LJTI0_0(%rip), %rax
	movslq	(%rax,%rcx,4), %rcx
	addq	%rax, %rcx
	jmpq	*%rcx
LBB0_2:
	movl	4(%rsi), %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_vblank_crtc_set         ## TAILCALL
LBB0_3:
	leaq	L_.str.2(%rip), %rdi
	xorl	%ebx, %ebx
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_13
LBB0_4:
	movq	8(%rdx), %rax
	movq	(%rax), %r15
	movl	4(%rsi), %eax
	cmpl	$1, %eax
	je	LBB0_14
## %bb.5:
	xorl	%ebx, %ebx
	testl	%eax, %eax
	jne	LBB0_13
## %bb.6:
	leaq	L_.str(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movq	_RADEON_DST_TILE_MACRO@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 24(%r14)
	andl	%eax, 20(%r14)
	movq	(%r15), %rax
	testq	%rax, %rax
	je	LBB0_13
## %bb.7:
	movl	$0, (%rax)
	jmp	LBB0_13
LBB0_8:
	movl	4(%rsi), %eax
	movq	_RADEON_PCIGART_TABLE_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	cmpl	%ecx, %eax
	cmovgl	%eax, %ecx
	movl	%ecx, 16(%r14)
	jmp	LBB0_12
LBB0_9:
	movl	4(%rsi), %eax
	movl	%eax, 4(%r14)
	movl	$1, 8(%r14)
	jmp	LBB0_12
LBB0_10:
	movl	4(%rsi), %eax
	movl	%eax, 12(%r14)
	jmp	LBB0_12
LBB0_11:
	movq	(%rdx), %rax
	movl	(%r14), %ecx
	subl	4(%rsi), %ecx
	movl	%ecx, (%rax)
LBB0_12:
	xorl	%ebx, %ebx
LBB0_13:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_14:
	leaq	L_.str.1(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movq	_RADEON_DST_TILE_MACRO@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 24(%r14)
	orl	%eax, 20(%r14)
	movq	(%r15), %rax
	testq	%rax, %rax
	je	LBB0_13
## %bb.15:
	movl	$1, (%rax)
	jmp	LBB0_13
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
LJTI0_0:
	.long	L0_0_set_2
	.long	L0_0_set_4
	.long	L0_0_set_8
	.long	L0_0_set_9
	.long	L0_0_set_10
	.long	L0_0_set_11
	.end_data_region
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"color tiling disabled\n"

	.comm	_RADEON_DST_TILE_MACRO,4,2      ## @RADEON_DST_TILE_MACRO
L_.str.1:                               ## @.str.1
	.asciz	"color tiling enabled\n"

	.comm	_RADEON_PCIGART_TABLE_SIZE,4,2  ## @RADEON_PCIGART_TABLE_SIZE
L_.str.2:                               ## @.str.2
	.asciz	"Invalid parameter %d\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_radeon_cp_setparam
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_cp_setparam
_radeon_cp_setparam:                    ; @radeon_cp_setparam
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	w9, [x1]
	sub	w8, w9, #128
	cmp	w8, #5
	b.hi	LBB0_5
; %bb.1:
	ldr	x19, [x0]
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
	ldr	w1, [x1, #4]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	b	_radeon_vblank_crtc_set
LBB0_3:
	mov	w0, #0
	ldr	w8, [x1, #4]
Lloh2:
	adrp	x9, _RADEON_PCIGART_TABLE_SIZE@GOTPAGE
Lloh3:
	ldr	x9, [x9, _RADEON_PCIGART_TABLE_SIZE@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	cmp	w8, w9
	csel	w8, w8, w9, gt
	str	w8, [x19, #16]
	b	LBB0_15
LBB0_4:
	mov	w0, #0
	ldr	w8, [x1, #4]
	str	w8, [x19, #12]
	b	LBB0_15
LBB0_5:
	str	x9, [sp]
Lloh5:
	adrp	x0, l_.str.2@PAGE
Lloh6:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_DEBUG
Lloh7:
	adrp	x8, _EINVAL@GOTPAGE
Lloh8:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_15
LBB0_6:
	ldr	x8, [x2, #8]
	ldr	x20, [x8]
	ldr	w8, [x1, #4]
	cmp	w8, #1
	b.eq	LBB0_12
; %bb.7:
	cbnz	w8, LBB0_14
; %bb.8:
Lloh10:
	adrp	x0, l_.str@PAGE
Lloh11:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
Lloh12:
	adrp	x8, _RADEON_DST_TILE_MACRO@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RADEON_DST_TILE_MACRO@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	mvn	w8, w8
	ldur	d0, [x19, #20]
	dup.2s	v1, w8
	and.8b	v0, v0, v1
	stur	d0, [x19, #20]
	ldr	x8, [x20]
	cbz	x8, LBB0_14
; %bb.9:
	mov	w0, #0
	str	wzr, [x8]
	b	LBB0_15
LBB0_10:
	mov	w0, #0
	ldr	w8, [x1, #4]
	mov	w9, #1
	stp	w8, w9, [x19, #4]
	b	LBB0_15
LBB0_11:
	mov	w0, #0
	ldr	x8, [x2]
	ldr	w9, [x19]
	ldr	w10, [x1, #4]
	sub	w9, w9, w10
	str	w9, [x8]
	b	LBB0_15
LBB0_12:
Lloh15:
	adrp	x0, l_.str.1@PAGE
Lloh16:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_DEBUG
Lloh17:
	adrp	x8, _RADEON_DST_TILE_MACRO@GOTPAGE
Lloh18:
	ldr	x8, [x8, _RADEON_DST_TILE_MACRO@GOTPAGEOFF]
	ldur	d0, [x19, #20]
	ld1r.2s	{ v1 }, [x8]
	orr.8b	v0, v0, v1
	stur	d0, [x19, #20]
	ldr	x8, [x20]
	cbz	x8, LBB0_14
; %bb.13:
	mov	w0, #0
	mov	w9, #1
	str	w9, [x8]
	b	LBB0_15
LBB0_14:
	mov	w0, #0
LBB0_15:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpAdd	Lloh15, Lloh16
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_10-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_11-LBB0_2)>>2
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"color tiling disabled\n"

	.comm	_RADEON_DST_TILE_MACRO,4,2      ; @RADEON_DST_TILE_MACRO
l_.str.1:                               ; @.str.1
	.asciz	"color tiling enabled\n"

	.comm	_RADEON_PCIGART_TABLE_SIZE,4,2  ; @RADEON_PCIGART_TABLE_SIZE
l_.str.2:                               ; @.str.2
	.asciz	"Invalid parameter %d\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_radeon_cp_setparam
.subsections_via_symbols
