	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_gtt_mappable_entries
_intel_gtt_mappable_entries:            ## @intel_gtt_mappable_entries
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	subq	$16, %rsp
	movq	_INTEL_GTT_GEN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	$2, %eax
	je	LBB0_3
## %bb.1:
	cmpl	$1, %eax
	jne	LBB0_4
## %bb.2:
	movq	_intel_private@GOTPCREL(%rip), %rax
	movl	4(%rax), %edi
	movq	_I810_SMRAM_MISCC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-8(%rbp), %rdx
	callq	_pci_read_config_dword
	movq	_I810_GFX_MEM_WIN_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-8(%rbp), %eax
	movq	_I810_GFX_MEM_WIN_32M@GOTPCREL(%rip), %rcx
	xorl	%edi, %edi
	cmpl	(%rcx), %eax
	setne	%dil
	shll	$5, %edi
	addl	$32, %edi
	callq	_MB
	jmp	LBB0_5
LBB0_3:
	movq	_intel_private@GOTPCREL(%rip), %rax
	movl	4(%rax), %edi
	movq	_I830_GMCH_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-4(%rbp), %rdx
	callq	_pci_read_config_word
	movq	_I830_GMCH_MEM_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-4(%rbp), %eax
	movq	_I830_GMCH_MEM_64M@GOTPCREL(%rip), %rcx
	xorl	%edi, %edi
	cmpl	(%rcx), %eax
	setne	%dil
	shll	$6, %edi
	addl	$64, %edi
	callq	_MB
	jmp	LBB0_5
LBB0_4:
	movq	_intel_private@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$2, %esi
	callq	_pci_resource_len
LBB0_5:
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shrl	%cl, %eax
	addq	$16, %rsp
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_GTT_GEN,4,2              ## @INTEL_GTT_GEN
	.comm	_intel_private,8,2              ## @intel_private
	.comm	_I810_SMRAM_MISCC,4,2           ## @I810_SMRAM_MISCC
	.comm	_I810_GFX_MEM_WIN_SIZE,4,2      ## @I810_GFX_MEM_WIN_SIZE
	.comm	_I810_GFX_MEM_WIN_32M,4,2       ## @I810_GFX_MEM_WIN_32M
	.comm	_I830_GMCH_CTRL,4,2             ## @I830_GMCH_CTRL
	.comm	_I830_GMCH_MEM_MASK,4,2         ## @I830_GMCH_MEM_MASK
	.comm	_I830_GMCH_MEM_64M,4,2          ## @I830_GMCH_MEM_64M
	.comm	_PAGE_SHIFT,4,2                 ## @PAGE_SHIFT
	.no_dead_strip	_intel_gtt_mappable_entries
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_gtt_mappable_entries
_intel_gtt_mappable_entries:            ; @intel_gtt_mappable_entries
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #32
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
Lloh0:
	adrp	x8, _INTEL_GTT_GEN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_GTT_GEN@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, #2
	b.eq	LBB0_3
; %bb.1:
	cmp	w8, #1
	b.ne	LBB0_5
; %bb.2:
Lloh3:
	adrp	x8, _intel_private@GOTPAGE
Lloh4:
	ldr	x8, [x8, _intel_private@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8, #4]
Lloh6:
	adrp	x8, _I810_SMRAM_MISCC@GOTPAGE
Lloh7:
	ldr	x8, [x8, _I810_SMRAM_MISCC@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	sub	x2, x29, #4
	bl	_pci_read_config_dword
	ldur	w8, [x29, #-4]
Lloh9:
	adrp	x9, _I810_GFX_MEM_WIN_SIZE@GOTPAGE
Lloh10:
	ldr	x9, [x9, _I810_GFX_MEM_WIN_SIZE@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
Lloh12:
	adrp	x10, _I810_GFX_MEM_WIN_32M@GOTPAGE
Lloh13:
	ldr	x10, [x10, _I810_GFX_MEM_WIN_32M@GOTPAGEOFF]
	and	w8, w9, w8
Lloh14:
	ldr	w9, [x10]
	mov	w10, #64
	mov	w11, #32
	b	LBB0_4
LBB0_3:
Lloh15:
	adrp	x8, _intel_private@GOTPAGE
Lloh16:
	ldr	x8, [x8, _intel_private@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8, #4]
Lloh18:
	adrp	x8, _I830_GMCH_CTRL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _I830_GMCH_CTRL@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	add	x2, sp, #8
	bl	_pci_read_config_word
	ldr	w8, [sp, #8]
Lloh21:
	adrp	x9, _I830_GMCH_MEM_MASK@GOTPAGE
Lloh22:
	ldr	x9, [x9, _I830_GMCH_MEM_MASK@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
Lloh24:
	adrp	x10, _I830_GMCH_MEM_64M@GOTPAGE
Lloh25:
	ldr	x10, [x10, _I830_GMCH_MEM_64M@GOTPAGEOFF]
	and	w8, w9, w8
Lloh26:
	ldr	w9, [x10]
	mov	w10, #128
	mov	w11, #64
LBB0_4:
	cmp	w8, w9
	csel	w0, w11, w10, eq
	bl	_MB
	b	LBB0_6
LBB0_5:
Lloh27:
	adrp	x8, _intel_private@GOTPAGE
Lloh28:
	ldr	x8, [x8, _intel_private@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
	mov	w1, #2
	bl	_pci_resource_len
LBB0_6:
Lloh30:
	adrp	x8, _PAGE_SHIFT@GOTPAGE
Lloh31:
	ldr	x8, [x8, _PAGE_SHIFT@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	lsr	w0, w0, w8
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #32
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_GTT_GEN,4,2              ; @INTEL_GTT_GEN
	.comm	_intel_private,8,2              ; @intel_private
	.comm	_I810_SMRAM_MISCC,4,2           ; @I810_SMRAM_MISCC
	.comm	_I810_GFX_MEM_WIN_SIZE,4,2      ; @I810_GFX_MEM_WIN_SIZE
	.comm	_I810_GFX_MEM_WIN_32M,4,2       ; @I810_GFX_MEM_WIN_32M
	.comm	_I830_GMCH_CTRL,4,2             ; @I830_GMCH_CTRL
	.comm	_I830_GMCH_MEM_MASK,4,2         ; @I830_GMCH_MEM_MASK
	.comm	_I830_GMCH_MEM_64M,4,2          ; @I830_GMCH_MEM_64M
	.comm	_PAGE_SHIFT,4,2                 ; @PAGE_SHIFT
	.no_dead_strip	_intel_gtt_mappable_entries
.subsections_via_symbols
