	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nve0_fifo_chan_init
_nve0_fifo_chan_init:                   ## @nve0_fifo_chan_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movl	8(%rdi), %edi
	callq	_nv_gpuobj
	movq	%rax, %r13
	movq	(%rbx), %r12
	leaq	4(%rbx), %rdi
	callq	_nouveau_fifo_channel_init
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	%r12, %r15
	shrq	$29, %r15
	andl	$-8, %r15d
	leal	8388612(%r15), %esi
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movl	(%rbx), %ecx
	shll	$16, %ecx
	movq	%r12, %rdi
	movl	$983040, %edx                   ## imm = 0xF0000
	callq	_nv_mask
	addl	$8388608, %r15d                 ## imm = 0x800000
	movl	(%r13), %edx
	sarl	$12, %edx
	orl	$-2147483648, %edx              ## imm = 0x80000000
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_nv_wr32
	movq	%r12, %rdi
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	movl	%r15d, %esi
	movl	$1024, %edx                     ## imm = 0x400
	movl	$1024, %ecx                     ## imm = 0x400
	callq	_nv_mask
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_nve0_fifo_playlist_update
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	$1024, %edx                     ## imm = 0x400
	movl	$1024, %ecx                     ## imm = 0x400
	callq	_nv_mask
LBB0_2:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_nve0_fifo_chan_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nve0_fifo_chan_init
_nve0_fifo_chan_init:                   ; @nve0_fifo_chan_init
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x0
	ldr	w0, [x0, #8]
	bl	_nv_gpuobj
	mov	x22, x0
	ldr	x20, [x21]
	add	x0, x21, #4
	bl	_nouveau_fifo_channel_init
	mov	x19, x0
	cbnz	w0, LBB0_2
; %bb.1:
	lsr	x8, x20, #29
	and	w24, w8, #0xfffffff8
	add	w8, w24, #2048, lsl #12         ; =8388608
	add	w23, w8, #4
	ldr	w8, [x21]
	lsl	w3, w8, #16
	mov	x0, x20
	mov	x1, x23
	mov	w2, #983040
	bl	_nv_mask
	add	w1, w24, #2048, lsl #12         ; =8388608
	ldr	w8, [x22]
	asr	w8, w8, #12
	orr	w2, w8, #0x80000000
	mov	x0, x20
	bl	_nv_wr32
	mov	x0, x20
	mov	x1, x23
	mov	w2, #1024
	mov	w3, #1024
	bl	_nv_mask
	ldr	w1, [x21]
	mov	x0, x20
	bl	_nve0_fifo_playlist_update
	mov	x0, x20
	mov	x1, x23
	mov	w2, #1024
	mov	w3, #1024
	bl	_nv_mask
LBB0_2:
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_nve0_fifo_chan_init
.subsections_via_symbols
