	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function socrates_nand_write_buf
_socrates_nand_write_buf:               ## @socrates_nand_write_buf
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	testl	%edx, %edx
	jle	LBB0_3
## %bb.1:
	movq	%rsi, %r14
	movq	(%rdi), %rax
	movq	(%rax), %r15
	movl	%edx, %r12d
	xorl	%ebx, %ebx
	movq	_FPGA_NAND_DATA_SHIFT@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r15), %edi
	movq	_FPGA_NAND_CMD_WRITE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_FPGA_NAND_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r14,%rbx,4), %esi
	movzbl	(%r13), %ecx
	shll	%cl, %esi
	orl	%eax, %esi
	callq	_out_be32
	incq	%rbx
	cmpq	%rbx, %r12
	jne	LBB0_2
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_FPGA_NAND_ENABLE,4,2           ## @FPGA_NAND_ENABLE
	.comm	_FPGA_NAND_CMD_WRITE,4,2        ## @FPGA_NAND_CMD_WRITE
	.comm	_FPGA_NAND_DATA_SHIFT,4,2       ## @FPGA_NAND_DATA_SHIFT
	.no_dead_strip	_socrates_nand_write_buf
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function socrates_nand_write_buf
_socrates_nand_write_buf:               ; @socrates_nand_write_buf
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	cmp	w2, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x19, x1
	ldr	x8, [x0]
	ldr	x20, [x8]
	mov	w21, w2
Lloh0:
	adrp	x22, _FPGA_NAND_ENABLE@GOTPAGE
Lloh1:
	ldr	x22, [x22, _FPGA_NAND_ENABLE@GOTPAGEOFF]
Lloh2:
	adrp	x23, _FPGA_NAND_CMD_WRITE@GOTPAGE
Lloh3:
	ldr	x23, [x23, _FPGA_NAND_CMD_WRITE@GOTPAGEOFF]
Lloh4:
	adrp	x24, _FPGA_NAND_DATA_SHIFT@GOTPAGE
Lloh5:
	ldr	x24, [x24, _FPGA_NAND_DATA_SHIFT@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x20]
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	ldr	w9, [x19], #4
	ldr	w10, [x24]
	lsl	w9, w9, w10
	orr	w1, w8, w9
	bl	_out_be32
	subs	x21, x21, #1
	b.ne	LBB0_2
LBB0_3:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_FPGA_NAND_ENABLE,4,2           ; @FPGA_NAND_ENABLE
	.comm	_FPGA_NAND_CMD_WRITE,4,2        ; @FPGA_NAND_CMD_WRITE
	.comm	_FPGA_NAND_DATA_SHIFT,4,2       ; @FPGA_NAND_DATA_SHIFT
	.no_dead_strip	_socrates_nand_write_buf
.subsections_via_symbols
