	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rs690_mc_init
_rs690_mc_init:                         ## @rs690_mc_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	callq	_rs400_gart_adjust_size
	movabsq	$549755813889, %rax             ## imm = 0x8000000001
	movq	%rax, (%rbx)
	movq	_RADEON_CONFIG_MEMSIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%eax, 40(%rbx)
	movl	%eax, 44(%rbx)
	movl	48(%rbx), %edi
	xorl	%esi, %esi
	callq	_pci_resource_start
	movl	%eax, 36(%rbx)
	movl	48(%rbx), %edi
	xorl	%esi, %esi
	callq	_pci_resource_len
	movl	%eax, 28(%rbx)
	movl	%eax, 32(%rbx)
	movq	_R_000100_MCCFG_FB_LOCATION@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_MC
	movl	%eax, %edi
	callq	_G_000100_MC_FB_START
	movl	%eax, %r14d
	shll	$16, %r14d
	movq	%rbx, %rdi
	callq	_radeon_atombios_sideport_present
	movl	%eax, 24(%rbx)
	movq	%rbx, %rdi
	callq	_rs690_pm_info
	movq	%rbx, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_radeon_vram_location
	movq	8(%rbx), %rax
	decq	%rax
	movq	%rax, 16(%rbx)
	movq	%rbx, %rdi
	movq	%rbx, %rsi
	callq	_radeon_gtt_location
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_radeon_update_bandwidth_info   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_CONFIG_MEMSIZE,4,2      ## @RADEON_CONFIG_MEMSIZE
	.comm	_R_000100_MCCFG_FB_LOCATION,4,2 ## @R_000100_MCCFG_FB_LOCATION
	.no_dead_strip	_rs690_mc_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function rs690_mc_init
lCPI0_0:
	.long	1                               ; 0x1
	.long	128                             ; 0x80
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_rs690_mc_init:                         ; @rs690_mc_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_rs400_gart_adjust_size
Lloh0:
	adrp	x8, lCPI0_0@PAGE
Lloh1:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	str	d0, [x19]
Lloh2:
	adrp	x8, _RADEON_CONFIG_MEMSIZE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RADEON_CONFIG_MEMSIZE@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	bl	_RREG32
	stp	w0, w0, [x19, #40]
	ldr	w0, [x19, #48]
	mov	w1, #0
	bl	_pci_resource_start
	str	w0, [x19, #36]
	ldr	w0, [x19, #48]
	mov	w1, #0
	bl	_pci_resource_len
	stp	w0, w0, [x19, #28]
Lloh5:
	adrp	x8, _R_000100_MCCFG_FB_LOCATION@GOTPAGE
Lloh6:
	ldr	x8, [x8, _R_000100_MCCFG_FB_LOCATION@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	bl	_RREG32_MC
	bl	_G_000100_MC_FB_START
	lsl	w20, w0, #16
	mov	x0, x19
	bl	_radeon_atombios_sideport_present
	str	w0, [x19, #24]
	mov	x0, x19
	bl	_rs690_pm_info
	mov	x0, x19
	mov	x1, x19
	mov	x2, x20
	bl	_radeon_vram_location
	ldr	x8, [x19, #8]
	sub	x8, x8, #1
	str	x8, [x19, #16]
	mov	x0, x19
	mov	x1, x19
	bl	_radeon_gtt_location
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_radeon_update_bandwidth_info
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdrp	Lloh0, Lloh2
	.loh AdrpLdr	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_CONFIG_MEMSIZE,4,2      ; @RADEON_CONFIG_MEMSIZE
	.comm	_R_000100_MCCFG_FB_LOCATION,4,2 ; @R_000100_MCCFG_FB_LOCATION
	.no_dead_strip	_rs690_mc_init
.subsections_via_symbols
