	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_driver_irq_uninstall_kms ## -- Begin function radeon_driver_irq_uninstall_kms
	.p2align	4, 0x90
_radeon_driver_irq_uninstall_kms:       ## @radeon_driver_irq_uninstall_kms
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %r12
	testq	%r12, %r12
	je	LBB0_11
## %bb.1:
	leaq	24(%r12), %r14
	movq	%r14, %rdi
	callq	_spin_lock_irqsave
	movq	_RADEON_NUM_RINGS@GOTPCREL(%rip), %r15
	cmpl	$0, (%r15)
	je	LBB0_4
## %bb.2:
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	40(%r12), %rdi
	addq	%r13, %rdi
	xorl	%esi, %esi
	callq	_atomic_set
	incq	%rbx
	movl	(%r15), %eax
	addq	$4, %r13
	cmpq	%rax, %rbx
	jb	LBB0_3
LBB0_4:
	movq	_RADEON_MAX_HPD_PINS@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	je	LBB0_7
## %bb.5:
	movq	(%r12), %rcx
	xorl	%edx, %edx
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movl	$0, (%rcx,%rdx,4)
	incq	%rdx
	movl	(%rax), %esi
	cmpq	%rsi, %rdx
	jb	LBB0_6
LBB0_7:
	movq	_RADEON_MAX_CRTCS@GOTPCREL(%rip), %r15
	cmpl	$0, (%r15)
	je	LBB0_10
## %bb.8:
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r12), %rax
	movl	$0, (%rax,%rbx)
	movq	32(%r12), %rdi
	addq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_atomic_set
	movq	16(%r12), %rax
	movl	$0, (%rax,%rbx)
	incq	%r13
	movl	(%r15), %eax
	addq	$4, %rbx
	cmpq	%rax, %r13
	jb	LBB0_9
LBB0_10:
	movq	%r12, %rdi
	callq	_radeon_irq_set
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_spin_unlock_irqrestore         ## TAILCALL
LBB0_11:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_NUM_RINGS,4,2           ## @RADEON_NUM_RINGS
	.comm	_RADEON_MAX_HPD_PINS,4,2        ## @RADEON_MAX_HPD_PINS
	.comm	_RADEON_MAX_CRTCS,4,2           ## @RADEON_MAX_CRTCS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_driver_irq_uninstall_kms ; -- Begin function radeon_driver_irq_uninstall_kms
	.p2align	2
_radeon_driver_irq_uninstall_kms:       ; @radeon_driver_irq_uninstall_kms
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	x19, [x0]
	cbz	x19, LBB0_11
; %bb.1:
	add	x20, x19, #24
	mov	x0, x20
	bl	_spin_lock_irqsave
Lloh0:
	adrp	x21, _RADEON_NUM_RINGS@GOTPAGE
Lloh1:
	ldr	x21, [x21, _RADEON_NUM_RINGS@GOTPAGEOFF]
	ldr	w8, [x21]
	cbz	w8, LBB0_4
; %bb.2:
	mov	x22, #0
	mov	x23, #0
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #40]
	add	x0, x8, x22
	mov	w1, #0
	bl	_atomic_set
	add	x23, x23, #1
	ldr	w8, [x21]
	add	x22, x22, #4
	cmp	x23, x8
	b.lo	LBB0_3
LBB0_4:
Lloh2:
	adrp	x8, _RADEON_MAX_HPD_PINS@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RADEON_MAX_HPD_PINS@GOTPAGEOFF]
	ldr	w9, [x8]
	cbz	w9, LBB0_7
; %bb.5:
	mov	x9, #0
	ldr	x10, [x19]
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	str	wzr, [x10, x9, lsl #2]
	add	x9, x9, #1
	ldr	w11, [x8]
	cmp	x9, x11
	b.lo	LBB0_6
LBB0_7:
Lloh4:
	adrp	x21, _RADEON_MAX_CRTCS@GOTPAGE
Lloh5:
	ldr	x21, [x21, _RADEON_MAX_CRTCS@GOTPAGEOFF]
	ldr	w8, [x21]
	cbz	w8, LBB0_10
; %bb.8:
	mov	x22, #0
	mov	x23, #0
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #8]
	str	wzr, [x8, x22]
	ldr	x8, [x19, #32]
	add	x0, x8, x22
	mov	w1, #0
	bl	_atomic_set
	ldr	x8, [x19, #16]
	str	wzr, [x8, x22]
	add	x23, x23, #1
	ldr	w8, [x21]
	add	x22, x22, #4
	cmp	x23, x8
	b.lo	LBB0_9
LBB0_10:
	mov	x0, x19
	bl	_radeon_irq_set
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_spin_unlock_irqrestore
LBB0_11:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_NUM_RINGS,4,2           ; @RADEON_NUM_RINGS
	.comm	_RADEON_MAX_HPD_PINS,4,2        ; @RADEON_MAX_HPD_PINS
	.comm	_RADEON_MAX_CRTCS,4,2           ; @RADEON_MAX_CRTCS
.subsections_via_symbols
