	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_compute_pll_gain
_radeon_compute_pll_gain:               ## @radeon_compute_pll_gain
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	testl	%esi, %esi
	je	LBB0_1
## %bb.2:
	imull	%edi, %edx
	movl	%edx, %eax
	xorl	%edx, %edx
	divl	%esi
	movl	%eax, %ecx
	movl	$7, %eax
	cmpl	$29999, %ecx                    ## imm = 0x752F
	ja	LBB0_4
## %bb.3:
	xorl	%eax, %eax
	cmpl	$18000, %ecx                    ## imm = 0x4650
	setae	%al
	leal	(%rax,%rax,2), %eax
	incl	%eax
LBB0_4:
	popq	%rbp
	retq
LBB0_1:
	movl	$1, %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_radeon_compute_pll_gain
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_compute_pll_gain
_radeon_compute_pll_gain:               ; @radeon_compute_pll_gain
	.cfi_startproc
; %bb.0:
	cbz	w1, LBB0_3
; %bb.1:
	mul	w8, w2, w0
	udiv	w8, w8, w1
	lsr	w8, w8, #4
	cmp	w8, #1874
	b.ls	LBB0_4
; %bb.2:
	mov	w0, #7
	ret
LBB0_3:
	mov	w0, #1
	ret
LBB0_4:
	cmp	w8, #1124
	mov	w8, #4
	csinc	w0, w8, wzr, hi
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_radeon_compute_pll_gain
.subsections_via_symbols
