	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_igu_int_enable
_bnx2x_igu_int_enable:                  ## @bnx2x_igu_int_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	(%rdi), %r12d
	movq	_USING_MSIX_FLAG@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_USING_SINGLE_MSIX_FLAG@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_USING_MSI_FLAG@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_IGU_REG_PF_CONFIGURATION@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_REG_RD
	testl	%r12d, %r13d
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	je	LBB0_1
## %bb.5:
	movq	_IGU_PF_CONF_INT_LINE_EN@GOTPCREL(%rip), %rdx
	movq	_IGU_PF_CONF_SINGLE_ISR_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	(%rdx), %edx
	orl	%ecx, %edx
	notl	%edx
	andl	%edx, %eax
	movq	_IGU_PF_CONF_MSI_MSIX_EN@GOTPCREL(%rip), %rdx
	movq	_IGU_PF_CONF_ATTN_BIT_EN@GOTPCREL(%rip), %rsi
	movl	(%rsi), %ebx
	orl	(%rdx), %ebx
	orl	%eax, %ebx
	testl	%r12d, %r15d
	je	LBB0_6
## %bb.7:
	orl	%ecx, %ebx
	jmp	LBB0_8
LBB0_1:
	testl	%r12d, %ebx
	je	LBB0_4
## %bb.2:
	movq	_IGU_PF_CONF_INT_LINE_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	andl	%ecx, %eax
	movq	_IGU_PF_CONF_MSI_MSIX_EN@GOTPCREL(%rip), %rcx
	jmp	LBB0_3
LBB0_6:
	movq	_IGU_REG_PF_CONFIGURATION@GOTPCREL(%rip), %r15
	jmp	LBB0_9
LBB0_4:
	movq	_IGU_PF_CONF_MSI_MSIX_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	andl	%ecx, %eax
	movq	_IGU_PF_CONF_INT_LINE_EN@GOTPCREL(%rip), %rcx
LBB0_3:
	movq	_IGU_PF_CONF_ATTN_BIT_EN@GOTPCREL(%rip), %rdx
	movq	_IGU_PF_CONF_SINGLE_ISR_EN@GOTPCREL(%rip), %rsi
	orl	(%rcx), %eax
	orl	(%rdx), %eax
	orl	(%rsi), %eax
	movl	%eax, %ebx
LBB0_8:
	movq	_IGU_REG_PF_CONFIGURATION@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_REG_WR
	movq	%r14, %rdi
	callq	_bnx2x_ack_int
LBB0_9:
	movq	_IGU_PF_CONF_FUNC_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	testl	%r12d, -44(%rbp)                ## 4-byte Folded Reload
	leaq	L_.str.3(%rip), %rax
	leaq	L_.str.2(%rip), %rdx
	cmoveq	%rax, %rdx
	testl	%r12d, %r13d
	movq	_NETIF_MSG_IFUP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str.1(%rip), %rcx
	cmoveq	%rdx, %rcx
	leaq	L_.str(%rip), %rsi
	movl	%ebx, %edx
	callq	_DP
	movl	(%r15), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_REG_WR
	movq	_IGU_PF_CONF_INT_LINE_EN@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_11
## %bb.10:
	movl	16(%r14), %edi
	movl	$1, %esi
	callq	_pci_intx
LBB0_11:
	xorl	%eax, %eax
	callq	_barrier
	movq	%r14, %rdi
	callq	_IS_MF
	testq	%rax, %rax
	je	LBB0_12
## %bb.13:
	movq	%r14, %rdi
	callq	_BP_VN
	addb	$4, %al
	cmpq	$0, 8(%r14)
	movl	$60943, %ecx                    ## imm = 0xEE0F
	movl	$65295, %ebx                    ## imm = 0xFF0F
	cmovel	%ecx, %ebx
	btsl	%eax, %ebx
	jmp	LBB0_14
LBB0_12:
	movl	$65535, %ebx                    ## imm = 0xFFFF
LBB0_14:
	movq	_IGU_REG_TRAILING_EDGE_LATCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_REG_WR
	movq	_IGU_REG_LEADING_EDGE_LATCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_REG_WR
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mmiowb                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_USING_MSIX_FLAG,4,2            ## @USING_MSIX_FLAG
	.comm	_USING_SINGLE_MSIX_FLAG,4,2     ## @USING_SINGLE_MSIX_FLAG
	.comm	_USING_MSI_FLAG,4,2             ## @USING_MSI_FLAG
	.comm	_IGU_REG_PF_CONFIGURATION,4,2   ## @IGU_REG_PF_CONFIGURATION
	.comm	_IGU_PF_CONF_INT_LINE_EN,4,2    ## @IGU_PF_CONF_INT_LINE_EN
	.comm	_IGU_PF_CONF_SINGLE_ISR_EN,4,2  ## @IGU_PF_CONF_SINGLE_ISR_EN
	.comm	_IGU_PF_CONF_MSI_MSIX_EN,4,2    ## @IGU_PF_CONF_MSI_MSIX_EN
	.comm	_IGU_PF_CONF_ATTN_BIT_EN,4,2    ## @IGU_PF_CONF_ATTN_BIT_EN
	.comm	_IGU_PF_CONF_FUNC_EN,4,2        ## @IGU_PF_CONF_FUNC_EN
	.comm	_NETIF_MSG_IFUP,4,2             ## @NETIF_MSG_IFUP
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"write 0x%x to IGU  mode %s\n"

L_.str.1:                               ## @.str.1
	.asciz	"MSI-X"

L_.str.2:                               ## @.str.2
	.asciz	"MSI"

L_.str.3:                               ## @.str.3
	.asciz	"INTx"

	.comm	_IGU_REG_TRAILING_EDGE_LATCH,4,2 ## @IGU_REG_TRAILING_EDGE_LATCH
	.comm	_IGU_REG_LEADING_EDGE_LATCH,4,2 ## @IGU_REG_LEADING_EDGE_LATCH
	.no_dead_strip	_bnx2x_igu_int_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_igu_int_enable
_bnx2x_igu_int_enable:                  ; @bnx2x_igu_int_enable
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	w25, [x0]
Lloh0:
	adrp	x8, _USING_MSIX_FLAG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _USING_MSIX_FLAG@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	and	w23, w8, w25
Lloh3:
	adrp	x8, _USING_SINGLE_MSIX_FLAG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _USING_SINGLE_MSIX_FLAG@GOTPAGEOFF]
Lloh5:
	adrp	x9, _USING_MSI_FLAG@GOTPAGE
Lloh6:
	ldr	x9, [x9, _USING_MSI_FLAG@GOTPAGEOFF]
Lloh7:
	ldr	w26, [x8]
Lloh8:
	ldr	w8, [x9]
	and	w24, w8, w25
Lloh9:
	adrp	x21, _IGU_REG_PF_CONFIGURATION@GOTPAGE
Lloh10:
	ldr	x21, [x21, _IGU_REG_PF_CONFIGURATION@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_REG_RD
Lloh11:
	adrp	x22, _IGU_PF_CONF_INT_LINE_EN@GOTPAGE
Lloh12:
	ldr	x22, [x22, _IGU_PF_CONF_INT_LINE_EN@GOTPAGEOFF]
	cbz	w23, LBB0_3
; %bb.1:
	ldr	w9, [x22]
Lloh13:
	adrp	x8, _IGU_PF_CONF_SINGLE_ISR_EN@GOTPAGE
Lloh14:
	ldr	x8, [x8, _IGU_PF_CONF_SINGLE_ISR_EN@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	orr	w9, w8, w9
	bic	w9, w0, w9
Lloh16:
	adrp	x10, _IGU_PF_CONF_MSI_MSIX_EN@GOTPAGE
Lloh17:
	ldr	x10, [x10, _IGU_PF_CONF_MSI_MSIX_EN@GOTPAGEOFF]
Lloh18:
	ldr	w10, [x10]
Lloh19:
	adrp	x11, _IGU_PF_CONF_ATTN_BIT_EN@GOTPAGE
Lloh20:
	ldr	x11, [x11, _IGU_PF_CONF_ATTN_BIT_EN@GOTPAGEOFF]
Lloh21:
	ldr	w11, [x11]
	orr	w10, w11, w10
	orr	w20, w10, w9
	tst	w26, w25
	b.eq	LBB0_8
; %bb.2:
	orr	w20, w20, w8
	b	LBB0_7
LBB0_3:
	cbz	w24, LBB0_5
; %bb.4:
	ldr	w8, [x22]
	bic	w8, w0, w8
Lloh22:
	adrp	x9, _IGU_PF_CONF_MSI_MSIX_EN@GOTPAGE
Lloh23:
	ldr	x9, [x9, _IGU_PF_CONF_MSI_MSIX_EN@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	b	LBB0_6
LBB0_5:
Lloh25:
	adrp	x8, _IGU_PF_CONF_MSI_MSIX_EN@GOTPAGE
Lloh26:
	ldr	x8, [x8, _IGU_PF_CONF_MSI_MSIX_EN@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	w9, [x22]
LBB0_6:
Lloh28:
	adrp	x10, _IGU_PF_CONF_ATTN_BIT_EN@GOTPAGE
Lloh29:
	ldr	x10, [x10, _IGU_PF_CONF_ATTN_BIT_EN@GOTPAGEOFF]
Lloh30:
	ldr	w10, [x10]
Lloh31:
	adrp	x11, _IGU_PF_CONF_SINGLE_ISR_EN@GOTPAGE
Lloh32:
	ldr	x11, [x11, _IGU_PF_CONF_SINGLE_ISR_EN@GOTPAGEOFF]
Lloh33:
	ldr	w11, [x11]
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w20, w8, w11
LBB0_7:
	ldr	w1, [x21]
	mov	x0, x19
	mov	x2, x20
	bl	_REG_WR
	mov	x0, x19
	bl	_bnx2x_ack_int
LBB0_8:
Lloh34:
	adrp	x8, _IGU_PF_CONF_FUNC_EN@GOTPAGE
Lloh35:
	ldr	x8, [x8, _IGU_PF_CONF_FUNC_EN@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
Lloh37:
	adrp	x9, _NETIF_MSG_IFUP@GOTPAGE
Lloh38:
	ldr	x9, [x9, _NETIF_MSG_IFUP@GOTPAGEOFF]
	orr	w20, w8, w20
Lloh39:
	ldr	w0, [x9]
Lloh40:
	adrp	x8, l_.str.2@PAGE
Lloh41:
	add	x8, x8, l_.str.2@PAGEOFF
Lloh42:
	adrp	x9, l_.str.3@PAGE
Lloh43:
	add	x9, x9, l_.str.3@PAGEOFF
	cmp	w24, #0
	csel	x8, x9, x8, eq
Lloh44:
	adrp	x9, l_.str.1@PAGE
Lloh45:
	add	x9, x9, l_.str.1@PAGEOFF
	cmp	w23, #0
	csel	x3, x8, x9, eq
Lloh46:
	adrp	x1, l_.str@PAGE
Lloh47:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x20
	bl	_DP
	ldr	w1, [x21]
	mov	x0, x19
	mov	x2, x20
	bl	_REG_WR
	ldr	w8, [x22]
	tst	w8, w20
	b.eq	LBB0_10
; %bb.9:
	ldr	w0, [x19, #16]
	mov	w1, #1
	bl	_pci_intx
LBB0_10:
	bl	_barrier
	mov	x0, x19
	bl	_IS_MF
	cbz	x0, LBB0_12
; %bb.11:
	mov	x0, x19
	bl	_BP_VN
	add	w8, w0, #4
	mov	w9, #1
	lsl	w8, w9, w8
	ldr	x9, [x19, #8]
	cmp	x9, #0
	mov	w9, #65295
	mov	w10, #60943
	csel	w9, w10, w9, eq
	orr	w20, w9, w8
	b	LBB0_13
LBB0_12:
	mov	w20, #65535
LBB0_13:
Lloh48:
	adrp	x8, _IGU_REG_TRAILING_EDGE_LATCH@GOTPAGE
Lloh49:
	ldr	x8, [x8, _IGU_REG_TRAILING_EDGE_LATCH@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_REG_WR
Lloh51:
	adrp	x8, _IGU_REG_LEADING_EDGE_LATCH@GOTPAGE
Lloh52:
	ldr	x8, [x8, _IGU_REG_LEADING_EDGE_LATCH@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_REG_WR
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_mmiowb
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpAdd	Lloh44, Lloh45
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpAdd	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.cfi_endproc
                                        ; -- End function
	.comm	_USING_MSIX_FLAG,4,2            ; @USING_MSIX_FLAG
	.comm	_USING_SINGLE_MSIX_FLAG,4,2     ; @USING_SINGLE_MSIX_FLAG
	.comm	_USING_MSI_FLAG,4,2             ; @USING_MSI_FLAG
	.comm	_IGU_REG_PF_CONFIGURATION,4,2   ; @IGU_REG_PF_CONFIGURATION
	.comm	_IGU_PF_CONF_INT_LINE_EN,4,2    ; @IGU_PF_CONF_INT_LINE_EN
	.comm	_IGU_PF_CONF_SINGLE_ISR_EN,4,2  ; @IGU_PF_CONF_SINGLE_ISR_EN
	.comm	_IGU_PF_CONF_MSI_MSIX_EN,4,2    ; @IGU_PF_CONF_MSI_MSIX_EN
	.comm	_IGU_PF_CONF_ATTN_BIT_EN,4,2    ; @IGU_PF_CONF_ATTN_BIT_EN
	.comm	_IGU_PF_CONF_FUNC_EN,4,2        ; @IGU_PF_CONF_FUNC_EN
	.comm	_NETIF_MSG_IFUP,4,2             ; @NETIF_MSG_IFUP
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"write 0x%x to IGU  mode %s\n"

l_.str.1:                               ; @.str.1
	.asciz	"MSI-X"

l_.str.2:                               ; @.str.2
	.asciz	"MSI"

l_.str.3:                               ; @.str.3
	.asciz	"INTx"

	.comm	_IGU_REG_TRAILING_EDGE_LATCH,4,2 ; @IGU_REG_TRAILING_EDGE_LATCH
	.comm	_IGU_REG_LEADING_EDGE_LATCH,4,2 ; @IGU_REG_LEADING_EDGE_LATCH
	.no_dead_strip	_bnx2x_igu_int_enable
.subsections_via_symbols
