	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_i915_gem_detect_bit_6_swizzle  ## -- Begin function i915_gem_detect_bit_6_swizzle
	.p2align	4, 0x90
_i915_gem_detect_bit_6_swizzle:         ## @i915_gem_detect_bit_6_swizzle
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %r14
	movq	_I915_BIT_6_SWIZZLE_UNKNOWN@GOTPCREL(%rip), %r12
	movl	(%r12), %r15d
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	je	LBB0_4
LBB0_1:
	movq	_I915_BIT_6_SWIZZLE_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
LBB0_2:
	movl	%r15d, %ecx
LBB0_3:
	movl	%ecx, (%r14)
	movl	%r15d, 4(%r14)
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	%rbx, %rdi
	callq	_INTEL_INFO
	cmpl	$6, (%rax)
	jl	LBB0_7
## %bb.5:
	movq	_MAD_DIMM_C0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, %ebx
	movq	_MAD_DIMM_C1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movq	_MAD_DIMM_A_SIZE_MASK@GOTPCREL(%rip), %rcx
	movq	_MAD_DIMM_B_SIZE_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	xorl	%ebx, %eax
	testl	%eax, %edx
	jne	LBB0_1
## %bb.6:
	movq	_I915_BIT_6_SWIZZLE_9_10@GOTPCREL(%rip), %rax
	movq	_I915_BIT_6_SWIZZLE_9@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	movl	(%rax), %ecx
	jmp	LBB0_3
LBB0_7:
	movq	%rbx, %rdi
	callq	_IS_GEN5
	testq	%rax, %rax
	je	LBB0_9
LBB0_8:
	movq	_I915_BIT_6_SWIZZLE_9_10@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_I915_BIT_6_SWIZZLE_9@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	jmp	LBB0_3
LBB0_9:
	movq	%rbx, %rdi
	callq	_IS_GEN2
	testq	%rax, %rax
	jne	LBB0_1
## %bb.10:
	movq	%rbx, %rdi
	callq	_IS_MOBILE
	testq	%rax, %rax
	je	LBB0_15
LBB0_11:
	movq	_DCC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movq	_DCC_ADDRESSING_MODE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	%eax, %edx
	cmpl	$130, %edx
	je	LBB0_14
## %bb.12:
	cmpl	$129, %edx
	je	LBB0_18
## %bb.13:
	movl	%r15d, %ecx
	cmpl	$128, %edx
	jne	LBB0_24
LBB0_14:
	movq	_I915_BIT_6_SWIZZLE_NONE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	movl	%r15d, %ecx
	jmp	LBB0_24
LBB0_15:
	movq	%rbx, %rdi
	callq	_IS_GEN3
	testq	%rax, %rax
	je	LBB0_17
## %bb.16:
	movq	%rbx, %rdi
	callq	_IS_G33
	testl	%eax, %eax
	je	LBB0_11
LBB0_17:
	movq	_C0DRB3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ16
	movq	%rax, %rbx
	movq	_C1DRB3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ16
	cmpq	%rax, %rbx
	jne	LBB0_1
	jmp	LBB0_8
LBB0_18:
	movq	_DCC_CHANNEL_XOR_DISABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_20
## %bb.19:
	movq	_I915_BIT_6_SWIZZLE_9_10@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	_I915_BIT_6_SWIZZLE_9@GOTPCREL(%rip), %rdx
	jmp	LBB0_23
LBB0_20:
	movq	_DCC_CHANNEL_XOR_BIT_17@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_22
## %bb.21:
	movq	_I915_BIT_6_SWIZZLE_9_10_17@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	_I915_BIT_6_SWIZZLE_9_17@GOTPCREL(%rip), %rdx
	jmp	LBB0_23
LBB0_22:
	movq	_I915_BIT_6_SWIZZLE_9_10_11@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	_I915_BIT_6_SWIZZLE_9_11@GOTPCREL(%rip), %rdx
LBB0_23:
	movl	(%rdx), %r15d
LBB0_24:
	cmpl	$-1, %eax
	jne	LBB0_3
## %bb.25:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_ERROR
	movl	(%r12), %r15d
	jmp	LBB0_2
	.cfi_endproc
                                        ## -- End function
	.comm	_I915_BIT_6_SWIZZLE_UNKNOWN,4,2 ## @I915_BIT_6_SWIZZLE_UNKNOWN
	.comm	_I915_BIT_6_SWIZZLE_NONE,4,2    ## @I915_BIT_6_SWIZZLE_NONE
	.comm	_MAD_DIMM_C0,4,2                ## @MAD_DIMM_C0
	.comm	_MAD_DIMM_C1,4,2                ## @MAD_DIMM_C1
	.comm	_MAD_DIMM_A_SIZE_MASK,4,2       ## @MAD_DIMM_A_SIZE_MASK
	.comm	_MAD_DIMM_B_SIZE_MASK,4,2       ## @MAD_DIMM_B_SIZE_MASK
	.comm	_I915_BIT_6_SWIZZLE_9_10,4,2    ## @I915_BIT_6_SWIZZLE_9_10
	.comm	_I915_BIT_6_SWIZZLE_9,4,2       ## @I915_BIT_6_SWIZZLE_9
	.comm	_DCC,4,2                        ## @DCC
	.comm	_DCC_ADDRESSING_MODE_MASK,4,2   ## @DCC_ADDRESSING_MODE_MASK
	.comm	_DCC_CHANNEL_XOR_DISABLE,4,2    ## @DCC_CHANNEL_XOR_DISABLE
	.comm	_DCC_CHANNEL_XOR_BIT_17,4,2     ## @DCC_CHANNEL_XOR_BIT_17
	.comm	_I915_BIT_6_SWIZZLE_9_10_11,4,2 ## @I915_BIT_6_SWIZZLE_9_10_11
	.comm	_I915_BIT_6_SWIZZLE_9_11,4,2    ## @I915_BIT_6_SWIZZLE_9_11
	.comm	_I915_BIT_6_SWIZZLE_9_10_17,4,2 ## @I915_BIT_6_SWIZZLE_9_10_17
	.comm	_I915_BIT_6_SWIZZLE_9_17,4,2    ## @I915_BIT_6_SWIZZLE_9_17
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Couldn't read from MCHBAR.  Disabling tiling.\n"

	.comm	_C0DRB3,4,2                     ## @C0DRB3
	.comm	_C1DRB3,4,2                     ## @C1DRB3
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_i915_gem_detect_bit_6_swizzle  ; -- Begin function i915_gem_detect_bit_6_swizzle
	.p2align	2
_i915_gem_detect_bit_6_swizzle:         ; @i915_gem_detect_bit_6_swizzle
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0]
Lloh0:
	adrp	x22, _I915_BIT_6_SWIZZLE_UNKNOWN@GOTPAGE
Lloh1:
	ldr	x22, [x22, _I915_BIT_6_SWIZZLE_UNKNOWN@GOTPAGEOFF]
	ldr	w21, [x22]
	bl	_IS_VALLEYVIEW
	cbz	x0, LBB0_2
LBB0_1:
Lloh2:
	adrp	x8, _I915_BIT_6_SWIZZLE_NONE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_NONE@GOTPAGEOFF]
Lloh4:
	ldr	w21, [x8]
	mov	x8, x21
	b	LBB0_6
LBB0_2:
	mov	x0, x19
	bl	_INTEL_INFO
	ldr	w8, [x0]
	cmp	w8, #6
	b.lt	LBB0_4
; %bb.3:
Lloh5:
	adrp	x8, _MAD_DIMM_C0@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MAD_DIMM_C0@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x19, x0
Lloh8:
	adrp	x8, _MAD_DIMM_C1@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MAD_DIMM_C1@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	bl	_I915_READ
Lloh11:
	adrp	x8, _MAD_DIMM_A_SIZE_MASK@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MAD_DIMM_A_SIZE_MASK@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
Lloh14:
	adrp	x9, _MAD_DIMM_B_SIZE_MASK@GOTPAGE
Lloh15:
	ldr	x9, [x9, _MAD_DIMM_B_SIZE_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	orr	w8, w9, w8
	eor	w9, w0, w19
Lloh17:
	adrp	x10, _I915_BIT_6_SWIZZLE_9_10@GOTPAGE
Lloh18:
	ldr	x10, [x10, _I915_BIT_6_SWIZZLE_9_10@GOTPAGEOFF]
Lloh19:
	ldr	w10, [x10]
Lloh20:
	adrp	x11, _I915_BIT_6_SWIZZLE_9@GOTPAGE
Lloh21:
	ldr	x11, [x11, _I915_BIT_6_SWIZZLE_9@GOTPAGEOFF]
Lloh22:
	ldr	w11, [x11]
Lloh23:
	adrp	x12, _I915_BIT_6_SWIZZLE_NONE@GOTPAGE
Lloh24:
	ldr	x12, [x12, _I915_BIT_6_SWIZZLE_NONE@GOTPAGEOFF]
Lloh25:
	ldr	w12, [x12]
	tst	w8, w9
	csel	w21, w11, w12, eq
	csel	w8, w10, w12, eq
	b	LBB0_6
LBB0_4:
	mov	x0, x19
	bl	_IS_GEN5
	cbz	x0, LBB0_7
LBB0_5:
Lloh26:
	adrp	x8, _I915_BIT_6_SWIZZLE_9_10@GOTPAGE
Lloh27:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9_10@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
Lloh29:
	adrp	x9, _I915_BIT_6_SWIZZLE_9@GOTPAGE
Lloh30:
	ldr	x9, [x9, _I915_BIT_6_SWIZZLE_9@GOTPAGEOFF]
Lloh31:
	ldr	w21, [x9]
LBB0_6:
	stp	w8, w21, [x20]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_7:
	mov	x0, x19
	bl	_IS_GEN2
	cbnz	x0, LBB0_1
; %bb.8:
	mov	x0, x19
	bl	_IS_MOBILE
	cbz	x0, LBB0_13
LBB0_9:
Lloh32:
	adrp	x8, _DCC@GOTPAGE
Lloh33:
	ldr	x8, [x8, _DCC@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
	bl	_I915_READ
Lloh35:
	adrp	x8, _DCC_ADDRESSING_MODE_MASK@GOTPAGE
Lloh36:
	ldr	x8, [x8, _DCC_ADDRESSING_MODE_MASK@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	and	w9, w8, w0
	cmp	w9, #130
	b.eq	LBB0_12
; %bb.10:
	cmp	w9, #129
	b.eq	LBB0_16
; %bb.11:
	mov	x8, x21
	cmp	w9, #128
	b.ne	LBB0_22
LBB0_12:
Lloh38:
	adrp	x8, _I915_BIT_6_SWIZZLE_NONE@GOTPAGE
Lloh39:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_NONE@GOTPAGEOFF]
Lloh40:
	ldr	w21, [x8]
	mov	x8, x21
	b	LBB0_22
LBB0_13:
	mov	x0, x19
	bl	_IS_GEN3
	cbz	x0, LBB0_15
; %bb.14:
	mov	x0, x19
	bl	_IS_G33
	cbz	w0, LBB0_9
LBB0_15:
Lloh41:
	adrp	x8, _C0DRB3@GOTPAGE
Lloh42:
	ldr	x8, [x8, _C0DRB3@GOTPAGEOFF]
Lloh43:
	ldr	w0, [x8]
	bl	_I915_READ16
	mov	x19, x0
Lloh44:
	adrp	x8, _C1DRB3@GOTPAGE
Lloh45:
	ldr	x8, [x8, _C1DRB3@GOTPAGEOFF]
Lloh46:
	ldr	w0, [x8]
	bl	_I915_READ16
	cmp	x19, x0
	b.ne	LBB0_1
	b	LBB0_5
LBB0_16:
Lloh47:
	adrp	x8, _DCC_CHANNEL_XOR_DISABLE@GOTPAGE
Lloh48:
	ldr	x8, [x8, _DCC_CHANNEL_XOR_DISABLE@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_18
; %bb.17:
Lloh50:
	adrp	x8, _I915_BIT_6_SWIZZLE_9_10@GOTPAGE
Lloh51:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9_10@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
Lloh53:
	adrp	x9, _I915_BIT_6_SWIZZLE_9@GOTPAGE
Lloh54:
	ldr	x9, [x9, _I915_BIT_6_SWIZZLE_9@GOTPAGEOFF]
	b	LBB0_21
LBB0_18:
Lloh55:
	adrp	x8, _DCC_CHANNEL_XOR_BIT_17@GOTPAGE
Lloh56:
	ldr	x8, [x8, _DCC_CHANNEL_XOR_BIT_17@GOTPAGEOFF]
Lloh57:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_20
; %bb.19:
Lloh58:
	adrp	x8, _I915_BIT_6_SWIZZLE_9_10_17@GOTPAGE
Lloh59:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9_10_17@GOTPAGEOFF]
Lloh60:
	ldr	w8, [x8]
Lloh61:
	adrp	x9, _I915_BIT_6_SWIZZLE_9_17@GOTPAGE
Lloh62:
	ldr	x9, [x9, _I915_BIT_6_SWIZZLE_9_17@GOTPAGEOFF]
	b	LBB0_21
LBB0_20:
Lloh63:
	adrp	x8, _I915_BIT_6_SWIZZLE_9_10_11@GOTPAGE
Lloh64:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9_10_11@GOTPAGEOFF]
Lloh65:
	ldr	w8, [x8]
Lloh66:
	adrp	x9, _I915_BIT_6_SWIZZLE_9_11@GOTPAGE
Lloh67:
	ldr	x9, [x9, _I915_BIT_6_SWIZZLE_9_11@GOTPAGEOFF]
LBB0_21:
	ldr	w21, [x9]
LBB0_22:
	cmn	w0, #1
	b.ne	LBB0_6
; %bb.23:
Lloh68:
	adrp	x0, l_.str@PAGE
Lloh69:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
	ldr	w21, [x22]
	mov	x8, x21
	b	LBB0_6
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpAdd	Lloh68, Lloh69
	.cfi_endproc
                                        ; -- End function
	.comm	_I915_BIT_6_SWIZZLE_UNKNOWN,4,2 ; @I915_BIT_6_SWIZZLE_UNKNOWN
	.comm	_I915_BIT_6_SWIZZLE_NONE,4,2    ; @I915_BIT_6_SWIZZLE_NONE
	.comm	_MAD_DIMM_C0,4,2                ; @MAD_DIMM_C0
	.comm	_MAD_DIMM_C1,4,2                ; @MAD_DIMM_C1
	.comm	_MAD_DIMM_A_SIZE_MASK,4,2       ; @MAD_DIMM_A_SIZE_MASK
	.comm	_MAD_DIMM_B_SIZE_MASK,4,2       ; @MAD_DIMM_B_SIZE_MASK
	.comm	_I915_BIT_6_SWIZZLE_9_10,4,2    ; @I915_BIT_6_SWIZZLE_9_10
	.comm	_I915_BIT_6_SWIZZLE_9,4,2       ; @I915_BIT_6_SWIZZLE_9
	.comm	_DCC,4,2                        ; @DCC
	.comm	_DCC_ADDRESSING_MODE_MASK,4,2   ; @DCC_ADDRESSING_MODE_MASK
	.comm	_DCC_CHANNEL_XOR_DISABLE,4,2    ; @DCC_CHANNEL_XOR_DISABLE
	.comm	_DCC_CHANNEL_XOR_BIT_17,4,2     ; @DCC_CHANNEL_XOR_BIT_17
	.comm	_I915_BIT_6_SWIZZLE_9_10_11,4,2 ; @I915_BIT_6_SWIZZLE_9_10_11
	.comm	_I915_BIT_6_SWIZZLE_9_11,4,2    ; @I915_BIT_6_SWIZZLE_9_11
	.comm	_I915_BIT_6_SWIZZLE_9_10_17,4,2 ; @I915_BIT_6_SWIZZLE_9_10_17
	.comm	_I915_BIT_6_SWIZZLE_9_17,4,2    ; @I915_BIT_6_SWIZZLE_9_17
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Couldn't read from MCHBAR.  Disabling tiling.\n"

	.comm	_C0DRB3,4,2                     ; @C0DRB3
	.comm	_C1DRB3,4,2                     ; @C1DRB3
.subsections_via_symbols
