	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function set_render_target
_set_render_target:                     ## @set_render_target
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, -48(%rbp)                 ## 4-byte Spill
	movl	%edx, %r13d
	movl	%esi, %r12d
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %r14
	shlq	$2, %r14
	addq	(%rdi), %r14
	movl	$8, %r15d
	movl	%ecx, %edi
	movl	$8, %esi
	callq	_ALIGN
	cmpl	$9, %eax
	cmovgel	%eax, %r15d
	movl	%r12d, %edi
	callq	_CB_FORMAT
	movl	%eax, %ebx
	movq	_CB_SF_EXPORT_NORM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_CB_SOURCE_FORMAT
	orl	%eax, %ebx
	movq	_ARRAY_1D_TILED_THIN1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_CB_ARRAY_MODE
	orl	%eax, %ebx
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	leal	7(%r13), %r12d
	testl	%r13d, %r13d
	cmovnsl	%r13d, %r12d
	sarl	$3, %r12d
	decl	%r12d
	movl	%r15d, %eax
	imull	%r13d, %eax
	movq	%r13, %rbx
	leal	63(%rax), %r13d
	testl	%eax, %eax
	cmovnsl	%eax, %r13d
	sarl	$6, %r13d
	decl	%r13d
	movq	_PACKET3_SET_CONTEXT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$15, %esi
	callq	_PACKET3
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_CB_COLOR0_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PACKET3_SET_CONTEXT_REG_START@GOTPCREL(%rip), %rax
	subl	(%rax), %esi
	sarl	$2, %esi
	movq	%r14, %rdi
	callq	_radeon_ring_write
	movl	-48(%rbp), %esi                 ## 4-byte Reload
	sarl	$8, %esi
	movq	%r14, %rdi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	movl	%r13d, %esi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_radeon_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	decl	%ebx
	shll	$16, %r15d
	addl	$-65536, %r15d                  ## imm = 0xFFFF0000
	orl	%ebx, %r15d
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
	.comm	_CB_SF_EXPORT_NORM,4,2          ## @CB_SF_EXPORT_NORM
	.comm	_ARRAY_1D_TILED_THIN1,4,2       ## @ARRAY_1D_TILED_THIN1
	.comm	_PACKET3_SET_CONTEXT_REG,4,2    ## @PACKET3_SET_CONTEXT_REG
	.comm	_CB_COLOR0_BASE,4,2             ## @CB_COLOR0_BASE
	.comm	_PACKET3_SET_CONTEXT_REG_START,4,2 ## @PACKET3_SET_CONTEXT_REG_START
	.no_dead_strip	_set_render_target
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function set_render_target
_set_render_target:                     ; @set_render_target
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x4
	mov	x20, x2
	mov	x22, x1
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x19, x8, x9, lsl #2
	mov	w23, #8
	mov	x0, x3
	mov	w1, #8
	bl	_ALIGN
	cmp	w0, #8
	csel	w25, w0, w23, gt
	mov	x0, x22
	bl	_CB_FORMAT
	mov	x22, x0
Lloh3:
	adrp	x8, _CB_SF_EXPORT_NORM@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CB_SF_EXPORT_NORM@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	_CB_SOURCE_FORMAT
	orr	w22, w0, w22
Lloh6:
	adrp	x8, _ARRAY_1D_TILED_THIN1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ARRAY_1D_TILED_THIN1@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	bl	_CB_ARRAY_MODE
	orr	w22, w22, w0
	add	w8, w20, #7
	cmp	w20, #0
	csel	w8, w8, w20, lt
	asr	w8, w8, #3
	sub	w23, w8, #1
	mul	w8, w25, w20
	add	w9, w8, #63
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w8, w8, #6
	sub	w24, w8, #1
Lloh9:
	adrp	x8, _PACKET3_SET_CONTEXT_REG@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PACKET3_SET_CONTEXT_REG@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	mov	w1, #15
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
Lloh12:
	adrp	x8, _CB_COLOR0_BASE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _CB_COLOR0_BASE@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
Lloh15:
	adrp	x9, _PACKET3_SET_CONTEXT_REG_START@GOTPAGE
Lloh16:
	ldr	x9, [x9, _PACKET3_SET_CONTEXT_REG_START@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	sub	w8, w8, w9
	asr	w1, w8, #2
	mov	x0, x19
	bl	_radeon_ring_write
	asr	w1, w21, #8
	mov	x0, x19
	bl	_radeon_ring_write
	mov	x0, x19
	mov	x1, x23
	bl	_radeon_ring_write
	mov	x0, x19
	mov	x1, x24
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	mov	x0, x19
	mov	x1, x22
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	sub	w8, w20, #1
	lsl	w9, w25, #16
	sub	w9, w9, #16, lsl #12            ; =65536
	orr	w1, w9, w8
	mov	x0, x19
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_radeon_ring_write
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
	.comm	_CB_SF_EXPORT_NORM,4,2          ; @CB_SF_EXPORT_NORM
	.comm	_ARRAY_1D_TILED_THIN1,4,2       ; @ARRAY_1D_TILED_THIN1
	.comm	_PACKET3_SET_CONTEXT_REG,4,2    ; @PACKET3_SET_CONTEXT_REG
	.comm	_CB_COLOR0_BASE,4,2             ; @CB_COLOR0_BASE
	.comm	_PACKET3_SET_CONTEXT_REG_START,4,2 ; @PACKET3_SET_CONTEXT_REG_START
	.no_dead_strip	_set_render_target
.subsections_via_symbols
