	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function em28xx_set_model
_em28xx_set_model:                      ## @em28xx_set_model
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	leaq	8(%rdi), %r14
	movq	_em28xx_boards@GOTPCREL(%rip), %rax
	movq	(%rdi), %rsi
	shlq	$2, %rsi
	addq	(%rax), %rsi
	movq	%r14, %rdi
	movl	$8, %edx
	callq	_memcpy
	cmpl	$0, 8(%rbx)
	je	LBB0_1
## %bb.2:
	cmpl	$0, 12(%rbx)
	je	LBB0_3
LBB0_4:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_1:
	movq	_EM28XX_XCLK_IR_RC5_MODE@GOTPCREL(%rip), %rax
	movq	_EM28XX_XCLK_FREQUENCY_12MHZ@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movl	%ecx, (%r14)
	cmpl	$0, 12(%rbx)
	jne	LBB0_4
LBB0_3:
	movq	_EM28XX_I2C_CLK_WAIT_ENABLE@GOTPCREL(%rip), %rax
	movq	_EM28XX_I2C_FREQ_100_KHZ@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movl	%ecx, 12(%rbx)
	jmp	LBB0_4
	.cfi_endproc
                                        ## -- End function
	.comm	_em28xx_boards,8,3              ## @em28xx_boards
	.comm	_EM28XX_XCLK_IR_RC5_MODE,4,2    ## @EM28XX_XCLK_IR_RC5_MODE
	.comm	_EM28XX_XCLK_FREQUENCY_12MHZ,4,2 ## @EM28XX_XCLK_FREQUENCY_12MHZ
	.comm	_EM28XX_I2C_CLK_WAIT_ENABLE,4,2 ## @EM28XX_I2C_CLK_WAIT_ENABLE
	.comm	_EM28XX_I2C_FREQ_100_KHZ,4,2    ## @EM28XX_I2C_FREQ_100_KHZ
	.no_dead_strip	_em28xx_set_model
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function em28xx_set_model
_em28xx_set_model:                      ; @em28xx_set_model
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	add	x20, x0, #8
Lloh0:
	adrp	x8, _em28xx_boards@GOTPAGE
Lloh1:
	ldr	x8, [x8, _em28xx_boards@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	ldr	x9, [x0]
	add	x1, x8, x9, lsl #2
	mov	x0, x20
	mov	w2, #8
	bl	_memcpy
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_3
; %bb.1:
	ldr	w8, [x19, #12]
	cbz	w8, LBB0_4
LBB0_2:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_3:
Lloh3:
	adrp	x8, _EM28XX_XCLK_IR_RC5_MODE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EM28XX_XCLK_IR_RC5_MODE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _EM28XX_XCLK_FREQUENCY_12MHZ@GOTPAGE
Lloh7:
	ldr	x9, [x9, _EM28XX_XCLK_FREQUENCY_12MHZ@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
	str	w8, [x20]
	ldr	w8, [x19, #12]
	cbnz	w8, LBB0_2
LBB0_4:
Lloh9:
	adrp	x8, _EM28XX_I2C_CLK_WAIT_ENABLE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _EM28XX_I2C_CLK_WAIT_ENABLE@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
Lloh12:
	adrp	x9, _EM28XX_I2C_FREQ_100_KHZ@GOTPAGE
Lloh13:
	ldr	x9, [x9, _EM28XX_I2C_FREQ_100_KHZ@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w9, w8
	str	w8, [x19, #12]
	b	LBB0_2
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_em28xx_boards,8,3              ; @em28xx_boards
	.comm	_EM28XX_XCLK_IR_RC5_MODE,4,2    ; @EM28XX_XCLK_IR_RC5_MODE
	.comm	_EM28XX_XCLK_FREQUENCY_12MHZ,4,2 ; @EM28XX_XCLK_FREQUENCY_12MHZ
	.comm	_EM28XX_I2C_CLK_WAIT_ENABLE,4,2 ; @EM28XX_I2C_CLK_WAIT_ENABLE
	.comm	_EM28XX_I2C_FREQ_100_KHZ,4,2    ; @EM28XX_I2C_FREQ_100_KHZ
	.no_dead_strip	_em28xx_set_model
.subsections_via_symbols
