	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_init_hw_func
_bnx2x_init_hw_func:                    ## @bnx2x_init_hw_func
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	callq	_BP_PORT
	movl	%eax, %r15d
	movq	%r13, %rdi
	callq	_BP_FUNC
	movl	%eax, %r12d
	movq	_PHASE_PF0@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	addl	%r12d, %r14d
	movq	%r13, %rdi
	callq	_BP_ILT
	movq	_NETIF_MSG_HW@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str(%rip), %rsi
	movl	%r12d, %edx
	xorl	%eax, %eax
	callq	_DP
	movq	%r13, %rdi
	callq	_CHIP_IS_E1x
	testq	%rax, %rax
	je	LBB0_1
LBB0_3:
	movq	32(%r13), %rax
	movq	_INT_BLOCK_HC@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_8
## %bb.4:
	testl	%r15d, %r15d
	jne	LBB0_5
## %bb.6:
	movq	_HC_REG_CONFIG_0@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_1:
	movq	%r13, %rdi
	callq	_bnx2x_pf_flr_clnup
	testl	%eax, %eax
	je	LBB0_3
## %bb.2:
	movl	%eax, %ebx
	movq	%r13, %rdi
	callq	_bnx2x_fw_dump
	jmp	LBB0_72
LBB0_5:
	movq	_HC_REG_CONFIG_1@GOTPCREL(%rip), %rax
LBB0_7:
	movl	(%rax), %ebx
	movq	%r13, %rdi
	movl	%ebx, %esi
	callq	_REG_RD
	movq	_HC_CONFIG_0_REG_MSI_ATTN_EN_0@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_WR
LBB0_8:
	movl	%r12d, -44(%rbp)                ## 4-byte Spill
	movq	%r15, -64(%rbp)                 ## 8-byte Spill
	movq	_BLOCK_PXP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_PXP2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	%r13, %rdi
	callq	_BP_ILT
	movq	%rax, %r12
	movq	8(%rax), %rax
	movq	_ILT_CLIENT_CDU@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rcx
	movl	(%rax,%rcx,4), %r15d
	movq	%r13, %rdi
	callq	_IS_SRIOV
	testq	%rax, %rax
	movl	%r14d, -56(%rbp)                ## 4-byte Spill
	je	LBB0_10
## %bb.9:
	movq	_BNX2X_FIRST_VF_CID@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_ILT_PAGE_CIDS@GOTPCREL(%rip), %rcx
	cltd
	idivl	(%rcx)
	addl	%eax, %r15d
LBB0_10:
	movq	%r13, %rdi
	movl	%r15d, %esi
	callq	_bnx2x_iov_init_ilt
	movq	8(%r12), %rax
	movq	(%rbx), %rcx
	movslq	(%rax,%rcx,4), %rbx
	movq	%r13, %rdi
	callq	_L2_ILT_LINES
	testl	%eax, %eax
	jle	LBB0_13
## %bb.11:
	shlq	$2, %rbx
	leaq	(%rbx,%rbx,2), %r15
	movl	$8, %ebx
	xorl	%r14d, %r14d
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movq	40(%r13), %rax
	movl	(%rax,%rbx), %ecx
	movq	(%r12), %rdx
	addq	%r15, %rdx
	movl	%ecx, (%rbx,%rdx)
	movl	-4(%rax,%rbx), %ecx
	movl	%ecx, -4(%rbx,%rdx)
	movl	-8(%rax,%rbx), %eax
	movl	%eax, -8(%rbx,%rdx)
	incq	%r14
	movq	%r13, %rdi
	callq	_L2_ILT_LINES
	cltq
	addq	$12, %rbx
	cmpq	%rax, %r14
	jl	LBB0_12
LBB0_13:
	movq	_INITOP_SET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_bnx2x_ilt_init_op
	movq	%r13, %rdi
	callq	_CONFIGURE_NIC_MODE
	testl	%eax, %eax
	je	LBB0_15
## %bb.14:
	leaq	L_.str.2(%rip), %rbx
	movl	$1, %edx
	jmp	LBB0_16
LBB0_15:
	movq	%r13, %rdi
	callq	_bnx2x_init_searcher
	leaq	L_.str.1(%rip), %rbx
	xorl	%edx, %edx
LBB0_16:
	movl	-56(%rbp), %r14d                ## 4-byte Reload
	movl	-44(%rbp), %r12d                ## 4-byte Reload
	movq	_PRS_REG_NIC_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_REG_WR
	movq	_NETIF_MSG_IFUP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%r15d, %r15d
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	_DP
	movq	%r13, %rdi
	callq	_CHIP_IS_E1x
	testq	%rax, %rax
	jne	LBB0_20
## %bb.17:
	movq	_IGU_PF_CONF_FUNC_EN@GOTPCREL(%rip), %rax
	movq	_USING_MSIX_FLAG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	(%r13), %ecx
	jne	LBB0_19
## %bb.18:
	movq	_IGU_PF_CONF_SINGLE_ISR_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
LBB0_19:
	orl	(%rax), %r15d
	movl	$20, %edi
	callq	_msleep
	movq	_PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_REG_WR
	movq	_IGU_REG_PF_CONFIGURATION@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r15d, %edx
	callq	_REG_WR
LBB0_20:
	movl	$1, 4(%r13)
	movq	_BLOCK_PGLUE_B@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	%r13, %rdi
	callq	_CHIP_IS_E1x
	testq	%rax, %rax
	jne	LBB0_22
## %bb.21:
	movq	_PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r12d, %edx
	callq	_REG_WR
LBB0_22:
	movq	_BLOCK_ATC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_DMAE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_NIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_SRC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_MISC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_TCM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_UCM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_CCM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_XCM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_TSEM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_USEM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_CSEM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_XSEM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	%r13, %rdi
	callq	_CHIP_IS_E1x
	testq	%rax, %rax
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	jne	LBB0_24
## %bb.23:
	movq	_QM_REG_PF_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_REG_WR
LBB0_24:
	movq	%r13, %rdi
	callq	_CHIP_IS_E1x
	testq	%rax, %rax
	jne	LBB0_26
## %bb.25:
	movq	_TSEM_REG_VFPF_ERR_NUM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BNX2X_MAX_NUM_OF_VFS@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	addl	%r12d, %edx
	movq	%r13, %rdi
	callq	_REG_WR
	movq	_USEM_REG_VFPF_ERR_NUM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	addl	%r12d, %edx
	movq	%r13, %rdi
	callq	_REG_WR
	movq	_CSEM_REG_VFPF_ERR_NUM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	addl	%r12d, %edx
	movq	%r13, %rdi
	callq	_REG_WR
	movq	_XSEM_REG_VFPF_ERR_NUM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	addl	%r12d, %edx
	movq	%r13, %rdi
	callq	_REG_WR
LBB0_26:
	movq	_BLOCK_QM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_TM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_DORQ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	%r13, %rdi
	callq	_bnx2x_iov_init_dq
	movq	_BLOCK_BRB1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_PRS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_TSDM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_CSDM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_USDM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_XSDM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_UPB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_XPB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_PBF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	%r13, %rdi
	callq	_CHIP_IS_E1x
	testq	%rax, %rax
	jne	LBB0_28
## %bb.27:
	movq	_PBF_REG_DISABLE_PF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
LBB0_28:
	movq	_BLOCK_CDU@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	_BLOCK_CFC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	%r13, %rdi
	callq	_CHIP_IS_E1x
	testq	%rax, %rax
	jne	LBB0_30
## %bb.29:
	movq	_CFC_REG_WEAK_ENABLE_PF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_REG_WR
LBB0_30:
	movq	%r13, %rdi
	callq	_IS_MF
	testq	%rax, %rax
	je	LBB0_32
## %bb.31:
	movq	_NIG_REG_LLH0_FUNC_EN@GOTPCREL(%rip), %rax
	leal	(,%r15,8), %ebx
	movl	(%rax), %esi
	addl	%ebx, %esi
	movq	%r13, %rdi
	movl	$1, %edx
	callq	_REG_WR
	movq	_NIG_REG_LLH0_FUNC_VLAN_ID@GOTPCREL(%rip), %rax
	addl	(%rax), %ebx
	movl	8(%r13), %edx
	movq	%r13, %rdi
	movl	%ebx, %esi
	callq	_REG_WR
LBB0_32:
	movq	_BLOCK_MISC_AEU@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	32(%r13), %rax
	movq	_INT_BLOCK_HC@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_36
## %bb.33:
	movq	%r13, %rdi
	callq	_CHIP_IS_E1H
	testq	%rax, %rax
	je	LBB0_35
## %bb.34:
	movq	_MISC_REG_AEU_GENERAL_ATTN_12@GOTPCREL(%rip), %rax
	shll	$2, %r12d
	addl	(%rax), %r12d
	movq	%r13, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_HC_REG_LEADING_EDGE_0@GOTPCREL(%rip), %rax
	shll	$3, %r15d
	movl	(%rax), %esi
	addl	%r15d, %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_HC_REG_TRAILING_EDGE_0@GOTPCREL(%rip), %rax
	addl	(%rax), %r15d
	movq	%r13, %rdi
	movl	%r15d, %esi
	xorl	%edx, %edx
	callq	_REG_WR
LBB0_35:
	movq	_BLOCK_HC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	jmp	LBB0_64
LBB0_36:
	movq	_MISC_REG_AEU_GENERAL_ATTN_12@GOTPCREL(%rip), %rax
	shll	$2, %r12d
	addl	(%rax), %r12d
	movq	%r13, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	%r13, %rdi
	callq	_CHIP_IS_E1x
	testq	%rax, %rax
	jne	LBB0_38
## %bb.37:
	movq	_IGU_REG_LEADING_EDGE_LATCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_TRAILING_EDGE_LATCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
LBB0_38:
	movq	_BLOCK_IGU@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_bnx2x_init_block
	movq	%r13, %rdi
	callq	_CHIP_IS_E1x
	testq	%rax, %rax
	jne	LBB0_64
## %bb.39:
	movq	%r13, %rdi
	callq	_CHIP_INT_MODE_IS_BC
	testq	%rax, %rax
	jne	LBB0_40
## %bb.41:
	movq	_IGU_NORM_NDSB_NUM_SEGS@GOTPCREL(%rip), %rax
	cmpl	$0, 12(%r13)
	jg	LBB0_43
	jmp	LBB0_49
LBB0_40:
	movq	_IGU_BC_NDSB_NUM_SEGS@GOTPCREL(%rip), %rax
	cmpl	$0, 12(%r13)
	jle	LBB0_49
LBB0_43:
	movl	(%rax), %r14d
	leal	(,%r14,4), %eax
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	xorl	%r12d, %r12d
	movq	_IGU_REG_PROD_CONS_MEMORY@GOTPCREL(%rip), %r15
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	jmp	LBB0_44
	.p2align	4, 0x90
LBB0_48:                                ##   in Loop: Header=BB0_44 Depth=1
	movq	_USTORM_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_IGU_INT_NOP@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%r13, %rdi
	movl	%ebx, %esi
	xorl	%ecx, %ecx
	movl	$1, %r9d
	callq	_bnx2x_ack_sb
	movl	16(%r13), %esi
	addl	%r12d, %esi
	movq	%r13, %rdi
	callq	_bnx2x_igu_clear_sb
	incl	%r12d
	cmpl	12(%r13), %r12d
	jge	LBB0_49
LBB0_44:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_46 Depth 2
	movl	16(%r13), %ebx
	addl	%r12d, %ebx
	testl	%r14d, %r14d
	jle	LBB0_48
## %bb.45:                              ##   in Loop: Header=BB0_44 Depth=1
	imull	-64(%rbp), %ebx                 ## 4-byte Folded Reload
                                        ## kill: def $r14d killed $r14d killed $r14
	.p2align	4, 0x90
LBB0_46:                                ##   Parent Loop BB0_44 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movl	(%r15), %esi
	addl	%ebx, %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	addl	$4, %ebx
	decl	%r14d
	jne	LBB0_46
## %bb.47:                              ##   in Loop: Header=BB0_44 Depth=1
	movl	16(%r13), %ebx
	addl	%r12d, %ebx
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	jmp	LBB0_48
LBB0_49:
	movq	%r13, %rdi
	callq	_CHIP_INT_MODE_IS_BC
	testq	%rax, %rax
	jne	LBB0_50
## %bb.51:
	movq	_IGU_NORM_DSB_NUM_SEGS@GOTPCREL(%rip), %rax
	jmp	LBB0_52
LBB0_50:
	movq	_IGU_BC_DSB_NUM_SEGS@GOTPCREL(%rip), %rax
LBB0_52:
	movl	(%rax), %r14d
	movq	%r13, %rdi
	callq	_CHIP_MODE_IS_4_PORT
	movq	%r13, %rdi
	testq	%rax, %rax
	je	LBB0_54
## %bb.53:
	callq	_BP_FUNC
	jmp	LBB0_55
LBB0_54:
	callq	_BP_VN
LBB0_55:
	movl	%eax, %r12d
	movq	%r13, %rdi
	callq	_CHIP_INT_MODE_IS_BC
	testq	%rax, %rax
	jne	LBB0_56
## %bb.57:
	movq	_IGU_NORM_BASE_DSB_PROD@GOTPCREL(%rip), %rax
	jmp	LBB0_58
LBB0_56:
	movq	_IGU_BC_BASE_DSB_PROD@GOTPCREL(%rip), %rax
LBB0_58:
	movq	_E1HVN_MAX@GOTPCREL(%rip), %r15
	movl	(%r15), %ecx
	imull	%r14d, %ecx
	testl	%ecx, %ecx
	jle	LBB0_61
## %bb.59:
	addl	(%rax), %r12d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_60:                                ## =>This Inner Loop Header: Depth=1
	leal	(%r12,%rbx), %esi
	shll	$2, %esi
	movq	_IGU_REG_PROD_CONS_MEMORY@GOTPCREL(%rip), %rax
	addl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movl	(%r15), %eax
	addl	%eax, %ebx
	imull	%r14d, %eax
	cmpl	%eax, %ebx
	jl	LBB0_60
LBB0_61:
	movq	%r13, %rdi
	callq	_CHIP_INT_MODE_IS_BC
	movq	%rax, %rbx
	movl	20(%r13), %esi
	movq	_USTORM_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_IGU_INT_NOP@GOTPCREL(%rip), %r14
	movl	(%r14), %r8d
	movq	%r13, %rdi
	xorl	%ecx, %ecx
	movl	$1, %r9d
	callq	_bnx2x_ack_sb
	movl	20(%r13), %esi
	testq	%rbx, %rbx
	je	LBB0_63
## %bb.62:
	movq	_CSTORM_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r14), %r8d
	movq	%r13, %rdi
	xorl	%ecx, %ecx
	movl	$1, %r9d
	callq	_bnx2x_ack_sb
	movl	20(%r13), %esi
	movq	_XSTORM_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r14), %r8d
	movq	%r13, %rdi
	xorl	%ecx, %ecx
	movl	$1, %r9d
	callq	_bnx2x_ack_sb
	movl	20(%r13), %esi
	movq	_TSTORM_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r14), %r8d
	movq	%r13, %rdi
	xorl	%ecx, %ecx
	movl	$1, %r9d
	callq	_bnx2x_ack_sb
	movl	20(%r13), %esi
LBB0_63:
	movq	_ATTENTION_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r14), %r8d
	movq	%r13, %rdi
	xorl	%ecx, %ecx
	movl	$1, %r9d
	callq	_bnx2x_ack_sb
	movl	20(%r13), %esi
	movq	%r13, %rdi
	callq	_bnx2x_igu_clear_sb
	movq	_IGU_REG_SB_INT_BEFORE_MASK_LSB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_SB_INT_BEFORE_MASK_MSB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_SB_MASK_LSB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_SB_MASK_MSB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_PBA_STATUS_LSB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_PBA_STATUS_MSB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
LBB0_64:
	movq	%r13, %rdi
	movl	$8468, %esi                     ## imm = 0x2114
	movl	$-1, %edx
	callq	_REG_WR
	movq	%r13, %rdi
	movl	$8480, %esi                     ## imm = 0x2120
	movl	$-1, %edx
	callq	_REG_WR
	movq	%r13, %rdi
	callq	_CHIP_IS_E1x
	testq	%rax, %rax
	je	LBB0_71
## %bb.65:
	movq	_HC_REG_MAIN_MEMORY_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_HC_REG_MAIN_MEMORY@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	%r13, %rdi
	callq	_BP_PORT
	movl	%eax, %ebx
	movq	_HC_REG_HC_PRTY_STS_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_REG_RD
	testl	%eax, %eax
	je	LBB0_67
## %bb.66:
	movq	_NETIF_MSG_HW@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	leaq	L_.str.3(%rip), %rsi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_DP
LBB0_67:
	cmpl	$2, %r15d
	jl	LBB0_70
## %bb.68:
	movl	%r12d, %eax
	movl	%r15d, %r12d
	shrl	$31, %r12d
	addl	%r15d, %r12d
	addl	%r12d, %r12d
	andl	$-4, %r12d
	imull	%r12d, %ebx
	addl	%eax, %ebx
	addl	%ebx, %r12d
	movq	_wb_data@GOTPCREL(%rip), %r15
	.p2align	4, 0x90
LBB0_69:                                ## =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	$2, %edx
	callq	_bnx2x_read_dmae
	movl	(%r15), %esi
	movq	%r13, %rdi
	callq	_bnx2x_sp_mapping
	movq	%r13, %rdi
	movl	%eax, %esi
	movl	%ebx, %edx
	movl	$2, %ecx
	callq	_bnx2x_write_dmae
	addl	$8, %ebx
	cmpl	%r12d, %ebx
	jl	LBB0_69
LBB0_70:
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_REG_RD
LBB0_71:
	addq	$24, %r13
	movq	%r13, %rdi
	callq	_bnx2x_phy_probe
	xorl	%ebx, %ebx
LBB0_72:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PHASE_PF0,4,2                  ## @PHASE_PF0
	.comm	_NETIF_MSG_HW,4,2               ## @NETIF_MSG_HW
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"starting func init  func %d\n"

	.comm	_INT_BLOCK_HC,8,3               ## @INT_BLOCK_HC
	.comm	_HC_REG_CONFIG_1,4,2            ## @HC_REG_CONFIG_1
	.comm	_HC_REG_CONFIG_0,4,2            ## @HC_REG_CONFIG_0
	.comm	_HC_CONFIG_0_REG_MSI_ATTN_EN_0,4,2 ## @HC_CONFIG_0_REG_MSI_ATTN_EN_0
	.comm	_BLOCK_PXP,4,2                  ## @BLOCK_PXP
	.comm	_BLOCK_PXP2,4,2                 ## @BLOCK_PXP2
	.comm	_ILT_CLIENT_CDU,8,3             ## @ILT_CLIENT_CDU
	.comm	_BNX2X_FIRST_VF_CID,4,2         ## @BNX2X_FIRST_VF_CID
	.comm	_ILT_PAGE_CIDS,4,2              ## @ILT_PAGE_CIDS
	.comm	_INITOP_SET,4,2                 ## @INITOP_SET
	.comm	_PRS_REG_NIC_MODE,4,2           ## @PRS_REG_NIC_MODE
	.comm	_NETIF_MSG_IFUP,4,2             ## @NETIF_MSG_IFUP
L_.str.1:                               ## @.str.1
	.asciz	"NIC MODE disabled\n"

L_.str.2:                               ## @.str.2
	.asciz	"NIC MODE configured\n"

	.comm	_IGU_PF_CONF_FUNC_EN,4,2        ## @IGU_PF_CONF_FUNC_EN
	.comm	_USING_MSIX_FLAG,4,2            ## @USING_MSIX_FLAG
	.comm	_IGU_PF_CONF_SINGLE_ISR_EN,4,2  ## @IGU_PF_CONF_SINGLE_ISR_EN
	.comm	_PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER,4,2 ## @PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER
	.comm	_IGU_REG_PF_CONFIGURATION,4,2   ## @IGU_REG_PF_CONFIGURATION
	.comm	_BLOCK_PGLUE_B,4,2              ## @BLOCK_PGLUE_B
	.comm	_PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR,4,2 ## @PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR
	.comm	_BLOCK_ATC,4,2                  ## @BLOCK_ATC
	.comm	_BLOCK_DMAE,4,2                 ## @BLOCK_DMAE
	.comm	_BLOCK_NIG,4,2                  ## @BLOCK_NIG
	.comm	_BLOCK_SRC,4,2                  ## @BLOCK_SRC
	.comm	_BLOCK_MISC,4,2                 ## @BLOCK_MISC
	.comm	_BLOCK_TCM,4,2                  ## @BLOCK_TCM
	.comm	_BLOCK_UCM,4,2                  ## @BLOCK_UCM
	.comm	_BLOCK_CCM,4,2                  ## @BLOCK_CCM
	.comm	_BLOCK_XCM,4,2                  ## @BLOCK_XCM
	.comm	_BLOCK_TSEM,4,2                 ## @BLOCK_TSEM
	.comm	_BLOCK_USEM,4,2                 ## @BLOCK_USEM
	.comm	_BLOCK_CSEM,4,2                 ## @BLOCK_CSEM
	.comm	_BLOCK_XSEM,4,2                 ## @BLOCK_XSEM
	.comm	_QM_REG_PF_EN,4,2               ## @QM_REG_PF_EN
	.comm	_TSEM_REG_VFPF_ERR_NUM,4,2      ## @TSEM_REG_VFPF_ERR_NUM
	.comm	_BNX2X_MAX_NUM_OF_VFS,4,2       ## @BNX2X_MAX_NUM_OF_VFS
	.comm	_USEM_REG_VFPF_ERR_NUM,4,2      ## @USEM_REG_VFPF_ERR_NUM
	.comm	_CSEM_REG_VFPF_ERR_NUM,4,2      ## @CSEM_REG_VFPF_ERR_NUM
	.comm	_XSEM_REG_VFPF_ERR_NUM,4,2      ## @XSEM_REG_VFPF_ERR_NUM
	.comm	_BLOCK_QM,4,2                   ## @BLOCK_QM
	.comm	_BLOCK_TM,4,2                   ## @BLOCK_TM
	.comm	_BLOCK_DORQ,4,2                 ## @BLOCK_DORQ
	.comm	_BLOCK_BRB1,4,2                 ## @BLOCK_BRB1
	.comm	_BLOCK_PRS,4,2                  ## @BLOCK_PRS
	.comm	_BLOCK_TSDM,4,2                 ## @BLOCK_TSDM
	.comm	_BLOCK_CSDM,4,2                 ## @BLOCK_CSDM
	.comm	_BLOCK_USDM,4,2                 ## @BLOCK_USDM
	.comm	_BLOCK_XSDM,4,2                 ## @BLOCK_XSDM
	.comm	_BLOCK_UPB,4,2                  ## @BLOCK_UPB
	.comm	_BLOCK_XPB,4,2                  ## @BLOCK_XPB
	.comm	_BLOCK_PBF,4,2                  ## @BLOCK_PBF
	.comm	_PBF_REG_DISABLE_PF,4,2         ## @PBF_REG_DISABLE_PF
	.comm	_BLOCK_CDU,4,2                  ## @BLOCK_CDU
	.comm	_BLOCK_CFC,4,2                  ## @BLOCK_CFC
	.comm	_CFC_REG_WEAK_ENABLE_PF,4,2     ## @CFC_REG_WEAK_ENABLE_PF
	.comm	_NIG_REG_LLH0_FUNC_EN,4,2       ## @NIG_REG_LLH0_FUNC_EN
	.comm	_NIG_REG_LLH0_FUNC_VLAN_ID,4,2  ## @NIG_REG_LLH0_FUNC_VLAN_ID
	.comm	_BLOCK_MISC_AEU,4,2             ## @BLOCK_MISC_AEU
	.comm	_MISC_REG_AEU_GENERAL_ATTN_12,4,2 ## @MISC_REG_AEU_GENERAL_ATTN_12
	.comm	_HC_REG_LEADING_EDGE_0,4,2      ## @HC_REG_LEADING_EDGE_0
	.comm	_HC_REG_TRAILING_EDGE_0,4,2     ## @HC_REG_TRAILING_EDGE_0
	.comm	_BLOCK_HC,4,2                   ## @BLOCK_HC
	.comm	_IGU_REG_LEADING_EDGE_LATCH,4,2 ## @IGU_REG_LEADING_EDGE_LATCH
	.comm	_IGU_REG_TRAILING_EDGE_LATCH,4,2 ## @IGU_REG_TRAILING_EDGE_LATCH
	.comm	_BLOCK_IGU,4,2                  ## @BLOCK_IGU
	.comm	_IGU_BC_NDSB_NUM_SEGS,4,2       ## @IGU_BC_NDSB_NUM_SEGS
	.comm	_IGU_NORM_NDSB_NUM_SEGS,4,2     ## @IGU_NORM_NDSB_NUM_SEGS
	.comm	_IGU_REG_PROD_CONS_MEMORY,4,2   ## @IGU_REG_PROD_CONS_MEMORY
	.comm	_USTORM_ID,4,2                  ## @USTORM_ID
	.comm	_IGU_INT_NOP,4,2                ## @IGU_INT_NOP
	.comm	_IGU_BC_DSB_NUM_SEGS,4,2        ## @IGU_BC_DSB_NUM_SEGS
	.comm	_IGU_NORM_DSB_NUM_SEGS,4,2      ## @IGU_NORM_DSB_NUM_SEGS
	.comm	_IGU_BC_BASE_DSB_PROD,4,2       ## @IGU_BC_BASE_DSB_PROD
	.comm	_IGU_NORM_BASE_DSB_PROD,4,2     ## @IGU_NORM_BASE_DSB_PROD
	.comm	_E1HVN_MAX,4,2                  ## @E1HVN_MAX
	.comm	_CSTORM_ID,4,2                  ## @CSTORM_ID
	.comm	_XSTORM_ID,4,2                  ## @XSTORM_ID
	.comm	_TSTORM_ID,4,2                  ## @TSTORM_ID
	.comm	_ATTENTION_ID,4,2               ## @ATTENTION_ID
	.comm	_IGU_REG_SB_INT_BEFORE_MASK_LSB,4,2 ## @IGU_REG_SB_INT_BEFORE_MASK_LSB
	.comm	_IGU_REG_SB_INT_BEFORE_MASK_MSB,4,2 ## @IGU_REG_SB_INT_BEFORE_MASK_MSB
	.comm	_IGU_REG_SB_MASK_LSB,4,2        ## @IGU_REG_SB_MASK_LSB
	.comm	_IGU_REG_SB_MASK_MSB,4,2        ## @IGU_REG_SB_MASK_MSB
	.comm	_IGU_REG_PBA_STATUS_LSB,4,2     ## @IGU_REG_PBA_STATUS_LSB
	.comm	_IGU_REG_PBA_STATUS_MSB,4,2     ## @IGU_REG_PBA_STATUS_MSB
	.comm	_HC_REG_MAIN_MEMORY_SIZE,4,2    ## @HC_REG_MAIN_MEMORY_SIZE
	.comm	_HC_REG_MAIN_MEMORY,4,2         ## @HC_REG_MAIN_MEMORY
	.comm	_HC_REG_HC_PRTY_STS_CLR,4,2     ## @HC_REG_HC_PRTY_STS_CLR
L_.str.3:                               ## @.str.3
	.asciz	"Hmmm... Parity errors in HC block during function init (0x%x)!\n"

	.comm	_wb_data,4,2                    ## @wb_data
	.comm	_BAR_CSTRORM_INTMEM,8,3         ## @BAR_CSTRORM_INTMEM
	.comm	_BAR_TSTRORM_INTMEM,8,3         ## @BAR_TSTRORM_INTMEM
	.comm	_BAR_USTRORM_INTMEM,8,3         ## @BAR_USTRORM_INTMEM
	.comm	_BAR_XSTRORM_INTMEM,8,3         ## @BAR_XSTRORM_INTMEM
	.no_dead_strip	_bnx2x_init_hw_func
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_init_hw_func
_bnx2x_init_hw_func:                    ; @bnx2x_init_hw_func
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	bl	_BP_PORT
	mov	x21, x0
	mov	x0, x19
	bl	_BP_FUNC
	mov	x22, x0
Lloh0:
	adrp	x8, _PHASE_PF0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PHASE_PF0@GOTPAGEOFF]
Lloh2:
	ldr	w23, [x8]
	mov	x0, x19
	bl	_BP_ILT
Lloh3:
	adrp	x25, _NETIF_MSG_HW@GOTPAGE
Lloh4:
	ldr	x25, [x25, _NETIF_MSG_HW@GOTPAGEOFF]
	ldr	w0, [x25]
	str	x22, [sp]
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	bl	_DP
	mov	x0, x19
	bl	_CHIP_IS_E1x
	cbz	x0, LBB0_10
LBB0_1:
	add	w20, w23, w22
	ldr	x8, [x19, #32]
Lloh7:
	adrp	x26, _INT_BLOCK_HC@GOTPAGE
Lloh8:
	ldr	x26, [x26, _INT_BLOCK_HC@GOTPAGEOFF]
	ldr	x9, [x26]
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.2:
Lloh9:
	adrp	x8, _HC_REG_CONFIG_1@GOTPAGE
Lloh10:
	ldr	x8, [x8, _HC_REG_CONFIG_1@GOTPAGEOFF]
Lloh11:
	adrp	x9, _HC_REG_CONFIG_0@GOTPAGE
Lloh12:
	ldr	x9, [x9, _HC_REG_CONFIG_0@GOTPAGEOFF]
	cmp	w21, #0
	csel	x8, x9, x8, eq
	ldr	w23, [x8]
	mov	x0, x19
	mov	x1, x23
	bl	_REG_RD
Lloh13:
	adrp	x8, _HC_CONFIG_0_REG_MSI_ATTN_EN_0@GOTPAGE
Lloh14:
	ldr	x8, [x8, _HC_CONFIG_0_REG_MSI_ATTN_EN_0@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	orr	w2, w8, w0
	mov	x0, x19
	mov	x1, x23
	bl	_REG_WR
LBB0_3:
Lloh16:
	adrp	x8, _BLOCK_PXP@GOTPAGE
Lloh17:
	ldr	x8, [x8, _BLOCK_PXP@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh19:
	adrp	x8, _BLOCK_PXP2@GOTPAGE
Lloh20:
	ldr	x8, [x8, _BLOCK_PXP2@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
	mov	x0, x19
	bl	_BP_ILT
	mov	x23, x0
	ldr	x8, [x0, #8]
Lloh22:
	adrp	x27, _ILT_CLIENT_CDU@GOTPAGE
Lloh23:
	ldr	x27, [x27, _ILT_CLIENT_CDU@GOTPAGEOFF]
	ldr	x9, [x27]
	ldr	w24, [x8, x9, lsl #2]
	mov	x0, x19
	bl	_IS_SRIOV
	cbz	x0, LBB0_5
; %bb.4:
Lloh24:
	adrp	x8, _BNX2X_FIRST_VF_CID@GOTPAGE
Lloh25:
	ldr	x8, [x8, _BNX2X_FIRST_VF_CID@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
Lloh27:
	adrp	x9, _ILT_PAGE_CIDS@GOTPAGE
Lloh28:
	ldr	x9, [x9, _ILT_PAGE_CIDS@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	sdiv	w8, w8, w9
	add	w24, w8, w24
LBB0_5:
	mov	x0, x19
	mov	x1, x24
	bl	_bnx2x_iov_init_ilt
	ldr	x8, [x23, #8]
	ldr	x9, [x27]
	ldrsw	x28, [x8, x9, lsl #2]
	mov	x0, x19
	bl	_L2_ILT_LINES
	cmp	w0, #1
	b.lt	LBB0_8
; %bb.6:
	mov	x24, #0
	mov	x27, #0
	add	x8, x28, x28, lsl #1
	lsl	x28, x8, #2
LBB0_7:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #40]
	add	x8, x8, x24
	ldr	w9, [x8, #8]
	ldr	x10, [x23]
	add	x10, x10, x28
	add	x10, x10, x24
	str	w9, [x10, #8]
	ldr	d0, [x8]
	str	d0, [x10]
	add	x27, x27, #1
	mov	x0, x19
	bl	_L2_ILT_LINES
	add	x24, x24, #12
	cmp	x27, w0, sxtw
	b.lt	LBB0_7
LBB0_8:
Lloh30:
	adrp	x8, _INITOP_SET@GOTPAGE
Lloh31:
	ldr	x8, [x8, _INITOP_SET@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_bnx2x_ilt_init_op
	mov	x0, x19
	bl	_CONFIGURE_NIC_MODE
	cbz	w0, LBB0_12
; %bb.9:
Lloh33:
	adrp	x23, l_.str.2@PAGE
Lloh34:
	add	x23, x23, l_.str.2@PAGEOFF
	mov	w2, #1
	b	LBB0_13
LBB0_10:
	mov	x0, x19
	bl	_bnx2x_pf_flr_clnup
	cbz	w0, LBB0_1
; %bb.11:
	mov	x20, x0
	mov	x0, x19
	bl	_bnx2x_fw_dump
	b	LBB0_58
LBB0_12:
	mov	x0, x19
	bl	_bnx2x_init_searcher
	mov	w2, #0
Lloh35:
	adrp	x23, l_.str.1@PAGE
Lloh36:
	add	x23, x23, l_.str.1@PAGEOFF
LBB0_13:
Lloh37:
	adrp	x8, _PRS_REG_NIC_MODE@GOTPAGE
Lloh38:
	ldr	x8, [x8, _PRS_REG_NIC_MODE@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_WR
Lloh40:
	adrp	x8, _NETIF_MSG_IFUP@GOTPAGE
Lloh41:
	ldr	x8, [x8, _NETIF_MSG_IFUP@GOTPAGEOFF]
Lloh42:
	ldr	w0, [x8]
	mov	x1, x23
	bl	_DP
	mov	x0, x19
	bl	_CHIP_IS_E1x
	cbnz	x0, LBB0_15
; %bb.14:
Lloh43:
	adrp	x8, _IGU_PF_CONF_FUNC_EN@GOTPAGE
Lloh44:
	ldr	x8, [x8, _IGU_PF_CONF_FUNC_EN@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	ldr	w9, [x19]
Lloh46:
	adrp	x10, _USING_MSIX_FLAG@GOTPAGE
Lloh47:
	ldr	x10, [x10, _USING_MSIX_FLAG@GOTPAGEOFF]
Lloh48:
	ldr	w10, [x10]
Lloh49:
	adrp	x11, _IGU_PF_CONF_SINGLE_ISR_EN@GOTPAGE
Lloh50:
	ldr	x11, [x11, _IGU_PF_CONF_SINGLE_ISR_EN@GOTPAGEOFF]
Lloh51:
	ldr	w11, [x11]
	tst	w10, w9
	csel	w9, w11, wzr, eq
	orr	w23, w9, w8
	mov	w0, #20
	bl	_msleep
Lloh52:
	adrp	x8, _PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER@GOTPAGE
Lloh53:
	ldr	x8, [x8, _PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER@GOTPAGEOFF]
Lloh54:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	bl	_REG_WR
Lloh55:
	adrp	x8, _IGU_REG_PF_CONFIGURATION@GOTPAGE
Lloh56:
	ldr	x8, [x8, _IGU_REG_PF_CONFIGURATION@GOTPAGEOFF]
Lloh57:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x23
	bl	_REG_WR
LBB0_15:
	mov	w8, #1
	str	w8, [x19, #4]
Lloh58:
	adrp	x8, _BLOCK_PGLUE_B@GOTPAGE
Lloh59:
	ldr	x8, [x8, _BLOCK_PGLUE_B@GOTPAGEOFF]
Lloh60:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
	mov	x0, x19
	bl	_CHIP_IS_E1x
	cbnz	x0, LBB0_17
; %bb.16:
Lloh61:
	adrp	x8, _PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR@GOTPAGE
Lloh62:
	ldr	x8, [x8, _PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR@GOTPAGEOFF]
Lloh63:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x22
	bl	_REG_WR
LBB0_17:
Lloh64:
	adrp	x8, _BLOCK_ATC@GOTPAGE
Lloh65:
	ldr	x8, [x8, _BLOCK_ATC@GOTPAGEOFF]
Lloh66:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh67:
	adrp	x8, _BLOCK_DMAE@GOTPAGE
Lloh68:
	ldr	x8, [x8, _BLOCK_DMAE@GOTPAGEOFF]
Lloh69:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh70:
	adrp	x8, _BLOCK_NIG@GOTPAGE
Lloh71:
	ldr	x8, [x8, _BLOCK_NIG@GOTPAGEOFF]
Lloh72:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh73:
	adrp	x8, _BLOCK_SRC@GOTPAGE
Lloh74:
	ldr	x8, [x8, _BLOCK_SRC@GOTPAGEOFF]
Lloh75:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh76:
	adrp	x8, _BLOCK_MISC@GOTPAGE
Lloh77:
	ldr	x8, [x8, _BLOCK_MISC@GOTPAGEOFF]
Lloh78:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh79:
	adrp	x8, _BLOCK_TCM@GOTPAGE
Lloh80:
	ldr	x8, [x8, _BLOCK_TCM@GOTPAGEOFF]
Lloh81:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh82:
	adrp	x8, _BLOCK_UCM@GOTPAGE
Lloh83:
	ldr	x8, [x8, _BLOCK_UCM@GOTPAGEOFF]
Lloh84:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh85:
	adrp	x8, _BLOCK_CCM@GOTPAGE
Lloh86:
	ldr	x8, [x8, _BLOCK_CCM@GOTPAGEOFF]
Lloh87:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh88:
	adrp	x8, _BLOCK_XCM@GOTPAGE
Lloh89:
	ldr	x8, [x8, _BLOCK_XCM@GOTPAGEOFF]
Lloh90:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh91:
	adrp	x8, _BLOCK_TSEM@GOTPAGE
Lloh92:
	ldr	x8, [x8, _BLOCK_TSEM@GOTPAGEOFF]
Lloh93:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh94:
	adrp	x8, _BLOCK_USEM@GOTPAGE
Lloh95:
	ldr	x8, [x8, _BLOCK_USEM@GOTPAGEOFF]
Lloh96:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh97:
	adrp	x8, _BLOCK_CSEM@GOTPAGE
Lloh98:
	ldr	x8, [x8, _BLOCK_CSEM@GOTPAGEOFF]
Lloh99:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh100:
	adrp	x8, _BLOCK_XSEM@GOTPAGE
Lloh101:
	ldr	x8, [x8, _BLOCK_XSEM@GOTPAGEOFF]
Lloh102:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
	mov	x0, x19
	bl	_CHIP_IS_E1x
	cbnz	x0, LBB0_19
; %bb.18:
Lloh103:
	adrp	x8, _QM_REG_PF_EN@GOTPAGE
Lloh104:
	ldr	x8, [x8, _QM_REG_PF_EN@GOTPAGEOFF]
Lloh105:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	bl	_REG_WR
LBB0_19:
	mov	x0, x19
	bl	_CHIP_IS_E1x
	cbnz	x0, LBB0_21
; %bb.20:
Lloh106:
	adrp	x8, _TSEM_REG_VFPF_ERR_NUM@GOTPAGE
Lloh107:
	ldr	x8, [x8, _TSEM_REG_VFPF_ERR_NUM@GOTPAGEOFF]
Lloh108:
	ldr	w1, [x8]
Lloh109:
	adrp	x23, _BNX2X_MAX_NUM_OF_VFS@GOTPAGE
Lloh110:
	ldr	x23, [x23, _BNX2X_MAX_NUM_OF_VFS@GOTPAGEOFF]
	ldr	w8, [x23]
	add	w2, w8, w22
	mov	x0, x19
	bl	_REG_WR
Lloh111:
	adrp	x8, _USEM_REG_VFPF_ERR_NUM@GOTPAGE
Lloh112:
	ldr	x8, [x8, _USEM_REG_VFPF_ERR_NUM@GOTPAGEOFF]
Lloh113:
	ldr	w1, [x8]
	ldr	w8, [x23]
	add	w2, w8, w22
	mov	x0, x19
	bl	_REG_WR
Lloh114:
	adrp	x8, _CSEM_REG_VFPF_ERR_NUM@GOTPAGE
Lloh115:
	ldr	x8, [x8, _CSEM_REG_VFPF_ERR_NUM@GOTPAGEOFF]
Lloh116:
	ldr	w1, [x8]
	ldr	w8, [x23]
	add	w2, w8, w22
	mov	x0, x19
	bl	_REG_WR
Lloh117:
	adrp	x8, _XSEM_REG_VFPF_ERR_NUM@GOTPAGE
Lloh118:
	ldr	x8, [x8, _XSEM_REG_VFPF_ERR_NUM@GOTPAGEOFF]
Lloh119:
	ldr	w1, [x8]
	ldr	w8, [x23]
	add	w2, w8, w22
	mov	x0, x19
	bl	_REG_WR
LBB0_21:
Lloh120:
	adrp	x8, _BLOCK_QM@GOTPAGE
Lloh121:
	ldr	x8, [x8, _BLOCK_QM@GOTPAGEOFF]
Lloh122:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh123:
	adrp	x8, _BLOCK_TM@GOTPAGE
Lloh124:
	ldr	x8, [x8, _BLOCK_TM@GOTPAGEOFF]
Lloh125:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh126:
	adrp	x8, _BLOCK_DORQ@GOTPAGE
Lloh127:
	ldr	x8, [x8, _BLOCK_DORQ@GOTPAGEOFF]
Lloh128:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
	mov	x0, x19
	bl	_bnx2x_iov_init_dq
Lloh129:
	adrp	x8, _BLOCK_BRB1@GOTPAGE
Lloh130:
	ldr	x8, [x8, _BLOCK_BRB1@GOTPAGEOFF]
Lloh131:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh132:
	adrp	x8, _BLOCK_PRS@GOTPAGE
Lloh133:
	ldr	x8, [x8, _BLOCK_PRS@GOTPAGEOFF]
Lloh134:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh135:
	adrp	x8, _BLOCK_TSDM@GOTPAGE
Lloh136:
	ldr	x8, [x8, _BLOCK_TSDM@GOTPAGEOFF]
Lloh137:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh138:
	adrp	x8, _BLOCK_CSDM@GOTPAGE
Lloh139:
	ldr	x8, [x8, _BLOCK_CSDM@GOTPAGEOFF]
Lloh140:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh141:
	adrp	x8, _BLOCK_USDM@GOTPAGE
Lloh142:
	ldr	x8, [x8, _BLOCK_USDM@GOTPAGEOFF]
Lloh143:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh144:
	adrp	x8, _BLOCK_XSDM@GOTPAGE
Lloh145:
	ldr	x8, [x8, _BLOCK_XSDM@GOTPAGEOFF]
Lloh146:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh147:
	adrp	x8, _BLOCK_UPB@GOTPAGE
Lloh148:
	ldr	x8, [x8, _BLOCK_UPB@GOTPAGEOFF]
Lloh149:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh150:
	adrp	x8, _BLOCK_XPB@GOTPAGE
Lloh151:
	ldr	x8, [x8, _BLOCK_XPB@GOTPAGEOFF]
Lloh152:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh153:
	adrp	x8, _BLOCK_PBF@GOTPAGE
Lloh154:
	ldr	x8, [x8, _BLOCK_PBF@GOTPAGEOFF]
Lloh155:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
	mov	x0, x19
	bl	_CHIP_IS_E1x
	cbnz	x0, LBB0_23
; %bb.22:
Lloh156:
	adrp	x8, _PBF_REG_DISABLE_PF@GOTPAGE
Lloh157:
	ldr	x8, [x8, _PBF_REG_DISABLE_PF@GOTPAGEOFF]
Lloh158:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
LBB0_23:
Lloh159:
	adrp	x8, _BLOCK_CDU@GOTPAGE
Lloh160:
	ldr	x8, [x8, _BLOCK_CDU@GOTPAGEOFF]
Lloh161:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
Lloh162:
	adrp	x8, _BLOCK_CFC@GOTPAGE
Lloh163:
	ldr	x8, [x8, _BLOCK_CFC@GOTPAGEOFF]
Lloh164:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
	mov	x0, x19
	bl	_CHIP_IS_E1x
	cbnz	x0, LBB0_25
; %bb.24:
Lloh165:
	adrp	x8, _CFC_REG_WEAK_ENABLE_PF@GOTPAGE
Lloh166:
	ldr	x8, [x8, _CFC_REG_WEAK_ENABLE_PF@GOTPAGEOFF]
Lloh167:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	bl	_REG_WR
LBB0_25:
	mov	x0, x19
	bl	_IS_MF
	cbz	x0, LBB0_27
; %bb.26:
Lloh168:
	adrp	x8, _NIG_REG_LLH0_FUNC_EN@GOTPAGE
Lloh169:
	ldr	x8, [x8, _NIG_REG_LLH0_FUNC_EN@GOTPAGEOFF]
Lloh170:
	ldr	w8, [x8]
	lsl	w23, w21, #3
	add	w1, w8, w23
	mov	x0, x19
	mov	w2, #1
	bl	_REG_WR
Lloh171:
	adrp	x8, _NIG_REG_LLH0_FUNC_VLAN_ID@GOTPAGE
Lloh172:
	ldr	x8, [x8, _NIG_REG_LLH0_FUNC_VLAN_ID@GOTPAGEOFF]
Lloh173:
	ldr	w8, [x8]
	add	w1, w8, w23
	ldr	w2, [x19, #8]
	mov	x0, x19
	bl	_REG_WR
LBB0_27:
Lloh174:
	adrp	x8, _BLOCK_MISC_AEU@GOTPAGE
Lloh175:
	ldr	x8, [x8, _BLOCK_MISC_AEU@GOTPAGEOFF]
Lloh176:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
	ldr	x8, [x19, #32]
	ldr	x9, [x26]
	cmp	x8, x9
	b.ne	LBB0_31
; %bb.28:
	mov	x0, x19
	bl	_CHIP_IS_E1H
	cbz	x0, LBB0_30
; %bb.29:
Lloh177:
	adrp	x8, _MISC_REG_AEU_GENERAL_ATTN_12@GOTPAGE
Lloh178:
	ldr	x8, [x8, _MISC_REG_AEU_GENERAL_ATTN_12@GOTPAGEOFF]
Lloh179:
	ldr	w8, [x8]
	add	w1, w8, w22, lsl #2
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh180:
	adrp	x8, _HC_REG_LEADING_EDGE_0@GOTPAGE
Lloh181:
	ldr	x8, [x8, _HC_REG_LEADING_EDGE_0@GOTPAGEOFF]
Lloh182:
	ldr	w8, [x8]
	lsl	w21, w21, #3
	add	w1, w8, w21
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh183:
	adrp	x8, _HC_REG_TRAILING_EDGE_0@GOTPAGE
Lloh184:
	ldr	x8, [x8, _HC_REG_TRAILING_EDGE_0@GOTPAGEOFF]
Lloh185:
	ldr	w8, [x8]
	add	w1, w8, w21
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
LBB0_30:
Lloh186:
	adrp	x8, _BLOCK_HC@GOTPAGE
Lloh187:
	ldr	x8, [x8, _BLOCK_HC@GOTPAGEOFF]
Lloh188:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
	b	LBB0_50
LBB0_31:
Lloh189:
	adrp	x8, _MISC_REG_AEU_GENERAL_ATTN_12@GOTPAGE
Lloh190:
	ldr	x8, [x8, _MISC_REG_AEU_GENERAL_ATTN_12@GOTPAGEOFF]
Lloh191:
	ldr	w8, [x8]
	add	w1, w8, w22, lsl #2
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
	mov	x0, x19
	bl	_CHIP_IS_E1x
	cbnz	x0, LBB0_33
; %bb.32:
Lloh192:
	adrp	x8, _IGU_REG_LEADING_EDGE_LATCH@GOTPAGE
Lloh193:
	ldr	x8, [x8, _IGU_REG_LEADING_EDGE_LATCH@GOTPAGEOFF]
Lloh194:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh195:
	adrp	x8, _IGU_REG_TRAILING_EDGE_LATCH@GOTPAGE
Lloh196:
	ldr	x8, [x8, _IGU_REG_TRAILING_EDGE_LATCH@GOTPAGEOFF]
Lloh197:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
LBB0_33:
Lloh198:
	adrp	x8, _BLOCK_IGU@GOTPAGE
Lloh199:
	ldr	x8, [x8, _BLOCK_IGU@GOTPAGEOFF]
Lloh200:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_bnx2x_init_block
	mov	x0, x19
	bl	_CHIP_IS_E1x
	cbnz	x0, LBB0_50
; %bb.34:
	mov	x0, x19
	bl	_CHIP_INT_MODE_IS_BC
Lloh201:
	adrp	x8, _IGU_BC_NDSB_NUM_SEGS@GOTPAGE
Lloh202:
	ldr	x8, [x8, _IGU_BC_NDSB_NUM_SEGS@GOTPAGEOFF]
Lloh203:
	adrp	x9, _IGU_NORM_NDSB_NUM_SEGS@GOTPAGE
Lloh204:
	ldr	x9, [x9, _IGU_NORM_NDSB_NUM_SEGS@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x9, x8, eq
Lloh205:
	adrp	x23, _IGU_REG_PROD_CONS_MEMORY@GOTPAGE
Lloh206:
	ldr	x23, [x23, _IGU_REG_PROD_CONS_MEMORY@GOTPAGEOFF]
	ldr	w9, [x19, #12]
Lloh207:
	adrp	x22, _USTORM_ID@GOTPAGE
Lloh208:
	ldr	x22, [x22, _USTORM_ID@GOTPAGEOFF]
Lloh209:
	adrp	x21, _IGU_INT_NOP@GOTPAGE
Lloh210:
	ldr	x21, [x21, _IGU_INT_NOP@GOTPAGEOFF]
	cmp	w9, #1
	b.lt	LBB0_41
; %bb.35:
	mov	w20, #0
	ldr	w24, [x8]
	lsl	w26, w24, #2
	b	LBB0_37
LBB0_36:                                ;   in Loop: Header=BB0_37 Depth=1
	ldr	w2, [x22]
	ldr	w4, [x21]
	mov	x0, x19
	mov	w3, #0
	mov	w5, #1
	bl	_bnx2x_ack_sb
	ldr	w8, [x19, #16]
	add	w1, w8, w20
	mov	x0, x19
	bl	_bnx2x_igu_clear_sb
	add	w20, w20, #1
	ldr	w8, [x19, #12]
	cmp	w20, w8
	b.ge	LBB0_41
LBB0_37:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_39 Depth 2
	ldr	w8, [x19, #16]
	add	w1, w8, w20
	cmp	w24, #1
	b.lt	LBB0_36
; %bb.38:                               ;   in Loop: Header=BB0_37 Depth=1
	mul	w27, w26, w1
	mov	x28, x24
LBB0_39:                                ;   Parent Loop BB0_37 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	w8, [x23]
	add	w1, w27, w8
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
	add	w27, w27, #4
	subs	w28, w28, #1
	b.ne	LBB0_39
; %bb.40:                               ;   in Loop: Header=BB0_37 Depth=1
	ldr	w8, [x19, #16]
	add	w1, w8, w20
	b	LBB0_36
LBB0_41:
	mov	x0, x19
	bl	_CHIP_INT_MODE_IS_BC
Lloh211:
	adrp	x8, _IGU_BC_DSB_NUM_SEGS@GOTPAGE
Lloh212:
	ldr	x8, [x8, _IGU_BC_DSB_NUM_SEGS@GOTPAGEOFF]
Lloh213:
	adrp	x9, _IGU_NORM_DSB_NUM_SEGS@GOTPAGE
Lloh214:
	ldr	x9, [x9, _IGU_NORM_DSB_NUM_SEGS@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x9, x8, eq
	ldr	w24, [x8]
	mov	x0, x19
	bl	_CHIP_MODE_IS_4_PORT
	cbz	x0, LBB0_43
; %bb.42:
	mov	x0, x19
	bl	_BP_FUNC
	b	LBB0_44
LBB0_43:
	mov	x0, x19
	bl	_BP_VN
LBB0_44:
	mov	x20, x0
	mov	x0, x19
	bl	_CHIP_INT_MODE_IS_BC
Lloh215:
	adrp	x8, _IGU_NORM_BASE_DSB_PROD@GOTPAGE
Lloh216:
	ldr	x8, [x8, _IGU_NORM_BASE_DSB_PROD@GOTPAGEOFF]
Lloh217:
	adrp	x9, _IGU_BC_BASE_DSB_PROD@GOTPAGE
Lloh218:
	ldr	x9, [x9, _IGU_BC_BASE_DSB_PROD@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x8, x9, eq
Lloh219:
	adrp	x26, _E1HVN_MAX@GOTPAGE
Lloh220:
	ldr	x26, [x26, _E1HVN_MAX@GOTPAGEOFF]
	ldr	w9, [x26]
	mul	w9, w9, w24
	cmp	w9, #1
	b.lt	LBB0_47
; %bb.45:
	mov	w27, #0
	ldr	w8, [x8]
	add	w20, w8, w20
LBB0_46:                                ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x23]
	add	w9, w20, w27
	add	w1, w8, w9, lsl #2
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
	ldr	w8, [x26]
	mul	w9, w8, w24
	add	w27, w8, w27
	cmp	w27, w9
	b.lt	LBB0_46
LBB0_47:
	mov	x0, x19
	bl	_CHIP_INT_MODE_IS_BC
	mov	x20, x0
	ldr	w1, [x19, #20]
	ldr	w2, [x22]
	ldr	w4, [x21]
	mov	x0, x19
	mov	w3, #0
	mov	w5, #1
	bl	_bnx2x_ack_sb
	ldr	w1, [x19, #20]
	cbz	x20, LBB0_49
; %bb.48:
Lloh221:
	adrp	x8, _CSTORM_ID@GOTPAGE
Lloh222:
	ldr	x8, [x8, _CSTORM_ID@GOTPAGEOFF]
Lloh223:
	ldr	w2, [x8]
	ldr	w4, [x21]
	mov	x0, x19
	mov	w3, #0
	mov	w5, #1
	bl	_bnx2x_ack_sb
	ldr	w1, [x19, #20]
Lloh224:
	adrp	x8, _XSTORM_ID@GOTPAGE
Lloh225:
	ldr	x8, [x8, _XSTORM_ID@GOTPAGEOFF]
Lloh226:
	ldr	w2, [x8]
	ldr	w4, [x21]
	mov	x0, x19
	mov	w3, #0
	mov	w5, #1
	bl	_bnx2x_ack_sb
	ldr	w1, [x19, #20]
Lloh227:
	adrp	x8, _TSTORM_ID@GOTPAGE
Lloh228:
	ldr	x8, [x8, _TSTORM_ID@GOTPAGEOFF]
Lloh229:
	ldr	w2, [x8]
	ldr	w4, [x21]
	mov	x0, x19
	mov	w3, #0
	mov	w5, #1
	bl	_bnx2x_ack_sb
	ldr	w1, [x19, #20]
LBB0_49:
Lloh230:
	adrp	x8, _ATTENTION_ID@GOTPAGE
Lloh231:
	ldr	x8, [x8, _ATTENTION_ID@GOTPAGEOFF]
Lloh232:
	ldr	w2, [x8]
	ldr	w4, [x21]
	mov	x0, x19
	mov	w3, #0
	mov	w5, #1
	bl	_bnx2x_ack_sb
	ldr	w1, [x19, #20]
	mov	x0, x19
	bl	_bnx2x_igu_clear_sb
Lloh233:
	adrp	x8, _IGU_REG_SB_INT_BEFORE_MASK_LSB@GOTPAGE
Lloh234:
	ldr	x8, [x8, _IGU_REG_SB_INT_BEFORE_MASK_LSB@GOTPAGEOFF]
Lloh235:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh236:
	adrp	x8, _IGU_REG_SB_INT_BEFORE_MASK_MSB@GOTPAGE
Lloh237:
	ldr	x8, [x8, _IGU_REG_SB_INT_BEFORE_MASK_MSB@GOTPAGEOFF]
Lloh238:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh239:
	adrp	x8, _IGU_REG_SB_MASK_LSB@GOTPAGE
Lloh240:
	ldr	x8, [x8, _IGU_REG_SB_MASK_LSB@GOTPAGEOFF]
Lloh241:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh242:
	adrp	x8, _IGU_REG_SB_MASK_MSB@GOTPAGE
Lloh243:
	ldr	x8, [x8, _IGU_REG_SB_MASK_MSB@GOTPAGEOFF]
Lloh244:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh245:
	adrp	x8, _IGU_REG_PBA_STATUS_LSB@GOTPAGE
Lloh246:
	ldr	x8, [x8, _IGU_REG_PBA_STATUS_LSB@GOTPAGEOFF]
Lloh247:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh248:
	adrp	x8, _IGU_REG_PBA_STATUS_MSB@GOTPAGE
Lloh249:
	ldr	x8, [x8, _IGU_REG_PBA_STATUS_MSB@GOTPAGEOFF]
Lloh250:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
LBB0_50:
	mov	x0, x19
	mov	w1, #8468
	mov	w2, #-1
	bl	_REG_WR
	mov	x0, x19
	mov	w1, #8480
	mov	w2, #-1
	bl	_REG_WR
	mov	x0, x19
	bl	_CHIP_IS_E1x
	cbz	x0, LBB0_57
; %bb.51:
Lloh251:
	adrp	x8, _HC_REG_MAIN_MEMORY_SIZE@GOTPAGE
Lloh252:
	ldr	x8, [x8, _HC_REG_MAIN_MEMORY_SIZE@GOTPAGEOFF]
Lloh253:
	ldr	w24, [x8]
	cmp	w24, #0
	cinc	w22, w24, lt
Lloh254:
	adrp	x8, _HC_REG_MAIN_MEMORY@GOTPAGE
Lloh255:
	ldr	x8, [x8, _HC_REG_MAIN_MEMORY@GOTPAGEOFF]
Lloh256:
	ldr	w23, [x8]
	mov	x0, x19
	bl	_BP_PORT
	mov	x21, x0
Lloh257:
	adrp	x8, _HC_REG_HC_PRTY_STS_CLR@GOTPAGE
Lloh258:
	ldr	x8, [x8, _HC_REG_HC_PRTY_STS_CLR@GOTPAGEOFF]
Lloh259:
	ldr	w20, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_REG_RD
                                        ; kill: def $w0 killed $w0 def $x0
	cbz	w0, LBB0_53
; %bb.52:
	ldr	w8, [x25]
	str	x0, [sp]
Lloh260:
	adrp	x1, l_.str.3@PAGE
Lloh261:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x8
	bl	_DP
LBB0_53:
	cmp	w24, #2
	b.lt	LBB0_56
; %bb.54:
	lsl	w8, w22, #1
	and	w8, w8, #0xfffffffc
	madd	w21, w21, w8, w23
	add	w22, w21, w8
Lloh262:
	adrp	x23, _wb_data@GOTPAGE
Lloh263:
	ldr	x23, [x23, _wb_data@GOTPAGEOFF]
LBB0_55:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x21
	mov	w2, #2
	bl	_bnx2x_read_dmae
	ldr	w1, [x23]
	mov	x0, x19
	bl	_bnx2x_sp_mapping
	mov	x1, x0
	mov	x0, x19
	mov	x2, x21
	mov	w3, #2
	bl	_bnx2x_write_dmae
	add	w21, w21, #8
	cmp	w21, w22
	b.lt	LBB0_55
LBB0_56:
	mov	x0, x19
	mov	x1, x20
	bl	_REG_RD
LBB0_57:
	add	x0, x19, #24
	bl	_bnx2x_phy_probe
	mov	w20, #0
LBB0_58:
	mov	x0, x20
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGot	Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh153, Lloh154, Lloh155
	.loh AdrpLdrGotLdr	Lloh150, Lloh151, Lloh152
	.loh AdrpLdrGotLdr	Lloh147, Lloh148, Lloh149
	.loh AdrpLdrGotLdr	Lloh144, Lloh145, Lloh146
	.loh AdrpLdrGotLdr	Lloh141, Lloh142, Lloh143
	.loh AdrpLdrGotLdr	Lloh138, Lloh139, Lloh140
	.loh AdrpLdrGotLdr	Lloh135, Lloh136, Lloh137
	.loh AdrpLdrGotLdr	Lloh132, Lloh133, Lloh134
	.loh AdrpLdrGotLdr	Lloh129, Lloh130, Lloh131
	.loh AdrpLdrGotLdr	Lloh126, Lloh127, Lloh128
	.loh AdrpLdrGotLdr	Lloh123, Lloh124, Lloh125
	.loh AdrpLdrGotLdr	Lloh120, Lloh121, Lloh122
	.loh AdrpLdrGotLdr	Lloh156, Lloh157, Lloh158
	.loh AdrpLdrGotLdr	Lloh162, Lloh163, Lloh164
	.loh AdrpLdrGotLdr	Lloh159, Lloh160, Lloh161
	.loh AdrpLdrGotLdr	Lloh165, Lloh166, Lloh167
	.loh AdrpLdrGotLdr	Lloh171, Lloh172, Lloh173
	.loh AdrpLdrGotLdr	Lloh168, Lloh169, Lloh170
	.loh AdrpLdrGotLdr	Lloh174, Lloh175, Lloh176
	.loh AdrpLdrGotLdr	Lloh183, Lloh184, Lloh185
	.loh AdrpLdrGotLdr	Lloh180, Lloh181, Lloh182
	.loh AdrpLdrGotLdr	Lloh177, Lloh178, Lloh179
	.loh AdrpLdrGotLdr	Lloh186, Lloh187, Lloh188
	.loh AdrpLdrGotLdr	Lloh189, Lloh190, Lloh191
	.loh AdrpLdrGotLdr	Lloh195, Lloh196, Lloh197
	.loh AdrpLdrGotLdr	Lloh192, Lloh193, Lloh194
	.loh AdrpLdrGotLdr	Lloh198, Lloh199, Lloh200
	.loh AdrpLdrGot	Lloh209, Lloh210
	.loh AdrpLdrGot	Lloh207, Lloh208
	.loh AdrpLdrGot	Lloh205, Lloh206
	.loh AdrpLdrGot	Lloh203, Lloh204
	.loh AdrpLdrGot	Lloh201, Lloh202
	.loh AdrpLdrGot	Lloh213, Lloh214
	.loh AdrpLdrGot	Lloh211, Lloh212
	.loh AdrpLdrGot	Lloh219, Lloh220
	.loh AdrpLdrGot	Lloh217, Lloh218
	.loh AdrpLdrGot	Lloh215, Lloh216
	.loh AdrpLdrGotLdr	Lloh227, Lloh228, Lloh229
	.loh AdrpLdrGotLdr	Lloh224, Lloh225, Lloh226
	.loh AdrpLdrGotLdr	Lloh221, Lloh222, Lloh223
	.loh AdrpLdrGotLdr	Lloh248, Lloh249, Lloh250
	.loh AdrpLdrGotLdr	Lloh245, Lloh246, Lloh247
	.loh AdrpLdrGotLdr	Lloh242, Lloh243, Lloh244
	.loh AdrpLdrGotLdr	Lloh239, Lloh240, Lloh241
	.loh AdrpLdrGotLdr	Lloh236, Lloh237, Lloh238
	.loh AdrpLdrGotLdr	Lloh233, Lloh234, Lloh235
	.loh AdrpLdrGotLdr	Lloh230, Lloh231, Lloh232
	.loh AdrpLdrGotLdr	Lloh257, Lloh258, Lloh259
	.loh AdrpLdrGotLdr	Lloh254, Lloh255, Lloh256
	.loh AdrpLdrGotLdr	Lloh251, Lloh252, Lloh253
	.loh AdrpAdd	Lloh260, Lloh261
	.loh AdrpLdrGot	Lloh262, Lloh263
	.cfi_endproc
                                        ; -- End function
	.comm	_PHASE_PF0,4,2                  ; @PHASE_PF0
	.comm	_NETIF_MSG_HW,4,2               ; @NETIF_MSG_HW
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"starting func init  func %d\n"

	.comm	_INT_BLOCK_HC,8,3               ; @INT_BLOCK_HC
	.comm	_HC_REG_CONFIG_1,4,2            ; @HC_REG_CONFIG_1
	.comm	_HC_REG_CONFIG_0,4,2            ; @HC_REG_CONFIG_0
	.comm	_HC_CONFIG_0_REG_MSI_ATTN_EN_0,4,2 ; @HC_CONFIG_0_REG_MSI_ATTN_EN_0
	.comm	_BLOCK_PXP,4,2                  ; @BLOCK_PXP
	.comm	_BLOCK_PXP2,4,2                 ; @BLOCK_PXP2
	.comm	_ILT_CLIENT_CDU,8,3             ; @ILT_CLIENT_CDU
	.comm	_BNX2X_FIRST_VF_CID,4,2         ; @BNX2X_FIRST_VF_CID
	.comm	_ILT_PAGE_CIDS,4,2              ; @ILT_PAGE_CIDS
	.comm	_INITOP_SET,4,2                 ; @INITOP_SET
	.comm	_PRS_REG_NIC_MODE,4,2           ; @PRS_REG_NIC_MODE
	.comm	_NETIF_MSG_IFUP,4,2             ; @NETIF_MSG_IFUP
l_.str.1:                               ; @.str.1
	.asciz	"NIC MODE disabled\n"

l_.str.2:                               ; @.str.2
	.asciz	"NIC MODE configured\n"

	.comm	_IGU_PF_CONF_FUNC_EN,4,2        ; @IGU_PF_CONF_FUNC_EN
	.comm	_USING_MSIX_FLAG,4,2            ; @USING_MSIX_FLAG
	.comm	_IGU_PF_CONF_SINGLE_ISR_EN,4,2  ; @IGU_PF_CONF_SINGLE_ISR_EN
	.comm	_PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER,4,2 ; @PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER
	.comm	_IGU_REG_PF_CONFIGURATION,4,2   ; @IGU_REG_PF_CONFIGURATION
	.comm	_BLOCK_PGLUE_B,4,2              ; @BLOCK_PGLUE_B
	.comm	_PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR,4,2 ; @PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR
	.comm	_BLOCK_ATC,4,2                  ; @BLOCK_ATC
	.comm	_BLOCK_DMAE,4,2                 ; @BLOCK_DMAE
	.comm	_BLOCK_NIG,4,2                  ; @BLOCK_NIG
	.comm	_BLOCK_SRC,4,2                  ; @BLOCK_SRC
	.comm	_BLOCK_MISC,4,2                 ; @BLOCK_MISC
	.comm	_BLOCK_TCM,4,2                  ; @BLOCK_TCM
	.comm	_BLOCK_UCM,4,2                  ; @BLOCK_UCM
	.comm	_BLOCK_CCM,4,2                  ; @BLOCK_CCM
	.comm	_BLOCK_XCM,4,2                  ; @BLOCK_XCM
	.comm	_BLOCK_TSEM,4,2                 ; @BLOCK_TSEM
	.comm	_BLOCK_USEM,4,2                 ; @BLOCK_USEM
	.comm	_BLOCK_CSEM,4,2                 ; @BLOCK_CSEM
	.comm	_BLOCK_XSEM,4,2                 ; @BLOCK_XSEM
	.comm	_QM_REG_PF_EN,4,2               ; @QM_REG_PF_EN
	.comm	_TSEM_REG_VFPF_ERR_NUM,4,2      ; @TSEM_REG_VFPF_ERR_NUM
	.comm	_BNX2X_MAX_NUM_OF_VFS,4,2       ; @BNX2X_MAX_NUM_OF_VFS
	.comm	_USEM_REG_VFPF_ERR_NUM,4,2      ; @USEM_REG_VFPF_ERR_NUM
	.comm	_CSEM_REG_VFPF_ERR_NUM,4,2      ; @CSEM_REG_VFPF_ERR_NUM
	.comm	_XSEM_REG_VFPF_ERR_NUM,4,2      ; @XSEM_REG_VFPF_ERR_NUM
	.comm	_BLOCK_QM,4,2                   ; @BLOCK_QM
	.comm	_BLOCK_TM,4,2                   ; @BLOCK_TM
	.comm	_BLOCK_DORQ,4,2                 ; @BLOCK_DORQ
	.comm	_BLOCK_BRB1,4,2                 ; @BLOCK_BRB1
	.comm	_BLOCK_PRS,4,2                  ; @BLOCK_PRS
	.comm	_BLOCK_TSDM,4,2                 ; @BLOCK_TSDM
	.comm	_BLOCK_CSDM,4,2                 ; @BLOCK_CSDM
	.comm	_BLOCK_USDM,4,2                 ; @BLOCK_USDM
	.comm	_BLOCK_XSDM,4,2                 ; @BLOCK_XSDM
	.comm	_BLOCK_UPB,4,2                  ; @BLOCK_UPB
	.comm	_BLOCK_XPB,4,2                  ; @BLOCK_XPB
	.comm	_BLOCK_PBF,4,2                  ; @BLOCK_PBF
	.comm	_PBF_REG_DISABLE_PF,4,2         ; @PBF_REG_DISABLE_PF
	.comm	_BLOCK_CDU,4,2                  ; @BLOCK_CDU
	.comm	_BLOCK_CFC,4,2                  ; @BLOCK_CFC
	.comm	_CFC_REG_WEAK_ENABLE_PF,4,2     ; @CFC_REG_WEAK_ENABLE_PF
	.comm	_NIG_REG_LLH0_FUNC_EN,4,2       ; @NIG_REG_LLH0_FUNC_EN
	.comm	_NIG_REG_LLH0_FUNC_VLAN_ID,4,2  ; @NIG_REG_LLH0_FUNC_VLAN_ID
	.comm	_BLOCK_MISC_AEU,4,2             ; @BLOCK_MISC_AEU
	.comm	_MISC_REG_AEU_GENERAL_ATTN_12,4,2 ; @MISC_REG_AEU_GENERAL_ATTN_12
	.comm	_HC_REG_LEADING_EDGE_0,4,2      ; @HC_REG_LEADING_EDGE_0
	.comm	_HC_REG_TRAILING_EDGE_0,4,2     ; @HC_REG_TRAILING_EDGE_0
	.comm	_BLOCK_HC,4,2                   ; @BLOCK_HC
	.comm	_IGU_REG_LEADING_EDGE_LATCH,4,2 ; @IGU_REG_LEADING_EDGE_LATCH
	.comm	_IGU_REG_TRAILING_EDGE_LATCH,4,2 ; @IGU_REG_TRAILING_EDGE_LATCH
	.comm	_BLOCK_IGU,4,2                  ; @BLOCK_IGU
	.comm	_IGU_BC_NDSB_NUM_SEGS,4,2       ; @IGU_BC_NDSB_NUM_SEGS
	.comm	_IGU_NORM_NDSB_NUM_SEGS,4,2     ; @IGU_NORM_NDSB_NUM_SEGS
	.comm	_IGU_REG_PROD_CONS_MEMORY,4,2   ; @IGU_REG_PROD_CONS_MEMORY
	.comm	_USTORM_ID,4,2                  ; @USTORM_ID
	.comm	_IGU_INT_NOP,4,2                ; @IGU_INT_NOP
	.comm	_IGU_BC_DSB_NUM_SEGS,4,2        ; @IGU_BC_DSB_NUM_SEGS
	.comm	_IGU_NORM_DSB_NUM_SEGS,4,2      ; @IGU_NORM_DSB_NUM_SEGS
	.comm	_IGU_BC_BASE_DSB_PROD,4,2       ; @IGU_BC_BASE_DSB_PROD
	.comm	_IGU_NORM_BASE_DSB_PROD,4,2     ; @IGU_NORM_BASE_DSB_PROD
	.comm	_E1HVN_MAX,4,2                  ; @E1HVN_MAX
	.comm	_CSTORM_ID,4,2                  ; @CSTORM_ID
	.comm	_XSTORM_ID,4,2                  ; @XSTORM_ID
	.comm	_TSTORM_ID,4,2                  ; @TSTORM_ID
	.comm	_ATTENTION_ID,4,2               ; @ATTENTION_ID
	.comm	_IGU_REG_SB_INT_BEFORE_MASK_LSB,4,2 ; @IGU_REG_SB_INT_BEFORE_MASK_LSB
	.comm	_IGU_REG_SB_INT_BEFORE_MASK_MSB,4,2 ; @IGU_REG_SB_INT_BEFORE_MASK_MSB
	.comm	_IGU_REG_SB_MASK_LSB,4,2        ; @IGU_REG_SB_MASK_LSB
	.comm	_IGU_REG_SB_MASK_MSB,4,2        ; @IGU_REG_SB_MASK_MSB
	.comm	_IGU_REG_PBA_STATUS_LSB,4,2     ; @IGU_REG_PBA_STATUS_LSB
	.comm	_IGU_REG_PBA_STATUS_MSB,4,2     ; @IGU_REG_PBA_STATUS_MSB
	.comm	_HC_REG_MAIN_MEMORY_SIZE,4,2    ; @HC_REG_MAIN_MEMORY_SIZE
	.comm	_HC_REG_MAIN_MEMORY,4,2         ; @HC_REG_MAIN_MEMORY
	.comm	_HC_REG_HC_PRTY_STS_CLR,4,2     ; @HC_REG_HC_PRTY_STS_CLR
l_.str.3:                               ; @.str.3
	.asciz	"Hmmm... Parity errors in HC block during function init (0x%x)!\n"

	.comm	_wb_data,4,2                    ; @wb_data
	.comm	_BAR_CSTRORM_INTMEM,8,3         ; @BAR_CSTRORM_INTMEM
	.comm	_BAR_TSTRORM_INTMEM,8,3         ; @BAR_TSTRORM_INTMEM
	.comm	_BAR_USTRORM_INTMEM,8,3         ; @BAR_USTRORM_INTMEM
	.comm	_BAR_XSTRORM_INTMEM,8,3         ; @BAR_XSTRORM_INTMEM
	.no_dead_strip	_bnx2x_init_hw_func
.subsections_via_symbols
