	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_sdvo_get_mode_from_dtd
_intel_sdvo_get_mode_from_dtd:          ## @intel_sdvo_get_mode_from_dtd
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	32(%rsi), %ecx
	movl	%ecx, %r11d
	shll	$4, %r11d
	andl	$3840, %r11d                    ## imm = 0xF00
	addq	72(%rsi), %r11
	movq	%r11, 48(%rdi)
	movq	24(%rsi), %r10
	addq	%r11, %r10
	movl	(%rsi), %r9d
	leal	(,%r9,4), %r8d
	movl	%r8d, %eax
	andl	$768, %eax                      ## imm = 0x300
	addq	%r10, %rax
	movq	%rax, 64(%rdi)
	shll	$4, %r9d
	movl	%r9d, %edx
	andl	$768, %edx                      ## imm = 0x300
	addq	16(%rsi), %rdx
	addq	%rax, %rdx
	movq	%rdx, 56(%rdi)
	andl	$15, %ecx
	shlq	$8, %rcx
	addq	%r11, %rcx
	addq	64(%rsi), %rcx
	movq	%rcx, 40(%rdi)
	movl	36(%rsi), %edx
	movl	%edx, %ecx
	shll	$4, %ecx
	andl	$3840, %ecx                     ## imm = 0xF00
	addq	56(%rsi), %rcx
	movq	%rcx, 16(%rdi)
	movl	4(%rsi), %r10d
	movl	8(%rsi), %r11d
	movl	%r10d, %eax
	shrl	$4, %eax
	andl	$15, %eax
	andl	$48, %r8d
	addq	%rcx, %r8
	addq	%rax, %r8
	andl	$192, %r11d
	addq	%r8, %r11
	movq	%r11, 32(%rdi)
	andl	$15, %r10d
	andl	$48, %r9d
	orq	%r10, %r9
	addq	%r11, %r9
	movq	%r9, 24(%rdi)
	andl	$15, %edx
	shlq	$8, %rdx
	addq	%rcx, %rdx
	addq	48(%rsi), %rdx
	movq	%rdx, 8(%rdi)
	movl	40(%rsi), %eax
	addl	%eax, %eax
	leal	(%rax,%rax,4), %eax
	movl	%eax, (%rdi)
	movq	_DRM_MODE_FLAG_PHSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_DRM_MODE_FLAG_PVSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movl	%r8d, %ecx
	orl	%edx, %ecx
	notl	%ecx
	andl	4(%rdi), %ecx
	movl	%ecx, 4(%rdi)
	movl	12(%rsi), %esi
	movq	_DTD_FLAG_INTERLACE@GOTPCREL(%rip), %rax
	testl	%esi, (%rax)
	je	LBB0_2
## %bb.1:
	movq	_DRM_MODE_FLAG_INTERLACE@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	%ecx, 4(%rdi)
LBB0_2:
	movq	_DTD_FLAG_HSYNC_POSITIVE@GOTPCREL(%rip), %rax
	testl	%esi, (%rax)
	je	LBB0_4
## %bb.3:
	orl	%edx, %ecx
	movl	%ecx, 4(%rdi)
LBB0_4:
	movq	_DTD_FLAG_VSYNC_POSITIVE@GOTPCREL(%rip), %rax
	testl	%esi, (%rax)
	je	LBB0_6
## %bb.5:
	orl	%r8d, %ecx
	movl	%ecx, 4(%rdi)
LBB0_6:
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ## @DRM_MODE_FLAG_PHSYNC
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ## @DRM_MODE_FLAG_PVSYNC
	.comm	_DTD_FLAG_INTERLACE,4,2         ## @DTD_FLAG_INTERLACE
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ## @DRM_MODE_FLAG_INTERLACE
	.comm	_DTD_FLAG_HSYNC_POSITIVE,4,2    ## @DTD_FLAG_HSYNC_POSITIVE
	.comm	_DTD_FLAG_VSYNC_POSITIVE,4,2    ## @DTD_FLAG_VSYNC_POSITIVE
	.no_dead_strip	_intel_sdvo_get_mode_from_dtd
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_sdvo_get_mode_from_dtd
_intel_sdvo_get_mode_from_dtd:          ; @intel_sdvo_get_mode_from_dtd
	.cfi_startproc
; %bb.0:
	ldp	w8, w9, [x1, #32]
	lsl	w10, w8, #4
	and	x10, x10, #0xf00
	ldp	x12, x11, [x1, #16]
	ldp	x14, x13, [x1, #64]
	add	x10, x13, x10
	add	x11, x10, x11
	ldp	w13, w15, [x1]
	lsl	w16, w13, #2
	and	w17, w16, #0x300
	add	x11, x11, x17
	lsl	w13, w13, #4
	and	w17, w13, #0x300
	add	x12, x12, x17
	add	x12, x12, x11
	stp	x12, x11, [x0, #56]
	lsl	w8, w8, #8
	and	x8, x8, #0xf00
	add	x8, x10, x8
	add	x8, x8, x14
	stp	x8, x10, [x0, #40]
	lsl	w8, w9, #4
	and	x8, x8, #0xf00
	ubfx	x10, x15, #4, #4
	and	w11, w16, #0x30
	ldp	x14, x12, [x1, #48]
	add	x12, x12, x8
	add	x11, x12, x11
	ldp	w16, w8, [x1, #8]
	and	x16, x16, #0xc0
	add	x10, x11, x10
	add	x10, x10, x16
	and	x11, x13, #0x30
	bfxil	x11, x15, #0, #4
	add	x11, x10, x11
	stp	x11, x10, [x0, #24]
	lsl	w9, w9, #8
	and	x9, x9, #0xf00
	add	x9, x12, x9
	add	x9, x9, x14
	stp	x9, x12, [x0, #8]
	ldr	w9, [x1, #40]
	add	w9, w9, w9, lsl #2
	lsl	w9, w9, #1
	str	w9, [x0]
Lloh0:
	adrp	x9, _DRM_MODE_FLAG_PHSYNC@GOTPAGE
Lloh1:
	ldr	x9, [x9, _DRM_MODE_FLAG_PHSYNC@GOTPAGEOFF]
Lloh2:
	ldr	w11, [x9]
Lloh3:
	adrp	x9, _DRM_MODE_FLAG_PVSYNC@GOTPAGE
Lloh4:
	ldr	x9, [x9, _DRM_MODE_FLAG_PVSYNC@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w10, w9, w11
	ldr	w12, [x0, #4]
	bic	w10, w12, w10
	str	w10, [x0, #4]
Lloh6:
	adrp	x12, _DTD_FLAG_INTERLACE@GOTPAGE
Lloh7:
	ldr	x12, [x12, _DTD_FLAG_INTERLACE@GOTPAGEOFF]
Lloh8:
	ldr	w12, [x12]
	tst	w12, w8
	b.eq	LBB0_2
; %bb.1:
Lloh9:
	adrp	x12, _DRM_MODE_FLAG_INTERLACE@GOTPAGE
Lloh10:
	ldr	x12, [x12, _DRM_MODE_FLAG_INTERLACE@GOTPAGEOFF]
Lloh11:
	ldr	w12, [x12]
	orr	w10, w12, w10
	str	w10, [x0, #4]
LBB0_2:
Lloh12:
	adrp	x12, _DTD_FLAG_HSYNC_POSITIVE@GOTPAGE
Lloh13:
	ldr	x12, [x12, _DTD_FLAG_HSYNC_POSITIVE@GOTPAGEOFF]
Lloh14:
	ldr	w12, [x12]
	tst	w12, w8
	b.eq	LBB0_4
; %bb.3:
	orr	w10, w10, w11
	str	w10, [x0, #4]
LBB0_4:
Lloh15:
	adrp	x11, _DTD_FLAG_VSYNC_POSITIVE@GOTPAGE
Lloh16:
	ldr	x11, [x11, _DTD_FLAG_VSYNC_POSITIVE@GOTPAGEOFF]
Lloh17:
	ldr	w11, [x11]
	tst	w11, w8
	b.eq	LBB0_6
; %bb.5:
	orr	w8, w10, w9
	str	w8, [x0, #4]
LBB0_6:
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ; @DRM_MODE_FLAG_PHSYNC
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ; @DRM_MODE_FLAG_PVSYNC
	.comm	_DTD_FLAG_INTERLACE,4,2         ; @DTD_FLAG_INTERLACE
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ; @DRM_MODE_FLAG_INTERLACE
	.comm	_DTD_FLAG_HSYNC_POSITIVE,4,2    ; @DTD_FLAG_HSYNC_POSITIVE
	.comm	_DTD_FLAG_VSYNC_POSITIVE,4,2    ; @DTD_FLAG_VSYNC_POSITIVE
	.no_dead_strip	_intel_sdvo_get_mode_from_dtd
.subsections_via_symbols
