	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_enable_pipe_func     ## -- Begin function intel_ddi_enable_pipe_func
	.p2align	4, 0x90
_intel_ddi_enable_pipe_func:            ## @intel_ddi_enable_pipe_func
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	callq	_to_intel_crtc
	movq	%rax, %r12
	movq	%r13, %rdi
	callq	_intel_ddi_get_crtc_encoder
	movq	%rax, %rbx
	movq	8(%r13), %rax
	movq	(%rax), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movl	(%r12), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	4(%r12), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	%rbx, %rdi
	callq	_intel_ddi_get_encoder_port
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movl	(%rbx), %ebx
	movq	_TRANS_DDI_FUNC_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	movl	%eax, %edi
	callq	_TRANS_DDI_SELECT_PORT
	movl	%eax, %r14d
	orl	%r15d, %r14d
	movq	%r12, -72(%rbp)                 ## 8-byte Spill
	movl	8(%r12), %edx
	leal	-18(%rdx), %eax
	rorl	%eax
	cmpl	$9, %eax
	ja	LBB0_3
## %bb.1:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_2:
	movq	_TRANS_DDI_BPC_6@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_3:
	leaq	L_.str(%rip), %rsi
	movl	$1, %edi
                                        ## kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	_WARN
	jmp	LBB0_8
LBB0_4:
	movq	_TRANS_DDI_BPC_8@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_5:
	movq	_TRANS_DDI_BPC_10@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_6:
	movq	_TRANS_DDI_BPC_12@GOTPCREL(%rip), %rax
LBB0_7:
	orl	(%rax), %r14d
LBB0_8:
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	movl	%ebx, %r12d
	movl	(%r13), %eax
	movq	_DRM_MODE_FLAG_PVSYNC@GOTPCREL(%rip), %rsi
	movl	(%rsi), %ebx
	andl	%eax, %ebx
	je	LBB0_10
## %bb.9:
	movq	_TRANS_DDI_PVSYNC@GOTPCREL(%rip), %rsi
	movl	(%rsi), %ebx
LBB0_10:
	orl	%r14d, %ebx
	movq	_DRM_MODE_FLAG_PHSYNC@GOTPCREL(%rip), %rsi
	andl	(%rsi), %eax
	je	LBB0_12
## %bb.11:
	movq	_TRANS_DDI_PHSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_12:
	orl	%eax, %ebx
	movq	_TRANSCODER_EDP@GOTPCREL(%rip), %rax
	cmpl	(%rax), %edx
	jne	LBB0_23
## %bb.13:
	cmpl	$128, %ecx
	je	LBB0_18
## %bb.14:
	cmpl	$129, %ecx
	je	LBB0_19
## %bb.15:
	cmpl	$130, %ecx
	jne	LBB0_20
## %bb.16:
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	cmpl	$0, (%rax)
	je	LBB0_21
## %bb.17:
	movq	_TRANS_DDI_EDP_INPUT_A_ONOFF@GOTPCREL(%rip), %rax
	jmp	LBB0_22
LBB0_18:
	movq	_TRANS_DDI_EDP_INPUT_C_ONOFF@GOTPCREL(%rip), %rax
	jmp	LBB0_22
LBB0_19:
	movq	_TRANS_DDI_EDP_INPUT_B_ONOFF@GOTPCREL(%rip), %rax
	jmp	LBB0_22
LBB0_20:
	xorl	%eax, %eax
	movl	%edx, %r14d
	movl	%ecx, %r13d
	callq	_BUG
	movl	%r13d, %ecx
	movl	%r14d, %edx
	jmp	LBB0_23
LBB0_21:
	movq	_TRANS_DDI_EDP_INPUT_A_ON@GOTPCREL(%rip), %rax
LBB0_22:
	orl	(%rax), %ebx
LBB0_23:
	leaq	4(%r15), %rdi
	movq	_INTEL_OUTPUT_HDMI@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r12d
	jne	LBB0_26
## %bb.24:
	movl	%edx, %r14d
	callq	_enc_to_intel_hdmi
	cmpq	$0, (%rax)
	jne	LBB0_28
## %bb.25:
	movq	_TRANS_DDI_MODE_SELECT_DVI@GOTPCREL(%rip), %rax
	jmp	LBB0_29
LBB0_26:
	movq	_INTEL_OUTPUT_ANALOG@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r12d
	jne	LBB0_31
## %bb.27:
	movq	_TRANS_DDI_MODE_SELECT_FDI@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	movl	12(%rax), %eax
	addl	%eax, %eax
	addl	$-2, %eax
	orl	%eax, %ebx
	jmp	LBB0_30
LBB0_28:
	movq	_TRANS_DDI_MODE_SELECT_HDMI@GOTPCREL(%rip), %rax
LBB0_29:
	movl	%r14d, %edx
	orl	(%rax), %ebx
LBB0_30:
	movl	%edx, %edi
	callq	_TRANS_DDI_FUNC_CTL
	movl	%eax, %edi
	movl	%ebx, %esi
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_I915_WRITE                     ## TAILCALL
LBB0_31:
	movq	_INTEL_OUTPUT_DISPLAYPORT@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r12d
	je	LBB0_34
## %bb.32:
	movq	_INTEL_OUTPUT_EDP@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r12d
	je	LBB0_34
## %bb.33:
	movl	%edx, %r14d
	movl	(%r15), %edx
	leaq	L_.str.2(%rip), %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	callq	_WARN
	movl	%r14d, %edx
	jmp	LBB0_30
LBB0_34:
	movl	%edx, %r15d
	callq	_enc_to_intel_dp
	movq	_TRANS_DDI_MODE_SELECT_DP_SST@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movl	(%rax), %edx
	cmpl	$4, %edx
	je	LBB0_38
## %bb.35:
	cmpl	$2, %edx
	je	LBB0_39
## %bb.36:
	cmpl	$1, %edx
	jne	LBB0_41
## %bb.37:
	movq	_TRANS_DDI_PORT_WIDTH_X1@GOTPCREL(%rip), %rax
	jmp	LBB0_40
LBB0_38:
	movq	_TRANS_DDI_PORT_WIDTH_X4@GOTPCREL(%rip), %rax
	jmp	LBB0_40
LBB0_39:
	movq	_TRANS_DDI_PORT_WIDTH_X2@GOTPCREL(%rip), %rax
LBB0_40:
	orl	(%rax), %ebx
	movl	%r15d, %edx
	jmp	LBB0_30
LBB0_41:
	movq	_TRANS_DDI_PORT_WIDTH_X4@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	leaq	L_.str.1(%rip), %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	callq	_WARN
	orl	%r14d, %ebx
	movl	%r15d, %edx
	jmp	LBB0_30
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
LJTI0_0:
	.long	L0_0_set_2
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_4
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_5
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_6
	.end_data_region
                                        ## -- End function
	.comm	_TRANS_DDI_FUNC_ENABLE,4,2      ## @TRANS_DDI_FUNC_ENABLE
	.comm	_TRANS_DDI_BPC_6,4,2            ## @TRANS_DDI_BPC_6
	.comm	_TRANS_DDI_BPC_8,4,2            ## @TRANS_DDI_BPC_8
	.comm	_TRANS_DDI_BPC_10,4,2           ## @TRANS_DDI_BPC_10
	.comm	_TRANS_DDI_BPC_12,4,2           ## @TRANS_DDI_BPC_12
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"%d bpp unsupported by transcoder DDI function\n"

	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ## @DRM_MODE_FLAG_PVSYNC
	.comm	_TRANS_DDI_PVSYNC,4,2           ## @TRANS_DDI_PVSYNC
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ## @DRM_MODE_FLAG_PHSYNC
	.comm	_TRANS_DDI_PHSYNC,4,2           ## @TRANS_DDI_PHSYNC
	.comm	_TRANSCODER_EDP,4,2             ## @TRANSCODER_EDP
	.comm	_TRANS_DDI_EDP_INPUT_A_ONOFF,4,2 ## @TRANS_DDI_EDP_INPUT_A_ONOFF
	.comm	_TRANS_DDI_EDP_INPUT_A_ON,4,2   ## @TRANS_DDI_EDP_INPUT_A_ON
	.comm	_TRANS_DDI_EDP_INPUT_B_ONOFF,4,2 ## @TRANS_DDI_EDP_INPUT_B_ONOFF
	.comm	_TRANS_DDI_EDP_INPUT_C_ONOFF,4,2 ## @TRANS_DDI_EDP_INPUT_C_ONOFF
	.comm	_INTEL_OUTPUT_HDMI,4,2          ## @INTEL_OUTPUT_HDMI
	.comm	_TRANS_DDI_MODE_SELECT_HDMI,4,2 ## @TRANS_DDI_MODE_SELECT_HDMI
	.comm	_TRANS_DDI_MODE_SELECT_DVI,4,2  ## @TRANS_DDI_MODE_SELECT_DVI
	.comm	_INTEL_OUTPUT_ANALOG,4,2        ## @INTEL_OUTPUT_ANALOG
	.comm	_TRANS_DDI_MODE_SELECT_FDI,4,2  ## @TRANS_DDI_MODE_SELECT_FDI
	.comm	_INTEL_OUTPUT_DISPLAYPORT,4,2   ## @INTEL_OUTPUT_DISPLAYPORT
	.comm	_INTEL_OUTPUT_EDP,4,2           ## @INTEL_OUTPUT_EDP
	.comm	_TRANS_DDI_MODE_SELECT_DP_SST,4,2 ## @TRANS_DDI_MODE_SELECT_DP_SST
	.comm	_TRANS_DDI_PORT_WIDTH_X1,4,2    ## @TRANS_DDI_PORT_WIDTH_X1
	.comm	_TRANS_DDI_PORT_WIDTH_X2,4,2    ## @TRANS_DDI_PORT_WIDTH_X2
	.comm	_TRANS_DDI_PORT_WIDTH_X4,4,2    ## @TRANS_DDI_PORT_WIDTH_X4
L_.str.1:                               ## @.str.1
	.asciz	"Unsupported lane count %d\n"

L_.str.2:                               ## @.str.2
	.asciz	"Invalid encoder type %d for pipe %d\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_enable_pipe_func     ; -- Begin function intel_ddi_enable_pipe_func
	.p2align	2
_intel_ddi_enable_pipe_func:            ; @intel_ddi_enable_pipe_func
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x23, x0
	bl	_to_intel_crtc
	mov	x21, x0
	mov	x0, x23
	bl	_intel_ddi_get_crtc_encoder
	mov	x20, x0
	ldr	x8, [x23, #8]
	ldr	x26, [x8]
	ldp	w24, w19, [x21]
	bl	_intel_ddi_get_encoder_port
	mov	x22, x20
	ldr	w25, [x22], #4
Lloh0:
	adrp	x8, _TRANS_DDI_FUNC_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _TRANS_DDI_FUNC_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w27, [x8]
	bl	_TRANS_DDI_SELECT_PORT
	orr	w27, w0, w27
	ldr	w2, [x21, #8]
	sub	w8, w2, #18
	ror	w8, w8, #1
	cmp	w8, #9
	b.hi	LBB0_3
; %bb.1:
Lloh3:
	adrp	x9, lJTI0_0@PAGE
Lloh4:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
Lloh5:
	adrp	x8, _TRANS_DDI_BPC_6@GOTPAGE
Lloh6:
	ldr	x8, [x8, _TRANS_DDI_BPC_6@GOTPAGEOFF]
	b	LBB0_7
LBB0_3:
Lloh7:
	adrp	x1, l_.str@PAGE
Lloh8:
	add	x1, x1, l_.str@PAGEOFF
	mov	w0, #1
	bl	_WARN
	b	LBB0_8
LBB0_4:
Lloh9:
	adrp	x8, _TRANS_DDI_BPC_8@GOTPAGE
Lloh10:
	ldr	x8, [x8, _TRANS_DDI_BPC_8@GOTPAGEOFF]
	b	LBB0_7
LBB0_5:
Lloh11:
	adrp	x8, _TRANS_DDI_BPC_10@GOTPAGE
Lloh12:
	ldr	x8, [x8, _TRANS_DDI_BPC_10@GOTPAGEOFF]
	b	LBB0_7
LBB0_6:
Lloh13:
	adrp	x8, _TRANS_DDI_BPC_12@GOTPAGE
Lloh14:
	ldr	x8, [x8, _TRANS_DDI_BPC_12@GOTPAGEOFF]
LBB0_7:
	ldr	w8, [x8]
	orr	w27, w8, w27
LBB0_8:
	ldr	w8, [x23]
Lloh15:
	adrp	x9, _DRM_MODE_FLAG_PVSYNC@GOTPAGE
Lloh16:
	ldr	x9, [x9, _DRM_MODE_FLAG_PVSYNC@GOTPAGEOFF]
Lloh17:
	adrp	x10, _TRANS_DDI_PVSYNC@GOTPAGE
Lloh18:
	ldr	x10, [x10, _TRANS_DDI_PVSYNC@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
Lloh20:
	ldr	w10, [x10]
	tst	w9, w8
	csel	w9, wzr, w10, eq
Lloh21:
	adrp	x10, _DRM_MODE_FLAG_PHSYNC@GOTPAGE
Lloh22:
	ldr	x10, [x10, _DRM_MODE_FLAG_PHSYNC@GOTPAGEOFF]
	orr	w9, w9, w27
Lloh23:
	ldr	w10, [x10]
Lloh24:
	adrp	x11, _TRANS_DDI_PHSYNC@GOTPAGE
Lloh25:
	ldr	x11, [x11, _TRANS_DDI_PHSYNC@GOTPAGEOFF]
Lloh26:
	ldr	w11, [x11]
	tst	w10, w8
	csel	w8, wzr, w11, eq
	orr	w23, w9, w8
Lloh27:
	adrp	x8, _TRANSCODER_EDP@GOTPAGE
Lloh28:
	ldr	x8, [x8, _TRANSCODER_EDP@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	cmp	w19, w8
	b.ne	LBB0_19
; %bb.9:
	cmp	w24, #128
	b.eq	LBB0_14
; %bb.10:
	cmp	w24, #129
	b.eq	LBB0_15
; %bb.11:
	cmp	w24, #130
	b.ne	LBB0_16
; %bb.12:
	ldr	w8, [x26]
	cbz	w8, LBB0_17
; %bb.13:
Lloh30:
	adrp	x8, _TRANS_DDI_EDP_INPUT_A_ONOFF@GOTPAGE
Lloh31:
	ldr	x8, [x8, _TRANS_DDI_EDP_INPUT_A_ONOFF@GOTPAGEOFF]
	b	LBB0_18
LBB0_14:
Lloh32:
	adrp	x8, _TRANS_DDI_EDP_INPUT_C_ONOFF@GOTPAGE
Lloh33:
	ldr	x8, [x8, _TRANS_DDI_EDP_INPUT_C_ONOFF@GOTPAGEOFF]
	b	LBB0_18
LBB0_15:
Lloh34:
	adrp	x8, _TRANS_DDI_EDP_INPUT_B_ONOFF@GOTPAGE
Lloh35:
	ldr	x8, [x8, _TRANS_DDI_EDP_INPUT_B_ONOFF@GOTPAGEOFF]
	b	LBB0_18
LBB0_16:
	bl	_BUG
	b	LBB0_19
LBB0_17:
Lloh36:
	adrp	x8, _TRANS_DDI_EDP_INPUT_A_ON@GOTPAGE
Lloh37:
	ldr	x8, [x8, _TRANS_DDI_EDP_INPUT_A_ON@GOTPAGEOFF]
LBB0_18:
	ldr	w8, [x8]
	orr	w23, w8, w23
LBB0_19:
Lloh38:
	adrp	x8, _INTEL_OUTPUT_HDMI@GOTPAGE
Lloh39:
	ldr	x8, [x8, _INTEL_OUTPUT_HDMI@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	cmp	w25, w8
	b.ne	LBB0_21
; %bb.20:
	mov	x0, x22
	bl	_enc_to_intel_hdmi
	ldr	x8, [x0]
Lloh41:
	adrp	x9, _TRANS_DDI_MODE_SELECT_DVI@GOTPAGE
Lloh42:
	ldr	x9, [x9, _TRANS_DDI_MODE_SELECT_DVI@GOTPAGEOFF]
Lloh43:
	adrp	x10, _TRANS_DDI_MODE_SELECT_HDMI@GOTPAGE
Lloh44:
	ldr	x10, [x10, _TRANS_DDI_MODE_SELECT_HDMI@GOTPAGEOFF]
	cmp	x8, #0
	csel	x8, x9, x10, eq
	ldr	w8, [x8]
	orr	w23, w8, w23
	b	LBB0_35
LBB0_21:
Lloh45:
	adrp	x8, _INTEL_OUTPUT_ANALOG@GOTPAGE
Lloh46:
	ldr	x8, [x8, _INTEL_OUTPUT_ANALOG@GOTPAGEOFF]
Lloh47:
	ldr	w8, [x8]
	cmp	w25, w8
	b.ne	LBB0_23
; %bb.22:
Lloh48:
	adrp	x8, _TRANS_DDI_MODE_SELECT_FDI@GOTPAGE
Lloh49:
	ldr	x8, [x8, _TRANS_DDI_MODE_SELECT_FDI@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
	orr	w8, w8, w23
	ldr	w9, [x21, #12]
	lsl	w9, w9, #1
	sub	w9, w9, #2
	orr	w23, w8, w9
	b	LBB0_35
LBB0_23:
Lloh51:
	adrp	x8, _INTEL_OUTPUT_DISPLAYPORT@GOTPAGE
Lloh52:
	ldr	x8, [x8, _INTEL_OUTPUT_DISPLAYPORT@GOTPAGEOFF]
Lloh53:
	ldr	w8, [x8]
	cmp	w25, w8
	b.eq	LBB0_26
; %bb.24:
Lloh54:
	adrp	x8, _INTEL_OUTPUT_EDP@GOTPAGE
Lloh55:
	ldr	x8, [x8, _INTEL_OUTPUT_EDP@GOTPAGEOFF]
Lloh56:
	ldr	w8, [x8]
	cmp	w25, w8
	b.eq	LBB0_26
; %bb.25:
	ldr	w2, [x20]
	str	x24, [sp]
Lloh57:
	adrp	x1, l_.str.2@PAGE
Lloh58:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	w0, #1
	bl	_WARN
	b	LBB0_35
LBB0_26:
	mov	x0, x22
	bl	_enc_to_intel_dp
Lloh59:
	adrp	x8, _TRANS_DDI_MODE_SELECT_DP_SST@GOTPAGE
Lloh60:
	ldr	x8, [x8, _TRANS_DDI_MODE_SELECT_DP_SST@GOTPAGEOFF]
Lloh61:
	ldr	w8, [x8]
	orr	w20, w8, w23
	ldr	w2, [x0]
	cmp	w2, #4
	b.eq	LBB0_30
; %bb.27:
	cmp	w2, #2
	b.eq	LBB0_31
; %bb.28:
	cmp	w2, #1
	b.ne	LBB0_33
; %bb.29:
Lloh62:
	adrp	x8, _TRANS_DDI_PORT_WIDTH_X1@GOTPAGE
Lloh63:
	ldr	x8, [x8, _TRANS_DDI_PORT_WIDTH_X1@GOTPAGEOFF]
	b	LBB0_32
LBB0_30:
Lloh64:
	adrp	x8, _TRANS_DDI_PORT_WIDTH_X4@GOTPAGE
Lloh65:
	ldr	x8, [x8, _TRANS_DDI_PORT_WIDTH_X4@GOTPAGEOFF]
	b	LBB0_32
LBB0_31:
Lloh66:
	adrp	x8, _TRANS_DDI_PORT_WIDTH_X2@GOTPAGE
Lloh67:
	ldr	x8, [x8, _TRANS_DDI_PORT_WIDTH_X2@GOTPAGEOFF]
LBB0_32:
	ldr	w21, [x8]
	b	LBB0_34
LBB0_33:
Lloh68:
	adrp	x8, _TRANS_DDI_PORT_WIDTH_X4@GOTPAGE
Lloh69:
	ldr	x8, [x8, _TRANS_DDI_PORT_WIDTH_X4@GOTPAGEOFF]
Lloh70:
	ldr	w21, [x8]
Lloh71:
	adrp	x1, l_.str.1@PAGE
Lloh72:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	w0, #1
	bl	_WARN
LBB0_34:
	orr	w23, w20, w21
LBB0_35:
	mov	x0, x19
	bl	_TRANS_DDI_FUNC_CTL
	mov	x1, x23
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_I915_WRITE
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh19
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpAdd	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpAdd	Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
                                        ; -- End function
	.comm	_TRANS_DDI_FUNC_ENABLE,4,2      ; @TRANS_DDI_FUNC_ENABLE
	.comm	_TRANS_DDI_BPC_6,4,2            ; @TRANS_DDI_BPC_6
	.comm	_TRANS_DDI_BPC_8,4,2            ; @TRANS_DDI_BPC_8
	.comm	_TRANS_DDI_BPC_10,4,2           ; @TRANS_DDI_BPC_10
	.comm	_TRANS_DDI_BPC_12,4,2           ; @TRANS_DDI_BPC_12
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"%d bpp unsupported by transcoder DDI function\n"

	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ; @DRM_MODE_FLAG_PVSYNC
	.comm	_TRANS_DDI_PVSYNC,4,2           ; @TRANS_DDI_PVSYNC
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ; @DRM_MODE_FLAG_PHSYNC
	.comm	_TRANS_DDI_PHSYNC,4,2           ; @TRANS_DDI_PHSYNC
	.comm	_TRANSCODER_EDP,4,2             ; @TRANSCODER_EDP
	.comm	_TRANS_DDI_EDP_INPUT_A_ONOFF,4,2 ; @TRANS_DDI_EDP_INPUT_A_ONOFF
	.comm	_TRANS_DDI_EDP_INPUT_A_ON,4,2   ; @TRANS_DDI_EDP_INPUT_A_ON
	.comm	_TRANS_DDI_EDP_INPUT_B_ONOFF,4,2 ; @TRANS_DDI_EDP_INPUT_B_ONOFF
	.comm	_TRANS_DDI_EDP_INPUT_C_ONOFF,4,2 ; @TRANS_DDI_EDP_INPUT_C_ONOFF
	.comm	_INTEL_OUTPUT_HDMI,4,2          ; @INTEL_OUTPUT_HDMI
	.comm	_TRANS_DDI_MODE_SELECT_HDMI,4,2 ; @TRANS_DDI_MODE_SELECT_HDMI
	.comm	_TRANS_DDI_MODE_SELECT_DVI,4,2  ; @TRANS_DDI_MODE_SELECT_DVI
	.comm	_INTEL_OUTPUT_ANALOG,4,2        ; @INTEL_OUTPUT_ANALOG
	.comm	_TRANS_DDI_MODE_SELECT_FDI,4,2  ; @TRANS_DDI_MODE_SELECT_FDI
	.comm	_INTEL_OUTPUT_DISPLAYPORT,4,2   ; @INTEL_OUTPUT_DISPLAYPORT
	.comm	_INTEL_OUTPUT_EDP,4,2           ; @INTEL_OUTPUT_EDP
	.comm	_TRANS_DDI_MODE_SELECT_DP_SST,4,2 ; @TRANS_DDI_MODE_SELECT_DP_SST
	.comm	_TRANS_DDI_PORT_WIDTH_X1,4,2    ; @TRANS_DDI_PORT_WIDTH_X1
	.comm	_TRANS_DDI_PORT_WIDTH_X2,4,2    ; @TRANS_DDI_PORT_WIDTH_X2
	.comm	_TRANS_DDI_PORT_WIDTH_X4,4,2    ; @TRANS_DDI_PORT_WIDTH_X4
l_.str.1:                               ; @.str.1
	.asciz	"Unsupported lane count %d\n"

l_.str.2:                               ; @.str.2
	.asciz	"Invalid encoder type %d for pipe %d\n"

.subsections_via_symbols
