	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_dc21285_init
_intel_dc21285_init:                    ## @intel_dc21285_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	_PCI_ROM_RESOURCE@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	callq	_pci_resource_start
	movq	%rax, %r15
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_pci_resource_len
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	testq	%r15, %r15
	je	LBB0_2
## %bb.3:
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	_pci_enable_rom
	movq	%rbx, %rdi
	callq	_pci_name
	leaq	L_.str(%rip), %rdi
	movl	%eax, %esi
	callq	_printk
	testq	%r12, %r12
	jne	LBB0_5
	jmp	LBB0_6
LBB0_2:
	movq	%rbx, %rdi
	movl	$2, %esi
	callq	_pci_resource_start
	movq	%rax, %r15
	movq	%rbx, %rdi
	movl	$2, %esi
	callq	_pci_resource_len
	movq	%rax, %r12
	testq	%r12, %r12
	je	LBB0_6
LBB0_5:
	testq	%r15, %r15
	je	LBB0_6
## %bb.7:
	movl	$4, 8(%r14)
	movq	_mtd_pci_read32@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%r14)
	movq	_mtd_pci_write32@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%r14)
	movq	%r12, 16(%r14)
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_ioremap_nocache
	movl	%eax, %ecx
	movl	%eax, (%r14)
	xorl	%eax, %eax
	testl	%ecx, %ecx
	jne	LBB0_10
## %bb.8:
	movq	_ENOMEM@GOTPCREL(%rip), %rcx
	jmp	LBB0_9
LBB0_6:
	movq	_ENXIO@GOTPCREL(%rip), %rcx
LBB0_9:
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_10:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_ROM_RESOURCE,4,2           ## @PCI_ROM_RESOURCE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"%s: enabling expansion ROM\n"

	.comm	_ENXIO,4,2                      ## @ENXIO
	.comm	_mtd_pci_read32,4,2             ## @mtd_pci_read32
	.comm	_mtd_pci_write32,4,2            ## @mtd_pci_write32
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.no_dead_strip	_intel_dc21285_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_dc21285_init
_intel_dc21285_init:                    ; @intel_dc21285_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x22, x0
Lloh0:
	adrp	x21, _PCI_ROM_RESOURCE@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PCI_ROM_RESOURCE@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_pci_resource_start
	mov	x20, x0
	ldr	w1, [x21]
	mov	x0, x22
	bl	_pci_resource_len
	cmp	x0, #0
	ccmp	x20, #0, #4, ne
	b.ne	LBB0_2
; %bb.1:
	mov	x0, x22
	mov	w1, #2
	bl	_pci_resource_start
	mov	x20, x0
	mov	x0, x22
	mov	w1, #2
	bl	_pci_resource_len
	mov	x21, x0
	cbnz	x21, LBB0_3
	b	LBB0_6
LBB0_2:
	mov	x21, x0
	mov	x0, x22
	bl	_pci_enable_rom
	mov	x0, x22
	bl	_pci_name
	mov	x1, x0
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	bl	_printk
	cbz	x21, LBB0_6
LBB0_3:
	cbz	x20, LBB0_6
; %bb.4:
	mov	w8, #4
	str	w8, [x19, #8]
Lloh4:
	adrp	x8, _mtd_pci_read32@GOTPAGE
Lloh5:
	ldr	x8, [x8, _mtd_pci_read32@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
Lloh7:
	adrp	x9, _mtd_pci_write32@GOTPAGE
Lloh8:
	ldr	x9, [x9, _mtd_pci_write32@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #24]
	str	x21, [x19, #16]
	mov	x0, x20
	mov	x1, x21
	bl	_ioremap_nocache
	str	w0, [x19]
	cbz	w0, LBB0_7
; %bb.5:
	mov	w0, #0
	b	LBB0_9
LBB0_6:
Lloh10:
	adrp	x8, _ENXIO@GOTPAGE
Lloh11:
	ldr	x8, [x8, _ENXIO@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:
Lloh12:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
LBB0_8:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_ROM_RESOURCE,4,2           ; @PCI_ROM_RESOURCE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"%s: enabling expansion ROM\n"

	.comm	_ENXIO,4,2                      ; @ENXIO
	.comm	_mtd_pci_read32,4,2             ; @mtd_pci_read32
	.comm	_mtd_pci_write32,4,2            ; @mtd_pci_write32
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.no_dead_strip	_intel_dc21285_init
.subsections_via_symbols
