	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function socrates_nand_read_buf
_socrates_nand_read_buf:                ## @socrates_nand_read_buf
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movq	%rsi, %r15
	movq	(%rdi), %rax
	movq	(%rax), %r12
	movq	_FPGA_NAND_ENABLE@GOTPCREL(%rip), %rax
	movq	_FPGA_NAND_CMD_READ@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movl	(%r12), %edi
	callq	_out_be32
	testl	%r14d, %r14d
	jle	LBB0_3
## %bb.1:
	movl	%r14d, %r14d
	xorl	%ebx, %ebx
	movq	_FPGA_NAND_DATA_SHIFT@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %edi
	callq	_in_be32
	movzbl	(%r13), %ecx
	sarl	%cl, %eax
	movzbl	%al, %eax
	movl	%eax, (%r15,%rbx,4)
	incq	%rbx
	cmpq	%rbx, %r14
	jne	LBB0_2
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_FPGA_NAND_ENABLE,4,2           ## @FPGA_NAND_ENABLE
	.comm	_FPGA_NAND_CMD_READ,4,2         ## @FPGA_NAND_CMD_READ
	.comm	_FPGA_NAND_DATA_SHIFT,4,2       ## @FPGA_NAND_DATA_SHIFT
	.no_dead_strip	_socrates_nand_read_buf
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function socrates_nand_read_buf
_socrates_nand_read_buf:                ; @socrates_nand_read_buf
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x19, x1
	ldr	x8, [x0]
	ldr	x21, [x8]
Lloh0:
	adrp	x8, _FPGA_NAND_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FPGA_NAND_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _FPGA_NAND_CMD_READ@GOTPAGE
Lloh4:
	ldr	x9, [x9, _FPGA_NAND_CMD_READ@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w1, w9, w8
	ldr	w0, [x21]
	bl	_out_be32
	cmp	w20, #1
	b.lt	LBB0_3
; %bb.1:
	mov	w20, w20
Lloh6:
	adrp	x22, _FPGA_NAND_DATA_SHIFT@GOTPAGE
Lloh7:
	ldr	x22, [x22, _FPGA_NAND_DATA_SHIFT@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x21]
	bl	_in_be32
	ldr	w8, [x22]
	asr	w8, w0, w8
	and	w8, w8, #0xff
	str	w8, [x19], #4
	subs	x20, x20, #1
	b.ne	LBB0_2
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_FPGA_NAND_ENABLE,4,2           ; @FPGA_NAND_ENABLE
	.comm	_FPGA_NAND_CMD_READ,4,2         ; @FPGA_NAND_CMD_READ
	.comm	_FPGA_NAND_DATA_SHIFT,4,2       ; @FPGA_NAND_DATA_SHIFT
	.no_dead_strip	_socrates_nand_read_buf
.subsections_via_symbols
