	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_pm_set_clocks
_radeon_pm_set_clocks:                  ## @radeon_pm_set_clocks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	16(%rdi), %rax
	cmpq	24(%rdi), %rax
	jne	LBB0_2
## %bb.1:
	movq	32(%r12), %rax
	cmpq	40(%r12), %rax
	jne	LBB0_2
## %bb.24:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	8(%r12), %rdi
	callq	_mutex_lock
	leaq	56(%r12), %r14
	movq	%r14, %rdi
	callq	_down_write
	leaq	72(%r12), %r15
	movq	%r15, %rdi
	callq	_mutex_lock
	movq	_RADEON_NUM_RINGS@GOTPCREL(%rip), %r13
	movl	(%r13), %eax
	testl	%eax, %eax
	jle	LBB0_8
## %bb.3:
	xorl	%ebx, %ebx
	jmp	LBB0_4
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_4 Depth=1
	movl	(%r13), %eax
LBB0_7:                                 ##   in Loop: Header=BB0_4 Depth=1
	incq	%rbx
	movslq	%eax, %rcx
	cmpq	%rcx, %rbx
	jge	LBB0_8
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	88(%r12), %rcx
	cmpl	$0, (%rcx,%rbx,4)
	je	LBB0_7
## %bb.5:                               ##   in Loop: Header=BB0_4 Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_radeon_fence_wait_empty_locked
	testl	%eax, %eax
	je	LBB0_6
	jmp	LBB0_23
LBB0_8:
	movq	%r12, %rdi
	callq	_radeon_unmap_vram_bos
	cmpq	$0, 80(%r12)
	je	LBB0_14
## %bb.9:
	movl	(%r12), %eax
	testl	%eax, %eax
	jle	LBB0_14
## %bb.10:
	xorl	%ebx, %ebx
	jmp	LBB0_11
	.p2align	4, 0x90
LBB0_13:                                ##   in Loop: Header=BB0_11 Depth=1
	incl	%ebx
	cmpl	%eax, %ebx
	jge	LBB0_14
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	movl	48(%r12), %esi
	movl	$1, %edx
	movl	%ebx, %ecx
	shll	%cl, %edx
	btl	%ebx, %esi
	jae	LBB0_13
## %bb.12:                              ##   in Loop: Header=BB0_11 Depth=1
	orl	%edx, 52(%r12)
	movq	8(%r12), %rdi
	movl	%ebx, %esi
	callq	_drm_vblank_get
	movl	(%r12), %eax
	jmp	LBB0_13
LBB0_14:
	movq	%r12, %rdi
	callq	_radeon_set_power_state
	cmpq	$0, 80(%r12)
	je	LBB0_20
## %bb.15:
	movl	(%r12), %eax
	testl	%eax, %eax
	jle	LBB0_20
## %bb.16:
	xorl	%ebx, %ebx
	jmp	LBB0_17
	.p2align	4, 0x90
LBB0_19:                                ##   in Loop: Header=BB0_17 Depth=1
	incl	%ebx
	cmpl	%eax, %ebx
	jge	LBB0_20
LBB0_17:                                ## =>This Inner Loop Header: Depth=1
	movl	52(%r12), %edx
	movl	$1, %esi
	movl	%ebx, %ecx
	shll	%cl, %esi
	btl	%ebx, %edx
	jae	LBB0_19
## %bb.18:                              ##   in Loop: Header=BB0_17 Depth=1
	notl	%esi
	andl	%esi, %edx
	movl	%edx, 52(%r12)
	movq	8(%r12), %rdi
	movl	%ebx, %esi
	callq	_drm_vblank_put
	movl	(%r12), %eax
	jmp	LBB0_19
LBB0_20:
	movq	%r12, %rdi
	callq	_radeon_update_bandwidth_info
	cmpq	$0, 64(%r12)
	je	LBB0_22
## %bb.21:
	movq	%r12, %rdi
	callq	_radeon_bandwidth_update
LBB0_22:
	movq	_DYNPM_ACTION_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 60(%r12)
LBB0_23:
	movq	%r15, %rdi
	callq	_mutex_unlock
	movq	%r14, %rdi
	callq	_up_write
	movq	8(%r12), %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mutex_unlock                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_NUM_RINGS,4,2           ## @RADEON_NUM_RINGS
	.comm	_DYNPM_ACTION_NONE,4,2          ## @DYNPM_ACTION_NONE
	.no_dead_strip	_radeon_pm_set_clocks
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_pm_set_clocks
_radeon_pm_set_clocks:                  ; @radeon_pm_set_clocks
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldp	x8, x9, [x0, #16]
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.1:
	ldp	x8, x9, [x19, #32]
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.2:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_3:
	ldr	x0, [x19, #8]
	bl	_mutex_lock
	add	x20, x19, #56
	mov	x0, x20
	bl	_down_write
	add	x21, x19, #72
	mov	x0, x21
	bl	_mutex_lock
Lloh0:
	adrp	x23, _RADEON_NUM_RINGS@GOTPAGE
Lloh1:
	ldr	x23, [x23, _RADEON_NUM_RINGS@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	w8, #1
	b.lt	LBB0_9
; %bb.4:
	mov	x22, #0
	b	LBB0_7
LBB0_5:                                 ;   in Loop: Header=BB0_7 Depth=1
	ldr	w8, [x23]
LBB0_6:                                 ;   in Loop: Header=BB0_7 Depth=1
	add	x22, x22, #1
	cmp	x22, w8, sxtw
	b.ge	LBB0_9
LBB0_7:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x19, #88]
	ldr	w9, [x9, x22, lsl #2]
	cbz	w9, LBB0_6
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	mov	x0, x19
	mov	x1, x22
	bl	_radeon_fence_wait_empty_locked
	cbz	w0, LBB0_5
	b	LBB0_24
LBB0_9:
	mov	x0, x19
	bl	_radeon_unmap_vram_bos
	ldr	x8, [x19, #80]
	cbz	x8, LBB0_15
; %bb.10:
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_15
; %bb.11:
	mov	w22, #0
	mov	w23, #1
	b	LBB0_13
LBB0_12:                                ;   in Loop: Header=BB0_13 Depth=1
	add	w22, w22, #1
	cmp	w22, w8
	b.ge	LBB0_15
LBB0_13:                                ; =>This Inner Loop Header: Depth=1
	ldr	w10, [x19, #48]
	lsl	w9, w23, w22
	tst	w10, w9
	b.eq	LBB0_12
; %bb.14:                               ;   in Loop: Header=BB0_13 Depth=1
	ldr	w8, [x19, #52]
	orr	w8, w8, w9
	str	w8, [x19, #52]
	ldr	x0, [x19, #8]
	mov	x1, x22
	bl	_drm_vblank_get
	ldr	w8, [x19]
	b	LBB0_12
LBB0_15:
	mov	x0, x19
	bl	_radeon_set_power_state
	ldr	x8, [x19, #80]
	cbz	x8, LBB0_21
; %bb.16:
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_21
; %bb.17:
	mov	w22, #0
	mov	w23, #1
	b	LBB0_19
LBB0_18:                                ;   in Loop: Header=BB0_19 Depth=1
	add	w22, w22, #1
	cmp	w22, w8
	b.ge	LBB0_21
LBB0_19:                                ; =>This Inner Loop Header: Depth=1
	ldr	w9, [x19, #52]
	lsl	w10, w23, w22
	tst	w9, w10
	b.eq	LBB0_18
; %bb.20:                               ;   in Loop: Header=BB0_19 Depth=1
	bic	w8, w9, w10
	str	w8, [x19, #52]
	ldr	x0, [x19, #8]
	mov	x1, x22
	bl	_drm_vblank_put
	ldr	w8, [x19]
	b	LBB0_18
LBB0_21:
	mov	x0, x19
	bl	_radeon_update_bandwidth_info
	ldr	x8, [x19, #64]
	cbz	x8, LBB0_23
; %bb.22:
	mov	x0, x19
	bl	_radeon_bandwidth_update
LBB0_23:
Lloh2:
	adrp	x8, _DYNPM_ACTION_NONE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DYNPM_ACTION_NONE@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	str	w8, [x19, #60]
LBB0_24:
	mov	x0, x21
	bl	_mutex_unlock
	mov	x0, x20
	bl	_up_write
	ldr	x0, [x19, #8]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_mutex_unlock
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_NUM_RINGS,4,2           ; @RADEON_NUM_RINGS
	.comm	_DYNPM_ACTION_NONE,4,2          ; @DYNPM_ACTION_NONE
	.no_dead_strip	_radeon_pm_set_clocks
.subsections_via_symbols
