	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nv04_clock_ctor
_nv04_clock_ctor:                       ## @nv04_clock_ctor
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%r9, %r14
	leaq	-24(%rbp), %rcx
	callq	_nouveau_clock_create
	movl	%eax, %ebx
	movq	-24(%rbp), %rdi
	callq	_nv_object
	movq	%rax, (%r14)
	testl	%ebx, %ebx
	jne	LBB0_2
## %bb.1:
	movq	_nv04_clock_pll_set@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	-24(%rbp), %rcx
	movl	%eax, 8(%rcx)
	movq	_nv04_clock_pll_calc@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 4(%rcx)
	movq	_nv04_clock_pll_prog@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%rcx)
LBB0_2:
	movl	%ebx, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_nv04_clock_pll_set,4,2         ## @nv04_clock_pll_set
	.comm	_nv04_clock_pll_calc,4,2        ## @nv04_clock_pll_calc
	.comm	_nv04_clock_pll_prog,4,2        ## @nv04_clock_pll_prog
	.no_dead_strip	_nv04_clock_ctor
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nv04_clock_ctor
_nv04_clock_ctor:                       ; @nv04_clock_ctor
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x5
	add	x3, sp, #8
	bl	_nouveau_clock_create
	mov	x19, x0
	ldr	x0, [sp, #8]
	bl	_nv_object
	str	x0, [x20]
	cbnz	w19, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _nv04_clock_pll_set@GOTPAGE
Lloh1:
	ldr	x8, [x8, _nv04_clock_pll_set@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	ldr	x9, [sp, #8]
	str	w8, [x9, #8]
Lloh3:
	adrp	x8, _nv04_clock_pll_calc@GOTPAGE
Lloh4:
	ldr	x8, [x8, _nv04_clock_pll_calc@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x10, _nv04_clock_pll_prog@GOTPAGE
Lloh7:
	ldr	x10, [x10, _nv04_clock_pll_prog@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
	stp	w10, w8, [x9]
LBB0_2:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_nv04_clock_pll_set,4,2         ; @nv04_clock_pll_set
	.comm	_nv04_clock_pll_calc,4,2        ; @nv04_clock_pll_calc
	.comm	_nv04_clock_pll_prog,4,2        ; @nv04_clock_pll_prog
	.no_dead_strip	_nv04_clock_ctor
.subsections_via_symbols
