	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si_rlc_init                    ## -- Begin function si_rlc_init
	.p2align	4, 0x90
_si_rlc_init:                           ## @si_rlc_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	24(%rdi), %rdi
	testq	%rdi, %rdi
	je	LBB0_1
LBB0_3:
	xorl	%esi, %esi
	callq	_radeon_bo_reserve
	movl	%eax, %ebx
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_4
## %bb.5:
	movq	24(%r14), %rdi
	movq	_RADEON_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	leaq	32(%r14), %rdx
	callq	_radeon_bo_pin
	movl	%eax, %ebx
	movq	24(%r14), %rdi
	callq	_radeon_bo_unreserve
	testl	%ebx, %ebx
	je	LBB0_8
## %bb.6:
	movl	(%r14), %edi
	leaq	L_.str.1(%rip), %rsi
LBB0_7:
	movl	%ebx, %edx
	callq	_dev_warn
LBB0_4:
	movq	%r14, %rdi
	callq	_si_rlc_fini
	jmp	LBB0_15
LBB0_1:
	leaq	24(%r14), %r15
	movq	_RADEON_GPU_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_RADEON_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%r15, (%rsp)
	movq	%r14, %rdi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	_radeon_bo_create
	testl	%eax, %eax
	je	LBB0_2
## %bb.16:
	movl	%eax, %ebx
	movl	(%r14), %edi
	leaq	L_.str(%rip), %rsi
	movl	%eax, %edx
	callq	_dev_warn
	jmp	LBB0_15
LBB0_2:
	movq	(%r15), %rdi
	jmp	LBB0_3
LBB0_8:
	movq	8(%r14), %rdi
	testq	%rdi, %rdi
	je	LBB0_9
LBB0_11:
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	_radeon_bo_reserve
	movl	%eax, %r15d
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_14
## %bb.12:
	movq	8(%r14), %rdi
	movl	(%r12), %esi
	leaq	16(%r14), %rdx
	callq	_radeon_bo_pin
	movl	%eax, %r15d
	movq	8(%r14), %rdi
	callq	_radeon_bo_unreserve
	testl	%r15d, %r15d
	je	LBB0_15
## %bb.13:
	movl	(%r14), %edi
	leaq	L_.str.3(%rip), %rsi
	movl	%r15d, %edx
	callq	_dev_warn
LBB0_14:
	movq	%r14, %rdi
	callq	_si_rlc_fini
	movl	%r15d, %ebx
LBB0_15:
	movl	%ebx, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_9:
	leaq	8(%r14), %r15
	movq	_RADEON_GPU_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r12), %r8d
	movq	%r15, (%rsp)
	movq	%r14, %rdi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	_radeon_bo_create
	testl	%eax, %eax
	je	LBB0_10
## %bb.17:
	movl	%eax, %ebx
	movl	(%r14), %edi
	leaq	L_.str.2(%rip), %rsi
	jmp	LBB0_7
LBB0_10:
	movq	(%r15), %rdi
	jmp	LBB0_11
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ## @RADEON_GPU_PAGE_SIZE
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_RADEON_GEM_DOMAIN_VRAM,4,2     ## @RADEON_GEM_DOMAIN_VRAM
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"(%d) create RLC sr bo failed\n"

L_.str.1:                               ## @.str.1
	.asciz	"(%d) pin RLC sr bo failed\n"

L_.str.2:                               ## @.str.2
	.asciz	"(%d) create RLC c bo failed\n"

L_.str.3:                               ## @.str.3
	.asciz	"(%d) pin RLC c bo failed\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si_rlc_init                    ; -- Begin function si_rlc_init
	.p2align	2
_si_rlc_init:                           ; @si_rlc_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	mov	x21, x0
	ldr	x0, [x21, #24]!
	cbz	x0, LBB0_6
LBB0_1:
	mov	w1, #0
	bl	_radeon_bo_reserve
	mov	x20, x0
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbnz	x0, LBB0_5
; %bb.2:
	ldr	x0, [x19, #24]
Lloh0:
	adrp	x22, _RADEON_GEM_DOMAIN_VRAM@GOTPAGE
Lloh1:
	ldr	x22, [x22, _RADEON_GEM_DOMAIN_VRAM@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x2, x19, #32
	bl	_radeon_bo_pin
	mov	x20, x0
	ldr	x0, [x19, #24]
	bl	_radeon_bo_unreserve
	cbz	w20, LBB0_10
; %bb.3:
	ldr	w0, [x19]
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
LBB0_4:
	mov	x2, x20
	bl	_dev_warn
LBB0_5:
	mov	x0, x19
	bl	_si_rlc_fini
	b	LBB0_8
LBB0_6:
Lloh4:
	adrp	x8, _RADEON_GPU_PAGE_SIZE@GOTPAGE
Lloh5:
	ldr	x8, [x8, _RADEON_GPU_PAGE_SIZE@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
Lloh7:
	adrp	x8, _PAGE_SIZE@GOTPAGE
Lloh8:
	ldr	x8, [x8, _PAGE_SIZE@GOTPAGEOFF]
Lloh9:
	ldr	w2, [x8]
Lloh10:
	adrp	x8, _RADEON_GEM_DOMAIN_VRAM@GOTPAGE
Lloh11:
	ldr	x8, [x8, _RADEON_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh12:
	ldr	w4, [x8]
	mov	x0, x19
	mov	w3, #1
	mov	x5, #0
	mov	x6, x21
	bl	_radeon_bo_create
	cbz	w0, LBB0_9
; %bb.7:
	mov	x20, x0
	ldr	w0, [x19]
Lloh13:
	adrp	x1, l_.str@PAGE
Lloh14:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x20
	bl	_dev_warn
LBB0_8:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_9:
	ldr	x0, [x21]
	b	LBB0_1
LBB0_10:
	mov	x21, x19
	ldr	x0, [x21, #8]!
	cbz	x0, LBB0_14
LBB0_11:
	mov	w1, #0
	bl	_radeon_bo_reserve
	mov	x20, x0
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbnz	x0, LBB0_5
; %bb.12:
	ldr	x0, [x19, #8]
	ldr	w1, [x22]
	add	x2, x19, #16
	bl	_radeon_bo_pin
	mov	x20, x0
	ldr	x0, [x19, #8]
	bl	_radeon_bo_unreserve
	cbz	w20, LBB0_8
; %bb.13:
	ldr	w0, [x19]
Lloh15:
	adrp	x1, l_.str.3@PAGE
Lloh16:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_4
LBB0_14:
Lloh17:
	adrp	x8, _RADEON_GPU_PAGE_SIZE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _RADEON_GPU_PAGE_SIZE@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
Lloh20:
	adrp	x8, _PAGE_SIZE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PAGE_SIZE@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	ldr	w4, [x22]
	mov	x0, x19
	mov	w3, #1
	mov	x5, #0
	mov	x6, x21
	bl	_radeon_bo_create
	cbz	w0, LBB0_16
; %bb.15:
	mov	x20, x0
	ldr	w0, [x19]
Lloh23:
	adrp	x1, l_.str.2@PAGE
Lloh24:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_4
LBB0_16:
	ldr	x0, [x21]
	b	LBB0_11
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ; @RADEON_GPU_PAGE_SIZE
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_RADEON_GEM_DOMAIN_VRAM,4,2     ; @RADEON_GEM_DOMAIN_VRAM
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"(%d) create RLC sr bo failed\n"

l_.str.1:                               ; @.str.1
	.asciz	"(%d) pin RLC sr bo failed\n"

l_.str.2:                               ; @.str.2
	.asciz	"(%d) create RLC c bo failed\n"

l_.str.3:                               ; @.str.3
	.asciz	"(%d) pin RLC c bo failed\n"

.subsections_via_symbols
