	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_ddi_post_disable
_intel_ddi_post_disable:                ## @intel_ddi_post_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	8(%rdi), %rax
	movq	(%rax), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	callq	_intel_ddi_get_encoder_port
	movl	%eax, %r13d
	movl	(%r14), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	%r13d, %edi
	callq	_DDI_BUF_CTL
	movl	%eax, %edi
	callq	_I915_READ
	movl	%eax, %r12d
	movq	_DDI_BUF_CTL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	testl	%r12d, %r15d
	je	LBB0_2
## %bb.1:
	movl	%r15d, %ebx
	notl	%ebx
	andl	%r12d, %ebx
	movl	%r13d, %edi
	callq	_DDI_BUF_CTL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
LBB0_2:
	movl	%r13d, %edi
	callq	_DP_TP_CTL
	movl	%eax, %edi
	callq	_I915_READ
	movq	_DP_TP_CTL_ENABLE@GOTPCREL(%rip), %rcx
	movq	_DP_TP_CTL_LINK_TRAIN_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movq	_DP_TP_CTL_LINK_TRAIN_PAT1@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	%r13d, %edi
	callq	_DP_TP_CTL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	testl	%r12d, %r15d
	je	LBB0_4
## %bb.3:
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movl	%r13d, %esi
	callq	_intel_wait_ddi_buf_idle
LBB0_4:
	movq	_INTEL_OUTPUT_EDP@GOTPCREL(%rip), %rax
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	cmpl	(%rax), %ecx
	jne	LBB0_6
## %bb.5:
	addq	$8, %r14
	movq	%r14, %rdi
	callq	_enc_to_intel_dp
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_ironlake_edp_panel_vdd_on
	movq	%rbx, %rdi
	callq	_ironlake_edp_panel_off
LBB0_6:
	movl	%r13d, %edi
	callq	_PORT_CLK_SEL
	movq	_PORT_CLK_SEL_NONE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_I915_WRITE                     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DDI_BUF_CTL_ENABLE,4,2         ## @DDI_BUF_CTL_ENABLE
	.comm	_DP_TP_CTL_ENABLE,4,2           ## @DP_TP_CTL_ENABLE
	.comm	_DP_TP_CTL_LINK_TRAIN_MASK,4,2  ## @DP_TP_CTL_LINK_TRAIN_MASK
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT1,4,2  ## @DP_TP_CTL_LINK_TRAIN_PAT1
	.comm	_INTEL_OUTPUT_EDP,4,2           ## @INTEL_OUTPUT_EDP
	.comm	_PORT_CLK_SEL_NONE,4,2          ## @PORT_CLK_SEL_NONE
	.no_dead_strip	_intel_ddi_post_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_ddi_post_disable
_intel_ddi_post_disable:                ; @intel_ddi_post_disable
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x0
	mov	x20, x0
	ldr	x8, [x20, #8]!
	ldr	x21, [x8]
	bl	_intel_ddi_get_encoder_port
	mov	x19, x0
	ldr	w23, [x22]
	bl	_DDI_BUF_CTL
	bl	_I915_READ
Lloh0:
	adrp	x8, _DDI_BUF_CTL_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DDI_BUF_CTL_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	ands	w24, w8, w0
	b.eq	LBB0_2
; %bb.1:
	bic	w22, w0, w8
	mov	x0, x19
	bl	_DDI_BUF_CTL
	mov	x1, x22
	bl	_I915_WRITE
LBB0_2:
	mov	x0, x19
	bl	_DP_TP_CTL
	bl	_I915_READ
Lloh3:
	adrp	x8, _DP_TP_CTL_ENABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DP_TP_CTL_ENABLE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _DP_TP_CTL_LINK_TRAIN_MASK@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DP_TP_CTL_LINK_TRAIN_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w8, w0, w8
Lloh9:
	adrp	x9, _DP_TP_CTL_LINK_TRAIN_PAT1@GOTPAGE
Lloh10:
	ldr	x9, [x9, _DP_TP_CTL_LINK_TRAIN_PAT1@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w22, w8, w9
	mov	x0, x19
	bl	_DP_TP_CTL
	mov	x1, x22
	bl	_I915_WRITE
	cbz	w24, LBB0_4
; %bb.3:
	mov	x0, x21
	mov	x1, x19
	bl	_intel_wait_ddi_buf_idle
LBB0_4:
Lloh12:
	adrp	x8, _INTEL_OUTPUT_EDP@GOTPAGE
Lloh13:
	ldr	x8, [x8, _INTEL_OUTPUT_EDP@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	cmp	w23, w8
	b.ne	LBB0_6
; %bb.5:
	mov	x0, x20
	bl	_enc_to_intel_dp
	mov	x20, x0
	bl	_ironlake_edp_panel_vdd_on
	mov	x0, x20
	bl	_ironlake_edp_panel_off
LBB0_6:
	mov	x0, x19
	bl	_PORT_CLK_SEL
Lloh15:
	adrp	x8, _PORT_CLK_SEL_NONE@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PORT_CLK_SEL_NONE@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_I915_WRITE
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_DDI_BUF_CTL_ENABLE,4,2         ; @DDI_BUF_CTL_ENABLE
	.comm	_DP_TP_CTL_ENABLE,4,2           ; @DP_TP_CTL_ENABLE
	.comm	_DP_TP_CTL_LINK_TRAIN_MASK,4,2  ; @DP_TP_CTL_LINK_TRAIN_MASK
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT1,4,2  ; @DP_TP_CTL_LINK_TRAIN_PAT1
	.comm	_INTEL_OUTPUT_EDP,4,2           ; @INTEL_OUTPUT_EDP
	.comm	_PORT_CLK_SEL_NONE,4,2          ; @PORT_CLK_SEL_NONE
	.no_dead_strip	_intel_ddi_post_disable
.subsections_via_symbols
