	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_fdi_disable          ## -- Begin function intel_ddi_fdi_disable
	.p2align	4, 0x90
_intel_ddi_fdi_disable:                 ## @intel_ddi_fdi_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_intel_ddi_get_crtc_encoder
	movq	%rax, %rdi
	callq	_intel_ddi_post_disable
	movq	__FDI_RXA_CTL@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	callq	_I915_READ
	movq	_FDI_RX_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r14), %edi
	callq	_I915_WRITE
	movq	__FDI_RXA_MISC@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_I915_READ
	movq	_FDI_RX_PWRDN_LANE1_MASK@GOTPCREL(%rip), %rcx
	movq	_FDI_RX_PWRDN_LANE0_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	$2, %edi
	callq	_FDI_RX_PWRDN_LANE1_VAL
	movl	%eax, %r12d
	movl	$2, %edi
	callq	_FDI_RX_PWRDN_LANE0_VAL
	orl	%eax, %r12d
	orl	%ebx, %r12d
	movl	(%r15), %edi
	movl	%r12d, %esi
	callq	_I915_WRITE
	movl	(%r14), %edi
	callq	_I915_READ
	movq	_FDI_PCDCLK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r14), %edi
	callq	_I915_WRITE
	movl	(%r14), %edi
	callq	_I915_READ
	movq	_FDI_RX_PLL_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r14), %edi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_I915_WRITE                     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	__FDI_RXA_CTL,4,2               ## @_FDI_RXA_CTL
	.comm	_FDI_RX_ENABLE,4,2              ## @FDI_RX_ENABLE
	.comm	__FDI_RXA_MISC,4,2              ## @_FDI_RXA_MISC
	.comm	_FDI_RX_PWRDN_LANE1_MASK,4,2    ## @FDI_RX_PWRDN_LANE1_MASK
	.comm	_FDI_RX_PWRDN_LANE0_MASK,4,2    ## @FDI_RX_PWRDN_LANE0_MASK
	.comm	_FDI_PCDCLK,4,2                 ## @FDI_PCDCLK
	.comm	_FDI_RX_PLL_ENABLE,4,2          ## @FDI_RX_PLL_ENABLE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_fdi_disable          ; -- Begin function intel_ddi_fdi_disable
	.p2align	2
_intel_ddi_fdi_disable:                 ; @intel_ddi_fdi_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_intel_ddi_get_crtc_encoder
	bl	_intel_ddi_post_disable
Lloh0:
	adrp	x20, __FDI_RXA_CTL@GOTPAGE
Lloh1:
	ldr	x20, [x20, __FDI_RXA_CTL@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	_I915_READ
Lloh2:
	adrp	x8, _FDI_RX_ENABLE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _FDI_RX_ENABLE@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w0, [x20]
	bl	_I915_WRITE
Lloh5:
	adrp	x21, __FDI_RXA_MISC@GOTPAGE
Lloh6:
	ldr	x21, [x21, __FDI_RXA_MISC@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_I915_READ
Lloh7:
	adrp	x8, _FDI_RX_PWRDN_LANE1_MASK@GOTPAGE
Lloh8:
	ldr	x8, [x8, _FDI_RX_PWRDN_LANE1_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
Lloh10:
	adrp	x9, _FDI_RX_PWRDN_LANE0_MASK@GOTPAGE
Lloh11:
	ldr	x9, [x9, _FDI_RX_PWRDN_LANE0_MASK@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w22, w0, w8
	mov	w0, #2
	bl	_FDI_RX_PWRDN_LANE1_VAL
	mov	x19, x0
	mov	w0, #2
	bl	_FDI_RX_PWRDN_LANE0_VAL
	orr	w8, w0, w19
	orr	w1, w8, w22
	ldr	w0, [x21]
	bl	_I915_WRITE
	ldr	w0, [x20]
	bl	_I915_READ
Lloh13:
	adrp	x8, _FDI_PCDCLK@GOTPAGE
Lloh14:
	ldr	x8, [x8, _FDI_PCDCLK@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w0, [x20]
	bl	_I915_WRITE
	ldr	w0, [x20]
	bl	_I915_READ
Lloh16:
	adrp	x8, _FDI_RX_PLL_ENABLE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _FDI_RX_PLL_ENABLE@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w0, [x20]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_I915_WRITE
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	__FDI_RXA_CTL,4,2               ; @_FDI_RXA_CTL
	.comm	_FDI_RX_ENABLE,4,2              ; @FDI_RX_ENABLE
	.comm	__FDI_RXA_MISC,4,2              ; @_FDI_RXA_MISC
	.comm	_FDI_RX_PWRDN_LANE1_MASK,4,2    ; @FDI_RX_PWRDN_LANE1_MASK
	.comm	_FDI_RX_PWRDN_LANE0_MASK,4,2    ; @FDI_RX_PWRDN_LANE0_MASK
	.comm	_FDI_PCDCLK,4,2                 ; @FDI_PCDCLK
	.comm	_FDI_RX_PLL_ENABLE,4,2          ; @FDI_RX_PLL_ENABLE
.subsections_via_symbols
