	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nv_save_state_ext
_nv_save_state_ext:                     ## @nv_save_state_ext
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rbx
	movl	%esi, %r14d
	movq	%rdi, %r13
	callq	_nouveau_drm
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	(%rbx), %rax
	movslq	%r14d, %rbx
	leaq	(%rbx,%rbx,8), %r15
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	leaq	(%rax,%r15,8), %r12
	movq	_NV_CIO_CRE_LCD__INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_RPC0_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_RPC1_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_LSR_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_PIXEL_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_HEB__INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_ENH_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_FF_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_FFLWM__INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_21@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movq	%r12, %rdx
	callq	_rd_cio_state
	movl	(%rbx), %edi
	callq	_nv_device
	movq	(%rax), %rax
	movq	_NV_20@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_2
## %bb.1:
	movq	_NV_CIO_CRE_47@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
LBB0_2:
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	movl	(%rbx), %edi
	callq	_nv_device
	movq	(%rax), %rax
	movq	_NV_30@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_4
## %bb.3:
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	movl	$159, %ecx
	callq	_rd_cio_state
LBB0_4:
	movq	_NV_CIO_CRE_49@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_HCUR_ADDR0_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_HCUR_ADDR1_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_HCUR_ADDR2_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_ILACE__INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, -72(%rbp)                 ## 8-byte Spill
	movq	%r12, %rdx
	callq	_rd_cio_state
	movl	(%rbx), %edi
	callq	_nv_device
	movq	(%rax), %rax
	movq	_NV_10@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movq	%rbx, %r12
	jl	LBB0_12
## %bb.5:
	movq	_NV_PCRTC_830@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_NVReadCRTC
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	movq	%rax, 64(%rbx,%r15,8)
	movq	_NV_PCRTC_834@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_NVReadCRTC
	movq	%rax, 56(%rbx,%r15,8)
	movl	(%r12), %edi
	callq	_nv_device
	movq	(%rax), %rax
	movq	_NV_30@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_7
## %bb.6:
	movq	_NV_PCRTC_GPIO_EXT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_NVReadCRTC
	movq	%rax, 48(%rbx,%r15,8)
LBB0_7:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edi
	callq	_nv_device
	movq	(%rax), %rax
	movq	_NV_40@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_9
## %bb.8:
	movq	_NV_PCRTC_850@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_NVReadCRTC
	movq	%rax, 40(%rbx,%r15,8)
LBB0_9:
	movq	%r13, %rdi
	callq	_nv_two_heads
	testq	%rax, %rax
	je	LBB0_11
## %bb.10:
	movq	_NV_PCRTC_ENGINE_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_NVReadCRTC
	movq	%rax, 32(%rbx,%r15,8)
LBB0_11:
	movq	_NV_PCRTC_CURSOR_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_NVReadCRTC
	movq	%rax, 24(%rbx,%r15,8)
	movq	-48(%rbp), %r12                 ## 8-byte Reload
LBB0_12:
	movq	_NV_PCRTC_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_NVReadCRTC
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movq	%rax, 16(%r15,%rcx,8)
	movq	_NV_CIO_CRE_SCRATCH3__INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_SCRATCH4__INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%rbx, %rdx
	callq	_rd_cio_state
	movl	(%r12), %edi
	movq	%rbx, %r12
	callq	_nv_device
	movq	(%rax), %rax
	movq	_NV_10@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_14
## %bb.13:
	movq	_NV_CIO_CRE_EBR_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_CSB@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_4B@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_TVOUT_LATENCY@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
LBB0_14:
	movq	%r13, %rdi
	callq	_nv_gf4_disp_arch
	testq	%rax, %rax
	je	LBB0_16
## %bb.15:
	movq	_NV_CIO_CRE_42@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_53@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_54@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	%r13, %rdi
	movl	%r14d, %esi
	xorl	%edx, %edx
	callq	_NVReadVgaCrtc5758
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, (%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$1, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 4(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$2, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 8(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$3, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 12(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$4, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 16(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$5, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 20(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$6, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 24(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$7, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 28(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$8, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 32(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$9, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 36(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$10, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 40(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$11, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 44(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$12, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 48(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$13, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 52(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$14, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 56(%rcx)
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$15, %edx
	callq	_NVReadVgaCrtc5758
	movq	8(%r15,%rbx,8), %rcx
	movl	%eax, 60(%rcx)
	movq	_NV_CIO_CRE_59@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_5B@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_85@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
	movq	_NV_CIO_CRE_86@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	callq	_rd_cio_state
LBB0_16:
	movq	_NV_PCRTC_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_NVReadCRTC
	movq	%rax, (%r12)
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NV_CIO_CRE_LCD__INDEX,4,2      ## @NV_CIO_CRE_LCD__INDEX
	.comm	_NV_CIO_CRE_RPC0_INDEX,4,2      ## @NV_CIO_CRE_RPC0_INDEX
	.comm	_NV_CIO_CRE_RPC1_INDEX,4,2      ## @NV_CIO_CRE_RPC1_INDEX
	.comm	_NV_CIO_CRE_LSR_INDEX,4,2       ## @NV_CIO_CRE_LSR_INDEX
	.comm	_NV_CIO_CRE_PIXEL_INDEX,4,2     ## @NV_CIO_CRE_PIXEL_INDEX
	.comm	_NV_CIO_CRE_HEB__INDEX,4,2      ## @NV_CIO_CRE_HEB__INDEX
	.comm	_NV_CIO_CRE_ENH_INDEX,4,2       ## @NV_CIO_CRE_ENH_INDEX
	.comm	_NV_CIO_CRE_FF_INDEX,4,2        ## @NV_CIO_CRE_FF_INDEX
	.comm	_NV_CIO_CRE_FFLWM__INDEX,4,2    ## @NV_CIO_CRE_FFLWM__INDEX
	.comm	_NV_CIO_CRE_21,4,2              ## @NV_CIO_CRE_21
	.comm	_NV_20,8,3                      ## @NV_20
	.comm	_NV_CIO_CRE_47,4,2              ## @NV_CIO_CRE_47
	.comm	_NV_30,8,3                      ## @NV_30
	.comm	_NV_CIO_CRE_49,4,2              ## @NV_CIO_CRE_49
	.comm	_NV_CIO_CRE_HCUR_ADDR0_INDEX,4,2 ## @NV_CIO_CRE_HCUR_ADDR0_INDEX
	.comm	_NV_CIO_CRE_HCUR_ADDR1_INDEX,4,2 ## @NV_CIO_CRE_HCUR_ADDR1_INDEX
	.comm	_NV_CIO_CRE_HCUR_ADDR2_INDEX,4,2 ## @NV_CIO_CRE_HCUR_ADDR2_INDEX
	.comm	_NV_CIO_CRE_ILACE__INDEX,4,2    ## @NV_CIO_CRE_ILACE__INDEX
	.comm	_NV_10,8,3                      ## @NV_10
	.comm	_NV_PCRTC_830,4,2               ## @NV_PCRTC_830
	.comm	_NV_PCRTC_834,4,2               ## @NV_PCRTC_834
	.comm	_NV_PCRTC_GPIO_EXT,4,2          ## @NV_PCRTC_GPIO_EXT
	.comm	_NV_40,8,3                      ## @NV_40
	.comm	_NV_PCRTC_850,4,2               ## @NV_PCRTC_850
	.comm	_NV_PCRTC_ENGINE_CTRL,4,2       ## @NV_PCRTC_ENGINE_CTRL
	.comm	_NV_PCRTC_CURSOR_CONFIG,4,2     ## @NV_PCRTC_CURSOR_CONFIG
	.comm	_NV_PCRTC_CONFIG,4,2            ## @NV_PCRTC_CONFIG
	.comm	_NV_CIO_CRE_SCRATCH3__INDEX,4,2 ## @NV_CIO_CRE_SCRATCH3__INDEX
	.comm	_NV_CIO_CRE_SCRATCH4__INDEX,4,2 ## @NV_CIO_CRE_SCRATCH4__INDEX
	.comm	_NV_CIO_CRE_EBR_INDEX,4,2       ## @NV_CIO_CRE_EBR_INDEX
	.comm	_NV_CIO_CRE_CSB,4,2             ## @NV_CIO_CRE_CSB
	.comm	_NV_CIO_CRE_4B,4,2              ## @NV_CIO_CRE_4B
	.comm	_NV_CIO_CRE_TVOUT_LATENCY,4,2   ## @NV_CIO_CRE_TVOUT_LATENCY
	.comm	_NV_CIO_CRE_42,4,2              ## @NV_CIO_CRE_42
	.comm	_NV_CIO_CRE_53,4,2              ## @NV_CIO_CRE_53
	.comm	_NV_CIO_CRE_54,4,2              ## @NV_CIO_CRE_54
	.comm	_NV_CIO_CRE_59,4,2              ## @NV_CIO_CRE_59
	.comm	_NV_CIO_CRE_5B,4,2              ## @NV_CIO_CRE_5B
	.comm	_NV_CIO_CRE_85,4,2              ## @NV_CIO_CRE_85
	.comm	_NV_CIO_CRE_86,4,2              ## @NV_CIO_CRE_86
	.comm	_NV_PCRTC_START,4,2             ## @NV_PCRTC_START
	.no_dead_strip	_nv_save_state_ext
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nv_save_state_ext
_nv_save_state_ext:                     ; @nv_save_state_ext
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x2
	mov	x19, x1
	mov	x20, x0
	bl	_nouveau_drm
	mov	x22, x0
	ldr	x23, [x21]
	mov	w8, #72
	smaddl	x21, w19, w8, x23
Lloh0:
	adrp	x8, _NV_CIO_CRE_LCD__INDEX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NV_CIO_CRE_LCD__INDEX@GOTPAGEOFF]
Lloh2:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh3:
	adrp	x8, _NV_CIO_CRE_RPC0_INDEX@GOTPAGE
Lloh4:
	ldr	x8, [x8, _NV_CIO_CRE_RPC0_INDEX@GOTPAGEOFF]
Lloh5:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh6:
	adrp	x8, _NV_CIO_CRE_RPC1_INDEX@GOTPAGE
Lloh7:
	ldr	x8, [x8, _NV_CIO_CRE_RPC1_INDEX@GOTPAGEOFF]
Lloh8:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh9:
	adrp	x8, _NV_CIO_CRE_LSR_INDEX@GOTPAGE
Lloh10:
	ldr	x8, [x8, _NV_CIO_CRE_LSR_INDEX@GOTPAGEOFF]
Lloh11:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh12:
	adrp	x8, _NV_CIO_CRE_PIXEL_INDEX@GOTPAGE
Lloh13:
	ldr	x8, [x8, _NV_CIO_CRE_PIXEL_INDEX@GOTPAGEOFF]
Lloh14:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh15:
	adrp	x8, _NV_CIO_CRE_HEB__INDEX@GOTPAGE
Lloh16:
	ldr	x8, [x8, _NV_CIO_CRE_HEB__INDEX@GOTPAGEOFF]
Lloh17:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh18:
	adrp	x8, _NV_CIO_CRE_ENH_INDEX@GOTPAGE
Lloh19:
	ldr	x8, [x8, _NV_CIO_CRE_ENH_INDEX@GOTPAGEOFF]
Lloh20:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh21:
	adrp	x8, _NV_CIO_CRE_FF_INDEX@GOTPAGE
Lloh22:
	ldr	x8, [x8, _NV_CIO_CRE_FF_INDEX@GOTPAGEOFF]
Lloh23:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh24:
	adrp	x8, _NV_CIO_CRE_FFLWM__INDEX@GOTPAGE
Lloh25:
	ldr	x8, [x8, _NV_CIO_CRE_FFLWM__INDEX@GOTPAGEOFF]
Lloh26:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh27:
	adrp	x8, _NV_CIO_CRE_21@GOTPAGE
Lloh28:
	ldr	x8, [x8, _NV_CIO_CRE_21@GOTPAGEOFF]
Lloh29:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
	ldr	w0, [x22]
	bl	_nv_device
	ldr	x8, [x0]
Lloh30:
	adrp	x9, _NV_20@GOTPAGE
Lloh31:
	ldr	x9, [x9, _NV_20@GOTPAGEOFF]
Lloh32:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_2
; %bb.1:
Lloh33:
	adrp	x8, _NV_CIO_CRE_47@GOTPAGE
Lloh34:
	ldr	x8, [x8, _NV_CIO_CRE_47@GOTPAGEOFF]
Lloh35:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
LBB0_2:
	ldr	w0, [x22]
	bl	_nv_device
	ldr	x8, [x0]
Lloh36:
	adrp	x26, _NV_30@GOTPAGE
Lloh37:
	ldr	x26, [x26, _NV_30@GOTPAGEOFF]
	ldr	x9, [x26]
	cmp	x8, x9
	b.lt	LBB0_4
; %bb.3:
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	mov	w3, #159
	bl	_rd_cio_state
LBB0_4:
	sxtw	x24, w19
Lloh38:
	adrp	x8, _NV_CIO_CRE_49@GOTPAGE
Lloh39:
	ldr	x8, [x8, _NV_CIO_CRE_49@GOTPAGEOFF]
Lloh40:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh41:
	adrp	x8, _NV_CIO_CRE_HCUR_ADDR0_INDEX@GOTPAGE
Lloh42:
	ldr	x8, [x8, _NV_CIO_CRE_HCUR_ADDR0_INDEX@GOTPAGEOFF]
Lloh43:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh44:
	adrp	x8, _NV_CIO_CRE_HCUR_ADDR1_INDEX@GOTPAGE
Lloh45:
	ldr	x8, [x8, _NV_CIO_CRE_HCUR_ADDR1_INDEX@GOTPAGEOFF]
Lloh46:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh47:
	adrp	x8, _NV_CIO_CRE_HCUR_ADDR2_INDEX@GOTPAGE
Lloh48:
	ldr	x8, [x8, _NV_CIO_CRE_HCUR_ADDR2_INDEX@GOTPAGEOFF]
Lloh49:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh50:
	adrp	x8, _NV_CIO_CRE_ILACE__INDEX@GOTPAGE
Lloh51:
	ldr	x8, [x8, _NV_CIO_CRE_ILACE__INDEX@GOTPAGEOFF]
Lloh52:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
	ldr	w0, [x22]
	bl	_nv_device
	ldr	x8, [x0]
Lloh53:
	adrp	x25, _NV_10@GOTPAGE
Lloh54:
	ldr	x25, [x25, _NV_10@GOTPAGEOFF]
	ldr	x9, [x25]
	cmp	x8, x9
	b.lt	LBB0_12
; %bb.5:
Lloh55:
	adrp	x8, _NV_PCRTC_830@GOTPAGE
Lloh56:
	ldr	x8, [x8, _NV_PCRTC_830@GOTPAGEOFF]
Lloh57:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_NVReadCRTC
	mov	w8, #72
	madd	x27, x24, x8, x23
	str	x0, [x27, #64]
Lloh58:
	adrp	x8, _NV_PCRTC_834@GOTPAGE
Lloh59:
	ldr	x8, [x8, _NV_PCRTC_834@GOTPAGEOFF]
Lloh60:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_NVReadCRTC
	str	x0, [x27, #56]
	ldr	w0, [x22]
	bl	_nv_device
	ldr	x8, [x0]
	ldr	x9, [x26]
	cmp	x8, x9
	b.lt	LBB0_7
; %bb.6:
Lloh61:
	adrp	x8, _NV_PCRTC_GPIO_EXT@GOTPAGE
Lloh62:
	ldr	x8, [x8, _NV_PCRTC_GPIO_EXT@GOTPAGEOFF]
Lloh63:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_NVReadCRTC
	mov	w8, #72
	madd	x8, x24, x8, x23
	str	x0, [x8, #48]
LBB0_7:
	ldr	w0, [x22]
	bl	_nv_device
	ldr	x8, [x0]
Lloh64:
	adrp	x9, _NV_40@GOTPAGE
Lloh65:
	ldr	x9, [x9, _NV_40@GOTPAGEOFF]
Lloh66:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_9
; %bb.8:
Lloh67:
	adrp	x8, _NV_PCRTC_850@GOTPAGE
Lloh68:
	ldr	x8, [x8, _NV_PCRTC_850@GOTPAGEOFF]
Lloh69:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_NVReadCRTC
	mov	w8, #72
	madd	x8, x24, x8, x23
	str	x0, [x8, #40]
LBB0_9:
	mov	x0, x20
	bl	_nv_two_heads
	cbz	x0, LBB0_11
; %bb.10:
Lloh70:
	adrp	x8, _NV_PCRTC_ENGINE_CTRL@GOTPAGE
Lloh71:
	ldr	x8, [x8, _NV_PCRTC_ENGINE_CTRL@GOTPAGEOFF]
Lloh72:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_NVReadCRTC
	mov	w8, #72
	madd	x8, x24, x8, x23
	str	x0, [x8, #32]
LBB0_11:
Lloh73:
	adrp	x8, _NV_PCRTC_CURSOR_CONFIG@GOTPAGE
Lloh74:
	ldr	x8, [x8, _NV_PCRTC_CURSOR_CONFIG@GOTPAGEOFF]
Lloh75:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_NVReadCRTC
	mov	w8, #72
	madd	x8, x24, x8, x23
	str	x0, [x8, #24]
LBB0_12:
Lloh76:
	adrp	x8, _NV_PCRTC_CONFIG@GOTPAGE
Lloh77:
	ldr	x8, [x8, _NV_PCRTC_CONFIG@GOTPAGEOFF]
Lloh78:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_NVReadCRTC
	mov	w8, #72
	madd	x8, x24, x8, x23
	str	x0, [x8, #16]
Lloh79:
	adrp	x8, _NV_CIO_CRE_SCRATCH3__INDEX@GOTPAGE
Lloh80:
	ldr	x8, [x8, _NV_CIO_CRE_SCRATCH3__INDEX@GOTPAGEOFF]
Lloh81:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh82:
	adrp	x8, _NV_CIO_CRE_SCRATCH4__INDEX@GOTPAGE
Lloh83:
	ldr	x8, [x8, _NV_CIO_CRE_SCRATCH4__INDEX@GOTPAGEOFF]
Lloh84:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
	ldr	w0, [x22]
	bl	_nv_device
	ldr	x8, [x0]
	ldr	x9, [x25]
	cmp	x8, x9
	b.lt	LBB0_14
; %bb.13:
Lloh85:
	adrp	x8, _NV_CIO_CRE_EBR_INDEX@GOTPAGE
Lloh86:
	ldr	x8, [x8, _NV_CIO_CRE_EBR_INDEX@GOTPAGEOFF]
Lloh87:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh88:
	adrp	x8, _NV_CIO_CRE_CSB@GOTPAGE
Lloh89:
	ldr	x8, [x8, _NV_CIO_CRE_CSB@GOTPAGEOFF]
Lloh90:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh91:
	adrp	x8, _NV_CIO_CRE_4B@GOTPAGE
Lloh92:
	ldr	x8, [x8, _NV_CIO_CRE_4B@GOTPAGEOFF]
Lloh93:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh94:
	adrp	x8, _NV_CIO_CRE_TVOUT_LATENCY@GOTPAGE
Lloh95:
	ldr	x8, [x8, _NV_CIO_CRE_TVOUT_LATENCY@GOTPAGEOFF]
Lloh96:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
LBB0_14:
	mov	x0, x20
	bl	_nv_gf4_disp_arch
	cbz	x0, LBB0_16
; %bb.15:
Lloh97:
	adrp	x8, _NV_CIO_CRE_42@GOTPAGE
Lloh98:
	ldr	x8, [x8, _NV_CIO_CRE_42@GOTPAGEOFF]
Lloh99:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh100:
	adrp	x8, _NV_CIO_CRE_53@GOTPAGE
Lloh101:
	ldr	x8, [x8, _NV_CIO_CRE_53@GOTPAGEOFF]
Lloh102:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh103:
	adrp	x8, _NV_CIO_CRE_54@GOTPAGE
Lloh104:
	ldr	x8, [x8, _NV_CIO_CRE_54@GOTPAGEOFF]
Lloh105:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
	mov	w8, #72
	madd	x22, x24, x8, x23
	mov	x0, x20
	mov	x1, x19
	mov	w2, #0
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #1
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #4]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #2
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #8]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #3
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #12]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #4
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #16]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #5
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #20]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #6
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #24]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #7
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #28]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #8
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #32]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #9
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #36]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #10
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #40]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #11
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #44]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #12
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #48]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #13
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #52]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #14
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #56]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #15
	bl	_NVReadVgaCrtc5758
	ldr	x8, [x22, #8]
	str	w0, [x8, #60]
Lloh106:
	adrp	x8, _NV_CIO_CRE_59@GOTPAGE
Lloh107:
	ldr	x8, [x8, _NV_CIO_CRE_59@GOTPAGEOFF]
Lloh108:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh109:
	adrp	x8, _NV_CIO_CRE_5B@GOTPAGE
Lloh110:
	ldr	x8, [x8, _NV_CIO_CRE_5B@GOTPAGEOFF]
Lloh111:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh112:
	adrp	x8, _NV_CIO_CRE_85@GOTPAGE
Lloh113:
	ldr	x8, [x8, _NV_CIO_CRE_85@GOTPAGEOFF]
Lloh114:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
Lloh115:
	adrp	x8, _NV_CIO_CRE_86@GOTPAGE
Lloh116:
	ldr	x8, [x8, _NV_CIO_CRE_86@GOTPAGEOFF]
Lloh117:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_rd_cio_state
LBB0_16:
Lloh118:
	adrp	x8, _NV_PCRTC_START@GOTPAGE
Lloh119:
	ldr	x8, [x8, _NV_PCRTC_START@GOTPAGEOFF]
Lloh120:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_NVReadCRTC
	str	x0, [x21]
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh115, Lloh116, Lloh117
	.loh AdrpLdrGotLdr	Lloh112, Lloh113, Lloh114
	.loh AdrpLdrGotLdr	Lloh109, Lloh110, Lloh111
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh118, Lloh119, Lloh120
	.cfi_endproc
                                        ; -- End function
	.comm	_NV_CIO_CRE_LCD__INDEX,4,2      ; @NV_CIO_CRE_LCD__INDEX
	.comm	_NV_CIO_CRE_RPC0_INDEX,4,2      ; @NV_CIO_CRE_RPC0_INDEX
	.comm	_NV_CIO_CRE_RPC1_INDEX,4,2      ; @NV_CIO_CRE_RPC1_INDEX
	.comm	_NV_CIO_CRE_LSR_INDEX,4,2       ; @NV_CIO_CRE_LSR_INDEX
	.comm	_NV_CIO_CRE_PIXEL_INDEX,4,2     ; @NV_CIO_CRE_PIXEL_INDEX
	.comm	_NV_CIO_CRE_HEB__INDEX,4,2      ; @NV_CIO_CRE_HEB__INDEX
	.comm	_NV_CIO_CRE_ENH_INDEX,4,2       ; @NV_CIO_CRE_ENH_INDEX
	.comm	_NV_CIO_CRE_FF_INDEX,4,2        ; @NV_CIO_CRE_FF_INDEX
	.comm	_NV_CIO_CRE_FFLWM__INDEX,4,2    ; @NV_CIO_CRE_FFLWM__INDEX
	.comm	_NV_CIO_CRE_21,4,2              ; @NV_CIO_CRE_21
	.comm	_NV_20,8,3                      ; @NV_20
	.comm	_NV_CIO_CRE_47,4,2              ; @NV_CIO_CRE_47
	.comm	_NV_30,8,3                      ; @NV_30
	.comm	_NV_CIO_CRE_49,4,2              ; @NV_CIO_CRE_49
	.comm	_NV_CIO_CRE_HCUR_ADDR0_INDEX,4,2 ; @NV_CIO_CRE_HCUR_ADDR0_INDEX
	.comm	_NV_CIO_CRE_HCUR_ADDR1_INDEX,4,2 ; @NV_CIO_CRE_HCUR_ADDR1_INDEX
	.comm	_NV_CIO_CRE_HCUR_ADDR2_INDEX,4,2 ; @NV_CIO_CRE_HCUR_ADDR2_INDEX
	.comm	_NV_CIO_CRE_ILACE__INDEX,4,2    ; @NV_CIO_CRE_ILACE__INDEX
	.comm	_NV_10,8,3                      ; @NV_10
	.comm	_NV_PCRTC_830,4,2               ; @NV_PCRTC_830
	.comm	_NV_PCRTC_834,4,2               ; @NV_PCRTC_834
	.comm	_NV_PCRTC_GPIO_EXT,4,2          ; @NV_PCRTC_GPIO_EXT
	.comm	_NV_40,8,3                      ; @NV_40
	.comm	_NV_PCRTC_850,4,2               ; @NV_PCRTC_850
	.comm	_NV_PCRTC_ENGINE_CTRL,4,2       ; @NV_PCRTC_ENGINE_CTRL
	.comm	_NV_PCRTC_CURSOR_CONFIG,4,2     ; @NV_PCRTC_CURSOR_CONFIG
	.comm	_NV_PCRTC_CONFIG,4,2            ; @NV_PCRTC_CONFIG
	.comm	_NV_CIO_CRE_SCRATCH3__INDEX,4,2 ; @NV_CIO_CRE_SCRATCH3__INDEX
	.comm	_NV_CIO_CRE_SCRATCH4__INDEX,4,2 ; @NV_CIO_CRE_SCRATCH4__INDEX
	.comm	_NV_CIO_CRE_EBR_INDEX,4,2       ; @NV_CIO_CRE_EBR_INDEX
	.comm	_NV_CIO_CRE_CSB,4,2             ; @NV_CIO_CRE_CSB
	.comm	_NV_CIO_CRE_4B,4,2              ; @NV_CIO_CRE_4B
	.comm	_NV_CIO_CRE_TVOUT_LATENCY,4,2   ; @NV_CIO_CRE_TVOUT_LATENCY
	.comm	_NV_CIO_CRE_42,4,2              ; @NV_CIO_CRE_42
	.comm	_NV_CIO_CRE_53,4,2              ; @NV_CIO_CRE_53
	.comm	_NV_CIO_CRE_54,4,2              ; @NV_CIO_CRE_54
	.comm	_NV_CIO_CRE_59,4,2              ; @NV_CIO_CRE_59
	.comm	_NV_CIO_CRE_5B,4,2              ; @NV_CIO_CRE_5B
	.comm	_NV_CIO_CRE_85,4,2              ; @NV_CIO_CRE_85
	.comm	_NV_CIO_CRE_86,4,2              ; @NV_CIO_CRE_86
	.comm	_NV_PCRTC_START,4,2             ; @NV_PCRTC_START
	.no_dead_strip	_nv_save_state_ext
.subsections_via_symbols
