	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_emit_post_sync_nonzero_flush
_intel_emit_post_sync_nonzero_flush:    ## @intel_emit_post_sync_nonzero_flush
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movl	(%rax), %r14d
	movl	$6, %esi
	callq	_intel_ring_begin
	testl	%eax, %eax
	jne	LBB0_3
## %bb.1:
	subl	$-128, %r14d
	movl	$5, %edi
	callq	_GFX_OP_PIPE_CONTROL
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_intel_ring_emit
	movq	_PIPE_CONTROL_CS_STALL@GOTPCREL(%rip), %rax
	movq	_PIPE_CONTROL_STALL_AT_SCOREBOARD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_ring_emit
	movq	_PIPE_CONTROL_GLOBAL_GTT@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	orl	%r14d, %esi
	movq	%rbx, %rdi
	callq	_intel_ring_emit
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_intel_ring_emit
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_intel_ring_emit
	movq	_MI_NOOP@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_intel_ring_emit
	movq	%rbx, %rdi
	callq	_intel_ring_advance
	movq	%rbx, %rdi
	movl	$6, %esi
	callq	_intel_ring_begin
	testl	%eax, %eax
	jne	LBB0_3
## %bb.2:
	movl	$5, %edi
	callq	_GFX_OP_PIPE_CONTROL
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_intel_ring_emit
	movq	_PIPE_CONTROL_QW_WRITE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_ring_emit
	orl	(%r15), %r14d
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_intel_ring_emit
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_intel_ring_emit
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_intel_ring_emit
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_intel_ring_emit
	movq	%rbx, %rdi
	callq	_intel_ring_advance
	xorl	%eax, %eax
LBB0_3:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PIPE_CONTROL_CS_STALL,4,2      ## @PIPE_CONTROL_CS_STALL
	.comm	_PIPE_CONTROL_STALL_AT_SCOREBOARD,4,2 ## @PIPE_CONTROL_STALL_AT_SCOREBOARD
	.comm	_PIPE_CONTROL_GLOBAL_GTT,4,2    ## @PIPE_CONTROL_GLOBAL_GTT
	.comm	_MI_NOOP,4,2                    ## @MI_NOOP
	.comm	_PIPE_CONTROL_QW_WRITE,4,2      ## @PIPE_CONTROL_QW_WRITE
	.no_dead_strip	_intel_emit_post_sync_nonzero_flush
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_emit_post_sync_nonzero_flush
_intel_emit_post_sync_nonzero_flush:    ; @intel_emit_post_sync_nonzero_flush
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0]
	ldr	w20, [x8]
	mov	w1, #6
	bl	_intel_ring_begin
	cbnz	w0, LBB0_3
; %bb.1:
	add	w20, w20, #128
	mov	w0, #5
	bl	_GFX_OP_PIPE_CONTROL
	mov	x1, x0
	mov	x0, x19
	bl	_intel_ring_emit
Lloh0:
	adrp	x8, _PIPE_CONTROL_CS_STALL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PIPE_CONTROL_CS_STALL@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _PIPE_CONTROL_STALL_AT_SCOREBOARD@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PIPE_CONTROL_STALL_AT_SCOREBOARD@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w1, w9, w8
	mov	x0, x19
	bl	_intel_ring_emit
Lloh6:
	adrp	x21, _PIPE_CONTROL_GLOBAL_GTT@GOTPAGE
Lloh7:
	ldr	x21, [x21, _PIPE_CONTROL_GLOBAL_GTT@GOTPAGEOFF]
	ldr	w8, [x21]
	orr	w1, w8, w20
	mov	x0, x19
	bl	_intel_ring_emit
	mov	x0, x19
	mov	w1, #0
	bl	_intel_ring_emit
	mov	x0, x19
	mov	w1, #0
	bl	_intel_ring_emit
Lloh8:
	adrp	x22, _MI_NOOP@GOTPAGE
Lloh9:
	ldr	x22, [x22, _MI_NOOP@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_intel_ring_emit
	mov	x0, x19
	bl	_intel_ring_advance
	mov	x0, x19
	mov	w1, #6
	bl	_intel_ring_begin
	cbnz	w0, LBB0_3
; %bb.2:
	mov	w0, #5
	bl	_GFX_OP_PIPE_CONTROL
	mov	x1, x0
	mov	x0, x19
	bl	_intel_ring_emit
Lloh10:
	adrp	x8, _PIPE_CONTROL_QW_WRITE@GOTPAGE
Lloh11:
	ldr	x8, [x8, _PIPE_CONTROL_QW_WRITE@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_intel_ring_emit
	ldr	w8, [x21]
	orr	w1, w8, w20
	mov	x0, x19
	bl	_intel_ring_emit
	mov	x0, x19
	mov	w1, #0
	bl	_intel_ring_emit
	mov	x0, x19
	mov	w1, #0
	bl	_intel_ring_emit
	ldr	w1, [x22]
	mov	x0, x19
	bl	_intel_ring_emit
	mov	x0, x19
	bl	_intel_ring_advance
	mov	w0, #0
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_PIPE_CONTROL_CS_STALL,4,2      ; @PIPE_CONTROL_CS_STALL
	.comm	_PIPE_CONTROL_STALL_AT_SCOREBOARD,4,2 ; @PIPE_CONTROL_STALL_AT_SCOREBOARD
	.comm	_PIPE_CONTROL_GLOBAL_GTT,4,2    ; @PIPE_CONTROL_GLOBAL_GTT
	.comm	_MI_NOOP,4,2                    ; @MI_NOOP
	.comm	_PIPE_CONTROL_QW_WRITE,4,2      ; @PIPE_CONTROL_QW_WRITE
	.no_dead_strip	_intel_emit_post_sync_nonzero_flush
.subsections_via_symbols
