	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_ddi_pre_enable
_intel_ddi_pre_enable:                  ## @intel_ddi_pre_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	leaq	8(%rdi), %r14
	movq	16(%rdi), %rdi
	callq	_to_intel_crtc
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	_intel_ddi_get_encoder_port
	movl	%eax, %r15d
	movl	(%rbx), %r13d
	movq	_INTEL_OUTPUT_EDP@GOTPCREL(%rip), %rbx
	cmpl	(%rbx), %r13d
	jne	LBB0_2
## %bb.1:
	movq	%r14, %rdi
	callq	_enc_to_intel_dp
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_ironlake_edp_panel_vdd_on
	movq	%rbx, %rdi
	callq	_ironlake_edp_panel_on
	movq	%rbx, %rdi
	movq	_INTEL_OUTPUT_EDP@GOTPCREL(%rip), %rbx
	movl	$1, %esi
	callq	_ironlake_edp_panel_vdd_off
LBB0_2:
	movq	(%r12), %rax
	movq	_PORT_CLK_SEL_NONE@GOTPCREL(%rip), %rcx
	xorl	%edi, %edi
	cmpq	(%rcx), %rax
	sete	%dil
	callq	_WARN_ON
	movl	%r15d, %edi
	callq	_PORT_CLK_SEL
	movq	(%r12), %rsi
	movl	%eax, %edi
	callq	_I915_WRITE
	movq	_INTEL_OUTPUT_DISPLAYPORT@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r13d
	je	LBB0_5
## %bb.3:
	cmpl	(%rbx), %r13d
	je	LBB0_5
## %bb.4:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	movq	%r14, %rdi
	callq	_enc_to_intel_dp
	movq	%rax, %rbx
	movq	_DRM_MODE_DPMS_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_dp_sink_dpms
	movq	%rbx, %rdi
	callq	_intel_dp_start_link_train
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_dp_complete_link_train   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_OUTPUT_EDP,4,2           ## @INTEL_OUTPUT_EDP
	.comm	_PORT_CLK_SEL_NONE,8,3          ## @PORT_CLK_SEL_NONE
	.comm	_INTEL_OUTPUT_DISPLAYPORT,4,2   ## @INTEL_OUTPUT_DISPLAYPORT
	.comm	_DRM_MODE_DPMS_ON,4,2           ## @DRM_MODE_DPMS_ON
	.no_dead_strip	_intel_ddi_pre_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_ddi_pre_enable
_intel_ddi_pre_enable:                  ; @intel_ddi_pre_enable
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x0
	add	x19, x0, #8
	ldr	x0, [x0, #16]
	bl	_to_intel_crtc
	mov	x20, x0
	mov	x0, x22
	bl	_intel_ddi_get_encoder_port
	mov	x21, x0
	ldr	w23, [x22]
Lloh0:
	adrp	x24, _INTEL_OUTPUT_EDP@GOTPAGE
Lloh1:
	ldr	x24, [x24, _INTEL_OUTPUT_EDP@GOTPAGEOFF]
	ldr	w8, [x24]
	cmp	w23, w8
	b.ne	LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_enc_to_intel_dp
	mov	x22, x0
	bl	_ironlake_edp_panel_vdd_on
	mov	x0, x22
	bl	_ironlake_edp_panel_on
	mov	x0, x22
	mov	w1, #1
	bl	_ironlake_edp_panel_vdd_off
LBB0_2:
	ldr	x8, [x20]
Lloh2:
	adrp	x9, _PORT_CLK_SEL_NONE@GOTPAGE
Lloh3:
	ldr	x9, [x9, _PORT_CLK_SEL_NONE@GOTPAGEOFF]
Lloh4:
	ldr	x9, [x9]
	cmp	x8, x9
	cset	w0, eq
	bl	_WARN_ON
	mov	x0, x21
	bl	_PORT_CLK_SEL
	ldr	x1, [x20]
	bl	_I915_WRITE
Lloh5:
	adrp	x8, _INTEL_OUTPUT_DISPLAYPORT@GOTPAGE
Lloh6:
	ldr	x8, [x8, _INTEL_OUTPUT_DISPLAYPORT@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	ldr	w9, [x24]
	cmp	w23, w8
	ccmp	w23, w9, #4, ne
	b.ne	LBB0_4
; %bb.3:
	mov	x0, x19
	bl	_enc_to_intel_dp
	mov	x19, x0
Lloh8:
	adrp	x8, _DRM_MODE_DPMS_ON@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DRM_MODE_DPMS_ON@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	bl	_intel_dp_sink_dpms
	mov	x0, x19
	bl	_intel_dp_start_link_train
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_intel_dp_complete_link_train
LBB0_4:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_OUTPUT_EDP,4,2           ; @INTEL_OUTPUT_EDP
	.comm	_PORT_CLK_SEL_NONE,8,3          ; @PORT_CLK_SEL_NONE
	.comm	_INTEL_OUTPUT_DISPLAYPORT,4,2   ; @INTEL_OUTPUT_DISPLAYPORT
	.comm	_DRM_MODE_DPMS_ON,4,2           ; @DRM_MODE_DPMS_ON
	.no_dead_strip	_intel_ddi_pre_enable
.subsections_via_symbols
