	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_efx_nic_fpga_ver               ## -- Begin function efx_nic_fpga_ver
	.p2align	4, 0x90
_efx_nic_fpga_ver:                      ## @efx_nic_fpga_ver
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	subq	$16, %rsp
	movq	_FR_AZ_ALTERA_BUILD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-4(%rbp), %rsi
	callq	_efx_reado
	movl	-4(%rbp), %edi
	movq	_FRF_AZ_ALTERA_BUILD_VER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_EFX_OWORD_FIELD
	addq	$16, %rsp
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_FR_AZ_ALTERA_BUILD,4,2         ## @FR_AZ_ALTERA_BUILD
	.comm	_FRF_AZ_ALTERA_BUILD_VER,4,2    ## @FRF_AZ_ALTERA_BUILD_VER
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_efx_nic_fpga_ver               ; -- Begin function efx_nic_fpga_ver
	.p2align	2
_efx_nic_fpga_ver:                      ; @efx_nic_fpga_ver
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #32
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
Lloh0:
	adrp	x8, _FR_AZ_ALTERA_BUILD@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FR_AZ_ALTERA_BUILD@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	sub	x1, x29, #4
	bl	_efx_reado
	ldur	w0, [x29, #-4]
Lloh3:
	adrp	x8, _FRF_AZ_ALTERA_BUILD_VER@GOTPAGE
Lloh4:
	ldr	x8, [x8, _FRF_AZ_ALTERA_BUILD_VER@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_EFX_OWORD_FIELD
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #32
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_FR_AZ_ALTERA_BUILD,4,2         ; @FR_AZ_ALTERA_BUILD
	.comm	_FRF_AZ_ALTERA_BUILD_VER,4,2    ; @FRF_AZ_ALTERA_BUILD_VER
.subsections_via_symbols
