	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_do_init_cp                ## -- Begin function r600_do_init_cp
	.p2align	4, 0x90
_r600_do_init_cp:                       ## @r600_do_init_cp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rbx
	movq	%rsi, %r12
	movq	%rdi, %r15
	movq	32(%rdi), %r13
	movq	(%rdx), %rax
	movq	(%rax), %r14
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	leaq	284(%r13), %rdi
	callq	_mutex_init
	xorl	%eax, %eax
	callq	_r600_cs_legacy_init
	movl	(%r13), %eax
	movq	_RADEON_NEW_MEMMAP@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_2
## %bb.1:
	cmpq	$0, 224(%r13)
	je	LBB0_16
LBB0_2:
	movq	%r15, -48(%rbp)                 ## 8-byte Spill
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movq	64(%r12), %rcx
	movq	_RADEON_IS_AGP@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	testq	%rcx, %rcx
	je	LBB0_5
## %bb.3:
	movl	%edx, %esi
	andl	%eax, %esi
	je	LBB0_5
## %bb.4:
	leaq	L_.str.2(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movl	(%r15), %eax
	notl	%eax
	andl	%eax, (%r13)
	movq	_radeon_no_wb@GOTPCREL(%rip), %rax
	movl	$1, (%rax)
	jmp	LBB0_8
LBB0_5:
	movq	_RADEON_IS_PCI@GOTPCREL(%rip), %rsi
	orl	(%rsi), %edx
	movq	_RADEON_IS_PCIE@GOTPCREL(%rip), %rsi
	orl	(%rsi), %edx
	testl	%eax, %edx
	jne	LBB0_8
## %bb.6:
	testq	%rcx, %rcx
	jne	LBB0_8
## %bb.7:
	leaq	L_.str.3(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movl	(%r15), %eax
	orl	%eax, (%r13)
LBB0_8:
	movl	(%r12), %eax
	movl	%eax, 4(%r13)
	testl	%eax, %eax
	jle	LBB0_14
## %bb.9:
	movq	_RADEON_MAX_USEC_TIMEOUT@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jg	LBB0_14
## %bb.10:
	movq	_DRM_RADEON_VBLANK_CRTC1@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 280(%r13)
	movq	$0, 272(%r13)
	movq	8(%r12), %rsi
	movq	%rsi, 8(%r13)
	movq	_RADEON_CSQ_PRIBM_INDDIS@GOTPCREL(%rip), %rax
	cmpq	(%rax), %rsi
	movq	-48(%rbp), %r15                 ## 8-byte Reload
	je	LBB0_17
## %bb.11:
	movq	_RADEON_CSQ_PRIBM_INDBM@GOTPCREL(%rip), %rax
	cmpq	(%rax), %rsi
	je	LBB0_17
## %bb.12:
	leaq	L_.str.5(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_DEBUG
LBB0_13:
	movq	%r15, %rdi
	jmp	LBB0_15
LBB0_14:
	leaq	L_.str.4(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
LBB0_15:
	callq	_r600_do_cleanup_cp
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_36
LBB0_16:
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_35
LBB0_17:
	cmpl	$16, 16(%r12)
	jne	LBB0_19
## %bb.18:
	movq	_RADEON_COLOR_FORMAT_RGB565@GOTPCREL(%rip), %rax
	jmp	LBB0_20
LBB0_19:
	movq	_RADEON_COLOR_FORMAT_ARGB8888@GOTPCREL(%rip), %rax
LBB0_20:
	movl	(%rax), %eax
	movl	%eax, 264(%r13)
	movups	20(%r12), %xmm0
	movups	%xmm0, 16(%r13)
	movups	44(%r12), %xmm0
	movups	%xmm0, 248(%r13)
	movq	%r15, %rdi
	callq	_drm_getsarea
	movl	%eax, (%r14)
	testl	%eax, %eax
	je	LBB0_30
## %bb.21:
	movl	56(%r12), %esi
	movq	%r15, %rdi
	callq	_drm_core_findmap
	movq	%rax, 216(%r13)
	testq	%rax, %rax
	je	LBB0_31
## %bb.22:
	movl	52(%r12), %esi
	movq	%r15, %rdi
	callq	_drm_core_findmap
	movq	%rax, 232(%r13)
	testq	%rax, %rax
	je	LBB0_32
## %bb.23:
	movl	48(%r12), %esi
	movl	%esi, 24(%r15)
	movq	%r15, %rdi
	callq	_drm_core_findmap
	movq	%rax, 8(%r15)
	testq	%rax, %rax
	je	LBB0_33
## %bb.24:
	movl	44(%r12), %esi
	testl	%esi, %esi
	je	LBB0_27
## %bb.25:
	movq	%r15, %rdi
	callq	_drm_core_findmap
	movq	%rax, 240(%r13)
	testq	%rax, %rax
	je	LBB0_34
## %bb.26:
	movq	8(%r15), %rax
LBB0_27:
	movq	216(%r13), %rcx
	movl	8(%rcx), %edx
	movl	%edx, (%rcx)
	movq	232(%r13), %rdx
	movl	8(%rdx), %esi
	movl	%esi, (%rdx)
	movl	8(%rax), %edx
	movl	%edx, (%rax)
	movl	(%rcx), %esi
	leaq	L_.str.11(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movq	232(%r13), %rax
	movl	(%rax), %esi
	leaq	L_.str.12(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movq	8(%r15), %rax
	movl	(%rax), %esi
	leaq	L_.str.13(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movq	%r13, %rdi
	callq	_radeon_read_fb_location
	shll	$24, %eax
	movl	%eax, 32(%r13)
	movq	%r13, %rdi
	callq	_radeon_read_fb_location
                                        ## kill: def $eax killed $eax def $rax
	shll	$8, %eax
	addl	$16777216, %eax                 ## imm = 0x1000000
	andl	$-16777216, %eax                ## imm = 0xFF000000
	movl	32(%r13), %esi
	subl	%esi, %eax
	movl	%eax, 36(%r13)
	movl	20(%r13), %ecx
	leal	63(%rcx), %edx
	testl	%ecx, %ecx
	cmovnsl	%ecx, %edx
	movl	28(%r13), %ecx
	andl	$-64, %edx
	shll	$16, %edx
	movl	16(%r13), %edi
	addl	%esi, %edi
	sarl	$10, %edi
	orl	%edx, %edi
	movl	%edi, 40(%r13)
	leal	63(%rcx), %edx
	testl	%ecx, %ecx
	cmovnsl	%ecx, %edx
	andl	$-64, %edx
	shll	$16, %edx
	movl	24(%r13), %ecx
	addl	%esi, %ecx
	sarl	$10, %ecx
	orl	%edx, %ecx
	movl	%ecx, 44(%r13)
	movl	52(%r13), %ecx
	leal	63(%rcx), %edx
	testl	%ecx, %ecx
	cmovnsl	%ecx, %edx
	andl	$-64, %edx
	shll	$16, %edx
	movl	56(%r13), %ecx
	addl	%esi, %ecx
	sarl	$10, %ecx
	orl	%edx, %ecx
	movl	%ecx, 48(%r13)
	movl	36(%r12), %ecx
	movl	%ecx, 60(%r13)
	cmpq	$0, 224(%r13)
	je	LBB0_42
## %bb.28:
	leaq	L_.str.14(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_INFO
	movl	32(%r13), %esi
	movl	36(%r13), %eax
	testl	%eax, %eax
	js	LBB0_38
## %bb.29:
	leal	(%rsi,%rax), %ecx
	movl	60(%r13), %edx
	leal	(%rcx,%rdx), %edi
	movslq	%ecx, %rbx
	cmpq	%rbx, %rdi
	jb	LBB0_39
	jmp	LBB0_40
LBB0_30:
	leaq	L_.str.6(%rip), %rdi
	jmp	LBB0_35
LBB0_31:
	leaq	L_.str.7(%rip), %rdi
	jmp	LBB0_35
LBB0_32:
	leaq	L_.str.8(%rip), %rdi
	jmp	LBB0_35
LBB0_33:
	leaq	L_.str.9(%rip), %rdi
	jmp	LBB0_35
LBB0_34:
	leaq	L_.str.10(%rip), %rdi
LBB0_35:
	callq	_DRM_ERROR
	movq	%r15, %rdi
	callq	_r600_do_cleanup_cp
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
LBB0_36:
	subl	(%rax), %ebx
LBB0_37:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_38:
	movl	60(%r13), %edx
LBB0_39:
	movl	%esi, %ecx
	subl	%edx, %ecx
LBB0_40:
	movl	%ecx, %edx
	andl	$-4194304, %edx                 ## imm = 0xFFC00000
	movl	%edx, 64(%r13)
	cmpl	%ecx, %edx
	je	LBB0_42
## %bb.41:
	leaq	L_.str.15(%rip), %rdi
	movl	%ecx, %esi
	xorl	%eax, %eax
	callq	_DRM_INFO
	movl	32(%r13), %esi
	movl	36(%r13), %eax
LBB0_42:
	movq	(%r15), %rcx
	movq	8(%r15), %rdx
	movq	8(%rdx), %rdx
	subq	(%rcx), %rdx
	movslq	64(%r13), %rcx
	addq	%rdx, %rcx
	movq	%rcx, 72(%r13)
	leaq	L_.str.16(%rip), %rdi
	xorl	%ebx, %ebx
                                        ## kill: def $esi killed $esi killed $rsi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movl	60(%r13), %esi
	leaq	L_.str.17(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movl	64(%r13), %esi
	leaq	L_.str.18(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movq	72(%r13), %rsi
	leaq	L_.str.19(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movq	216(%r13), %rax
	movl	(%rax), %eax
	movq	%rax, 152(%r13)
	movslq	40(%r12), %rcx
	movq	%rcx, %rdx
	andq	$-4, %rdx
	addq	%rax, %rdx
	leal	7(%rcx), %edi
	testq	%rcx, %rcx
	movq	%rdx, 160(%r13)
	movl	%ecx, 168(%r13)
	cmovnsl	%ecx, %edi
	sarl	$3, %edi
	callq	_drm_order
	movq	%rax, 208(%r13)
	movl	$4096, 172(%r13)                ## imm = 0x1000
	movl	$512, %edi                      ## imm = 0x200
	callq	_drm_order
	movq	%rax, 200(%r13)
	movl	$32, 176(%r13)
	movl	$2, %edi
	callq	_drm_order
	movq	%rax, 192(%r13)
	movl	168(%r13), %eax
	sarl	$2, %eax
	decl	%eax
	movl	%eax, 180(%r13)
	movq	_RADEON_RING_HIGH_MARK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 184(%r13)
	movl	$32, %edi
	callq	_DMA_BIT_MASK
	movl	%eax, 140(%r13)
	cmpl	$0, 144(%r13)
	je	LBB0_47
## %bb.43:
	movl	80(%r13), %esi
	leaq	L_.str.21(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movl	80(%r13), %eax
	movl	136(%r13), %ecx
	movl	32(%r13), %edx
	addl	%eax, %edx
	movl	%edx, 104(%r13)
	addl	84(%r13), %eax
	leaq	112(%r13), %rdi
	movq	%rax, 120(%r13)
	movl	%ecx, 128(%r13)
	movq	%r15, %rsi
	callq	_drm_core_ioremap_wc
	movl	112(%r13), %esi
	testl	%esi, %esi
	je	LBB0_48
## %bb.44:
	movl	%esi, 108(%r13)
	movl	80(%r13), %edx
	leaq	L_.str.23(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movq	%r15, %rdi
	callq	_r600_page_table_init
	testl	%eax, %eax
	je	LBB0_49
## %bb.45:
	movq	_RADEON_FAMILY_MASK@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	andl	(%r13), %eax
	movq	_CHIP_RV770@GOTPCREL(%rip), %r12
	cmpl	(%r12), %eax
	jge	LBB0_51
## %bb.46:
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_r600_vm_init
	jmp	LBB0_52
LBB0_47:
	leaq	L_.str.20(%rip), %rdi
	jmp	LBB0_50
LBB0_48:
	leaq	L_.str.22(%rip), %rdi
	jmp	LBB0_50
LBB0_49:
	leaq	L_.str.24(%rip), %rdi
LBB0_50:
	callq	_DRM_ERROR
	jmp	LBB0_13
LBB0_51:
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_r700_vm_init
LBB0_52:
	cmpl	$0, 100(%r13)
	je	LBB0_54
## %bb.53:
	cmpl	$0, 96(%r13)
	jne	LBB0_56
LBB0_54:
	movq	%r13, %rdi
	callq	_r600_cp_init_microcode
	testl	%eax, %eax
	je	LBB0_56
## %bb.55:
	movl	%eax, %ebx
	leaq	L_.str.25(%rip), %rdi
	callq	_DRM_ERROR
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_r600_do_cleanup_cp
	jmp	LBB0_37
LBB0_56:
	movl	(%r15), %eax
	andl	(%r13), %eax
	cmpl	(%r12), %eax
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movq	%r13, %rdi
	jge	LBB0_58
## %bb.57:
	callq	_r600_cp_load_microcode
	jmp	LBB0_59
LBB0_58:
	callq	_r700_cp_load_microcode
LBB0_59:
	movq	%rbx, %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	callq	_r600_cp_init_ring_buffer
	movq	$0, 88(%r13)
	movq	%rbx, %rdi
	callq	_r600_do_engine_reset
	movq	%r13, %rdi
	callq	_r600_test_writeback
	xorl	%ebx, %ebx
	jmp	LBB0_37
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\n"

	.comm	_RADEON_NEW_MEMMAP,4,2          ## @RADEON_NEW_MEMMAP
L_.str.1:                               ## @.str.1
	.asciz	"Cannot initialise DRM on this card\nThis card requires a new X.org DDX for 3D\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_RADEON_IS_AGP,4,2              ## @RADEON_IS_AGP
L_.str.2:                               ## @.str.2
	.asciz	"Forcing AGP card to PCI mode\n"

	.comm	_radeon_no_wb,4,2               ## @radeon_no_wb
	.comm	_RADEON_IS_PCI,4,2              ## @RADEON_IS_PCI
	.comm	_RADEON_IS_PCIE,4,2             ## @RADEON_IS_PCIE
L_.str.3:                               ## @.str.3
	.asciz	"Restoring AGP flag\n"

	.comm	_RADEON_MAX_USEC_TIMEOUT,4,2    ## @RADEON_MAX_USEC_TIMEOUT
L_.str.4:                               ## @.str.4
	.asciz	"TIMEOUT problem!\n"

	.comm	_DRM_RADEON_VBLANK_CRTC1,4,2    ## @DRM_RADEON_VBLANK_CRTC1
	.comm	_RADEON_CSQ_PRIBM_INDDIS,8,3    ## @RADEON_CSQ_PRIBM_INDDIS
	.comm	_RADEON_CSQ_PRIBM_INDBM,8,3     ## @RADEON_CSQ_PRIBM_INDBM
L_.str.5:                               ## @.str.5
	.asciz	"BAD cp_mode (%x)!\n"

	.comm	_RADEON_COLOR_FORMAT_RGB565,4,2 ## @RADEON_COLOR_FORMAT_RGB565
	.comm	_RADEON_COLOR_FORMAT_ARGB8888,4,2 ## @RADEON_COLOR_FORMAT_ARGB8888
L_.str.6:                               ## @.str.6
	.asciz	"could not find sarea!\n"

L_.str.7:                               ## @.str.7
	.asciz	"could not find cp ring region!\n"

L_.str.8:                               ## @.str.8
	.asciz	"could not find ring read pointer!\n"

L_.str.9:                               ## @.str.9
	.asciz	"could not find dma buffer region!\n"

L_.str.10:                              ## @.str.10
	.asciz	"could not find GART texture region!\n"

L_.str.11:                              ## @.str.11
	.asciz	"dev_priv->cp_ring->handle %p\n"

L_.str.12:                              ## @.str.12
	.asciz	"dev_priv->ring_rptr->handle %p\n"

L_.str.13:                              ## @.str.13
	.asciz	"dev->agp_buffer_map->handle %p\n"

L_.str.14:                              ## @.str.14
	.asciz	"Setting GART location based on new memory map\n"

L_.str.15:                              ## @.str.15
	.asciz	"GART aligned down from 0x%08x to 0x%08x\n"

L_.str.16:                              ## @.str.16
	.asciz	"fb 0x%08x size %d\n"

L_.str.17:                              ## @.str.17
	.asciz	"dev_priv->gart_size %d\n"

L_.str.18:                              ## @.str.18
	.asciz	"dev_priv->gart_vm_start 0x%08x\n"

L_.str.19:                              ## @.str.19
	.asciz	"dev_priv->gart_buffers_offset 0x%08lx\n"

	.comm	_RADEON_RING_HIGH_MARK,4,2      ## @RADEON_RING_HIGH_MARK
L_.str.20:                              ## @.str.20
	.asciz	"Need gart offset from userspace\n"

L_.str.21:                              ## @.str.21
	.asciz	"Using gart offset 0x%08lx\n"

L_.str.22:                              ## @.str.22
	.asciz	"ioremap failed.\n"

L_.str.23:                              ## @.str.23
	.asciz	"Setting phys_pci_gart to %p %08lX\n"

L_.str.24:                              ## @.str.24
	.asciz	"Failed to init GART table\n"

	.comm	_RADEON_FAMILY_MASK,4,2         ## @RADEON_FAMILY_MASK
	.comm	_CHIP_RV770,4,2                 ## @CHIP_RV770
L_.str.25:                              ## @.str.25
	.asciz	"Failed to load firmware!\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_do_init_cp                ; -- Begin function r600_do_init_cp
	.p2align	2
_r600_do_init_cp:                       ; @r600_do_init_cp
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x22, x1
	mov	x19, x0
	ldr	x20, [x0, #32]
	ldr	x8, [x2]
	ldr	x23, [x8]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
	add	x0, x20, #284
	bl	_mutex_init
	bl	_r600_cs_legacy_init
	ldr	w8, [x20]
Lloh2:
	adrp	x9, _RADEON_NEW_MEMMAP@GOTPAGE
Lloh3:
	ldr	x9, [x9, _RADEON_NEW_MEMMAP@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	ldr	x9, [x20, #224]
	cbz	x9, LBB0_13
LBB0_2:
	ldr	x9, [x22, #64]
Lloh5:
	adrp	x24, _RADEON_IS_AGP@GOTPAGE
Lloh6:
	ldr	x24, [x24, _RADEON_IS_AGP@GOTPAGEOFF]
	ldr	w10, [x24]
	cbz	x9, LBB0_5
; %bb.3:
	and	w11, w10, w8
	cbz	w11, LBB0_5
; %bb.4:
Lloh7:
	adrp	x0, l_.str.2@PAGE
Lloh8:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x24]
	ldr	w9, [x20]
	bic	w8, w9, w8
	str	w8, [x20]
Lloh9:
	adrp	x8, _radeon_no_wb@GOTPAGE
Lloh10:
	ldr	x8, [x8, _radeon_no_wb@GOTPAGEOFF]
	mov	w9, #1
Lloh11:
	str	w9, [x8]
	b	LBB0_7
LBB0_5:
Lloh12:
	adrp	x11, _RADEON_IS_PCI@GOTPAGE
Lloh13:
	ldr	x11, [x11, _RADEON_IS_PCI@GOTPAGEOFF]
Lloh14:
	ldr	w11, [x11]
Lloh15:
	adrp	x12, _RADEON_IS_PCIE@GOTPAGE
Lloh16:
	ldr	x12, [x12, _RADEON_IS_PCIE@GOTPAGEOFF]
	orr	w10, w11, w10
Lloh17:
	ldr	w11, [x12]
	orr	w10, w10, w11
	and	w8, w10, w8
	cmp	w8, #0
	ccmp	x9, #0, #0, eq
	b.ne	LBB0_7
; %bb.6:
Lloh18:
	adrp	x0, l_.str.3@PAGE
Lloh19:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x24]
	ldr	w9, [x20]
	orr	w8, w9, w8
	str	w8, [x20]
LBB0_7:
	ldr	w8, [x22]
	str	w8, [x20, #4]
	cmp	w8, #1
	b.lt	LBB0_12
; %bb.8:
Lloh20:
	adrp	x9, _RADEON_MAX_USEC_TIMEOUT@GOTPAGE
Lloh21:
	ldr	x9, [x9, _RADEON_MAX_USEC_TIMEOUT@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	cmp	w8, w9
	b.gt	LBB0_12
; %bb.9:
Lloh23:
	adrp	x8, _DRM_RADEON_VBLANK_CRTC1@GOTPAGE
Lloh24:
	ldr	x8, [x8, _DRM_RADEON_VBLANK_CRTC1@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	str	w8, [x20, #280]
	str	xzr, [x20, #272]
	ldr	x8, [x22, #8]
	str	x8, [x20, #8]
Lloh26:
	adrp	x9, _RADEON_CSQ_PRIBM_INDDIS@GOTPAGE
Lloh27:
	ldr	x9, [x9, _RADEON_CSQ_PRIBM_INDDIS@GOTPAGEOFF]
Lloh28:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_14
; %bb.10:
Lloh29:
	adrp	x9, _RADEON_CSQ_PRIBM_INDBM@GOTPAGE
Lloh30:
	ldr	x9, [x9, _RADEON_CSQ_PRIBM_INDBM@GOTPAGEOFF]
Lloh31:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_14
; %bb.11:
	str	x8, [sp]
Lloh32:
	adrp	x0, l_.str.5@PAGE
Lloh33:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_DRM_DEBUG
	b	LBB0_42
LBB0_12:
Lloh34:
	adrp	x0, l_.str.4@PAGE
Lloh35:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_DRM_DEBUG
	b	LBB0_42
LBB0_13:
Lloh36:
	adrp	x0, l_.str.1@PAGE
Lloh37:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_41
LBB0_14:
	ldr	w8, [x22, #16]
Lloh38:
	adrp	x9, _RADEON_COLOR_FORMAT_RGB565@GOTPAGE
Lloh39:
	ldr	x9, [x9, _RADEON_COLOR_FORMAT_RGB565@GOTPAGEOFF]
Lloh40:
	adrp	x10, _RADEON_COLOR_FORMAT_ARGB8888@GOTPAGE
Lloh41:
	ldr	x10, [x10, _RADEON_COLOR_FORMAT_ARGB8888@GOTPAGEOFF]
	cmp	w8, #16
	csel	x8, x9, x10, eq
	ldr	w8, [x8]
	str	w8, [x20, #264]
	ldur	q0, [x22, #20]
	str	q0, [x20, #16]
	ldur	q0, [x22, #44]
	stur	q0, [x20, #248]
	mov	x0, x19
	bl	_drm_getsarea
	str	w0, [x23]
	cbz	w0, LBB0_24
; %bb.15:
	ldr	w1, [x22, #56]
	mov	x0, x19
	bl	_drm_core_findmap
	str	x0, [x20, #216]
	cbz	x0, LBB0_25
; %bb.16:
	ldr	w1, [x22, #52]
	mov	x0, x19
	bl	_drm_core_findmap
	str	x0, [x20, #232]
	cbz	x0, LBB0_26
; %bb.17:
	ldr	w1, [x22, #48]
	str	w1, [x19, #24]
	mov	x0, x19
	bl	_drm_core_findmap
	str	x0, [x19, #8]
	cbz	x0, LBB0_27
; %bb.18:
	ldr	w1, [x22, #44]
	cbz	w1, LBB0_21
; %bb.19:
	mov	x0, x19
	bl	_drm_core_findmap
	str	x0, [x20, #240]
	cbz	x0, LBB0_28
; %bb.20:
	ldr	x0, [x19, #8]
LBB0_21:
	ldr	x8, [x20, #216]
	ldr	x9, [x8, #8]
	str	w9, [x8]
	ldr	x9, [x20, #232]
	ldr	x10, [x9, #8]
	str	w10, [x9]
	ldr	x9, [x0, #8]
	str	w9, [x0]
	ldr	w8, [x8]
	str	x8, [sp]
Lloh42:
	adrp	x0, l_.str.11@PAGE
Lloh43:
	add	x0, x0, l_.str.11@PAGEOFF
	bl	_DRM_DEBUG
	ldr	x8, [x20, #232]
	ldr	w8, [x8]
	str	x8, [sp]
Lloh44:
	adrp	x0, l_.str.12@PAGE
Lloh45:
	add	x0, x0, l_.str.12@PAGEOFF
	bl	_DRM_DEBUG
	ldr	x8, [x19, #8]
	ldr	w8, [x8]
	str	x8, [sp]
Lloh46:
	adrp	x0, l_.str.13@PAGE
Lloh47:
	add	x0, x0, l_.str.13@PAGEOFF
	bl	_DRM_DEBUG
	mov	x0, x20
	bl	_radeon_read_fb_location
	lsl	w8, w0, #24
	str	w8, [x20, #32]
	mov	x0, x20
	bl	_radeon_read_fb_location
	mov	w8, #16777216
	add	w8, w8, w0, lsl #8
	and	w9, w8, #0xff000000
	ldr	w8, [x20, #32]
	sub	w9, w9, w8
	ldp	w11, w10, [x20, #16]
	add	w12, w10, #63
	cmp	w10, #0
	csel	w10, w12, w10, lt
	lsl	w10, w10, #16
	and	w10, w10, #0xffc00000
	add	w11, w11, w8
	orr	w10, w10, w11, asr #10
	stp	w9, w10, [x20, #36]
	ldp	w11, w10, [x20, #24]
	add	w12, w10, #63
	cmp	w10, #0
	csel	w10, w12, w10, lt
	lsl	w10, w10, #16
	and	w10, w10, #0xffc00000
	add	w11, w11, w8
	orr	w10, w10, w11, asr #10
	ldp	w11, w12, [x20, #52]
	add	w13, w11, #63
	cmp	w11, #0
	csel	w11, w13, w11, lt
	lsl	w11, w11, #16
	and	w11, w11, #0xffc00000
	add	w12, w12, w8
	orr	w11, w11, w12, asr #10
	stp	w10, w11, [x20, #44]
	ldr	w10, [x22, #36]
	str	w10, [x20, #60]
	ldr	x10, [x20, #224]
	cbz	x10, LBB0_33
; %bb.22:
Lloh48:
	adrp	x0, l_.str.14@PAGE
Lloh49:
	add	x0, x0, l_.str.14@PAGEOFF
	bl	_DRM_INFO
	ldp	w8, w9, [x20, #32]
	tbnz	w9, #31, LBB0_29
; %bb.23:
	ldr	w11, [x20, #60]
	add	w10, w8, w9
	add	w12, w10, w11
	cmp	x12, w10, sxtw
	b.lo	LBB0_30
	b	LBB0_31
LBB0_24:
Lloh50:
	adrp	x0, l_.str.6@PAGE
Lloh51:
	add	x0, x0, l_.str.6@PAGEOFF
	b	LBB0_41
LBB0_25:
Lloh52:
	adrp	x0, l_.str.7@PAGE
Lloh53:
	add	x0, x0, l_.str.7@PAGEOFF
	b	LBB0_41
LBB0_26:
Lloh54:
	adrp	x0, l_.str.8@PAGE
Lloh55:
	add	x0, x0, l_.str.8@PAGEOFF
	b	LBB0_41
LBB0_27:
Lloh56:
	adrp	x0, l_.str.9@PAGE
Lloh57:
	add	x0, x0, l_.str.9@PAGEOFF
	b	LBB0_41
LBB0_28:
Lloh58:
	adrp	x0, l_.str.10@PAGE
Lloh59:
	add	x0, x0, l_.str.10@PAGEOFF
	b	LBB0_41
LBB0_29:
	ldr	w11, [x20, #60]
LBB0_30:
	sub	w10, w8, w11
LBB0_31:
	and	w11, w10, #0xffc00000
	str	w11, [x20, #64]
	cmp	w11, w10
	b.eq	LBB0_33
; %bb.32:
	stp	x10, x11, [sp]
Lloh60:
	adrp	x0, l_.str.15@PAGE
Lloh61:
	add	x0, x0, l_.str.15@PAGEOFF
	bl	_DRM_INFO
	ldp	w8, w9, [x20, #32]
LBB0_33:
	ldp	x11, x10, [x19]
	ldr	x10, [x10, #8]
	ldr	x11, [x11]
	ldrsw	x12, [x20, #64]
	sub	x10, x10, x11
	add	x10, x10, x12
	str	x10, [x20, #72]
	stp	x8, x9, [sp]
Lloh62:
	adrp	x0, l_.str.16@PAGE
Lloh63:
	add	x0, x0, l_.str.16@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x20, #60]
	str	x8, [sp]
Lloh64:
	adrp	x0, l_.str.17@PAGE
Lloh65:
	add	x0, x0, l_.str.17@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x20, #64]
	str	x8, [sp]
Lloh66:
	adrp	x0, l_.str.18@PAGE
Lloh67:
	add	x0, x0, l_.str.18@PAGEOFF
	bl	_DRM_DEBUG
	ldr	x8, [x20, #72]
	str	x8, [sp]
Lloh68:
	adrp	x0, l_.str.19@PAGE
Lloh69:
	add	x0, x0, l_.str.19@PAGEOFF
	bl	_DRM_DEBUG
	ldr	x8, [x20, #216]
	ldr	w8, [x8]
	ldrsw	x9, [x22, #40]
	and	x10, x9, #0xfffffffffffffffc
	add	x10, x8, x10
	stp	x8, x10, [x20, #152]
	str	w9, [x20, #168]
	add	w8, w9, #7
	cmp	w9, #0
	csel	w8, w8, w9, lt
	asr	w0, w8, #3
	bl	_drm_order
	str	x0, [x20, #208]
	mov	w8, #4096
	str	w8, [x20, #172]
	mov	w0, #512
	bl	_drm_order
	str	x0, [x20, #200]
	mov	w8, #32
	str	w8, [x20, #176]
	mov	w0, #2
	bl	_drm_order
	str	x0, [x20, #192]
	ldr	w8, [x20, #168]
	asr	w8, w8, #2
	sub	w8, w8, #1
Lloh70:
	adrp	x9, _RADEON_RING_HIGH_MARK@GOTPAGE
Lloh71:
	ldr	x9, [x9, _RADEON_RING_HIGH_MARK@GOTPAGEOFF]
Lloh72:
	ldr	w9, [x9]
	stp	w8, w9, [x20, #180]
	mov	w0, #32
	bl	_DMA_BIT_MASK
	str	w0, [x20, #140]
	ldr	w8, [x20, #144]
	cbz	w8, LBB0_38
; %bb.34:
	ldr	w8, [x20, #80]
	str	x8, [sp]
Lloh73:
	adrp	x0, l_.str.21@PAGE
Lloh74:
	add	x0, x0, l_.str.21@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x20, #32]
	ldp	w9, w10, [x20, #80]
	add	w8, w8, w9
	str	w8, [x20, #104]
	add	w8, w10, w9
	add	x0, x20, #112
	str	x8, [x20, #120]
	ldr	w8, [x20, #136]
	str	w8, [x20, #128]
	mov	x1, x19
	bl	_drm_core_ioremap_wc
	ldr	w8, [x20, #112]
	cbz	w8, LBB0_39
; %bb.35:
	str	w8, [x20, #108]
	ldr	w9, [x20, #80]
	stp	x8, x9, [sp]
Lloh75:
	adrp	x0, l_.str.23@PAGE
Lloh76:
	add	x0, x0, l_.str.23@PAGEOFF
	bl	_DRM_DEBUG
	mov	x0, x19
	bl	_r600_page_table_init
	cbz	w0, LBB0_40
; %bb.36:
	ldr	w8, [x20]
Lloh77:
	adrp	x23, _RADEON_FAMILY_MASK@GOTPAGE
Lloh78:
	ldr	x23, [x23, _RADEON_FAMILY_MASK@GOTPAGEOFF]
	ldr	w9, [x23]
	and	w8, w9, w8
Lloh79:
	adrp	x24, _CHIP_RV770@GOTPAGE
Lloh80:
	ldr	x24, [x24, _CHIP_RV770@GOTPAGEOFF]
	ldr	w9, [x24]
	mov	x0, x19
	cmp	w8, w9
	b.ge	LBB0_44
; %bb.37:
	bl	_r600_vm_init
	b	LBB0_45
LBB0_38:
Lloh81:
	adrp	x0, l_.str.20@PAGE
Lloh82:
	add	x0, x0, l_.str.20@PAGEOFF
	b	LBB0_41
LBB0_39:
Lloh83:
	adrp	x0, l_.str.22@PAGE
Lloh84:
	add	x0, x0, l_.str.22@PAGEOFF
	b	LBB0_41
LBB0_40:
Lloh85:
	adrp	x0, l_.str.24@PAGE
Lloh86:
	add	x0, x0, l_.str.24@PAGEOFF
LBB0_41:
	bl	_DRM_ERROR
LBB0_42:
	mov	x0, x19
	bl	_r600_do_cleanup_cp
Lloh87:
	adrp	x8, _EINVAL@GOTPAGE
Lloh88:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh89:
	ldr	w8, [x8]
	neg	w22, w8
LBB0_43:
	mov	x0, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_44:
	bl	_r700_vm_init
LBB0_45:
	ldr	w8, [x20, #100]
	cbz	w8, LBB0_47
; %bb.46:
	ldr	w8, [x20, #96]
	cbnz	w8, LBB0_49
LBB0_47:
	mov	x0, x20
	bl	_r600_cp_init_microcode
	cbz	w0, LBB0_49
; %bb.48:
	mov	x22, x0
Lloh90:
	adrp	x0, l_.str.25@PAGE
Lloh91:
	add	x0, x0, l_.str.25@PAGEOFF
	bl	_DRM_ERROR
	mov	x0, x19
	bl	_r600_do_cleanup_cp
	b	LBB0_43
LBB0_49:
	ldr	w8, [x20]
	ldr	w9, [x23]
	and	w8, w9, w8
	ldr	w9, [x24]
	mov	x0, x20
	cmp	w8, w9
	b.ge	LBB0_51
; %bb.50:
	bl	_r600_cp_load_microcode
	b	LBB0_52
LBB0_51:
	bl	_r700_cp_load_microcode
LBB0_52:
	mov	x0, x19
	mov	x1, x20
	mov	x2, x21
	bl	_r600_cp_init_ring_buffer
	str	xzr, [x20, #88]
	mov	x0, x19
	bl	_r600_do_engine_reset
	mov	x0, x20
	bl	_r600_test_writeback
	mov	w22, #0
	b	LBB0_43
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotStr	Lloh9, Lloh10, Lloh11
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpAdd	Lloh44, Lloh45
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpAdd	Lloh50, Lloh51
	.loh AdrpAdd	Lloh52, Lloh53
	.loh AdrpAdd	Lloh54, Lloh55
	.loh AdrpAdd	Lloh56, Lloh57
	.loh AdrpAdd	Lloh58, Lloh59
	.loh AdrpAdd	Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpAdd	Lloh68, Lloh69
	.loh AdrpAdd	Lloh66, Lloh67
	.loh AdrpAdd	Lloh64, Lloh65
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpAdd	Lloh73, Lloh74
	.loh AdrpAdd	Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh79, Lloh80
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpAdd	Lloh81, Lloh82
	.loh AdrpAdd	Lloh83, Lloh84
	.loh AdrpAdd	Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpAdd	Lloh90, Lloh91
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\n"

	.comm	_RADEON_NEW_MEMMAP,4,2          ; @RADEON_NEW_MEMMAP
l_.str.1:                               ; @.str.1
	.asciz	"Cannot initialise DRM on this card\nThis card requires a new X.org DDX for 3D\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_RADEON_IS_AGP,4,2              ; @RADEON_IS_AGP
l_.str.2:                               ; @.str.2
	.asciz	"Forcing AGP card to PCI mode\n"

	.comm	_radeon_no_wb,4,2               ; @radeon_no_wb
	.comm	_RADEON_IS_PCI,4,2              ; @RADEON_IS_PCI
	.comm	_RADEON_IS_PCIE,4,2             ; @RADEON_IS_PCIE
l_.str.3:                               ; @.str.3
	.asciz	"Restoring AGP flag\n"

	.comm	_RADEON_MAX_USEC_TIMEOUT,4,2    ; @RADEON_MAX_USEC_TIMEOUT
l_.str.4:                               ; @.str.4
	.asciz	"TIMEOUT problem!\n"

	.comm	_DRM_RADEON_VBLANK_CRTC1,4,2    ; @DRM_RADEON_VBLANK_CRTC1
	.comm	_RADEON_CSQ_PRIBM_INDDIS,8,3    ; @RADEON_CSQ_PRIBM_INDDIS
	.comm	_RADEON_CSQ_PRIBM_INDBM,8,3     ; @RADEON_CSQ_PRIBM_INDBM
l_.str.5:                               ; @.str.5
	.asciz	"BAD cp_mode (%x)!\n"

	.comm	_RADEON_COLOR_FORMAT_RGB565,4,2 ; @RADEON_COLOR_FORMAT_RGB565
	.comm	_RADEON_COLOR_FORMAT_ARGB8888,4,2 ; @RADEON_COLOR_FORMAT_ARGB8888
l_.str.6:                               ; @.str.6
	.asciz	"could not find sarea!\n"

l_.str.7:                               ; @.str.7
	.asciz	"could not find cp ring region!\n"

l_.str.8:                               ; @.str.8
	.asciz	"could not find ring read pointer!\n"

l_.str.9:                               ; @.str.9
	.asciz	"could not find dma buffer region!\n"

l_.str.10:                              ; @.str.10
	.asciz	"could not find GART texture region!\n"

l_.str.11:                              ; @.str.11
	.asciz	"dev_priv->cp_ring->handle %p\n"

l_.str.12:                              ; @.str.12
	.asciz	"dev_priv->ring_rptr->handle %p\n"

l_.str.13:                              ; @.str.13
	.asciz	"dev->agp_buffer_map->handle %p\n"

l_.str.14:                              ; @.str.14
	.asciz	"Setting GART location based on new memory map\n"

l_.str.15:                              ; @.str.15
	.asciz	"GART aligned down from 0x%08x to 0x%08x\n"

l_.str.16:                              ; @.str.16
	.asciz	"fb 0x%08x size %d\n"

l_.str.17:                              ; @.str.17
	.asciz	"dev_priv->gart_size %d\n"

l_.str.18:                              ; @.str.18
	.asciz	"dev_priv->gart_vm_start 0x%08x\n"

l_.str.19:                              ; @.str.19
	.asciz	"dev_priv->gart_buffers_offset 0x%08lx\n"

	.comm	_RADEON_RING_HIGH_MARK,4,2      ; @RADEON_RING_HIGH_MARK
l_.str.20:                              ; @.str.20
	.asciz	"Need gart offset from userspace\n"

l_.str.21:                              ; @.str.21
	.asciz	"Using gart offset 0x%08lx\n"

l_.str.22:                              ; @.str.22
	.asciz	"ioremap failed.\n"

l_.str.23:                              ; @.str.23
	.asciz	"Setting phys_pci_gart to %p %08lX\n"

l_.str.24:                              ; @.str.24
	.asciz	"Failed to init GART table\n"

	.comm	_RADEON_FAMILY_MASK,4,2         ; @RADEON_FAMILY_MASK
	.comm	_CHIP_RV770,4,2                 ; @CHIP_RV770
l_.str.25:                              ; @.str.25
	.asciz	"Failed to load firmware!\n"

.subsections_via_symbols
