	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function reprogram_gp_counter
_reprogram_gp_counter:                  ## @reprogram_gp_counter
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r14
	movq	_PERF_TYPE_RAW@GOTPCREL(%rip), %r12
	movl	(%r12), %r15d
	movq	_ARCH_PERFMON_EVENTSEL_PIN_CONTROL@GOTPCREL(%rip), %rax
	testl	%esi, (%rax)
	je	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rdi
	callq	_printk_once
LBB0_2:
	movl	%ebx, (%r14)
	movq	%r14, %rdi
	callq	_stop_counter
	movq	_ARCH_PERFMON_EVENTSEL_ENABLE@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_9
## %bb.3:
	movq	%r14, %rdi
	callq	_pmc_enabled
	testl	%eax, %eax
	je	LBB0_9
## %bb.4:
	movq	_ARCH_PERFMON_EVENTSEL_EDGE@GOTPCREL(%rip), %rax
	movq	_ARCH_PERFMON_EVENTSEL_INV@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_ARCH_PERFMON_EVENTSEL_CMASK@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	testl	%ebx, %ecx
	je	LBB0_6
## %bb.5:
                                        ## implicit-def: $eax
	jmp	LBB0_8
LBB0_9:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	movq	_ARCH_PERFMON_EVENTSEL_UMASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	%ebx, %edx
	sarl	$8, %edx
	movq	_ARCH_PERFMON_EVENTSEL_EVENT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	andl	%ebx, %esi
	movq	8(%r14), %rdi
	callq	_find_arch_event
	movq	_PERF_COUNT_HW_MAX@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	je	LBB0_8
## %bb.7:
	movq	_PERF_TYPE_HARDWARE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
LBB0_8:
	movq	_X86_RAW_EVENT_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	%ebx, %edx
	cmpl	(%r12), %r15d
	cmovnel	%eax, %edx
	movq	_ARCH_PERFMON_EVENTSEL_USR@GOTPCREL(%rip), %rax
	xorl	%ecx, %ecx
	movl	(%rax), %eax
	andl	%ebx, %eax
	sete	%cl
	movq	_ARCH_PERFMON_EVENTSEL_OS@GOTPCREL(%rip), %rax
	xorl	%r8d, %r8d
	movl	(%rax), %eax
	andl	%ebx, %eax
	sete	%r8b
	movq	_ARCH_PERFMON_EVENTSEL_INT@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%ebx, %r9d
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_reprogram_counter              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PERF_TYPE_RAW,4,2              ## @PERF_TYPE_RAW
	.comm	_ARCH_PERFMON_EVENTSEL_PIN_CONTROL,4,2 ## @ARCH_PERFMON_EVENTSEL_PIN_CONTROL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"kvm pmu: pin control bit is ignored\n"

	.comm	_ARCH_PERFMON_EVENTSEL_ENABLE,4,2 ## @ARCH_PERFMON_EVENTSEL_ENABLE
	.comm	_ARCH_PERFMON_EVENTSEL_EVENT,4,2 ## @ARCH_PERFMON_EVENTSEL_EVENT
	.comm	_ARCH_PERFMON_EVENTSEL_UMASK,4,2 ## @ARCH_PERFMON_EVENTSEL_UMASK
	.comm	_ARCH_PERFMON_EVENTSEL_EDGE,4,2 ## @ARCH_PERFMON_EVENTSEL_EDGE
	.comm	_ARCH_PERFMON_EVENTSEL_INV,4,2  ## @ARCH_PERFMON_EVENTSEL_INV
	.comm	_ARCH_PERFMON_EVENTSEL_CMASK,4,2 ## @ARCH_PERFMON_EVENTSEL_CMASK
	.comm	_PERF_COUNT_HW_MAX,4,2          ## @PERF_COUNT_HW_MAX
	.comm	_PERF_TYPE_HARDWARE,4,2         ## @PERF_TYPE_HARDWARE
	.comm	_X86_RAW_EVENT_MASK,4,2         ## @X86_RAW_EVENT_MASK
	.comm	_ARCH_PERFMON_EVENTSEL_USR,4,2  ## @ARCH_PERFMON_EVENTSEL_USR
	.comm	_ARCH_PERFMON_EVENTSEL_OS,4,2   ## @ARCH_PERFMON_EVENTSEL_OS
	.comm	_ARCH_PERFMON_EVENTSEL_INT,4,2  ## @ARCH_PERFMON_EVENTSEL_INT
	.no_dead_strip	_reprogram_gp_counter
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function reprogram_gp_counter
_reprogram_gp_counter:                  ; @reprogram_gp_counter
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x22, _PERF_TYPE_RAW@GOTPAGE
Lloh1:
	ldr	x22, [x22, _PERF_TYPE_RAW@GOTPAGEOFF]
	ldr	w21, [x22]
Lloh2:
	adrp	x8, _ARCH_PERFMON_EVENTSEL_PIN_CONTROL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _ARCH_PERFMON_EVENTSEL_PIN_CONTROL@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	tst	w8, w1
	b.eq	LBB0_2
; %bb.1:
Lloh5:
	adrp	x0, l_.str@PAGE
Lloh6:
	add	x0, x0, l_.str@PAGEOFF
	bl	_printk_once
LBB0_2:
	str	w20, [x19]
	mov	x0, x19
	bl	_stop_counter
Lloh7:
	adrp	x8, _ARCH_PERFMON_EVENTSEL_ENABLE@GOTPAGE
Lloh8:
	ldr	x8, [x8, _ARCH_PERFMON_EVENTSEL_ENABLE@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_6
; %bb.3:
	mov	x0, x19
	bl	_pmc_enabled
	cbz	w0, LBB0_6
; %bb.4:
Lloh10:
	adrp	x8, _ARCH_PERFMON_EVENTSEL_EDGE@GOTPAGE
Lloh11:
	ldr	x8, [x8, _ARCH_PERFMON_EVENTSEL_EDGE@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
Lloh13:
	adrp	x9, _ARCH_PERFMON_EVENTSEL_INV@GOTPAGE
Lloh14:
	ldr	x9, [x9, _ARCH_PERFMON_EVENTSEL_INV@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh16:
	adrp	x9, _ARCH_PERFMON_EVENTSEL_CMASK@GOTPAGE
Lloh17:
	ldr	x9, [x9, _ARCH_PERFMON_EVENTSEL_CMASK@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	orr	w8, w8, w9
	tst	w8, w20
	b.eq	LBB0_7
; %bb.5:
                                        ; implicit-def: $w0
	b	LBB0_8
LBB0_6:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_7:
Lloh19:
	adrp	x8, _ARCH_PERFMON_EVENTSEL_UMASK@GOTPAGE
Lloh20:
	ldr	x8, [x8, _ARCH_PERFMON_EVENTSEL_UMASK@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	and	w8, w8, w20
	asr	w2, w8, #8
Lloh22:
	adrp	x8, _ARCH_PERFMON_EVENTSEL_EVENT@GOTPAGE
Lloh23:
	ldr	x8, [x8, _ARCH_PERFMON_EVENTSEL_EVENT@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	and	w1, w8, w20
	ldr	x0, [x19, #8]
	bl	_find_arch_event
Lloh25:
	adrp	x8, _PERF_COUNT_HW_MAX@GOTPAGE
Lloh26:
	ldr	x8, [x8, _PERF_COUNT_HW_MAX@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
Lloh28:
	adrp	x9, _PERF_TYPE_HARDWARE@GOTPAGE
Lloh29:
	ldr	x9, [x9, _PERF_TYPE_HARDWARE@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	cmp	w0, w8
	csel	w21, w21, w9, eq
LBB0_8:
	ldr	w8, [x22]
Lloh31:
	adrp	x9, _X86_RAW_EVENT_MASK@GOTPAGE
Lloh32:
	ldr	x9, [x9, _X86_RAW_EVENT_MASK@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	and	w9, w9, w20
	cmp	w21, w8
	csel	w2, w9, w0, eq
Lloh34:
	adrp	x8, _ARCH_PERFMON_EVENTSEL_USR@GOTPAGE
Lloh35:
	ldr	x8, [x8, _ARCH_PERFMON_EVENTSEL_USR@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
	tst	w8, w20
	cset	w3, eq
Lloh37:
	adrp	x8, _ARCH_PERFMON_EVENTSEL_OS@GOTPAGE
Lloh38:
	ldr	x8, [x8, _ARCH_PERFMON_EVENTSEL_OS@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	tst	w8, w20
	cset	w4, eq
Lloh40:
	adrp	x8, _ARCH_PERFMON_EVENTSEL_INT@GOTPAGE
Lloh41:
	ldr	x8, [x8, _ARCH_PERFMON_EVENTSEL_INT@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	and	w5, w8, w20
	mov	x0, x19
	mov	x1, x21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_reprogram_counter
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.cfi_endproc
                                        ; -- End function
	.comm	_PERF_TYPE_RAW,4,2              ; @PERF_TYPE_RAW
	.comm	_ARCH_PERFMON_EVENTSEL_PIN_CONTROL,4,2 ; @ARCH_PERFMON_EVENTSEL_PIN_CONTROL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"kvm pmu: pin control bit is ignored\n"

	.comm	_ARCH_PERFMON_EVENTSEL_ENABLE,4,2 ; @ARCH_PERFMON_EVENTSEL_ENABLE
	.comm	_ARCH_PERFMON_EVENTSEL_EVENT,4,2 ; @ARCH_PERFMON_EVENTSEL_EVENT
	.comm	_ARCH_PERFMON_EVENTSEL_UMASK,4,2 ; @ARCH_PERFMON_EVENTSEL_UMASK
	.comm	_ARCH_PERFMON_EVENTSEL_EDGE,4,2 ; @ARCH_PERFMON_EVENTSEL_EDGE
	.comm	_ARCH_PERFMON_EVENTSEL_INV,4,2  ; @ARCH_PERFMON_EVENTSEL_INV
	.comm	_ARCH_PERFMON_EVENTSEL_CMASK,4,2 ; @ARCH_PERFMON_EVENTSEL_CMASK
	.comm	_PERF_COUNT_HW_MAX,4,2          ; @PERF_COUNT_HW_MAX
	.comm	_PERF_TYPE_HARDWARE,4,2         ; @PERF_TYPE_HARDWARE
	.comm	_X86_RAW_EVENT_MASK,4,2         ; @X86_RAW_EVENT_MASK
	.comm	_ARCH_PERFMON_EVENTSEL_USR,4,2  ; @ARCH_PERFMON_EVENTSEL_USR
	.comm	_ARCH_PERFMON_EVENTSEL_OS,4,2   ; @ARCH_PERFMON_EVENTSEL_OS
	.comm	_ARCH_PERFMON_EVENTSEL_INT,4,2  ; @ARCH_PERFMON_EVENTSEL_INT
	.no_dead_strip	_reprogram_gp_counter
.subsections_via_symbols
