	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function atl1c_pcie_patch
_atl1c_pcie_patch:                      ## @atl1c_pcie_patch
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_REG_MASTER_CTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-40(%rbp), %rdx
	callq	_AT_READ_REG
	movq	_MASTER_CTRL_CLK_SEL_DIS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	-40(%rbp), %edx
	movl	%edx, -40(%rbp)
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_AT_WRITE_REG
	movq	(%rbx), %rax
	movq	_athr_l1c@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_2
## %bb.1:
	movq	_athr_l2c@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_2
## %bb.3:
	movl	-40(%rbp), %eax
	movq	_MASTER_CTRL_WAKEN_25M@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	testl	%eax, %edx
	jne	LBB0_6
## %bb.4:
	movl	(%r14), %esi
	orl	%eax, %edx
	jmp	LBB0_5
LBB0_2:
	movq	_REG_PCIE_PHYMISC@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-36(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_AT_READ_REG
	movq	_PCIE_PHYMISC_FORCE_RCV_DET@GOTPCREL(%rip), %rax
	movl	-36(%rbp), %edx
	orl	(%rax), %edx
	movl	%edx, -36(%rbp)
	movl	(%r14), %esi
LBB0_5:
	movq	%rbx, %rdi
	callq	_AT_WRITE_REG
LBB0_6:
	movq	(%rbx), %rax
	movq	_athr_l2c_b@GOTPCREL(%rip), %r15
	movq	(%r15), %rcx
	cmpq	%rcx, %rax
	jne	LBB0_9
## %bb.7:
	movq	8(%rbx), %rax
	movq	_L2CB_V10@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_11
## %bb.8:
	movq	_REG_PCIE_PHYMISC2@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	leaq	-36(%rbp), %r14
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_AT_READ_REG
	movl	-36(%rbp), %edi
	movq	_PCIE_PHYMISC2_CDR_BW@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_L2CB1_PCIE_PHYMISC2_CDR_BW@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_FIELD_SETX
	movl	%eax, -36(%rbp)
	movq	_PCIE_PHYMISC2_L0S_TH@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_L2CB1_PCIE_PHYMISC2_L0S_TH@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	callq	_FIELD_SETX
	movl	%eax, -36(%rbp)
	movl	(%r12), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_AT_WRITE_REG
	movq	_REG_LINK_CTRL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_AT_READ_REG
	movq	_LINK_CTRL_EXT_SYNC@GOTPCREL(%rip), %rax
	movl	-36(%rbp), %edx
	orl	(%rax), %edx
	movl	%edx, -36(%rbp)
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_AT_WRITE_REG
	movq	(%rbx), %rax
	movq	(%r15), %rcx
LBB0_9:
	cmpq	%rcx, %rax
	je	LBB0_11
## %bb.10:
	movq	_athr_l1d@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_12
LBB0_11:
	movq	_REG_PM_CTRL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-36(%rbp), %r14
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_AT_READ_REG
	movq	_PM_CTRL_L0S_BUFSRX_EN@GOTPCREL(%rip), %rax
	movl	-36(%rbp), %edx
	orl	(%rax), %edx
	movl	%edx, -36(%rbp)
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_AT_WRITE_REG
	movq	_REG_DMA_DBG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_AT_READ_REG
	movl	(%r15), %esi
	movq	_DMA_DBG_VENDOR_MSG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	-36(%rbp), %edx
	movq	%rbx, %rdi
	callq	_AT_WRITE_REG
LBB0_12:
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_MASTER_CTRL,4,2            ## @REG_MASTER_CTRL
	.comm	_MASTER_CTRL_CLK_SEL_DIS,4,2    ## @MASTER_CTRL_CLK_SEL_DIS
	.comm	_athr_l1c,8,3                   ## @athr_l1c
	.comm	_athr_l2c,8,3                   ## @athr_l2c
	.comm	_REG_PCIE_PHYMISC,4,2           ## @REG_PCIE_PHYMISC
	.comm	_PCIE_PHYMISC_FORCE_RCV_DET,4,2 ## @PCIE_PHYMISC_FORCE_RCV_DET
	.comm	_MASTER_CTRL_WAKEN_25M,4,2      ## @MASTER_CTRL_WAKEN_25M
	.comm	_athr_l2c_b,8,3                 ## @athr_l2c_b
	.comm	_L2CB_V10,8,3                   ## @L2CB_V10
	.comm	_REG_PCIE_PHYMISC2,4,2          ## @REG_PCIE_PHYMISC2
	.comm	_PCIE_PHYMISC2_CDR_BW,4,2       ## @PCIE_PHYMISC2_CDR_BW
	.comm	_L2CB1_PCIE_PHYMISC2_CDR_BW,4,2 ## @L2CB1_PCIE_PHYMISC2_CDR_BW
	.comm	_PCIE_PHYMISC2_L0S_TH,4,2       ## @PCIE_PHYMISC2_L0S_TH
	.comm	_L2CB1_PCIE_PHYMISC2_L0S_TH,4,2 ## @L2CB1_PCIE_PHYMISC2_L0S_TH
	.comm	_REG_LINK_CTRL,4,2              ## @REG_LINK_CTRL
	.comm	_LINK_CTRL_EXT_SYNC,4,2         ## @LINK_CTRL_EXT_SYNC
	.comm	_athr_l1d,8,3                   ## @athr_l1d
	.comm	_REG_PM_CTRL,4,2                ## @REG_PM_CTRL
	.comm	_PM_CTRL_L0S_BUFSRX_EN,4,2      ## @PM_CTRL_L0S_BUFSRX_EN
	.comm	_REG_DMA_DBG,4,2                ## @REG_DMA_DBG
	.comm	_DMA_DBG_VENDOR_MSG,4,2         ## @DMA_DBG_VENDOR_MSG
	.no_dead_strip	_atl1c_pcie_patch
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function atl1c_pcie_patch
_atl1c_pcie_patch:                      ; @atl1c_pcie_patch
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x20, _REG_MASTER_CTRL@GOTPAGE
Lloh1:
	ldr	x20, [x20, _REG_MASTER_CTRL@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_AT_READ_REG
Lloh2:
	adrp	x8, _MASTER_CTRL_CLK_SEL_DIS@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MASTER_CTRL_CLK_SEL_DIS@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	ldr	w9, [sp, #12]
	bic	w2, w9, w8
	str	w2, [sp, #12]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_AT_WRITE_REG
	ldr	x8, [x19]
Lloh5:
	adrp	x9, _athr_l1c@GOTPAGE
Lloh6:
	ldr	x9, [x9, _athr_l1c@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
Lloh8:
	adrp	x10, _athr_l2c@GOTPAGE
Lloh9:
	ldr	x10, [x10, _athr_l2c@GOTPAGEOFF]
Lloh10:
	ldr	x10, [x10]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	b.ne	LBB0_2
; %bb.1:
Lloh11:
	adrp	x20, _REG_PCIE_PHYMISC@GOTPAGE
Lloh12:
	ldr	x20, [x20, _REG_PCIE_PHYMISC@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #8
	mov	x0, x19
	bl	_AT_READ_REG
Lloh13:
	adrp	x8, _PCIE_PHYMISC_FORCE_RCV_DET@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PCIE_PHYMISC_FORCE_RCV_DET@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	ldr	w9, [sp, #8]
	orr	w2, w9, w8
	str	w2, [sp, #8]
	ldr	w1, [x20]
	b	LBB0_4
LBB0_2:
	ldr	w8, [sp, #12]
Lloh16:
	adrp	x9, _MASTER_CTRL_WAKEN_25M@GOTPAGE
Lloh17:
	ldr	x9, [x9, _MASTER_CTRL_WAKEN_25M@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_5
; %bb.3:
	ldr	w1, [x20]
	orr	w2, w9, w8
LBB0_4:
	mov	x0, x19
	bl	_AT_WRITE_REG
LBB0_5:
	ldr	x8, [x19]
Lloh19:
	adrp	x20, _athr_l2c_b@GOTPAGE
Lloh20:
	ldr	x20, [x20, _athr_l2c_b@GOTPAGEOFF]
	ldr	x9, [x20]
	cmp	x8, x9
	b.ne	LBB0_8
; %bb.6:
	ldr	x8, [x19, #8]
Lloh21:
	adrp	x9, _L2CB_V10@GOTPAGE
Lloh22:
	ldr	x9, [x9, _L2CB_V10@GOTPAGEOFF]
Lloh23:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_9
; %bb.7:
Lloh24:
	adrp	x21, _REG_PCIE_PHYMISC2@GOTPAGE
Lloh25:
	ldr	x21, [x21, _REG_PCIE_PHYMISC2@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #8
	mov	x0, x19
	bl	_AT_READ_REG
	ldr	w0, [sp, #8]
Lloh26:
	adrp	x8, _PCIE_PHYMISC2_CDR_BW@GOTPAGE
Lloh27:
	ldr	x8, [x8, _PCIE_PHYMISC2_CDR_BW@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
Lloh29:
	adrp	x8, _L2CB1_PCIE_PHYMISC2_CDR_BW@GOTPAGE
Lloh30:
	ldr	x8, [x8, _L2CB1_PCIE_PHYMISC2_CDR_BW@GOTPAGEOFF]
Lloh31:
	ldr	w2, [x8]
	bl	_FIELD_SETX
	str	w0, [sp, #8]
Lloh32:
	adrp	x8, _PCIE_PHYMISC2_L0S_TH@GOTPAGE
Lloh33:
	ldr	x8, [x8, _PCIE_PHYMISC2_L0S_TH@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
Lloh35:
	adrp	x8, _L2CB1_PCIE_PHYMISC2_L0S_TH@GOTPAGE
Lloh36:
	ldr	x8, [x8, _L2CB1_PCIE_PHYMISC2_L0S_TH@GOTPAGEOFF]
Lloh37:
	ldr	w2, [x8]
	bl	_FIELD_SETX
	mov	x2, x0
	str	w0, [sp, #8]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_AT_WRITE_REG
Lloh38:
	adrp	x21, _REG_LINK_CTRL@GOTPAGE
Lloh39:
	ldr	x21, [x21, _REG_LINK_CTRL@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #8
	mov	x0, x19
	bl	_AT_READ_REG
Lloh40:
	adrp	x8, _LINK_CTRL_EXT_SYNC@GOTPAGE
Lloh41:
	ldr	x8, [x8, _LINK_CTRL_EXT_SYNC@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	ldr	w9, [sp, #8]
	orr	w2, w9, w8
	str	w2, [sp, #8]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_AT_WRITE_REG
	ldr	x8, [x19]
	ldr	x9, [x20]
LBB0_8:
Lloh43:
	adrp	x10, _athr_l1d@GOTPAGE
Lloh44:
	ldr	x10, [x10, _athr_l1d@GOTPAGEOFF]
Lloh45:
	ldr	x10, [x10]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	b.ne	LBB0_10
LBB0_9:
Lloh46:
	adrp	x20, _REG_PM_CTRL@GOTPAGE
Lloh47:
	ldr	x20, [x20, _REG_PM_CTRL@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #8
	mov	x0, x19
	bl	_AT_READ_REG
Lloh48:
	adrp	x8, _PM_CTRL_L0S_BUFSRX_EN@GOTPAGE
Lloh49:
	ldr	x8, [x8, _PM_CTRL_L0S_BUFSRX_EN@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
	ldr	w9, [sp, #8]
	orr	w2, w9, w8
	str	w2, [sp, #8]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_AT_WRITE_REG
Lloh51:
	adrp	x20, _REG_DMA_DBG@GOTPAGE
Lloh52:
	ldr	x20, [x20, _REG_DMA_DBG@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #8
	mov	x0, x19
	bl	_AT_READ_REG
	ldr	w1, [x20]
	ldr	w8, [sp, #8]
Lloh53:
	adrp	x9, _DMA_DBG_VENDOR_MSG@GOTPAGE
Lloh54:
	ldr	x9, [x9, _DMA_DBG_VENDOR_MSG@GOTPAGEOFF]
Lloh55:
	ldr	w9, [x9]
	bic	w2, w8, w9
	mov	x0, x19
	bl	_AT_WRITE_REG
LBB0_10:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh46, Lloh47
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_MASTER_CTRL,4,2            ; @REG_MASTER_CTRL
	.comm	_MASTER_CTRL_CLK_SEL_DIS,4,2    ; @MASTER_CTRL_CLK_SEL_DIS
	.comm	_athr_l1c,8,3                   ; @athr_l1c
	.comm	_athr_l2c,8,3                   ; @athr_l2c
	.comm	_REG_PCIE_PHYMISC,4,2           ; @REG_PCIE_PHYMISC
	.comm	_PCIE_PHYMISC_FORCE_RCV_DET,4,2 ; @PCIE_PHYMISC_FORCE_RCV_DET
	.comm	_MASTER_CTRL_WAKEN_25M,4,2      ; @MASTER_CTRL_WAKEN_25M
	.comm	_athr_l2c_b,8,3                 ; @athr_l2c_b
	.comm	_L2CB_V10,8,3                   ; @L2CB_V10
	.comm	_REG_PCIE_PHYMISC2,4,2          ; @REG_PCIE_PHYMISC2
	.comm	_PCIE_PHYMISC2_CDR_BW,4,2       ; @PCIE_PHYMISC2_CDR_BW
	.comm	_L2CB1_PCIE_PHYMISC2_CDR_BW,4,2 ; @L2CB1_PCIE_PHYMISC2_CDR_BW
	.comm	_PCIE_PHYMISC2_L0S_TH,4,2       ; @PCIE_PHYMISC2_L0S_TH
	.comm	_L2CB1_PCIE_PHYMISC2_L0S_TH,4,2 ; @L2CB1_PCIE_PHYMISC2_L0S_TH
	.comm	_REG_LINK_CTRL,4,2              ; @REG_LINK_CTRL
	.comm	_LINK_CTRL_EXT_SYNC,4,2         ; @LINK_CTRL_EXT_SYNC
	.comm	_athr_l1d,8,3                   ; @athr_l1d
	.comm	_REG_PM_CTRL,4,2                ; @REG_PM_CTRL
	.comm	_PM_CTRL_L0S_BUFSRX_EN,4,2      ; @PM_CTRL_L0S_BUFSRX_EN
	.comm	_REG_DMA_DBG,4,2                ; @REG_DMA_DBG
	.comm	_DMA_DBG_VENDOR_MSG,4,2         ; @DMA_DBG_VENDOR_MSG
	.no_dead_strip	_atl1c_pcie_patch
.subsections_via_symbols
