	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function load_state_from_tss32
_load_state_from_tss32:                 ## @load_state_from_tss32
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	68(%rsi), %esi
	callq	_kvm_set_cr3
	movl	64(%rbx), %esi
	movq	%r14, %rdi
	callq	_kvm_rip_write
	movq	_kvm_x86_ops@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movl	(%rbx), %esi
	orl	$2, %esi
	movq	%r14, %rdi
	callq	*(%rax)
	movq	_VCPU_REGS_RAX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	60(%rbx), %edx
	movq	%r14, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RCX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	56(%rbx), %edx
	movq	%r14, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RDX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	52(%rbx), %edx
	movq	%r14, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RBX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%rbx), %edx
	movq	%r14, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RSP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	44(%rbx), %edx
	movq	%r14, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RBP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	40(%rbx), %edx
	movq	%r14, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RSI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	36(%rbx), %edx
	movq	%r14, %rdi
	callq	_kvm_register_write
	movq	_VCPU_REGS_RDI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	32(%rbx), %edx
	movq	%r14, %rdi
	callq	_kvm_register_write
	movl	28(%rbx), %esi
	movq	_VCPU_SREG_LDTR@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_selector
	movl	24(%rbx), %esi
	movq	_VCPU_SREG_ES@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_selector
	movl	20(%rbx), %esi
	movq	_VCPU_SREG_CS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_selector
	movl	16(%rbx), %esi
	movq	_VCPU_SREG_SS@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_selector
	movl	12(%rbx), %esi
	movq	_VCPU_SREG_DS@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_selector
	movl	8(%rbx), %esi
	movq	_VCPU_SREG_FS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_selector
	movl	4(%rbx), %esi
	movq	_VCPU_SREG_GS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_selector
	movl	28(%rbx), %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_descriptor
	movl	$1, %r15d
	testq	%rax, %rax
	jne	LBB0_7
## %bb.1:
	movl	24(%rbx), %esi
	movq	_VCPU_SREG_ES@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_descriptor
	testq	%rax, %rax
	jne	LBB0_7
## %bb.2:
	movl	20(%rbx), %esi
	movq	_VCPU_SREG_CS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_descriptor
	testq	%rax, %rax
	jne	LBB0_7
## %bb.3:
	movl	16(%rbx), %esi
	movl	(%r13), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_descriptor
	testq	%rax, %rax
	jne	LBB0_7
## %bb.4:
	movl	12(%rbx), %esi
	movl	(%r12), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_descriptor
	testq	%rax, %rax
	jne	LBB0_7
## %bb.5:
	movl	8(%rbx), %esi
	movq	_VCPU_SREG_FS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_descriptor
	testq	%rax, %rax
	jne	LBB0_7
## %bb.6:
	movl	4(%rbx), %esi
	movq	_VCPU_SREG_GS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_kvm_load_segment_descriptor
	xorl	%r15d, %r15d
	testq	%rax, %rax
	setne	%r15b
LBB0_7:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_kvm_x86_ops,8,3                ## @kvm_x86_ops
	.comm	_VCPU_REGS_RAX,4,2              ## @VCPU_REGS_RAX
	.comm	_VCPU_REGS_RCX,4,2              ## @VCPU_REGS_RCX
	.comm	_VCPU_REGS_RDX,4,2              ## @VCPU_REGS_RDX
	.comm	_VCPU_REGS_RBX,4,2              ## @VCPU_REGS_RBX
	.comm	_VCPU_REGS_RSP,4,2              ## @VCPU_REGS_RSP
	.comm	_VCPU_REGS_RBP,4,2              ## @VCPU_REGS_RBP
	.comm	_VCPU_REGS_RSI,4,2              ## @VCPU_REGS_RSI
	.comm	_VCPU_REGS_RDI,4,2              ## @VCPU_REGS_RDI
	.comm	_VCPU_SREG_LDTR,4,2             ## @VCPU_SREG_LDTR
	.comm	_VCPU_SREG_ES,4,2               ## @VCPU_SREG_ES
	.comm	_VCPU_SREG_CS,4,2               ## @VCPU_SREG_CS
	.comm	_VCPU_SREG_SS,4,2               ## @VCPU_SREG_SS
	.comm	_VCPU_SREG_DS,4,2               ## @VCPU_SREG_DS
	.comm	_VCPU_SREG_FS,4,2               ## @VCPU_SREG_FS
	.comm	_VCPU_SREG_GS,4,2               ## @VCPU_SREG_GS
	.no_dead_strip	_load_state_from_tss32
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function load_state_from_tss32
_load_state_from_tss32:                 ; @load_state_from_tss32
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x1
	mov	x19, x0
	ldr	w1, [x1, #68]
	bl	_kvm_set_cr3
	ldr	w1, [x20, #64]
	mov	x0, x19
	bl	_kvm_rip_write
Lloh0:
	adrp	x8, _kvm_x86_ops@GOTPAGE
Lloh1:
	ldr	x8, [x8, _kvm_x86_ops@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	ldr	x8, [x8]
	ldr	w9, [x20]
	orr	w1, w9, #0x2
	mov	x0, x19
	blr	x8
Lloh3:
	adrp	x8, _VCPU_REGS_RAX@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VCPU_REGS_RAX@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	w2, [x20, #60]
	mov	x0, x19
	bl	_kvm_register_write
Lloh6:
	adrp	x8, _VCPU_REGS_RCX@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VCPU_REGS_RCX@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	ldr	w2, [x20, #56]
	mov	x0, x19
	bl	_kvm_register_write
Lloh9:
	adrp	x8, _VCPU_REGS_RDX@GOTPAGE
Lloh10:
	ldr	x8, [x8, _VCPU_REGS_RDX@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	w2, [x20, #52]
	mov	x0, x19
	bl	_kvm_register_write
Lloh12:
	adrp	x8, _VCPU_REGS_RBX@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VCPU_REGS_RBX@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	w2, [x20, #48]
	mov	x0, x19
	bl	_kvm_register_write
Lloh15:
	adrp	x8, _VCPU_REGS_RSP@GOTPAGE
Lloh16:
	ldr	x8, [x8, _VCPU_REGS_RSP@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	ldr	w2, [x20, #44]
	mov	x0, x19
	bl	_kvm_register_write
Lloh18:
	adrp	x8, _VCPU_REGS_RBP@GOTPAGE
Lloh19:
	ldr	x8, [x8, _VCPU_REGS_RBP@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	ldr	w2, [x20, #40]
	mov	x0, x19
	bl	_kvm_register_write
Lloh21:
	adrp	x8, _VCPU_REGS_RSI@GOTPAGE
Lloh22:
	ldr	x8, [x8, _VCPU_REGS_RSI@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	ldr	w2, [x20, #36]
	mov	x0, x19
	bl	_kvm_register_write
Lloh24:
	adrp	x8, _VCPU_REGS_RDI@GOTPAGE
Lloh25:
	ldr	x8, [x8, _VCPU_REGS_RDI@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	ldr	w2, [x20, #32]
	mov	x0, x19
	bl	_kvm_register_write
	ldr	w1, [x20, #28]
Lloh27:
	adrp	x27, _VCPU_SREG_LDTR@GOTPAGE
Lloh28:
	ldr	x27, [x27, _VCPU_SREG_LDTR@GOTPAGEOFF]
	ldr	w2, [x27]
	mov	x0, x19
	bl	_kvm_load_segment_selector
	ldr	w1, [x20, #24]
Lloh29:
	adrp	x26, _VCPU_SREG_ES@GOTPAGE
Lloh30:
	ldr	x26, [x26, _VCPU_SREG_ES@GOTPAGEOFF]
	ldr	w2, [x26]
	mov	x0, x19
	bl	_kvm_load_segment_selector
	ldr	w1, [x20, #20]
Lloh31:
	adrp	x25, _VCPU_SREG_CS@GOTPAGE
Lloh32:
	ldr	x25, [x25, _VCPU_SREG_CS@GOTPAGEOFF]
	ldr	w2, [x25]
	mov	x0, x19
	bl	_kvm_load_segment_selector
	ldr	w1, [x20, #16]
Lloh33:
	adrp	x24, _VCPU_SREG_SS@GOTPAGE
Lloh34:
	ldr	x24, [x24, _VCPU_SREG_SS@GOTPAGEOFF]
	ldr	w2, [x24]
	mov	x0, x19
	bl	_kvm_load_segment_selector
	ldr	w1, [x20, #12]
Lloh35:
	adrp	x23, _VCPU_SREG_DS@GOTPAGE
Lloh36:
	ldr	x23, [x23, _VCPU_SREG_DS@GOTPAGEOFF]
	ldr	w2, [x23]
	mov	x0, x19
	bl	_kvm_load_segment_selector
	ldr	w1, [x20, #8]
Lloh37:
	adrp	x22, _VCPU_SREG_FS@GOTPAGE
Lloh38:
	ldr	x22, [x22, _VCPU_SREG_FS@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x19
	bl	_kvm_load_segment_selector
	ldr	w1, [x20, #4]
Lloh39:
	adrp	x21, _VCPU_SREG_GS@GOTPAGE
Lloh40:
	ldr	x21, [x21, _VCPU_SREG_GS@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_kvm_load_segment_selector
	ldr	w1, [x20, #28]
	ldr	w2, [x27]
	mov	x0, x19
	bl	_kvm_load_segment_descriptor
	cbnz	x0, LBB0_6
; %bb.1:
	ldr	w1, [x20, #24]
	ldr	w2, [x26]
	mov	x0, x19
	bl	_kvm_load_segment_descriptor
	cbnz	x0, LBB0_6
; %bb.2:
	ldr	w1, [x20, #20]
	ldr	w2, [x25]
	mov	x0, x19
	bl	_kvm_load_segment_descriptor
	cbnz	x0, LBB0_6
; %bb.3:
	ldr	w1, [x20, #16]
	ldr	w2, [x24]
	mov	x0, x19
	bl	_kvm_load_segment_descriptor
	cbnz	x0, LBB0_6
; %bb.4:
	ldr	w1, [x20, #12]
	ldr	w2, [x23]
	mov	x0, x19
	bl	_kvm_load_segment_descriptor
	cbnz	x0, LBB0_6
; %bb.5:
	ldr	w1, [x20, #8]
	ldr	w2, [x22]
	mov	x0, x19
	bl	_kvm_load_segment_descriptor
	cbz	x0, LBB0_8
LBB0_6:
	mov	w0, #1
LBB0_7:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_8:
	ldr	w1, [x20, #4]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_kvm_load_segment_descriptor
	cmp	x0, #0
	cset	w0, ne
	b	LBB0_7
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_kvm_x86_ops,8,3                ; @kvm_x86_ops
	.comm	_VCPU_REGS_RAX,4,2              ; @VCPU_REGS_RAX
	.comm	_VCPU_REGS_RCX,4,2              ; @VCPU_REGS_RCX
	.comm	_VCPU_REGS_RDX,4,2              ; @VCPU_REGS_RDX
	.comm	_VCPU_REGS_RBX,4,2              ; @VCPU_REGS_RBX
	.comm	_VCPU_REGS_RSP,4,2              ; @VCPU_REGS_RSP
	.comm	_VCPU_REGS_RBP,4,2              ; @VCPU_REGS_RBP
	.comm	_VCPU_REGS_RSI,4,2              ; @VCPU_REGS_RSI
	.comm	_VCPU_REGS_RDI,4,2              ; @VCPU_REGS_RDI
	.comm	_VCPU_SREG_LDTR,4,2             ; @VCPU_SREG_LDTR
	.comm	_VCPU_SREG_ES,4,2               ; @VCPU_SREG_ES
	.comm	_VCPU_SREG_CS,4,2               ; @VCPU_SREG_CS
	.comm	_VCPU_SREG_SS,4,2               ; @VCPU_SREG_SS
	.comm	_VCPU_SREG_DS,4,2               ; @VCPU_SREG_DS
	.comm	_VCPU_SREG_FS,4,2               ; @VCPU_SREG_FS
	.comm	_VCPU_SREG_GS,4,2               ; @VCPU_SREG_GS
	.no_dead_strip	_load_state_from_tss32
.subsections_via_symbols
