	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_gart_table_vram_pin     ## -- Begin function radeon_gart_table_vram_pin
	.p2align	4, 0x90
_radeon_gart_table_vram_pin:            ## @radeon_gart_table_vram_pin
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movl	4(%rdi), %edi
	xorl	%esi, %esi
	callq	_radeon_bo_reserve
	movl	%eax, %ebx
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_6
## %bb.1:
	movl	4(%r14), %edi
	movq	_RADEON_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-20(%rbp), %rdx
	callq	_radeon_bo_pin
	movl	4(%r14), %edi
	testl	%eax, %eax
	je	LBB0_3
## %bb.2:
	movl	%eax, %ebx
	callq	_radeon_bo_unreserve
	jmp	LBB0_6
LBB0_3:
	leaq	8(%r14), %rsi
	callq	_radeon_bo_kmap
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	movl	4(%r14), %edi
	callq	_radeon_bo_unpin
LBB0_5:
	movl	4(%r14), %edi
	callq	_radeon_bo_unreserve
	movl	-20(%rbp), %eax
	movl	%eax, (%r14)
LBB0_6:
	movl	%ebx, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_GEM_DOMAIN_VRAM,4,2     ## @RADEON_GEM_DOMAIN_VRAM
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_gart_table_vram_pin     ; -- Begin function radeon_gart_table_vram_pin
	.p2align	2
_radeon_gart_table_vram_pin:            ; @radeon_gart_table_vram_pin
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w0, [x0, #4]
	mov	w1, #0
	bl	_radeon_bo_reserve
	mov	x20, x0
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbnz	x0, LBB0_6
; %bb.1:
	ldr	w0, [x19, #4]
Lloh0:
	adrp	x8, _RADEON_GEM_DOMAIN_VRAM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #12
	bl	_radeon_bo_pin
	mov	x20, x0
	ldr	w0, [x19, #4]
	cbz	w20, LBB0_3
; %bb.2:
	bl	_radeon_bo_unreserve
	b	LBB0_6
LBB0_3:
	add	x1, x19, #8
	bl	_radeon_bo_kmap
	mov	x20, x0
	cbz	w0, LBB0_5
; %bb.4:
	ldr	w0, [x19, #4]
	bl	_radeon_bo_unpin
LBB0_5:
	ldr	w0, [x19, #4]
	bl	_radeon_bo_unreserve
	ldr	w8, [sp, #12]
	str	w8, [x19]
LBB0_6:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_GEM_DOMAIN_VRAM,4,2     ; @RADEON_GEM_DOMAIN_VRAM
.subsections_via_symbols
