	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_gen7_queue_flip
_intel_gen7_queue_flip:                 ## @intel_gen7_queue_flip
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r15
	movq	%rdx, -64(%rbp)                 ## 8-byte Spill
	movq	%rdi, %rbx
	movq	(%rdi), %r12
	movq	%rsi, %rdi
	callq	_to_intel_crtc
	movq	%rax, %r14
	movq	_BCS@GOTPCREL(%rip), %rax
	movq	(%rax), %r13
	shlq	$2, %r13
	addq	(%r12), %r13
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	callq	_intel_pin_and_fence_fb_obj
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_6
## %bb.1:
	movq	-64(%rbp), %r12                 ## 8-byte Reload
	movl	(%r14), %eax
	addl	$-128, %eax
	cmpl	$3, %eax
	jae	LBB0_2
## %bb.4:
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	cltq
	leaq	l_switch.table.intel_gen7_queue_flip(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	%r13, %rdi
	movl	$4, %esi
	callq	_intel_ring_begin
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_3
## %bb.5:
	movq	_MI_DISPLAY_FLIP_I915@GOTPCREL(%rip), %rax
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	orl	(%rax), %esi
	movq	%r13, %rdi
	callq	_intel_ring_emit
	movq	(%r12), %rax
	movl	(%r15), %esi
	orl	(%rax), %esi
	movq	%r13, %rdi
	callq	_intel_ring_emit
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movl	4(%rbx), %esi
	addl	4(%r15), %esi
	movq	%r13, %rdi
	callq	_intel_ring_emit
	movq	_MI_NOOP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_intel_ring_emit
	movq	%rbx, %rdi
	callq	_intel_mark_page_flip_active
	movq	%r13, %rdi
	callq	_intel_ring_advance
	xorl	%ebx, %ebx
	jmp	LBB0_6
LBB0_2:
	leaq	L_.str(%rip), %rsi
	movl	$1, %edi
	callq	_WARN_ONCE
	movq	_ENODEV@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_3:
	movq	%r15, %rdi
	callq	_intel_unpin_fb_obj
LBB0_6:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BCS,8,3                        ## @BCS
	.comm	_MI_DISPLAY_FLIP_IVB_PLANE_A,4,2 ## @MI_DISPLAY_FLIP_IVB_PLANE_A
	.comm	_MI_DISPLAY_FLIP_IVB_PLANE_B,4,2 ## @MI_DISPLAY_FLIP_IVB_PLANE_B
	.comm	_MI_DISPLAY_FLIP_IVB_PLANE_C,4,2 ## @MI_DISPLAY_FLIP_IVB_PLANE_C
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"unknown plane in flip command\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_MI_DISPLAY_FLIP_I915,4,2       ## @MI_DISPLAY_FLIP_I915
	.comm	_MI_NOOP,4,2                    ## @MI_NOOP
	.no_dead_strip	_intel_gen7_queue_flip
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.intel_gen7_queue_flip
l_switch.table.intel_gen7_queue_flip:
	.quad	_MI_DISPLAY_FLIP_IVB_PLANE_C
	.quad	_MI_DISPLAY_FLIP_IVB_PLANE_B
	.quad	_MI_DISPLAY_FLIP_IVB_PLANE_A

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_gen7_queue_flip
_intel_gen7_queue_flip:                 ; @intel_gen7_queue_flip
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x3
	mov	x22, x2
	mov	x23, x0
	ldr	x21, [x0]
	mov	x0, x1
	bl	_to_intel_crtc
	mov	x20, x0
	ldr	x8, [x21]
Lloh0:
	adrp	x9, _BCS@GOTPAGE
Lloh1:
	ldr	x9, [x9, _BCS@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x21, x8, x9, lsl #2
	mov	x0, x23
	mov	x1, x19
	mov	x2, x21
	bl	_intel_pin_and_fence_fb_obj
	mov	x23, x0
	cbnz	w0, LBB0_6
; %bb.1:
	ldr	w8, [x20]
	sub	w8, w8, #128
	cmp	w8, #3
	b.hs	LBB0_4
; %bb.2:
Lloh3:
	adrp	x9, l_switch.table.intel_gen7_queue_flip@PAGE
Lloh4:
	add	x9, x9, l_switch.table.intel_gen7_queue_flip@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	ldr	w24, [x8]
	mov	x0, x21
	mov	w1, #4
	bl	_intel_ring_begin
	mov	x23, x0
	cbnz	w0, LBB0_5
; %bb.3:
Lloh5:
	adrp	x8, _MI_DISPLAY_FLIP_I915@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MI_DISPLAY_FLIP_I915@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	orr	w1, w8, w24
	mov	x0, x21
	bl	_intel_ring_emit
	ldr	x8, [x22]
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w1, w9, w8
	mov	x0, x21
	bl	_intel_ring_emit
	ldr	w8, [x19, #4]
	ldr	w9, [x20, #4]
	add	w1, w9, w8
	mov	x0, x21
	bl	_intel_ring_emit
Lloh8:
	adrp	x8, _MI_NOOP@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MI_NOOP@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_intel_ring_emit
	mov	x0, x20
	bl	_intel_mark_page_flip_active
	mov	x0, x21
	bl	_intel_ring_advance
	b	LBB0_6
LBB0_4:
Lloh11:
	adrp	x1, l_.str@PAGE
Lloh12:
	add	x1, x1, l_.str@PAGEOFF
	mov	w0, #1
	bl	_WARN_ONCE
Lloh13:
	adrp	x8, _ENODEV@GOTPAGE
Lloh14:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	neg	w23, w8
LBB0_5:
	mov	x0, x19
	bl	_intel_unpin_fb_obj
LBB0_6:
	mov	x0, x23
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_BCS,8,3                        ; @BCS
	.comm	_MI_DISPLAY_FLIP_IVB_PLANE_A,4,2 ; @MI_DISPLAY_FLIP_IVB_PLANE_A
	.comm	_MI_DISPLAY_FLIP_IVB_PLANE_B,4,2 ; @MI_DISPLAY_FLIP_IVB_PLANE_B
	.comm	_MI_DISPLAY_FLIP_IVB_PLANE_C,4,2 ; @MI_DISPLAY_FLIP_IVB_PLANE_C
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"unknown plane in flip command\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_MI_DISPLAY_FLIP_I915,4,2       ; @MI_DISPLAY_FLIP_I915
	.comm	_MI_NOOP,4,2                    ; @MI_NOOP
	.no_dead_strip	_intel_gen7_queue_flip
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.intel_gen7_queue_flip
l_switch.table.intel_gen7_queue_flip:
	.quad	_MI_DISPLAY_FLIP_IVB_PLANE_C
	.quad	_MI_DISPLAY_FLIP_IVB_PLANE_B
	.quad	_MI_DISPLAY_FLIP_IVB_PLANE_A

.subsections_via_symbols
