	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tg3_tx_rcbs_init
_tg3_tx_rcbs_init:                      ## @tg3_tx_rcbs_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_NIC_SRAM_SEND_RCB@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_ENABLE_TSS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_tg3_flag
	xorl	%edx, %edx
	testq	%rax, %rax
	setne	%dl
	movl	(%r14), %ecx
	cmpl	%edx, %ecx
	jle	LBB0_5
## %bb.1:
	xorl	%ebx, %ebx
	testq	%rax, %rax
	setne	%bl
	movq	_TG3_BDINFO_SIZE@GOTPCREL(%rip), %r12
	movq	_NIC_SRAM_TX_BUFFER_DESC@GOTPCREL(%rip), %r13
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%rbx
	addl	(%r12), %r15d
	cmpl	%ebx, %ecx
	jle	LBB0_5
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r14), %rax
	cmpl	$0, 4(%rax,%rbx,8)
	je	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	(%rax,%rbx,8), %edx
	movq	_TG3_TX_RING_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_BDINFO_FLAGS_MAXLEN_SHIFT@GOTPCREL(%rip), %rcx
	movzbl	(%rcx), %ecx
	shll	%cl, %eax
	movl	(%r13), %r8d
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%eax, %ecx
	callq	_tg3_set_bdinfo
	movl	(%r14), %ecx
	jmp	LBB0_4
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NIC_SRAM_SEND_RCB,4,2          ## @NIC_SRAM_SEND_RCB
	.comm	_ENABLE_TSS,4,2                 ## @ENABLE_TSS
	.comm	_TG3_TX_RING_SIZE,4,2           ## @TG3_TX_RING_SIZE
	.comm	_BDINFO_FLAGS_MAXLEN_SHIFT,4,2  ## @BDINFO_FLAGS_MAXLEN_SHIFT
	.comm	_NIC_SRAM_TX_BUFFER_DESC,4,2    ## @NIC_SRAM_TX_BUFFER_DESC
	.comm	_TG3_BDINFO_SIZE,8,3            ## @TG3_BDINFO_SIZE
	.no_dead_strip	_tg3_tx_rcbs_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tg3_tx_rcbs_init
_tg3_tx_rcbs_init:                      ; @tg3_tx_rcbs_init
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x8, _NIC_SRAM_SEND_RCB@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NIC_SRAM_SEND_RCB@GOTPAGEOFF]
Lloh2:
	ldr	w20, [x8]
Lloh3:
	adrp	x8, _ENABLE_TSS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ENABLE_TSS@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_tg3_flag
	cmp	x0, #0
	cset	w9, ne
	ldr	w8, [x19]
	cmp	w8, w9
	b.le	LBB0_5
; %bb.1:
	cmp	x0, #0
	cset	w21, ne
	lsl	x22, x21, #3
Lloh6:
	adrp	x23, _TG3_BDINFO_SIZE@GOTPAGE
Lloh7:
	ldr	x23, [x23, _TG3_BDINFO_SIZE@GOTPAGEOFF]
Lloh8:
	adrp	x24, _TG3_TX_RING_SIZE@GOTPAGE
Lloh9:
	ldr	x24, [x24, _TG3_TX_RING_SIZE@GOTPAGEOFF]
Lloh10:
	adrp	x25, _BDINFO_FLAGS_MAXLEN_SHIFT@GOTPAGE
Lloh11:
	ldr	x25, [x25, _BDINFO_FLAGS_MAXLEN_SHIFT@GOTPAGEOFF]
Lloh12:
	adrp	x26, _NIC_SRAM_TX_BUFFER_DESC@GOTPAGE
Lloh13:
	ldr	x26, [x26, _NIC_SRAM_TX_BUFFER_DESC@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	ldr	w9, [x23]
	add	w20, w20, w9
	add	x22, x22, #8
	add	w21, w21, #1
	cmp	w8, w21
	b.le	LBB0_5
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x19, #8]
	add	x10, x9, x22
	ldr	w10, [x10, #4]
	cbz	w10, LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w2, [x9, x22]
	ldr	w8, [x24]
	ldr	w9, [x25]
	lsl	w3, w8, w9
	ldr	w4, [x26]
	mov	x0, x19
	mov	x1, x20
	bl	_tg3_set_bdinfo
	ldr	w8, [x19]
	b	LBB0_2
LBB0_5:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_NIC_SRAM_SEND_RCB,4,2          ; @NIC_SRAM_SEND_RCB
	.comm	_ENABLE_TSS,4,2                 ; @ENABLE_TSS
	.comm	_TG3_TX_RING_SIZE,4,2           ; @TG3_TX_RING_SIZE
	.comm	_BDINFO_FLAGS_MAXLEN_SHIFT,4,2  ; @BDINFO_FLAGS_MAXLEN_SHIFT
	.comm	_NIC_SRAM_TX_BUFFER_DESC,4,2    ; @NIC_SRAM_TX_BUFFER_DESC
	.comm	_TG3_BDINFO_SIZE,8,3            ; @TG3_BDINFO_SIZE
	.no_dead_strip	_tg3_tx_rcbs_init
.subsections_via_symbols
