	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ironlake_update_wm
_ironlake_update_wm:                    ## @ironlake_update_wm
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_ILK_LP0_PLANE_LATENCY@GOTPCREL(%rip), %r15
	movl	(%r15), %ecx
	movq	_ILK_LP0_CURSOR_LATENCY@GOTPCREL(%rip), %r12
	movl	(%r12), %r9d
	leaq	-44(%rbp), %rax
	leaq	-48(%rbp), %r13
	movq	_ironlake_display_wm_info@GOTPCREL(%rip), %rdx
	movq	_ironlake_cursor_wm_info@GOTPCREL(%rip), %r8
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	pushq	%rax
	pushq	%r13
	callq	_g4x_compute_wm0
	addq	$16, %rsp
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movl	-48(%rbp), %esi
	movq	_WM0_PIPE_PLANE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %esi
	movq	_WM0_PIPEA_ILK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	orl	-44(%rbp), %esi
	callq	_I915_WRITE
	movl	-48(%rbp), %esi
	movl	-44(%rbp), %edx
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_KMS
	movl	$1, %ebx
LBB0_2:
	movl	(%r15), %ecx
	movl	(%r12), %r9d
	movq	_ironlake_display_wm_info@GOTPCREL(%rip), %rdx
	movq	_ironlake_cursor_wm_info@GOTPCREL(%rip), %r8
	movq	%r14, %rdi
	movl	$1, %esi
	leaq	-44(%rbp), %rax
	pushq	%rax
	pushq	%r13
	callq	_g4x_compute_wm0
	addq	$16, %rsp
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movl	-48(%rbp), %esi
	movq	_WM0_PIPE_PLANE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %esi
	movq	_WM0_PIPEB_ILK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	orl	-44(%rbp), %esi
	callq	_I915_WRITE
	movl	-48(%rbp), %esi
	movl	-44(%rbp), %edx
	leaq	L_.str.1(%rip), %rdi
	callq	_DRM_DEBUG_KMS
	orl	$2, %ebx
LBB0_4:
	movq	_WM3_LP_ILK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_I915_WRITE
	movq	_WM2_LP_ILK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_I915_WRITE
	movq	_WM1_LP_ILK@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	xorl	%esi, %esi
	callq	_I915_WRITE
	movl	%ebx, %edi
	callq	_single_plane_enabled
	testl	%eax, %eax
	je	LBB0_8
## %bb.5:
	bsfl	%ebx, %eax
	movl	$-1, %r12d
	cmovnel	%eax, %r12d
	xorl	%eax, %eax
	callq	_ILK_READ_WM1_LATENCY
	imull	$500, %eax, %ecx                ## imm = 0x1F4
	subq	$8, %rsp
	leaq	-52(%rbp), %rbx
	movq	_ironlake_display_srwm_info@GOTPCREL(%rip), %r8
	movq	_ironlake_cursor_srwm_info@GOTPCREL(%rip), %r9
	movq	%r14, %rdi
	movl	$1, %esi
	movl	%r12d, %edx
	leaq	-44(%rbp), %rax
	pushq	%rax
	pushq	%r13
	pushq	%rbx
	callq	_ironlake_compute_srwm
	addq	$32, %rsp
	testl	%eax, %eax
	je	LBB0_8
## %bb.6:
	movl	(%r15), %r15d
	movq	_WM1_LP_SR_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	xorl	%eax, %eax
	callq	_ILK_READ_WM1_LATENCY
	movq	_WM1_LP_LATENCY_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	-52(%rbp), %edx
	movq	_WM1_LP_FBC_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%eax, %ebx
	movl	-48(%rbp), %esi
	movq	_WM1_LP_SR_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %esi
	orl	%edx, %esi
	orl	%ebx, %esi
	orl	-44(%rbp), %esi
	movl	%r15d, %edi
	callq	_I915_WRITE
	xorl	%eax, %eax
	callq	_ILK_READ_WM2_LATENCY
	imull	$500, %eax, %ecx                ## imm = 0x1F4
	subq	$8, %rsp
	movq	_ironlake_display_srwm_info@GOTPCREL(%rip), %r8
	movq	_ironlake_cursor_srwm_info@GOTPCREL(%rip), %r9
	movq	%r14, %rdi
	movl	$2, %esi
	movl	%r12d, %edx
	leaq	-44(%rbp), %rax
	pushq	%rax
	pushq	%r13
	leaq	-52(%rbp), %rax
	pushq	%rax
	callq	_ironlake_compute_srwm
	addq	$32, %rsp
	testl	%eax, %eax
	je	LBB0_8
## %bb.7:
	movq	_WM2_LP_ILK@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	_WM2_LP_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	xorl	%eax, %eax
	callq	_ILK_READ_WM2_LATENCY
	movq	_WM1_LP_LATENCY_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %ebx
	movl	-52(%rbp), %eax
	movq	_WM1_LP_FBC_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	-48(%rbp), %esi
	movq	_WM1_LP_SR_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	orl	%eax, %esi
	orl	%ebx, %esi
	orl	-44(%rbp), %esi
	movl	%r14d, %edi
	callq	_I915_WRITE
LBB0_8:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ironlake_display_wm_info,4,2   ## @ironlake_display_wm_info
	.comm	_ILK_LP0_PLANE_LATENCY,4,2      ## @ILK_LP0_PLANE_LATENCY
	.comm	_ironlake_cursor_wm_info,4,2    ## @ironlake_cursor_wm_info
	.comm	_ILK_LP0_CURSOR_LATENCY,4,2     ## @ILK_LP0_CURSOR_LATENCY
	.comm	_WM0_PIPEA_ILK,4,2              ## @WM0_PIPEA_ILK
	.comm	_WM0_PIPE_PLANE_SHIFT,4,2       ## @WM0_PIPE_PLANE_SHIFT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"FIFO watermarks For pipe A - plane %d, cursor: %d\n"

	.comm	_WM0_PIPEB_ILK,4,2              ## @WM0_PIPEB_ILK
L_.str.1:                               ## @.str.1
	.asciz	"FIFO watermarks For pipe B - plane %d, cursor: %d\n"

	.comm	_WM3_LP_ILK,4,2                 ## @WM3_LP_ILK
	.comm	_WM2_LP_ILK,4,2                 ## @WM2_LP_ILK
	.comm	_WM1_LP_ILK,4,2                 ## @WM1_LP_ILK
	.comm	_ironlake_display_srwm_info,4,2 ## @ironlake_display_srwm_info
	.comm	_ironlake_cursor_srwm_info,4,2  ## @ironlake_cursor_srwm_info
	.comm	_WM1_LP_SR_EN,4,2               ## @WM1_LP_SR_EN
	.comm	_WM1_LP_LATENCY_SHIFT,4,2       ## @WM1_LP_LATENCY_SHIFT
	.comm	_WM1_LP_FBC_SHIFT,4,2           ## @WM1_LP_FBC_SHIFT
	.comm	_WM1_LP_SR_SHIFT,4,2            ## @WM1_LP_SR_SHIFT
	.comm	_WM2_LP_EN,4,2                  ## @WM2_LP_EN
	.no_dead_strip	_ironlake_update_wm
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ironlake_update_wm
_ironlake_update_wm:                    ; @ironlake_update_wm
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x22, _ILK_LP0_PLANE_LATENCY@GOTPAGE
Lloh1:
	ldr	x22, [x22, _ILK_LP0_PLANE_LATENCY@GOTPAGEOFF]
	ldr	w3, [x22]
Lloh2:
	adrp	x23, _ILK_LP0_CURSOR_LATENCY@GOTPAGE
Lloh3:
	ldr	x23, [x23, _ILK_LP0_CURSOR_LATENCY@GOTPAGEOFF]
	ldr	w5, [x23]
Lloh4:
	adrp	x2, _ironlake_display_wm_info@GOTPAGE
Lloh5:
	ldr	x2, [x2, _ironlake_display_wm_info@GOTPAGEOFF]
Lloh6:
	adrp	x4, _ironlake_cursor_wm_info@GOTPAGE
Lloh7:
	ldr	x4, [x4, _ironlake_cursor_wm_info@GOTPAGEOFF]
	add	x6, sp, #24
	add	x7, sp, #20
	mov	w1, #0
	bl	_g4x_compute_wm0
Lloh8:
	adrp	x21, _WM0_PIPE_PLANE_SHIFT@GOTPAGE
Lloh9:
	ldr	x21, [x21, _WM0_PIPE_PLANE_SHIFT@GOTPAGEOFF]
	cbz	x0, LBB0_2
; %bb.1:
Lloh10:
	adrp	x8, _WM0_PIPEA_ILK@GOTPAGE
Lloh11:
	ldr	x8, [x8, _WM0_PIPEA_ILK@GOTPAGEOFF]
Lloh12:
	ldr	w0, [x8]
	ldr	w8, [sp, #24]
	ldr	w9, [x21]
	lsl	w8, w8, w9
	ldr	w9, [sp, #20]
	orr	w1, w8, w9
	bl	_I915_WRITE
	ldp	w2, w1, [sp, #20]
Lloh13:
	adrp	x0, l_.str@PAGE
Lloh14:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
	mov	w20, #1
	b	LBB0_3
LBB0_2:
	mov	w20, #0
LBB0_3:
	ldr	w3, [x22]
	ldr	w5, [x23]
Lloh15:
	adrp	x2, _ironlake_display_wm_info@GOTPAGE
Lloh16:
	ldr	x2, [x2, _ironlake_display_wm_info@GOTPAGEOFF]
Lloh17:
	adrp	x4, _ironlake_cursor_wm_info@GOTPAGE
Lloh18:
	ldr	x4, [x4, _ironlake_cursor_wm_info@GOTPAGEOFF]
	add	x6, sp, #24
	add	x7, sp, #20
	mov	x0, x19
	mov	w1, #1
	bl	_g4x_compute_wm0
	cbz	x0, LBB0_5
; %bb.4:
Lloh19:
	adrp	x8, _WM0_PIPEB_ILK@GOTPAGE
Lloh20:
	ldr	x8, [x8, _WM0_PIPEB_ILK@GOTPAGEOFF]
Lloh21:
	ldr	w0, [x8]
	ldr	w8, [sp, #24]
	ldr	w9, [x21]
	lsl	w8, w8, w9
	ldr	w9, [sp, #20]
	orr	w1, w8, w9
	bl	_I915_WRITE
	ldp	w2, w1, [sp, #20]
Lloh22:
	adrp	x0, l_.str.1@PAGE
Lloh23:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_DEBUG_KMS
	orr	w20, w20, #0x2
LBB0_5:
Lloh24:
	adrp	x8, _WM3_LP_ILK@GOTPAGE
Lloh25:
	ldr	x8, [x8, _WM3_LP_ILK@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_I915_WRITE
Lloh27:
	adrp	x22, _WM2_LP_ILK@GOTPAGE
Lloh28:
	ldr	x22, [x22, _WM2_LP_ILK@GOTPAGEOFF]
	ldr	w0, [x22]
	mov	w1, #0
	bl	_I915_WRITE
Lloh29:
	adrp	x21, _WM1_LP_ILK@GOTPAGE
Lloh30:
	ldr	x21, [x21, _WM1_LP_ILK@GOTPAGEOFF]
	ldr	w0, [x21]
	mov	w1, #0
	bl	_I915_WRITE
	mov	x0, x20
	bl	_single_plane_enabled
	cbz	w0, LBB0_9
; %bb.6:
	rbit	w8, w20
	clz	w8, w8
	cmp	w20, #0
	csinv	w20, w8, wzr, ne
	bl	_ILK_READ_WM1_LATENCY
	mov	w23, #500
	mul	w3, w0, w23
	add	x24, sp, #20
	str	x24, [sp]
Lloh31:
	adrp	x4, _ironlake_display_srwm_info@GOTPAGE
Lloh32:
	ldr	x4, [x4, _ironlake_display_srwm_info@GOTPAGEOFF]
Lloh33:
	adrp	x5, _ironlake_cursor_srwm_info@GOTPAGE
Lloh34:
	ldr	x5, [x5, _ironlake_cursor_srwm_info@GOTPAGEOFF]
	add	x6, sp, #28
	add	x7, sp, #24
	mov	x0, x19
	mov	w1, #1
	mov	x2, x20
	bl	_ironlake_compute_srwm
	cbz	w0, LBB0_9
; %bb.7:
	ldr	w21, [x21]
Lloh35:
	adrp	x8, _WM1_LP_SR_EN@GOTPAGE
Lloh36:
	ldr	x8, [x8, _WM1_LP_SR_EN@GOTPAGEOFF]
Lloh37:
	ldr	w26, [x8]
	bl	_ILK_READ_WM1_LATENCY
Lloh38:
	adrp	x25, _WM1_LP_LATENCY_SHIFT@GOTPAGE
Lloh39:
	ldr	x25, [x25, _WM1_LP_LATENCY_SHIFT@GOTPAGEOFF]
	ldr	w8, [x25]
	lsl	w8, w0, w8
	orr	w8, w8, w26
Lloh40:
	adrp	x26, _WM1_LP_FBC_SHIFT@GOTPAGE
Lloh41:
	ldr	x26, [x26, _WM1_LP_FBC_SHIFT@GOTPAGEOFF]
	ldr	w9, [sp, #28]
	ldr	w10, [x26]
	lsl	w9, w9, w10
	orr	w8, w8, w9
Lloh42:
	adrp	x27, _WM1_LP_SR_SHIFT@GOTPAGE
Lloh43:
	ldr	x27, [x27, _WM1_LP_SR_SHIFT@GOTPAGEOFF]
	ldr	w9, [sp, #24]
	ldr	w10, [x27]
	lsl	w9, w9, w10
	orr	w8, w8, w9
	ldr	w9, [sp, #20]
	orr	w1, w8, w9
	mov	x0, x21
	bl	_I915_WRITE
	bl	_ILK_READ_WM2_LATENCY
	mul	w3, w0, w23
	str	x24, [sp]
Lloh44:
	adrp	x4, _ironlake_display_srwm_info@GOTPAGE
Lloh45:
	ldr	x4, [x4, _ironlake_display_srwm_info@GOTPAGEOFF]
Lloh46:
	adrp	x5, _ironlake_cursor_srwm_info@GOTPAGE
Lloh47:
	ldr	x5, [x5, _ironlake_cursor_srwm_info@GOTPAGEOFF]
	add	x6, sp, #28
	add	x7, sp, #24
	mov	x0, x19
	mov	w1, #2
	mov	x2, x20
	bl	_ironlake_compute_srwm
	cbz	w0, LBB0_9
; %bb.8:
	ldr	w19, [x22]
Lloh48:
	adrp	x8, _WM2_LP_EN@GOTPAGE
Lloh49:
	ldr	x8, [x8, _WM2_LP_EN@GOTPAGEOFF]
Lloh50:
	ldr	w20, [x8]
	bl	_ILK_READ_WM2_LATENCY
	ldr	w8, [x25]
	lsl	w8, w0, w8
	orr	w8, w8, w20
	ldr	w9, [sp, #28]
	ldr	w10, [x26]
	lsl	w9, w9, w10
	orr	w8, w8, w9
	ldr	w9, [sp, #24]
	ldr	w10, [x27]
	lsl	w9, w9, w10
	orr	w8, w8, w9
	ldr	w9, [sp, #20]
	orr	w1, w8, w9
	mov	x0, x19
	bl	_I915_WRITE
LBB0_9:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.cfi_endproc
                                        ; -- End function
	.comm	_ironlake_display_wm_info,4,2   ; @ironlake_display_wm_info
	.comm	_ILK_LP0_PLANE_LATENCY,4,2      ; @ILK_LP0_PLANE_LATENCY
	.comm	_ironlake_cursor_wm_info,4,2    ; @ironlake_cursor_wm_info
	.comm	_ILK_LP0_CURSOR_LATENCY,4,2     ; @ILK_LP0_CURSOR_LATENCY
	.comm	_WM0_PIPEA_ILK,4,2              ; @WM0_PIPEA_ILK
	.comm	_WM0_PIPE_PLANE_SHIFT,4,2       ; @WM0_PIPE_PLANE_SHIFT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"FIFO watermarks For pipe A - plane %d, cursor: %d\n"

	.comm	_WM0_PIPEB_ILK,4,2              ; @WM0_PIPEB_ILK
l_.str.1:                               ; @.str.1
	.asciz	"FIFO watermarks For pipe B - plane %d, cursor: %d\n"

	.comm	_WM3_LP_ILK,4,2                 ; @WM3_LP_ILK
	.comm	_WM2_LP_ILK,4,2                 ; @WM2_LP_ILK
	.comm	_WM1_LP_ILK,4,2                 ; @WM1_LP_ILK
	.comm	_ironlake_display_srwm_info,4,2 ; @ironlake_display_srwm_info
	.comm	_ironlake_cursor_srwm_info,4,2  ; @ironlake_cursor_srwm_info
	.comm	_WM1_LP_SR_EN,4,2               ; @WM1_LP_SR_EN
	.comm	_WM1_LP_LATENCY_SHIFT,4,2       ; @WM1_LP_LATENCY_SHIFT
	.comm	_WM1_LP_FBC_SHIFT,4,2           ; @WM1_LP_FBC_SHIFT
	.comm	_WM1_LP_SR_SHIFT,4,2            ; @WM1_LP_SR_SHIFT
	.comm	_WM2_LP_EN,4,2                  ; @WM2_LP_EN
	.no_dead_strip	_ironlake_update_wm
.subsections_via_symbols
