	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_qib_pcie_params                ## -- Begin function qib_pcie_params
	.p2align	4, 0x90
_qib_pcie_params:                       ## @qib_pcie_params
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movl	12(%rdi), %edi
	callq	_pci_is_pcie
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movl	12(%rbx), %edi
	movq	_PCI_CAP_ID_MSIX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_pci_find_capability
	testq	%r12, %r12
	je	LBB0_6
## %bb.3:
	cmpl	$0, (%r12)
	je	LBB0_6
## %bb.4:
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:
	movq	%rbx, %rdi
	movl	%eax, %esi
	movq	%r12, %rdx
	movq	%r15, %rcx
	callq	_qib_msix_setup
	xorl	%r15d, %r15d
	jmp	LBB0_9
LBB0_6:
	movl	12(%rbx), %edi
	movq	_PCI_CAP_ID_MSI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_pci_find_capability
	testl	%eax, %eax
	je	LBB0_8
## %bb.7:
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_qib_msi_setup
	movl	%eax, %r15d
	jmp	LBB0_9
LBB0_1:
	leaq	L_.str(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_qib_dev_err
	movabsq	$10737418240001, %rax           ## imm = 0x9C400000001
	movq	%rax, (%rbx)
	movl	$2500, %ecx                     ## imm = 0x9C4
	movl	$1, %r8d
	movl	$1, %r15d
	jmp	LBB0_13
LBB0_8:
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_qib_dev_err
	movl	12(%rbx), %edi
	callq	_qib_enable_intx
	movl	$1, %r15d
LBB0_9:
	movl	12(%rbx), %edi
	movq	_PCI_EXP_LNKSTA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-36(%rbp), %rdx
	callq	_pcie_capability_read_word
	movl	-36(%rbp), %edx
	movl	%edx, %eax
	andl	$15, %eax
	shrl	$4, %edx
	andl	$31, %edx
	movl	%edx, -36(%rbp)
	movl	%edx, (%rbx)
	cmpl	$2, %eax
	movl	$5000, %ecx                     ## imm = 0x1388
	movl	$2500, %esi                     ## imm = 0x9C4
	cmovnel	%esi, %ecx
	cmpl	$1, %eax
	cmovel	%esi, %ecx
	movl	%ecx, 4(%rbx)
	testl	%r14d, %r14d
	je	LBB0_12
## %bb.10:
	cmpl	%r14d, %edx
	jge	LBB0_12
## %bb.11:
	leaq	L_.str.2(%rip), %rsi
	movq	%rbx, %rdi
	movl	%r14d, %ecx
	xorl	%eax, %eax
	callq	_qib_dev_err
LBB0_12:
	movq	%rbx, %rdi
	callq	_qib_tune_pcie_caps
	movq	%rbx, %rdi
	callq	_qib_tune_pcie_coalesce
	movl	(%rbx), %r8d
	movl	4(%rbx), %ecx
LBB0_13:
	movl	8(%rbx), %edi
	leaq	L_.str.3(%rip), %rdx
	movl	$4, %esi
	callq	_snprintf
	movl	%r15d, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Can't find PCI Express capability!\n"

	.comm	_PCI_CAP_ID_MSIX,4,2            ## @PCI_CAP_ID_MSIX
	.comm	_PCI_CAP_ID_MSI,4,2             ## @PCI_CAP_ID_MSI
L_.str.1:                               ## @.str.1
	.asciz	"No PCI MSI or MSIx capability!\n"

	.comm	_PCI_EXP_LNKSTA,4,2             ## @PCI_EXP_LNKSTA
L_.str.2:                               ## @.str.2
	.asciz	"PCIe width %u (x%u HCA), performance reduced\n"

L_.str.3:                               ## @.str.3
	.asciz	"PCIe,%uMHz,x%u\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function qib_pcie_params
lCPI0_0:
	.long	1                               ; 0x1
	.long	2500                            ; 0x9c4
	.section	__TEXT,__text,regular,pure_instructions
	.globl	_qib_pcie_params
	.p2align	2
_qib_pcie_params:                       ; @qib_pcie_params
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x3
	mov	x22, x2
	mov	x20, x1
	mov	x19, x0
	ldr	w0, [x0, #12]
	bl	_pci_is_pcie
	cbz	w0, LBB0_7
; %bb.1:
	ldr	w0, [x19, #12]
Lloh0:
	adrp	x8, _PCI_CAP_ID_MSIX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_CAP_ID_MSIX@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_pci_find_capability
	cbz	x22, LBB0_5
; %bb.2:
	ldr	w8, [x22]
	cbz	w8, LBB0_5
; %bb.3:
	mov	x1, x0
	cbz	w0, LBB0_5
; %bb.4:
	mov	x0, x19
	mov	x2, x22
	mov	x3, x21
	bl	_qib_msix_setup
	mov	w21, #0
	b	LBB0_9
LBB0_5:
	ldr	w0, [x19, #12]
Lloh3:
	adrp	x8, _PCI_CAP_ID_MSI@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_CAP_ID_MSI@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_pci_find_capability
	cbz	w0, LBB0_8
; %bb.6:
	mov	x1, x0
	mov	x0, x19
	bl	_qib_msi_setup
	mov	x21, x0
	b	LBB0_9
LBB0_7:
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_qib_dev_err
Lloh8:
	adrp	x8, lCPI0_0@PAGE
Lloh9:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	str	d0, [x19]
	mov	w3, #2500
	mov	w4, #1
	mov	w21, #1
	b	LBB0_13
LBB0_8:
Lloh10:
	adrp	x1, l_.str.1@PAGE
Lloh11:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_qib_dev_err
	ldr	w0, [x19, #12]
	bl	_qib_enable_intx
	mov	w21, #1
LBB0_9:
	ldr	w0, [x19, #12]
Lloh12:
	adrp	x8, _PCI_EXP_LNKSTA@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCI_EXP_LNKSTA@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	add	x2, sp, #28
	bl	_pcie_capability_read_word
	ldr	w8, [sp, #28]
	and	w9, w8, #0xf
	ubfx	w8, w8, #4, #5
	str	w8, [sp, #28]
	mov	w10, #2500
	mov	w11, #5000
	cmp	w9, #2
	csel	w11, w11, w10, eq
	cmp	w9, #1
	csel	w9, w10, w11, eq
	stp	w8, w9, [x19]
	cbz	w20, LBB0_12
; %bb.10:
	cmp	w8, w20
	b.ge	LBB0_12
; %bb.11:
	stp	x8, x20, [sp]
Lloh15:
	adrp	x1, l_.str.2@PAGE
Lloh16:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_qib_dev_err
LBB0_12:
	mov	x0, x19
	bl	_qib_tune_pcie_caps
	mov	x0, x19
	bl	_qib_tune_pcie_coalesce
	ldp	w4, w3, [x19]
LBB0_13:
	ldr	w0, [x19, #8]
Lloh17:
	adrp	x2, l_.str.3@PAGE
Lloh18:
	add	x2, x2, l_.str.3@PAGEOFF
	mov	w1, #4
	bl	_snprintf
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdr	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpAdd	Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Can't find PCI Express capability!\n"

	.comm	_PCI_CAP_ID_MSIX,4,2            ; @PCI_CAP_ID_MSIX
	.comm	_PCI_CAP_ID_MSI,4,2             ; @PCI_CAP_ID_MSI
l_.str.1:                               ; @.str.1
	.asciz	"No PCI MSI or MSIx capability!\n"

	.comm	_PCI_EXP_LNKSTA,4,2             ; @PCI_EXP_LNKSTA
l_.str.2:                               ; @.str.2
	.asciz	"PCIe width %u (x%u HCA), performance reduced\n"

l_.str.3:                               ; @.str.3
	.asciz	"PCIe,%uMHz,x%u\n"

.subsections_via_symbols
