	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_i965_g33_setup_chipset_flush
_intel_i965_g33_setup_chipset_flush:    ## @intel_i965_g33_setup_chipset_flush
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_intel_private@GOTPCREL(%rip), %r15
	movl	24(%r15), %edi
	movq	_I965_IFPADDR@GOTPCREL(%rip), %r12
	movq	(%r12), %rsi
	addq	$4, %rsi
	leaq	-40(%rbp), %rdx
	callq	_pci_read_config_dword
	movl	24(%r15), %edi
	movq	(%r12), %rsi
	leaq	-36(%rbp), %rdx
	callq	_pci_read_config_dword
	movl	-36(%rbp), %eax
	testb	$1, %al
	jne	LBB0_2
## %bb.1:
	xorl	%eax, %eax
	callq	_intel_alloc_chipset_flush_resource
	movl	$1, (%r15)
	movl	8(%r15), %edi
	movl	24(%r15), %r14d
	movq	(%r12), %rbx
	addq	$4, %rbx
	callq	_upper_32_bits
	movl	%r14d, %edi
	movq	%rbx, %rsi
	movl	%eax, %edx
	callq	_pci_write_config_dword
	movl	8(%r15), %edx
	movl	24(%r15), %edi
	movq	(%r12), %rsi
	orl	$1, %edx
	callq	_pci_write_config_dword
	jmp	LBB0_4
LBB0_2:
	andl	$-2, %eax
	movl	%eax, -36(%rbp)
	movl	$1, (%r15)
	leaq	8(%r15), %rsi
	movq	_iomem_resource@GOTPCREL(%rip), %rdi
	callq	_request_resource
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	movl	$0, (%r15)
LBB0_4:
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_intel_private,32,3             ## @intel_private
	.comm	_I965_IFPADDR,8,3               ## @I965_IFPADDR
	.comm	_PAGE_SIZE,8,3                  ## @PAGE_SIZE
	.comm	_iomem_resource,4,2             ## @iomem_resource
	.no_dead_strip	_intel_i965_g33_setup_chipset_flush
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_i965_g33_setup_chipset_flush
_intel_i965_g33_setup_chipset_flush:    ; @intel_i965_g33_setup_chipset_flush
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
Lloh0:
	adrp	x21, _intel_private@GOTPAGE
Lloh1:
	ldr	x21, [x21, _intel_private@GOTPAGEOFF]
	ldr	w0, [x21, #24]
Lloh2:
	adrp	x22, _I965_IFPADDR@GOTPAGE
Lloh3:
	ldr	x22, [x22, _I965_IFPADDR@GOTPAGEOFF]
	ldr	x8, [x22]
	add	x1, x8, #4
	add	x2, sp, #12
	bl	_pci_read_config_dword
	ldr	w0, [x21, #24]
	ldr	x1, [x22]
	add	x2, sp, #8
	bl	_pci_read_config_dword
	ldr	w8, [sp, #8]
	tbnz	w8, #0, LBB0_2
; %bb.1:
	bl	_intel_alloc_chipset_flush_resource
	mov	w8, #1
	str	w8, [x21]
	ldr	w19, [x21, #24]
	ldr	x8, [x22]
	add	x20, x8, #4
	ldr	w0, [x21, #8]
	bl	_upper_32_bits
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_pci_write_config_dword
	ldr	w0, [x21, #24]
	ldr	x1, [x22]
	ldr	w8, [x21, #8]
	orr	w2, w8, #0x1
	bl	_pci_write_config_dword
	b	LBB0_4
LBB0_2:
	and	w8, w8, #0xfffffffe
	str	w8, [sp, #8]
	mov	w8, #1
	mov	x1, x21
	str	w8, [x1], #8
Lloh4:
	adrp	x0, _iomem_resource@GOTPAGE
Lloh5:
	ldr	x0, [x0, _iomem_resource@GOTPAGEOFF]
	bl	_request_resource
	cbz	w0, LBB0_4
; %bb.3:
	str	wzr, [x21]
LBB0_4:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_intel_private,32,3             ; @intel_private
	.comm	_I965_IFPADDR,8,3               ; @I965_IFPADDR
	.comm	_PAGE_SIZE,8,3                  ; @PAGE_SIZE
	.comm	_iomem_resource,4,2             ; @iomem_resource
	.no_dead_strip	_intel_i965_g33_setup_chipset_flush
.subsections_via_symbols
