	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function emulate_pop
_emulate_pop:                           ## @emulate_pop
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r14d
	movq	%rdx, %r12
	movq	%rdi, %rbx
	leaq	8(%rdi), %r15
	movq	(%rsi), %r13
	callq	_ss_base
	movq	8(%rbx), %rcx
	movq	_VCPU_REGS_RSP@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movl	(%rcx,%rdx,4), %edx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_register_address
	movl	(%rbx), %ecx
	movl	%eax, %edi
	movq	%r12, %rsi
	movl	%r14d, %edx
	callq	*%r13
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	_VCPU_REGS_RSP@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	shlq	$2, %rsi
	addq	(%r15), %rsi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_register_address_increment
LBB0_2:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VCPU_REGS_RSP,8,3              ## @VCPU_REGS_RSP
	.no_dead_strip	_emulate_pop
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function emulate_pop
_emulate_pop:                           ; @emulate_pop
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x3
	mov	x21, x2
	mov	x22, x0
	ldr	x24, [x1]
	bl	_ss_base
	mov	x1, x0
	mov	x20, x22
	ldr	x8, [x20, #8]!
Lloh0:
	adrp	x23, _VCPU_REGS_RSP@GOTPAGE
Lloh1:
	ldr	x23, [x23, _VCPU_REGS_RSP@GOTPAGEOFF]
	ldr	x9, [x23]
	ldr	w2, [x8, x9, lsl #2]
	mov	x0, x20
	bl	_register_address
	ldr	w3, [x22]
	mov	x1, x21
	mov	x2, x19
	blr	x24
	mov	x21, x0
	cbnz	w0, LBB0_2
; %bb.1:
	ldr	x8, [x20]
	ldr	x9, [x23]
	add	x1, x8, x9, lsl #2
	mov	x0, x20
	mov	x2, x19
	bl	_register_address_increment
LBB0_2:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_VCPU_REGS_RSP,8,3              ; @VCPU_REGS_RSP
	.no_dead_strip	_emulate_pop
.subsections_via_symbols
