	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_get_htiming_tables_addr
_radeon_get_htiming_tables_addr:        ## @radeon_get_htiming_tables_addr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	%edi, %eax
	movq	_RADEON_HCODE_TABLE_SEL_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	%edi, %edx
	movq	_RADEON_HCODE_TABLE_SEL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %edx
	cmpl	$2, %edx
	je	LBB0_5
## %bb.1:
	cmpl	$1, %edx
	je	LBB0_4
## %bb.2:
	xorl	%eax, %eax
	testl	%edx, %edx
	jne	LBB0_7
## %bb.3:
	movq	_RADEON_TV_MAX_FIFO_ADDR_INTERNAL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	popq	%rbp
	retq
LBB0_5:
	movq	_RADEON_TABLE3_TOP_ADR_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_RADEON_TABLE3_TOP_ADR_SHIFT@GOTPCREL(%rip), %rcx
	jmp	LBB0_6
LBB0_4:
	movq	_RADEON_TABLE1_BOT_ADR_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_RADEON_TABLE1_BOT_ADR_SHIFT@GOTPCREL(%rip), %rcx
LBB0_6:
	movb	(%rcx), %cl
	sarl	%cl, %eax
	addl	%eax, %eax
LBB0_7:
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_HCODE_TABLE_SEL_MASK,4,2 ## @RADEON_HCODE_TABLE_SEL_MASK
	.comm	_RADEON_HCODE_TABLE_SEL_SHIFT,4,2 ## @RADEON_HCODE_TABLE_SEL_SHIFT
	.comm	_RADEON_TV_MAX_FIFO_ADDR_INTERNAL,4,2 ## @RADEON_TV_MAX_FIFO_ADDR_INTERNAL
	.comm	_RADEON_TABLE1_BOT_ADR_MASK,4,2 ## @RADEON_TABLE1_BOT_ADR_MASK
	.comm	_RADEON_TABLE1_BOT_ADR_SHIFT,4,2 ## @RADEON_TABLE1_BOT_ADR_SHIFT
	.comm	_RADEON_TABLE3_TOP_ADR_MASK,4,2 ## @RADEON_TABLE3_TOP_ADR_MASK
	.comm	_RADEON_TABLE3_TOP_ADR_SHIFT,4,2 ## @RADEON_TABLE3_TOP_ADR_SHIFT
	.no_dead_strip	_radeon_get_htiming_tables_addr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_get_htiming_tables_addr
_radeon_get_htiming_tables_addr:        ; @radeon_get_htiming_tables_addr
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _RADEON_HCODE_TABLE_SEL_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_HCODE_TABLE_SEL_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh3:
	adrp	x9, _RADEON_HCODE_TABLE_SEL_SHIFT@GOTPAGE
Lloh4:
	ldr	x9, [x9, _RADEON_HCODE_TABLE_SEL_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	asr	w8, w8, w9
	cmp	w8, #2
	b.eq	LBB0_4
; %bb.1:
	cmp	w8, #1
	b.eq	LBB0_5
; %bb.2:
	cbnz	w8, LBB0_7
; %bb.3:
Lloh6:
	adrp	x8, _RADEON_TV_MAX_FIFO_ADDR_INTERNAL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RADEON_TV_MAX_FIFO_ADDR_INTERNAL@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	ret
LBB0_4:
Lloh9:
	adrp	x8, _RADEON_TABLE3_TOP_ADR_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RADEON_TABLE3_TOP_ADR_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh12:
	adrp	x9, _RADEON_TABLE3_TOP_ADR_SHIFT@GOTPAGE
Lloh13:
	ldr	x9, [x9, _RADEON_TABLE3_TOP_ADR_SHIFT@GOTPAGEOFF]
	b	LBB0_6
LBB0_5:
Lloh14:
	adrp	x8, _RADEON_TABLE1_BOT_ADR_MASK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _RADEON_TABLE1_BOT_ADR_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh17:
	adrp	x9, _RADEON_TABLE1_BOT_ADR_SHIFT@GOTPAGE
Lloh18:
	ldr	x9, [x9, _RADEON_TABLE1_BOT_ADR_SHIFT@GOTPAGEOFF]
LBB0_6:
	ldr	w9, [x9]
	asr	w8, w8, w9
	lsl	w0, w8, #1
	ret
LBB0_7:
	mov	w0, #0
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_HCODE_TABLE_SEL_MASK,4,2 ; @RADEON_HCODE_TABLE_SEL_MASK
	.comm	_RADEON_HCODE_TABLE_SEL_SHIFT,4,2 ; @RADEON_HCODE_TABLE_SEL_SHIFT
	.comm	_RADEON_TV_MAX_FIFO_ADDR_INTERNAL,4,2 ; @RADEON_TV_MAX_FIFO_ADDR_INTERNAL
	.comm	_RADEON_TABLE1_BOT_ADR_MASK,4,2 ; @RADEON_TABLE1_BOT_ADR_MASK
	.comm	_RADEON_TABLE1_BOT_ADR_SHIFT,4,2 ; @RADEON_TABLE1_BOT_ADR_SHIFT
	.comm	_RADEON_TABLE3_TOP_ADR_MASK,4,2 ; @RADEON_TABLE3_TOP_ADR_MASK
	.comm	_RADEON_TABLE3_TOP_ADR_SHIFT,4,2 ; @RADEON_TABLE3_TOP_ADR_SHIFT
	.no_dead_strip	_radeon_get_htiming_tables_addr
.subsections_via_symbols
