	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bcma_pmu_pll_clock
_bcma_pmu_pll_clock:                    ## @bcma_pmu_pll_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r12d
	movl	%esi, %ebx
	movq	%rdi, %r15
	movq	(%rdi), %rax
	testb	$3, %bl
	setne	%cl
	movq	_BCMA_CC_PMU4716_MAINPLL_PLL0@GOTPCREL(%rip), %rdx
	cmpl	%esi, (%rdx)
	movq	(%rax), %r14
	setl	%al
	orb	%cl, %al
	movzbl	%al, %edi
	callq	_BUG_ON
	testl	%r12d, %r12d
	sete	%al
	cmpl	$5, %r12d
	setge	%cl
	orb	%al, %cl
	movzbl	%cl, %edi
	callq	_BUG_ON
	movq	(%r14), %rax
	movq	_BCMA_CHIP_ID_BCM5357@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_2
## %bb.1:
	movq	_BCMA_CHIP_ID_BCM4749@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_3
LBB0_2:
	movq	_BCMA_CC_CHIPSTAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_bcma_cc_read32
	movl	%eax, %ecx
	movl	$133000000, %eax                ## imm = 0x7ED6B40
	testl	$262144, %ecx                   ## imm = 0x40000
	jne	LBB0_4
LBB0_3:
	movslq	%ebx, %r13
	movq	_BCMA_CC_PPL_P1P2_OFF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%r13, %rsi
	movq	%r15, %rdi
	callq	_bcma_chipco_pll_read
	movq	_BCMA_CC_PPL_P1_MASK@GOTPCREL(%rip), %rcx
	movq	%r15, %rbx
	movl	(%rcx), %r15d
	andl	%eax, %r15d
	movq	_BCMA_CC_PPL_P1_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %r15d
	movq	_BCMA_CC_PPL_P2_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_BCMA_CC_PPL_P2_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_BCMA_CC_PPL_M14_OFF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%r13, %rsi
	movq	%rbx, %rdi
	callq	_bcma_chipco_pll_read
	decl	%r12d
	movq	_BCMA_CC_PPL_MDIV_WIDTH@GOTPCREL(%rip), %rcx
	imull	(%rcx), %r12d
	movl	%eax, %r14d
	movl	%r12d, %ecx
	sarl	%cl, %r14d
	movq	_BCMA_CC_PPL_MDIV_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %r14d
	movq	_BCMA_CC_PPL_NM5_OFF@GOTPCREL(%rip), %rax
	addq	(%rax), %r13
	movq	%rbx, %r12
	movq	%rbx, %rdi
	movq	%r13, %rsi
	callq	_bcma_chipco_pll_read
	movl	%eax, %ebx
	movq	_BCMA_CC_PPL_NDIV_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movq	_BCMA_CC_PPL_NDIV_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %ebx
	imull	%r15d, %ebx
	movq	%r12, %rdi
	callq	_bcma_pmu_get_alp_clock
	cltq
	imulq	$1125899907, %rax, %rax         ## imm = 0x431BDE83
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$50, %rax
	addl	%ecx, %eax
	imull	%ebx, %eax
                                        ## kill: def $eax killed $eax killed $rax
	cltd
	idivl	-44(%rbp)                       ## 4-byte Folded Reload
	cltd
	idivl	%r14d
	imull	$1000000, %eax, %eax            ## imm = 0xF4240
LBB0_4:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BCMA_CC_PMU4716_MAINPLL_PLL0,4,2 ## @BCMA_CC_PMU4716_MAINPLL_PLL0
	.comm	_BCMA_CHIP_ID_BCM5357,8,3       ## @BCMA_CHIP_ID_BCM5357
	.comm	_BCMA_CHIP_ID_BCM4749,8,3       ## @BCMA_CHIP_ID_BCM4749
	.comm	_BCMA_CC_CHIPSTAT,4,2           ## @BCMA_CC_CHIPSTAT
	.comm	_BCMA_CC_PPL_P1P2_OFF,8,3       ## @BCMA_CC_PPL_P1P2_OFF
	.comm	_BCMA_CC_PPL_P1_MASK,4,2        ## @BCMA_CC_PPL_P1_MASK
	.comm	_BCMA_CC_PPL_P1_SHIFT,4,2       ## @BCMA_CC_PPL_P1_SHIFT
	.comm	_BCMA_CC_PPL_P2_MASK,4,2        ## @BCMA_CC_PPL_P2_MASK
	.comm	_BCMA_CC_PPL_P2_SHIFT,4,2       ## @BCMA_CC_PPL_P2_SHIFT
	.comm	_BCMA_CC_PPL_M14_OFF,8,3        ## @BCMA_CC_PPL_M14_OFF
	.comm	_BCMA_CC_PPL_MDIV_WIDTH,4,2     ## @BCMA_CC_PPL_MDIV_WIDTH
	.comm	_BCMA_CC_PPL_MDIV_MASK,4,2      ## @BCMA_CC_PPL_MDIV_MASK
	.comm	_BCMA_CC_PPL_NM5_OFF,8,3        ## @BCMA_CC_PPL_NM5_OFF
	.comm	_BCMA_CC_PPL_NDIV_MASK,4,2      ## @BCMA_CC_PPL_NDIV_MASK
	.comm	_BCMA_CC_PPL_NDIV_SHIFT,4,2     ## @BCMA_CC_PPL_NDIV_SHIFT
	.no_dead_strip	_bcma_pmu_pll_clock
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bcma_pmu_pll_clock
_bcma_pmu_pll_clock:                    ; @bcma_pmu_pll_clock
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	ldr	x8, [x0]
	ldr	x22, [x8]
	tst	w1, #0x3
Lloh0:
	adrp	x8, _BCMA_CC_PMU4716_MAINPLL_PLL0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _BCMA_CC_PMU4716_MAINPLL_PLL0@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	ccmp	w8, w1, #8, eq
	cset	w0, lt
	bl	_BUG_ON
	cmp	w20, #0
	ccmp	w20, #4, #0, ne
	cset	w0, gt
	bl	_BUG_ON
	ldr	x8, [x22]
Lloh3:
	adrp	x9, _BCMA_CHIP_ID_BCM5357@GOTPAGE
Lloh4:
	ldr	x9, [x9, _BCMA_CHIP_ID_BCM5357@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
Lloh6:
	adrp	x10, _BCMA_CHIP_ID_BCM4749@GOTPAGE
Lloh7:
	ldr	x10, [x10, _BCMA_CHIP_ID_BCM4749@GOTPAGEOFF]
Lloh8:
	ldr	x10, [x10]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	b.ne	LBB0_2
; %bb.1:
Lloh9:
	adrp	x8, _BCMA_CC_CHIPSTAT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _BCMA_CC_CHIPSTAT@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_bcma_cc_read32
	tbnz	w0, #18, LBB0_3
LBB0_2:
	sxtw	x21, w21
Lloh12:
	adrp	x8, _BCMA_CC_PPL_P1P2_OFF@GOTPAGE
Lloh13:
	ldr	x8, [x8, _BCMA_CC_PPL_P1P2_OFF@GOTPAGEOFF]
Lloh14:
	ldr	x8, [x8]
	add	x1, x8, x21
	mov	x0, x19
	bl	_bcma_chipco_pll_read
Lloh15:
	adrp	x8, _BCMA_CC_PPL_P1_MASK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _BCMA_CC_PPL_P1_MASK@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh18:
	adrp	x9, _BCMA_CC_PPL_P1_SHIFT@GOTPAGE
Lloh19:
	ldr	x9, [x9, _BCMA_CC_PPL_P1_SHIFT@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	asr	w22, w8, w9
Lloh21:
	adrp	x8, _BCMA_CC_PPL_P2_MASK@GOTPAGE
Lloh22:
	ldr	x8, [x8, _BCMA_CC_PPL_P2_MASK@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh24:
	adrp	x9, _BCMA_CC_PPL_P2_SHIFT@GOTPAGE
Lloh25:
	ldr	x9, [x9, _BCMA_CC_PPL_P2_SHIFT@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	asr	w23, w8, w9
Lloh27:
	adrp	x8, _BCMA_CC_PPL_M14_OFF@GOTPAGE
Lloh28:
	ldr	x8, [x8, _BCMA_CC_PPL_M14_OFF@GOTPAGEOFF]
Lloh29:
	ldr	x8, [x8]
	add	x1, x8, x21
	mov	x0, x19
	bl	_bcma_chipco_pll_read
Lloh30:
	adrp	x8, _BCMA_CC_PPL_MDIV_WIDTH@GOTPAGE
Lloh31:
	ldr	x8, [x8, _BCMA_CC_PPL_MDIV_WIDTH@GOTPAGEOFF]
	sub	w9, w20, #1
Lloh32:
	ldr	w8, [x8]
	mul	w8, w8, w9
	asr	w8, w0, w8
Lloh33:
	adrp	x9, _BCMA_CC_PPL_MDIV_MASK@GOTPAGE
Lloh34:
	ldr	x9, [x9, _BCMA_CC_PPL_MDIV_MASK@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	and	w20, w8, w9
Lloh36:
	adrp	x8, _BCMA_CC_PPL_NM5_OFF@GOTPAGE
Lloh37:
	ldr	x8, [x8, _BCMA_CC_PPL_NM5_OFF@GOTPAGEOFF]
Lloh38:
	ldr	x8, [x8]
	add	x1, x8, x21
	mov	x0, x19
	bl	_bcma_chipco_pll_read
Lloh39:
	adrp	x8, _BCMA_CC_PPL_NDIV_MASK@GOTPAGE
Lloh40:
	ldr	x8, [x8, _BCMA_CC_PPL_NDIV_MASK@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh42:
	adrp	x9, _BCMA_CC_PPL_NDIV_SHIFT@GOTPAGE
Lloh43:
	ldr	x9, [x9, _BCMA_CC_PPL_NDIV_SHIFT@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	asr	w21, w8, w9
	mov	x0, x19
	bl	_bcma_pmu_get_alp_clock
	mov	w8, #56963
	movk	w8, #17179, lsl #16
	smull	x8, w0, w8
	lsr	x9, x8, #63
	asr	x8, x8, #50
	add	w8, w8, w9
	mul	w9, w21, w22
	mul	w8, w9, w8
	sdiv	w8, w8, w23
	sdiv	w8, w8, w20
	mov	w9, #16960
	movk	w9, #15, lsl #16
	mul	w0, w8, w9
	b	LBB0_4
LBB0_3:
	mov	w0, #27456
	movk	w0, #2029, lsl #16
LBB0_4:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_BCMA_CC_PMU4716_MAINPLL_PLL0,4,2 ; @BCMA_CC_PMU4716_MAINPLL_PLL0
	.comm	_BCMA_CHIP_ID_BCM5357,8,3       ; @BCMA_CHIP_ID_BCM5357
	.comm	_BCMA_CHIP_ID_BCM4749,8,3       ; @BCMA_CHIP_ID_BCM4749
	.comm	_BCMA_CC_CHIPSTAT,4,2           ; @BCMA_CC_CHIPSTAT
	.comm	_BCMA_CC_PPL_P1P2_OFF,8,3       ; @BCMA_CC_PPL_P1P2_OFF
	.comm	_BCMA_CC_PPL_P1_MASK,4,2        ; @BCMA_CC_PPL_P1_MASK
	.comm	_BCMA_CC_PPL_P1_SHIFT,4,2       ; @BCMA_CC_PPL_P1_SHIFT
	.comm	_BCMA_CC_PPL_P2_MASK,4,2        ; @BCMA_CC_PPL_P2_MASK
	.comm	_BCMA_CC_PPL_P2_SHIFT,4,2       ; @BCMA_CC_PPL_P2_SHIFT
	.comm	_BCMA_CC_PPL_M14_OFF,8,3        ; @BCMA_CC_PPL_M14_OFF
	.comm	_BCMA_CC_PPL_MDIV_WIDTH,4,2     ; @BCMA_CC_PPL_MDIV_WIDTH
	.comm	_BCMA_CC_PPL_MDIV_MASK,4,2      ; @BCMA_CC_PPL_MDIV_MASK
	.comm	_BCMA_CC_PPL_NM5_OFF,8,3        ; @BCMA_CC_PPL_NM5_OFF
	.comm	_BCMA_CC_PPL_NDIV_MASK,4,2      ; @BCMA_CC_PPL_NDIV_MASK
	.comm	_BCMA_CC_PPL_NDIV_SHIFT,4,2     ; @BCMA_CC_PPL_NDIV_SHIFT
	.no_dead_strip	_bcma_pmu_pll_clock
.subsections_via_symbols
