	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gen6_ring_sync
_gen6_ring_sync:                        ## @gen6_ring_sync
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_MI_SEMAPHORE_MBOX@GOTPCREL(%rip), %rax
	movq	_MI_SEMAPHORE_COMPARE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movl	%edx, %r15d
	movq	%rsi, %r13
	movq	%rdi, %r12
	movq	_MI_SEMAPHORE_REGISTER@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	(%rsi), %rax
	movq	8(%rdi), %rcx
	movl	(%rax,%rcx,4), %eax
	movq	_MI_SEMAPHORE_SYNC_INVALID@GOTPCREL(%rip), %rcx
	xorl	%edi, %edi
	cmpl	(%rcx), %eax
	sete	%dil
	callq	_WARN_ON
	movq	%r12, %rdi
	movl	$4, %esi
	callq	_intel_ring_begin
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_5
## %bb.1:
	decl	%r15d
	movl	16(%r12), %edi
	movl	%r15d, %esi
	callq	_i915_gem_has_seqno_wrapped
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	callq	_likely
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	movq	(%r13), %rax
	movq	8(%r12), %rcx
	orl	(%rax,%rcx,4), %ebx
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_intel_ring_emit
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_intel_ring_emit
	xorl	%esi, %esi
	jmp	LBB0_4
LBB0_3:
	movq	_MI_NOOP@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_intel_ring_emit
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_intel_ring_emit
	movl	(%rbx), %esi
LBB0_4:
	movq	%r12, %rdi
	callq	_intel_ring_emit
	movq	_MI_NOOP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_intel_ring_emit
	movq	%r12, %rdi
	callq	_intel_ring_advance
LBB0_5:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MI_SEMAPHORE_MBOX,4,2          ## @MI_SEMAPHORE_MBOX
	.comm	_MI_SEMAPHORE_COMPARE,4,2       ## @MI_SEMAPHORE_COMPARE
	.comm	_MI_SEMAPHORE_REGISTER,4,2      ## @MI_SEMAPHORE_REGISTER
	.comm	_MI_SEMAPHORE_SYNC_INVALID,4,2  ## @MI_SEMAPHORE_SYNC_INVALID
	.comm	_MI_NOOP,4,2                    ## @MI_NOOP
	.no_dead_strip	_gen6_ring_sync
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gen6_ring_sync
_gen6_ring_sync:                        ; @gen6_ring_sync
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x2
	mov	x21, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _MI_SEMAPHORE_MBOX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MI_SEMAPHORE_MBOX@GOTPAGEOFF]
Lloh2:
	ldr	w23, [x8]
Lloh3:
	adrp	x8, _MI_SEMAPHORE_COMPARE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MI_SEMAPHORE_COMPARE@GOTPAGEOFF]
Lloh5:
	ldr	w25, [x8]
Lloh6:
	adrp	x8, _MI_SEMAPHORE_REGISTER@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MI_SEMAPHORE_REGISTER@GOTPAGEOFF]
	ldr	x9, [x1]
	ldr	x10, [x0, #8]
	ldr	w9, [x9, x10, lsl #2]
Lloh8:
	ldr	w26, [x8]
Lloh9:
	adrp	x8, _MI_SEMAPHORE_SYNC_INVALID@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MI_SEMAPHORE_SYNC_INVALID@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	cmp	w9, w8
	cset	w0, eq
	bl	_WARN_ON
	mov	x0, x19
	mov	w1, #4
	bl	_intel_ring_begin
	mov	x20, x0
	cbnz	w0, LBB0_5
; %bb.1:
	sub	w22, w22, #1
	ldr	w0, [x19, #16]
	mov	x1, x22
	bl	_i915_gem_has_seqno_wrapped
	cmp	w0, #0
	cset	w0, eq
	bl	_likely
Lloh12:
	adrp	x24, _MI_NOOP@GOTPAGE
Lloh13:
	ldr	x24, [x24, _MI_NOOP@GOTPAGEOFF]
	cbz	x0, LBB0_3
; %bb.2:
	orr	w8, w25, w23
	orr	w8, w8, w26
	ldr	x9, [x21]
	ldr	x10, [x19, #8]
	ldr	w9, [x9, x10, lsl #2]
	orr	w1, w8, w9
	mov	x0, x19
	bl	_intel_ring_emit
	mov	x0, x19
	mov	x1, x22
	bl	_intel_ring_emit
	mov	w1, #0
	b	LBB0_4
LBB0_3:
	ldr	w1, [x24]
	mov	x0, x19
	bl	_intel_ring_emit
	ldr	w1, [x24]
	mov	x0, x19
	bl	_intel_ring_emit
	ldr	w1, [x24]
LBB0_4:
	mov	x0, x19
	bl	_intel_ring_emit
	ldr	w1, [x24]
	mov	x0, x19
	bl	_intel_ring_emit
	mov	x0, x19
	bl	_intel_ring_advance
LBB0_5:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_MI_SEMAPHORE_MBOX,4,2          ; @MI_SEMAPHORE_MBOX
	.comm	_MI_SEMAPHORE_COMPARE,4,2       ; @MI_SEMAPHORE_COMPARE
	.comm	_MI_SEMAPHORE_REGISTER,4,2      ; @MI_SEMAPHORE_REGISTER
	.comm	_MI_SEMAPHORE_SYNC_INVALID,4,2  ; @MI_SEMAPHORE_SYNC_INVALID
	.comm	_MI_NOOP,4,2                    ; @MI_NOOP
	.no_dead_strip	_gen6_ring_sync
.subsections_via_symbols
