	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function set_shaders
_set_shaders:                           ## @set_shaders
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	shlq	$2, %rbx
	addq	16(%rdi), %rbx
	movl	4(%rdi), %r15d
	addl	(%rdi), %r15d
	movq	_PACKET3_SET_CONTEXT_REG@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movl	$3, %esi
	callq	_PACKET3
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_SQ_PGM_START_VS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PACKET3_SET_CONTEXT_REG_START@GOTPCREL(%rip), %r13
	subl	(%r13), %esi
	sarl	$2, %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	sarl	$8, %r15d
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	$2, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movl	8(%r14), %r15d
	addl	(%r14), %r15d
	movl	(%r12), %edi
	movl	$4, %esi
	callq	_PACKET3
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_SQ_PGM_START_PS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	subl	(%r13), %esi
	sarl	$2, %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	sarl	$8, %r15d
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	$2, %esi
	callq	_radeon_ring_write
	movl	4(%r14), %ecx
	addl	(%r14), %ecx
	movq	_PACKET3_SH_ACTION_ENA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$512, %edx                      ## imm = 0x200
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_cp_set_surface_sync            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
	.comm	_PACKET3_SET_CONTEXT_REG,4,2    ## @PACKET3_SET_CONTEXT_REG
	.comm	_SQ_PGM_START_VS,4,2            ## @SQ_PGM_START_VS
	.comm	_PACKET3_SET_CONTEXT_REG_START,4,2 ## @PACKET3_SET_CONTEXT_REG_START
	.comm	_SQ_PGM_START_PS,4,2            ## @SQ_PGM_START_PS
	.comm	_PACKET3_SH_ACTION_ENA,4,2      ## @PACKET3_SH_ACTION_ENA
	.no_dead_strip	_set_shaders
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function set_shaders
_set_shaders:                           ; @set_shaders
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x8, [x0, #16]
Lloh0:
	adrp	x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x20, x8, x9, lsl #2
	ldp	w8, w9, [x0]
	add	w21, w9, w8
Lloh3:
	adrp	x22, _PACKET3_SET_CONTEXT_REG@GOTPAGE
Lloh4:
	ldr	x22, [x22, _PACKET3_SET_CONTEXT_REG@GOTPAGEOFF]
	ldr	w0, [x22]
	mov	w1, #3
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
Lloh5:
	adrp	x8, _SQ_PGM_START_VS@GOTPAGE
Lloh6:
	ldr	x8, [x8, _SQ_PGM_START_VS@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
Lloh8:
	adrp	x23, _PACKET3_SET_CONTEXT_REG_START@GOTPAGE
Lloh9:
	ldr	x23, [x23, _PACKET3_SET_CONTEXT_REG_START@GOTPAGEOFF]
	ldr	w9, [x23]
	sub	w8, w8, w9
	asr	w1, w8, #2
	mov	x0, x20
	bl	_radeon_ring_write
	asr	w1, w21, #8
	mov	x0, x20
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #2
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #0
	bl	_radeon_ring_write
	ldr	w8, [x19]
	ldr	w9, [x19, #8]
	add	w21, w9, w8
	ldr	w0, [x22]
	mov	w1, #4
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
Lloh10:
	adrp	x8, _SQ_PGM_START_PS@GOTPAGE
Lloh11:
	ldr	x8, [x8, _SQ_PGM_START_PS@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	ldr	w9, [x23]
	sub	w8, w8, w9
	asr	w1, w8, #2
	mov	x0, x20
	bl	_radeon_ring_write
	asr	w1, w21, #8
	mov	x0, x20
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #1
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #0
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #2
	bl	_radeon_ring_write
	ldp	w8, w9, [x19]
Lloh13:
	adrp	x10, _PACKET3_SH_ACTION_ENA@GOTPAGE
Lloh14:
	ldr	x10, [x10, _PACKET3_SH_ACTION_ENA@GOTPAGEOFF]
	add	w3, w9, w8
Lloh15:
	ldr	w1, [x10]
	mov	x0, x19
	mov	w2, #512
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_cp_set_surface_sync
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
	.comm	_PACKET3_SET_CONTEXT_REG,4,2    ; @PACKET3_SET_CONTEXT_REG
	.comm	_SQ_PGM_START_VS,4,2            ; @SQ_PGM_START_VS
	.comm	_PACKET3_SET_CONTEXT_REG_START,4,2 ; @PACKET3_SET_CONTEXT_REG_START
	.comm	_SQ_PGM_START_PS,4,2            ; @SQ_PGM_START_PS
	.comm	_PACKET3_SH_ACTION_ENA,4,2      ; @PACKET3_SH_ACTION_ENA
	.no_dead_strip	_set_shaders
.subsections_via_symbols
