	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_gart_restore            ## -- Begin function radeon_gart_restore
	.p2align	4, 0x90
_radeon_gart_restore:                   ## @radeon_gart_restore
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$0, 16(%rdi)
	je	LBB0_9
## %bb.1:
	movq	%rdi, %r14
	movl	(%rdi), %r10d
	testl	%r10d, %r10d
	jle	LBB0_8
## %bb.2:
	movq	_PAGE_SIZE@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_RADEON_GPU_PAGE_SIZE@GOTPCREL(%rip), %r9
	movl	(%r9), %esi
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_3 Depth=1
	incq	%rbx
	movslq	%r10d, %rax
	cmpq	%rax, %rbx
	jge	LBB0_8
LBB0_3:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_5 Depth 2
	movl	%edi, %eax
	cltd
	idivl	%esi
	testl	%eax, %eax
	jle	LBB0_7
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	8(%r14), %rax
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movl	(%rax,%rbx,4), %ebx
	xorl	%r15d, %r15d
	.p2align	4, 0x90
LBB0_5:                                 ##   Parent Loop BB0_3 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	leal	(%r15,%r13), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	movq	%r9, %r14
	callq	_radeon_gart_set_page
	movq	%r14, %r9
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	movl	(%r9), %esi
	addl	%esi, %ebx
	incl	%r15d
	movl	(%r12), %edi
	movl	%edi, %eax
	cltd
	idivl	%esi
	cmpl	%eax, %r15d
	jl	LBB0_5
## %bb.6:                               ##   in Loop: Header=BB0_3 Depth=1
	movl	(%r14), %r10d
	addl	%r15d, %r13d
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	jmp	LBB0_7
LBB0_8:
	xorl	%eax, %eax
	callq	_mb
	movq	%r14, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_gart_tlb_flush          ## TAILCALL
LBB0_9:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ## @RADEON_GPU_PAGE_SIZE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_gart_restore            ; -- Begin function radeon_gart_restore
	.p2align	2
_radeon_gart_restore:                   ; @radeon_gart_restore
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	ldr	w8, [x0, #16]
	cbz	w8, LBB0_9
; %bb.1:
	mov	x19, x0
	ldr	w10, [x0]
	cmp	w10, #1
	b.lt	LBB0_8
; %bb.2:
	mov	x21, #0
	mov	w22, #0
Lloh0:
	adrp	x23, _PAGE_SIZE@GOTPAGE
Lloh1:
	ldr	x23, [x23, _PAGE_SIZE@GOTPAGEOFF]
	ldr	w9, [x23]
Lloh2:
	adrp	x24, _RADEON_GPU_PAGE_SIZE@GOTPAGE
Lloh3:
	ldr	x24, [x24, _RADEON_GPU_PAGE_SIZE@GOTPAGEOFF]
	ldr	w8, [x24]
	b	LBB0_4
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	x21, x21, #1
	cmp	x21, w10, sxtw
	b.ge	LBB0_8
LBB0_4:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	sdiv	w11, w9, w8
	cmp	w11, #1
	b.lt	LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	w25, #0
	ldr	x8, [x19, #8]
	ldr	w20, [x8, x21, lsl #2]
LBB0_6:                                 ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	add	w1, w22, w25
	mov	x0, x19
	mov	x2, x20
	bl	_radeon_gart_set_page
	ldr	w8, [x24]
	add	w20, w8, w20
	add	w25, w25, #1
	ldr	w9, [x23]
	sdiv	w10, w9, w8
	cmp	w25, w10
	b.lt	LBB0_6
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w10, [x19]
	add	w22, w22, w25
	b	LBB0_3
LBB0_8:
	bl	_mb
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_radeon_gart_tlb_flush
LBB0_9:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ; @RADEON_GPU_PAGE_SIZE
.subsections_via_symbols
