	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nv17_fifo_init
_nv17_fifo_init:                        ## @nv17_fifo_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	callq	_nouveau_fifo_init
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	_NV04_PFIFO_DELAY_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$255, %edx
	callq	_nv_wr32
	movq	_NV04_PFIFO_DMA_TIMESLICE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$16908287, %edx                 ## imm = 0x101FFFF
	callq	_nv_wr32
	movq	_NV03_PFIFO_RAMHT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	24(%rbx), %rax
	movl	(%rax), %ecx
	movl	4(%rax), %edx
	shll	$16, %ecx
	addl	$-589824, %ecx                  ## imm = 0xFFF70000
	sarl	$8, %edx
	orl	%ecx, %edx
	orl	$50331648, %edx                 ## imm = 0x3000000
	movq	%rbx, %rdi
	callq	_nv_wr32
	movq	_NV03_PFIFO_RAMRO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	16(%rbx), %rax
	movl	(%rax), %edx
	sarl	$8, %edx
	movq	%rbx, %rdi
	callq	_nv_wr32
	movq	_NV03_PFIFO_RAMFC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	8(%rbx), %rax
	movl	(%rax), %edx
	sarl	$8, %edx
	orl	$65536, %edx                    ## imm = 0x10000
	movq	%rbx, %rdi
	callq	_nv_wr32
	movq	_NV03_PFIFO_CACHE1_PUSH1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	movq	%rbx, %rdi
	callq	_nv_wr32
	movq	_NV03_PFIFO_INTR_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$-1, %edx
	callq	_nv_wr32
	movq	_NV03_PFIFO_INTR_EN_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$-1, %edx
	callq	_nv_wr32
	movq	_NV03_PFIFO_CACHE1_PUSH0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_nv_wr32
	movq	_NV04_PFIFO_CACHE1_PULL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_nv_wr32
	movq	_NV03_PFIFO_CACHES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_nv_wr32
LBB0_2:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NV04_PFIFO_DELAY_0,4,2         ## @NV04_PFIFO_DELAY_0
	.comm	_NV04_PFIFO_DMA_TIMESLICE,4,2   ## @NV04_PFIFO_DMA_TIMESLICE
	.comm	_NV03_PFIFO_RAMHT,4,2           ## @NV03_PFIFO_RAMHT
	.comm	_NV03_PFIFO_RAMRO,4,2           ## @NV03_PFIFO_RAMRO
	.comm	_NV03_PFIFO_RAMFC,4,2           ## @NV03_PFIFO_RAMFC
	.comm	_NV03_PFIFO_CACHE1_PUSH1,4,2    ## @NV03_PFIFO_CACHE1_PUSH1
	.comm	_NV03_PFIFO_INTR_0,4,2          ## @NV03_PFIFO_INTR_0
	.comm	_NV03_PFIFO_INTR_EN_0,4,2       ## @NV03_PFIFO_INTR_EN_0
	.comm	_NV03_PFIFO_CACHE1_PUSH0,4,2    ## @NV03_PFIFO_CACHE1_PUSH0
	.comm	_NV04_PFIFO_CACHE1_PULL0,4,2    ## @NV04_PFIFO_CACHE1_PULL0
	.comm	_NV03_PFIFO_CACHES,4,2          ## @NV03_PFIFO_CACHES
	.no_dead_strip	_nv17_fifo_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nv17_fifo_init
_nv17_fifo_init:                        ; @nv17_fifo_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x0
	bl	_nouveau_fifo_init
	mov	x19, x0
	cbnz	w0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _NV04_PFIFO_DELAY_0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NV04_PFIFO_DELAY_0@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #255
	bl	_nv_wr32
Lloh3:
	adrp	x8, _NV04_PFIFO_DMA_TIMESLICE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _NV04_PFIFO_DMA_TIMESLICE@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #16908287
	bl	_nv_wr32
Lloh6:
	adrp	x8, _NV03_PFIFO_RAMHT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _NV03_PFIFO_RAMHT@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	ldr	x8, [x20, #24]
	ldp	w9, w8, [x8]
	lsl	w9, w9, #16
	sub	w9, w9, #144, lsl #12           ; =589824
	orr	w8, w9, w8, asr #8
	orr	w2, w8, #0x3000000
	mov	x0, x20
	bl	_nv_wr32
Lloh9:
	adrp	x8, _NV03_PFIFO_RAMRO@GOTPAGE
Lloh10:
	ldr	x8, [x8, _NV03_PFIFO_RAMRO@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	x8, [x20, #16]
	ldr	w8, [x8]
	asr	w2, w8, #8
	mov	x0, x20
	bl	_nv_wr32
Lloh12:
	adrp	x8, _NV03_PFIFO_RAMFC@GOTPAGE
Lloh13:
	ldr	x8, [x8, _NV03_PFIFO_RAMFC@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	x8, [x20, #8]
	ldr	w8, [x8]
	asr	w8, w8, #8
	orr	w2, w8, #0x10000
	mov	x0, x20
	bl	_nv_wr32
Lloh15:
	adrp	x8, _NV03_PFIFO_CACHE1_PUSH1@GOTPAGE
Lloh16:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_PUSH1@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	ldr	w2, [x20]
	mov	x0, x20
	bl	_nv_wr32
Lloh18:
	adrp	x8, _NV03_PFIFO_INTR_0@GOTPAGE
Lloh19:
	ldr	x8, [x8, _NV03_PFIFO_INTR_0@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #-1
	bl	_nv_wr32
Lloh21:
	adrp	x8, _NV03_PFIFO_INTR_EN_0@GOTPAGE
Lloh22:
	ldr	x8, [x8, _NV03_PFIFO_INTR_EN_0@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #-1
	bl	_nv_wr32
Lloh24:
	adrp	x8, _NV03_PFIFO_CACHE1_PUSH0@GOTPAGE
Lloh25:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_PUSH0@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #1
	bl	_nv_wr32
Lloh27:
	adrp	x8, _NV04_PFIFO_CACHE1_PULL0@GOTPAGE
Lloh28:
	ldr	x8, [x8, _NV04_PFIFO_CACHE1_PULL0@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #1
	bl	_nv_wr32
Lloh30:
	adrp	x8, _NV03_PFIFO_CACHES@GOTPAGE
Lloh31:
	ldr	x8, [x8, _NV03_PFIFO_CACHES@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #1
	bl	_nv_wr32
LBB0_2:
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_NV04_PFIFO_DELAY_0,4,2         ; @NV04_PFIFO_DELAY_0
	.comm	_NV04_PFIFO_DMA_TIMESLICE,4,2   ; @NV04_PFIFO_DMA_TIMESLICE
	.comm	_NV03_PFIFO_RAMHT,4,2           ; @NV03_PFIFO_RAMHT
	.comm	_NV03_PFIFO_RAMRO,4,2           ; @NV03_PFIFO_RAMRO
	.comm	_NV03_PFIFO_RAMFC,4,2           ; @NV03_PFIFO_RAMFC
	.comm	_NV03_PFIFO_CACHE1_PUSH1,4,2    ; @NV03_PFIFO_CACHE1_PUSH1
	.comm	_NV03_PFIFO_INTR_0,4,2          ; @NV03_PFIFO_INTR_0
	.comm	_NV03_PFIFO_INTR_EN_0,4,2       ; @NV03_PFIFO_INTR_EN_0
	.comm	_NV03_PFIFO_CACHE1_PUSH0,4,2    ; @NV03_PFIFO_CACHE1_PUSH0
	.comm	_NV04_PFIFO_CACHE1_PULL0,4,2    ; @NV04_PFIFO_CACHE1_PULL0
	.comm	_NV03_PFIFO_CACHES,4,2          ; @NV03_PFIFO_CACHES
	.no_dead_strip	_nv17_fifo_init
.subsections_via_symbols
