	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_check_and_fixup_packets
_radeon_check_and_fixup_packets:        ## @radeon_check_and_fixup_packets
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
                                        ## kill: def $edx killed $edx def $rdx
	leal	-128(%rdx), %eax
	cmpl	$94, %eax
	ja	LBB0_19
## %bb.1:
	movq	%rcx, %r12
	movq	%rsi, %r15
	movq	%rdi, %r14
	xorl	%ebx, %ebx
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_2:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	je	LBB0_2
## %bb.4:
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_24
LBB0_5:
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	jne	LBB0_10
## %bb.6:
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	jne	LBB0_10
## %bb.7:
	movq	%r12, %rdi
	movl	$2, %esi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	jne	LBB0_10
## %bb.8:
	movq	%r12, %rdi
	movl	$3, %esi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	jne	LBB0_10
## %bb.9:
	movq	%r12, %rdi
	movl	$4, %esi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	je	LBB0_30
LBB0_10:
	leaq	L_.str.4(%rip), %rdi
	jmp	LBB0_25
LBB0_11:
	movq	_RADEON_PP_TXOFFSET_0@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_RADEON_PP_TXFILTER_0@GOTPCREL(%rip), %rcx
	subl	(%rcx), %eax
	leal	3(%rax), %esi
	testl	%eax, %eax
	cmovnsl	%eax, %esi
	sarl	$2, %esi
	movq	%r12, %rdi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	je	LBB0_2
## %bb.12:
	leaq	L_.str.3(%rip), %rdi
	jmp	LBB0_24
LBB0_13:
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	jne	LBB0_18
## %bb.14:
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	jne	LBB0_18
## %bb.15:
	movq	%r12, %rdi
	movl	$2, %esi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	jne	LBB0_18
## %bb.16:
	movq	%r12, %rdi
	movl	$3, %esi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	jne	LBB0_18
## %bb.17:
	movq	%r12, %rdi
	movl	$4, %esi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	je	LBB0_30
LBB0_18:
	leaq	L_.str.5(%rip), %rdi
	jmp	LBB0_25
LBB0_19:
	leaq	L_.str.6(%rip), %rdi
	xorl	%ebx, %ebx
	movl	%edx, %esi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_26
LBB0_20:
	movq	_RADEON_RB3D_DEPTHOFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_RADEON_PP_MISC@GOTPCREL(%rip), %rcx
	subl	(%rcx), %eax
	leal	3(%rax), %esi
	testl	%eax, %eax
	cmovnsl	%eax, %esi
	sarl	$2, %esi
	movq	%r12, %rdi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	je	LBB0_28
## %bb.21:
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_24
LBB0_22:
	movq	_RADEON_RB3D_COLOROFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_RADEON_PP_CNTL@GOTPCREL(%rip), %rcx
	subl	(%rcx), %eax
	leal	3(%rax), %esi
	testl	%eax, %eax
	cmovnsl	%eax, %esi
	sarl	$2, %esi
	movq	%r12, %rdi
	callq	_drm_buffer_pointer_to_dword
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_radeon_check_and_fixup_offset
	testl	%eax, %eax
	je	LBB0_2
## %bb.23:
	leaq	L_.str.1(%rip), %rdi
LBB0_24:
	xorl	%ebx, %ebx
LBB0_25:
	xorl	%eax, %eax
	callq	_DRM_ERROR
LBB0_26:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_2
LBB0_27:
	movl	$2, %edi
	callq	_BEGIN_RING
	movq	_RADEON_SE_TCL_STATE_FLUSH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	_OUT_RING_REG
	xorl	%eax, %eax
	callq	_ADVANCE_RING
	jmp	LBB0_2
LBB0_28:
	movl	$1, (%r14)
	jmp	LBB0_2
LBB0_30:
	xorl	%ebx, %ebx
	jmp	LBB0_2
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_20, LBB0_20-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_22, LBB0_22-LJTI0_0
.set L0_0_set_27, LBB0_27-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
LJTI0_0:
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_11
	.long	L0_0_set_11
	.long	L0_0_set_11
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_20
	.long	L0_0_set_2
	.long	L0_0_set_13
	.long	L0_0_set_13
	.long	L0_0_set_13
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_22
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_27
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_3
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.end_data_region
                                        ## -- End function
	.comm	_RADEON_RB3D_DEPTHOFFSET,4,2    ## @RADEON_RB3D_DEPTHOFFSET
	.comm	_RADEON_PP_MISC,4,2             ## @RADEON_PP_MISC
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Invalid depth buffer offset\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_RADEON_RB3D_COLOROFFSET,4,2    ## @RADEON_RB3D_COLOROFFSET
	.comm	_RADEON_PP_CNTL,4,2             ## @RADEON_PP_CNTL
L_.str.1:                               ## @.str.1
	.asciz	"Invalid colour buffer offset\n"

L_.str.2:                               ## @.str.2
	.asciz	"Invalid R200 texture offset\n"

	.comm	_RADEON_PP_TXOFFSET_0,4,2       ## @RADEON_PP_TXOFFSET_0
	.comm	_RADEON_PP_TXFILTER_0,4,2       ## @RADEON_PP_TXFILTER_0
L_.str.3:                               ## @.str.3
	.asciz	"Invalid R100 texture offset\n"

L_.str.4:                               ## @.str.4
	.asciz	"Invalid R200 cubic texture offset\n"

L_.str.5:                               ## @.str.5
	.asciz	"Invalid R100 cubic texture offset\n"

	.comm	_RING_LOCALS,4,2                ## @RING_LOCALS
	.comm	_RADEON_SE_TCL_STATE_FLUSH,4,2  ## @RADEON_SE_TCL_STATE_FLUSH
L_.str.6:                               ## @.str.6
	.asciz	"Unknown state packet ID %d\n"

	.no_dead_strip	_radeon_check_and_fixup_packets
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_check_and_fixup_packets
_radeon_check_and_fixup_packets:        ; @radeon_check_and_fixup_packets
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
                                        ; kill: def $w2 killed $w2 def $x2
	sub	w8, w2, #128
	cmp	w8, #94
	b.hi	LBB0_19
; %bb.1:
	mov	x21, x3
	mov	x20, x1
	mov	x19, x0
	mov	w0, #0
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_3:
	mov	x0, x21
	mov	w1, #0
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbz	w0, LBB0_2
; %bb.4:
Lloh2:
	adrp	x0, l_.str.2@PAGE
Lloh3:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_24
LBB0_5:
	mov	x0, x21
	mov	w1, #0
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbnz	w0, LBB0_10
; %bb.6:
	mov	x0, x21
	mov	w1, #1
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbnz	w0, LBB0_10
; %bb.7:
	mov	x0, x21
	mov	w1, #2
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbnz	w0, LBB0_10
; %bb.8:
	mov	x0, x21
	mov	w1, #3
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbnz	w0, LBB0_10
; %bb.9:
	mov	x0, x21
	mov	w1, #4
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbz	w0, LBB0_2
LBB0_10:
Lloh4:
	adrp	x0, l_.str.4@PAGE
Lloh5:
	add	x0, x0, l_.str.4@PAGEOFF
	b	LBB0_24
LBB0_11:
Lloh6:
	adrp	x8, _RADEON_PP_TXOFFSET_0@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RADEON_PP_TXOFFSET_0@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x9, _RADEON_PP_TXFILTER_0@GOTPAGE
Lloh10:
	ldr	x9, [x9, _RADEON_PP_TXFILTER_0@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	sub	w8, w8, w9
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w1, w8, #2
	mov	x0, x21
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbz	w0, LBB0_2
; %bb.12:
Lloh12:
	adrp	x0, l_.str.3@PAGE
Lloh13:
	add	x0, x0, l_.str.3@PAGEOFF
	b	LBB0_24
LBB0_13:
	mov	x0, x21
	mov	w1, #0
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbnz	w0, LBB0_18
; %bb.14:
	mov	x0, x21
	mov	w1, #1
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbnz	w0, LBB0_18
; %bb.15:
	mov	x0, x21
	mov	w1, #2
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbnz	w0, LBB0_18
; %bb.16:
	mov	x0, x21
	mov	w1, #3
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbnz	w0, LBB0_18
; %bb.17:
	mov	x0, x21
	mov	w1, #4
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbz	w0, LBB0_2
LBB0_18:
Lloh14:
	adrp	x0, l_.str.5@PAGE
Lloh15:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_24
LBB0_19:
	str	x2, [sp]
Lloh16:
	adrp	x0, l_.str.6@PAGE
Lloh17:
	add	x0, x0, l_.str.6@PAGEOFF
	b	LBB0_24
LBB0_20:
Lloh18:
	adrp	x8, _RADEON_RB3D_DEPTHOFFSET@GOTPAGE
Lloh19:
	ldr	x8, [x8, _RADEON_RB3D_DEPTHOFFSET@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
Lloh21:
	adrp	x9, _RADEON_PP_MISC@GOTPAGE
Lloh22:
	ldr	x9, [x9, _RADEON_PP_MISC@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	sub	w8, w8, w9
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w1, w8, #2
	mov	x0, x21
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbz	w0, LBB0_26
; %bb.21:
Lloh24:
	adrp	x0, l_.str@PAGE
Lloh25:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_24
LBB0_22:
Lloh26:
	adrp	x8, _RADEON_RB3D_COLOROFFSET@GOTPAGE
Lloh27:
	ldr	x8, [x8, _RADEON_RB3D_COLOROFFSET@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
Lloh29:
	adrp	x9, _RADEON_PP_CNTL@GOTPAGE
Lloh30:
	ldr	x9, [x9, _RADEON_PP_CNTL@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	sub	w8, w8, w9
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w1, w8, #2
	mov	x0, x21
	bl	_drm_buffer_pointer_to_dword
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_check_and_fixup_offset
	cbz	w0, LBB0_2
; %bb.23:
Lloh32:
	adrp	x0, l_.str.1@PAGE
Lloh33:
	add	x0, x0, l_.str.1@PAGEOFF
LBB0_24:
	bl	_DRM_ERROR
Lloh34:
	adrp	x8, _EINVAL@GOTPAGE
Lloh35:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_2
LBB0_25:
	mov	w0, #2
	bl	_BEGIN_RING
Lloh37:
	adrp	x8, _RADEON_SE_TCL_STATE_FLUSH@GOTPAGE
Lloh38:
	ldr	x8, [x8, _RADEON_SE_TCL_STATE_FLUSH@GOTPAGEOFF]
Lloh39:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_OUT_RING_REG
	bl	_ADVANCE_RING
	mov	w0, #0
	b	LBB0_2
LBB0_26:
	mov	w8, #1
	str	w8, [x19]
	b	LBB0_2
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_11-LBB0_2)>>2
	.byte	(LBB0_11-LBB0_2)>>2
	.byte	(LBB0_11-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_20-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_13-LBB0_2)>>2
	.byte	(LBB0_13-LBB0_2)>>2
	.byte	(LBB0_13-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_22-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_25-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
                                        ; -- End function
	.comm	_RADEON_RB3D_DEPTHOFFSET,4,2    ; @RADEON_RB3D_DEPTHOFFSET
	.comm	_RADEON_PP_MISC,4,2             ; @RADEON_PP_MISC
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Invalid depth buffer offset\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_RADEON_RB3D_COLOROFFSET,4,2    ; @RADEON_RB3D_COLOROFFSET
	.comm	_RADEON_PP_CNTL,4,2             ; @RADEON_PP_CNTL
l_.str.1:                               ; @.str.1
	.asciz	"Invalid colour buffer offset\n"

l_.str.2:                               ; @.str.2
	.asciz	"Invalid R200 texture offset\n"

	.comm	_RADEON_PP_TXOFFSET_0,4,2       ; @RADEON_PP_TXOFFSET_0
	.comm	_RADEON_PP_TXFILTER_0,4,2       ; @RADEON_PP_TXFILTER_0
l_.str.3:                               ; @.str.3
	.asciz	"Invalid R100 texture offset\n"

l_.str.4:                               ; @.str.4
	.asciz	"Invalid R200 cubic texture offset\n"

l_.str.5:                               ; @.str.5
	.asciz	"Invalid R100 cubic texture offset\n"

	.comm	_RING_LOCALS,4,2                ; @RING_LOCALS
	.comm	_RADEON_SE_TCL_STATE_FLUSH,4,2  ; @RADEON_SE_TCL_STATE_FLUSH
l_.str.6:                               ; @.str.6
	.asciz	"Unknown state packet ID %d\n"

	.no_dead_strip	_radeon_check_and_fixup_packets
.subsections_via_symbols
