	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nand_davinci_correct_4bit
_nand_davinci_correct_4bit:             ## @nand_davinci_correct_4bit
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rbx
	movq	%rsi, %r14
	callq	_to_davinci_nand
	movq	%rax, %r15
	cmpl	$255, (%rbx)
	jne	LBB0_10
## %bb.1:
	cmpl	$255, 4(%rbx)
	jne	LBB0_10
## %bb.2:
	cmpl	$255, 8(%rbx)
	jne	LBB0_10
## %bb.3:
	cmpl	$255, 12(%rbx)
	jne	LBB0_10
## %bb.4:
	cmpl	$255, 16(%rbx)
	jne	LBB0_10
## %bb.5:
	cmpl	$255, 20(%rbx)
	jne	LBB0_10
## %bb.6:
	cmpl	$255, 24(%rbx)
	jne	LBB0_10
## %bb.7:
	cmpl	$255, 28(%rbx)
	jne	LBB0_10
## %bb.8:
	cmpl	$255, 32(%rbx)
	jne	LBB0_10
## %bb.9:
	xorl	%eax, %eax
	cmpl	$255, 36(%rbx)
	je	LBB0_24
LBB0_10:
	movl	%ebx, %edi
	andl	$1, %edi
	callq	_WARN_ON
	testq	%rax, %rax
	je	LBB0_13
## %bb.11:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
LBB0_12:
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_24:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_13:
	movq	%r14, -64(%rbp)                 ## 8-byte Spill
	movzwl	2(%rbx), %eax
	movzwl	4(%rbx), %r12d
	movl	%r12d, %r13d
	shldw	$2, %ax, %r13w
	movzwl	(%rbx), %ecx
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	movl	%eax, %edx
                                        ## kill: def $ax killed $ax killed $eax def $eax
	shldw	$6, %cx, %ax
	andl	$1023, %eax                     ## imm = 0x3FF
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	shrl	$4, %edx
	andl	$1023, %edx                     ## imm = 0x3FF
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	andl	$1023, %r13d                    ## imm = 0x3FF
	movzwl	6(%rbx), %r14d
	shrdw	$8, %r14w, %r12w
	andl	$1023, %r12d                    ## imm = 0x3FF
	movzwl	8(%rbx), %edx
	movl	%edx, %ebx
	shldw	$4, %r14w, %bx
	shrl	$2, %r14d
	andl	$1023, %r14d                    ## imm = 0x3FF
	andl	$1023, %ebx                     ## imm = 0x3FF
	shrl	$6, %edx
	movq	_NAND_4BIT_ECC_LOAD_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_writel
	movq	_NAND_4BIT_ECC_LOAD_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_davinci_nand_writel
	movq	_NAND_4BIT_ECC_LOAD_OFFSET@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_davinci_nand_writel
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	%r12d, %edx
	callq	_davinci_nand_writel
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	%r13d, %edx
	callq	_davinci_nand_writel
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	callq	_davinci_nand_writel
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	callq	_davinci_nand_writel
	movl	(%rbx), %esi
	movl	-52(%rbp), %edx                 ## 4-byte Reload
	andl	$1023, %edx                     ## imm = 0x3FF
	movq	%r15, %rdi
	callq	_davinci_nand_writel
	movq	_NANDFSR_OFFSET@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	leaq	-80(%rbp), %rsi
	movq	%r15, %rdi
	callq	_nand_davinci_readecc_4bit
	movdqa	-80(%rbp), %xmm0
	ptest	%xmm0, %xmm0
	je	LBB0_14
## %bb.15:
	movq	_NAND_ERR_ADD1_OFFSET@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movq	_NANDFCR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_davinci_nand_readl
	movl	%eax, %r14d
	movl	$13, %edi
	callq	_BIT
                                        ## kill: def $ax killed $ax def $eax
	orl	%r14d, %eax
	movzwl	%ax, %edx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_davinci_nand_writel
	.p2align	4, 0x90
LBB0_16:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
                                        ## kill: def $ax killed $ax def $rax
	shrl	$8, %eax
	andl	$15, %eax
	leal	-2(%rax), %ecx
	cmpl	$2, %ecx
	jb	LBB0_22
## %bb.17:                              ##   in Loop: Header=BB0_16 Depth=1
	cmpl	$1, %eax
	je	LBB0_20
## %bb.18:                              ##   in Loop: Header=BB0_16 Depth=1
	testl	%eax, %eax
	je	LBB0_19
## %bb.21:                              ##   in Loop: Header=BB0_16 Depth=1
	xorl	%eax, %eax
	callq	_cpu_relax
	jmp	LBB0_16
LBB0_14:
	xorl	%eax, %eax
	jmp	LBB0_24
LBB0_22:
	movl	(%r13), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movl	%eax, %ebx
	movq	_NAND_ERR_ERRVAL1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movl	%eax, %ecx
	andl	$1023, %ebx                     ## imm = 0x3FF
	xorl	%eax, %eax
	cmpw	$8, %bx
	movq	-64(%rbp), %rsi                 ## 8-byte Reload
	jb	LBB0_24
## %bb.23:
	movzwl	%cx, %eax
	movzwl	%bx, %ecx
	movl	$519, %edx                      ## imm = 0x207
	subq	%rcx, %rdx
	xorl	%eax, (%rsi,%rdx,4)
	movl	$1, %eax
	jmp	LBB0_24
LBB0_20:
	movq	_NAND_ERR_ERRVAL1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movq	_EIO@GOTPCREL(%rip), %rcx
	jmp	LBB0_12
LBB0_19:
	movq	_NAND_ERR_ERRVAL1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	xorl	%eax, %eax
	jmp	LBB0_24
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_NAND_4BIT_ECC_LOAD_OFFSET,4,2  ## @NAND_4BIT_ECC_LOAD_OFFSET
	.comm	_NANDFSR_OFFSET,4,2             ## @NANDFSR_OFFSET
	.comm	_NAND_ERR_ADD1_OFFSET,4,2       ## @NAND_ERR_ADD1_OFFSET
	.comm	_NANDFCR_OFFSET,4,2             ## @NANDFCR_OFFSET
	.comm	_NAND_ERR_ERRVAL1_OFFSET,4,2    ## @NAND_ERR_ERRVAL1_OFFSET
	.comm	_EIO,4,2                        ## @EIO
	.comm	_NAND_ERR_ADD2_OFFSET,4,2       ## @NAND_ERR_ADD2_OFFSET
	.comm	_NAND_ERR_ERRVAL2_OFFSET,4,2    ## @NAND_ERR_ERRVAL2_OFFSET
	.no_dead_strip	_nand_davinci_correct_4bit
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nand_davinci_correct_4bit
_nand_davinci_correct_4bit:             ; @nand_davinci_correct_4bit
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x2
	mov	x19, x1
	bl	_to_davinci_nand
	mov	x20, x0
	ldr	w8, [x21]
	cmp	w8, #255
	b.ne	LBB0_10
; %bb.1:
	ldr	w8, [x21, #4]
	cmp	w8, #255
	b.ne	LBB0_10
; %bb.2:
	ldr	w8, [x21, #8]
	cmp	w8, #255
	b.ne	LBB0_10
; %bb.3:
	ldr	w8, [x21, #12]
	cmp	w8, #255
	b.ne	LBB0_10
; %bb.4:
	ldr	w8, [x21, #16]
	cmp	w8, #255
	b.ne	LBB0_10
; %bb.5:
	ldr	w8, [x21, #20]
	cmp	w8, #255
	b.ne	LBB0_10
; %bb.6:
	ldr	w8, [x21, #24]
	cmp	w8, #255
	b.ne	LBB0_10
; %bb.7:
	ldr	w8, [x21, #28]
	cmp	w8, #255
	b.ne	LBB0_10
; %bb.8:
	ldr	w8, [x21, #32]
	cmp	w8, #255
	b.ne	LBB0_10
; %bb.9:
	ldr	w8, [x21, #36]
	cmp	w8, #255
	b.eq	LBB0_23
LBB0_10:
	and	w0, w21, #0x1
	bl	_WARN_ON
	cbz	x0, LBB0_13
; %bb.11:
Lloh0:
	adrp	x8, _EINVAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
LBB0_12:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_24
LBB0_13:
	ldrh	w28, [x21]
	lsr	w22, w28, #10
	ldrh	w8, [x21, #2]
	bfi	w22, w8, #6, #4
	ubfx	w23, w8, #4, #10
	lsr	w24, w8, #14
	ldrh	w8, [x21, #4]
	bfi	w24, w8, #2, #8
	lsr	w25, w8, #8
	ldrh	w8, [x21, #6]
	bfi	w25, w8, #8, #2
	ubfx	w26, w8, #2, #10
	lsr	w27, w8, #12
	ldrh	w8, [x21, #8]
	bfi	w27, w8, #4, #6
	lsr	w2, w8, #6
Lloh2:
	adrp	x21, _NAND_4BIT_ECC_LOAD_OFFSET@GOTPAGE
Lloh3:
	ldr	x21, [x21, _NAND_4BIT_ECC_LOAD_OFFSET@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_davinci_nand_writel
	ldr	w1, [x21]
	mov	x0, x20
	mov	x2, x27
	bl	_davinci_nand_writel
	ldr	w1, [x21]
	mov	x0, x20
	mov	x2, x26
	bl	_davinci_nand_writel
	ldr	w1, [x21]
	mov	x0, x20
	mov	x2, x25
	bl	_davinci_nand_writel
	ldr	w1, [x21]
	mov	x0, x20
	mov	x2, x24
	bl	_davinci_nand_writel
	ldr	w1, [x21]
	mov	x0, x20
	mov	x2, x23
	bl	_davinci_nand_writel
	ldr	w1, [x21]
	mov	x0, x20
	mov	x2, x22
	bl	_davinci_nand_writel
	ldr	w1, [x21]
	and	w2, w28, #0x3ff
	mov	x0, x20
	bl	_davinci_nand_writel
Lloh4:
	adrp	x23, _NANDFSR_OFFSET@GOTPAGE
Lloh5:
	ldr	x23, [x23, _NANDFSR_OFFSET@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x20
	bl	_davinci_nand_readl
	mov	x1, sp
	mov	x0, x20
	bl	_nand_davinci_readecc_4bit
	ldr	q0, [sp]
	ext.16b	v1, v0, v0, #8
	orr.8b	v0, v0, v1
	mov.s	w8, v0[1]
	fmov	w9, s0
	orr	w8, w9, w8
	cbz	w8, LBB0_23
; %bb.14:
Lloh6:
	adrp	x24, _NAND_ERR_ADD1_OFFSET@GOTPAGE
Lloh7:
	ldr	x24, [x24, _NAND_ERR_ADD1_OFFSET@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x20
	bl	_davinci_nand_readl
Lloh8:
	adrp	x8, _NANDFCR_OFFSET@GOTPAGE
Lloh9:
	ldr	x8, [x8, _NANDFCR_OFFSET@GOTPAGEOFF]
Lloh10:
	ldr	w21, [x8]
	mov	x0, x20
	mov	x1, x21
	bl	_davinci_nand_readl
	mov	x22, x0
	mov	w0, #13
	bl	_BIT
	orr	w2, w0, w22
	mov	x0, x20
	mov	x1, x21
	bl	_davinci_nand_writel
LBB0_15:                                ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x23]
	mov	x0, x20
	bl	_davinci_nand_readl
	ubfx	w8, w0, #8, #4
	sub	w9, w8, #2
	cmp	w9, #2
	b.lo	LBB0_19
; %bb.16:                               ;   in Loop: Header=BB0_15 Depth=1
	cmp	w8, #1
	b.eq	LBB0_21
; %bb.17:                               ;   in Loop: Header=BB0_15 Depth=1
	cbz	w8, LBB0_22
; %bb.18:                               ;   in Loop: Header=BB0_15 Depth=1
	bl	_cpu_relax
	b	LBB0_15
LBB0_19:
	ldr	w1, [x24]
	mov	x0, x20
	bl	_davinci_nand_readl
	mov	x21, x0
Lloh11:
	adrp	x8, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGE
Lloh12:
	ldr	x8, [x8, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_davinci_nand_readl
	and	w8, w21, #0x3ff
	cmp	w8, #8
	b.lo	LBB0_23
; %bb.20:
	mov	w9, #519
	sub	x8, x9, w8, uxtw
	lsl	x8, x8, #2
	ldr	w9, [x19, x8]
	eor	w9, w9, w0
	str	w9, [x19, x8]
	mov	w0, #1
	b	LBB0_24
LBB0_21:
Lloh14:
	adrp	x8, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGE
Lloh15:
	ldr	x8, [x8, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_davinci_nand_readl
Lloh17:
	adrp	x8, _EIO@GOTPAGE
Lloh18:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
	b	LBB0_12
LBB0_22:
Lloh19:
	adrp	x8, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGE
Lloh20:
	ldr	x8, [x8, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_davinci_nand_readl
LBB0_23:
	mov	w0, #0
LBB0_24:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_NAND_4BIT_ECC_LOAD_OFFSET,4,2  ; @NAND_4BIT_ECC_LOAD_OFFSET
	.comm	_NANDFSR_OFFSET,4,2             ; @NANDFSR_OFFSET
	.comm	_NAND_ERR_ADD1_OFFSET,4,2       ; @NAND_ERR_ADD1_OFFSET
	.comm	_NANDFCR_OFFSET,4,2             ; @NANDFCR_OFFSET
	.comm	_NAND_ERR_ERRVAL1_OFFSET,4,2    ; @NAND_ERR_ERRVAL1_OFFSET
	.comm	_EIO,4,2                        ; @EIO
	.comm	_NAND_ERR_ADD2_OFFSET,4,2       ; @NAND_ERR_ADD2_OFFSET
	.comm	_NAND_ERR_ERRVAL2_OFFSET,4,2    ; @NAND_ERR_ERRVAL2_OFFSET
	.no_dead_strip	_nand_davinci_correct_4bit
.subsections_via_symbols
