	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_atombios_parse_pplib_clock_info
_radeon_atombios_parse_pplib_clock_info: ## @radeon_atombios_parse_pplib_clock_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r15
	movl	%edx, %ebx
	movl	%esi, %r12d
	movq	%rdi, %r13
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %r14
	movl	(%r14), %eax
	testl	%eax, (%rdi)
	je	LBB0_2
## %bb.1:
	movl	4(%r15), %edi
	callq	_le16_to_cpu
	movl	(%r15), %edx
	shll	$16, %edx
	orl	%eax, %edx
	movq	16(%r13), %rax
	movslq	%r12d, %r12
	movq	(%rax,%r12,8), %rcx
	movslq	%ebx, %rbx
	movq	%rbx, %rax
	shlq	$5, %rax
	movl	%edx, (%rcx,%rax)
	jmp	LBB0_8
LBB0_2:
	movq	%r13, %rdi
	callq	_ASIC_IS_DCE6
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movl	20(%r15), %edi
	callq	_le16_to_cpu
	movq	%r15, %rcx
	movl	(%r15), %r15d
	movl	16(%rcx), %edi
	movl	%ebx, %r14d
	movq	%rcx, %rbx
	shll	$16, %r15d
	orl	%eax, %r15d
	callq	_le16_to_cpu
	movq	%rbx, %rdx
	movl	4(%rbx), %ecx
	shll	$16, %ecx
	orl	%eax, %ecx
	movq	16(%r13), %rax
	movslq	%r12d, %r12
	movq	(%rax,%r12,8), %rax
	movslq	%r14d, %rbx
	movq	%rbx, %r14
	shlq	$5, %r14
	movl	%ecx, 4(%rax,%r14)
	movl	%r15d, (%rax,%r14)
	movq	_VOLTAGE_SW@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, 16(%rax,%r14)
	movl	12(%rdx), %edi
	movq	%rdx, %r15
	callq	_le16_to_cpu
	movq	16(%r13), %rcx
	movq	(%rcx,%r12,8), %rcx
	movl	%eax, 8(%rcx,%r14)
	movl	8(%r15), %edi
	callq	_le16_to_cpu
	movq	16(%r13), %rcx
	movq	(%rcx,%r12,8), %rcx
	movq	%rax, 24(%rcx,%r14)
	jmp	LBB0_7
LBB0_4:
	movq	%r13, %rdi
	callq	_ASIC_IS_DCE4
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movl	20(%r15), %edi
	callq	_le16_to_cpu
	movl	(%r15), %r14d
	movl	16(%r15), %edi
	shll	$16, %r14d
	orl	%eax, %r14d
	callq	_le16_to_cpu
	movl	4(%r15), %ecx
	shll	$16, %ecx
	orl	%eax, %ecx
	movq	16(%r13), %rax
	movslq	%r12d, %r12
	movq	(%rax,%r12,8), %rax
	movslq	%ebx, %rbx
	movq	%r15, %rdx
	movq	%rbx, %r15
	shlq	$5, %r15
	movl	%ecx, 4(%rax,%r15)
	movl	%r14d, (%rax,%r15)
	movq	_VOLTAGE_SW@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, 16(%rax,%r15)
	movl	12(%rdx), %edi
	movq	%rdx, %r14
	callq	_le16_to_cpu
	movq	16(%r13), %rcx
	movq	(%rcx,%r12,8), %rcx
	movl	%eax, 8(%rcx,%r15)
	movl	8(%r14), %edi
	callq	_le16_to_cpu
	movq	16(%r13), %rcx
	movq	(%rcx,%r12,8), %rcx
	movq	%rax, 24(%rcx,%r15)
	jmp	LBB0_7
LBB0_6:
	movl	16(%r15), %edi
	callq	_le16_to_cpu
	movl	(%r15), %r14d
	movl	12(%r15), %edi
	shll	$16, %r14d
	orl	%eax, %r14d
	callq	_le16_to_cpu
	movl	4(%r15), %ecx
	shll	$16, %ecx
	orl	%eax, %ecx
	movq	16(%r13), %rax
	movslq	%r12d, %r12
	movq	(%rax,%r12,8), %rax
	movslq	%ebx, %rbx
	movq	%r15, %rdx
	movq	%rbx, %r15
	shlq	$5, %r15
	movl	%ecx, 4(%rax,%r15)
	movl	%r14d, (%rax,%r15)
	movq	_VOLTAGE_SW@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, 16(%rax,%r15)
	movl	8(%rdx), %edi
	callq	_le16_to_cpu
	movq	16(%r13), %rcx
	movq	(%rcx,%r12,8), %rcx
	movl	%eax, 8(%rcx,%r15)
LBB0_7:
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %r14
LBB0_8:
	shlq	$5, %rbx
	movl	8(%rcx,%rbx), %edx
	movl	%edx, %eax
	andl	$-4, %eax
	cmpl	$128, %eax
	jne	LBB0_11
## %bb.9:
	movq	_VOLTAGE_TYPE_VDDC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rcx
	movq	%r13, %rdi
	callq	_radeon_atom_get_max_vddc
	testl	%eax, %eax
	jne	LBB0_11
## %bb.10:
	movl	-44(%rbp), %eax
	movq	16(%r13), %rcx
	movq	(%rcx,%r12,8), %rcx
	movl	%eax, 8(%rcx,%rbx)
LBB0_11:
	movl	(%r14), %eax
	movq	16(%r13), %rcx
	movq	(%rcx,%r12,8), %rcx
	testl	%eax, (%r13)
	je	LBB0_14
## %bb.12:
	cmpl	$0, (%rcx,%rbx)
	jne	LBB0_16
## %bb.13:
	xorl	%eax, %eax
	jmp	LBB0_17
LBB0_14:
	xorl	%eax, %eax
	cmpl	$0, 4(%rcx,%rbx)
	je	LBB0_17
## %bb.15:
	cmpl	$0, (%rcx,%rbx)
	je	LBB0_17
LBB0_16:
	movl	$1, %eax
LBB0_17:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_IS_IGP,4,2              ## @RADEON_IS_IGP
	.comm	_CHIP_PALM,8,3                  ## @CHIP_PALM
	.comm	_VOLTAGE_SW,8,3                 ## @VOLTAGE_SW
	.comm	_VOLTAGE_TYPE_VDDC,4,2          ## @VOLTAGE_TYPE_VDDC
	.no_dead_strip	_radeon_atombios_parse_pplib_clock_info
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_atombios_parse_pplib_clock_info
_radeon_atombios_parse_pplib_clock_info: ; @radeon_atombios_parse_pplib_clock_info
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x3
	mov	x21, x2
	mov	x22, x1
	mov	x19, x0
	ldr	w8, [x0]
Lloh0:
	adrp	x23, _RADEON_IS_IGP@GOTPAGE
Lloh1:
	ldr	x23, [x23, _RADEON_IS_IGP@GOTPAGEOFF]
	ldr	w9, [x23]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	ldr	w0, [x20, #4]
	bl	_le16_to_cpu
	ldr	w8, [x20]
	orr	w9, w0, w8, lsl #16
	ldr	x8, [x19, #16]
	sxtw	x24, w22
	ldr	x8, [x8, w22, sxtw #3]
	sxtw	x22, w21
	sbfiz	x10, x21, #5, #32
	str	w9, [x8, x10]
	b	LBB0_5
LBB0_2:
	mov	x0, x19
	bl	_ASIC_IS_DCE6
	cbnz	x0, LBB0_4
; %bb.3:
	mov	x0, x19
	bl	_ASIC_IS_DCE4
	cbz	x0, LBB0_14
LBB0_4:
	ldr	w0, [x20, #20]
	bl	_le16_to_cpu
	ldr	w8, [x20]
	orr	w25, w0, w8, lsl #16
	ldr	w0, [x20, #16]
	bl	_le16_to_cpu
	ldr	w8, [x20, #4]
	orr	w8, w0, w8, lsl #16
	ldr	x9, [x19, #16]
                                        ; kill: def $w22 killed $w22 killed $x22 def $x22
	sbfiz	x26, x22, #3, #32
	ldr	x9, [x9, x26]
	sxtw	x24, w22
                                        ; kill: def $w21 killed $w21 killed $x21 def $x21
	sxtw	x22, w21
	sbfiz	x21, x21, #5, #32
	add	x9, x9, x21
	stp	w25, w8, [x9]
Lloh2:
	adrp	x8, _VOLTAGE_SW@GOTPAGE
Lloh3:
	ldr	x8, [x8, _VOLTAGE_SW@GOTPAGEOFF]
Lloh4:
	ldr	x8, [x8]
	str	x8, [x9, #16]
	ldr	w0, [x20, #12]
	bl	_le16_to_cpu
	ldr	x8, [x19, #16]
	ldr	x8, [x8, x26]
	add	x8, x8, x21
	str	w0, [x8, #8]
	ldr	w0, [x20, #8]
	bl	_le16_to_cpu
	ldr	x8, [x19, #16]
	ldr	x8, [x8, x26]
	add	x9, x8, x21
	str	x0, [x9, #24]
LBB0_5:
	add	x8, x8, x22, lsl #5
	ldr	w2, [x8, #8]
	and	w8, w2, #0xfffffffc
	cmp	w8, #128
	b.ne	LBB0_8
; %bb.6:
Lloh5:
	adrp	x8, _VOLTAGE_TYPE_VDDC@GOTPAGE
Lloh6:
	ldr	x8, [x8, _VOLTAGE_TYPE_VDDC@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	add	x3, sp, #12
	mov	x0, x19
	bl	_radeon_atom_get_max_vddc
	cbnz	w0, LBB0_8
; %bb.7:
	ldr	w8, [sp, #12]
	ldr	x9, [x19, #16]
	ldr	x9, [x9, x24, lsl #3]
	add	x9, x9, x22, lsl #5
	str	w8, [x9, #8]
LBB0_8:
	ldr	w9, [x19]
	ldr	w10, [x23]
	ldr	x8, [x19, #16]
	ldr	x8, [x8, x24, lsl #3]
	tst	w10, w9
	b.ne	LBB0_10
; %bb.9:
	add	x9, x8, x22, lsl #5
	ldr	w9, [x9, #4]
	cbz	w9, LBB0_12
LBB0_10:
	lsl	x9, x22, #5
	ldr	w8, [x8, x9]
	cbz	w8, LBB0_12
; %bb.11:
	mov	w0, #1
	b	LBB0_13
LBB0_12:
	mov	w0, #0
LBB0_13:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_14:
	ldr	w0, [x20, #16]
	bl	_le16_to_cpu
	ldr	w8, [x20]
	orr	w25, w0, w8, lsl #16
	ldr	w0, [x20, #12]
	bl	_le16_to_cpu
	ldr	w8, [x20, #4]
	orr	w8, w0, w8, lsl #16
	ldr	x9, [x19, #16]
                                        ; kill: def $w22 killed $w22 killed $x22 def $x22
	sbfiz	x26, x22, #3, #32
	ldr	x9, [x9, x26]
	sxtw	x24, w22
                                        ; kill: def $w21 killed $w21 killed $x21 def $x21
	sxtw	x22, w21
	sbfiz	x21, x21, #5, #32
	add	x9, x9, x21
	stp	w25, w8, [x9]
Lloh8:
	adrp	x8, _VOLTAGE_SW@GOTPAGE
Lloh9:
	ldr	x8, [x8, _VOLTAGE_SW@GOTPAGEOFF]
Lloh10:
	ldr	x8, [x8]
	str	x8, [x9, #16]
	ldr	w0, [x20, #8]
	bl	_le16_to_cpu
	ldr	x8, [x19, #16]
	ldr	x8, [x8, x26]
	add	x9, x8, x21
	str	w0, [x9, #8]
	b	LBB0_5
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_IS_IGP,4,2              ; @RADEON_IS_IGP
	.comm	_CHIP_PALM,8,3                  ; @CHIP_PALM
	.comm	_VOLTAGE_SW,8,3                 ; @VOLTAGE_SW
	.comm	_VOLTAGE_TYPE_VDDC,4,2          ; @VOLTAGE_TYPE_VDDC
	.no_dead_strip	_radeon_atombios_parse_pplib_clock_info
.subsections_via_symbols
