	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pm3393_interrupt_enable
_pm3393_interrupt_enable:               ## @pm3393_interrupt_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_XRF_INTERRUPT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_XRF_DIAG_INTERRUPT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_RXOAM_INTERRUPT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_IFLX_FIFO_OVERFLOW_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_PL4ODP_INTERRUPT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_XTEF_INTERRUPT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_TXOAM_INTERRUPT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_RXXG_CONFIG_3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_TXXG_CONFIG_3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_PL4IDU_INTERRUPT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_EFLX_FIFO_OVERFLOW_ERROR_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$65535, %edx                    ## imm = 0xFFFF
	callq	_pmwrite
	movq	_SUNI1x10GEXP_REG_GLOBAL_INTERRUPT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_pmwrite
	movq	(%rbx), %rax
	movq	_A_PL_ENABLE@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	callq	_readl
	movq	_F_PL_INTR_EXT@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	(%rbx), %rcx
	movq	(%r14), %rsi
	addq	(%rcx), %rsi
	movl	%eax, %edi
	callq	_writel
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_ENABLE,4,2 ## @SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_XRF_INTERRUPT_ENABLE,4,2 ## @SUNI1x10GEXP_REG_XRF_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_XRF_DIAG_INTERRUPT_ENABLE,4,2 ## @SUNI1x10GEXP_REG_XRF_DIAG_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_RXOAM_INTERRUPT_ENABLE,4,2 ## @SUNI1x10GEXP_REG_RXOAM_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_0,4,2 ## @SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_0
	.comm	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_1,4,2 ## @SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_1
	.comm	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_2,4,2 ## @SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_2
	.comm	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_3,4,2 ## @SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_3
	.comm	_SUNI1x10GEXP_REG_IFLX_FIFO_OVERFLOW_ENABLE,4,2 ## @SUNI1x10GEXP_REG_IFLX_FIFO_OVERFLOW_ENABLE
	.comm	_SUNI1x10GEXP_REG_PL4ODP_INTERRUPT_MASK,4,2 ## @SUNI1x10GEXP_REG_PL4ODP_INTERRUPT_MASK
	.comm	_SUNI1x10GEXP_REG_XTEF_INTERRUPT_ENABLE,4,2 ## @SUNI1x10GEXP_REG_XTEF_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_TXOAM_INTERRUPT_ENABLE,4,2 ## @SUNI1x10GEXP_REG_TXOAM_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_RXXG_CONFIG_3,4,2 ## @SUNI1x10GEXP_REG_RXXG_CONFIG_3
	.comm	_SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_MASK,4,2 ## @SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_MASK
	.comm	_SUNI1x10GEXP_REG_TXXG_CONFIG_3,4,2 ## @SUNI1x10GEXP_REG_TXXG_CONFIG_3
	.comm	_SUNI1x10GEXP_REG_PL4IDU_INTERRUPT_MASK,4,2 ## @SUNI1x10GEXP_REG_PL4IDU_INTERRUPT_MASK
	.comm	_SUNI1x10GEXP_REG_EFLX_FIFO_OVERFLOW_ERROR_ENABLE,4,2 ## @SUNI1x10GEXP_REG_EFLX_FIFO_OVERFLOW_ERROR_ENABLE
	.comm	_SUNI1x10GEXP_REG_GLOBAL_INTERRUPT_ENABLE,4,2 ## @SUNI1x10GEXP_REG_GLOBAL_INTERRUPT_ENABLE
	.comm	_A_PL_ENABLE,8,3                ## @A_PL_ENABLE
	.comm	_F_PL_INTR_EXT,4,2              ## @F_PL_INTR_EXT
	.no_dead_strip	_pm3393_interrupt_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pm3393_interrupt_enable
_pm3393_interrupt_enable:               ; @pm3393_interrupt_enable
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	w2, #65535
	bl	_pmwrite
Lloh3:
	adrp	x8, _SUNI1x10GEXP_REG_XRF_INTERRUPT_ENABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_XRF_INTERRUPT_ENABLE@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh6:
	adrp	x8, _SUNI1x10GEXP_REG_XRF_DIAG_INTERRUPT_ENABLE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_XRF_DIAG_INTERRUPT_ENABLE@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh9:
	adrp	x8, _SUNI1x10GEXP_REG_RXOAM_INTERRUPT_ENABLE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_RXOAM_INTERRUPT_ENABLE@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh12:
	adrp	x8, _SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_0@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_0@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_pmwrite
Lloh15:
	adrp	x8, _SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_1@GOTPAGE
Lloh16:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_1@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_pmwrite
Lloh18:
	adrp	x8, _SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_2@GOTPAGE
Lloh19:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_2@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_pmwrite
Lloh21:
	adrp	x8, _SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_3@GOTPAGE
Lloh22:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_3@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_pmwrite
Lloh24:
	adrp	x8, _SUNI1x10GEXP_REG_IFLX_FIFO_OVERFLOW_ENABLE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_IFLX_FIFO_OVERFLOW_ENABLE@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh27:
	adrp	x8, _SUNI1x10GEXP_REG_PL4ODP_INTERRUPT_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_PL4ODP_INTERRUPT_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh30:
	adrp	x8, _SUNI1x10GEXP_REG_XTEF_INTERRUPT_ENABLE@GOTPAGE
Lloh31:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_XTEF_INTERRUPT_ENABLE@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh33:
	adrp	x8, _SUNI1x10GEXP_REG_TXOAM_INTERRUPT_ENABLE@GOTPAGE
Lloh34:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_TXOAM_INTERRUPT_ENABLE@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh36:
	adrp	x8, _SUNI1x10GEXP_REG_RXXG_CONFIG_3@GOTPAGE
Lloh37:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_RXXG_CONFIG_3@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh39:
	adrp	x8, _SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_MASK@GOTPAGE
Lloh40:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_MASK@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh42:
	adrp	x8, _SUNI1x10GEXP_REG_TXXG_CONFIG_3@GOTPAGE
Lloh43:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_TXXG_CONFIG_3@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh45:
	adrp	x8, _SUNI1x10GEXP_REG_PL4IDU_INTERRUPT_MASK@GOTPAGE
Lloh46:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_PL4IDU_INTERRUPT_MASK@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh48:
	adrp	x8, _SUNI1x10GEXP_REG_EFLX_FIFO_OVERFLOW_ERROR_ENABLE@GOTPAGE
Lloh49:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_EFLX_FIFO_OVERFLOW_ERROR_ENABLE@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #65535
	bl	_pmwrite
Lloh51:
	adrp	x8, _SUNI1x10GEXP_REG_GLOBAL_INTERRUPT_ENABLE@GOTPAGE
Lloh52:
	ldr	x8, [x8, _SUNI1x10GEXP_REG_GLOBAL_INTERRUPT_ENABLE@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_pmwrite
	ldr	x8, [x19]
	ldr	x8, [x8]
Lloh54:
	adrp	x20, _A_PL_ENABLE@GOTPAGE
Lloh55:
	ldr	x20, [x20, _A_PL_ENABLE@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x0, x9, x8
	bl	_readl
Lloh56:
	adrp	x8, _F_PL_INTR_EXT@GOTPAGE
Lloh57:
	ldr	x8, [x8, _F_PL_INTR_EXT@GOTPAGEOFF]
Lloh58:
	ldr	w8, [x8]
	orr	w0, w8, w0
	ldr	x8, [x19]
	ldr	x8, [x8]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_ENABLE,4,2 ; @SUNI1x10GEXP_REG_SERDES_3125_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_XRF_INTERRUPT_ENABLE,4,2 ; @SUNI1x10GEXP_REG_XRF_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_XRF_DIAG_INTERRUPT_ENABLE,4,2 ; @SUNI1x10GEXP_REG_XRF_DIAG_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_RXOAM_INTERRUPT_ENABLE,4,2 ; @SUNI1x10GEXP_REG_RXOAM_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_0,4,2 ; @SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_0
	.comm	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_1,4,2 ; @SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_1
	.comm	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_2,4,2 ; @SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_2
	.comm	_SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_3,4,2 ; @SUNI1x10GEXP_REG_MSTAT_INTERRUPT_MASK_3
	.comm	_SUNI1x10GEXP_REG_IFLX_FIFO_OVERFLOW_ENABLE,4,2 ; @SUNI1x10GEXP_REG_IFLX_FIFO_OVERFLOW_ENABLE
	.comm	_SUNI1x10GEXP_REG_PL4ODP_INTERRUPT_MASK,4,2 ; @SUNI1x10GEXP_REG_PL4ODP_INTERRUPT_MASK
	.comm	_SUNI1x10GEXP_REG_XTEF_INTERRUPT_ENABLE,4,2 ; @SUNI1x10GEXP_REG_XTEF_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_TXOAM_INTERRUPT_ENABLE,4,2 ; @SUNI1x10GEXP_REG_TXOAM_INTERRUPT_ENABLE
	.comm	_SUNI1x10GEXP_REG_RXXG_CONFIG_3,4,2 ; @SUNI1x10GEXP_REG_RXXG_CONFIG_3
	.comm	_SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_MASK,4,2 ; @SUNI1x10GEXP_REG_PL4IO_LOCK_DETECT_MASK
	.comm	_SUNI1x10GEXP_REG_TXXG_CONFIG_3,4,2 ; @SUNI1x10GEXP_REG_TXXG_CONFIG_3
	.comm	_SUNI1x10GEXP_REG_PL4IDU_INTERRUPT_MASK,4,2 ; @SUNI1x10GEXP_REG_PL4IDU_INTERRUPT_MASK
	.comm	_SUNI1x10GEXP_REG_EFLX_FIFO_OVERFLOW_ERROR_ENABLE,4,2 ; @SUNI1x10GEXP_REG_EFLX_FIFO_OVERFLOW_ERROR_ENABLE
	.comm	_SUNI1x10GEXP_REG_GLOBAL_INTERRUPT_ENABLE,4,2 ; @SUNI1x10GEXP_REG_GLOBAL_INTERRUPT_ENABLE
	.comm	_A_PL_ENABLE,8,3                ; @A_PL_ENABLE
	.comm	_F_PL_INTR_EXT,4,2              ; @F_PL_INTR_EXT
	.no_dead_strip	_pm3393_interrupt_enable
.subsections_via_symbols
