	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_cp_init                 ## -- Begin function radeon_cp_init
	.p2align	4, 0x90
_radeon_cp_init:                        ## @radeon_cp_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movq	(%rdi), %r12
	movq	%rdx, %rsi
	callq	_LOCK_TEST_WITH_RETURN
	movl	(%r15), %eax
	cmpl	$129, %eax
	jne	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_r300_init_reg_flags
	movl	(%r15), %eax
LBB0_2:
	leal	-129(%rax), %ecx
	cmpl	$3, %ecx
	jae	LBB0_3
## %bb.7:
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_do_init_cp              ## TAILCALL
LBB0_3:
	cmpl	$128, %eax
	je	LBB0_8
## %bb.4:
	cmpl	$132, %eax
	jne	LBB0_10
## %bb.5:
	movq	_RADEON_FAMILY_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	(%r12), %eax
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jge	LBB0_6
## %bb.9:
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_do_cleanup_cp           ## TAILCALL
LBB0_8:
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_r600_do_init_cp                ## TAILCALL
LBB0_10:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_r600_do_cleanup_cp             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_FAMILY_MASK,4,2         ## @RADEON_FAMILY_MASK
	.comm	_CHIP_R600,4,2                  ## @CHIP_R600
	.comm	_EINVAL,4,2                     ## @EINVAL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_cp_init                 ; -- Begin function radeon_cp_init
	.p2align	2
_radeon_cp_init:                        ; @radeon_cp_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	ldr	x22, [x0]
	mov	x1, x2
	bl	_LOCK_TEST_WITH_RETURN
	ldr	w8, [x21]
	cmp	w8, #129
	b.ne	LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_r300_init_reg_flags
	ldr	w8, [x21]
LBB0_2:
	sub	w9, w8, #129
	cmp	w9, #3
	b.hs	LBB0_4
; %bb.3:
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_radeon_do_init_cp
LBB0_4:
	cmp	w8, #128
	b.eq	LBB0_8
; %bb.5:
	cmp	w8, #132
	b.ne	LBB0_9
; %bb.6:
	ldr	w8, [x22]
Lloh0:
	adrp	x9, _RADEON_FAMILY_MASK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_FAMILY_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh3:
	adrp	x9, _CHIP_R600@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CHIP_R600@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	mov	x0, x19
	cmp	w8, w9
	b.ge	LBB0_10
; %bb.7:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_radeon_do_cleanup_cp
LBB0_8:
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_r600_do_init_cp
LBB0_9:
Lloh6:
	adrp	x8, _EINVAL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	neg	w0, w8
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_10:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_r600_do_cleanup_cp
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_FAMILY_MASK,4,2         ; @RADEON_FAMILY_MASK
	.comm	_CHIP_R600,4,2                  ; @CHIP_R600
	.comm	_EINVAL,4,2                     ; @EINVAL
.subsections_via_symbols
