	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_overscan_setup
_radeon_overscan_setup:                 ## @radeon_overscan_setup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	callq	_to_radeon_crtc
	movq	%rax, %rbx
	movq	_RADEON_OVR_CLR@GOTPCREL(%rip), %rax
	movq	(%rbx), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_RADEON_OVR_WID_LEFT_RIGHT@GOTPCREL(%rip), %rax
	movq	(%rbx), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_RADEON_OVR_WID_TOP_BOTTOM@GOTPCREL(%rip), %rax
	movq	(%rbx), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_OVR_CLR,8,3             ## @RADEON_OVR_CLR
	.comm	_RADEON_OVR_WID_LEFT_RIGHT,8,3  ## @RADEON_OVR_WID_LEFT_RIGHT
	.comm	_RADEON_OVR_WID_TOP_BOTTOM,8,3  ## @RADEON_OVR_WID_TOP_BOTTOM
	.no_dead_strip	_radeon_overscan_setup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_overscan_setup
_radeon_overscan_setup:                 ; @radeon_overscan_setup
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_to_radeon_crtc
	mov	x19, x0
Lloh0:
	adrp	x8, _RADEON_OVR_CLR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_OVR_CLR@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	ldr	x9, [x0]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh3:
	adrp	x8, _RADEON_OVR_WID_LEFT_RIGHT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RADEON_OVR_WID_LEFT_RIGHT@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	ldr	x9, [x19]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh6:
	adrp	x8, _RADEON_OVR_WID_TOP_BOTTOM@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RADEON_OVR_WID_TOP_BOTTOM@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	ldr	x9, [x19]
	add	x0, x9, x8
	mov	w1, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_OVR_CLR,8,3             ; @RADEON_OVR_CLR
	.comm	_RADEON_OVR_WID_LEFT_RIGHT,8,3  ; @RADEON_OVR_WID_LEFT_RIGHT
	.comm	_RADEON_OVR_WID_TOP_BOTTOM,8,3  ; @RADEON_OVR_WID_TOP_BOTTOM
	.no_dead_strip	_radeon_overscan_setup
.subsections_via_symbols
