	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_update_display_priority ## -- Begin function radeon_update_display_priority
	.p2align	4, 0x90
_radeon_update_display_priority:        ## @radeon_update_display_priority
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	_radeon_disp_priority@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	cmpl	$3, %eax
	jl	LBB0_7
LBB0_2:
	movq	%rbx, %rdi
	callq	_ASIC_IS_R300
	testq	%rax, %rax
	jne	LBB0_4
## %bb.3:
	movq	(%rbx), %rax
	movq	_CHIP_RV515@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_6
LBB0_4:
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%rbx)
	je	LBB0_5
LBB0_6:
	xorl	%eax, %eax
	jmp	LBB0_7
LBB0_5:
	movl	$2, %eax
LBB0_7:
	movl	%eax, 12(%rbx)
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_radeon_disp_priority,4,2       ## @radeon_disp_priority
	.comm	_CHIP_RV515,8,3                 ## @CHIP_RV515
	.comm	_RADEON_IS_IGP,4,2              ## @RADEON_IS_IGP
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_update_display_priority ; -- Begin function radeon_update_display_priority
	.p2align	2
_radeon_update_display_priority:        ; @radeon_update_display_priority
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _radeon_disp_priority@GOTPAGE
Lloh1:
	ldr	x8, [x8, _radeon_disp_priority@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, #0
	ccmp	w8, #3, #0, ne
	b.lt	LBB0_6
; %bb.1:
	mov	x0, x19
	bl	_ASIC_IS_R300
	cbnz	x0, LBB0_3
; %bb.2:
	ldr	x8, [x19]
Lloh3:
	adrp	x9, _CHIP_RV515@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CHIP_RV515@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_4
LBB0_3:
	ldr	w8, [x19, #8]
Lloh6:
	adrp	x9, _RADEON_IS_IGP@GOTPAGE
Lloh7:
	ldr	x9, [x9, _RADEON_IS_IGP@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_5
LBB0_4:
	mov	w8, #0
	b	LBB0_6
LBB0_5:
	mov	w8, #2
LBB0_6:
	str	w8, [x19, #12]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_radeon_disp_priority,4,2       ; @radeon_disp_priority
	.comm	_CHIP_RV515,8,3                 ; @CHIP_RV515
	.comm	_RADEON_IS_IGP,4,2              ; @RADEON_IS_IGP
.subsections_via_symbols
