	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_do_cp_start
_radeon_do_cp_start:                    ## @radeon_do_cp_start
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG
	movq	%rbx, %rdi
	callq	_radeon_do_wait_for_idle
	movq	_RADEON_CP_CSQ_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	12(%rbx), %esi
	callq	_RADEON_WRITE
	movl	$1, (%rbx)
	movq	_RADEON_FAMILY_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	4(%rbx), %eax
	movq	_CHIP_R420@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_2
## %bb.1:
	movl	$3, %edi
	callq	_BEGIN_RING
	movq	_R300_CP_RESYNC_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_CP_PACKET0
	movl	%eax, %edi
	callq	_OUT_RING
	movl	$5, %edi
	callq	_OUT_RING
	movl	$-559038737, %edi               ## imm = 0xDEADBEEF
	callq	_OUT_RING
	xorl	%eax, %eax
	callq	_ADVANCE_RING
	xorl	%eax, %eax
	callq	_COMMIT_RING
LBB0_2:
	movl	$8, %edi
	callq	_BEGIN_RING
	movq	_RADEON_ISYNC_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_CP_PACKET0
	movl	%eax, %edi
	callq	_OUT_RING
	movq	_RADEON_ISYNC_ANY2D_IDLE3D@GOTPCREL(%rip), %rax
	movq	_RADEON_ISYNC_ANY3D_IDLE2D@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	orl	(%rax), %edi
	movq	_RADEON_ISYNC_WAIT_IDLEGUI@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_RADEON_ISYNC_CPSCRATCH_IDLEGUI@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	callq	_OUT_RING
	xorl	%eax, %eax
	callq	_RADEON_PURGE_CACHE
	xorl	%eax, %eax
	callq	_RADEON_PURGE_ZCACHE
	xorl	%eax, %eax
	callq	_RADEON_WAIT_UNTIL_IDLE
	xorl	%eax, %eax
	callq	_ADVANCE_RING
	xorl	%eax, %eax
	callq	_COMMIT_RING
	movq	_RADEON_FLUSH_EMITED@GOTPCREL(%rip), %rax
	movq	_RADEON_PURGE_EMITED@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	orl	%ecx, 8(%rbx)
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RING_LOCALS,4,2                ## @RING_LOCALS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\n"

	.comm	_RADEON_CP_CSQ_CNTL,4,2         ## @RADEON_CP_CSQ_CNTL
	.comm	_RADEON_FAMILY_MASK,4,2         ## @RADEON_FAMILY_MASK
	.comm	_CHIP_R420,4,2                  ## @CHIP_R420
	.comm	_R300_CP_RESYNC_ADDR,4,2        ## @R300_CP_RESYNC_ADDR
	.comm	_RADEON_ISYNC_CNTL,4,2          ## @RADEON_ISYNC_CNTL
	.comm	_RADEON_ISYNC_ANY2D_IDLE3D,4,2  ## @RADEON_ISYNC_ANY2D_IDLE3D
	.comm	_RADEON_ISYNC_ANY3D_IDLE2D,4,2  ## @RADEON_ISYNC_ANY3D_IDLE2D
	.comm	_RADEON_ISYNC_WAIT_IDLEGUI,4,2  ## @RADEON_ISYNC_WAIT_IDLEGUI
	.comm	_RADEON_ISYNC_CPSCRATCH_IDLEGUI,4,2 ## @RADEON_ISYNC_CPSCRATCH_IDLEGUI
	.comm	_RADEON_FLUSH_EMITED,4,2        ## @RADEON_FLUSH_EMITED
	.comm	_RADEON_PURGE_EMITED,4,2        ## @RADEON_PURGE_EMITED
	.no_dead_strip	_radeon_do_cp_start
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_do_cp_start
_radeon_do_cp_start:                    ; @radeon_do_cp_start
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
	mov	x0, x19
	bl	_radeon_do_wait_for_idle
Lloh2:
	adrp	x8, _RADEON_CP_CSQ_CNTL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RADEON_CP_CSQ_CNTL@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	ldr	w1, [x19, #12]
	bl	_RADEON_WRITE
	mov	w8, #1
	str	w8, [x19]
	ldr	w8, [x19, #4]
Lloh5:
	adrp	x9, _RADEON_FAMILY_MASK@GOTPAGE
Lloh6:
	ldr	x9, [x9, _RADEON_FAMILY_MASK@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh8:
	adrp	x9, _CHIP_R420@GOTPAGE
Lloh9:
	ldr	x9, [x9, _CHIP_R420@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_2
; %bb.1:
	mov	w0, #3
	bl	_BEGIN_RING
Lloh11:
	adrp	x8, _R300_CP_RESYNC_ADDR@GOTPAGE
Lloh12:
	ldr	x8, [x8, _R300_CP_RESYNC_ADDR@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	mov	w1, #1
	bl	_CP_PACKET0
	bl	_OUT_RING
	mov	w0, #5
	bl	_OUT_RING
	mov	w0, #48879
	movk	w0, #57005, lsl #16
	bl	_OUT_RING
	bl	_ADVANCE_RING
	bl	_COMMIT_RING
LBB0_2:
	mov	w0, #8
	bl	_BEGIN_RING
Lloh14:
	adrp	x8, _RADEON_ISYNC_CNTL@GOTPAGE
Lloh15:
	ldr	x8, [x8, _RADEON_ISYNC_CNTL@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_CP_PACKET0
	bl	_OUT_RING
Lloh17:
	adrp	x8, _RADEON_ISYNC_ANY2D_IDLE3D@GOTPAGE
Lloh18:
	ldr	x8, [x8, _RADEON_ISYNC_ANY2D_IDLE3D@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
Lloh20:
	adrp	x9, _RADEON_ISYNC_ANY3D_IDLE2D@GOTPAGE
Lloh21:
	ldr	x9, [x9, _RADEON_ISYNC_ANY3D_IDLE2D@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh23:
	adrp	x9, _RADEON_ISYNC_WAIT_IDLEGUI@GOTPAGE
Lloh24:
	ldr	x9, [x9, _RADEON_ISYNC_WAIT_IDLEGUI@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh26:
	adrp	x9, _RADEON_ISYNC_CPSCRATCH_IDLEGUI@GOTPAGE
Lloh27:
	ldr	x9, [x9, _RADEON_ISYNC_CPSCRATCH_IDLEGUI@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	orr	w0, w8, w9
	bl	_OUT_RING
	bl	_RADEON_PURGE_CACHE
	bl	_RADEON_PURGE_ZCACHE
	bl	_RADEON_WAIT_UNTIL_IDLE
	bl	_ADVANCE_RING
	bl	_COMMIT_RING
Lloh29:
	adrp	x8, _RADEON_FLUSH_EMITED@GOTPAGE
Lloh30:
	ldr	x8, [x8, _RADEON_FLUSH_EMITED@GOTPAGEOFF]
Lloh31:
	adrp	x9, _RADEON_PURGE_EMITED@GOTPAGE
Lloh32:
	ldr	x9, [x9, _RADEON_PURGE_EMITED@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
Lloh34:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [x19, #8]
	orr	w8, w8, w9
	str	w8, [x19, #8]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh33
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_RING_LOCALS,4,2                ; @RING_LOCALS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\n"

	.comm	_RADEON_CP_CSQ_CNTL,4,2         ; @RADEON_CP_CSQ_CNTL
	.comm	_RADEON_FAMILY_MASK,4,2         ; @RADEON_FAMILY_MASK
	.comm	_CHIP_R420,4,2                  ; @CHIP_R420
	.comm	_R300_CP_RESYNC_ADDR,4,2        ; @R300_CP_RESYNC_ADDR
	.comm	_RADEON_ISYNC_CNTL,4,2          ; @RADEON_ISYNC_CNTL
	.comm	_RADEON_ISYNC_ANY2D_IDLE3D,4,2  ; @RADEON_ISYNC_ANY2D_IDLE3D
	.comm	_RADEON_ISYNC_ANY3D_IDLE2D,4,2  ; @RADEON_ISYNC_ANY3D_IDLE2D
	.comm	_RADEON_ISYNC_WAIT_IDLEGUI,4,2  ; @RADEON_ISYNC_WAIT_IDLEGUI
	.comm	_RADEON_ISYNC_CPSCRATCH_IDLEGUI,4,2 ; @RADEON_ISYNC_CPSCRATCH_IDLEGUI
	.comm	_RADEON_FLUSH_EMITED,4,2        ; @RADEON_FLUSH_EMITED
	.comm	_RADEON_PURGE_EMITED,4,2        ; @RADEON_PURGE_EMITED
	.no_dead_strip	_radeon_do_cp_start
.subsections_via_symbols
