	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function r100_irq_ack
_r100_irq_ack:                          ## @r100_irq_ack
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_RADEON_GEN_INT_STATUS@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32
	movl	%eax, %r14d
	movq	_RADEON_SW_INT_TEST@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_RADEON_CRTC_VBLANK_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_RADEON_CRTC2_VBLANK_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RADEON_FP_DETECT_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_RADEON_FP2_DETECT_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	testl	%r14d, %r14d
	je	LBB0_2
## %bb.1:
	movl	(%r15), %edi
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movl	%r14d, %esi
	movl	%ecx, %r15d
	callq	_WREG32
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%r15d, %ecx
LBB0_2:
	orl	%ecx, %ebx
	orl	%esi, %ebx
	orl	%r13d, %ebx
	orl	%r12d, %ebx
	andl	%r14d, %ebx
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_GEN_INT_STATUS,4,2      ## @RADEON_GEN_INT_STATUS
	.comm	_RADEON_SW_INT_TEST,4,2         ## @RADEON_SW_INT_TEST
	.comm	_RADEON_CRTC_VBLANK_STAT,4,2    ## @RADEON_CRTC_VBLANK_STAT
	.comm	_RADEON_CRTC2_VBLANK_STAT,4,2   ## @RADEON_CRTC2_VBLANK_STAT
	.comm	_RADEON_FP_DETECT_STAT,4,2      ## @RADEON_FP_DETECT_STAT
	.comm	_RADEON_FP2_DETECT_STAT,4,2     ## @RADEON_FP2_DETECT_STAT
	.no_dead_strip	_r100_irq_ack
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function r100_irq_ack
_r100_irq_ack:                          ; @r100_irq_ack
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
Lloh0:
	adrp	x20, _RADEON_GEN_INT_STATUS@GOTPAGE
Lloh1:
	ldr	x20, [x20, _RADEON_GEN_INT_STATUS@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	_RREG32
	mov	x19, x0
Lloh2:
	adrp	x8, _RADEON_SW_INT_TEST@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RADEON_SW_INT_TEST@GOTPAGEOFF]
Lloh4:
	ldr	w21, [x8]
Lloh5:
	adrp	x8, _RADEON_CRTC_VBLANK_STAT@GOTPAGE
Lloh6:
	ldr	x8, [x8, _RADEON_CRTC_VBLANK_STAT@GOTPAGEOFF]
Lloh7:
	ldr	w22, [x8]
Lloh8:
	adrp	x8, _RADEON_CRTC2_VBLANK_STAT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _RADEON_CRTC2_VBLANK_STAT@GOTPAGEOFF]
Lloh10:
	ldr	w23, [x8]
Lloh11:
	adrp	x8, _RADEON_FP_DETECT_STAT@GOTPAGE
Lloh12:
	ldr	x8, [x8, _RADEON_FP_DETECT_STAT@GOTPAGEOFF]
Lloh13:
	ldr	w24, [x8]
Lloh14:
	adrp	x8, _RADEON_FP2_DETECT_STAT@GOTPAGE
Lloh15:
	ldr	x8, [x8, _RADEON_FP2_DETECT_STAT@GOTPAGEOFF]
Lloh16:
	ldr	w25, [x8]
	cbz	w0, LBB0_2
; %bb.1:
	ldr	w0, [x20]
	mov	x1, x19
	bl	_WREG32
LBB0_2:
	orr	w8, w22, w21
	orr	w8, w8, w23
	orr	w8, w8, w24
	orr	w8, w8, w25
	and	w0, w8, w19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_GEN_INT_STATUS,4,2      ; @RADEON_GEN_INT_STATUS
	.comm	_RADEON_SW_INT_TEST,4,2         ; @RADEON_SW_INT_TEST
	.comm	_RADEON_CRTC_VBLANK_STAT,4,2    ; @RADEON_CRTC_VBLANK_STAT
	.comm	_RADEON_CRTC2_VBLANK_STAT,4,2   ; @RADEON_CRTC2_VBLANK_STAT
	.comm	_RADEON_FP_DETECT_STAT,4,2      ; @RADEON_FP_DETECT_STAT
	.comm	_RADEON_FP2_DETECT_STAT,4,2     ; @RADEON_FP2_DETECT_STAT
	.no_dead_strip	_r100_irq_ack
.subsections_via_symbols
