	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_vram_location           ## -- Begin function radeon_vram_location
	.p2align	4, 0x90
_radeon_vram_location:                  ## @radeon_vram_location
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
                                        ## kill: def $edx killed $edx def $rdx
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	_radeon_vram_limit@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	%edx, (%rsi)
	movl	4(%rsi), %eax
	movl	%edx, %ecx
	negl	%ecx
	cmpl	%ecx, %eax
	jbe	LBB0_2
## %bb.1:
	movl	4(%r14), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_warn
	movl	(%rbx), %edx
	movl	12(%rbx), %eax
	movl	%eax, 8(%rbx)
	movl	%eax, 4(%rbx)
LBB0_2:
	shll	$20, %r15d
	leal	(%rdx,%rax), %ecx
	decl	%ecx
	movslq	%ecx, %r8
	movq	%r8, 16(%rbx)
	movq	_RADEON_IS_AGP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%r14)
	je	LBB0_6
## %bb.3:
	cmpq	%r8, 24(%rbx)
	jge	LBB0_6
## %bb.4:
	movslq	%edx, %rcx
	cmpq	%rcx, 32(%rbx)
	jl	LBB0_6
## %bb.5:
	movl	4(%r14), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_warn
	movl	(%rbx), %edx
	movl	12(%rbx), %eax
	movl	%eax, 8(%rbx)
	movl	%eax, 4(%rbx)
	leal	(%rdx,%rax), %ecx
	decl	%ecx
	movslq	%ecx, %r8
LBB0_6:
	movq	%r8, 16(%rbx)
	movl	8(%rbx), %r9d
	testl	%r15d, %r15d
	je	LBB0_9
## %bb.7:
	cmpl	%r9d, %r15d
	jge	LBB0_9
## %bb.8:
	movl	%r15d, 8(%rbx)
	movl	%r15d, %r9d
LBB0_9:
	movl	4(%r14), %edi
	sarl	$20, %eax
	movslq	%edx, %rcx
	sarl	$20, %r9d
	leaq	L_.str.1(%rip), %rsi
	movl	%eax, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_info                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_radeon_vram_limit,8,3          ## @radeon_vram_limit
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"limiting VRAM to PCI aperture size\n"

	.comm	_RADEON_IS_AGP,4,2              ## @RADEON_IS_AGP
L_.str.1:                               ## @.str.1
	.asciz	"VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_vram_location           ; -- Begin function radeon_vram_location
	.p2align	2
_radeon_vram_location:                  ; @radeon_vram_location
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
                                        ; kill: def $w2 killed $w2 def $x2
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _radeon_vram_limit@GOTPAGE
Lloh1:
	ldr	x8, [x8, _radeon_vram_limit@GOTPAGEOFF]
Lloh2:
	ldr	w21, [x8]
	str	w2, [x1]
	ldr	w8, [x1, #4]
	neg	w9, w2
	cmp	w8, w9
	b.ls	LBB0_2
; %bb.1:
	ldr	w0, [x19, #4]
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_warn
	ldr	w8, [x20, #12]
	stp	w8, w8, [x20, #4]
	ldr	w2, [x20]
LBB0_2:
	lsl	w21, w21, #20
	add	w9, w2, w8
	sub	w9, w9, #1
	sxtw	x4, w9
	str	x4, [x20, #16]
	ldr	w9, [x19]
Lloh5:
	adrp	x10, _RADEON_IS_AGP@GOTPAGE
Lloh6:
	ldr	x10, [x10, _RADEON_IS_AGP@GOTPAGEOFF]
Lloh7:
	ldr	w10, [x10]
	tst	w10, w9
	b.eq	LBB0_6
; %bb.3:
	ldr	x9, [x20, #24]
	cmp	x9, x4
	b.ge	LBB0_6
; %bb.4:
	ldr	x9, [x20, #32]
	cmp	x9, w2, sxtw
	b.lt	LBB0_6
; %bb.5:
	ldr	w0, [x19, #4]
Lloh8:
	adrp	x1, l_.str@PAGE
Lloh9:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_warn
	ldr	w8, [x20, #12]
	stp	w8, w8, [x20, #4]
	ldr	w2, [x20]
	add	w9, w2, w8
	sub	w9, w9, #1
	sxtw	x4, w9
LBB0_6:
	str	x4, [x20, #16]
	ldr	w9, [x20, #8]
	cmp	w21, #0
	ccmp	w21, w9, #0, ne
	b.ge	LBB0_8
; %bb.7:
	str	w21, [x20, #8]
	mov	x9, x21
LBB0_8:
	ldr	w0, [x19, #4]
	asr	w8, w8, #20
	sxtw	x3, w2
	asr	w5, w9, #20
Lloh10:
	adrp	x1, l_.str.1@PAGE
Lloh11:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x2, x8
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_dev_info
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_radeon_vram_limit,8,3          ; @radeon_vram_limit
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"limiting VRAM to PCI aperture size\n"

	.comm	_RADEON_IS_AGP,4,2              ; @RADEON_IS_AGP
l_.str.1:                               ; @.str.1
	.asciz	"VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)\n"

.subsections_via_symbols
