	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function f10_dbam_to_chip_select
_f10_dbam_to_chip_select:               ## @f10_dbam_to_chip_select
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movq	%rdi, %r15
	xorl	%eax, %eax
	testq	%rsi, %rsi
	sete	%al
	movl	(%rdi,%rax,4), %ebx
	xorl	%edi, %edi
	cmpl	$12, %edx
	setae	%dil
	callq	_WARN_ON
	movq	_DDR3_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%r15)
	jne	LBB0_2
## %bb.1:
	testl	%eax, 12(%r15)
	je	LBB0_3
LBB0_2:
	movq	_WIDTH_128@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movl	%r14d, %edi
	movl	%ebx, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ddr3_cs_size                   ## TAILCALL
LBB0_3:
	movq	_WIDTH_128@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movl	%r14d, %edi
	movl	%ebx, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ddr2_cs_size                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DDR3_MODE,4,2                  ## @DDR3_MODE
	.comm	_WIDTH_128,4,2                  ## @WIDTH_128
	.no_dead_strip	_f10_dbam_to_chip_select
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function f10_dbam_to_chip_select
_f10_dbam_to_chip_select:               ; @f10_dbam_to_chip_select
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x20, x0
	cmp	x1, #0
	cset	w8, eq
	cmp	w2, #11
	ldr	w21, [x0, w8, uxtw #2]
	cset	w0, hi
	bl	_WARN_ON
	ldr	w9, [x20, #8]
Lloh0:
	adrp	x8, _DDR3_MODE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DDR3_MODE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	tst	w8, w9
	b.ne	LBB0_2
; %bb.1:
	ldr	w9, [x20, #12]
	tst	w9, w8
	b.eq	LBB0_3
LBB0_2:
Lloh3:
	adrp	x8, _WIDTH_128@GOTPAGE
Lloh4:
	ldr	x8, [x8, _WIDTH_128@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	and	w1, w8, w21
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_ddr3_cs_size
LBB0_3:
Lloh6:
	adrp	x8, _WIDTH_128@GOTPAGE
Lloh7:
	ldr	x8, [x8, _WIDTH_128@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	and	w1, w8, w21
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_ddr2_cs_size
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_DDR3_MODE,4,2                  ; @DDR3_MODE
	.comm	_WIDTH_128,4,2                  ; @WIDTH_128
	.no_dead_strip	_f10_dbam_to_chip_select
.subsections_via_symbols
