	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function socrates_nand_cmd_ctrl
_socrates_nand_cmd_ctrl:                ## @socrates_nand_cmd_ctrl
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_NAND_CMD_NONE@GOTPCREL(%rip), %rax
	cmpl	%esi, (%rax)
	jne	LBB0_1
## %bb.7:
	popq	%rbp
	retq
LBB0_1:
	movq	(%rdi), %rcx
	movq	_NAND_CLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%edx, %eax
	jne	LBB0_2
## %bb.3:
	movq	_FPGA_NAND_CMD_ADDR@GOTPCREL(%rip), %rax
	jmp	LBB0_4
LBB0_2:
	movq	_FPGA_NAND_CMD_COMMAND@GOTPCREL(%rip), %rax
LBB0_4:
	movq	(%rcx), %rdi
	movq	_NAND_NCE@GOTPCREL(%rip), %rcx
	andl	(%rcx), %edx
	je	LBB0_6
## %bb.5:
	movq	_FPGA_NAND_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
LBB0_6:
	movq	_FPGA_NAND_DATA_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movzbl	%sil, %esi
	shll	%cl, %esi
	orl	(%rax), %edx
	orl	%edx, %esi
	movl	(%rdi), %edi
	popq	%rbp
	jmp	_out_be32                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_NAND_CMD_NONE,4,2              ## @NAND_CMD_NONE
	.comm	_NAND_CLE,4,2                   ## @NAND_CLE
	.comm	_FPGA_NAND_CMD_COMMAND,4,2      ## @FPGA_NAND_CMD_COMMAND
	.comm	_FPGA_NAND_CMD_ADDR,4,2         ## @FPGA_NAND_CMD_ADDR
	.comm	_NAND_NCE,4,2                   ## @NAND_NCE
	.comm	_FPGA_NAND_ENABLE,4,2           ## @FPGA_NAND_ENABLE
	.comm	_FPGA_NAND_DATA_SHIFT,4,2       ## @FPGA_NAND_DATA_SHIFT
	.no_dead_strip	_socrates_nand_cmd_ctrl
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function socrates_nand_cmd_ctrl
_socrates_nand_cmd_ctrl:                ; @socrates_nand_cmd_ctrl
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _NAND_CMD_NONE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NAND_CMD_NONE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w1
	b.ne	LBB0_2
; %bb.1:
	ret
LBB0_2:
	ldr	x8, [x0]
	ldr	x8, [x8]
Lloh3:
	adrp	x9, _NAND_CLE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _NAND_CLE@GOTPAGEOFF]
Lloh5:
	adrp	x10, _FPGA_NAND_CMD_ADDR@GOTPAGE
Lloh6:
	ldr	x10, [x10, _FPGA_NAND_CMD_ADDR@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
Lloh8:
	adrp	x11, _FPGA_NAND_CMD_COMMAND@GOTPAGE
Lloh9:
	ldr	x11, [x11, _FPGA_NAND_CMD_COMMAND@GOTPAGEOFF]
	tst	w9, w2
	csel	x9, x10, x11, eq
	ldr	w9, [x9]
Lloh10:
	adrp	x10, _NAND_NCE@GOTPAGE
Lloh11:
	ldr	x10, [x10, _NAND_NCE@GOTPAGEOFF]
Lloh12:
	ldr	w10, [x10]
Lloh13:
	adrp	x11, _FPGA_NAND_ENABLE@GOTPAGE
Lloh14:
	ldr	x11, [x11, _FPGA_NAND_ENABLE@GOTPAGEOFF]
Lloh15:
	ldr	w11, [x11]
	tst	w10, w2
	csel	w10, wzr, w11, eq
	orr	w9, w10, w9
	and	w10, w1, #0xff
Lloh16:
	adrp	x11, _FPGA_NAND_DATA_SHIFT@GOTPAGE
Lloh17:
	ldr	x11, [x11, _FPGA_NAND_DATA_SHIFT@GOTPAGEOFF]
Lloh18:
	ldr	w11, [x11]
	lsl	w10, w10, w11
	orr	w1, w9, w10
	ldr	w0, [x8]
	b	_out_be32
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_NAND_CMD_NONE,4,2              ; @NAND_CMD_NONE
	.comm	_NAND_CLE,4,2                   ; @NAND_CLE
	.comm	_FPGA_NAND_CMD_COMMAND,4,2      ; @FPGA_NAND_CMD_COMMAND
	.comm	_FPGA_NAND_CMD_ADDR,4,2         ; @FPGA_NAND_CMD_ADDR
	.comm	_NAND_NCE,4,2                   ; @NAND_NCE
	.comm	_FPGA_NAND_ENABLE,4,2           ; @FPGA_NAND_ENABLE
	.comm	_FPGA_NAND_DATA_SHIFT,4,2       ; @FPGA_NAND_DATA_SHIFT
	.no_dead_strip	_socrates_nand_cmd_ctrl
.subsections_via_symbols
