	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nv04_dmaobj_bind
_nv04_dmaobj_bind:                      ## @nv04_dmaobj_bind
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, -64(%rbp)                 ## 8-byte Spill
	movq	%rdx, %r14
	movq	%rsi, %r13
	callq	_nv04_vmmgr
	movq	%rax, %r15
	movq	%r14, %rdi
	callq	_nv_mclass
	movl	%eax, %ebx
	movl	(%r14), %r12d
	movl	4(%r14), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_NV_ENGCTX_CLASS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_nv_iclass
	testl	%eax, %eax
	jne	LBB0_3
## %bb.1:
	movq	(%r13), %rdi
	callq	_nv_mclass
	addl	$-134, %eax
	cmpl	$4, %eax
	jae	LBB0_2
LBB0_3:
	movl	%r12d, -52(%rbp)                ## 4-byte Spill
	andl	$-4096, %r12d                   ## imm = 0xF000
	movl	8(%r14), %eax
	movq	_NV_MEM_TARGET_VM@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_8
## %bb.4:
	movq	%r15, %rdi
	callq	_nv_object
	movq	(%rax), %rax
	cmpq	_nv04_vmmgr_oclass@GOTPCREL(%rip), %rax
	jne	LBB0_7
## %bb.5:
	movq	(%r15), %rax
	movq	(%rax), %rax
	movq	(%rax), %rax
	movq	(%rax), %rsi
	cmpl	$0, (%r14)
	je	LBB0_23
## %bb.6:
	sarl	$10, %r12d
	addl	$8, %r12d
	movq	%rsi, %rdi
	movl	%r12d, %esi
	callq	_nv_ro32
	movl	%eax, %r12d
	andl	$-4096, %r12d                   ## imm = 0xF000
LBB0_7:
	movabsq	$566935683202, %rax             ## imm = 0x8400000082
	movq	%rax, 8(%r14)
	movl	$143360, %eax                   ## imm = 0x23000
	jmp	LBB0_14
LBB0_8:
	cmpl	$128, %eax
	je	LBB0_9
## %bb.10:
	cmpl	$129, %eax
	je	LBB0_13
## %bb.11:
	cmpl	$130, %eax
	jne	LBB0_2
## %bb.12:
	movl	$143360, %eax                   ## imm = 0x23000
	jmp	LBB0_14
LBB0_9:
	movl	$12288, %eax                    ## imm = 0x3000
	jmp	LBB0_14
LBB0_13:
	movl	$208896, %eax                   ## imm = 0x33000
LBB0_14:
	orl	%eax, %ebx
	movl	12(%r14), %eax
	movl	$2, %r14d
	cmpl	$131, %eax
	je	LBB0_19
## %bb.15:
	cmpl	$132, %eax
	je	LBB0_16
## %bb.17:
	cmpl	$133, %eax
	jne	LBB0_2
## %bb.18:
	movl	-48(%rbp), %r15d                ## 4-byte Reload
	orl	$16384, %ebx                    ## imm = 0x4000
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	xorl	%r14d, %r14d
	jmp	LBB0_20
LBB0_2:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_22
LBB0_19:
	movl	-48(%rbp), %r15d                ## 4-byte Reload
	orl	$32768, %ebx                    ## imm = 0x8000
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	jmp	LBB0_20
LBB0_16:
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	movl	-48(%rbp), %r15d                ## 4-byte Reload
LBB0_20:
	leaq	-72(%rbp), %r9
	movq	%r13, %rdi
	movq	%r13, %rsi
	movl	$16, %edx
	movl	$16, %ecx
	xorl	%r8d, %r8d
	callq	_nouveau_gpuobj_new
	movq	-72(%rbp), %rdi
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	movq	%rdi, (%rbx)
	testl	%eax, %eax
	jne	LBB0_22
## %bb.21:
	movl	-52(%rbp), %eax                 ## 4-byte Reload
	subl	%eax, %r15d
	shll	$20, %eax
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	orl	%eax, %edx
	xorl	%esi, %esi
	callq	_nv_wo32
	movq	(%rbx), %rdi
	movl	$4, %esi
	movl	%r15d, %edx
	callq	_nv_wo32
	movq	(%rbx), %rdi
	orl	%r12d, %r14d
	movl	$8, %esi
	movl	%r14d, %edx
	callq	_nv_wo32
	movq	(%rbx), %rdi
	movl	$12, %esi
	movl	%r14d, %edx
	callq	_nv_wo32
	xorl	%eax, %eax
LBB0_22:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_23:
	movq	%r13, %rdi
	movq	-64(%rbp), %rdx                 ## 8-byte Reload
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_nouveau_gpuobj_dup             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_NV_ENGCTX_CLASS,4,2            ## @NV_ENGCTX_CLASS
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_NV_MEM_TARGET_VM,4,2           ## @NV_MEM_TARGET_VM
	.comm	_nv04_vmmgr_oclass,4,2          ## @nv04_vmmgr_oclass
	.no_dead_strip	_nv04_dmaobj_bind
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function nv04_dmaobj_bind
lCPI0_0:
	.long	130                             ; 0x82
	.long	132                             ; 0x84
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_nv04_dmaobj_bind:                      ; @nv04_dmaobj_bind
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x3
	mov	x21, x2
	mov	x20, x1
	bl	_nv04_vmmgr
	mov	x23, x0
	mov	x0, x21
	bl	_nv_mclass
	mov	x22, x0
	ldp	w24, w25, [x21]
Lloh0:
	adrp	x8, _NV_ENGCTX_CLASS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NV_ENGCTX_CLASS@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_nv_iclass
	cbnz	w0, LBB0_2
; %bb.1:
	ldr	x0, [x20]
	bl	_nv_mclass
	sub	w8, w0, #134
	cmp	w8, #4
	b.hs	LBB0_15
LBB0_2:
	and	w26, w24, #0xfffff000
	ldr	w8, [x21, #8]
Lloh3:
	adrp	x9, _NV_MEM_TARGET_VM@GOTPAGE
Lloh4:
	ldr	x9, [x9, _NV_MEM_TARGET_VM@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_7
; %bb.3:
	mov	x0, x23
	bl	_nv_object
	ldr	x8, [x0]
Lloh6:
	adrp	x9, _nv04_vmmgr_oclass@GOTPAGE
Lloh7:
	ldr	x9, [x9, _nv04_vmmgr_oclass@GOTPAGEOFF]
	cmp	x8, x9
	b.ne	LBB0_6
; %bb.4:
	ldr	x8, [x23]
	ldr	x8, [x8]
	ldr	x8, [x8]
	ldr	x8, [x8]
	ldr	w9, [x21]
	cbz	w9, LBB0_23
; %bb.5:
	asr	w9, w26, #10
	add	w1, w9, #8
	mov	x0, x8
	bl	_nv_ro32
	and	w26, w0, #0xfffff000
LBB0_6:
Lloh8:
	adrp	x8, lCPI0_0@PAGE
Lloh9:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	str	d0, [x21, #8]
	b	LBB0_10
LBB0_7:
	cmp	w8, #128
	b.eq	LBB0_21
; %bb.8:
	cmp	w8, #129
	b.eq	LBB0_22
; %bb.9:
	cmp	w8, #130
	b.ne	LBB0_15
LBB0_10:
	mov	w8, #12288
	movk	w8, #2, lsl #16
LBB0_11:
	orr	w22, w22, w8
	ldr	w8, [x21, #12]
	cmp	w8, #131
	b.eq	LBB0_16
; %bb.12:
	cmp	w8, #132
	b.eq	LBB0_17
; %bb.13:
	cmp	w8, #133
	b.ne	LBB0_15
; %bb.14:
	mov	w21, #0
	orr	w22, w22, #0x4000
	b	LBB0_18
LBB0_15:
Lloh10:
	adrp	x8, _EINVAL@GOTPAGE
Lloh11:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_20
LBB0_16:
	orr	w22, w22, #0x8000
LBB0_17:
	mov	w21, #2
LBB0_18:
	add	x5, sp, #8
	mov	x0, x20
	mov	x1, x20
	mov	w2, #16
	mov	w3, #16
	mov	w4, #0
	bl	_nouveau_gpuobj_new
	ldr	x8, [sp, #8]
	str	x8, [x19]
	cbnz	w0, LBB0_20
; %bb.19:
	sub	w20, w25, w24
	orr	w2, w22, w24, lsl #20
	mov	x0, x8
	mov	w1, #0
	bl	_nv_wo32
	ldr	x0, [x19]
	mov	w1, #4
	mov	x2, x20
	bl	_nv_wo32
	ldr	x0, [x19]
	orr	w20, w21, w26
	mov	w1, #8
	mov	x2, x20
	bl	_nv_wo32
	ldr	x0, [x19]
	mov	w1, #12
	mov	x2, x20
	bl	_nv_wo32
	mov	w0, #0
LBB0_20:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_21:
	mov	w8, #12288
	b	LBB0_11
LBB0_22:
	mov	w8, #12288
	movk	w8, #2, lsl #16
	orr	w8, w8, #0x10000
	b	LBB0_11
LBB0_23:
	mov	x0, x20
	mov	x1, x8
	mov	x2, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	b	_nouveau_gpuobj_dup
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdr	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_NV_ENGCTX_CLASS,4,2            ; @NV_ENGCTX_CLASS
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_NV_MEM_TARGET_VM,4,2           ; @NV_MEM_TARGET_VM
	.comm	_nv04_vmmgr_oclass,4,2          ; @nv04_vmmgr_oclass
	.no_dead_strip	_nv04_dmaobj_bind
.subsections_via_symbols
