	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2_test_and_disable_2g5
_bnx2_test_and_disable_2g5:             ## @bnx2_test_and_disable_2g5
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_BNX2_PHY_FLAG_2_5G_CAPABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rdi)
	je	LBB0_1
## %bb.2:
	movq	%rdi, %rbx
	callq	_BNX2_CHIP
	movq	_BNX2_CHIP_5709@GOTPCREL(%rip), %r15
	cmpq	(%r15), %rax
	jne	LBB0_4
## %bb.3:
	movq	_MII_BNX2_BLK_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MII_BNX2_BLK_ADDR_OVER1G@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_bnx2_write_phy
LBB0_4:
	movl	4(%rbx), %esi
	leaq	-28(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_bnx2_read_phy
	movl	-28(%rbp), %edx
	movq	_BCM5708S_UP1_2G5@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%edx, %eax
	je	LBB0_5
## %bb.6:
	notl	%eax
	andl	%eax, %edx
	movl	%edx, -28(%rbp)
	movl	4(%rbx), %esi
	movq	%rbx, %rdi
	callq	_bnx2_write_phy
	movl	$1, %r14d
	jmp	LBB0_7
LBB0_1:
	xorl	%r14d, %r14d
	jmp	LBB0_9
LBB0_5:
	xorl	%r14d, %r14d
LBB0_7:
	movq	%rbx, %rdi
	callq	_BNX2_CHIP
	cmpq	(%r15), %rax
	jne	LBB0_9
## %bb.8:
	movq	_MII_BNX2_BLK_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MII_BNX2_BLK_ADDR_COMBO_IEEEB0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_bnx2_write_phy
LBB0_9:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BNX2_PHY_FLAG_2_5G_CAPABLE,4,2 ## @BNX2_PHY_FLAG_2_5G_CAPABLE
	.comm	_BNX2_CHIP_5709,8,3             ## @BNX2_CHIP_5709
	.comm	_MII_BNX2_BLK_ADDR,4,2          ## @MII_BNX2_BLK_ADDR
	.comm	_MII_BNX2_BLK_ADDR_OVER1G,4,2   ## @MII_BNX2_BLK_ADDR_OVER1G
	.comm	_BCM5708S_UP1_2G5,4,2           ## @BCM5708S_UP1_2G5
	.comm	_MII_BNX2_BLK_ADDR_COMBO_IEEEB0,4,2 ## @MII_BNX2_BLK_ADDR_COMBO_IEEEB0
	.no_dead_strip	_bnx2_test_and_disable_2g5
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2_test_and_disable_2g5
_bnx2_test_and_disable_2g5:             ; @bnx2_test_and_disable_2g5
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _BNX2_PHY_FLAG_2_5G_CAPABLE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _BNX2_PHY_FLAG_2_5G_CAPABLE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_5
; %bb.1:
	mov	x19, x0
	bl	_BNX2_CHIP
Lloh3:
	adrp	x22, _BNX2_CHIP_5709@GOTPAGE
Lloh4:
	ldr	x22, [x22, _BNX2_CHIP_5709@GOTPAGEOFF]
	ldr	x8, [x22]
Lloh5:
	adrp	x21, _MII_BNX2_BLK_ADDR@GOTPAGE
Lloh6:
	ldr	x21, [x21, _MII_BNX2_BLK_ADDR@GOTPAGEOFF]
	cmp	x0, x8
	b.ne	LBB0_3
; %bb.2:
	ldr	w1, [x21]
Lloh7:
	adrp	x8, _MII_BNX2_BLK_ADDR_OVER1G@GOTPAGE
Lloh8:
	ldr	x8, [x8, _MII_BNX2_BLK_ADDR_OVER1G@GOTPAGEOFF]
Lloh9:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_bnx2_write_phy
LBB0_3:
	ldr	w1, [x19, #4]
	add	x2, sp, #12
	mov	x0, x19
	bl	_bnx2_read_phy
	ldr	w8, [sp, #12]
Lloh10:
	adrp	x9, _BCM5708S_UP1_2G5@GOTPAGE
Lloh11:
	ldr	x9, [x9, _BCM5708S_UP1_2G5@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.4:
	bic	w2, w8, w9
	str	w2, [sp, #12]
	ldr	w1, [x19, #4]
	mov	x0, x19
	bl	_bnx2_write_phy
	mov	w20, #1
	b	LBB0_7
LBB0_5:
	mov	w20, #0
	b	LBB0_9
LBB0_6:
	mov	w20, #0
LBB0_7:
	mov	x0, x19
	bl	_BNX2_CHIP
	ldr	x8, [x22]
	cmp	x0, x8
	b.ne	LBB0_9
; %bb.8:
	ldr	w1, [x21]
Lloh13:
	adrp	x8, _MII_BNX2_BLK_ADDR_COMBO_IEEEB0@GOTPAGE
Lloh14:
	ldr	x8, [x8, _MII_BNX2_BLK_ADDR_COMBO_IEEEB0@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_bnx2_write_phy
LBB0_9:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.cfi_endproc
                                        ; -- End function
	.comm	_BNX2_PHY_FLAG_2_5G_CAPABLE,4,2 ; @BNX2_PHY_FLAG_2_5G_CAPABLE
	.comm	_BNX2_CHIP_5709,8,3             ; @BNX2_CHIP_5709
	.comm	_MII_BNX2_BLK_ADDR,4,2          ; @MII_BNX2_BLK_ADDR
	.comm	_MII_BNX2_BLK_ADDR_OVER1G,4,2   ; @MII_BNX2_BLK_ADDR_OVER1G
	.comm	_BCM5708S_UP1_2G5,4,2           ; @BCM5708S_UP1_2G5
	.comm	_MII_BNX2_BLK_ADDR_COMBO_IEEEB0,4,2 ; @MII_BNX2_BLK_ADDR_COMBO_IEEEB0
	.no_dead_strip	_bnx2_test_and_disable_2g5
.subsections_via_symbols
