	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function frpw_test_proto
LCPI0_0:
	.quad	2                               ## 0x2
	.quad	3                               ## 0x3
LCPI0_1:
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	1                               ## 0x1
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
	.byte	0                               ## 0x0
LCPI0_2:
	.quad	4                               ## 0x4
	.quad	4                               ## 0x4
LCPI0_3:
	.quad	8                               ## 0x8
	.quad	8                               ## 0x8
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_frpw_test_proto:                       ## @frpw_test_proto
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ebx
	movq	%rsi, %r14
	movq	%rdi, %r15
	movl	(%rdi), %eax
	movl	%eax, %ecx
	sarl	%ecx
	cmpl	4(%rdi), %ecx
	je	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	callq	_frpw_test_pnp
                                        ## kill: def $eax killed $eax def $rax
	movl	4(%r15), %ecx
	leal	(%rax,%rcx,2), %eax
	movl	%eax, (%r15)
LBB0_2:
	testb	$1, %al
	jne	LBB0_6
## %bb.3:
	movl	8(%r15), %edx
	cmpl	$3, %edx
	jl	LBB0_6
## %bb.4:
	movl	$1, %r12d
	testl	%ebx, %ebx
	je	LBB0_20
## %bb.5:
	movl	12(%r15), %esi
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_printk
	jmp	LBB0_20
LBB0_6:
	andl	$-2147483647, %eax              ## imm = 0x80000001
	cmpl	$1, %eax
	jne	LBB0_10
## %bb.7:
	cmpl	$2, 8(%r15)
	jne	LBB0_10
## %bb.8:
	movl	$1, %r12d
	testl	%ebx, %ebx
	je	LBB0_20
## %bb.9:
	movl	12(%r15), %esi
	leaq	L_.str.1(%rip), %rdi
	xorl	%eax, %eax
	callq	_printk
	jmp	LBB0_20
LBB0_10:
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	movq	%r15, %rdi
	callq	_frpw_connect
	xorl	%r13d, %r13d
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$6, %edx
	movl	$160, %ecx
	callq	_frpw_write_regr
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %r14d
	xorl	$170, %r14d
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$2, %edx
	movl	%r14d, %ecx
	callq	_frpw_write_regr
	movl	%ebx, %ecx
	xorl	$85, %ecx
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$3, %edx
	callq	_frpw_write_regr
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$2, %edx
	callq	_frpw_read_regr
	xorl	%ecx, %ecx
	cmpl	%r14d, %eax
	setne	%cl
	addl	%ecx, %r13d
	incl	%ebx
	cmpl	$256, %ebx                      ## imm = 0x100
	jne	LBB0_11
## %bb.12:
	xorl	%r14d, %r14d
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$6, %edx
	movl	$176, %ecx
	callq	_frpw_write_regr
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_13:                                ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %r12d
	xorl	$170, %r12d
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$2, %edx
	movl	%r12d, %ecx
	callq	_frpw_write_regr
	movl	%ebx, %ecx
	xorl	$85, %ecx
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$3, %edx
	callq	_frpw_write_regr
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$2, %edx
	callq	_frpw_read_regr
	xorl	%ecx, %ecx
	cmpl	%r12d, %eax
	setne	%cl
	addl	%ecx, %r14d
	incl	%ebx
	cmpl	$256, %ebx                      ## imm = 0x100
	jne	LBB0_13
## %bb.14:
	movq	%r15, %rdi
	callq	_frpw_disconnect
	movq	%r15, %rdi
	callq	_frpw_connect
	movq	%r15, %rdi
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rsi
	movl	$512, %edx                      ## imm = 0x200
	movl	$16, %ecx
	callq	_frpw_read_block_int
	movdqa	LCPI0_0(%rip), %xmm6            ## xmm6 = [2,3]
	movdqa	LCPI0_1(%rip), %xmm3            ## xmm3 = [0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0]
	pxor	%xmm10, %xmm10
	xorl	%eax, %eax
	movdqa	LCPI0_2(%rip), %xmm8            ## xmm8 = [4,4]
	pcmpeqd	%xmm11, %xmm11
	movdqa	LCPI0_3(%rip), %xmm9            ## xmm9 = [8,8]
	pxor	%xmm13, %xmm13
	pxor	%xmm12, %xmm12
	.p2align	4, 0x90
LBB0_15:                                ## =>This Inner Loop Header: Depth=1
	movdqa	%xmm3, %xmm1
	paddq	%xmm8, %xmm1
	movdqa	%xmm6, %xmm0
	paddq	%xmm8, %xmm0
	pmovsxbq	2(%rbx,%rax), %xmm2
	pmovsxbq	(%rbx,%rax), %xmm4
	pmovsxbq	6(%rbx,%rax), %xmm5
	pmovsxbq	4(%rbx,%rax), %xmm7
	pblendw	$204, %xmm10, %xmm4             ## xmm4 = xmm4[0,1],xmm10[2,3],xmm4[4,5],xmm10[6,7]
	pblendw	$204, %xmm10, %xmm2             ## xmm2 = xmm2[0,1],xmm10[2,3],xmm2[4,5],xmm10[6,7]
	pblendw	$204, %xmm10, %xmm7             ## xmm7 = xmm7[0,1],xmm10[2,3],xmm7[4,5],xmm10[6,7]
	pcmpeqq	%xmm1, %xmm7
	pblendw	$204, %xmm10, %xmm5             ## xmm5 = xmm5[0,1],xmm10[2,3],xmm5[4,5],xmm10[6,7]
	pcmpeqq	%xmm0, %xmm5
	pcmpeqq	%xmm6, %xmm2
	pxor	%xmm11, %xmm2
	pcmpeqq	%xmm3, %xmm4
	pxor	%xmm11, %xmm4
	packssdw	%xmm2, %xmm4
	psubd	%xmm4, %xmm13
	pxor	%xmm11, %xmm5
	pxor	%xmm11, %xmm7
	packssdw	%xmm5, %xmm7
	psubd	%xmm7, %xmm12
	addq	$8, %rax
	paddq	%xmm9, %xmm3
	paddq	%xmm9, %xmm6
	cmpq	$128, %rax
	jne	LBB0_15
## %bb.16:
	paddd	%xmm13, %xmm12
	pshufd	$238, %xmm12, %xmm0             ## xmm0 = xmm12[2,3,2,3]
	paddd	%xmm12, %xmm0
	pshufd	$85, %xmm0, %xmm1               ## xmm1 = xmm0[1,1,1,1]
	paddd	%xmm0, %xmm1
	movd	%xmm1, %ebx
	movq	%r15, %rdi
	callq	_frpw_disconnect
	cmpl	$0, -44(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_18
## %bb.17:
	movl	12(%r15), %esi
	movl	(%r15), %ecx
	movl	4(%r15), %edx
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	andl	$-2, %eax
	subl	%eax, %ecx
	movl	8(%r15), %r8d
	leaq	L_.str.2(%rip), %rdi
	movl	%r13d, %r9d
	xorl	%eax, %eax
	pushq	%rbx
	pushq	%r14
	callq	_printk
	addq	$16, %rsp
LBB0_18:
	movl	$1, %r12d
	testl	%ebx, %ebx
	jne	LBB0_20
## %bb.19:
	testl	%r13d, %r13d
	setne	%al
	testl	%r14d, %r14d
	setne	%cl
	andb	%al, %cl
	movzbl	%cl, %r12d
LBB0_20:
	movl	%r12d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"%s: frpw: Xilinx does not support mode %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"%s: frpw: ASIC does not support mode 2\n"

L_.str.2:                               ## @.str.2
	.asciz	"%s: frpw: port 0x%x, chip %ld, mode %d, test=(%d,%d,%d)\n"

	.no_dead_strip	_frpw_test_proto
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ; -- Begin function frpw_test_proto
lCPI0_0:
	.quad	0                               ; 0x0
	.quad	1                               ; 0x1
lCPI0_1:
	.quad	2                               ; 0x2
	.quad	3                               ; 0x3
lCPI0_2:
	.quad	4                               ; 0x4
	.quad	5                               ; 0x5
lCPI0_3:
	.quad	6                               ; 0x6
	.quad	7                               ; 0x7
lCPI0_4:
	.quad	8                               ; 0x8
	.quad	9                               ; 0x9
lCPI0_5:
	.quad	10                              ; 0xa
	.quad	11                              ; 0xb
lCPI0_6:
	.quad	12                              ; 0xc
	.quad	13                              ; 0xd
lCPI0_7:
	.quad	14                              ; 0xe
	.quad	15                              ; 0xf
lCPI0_8:
	.quad	16                              ; 0x10
	.quad	17                              ; 0x11
lCPI0_9:
	.quad	18                              ; 0x12
	.quad	19                              ; 0x13
lCPI0_10:
	.quad	20                              ; 0x14
	.quad	21                              ; 0x15
lCPI0_11:
	.quad	22                              ; 0x16
	.quad	23                              ; 0x17
lCPI0_12:
	.quad	24                              ; 0x18
	.quad	25                              ; 0x19
lCPI0_13:
	.quad	26                              ; 0x1a
	.quad	27                              ; 0x1b
lCPI0_14:
	.quad	28                              ; 0x1c
	.quad	29                              ; 0x1d
lCPI0_15:
	.quad	30                              ; 0x1e
	.quad	31                              ; 0x1f
lCPI0_16:
	.quad	36                              ; 0x24
	.quad	37                              ; 0x25
lCPI0_17:
	.quad	38                              ; 0x26
	.quad	39                              ; 0x27
lCPI0_18:
	.quad	32                              ; 0x20
	.quad	33                              ; 0x21
lCPI0_19:
	.quad	34                              ; 0x22
	.quad	35                              ; 0x23
lCPI0_20:
	.quad	44                              ; 0x2c
	.quad	45                              ; 0x2d
lCPI0_21:
	.quad	46                              ; 0x2e
	.quad	47                              ; 0x2f
lCPI0_22:
	.quad	40                              ; 0x28
	.quad	41                              ; 0x29
lCPI0_23:
	.quad	42                              ; 0x2a
	.quad	43                              ; 0x2b
lCPI0_24:
	.quad	48                              ; 0x30
	.quad	49                              ; 0x31
lCPI0_25:
	.quad	50                              ; 0x32
	.quad	51                              ; 0x33
lCPI0_26:
	.quad	52                              ; 0x34
	.quad	53                              ; 0x35
lCPI0_27:
	.quad	54                              ; 0x36
	.quad	55                              ; 0x37
lCPI0_28:
	.quad	56                              ; 0x38
	.quad	57                              ; 0x39
lCPI0_29:
	.quad	58                              ; 0x3a
	.quad	59                              ; 0x3b
lCPI0_30:
	.quad	60                              ; 0x3c
	.quad	61                              ; 0x3d
lCPI0_31:
	.quad	62                              ; 0x3e
	.quad	63                              ; 0x3f
lCPI0_32:
	.quad	68                              ; 0x44
	.quad	69                              ; 0x45
lCPI0_33:
	.quad	70                              ; 0x46
	.quad	71                              ; 0x47
lCPI0_34:
	.quad	64                              ; 0x40
	.quad	65                              ; 0x41
lCPI0_35:
	.quad	66                              ; 0x42
	.quad	67                              ; 0x43
lCPI0_36:
	.quad	76                              ; 0x4c
	.quad	77                              ; 0x4d
lCPI0_37:
	.quad	78                              ; 0x4e
	.quad	79                              ; 0x4f
lCPI0_38:
	.quad	72                              ; 0x48
	.quad	73                              ; 0x49
lCPI0_39:
	.quad	74                              ; 0x4a
	.quad	75                              ; 0x4b
lCPI0_40:
	.quad	80                              ; 0x50
	.quad	81                              ; 0x51
lCPI0_41:
	.quad	82                              ; 0x52
	.quad	83                              ; 0x53
lCPI0_42:
	.quad	84                              ; 0x54
	.quad	85                              ; 0x55
lCPI0_43:
	.quad	86                              ; 0x56
	.quad	87                              ; 0x57
lCPI0_44:
	.quad	88                              ; 0x58
	.quad	89                              ; 0x59
lCPI0_45:
	.quad	90                              ; 0x5a
	.quad	91                              ; 0x5b
lCPI0_46:
	.quad	92                              ; 0x5c
	.quad	93                              ; 0x5d
lCPI0_47:
	.quad	94                              ; 0x5e
	.quad	95                              ; 0x5f
lCPI0_48:
	.quad	100                             ; 0x64
	.quad	101                             ; 0x65
lCPI0_49:
	.quad	102                             ; 0x66
	.quad	103                             ; 0x67
lCPI0_50:
	.quad	96                              ; 0x60
	.quad	97                              ; 0x61
lCPI0_51:
	.quad	98                              ; 0x62
	.quad	99                              ; 0x63
lCPI0_52:
	.quad	108                             ; 0x6c
	.quad	109                             ; 0x6d
lCPI0_53:
	.quad	110                             ; 0x6e
	.quad	111                             ; 0x6f
lCPI0_54:
	.quad	104                             ; 0x68
	.quad	105                             ; 0x69
lCPI0_55:
	.quad	106                             ; 0x6a
	.quad	107                             ; 0x6b
lCPI0_56:
	.quad	112                             ; 0x70
	.quad	113                             ; 0x71
lCPI0_57:
	.quad	114                             ; 0x72
	.quad	115                             ; 0x73
lCPI0_58:
	.quad	116                             ; 0x74
	.quad	117                             ; 0x75
lCPI0_59:
	.quad	118                             ; 0x76
	.quad	119                             ; 0x77
lCPI0_60:
	.quad	120                             ; 0x78
	.quad	121                             ; 0x79
lCPI0_61:
	.quad	122                             ; 0x7a
	.quad	123                             ; 0x7b
lCPI0_62:
	.quad	124                             ; 0x7c
	.quad	125                             ; 0x7d
lCPI0_63:
	.quad	126                             ; 0x7e
	.quad	127                             ; 0x7f
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_frpw_test_proto:                       ; @frpw_test_proto
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	ldp	w8, w9, [x0]
	cmp	w9, w8, asr #1
	b.eq	LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_frpw_test_pnp
	ldr	w8, [x19, #4]
	add	w8, w0, w8, lsl #1
	str	w8, [x19]
LBB0_2:
	tbnz	w8, #0, LBB0_6
; %bb.3:
	ldr	w9, [x19, #8]
	cmp	w9, #3
	b.lt	LBB0_6
; %bb.4:
	cbz	w20, LBB0_18
; %bb.5:
	ldr	w1, [x19, #12]
	str	x9, [sp]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_10
LBB0_6:
	and	w8, w8, #0x80000001
	cmp	w8, #1
	b.ne	LBB0_11
; %bb.7:
	ldr	w8, [x19, #8]
	cmp	w8, #2
	b.ne	LBB0_11
; %bb.8:
	cbz	w20, LBB0_18
; %bb.9:
	ldr	w1, [x19, #12]
Lloh2:
	adrp	x0, l_.str.1@PAGE
Lloh3:
	add	x0, x0, l_.str.1@PAGEOFF
LBB0_10:
	bl	_printk
	b	LBB0_18
LBB0_11:
	mov	x0, x19
	bl	_frpw_connect
	mov	x0, x19
	mov	w1, #0
	mov	w2, #6
	mov	w3, #160
	bl	_frpw_write_regr
	mov	w23, #0
	mov	w24, #0
	mov	w25, #170
	mov	w26, #85
LBB0_12:                                ; =>This Inner Loop Header: Depth=1
	eor	w22, w24, w25
	mov	x0, x19
	mov	w1, #0
	mov	w2, #2
	mov	x3, x22
	bl	_frpw_write_regr
	eor	w3, w24, w26
	mov	x0, x19
	mov	w1, #0
	mov	w2, #3
	bl	_frpw_write_regr
	mov	x0, x19
	mov	w1, #0
	mov	w2, #2
	bl	_frpw_read_regr
	cmp	w0, w22
	cinc	w23, w23, ne
	add	w24, w24, #1
	cmp	w24, #256
	b.ne	LBB0_12
; %bb.13:
	mov	x0, x19
	mov	w1, #0
	mov	w2, #6
	mov	w3, #176
	bl	_frpw_write_regr
	mov	w24, #0
	mov	w25, #0
	mov	w26, #170
	mov	w27, #85
LBB0_14:                                ; =>This Inner Loop Header: Depth=1
	eor	w22, w25, w26
	mov	x0, x19
	mov	w1, #0
	mov	w2, #2
	mov	x3, x22
	bl	_frpw_write_regr
	eor	w3, w25, w27
	mov	x0, x19
	mov	w1, #0
	mov	w2, #3
	bl	_frpw_write_regr
	mov	x0, x19
	mov	w1, #0
	mov	w2, #2
	bl	_frpw_read_regr
	cmp	w0, w22
	cinc	w24, w24, ne
	add	w25, w25, #1
	cmp	w25, #256
	b.ne	LBB0_14
; %bb.15:
	mov	x0, x19
	bl	_frpw_disconnect
	mov	x0, x19
	bl	_frpw_connect
	mov	x0, x19
	mov	x1, x21
	mov	w2, #512
	mov	w3, #16
	bl	_frpw_read_block_int
	ldp	d0, d1, [x21]
	sshll.8h	v0, v0, #0
	sshll2.4s	v2, v0, #0
	sshll.4s	v0, v0, #0
	sshll.8h	v1, v1, #0
	sshll2.4s	v3, v1, #0
	sshll.4s	v1, v1, #0
	ushll.2d	v4, v0, #0
	ushll2.2d	v5, v0, #0
	ushll.2d	v0, v2, #0
	ushll2.2d	v2, v2, #0
	ushll.2d	v6, v1, #0
	ushll2.2d	v7, v1, #0
	ushll.2d	v16, v3, #0
	ushll2.2d	v3, v3, #0
Lloh4:
	adrp	x8, lCPI0_0@PAGE
Lloh5:
	ldr	q1, [x8, lCPI0_0@PAGEOFF]
Lloh6:
	adrp	x8, lCPI0_1@PAGE
Lloh7:
	ldr	q17, [x8, lCPI0_1@PAGEOFF]
Lloh8:
	adrp	x8, lCPI0_2@PAGE
Lloh9:
	ldr	q18, [x8, lCPI0_2@PAGEOFF]
Lloh10:
	adrp	x8, lCPI0_3@PAGE
Lloh11:
	ldr	q19, [x8, lCPI0_3@PAGEOFF]
Lloh12:
	adrp	x8, lCPI0_4@PAGE
Lloh13:
	ldr	q20, [x8, lCPI0_4@PAGEOFF]
Lloh14:
	adrp	x8, lCPI0_5@PAGE
Lloh15:
	ldr	q21, [x8, lCPI0_5@PAGEOFF]
	cmeq.2d	v2, v2, v19
	mvn.16b	v2, v2
Lloh16:
	adrp	x8, lCPI0_6@PAGE
Lloh17:
	ldr	q19, [x8, lCPI0_6@PAGEOFF]
	cmeq.2d	v0, v0, v18
	mvn.16b	v0, v0
Lloh18:
	adrp	x8, lCPI0_7@PAGE
Lloh19:
	ldr	q18, [x8, lCPI0_7@PAGEOFF]
	uzp1.4s	v0, v0, v2
	movi.4s	v22, #1
	and.16b	v0, v0, v22
	cmeq.2d	v2, v5, v17
	mvn.16b	v2, v2
	cmeq.2d	v1, v4, v1
	mvn.16b	v1, v1
	uzp1.4s	v1, v1, v2
	and.16b	v1, v1, v22
	cmeq.2d	v2, v3, v18
	mvn.16b	v2, v2
	cmeq.2d	v3, v16, v19
	mvn.16b	v3, v3
	uzp1.4s	v2, v3, v2
	and.16b	v2, v2, v22
	cmeq.2d	v3, v7, v21
	mvn.16b	v3, v3
	cmeq.2d	v4, v6, v20
	mvn.16b	v4, v4
	uzp1.4s	v3, v4, v3
	and.16b	v3, v3, v22
	ldp	d4, d5, [x21, #16]
	sshll.8h	v4, v4, #0
	sshll2.4s	v6, v4, #0
	sshll.4s	v4, v4, #0
	sshll.8h	v5, v5, #0
	sshll2.4s	v7, v5, #0
	sshll.4s	v5, v5, #0
	ushll.2d	v16, v4, #0
	ushll2.2d	v4, v4, #0
	ushll.2d	v17, v6, #0
	ushll2.2d	v6, v6, #0
	ushll.2d	v18, v5, #0
	ushll2.2d	v5, v5, #0
	ushll.2d	v19, v7, #0
	ushll2.2d	v7, v7, #0
Lloh20:
	adrp	x8, lCPI0_8@PAGE
Lloh21:
	ldr	q20, [x8, lCPI0_8@PAGEOFF]
Lloh22:
	adrp	x8, lCPI0_9@PAGE
Lloh23:
	ldr	q21, [x8, lCPI0_9@PAGEOFF]
Lloh24:
	adrp	x8, lCPI0_10@PAGE
Lloh25:
	ldr	q22, [x8, lCPI0_10@PAGEOFF]
Lloh26:
	adrp	x8, lCPI0_11@PAGE
Lloh27:
	ldr	q23, [x8, lCPI0_11@PAGEOFF]
Lloh28:
	adrp	x8, lCPI0_12@PAGE
Lloh29:
	ldr	q24, [x8, lCPI0_12@PAGEOFF]
Lloh30:
	adrp	x8, lCPI0_13@PAGE
Lloh31:
	ldr	q25, [x8, lCPI0_13@PAGEOFF]
Lloh32:
	adrp	x8, lCPI0_14@PAGE
Lloh33:
	ldr	q26, [x8, lCPI0_14@PAGEOFF]
Lloh34:
	adrp	x8, lCPI0_15@PAGE
Lloh35:
	ldr	q27, [x8, lCPI0_15@PAGEOFF]
	cmeq.2d	v6, v6, v23
	mvn.16b	v6, v6
	cmeq.2d	v17, v17, v22
	mvn.16b	v17, v17
	uzp1.4s	v6, v17, v6
	cmeq.2d	v4, v4, v21
	mvn.16b	v4, v4
	cmeq.2d	v16, v16, v20
	mvn.16b	v16, v16
	uzp1.4s	v4, v16, v4
	cmeq.2d	v7, v7, v27
	mvn.16b	v7, v7
	cmeq.2d	v16, v19, v26
	mvn.16b	v16, v16
	uzp1.4s	v7, v16, v7
	cmeq.2d	v5, v5, v25
	mvn.16b	v5, v5
	cmeq.2d	v16, v18, v24
	mvn.16b	v16, v16
	uzp1.4s	v5, v16, v5
	sub.4s	v1, v1, v4
	sub.4s	v0, v0, v6
	sub.4s	v3, v3, v5
	sub.4s	v2, v2, v7
	ldp	d4, d5, [x21, #32]
	sshll.8h	v4, v4, #0
	sshll.4s	v6, v4, #0
	sshll2.4s	v4, v4, #0
	sshll.8h	v5, v5, #0
	sshll.4s	v7, v5, #0
	sshll2.4s	v5, v5, #0
	ushll.2d	v16, v4, #0
	ushll2.2d	v4, v4, #0
	ushll.2d	v17, v6, #0
	ushll2.2d	v6, v6, #0
	ushll.2d	v18, v5, #0
	ushll2.2d	v5, v5, #0
	ushll.2d	v19, v7, #0
	ushll2.2d	v7, v7, #0
Lloh36:
	adrp	x8, lCPI0_16@PAGE
Lloh37:
	ldr	q20, [x8, lCPI0_16@PAGEOFF]
Lloh38:
	adrp	x8, lCPI0_17@PAGE
Lloh39:
	ldr	q21, [x8, lCPI0_17@PAGEOFF]
Lloh40:
	adrp	x8, lCPI0_18@PAGE
Lloh41:
	ldr	q22, [x8, lCPI0_18@PAGEOFF]
Lloh42:
	adrp	x8, lCPI0_19@PAGE
Lloh43:
	ldr	q23, [x8, lCPI0_19@PAGEOFF]
Lloh44:
	adrp	x8, lCPI0_20@PAGE
Lloh45:
	ldr	q24, [x8, lCPI0_20@PAGEOFF]
Lloh46:
	adrp	x8, lCPI0_21@PAGE
Lloh47:
	ldr	q25, [x8, lCPI0_21@PAGEOFF]
Lloh48:
	adrp	x8, lCPI0_22@PAGE
Lloh49:
	ldr	q26, [x8, lCPI0_22@PAGEOFF]
Lloh50:
	adrp	x8, lCPI0_23@PAGE
Lloh51:
	ldr	q27, [x8, lCPI0_23@PAGEOFF]
	cmeq.2d	v6, v6, v23
	mvn.16b	v6, v6
	cmeq.2d	v17, v17, v22
	mvn.16b	v17, v17
	uzp1.4s	v6, v17, v6
	cmeq.2d	v4, v4, v21
	mvn.16b	v4, v4
	cmeq.2d	v16, v16, v20
	mvn.16b	v16, v16
	uzp1.4s	v4, v16, v4
	cmeq.2d	v7, v7, v27
	mvn.16b	v7, v7
	cmeq.2d	v16, v19, v26
	mvn.16b	v16, v16
	uzp1.4s	v7, v16, v7
	cmeq.2d	v5, v5, v25
	mvn.16b	v5, v5
	cmeq.2d	v16, v18, v24
	mvn.16b	v16, v16
	uzp1.4s	v5, v16, v5
	sub.4s	v0, v0, v4
	sub.4s	v1, v1, v6
	sub.4s	v2, v2, v5
	sub.4s	v3, v3, v7
	ldp	d4, d5, [x21, #48]
	sshll.8h	v4, v4, #0
	sshll2.4s	v6, v4, #0
	sshll.4s	v4, v4, #0
	sshll.8h	v5, v5, #0
	sshll2.4s	v7, v5, #0
	sshll.4s	v5, v5, #0
	ushll.2d	v16, v4, #0
	ushll2.2d	v4, v4, #0
	ushll.2d	v17, v6, #0
	ushll2.2d	v6, v6, #0
	ushll.2d	v18, v5, #0
	ushll2.2d	v5, v5, #0
	ushll.2d	v19, v7, #0
	ushll2.2d	v7, v7, #0
Lloh52:
	adrp	x8, lCPI0_24@PAGE
Lloh53:
	ldr	q20, [x8, lCPI0_24@PAGEOFF]
Lloh54:
	adrp	x8, lCPI0_25@PAGE
Lloh55:
	ldr	q21, [x8, lCPI0_25@PAGEOFF]
Lloh56:
	adrp	x8, lCPI0_26@PAGE
Lloh57:
	ldr	q22, [x8, lCPI0_26@PAGEOFF]
Lloh58:
	adrp	x8, lCPI0_27@PAGE
Lloh59:
	ldr	q23, [x8, lCPI0_27@PAGEOFF]
Lloh60:
	adrp	x8, lCPI0_28@PAGE
Lloh61:
	ldr	q24, [x8, lCPI0_28@PAGEOFF]
Lloh62:
	adrp	x8, lCPI0_29@PAGE
Lloh63:
	ldr	q25, [x8, lCPI0_29@PAGEOFF]
Lloh64:
	adrp	x8, lCPI0_30@PAGE
Lloh65:
	ldr	q26, [x8, lCPI0_30@PAGEOFF]
Lloh66:
	adrp	x8, lCPI0_31@PAGE
Lloh67:
	ldr	q27, [x8, lCPI0_31@PAGEOFF]
	cmeq.2d	v6, v6, v23
	mvn.16b	v6, v6
	cmeq.2d	v17, v17, v22
	mvn.16b	v17, v17
	uzp1.4s	v6, v17, v6
	cmeq.2d	v4, v4, v21
	mvn.16b	v4, v4
	cmeq.2d	v16, v16, v20
	mvn.16b	v16, v16
	uzp1.4s	v4, v16, v4
	cmeq.2d	v7, v7, v27
	mvn.16b	v7, v7
	cmeq.2d	v16, v19, v26
	mvn.16b	v16, v16
	uzp1.4s	v7, v16, v7
	cmeq.2d	v5, v5, v25
	mvn.16b	v5, v5
	cmeq.2d	v16, v18, v24
	mvn.16b	v16, v16
	uzp1.4s	v5, v16, v5
	sub.4s	v1, v1, v4
	sub.4s	v0, v0, v6
	sub.4s	v3, v3, v5
	sub.4s	v2, v2, v7
	ldp	d4, d5, [x21, #64]
	sshll.8h	v4, v4, #0
	sshll.4s	v6, v4, #0
	sshll2.4s	v4, v4, #0
	sshll.8h	v5, v5, #0
	sshll.4s	v7, v5, #0
	sshll2.4s	v5, v5, #0
	ushll.2d	v16, v4, #0
	ushll2.2d	v4, v4, #0
	ushll.2d	v17, v6, #0
	ushll2.2d	v6, v6, #0
	ushll.2d	v18, v5, #0
	ushll2.2d	v5, v5, #0
	ushll.2d	v19, v7, #0
	ushll2.2d	v7, v7, #0
Lloh68:
	adrp	x8, lCPI0_32@PAGE
Lloh69:
	ldr	q20, [x8, lCPI0_32@PAGEOFF]
Lloh70:
	adrp	x8, lCPI0_33@PAGE
Lloh71:
	ldr	q21, [x8, lCPI0_33@PAGEOFF]
Lloh72:
	adrp	x8, lCPI0_34@PAGE
Lloh73:
	ldr	q22, [x8, lCPI0_34@PAGEOFF]
Lloh74:
	adrp	x8, lCPI0_35@PAGE
Lloh75:
	ldr	q23, [x8, lCPI0_35@PAGEOFF]
Lloh76:
	adrp	x8, lCPI0_36@PAGE
Lloh77:
	ldr	q24, [x8, lCPI0_36@PAGEOFF]
Lloh78:
	adrp	x8, lCPI0_37@PAGE
Lloh79:
	ldr	q25, [x8, lCPI0_37@PAGEOFF]
Lloh80:
	adrp	x8, lCPI0_38@PAGE
Lloh81:
	ldr	q26, [x8, lCPI0_38@PAGEOFF]
Lloh82:
	adrp	x8, lCPI0_39@PAGE
Lloh83:
	ldr	q27, [x8, lCPI0_39@PAGEOFF]
	cmeq.2d	v6, v6, v23
	mvn.16b	v6, v6
	cmeq.2d	v17, v17, v22
	mvn.16b	v17, v17
	uzp1.4s	v6, v17, v6
	cmeq.2d	v4, v4, v21
	mvn.16b	v4, v4
	cmeq.2d	v16, v16, v20
	mvn.16b	v16, v16
	uzp1.4s	v4, v16, v4
	cmeq.2d	v7, v7, v27
	mvn.16b	v7, v7
	cmeq.2d	v16, v19, v26
	mvn.16b	v16, v16
	uzp1.4s	v7, v16, v7
	cmeq.2d	v5, v5, v25
	mvn.16b	v5, v5
	cmeq.2d	v16, v18, v24
	mvn.16b	v16, v16
	uzp1.4s	v5, v16, v5
	sub.4s	v0, v0, v4
	sub.4s	v1, v1, v6
	sub.4s	v2, v2, v5
	sub.4s	v3, v3, v7
	ldp	d4, d5, [x21, #80]
	sshll.8h	v4, v4, #0
	sshll2.4s	v6, v4, #0
	sshll.4s	v4, v4, #0
	sshll.8h	v5, v5, #0
	sshll2.4s	v7, v5, #0
	sshll.4s	v5, v5, #0
	ushll.2d	v16, v4, #0
	ushll2.2d	v4, v4, #0
	ushll.2d	v17, v6, #0
	ushll2.2d	v6, v6, #0
	ushll.2d	v18, v5, #0
	ushll2.2d	v5, v5, #0
	ushll.2d	v19, v7, #0
	ushll2.2d	v7, v7, #0
Lloh84:
	adrp	x8, lCPI0_40@PAGE
Lloh85:
	ldr	q20, [x8, lCPI0_40@PAGEOFF]
Lloh86:
	adrp	x8, lCPI0_41@PAGE
Lloh87:
	ldr	q21, [x8, lCPI0_41@PAGEOFF]
Lloh88:
	adrp	x8, lCPI0_42@PAGE
Lloh89:
	ldr	q22, [x8, lCPI0_42@PAGEOFF]
Lloh90:
	adrp	x8, lCPI0_43@PAGE
Lloh91:
	ldr	q23, [x8, lCPI0_43@PAGEOFF]
Lloh92:
	adrp	x8, lCPI0_44@PAGE
Lloh93:
	ldr	q24, [x8, lCPI0_44@PAGEOFF]
Lloh94:
	adrp	x8, lCPI0_45@PAGE
Lloh95:
	ldr	q25, [x8, lCPI0_45@PAGEOFF]
Lloh96:
	adrp	x8, lCPI0_46@PAGE
Lloh97:
	ldr	q26, [x8, lCPI0_46@PAGEOFF]
Lloh98:
	adrp	x8, lCPI0_47@PAGE
Lloh99:
	ldr	q27, [x8, lCPI0_47@PAGEOFF]
	cmeq.2d	v6, v6, v23
	mvn.16b	v6, v6
	cmeq.2d	v17, v17, v22
	mvn.16b	v17, v17
	uzp1.4s	v6, v17, v6
	cmeq.2d	v4, v4, v21
	mvn.16b	v4, v4
	cmeq.2d	v16, v16, v20
	mvn.16b	v16, v16
	uzp1.4s	v4, v16, v4
	cmeq.2d	v7, v7, v27
	mvn.16b	v7, v7
	cmeq.2d	v16, v19, v26
	mvn.16b	v16, v16
	uzp1.4s	v7, v16, v7
	cmeq.2d	v5, v5, v25
	mvn.16b	v5, v5
	cmeq.2d	v16, v18, v24
	mvn.16b	v16, v16
	uzp1.4s	v5, v16, v5
	sub.4s	v1, v1, v4
	sub.4s	v0, v0, v6
	sub.4s	v3, v3, v5
	sub.4s	v2, v2, v7
	ldp	d4, d5, [x21, #96]
	sshll.8h	v4, v4, #0
	sshll.4s	v6, v4, #0
	sshll2.4s	v4, v4, #0
	sshll.8h	v5, v5, #0
	sshll.4s	v7, v5, #0
	sshll2.4s	v5, v5, #0
	ushll.2d	v16, v4, #0
	ushll2.2d	v4, v4, #0
	ushll.2d	v17, v6, #0
	ushll2.2d	v6, v6, #0
	ushll.2d	v18, v5, #0
	ushll2.2d	v5, v5, #0
	ushll.2d	v19, v7, #0
	ushll2.2d	v7, v7, #0
Lloh100:
	adrp	x8, lCPI0_48@PAGE
Lloh101:
	ldr	q20, [x8, lCPI0_48@PAGEOFF]
Lloh102:
	adrp	x8, lCPI0_49@PAGE
Lloh103:
	ldr	q21, [x8, lCPI0_49@PAGEOFF]
Lloh104:
	adrp	x8, lCPI0_50@PAGE
Lloh105:
	ldr	q22, [x8, lCPI0_50@PAGEOFF]
Lloh106:
	adrp	x8, lCPI0_51@PAGE
Lloh107:
	ldr	q23, [x8, lCPI0_51@PAGEOFF]
Lloh108:
	adrp	x8, lCPI0_52@PAGE
Lloh109:
	ldr	q24, [x8, lCPI0_52@PAGEOFF]
Lloh110:
	adrp	x8, lCPI0_53@PAGE
Lloh111:
	ldr	q25, [x8, lCPI0_53@PAGEOFF]
Lloh112:
	adrp	x8, lCPI0_54@PAGE
Lloh113:
	ldr	q26, [x8, lCPI0_54@PAGEOFF]
Lloh114:
	adrp	x8, lCPI0_55@PAGE
Lloh115:
	ldr	q27, [x8, lCPI0_55@PAGEOFF]
	cmeq.2d	v6, v6, v23
	mvn.16b	v6, v6
	cmeq.2d	v17, v17, v22
	mvn.16b	v17, v17
	uzp1.4s	v6, v17, v6
	cmeq.2d	v4, v4, v21
	mvn.16b	v4, v4
	cmeq.2d	v16, v16, v20
	mvn.16b	v16, v16
	uzp1.4s	v4, v16, v4
	cmeq.2d	v7, v7, v27
	mvn.16b	v7, v7
	cmeq.2d	v16, v19, v26
	mvn.16b	v16, v16
	uzp1.4s	v7, v16, v7
	cmeq.2d	v5, v5, v25
	mvn.16b	v5, v5
	cmeq.2d	v16, v18, v24
	mvn.16b	v16, v16
	uzp1.4s	v5, v16, v5
	sub.4s	v0, v0, v4
	sub.4s	v1, v1, v6
	sub.4s	v2, v2, v5
	sub.4s	v3, v3, v7
	ldp	d4, d5, [x21, #112]
	sshll.8h	v4, v4, #0
	sshll2.4s	v6, v4, #0
	sshll.4s	v4, v4, #0
	sshll.8h	v5, v5, #0
	sshll2.4s	v7, v5, #0
	sshll.4s	v5, v5, #0
	ushll.2d	v16, v4, #0
	ushll2.2d	v4, v4, #0
	ushll.2d	v17, v6, #0
	ushll2.2d	v6, v6, #0
	ushll.2d	v18, v5, #0
	ushll2.2d	v5, v5, #0
	ushll.2d	v19, v7, #0
	ushll2.2d	v7, v7, #0
Lloh116:
	adrp	x8, lCPI0_56@PAGE
Lloh117:
	ldr	q20, [x8, lCPI0_56@PAGEOFF]
Lloh118:
	adrp	x8, lCPI0_57@PAGE
Lloh119:
	ldr	q21, [x8, lCPI0_57@PAGEOFF]
Lloh120:
	adrp	x8, lCPI0_58@PAGE
Lloh121:
	ldr	q22, [x8, lCPI0_58@PAGEOFF]
Lloh122:
	adrp	x8, lCPI0_59@PAGE
Lloh123:
	ldr	q23, [x8, lCPI0_59@PAGEOFF]
Lloh124:
	adrp	x8, lCPI0_60@PAGE
Lloh125:
	ldr	q24, [x8, lCPI0_60@PAGEOFF]
Lloh126:
	adrp	x8, lCPI0_61@PAGE
Lloh127:
	ldr	q25, [x8, lCPI0_61@PAGEOFF]
Lloh128:
	adrp	x8, lCPI0_62@PAGE
Lloh129:
	ldr	q26, [x8, lCPI0_62@PAGEOFF]
Lloh130:
	adrp	x8, lCPI0_63@PAGE
Lloh131:
	ldr	q27, [x8, lCPI0_63@PAGEOFF]
	cmeq.2d	v6, v6, v23
	mvn.16b	v6, v6
	cmeq.2d	v17, v17, v22
	mvn.16b	v17, v17
	uzp1.4s	v6, v17, v6
	cmeq.2d	v4, v4, v21
	mvn.16b	v4, v4
	cmeq.2d	v16, v16, v20
	mvn.16b	v16, v16
	uzp1.4s	v4, v16, v4
	cmeq.2d	v7, v7, v27
	mvn.16b	v7, v7
	cmeq.2d	v16, v19, v26
	mvn.16b	v16, v16
	uzp1.4s	v7, v16, v7
	cmeq.2d	v5, v5, v25
	mvn.16b	v5, v5
	cmeq.2d	v16, v18, v24
	mvn.16b	v16, v16
	uzp1.4s	v5, v16, v5
	sub.4s	v1, v1, v4
	sub.4s	v0, v0, v6
	sub.4s	v3, v3, v5
	sub.4s	v2, v2, v7
	add.4s	v0, v2, v0
	add.4s	v1, v3, v1
	add.4s	v0, v1, v0
	addv.4s	s0, v0
	fmov	w21, s0
	mov	x0, x19
	bl	_frpw_disconnect
	cbz	w20, LBB0_17
; %bb.16:
	ldp	w8, w9, [x19]
	and	w10, w8, #0x1
	cmp	w8, #0
	cneg	w8, w10, lt
	ldp	w10, w1, [x19, #8]
	stp	x24, x21, [sp, #32]
	stp	x10, x23, [sp, #16]
	stp	x9, x8, [sp]
Lloh132:
	adrp	x0, l_.str.2@PAGE
Lloh133:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_printk
LBB0_17:
	cbz	w21, LBB0_19
LBB0_18:
	mov	w0, #1
	b	LBB0_20
LBB0_19:
	cmp	w23, #0
	ccmp	w24, #0, #4, ne
	cset	w0, ne
LBB0_20:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdr	Lloh130, Lloh131
	.loh AdrpAdrp	Lloh128, Lloh130
	.loh AdrpLdr	Lloh128, Lloh129
	.loh AdrpAdrp	Lloh126, Lloh128
	.loh AdrpLdr	Lloh126, Lloh127
	.loh AdrpAdrp	Lloh124, Lloh126
	.loh AdrpLdr	Lloh124, Lloh125
	.loh AdrpAdrp	Lloh122, Lloh124
	.loh AdrpLdr	Lloh122, Lloh123
	.loh AdrpAdrp	Lloh120, Lloh122
	.loh AdrpLdr	Lloh120, Lloh121
	.loh AdrpAdrp	Lloh118, Lloh120
	.loh AdrpLdr	Lloh118, Lloh119
	.loh AdrpAdrp	Lloh116, Lloh118
	.loh AdrpLdr	Lloh116, Lloh117
	.loh AdrpAdrp	Lloh114, Lloh116
	.loh AdrpLdr	Lloh114, Lloh115
	.loh AdrpAdrp	Lloh112, Lloh114
	.loh AdrpLdr	Lloh112, Lloh113
	.loh AdrpAdrp	Lloh110, Lloh112
	.loh AdrpLdr	Lloh110, Lloh111
	.loh AdrpAdrp	Lloh108, Lloh110
	.loh AdrpLdr	Lloh108, Lloh109
	.loh AdrpAdrp	Lloh106, Lloh108
	.loh AdrpLdr	Lloh106, Lloh107
	.loh AdrpAdrp	Lloh104, Lloh106
	.loh AdrpLdr	Lloh104, Lloh105
	.loh AdrpAdrp	Lloh102, Lloh104
	.loh AdrpLdr	Lloh102, Lloh103
	.loh AdrpAdrp	Lloh100, Lloh102
	.loh AdrpLdr	Lloh100, Lloh101
	.loh AdrpAdrp	Lloh98, Lloh100
	.loh AdrpLdr	Lloh98, Lloh99
	.loh AdrpAdrp	Lloh96, Lloh98
	.loh AdrpLdr	Lloh96, Lloh97
	.loh AdrpAdrp	Lloh94, Lloh96
	.loh AdrpLdr	Lloh94, Lloh95
	.loh AdrpAdrp	Lloh92, Lloh94
	.loh AdrpLdr	Lloh92, Lloh93
	.loh AdrpAdrp	Lloh90, Lloh92
	.loh AdrpLdr	Lloh90, Lloh91
	.loh AdrpAdrp	Lloh88, Lloh90
	.loh AdrpLdr	Lloh88, Lloh89
	.loh AdrpAdrp	Lloh86, Lloh88
	.loh AdrpLdr	Lloh86, Lloh87
	.loh AdrpAdrp	Lloh84, Lloh86
	.loh AdrpLdr	Lloh84, Lloh85
	.loh AdrpAdrp	Lloh82, Lloh84
	.loh AdrpLdr	Lloh82, Lloh83
	.loh AdrpAdrp	Lloh80, Lloh82
	.loh AdrpLdr	Lloh80, Lloh81
	.loh AdrpAdrp	Lloh78, Lloh80
	.loh AdrpLdr	Lloh78, Lloh79
	.loh AdrpAdrp	Lloh76, Lloh78
	.loh AdrpLdr	Lloh76, Lloh77
	.loh AdrpAdrp	Lloh74, Lloh76
	.loh AdrpLdr	Lloh74, Lloh75
	.loh AdrpAdrp	Lloh72, Lloh74
	.loh AdrpLdr	Lloh72, Lloh73
	.loh AdrpAdrp	Lloh70, Lloh72
	.loh AdrpLdr	Lloh70, Lloh71
	.loh AdrpAdrp	Lloh68, Lloh70
	.loh AdrpLdr	Lloh68, Lloh69
	.loh AdrpAdrp	Lloh66, Lloh68
	.loh AdrpLdr	Lloh66, Lloh67
	.loh AdrpAdrp	Lloh64, Lloh66
	.loh AdrpLdr	Lloh64, Lloh65
	.loh AdrpAdrp	Lloh62, Lloh64
	.loh AdrpLdr	Lloh62, Lloh63
	.loh AdrpAdrp	Lloh60, Lloh62
	.loh AdrpLdr	Lloh60, Lloh61
	.loh AdrpAdrp	Lloh58, Lloh60
	.loh AdrpLdr	Lloh58, Lloh59
	.loh AdrpAdrp	Lloh56, Lloh58
	.loh AdrpLdr	Lloh56, Lloh57
	.loh AdrpAdrp	Lloh54, Lloh56
	.loh AdrpLdr	Lloh54, Lloh55
	.loh AdrpAdrp	Lloh52, Lloh54
	.loh AdrpLdr	Lloh52, Lloh53
	.loh AdrpAdrp	Lloh50, Lloh52
	.loh AdrpLdr	Lloh50, Lloh51
	.loh AdrpAdrp	Lloh48, Lloh50
	.loh AdrpLdr	Lloh48, Lloh49
	.loh AdrpAdrp	Lloh46, Lloh48
	.loh AdrpLdr	Lloh46, Lloh47
	.loh AdrpAdrp	Lloh44, Lloh46
	.loh AdrpLdr	Lloh44, Lloh45
	.loh AdrpAdrp	Lloh42, Lloh44
	.loh AdrpLdr	Lloh42, Lloh43
	.loh AdrpAdrp	Lloh40, Lloh42
	.loh AdrpLdr	Lloh40, Lloh41
	.loh AdrpAdrp	Lloh38, Lloh40
	.loh AdrpLdr	Lloh38, Lloh39
	.loh AdrpAdrp	Lloh36, Lloh38
	.loh AdrpLdr	Lloh36, Lloh37
	.loh AdrpAdrp	Lloh34, Lloh36
	.loh AdrpLdr	Lloh34, Lloh35
	.loh AdrpAdrp	Lloh32, Lloh34
	.loh AdrpLdr	Lloh32, Lloh33
	.loh AdrpAdrp	Lloh30, Lloh32
	.loh AdrpLdr	Lloh30, Lloh31
	.loh AdrpAdrp	Lloh28, Lloh30
	.loh AdrpLdr	Lloh28, Lloh29
	.loh AdrpAdrp	Lloh26, Lloh28
	.loh AdrpLdr	Lloh26, Lloh27
	.loh AdrpAdrp	Lloh24, Lloh26
	.loh AdrpLdr	Lloh24, Lloh25
	.loh AdrpAdrp	Lloh22, Lloh24
	.loh AdrpLdr	Lloh22, Lloh23
	.loh AdrpAdrp	Lloh20, Lloh22
	.loh AdrpLdr	Lloh20, Lloh21
	.loh AdrpAdrp	Lloh18, Lloh20
	.loh AdrpLdr	Lloh18, Lloh19
	.loh AdrpAdrp	Lloh16, Lloh18
	.loh AdrpLdr	Lloh16, Lloh17
	.loh AdrpAdrp	Lloh14, Lloh16
	.loh AdrpLdr	Lloh14, Lloh15
	.loh AdrpAdrp	Lloh12, Lloh14
	.loh AdrpLdr	Lloh12, Lloh13
	.loh AdrpAdrp	Lloh10, Lloh12
	.loh AdrpLdr	Lloh10, Lloh11
	.loh AdrpAdrp	Lloh8, Lloh10
	.loh AdrpLdr	Lloh8, Lloh9
	.loh AdrpAdrp	Lloh6, Lloh8
	.loh AdrpLdr	Lloh6, Lloh7
	.loh AdrpAdrp	Lloh4, Lloh6
	.loh AdrpLdr	Lloh4, Lloh5
	.loh AdrpAdd	Lloh132, Lloh133
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"%s: frpw: Xilinx does not support mode %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"%s: frpw: ASIC does not support mode 2\n"

l_.str.2:                               ; @.str.2
	.asciz	"%s: frpw: port 0x%x, chip %ld, mode %d, test=(%d,%d,%d)\n"

	.no_dead_strip	_frpw_test_proto
.subsections_via_symbols
