	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function FREQ_TO_REG
_FREQ_TO_REG:                           ## @FREQ_TO_REG
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	4(%rdi), %r8d
	movl	(%rdi), %eax
	addl	%r8d, %eax
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	xorl	%eax, %eax
	cmpl	%esi, %edx
	jge	LBB0_7
## %bb.1:
	movl	8(%rdi), %r9d
	addl	%r9d, %r8d
	movl	%r8d, %ecx
	shrl	$31, %ecx
	addl	%r8d, %ecx
	sarl	%ecx
	movl	$1, %eax
	cmpl	%esi, %ecx
	jge	LBB0_7
## %bb.2:
	movl	12(%rdi), %r8d
	addl	%r8d, %r9d
	movl	%r9d, %edx
	shrl	$31, %edx
	addl	%r9d, %edx
	sarl	%edx
	movl	$2, %eax
	cmpl	%esi, %edx
	jge	LBB0_7
## %bb.3:
	movl	16(%rdi), %r9d
	addl	%r9d, %r8d
	movl	%r8d, %ecx
	shrl	$31, %ecx
	addl	%r8d, %ecx
	sarl	%ecx
	movl	$3, %eax
	cmpl	%esi, %ecx
	jge	LBB0_7
## %bb.4:
	movl	20(%rdi), %r8d
	addl	%r8d, %r9d
	movl	%r9d, %edx
	shrl	$31, %edx
	addl	%r9d, %edx
	sarl	%edx
	movl	$4, %eax
	cmpl	%esi, %edx
	jge	LBB0_7
## %bb.5:
	movl	24(%rdi), %edx
	addl	%edx, %r8d
	movl	%r8d, %ecx
	shrl	$31, %ecx
	addl	%r8d, %ecx
	sarl	%ecx
	movl	$5, %eax
	cmpl	%esi, %ecx
	jge	LBB0_7
## %bb.6:
	addl	28(%rdi), %edx
	movl	%edx, %ecx
	shrl	$31, %ecx
	addl	%edx, %ecx
	sarl	%ecx
	xorl	%eax, %eax
	cmpl	%esi, %ecx
	setl	%al
	orl	$6, %eax
LBB0_7:
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_FREQ_TO_REG
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function FREQ_TO_REG
_FREQ_TO_REG:                           ; @FREQ_TO_REG
	.cfi_startproc
; %bb.0:
	ldp	w9, w8, [x0]
	add	w9, w8, w9
	cmp	w9, #0
	cinc	w9, w9, lt
	cmp	w1, w9, asr #1
	b.le	LBB0_7
; %bb.1:
	ldr	w9, [x0, #8]
	add	w8, w9, w8
	cmp	w8, #0
	cinc	w8, w8, lt
	cmp	w1, w8, asr #1
	b.le	LBB0_8
; %bb.2:
	ldr	w8, [x0, #12]
	add	w9, w8, w9
	cmp	w9, #0
	cinc	w9, w9, lt
	cmp	w1, w9, asr #1
	b.le	LBB0_9
; %bb.3:
	ldr	w9, [x0, #16]
	add	w8, w9, w8
	cmp	w8, #0
	cinc	w8, w8, lt
	cmp	w1, w8, asr #1
	b.le	LBB0_10
; %bb.4:
	ldr	w8, [x0, #20]
	add	w9, w8, w9
	cmp	w9, #0
	cinc	w9, w9, lt
	cmp	w1, w9, asr #1
	b.le	LBB0_11
; %bb.5:
	ldr	w9, [x0, #24]
	add	w8, w9, w8
	cmp	w8, #0
	cinc	w8, w8, lt
	cmp	w1, w8, asr #1
	b.le	LBB0_12
; %bb.6:
	ldr	w8, [x0, #28]
	add	w8, w8, w9
	cmp	w8, #0
	cinc	w8, w8, lt
	cmp	w1, w8, asr #1
	mov	w8, #6
	cinc	w0, w8, gt
	ret
LBB0_7:
	mov	w0, #0
	ret
LBB0_8:
	mov	w0, #1
	ret
LBB0_9:
	mov	w0, #2
	ret
LBB0_10:
	mov	w0, #3
	ret
LBB0_11:
	mov	w0, #4
	ret
LBB0_12:
	mov	w0, #5
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_FREQ_TO_REG
.subsections_via_symbols
