	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ael2020_setup_twinax_edc
_ael2020_setup_twinax_edc:              ## @ael2020_setup_twinax_edc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	leaq	_ael2020_setup_twinax_edc.uCclock40MHz(%rip), %rsi
	callq	_set_phy_regs
	movl	%eax, %ebx
	movl	$500, %edi                      ## imm = 0x1F4
	callq	_msleep
	testl	%ebx, %ebx
	jne	LBB0_10
## %bb.1:
	leaq	_ael2020_setup_twinax_edc.uCclockActivate(%rip), %rsi
	movq	%r14, %rdi
	callq	_set_phy_regs
	movl	%eax, %ebx
	movl	$500, %edi                      ## imm = 0x1F4
	callq	_msleep
	testl	%ebx, %ebx
	jne	LBB0_10
## %bb.2:
	movq	(%r14), %rax
	movq	_edc_twinax@GOTPCREL(%rip), %r15
	cmpq	(%r15), %rax
	je	LBB0_4
## %bb.3:
	movq	_EDC_TWX_AEL2020@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_EDC_TWX_AEL2020_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_t3_get_edc_fw
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
LBB0_4:
	movq	_EDC_TWX_AEL2020_SIZE@GOTPCREL(%rip), %r12
	cmpl	$4, (%r12)
	jb	LBB0_8
## %bb.5:
	movl	$2, %ebx
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r14), %rax
	movl	-8(%rax,%rbx,4), %edx
	movl	-4(%rax,%rbx,4), %ecx
	movq	%r14, %rdi
	movl	$128, %esi
	callq	_t3_mdio_write
	movslq	(%r12), %rcx
	shrq	$2, %rcx
	cmpq	%rbx, %rcx
	jbe	LBB0_8
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=1
	addq	$2, %rbx
	testl	%eax, %eax
	je	LBB0_6
LBB0_8:
	leaq	_ael2020_setup_twinax_edc.uCactivate(%rip), %rsi
	movq	%r14, %rdi
	callq	_set_phy_regs
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
## %bb.9:
	movq	(%r15), %rax
	movq	%rax, (%r14)
	xorl	%ebx, %ebx
LBB0_10:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	4                               ## @ael2020_setup_twinax_edc.uCclock40MHz
_ael2020_setup_twinax_edc.uCclock40MHz:
	.long	128                             ## 0x80
	.long	65320                           ## 0xff28
	.long	65535                           ## 0xffff
	.long	16385                           ## 0x4001
	.long	128                             ## 0x80
	.long	65322                           ## 0xff2a
	.long	65535                           ## 0xffff
	.long	2                               ## 0x2
	.space	16

	.p2align	4                               ## @ael2020_setup_twinax_edc.uCclockActivate
_ael2020_setup_twinax_edc.uCclockActivate:
	.long	128                             ## 0x80
	.long	53248                           ## 0xd000
	.long	65535                           ## 0xffff
	.long	20992                           ## 0x5200
	.space	16

	.p2align	4                               ## @ael2020_setup_twinax_edc.uCactivate
_ael2020_setup_twinax_edc.uCactivate:
	.long	128                             ## 0x80
	.long	53376                           ## 0xd080
	.long	65535                           ## 0xffff
	.long	256                             ## 0x100
	.long	128                             ## 0x80
	.long	53394                           ## 0xd092
	.long	65535                           ## 0xffff
	.long	0                               ## 0x0
	.space	16

	.comm	_edc_twinax,8,3                 ## @edc_twinax
	.comm	_EDC_TWX_AEL2020,4,2            ## @EDC_TWX_AEL2020
	.comm	_EDC_TWX_AEL2020_SIZE,4,2       ## @EDC_TWX_AEL2020_SIZE
	.no_dead_strip	_ael2020_setup_twinax_edc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ael2020_setup_twinax_edc
_ael2020_setup_twinax_edc:              ; @ael2020_setup_twinax_edc
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x1, _ael2020_setup_twinax_edc.uCclock40MHz@PAGE
Lloh1:
	add	x1, x1, _ael2020_setup_twinax_edc.uCclock40MHz@PAGEOFF
	bl	_set_phy_regs
	mov	x20, x0
	mov	w0, #500
	bl	_msleep
	cbnz	w20, LBB0_9
; %bb.1:
Lloh2:
	adrp	x1, _ael2020_setup_twinax_edc.uCclockActivate@PAGE
Lloh3:
	add	x1, x1, _ael2020_setup_twinax_edc.uCclockActivate@PAGEOFF
	mov	x0, x19
	bl	_set_phy_regs
	mov	x20, x0
	mov	w0, #500
	bl	_msleep
	cbnz	w20, LBB0_9
; %bb.2:
	ldr	x8, [x19]
Lloh4:
	adrp	x21, _edc_twinax@GOTPAGE
Lloh5:
	ldr	x21, [x21, _edc_twinax@GOTPAGEOFF]
	ldr	x9, [x21]
Lloh6:
	adrp	x22, _EDC_TWX_AEL2020_SIZE@GOTPAGE
Lloh7:
	ldr	x22, [x22, _EDC_TWX_AEL2020_SIZE@GOTPAGEOFF]
	cmp	x8, x9
	b.eq	LBB0_4
; %bb.3:
Lloh8:
	adrp	x8, _EDC_TWX_AEL2020@GOTPAGE
Lloh9:
	ldr	x8, [x8, _EDC_TWX_AEL2020@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	ldr	w2, [x22]
	mov	x0, x19
	bl	_t3_get_edc_fw
	mov	x20, x0
	cbnz	w0, LBB0_9
LBB0_4:
	ldr	w8, [x22]
	cmp	w8, #4
	b.lo	LBB0_7
; %bb.5:
	mov	x20, #0
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #8]
	add	x8, x8, x20, lsl #2
	ldp	w2, w3, [x8]
	mov	x0, x19
	mov	w1, #128
	bl	_t3_mdio_write
	add	x20, x20, #2
	ldrsw	x8, [x22]
	cmp	x20, x8, lsr #2
	ccmp	w0, #0, #0, lo
	b.eq	LBB0_6
LBB0_7:
Lloh11:
	adrp	x1, _ael2020_setup_twinax_edc.uCactivate@PAGE
Lloh12:
	add	x1, x1, _ael2020_setup_twinax_edc.uCactivate@PAGEOFF
	mov	x0, x19
	bl	_set_phy_regs
	mov	x20, x0
	cbnz	w0, LBB0_9
; %bb.8:
	ldr	x8, [x21]
	str	x8, [x19]
LBB0_9:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @ael2020_setup_twinax_edc.uCclock40MHz
_ael2020_setup_twinax_edc.uCclock40MHz:
	.long	128                             ; 0x80
	.long	65320                           ; 0xff28
	.long	65535                           ; 0xffff
	.long	16385                           ; 0x4001
	.long	128                             ; 0x80
	.long	65322                           ; 0xff2a
	.long	65535                           ; 0xffff
	.long	2                               ; 0x2
	.space	16

	.p2align	2                               ; @ael2020_setup_twinax_edc.uCclockActivate
_ael2020_setup_twinax_edc.uCclockActivate:
	.long	128                             ; 0x80
	.long	53248                           ; 0xd000
	.long	65535                           ; 0xffff
	.long	20992                           ; 0x5200
	.space	16

	.p2align	2                               ; @ael2020_setup_twinax_edc.uCactivate
_ael2020_setup_twinax_edc.uCactivate:
	.long	128                             ; 0x80
	.long	53376                           ; 0xd080
	.long	65535                           ; 0xffff
	.long	256                             ; 0x100
	.long	128                             ; 0x80
	.long	53394                           ; 0xd092
	.long	65535                           ; 0xffff
	.long	0                               ; 0x0
	.space	16

	.comm	_edc_twinax,8,3                 ; @edc_twinax
	.comm	_EDC_TWX_AEL2020,4,2            ; @EDC_TWX_AEL2020
	.comm	_EDC_TWX_AEL2020_SIZE,4,2       ; @EDC_TWX_AEL2020_SIZE
	.no_dead_strip	_ael2020_setup_twinax_edc
.subsections_via_symbols
