	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_get_pcie_width_speed
_bnx2x_get_pcie_width_speed:            ## @bnx2x_get_pcie_width_speed
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movl	$0, -20(%rbp)
	movl	(%rdi), %edi
	movq	_PCICFG_LINK_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-20(%rbp), %rdx
	callq	_pci_read_config_dword
	movl	-20(%rbp), %eax
	movq	_PCICFG_LINK_WIDTH@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	%eax, %edx
	movq	_PCICFG_LINK_WIDTH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %edx
	movl	%edx, (%rbx)
	movq	_PCICFG_LINK_SPEED@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_PCICFG_LINK_SPEED_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	cmpl	$2, %eax
	jne	LBB0_1
## %bb.2:
	movq	_BNX2X_PCI_LINK_SPEED_5000@GOTPCREL(%rip), %rcx
	cmpl	$3, %eax
	je	LBB0_4
	jmp	LBB0_5
LBB0_1:
	movq	_BNX2X_PCI_LINK_SPEED_2500@GOTPCREL(%rip), %rcx
	cmpl	$3, %eax
	jne	LBB0_5
LBB0_4:
	movq	_BNX2X_PCI_LINK_SPEED_8000@GOTPCREL(%rip), %rcx
LBB0_5:
	movl	(%rcx), %eax
	movl	%eax, (%r14)
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCICFG_LINK_CONTROL,4,2        ## @PCICFG_LINK_CONTROL
	.comm	_PCICFG_LINK_WIDTH,4,2          ## @PCICFG_LINK_WIDTH
	.comm	_PCICFG_LINK_WIDTH_SHIFT,4,2    ## @PCICFG_LINK_WIDTH_SHIFT
	.comm	_PCICFG_LINK_SPEED,4,2          ## @PCICFG_LINK_SPEED
	.comm	_PCICFG_LINK_SPEED_SHIFT,4,2    ## @PCICFG_LINK_SPEED_SHIFT
	.comm	_BNX2X_PCI_LINK_SPEED_8000,4,2  ## @BNX2X_PCI_LINK_SPEED_8000
	.comm	_BNX2X_PCI_LINK_SPEED_5000,4,2  ## @BNX2X_PCI_LINK_SPEED_5000
	.comm	_BNX2X_PCI_LINK_SPEED_2500,4,2  ## @BNX2X_PCI_LINK_SPEED_2500
	.no_dead_strip	_bnx2x_get_pcie_width_speed
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_get_pcie_width_speed
_bnx2x_get_pcie_width_speed:            ; @bnx2x_get_pcie_width_speed
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x2
	mov	x20, x1
	str	wzr, [sp, #12]
	ldr	w0, [x0]
Lloh0:
	adrp	x8, _PCICFG_LINK_CONTROL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCICFG_LINK_CONTROL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	ldr	w8, [sp, #12]
Lloh3:
	adrp	x9, _PCICFG_LINK_WIDTH@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PCICFG_LINK_WIDTH@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
Lloh6:
	adrp	x10, _PCICFG_LINK_WIDTH_SHIFT@GOTPAGE
Lloh7:
	ldr	x10, [x10, _PCICFG_LINK_WIDTH_SHIFT@GOTPAGEOFF]
	and	w9, w9, w8
Lloh8:
	ldr	w10, [x10]
	asr	w9, w9, w10
	str	w9, [x20]
Lloh9:
	adrp	x9, _PCICFG_LINK_SPEED@GOTPAGE
Lloh10:
	ldr	x9, [x9, _PCICFG_LINK_SPEED@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh12:
	adrp	x9, _PCICFG_LINK_SPEED_SHIFT@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PCICFG_LINK_SPEED_SHIFT@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	asr	w8, w8, w9
Lloh15:
	adrp	x9, _BNX2X_PCI_LINK_SPEED_8000@GOTPAGE
Lloh16:
	ldr	x9, [x9, _BNX2X_PCI_LINK_SPEED_8000@GOTPAGEOFF]
Lloh17:
	adrp	x10, _BNX2X_PCI_LINK_SPEED_5000@GOTPAGE
Lloh18:
	ldr	x10, [x10, _BNX2X_PCI_LINK_SPEED_5000@GOTPAGEOFF]
Lloh19:
	adrp	x11, _BNX2X_PCI_LINK_SPEED_2500@GOTPAGE
Lloh20:
	ldr	x11, [x11, _BNX2X_PCI_LINK_SPEED_2500@GOTPAGEOFF]
	cmp	w8, #2
	csel	x10, x10, x11, eq
	cmp	w8, #3
	csel	x8, x9, x10, eq
	ldr	w8, [x8]
	str	w8, [x19]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PCICFG_LINK_CONTROL,4,2        ; @PCICFG_LINK_CONTROL
	.comm	_PCICFG_LINK_WIDTH,4,2          ; @PCICFG_LINK_WIDTH
	.comm	_PCICFG_LINK_WIDTH_SHIFT,4,2    ; @PCICFG_LINK_WIDTH_SHIFT
	.comm	_PCICFG_LINK_SPEED,4,2          ; @PCICFG_LINK_SPEED
	.comm	_PCICFG_LINK_SPEED_SHIFT,4,2    ; @PCICFG_LINK_SPEED_SHIFT
	.comm	_BNX2X_PCI_LINK_SPEED_8000,4,2  ; @BNX2X_PCI_LINK_SPEED_8000
	.comm	_BNX2X_PCI_LINK_SPEED_5000,4,2  ; @BNX2X_PCI_LINK_SPEED_5000
	.comm	_BNX2X_PCI_LINK_SPEED_2500,4,2  ; @BNX2X_PCI_LINK_SPEED_2500
	.no_dead_strip	_bnx2x_get_pcie_width_speed
.subsections_via_symbols
