	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si_irq_set                     ## -- Begin function si_irq_set
	.p2align	4, 0x90
_si_irq_set:                            ## @si_irq_set
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$0, 40(%rdi)
	je	LBB0_1
## %bb.2:
	movq	%rdi, %r15
	cmpl	$0, 48(%rdi)
	je	LBB0_3
## %bb.4:
	movq	_CNTX_BUSY_INT_ENABLE@GOTPCREL(%rip), %rax
	movq	_CNTX_EMPTY_INT_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	orl	(%rax), %r14d
	movq	_DC_HPD1_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_RREG32
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	movq	_DC_HPDx_INT_EN@GOTPCREL(%rip), %rbx
	movl	(%rbx), %eax
	movl	%eax, -108(%rbp)                ## 4-byte Spill
	movq	_DC_HPD2_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_RREG32
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movl	(%rbx), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_DC_HPD3_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_RREG32
	movl	%eax, -84(%rbp)                 ## 4-byte Spill
	movl	(%rbx), %eax
	movl	%eax, -112(%rbp)                ## 4-byte Spill
	movq	_DC_HPD4_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_RREG32
	movl	%eax, -80(%rbp)                 ## 4-byte Spill
	movl	(%rbx), %eax
	movl	%eax, -120(%rbp)                ## 4-byte Spill
	movq	_DC_HPD5_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_RREG32
	movl	%eax, -76(%rbp)                 ## 4-byte Spill
	movl	(%rbx), %eax
	movl	%eax, -124(%rbp)                ## 4-byte Spill
	movq	_DC_HPD6_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_RREG32
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movl	(%rbx), %eax
	movl	%eax, -128(%rbp)                ## 4-byte Spill
	movq	_DMA_CNTL@GOTPCREL(%rip), %rbx
	movq	_DMA0_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%rbx), %rdi
	callq	_RREG32
	movl	%eax, -72(%rbp)                 ## 4-byte Spill
	movq	_TRAP_ENABLE@GOTPCREL(%rip), %r12
	movl	(%r12), %r13d
	movq	_DMA1_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%rbx), %rdi
	callq	_RREG32
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	(%r12), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	shlq	$2, %rdi
	addq	32(%r15), %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	leaq	L_.str.1(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_TIME_STAMP_INT_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
LBB0_6:
	movl	%r14d, -68(%rbp)                ## 4-byte Spill
	movq	_CAYMAN_RING_TYPE_CP1_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	shlq	$2, %rdi
	addq	32(%r15), %rdi
	callq	_atomic_read
	xorl	%ebx, %ebx
	movl	$0, %ecx
	testq	%rax, %rax
	movl	-72(%rbp), %r12d                ## 4-byte Reload
	je	LBB0_8
## %bb.7:
	leaq	L_.str.2(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_TIME_STAMP_INT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
LBB0_8:
	movl	%ecx, -116(%rbp)                ## 4-byte Spill
	notl	%r13d
	movq	_CAYMAN_RING_TYPE_CP2_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	shlq	$2, %rdi
	addq	32(%r15), %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_10
## %bb.9:
	leaq	L_.str.3(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_TIME_STAMP_INT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
LBB0_10:
	notl	-44(%rbp)                       ## 4-byte Folded Spill
	andl	%r13d, %r12d
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	shlq	$2, %rdi
	addq	32(%r15), %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_11
## %bb.12:
	leaq	L_.str.4(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_TRAP_ENABLE@GOTPCREL(%rip), %r13
	orl	(%r13), %r12d
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	jmp	LBB0_13
LBB0_1:
	leaq	L_.str(%rip), %rsi
	movl	$1, %edi
	callq	_WARN
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_58
LBB0_3:
	movq	%r15, %rdi
	callq	_si_disable_interrupts
	movq	%r15, %rdi
	callq	_si_disable_interrupt_state
	xorl	%ebx, %ebx
	jmp	LBB0_58
LBB0_11:
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	movq	_TRAP_ENABLE@GOTPCREL(%rip), %r13
LBB0_13:
	movl	%ebx, -48(%rbp)                 ## 4-byte Spill
	movl	%r12d, -72(%rbp)                ## 4-byte Spill
	movl	-52(%rbp), %eax                 ## 4-byte Reload
	andl	-44(%rbp), %eax                 ## 4-byte Folded Reload
	movl	%eax, %ebx
	movq	_CAYMAN_RING_TYPE_DMA1_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	shlq	$2, %rdi
	addq	32(%r15), %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_15
## %bb.14:
	leaq	L_.str.5(%rip), %rdi
	callq	_DRM_DEBUG
	orl	(%r13), %ebx
LBB0_15:
	movl	%ebx, -52(%rbp)                 ## 4-byte Spill
	movl	-64(%rbp), %r13d                ## 4-byte Reload
	movl	-60(%rbp), %r12d                ## 4-byte Reload
	movq	24(%r15), %rax
	cmpq	$0, (%rax)
	jne	LBB0_18
## %bb.16:
	movq	16(%r15), %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_17
LBB0_18:
	leaq	L_.str.6(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_VBLANK_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
LBB0_19:
	movl	%r13d, %ebx
	movq	24(%r15), %rax
	cmpq	$0, 8(%rax)
	jne	LBB0_22
## %bb.20:
	movq	16(%r15), %rdi
	addq	$4, %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_21
LBB0_22:
	leaq	L_.str.7(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_VBLANK_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -104(%rbp)                ## 4-byte Spill
LBB0_23:
	movq	24(%r15), %rax
	cmpq	$0, 16(%rax)
	jne	LBB0_26
## %bb.24:
	movq	16(%r15), %rdi
	addq	$8, %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_25
LBB0_26:
	leaq	L_.str.8(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_VBLANK_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -100(%rbp)                ## 4-byte Spill
LBB0_27:
	movq	24(%r15), %rax
	cmpq	$0, 24(%rax)
	jne	LBB0_30
## %bb.28:
	movq	16(%r15), %rdi
	addq	$12, %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_29
LBB0_30:
	leaq	L_.str.9(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_VBLANK_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -96(%rbp)                 ## 4-byte Spill
LBB0_31:
	movq	24(%r15), %rax
	cmpq	$0, 32(%rax)
	jne	LBB0_34
## %bb.32:
	movq	16(%r15), %rdi
	addq	$16, %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_33
LBB0_34:
	leaq	L_.str.10(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_VBLANK_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -92(%rbp)                 ## 4-byte Spill
LBB0_35:
	notl	-108(%rbp)                      ## 4-byte Folded Spill
	movq	24(%r15), %rax
	cmpq	$0, 40(%rax)
	jne	LBB0_38
## %bb.36:
	movq	16(%r15), %rdi
	addq	$20, %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_37
LBB0_38:
	leaq	L_.str.11(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_VBLANK_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -88(%rbp)                 ## 4-byte Spill
LBB0_39:
	notl	%r14d
	andl	-108(%rbp), %ebx                ## 4-byte Folded Reload
	movq	8(%r15), %rax
	cmpq	$0, (%rax)
	je	LBB0_41
## %bb.40:
	leaq	L_.str.12(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_DC_HPDx_INT_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	8(%r15), %rax
LBB0_41:
	movl	-112(%rbp), %ecx                ## 4-byte Reload
	notl	%ecx
	andl	%r14d, %r12d
	cmpq	$0, 8(%rax)
	movl	%ebx, -64(%rbp)                 ## 4-byte Spill
	je	LBB0_43
## %bb.42:
	leaq	L_.str.13(%rip), %rdi
	movl	%ecx, %r13d
	callq	_DRM_DEBUG
	movl	%r13d, %ecx
	movq	_DC_HPDx_INT_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movq	8(%r15), %rax
LBB0_43:
	movl	-120(%rbp), %ebx                ## 4-byte Reload
	notl	%ebx
	movl	-84(%rbp), %r14d                ## 4-byte Reload
	andl	%ecx, %r14d
	cmpq	$0, 16(%rax)
	je	LBB0_45
## %bb.44:
	leaq	L_.str.14(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_DC_HPDx_INT_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movq	8(%r15), %rax
LBB0_45:
	movl	%r12d, -60(%rbp)                ## 4-byte Spill
	movl	-124(%rbp), %esi                ## 4-byte Reload
	notl	%esi
	movl	-80(%rbp), %r12d                ## 4-byte Reload
	andl	%ebx, %r12d
	cmpq	$0, 24(%rax)
	je	LBB0_47
## %bb.46:
	leaq	L_.str.15(%rip), %rdi
	movl	%esi, %ebx
	callq	_DRM_DEBUG
	movl	%ebx, %esi
	movq	_DC_HPDx_INT_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movq	8(%r15), %rax
LBB0_47:
	movl	-128(%rbp), %edx                ## 4-byte Reload
	notl	%edx
	movl	-76(%rbp), %ecx                 ## 4-byte Reload
	andl	%esi, %ecx
	cmpq	$0, 32(%rax)
	je	LBB0_49
## %bb.48:
	leaq	L_.str.16(%rip), %rdi
	movl	%ecx, %r13d
	movl	%edx, %ebx
	callq	_DRM_DEBUG
	movl	%ebx, %edx
	movl	%r13d, %ecx
	movq	_DC_HPDx_INT_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	8(%r15), %rax
LBB0_49:
	movl	-68(%rbp), %r13d                ## 4-byte Reload
	movl	%ecx, -76(%rbp)                 ## 4-byte Spill
	movl	-56(%rbp), %ebx                 ## 4-byte Reload
	andl	%edx, %ebx
	cmpq	$0, 40(%rax)
	movl	%r14d, -84(%rbp)                ## 4-byte Spill
	movl	%r12d, -80(%rbp)                ## 4-byte Spill
	je	LBB0_51
## %bb.50:
	leaq	L_.str.17(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_DC_HPDx_INT_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
LBB0_51:
	movl	%ebx, -56(%rbp)                 ## 4-byte Spill
	movq	_CP_INT_CNTL_RING0@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	%r13d, %esi
	callq	_WREG32
	movq	_CP_INT_CNTL_RING1@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	-116(%rbp), %esi                ## 4-byte Reload
	callq	_WREG32
	movq	_CP_INT_CNTL_RING2@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	-48(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_DMA0_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	_DMA_CNTL@GOTPCREL(%rip), %rbx
	addq	(%rbx), %rdi
	movl	-72(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_DMA1_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%rbx), %rdi
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_GRBM_INT_CNTL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_INT_MASK@GOTPCREL(%rip), %rbx
	movq	_EVERGREEN_CRTC0_REGISTER_OFFSET@GOTPCREL(%rip), %r13
	movq	(%r13), %rdi
	addq	(%rbx), %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_EVERGREEN_CRTC1_REGISTER_OFFSET@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	addq	(%rbx), %rdi
	movl	-104(%rbp), %esi                ## 4-byte Reload
	callq	_WREG32
	cmpl	$4, (%r15)
	jl	LBB0_54
## %bb.52:
	movq	_EVERGREEN_CRTC2_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%rbx), %rdi
	movl	-100(%rbp), %esi                ## 4-byte Reload
	callq	_WREG32
	movq	_EVERGREEN_CRTC3_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%rbx), %rdi
	movl	-96(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	cmpl	$6, (%r15)
	jl	LBB0_54
## %bb.53:
	movq	_EVERGREEN_CRTC4_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%rbx), %rdi
	movl	-92(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_EVERGREEN_CRTC5_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%rbx), %rdi
	movl	-88(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
LBB0_54:
	movq	_GRPH_INT_CONTROL@GOTPCREL(%rip), %r12
	movq	(%r13), %rdi
	addq	(%r12), %rdi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	_WREG32
	movq	(%r14), %rdi
	addq	(%r12), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	cmpl	$4, (%r15)
	jl	LBB0_57
## %bb.55:
	movq	_EVERGREEN_CRTC2_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%r12), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_EVERGREEN_CRTC3_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%r12), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	cmpl	$6, (%r15)
	jl	LBB0_57
## %bb.56:
	movq	_EVERGREEN_CRTC4_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%r12), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_EVERGREEN_CRTC5_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%r12), %rdi
	xorl	%esi, %esi
	callq	_WREG32
LBB0_57:
	movq	_DC_HPD1_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	-64(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_DC_HPD2_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	-60(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_DC_HPD3_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	-84(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_DC_HPD4_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	-80(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_DC_HPD5_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	-76(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_DC_HPD6_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	-56(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
LBB0_58:
	movl	%ebx, %eax
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_17:
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	jmp	LBB0_19
LBB0_21:
	movl	$0, -104(%rbp)                  ## 4-byte Folded Spill
	jmp	LBB0_23
LBB0_25:
	movl	$0, -100(%rbp)                  ## 4-byte Folded Spill
	jmp	LBB0_27
LBB0_29:
	movl	$0, -96(%rbp)                   ## 4-byte Folded Spill
	jmp	LBB0_31
LBB0_33:
	movl	$0, -92(%rbp)                   ## 4-byte Folded Spill
	jmp	LBB0_35
LBB0_37:
	movl	$0, -88(%rbp)                   ## 4-byte Folded Spill
	jmp	LBB0_39
	.cfi_endproc
                                        ## -- End function
	.comm	_CNTX_BUSY_INT_ENABLE,4,2       ## @CNTX_BUSY_INT_ENABLE
	.comm	_CNTX_EMPTY_INT_ENABLE,4,2      ## @CNTX_EMPTY_INT_ENABLE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Can't enable IRQ/MSI because no handler is installed\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_DC_HPD1_INT_CONTROL,8,3        ## @DC_HPD1_INT_CONTROL
	.comm	_DC_HPDx_INT_EN,4,2             ## @DC_HPDx_INT_EN
	.comm	_DC_HPD2_INT_CONTROL,8,3        ## @DC_HPD2_INT_CONTROL
	.comm	_DC_HPD3_INT_CONTROL,8,3        ## @DC_HPD3_INT_CONTROL
	.comm	_DC_HPD4_INT_CONTROL,8,3        ## @DC_HPD4_INT_CONTROL
	.comm	_DC_HPD5_INT_CONTROL,8,3        ## @DC_HPD5_INT_CONTROL
	.comm	_DC_HPD6_INT_CONTROL,8,3        ## @DC_HPD6_INT_CONTROL
	.comm	_DMA_CNTL,8,3                   ## @DMA_CNTL
	.comm	_DMA0_REGISTER_OFFSET,8,3       ## @DMA0_REGISTER_OFFSET
	.comm	_TRAP_ENABLE,4,2                ## @TRAP_ENABLE
	.comm	_DMA1_REGISTER_OFFSET,8,3       ## @DMA1_REGISTER_OFFSET
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
L_.str.1:                               ## @.str.1
	.asciz	"si_irq_set: sw int gfx\n"

	.comm	_TIME_STAMP_INT_ENABLE,4,2      ## @TIME_STAMP_INT_ENABLE
	.comm	_CAYMAN_RING_TYPE_CP1_INDEX,8,3 ## @CAYMAN_RING_TYPE_CP1_INDEX
L_.str.2:                               ## @.str.2
	.asciz	"si_irq_set: sw int cp1\n"

	.comm	_CAYMAN_RING_TYPE_CP2_INDEX,8,3 ## @CAYMAN_RING_TYPE_CP2_INDEX
L_.str.3:                               ## @.str.3
	.asciz	"si_irq_set: sw int cp2\n"

	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ## @R600_RING_TYPE_DMA_INDEX
L_.str.4:                               ## @.str.4
	.asciz	"si_irq_set: sw int dma\n"

	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ## @CAYMAN_RING_TYPE_DMA1_INDEX
L_.str.5:                               ## @.str.5
	.asciz	"si_irq_set: sw int dma1\n"

L_.str.6:                               ## @.str.6
	.asciz	"si_irq_set: vblank 0\n"

	.comm	_VBLANK_INT_MASK,4,2            ## @VBLANK_INT_MASK
L_.str.7:                               ## @.str.7
	.asciz	"si_irq_set: vblank 1\n"

L_.str.8:                               ## @.str.8
	.asciz	"si_irq_set: vblank 2\n"

L_.str.9:                               ## @.str.9
	.asciz	"si_irq_set: vblank 3\n"

L_.str.10:                              ## @.str.10
	.asciz	"si_irq_set: vblank 4\n"

L_.str.11:                              ## @.str.11
	.asciz	"si_irq_set: vblank 5\n"

L_.str.12:                              ## @.str.12
	.asciz	"si_irq_set: hpd 1\n"

L_.str.13:                              ## @.str.13
	.asciz	"si_irq_set: hpd 2\n"

L_.str.14:                              ## @.str.14
	.asciz	"si_irq_set: hpd 3\n"

L_.str.15:                              ## @.str.15
	.asciz	"si_irq_set: hpd 4\n"

L_.str.16:                              ## @.str.16
	.asciz	"si_irq_set: hpd 5\n"

L_.str.17:                              ## @.str.17
	.asciz	"si_irq_set: hpd 6\n"

	.comm	_CP_INT_CNTL_RING0,8,3          ## @CP_INT_CNTL_RING0
	.comm	_CP_INT_CNTL_RING1,8,3          ## @CP_INT_CNTL_RING1
	.comm	_CP_INT_CNTL_RING2,8,3          ## @CP_INT_CNTL_RING2
	.comm	_GRBM_INT_CNTL,8,3              ## @GRBM_INT_CNTL
	.comm	_INT_MASK,8,3                   ## @INT_MASK
	.comm	_EVERGREEN_CRTC0_REGISTER_OFFSET,8,3 ## @EVERGREEN_CRTC0_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC1_REGISTER_OFFSET,8,3 ## @EVERGREEN_CRTC1_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC2_REGISTER_OFFSET,8,3 ## @EVERGREEN_CRTC2_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC3_REGISTER_OFFSET,8,3 ## @EVERGREEN_CRTC3_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC4_REGISTER_OFFSET,8,3 ## @EVERGREEN_CRTC4_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC5_REGISTER_OFFSET,8,3 ## @EVERGREEN_CRTC5_REGISTER_OFFSET
	.comm	_GRPH_INT_CONTROL,8,3           ## @GRPH_INT_CONTROL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si_irq_set                     ; -- Begin function si_irq_set
	.p2align	2
_si_irq_set:                            ; @si_irq_set
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #176
	.cfi_def_cfa_offset 176
	stp	x28, x27, [sp, #80]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #96]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #112]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #128]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #144]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #160]            ; 16-byte Folded Spill
	add	x29, sp, #160
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0, #40]
	cbz	w8, LBB0_6
; %bb.1:
	mov	x19, x0
	ldr	w8, [x0, #48]
	cbz	w8, LBB0_7
; %bb.2:
Lloh0:
	adrp	x8, _CNTX_BUSY_INT_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CNTX_BUSY_INT_ENABLE@GOTPAGEOFF]
Lloh2:
	adrp	x9, _CNTX_EMPTY_INT_ENABLE@GOTPAGE
Lloh3:
	ldr	x9, [x9, _CNTX_EMPTY_INT_ENABLE@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	ldr	w9, [x9]
	orr	w22, w9, w8
Lloh6:
	adrp	x8, _DC_HPD1_INT_CONTROL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DC_HPD1_INT_CONTROL@GOTPAGEOFF]
Lloh8:
	ldr	x0, [x8]
	bl	_RREG32
	mov	x27, x0
Lloh9:
	adrp	x20, _DC_HPDx_INT_EN@GOTPAGE
Lloh10:
	ldr	x20, [x20, _DC_HPDx_INT_EN@GOTPAGEOFF]
	ldr	w8, [x20]
	str	w8, [sp, #28]                   ; 4-byte Folded Spill
Lloh11:
	adrp	x8, _DC_HPD2_INT_CONTROL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DC_HPD2_INT_CONTROL@GOTPAGEOFF]
Lloh13:
	ldr	x0, [x8]
	bl	_RREG32
	ldr	w8, [x20]
	stp	w8, w0, [sp, #32]               ; 8-byte Folded Spill
Lloh14:
	adrp	x8, _DC_HPD3_INT_CONTROL@GOTPAGE
Lloh15:
	ldr	x8, [x8, _DC_HPD3_INT_CONTROL@GOTPAGEOFF]
Lloh16:
	ldr	x0, [x8]
	bl	_RREG32
	ldr	w8, [x20]
	stp	w8, w0, [sp, #44]               ; 8-byte Folded Spill
Lloh17:
	adrp	x8, _DC_HPD4_INT_CONTROL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DC_HPD4_INT_CONTROL@GOTPAGEOFF]
Lloh19:
	ldr	x0, [x8]
	bl	_RREG32
	ldr	w8, [x20]
	stp	w8, w0, [sp, #56]               ; 8-byte Folded Spill
Lloh20:
	adrp	x8, _DC_HPD5_INT_CONTROL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _DC_HPD5_INT_CONTROL@GOTPAGEOFF]
Lloh22:
	ldr	x0, [x8]
	bl	_RREG32
	ldr	w8, [x20]
	stp	w8, w0, [sp, #64]               ; 8-byte Folded Spill
Lloh23:
	adrp	x8, _DC_HPD6_INT_CONTROL@GOTPAGE
Lloh24:
	ldr	x8, [x8, _DC_HPD6_INT_CONTROL@GOTPAGEOFF]
Lloh25:
	ldr	x0, [x8]
	bl	_RREG32
	str	w0, [sp, #76]                   ; 4-byte Folded Spill
Lloh26:
	adrp	x21, _DMA_CNTL@GOTPAGE
Lloh27:
	ldr	x21, [x21, _DMA_CNTL@GOTPAGEOFF]
	ldr	w8, [x20]
	str	w8, [sp, #72]                   ; 4-byte Folded Spill
	ldr	x8, [x21]
Lloh28:
	adrp	x9, _DMA0_REGISTER_OFFSET@GOTPAGE
Lloh29:
	ldr	x9, [x9, _DMA0_REGISTER_OFFSET@GOTPAGEOFF]
Lloh30:
	ldr	x9, [x9]
	add	x0, x9, x8
	bl	_RREG32
	mov	x23, x0
Lloh31:
	adrp	x25, _TRAP_ENABLE@GOTPAGE
Lloh32:
	ldr	x25, [x25, _TRAP_ENABLE@GOTPAGEOFF]
	ldr	w26, [x25]
	ldr	x8, [x21]
Lloh33:
	adrp	x9, _DMA1_REGISTER_OFFSET@GOTPAGE
Lloh34:
	ldr	x9, [x9, _DMA1_REGISTER_OFFSET@GOTPAGEOFF]
Lloh35:
	ldr	x9, [x9]
	add	x0, x9, x8
	bl	_RREG32
	mov	x21, x0
	ldr	w24, [x25]
	ldr	x8, [x19, #32]
Lloh36:
	adrp	x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh37:
	ldr	x9, [x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh38:
	ldr	x9, [x9]
	add	x0, x8, x9, lsl #2
	bl	_atomic_read
Lloh39:
	adrp	x28, _TIME_STAMP_INT_ENABLE@GOTPAGE
Lloh40:
	ldr	x28, [x28, _TIME_STAMP_INT_ENABLE@GOTPAGEOFF]
	cbz	x0, LBB0_4
; %bb.3:
Lloh41:
	adrp	x0, l_.str.1@PAGE
Lloh42:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x28]
	orr	w22, w8, w22
LBB0_4:
	ldr	x8, [x19, #32]
Lloh43:
	adrp	x9, _CAYMAN_RING_TYPE_CP1_INDEX@GOTPAGE
Lloh44:
	ldr	x9, [x9, _CAYMAN_RING_TYPE_CP1_INDEX@GOTPAGEOFF]
Lloh45:
	ldr	x9, [x9]
	add	x0, x8, x9, lsl #2
	bl	_atomic_read
	cbz	x0, LBB0_8
; %bb.5:
Lloh46:
	adrp	x0, l_.str.2@PAGE
Lloh47:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x28]
	str	w8, [sp, #52]                   ; 4-byte Folded Spill
	b	LBB0_9
LBB0_6:
Lloh48:
	adrp	x1, l_.str@PAGE
Lloh49:
	add	x1, x1, l_.str@PAGEOFF
	mov	w0, #1
	bl	_WARN
Lloh50:
	adrp	x8, _EINVAL@GOTPAGE
Lloh51:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_54
LBB0_7:
	mov	x0, x19
	bl	_si_disable_interrupts
	mov	x0, x19
	bl	_si_disable_interrupt_state
	b	LBB0_53
LBB0_8:
	str	wzr, [sp, #52]                  ; 4-byte Folded Spill
LBB0_9:
	ldr	x8, [x19, #32]
Lloh53:
	adrp	x9, _CAYMAN_RING_TYPE_CP2_INDEX@GOTPAGE
Lloh54:
	ldr	x9, [x9, _CAYMAN_RING_TYPE_CP2_INDEX@GOTPAGEOFF]
Lloh55:
	ldr	x9, [x9]
	add	x0, x8, x9, lsl #2
	bl	_atomic_read
	cbz	x0, LBB0_11
; %bb.10:
Lloh56:
	adrp	x0, l_.str.3@PAGE
Lloh57:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x28]
	str	w8, [sp, #40]                   ; 4-byte Folded Spill
	b	LBB0_12
LBB0_11:
	str	wzr, [sp, #40]                  ; 4-byte Folded Spill
LBB0_12:
	bic	w26, w23, w26
	ldr	x8, [x19, #32]
Lloh58:
	adrp	x9, _R600_RING_TYPE_DMA_INDEX@GOTPAGE
Lloh59:
	ldr	x9, [x9, _R600_RING_TYPE_DMA_INDEX@GOTPAGEOFF]
Lloh60:
	ldr	x9, [x9]
	add	x0, x8, x9, lsl #2
	bl	_atomic_read
	cbz	x0, LBB0_14
; %bb.13:
Lloh61:
	adrp	x0, l_.str.4@PAGE
Lloh62:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x25]
	orr	w26, w8, w26
LBB0_14:
	bic	w21, w21, w24
	ldr	x8, [x19, #32]
Lloh63:
	adrp	x9, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGE
Lloh64:
	ldr	x9, [x9, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGEOFF]
Lloh65:
	ldr	x9, [x9]
	add	x0, x8, x9, lsl #2
	bl	_atomic_read
	cbz	x0, LBB0_16
; %bb.15:
Lloh66:
	adrp	x0, l_.str.5@PAGE
Lloh67:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x25]
	orr	w21, w8, w21
LBB0_16:
	ldr	x8, [x19, #24]
	ldr	x8, [x8]
Lloh68:
	adrp	x23, _VBLANK_INT_MASK@GOTPAGE
Lloh69:
	ldr	x23, [x23, _VBLANK_INT_MASK@GOTPAGEOFF]
	cbnz	x8, LBB0_18
; %bb.17:
	ldr	x0, [x19, #16]
	bl	_atomic_read
	cbz	x0, LBB0_55
LBB0_18:
Lloh70:
	adrp	x0, l_.str.6@PAGE
Lloh71:
	add	x0, x0, l_.str.6@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x23]
	str	w8, [sp, #24]                   ; 4-byte Folded Spill
LBB0_19:
	ldr	x8, [x19, #24]
	ldr	x8, [x8, #8]
	cbnz	x8, LBB0_21
; %bb.20:
	ldr	x8, [x19, #16]
	add	x0, x8, #4
	bl	_atomic_read
	cbz	x0, LBB0_56
LBB0_21:
Lloh72:
	adrp	x0, l_.str.7@PAGE
Lloh73:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x23]
	str	w8, [sp, #20]                   ; 4-byte Folded Spill
LBB0_22:
	ldr	x8, [x19, #24]
	ldr	x8, [x8, #16]
	cbnz	x8, LBB0_24
; %bb.23:
	ldr	x8, [x19, #16]
	add	x0, x8, #8
	bl	_atomic_read
	cbz	x0, LBB0_57
LBB0_24:
Lloh74:
	adrp	x0, l_.str.8@PAGE
Lloh75:
	add	x0, x0, l_.str.8@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x23]
	str	w8, [sp, #16]                   ; 4-byte Folded Spill
LBB0_25:
	ldr	x8, [x19, #24]
	ldr	x8, [x8, #24]
	cbnz	x8, LBB0_27
; %bb.26:
	ldr	x8, [x19, #16]
	add	x0, x8, #12
	bl	_atomic_read
	cbz	x0, LBB0_58
LBB0_27:
Lloh76:
	adrp	x0, l_.str.9@PAGE
Lloh77:
	add	x0, x0, l_.str.9@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x23]
	str	w8, [sp, #12]                   ; 4-byte Folded Spill
LBB0_28:
	ldr	x8, [x19, #24]
	ldr	x8, [x8, #32]
	cbnz	x8, LBB0_30
; %bb.29:
	ldr	x8, [x19, #16]
	add	x0, x8, #16
	bl	_atomic_read
	cbz	x0, LBB0_59
LBB0_30:
Lloh78:
	adrp	x0, l_.str.10@PAGE
Lloh79:
	add	x0, x0, l_.str.10@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x23]
	str	w8, [sp, #8]                    ; 4-byte Folded Spill
LBB0_31:
	ldr	x8, [x19, #24]
	ldr	x8, [x8, #40]
	cbnz	x8, LBB0_33
; %bb.32:
	ldr	x8, [x19, #16]
	add	x0, x8, #20
	bl	_atomic_read
	cbz	x0, LBB0_60
LBB0_33:
Lloh80:
	adrp	x0, l_.str.11@PAGE
Lloh81:
	add	x0, x0, l_.str.11@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x23]
	str	w8, [sp, #4]                    ; 4-byte Folded Spill
LBB0_34:
	ldr	w8, [sp, #28]                   ; 4-byte Folded Reload
	bic	w23, w27, w8
	ldr	x8, [x19, #8]
	ldr	x9, [x8]
	cbz	x9, LBB0_36
; %bb.35:
Lloh82:
	adrp	x0, l_.str.12@PAGE
Lloh83:
	add	x0, x0, l_.str.12@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x20]
	orr	w23, w8, w23
	ldr	x8, [x19, #8]
LBB0_36:
	ldp	w10, w9, [sp, #32]              ; 8-byte Folded Reload
	bic	w28, w9, w10
	ldr	x9, [x8, #8]
	cbz	x9, LBB0_38
; %bb.37:
Lloh84:
	adrp	x0, l_.str.13@PAGE
Lloh85:
	add	x0, x0, l_.str.13@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x20]
	orr	w28, w8, w28
	ldr	x8, [x19, #8]
LBB0_38:
	ldp	w10, w9, [sp, #44]              ; 8-byte Folded Reload
	bic	w25, w9, w10
	ldr	x9, [x8, #16]
	cbz	x9, LBB0_40
; %bb.39:
Lloh86:
	adrp	x0, l_.str.14@PAGE
Lloh87:
	add	x0, x0, l_.str.14@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x20]
	orr	w25, w8, w25
	ldr	x8, [x19, #8]
LBB0_40:
	ldp	w10, w9, [sp, #56]              ; 8-byte Folded Reload
	bic	w27, w9, w10
	ldr	x9, [x8, #24]
	str	w23, [sp, #28]                  ; 4-byte Folded Spill
	cbz	x9, LBB0_42
; %bb.41:
Lloh88:
	adrp	x0, l_.str.15@PAGE
Lloh89:
	add	x0, x0, l_.str.15@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x20]
	orr	w27, w8, w27
	ldr	x8, [x19, #8]
LBB0_42:
	ldp	w10, w9, [sp, #64]              ; 8-byte Folded Reload
	bic	w23, w9, w10
	ldr	x9, [x8, #32]
	cbz	x9, LBB0_44
; %bb.43:
Lloh90:
	adrp	x0, l_.str.16@PAGE
Lloh91:
	add	x0, x0, l_.str.16@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x20]
	orr	w23, w8, w23
	ldr	x8, [x19, #8]
LBB0_44:
	ldp	w10, w9, [sp, #72]              ; 8-byte Folded Reload
	bic	w24, w9, w10
	ldr	x8, [x8, #40]
	cbz	x8, LBB0_46
; %bb.45:
Lloh92:
	adrp	x0, l_.str.17@PAGE
Lloh93:
	add	x0, x0, l_.str.17@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x20]
	orr	w24, w8, w24
LBB0_46:
Lloh94:
	adrp	x8, _CP_INT_CNTL_RING0@GOTPAGE
Lloh95:
	ldr	x8, [x8, _CP_INT_CNTL_RING0@GOTPAGEOFF]
Lloh96:
	ldr	x0, [x8]
	mov	x1, x22
	bl	_WREG32
Lloh97:
	adrp	x8, _CP_INT_CNTL_RING1@GOTPAGE
Lloh98:
	ldr	x8, [x8, _CP_INT_CNTL_RING1@GOTPAGEOFF]
Lloh99:
	ldr	x0, [x8]
	ldr	w1, [sp, #52]                   ; 4-byte Folded Reload
	bl	_WREG32
Lloh100:
	adrp	x8, _CP_INT_CNTL_RING2@GOTPAGE
Lloh101:
	ldr	x8, [x8, _CP_INT_CNTL_RING2@GOTPAGEOFF]
Lloh102:
	ldr	x0, [x8]
	ldr	w1, [sp, #40]                   ; 4-byte Folded Reload
	bl	_WREG32
Lloh103:
	adrp	x20, _DMA_CNTL@GOTPAGE
Lloh104:
	ldr	x20, [x20, _DMA_CNTL@GOTPAGEOFF]
	ldr	x8, [x20]
Lloh105:
	adrp	x9, _DMA0_REGISTER_OFFSET@GOTPAGE
Lloh106:
	ldr	x9, [x9, _DMA0_REGISTER_OFFSET@GOTPAGEOFF]
Lloh107:
	ldr	x9, [x9]
	add	x0, x9, x8
	mov	x1, x26
	bl	_WREG32
	ldr	x8, [x20]
Lloh108:
	adrp	x9, _DMA1_REGISTER_OFFSET@GOTPAGE
Lloh109:
	ldr	x9, [x9, _DMA1_REGISTER_OFFSET@GOTPAGEOFF]
Lloh110:
	ldr	x9, [x9]
	add	x0, x9, x8
	mov	x1, x21
	bl	_WREG32
Lloh111:
	adrp	x8, _GRBM_INT_CNTL@GOTPAGE
Lloh112:
	ldr	x8, [x8, _GRBM_INT_CNTL@GOTPAGEOFF]
Lloh113:
	ldr	x0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh114:
	adrp	x20, _INT_MASK@GOTPAGE
Lloh115:
	ldr	x20, [x20, _INT_MASK@GOTPAGEOFF]
	ldr	x8, [x20]
Lloh116:
	adrp	x26, _EVERGREEN_CRTC0_REGISTER_OFFSET@GOTPAGE
Lloh117:
	ldr	x26, [x26, _EVERGREEN_CRTC0_REGISTER_OFFSET@GOTPAGEOFF]
	ldr	x9, [x26]
	add	x0, x9, x8
	ldr	w1, [sp, #24]                   ; 4-byte Folded Reload
	bl	_WREG32
	ldr	x8, [x20]
Lloh118:
	adrp	x22, _EVERGREEN_CRTC1_REGISTER_OFFSET@GOTPAGE
Lloh119:
	ldr	x22, [x22, _EVERGREEN_CRTC1_REGISTER_OFFSET@GOTPAGEOFF]
	ldr	x9, [x22]
	add	x0, x9, x8
	ldr	w1, [sp, #20]                   ; 4-byte Folded Reload
	bl	_WREG32
	ldr	w8, [x19]
Lloh120:
	adrp	x21, _EVERGREEN_CRTC2_REGISTER_OFFSET@GOTPAGE
Lloh121:
	ldr	x21, [x21, _EVERGREEN_CRTC2_REGISTER_OFFSET@GOTPAGEOFF]
	cmp	w8, #4
	b.lt	LBB0_49
; %bb.47:
	ldr	x8, [x20]
	ldr	x9, [x21]
	add	x0, x9, x8
	ldr	w1, [sp, #16]                   ; 4-byte Folded Reload
	bl	_WREG32
	ldr	x8, [x20]
Lloh122:
	adrp	x9, _EVERGREEN_CRTC3_REGISTER_OFFSET@GOTPAGE
Lloh123:
	ldr	x9, [x9, _EVERGREEN_CRTC3_REGISTER_OFFSET@GOTPAGEOFF]
Lloh124:
	ldr	x9, [x9]
	add	x0, x9, x8
	ldr	w1, [sp, #12]                   ; 4-byte Folded Reload
	bl	_WREG32
	ldr	w8, [x19]
	cmp	w8, #6
	b.lt	LBB0_49
; %bb.48:
	ldr	x8, [x20]
Lloh125:
	adrp	x9, _EVERGREEN_CRTC4_REGISTER_OFFSET@GOTPAGE
Lloh126:
	ldr	x9, [x9, _EVERGREEN_CRTC4_REGISTER_OFFSET@GOTPAGEOFF]
Lloh127:
	ldr	x9, [x9]
	add	x0, x9, x8
	ldr	w1, [sp, #8]                    ; 4-byte Folded Reload
	bl	_WREG32
	ldr	x8, [x20]
Lloh128:
	adrp	x9, _EVERGREEN_CRTC5_REGISTER_OFFSET@GOTPAGE
Lloh129:
	ldr	x9, [x9, _EVERGREEN_CRTC5_REGISTER_OFFSET@GOTPAGEOFF]
Lloh130:
	ldr	x9, [x9]
	add	x0, x9, x8
	ldr	w1, [sp, #4]                    ; 4-byte Folded Reload
	bl	_WREG32
LBB0_49:
Lloh131:
	adrp	x20, _GRPH_INT_CONTROL@GOTPAGE
Lloh132:
	ldr	x20, [x20, _GRPH_INT_CONTROL@GOTPAGEOFF]
	ldr	x8, [x20]
	ldr	x9, [x26]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	ldr	x8, [x20]
	ldr	x9, [x22]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	ldr	w8, [x19]
	cmp	w8, #4
	b.lt	LBB0_52
; %bb.50:
	ldr	x8, [x20]
	ldr	x9, [x21]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	ldr	x8, [x20]
Lloh133:
	adrp	x9, _EVERGREEN_CRTC3_REGISTER_OFFSET@GOTPAGE
Lloh134:
	ldr	x9, [x9, _EVERGREEN_CRTC3_REGISTER_OFFSET@GOTPAGEOFF]
Lloh135:
	ldr	x9, [x9]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	ldr	w8, [x19]
	cmp	w8, #6
	b.lt	LBB0_52
; %bb.51:
	ldr	x8, [x20]
Lloh136:
	adrp	x9, _EVERGREEN_CRTC4_REGISTER_OFFSET@GOTPAGE
Lloh137:
	ldr	x9, [x9, _EVERGREEN_CRTC4_REGISTER_OFFSET@GOTPAGEOFF]
Lloh138:
	ldr	x9, [x9]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	ldr	x8, [x20]
Lloh139:
	adrp	x9, _EVERGREEN_CRTC5_REGISTER_OFFSET@GOTPAGE
Lloh140:
	ldr	x9, [x9, _EVERGREEN_CRTC5_REGISTER_OFFSET@GOTPAGEOFF]
Lloh141:
	ldr	x9, [x9]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
LBB0_52:
Lloh142:
	adrp	x8, _DC_HPD1_INT_CONTROL@GOTPAGE
Lloh143:
	ldr	x8, [x8, _DC_HPD1_INT_CONTROL@GOTPAGEOFF]
Lloh144:
	ldr	x0, [x8]
	ldr	w1, [sp, #28]                   ; 4-byte Folded Reload
	bl	_WREG32
Lloh145:
	adrp	x8, _DC_HPD2_INT_CONTROL@GOTPAGE
Lloh146:
	ldr	x8, [x8, _DC_HPD2_INT_CONTROL@GOTPAGEOFF]
Lloh147:
	ldr	x0, [x8]
	mov	x1, x28
	bl	_WREG32
Lloh148:
	adrp	x8, _DC_HPD3_INT_CONTROL@GOTPAGE
Lloh149:
	ldr	x8, [x8, _DC_HPD3_INT_CONTROL@GOTPAGEOFF]
Lloh150:
	ldr	x0, [x8]
	mov	x1, x25
	bl	_WREG32
Lloh151:
	adrp	x8, _DC_HPD4_INT_CONTROL@GOTPAGE
Lloh152:
	ldr	x8, [x8, _DC_HPD4_INT_CONTROL@GOTPAGEOFF]
Lloh153:
	ldr	x0, [x8]
	mov	x1, x27
	bl	_WREG32
Lloh154:
	adrp	x8, _DC_HPD5_INT_CONTROL@GOTPAGE
Lloh155:
	ldr	x8, [x8, _DC_HPD5_INT_CONTROL@GOTPAGEOFF]
Lloh156:
	ldr	x0, [x8]
	mov	x1, x23
	bl	_WREG32
Lloh157:
	adrp	x8, _DC_HPD6_INT_CONTROL@GOTPAGE
Lloh158:
	ldr	x8, [x8, _DC_HPD6_INT_CONTROL@GOTPAGEOFF]
Lloh159:
	ldr	x0, [x8]
	mov	x1, x24
	bl	_WREG32
LBB0_53:
	mov	w0, #0
LBB0_54:
	ldp	x29, x30, [sp, #160]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #144]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #128]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #112]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #96]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #80]             ; 16-byte Folded Reload
	add	sp, sp, #176
	ret
LBB0_55:
	str	wzr, [sp, #24]                  ; 4-byte Folded Spill
	b	LBB0_19
LBB0_56:
	str	wzr, [sp, #20]                  ; 4-byte Folded Spill
	b	LBB0_22
LBB0_57:
	str	wzr, [sp, #16]                  ; 4-byte Folded Spill
	b	LBB0_25
LBB0_58:
	str	wzr, [sp, #12]                  ; 4-byte Folded Spill
	b	LBB0_28
LBB0_59:
	str	wzr, [sp, #8]                   ; 4-byte Folded Spill
	b	LBB0_31
LBB0_60:
	str	wzr, [sp, #4]                   ; 4-byte Folded Spill
	b	LBB0_34
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpAdd	Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpAdd	Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpAdd	Lloh66, Lloh67
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpAdd	Lloh70, Lloh71
	.loh AdrpAdd	Lloh72, Lloh73
	.loh AdrpAdd	Lloh74, Lloh75
	.loh AdrpAdd	Lloh76, Lloh77
	.loh AdrpAdd	Lloh78, Lloh79
	.loh AdrpAdd	Lloh80, Lloh81
	.loh AdrpAdd	Lloh82, Lloh83
	.loh AdrpAdd	Lloh84, Lloh85
	.loh AdrpAdd	Lloh86, Lloh87
	.loh AdrpAdd	Lloh88, Lloh89
	.loh AdrpAdd	Lloh90, Lloh91
	.loh AdrpAdd	Lloh92, Lloh93
	.loh AdrpLdrGot	Lloh120, Lloh121
	.loh AdrpLdrGot	Lloh118, Lloh119
	.loh AdrpLdrGot	Lloh116, Lloh117
	.loh AdrpLdrGot	Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGot	Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh122, Lloh123, Lloh124
	.loh AdrpLdrGotLdr	Lloh128, Lloh129, Lloh130
	.loh AdrpLdrGotLdr	Lloh125, Lloh126, Lloh127
	.loh AdrpLdrGot	Lloh131, Lloh132
	.loh AdrpLdrGotLdr	Lloh133, Lloh134, Lloh135
	.loh AdrpLdrGotLdr	Lloh139, Lloh140, Lloh141
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.loh AdrpLdrGotLdr	Lloh157, Lloh158, Lloh159
	.loh AdrpLdrGotLdr	Lloh154, Lloh155, Lloh156
	.loh AdrpLdrGotLdr	Lloh151, Lloh152, Lloh153
	.loh AdrpLdrGotLdr	Lloh148, Lloh149, Lloh150
	.loh AdrpLdrGotLdr	Lloh145, Lloh146, Lloh147
	.loh AdrpLdrGotLdr	Lloh142, Lloh143, Lloh144
	.cfi_endproc
                                        ; -- End function
	.comm	_CNTX_BUSY_INT_ENABLE,4,2       ; @CNTX_BUSY_INT_ENABLE
	.comm	_CNTX_EMPTY_INT_ENABLE,4,2      ; @CNTX_EMPTY_INT_ENABLE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Can't enable IRQ/MSI because no handler is installed\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_DC_HPD1_INT_CONTROL,8,3        ; @DC_HPD1_INT_CONTROL
	.comm	_DC_HPDx_INT_EN,4,2             ; @DC_HPDx_INT_EN
	.comm	_DC_HPD2_INT_CONTROL,8,3        ; @DC_HPD2_INT_CONTROL
	.comm	_DC_HPD3_INT_CONTROL,8,3        ; @DC_HPD3_INT_CONTROL
	.comm	_DC_HPD4_INT_CONTROL,8,3        ; @DC_HPD4_INT_CONTROL
	.comm	_DC_HPD5_INT_CONTROL,8,3        ; @DC_HPD5_INT_CONTROL
	.comm	_DC_HPD6_INT_CONTROL,8,3        ; @DC_HPD6_INT_CONTROL
	.comm	_DMA_CNTL,8,3                   ; @DMA_CNTL
	.comm	_DMA0_REGISTER_OFFSET,8,3       ; @DMA0_REGISTER_OFFSET
	.comm	_TRAP_ENABLE,4,2                ; @TRAP_ENABLE
	.comm	_DMA1_REGISTER_OFFSET,8,3       ; @DMA1_REGISTER_OFFSET
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
l_.str.1:                               ; @.str.1
	.asciz	"si_irq_set: sw int gfx\n"

	.comm	_TIME_STAMP_INT_ENABLE,4,2      ; @TIME_STAMP_INT_ENABLE
	.comm	_CAYMAN_RING_TYPE_CP1_INDEX,8,3 ; @CAYMAN_RING_TYPE_CP1_INDEX
l_.str.2:                               ; @.str.2
	.asciz	"si_irq_set: sw int cp1\n"

	.comm	_CAYMAN_RING_TYPE_CP2_INDEX,8,3 ; @CAYMAN_RING_TYPE_CP2_INDEX
l_.str.3:                               ; @.str.3
	.asciz	"si_irq_set: sw int cp2\n"

	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ; @R600_RING_TYPE_DMA_INDEX
l_.str.4:                               ; @.str.4
	.asciz	"si_irq_set: sw int dma\n"

	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ; @CAYMAN_RING_TYPE_DMA1_INDEX
l_.str.5:                               ; @.str.5
	.asciz	"si_irq_set: sw int dma1\n"

l_.str.6:                               ; @.str.6
	.asciz	"si_irq_set: vblank 0\n"

	.comm	_VBLANK_INT_MASK,4,2            ; @VBLANK_INT_MASK
l_.str.7:                               ; @.str.7
	.asciz	"si_irq_set: vblank 1\n"

l_.str.8:                               ; @.str.8
	.asciz	"si_irq_set: vblank 2\n"

l_.str.9:                               ; @.str.9
	.asciz	"si_irq_set: vblank 3\n"

l_.str.10:                              ; @.str.10
	.asciz	"si_irq_set: vblank 4\n"

l_.str.11:                              ; @.str.11
	.asciz	"si_irq_set: vblank 5\n"

l_.str.12:                              ; @.str.12
	.asciz	"si_irq_set: hpd 1\n"

l_.str.13:                              ; @.str.13
	.asciz	"si_irq_set: hpd 2\n"

l_.str.14:                              ; @.str.14
	.asciz	"si_irq_set: hpd 3\n"

l_.str.15:                              ; @.str.15
	.asciz	"si_irq_set: hpd 4\n"

l_.str.16:                              ; @.str.16
	.asciz	"si_irq_set: hpd 5\n"

l_.str.17:                              ; @.str.17
	.asciz	"si_irq_set: hpd 6\n"

	.comm	_CP_INT_CNTL_RING0,8,3          ; @CP_INT_CNTL_RING0
	.comm	_CP_INT_CNTL_RING1,8,3          ; @CP_INT_CNTL_RING1
	.comm	_CP_INT_CNTL_RING2,8,3          ; @CP_INT_CNTL_RING2
	.comm	_GRBM_INT_CNTL,8,3              ; @GRBM_INT_CNTL
	.comm	_INT_MASK,8,3                   ; @INT_MASK
	.comm	_EVERGREEN_CRTC0_REGISTER_OFFSET,8,3 ; @EVERGREEN_CRTC0_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC1_REGISTER_OFFSET,8,3 ; @EVERGREEN_CRTC1_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC2_REGISTER_OFFSET,8,3 ; @EVERGREEN_CRTC2_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC3_REGISTER_OFFSET,8,3 ; @EVERGREEN_CRTC3_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC4_REGISTER_OFFSET,8,3 ; @EVERGREEN_CRTC4_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC5_REGISTER_OFFSET,8,3 ; @EVERGREEN_CRTC5_REGISTER_OFFSET
	.comm	_GRPH_INT_CONTROL,8,3           ; @GRPH_INT_CONTROL
.subsections_via_symbols
