	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_t4_slow_intr_handler           ## -- Begin function t4_slow_intr_handler
	.p2align	4, 0x90
_t4_slow_intr_handler:                  ## @t4_slow_intr_handler
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_PL_INT_CAUSE@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_t4_read_reg
	movq	_GLBL_INTR_MASK@GOTPCREL(%rip), %r12
	testl	%eax, (%r12)
	je	LBB0_1
## %bb.2:
	movl	%eax, %ebx
	movq	_CIM@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_4
## %bb.3:
	movq	%r14, %rdi
	callq	_cim_intr_handler
LBB0_4:
	movq	_MPS@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_6
## %bb.5:
	movq	%r14, %rdi
	callq	_mps_intr_handler
LBB0_6:
	movq	_NCSI@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_8
## %bb.7:
	movq	%r14, %rdi
	callq	_ncsi_intr_handler
LBB0_8:
	movq	_PL@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_10
## %bb.9:
	movq	%r14, %rdi
	callq	_pl_intr_handler
LBB0_10:
	movq	_SMB@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_12
## %bb.11:
	movq	%r14, %rdi
	callq	_smb_intr_handler
LBB0_12:
	movq	_XGMAC0@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_14
## %bb.13:
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_xgmac_intr_handler
LBB0_14:
	movq	_XGMAC1@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_16
## %bb.15:
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_xgmac_intr_handler
LBB0_16:
	movq	_XGMAC_KR0@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_18
## %bb.17:
	movq	%r14, %rdi
	movl	$2, %esi
	callq	_xgmac_intr_handler
LBB0_18:
	movq	_XGMAC_KR1@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_20
## %bb.19:
	movq	%r14, %rdi
	movl	$3, %esi
	callq	_xgmac_intr_handler
LBB0_20:
	movq	_PCIE@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_22
## %bb.21:
	movq	%r14, %rdi
	callq	_pcie_intr_handler
LBB0_22:
	movq	_MC@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_24
## %bb.23:
	movq	_MEM_MC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mem_intr_handler
LBB0_24:
	movq	_EDC0@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_26
## %bb.25:
	movq	_MEM_EDC0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mem_intr_handler
LBB0_26:
	movq	_EDC1@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_28
## %bb.27:
	movq	_MEM_EDC1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mem_intr_handler
LBB0_28:
	movq	_LE@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_30
## %bb.29:
	movq	%r14, %rdi
	callq	_le_intr_handler
LBB0_30:
	movq	_TP@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_32
## %bb.31:
	movq	%r14, %rdi
	callq	_tp_intr_handler
LBB0_32:
	movq	_MA@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_34
## %bb.33:
	movq	%r14, %rdi
	callq	_ma_intr_handler
LBB0_34:
	movq	_PM_TX@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_36
## %bb.35:
	movq	%r14, %rdi
	callq	_pmtx_intr_handler
LBB0_36:
	movq	_PM_RX@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_38
## %bb.37:
	movq	%r14, %rdi
	callq	_pmrx_intr_handler
LBB0_38:
	movq	_ULP_RX@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_40
## %bb.39:
	movq	%r14, %rdi
	callq	_ulprx_intr_handler
LBB0_40:
	movq	_CPL_SWITCH@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_42
## %bb.41:
	movq	%r14, %rdi
	callq	_cplsw_intr_handler
LBB0_42:
	movq	_SGE@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_44
## %bb.43:
	movq	%r14, %rdi
	callq	_sge_intr_handler
LBB0_44:
	movq	_ULP_TX@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_46
## %bb.45:
	movq	%r14, %rdi
	callq	_ulptx_intr_handler
LBB0_46:
	movl	(%r15), %esi
	andl	(%r12), %ebx
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_t4_write_reg
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_t4_read_reg
	movl	$1, %eax
	jmp	LBB0_47
LBB0_1:
	xorl	%eax, %eax
LBB0_47:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PL_INT_CAUSE,4,2               ## @PL_INT_CAUSE
	.comm	_GLBL_INTR_MASK,4,2             ## @GLBL_INTR_MASK
	.comm	_CIM,4,2                        ## @CIM
	.comm	_MPS,4,2                        ## @MPS
	.comm	_NCSI,4,2                       ## @NCSI
	.comm	_PL,4,2                         ## @PL
	.comm	_SMB,4,2                        ## @SMB
	.comm	_XGMAC0,4,2                     ## @XGMAC0
	.comm	_XGMAC1,4,2                     ## @XGMAC1
	.comm	_XGMAC_KR0,4,2                  ## @XGMAC_KR0
	.comm	_XGMAC_KR1,4,2                  ## @XGMAC_KR1
	.comm	_PCIE,4,2                       ## @PCIE
	.comm	_MC,4,2                         ## @MC
	.comm	_MEM_MC,4,2                     ## @MEM_MC
	.comm	_EDC0,4,2                       ## @EDC0
	.comm	_MEM_EDC0,4,2                   ## @MEM_EDC0
	.comm	_EDC1,4,2                       ## @EDC1
	.comm	_MEM_EDC1,4,2                   ## @MEM_EDC1
	.comm	_LE,4,2                         ## @LE
	.comm	_TP,4,2                         ## @TP
	.comm	_MA,4,2                         ## @MA
	.comm	_PM_TX,4,2                      ## @PM_TX
	.comm	_PM_RX,4,2                      ## @PM_RX
	.comm	_ULP_RX,4,2                     ## @ULP_RX
	.comm	_CPL_SWITCH,4,2                 ## @CPL_SWITCH
	.comm	_SGE,4,2                        ## @SGE
	.comm	_ULP_TX,4,2                     ## @ULP_TX
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_t4_slow_intr_handler           ; -- Begin function t4_slow_intr_handler
	.p2align	2
_t4_slow_intr_handler:                  ; @t4_slow_intr_handler
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x21, _PL_INT_CAUSE@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PL_INT_CAUSE@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_t4_read_reg
Lloh2:
	adrp	x22, _GLBL_INTR_MASK@GOTPAGE
Lloh3:
	ldr	x22, [x22, _GLBL_INTR_MASK@GOTPAGEOFF]
	ldr	w8, [x22]
	tst	w8, w0
	b.eq	LBB0_46
; %bb.1:
	mov	x20, x0
Lloh4:
	adrp	x8, _CIM@GOTPAGE
Lloh5:
	ldr	x8, [x8, _CIM@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_3
; %bb.2:
	mov	x0, x19
	bl	_cim_intr_handler
LBB0_3:
Lloh7:
	adrp	x8, _MPS@GOTPAGE
Lloh8:
	ldr	x8, [x8, _MPS@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_5
; %bb.4:
	mov	x0, x19
	bl	_mps_intr_handler
LBB0_5:
Lloh10:
	adrp	x8, _NCSI@GOTPAGE
Lloh11:
	ldr	x8, [x8, _NCSI@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_7
; %bb.6:
	mov	x0, x19
	bl	_ncsi_intr_handler
LBB0_7:
Lloh13:
	adrp	x8, _PL@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PL@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_9
; %bb.8:
	mov	x0, x19
	bl	_pl_intr_handler
LBB0_9:
Lloh16:
	adrp	x8, _SMB@GOTPAGE
Lloh17:
	ldr	x8, [x8, _SMB@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_11
; %bb.10:
	mov	x0, x19
	bl	_smb_intr_handler
LBB0_11:
Lloh19:
	adrp	x8, _XGMAC0@GOTPAGE
Lloh20:
	ldr	x8, [x8, _XGMAC0@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_13
; %bb.12:
	mov	x0, x19
	mov	w1, #0
	bl	_xgmac_intr_handler
LBB0_13:
Lloh22:
	adrp	x8, _XGMAC1@GOTPAGE
Lloh23:
	ldr	x8, [x8, _XGMAC1@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_15
; %bb.14:
	mov	x0, x19
	mov	w1, #1
	bl	_xgmac_intr_handler
LBB0_15:
Lloh25:
	adrp	x8, _XGMAC_KR0@GOTPAGE
Lloh26:
	ldr	x8, [x8, _XGMAC_KR0@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_17
; %bb.16:
	mov	x0, x19
	mov	w1, #2
	bl	_xgmac_intr_handler
LBB0_17:
Lloh28:
	adrp	x8, _XGMAC_KR1@GOTPAGE
Lloh29:
	ldr	x8, [x8, _XGMAC_KR1@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_19
; %bb.18:
	mov	x0, x19
	mov	w1, #3
	bl	_xgmac_intr_handler
LBB0_19:
Lloh31:
	adrp	x8, _PCIE@GOTPAGE
Lloh32:
	ldr	x8, [x8, _PCIE@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_21
; %bb.20:
	mov	x0, x19
	bl	_pcie_intr_handler
LBB0_21:
Lloh34:
	adrp	x8, _MC@GOTPAGE
Lloh35:
	ldr	x8, [x8, _MC@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_23
; %bb.22:
Lloh37:
	adrp	x8, _MEM_MC@GOTPAGE
Lloh38:
	ldr	x8, [x8, _MEM_MC@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mem_intr_handler
LBB0_23:
Lloh40:
	adrp	x8, _EDC0@GOTPAGE
Lloh41:
	ldr	x8, [x8, _EDC0@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_25
; %bb.24:
Lloh43:
	adrp	x8, _MEM_EDC0@GOTPAGE
Lloh44:
	ldr	x8, [x8, _MEM_EDC0@GOTPAGEOFF]
Lloh45:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mem_intr_handler
LBB0_25:
Lloh46:
	adrp	x8, _EDC1@GOTPAGE
Lloh47:
	ldr	x8, [x8, _EDC1@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_27
; %bb.26:
Lloh49:
	adrp	x8, _MEM_EDC1@GOTPAGE
Lloh50:
	ldr	x8, [x8, _MEM_EDC1@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mem_intr_handler
LBB0_27:
Lloh52:
	adrp	x8, _LE@GOTPAGE
Lloh53:
	ldr	x8, [x8, _LE@GOTPAGEOFF]
Lloh54:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_29
; %bb.28:
	mov	x0, x19
	bl	_le_intr_handler
LBB0_29:
Lloh55:
	adrp	x8, _TP@GOTPAGE
Lloh56:
	ldr	x8, [x8, _TP@GOTPAGEOFF]
Lloh57:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_31
; %bb.30:
	mov	x0, x19
	bl	_tp_intr_handler
LBB0_31:
Lloh58:
	adrp	x8, _MA@GOTPAGE
Lloh59:
	ldr	x8, [x8, _MA@GOTPAGEOFF]
Lloh60:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_33
; %bb.32:
	mov	x0, x19
	bl	_ma_intr_handler
LBB0_33:
Lloh61:
	adrp	x8, _PM_TX@GOTPAGE
Lloh62:
	ldr	x8, [x8, _PM_TX@GOTPAGEOFF]
Lloh63:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_35
; %bb.34:
	mov	x0, x19
	bl	_pmtx_intr_handler
LBB0_35:
Lloh64:
	adrp	x8, _PM_RX@GOTPAGE
Lloh65:
	ldr	x8, [x8, _PM_RX@GOTPAGEOFF]
Lloh66:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_37
; %bb.36:
	mov	x0, x19
	bl	_pmrx_intr_handler
LBB0_37:
Lloh67:
	adrp	x8, _ULP_RX@GOTPAGE
Lloh68:
	ldr	x8, [x8, _ULP_RX@GOTPAGEOFF]
Lloh69:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_39
; %bb.38:
	mov	x0, x19
	bl	_ulprx_intr_handler
LBB0_39:
Lloh70:
	adrp	x8, _CPL_SWITCH@GOTPAGE
Lloh71:
	ldr	x8, [x8, _CPL_SWITCH@GOTPAGEOFF]
Lloh72:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_41
; %bb.40:
	mov	x0, x19
	bl	_cplsw_intr_handler
LBB0_41:
Lloh73:
	adrp	x8, _SGE@GOTPAGE
Lloh74:
	ldr	x8, [x8, _SGE@GOTPAGEOFF]
Lloh75:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_43
; %bb.42:
	mov	x0, x19
	bl	_sge_intr_handler
LBB0_43:
Lloh76:
	adrp	x8, _ULP_TX@GOTPAGE
Lloh77:
	ldr	x8, [x8, _ULP_TX@GOTPAGEOFF]
Lloh78:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_45
; %bb.44:
	mov	x0, x19
	bl	_ulptx_intr_handler
LBB0_45:
	ldr	w1, [x21]
	ldr	w8, [x22]
	and	w2, w8, w20
	mov	x0, x19
	bl	_t4_write_reg
	ldr	w1, [x21]
	mov	x0, x19
	bl	_t4_read_reg
	mov	w0, #1
	b	LBB0_47
LBB0_46:
	mov	w0, #0
LBB0_47:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.cfi_endproc
                                        ; -- End function
	.comm	_PL_INT_CAUSE,4,2               ; @PL_INT_CAUSE
	.comm	_GLBL_INTR_MASK,4,2             ; @GLBL_INTR_MASK
	.comm	_CIM,4,2                        ; @CIM
	.comm	_MPS,4,2                        ; @MPS
	.comm	_NCSI,4,2                       ; @NCSI
	.comm	_PL,4,2                         ; @PL
	.comm	_SMB,4,2                        ; @SMB
	.comm	_XGMAC0,4,2                     ; @XGMAC0
	.comm	_XGMAC1,4,2                     ; @XGMAC1
	.comm	_XGMAC_KR0,4,2                  ; @XGMAC_KR0
	.comm	_XGMAC_KR1,4,2                  ; @XGMAC_KR1
	.comm	_PCIE,4,2                       ; @PCIE
	.comm	_MC,4,2                         ; @MC
	.comm	_MEM_MC,4,2                     ; @MEM_MC
	.comm	_EDC0,4,2                       ; @EDC0
	.comm	_MEM_EDC0,4,2                   ; @MEM_EDC0
	.comm	_EDC1,4,2                       ; @EDC1
	.comm	_MEM_EDC1,4,2                   ; @MEM_EDC1
	.comm	_LE,4,2                         ; @LE
	.comm	_TP,4,2                         ; @TP
	.comm	_MA,4,2                         ; @MA
	.comm	_PM_TX,4,2                      ; @PM_TX
	.comm	_PM_RX,4,2                      ; @PM_RX
	.comm	_ULP_RX,4,2                     ; @ULP_RX
	.comm	_CPL_SWITCH,4,2                 ; @CPL_SWITCH
	.comm	_SGE,4,2                        ; @SGE
	.comm	_ULP_TX,4,2                     ; @ULP_TX
.subsections_via_symbols
