	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_emit_state2
_radeon_emit_state2:                    ## @radeon_emit_state2
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	movl	(%rdx), %r8d
	movq	_RADEON_UPLOAD_ZBIAS@GOTPCREL(%rip), %rax
	testl	%r8d, (%rax)
	je	LBB0_2
## %bb.1:
	movl	$3, %edi
	callq	_BEGIN_RING
	movq	_RADEON_SE_ZBIAS_FACTOR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_CP_PACKET0
	movl	%eax, %edi
	callq	_OUT_RING
	movl	16(%rbx), %edi
	callq	_OUT_RING
	movl	12(%rbx), %edi
	callq	_OUT_RING
	xorl	%eax, %eax
	callq	_ADVANCE_RING
	movl	(%rbx), %r8d
LBB0_2:
	movl	4(%rbx), %ecx
	addq	$8, %rbx
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_emit_state              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RING_LOCALS,4,2                ## @RING_LOCALS
	.comm	_RADEON_UPLOAD_ZBIAS,4,2        ## @RADEON_UPLOAD_ZBIAS
	.comm	_RADEON_SE_ZBIAS_FACTOR,4,2     ## @RADEON_SE_ZBIAS_FACTOR
	.no_dead_strip	_radeon_emit_state2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_emit_state2
_radeon_emit_state2:                    ; @radeon_emit_state2
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x19, x1
	mov	x21, x0
	ldr	w4, [x2]
Lloh0:
	adrp	x8, _RADEON_UPLOAD_ZBIAS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_UPLOAD_ZBIAS@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	tst	w8, w4
	b.eq	LBB0_2
; %bb.1:
	mov	w0, #3
	bl	_BEGIN_RING
Lloh3:
	adrp	x8, _RADEON_SE_ZBIAS_FACTOR@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RADEON_SE_ZBIAS_FACTOR@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	w1, #1
	bl	_CP_PACKET0
	bl	_OUT_RING
	ldr	w0, [x20, #16]
	bl	_OUT_RING
	ldr	w0, [x20, #12]
	bl	_OUT_RING
	bl	_ADVANCE_RING
	ldr	w4, [x20]
LBB0_2:
	add	x2, x20, #8
	ldr	w3, [x20, #4]
	mov	x0, x21
	mov	x1, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_radeon_emit_state
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_RING_LOCALS,4,2                ; @RING_LOCALS
	.comm	_RADEON_UPLOAD_ZBIAS,4,2        ; @RADEON_UPLOAD_ZBIAS
	.comm	_RADEON_SE_ZBIAS_FACTOR,4,2     ; @RADEON_SE_ZBIAS_FACTOR
	.no_dead_strip	_radeon_emit_state2
.subsections_via_symbols
