	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_nv50_display_flip_next         ## -- Begin function nv50_display_flip_next
	.p2align	4, 0x90
_nv50_display_flip_next:                ## @nv50_display_flip_next
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %ebx
	movq	%rdx, %r14
	movq	%rdi, %r15
	movq	%rsi, -72(%rbp)                 ## 8-byte Spill
	movq	%rsi, %rdi
	callq	_nouveau_framebuffer
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	movq	%r15, %rdi
	callq	_nouveau_crtc
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	_nv50_sync
	movl	(%r12), %r12d
	shll	$4, %ebx
	movl	$256, %ecx                      ## imm = 0x100
	cmovnel	%ebx, %ecx
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	testq	%r14, %r14
	jne	LBB0_2
## %bb.1:
	movl	(%r15), %edi
	movq	%rax, %rbx
	callq	_evo_sync
	movq	%rbx, %rax
LBB0_2:
	movq	%rax, %rdi
	movq	%rax, %rbx
	movl	$128, %esi
	callq	_evo_wait
	movq	%rax, %r13
	xorl	%edi, %edi
	testq	%rax, %rax
	sete	%dil
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_EBUSY@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
	jmp	LBB0_17
LBB0_4:
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	testq	%r14, %r14
	je	LBB0_14
## %bb.5:
	movl	4(%r14), %edi
	callq	_nv_mclass
	movq	_NV84_CHANNEL_IND_CLASS@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_8
## %bb.6:
	movq	%r14, %rdi
	movl	$8, %esi
	callq	_RING_SPACE
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.7:
	movq	_NV11_SUBCHAN_DMA_SEMAPHORE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$2, %ecx
	callq	_BEGIN_NV04
	movq	_NvEvoSema0@GOTPCREL(%rip), %rax
	addl	(%rax), %r12d
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_OUT_RING
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	movl	(%r12), %esi
	xorl	$16, %esi
	movq	%r14, %rdi
	callq	_OUT_RING
	movq	_NV11_SUBCHAN_SEMAPHORE_RELEASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$1, %ecx
	callq	_BEGIN_NV04
	movl	4(%r12), %esi
	incl	%esi
	movq	%r14, %rdi
	callq	_OUT_RING
	movq	_NV11_SUBCHAN_SEMAPHORE_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$2, %ecx
	callq	_BEGIN_NV04
	movl	(%r12), %esi
	movq	%r14, %rdi
	callq	_OUT_RING
	movl	4(%r12), %esi
	jmp	LBB0_13
LBB0_8:
	movl	4(%r14), %edi
	callq	_nv_mclass
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	_NVC0_CHANNEL_IND_CLASS@GOTPCREL(%rip), %rax
	movq	(%rax), %r15
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_nv84_fence_crtc
	movl	%eax, %r12d
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %ebx
	cmpq	%r15, -64(%rbp)                 ## 8-byte Folded Reload
	jge	LBB0_11
## %bb.9:
	movq	%r14, %rdi
	movl	$12, %esi
	callq	_RING_SPACE
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.10:
	addl	%r12d, %ebx
	movq	_NV11_SUBCHAN_DMA_SEMAPHORE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$1, %ecx
	callq	_BEGIN_NV04
	movl	(%r14), %esi
	movq	%r14, %rdi
	callq	_OUT_RING
	movq	_NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$4, %ecx
	callq	_BEGIN_NV04
	movl	%ebx, %r15d
	xorl	$16, %r15d
	movl	%r15d, %edi
	callq	_upper_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_OUT_RING
	movl	%r15d, %edi
	callq	_lower_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_OUT_RING
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	movl	4(%r12), %esi
	incl	%esi
	movq	%r14, %rdi
	callq	_OUT_RING
	movq	_NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_OUT_RING
	movq	_NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$4, %ecx
	callq	_BEGIN_NV04
	movl	%ebx, %edi
	callq	_upper_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_OUT_RING
	movl	%ebx, %edi
	callq	_lower_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_OUT_RING
	movl	4(%r12), %esi
	movq	%r14, %rdi
	callq	_OUT_RING
	movq	_NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	jmp	LBB0_13
LBB0_11:
	movq	%r14, %rdi
	movl	$10, %esi
	callq	_RING_SPACE
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.12:
	addl	%r12d, %ebx
	movq	_NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$4, %ecx
	callq	_BEGIN_NVC0
	movl	%ebx, %r15d
	xorl	$16, %r15d
	movl	%r15d, %edi
	callq	_upper_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_OUT_RING
	movl	%r15d, %edi
	callq	_lower_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_OUT_RING
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	movl	4(%r12), %esi
	incl	%esi
	movq	%r14, %rdi
	callq	_OUT_RING
	movq	_NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG@GOTPCREL(%rip), %rax
	movq	_NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	orl	(%rax), %esi
	movq	%r14, %rdi
	callq	_OUT_RING
	movq	_NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$4, %ecx
	callq	_BEGIN_NVC0
	movl	%ebx, %edi
	callq	_upper_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_OUT_RING
	movl	%ebx, %edi
	callq	_lower_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_OUT_RING
	movl	4(%r12), %esi
	movq	%r14, %rdi
	callq	_OUT_RING
	movq	_NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL@GOTPCREL(%rip), %rax
	movl	(%r15), %esi
	orl	(%rax), %esi
LBB0_13:
	movq	%r14, %rdi
	callq	_OUT_RING
	xorb	$16, (%r12)
	incl	4(%r12)
	movq	%r14, %rdi
	callq	_FIRE_RING
LBB0_14:
	movq	%r13, %rdi
	movl	$256, %esi                      ## imm = 0x100
	movl	$1, %edx
	callq	_evo_mthd
	movq	%r13, %rdi
	movl	$-131072, %esi                  ## imm = 0xFFFE0000
	callq	_evo_data
	movq	%r13, %rdi
	movl	$132, %esi
	movl	$1, %edx
	callq	_evo_mthd
	movq	%r13, %rdi
	movl	-52(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %esi
	callq	_evo_data
	testl	$256, %ebx                      ## imm = 0x100
	jne	LBB0_16
## %bb.15:
	movq	%r13, %rdi
	movl	$224, %esi
	movl	$1, %edx
	callq	_evo_mthd
	movq	%r13, %rdi
	movl	$1073741824, %esi               ## imm = 0x40000000
	callq	_evo_data
LBB0_16:
	movq	%r13, %rdi
	movl	$136, %esi
	movl	$4, %edx
	callq	_evo_mthd
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movl	(%r14), %esi
	movq	%r13, %rdi
	callq	_evo_data
	movl	4(%r14), %esi
	leal	1(%rsi), %eax
	movl	%eax, 4(%r14)
	movq	%r13, %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_evo_data
	movl	4(%r14), %esi
	movq	%r13, %rdi
	callq	_evo_data
	movq	_NvEvoSync@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_evo_data
	movq	%r13, %rdi
	movl	$160, %esi
	movl	$2, %edx
	callq	_evo_mthd
	xorl	%r15d, %r15d
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_evo_data
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_evo_data
	movq	%r13, %rdi
	movl	$192, %esi
	movl	$1, %edx
	callq	_evo_mthd
	movq	-80(%rbp), %rbx                 ## 8-byte Reload
	movl	(%rbx), %esi
	movq	%r13, %rdi
	callq	_evo_data
	movq	%r13, %rdi
	movl	$272, %esi                      ## imm = 0x110
	movl	$2, %edx
	callq	_evo_mthd
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_evo_data
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_evo_data
	movq	%r14, %rdi
	callq	_nv50_vers
	movq	_NVD0_DISP_SYNC_CLASS@GOTPCREL(%rip), %rcx
	xorl	%esi, %esi
	cmpq	(%rcx), %rax
	setl	%sil
	shll	$10, %esi
	addl	$1024, %esi                     ## imm = 0x400
	movq	%r13, %rdi
	movl	$5, %edx
	callq	_evo_mthd
	movq	16(%rbx), %rax
	movl	(%rax), %esi
	sarl	$8, %esi
	movq	%r13, %rdi
	callq	_evo_data
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_evo_data
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %esi
	shll	$16, %esi
	orl	4(%rax), %esi
	movq	%r13, %rdi
	callq	_evo_data
	movl	4(%rbx), %esi
	movq	%r13, %rdi
	callq	_evo_data
	movl	8(%rbx), %esi
	movq	%r13, %rdi
	callq	_evo_data
	movq	%r13, %rdi
	movl	$128, %esi
	movl	$1, %edx
	callq	_evo_mthd
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_evo_data
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	_evo_kick
LBB0_17:
	movl	%r15d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EBUSY,4,2                      ## @EBUSY
	.comm	_NV84_CHANNEL_IND_CLASS,8,3     ## @NV84_CHANNEL_IND_CLASS
	.comm	_NV11_SUBCHAN_DMA_SEMAPHORE,4,2 ## @NV11_SUBCHAN_DMA_SEMAPHORE
	.comm	_NvEvoSema0,4,2                 ## @NvEvoSema0
	.comm	_NV11_SUBCHAN_SEMAPHORE_RELEASE,4,2 ## @NV11_SUBCHAN_SEMAPHORE_RELEASE
	.comm	_NV11_SUBCHAN_SEMAPHORE_OFFSET,4,2 ## @NV11_SUBCHAN_SEMAPHORE_OFFSET
	.comm	_NVC0_CHANNEL_IND_CLASS,8,3     ## @NVC0_CHANNEL_IND_CLASS
	.comm	_NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH,4,2 ## @NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH
	.comm	_NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG,4,2 ## @NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG
	.comm	_NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL,4,2 ## @NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL
	.comm	_NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD,4,2 ## @NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD
	.comm	_NvEvoSync,4,2                  ## @NvEvoSync
	.comm	_NVD0_DISP_SYNC_CLASS,8,3       ## @NVD0_DISP_SYNC_CLASS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_nv50_display_flip_next         ; -- Begin function nv50_display_flip_next
	.p2align	2
_nv50_display_flip_next:                ; @nv50_display_flip_next
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x23, x3
	mov	x24, x2
	mov	x21, x1
	mov	x22, x0
	mov	x0, x1
	bl	_nouveau_framebuffer
	mov	x20, x0
	mov	x0, x22
	bl	_nouveau_crtc
	mov	x25, x0
	mov	x0, x22
	bl	_nv50_sync
	mov	x19, x0
	ldr	w25, [x25]
	lsl	w8, w23, #4
	mov	w9, #256
	cmp	w8, #0
	csel	w23, w9, w8, eq
	cbnz	x24, LBB0_2
; %bb.1:
	ldr	w0, [x22]
	bl	_evo_sync
LBB0_2:
	mov	x0, x19
	mov	w1, #128
	bl	_evo_wait
	mov	x22, x0
	cmp	x0, #0
	cset	w0, eq
	bl	_unlikely
	cbz	x0, LBB0_4
; %bb.3:
Lloh0:
	adrp	x8, _EBUSY@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EBUSY@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_17
LBB0_4:
	cbz	x24, LBB0_14
; %bb.5:
	ldr	w0, [x24, #4]
	bl	_nv_mclass
Lloh3:
	adrp	x8, _NV84_CHANNEL_IND_CLASS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _NV84_CHANNEL_IND_CLASS@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ge	LBB0_8
; %bb.6:
	mov	x0, x24
	mov	w1, #8
	bl	_RING_SPACE
	cbnz	w0, LBB0_17
; %bb.7:
Lloh6:
	adrp	x8, _NV11_SUBCHAN_DMA_SEMAPHORE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _NV11_SUBCHAN_DMA_SEMAPHORE@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x24
	mov	w1, #0
	mov	w3, #2
	bl	_BEGIN_NV04
Lloh9:
	adrp	x8, _NvEvoSema0@GOTPAGE
Lloh10:
	ldr	x8, [x8, _NvEvoSema0@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	add	w1, w8, w25
	mov	x0, x24
	bl	_OUT_RING
	ldr	w8, [x19]
	eor	w1, w8, #0x10
	mov	x0, x24
	bl	_OUT_RING
Lloh12:
	adrp	x8, _NV11_SUBCHAN_SEMAPHORE_RELEASE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _NV11_SUBCHAN_SEMAPHORE_RELEASE@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x24
	mov	w1, #0
	mov	w3, #1
	bl	_BEGIN_NV04
	ldr	w8, [x19, #4]
	add	w1, w8, #1
	mov	x0, x24
	bl	_OUT_RING
Lloh15:
	adrp	x8, _NV11_SUBCHAN_SEMAPHORE_OFFSET@GOTPAGE
Lloh16:
	ldr	x8, [x8, _NV11_SUBCHAN_SEMAPHORE_OFFSET@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x24
	mov	w1, #0
	mov	w3, #2
	bl	_BEGIN_NV04
	ldr	w1, [x19]
	mov	x0, x24
	bl	_OUT_RING
	ldr	w1, [x19, #4]
	b	LBB0_13
LBB0_8:
	ldr	w0, [x24, #4]
	bl	_nv_mclass
	mov	x26, x0
Lloh18:
	adrp	x8, _NVC0_CHANNEL_IND_CLASS@GOTPAGE
Lloh19:
	ldr	x8, [x8, _NVC0_CHANNEL_IND_CLASS@GOTPAGEOFF]
Lloh20:
	ldr	x28, [x8]
	mov	x0, x24
	mov	x1, x25
	bl	_nv84_fence_crtc
	mov	x25, x0
	ldr	w27, [x19]
	mov	x0, x24
	cmp	x26, x28
	b.ge	LBB0_11
; %bb.9:
	mov	w1, #12
	bl	_RING_SPACE
	cbnz	w0, LBB0_17
; %bb.10:
	add	w25, w27, w25
Lloh21:
	adrp	x8, _NV11_SUBCHAN_DMA_SEMAPHORE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _NV11_SUBCHAN_DMA_SEMAPHORE@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x24
	mov	w1, #0
	mov	w3, #1
	bl	_BEGIN_NV04
	ldr	w1, [x24]
	mov	x0, x24
	bl	_OUT_RING
Lloh24:
	adrp	x27, _NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH@GOTPAGE
Lloh25:
	ldr	x27, [x27, _NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH@GOTPAGEOFF]
	ldr	w2, [x27]
	mov	x0, x24
	mov	w1, #0
	mov	w3, #4
	bl	_BEGIN_NV04
	eor	w26, w25, #0x10
	mov	x0, x26
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x24
	bl	_OUT_RING
	mov	x0, x26
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x24
	bl	_OUT_RING
	ldr	w8, [x19, #4]
	add	w1, w8, #1
	mov	x0, x24
	bl	_OUT_RING
Lloh26:
	adrp	x8, _NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG@GOTPAGE
Lloh27:
	ldr	x8, [x8, _NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x24
	bl	_OUT_RING
	ldr	w2, [x27]
	mov	x0, x24
	mov	w1, #0
	mov	w3, #4
	bl	_BEGIN_NV04
	mov	x0, x25
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x24
	bl	_OUT_RING
	mov	x0, x25
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x24
	bl	_OUT_RING
	ldr	w1, [x19, #4]
	mov	x0, x24
	bl	_OUT_RING
Lloh29:
	adrp	x8, _NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	b	LBB0_13
LBB0_11:
	mov	w1, #10
	bl	_RING_SPACE
	cbnz	w0, LBB0_17
; %bb.12:
	add	w25, w27, w25
Lloh32:
	adrp	x27, _NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH@GOTPAGE
Lloh33:
	ldr	x27, [x27, _NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH@GOTPAGEOFF]
	ldr	w2, [x27]
	mov	x0, x24
	mov	w1, #0
	mov	w3, #4
	bl	_BEGIN_NVC0
	eor	w26, w25, #0x10
	mov	x0, x26
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x24
	bl	_OUT_RING
	mov	x0, x26
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x24
	bl	_OUT_RING
	ldr	w8, [x19, #4]
	add	w1, w8, #1
	mov	x0, x24
	bl	_OUT_RING
Lloh34:
	adrp	x8, _NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG@GOTPAGE
Lloh35:
	ldr	x8, [x8, _NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
Lloh37:
	adrp	x26, _NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD@GOTPAGE
Lloh38:
	ldr	x26, [x26, _NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD@GOTPAGEOFF]
	ldr	w9, [x26]
	orr	w1, w9, w8
	mov	x0, x24
	bl	_OUT_RING
	ldr	w2, [x27]
	mov	x0, x24
	mov	w1, #0
	mov	w3, #4
	bl	_BEGIN_NVC0
	mov	x0, x25
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x24
	bl	_OUT_RING
	mov	x0, x25
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x24
	bl	_OUT_RING
	ldr	w1, [x19, #4]
	mov	x0, x24
	bl	_OUT_RING
Lloh39:
	adrp	x8, _NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL@GOTPAGE
Lloh40:
	ldr	x8, [x8, _NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	ldr	w9, [x26]
	orr	w1, w9, w8
LBB0_13:
	mov	x0, x24
	bl	_OUT_RING
	ldr	d0, [x19]
	movi.2s	v1, #16
	eor.8b	v1, v0, v1
	movi.2s	v2, #1
	add.2s	v0, v0, v2
	mov.s	v1[1], v0[1]
	str	d1, [x19]
	mov	x0, x24
	bl	_FIRE_RING
LBB0_14:
	mov	x0, x22
	mov	w1, #256
	mov	w2, #1
	bl	_evo_mthd
	mov	x0, x22
	mov	w1, #-131072
	bl	_evo_data
	mov	x0, x22
	mov	w1, #132
	mov	w2, #1
	bl	_evo_mthd
	mov	x0, x22
	mov	x1, x23
	bl	_evo_data
	tbnz	w23, #8, LBB0_16
; %bb.15:
	mov	x0, x22
	mov	w1, #224
	mov	w2, #1
	bl	_evo_mthd
	mov	x0, x22
	mov	w1, #1073741824
	bl	_evo_data
LBB0_16:
	mov	x0, x22
	mov	w1, #136
	mov	w2, #4
	bl	_evo_mthd
	ldr	w1, [x19]
	mov	x0, x22
	bl	_evo_data
	ldr	w1, [x19, #4]
	add	w8, w1, #1
	str	w8, [x19, #4]
	mov	x0, x22
	bl	_evo_data
	ldr	w1, [x19, #4]
	mov	x0, x22
	bl	_evo_data
Lloh42:
	adrp	x8, _NvEvoSync@GOTPAGE
Lloh43:
	ldr	x8, [x8, _NvEvoSync@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
	mov	x0, x22
	bl	_evo_data
	mov	x0, x22
	mov	w1, #160
	mov	w2, #2
	bl	_evo_mthd
	mov	x0, x22
	mov	w1, #0
	bl	_evo_data
	mov	x0, x22
	mov	w1, #0
	bl	_evo_data
	mov	x0, x22
	mov	w1, #192
	mov	w2, #1
	bl	_evo_mthd
	ldr	w1, [x20]
	mov	x0, x22
	bl	_evo_data
	mov	x0, x22
	mov	w1, #272
	mov	w2, #2
	bl	_evo_mthd
	mov	x0, x22
	mov	w1, #0
	bl	_evo_data
	mov	x0, x22
	mov	w1, #0
	bl	_evo_data
	mov	x0, x19
	bl	_nv50_vers
Lloh45:
	adrp	x8, _NVD0_DISP_SYNC_CLASS@GOTPAGE
Lloh46:
	ldr	x8, [x8, _NVD0_DISP_SYNC_CLASS@GOTPAGEOFF]
Lloh47:
	ldr	x8, [x8]
	cmp	x0, x8
	mov	w8, #1024
	mov	w9, #2048
	csel	w1, w9, w8, lt
	mov	x0, x22
	mov	w2, #5
	bl	_evo_mthd
	ldr	x8, [x20, #16]
	ldr	w8, [x8]
	asr	w1, w8, #8
	mov	x0, x22
	bl	_evo_data
	mov	x0, x22
	mov	w1, #0
	bl	_evo_data
	ldp	w8, w9, [x21]
	orr	w1, w9, w8, lsl #16
	mov	x0, x22
	bl	_evo_data
	ldr	w1, [x20, #4]
	mov	x0, x22
	bl	_evo_data
	ldr	w1, [x20, #8]
	mov	x0, x22
	bl	_evo_data
	mov	x0, x22
	mov	w1, #128
	mov	w2, #1
	bl	_evo_mthd
	mov	x0, x22
	mov	w1, #0
	bl	_evo_data
	mov	x0, x22
	mov	x1, x19
	bl	_evo_kick
	mov	w0, #0
LBB0_17:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.cfi_endproc
                                        ; -- End function
	.comm	_EBUSY,4,2                      ; @EBUSY
	.comm	_NV84_CHANNEL_IND_CLASS,8,3     ; @NV84_CHANNEL_IND_CLASS
	.comm	_NV11_SUBCHAN_DMA_SEMAPHORE,4,2 ; @NV11_SUBCHAN_DMA_SEMAPHORE
	.comm	_NvEvoSema0,4,2                 ; @NvEvoSema0
	.comm	_NV11_SUBCHAN_SEMAPHORE_RELEASE,4,2 ; @NV11_SUBCHAN_SEMAPHORE_RELEASE
	.comm	_NV11_SUBCHAN_SEMAPHORE_OFFSET,4,2 ; @NV11_SUBCHAN_SEMAPHORE_OFFSET
	.comm	_NVC0_CHANNEL_IND_CLASS,8,3     ; @NVC0_CHANNEL_IND_CLASS
	.comm	_NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH,4,2 ; @NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH
	.comm	_NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG,4,2 ; @NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG
	.comm	_NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL,4,2 ; @NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL
	.comm	_NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD,4,2 ; @NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD
	.comm	_NvEvoSync,4,2                  ; @NvEvoSync
	.comm	_NVD0_DISP_SYNC_CLASS,8,3       ; @NVD0_DISP_SYNC_CLASS
.subsections_via_symbols
