	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_enable_asle              ## -- Begin function intel_enable_asle
	.p2align	4, 0x90
_intel_enable_asle:                     ## @intel_enable_asle
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %r14
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	je	LBB0_1
## %bb.6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	%r14, %rdi
	callq	_spin_lock_irqsave
	movq	%rbx, %rdi
	callq	_HAS_PCH_SPLIT
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	movq	_DE_GSE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_ironlake_enable_display_irq
	jmp	LBB0_5
LBB0_3:
	movq	_PIPE_LEGACY_BLC_EVENT_ENABLE@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_i915_enable_pipestat
	movq	%rbx, %rdi
	callq	_INTEL_INFO
	cmpl	$4, (%rax)
	jl	LBB0_5
## %bb.4:
	movl	(%r15), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_i915_enable_pipestat
LBB0_5:
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_spin_unlock_irqrestore         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DE_GSE,4,2                     ## @DE_GSE
	.comm	_PIPE_LEGACY_BLC_EVENT_ENABLE,4,2 ## @PIPE_LEGACY_BLC_EVENT_ENABLE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_enable_asle              ; -- Begin function intel_enable_asle
	.p2align	2
_intel_enable_asle:                     ; @intel_enable_asle
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	ldr	x19, [x0]
	bl	_IS_VALLEYVIEW
	cbz	x0, LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_2:
	mov	x0, x19
	bl	_spin_lock_irqsave
	mov	x0, x20
	bl	_HAS_PCH_SPLIT
	cbz	x0, LBB0_4
; %bb.3:
Lloh0:
	adrp	x8, _DE_GSE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DE_GSE@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ironlake_enable_display_irq
	b	LBB0_6
LBB0_4:
Lloh3:
	adrp	x21, _PIPE_LEGACY_BLC_EVENT_ENABLE@GOTPAGE
Lloh4:
	ldr	x21, [x21, _PIPE_LEGACY_BLC_EVENT_ENABLE@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	mov	w1, #1
	bl	_i915_enable_pipestat
	mov	x0, x20
	bl	_INTEL_INFO
	ldr	w8, [x0]
	cmp	w8, #4
	b.lt	LBB0_6
; %bb.5:
	ldr	w2, [x21]
	mov	x0, x19
	mov	w1, #0
	bl	_i915_enable_pipestat
LBB0_6:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_spin_unlock_irqrestore
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_DE_GSE,4,2                     ; @DE_GSE
	.comm	_PIPE_LEGACY_BLC_EVENT_ENABLE,4,2 ; @PIPE_LEGACY_BLC_EVENT_ENABLE
.subsections_via_symbols
