	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function PWM_FREQ_TO_REG
_PWM_FREQ_TO_REG:                       ## @PWM_FREQ_TO_REG
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	%esi, %eax
	movl	$10, %edx
	cmpl	$27500, %edi                    ## imm = 0x6B6C
	jg	LBB0_11
## %bb.1:
	movl	$11, %edx
	cmpl	$22500, %edi                    ## imm = 0x57E4
	jg	LBB0_11
## %bb.2:
	movq	_PWM_FREQ@GOTPCREL(%rip), %rcx
	movq	(%rcx), %r8
	movl	32(%r8), %esi
	movl	36(%r8), %ecx
	leal	(%rcx,%rsi), %edx
	incl	%edx
                                        ## kill: def $ecx killed $ecx killed $rcx def $rcx
	addl	%esi, %ecx
	shrl	$31, %edx
	addl	%edx, %ecx
	incl	%ecx
	sarl	%ecx
	movl	$9, %edx
	cmpl	%edi, %ecx
	jl	LBB0_11
## %bb.3:
	movl	28(%r8), %ecx
	movl	%esi, %edx
	addl	%ecx, %edx
	addl	%ecx, %esi
	incl	%esi
	shrl	$31, %esi
	addl	%edx, %esi
	incl	%esi
	sarl	%esi
	movl	$8, %edx
	cmpl	%edi, %esi
	jl	LBB0_11
## %bb.4:
	movl	24(%r8), %esi
	movl	%ecx, %edx
	addl	%esi, %edx
	addl	%esi, %ecx
	incl	%ecx
	shrl	$31, %ecx
	addl	%edx, %ecx
	incl	%ecx
	sarl	%ecx
	movl	$7, %edx
	cmpl	%edi, %ecx
	jl	LBB0_11
## %bb.5:
	movl	20(%r8), %ecx
	movl	%esi, %edx
	addl	%ecx, %edx
	addl	%ecx, %esi
	incl	%esi
	shrl	$31, %esi
	addl	%edx, %esi
	incl	%esi
	sarl	%esi
	movl	$6, %edx
	cmpl	%edi, %esi
	jl	LBB0_11
## %bb.6:
	movl	16(%r8), %esi
	movl	%ecx, %edx
	addl	%esi, %edx
	addl	%esi, %ecx
	incl	%ecx
	shrl	$31, %ecx
	addl	%edx, %ecx
	incl	%ecx
	sarl	%ecx
	movl	$5, %edx
	cmpl	%edi, %ecx
	jl	LBB0_11
## %bb.7:
	movl	12(%r8), %ecx
	movl	%esi, %edx
	addl	%ecx, %edx
	addl	%ecx, %esi
	incl	%esi
	shrl	$31, %esi
	addl	%edx, %esi
	incl	%esi
	sarl	%esi
	movl	$4, %edx
	cmpl	%edi, %esi
	jl	LBB0_11
## %bb.8:
	movl	8(%r8), %esi
	movl	%ecx, %edx
	addl	%esi, %edx
	addl	%esi, %ecx
	incl	%ecx
	shrl	$31, %ecx
	addl	%edx, %ecx
	incl	%ecx
	sarl	%ecx
	movl	$3, %edx
	cmpl	%edi, %ecx
	jl	LBB0_11
## %bb.9:
	movl	4(%r8), %ecx
	movl	%esi, %edx
	addl	%ecx, %edx
	addl	%ecx, %esi
	incl	%esi
	shrl	$31, %esi
	addl	%edx, %esi
	incl	%esi
	sarl	%esi
	movl	$2, %edx
	cmpl	%edi, %esi
	jl	LBB0_11
## %bb.10:
	movl	(%r8), %edx
	movl	%ecx, %esi
	addl	%edx, %esi
	addl	%edx, %ecx
	incl	%ecx
	shrl	$31, %ecx
	addl	%esi, %ecx
	incl	%ecx
	sarl	%ecx
	xorl	%edx, %edx
	cmpl	%edi, %ecx
	setl	%dl
LBB0_11:
	andl	$240, %eax
	orl	%edx, %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PWM_FREQ,8,3                   ## @PWM_FREQ
	.no_dead_strip	_PWM_FREQ_TO_REG
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function PWM_FREQ_TO_REG
_PWM_FREQ_TO_REG:                       ; @PWM_FREQ_TO_REG
	.cfi_startproc
; %bb.0:
	mov	w8, #27500
	cmp	w0, w8
	b.le	LBB0_2
; %bb.1:
	mov	w8, #10
	b	LBB0_21
LBB0_2:
	mov	w8, #22500
	cmp	w0, w8
	b.le	LBB0_4
; %bb.3:
	mov	w8, #11
	b	LBB0_21
LBB0_4:
Lloh0:
	adrp	x8, _PWM_FREQ@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PWM_FREQ@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	ldp	w9, w10, [x8, #32]
	add	w10, w10, w9
	add	w11, w10, #1
	add	w12, w10, #2
	cmp	w11, #0
	csinc	w10, w12, w10, lt
	cmp	w0, w10, asr #1
	b.le	LBB0_6
; %bb.5:
	mov	w8, #9
	b	LBB0_21
LBB0_6:
	ldr	w10, [x8, #28]
	add	w9, w9, w10
	add	w11, w9, #1
	add	w12, w9, #2
	cmp	w11, #0
	csinc	w9, w12, w9, lt
	cmp	w0, w9, asr #1
	b.le	LBB0_8
; %bb.7:
	mov	w8, #8
	b	LBB0_21
LBB0_8:
	ldr	w9, [x8, #24]
	add	w10, w10, w9
	add	w11, w10, #1
	add	w12, w10, #2
	cmp	w11, #0
	csinc	w10, w12, w10, lt
	cmp	w0, w10, asr #1
	b.le	LBB0_10
; %bb.9:
	mov	w8, #7
	b	LBB0_21
LBB0_10:
	ldr	w10, [x8, #20]
	add	w9, w9, w10
	add	w11, w9, #1
	add	w12, w9, #2
	cmp	w11, #0
	csinc	w9, w12, w9, lt
	cmp	w0, w9, asr #1
	b.le	LBB0_12
; %bb.11:
	mov	w8, #6
	b	LBB0_21
LBB0_12:
	ldr	w9, [x8, #16]
	add	w10, w10, w9
	add	w11, w10, #1
	add	w12, w10, #2
	cmp	w11, #0
	csinc	w10, w12, w10, lt
	cmp	w0, w10, asr #1
	b.le	LBB0_14
; %bb.13:
	mov	w8, #5
	b	LBB0_21
LBB0_14:
	ldr	w10, [x8, #12]
	add	w9, w9, w10
	add	w11, w9, #1
	add	w12, w9, #2
	cmp	w11, #0
	csinc	w9, w12, w9, lt
	cmp	w0, w9, asr #1
	b.le	LBB0_16
; %bb.15:
	mov	w8, #4
	b	LBB0_21
LBB0_16:
	ldr	w9, [x8, #8]
	add	w10, w10, w9
	add	w11, w10, #1
	add	w12, w10, #2
	cmp	w11, #0
	csinc	w10, w12, w10, lt
	cmp	w0, w10, asr #1
	b.le	LBB0_18
; %bb.17:
	mov	w8, #3
	b	LBB0_21
LBB0_18:
	ldr	w10, [x8, #4]
	add	w9, w9, w10
	add	w11, w9, #1
	add	w12, w9, #2
	cmp	w11, #0
	csinc	w9, w12, w9, lt
	cmp	w0, w9, asr #1
	b.le	LBB0_20
; %bb.19:
	mov	w8, #2
	b	LBB0_21
LBB0_20:
	ldr	w8, [x8]
	add	w8, w10, w8
	add	w9, w8, #1
	add	w10, w8, #2
	cmp	w9, #0
	csinc	w8, w10, w8, lt
	cmp	w0, w8, asr #1
	cset	w8, gt
LBB0_21:
	and	w9, w1, #0xf0
	orr	w0, w8, w9
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PWM_FREQ,8,3                   ; @PWM_FREQ
	.no_dead_strip	_PWM_FREQ_TO_REG
.subsections_via_symbols
