	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv515_mc_stop                  ## -- Begin function rv515_mc_stop
	.p2align	4, 0x90
_rv515_mc_stop:                         ## @rv515_mc_stop
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movq	_R_000300_VGA_RENDER_CONTROL@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	callq	_RREG32
	movl	%eax, (%rbx)
	movq	_R_000328_VGA_HDP_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_RREG32
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movl	%eax, 4(%rbx)
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	cmpl	$0, (%r15)
	jle	LBB0_11
## %bb.1:
	xorl	%r13d, %r13d
	movq	_AVIVO_D1CRTC_CONTROL@GOTPCREL(%rip), %rbx
	movq	_crtc_offsets@GOTPCREL(%rip), %r12
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	_crtc_offsets@GOTPCREL(%rip), %r12
	movq	(%r12), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_AVIVO_D1CRTC_UPDATE_LOCK@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	movl	$1, %esi
	callq	_WREG32
	movq	(%r12), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_AVIVO_D1CRTC_CONTROL@GOTPCREL(%rip), %rbx
	addq	(%rbx), %rdi
	callq	_RREG32
	movq	_AVIVO_CRTC_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	(%r12), %rax
	movq	(%rax,%r13,8), %rdi
	addq	(%rbx), %rdi
	callq	_WREG32
	movq	(%r12), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_AVIVO_D1CRTC_UPDATE_LOCK@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	addq	8(%rax), %r14
	movq	%r14, %rcx
LBB0_10:                                ##   in Loop: Header=BB0_2 Depth=1
	movl	$0, (%rcx)
	incq	%r13
	movslq	(%r15), %rax
	cmpq	%rax, %r13
	jge	LBB0_11
LBB0_2:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_7 Depth 2
	movq	(%r12), %rax
	movq	(%rax,%r13,8), %rdi
	addq	(%rbx), %rdi
	callq	_RREG32
	leaq	(,%r13,4), %r14
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movq	8(%rcx), %rcx
	addq	%r14, %rcx
	movq	_AVIVO_CRTC_EN@GOTPCREL(%rip), %rdx
	testl	%eax, (%rdx)
	je	LBB0_10
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	$1, (%rcx)
	movq	(%r12), %rax
	movq	(%rax,%r13,8), %rdi
	addq	(%rbx), %rdi
	callq	_RREG32
	movl	%eax, %r12d
	movq	_AVIVO_CRTC_DISP_READ_REQUEST_DISABLE@GOTPCREL(%rip), %rax
	testl	%r12d, (%rax)
	jne	LBB0_5
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_radeon_wait_for_vblank
	movq	_crtc_offsets@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_AVIVO_D1CRTC_UPDATE_LOCK@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	movl	$1, %esi
	callq	_WREG32
	movq	_AVIVO_CRTC_DISP_READ_REQUEST_DISABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movq	_crtc_offsets@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%rax,%r13,8), %rdi
	addq	(%rbx), %rdi
	movl	%r12d, %esi
	callq	_WREG32
	movq	_crtc_offsets@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_AVIVO_D1CRTC_UPDATE_LOCK@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
LBB0_5:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_radeon_get_vblank_counter
	cmpl	$0, 4(%r15)
	jle	LBB0_9
## %bb.6:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	%eax, %r12d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_7:                                 ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_radeon_get_vblank_counter
	cmpl	%r12d, %eax
	jne	LBB0_9
## %bb.8:                               ##   in Loop: Header=BB0_7 Depth=2
	movl	$1, %edi
	callq	_udelay
	incl	%ebx
	cmpl	4(%r15), %ebx
	jl	LBB0_7
	jmp	LBB0_9
LBB0_11:
	movq	%r15, %rdi
	callq	_radeon_mc_wait_for_idle
	movq	8(%r15), %rax
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_20
## %bb.12:
	movq	_CHIP_RV770@GOTPCREL(%rip), %r14
	cmpq	(%r14), %rax
	jge	LBB0_13
## %bb.14:
	movq	_R600_CITF_CNTL@GOTPCREL(%rip), %rax
	jmp	LBB0_15
LBB0_13:
	movq	_R700_MC_CITF_CNTL@GOTPCREL(%rip), %rax
LBB0_15:
	movq	(%rax), %rdi
	callq	_RREG32
	movl	%eax, %ebx
	movq	_R600_BLACKOUT_MASK@GOTPCREL(%rip), %r12
	notl	%eax
	testl	%eax, (%r12)
	je	LBB0_20
## %bb.16:
	movq	_R600_BIF_FB_EN@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	orl	(%r12), %ebx
	movq	8(%r15), %rax
	cmpq	(%r14), %rax
	jge	LBB0_17
## %bb.18:
	movq	_R600_CITF_CNTL@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_17:
	movq	_R700_MC_CITF_CNTL@GOTPCREL(%rip), %rax
LBB0_19:
	movq	(%rax), %rdi
	movl	%ebx, %esi
	callq	_WREG32
LBB0_20:
	movl	$100, %edi
	callq	_udelay
	cmpl	$0, (%r15)
	jle	LBB0_28
## %bb.21:
	xorl	%ebx, %ebx
	movq	_AVIVO_D1GRPH_UPDATE@GOTPCREL(%rip), %r14
	movq	_crtc_offsets@GOTPCREL(%rip), %r12
	movq	_AVIVO_D1MODE_MASTER_UPDATE_LOCK@GOTPCREL(%rip), %r13
	jmp	LBB0_22
	.p2align	4, 0x90
LBB0_27:                                ##   in Loop: Header=BB0_22 Depth=1
	incq	%rbx
	movslq	(%r15), %rax
	cmpq	%rax, %rbx
	jge	LBB0_28
LBB0_22:                                ## =>This Inner Loop Header: Depth=1
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	8(%rax), %rax
	cmpl	$0, (%rax,%rbx,4)
	je	LBB0_27
## %bb.23:                              ##   in Loop: Header=BB0_22 Depth=1
	movq	(%r12), %rax
	movq	(%rax,%rbx,8), %rdi
	addq	(%r14), %rdi
	callq	_RREG32
	movq	_AVIVO_D1GRPH_UPDATE_LOCK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	testl	%eax, %esi
	jne	LBB0_25
## %bb.24:                              ##   in Loop: Header=BB0_22 Depth=1
	orl	%eax, %esi
	movq	(%r12), %rax
	movq	(%rax,%rbx,8), %rdi
	addq	(%r14), %rdi
	callq	_WREG32
LBB0_25:                                ##   in Loop: Header=BB0_22 Depth=1
	movq	(%r12), %rax
	movq	(%rax,%rbx,8), %rdi
	addq	(%r13), %rdi
	callq	_RREG32
	testb	$1, %al
	jne	LBB0_27
## %bb.26:                              ##   in Loop: Header=BB0_22 Depth=1
	orl	$1, %eax
	movq	(%r12), %rcx
	movq	(%rcx,%rbx,8), %rdi
	addq	(%r13), %rdi
	movl	%eax, %esi
	callq	_WREG32
	jmp	LBB0_27
LBB0_28:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_R_000300_VGA_RENDER_CONTROL,8,3 ## @R_000300_VGA_RENDER_CONTROL
	.comm	_R_000328_VGA_HDP_CONTROL,8,3   ## @R_000328_VGA_HDP_CONTROL
	.comm	_AVIVO_D1CRTC_CONTROL,8,3       ## @AVIVO_D1CRTC_CONTROL
	.comm	_crtc_offsets,8,3               ## @crtc_offsets
	.comm	_AVIVO_CRTC_EN,4,2              ## @AVIVO_CRTC_EN
	.comm	_AVIVO_CRTC_DISP_READ_REQUEST_DISABLE,4,2 ## @AVIVO_CRTC_DISP_READ_REQUEST_DISABLE
	.comm	_AVIVO_D1CRTC_UPDATE_LOCK,8,3   ## @AVIVO_D1CRTC_UPDATE_LOCK
	.comm	_CHIP_R600,8,3                  ## @CHIP_R600
	.comm	_CHIP_RV770,8,3                 ## @CHIP_RV770
	.comm	_R700_MC_CITF_CNTL,8,3          ## @R700_MC_CITF_CNTL
	.comm	_R600_CITF_CNTL,8,3             ## @R600_CITF_CNTL
	.comm	_R600_BLACKOUT_MASK,4,2         ## @R600_BLACKOUT_MASK
	.comm	_R600_BIF_FB_EN,8,3             ## @R600_BIF_FB_EN
	.comm	_AVIVO_D1GRPH_UPDATE,8,3        ## @AVIVO_D1GRPH_UPDATE
	.comm	_AVIVO_D1GRPH_UPDATE_LOCK,4,2   ## @AVIVO_D1GRPH_UPDATE_LOCK
	.comm	_AVIVO_D1MODE_MASTER_UPDATE_LOCK,8,3 ## @AVIVO_D1MODE_MASTER_UPDATE_LOCK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv515_mc_stop                  ; -- Begin function rv515_mc_stop
	.p2align	2
_rv515_mc_stop:                         ; @rv515_mc_stop
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x21, _R_000300_VGA_RENDER_CONTROL@GOTPAGE
Lloh1:
	ldr	x21, [x21, _R_000300_VGA_RENDER_CONTROL@GOTPAGEOFF]
	ldr	x0, [x21]
	bl	_RREG32
	str	w0, [x19]
Lloh2:
	adrp	x8, _R_000328_VGA_HDP_CONTROL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _R_000328_VGA_HDP_CONTROL@GOTPAGEOFF]
Lloh4:
	ldr	x0, [x8]
	bl	_RREG32
	str	w0, [x19, #4]
	ldr	x0, [x21]
	mov	w1, #0
	bl	_WREG32
	ldr	w8, [x20]
Lloh5:
	adrp	x23, _crtc_offsets@GOTPAGE
Lloh6:
	ldr	x23, [x23, _crtc_offsets@GOTPAGEOFF]
	cmp	w8, #1
	b.lt	LBB0_11
; %bb.1:
	mov	x21, #0
Lloh7:
	adrp	x24, _AVIVO_D1CRTC_CONTROL@GOTPAGE
Lloh8:
	ldr	x24, [x24, _AVIVO_D1CRTC_CONTROL@GOTPAGEOFF]
Lloh9:
	adrp	x25, _AVIVO_CRTC_EN@GOTPAGE
Lloh10:
	ldr	x25, [x25, _AVIVO_CRTC_EN@GOTPAGEOFF]
Lloh11:
	adrp	x28, _AVIVO_D1CRTC_UPDATE_LOCK@GOTPAGE
Lloh12:
	ldr	x28, [x28, _AVIVO_D1CRTC_UPDATE_LOCK@GOTPAGEOFF]
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	x8, [x28]
	ldr	x9, [x23]
	ldr	x9, [x9, x26]
	add	x0, x9, x8
	mov	w1, #1
	bl	_WREG32
	ldr	x8, [x24]
	ldr	x9, [x23]
	ldr	x9, [x9, x26]
	add	x0, x9, x8
	bl	_RREG32
	ldr	w8, [x25]
	bic	w1, w0, w8
	ldr	x8, [x24]
	ldr	x9, [x23]
	ldr	x9, [x9, x26]
	add	x0, x9, x8
	bl	_WREG32
	ldr	x8, [x28]
	ldr	x9, [x23]
	ldr	x9, [x9, x26]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	ldr	x8, [x19, #8]
	add	x8, x8, x21, lsl #2
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	str	wzr, [x8]
	add	x21, x21, #1
	ldrsw	x8, [x20]
	cmp	x21, x8
	b.ge	LBB0_11
LBB0_4:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_9 Depth 2
	ldr	x8, [x24]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_RREG32
	ldr	w9, [x25]
	ldr	x8, [x19, #8]
	add	x8, x8, x21, lsl #2
	tst	w9, w0
	b.eq	LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	w9, #1
	str	w9, [x8]
	ldr	x8, [x24]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_RREG32
Lloh13:
	adrp	x8, _AVIVO_CRTC_DISP_READ_REQUEST_DISABLE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _AVIVO_CRTC_DISP_READ_REQUEST_DISABLE@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	lsl	x26, x21, #3
	tst	w8, w0
	b.ne	LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	x22, x0
	mov	x0, x20
	mov	x1, x21
	bl	_radeon_wait_for_vblank
	ldr	x8, [x28]
	ldr	x9, [x23]
	ldr	x9, [x9, x26]
	add	x0, x9, x8
	mov	w1, #1
	bl	_WREG32
Lloh16:
	adrp	x8, _AVIVO_CRTC_DISP_READ_REQUEST_DISABLE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _AVIVO_CRTC_DISP_READ_REQUEST_DISABLE@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	orr	w1, w8, w22
	ldr	x8, [x24]
	ldr	x9, [x23]
	ldr	x9, [x9, x26]
	add	x0, x9, x8
	bl	_WREG32
	ldr	x8, [x28]
	ldr	x9, [x23]
	ldr	x9, [x9, x26]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
LBB0_7:                                 ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x20
	mov	x1, x21
	bl	_radeon_get_vblank_counter
	ldr	w8, [x20, #4]
	cmp	w8, #1
	b.lt	LBB0_2
; %bb.8:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	x22, x0
	mov	w27, #0
LBB0_9:                                 ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	mov	x0, x20
	mov	x1, x21
	bl	_radeon_get_vblank_counter
	cmp	w0, w22
	b.ne	LBB0_2
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=2
	mov	w0, #1
	bl	_udelay
	add	w27, w27, #1
	ldr	w8, [x20, #4]
	cmp	w27, w8
	b.lt	LBB0_9
	b	LBB0_2
LBB0_11:
	mov	x0, x20
	bl	_radeon_mc_wait_for_idle
	ldr	x8, [x20, #8]
Lloh19:
	adrp	x9, _CHIP_R600@GOTPAGE
Lloh20:
	ldr	x9, [x9, _CHIP_R600@GOTPAGEOFF]
Lloh21:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_14
; %bb.12:
Lloh22:
	adrp	x22, _CHIP_RV770@GOTPAGE
Lloh23:
	ldr	x22, [x22, _CHIP_RV770@GOTPAGEOFF]
Lloh24:
	adrp	x24, _R600_CITF_CNTL@GOTPAGE
Lloh25:
	ldr	x24, [x24, _R600_CITF_CNTL@GOTPAGEOFF]
	ldr	x9, [x22]
Lloh26:
	adrp	x25, _R700_MC_CITF_CNTL@GOTPAGE
Lloh27:
	ldr	x25, [x25, _R700_MC_CITF_CNTL@GOTPAGEOFF]
	cmp	x8, x9
	csel	x8, x24, x25, lt
	ldr	x0, [x8]
	bl	_RREG32
Lloh28:
	adrp	x26, _R600_BLACKOUT_MASK@GOTPAGE
Lloh29:
	ldr	x26, [x26, _R600_BLACKOUT_MASK@GOTPAGEOFF]
	ldr	w8, [x26]
	bics	wzr, w8, w0
	b.eq	LBB0_14
; %bb.13:
	mov	x21, x0
Lloh30:
	adrp	x8, _R600_BIF_FB_EN@GOTPAGE
Lloh31:
	ldr	x8, [x8, _R600_BIF_FB_EN@GOTPAGEOFF]
Lloh32:
	ldr	x0, [x8]
	mov	w1, #0
	bl	_WREG32
	ldr	w8, [x26]
	orr	w1, w8, w21
	ldr	x8, [x20, #8]
	ldr	x9, [x22]
	cmp	x8, x9
	csel	x8, x24, x25, lt
	ldr	x0, [x8]
	bl	_WREG32
LBB0_14:
	mov	w0, #100
	bl	_udelay
	ldr	w8, [x20]
	cmp	w8, #1
	b.lt	LBB0_22
; %bb.15:
	mov	x21, #0
Lloh33:
	adrp	x22, _AVIVO_D1GRPH_UPDATE@GOTPAGE
Lloh34:
	ldr	x22, [x22, _AVIVO_D1GRPH_UPDATE@GOTPAGEOFF]
Lloh35:
	adrp	x24, _AVIVO_D1GRPH_UPDATE_LOCK@GOTPAGE
Lloh36:
	ldr	x24, [x24, _AVIVO_D1GRPH_UPDATE_LOCK@GOTPAGEOFF]
Lloh37:
	adrp	x25, _AVIVO_D1MODE_MASTER_UPDATE_LOCK@GOTPAGE
Lloh38:
	ldr	x25, [x25, _AVIVO_D1MODE_MASTER_UPDATE_LOCK@GOTPAGEOFF]
	b	LBB0_17
LBB0_16:                                ;   in Loop: Header=BB0_17 Depth=1
	add	x21, x21, #1
	ldrsw	x8, [x20]
	cmp	x21, x8
	b.ge	LBB0_22
LBB0_17:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #8]
	ldr	w8, [x8, x21, lsl #2]
	cbz	w8, LBB0_16
; %bb.18:                               ;   in Loop: Header=BB0_17 Depth=1
	ldr	x8, [x22]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_RREG32
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_17 Depth=1
	orr	w1, w8, w0
	ldr	x8, [x22]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_WREG32
LBB0_20:                                ;   in Loop: Header=BB0_17 Depth=1
	ldr	x8, [x25]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_RREG32
	tbnz	w0, #0, LBB0_16
; %bb.21:                               ;   in Loop: Header=BB0_17 Depth=1
	orr	w1, w0, #0x1
	ldr	x8, [x25]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_WREG32
	b	LBB0_16
LBB0_22:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh33, Lloh34
	.cfi_endproc
                                        ; -- End function
	.comm	_R_000300_VGA_RENDER_CONTROL,8,3 ; @R_000300_VGA_RENDER_CONTROL
	.comm	_R_000328_VGA_HDP_CONTROL,8,3   ; @R_000328_VGA_HDP_CONTROL
	.comm	_AVIVO_D1CRTC_CONTROL,8,3       ; @AVIVO_D1CRTC_CONTROL
	.comm	_crtc_offsets,8,3               ; @crtc_offsets
	.comm	_AVIVO_CRTC_EN,4,2              ; @AVIVO_CRTC_EN
	.comm	_AVIVO_CRTC_DISP_READ_REQUEST_DISABLE,4,2 ; @AVIVO_CRTC_DISP_READ_REQUEST_DISABLE
	.comm	_AVIVO_D1CRTC_UPDATE_LOCK,8,3   ; @AVIVO_D1CRTC_UPDATE_LOCK
	.comm	_CHIP_R600,8,3                  ; @CHIP_R600
	.comm	_CHIP_RV770,8,3                 ; @CHIP_RV770
	.comm	_R700_MC_CITF_CNTL,8,3          ; @R700_MC_CITF_CNTL
	.comm	_R600_CITF_CNTL,8,3             ; @R600_CITF_CNTL
	.comm	_R600_BLACKOUT_MASK,4,2         ; @R600_BLACKOUT_MASK
	.comm	_R600_BIF_FB_EN,8,3             ; @R600_BIF_FB_EN
	.comm	_AVIVO_D1GRPH_UPDATE,8,3        ; @AVIVO_D1GRPH_UPDATE
	.comm	_AVIVO_D1GRPH_UPDATE_LOCK,4,2   ; @AVIVO_D1GRPH_UPDATE_LOCK
	.comm	_AVIVO_D1MODE_MASTER_UPDATE_LOCK,8,3 ; @AVIVO_D1MODE_MASTER_UPDATE_LOCK
.subsections_via_symbols
