	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function init_chipset_via82cxxx
_init_chipset_via82cxxx:                ## @init_chipset_via82cxxx
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_pci_get_drvdata
	movq	(%rax), %rbx
	movq	(%rbx), %r15
	movq	_VIA_UDMA_TIMING@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	leaq	-40(%rbp), %rdx
	movq	%r14, %rdi
	callq	_pci_read_config_dword
	movl	-40(%rbp), %esi
	movq	%rbx, %rdi
	callq	_via_cable_detect
	movq	(%r15), %rax
	movq	_ATA_UDMA4@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_2
## %bb.1:
	movl	(%r12), %esi
	movl	$524296, %edx                   ## imm = 0x80008
	orl	-40(%rbp), %edx
	jmp	LBB0_4
LBB0_2:
	movq	_VIA_BAD_CLK66@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%r15)
	je	LBB0_5
## %bb.3:
	movl	(%r12), %esi
	movl	$-524297, %edx                  ## imm = 0xFFF7FFF7
	andl	-40(%rbp), %edx
LBB0_4:
	movq	%r14, %rdi
	callq	_pci_write_config_dword
LBB0_5:
	movq	_VIA_IDE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	movq	%r14, %rdi
	callq	_pci_read_config_byte
	movq	_VIA_FIFO_CONFIG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	leaq	-36(%rbp), %rdx
	movq	%r14, %rdi
	callq	_pci_read_config_byte
	movl	8(%r15), %eax
	movq	_VIA_BAD_PREQ@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_7
## %bb.6:
	andl	$127, -36(%rbp)
LBB0_7:
	movq	_VIA_SET_FIFO@GOTPCREL(%rip), %rcx
	movl	-36(%rbp), %edx
	testl	%eax, (%rcx)
	je	LBB0_13
## %bb.8:
	andl	$159, %edx
	movl	%edx, -36(%rbp)
	movl	-44(%rbp), %eax
	andl	$3, %eax
	cmpl	$3, %eax
	je	LBB0_11
## %bb.9:
	cmpl	$1, %eax
	jne	LBB0_13
## %bb.10:
	orl	$96, %edx
	jmp	LBB0_12
LBB0_11:
	orl	$32, %edx
LBB0_12:
	movl	%edx, -36(%rbp)
LBB0_13:
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_pci_write_config_byte
	xorl	%eax, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VIA_UDMA_TIMING,4,2            ## @VIA_UDMA_TIMING
	.comm	_ATA_UDMA4,8,3                  ## @ATA_UDMA4
	.comm	_VIA_BAD_CLK66,4,2              ## @VIA_BAD_CLK66
	.comm	_VIA_IDE_ENABLE,4,2             ## @VIA_IDE_ENABLE
	.comm	_VIA_FIFO_CONFIG,4,2            ## @VIA_FIFO_CONFIG
	.comm	_VIA_BAD_PREQ,4,2               ## @VIA_BAD_PREQ
	.comm	_VIA_SET_FIFO,4,2               ## @VIA_SET_FIFO
	.no_dead_strip	_init_chipset_via82cxxx
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function init_chipset_via82cxxx
_init_chipset_via82cxxx:                ; @init_chipset_via82cxxx
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_pci_get_drvdata
	ldr	x20, [x0]
	ldr	x21, [x20]
Lloh0:
	adrp	x22, _VIA_UDMA_TIMING@GOTPAGE
Lloh1:
	ldr	x22, [x22, _VIA_UDMA_TIMING@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x2, sp, #4
	mov	x0, x19
	bl	_pci_read_config_dword
	ldr	w1, [sp, #4]
	mov	x0, x20
	bl	_via_cable_detect
	ldr	x8, [x21]
Lloh2:
	adrp	x9, _ATA_UDMA4@GOTPAGE
Lloh3:
	ldr	x9, [x9, _ATA_UDMA4@GOTPAGEOFF]
Lloh4:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	ldr	w1, [x22]
	ldr	w8, [sp, #4]
	orr	w2, w8, #0x80008
	b	LBB0_4
LBB0_2:
	ldr	w8, [x21, #8]
Lloh5:
	adrp	x9, _VIA_BAD_CLK66@GOTPAGE
Lloh6:
	ldr	x9, [x9, _VIA_BAD_CLK66@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_5
; %bb.3:
	ldr	w1, [x22]
	ldr	w8, [sp, #4]
	and	w2, w8, #0xfff7fff7
LBB0_4:
	mov	x0, x19
	bl	_pci_write_config_dword
LBB0_5:
Lloh8:
	adrp	x8, _VIA_IDE_ENABLE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _VIA_IDE_ENABLE@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	add	x2, sp, #8
	mov	x0, x19
	bl	_pci_read_config_byte
Lloh11:
	adrp	x20, _VIA_FIFO_CONFIG@GOTPAGE
Lloh12:
	ldr	x20, [x20, _VIA_FIFO_CONFIG@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	mov	x0, x19
	bl	_pci_read_config_byte
	ldr	w8, [x21, #8]
Lloh13:
	adrp	x9, _VIA_BAD_PREQ@GOTPAGE
Lloh14:
	ldr	x9, [x9, _VIA_BAD_PREQ@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_7
; %bb.6:
	ldr	w9, [sp, #12]
	and	w9, w9, #0x7f
	str	w9, [sp, #12]
LBB0_7:
Lloh16:
	adrp	x9, _VIA_SET_FIFO@GOTPAGE
Lloh17:
	ldr	x9, [x9, _VIA_SET_FIFO@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	ldr	w2, [sp, #12]
	tst	w9, w8
	b.eq	LBB0_13
; %bb.8:
	mov	w8, #159
	and	w2, w2, w8
	str	w2, [sp, #12]
	ldr	w8, [sp, #8]
	and	w8, w8, #0x3
	cmp	w8, #3
	b.eq	LBB0_11
; %bb.9:
	cmp	w8, #1
	b.ne	LBB0_13
; %bb.10:
	orr	w2, w2, #0x60
	b	LBB0_12
LBB0_11:
	orr	w2, w2, #0x20
LBB0_12:
	str	w2, [sp, #12]
LBB0_13:
	ldr	w1, [x20]
	mov	x0, x19
	bl	_pci_write_config_byte
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.comm	_VIA_UDMA_TIMING,4,2            ; @VIA_UDMA_TIMING
	.comm	_ATA_UDMA4,8,3                  ; @ATA_UDMA4
	.comm	_VIA_BAD_CLK66,4,2              ; @VIA_BAD_CLK66
	.comm	_VIA_IDE_ENABLE,4,2             ; @VIA_IDE_ENABLE
	.comm	_VIA_FIFO_CONFIG,4,2            ; @VIA_FIFO_CONFIG
	.comm	_VIA_BAD_PREQ,4,2               ; @VIA_BAD_PREQ
	.comm	_VIA_SET_FIFO,4,2               ; @VIA_SET_FIFO
	.no_dead_strip	_init_chipset_via82cxxx
.subsections_via_symbols
