	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_afmt_init
_radeon_afmt_init:                      ## @radeon_afmt_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_RADEON_MAX_AFMT_BLOCKS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	testl	%edx, %edx
	jle	LBB0_7
## %bb.1:
	leaq	-1(%rdx), %rcx
	movl	%edx, %eax
	andl	$3, %eax
	cmpq	$3, %rcx
	jae	LBB0_3
## %bb.2:
	xorl	%ecx, %ecx
	jmp	LBB0_5
LBB0_3:
	andl	$-4, %edx
	xorl	%ecx, %ecx
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%rbx), %rsi
	movq	$0, (%rsi,%rcx,8)
	movq	8(%rbx), %rsi
	movq	$0, 8(%rsi,%rcx,8)
	movq	8(%rbx), %rsi
	movq	$0, 16(%rsi,%rcx,8)
	movq	8(%rbx), %rsi
	movq	$0, 24(%rsi,%rcx,8)
	addq	$4, %rcx
	cmpq	%rcx, %rdx
	jne	LBB0_4
LBB0_5:
	testq	%rax, %rax
	je	LBB0_7
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%rbx), %rdx
	movq	$0, (%rdx,%rcx,8)
	incq	%rcx
	decq	%rax
	jne	LBB0_6
LBB0_7:
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE6
	testq	%rax, %rax
	je	LBB0_8
LBB0_34:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_8:
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE4
	testq	%rax, %rax
	je	LBB0_22
## %bb.9:
	movq	_GFP_KERNEL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%rbx), %rcx
	movq	%rax, (%rcx)
	movq	8(%rbx), %rax
	movq	(%rax), %rax
	testq	%rax, %rax
	je	LBB0_11
## %bb.10:
	movq	_EVERGREEN_CRTC0_REGISTER_OFFSET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 4(%rax)
	movl	$0, (%rax)
LBB0_11:
	movl	(%r14), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%rbx), %rcx
	movq	%rax, 8(%rcx)
	movq	8(%rbx), %rax
	movq	8(%rax), %rax
	testq	%rax, %rax
	je	LBB0_13
## %bb.12:
	movq	_EVERGREEN_CRTC1_REGISTER_OFFSET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 4(%rax)
	movl	$1, (%rax)
LBB0_13:
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE41
	testl	%eax, %eax
	jne	LBB0_34
## %bb.14:
	movl	(%r14), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%rbx), %rcx
	movq	%rax, 16(%rcx)
	movq	8(%rbx), %rax
	movq	16(%rax), %rax
	testq	%rax, %rax
	je	LBB0_16
## %bb.15:
	movq	_EVERGREEN_CRTC2_REGISTER_OFFSET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 4(%rax)
	movl	$2, (%rax)
LBB0_16:
	movl	(%r14), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%rbx), %rcx
	movq	%rax, 24(%rcx)
	movq	8(%rbx), %rax
	movq	24(%rax), %rax
	testq	%rax, %rax
	je	LBB0_18
## %bb.17:
	movq	_EVERGREEN_CRTC3_REGISTER_OFFSET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 4(%rax)
	movl	$3, (%rax)
LBB0_18:
	movl	(%r14), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%rbx), %rcx
	movq	%rax, 32(%rcx)
	movq	8(%rbx), %rax
	movq	32(%rax), %rax
	testq	%rax, %rax
	je	LBB0_20
## %bb.19:
	movq	_EVERGREEN_CRTC4_REGISTER_OFFSET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 4(%rax)
	movl	$4, (%rax)
LBB0_20:
	movl	(%r14), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%rbx), %rcx
	movq	%rax, 40(%rcx)
	movq	8(%rbx), %rax
	movq	40(%rax), %rax
	testq	%rax, %rax
	je	LBB0_34
## %bb.21:
	movl	$5, %ecx
	movq	_EVERGREEN_CRTC5_REGISTER_OFFSET@GOTPCREL(%rip), %rdx
	jmp	LBB0_33
LBB0_22:
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE3
	testq	%rax, %rax
	je	LBB0_27
## %bb.23:
	movq	_GFP_KERNEL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%rbx), %rcx
	movq	%rax, (%rcx)
	movq	8(%rbx), %rax
	movq	(%rax), %rax
	testq	%rax, %rax
	je	LBB0_25
## %bb.24:
	movq	_DCE3_HDMI_OFFSET0@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 4(%rax)
	movl	$0, (%rax)
LBB0_25:
	movl	(%r14), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%rbx), %rcx
	movq	%rax, 8(%rcx)
	movq	8(%rbx), %rax
	movq	8(%rax), %rax
	testq	%rax, %rax
	je	LBB0_34
## %bb.26:
	movl	$1, %ecx
	movq	_DCE3_HDMI_OFFSET1@GOTPCREL(%rip), %rdx
LBB0_33:
	movl	(%rdx), %edx
	movl	%edx, 4(%rax)
	movl	%ecx, (%rax)
	jmp	LBB0_34
LBB0_27:
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE2
	testq	%rax, %rax
	je	LBB0_34
## %bb.28:
	movq	_GFP_KERNEL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%rbx), %rcx
	movq	%rax, (%rcx)
	movq	8(%rbx), %rax
	movq	(%rax), %rax
	testq	%rax, %rax
	je	LBB0_30
## %bb.29:
	movq	_DCE2_HDMI_OFFSET0@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 4(%rax)
	movl	$0, (%rax)
LBB0_30:
	movq	(%rbx), %rax
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_34
## %bb.31:
	movl	(%r14), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%rbx), %rcx
	movq	%rax, 8(%rcx)
	movq	8(%rbx), %rax
	movq	8(%rax), %rax
	testq	%rax, %rax
	je	LBB0_34
## %bb.32:
	movl	$1, %ecx
	movq	_DCE2_HDMI_OFFSET1@GOTPCREL(%rip), %rdx
	jmp	LBB0_33
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_MAX_AFMT_BLOCKS,4,2     ## @RADEON_MAX_AFMT_BLOCKS
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_EVERGREEN_CRTC0_REGISTER_OFFSET,4,2 ## @EVERGREEN_CRTC0_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC1_REGISTER_OFFSET,4,2 ## @EVERGREEN_CRTC1_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC2_REGISTER_OFFSET,4,2 ## @EVERGREEN_CRTC2_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC3_REGISTER_OFFSET,4,2 ## @EVERGREEN_CRTC3_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC4_REGISTER_OFFSET,4,2 ## @EVERGREEN_CRTC4_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC5_REGISTER_OFFSET,4,2 ## @EVERGREEN_CRTC5_REGISTER_OFFSET
	.comm	_DCE3_HDMI_OFFSET0,4,2          ## @DCE3_HDMI_OFFSET0
	.comm	_DCE3_HDMI_OFFSET1,4,2          ## @DCE3_HDMI_OFFSET1
	.comm	_DCE2_HDMI_OFFSET0,4,2          ## @DCE2_HDMI_OFFSET0
	.comm	_CHIP_R600,8,3                  ## @CHIP_R600
	.comm	_DCE2_HDMI_OFFSET1,4,2          ## @DCE2_HDMI_OFFSET1
	.no_dead_strip	_radeon_afmt_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_afmt_init
_radeon_afmt_init:                      ; @radeon_afmt_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _RADEON_MAX_AFMT_BLOCKS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_MAX_AFMT_BLOCKS@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x8, #0
	lsl	x9, x9, #3
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x10, [x19, #8]
	str	xzr, [x10, x8]
	add	x8, x8, #8
	cmp	x9, x8
	b.ne	LBB0_2
LBB0_3:
	mov	x0, x19
	bl	_ASIC_IS_DCE6
	cbz	x0, LBB0_5
LBB0_4:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_5:
	mov	x0, x19
	bl	_ASIC_IS_DCE4
	cbz	x0, LBB0_19
; %bb.6:
Lloh3:
	adrp	x20, _GFP_KERNEL@GOTPAGE
Lloh4:
	ldr	x20, [x20, _GFP_KERNEL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	cbz	x8, LBB0_8
; %bb.7:
Lloh5:
	adrp	x9, _EVERGREEN_CRTC0_REGISTER_OFFSET@GOTPAGE
Lloh6:
	ldr	x9, [x9, _EVERGREEN_CRTC0_REGISTER_OFFSET@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	stp	wzr, w9, [x8]
LBB0_8:
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_10
; %bb.9:
Lloh8:
	adrp	x9, _EVERGREEN_CRTC1_REGISTER_OFFSET@GOTPAGE
Lloh9:
	ldr	x9, [x9, _EVERGREEN_CRTC1_REGISTER_OFFSET@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	mov	w10, #1
	stp	w10, w9, [x8]
LBB0_10:
	mov	x0, x19
	bl	_ASIC_IS_DCE41
	cbnz	w0, LBB0_4
; %bb.11:
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #16]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #16]
	cbz	x8, LBB0_13
; %bb.12:
Lloh11:
	adrp	x9, _EVERGREEN_CRTC2_REGISTER_OFFSET@GOTPAGE
Lloh12:
	ldr	x9, [x9, _EVERGREEN_CRTC2_REGISTER_OFFSET@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	mov	w10, #2
	stp	w10, w9, [x8]
LBB0_13:
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #24]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #24]
	cbz	x8, LBB0_15
; %bb.14:
Lloh14:
	adrp	x9, _EVERGREEN_CRTC3_REGISTER_OFFSET@GOTPAGE
Lloh15:
	ldr	x9, [x9, _EVERGREEN_CRTC3_REGISTER_OFFSET@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	mov	w10, #3
	stp	w10, w9, [x8]
LBB0_15:
	ldr	w1, [x20]
	mov	w21, #4
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #32]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #32]
	cbz	x8, LBB0_17
; %bb.16:
Lloh17:
	adrp	x9, _EVERGREEN_CRTC4_REGISTER_OFFSET@GOTPAGE
Lloh18:
	ldr	x9, [x9, _EVERGREEN_CRTC4_REGISTER_OFFSET@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	stp	w21, w9, [x8]
LBB0_17:
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #40]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #40]
	cbz	x8, LBB0_4
; %bb.18:
	mov	w9, #5
Lloh20:
	adrp	x10, _EVERGREEN_CRTC5_REGISTER_OFFSET@GOTPAGE
Lloh21:
	ldr	x10, [x10, _EVERGREEN_CRTC5_REGISTER_OFFSET@GOTPAGEOFF]
	b	LBB0_24
LBB0_19:
	mov	x0, x19
	bl	_ASIC_IS_DCE3
	cbz	x0, LBB0_25
; %bb.20:
Lloh22:
	adrp	x20, _GFP_KERNEL@GOTPAGE
Lloh23:
	ldr	x20, [x20, _GFP_KERNEL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	cbz	x8, LBB0_22
; %bb.21:
Lloh24:
	adrp	x9, _DCE3_HDMI_OFFSET0@GOTPAGE
Lloh25:
	ldr	x9, [x9, _DCE3_HDMI_OFFSET0@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	stp	wzr, w9, [x8]
LBB0_22:
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_4
; %bb.23:
	mov	w9, #1
Lloh27:
	adrp	x10, _DCE3_HDMI_OFFSET1@GOTPAGE
Lloh28:
	ldr	x10, [x10, _DCE3_HDMI_OFFSET1@GOTPAGEOFF]
LBB0_24:
	ldr	w10, [x10]
	stp	w9, w10, [x8]
	b	LBB0_4
LBB0_25:
	mov	x0, x19
	bl	_ASIC_IS_DCE2
	cbz	x0, LBB0_4
; %bb.26:
Lloh29:
	adrp	x20, _GFP_KERNEL@GOTPAGE
Lloh30:
	ldr	x20, [x20, _GFP_KERNEL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	cbz	x8, LBB0_28
; %bb.27:
Lloh31:
	adrp	x9, _DCE2_HDMI_OFFSET0@GOTPAGE
Lloh32:
	ldr	x9, [x9, _DCE2_HDMI_OFFSET0@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	stp	wzr, w9, [x8]
LBB0_28:
	ldr	x8, [x19]
Lloh34:
	adrp	x9, _CHIP_R600@GOTPAGE
Lloh35:
	ldr	x9, [x9, _CHIP_R600@GOTPAGEOFF]
Lloh36:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_4
; %bb.29:
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_4
; %bb.30:
	mov	w9, #1
Lloh37:
	adrp	x10, _DCE2_HDMI_OFFSET1@GOTPAGE
Lloh38:
	ldr	x10, [x10, _DCE2_HDMI_OFFSET1@GOTPAGEOFF]
	b	LBB0_24
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh37, Lloh38
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_MAX_AFMT_BLOCKS,4,2     ; @RADEON_MAX_AFMT_BLOCKS
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_EVERGREEN_CRTC0_REGISTER_OFFSET,4,2 ; @EVERGREEN_CRTC0_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC1_REGISTER_OFFSET,4,2 ; @EVERGREEN_CRTC1_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC2_REGISTER_OFFSET,4,2 ; @EVERGREEN_CRTC2_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC3_REGISTER_OFFSET,4,2 ; @EVERGREEN_CRTC3_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC4_REGISTER_OFFSET,4,2 ; @EVERGREEN_CRTC4_REGISTER_OFFSET
	.comm	_EVERGREEN_CRTC5_REGISTER_OFFSET,4,2 ; @EVERGREEN_CRTC5_REGISTER_OFFSET
	.comm	_DCE3_HDMI_OFFSET0,4,2          ; @DCE3_HDMI_OFFSET0
	.comm	_DCE3_HDMI_OFFSET1,4,2          ; @DCE3_HDMI_OFFSET1
	.comm	_DCE2_HDMI_OFFSET0,4,2          ; @DCE2_HDMI_OFFSET0
	.comm	_CHIP_R600,8,3                  ; @CHIP_R600
	.comm	_DCE2_HDMI_OFFSET1,4,2          ; @DCE2_HDMI_OFFSET1
	.no_dead_strip	_radeon_afmt_init
.subsections_via_symbols
