	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_pm_get_dynpm_state        ## -- Begin function r600_pm_get_dynpm_state
	.p2align	4, 0x90
_r600_pm_get_dynpm_state:               ## @r600_pm_get_dynpm_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	.cfi_offset %rbx, -24
	movabsq	$4294967297, %rax               ## imm = 0x100000001
	movq	%rax, 16(%rdi)
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rdi)
	jne	LBB0_2
## %bb.1:
	movq	8(%rdi), %rax
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_6
LBB0_2:
	movl	24(%rdi), %r10d
	movl	28(%rdi), %edx
	xorl	%ecx, %ecx
	cmpl	$3, %r10d
	setge	%al
	addl	$-128, %edx
	cmpl	$4, %edx
	ja	LBB0_18
## %bb.3:
	movb	%al, %cl
	leaq	LJTI0_1(%rip), %rax
	movslq	(%rax,%rdx,4), %rdx
	addq	%rax, %rdx
	jmpq	*%rdx
LBB0_4:
	movl	48(%rdi), %ecx
	leal	-1(%r10), %esi
	cmpl	%esi, %ecx
	jne	LBB0_24
## %bb.5:
	movl	%ecx, 32(%rdi)
	movl	$0, 16(%rdi)
	jmp	LBB0_36
LBB0_6:
	movl	52(%rdi), %r8d
	movl	$1, %r9d
	cmpl	$2, %r8d
	jl	LBB0_14
## %bb.7:
	movl	24(%rdi), %ecx
	xorl	%r9d, %r9d
	cmpl	$2, %ecx
	jl	LBB0_14
## %bb.8:
	movq	72(%rdi), %rsi
	movq	_RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_POWER_STATE_TYPE_PERFORMANCE@GOTPCREL(%rip), %rax
	movq	(%rax), %r10
	movq	_POWER_STATE_TYPE_BATTERY@GOTPCREL(%rip), %rax
	movq	(%rax), %r11
	addq	$48, %rsi
	movl	$1, %eax
	jmp	LBB0_10
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_10 Depth=1
	incq	%rax
	addq	$40, %rsi
	cmpq	%rax, %rcx
	je	LBB0_14
LBB0_10:                                ## =>This Inner Loop Header: Depth=1
	testl	%edx, -8(%rsi)
	jne	LBB0_9
## %bb.11:                              ##   in Loop: Header=BB0_10 Depth=1
	movq	(%rsi), %rbx
	cmpq	%r10, %rbx
	je	LBB0_13
## %bb.12:                              ##   in Loop: Header=BB0_10 Depth=1
	cmpq	%r11, %rbx
	jne	LBB0_9
LBB0_13:
	movl	%eax, %r9d
LBB0_14:
	movl	%r9d, 32(%rdi)
	movl	28(%rdi), %eax
	addl	$-128, %eax
	cmpl	$4, %eax
	ja	LBB0_18
## %bb.15:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_16:
	cmpl	48(%rdi), %r9d
	jne	LBB0_46
## %bb.17:
	movq	64(%rdi), %rcx
	movq	72(%rdi), %rax
	movslq	%r9d, %rdx
	leaq	(%rdx,%rdx,4), %rdx
	movslq	32(%rax,%rdx,8), %rax
	decq	%rax
	cmpq	%rax, %rcx
	jne	LBB0_45
	jmp	LBB0_47
LBB0_18:
	leaq	L_.str(%rip), %rdi
	popq	%rbx
	popq	%rbp
	jmp	_DRM_ERROR                      ## TAILCALL
LBB0_19:
	movl	56(%rdi), %eax
	movl	%eax, 32(%rdi)
	movq	$0, 40(%rdi)
	movl	$0, 16(%rdi)
	jmp	LBB0_56
LBB0_20:
	movl	%ecx, 32(%rdi)
LBB0_21:
	movq	$0, 40(%rdi)
	movl	$0, 20(%rdi)
	jmp	LBB0_56
LBB0_22:
	movl	48(%rdi), %r9d
	cmpl	%ecx, %r9d
	jne	LBB0_29
## %bb.23:
	movl	%ecx, 32(%rdi)
	movl	$0, 20(%rdi)
	movl	52(%rdi), %r8d
	jmp	LBB0_53
LBB0_24:
	cmpl	$2, 52(%rdi)
	jl	LBB0_34
## %bb.25:
	testl	%r10d, %r10d
	jle	LBB0_36
## %bb.26:
	movq	_RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%esi, %eax
	leaq	(%rax,%rax,4), %rsi
	shlq	$3, %rsi
	addq	72(%rdi), %rsi
	.p2align	4, 0x90
LBB0_27:                                ## =>This Inner Loop Header: Depth=1
	testl	%edx, (%rsi)
	je	LBB0_58
## %bb.28:                              ##   in Loop: Header=BB0_27 Depth=1
	leaq	-1(%rax), %rbx
	addq	$-40, %rsi
	testq	%rax, %rax
	movq	%rbx, %rax
	jg	LBB0_27
	jmp	LBB0_36
LBB0_29:
	movl	52(%rdi), %r8d
	cmpl	$2, %r8d
	jl	LBB0_37
## %bb.30:
	testl	%r10d, %r10d
	jle	LBB0_48
## %bb.31:
	movq	72(%rdi), %rcx
	movq	_RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	.p2align	4, 0x90
LBB0_32:                                ## =>This Inner Loop Header: Depth=1
	testl	%edx, (%rcx)
	je	LBB0_50
## %bb.33:                              ##   in Loop: Header=BB0_32 Depth=1
	incq	%rsi
	addq	$40, %rcx
	cmpq	%rsi, %r10
	jne	LBB0_32
	jmp	LBB0_53
LBB0_34:
	incl	%ecx
LBB0_35:
	movl	%ecx, 32(%rdi)
LBB0_36:
	movq	$0, 40(%rdi)
	jmp	LBB0_56
LBB0_37:
	testl	%r9d, %r9d
	je	LBB0_49
## %bb.38:
	decl	%r9d
	jmp	LBB0_52
LBB0_39:
	cmpl	48(%rdi), %r9d
	jne	LBB0_42
## %bb.40:
	movq	64(%rdi), %rcx
	testq	%rcx, %rcx
	je	LBB0_42
## %bb.41:
	decq	%rcx
	movq	%rcx, 40(%rdi)
	jmp	LBB0_43
LBB0_42:
	movq	$0, 40(%rdi)
	movl	$0, 20(%rdi)
	xorl	%ecx, %ecx
LBB0_43:
	testl	%r8d, %r8d
	jle	LBB0_57
## %bb.44:
	movq	72(%rdi), %rax
	movslq	%r9d, %rdx
	leaq	(%rdx,%rdx,4), %rdx
	movq	24(%rax,%rdx,8), %rax
	leaq	(%rcx,%rcx,2), %rdx
	movq	_RADEON_PM_MODE_NO_DISPLAY@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	testl	%esi, (%rax,%rdx,4)
	je	LBB0_57
LBB0_45:
	incq	%rcx
	movq	%rcx, 40(%rdi)
	jmp	LBB0_57
LBB0_46:
	movq	72(%rdi), %rax
	movslq	%r9d, %rcx
	leaq	(%rcx,%rcx,4), %rcx
	movslq	32(%rax,%rcx,8), %rcx
	decq	%rcx
LBB0_47:
	movq	%rcx, 40(%rdi)
	movl	$0, 16(%rdi)
	jmp	LBB0_57
LBB0_48:
	movq	$0, 40(%rdi)
	jmp	LBB0_54
LBB0_49:
	decl	%r10d
	movl	%r10d, 32(%rdi)
	jmp	LBB0_53
LBB0_50:
	cmpl	%esi, %r9d
	jle	LBB0_52
## %bb.51:
	movl	%esi, 32(%rdi)
	jmp	LBB0_53
LBB0_52:
	movl	%r9d, 32(%rdi)
LBB0_53:
	movq	$0, 40(%rdi)
	testl	%r8d, %r8d
	jle	LBB0_56
LBB0_54:
	movq	72(%rdi), %rcx
	movslq	32(%rdi), %rax
	leaq	(%rax,%rax,4), %rdx
	movq	24(%rcx,%rdx,8), %rcx
	movq	_RADEON_PM_MODE_NO_DISPLAY@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	testl	%edx, (%rcx)
	je	LBB0_56
## %bb.55:
	incl	%eax
	movl	%eax, 32(%rdi)
LBB0_56:
	xorl	%ecx, %ecx
LBB0_57:
	movq	72(%rdi), %rax
	movslq	32(%rdi), %rdx
	leaq	(%rdx,%rdx,4), %rdi
	movq	24(%rax,%rdi,8), %rsi
	leaq	(%rcx,%rcx,2), %rcx
	movl	4(%rsi,%rcx,4), %edx
	movl	8(%rsi,%rcx,4), %esi
	movl	16(%rax,%rdi,8), %ecx
	leaq	L_.str.1(%rip), %rdi
	popq	%rbx
	popq	%rbp
	jmp	_DRM_DEBUG_DRIVER               ## TAILCALL
LBB0_58:
	cmpl	%eax, %ecx
	jge	LBB0_35
## %bb.59:
	movl	%eax, 32(%rdi)
	jmp	LBB0_36
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_21, LBB0_21-LJTI0_0
.set L0_0_set_39, LBB0_39-LJTI0_0
.set L0_0_set_19, LBB0_19-LJTI0_0
LJTI0_0:
	.long	L0_0_set_16
	.long	L0_0_set_18
	.long	L0_0_set_21
	.long	L0_0_set_39
	.long	L0_0_set_19
.set L0_1_set_4, LBB0_4-LJTI0_1
.set L0_1_set_18, LBB0_18-LJTI0_1
.set L0_1_set_20, LBB0_20-LJTI0_1
.set L0_1_set_22, LBB0_22-LJTI0_1
.set L0_1_set_19, LBB0_19-LJTI0_1
LJTI0_1:
	.long	L0_1_set_4
	.long	L0_1_set_18
	.long	L0_1_set_20
	.long	L0_1_set_22
	.long	L0_1_set_19
	.end_data_region
                                        ## -- End function
	.comm	_RADEON_IS_IGP,4,2              ## @RADEON_IS_IGP
	.comm	_CHIP_R600,8,3                  ## @CHIP_R600
	.comm	_RADEON_PM_STATE_SINGLE_DISPLAY_ONLY,4,2 ## @RADEON_PM_STATE_SINGLE_DISPLAY_ONLY
	.comm	_RADEON_PM_MODE_NO_DISPLAY,4,2  ## @RADEON_PM_MODE_NO_DISPLAY
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Requested mode for not defined action\n"

	.comm	_POWER_STATE_TYPE_PERFORMANCE,8,3 ## @POWER_STATE_TYPE_PERFORMANCE
	.comm	_POWER_STATE_TYPE_BATTERY,8,3   ## @POWER_STATE_TYPE_BATTERY
L_.str.1:                               ## @.str.1
	.asciz	"Requested: e: %d m: %d p: %d\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_pm_get_dynpm_state        ; -- Begin function r600_pm_get_dynpm_state
	.p2align	2
_r600_pm_get_dynpm_state:               ; @r600_pm_get_dynpm_state
	.cfi_startproc
; %bb.0:
	movi.2s	v0, #1
	str	d0, [x0, #16]
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _RADEON_IS_IGP@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_IS_IGP@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_2
; %bb.1:
	ldr	x8, [x0, #8]
Lloh3:
	adrp	x9, _CHIP_R600@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CHIP_R600@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_6
LBB0_2:
	ldp	w8, w10, [x0, #24]
	cmp	w8, #2
	cset	w9, gt
	sub	w10, w10, #128
	cmp	w10, #4
	b.hi	LBB0_28
; %bb.3:
Lloh6:
	adrp	x11, lJTI0_1@PAGE
Lloh7:
	add	x11, x11, lJTI0_1@PAGEOFF
	adr	x12, LBB0_4
	ldrb	w13, [x11, x10]
	add	x12, x12, x13, lsl #2
	br	x12
LBB0_4:
	ldr	w9, [x0, #48]
	sub	w10, w8, #1
	cmp	w9, w10
	b.ne	LBB0_17
; %bb.5:
	str	w9, [x0, #32]
	str	wzr, [x0, #16]
	b	LBB0_35
LBB0_6:
	ldr	w9, [x0, #52]
	cmp	w9, #2
	b.lt	LBB0_16
; %bb.7:
	ldr	w8, [x0, #24]
	cmp	w8, #2
	b.lt	LBB0_22
; %bb.8:
	ldr	x10, [x0, #72]
Lloh8:
	adrp	x11, _RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPAGE
Lloh9:
	ldr	x11, [x11, _RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPAGEOFF]
Lloh10:
	ldr	w11, [x11]
Lloh11:
	adrp	x12, _POWER_STATE_TYPE_PERFORMANCE@GOTPAGE
Lloh12:
	ldr	x12, [x12, _POWER_STATE_TYPE_PERFORMANCE@GOTPAGEOFF]
Lloh13:
	ldr	x12, [x12]
Lloh14:
	adrp	x13, _POWER_STATE_TYPE_BATTERY@GOTPAGE
Lloh15:
	ldr	x13, [x13, _POWER_STATE_TYPE_BATTERY@GOTPAGEOFF]
Lloh16:
	ldr	x13, [x13]
	add	x14, x10, #48
	mov	w10, #1
	b	LBB0_10
LBB0_9:                                 ;   in Loop: Header=BB0_10 Depth=1
	add	x10, x10, #1
	add	x14, x14, #40
	cmp	x8, x10
	b.eq	LBB0_22
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	ldur	w15, [x14, #-8]
	tst	w11, w15
	b.ne	LBB0_9
; %bb.11:                               ;   in Loop: Header=BB0_10 Depth=1
	ldr	x15, [x14]
	cmp	x15, x12
	ccmp	x15, x13, #4, ne
	b.ne	LBB0_9
	b	LBB0_23
LBB0_12:
	mov	x8, #0
	str	w9, [x0, #32]
LBB0_13:
	str	xzr, [x0, #40]
	str	wzr, [x0, #20]
	b	LBB0_56
LBB0_14:
	ldr	w10, [x0, #48]
	cmp	w10, w9
	b.ne	LBB0_29
; %bb.15:
	str	w9, [x0, #32]
	str	wzr, [x0, #20]
	ldr	w9, [x0, #52]
	b	LBB0_52
LBB0_16:
	mov	w10, #1
	b	LBB0_23
LBB0_17:
	ldr	w11, [x0, #52]
	cmp	w11, #2
	b.lt	LBB0_34
; %bb.18:
	cmp	w8, #1
	b.lt	LBB0_35
; %bb.19:
	ldr	x11, [x0, #72]
Lloh17:
	adrp	x8, _RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPAGE
Lloh18:
	ldr	x8, [x8, _RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	mov	w12, #40
	umaddl	x11, w10, w12, x11
LBB0_20:                                ; =>This Inner Loop Header: Depth=1
	ldr	w12, [x11]
	tst	w8, w12
	b.eq	LBB0_57
; %bb.21:                               ;   in Loop: Header=BB0_20 Depth=1
	sub	x12, x10, #1
	sub	x11, x11, #40
	cmp	x10, #0
	mov	x10, x12
	b.gt	LBB0_20
	b	LBB0_35
LBB0_22:
	mov	w10, #0
LBB0_23:
	str	w10, [x0, #32]
	ldr	w8, [x0, #28]
	sub	w8, w8, #128
	cmp	w8, #4
	b.hi	LBB0_28
; %bb.24:
Lloh20:
	adrp	x11, lJTI0_0@PAGE
Lloh21:
	add	x11, x11, lJTI0_0@PAGEOFF
	adr	x12, LBB0_25
	ldrb	w13, [x11, x8]
	add	x12, x12, x13, lsl #2
	br	x12
LBB0_25:
	ldr	w8, [x0, #48]
	cmp	w10, w8
	b.ne	LBB0_42
; %bb.26:
	ldp	x8, x9, [x0, #64]
	mov	w11, #40
	smaddl	x9, w10, w11, x9
	ldrsw	x9, [x9, #32]
	sub	x9, x9, #1
	cmp	x8, x9
	b.eq	LBB0_43
	b	LBB0_48
LBB0_27:
	mov	x8, #0
	ldr	w9, [x0, #56]
	str	w9, [x0, #32]
	str	xzr, [x0, #40]
	str	wzr, [x0, #16]
	b	LBB0_56
LBB0_28:
Lloh22:
	adrp	x0, l_.str@PAGE
Lloh23:
	add	x0, x0, l_.str@PAGEOFF
	b	_DRM_ERROR
LBB0_29:
	ldr	w9, [x0, #52]
	cmp	w9, #2
	b.lt	LBB0_36
; %bb.30:
	cmp	w8, #0
	b.le	LBB0_49
; %bb.31:
	mov	x11, #0
	ldr	x12, [x0, #72]
Lloh24:
	adrp	x13, _RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPAGE
Lloh25:
	ldr	x13, [x13, _RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPAGEOFF]
Lloh26:
	ldr	w13, [x13]
LBB0_32:                                ; =>This Inner Loop Header: Depth=1
	ldr	w14, [x12]
	tst	w13, w14
	b.eq	LBB0_59
; %bb.33:                               ;   in Loop: Header=BB0_32 Depth=1
	add	x11, x11, #1
	add	x12, x12, #40
	cmp	x8, x11
	b.ne	LBB0_32
	b	LBB0_52
LBB0_34:
	add	w8, w9, #1
	str	w8, [x0, #32]
LBB0_35:
	mov	x8, #0
	str	xzr, [x0, #40]
	b	LBB0_56
LBB0_36:
	cbz	w10, LBB0_50
; %bb.37:
	sub	w8, w10, #1
	b	LBB0_51
LBB0_38:
	mov	x8, #0
	b	LBB0_13
LBB0_39:
	ldr	w8, [x0, #48]
	cmp	w10, w8
	b.ne	LBB0_44
; %bb.40:
	ldr	x8, [x0, #64]
	cbz	x8, LBB0_45
; %bb.41:
	sub	x8, x8, #1
	str	x8, [x0, #40]
	b	LBB0_46
LBB0_42:
	ldr	x8, [x0, #72]
	mov	w9, #40
	smaddl	x8, w10, w9, x8
	ldrsw	x8, [x8, #32]
	sub	x8, x8, #1
LBB0_43:
	str	x8, [x0, #40]
	str	wzr, [x0, #16]
	b	LBB0_56
LBB0_44:
	mov	x8, #0
LBB0_45:
	str	xzr, [x0, #40]
	str	wzr, [x0, #20]
LBB0_46:
	cmp	w9, #1
	b.lt	LBB0_56
; %bb.47:
	ldr	x9, [x0, #72]
	mov	w11, #40
	smaddl	x9, w10, w11, x9
	ldr	x9, [x9, #24]
	mov	w10, #12
	mul	x10, x8, x10
	ldr	w9, [x9, x10]
Lloh27:
	adrp	x10, _RADEON_PM_MODE_NO_DISPLAY@GOTPAGE
Lloh28:
	ldr	x10, [x10, _RADEON_PM_MODE_NO_DISPLAY@GOTPAGEOFF]
Lloh29:
	ldr	w10, [x10]
	tst	w10, w9
	b.eq	LBB0_56
LBB0_48:
	add	x8, x8, #1
	str	x8, [x0, #40]
	b	LBB0_56
LBB0_49:
	str	xzr, [x0, #40]
	b	LBB0_53
LBB0_50:
	sub	w8, w8, #1
LBB0_51:
	str	w8, [x0, #32]
LBB0_52:
	str	xzr, [x0, #40]
	cmp	w9, #1
	b.lt	LBB0_55
LBB0_53:
	ldr	x8, [x0, #72]
	ldrsw	x9, [x0, #32]
	mov	w10, #40
	madd	x8, x9, x10, x8
	ldr	x8, [x8, #24]
	ldr	w8, [x8]
Lloh30:
	adrp	x10, _RADEON_PM_MODE_NO_DISPLAY@GOTPAGE
Lloh31:
	ldr	x10, [x10, _RADEON_PM_MODE_NO_DISPLAY@GOTPAGEOFF]
Lloh32:
	ldr	w10, [x10]
	tst	w10, w8
	b.eq	LBB0_55
; %bb.54:
	mov	x8, #0
	add	w9, w9, #1
	str	w9, [x0, #32]
	b	LBB0_56
LBB0_55:
	mov	x8, #0
LBB0_56:
	ldr	x9, [x0, #72]
	ldrsw	x10, [x0, #32]
	mov	w11, #40
	madd	x9, x10, x11, x9
	ldr	x10, [x9, #24]
	mov	w11, #12
	madd	x8, x8, x11, x10
	ldp	w2, w1, [x8, #4]
	ldr	w3, [x9, #16]
Lloh33:
	adrp	x0, l_.str.1@PAGE
Lloh34:
	add	x0, x0, l_.str.1@PAGEOFF
	b	_DRM_DEBUG_DRIVER
LBB0_57:
	cmp	w9, w10
	b.ge	LBB0_61
; %bb.58:
	str	w10, [x0, #32]
	b	LBB0_35
LBB0_59:
	cmp	w10, w11
	b.le	LBB0_62
; %bb.60:
	str	w11, [x0, #32]
	b	LBB0_52
LBB0_61:
	str	w9, [x0, #32]
	b	LBB0_35
LBB0_62:
	str	w10, [x0, #32]
	b	LBB0_52
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpAdd	Lloh33, Lloh34
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_25-LBB0_25)>>2
	.byte	(LBB0_28-LBB0_25)>>2
	.byte	(LBB0_38-LBB0_25)>>2
	.byte	(LBB0_39-LBB0_25)>>2
	.byte	(LBB0_27-LBB0_25)>>2
lJTI0_1:
	.byte	(LBB0_4-LBB0_4)>>2
	.byte	(LBB0_28-LBB0_4)>>2
	.byte	(LBB0_12-LBB0_4)>>2
	.byte	(LBB0_14-LBB0_4)>>2
	.byte	(LBB0_27-LBB0_4)>>2
                                        ; -- End function
	.comm	_RADEON_IS_IGP,4,2              ; @RADEON_IS_IGP
	.comm	_CHIP_R600,8,3                  ; @CHIP_R600
	.comm	_RADEON_PM_STATE_SINGLE_DISPLAY_ONLY,4,2 ; @RADEON_PM_STATE_SINGLE_DISPLAY_ONLY
	.comm	_RADEON_PM_MODE_NO_DISPLAY,4,2  ; @RADEON_PM_MODE_NO_DISPLAY
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Requested mode for not defined action\n"

	.comm	_POWER_STATE_TYPE_PERFORMANCE,8,3 ; @POWER_STATE_TYPE_PERFORMANCE
	.comm	_POWER_STATE_TYPE_BATTERY,8,3   ; @POWER_STATE_TYPE_BATTERY
l_.str.1:                               ; @.str.1
	.asciz	"Requested: e: %d m: %d p: %d\n"

.subsections_via_symbols
