	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_set_aer_mmd
_bnx2x_set_aer_mmd:                     ## @bnx2x_set_aer_mmd
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r12
	movq	8(%rdi), %r14
	movq	(%rsi), %rax
	movq	_PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT@GOTPCREL(%rip), %rcx
	movl	$14336, %ebx                    ## imm = 0x3800
	cmpq	(%rcx), %rax
	jne	LBB0_2
## %bb.1:
	movq	_PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	(%r12), %eax
	movq	_PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movl	8(%r15), %ecx
	leal	(%rax,%rcx), %ebx
	addl	$14336, %ebx                    ## imm = 0x3800
LBB0_2:
	movq	%r14, %rdi
	callq	_USES_WARPCORE
	testq	%rax, %rax
	je	LBB0_5
## %bb.3:
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_bnx2x_get_warpcore_lane
	movl	%eax, %ebx
	movq	_FLAGS_WC_DUAL_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 12(%r15)
	je	LBB0_6
## %bb.4:
	sarl	%ebx
	orl	$512, %ebx                      ## imm = 0x200
	jmp	LBB0_6
LBB0_5:
	movq	%r14, %rdi
	callq	_CHIP_IS_E2
	cmpq	$1, %rax
	adcl	$-1, %ebx
LBB0_6:
	movq	_MDIO_REG_BANK_AER_BLOCK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MDIO_AER_BLOCK_AER_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	%ebx, %r8d
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_CL22_WR_OVER_CL45              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK,4,2 ## @PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT,4,2 ## @PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT
	.comm	_PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT,8,3 ## @PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT
	.comm	_FLAGS_WC_DUAL_MODE,4,2         ## @FLAGS_WC_DUAL_MODE
	.comm	_MDIO_REG_BANK_AER_BLOCK,4,2    ## @MDIO_REG_BANK_AER_BLOCK
	.comm	_MDIO_AER_BLOCK_AER_REG,4,2     ## @MDIO_AER_BLOCK_AER_REG
	.no_dead_strip	_bnx2x_set_aer_mmd
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_set_aer_mmd
_bnx2x_set_aer_mmd:                     ; @bnx2x_set_aer_mmd
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x21, x0
	ldr	x20, [x0, #8]
	ldr	x8, [x1]
Lloh0:
	adrp	x9, _PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	mov	w22, #14336
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	ldr	w8, [x21]
Lloh3:
	adrp	x9, _PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
Lloh6:
	adrp	x10, _PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT@GOTPAGE
Lloh7:
	ldr	x10, [x10, _PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT@GOTPAGEOFF]
	and	w8, w9, w8
Lloh8:
	ldr	w9, [x10]
	asr	w8, w8, w9
	ldr	w9, [x19, #8]
	add	w8, w8, w9
	add	w22, w8, w22
LBB0_2:
	mov	x0, x20
	bl	_USES_WARPCORE
	cbz	x0, LBB0_4
; %bb.3:
	mov	x0, x19
	mov	x1, x21
	bl	_bnx2x_get_warpcore_lane
Lloh9:
	adrp	x8, _FLAGS_WC_DUAL_MODE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _FLAGS_WC_DUAL_MODE@GOTPAGEOFF]
	ldr	w9, [x19, #12]
Lloh11:
	ldr	w8, [x8]
	tst	w8, w9
	asr	w8, w0, #1
	orr	w8, w8, #0x200
	csel	w4, w0, w8, eq
	b	LBB0_5
LBB0_4:
	mov	x0, x20
	bl	_CHIP_IS_E2
	cmp	x0, #0
	cset	w8, ne
	sub	w4, w22, w8
LBB0_5:
Lloh12:
	adrp	x8, _MDIO_REG_BANK_AER_BLOCK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MDIO_REG_BANK_AER_BLOCK@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
Lloh15:
	adrp	x8, _MDIO_AER_BLOCK_AER_REG@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MDIO_AER_BLOCK_AER_REG@GOTPAGEOFF]
Lloh17:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_CL22_WR_OVER_CL45
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK,4,2 ; @PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK
	.comm	_PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT,4,2 ; @PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT
	.comm	_PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT,8,3 ; @PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT
	.comm	_FLAGS_WC_DUAL_MODE,4,2         ; @FLAGS_WC_DUAL_MODE
	.comm	_MDIO_REG_BANK_AER_BLOCK,4,2    ; @MDIO_REG_BANK_AER_BLOCK
	.comm	_MDIO_AER_BLOCK_AER_REG,4,2     ; @MDIO_AER_BLOCK_AER_REG
	.no_dead_strip	_bnx2x_set_aer_mmd
.subsections_via_symbols
