	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_cp_dispatch_flip        ## -- Begin function radeon_cp_dispatch_flip
	.p2align	4, 0x90
_radeon_cp_dispatch_flip:               ## @radeon_cp_dispatch_flip
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rbx
	movq	(%rsi), %r14
	movq	(%r14), %rax
	movq	8(%r14), %rcx
	movq	(%rcx), %r12
	movl	(%rax), %esi
	xorl	%eax, %eax
	cmpl	$1, %esi
	setne	%al
	movl	(%rbx,%rax,4), %r15d
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG
	cmpq	$0, 24(%rbx)
	je	LBB0_2
## %bb.1:
	movq	_RADEON_BOX_FLIP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 16(%rbx)
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_radeon_cp_performance_boxes
LBB0_2:
	movl	$6, %edi
	callq	_BEGIN_RING
	xorl	%eax, %eax
	callq	_RADEON_WAIT_UNTIL_3D_IDLE
	movq	_RADEON_CRTC_OFFSET@GOTPCREL(%rip), %rax
	movl	8(%rbx), %ecx
	imull	(%r12), %ecx
	movl	12(%rbx), %esi
	addl	$-2, %esi
	imull	4(%r12), %esi
	movl	(%rax), %edi
	addl	%ecx, %esi
	andl	$-8, %esi
	addl	%r15d, %esi
	callq	_OUT_RING_REG
	movq	_RADEON_CRTC2_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	(%r14), %rax
	addl	4(%rax), %r15d
	movl	%r15d, %esi
	callq	_OUT_RING_REG
	xorl	%eax, %eax
	callq	_ADVANCE_RING
	movq	(%r14), %rax
	incl	8(%rax)
	movl	$1, %ecx
	subl	(%rax), %ecx
	movl	%ecx, (%rax)
	movl	$2, %edi
	callq	_BEGIN_RING
	movq	(%r14), %rax
	movl	8(%rax), %edi
	callq	_RADEON_FRAME_AGE
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ADVANCE_RING                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RING_LOCALS,4,2                ## @RING_LOCALS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"pfCurrentPage=%d\n"

	.comm	_RADEON_BOX_FLIP,4,2            ## @RADEON_BOX_FLIP
	.comm	_RADEON_CRTC_OFFSET,4,2         ## @RADEON_CRTC_OFFSET
	.comm	_RADEON_CRTC2_OFFSET,4,2        ## @RADEON_CRTC2_OFFSET
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_cp_dispatch_flip        ; -- Begin function radeon_cp_dispatch_flip
	.p2align	2
_radeon_cp_dispatch_flip:               ; @radeon_cp_dispatch_flip
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x20, [x0]
	ldr	x19, [x1]
	ldp	x9, x8, [x19]
	ldr	x22, [x8]
	ldr	w1, [x9]
	cmp	w1, #1
	cset	w8, ne
	ldr	w21, [x20, w8, uxtw #2]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
	ldr	x8, [x20, #24]
	cbz	x8, LBB0_2
; %bb.1:
Lloh2:
	adrp	x8, _RADEON_BOX_FLIP@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RADEON_BOX_FLIP@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	ldr	w9, [x20, #16]
	orr	w8, w9, w8
	str	w8, [x20, #16]
	mov	x0, x20
	mov	x1, x19
	bl	_radeon_cp_performance_boxes
LBB0_2:
	mov	w0, #6
	bl	_BEGIN_RING
	bl	_RADEON_WAIT_UNTIL_3D_IDLE
Lloh5:
	adrp	x8, _RADEON_CRTC_OFFSET@GOTPAGE
Lloh6:
	ldr	x8, [x8, _RADEON_CRTC_OFFSET@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	ldp	w8, w9, [x22]
	ldp	w10, w11, [x20, #8]
	mul	w8, w10, w8
	sub	w10, w11, #2
	madd	w8, w10, w9, w8
	and	w8, w8, #0xfffffff8
	add	w1, w8, w21
	bl	_OUT_RING_REG
Lloh8:
	adrp	x8, _RADEON_CRTC2_OFFSET@GOTPAGE
Lloh9:
	ldr	x8, [x8, _RADEON_CRTC2_OFFSET@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	ldr	x8, [x19]
	ldr	w8, [x8, #4]
	add	w1, w8, w21
	bl	_OUT_RING_REG
	bl	_ADVANCE_RING
	ldr	x8, [x19]
	ldr	w9, [x8, #8]
	add	w9, w9, #1
	str	w9, [x8, #8]
	ldr	w9, [x8]
	mov	w10, #1
	sub	w9, w10, w9
	str	w9, [x8]
	mov	w0, #2
	bl	_BEGIN_RING
	ldr	x8, [x19]
	ldr	w0, [x8, #8]
	bl	_RADEON_FRAME_AGE
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_ADVANCE_RING
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_RING_LOCALS,4,2                ; @RING_LOCALS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"pfCurrentPage=%d\n"

	.comm	_RADEON_BOX_FLIP,4,2            ; @RADEON_BOX_FLIP
	.comm	_RADEON_CRTC_OFFSET,4,2         ; @RADEON_CRTC_OFFSET
	.comm	_RADEON_CRTC2_OFFSET,4,2        ; @RADEON_CRTC2_OFFSET
.subsections_via_symbols
