	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_nv04_identify                  ## -- Begin function nv04_identify
	.p2align	4, 0x90
_nv04_identify:                         ## @nv04_identify
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	(%rdi), %eax
	cmpl	$5, %eax
	je	LBB0_4
## %bb.1:
	cmpl	$4, %eax
	jne	LBB0_5
## %bb.2:
	leaq	L_.str(%rip), %rax
	movq	%rax, 8(%rdi)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_VBIOS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nouveau_bios_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_I2C@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_i2c_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_CLOCK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_clock_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_DEVINIT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_devinit_oclass@GOTPCREL(%rip), %rdx
	jmp	LBB0_3
LBB0_4:
	leaq	L_.str.1(%rip), %rax
	movq	%rax, 8(%rdi)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_VBIOS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nouveau_bios_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_I2C@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_i2c_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_CLOCK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_clock_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_DEVINIT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv05_devinit_oclass@GOTPCREL(%rip), %rdx
LBB0_3:
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_MC@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_mc_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_BUS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_bus_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_TIMER@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_timer_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_FB@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_fb_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_INSTMEM@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_instmem_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_SUBDEV_VM@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_vmmgr_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_ENGINE_DMAOBJ@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_dmaeng_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_ENGINE_FIFO@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_fifo_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_ENGINE_SW@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_software_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_ENGINE_GR@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_graph_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	movq	16(%rdi), %rax
	movq	_NVDEV_ENGINE_DISP@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_nv04_disp_oclass@GOTPCREL(%rip), %rdx
	movq	%rdx, (%rax,%rcx,8)
	xorl	%eax, %eax
	popq	%rbp
	retq
LBB0_5:
	leaq	L_.str.2(%rip), %rsi
	callq	_nv_fatal
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"NV04"

	.comm	_nouveau_bios_oclass,4,2        ## @nouveau_bios_oclass
	.comm	_NVDEV_SUBDEV_VBIOS,8,3         ## @NVDEV_SUBDEV_VBIOS
	.comm	_nv04_i2c_oclass,4,2            ## @nv04_i2c_oclass
	.comm	_NVDEV_SUBDEV_I2C,8,3           ## @NVDEV_SUBDEV_I2C
	.comm	_nv04_clock_oclass,4,2          ## @nv04_clock_oclass
	.comm	_NVDEV_SUBDEV_CLOCK,8,3         ## @NVDEV_SUBDEV_CLOCK
	.comm	_nv04_devinit_oclass,4,2        ## @nv04_devinit_oclass
	.comm	_NVDEV_SUBDEV_DEVINIT,8,3       ## @NVDEV_SUBDEV_DEVINIT
	.comm	_nv04_mc_oclass,4,2             ## @nv04_mc_oclass
	.comm	_NVDEV_SUBDEV_MC,8,3            ## @NVDEV_SUBDEV_MC
	.comm	_nv04_bus_oclass,4,2            ## @nv04_bus_oclass
	.comm	_NVDEV_SUBDEV_BUS,8,3           ## @NVDEV_SUBDEV_BUS
	.comm	_nv04_timer_oclass,4,2          ## @nv04_timer_oclass
	.comm	_NVDEV_SUBDEV_TIMER,8,3         ## @NVDEV_SUBDEV_TIMER
	.comm	_nv04_fb_oclass,4,2             ## @nv04_fb_oclass
	.comm	_NVDEV_SUBDEV_FB,8,3            ## @NVDEV_SUBDEV_FB
	.comm	_nv04_instmem_oclass,4,2        ## @nv04_instmem_oclass
	.comm	_NVDEV_SUBDEV_INSTMEM,8,3       ## @NVDEV_SUBDEV_INSTMEM
	.comm	_nv04_vmmgr_oclass,4,2          ## @nv04_vmmgr_oclass
	.comm	_NVDEV_SUBDEV_VM,8,3            ## @NVDEV_SUBDEV_VM
	.comm	_nv04_dmaeng_oclass,4,2         ## @nv04_dmaeng_oclass
	.comm	_NVDEV_ENGINE_DMAOBJ,8,3        ## @NVDEV_ENGINE_DMAOBJ
	.comm	_nv04_fifo_oclass,4,2           ## @nv04_fifo_oclass
	.comm	_NVDEV_ENGINE_FIFO,8,3          ## @NVDEV_ENGINE_FIFO
	.comm	_nv04_software_oclass,4,2       ## @nv04_software_oclass
	.comm	_NVDEV_ENGINE_SW,8,3            ## @NVDEV_ENGINE_SW
	.comm	_nv04_graph_oclass,4,2          ## @nv04_graph_oclass
	.comm	_NVDEV_ENGINE_GR,8,3            ## @NVDEV_ENGINE_GR
	.comm	_nv04_disp_oclass,4,2           ## @nv04_disp_oclass
	.comm	_NVDEV_ENGINE_DISP,8,3          ## @NVDEV_ENGINE_DISP
L_.str.1:                               ## @.str.1
	.asciz	"NV05"

	.comm	_nv05_devinit_oclass,4,2        ## @nv05_devinit_oclass
L_.str.2:                               ## @.str.2
	.asciz	"unknown RIVA chipset\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_nv04_identify                  ; -- Begin function nv04_identify
	.p2align	2
_nv04_identify:                         ; @nv04_identify
	.cfi_startproc
; %bb.0:
	stp	x29, x30, [sp, #-16]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 16
	mov	x29, sp
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	mov	x8, x0
	ldr	w9, [x0]
	cmp	w9, #5
	b.eq	LBB0_3
; %bb.1:
	cmp	w9, #4
	b.ne	LBB0_5
; %bb.2:
	mov	w0, #0
Lloh0:
	adrp	x9, l_.str@PAGE
Lloh1:
	add	x9, x9, l_.str@PAGEOFF
	str	x9, [x8, #8]
	ldr	x9, [x8, #16]
Lloh2:
	adrp	x10, _NVDEV_SUBDEV_VBIOS@GOTPAGE
Lloh3:
	ldr	x10, [x10, _NVDEV_SUBDEV_VBIOS@GOTPAGEOFF]
Lloh4:
	ldr	x10, [x10]
Lloh5:
	adrp	x11, _nouveau_bios_oclass@GOTPAGE
Lloh6:
	ldr	x11, [x11, _nouveau_bios_oclass@GOTPAGEOFF]
	str	x11, [x9, x10, lsl #3]
	ldr	x9, [x8, #16]
Lloh7:
	adrp	x10, _NVDEV_SUBDEV_I2C@GOTPAGE
Lloh8:
	ldr	x10, [x10, _NVDEV_SUBDEV_I2C@GOTPAGEOFF]
Lloh9:
	ldr	x10, [x10]
Lloh10:
	adrp	x11, _nv04_i2c_oclass@GOTPAGE
Lloh11:
	ldr	x11, [x11, _nv04_i2c_oclass@GOTPAGEOFF]
	str	x11, [x9, x10, lsl #3]
Lloh12:
	adrp	x9, _NVDEV_SUBDEV_CLOCK@GOTPAGE
Lloh13:
	ldr	x9, [x9, _NVDEV_SUBDEV_CLOCK@GOTPAGEOFF]
	ldr	x10, [x8, #16]
Lloh14:
	ldr	x9, [x9]
Lloh15:
	adrp	x11, _nv04_clock_oclass@GOTPAGE
Lloh16:
	ldr	x11, [x11, _nv04_clock_oclass@GOTPAGEOFF]
	str	x11, [x10, x9, lsl #3]
	ldr	x9, [x8, #16]
Lloh17:
	adrp	x10, _NVDEV_SUBDEV_DEVINIT@GOTPAGE
Lloh18:
	ldr	x10, [x10, _NVDEV_SUBDEV_DEVINIT@GOTPAGEOFF]
Lloh19:
	ldr	x10, [x10]
Lloh20:
	adrp	x11, _nv04_devinit_oclass@GOTPAGE
Lloh21:
	ldr	x11, [x11, _nv04_devinit_oclass@GOTPAGEOFF]
	b	LBB0_4
LBB0_3:
	mov	w0, #0
Lloh22:
	adrp	x9, l_.str.1@PAGE
Lloh23:
	add	x9, x9, l_.str.1@PAGEOFF
	str	x9, [x8, #8]
	ldr	x9, [x8, #16]
Lloh24:
	adrp	x10, _NVDEV_SUBDEV_VBIOS@GOTPAGE
Lloh25:
	ldr	x10, [x10, _NVDEV_SUBDEV_VBIOS@GOTPAGEOFF]
Lloh26:
	ldr	x10, [x10]
Lloh27:
	adrp	x11, _nouveau_bios_oclass@GOTPAGE
Lloh28:
	ldr	x11, [x11, _nouveau_bios_oclass@GOTPAGEOFF]
	str	x11, [x9, x10, lsl #3]
	ldr	x9, [x8, #16]
Lloh29:
	adrp	x10, _NVDEV_SUBDEV_I2C@GOTPAGE
Lloh30:
	ldr	x10, [x10, _NVDEV_SUBDEV_I2C@GOTPAGEOFF]
Lloh31:
	ldr	x10, [x10]
Lloh32:
	adrp	x11, _nv04_i2c_oclass@GOTPAGE
Lloh33:
	ldr	x11, [x11, _nv04_i2c_oclass@GOTPAGEOFF]
	str	x11, [x9, x10, lsl #3]
Lloh34:
	adrp	x9, _NVDEV_SUBDEV_CLOCK@GOTPAGE
Lloh35:
	ldr	x9, [x9, _NVDEV_SUBDEV_CLOCK@GOTPAGEOFF]
	ldr	x10, [x8, #16]
Lloh36:
	ldr	x9, [x9]
Lloh37:
	adrp	x11, _nv04_clock_oclass@GOTPAGE
Lloh38:
	ldr	x11, [x11, _nv04_clock_oclass@GOTPAGEOFF]
	str	x11, [x10, x9, lsl #3]
	ldr	x9, [x8, #16]
Lloh39:
	adrp	x10, _NVDEV_SUBDEV_DEVINIT@GOTPAGE
Lloh40:
	ldr	x10, [x10, _NVDEV_SUBDEV_DEVINIT@GOTPAGEOFF]
Lloh41:
	ldr	x10, [x10]
Lloh42:
	adrp	x11, _nv05_devinit_oclass@GOTPAGE
Lloh43:
	ldr	x11, [x11, _nv05_devinit_oclass@GOTPAGEOFF]
LBB0_4:
	str	x11, [x9, x10, lsl #3]
	ldr	x9, [x8, #16]
Lloh44:
	adrp	x10, _NVDEV_SUBDEV_MC@GOTPAGE
Lloh45:
	ldr	x10, [x10, _NVDEV_SUBDEV_MC@GOTPAGEOFF]
Lloh46:
	ldr	x10, [x10]
Lloh47:
	adrp	x11, _nv04_mc_oclass@GOTPAGE
Lloh48:
	ldr	x11, [x11, _nv04_mc_oclass@GOTPAGEOFF]
	str	x11, [x9, x10, lsl #3]
Lloh49:
	adrp	x9, _NVDEV_SUBDEV_BUS@GOTPAGE
Lloh50:
	ldr	x9, [x9, _NVDEV_SUBDEV_BUS@GOTPAGEOFF]
	ldr	x10, [x8, #16]
Lloh51:
	ldr	x9, [x9]
Lloh52:
	adrp	x11, _nv04_bus_oclass@GOTPAGE
Lloh53:
	ldr	x11, [x11, _nv04_bus_oclass@GOTPAGEOFF]
	str	x11, [x10, x9, lsl #3]
	ldr	x9, [x8, #16]
Lloh54:
	adrp	x10, _NVDEV_SUBDEV_TIMER@GOTPAGE
Lloh55:
	ldr	x10, [x10, _NVDEV_SUBDEV_TIMER@GOTPAGEOFF]
Lloh56:
	ldr	x10, [x10]
Lloh57:
	adrp	x11, _nv04_timer_oclass@GOTPAGE
Lloh58:
	ldr	x11, [x11, _nv04_timer_oclass@GOTPAGEOFF]
	str	x11, [x9, x10, lsl #3]
	ldr	x9, [x8, #16]
Lloh59:
	adrp	x10, _NVDEV_SUBDEV_FB@GOTPAGE
Lloh60:
	ldr	x10, [x10, _NVDEV_SUBDEV_FB@GOTPAGEOFF]
Lloh61:
	ldr	x10, [x10]
Lloh62:
	adrp	x11, _nv04_fb_oclass@GOTPAGE
Lloh63:
	ldr	x11, [x11, _nv04_fb_oclass@GOTPAGEOFF]
	str	x11, [x9, x10, lsl #3]
Lloh64:
	adrp	x9, _NVDEV_SUBDEV_INSTMEM@GOTPAGE
Lloh65:
	ldr	x9, [x9, _NVDEV_SUBDEV_INSTMEM@GOTPAGEOFF]
	ldr	x10, [x8, #16]
Lloh66:
	ldr	x9, [x9]
Lloh67:
	adrp	x11, _nv04_instmem_oclass@GOTPAGE
Lloh68:
	ldr	x11, [x11, _nv04_instmem_oclass@GOTPAGEOFF]
	str	x11, [x10, x9, lsl #3]
	ldr	x9, [x8, #16]
Lloh69:
	adrp	x10, _NVDEV_SUBDEV_VM@GOTPAGE
Lloh70:
	ldr	x10, [x10, _NVDEV_SUBDEV_VM@GOTPAGEOFF]
Lloh71:
	ldr	x10, [x10]
Lloh72:
	adrp	x11, _nv04_vmmgr_oclass@GOTPAGE
Lloh73:
	ldr	x11, [x11, _nv04_vmmgr_oclass@GOTPAGEOFF]
	str	x11, [x9, x10, lsl #3]
	ldr	x9, [x8, #16]
Lloh74:
	adrp	x10, _NVDEV_ENGINE_DMAOBJ@GOTPAGE
Lloh75:
	ldr	x10, [x10, _NVDEV_ENGINE_DMAOBJ@GOTPAGEOFF]
Lloh76:
	ldr	x10, [x10]
Lloh77:
	adrp	x11, _nv04_dmaeng_oclass@GOTPAGE
Lloh78:
	ldr	x11, [x11, _nv04_dmaeng_oclass@GOTPAGEOFF]
	str	x11, [x9, x10, lsl #3]
Lloh79:
	adrp	x9, _NVDEV_ENGINE_FIFO@GOTPAGE
Lloh80:
	ldr	x9, [x9, _NVDEV_ENGINE_FIFO@GOTPAGEOFF]
	ldr	x10, [x8, #16]
Lloh81:
	ldr	x9, [x9]
Lloh82:
	adrp	x11, _nv04_fifo_oclass@GOTPAGE
Lloh83:
	ldr	x11, [x11, _nv04_fifo_oclass@GOTPAGEOFF]
	str	x11, [x10, x9, lsl #3]
	ldr	x9, [x8, #16]
Lloh84:
	adrp	x10, _NVDEV_ENGINE_SW@GOTPAGE
Lloh85:
	ldr	x10, [x10, _NVDEV_ENGINE_SW@GOTPAGEOFF]
Lloh86:
	ldr	x10, [x10]
Lloh87:
	adrp	x11, _nv04_software_oclass@GOTPAGE
Lloh88:
	ldr	x11, [x11, _nv04_software_oclass@GOTPAGEOFF]
	str	x11, [x9, x10, lsl #3]
	ldr	x9, [x8, #16]
Lloh89:
	adrp	x10, _NVDEV_ENGINE_GR@GOTPAGE
Lloh90:
	ldr	x10, [x10, _NVDEV_ENGINE_GR@GOTPAGEOFF]
Lloh91:
	ldr	x10, [x10]
Lloh92:
	adrp	x11, _nv04_graph_oclass@GOTPAGE
Lloh93:
	ldr	x11, [x11, _nv04_graph_oclass@GOTPAGEOFF]
	str	x11, [x9, x10, lsl #3]
Lloh94:
	adrp	x9, _NVDEV_ENGINE_DISP@GOTPAGE
Lloh95:
	ldr	x9, [x9, _NVDEV_ENGINE_DISP@GOTPAGEOFF]
	ldr	x8, [x8, #16]
Lloh96:
	ldr	x9, [x9]
Lloh97:
	adrp	x10, _nv04_disp_oclass@GOTPAGE
Lloh98:
	ldr	x10, [x10, _nv04_disp_oclass@GOTPAGEOFF]
	str	x10, [x8, x9, lsl #3]
	ldp	x29, x30, [sp], #16             ; 16-byte Folded Reload
	ret
LBB0_5:
Lloh99:
	adrp	x1, l_.str.2@PAGE
Lloh100:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x8
	bl	_nv_fatal
Lloh101:
	adrp	x8, _EINVAL@GOTPAGE
Lloh102:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh103:
	ldr	w8, [x8]
	neg	w0, w8
	ldp	x29, x30, [sp], #16             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGot	Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGot	Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh101, Lloh102, Lloh103
	.loh AdrpAdd	Lloh99, Lloh100
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"NV04"

	.comm	_nouveau_bios_oclass,4,2        ; @nouveau_bios_oclass
	.comm	_NVDEV_SUBDEV_VBIOS,8,3         ; @NVDEV_SUBDEV_VBIOS
	.comm	_nv04_i2c_oclass,4,2            ; @nv04_i2c_oclass
	.comm	_NVDEV_SUBDEV_I2C,8,3           ; @NVDEV_SUBDEV_I2C
	.comm	_nv04_clock_oclass,4,2          ; @nv04_clock_oclass
	.comm	_NVDEV_SUBDEV_CLOCK,8,3         ; @NVDEV_SUBDEV_CLOCK
	.comm	_nv04_devinit_oclass,4,2        ; @nv04_devinit_oclass
	.comm	_NVDEV_SUBDEV_DEVINIT,8,3       ; @NVDEV_SUBDEV_DEVINIT
	.comm	_nv04_mc_oclass,4,2             ; @nv04_mc_oclass
	.comm	_NVDEV_SUBDEV_MC,8,3            ; @NVDEV_SUBDEV_MC
	.comm	_nv04_bus_oclass,4,2            ; @nv04_bus_oclass
	.comm	_NVDEV_SUBDEV_BUS,8,3           ; @NVDEV_SUBDEV_BUS
	.comm	_nv04_timer_oclass,4,2          ; @nv04_timer_oclass
	.comm	_NVDEV_SUBDEV_TIMER,8,3         ; @NVDEV_SUBDEV_TIMER
	.comm	_nv04_fb_oclass,4,2             ; @nv04_fb_oclass
	.comm	_NVDEV_SUBDEV_FB,8,3            ; @NVDEV_SUBDEV_FB
	.comm	_nv04_instmem_oclass,4,2        ; @nv04_instmem_oclass
	.comm	_NVDEV_SUBDEV_INSTMEM,8,3       ; @NVDEV_SUBDEV_INSTMEM
	.comm	_nv04_vmmgr_oclass,4,2          ; @nv04_vmmgr_oclass
	.comm	_NVDEV_SUBDEV_VM,8,3            ; @NVDEV_SUBDEV_VM
	.comm	_nv04_dmaeng_oclass,4,2         ; @nv04_dmaeng_oclass
	.comm	_NVDEV_ENGINE_DMAOBJ,8,3        ; @NVDEV_ENGINE_DMAOBJ
	.comm	_nv04_fifo_oclass,4,2           ; @nv04_fifo_oclass
	.comm	_NVDEV_ENGINE_FIFO,8,3          ; @NVDEV_ENGINE_FIFO
	.comm	_nv04_software_oclass,4,2       ; @nv04_software_oclass
	.comm	_NVDEV_ENGINE_SW,8,3            ; @NVDEV_ENGINE_SW
	.comm	_nv04_graph_oclass,4,2          ; @nv04_graph_oclass
	.comm	_NVDEV_ENGINE_GR,8,3            ; @NVDEV_ENGINE_GR
	.comm	_nv04_disp_oclass,4,2           ; @nv04_disp_oclass
	.comm	_NVDEV_ENGINE_DISP,8,3          ; @NVDEV_ENGINE_DISP
l_.str.1:                               ; @.str.1
	.asciz	"NV05"

	.comm	_nv05_devinit_oclass,4,2        ; @nv05_devinit_oclass
l_.str.2:                               ; @.str.2
	.asciz	"unknown RIVA chipset\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
.subsections_via_symbols
