	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function stl_cd1400setport
_stl_cd1400setport:                     ## @stl_cd1400setport
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_stl_brds@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%rdi), %r8
	cmpq	$0, (%rax,%r8,8)
	je	LBB0_3
## %bb.1:
	movq	%rsi, %r15
	movq	%rdi, %r14
	movl	$0, 8(%rdi)
	movl	(%rsi), %r10d
	movq	_IGNPAR@GOTPCREL(%rip), %rax
	testl	%r10d, (%rax)
	je	LBB0_4
## %bb.2:
	movq	_ST_PARITY@GOTPCREL(%rip), %rcx
	movq	_ST_FRAMING@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	(%rcx), %eax
	movq	_ST_OVERRUN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, 8(%r14)
	movq	_COR1_PARIGNORE@GOTPCREL(%rip), %rcx
	movb	(%rcx), %r12b
	jmp	LBB0_5
LBB0_3:
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	xorl	%eax, %eax
	xorl	%r12d, %r12d
LBB0_5:
	movq	_IGNBRK@GOTPCREL(%rip), %rcx
	testl	%r10d, (%rcx)
	je	LBB0_7
## %bb.6:
	movq	_ST_BREAK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, 8(%r14)
	movq	_COR4_IGNBRK@GOTPCREL(%rip), %rax
	movb	(%rax), %sil
	jmp	LBB0_8
LBB0_7:
	xorl	%esi, %esi
LBB0_8:
	movq	_ST_OVERRUN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%r14)
	movq	_INPCK@GOTPCREL(%rip), %rcx
	movq	_PARMRK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	testl	%r10d, %edx
	je	LBB0_10
## %bb.9:
	movq	_ST_PARITY@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_ST_FRAMING@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, 12(%r14)
LBB0_10:
	movq	_BRKINT@GOTPCREL(%rip), %rcx
	testl	%r10d, (%rcx)
	je	LBB0_12
## %bb.11:
	movq	_ST_BREAK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, 12(%r14)
LBB0_12:
	movl	4(%r15), %r11d
	movq	_CSIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r11d, %eax
	addl	$-128, %eax
	cmpl	$2, %eax
	ja	LBB0_14
## %bb.13:
	cltq
	leaq	l_switch.table.stl_cd1400setport(%rip), %rcx
	movq	(%rcx,%rax,8), %rcx
	jmp	LBB0_15
LBB0_14:
	movq	_COR1_CHL8@GOTPCREL(%rip), %rcx
LBB0_15:
	movq	_CSTOPB@GOTPCREL(%rip), %rax
	testl	%r11d, (%rax)
	jne	LBB0_17
## %bb.16:
	movq	_COR1_STOP1@GOTPCREL(%rip), %rax
	jmp	LBB0_18
LBB0_17:
	movq	_COR1_STOP2@GOTPCREL(%rip), %rax
LBB0_18:
	orb	(%rcx), %r12b
	movq	_PARENB@GOTPCREL(%rip), %rcx
	testl	%r11d, (%rcx)
	movl	%esi, -52(%rbp)                 ## 4-byte Spill
	je	LBB0_21
## %bb.19:
	movq	_PARODD@GOTPCREL(%rip), %rcx
	movq	_COR1_PARENB@GOTPCREL(%rip), %rdx
	movb	(%rdx), %r9b
	testl	%r11d, (%rcx)
	je	LBB0_22
## %bb.20:
	movq	_COR1_PARODD@GOTPCREL(%rip), %rcx
	jmp	LBB0_23
LBB0_21:
	movq	_COR1_PARNONE@GOTPCREL(%rip), %rcx
	movb	(%rcx), %r9b
	jmp	LBB0_24
LBB0_22:
	movq	_COR1_PAREVEN@GOTPCREL(%rip), %rcx
LBB0_23:
	orb	(%rcx), %r9b
LBB0_24:
	orb	(%rax), %r12b
	movq	_CBAUD@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ecx, %eax
	andl	%r11d, %eax
	movq	_CBAUDEX@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	testl	%esi, %eax
	je	LBB0_27
## %bb.25:
	notl	%esi
	movl	%eax, %edx
	andl	%esi, %edx
	leal	-5(%rdx), %edi
	cmpl	$-5, %edi
	ja	LBB0_28
## %bb.26:
	andl	%esi, %r11d
	movl	%r11d, 4(%r15)
	andl	%r11d, %ecx
	movl	%ecx, %eax
	jmp	LBB0_29
LBB0_27:
	movl	%eax, %edx
	jmp	LBB0_29
LBB0_28:
	addl	$15, %edx
LBB0_29:
	movq	_FIFO_RXTHRESHOLD@GOTPCREL(%rip), %rcx
	movq	_stl_baudrates@GOTPCREL(%rip), %rsi
	movq	(%rsi), %rsi
	movl	%edx, %edx
	movl	(%rsi,%rdx,4), %edx
	movq	_B38400@GOTPCREL(%rip), %rsi
	cmpl	(%rsi), %eax
	jne	LBB0_36
## %bb.30:
	movq	_ASYNC_SPD_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	andl	44(%r14), %ebx
	movq	_ASYNC_SPD_HI@GOTPCREL(%rip), %rsi
	movl	$57600, %eax                    ## imm = 0xE100
	cmpl	(%rsi), %ebx
	je	LBB0_37
## %bb.31:
	movq	_ASYNC_SPD_VHI@GOTPCREL(%rip), %rsi
	movl	$115200, %eax                   ## imm = 0x1C200
	cmpl	(%rsi), %ebx
	je	LBB0_37
## %bb.32:
	movq	_ASYNC_SPD_SHI@GOTPCREL(%rip), %rsi
	movl	$230400, %eax                   ## imm = 0x38400
	cmpl	(%rsi), %ebx
	je	LBB0_37
## %bb.33:
	movq	_ASYNC_SPD_WARP@GOTPCREL(%rip), %rsi
	movl	$460800, %eax                   ## imm = 0x70800
	cmpl	(%rsi), %ebx
	je	LBB0_37
## %bb.34:
	movq	_ASYNC_SPD_CUST@GOTPCREL(%rip), %rsi
	movl	%edx, %eax
	cmpl	(%rsi), %ebx
	jne	LBB0_37
## %bb.35:
	movl	16(%r14), %eax
	xorl	%edx, %edx
	divl	20(%r14)
	jmp	LBB0_37
LBB0_36:
	movl	%edx, %eax
LBB0_37:
	movb	(%rcx), %sil
	movq	_STL_CD1400MAXBAUD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	cmpl	%ecx, %eax
	cmovbl	%eax, %ecx
	movl	%ecx, -68(%rbp)                 ## 4-byte Spill
	testl	%ecx, %ecx
	je	LBB0_42
## %bb.38:
	movq	_CD1400_NUMCLKS@GOTPCREL(%rip), %rax
	movzbl	(%rax), %r13d
	testq	%r13, %r13
	je	LBB0_43
## %bb.39:
	movq	%r8, -64(%rbp)                  ## 8-byte Spill
	movl	%esi, %r8d
	movl	24(%r14), %ecx
	movq	_stl_cd1400clkdivs@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	.p2align	4, 0x90
LBB0_40:                                ## =>This Inner Loop Header: Depth=1
	movl	%ecx, %eax
	xorl	%edx, %edx
	divl	(%rdi,%rsi,4)
	xorl	%edx, %edx
	divl	-68(%rbp)                       ## 4-byte Folded Reload
	movl	%eax, %ebx
	cmpl	$256, %eax                      ## imm = 0x100
	jb	LBB0_44
## %bb.41:                              ##   in Loop: Header=BB0_40 Depth=1
	incq	%rsi
	cmpb	%sil, %r13b
	jne	LBB0_40
	jmp	LBB0_45
LBB0_42:
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
	jmp	LBB0_46
LBB0_43:
	xorl	%r13d, %r13d
                                        ## implicit-def: $bl
	jmp	LBB0_46
LBB0_44:
	movl	%esi, %r13d
LBB0_45:
	movl	%r8d, %esi
	movq	-64(%rbp), %r8                  ## 8-byte Reload
LBB0_46:
	movq	_CLOCAL@GOTPCREL(%rip), %rax
	testl	%r11d, (%rax)
	je	LBB0_48
## %bb.47:
	movq	_ASYNC_CHECK_CD@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 44(%r14)
	movl	$0, -64(%rbp)                   ## 4-byte Folded Spill
	xorl	%eax, %eax
	xorl	%edi, %edi
	jmp	LBB0_49
LBB0_48:
	movq	_MCOR1_DCD@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	movq	_MCOR2_DCD@GOTPCREL(%rip), %rcx
	movb	(%rcx), %dil
	movq	_SRER_MODEM@GOTPCREL(%rip), %rcx
	movzbl	(%rcx), %ecx
	movl	%ecx, -64(%rbp)                 ## 4-byte Spill
	movq	_ASYNC_CHECK_CD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, 44(%r14)
LBB0_49:
	orb	%r9b, %r12b
	movq	_IXON@GOTPCREL(%rip), %rcx
	testl	%r10d, (%rcx)
	movq	%r15, -96(%rbp)                 ## 8-byte Spill
	movl	%r12d, -56(%rbp)                ## 4-byte Spill
	movl	%edi, -44(%rbp)                 ## 4-byte Spill
	je	LBB0_52
## %bb.50:
	movq	_COR2_TXIBE@GOTPCREL(%rip), %rcx
	movq	_COR3_SCD12@GOTPCREL(%rip), %rdx
	orb	(%rdx), %sil
	movb	(%rcx), %cl
	movq	_IXANY@GOTPCREL(%rip), %rdx
	testl	%r10d, (%rdx)
	movb	%sil, -48(%rbp)                 ## 1-byte Spill
	je	LBB0_53
## %bb.51:
	movq	_COR2_IXM@GOTPCREL(%rip), %rdx
	orb	(%rdx), %cl
	jmp	LBB0_53
LBB0_52:
	movb	%sil, -48(%rbp)                 ## 1-byte Spill
	xorl	%ecx, %ecx
LBB0_53:
	movq	_CRTSCTS@GOTPCREL(%rip), %rdx
	andl	(%rdx), %r11d
	movq	_COR2_CTSAE@GOTPCREL(%rip), %rdx
	movzbl	(%rdx), %r12d
	cmovel	%r11d, %r12d
	movq	_FIFO_RTSTHRESHOLD@GOTPCREL(%rip), %rdx
	movzbl	(%rdx), %r15d
	cmovel	%r11d, %r15d
	orb	%cl, %r12b
	orb	%al, %r15b
	movzbl	28(%r14), %esi
	movzbl	40(%r14), %edx
	movzbl	%r8b, %ecx
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_pr_debug
	movzbl	-52(%rbp), %r8d                 ## 1-byte Folded Reload
	movzbl	%r12b, %edx
	movl	%edx, -80(%rbp)                 ## 4-byte Spill
	movzbl	-56(%rbp), %esi                 ## 1-byte Folded Reload
	movl	%esi, -76(%rbp)                 ## 4-byte Spill
	movzbl	-48(%rbp), %ecx                 ## 1-byte Folded Reload
	movl	%ecx, -84(%rbp)                 ## 4-byte Spill
	leaq	L_.str.1(%rip), %rdi
	movl	%r8d, -48(%rbp)                 ## 4-byte Spill
	xorl	%r9d, %r9d
	xorl	%eax, %eax
	callq	_pr_debug
	movzbl	%r15b, %esi
	movzbl	-44(%rbp), %edx                 ## 1-byte Folded Reload
	leaq	L_.str.2(%rip), %rdi
	movl	%esi, -52(%rbp)                 ## 4-byte Spill
	movl	%edx, -56(%rbp)                 ## 4-byte Spill
	movl	$2, %ecx
	movl	-64(%rbp), %r8d                 ## 4-byte Reload
	xorl	%r9d, %r9d
	xorl	%eax, %eax
	callq	_pr_debug
	movzbl	%bl, %edx
	movzbl	%r13b, %ecx
	leaq	L_.str.3(%rip), %rdi
	movl	%ecx, %esi
	movl	%ecx, %r13d
	movl	%edx, -72(%rbp)                 ## 4-byte Spill
	movl	%edx, %r8d
	xorl	%eax, %eax
	callq	_pr_debug
	movq	-96(%rbp), %r12                 ## 8-byte Reload
	movq	8(%r12), %rax
	movq	_VSTART@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movzbl	(%rax,%rcx), %ecx
	movq	_VSTOP@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movzbl	(%rax,%rdx), %edx
	leaq	L_.str.4(%rip), %rdi
	movl	%ecx, %esi
	movl	%edx, %r8d
	xorl	%eax, %eax
	callq	_pr_debug
	movq	_brd_lock@GOTPCREL(%rip), %rdi
	callq	_spin_lock_irqsave
	movq	(%r14), %rdi
	movl	36(%r14), %esi
	callq	_BRDENABLE
	movq	_CAR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	28(%r14), %edx
	andl	$3, %edx
	movq	%r14, %rdi
	callq	_stl_cd1400setreg
	movq	_SRER@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_stl_cd1400getreg
	movb	%al, -44(%rbp)                  ## 1-byte Spill
	movl	(%rbx), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_stl_cd1400setreg
	movq	_COR1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-76(%rbp), %edx                 ## 4-byte Reload
	callq	_stl_cd1400updatereg
	movq	%rax, %r15
	movq	_COR2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-80(%rbp), %edx                 ## 4-byte Reload
	callq	_stl_cd1400updatereg
	movq	%rax, %rbx
	movq	_COR3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-84(%rbp), %edx                 ## 4-byte Reload
	callq	_stl_cd1400updatereg
	testq	%rax, %rax
	jne	LBB0_56
## %bb.54:
	testq	%rbx, %rbx
	jne	LBB0_56
## %bb.55:
	testq	%r15, %r15
	je	LBB0_57
LBB0_56:
	movq	%r14, %rdi
	callq	_stl_cd1400ccrwait
	movq	_CCR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CCR_CORCHANGE@GOTPCREL(%rip), %rax
	movzbl	(%rax), %edx
	movq	%r14, %rdi
	callq	_stl_cd1400setreg
LBB0_57:
	movq	_COR4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	callq	_stl_cd1400setreg
	movq	_COR5@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_stl_cd1400setreg
	movq	_MCOR1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-52(%rbp), %edx                 ## 4-byte Reload
	callq	_stl_cd1400setreg
	movq	_MCOR2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	callq	_stl_cd1400setreg
	cmpl	$0, -68(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_59
## %bb.58:
	movq	_TCOR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r13d, %edx
	callq	_stl_cd1400setreg
	movq	_TBPR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-72(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %edx
	callq	_stl_cd1400setreg
	movq	_RCOR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r13d, %edx
	callq	_stl_cd1400setreg
	movq	_RBPR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_stl_cd1400setreg
LBB0_59:
	movq	_SCHR1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	8(%r12), %rax
	movq	_VSTART@GOTPCREL(%rip), %r15
	movq	(%r15), %rcx
	movzbl	(%rax,%rcx), %edx
	movq	%r14, %rdi
	callq	_stl_cd1400setreg
	movq	_SCHR2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	8(%r12), %rax
	movq	_VSTOP@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rcx
	movzbl	(%rax,%rcx), %edx
	movq	%r14, %rdi
	callq	_stl_cd1400setreg
	movq	_SCHR3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	8(%r12), %rax
	movq	(%r15), %rcx
	movzbl	(%rax,%rcx), %edx
	movq	%r14, %rdi
	callq	_stl_cd1400setreg
	movq	_SCHR4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	8(%r12), %rax
	movq	(%rbx), %rcx
	movzbl	(%rax,%rcx), %edx
	movq	%r14, %rdi
	callq	_stl_cd1400setreg
	movq	_RTPR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$2, %edx
	callq	_stl_cd1400setreg
	movq	_MSVR1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_stl_cd1400getreg
	movq	_MSVR1_DCD@GOTPCREL(%rip), %rdx
	movq	_TIOCM_CD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testb	%al, (%rdx)
	je	LBB0_61
## %bb.60:
	orl	%ecx, 32(%r14)
	jmp	LBB0_62
LBB0_61:
	notl	%ecx
	andl	%ecx, 32(%r14)
LBB0_62:
	movb	-44(%rbp), %r13b                ## 1-byte Reload
	movq	_SRER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orb	-64(%rbp), %r13b                ## 1-byte Folded Reload
	movzbl	%r13b, %edx
	movq	%r14, %rdi
	callq	_stl_cd1400setreg
	movq	(%r14), %rdi
	callq	_BRDDISABLE
	movq	_brd_lock@GOTPCREL(%rip), %rdi
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_spin_unlock_irqrestore         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_stl_brds,8,3                   ## @stl_brds
	.comm	_IGNPAR,4,2                     ## @IGNPAR
	.comm	_ST_PARITY,4,2                  ## @ST_PARITY
	.comm	_ST_FRAMING,4,2                 ## @ST_FRAMING
	.comm	_ST_OVERRUN,4,2                 ## @ST_OVERRUN
	.comm	_COR1_PARIGNORE,1,0             ## @COR1_PARIGNORE
	.comm	_IGNBRK,4,2                     ## @IGNBRK
	.comm	_ST_BREAK,4,2                   ## @ST_BREAK
	.comm	_COR4_IGNBRK,1,0                ## @COR4_IGNBRK
	.comm	_INPCK,4,2                      ## @INPCK
	.comm	_PARMRK,4,2                     ## @PARMRK
	.comm	_BRKINT,4,2                     ## @BRKINT
	.comm	_CSIZE,4,2                      ## @CSIZE
	.comm	_COR1_CHL5,1,0                  ## @COR1_CHL5
	.comm	_COR1_CHL6,1,0                  ## @COR1_CHL6
	.comm	_COR1_CHL7,1,0                  ## @COR1_CHL7
	.comm	_COR1_CHL8,1,0                  ## @COR1_CHL8
	.comm	_CSTOPB,4,2                     ## @CSTOPB
	.comm	_COR1_STOP2,1,0                 ## @COR1_STOP2
	.comm	_COR1_STOP1,1,0                 ## @COR1_STOP1
	.comm	_PARENB,4,2                     ## @PARENB
	.comm	_PARODD,4,2                     ## @PARODD
	.comm	_COR1_PARENB,1,0                ## @COR1_PARENB
	.comm	_COR1_PARODD,1,0                ## @COR1_PARODD
	.comm	_COR1_PAREVEN,1,0               ## @COR1_PAREVEN
	.comm	_COR1_PARNONE,1,0               ## @COR1_PARNONE
	.comm	_FIFO_RXTHRESHOLD,1,0           ## @FIFO_RXTHRESHOLD
	.comm	_CBAUD,4,2                      ## @CBAUD
	.comm	_CBAUDEX,4,2                    ## @CBAUDEX
	.comm	_stl_baudrates,8,3              ## @stl_baudrates
	.comm	_B38400,4,2                     ## @B38400
	.comm	_ASYNC_SPD_MASK,4,2             ## @ASYNC_SPD_MASK
	.comm	_ASYNC_SPD_HI,4,2               ## @ASYNC_SPD_HI
	.comm	_ASYNC_SPD_VHI,4,2              ## @ASYNC_SPD_VHI
	.comm	_ASYNC_SPD_SHI,4,2              ## @ASYNC_SPD_SHI
	.comm	_ASYNC_SPD_WARP,4,2             ## @ASYNC_SPD_WARP
	.comm	_ASYNC_SPD_CUST,4,2             ## @ASYNC_SPD_CUST
	.comm	_STL_CD1400MAXBAUD,4,2          ## @STL_CD1400MAXBAUD
	.comm	_CD1400_NUMCLKS,1,0             ## @CD1400_NUMCLKS
	.comm	_stl_cd1400clkdivs,8,3          ## @stl_cd1400clkdivs
	.comm	_CLOCAL,4,2                     ## @CLOCAL
	.comm	_MCOR1_DCD,1,0                  ## @MCOR1_DCD
	.comm	_MCOR2_DCD,1,0                  ## @MCOR2_DCD
	.comm	_SRER_MODEM,1,0                 ## @SRER_MODEM
	.comm	_ASYNC_CHECK_CD,4,2             ## @ASYNC_CHECK_CD
	.comm	_IXON,4,2                       ## @IXON
	.comm	_COR2_TXIBE,1,0                 ## @COR2_TXIBE
	.comm	_COR3_SCD12,1,0                 ## @COR3_SCD12
	.comm	_IXANY,4,2                      ## @IXANY
	.comm	_COR2_IXM,1,0                   ## @COR2_IXM
	.comm	_CRTSCTS,4,2                    ## @CRTSCTS
	.comm	_COR2_CTSAE,1,0                 ## @COR2_CTSAE
	.comm	_FIFO_RTSTHRESHOLD,1,0          ## @FIFO_RTSTHRESHOLD
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"SETPORT: portnr=%d panelnr=%d brdnr=%d\n"

L_.str.1:                               ## @.str.1
	.asciz	"    cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n"

L_.str.2:                               ## @.str.2
	.asciz	"    mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n"

L_.str.3:                               ## @.str.3
	.asciz	"    tcor=%x tbpr=%x rcor=%x rbpr=%x\n"

L_.str.4:                               ## @.str.4
	.asciz	"    schr1=%x schr2=%x schr3=%x schr4=%x\n"

	.comm	_VSTART,8,3                     ## @VSTART
	.comm	_VSTOP,8,3                      ## @VSTOP
	.comm	_brd_lock,4,2                   ## @brd_lock
	.comm	_CAR,4,2                        ## @CAR
	.comm	_SRER,4,2                       ## @SRER
	.comm	_COR1,4,2                       ## @COR1
	.comm	_COR2,4,2                       ## @COR2
	.comm	_COR3,4,2                       ## @COR3
	.comm	_CCR,4,2                        ## @CCR
	.comm	_CCR_CORCHANGE,1,0              ## @CCR_CORCHANGE
	.comm	_COR4,4,2                       ## @COR4
	.comm	_COR5,4,2                       ## @COR5
	.comm	_MCOR1,4,2                      ## @MCOR1
	.comm	_MCOR2,4,2                      ## @MCOR2
	.comm	_TCOR,4,2                       ## @TCOR
	.comm	_TBPR,4,2                       ## @TBPR
	.comm	_RCOR,4,2                       ## @RCOR
	.comm	_RBPR,4,2                       ## @RBPR
	.comm	_SCHR1,4,2                      ## @SCHR1
	.comm	_SCHR2,4,2                      ## @SCHR2
	.comm	_SCHR3,4,2                      ## @SCHR3
	.comm	_SCHR4,4,2                      ## @SCHR4
	.comm	_RTPR,4,2                       ## @RTPR
	.comm	_MSVR1,4,2                      ## @MSVR1
	.comm	_MSVR1_DCD,1,0                  ## @MSVR1_DCD
	.comm	_TIOCM_CD,4,2                   ## @TIOCM_CD
	.no_dead_strip	_stl_cd1400setport
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.stl_cd1400setport
l_switch.table.stl_cd1400setport:
	.quad	_COR1_CHL7
	.quad	_COR1_CHL6
	.quad	_COR1_CHL5

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function stl_cd1400setport
_stl_cd1400setport:                     ; @stl_cd1400setport
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
Lloh0:
	adrp	x8, _stl_brds@GOTPAGE
Lloh1:
	ldr	x8, [x8, _stl_brds@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x8]
	ldr	x8, [x0]
	ldr	x9, [x9, x8, lsl #3]
	cbz	x9, LBB0_3
; %bb.1:
	mov	x20, x1
	mov	x19, x0
	str	wzr, [x0, #8]
	ldr	w9, [x1]
Lloh3:
	adrp	x10, _IGNPAR@GOTPAGE
Lloh4:
	ldr	x10, [x10, _IGNPAR@GOTPAGEOFF]
Lloh5:
	adrp	x14, _ST_OVERRUN@GOTPAGE
Lloh6:
	ldr	x14, [x14, _ST_OVERRUN@GOTPAGEOFF]
Lloh7:
	ldr	w11, [x10]
Lloh8:
	adrp	x10, _ST_PARITY@GOTPAGE
Lloh9:
	ldr	x10, [x10, _ST_PARITY@GOTPAGEOFF]
Lloh10:
	adrp	x12, _ST_FRAMING@GOTPAGE
Lloh11:
	ldr	x12, [x12, _ST_FRAMING@GOTPAGEOFF]
	tst	w11, w9
	b.eq	LBB0_4
; %bb.2:
	ldr	w11, [x10]
	ldr	w13, [x12]
	orr	w11, w13, w11
	ldr	w13, [x14]
	orr	w15, w11, w13
	str	w15, [x19, #8]
Lloh12:
	adrp	x11, _COR1_PARIGNORE@GOTPAGE
Lloh13:
	ldr	x11, [x11, _COR1_PARIGNORE@GOTPAGEOFF]
	ldrb	w11, [x11]
	b	LBB0_5
LBB0_3:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
LBB0_4:
	mov	w15, #0
	mov	w11, #0
LBB0_5:
Lloh14:
	adrp	x13, _IGNBRK@GOTPAGE
Lloh15:
	ldr	x13, [x13, _IGNBRK@GOTPAGEOFF]
Lloh16:
	ldr	w16, [x13]
Lloh17:
	adrp	x13, _ST_BREAK@GOTPAGE
Lloh18:
	ldr	x13, [x13, _ST_BREAK@GOTPAGEOFF]
	tst	w16, w9
	b.eq	LBB0_7
; %bb.6:
	ldr	w16, [x13]
	orr	w15, w15, w16
	str	w15, [x19, #8]
Lloh19:
	adrp	x15, _COR4_IGNBRK@GOTPAGE
Lloh20:
	ldr	x15, [x15, _COR4_IGNBRK@GOTPAGEOFF]
	ldrb	w15, [x15]
	str	w15, [sp, #44]                  ; 4-byte Folded Spill
	b	LBB0_8
LBB0_7:
	str	wzr, [sp, #44]                  ; 4-byte Folded Spill
LBB0_8:
	ldr	w14, [x14]
	str	w14, [x19, #12]
Lloh21:
	adrp	x15, _INPCK@GOTPAGE
Lloh22:
	ldr	x15, [x15, _INPCK@GOTPAGEOFF]
Lloh23:
	ldr	w15, [x15]
Lloh24:
	adrp	x16, _PARMRK@GOTPAGE
Lloh25:
	ldr	x16, [x16, _PARMRK@GOTPAGEOFF]
Lloh26:
	ldr	w16, [x16]
	orr	w15, w16, w15
	tst	w15, w9
	b.eq	LBB0_10
; %bb.9:
	ldr	w10, [x10]
	ldr	w12, [x12]
	orr	w10, w10, w14
	orr	w14, w10, w12
	str	w14, [x19, #12]
LBB0_10:
Lloh27:
	adrp	x10, _BRKINT@GOTPAGE
Lloh28:
	ldr	x10, [x10, _BRKINT@GOTPAGEOFF]
Lloh29:
	ldr	w10, [x10]
	tst	w10, w9
	b.eq	LBB0_12
; %bb.11:
	ldr	w10, [x13]
	orr	w10, w14, w10
	str	w10, [x19, #12]
LBB0_12:
	ldr	w10, [x20, #4]
Lloh30:
	adrp	x12, _CSIZE@GOTPAGE
Lloh31:
	ldr	x12, [x12, _CSIZE@GOTPAGEOFF]
Lloh32:
	ldr	w12, [x12]
	and	w12, w12, w10
	sub	w12, w12, #128
	cmp	w12, #2
	b.hi	LBB0_14
; %bb.13:
Lloh33:
	adrp	x13, l_switch.table.stl_cd1400setport@PAGE
Lloh34:
	add	x13, x13, l_switch.table.stl_cd1400setport@PAGEOFF
	ldr	x13, [x13, w12, sxtw #3]
	b	LBB0_15
LBB0_14:
Lloh35:
	adrp	x13, _COR1_CHL8@GOTPAGE
Lloh36:
	ldr	x13, [x13, _COR1_CHL8@GOTPAGEOFF]
LBB0_15:
Lloh37:
	adrp	x12, _CSTOPB@GOTPAGE
Lloh38:
	ldr	x12, [x12, _CSTOPB@GOTPAGEOFF]
Lloh39:
	ldr	w12, [x12]
Lloh40:
	adrp	x14, _COR1_STOP1@GOTPAGE
Lloh41:
	ldr	x14, [x14, _COR1_STOP1@GOTPAGEOFF]
Lloh42:
	adrp	x15, _COR1_STOP2@GOTPAGE
Lloh43:
	ldr	x15, [x15, _COR1_STOP2@GOTPAGEOFF]
	tst	w12, w10
	csel	x15, x14, x15, eq
Lloh44:
	adrp	x12, _PARENB@GOTPAGE
Lloh45:
	ldr	x12, [x12, _PARENB@GOTPAGEOFF]
Lloh46:
	ldr	w12, [x12]
	tst	w12, w10
	b.eq	LBB0_18
; %bb.16:
Lloh47:
	adrp	x12, _PARODD@GOTPAGE
Lloh48:
	ldr	x12, [x12, _PARODD@GOTPAGEOFF]
Lloh49:
	ldr	w14, [x12]
Lloh50:
	adrp	x12, _COR1_PARENB@GOTPAGE
Lloh51:
	ldr	x12, [x12, _COR1_PARENB@GOTPAGEOFF]
	ldrb	w12, [x12]
	tst	w14, w10
	b.eq	LBB0_19
; %bb.17:
Lloh52:
	adrp	x14, _COR1_PARODD@GOTPAGE
Lloh53:
	ldr	x14, [x14, _COR1_PARODD@GOTPAGEOFF]
	b	LBB0_20
LBB0_18:
Lloh54:
	adrp	x12, _COR1_PARNONE@GOTPAGE
Lloh55:
	ldr	x12, [x12, _COR1_PARNONE@GOTPAGEOFF]
	ldrb	w12, [x12]
	b	LBB0_21
LBB0_19:
Lloh56:
	adrp	x14, _COR1_PAREVEN@GOTPAGE
Lloh57:
	ldr	x14, [x14, _COR1_PAREVEN@GOTPAGEOFF]
LBB0_20:
	ldrb	w14, [x14]
	orr	w12, w14, w12
LBB0_21:
	ldrb	w14, [x13]
	ldrb	w13, [x15]
Lloh58:
	adrp	x15, _CBAUD@GOTPAGE
Lloh59:
	ldr	x15, [x15, _CBAUD@GOTPAGEOFF]
Lloh60:
	ldr	w17, [x15]
	and	w16, w17, w10
Lloh61:
	adrp	x15, _CBAUDEX@GOTPAGE
Lloh62:
	ldr	x15, [x15, _CBAUDEX@GOTPAGEOFF]
Lloh63:
	ldr	w0, [x15]
	tst	w16, w0
	b.eq	LBB0_24
; %bb.22:
	bic	w15, w16, w0
	sub	w1, w15, #5
	cmn	w1, #5
	b.hi	LBB0_25
; %bb.23:
	mvn	w16, w0
	and	w10, w10, w16
	str	w10, [x20, #4]
	and	w16, w10, w17
	b	LBB0_26
LBB0_24:
	mov	x15, x16
	b	LBB0_26
LBB0_25:
	add	w15, w15, #15
LBB0_26:
Lloh64:
	adrp	x17, _stl_baudrates@GOTPAGE
Lloh65:
	ldr	x17, [x17, _stl_baudrates@GOTPAGEOFF]
Lloh66:
	ldr	x17, [x17]
	ldr	w15, [x17, w15, uxtw #2]
Lloh67:
	adrp	x17, _B38400@GOTPAGE
Lloh68:
	ldr	x17, [x17, _B38400@GOTPAGEOFF]
Lloh69:
	ldr	w17, [x17]
	cmp	w16, w17
	b.ne	LBB0_37
; %bb.27:
	ldr	w16, [x19, #44]
Lloh70:
	adrp	x17, _ASYNC_SPD_MASK@GOTPAGE
Lloh71:
	ldr	x17, [x17, _ASYNC_SPD_MASK@GOTPAGEOFF]
Lloh72:
	ldr	w17, [x17]
	and	w16, w17, w16
Lloh73:
	adrp	x17, _ASYNC_SPD_HI@GOTPAGE
Lloh74:
	ldr	x17, [x17, _ASYNC_SPD_HI@GOTPAGEOFF]
Lloh75:
	ldr	w17, [x17]
	cmp	w16, w17
	b.ne	LBB0_29
; %bb.28:
	mov	w15, #57600
	b	LBB0_37
LBB0_29:
Lloh76:
	adrp	x17, _ASYNC_SPD_VHI@GOTPAGE
Lloh77:
	ldr	x17, [x17, _ASYNC_SPD_VHI@GOTPAGEOFF]
Lloh78:
	ldr	w17, [x17]
	cmp	w16, w17
	b.ne	LBB0_31
; %bb.30:
	mov	w15, #49664
	movk	w15, #1, lsl #16
	b	LBB0_37
LBB0_31:
Lloh79:
	adrp	x17, _ASYNC_SPD_SHI@GOTPAGE
Lloh80:
	ldr	x17, [x17, _ASYNC_SPD_SHI@GOTPAGEOFF]
Lloh81:
	ldr	w17, [x17]
	cmp	w16, w17
	b.ne	LBB0_33
; %bb.32:
	mov	w15, #33792
	movk	w15, #3, lsl #16
	b	LBB0_37
LBB0_33:
Lloh82:
	adrp	x17, _ASYNC_SPD_WARP@GOTPAGE
Lloh83:
	ldr	x17, [x17, _ASYNC_SPD_WARP@GOTPAGEOFF]
Lloh84:
	ldr	w17, [x17]
	cmp	w16, w17
	b.ne	LBB0_35
; %bb.34:
	mov	w15, #2048
	movk	w15, #7, lsl #16
	b	LBB0_37
LBB0_35:
Lloh85:
	adrp	x17, _ASYNC_SPD_CUST@GOTPAGE
Lloh86:
	ldr	x17, [x17, _ASYNC_SPD_CUST@GOTPAGEOFF]
Lloh87:
	ldr	w17, [x17]
	cmp	w16, w17
	b.ne	LBB0_37
; %bb.36:
	ldp	w15, w16, [x19, #16]
	udiv	w15, w15, w16
LBB0_37:
	orr	w11, w14, w11
Lloh88:
	adrp	x14, _STL_CD1400MAXBAUD@GOTPAGE
Lloh89:
	ldr	x14, [x14, _STL_CD1400MAXBAUD@GOTPAGEOFF]
Lloh90:
	ldr	w14, [x14]
	cmp	w15, w14
	csel	w28, w15, w14, lo
	cbz	w28, LBB0_43
; %bb.38:
Lloh91:
	adrp	x14, _CD1400_NUMCLKS@GOTPAGE
Lloh92:
	ldr	x14, [x14, _CD1400_NUMCLKS@GOTPAGEOFF]
	ldrb	w14, [x14]
	cbz	w14, LBB0_44
; %bb.39:
	mov	w21, #0
	ldr	w15, [x19, #24]
Lloh93:
	adrp	x16, _stl_cd1400clkdivs@GOTPAGE
Lloh94:
	ldr	x16, [x16, _stl_cd1400clkdivs@GOTPAGEOFF]
Lloh95:
	ldr	x16, [x16]
LBB0_40:                                ; =>This Inner Loop Header: Depth=1
	and	x17, x21, #0xff
	ldr	w17, [x16, x17, lsl #2]
	udiv	w17, w15, w17
	udiv	w27, w17, w28
	cmp	w27, #256
	b.lo	LBB0_45
; %bb.41:                               ;   in Loop: Header=BB0_40 Depth=1
	add	w21, w21, #1
	cmp	w14, w21, uxtb
	b.hi	LBB0_40
; %bb.42:
	mov	x21, x14
	b	LBB0_45
LBB0_43:
	mov	w21, #0
	mov	w27, #0
	b	LBB0_45
LBB0_44:
	mov	w21, #0
                                        ; implicit-def: $w27
LBB0_45:
Lloh96:
	adrp	x14, _FIFO_RXTHRESHOLD@GOTPAGE
Lloh97:
	ldr	x14, [x14, _FIFO_RXTHRESHOLD@GOTPAGEOFF]
	orr	w13, w11, w13
Lloh98:
	adrp	x11, _CLOCAL@GOTPAGE
Lloh99:
	ldr	x11, [x11, _CLOCAL@GOTPAGEOFF]
Lloh100:
	ldr	w11, [x11]
	tst	w11, w10
	b.eq	LBB0_47
; %bb.46:
	str	xzr, [sp, #32]                  ; 8-byte Folded Spill
	mov	w11, #0
	mov	w22, #0
Lloh101:
	adrp	x15, _ASYNC_CHECK_CD@GOTPAGE
Lloh102:
	ldr	x15, [x15, _ASYNC_CHECK_CD@GOTPAGEOFF]
Lloh103:
	ldr	w15, [x15]
	ldr	w16, [x19, #44]
	bic	w15, w16, w15
	b	LBB0_48
LBB0_47:
Lloh104:
	adrp	x11, _MCOR1_DCD@GOTPAGE
Lloh105:
	ldr	x11, [x11, _MCOR1_DCD@GOTPAGEOFF]
	ldrb	w11, [x11]
Lloh106:
	adrp	x15, _MCOR2_DCD@GOTPAGE
Lloh107:
	ldr	x15, [x15, _MCOR2_DCD@GOTPAGEOFF]
	ldrb	w22, [x15]
Lloh108:
	adrp	x15, _SRER_MODEM@GOTPAGE
Lloh109:
	ldr	x15, [x15, _SRER_MODEM@GOTPAGEOFF]
	ldrb	w15, [x15]
	str	x15, [sp, #32]                  ; 8-byte Folded Spill
Lloh110:
	adrp	x15, _ASYNC_CHECK_CD@GOTPAGE
Lloh111:
	ldr	x15, [x15, _ASYNC_CHECK_CD@GOTPAGEOFF]
Lloh112:
	ldr	w15, [x15]
	ldr	w16, [x19, #44]
	orr	w15, w16, w15
LBB0_48:
	str	w15, [x19, #44]
	ldrb	w24, [x14]
	orr	w26, w13, w12
Lloh113:
	adrp	x12, _IXON@GOTPAGE
Lloh114:
	ldr	x12, [x12, _IXON@GOTPAGEOFF]
Lloh115:
	ldr	w12, [x12]
	tst	w12, w9
	b.eq	LBB0_51
; %bb.49:
Lloh116:
	adrp	x12, _COR2_TXIBE@GOTPAGE
Lloh117:
	ldr	x12, [x12, _COR2_TXIBE@GOTPAGEOFF]
	ldrb	w12, [x12]
Lloh118:
	adrp	x13, _COR3_SCD12@GOTPAGE
Lloh119:
	ldr	x13, [x13, _COR3_SCD12@GOTPAGEOFF]
	ldrb	w13, [x13]
	orr	w24, w13, w24
Lloh120:
	adrp	x13, _IXANY@GOTPAGE
Lloh121:
	ldr	x13, [x13, _IXANY@GOTPAGEOFF]
Lloh122:
	ldr	w13, [x13]
	tst	w13, w9
	b.eq	LBB0_52
; %bb.50:
Lloh123:
	adrp	x9, _COR2_IXM@GOTPAGE
Lloh124:
	ldr	x9, [x9, _COR2_IXM@GOTPAGEOFF]
	ldrb	w9, [x9]
	orr	w12, w9, w12
	b	LBB0_52
LBB0_51:
	mov	w12, #0
LBB0_52:
Lloh125:
	adrp	x9, _CRTSCTS@GOTPAGE
Lloh126:
	ldr	x9, [x9, _CRTSCTS@GOTPAGEOFF]
Lloh127:
	adrp	x13, _COR2_CTSAE@GOTPAGE
Lloh128:
	ldr	x13, [x13, _COR2_CTSAE@GOTPAGEOFF]
Lloh129:
	ldr	w9, [x9]
	ldrb	w13, [x13]
Lloh130:
	adrp	x14, _FIFO_RTSTHRESHOLD@GOTPAGE
Lloh131:
	ldr	x14, [x14, _FIFO_RTSTHRESHOLD@GOTPAGEOFF]
	ldrb	w14, [x14]
	tst	w9, w10
	csel	w9, wzr, w13, eq
	orr	w25, w9, w12
	csel	w9, wzr, w14, eq
	orr	w23, w9, w11
	ldrb	w1, [x19, #28]
	ldrb	w2, [x19, #40]
	and	w3, w8, #0xff
Lloh132:
	adrp	x0, l_.str@PAGE
Lloh133:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_debug
	ldr	w8, [sp, #44]                   ; 4-byte Folded Reload
	mov	w8, w8
	stp	x8, xzr, [sp]
	and	w25, w25, #0xff
	and	w26, w26, #0xff
	and	w24, w24, #0xff
Lloh134:
	adrp	x0, l_.str.1@PAGE
Lloh135:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	x1, x26
	mov	x2, x25
	mov	x3, x24
	bl	_pr_debug
	ldr	x8, [sp, #32]                   ; 8-byte Folded Reload
	stp	x8, xzr, [sp]
	and	w1, w23, #0xff
Lloh136:
	adrp	x0, l_.str.2@PAGE
Lloh137:
	add	x0, x0, l_.str.2@PAGEOFF
	str	w22, [sp, #28]                  ; 4-byte Folded Spill
	mov	x2, x22
	mov	w3, #2
	bl	_pr_debug
	and	w2, w27, #0xff
	and	x8, x27, #0xff
	str	x8, [sp]
	and	w1, w21, #0xff
Lloh138:
	adrp	x0, l_.str.3@PAGE
Lloh139:
	add	x0, x0, l_.str.3@PAGEOFF
	mov	x3, x1
	bl	_pr_debug
	ldr	x8, [x20, #8]
Lloh140:
	adrp	x9, _VSTART@GOTPAGE
Lloh141:
	ldr	x9, [x9, _VSTART@GOTPAGEOFF]
Lloh142:
	ldr	x9, [x9]
	ldrb	w1, [x8, x9]
Lloh143:
	adrp	x9, _VSTOP@GOTPAGE
Lloh144:
	ldr	x9, [x9, _VSTOP@GOTPAGEOFF]
Lloh145:
	ldr	x9, [x9]
	ldrb	w2, [x8, x9]
	str	x2, [sp]
Lloh146:
	adrp	x0, l_.str.4@PAGE
Lloh147:
	add	x0, x0, l_.str.4@PAGEOFF
                                        ; kill: def $w2 killed $w2 killed $x2
	mov	x3, x1
	bl	_pr_debug
Lloh148:
	adrp	x0, _brd_lock@GOTPAGE
Lloh149:
	ldr	x0, [x0, _brd_lock@GOTPAGEOFF]
	bl	_spin_lock_irqsave
	ldr	x0, [x19]
	ldr	w1, [x19, #36]
	bl	_BRDENABLE
Lloh150:
	adrp	x8, _CAR@GOTPAGE
Lloh151:
	ldr	x8, [x8, _CAR@GOTPAGEOFF]
Lloh152:
	ldr	w1, [x8]
	ldr	w8, [x19, #28]
	and	w2, w8, #0x3
	mov	x0, x19
	bl	_stl_cd1400setreg
Lloh153:
	adrp	x22, _SRER@GOTPAGE
Lloh154:
	ldr	x22, [x22, _SRER@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_stl_cd1400getreg
	str	w0, [sp, #24]                   ; 4-byte Folded Spill
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #0
	bl	_stl_cd1400setreg
Lloh155:
	adrp	x8, _COR1@GOTPAGE
Lloh156:
	ldr	x8, [x8, _COR1@GOTPAGEOFF]
Lloh157:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x26
	bl	_stl_cd1400updatereg
	mov	x26, x0
Lloh158:
	adrp	x8, _COR2@GOTPAGE
Lloh159:
	ldr	x8, [x8, _COR2@GOTPAGEOFF]
Lloh160:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x25
	bl	_stl_cd1400updatereg
	mov	x25, x0
Lloh161:
	adrp	x8, _COR3@GOTPAGE
Lloh162:
	ldr	x8, [x8, _COR3@GOTPAGEOFF]
Lloh163:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x24
	bl	_stl_cd1400updatereg
	cbnz	x0, LBB0_55
; %bb.53:
	cbnz	x25, LBB0_55
; %bb.54:
	cbz	x26, LBB0_56
LBB0_55:
	mov	x0, x19
	bl	_stl_cd1400ccrwait
Lloh164:
	adrp	x8, _CCR@GOTPAGE
Lloh165:
	ldr	x8, [x8, _CCR@GOTPAGEOFF]
Lloh166:
	ldr	w1, [x8]
Lloh167:
	adrp	x8, _CCR_CORCHANGE@GOTPAGE
Lloh168:
	ldr	x8, [x8, _CCR_CORCHANGE@GOTPAGEOFF]
	ldrb	w2, [x8]
	mov	x0, x19
	bl	_stl_cd1400setreg
LBB0_56:
Lloh169:
	adrp	x8, _COR4@GOTPAGE
Lloh170:
	ldr	x8, [x8, _COR4@GOTPAGEOFF]
Lloh171:
	ldr	w1, [x8]
	mov	x0, x19
	ldr	w2, [sp, #44]                   ; 4-byte Folded Reload
	bl	_stl_cd1400setreg
Lloh172:
	adrp	x8, _COR5@GOTPAGE
Lloh173:
	ldr	x8, [x8, _COR5@GOTPAGEOFF]
Lloh174:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_stl_cd1400setreg
Lloh175:
	adrp	x8, _MCOR1@GOTPAGE
Lloh176:
	ldr	x8, [x8, _MCOR1@GOTPAGEOFF]
Lloh177:
	ldr	w1, [x8]
	and	w2, w23, #0xff
	mov	x0, x19
	bl	_stl_cd1400setreg
Lloh178:
	adrp	x8, _MCOR2@GOTPAGE
Lloh179:
	ldr	x8, [x8, _MCOR2@GOTPAGEOFF]
Lloh180:
	ldr	w1, [x8]
	mov	x0, x19
	ldr	w2, [sp, #28]                   ; 4-byte Folded Reload
	bl	_stl_cd1400setreg
	cbz	w28, LBB0_58
; %bb.57:
Lloh181:
	adrp	x8, _TCOR@GOTPAGE
Lloh182:
	ldr	x8, [x8, _TCOR@GOTPAGEOFF]
Lloh183:
	ldr	w1, [x8]
	and	w21, w21, #0xff
	mov	x0, x19
	mov	x2, x21
	bl	_stl_cd1400setreg
Lloh184:
	adrp	x8, _TBPR@GOTPAGE
Lloh185:
	ldr	x8, [x8, _TBPR@GOTPAGEOFF]
Lloh186:
	ldr	w1, [x8]
	and	w22, w27, #0xff
	mov	x0, x19
	mov	x2, x22
	bl	_stl_cd1400setreg
Lloh187:
	adrp	x8, _RCOR@GOTPAGE
Lloh188:
	ldr	x8, [x8, _RCOR@GOTPAGEOFF]
Lloh189:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_stl_cd1400setreg
Lloh190:
	adrp	x8, _RBPR@GOTPAGE
Lloh191:
	ldr	x8, [x8, _RBPR@GOTPAGEOFF]
Lloh192:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x22
	bl	_stl_cd1400setreg
LBB0_58:
Lloh193:
	adrp	x8, _SCHR1@GOTPAGE
Lloh194:
	ldr	x8, [x8, _SCHR1@GOTPAGEOFF]
Lloh195:
	ldr	w1, [x8]
	ldr	x8, [x20, #8]
Lloh196:
	adrp	x22, _VSTART@GOTPAGE
Lloh197:
	ldr	x22, [x22, _VSTART@GOTPAGEOFF]
	ldr	x9, [x22]
	ldrb	w2, [x8, x9]
	mov	x0, x19
	bl	_stl_cd1400setreg
Lloh198:
	adrp	x8, _SCHR2@GOTPAGE
Lloh199:
	ldr	x8, [x8, _SCHR2@GOTPAGEOFF]
Lloh200:
	ldr	w1, [x8]
	ldr	x8, [x20, #8]
Lloh201:
	adrp	x21, _VSTOP@GOTPAGE
Lloh202:
	ldr	x21, [x21, _VSTOP@GOTPAGEOFF]
	ldr	x9, [x21]
	ldrb	w2, [x8, x9]
	mov	x0, x19
	bl	_stl_cd1400setreg
Lloh203:
	adrp	x8, _SCHR3@GOTPAGE
Lloh204:
	ldr	x8, [x8, _SCHR3@GOTPAGEOFF]
Lloh205:
	ldr	w1, [x8]
	ldr	x8, [x20, #8]
	ldr	x9, [x22]
	ldrb	w2, [x8, x9]
	mov	x0, x19
	bl	_stl_cd1400setreg
Lloh206:
	adrp	x8, _SCHR4@GOTPAGE
Lloh207:
	ldr	x8, [x8, _SCHR4@GOTPAGEOFF]
Lloh208:
	ldr	w1, [x8]
	ldr	x8, [x20, #8]
	ldr	x9, [x21]
	ldrb	w2, [x8, x9]
	mov	x0, x19
	bl	_stl_cd1400setreg
Lloh209:
	adrp	x8, _RTPR@GOTPAGE
Lloh210:
	ldr	x8, [x8, _RTPR@GOTPAGEOFF]
Lloh211:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	bl	_stl_cd1400setreg
Lloh212:
	adrp	x8, _MSVR1@GOTPAGE
Lloh213:
	ldr	x8, [x8, _MSVR1@GOTPAGEOFF]
Lloh214:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_stl_cd1400getreg
Lloh215:
	adrp	x8, _MSVR1_DCD@GOTPAGE
Lloh216:
	ldr	x8, [x8, _MSVR1_DCD@GOTPAGEOFF]
	ldrb	w9, [x8]
Lloh217:
	adrp	x8, _TIOCM_CD@GOTPAGE
Lloh218:
	ldr	x8, [x8, _TIOCM_CD@GOTPAGEOFF]
Lloh219:
	ldr	w8, [x8]
	tst	w9, w0
	b.eq	LBB0_60
; %bb.59:
	ldr	w9, [x19, #32]
	orr	w8, w9, w8
	b	LBB0_61
LBB0_60:
	ldr	w9, [x19, #32]
	bic	w8, w9, w8
LBB0_61:
	str	w8, [x19, #32]
Lloh220:
	adrp	x8, _SRER@GOTPAGE
Lloh221:
	ldr	x8, [x8, _SRER@GOTPAGEOFF]
	ldr	w9, [sp, #24]                   ; 4-byte Folded Reload
Lloh222:
	ldr	w1, [x8]
	ldr	x8, [sp, #32]                   ; 8-byte Folded Reload
	orr	w2, w9, w8
	mov	x0, x19
	bl	_stl_cd1400setreg
	ldr	x0, [x19]
	bl	_BRDDISABLE
Lloh223:
	adrp	x0, _brd_lock@GOTPAGE
Lloh224:
	ldr	x0, [x0, _brd_lock@GOTPAGEOFF]
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	b	_spin_unlock_irqrestore
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGot	Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh98, Lloh99, Lloh100
	.loh AdrpLdrGot	Lloh96, Lloh97
	.loh AdrpLdrGotLdr	Lloh101, Lloh102, Lloh103
	.loh AdrpLdrGotLdr	Lloh110, Lloh111, Lloh112
	.loh AdrpLdrGot	Lloh108, Lloh109
	.loh AdrpLdrGot	Lloh106, Lloh107
	.loh AdrpLdrGot	Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh120, Lloh121, Lloh122
	.loh AdrpLdrGot	Lloh118, Lloh119
	.loh AdrpLdrGot	Lloh116, Lloh117
	.loh AdrpLdrGot	Lloh123, Lloh124
	.loh AdrpLdrGotLdr	Lloh161, Lloh162, Lloh163
	.loh AdrpLdrGotLdr	Lloh158, Lloh159, Lloh160
	.loh AdrpLdrGotLdr	Lloh155, Lloh156, Lloh157
	.loh AdrpLdrGot	Lloh153, Lloh154
	.loh AdrpLdrGotLdr	Lloh150, Lloh151, Lloh152
	.loh AdrpLdrGot	Lloh148, Lloh149
	.loh AdrpAdd	Lloh146, Lloh147
	.loh AdrpLdrGotLdr	Lloh143, Lloh144, Lloh145
	.loh AdrpLdrGotLdr	Lloh140, Lloh141, Lloh142
	.loh AdrpAdd	Lloh138, Lloh139
	.loh AdrpAdd	Lloh136, Lloh137
	.loh AdrpAdd	Lloh134, Lloh135
	.loh AdrpAdd	Lloh132, Lloh133
	.loh AdrpLdrGot	Lloh130, Lloh131
	.loh AdrpLdrGot	Lloh127, Lloh128
	.loh AdrpLdrGotLdr	Lloh125, Lloh126, Lloh129
	.loh AdrpLdrGot	Lloh167, Lloh168
	.loh AdrpLdrGotLdr	Lloh164, Lloh165, Lloh166
	.loh AdrpLdrGotLdr	Lloh178, Lloh179, Lloh180
	.loh AdrpLdrGotLdr	Lloh175, Lloh176, Lloh177
	.loh AdrpLdrGotLdr	Lloh172, Lloh173, Lloh174
	.loh AdrpLdrGotLdr	Lloh169, Lloh170, Lloh171
	.loh AdrpLdrGotLdr	Lloh190, Lloh191, Lloh192
	.loh AdrpLdrGotLdr	Lloh187, Lloh188, Lloh189
	.loh AdrpLdrGotLdr	Lloh184, Lloh185, Lloh186
	.loh AdrpLdrGotLdr	Lloh181, Lloh182, Lloh183
	.loh AdrpLdrGotLdr	Lloh217, Lloh218, Lloh219
	.loh AdrpLdrGot	Lloh215, Lloh216
	.loh AdrpLdrGotLdr	Lloh212, Lloh213, Lloh214
	.loh AdrpLdrGotLdr	Lloh209, Lloh210, Lloh211
	.loh AdrpLdrGotLdr	Lloh206, Lloh207, Lloh208
	.loh AdrpLdrGotLdr	Lloh203, Lloh204, Lloh205
	.loh AdrpLdrGot	Lloh201, Lloh202
	.loh AdrpLdrGotLdr	Lloh198, Lloh199, Lloh200
	.loh AdrpLdrGot	Lloh196, Lloh197
	.loh AdrpLdrGotLdr	Lloh193, Lloh194, Lloh195
	.loh AdrpLdrGot	Lloh223, Lloh224
	.loh AdrpLdrGotLdr	Lloh220, Lloh221, Lloh222
	.cfi_endproc
                                        ; -- End function
	.comm	_stl_brds,8,3                   ; @stl_brds
	.comm	_IGNPAR,4,2                     ; @IGNPAR
	.comm	_ST_PARITY,4,2                  ; @ST_PARITY
	.comm	_ST_FRAMING,4,2                 ; @ST_FRAMING
	.comm	_ST_OVERRUN,4,2                 ; @ST_OVERRUN
	.comm	_COR1_PARIGNORE,1,0             ; @COR1_PARIGNORE
	.comm	_IGNBRK,4,2                     ; @IGNBRK
	.comm	_ST_BREAK,4,2                   ; @ST_BREAK
	.comm	_COR4_IGNBRK,1,0                ; @COR4_IGNBRK
	.comm	_INPCK,4,2                      ; @INPCK
	.comm	_PARMRK,4,2                     ; @PARMRK
	.comm	_BRKINT,4,2                     ; @BRKINT
	.comm	_CSIZE,4,2                      ; @CSIZE
	.comm	_COR1_CHL5,1,0                  ; @COR1_CHL5
	.comm	_COR1_CHL6,1,0                  ; @COR1_CHL6
	.comm	_COR1_CHL7,1,0                  ; @COR1_CHL7
	.comm	_COR1_CHL8,1,0                  ; @COR1_CHL8
	.comm	_CSTOPB,4,2                     ; @CSTOPB
	.comm	_COR1_STOP2,1,0                 ; @COR1_STOP2
	.comm	_COR1_STOP1,1,0                 ; @COR1_STOP1
	.comm	_PARENB,4,2                     ; @PARENB
	.comm	_PARODD,4,2                     ; @PARODD
	.comm	_COR1_PARENB,1,0                ; @COR1_PARENB
	.comm	_COR1_PARODD,1,0                ; @COR1_PARODD
	.comm	_COR1_PAREVEN,1,0               ; @COR1_PAREVEN
	.comm	_COR1_PARNONE,1,0               ; @COR1_PARNONE
	.comm	_FIFO_RXTHRESHOLD,1,0           ; @FIFO_RXTHRESHOLD
	.comm	_CBAUD,4,2                      ; @CBAUD
	.comm	_CBAUDEX,4,2                    ; @CBAUDEX
	.comm	_stl_baudrates,8,3              ; @stl_baudrates
	.comm	_B38400,4,2                     ; @B38400
	.comm	_ASYNC_SPD_MASK,4,2             ; @ASYNC_SPD_MASK
	.comm	_ASYNC_SPD_HI,4,2               ; @ASYNC_SPD_HI
	.comm	_ASYNC_SPD_VHI,4,2              ; @ASYNC_SPD_VHI
	.comm	_ASYNC_SPD_SHI,4,2              ; @ASYNC_SPD_SHI
	.comm	_ASYNC_SPD_WARP,4,2             ; @ASYNC_SPD_WARP
	.comm	_ASYNC_SPD_CUST,4,2             ; @ASYNC_SPD_CUST
	.comm	_STL_CD1400MAXBAUD,4,2          ; @STL_CD1400MAXBAUD
	.comm	_CD1400_NUMCLKS,1,0             ; @CD1400_NUMCLKS
	.comm	_stl_cd1400clkdivs,8,3          ; @stl_cd1400clkdivs
	.comm	_CLOCAL,4,2                     ; @CLOCAL
	.comm	_MCOR1_DCD,1,0                  ; @MCOR1_DCD
	.comm	_MCOR2_DCD,1,0                  ; @MCOR2_DCD
	.comm	_SRER_MODEM,1,0                 ; @SRER_MODEM
	.comm	_ASYNC_CHECK_CD,4,2             ; @ASYNC_CHECK_CD
	.comm	_IXON,4,2                       ; @IXON
	.comm	_COR2_TXIBE,1,0                 ; @COR2_TXIBE
	.comm	_COR3_SCD12,1,0                 ; @COR3_SCD12
	.comm	_IXANY,4,2                      ; @IXANY
	.comm	_COR2_IXM,1,0                   ; @COR2_IXM
	.comm	_CRTSCTS,4,2                    ; @CRTSCTS
	.comm	_COR2_CTSAE,1,0                 ; @COR2_CTSAE
	.comm	_FIFO_RTSTHRESHOLD,1,0          ; @FIFO_RTSTHRESHOLD
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"SETPORT: portnr=%d panelnr=%d brdnr=%d\n"

l_.str.1:                               ; @.str.1
	.asciz	"    cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n"

l_.str.2:                               ; @.str.2
	.asciz	"    mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n"

l_.str.3:                               ; @.str.3
	.asciz	"    tcor=%x tbpr=%x rcor=%x rbpr=%x\n"

l_.str.4:                               ; @.str.4
	.asciz	"    schr1=%x schr2=%x schr3=%x schr4=%x\n"

	.comm	_VSTART,8,3                     ; @VSTART
	.comm	_VSTOP,8,3                      ; @VSTOP
	.comm	_brd_lock,4,2                   ; @brd_lock
	.comm	_CAR,4,2                        ; @CAR
	.comm	_SRER,4,2                       ; @SRER
	.comm	_COR1,4,2                       ; @COR1
	.comm	_COR2,4,2                       ; @COR2
	.comm	_COR3,4,2                       ; @COR3
	.comm	_CCR,4,2                        ; @CCR
	.comm	_CCR_CORCHANGE,1,0              ; @CCR_CORCHANGE
	.comm	_COR4,4,2                       ; @COR4
	.comm	_COR5,4,2                       ; @COR5
	.comm	_MCOR1,4,2                      ; @MCOR1
	.comm	_MCOR2,4,2                      ; @MCOR2
	.comm	_TCOR,4,2                       ; @TCOR
	.comm	_TBPR,4,2                       ; @TBPR
	.comm	_RCOR,4,2                       ; @RCOR
	.comm	_RBPR,4,2                       ; @RBPR
	.comm	_SCHR1,4,2                      ; @SCHR1
	.comm	_SCHR2,4,2                      ; @SCHR2
	.comm	_SCHR3,4,2                      ; @SCHR3
	.comm	_SCHR4,4,2                      ; @SCHR4
	.comm	_RTPR,4,2                       ; @RTPR
	.comm	_MSVR1,4,2                      ; @MSVR1
	.comm	_MSVR1_DCD,1,0                  ; @MSVR1_DCD
	.comm	_TIOCM_CD,4,2                   ; @TIOCM_CD
	.no_dead_strip	_stl_cd1400setport
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.stl_cd1400setport
l_switch.table.stl_cd1400setport:
	.quad	_COR1_CHL7
	.quad	_COR1_CHL6
	.quad	_COR1_CHL5

.subsections_via_symbols
