	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_copy_blit                 ## -- Begin function r100_copy_blit
	.p2align	4, 0x90
_r100_copy_blit:                        ## @r100_copy_blit
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r8, -64(%rbp)                  ## 8-byte Spill
	movl	%ecx, %ebx
	movl	%edx, -48(%rbp)                 ## 4-byte Spill
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movq	%rdi, %r12
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %r13
	shlq	$2, %r13
	addq	(%rdi), %r13
	movq	_RADEON_GPU_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	$16383, %r14d                   ## imm = 0x3FFF
	andl	(%rax), %r14d
	movl	%ecx, %edi
	movl	$8191, %esi                     ## imm = 0x1FFF
	callq	_DIV_ROUND_UP
                                        ## kill: def $eax killed $eax def $rax
	leal	(%rax,%rax,4), %eax
	leal	(%rax,%rax), %r15d
	addl	$64, %r15d
	movq	%r12, -72(%rbp)                 ## 8-byte Spill
	movq	%r12, %rdi
	movq	%r13, %rsi
	movl	%r15d, %edx
	callq	_radeon_ring_lock
	testl	%eax, %eax
	je	LBB0_1
## %bb.8:
	leaq	L_.str(%rip), %rdi
	movl	%eax, %esi
	movl	%r15d, %edx
	callq	_DRM_ERROR
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
	jmp	LBB0_7
LBB0_1:
	testl	%ebx, %ebx
	movl	-48(%rbp), %r15d                ## 4-byte Reload
	je	LBB0_4
## %bb.2:
	movl	%r14d, %r12d
	movl	%r14d, %eax
	shll	$16, %eax
	andl	$1069547520, %eax               ## imm = 0x3FC00000
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	sarl	$10, %ecx
	orl	%eax, %ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	sarl	$10, %r15d
	orl	%eax, %r15d
	shll	$14, %r12d
	andl	$268369920, %r12d               ## imm = 0xFFF0000
	movl	%r12d, -52(%rbp)                ## 4-byte Spill
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	cmpl	$8191, %ebx                     ## imm = 0x1FFF
	movl	$8191, %eax                     ## imm = 0x1FFF
	cmovll	%ebx, %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_PACKET3_BITBLT_MULTI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$8, %esi
	callq	_PACKET3
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_RADEON_GMC_DST_PITCH_OFFSET_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_RADEON_GMC_SRC_PITCH_OFFSET_CNTL@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_RADEON_GMC_SRC_CLIPPING@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_RADEON_GMC_DST_CLIPPING@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_RADEON_GMC_BRUSH_NONE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_RADEON_COLOR_FORMAT_ARGB8888@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	shll	$8, %esi
	orl	%eax, %esi
	movq	_RADEON_GMC_SRC_DATATYPE_COLOR@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_RADEON_ROP3_S@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_RADEON_DP_SRC_SOURCE_MEMORY@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_RADEON_GMC_CLR_CMP_CNTL_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_RADEON_GMC_WR_MSK_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	%r13, %rdi
	callq	_radeon_ring_write
	movq	%r13, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_radeon_ring_write
	movq	%r13, %rdi
	movl	%r15d, %esi
	callq	_radeon_ring_write
	movq	%r13, %rdi
	movl	$536813567, %esi                ## imm = 0x1FFF1FFF
	callq	_radeon_ring_write
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	%r13, %rdi
	movl	$536813567, %esi                ## imm = 0x1FFF1FFF
	callq	_radeon_ring_write
	movl	%ebx, %r12d
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	subl	%r14d, %ebx
	movq	%r13, %rdi
	movl	%ebx, %esi
	callq	_radeon_ring_write
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%r12d, %ebx
	movl	-52(%rbp), %r12d                ## 4-byte Reload
	callq	_radeon_ring_write
	movl	%r14d, %esi
	orl	%r12d, %esi
	movq	%r13, %rdi
	callq	_radeon_ring_write
	subl	%r14d, %ebx
	jne	LBB0_3
LBB0_4:
	movq	_RADEON_DSTCACHE_CTLSTAT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_RADEON_RB2D_DC_FLUSH_ALL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_radeon_ring_write
	movq	_RADEON_WAIT_UNTIL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_RADEON_WAIT_2D_IDLECLEAN@GOTPCREL(%rip), %rax
	movq	_RADEON_WAIT_HOST_IDLECLEAN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_RADEON_WAIT_DMA_GUI_IDLE@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	%r13, %rdi
	callq	_radeon_ring_write
	movq	-64(%rbp), %rsi                 ## 8-byte Reload
	testq	%rsi, %rsi
	movq	-72(%rbp), %r14                 ## 8-byte Reload
	je	LBB0_6
## %bb.5:
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r14, %rdi
	callq	_radeon_fence_emit
	movl	%eax, %r15d
LBB0_6:
	movq	%r14, %rdi
	movq	%r13, %rsi
	callq	_radeon_ring_unlock_commit
LBB0_7:
	movl	%r15d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ## @RADEON_GPU_PAGE_SIZE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"radeon: moving bo (%d) asking for %u dw.\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_PACKET3_BITBLT_MULTI,4,2       ## @PACKET3_BITBLT_MULTI
	.comm	_RADEON_GMC_SRC_PITCH_OFFSET_CNTL,4,2 ## @RADEON_GMC_SRC_PITCH_OFFSET_CNTL
	.comm	_RADEON_GMC_DST_PITCH_OFFSET_CNTL,4,2 ## @RADEON_GMC_DST_PITCH_OFFSET_CNTL
	.comm	_RADEON_GMC_SRC_CLIPPING,4,2    ## @RADEON_GMC_SRC_CLIPPING
	.comm	_RADEON_GMC_DST_CLIPPING,4,2    ## @RADEON_GMC_DST_CLIPPING
	.comm	_RADEON_GMC_BRUSH_NONE,4,2      ## @RADEON_GMC_BRUSH_NONE
	.comm	_RADEON_COLOR_FORMAT_ARGB8888,4,2 ## @RADEON_COLOR_FORMAT_ARGB8888
	.comm	_RADEON_GMC_SRC_DATATYPE_COLOR,4,2 ## @RADEON_GMC_SRC_DATATYPE_COLOR
	.comm	_RADEON_ROP3_S,4,2              ## @RADEON_ROP3_S
	.comm	_RADEON_DP_SRC_SOURCE_MEMORY,4,2 ## @RADEON_DP_SRC_SOURCE_MEMORY
	.comm	_RADEON_GMC_CLR_CMP_CNTL_DIS,4,2 ## @RADEON_GMC_CLR_CMP_CNTL_DIS
	.comm	_RADEON_GMC_WR_MSK_DIS,4,2      ## @RADEON_GMC_WR_MSK_DIS
	.comm	_RADEON_DSTCACHE_CTLSTAT,4,2    ## @RADEON_DSTCACHE_CTLSTAT
	.comm	_RADEON_RB2D_DC_FLUSH_ALL,4,2   ## @RADEON_RB2D_DC_FLUSH_ALL
	.comm	_RADEON_WAIT_UNTIL,4,2          ## @RADEON_WAIT_UNTIL
	.comm	_RADEON_WAIT_2D_IDLECLEAN,4,2   ## @RADEON_WAIT_2D_IDLECLEAN
	.comm	_RADEON_WAIT_HOST_IDLECLEAN,4,2 ## @RADEON_WAIT_HOST_IDLECLEAN
	.comm	_RADEON_WAIT_DMA_GUI_IDLE,4,2   ## @RADEON_WAIT_DMA_GUI_IDLE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_copy_blit                 ; -- Begin function r100_copy_blit
	.p2align	2
_r100_copy_blit:                        ; @r100_copy_blit
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x26, x4
	mov	x22, x3
	mov	x24, x2
	mov	x23, x1
	mov	x21, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x20, x8, x9, lsl #2
Lloh3:
	adrp	x8, _RADEON_GPU_PAGE_SIZE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RADEON_GPU_PAGE_SIZE@GOTPAGEOFF]
Lloh5:
	ldr	w19, [x8]
	mov	x0, x3
	mov	w1, #8191
	bl	_DIV_ROUND_UP
	mov	w8, #10
	orr	w9, wzr, #0x40
	madd	w25, w0, w8, w9
	mov	x0, x21
	mov	x1, x20
	mov	x2, x25
	bl	_radeon_ring_lock
	cbz	w0, LBB0_2
; %bb.1:
	mov	x1, x0
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
	mov	x2, x25
	bl	_DRM_ERROR
Lloh8:
	adrp	x8, _EINVAL@GOTPAGE
Lloh9:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	neg	w21, w8
	b	LBB0_9
LBB0_2:
	stp	x26, x21, [sp]                  ; 16-byte Folded Spill
	cbz	w22, LBB0_5
; %bb.3:
	and	w8, w19, #0x3fff
	lsl	w9, w8, #16
	and	w9, w9, #0x3fc00000
	orr	w23, w9, w23, asr #10
	lsl	w8, w8, #14
	and	w28, w8, #0xfff0000
Lloh11:
	adrp	x19, _RADEON_DP_SRC_SOURCE_MEMORY@GOTPAGE
Lloh12:
	ldr	x19, [x19, _RADEON_DP_SRC_SOURCE_MEMORY@GOTPAGEOFF]
	mov	w25, #8191
	orr	w24, w9, w24, asr #10
Lloh13:
	adrp	x27, _RADEON_GMC_CLR_CMP_CNTL_DIS@GOTPAGE
Lloh14:
	ldr	x27, [x27, _RADEON_GMC_CLR_CMP_CNTL_DIS@GOTPAGEOFF]
Lloh15:
	adrp	x26, _RADEON_GMC_WR_MSK_DIS@GOTPAGE
Lloh16:
	ldr	x26, [x26, _RADEON_GMC_WR_MSK_DIS@GOTPAGEOFF]
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	cmp	w22, w25
	csel	w21, w22, w25, lt
	sub	w22, w22, w21
Lloh17:
	adrp	x8, _PACKET3_BITBLT_MULTI@GOTPAGE
Lloh18:
	ldr	x8, [x8, _PACKET3_BITBLT_MULTI@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x8]
	mov	w1, #8
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
Lloh20:
	adrp	x8, _RADEON_GMC_SRC_PITCH_OFFSET_CNTL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _RADEON_GMC_SRC_PITCH_OFFSET_CNTL@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
Lloh23:
	adrp	x9, _RADEON_GMC_DST_PITCH_OFFSET_CNTL@GOTPAGE
Lloh24:
	ldr	x9, [x9, _RADEON_GMC_DST_PITCH_OFFSET_CNTL@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh26:
	adrp	x9, _RADEON_GMC_SRC_CLIPPING@GOTPAGE
Lloh27:
	ldr	x9, [x9, _RADEON_GMC_SRC_CLIPPING@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh29:
	adrp	x9, _RADEON_GMC_DST_CLIPPING@GOTPAGE
Lloh30:
	ldr	x9, [x9, _RADEON_GMC_DST_CLIPPING@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh32:
	adrp	x9, _RADEON_GMC_BRUSH_NONE@GOTPAGE
Lloh33:
	ldr	x9, [x9, _RADEON_GMC_BRUSH_NONE@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh35:
	adrp	x9, _RADEON_COLOR_FORMAT_ARGB8888@GOTPAGE
Lloh36:
	ldr	x9, [x9, _RADEON_COLOR_FORMAT_ARGB8888@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
	orr	w8, w8, w9, lsl #8
Lloh38:
	adrp	x9, _RADEON_GMC_SRC_DATATYPE_COLOR@GOTPAGE
Lloh39:
	ldr	x9, [x9, _RADEON_GMC_SRC_DATATYPE_COLOR@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh41:
	adrp	x9, _RADEON_ROP3_S@GOTPAGE
Lloh42:
	ldr	x9, [x9, _RADEON_ROP3_S@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [x19]
	orr	w8, w8, w9
	ldr	w9, [x27]
	orr	w8, w8, w9
	ldr	w9, [x26]
	orr	w1, w8, w9
	mov	x0, x20
	bl	_radeon_ring_write
	mov	x0, x20
	mov	x1, x23
	bl	_radeon_ring_write
	mov	x0, x20
	mov	x1, x24
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #536813567
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #0
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #536813567
	bl	_radeon_ring_write
	mov	x0, x20
	mov	x1, x22
	bl	_radeon_ring_write
	mov	x0, x20
	mov	x1, x22
	bl	_radeon_ring_write
	orr	w1, w21, w28
	mov	x0, x20
	bl	_radeon_ring_write
	cbnz	w22, LBB0_4
LBB0_5:
Lloh44:
	adrp	x8, _RADEON_DSTCACHE_CTLSTAT@GOTPAGE
Lloh45:
	ldr	x8, [x8, _RADEON_DSTCACHE_CTLSTAT@GOTPAGEOFF]
Lloh46:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
Lloh47:
	adrp	x8, _RADEON_RB2D_DC_FLUSH_ALL@GOTPAGE
Lloh48:
	ldr	x8, [x8, _RADEON_RB2D_DC_FLUSH_ALL@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_radeon_ring_write
Lloh50:
	adrp	x8, _RADEON_WAIT_UNTIL@GOTPAGE
Lloh51:
	ldr	x8, [x8, _RADEON_WAIT_UNTIL@GOTPAGEOFF]
Lloh52:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
Lloh53:
	adrp	x8, _RADEON_WAIT_2D_IDLECLEAN@GOTPAGE
Lloh54:
	ldr	x8, [x8, _RADEON_WAIT_2D_IDLECLEAN@GOTPAGEOFF]
Lloh55:
	ldr	w8, [x8]
Lloh56:
	adrp	x9, _RADEON_WAIT_HOST_IDLECLEAN@GOTPAGE
Lloh57:
	ldr	x9, [x9, _RADEON_WAIT_HOST_IDLECLEAN@GOTPAGEOFF]
Lloh58:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh59:
	adrp	x9, _RADEON_WAIT_DMA_GUI_IDLE@GOTPAGE
Lloh60:
	ldr	x9, [x9, _RADEON_WAIT_DMA_GUI_IDLE@GOTPAGEOFF]
Lloh61:
	ldr	w9, [x9]
	orr	w1, w8, w9
	mov	x0, x20
	bl	_radeon_ring_write
	ldr	x1, [sp]                        ; 8-byte Folded Reload
	cbz	x1, LBB0_7
; %bb.6:
Lloh62:
	adrp	x8, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh63:
	ldr	x8, [x8, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh64:
	ldr	x2, [x8]
	ldr	x19, [sp, #8]                   ; 8-byte Folded Reload
	mov	x0, x19
	bl	_radeon_fence_emit
	mov	x21, x0
	b	LBB0_8
LBB0_7:
	mov	w21, #0
	ldr	x19, [sp, #8]                   ; 8-byte Folded Reload
LBB0_8:
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_ring_unlock_commit
LBB0_9:
	mov	x0, x21
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ; @RADEON_GPU_PAGE_SIZE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"radeon: moving bo (%d) asking for %u dw.\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_PACKET3_BITBLT_MULTI,4,2       ; @PACKET3_BITBLT_MULTI
	.comm	_RADEON_GMC_SRC_PITCH_OFFSET_CNTL,4,2 ; @RADEON_GMC_SRC_PITCH_OFFSET_CNTL
	.comm	_RADEON_GMC_DST_PITCH_OFFSET_CNTL,4,2 ; @RADEON_GMC_DST_PITCH_OFFSET_CNTL
	.comm	_RADEON_GMC_SRC_CLIPPING,4,2    ; @RADEON_GMC_SRC_CLIPPING
	.comm	_RADEON_GMC_DST_CLIPPING,4,2    ; @RADEON_GMC_DST_CLIPPING
	.comm	_RADEON_GMC_BRUSH_NONE,4,2      ; @RADEON_GMC_BRUSH_NONE
	.comm	_RADEON_COLOR_FORMAT_ARGB8888,4,2 ; @RADEON_COLOR_FORMAT_ARGB8888
	.comm	_RADEON_GMC_SRC_DATATYPE_COLOR,4,2 ; @RADEON_GMC_SRC_DATATYPE_COLOR
	.comm	_RADEON_ROP3_S,4,2              ; @RADEON_ROP3_S
	.comm	_RADEON_DP_SRC_SOURCE_MEMORY,4,2 ; @RADEON_DP_SRC_SOURCE_MEMORY
	.comm	_RADEON_GMC_CLR_CMP_CNTL_DIS,4,2 ; @RADEON_GMC_CLR_CMP_CNTL_DIS
	.comm	_RADEON_GMC_WR_MSK_DIS,4,2      ; @RADEON_GMC_WR_MSK_DIS
	.comm	_RADEON_DSTCACHE_CTLSTAT,4,2    ; @RADEON_DSTCACHE_CTLSTAT
	.comm	_RADEON_RB2D_DC_FLUSH_ALL,4,2   ; @RADEON_RB2D_DC_FLUSH_ALL
	.comm	_RADEON_WAIT_UNTIL,4,2          ; @RADEON_WAIT_UNTIL
	.comm	_RADEON_WAIT_2D_IDLECLEAN,4,2   ; @RADEON_WAIT_2D_IDLECLEAN
	.comm	_RADEON_WAIT_HOST_IDLECLEAN,4,2 ; @RADEON_WAIT_HOST_IDLECLEAN
	.comm	_RADEON_WAIT_DMA_GUI_IDLE,4,2   ; @RADEON_WAIT_DMA_GUI_IDLE
.subsections_via_symbols
