	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_atom_get_clock_info     ## -- Begin function radeon_atom_get_clock_info
	.p2align	4, 0x90
_radeon_atom_get_clock_info:            ## @radeon_atom_get_clock_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$32, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rbx
	movq	_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_FirmwareInfo@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_GetIndexIntoMasterTable
	movq	8(%rbx), %rdi
	xorl	%r14d, %r14d
	leaq	-52(%rbp), %rcx
	leaq	-36(%rbp), %r8
	leaq	-48(%rbp), %r9
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_atom_parse_data_header
	testq	%rax, %rax
	je	LBB0_21
## %bb.1:
	movq	8(%rbx), %rax
	movq	(%rax), %rax
	movq	-48(%rbp), %rcx
	leaq	(%rcx,%rax), %r14
	movl	32(%rcx,%rax), %edi
	callq	_le16_to_cpu
	movl	%eax, 208(%rbx)
	movq	$0, 240(%rbx)
	cmpl	$1, -36(%rbp)
	jg	LBB0_3
## %bb.2:
	movl	64(%r14), %edi
	callq	_le16_to_cpu
                                        ## kill: def $eax killed $eax def $rax
	jmp	LBB0_4
LBB0_3:
	movl	(%r14), %edi
	callq	_le32_to_cpu
LBB0_4:
	movl	%eax, 212(%rbx)
	movl	60(%r14), %edi
	callq	_le32_to_cpu
	movl	%eax, 216(%rbx)
	cmpl	$4, -36(%rbp)
	jl	LBB0_22
## %bb.5:
	movl	4(%r14), %edi
	callq	_le16_to_cpu
	imull	$100, %eax, %ecx
	movl	%ecx, 220(%rbx)
	testl	%eax, %eax
	jne	LBB0_7
## %bb.6:
	movl	212(%rbx), %eax
	movl	%eax, 220(%rbx)
LBB0_7:
	movl	(%r14), %edi
	callq	_le16_to_cpu
	imull	$100, %eax, %ecx
	movl	%ecx, 224(%rbx)
	testl	%eax, %eax
	jne	LBB0_9
## %bb.8:
	movl	216(%rbx), %eax
	movl	%eax, 224(%rbx)
LBB0_9:
	movl	212(%rbx), %ecx
	jmp	LBB0_10
LBB0_22:
	movl	212(%rbx), %ecx
	movl	%ecx, 220(%rbx)
	movl	%eax, 224(%rbx)
LBB0_10:
	leaq	208(%rbx), %r15
	leaq	168(%rbx), %r12
	testl	%ecx, %ecx
	jne	LBB0_12
## %bb.11:
	movq	%rbx, %rdi
	callq	_ASIC_IS_AVIVO
	testq	%rax, %rax
	movl	$20000, %eax                    ## imm = 0x4E20
	movl	$64800, %ecx                    ## imm = 0xFD20
	cmovel	%eax, %ecx
	movl	%ecx, 212(%rbx)
LBB0_12:
	movl	56(%r14), %edi
	callq	_le16_to_cpu
	movl	%eax, 228(%rbx)
	movl	52(%r14), %edi
	callq	_le16_to_cpu
	movl	%eax, 232(%rbx)
	movups	(%r15), %xmm0
	movups	16(%r15), %xmm1
	movups	%xmm0, (%r12)
	movups	%xmm1, 16(%r12)
	movq	32(%r15), %rax
	movq	%rax, 32(%r12)
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE4
	leaq	12(%r14), %rcx
	leaq	32(%r14), %r12
	testq	%rax, %rax
	cmoveq	%r12, %rcx
	movl	(%rcx), %edi
	callq	_le16_to_cpu
	movl	%eax, 88(%rbx)
	movq	$0, 120(%rbx)
	movl	48(%r14), %edi
	callq	_le16_to_cpu
	movl	%eax, 92(%rbx)
	movl	44(%r14), %edi
	callq	_le32_to_cpu
	movl	%eax, 96(%rbx)
	cmpl	$0, 92(%rbx)
	jne	LBB0_14
## %bb.13:
	movq	%rbx, %rdi
	callq	_ASIC_IS_AVIVO
	testq	%rax, %rax
	movl	$20000, %eax                    ## imm = 0x4E20
	movl	$64800, %ecx                    ## imm = 0xFD20
	cmovel	%eax, %ecx
	movl	%ecx, 92(%rbx)
LBB0_14:
	movl	40(%r14), %edi
	callq	_le16_to_cpu
	movl	%eax, 108(%rbx)
	movl	36(%r14), %edi
	callq	_le16_to_cpu
	movl	%eax, 112(%rbx)
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE4
	leaq	8(%r14), %rcx
	testq	%rax, %rax
	cmoveq	%r12, %rcx
	movl	(%rcx), %edi
	callq	_le16_to_cpu
	movl	%eax, 48(%rbx)
	movq	$0, 80(%rbx)
	movl	28(%r14), %edi
	callq	_le16_to_cpu
	movl	%eax, 52(%rbx)
	movl	24(%r14), %edi
	callq	_le32_to_cpu
	movl	%eax, 56(%rbx)
	cmpl	$0, 52(%rbx)
	jne	LBB0_16
## %bb.15:
	movq	%rbx, %rdi
	callq	_ASIC_IS_AVIVO
	testq	%rax, %rax
	movl	$20000, %eax                    ## imm = 0x4E20
	movl	$64800, %ecx                    ## imm = 0xFD20
	cmovel	%eax, %ecx
	movl	%ecx, 52(%rbx)
LBB0_16:
	leaq	128(%rbx), %r12
	movl	20(%r14), %edi
	callq	_le16_to_cpu
	movl	%eax, 68(%rbx)
	movl	16(%r14), %edi
	callq	_le16_to_cpu
	movl	%eax, 72(%rbx)
	movl	12(%r14), %edi
	callq	_le32_to_cpu
	movq	%rax, 40(%rbx)
	movl	8(%r14), %edi
	callq	_le32_to_cpu
	movq	%rax, 32(%rbx)
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE4
	testq	%rax, %rax
	je	LBB0_20
## %bb.17:
	movl	4(%r14), %edi
	callq	_le32_to_cpu
	movl	%eax, 16(%rbx)
	testl	%eax, %eax
	jne	LBB0_19
## %bb.18:
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE5
	testq	%rax, %rax
	movl	$60000, %eax                    ## imm = 0xEA60
	movl	$54000, %ecx                    ## imm = 0xD2F0
	cmovel	%eax, %ecx
	movl	%ecx, 16(%rbx)
LBB0_19:
	movl	(%r14), %edi
	callq	_le16_to_cpu
	movl	%eax, 20(%rbx)
LBB0_20:
	movq	32(%r15), %rax
	movq	%rax, 32(%r12)
	movups	(%r15), %xmm0
	movups	16(%r15), %xmm1
	movups	%xmm1, 16(%r12)
	movups	%xmm0, (%r12)
	movl	4(%r14), %edi
	callq	_le16_to_cpu
	testl	%eax, %eax
	movl	$40000, %ecx                    ## imm = 0x9C40
	cmovnel	%eax, %ecx
	movl	%ecx, 24(%rbx)
	movl	(%r14), %edi
	callq	_le16_to_cpu
	movl	%eax, (%rbx)
	movl	$1, %r14d
LBB0_21:
	movl	%r14d, %eax
	addq	$32, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DATA,4,2                       ## @DATA
	.comm	_FirmwareInfo,4,2               ## @FirmwareInfo
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_atom_get_clock_info     ; -- Begin function radeon_atom_get_clock_info
	.p2align	2
_radeon_atom_get_clock_info:            ; @radeon_atom_get_clock_info
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x19, [x0]
Lloh0:
	adrp	x8, _DATA@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DATA@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _FirmwareInfo@GOTPAGE
Lloh4:
	ldr	x8, [x8, _FirmwareInfo@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_GetIndexIntoMasterTable
	mov	x1, x0
	ldr	x0, [x19, #8]
	add	x3, sp, #12
	add	x4, sp, #8
	mov	x5, sp
	mov	x2, #0
	bl	_atom_parse_data_header
	cbz	x0, LBB0_22
; %bb.1:
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	ldr	x9, [sp]
	add	x20, x9, x8
	ldr	w0, [x20, #32]
	bl	_le16_to_cpu
	str	w0, [x19, #208]
	str	xzr, [x19, #240]
	ldr	w8, [sp, #8]
	cmp	w8, #1
	b.gt	LBB0_3
; %bb.2:
	ldr	w0, [x20, #64]
	bl	_le16_to_cpu
                                        ; kill: def $w0 killed $w0 def $x0
	b	LBB0_4
LBB0_3:
	ldr	w0, [x20]
	bl	_le32_to_cpu
LBB0_4:
	str	w0, [x19, #212]
	ldr	w0, [x20, #60]
	bl	_le32_to_cpu
	str	w0, [x19, #216]
	ldr	w8, [sp, #8]
	cmp	w8, #4
	b.lt	LBB0_10
; %bb.5:
	ldr	w0, [x20, #4]
	bl	_le16_to_cpu
	mov	w21, #100
	mul	w8, w0, w21
	str	w8, [x19, #220]
	cbnz	w0, LBB0_7
; %bb.6:
	ldr	w8, [x19, #212]
	str	w8, [x19, #220]
LBB0_7:
	ldr	w0, [x20]
	bl	_le16_to_cpu
	mul	w8, w0, w21
	str	w8, [x19, #224]
	cbnz	w0, LBB0_9
; %bb.8:
	ldr	w8, [x19, #216]
	str	w8, [x19, #224]
LBB0_9:
	ldr	w8, [x19, #212]
	b	LBB0_11
LBB0_10:
	ldr	w8, [x19, #212]
	stp	w8, w0, [x19, #220]
LBB0_11:
	add	x21, x19, #208
	add	x22, x19, #168
	cbnz	w8, LBB0_13
; %bb.12:
	mov	x0, x19
	bl	_ASIC_IS_AVIVO
	cmp	x0, #0
	mov	w8, #64800
	mov	w9, #20000
	csel	w8, w9, w8, eq
	str	w8, [x19, #212]
LBB0_13:
	ldr	w0, [x20, #56]
	bl	_le16_to_cpu
	str	w0, [x19, #228]
	ldr	w0, [x20, #52]
	bl	_le16_to_cpu
	str	w0, [x19, #232]
	ldp	q0, q1, [x21]
	stp	q0, q1, [x22]
	ldr	x8, [x21, #32]
	str	x8, [x22, #32]
	mov	x0, x19
	bl	_ASIC_IS_DCE4
	mov	w8, #12
	mov	w9, #32
	cmp	x0, #0
	csel	x8, x9, x8, eq
	ldr	w0, [x20, x8]
	bl	_le16_to_cpu
	str	w0, [x19, #88]
	str	xzr, [x19, #120]
	ldr	w0, [x20, #48]
	bl	_le16_to_cpu
	str	w0, [x19, #92]
	ldr	w0, [x20, #44]
	bl	_le32_to_cpu
	str	w0, [x19, #96]
	ldr	w8, [x19, #92]
	cbnz	w8, LBB0_15
; %bb.14:
	mov	x0, x19
	bl	_ASIC_IS_AVIVO
	cmp	x0, #0
	mov	w8, #64800
	mov	w9, #20000
	csel	w8, w9, w8, eq
	str	w8, [x19, #92]
LBB0_15:
	ldr	w0, [x20, #40]
	bl	_le16_to_cpu
	str	w0, [x19, #108]
	ldr	w0, [x20, #36]
	bl	_le16_to_cpu
	str	w0, [x19, #112]
	mov	x0, x19
	bl	_ASIC_IS_DCE4
	mov	w8, #8
	mov	w9, #32
	cmp	x0, #0
	csel	x8, x9, x8, eq
	ldr	w0, [x20, x8]
	bl	_le16_to_cpu
	str	w0, [x19, #48]
	str	xzr, [x19, #80]
	ldr	w0, [x20, #28]
	bl	_le16_to_cpu
	str	w0, [x19, #52]
	ldr	w0, [x20, #24]
	bl	_le32_to_cpu
	str	w0, [x19, #56]
	ldr	w8, [x19, #52]
	cbnz	w8, LBB0_17
; %bb.16:
	mov	x0, x19
	bl	_ASIC_IS_AVIVO
	cmp	x0, #0
	mov	w8, #64800
	mov	w9, #20000
	csel	w8, w9, w8, eq
	str	w8, [x19, #52]
LBB0_17:
	add	x22, x19, #128
	ldr	w0, [x20, #20]
	bl	_le16_to_cpu
	str	w0, [x19, #68]
	ldr	w0, [x20, #16]
	bl	_le16_to_cpu
	str	w0, [x19, #72]
	ldr	w0, [x20, #12]
	bl	_le32_to_cpu
	str	x0, [x19, #40]
	ldr	w0, [x20, #8]
	bl	_le32_to_cpu
	str	x0, [x19, #32]
	mov	x0, x19
	bl	_ASIC_IS_DCE4
	cbz	x0, LBB0_21
; %bb.18:
	ldr	w0, [x20, #4]
	bl	_le32_to_cpu
	str	w0, [x19, #16]
	cbnz	w0, LBB0_20
; %bb.19:
	mov	x0, x19
	bl	_ASIC_IS_DCE5
	cmp	x0, #0
	mov	w8, #54000
	mov	w9, #60000
	csel	w8, w9, w8, eq
	str	w8, [x19, #16]
LBB0_20:
	ldr	w0, [x20]
	bl	_le16_to_cpu
	str	w0, [x19, #20]
LBB0_21:
	ldp	q0, q1, [x21]
	stp	q0, q1, [x22]
	ldr	x8, [x21, #32]
	str	x8, [x22, #32]
	ldr	w0, [x20, #4]
	bl	_le16_to_cpu
	mov	w8, #40000
	cmp	w0, #0
	csel	w8, w8, w0, eq
	str	w8, [x19, #24]
	ldr	w0, [x20]
	bl	_le16_to_cpu
	str	w0, [x19]
	mov	w0, #1
LBB0_22:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_DATA,4,2                       ; @DATA
	.comm	_FirmwareInfo,4,2               ; @FirmwareInfo
.subsections_via_symbols
