	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_restore_bios_scratch_regs ## -- Begin function radeon_restore_bios_scratch_regs
	.p2align	4, 0x90
_radeon_restore_bios_scratch_regs:      ## @radeon_restore_bios_scratch_regs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	(%rdi), %rax
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_1
## %bb.2:
	movq	_RADEON_BIOS_0_SCRATCH@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_R600_BIOS_0_SCRATCH@GOTPCREL(%rip), %rax
LBB0_3:
	movq	_RADEON_BIOS_NUM_SCRATCH@GOTPCREL(%rip), %r15
	cmpl	$0, (%r15)
	jle	LBB0_6
## %bb.4:
	movq	(%rax), %r12
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r14), %rax
	movl	(%rax,%rbx,4), %esi
	movq	%r12, %rdi
	callq	_WREG32
	incq	%rbx
	movslq	(%r15), %rax
	addq	$4, %r12
	cmpq	%rax, %rbx
	jl	LBB0_5
LBB0_6:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_R600,8,3                  ## @CHIP_R600
	.comm	_R600_BIOS_0_SCRATCH,8,3        ## @R600_BIOS_0_SCRATCH
	.comm	_RADEON_BIOS_0_SCRATCH,8,3      ## @RADEON_BIOS_0_SCRATCH
	.comm	_RADEON_BIOS_NUM_SCRATCH,4,2    ## @RADEON_BIOS_NUM_SCRATCH
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_restore_bios_scratch_regs ; -- Begin function radeon_restore_bios_scratch_regs
	.p2align	2
_radeon_restore_bios_scratch_regs:      ; @radeon_restore_bios_scratch_regs
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
Lloh0:
	adrp	x8, _CHIP_R600@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CHIP_R600@GOTPAGEOFF]
	ldr	x9, [x0]
Lloh2:
	ldr	x8, [x8]
Lloh3:
	adrp	x10, _RADEON_BIOS_0_SCRATCH@GOTPAGE
Lloh4:
	ldr	x10, [x10, _RADEON_BIOS_0_SCRATCH@GOTPAGEOFF]
Lloh5:
	adrp	x11, _R600_BIOS_0_SCRATCH@GOTPAGE
Lloh6:
	ldr	x11, [x11, _R600_BIOS_0_SCRATCH@GOTPAGEOFF]
	cmp	x9, x8
	csel	x8, x10, x11, lt
Lloh7:
	adrp	x21, _RADEON_BIOS_NUM_SCRATCH@GOTPAGE
Lloh8:
	ldr	x21, [x21, _RADEON_BIOS_NUM_SCRATCH@GOTPAGEOFF]
	ldr	w9, [x21]
	cmp	w9, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x19, x0
	mov	x22, #0
	ldr	x20, [x8]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #8]
	ldr	w1, [x8, x22, lsl #2]
	mov	x0, x20
	bl	_WREG32
	add	x22, x22, #1
	ldrsw	x8, [x21]
	add	x20, x20, #4
	cmp	x22, x8
	b.lt	LBB0_2
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_R600,8,3                  ; @CHIP_R600
	.comm	_R600_BIOS_0_SCRATCH,8,3        ; @R600_BIOS_0_SCRATCH
	.comm	_RADEON_BIOS_0_SCRATCH,8,3      ; @RADEON_BIOS_0_SCRATCH
	.comm	_RADEON_BIOS_NUM_SCRATCH,4,2    ; @RADEON_BIOS_NUM_SCRATCH
.subsections_via_symbols
