	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_set_pcigart
_radeon_set_pcigart:                    ## @radeon_set_pcigart
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movl	(%rdi), %eax
	movq	_RADEON_FAMILY_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	movq	_CHIP_RS690@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	je	LBB0_9
## %bb.1:
	movq	_CHIP_RS740@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	je	LBB0_9
## %bb.2:
	movq	_RADEON_IS_IGPGART@GOTPCREL(%rip), %rdx
	testl	%eax, (%rdx)
	je	LBB0_3
LBB0_9:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_set_igpgart             ## TAILCALL
LBB0_3:
	movq	_CHIP_RS600@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	jne	LBB0_4
## %bb.10:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_rs600_set_igpgart              ## TAILCALL
LBB0_4:
	movq	_RADEON_IS_PCIE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_5
## %bb.11:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_set_pciegart            ## TAILCALL
LBB0_5:
	movq	_RADEON_AIC_CNTL@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RADEON_READ
	movl	(%r15), %edi
	movq	_RADEON_PCIGART_TRANSLATE_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	testl	%r14d, %r14d
	je	LBB0_7
## %bb.6:
	orl	%eax, %esi
	callq	_RADEON_WRITE
	movq	_RADEON_AIC_PT_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	12(%rbx), %esi
	callq	_RADEON_WRITE
	movq	_RADEON_AIC_LO_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	4(%rbx), %esi
	callq	_RADEON_WRITE
	movq	_RADEON_AIC_HI_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	4(%rbx), %eax
	movl	8(%rbx), %ecx
	leal	(%rax,%rcx), %esi
	decl	%esi
	callq	_RADEON_WRITE
	movq	%rbx, %rdi
	movl	$-64, %esi
	callq	_radeon_write_agp_location
	movq	_RADEON_AGP_COMMAND@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	jmp	LBB0_8
LBB0_7:
	notl	%esi
	andl	%esi, %eax
	movl	%eax, %esi
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_RADEON_WRITE                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_FAMILY_MASK,4,2         ## @RADEON_FAMILY_MASK
	.comm	_CHIP_RS690,4,2                 ## @CHIP_RS690
	.comm	_CHIP_RS740,4,2                 ## @CHIP_RS740
	.comm	_RADEON_IS_IGPGART,4,2          ## @RADEON_IS_IGPGART
	.comm	_CHIP_RS600,4,2                 ## @CHIP_RS600
	.comm	_RADEON_IS_PCIE,4,2             ## @RADEON_IS_PCIE
	.comm	_RADEON_AIC_CNTL,4,2            ## @RADEON_AIC_CNTL
	.comm	_RADEON_PCIGART_TRANSLATE_EN,4,2 ## @RADEON_PCIGART_TRANSLATE_EN
	.comm	_RADEON_AIC_PT_BASE,4,2         ## @RADEON_AIC_PT_BASE
	.comm	_RADEON_AIC_LO_ADDR,4,2         ## @RADEON_AIC_LO_ADDR
	.comm	_RADEON_AIC_HI_ADDR,4,2         ## @RADEON_AIC_HI_ADDR
	.comm	_RADEON_AGP_COMMAND,4,2         ## @RADEON_AGP_COMMAND
	.no_dead_strip	_radeon_set_pcigart
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_set_pcigart
_radeon_set_pcigart:                    ; @radeon_set_pcigart
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _RADEON_FAMILY_MASK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_FAMILY_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	and	w9, w9, w8
Lloh3:
	adrp	x10, _CHIP_RS690@GOTPAGE
Lloh4:
	ldr	x10, [x10, _CHIP_RS690@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
Lloh6:
	adrp	x11, _CHIP_RS740@GOTPAGE
Lloh7:
	ldr	x11, [x11, _CHIP_RS740@GOTPAGEOFF]
Lloh8:
	ldr	w11, [x11]
	cmp	w9, w10
	ccmp	w9, w11, #4, ne
	b.eq	LBB0_2
; %bb.1:
Lloh9:
	adrp	x10, _RADEON_IS_IGPGART@GOTPAGE
Lloh10:
	ldr	x10, [x10, _RADEON_IS_IGPGART@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	tst	w10, w8
	b.eq	LBB0_3
LBB0_2:
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_radeon_set_igpgart
LBB0_3:
Lloh12:
	adrp	x10, _CHIP_RS600@GOTPAGE
Lloh13:
	ldr	x10, [x10, _CHIP_RS600@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
	cmp	w9, w10
	b.ne	LBB0_5
; %bb.4:
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_rs600_set_igpgart
LBB0_5:
Lloh15:
	adrp	x9, _RADEON_IS_PCIE@GOTPAGE
Lloh16:
	ldr	x9, [x9, _RADEON_IS_PCIE@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_7
; %bb.6:
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_radeon_set_pciegart
LBB0_7:
Lloh18:
	adrp	x21, _RADEON_AIC_CNTL@GOTPAGE
Lloh19:
	ldr	x21, [x21, _RADEON_AIC_CNTL@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_RADEON_READ
	mov	x8, x0
	ldr	w0, [x21]
Lloh20:
	adrp	x9, _RADEON_PCIGART_TRANSLATE_EN@GOTPAGE
Lloh21:
	ldr	x9, [x9, _RADEON_PCIGART_TRANSLATE_EN@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	cbz	w20, LBB0_9
; %bb.8:
	orr	w1, w9, w8
	bl	_RADEON_WRITE
Lloh23:
	adrp	x8, _RADEON_AIC_PT_BASE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _RADEON_AIC_PT_BASE@GOTPAGEOFF]
Lloh25:
	ldr	w0, [x8]
	ldr	w1, [x19, #12]
	bl	_RADEON_WRITE
Lloh26:
	adrp	x8, _RADEON_AIC_LO_ADDR@GOTPAGE
Lloh27:
	ldr	x8, [x8, _RADEON_AIC_LO_ADDR@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
	ldr	w1, [x19, #4]
	bl	_RADEON_WRITE
Lloh29:
	adrp	x8, _RADEON_AIC_HI_ADDR@GOTPAGE
Lloh30:
	ldr	x8, [x8, _RADEON_AIC_HI_ADDR@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	ldp	w8, w9, [x19, #4]
	add	w8, w8, w9
	sub	w1, w8, #1
	bl	_RADEON_WRITE
	mov	x0, x19
	mov	w1, #-64
	bl	_radeon_write_agp_location
Lloh32:
	adrp	x8, _RADEON_AGP_COMMAND@GOTPAGE
Lloh33:
	ldr	x8, [x8, _RADEON_AGP_COMMAND@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
	mov	w1, #0
	b	LBB0_10
LBB0_9:
	bic	w1, w8, w9
LBB0_10:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_RADEON_WRITE
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_FAMILY_MASK,4,2         ; @RADEON_FAMILY_MASK
	.comm	_CHIP_RS690,4,2                 ; @CHIP_RS690
	.comm	_CHIP_RS740,4,2                 ; @CHIP_RS740
	.comm	_RADEON_IS_IGPGART,4,2          ; @RADEON_IS_IGPGART
	.comm	_CHIP_RS600,4,2                 ; @CHIP_RS600
	.comm	_RADEON_IS_PCIE,4,2             ; @RADEON_IS_PCIE
	.comm	_RADEON_AIC_CNTL,4,2            ; @RADEON_AIC_CNTL
	.comm	_RADEON_PCIGART_TRANSLATE_EN,4,2 ; @RADEON_PCIGART_TRANSLATE_EN
	.comm	_RADEON_AIC_PT_BASE,4,2         ; @RADEON_AIC_PT_BASE
	.comm	_RADEON_AIC_LO_ADDR,4,2         ; @RADEON_AIC_LO_ADDR
	.comm	_RADEON_AIC_HI_ADDR,4,2         ; @RADEON_AIC_HI_ADDR
	.comm	_RADEON_AGP_COMMAND,4,2         ; @RADEON_AGP_COMMAND
	.no_dead_strip	_radeon_set_pcigart
.subsections_via_symbols
