	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tg3_serdes_parallel_detect
_tg3_serdes_parallel_detect:            ## @tg3_serdes_parallel_detect
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	24(%rdi), %rax
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	decq	%rax
	movq	%rax, 24(%rbx)
LBB0_12:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	cmpq	$0, 16(%rbx)
	movq	8(%rbx), %rax
	movq	_AUTONEG_ENABLE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	je	LBB0_3
## %bb.8:
	cmpq	%rcx, %rax
	jne	LBB0_12
## %bb.9:
	movq	_TG3_PHYFLG_PARALLEL_DETECT@GOTPCREL(%rip), %r14
	movl	(%r14), %eax
	testl	%eax, (%rbx)
	je	LBB0_12
## %bb.10:
	movq	_MII_TG3_DSP_ADDRESS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MII_TG3_DSP_EXP1_INT_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_tg3_writephy
	movq	_MII_TG3_DSP_RW_PORT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_tg3_readphy
	testb	$32, -44(%rbp)
	je	LBB0_12
## %bb.11:
	movq	_MII_BMCR@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-48(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_tg3_readphy
	movl	(%r15), %esi
	movq	_BMCR_ANENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	orl	-48(%rbp), %edx
	movq	%rbx, %rdi
	callq	_tg3_writephy
	movl	(%r14), %eax
	notl	%eax
	andl	%eax, (%rbx)
	jmp	LBB0_12
LBB0_3:
	cmpq	%rcx, %rax
	jne	LBB0_12
## %bb.4:
	movq	_MII_BMCR@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-44(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_tg3_readphy
	movq	_BMCR_ANENABLE@GOTPCREL(%rip), %r12
	movl	(%r12), %eax
	testl	%eax, -44(%rbp)
	je	LBB0_12
## %bb.5:
	movq	_MII_TG3_MISC_SHDW@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$31744, %edx                    ## imm = 0x7C00
	callq	_tg3_writephy
	movl	(%r14), %esi
	leaq	-48(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_tg3_readphy
	movq	_MII_TG3_DSP_ADDRESS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MII_TG3_DSP_EXP1_INT_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_tg3_writephy
	movq	_MII_TG3_DSP_RW_PORT@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	leaq	-52(%rbp), %r14
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_tg3_readphy
	movl	(%r13), %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_tg3_readphy
	testb	$16, -48(%rbp)
	je	LBB0_12
## %bb.6:
	testb	$32, -52(%rbp)
	jne	LBB0_12
## %bb.7:
	movl	(%r12), %edx
	notl	%edx
	andl	-44(%rbp), %edx
	movq	_BMCR_SPEED1000@GOTPCREL(%rip), %rax
	movq	_BMCR_FULLDPLX@GOTPCREL(%rip), %rcx
	orl	(%rax), %edx
	orl	(%rcx), %edx
	movl	%edx, -44(%rbp)
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_tg3_writephy
	movq	_TG3_PHYFLG_PARALLEL_DETECT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%rbx)
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.comm	_AUTONEG_ENABLE,8,3             ## @AUTONEG_ENABLE
	.comm	_MII_BMCR,4,2                   ## @MII_BMCR
	.comm	_BMCR_ANENABLE,4,2              ## @BMCR_ANENABLE
	.comm	_MII_TG3_MISC_SHDW,4,2          ## @MII_TG3_MISC_SHDW
	.comm	_MII_TG3_DSP_ADDRESS,4,2        ## @MII_TG3_DSP_ADDRESS
	.comm	_MII_TG3_DSP_EXP1_INT_STAT,4,2  ## @MII_TG3_DSP_EXP1_INT_STAT
	.comm	_MII_TG3_DSP_RW_PORT,4,2        ## @MII_TG3_DSP_RW_PORT
	.comm	_BMCR_SPEED1000,4,2             ## @BMCR_SPEED1000
	.comm	_BMCR_FULLDPLX,4,2              ## @BMCR_FULLDPLX
	.comm	_TG3_PHYFLG_PARALLEL_DETECT,4,2 ## @TG3_PHYFLG_PARALLEL_DETECT
	.no_dead_strip	_tg3_serdes_parallel_detect
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tg3_serdes_parallel_detect
_tg3_serdes_parallel_detect:            ; @tg3_serdes_parallel_detect
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0, #24]
	cbz	x8, LBB0_3
; %bb.1:
	sub	x8, x8, #1
	str	x8, [x19, #24]
LBB0_2:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_3:
	ldp	x8, x10, [x19, #8]
Lloh0:
	adrp	x9, _AUTONEG_ENABLE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AUTONEG_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	cbz	x10, LBB0_8
; %bb.4:
	b.ne	LBB0_2
; %bb.5:
	ldr	w8, [x19]
Lloh3:
	adrp	x20, _TG3_PHYFLG_PARALLEL_DETECT@GOTPAGE
Lloh4:
	ldr	x20, [x20, _TG3_PHYFLG_PARALLEL_DETECT@GOTPAGEOFF]
	ldr	w9, [x20]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.6:
Lloh5:
	adrp	x8, _MII_TG3_DSP_ADDRESS@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MII_TG3_DSP_ADDRESS@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
Lloh8:
	adrp	x8, _MII_TG3_DSP_EXP1_INT_STAT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MII_TG3_DSP_EXP1_INT_STAT@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tg3_writephy
Lloh11:
	adrp	x8, _MII_TG3_DSP_RW_PORT@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MII_TG3_DSP_RW_PORT@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	add	x2, sp, #12
	mov	x0, x19
	bl	_tg3_readphy
	ldrb	w8, [sp, #12]
	tbz	w8, #5, LBB0_2
; %bb.7:
Lloh14:
	adrp	x21, _MII_BMCR@GOTPAGE
Lloh15:
	ldr	x21, [x21, _MII_BMCR@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #8
	mov	x0, x19
	bl	_tg3_readphy
	ldr	w1, [x21]
	ldr	w8, [sp, #8]
Lloh16:
	adrp	x9, _BMCR_ANENABLE@GOTPAGE
Lloh17:
	ldr	x9, [x9, _BMCR_ANENABLE@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_tg3_writephy
	ldr	w8, [x20]
	ldr	w9, [x19]
	bic	w8, w9, w8
	b	LBB0_13
LBB0_8:
	b.ne	LBB0_2
; %bb.9:
Lloh19:
	adrp	x20, _MII_BMCR@GOTPAGE
Lloh20:
	ldr	x20, [x20, _MII_BMCR@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	mov	x0, x19
	bl	_tg3_readphy
	ldr	w8, [sp, #12]
Lloh21:
	adrp	x21, _BMCR_ANENABLE@GOTPAGE
Lloh22:
	ldr	x21, [x21, _BMCR_ANENABLE@GOTPAGEOFF]
	ldr	w9, [x21]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.10:
Lloh23:
	adrp	x22, _MII_TG3_MISC_SHDW@GOTPAGE
Lloh24:
	ldr	x22, [x22, _MII_TG3_MISC_SHDW@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #31744
	bl	_tg3_writephy
	ldr	w1, [x22]
	add	x2, sp, #8
	mov	x0, x19
	bl	_tg3_readphy
Lloh25:
	adrp	x8, _MII_TG3_DSP_ADDRESS@GOTPAGE
Lloh26:
	ldr	x8, [x8, _MII_TG3_DSP_ADDRESS@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
Lloh28:
	adrp	x8, _MII_TG3_DSP_EXP1_INT_STAT@GOTPAGE
Lloh29:
	ldr	x8, [x8, _MII_TG3_DSP_EXP1_INT_STAT@GOTPAGEOFF]
Lloh30:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tg3_writephy
Lloh31:
	adrp	x22, _MII_TG3_DSP_RW_PORT@GOTPAGE
Lloh32:
	ldr	x22, [x22, _MII_TG3_DSP_RW_PORT@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x2, sp, #4
	mov	x0, x19
	bl	_tg3_readphy
	ldr	w1, [x22]
	add	x2, sp, #4
	mov	x0, x19
	bl	_tg3_readphy
	ldrb	w8, [sp, #8]
	tbz	w8, #4, LBB0_2
; %bb.11:
	ldrb	w8, [sp, #4]
	tbnz	w8, #5, LBB0_2
; %bb.12:
	ldr	w8, [x21]
	ldr	w9, [sp, #12]
	bic	w8, w9, w8
Lloh33:
	adrp	x9, _BMCR_SPEED1000@GOTPAGE
Lloh34:
	ldr	x9, [x9, _BMCR_SPEED1000@GOTPAGEOFF]
Lloh35:
	adrp	x10, _BMCR_FULLDPLX@GOTPAGE
Lloh36:
	ldr	x10, [x10, _BMCR_FULLDPLX@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
Lloh38:
	ldr	w10, [x10]
	orr	w8, w9, w8
	orr	w2, w8, w10
	str	w2, [sp, #12]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_tg3_writephy
Lloh39:
	adrp	x8, _TG3_PHYFLG_PARALLEL_DETECT@GOTPAGE
Lloh40:
	ldr	x8, [x8, _TG3_PHYFLG_PARALLEL_DETECT@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
LBB0_13:
	str	w8, [x19]
	b	LBB0_2
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh37
	.cfi_endproc
                                        ; -- End function
	.comm	_AUTONEG_ENABLE,8,3             ; @AUTONEG_ENABLE
	.comm	_MII_BMCR,4,2                   ; @MII_BMCR
	.comm	_BMCR_ANENABLE,4,2              ; @BMCR_ANENABLE
	.comm	_MII_TG3_MISC_SHDW,4,2          ; @MII_TG3_MISC_SHDW
	.comm	_MII_TG3_DSP_ADDRESS,4,2        ; @MII_TG3_DSP_ADDRESS
	.comm	_MII_TG3_DSP_EXP1_INT_STAT,4,2  ; @MII_TG3_DSP_EXP1_INT_STAT
	.comm	_MII_TG3_DSP_RW_PORT,4,2        ; @MII_TG3_DSP_RW_PORT
	.comm	_BMCR_SPEED1000,4,2             ; @BMCR_SPEED1000
	.comm	_BMCR_FULLDPLX,4,2              ; @BMCR_FULLDPLX
	.comm	_TG3_PHYFLG_PARALLEL_DETECT,4,2 ; @TG3_PHYFLG_PARALLEL_DETECT
	.no_dead_strip	_tg3_serdes_parallel_detect
.subsections_via_symbols
