	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_get_warpcore_lane
_bnx2x_get_warpcore_lane:               ## @bnx2x_get_warpcore_lane
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	8(%rsi), %r15
	movq	%r15, %rdi
	callq	_BP_PATH
	movl	%eax, %r14d
	movl	(%rbx), %ebx
	movq	%r15, %rdi
	callq	_bnx2x_is_4_port_mode
	testq	%rax, %rax
	je	LBB0_8
## %bb.1:
	movq	_MISC_REG_FOUR_PORT_PATH_SWAP_OVWR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	testb	$1, %al
	jne	LBB0_2
## %bb.3:
	movq	_MISC_REG_FOUR_PORT_PATH_SWAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	jmp	LBB0_4
LBB0_8:
	movq	_MISC_REG_TWO_PORT_PATH_SWAP_OVWR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	testb	$1, %al
	jne	LBB0_9
## %bb.10:
	movq	_MISC_REG_TWO_PORT_PATH_SWAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	jmp	LBB0_11
LBB0_2:
	andl	$2, %eax
LBB0_4:
	xorl	%ecx, %ecx
	testl	%eax, %eax
	setne	%cl
	xorl	%ecx, %r14d
	movq	_MISC_REG_FOUR_PORT_PORT_SWAP_OVWR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	testb	$1, %al
	jne	LBB0_5
## %bb.6:
	movq	_MISC_REG_FOUR_PORT_PORT_SWAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	jmp	LBB0_7
LBB0_5:
	andl	$2, %eax
LBB0_7:
	xorl	%ecx, %ecx
	testl	%eax, %eax
	setne	%cl
	xorl	%ecx, %ebx
	leal	(%r14,%rbx,2), %r14d
	jmp	LBB0_12
LBB0_9:
	andl	$2, %eax
LBB0_11:
	xorl	%ecx, %ecx
	testl	%eax, %eax
	setne	%cl
	xorl	%ecx, %r14d
	addl	%r14d, %r14d
LBB0_12:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MISC_REG_FOUR_PORT_PATH_SWAP_OVWR,4,2 ## @MISC_REG_FOUR_PORT_PATH_SWAP_OVWR
	.comm	_MISC_REG_FOUR_PORT_PATH_SWAP,4,2 ## @MISC_REG_FOUR_PORT_PATH_SWAP
	.comm	_MISC_REG_FOUR_PORT_PORT_SWAP_OVWR,4,2 ## @MISC_REG_FOUR_PORT_PORT_SWAP_OVWR
	.comm	_MISC_REG_FOUR_PORT_PORT_SWAP,4,2 ## @MISC_REG_FOUR_PORT_PORT_SWAP
	.comm	_MISC_REG_TWO_PORT_PATH_SWAP_OVWR,4,2 ## @MISC_REG_TWO_PORT_PATH_SWAP_OVWR
	.comm	_MISC_REG_TWO_PORT_PATH_SWAP,4,2 ## @MISC_REG_TWO_PORT_PATH_SWAP
	.no_dead_strip	_bnx2x_get_warpcore_lane
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_get_warpcore_lane
_bnx2x_get_warpcore_lane:               ; @bnx2x_get_warpcore_lane
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x1
	ldr	x19, [x1, #8]
	mov	x0, x19
	bl	_BP_PATH
	mov	x20, x0
	ldr	w21, [x21]
	mov	x0, x19
	bl	_bnx2x_is_4_port_mode
	cbz	x0, LBB0_3
; %bb.1:
Lloh0:
	adrp	x8, _MISC_REG_FOUR_PORT_PATH_SWAP_OVWR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MISC_REG_FOUR_PORT_PATH_SWAP_OVWR@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_RD
	tbnz	w0, #0, LBB0_5
; %bb.2:
Lloh3:
	adrp	x8, _MISC_REG_FOUR_PORT_PATH_SWAP@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MISC_REG_FOUR_PORT_PATH_SWAP@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_RD
	b	LBB0_6
LBB0_3:
Lloh6:
	adrp	x8, _MISC_REG_TWO_PORT_PATH_SWAP_OVWR@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MISC_REG_TWO_PORT_PATH_SWAP_OVWR@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_RD
	tbnz	w0, #0, LBB0_10
; %bb.4:
Lloh9:
	adrp	x8, _MISC_REG_TWO_PORT_PATH_SWAP@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MISC_REG_TWO_PORT_PATH_SWAP@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_RD
	b	LBB0_11
LBB0_5:
	and	w0, w0, #0x2
LBB0_6:
	cmp	w0, #0
	cset	w8, ne
	eor	w20, w20, w8
Lloh12:
	adrp	x8, _MISC_REG_FOUR_PORT_PORT_SWAP_OVWR@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MISC_REG_FOUR_PORT_PORT_SWAP_OVWR@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_RD
	tbnz	w0, #0, LBB0_8
; %bb.7:
Lloh15:
	adrp	x8, _MISC_REG_FOUR_PORT_PORT_SWAP@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MISC_REG_FOUR_PORT_PORT_SWAP@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_RD
	b	LBB0_9
LBB0_8:
	and	w0, w0, #0x2
LBB0_9:
	cmp	w0, #0
	cset	w8, ne
	eor	w8, w21, w8
	add	w0, w20, w8, lsl #1
	b	LBB0_12
LBB0_10:
	and	w0, w0, #0x2
LBB0_11:
	cmp	w0, #0
	cset	w8, ne
	eor	w8, w20, w8
	lsl	w0, w8, #1
LBB0_12:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_MISC_REG_FOUR_PORT_PATH_SWAP_OVWR,4,2 ; @MISC_REG_FOUR_PORT_PATH_SWAP_OVWR
	.comm	_MISC_REG_FOUR_PORT_PATH_SWAP,4,2 ; @MISC_REG_FOUR_PORT_PATH_SWAP
	.comm	_MISC_REG_FOUR_PORT_PORT_SWAP_OVWR,4,2 ; @MISC_REG_FOUR_PORT_PORT_SWAP_OVWR
	.comm	_MISC_REG_FOUR_PORT_PORT_SWAP,4,2 ; @MISC_REG_FOUR_PORT_PORT_SWAP
	.comm	_MISC_REG_TWO_PORT_PATH_SWAP_OVWR,4,2 ; @MISC_REG_TWO_PORT_PATH_SWAP_OVWR
	.comm	_MISC_REG_TWO_PORT_PATH_SWAP,4,2 ; @MISC_REG_TWO_PORT_PATH_SWAP
	.no_dead_strip	_bnx2x_get_warpcore_lane
.subsections_via_symbols
