	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_update_pfc_nig
_bnx2x_update_pfc_nig:                  ## @bnx2x_update_pfc_nig
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r12
	movq	(%rdi), %r14
	movq	16(%rdi), %r15
	movq	_FEATURE_CONFIG_PFC_ENABLED@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	andl	8(%rdi), %ebx
	movq	_NETIF_MSG_LINK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str(%rip), %rsi
	callq	_DP
	testq	%r14, %r14
	jne	LBB0_1
## %bb.2:
	movq	_NIG_REG_LLH0_XCM_MASK@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_NIG_REG_LLH1_XCM_MASK@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movl	%eax, %r13d
	testl	%ebx, %ebx
	je	LBB0_8
## %bb.4:
	movq	%r15, %rdi
	callq	_CHIP_IS_E3
	xorl	%edx, %edx
	testq	%rax, %rax
	sete	%al
	testq	%r14, %r14
	jne	LBB0_5
## %bb.6:
	movq	_NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN@GOTPCREL(%rip), %rcx
	jmp	LBB0_7
LBB0_8:
	testq	%r12, %r12
	je	LBB0_9
## %bb.10:
	movl	(%r12), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	4(%r12), %eax
	movl	8(%r12), %ebx
	jmp	LBB0_11
LBB0_5:
	movq	_NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN@GOTPCREL(%rip), %rcx
LBB0_7:
	movb	%al, %dl
	movl	%edx, -52(%rbp)                 ## 4-byte Spill
	movl	(%rcx), %eax
	notl	%eax
	andl	%eax, %r13d
	movl	$1, -60(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -48(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -56(%rbp)                   ## 4-byte Folded Spill
	xorl	%ebx, %ebx
	jmp	LBB0_15
LBB0_9:
	movl	$1, %ebx
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	xorl	%eax, %eax
LBB0_11:
	testq	%r14, %r14
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	jne	LBB0_12
## %bb.13:
	movq	_NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_12:
	movq	_NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN@GOTPCREL(%rip), %rax
LBB0_14:
	orl	(%rax), %r13d
	movl	$0, -60(%rbp)                   ## 4-byte Folded Spill
	movl	$1, -56(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -52(%rbp)                   ## 4-byte Folded Spill
LBB0_15:
	movl	%r13d, -68(%rbp)                ## 4-byte Spill
	movq	%r15, %rdi
	callq	_CHIP_IS_E3
	testq	%rax, %rax
	je	LBB0_20
## %bb.16:
	testq	%r14, %r14
	jne	LBB0_17
## %bb.18:
	movq	_NIG_REG_BRB0_PAUSE_IN_EN@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_17:
	movq	_NIG_REG_BRB1_PAUSE_IN_EN@GOTPCREL(%rip), %rax
LBB0_19:
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_REG_WR
LBB0_20:
	movq	%r14, -80(%rbp)                 ## 8-byte Spill
	testq	%r14, %r14
	movq	_NIG_REG_LLFC_OUT_EN_1@GOTPCREL(%rip), %rax
	cmoveq	_NIG_REG_LLFC_OUT_EN_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_NIG_REG_LLFC_ENABLE_1@GOTPCREL(%rip), %r13
	cmoveq	_NIG_REG_LLFC_ENABLE_0@GOTPCREL(%rip), %r13
	movq	_NIG_REG_PAUSE_ENABLE_1@GOTPCREL(%rip), %r14
	cmoveq	_NIG_REG_PAUSE_ENABLE_0@GOTPCREL(%rip), %r14
	movl	%ebx, -64(%rbp)                 ## 4-byte Spill
	movq	_NIG_REG_PPP_ENABLE_1@GOTPCREL(%rip), %rbx
	cmoveq	_NIG_REG_PPP_ENABLE_0@GOTPCREL(%rip), %rbx
	movq	_NIG_REG_LLH1_XCM_MASK@GOTPCREL(%rip), %rax
	cmoveq	_NIG_REG_LLH0_XCM_MASK@GOTPCREL(%rip), %rax
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	movq	_NIG_REG_LLFC_EGRESS_SRC_ENABLE_1@GOTPCREL(%rip), %rax
	cmoveq	_NIG_REG_LLFC_EGRESS_SRC_ENABLE_0@GOTPCREL(%rip), %rax
	movq	%rax, -96(%rbp)                 ## 8-byte Spill
	movq	_NIG_REG_XCM1_OUT_EN@GOTPCREL(%rip), %rax
	cmoveq	_NIG_REG_XCM0_OUT_EN@GOTPCREL(%rip), %rax
	movq	%rax, -104(%rbp)                ## 8-byte Spill
	movq	_NIG_REG_P1_HWPFC_ENABLE@GOTPCREL(%rip), %rax
	cmoveq	_NIG_REG_P0_HWPFC_ENABLE@GOTPCREL(%rip), %rax
	movq	%rax, -112(%rbp)                ## 8-byte Spill
	movq	%r15, %rdi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	callq	_REG_WR
	movl	(%r13), %esi
	movq	%r15, %rdi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	callq	_REG_WR
	movl	(%r14), %esi
	movq	%r15, %rdi
	movl	-64(%rbp), %edx                 ## 4-byte Reload
	callq	_REG_WR
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	-52(%rbp), %edx                 ## 4-byte Reload
	callq	_REG_WR
	movq	-88(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	-68(%rbp), %edx                 ## 4-byte Reload
	callq	_REG_WR
	movq	-96(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	$7, %edx
	callq	_REG_WR
	movq	-104(%rbp), %rax                ## 8-byte Reload
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	callq	_REG_WR
	movq	-112(%rbp), %rax                ## 8-byte Reload
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	-60(%rbp), %edx                 ## 4-byte Reload
	callq	_REG_WR
	testq	%r12, %r12
	je	LBB0_21
## %bb.22:
	movl	12(%r12), %r13d
	cmpq	$0, 16(%r12)
	movq	-80(%rbp), %r14                 ## 8-byte Reload
	je	LBB0_25
## %bb.23:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_24:                                ## =>This Inner Loop Header: Depth=1
	movq	32(%r12), %rax
	movl	(%rax,%rbx,4), %edx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movq	%r14, %rcx
	callq	_bnx2x_pfc_nig_rx_priority_mask
	incq	%rbx
	cmpq	16(%r12), %rbx
	jb	LBB0_24
LBB0_25:
	testq	%r14, %r14
	movq	_NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_1@GOTPCREL(%rip), %rax
	cmoveq	_NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	24(%r12), %edx
	movq	_NIG_REG_LLFC_LOW_PRIORITY_CLASSES_1@GOTPCREL(%rip), %rbx
	cmoveq	_NIG_REG_LLFC_LOW_PRIORITY_CLASSES_0@GOTPCREL(%rip), %rbx
	movq	%r15, %rdi
	callq	_REG_WR
	movl	(%rbx), %esi
	movl	28(%r12), %edx
	movq	%r15, %rdi
	callq	_REG_WR
	testq	%r14, %r14
	jne	LBB0_27
LBB0_28:
	movq	_NIG_REG_P0_PKT_PRIORITY_TO_COS@GOTPCREL(%rip), %rax
	jmp	LBB0_29
LBB0_21:
	xorl	%r13d, %r13d
	movq	-80(%rbp), %r14                 ## 8-byte Reload
	testq	%r14, %r14
	je	LBB0_28
LBB0_27:
	movq	_NIG_REG_P1_PKT_PRIORITY_TO_COS@GOTPCREL(%rip), %rax
LBB0_29:
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%r13d, %edx
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_REG_WR                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_FEATURE_CONFIG_PFC_ENABLED,4,2 ## @FEATURE_CONFIG_PFC_ENABLED
	.comm	_NETIF_MSG_LINK,4,2             ## @NETIF_MSG_LINK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"updating pfc nig parameters\n"

	.comm	_NIG_REG_LLH1_XCM_MASK,4,2      ## @NIG_REG_LLH1_XCM_MASK
	.comm	_NIG_REG_LLH0_XCM_MASK,4,2      ## @NIG_REG_LLH0_XCM_MASK
	.comm	_NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN,4,2 ## @NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN
	.comm	_NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN,4,2 ## @NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN
	.comm	_NIG_REG_BRB1_PAUSE_IN_EN,4,2   ## @NIG_REG_BRB1_PAUSE_IN_EN
	.comm	_NIG_REG_BRB0_PAUSE_IN_EN,4,2   ## @NIG_REG_BRB0_PAUSE_IN_EN
	.comm	_NIG_REG_LLFC_OUT_EN_1,4,2      ## @NIG_REG_LLFC_OUT_EN_1
	.comm	_NIG_REG_LLFC_OUT_EN_0,4,2      ## @NIG_REG_LLFC_OUT_EN_0
	.comm	_NIG_REG_LLFC_ENABLE_1,4,2      ## @NIG_REG_LLFC_ENABLE_1
	.comm	_NIG_REG_LLFC_ENABLE_0,4,2      ## @NIG_REG_LLFC_ENABLE_0
	.comm	_NIG_REG_PAUSE_ENABLE_1,4,2     ## @NIG_REG_PAUSE_ENABLE_1
	.comm	_NIG_REG_PAUSE_ENABLE_0,4,2     ## @NIG_REG_PAUSE_ENABLE_0
	.comm	_NIG_REG_PPP_ENABLE_1,4,2       ## @NIG_REG_PPP_ENABLE_1
	.comm	_NIG_REG_PPP_ENABLE_0,4,2       ## @NIG_REG_PPP_ENABLE_0
	.comm	_NIG_REG_LLFC_EGRESS_SRC_ENABLE_1,4,2 ## @NIG_REG_LLFC_EGRESS_SRC_ENABLE_1
	.comm	_NIG_REG_LLFC_EGRESS_SRC_ENABLE_0,4,2 ## @NIG_REG_LLFC_EGRESS_SRC_ENABLE_0
	.comm	_NIG_REG_XCM1_OUT_EN,4,2        ## @NIG_REG_XCM1_OUT_EN
	.comm	_NIG_REG_XCM0_OUT_EN,4,2        ## @NIG_REG_XCM0_OUT_EN
	.comm	_NIG_REG_P1_HWPFC_ENABLE,4,2    ## @NIG_REG_P1_HWPFC_ENABLE
	.comm	_NIG_REG_P0_HWPFC_ENABLE,4,2    ## @NIG_REG_P0_HWPFC_ENABLE
	.comm	_NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_1,4,2 ## @NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_1
	.comm	_NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0,4,2 ## @NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0
	.comm	_NIG_REG_LLFC_LOW_PRIORITY_CLASSES_1,4,2 ## @NIG_REG_LLFC_LOW_PRIORITY_CLASSES_1
	.comm	_NIG_REG_LLFC_LOW_PRIORITY_CLASSES_0,4,2 ## @NIG_REG_LLFC_LOW_PRIORITY_CLASSES_0
	.comm	_NIG_REG_P1_PKT_PRIORITY_TO_COS,4,2 ## @NIG_REG_P1_PKT_PRIORITY_TO_COS
	.comm	_NIG_REG_P0_PKT_PRIORITY_TO_COS,4,2 ## @NIG_REG_P0_PKT_PRIORITY_TO_COS
	.no_dead_strip	_bnx2x_update_pfc_nig
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_update_pfc_nig
_bnx2x_update_pfc_nig:                  ; @bnx2x_update_pfc_nig
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x2
	ldr	x19, [x0, #16]
	ldr	x20, [x0]
Lloh0:
	adrp	x8, _FEATURE_CONFIG_PFC_ENABLED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FEATURE_CONFIG_PFC_ENABLED@GOTPAGEOFF]
	ldr	w9, [x0, #8]
Lloh2:
	ldr	w8, [x8]
	and	w22, w8, w9
Lloh3:
	adrp	x8, _NETIF_MSG_LINK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _NETIF_MSG_LINK@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	bl	_DP
Lloh8:
	adrp	x27, _NIG_REG_LLH1_XCM_MASK@GOTPAGE
Lloh9:
	ldr	x27, [x27, _NIG_REG_LLH1_XCM_MASK@GOTPAGEOFF]
Lloh10:
	adrp	x26, _NIG_REG_LLH0_XCM_MASK@GOTPAGE
Lloh11:
	ldr	x26, [x26, _NIG_REG_LLH0_XCM_MASK@GOTPAGEOFF]
	cmp	x20, #0
	csel	x8, x26, x27, eq
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_RD
	mov	x28, x0
	cbz	w22, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_CHIP_IS_E3
	str	xzr, [sp, #16]                  ; 8-byte Folded Spill
	str	wzr, [sp, #24]                  ; 4-byte Folded Spill
	mov	w24, #0
	cmp	x0, #0
Lloh12:
	adrp	x8, _NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN@GOTPAGE
Lloh13:
	ldr	x8, [x8, _NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN@GOTPAGEOFF]
Lloh14:
	adrp	x9, _NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN@GOTPAGE
Lloh15:
	ldr	x9, [x9, _NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN@GOTPAGEOFF]
	cset	w10, eq
	str	w10, [sp, #12]                  ; 4-byte Folded Spill
	cmp	x20, #0
	csel	x8, x9, x8, eq
	ldr	w8, [x8]
	bic	w8, w28, w8
	str	w8, [sp, #8]                    ; 4-byte Folded Spill
	mov	w8, #1
	str	w8, [sp, #28]                   ; 4-byte Folded Spill
	b	LBB0_6
LBB0_2:
	cbz	x21, LBB0_4
; %bb.3:
	ldr	w9, [x21]
	ldp	w8, w24, [x21, #4]
	stp	w9, w8, [sp, #16]               ; 8-byte Folded Spill
	b	LBB0_5
LBB0_4:
	str	xzr, [sp, #16]                  ; 8-byte Folded Spill
	mov	w24, #1
LBB0_5:
	str	wzr, [sp, #28]                  ; 4-byte Folded Spill
	str	wzr, [sp, #12]                  ; 4-byte Folded Spill
Lloh16:
	adrp	x8, _NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN@GOTPAGE
Lloh17:
	ldr	x8, [x8, _NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN@GOTPAGEOFF]
Lloh18:
	adrp	x9, _NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN@GOTPAGE
Lloh19:
	ldr	x9, [x9, _NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN@GOTPAGEOFF]
	cmp	x20, #0
	csel	x8, x9, x8, eq
	ldr	w8, [x8]
	orr	w8, w8, w28
	str	w8, [sp, #8]                    ; 4-byte Folded Spill
	mov	w8, #1
	str	w8, [sp, #24]                   ; 4-byte Folded Spill
LBB0_6:
	mov	x0, x19
	bl	_CHIP_IS_E3
	cbz	x0, LBB0_8
; %bb.7:
Lloh20:
	adrp	x8, _NIG_REG_BRB1_PAUSE_IN_EN@GOTPAGE
Lloh21:
	ldr	x8, [x8, _NIG_REG_BRB1_PAUSE_IN_EN@GOTPAGEOFF]
Lloh22:
	adrp	x9, _NIG_REG_BRB0_PAUSE_IN_EN@GOTPAGE
Lloh23:
	ldr	x9, [x9, _NIG_REG_BRB0_PAUSE_IN_EN@GOTPAGEOFF]
	cmp	x20, #0
	csel	x8, x9, x8, eq
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x24
	bl	_REG_WR
LBB0_8:
Lloh24:
	adrp	x8, _NIG_REG_LLFC_OUT_EN_1@GOTPAGE
Lloh25:
	ldr	x8, [x8, _NIG_REG_LLFC_OUT_EN_1@GOTPAGEOFF]
Lloh26:
	adrp	x9, _NIG_REG_LLFC_OUT_EN_0@GOTPAGE
Lloh27:
	ldr	x9, [x9, _NIG_REG_LLFC_OUT_EN_0@GOTPAGEOFF]
	cmp	x20, #0
	csel	x8, x9, x8, eq
	ldr	w1, [x8]
Lloh28:
	adrp	x8, _NIG_REG_LLFC_ENABLE_1@GOTPAGE
Lloh29:
	ldr	x8, [x8, _NIG_REG_LLFC_ENABLE_1@GOTPAGEOFF]
Lloh30:
	adrp	x9, _NIG_REG_LLFC_ENABLE_0@GOTPAGE
Lloh31:
	ldr	x9, [x9, _NIG_REG_LLFC_ENABLE_0@GOTPAGEOFF]
	csel	x22, x9, x8, eq
Lloh32:
	adrp	x8, _NIG_REG_PAUSE_ENABLE_1@GOTPAGE
Lloh33:
	ldr	x8, [x8, _NIG_REG_PAUSE_ENABLE_1@GOTPAGEOFF]
Lloh34:
	adrp	x9, _NIG_REG_PAUSE_ENABLE_0@GOTPAGE
Lloh35:
	ldr	x9, [x9, _NIG_REG_PAUSE_ENABLE_0@GOTPAGEOFF]
	csel	x23, x9, x8, eq
Lloh36:
	adrp	x8, _NIG_REG_PPP_ENABLE_1@GOTPAGE
Lloh37:
	ldr	x8, [x8, _NIG_REG_PPP_ENABLE_1@GOTPAGEOFF]
Lloh38:
	adrp	x9, _NIG_REG_PPP_ENABLE_0@GOTPAGE
Lloh39:
	ldr	x9, [x9, _NIG_REG_PPP_ENABLE_0@GOTPAGEOFF]
	csel	x25, x9, x8, eq
	csel	x26, x26, x27, eq
Lloh40:
	adrp	x8, _NIG_REG_LLFC_EGRESS_SRC_ENABLE_1@GOTPAGE
Lloh41:
	ldr	x8, [x8, _NIG_REG_LLFC_EGRESS_SRC_ENABLE_1@GOTPAGEOFF]
Lloh42:
	adrp	x9, _NIG_REG_LLFC_EGRESS_SRC_ENABLE_0@GOTPAGE
Lloh43:
	ldr	x9, [x9, _NIG_REG_LLFC_EGRESS_SRC_ENABLE_0@GOTPAGEOFF]
Lloh44:
	adrp	x10, _NIG_REG_XCM1_OUT_EN@GOTPAGE
Lloh45:
	ldr	x10, [x10, _NIG_REG_XCM1_OUT_EN@GOTPAGEOFF]
	csel	x27, x9, x8, eq
Lloh46:
	adrp	x8, _NIG_REG_XCM0_OUT_EN@GOTPAGE
Lloh47:
	ldr	x8, [x8, _NIG_REG_XCM0_OUT_EN@GOTPAGEOFF]
	csel	x28, x8, x10, eq
Lloh48:
	adrp	x8, _NIG_REG_P1_HWPFC_ENABLE@GOTPAGE
Lloh49:
	ldr	x8, [x8, _NIG_REG_P1_HWPFC_ENABLE@GOTPAGEOFF]
Lloh50:
	adrp	x9, _NIG_REG_P0_HWPFC_ENABLE@GOTPAGE
Lloh51:
	ldr	x9, [x9, _NIG_REG_P0_HWPFC_ENABLE@GOTPAGEOFF]
	csel	x8, x9, x8, eq
	str	x8, [sp]                        ; 8-byte Folded Spill
	mov	x0, x19
	ldr	w2, [sp, #16]                   ; 4-byte Folded Reload
	bl	_REG_WR
	ldr	w1, [x22]
	mov	x0, x19
	ldr	w2, [sp, #20]                   ; 4-byte Folded Reload
	bl	_REG_WR
	ldr	w1, [x23]
	mov	x0, x19
	mov	x2, x24
	bl	_REG_WR
	ldr	w1, [x25]
	mov	x0, x19
	ldr	w2, [sp, #12]                   ; 4-byte Folded Reload
	bl	_REG_WR
	ldr	w1, [x26]
	mov	x0, x19
	ldr	w2, [sp, #8]                    ; 4-byte Folded Reload
	bl	_REG_WR
	ldr	w1, [x27]
	mov	x0, x19
	mov	w2, #7
	bl	_REG_WR
	ldr	w1, [x28]
	mov	x0, x19
	ldr	w2, [sp, #24]                   ; 4-byte Folded Reload
	bl	_REG_WR
	ldr	x8, [sp]                        ; 8-byte Folded Reload
	ldr	w1, [x8]
	mov	x0, x19
	ldr	w2, [sp, #28]                   ; 4-byte Folded Reload
	bl	_REG_WR
	cbz	x21, LBB0_13
; %bb.9:
	ldr	w22, [x21, #12]
	ldr	x8, [x21, #16]
	cbz	x8, LBB0_12
; %bb.10:
	mov	x23, #0
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x21, #32]
	ldr	w2, [x8, x23, lsl #2]
	mov	x0, x19
	mov	x1, x23
	mov	x3, x20
	bl	_bnx2x_pfc_nig_rx_priority_mask
	add	x23, x23, #1
	ldr	x8, [x21, #16]
	cmp	x23, x8
	b.lo	LBB0_11
LBB0_12:
Lloh52:
	adrp	x8, _NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_1@GOTPAGE
Lloh53:
	ldr	x8, [x8, _NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_1@GOTPAGEOFF]
Lloh54:
	adrp	x9, _NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0@GOTPAGE
Lloh55:
	ldr	x9, [x9, _NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0@GOTPAGEOFF]
	cmp	x20, #0
	csel	x8, x9, x8, eq
	ldr	w1, [x8]
	ldr	w2, [x21, #24]
Lloh56:
	adrp	x8, _NIG_REG_LLFC_LOW_PRIORITY_CLASSES_1@GOTPAGE
Lloh57:
	ldr	x8, [x8, _NIG_REG_LLFC_LOW_PRIORITY_CLASSES_1@GOTPAGEOFF]
Lloh58:
	adrp	x9, _NIG_REG_LLFC_LOW_PRIORITY_CLASSES_0@GOTPAGE
Lloh59:
	ldr	x9, [x9, _NIG_REG_LLFC_LOW_PRIORITY_CLASSES_0@GOTPAGEOFF]
	csel	x23, x9, x8, eq
	mov	x0, x19
	bl	_REG_WR
	ldr	w1, [x23]
	ldr	w2, [x21, #28]
	mov	x0, x19
	bl	_REG_WR
	b	LBB0_14
LBB0_13:
	mov	w22, #0
LBB0_14:
Lloh60:
	adrp	x8, _NIG_REG_P1_PKT_PRIORITY_TO_COS@GOTPAGE
Lloh61:
	ldr	x8, [x8, _NIG_REG_P1_PKT_PRIORITY_TO_COS@GOTPAGEOFF]
Lloh62:
	adrp	x9, _NIG_REG_P0_PKT_PRIORITY_TO_COS@GOTPAGE
Lloh63:
	ldr	x9, [x9, _NIG_REG_P0_PKT_PRIORITY_TO_COS@GOTPAGEOFF]
	cmp	x20, #0
	csel	x8, x9, x8, eq
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x22
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	b	_REG_WR
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh60, Lloh61
	.cfi_endproc
                                        ; -- End function
	.comm	_FEATURE_CONFIG_PFC_ENABLED,4,2 ; @FEATURE_CONFIG_PFC_ENABLED
	.comm	_NETIF_MSG_LINK,4,2             ; @NETIF_MSG_LINK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"updating pfc nig parameters\n"

	.comm	_NIG_REG_LLH1_XCM_MASK,4,2      ; @NIG_REG_LLH1_XCM_MASK
	.comm	_NIG_REG_LLH0_XCM_MASK,4,2      ; @NIG_REG_LLH0_XCM_MASK
	.comm	_NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN,4,2 ; @NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN
	.comm	_NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN,4,2 ; @NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN
	.comm	_NIG_REG_BRB1_PAUSE_IN_EN,4,2   ; @NIG_REG_BRB1_PAUSE_IN_EN
	.comm	_NIG_REG_BRB0_PAUSE_IN_EN,4,2   ; @NIG_REG_BRB0_PAUSE_IN_EN
	.comm	_NIG_REG_LLFC_OUT_EN_1,4,2      ; @NIG_REG_LLFC_OUT_EN_1
	.comm	_NIG_REG_LLFC_OUT_EN_0,4,2      ; @NIG_REG_LLFC_OUT_EN_0
	.comm	_NIG_REG_LLFC_ENABLE_1,4,2      ; @NIG_REG_LLFC_ENABLE_1
	.comm	_NIG_REG_LLFC_ENABLE_0,4,2      ; @NIG_REG_LLFC_ENABLE_0
	.comm	_NIG_REG_PAUSE_ENABLE_1,4,2     ; @NIG_REG_PAUSE_ENABLE_1
	.comm	_NIG_REG_PAUSE_ENABLE_0,4,2     ; @NIG_REG_PAUSE_ENABLE_0
	.comm	_NIG_REG_PPP_ENABLE_1,4,2       ; @NIG_REG_PPP_ENABLE_1
	.comm	_NIG_REG_PPP_ENABLE_0,4,2       ; @NIG_REG_PPP_ENABLE_0
	.comm	_NIG_REG_LLFC_EGRESS_SRC_ENABLE_1,4,2 ; @NIG_REG_LLFC_EGRESS_SRC_ENABLE_1
	.comm	_NIG_REG_LLFC_EGRESS_SRC_ENABLE_0,4,2 ; @NIG_REG_LLFC_EGRESS_SRC_ENABLE_0
	.comm	_NIG_REG_XCM1_OUT_EN,4,2        ; @NIG_REG_XCM1_OUT_EN
	.comm	_NIG_REG_XCM0_OUT_EN,4,2        ; @NIG_REG_XCM0_OUT_EN
	.comm	_NIG_REG_P1_HWPFC_ENABLE,4,2    ; @NIG_REG_P1_HWPFC_ENABLE
	.comm	_NIG_REG_P0_HWPFC_ENABLE,4,2    ; @NIG_REG_P0_HWPFC_ENABLE
	.comm	_NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_1,4,2 ; @NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_1
	.comm	_NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0,4,2 ; @NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0
	.comm	_NIG_REG_LLFC_LOW_PRIORITY_CLASSES_1,4,2 ; @NIG_REG_LLFC_LOW_PRIORITY_CLASSES_1
	.comm	_NIG_REG_LLFC_LOW_PRIORITY_CLASSES_0,4,2 ; @NIG_REG_LLFC_LOW_PRIORITY_CLASSES_0
	.comm	_NIG_REG_P1_PKT_PRIORITY_TO_COS,4,2 ; @NIG_REG_P1_PKT_PRIORITY_TO_COS
	.comm	_NIG_REG_P0_PKT_PRIORITY_TO_COS,4,2 ; @NIG_REG_P0_PKT_PRIORITY_TO_COS
	.no_dead_strip	_bnx2x_update_pfc_nig
.subsections_via_symbols
