	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_read_fb_location        ## -- Begin function radeon_read_fb_location
	.p2align	4, 0x90
_radeon_read_fb_location:               ## @radeon_read_fb_location
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_RADEON_FAMILY_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	(%rdi), %eax
	movq	_CHIP_RV770@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jge	LBB0_1
## %bb.3:
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jge	LBB0_4
## %bb.5:
	movq	_CHIP_RV515@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	cmpl	%ecx, %eax
	jne	LBB0_8
## %bb.6:
	movq	_RV515_MC_FB_LOCATION@GOTPCREL(%rip), %rax
LBB0_7:
	movl	(%rax), %esi
	popq	%rbp
	jmp	_R500_READ_MCIND                ## TAILCALL
LBB0_1:
	movq	_R700_MC_VM_FB_LOCATION@GOTPCREL(%rip), %rax
	jmp	LBB0_2
LBB0_4:
	movq	_R600_MC_VM_FB_LOCATION@GOTPCREL(%rip), %rax
LBB0_2:
	movl	(%rax), %edi
	popq	%rbp
	jmp	_RADEON_READ                    ## TAILCALL
LBB0_8:
	movq	_CHIP_RS690@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %eax
	je	LBB0_14
## %bb.9:
	movq	_CHIP_RS740@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %eax
	je	LBB0_14
## %bb.10:
	movq	_CHIP_RS600@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %eax
	jne	LBB0_11
## %bb.15:
	movq	_RS600_MC_FB_LOCATION@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	popq	%rbp
	jmp	_RS600_READ_MCIND               ## TAILCALL
LBB0_14:
	movq	_RS690_MC_FB_LOCATION@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	popq	%rbp
	jmp	_RS690_READ_MCIND               ## TAILCALL
LBB0_11:
	cmpl	%ecx, %eax
	jle	LBB0_13
## %bb.12:
	movq	_R520_MC_FB_LOCATION@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_13:
	movq	_RADEON_MC_FB_LOCATION@GOTPCREL(%rip), %rax
	jmp	LBB0_2
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_FAMILY_MASK,4,2         ## @RADEON_FAMILY_MASK
	.comm	_CHIP_RV770,4,2                 ## @CHIP_RV770
	.comm	_R700_MC_VM_FB_LOCATION,4,2     ## @R700_MC_VM_FB_LOCATION
	.comm	_CHIP_R600,4,2                  ## @CHIP_R600
	.comm	_R600_MC_VM_FB_LOCATION,4,2     ## @R600_MC_VM_FB_LOCATION
	.comm	_CHIP_RV515,4,2                 ## @CHIP_RV515
	.comm	_RV515_MC_FB_LOCATION,4,2       ## @RV515_MC_FB_LOCATION
	.comm	_CHIP_RS690,4,2                 ## @CHIP_RS690
	.comm	_CHIP_RS740,4,2                 ## @CHIP_RS740
	.comm	_RS690_MC_FB_LOCATION,4,2       ## @RS690_MC_FB_LOCATION
	.comm	_CHIP_RS600,4,2                 ## @CHIP_RS600
	.comm	_RS600_MC_FB_LOCATION,4,2       ## @RS600_MC_FB_LOCATION
	.comm	_R520_MC_FB_LOCATION,4,2        ## @R520_MC_FB_LOCATION
	.comm	_RADEON_MC_FB_LOCATION,4,2      ## @RADEON_MC_FB_LOCATION
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_read_fb_location        ; -- Begin function radeon_read_fb_location
	.p2align	2
_radeon_read_fb_location:               ; @radeon_read_fb_location
	.cfi_startproc
; %bb.0:
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _RADEON_FAMILY_MASK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_FAMILY_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh3:
	adrp	x9, _CHIP_RV770@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CHIP_RV770@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ge	LBB0_4
; %bb.1:
Lloh6:
	adrp	x9, _CHIP_R600@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CHIP_R600@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ge	LBB0_5
; %bb.2:
Lloh9:
	adrp	x9, _CHIP_RV515@GOTPAGE
Lloh10:
	ldr	x9, [x9, _CHIP_RV515@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_6
; %bb.3:
Lloh12:
	adrp	x8, _RV515_MC_FB_LOCATION@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RV515_MC_FB_LOCATION@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	b	_R500_READ_MCIND
LBB0_4:
Lloh15:
	adrp	x8, _R700_MC_VM_FB_LOCATION@GOTPAGE
Lloh16:
	ldr	x8, [x8, _R700_MC_VM_FB_LOCATION@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	b	_RADEON_READ
LBB0_5:
Lloh18:
	adrp	x8, _R600_MC_VM_FB_LOCATION@GOTPAGE
Lloh19:
	ldr	x8, [x8, _R600_MC_VM_FB_LOCATION@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	b	_RADEON_READ
LBB0_6:
Lloh21:
	adrp	x10, _CHIP_RS690@GOTPAGE
Lloh22:
	ldr	x10, [x10, _CHIP_RS690@GOTPAGEOFF]
Lloh23:
	ldr	w10, [x10]
Lloh24:
	adrp	x11, _CHIP_RS740@GOTPAGE
Lloh25:
	ldr	x11, [x11, _CHIP_RS740@GOTPAGEOFF]
Lloh26:
	ldr	w11, [x11]
	cmp	w8, w10
	ccmp	w8, w11, #4, ne
	b.ne	LBB0_8
; %bb.7:
Lloh27:
	adrp	x8, _RS690_MC_FB_LOCATION@GOTPAGE
Lloh28:
	ldr	x8, [x8, _RS690_MC_FB_LOCATION@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	b	_RS690_READ_MCIND
LBB0_8:
Lloh30:
	adrp	x10, _CHIP_RS600@GOTPAGE
Lloh31:
	ldr	x10, [x10, _CHIP_RS600@GOTPAGEOFF]
Lloh32:
	ldr	w10, [x10]
	cmp	w8, w10
	b.ne	LBB0_10
; %bb.9:
Lloh33:
	adrp	x8, _RS600_MC_FB_LOCATION@GOTPAGE
Lloh34:
	ldr	x8, [x8, _RS600_MC_FB_LOCATION@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	b	_RS600_READ_MCIND
LBB0_10:
	cmp	w8, w9
	b.le	LBB0_12
; %bb.11:
Lloh36:
	adrp	x8, _R520_MC_FB_LOCATION@GOTPAGE
Lloh37:
	ldr	x8, [x8, _R520_MC_FB_LOCATION@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	b	_R500_READ_MCIND
LBB0_12:
Lloh39:
	adrp	x8, _RADEON_MC_FB_LOCATION@GOTPAGE
Lloh40:
	ldr	x8, [x8, _RADEON_MC_FB_LOCATION@GOTPAGEOFF]
Lloh41:
	ldr	w0, [x8]
	b	_RADEON_READ
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_FAMILY_MASK,4,2         ; @RADEON_FAMILY_MASK
	.comm	_CHIP_RV770,4,2                 ; @CHIP_RV770
	.comm	_R700_MC_VM_FB_LOCATION,4,2     ; @R700_MC_VM_FB_LOCATION
	.comm	_CHIP_R600,4,2                  ; @CHIP_R600
	.comm	_R600_MC_VM_FB_LOCATION,4,2     ; @R600_MC_VM_FB_LOCATION
	.comm	_CHIP_RV515,4,2                 ; @CHIP_RV515
	.comm	_RV515_MC_FB_LOCATION,4,2       ; @RV515_MC_FB_LOCATION
	.comm	_CHIP_RS690,4,2                 ; @CHIP_RS690
	.comm	_CHIP_RS740,4,2                 ; @CHIP_RS740
	.comm	_RS690_MC_FB_LOCATION,4,2       ; @RS690_MC_FB_LOCATION
	.comm	_CHIP_RS600,4,2                 ; @CHIP_RS600
	.comm	_RS600_MC_FB_LOCATION,4,2       ; @RS600_MC_FB_LOCATION
	.comm	_R520_MC_FB_LOCATION,4,2        ; @R520_MC_FB_LOCATION
	.comm	_RADEON_MC_FB_LOCATION,4,2      ; @RADEON_MC_FB_LOCATION
.subsections_via_symbols
