	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_crt_set_dpms
_intel_crt_set_dpms:                    ## @intel_crt_set_dpms
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %ebx
	callq	_intel_encoder_to_crt
	movq	%rax, %r14
	movl	(%rax), %edi
	callq	_I915_READ
	movq	_ADPA_HSYNC_CNTL_DISABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r8d
	movq	_ADPA_VSYNC_CNTL_DISABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, %edx
	orl	%r8d, %edx
	movq	_ADPA_DAC_ENABLE@GOTPCREL(%rip), %rsi
	movl	(%rsi), %edi
	movl	%edx, %esi
	orl	%edi, %esi
	notl	%esi
	andl	%eax, %esi
	addl	$-128, %ebx
	cmpl	$3, %ebx
	ja	LBB0_6
## %bb.1:
	leaq	LJTI0_0(%rip), %rax
	movslq	(%rax,%rbx,4), %rbx
	addq	%rax, %rbx
	jmpq	*%rbx
LBB0_4:
	orl	%edi, %esi
	orl	%ecx, %esi
	jmp	LBB0_6
LBB0_3:
	orl	%edi, %esi
	orl	%r8d, %esi
	jmp	LBB0_6
LBB0_2:
	orl	%edi, %esi
	jmp	LBB0_6
LBB0_5:
	orl	%edx, %esi
LBB0_6:
	movl	(%r14), %edi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_I915_WRITE                     ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
LJTI0_0:
	.long	L0_0_set_4
	.long	L0_0_set_3
	.long	L0_0_set_2
	.long	L0_0_set_5
	.end_data_region
                                        ## -- End function
	.comm	_ADPA_HSYNC_CNTL_DISABLE,4,2    ## @ADPA_HSYNC_CNTL_DISABLE
	.comm	_ADPA_VSYNC_CNTL_DISABLE,4,2    ## @ADPA_VSYNC_CNTL_DISABLE
	.comm	_ADPA_DAC_ENABLE,4,2            ## @ADPA_DAC_ENABLE
	.no_dead_strip	_intel_crt_set_dpms
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_crt_set_dpms
_intel_crt_set_dpms:                    ; @intel_crt_set_dpms
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	bl	_intel_encoder_to_crt
	mov	x19, x0
	ldr	w0, [x0]
	bl	_I915_READ
Lloh0:
	adrp	x8, _ADPA_HSYNC_CNTL_DISABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ADPA_HSYNC_CNTL_DISABLE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _ADPA_VSYNC_CNTL_DISABLE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _ADPA_VSYNC_CNTL_DISABLE@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
Lloh6:
	adrp	x10, _ADPA_DAC_ENABLE@GOTPAGE
Lloh7:
	ldr	x10, [x10, _ADPA_DAC_ENABLE@GOTPAGEOFF]
	orr	w11, w9, w8
Lloh8:
	ldr	w10, [x10]
	orr	w12, w11, w10
	bic	w1, w0, w12
	sub	w12, w20, #128
	cmp	w12, #3
	b.hi	LBB0_6
; %bb.1:
Lloh9:
	adrp	x13, lJTI0_0@PAGE
Lloh10:
	add	x13, x13, lJTI0_0@PAGEOFF
	adr	x14, LBB0_2
	ldrb	w15, [x13, x12]
	add	x14, x14, x15, lsl #2
	br	x14
LBB0_2:
	orr	w8, w1, w10
	orr	w1, w8, w9
	b	LBB0_6
LBB0_3:
	orr	w9, w1, w10
	orr	w1, w9, w8
	b	LBB0_6
LBB0_4:
	orr	w1, w1, w10
	b	LBB0_6
LBB0_5:
	orr	w1, w1, w11
LBB0_6:
	ldr	w0, [x19]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_I915_WRITE
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh9, Lloh10
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
                                        ; -- End function
	.comm	_ADPA_HSYNC_CNTL_DISABLE,4,2    ; @ADPA_HSYNC_CNTL_DISABLE
	.comm	_ADPA_VSYNC_CNTL_DISABLE,4,2    ; @ADPA_VSYNC_CNTL_DISABLE
	.comm	_ADPA_DAC_ENABLE,4,2            ; @ADPA_DAC_ENABLE
	.no_dead_strip	_intel_crt_set_dpms
.subsections_via_symbols
