	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ivb_update_plane
_ivb_update_plane:                      ## @ivb_update_plane
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
                                        ## kill: def $r9d killed $r9d def $r9
	movq	%r9, -80(%rbp)                  ## 8-byte Spill
	movl	%r8d, -100(%rbp)                ## 4-byte Spill
	movl	%ecx, -112(%rbp)                ## 4-byte Spill
	movq	%rdx, -48(%rbp)                 ## 8-byte Spill
	movq	%rsi, %r14
	movq	(%rdi), %rax
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	movq	(%rax), %rbx
	callq	_to_intel_plane
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	movl	(%rax), %r13d
	movl	(%r14), %edi
	xorl	%esi, %esi
	callq	_drm_format_plane_cpp
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	movq	%rbx, -96(%rbp)                 ## 8-byte Spill
	movl	(%rbx), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	%r13d, %edi
	callq	_SPRCTL
	movl	%eax, %edi
	callq	_I915_READ
	movq	_SPRITE_PIXFORMAT_MASK@GOTPCREL(%rip), %rdx
	movq	_SPRITE_RGB_ORDER_RGBX@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	(%rdx), %ebx
	orl	%ecx, %ebx
	movq	_SPRITE_YUV_BYTE_ORDER_MASK@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ebx
	movq	_SPRITE_TILED@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	orl	%esi, %ebx
	notl	%ebx
	andl	%eax, %ebx
	movq	%r14, -120(%rbp)                ## 8-byte Spill
	movl	(%r14), %eax
	addl	$-128, %eax
	cmpl	$5, %eax
	ja	LBB0_10
## %bb.1:
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%rax,4), %rax
	addq	%rdx, %rax
	jmpq	*%rax
LBB0_7:
	movq	_SPRITE_FORMAT_YUV422@GOTPCREL(%rip), %rax
	movq	_SPRITE_YUV_ORDER_YVYU@GOTPCREL(%rip), %rcx
	jmp	LBB0_6
LBB0_10:
	xorl	%eax, %eax
	callq	_BUG
	movl	(%r12), %esi
	jmp	LBB0_11
LBB0_5:
	movq	_SPRITE_FORMAT_YUV422@GOTPCREL(%rip), %rax
	movq	_SPRITE_YUV_ORDER_YUYV@GOTPCREL(%rip), %rcx
	jmp	LBB0_6
LBB0_3:
	movq	_SPRITE_FORMAT_RGBX888@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	jmp	LBB0_11
LBB0_2:
	movq	_SPRITE_FORMAT_RGBX888@GOTPCREL(%rip), %rax
	orl	%ecx, %ebx
	orl	(%rax), %ebx
	jmp	LBB0_11
LBB0_9:
	movq	_SPRITE_FORMAT_YUV422@GOTPCREL(%rip), %rax
	movq	_SPRITE_YUV_ORDER_VYUY@GOTPCREL(%rip), %rcx
	jmp	LBB0_6
LBB0_8:
	movq	_SPRITE_FORMAT_YUV422@GOTPCREL(%rip), %rax
	movq	_SPRITE_YUV_ORDER_UYVY@GOTPCREL(%rip), %rcx
LBB0_6:
	orl	(%rax), %ebx
	orl	(%rcx), %ebx
LBB0_11:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rax
	movq	_I915_TILING_NONE@GOTPCREL(%rip), %rcx
	xorl	%r12d, %r12d
	cmpq	(%rcx), %rax
	cmovel	%r12d, %esi
	orl	%ebx, %esi
	movq	_SPRITE_TRICKLE_FEED_DISABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movl	40(%rbp), %r14d
	movq	_SPRITE_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movl	%esi, -56(%rbp)                 ## 4-byte Spill
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_IS_HASWELL
	testq	%rax, %rax
	je	LBB0_13
## %bb.12:
	movq	_SPRITE_PIPE_CSC_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
LBB0_13:
	movl	%r12d, -108(%rbp)               ## 4-byte Spill
	movl	48(%rbp), %ebx
	movl	16(%rbp), %r12d
	movq	-80(%rbp), %r15                 ## 8-byte Reload
	leal	-1(%r15), %edx
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	movl	%r13d, %esi
	movl	%edx, -104(%rbp)                ## 4-byte Spill
	movl	-64(%rbp), %ecx                 ## 4-byte Reload
	callq	_intel_update_sprite_watermarks
	movl	$1, %eax
	movl	%r13d, %ecx
	shll	%cl, %eax
	cmpl	%r14d, %r15d
	jne	LBB0_15
## %bb.14:
	cmpl	%ebx, %r12d
	jne	LBB0_15
## %bb.18:
	notl	%eax
	movq	-96(%rbp), %rcx                 ## 8-byte Reload
	andl	%eax, (%rcx)
	movl	$0, -80(%rbp)                   ## 4-byte Folded Spill
	jmp	LBB0_19
LBB0_15:
	decl	%ebx
	movq	-96(%rbp), %rcx                 ## 8-byte Reload
	orl	%eax, (%rcx)
	movl	-52(%rbp), %eax                 ## 4-byte Reload
	testl	%eax, %eax
	jne	LBB0_17
## %bb.16:
	movq	-72(%rbp), %r15                 ## 8-byte Reload
	movq	%r15, %rdi
	callq	_intel_update_watermarks
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_intel_wait_for_vblank
LBB0_17:
	movq	_SPRITE_SCALE_ENABLE@GOTPCREL(%rip), %rax
	shll	$16, %r14d
	addl	$-65536, %r14d                  ## imm = 0xFFFF0000
	orl	%r14d, %ebx
	orl	(%rax), %ebx
	movl	%ebx, -80(%rbp)                 ## 4-byte Spill
LBB0_19:
	movl	%r13d, %edi
	callq	_SPRSTRIDE
	movq	-120(%rbp), %rbx                ## 8-byte Reload
	movq	8(%rbx), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	callq	_I915_WRITE
	movl	%r13d, %edi
	callq	_SPRPOS
	movl	-100(%rbp), %esi                ## 4-byte Reload
	shll	$16, %esi
	orl	-112(%rbp), %esi                ## 4-byte Folded Reload
	movl	%eax, %edi
	callq	_I915_WRITE
	movq	8(%rbx), %rax
	movl	(%rax), %r8d
	movl	32(%rbp), %ebx
	imull	%r8d, %ebx
	movl	24(%rbp), %r15d
	movl	-64(%rbp), %ecx                 ## 4-byte Reload
	imull	%ecx, %r15d
	movl	%r13d, %r14d
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	movq	(%r13), %rdx
	leaq	24(%rbp), %rdi
	leaq	32(%rbp), %rsi
	callq	_intel_gen4_compute_page_offset
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_IS_HASWELL
	testq	%rax, %rax
	je	LBB0_21
## %bb.20:
	movl	%r14d, %edi
	callq	_SPROFFSET
	movl	32(%rbp), %esi
	shll	$16, %esi
	orl	24(%rbp), %esi
	movl	%eax, %edi
	callq	_I915_WRITE
	movl	%r14d, %ebx
	jmp	LBB0_25
LBB0_21:
	movq	(%r13), %rax
	movq	_I915_TILING_NONE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_22
## %bb.23:
	addl	%ebx, %r15d
	movl	%r14d, %ebx
	movl	%r14d, %edi
	callq	_SPRLINOFF
	subl	-64(%rbp), %r15d                ## 4-byte Folded Reload
	movl	%eax, %edi
	movl	%r15d, %esi
	jmp	LBB0_24
LBB0_22:
	movl	%r14d, %ebx
	movl	%r14d, %edi
	callq	_SPRTILEOFF
	movl	32(%rbp), %esi
	shll	$16, %esi
	orl	24(%rbp), %esi
	movl	%eax, %edi
LBB0_24:
	callq	_I915_WRITE
LBB0_25:
	movl	-52(%rbp), %r14d                ## 4-byte Reload
	movq	-88(%rbp), %r15                 ## 8-byte Reload
	movl	-56(%rbp), %r13d                ## 4-byte Reload
	orl	-108(%rbp), %r13d               ## 4-byte Folded Reload
	movl	%ebx, %edi
	callq	_SPRSIZE
	shll	$16, %r12d
	addl	$-65536, %r12d                  ## imm = 0xFFFF0000
	orl	-104(%rbp), %r12d               ## 4-byte Folded Reload
	movl	%eax, %edi
	movl	%r12d, %esi
	callq	_I915_WRITE
	cmpq	$0, 8(%r15)
	je	LBB0_27
## %bb.26:
	movl	%ebx, %edi
	callq	_SPRSCALE
	movl	%eax, %edi
	movl	-80(%rbp), %esi                 ## 4-byte Reload
	callq	_I915_WRITE
LBB0_27:
	movl	%ebx, %edi
	callq	_SPRCTL
	movl	%eax, %edi
	movl	%r13d, %esi
	callq	_I915_WRITE
	movl	%ebx, %edi
	callq	_SPRSURF
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movq	-64(%rbp), %rsi                 ## 8-byte Reload
	addq	8(%rcx), %rsi
	movl	%eax, %edi
	callq	_I915_MODIFY_DISPBASE
	movl	%ebx, %edi
	callq	_SPRSURF
	movl	%eax, %edi
	callq	_POSTING_READ
	testl	%r14d, %r14d
	je	LBB0_30
## %bb.28:
	movq	-96(%rbp), %rax                 ## 8-byte Reload
	cmpl	$0, (%rax)
	jne	LBB0_30
## %bb.29:
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_intel_update_watermarks
LBB0_30:
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
LJTI0_0:
	.long	L0_0_set_7
	.long	L0_0_set_5
	.long	L0_0_set_3
	.long	L0_0_set_2
	.long	L0_0_set_9
	.long	L0_0_set_8
	.end_data_region
                                        ## -- End function
	.comm	_SPRITE_PIXFORMAT_MASK,4,2      ## @SPRITE_PIXFORMAT_MASK
	.comm	_SPRITE_RGB_ORDER_RGBX,4,2      ## @SPRITE_RGB_ORDER_RGBX
	.comm	_SPRITE_YUV_BYTE_ORDER_MASK,4,2 ## @SPRITE_YUV_BYTE_ORDER_MASK
	.comm	_SPRITE_TILED,4,2               ## @SPRITE_TILED
	.comm	_SPRITE_FORMAT_RGBX888,4,2      ## @SPRITE_FORMAT_RGBX888
	.comm	_SPRITE_FORMAT_YUV422,4,2       ## @SPRITE_FORMAT_YUV422
	.comm	_SPRITE_YUV_ORDER_YUYV,4,2      ## @SPRITE_YUV_ORDER_YUYV
	.comm	_SPRITE_YUV_ORDER_YVYU,4,2      ## @SPRITE_YUV_ORDER_YVYU
	.comm	_SPRITE_YUV_ORDER_UYVY,4,2      ## @SPRITE_YUV_ORDER_UYVY
	.comm	_SPRITE_YUV_ORDER_VYUY,4,2      ## @SPRITE_YUV_ORDER_VYUY
	.comm	_I915_TILING_NONE,8,3           ## @I915_TILING_NONE
	.comm	_SPRITE_TRICKLE_FEED_DISABLE,4,2 ## @SPRITE_TRICKLE_FEED_DISABLE
	.comm	_SPRITE_ENABLE,4,2              ## @SPRITE_ENABLE
	.comm	_SPRITE_PIPE_CSC_ENABLE,4,2     ## @SPRITE_PIPE_CSC_ENABLE
	.comm	_SPRITE_SCALE_ENABLE,4,2        ## @SPRITE_SCALE_ENABLE
	.no_dead_strip	_ivb_update_plane
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ivb_update_plane
_ivb_update_plane:                      ; @ivb_update_plane
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	str	w6, [sp, #28]                   ; 4-byte Folded Spill
	mov	x28, x5
	stp	w3, w4, [sp, #16]               ; 8-byte Folded Spill
	mov	x27, x2
	mov	x25, x1
	ldr	w8, [x29, #20]
	str	w8, [sp, #12]                   ; 4-byte Folded Spill
	str	w7, [sp, #44]
	ldr	x19, [x0]
	ldr	x23, [x19]
	bl	_to_intel_plane
	str	x0, [sp]                        ; 8-byte Folded Spill
	ldr	w21, [x0]
	ldr	w0, [x25]
	mov	w1, #0
	bl	_drm_format_plane_cpp
	str	w0, [sp, #40]                   ; 4-byte Folded Spill
	ldr	w24, [x23]
	mov	x0, x21
	bl	_SPRCTL
	bl	_I915_READ
Lloh0:
	adrp	x8, _SPRITE_PIXFORMAT_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SPRITE_PIXFORMAT_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _SPRITE_RGB_ORDER_RGBX@GOTPAGE
Lloh4:
	ldr	x9, [x9, _SPRITE_RGB_ORDER_RGBX@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh6:
	adrp	x10, _SPRITE_YUV_BYTE_ORDER_MASK@GOTPAGE
Lloh7:
	ldr	x10, [x10, _SPRITE_YUV_BYTE_ORDER_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
	orr	w10, w8, w10
Lloh9:
	adrp	x20, _SPRITE_TILED@GOTPAGE
Lloh10:
	ldr	x20, [x20, _SPRITE_TILED@GOTPAGEOFF]
	ldr	w8, [x20]
	orr	w10, w10, w8
	bic	w26, w0, w10
	ldr	w10, [x25]
	sub	w10, w10, #128
	cmp	w10, #5
	b.hi	LBB0_3
; %bb.1:
Lloh11:
	adrp	x11, lJTI0_0@PAGE
Lloh12:
	add	x11, x11, lJTI0_0@PAGEOFF
	adr	x12, LBB0_2
	ldrb	w13, [x11, x10]
	add	x12, x12, x13, lsl #2
	br	x12
LBB0_2:
Lloh13:
	adrp	x9, _SPRITE_FORMAT_YUV422@GOTPAGE
Lloh14:
	ldr	x9, [x9, _SPRITE_FORMAT_YUV422@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
Lloh16:
	adrp	x10, _SPRITE_YUV_ORDER_YVYU@GOTPAGE
Lloh17:
	ldr	x10, [x10, _SPRITE_YUV_ORDER_YVYU@GOTPAGEOFF]
	b	LBB0_9
LBB0_3:
	bl	_BUG
	ldr	w8, [x20]
	b	LBB0_11
LBB0_4:
Lloh18:
	adrp	x9, _SPRITE_FORMAT_YUV422@GOTPAGE
Lloh19:
	ldr	x9, [x9, _SPRITE_FORMAT_YUV422@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
Lloh21:
	adrp	x10, _SPRITE_YUV_ORDER_YUYV@GOTPAGE
Lloh22:
	ldr	x10, [x10, _SPRITE_YUV_ORDER_YUYV@GOTPAGEOFF]
	b	LBB0_9
LBB0_5:
Lloh23:
	adrp	x9, _SPRITE_FORMAT_RGBX888@GOTPAGE
Lloh24:
	ldr	x9, [x9, _SPRITE_FORMAT_RGBX888@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	orr	w26, w9, w26
	b	LBB0_11
LBB0_6:
Lloh26:
	adrp	x10, _SPRITE_FORMAT_RGBX888@GOTPAGE
Lloh27:
	ldr	x10, [x10, _SPRITE_FORMAT_RGBX888@GOTPAGEOFF]
Lloh28:
	ldr	w10, [x10]
	orr	w9, w26, w9
	b	LBB0_10
LBB0_7:
Lloh29:
	adrp	x9, _SPRITE_FORMAT_YUV422@GOTPAGE
Lloh30:
	ldr	x9, [x9, _SPRITE_FORMAT_YUV422@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
Lloh32:
	adrp	x10, _SPRITE_YUV_ORDER_VYUY@GOTPAGE
Lloh33:
	ldr	x10, [x10, _SPRITE_YUV_ORDER_VYUY@GOTPAGEOFF]
	b	LBB0_9
LBB0_8:
Lloh34:
	adrp	x9, _SPRITE_FORMAT_YUV422@GOTPAGE
Lloh35:
	ldr	x9, [x9, _SPRITE_FORMAT_YUV422@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
Lloh37:
	adrp	x10, _SPRITE_YUV_ORDER_UYVY@GOTPAGE
Lloh38:
	ldr	x10, [x10, _SPRITE_YUV_ORDER_UYVY@GOTPAGEOFF]
LBB0_9:
	ldr	w10, [x10]
	orr	w9, w9, w26
LBB0_10:
	orr	w26, w9, w10
LBB0_11:
	ldr	w22, [x29, #24]
	str	x27, [sp, #32]                  ; 8-byte Folded Spill
	ldr	x9, [x27]
Lloh39:
	adrp	x10, _I915_TILING_NONE@GOTPAGE
Lloh40:
	ldr	x10, [x10, _I915_TILING_NONE@GOTPAGEOFF]
Lloh41:
	ldr	x10, [x10]
	cmp	x9, x10
	csel	w8, wzr, w8, eq
	orr	w8, w8, w26
Lloh42:
	adrp	x9, _SPRITE_TRICKLE_FEED_DISABLE@GOTPAGE
Lloh43:
	ldr	x9, [x9, _SPRITE_TRICKLE_FEED_DISABLE@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh45:
	adrp	x9, _SPRITE_ENABLE@GOTPAGE
Lloh46:
	ldr	x9, [x9, _SPRITE_ENABLE@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	orr	w27, w8, w9
	mov	x0, x19
	bl	_IS_HASWELL
Lloh48:
	adrp	x8, _SPRITE_PIPE_CSC_ENABLE@GOTPAGE
Lloh49:
	ldr	x8, [x8, _SPRITE_PIPE_CSC_ENABLE@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
	cmp	x0, #0
	csel	w20, wzr, w8, eq
	sub	w26, w28, #1
	mov	x0, x19
	mov	x1, x21
	mov	x2, x26
	ldr	w3, [sp, #40]                   ; 4-byte Folded Reload
	bl	_intel_update_sprite_watermarks
	mov	w8, #1
	lsl	w8, w8, w21
	ldr	w9, [sp, #12]                   ; 4-byte Folded Reload
	cmp	w28, w9
	mov	x28, x9
	str	w24, [sp, #24]                  ; 4-byte Folded Spill
	b.ne	LBB0_14
; %bb.12:
	ldr	w9, [sp, #28]                   ; 4-byte Folded Reload
	cmp	w9, w22
	b.ne	LBB0_14
; %bb.13:
	str	wzr, [sp, #12]                  ; 4-byte Folded Spill
	ldr	w9, [x23]
	bic	w8, w9, w8
	mov	x24, x23
	str	w8, [x23]
	b	LBB0_17
LBB0_14:
	sub	w22, w22, #1
	ldr	w9, [x23]
	orr	w8, w9, w8
	str	w8, [x23]
	cbnz	w24, LBB0_16
; %bb.15:
	mov	x0, x19
	bl	_intel_update_watermarks
	mov	x0, x19
	mov	x1, x21
	bl	_intel_wait_for_vblank
LBB0_16:
	mov	x24, x23
Lloh51:
	adrp	x8, _SPRITE_SCALE_ENABLE@GOTPAGE
Lloh52:
	ldr	x8, [x8, _SPRITE_SCALE_ENABLE@GOTPAGEOFF]
Lloh53:
	ldr	w8, [x8]
	lsl	w9, w28, #16
	sub	w9, w9, #16, lsl #12            ; =65536
	orr	w9, w22, w9
	orr	w8, w9, w8
	str	w8, [sp, #12]                   ; 4-byte Folded Spill
LBB0_17:
	orr	w27, w27, w20
	mov	x0, x21
	bl	_SPRSTRIDE
	ldr	x8, [x25, #8]
	ldr	w1, [x8]
	bl	_I915_WRITE
	mov	x0, x21
	bl	_SPRPOS
	ldp	w9, w8, [sp, #16]               ; 8-byte Folded Reload
	orr	w1, w9, w8, lsl #16
	bl	_I915_WRITE
	ldr	w20, [x29, #16]
	ldr	x8, [x25, #8]
	ldr	w22, [x8]
	ldp	w3, w28, [sp, #40]              ; 4-byte Folded Reload
	ldr	x23, [sp, #32]                  ; 8-byte Folded Reload
	ldr	x2, [x23]
	add	x0, sp, #44
	add	x1, x29, #16
	mov	x4, x22
	bl	_intel_gen4_compute_page_offset
	mov	x25, x0
	mov	x0, x19
	bl	_IS_HASWELL
	cbz	x0, LBB0_19
; %bb.18:
	mov	x0, x21
	bl	_SPROFFSET
	b	LBB0_22
LBB0_19:
	ldr	x8, [x23]
Lloh54:
	adrp	x9, _I915_TILING_NONE@GOTPAGE
Lloh55:
	ldr	x9, [x9, _I915_TILING_NONE@GOTPAGEOFF]
Lloh56:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_21
; %bb.20:
	mul	w8, w22, w20
	ldr	w9, [sp, #40]                   ; 4-byte Folded Reload
	madd	w20, w28, w9, w8
	mov	x0, x21
	bl	_SPRLINOFF
	sub	w1, w20, w25
	b	LBB0_23
LBB0_21:
	mov	x0, x21
	bl	_SPRTILEOFF
LBB0_22:
	ldr	w8, [x29, #16]
	ldr	w9, [sp, #44]
	orr	w1, w9, w8, lsl #16
LBB0_23:
	bl	_I915_WRITE
	ldr	x20, [sp]                       ; 8-byte Folded Reload
	mov	x0, x21
	bl	_SPRSIZE
	ldr	w8, [sp, #28]                   ; 4-byte Folded Reload
	lsl	w8, w8, #16
	sub	w8, w8, #16, lsl #12            ; =65536
	orr	w1, w8, w26
	bl	_I915_WRITE
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_25
; %bb.24:
	mov	x0, x21
	bl	_SPRSCALE
	ldr	w1, [sp, #12]                   ; 4-byte Folded Reload
	bl	_I915_WRITE
LBB0_25:
	mov	x0, x21
	bl	_SPRCTL
	mov	x1, x27
	bl	_I915_WRITE
	mov	x0, x21
	bl	_SPRSURF
	ldr	x8, [sp, #32]                   ; 8-byte Folded Reload
	ldr	x8, [x8, #8]
	add	x1, x8, x25
	bl	_I915_MODIFY_DISPBASE
	mov	x0, x21
	bl	_SPRSURF
	bl	_POSTING_READ
	ldr	w8, [sp, #24]                   ; 4-byte Folded Reload
	cbz	w8, LBB0_28
; %bb.26:
	ldr	w8, [x24]
	cbnz	w8, LBB0_28
; %bb.27:
	mov	x0, x19
	bl	_intel_update_watermarks
LBB0_28:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
	.byte	(LBB0_8-LBB0_2)>>2
                                        ; -- End function
	.comm	_SPRITE_PIXFORMAT_MASK,4,2      ; @SPRITE_PIXFORMAT_MASK
	.comm	_SPRITE_RGB_ORDER_RGBX,4,2      ; @SPRITE_RGB_ORDER_RGBX
	.comm	_SPRITE_YUV_BYTE_ORDER_MASK,4,2 ; @SPRITE_YUV_BYTE_ORDER_MASK
	.comm	_SPRITE_TILED,4,2               ; @SPRITE_TILED
	.comm	_SPRITE_FORMAT_RGBX888,4,2      ; @SPRITE_FORMAT_RGBX888
	.comm	_SPRITE_FORMAT_YUV422,4,2       ; @SPRITE_FORMAT_YUV422
	.comm	_SPRITE_YUV_ORDER_YUYV,4,2      ; @SPRITE_YUV_ORDER_YUYV
	.comm	_SPRITE_YUV_ORDER_YVYU,4,2      ; @SPRITE_YUV_ORDER_YVYU
	.comm	_SPRITE_YUV_ORDER_UYVY,4,2      ; @SPRITE_YUV_ORDER_UYVY
	.comm	_SPRITE_YUV_ORDER_VYUY,4,2      ; @SPRITE_YUV_ORDER_VYUY
	.comm	_I915_TILING_NONE,8,3           ; @I915_TILING_NONE
	.comm	_SPRITE_TRICKLE_FEED_DISABLE,4,2 ; @SPRITE_TRICKLE_FEED_DISABLE
	.comm	_SPRITE_ENABLE,4,2              ; @SPRITE_ENABLE
	.comm	_SPRITE_PIPE_CSC_ENABLE,4,2     ; @SPRITE_PIPE_CSC_ENABLE
	.comm	_SPRITE_SCALE_ENABLE,4,2        ; @SPRITE_SCALE_ENABLE
	.no_dead_strip	_ivb_update_plane
.subsections_via_symbols
