	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r300_fence_ring_emit           ## -- Begin function r300_fence_ring_emit
	.p2align	4, 0x90
_r300_fence_ring_emit:                  ## @r300_fence_ring_emit
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	(%rsi), %rbx
	shlq	$2, %rbx
	addq	16(%rdi), %rbx
	movq	_R300_RE_SCISSORS_TL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	_R300_RE_SCISSORS_BR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	_R300_RB3D_DSTCACHE_CTLSTAT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_R300_RB3D_DC_FLUSH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	movq	_R300_RB3D_ZCACHE_CTLSTAT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_R300_ZC_FLUSH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	movq	_RADEON_WAIT_UNTIL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_RADEON_WAIT_3D_IDLECLEAN@GOTPCREL(%rip), %rax
	movq	_RADEON_WAIT_2D_IDLECLEAN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_RADEON_WAIT_DMA_GUI_IDLE@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	movq	_RADEON_HOST_PATH_CNTL@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_RADEON_HDP_READ_BUFFER_INVALIDATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	8(%r15), %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movl	8(%r15), %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	movq	(%r15), %rax
	movq	(%r14), %rcx
	movl	(%rax,%rcx,4), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movl	8(%r14), %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	movq	_RADEON_GEN_INT_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_RADEON_SW_INT_FIRE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_R300_RE_SCISSORS_TL,4,2        ## @R300_RE_SCISSORS_TL
	.comm	_R300_RE_SCISSORS_BR,4,2        ## @R300_RE_SCISSORS_BR
	.comm	_R300_RB3D_DSTCACHE_CTLSTAT,4,2 ## @R300_RB3D_DSTCACHE_CTLSTAT
	.comm	_R300_RB3D_DC_FLUSH,4,2         ## @R300_RB3D_DC_FLUSH
	.comm	_R300_RB3D_ZCACHE_CTLSTAT,4,2   ## @R300_RB3D_ZCACHE_CTLSTAT
	.comm	_R300_ZC_FLUSH,4,2              ## @R300_ZC_FLUSH
	.comm	_RADEON_WAIT_UNTIL,4,2          ## @RADEON_WAIT_UNTIL
	.comm	_RADEON_WAIT_3D_IDLECLEAN,4,2   ## @RADEON_WAIT_3D_IDLECLEAN
	.comm	_RADEON_WAIT_2D_IDLECLEAN,4,2   ## @RADEON_WAIT_2D_IDLECLEAN
	.comm	_RADEON_WAIT_DMA_GUI_IDLE,4,2   ## @RADEON_WAIT_DMA_GUI_IDLE
	.comm	_RADEON_HOST_PATH_CNTL,4,2      ## @RADEON_HOST_PATH_CNTL
	.comm	_RADEON_HDP_READ_BUFFER_INVALIDATE,4,2 ## @RADEON_HDP_READ_BUFFER_INVALIDATE
	.comm	_RADEON_GEN_INT_STATUS,4,2      ## @RADEON_GEN_INT_STATUS
	.comm	_RADEON_SW_INT_FIRE,4,2         ## @RADEON_SW_INT_FIRE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r300_fence_ring_emit           ; -- Begin function r300_fence_ring_emit
	.p2align	2
_r300_fence_ring_emit:                  ; @r300_fence_ring_emit
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x21, x0
	ldr	x8, [x0, #16]
	ldr	x9, [x1]
	add	x19, x8, x9, lsl #2
Lloh0:
	adrp	x8, _R300_RE_SCISSORS_TL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _R300_RE_SCISSORS_TL@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
Lloh3:
	adrp	x8, _R300_RE_SCISSORS_BR@GOTPAGE
Lloh4:
	ldr	x8, [x8, _R300_RE_SCISSORS_BR@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
Lloh6:
	adrp	x8, _R300_RB3D_DSTCACHE_CTLSTAT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _R300_RB3D_DSTCACHE_CTLSTAT@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
Lloh9:
	adrp	x8, _R300_RB3D_DC_FLUSH@GOTPAGE
Lloh10:
	ldr	x8, [x8, _R300_RB3D_DC_FLUSH@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_radeon_ring_write
Lloh12:
	adrp	x8, _R300_RB3D_ZCACHE_CTLSTAT@GOTPAGE
Lloh13:
	ldr	x8, [x8, _R300_RB3D_ZCACHE_CTLSTAT@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
Lloh15:
	adrp	x8, _R300_ZC_FLUSH@GOTPAGE
Lloh16:
	ldr	x8, [x8, _R300_ZC_FLUSH@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_radeon_ring_write
Lloh18:
	adrp	x8, _RADEON_WAIT_UNTIL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _RADEON_WAIT_UNTIL@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
Lloh21:
	adrp	x8, _RADEON_WAIT_3D_IDLECLEAN@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RADEON_WAIT_3D_IDLECLEAN@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
Lloh24:
	adrp	x9, _RADEON_WAIT_2D_IDLECLEAN@GOTPAGE
Lloh25:
	ldr	x9, [x9, _RADEON_WAIT_2D_IDLECLEAN@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh27:
	adrp	x9, _RADEON_WAIT_DMA_GUI_IDLE@GOTPAGE
Lloh28:
	ldr	x9, [x9, _RADEON_WAIT_DMA_GUI_IDLE@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	orr	w1, w8, w9
	mov	x0, x19
	bl	_radeon_ring_write
Lloh30:
	adrp	x22, _RADEON_HOST_PATH_CNTL@GOTPAGE
Lloh31:
	ldr	x22, [x22, _RADEON_HOST_PATH_CNTL@GOTPAGEOFF]
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
	ldr	w8, [x21, #8]
Lloh32:
	adrp	x9, _RADEON_HDP_READ_BUFFER_INVALIDATE@GOTPAGE
Lloh33:
	ldr	x9, [x9, _RADEON_HDP_READ_BUFFER_INVALIDATE@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	orr	w1, w9, w8
	mov	x0, x19
	bl	_radeon_ring_write
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
	ldr	w1, [x21, #8]
	mov	x0, x19
	bl	_radeon_ring_write
	ldr	x8, [x21]
	ldr	x9, [x20]
	ldr	w0, [x8, x9, lsl #2]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
	ldr	w1, [x20, #8]
	mov	x0, x19
	bl	_radeon_ring_write
Lloh35:
	adrp	x8, _RADEON_GEN_INT_STATUS@GOTPAGE
Lloh36:
	ldr	x8, [x8, _RADEON_GEN_INT_STATUS@GOTPAGEOFF]
Lloh37:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
Lloh38:
	adrp	x8, _RADEON_SW_INT_FIRE@GOTPAGE
Lloh39:
	ldr	x8, [x8, _RADEON_SW_INT_FIRE@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_radeon_ring_write
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_R300_RE_SCISSORS_TL,4,2        ; @R300_RE_SCISSORS_TL
	.comm	_R300_RE_SCISSORS_BR,4,2        ; @R300_RE_SCISSORS_BR
	.comm	_R300_RB3D_DSTCACHE_CTLSTAT,4,2 ; @R300_RB3D_DSTCACHE_CTLSTAT
	.comm	_R300_RB3D_DC_FLUSH,4,2         ; @R300_RB3D_DC_FLUSH
	.comm	_R300_RB3D_ZCACHE_CTLSTAT,4,2   ; @R300_RB3D_ZCACHE_CTLSTAT
	.comm	_R300_ZC_FLUSH,4,2              ; @R300_ZC_FLUSH
	.comm	_RADEON_WAIT_UNTIL,4,2          ; @RADEON_WAIT_UNTIL
	.comm	_RADEON_WAIT_3D_IDLECLEAN,4,2   ; @RADEON_WAIT_3D_IDLECLEAN
	.comm	_RADEON_WAIT_2D_IDLECLEAN,4,2   ; @RADEON_WAIT_2D_IDLECLEAN
	.comm	_RADEON_WAIT_DMA_GUI_IDLE,4,2   ; @RADEON_WAIT_DMA_GUI_IDLE
	.comm	_RADEON_HOST_PATH_CNTL,4,2      ; @RADEON_HOST_PATH_CNTL
	.comm	_RADEON_HDP_READ_BUFFER_INVALIDATE,4,2 ; @RADEON_HDP_READ_BUFFER_INVALIDATE
	.comm	_RADEON_GEN_INT_STATUS,4,2      ; @RADEON_GEN_INT_STATUS
	.comm	_RADEON_SW_INT_FIRE,4,2         ; @RADEON_SW_INT_FIRE
.subsections_via_symbols
