	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_kvm_arch_vcpu_ioctl_set_sregs  ## -- Begin function kvm_arch_vcpu_ioctl_set_sregs
	.p2align	4, 0x90
_kvm_arch_vcpu_ioctl_set_sregs:         ## @kvm_arch_vcpu_ioctl_set_sregs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r12
	callq	_vcpu_load
	movq	%r12, %rdi
	callq	_guest_cpuid_has_xsave
	testl	%eax, %eax
	je	LBB0_1
LBB0_3:
	movl	128(%r14), %eax
	movl	%eax, -44(%rbp)
	movl	124(%r14), %eax
	movl	%eax, -48(%rbp)
	movq	_kvm_x86_ops@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rax
	movq	%rcx, %rbx
	leaq	-48(%rbp), %r15
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	*32(%rax)
	movl	120(%r14), %eax
	movl	%eax, -44(%rbp)
	movl	116(%r14), %eax
	movl	%eax, -48(%rbp)
	movq	(%rbx), %rax
	movq	%rbx, %r13
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	*24(%rax)
	movl	112(%r14), %eax
	movl	%eax, 28(%r12)
	movq	8(%r14), %rax
	movq	(%r12), %r15
	xorq	%rax, %r15
	movq	%rax, (%r12)
	movl	108(%r14), %esi
	movq	%r12, %rdi
	callq	_kvm_set_cr8
	movq	16(%r14), %rsi
	movq	8(%r12), %rbx
	xorq	%rsi, %rbx
	orq	%r15, %rbx
	movq	(%r13), %rax
	movq	%r12, %rdi
	callq	*16(%rax)
	movl	104(%r14), %esi
	movq	%r12, %rdi
	callq	_kvm_set_apic_base
	movq	%r12, %rdi
	callq	_kvm_read_cr0
	movq	24(%r14), %rsi
	xorq	%rsi, %rax
	orq	%rbx, %rax
	setne	%r15b
	movq	%r13, %rbx
	movq	(%r13), %rax
	movq	%r12, %rdi
	callq	*8(%rax)
	movq	24(%r14), %rax
	movq	%rax, 16(%r12)
	movq	%r12, %rdi
	callq	_kvm_read_cr4
	movl	(%r14), %esi
	cmpl	%esi, %eax
	setne	%r13b
	movq	(%rbx), %rax
	movq	%r12, %rdi
	callq	*(%rax)
	movq	_X86_CR4_OSXSAVE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r14)
	je	LBB0_5
## %bb.4:
	movq	%r12, %rdi
	callq	_update_cpuid
LBB0_5:
	orb	%r13b, %r15b
	movq	%r12, %rdi
	callq	_is_long_mode
	testl	%eax, %eax
	jne	LBB0_8
## %bb.6:
	movq	%r12, %rdi
	callq	_is_pae
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:
	movq	(%r12), %rsi
	movq	%r12, %rdi
	callq	_load_pdptrs
LBB0_8:
	testb	%r15b, %r15b
	je	LBB0_10
## %bb.9:
	movq	%r12, %rdi
	callq	_kvm_mmu_reset_context
LBB0_10:
	movq	96(%r14), %rdi
	movl	$64, %esi
	callq	_find_first_bit
	cmpl	$63, %eax
	jg	LBB0_13
## %bb.11:
	movl	%eax, %r15d
	movq	%r12, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_kvm_queue_interrupt
	leaq	L_.str(%rip), %rdi
	movl	%r15d, %esi
	callq	_pr_debug
	movl	32(%r12), %edi
	callq	_irqchip_in_kernel
	testq	%rax, %rax
	je	LBB0_13
## %bb.12:
	movl	32(%r12), %edi
	callq	_kvm_pic_clear_isr_ack
LBB0_13:
	leaq	32(%r14), %r15
	movq	_VCPU_SREG_CS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	_kvm_set_segment
	leaq	88(%r14), %rsi
	movq	_VCPU_SREG_DS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_kvm_set_segment
	leaq	80(%r14), %rsi
	movq	_VCPU_SREG_ES@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_kvm_set_segment
	leaq	72(%r14), %rsi
	movq	_VCPU_SREG_FS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_kvm_set_segment
	leaq	64(%r14), %rsi
	movq	_VCPU_SREG_GS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_kvm_set_segment
	leaq	56(%r14), %rsi
	movq	_VCPU_SREG_SS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_kvm_set_segment
	leaq	48(%r14), %rsi
	movq	_VCPU_SREG_TR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_kvm_set_segment
	leaq	40(%r14), %rsi
	movq	_VCPU_SREG_LDTR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_kvm_set_segment
	movq	%r12, %rdi
	callq	_update_cr8_intercept
	movq	%r12, %rdi
	callq	_kvm_vcpu_is_bsp
	xorl	%ebx, %ebx
	testq	%rax, %rax
	je	LBB0_19
## %bb.14:
	movq	%r12, %rdi
	callq	_kvm_rip_read
	cmpl	$65520, %eax                    ## imm = 0xFFF0
	jne	LBB0_19
## %bb.15:
	cmpl	$61440, (%r15)                  ## imm = 0xF000
	jne	LBB0_19
## %bb.16:
	cmpl	$-65536, 36(%r14)               ## imm = 0xFFFF0000
	jne	LBB0_19
## %bb.17:
	movq	_X86_CR0_PE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_kvm_read_cr0_bits
	testl	%eax, %eax
	jne	LBB0_19
## %bb.18:
	movq	_KVM_MP_STATE_RUNNABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%r12)
	jmp	LBB0_19
LBB0_1:
	movq	_X86_CR4_OSXSAVE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r14)
	je	LBB0_3
## %bb.2:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_19:
	movq	%r12, %rdi
	callq	_vcpu_put
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_X86_CR4_OSXSAVE,4,2            ## @X86_CR4_OSXSAVE
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_kvm_x86_ops,8,3                ## @kvm_x86_ops
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Set back pending irq %d\n"

	.comm	_VCPU_SREG_CS,4,2               ## @VCPU_SREG_CS
	.comm	_VCPU_SREG_DS,4,2               ## @VCPU_SREG_DS
	.comm	_VCPU_SREG_ES,4,2               ## @VCPU_SREG_ES
	.comm	_VCPU_SREG_FS,4,2               ## @VCPU_SREG_FS
	.comm	_VCPU_SREG_GS,4,2               ## @VCPU_SREG_GS
	.comm	_VCPU_SREG_SS,4,2               ## @VCPU_SREG_SS
	.comm	_VCPU_SREG_TR,4,2               ## @VCPU_SREG_TR
	.comm	_VCPU_SREG_LDTR,4,2             ## @VCPU_SREG_LDTR
	.comm	_X86_CR0_PE,4,2                 ## @X86_CR0_PE
	.comm	_KVM_MP_STATE_RUNNABLE,4,2      ## @KVM_MP_STATE_RUNNABLE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_kvm_arch_vcpu_ioctl_set_sregs  ; -- Begin function kvm_arch_vcpu_ioctl_set_sregs
	.p2align	2
_kvm_arch_vcpu_ioctl_set_sregs:         ; @kvm_arch_vcpu_ioctl_set_sregs
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x1
	mov	x19, x0
	bl	_vcpu_load
	mov	x0, x19
	bl	_guest_cpuid_has_xsave
Lloh0:
	adrp	x24, _X86_CR4_OSXSAVE@GOTPAGE
Lloh1:
	ldr	x24, [x24, _X86_CR4_OSXSAVE@GOTPAGEOFF]
	cbz	w0, LBB0_18
LBB0_1:
	ldp	w9, w8, [x20, #124]
	stp	w9, w8, [sp, #8]
Lloh2:
	adrp	x25, _kvm_x86_ops@GOTPAGE
Lloh3:
	ldr	x25, [x25, _kvm_x86_ops@GOTPAGEOFF]
	ldr	x8, [x25]
	ldr	x8, [x8, #32]
	add	x1, sp, #8
	mov	x0, x19
	blr	x8
	ldur	d0, [x20, #116]
	str	d0, [sp, #8]
	ldr	x8, [x25]
	ldr	x8, [x8, #24]
	add	x1, sp, #8
	mov	x0, x19
	blr	x8
	ldp	w1, w8, [x20, #108]
	str	w8, [x19, #28]
	ldr	x26, [x19]
	ldr	x27, [x20, #8]
	str	x27, [x19]
	mov	x0, x19
	bl	_kvm_set_cr8
	ldr	x28, [x19, #8]
	ldr	x21, [x20, #16]
	ldr	x8, [x25]
	ldr	x8, [x8, #16]
	mov	x0, x19
	mov	x1, x21
	blr	x8
	ldr	w1, [x20, #104]
	mov	x0, x19
	bl	_kvm_set_apic_base
	mov	x0, x19
	bl	_kvm_read_cr0
	mov	x22, x0
	ldr	x23, [x20, #24]
	ldr	x8, [x25]
	ldr	x8, [x8, #8]
	mov	x0, x19
	mov	x1, x23
	blr	x8
	ldr	x8, [x20, #24]
	str	x8, [x19, #16]
	mov	x0, x19
	bl	_kvm_read_cr4
	cmp	x26, x27
	ccmp	x28, x21, #0, eq
	ccmp	x22, x23, #0, eq
	ldr	w1, [x20]
	ccmp	w0, w1, #0, eq
	cset	w21, ne
	ldr	x8, [x25]
	ldr	x8, [x8]
	mov	x0, x19
	blr	x8
	ldr	w8, [x20]
	ldr	w9, [x24]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.2:
	mov	x0, x19
	bl	_update_cpuid
LBB0_3:
	mov	x0, x19
	bl	_is_long_mode
	cbnz	w0, LBB0_6
; %bb.4:
	mov	x0, x19
	bl	_is_pae
	cbz	x0, LBB0_6
; %bb.5:
	ldr	x1, [x19]
	mov	x0, x19
	bl	_load_pdptrs
LBB0_6:
	cbz	w21, LBB0_8
; %bb.7:
	mov	x0, x19
	bl	_kvm_mmu_reset_context
LBB0_8:
	ldr	x0, [x20, #96]
	mov	w1, #64
	bl	_find_first_bit
	cmp	w0, #63
	b.gt	LBB0_11
; %bb.9:
	mov	x21, x0
	mov	x0, x19
	mov	x1, x21
	mov	w2, #0
	bl	_kvm_queue_interrupt
Lloh4:
	adrp	x0, l_.str@PAGE
Lloh5:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x21
	bl	_pr_debug
	ldr	w0, [x19, #32]
	bl	_irqchip_in_kernel
	cbz	x0, LBB0_11
; %bb.10:
	ldr	w0, [x19, #32]
	bl	_kvm_pic_clear_isr_ack
LBB0_11:
	add	x21, x20, #32
Lloh6:
	adrp	x8, _VCPU_SREG_CS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VCPU_SREG_CS@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x21
	bl	_kvm_set_segment
	add	x1, x20, #88
Lloh9:
	adrp	x8, _VCPU_SREG_DS@GOTPAGE
Lloh10:
	ldr	x8, [x8, _VCPU_SREG_DS@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_kvm_set_segment
	add	x1, x20, #80
Lloh12:
	adrp	x8, _VCPU_SREG_ES@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VCPU_SREG_ES@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_kvm_set_segment
	add	x1, x20, #72
Lloh15:
	adrp	x8, _VCPU_SREG_FS@GOTPAGE
Lloh16:
	ldr	x8, [x8, _VCPU_SREG_FS@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_kvm_set_segment
	add	x1, x20, #64
Lloh18:
	adrp	x8, _VCPU_SREG_GS@GOTPAGE
Lloh19:
	ldr	x8, [x8, _VCPU_SREG_GS@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_kvm_set_segment
	add	x1, x20, #56
Lloh21:
	adrp	x8, _VCPU_SREG_SS@GOTPAGE
Lloh22:
	ldr	x8, [x8, _VCPU_SREG_SS@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_kvm_set_segment
	add	x1, x20, #48
Lloh24:
	adrp	x8, _VCPU_SREG_TR@GOTPAGE
Lloh25:
	ldr	x8, [x8, _VCPU_SREG_TR@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_kvm_set_segment
	add	x1, x20, #40
Lloh27:
	adrp	x8, _VCPU_SREG_LDTR@GOTPAGE
Lloh28:
	ldr	x8, [x8, _VCPU_SREG_LDTR@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_kvm_set_segment
	mov	x0, x19
	bl	_update_cr8_intercept
	mov	x0, x19
	bl	_kvm_vcpu_is_bsp
	cbz	x0, LBB0_17
; %bb.12:
	mov	x0, x19
	bl	_kvm_rip_read
	mov	w8, #65520
	cmp	w0, w8
	b.ne	LBB0_17
; %bb.13:
	ldr	w8, [x21]
	cmp	w8, #15, lsl #12                ; =61440
	b.ne	LBB0_17
; %bb.14:
	ldr	w8, [x20, #36]
	cmn	w8, #16, lsl #12                ; =65536
	b.ne	LBB0_17
; %bb.15:
Lloh30:
	adrp	x8, _X86_CR0_PE@GOTPAGE
Lloh31:
	ldr	x8, [x8, _X86_CR0_PE@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_kvm_read_cr0_bits
	mov	w20, #0
	cbnz	w0, LBB0_20
; %bb.16:
Lloh33:
	adrp	x8, _KVM_MP_STATE_RUNNABLE@GOTPAGE
Lloh34:
	ldr	x8, [x8, _KVM_MP_STATE_RUNNABLE@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	str	w8, [x19, #24]
	b	LBB0_20
LBB0_17:
	mov	w20, #0
	b	LBB0_20
LBB0_18:
	ldr	w8, [x20]
	ldr	w9, [x24]
	tst	w9, w8
	b.eq	LBB0_1
; %bb.19:
Lloh36:
	adrp	x8, _EINVAL@GOTPAGE
Lloh37:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	neg	w20, w8
LBB0_20:
	mov	x0, x19
	bl	_vcpu_put
	mov	x0, x20
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.cfi_endproc
                                        ; -- End function
	.comm	_X86_CR4_OSXSAVE,4,2            ; @X86_CR4_OSXSAVE
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_kvm_x86_ops,8,3                ; @kvm_x86_ops
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Set back pending irq %d\n"

	.comm	_VCPU_SREG_CS,4,2               ; @VCPU_SREG_CS
	.comm	_VCPU_SREG_DS,4,2               ; @VCPU_SREG_DS
	.comm	_VCPU_SREG_ES,4,2               ; @VCPU_SREG_ES
	.comm	_VCPU_SREG_FS,4,2               ; @VCPU_SREG_FS
	.comm	_VCPU_SREG_GS,4,2               ; @VCPU_SREG_GS
	.comm	_VCPU_SREG_SS,4,2               ; @VCPU_SREG_SS
	.comm	_VCPU_SREG_TR,4,2               ; @VCPU_SREG_TR
	.comm	_VCPU_SREG_LDTR,4,2             ; @VCPU_SREG_LDTR
	.comm	_X86_CR0_PE,4,2                 ; @X86_CR0_PE
	.comm	_KVM_MP_STATE_RUNNABLE,4,2      ; @KVM_MP_STATE_RUNNABLE
.subsections_via_symbols
