	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function uv_setup_intr
_uv_setup_intr:                         ## @uv_setup_intr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movl	%edi, %r15d
	callq	_cpu_physical_id
	movq	%rax, %rbx
	movq	_uv_apicid_hibits@GOTPCREL(%rip), %rax
	orq	(%rax), %rbx
	movl	%r15d, %edi
	callq	_uv_cpu_to_pnode
	movl	%eax, %r15d
	movq	_UVH_RTC1_INT_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_UVH_RTC1_INT_CONFIG_M_MASK@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movl	%r15d, %edi
	callq	_uv_write_global_mmr64
	movq	_UVH_INT_CMPB@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movl	%r15d, %edi
	movq	$-1, %rdx
	callq	_uv_write_global_mmr64
	xorl	%r12d, %r12d
	xorl	%eax, %eax
	callq	_is_uv1_hub
	testq	%rax, %rax
	movq	_UVH_EVENT_OCCURRED0_ALIAS@GOTPCREL(%rip), %rax
	cmoveq	_UVXH_EVENT_OCCURRED2_ALIAS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_UV1H_EVENT_OCCURRED0_RTC1_MASK@GOTPCREL(%rip), %rax
	cmoveq	_UVXH_EVENT_OCCURRED2_RTC_1_MASK@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movl	%r15d, %edi
	callq	_uv_write_global_mmr64
	movq	_X86_PLATFORM_IPI_VECTOR@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_UVH_RTC1_INT_CONFIG_VECTOR_SHFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rax
	movq	_UVH_RTC1_INT_CONFIG_APIC_ID_SHFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rbx
	orq	%rax, %rbx
	movq	_UVH_RTC1_INT_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edi
	movq	%rbx, %rdx
	callq	_uv_write_global_mmr64
	movl	(%r13), %esi
	movl	%r15d, %edi
	movq	%r14, %rdx
	callq	_uv_write_global_mmr64
	xorl	%edi, %edi
	callq	_uv_read_rtc
	cmpq	%r14, %rax
	jle	LBB0_2
## %bb.1:
	movl	%r15d, %edi
	callq	_uv_intr_pending
	xorl	%r12d, %r12d
	testl	%eax, %eax
	sete	%r12b
LBB0_2:
	movl	%r12d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_uv_apicid_hibits,8,3           ## @uv_apicid_hibits
	.comm	_UVH_RTC1_INT_CONFIG,4,2        ## @UVH_RTC1_INT_CONFIG
	.comm	_UVH_RTC1_INT_CONFIG_M_MASK,8,3 ## @UVH_RTC1_INT_CONFIG_M_MASK
	.comm	_UVH_INT_CMPB,4,2               ## @UVH_INT_CMPB
	.comm	_UVH_EVENT_OCCURRED0_ALIAS,4,2  ## @UVH_EVENT_OCCURRED0_ALIAS
	.comm	_UV1H_EVENT_OCCURRED0_RTC1_MASK,8,3 ## @UV1H_EVENT_OCCURRED0_RTC1_MASK
	.comm	_UVXH_EVENT_OCCURRED2_ALIAS,4,2 ## @UVXH_EVENT_OCCURRED2_ALIAS
	.comm	_UVXH_EVENT_OCCURRED2_RTC_1_MASK,8,3 ## @UVXH_EVENT_OCCURRED2_RTC_1_MASK
	.comm	_X86_PLATFORM_IPI_VECTOR,8,3    ## @X86_PLATFORM_IPI_VECTOR
	.comm	_UVH_RTC1_INT_CONFIG_VECTOR_SHFT,8,3 ## @UVH_RTC1_INT_CONFIG_VECTOR_SHFT
	.comm	_UVH_RTC1_INT_CONFIG_APIC_ID_SHFT,8,3 ## @UVH_RTC1_INT_CONFIG_APIC_ID_SHFT
	.no_dead_strip	_uv_setup_intr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function uv_setup_intr
_uv_setup_intr:                         ; @uv_setup_intr
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
	bl	_cpu_physical_id
Lloh0:
	adrp	x8, _uv_apicid_hibits@GOTPAGE
Lloh1:
	ldr	x8, [x8, _uv_apicid_hibits@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	orr	x21, x8, x0
	mov	x0, x20
	bl	_uv_cpu_to_pnode
	mov	x20, x0
Lloh3:
	adrp	x22, _UVH_RTC1_INT_CONFIG@GOTPAGE
Lloh4:
	ldr	x22, [x22, _UVH_RTC1_INT_CONFIG@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh5:
	adrp	x8, _UVH_RTC1_INT_CONFIG_M_MASK@GOTPAGE
Lloh6:
	ldr	x8, [x8, _UVH_RTC1_INT_CONFIG_M_MASK@GOTPAGEOFF]
Lloh7:
	ldr	x2, [x8]
	bl	_uv_write_global_mmr64
Lloh8:
	adrp	x23, _UVH_INT_CMPB@GOTPAGE
Lloh9:
	ldr	x23, [x23, _UVH_INT_CMPB@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x20
	mov	x2, #-1
	bl	_uv_write_global_mmr64
	bl	_is_uv1_hub
Lloh10:
	adrp	x8, _UVXH_EVENT_OCCURRED2_ALIAS@GOTPAGE
Lloh11:
	ldr	x8, [x8, _UVXH_EVENT_OCCURRED2_ALIAS@GOTPAGEOFF]
Lloh12:
	adrp	x9, _UVH_EVENT_OCCURRED0_ALIAS@GOTPAGE
Lloh13:
	ldr	x9, [x9, _UVH_EVENT_OCCURRED0_ALIAS@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x8, x9, eq
	ldr	w1, [x8]
Lloh14:
	adrp	x8, _UVXH_EVENT_OCCURRED2_RTC_1_MASK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _UVXH_EVENT_OCCURRED2_RTC_1_MASK@GOTPAGEOFF]
Lloh16:
	adrp	x9, _UV1H_EVENT_OCCURRED0_RTC1_MASK@GOTPAGE
Lloh17:
	ldr	x9, [x9, _UV1H_EVENT_OCCURRED0_RTC1_MASK@GOTPAGEOFF]
	csel	x8, x8, x9, eq
	ldr	x2, [x8]
	mov	x0, x20
	bl	_uv_write_global_mmr64
Lloh18:
	adrp	x8, _X86_PLATFORM_IPI_VECTOR@GOTPAGE
Lloh19:
	ldr	x8, [x8, _X86_PLATFORM_IPI_VECTOR@GOTPAGEOFF]
Lloh20:
	ldr	x8, [x8]
Lloh21:
	adrp	x9, _UVH_RTC1_INT_CONFIG_VECTOR_SHFT@GOTPAGE
Lloh22:
	ldr	x9, [x9, _UVH_RTC1_INT_CONFIG_VECTOR_SHFT@GOTPAGEOFF]
Lloh23:
	ldr	x9, [x9]
	lsl	x8, x8, x9
Lloh24:
	adrp	x9, _UVH_RTC1_INT_CONFIG_APIC_ID_SHFT@GOTPAGE
Lloh25:
	ldr	x9, [x9, _UVH_RTC1_INT_CONFIG_APIC_ID_SHFT@GOTPAGEOFF]
Lloh26:
	ldr	x9, [x9]
	lsl	x9, x21, x9
	orr	x2, x9, x8
	ldr	w1, [x22]
	mov	x0, x20
	bl	_uv_write_global_mmr64
	ldr	w1, [x23]
	mov	x0, x20
	mov	x2, x19
	bl	_uv_write_global_mmr64
	mov	x0, #0
	bl	_uv_read_rtc
	cmp	x0, x19
	b.le	LBB0_2
; %bb.1:
	mov	x0, x20
	bl	_uv_intr_pending
	cmp	w0, #0
	cset	w0, eq
	b	LBB0_3
LBB0_2:
	mov	w0, #0
LBB0_3:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_uv_apicid_hibits,8,3           ; @uv_apicid_hibits
	.comm	_UVH_RTC1_INT_CONFIG,4,2        ; @UVH_RTC1_INT_CONFIG
	.comm	_UVH_RTC1_INT_CONFIG_M_MASK,8,3 ; @UVH_RTC1_INT_CONFIG_M_MASK
	.comm	_UVH_INT_CMPB,4,2               ; @UVH_INT_CMPB
	.comm	_UVH_EVENT_OCCURRED0_ALIAS,4,2  ; @UVH_EVENT_OCCURRED0_ALIAS
	.comm	_UV1H_EVENT_OCCURRED0_RTC1_MASK,8,3 ; @UV1H_EVENT_OCCURRED0_RTC1_MASK
	.comm	_UVXH_EVENT_OCCURRED2_ALIAS,4,2 ; @UVXH_EVENT_OCCURRED2_ALIAS
	.comm	_UVXH_EVENT_OCCURRED2_RTC_1_MASK,8,3 ; @UVXH_EVENT_OCCURRED2_RTC_1_MASK
	.comm	_X86_PLATFORM_IPI_VECTOR,8,3    ; @X86_PLATFORM_IPI_VECTOR
	.comm	_UVH_RTC1_INT_CONFIG_VECTOR_SHFT,8,3 ; @UVH_RTC1_INT_CONFIG_VECTOR_SHFT
	.comm	_UVH_RTC1_INT_CONFIG_APIC_ID_SHFT,8,3 ; @UVH_RTC1_INT_CONFIG_APIC_ID_SHFT
	.no_dead_strip	_uv_setup_intr
.subsections_via_symbols
