	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_startup
_si_startup:                            ## @si_startup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	cmpl	$0, 48(%rdi)
	je	LBB0_5
## %bb.1:
	cmpl	$0, 44(%r14)
	je	LBB0_5
## %bb.2:
	cmpl	$0, 40(%r14)
	je	LBB0_5
## %bb.3:
	cmpl	$0, 36(%r14)
	je	LBB0_5
## %bb.4:
	cmpl	$0, 32(%r14)
	jne	LBB0_8
LBB0_5:
	movq	%r14, %rdi
	callq	_si_init_microcode
	testl	%eax, %eax
	je	LBB0_8
## %bb.6:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_7
LBB0_8:
	movq	%r14, %rdi
	callq	_si_mc_load_microcode
	testl	%eax, %eax
	je	LBB0_10
## %bb.9:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
LBB0_7:
	xorl	%eax, %eax
	callq	_DRM_ERROR
LBB0_40:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	movq	%r14, %rdi
	callq	_r600_vram_scratch_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.11:
	movq	%r14, %rdi
	callq	_si_mc_program
	movq	%r14, %rdi
	callq	_si_pcie_gart_enable
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.12:
	movq	%r14, %rdi
	callq	_si_gpu_init
	movq	%r14, %rdi
	callq	_si_rlc_init
	testl	%eax, %eax
	je	LBB0_14
## %bb.13:
	movl	%eax, %ebx
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_7
LBB0_14:
	movq	%r14, %rdi
	callq	_radeon_wb_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.15:
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %r15
	movq	(%r15), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	jne	LBB0_16
## %bb.17:
	movq	_CAYMAN_RING_TYPE_CP1_INDEX@GOTPCREL(%rip), %r12
	movq	(%r12), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	jne	LBB0_16
## %bb.18:
	movq	_CAYMAN_RING_TYPE_CP2_INDEX@GOTPCREL(%rip), %r13
	movq	(%r13), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	je	LBB0_19
LBB0_16:
	movl	%eax, %ebx
	movl	(%r14), %edi
	leaq	L_.str.3(%rip), %rsi
LBB0_39:
	movl	%ebx, %edx
	callq	_dev_err
	jmp	LBB0_40
LBB0_19:
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	jne	LBB0_20
## %bb.21:
	movq	_CAYMAN_RING_TYPE_DMA1_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	je	LBB0_22
LBB0_20:
	movl	%eax, %ebx
	movl	(%r14), %edi
	leaq	L_.str.4(%rip), %rsi
	jmp	LBB0_39
LBB0_22:
	cmpl	$0, 16(%r14)
	je	LBB0_23
LBB0_24:
	movq	%r14, %rdi
	callq	_si_irq_init
	testl	%eax, %eax
	je	LBB0_26
## %bb.25:
	movl	%eax, %ebx
	leaq	L_.str.5(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	movq	%r14, %rdi
	callq	_radeon_irq_kms_fini
	jmp	LBB0_40
LBB0_23:
	movq	%r14, %rdi
	callq	_radeon_irq_kms_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
	jmp	LBB0_24
LBB0_26:
	movq	%r14, %rdi
	callq	_si_irq_set
	movq	8(%r14), %rax
	movq	(%r15), %rcx
	leaq	(%rax,%rcx,4), %rsi
	movl	(%rax,%rcx,4), %edx
	movq	_RADEON_WB_CP_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_CP_RB0_RPTR@GOTPCREL(%rip), %rax
	movq	(%rax), %r8
	movq	_CP_RB0_WPTR@GOTPCREL(%rip), %rax
	movq	(%rax), %r9
	movq	_RADEON_CP_PACKET2@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	subq	$8, %rsp
	movq	%r14, %rdi
	pushq	%rax
	pushq	$1048575                        ## imm = 0xFFFFF
	pushq	$0
	callq	_radeon_ring_init
	addq	$32, %rsp
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.27:
	movq	8(%r14), %rax
	movq	(%r12), %rcx
	leaq	(%rax,%rcx,4), %rsi
	movl	(%rax,%rcx,4), %edx
	movq	_RADEON_WB_CP1_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_CP_RB1_RPTR@GOTPCREL(%rip), %rax
	movq	(%rax), %r8
	movq	_CP_RB1_WPTR@GOTPCREL(%rip), %rax
	movq	(%rax), %r9
	movl	(%r15), %eax
	subq	$8, %rsp
	movq	%r14, %rdi
	pushq	%rax
	pushq	$1048575                        ## imm = 0xFFFFF
	pushq	$0
	callq	_radeon_ring_init
	addq	$32, %rsp
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.28:
	movq	8(%r14), %rax
	movq	(%r13), %rcx
	leaq	(%rax,%rcx,4), %rsi
	movl	(%rax,%rcx,4), %edx
	movq	_RADEON_WB_CP2_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_CP_RB2_RPTR@GOTPCREL(%rip), %rax
	movq	(%rax), %r8
	movq	_CP_RB2_WPTR@GOTPCREL(%rip), %rax
	movq	(%rax), %r9
	movl	(%r15), %eax
	subq	$8, %rsp
	movq	%r14, %rdi
	pushq	%rax
	pushq	$1048575                        ## imm = 0xFFFFF
	pushq	$0
	callq	_radeon_ring_init
	addq	$32, %rsp
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.29:
	movq	8(%r14), %rax
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rax,%rcx,4), %rdx
	movq	%rdx, -56(%rbp)                 ## 8-byte Spill
	movl	(%rax,%rcx,4), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_R600_WB_DMA_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_DMA_RB_RPTR@GOTPCREL(%rip), %rcx
	movq	_DMA0_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	movq	(%rcx), %r15
	addq	%rbx, %r15
	movq	_DMA_RB_WPTR@GOTPCREL(%rip), %rax
	addq	(%rax), %rbx
	movq	_DMA_PACKET_NOP@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_DMA_PACKET
                                        ## kill: def $eax killed $eax def $rax
	subq	$8, %rsp
	movq	%r14, %rdi
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	movl	%r13d, %ecx
	movq	%r15, %r8
	movq	%rbx, %r9
	pushq	%rax
	pushq	$262140                         ## imm = 0x3FFFC
	pushq	$2
	callq	_radeon_ring_init
	addq	$32, %rsp
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.30:
	movq	8(%r14), %rax
	movq	_CAYMAN_RING_TYPE_DMA1_INDEX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rax,%rcx,4), %rdx
	movq	%rdx, -56(%rbp)                 ## 8-byte Spill
	movl	(%rax,%rcx,4), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_DMA1_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	movq	_DMA_RB_RPTR@GOTPCREL(%rip), %rax
	movq	(%rax), %r15
	addq	%rbx, %r15
	movq	_DMA_RB_WPTR@GOTPCREL(%rip), %rax
	addq	(%rax), %rbx
	movl	(%r12), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_DMA_PACKET
                                        ## kill: def $eax killed $eax def $rax
	subq	$8, %rsp
	movq	%r14, %rdi
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	movl	%r13d, %ecx
	movq	%r15, %r8
	movq	%rbx, %r9
	pushq	%rax
	pushq	$262140                         ## imm = 0x3FFFC
	pushq	$2
	callq	_radeon_ring_init
	addq	$32, %rsp
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.31:
	movq	%r14, %rdi
	callq	_si_cp_load_microcode
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.32:
	movq	%r14, %rdi
	callq	_si_cp_resume
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.33:
	movq	%r14, %rdi
	callq	_cayman_dma_resume
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.34:
	movq	%r14, %rdi
	callq	_radeon_ib_pool_init
	testl	%eax, %eax
	je	LBB0_36
## %bb.35:
	movl	%eax, %ebx
	movl	(%r14), %edi
	leaq	L_.str.6(%rip), %rsi
	jmp	LBB0_39
LBB0_36:
	movq	%r14, %rdi
	callq	_radeon_vm_manager_init
	testl	%eax, %eax
	je	LBB0_37
## %bb.38:
	movl	%eax, %ebx
	movl	(%r14), %edi
	leaq	L_.str.7(%rip), %rsi
	jmp	LBB0_39
LBB0_37:
	xorl	%ebx, %ebx
	jmp	LBB0_40
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to load firmware!\n"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to load MC firmware!\n"

L_.str.2:                               ## @.str.2
	.asciz	"Failed to init rlc BOs!\n"

	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
L_.str.3:                               ## @.str.3
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_CP1_INDEX,8,3 ## @CAYMAN_RING_TYPE_CP1_INDEX
	.comm	_CAYMAN_RING_TYPE_CP2_INDEX,8,3 ## @CAYMAN_RING_TYPE_CP2_INDEX
	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ## @R600_RING_TYPE_DMA_INDEX
L_.str.4:                               ## @.str.4
	.asciz	"failed initializing DMA fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ## @CAYMAN_RING_TYPE_DMA1_INDEX
L_.str.5:                               ## @.str.5
	.asciz	"radeon: IH init failed (%d).\n"

	.comm	_RADEON_WB_CP_RPTR_OFFSET,4,2   ## @RADEON_WB_CP_RPTR_OFFSET
	.comm	_CP_RB0_RPTR,8,3                ## @CP_RB0_RPTR
	.comm	_CP_RB0_WPTR,8,3                ## @CP_RB0_WPTR
	.comm	_RADEON_CP_PACKET2,4,2          ## @RADEON_CP_PACKET2
	.comm	_RADEON_WB_CP1_RPTR_OFFSET,4,2  ## @RADEON_WB_CP1_RPTR_OFFSET
	.comm	_CP_RB1_RPTR,8,3                ## @CP_RB1_RPTR
	.comm	_CP_RB1_WPTR,8,3                ## @CP_RB1_WPTR
	.comm	_RADEON_WB_CP2_RPTR_OFFSET,4,2  ## @RADEON_WB_CP2_RPTR_OFFSET
	.comm	_CP_RB2_RPTR,8,3                ## @CP_RB2_RPTR
	.comm	_CP_RB2_WPTR,8,3                ## @CP_RB2_WPTR
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ## @R600_WB_DMA_RPTR_OFFSET
	.comm	_DMA_RB_RPTR,8,3                ## @DMA_RB_RPTR
	.comm	_DMA0_REGISTER_OFFSET,8,3       ## @DMA0_REGISTER_OFFSET
	.comm	_DMA_RB_WPTR,8,3                ## @DMA_RB_WPTR
	.comm	_DMA_PACKET_NOP,4,2             ## @DMA_PACKET_NOP
	.comm	_CAYMAN_WB_DMA1_RPTR_OFFSET,4,2 ## @CAYMAN_WB_DMA1_RPTR_OFFSET
	.comm	_DMA1_REGISTER_OFFSET,8,3       ## @DMA1_REGISTER_OFFSET
L_.str.6:                               ## @.str.6
	.asciz	"IB initialization failed (%d).\n"

L_.str.7:                               ## @.str.7
	.asciz	"vm manager initialization failed (%d).\n"

	.no_dead_strip	_si_startup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_startup
_si_startup:                            ; @si_startup
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	w8, [x0, #48]
	cbz	w8, LBB0_5
; %bb.1:
	ldr	w8, [x19, #44]
	cbz	w8, LBB0_5
; %bb.2:
	ldr	w8, [x19, #40]
	cbz	w8, LBB0_5
; %bb.3:
	ldr	w8, [x19, #36]
	cbz	w8, LBB0_5
; %bb.4:
	ldr	w8, [x19, #32]
	cbnz	w8, LBB0_7
LBB0_5:
	mov	x0, x19
	bl	_si_init_microcode
	cbz	w0, LBB0_7
; %bb.6:
	mov	x20, x0
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_19
LBB0_7:
	mov	x0, x19
	bl	_si_mc_load_microcode
	cbz	w0, LBB0_9
; %bb.8:
	mov	x20, x0
Lloh2:
	adrp	x0, l_.str.1@PAGE
Lloh3:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_19
LBB0_9:
	mov	x0, x19
	bl	_r600_vram_scratch_init
	mov	x20, x0
	cbnz	w0, LBB0_19
; %bb.10:
	mov	x0, x19
	bl	_si_mc_program
	mov	x0, x19
	bl	_si_pcie_gart_enable
	mov	x20, x0
	cbnz	w0, LBB0_19
; %bb.11:
	mov	x0, x19
	bl	_si_gpu_init
	mov	x0, x19
	bl	_si_rlc_init
	cbz	w0, LBB0_13
; %bb.12:
	mov	x20, x0
Lloh4:
	adrp	x0, l_.str.2@PAGE
Lloh5:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_19
LBB0_13:
	mov	x0, x19
	bl	_radeon_wb_init
	mov	x20, x0
	cbnz	w0, LBB0_19
; %bb.14:
Lloh6:
	adrp	x24, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh7:
	ldr	x24, [x24, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
	ldr	x1, [x24]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbnz	w0, LBB0_17
; %bb.15:
Lloh8:
	adrp	x23, _CAYMAN_RING_TYPE_CP1_INDEX@GOTPAGE
Lloh9:
	ldr	x23, [x23, _CAYMAN_RING_TYPE_CP1_INDEX@GOTPAGEOFF]
	ldr	x1, [x23]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbnz	w0, LBB0_17
; %bb.16:
Lloh10:
	adrp	x22, _CAYMAN_RING_TYPE_CP2_INDEX@GOTPAGE
Lloh11:
	ldr	x22, [x22, _CAYMAN_RING_TYPE_CP2_INDEX@GOTPAGEOFF]
	ldr	x1, [x22]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbz	w0, LBB0_20
LBB0_17:
	mov	x20, x0
	ldr	w0, [x19]
Lloh12:
	adrp	x1, l_.str.3@PAGE
Lloh13:
	add	x1, x1, l_.str.3@PAGEOFF
LBB0_18:
	mov	x2, x20
	bl	_dev_err
LBB0_19:
	mov	x0, x20
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_20:
Lloh14:
	adrp	x21, _R600_RING_TYPE_DMA_INDEX@GOTPAGE
Lloh15:
	ldr	x21, [x21, _R600_RING_TYPE_DMA_INDEX@GOTPAGEOFF]
	ldr	x1, [x21]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbnz	w0, LBB0_22
; %bb.21:
Lloh16:
	adrp	x25, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGE
Lloh17:
	ldr	x25, [x25, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGEOFF]
	ldr	x1, [x25]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbz	w0, LBB0_23
LBB0_22:
	mov	x20, x0
	ldr	w0, [x19]
Lloh18:
	adrp	x1, l_.str.4@PAGE
Lloh19:
	add	x1, x1, l_.str.4@PAGEOFF
	b	LBB0_18
LBB0_23:
	ldr	w8, [x19, #16]
	cbz	w8, LBB0_26
LBB0_24:
	mov	x0, x19
	bl	_si_irq_init
	cbz	w0, LBB0_27
; %bb.25:
	mov	x20, x0
	str	x20, [sp]
Lloh20:
	adrp	x0, l_.str.5@PAGE
Lloh21:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_DRM_ERROR
	mov	x0, x19
	bl	_radeon_irq_kms_fini
	b	LBB0_19
LBB0_26:
	mov	x0, x19
	bl	_radeon_irq_kms_init
	mov	x20, x0
	cbnz	w0, LBB0_19
	b	LBB0_24
LBB0_27:
	mov	x0, x19
	bl	_si_irq_set
	ldr	x8, [x19, #8]
	ldr	x9, [x24]
	add	x1, x8, x9, lsl #2
	ldr	w2, [x1]
Lloh22:
	adrp	x8, _RADEON_WB_CP_RPTR_OFFSET@GOTPAGE
Lloh23:
	ldr	x8, [x8, _RADEON_WB_CP_RPTR_OFFSET@GOTPAGEOFF]
Lloh24:
	ldr	w3, [x8]
Lloh25:
	adrp	x8, _CP_RB0_RPTR@GOTPAGE
Lloh26:
	ldr	x8, [x8, _CP_RB0_RPTR@GOTPAGEOFF]
Lloh27:
	ldr	x4, [x8]
Lloh28:
	adrp	x8, _CP_RB0_WPTR@GOTPAGE
Lloh29:
	ldr	x8, [x8, _CP_RB0_WPTR@GOTPAGEOFF]
Lloh30:
	ldr	x5, [x8]
Lloh31:
	adrp	x24, _RADEON_CP_PACKET2@GOTPAGE
Lloh32:
	ldr	x24, [x24, _RADEON_CP_PACKET2@GOTPAGEOFF]
	ldr	w8, [x24]
	str	w8, [sp]
	mov	x0, x19
	mov	w6, #0
	mov	w7, #1048575
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_19
; %bb.28:
	ldr	x8, [x19, #8]
	ldr	x9, [x23]
	add	x1, x8, x9, lsl #2
	ldr	w2, [x1]
Lloh33:
	adrp	x8, _RADEON_WB_CP1_RPTR_OFFSET@GOTPAGE
Lloh34:
	ldr	x8, [x8, _RADEON_WB_CP1_RPTR_OFFSET@GOTPAGEOFF]
Lloh35:
	adrp	x9, _CP_RB1_RPTR@GOTPAGE
Lloh36:
	ldr	x9, [x9, _CP_RB1_RPTR@GOTPAGEOFF]
Lloh37:
	ldr	w3, [x8]
Lloh38:
	ldr	x4, [x9]
Lloh39:
	adrp	x8, _CP_RB1_WPTR@GOTPAGE
Lloh40:
	ldr	x8, [x8, _CP_RB1_WPTR@GOTPAGEOFF]
Lloh41:
	ldr	x5, [x8]
	ldr	w8, [x24]
	str	w8, [sp]
	mov	x0, x19
	mov	w6, #0
	mov	w7, #1048575
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_19
; %bb.29:
	ldr	x8, [x19, #8]
	ldr	x9, [x22]
	add	x1, x8, x9, lsl #2
	ldr	w2, [x1]
Lloh42:
	adrp	x8, _RADEON_WB_CP2_RPTR_OFFSET@GOTPAGE
Lloh43:
	ldr	x8, [x8, _RADEON_WB_CP2_RPTR_OFFSET@GOTPAGEOFF]
Lloh44:
	adrp	x9, _CP_RB2_RPTR@GOTPAGE
Lloh45:
	ldr	x9, [x9, _CP_RB2_RPTR@GOTPAGEOFF]
Lloh46:
	ldr	w3, [x8]
Lloh47:
	ldr	x4, [x9]
Lloh48:
	adrp	x8, _CP_RB2_WPTR@GOTPAGE
Lloh49:
	ldr	x8, [x8, _CP_RB2_WPTR@GOTPAGEOFF]
Lloh50:
	ldr	x5, [x8]
	ldr	w8, [x24]
	str	w8, [sp]
	mov	x0, x19
	mov	w6, #0
	mov	w7, #1048575
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_19
; %bb.30:
	ldr	x8, [x19, #8]
	ldr	x9, [x21]
	add	x20, x8, x9, lsl #2
	ldr	w21, [x20]
Lloh51:
	adrp	x8, _R600_WB_DMA_RPTR_OFFSET@GOTPAGE
Lloh52:
	ldr	x8, [x8, _R600_WB_DMA_RPTR_OFFSET@GOTPAGEOFF]
Lloh53:
	ldr	w22, [x8]
Lloh54:
	adrp	x26, _DMA_RB_RPTR@GOTPAGE
Lloh55:
	ldr	x26, [x26, _DMA_RB_RPTR@GOTPAGEOFF]
	ldr	x8, [x26]
Lloh56:
	adrp	x9, _DMA0_REGISTER_OFFSET@GOTPAGE
Lloh57:
	ldr	x9, [x9, _DMA0_REGISTER_OFFSET@GOTPAGEOFF]
Lloh58:
	ldr	x9, [x9]
Lloh59:
	adrp	x27, _DMA_RB_WPTR@GOTPAGE
Lloh60:
	ldr	x27, [x27, _DMA_RB_WPTR@GOTPAGEOFF]
	add	x23, x9, x8
	ldr	x8, [x27]
	add	x24, x8, x9
Lloh61:
	adrp	x28, _DMA_PACKET_NOP@GOTPAGE
Lloh62:
	ldr	x28, [x28, _DMA_PACKET_NOP@GOTPAGEOFF]
	ldr	w0, [x28]
	mov	w1, #0
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	bl	_DMA_PACKET
	str	w0, [sp]
	mov	x0, x19
	mov	x1, x20
	mov	x2, x21
	mov	x3, x22
	mov	x4, x23
	mov	x5, x24
	mov	w6, #2
	mov	w7, #262140
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_19
; %bb.31:
	ldr	x8, [x19, #8]
	ldr	x9, [x25]
	add	x20, x8, x9, lsl #2
	ldr	w21, [x20]
Lloh63:
	adrp	x8, _CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPAGE
Lloh64:
	ldr	x8, [x8, _CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPAGEOFF]
Lloh65:
	ldr	w22, [x8]
Lloh66:
	adrp	x8, _DMA1_REGISTER_OFFSET@GOTPAGE
Lloh67:
	ldr	x8, [x8, _DMA1_REGISTER_OFFSET@GOTPAGEOFF]
	ldr	x9, [x26]
Lloh68:
	ldr	x8, [x8]
	add	x23, x8, x9
	ldr	x9, [x27]
	add	x24, x9, x8
	ldr	w0, [x28]
	mov	w1, #0
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	bl	_DMA_PACKET
	str	w0, [sp]
	mov	x0, x19
	mov	x1, x20
	mov	x2, x21
	mov	x3, x22
	mov	x4, x23
	mov	x5, x24
	mov	w6, #2
	mov	w7, #262140
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_19
; %bb.32:
	mov	x0, x19
	bl	_si_cp_load_microcode
	mov	x20, x0
	cbnz	w0, LBB0_19
; %bb.33:
	mov	x0, x19
	bl	_si_cp_resume
	mov	x20, x0
	cbnz	w0, LBB0_19
; %bb.34:
	mov	x0, x19
	bl	_cayman_dma_resume
	mov	x20, x0
	cbnz	w0, LBB0_19
; %bb.35:
	mov	x0, x19
	bl	_radeon_ib_pool_init
	cbz	w0, LBB0_37
; %bb.36:
	mov	x20, x0
	ldr	w0, [x19]
Lloh69:
	adrp	x1, l_.str.6@PAGE
Lloh70:
	add	x1, x1, l_.str.6@PAGEOFF
	b	LBB0_18
LBB0_37:
	mov	x0, x19
	bl	_radeon_vm_manager_init
	mov	x20, x0
	cbz	w0, LBB0_19
; %bb.38:
	ldr	w0, [x19]
Lloh71:
	adrp	x1, l_.str.7@PAGE
Lloh72:
	add	x1, x1, l_.str.7@PAGEOFF
	b	LBB0_18
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh37
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh46
	.loh AdrpLdrGot	Lloh61, Lloh62
	.loh AdrpLdrGot	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpAdd	Lloh69, Lloh70
	.loh AdrpAdd	Lloh71, Lloh72
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to load firmware!\n"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to load MC firmware!\n"

l_.str.2:                               ; @.str.2
	.asciz	"Failed to init rlc BOs!\n"

	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
l_.str.3:                               ; @.str.3
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_CP1_INDEX,8,3 ; @CAYMAN_RING_TYPE_CP1_INDEX
	.comm	_CAYMAN_RING_TYPE_CP2_INDEX,8,3 ; @CAYMAN_RING_TYPE_CP2_INDEX
	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ; @R600_RING_TYPE_DMA_INDEX
l_.str.4:                               ; @.str.4
	.asciz	"failed initializing DMA fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ; @CAYMAN_RING_TYPE_DMA1_INDEX
l_.str.5:                               ; @.str.5
	.asciz	"radeon: IH init failed (%d).\n"

	.comm	_RADEON_WB_CP_RPTR_OFFSET,4,2   ; @RADEON_WB_CP_RPTR_OFFSET
	.comm	_CP_RB0_RPTR,8,3                ; @CP_RB0_RPTR
	.comm	_CP_RB0_WPTR,8,3                ; @CP_RB0_WPTR
	.comm	_RADEON_CP_PACKET2,4,2          ; @RADEON_CP_PACKET2
	.comm	_RADEON_WB_CP1_RPTR_OFFSET,4,2  ; @RADEON_WB_CP1_RPTR_OFFSET
	.comm	_CP_RB1_RPTR,8,3                ; @CP_RB1_RPTR
	.comm	_CP_RB1_WPTR,8,3                ; @CP_RB1_WPTR
	.comm	_RADEON_WB_CP2_RPTR_OFFSET,4,2  ; @RADEON_WB_CP2_RPTR_OFFSET
	.comm	_CP_RB2_RPTR,8,3                ; @CP_RB2_RPTR
	.comm	_CP_RB2_WPTR,8,3                ; @CP_RB2_WPTR
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ; @R600_WB_DMA_RPTR_OFFSET
	.comm	_DMA_RB_RPTR,8,3                ; @DMA_RB_RPTR
	.comm	_DMA0_REGISTER_OFFSET,8,3       ; @DMA0_REGISTER_OFFSET
	.comm	_DMA_RB_WPTR,8,3                ; @DMA_RB_WPTR
	.comm	_DMA_PACKET_NOP,4,2             ; @DMA_PACKET_NOP
	.comm	_CAYMAN_WB_DMA1_RPTR_OFFSET,4,2 ; @CAYMAN_WB_DMA1_RPTR_OFFSET
	.comm	_DMA1_REGISTER_OFFSET,8,3       ; @DMA1_REGISTER_OFFSET
l_.str.6:                               ; @.str.6
	.asciz	"IB initialization failed (%d).\n"

l_.str.7:                               ; @.str.7
	.asciz	"vm manager initialization failed (%d).\n"

	.no_dead_strip	_si_startup
.subsections_via_symbols
