	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si_vm_set_page                 ## -- Begin function si_vm_set_page
	.p2align	4, 0x90
_si_vm_set_page:                        ## @si_vm_set_page
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, -48(%rbp)                 ## 4-byte Spill
	movl	%r8d, %r14d
	movl	%ecx, %r15d
	movl	%edx, %r13d
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	16(%rbp), %esi
	callq	_cayman_vm_page_flags
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movq	(%rbx), %rax
	movq	(%rax), %rax
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_8
## %bb.1:
	movq	_RADEON_VM_PAGE_SYSTEM@GOTPCREL(%rip), %rax
	movl	16(%rbp), %ecx
	testl	%ecx, (%rax)
	je	LBB0_14
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_18 Depth 2
	movq	%r14, %rax
	testl	%eax, %eax
	je	LBB0_3
## %bb.16:                              ##   in Loop: Header=BB0_2 Depth=1
	movq	%rax, %r14
	leal	(%rax,%rax), %ebx
	cmpl	$1048574, %ebx                  ## imm = 0xFFFFE
	movl	$1048574, %eax                  ## imm = 0xFFFFE
	cmovael	%eax, %ebx
	movq	_DMA_PACKET_WRITE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	movl	%ebx, %r8d
	callq	_DMA_PACKET
	movq	(%r12), %rcx
	movslq	8(%r12), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r12)
	movl	%eax, (%rcx,%rdx,4)
	movslq	8(%r12), %rax
	leal	1(%rax), %edx
	movl	%edx, 8(%r12)
	movl	%r13d, (%rcx,%rax,4)
	movl	%r13d, %edi
	callq	_upper_32_bits
	movzbl	%al, %eax
	movq	(%r12), %rcx
	movslq	8(%r12), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r12)
	movl	%eax, (%rcx,%rdx,4)
	testl	%ebx, %ebx
	je	LBB0_2
## %bb.17:                              ##   in Loop: Header=BB0_2 Depth=1
	movl	16(%rbp), %eax
	jmp	LBB0_18
	.p2align	4, 0x90
LBB0_20:                                ##   in Loop: Header=BB0_18 Depth=2
	movq	_RADEON_VM_PAGE_VALID@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edi
	andl	%eax, %edi
	cmovnel	%r15d, %edi
LBB0_21:                                ##   in Loop: Header=BB0_18 Depth=2
	addl	-48(%rbp), %r15d                ## 4-byte Folded Reload
	orl	-44(%rbp), %edi                 ## 4-byte Folded Reload
	movslq	8(%r12), %rax
	leal	1(%rax), %edx
	movl	%edx, 8(%r12)
	movl	%edi, (%rcx,%rax,4)
	callq	_upper_32_bits
	movq	(%r12), %rcx
	movslq	8(%r12), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r12)
	movl	%eax, (%rcx,%rdx,4)
	decl	%r14d
	addl	$8, %r13d
	addl	$-2, %ebx
	movl	16(%rbp), %eax
	je	LBB0_2
LBB0_18:                                ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	_RADEON_VM_PAGE_SYSTEM@GOTPCREL(%rip), %rdx
	testl	%eax, (%rdx)
	je	LBB0_20
## %bb.19:                              ##   in Loop: Header=BB0_18 Depth=2
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movl	%r15d, %esi
	callq	_radeon_vm_map_gart
	movl	%eax, %edi
	andl	$-4096, %edi                    ## imm = 0xF000
	movq	(%r12), %rcx
	jmp	LBB0_21
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_8 Depth=1
	movq	%rbx, %r14
LBB0_8:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_10 Depth 2
	testl	%r14d, %r14d
	je	LBB0_6
## %bb.9:                               ##   in Loop: Header=BB0_8 Depth=1
	movq	%r14, %rbx
	addl	%r14d, %r14d
	addl	$2, %r14d
	cmpl	$16382, %r14d                   ## imm = 0x3FFE
	movl	$16382, %eax                    ## imm = 0x3FFE
	cmovael	%eax, %r14d
	movq	_PACKET3_WRITE_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	callq	_PACKET3
	movq	(%r12), %rcx
	movslq	8(%r12), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r12)
	movl	%eax, (%rcx,%rdx,4)
	xorl	%edi, %edi
	callq	_WRITE_DATA_ENGINE_SEL
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movl	$1, %edi
	callq	_WRITE_DATA_DST_SEL
	orl	-60(%rbp), %eax                 ## 4-byte Folded Reload
	movq	(%r12), %rcx
	movslq	8(%r12), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r12)
	movl	%eax, (%rcx,%rdx,4)
	movslq	8(%r12), %rax
	leal	1(%rax), %edx
	movl	%edx, 8(%r12)
	movl	%r13d, (%rcx,%rax,4)
	movl	%r13d, %edi
	callq	_upper_32_bits
	movq	(%r12), %rcx
	movslq	8(%r12), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r12)
	movl	%eax, (%rcx,%rdx,4)
	cmpl	$3, %r14d
	jae	LBB0_10
	jmp	LBB0_7
	.p2align	4, 0x90
LBB0_11:                                ##   in Loop: Header=BB0_10 Depth=2
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movl	%r15d, %esi
	callq	_radeon_vm_map_gart
	movl	%eax, %edi
	andl	$-4096, %edi                    ## imm = 0xF000
	movq	(%r12), %rcx
LBB0_13:                                ##   in Loop: Header=BB0_10 Depth=2
	addl	-48(%rbp), %r15d                ## 4-byte Folded Reload
	orl	-44(%rbp), %edi                 ## 4-byte Folded Reload
	movslq	8(%r12), %rax
	leal	1(%rax), %edx
	movl	%edx, 8(%r12)
	movl	%edi, (%rcx,%rax,4)
	callq	_upper_32_bits
	movq	(%r12), %rcx
	movslq	8(%r12), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r12)
	movl	%eax, (%rcx,%rdx,4)
	addl	$-2, %r14d
	decl	%ebx
	addl	$8, %r13d
	cmpl	$2, %r14d
	jbe	LBB0_7
LBB0_10:                                ##   Parent Loop BB0_8 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movl	16(%rbp), %eax
	movq	_RADEON_VM_PAGE_SYSTEM@GOTPCREL(%rip), %rdx
	testl	%eax, (%rdx)
	jne	LBB0_11
## %bb.12:                              ##   in Loop: Header=BB0_10 Depth=2
	movq	_RADEON_VM_PAGE_VALID@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edi
	andl	%eax, %edi
	cmovnel	%r15d, %edi
	jmp	LBB0_13
LBB0_14:
	testl	%r14d, %r14d
	je	LBB0_3
	.p2align	4, 0x90
LBB0_15:                                ## =>This Inner Loop Header: Depth=1
	leal	(%r14,%r14), %edx
	cmpl	$1048574, %edx                  ## imm = 0xFFFFE
	movl	$1048574, %eax                  ## imm = 0xFFFFE
	cmovael	%eax, %edx
	movq	%rdx, %rdi
	movq	%rdx, -56(%rbp)                 ## 8-byte Spill
	movq	_RADEON_VM_PAGE_VALID@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	andl	%ecx, %ebx
	cmovnel	%r15d, %ebx
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_DMA_PTE_PDE_PACKET
	movq	(%r12), %rcx
	movslq	8(%r12), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r12)
	movl	%eax, (%rcx,%rdx,4)
	movslq	8(%r12), %rax
	leal	1(%rax), %edx
	movl	%edx, 8(%r12)
	movl	%r13d, (%rcx,%rax,4)
	movl	%r13d, %edi
	callq	_upper_32_bits
	movzbl	%al, %eax
	movq	(%r12), %rcx
	movslq	8(%r12), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r12)
	movl	%eax, (%rcx,%rdx,4)
	movslq	8(%r12), %rax
	leal	1(%rax), %edx
	movl	%edx, 8(%r12)
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	movl	%edx, (%rcx,%rax,4)
	movslq	8(%r12), %rax
	leal	1(%rax), %edx
	movl	%edx, 8(%r12)
	movl	$0, (%rcx,%rax,4)
	movslq	8(%r12), %rax
	leal	1(%rax), %edx
	movl	%edx, 8(%r12)
	movl	%ebx, (%rcx,%rax,4)
	movl	%ebx, %edi
	callq	_upper_32_bits
	movq	(%r12), %rcx
	movslq	8(%r12), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r12)
	movl	%eax, (%rcx,%rdx,4)
	movslq	8(%r12), %rax
	leal	1(%rax), %edx
	movl	%edx, 8(%r12)
	movl	-48(%rbp), %esi                 ## 4-byte Reload
	movl	%esi, (%rcx,%rax,4)
	movslq	8(%r12), %rax
	leal	1(%rax), %edx
	movl	%edx, 8(%r12)
	movl	$0, (%rcx,%rax,4)
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	leal	(%r13,%rcx,4), %r13d
	shrl	%ecx
	movl	%ecx, %eax
	movq	%rcx, %rdx
	imull	%esi, %eax
	movl	16(%rbp), %ecx
	addl	%eax, %r15d
	subl	%edx, %r14d
	jne	LBB0_15
LBB0_3:
	testb	$7, 8(%r12)
	je	LBB0_6
## %bb.4:
	movq	_DMA_PACKET_NOP@GOTPCREL(%rip), %rbx
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%rbx), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_DMA_PACKET
	movq	(%r12), %rcx
	movslq	8(%r12), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r12)
	movl	%eax, (%rcx,%rdx,4)
	testb	$7, 8(%r12)
	jne	LBB0_5
LBB0_6:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
	.comm	_PACKET3_WRITE_DATA,4,2         ## @PACKET3_WRITE_DATA
	.comm	_RADEON_VM_PAGE_SYSTEM,4,2      ## @RADEON_VM_PAGE_SYSTEM
	.comm	_RADEON_VM_PAGE_VALID,4,2       ## @RADEON_VM_PAGE_VALID
	.comm	_DMA_PACKET_WRITE,4,2           ## @DMA_PACKET_WRITE
	.comm	_DMA_PACKET_NOP,4,2             ## @DMA_PACKET_NOP
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si_vm_set_page                 ; -- Begin function si_vm_set_page
	.p2align	2
_si_vm_set_page:                        ; @si_vm_set_page
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x6
	mov	x21, x5
	mov	x22, x4
	mov	x23, x3
	mov	x24, x2
	mov	x19, x1
	mov	x26, x0
	mov	x1, x6
	bl	_cayman_vm_page_flags
	mov	x25, x0
	ldr	x8, [x26]
	ldr	x8, [x8]
Lloh0:
	adrp	x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_8
LBB0_1:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	cbz	w22, LBB0_22
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	lsl	w8, w22, #1
	add	w8, w8, #2
	mov	w9, #16382
	cmp	w8, w9
	csel	w27, w8, w9, lo
Lloh3:
	adrp	x8, _PACKET3_WRITE_DATA@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PACKET3_WRITE_DATA@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	x1, x27
	bl	_PACKET3
	ldr	x8, [x19]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w0, [x8, x9, lsl #2]
	mov	w0, #0
	bl	_WRITE_DATA_ENGINE_SEL
	mov	x28, x0
	mov	w0, #1
	bl	_WRITE_DATA_DST_SEL
	orr	w8, w0, w28
	ldr	x9, [x19]
	ldrsw	x10, [x19, #8]
	add	w11, w10, #1
	str	w11, [x19, #8]
	str	w8, [x9, x10, lsl #2]
	ldrsw	x8, [x19, #8]
	add	w10, w8, #1
	str	w10, [x19, #8]
	str	w24, [x9, x8, lsl #2]
	mov	x0, x24
	bl	_upper_32_bits
	ldr	x8, [x19]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w0, [x8, x9, lsl #2]
	cmp	w27, #3
	b.lo	LBB0_1
; %bb.3:                                ;   in Loop: Header=BB0_1 Depth=1
Lloh6:
	adrp	x28, _RADEON_VM_PAGE_SYSTEM@GOTPAGE
Lloh7:
	ldr	x28, [x28, _RADEON_VM_PAGE_SYSTEM@GOTPAGEOFF]
	b	LBB0_6
LBB0_4:                                 ;   in Loop: Header=BB0_6 Depth=2
Lloh8:
	adrp	x9, _RADEON_VM_PAGE_VALID@GOTPAGE
Lloh9:
	ldr	x9, [x9, _RADEON_VM_PAGE_VALID@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	tst	w9, w20
	csel	w9, wzr, w23, eq
LBB0_5:                                 ;   in Loop: Header=BB0_6 Depth=2
	add	w23, w23, w21
	orr	w0, w9, w25
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w0, [x8, x9, lsl #2]
	bl	_upper_32_bits
	ldr	x8, [x19]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w0, [x8, x9, lsl #2]
	sub	w27, w27, #2
	sub	w22, w22, #1
	add	w24, w24, #8
	cmp	w27, #2
	b.ls	LBB0_1
LBB0_6:                                 ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	w9, [x28]
	tst	w9, w20
	b.eq	LBB0_4
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=2
	mov	x0, x26
	mov	x1, x23
	bl	_radeon_vm_map_gart
	and	w9, w0, #0xfffff000
	ldr	x8, [x19]
	b	LBB0_5
LBB0_8:
Lloh11:
	adrp	x28, _RADEON_VM_PAGE_SYSTEM@GOTPAGE
Lloh12:
	ldr	x28, [x28, _RADEON_VM_PAGE_SYSTEM@GOTPAGEOFF]
	ldr	w8, [x28]
	tst	w8, w20
	b.eq	LBB0_16
; %bb.9:
	cbnz	w22, LBB0_11
	b	LBB0_19
LBB0_10:                                ;   in Loop: Header=BB0_11 Depth=1
	cbz	w22, LBB0_19
LBB0_11:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_14 Depth 2
	lsl	w8, w22, #1
	mov	w9, #1048574
	cmp	w8, w9
	csel	w27, w8, w9, lo
Lloh13:
	adrp	x8, _DMA_PACKET_WRITE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _DMA_PACKET_WRITE@GOTPAGEOFF]
Lloh15:
	ldr	w0, [x8]
	mov	w1, #0
	mov	w2, #0
	mov	w3, #0
	mov	x4, x27
	bl	_DMA_PACKET
	ldr	x8, [x19]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w0, [x8, x9, lsl #2]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w24, [x8, x9, lsl #2]
	mov	x0, x24
	bl	_upper_32_bits
	and	w9, w0, #0xff
	ldr	x8, [x19]
	ldrsw	x10, [x19, #8]
	add	w11, w10, #1
	str	w11, [x19, #8]
	str	w9, [x8, x10, lsl #2]
	cbnz	w27, LBB0_14
	b	LBB0_10
LBB0_12:                                ;   in Loop: Header=BB0_14 Depth=2
Lloh16:
	adrp	x9, _RADEON_VM_PAGE_VALID@GOTPAGE
Lloh17:
	ldr	x9, [x9, _RADEON_VM_PAGE_VALID@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	tst	w9, w20
	csel	w9, wzr, w23, eq
LBB0_13:                                ;   in Loop: Header=BB0_14 Depth=2
	add	w23, w23, w21
	orr	w0, w9, w25
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w0, [x8, x9, lsl #2]
	bl	_upper_32_bits
	ldr	x8, [x19]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w0, [x8, x9, lsl #2]
	sub	w22, w22, #1
	add	w24, w24, #8
	sub	w27, w27, #2
	cbz	w27, LBB0_10
LBB0_14:                                ;   Parent Loop BB0_11 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	w9, [x28]
	tst	w9, w20
	b.eq	LBB0_12
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=2
	mov	x0, x26
	mov	x1, x23
	bl	_radeon_vm_map_gart
	and	w9, w0, #0xfffff000
	ldr	x8, [x19]
	b	LBB0_13
LBB0_16:
	cbz	w22, LBB0_19
; %bb.17:
	mov	w28, #1048574
LBB0_18:                                ; =>This Inner Loop Header: Depth=1
	lsl	w8, w22, #1
	cmp	w8, w28
	csel	w26, w8, w28, lo
Lloh19:
	adrp	x8, _RADEON_VM_PAGE_VALID@GOTPAGE
Lloh20:
	ldr	x8, [x8, _RADEON_VM_PAGE_VALID@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	tst	w8, w20
	csel	w27, wzr, w23, eq
	mov	x0, x26
	bl	_DMA_PTE_PDE_PACKET
	ldr	x8, [x19]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w0, [x8, x9, lsl #2]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w24, [x8, x9, lsl #2]
	mov	x0, x24
	bl	_upper_32_bits
	and	w8, w0, #0xff
	ldr	x9, [x19]
	ldrsw	x10, [x19, #8]
	add	w11, w10, #1
	str	w11, [x19, #8]
	str	w8, [x9, x10, lsl #2]
	ldrsw	x8, [x19, #8]
	add	w10, w8, #1
	str	w10, [x19, #8]
	str	w25, [x9, x8, lsl #2]
	ldrsw	x8, [x19, #8]
	add	w10, w8, #1
	str	w10, [x19, #8]
	str	wzr, [x9, x8, lsl #2]
	ldrsw	x8, [x19, #8]
	add	w10, w8, #1
	str	w10, [x19, #8]
	str	w27, [x9, x8, lsl #2]
	mov	x0, x27
	bl	_upper_32_bits
	ldr	x8, [x19]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w0, [x8, x9, lsl #2]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w21, [x8, x9, lsl #2]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	wzr, [x8, x9, lsl #2]
	add	w24, w24, w26, lsl #2
	lsr	w8, w26, #1
	madd	w23, w8, w21, w23
	subs	w22, w22, w8
	b.ne	LBB0_18
LBB0_19:
	ldrb	w8, [x19, #8]
	tst	w8, #0x7
	b.eq	LBB0_22
; %bb.20:
Lloh22:
	adrp	x20, _DMA_PACKET_NOP@GOTPAGE
Lloh23:
	ldr	x20, [x20, _DMA_PACKET_NOP@GOTPAGEOFF]
LBB0_21:                                ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x20]
	mov	w1, #0
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	bl	_DMA_PACKET
	ldr	x8, [x19]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	w0, [x8, x9, lsl #2]
	ldrb	w8, [x19, #8]
	tst	w8, #0x7
	b.ne	LBB0_21
LBB0_22:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
	.comm	_PACKET3_WRITE_DATA,4,2         ; @PACKET3_WRITE_DATA
	.comm	_RADEON_VM_PAGE_SYSTEM,4,2      ; @RADEON_VM_PAGE_SYSTEM
	.comm	_RADEON_VM_PAGE_VALID,4,2       ; @RADEON_VM_PAGE_VALID
	.comm	_DMA_PACKET_WRITE,4,2           ; @DMA_PACKET_WRITE
	.comm	_DMA_PACKET_NOP,4,2             ; @DMA_PACKET_NOP
.subsections_via_symbols
