	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_vf_igu_reset
_bnx2x_vf_igu_reset:                    ## @bnx2x_vf_igu_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r14
	movl	4(%rsi), %esi
	callq	_HW_VF_HANDLE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_bnx2x_pretend_func
	movq	_IGU_REG_SB_INT_BEFORE_MASK_LSB@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_SB_INT_BEFORE_MASK_MSB@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_SB_MASK_LSB@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_SB_MASK_MSB@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_PBA_STATUS_LSB@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_PBA_STATUS_MSB@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_IGU_REG_VF_CONFIGURATION@GOTPCREL(%rip), %r13
	movq	(%r13), %rsi
	movq	%r14, %rdi
	callq	_REG_RD
	movq	_IGU_VF_CONF_FUNC_EN@GOTPCREL(%rip), %rdx
	movq	_IGU_VF_CONF_MSI_MSIX_EN@GOTPCREL(%rip), %rcx
	movq	_VF_CFG_INT_SIMD@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	andl	(%r15), %esi
	je	LBB0_2
## %bb.1:
	movq	_IGU_VF_CONF_SINGLE_ISR_EN@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
LBB0_2:
	orl	(%rdx), %eax
	orl	(%rcx), %eax
	orl	%esi, %eax
	movq	_IGU_VF_CONF_PARENT_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movq	%r14, %rdi
	callq	_BP_FUNC
	movq	_IGU_VF_CONF_PARENT_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %ebx
	movq	(%r13), %rsi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_REG_WR
	movq	_BNX2X_MSG_IOV@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	4(%r15), %r12d
	movq	(%r13), %rsi
	movq	%r14, %rdi
	callq	_REG_RD
	leaq	L_.str(%rip), %rsi
	movl	%ebx, %edi
	movl	%r12d, %edx
	movl	%eax, %ecx
	callq	_DP
	movq	%r14, %rdi
	callq	_BP_ABS_FUNC
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_bnx2x_pretend_func
	movq	%r15, %rdi
	callq	_vf_sb_count
	testl	%eax, %eax
	jle	LBB0_5
## %bb.3:
	xorl	%ebx, %ebx
	movq	_IGU_INT_DISABLE@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_vf_igu_sb
	movl	%eax, %r12d
	leal	(,%r12,4), %eax
	movslq	%eax, %rsi
	movq	_IGU_REG_PROD_CONS_MEMORY@GOTPCREL(%rip), %rax
	addq	(%rax), %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movl	4(%r15), %esi
	movq	%r14, %rdi
	movl	%r12d, %edx
	xorl	%ecx, %ecx
	callq	_bnx2x_igu_clear_sb_gen
	movq	_USTORM_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	(%r13), %r9d
	movl	$1, (%rsp)
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	%r12d, %edx
	xorl	%r8d, %r8d
	callq	_bnx2x_vf_igu_ack_sb
	incl	%ebx
	movq	%r15, %rdi
	callq	_vf_sb_count
	cmpl	%eax, %ebx
	jl	LBB0_4
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_IGU_REG_SB_INT_BEFORE_MASK_LSB,8,3 ## @IGU_REG_SB_INT_BEFORE_MASK_LSB
	.comm	_IGU_REG_SB_INT_BEFORE_MASK_MSB,8,3 ## @IGU_REG_SB_INT_BEFORE_MASK_MSB
	.comm	_IGU_REG_SB_MASK_LSB,8,3        ## @IGU_REG_SB_MASK_LSB
	.comm	_IGU_REG_SB_MASK_MSB,8,3        ## @IGU_REG_SB_MASK_MSB
	.comm	_IGU_REG_PBA_STATUS_LSB,8,3     ## @IGU_REG_PBA_STATUS_LSB
	.comm	_IGU_REG_PBA_STATUS_MSB,8,3     ## @IGU_REG_PBA_STATUS_MSB
	.comm	_IGU_REG_VF_CONFIGURATION,8,3   ## @IGU_REG_VF_CONFIGURATION
	.comm	_IGU_VF_CONF_FUNC_EN,4,2        ## @IGU_VF_CONF_FUNC_EN
	.comm	_IGU_VF_CONF_MSI_MSIX_EN,4,2    ## @IGU_VF_CONF_MSI_MSIX_EN
	.comm	_VF_CFG_INT_SIMD,4,2            ## @VF_CFG_INT_SIMD
	.comm	_IGU_VF_CONF_SINGLE_ISR_EN,4,2  ## @IGU_VF_CONF_SINGLE_ISR_EN
	.comm	_IGU_VF_CONF_PARENT_MASK,4,2    ## @IGU_VF_CONF_PARENT_MASK
	.comm	_IGU_VF_CONF_PARENT_SHIFT,4,2   ## @IGU_VF_CONF_PARENT_SHIFT
	.comm	_BNX2X_MSG_IOV,4,2              ## @BNX2X_MSG_IOV
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"value in IGU_REG_VF_CONFIGURATION of vf %d after write %x\n"

	.comm	_IGU_REG_PROD_CONS_MEMORY,8,3   ## @IGU_REG_PROD_CONS_MEMORY
	.comm	_USTORM_ID,4,2                  ## @USTORM_ID
	.comm	_IGU_INT_DISABLE,4,2            ## @IGU_INT_DISABLE
	.no_dead_strip	_bnx2x_vf_igu_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_vf_igu_reset
_bnx2x_vf_igu_reset:                    ; @bnx2x_vf_igu_reset
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	mov	x20, x0
	ldr	w1, [x1, #4]
	bl	_HW_VF_HANDLE
	mov	x1, x0
	mov	x0, x20
	bl	_bnx2x_pretend_func
Lloh0:
	adrp	x8, _IGU_REG_SB_INT_BEFORE_MASK_LSB@GOTPAGE
Lloh1:
	ldr	x8, [x8, _IGU_REG_SB_INT_BEFORE_MASK_LSB@GOTPAGEOFF]
Lloh2:
	ldr	x1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_REG_WR
Lloh3:
	adrp	x8, _IGU_REG_SB_INT_BEFORE_MASK_MSB@GOTPAGE
Lloh4:
	ldr	x8, [x8, _IGU_REG_SB_INT_BEFORE_MASK_MSB@GOTPAGEOFF]
Lloh5:
	ldr	x1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_REG_WR
Lloh6:
	adrp	x8, _IGU_REG_SB_MASK_LSB@GOTPAGE
Lloh7:
	ldr	x8, [x8, _IGU_REG_SB_MASK_LSB@GOTPAGEOFF]
Lloh8:
	ldr	x1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_REG_WR
Lloh9:
	adrp	x8, _IGU_REG_SB_MASK_MSB@GOTPAGE
Lloh10:
	ldr	x8, [x8, _IGU_REG_SB_MASK_MSB@GOTPAGEOFF]
Lloh11:
	ldr	x1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_REG_WR
Lloh12:
	adrp	x8, _IGU_REG_PBA_STATUS_LSB@GOTPAGE
Lloh13:
	ldr	x8, [x8, _IGU_REG_PBA_STATUS_LSB@GOTPAGEOFF]
Lloh14:
	ldr	x1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_REG_WR
Lloh15:
	adrp	x8, _IGU_REG_PBA_STATUS_MSB@GOTPAGE
Lloh16:
	ldr	x8, [x8, _IGU_REG_PBA_STATUS_MSB@GOTPAGEOFF]
Lloh17:
	ldr	x1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_REG_WR
Lloh18:
	adrp	x23, _IGU_REG_VF_CONFIGURATION@GOTPAGE
Lloh19:
	ldr	x23, [x23, _IGU_REG_VF_CONFIGURATION@GOTPAGEOFF]
	ldr	x1, [x23]
	mov	x0, x20
	bl	_REG_RD
Lloh20:
	adrp	x8, _IGU_VF_CONF_FUNC_EN@GOTPAGE
Lloh21:
	ldr	x8, [x8, _IGU_VF_CONF_FUNC_EN@GOTPAGEOFF]
Lloh22:
	adrp	x9, _IGU_VF_CONF_MSI_MSIX_EN@GOTPAGE
Lloh23:
	ldr	x9, [x9, _IGU_VF_CONF_MSI_MSIX_EN@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
Lloh25:
	ldr	w9, [x9]
	ldr	w10, [x19]
Lloh26:
	adrp	x11, _VF_CFG_INT_SIMD@GOTPAGE
Lloh27:
	ldr	x11, [x11, _VF_CFG_INT_SIMD@GOTPAGEOFF]
Lloh28:
	ldr	w11, [x11]
Lloh29:
	adrp	x12, _IGU_VF_CONF_SINGLE_ISR_EN@GOTPAGE
Lloh30:
	ldr	x12, [x12, _IGU_VF_CONF_SINGLE_ISR_EN@GOTPAGEOFF]
Lloh31:
	ldr	w12, [x12]
	tst	w11, w10
	csel	w10, wzr, w12, eq
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w8, w8, w10
Lloh32:
	adrp	x9, _IGU_VF_CONF_PARENT_MASK@GOTPAGE
Lloh33:
	ldr	x9, [x9, _IGU_VF_CONF_PARENT_MASK@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	bic	w21, w8, w9
	mov	x0, x20
	bl	_BP_FUNC
Lloh35:
	adrp	x8, _IGU_VF_CONF_PARENT_SHIFT@GOTPAGE
Lloh36:
	ldr	x8, [x8, _IGU_VF_CONF_PARENT_SHIFT@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	lsl	w8, w0, w8
	orr	w2, w21, w8
	ldr	x1, [x23]
	mov	x0, x20
	bl	_REG_WR
Lloh38:
	adrp	x8, _BNX2X_MSG_IOV@GOTPAGE
Lloh39:
	ldr	x8, [x8, _BNX2X_MSG_IOV@GOTPAGEOFF]
Lloh40:
	ldr	w21, [x8]
	ldr	w22, [x19, #4]
	ldr	x1, [x23]
	mov	x0, x20
	bl	_REG_RD
	mov	x3, x0
Lloh41:
	adrp	x1, l_.str@PAGE
Lloh42:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x21
	mov	x2, x22
	bl	_DP
	mov	x0, x20
	bl	_BP_ABS_FUNC
	mov	x1, x0
	mov	x0, x20
	bl	_bnx2x_pretend_func
	mov	x0, x19
	bl	_vf_sb_count
	cmp	w0, #1
	b.lt	LBB0_3
; %bb.1:
	mov	w21, #0
Lloh43:
	adrp	x23, _IGU_REG_PROD_CONS_MEMORY@GOTPAGE
Lloh44:
	ldr	x23, [x23, _IGU_REG_PROD_CONS_MEMORY@GOTPAGEOFF]
Lloh45:
	adrp	x24, _USTORM_ID@GOTPAGE
Lloh46:
	ldr	x24, [x24, _USTORM_ID@GOTPAGEOFF]
Lloh47:
	adrp	x25, _IGU_INT_DISABLE@GOTPAGE
Lloh48:
	ldr	x25, [x25, _IGU_INT_DISABLE@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x21
	bl	_vf_igu_sb
	mov	x22, x0
	ldr	x8, [x23]
	lsl	w9, w0, #2
	add	x1, x8, w9, sxtw
	mov	x0, x20
	mov	w2, #0
	bl	_REG_WR
	ldr	w1, [x19, #4]
	mov	x0, x20
	mov	x2, x22
	mov	w3, #0
	bl	_bnx2x_igu_clear_sb_gen
	ldr	w3, [x24]
	ldr	w5, [x25]
	mov	x0, x20
	mov	x1, x19
	mov	x2, x22
	mov	w4, #0
	mov	w6, #1
	bl	_bnx2x_vf_igu_ack_sb
	add	w21, w21, #1
	mov	x0, x19
	bl	_vf_sb_count
	cmp	w21, w0
	b.lt	LBB0_2
LBB0_3:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh24
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh43, Lloh44
	.cfi_endproc
                                        ; -- End function
	.comm	_IGU_REG_SB_INT_BEFORE_MASK_LSB,8,3 ; @IGU_REG_SB_INT_BEFORE_MASK_LSB
	.comm	_IGU_REG_SB_INT_BEFORE_MASK_MSB,8,3 ; @IGU_REG_SB_INT_BEFORE_MASK_MSB
	.comm	_IGU_REG_SB_MASK_LSB,8,3        ; @IGU_REG_SB_MASK_LSB
	.comm	_IGU_REG_SB_MASK_MSB,8,3        ; @IGU_REG_SB_MASK_MSB
	.comm	_IGU_REG_PBA_STATUS_LSB,8,3     ; @IGU_REG_PBA_STATUS_LSB
	.comm	_IGU_REG_PBA_STATUS_MSB,8,3     ; @IGU_REG_PBA_STATUS_MSB
	.comm	_IGU_REG_VF_CONFIGURATION,8,3   ; @IGU_REG_VF_CONFIGURATION
	.comm	_IGU_VF_CONF_FUNC_EN,4,2        ; @IGU_VF_CONF_FUNC_EN
	.comm	_IGU_VF_CONF_MSI_MSIX_EN,4,2    ; @IGU_VF_CONF_MSI_MSIX_EN
	.comm	_VF_CFG_INT_SIMD,4,2            ; @VF_CFG_INT_SIMD
	.comm	_IGU_VF_CONF_SINGLE_ISR_EN,4,2  ; @IGU_VF_CONF_SINGLE_ISR_EN
	.comm	_IGU_VF_CONF_PARENT_MASK,4,2    ; @IGU_VF_CONF_PARENT_MASK
	.comm	_IGU_VF_CONF_PARENT_SHIFT,4,2   ; @IGU_VF_CONF_PARENT_SHIFT
	.comm	_BNX2X_MSG_IOV,4,2              ; @BNX2X_MSG_IOV
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"value in IGU_REG_VF_CONFIGURATION of vf %d after write %x\n"

	.comm	_IGU_REG_PROD_CONS_MEMORY,8,3   ; @IGU_REG_PROD_CONS_MEMORY
	.comm	_USTORM_ID,4,2                  ; @USTORM_ID
	.comm	_IGU_INT_DISABLE,4,2            ; @IGU_INT_DISABLE
	.no_dead_strip	_bnx2x_vf_igu_reset
.subsections_via_symbols
