	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_cp_dispatch_swap
_radeon_cp_dispatch_swap:               ## @radeon_cp_dispatch_swap
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %r15
	movq	(%rsi), %r12
	movq	(%r12), %rax
	movl	(%rax), %ebx
	movq	%rax, %r14
	movq	24(%rax), %r13
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	cmpq	$0, 16(%r15)
	je	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_radeon_cp_performance_boxes
LBB0_2:
	movl	$2, %edi
	callq	_BEGIN_RING
	xorl	%eax, %eax
	callq	_RADEON_WAIT_UNTIL_3D_IDLE
	xorl	%eax, %eax
	callq	_ADVANCE_RING
	testl	%ebx, %ebx
	movq	%r14, -64(%rbp)                 ## 8-byte Spill
	jle	LBB0_5
## %bb.3:
	movq	%r15, %r12
	shlq	$4, %rbx
	xorl	%r15d, %r15d
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movq	%r13, -48(%rbp)                 ## 8-byte Spill
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r13,%r15), %ebx
	movl	4(%r13,%r15), %edx
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	8(%rax,%r15), %r13d
	subl	%ebx, %r13d
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	12(%rax,%r15), %r8d
	movl	%edx, -52(%rbp)                 ## 4-byte Spill
	subl	%edx, %r8d
	movl	%r8d, -56(%rbp)                 ## 4-byte Spill
	leaq	L_.str.1(%rip), %rdi
	movl	%ebx, %esi
	movl	%r13d, %ecx
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movl	$9, %edi
	callq	_BEGIN_RING
	movq	_RADEON_DP_GUI_MASTER_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_CP_PACKET0
	movl	%eax, %edi
	callq	_OUT_RING
	movq	_RADEON_GMC_DST_PITCH_OFFSET_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_RADEON_GMC_SRC_PITCH_OFFSET_CNTL@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_RADEON_GMC_BRUSH_NONE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r12), %edi
	shll	$8, %edi
	orl	%eax, %edi
	movq	_RADEON_GMC_SRC_DATATYPE_COLOR@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_RADEON_ROP3_S@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_RADEON_DP_SRC_SOURCE_MEMORY@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_RADEON_GMC_CLR_CMP_CNTL_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_RADEON_GMC_WR_MSK_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	callq	_OUT_RING
	movq	_RADEON_SRC_PITCH_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_CP_PACKET0
	movl	%eax, %edi
	callq	_OUT_RING
	xorl	%r14d, %r14d
	xorl	%eax, %eax
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
	cmpq	$0, 8(%rcx)
	sete	%r14b
	setne	%al
	movl	4(%r12,%rax,4), %edi
	callq	_OUT_RING
	movl	4(%r12,%r14,4), %edi
	callq	_OUT_RING
	movq	_RADEON_SRC_X_Y@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$2, %esi
	callq	_CP_PACKET0
	movl	%eax, %edi
	callq	_OUT_RING
	shll	$16, %ebx
	orl	-52(%rbp), %ebx                 ## 4-byte Folded Reload
	movl	%ebx, %edi
	callq	_OUT_RING
	movl	%ebx, %edi
	callq	_OUT_RING
	shll	$16, %r13d
	orl	-56(%rbp), %r13d                ## 4-byte Folded Reload
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	movl	%r13d, %edi
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	callq	_OUT_RING
	xorl	%eax, %eax
	callq	_ADVANCE_RING
	addq	$16, %r15
	cmpq	%r15, %rbx
	jne	LBB0_4
LBB0_5:
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	incl	16(%rbx)
	movl	$4, %edi
	callq	_BEGIN_RING
	movl	16(%rbx), %edi
	callq	_RADEON_FRAME_AGE
	xorl	%eax, %eax
	callq	_RADEON_WAIT_UNTIL_2D_IDLE
	xorl	%eax, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ADVANCE_RING                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RING_LOCALS,4,2                ## @RING_LOCALS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\n"

L_.str.1:                               ## @.str.1
	.asciz	"%d,%d-%d,%d\n"

	.comm	_RADEON_DP_GUI_MASTER_CNTL,4,2  ## @RADEON_DP_GUI_MASTER_CNTL
	.comm	_RADEON_GMC_SRC_PITCH_OFFSET_CNTL,4,2 ## @RADEON_GMC_SRC_PITCH_OFFSET_CNTL
	.comm	_RADEON_GMC_DST_PITCH_OFFSET_CNTL,4,2 ## @RADEON_GMC_DST_PITCH_OFFSET_CNTL
	.comm	_RADEON_GMC_BRUSH_NONE,4,2      ## @RADEON_GMC_BRUSH_NONE
	.comm	_RADEON_GMC_SRC_DATATYPE_COLOR,4,2 ## @RADEON_GMC_SRC_DATATYPE_COLOR
	.comm	_RADEON_ROP3_S,4,2              ## @RADEON_ROP3_S
	.comm	_RADEON_DP_SRC_SOURCE_MEMORY,4,2 ## @RADEON_DP_SRC_SOURCE_MEMORY
	.comm	_RADEON_GMC_CLR_CMP_CNTL_DIS,4,2 ## @RADEON_GMC_CLR_CMP_CNTL_DIS
	.comm	_RADEON_GMC_WR_MSK_DIS,4,2      ## @RADEON_GMC_WR_MSK_DIS
	.comm	_RADEON_SRC_PITCH_OFFSET,4,2    ## @RADEON_SRC_PITCH_OFFSET
	.comm	_RADEON_SRC_X_Y,4,2             ## @RADEON_SRC_X_Y
	.no_dead_strip	_radeon_cp_dispatch_swap
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_cp_dispatch_swap
_radeon_cp_dispatch_swap:               ; @radeon_cp_dispatch_swap
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	x19, [x0]
	ldr	x20, [x1]
	ldr	x26, [x20]
	ldr	w23, [x26]
	ldr	x21, [x26, #24]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
	ldr	x8, [x19, #16]
	cbz	x8, LBB0_2
; %bb.1:
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_cp_performance_boxes
LBB0_2:
	mov	w0, #2
	bl	_BEGIN_RING
	bl	_RADEON_WAIT_UNTIL_3D_IDLE
	bl	_ADVANCE_RING
	cmp	w23, #1
	b.lt	LBB0_5
; %bb.3:
	add	x25, x21, #8
	mov	w27, #4
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldp	w21, w28, [x25, #-8]
	ldp	w8, w9, [x25], #16
	sub	w20, w8, w21
	sub	w24, w9, w28
	stp	x21, x28, [sp]
	stp	x20, x24, [sp, #16]
Lloh2:
	adrp	x0, l_.str.1@PAGE
Lloh3:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_DEBUG
	mov	w0, #9
	bl	_BEGIN_RING
Lloh4:
	adrp	x8, _RADEON_DP_GUI_MASTER_CNTL@GOTPAGE
Lloh5:
	ldr	x8, [x8, _RADEON_DP_GUI_MASTER_CNTL@GOTPAGEOFF]
Lloh6:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_CP_PACKET0
	bl	_OUT_RING
Lloh7:
	adrp	x8, _RADEON_GMC_SRC_PITCH_OFFSET_CNTL@GOTPAGE
Lloh8:
	ldr	x8, [x8, _RADEON_GMC_SRC_PITCH_OFFSET_CNTL@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
Lloh10:
	adrp	x9, _RADEON_GMC_DST_PITCH_OFFSET_CNTL@GOTPAGE
Lloh11:
	ldr	x9, [x9, _RADEON_GMC_DST_PITCH_OFFSET_CNTL@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh13:
	adrp	x9, _RADEON_GMC_BRUSH_NONE@GOTPAGE
Lloh14:
	ldr	x9, [x9, _RADEON_GMC_BRUSH_NONE@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [x19]
	orr	w8, w8, w9, lsl #8
Lloh16:
	adrp	x9, _RADEON_GMC_SRC_DATATYPE_COLOR@GOTPAGE
Lloh17:
	ldr	x9, [x9, _RADEON_GMC_SRC_DATATYPE_COLOR@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh19:
	adrp	x9, _RADEON_ROP3_S@GOTPAGE
Lloh20:
	ldr	x9, [x9, _RADEON_ROP3_S@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh22:
	adrp	x9, _RADEON_DP_SRC_SOURCE_MEMORY@GOTPAGE
Lloh23:
	ldr	x9, [x9, _RADEON_DP_SRC_SOURCE_MEMORY@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh25:
	adrp	x9, _RADEON_GMC_CLR_CMP_CNTL_DIS@GOTPAGE
Lloh26:
	ldr	x9, [x9, _RADEON_GMC_CLR_CMP_CNTL_DIS@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh28:
	adrp	x9, _RADEON_GMC_WR_MSK_DIS@GOTPAGE
Lloh29:
	ldr	x9, [x9, _RADEON_GMC_WR_MSK_DIS@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	orr	w0, w8, w9
	bl	_OUT_RING
Lloh31:
	adrp	x8, _RADEON_SRC_PITCH_OFFSET@GOTPAGE
Lloh32:
	ldr	x8, [x8, _RADEON_SRC_PITCH_OFFSET@GOTPAGEOFF]
Lloh33:
	ldr	w0, [x8]
	mov	w1, #1
	bl	_CP_PACKET0
	bl	_OUT_RING
	ldr	x8, [x26, #8]
	cmp	x8, #0
	mov	w9, #8
	csel	x8, x27, x9, eq
	csel	x22, x9, x27, eq
	ldr	w0, [x19, x8]
	bl	_OUT_RING
	ldr	w0, [x19, x22]
	bl	_OUT_RING
Lloh34:
	adrp	x8, _RADEON_SRC_X_Y@GOTPAGE
Lloh35:
	ldr	x8, [x8, _RADEON_SRC_X_Y@GOTPAGEOFF]
Lloh36:
	ldr	w0, [x8]
	mov	w1, #2
	bl	_CP_PACKET0
	bl	_OUT_RING
	orr	w21, w28, w21, lsl #16
	mov	x0, x21
	bl	_OUT_RING
	mov	x0, x21
	bl	_OUT_RING
	orr	w0, w24, w20, lsl #16
	bl	_OUT_RING
	bl	_ADVANCE_RING
	subs	x23, x23, #1
	b.ne	LBB0_4
LBB0_5:
	ldr	w8, [x26, #16]
	add	w8, w8, #1
	str	w8, [x26, #16]
	mov	w0, #4
	bl	_BEGIN_RING
	ldr	w0, [x26, #16]
	bl	_RADEON_FRAME_AGE
	bl	_RADEON_WAIT_UNTIL_2D_IDLE
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	b	_ADVANCE_RING
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh2, Lloh3
	.cfi_endproc
                                        ; -- End function
	.comm	_RING_LOCALS,4,2                ; @RING_LOCALS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\n"

l_.str.1:                               ; @.str.1
	.asciz	"%d,%d-%d,%d\n"

	.comm	_RADEON_DP_GUI_MASTER_CNTL,4,2  ; @RADEON_DP_GUI_MASTER_CNTL
	.comm	_RADEON_GMC_SRC_PITCH_OFFSET_CNTL,4,2 ; @RADEON_GMC_SRC_PITCH_OFFSET_CNTL
	.comm	_RADEON_GMC_DST_PITCH_OFFSET_CNTL,4,2 ; @RADEON_GMC_DST_PITCH_OFFSET_CNTL
	.comm	_RADEON_GMC_BRUSH_NONE,4,2      ; @RADEON_GMC_BRUSH_NONE
	.comm	_RADEON_GMC_SRC_DATATYPE_COLOR,4,2 ; @RADEON_GMC_SRC_DATATYPE_COLOR
	.comm	_RADEON_ROP3_S,4,2              ; @RADEON_ROP3_S
	.comm	_RADEON_DP_SRC_SOURCE_MEMORY,4,2 ; @RADEON_DP_SRC_SOURCE_MEMORY
	.comm	_RADEON_GMC_CLR_CMP_CNTL_DIS,4,2 ; @RADEON_GMC_CLR_CMP_CNTL_DIS
	.comm	_RADEON_GMC_WR_MSK_DIS,4,2      ; @RADEON_GMC_WR_MSK_DIS
	.comm	_RADEON_SRC_PITCH_OFFSET,4,2    ; @RADEON_SRC_PITCH_OFFSET
	.comm	_RADEON_SRC_X_Y,4,2             ; @RADEON_SRC_X_Y
	.no_dead_strip	_radeon_cp_dispatch_swap
.subsections_via_symbols
