	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tg3_phy_apply_otp
_tg3_phy_apply_otp:                     ## @tg3_phy_apply_otp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	(%rdi), %ebx
	testl	%ebx, %ebx
	je	LBB0_2
## %bb.1:
	movq	%rdi, %r14
	movl	$1, %esi
	callq	_tg3_phy_toggle_auxctl_smdsp
	testq	%rax, %rax
	je	LBB0_3
LBB0_2:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_3:
	movq	_TG3_OTP_AGCTGT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	%ebx, %edx
	movq	_TG3_OTP_AGCTGT_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %edx
	movq	_MII_TG3_DSP_TAP1_AGCTGT_DFLT@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_MII_TG3_DSP_TAP1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_tg3_phydsp_write
	movq	_TG3_OTP_HPFFLTR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%ebx, %eax
	movq	_TG3_OTP_HPFFLTR_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movq	_TG3_OTP_HPFOVER_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	%ebx, %edx
	movq	_TG3_OTP_HPFOVER_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %edx
	orl	%eax, %edx
	movq	_MII_TG3_DSP_AADJ1CH0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_tg3_phydsp_write
	movq	_TG3_OTP_LPFDIS_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	%ebx, %edx
	movq	_TG3_OTP_LPFDIS_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %edx
	movq	_MII_TG3_DSP_AADJ1CH3_ADCCKADJ@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_MII_TG3_DSP_AADJ1CH3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_tg3_phydsp_write
	movq	_TG3_OTP_VDAC_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	%ebx, %edx
	movq	_TG3_OTP_VDAC_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %edx
	movq	_MII_TG3_DSP_EXP75@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_tg3_phydsp_write
	movq	_TG3_OTP_10BTAMP_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	%ebx, %edx
	movq	_TG3_OTP_10BTAMP_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %edx
	movq	_MII_TG3_DSP_EXP96@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_tg3_phydsp_write
	movq	_TG3_OTP_ROFF_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%ebx, %eax
	movq	_TG3_OTP_ROFF_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movq	_TG3_OTP_RCOFF_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %ebx
	movq	_TG3_OTP_RCOFF_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %ebx
	orl	%eax, %ebx
	movq	_MII_TG3_DSP_EXP97@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_tg3_phydsp_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_tg3_phy_toggle_auxctl_smdsp    ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_TG3_OTP_AGCTGT_MASK,4,2        ## @TG3_OTP_AGCTGT_MASK
	.comm	_TG3_OTP_AGCTGT_SHIFT,4,2       ## @TG3_OTP_AGCTGT_SHIFT
	.comm	_MII_TG3_DSP_TAP1_AGCTGT_DFLT,4,2 ## @MII_TG3_DSP_TAP1_AGCTGT_DFLT
	.comm	_MII_TG3_DSP_TAP1,4,2           ## @MII_TG3_DSP_TAP1
	.comm	_TG3_OTP_HPFFLTR_MASK,4,2       ## @TG3_OTP_HPFFLTR_MASK
	.comm	_TG3_OTP_HPFFLTR_SHIFT,4,2      ## @TG3_OTP_HPFFLTR_SHIFT
	.comm	_TG3_OTP_HPFOVER_MASK,4,2       ## @TG3_OTP_HPFOVER_MASK
	.comm	_TG3_OTP_HPFOVER_SHIFT,4,2      ## @TG3_OTP_HPFOVER_SHIFT
	.comm	_MII_TG3_DSP_AADJ1CH0,4,2       ## @MII_TG3_DSP_AADJ1CH0
	.comm	_TG3_OTP_LPFDIS_MASK,4,2        ## @TG3_OTP_LPFDIS_MASK
	.comm	_TG3_OTP_LPFDIS_SHIFT,4,2       ## @TG3_OTP_LPFDIS_SHIFT
	.comm	_MII_TG3_DSP_AADJ1CH3_ADCCKADJ,4,2 ## @MII_TG3_DSP_AADJ1CH3_ADCCKADJ
	.comm	_MII_TG3_DSP_AADJ1CH3,4,2       ## @MII_TG3_DSP_AADJ1CH3
	.comm	_TG3_OTP_VDAC_MASK,4,2          ## @TG3_OTP_VDAC_MASK
	.comm	_TG3_OTP_VDAC_SHIFT,4,2         ## @TG3_OTP_VDAC_SHIFT
	.comm	_MII_TG3_DSP_EXP75,4,2          ## @MII_TG3_DSP_EXP75
	.comm	_TG3_OTP_10BTAMP_MASK,4,2       ## @TG3_OTP_10BTAMP_MASK
	.comm	_TG3_OTP_10BTAMP_SHIFT,4,2      ## @TG3_OTP_10BTAMP_SHIFT
	.comm	_MII_TG3_DSP_EXP96,4,2          ## @MII_TG3_DSP_EXP96
	.comm	_TG3_OTP_ROFF_MASK,4,2          ## @TG3_OTP_ROFF_MASK
	.comm	_TG3_OTP_ROFF_SHIFT,4,2         ## @TG3_OTP_ROFF_SHIFT
	.comm	_TG3_OTP_RCOFF_MASK,4,2         ## @TG3_OTP_RCOFF_MASK
	.comm	_TG3_OTP_RCOFF_SHIFT,4,2        ## @TG3_OTP_RCOFF_SHIFT
	.comm	_MII_TG3_DSP_EXP97,4,2          ## @MII_TG3_DSP_EXP97
	.no_dead_strip	_tg3_phy_apply_otp
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tg3_phy_apply_otp
_tg3_phy_apply_otp:                     ; @tg3_phy_apply_otp
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	w20, [x0]
	cbz	w20, LBB0_2
; %bb.1:
	mov	x19, x0
	mov	w1, #1
	bl	_tg3_phy_toggle_auxctl_smdsp
	cbz	x0, LBB0_3
LBB0_2:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_3:
Lloh0:
	adrp	x8, _TG3_OTP_AGCTGT_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _TG3_OTP_AGCTGT_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	and	w8, w8, w20
Lloh3:
	adrp	x9, _TG3_OTP_AGCTGT_SHIFT@GOTPAGE
Lloh4:
	ldr	x9, [x9, _TG3_OTP_AGCTGT_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
Lloh6:
	adrp	x10, _MII_TG3_DSP_TAP1_AGCTGT_DFLT@GOTPAGE
Lloh7:
	ldr	x10, [x10, _MII_TG3_DSP_TAP1_AGCTGT_DFLT@GOTPAGEOFF]
	asr	w8, w8, w9
Lloh8:
	ldr	w9, [x10]
	orr	w2, w8, w9
Lloh9:
	adrp	x8, _MII_TG3_DSP_TAP1@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MII_TG3_DSP_TAP1@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_phydsp_write
Lloh12:
	adrp	x8, _TG3_OTP_HPFFLTR_MASK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _TG3_OTP_HPFFLTR_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	and	w8, w8, w20
Lloh15:
	adrp	x9, _TG3_OTP_HPFFLTR_SHIFT@GOTPAGE
Lloh16:
	ldr	x9, [x9, _TG3_OTP_HPFFLTR_SHIFT@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	asr	w8, w8, w9
Lloh18:
	adrp	x9, _TG3_OTP_HPFOVER_MASK@GOTPAGE
Lloh19:
	ldr	x9, [x9, _TG3_OTP_HPFOVER_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	and	w9, w9, w20
Lloh21:
	adrp	x10, _TG3_OTP_HPFOVER_SHIFT@GOTPAGE
Lloh22:
	ldr	x10, [x10, _TG3_OTP_HPFOVER_SHIFT@GOTPAGEOFF]
Lloh23:
	ldr	w10, [x10]
	asr	w9, w9, w10
	orr	w2, w9, w8
Lloh24:
	adrp	x8, _MII_TG3_DSP_AADJ1CH0@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MII_TG3_DSP_AADJ1CH0@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_phydsp_write
Lloh27:
	adrp	x8, _TG3_OTP_LPFDIS_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _TG3_OTP_LPFDIS_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	and	w8, w8, w20
Lloh30:
	adrp	x9, _TG3_OTP_LPFDIS_SHIFT@GOTPAGE
Lloh31:
	ldr	x9, [x9, _TG3_OTP_LPFDIS_SHIFT@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
Lloh33:
	adrp	x10, _MII_TG3_DSP_AADJ1CH3_ADCCKADJ@GOTPAGE
Lloh34:
	ldr	x10, [x10, _MII_TG3_DSP_AADJ1CH3_ADCCKADJ@GOTPAGEOFF]
	asr	w8, w8, w9
Lloh35:
	ldr	w9, [x10]
	orr	w2, w8, w9
Lloh36:
	adrp	x8, _MII_TG3_DSP_AADJ1CH3@GOTPAGE
Lloh37:
	ldr	x8, [x8, _MII_TG3_DSP_AADJ1CH3@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_phydsp_write
Lloh39:
	adrp	x8, _TG3_OTP_VDAC_MASK@GOTPAGE
Lloh40:
	ldr	x8, [x8, _TG3_OTP_VDAC_MASK@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
Lloh42:
	adrp	x9, _TG3_OTP_VDAC_SHIFT@GOTPAGE
Lloh43:
	ldr	x9, [x9, _TG3_OTP_VDAC_SHIFT@GOTPAGEOFF]
	and	w8, w8, w20
Lloh44:
	ldr	w9, [x9]
	asr	w2, w8, w9
Lloh45:
	adrp	x8, _MII_TG3_DSP_EXP75@GOTPAGE
Lloh46:
	ldr	x8, [x8, _MII_TG3_DSP_EXP75@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_phydsp_write
Lloh48:
	adrp	x8, _TG3_OTP_10BTAMP_MASK@GOTPAGE
Lloh49:
	ldr	x8, [x8, _TG3_OTP_10BTAMP_MASK@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
Lloh51:
	adrp	x9, _TG3_OTP_10BTAMP_SHIFT@GOTPAGE
Lloh52:
	ldr	x9, [x9, _TG3_OTP_10BTAMP_SHIFT@GOTPAGEOFF]
	and	w8, w8, w20
Lloh53:
	ldr	w9, [x9]
	asr	w2, w8, w9
Lloh54:
	adrp	x8, _MII_TG3_DSP_EXP96@GOTPAGE
Lloh55:
	ldr	x8, [x8, _MII_TG3_DSP_EXP96@GOTPAGEOFF]
Lloh56:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_phydsp_write
Lloh57:
	adrp	x8, _TG3_OTP_ROFF_MASK@GOTPAGE
Lloh58:
	ldr	x8, [x8, _TG3_OTP_ROFF_MASK@GOTPAGEOFF]
Lloh59:
	ldr	w8, [x8]
	and	w8, w8, w20
Lloh60:
	adrp	x9, _TG3_OTP_ROFF_SHIFT@GOTPAGE
Lloh61:
	ldr	x9, [x9, _TG3_OTP_ROFF_SHIFT@GOTPAGEOFF]
Lloh62:
	ldr	w9, [x9]
	asr	w8, w8, w9
Lloh63:
	adrp	x9, _TG3_OTP_RCOFF_MASK@GOTPAGE
Lloh64:
	ldr	x9, [x9, _TG3_OTP_RCOFF_MASK@GOTPAGEOFF]
Lloh65:
	ldr	w9, [x9]
	and	w9, w9, w20
Lloh66:
	adrp	x10, _TG3_OTP_RCOFF_SHIFT@GOTPAGE
Lloh67:
	ldr	x10, [x10, _TG3_OTP_RCOFF_SHIFT@GOTPAGEOFF]
Lloh68:
	ldr	w10, [x10]
	asr	w9, w9, w10
	orr	w2, w9, w8
Lloh69:
	adrp	x8, _MII_TG3_DSP_EXP97@GOTPAGE
Lloh70:
	ldr	x8, [x8, _MII_TG3_DSP_EXP97@GOTPAGEOFF]
Lloh71:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_phydsp_write
	mov	x0, x19
	mov	w1, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_tg3_phy_toggle_auxctl_smdsp
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_TG3_OTP_AGCTGT_MASK,4,2        ; @TG3_OTP_AGCTGT_MASK
	.comm	_TG3_OTP_AGCTGT_SHIFT,4,2       ; @TG3_OTP_AGCTGT_SHIFT
	.comm	_MII_TG3_DSP_TAP1_AGCTGT_DFLT,4,2 ; @MII_TG3_DSP_TAP1_AGCTGT_DFLT
	.comm	_MII_TG3_DSP_TAP1,4,2           ; @MII_TG3_DSP_TAP1
	.comm	_TG3_OTP_HPFFLTR_MASK,4,2       ; @TG3_OTP_HPFFLTR_MASK
	.comm	_TG3_OTP_HPFFLTR_SHIFT,4,2      ; @TG3_OTP_HPFFLTR_SHIFT
	.comm	_TG3_OTP_HPFOVER_MASK,4,2       ; @TG3_OTP_HPFOVER_MASK
	.comm	_TG3_OTP_HPFOVER_SHIFT,4,2      ; @TG3_OTP_HPFOVER_SHIFT
	.comm	_MII_TG3_DSP_AADJ1CH0,4,2       ; @MII_TG3_DSP_AADJ1CH0
	.comm	_TG3_OTP_LPFDIS_MASK,4,2        ; @TG3_OTP_LPFDIS_MASK
	.comm	_TG3_OTP_LPFDIS_SHIFT,4,2       ; @TG3_OTP_LPFDIS_SHIFT
	.comm	_MII_TG3_DSP_AADJ1CH3_ADCCKADJ,4,2 ; @MII_TG3_DSP_AADJ1CH3_ADCCKADJ
	.comm	_MII_TG3_DSP_AADJ1CH3,4,2       ; @MII_TG3_DSP_AADJ1CH3
	.comm	_TG3_OTP_VDAC_MASK,4,2          ; @TG3_OTP_VDAC_MASK
	.comm	_TG3_OTP_VDAC_SHIFT,4,2         ; @TG3_OTP_VDAC_SHIFT
	.comm	_MII_TG3_DSP_EXP75,4,2          ; @MII_TG3_DSP_EXP75
	.comm	_TG3_OTP_10BTAMP_MASK,4,2       ; @TG3_OTP_10BTAMP_MASK
	.comm	_TG3_OTP_10BTAMP_SHIFT,4,2      ; @TG3_OTP_10BTAMP_SHIFT
	.comm	_MII_TG3_DSP_EXP96,4,2          ; @MII_TG3_DSP_EXP96
	.comm	_TG3_OTP_ROFF_MASK,4,2          ; @TG3_OTP_ROFF_MASK
	.comm	_TG3_OTP_ROFF_SHIFT,4,2         ; @TG3_OTP_ROFF_SHIFT
	.comm	_TG3_OTP_RCOFF_MASK,4,2         ; @TG3_OTP_RCOFF_MASK
	.comm	_TG3_OTP_RCOFF_SHIFT,4,2        ; @TG3_OTP_RCOFF_SHIFT
	.comm	_MII_TG3_DSP_EXP97,4,2          ; @MII_TG3_DSP_EXP97
	.no_dead_strip	_tg3_phy_apply_otp
.subsections_via_symbols
