	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amd76x_init_csrows
_amd76x_init_csrows:                    ## @amd76x_init_csrows
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, -48(%rbp)                 ## 4-byte Spill
	movq	%rsi, -64(%rbp)                 ## 8-byte Spill
	cmpl	$0, (%rdi)
	jle	LBB0_7
## %bb.1:
	movq	%rdi, %r15
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
	movq	%rdi, -72(%rbp)                 ## 8-byte Spill
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	(%rax), %eax
	movl	%eax, 24(%r12,%r13,8)
	movl	-48(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, 20(%r12,%r13,8)
	movq	-72(%rbp), %r15                 ## 8-byte Reload
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%r14
	movslq	(%r15), %rax
	addq	$4, %r13
	cmpq	%rax, %r14
	jge	LBB0_7
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r15), %r12
	movq	_AMD76X_MEM_BASE_ADDR@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%r13, %rsi
	movq	-64(%rbp), %rdi                 ## 8-byte Reload
	leaq	-44(%rbp), %rdx
	callq	_pci_read_config_dword
	movl	-44(%rbp), %ebx
	xorl	%edi, %edi
	callq	_BIT
	testl	%ebx, %eax
	je	LBB0_6
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	-44(%rbp), %r15d
	movl	%r15d, %ebx
	andl	$-8388608, %ebx                 ## imm = 0xFF800000
	shll	$16, %r15d
	orl	$8388607, %r15d                 ## imm = 0x7FFFFF
	movq	_AMD76X_DRAM_MODE_STATUS@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	-64(%rbp), %rdi                 ## 8-byte Reload
	leaq	-52(%rbp), %rdx
	callq	_pci_read_config_dword
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rdx
	movzbl	(%rdx), %ecx
	sarl	%cl, %ebx
	movl	%ebx, (%r12,%r13,8)
	leal	1(%r15), %eax
	movzbl	(%rdx), %ecx
	sarl	%cl, %eax
	movl	%eax, 4(%r12,%r13,8)
	leal	(%rbx,%rax), %ecx
	decl	%ecx
	movl	%ecx, 8(%r12,%r13,8)
	movzbl	(%rdx), %ecx
	sarl	%cl, %r15d
	movl	%r15d, 12(%r12,%r13,8)
	movzbl	(%rdx), %ecx
	shll	%cl, %eax
	movl	%eax, 16(%r12,%r13,8)
	movq	_MEM_RDDR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%r12,%r13,8)
	movl	-52(%rbp), %eax
	btl	%r14d, %eax
	movq	_DEV_X4@GOTPCREL(%rip), %rax
	jb	LBB0_5
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_DEV_UNKNOWN@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_7:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD76X_MEM_BASE_ADDR,8,3       ## @AMD76X_MEM_BASE_ADDR
	.comm	_AMD76X_DRAM_MODE_STATUS,8,3    ## @AMD76X_DRAM_MODE_STATUS
	.comm	_PAGE_SHIFT,4,2                 ## @PAGE_SHIFT
	.comm	_MEM_RDDR,4,2                   ## @MEM_RDDR
	.comm	_DEV_X4,4,2                     ## @DEV_X4
	.comm	_DEV_UNKNOWN,4,2                ## @DEV_UNKNOWN
	.no_dead_strip	_amd76x_init_csrows
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amd76x_init_csrows
_amd76x_init_csrows:                    ; @amd76x_init_csrows
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0]
	cmp	w8, #1
	b.lt	LBB0_5
; %bb.1:
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	mov	x22, #0
	mov	x23, #0
	mov	w24, #16
Lloh0:
	adrp	x27, _PAGE_SHIFT@GOTPAGE
Lloh1:
	ldr	x27, [x27, _PAGE_SHIFT@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x23, x23, #1
	ldrsw	x8, [x21]
	add	x24, x24, #32
	add	x22, x22, #4
	cmp	x23, x8
	b.ge	LBB0_5
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x26, [x21, #8]
Lloh2:
	adrp	x8, _AMD76X_MEM_BASE_ADDR@GOTPAGE
Lloh3:
	ldr	x8, [x8, _AMD76X_MEM_BASE_ADDR@GOTPAGEOFF]
Lloh4:
	ldr	x8, [x8]
	add	x1, x22, x8
	add	x2, sp, #12
	mov	x0, x20
	bl	_pci_read_config_dword
	ldr	w28, [sp, #12]
	mov	w0, #0
	bl	_BIT
	tst	w0, w28
	b.eq	LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w8, [sp, #12]
	and	w28, w8, #0xff800000
	lsl	w8, w8, #16
	orr	w25, w8, #0x7fffff
Lloh5:
	adrp	x8, _AMD76X_DRAM_MODE_STATUS@GOTPAGE
Lloh6:
	ldr	x8, [x8, _AMD76X_DRAM_MODE_STATUS@GOTPAGEOFF]
Lloh7:
	ldr	x1, [x8]
	add	x2, sp, #8
	mov	x0, x20
	bl	_pci_read_config_dword
	ldr	w8, [x27]
	asr	w8, w28, w8
	add	x9, x26, x24
	stur	w8, [x9, #-16]
	add	w10, w25, #1
	ldr	w11, [x27]
	asr	w10, w10, w11
	add	w8, w8, w10
	sub	w8, w8, #1
	stp	w10, w8, [x9, #-12]
	ldr	w8, [x27]
	asr	w8, w25, w8
	stur	w8, [x9, #-4]
	ldr	w8, [x27]
	lsl	w8, w10, w8
	str	w8, [x9]
Lloh8:
	adrp	x8, _MEM_RDDR@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MEM_RDDR@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	str	w8, [x9, #12]
	ldr	w8, [sp, #8]
	lsr	w8, w8, w23
	tst	w8, #0x1
Lloh11:
	adrp	x8, _DEV_X4@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DEV_X4@GOTPAGEOFF]
Lloh13:
	adrp	x10, _DEV_UNKNOWN@GOTPAGE
Lloh14:
	ldr	x10, [x10, _DEV_UNKNOWN@GOTPAGEOFF]
	csel	x8, x10, x8, eq
	ldr	w8, [x8]
	stp	w19, w8, [x9, #4]
	b	LBB0_2
LBB0_5:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD76X_MEM_BASE_ADDR,8,3       ; @AMD76X_MEM_BASE_ADDR
	.comm	_AMD76X_DRAM_MODE_STATUS,8,3    ; @AMD76X_DRAM_MODE_STATUS
	.comm	_PAGE_SHIFT,4,2                 ; @PAGE_SHIFT
	.comm	_MEM_RDDR,4,2                   ; @MEM_RDDR
	.comm	_DEV_X4,4,2                     ; @DEV_X4
	.comm	_DEV_UNKNOWN,4,2                ; @DEV_UNKNOWN
	.no_dead_strip	_amd76x_init_csrows
.subsections_via_symbols
