	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tg3_phy_set_wirespeed
_tg3_phy_set_wirespeed:                 ## @tg3_phy_set_wirespeed
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	_TG3_PHYFLG_NO_ETH_WIRE_SPEED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rdi)
	jne	LBB0_3
## %bb.1:
	movq	%rdi, %rbx
	movq	_MII_TG3_AUXCTL_SHDWSEL_MISC@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-20(%rbp), %rdx
	callq	_tg3_phy_auxctl_read
	testl	%eax, %eax
	jne	LBB0_3
## %bb.2:
	movl	(%r14), %esi
	movq	_MII_TG3_AUXCTL_MISC_WIRESPD_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	orl	-20(%rbp), %edx
	movq	%rbx, %rdi
	callq	_tg3_phy_auxctl_write
LBB0_3:
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TG3_PHYFLG_NO_ETH_WIRE_SPEED,4,2 ## @TG3_PHYFLG_NO_ETH_WIRE_SPEED
	.comm	_MII_TG3_AUXCTL_SHDWSEL_MISC,4,2 ## @MII_TG3_AUXCTL_SHDWSEL_MISC
	.comm	_MII_TG3_AUXCTL_MISC_WIRESPD_EN,4,2 ## @MII_TG3_AUXCTL_MISC_WIRESPD_EN
	.no_dead_strip	_tg3_phy_set_wirespeed
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tg3_phy_set_wirespeed
_tg3_phy_set_wirespeed:                 ; @tg3_phy_set_wirespeed
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _TG3_PHYFLG_NO_ETH_WIRE_SPEED@GOTPAGE
Lloh1:
	ldr	x9, [x9, _TG3_PHYFLG_NO_ETH_WIRE_SPEED@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_3
; %bb.1:
	mov	x19, x0
Lloh3:
	adrp	x20, _MII_TG3_AUXCTL_SHDWSEL_MISC@GOTPAGE
Lloh4:
	ldr	x20, [x20, _MII_TG3_AUXCTL_SHDWSEL_MISC@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_tg3_phy_auxctl_read
	cbnz	w0, LBB0_3
; %bb.2:
	ldr	w1, [x20]
	ldr	w8, [sp, #12]
Lloh5:
	adrp	x9, _MII_TG3_AUXCTL_MISC_WIRESPD_EN@GOTPAGE
Lloh6:
	ldr	x9, [x9, _MII_TG3_AUXCTL_MISC_WIRESPD_EN@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_tg3_phy_auxctl_write
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_TG3_PHYFLG_NO_ETH_WIRE_SPEED,4,2 ; @TG3_PHYFLG_NO_ETH_WIRE_SPEED
	.comm	_MII_TG3_AUXCTL_SHDWSEL_MISC,4,2 ; @MII_TG3_AUXCTL_SHDWSEL_MISC
	.comm	_MII_TG3_AUXCTL_MISC_WIRESPD_EN,4,2 ; @MII_TG3_AUXCTL_MISC_WIRESPD_EN
	.no_dead_strip	_tg3_phy_set_wirespeed
.subsections_via_symbols
