	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_ring_ib_execute           ## -- Begin function r100_ring_ib_execute
	.p2align	4, 0x90
_r100_ring_ib_execute:                  ## @r100_ring_ib_execute
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	(%rdi), %rax
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	shlq	$4, %rcx
	leaq	(%rax,%rcx), %rbx
	movq	(%rax,%rcx), %rdi
	testq	%rdi, %rdi
	je	LBB0_2
## %bb.1:
	movq	8(%rax,%rcx), %r15
	addq	$5, %r15
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_radeon_ring_write
LBB0_2:
	movq	_RADEON_CP_IB_BASE@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	$1, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_radeon_ring_write
	movq	8(%r14), %rsi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	movq	(%r14), %rsi
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
	.comm	_RADEON_CP_IB_BASE,8,3          ## @RADEON_CP_IB_BASE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_ring_ib_execute           ; -- Begin function r100_ring_ib_execute
	.p2align	2
_r100_ring_ib_execute:                  ; @r100_ring_ib_execute
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x20, x8, x9, lsl #4
	ldr	x0, [x20]
	cbz	x0, LBB0_2
; %bb.1:
	ldr	x8, [x20, #8]
	add	x21, x8, #5
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
	mov	x0, x20
	mov	x1, x21
	bl	_radeon_ring_write
LBB0_2:
Lloh3:
	adrp	x8, _RADEON_CP_IB_BASE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RADEON_CP_IB_BASE@GOTPAGEOFF]
Lloh5:
	ldr	x0, [x8]
	mov	w1, #1
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
	ldr	x1, [x19, #8]
	mov	x0, x20
	bl	_radeon_ring_write
	ldr	x1, [x19]
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_radeon_ring_write
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
	.comm	_RADEON_CP_IB_BASE,8,3          ; @RADEON_CP_IB_BASE
.subsections_via_symbols
