	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv515_mc_resume                ## -- Begin function rv515_mc_resume
	.p2align	4, 0x90
_rv515_mc_resume:                       ## @rv515_mc_resume
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, -48(%rbp)                 ## 8-byte Spill
	movq	%rdi, %r15
	cmpl	$0, (%rdi)
	jle	LBB0_8
## %bb.1:
	movq	8(%r15), %rax
	movq	_CHIP_RV770@GOTPCREL(%rip), %rbx
	cmpq	(%rbx), %rax
	jl	LBB0_3
## %bb.2:
	movq	_R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	movq	24(%r15), %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	movq	24(%r15), %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movq	_CHIP_RV770@GOTPCREL(%rip), %rbx
	movl	%eax, %esi
	callq	_WREG32
LBB0_3:
	movq	_R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS@GOTPCREL(%rip), %rcx
	movq	_crtc_offsets@GOTPCREL(%rip), %r13
	movq	(%r13), %rax
	movq	(%rax), %rdi
	addq	(%rcx), %rdi
	movl	24(%r15), %esi
	callq	_WREG32
	movq	_R_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS@GOTPCREL(%rip), %r14
	movq	(%r13), %rax
	movq	(%rax), %rdi
	addq	(%r14), %rdi
	movl	24(%r15), %esi
	callq	_WREG32
	cmpl	$2, (%r15)
	jl	LBB0_8
## %bb.4:
	movl	$1, %r12d
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_5 Depth=1
	movq	(%r13), %rax
	movq	(%rax,%r12,8), %rdi
	movq	_R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	movl	24(%r15), %esi
	callq	_WREG32
	movq	(%r13), %rax
	movq	(%rax,%r12,8), %rdi
	addq	(%r14), %rdi
	movl	24(%r15), %esi
	callq	_WREG32
	incq	%r12
	movslq	(%r15), %rax
	cmpq	%rax, %r12
	jge	LBB0_8
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r15), %rax
	cmpq	(%rbx), %rax
	jl	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movq	_R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	movq	24(%r15), %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	movq	24(%r15), %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movq	_CHIP_RV770@GOTPCREL(%rip), %rbx
	movl	%eax, %esi
	callq	_WREG32
	jmp	LBB0_7
LBB0_8:
	movq	_R_000310_VGA_MEMORY_BASE_ADDRESS@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	24(%r15), %esi
	callq	_WREG32
	movl	(%r15), %eax
	testl	%eax, %eax
	jle	LBB0_22
## %bb.9:
	xorl	%ebx, %ebx
	movq	_crtc_offsets@GOTPCREL(%rip), %r13
	movq	_AVIVO_D1GRPH_UPDATE@GOTPCREL(%rip), %r12
	jmp	LBB0_10
	.p2align	4, 0x90
LBB0_21:                                ##   in Loop: Header=BB0_10 Depth=1
	incq	%rbx
	movslq	(%r15), %rax
	cmpq	%rax, %rbx
	jge	LBB0_22
LBB0_10:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_19 Depth 2
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	8(%rax), %rax
	cmpq	$0, (%rax,%rbx,8)
	je	LBB0_21
## %bb.11:                              ##   in Loop: Header=BB0_10 Depth=1
	movq	(%r13), %rax
	movq	(%rax,%rbx,8), %rdi
	movq	_AVIVO_D1MODE_MASTER_UPDATE_MODE@GOTPCREL(%rip), %r14
	addq	(%r14), %rdi
	callq	_RREG32
	testb	$3, %al
	je	LBB0_13
## %bb.12:                              ##   in Loop: Header=BB0_10 Depth=1
	andl	$-4, %eax
	movq	(%r13), %rcx
	movq	(%rcx,%rbx,8), %rdi
	addq	(%r14), %rdi
	movl	%eax, %esi
	callq	_WREG32
LBB0_13:                                ##   in Loop: Header=BB0_10 Depth=1
	movq	(%r13), %rax
	movq	(%rax,%rbx,8), %rdi
	addq	(%r12), %rdi
	callq	_RREG32
	movq	_AVIVO_D1GRPH_UPDATE_LOCK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%eax, %ecx
	je	LBB0_15
## %bb.14:                              ##   in Loop: Header=BB0_10 Depth=1
	notl	%ecx
	andl	%ecx, %eax
	movq	(%r13), %rcx
	movq	(%rcx,%rbx,8), %rdi
	addq	(%r12), %rdi
	movl	%eax, %esi
	callq	_WREG32
LBB0_15:                                ##   in Loop: Header=BB0_10 Depth=1
	movq	(%r13), %rax
	movq	(%rax,%rbx,8), %rdi
	movq	_AVIVO_D1MODE_MASTER_UPDATE_LOCK@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	callq	_RREG32
	testb	$1, %al
	je	LBB0_17
## %bb.16:                              ##   in Loop: Header=BB0_10 Depth=1
	andl	$-2, %eax
	movq	(%r13), %rcx
	movq	(%rcx,%rbx,8), %rdi
	movq	_AVIVO_D1MODE_MASTER_UPDATE_LOCK@GOTPCREL(%rip), %rcx
	addq	(%rcx), %rdi
	movl	%eax, %esi
	callq	_WREG32
LBB0_17:                                ##   in Loop: Header=BB0_10 Depth=1
	cmpl	$0, 16(%r15)
	jle	LBB0_21
## %bb.18:                              ##   in Loop: Header=BB0_10 Depth=1
	xorl	%r14d, %r14d
	.p2align	4, 0x90
LBB0_19:                                ##   Parent Loop BB0_10 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	(%r13), %rax
	movq	(%rax,%rbx,8), %rdi
	addq	(%r12), %rdi
	callq	_RREG32
	movq	_AVIVO_D1GRPH_SURFACE_UPDATE_PENDING@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_21
## %bb.20:                              ##   in Loop: Header=BB0_19 Depth=2
	movl	$1, %edi
	callq	_udelay
	incl	%r14d
	cmpl	16(%r15), %r14d
	jl	LBB0_19
	jmp	LBB0_21
LBB0_22:
	movq	8(%r15), %rcx
	movq	_CHIP_R600@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jl	LBB0_24
## %bb.23:
	movq	_CHIP_RV770@GOTPCREL(%rip), %r12
	cmpq	(%r12), %rcx
	movq	_R600_CITF_CNTL@GOTPCREL(%rip), %r14
	movq	_R700_MC_CITF_CNTL@GOTPCREL(%rip), %rbx
	movq	%rbx, %rax
	cmovlq	%r14, %rax
	movq	(%rax), %rdi
	callq	_RREG32
	movq	_R600_BLACKOUT_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	8(%r15), %rax
	cmpq	(%r12), %rax
	cmovlq	%r14, %rbx
	movq	(%rbx), %rdi
	callq	_WREG32
	movq	_R600_BIF_FB_EN@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	_R600_FB_READ_EN@GOTPCREL(%rip), %rax
	movq	_R600_FB_WRITE_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	callq	_WREG32
	movl	(%r15), %eax
LBB0_24:
	testl	%eax, %eax
	jle	LBB0_32
## %bb.25:
	xorl	%ebx, %ebx
	movq	_crtc_offsets@GOTPCREL(%rip), %r13
	jmp	LBB0_26
	.p2align	4, 0x90
LBB0_31:                                ##   in Loop: Header=BB0_26 Depth=1
	incq	%rbx
	movslq	(%r15), %rax
	cmpq	%rax, %rbx
	jge	LBB0_32
LBB0_26:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_29 Depth 2
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	8(%rax), %rax
	cmpq	$0, (%rax,%rbx,8)
	je	LBB0_31
## %bb.27:                              ##   in Loop: Header=BB0_26 Depth=1
	movq	(%r13), %rax
	movq	(%rax,%rbx,8), %rdi
	movq	_AVIVO_D1CRTC_CONTROL@GOTPCREL(%rip), %r14
	addq	(%r14), %rdi
	callq	_RREG32
	movq	_AVIVO_CRTC_DISP_READ_REQUEST_DISABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	(%r13), %rax
	movq	(%rax,%rbx,8), %rdi
	addq	(%r14), %rdi
	callq	_WREG32
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_radeon_get_vblank_counter
	cmpl	$0, 16(%r15)
	jle	LBB0_31
## %bb.28:                              ##   in Loop: Header=BB0_26 Depth=1
	movl	%eax, %r12d
	xorl	%r14d, %r14d
	.p2align	4, 0x90
LBB0_29:                                ##   Parent Loop BB0_26 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_radeon_get_vblank_counter
	cmpl	%r12d, %eax
	jne	LBB0_31
## %bb.30:                              ##   in Loop: Header=BB0_29 Depth=2
	movl	$1, %edi
	callq	_udelay
	incl	%r14d
	cmpl	16(%r15), %r14d
	jl	LBB0_29
	jmp	LBB0_31
LBB0_32:
	movq	_R_000328_VGA_HDP_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movl	(%rbx), %esi
	callq	_WREG32
	movl	$1, %edi
	callq	_mdelay
	movq	_R_000300_VGA_RENDER_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	4(%rbx), %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_RV770,8,3                 ## @CHIP_RV770
	.comm	_R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH,8,3 ## @R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH
	.comm	_R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH,8,3 ## @R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH
	.comm	_R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH,8,3 ## @R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH
	.comm	_R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH,8,3 ## @R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH
	.comm	_R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS,8,3 ## @R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS
	.comm	_crtc_offsets,8,3               ## @crtc_offsets
	.comm	_R_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS,8,3 ## @R_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS
	.comm	_R_000310_VGA_MEMORY_BASE_ADDRESS,8,3 ## @R_000310_VGA_MEMORY_BASE_ADDRESS
	.comm	_AVIVO_D1MODE_MASTER_UPDATE_MODE,8,3 ## @AVIVO_D1MODE_MASTER_UPDATE_MODE
	.comm	_AVIVO_D1GRPH_UPDATE,8,3        ## @AVIVO_D1GRPH_UPDATE
	.comm	_AVIVO_D1GRPH_UPDATE_LOCK,4,2   ## @AVIVO_D1GRPH_UPDATE_LOCK
	.comm	_AVIVO_D1MODE_MASTER_UPDATE_LOCK,8,3 ## @AVIVO_D1MODE_MASTER_UPDATE_LOCK
	.comm	_AVIVO_D1GRPH_SURFACE_UPDATE_PENDING,4,2 ## @AVIVO_D1GRPH_SURFACE_UPDATE_PENDING
	.comm	_CHIP_R600,8,3                  ## @CHIP_R600
	.comm	_R700_MC_CITF_CNTL,8,3          ## @R700_MC_CITF_CNTL
	.comm	_R600_CITF_CNTL,8,3             ## @R600_CITF_CNTL
	.comm	_R600_BLACKOUT_MASK,4,2         ## @R600_BLACKOUT_MASK
	.comm	_R600_BIF_FB_EN,8,3             ## @R600_BIF_FB_EN
	.comm	_R600_FB_READ_EN,4,2            ## @R600_FB_READ_EN
	.comm	_R600_FB_WRITE_EN,4,2           ## @R600_FB_WRITE_EN
	.comm	_AVIVO_D1CRTC_CONTROL,8,3       ## @AVIVO_D1CRTC_CONTROL
	.comm	_AVIVO_CRTC_DISP_READ_REQUEST_DISABLE,4,2 ## @AVIVO_CRTC_DISP_READ_REQUEST_DISABLE
	.comm	_R_000328_VGA_HDP_CONTROL,8,3   ## @R_000328_VGA_HDP_CONTROL
	.comm	_R_000300_VGA_RENDER_CONTROL,8,3 ## @R_000300_VGA_RENDER_CONTROL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv515_mc_resume                ; -- Begin function rv515_mc_resume
	.p2align	2
_rv515_mc_resume:                       ; @rv515_mc_resume
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x1
	mov	x20, x0
	ldr	w8, [x0]
Lloh0:
	adrp	x22, _CHIP_RV770@GOTPAGE
Lloh1:
	ldr	x22, [x22, _CHIP_RV770@GOTPAGEOFF]
Lloh2:
	adrp	x23, _crtc_offsets@GOTPAGE
Lloh3:
	ldr	x23, [x23, _crtc_offsets@GOTPAGEOFF]
	cmp	w8, #1
	b.lt	LBB0_8
; %bb.1:
	ldr	x8, [x20, #8]
	ldr	x9, [x22]
	cmp	x8, x9
	b.lt	LBB0_3
; %bb.2:
Lloh4:
	adrp	x8, _R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh5:
	ldr	x8, [x8, _R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
Lloh6:
	ldr	x21, [x8]
	ldr	x0, [x20, #24]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x21
	bl	_WREG32
Lloh7:
	adrp	x8, _R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh8:
	ldr	x8, [x8, _R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
Lloh9:
	ldr	x21, [x8]
	ldr	x0, [x20, #24]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x21
	bl	_WREG32
LBB0_3:
Lloh10:
	adrp	x24, _R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS@GOTPAGE
Lloh11:
	ldr	x24, [x24, _R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS@GOTPAGEOFF]
	ldr	x8, [x24]
	ldr	x9, [x23]
	ldr	x9, [x9]
	add	x0, x9, x8
	ldr	w1, [x20, #24]
	bl	_WREG32
Lloh12:
	adrp	x25, _R_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS@GOTPAGE
Lloh13:
	ldr	x25, [x25, _R_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS@GOTPAGEOFF]
	ldr	x8, [x25]
	ldr	x9, [x23]
	ldr	x9, [x9]
	add	x0, x9, x8
	ldr	w1, [x20, #24]
	bl	_WREG32
	ldr	w8, [x20]
	cmp	w8, #1
	b.le	LBB0_8
; %bb.4:
	mov	w26, #1
Lloh14:
	adrp	x27, _R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh15:
	ldr	x27, [x27, _R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
Lloh16:
	adrp	x28, _R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh17:
	ldr	x28, [x28, _R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
	b	LBB0_6
LBB0_5:                                 ;   in Loop: Header=BB0_6 Depth=1
	ldr	x8, [x24]
	ldr	x9, [x23]
	lsl	x21, x26, #3
	ldr	x9, [x9, x21]
	add	x0, x9, x8
	ldr	w1, [x20, #24]
	bl	_WREG32
	ldr	x8, [x25]
	ldr	x9, [x23]
	ldr	x9, [x9, x21]
	add	x0, x9, x8
	ldr	w1, [x20, #24]
	bl	_WREG32
	add	x26, x26, #1
	ldrsw	x8, [x20]
	cmp	x26, x8
	b.ge	LBB0_8
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x20, #8]
	ldr	x9, [x22]
	cmp	x8, x9
	b.lt	LBB0_5
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	ldr	x21, [x27]
	ldr	x0, [x20, #24]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x21
	bl	_WREG32
	ldr	x21, [x28]
	ldr	x0, [x20, #24]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x21
	bl	_WREG32
	b	LBB0_5
LBB0_8:
Lloh18:
	adrp	x8, _R_000310_VGA_MEMORY_BASE_ADDRESS@GOTPAGE
Lloh19:
	ldr	x8, [x8, _R_000310_VGA_MEMORY_BASE_ADDRESS@GOTPAGEOFF]
Lloh20:
	ldr	x0, [x8]
	ldr	w1, [x20, #24]
	bl	_WREG32
	ldr	w8, [x20]
	cmp	w8, #1
	b.lt	LBB0_23
; %bb.9:
	mov	x21, #0
Lloh21:
	adrp	x24, _AVIVO_D1MODE_MASTER_UPDATE_MODE@GOTPAGE
Lloh22:
	ldr	x24, [x24, _AVIVO_D1MODE_MASTER_UPDATE_MODE@GOTPAGEOFF]
Lloh23:
	adrp	x25, _AVIVO_D1GRPH_UPDATE@GOTPAGE
Lloh24:
	ldr	x25, [x25, _AVIVO_D1GRPH_UPDATE@GOTPAGEOFF]
Lloh25:
	adrp	x26, _AVIVO_D1GRPH_UPDATE_LOCK@GOTPAGE
Lloh26:
	ldr	x26, [x26, _AVIVO_D1GRPH_UPDATE_LOCK@GOTPAGEOFF]
Lloh27:
	adrp	x27, _AVIVO_D1MODE_MASTER_UPDATE_LOCK@GOTPAGE
Lloh28:
	ldr	x27, [x27, _AVIVO_D1MODE_MASTER_UPDATE_LOCK@GOTPAGEOFF]
Lloh29:
	adrp	x28, _AVIVO_D1GRPH_SURFACE_UPDATE_PENDING@GOTPAGE
Lloh30:
	ldr	x28, [x28, _AVIVO_D1GRPH_SURFACE_UPDATE_PENDING@GOTPAGEOFF]
	b	LBB0_11
LBB0_10:                                ;   in Loop: Header=BB0_11 Depth=1
	add	x21, x21, #1
	ldrsw	x8, [x20]
	cmp	x21, x8
	b.ge	LBB0_22
LBB0_11:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_20 Depth 2
	ldr	x8, [x19, #8]
	ldr	x8, [x8, x21, lsl #3]
	cbz	x8, LBB0_10
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=1
	ldr	x8, [x24]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_RREG32
	tst	w0, #0x3
	b.eq	LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_11 Depth=1
	and	w1, w0, #0xfffffffc
	ldr	x8, [x24]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_WREG32
LBB0_14:                                ;   in Loop: Header=BB0_11 Depth=1
	ldr	x8, [x25]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_RREG32
	ldr	w8, [x26]
	tst	w8, w0
	b.eq	LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_11 Depth=1
	bic	w1, w0, w8
	ldr	x8, [x25]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_WREG32
LBB0_16:                                ;   in Loop: Header=BB0_11 Depth=1
	ldr	x8, [x27]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_RREG32
	tbz	w0, #0, LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_11 Depth=1
	and	w1, w0, #0xfffffffe
	ldr	x8, [x27]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_WREG32
LBB0_18:                                ;   in Loop: Header=BB0_11 Depth=1
	ldr	w8, [x20, #16]
	cmp	w8, #1
	b.lt	LBB0_10
; %bb.19:                               ;   in Loop: Header=BB0_11 Depth=1
	mov	w22, #0
LBB0_20:                                ;   Parent Loop BB0_11 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	x8, [x25]
	ldr	x9, [x23]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	bl	_RREG32
	ldr	w8, [x28]
	tst	w8, w0
	b.eq	LBB0_10
; %bb.21:                               ;   in Loop: Header=BB0_20 Depth=2
	mov	w0, #1
	bl	_udelay
	add	w22, w22, #1
	ldr	w8, [x20, #16]
	cmp	w22, w8
	b.lt	LBB0_20
	b	LBB0_10
LBB0_22:
Lloh31:
	adrp	x22, _CHIP_RV770@GOTPAGE
Lloh32:
	ldr	x22, [x22, _CHIP_RV770@GOTPAGEOFF]
LBB0_23:
	ldr	x9, [x20, #8]
Lloh33:
	adrp	x10, _CHIP_R600@GOTPAGE
Lloh34:
	ldr	x10, [x10, _CHIP_R600@GOTPAGEOFF]
Lloh35:
	ldr	x10, [x10]
	cmp	x9, x10
	b.lt	LBB0_25
; %bb.24:
Lloh36:
	adrp	x21, _R600_CITF_CNTL@GOTPAGE
Lloh37:
	ldr	x21, [x21, _R600_CITF_CNTL@GOTPAGEOFF]
	ldr	x8, [x22]
	mov	x24, x22
Lloh38:
	adrp	x22, _R700_MC_CITF_CNTL@GOTPAGE
Lloh39:
	ldr	x22, [x22, _R700_MC_CITF_CNTL@GOTPAGEOFF]
	cmp	x9, x8
	csel	x8, x21, x22, lt
	ldr	x0, [x8]
	bl	_RREG32
Lloh40:
	adrp	x8, _R600_BLACKOUT_MASK@GOTPAGE
Lloh41:
	ldr	x8, [x8, _R600_BLACKOUT_MASK@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	x8, [x20, #8]
	ldr	x9, [x24]
	cmp	x8, x9
	csel	x8, x21, x22, lt
	ldr	x0, [x8]
	bl	_WREG32
Lloh43:
	adrp	x8, _R600_BIF_FB_EN@GOTPAGE
Lloh44:
	ldr	x8, [x8, _R600_BIF_FB_EN@GOTPAGEOFF]
Lloh45:
	adrp	x9, _R600_FB_READ_EN@GOTPAGE
Lloh46:
	ldr	x9, [x9, _R600_FB_READ_EN@GOTPAGEOFF]
Lloh47:
	ldr	x0, [x8]
Lloh48:
	ldr	w8, [x9]
Lloh49:
	adrp	x9, _R600_FB_WRITE_EN@GOTPAGE
Lloh50:
	ldr	x9, [x9, _R600_FB_WRITE_EN@GOTPAGEOFF]
Lloh51:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_WREG32
	ldr	w8, [x20]
LBB0_25:
	cmp	w8, #1
	b.lt	LBB0_33
; %bb.26:
	mov	x21, #0
Lloh52:
	adrp	x24, _AVIVO_D1CRTC_CONTROL@GOTPAGE
Lloh53:
	ldr	x24, [x24, _AVIVO_D1CRTC_CONTROL@GOTPAGEOFF]
Lloh54:
	adrp	x25, _AVIVO_CRTC_DISP_READ_REQUEST_DISABLE@GOTPAGE
Lloh55:
	ldr	x25, [x25, _AVIVO_CRTC_DISP_READ_REQUEST_DISABLE@GOTPAGEOFF]
	b	LBB0_28
LBB0_27:                                ;   in Loop: Header=BB0_28 Depth=1
	add	x21, x21, #1
	ldrsw	x8, [x20]
	cmp	x21, x8
	b.ge	LBB0_33
LBB0_28:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_31 Depth 2
	ldr	x8, [x19, #8]
	ldr	x8, [x8, x21, lsl #3]
	cbz	x8, LBB0_27
; %bb.29:                               ;   in Loop: Header=BB0_28 Depth=1
	ldr	x8, [x24]
	ldr	x9, [x23]
	lsl	x22, x21, #3
	ldr	x9, [x9, x22]
	add	x0, x9, x8
	bl	_RREG32
	ldr	w8, [x25]
	bic	w1, w0, w8
	ldr	x8, [x24]
	ldr	x9, [x23]
	ldr	x9, [x9, x22]
	add	x0, x9, x8
	bl	_WREG32
	mov	x0, x20
	mov	x1, x21
	bl	_radeon_get_vblank_counter
	ldr	w8, [x20, #16]
	cmp	w8, #1
	b.lt	LBB0_27
; %bb.30:                               ;   in Loop: Header=BB0_28 Depth=1
	mov	x22, x0
	mov	w26, #0
LBB0_31:                                ;   Parent Loop BB0_28 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	mov	x0, x20
	mov	x1, x21
	bl	_radeon_get_vblank_counter
	cmp	w0, w22
	b.ne	LBB0_27
; %bb.32:                               ;   in Loop: Header=BB0_31 Depth=2
	mov	w0, #1
	bl	_udelay
	add	w26, w26, #1
	ldr	w8, [x20, #16]
	cmp	w26, w8
	b.lt	LBB0_31
	b	LBB0_27
LBB0_33:
Lloh56:
	adrp	x8, _R_000328_VGA_HDP_CONTROL@GOTPAGE
Lloh57:
	ldr	x8, [x8, _R_000328_VGA_HDP_CONTROL@GOTPAGEOFF]
Lloh58:
	ldr	x0, [x8]
	ldr	w1, [x19]
	bl	_WREG32
	mov	w0, #1
	bl	_mdelay
Lloh59:
	adrp	x8, _R_000300_VGA_RENDER_CONTROL@GOTPAGE
Lloh60:
	ldr	x8, [x8, _R_000300_VGA_RENDER_CONTROL@GOTPAGEOFF]
Lloh61:
	ldr	x0, [x8]
	ldr	w1, [x19, #4]
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh47
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_RV770,8,3                 ; @CHIP_RV770
	.comm	_R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH,8,3 ; @R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH
	.comm	_R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH,8,3 ; @R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH
	.comm	_R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH,8,3 ; @R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH
	.comm	_R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH,8,3 ; @R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH
	.comm	_R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS,8,3 ; @R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS
	.comm	_crtc_offsets,8,3               ; @crtc_offsets
	.comm	_R_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS,8,3 ; @R_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS
	.comm	_R_000310_VGA_MEMORY_BASE_ADDRESS,8,3 ; @R_000310_VGA_MEMORY_BASE_ADDRESS
	.comm	_AVIVO_D1MODE_MASTER_UPDATE_MODE,8,3 ; @AVIVO_D1MODE_MASTER_UPDATE_MODE
	.comm	_AVIVO_D1GRPH_UPDATE,8,3        ; @AVIVO_D1GRPH_UPDATE
	.comm	_AVIVO_D1GRPH_UPDATE_LOCK,4,2   ; @AVIVO_D1GRPH_UPDATE_LOCK
	.comm	_AVIVO_D1MODE_MASTER_UPDATE_LOCK,8,3 ; @AVIVO_D1MODE_MASTER_UPDATE_LOCK
	.comm	_AVIVO_D1GRPH_SURFACE_UPDATE_PENDING,4,2 ; @AVIVO_D1GRPH_SURFACE_UPDATE_PENDING
	.comm	_CHIP_R600,8,3                  ; @CHIP_R600
	.comm	_R700_MC_CITF_CNTL,8,3          ; @R700_MC_CITF_CNTL
	.comm	_R600_CITF_CNTL,8,3             ; @R600_CITF_CNTL
	.comm	_R600_BLACKOUT_MASK,4,2         ; @R600_BLACKOUT_MASK
	.comm	_R600_BIF_FB_EN,8,3             ; @R600_BIF_FB_EN
	.comm	_R600_FB_READ_EN,4,2            ; @R600_FB_READ_EN
	.comm	_R600_FB_WRITE_EN,4,2           ; @R600_FB_WRITE_EN
	.comm	_AVIVO_D1CRTC_CONTROL,8,3       ; @AVIVO_D1CRTC_CONTROL
	.comm	_AVIVO_CRTC_DISP_READ_REQUEST_DISABLE,4,2 ; @AVIVO_CRTC_DISP_READ_REQUEST_DISABLE
	.comm	_R_000328_VGA_HDP_CONTROL,8,3   ; @R_000328_VGA_HDP_CONTROL
	.comm	_R_000300_VGA_RENDER_CONTROL,8,3 ; @R_000300_VGA_RENDER_CONTROL
.subsections_via_symbols
