	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_haswell_fixup_enable_dp12
_intel_haswell_fixup_enable_dp12:       ## @intel_haswell_fixup_enable_dp12
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_INTEL_VENDOR_NID@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_INTEL_GET_VENDOR_VERB@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	xorl	%edx, %edx
	xorl	%r8d, %r8d
	callq	_snd_hda_codec_read
	cmpl	$-1, %eax
	je	LBB0_2
## %bb.1:
	movq	_INTEL_EN_DP12@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r8d
	testl	%eax, %r8d
	je	LBB0_3
LBB0_2:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_3:
	orl	%eax, %r8d
	movl	(%r14), %esi
	movq	_INTEL_SET_VENDOR_VERB@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_snd_hda_codec_write_cache      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_VENDOR_NID,4,2           ## @INTEL_VENDOR_NID
	.comm	_INTEL_GET_VENDOR_VERB,4,2      ## @INTEL_GET_VENDOR_VERB
	.comm	_INTEL_EN_DP12,4,2              ## @INTEL_EN_DP12
	.comm	_INTEL_SET_VENDOR_VERB,4,2      ## @INTEL_SET_VENDOR_VERB
	.no_dead_strip	_intel_haswell_fixup_enable_dp12
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_haswell_fixup_enable_dp12
_intel_haswell_fixup_enable_dp12:       ; @intel_haswell_fixup_enable_dp12
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x20, _INTEL_VENDOR_NID@GOTPAGE
Lloh1:
	ldr	x20, [x20, _INTEL_VENDOR_NID@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x8, _INTEL_GET_VENDOR_VERB@GOTPAGE
Lloh3:
	ldr	x8, [x8, _INTEL_GET_VENDOR_VERB@GOTPAGEOFF]
Lloh4:
	ldr	w3, [x8]
	mov	w2, #0
	mov	w4, #0
	bl	_snd_hda_codec_read
	cmn	w0, #1
	b.eq	LBB0_2
; %bb.1:
Lloh5:
	adrp	x8, _INTEL_EN_DP12@GOTPAGE
Lloh6:
	ldr	x8, [x8, _INTEL_EN_DP12@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_3
LBB0_2:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_3:
	orr	w4, w8, w0
	ldr	w1, [x20]
Lloh8:
	adrp	x8, _INTEL_SET_VENDOR_VERB@GOTPAGE
Lloh9:
	ldr	x8, [x8, _INTEL_SET_VENDOR_VERB@GOTPAGEOFF]
Lloh10:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w2, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_snd_hda_codec_write_cache
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_VENDOR_NID,4,2           ; @INTEL_VENDOR_NID
	.comm	_INTEL_GET_VENDOR_VERB,4,2      ; @INTEL_GET_VENDOR_VERB
	.comm	_INTEL_EN_DP12,4,2              ; @INTEL_EN_DP12
	.comm	_INTEL_SET_VENDOR_VERB,4,2      ; @INTEL_SET_VENDOR_VERB
	.no_dead_strip	_intel_haswell_fixup_enable_dp12
.subsections_via_symbols
