	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_print_mips_disassembler_options ## -- Begin function print_mips_disassembler_options
	.p2align	4, 0x90
_print_mips_disassembler_options:       ## @print_mips_disassembler_options
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	leaq	L_.str(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	leaq	L_.str.1(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	leaq	L_.str.2(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	leaq	L_.str.3(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	leaq	L_.str.4(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	leaq	L_.str.5(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	leaq	L_.str.6(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	leaq	L_.str.7(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	leaq	L_.str.8(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	leaq	L_.str.9(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	movq	_mips_abi_choices@GOTPCREL(%rip), %r12
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	je	LBB0_3
## %bb.1:
	leaq	L_.str.10(%rip), %r14
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r12), %rax
	movq	(%rax,%rbx,8), %rdx
	movq	%r15, %rdi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	incq	%rbx
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	movl	%eax, %eax
	cmpq	%rax, %rbx
	jb	LBB0_2
LBB0_3:
	leaq	L_.str.11(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	leaq	L_.str.12(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	movq	_mips_arch_choices@GOTPCREL(%rip), %r12
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	je	LBB0_8
## %bb.4:
	leaq	L_.str.10(%rip), %r14
	xorl	%ebx, %ebx
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_5 Depth=1
	incq	%rbx
	callq	_ARRAY_SIZE
	movl	%eax, %eax
	cmpq	%rax, %rbx
	jae	LBB0_8
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r12), %rdi
	movq	(%rdi,%rbx,8), %rdx
	cmpb	$0, (%rdx)
	je	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movq	%r15, %rdi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	movq	(%r12), %rdi
	jmp	LBB0_7
LBB0_8:
	leaq	L_.str.11(%rip), %rbx
	movq	%rbx, %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	movq	%rbx, %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_fprintf                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\nThe following MIPS specific disassembler options are supported for use\nwith the -M switch (multiple options should be separated by commas):\n"

L_.str.1:                               ## @.str.1
	.asciz	"\n  octeon-useun             Disassemble Octeon unaligned load/store instructions.\n"

L_.str.2:                               ## @.str.2
	.asciz	"\n  no-octeon-useun          Disassemble mips unaligned load/store instructions.\n"

L_.str.3:                               ## @.str.3
	.asciz	"\n  gpr-names=ABI            Print GPR names according to  specified ABI.\n                           Default: based on binary being disassembled.\n"

L_.str.4:                               ## @.str.4
	.asciz	"\n  fpr-names=ABI            Print FPR names according to specified ABI.\n                           Default: numeric.\n"

L_.str.5:                               ## @.str.5
	.asciz	"\n  cp0-names=ARCH           Print CP0 register names according to\n                           specified architecture.\n                           Default: based on binary being disassembled.\n"

L_.str.6:                               ## @.str.6
	.asciz	"\n  hwr-names=ARCH           Print HWR names according to specified \n\t\t\t   architecture.\n                           Default: based on binary being disassembled.\n"

L_.str.7:                               ## @.str.7
	.asciz	"\n  reg-names=ABI            Print GPR and FPR names according to\n                           specified ABI.\n"

L_.str.8:                               ## @.str.8
	.asciz	"\n  reg-names=ARCH           Print CP0 register and HWR names according to\n                           specified architecture.\n"

L_.str.9:                               ## @.str.9
	.asciz	"\n  For the options above, the following values are supported for \"ABI\":\n   "

	.comm	_mips_abi_choices,8,3           ## @mips_abi_choices
L_.str.10:                              ## @.str.10
	.asciz	" %s"

L_.str.11:                              ## @.str.11
	.asciz	"\n"

L_.str.12:                              ## @.str.12
	.asciz	"\n  For the options above, The following values are supported for \"ARCH\":\n   "

	.comm	_mips_arch_choices,8,3          ## @mips_arch_choices
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_print_mips_disassembler_options ; -- Begin function print_mips_disassembler_options
	.p2align	2
_print_mips_disassembler_options:       ; @print_mips_disassembler_options
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh2:
	adrp	x0, l_.str.1@PAGE
Lloh3:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh4:
	adrp	x0, l_.str.2@PAGE
Lloh5:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh6:
	adrp	x0, l_.str.3@PAGE
Lloh7:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh8:
	adrp	x0, l_.str.4@PAGE
Lloh9:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh10:
	adrp	x0, l_.str.5@PAGE
Lloh11:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh12:
	adrp	x0, l_.str.6@PAGE
Lloh13:
	add	x0, x0, l_.str.6@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh14:
	adrp	x0, l_.str.7@PAGE
Lloh15:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh16:
	adrp	x0, l_.str.8@PAGE
Lloh17:
	add	x0, x0, l_.str.8@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh18:
	adrp	x0, l_.str.9@PAGE
Lloh19:
	add	x0, x0, l_.str.9@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh20:
	adrp	x21, _mips_abi_choices@GOTPAGE
Lloh21:
	ldr	x21, [x21, _mips_abi_choices@GOTPAGEOFF]
	ldr	x0, [x21]
	bl	_ARRAY_SIZE
	cbz	w0, LBB0_3
; %bb.1:
	mov	x22, #0
Lloh22:
	adrp	x20, l_.str.10@PAGE
Lloh23:
	add	x20, x20, l_.str.10@PAGEOFF
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x21]
	ldr	x8, [x8, x22, lsl #3]
	str	x8, [sp]
	mov	x0, x19
	mov	x1, x20
	bl	_fprintf
	add	x22, x22, #1
	ldr	x0, [x21]
	bl	_ARRAY_SIZE
	cmp	x22, w0, uxtw
	b.lo	LBB0_2
LBB0_3:
Lloh24:
	adrp	x0, l_.str.11@PAGE
Lloh25:
	add	x0, x0, l_.str.11@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh26:
	adrp	x0, l_.str.12@PAGE
Lloh27:
	add	x0, x0, l_.str.12@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh28:
	adrp	x21, _mips_arch_choices@GOTPAGE
Lloh29:
	ldr	x21, [x21, _mips_arch_choices@GOTPAGEOFF]
	ldr	x0, [x21]
	bl	_ARRAY_SIZE
	cbz	w0, LBB0_8
; %bb.4:
	mov	x22, #0
Lloh30:
	adrp	x20, l_.str.10@PAGE
Lloh31:
	add	x20, x20, l_.str.10@PAGEOFF
	b	LBB0_6
LBB0_5:                                 ;   in Loop: Header=BB0_6 Depth=1
	add	x22, x22, #1
	bl	_ARRAY_SIZE
	cmp	x22, w0, uxtw
	b.hs	LBB0_8
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x0, [x21]
	ldr	x8, [x0, x22, lsl #3]
	ldrb	w9, [x8]
	cbz	w9, LBB0_5
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	str	x8, [sp]
	mov	x0, x19
	mov	x1, x20
	bl	_fprintf
	ldr	x0, [x21]
	b	LBB0_5
LBB0_8:
Lloh32:
	adrp	x20, l_.str.11@PAGE
Lloh33:
	add	x20, x20, l_.str.11@PAGEOFF
	mov	x0, x20
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
	mov	x0, x20
	bl	__
	mov	x1, x0
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	b	_fprintf
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpAdd	Lloh32, Lloh33
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\nThe following MIPS specific disassembler options are supported for use\nwith the -M switch (multiple options should be separated by commas):\n"

l_.str.1:                               ; @.str.1
	.asciz	"\n  octeon-useun             Disassemble Octeon unaligned load/store instructions.\n"

l_.str.2:                               ; @.str.2
	.asciz	"\n  no-octeon-useun          Disassemble mips unaligned load/store instructions.\n"

l_.str.3:                               ; @.str.3
	.asciz	"\n  gpr-names=ABI            Print GPR names according to  specified ABI.\n                           Default: based on binary being disassembled.\n"

l_.str.4:                               ; @.str.4
	.asciz	"\n  fpr-names=ABI            Print FPR names according to specified ABI.\n                           Default: numeric.\n"

l_.str.5:                               ; @.str.5
	.asciz	"\n  cp0-names=ARCH           Print CP0 register names according to\n                           specified architecture.\n                           Default: based on binary being disassembled.\n"

l_.str.6:                               ; @.str.6
	.asciz	"\n  hwr-names=ARCH           Print HWR names according to specified \n\t\t\t   architecture.\n                           Default: based on binary being disassembled.\n"

l_.str.7:                               ; @.str.7
	.asciz	"\n  reg-names=ABI            Print GPR and FPR names according to\n                           specified ABI.\n"

l_.str.8:                               ; @.str.8
	.asciz	"\n  reg-names=ARCH           Print CP0 register and HWR names according to\n                           specified architecture.\n"

l_.str.9:                               ; @.str.9
	.asciz	"\n  For the options above, the following values are supported for \"ABI\":\n   "

	.comm	_mips_abi_choices,8,3           ; @mips_abi_choices
l_.str.10:                              ; @.str.10
	.asciz	" %s"

l_.str.11:                              ; @.str.11
	.asciz	"\n"

l_.str.12:                              ; @.str.12
	.asciz	"\n  For the options above, The following values are supported for \"ARCH\":\n   "

	.comm	_mips_arch_choices,8,3          ; @mips_arch_choices
.subsections_via_symbols
