	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function do_t_mrs
_do_t_mrs:                              ## @do_t_mrs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	xorl	%eax, %eax
	callq	_do_vfp_nsyn_mrs
	movq	_SUCCESS@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_5
## %bb.1:
	movq	_PSR_c@GOTPCREL(%rip), %rcx
	movq	_PSR_x@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	orl	(%rcx), %ebx
	movq	_PSR_s@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_inst@GOTPCREL(%rip), %r15
	movq	_PSR_f@GOTPCREL(%rip), %r12
	orl	(%r12), %ebx
	movq	8(%r15), %rax
	movq	_SPSR_BIT@GOTPCREL(%rip), %r13
	orl	(%r13), %ebx
	movq	_cpu_variant@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	andl	8(%rax), %ebx
	je	LBB0_2
## %bb.3:
	movq	_arm_ext_v1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ARM_CPU_HAS_FEATURE
	xorl	%r14d, %r14d
	testl	%eax, %eax
	sete	%r14b
	leaq	L_.str.1(%rip), %rdi
	callq	__
	movl	%r14d, %edi
	movl	%eax, %esi
	callq	_constraint
	movl	(%r13), %eax
	notl	%eax
	movl	(%r12), %ecx
	movq	_PSR_c@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	andl	%ebx, %eax
	cmpl	%ecx, %eax
	setne	%al
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_4
LBB0_2:
	movq	_arm_ext_v7m@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ARM_CPU_HAS_FEATURE
	testl	%eax, %eax
	sete	%al
	leaq	L_.str(%rip), %rdi
LBB0_4:
	movzbl	%al, %r14d
	callq	__
	movl	%r14d, %edi
	movl	%eax, %esi
	callq	_constraint
	movq	8(%r15), %rax
	movl	4(%rax), %ecx
	shll	$8, %ecx
	orl	(%r15), %ecx
	andl	(%r13), %ebx
	sarl	$2, %ebx
	movzbl	8(%rax), %eax
	orl	%ebx, %eax
	orl	%ecx, %eax
	movl	%eax, (%r15)
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SUCCESS,8,3                    ## @SUCCESS
	.comm	_inst,16,3                      ## @inst
	.comm	_PSR_c,4,2                      ## @PSR_c
	.comm	_PSR_x,4,2                      ## @PSR_x
	.comm	_PSR_s,4,2                      ## @PSR_s
	.comm	_PSR_f,4,2                      ## @PSR_f
	.comm	_SPSR_BIT,4,2                   ## @SPSR_BIT
	.comm	_cpu_variant,4,2                ## @cpu_variant
	.comm	_arm_ext_v7m,4,2                ## @arm_ext_v7m
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"selected processor does not support requested special purpose register"

	.comm	_arm_ext_v1,4,2                 ## @arm_ext_v1
L_.str.1:                               ## @.str.1
	.asciz	"selected processor does not support requested special purpose register %x"

L_.str.2:                               ## @.str.2
	.asciz	"'CPSR' or 'SPSR' expected"

	.no_dead_strip	_do_t_mrs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function do_t_mrs
_do_t_mrs:                              ; @do_t_mrs
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	bl	_do_vfp_nsyn_mrs
Lloh0:
	adrp	x8, _SUCCESS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SUCCESS@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cmp	x0, x8
	b.eq	LBB0_5
; %bb.1:
Lloh3:
	adrp	x20, _inst@GOTPAGE
Lloh4:
	ldr	x20, [x20, _inst@GOTPAGEOFF]
	ldr	x8, [x20, #8]
	ldr	w8, [x8, #8]
Lloh5:
	adrp	x23, _PSR_c@GOTPAGE
Lloh6:
	ldr	x23, [x23, _PSR_c@GOTPAGEOFF]
	ldr	w9, [x23]
Lloh7:
	adrp	x10, _PSR_x@GOTPAGE
Lloh8:
	ldr	x10, [x10, _PSR_x@GOTPAGEOFF]
Lloh9:
	ldr	w10, [x10]
	orr	w9, w10, w9
Lloh10:
	adrp	x10, _PSR_s@GOTPAGE
Lloh11:
	ldr	x10, [x10, _PSR_s@GOTPAGEOFF]
Lloh12:
	ldr	w10, [x10]
	orr	w9, w9, w10
Lloh13:
	adrp	x24, _PSR_f@GOTPAGE
Lloh14:
	ldr	x24, [x24, _PSR_f@GOTPAGEOFF]
	ldr	w10, [x24]
	orr	w9, w9, w10
Lloh15:
	adrp	x21, _SPSR_BIT@GOTPAGE
Lloh16:
	ldr	x21, [x21, _SPSR_BIT@GOTPAGEOFF]
	ldr	w10, [x21]
	orr	w9, w9, w10
Lloh17:
	adrp	x10, _cpu_variant@GOTPAGE
Lloh18:
	ldr	x10, [x10, _cpu_variant@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x10]
	ands	w22, w9, w8
	b.eq	LBB0_3
; %bb.2:
Lloh20:
	adrp	x8, _arm_ext_v1@GOTPAGE
Lloh21:
	ldr	x8, [x8, _arm_ext_v1@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	bl	_ARM_CPU_HAS_FEATURE
	cmp	w0, #0
	cset	w19, eq
Lloh23:
	adrp	x0, l_.str.1@PAGE
Lloh24:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_constraint
	ldr	w8, [x21]
	bic	w8, w22, w8
	ldr	w9, [x23]
	ldr	w10, [x24]
	orr	w9, w10, w9
	cmp	w8, w9
	cset	w19, ne
Lloh25:
	adrp	x0, l_.str.2@PAGE
Lloh26:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_4
LBB0_3:
Lloh27:
	adrp	x8, _arm_ext_v7m@GOTPAGE
Lloh28:
	ldr	x8, [x8, _arm_ext_v7m@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	bl	_ARM_CPU_HAS_FEATURE
	cmp	w0, #0
	cset	w19, eq
Lloh30:
	adrp	x0, l_.str@PAGE
Lloh31:
	add	x0, x0, l_.str@PAGEOFF
LBB0_4:
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_constraint
	ldr	x8, [x20, #8]
	ldr	w9, [x8, #4]
	ldr	w10, [x20]
	orr	w9, w10, w9, lsl #8
	ldr	w10, [x21]
	and	w10, w10, w22
	orr	w9, w9, w10, asr #2
	ldrb	w8, [x8, #8]
	orr	w8, w9, w8
	str	w8, [x20]
LBB0_5:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpAdd	Lloh25, Lloh26
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_SUCCESS,8,3                    ; @SUCCESS
	.comm	_inst,16,3                      ; @inst
	.comm	_PSR_c,4,2                      ; @PSR_c
	.comm	_PSR_x,4,2                      ; @PSR_x
	.comm	_PSR_s,4,2                      ; @PSR_s
	.comm	_PSR_f,4,2                      ; @PSR_f
	.comm	_SPSR_BIT,4,2                   ; @SPSR_BIT
	.comm	_cpu_variant,4,2                ; @cpu_variant
	.comm	_arm_ext_v7m,4,2                ; @arm_ext_v7m
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"selected processor does not support requested special purpose register"

	.comm	_arm_ext_v1,4,2                 ; @arm_ext_v1
l_.str.1:                               ; @.str.1
	.asciz	"selected processor does not support requested special purpose register %x"

l_.str.2:                               ; @.str.2
	.asciz	"'CPSR' or 'SPSR' expected"

	.no_dead_strip	_do_t_mrs
.subsections_via_symbols
