	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_md_assemble                    ## -- Begin function md_assemble
	.p2align	4, 0x90
_md_assemble:                           ## @md_assemble
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$64, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	xorl	%eax, %eax
	callq	_gas_cgen_init_parse
	movq	_md_assemble.isas(%rip), %rdi
	testq	%rdi, %rdi
	je	LBB0_1
## %bb.2:
	callq	_cgen_bitset_clear
	movq	_md_assemble.isas(%rip), %rdi
	movq	_MEP_CORE_ISA@GOTPCREL(%rip), %rsi
	movq	%rdi, %rdx
	callq	_cgen_bitset_union
	movq	_md_assemble.isas(%rip), %rdi
	jmp	LBB0_3
LBB0_1:
	movq	_MEP_CORE_ISA@GOTPCREL(%rip), %rdi
	callq	_cgen_bitset_copy
	movq	%rax, %rdi
	movq	%rax, _md_assemble.isas(%rip)
LBB0_3:
	movq	_gas_cgen_cpu_desc@GOTPCREL(%rip), %r12
	movq	(%r12), %rax
	movq	%rdi, (%rax)
	movq	_mode@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_VLIW@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_16
## %bb.4:
	movq	_MEP_COP_ISA@GOTPCREL(%rip), %rsi
	movq	%rdi, %rdx
	callq	_cgen_bitset_union
	movq	(%r12), %rdi
	leaq	-48(%rbp), %r14
	leaq	-64(%rbp), %r8
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	_mep_cgen_assemble_insn
	movq	%rax, -40(%rbp)
	testq	%rax, %rax
	je	LBB0_19
## %bb.5:
	leaq	-56(%rbp), %rdi
	callq	_mep_check_for_disabled_registers
	movq	-40(%rbp), %rdi
	callq	_MEP_INSN_COP_P
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_7
## %bb.6:
	movq	(%r12), %rdi
	movq	-56(%rbp), %rcx
	movq	-40(%rbp), %r8
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	_mep_cgen_assemble_cop_insn
	movq	%rax, -40(%rbp)
	movq	%rax, %rdi
	callq	_MEP_INSN_COP_P
	movl	%eax, %ebx
	leaq	-56(%rbp), %rdi
	callq	_mep_check_for_disabled_registers
LBB0_7:
	movq	_pluspresent@GOTPCREL(%rip), %r14
	cmpq	$0, (%r14)
	je	LBB0_13
## %bb.8:
	testl	%ebx, %ebx
	je	LBB0_9
## %bb.10:
	movq	_num_insns_saved@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	jg	LBB0_15
## %bb.11:
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_12
LBB0_16:
	movq	_pluspresent@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_18
## %bb.17:
	leaq	L_.str.3(%rip), %rdi
LBB0_12:
	callq	__
	movslq	%eax, %rdi
	xorl	%eax, %eax
	callq	_as_bad
	jmp	LBB0_20
LBB0_18:
	movq	(%r12), %rdi
	leaq	-48(%rbp), %r14
	leaq	-64(%rbp), %r8
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	_mep_cgen_assemble_insn
	movq	%rax, -40(%rbp)
	testq	%rax, %rax
	je	LBB0_19
## %bb.21:
	movq	%rax, %rbx
	movq	-56(%rbp), %r15
	movq	%r14, %rdi
	callq	_CGEN_FIELDS_BITSIZE
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movl	%eax, %edx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	_gas_cgen_finish_insn
	leaq	-56(%rbp), %rdi
	callq	_mep_check_for_disabled_registers
	jmp	LBB0_20
LBB0_19:
	movq	-64(%rbp), %rsi
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_as_bad
	jmp	LBB0_20
LBB0_13:
	movq	_num_insns_saved@GOTPCREL(%rip), %rbx
	cmpq	$0, (%rbx)
	jle	LBB0_15
## %bb.14:
	xorl	%eax, %eax
	callq	_mep_process_saved_insns
	movq	$0, (%rbx)
LBB0_15:
	movq	-40(%rbp), %rax
	movq	%rax, 16(%rsp)
	movups	-56(%rbp), %xmm0
	movups	%xmm0, (%rsp)
	callq	_mep_save_insn
	movq	$0, (%r14)
	jmp	LBB0_20
LBB0_9:
	leaq	L_.str.1(%rip), %rdi
	callq	_as_fatal
LBB0_20:
	addq	$64, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
.zerofill __DATA,__bss,_md_assemble.isas,8,3 ## @md_assemble.isas
	.comm	_MEP_CORE_ISA,4,2               ## @MEP_CORE_ISA
	.comm	_gas_cgen_cpu_desc,8,3          ## @gas_cgen_cpu_desc
	.comm	_mode,8,3                       ## @mode
	.comm	_VLIW,8,3                       ## @VLIW
	.comm	_CGEN_INT_INSN_P,4,2            ## @CGEN_INT_INSN_P
	.comm	_CGEN_MAX_INSN_SIZE,4,2         ## @CGEN_MAX_INSN_SIZE
	.comm	_MEP_COP_ISA,4,2                ## @MEP_COP_ISA
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"%s"

	.comm	_pluspresent,8,3                ## @pluspresent
L_.str.1:                               ## @.str.1
	.asciz	"A core insn cannot be preceeded by a +.\n"

	.comm	_num_insns_saved,8,3            ## @num_insns_saved
L_.str.2:                               ## @.str.2
	.asciz	"Invalid use of parallelization operator."

L_.str.3:                               ## @.str.3
	.asciz	"Leading plus sign not allowed in core mode"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_md_assemble                    ; -- Begin function md_assemble
	.p2align	2
_md_assemble:                           ; @md_assemble
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_gas_cgen_init_parse
	adrp	x20, _md_assemble.isas@PAGE
	ldr	x0, [x20, _md_assemble.isas@PAGEOFF]
	cbz	x0, LBB0_2
; %bb.1:
	bl	_cgen_bitset_clear
	ldr	x0, [x20, _md_assemble.isas@PAGEOFF]
Lloh0:
	adrp	x1, _MEP_CORE_ISA@GOTPAGE
Lloh1:
	ldr	x1, [x1, _MEP_CORE_ISA@GOTPAGEOFF]
	mov	x2, x0
	bl	_cgen_bitset_union
	ldr	x0, [x20, _md_assemble.isas@PAGEOFF]
	b	LBB0_3
LBB0_2:
Lloh2:
	adrp	x0, _MEP_CORE_ISA@GOTPAGE
Lloh3:
	ldr	x0, [x0, _MEP_CORE_ISA@GOTPAGEOFF]
	bl	_cgen_bitset_copy
	str	x0, [x20, _md_assemble.isas@PAGEOFF]
LBB0_3:
Lloh4:
	adrp	x22, _gas_cgen_cpu_desc@GOTPAGE
Lloh5:
	ldr	x22, [x22, _gas_cgen_cpu_desc@GOTPAGEOFF]
	ldr	x8, [x22]
Lloh6:
	adrp	x9, _mode@GOTPAGE
Lloh7:
	ldr	x9, [x9, _mode@GOTPAGEOFF]
	str	x0, [x8]
Lloh8:
	ldr	x8, [x9]
Lloh9:
	adrp	x9, _VLIW@GOTPAGE
Lloh10:
	ldr	x9, [x9, _VLIW@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_11
; %bb.4:
Lloh12:
	adrp	x1, _MEP_COP_ISA@GOTPAGE
Lloh13:
	ldr	x1, [x1, _MEP_COP_ISA@GOTPAGEOFF]
	mov	x2, x0
	bl	_cgen_bitset_union
	ldr	x0, [x22]
	add	x8, sp, #48
	add	x20, x8, #8
	sub	x4, x29, #40
	mov	x1, x19
	mov	x2, x20
	bl	_mep_cgen_assemble_insn
	str	x0, [sp, #64]
	cbz	x0, LBB0_16
; %bb.5:
	add	x0, sp, #48
	bl	_mep_check_for_disabled_registers
	ldr	x0, [sp, #64]
	bl	_MEP_INSN_COP_P
	mov	x21, x0
	cbnz	w0, LBB0_7
; %bb.6:
	ldr	x0, [x22]
	ldr	x3, [sp, #48]
	ldr	x4, [sp, #64]
	mov	x1, x19
	mov	x2, x20
	bl	_mep_cgen_assemble_cop_insn
	str	x0, [sp, #64]
	bl	_MEP_INSN_COP_P
	mov	x21, x0
	add	x0, sp, #48
	bl	_mep_check_for_disabled_registers
LBB0_7:
Lloh14:
	adrp	x19, _pluspresent@GOTPAGE
Lloh15:
	ldr	x19, [x19, _pluspresent@GOTPAGEOFF]
	ldr	x8, [x19]
	cbz	x8, LBB0_18
; %bb.8:
	cbz	w21, LBB0_21
; %bb.9:
Lloh16:
	adrp	x8, _num_insns_saved@GOTPAGE
Lloh17:
	ldr	x8, [x8, _num_insns_saved@GOTPAGEOFF]
Lloh18:
	ldr	x8, [x8]
	cmp	x8, #1
	b.ge	LBB0_20
; %bb.10:
Lloh19:
	adrp	x0, l_.str.2@PAGE
Lloh20:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_13
LBB0_11:
Lloh21:
	adrp	x8, _pluspresent@GOTPAGE
Lloh22:
	ldr	x8, [x8, _pluspresent@GOTPAGEOFF]
Lloh23:
	ldr	x8, [x8]
	cbz	x8, LBB0_14
; %bb.12:
Lloh24:
	adrp	x0, l_.str.3@PAGE
Lloh25:
	add	x0, x0, l_.str.3@PAGEOFF
LBB0_13:
	bl	__
                                        ; kill: def $w0 killed $w0 def $x0
	sxtw	x0, w0
	b	LBB0_17
LBB0_14:
	ldr	x0, [x22]
	add	x8, sp, #48
	add	x20, x8, #8
	sub	x4, x29, #40
	mov	x1, x19
	mov	x2, x20
	bl	_mep_cgen_assemble_insn
	str	x0, [sp, #64]
	cbz	x0, LBB0_16
; %bb.15:
	mov	x19, x0
	ldr	x21, [sp, #48]
	mov	x0, x20
	bl	_CGEN_FIELDS_BITSIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x21
	mov	w3, #1
	mov	x4, #0
	bl	_gas_cgen_finish_insn
	add	x0, sp, #48
	bl	_mep_check_for_disabled_registers
	b	LBB0_22
LBB0_16:
	ldur	x8, [x29, #-40]
	str	x8, [sp]
Lloh26:
	adrp	x0, l_.str@PAGE
Lloh27:
	add	x0, x0, l_.str@PAGEOFF
LBB0_17:
	bl	_as_bad
	b	LBB0_22
LBB0_18:
Lloh28:
	adrp	x20, _num_insns_saved@GOTPAGE
Lloh29:
	ldr	x20, [x20, _num_insns_saved@GOTPAGEOFF]
	ldr	x8, [x20]
	cmp	x8, #1
	b.lt	LBB0_20
; %bb.19:
	bl	_mep_process_saved_insns
	str	xzr, [x20]
LBB0_20:
	ldr	q0, [sp, #48]
	str	q0, [sp, #16]
	ldr	x8, [sp, #64]
	str	x8, [sp, #32]
	add	x0, sp, #16
	bl	_mep_save_insn
	str	xzr, [x19]
	b	LBB0_22
LBB0_21:
Lloh30:
	adrp	x0, l_.str.1@PAGE
Lloh31:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_as_fatal
LBB0_22:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpAdd	Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
.zerofill __DATA,__bss,_md_assemble.isas,8,3 ; @md_assemble.isas
	.comm	_MEP_CORE_ISA,4,2               ; @MEP_CORE_ISA
	.comm	_gas_cgen_cpu_desc,8,3          ; @gas_cgen_cpu_desc
	.comm	_mode,8,3                       ; @mode
	.comm	_VLIW,8,3                       ; @VLIW
	.comm	_CGEN_INT_INSN_P,4,2            ; @CGEN_INT_INSN_P
	.comm	_CGEN_MAX_INSN_SIZE,4,2         ; @CGEN_MAX_INSN_SIZE
	.comm	_MEP_COP_ISA,4,2                ; @MEP_COP_ISA
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"%s"

	.comm	_pluspresent,8,3                ; @pluspresent
l_.str.1:                               ; @.str.1
	.asciz	"A core insn cannot be preceeded by a +.\n"

	.comm	_num_insns_saved,8,3            ; @num_insns_saved
l_.str.2:                               ; @.str.2
	.asciz	"Invalid use of parallelization operator."

l_.str.3:                               ; @.str.3
	.asciz	"Leading plus sign not allowed in core mode"

.subsections_via_symbols
