	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function spu_elf_bfd_to_reloc_type
_spu_elf_bfd_to_reloc_type:             ## @spu_elf_bfd_to_reloc_type
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	addl	$-128, %edi
	cmpl	$15, %edi
	ja	LBB0_1
## %bb.2:
	movslq	%edi, %rax
	leaq	l_switch.table.spu_elf_bfd_to_reloc_type(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_R_SPU_NONE@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_R_SPU_NONE,4,2                 ## @R_SPU_NONE
	.comm	_R_SPU_ADDR10,4,2               ## @R_SPU_ADDR10
	.comm	_R_SPU_ADDR16,4,2               ## @R_SPU_ADDR16
	.comm	_R_SPU_ADDR16_LO,4,2            ## @R_SPU_ADDR16_LO
	.comm	_R_SPU_ADDR16_HI,4,2            ## @R_SPU_ADDR16_HI
	.comm	_R_SPU_ADDR18,4,2               ## @R_SPU_ADDR18
	.comm	_R_SPU_REL16,4,2                ## @R_SPU_REL16
	.comm	_R_SPU_ADDR7,4,2                ## @R_SPU_ADDR7
	.comm	_R_SPU_REL9,4,2                 ## @R_SPU_REL9
	.comm	_R_SPU_REL9I,4,2                ## @R_SPU_REL9I
	.comm	_R_SPU_ADDR10I,4,2              ## @R_SPU_ADDR10I
	.comm	_R_SPU_ADDR16I,4,2              ## @R_SPU_ADDR16I
	.comm	_R_SPU_ADDR32,4,2               ## @R_SPU_ADDR32
	.comm	_R_SPU_REL32,4,2                ## @R_SPU_REL32
	.comm	_R_SPU_PPU32,4,2                ## @R_SPU_PPU32
	.comm	_R_SPU_PPU64,4,2                ## @R_SPU_PPU64
	.no_dead_strip	_spu_elf_bfd_to_reloc_type
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.spu_elf_bfd_to_reloc_type
l_switch.table.spu_elf_bfd_to_reloc_type:
	.quad	_R_SPU_PPU64
	.quad	_R_SPU_PPU32
	.quad	_R_SPU_REL9I
	.quad	_R_SPU_REL9
	.quad	_R_SPU_REL16
	.quad	_R_SPU_ADDR16_LO
	.quad	_R_SPU_NONE
	.quad	_R_SPU_ADDR7
	.quad	_R_SPU_ADDR18
	.quad	_R_SPU_ADDR16
	.quad	_R_SPU_ADDR16I
	.quad	_R_SPU_ADDR10
	.quad	_R_SPU_ADDR10I
	.quad	_R_SPU_ADDR16_HI
	.quad	_R_SPU_REL32
	.quad	_R_SPU_ADDR32

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function spu_elf_bfd_to_reloc_type
_spu_elf_bfd_to_reloc_type:             ; @spu_elf_bfd_to_reloc_type
	.cfi_startproc
; %bb.0:
	sub	w8, w0, #128
	cmp	w8, #15
	b.hi	LBB0_2
; %bb.1:
Lloh0:
	adrp	x9, l_switch.table.spu_elf_bfd_to_reloc_type@PAGE
Lloh1:
	add	x9, x9, l_switch.table.spu_elf_bfd_to_reloc_type@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	ldr	w0, [x8]
	ret
LBB0_2:
Lloh2:
	adrp	x8, _R_SPU_NONE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _R_SPU_NONE@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_R_SPU_NONE,4,2                 ; @R_SPU_NONE
	.comm	_R_SPU_ADDR10,4,2               ; @R_SPU_ADDR10
	.comm	_R_SPU_ADDR16,4,2               ; @R_SPU_ADDR16
	.comm	_R_SPU_ADDR16_LO,4,2            ; @R_SPU_ADDR16_LO
	.comm	_R_SPU_ADDR16_HI,4,2            ; @R_SPU_ADDR16_HI
	.comm	_R_SPU_ADDR18,4,2               ; @R_SPU_ADDR18
	.comm	_R_SPU_REL16,4,2                ; @R_SPU_REL16
	.comm	_R_SPU_ADDR7,4,2                ; @R_SPU_ADDR7
	.comm	_R_SPU_REL9,4,2                 ; @R_SPU_REL9
	.comm	_R_SPU_REL9I,4,2                ; @R_SPU_REL9I
	.comm	_R_SPU_ADDR10I,4,2              ; @R_SPU_ADDR10I
	.comm	_R_SPU_ADDR16I,4,2              ; @R_SPU_ADDR16I
	.comm	_R_SPU_ADDR32,4,2               ; @R_SPU_ADDR32
	.comm	_R_SPU_REL32,4,2                ; @R_SPU_REL32
	.comm	_R_SPU_PPU32,4,2                ; @R_SPU_PPU32
	.comm	_R_SPU_PPU64,4,2                ; @R_SPU_PPU64
	.no_dead_strip	_spu_elf_bfd_to_reloc_type
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.spu_elf_bfd_to_reloc_type
l_switch.table.spu_elf_bfd_to_reloc_type:
	.quad	_R_SPU_PPU64
	.quad	_R_SPU_PPU32
	.quad	_R_SPU_REL9I
	.quad	_R_SPU_REL9
	.quad	_R_SPU_REL16
	.quad	_R_SPU_ADDR16_LO
	.quad	_R_SPU_NONE
	.quad	_R_SPU_ADDR7
	.quad	_R_SPU_ADDR18
	.quad	_R_SPU_ADDR16
	.quad	_R_SPU_ADDR16I
	.quad	_R_SPU_ADDR10
	.quad	_R_SPU_ADDR10I
	.quad	_R_SPU_ADDR16_HI
	.quad	_R_SPU_REL32
	.quad	_R_SPU_ADDR32

.subsections_via_symbols
