	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function wm8900_set_bias_level
_wm8900_set_bias_level:                 ## @wm8900_set_bias_level
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	cmpl	$128, %esi
	je	LBB0_4
## %bb.1:
	cmpl	$131, %r14d
	je	LBB0_7
## %bb.2:
	cmpl	$130, %r14d
	jne	LBB0_9
## %bb.3:
	movq	_WM8900_REG_GPIO@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_snd_soc_read
	movl	(%r15), %esi
	movq	_WM8900_REG_GPIO_TEMP_ENA@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_snd_soc_write
	movq	_WM8900_REG_ADDCTL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_snd_soc_read
	movl	(%r15), %esi
	movq	_WM8900_REG_ADDCTL_TEMP_SD@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	%rbx, %rdi
	movl	%eax, %edx
	jmp	LBB0_8
LBB0_7:
	movq	_WM8900_REG_POWER1@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_snd_soc_read
	movl	(%r15), %esi
	movq	_WM8900_REG_POWER1_STARTUP_BIAS_ENA@GOTPCREL(%rip), %r13
	andl	(%r13), %eax
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_snd_soc_write
	movq	_WM8900_REG_ADDCTL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_WM8900_REG_ADDCTL_BIAS_SRC@GOTPCREL(%rip), %rax
	movq	_WM8900_REG_ADDCTL_VMID_SOFTST@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_snd_soc_write
	movl	(%r15), %esi
	movl	(%r13), %edx
	movq	%rbx, %rdi
	callq	_snd_soc_write
	movl	$500, %edi                      ## imm = 0x1F4
	callq	_msecs_to_jiffies
	movl	%eax, %edi
	callq	_schedule_timeout_interruptible
	movq	_WM8900_REG_HPCTL1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_snd_soc_write
	movl	(%r12), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_snd_soc_write
	movl	(%r15), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_snd_soc_write
	movq	_WM8900_REG_POWER2@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_snd_soc_write
	movq	_WM8900_REG_POWER3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_snd_soc_write
	movl	$1, %edi
	callq	_msecs_to_jiffies
	movl	%eax, %edi
	callq	_schedule_timeout_interruptible
	movl	(%r15), %esi
	movq	_WM8900_REG_POWER2_SYSCLK_ENA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	jmp	LBB0_8
LBB0_4:
	cmpl	$131, (%rbx)
	jne	LBB0_6
## %bb.5:
	movq	_WM8900_REG_POWER1@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_WM8900_REG_POWER1_STARTUP_BIAS_ENA@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	movq	%rbx, %rdi
	callq	_snd_soc_write
	movq	_WM8900_REG_ADDCTL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_WM8900_REG_ADDCTL_BIAS_SRC@GOTPCREL(%rip), %rax
	movq	_WM8900_REG_ADDCTL_VMID_SOFTST@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_snd_soc_write
	movl	(%r15), %esi
	movl	(%r13), %edx
	orl	$1, %edx
	movq	%rbx, %rdi
	callq	_snd_soc_write
	movl	$400, %edi                      ## imm = 0x190
	callq	_msecs_to_jiffies
	movl	%eax, %edi
	callq	_schedule_timeout_interruptible
	movl	(%r15), %esi
	movl	(%r13), %edx
	movq	_WM8900_REG_POWER1_BIAS_ENA@GOTPCREL(%rip), %r13
	orl	(%r13), %edx
	orl	$1, %edx
	movq	%rbx, %rdi
	callq	_snd_soc_write
	movl	(%r12), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_snd_soc_write
	movl	(%r15), %esi
	movl	(%r13), %edx
	orl	$1, %edx
	movq	%rbx, %rdi
	callq	_snd_soc_write
LBB0_6:
	movq	_WM8900_REG_POWER1@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_snd_soc_read
	movl	(%r15), %esi
	movq	_WM8900_REG_POWER1_FLL_ENA@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_WM8900_REG_POWER1_BIAS_ENA@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	orl	$1, %eax
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_snd_soc_write
	movq	_WM8900_REG_POWER2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_WM8900_REG_POWER2_SYSCLK_ENA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_snd_soc_write
	movq	_WM8900_REG_POWER3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
LBB0_8:
	callq	_snd_soc_write
LBB0_9:
	movl	%r14d, (%rbx)
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_WM8900_REG_GPIO,4,2            ## @WM8900_REG_GPIO
	.comm	_WM8900_REG_GPIO_TEMP_ENA,4,2   ## @WM8900_REG_GPIO_TEMP_ENA
	.comm	_WM8900_REG_ADDCTL,4,2          ## @WM8900_REG_ADDCTL
	.comm	_WM8900_REG_ADDCTL_TEMP_SD,4,2  ## @WM8900_REG_ADDCTL_TEMP_SD
	.comm	_WM8900_REG_POWER1,4,2          ## @WM8900_REG_POWER1
	.comm	_WM8900_REG_POWER1_STARTUP_BIAS_ENA,4,2 ## @WM8900_REG_POWER1_STARTUP_BIAS_ENA
	.comm	_WM8900_REG_ADDCTL_BIAS_SRC,4,2 ## @WM8900_REG_ADDCTL_BIAS_SRC
	.comm	_WM8900_REG_ADDCTL_VMID_SOFTST,4,2 ## @WM8900_REG_ADDCTL_VMID_SOFTST
	.comm	_WM8900_REG_POWER1_BIAS_ENA,4,2 ## @WM8900_REG_POWER1_BIAS_ENA
	.comm	_WM8900_REG_POWER1_FLL_ENA,4,2  ## @WM8900_REG_POWER1_FLL_ENA
	.comm	_WM8900_REG_POWER2,4,2          ## @WM8900_REG_POWER2
	.comm	_WM8900_REG_POWER2_SYSCLK_ENA,4,2 ## @WM8900_REG_POWER2_SYSCLK_ENA
	.comm	_WM8900_REG_POWER3,4,2          ## @WM8900_REG_POWER3
	.comm	_WM8900_REG_HPCTL1,4,2          ## @WM8900_REG_HPCTL1
	.no_dead_strip	_wm8900_set_bias_level
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function wm8900_set_bias_level
_wm8900_set_bias_level:                 ; @wm8900_set_bias_level
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
	cmp	w1, #128
	b.eq	LBB0_6
; %bb.1:
	cmp	w19, #131
	b.eq	LBB0_4
; %bb.2:
	cmp	w19, #130
	b.ne	LBB0_10
; %bb.3:
Lloh0:
	adrp	x21, _WM8900_REG_GPIO@GOTPAGE
Lloh1:
	ldr	x21, [x21, _WM8900_REG_GPIO@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_snd_soc_read
	ldr	w1, [x21]
Lloh2:
	adrp	x8, _WM8900_REG_GPIO_TEMP_ENA@GOTPAGE
Lloh3:
	ldr	x8, [x8, _WM8900_REG_GPIO_TEMP_ENA@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	orr	w2, w8, w0
	mov	x0, x20
	bl	_snd_soc_write
Lloh5:
	adrp	x21, _WM8900_REG_ADDCTL@GOTPAGE
Lloh6:
	ldr	x21, [x21, _WM8900_REG_ADDCTL@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_snd_soc_read
	ldr	w1, [x21]
Lloh7:
	adrp	x8, _WM8900_REG_ADDCTL_TEMP_SD@GOTPAGE
Lloh8:
	ldr	x8, [x8, _WM8900_REG_ADDCTL_TEMP_SD@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	orr	w2, w8, w0
	b	LBB0_5
LBB0_4:
Lloh10:
	adrp	x21, _WM8900_REG_POWER1@GOTPAGE
Lloh11:
	ldr	x21, [x21, _WM8900_REG_POWER1@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_snd_soc_read
	ldr	w1, [x21]
Lloh12:
	adrp	x22, _WM8900_REG_POWER1_STARTUP_BIAS_ENA@GOTPAGE
Lloh13:
	ldr	x22, [x22, _WM8900_REG_POWER1_STARTUP_BIAS_ENA@GOTPAGEOFF]
	ldr	w8, [x22]
	and	w2, w8, w0
	mov	x0, x20
	bl	_snd_soc_write
Lloh14:
	adrp	x23, _WM8900_REG_ADDCTL@GOTPAGE
Lloh15:
	ldr	x23, [x23, _WM8900_REG_ADDCTL@GOTPAGEOFF]
Lloh16:
	adrp	x8, _WM8900_REG_ADDCTL_BIAS_SRC@GOTPAGE
Lloh17:
	ldr	x8, [x8, _WM8900_REG_ADDCTL_BIAS_SRC@GOTPAGEOFF]
	ldr	w1, [x23]
Lloh18:
	ldr	w8, [x8]
Lloh19:
	adrp	x9, _WM8900_REG_ADDCTL_VMID_SOFTST@GOTPAGE
Lloh20:
	ldr	x9, [x9, _WM8900_REG_ADDCTL_VMID_SOFTST@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x20
	bl	_snd_soc_write
	ldr	w1, [x21]
	ldr	w2, [x22]
	mov	x0, x20
	bl	_snd_soc_write
	mov	w0, #500
	bl	_msecs_to_jiffies
	bl	_schedule_timeout_interruptible
Lloh22:
	adrp	x8, _WM8900_REG_HPCTL1@GOTPAGE
Lloh23:
	ldr	x8, [x8, _WM8900_REG_HPCTL1@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_snd_soc_write
	ldr	w1, [x23]
	mov	x0, x20
	mov	w2, #0
	bl	_snd_soc_write
	ldr	w1, [x21]
	mov	x0, x20
	mov	w2, #0
	bl	_snd_soc_write
Lloh25:
	adrp	x21, _WM8900_REG_POWER2@GOTPAGE
Lloh26:
	ldr	x21, [x21, _WM8900_REG_POWER2@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	mov	w2, #0
	bl	_snd_soc_write
Lloh27:
	adrp	x8, _WM8900_REG_POWER3@GOTPAGE
Lloh28:
	ldr	x8, [x8, _WM8900_REG_POWER3@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_snd_soc_write
	mov	w0, #1
	bl	_msecs_to_jiffies
	bl	_schedule_timeout_interruptible
	ldr	w1, [x21]
Lloh30:
	adrp	x8, _WM8900_REG_POWER2_SYSCLK_ENA@GOTPAGE
Lloh31:
	ldr	x8, [x8, _WM8900_REG_POWER2_SYSCLK_ENA@GOTPAGEOFF]
Lloh32:
	ldr	w2, [x8]
LBB0_5:
	mov	x0, x20
	b	LBB0_9
LBB0_6:
	ldr	w8, [x20]
Lloh33:
	adrp	x21, _WM8900_REG_POWER1_BIAS_ENA@GOTPAGE
Lloh34:
	ldr	x21, [x21, _WM8900_REG_POWER1_BIAS_ENA@GOTPAGEOFF]
	cmp	w8, #131
	b.ne	LBB0_8
; %bb.7:
Lloh35:
	adrp	x22, _WM8900_REG_POWER1@GOTPAGE
Lloh36:
	ldr	x22, [x22, _WM8900_REG_POWER1@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh37:
	adrp	x23, _WM8900_REG_POWER1_STARTUP_BIAS_ENA@GOTPAGE
Lloh38:
	ldr	x23, [x23, _WM8900_REG_POWER1_STARTUP_BIAS_ENA@GOTPAGEOFF]
	ldr	w2, [x23]
	mov	x0, x20
	bl	_snd_soc_write
Lloh39:
	adrp	x24, _WM8900_REG_ADDCTL@GOTPAGE
Lloh40:
	ldr	x24, [x24, _WM8900_REG_ADDCTL@GOTPAGEOFF]
Lloh41:
	adrp	x8, _WM8900_REG_ADDCTL_BIAS_SRC@GOTPAGE
Lloh42:
	ldr	x8, [x8, _WM8900_REG_ADDCTL_BIAS_SRC@GOTPAGEOFF]
	ldr	w1, [x24]
Lloh43:
	ldr	w8, [x8]
Lloh44:
	adrp	x9, _WM8900_REG_ADDCTL_VMID_SOFTST@GOTPAGE
Lloh45:
	ldr	x9, [x9, _WM8900_REG_ADDCTL_VMID_SOFTST@GOTPAGEOFF]
Lloh46:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x20
	bl	_snd_soc_write
	ldr	w1, [x22]
	ldr	w8, [x23]
	orr	w2, w8, #0x1
	mov	x0, x20
	bl	_snd_soc_write
	mov	w0, #400
	bl	_msecs_to_jiffies
	bl	_schedule_timeout_interruptible
	ldr	w1, [x22]
	ldr	w8, [x23]
	ldr	w9, [x21]
	orr	w8, w8, w9
	orr	w2, w8, #0x1
	mov	x0, x20
	bl	_snd_soc_write
	ldr	w1, [x24]
	mov	x0, x20
	mov	w2, #0
	bl	_snd_soc_write
	ldr	w1, [x22]
	ldr	w8, [x21]
	orr	w2, w8, #0x1
	mov	x0, x20
	bl	_snd_soc_write
LBB0_8:
Lloh47:
	adrp	x22, _WM8900_REG_POWER1@GOTPAGE
Lloh48:
	ldr	x22, [x22, _WM8900_REG_POWER1@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x20
	bl	_snd_soc_read
Lloh49:
	adrp	x8, _WM8900_REG_POWER1_FLL_ENA@GOTPAGE
Lloh50:
	ldr	x8, [x8, _WM8900_REG_POWER1_FLL_ENA@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh51:
	ldr	w8, [x8]
	and	w8, w8, w0
	ldr	w9, [x21]
	orr	w8, w9, w8
	orr	w2, w8, #0x1
	mov	x0, x20
	bl	_snd_soc_write
Lloh52:
	adrp	x8, _WM8900_REG_POWER2@GOTPAGE
Lloh53:
	ldr	x8, [x8, _WM8900_REG_POWER2@GOTPAGEOFF]
Lloh54:
	ldr	w1, [x8]
Lloh55:
	adrp	x8, _WM8900_REG_POWER2_SYSCLK_ENA@GOTPAGE
Lloh56:
	ldr	x8, [x8, _WM8900_REG_POWER2_SYSCLK_ENA@GOTPAGEOFF]
Lloh57:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_snd_soc_write
Lloh58:
	adrp	x8, _WM8900_REG_POWER3@GOTPAGE
Lloh59:
	ldr	x8, [x8, _WM8900_REG_POWER3@GOTPAGEOFF]
Lloh60:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #0
LBB0_9:
	bl	_snd_soc_write
LBB0_10:
	str	w19, [x20]
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGot	Lloh47, Lloh48
	.cfi_endproc
                                        ; -- End function
	.comm	_WM8900_REG_GPIO,4,2            ; @WM8900_REG_GPIO
	.comm	_WM8900_REG_GPIO_TEMP_ENA,4,2   ; @WM8900_REG_GPIO_TEMP_ENA
	.comm	_WM8900_REG_ADDCTL,4,2          ; @WM8900_REG_ADDCTL
	.comm	_WM8900_REG_ADDCTL_TEMP_SD,4,2  ; @WM8900_REG_ADDCTL_TEMP_SD
	.comm	_WM8900_REG_POWER1,4,2          ; @WM8900_REG_POWER1
	.comm	_WM8900_REG_POWER1_STARTUP_BIAS_ENA,4,2 ; @WM8900_REG_POWER1_STARTUP_BIAS_ENA
	.comm	_WM8900_REG_ADDCTL_BIAS_SRC,4,2 ; @WM8900_REG_ADDCTL_BIAS_SRC
	.comm	_WM8900_REG_ADDCTL_VMID_SOFTST,4,2 ; @WM8900_REG_ADDCTL_VMID_SOFTST
	.comm	_WM8900_REG_POWER1_BIAS_ENA,4,2 ; @WM8900_REG_POWER1_BIAS_ENA
	.comm	_WM8900_REG_POWER1_FLL_ENA,4,2  ; @WM8900_REG_POWER1_FLL_ENA
	.comm	_WM8900_REG_POWER2,4,2          ; @WM8900_REG_POWER2
	.comm	_WM8900_REG_POWER2_SYSCLK_ENA,4,2 ; @WM8900_REG_POWER2_SYSCLK_ENA
	.comm	_WM8900_REG_POWER3,4,2          ; @WM8900_REG_POWER3
	.comm	_WM8900_REG_HPCTL1,4,2          ; @WM8900_REG_HPCTL1
	.no_dead_strip	_wm8900_set_bias_level
.subsections_via_symbols
