	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mep_check_for_disabled_registers
_mep_check_for_disabled_registers:      ## @mep_check_for_disabled_registers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_allow_disabled_registers@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_1
LBB0_21:
	popq	%rbp
	retq
LBB0_1:
	movq	_target_big_endian@GOTPCREL(%rip), %rax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	cmpq	$0, (%rax)
	setne	%cl
	sete	%dl
	movq	(%rdi), %rsi
	movl	(%rsi,%rdx,4), %eax
	shll	$8, %eax
	addl	(%rsi,%rcx,4), %eax
	movl	%eax, %ecx
	orl	$2, %ecx
	andl	$-4082, %ecx                    ## imm = 0xF00E
	cmpl	$28682, %ecx                    ## imm = 0x700A
	jne	LBB0_21
## %bb.2:
	cmpb	$0, _mep_check_for_disabled_registers.initted(%rip)
	jne	LBB0_10
## %bb.3:
	movb	$1, _mep_check_for_disabled_registers.initted(%rip)
	movq	_MEP_OMASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	_CGEN_INSN_OPTIONAL_MUL_INSN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	btl	%edx, %ecx
	jb	LBB0_5
## %bb.4:
	movq	_CGEN_INSN_OPTIONAL_DIV_INSN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	btl	%edx, %ecx
	jae	LBB0_6
LBB0_5:
	movb	$1, _mep_check_for_disabled_registers.has_mul_div(%rip)
LBB0_6:
	movq	_CGEN_INSN_OPTIONAL_DEBUG_INSN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	btl	%edx, %ecx
	jae	LBB0_8
## %bb.7:
	movb	$1, _mep_check_for_disabled_registers.has_debug(%rip)
LBB0_8:
	movq	_CGEN_INSN_OPTIONAL_CP_INSN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	btl	%edx, %ecx
	jae	LBB0_10
## %bb.9:
	movb	$1, _mep_check_for_disabled_registers.has_cop(%rip)
LBB0_10:
	movl	%eax, %ecx
	shrl	$4, %ecx
	andl	$15, %ecx
	shll	$4, %eax
	andl	$16, %eax
	orl	%ecx, %eax
	cmpl	$25, %eax
	ja	LBB0_21
## %bb.11:
	movl	$61440, %ecx                    ## imm = 0xF000
	btl	%eax, %ecx
	jb	LBB0_18
## %bb.12:
	movl	$384, %ecx                      ## imm = 0x180
	btl	%eax, %ecx
	jb	LBB0_16
## %bb.13:
	movl	$50331648, %ecx                 ## imm = 0x3000000
	btl	%eax, %ecx
	jae	LBB0_21
## %bb.14:
	cmpb	$0, _mep_check_for_disabled_registers.has_debug(%rip)
	jne	LBB0_21
## %bb.15:
	leaq	L_.str.2(%rip), %rdi
	popq	%rbp
	jmp	_as_bad                         ## TAILCALL
LBB0_18:
	cmpb	$0, _mep_check_for_disabled_registers.has_cop(%rip)
	jne	LBB0_21
## %bb.19:
	leaq	L_.str.1(%rip), %rdi
	popq	%rbp
	jmp	_as_bad                         ## TAILCALL
LBB0_16:
	cmpb	$0, _mep_check_for_disabled_registers.has_mul_div(%rip)
	jne	LBB0_21
## %bb.17:
	leaq	L_.str(%rip), %rdi
	popq	%rbp
	jmp	_as_bad                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
.zerofill __DATA,__bss,_mep_check_for_disabled_registers.initted,1,2 ## @mep_check_for_disabled_registers.initted
.zerofill __DATA,__bss,_mep_check_for_disabled_registers.has_mul_div,1,2 ## @mep_check_for_disabled_registers.has_mul_div
.zerofill __DATA,__bss,_mep_check_for_disabled_registers.has_cop,1,2 ## @mep_check_for_disabled_registers.has_cop
.zerofill __DATA,__bss,_mep_check_for_disabled_registers.has_debug,1,2 ## @mep_check_for_disabled_registers.has_debug
	.comm	_allow_disabled_registers,8,3   ## @allow_disabled_registers
	.comm	_target_big_endian,8,3          ## @target_big_endian
	.comm	_MEP_OMASK,4,2                  ## @MEP_OMASK
	.comm	_CGEN_INSN_OPTIONAL_MUL_INSN,4,2 ## @CGEN_INSN_OPTIONAL_MUL_INSN
	.comm	_CGEN_INSN_OPTIONAL_DIV_INSN,4,2 ## @CGEN_INSN_OPTIONAL_DIV_INSN
	.comm	_CGEN_INSN_OPTIONAL_DEBUG_INSN,4,2 ## @CGEN_INSN_OPTIONAL_DEBUG_INSN
	.comm	_CGEN_INSN_OPTIONAL_CP_INSN,4,2 ## @CGEN_INSN_OPTIONAL_CP_INSN
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"$hi and $lo are disabled when MUL and DIV are off"

L_.str.1:                               ## @.str.1
	.asciz	"$mb0, $me0, $mb1, and $me1 are disabled when COP is off"

L_.str.2:                               ## @.str.2
	.asciz	"$dbg and $depc are disabled when DEBUG is off"

	.no_dead_strip	_mep_check_for_disabled_registers
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mep_check_for_disabled_registers
_mep_check_for_disabled_registers:      ; @mep_check_for_disabled_registers
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _allow_disabled_registers@GOTPAGE
Lloh1:
	ldr	x8, [x8, _allow_disabled_registers@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cbz	x8, LBB0_2
LBB0_1:
	ret
LBB0_2:
Lloh3:
	adrp	x8, _target_big_endian@GOTPAGE
Lloh4:
	ldr	x8, [x8, _target_big_endian@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	cmp	x8, #0
	cset	w8, ne
	cset	w9, eq
	ldr	x10, [x0]
	ldr	w9, [x10, w9, uxtw #2]
	ldr	w8, [x10, w8, uxtw #2]
	add	w8, w8, w9, lsl #8
	orr	w9, w8, #0x2
	mov	w10, #-4082
	and	w9, w9, w10
	mov	w10, #28682
	cmp	w9, w10
	b.ne	LBB0_1
; %bb.3:
	adrp	x9, _mep_check_for_disabled_registers.initted@PAGE
	ldrb	w10, [x9, _mep_check_for_disabled_registers.initted@PAGEOFF]
	tbnz	w10, #0, LBB0_11
; %bb.4:
	mov	w10, #1
Lloh6:
	adrp	x11, _MEP_OMASK@GOTPAGE
Lloh7:
	ldr	x11, [x11, _MEP_OMASK@GOTPAGEOFF]
	strb	w10, [x9, _mep_check_for_disabled_registers.initted@PAGEOFF]
Lloh8:
	ldr	w9, [x11]
Lloh9:
	adrp	x11, _CGEN_INSN_OPTIONAL_MUL_INSN@GOTPAGE
Lloh10:
	ldr	x11, [x11, _CGEN_INSN_OPTIONAL_MUL_INSN@GOTPAGEOFF]
Lloh11:
	ldr	w11, [x11]
	lsr	w11, w9, w11
	tbnz	w11, #0, LBB0_6
; %bb.5:
Lloh12:
	adrp	x11, _CGEN_INSN_OPTIONAL_DIV_INSN@GOTPAGE
Lloh13:
	ldr	x11, [x11, _CGEN_INSN_OPTIONAL_DIV_INSN@GOTPAGEOFF]
Lloh14:
	ldr	w11, [x11]
	lsr	w11, w9, w11
	tbz	w11, #0, LBB0_7
LBB0_6:
	adrp	x11, _mep_check_for_disabled_registers.has_mul_div@PAGE
	strb	w10, [x11, _mep_check_for_disabled_registers.has_mul_div@PAGEOFF]
LBB0_7:
Lloh15:
	adrp	x10, _CGEN_INSN_OPTIONAL_DEBUG_INSN@GOTPAGE
Lloh16:
	ldr	x10, [x10, _CGEN_INSN_OPTIONAL_DEBUG_INSN@GOTPAGEOFF]
Lloh17:
	ldr	w10, [x10]
	lsr	w10, w9, w10
	tbz	w10, #0, LBB0_9
; %bb.8:
	mov	w10, #1
	adrp	x11, _mep_check_for_disabled_registers.has_debug@PAGE
	strb	w10, [x11, _mep_check_for_disabled_registers.has_debug@PAGEOFF]
LBB0_9:
Lloh18:
	adrp	x10, _CGEN_INSN_OPTIONAL_CP_INSN@GOTPAGE
Lloh19:
	ldr	x10, [x10, _CGEN_INSN_OPTIONAL_CP_INSN@GOTPAGEOFF]
Lloh20:
	ldr	w10, [x10]
	lsr	w9, w9, w10
	tbz	w9, #0, LBB0_11
; %bb.10:
	mov	w9, #1
	adrp	x10, _mep_check_for_disabled_registers.has_cop@PAGE
	strb	w9, [x10, _mep_check_for_disabled_registers.has_cop@PAGEOFF]
LBB0_11:
	ubfiz	w9, w8, #4, #1
	bfxil	w9, w8, #4, #4
	cmp	w9, #25
	b.hi	LBB0_1
; %bb.12:
	mov	w8, #1
	lsl	w8, w8, w9
	tst	w8, #0xf000
	b.ne	LBB0_17
; %bb.13:
	tst	w8, #0x180
	b.ne	LBB0_19
; %bb.14:
	mov	w8, #1
	lsl	w8, w8, w9
	tst	w8, #0x3000000
	b.eq	LBB0_1
; %bb.15:
	adrp	x8, _mep_check_for_disabled_registers.has_debug@PAGE
	ldrb	w8, [x8, _mep_check_for_disabled_registers.has_debug@PAGEOFF]
	tbnz	w8, #0, LBB0_1
; %bb.16:
Lloh21:
	adrp	x0, l_.str.2@PAGE
Lloh22:
	add	x0, x0, l_.str.2@PAGEOFF
	b	_as_bad
LBB0_17:
	adrp	x8, _mep_check_for_disabled_registers.has_cop@PAGE
	ldrb	w8, [x8, _mep_check_for_disabled_registers.has_cop@PAGEOFF]
	tbnz	w8, #0, LBB0_1
; %bb.18:
Lloh23:
	adrp	x0, l_.str.1@PAGE
Lloh24:
	add	x0, x0, l_.str.1@PAGEOFF
	b	_as_bad
LBB0_19:
	adrp	x8, _mep_check_for_disabled_registers.has_mul_div@PAGE
	ldrb	w8, [x8, _mep_check_for_disabled_registers.has_mul_div@PAGEOFF]
	tbnz	w8, #0, LBB0_1
; %bb.20:
Lloh25:
	adrp	x0, l_.str@PAGE
Lloh26:
	add	x0, x0, l_.str@PAGEOFF
	b	_as_bad
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpAdd	Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
.zerofill __DATA,__bss,_mep_check_for_disabled_registers.initted,1,2 ; @mep_check_for_disabled_registers.initted
.zerofill __DATA,__bss,_mep_check_for_disabled_registers.has_mul_div,1,2 ; @mep_check_for_disabled_registers.has_mul_div
.zerofill __DATA,__bss,_mep_check_for_disabled_registers.has_cop,1,2 ; @mep_check_for_disabled_registers.has_cop
.zerofill __DATA,__bss,_mep_check_for_disabled_registers.has_debug,1,2 ; @mep_check_for_disabled_registers.has_debug
	.comm	_allow_disabled_registers,8,3   ; @allow_disabled_registers
	.comm	_target_big_endian,8,3          ; @target_big_endian
	.comm	_MEP_OMASK,4,2                  ; @MEP_OMASK
	.comm	_CGEN_INSN_OPTIONAL_MUL_INSN,4,2 ; @CGEN_INSN_OPTIONAL_MUL_INSN
	.comm	_CGEN_INSN_OPTIONAL_DIV_INSN,4,2 ; @CGEN_INSN_OPTIONAL_DIV_INSN
	.comm	_CGEN_INSN_OPTIONAL_DEBUG_INSN,4,2 ; @CGEN_INSN_OPTIONAL_DEBUG_INSN
	.comm	_CGEN_INSN_OPTIONAL_CP_INSN,4,2 ; @CGEN_INSN_OPTIONAL_CP_INSN
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"$hi and $lo are disabled when MUL and DIV are off"

l_.str.1:                               ; @.str.1
	.asciz	"$mb0, $me0, $mb1, and $me1 are disabled when COP is off"

l_.str.2:                               ; @.str.2
	.asciz	"$dbg and $depc are disabled when DEBUG is off"

	.no_dead_strip	_mep_check_for_disabled_registers
.subsections_via_symbols
