	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function get_machine_name
_get_machine_name:                      ## @get_machine_name
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%edi, %ebx
	leal	-128(%rbx), %eax
	cmpl	$102, %eax
	ja	LBB0_91
## %bb.1:
	leaq	L_.str.1(%rip), %r14
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_83:
	leaq	L_.str.82(%rip), %r14
	jmp	LBB0_92
LBB0_42:
	leaq	L_.str.41(%rip), %r14
	jmp	LBB0_92
LBB0_75:
	leaq	L_.str.74(%rip), %r14
	jmp	LBB0_92
LBB0_47:
	leaq	L_.str.46(%rip), %r14
	jmp	LBB0_92
LBB0_78:
	leaq	L_.str.77(%rip), %r14
	jmp	LBB0_92
LBB0_43:
	leaq	L_.str.42(%rip), %r14
	jmp	LBB0_92
LBB0_44:
	leaq	L_.str.43(%rip), %r14
	jmp	LBB0_92
LBB0_41:
	leaq	L_.str.40(%rip), %r14
	jmp	LBB0_92
LBB0_81:
	leaq	L_.str.80(%rip), %r14
	jmp	LBB0_92
LBB0_45:
	leaq	L_.str.44(%rip), %r14
	jmp	LBB0_92
LBB0_40:
	leaq	L_.str.39(%rip), %r14
	jmp	LBB0_92
LBB0_39:
	leaq	L_.str.38(%rip), %r14
	jmp	LBB0_92
LBB0_66:
	leaq	L_.str.65(%rip), %r14
	jmp	LBB0_92
LBB0_91:
	leaq	L_.str.90(%rip), %rdi
	callq	__
	leaq	_get_machine_name.buff(%rip), %r14
	movq	%r14, %rdi
	movl	$64, %esi
	movq	%rax, %rdx
	movl	%ebx, %ecx
	callq	_snprintf
	jmp	LBB0_92
LBB0_70:
	leaq	L_.str.69(%rip), %r14
	jmp	LBB0_92
LBB0_77:
	leaq	L_.str.76(%rip), %r14
	jmp	LBB0_92
LBB0_89:
	leaq	L_.str.88(%rip), %r14
	jmp	LBB0_92
LBB0_74:
	leaq	L_.str.73(%rip), %r14
	jmp	LBB0_92
LBB0_65:
	leaq	L_.str.64(%rip), %r14
	jmp	LBB0_92
LBB0_20:
	leaq	L_.str.19(%rip), %r14
	jmp	LBB0_92
LBB0_28:
	leaq	L_.str.27(%rip), %r14
	jmp	LBB0_92
LBB0_55:
	leaq	L_.str.54(%rip), %r14
	jmp	LBB0_92
LBB0_63:
	leaq	L_.str.62(%rip), %r14
	jmp	LBB0_92
LBB0_52:
	leaq	L_.str.51(%rip), %r14
	jmp	LBB0_92
LBB0_57:
	leaq	L_.str.56(%rip), %r14
	jmp	LBB0_92
LBB0_58:
	leaq	L_.str.57(%rip), %r14
	jmp	LBB0_92
LBB0_64:
	leaq	L_.str.63(%rip), %r14
	jmp	LBB0_92
LBB0_54:
	leaq	L_.str.53(%rip), %r14
	jmp	LBB0_92
LBB0_4:
	leaq	L_.str.3(%rip), %r14
	jmp	LBB0_92
LBB0_27:
	leaq	L_.str.26(%rip), %r14
	jmp	LBB0_92
LBB0_16:
	leaq	L_.str.15(%rip), %r14
	jmp	LBB0_92
LBB0_3:
	leaq	L_.str.2(%rip), %r14
	jmp	LBB0_92
LBB0_26:
	leaq	L_.str.25(%rip), %r14
	jmp	LBB0_92
LBB0_76:
	leaq	L_.str.75(%rip), %r14
	jmp	LBB0_92
LBB0_11:
	leaq	L_.str.10(%rip), %r14
	jmp	LBB0_92
LBB0_22:
	leaq	L_.str.21(%rip), %r14
	jmp	LBB0_92
LBB0_73:
	leaq	L_.str.72(%rip), %r14
	jmp	LBB0_92
LBB0_15:
	leaq	L_.str.14(%rip), %r14
	jmp	LBB0_92
LBB0_19:
	leaq	L_.str.18(%rip), %r14
	jmp	LBB0_92
LBB0_18:
	leaq	L_.str.17(%rip), %r14
	jmp	LBB0_92
LBB0_49:
	leaq	L_.str.48(%rip), %r14
	jmp	LBB0_92
LBB0_14:
	leaq	L_.str.13(%rip), %r14
	jmp	LBB0_92
LBB0_13:
	leaq	L_.str.12(%rip), %r14
	jmp	LBB0_92
LBB0_25:
	leaq	L_.str.24(%rip), %r14
	jmp	LBB0_92
LBB0_2:
	leaq	L_.str(%rip), %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	__                              ## TAILCALL
LBB0_87:
	leaq	L_.str.86(%rip), %r14
	jmp	LBB0_92
LBB0_51:
	leaq	L_.str.50(%rip), %r14
	jmp	LBB0_92
LBB0_50:
	leaq	L_.str.49(%rip), %r14
	jmp	LBB0_92
LBB0_85:
	leaq	L_.str.84(%rip), %r14
	jmp	LBB0_92
LBB0_71:
	leaq	L_.str.70(%rip), %r14
	jmp	LBB0_92
LBB0_48:
	leaq	L_.str.47(%rip), %r14
	jmp	LBB0_92
LBB0_35:
	leaq	L_.str.34(%rip), %r14
	jmp	LBB0_92
LBB0_12:
	leaq	L_.str.11(%rip), %r14
	jmp	LBB0_92
LBB0_10:
	leaq	L_.str.9(%rip), %r14
	jmp	LBB0_92
LBB0_53:
	leaq	L_.str.52(%rip), %r14
	jmp	LBB0_92
LBB0_23:
	leaq	L_.str.22(%rip), %r14
	jmp	LBB0_92
LBB0_84:
	leaq	L_.str.83(%rip), %r14
	jmp	LBB0_92
LBB0_68:
	leaq	L_.str.67(%rip), %r14
	jmp	LBB0_92
LBB0_82:
	leaq	L_.str.81(%rip), %r14
	jmp	LBB0_92
LBB0_34:
	leaq	L_.str.33(%rip), %r14
	jmp	LBB0_92
LBB0_72:
	leaq	L_.str.71(%rip), %r14
	jmp	LBB0_92
LBB0_33:
	leaq	L_.str.32(%rip), %r14
	jmp	LBB0_92
LBB0_31:
	leaq	L_.str.30(%rip), %r14
	jmp	LBB0_92
LBB0_30:
	leaq	L_.str.29(%rip), %r14
	jmp	LBB0_92
LBB0_32:
	leaq	L_.str.31(%rip), %r14
	jmp	LBB0_92
LBB0_56:
	leaq	L_.str.55(%rip), %r14
	jmp	LBB0_92
LBB0_21:
	leaq	L_.str.20(%rip), %r14
	jmp	LBB0_92
LBB0_69:
	leaq	L_.str.68(%rip), %r14
	jmp	LBB0_92
LBB0_80:
	leaq	L_.str.79(%rip), %r14
	jmp	LBB0_92
LBB0_90:
	leaq	L_.str.89(%rip), %r14
	jmp	LBB0_92
LBB0_46:
	leaq	L_.str.45(%rip), %r14
	jmp	LBB0_92
LBB0_79:
	leaq	L_.str.78(%rip), %r14
	jmp	LBB0_92
LBB0_67:
	leaq	L_.str.66(%rip), %r14
	jmp	LBB0_92
LBB0_36:
	leaq	L_.str.35(%rip), %r14
	jmp	LBB0_92
LBB0_86:
	leaq	L_.str.85(%rip), %r14
	jmp	LBB0_92
LBB0_24:
	leaq	L_.str.23(%rip), %r14
	jmp	LBB0_92
LBB0_29:
	leaq	L_.str.28(%rip), %r14
	jmp	LBB0_92
LBB0_88:
	leaq	L_.str.87(%rip), %r14
	jmp	LBB0_92
LBB0_38:
	leaq	L_.str.37(%rip), %r14
	jmp	LBB0_92
LBB0_17:
	leaq	L_.str.16(%rip), %r14
	jmp	LBB0_92
LBB0_7:
	leaq	L_.str.6(%rip), %r14
	jmp	LBB0_92
LBB0_9:
	leaq	L_.str.8(%rip), %r14
	jmp	LBB0_92
LBB0_6:
	leaq	L_.str.5(%rip), %r14
	jmp	LBB0_92
LBB0_59:
	leaq	L_.str.58(%rip), %r14
	jmp	LBB0_92
LBB0_37:
	leaq	L_.str.36(%rip), %r14
	jmp	LBB0_92
LBB0_60:
	leaq	L_.str.59(%rip), %r14
	jmp	LBB0_92
LBB0_61:
	leaq	L_.str.60(%rip), %r14
	jmp	LBB0_92
LBB0_62:
	leaq	L_.str.61(%rip), %r14
	jmp	LBB0_92
LBB0_8:
	leaq	L_.str.7(%rip), %r14
	jmp	LBB0_92
LBB0_5:
	leaq	L_.str.4(%rip), %r14
LBB0_92:
	movq	%r14, %rax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_70, LBB0_70-LJTI0_0
.set L0_0_set_83, LBB0_83-LJTI0_0
.set L0_0_set_77, LBB0_77-LJTI0_0
.set L0_0_set_89, LBB0_89-LJTI0_0
.set L0_0_set_74, LBB0_74-LJTI0_0
.set L0_0_set_65, LBB0_65-LJTI0_0
.set L0_0_set_42, LBB0_42-LJTI0_0
.set L0_0_set_20, LBB0_20-LJTI0_0
.set L0_0_set_28, LBB0_28-LJTI0_0
.set L0_0_set_55, LBB0_55-LJTI0_0
.set L0_0_set_63, LBB0_63-LJTI0_0
.set L0_0_set_52, LBB0_52-LJTI0_0
.set L0_0_set_57, LBB0_57-LJTI0_0
.set L0_0_set_58, LBB0_58-LJTI0_0
.set L0_0_set_64, LBB0_64-LJTI0_0
.set L0_0_set_54, LBB0_54-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_27, LBB0_27-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_26, LBB0_26-LJTI0_0
.set L0_0_set_76, LBB0_76-LJTI0_0
.set L0_0_set_75, LBB0_75-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_22, LBB0_22-LJTI0_0
.set L0_0_set_73, LBB0_73-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_19, LBB0_19-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_47, LBB0_47-LJTI0_0
.set L0_0_set_49, LBB0_49-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
.set L0_0_set_78, LBB0_78-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_25, LBB0_25-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_87, LBB0_87-LJTI0_0
.set L0_0_set_51, LBB0_51-LJTI0_0
.set L0_0_set_50, LBB0_50-LJTI0_0
.set L0_0_set_85, LBB0_85-LJTI0_0
.set L0_0_set_43, LBB0_43-LJTI0_0
.set L0_0_set_44, LBB0_44-LJTI0_0
.set L0_0_set_71, LBB0_71-LJTI0_0
.set L0_0_set_48, LBB0_48-LJTI0_0
.set L0_0_set_35, LBB0_35-LJTI0_0
.set L0_0_set_12, LBB0_12-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_53, LBB0_53-LJTI0_0
.set L0_0_set_23, LBB0_23-LJTI0_0
.set L0_0_set_41, LBB0_41-LJTI0_0
.set L0_0_set_84, LBB0_84-LJTI0_0
.set L0_0_set_92, LBB0_92-LJTI0_0
.set L0_0_set_68, LBB0_68-LJTI0_0
.set L0_0_set_82, LBB0_82-LJTI0_0
.set L0_0_set_81, LBB0_81-LJTI0_0
.set L0_0_set_34, LBB0_34-LJTI0_0
.set L0_0_set_72, LBB0_72-LJTI0_0
.set L0_0_set_33, LBB0_33-LJTI0_0
.set L0_0_set_31, LBB0_31-LJTI0_0
.set L0_0_set_30, LBB0_30-LJTI0_0
.set L0_0_set_32, LBB0_32-LJTI0_0
.set L0_0_set_56, LBB0_56-LJTI0_0
.set L0_0_set_45, LBB0_45-LJTI0_0
.set L0_0_set_21, LBB0_21-LJTI0_0
.set L0_0_set_69, LBB0_69-LJTI0_0
.set L0_0_set_80, LBB0_80-LJTI0_0
.set L0_0_set_40, LBB0_40-LJTI0_0
.set L0_0_set_39, LBB0_39-LJTI0_0
.set L0_0_set_90, LBB0_90-LJTI0_0
.set L0_0_set_46, LBB0_46-LJTI0_0
.set L0_0_set_79, LBB0_79-LJTI0_0
.set L0_0_set_67, LBB0_67-LJTI0_0
.set L0_0_set_36, LBB0_36-LJTI0_0
.set L0_0_set_86, LBB0_86-LJTI0_0
.set L0_0_set_66, LBB0_66-LJTI0_0
.set L0_0_set_24, LBB0_24-LJTI0_0
.set L0_0_set_29, LBB0_29-LJTI0_0
.set L0_0_set_88, LBB0_88-LJTI0_0
.set L0_0_set_38, LBB0_38-LJTI0_0
.set L0_0_set_17, LBB0_17-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_59, LBB0_59-LJTI0_0
.set L0_0_set_37, LBB0_37-LJTI0_0
.set L0_0_set_60, LBB0_60-LJTI0_0
.set L0_0_set_61, LBB0_61-LJTI0_0
.set L0_0_set_62, LBB0_62-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
LJTI0_0:
	.long	L0_0_set_70
	.long	L0_0_set_83
	.long	L0_0_set_83
	.long	L0_0_set_77
	.long	L0_0_set_89
	.long	L0_0_set_74
	.long	L0_0_set_65
	.long	L0_0_set_42
	.long	L0_0_set_20
	.long	L0_0_set_28
	.long	L0_0_set_55
	.long	L0_0_set_63
	.long	L0_0_set_52
	.long	L0_0_set_57
	.long	L0_0_set_58
	.long	L0_0_set_64
	.long	L0_0_set_54
	.long	L0_0_set_4
	.long	L0_0_set_27
	.long	L0_0_set_16
	.long	L0_0_set_3
	.long	L0_0_set_26
	.long	L0_0_set_76
	.long	L0_0_set_75
	.long	L0_0_set_75
	.long	L0_0_set_11
	.long	L0_0_set_22
	.long	L0_0_set_73
	.long	L0_0_set_15
	.long	L0_0_set_19
	.long	L0_0_set_18
	.long	L0_0_set_47
	.long	L0_0_set_47
	.long	L0_0_set_49
	.long	L0_0_set_14
	.long	L0_0_set_78
	.long	L0_0_set_78
	.long	L0_0_set_13
	.long	L0_0_set_25
	.long	L0_0_set_2
	.long	L0_0_set_87
	.long	L0_0_set_51
	.long	L0_0_set_50
	.long	L0_0_set_85
	.long	L0_0_set_43
	.long	L0_0_set_44
	.long	L0_0_set_71
	.long	L0_0_set_48
	.long	L0_0_set_35
	.long	L0_0_set_12
	.long	L0_0_set_10
	.long	L0_0_set_53
	.long	L0_0_set_23
	.long	L0_0_set_41
	.long	L0_0_set_84
	.long	L0_0_set_92
	.long	L0_0_set_68
	.long	L0_0_set_82
	.long	L0_0_set_81
	.long	L0_0_set_81
	.long	L0_0_set_34
	.long	L0_0_set_72
	.long	L0_0_set_33
	.long	L0_0_set_31
	.long	L0_0_set_30
	.long	L0_0_set_32
	.long	L0_0_set_56
	.long	L0_0_set_45
	.long	L0_0_set_21
	.long	L0_0_set_69
	.long	L0_0_set_80
	.long	L0_0_set_40
	.long	L0_0_set_39
	.long	L0_0_set_42
	.long	L0_0_set_43
	.long	L0_0_set_44
	.long	L0_0_set_90
	.long	L0_0_set_41
	.long	L0_0_set_46
	.long	L0_0_set_45
	.long	L0_0_set_40
	.long	L0_0_set_39
	.long	L0_0_set_79
	.long	L0_0_set_67
	.long	L0_0_set_36
	.long	L0_0_set_86
	.long	L0_0_set_66
	.long	L0_0_set_66
	.long	L0_0_set_24
	.long	L0_0_set_29
	.long	L0_0_set_88
	.long	L0_0_set_38
	.long	L0_0_set_17
	.long	L0_0_set_7
	.long	L0_0_set_9
	.long	L0_0_set_6
	.long	L0_0_set_59
	.long	L0_0_set_37
	.long	L0_0_set_60
	.long	L0_0_set_61
	.long	L0_0_set_62
	.long	L0_0_set_8
	.long	L0_0_set_5
	.end_data_region
                                        ## -- End function
.zerofill __DATA,__bss,_get_machine_name.buff,64,4 ## @get_machine_name.buff
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"None"

L_.str.1:                               ## @.str.1
	.asciz	"WE32100"

L_.str.2:                               ## @.str.2
	.asciz	"Sparc"

L_.str.3:                               ## @.str.3
	.asciz	"SPU"

L_.str.4:                               ## @.str.4
	.asciz	"Intel 80386"

L_.str.5:                               ## @.str.5
	.asciz	"MC68000"

L_.str.6:                               ## @.str.6
	.asciz	"MC88000"

L_.str.7:                               ## @.str.7
	.asciz	"Intel 80486"

L_.str.8:                               ## @.str.8
	.asciz	"Intel 80860"

L_.str.9:                               ## @.str.9
	.asciz	"MIPS R3000"

L_.str.10:                              ## @.str.10
	.asciz	"IBM System/370"

L_.str.11:                              ## @.str.11
	.asciz	"MIPS R4000 big-endian"

L_.str.12:                              ## @.str.12
	.asciz	"Sparc v9 (old)"

L_.str.13:                              ## @.str.13
	.asciz	"HPPA"

L_.str.14:                              ## @.str.14
	.asciz	"Power PC (old)"

L_.str.15:                              ## @.str.15
	.asciz	"Sparc v8+"

L_.str.16:                              ## @.str.16
	.asciz	"Intel 90860"

L_.str.17:                              ## @.str.17
	.asciz	"PowerPC"

L_.str.18:                              ## @.str.18
	.asciz	"PowerPC64"

L_.str.19:                              ## @.str.19
	.asciz	"NEC V800"

L_.str.20:                              ## @.str.20
	.asciz	"Fujitsu FR20"

L_.str.21:                              ## @.str.21
	.asciz	"TRW RH32"

L_.str.22:                              ## @.str.22
	.asciz	"MCORE"

L_.str.23:                              ## @.str.23
	.asciz	"ARM"

L_.str.24:                              ## @.str.24
	.asciz	"Digital Alpha (old)"

L_.str.25:                              ## @.str.25
	.asciz	"Renesas / SuperH SH"

L_.str.26:                              ## @.str.26
	.asciz	"Sparc v9"

L_.str.27:                              ## @.str.27
	.asciz	"Siemens Tricore"

L_.str.28:                              ## @.str.28
	.asciz	"ARC"

L_.str.29:                              ## @.str.29
	.asciz	"Renesas H8/300"

L_.str.30:                              ## @.str.30
	.asciz	"Renesas H8/300H"

L_.str.31:                              ## @.str.31
	.asciz	"Renesas H8S"

L_.str.32:                              ## @.str.32
	.asciz	"Renesas H8/500"

L_.str.33:                              ## @.str.33
	.asciz	"Intel IA-64"

L_.str.34:                              ## @.str.34
	.asciz	"Stanford MIPS-X"

L_.str.35:                              ## @.str.35
	.asciz	"Motorola Coldfire"

L_.str.36:                              ## @.str.36
	.asciz	"Motorola M68HC12"

L_.str.37:                              ## @.str.37
	.asciz	"Alpha"

L_.str.38:                              ## @.str.38
	.asciz	"d10v"

L_.str.39:                              ## @.str.39
	.asciz	"d30v"

L_.str.40:                              ## @.str.40
	.asciz	"Renesas M32R (formerly Mitsubishi M32r)"

L_.str.41:                              ## @.str.41
	.asciz	"NEC v850"

L_.str.42:                              ## @.str.42
	.asciz	"mn10300"

L_.str.43:                              ## @.str.43
	.asciz	"mn10200"

L_.str.44:                              ## @.str.44
	.asciz	"Fujitsu FR30"

L_.str.45:                              ## @.str.45
	.asciz	"Fujitsu FR-V"

L_.str.46:                              ## @.str.46
	.asciz	"picoJava"

L_.str.47:                              ## @.str.47
	.asciz	"Fujitsu Multimedia Accelerator"

L_.str.48:                              ## @.str.48
	.asciz	"Siemens PCP"

L_.str.49:                              ## @.str.49
	.asciz	"Sony nCPU embedded RISC processor"

L_.str.50:                              ## @.str.50
	.asciz	"Denso NDR1 microprocesspr"

L_.str.51:                              ## @.str.51
	.asciz	"Motorola Star*Core processor"

L_.str.52:                              ## @.str.52
	.asciz	"Toyota ME16 processor"

L_.str.53:                              ## @.str.53
	.asciz	"STMicroelectronics ST100 processor"

L_.str.54:                              ## @.str.54
	.asciz	"Advanced Logic Corp. TinyJ embedded processor"

L_.str.55:                              ## @.str.55
	.asciz	"Siemens FX66 microcontroller"

L_.str.56:                              ## @.str.56
	.asciz	"STMicroelectronics ST9+ 8/16 bit microcontroller"

L_.str.57:                              ## @.str.57
	.asciz	"STMicroelectronics ST7 8-bit microcontroller"

L_.str.58:                              ## @.str.58
	.asciz	"Motorola MC68HC16 Microcontroller"

L_.str.59:                              ## @.str.59
	.asciz	"Motorola MC68HC11 Microcontroller"

L_.str.60:                              ## @.str.60
	.asciz	"Motorola MC68HC08 Microcontroller"

L_.str.61:                              ## @.str.61
	.asciz	"Motorola MC68HC05 Microcontroller"

L_.str.62:                              ## @.str.62
	.asciz	"Silicon Graphics SVx"

L_.str.63:                              ## @.str.63
	.asciz	"STMicroelectronics ST19 8-bit microcontroller"

L_.str.64:                              ## @.str.64
	.asciz	"Digital VAX"

L_.str.65:                              ## @.str.65
	.asciz	"Atmel AVR 8-bit microcontroller"

L_.str.66:                              ## @.str.66
	.asciz	"Axis Communications 32-bit embedded processor"

L_.str.67:                              ## @.str.67
	.asciz	"Infineon Technologies 32-bit embedded cpu"

L_.str.68:                              ## @.str.68
	.asciz	"Element 14 64-bit DSP processor"

L_.str.69:                              ## @.str.69
	.asciz	"LSI Logic's 16-bit DSP processor"

L_.str.70:                              ## @.str.70
	.asciz	"Donald Knuth's educational 64-bit processor"

L_.str.71:                              ## @.str.71
	.asciz	"Harvard Universitys's machine-independent object format"

L_.str.72:                              ## @.str.72
	.asciz	"Vitesse Prism"

L_.str.73:                              ## @.str.73
	.asciz	"Advanced Micro Devices X86-64"

L_.str.74:                              ## @.str.74
	.asciz	"IBM S/390"

L_.str.75:                              ## @.str.75
	.asciz	"SUNPLUS S+Core"

L_.str.76:                              ## @.str.76
	.asciz	"Sanyo Xstormy16 CPU core"

L_.str.77:                              ## @.str.77
	.asciz	"OpenRISC"

L_.str.78:                              ## @.str.78
	.asciz	"National Semiconductor CRX microprocessor"

L_.str.79:                              ## @.str.79
	.asciz	"OpenDLX"

L_.str.80:                              ## @.str.80
	.asciz	"Ubicom IP2xxx 8-bit microcontrollers"

L_.str.81:                              ## @.str.81
	.asciz	"Vitesse IQ2000"

L_.str.82:                              ## @.str.82
	.asciz	"Tensilica Xtensa Processor"

L_.str.83:                              ## @.str.83
	.asciz	"Renesas M32c"

L_.str.84:                              ## @.str.84
	.asciz	"Morpho Techologies MT processor"

L_.str.85:                              ## @.str.85
	.asciz	"Analog Devices Blackfin"

L_.str.86:                              ## @.str.86
	.asciz	"Altera Nios"

L_.str.87:                              ## @.str.87
	.asciz	"Altera Nios II"

L_.str.88:                              ## @.str.88
	.asciz	"Infineon Technologies xc16x"

L_.str.89:                              ## @.str.89
	.asciz	"Toshiba MeP Media Engine"

L_.str.90:                              ## @.str.90
	.asciz	"<unknown>: 0x%x"

	.no_dead_strip	_get_machine_name
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function get_machine_name
_get_machine_name:                      ; @get_machine_name
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	sub	w8, w0, #128
	cmp	w8, #102
	b.hi	LBB0_15
; %bb.1:
Lloh0:
	adrp	x19, l_.str.1@PAGE
Lloh1:
	add	x19, x19, l_.str.1@PAGEOFF
Lloh2:
	adrp	x9, lJTI0_0@PAGE
Lloh3:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrh	w11, [x9, x8, lsl #1]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
Lloh4:
	adrp	x19, l_.str.82@PAGE
Lloh5:
	add	x19, x19, l_.str.82@PAGEOFF
	b	LBB0_92
LBB0_3:
Lloh6:
	adrp	x19, l_.str.41@PAGE
Lloh7:
	add	x19, x19, l_.str.41@PAGEOFF
	b	LBB0_92
LBB0_4:
Lloh8:
	adrp	x19, l_.str.74@PAGE
Lloh9:
	add	x19, x19, l_.str.74@PAGEOFF
	b	LBB0_92
LBB0_5:
Lloh10:
	adrp	x19, l_.str.46@PAGE
Lloh11:
	add	x19, x19, l_.str.46@PAGEOFF
	b	LBB0_92
LBB0_6:
Lloh12:
	adrp	x19, l_.str.77@PAGE
Lloh13:
	add	x19, x19, l_.str.77@PAGEOFF
	b	LBB0_92
LBB0_7:
Lloh14:
	adrp	x19, l_.str.42@PAGE
Lloh15:
	add	x19, x19, l_.str.42@PAGEOFF
	b	LBB0_92
LBB0_8:
Lloh16:
	adrp	x19, l_.str.43@PAGE
Lloh17:
	add	x19, x19, l_.str.43@PAGEOFF
	b	LBB0_92
LBB0_9:
Lloh18:
	adrp	x19, l_.str.40@PAGE
Lloh19:
	add	x19, x19, l_.str.40@PAGEOFF
	b	LBB0_92
LBB0_10:
Lloh20:
	adrp	x19, l_.str.80@PAGE
Lloh21:
	add	x19, x19, l_.str.80@PAGEOFF
	b	LBB0_92
LBB0_11:
Lloh22:
	adrp	x19, l_.str.44@PAGE
Lloh23:
	add	x19, x19, l_.str.44@PAGEOFF
	b	LBB0_92
LBB0_12:
Lloh24:
	adrp	x19, l_.str.39@PAGE
Lloh25:
	add	x19, x19, l_.str.39@PAGEOFF
	b	LBB0_92
LBB0_13:
Lloh26:
	adrp	x19, l_.str.38@PAGE
Lloh27:
	add	x19, x19, l_.str.38@PAGEOFF
	b	LBB0_92
LBB0_14:
Lloh28:
	adrp	x19, l_.str.65@PAGE
Lloh29:
	add	x19, x19, l_.str.65@PAGEOFF
	b	LBB0_92
LBB0_15:
	mov	x20, x0
Lloh30:
	adrp	x0, l_.str.90@PAGE
Lloh31:
	add	x0, x0, l_.str.90@PAGEOFF
	bl	__
	mov	x2, x0
Lloh32:
	adrp	x19, _get_machine_name.buff@PAGE
Lloh33:
	add	x19, x19, _get_machine_name.buff@PAGEOFF
	mov	x0, x19
	mov	w1, #64
	mov	x3, x20
	bl	_snprintf
	b	LBB0_92
LBB0_16:
Lloh34:
	adrp	x19, l_.str.69@PAGE
Lloh35:
	add	x19, x19, l_.str.69@PAGEOFF
	b	LBB0_92
LBB0_17:
Lloh36:
	adrp	x19, l_.str.76@PAGE
Lloh37:
	add	x19, x19, l_.str.76@PAGEOFF
	b	LBB0_92
LBB0_18:
Lloh38:
	adrp	x19, l_.str.88@PAGE
Lloh39:
	add	x19, x19, l_.str.88@PAGEOFF
	b	LBB0_92
LBB0_19:
Lloh40:
	adrp	x19, l_.str.73@PAGE
Lloh41:
	add	x19, x19, l_.str.73@PAGEOFF
	b	LBB0_92
LBB0_20:
Lloh42:
	adrp	x19, l_.str.64@PAGE
Lloh43:
	add	x19, x19, l_.str.64@PAGEOFF
	b	LBB0_92
LBB0_21:
Lloh44:
	adrp	x19, l_.str.19@PAGE
Lloh45:
	add	x19, x19, l_.str.19@PAGEOFF
	b	LBB0_92
LBB0_22:
Lloh46:
	adrp	x19, l_.str.27@PAGE
Lloh47:
	add	x19, x19, l_.str.27@PAGEOFF
	b	LBB0_92
LBB0_23:
Lloh48:
	adrp	x19, l_.str.54@PAGE
Lloh49:
	add	x19, x19, l_.str.54@PAGEOFF
	b	LBB0_92
LBB0_24:
Lloh50:
	adrp	x19, l_.str.62@PAGE
Lloh51:
	add	x19, x19, l_.str.62@PAGEOFF
	b	LBB0_92
LBB0_25:
Lloh52:
	adrp	x19, l_.str.51@PAGE
Lloh53:
	add	x19, x19, l_.str.51@PAGEOFF
	b	LBB0_92
LBB0_26:
Lloh54:
	adrp	x19, l_.str.56@PAGE
Lloh55:
	add	x19, x19, l_.str.56@PAGEOFF
	b	LBB0_92
LBB0_27:
Lloh56:
	adrp	x19, l_.str.57@PAGE
Lloh57:
	add	x19, x19, l_.str.57@PAGEOFF
	b	LBB0_92
LBB0_28:
Lloh58:
	adrp	x19, l_.str.63@PAGE
Lloh59:
	add	x19, x19, l_.str.63@PAGEOFF
	b	LBB0_92
LBB0_29:
Lloh60:
	adrp	x19, l_.str.53@PAGE
Lloh61:
	add	x19, x19, l_.str.53@PAGEOFF
	b	LBB0_92
LBB0_30:
Lloh62:
	adrp	x19, l_.str.3@PAGE
Lloh63:
	add	x19, x19, l_.str.3@PAGEOFF
	b	LBB0_92
LBB0_31:
Lloh64:
	adrp	x19, l_.str.26@PAGE
Lloh65:
	add	x19, x19, l_.str.26@PAGEOFF
	b	LBB0_92
LBB0_32:
Lloh66:
	adrp	x19, l_.str.15@PAGE
Lloh67:
	add	x19, x19, l_.str.15@PAGEOFF
	b	LBB0_92
LBB0_33:
Lloh68:
	adrp	x19, l_.str.2@PAGE
Lloh69:
	add	x19, x19, l_.str.2@PAGEOFF
	b	LBB0_92
LBB0_34:
Lloh70:
	adrp	x19, l_.str.25@PAGE
Lloh71:
	add	x19, x19, l_.str.25@PAGEOFF
	b	LBB0_92
LBB0_35:
Lloh72:
	adrp	x19, l_.str.75@PAGE
Lloh73:
	add	x19, x19, l_.str.75@PAGEOFF
	b	LBB0_92
LBB0_36:
Lloh74:
	adrp	x19, l_.str.10@PAGE
Lloh75:
	add	x19, x19, l_.str.10@PAGEOFF
	b	LBB0_92
LBB0_37:
Lloh76:
	adrp	x19, l_.str.21@PAGE
Lloh77:
	add	x19, x19, l_.str.21@PAGEOFF
	b	LBB0_92
LBB0_38:
Lloh78:
	adrp	x19, l_.str.72@PAGE
Lloh79:
	add	x19, x19, l_.str.72@PAGEOFF
	b	LBB0_92
LBB0_39:
Lloh80:
	adrp	x19, l_.str.14@PAGE
Lloh81:
	add	x19, x19, l_.str.14@PAGEOFF
	b	LBB0_92
LBB0_40:
Lloh82:
	adrp	x19, l_.str.18@PAGE
Lloh83:
	add	x19, x19, l_.str.18@PAGEOFF
	b	LBB0_92
LBB0_41:
Lloh84:
	adrp	x19, l_.str.17@PAGE
Lloh85:
	add	x19, x19, l_.str.17@PAGEOFF
	b	LBB0_92
LBB0_42:
Lloh86:
	adrp	x19, l_.str.48@PAGE
Lloh87:
	add	x19, x19, l_.str.48@PAGEOFF
	b	LBB0_92
LBB0_43:
Lloh88:
	adrp	x19, l_.str.13@PAGE
Lloh89:
	add	x19, x19, l_.str.13@PAGEOFF
	b	LBB0_92
LBB0_44:
Lloh90:
	adrp	x19, l_.str.12@PAGE
Lloh91:
	add	x19, x19, l_.str.12@PAGEOFF
	b	LBB0_92
LBB0_45:
Lloh92:
	adrp	x19, l_.str.24@PAGE
Lloh93:
	add	x19, x19, l_.str.24@PAGEOFF
	b	LBB0_92
LBB0_46:
Lloh94:
	adrp	x0, l_.str@PAGE
Lloh95:
	add	x0, x0, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	__
LBB0_47:
Lloh96:
	adrp	x19, l_.str.86@PAGE
Lloh97:
	add	x19, x19, l_.str.86@PAGEOFF
	b	LBB0_92
LBB0_48:
Lloh98:
	adrp	x19, l_.str.50@PAGE
Lloh99:
	add	x19, x19, l_.str.50@PAGEOFF
	b	LBB0_92
LBB0_49:
Lloh100:
	adrp	x19, l_.str.49@PAGE
Lloh101:
	add	x19, x19, l_.str.49@PAGEOFF
	b	LBB0_92
LBB0_50:
Lloh102:
	adrp	x19, l_.str.84@PAGE
Lloh103:
	add	x19, x19, l_.str.84@PAGEOFF
	b	LBB0_92
LBB0_51:
Lloh104:
	adrp	x19, l_.str.70@PAGE
Lloh105:
	add	x19, x19, l_.str.70@PAGEOFF
	b	LBB0_92
LBB0_52:
Lloh106:
	adrp	x19, l_.str.47@PAGE
Lloh107:
	add	x19, x19, l_.str.47@PAGEOFF
	b	LBB0_92
LBB0_53:
Lloh108:
	adrp	x19, l_.str.34@PAGE
Lloh109:
	add	x19, x19, l_.str.34@PAGEOFF
	b	LBB0_92
LBB0_54:
Lloh110:
	adrp	x19, l_.str.11@PAGE
Lloh111:
	add	x19, x19, l_.str.11@PAGEOFF
	b	LBB0_92
LBB0_55:
Lloh112:
	adrp	x19, l_.str.9@PAGE
Lloh113:
	add	x19, x19, l_.str.9@PAGEOFF
	b	LBB0_92
LBB0_56:
Lloh114:
	adrp	x19, l_.str.52@PAGE
Lloh115:
	add	x19, x19, l_.str.52@PAGEOFF
	b	LBB0_92
LBB0_57:
Lloh116:
	adrp	x19, l_.str.22@PAGE
Lloh117:
	add	x19, x19, l_.str.22@PAGEOFF
	b	LBB0_92
LBB0_58:
Lloh118:
	adrp	x19, l_.str.83@PAGE
Lloh119:
	add	x19, x19, l_.str.83@PAGEOFF
	b	LBB0_92
LBB0_59:
Lloh120:
	adrp	x19, l_.str.67@PAGE
Lloh121:
	add	x19, x19, l_.str.67@PAGEOFF
	b	LBB0_92
LBB0_60:
Lloh122:
	adrp	x19, l_.str.81@PAGE
Lloh123:
	add	x19, x19, l_.str.81@PAGEOFF
	b	LBB0_92
LBB0_61:
Lloh124:
	adrp	x19, l_.str.33@PAGE
Lloh125:
	add	x19, x19, l_.str.33@PAGEOFF
	b	LBB0_92
LBB0_62:
Lloh126:
	adrp	x19, l_.str.71@PAGE
Lloh127:
	add	x19, x19, l_.str.71@PAGEOFF
	b	LBB0_92
LBB0_63:
Lloh128:
	adrp	x19, l_.str.32@PAGE
Lloh129:
	add	x19, x19, l_.str.32@PAGEOFF
	b	LBB0_92
LBB0_64:
Lloh130:
	adrp	x19, l_.str.30@PAGE
Lloh131:
	add	x19, x19, l_.str.30@PAGEOFF
	b	LBB0_92
LBB0_65:
Lloh132:
	adrp	x19, l_.str.29@PAGE
Lloh133:
	add	x19, x19, l_.str.29@PAGEOFF
	b	LBB0_92
LBB0_66:
Lloh134:
	adrp	x19, l_.str.31@PAGE
Lloh135:
	add	x19, x19, l_.str.31@PAGEOFF
	b	LBB0_92
LBB0_67:
Lloh136:
	adrp	x19, l_.str.55@PAGE
Lloh137:
	add	x19, x19, l_.str.55@PAGEOFF
	b	LBB0_92
LBB0_68:
Lloh138:
	adrp	x19, l_.str.20@PAGE
Lloh139:
	add	x19, x19, l_.str.20@PAGEOFF
	b	LBB0_92
LBB0_69:
Lloh140:
	adrp	x19, l_.str.68@PAGE
Lloh141:
	add	x19, x19, l_.str.68@PAGEOFF
	b	LBB0_92
LBB0_70:
Lloh142:
	adrp	x19, l_.str.79@PAGE
Lloh143:
	add	x19, x19, l_.str.79@PAGEOFF
	b	LBB0_92
LBB0_71:
Lloh144:
	adrp	x19, l_.str.89@PAGE
Lloh145:
	add	x19, x19, l_.str.89@PAGEOFF
	b	LBB0_92
LBB0_72:
Lloh146:
	adrp	x19, l_.str.45@PAGE
Lloh147:
	add	x19, x19, l_.str.45@PAGEOFF
	b	LBB0_92
LBB0_73:
Lloh148:
	adrp	x19, l_.str.78@PAGE
Lloh149:
	add	x19, x19, l_.str.78@PAGEOFF
	b	LBB0_92
LBB0_74:
Lloh150:
	adrp	x19, l_.str.66@PAGE
Lloh151:
	add	x19, x19, l_.str.66@PAGEOFF
	b	LBB0_92
LBB0_75:
Lloh152:
	adrp	x19, l_.str.35@PAGE
Lloh153:
	add	x19, x19, l_.str.35@PAGEOFF
	b	LBB0_92
LBB0_76:
Lloh154:
	adrp	x19, l_.str.85@PAGE
Lloh155:
	add	x19, x19, l_.str.85@PAGEOFF
	b	LBB0_92
LBB0_77:
Lloh156:
	adrp	x19, l_.str.23@PAGE
Lloh157:
	add	x19, x19, l_.str.23@PAGEOFF
	b	LBB0_92
LBB0_78:
Lloh158:
	adrp	x19, l_.str.28@PAGE
Lloh159:
	add	x19, x19, l_.str.28@PAGEOFF
	b	LBB0_92
LBB0_79:
Lloh160:
	adrp	x19, l_.str.87@PAGE
Lloh161:
	add	x19, x19, l_.str.87@PAGEOFF
	b	LBB0_92
LBB0_80:
Lloh162:
	adrp	x19, l_.str.37@PAGE
Lloh163:
	add	x19, x19, l_.str.37@PAGEOFF
	b	LBB0_92
LBB0_81:
Lloh164:
	adrp	x19, l_.str.16@PAGE
Lloh165:
	add	x19, x19, l_.str.16@PAGEOFF
	b	LBB0_92
LBB0_82:
Lloh166:
	adrp	x19, l_.str.6@PAGE
Lloh167:
	add	x19, x19, l_.str.6@PAGEOFF
	b	LBB0_92
LBB0_83:
Lloh168:
	adrp	x19, l_.str.8@PAGE
Lloh169:
	add	x19, x19, l_.str.8@PAGEOFF
	b	LBB0_92
LBB0_84:
Lloh170:
	adrp	x19, l_.str.5@PAGE
Lloh171:
	add	x19, x19, l_.str.5@PAGEOFF
	b	LBB0_92
LBB0_85:
Lloh172:
	adrp	x19, l_.str.58@PAGE
Lloh173:
	add	x19, x19, l_.str.58@PAGEOFF
	b	LBB0_92
LBB0_86:
Lloh174:
	adrp	x19, l_.str.36@PAGE
Lloh175:
	add	x19, x19, l_.str.36@PAGEOFF
	b	LBB0_92
LBB0_87:
Lloh176:
	adrp	x19, l_.str.59@PAGE
Lloh177:
	add	x19, x19, l_.str.59@PAGEOFF
	b	LBB0_92
LBB0_88:
Lloh178:
	adrp	x19, l_.str.60@PAGE
Lloh179:
	add	x19, x19, l_.str.60@PAGEOFF
	b	LBB0_92
LBB0_89:
Lloh180:
	adrp	x19, l_.str.61@PAGE
Lloh181:
	add	x19, x19, l_.str.61@PAGEOFF
	b	LBB0_92
LBB0_90:
Lloh182:
	adrp	x19, l_.str.7@PAGE
Lloh183:
	add	x19, x19, l_.str.7@PAGEOFF
	b	LBB0_92
LBB0_91:
Lloh184:
	adrp	x19, l_.str.4@PAGE
Lloh185:
	add	x19, x19, l_.str.4@PAGEOFF
LBB0_92:
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpAdd	Lloh40, Lloh41
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpAdd	Lloh44, Lloh45
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpAdd	Lloh50, Lloh51
	.loh AdrpAdd	Lloh52, Lloh53
	.loh AdrpAdd	Lloh54, Lloh55
	.loh AdrpAdd	Lloh56, Lloh57
	.loh AdrpAdd	Lloh58, Lloh59
	.loh AdrpAdd	Lloh60, Lloh61
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpAdd	Lloh64, Lloh65
	.loh AdrpAdd	Lloh66, Lloh67
	.loh AdrpAdd	Lloh68, Lloh69
	.loh AdrpAdd	Lloh70, Lloh71
	.loh AdrpAdd	Lloh72, Lloh73
	.loh AdrpAdd	Lloh74, Lloh75
	.loh AdrpAdd	Lloh76, Lloh77
	.loh AdrpAdd	Lloh78, Lloh79
	.loh AdrpAdd	Lloh80, Lloh81
	.loh AdrpAdd	Lloh82, Lloh83
	.loh AdrpAdd	Lloh84, Lloh85
	.loh AdrpAdd	Lloh86, Lloh87
	.loh AdrpAdd	Lloh88, Lloh89
	.loh AdrpAdd	Lloh90, Lloh91
	.loh AdrpAdd	Lloh92, Lloh93
	.loh AdrpAdd	Lloh94, Lloh95
	.loh AdrpAdd	Lloh96, Lloh97
	.loh AdrpAdd	Lloh98, Lloh99
	.loh AdrpAdd	Lloh100, Lloh101
	.loh AdrpAdd	Lloh102, Lloh103
	.loh AdrpAdd	Lloh104, Lloh105
	.loh AdrpAdd	Lloh106, Lloh107
	.loh AdrpAdd	Lloh108, Lloh109
	.loh AdrpAdd	Lloh110, Lloh111
	.loh AdrpAdd	Lloh112, Lloh113
	.loh AdrpAdd	Lloh114, Lloh115
	.loh AdrpAdd	Lloh116, Lloh117
	.loh AdrpAdd	Lloh118, Lloh119
	.loh AdrpAdd	Lloh120, Lloh121
	.loh AdrpAdd	Lloh122, Lloh123
	.loh AdrpAdd	Lloh124, Lloh125
	.loh AdrpAdd	Lloh126, Lloh127
	.loh AdrpAdd	Lloh128, Lloh129
	.loh AdrpAdd	Lloh130, Lloh131
	.loh AdrpAdd	Lloh132, Lloh133
	.loh AdrpAdd	Lloh134, Lloh135
	.loh AdrpAdd	Lloh136, Lloh137
	.loh AdrpAdd	Lloh138, Lloh139
	.loh AdrpAdd	Lloh140, Lloh141
	.loh AdrpAdd	Lloh142, Lloh143
	.loh AdrpAdd	Lloh144, Lloh145
	.loh AdrpAdd	Lloh146, Lloh147
	.loh AdrpAdd	Lloh148, Lloh149
	.loh AdrpAdd	Lloh150, Lloh151
	.loh AdrpAdd	Lloh152, Lloh153
	.loh AdrpAdd	Lloh154, Lloh155
	.loh AdrpAdd	Lloh156, Lloh157
	.loh AdrpAdd	Lloh158, Lloh159
	.loh AdrpAdd	Lloh160, Lloh161
	.loh AdrpAdd	Lloh162, Lloh163
	.loh AdrpAdd	Lloh164, Lloh165
	.loh AdrpAdd	Lloh166, Lloh167
	.loh AdrpAdd	Lloh168, Lloh169
	.loh AdrpAdd	Lloh170, Lloh171
	.loh AdrpAdd	Lloh172, Lloh173
	.loh AdrpAdd	Lloh174, Lloh175
	.loh AdrpAdd	Lloh176, Lloh177
	.loh AdrpAdd	Lloh178, Lloh179
	.loh AdrpAdd	Lloh180, Lloh181
	.loh AdrpAdd	Lloh182, Lloh183
	.loh AdrpAdd	Lloh184, Lloh185
	.cfi_endproc
	.section	__TEXT,__const
	.p2align	1
lJTI0_0:
	.short	(LBB0_16-LBB0_2)>>2
	.short	(LBB0_2-LBB0_2)>>2
	.short	(LBB0_2-LBB0_2)>>2
	.short	(LBB0_17-LBB0_2)>>2
	.short	(LBB0_18-LBB0_2)>>2
	.short	(LBB0_19-LBB0_2)>>2
	.short	(LBB0_20-LBB0_2)>>2
	.short	(LBB0_3-LBB0_2)>>2
	.short	(LBB0_21-LBB0_2)>>2
	.short	(LBB0_22-LBB0_2)>>2
	.short	(LBB0_23-LBB0_2)>>2
	.short	(LBB0_24-LBB0_2)>>2
	.short	(LBB0_25-LBB0_2)>>2
	.short	(LBB0_26-LBB0_2)>>2
	.short	(LBB0_27-LBB0_2)>>2
	.short	(LBB0_28-LBB0_2)>>2
	.short	(LBB0_29-LBB0_2)>>2
	.short	(LBB0_30-LBB0_2)>>2
	.short	(LBB0_31-LBB0_2)>>2
	.short	(LBB0_32-LBB0_2)>>2
	.short	(LBB0_33-LBB0_2)>>2
	.short	(LBB0_34-LBB0_2)>>2
	.short	(LBB0_35-LBB0_2)>>2
	.short	(LBB0_4-LBB0_2)>>2
	.short	(LBB0_4-LBB0_2)>>2
	.short	(LBB0_36-LBB0_2)>>2
	.short	(LBB0_37-LBB0_2)>>2
	.short	(LBB0_38-LBB0_2)>>2
	.short	(LBB0_39-LBB0_2)>>2
	.short	(LBB0_40-LBB0_2)>>2
	.short	(LBB0_41-LBB0_2)>>2
	.short	(LBB0_5-LBB0_2)>>2
	.short	(LBB0_5-LBB0_2)>>2
	.short	(LBB0_42-LBB0_2)>>2
	.short	(LBB0_43-LBB0_2)>>2
	.short	(LBB0_6-LBB0_2)>>2
	.short	(LBB0_6-LBB0_2)>>2
	.short	(LBB0_44-LBB0_2)>>2
	.short	(LBB0_45-LBB0_2)>>2
	.short	(LBB0_46-LBB0_2)>>2
	.short	(LBB0_47-LBB0_2)>>2
	.short	(LBB0_48-LBB0_2)>>2
	.short	(LBB0_49-LBB0_2)>>2
	.short	(LBB0_50-LBB0_2)>>2
	.short	(LBB0_7-LBB0_2)>>2
	.short	(LBB0_8-LBB0_2)>>2
	.short	(LBB0_51-LBB0_2)>>2
	.short	(LBB0_52-LBB0_2)>>2
	.short	(LBB0_53-LBB0_2)>>2
	.short	(LBB0_54-LBB0_2)>>2
	.short	(LBB0_55-LBB0_2)>>2
	.short	(LBB0_56-LBB0_2)>>2
	.short	(LBB0_57-LBB0_2)>>2
	.short	(LBB0_9-LBB0_2)>>2
	.short	(LBB0_58-LBB0_2)>>2
	.short	(LBB0_92-LBB0_2)>>2
	.short	(LBB0_59-LBB0_2)>>2
	.short	(LBB0_60-LBB0_2)>>2
	.short	(LBB0_10-LBB0_2)>>2
	.short	(LBB0_10-LBB0_2)>>2
	.short	(LBB0_61-LBB0_2)>>2
	.short	(LBB0_62-LBB0_2)>>2
	.short	(LBB0_63-LBB0_2)>>2
	.short	(LBB0_64-LBB0_2)>>2
	.short	(LBB0_65-LBB0_2)>>2
	.short	(LBB0_66-LBB0_2)>>2
	.short	(LBB0_67-LBB0_2)>>2
	.short	(LBB0_11-LBB0_2)>>2
	.short	(LBB0_68-LBB0_2)>>2
	.short	(LBB0_69-LBB0_2)>>2
	.short	(LBB0_70-LBB0_2)>>2
	.short	(LBB0_12-LBB0_2)>>2
	.short	(LBB0_13-LBB0_2)>>2
	.short	(LBB0_3-LBB0_2)>>2
	.short	(LBB0_7-LBB0_2)>>2
	.short	(LBB0_8-LBB0_2)>>2
	.short	(LBB0_71-LBB0_2)>>2
	.short	(LBB0_9-LBB0_2)>>2
	.short	(LBB0_72-LBB0_2)>>2
	.short	(LBB0_11-LBB0_2)>>2
	.short	(LBB0_12-LBB0_2)>>2
	.short	(LBB0_13-LBB0_2)>>2
	.short	(LBB0_73-LBB0_2)>>2
	.short	(LBB0_74-LBB0_2)>>2
	.short	(LBB0_75-LBB0_2)>>2
	.short	(LBB0_76-LBB0_2)>>2
	.short	(LBB0_14-LBB0_2)>>2
	.short	(LBB0_14-LBB0_2)>>2
	.short	(LBB0_77-LBB0_2)>>2
	.short	(LBB0_78-LBB0_2)>>2
	.short	(LBB0_79-LBB0_2)>>2
	.short	(LBB0_80-LBB0_2)>>2
	.short	(LBB0_81-LBB0_2)>>2
	.short	(LBB0_82-LBB0_2)>>2
	.short	(LBB0_83-LBB0_2)>>2
	.short	(LBB0_84-LBB0_2)>>2
	.short	(LBB0_85-LBB0_2)>>2
	.short	(LBB0_86-LBB0_2)>>2
	.short	(LBB0_87-LBB0_2)>>2
	.short	(LBB0_88-LBB0_2)>>2
	.short	(LBB0_89-LBB0_2)>>2
	.short	(LBB0_90-LBB0_2)>>2
	.short	(LBB0_91-LBB0_2)>>2
                                        ; -- End function
.zerofill __DATA,__bss,_get_machine_name.buff,64,0 ; @get_machine_name.buff
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"None"

l_.str.1:                               ; @.str.1
	.asciz	"WE32100"

l_.str.2:                               ; @.str.2
	.asciz	"Sparc"

l_.str.3:                               ; @.str.3
	.asciz	"SPU"

l_.str.4:                               ; @.str.4
	.asciz	"Intel 80386"

l_.str.5:                               ; @.str.5
	.asciz	"MC68000"

l_.str.6:                               ; @.str.6
	.asciz	"MC88000"

l_.str.7:                               ; @.str.7
	.asciz	"Intel 80486"

l_.str.8:                               ; @.str.8
	.asciz	"Intel 80860"

l_.str.9:                               ; @.str.9
	.asciz	"MIPS R3000"

l_.str.10:                              ; @.str.10
	.asciz	"IBM System/370"

l_.str.11:                              ; @.str.11
	.asciz	"MIPS R4000 big-endian"

l_.str.12:                              ; @.str.12
	.asciz	"Sparc v9 (old)"

l_.str.13:                              ; @.str.13
	.asciz	"HPPA"

l_.str.14:                              ; @.str.14
	.asciz	"Power PC (old)"

l_.str.15:                              ; @.str.15
	.asciz	"Sparc v8+"

l_.str.16:                              ; @.str.16
	.asciz	"Intel 90860"

l_.str.17:                              ; @.str.17
	.asciz	"PowerPC"

l_.str.18:                              ; @.str.18
	.asciz	"PowerPC64"

l_.str.19:                              ; @.str.19
	.asciz	"NEC V800"

l_.str.20:                              ; @.str.20
	.asciz	"Fujitsu FR20"

l_.str.21:                              ; @.str.21
	.asciz	"TRW RH32"

l_.str.22:                              ; @.str.22
	.asciz	"MCORE"

l_.str.23:                              ; @.str.23
	.asciz	"ARM"

l_.str.24:                              ; @.str.24
	.asciz	"Digital Alpha (old)"

l_.str.25:                              ; @.str.25
	.asciz	"Renesas / SuperH SH"

l_.str.26:                              ; @.str.26
	.asciz	"Sparc v9"

l_.str.27:                              ; @.str.27
	.asciz	"Siemens Tricore"

l_.str.28:                              ; @.str.28
	.asciz	"ARC"

l_.str.29:                              ; @.str.29
	.asciz	"Renesas H8/300"

l_.str.30:                              ; @.str.30
	.asciz	"Renesas H8/300H"

l_.str.31:                              ; @.str.31
	.asciz	"Renesas H8S"

l_.str.32:                              ; @.str.32
	.asciz	"Renesas H8/500"

l_.str.33:                              ; @.str.33
	.asciz	"Intel IA-64"

l_.str.34:                              ; @.str.34
	.asciz	"Stanford MIPS-X"

l_.str.35:                              ; @.str.35
	.asciz	"Motorola Coldfire"

l_.str.36:                              ; @.str.36
	.asciz	"Motorola M68HC12"

l_.str.37:                              ; @.str.37
	.asciz	"Alpha"

l_.str.38:                              ; @.str.38
	.asciz	"d10v"

l_.str.39:                              ; @.str.39
	.asciz	"d30v"

l_.str.40:                              ; @.str.40
	.asciz	"Renesas M32R (formerly Mitsubishi M32r)"

l_.str.41:                              ; @.str.41
	.asciz	"NEC v850"

l_.str.42:                              ; @.str.42
	.asciz	"mn10300"

l_.str.43:                              ; @.str.43
	.asciz	"mn10200"

l_.str.44:                              ; @.str.44
	.asciz	"Fujitsu FR30"

l_.str.45:                              ; @.str.45
	.asciz	"Fujitsu FR-V"

l_.str.46:                              ; @.str.46
	.asciz	"picoJava"

l_.str.47:                              ; @.str.47
	.asciz	"Fujitsu Multimedia Accelerator"

l_.str.48:                              ; @.str.48
	.asciz	"Siemens PCP"

l_.str.49:                              ; @.str.49
	.asciz	"Sony nCPU embedded RISC processor"

l_.str.50:                              ; @.str.50
	.asciz	"Denso NDR1 microprocesspr"

l_.str.51:                              ; @.str.51
	.asciz	"Motorola Star*Core processor"

l_.str.52:                              ; @.str.52
	.asciz	"Toyota ME16 processor"

l_.str.53:                              ; @.str.53
	.asciz	"STMicroelectronics ST100 processor"

l_.str.54:                              ; @.str.54
	.asciz	"Advanced Logic Corp. TinyJ embedded processor"

l_.str.55:                              ; @.str.55
	.asciz	"Siemens FX66 microcontroller"

l_.str.56:                              ; @.str.56
	.asciz	"STMicroelectronics ST9+ 8/16 bit microcontroller"

l_.str.57:                              ; @.str.57
	.asciz	"STMicroelectronics ST7 8-bit microcontroller"

l_.str.58:                              ; @.str.58
	.asciz	"Motorola MC68HC16 Microcontroller"

l_.str.59:                              ; @.str.59
	.asciz	"Motorola MC68HC11 Microcontroller"

l_.str.60:                              ; @.str.60
	.asciz	"Motorola MC68HC08 Microcontroller"

l_.str.61:                              ; @.str.61
	.asciz	"Motorola MC68HC05 Microcontroller"

l_.str.62:                              ; @.str.62
	.asciz	"Silicon Graphics SVx"

l_.str.63:                              ; @.str.63
	.asciz	"STMicroelectronics ST19 8-bit microcontroller"

l_.str.64:                              ; @.str.64
	.asciz	"Digital VAX"

l_.str.65:                              ; @.str.65
	.asciz	"Atmel AVR 8-bit microcontroller"

l_.str.66:                              ; @.str.66
	.asciz	"Axis Communications 32-bit embedded processor"

l_.str.67:                              ; @.str.67
	.asciz	"Infineon Technologies 32-bit embedded cpu"

l_.str.68:                              ; @.str.68
	.asciz	"Element 14 64-bit DSP processor"

l_.str.69:                              ; @.str.69
	.asciz	"LSI Logic's 16-bit DSP processor"

l_.str.70:                              ; @.str.70
	.asciz	"Donald Knuth's educational 64-bit processor"

l_.str.71:                              ; @.str.71
	.asciz	"Harvard Universitys's machine-independent object format"

l_.str.72:                              ; @.str.72
	.asciz	"Vitesse Prism"

l_.str.73:                              ; @.str.73
	.asciz	"Advanced Micro Devices X86-64"

l_.str.74:                              ; @.str.74
	.asciz	"IBM S/390"

l_.str.75:                              ; @.str.75
	.asciz	"SUNPLUS S+Core"

l_.str.76:                              ; @.str.76
	.asciz	"Sanyo Xstormy16 CPU core"

l_.str.77:                              ; @.str.77
	.asciz	"OpenRISC"

l_.str.78:                              ; @.str.78
	.asciz	"National Semiconductor CRX microprocessor"

l_.str.79:                              ; @.str.79
	.asciz	"OpenDLX"

l_.str.80:                              ; @.str.80
	.asciz	"Ubicom IP2xxx 8-bit microcontrollers"

l_.str.81:                              ; @.str.81
	.asciz	"Vitesse IQ2000"

l_.str.82:                              ; @.str.82
	.asciz	"Tensilica Xtensa Processor"

l_.str.83:                              ; @.str.83
	.asciz	"Renesas M32c"

l_.str.84:                              ; @.str.84
	.asciz	"Morpho Techologies MT processor"

l_.str.85:                              ; @.str.85
	.asciz	"Analog Devices Blackfin"

l_.str.86:                              ; @.str.86
	.asciz	"Altera Nios"

l_.str.87:                              ; @.str.87
	.asciz	"Altera Nios II"

l_.str.88:                              ; @.str.88
	.asciz	"Infineon Technologies xc16x"

l_.str.89:                              ; @.str.89
	.asciz	"Toshiba MeP Media Engine"

l_.str.90:                              ; @.str.90
	.asciz	"<unknown>: 0x%x"

	.no_dead_strip	_get_machine_name
.subsections_via_symbols
