	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function wm8580_set_dai_clkdiv
_wm8580_set_dai_clkdiv:                 ## @wm8580_set_dai_clkdiv
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ebx
	movq	(%rdi), %r14
	cmpl	$135, %esi
	je	LBB0_18
## %bb.1:
	cmpl	$129, %esi
	je	LBB0_10
## %bb.2:
	cmpl	$128, %esi
	jne	LBB0_23
## %bb.3:
	movq	_WM8580_PLLB4@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_snd_soc_read
	addl	$-130, %ebx
	cmpl	$4, %ebx
	ja	LBB0_23
## %bb.4:
	movq	_WM8580_PLLB4_MCLKOUTSRC_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	andl	%ecx, %eax
	leaq	LJTI0_1(%rip), %rcx
	movslq	(%rcx,%rbx,4), %rdx
	addq	%rcx, %rdx
	jmpq	*%rdx
LBB0_5:
	movq	_WM8580_PLLB4_MCLKOUTSRC_PLLB@GOTPCREL(%rip), %rcx
	jmp	LBB0_8
LBB0_18:
	movq	_WM8580_PLLB4@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_snd_soc_read
	addl	$-130, %ebx
	cmpl	$3, %ebx
	ja	LBB0_23
## %bb.19:
	movq	_WM8580_PLLB4_CLKOUTSRC_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	andl	%ecx, %eax
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rbx,4), %rdx
	addq	%rcx, %rdx
	jmpq	*%rdx
LBB0_20:
	movq	_WM8580_PLLB4_CLKOUTSRC_PLLBCLK@GOTPCREL(%rip), %rcx
	jmp	LBB0_8
LBB0_10:
	movq	_WM8580_CLKSEL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_snd_soc_read
	movq	_WM8580_CLKSEL_DAC_CLKSEL_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	cmpl	$130, %ebx
	je	LBB0_14
## %bb.11:
	cmpl	$134, %ebx
	je	LBB0_16
## %bb.12:
	cmpl	$131, %ebx
	jne	LBB0_23
## %bb.13:
	movq	_WM8580_CLKSEL_DAC_CLKSEL_PLLA@GOTPCREL(%rip), %rax
	jmp	LBB0_15
LBB0_23:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_24
LBB0_14:
	movq	_WM8580_CLKSEL_DAC_CLKSEL_PLLB@GOTPCREL(%rip), %rax
LBB0_15:
	orl	(%rax), %edx
LBB0_16:
	movl	(%r15), %esi
	movq	%r14, %rdi
	jmp	LBB0_17
LBB0_7:
	movq	_WM8580_PLLB4_MCLKOUTSRC_PLLA@GOTPCREL(%rip), %rcx
	jmp	LBB0_8
LBB0_6:
	movq	_WM8580_PLLB4_MCLKOUTSRC_OSC@GOTPCREL(%rip), %rcx
	jmp	LBB0_8
LBB0_22:
	movq	_WM8580_PLLB4_CLKOUTSRC_PLLACLK@GOTPCREL(%rip), %rcx
	jmp	LBB0_8
LBB0_21:
	movq	_WM8580_PLLB4_CLKOUTSRC_OSCCLK@GOTPCREL(%rip), %rcx
LBB0_8:
	orl	(%rcx), %eax
LBB0_9:
	movl	(%r15), %esi
	movq	%r14, %rdi
	movl	%eax, %edx
LBB0_17:
	callq	_snd_soc_write
	xorl	%eax, %eax
LBB0_24:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_20, LBB0_20-LJTI0_0
.set L0_0_set_22, LBB0_22-LJTI0_0
.set L0_0_set_21, LBB0_21-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
LJTI0_0:
	.long	L0_0_set_20
	.long	L0_0_set_22
	.long	L0_0_set_21
	.long	L0_0_set_9
.set L0_1_set_5, LBB0_5-LJTI0_1
.set L0_1_set_7, LBB0_7-LJTI0_1
.set L0_1_set_6, LBB0_6-LJTI0_1
.set L0_1_set_23, LBB0_23-LJTI0_1
.set L0_1_set_9, LBB0_9-LJTI0_1
LJTI0_1:
	.long	L0_1_set_5
	.long	L0_1_set_7
	.long	L0_1_set_6
	.long	L0_1_set_23
	.long	L0_1_set_9
	.end_data_region
                                        ## -- End function
	.comm	_WM8580_PLLB4,4,2               ## @WM8580_PLLB4
	.comm	_WM8580_PLLB4_MCLKOUTSRC_MASK,4,2 ## @WM8580_PLLB4_MCLKOUTSRC_MASK
	.comm	_WM8580_PLLB4_MCLKOUTSRC_PLLA,4,2 ## @WM8580_PLLB4_MCLKOUTSRC_PLLA
	.comm	_WM8580_PLLB4_MCLKOUTSRC_PLLB,4,2 ## @WM8580_PLLB4_MCLKOUTSRC_PLLB
	.comm	_WM8580_PLLB4_MCLKOUTSRC_OSC,4,2 ## @WM8580_PLLB4_MCLKOUTSRC_OSC
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_WM8580_CLKSEL,4,2              ## @WM8580_CLKSEL
	.comm	_WM8580_CLKSEL_DAC_CLKSEL_MASK,4,2 ## @WM8580_CLKSEL_DAC_CLKSEL_MASK
	.comm	_WM8580_CLKSEL_DAC_CLKSEL_PLLA,4,2 ## @WM8580_CLKSEL_DAC_CLKSEL_PLLA
	.comm	_WM8580_CLKSEL_DAC_CLKSEL_PLLB,4,2 ## @WM8580_CLKSEL_DAC_CLKSEL_PLLB
	.comm	_WM8580_PLLB4_CLKOUTSRC_MASK,4,2 ## @WM8580_PLLB4_CLKOUTSRC_MASK
	.comm	_WM8580_PLLB4_CLKOUTSRC_PLLACLK,4,2 ## @WM8580_PLLB4_CLKOUTSRC_PLLACLK
	.comm	_WM8580_PLLB4_CLKOUTSRC_PLLBCLK,4,2 ## @WM8580_PLLB4_CLKOUTSRC_PLLBCLK
	.comm	_WM8580_PLLB4_CLKOUTSRC_OSCCLK,4,2 ## @WM8580_PLLB4_CLKOUTSRC_OSCCLK
	.no_dead_strip	_wm8580_set_dai_clkdiv
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function wm8580_set_dai_clkdiv
_wm8580_set_dai_clkdiv:                 ; @wm8580_set_dai_clkdiv
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	ldr	x19, [x0]
	cmp	w1, #135
	b.eq	LBB0_6
; %bb.1:
	cmp	w1, #129
	b.eq	LBB0_9
; %bb.2:
	cmp	w1, #128
	b.ne	LBB0_13
; %bb.3:
Lloh0:
	adrp	x21, _WM8580_PLLB4@GOTPAGE
Lloh1:
	ldr	x21, [x21, _WM8580_PLLB4@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_snd_soc_read
	sub	w8, w20, #130
	cmp	w8, #4
	b.hi	LBB0_13
; %bb.4:
Lloh2:
	adrp	x9, _WM8580_PLLB4_MCLKOUTSRC_MASK@GOTPAGE
Lloh3:
	ldr	x9, [x9, _WM8580_PLLB4_MCLKOUTSRC_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	bic	w2, w0, w9
Lloh5:
	adrp	x9, lJTI0_1@PAGE
Lloh6:
	add	x9, x9, lJTI0_1@PAGEOFF
	adr	x10, LBB0_5
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_5:
Lloh7:
	adrp	x8, _WM8580_PLLB4_MCLKOUTSRC_PLLB@GOTPAGE
Lloh8:
	ldr	x8, [x8, _WM8580_PLLB4_MCLKOUTSRC_PLLB@GOTPAGEOFF]
	b	LBB0_19
LBB0_6:
Lloh9:
	adrp	x21, _WM8580_PLLB4@GOTPAGE
Lloh10:
	ldr	x21, [x21, _WM8580_PLLB4@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_snd_soc_read
	sub	w8, w20, #130
	cmp	w8, #3
	b.hi	LBB0_13
; %bb.7:
Lloh11:
	adrp	x9, _WM8580_PLLB4_CLKOUTSRC_MASK@GOTPAGE
Lloh12:
	ldr	x9, [x9, _WM8580_PLLB4_CLKOUTSRC_MASK@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	bic	w2, w0, w9
Lloh14:
	adrp	x9, lJTI0_0@PAGE
Lloh15:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_8
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_8:
Lloh16:
	adrp	x8, _WM8580_PLLB4_CLKOUTSRC_PLLBCLK@GOTPAGE
Lloh17:
	ldr	x8, [x8, _WM8580_PLLB4_CLKOUTSRC_PLLBCLK@GOTPAGEOFF]
	b	LBB0_19
LBB0_9:
Lloh18:
	adrp	x21, _WM8580_CLKSEL@GOTPAGE
Lloh19:
	ldr	x21, [x21, _WM8580_CLKSEL@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_snd_soc_read
Lloh20:
	adrp	x8, _WM8580_CLKSEL_DAC_CLKSEL_MASK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _WM8580_CLKSEL_DAC_CLKSEL_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	bic	w2, w0, w8
	cmp	w20, #130
	b.eq	LBB0_14
; %bb.10:
	cmp	w20, #134
	b.eq	LBB0_20
; %bb.11:
	cmp	w20, #131
	b.ne	LBB0_13
; %bb.12:
Lloh23:
	adrp	x8, _WM8580_CLKSEL_DAC_CLKSEL_PLLA@GOTPAGE
Lloh24:
	ldr	x8, [x8, _WM8580_CLKSEL_DAC_CLKSEL_PLLA@GOTPAGEOFF]
	b	LBB0_19
LBB0_13:
Lloh25:
	adrp	x8, _EINVAL@GOTPAGE
Lloh26:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_21
LBB0_14:
Lloh28:
	adrp	x8, _WM8580_CLKSEL_DAC_CLKSEL_PLLB@GOTPAGE
Lloh29:
	ldr	x8, [x8, _WM8580_CLKSEL_DAC_CLKSEL_PLLB@GOTPAGEOFF]
	b	LBB0_19
LBB0_15:
Lloh30:
	adrp	x8, _WM8580_PLLB4_MCLKOUTSRC_PLLA@GOTPAGE
Lloh31:
	ldr	x8, [x8, _WM8580_PLLB4_MCLKOUTSRC_PLLA@GOTPAGEOFF]
	b	LBB0_19
LBB0_16:
Lloh32:
	adrp	x8, _WM8580_PLLB4_MCLKOUTSRC_OSC@GOTPAGE
Lloh33:
	ldr	x8, [x8, _WM8580_PLLB4_MCLKOUTSRC_OSC@GOTPAGEOFF]
	b	LBB0_19
LBB0_17:
Lloh34:
	adrp	x8, _WM8580_PLLB4_CLKOUTSRC_PLLACLK@GOTPAGE
Lloh35:
	ldr	x8, [x8, _WM8580_PLLB4_CLKOUTSRC_PLLACLK@GOTPAGEOFF]
	b	LBB0_19
LBB0_18:
Lloh36:
	adrp	x8, _WM8580_PLLB4_CLKOUTSRC_OSCCLK@GOTPAGE
Lloh37:
	ldr	x8, [x8, _WM8580_PLLB4_CLKOUTSRC_OSCCLK@GOTPAGEOFF]
LBB0_19:
	ldr	w8, [x8]
	orr	w2, w8, w2
LBB0_20:
	ldr	w1, [x21]
	mov	x0, x19
	bl	_snd_soc_write
	mov	w0, #0
LBB0_21:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh36, Lloh37
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_8-LBB0_8)>>2
	.byte	(LBB0_17-LBB0_8)>>2
	.byte	(LBB0_18-LBB0_8)>>2
	.byte	(LBB0_20-LBB0_8)>>2
lJTI0_1:
	.byte	(LBB0_5-LBB0_5)>>2
	.byte	(LBB0_15-LBB0_5)>>2
	.byte	(LBB0_16-LBB0_5)>>2
	.byte	(LBB0_13-LBB0_5)>>2
	.byte	(LBB0_20-LBB0_5)>>2
                                        ; -- End function
	.comm	_WM8580_PLLB4,4,2               ; @WM8580_PLLB4
	.comm	_WM8580_PLLB4_MCLKOUTSRC_MASK,4,2 ; @WM8580_PLLB4_MCLKOUTSRC_MASK
	.comm	_WM8580_PLLB4_MCLKOUTSRC_PLLA,4,2 ; @WM8580_PLLB4_MCLKOUTSRC_PLLA
	.comm	_WM8580_PLLB4_MCLKOUTSRC_PLLB,4,2 ; @WM8580_PLLB4_MCLKOUTSRC_PLLB
	.comm	_WM8580_PLLB4_MCLKOUTSRC_OSC,4,2 ; @WM8580_PLLB4_MCLKOUTSRC_OSC
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_WM8580_CLKSEL,4,2              ; @WM8580_CLKSEL
	.comm	_WM8580_CLKSEL_DAC_CLKSEL_MASK,4,2 ; @WM8580_CLKSEL_DAC_CLKSEL_MASK
	.comm	_WM8580_CLKSEL_DAC_CLKSEL_PLLA,4,2 ; @WM8580_CLKSEL_DAC_CLKSEL_PLLA
	.comm	_WM8580_CLKSEL_DAC_CLKSEL_PLLB,4,2 ; @WM8580_CLKSEL_DAC_CLKSEL_PLLB
	.comm	_WM8580_PLLB4_CLKOUTSRC_MASK,4,2 ; @WM8580_PLLB4_CLKOUTSRC_MASK
	.comm	_WM8580_PLLB4_CLKOUTSRC_PLLACLK,4,2 ; @WM8580_PLLB4_CLKOUTSRC_PLLACLK
	.comm	_WM8580_PLLB4_CLKOUTSRC_PLLBCLK,4,2 ; @WM8580_PLLB4_CLKOUTSRC_PLLBCLK
	.comm	_WM8580_PLLB4_CLKOUTSRC_OSCCLK,4,2 ; @WM8580_PLLB4_CLKOUTSRC_OSCCLK
	.no_dead_strip	_wm8580_set_dai_clkdiv
.subsections_via_symbols
