	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vr4130_swap_insns_p
_vr4130_swap_insns_p:                   ## @vr4130_swap_insns_p
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r14
	callq	_INSN_DEPEND
	testq	%rax, %rax
	je	LBB0_7
## %bb.1:
	movq	%rax, %rbx
	movq	_REG_DEP_ANTI@GOTPCREL(%rip), %r13
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_XEXP
	movq	%rax, %rbx
	testq	%rax, %rax
	je	LBB0_7
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	_REG_NOTE_KIND
	cmpq	(%r13), %rax
	jne	LBB0_6
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_XEXP
	movq	%rax, %rdi
	callq	_INSN_PRIORITY
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	_INSN_PRIORITY
	cmpq	%rax, %r12
	jle	LBB0_6
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_XEXP
	movq	%rax, %rdi
	callq	_recog_memoized
	testq	%rax, %rax
	js	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	xorl	%r12d, %r12d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_XEXP
	movq	%rax, %rdi
	callq	_get_attr_vr4130_class
	cltq
	movq	_VR4130_CLASS_ALU@GOTPCREL(%rip), %rcx
	cmpq	%rax, (%rcx)
	jne	LBB0_6
	jmp	LBB0_17
LBB0_7:
	movq	_vr4130_last_insn@GOTPCREL(%rip), %r13
	xorl	%r12d, %r12d
	cmpq	$0, (%r13)
	je	LBB0_17
## %bb.8:
	movq	%r14, %rdi
	callq	_recog_memoized
	testq	%rax, %rax
	js	LBB0_17
## %bb.9:
	movq	%r15, %rdi
	callq	_recog_memoized
	testq	%rax, %rax
	js	LBB0_17
## %bb.10:
	movq	%r14, %rdi
	callq	_get_attr_vr4130_class
	movl	%eax, %ebx
	movq	%r15, %rdi
	callq	_get_attr_vr4130_class
	movl	%ebx, %ecx
	movq	_VR4130_CLASS_ALU@GOTPCREL(%rip), %rdx
	cmpl	%eax, %ebx
	jne	LBB0_12
## %bb.11:
	cmpq	%rcx, (%rdx)
	je	LBB0_12
LBB0_16:
	xorl	%r12d, %r12d
	jmp	LBB0_17
LBB0_12:
	movq	%r14, %rdi
	movq	%rcx, %rbx
	movq	%rdx, %r14
	callq	_vr4130_true_reg_dependence_p
	movl	%eax, %r12d
	movq	%r15, %rdi
	callq	_vr4130_true_reg_dependence_p
	cmpl	%eax, %r12d
	jne	LBB0_17
## %bb.13:
	movq	%r14, %rdx
	movq	%rbx, %rcx
	cmpq	%rbx, (%r14)
	je	LBB0_16
## %bb.14:
	movq	(%r13), %rdi
	callq	_recog_memoized
	testq	%rax, %rax
	js	LBB0_16
## %bb.15:
	movq	(%r13), %rdi
	callq	_get_attr_vr4130_class
	movl	$1, %r12d
	cmpl	%eax, %ebx
	jne	LBB0_16
LBB0_17:
	movl	%r12d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_DEP_ANTI,8,3               ## @REG_DEP_ANTI
	.comm	_VR4130_CLASS_ALU,8,3           ## @VR4130_CLASS_ALU
	.comm	_vr4130_last_insn,8,3           ## @vr4130_last_insn
	.no_dead_strip	_vr4130_swap_insns_p
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vr4130_swap_insns_p
_vr4130_swap_insns_p:                   ; @vr4130_swap_insns_p
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
	bl	_INSN_DEPEND
	cbz	x0, LBB0_7
; %bb.1:
	mov	x21, x0
Lloh0:
	adrp	x23, _REG_DEP_ANTI@GOTPAGE
Lloh1:
	ldr	x23, [x23, _REG_DEP_ANTI@GOTPAGEOFF]
Lloh2:
	adrp	x24, _VR4130_CLASS_ALU@GOTPAGE
Lloh3:
	ldr	x24, [x24, _VR4130_CLASS_ALU@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	mov	x0, x21
	mov	w1, #1
	bl	_XEXP
	mov	x21, x0
	cbz	x0, LBB0_7
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x21
	bl	_REG_NOTE_KIND
	ldr	x8, [x23]
	cmp	x0, x8
	b.ne	LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	mov	x0, x21
	mov	w1, #0
	bl	_XEXP
	bl	_INSN_PRIORITY
	mov	x22, x0
	mov	x0, x19
	bl	_INSN_PRIORITY
	cmp	x22, x0
	b.le	LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	mov	x0, x21
	mov	w1, #0
	bl	_XEXP
	bl	_recog_memoized
	tbnz	x0, #63, LBB0_2
; %bb.6:                                ;   in Loop: Header=BB0_3 Depth=1
	mov	x0, x21
	mov	w1, #0
	bl	_XEXP
	bl	_get_attr_vr4130_class
	ldr	x8, [x24]
	cmp	x8, w0, sxtw
	b.ne	LBB0_2
	b	LBB0_12
LBB0_7:
Lloh4:
	adrp	x22, _vr4130_last_insn@GOTPAGE
Lloh5:
	ldr	x22, [x22, _vr4130_last_insn@GOTPAGEOFF]
	ldr	x8, [x22]
	cbz	x8, LBB0_12
; %bb.8:
	mov	x0, x20
	bl	_recog_memoized
	tbnz	x0, #63, LBB0_12
; %bb.9:
	mov	x0, x19
	bl	_recog_memoized
	tbnz	x0, #63, LBB0_12
; %bb.10:
	mov	x0, x20
	bl	_get_attr_vr4130_class
	mov	x21, x0
	mov	x0, x19
	bl	_get_attr_vr4130_class
	mov	w23, w21
Lloh6:
	adrp	x24, _VR4130_CLASS_ALU@GOTPAGE
Lloh7:
	ldr	x24, [x24, _VR4130_CLASS_ALU@GOTPAGEOFF]
	cmp	w21, w0
	b.ne	LBB0_14
; %bb.11:
	ldr	x8, [x24]
	cmp	x8, x23
	b.eq	LBB0_14
LBB0_12:
	mov	w20, #0
LBB0_13:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_14:
	mov	x0, x20
	bl	_vr4130_true_reg_dependence_p
	mov	x20, x0
	mov	x0, x19
	bl	_vr4130_true_reg_dependence_p
	cmp	w20, w0
	b.ne	LBB0_13
; %bb.15:
	ldr	x8, [x24]
	cmp	x8, x23
	b.eq	LBB0_12
; %bb.16:
	ldr	x0, [x22]
	bl	_recog_memoized
	tbnz	x0, #63, LBB0_12
; %bb.17:
	ldr	x0, [x22]
	bl	_get_attr_vr4130_class
	cmp	w23, w0
	b.ne	LBB0_12
; %bb.18:
	mov	w20, #1
	b	LBB0_13
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_DEP_ANTI,8,3               ; @REG_DEP_ANTI
	.comm	_VR4130_CLASS_ALU,8,3           ; @VR4130_CLASS_ALU
	.comm	_vr4130_last_insn,8,3           ; @vr4130_last_insn
	.no_dead_strip	_vr4130_swap_insns_p
.subsections_via_symbols
