	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ix86_expand_vector_move_misalign ## -- Begin function ix86_expand_vector_move_misalign
	.p2align	4, 0x90
_ix86_expand_vector_move_misalign:      ## @ix86_expand_vector_move_misalign
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edi, %ebx
	movl	(%rsi), %r14d
	movl	4(%rsi), %r15d
	movl	%r15d, %edi
	callq	_MEM_P
	testq	%rax, %rax
	je	LBB0_22
## %bb.1:
	movq	_optimize_size@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	jne	LBB0_2
## %bb.3:
	movq	_TARGET_SSE2@GOTPCREL(%rip), %r12
	cmpq	$0, (%r12)
	je	LBB0_15
## %bb.4:
	movl	%ebx, %edi
	callq	_GET_MODE_CLASS
	movq	_MODE_VECTOR_INT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_5
## %bb.6:
	cmpq	$0, (%r12)
	je	LBB0_15
## %bb.7:
	movq	_V2DFmode@GOTPCREL(%rip), %r12
	cmpl	%ebx, (%r12)
	jne	LBB0_15
## %bb.8:
	movq	_TARGET_SSE_UNALIGNED_MOVE_OPTIMAL@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_11
## %bb.9:
	movl	%ebx, %edi
	movl	%r14d, %esi
	callq	_gen_lowpart
	movl	%eax, %ebx
	movl	(%r12), %edi
	movl	%r15d, %esi
	callq	_gen_lowpart
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_gen_sse2_movupd
	jmp	LBB0_10
LBB0_22:
	movl	%r14d, %edi
	callq	_MEM_P
	testq	%rax, %rax
	je	LBB0_34
## %bb.23:
	movq	_optimize_size@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	jne	LBB0_2
## %bb.24:
	movq	_TARGET_SSE2@GOTPCREL(%rip), %r12
	movq	(%r12), %rax
	testq	%rax, %rax
	je	LBB0_28
## %bb.25:
	movq	_TARGET_SSE_TYPELESS_STORES@GOTPCREL(%rip), %rcx
	cmpl	$0, (%rcx)
	jne	LBB0_28
## %bb.26:
	movl	%ebx, %edi
	callq	_GET_MODE_CLASS
	movq	_MODE_VECTOR_INT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_27
LBB0_5:
	movq	_V16QImode@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movl	%r14d, %esi
	callq	_gen_lowpart
	movl	%eax, %ebx
	movl	(%r12), %edi
	movl	%r15d, %esi
	callq	_gen_lowpart
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_gen_sse2_movdqu
	jmp	LBB0_10
LBB0_34:
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_gcc_unreachable                ## TAILCALL
LBB0_15:
	movq	_TARGET_SSE_UNALIGNED_MOVE_OPTIMAL@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_16
LBB0_2:
	movq	_V4SFmode@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movl	%r14d, %esi
	callq	_gen_lowpart
	movl	%eax, %ebx
	movl	(%r12), %edi
	movl	%r15d, %esi
	callq	_gen_lowpart
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_gen_sse_movups
LBB0_10:
	movl	%eax, %edi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_emit_insn                      ## TAILCALL
LBB0_16:
	movq	_TARGET_SSE_PARTIAL_REG_DEPENDENCY@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_18
## %bb.17:
	movl	%ebx, %edi
	callq	_CONST0_RTX
	movl	%r14d, %edi
	movl	%eax, %esi
	callq	_emit_move_insn
	jmp	LBB0_19
LBB0_27:
	movq	(%r12), %rax
LBB0_28:
	testq	%rax, %rax
	je	LBB0_31
## %bb.29:
	movq	_V2DFmode@GOTPCREL(%rip), %rax
	cmpl	%ebx, (%rax)
	jne	LBB0_31
## %bb.30:
	movq	_DFmode@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movl	%r14d, %edi
	xorl	%edx, %edx
	callq	_adjust_address
	movl	%eax, %edi
	movl	%r15d, %esi
	callq	_gen_sse2_storelpd
	movl	%eax, %edi
	callq	_emit_insn
	movl	(%rbx), %esi
	movl	%r14d, %edi
	movl	$8, %edx
	callq	_adjust_address
	movl	%eax, %edi
	movl	%r15d, %esi
	callq	_gen_sse2_storehpd
	jmp	LBB0_10
LBB0_31:
	movq	_V4SFmode@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	cmpl	%ebx, %edi
	je	LBB0_33
## %bb.32:
	movl	%r15d, %esi
	callq	_gen_lowpart
	movl	%eax, %r15d
LBB0_33:
	movq	_V2SFmode@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movl	%r14d, %edi
	xorl	%edx, %edx
	callq	_adjust_address
	movl	%eax, %edi
	movl	%r15d, %esi
	callq	_gen_sse_storelps
	movl	%eax, %edi
	callq	_emit_insn
	movl	(%rbx), %esi
	movl	%r14d, %edi
	movl	$8, %edx
	callq	_adjust_address
	movl	%eax, %edi
	movl	%r15d, %esi
	callq	_gen_sse_storehps
	jmp	LBB0_10
LBB0_18:
	movq	_VOIDmode@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	callq	_gen_rtx_CLOBBER
	movl	%eax, %edi
	callq	_emit_insn
LBB0_19:
	movq	_V4SFmode@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	cmpl	%ebx, %edi
	je	LBB0_21
## %bb.20:
	movl	%r14d, %esi
	callq	_gen_lowpart
	movl	%eax, %r14d
LBB0_21:
	movq	_V2SFmode@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movl	%r15d, %edi
	xorl	%edx, %edx
	callq	_adjust_address
	movl	%r14d, %edi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_gen_sse_loadlps
	movl	%eax, %edi
	callq	_emit_insn
	movl	(%rbx), %esi
	movl	%r15d, %edi
	movl	$8, %edx
	callq	_adjust_address
	movl	%r14d, %edi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_gen_sse_loadhps
	jmp	LBB0_10
LBB0_11:
	movq	_TARGET_SSE_SPLIT_REGS@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_13
## %bb.12:
	movq	_VOIDmode@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	callq	_gen_rtx_CLOBBER
	movl	%eax, %edi
	callq	_emit_insn
	movl	%r14d, %ebx
	jmp	LBB0_14
LBB0_13:
	movl	%ebx, %edi
	callq	_CONST0_RTX
	movl	%eax, %ebx
LBB0_14:
	movq	_DFmode@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movl	%r15d, %edi
	xorl	%edx, %edx
	callq	_adjust_address
	movl	%r14d, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_gen_sse2_loadlpd
	movl	%eax, %edi
	callq	_emit_insn
	movl	(%r12), %esi
	movl	%r15d, %edi
	movl	$8, %edx
	callq	_adjust_address
	movl	%r14d, %edi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_gen_sse2_loadhpd
	jmp	LBB0_10
	.cfi_endproc
                                        ## -- End function
	.comm	_optimize_size,8,3              ## @optimize_size
	.comm	_V4SFmode,4,2                   ## @V4SFmode
	.comm	_TARGET_SSE2,8,3                ## @TARGET_SSE2
	.comm	_MODE_VECTOR_INT,8,3            ## @MODE_VECTOR_INT
	.comm	_V16QImode,4,2                  ## @V16QImode
	.comm	_V2DFmode,4,2                   ## @V2DFmode
	.comm	_TARGET_SSE_UNALIGNED_MOVE_OPTIMAL,8,3 ## @TARGET_SSE_UNALIGNED_MOVE_OPTIMAL
	.comm	_TARGET_SSE_SPLIT_REGS,8,3      ## @TARGET_SSE_SPLIT_REGS
	.comm	_VOIDmode,4,2                   ## @VOIDmode
	.comm	_DFmode,4,2                     ## @DFmode
	.comm	_TARGET_SSE_PARTIAL_REG_DEPENDENCY,8,3 ## @TARGET_SSE_PARTIAL_REG_DEPENDENCY
	.comm	_V2SFmode,4,2                   ## @V2SFmode
	.comm	_TARGET_SSE_TYPELESS_STORES,4,2 ## @TARGET_SSE_TYPELESS_STORES
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ix86_expand_vector_move_misalign ; -- Begin function ix86_expand_vector_move_misalign
	.p2align	2
_ix86_expand_vector_move_misalign:      ; @ix86_expand_vector_move_misalign
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x0
	ldp	w20, w19, [x1]
	mov	x0, x19
	bl	_MEM_P
	cbz	x0, LBB0_8
; %bb.1:
Lloh0:
	adrp	x8, _optimize_size@GOTPAGE
Lloh1:
	ldr	x8, [x8, _optimize_size@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cbnz	x8, LBB0_10
; %bb.2:
Lloh3:
	adrp	x22, _TARGET_SSE2@GOTPAGE
Lloh4:
	ldr	x22, [x22, _TARGET_SSE2@GOTPAGEOFF]
	ldr	x8, [x22]
	cbz	x8, LBB0_5
; %bb.3:
	mov	x0, x21
	bl	_GET_MODE_CLASS
Lloh5:
	adrp	x8, _MODE_VECTOR_INT@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MODE_VECTOR_INT@GOTPAGEOFF]
Lloh7:
	ldr	x8, [x8]
	cmp	x0, x8
	b.eq	LBB0_15
; %bb.4:
	ldr	x8, [x22]
Lloh8:
	adrp	x22, _V2DFmode@GOTPAGE
Lloh9:
	ldr	x22, [x22, _V2DFmode@GOTPAGEOFF]
	ldr	w9, [x22]
	cmp	x8, #0
	ccmp	w9, w21, #0, ne
	b.eq	LBB0_16
LBB0_5:
Lloh10:
	adrp	x8, _TARGET_SSE_UNALIGNED_MOVE_OPTIMAL@GOTPAGE
Lloh11:
	ldr	x8, [x8, _TARGET_SSE_UNALIGNED_MOVE_OPTIMAL@GOTPAGEOFF]
Lloh12:
	ldr	x8, [x8]
	cbnz	x8, LBB0_10
; %bb.6:
Lloh13:
	adrp	x8, _TARGET_SSE_PARTIAL_REG_DEPENDENCY@GOTPAGE
Lloh14:
	ldr	x8, [x8, _TARGET_SSE_PARTIAL_REG_DEPENDENCY@GOTPAGEOFF]
Lloh15:
	ldr	x8, [x8]
	cbz	x8, LBB0_24
; %bb.7:
	mov	x0, x21
	bl	_CONST0_RTX
	mov	x1, x0
	mov	x0, x20
	bl	_emit_move_insn
	b	LBB0_25
LBB0_8:
	mov	x0, x20
	bl	_MEM_P
	cbz	x0, LBB0_12
; %bb.9:
Lloh16:
	adrp	x8, _optimize_size@GOTPAGE
Lloh17:
	ldr	x8, [x8, _optimize_size@GOTPAGEOFF]
Lloh18:
	ldr	x8, [x8]
	cbz	x8, LBB0_13
LBB0_10:
Lloh19:
	adrp	x21, _V4SFmode@GOTPAGE
Lloh20:
	ldr	x21, [x21, _V4SFmode@GOTPAGEOFF]
	ldr	w0, [x21]
	mov	x1, x20
	bl	_gen_lowpart
	mov	x20, x0
	ldr	w0, [x21]
	mov	x1, x19
	bl	_gen_lowpart
	mov	x1, x0
	mov	x0, x20
	bl	_gen_sse_movups
LBB0_11:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_emit_insn
LBB0_12:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_gcc_unreachable
LBB0_13:
Lloh21:
	adrp	x22, _TARGET_SSE2@GOTPAGE
Lloh22:
	ldr	x22, [x22, _TARGET_SSE2@GOTPAGEOFF]
	ldr	x8, [x22]
Lloh23:
	adrp	x9, _TARGET_SSE_TYPELESS_STORES@GOTPAGE
Lloh24:
	ldr	x9, [x9, _TARGET_SSE_TYPELESS_STORES@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	cmp	x8, #0
	ccmp	w9, #0, #0, ne
	b.ne	LBB0_19
; %bb.14:
	mov	x0, x21
	bl	_GET_MODE_CLASS
Lloh26:
	adrp	x8, _MODE_VECTOR_INT@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MODE_VECTOR_INT@GOTPAGEOFF]
Lloh28:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_18
LBB0_15:
Lloh29:
	adrp	x21, _V16QImode@GOTPAGE
Lloh30:
	ldr	x21, [x21, _V16QImode@GOTPAGEOFF]
	ldr	w0, [x21]
	mov	x1, x20
	bl	_gen_lowpart
	mov	x20, x0
	ldr	w0, [x21]
	mov	x1, x19
	bl	_gen_lowpart
	mov	x1, x0
	mov	x0, x20
	bl	_gen_sse2_movdqu
	b	LBB0_11
LBB0_16:
Lloh31:
	adrp	x8, _TARGET_SSE_UNALIGNED_MOVE_OPTIMAL@GOTPAGE
Lloh32:
	ldr	x8, [x8, _TARGET_SSE_UNALIGNED_MOVE_OPTIMAL@GOTPAGEOFF]
Lloh33:
	ldr	x8, [x8]
	cbz	x8, LBB0_28
; %bb.17:
	mov	x0, x21
	mov	x1, x20
	bl	_gen_lowpart
	mov	x20, x0
	ldr	w0, [x22]
	mov	x1, x19
	bl	_gen_lowpart
	mov	x1, x0
	mov	x0, x20
	bl	_gen_sse2_movupd
	b	LBB0_11
LBB0_18:
	ldr	x8, [x22]
LBB0_19:
Lloh34:
	adrp	x9, _V2DFmode@GOTPAGE
Lloh35:
	ldr	x9, [x9, _V2DFmode@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	cmp	x8, #0
	ccmp	w9, w21, #0, ne
	b.eq	LBB0_23
; %bb.20:
Lloh37:
	adrp	x8, _V4SFmode@GOTPAGE
Lloh38:
	ldr	x8, [x8, _V4SFmode@GOTPAGEOFF]
Lloh39:
	ldr	w0, [x8]
	cmp	w0, w21
	b.eq	LBB0_22
; %bb.21:
	mov	x1, x19
	bl	_gen_lowpart
	mov	x19, x0
LBB0_22:
Lloh40:
	adrp	x21, _V2SFmode@GOTPAGE
Lloh41:
	ldr	x21, [x21, _V2SFmode@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	mov	w2, #0
	bl	_adjust_address
	mov	x1, x19
	bl	_gen_sse_storelps
	bl	_emit_insn
	ldr	w1, [x21]
	mov	x0, x20
	mov	w2, #8
	bl	_adjust_address
	mov	x1, x19
	bl	_gen_sse_storehps
	b	LBB0_11
LBB0_23:
Lloh42:
	adrp	x21, _DFmode@GOTPAGE
Lloh43:
	ldr	x21, [x21, _DFmode@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	mov	w2, #0
	bl	_adjust_address
	mov	x1, x19
	bl	_gen_sse2_storelpd
	bl	_emit_insn
	ldr	w1, [x21]
	mov	x0, x20
	mov	w2, #8
	bl	_adjust_address
	mov	x1, x19
	bl	_gen_sse2_storehpd
	b	LBB0_11
LBB0_24:
Lloh44:
	adrp	x8, _VOIDmode@GOTPAGE
Lloh45:
	ldr	x8, [x8, _VOIDmode@GOTPAGEOFF]
Lloh46:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_gen_rtx_CLOBBER
	bl	_emit_insn
LBB0_25:
Lloh47:
	adrp	x8, _V4SFmode@GOTPAGE
Lloh48:
	ldr	x8, [x8, _V4SFmode@GOTPAGEOFF]
Lloh49:
	ldr	w0, [x8]
	cmp	w0, w21
	b.eq	LBB0_27
; %bb.26:
	mov	x1, x20
	bl	_gen_lowpart
	mov	x20, x0
LBB0_27:
Lloh50:
	adrp	x21, _V2SFmode@GOTPAGE
Lloh51:
	ldr	x21, [x21, _V2SFmode@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	mov	w2, #0
	bl	_adjust_address
	mov	x2, x0
	mov	x0, x20
	mov	x1, x20
	bl	_gen_sse_loadlps
	bl	_emit_insn
	ldr	w1, [x21]
	mov	x0, x19
	mov	w2, #8
	bl	_adjust_address
	mov	x2, x0
	mov	x0, x20
	mov	x1, x20
	bl	_gen_sse_loadhps
	b	LBB0_11
LBB0_28:
Lloh52:
	adrp	x8, _TARGET_SSE_SPLIT_REGS@GOTPAGE
Lloh53:
	ldr	x8, [x8, _TARGET_SSE_SPLIT_REGS@GOTPAGEOFF]
Lloh54:
	ldr	x8, [x8]
	cbz	x8, LBB0_30
; %bb.29:
Lloh55:
	adrp	x8, _VOIDmode@GOTPAGE
Lloh56:
	ldr	x8, [x8, _VOIDmode@GOTPAGEOFF]
Lloh57:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_gen_rtx_CLOBBER
	bl	_emit_insn
	mov	x21, x20
	b	LBB0_31
LBB0_30:
	mov	x0, x21
	bl	_CONST0_RTX
	mov	x21, x0
LBB0_31:
Lloh58:
	adrp	x22, _DFmode@GOTPAGE
Lloh59:
	ldr	x22, [x22, _DFmode@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #0
	bl	_adjust_address
	mov	x2, x0
	mov	x0, x20
	mov	x1, x21
	bl	_gen_sse2_loadlpd
	bl	_emit_insn
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #8
	bl	_adjust_address
	mov	x2, x0
	mov	x0, x20
	mov	x1, x20
	bl	_gen_sse2_loadhpd
	b	LBB0_11
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh58, Lloh59
	.cfi_endproc
                                        ; -- End function
	.comm	_optimize_size,8,3              ; @optimize_size
	.comm	_V4SFmode,4,2                   ; @V4SFmode
	.comm	_TARGET_SSE2,8,3                ; @TARGET_SSE2
	.comm	_MODE_VECTOR_INT,8,3            ; @MODE_VECTOR_INT
	.comm	_V16QImode,4,2                  ; @V16QImode
	.comm	_V2DFmode,4,2                   ; @V2DFmode
	.comm	_TARGET_SSE_UNALIGNED_MOVE_OPTIMAL,8,3 ; @TARGET_SSE_UNALIGNED_MOVE_OPTIMAL
	.comm	_TARGET_SSE_SPLIT_REGS,8,3      ; @TARGET_SSE_SPLIT_REGS
	.comm	_VOIDmode,4,2                   ; @VOIDmode
	.comm	_DFmode,4,2                     ; @DFmode
	.comm	_TARGET_SSE_PARTIAL_REG_DEPENDENCY,8,3 ; @TARGET_SSE_PARTIAL_REG_DEPENDENCY
	.comm	_V2SFmode,4,2                   ; @V2SFmode
	.comm	_TARGET_SSE_TYPELESS_STORES,4,2 ; @TARGET_SSE_TYPELESS_STORES
.subsections_via_symbols
