	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mips_32bit_flags_p
_mips_32bit_flags_p:                    ## @mips_32bit_flags_p
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_EF_MIPS_32BITMODE@GOTPCREL(%rip), %rcx
	movl	$1, %eax
	testl	%edi, (%rcx)
	je	LBB0_1
LBB0_7:
	popq	%rbp
	retq
LBB0_1:
	movq	_EF_MIPS_ABI@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%edi, %ecx
	movq	_E_MIPS_ABI_O32@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	je	LBB0_7
## %bb.2:
	movq	_E_MIPS_ABI_EABI32@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	je	LBB0_7
## %bb.3:
	movq	_EF_MIPS_ARCH@GOTPCREL(%rip), %rcx
	andl	(%rcx), %edi
	movq	_E_MIPS_ARCH_1@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %edi
	je	LBB0_7
## %bb.4:
	movq	_E_MIPS_ARCH_2@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %edi
	je	LBB0_7
## %bb.5:
	movq	_E_MIPS_ARCH_32@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %edi
	je	LBB0_7
## %bb.6:
	movq	_E_MIPS_ARCH_32R2@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	cmpl	(%rcx), %edi
	sete	%al
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EF_MIPS_32BITMODE,4,2          ## @EF_MIPS_32BITMODE
	.comm	_EF_MIPS_ABI,4,2                ## @EF_MIPS_ABI
	.comm	_E_MIPS_ABI_O32,4,2             ## @E_MIPS_ABI_O32
	.comm	_E_MIPS_ABI_EABI32,4,2          ## @E_MIPS_ABI_EABI32
	.comm	_EF_MIPS_ARCH,4,2               ## @EF_MIPS_ARCH
	.comm	_E_MIPS_ARCH_1,4,2              ## @E_MIPS_ARCH_1
	.comm	_E_MIPS_ARCH_2,4,2              ## @E_MIPS_ARCH_2
	.comm	_E_MIPS_ARCH_32,4,2             ## @E_MIPS_ARCH_32
	.comm	_E_MIPS_ARCH_32R2,4,2           ## @E_MIPS_ARCH_32R2
	.no_dead_strip	_mips_32bit_flags_p
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mips_32bit_flags_p
_mips_32bit_flags_p:                    ; @mips_32bit_flags_p
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _EF_MIPS_32BITMODE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EF_MIPS_32BITMODE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_2
; %bb.1:
	mov	w0, #1
	ret
LBB0_2:
Lloh3:
	adrp	x8, _EF_MIPS_ABI@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EF_MIPS_ABI@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh6:
	adrp	x9, _E_MIPS_ABI_O32@GOTPAGE
Lloh7:
	ldr	x9, [x9, _E_MIPS_ABI_O32@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
Lloh9:
	adrp	x10, _E_MIPS_ABI_EABI32@GOTPAGE
Lloh10:
	ldr	x10, [x10, _E_MIPS_ABI_EABI32@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	cmp	w8, w9
	ccmp	w8, w10, #4, ne
	b.ne	LBB0_4
; %bb.3:
	mov	w0, #1
	ret
LBB0_4:
Lloh12:
	adrp	x8, _EF_MIPS_ARCH@GOTPAGE
Lloh13:
	ldr	x8, [x8, _EF_MIPS_ARCH@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh15:
	adrp	x9, _E_MIPS_ARCH_1@GOTPAGE
Lloh16:
	ldr	x9, [x9, _E_MIPS_ARCH_1@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
Lloh18:
	adrp	x10, _E_MIPS_ARCH_2@GOTPAGE
Lloh19:
	ldr	x10, [x10, _E_MIPS_ARCH_2@GOTPAGEOFF]
Lloh20:
	ldr	w10, [x10]
Lloh21:
	adrp	x11, _E_MIPS_ARCH_32@GOTPAGE
Lloh22:
	ldr	x11, [x11, _E_MIPS_ARCH_32@GOTPAGEOFF]
Lloh23:
	ldr	w11, [x11]
	cmp	w8, w9
	ccmp	w8, w10, #4, ne
	ccmp	w8, w11, #4, ne
	b.ne	LBB0_6
; %bb.5:
	mov	w0, #1
	ret
LBB0_6:
Lloh24:
	adrp	x9, _E_MIPS_ARCH_32R2@GOTPAGE
Lloh25:
	ldr	x9, [x9, _E_MIPS_ARCH_32R2@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	cmp	w8, w9
	cset	w0, eq
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_EF_MIPS_32BITMODE,4,2          ; @EF_MIPS_32BITMODE
	.comm	_EF_MIPS_ABI,4,2                ; @EF_MIPS_ABI
	.comm	_E_MIPS_ABI_O32,4,2             ; @E_MIPS_ABI_O32
	.comm	_E_MIPS_ABI_EABI32,4,2          ; @E_MIPS_ABI_EABI32
	.comm	_EF_MIPS_ARCH,4,2               ; @EF_MIPS_ARCH
	.comm	_E_MIPS_ARCH_1,4,2              ; @E_MIPS_ARCH_1
	.comm	_E_MIPS_ARCH_2,4,2              ; @E_MIPS_ARCH_2
	.comm	_E_MIPS_ARCH_32,4,2             ; @E_MIPS_ARCH_32
	.comm	_E_MIPS_ARCH_32R2,4,2           ; @E_MIPS_ARCH_32R2
	.no_dead_strip	_mips_32bit_flags_p
.subsections_via_symbols
