	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ix86_split_copysign_var        ## -- Begin function ix86_split_copysign_var
	.p2align	4, 0x90
_ix86_split_copysign_var:               ## @ix86_split_copysign_var
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdi), %r13d
	movl	4(%rdi), %eax
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	movl	8(%rdi), %r15d
	movl	12(%rdi), %r14d
	movl	16(%rdi), %eax
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movl	20(%rdi), %r12d
	movl	%r13d, %edi
	callq	_GET_MODE
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	%r12d, %edi
	callq	_GET_MODE
	movl	%eax, %ebx
	movl	%r15d, %edi
	movl	%r14d, %esi
	callq	_rtx_equal_p
	testq	%rax, %rax
	je	LBB0_1
## %bb.12:
	movl	%r13d, %edi
	movl	%r15d, %esi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_emit_move_insn                 ## TAILCALL
LBB0_1:
	movl	%r14d, -52(%rbp)                ## 4-byte Spill
	movl	%r15d, -56(%rbp)                ## 4-byte Spill
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	movl	%r12d, %edi
	callq	_REG_P
	testq	%rax, %rax
	movl	-64(%rbp), %r15d                ## 4-byte Reload
	je	LBB0_4
## %bb.2:
	movl	%r13d, %edi
	callq	_REGNO
	movl	%r15d, %ebx
	movq	%rax, %r15
	movl	%r12d, %edi
	callq	_REGNO
	cmpq	%rax, %r15
	movl	%ebx, %r15d
	jne	LBB0_4
## %bb.3:
	movl	-52(%rbp), %edi                 ## 4-byte Reload
	callq	_REGNO
	movq	%rax, %r14
	movl	%r15d, %edi
	callq	_REGNO
	xorl	%edi, %edi
	cmpq	%rax, %r14
	sete	%dil
	callq	_gcc_assert
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	movl	%r14d, %edi
	movl	%r15d, %esi
	movl	%r12d, %edx
	callq	_gen_rtx_AND
	movq	_VOIDmode@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_gen_rtx_SET
	movl	%eax, %edi
	callq	_emit_insn
	movl	%r14d, %edi
	movl	-56(%rbp), %esi                 ## 4-byte Reload
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	xorl	%ecx, %ecx
	callq	_simplify_gen_subreg
	movl	%eax, %r13d
	movl	%r14d, %edi
	movl	%r12d, %esi
	callq	_gen_rtx_NOT
	movl	%r14d, %edi
	movl	%eax, %esi
	movl	%r13d, %edx
	movl	%r12d, %ebx
	callq	_gen_rtx_AND
	movq	_VOIDmode@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%r12d, %esi
	movl	%eax, %edx
	callq	_gen_rtx_SET
	jmp	LBB0_11
LBB0_4:
	movl	-52(%rbp), %r14d                ## 4-byte Reload
	movl	%r14d, %edi
	callq	_REGNO
	movq	%rax, %rbx
	movl	%r15d, %edi
	callq	_REGNO
	cmpq	%rax, %rbx
	jne	LBB0_6
## %bb.5:
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	jmp	LBB0_7
LBB0_6:
	movl	%r12d, %edi
	callq	_REGNO
	movq	%rax, %rbx
	movl	%r15d, %edi
	callq	_REGNO
	xorl	%edi, %edi
	cmpq	%rax, %rbx
	sete	%dil
	callq	_gcc_assert
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %edi
	movl	%r14d, %esi
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	callq	_simplify_gen_subreg
	movl	%eax, %r12d
LBB0_7:
	movl	%ebx, %edi
	movl	%r15d, %esi
	movl	%r12d, %edx
	callq	_gen_rtx_AND
	movq	_VOIDmode@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_gen_rtx_SET
	movl	%eax, %edi
	callq	_emit_insn
	movl	-56(%rbp), %r15d                ## 4-byte Reload
	movl	%r15d, %edi
	callq	_REGNO
	movl	%ebx, %r12d
	movq	%rax, %rbx
	movl	%r13d, %edi
	callq	_REGNO
	cmpq	%rax, %rbx
	jne	LBB0_9
## %bb.8:
	movl	%r12d, %edi
	movl	%r15d, %esi
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	callq	_simplify_gen_subreg
	movl	%eax, %ebx
	movl	%r12d, %edi
	movl	%eax, %esi
	movl	-60(%rbp), %edx                 ## 4-byte Reload
	jmp	LBB0_10
LBB0_9:
	movl	-60(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %edi
	callq	_REGNO
	movl	%r13d, %edi
	movq	%rax, %r13
	callq	_REGNO
	xorl	%edi, %edi
	cmpq	%rax, %r13
	sete	%dil
	callq	_gcc_assert
	movl	%r12d, %edi
	movl	%r15d, %esi
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	callq	_simplify_gen_subreg
	movl	%r12d, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
LBB0_10:
	callq	_gen_rtx_AND
	movl	%eax, %edx
	movl	%r12d, %r14d
	movq	_VOIDmode@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_gen_rtx_SET
	movl	-64(%rbp), %r15d                ## 4-byte Reload
LBB0_11:
	movl	%eax, %edi
	callq	_emit_insn
	movl	%r14d, %edi
	movl	%ebx, %esi
	movl	%r15d, %edx
	callq	_gen_rtx_IOR
	movq	_VOIDmode@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_gen_rtx_SET
	movl	%eax, %edi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_emit_insn                      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VOIDmode,4,2                   ## @VOIDmode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ix86_split_copysign_var        ; -- Begin function ix86_split_copysign_var
	.p2align	2
_ix86_split_copysign_var:               ; @ix86_split_copysign_var
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldp	w25, w19, [x0]
	ldp	w21, w26, [x0, #8]
	ldp	w22, w24, [x0, #16]
	mov	x0, x25
	bl	_GET_MODE
	mov	x23, x0
	mov	x0, x24
	bl	_GET_MODE
	mov	x20, x0
	mov	x0, x21
	mov	x1, x26
	bl	_rtx_equal_p
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x25
	mov	x1, x21
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_emit_move_insn
LBB0_2:
	mov	x0, x24
	bl	_REG_P
Lloh0:
	adrp	x28, _VOIDmode@GOTPAGE
Lloh1:
	ldr	x28, [x28, _VOIDmode@GOTPAGEOFF]
	cbz	x0, LBB0_5
; %bb.3:
	mov	x0, x25
	bl	_REGNO
	mov	x27, x0
	mov	x0, x24
	bl	_REGNO
	cmp	x27, x0
	b.ne	LBB0_5
; %bb.4:
	mov	x0, x26
	bl	_REGNO
	mov	x22, x0
	mov	x0, x19
	bl	_REGNO
	cmp	x22, x0
	cset	w0, eq
	bl	_gcc_assert
	mov	x0, x20
	mov	x1, x19
	mov	x2, x24
	bl	_gen_rtx_AND
	mov	x2, x0
	ldr	w0, [x28]
	mov	x1, x19
	bl	_gen_rtx_SET
	bl	_emit_insn
	mov	x0, x20
	mov	x1, x21
	mov	x2, x23
	mov	w3, #0
	bl	_simplify_gen_subreg
	mov	x21, x0
	mov	x0, x20
	mov	x1, x24
	bl	_gen_rtx_NOT
	mov	x1, x0
	mov	x0, x20
	mov	x2, x21
	bl	_gen_rtx_AND
	mov	x2, x0
	ldr	w0, [x28]
	mov	x1, x24
	bl	_gen_rtx_SET
	b	LBB0_11
LBB0_5:
	mov	x0, x26
	bl	_REGNO
	mov	x27, x0
	mov	x0, x19
	bl	_REGNO
	cmp	x27, x0
	b.eq	LBB0_7
; %bb.6:
	mov	x0, x24
	bl	_REGNO
	mov	x24, x0
	mov	x0, x19
	bl	_REGNO
	cmp	x24, x0
	cset	w0, eq
	bl	_gcc_assert
	mov	x0, x20
	mov	x1, x26
	mov	x2, x23
	mov	w3, #0
	bl	_simplify_gen_subreg
	mov	x24, x0
LBB0_7:
	mov	x0, x20
	mov	x1, x19
	mov	x2, x24
	bl	_gen_rtx_AND
	mov	x2, x0
	ldr	w0, [x28]
	mov	x1, x19
	bl	_gen_rtx_SET
	bl	_emit_insn
	mov	x0, x21
	bl	_REGNO
	mov	x24, x0
	mov	x0, x25
	bl	_REGNO
	cmp	x24, x0
	b.ne	LBB0_9
; %bb.8:
	mov	x0, x20
	mov	x1, x21
	mov	x2, x23
	mov	w3, #0
	bl	_simplify_gen_subreg
	mov	x21, x0
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	bl	_gen_rtx_AND
	mov	x2, x0
	mov	x22, x21
	b	LBB0_10
LBB0_9:
	mov	x0, x22
	bl	_REGNO
	mov	x24, x0
	mov	x0, x25
	bl	_REGNO
	cmp	x24, x0
	cset	w0, eq
	bl	_gcc_assert
	mov	x0, x20
	mov	x1, x21
	mov	x2, x23
	mov	w3, #0
	bl	_simplify_gen_subreg
	mov	x2, x0
	mov	x0, x20
	mov	x1, x22
	bl	_gen_rtx_AND
	mov	x2, x0
LBB0_10:
	ldr	w0, [x28]
	mov	x1, x22
	bl	_gen_rtx_SET
	mov	x24, x22
LBB0_11:
	bl	_emit_insn
	mov	x0, x20
	mov	x1, x24
	mov	x2, x19
	bl	_gen_rtx_IOR
	mov	x2, x0
	ldr	w0, [x28]
	mov	x1, x24
	bl	_gen_rtx_SET
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_emit_insn
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_VOIDmode,4,2                   ; @VOIDmode
.subsections_via_symbols
