	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dt_cg_logical_or
_dt_cg_logical_or:                      ## @dt_cg_logical_or
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movq	%rsi, %rdi
	callq	_dt_irlist_label
	movl	%eax, %r12d
	movq	%rbx, %rdi
	callq	_dt_irlist_label
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	%rbx, %rdi
	callq	_dt_irlist_label
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	16(%r15), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	callq	_dt_cg_node
	movq	16(%r15), %rax
	movl	(%rax), %edi
	callq	_DIF_INSTR_TST
	movq	_DT_LBL_NONE@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	movl	%eax, %esi
	callq	_dt_cg_node_alloc
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_dt_irlist_append
	movq	16(%r15), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_dt_regset_free
	movq	_DIF_OP_BNE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r12d, %esi
	callq	_DIF_INSTR_BRANCH
	movl	(%r13), %edi
	movl	%eax, %esi
	callq	_dt_cg_node_alloc
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_dt_irlist_append
	movq	8(%r15), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	callq	_dt_cg_node
	movq	8(%r15), %rax
	movl	(%rax), %edi
	callq	_DIF_INSTR_TST
	movl	(%r13), %edi
	movl	%eax, %esi
	callq	_dt_cg_node_alloc
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_dt_irlist_append
	movq	8(%r15), %rax
	movl	(%rax), %eax
	movl	%eax, (%r15)
	movq	_DIF_OP_BE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_DIF_INSTR_BRANCH
	movl	(%r13), %edi
	movl	%eax, %esi
	callq	_dt_cg_node_alloc
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_dt_irlist_append
	movl	(%r15), %ecx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	%r12d, %edx
	movl	$1, %r8d
	callq	_dt_cg_xsetx
	movq	_DIF_OP_BA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	movl	%r14d, %esi
	callq	_DIF_INSTR_BRANCH
	movl	(%r13), %edi
	movl	%eax, %esi
	callq	_dt_cg_node_alloc
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_dt_irlist_append
	movq	_DIF_REG_R0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_DIF_INSTR_MOV
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	movl	%eax, %esi
	callq	_dt_cg_node_alloc
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_dt_irlist_append
	movq	_DIF_INSTR_NOP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r14d, %edi
	callq	_dt_cg_node_alloc
	movq	%rbx, %rdi
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dt_irlist_append               ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DT_LBL_NONE,4,2                ## @DT_LBL_NONE
	.comm	_DIF_OP_BNE,4,2                 ## @DIF_OP_BNE
	.comm	_DIF_OP_BE,4,2                  ## @DIF_OP_BE
	.comm	_DIF_OP_BA,4,2                  ## @DIF_OP_BA
	.comm	_DIF_REG_R0,4,2                 ## @DIF_REG_R0
	.comm	_DIF_INSTR_NOP,4,2              ## @DIF_INSTR_NOP
	.no_dead_strip	_dt_cg_logical_or
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dt_cg_logical_or
_dt_cg_logical_or:                      ; @dt_cg_logical_or
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x24, x2
	mov	x19, x1
	mov	x21, x0
	mov	x0, x1
	bl	_dt_irlist_label
	mov	x23, x0
	mov	x0, x19
	bl	_dt_irlist_label
	mov	x22, x0
	mov	x0, x19
	bl	_dt_irlist_label
	mov	x20, x0
	ldr	x0, [x21, #16]
	mov	x1, x19
	mov	x2, x24
	bl	_dt_cg_node
	ldr	x8, [x21, #16]
	ldr	w0, [x8]
	bl	_DIF_INSTR_TST
	mov	x1, x0
Lloh0:
	adrp	x25, _DT_LBL_NONE@GOTPAGE
Lloh1:
	ldr	x25, [x25, _DT_LBL_NONE@GOTPAGEOFF]
	ldr	w0, [x25]
	bl	_dt_cg_node_alloc
	mov	x1, x0
	mov	x0, x19
	bl	_dt_irlist_append
	ldr	x8, [x21, #16]
	ldr	w1, [x8]
	mov	x0, x24
	bl	_dt_regset_free
Lloh2:
	adrp	x8, _DIF_OP_BNE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DIF_OP_BNE@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	mov	x1, x23
	bl	_DIF_INSTR_BRANCH
	mov	x1, x0
	ldr	w0, [x25]
	bl	_dt_cg_node_alloc
	mov	x1, x0
	mov	x0, x19
	bl	_dt_irlist_append
	ldr	x0, [x21, #8]
	mov	x1, x19
	mov	x2, x24
	bl	_dt_cg_node
	ldr	x8, [x21, #8]
	ldr	w0, [x8]
	bl	_DIF_INSTR_TST
	mov	x1, x0
	ldr	w0, [x25]
	bl	_dt_cg_node_alloc
	mov	x1, x0
	mov	x0, x19
	bl	_dt_irlist_append
	ldr	x8, [x21, #8]
	ldr	w8, [x8]
	str	w8, [x21]
Lloh5:
	adrp	x8, _DIF_OP_BE@GOTPAGE
Lloh6:
	ldr	x8, [x8, _DIF_OP_BE@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	mov	x1, x22
	bl	_DIF_INSTR_BRANCH
	mov	x1, x0
	ldr	w0, [x25]
	bl	_dt_cg_node_alloc
	mov	x1, x0
	mov	x0, x19
	bl	_dt_irlist_append
	ldr	w3, [x21]
	mov	x0, x19
	mov	x1, #0
	mov	x2, x23
	mov	w4, #1
	bl	_dt_cg_xsetx
Lloh8:
	adrp	x8, _DIF_OP_BA@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DIF_OP_BA@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_DIF_INSTR_BRANCH
	mov	x1, x0
	ldr	w0, [x25]
	bl	_dt_cg_node_alloc
	mov	x1, x0
	mov	x0, x19
	bl	_dt_irlist_append
Lloh11:
	adrp	x8, _DIF_REG_R0@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DIF_REG_R0@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	ldr	w1, [x21]
	bl	_DIF_INSTR_MOV
	mov	x1, x0
	mov	x0, x22
	bl	_dt_cg_node_alloc
	mov	x1, x0
	mov	x0, x19
	bl	_dt_irlist_append
Lloh14:
	adrp	x8, _DIF_INSTR_NOP@GOTPAGE
Lloh15:
	ldr	x8, [x8, _DIF_INSTR_NOP@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_dt_cg_node_alloc
	mov	x1, x0
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_dt_irlist_append
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_DT_LBL_NONE,4,2                ; @DT_LBL_NONE
	.comm	_DIF_OP_BNE,4,2                 ; @DIF_OP_BNE
	.comm	_DIF_OP_BE,4,2                  ; @DIF_OP_BE
	.comm	_DIF_OP_BA,4,2                  ; @DIF_OP_BA
	.comm	_DIF_REG_R0,4,2                 ; @DIF_REG_R0
	.comm	_DIF_INSTR_NOP,4,2              ; @DIF_INSTR_NOP
	.no_dead_strip	_dt_cg_logical_or
.subsections_via_symbols
