	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mips_sim_wait_reg
_mips_sim_wait_reg:                     ## @mips_sim_wait_reg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r15d
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movq	%rdi, %r12
	movl	%edx, %edi
	callq	_REGNO
	movl	%eax, %ebx
	movl	%r15d, %edi
	callq	_GET_MODE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_HARD_REGNO_NREGS
	testl	%eax, %eax
	je	LBB0_7
## %bb.1:
	xorl	%r13d, %r13d
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	incl	%r13d
	movl	%r15d, %edi
	callq	_REGNO
	movl	%eax, %ebx
	movl	%r15d, %edi
	callq	_GET_MODE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_HARD_REGNO_NREGS
	cmpl	%eax, %r13d
	jae	LBB0_7
LBB0_2:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_4 Depth 2
	movq	8(%r12), %rbx
	movl	%r15d, %edi
	callq	_REGNO
                                        ## kill: def $eax killed $eax def $rax
	addl	%r13d, %eax
	shlq	$4, %rax
	cmpq	$0, (%rbx,%rax)
	je	LBB0_6
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	8(%r12), %rbx
	movl	%r15d, %edi
	callq	_REGNO
                                        ## kill: def $eax killed $eax def $rax
	addl	%r13d, %eax
	shlq	$4, %rax
	movl	8(%rbx,%rax), %r14d
	movq	8(%r12), %rbx
	movl	%r15d, %edi
	callq	_REGNO
                                        ## kill: def $eax killed $eax def $rax
	addl	%r13d, %eax
	shlq	$4, %rax
	movq	(%rbx,%rax), %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_insn_latency
	movq	%rax, %rbx
	addl	%r14d, %ebx
	cmpl	%ebx, (%r12)
	jae	LBB0_6
	.p2align	4, 0x90
LBB0_4:                                 ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	%r12, %rdi
	callq	_mips_sim_next_cycle
	cmpl	%ebx, (%r12)
	jb	LBB0_4
	jmp	LBB0_6
LBB0_7:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_mips_sim_wait_reg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mips_sim_wait_reg
_mips_sim_wait_reg:                     ; @mips_sim_wait_reg
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	mov	x0, x2
	bl	_REGNO
	mov	x22, x0
	mov	x0, x19
	bl	_GET_MODE
	mov	x1, x0
	mov	x0, x22
	bl	_HARD_REGNO_NREGS
	cbz	w0, LBB0_6
; %bb.1:
	mov	w23, #0
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	w23, w23, #1
	mov	x0, x19
	bl	_REGNO
	mov	x22, x0
	mov	x0, x19
	bl	_GET_MODE
	mov	x1, x0
	mov	x0, x22
	bl	_HARD_REGNO_NREGS
	cmp	w23, w0
	b.hs	LBB0_6
LBB0_3:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	ldr	x22, [x21, #8]
	mov	x0, x19
	bl	_REGNO
	add	w8, w0, w23
	lsl	x8, x8, #4
	ldr	x8, [x22, x8]
	cbz	x8, LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	x22, [x21, #8]
	mov	x0, x19
	bl	_REGNO
	add	w8, w0, w23
	add	x8, x22, w8, uxtw #4
	ldr	w22, [x8, #8]
	ldr	x24, [x21, #8]
	mov	x0, x19
	bl	_REGNO
	add	w8, w0, w23
	lsl	x8, x8, #4
	ldr	x0, [x24, x8]
	mov	x1, x20
	bl	_insn_latency
	ldr	w8, [x21]
	add	w22, w22, w0
	cmp	w8, w22
	b.hs	LBB0_2
LBB0_5:                                 ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	mov	x0, x21
	bl	_mips_sim_next_cycle
	ldr	w8, [x21]
	cmp	w8, w22
	b.lo	LBB0_5
	b	LBB0_2
LBB0_6:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_mips_sim_wait_reg
.subsections_via_symbols
