	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function load_asic
_load_asic:                             ## @load_asic
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	xorl	%eax, %eax
	cmpq	$0, 16(%rdi)
	je	LBB0_1
LBB0_7:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	%rdi, %r14
	movl	$10, %edi
	callq	_mdelay
	movq	(%r14), %rax
	movq	_DEVICE_ID_56361@GOTPCREL(%rip), %rcx
	movq	_card_fw@GOTPCREL(%rip), %r15
	cmpq	(%rcx), %rax
	jne	LBB0_2
## %bb.3:
	movq	_FW_MONA_361_1_ASIC48@GOTPCREL(%rip), %rax
	jmp	LBB0_4
LBB0_2:
	movq	_FW_MONA_301_1_ASIC48@GOTPCREL(%rip), %rax
LBB0_4:
	movq	(%rax), %rbx
	shlq	$2, %rbx
	addq	(%r15), %rbx
	movq	_DSP_FNC_LOAD_MONA_PCI_CARD_ASIC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	callq	_load_asic_generic
	testl	%eax, %eax
	js	LBB0_7
## %bb.5:
	movq	%rbx, 8(%r14)
	movl	$10, %edi
	callq	_mdelay
	movq	_DSP_FNC_LOAD_MONA_EXTERNAL_ASIC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_FW_MONA_2_ASIC@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	shlq	$2, %rdx
	addq	(%r15), %rdx
	movq	%r14, %rdi
	callq	_load_asic_generic
	testl	%eax, %eax
	js	LBB0_7
## %bb.6:
	movl	$10, %edi
	callq	_mdelay
	movq	%r14, %rdi
	callq	_check_asic_status
	testl	%eax, %eax
	jne	LBB0_7
## %bb.8:
	movq	_GML_CONVERTER_ENABLE@GOTPCREL(%rip), %rax
	movq	_GML_48KHZ@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_TRUE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_write_control_reg              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DEVICE_ID_56361,8,3            ## @DEVICE_ID_56361
	.comm	_card_fw,8,3                    ## @card_fw
	.comm	_FW_MONA_361_1_ASIC48,8,3       ## @FW_MONA_361_1_ASIC48
	.comm	_FW_MONA_301_1_ASIC48,8,3       ## @FW_MONA_301_1_ASIC48
	.comm	_DSP_FNC_LOAD_MONA_PCI_CARD_ASIC,4,2 ## @DSP_FNC_LOAD_MONA_PCI_CARD_ASIC
	.comm	_DSP_FNC_LOAD_MONA_EXTERNAL_ASIC,4,2 ## @DSP_FNC_LOAD_MONA_EXTERNAL_ASIC
	.comm	_FW_MONA_2_ASIC,8,3             ## @FW_MONA_2_ASIC
	.comm	_GML_CONVERTER_ENABLE,4,2       ## @GML_CONVERTER_ENABLE
	.comm	_GML_48KHZ,4,2                  ## @GML_48KHZ
	.comm	_TRUE,4,2                       ## @TRUE
	.no_dead_strip	_load_asic
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function load_asic
_load_asic:                             ; @load_asic
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x8, [x0, #16]
	cbz	x8, LBB0_3
; %bb.1:
	mov	w0, #0
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_3:
	mov	x19, x0
	mov	w0, #10
	bl	_mdelay
	ldr	x8, [x19]
Lloh0:
	adrp	x9, _DEVICE_ID_56361@GOTPAGE
Lloh1:
	ldr	x9, [x9, _DEVICE_ID_56361@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
Lloh3:
	adrp	x21, _card_fw@GOTPAGE
Lloh4:
	ldr	x21, [x21, _card_fw@GOTPAGEOFF]
	ldr	x10, [x21]
Lloh5:
	adrp	x11, _FW_MONA_361_1_ASIC48@GOTPAGE
Lloh6:
	ldr	x11, [x11, _FW_MONA_361_1_ASIC48@GOTPAGEOFF]
Lloh7:
	adrp	x12, _FW_MONA_301_1_ASIC48@GOTPAGE
Lloh8:
	ldr	x12, [x12, _FW_MONA_301_1_ASIC48@GOTPAGEOFF]
	cmp	x8, x9
	csel	x8, x11, x12, eq
	ldr	x8, [x8]
	add	x20, x10, x8, lsl #2
Lloh9:
	adrp	x8, _DSP_FNC_LOAD_MONA_PCI_CARD_ASIC@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DSP_FNC_LOAD_MONA_PCI_CARD_ASIC@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_load_asic_generic
	tbnz	w0, #31, LBB0_2
; %bb.4:
	str	x20, [x19, #8]
	mov	w0, #10
	bl	_mdelay
Lloh12:
	adrp	x8, _DSP_FNC_LOAD_MONA_EXTERNAL_ASIC@GOTPAGE
Lloh13:
	ldr	x8, [x8, _DSP_FNC_LOAD_MONA_EXTERNAL_ASIC@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	x8, [x21]
Lloh15:
	adrp	x9, _FW_MONA_2_ASIC@GOTPAGE
Lloh16:
	ldr	x9, [x9, _FW_MONA_2_ASIC@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
	add	x2, x8, x9, lsl #2
	mov	x0, x19
	bl	_load_asic_generic
	tbnz	w0, #31, LBB0_2
; %bb.5:
	mov	w0, #10
	bl	_mdelay
	mov	x0, x19
	bl	_check_asic_status
	cbnz	w0, LBB0_2
; %bb.6:
Lloh18:
	adrp	x8, _GML_CONVERTER_ENABLE@GOTPAGE
Lloh19:
	ldr	x8, [x8, _GML_CONVERTER_ENABLE@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
Lloh21:
	adrp	x9, _GML_48KHZ@GOTPAGE
Lloh22:
	ldr	x9, [x9, _GML_48KHZ@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	orr	w1, w9, w8
Lloh24:
	adrp	x8, _TRUE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _TRUE@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_write_control_reg
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.comm	_DEVICE_ID_56361,8,3            ; @DEVICE_ID_56361
	.comm	_card_fw,8,3                    ; @card_fw
	.comm	_FW_MONA_361_1_ASIC48,8,3       ; @FW_MONA_361_1_ASIC48
	.comm	_FW_MONA_301_1_ASIC48,8,3       ; @FW_MONA_301_1_ASIC48
	.comm	_DSP_FNC_LOAD_MONA_PCI_CARD_ASIC,4,2 ; @DSP_FNC_LOAD_MONA_PCI_CARD_ASIC
	.comm	_DSP_FNC_LOAD_MONA_EXTERNAL_ASIC,4,2 ; @DSP_FNC_LOAD_MONA_EXTERNAL_ASIC
	.comm	_FW_MONA_2_ASIC,8,3             ; @FW_MONA_2_ASIC
	.comm	_GML_CONVERTER_ENABLE,4,2       ; @GML_CONVERTER_ENABLE
	.comm	_GML_48KHZ,4,2                  ; @GML_48KHZ
	.comm	_TRUE,4,2                       ; @TRUE
	.no_dead_strip	_load_asic
.subsections_via_symbols
