	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function insert_reg
_insert_reg:                            ## @insert_reg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r9, %r15
	movq	%rsi, %r14
	movl	%edi, %r12d
	movq	_OP_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	testq	%rcx, %rcx
	je	LBB0_1
## %bb.15:
	movq	%rcx, %rbx
	movq	(%rcx), %rax
	movq	_AUXREG@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_25
## %bb.16:
	movq	_ARC_MOD_AUXREG@GOTPCREL(%rip), %rax
	testl	%edx, (%rax)
	je	LBB0_17
## %bb.18:
	movl	$-1, %edi
	callq	_I
	movl	%eax, %r13d
	andl	%r12d, %r13d
	movl	$2, %edi
	callq	_I
	movl	8(%rbx), %ecx
	cmpl	%eax, %r13d
	jne	LBB0_21
## %bb.19:
	movq	_ARC_REGISTER_READONLY@GOTPCREL(%rip), %rax
	testl	%ecx, (%rax)
	je	LBB0_24
## %bb.20:
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_23
LBB0_1:
	movq	%r8, %r13
	movq	%r8, %rdi
	callq	_ARC_SHIMM_CONST_P
	testq	%rax, %rax
	je	LBB0_10
## %bb.2:
	movq	_cond_p@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	jne	LBB0_10
## %bb.3:
	movq	_shimm_p@GOTPCREL(%rip), %rcx
	cmpl	$0, (%rcx)
	movq	_shimm@GOTPCREL(%rip), %rdx
	je	LBB0_5
## %bb.4:
	cmpq	%r13, (%rdx)
	je	LBB0_5
LBB0_10:
	movq	_limm_p@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	movq	_limm@GOTPCREL(%rip), %rcx
	je	LBB0_12
## %bb.11:
	cmpq	%r13, (%rcx)
	je	LBB0_12
## %bb.13:
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_14
LBB0_25:
	cmpb	$97, (%r14)
	je	LBB0_27
## %bb.26:
	movl	$-1, %edi
	callq	_I
	movl	%eax, %r13d
	andl	%r12d, %r13d
	movl	$2, %edi
	callq	_I
	cmpl	%eax, %r13d
	jge	LBB0_29
LBB0_27:
	movq	_ARC_REGISTER_READONLY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%rbx)
	je	LBB0_29
## %bb.28:
	leaq	L_.str.2(%rip), %rdi
	callq	__
	movq	%rax, (%r15)
LBB0_29:
	cmpb	$97, (%r14)
	je	LBB0_32
## %bb.30:
	movq	_ARC_REGISTER_WRITEONLY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%rbx)
	je	LBB0_32
## %bb.31:
	leaq	L_.str.3(%rip), %rdi
	callq	__
	movq	%rax, (%r15)
LBB0_32:
	movl	12(%rbx), %eax
	cmpl	$61, %eax
	jb	LBB0_34
## %bb.33:
	leaq	L_.str.4(%rip), %rdi
	callq	__
	movl	12(%rbx), %edx
	leaq	_insert_reg.buf(%rip), %r13
	movq	%r13, %rdi
	movq	%rax, %rsi
	callq	_sprintf
	movq	%r13, (%r15)
	movl	12(%rbx), %eax
LBB0_34:
	movb	4(%r14), %cl
	shll	%cl, %eax
	orl	%eax, %r12d
	movq	_OP_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	jmp	LBB0_35
LBB0_12:
	movq	_OP_LIMM@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r15d
	movl	$1, (%rax)
	movq	%r13, (%rcx)
	movq	_ARC_REG_LIMM@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movb	4(%r14), %cl
	shll	%cl, %eax
	orl	%eax, %r12d
	jmp	LBB0_35
LBB0_17:
	leaq	L_.str.1(%rip), %rdi
LBB0_14:
	callq	__
	movq	%rax, (%r15)
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	jmp	LBB0_35
LBB0_21:
	movq	_ARC_REGISTER_WRITEONLY@GOTPCREL(%rip), %rax
	testl	%ecx, (%rax)
	je	LBB0_24
## %bb.22:
	leaq	L_.str.3(%rip), %rdi
LBB0_23:
	callq	__
	movq	%rax, (%r15)
LBB0_24:
	movq	_ARC_REG_SHIMM@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movb	4(%r14), %cl
	shll	%cl, %eax
	orl	%r12d, %eax
	movl	12(%rbx), %r12d
	movq	_arc_operands@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	(%rbx), %rdx
	movb	(%rcx,%rdx,4), %cl
	shll	%cl, %r12d
	orl	%eax, %r12d
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	jmp	LBB0_35
LBB0_5:
	movq	_OP_SHIMM@GOTPCREL(%rip), %rax
	cmpb	$97, (%r14)
	je	LBB0_8
## %bb.6:
	movl	$1, (%rcx)
	movq	%r13, (%rdx)
	movq	_flagshimm_handled_p@GOTPCREL(%rip), %rcx
	movl	$1, (%rcx)
	movq	_flag_p@GOTPCREL(%rip), %rcx
	cmpq	$0, (%rcx)
	jne	LBB0_7
LBB0_8:
	movq	_ARC_REG_SHIMM@GOTPCREL(%rip), %rcx
	jmp	LBB0_9
LBB0_7:
	movq	_ARC_REG_SHIMM_UPDATE@GOTPCREL(%rip), %rcx
LBB0_9:
	movl	(%rcx), %edx
	movl	(%rax), %r15d
	movb	4(%r14), %cl
	shll	%cl, %edx
	orl	%edx, %r12d
LBB0_35:
	movsbl	(%r14), %ecx
	addl	$-79, %ecx
	cmpl	$36, %ecx
	ja	LBB0_42
## %bb.36:
	movq	_LS_DEST@GOTPCREL(%rip), %rax
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%rcx,4), %rcx
	addq	%rdx, %rcx
	jmpq	*%rcx
LBB0_38:
	movl	$-1, %edi
	callq	_I
	movl	%eax, %ebx
	andl	%r12d, %ebx
	movl	$2, %edi
	callq	_I
	cmpl	%eax, %ebx
	jne	LBB0_40
## %bb.39:
	movq	_LS_VALUE@GOTPCREL(%rip), %rax
	jmp	LBB0_41
LBB0_40:
	movq	_LS_OFFSET@GOTPCREL(%rip), %rax
	jmp	LBB0_41
LBB0_37:
	movq	_LS_BASE@GOTPCREL(%rip), %rax
LBB0_41:
	movq	_ls_operand@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	(%rax), %rax
	movl	%r15d, (%rcx,%rax,4)
LBB0_42:
	movl	%r12d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_40, LBB0_40-LJTI0_0
.set L0_0_set_42, LBB0_42-LJTI0_0
.set L0_0_set_41, LBB0_41-LJTI0_0
.set L0_0_set_38, LBB0_38-LJTI0_0
.set L0_0_set_37, LBB0_37-LJTI0_0
LJTI0_0:
	.long	L0_0_set_40
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_41
	.long	L0_0_set_42
	.long	L0_0_set_38
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_40
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_42
	.long	L0_0_set_37
	.end_data_region
                                        ## -- End function
.zerofill __DATA,__bss,_insert_reg.buf,100,4 ## @insert_reg.buf
	.comm	_OP_NONE,4,2                    ## @OP_NONE
	.comm	_cond_p,4,2                     ## @cond_p
	.comm	_shimm_p,4,2                    ## @shimm_p
	.comm	_shimm,8,3                      ## @shimm
	.comm	_OP_SHIMM,4,2                   ## @OP_SHIMM
	.comm	_flagshimm_handled_p,4,2        ## @flagshimm_handled_p
	.comm	_flag_p,8,3                     ## @flag_p
	.comm	_ARC_REG_SHIMM_UPDATE,4,2       ## @ARC_REG_SHIMM_UPDATE
	.comm	_ARC_REG_SHIMM,4,2              ## @ARC_REG_SHIMM
	.comm	_limm_p,4,2                     ## @limm_p
	.comm	_limm,8,3                       ## @limm
	.comm	_OP_LIMM,4,2                    ## @OP_LIMM
	.comm	_ARC_REG_LIMM,4,2               ## @ARC_REG_LIMM
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"unable to fit different valued constants into instruction"

	.comm	_AUXREG,8,3                     ## @AUXREG
	.comm	_ARC_MOD_AUXREG,4,2             ## @ARC_MOD_AUXREG
L_.str.1:                               ## @.str.1
	.asciz	"auxiliary register not allowed here"

	.comm	_ARC_REGISTER_READONLY,4,2      ## @ARC_REGISTER_READONLY
L_.str.2:                               ## @.str.2
	.asciz	"attempt to set readonly register"

	.comm	_ARC_REGISTER_WRITEONLY,4,2     ## @ARC_REGISTER_WRITEONLY
L_.str.3:                               ## @.str.3
	.asciz	"attempt to read writeonly register"

	.comm	_arc_operands,8,3               ## @arc_operands
L_.str.4:                               ## @.str.4
	.asciz	"invalid register number `%d'"

	.comm	_OP_REG,4,2                     ## @OP_REG
	.comm	_ls_operand,8,3                 ## @ls_operand
	.comm	_LS_DEST,8,3                    ## @LS_DEST
	.comm	_LS_BASE,8,3                    ## @LS_BASE
	.comm	_LS_VALUE,8,3                   ## @LS_VALUE
	.comm	_LS_OFFSET,8,3                  ## @LS_OFFSET
	.no_dead_strip	_insert_reg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function insert_reg
_insert_reg:                            ; @insert_reg
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x5
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _OP_NONE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _OP_NONE@GOTPAGEOFF]
Lloh2:
	ldr	w24, [x8]
	cbz	x3, LBB0_6
; %bb.1:
	mov	x22, x3
	ldr	x8, [x3]
Lloh3:
	adrp	x9, _AUXREG@GOTPAGE
Lloh4:
	ldr	x9, [x9, _AUXREG@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_11
; %bb.2:
Lloh6:
	adrp	x8, _ARC_MOD_AUXREG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ARC_MOD_AUXREG@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	tst	w8, w2
	b.eq	LBB0_24
; %bb.3:
	mov	w0, #-1
	bl	_I
	and	w23, w0, w19
	mov	w0, #2
	bl	_I
	ldr	w8, [x22, #8]
	cmp	w23, w0
	b.ne	LBB0_26
; %bb.4:
Lloh9:
	adrp	x9, _ARC_REGISTER_READONLY@GOTPAGE
Lloh10:
	ldr	x9, [x9, _ARC_REGISTER_READONLY@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_29
; %bb.5:
Lloh12:
	adrp	x0, l_.str.2@PAGE
Lloh13:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_28
LBB0_6:
	mov	x23, x4
	mov	x0, x4
	bl	_ARC_SHIMM_CONST_P
	cbz	x0, LBB0_21
; %bb.7:
Lloh14:
	adrp	x8, _cond_p@GOTPAGE
Lloh15:
	ldr	x8, [x8, _cond_p@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	cbnz	w8, LBB0_21
; %bb.8:
Lloh17:
	adrp	x9, _shimm_p@GOTPAGE
Lloh18:
	ldr	x9, [x9, _shimm_p@GOTPAGEOFF]
	ldr	w10, [x9]
Lloh19:
	adrp	x8, _shimm@GOTPAGE
Lloh20:
	ldr	x8, [x8, _shimm@GOTPAGEOFF]
	ldr	x11, [x8]
	cmp	w10, #0
	ccmp	x11, x23, #4, ne
	b.ne	LBB0_21
; %bb.9:
Lloh21:
	adrp	x10, _OP_SHIMM@GOTPAGE
Lloh22:
	ldr	x10, [x10, _OP_SHIMM@GOTPAGEOFF]
Lloh23:
	ldr	w24, [x10]
	ldrb	w10, [x20]
	cmp	w10, #97
	b.ne	LBB0_30
; %bb.10:
Lloh24:
	adrp	x8, _ARC_REG_SHIMM@GOTPAGE
Lloh25:
	ldr	x8, [x8, _ARC_REG_SHIMM@GOTPAGEOFF]
	b	LBB0_31
LBB0_11:
	ldrb	w8, [x20]
	cmp	w8, #97
	b.eq	LBB0_13
; %bb.12:
	mov	w0, #-1
	bl	_I
	and	w23, w0, w19
	mov	w0, #2
	bl	_I
	cmp	w23, w0
	b.ge	LBB0_15
LBB0_13:
	ldr	w8, [x22, #8]
Lloh26:
	adrp	x9, _ARC_REGISTER_READONLY@GOTPAGE
Lloh27:
	ldr	x9, [x9, _ARC_REGISTER_READONLY@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_15
; %bb.14:
Lloh29:
	adrp	x0, l_.str.2@PAGE
Lloh30:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	__
	str	x0, [x21]
LBB0_15:
	ldrb	w8, [x20]
	cmp	w8, #97
	b.eq	LBB0_18
; %bb.16:
	ldr	w8, [x22, #8]
Lloh31:
	adrp	x9, _ARC_REGISTER_WRITEONLY@GOTPAGE
Lloh32:
	ldr	x9, [x9, _ARC_REGISTER_WRITEONLY@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_18
; %bb.17:
Lloh34:
	adrp	x0, l_.str.3@PAGE
Lloh35:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	__
	str	x0, [x21]
LBB0_18:
	ldr	w8, [x22, #12]
	cmp	w8, #61
	b.lo	LBB0_20
; %bb.19:
Lloh36:
	adrp	x0, l_.str.4@PAGE
Lloh37:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	__
	mov	x1, x0
	ldr	w2, [x22, #12]
Lloh38:
	adrp	x23, _insert_reg.buf@PAGE
Lloh39:
	add	x23, x23, _insert_reg.buf@PAGEOFF
	mov	x0, x23
	bl	_sprintf
	str	x23, [x21]
	ldr	w8, [x22, #12]
LBB0_20:
	ldr	w9, [x20, #4]
	lsl	w8, w8, w9
	orr	w19, w8, w19
Lloh40:
	adrp	x8, _OP_REG@GOTPAGE
Lloh41:
	ldr	x8, [x8, _OP_REG@GOTPAGEOFF]
Lloh42:
	ldr	w24, [x8]
	b	LBB0_32
LBB0_21:
Lloh43:
	adrp	x8, _limm_p@GOTPAGE
Lloh44:
	ldr	x8, [x8, _limm_p@GOTPAGEOFF]
	ldr	w10, [x8]
Lloh45:
	adrp	x9, _limm@GOTPAGE
Lloh46:
	ldr	x9, [x9, _limm@GOTPAGEOFF]
	ldr	x11, [x9]
	cmp	w10, #0
	ccmp	x11, x23, #4, ne
	b.ne	LBB0_23
; %bb.22:
Lloh47:
	adrp	x10, _OP_LIMM@GOTPAGE
Lloh48:
	ldr	x10, [x10, _OP_LIMM@GOTPAGEOFF]
Lloh49:
	ldr	w24, [x10]
	mov	w10, #1
	str	w10, [x8]
	str	x23, [x9]
Lloh50:
	adrp	x8, _ARC_REG_LIMM@GOTPAGE
Lloh51:
	ldr	x8, [x8, _ARC_REG_LIMM@GOTPAGEOFF]
	b	LBB0_31
LBB0_23:
Lloh52:
	adrp	x0, l_.str@PAGE
Lloh53:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_25
LBB0_24:
Lloh54:
	adrp	x0, l_.str.1@PAGE
Lloh55:
	add	x0, x0, l_.str.1@PAGEOFF
LBB0_25:
	bl	__
	str	x0, [x21]
	b	LBB0_32
LBB0_26:
Lloh56:
	adrp	x9, _ARC_REGISTER_WRITEONLY@GOTPAGE
Lloh57:
	ldr	x9, [x9, _ARC_REGISTER_WRITEONLY@GOTPAGEOFF]
Lloh58:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_29
; %bb.27:
Lloh59:
	adrp	x0, l_.str.3@PAGE
Lloh60:
	add	x0, x0, l_.str.3@PAGEOFF
LBB0_28:
	bl	__
	str	x0, [x21]
LBB0_29:
Lloh61:
	adrp	x8, _ARC_REG_SHIMM@GOTPAGE
Lloh62:
	ldr	x8, [x8, _ARC_REG_SHIMM@GOTPAGEOFF]
Lloh63:
	ldr	w8, [x8]
	ldr	w9, [x20, #4]
	lsl	w8, w8, w9
	orr	w8, w8, w19
	ldr	w9, [x22, #12]
Lloh64:
	adrp	x10, _arc_operands@GOTPAGE
Lloh65:
	ldr	x10, [x10, _arc_operands@GOTPAGEOFF]
Lloh66:
	ldr	x10, [x10]
	ldr	x11, [x22]
	ldr	w10, [x10, x11, lsl #2]
	lsl	w9, w9, w10
	orr	w19, w8, w9
	b	LBB0_32
LBB0_30:
	mov	w10, #1
	str	w10, [x9]
Lloh67:
	adrp	x9, _flagshimm_handled_p@GOTPAGE
Lloh68:
	ldr	x9, [x9, _flagshimm_handled_p@GOTPAGEOFF]
	str	x23, [x8]
Lloh69:
	str	w10, [x9]
Lloh70:
	adrp	x8, _flag_p@GOTPAGE
Lloh71:
	ldr	x8, [x8, _flag_p@GOTPAGEOFF]
Lloh72:
	adrp	x9, _ARC_REG_SHIMM_UPDATE@GOTPAGE
Lloh73:
	ldr	x9, [x9, _ARC_REG_SHIMM_UPDATE@GOTPAGEOFF]
Lloh74:
	ldr	x8, [x8]
Lloh75:
	adrp	x10, _ARC_REG_SHIMM@GOTPAGE
Lloh76:
	ldr	x10, [x10, _ARC_REG_SHIMM@GOTPAGEOFF]
	cmp	x8, #0
	csel	x8, x10, x9, eq
LBB0_31:
	ldr	w8, [x8]
	ldr	w9, [x20, #4]
	lsl	w8, w8, w9
	orr	w19, w8, w19
LBB0_32:
	ldrsb	w8, [x20]
	sub	w9, w8, #79
	cmp	w9, #36
	b.hi	LBB0_38
; %bb.33:
Lloh77:
	adrp	x8, _LS_DEST@GOTPAGE
Lloh78:
	ldr	x8, [x8, _LS_DEST@GOTPAGEOFF]
Lloh79:
	adrp	x10, lJTI0_0@PAGE
Lloh80:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_34
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_34:
Lloh81:
	adrp	x8, _LS_OFFSET@GOTPAGE
Lloh82:
	ldr	x8, [x8, _LS_OFFSET@GOTPAGEOFF]
	b	LBB0_37
LBB0_35:
	mov	w0, #-1
	bl	_I
	and	w20, w0, w19
	mov	w0, #2
	bl	_I
Lloh83:
	adrp	x8, _LS_OFFSET@GOTPAGE
Lloh84:
	ldr	x8, [x8, _LS_OFFSET@GOTPAGEOFF]
Lloh85:
	adrp	x9, _LS_VALUE@GOTPAGE
Lloh86:
	ldr	x9, [x9, _LS_VALUE@GOTPAGEOFF]
	cmp	w20, w0
	csel	x8, x9, x8, eq
	b	LBB0_37
LBB0_36:
Lloh87:
	adrp	x8, _LS_BASE@GOTPAGE
Lloh88:
	ldr	x8, [x8, _LS_BASE@GOTPAGEOFF]
LBB0_37:
Lloh89:
	adrp	x9, _ls_operand@GOTPAGE
Lloh90:
	ldr	x9, [x9, _ls_operand@GOTPAGEOFF]
Lloh91:
	ldr	x9, [x9]
	ldr	x8, [x8]
	str	w24, [x9, x8, lsl #2]
LBB0_38:
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpAdd	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpAdd	Lloh52, Lloh53
	.loh AdrpAdd	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpAdd	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh74
	.loh AdrpLdrGotStr	Lloh67, Lloh68, Lloh69
	.loh AdrpAdd	Lloh79, Lloh80
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpLdrGot	Lloh81, Lloh82
	.loh AdrpLdrGot	Lloh85, Lloh86
	.loh AdrpLdrGot	Lloh83, Lloh84
	.loh AdrpLdrGot	Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_34-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_37-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_35-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_34-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_38-LBB0_34)>>2
	.byte	(LBB0_36-LBB0_34)>>2
                                        ; -- End function
.zerofill __DATA,__bss,_insert_reg.buf,100,0 ; @insert_reg.buf
	.comm	_OP_NONE,4,2                    ; @OP_NONE
	.comm	_cond_p,4,2                     ; @cond_p
	.comm	_shimm_p,4,2                    ; @shimm_p
	.comm	_shimm,8,3                      ; @shimm
	.comm	_OP_SHIMM,4,2                   ; @OP_SHIMM
	.comm	_flagshimm_handled_p,4,2        ; @flagshimm_handled_p
	.comm	_flag_p,8,3                     ; @flag_p
	.comm	_ARC_REG_SHIMM_UPDATE,4,2       ; @ARC_REG_SHIMM_UPDATE
	.comm	_ARC_REG_SHIMM,4,2              ; @ARC_REG_SHIMM
	.comm	_limm_p,4,2                     ; @limm_p
	.comm	_limm,8,3                       ; @limm
	.comm	_OP_LIMM,4,2                    ; @OP_LIMM
	.comm	_ARC_REG_LIMM,4,2               ; @ARC_REG_LIMM
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"unable to fit different valued constants into instruction"

	.comm	_AUXREG,8,3                     ; @AUXREG
	.comm	_ARC_MOD_AUXREG,4,2             ; @ARC_MOD_AUXREG
l_.str.1:                               ; @.str.1
	.asciz	"auxiliary register not allowed here"

	.comm	_ARC_REGISTER_READONLY,4,2      ; @ARC_REGISTER_READONLY
l_.str.2:                               ; @.str.2
	.asciz	"attempt to set readonly register"

	.comm	_ARC_REGISTER_WRITEONLY,4,2     ; @ARC_REGISTER_WRITEONLY
l_.str.3:                               ; @.str.3
	.asciz	"attempt to read writeonly register"

	.comm	_arc_operands,8,3               ; @arc_operands
l_.str.4:                               ; @.str.4
	.asciz	"invalid register number `%d'"

	.comm	_OP_REG,4,2                     ; @OP_REG
	.comm	_ls_operand,8,3                 ; @ls_operand
	.comm	_LS_DEST,8,3                    ; @LS_DEST
	.comm	_LS_BASE,8,3                    ; @LS_BASE
	.comm	_LS_VALUE,8,3                   ; @LS_VALUE
	.comm	_LS_OFFSET,8,3                  ; @LS_OFFSET
	.no_dead_strip	_insert_reg
.subsections_via_symbols
