	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function snd_vt1724_spdif_sw_put
_snd_vt1724_spdif_sw_put:               ## @snd_vt1724_spdif_sw_put
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	callq	_snd_kcontrol_chip
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	_spin_lock_irq
	movq	_SPDIF_CFG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_ICEREG1724
	movl	%eax, %edi
	callq	_inb
	movl	%eax, %r12d
	movq	_VT1724_CFG_SPDIF_OUT_EN@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	movl	%eax, %ecx
	notb	%cl
	andb	%r12b, %cl
	movq	(%r15), %rdx
	orb	%r12b, %al
	cmpq	$0, (%rdx)
	movzbl	%al, %eax
	movzbl	%cl, %r15d
	cmovnel	%eax, %r15d
	cmpb	%r15b, %r12b
	je	LBB0_2
## %bb.1:
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_ICEREG1724
	movzbl	%r15b, %edi
	movl	%eax, %esi
	callq	_outb
LBB0_2:
	xorl	%ebx, %ebx
	cmpb	%r15b, %r12b
	setne	%bl
	movq	%r14, %rdi
	callq	_spin_unlock_irq
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SPDIF_CFG,4,2                  ## @SPDIF_CFG
	.comm	_VT1724_CFG_SPDIF_OUT_EN,1,0    ## @VT1724_CFG_SPDIF_OUT_EN
	.no_dead_strip	_snd_vt1724_spdif_sw_put
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function snd_vt1724_spdif_sw_put
_snd_vt1724_spdif_sw_put:               ; @snd_vt1724_spdif_sw_put
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x1
	bl	_snd_kcontrol_chip
	mov	x19, x0
	bl	_spin_lock_irq
Lloh0:
	adrp	x22, _SPDIF_CFG@GOTPAGE
Lloh1:
	ldr	x22, [x22, _SPDIF_CFG@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_ICEREG1724
	bl	_inb
	mov	x20, x0
Lloh2:
	adrp	x8, _VT1724_CFG_SPDIF_OUT_EN@GOTPAGE
Lloh3:
	ldr	x8, [x8, _VT1724_CFG_SPDIF_OUT_EN@GOTPAGEOFF]
	ldrb	w8, [x8]
	bic	w9, w0, w8
	ldr	x10, [x21]
	ldr	x10, [x10]
	orr	w8, w8, w0
	cmp	x10, #0
	csel	w21, w9, w8, eq
	cmp	w0, w21, uxtb
	b.eq	LBB0_2
; %bb.1:
	ldr	w1, [x22]
	mov	x0, x19
	bl	_ICEREG1724
	mov	x1, x0
	and	w0, w21, #0xff
	bl	_outb
LBB0_2:
	cmp	w20, w21, uxtb
	cset	w20, ne
	mov	x0, x19
	bl	_spin_unlock_irq
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_SPDIF_CFG,4,2                  ; @SPDIF_CFG
	.comm	_VT1724_CFG_SPDIF_OUT_EN,1,0    ; @VT1724_CFG_SPDIF_OUT_EN
	.no_dead_strip	_snd_vt1724_spdif_sw_put
.subsections_via_symbols
