	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mcasp_start_tx
_mcasp_start_tx:                        ## @mcasp_start_tx
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_DAVINCI_MCASP_GBLCTLX_REG@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	addq	16(%r14), %rdi
	movq	_TXHCLKRST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_mcasp_set_ctl_reg
	movq	(%rbx), %rdi
	addq	16(%r14), %rdi
	movq	_TXCLKRST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_mcasp_set_ctl_reg
	movq	(%rbx), %rdi
	addq	16(%r14), %rdi
	movq	_TXSERCLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_mcasp_set_ctl_reg
	movq	_DAVINCI_MCASP_TXBUF_REG@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	16(%r14), %rdi
	xorl	%r13d, %r13d
	xorl	%esi, %esi
	callq	_mcasp_set_reg
	movq	(%rbx), %rdi
	addq	16(%r14), %rdi
	movq	_TXSMRST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_mcasp_set_ctl_reg
	movq	(%rbx), %rdi
	addq	16(%r14), %rdi
	movq	_TXFSRST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_mcasp_set_ctl_reg
	movq	(%r15), %rdi
	addq	16(%r14), %rdi
	xorl	%esi, %esi
	callq	_mcasp_set_reg
	movq	(%r14), %rax
	testq	%rax, %rax
	je	LBB0_4
## %bb.1:
	movq	8(%r14), %rcx
	movq	_TX_MODE@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	xorl	%r15d, %r15d
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	cmpq	%rdx, (%rcx,%r15,8)
	je	LBB0_5
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	incq	%r15
	cmpq	%r15, %rax
	jne	LBB0_2
LBB0_4:
	xorl	%r15d, %r15d
LBB0_5:
	movq	_TXSTATE@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	16(%r14), %rbx
	movq	%r15, %rdi
	callq	_DAVINCI_MCASP_XRSRCTL_REG
	addq	%rax, %rbx
	movq	%rbx, %rdi
	callq	_mcasp_get_reg
	testl	%eax, (%r12)
	jne	LBB0_8
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=1
	leal	1(%r13), %eax
	cmpl	$100000, %r13d                  ## imm = 0x186A0
	movl	%eax, %r13d
	jb	LBB0_6
LBB0_8:
	movq	_DAVINCI_MCASP_TXBUF_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	16(%r14), %rdi
	xorl	%esi, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mcasp_set_reg                  ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DAVINCI_MCASP_GBLCTLX_REG,8,3  ## @DAVINCI_MCASP_GBLCTLX_REG
	.comm	_TXHCLKRST,4,2                  ## @TXHCLKRST
	.comm	_TXCLKRST,4,2                   ## @TXCLKRST
	.comm	_TXSERCLR,4,2                   ## @TXSERCLR
	.comm	_DAVINCI_MCASP_TXBUF_REG,8,3    ## @DAVINCI_MCASP_TXBUF_REG
	.comm	_TXSMRST,4,2                    ## @TXSMRST
	.comm	_TXFSRST,4,2                    ## @TXFSRST
	.comm	_TX_MODE,8,3                    ## @TX_MODE
	.comm	_TXSTATE,4,2                    ## @TXSTATE
	.no_dead_strip	_mcasp_start_tx
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mcasp_start_tx
_mcasp_start_tx:                        ; @mcasp_start_tx
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x20, _DAVINCI_MCASP_GBLCTLX_REG@GOTPAGE
Lloh1:
	ldr	x20, [x20, _DAVINCI_MCASP_GBLCTLX_REG@GOTPAGEOFF]
	ldr	x8, [x0, #16]
	ldr	x9, [x20]
	add	x0, x9, x8
Lloh2:
	adrp	x8, _TXHCLKRST@GOTPAGE
Lloh3:
	ldr	x8, [x8, _TXHCLKRST@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	bl	_mcasp_set_ctl_reg
	ldr	x8, [x19, #16]
	ldr	x9, [x20]
	add	x0, x9, x8
Lloh5:
	adrp	x8, _TXCLKRST@GOTPAGE
Lloh6:
	ldr	x8, [x8, _TXCLKRST@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	bl	_mcasp_set_ctl_reg
	ldr	x8, [x19, #16]
	ldr	x9, [x20]
	add	x0, x9, x8
Lloh8:
	adrp	x8, _TXSERCLR@GOTPAGE
Lloh9:
	ldr	x8, [x8, _TXSERCLR@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	bl	_mcasp_set_ctl_reg
	ldr	x8, [x19, #16]
Lloh11:
	adrp	x21, _DAVINCI_MCASP_TXBUF_REG@GOTPAGE
Lloh12:
	ldr	x21, [x21, _DAVINCI_MCASP_TXBUF_REG@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	mov	w1, #0
	bl	_mcasp_set_reg
	ldr	x8, [x19, #16]
	ldr	x9, [x20]
	add	x0, x9, x8
Lloh13:
	adrp	x8, _TXSMRST@GOTPAGE
Lloh14:
	ldr	x8, [x8, _TXSMRST@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	bl	_mcasp_set_ctl_reg
	ldr	x8, [x19, #16]
	ldr	x9, [x20]
	add	x0, x9, x8
Lloh16:
	adrp	x8, _TXFSRST@GOTPAGE
Lloh17:
	ldr	x8, [x8, _TXFSRST@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	bl	_mcasp_set_ctl_reg
	ldr	x8, [x19, #16]
	ldr	x9, [x21]
	add	x0, x9, x8
	mov	w1, #0
	bl	_mcasp_set_reg
	ldr	x8, [x19]
	cbz	x8, LBB0_4
; %bb.1:
	mov	x20, #0
	ldr	x9, [x19, #8]
Lloh19:
	adrp	x10, _TX_MODE@GOTPAGE
Lloh20:
	ldr	x10, [x10, _TX_MODE@GOTPAGEOFF]
Lloh21:
	ldr	x10, [x10]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x11, [x9, x20, lsl #3]
	cmp	x11, x10
	b.eq	LBB0_5
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	add	x20, x20, #1
	cmp	x8, x20
	b.ne	LBB0_2
LBB0_4:
	mov	x20, #0
LBB0_5:
	mov	w22, #0
Lloh22:
	adrp	x23, _TXSTATE@GOTPAGE
Lloh23:
	ldr	x23, [x23, _TXSTATE@GOTPAGEOFF]
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x24, [x19, #16]
	mov	x0, x20
	bl	_DAVINCI_MCASP_XRSRCTL_REG
	add	x0, x0, x24
	bl	_mcasp_get_reg
	ldr	w8, [x23]
	tst	w8, w0
	b.ne	LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	lsr	w8, w22, #5
	add	w22, w22, #1
	cmp	w8, #3125
	b.lo	LBB0_6
LBB0_8:
	ldr	x8, [x19, #16]
	ldr	x9, [x21]
	add	x0, x9, x8
	mov	w1, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_mcasp_set_reg
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_DAVINCI_MCASP_GBLCTLX_REG,8,3  ; @DAVINCI_MCASP_GBLCTLX_REG
	.comm	_TXHCLKRST,4,2                  ; @TXHCLKRST
	.comm	_TXCLKRST,4,2                   ; @TXCLKRST
	.comm	_TXSERCLR,4,2                   ; @TXSERCLR
	.comm	_DAVINCI_MCASP_TXBUF_REG,8,3    ; @DAVINCI_MCASP_TXBUF_REG
	.comm	_TXSMRST,4,2                    ; @TXSMRST
	.comm	_TXFSRST,4,2                    ; @TXFSRST
	.comm	_TX_MODE,8,3                    ; @TX_MODE
	.comm	_TXSTATE,4,2                    ; @TXSTATE
	.no_dead_strip	_mcasp_start_tx
.subsections_via_symbols
