	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_print_arm_disassembler_options ## -- Begin function print_arm_disassembler_options
	.p2align	4, 0x90
_print_arm_disassembler_options:        ## @print_arm_disassembler_options
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	leaq	L_.str(%rip), %rdi
	callq	__
	movq	%r15, %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_fprintf
	movq	_NUM_ARM_REGNAMES@GOTPCREL(%rip), %rax
	movslq	(%rax), %r13
	testq	%r13, %r13
	je	LBB0_3
## %bb.1:
	movq	%r13, %rbx
	shlq	$4, %rbx
	movq	_regnames@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r14), %rax
	movq	-16(%rax,%rbx), %r12
	movq	%r12, %rdi
	callq	_strlen
	movl	$14, %ecx
	subl	%eax, %ecx
	movq	(%r14), %rax
	movl	-8(%rax,%rbx), %r9d
	movq	%r15, %rdi
	leaq	L_.str.1(%rip), %rsi
	movq	%r12, %rdx
	movl	$32, %r8d
	xorl	%eax, %eax
	callq	_fprintf
	addq	$-16, %rbx
	decl	%r13d
	jne	LBB0_2
LBB0_3:
	leaq	L_.str.2(%rip), %rdi
	movl	$60, %esi
	movl	$1, %edx
	movq	%r15, %rcx
	callq	_fwrite
	leaq	L_.str.3(%rip), %rdi
	movl	$81, %esi
	movl	$1, %edx
	movq	%r15, %rcx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_fwrite                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\nThe following ARM specific disassembler options are supported for use with\nthe -M switch:\n"

	.comm	_NUM_ARM_REGNAMES,4,2           ## @NUM_ARM_REGNAMES
L_.str.1:                               ## @.str.1
	.asciz	"  reg-names-%s %*c%s\n"

	.comm	_regnames,8,3                   ## @regnames
L_.str.2:                               ## @.str.2
	.asciz	"  force-thumb              Assume all insns are Thumb insns\n"

L_.str.3:                               ## @.str.3
	.asciz	"  no-force-thumb           Examine preceeding label to determine an insn's type\n\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_print_arm_disassembler_options ; -- Begin function print_arm_disassembler_options
	.p2align	2
_print_arm_disassembler_options:        ; @print_arm_disassembler_options
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh2:
	adrp	x8, _NUM_ARM_REGNAMES@GOTPAGE
Lloh3:
	ldr	x8, [x8, _NUM_ARM_REGNAMES@GOTPAGEOFF]
Lloh4:
	ldr	w22, [x8]
	cbz	w22, LBB0_3
; %bb.1:
	sxtw	x8, w22
	lsl	x23, x8, #4
Lloh5:
	adrp	x24, _regnames@GOTPAGE
Lloh6:
	ldr	x24, [x24, _regnames@GOTPAGEOFF]
	mov	w25, #14
	mov	w26, #32
Lloh7:
	adrp	x20, l_.str.1@PAGE
Lloh8:
	add	x20, x20, l_.str.1@PAGEOFF
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x24]
	add	x8, x8, x23
	ldur	x21, [x8, #-16]
	mov	x0, x21
	bl	_strlen
	sub	w8, w25, w0
	ldr	x9, [x24]
	add	x9, x9, x23
	ldur	w9, [x9, #-8]
	stp	x26, x9, [sp, #16]
	stp	x21, x8, [sp]
	mov	x0, x19
	mov	x1, x20
	bl	_fprintf
	sub	x23, x23, #16
	sub	w22, w22, #1
	cbnz	w22, LBB0_2
LBB0_3:
Lloh9:
	adrp	x0, l_.str.2@PAGE
Lloh10:
	add	x0, x0, l_.str.2@PAGEOFF
	mov	w1, #60
	mov	w2, #1
	mov	x3, x19
	bl	_fwrite
Lloh11:
	adrp	x0, l_.str.3@PAGE
Lloh12:
	add	x0, x0, l_.str.3@PAGEOFF
	mov	w1, #81
	mov	w2, #1
	mov	x3, x19
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_fwrite
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\nThe following ARM specific disassembler options are supported for use with\nthe -M switch:\n"

	.comm	_NUM_ARM_REGNAMES,4,2           ; @NUM_ARM_REGNAMES
l_.str.1:                               ; @.str.1
	.asciz	"  reg-names-%s %*c%s\n"

	.comm	_regnames,8,3                   ; @regnames
l_.str.2:                               ; @.str.2
	.asciz	"  force-thumb              Assume all insns are Thumb insns\n"

l_.str.3:                               ; @.str.3
	.asciz	"  no-force-thumb           Examine preceeding label to determine an insn's type\n\n"

.subsections_via_symbols
