	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bypass_event
_bypass_event:                          ## @bypass_event
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	(%rdi), %rdi
	movq	8(%r15), %rax
	movq	(%rax), %rbx
	movq	8(%rdi), %r14
	movl	(%rbx), %esi
	callq	_twl4030_read_reg_cache
	movl	(%rbx), %ecx
	movq	_TWL4030_REG_VSTPGA@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	jne	LBB0_4
## %bb.1:
	movl	(%r14), %ecx
	testb	%al, %al
	je	LBB0_3
## %bb.2:
	orl	$32, %ecx
	movl	%ecx, (%r14)
	jmp	LBB0_15
LBB0_4:
	movq	_TWL4030_REG_ARXR2_APGA_CTL@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	jle	LBB0_5
## %bb.8:
	movq	_TWL4030_REG_VDL_APGA_CTL@GOTPCREL(%rip), %rsi
	movzbl	%al, %edx
	movl	4(%rbx), %eax
	cmpl	(%rsi), %ecx
	jne	LBB0_12
## %bb.9:
	btl	%eax, %edx
	movl	(%r14), %eax
	jae	LBB0_11
## %bb.10:
	orl	$16, %eax
	movl	%eax, (%r14)
	jmp	LBB0_15
LBB0_5:
	movzbl	%al, %edx
	movl	4(%rbx), %esi
	movq	_TWL4030_REG_ARXL1_APGA_CTL@GOTPCREL(%rip), %rax
	subl	(%rax), %ecx
	movl	$1, %eax
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %eax
	btl	%esi, %edx
	jae	LBB0_7
## %bb.6:
	orl	%eax, (%r14)
	jmp	LBB0_15
LBB0_3:
	andl	$-33, %ecx
	movl	%ecx, (%r14)
	jmp	LBB0_15
LBB0_12:
	movl	%eax, %ecx
	shrl	%cl, %edx
	xorl	%ecx, %ecx
	testb	$7, %dl
	je	LBB0_14
## %bb.13:
	testl	%eax, %eax
	setne	%cl
	shll	$6, %ecx
	addl	$64, %ecx
	orl	%ecx, (%r14)
	jmp	LBB0_15
LBB0_7:
	notl	%eax
	andl	%eax, (%r14)
	jmp	LBB0_15
LBB0_11:
	andl	$-17, %eax
	movl	%eax, (%r14)
	jmp	LBB0_15
LBB0_14:
	testl	%eax, %eax
	sete	%cl
	shll	$6, %ecx
	addl	$-129, %ecx
	andl	%ecx, (%r14)
LBB0_15:
	movq	(%r15), %rdi
	movq	_TWL4030_REG_MISC_SET_1@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	callq	_twl4030_read_reg_cache
	movq	_TWL4030_FMLOOP_EN@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%ecx, %edx
	orb	%al, %dl
	notb	%cl
	andb	%al, %cl
	testb	$31, (%r14)
	movzbl	%dl, %eax
	movzbl	%cl, %ecx
	cmovnel	%eax, %ecx
	movq	(%r15), %rdi
	movl	(%rbx), %esi
	movzbl	%cl, %edx
	callq	_twl4030_write
	movq	(%r15), %rdi
	movq	(%rdi), %rax
	movq	_SND_SOC_BIAS_STANDBY@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_17
## %bb.16:
	xorl	%esi, %esi
	cmpl	$0, (%r14)
	sete	%sil
	callq	_twl4030_codec_mute
LBB0_17:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TWL4030_REG_VSTPGA,4,2         ## @TWL4030_REG_VSTPGA
	.comm	_TWL4030_REG_ARXR2_APGA_CTL,4,2 ## @TWL4030_REG_ARXR2_APGA_CTL
	.comm	_TWL4030_REG_ARXL1_APGA_CTL,4,2 ## @TWL4030_REG_ARXL1_APGA_CTL
	.comm	_TWL4030_REG_VDL_APGA_CTL,4,2   ## @TWL4030_REG_VDL_APGA_CTL
	.comm	_TWL4030_REG_MISC_SET_1,4,2     ## @TWL4030_REG_MISC_SET_1
	.comm	_TWL4030_FMLOOP_EN,1,0          ## @TWL4030_FMLOOP_EN
	.comm	_SND_SOC_BIAS_STANDBY,8,3       ## @SND_SOC_BIAS_STANDBY
	.no_dead_strip	_bypass_event
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bypass_event
_bypass_event:                          ; @bypass_event
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldp	x0, x8, [x0]
	ldr	x21, [x8]
	ldr	x20, [x0, #8]
	ldr	w1, [x21]
	bl	_twl4030_read_reg_cache
	ldr	w8, [x21]
Lloh0:
	adrp	x9, _TWL4030_REG_VSTPGA@GOTPAGE
Lloh1:
	ldr	x9, [x9, _TWL4030_REG_VSTPGA@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_3
; %bb.1:
	ldr	w8, [x20]
	cbz	w0, LBB0_9
; %bb.2:
	orr	w8, w8, #0x20
	b	LBB0_15
LBB0_3:
Lloh3:
	adrp	x9, _TWL4030_REG_ARXR2_APGA_CTL@GOTPAGE
Lloh4:
	ldr	x9, [x9, _TWL4030_REG_ARXR2_APGA_CTL@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	cmp	w8, w9
	b.le	LBB0_7
; %bb.4:
Lloh6:
	adrp	x9, _TWL4030_REG_VDL_APGA_CTL@GOTPAGE
Lloh7:
	ldr	x9, [x9, _TWL4030_REG_VDL_APGA_CTL@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x9]
	ldr	w9, [x21, #4]
	cmp	w8, w10
	b.ne	LBB0_10
; %bb.5:
	ldr	w8, [x20]
	lsr	w9, w0, w9
	tbz	w9, #0, LBB0_13
; %bb.6:
	orr	w8, w8, #0x10
	b	LBB0_15
LBB0_7:
Lloh9:
	adrp	x9, _TWL4030_REG_ARXL1_APGA_CTL@GOTPAGE
Lloh10:
	ldr	x9, [x9, _TWL4030_REG_ARXL1_APGA_CTL@GOTPAGEOFF]
	ldr	w10, [x21, #4]
Lloh11:
	ldr	w9, [x9]
	sub	w8, w8, w9
	mov	w9, #1
	lsl	w8, w9, w8
	lsr	w9, w0, w10
	tbz	w9, #0, LBB0_12
; %bb.8:
	ldr	w9, [x20]
	orr	w8, w8, w9
	b	LBB0_15
LBB0_9:
	and	w8, w8, #0xffffffdf
	b	LBB0_15
LBB0_10:
	lsr	w8, w0, w9
	tst	w8, #0x7
	b.eq	LBB0_14
; %bb.11:
	mov	w8, #128
	mov	w10, #64
	cmp	w9, #0
	csel	w8, w10, w8, eq
	ldr	w9, [x20]
	orr	w8, w9, w8
	b	LBB0_15
LBB0_12:
	ldr	w9, [x20]
	bic	w8, w9, w8
	b	LBB0_15
LBB0_13:
	and	w8, w8, #0xffffffef
	b	LBB0_15
LBB0_14:
	mov	w8, #-129
	mov	w10, #-65
	cmp	w9, #0
	csel	w8, w10, w8, eq
	ldr	w9, [x20]
	and	w8, w9, w8
LBB0_15:
	str	w8, [x20]
	ldr	x0, [x19]
Lloh12:
	adrp	x21, _TWL4030_REG_MISC_SET_1@GOTPAGE
Lloh13:
	ldr	x21, [x21, _TWL4030_REG_MISC_SET_1@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_twl4030_read_reg_cache
	ldr	w8, [x20]
Lloh14:
	adrp	x9, _TWL4030_FMLOOP_EN@GOTPAGE
Lloh15:
	ldr	x9, [x9, _TWL4030_FMLOOP_EN@GOTPAGEOFF]
	ldrb	w9, [x9]
	orr	w10, w9, w0
	bic	w9, w0, w9
	tst	w8, #0x1f
	csel	w8, w9, w10, eq
	ldr	x0, [x19]
	ldr	w1, [x21]
	and	w2, w8, #0xff
	bl	_twl4030_write
	ldr	x0, [x19]
	ldr	x8, [x0]
Lloh16:
	adrp	x9, _SND_SOC_BIAS_STANDBY@GOTPAGE
Lloh17:
	ldr	x9, [x9, _SND_SOC_BIAS_STANDBY@GOTPAGEOFF]
Lloh18:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_17
; %bb.16:
	ldr	w8, [x20]
	cmp	w8, #0
	cset	w1, eq
	bl	_twl4030_codec_mute
LBB0_17:
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_TWL4030_REG_VSTPGA,4,2         ; @TWL4030_REG_VSTPGA
	.comm	_TWL4030_REG_ARXR2_APGA_CTL,4,2 ; @TWL4030_REG_ARXR2_APGA_CTL
	.comm	_TWL4030_REG_ARXL1_APGA_CTL,4,2 ; @TWL4030_REG_ARXL1_APGA_CTL
	.comm	_TWL4030_REG_VDL_APGA_CTL,4,2   ; @TWL4030_REG_VDL_APGA_CTL
	.comm	_TWL4030_REG_MISC_SET_1,4,2     ; @TWL4030_REG_MISC_SET_1
	.comm	_TWL4030_FMLOOP_EN,1,0          ; @TWL4030_FMLOOP_EN
	.comm	_SND_SOC_BIAS_STANDBY,8,3       ; @SND_SOC_BIAS_STANDBY
	.no_dead_strip	_bypass_event
.subsections_via_symbols
