	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function getAMDProcessorTypeAndSubtype
_getAMDProcessorTypeAndSubtype:         ## @getAMDProcessorTypeAndSubtype
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
                                        ## kill: def $edi killed $edi def $rdi
	addl	$-16, %edi
	cmpl	$7, %edi
	ja	LBB0_23
## %bb.1:
	movq	_AMD_BTVER1@GOTPCREL(%rip), %rax
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rdi,4), %rdx
	addq	%rcx, %rdx
	jmpq	*%rdx
LBB0_2:
	movq	_AMDFAM10H@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r8)
	cmpl	$2, %esi
	je	LBB0_3
## %bb.4:
	cmpl	$8, %esi
	je	LBB0_7
## %bb.5:
	cmpl	$4, %esi
	jne	LBB0_23
## %bb.6:
	movq	_AMDFAM10H_SHANGHAI@GOTPCREL(%rip), %rax
	jmp	LBB0_21
LBB0_8:
	movq	_AMDFAM15H@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r8)
	movl	%esi, %eax
	andl	$-32, %eax
	cmpl	$96, %eax
	jne	LBB0_10
## %bb.9:
	movq	_AMDFAM15H_BDVER4@GOTPCREL(%rip), %rax
	jmp	LBB0_21
LBB0_16:
	movq	_AMD_BTVER2@GOTPCREL(%rip), %rax
	jmp	LBB0_22
LBB0_17:
	movq	_AMDFAM17H@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r8)
	movl	%esi, %eax
	andl	$-16, %eax
	cmpl	$48, %eax
	jne	LBB0_19
## %bb.18:
	movq	_AMDFAM17H_ZNVER2@GOTPCREL(%rip), %rax
	jmp	LBB0_21
LBB0_10:
	movl	%esi, %ecx
	andl	$-16, %ecx
	cmpl	$48, %ecx
	jne	LBB0_12
## %bb.11:
	movq	_AMDFAM15H_BDVER3@GOTPCREL(%rip), %rax
	jmp	LBB0_21
LBB0_19:
	cmpl	$15, %esi
	ja	LBB0_23
## %bb.20:
	movq	_AMDFAM17H_ZNVER1@GOTPCREL(%rip), %rax
	jmp	LBB0_21
LBB0_12:
	movq	_AMDFAM15H_BDVER2@GOTPCREL(%rip), %rax
	cmpl	$2, %esi
	je	LBB0_21
## %bb.13:
	cmpl	$16, %ecx
	je	LBB0_21
## %bb.14:
	cmpl	$16, %esi
	jae	LBB0_23
## %bb.15:
	movq	_AMDFAM15H_BDVER1@GOTPCREL(%rip), %rax
	jmp	LBB0_21
LBB0_3:
	movq	_AMDFAM10H_BARCELONA@GOTPCREL(%rip), %rax
	jmp	LBB0_21
LBB0_7:
	movq	_AMDFAM10H_ISTANBUL@GOTPCREL(%rip), %rax
LBB0_21:
	movq	%r9, %r8
LBB0_22:
	movl	(%rax), %eax
	movl	%eax, (%r8)
LBB0_23:
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_23, LBB0_23-LJTI0_0
.set L0_0_set_22, LBB0_22-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_17, LBB0_17-LJTI0_0
LJTI0_0:
	.long	L0_0_set_2
	.long	L0_0_set_23
	.long	L0_0_set_23
	.long	L0_0_set_23
	.long	L0_0_set_22
	.long	L0_0_set_8
	.long	L0_0_set_16
	.long	L0_0_set_17
	.end_data_region
                                        ## -- End function
	.comm	_AMDFAM10H,4,2                  ## @AMDFAM10H
	.comm	_AMDFAM10H_BARCELONA,4,2        ## @AMDFAM10H_BARCELONA
	.comm	_AMDFAM10H_SHANGHAI,4,2         ## @AMDFAM10H_SHANGHAI
	.comm	_AMDFAM10H_ISTANBUL,4,2         ## @AMDFAM10H_ISTANBUL
	.comm	_AMD_BTVER1,4,2                 ## @AMD_BTVER1
	.comm	_AMDFAM15H,4,2                  ## @AMDFAM15H
	.comm	_AMDFAM15H_BDVER4,4,2           ## @AMDFAM15H_BDVER4
	.comm	_AMDFAM15H_BDVER3,4,2           ## @AMDFAM15H_BDVER3
	.comm	_AMDFAM15H_BDVER2,4,2           ## @AMDFAM15H_BDVER2
	.comm	_AMDFAM15H_BDVER1,4,2           ## @AMDFAM15H_BDVER1
	.comm	_AMD_BTVER2,4,2                 ## @AMD_BTVER2
	.comm	_AMDFAM17H,4,2                  ## @AMDFAM17H
	.comm	_AMDFAM17H_ZNVER2,4,2           ## @AMDFAM17H_ZNVER2
	.comm	_AMDFAM17H_ZNVER1,4,2           ## @AMDFAM17H_ZNVER1
	.no_dead_strip	_getAMDProcessorTypeAndSubtype
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function getAMDProcessorTypeAndSubtype
_getAMDProcessorTypeAndSubtype:         ; @getAMDProcessorTypeAndSubtype
	.cfi_startproc
; %bb.0:
	sub	w9, w0, #16
	cmp	w9, #7
	b.hi	LBB0_23
; %bb.1:
Lloh0:
	adrp	x8, _AMD_BTVER1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMD_BTVER1@GOTPAGEOFF]
Lloh2:
	adrp	x10, lJTI0_0@PAGE
Lloh3:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_2
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_2:
Lloh4:
	adrp	x8, _AMDFAM10H@GOTPAGE
Lloh5:
	ldr	x8, [x8, _AMDFAM10H@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	str	w8, [x4]
	cmp	w1, #2
	b.eq	LBB0_19
; %bb.3:
	cmp	w1, #8
	b.eq	LBB0_20
; %bb.4:
	cmp	w1, #4
	b.ne	LBB0_23
; %bb.5:
Lloh7:
	adrp	x8, _AMDFAM10H_SHANGHAI@GOTPAGE
Lloh8:
	ldr	x8, [x8, _AMDFAM10H_SHANGHAI@GOTPAGEOFF]
	b	LBB0_21
LBB0_6:
Lloh9:
	adrp	x8, _AMDFAM15H@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AMDFAM15H@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	str	w8, [x4]
	and	w8, w1, #0xffffffe0
	cmp	w8, #96
	b.ne	LBB0_11
; %bb.7:
Lloh12:
	adrp	x8, _AMDFAM15H_BDVER4@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AMDFAM15H_BDVER4@GOTPAGEOFF]
	b	LBB0_21
LBB0_8:
Lloh14:
	adrp	x8, _AMD_BTVER2@GOTPAGE
Lloh15:
	ldr	x8, [x8, _AMD_BTVER2@GOTPAGEOFF]
	b	LBB0_22
LBB0_9:
Lloh16:
	adrp	x8, _AMDFAM17H@GOTPAGE
Lloh17:
	ldr	x8, [x8, _AMDFAM17H@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	str	w8, [x4]
	and	w8, w1, #0xfffffff0
	cmp	w8, #48
	b.ne	LBB0_13
; %bb.10:
Lloh19:
	adrp	x8, _AMDFAM17H_ZNVER2@GOTPAGE
Lloh20:
	ldr	x8, [x8, _AMDFAM17H_ZNVER2@GOTPAGEOFF]
	b	LBB0_21
LBB0_11:
	and	w9, w1, #0xfffffff0
	cmp	w9, #48
	b.ne	LBB0_15
; %bb.12:
Lloh21:
	adrp	x8, _AMDFAM15H_BDVER3@GOTPAGE
Lloh22:
	ldr	x8, [x8, _AMDFAM15H_BDVER3@GOTPAGEOFF]
	b	LBB0_21
LBB0_13:
	cmp	w1, #15
	b.hi	LBB0_23
; %bb.14:
Lloh23:
	adrp	x8, _AMDFAM17H_ZNVER1@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AMDFAM17H_ZNVER1@GOTPAGEOFF]
	b	LBB0_21
LBB0_15:
Lloh25:
	adrp	x8, _AMDFAM15H_BDVER2@GOTPAGE
Lloh26:
	ldr	x8, [x8, _AMDFAM15H_BDVER2@GOTPAGEOFF]
	cmp	w1, #2
	b.eq	LBB0_21
; %bb.16:
	cmp	w9, #16
	b.eq	LBB0_21
; %bb.17:
	cmp	w1, #16
	b.hs	LBB0_23
; %bb.18:
Lloh27:
	adrp	x8, _AMDFAM15H_BDVER1@GOTPAGE
Lloh28:
	ldr	x8, [x8, _AMDFAM15H_BDVER1@GOTPAGEOFF]
	b	LBB0_21
LBB0_19:
Lloh29:
	adrp	x8, _AMDFAM10H_BARCELONA@GOTPAGE
Lloh30:
	ldr	x8, [x8, _AMDFAM10H_BARCELONA@GOTPAGEOFF]
	b	LBB0_21
LBB0_20:
Lloh31:
	adrp	x8, _AMDFAM10H_ISTANBUL@GOTPAGE
Lloh32:
	ldr	x8, [x8, _AMDFAM10H_ISTANBUL@GOTPAGEOFF]
LBB0_21:
	mov	x4, x5
LBB0_22:
	ldr	w8, [x8]
	str	w8, [x4]
LBB0_23:
	ret
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh31, Lloh32
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_23-LBB0_2)>>2
	.byte	(LBB0_23-LBB0_2)>>2
	.byte	(LBB0_23-LBB0_2)>>2
	.byte	(LBB0_22-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_8-LBB0_2)>>2
	.byte	(LBB0_9-LBB0_2)>>2
                                        ; -- End function
	.comm	_AMDFAM10H,4,2                  ; @AMDFAM10H
	.comm	_AMDFAM10H_BARCELONA,4,2        ; @AMDFAM10H_BARCELONA
	.comm	_AMDFAM10H_SHANGHAI,4,2         ; @AMDFAM10H_SHANGHAI
	.comm	_AMDFAM10H_ISTANBUL,4,2         ; @AMDFAM10H_ISTANBUL
	.comm	_AMD_BTVER1,4,2                 ; @AMD_BTVER1
	.comm	_AMDFAM15H,4,2                  ; @AMDFAM15H
	.comm	_AMDFAM15H_BDVER4,4,2           ; @AMDFAM15H_BDVER4
	.comm	_AMDFAM15H_BDVER3,4,2           ; @AMDFAM15H_BDVER3
	.comm	_AMDFAM15H_BDVER2,4,2           ; @AMDFAM15H_BDVER2
	.comm	_AMDFAM15H_BDVER1,4,2           ; @AMDFAM15H_BDVER1
	.comm	_AMD_BTVER2,4,2                 ; @AMD_BTVER2
	.comm	_AMDFAM17H,4,2                  ; @AMDFAM17H
	.comm	_AMDFAM17H_ZNVER2,4,2           ; @AMDFAM17H_ZNVER2
	.comm	_AMDFAM17H_ZNVER1,4,2           ; @AMDFAM17H_ZNVER1
	.no_dead_strip	_getAMDProcessorTypeAndSubtype
.subsections_via_symbols
