	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function store_register
_store_register:                        ## @store_register
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$48, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edi, %r15d
	movq	_PT_GETREGS@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_inferior_ptid@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_PIDGET
	leaq	-72(%rbp), %r14
	movl	%ebx, %edi
	movl	%eax, %esi
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	callq	_ptrace
	testl	%eax, %eax
	js	LBB0_1
## %bb.2:
	leal	-128(%r15), %eax
	cmpl	$3, %eax
	ja	LBB0_13
## %bb.3:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_4:
	leaq	-48(%rbp), %rsi
	movl	$128, %edi
	jmp	LBB0_14
LBB0_1:
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_warning
	jmp	LBB0_17
LBB0_13:
	movslq	%r15d, %rsi
	shlq	$2, %rsi
	addq	-64(%rbp), %rsi
	movl	%r15d, %edi
	jmp	LBB0_14
LBB0_9:
	movq	_arm_apcs_32@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	je	LBB0_11
## %bb.10:
	leaq	-56(%rbp), %rsi
	movl	$129, %edi
	jmp	LBB0_14
LBB0_6:
	movq	_arm_apcs_32@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	je	LBB0_8
## %bb.7:
	leaq	-72(%rbp), %rsi
	movl	$130, %edi
	jmp	LBB0_14
LBB0_5:
	leaq	-52(%rbp), %rsi
	movl	$131, %edi
LBB0_14:
	callq	_regcache_collect
LBB0_15:
	movq	_PT_SETREGS@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	(%r12), %edi
	callq	_PIDGET
	movl	%ebx, %edi
	movl	%eax, %esi
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	callq	_ptrace
	testl	%eax, %eax
	jns	LBB0_17
## %bb.16:
	leaq	L_.str.1(%rip), %rdi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	_warning
LBB0_17:
	addq	$48, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_8:
	leaq	-36(%rbp), %rsi
	movl	$130, %edi
	callq	_regcache_collect
	movl	-36(%rbp), %edi
	callq	_ADDR_BITS_REMOVE
	movl	%eax, -36(%rbp)
	movl	-72(%rbp), %edi
	callq	_ADDR_BITS_REMOVE
	xorl	-72(%rbp), %eax
	jmp	LBB0_12
LBB0_11:
	leaq	-36(%rbp), %rsi
	movl	$129, %edi
	callq	_regcache_collect
	movl	-36(%rbp), %edi
	callq	_ADDR_BITS_REMOVE
	xorl	%eax, -36(%rbp)
	movl	-72(%rbp), %edi
	callq	_ADDR_BITS_REMOVE
LBB0_12:
	orl	-36(%rbp), %eax
	movl	%eax, -72(%rbp)
	jmp	LBB0_15
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
LJTI0_0:
	.long	L0_0_set_4
	.long	L0_0_set_9
	.long	L0_0_set_6
	.long	L0_0_set_5
	.end_data_region
                                        ## -- End function
	.comm	_PT_GETREGS,4,2                 ## @PT_GETREGS
	.comm	_inferior_ptid,4,2              ## @inferior_ptid
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"unable to fetch general registers"

	.comm	_arm_apcs_32,4,2                ## @arm_apcs_32
	.comm	_PT_SETREGS,4,2                 ## @PT_SETREGS
L_.str.1:                               ## @.str.1
	.asciz	"unable to write register %d to inferior"

	.no_dead_strip	_store_register
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function store_register
_store_register:                        ; @store_register
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _PT_GETREGS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PT_GETREGS@GOTPAGEOFF]
Lloh2:
	ldr	w20, [x8]
Lloh3:
	adrp	x21, _inferior_ptid@GOTPAGE
Lloh4:
	ldr	x21, [x21, _inferior_ptid@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_PIDGET
	mov	x1, x0
	add	x2, sp, #16
	mov	x0, x20
	mov	w3, #0
	bl	_ptrace
	tbnz	w0, #31, LBB0_4
; %bb.1:
	sub	w8, w19, #128
	cmp	w8, #3
	b.hi	LBB0_5
; %bb.2:
Lloh5:
	adrp	x9, lJTI0_0@PAGE
Lloh6:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_3
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_3:
	add	x8, sp, #16
	add	x1, x8, #24
	mov	w0, #128
	b	LBB0_11
LBB0_4:
Lloh7:
	adrp	x0, l_.str@PAGE
Lloh8:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_14
LBB0_5:
	ldr	x8, [sp, #24]
	add	x1, x8, w19, sxtw #2
	mov	x0, x19
	b	LBB0_11
LBB0_6:
Lloh9:
	adrp	x8, _arm_apcs_32@GOTPAGE
Lloh10:
	ldr	x8, [x8, _arm_apcs_32@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	cbz	w8, LBB0_17
; %bb.7:
	add	x8, sp, #16
	add	x1, x8, #16
	mov	w0, #129
	b	LBB0_11
LBB0_8:
Lloh12:
	adrp	x8, _arm_apcs_32@GOTPAGE
Lloh13:
	ldr	x8, [x8, _arm_apcs_32@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	cbz	w8, LBB0_16
; %bb.9:
	add	x1, sp, #16
	mov	w0, #130
	b	LBB0_11
LBB0_10:
	add	x8, sp, #16
	add	x1, x8, #20
	mov	w0, #131
LBB0_11:
	bl	_regcache_collect
LBB0_12:
Lloh15:
	adrp	x8, _PT_SETREGS@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PT_SETREGS@GOTPAGEOFF]
Lloh17:
	ldr	w20, [x8]
	ldr	w0, [x21]
	bl	_PIDGET
	mov	x1, x0
	add	x2, sp, #16
	mov	x0, x20
	mov	w3, #0
	bl	_ptrace
	tbz	w0, #31, LBB0_15
; %bb.13:
	str	x19, [sp]
Lloh18:
	adrp	x0, l_.str.1@PAGE
Lloh19:
	add	x0, x0, l_.str.1@PAGEOFF
LBB0_14:
	bl	_warning
LBB0_15:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_16:
	add	x1, sp, #12
	mov	w0, #130
	bl	_regcache_collect
	ldr	w0, [sp, #12]
	bl	_ADDR_BITS_REMOVE
	str	w0, [sp, #12]
	ldr	w0, [sp, #16]
	bl	_ADDR_BITS_REMOVE
	ldp	w9, w8, [sp, #12]
	eor	w8, w8, w0
	orr	w8, w9, w8
	str	w8, [sp, #16]
	b	LBB0_12
LBB0_17:
	add	x1, sp, #12
	mov	w0, #129
	bl	_regcache_collect
	ldr	w0, [sp, #12]
	bl	_ADDR_BITS_REMOVE
	ldr	w8, [sp, #12]
	eor	w8, w8, w0
	str	w8, [sp, #12]
	ldr	w0, [sp, #16]
	bl	_ADDR_BITS_REMOVE
	ldr	w8, [sp, #12]
	orr	w8, w8, w0
	str	w8, [sp, #16]
	b	LBB0_12
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_6-LBB0_3)>>2
	.byte	(LBB0_8-LBB0_3)>>2
	.byte	(LBB0_10-LBB0_3)>>2
                                        ; -- End function
	.comm	_PT_GETREGS,4,2                 ; @PT_GETREGS
	.comm	_inferior_ptid,4,2              ; @inferior_ptid
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"unable to fetch general registers"

	.comm	_arm_apcs_32,4,2                ; @arm_apcs_32
	.comm	_PT_SETREGS,4,2                 ; @PT_SETREGS
l_.str.1:                               ; @.str.1
	.asciz	"unable to write register %d to inferior"

	.no_dead_strip	_store_register
.subsections_via_symbols
