	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ia64_dfa_new_cycle
_ia64_dfa_new_cycle:                    ## @ia64_dfa_new_cycle
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, %r13d
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movq	_FALSE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	testq	%rdx, %rdx
	movq	%r9, -56(%rbp)                  ## 8-byte Spill
	je	LBB0_1
## %bb.2:
	movq	%rdx, %r12
	movq	%rdx, %rdi
	callq	_INSN_P
	xorl	%edi, %edi
	testq	%rax, %rax
	setne	%dil
	jmp	LBB0_3
LBB0_1:
	movq	%rdx, %r12
	xorl	%edi, %edi
LBB0_3:
	callq	_gcc_assert
	movq	_reload_completed@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_5
## %bb.4:
	movq	%r12, %rdi
	callq	_safe_group_barrier_needed
	testq	%rax, %rax
	jne	LBB0_9
LBB0_5:
	movq	_last_scheduled_insn@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	testq	%rdi, %rdi
	je	LBB0_24
## %bb.6:
	callq	_GET_CODE
	movq	_CALL_INSN@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_9
## %bb.7:
	movq	(%r15), %rdi
	callq	_PATTERN
	movq	%rax, %rdi
	callq	_GET_CODE
	movq	_ASM_INPUT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_9
## %bb.8:
	movq	(%r15), %rdi
	callq	_PATTERN
	movq	%rax, %rdi
	callq	_asm_noperands
	testq	%rax, %rax
	js	LBB0_24
LBB0_9:
	xorl	%eax, %eax
	callq	_init_insn_group_barriers
	testq	%rbx, %rbx
	je	LBB0_12
## %bb.10:
	testl	%r14d, %r14d
	je	LBB0_12
## %bb.11:
	movq	%r12, %rdi
	callq	_INSN_UID
	cmpl	%r13d, -44(%rbp)                ## 4-byte Folded Reload
	leaq	L_.str.1(%rip), %rdx
	leaq	L_.str.2(%rip), %rcx
	cmoveq	%rdx, %rcx
	leaq	L_.str(%rip), %rsi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	callq	_fprintf
LBB0_12:
	movq	_stop_before_p@GOTPCREL(%rip), %rax
	movl	$1, (%rax)
	cmpl	%r13d, -44(%rbp)                ## 4-byte Folded Reload
	jne	LBB0_18
## %bb.13:
	movq	_curr_state@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_dfa_stop_insn@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_state_transition
	movq	_TARGET_EARLY_STOP_BITS@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_14
## %bb.15:
	movq	_last_scheduled_insn@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	_NULL_RTX@GOTPCREL(%rip), %rax
	movl	$1, %ecx
	cmpq	(%rax), %rdi
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	je	LBB0_17
## %bb.16:
	callq	_GET_CODE
	movq	_CALL_INSN@GOTPCREL(%rip), %rdx
	xorl	%ecx, %ecx
	cmpq	(%rdx), %rax
	setne	%cl
	jmp	LBB0_17
LBB0_18:
	movq	_reload_completed@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	je	LBB0_20
## %bb.19:
	movq	_TRUE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
LBB0_20:
	movq	_last_scheduled_insn@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	callq	_PATTERN
	movq	%rax, %rdi
	callq	_GET_CODE
	movq	_ASM_INPUT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_22
## %bb.21:
	movq	(%r14), %rdi
	callq	_PATTERN
	movq	%rax, %rdi
	callq	_asm_noperands
	testq	%rax, %rax
	js	LBB0_23
LBB0_22:
	movq	_curr_state@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_state_reset
	jmp	LBB0_26
LBB0_24:
	movq	_reload_completed@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	je	LBB0_26
## %bb.25:
	movq	_TRUE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	jmp	LBB0_26
LBB0_14:
	xorl	%ecx, %ecx
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
LBB0_17:
	movl	%ecx, (%rbx)
	movl	$1, %r14d
	jmp	LBB0_45
LBB0_23:
	movq	_curr_state@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_prev_cycle_state@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_dfa_state_size@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_memcpy
	movl	(%r14), %edi
	movq	_dfa_stop_insn@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_state_transition
	movl	(%r14), %edi
	movq	_dfa_pre_cycle_insn@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_state_transition
	movl	(%r14), %edi
	xorl	%esi, %esi
	callq	_state_transition
LBB0_26:
	xorl	%r14d, %r14d
	testl	%ebx, %ebx
	je	LBB0_45
## %bb.27:
	movq	_ia64_tune@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_PROCESSOR_ITANIUM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_45
## %bb.28:
	movq	%r12, %rdi
	callq	_PATTERN
	movq	%rax, %rdi
	callq	_GET_CODE
	movq	_ASM_INPUT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_45
## %bb.29:
	movq	%r12, %rdi
	callq	_PATTERN
	movq	%rax, %rdi
	callq	_asm_noperands
	testq	%rax, %rax
	js	LBB0_30
LBB0_45:
	movl	%r14d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_30:
	movq	%r12, %rdi
	callq	_ia64_safe_itanium_class
	movq	_ITANIUM_CLASS_MMMUL@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	je	LBB0_45
## %bb.31:
	movq	_ITANIUM_CLASS_MMSHF@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	je	LBB0_45
## %bb.32:
	movq	%r12, %rdi
	callq	_LOG_LINKS
	testq	%rax, %rax
	je	LBB0_45
## %bb.33:
	movq	%rax, %rbx
	movl	$-1, %r13d
	jmp	LBB0_34
LBB0_40:                                ##   in Loop: Header=BB0_34 Depth=1
	movq	_clocks@GOTPCREL(%rip), %rax
	movq	(%rax), %r12
	movq	%r14, %rdi
	callq	_INSN_UID
	movl	-44(%rbp), %r13d                ## 4-byte Reload
	subl	(%r12,%rax,4), %r13d
LBB0_41:                                ##   in Loop: Header=BB0_34 Depth=1
	movq	%r15, %r12
	.p2align	4, 0x90
LBB0_42:                                ##   in Loop: Header=BB0_34 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_XEXP
	movq	%rax, %rbx
	testq	%rax, %rax
	je	LBB0_43
LBB0_34:                                ## =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	_REG_NOTE_KIND
	testq	%rax, %rax
	jne	LBB0_42
## %bb.35:                              ##   in Loop: Header=BB0_34 Depth=1
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_XEXP
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	_ia64_safe_itanium_class
	movq	_ITANIUM_CLASS_MMMUL@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	je	LBB0_37
## %bb.36:                              ##   in Loop: Header=BB0_34 Depth=1
	movq	_ITANIUM_CLASS_MMSHF@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_42
LBB0_37:                                ##   in Loop: Header=BB0_34 Depth=1
	movq	%r12, %r15
	movq	_clocks@GOTPCREL(%rip), %rax
	movq	(%rax), %r12
	movq	%r14, %rdi
	callq	_INSN_UID
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	subl	(%r12,%rax,4), %ecx
	cmpl	$3, %ecx
	jg	LBB0_41
## %bb.38:                              ##   in Loop: Header=BB0_34 Depth=1
	testl	%r13d, %r13d
	js	LBB0_40
## %bb.39:                              ##   in Loop: Header=BB0_34 Depth=1
	movq	_clocks@GOTPCREL(%rip), %rax
	movq	(%rax), %r12
	movq	%r14, %rdi
	callq	_INSN_UID
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	subl	(%r12,%rax,4), %ecx
	movq	%r15, %r12
	cmpl	%r13d, %ecx
	jl	LBB0_40
	jmp	LBB0_42
LBB0_43:
	xorl	%r14d, %r14d
	testl	%r13d, %r13d
	js	LBB0_45
## %bb.44:
	movl	$3, %ebx
	subl	%r13d, %ebx
	movq	_add_cycles@GOTPCREL(%rip), %rax
	movq	(%rax), %r15
	movq	%r12, %rdi
	callq	_INSN_UID
	movl	%ebx, (%r15,%rax,4)
	jmp	LBB0_45
	.cfi_endproc
                                        ## -- End function
	.comm	_FALSE,4,2                      ## @FALSE
	.comm	_reload_completed,8,3           ## @reload_completed
	.comm	_last_scheduled_insn,8,3        ## @last_scheduled_insn
	.comm	_CALL_INSN,8,3                  ## @CALL_INSN
	.comm	_ASM_INPUT,8,3                  ## @ASM_INPUT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"//    Stop should be before %d%s\n"

L_.str.1:                               ## @.str.1
	.asciz	" + cycle advance"

L_.str.2:                               ## @.str.2
	.space	1

	.comm	_stop_before_p,4,2              ## @stop_before_p
	.comm	_curr_state,4,2                 ## @curr_state
	.comm	_dfa_stop_insn,8,3              ## @dfa_stop_insn
	.comm	_TARGET_EARLY_STOP_BITS,8,3     ## @TARGET_EARLY_STOP_BITS
	.comm	_NULL_RTX,8,3                   ## @NULL_RTX
	.comm	_TRUE,4,2                       ## @TRUE
	.comm	_prev_cycle_state,4,2           ## @prev_cycle_state
	.comm	_dfa_state_size,4,2             ## @dfa_state_size
	.comm	_dfa_pre_cycle_insn,8,3         ## @dfa_pre_cycle_insn
	.comm	_ia64_tune,8,3                  ## @ia64_tune
	.comm	_PROCESSOR_ITANIUM,8,3          ## @PROCESSOR_ITANIUM
	.comm	_ITANIUM_CLASS_MMMUL,4,2        ## @ITANIUM_CLASS_MMMUL
	.comm	_ITANIUM_CLASS_MMSHF,4,2        ## @ITANIUM_CLASS_MMSHF
	.comm	_clocks,8,3                     ## @clocks
	.comm	_add_cycles,8,3                 ## @add_cycles
	.no_dead_strip	_ia64_dfa_new_cycle
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ia64_dfa_new_cycle
_ia64_dfa_new_cycle:                    ; @ia64_dfa_new_cycle
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x5
	mov	x22, x4
	mov	x20, x3
	mov	x19, x2
	mov	x24, x1
	mov	x23, x0
Lloh0:
	adrp	x8, _FALSE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FALSE@GOTPAGEOFF]
Lloh2:
	ldr	w25, [x8]
	cbz	x2, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_INSN_P
	cmp	x0, #0
	cset	w0, ne
	b	LBB0_3
LBB0_2:
	mov	w0, #0
LBB0_3:
	bl	_gcc_assert
Lloh3:
	adrp	x26, _reload_completed@GOTPAGE
Lloh4:
	ldr	x26, [x26, _reload_completed@GOTPAGEOFF]
	ldr	x8, [x26]
	cbz	x8, LBB0_5
; %bb.4:
	mov	x0, x19
	bl	_safe_group_barrier_needed
	cbnz	x0, LBB0_9
LBB0_5:
Lloh5:
	adrp	x27, _last_scheduled_insn@GOTPAGE
Lloh6:
	ldr	x27, [x27, _last_scheduled_insn@GOTPAGEOFF]
	ldr	x0, [x27]
	cbz	x0, LBB0_19
; %bb.6:
	bl	_GET_CODE
Lloh7:
	adrp	x8, _CALL_INSN@GOTPAGE
Lloh8:
	ldr	x8, [x8, _CALL_INSN@GOTPAGEOFF]
Lloh9:
	ldr	x8, [x8]
	cmp	x0, x8
	b.eq	LBB0_9
; %bb.7:
	ldr	x0, [x27]
	bl	_PATTERN
	bl	_GET_CODE
Lloh10:
	adrp	x8, _ASM_INPUT@GOTPAGE
Lloh11:
	ldr	x8, [x8, _ASM_INPUT@GOTPAGEOFF]
Lloh12:
	ldr	x8, [x8]
	cmp	x0, x8
	b.eq	LBB0_9
; %bb.8:
	ldr	x0, [x27]
	bl	_PATTERN
	bl	_asm_noperands
	tbnz	x0, #63, LBB0_19
LBB0_9:
	bl	_init_insn_group_barriers
	cbz	x23, LBB0_12
; %bb.10:
	cbz	w24, LBB0_12
; %bb.11:
	mov	x0, x19
	bl	_INSN_UID
	mov	x2, x0
Lloh13:
	adrp	x8, l_.str.2@PAGE
Lloh14:
	add	x8, x8, l_.str.2@PAGEOFF
Lloh15:
	adrp	x9, l_.str.1@PAGE
Lloh16:
	add	x9, x9, l_.str.1@PAGEOFF
	cmp	w20, w22
	csel	x3, x9, x8, eq
Lloh17:
	adrp	x1, l_.str@PAGE
Lloh18:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x23
	bl	_fprintf
LBB0_12:
Lloh19:
	adrp	x8, _stop_before_p@GOTPAGE
Lloh20:
	ldr	x8, [x8, _stop_before_p@GOTPAGEOFF]
	mov	w9, #1
Lloh21:
	str	w9, [x8]
	cmp	w20, w22
	b.ne	LBB0_16
; %bb.13:
Lloh22:
	adrp	x8, _curr_state@GOTPAGE
Lloh23:
	ldr	x8, [x8, _curr_state@GOTPAGEOFF]
Lloh24:
	ldr	w0, [x8]
Lloh25:
	adrp	x8, _dfa_stop_insn@GOTPAGE
Lloh26:
	ldr	x8, [x8, _dfa_stop_insn@GOTPAGEOFF]
Lloh27:
	ldr	x1, [x8]
	bl	_state_transition
Lloh28:
	adrp	x8, _TARGET_EARLY_STOP_BITS@GOTPAGE
Lloh29:
	ldr	x8, [x8, _TARGET_EARLY_STOP_BITS@GOTPAGEOFF]
Lloh30:
	ldr	x8, [x8]
	cbz	x8, LBB0_21
; %bb.14:
Lloh31:
	adrp	x8, _last_scheduled_insn@GOTPAGE
Lloh32:
	ldr	x8, [x8, _last_scheduled_insn@GOTPAGEOFF]
Lloh33:
	ldr	x0, [x8]
Lloh34:
	adrp	x8, _NULL_RTX@GOTPAGE
Lloh35:
	ldr	x8, [x8, _NULL_RTX@GOTPAGEOFF]
Lloh36:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_20
; %bb.15:
	mov	w8, #1
	b	LBB0_21
LBB0_16:
	ldr	x8, [x26]
Lloh37:
	adrp	x9, _TRUE@GOTPAGE
Lloh38:
	ldr	x9, [x9, _TRUE@GOTPAGEOFF]
Lloh39:
	ldr	w9, [x9]
	cmp	x8, #0
	csel	w21, w25, w9, eq
Lloh40:
	adrp	x22, _last_scheduled_insn@GOTPAGE
Lloh41:
	ldr	x22, [x22, _last_scheduled_insn@GOTPAGEOFF]
	ldr	x0, [x22]
	bl	_PATTERN
	bl	_GET_CODE
Lloh42:
	adrp	x8, _ASM_INPUT@GOTPAGE
Lloh43:
	ldr	x8, [x8, _ASM_INPUT@GOTPAGEOFF]
Lloh44:
	ldr	x8, [x8]
	cmp	x0, x8
	b.eq	LBB0_18
; %bb.17:
	ldr	x0, [x22]
	bl	_PATTERN
	bl	_asm_noperands
	tbnz	x0, #63, LBB0_22
LBB0_18:
Lloh45:
	adrp	x8, _curr_state@GOTPAGE
Lloh46:
	ldr	x8, [x8, _curr_state@GOTPAGEOFF]
Lloh47:
	ldr	w0, [x8]
	bl	_state_reset
	cbnz	w21, LBB0_23
	b	LBB0_26
LBB0_19:
	ldr	x8, [x26]
Lloh48:
	adrp	x9, _TRUE@GOTPAGE
Lloh49:
	ldr	x9, [x9, _TRUE@GOTPAGEOFF]
Lloh50:
	ldr	w9, [x9]
	cmp	x8, #0
	csel	w21, w25, w9, eq
	cbnz	w21, LBB0_23
	b	LBB0_26
LBB0_20:
	bl	_GET_CODE
Lloh51:
	adrp	x8, _CALL_INSN@GOTPAGE
Lloh52:
	ldr	x8, [x8, _CALL_INSN@GOTPAGEOFF]
Lloh53:
	ldr	x8, [x8]
	cmp	x0, x8
	cset	w8, ne
LBB0_21:
	str	w8, [x21]
	mov	w0, #1
	b	LBB0_27
LBB0_22:
Lloh54:
	adrp	x22, _curr_state@GOTPAGE
Lloh55:
	ldr	x22, [x22, _curr_state@GOTPAGEOFF]
	ldr	w0, [x22]
Lloh56:
	adrp	x8, _prev_cycle_state@GOTPAGE
Lloh57:
	ldr	x8, [x8, _prev_cycle_state@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
Lloh59:
	adrp	x8, _dfa_state_size@GOTPAGE
Lloh60:
	ldr	x8, [x8, _dfa_state_size@GOTPAGEOFF]
Lloh61:
	ldr	w2, [x8]
	bl	_memcpy
	ldr	w0, [x22]
Lloh62:
	adrp	x8, _dfa_stop_insn@GOTPAGE
Lloh63:
	ldr	x8, [x8, _dfa_stop_insn@GOTPAGEOFF]
Lloh64:
	ldr	x1, [x8]
	bl	_state_transition
	ldr	w0, [x22]
Lloh65:
	adrp	x8, _dfa_pre_cycle_insn@GOTPAGE
Lloh66:
	ldr	x8, [x8, _dfa_pre_cycle_insn@GOTPAGEOFF]
Lloh67:
	ldr	x1, [x8]
	bl	_state_transition
	ldr	w0, [x22]
	mov	x1, #0
	bl	_state_transition
	cbz	w21, LBB0_26
LBB0_23:
Lloh68:
	adrp	x8, _ia64_tune@GOTPAGE
Lloh69:
	ldr	x8, [x8, _ia64_tune@GOTPAGEOFF]
Lloh70:
	ldr	x8, [x8]
Lloh71:
	adrp	x9, _PROCESSOR_ITANIUM@GOTPAGE
Lloh72:
	ldr	x9, [x9, _PROCESSOR_ITANIUM@GOTPAGEOFF]
Lloh73:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_26
; %bb.24:
	mov	x0, x19
	bl	_PATTERN
	bl	_GET_CODE
Lloh74:
	adrp	x8, _ASM_INPUT@GOTPAGE
Lloh75:
	ldr	x8, [x8, _ASM_INPUT@GOTPAGEOFF]
Lloh76:
	ldr	x8, [x8]
	cmp	x0, x8
	b.eq	LBB0_26
; %bb.25:
	mov	x0, x19
	bl	_PATTERN
	bl	_asm_noperands
	tbnz	x0, #63, LBB0_28
LBB0_26:
	mov	w0, #0
LBB0_27:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_28:
	mov	x0, x19
	bl	_ia64_safe_itanium_class
	mov	x8, x0
	mov	w0, #0
Lloh77:
	adrp	x23, _ITANIUM_CLASS_MMMUL@GOTPAGE
Lloh78:
	ldr	x23, [x23, _ITANIUM_CLASS_MMMUL@GOTPAGEOFF]
	ldr	w9, [x23]
	cmp	w8, w9
	b.eq	LBB0_27
; %bb.29:
Lloh79:
	adrp	x24, _ITANIUM_CLASS_MMSHF@GOTPAGE
Lloh80:
	ldr	x24, [x24, _ITANIUM_CLASS_MMSHF@GOTPAGEOFF]
	ldr	w9, [x24]
	cmp	w8, w9
	b.eq	LBB0_27
; %bb.30:
	mov	x0, x19
	bl	_LOG_LINKS
	cbz	x0, LBB0_27
; %bb.31:
	mov	x21, x0
	mov	w26, #-1
Lloh81:
	adrp	x25, _clocks@GOTPAGE
Lloh82:
	ldr	x25, [x25, _clocks@GOTPAGEOFF]
	b	LBB0_34
LBB0_32:                                ;   in Loop: Header=BB0_34 Depth=1
	ldr	x26, [x25]
	mov	x0, x22
	bl	_INSN_UID
	ldr	w8, [x26, x0, lsl #2]
	sub	w26, w20, w8
LBB0_33:                                ;   in Loop: Header=BB0_34 Depth=1
	mov	x0, x21
	mov	w1, #1
	bl	_XEXP
	mov	x21, x0
	cbz	x0, LBB0_39
LBB0_34:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x21
	bl	_REG_NOTE_KIND
	cbnz	x0, LBB0_33
; %bb.35:                               ;   in Loop: Header=BB0_34 Depth=1
	mov	x0, x21
	mov	w1, #0
	bl	_XEXP
	mov	x22, x0
	bl	_ia64_safe_itanium_class
	ldr	w8, [x23]
	ldr	w9, [x24]
	cmp	w0, w8
	ccmp	w0, w9, #4, ne
	b.ne	LBB0_33
; %bb.36:                               ;   in Loop: Header=BB0_34 Depth=1
	ldr	x27, [x25]
	mov	x0, x22
	bl	_INSN_UID
	ldr	w8, [x27, x0, lsl #2]
	sub	w8, w20, w8
	cmp	w8, #3
	b.gt	LBB0_33
; %bb.37:                               ;   in Loop: Header=BB0_34 Depth=1
	tbnz	w26, #31, LBB0_32
; %bb.38:                               ;   in Loop: Header=BB0_34 Depth=1
	ldr	x27, [x25]
	mov	x0, x22
	bl	_INSN_UID
	ldr	w8, [x27, x0, lsl #2]
	sub	w8, w20, w8
	cmp	w8, w26
	b.lt	LBB0_32
	b	LBB0_33
LBB0_39:
	tbnz	w26, #31, LBB0_26
; %bb.40:
	mov	w8, #3
	sub	w20, w8, w26
Lloh83:
	adrp	x8, _add_cycles@GOTPAGE
Lloh84:
	ldr	x8, [x8, _add_cycles@GOTPAGEOFF]
Lloh85:
	ldr	x21, [x8]
	mov	x0, x19
	bl	_INSN_UID
	mov	x8, x0
	mov	w0, #0
	str	w20, [x21, x8, lsl #2]
	b	LBB0_27
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotStr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpLdrGot	Lloh79, Lloh80
	.loh AdrpLdrGot	Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.cfi_endproc
                                        ; -- End function
	.comm	_FALSE,4,2                      ; @FALSE
	.comm	_reload_completed,8,3           ; @reload_completed
	.comm	_last_scheduled_insn,8,3        ; @last_scheduled_insn
	.comm	_CALL_INSN,8,3                  ; @CALL_INSN
	.comm	_ASM_INPUT,8,3                  ; @ASM_INPUT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"//    Stop should be before %d%s\n"

l_.str.1:                               ; @.str.1
	.asciz	" + cycle advance"

l_.str.2:                               ; @.str.2
	.space	1

	.comm	_stop_before_p,4,2              ; @stop_before_p
	.comm	_curr_state,4,2                 ; @curr_state
	.comm	_dfa_stop_insn,8,3              ; @dfa_stop_insn
	.comm	_TARGET_EARLY_STOP_BITS,8,3     ; @TARGET_EARLY_STOP_BITS
	.comm	_NULL_RTX,8,3                   ; @NULL_RTX
	.comm	_TRUE,4,2                       ; @TRUE
	.comm	_prev_cycle_state,4,2           ; @prev_cycle_state
	.comm	_dfa_state_size,4,2             ; @dfa_state_size
	.comm	_dfa_pre_cycle_insn,8,3         ; @dfa_pre_cycle_insn
	.comm	_ia64_tune,8,3                  ; @ia64_tune
	.comm	_PROCESSOR_ITANIUM,8,3          ; @PROCESSOR_ITANIUM
	.comm	_ITANIUM_CLASS_MMMUL,4,2        ; @ITANIUM_CLASS_MMMUL
	.comm	_ITANIUM_CLASS_MMSHF,4,2        ; @ITANIUM_CLASS_MMSHF
	.comm	_clocks,8,3                     ; @clocks
	.comm	_add_cycles,8,3                 ; @add_cycles
	.no_dead_strip	_ia64_dfa_new_cycle
.subsections_via_symbols
