	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function load_asic
_load_asic:                             ## @load_asic
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	xorl	%ebx, %ebx
	cmpq	$0, 8(%rdi)
	jne	LBB0_5
## %bb.1:
	movq	%rdi, %r14
	movl	$2, %edi
	callq	_mdelay
	movq	_DSP_FNC_LOAD_3G_ASIC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_card_fw@GOTPCREL(%rip), %r15
	movq	_FW_3G_ASIC@GOTPCREL(%rip), %r12
	movq	(%r12), %rdx
	shlq	$2, %rdx
	addq	(%r15), %rdx
	movq	%r14, %rdi
	callq	_load_asic_generic
	testl	%eax, %eax
	js	LBB0_4
## %bb.2:
	movq	(%r12), %rax
	shlq	$2, %rax
	addq	(%r15), %rax
	movq	%rax, (%r14)
	movl	$1000, %edi                     ## imm = 0x3E8
	callq	_msleep
	movq	%r14, %rdi
	callq	_check_asic_status
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_5
## %bb.3:
	movq	_E3G_48KHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_E3G_FREQ_REG_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_TRUE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	callq	_write_control_reg
	testl	%eax, %eax
	jns	LBB0_5
LBB0_4:
	movl	%eax, %ebx
LBB0_5:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DSP_FNC_LOAD_3G_ASIC,4,2       ## @DSP_FNC_LOAD_3G_ASIC
	.comm	_card_fw,8,3                    ## @card_fw
	.comm	_FW_3G_ASIC,8,3                 ## @FW_3G_ASIC
	.comm	_E3G_48KHZ,4,2                  ## @E3G_48KHZ
	.comm	_E3G_FREQ_REG_DEFAULT,4,2       ## @E3G_FREQ_REG_DEFAULT
	.comm	_TRUE,4,2                       ## @TRUE
	.no_dead_strip	_load_asic
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function load_asic
_load_asic:                             ; @load_asic
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x8, [x0, #8]
	cbz	x8, LBB0_2
; %bb.1:
	mov	w20, #0
	b	LBB0_6
LBB0_2:
	mov	x19, x0
	mov	w0, #2
	bl	_mdelay
Lloh0:
	adrp	x8, _DSP_FNC_LOAD_3G_ASIC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DSP_FNC_LOAD_3G_ASIC@GOTPAGEOFF]
Lloh2:
	adrp	x21, _card_fw@GOTPAGE
Lloh3:
	ldr	x21, [x21, _card_fw@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	ldr	x8, [x21]
Lloh5:
	adrp	x22, _FW_3G_ASIC@GOTPAGE
Lloh6:
	ldr	x22, [x22, _FW_3G_ASIC@GOTPAGEOFF]
	ldr	x9, [x22]
	add	x2, x8, x9, lsl #2
	mov	x0, x19
	bl	_load_asic_generic
	tbnz	w0, #31, LBB0_5
; %bb.3:
	ldr	x8, [x21]
	ldr	x9, [x22]
	add	x8, x8, x9, lsl #2
	str	x8, [x19]
	mov	w0, #1000
	bl	_msleep
	mov	x0, x19
	bl	_check_asic_status
	mov	x20, x0
	tbnz	w0, #31, LBB0_6
; %bb.4:
Lloh7:
	adrp	x8, _E3G_48KHZ@GOTPAGE
Lloh8:
	ldr	x8, [x8, _E3G_48KHZ@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
Lloh10:
	adrp	x8, _E3G_FREQ_REG_DEFAULT@GOTPAGE
Lloh11:
	ldr	x8, [x8, _E3G_FREQ_REG_DEFAULT@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
Lloh13:
	adrp	x8, _TRUE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _TRUE@GOTPAGEOFF]
Lloh15:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_write_control_reg
	tbz	w0, #31, LBB0_6
LBB0_5:
	mov	x20, x0
LBB0_6:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_DSP_FNC_LOAD_3G_ASIC,4,2       ; @DSP_FNC_LOAD_3G_ASIC
	.comm	_card_fw,8,3                    ; @card_fw
	.comm	_FW_3G_ASIC,8,3                 ; @FW_3G_ASIC
	.comm	_E3G_48KHZ,4,2                  ; @E3G_48KHZ
	.comm	_E3G_FREQ_REG_DEFAULT,4,2       ; @E3G_FREQ_REG_DEFAULT
	.comm	_TRUE,4,2                       ; @TRUE
	.no_dead_strip	_load_asic
.subsections_via_symbols
