	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amd64_init_abi                 ## -- Begin function amd64_init_abi
	.p2align	4, 0x90
_amd64_init_abi:                        ## @amd64_init_abi
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rsi, %rdi
	callq	_gdbarch_tdep
	movq	%rax, %r14
	movq	_I387_SIZEOF_FXSAVE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%r14)
	movq	_AMD64_ST0_REGNUM@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	movl	%eax, 16(%r14)
	movl	$16, (%r14)
	movq	%rbx, %rdi
	movl	$64, %esi
	callq	_set_gdbarch_long_bit
	movq	%rbx, %rdi
	movl	$64, %esi
	callq	_set_gdbarch_long_long_bit
	movq	%rbx, %rdi
	movl	$64, %esi
	callq	_set_gdbarch_ptr_bit
	movq	%rbx, %rdi
	movl	$128, %esi
	callq	_set_gdbarch_long_double_bit
	movq	_AMD64_NUM_REGS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_num_regs
	movq	_amd64_register_name@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_register_name
	movq	_amd64_register_type@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_register_type
	movq	_AMD64_RSP_REGNUM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_sp_regnum
	movq	_AMD64_RIP_REGNUM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_pc_regnum
	movq	_AMD64_EFLAGS_REGNUM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_ps_regnum
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_fp0_regnum
	movq	_amd64_dwarf_reg_to_regnum@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_stab_reg_to_regnum
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_dwarf_reg_to_regnum
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_dwarf2_reg_to_regnum
	movq	_amd64_push_dummy_call@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_push_dummy_call
	movq	_amd64_frame_align@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_frame_align
	movq	%rbx, %rdi
	movl	$128, %esi
	callq	_set_gdbarch_frame_red_zone_size
	movq	_amd64_convert_register_p@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_convert_register_p
	movq	_i387_register_to_value@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_register_to_value
	movq	_i387_value_to_register@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_value_to_register
	movq	_amd64_return_value@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_return_value
	movq	_amd64_skip_prologue@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_skip_prologue
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_set_gdbarch_num_pseudo_regs
	movl	$-1, 4(%r14)
	movq	_amd64_unwind_dummy_id@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_unwind_dummy_id
	movq	_in_plt_section@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_set_gdbarch_in_solib_call_trampoline
	movq	_amd64_sigtramp_frame_sniffer@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_frame_unwind_append_sniffer
	movq	_amd64_frame_sniffer@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_frame_unwind_append_sniffer
	movq	_amd64_frame_base@GOTPCREL(%rip), %rsi
	movq	%rbx, %rdi
	callq	_frame_base_set_default
	cmpq	$0, 8(%r14)
	je	LBB0_1
## %bb.2:
	movq	_amd64_regset_from_core_section@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_set_gdbarch_regset_from_core_section ## TAILCALL
LBB0_1:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_I387_SIZEOF_FXSAVE,4,2         ## @I387_SIZEOF_FXSAVE
	.comm	_AMD64_ST0_REGNUM,4,2           ## @AMD64_ST0_REGNUM
	.comm	_AMD64_NUM_REGS,4,2             ## @AMD64_NUM_REGS
	.comm	_amd64_register_name,4,2        ## @amd64_register_name
	.comm	_amd64_register_type,4,2        ## @amd64_register_type
	.comm	_AMD64_RSP_REGNUM,4,2           ## @AMD64_RSP_REGNUM
	.comm	_AMD64_RIP_REGNUM,4,2           ## @AMD64_RIP_REGNUM
	.comm	_AMD64_EFLAGS_REGNUM,4,2        ## @AMD64_EFLAGS_REGNUM
	.comm	_amd64_dwarf_reg_to_regnum,4,2  ## @amd64_dwarf_reg_to_regnum
	.comm	_amd64_push_dummy_call,4,2      ## @amd64_push_dummy_call
	.comm	_amd64_frame_align,4,2          ## @amd64_frame_align
	.comm	_amd64_convert_register_p,4,2   ## @amd64_convert_register_p
	.comm	_i387_register_to_value,4,2     ## @i387_register_to_value
	.comm	_i387_value_to_register,4,2     ## @i387_value_to_register
	.comm	_amd64_return_value,4,2         ## @amd64_return_value
	.comm	_amd64_skip_prologue,4,2        ## @amd64_skip_prologue
	.comm	_amd64_unwind_dummy_id,4,2      ## @amd64_unwind_dummy_id
	.comm	_in_plt_section,4,2             ## @in_plt_section
	.comm	_amd64_sigtramp_frame_sniffer,4,2 ## @amd64_sigtramp_frame_sniffer
	.comm	_amd64_frame_sniffer,4,2        ## @amd64_frame_sniffer
	.comm	_amd64_frame_base,4,2           ## @amd64_frame_base
	.comm	_amd64_regset_from_core_section,4,2 ## @amd64_regset_from_core_section
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amd64_init_abi                 ; -- Begin function amd64_init_abi
	.p2align	2
_amd64_init_abi:                        ; @amd64_init_abi
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x0, x1
	bl	_gdbarch_tdep
	mov	x20, x0
Lloh0:
	adrp	x8, _I387_SIZEOF_FXSAVE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _I387_SIZEOF_FXSAVE@GOTPAGEOFF]
Lloh2:
	adrp	x21, _AMD64_ST0_REGNUM@GOTPAGE
Lloh3:
	ldr	x21, [x21, _AMD64_ST0_REGNUM@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	ldr	w9, [x21]
	stp	w9, w8, [x0, #16]
	mov	w8, #16
	str	w8, [x0]
	mov	x0, x19
	mov	w1, #64
	bl	_set_gdbarch_long_bit
	mov	x0, x19
	mov	w1, #64
	bl	_set_gdbarch_long_long_bit
	mov	x0, x19
	mov	w1, #64
	bl	_set_gdbarch_ptr_bit
	mov	x0, x19
	mov	w1, #128
	bl	_set_gdbarch_long_double_bit
Lloh5:
	adrp	x8, _AMD64_NUM_REGS@GOTPAGE
Lloh6:
	ldr	x8, [x8, _AMD64_NUM_REGS@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_num_regs
Lloh8:
	adrp	x8, _amd64_register_name@GOTPAGE
Lloh9:
	ldr	x8, [x8, _amd64_register_name@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_register_name
Lloh11:
	adrp	x8, _amd64_register_type@GOTPAGE
Lloh12:
	ldr	x8, [x8, _amd64_register_type@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_register_type
Lloh14:
	adrp	x8, _AMD64_RSP_REGNUM@GOTPAGE
Lloh15:
	ldr	x8, [x8, _AMD64_RSP_REGNUM@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_sp_regnum
Lloh17:
	adrp	x8, _AMD64_RIP_REGNUM@GOTPAGE
Lloh18:
	ldr	x8, [x8, _AMD64_RIP_REGNUM@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_pc_regnum
Lloh20:
	adrp	x8, _AMD64_EFLAGS_REGNUM@GOTPAGE
Lloh21:
	ldr	x8, [x8, _AMD64_EFLAGS_REGNUM@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_ps_regnum
	ldr	w1, [x21]
	mov	x0, x19
	bl	_set_gdbarch_fp0_regnum
Lloh23:
	adrp	x21, _amd64_dwarf_reg_to_regnum@GOTPAGE
Lloh24:
	ldr	x21, [x21, _amd64_dwarf_reg_to_regnum@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_set_gdbarch_stab_reg_to_regnum
	ldr	w1, [x21]
	mov	x0, x19
	bl	_set_gdbarch_dwarf_reg_to_regnum
	ldr	w1, [x21]
	mov	x0, x19
	bl	_set_gdbarch_dwarf2_reg_to_regnum
Lloh25:
	adrp	x8, _amd64_push_dummy_call@GOTPAGE
Lloh26:
	ldr	x8, [x8, _amd64_push_dummy_call@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_push_dummy_call
Lloh28:
	adrp	x8, _amd64_frame_align@GOTPAGE
Lloh29:
	ldr	x8, [x8, _amd64_frame_align@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_frame_align
	mov	x0, x19
	mov	w1, #128
	bl	_set_gdbarch_frame_red_zone_size
Lloh31:
	adrp	x8, _amd64_convert_register_p@GOTPAGE
Lloh32:
	ldr	x8, [x8, _amd64_convert_register_p@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_convert_register_p
Lloh34:
	adrp	x8, _i387_register_to_value@GOTPAGE
Lloh35:
	ldr	x8, [x8, _i387_register_to_value@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_register_to_value
Lloh37:
	adrp	x8, _i387_value_to_register@GOTPAGE
Lloh38:
	ldr	x8, [x8, _i387_value_to_register@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_value_to_register
Lloh40:
	adrp	x8, _amd64_return_value@GOTPAGE
Lloh41:
	ldr	x8, [x8, _amd64_return_value@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_return_value
Lloh43:
	adrp	x8, _amd64_skip_prologue@GOTPAGE
Lloh44:
	ldr	x8, [x8, _amd64_skip_prologue@GOTPAGEOFF]
Lloh45:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_skip_prologue
	mov	x0, x19
	mov	w1, #0
	bl	_set_gdbarch_num_pseudo_regs
	mov	w8, #-1
	str	w8, [x20, #4]
Lloh46:
	adrp	x8, _amd64_unwind_dummy_id@GOTPAGE
Lloh47:
	ldr	x8, [x8, _amd64_unwind_dummy_id@GOTPAGEOFF]
Lloh48:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_unwind_dummy_id
Lloh49:
	adrp	x8, _in_plt_section@GOTPAGE
Lloh50:
	ldr	x8, [x8, _in_plt_section@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_set_gdbarch_in_solib_call_trampoline
Lloh52:
	adrp	x8, _amd64_sigtramp_frame_sniffer@GOTPAGE
Lloh53:
	ldr	x8, [x8, _amd64_sigtramp_frame_sniffer@GOTPAGEOFF]
Lloh54:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_frame_unwind_append_sniffer
Lloh55:
	adrp	x8, _amd64_frame_sniffer@GOTPAGE
Lloh56:
	ldr	x8, [x8, _amd64_frame_sniffer@GOTPAGEOFF]
Lloh57:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_frame_unwind_append_sniffer
Lloh58:
	adrp	x1, _amd64_frame_base@GOTPAGE
Lloh59:
	ldr	x1, [x1, _amd64_frame_base@GOTPAGEOFF]
	mov	x0, x19
	bl	_frame_base_set_default
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_2
; %bb.1:
Lloh60:
	adrp	x8, _amd64_regset_from_core_section@GOTPAGE
Lloh61:
	ldr	x8, [x8, _amd64_regset_from_core_section@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_set_gdbarch_regset_from_core_section
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.cfi_endproc
                                        ; -- End function
	.comm	_I387_SIZEOF_FXSAVE,4,2         ; @I387_SIZEOF_FXSAVE
	.comm	_AMD64_ST0_REGNUM,4,2           ; @AMD64_ST0_REGNUM
	.comm	_AMD64_NUM_REGS,4,2             ; @AMD64_NUM_REGS
	.comm	_amd64_register_name,4,2        ; @amd64_register_name
	.comm	_amd64_register_type,4,2        ; @amd64_register_type
	.comm	_AMD64_RSP_REGNUM,4,2           ; @AMD64_RSP_REGNUM
	.comm	_AMD64_RIP_REGNUM,4,2           ; @AMD64_RIP_REGNUM
	.comm	_AMD64_EFLAGS_REGNUM,4,2        ; @AMD64_EFLAGS_REGNUM
	.comm	_amd64_dwarf_reg_to_regnum,4,2  ; @amd64_dwarf_reg_to_regnum
	.comm	_amd64_push_dummy_call,4,2      ; @amd64_push_dummy_call
	.comm	_amd64_frame_align,4,2          ; @amd64_frame_align
	.comm	_amd64_convert_register_p,4,2   ; @amd64_convert_register_p
	.comm	_i387_register_to_value,4,2     ; @i387_register_to_value
	.comm	_i387_value_to_register,4,2     ; @i387_value_to_register
	.comm	_amd64_return_value,4,2         ; @amd64_return_value
	.comm	_amd64_skip_prologue,4,2        ; @amd64_skip_prologue
	.comm	_amd64_unwind_dummy_id,4,2      ; @amd64_unwind_dummy_id
	.comm	_in_plt_section,4,2             ; @in_plt_section
	.comm	_amd64_sigtramp_frame_sniffer,4,2 ; @amd64_sigtramp_frame_sniffer
	.comm	_amd64_frame_sniffer,4,2        ; @amd64_frame_sniffer
	.comm	_amd64_frame_base,4,2           ; @amd64_frame_base
	.comm	_amd64_regset_from_core_section,4,2 ; @amd64_regset_from_core_section
.subsections_via_symbols
