	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function getIntelProcessorTypeAndSubtype
_getIntelProcessorTypeAndSubtype:       ## @getIntelProcessorTypeAndSubtype
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
                                        ## kill: def $esi killed $esi def $rsi
	cmpl	$6, %edi
	jne	LBB0_26
## %bb.1:
	testl	%edx, %edx
	jne	LBB0_26
## %bb.2:
	addl	$-15, %esi
	cmpl	$143, %esi
	ja	LBB0_26
## %bb.3:
	movq	16(%rbp), %rax
	movq	_INTEL_CORE2@GOTPCREL(%rip), %rcx
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%rsi,4), %rsi
	addq	%rdx, %rsi
	jmpq	*%rsi
LBB0_4:
	movq	_INTEL_SILVERMONT@GOTPCREL(%rip), %rcx
	jmp	LBB0_25
LBB0_5:
	movq	_INTEL_BONNELL@GOTPCREL(%rip), %rcx
	jmp	LBB0_25
LBB0_6:
	movq	_INTEL_COREI7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r9)
	movq	_INTEL_COREI7_NEHALEM@GOTPCREL(%rip), %rcx
	jmp	LBB0_24
LBB0_7:
	movq	_INTEL_COREI7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r9)
	movq	_INTEL_COREI7_HASWELL@GOTPCREL(%rip), %rcx
	jmp	LBB0_24
LBB0_8:
	movq	_INTEL_COREI7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r9)
	movq	_INTEL_COREI7_BROADWELL@GOTPCREL(%rip), %rcx
	jmp	LBB0_24
LBB0_9:
	movq	_INTEL_COREI7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r9)
	movq	_INTEL_COREI7_SKYLAKE@GOTPCREL(%rip), %rcx
	jmp	LBB0_24
LBB0_10:
	movq	_INTEL_COREI7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r9)
	movq	_INTEL_COREI7_WESTMERE@GOTPCREL(%rip), %rcx
	jmp	LBB0_24
LBB0_11:
	movq	_INTEL_COREI7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r9)
	movq	_INTEL_COREI7_SANDYBRIDGE@GOTPCREL(%rip), %rcx
	jmp	LBB0_24
LBB0_12:
	movq	_INTEL_COREI7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r9)
	movq	_INTEL_COREI7_IVYBRIDGE@GOTPCREL(%rip), %rcx
	jmp	LBB0_24
LBB0_13:
	movq	_INTEL_GOLDMONT@GOTPCREL(%rip), %rcx
	jmp	LBB0_25
LBB0_14:
	movq	_INTEL_COREI7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r9)
	movq	_INTEL_COREI7_ICELAKE_SERVER@GOTPCREL(%rip), %rcx
	jmp	LBB0_24
LBB0_15:
	movq	_INTEL_COREI7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r9)
	movq	_INTEL_COREI7_ICELAKE_CLIENT@GOTPCREL(%rip), %rcx
	jmp	LBB0_24
LBB0_16:
	movq	_INTEL_COREI7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r9)
	movq	_FEATURE_AVX512VNNI@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	addb	$-32, %cl
	movzbl	%cl, %ecx
	btl	%ecx, %r8d
	jb	LBB0_23
## %bb.17:
	movq	_INTEL_COREI7_SKYLAKE_AVX512@GOTPCREL(%rip), %rcx
	jmp	LBB0_24
LBB0_18:
	movq	_INTEL_KNL@GOTPCREL(%rip), %rcx
	jmp	LBB0_25
LBB0_19:
	movq	_INTEL_COREI7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r9)
	movq	_INTEL_COREI7_CANNONLAKE@GOTPCREL(%rip), %rcx
	jmp	LBB0_24
LBB0_20:
	movq	_INTEL_TREMONT@GOTPCREL(%rip), %rcx
	jmp	LBB0_25
LBB0_21:
	movq	_INTEL_GOLDMONT_PLUS@GOTPCREL(%rip), %rcx
	jmp	LBB0_25
LBB0_22:
	movq	_INTEL_KNM@GOTPCREL(%rip), %rcx
	jmp	LBB0_25
LBB0_23:
	movq	_INTEL_COREI7_CASCADELAKE@GOTPCREL(%rip), %rcx
LBB0_24:
	movq	%rax, %r9
LBB0_25:
	movl	(%rcx), %eax
	movl	%eax, (%r9)
LBB0_26:
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_25, LBB0_25-LJTI0_0
.set L0_0_set_26, LBB0_26-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_12, LBB0_12-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_19, LBB0_19-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
.set L0_0_set_21, LBB0_21-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_22, LBB0_22-LJTI0_0
.set L0_0_set_20, LBB0_20-LJTI0_0
LJTI0_0:
	.long	L0_0_set_25
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_25
	.long	L0_0_set_25
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_6
	.long	L0_0_set_26
	.long	L0_0_set_5
	.long	L0_0_set_25
	.long	L0_0_set_6
	.long	L0_0_set_6
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_10
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_11
	.long	L0_0_set_26
	.long	L0_0_set_10
	.long	L0_0_set_11
	.long	L0_0_set_6
	.long	L0_0_set_10
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_4
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_12
	.long	L0_0_set_26
	.long	L0_0_set_7
	.long	L0_0_set_8
	.long	L0_0_set_12
	.long	L0_0_set_7
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_7
	.long	L0_0_set_7
	.long	L0_0_set_8
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_4
	.long	L0_0_set_26
	.long	L0_0_set_4
	.long	L0_0_set_4
	.long	L0_0_set_9
	.long	L0_0_set_8
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_16
	.long	L0_0_set_8
	.long	L0_0_set_18
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_4
	.long	L0_0_set_26
	.long	L0_0_set_13
	.long	L0_0_set_4
	.long	L0_0_set_9
	.long	L0_0_set_13
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_19
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_14
	.long	L0_0_set_26
	.long	L0_0_set_14
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_21
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_15
	.long	L0_0_set_15
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_22
	.long	L0_0_set_20
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_9
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_26
	.long	L0_0_set_9
	.end_data_region
                                        ## -- End function
	.comm	_INTEL_CORE2,4,2                ## @INTEL_CORE2
	.comm	_INTEL_COREI7,4,2               ## @INTEL_COREI7
	.comm	_INTEL_COREI7_NEHALEM,4,2       ## @INTEL_COREI7_NEHALEM
	.comm	_INTEL_COREI7_WESTMERE,4,2      ## @INTEL_COREI7_WESTMERE
	.comm	_INTEL_COREI7_SANDYBRIDGE,4,2   ## @INTEL_COREI7_SANDYBRIDGE
	.comm	_INTEL_COREI7_IVYBRIDGE,4,2     ## @INTEL_COREI7_IVYBRIDGE
	.comm	_INTEL_COREI7_HASWELL,4,2       ## @INTEL_COREI7_HASWELL
	.comm	_INTEL_COREI7_BROADWELL,4,2     ## @INTEL_COREI7_BROADWELL
	.comm	_INTEL_COREI7_SKYLAKE,4,2       ## @INTEL_COREI7_SKYLAKE
	.comm	_FEATURE_AVX512VNNI,4,2         ## @FEATURE_AVX512VNNI
	.comm	_INTEL_COREI7_CASCADELAKE,4,2   ## @INTEL_COREI7_CASCADELAKE
	.comm	_INTEL_COREI7_SKYLAKE_AVX512,4,2 ## @INTEL_COREI7_SKYLAKE_AVX512
	.comm	_INTEL_COREI7_CANNONLAKE,4,2    ## @INTEL_COREI7_CANNONLAKE
	.comm	_INTEL_COREI7_ICELAKE_CLIENT,4,2 ## @INTEL_COREI7_ICELAKE_CLIENT
	.comm	_INTEL_COREI7_ICELAKE_SERVER,4,2 ## @INTEL_COREI7_ICELAKE_SERVER
	.comm	_INTEL_BONNELL,4,2              ## @INTEL_BONNELL
	.comm	_INTEL_SILVERMONT,4,2           ## @INTEL_SILVERMONT
	.comm	_INTEL_GOLDMONT,4,2             ## @INTEL_GOLDMONT
	.comm	_INTEL_GOLDMONT_PLUS,4,2        ## @INTEL_GOLDMONT_PLUS
	.comm	_INTEL_TREMONT,4,2              ## @INTEL_TREMONT
	.comm	_INTEL_KNL,4,2                  ## @INTEL_KNL
	.comm	_INTEL_KNM,4,2                  ## @INTEL_KNM
	.no_dead_strip	_getIntelProcessorTypeAndSubtype
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function getIntelProcessorTypeAndSubtype
_getIntelProcessorTypeAndSubtype:       ; @getIntelProcessorTypeAndSubtype
	.cfi_startproc
; %bb.0:
	cmp	w0, #6
	b.ne	LBB0_23
; %bb.1:
	cbnz	w2, LBB0_23
; %bb.2:
	sub	w9, w1, #15
	cmp	w9, #143
	b.hi	LBB0_23
; %bb.3:
Lloh0:
	adrp	x8, _INTEL_CORE2@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_CORE2@GOTPAGEOFF]
Lloh2:
	adrp	x10, lJTI0_0@PAGE
Lloh3:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_4
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_4:
Lloh4:
	adrp	x8, _INTEL_SILVERMONT@GOTPAGE
Lloh5:
	ldr	x8, [x8, _INTEL_SILVERMONT@GOTPAGEOFF]
	b	LBB0_22
LBB0_5:
Lloh6:
	adrp	x8, _INTEL_BONNELL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _INTEL_BONNELL@GOTPAGEOFF]
	b	LBB0_22
LBB0_6:
Lloh8:
	adrp	x8, _INTEL_COREI7@GOTPAGE
Lloh9:
	ldr	x8, [x8, _INTEL_COREI7@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	str	w8, [x5]
Lloh11:
	adrp	x8, _INTEL_COREI7_NEHALEM@GOTPAGE
Lloh12:
	ldr	x8, [x8, _INTEL_COREI7_NEHALEM@GOTPAGEOFF]
	mov	x5, x6
	b	LBB0_22
LBB0_7:
Lloh13:
	adrp	x8, _INTEL_COREI7@GOTPAGE
Lloh14:
	ldr	x8, [x8, _INTEL_COREI7@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	str	w8, [x5]
Lloh16:
	adrp	x8, _INTEL_COREI7_HASWELL@GOTPAGE
Lloh17:
	ldr	x8, [x8, _INTEL_COREI7_HASWELL@GOTPAGEOFF]
	mov	x5, x6
	b	LBB0_22
LBB0_8:
Lloh18:
	adrp	x8, _INTEL_COREI7@GOTPAGE
Lloh19:
	ldr	x8, [x8, _INTEL_COREI7@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	str	w8, [x5]
Lloh21:
	adrp	x8, _INTEL_COREI7_BROADWELL@GOTPAGE
Lloh22:
	ldr	x8, [x8, _INTEL_COREI7_BROADWELL@GOTPAGEOFF]
	mov	x5, x6
	b	LBB0_22
LBB0_9:
Lloh23:
	adrp	x8, _INTEL_COREI7@GOTPAGE
Lloh24:
	ldr	x8, [x8, _INTEL_COREI7@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	str	w8, [x5]
Lloh26:
	adrp	x8, _INTEL_COREI7_SKYLAKE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _INTEL_COREI7_SKYLAKE@GOTPAGEOFF]
	mov	x5, x6
	b	LBB0_22
LBB0_10:
Lloh28:
	adrp	x8, _INTEL_COREI7@GOTPAGE
Lloh29:
	ldr	x8, [x8, _INTEL_COREI7@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	str	w8, [x5]
Lloh31:
	adrp	x8, _INTEL_COREI7_WESTMERE@GOTPAGE
Lloh32:
	ldr	x8, [x8, _INTEL_COREI7_WESTMERE@GOTPAGEOFF]
	mov	x5, x6
	b	LBB0_22
LBB0_11:
Lloh33:
	adrp	x8, _INTEL_GOLDMONT@GOTPAGE
Lloh34:
	ldr	x8, [x8, _INTEL_GOLDMONT@GOTPAGEOFF]
	b	LBB0_22
LBB0_12:
Lloh35:
	adrp	x8, _INTEL_COREI7@GOTPAGE
Lloh36:
	ldr	x8, [x8, _INTEL_COREI7@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	str	w8, [x5]
Lloh38:
	adrp	x8, _INTEL_COREI7_ICELAKE_CLIENT@GOTPAGE
Lloh39:
	ldr	x8, [x8, _INTEL_COREI7_ICELAKE_CLIENT@GOTPAGEOFF]
	mov	x5, x6
	b	LBB0_22
LBB0_13:
Lloh40:
	adrp	x8, _INTEL_COREI7@GOTPAGE
Lloh41:
	ldr	x8, [x8, _INTEL_COREI7@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	str	w8, [x5]
Lloh43:
	adrp	x8, _INTEL_COREI7_SANDYBRIDGE@GOTPAGE
Lloh44:
	ldr	x8, [x8, _INTEL_COREI7_SANDYBRIDGE@GOTPAGEOFF]
	mov	x5, x6
	b	LBB0_22
LBB0_14:
Lloh45:
	adrp	x8, _INTEL_COREI7@GOTPAGE
Lloh46:
	ldr	x8, [x8, _INTEL_COREI7@GOTPAGEOFF]
Lloh47:
	ldr	w8, [x8]
	str	w8, [x5]
Lloh48:
	adrp	x8, _INTEL_COREI7_IVYBRIDGE@GOTPAGE
Lloh49:
	ldr	x8, [x8, _INTEL_COREI7_IVYBRIDGE@GOTPAGEOFF]
	mov	x5, x6
	b	LBB0_22
LBB0_15:
Lloh50:
	adrp	x8, _INTEL_COREI7@GOTPAGE
Lloh51:
	ldr	x8, [x8, _INTEL_COREI7@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	str	w8, [x5]
Lloh53:
	adrp	x8, _INTEL_COREI7_ICELAKE_SERVER@GOTPAGE
Lloh54:
	ldr	x8, [x8, _INTEL_COREI7_ICELAKE_SERVER@GOTPAGEOFF]
	mov	x5, x6
	b	LBB0_22
LBB0_16:
Lloh55:
	adrp	x8, _INTEL_COREI7@GOTPAGE
Lloh56:
	ldr	x8, [x8, _INTEL_COREI7@GOTPAGEOFF]
Lloh57:
	ldr	w8, [x8]
	str	w8, [x5]
Lloh58:
	adrp	x8, _FEATURE_AVX512VNNI@GOTPAGE
Lloh59:
	ldr	x8, [x8, _FEATURE_AVX512VNNI@GOTPAGEOFF]
Lloh60:
	ldr	w8, [x8]
Lloh61:
	adrp	x9, _INTEL_COREI7_CASCADELAKE@GOTPAGE
Lloh62:
	ldr	x9, [x9, _INTEL_COREI7_CASCADELAKE@GOTPAGEOFF]
	lsr	w8, w4, w8
Lloh63:
	adrp	x10, _INTEL_COREI7_SKYLAKE_AVX512@GOTPAGE
Lloh64:
	ldr	x10, [x10, _INTEL_COREI7_SKYLAKE_AVX512@GOTPAGEOFF]
	tst	w8, #0x1
	csel	x8, x10, x9, eq
	mov	x5, x6
	b	LBB0_22
LBB0_17:
Lloh65:
	adrp	x8, _INTEL_KNL@GOTPAGE
Lloh66:
	ldr	x8, [x8, _INTEL_KNL@GOTPAGEOFF]
	b	LBB0_22
LBB0_18:
Lloh67:
	adrp	x8, _INTEL_COREI7@GOTPAGE
Lloh68:
	ldr	x8, [x8, _INTEL_COREI7@GOTPAGEOFF]
Lloh69:
	ldr	w8, [x8]
	str	w8, [x5]
Lloh70:
	adrp	x8, _INTEL_COREI7_CANNONLAKE@GOTPAGE
Lloh71:
	ldr	x8, [x8, _INTEL_COREI7_CANNONLAKE@GOTPAGEOFF]
	mov	x5, x6
	b	LBB0_22
LBB0_19:
Lloh72:
	adrp	x8, _INTEL_GOLDMONT_PLUS@GOTPAGE
Lloh73:
	ldr	x8, [x8, _INTEL_GOLDMONT_PLUS@GOTPAGEOFF]
	b	LBB0_22
LBB0_20:
Lloh74:
	adrp	x8, _INTEL_KNM@GOTPAGE
Lloh75:
	ldr	x8, [x8, _INTEL_KNM@GOTPAGEOFF]
	b	LBB0_22
LBB0_21:
Lloh76:
	adrp	x8, _INTEL_TREMONT@GOTPAGE
Lloh77:
	ldr	x8, [x8, _INTEL_TREMONT@GOTPAGEOFF]
LBB0_22:
	ldr	w8, [x8]
	str	w8, [x5]
LBB0_23:
	ret
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh63, Lloh64
	.loh AdrpLdrGot	Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpLdrGot	Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGot	Lloh74, Lloh75
	.loh AdrpLdrGot	Lloh76, Lloh77
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_22-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_22-LBB0_4)>>2
	.byte	(LBB0_22-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_6-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_5-LBB0_4)>>2
	.byte	(LBB0_22-LBB0_4)>>2
	.byte	(LBB0_6-LBB0_4)>>2
	.byte	(LBB0_6-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_10-LBB0_4)>>2
	.byte	(LBB0_5-LBB0_4)>>2
	.byte	(LBB0_5-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_13-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_10-LBB0_4)>>2
	.byte	(LBB0_13-LBB0_4)>>2
	.byte	(LBB0_6-LBB0_4)>>2
	.byte	(LBB0_10-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_5-LBB0_4)>>2
	.byte	(LBB0_5-LBB0_4)>>2
	.byte	(LBB0_4-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_14-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_7-LBB0_4)>>2
	.byte	(LBB0_8-LBB0_4)>>2
	.byte	(LBB0_14-LBB0_4)>>2
	.byte	(LBB0_7-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_7-LBB0_4)>>2
	.byte	(LBB0_7-LBB0_4)>>2
	.byte	(LBB0_8-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_4-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_4-LBB0_4)>>2
	.byte	(LBB0_4-LBB0_4)>>2
	.byte	(LBB0_9-LBB0_4)>>2
	.byte	(LBB0_8-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_16-LBB0_4)>>2
	.byte	(LBB0_8-LBB0_4)>>2
	.byte	(LBB0_17-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_4-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_11-LBB0_4)>>2
	.byte	(LBB0_4-LBB0_4)>>2
	.byte	(LBB0_9-LBB0_4)>>2
	.byte	(LBB0_11-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_18-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_15-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_15-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_19-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_12-LBB0_4)>>2
	.byte	(LBB0_12-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_20-LBB0_4)>>2
	.byte	(LBB0_21-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_9-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_23-LBB0_4)>>2
	.byte	(LBB0_9-LBB0_4)>>2
                                        ; -- End function
	.comm	_INTEL_CORE2,4,2                ; @INTEL_CORE2
	.comm	_INTEL_COREI7,4,2               ; @INTEL_COREI7
	.comm	_INTEL_COREI7_NEHALEM,4,2       ; @INTEL_COREI7_NEHALEM
	.comm	_INTEL_COREI7_WESTMERE,4,2      ; @INTEL_COREI7_WESTMERE
	.comm	_INTEL_COREI7_SANDYBRIDGE,4,2   ; @INTEL_COREI7_SANDYBRIDGE
	.comm	_INTEL_COREI7_IVYBRIDGE,4,2     ; @INTEL_COREI7_IVYBRIDGE
	.comm	_INTEL_COREI7_HASWELL,4,2       ; @INTEL_COREI7_HASWELL
	.comm	_INTEL_COREI7_BROADWELL,4,2     ; @INTEL_COREI7_BROADWELL
	.comm	_INTEL_COREI7_SKYLAKE,4,2       ; @INTEL_COREI7_SKYLAKE
	.comm	_FEATURE_AVX512VNNI,4,2         ; @FEATURE_AVX512VNNI
	.comm	_INTEL_COREI7_CASCADELAKE,4,2   ; @INTEL_COREI7_CASCADELAKE
	.comm	_INTEL_COREI7_SKYLAKE_AVX512,4,2 ; @INTEL_COREI7_SKYLAKE_AVX512
	.comm	_INTEL_COREI7_CANNONLAKE,4,2    ; @INTEL_COREI7_CANNONLAKE
	.comm	_INTEL_COREI7_ICELAKE_CLIENT,4,2 ; @INTEL_COREI7_ICELAKE_CLIENT
	.comm	_INTEL_COREI7_ICELAKE_SERVER,4,2 ; @INTEL_COREI7_ICELAKE_SERVER
	.comm	_INTEL_BONNELL,4,2              ; @INTEL_BONNELL
	.comm	_INTEL_SILVERMONT,4,2           ; @INTEL_SILVERMONT
	.comm	_INTEL_GOLDMONT,4,2             ; @INTEL_GOLDMONT
	.comm	_INTEL_GOLDMONT_PLUS,4,2        ; @INTEL_GOLDMONT_PLUS
	.comm	_INTEL_TREMONT,4,2              ; @INTEL_TREMONT
	.comm	_INTEL_KNL,4,2                  ; @INTEL_KNL
	.comm	_INTEL_KNM,4,2                  ; @INTEL_KNM
	.no_dead_strip	_getIntelProcessorTypeAndSubtype
.subsections_via_symbols
