	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mips_cpu_info_from_isa
_mips_cpu_info_from_isa:                ## @mips_cpu_info_from_isa
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_mips_cpu_info_table@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	$0, 8(%rax)
	je	LBB0_5
## %bb.1:
	movq	_MIPS_CPU_IS_ISA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	cmpq	$0, 24(%rax)
	leaq	16(%rax), %rax
	je	LBB0_5
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	testl	%ecx, (%rax)
	je	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	cmpl	%edi, 4(%rax)
	jne	LBB0_4
## %bb.6:
	popq	%rbp
	retq
LBB0_5:
	xorl	%eax, %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_mips_cpu_info_table,8,3        ## @mips_cpu_info_table
	.comm	_MIPS_CPU_IS_ISA,4,2            ## @MIPS_CPU_IS_ISA
	.no_dead_strip	_mips_cpu_info_from_isa
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mips_cpu_info_from_isa
_mips_cpu_info_from_isa:                ; @mips_cpu_info_from_isa
	.cfi_startproc
; %bb.0:
	mov	x8, x0
Lloh0:
	adrp	x9, _mips_cpu_info_table@GOTPAGE
Lloh1:
	ldr	x9, [x9, _mips_cpu_info_table@GOTPAGEOFF]
Lloh2:
	ldr	x0, [x9]
	ldr	x9, [x0, #8]
	cbz	x9, LBB0_6
; %bb.1:
Lloh3:
	adrp	x9, _MIPS_CPU_IS_ISA@GOTPAGE
Lloh4:
	ldr	x9, [x9, _MIPS_CPU_IS_ISA@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	ldr	x10, [x0, #24]
	add	x0, x0, #16
	cbz	x10, LBB0_6
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w10, [x0]
	tst	w9, w10
	b.eq	LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w10, [x0, #4]
	cmp	w10, w8
	b.ne	LBB0_2
; %bb.5:
	ret
LBB0_6:
	mov	x0, #0
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_mips_cpu_info_table,8,3        ; @mips_cpu_info_table
	.comm	_MIPS_CPU_IS_ISA,4,2            ; @MIPS_CPU_IS_ISA
	.no_dead_strip	_mips_cpu_info_from_isa
.subsections_via_symbols
