	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function davinci_config_channel_size
_davinci_config_channel_size:           ## @davinci_config_channel_size
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	addl	$-128, %esi
	cmpl	$7, %esi
	jae	LBB0_1
## %bb.2:
	movq	%rdi, %r13
	movslq	%esi, %rax
	leaq	l_switch.table.davinci_config_channel_size(%rip), %rcx
	movl	(%rcx,%rax,4), %r12d
	leaq	l_switch.table.davinci_config_channel_size.1(%rip), %rcx
	movl	(%rcx,%rax,4), %ecx
	movl	%ecx, -48(%rbp)                 ## 4-byte Spill
	leaq	l_switch.table.davinci_config_channel_size.2(%rip), %rcx
	movl	(%rcx,%rax,4), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_DAVINCI_MCASP_RXFMT_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	addq	(%rdi), %rbx
	movl	%r12d, %edi
	callq	_RXSSZ
	movl	%eax, %r14d
	movl	$15, %edi
	callq	_RXSSZ
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_mcasp_mod_bits
	movq	_DAVINCI_MCASP_TXFMT_REG@GOTPCREL(%rip), %r15
	movq	(%r15), %rbx
	addq	(%r13), %rbx
	movl	%r12d, %edi
	callq	_TXSSZ
	movl	%eax, %r14d
	movl	$15, %edi
	callq	_TXSSZ
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_mcasp_mod_bits
	movq	(%r15), %rbx
	addq	(%r13), %rbx
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	movl	%r15d, %edi
	callq	_TXROT
	movl	%eax, %r14d
	movl	$7, %edi
	callq	_TXROT
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_mcasp_mod_bits
	movq	_DAVINCI_MCASP_RXFMT_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	addq	(%r13), %rbx
	movl	%r15d, %edi
	callq	_RXROT
	movl	%eax, %r14d
	movl	$7, %edi
	callq	_RXROT
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_mcasp_mod_bits
	movq	_DAVINCI_MCASP_TXMASK_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%r13), %rdi
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %esi
	callq	_mcasp_set_reg
	movq	_DAVINCI_MCASP_RXMASK_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%r13), %rdi
	movl	%ebx, %esi
	callq	_mcasp_set_reg
	xorl	%eax, %eax
	jmp	LBB0_3
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_DAVINCI_MCASP_RXFMT_REG,8,3    ## @DAVINCI_MCASP_RXFMT_REG
	.comm	_DAVINCI_MCASP_TXFMT_REG,8,3    ## @DAVINCI_MCASP_TXFMT_REG
	.comm	_DAVINCI_MCASP_TXMASK_REG,8,3   ## @DAVINCI_MCASP_TXMASK_REG
	.comm	_DAVINCI_MCASP_RXMASK_REG,8,3   ## @DAVINCI_MCASP_RXMASK_REG
	.no_dead_strip	_davinci_config_channel_size
	.section	__TEXT,__const
	.p2align	2                               ## @switch.table.davinci_config_channel_size
l_switch.table.davinci_config_channel_size:
	.long	3                               ## 0x3
	.long	15                              ## 0xf
	.long	13                              ## 0xd
	.long	11                              ## 0xb
	.long	9                               ## 0x9
	.long	7                               ## 0x7
	.long	5                               ## 0x5

	.p2align	2                               ## @switch.table.davinci_config_channel_size.1
l_switch.table.davinci_config_channel_size.1:
	.long	255                             ## 0xff
	.long	4294967295                      ## 0xffffffff
	.long	268435455                       ## 0xfffffff
	.long	16777215                        ## 0xffffff
	.long	1048575                         ## 0xfffff
	.long	65535                           ## 0xffff
	.long	4095                            ## 0xfff

	.p2align	2                               ## @switch.table.davinci_config_channel_size.2
l_switch.table.davinci_config_channel_size.2:
	.long	6                               ## 0x6
	.long	0                               ## 0x0
	.long	1                               ## 0x1
	.long	2                               ## 0x2
	.long	3                               ## 0x3
	.long	4                               ## 0x4
	.long	5                               ## 0x5

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function davinci_config_channel_size
_davinci_config_channel_size:           ; @davinci_config_channel_size
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	sub	w8, w1, #128
	cmp	w8, #7
	b.hs	LBB0_2
; %bb.1:
	mov	x19, x0
	sbfiz	x8, x8, #2, #32
Lloh0:
	adrp	x9, l_switch.table.davinci_config_channel_size@PAGE
Lloh1:
	add	x9, x9, l_switch.table.davinci_config_channel_size@PAGEOFF
	ldr	w22, [x9, x8]
Lloh2:
	adrp	x9, l_switch.table.davinci_config_channel_size.1@PAGE
Lloh3:
	add	x9, x9, l_switch.table.davinci_config_channel_size.1@PAGEOFF
	ldr	w20, [x9, x8]
Lloh4:
	adrp	x9, l_switch.table.davinci_config_channel_size.2@PAGE
Lloh5:
	add	x9, x9, l_switch.table.davinci_config_channel_size.2@PAGEOFF
	ldr	w21, [x9, x8]
	ldr	x8, [x0]
Lloh6:
	adrp	x25, _DAVINCI_MCASP_RXFMT_REG@GOTPAGE
Lloh7:
	ldr	x25, [x25, _DAVINCI_MCASP_RXFMT_REG@GOTPAGEOFF]
	ldr	x9, [x25]
	add	x23, x9, x8
	mov	x0, x22
	bl	_RXSSZ
	mov	x24, x0
	mov	w0, #15
	bl	_RXSSZ
	mov	x2, x0
	mov	x0, x23
	mov	x1, x24
	bl	_mcasp_mod_bits
	ldr	x8, [x19]
Lloh8:
	adrp	x24, _DAVINCI_MCASP_TXFMT_REG@GOTPAGE
Lloh9:
	ldr	x24, [x24, _DAVINCI_MCASP_TXFMT_REG@GOTPAGEOFF]
	ldr	x9, [x24]
	add	x23, x9, x8
	mov	x0, x22
	bl	_TXSSZ
	mov	x22, x0
	mov	w0, #15
	bl	_TXSSZ
	mov	x2, x0
	mov	x0, x23
	mov	x1, x22
	bl	_mcasp_mod_bits
	ldr	x8, [x19]
	ldr	x9, [x24]
	add	x22, x9, x8
	mov	x0, x21
	bl	_TXROT
	mov	x23, x0
	mov	w0, #7
	bl	_TXROT
	mov	x2, x0
	mov	x0, x22
	mov	x1, x23
	bl	_mcasp_mod_bits
	ldr	x8, [x19]
	ldr	x9, [x25]
	add	x22, x9, x8
	mov	x0, x21
	bl	_RXROT
	mov	x21, x0
	mov	w0, #7
	bl	_RXROT
	mov	x2, x0
	mov	x0, x22
	mov	x1, x21
	bl	_mcasp_mod_bits
	ldr	x8, [x19]
Lloh10:
	adrp	x9, _DAVINCI_MCASP_TXMASK_REG@GOTPAGE
Lloh11:
	ldr	x9, [x9, _DAVINCI_MCASP_TXMASK_REG@GOTPAGEOFF]
Lloh12:
	ldr	x9, [x9]
	add	x0, x9, x8
	mov	x1, x20
	bl	_mcasp_set_reg
	ldr	x8, [x19]
Lloh13:
	adrp	x9, _DAVINCI_MCASP_RXMASK_REG@GOTPAGE
Lloh14:
	ldr	x9, [x9, _DAVINCI_MCASP_RXMASK_REG@GOTPAGEOFF]
Lloh15:
	ldr	x9, [x9]
	add	x0, x9, x8
	mov	x1, x20
	bl	_mcasp_set_reg
	mov	w0, #0
	b	LBB0_3
LBB0_2:
Lloh16:
	adrp	x8, _EINVAL@GOTPAGE
Lloh17:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_3:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_DAVINCI_MCASP_RXFMT_REG,8,3    ; @DAVINCI_MCASP_RXFMT_REG
	.comm	_DAVINCI_MCASP_TXFMT_REG,8,3    ; @DAVINCI_MCASP_TXFMT_REG
	.comm	_DAVINCI_MCASP_TXMASK_REG,8,3   ; @DAVINCI_MCASP_TXMASK_REG
	.comm	_DAVINCI_MCASP_RXMASK_REG,8,3   ; @DAVINCI_MCASP_RXMASK_REG
	.no_dead_strip	_davinci_config_channel_size
	.section	__TEXT,__const
	.p2align	2                               ; @switch.table.davinci_config_channel_size
l_switch.table.davinci_config_channel_size:
	.long	3                               ; 0x3
	.long	15                              ; 0xf
	.long	13                              ; 0xd
	.long	11                              ; 0xb
	.long	9                               ; 0x9
	.long	7                               ; 0x7
	.long	5                               ; 0x5

	.p2align	2                               ; @switch.table.davinci_config_channel_size.1
l_switch.table.davinci_config_channel_size.1:
	.long	255                             ; 0xff
	.long	4294967295                      ; 0xffffffff
	.long	268435455                       ; 0xfffffff
	.long	16777215                        ; 0xffffff
	.long	1048575                         ; 0xfffff
	.long	65535                           ; 0xffff
	.long	4095                            ; 0xfff

	.p2align	2                               ; @switch.table.davinci_config_channel_size.2
l_switch.table.davinci_config_channel_size.2:
	.long	6                               ; 0x6
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.long	3                               ; 0x3
	.long	4                               ; 0x4
	.long	5                               ; 0x5

.subsections_via_symbols
