	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rs6000_register_move_cost      ## -- Begin function rs6000_register_move_cost
	.p2align	4, 0x90
_rs6000_register_move_cost:             ## @rs6000_register_move_cost
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ebx
	movl	%esi, %r15d
	movl	%edi, %r14d
	movq	_GENERAL_REGS@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movl	%edx, %edi
	callq	_reg_classes_intersect_p
	xorl	%r12d, %r12d
	testq	%rax, %rax
	je	LBB0_1
LBB0_3:
	movl	(%r13), %esi
	movl	%ebx, %edi
	callq	_reg_classes_intersect_p
	testq	%rax, %rax
	cmovel	%ebx, %r15d
	movq	_FLOAT_REGS@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r15d
	je	LBB0_5
## %bb.4:
	movq	_ALTIVEC_REGS@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r15d
	je	LBB0_5
## %bb.6:
	movq	_CR_REGS@GOTPCREL(%rip), %rcx
	movl	$4, %eax
	cmpl	(%rcx), %r15d
	je	LBB0_10
## %bb.7:
	movq	_hard_regno_nregs@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%rax), %rax
	movl	%r14d, %ecx
	movl	(%rax,%rcx,4), %eax
	addl	%eax, %eax
	jmp	LBB0_10
LBB0_5:
	movl	%r14d, %edi
	movl	%r15d, %esi
	xorl	%edx, %edx
	callq	_rs6000_memory_move_cost
	movl	%eax, %ebx
	movl	(%r13), %esi
	movl	%r14d, %edi
	xorl	%edx, %edx
	callq	_rs6000_memory_move_cost
	addl	%ebx, %eax
	jmp	LBB0_10
LBB0_1:
	xorl	%r12d, %r12d
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r13), %esi
	movl	%r15d, %edi
	callq	_reg_classes_intersect_p
	testq	%rax, %rax
	jne	LBB0_3
## %bb.8:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	%ebx, %edi
	movl	%r15d, %esi
	callq	_reg_classes_intersect_p
	testq	%rax, %rax
	jne	LBB0_9
## %bb.11:                              ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r13), %esi
	movl	%r14d, %edi
	movl	%ebx, %edx
	callq	_rs6000_register_move_cost
	movl	(%r13), %ebx
	addl	%eax, %r12d
	movl	%ebx, %edi
	movl	%ebx, %esi
	callq	_reg_classes_intersect_p
	testq	%rax, %rax
	je	LBB0_2
	jmp	LBB0_3
LBB0_9:
	movq	_TFmode@GOTPCREL(%rip), %rax
	xorl	%ecx, %ecx
	cmpl	%r14d, (%rax)
	sete	%cl
	leal	(%rcx,%rcx), %eax
	addl	$2, %eax
LBB0_10:
	addl	%eax, %r12d
	movl	%r12d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GENERAL_REGS,4,2               ## @GENERAL_REGS
	.comm	_FLOAT_REGS,4,2                 ## @FLOAT_REGS
	.comm	_ALTIVEC_REGS,4,2               ## @ALTIVEC_REGS
	.comm	_CR_REGS,4,2                    ## @CR_REGS
	.comm	_hard_regno_nregs,8,3           ## @hard_regno_nregs
	.comm	_TFmode,4,2                     ## @TFmode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rs6000_register_move_cost      ; -- Begin function rs6000_register_move_cost
	.p2align	2
_rs6000_register_move_cost:             ; @rs6000_register_move_cost
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x23, _GENERAL_REGS@GOTPAGE
Lloh1:
	ldr	x23, [x23, _GENERAL_REGS@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x2
	bl	_reg_classes_intersect_p
	mov	w22, #0
	cbz	x0, LBB0_5
LBB0_1:
	ldr	w1, [x23]
	mov	x0, x21
	bl	_reg_classes_intersect_p
	cmp	x0, #0
	csel	w1, w21, w20, eq
Lloh2:
	adrp	x8, _FLOAT_REGS@GOTPAGE
Lloh3:
	ldr	x8, [x8, _FLOAT_REGS@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _ALTIVEC_REGS@GOTPAGE
Lloh6:
	ldr	x9, [x9, _ALTIVEC_REGS@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	cmp	w1, w8
	ccmp	w1, w9, #4, ne
	b.ne	LBB0_6
; %bb.2:
	mov	x0, x19
	mov	w2, #0
	bl	_rs6000_memory_move_cost
	mov	x20, x0
	ldr	w1, [x23]
	mov	x0, x19
	mov	w2, #0
	bl	_rs6000_memory_move_cost
	add	w8, w0, w20
	b	LBB0_10
LBB0_3:                                 ;   in Loop: Header=BB0_5 Depth=1
	mov	x0, x21
	mov	x1, x20
	bl	_reg_classes_intersect_p
	cbnz	x0, LBB0_9
; %bb.4:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	w1, [x23]
	mov	x0, x19
	mov	x2, x21
	bl	_rs6000_register_move_cost
	ldr	w21, [x23]
	add	w22, w0, w22
	mov	x0, x21
	mov	x1, x21
	bl	_reg_classes_intersect_p
	cbnz	x0, LBB0_1
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x23]
	mov	x0, x20
	bl	_reg_classes_intersect_p
	cbz	x0, LBB0_3
	b	LBB0_1
LBB0_6:
Lloh8:
	adrp	x8, _CR_REGS@GOTPAGE
Lloh9:
	ldr	x8, [x8, _CR_REGS@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	cmp	w1, w8
	b.ne	LBB0_8
; %bb.7:
	mov	w8, #4
	b	LBB0_10
LBB0_8:
Lloh11:
	adrp	x8, _hard_regno_nregs@GOTPAGE
Lloh12:
	ldr	x8, [x8, _hard_regno_nregs@GOTPAGEOFF]
Lloh13:
	ldr	x8, [x8]
	ldr	x8, [x8]
	ldr	w8, [x8, w19, uxtw #2]
	lsl	w8, w8, #1
	b	LBB0_10
LBB0_9:
Lloh14:
	adrp	x8, _TFmode@GOTPAGE
Lloh15:
	ldr	x8, [x8, _TFmode@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	mov	w9, #2
	mov	w10, #4
	cmp	w8, w19
	csel	w8, w10, w9, eq
LBB0_10:
	add	w0, w8, w22
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_GENERAL_REGS,4,2               ; @GENERAL_REGS
	.comm	_FLOAT_REGS,4,2                 ; @FLOAT_REGS
	.comm	_ALTIVEC_REGS,4,2               ; @ALTIVEC_REGS
	.comm	_CR_REGS,4,2                    ; @CR_REGS
	.comm	_hard_regno_nregs,8,3           ; @hard_regno_nregs
	.comm	_TFmode,4,2                     ; @TFmode
.subsections_via_symbols
