	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function wm9081_set_fll
_wm9081_set_fll:                        ## @wm9081_set_fll
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r15d
	movl	%esi, %r12d
	movq	%rdi, %r13
	movq	8(%rdi), %r14
	cmpl	%edx, (%r14)
	jne	LBB0_2
## %bb.1:
	xorl	%ebx, %ebx
	cmpl	%r15d, 4(%r14)
	je	LBB0_11
LBB0_2:
	testl	%r15d, %r15d
	je	LBB0_3
## %bb.4:
	leaq	-72(%rbp), %rdi
	movl	%edx, %esi
	movl	%edx, -52(%rbp)                 ## 4-byte Spill
	movl	%r15d, %edx
	callq	_fll_factors
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_11
## %bb.5:
	movq	_WM9081_FLL_CONTROL_5@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_snd_soc_read
	cmpl	$128, %r12d
	jne	LBB0_12
## %bb.6:
	movq	_WM9081_FLL_CLK_SRC_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	andl	%ecx, %eax
	orl	$1, %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_WM9081_CLOCK_CONTROL_3@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r13, %rdi
	callq	_snd_soc_read
	movl	%eax, %r12d
	movq	_WM9081_CLK_SYS_ENA@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%r12d, %eax
	je	LBB0_8
## %bb.7:
	movl	(%rbx), %esi
	notl	%eax
	movl	%r12d, %edx
	andl	%eax, %edx
	movq	%r13, %rdi
	callq	_snd_soc_write
LBB0_8:
	movq	_WM9081_FLL_CONTROL_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_snd_soc_read
	movq	_WM9081_FLL_ENA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movq	_WM9081_FLL_CONTROL_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_snd_soc_write
	movq	_WM9081_FLL_FRAC_MASK@GOTPCREL(%rip), %rax
	movl	%r12d, -48(%rbp)                ## 4-byte Spill
	movl	(%rax), %r12d
	movl	%r12d, %eax
	orl	%ebx, %eax
	notl	%r12d
	andl	%ebx, %r12d
	cmpl	$0, -72(%rbp)
	cmovnel	%eax, %r12d
	movq	_WM9081_FLL_CONTROL_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r12d, %edx
	callq	_snd_soc_write
	movq	_WM9081_FLL_CONTROL_2@GOTPCREL(%rip), %rax
	movq	_WM9081_FLL_OUTDIV_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	-68(%rbp), %edi
	shll	%cl, %edi
	movl	(%rax), %esi
	movl	-64(%rbp), %edx
	movq	_WM9081_FLL_FRATIO_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edx
	orl	%edi, %edx
	movq	%r13, %rdi
	callq	_snd_soc_write
	movq	_WM9081_FLL_CONTROL_3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-72(%rbp), %edx
	movq	%r13, %rdi
	callq	_snd_soc_write
	movq	_WM9081_FLL_CONTROL_4@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r13, %rdi
	callq	_snd_soc_read
	movq	_WM9081_FLL_N_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_WM9081_FLL_N_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	-60(%rbp), %edx
	shll	%cl, %edx
	notl	%esi
	andl	%eax, %esi
	orl	%esi, %edx
	movl	(%rbx), %esi
	movq	%r13, %rdi
	callq	_snd_soc_write
	movq	_WM9081_FLL_CLK_REF_DIV_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_WM9081_FLL_CLK_REF_DIV_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	-56(%rbp), %edx
	shll	%cl, %edx
	notl	%eax
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	andl	%eax, %ecx
	orl	%ecx, %edx
	movq	_WM9081_FLL_CONTROL_5@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_snd_soc_write
	movq	_WM9081_FLL_CONTROL_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_WM9081_FLL_ENA@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movq	%r13, %rdi
	movl	%r12d, %edx
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	callq	_snd_soc_write
	movq	_WM9081_CLK_SYS_ENA@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_10
## %bb.9:
	movq	_WM9081_CLOCK_CONTROL_3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_snd_soc_write
LBB0_10:
	movl	(%r13), %edi
	leaq	L_.str.2(%rip), %rsi
	xorl	%ebx, %ebx
	movl	-52(%rbp), %r12d                ## 4-byte Reload
	movl	%r12d, %edx
	movl	%r15d, %ecx
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	%r12d, (%r14)
	movl	%r15d, 4(%r14)
	jmp	LBB0_11
LBB0_3:
	movl	(%r13), %edi
	leaq	L_.str(%rip), %rsi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_dev_dbg
	movq	$0, (%r14)
	jmp	LBB0_11
LBB0_12:
	movl	(%r13), %edi
	leaq	L_.str.1(%rip), %rsi
	movl	%r12d, %edx
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_11:
	movl	%ebx, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"FLL disabled\n"

	.comm	_WM9081_FLL_CONTROL_5,4,2       ## @WM9081_FLL_CONTROL_5
	.comm	_WM9081_FLL_CLK_SRC_MASK,4,2    ## @WM9081_FLL_CLK_SRC_MASK
L_.str.1:                               ## @.str.1
	.asciz	"Unknown FLL ID %d\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_WM9081_CLOCK_CONTROL_3,4,2     ## @WM9081_CLOCK_CONTROL_3
	.comm	_WM9081_CLK_SYS_ENA,4,2         ## @WM9081_CLK_SYS_ENA
	.comm	_WM9081_FLL_CONTROL_1,4,2       ## @WM9081_FLL_CONTROL_1
	.comm	_WM9081_FLL_ENA,4,2             ## @WM9081_FLL_ENA
	.comm	_WM9081_FLL_FRAC_MASK,4,2       ## @WM9081_FLL_FRAC_MASK
	.comm	_WM9081_FLL_CONTROL_2,4,2       ## @WM9081_FLL_CONTROL_2
	.comm	_WM9081_FLL_OUTDIV_SHIFT,4,2    ## @WM9081_FLL_OUTDIV_SHIFT
	.comm	_WM9081_FLL_FRATIO_SHIFT,4,2    ## @WM9081_FLL_FRATIO_SHIFT
	.comm	_WM9081_FLL_CONTROL_3,4,2       ## @WM9081_FLL_CONTROL_3
	.comm	_WM9081_FLL_CONTROL_4,4,2       ## @WM9081_FLL_CONTROL_4
	.comm	_WM9081_FLL_N_MASK,4,2          ## @WM9081_FLL_N_MASK
	.comm	_WM9081_FLL_N_SHIFT,4,2         ## @WM9081_FLL_N_SHIFT
	.comm	_WM9081_FLL_CLK_REF_DIV_MASK,4,2 ## @WM9081_FLL_CLK_REF_DIV_MASK
	.comm	_WM9081_FLL_CLK_REF_DIV_SHIFT,4,2 ## @WM9081_FLL_CLK_REF_DIV_SHIFT
L_.str.2:                               ## @.str.2
	.asciz	"FLL enabled at %dHz->%dHz\n"

	.no_dead_strip	_wm9081_set_fll
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function wm9081_set_fll
_wm9081_set_fll:                        ; @wm9081_set_fll
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x3
	mov	x20, x2
	mov	x22, x1
	mov	x21, x0
	ldr	x24, [x0, #8]
	ldr	w8, [x24]
	cmp	w8, w2
	b.ne	LBB0_3
; %bb.1:
	ldr	w8, [x24, #4]
	cmp	w8, w19
	b.ne	LBB0_3
; %bb.2:
	mov	w0, #0
	b	LBB0_13
LBB0_3:
	cbz	w19, LBB0_11
; %bb.4:
	add	x0, sp, #24
	mov	x1, x20
	mov	x2, x19
	bl	_fll_factors
	cbnz	w0, LBB0_13
; %bb.5:
Lloh0:
	adrp	x26, _WM9081_FLL_CONTROL_5@GOTPAGE
Lloh1:
	ldr	x26, [x26, _WM9081_FLL_CONTROL_5@GOTPAGEOFF]
	ldr	w1, [x26]
	mov	x0, x21
	bl	_snd_soc_read
	cmp	w22, #128
	b.ne	LBB0_12
; %bb.6:
Lloh2:
	adrp	x8, _WM9081_FLL_CLK_SRC_MASK@GOTPAGE
Lloh3:
	ldr	x8, [x8, _WM9081_FLL_CLK_SRC_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	bic	w8, w0, w8
	orr	w28, w8, #0x1
Lloh5:
	adrp	x23, _WM9081_CLOCK_CONTROL_3@GOTPAGE
Lloh6:
	ldr	x23, [x23, _WM9081_CLOCK_CONTROL_3@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x21
	bl	_snd_soc_read
	mov	x22, x0
Lloh7:
	adrp	x8, _WM9081_CLK_SYS_ENA@GOTPAGE
Lloh8:
	ldr	x8, [x8, _WM9081_CLK_SYS_ENA@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_8
; %bb.7:
	ldr	w1, [x23]
	bic	w2, w22, w8
	mov	x0, x21
	bl	_snd_soc_write
LBB0_8:
Lloh10:
	adrp	x27, _WM9081_FLL_CONTROL_1@GOTPAGE
Lloh11:
	ldr	x27, [x27, _WM9081_FLL_CONTROL_1@GOTPAGEOFF]
	ldr	w1, [x27]
	mov	x0, x21
	bl	_snd_soc_read
Lloh12:
	adrp	x8, _WM9081_FLL_ENA@GOTPAGE
Lloh13:
	ldr	x8, [x8, _WM9081_FLL_ENA@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	bic	w23, w0, w8
	ldr	w1, [x27]
	mov	x0, x21
	mov	x2, x23
	bl	_snd_soc_write
	ldr	w8, [sp, #24]
Lloh15:
	adrp	x9, _WM9081_FLL_FRAC_MASK@GOTPAGE
Lloh16:
	ldr	x9, [x9, _WM9081_FLL_FRAC_MASK@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w10, w9, w23
	bic	w9, w23, w9
	cmp	w8, #0
	csel	w23, w9, w10, eq
	ldr	w1, [x27]
	mov	x0, x21
	mov	x2, x23
	bl	_snd_soc_write
Lloh18:
	adrp	x8, _WM9081_FLL_CONTROL_2@GOTPAGE
Lloh19:
	ldr	x8, [x8, _WM9081_FLL_CONTROL_2@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
Lloh21:
	adrp	x8, _WM9081_FLL_OUTDIV_SHIFT@GOTPAGE
Lloh22:
	ldr	x8, [x8, _WM9081_FLL_OUTDIV_SHIFT@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	ldp	w9, w10, [sp, #28]
	lsl	w8, w9, w8
Lloh24:
	adrp	x9, _WM9081_FLL_FRATIO_SHIFT@GOTPAGE
Lloh25:
	ldr	x9, [x9, _WM9081_FLL_FRATIO_SHIFT@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	lsl	w9, w10, w9
	orr	w2, w9, w8
	mov	x0, x21
	bl	_snd_soc_write
Lloh27:
	adrp	x8, _WM9081_FLL_CONTROL_3@GOTPAGE
Lloh28:
	ldr	x8, [x8, _WM9081_FLL_CONTROL_3@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	ldr	w2, [sp, #24]
	mov	x0, x21
	bl	_snd_soc_write
Lloh30:
	adrp	x25, _WM9081_FLL_CONTROL_4@GOTPAGE
Lloh31:
	ldr	x25, [x25, _WM9081_FLL_CONTROL_4@GOTPAGEOFF]
	ldr	w1, [x25]
	mov	x0, x21
	bl	_snd_soc_read
Lloh32:
	adrp	x8, _WM9081_FLL_N_MASK@GOTPAGE
Lloh33:
	ldr	x8, [x8, _WM9081_FLL_N_MASK@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	w9, [sp, #36]
Lloh35:
	adrp	x10, _WM9081_FLL_N_SHIFT@GOTPAGE
Lloh36:
	ldr	x10, [x10, _WM9081_FLL_N_SHIFT@GOTPAGEOFF]
Lloh37:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w2, w9, w8
	ldr	w1, [x25]
	mov	x0, x21
	bl	_snd_soc_write
Lloh38:
	adrp	x8, _WM9081_FLL_CLK_REF_DIV_MASK@GOTPAGE
Lloh39:
	ldr	x8, [x8, _WM9081_FLL_CLK_REF_DIV_MASK@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	bic	w8, w28, w8
	ldr	w9, [sp, #40]
Lloh41:
	adrp	x10, _WM9081_FLL_CLK_REF_DIV_SHIFT@GOTPAGE
Lloh42:
	ldr	x10, [x10, _WM9081_FLL_CLK_REF_DIV_SHIFT@GOTPAGEOFF]
Lloh43:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w2, w9, w8
	ldr	w1, [x26]
	mov	x0, x21
	bl	_snd_soc_write
	ldr	w1, [x27]
Lloh44:
	adrp	x8, _WM9081_FLL_ENA@GOTPAGE
Lloh45:
	ldr	x8, [x8, _WM9081_FLL_ENA@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
	orr	w2, w8, w23
	mov	x0, x21
	bl	_snd_soc_write
Lloh47:
	adrp	x8, _WM9081_CLK_SYS_ENA@GOTPAGE
Lloh48:
	ldr	x8, [x8, _WM9081_CLK_SYS_ENA@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_10
; %bb.9:
Lloh50:
	adrp	x8, _WM9081_CLOCK_CONTROL_3@GOTPAGE
Lloh51:
	ldr	x8, [x8, _WM9081_CLOCK_CONTROL_3@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	x0, x21
	mov	x2, x22
	bl	_snd_soc_write
LBB0_10:
	ldr	w0, [x21]
	stp	x20, x19, [sp]
Lloh53:
	adrp	x1, l_.str.2@PAGE
Lloh54:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_dev_dbg
	mov	w0, #0
	stp	w20, w19, [x24]
	b	LBB0_13
LBB0_11:
	ldr	w0, [x21]
Lloh55:
	adrp	x1, l_.str@PAGE
Lloh56:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_dbg
	mov	w0, #0
	str	xzr, [x24]
	b	LBB0_13
LBB0_12:
	ldr	w0, [x21]
Lloh57:
	adrp	x1, l_.str.1@PAGE
Lloh58:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x2, x22
	bl	_dev_err
Lloh59:
	adrp	x8, _EINVAL@GOTPAGE
Lloh60:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh61:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_13:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpAdd	Lloh53, Lloh54
	.loh AdrpAdd	Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpAdd	Lloh57, Lloh58
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"FLL disabled\n"

	.comm	_WM9081_FLL_CONTROL_5,4,2       ; @WM9081_FLL_CONTROL_5
	.comm	_WM9081_FLL_CLK_SRC_MASK,4,2    ; @WM9081_FLL_CLK_SRC_MASK
l_.str.1:                               ; @.str.1
	.asciz	"Unknown FLL ID %d\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_WM9081_CLOCK_CONTROL_3,4,2     ; @WM9081_CLOCK_CONTROL_3
	.comm	_WM9081_CLK_SYS_ENA,4,2         ; @WM9081_CLK_SYS_ENA
	.comm	_WM9081_FLL_CONTROL_1,4,2       ; @WM9081_FLL_CONTROL_1
	.comm	_WM9081_FLL_ENA,4,2             ; @WM9081_FLL_ENA
	.comm	_WM9081_FLL_FRAC_MASK,4,2       ; @WM9081_FLL_FRAC_MASK
	.comm	_WM9081_FLL_CONTROL_2,4,2       ; @WM9081_FLL_CONTROL_2
	.comm	_WM9081_FLL_OUTDIV_SHIFT,4,2    ; @WM9081_FLL_OUTDIV_SHIFT
	.comm	_WM9081_FLL_FRATIO_SHIFT,4,2    ; @WM9081_FLL_FRATIO_SHIFT
	.comm	_WM9081_FLL_CONTROL_3,4,2       ; @WM9081_FLL_CONTROL_3
	.comm	_WM9081_FLL_CONTROL_4,4,2       ; @WM9081_FLL_CONTROL_4
	.comm	_WM9081_FLL_N_MASK,4,2          ; @WM9081_FLL_N_MASK
	.comm	_WM9081_FLL_N_SHIFT,4,2         ; @WM9081_FLL_N_SHIFT
	.comm	_WM9081_FLL_CLK_REF_DIV_MASK,4,2 ; @WM9081_FLL_CLK_REF_DIV_MASK
	.comm	_WM9081_FLL_CLK_REF_DIV_SHIFT,4,2 ; @WM9081_FLL_CLK_REF_DIV_SHIFT
l_.str.2:                               ; @.str.2
	.asciz	"FLL enabled at %dHz->%dHz\n"

	.no_dead_strip	_wm9081_set_fll
.subsections_via_symbols
