	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function reg_bitfield_target_p
_reg_bitfield_target_p:                 ## @reg_bitfield_target_p
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %r15
	movq	%rsi, %rdi
	callq	_GET_CODE
	movq	_SET@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_3
## %bb.1:
	movq	%r12, %rdi
	callq	_SET_DEST
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_GET_CODE
	movq	_ZERO_EXTRACT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_8
## %bb.2:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_XEXP
	jmp	LBB0_10
LBB0_3:
	movq	%r12, %rdi
	callq	_GET_CODE
	movq	_PARALLEL@GOTPCREL(%rip), %rcx
	xorl	%r14d, %r14d
	cmpq	(%rcx), %rax
	jne	LBB0_20
## %bb.4:
	xorl	%r14d, %r14d
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_XVECLEN
	movl	%eax, %ebx
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	testl	%ebx, %ebx
	jle	LBB0_20
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	decl	%ebx
	movq	%r12, %rdi
	xorl	%esi, %esi
	movl	%ebx, %edx
	callq	_XVECEXP
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_reg_bitfield_target_p
	testl	%eax, %eax
	je	LBB0_5
## %bb.7:
	movl	$1, %r14d
	jmp	LBB0_20
LBB0_8:
	movq	%rbx, %rdi
	callq	_GET_CODE
	movq	_STRICT_LOW_PART@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_17
## %bb.9:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_XEXP
	movq	%rax, %rdi
	callq	_SUBREG_REG
LBB0_10:
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	_GET_CODE
	movq	_SUBREG@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_12
## %bb.11:
	movq	%r14, %rdi
	callq	_SUBREG_REG
	movq	%rax, %r14
LBB0_12:
	movq	%r14, %rdi
	callq	_REG_P
	testl	%eax, %eax
	je	LBB0_17
## %bb.13:
	movq	%r14, %rdi
	callq	_REGNO
	movl	%eax, %ebx
	movq	%r15, %rdi
	callq	_REGNO
	movl	%eax, %r12d
	movq	_FIRST_PSEUDO_REGISTER@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	%eax, %ebx
	jae	LBB0_18
## %bb.14:
	cmpl	%eax, %r12d
	jae	LBB0_18
## %bb.15:
	movq	_hard_regno_nregs@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movl	%ebx, %ecx
	movq	(%rax,%rcx,8), %r13
	movq	%r14, %rdi
	callq	_GET_MODE
	movl	(%r13,%rax,4), %r14d
	addl	%ebx, %r14d
	movq	_hard_regno_nregs@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movl	%r12d, %ecx
	movq	(%rax,%rcx,8), %r13
	movq	%r15, %rdi
	callq	_GET_MODE
	movl	(%r13,%rax,4), %eax
	addl	%r12d, %eax
	cmpl	%ebx, %eax
	seta	%cl
	cmpl	%r14d, %r12d
	setb	%al
	andb	%cl, %al
	jmp	LBB0_19
LBB0_17:
	xorl	%eax, %eax
	jmp	LBB0_19
LBB0_18:
	cmpq	%r15, %r14
	sete	%al
LBB0_19:
	movzbl	%al, %r14d
LBB0_20:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SET,8,3                        ## @SET
	.comm	_ZERO_EXTRACT,8,3               ## @ZERO_EXTRACT
	.comm	_STRICT_LOW_PART,8,3            ## @STRICT_LOW_PART
	.comm	_SUBREG,8,3                     ## @SUBREG
	.comm	_FIRST_PSEUDO_REGISTER,4,2      ## @FIRST_PSEUDO_REGISTER
	.comm	_hard_regno_nregs,8,3           ## @hard_regno_nregs
	.comm	_PARALLEL,8,3                   ## @PARALLEL
	.no_dead_strip	_reg_bitfield_target_p
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function reg_bitfield_target_p
_reg_bitfield_target_p:                 ; @reg_bitfield_target_p
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
	mov	x0, x1
	bl	_GET_CODE
Lloh0:
	adrp	x8, _SET@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SET@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_3
; %bb.1:
	mov	x0, x20
	bl	_SET_DEST
	mov	x20, x0
	bl	_GET_CODE
Lloh3:
	adrp	x8, _ZERO_EXTRACT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ZERO_EXTRACT@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_8
; %bb.2:
	mov	x0, x20
	mov	w1, #0
	bl	_XEXP
	b	LBB0_10
LBB0_3:
	mov	x0, x20
	bl	_GET_CODE
Lloh6:
	adrp	x8, _PARALLEL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PARALLEL@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_16
; %bb.4:
	mov	x0, x20
	mov	w1, #0
	bl	_XVECLEN
	mov	x21, x0
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	subs	w21, w21, #1
	b.lt	LBB0_16
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	mov	x0, x20
	mov	w1, #0
	mov	x2, x21
	bl	_XVECEXP
	mov	x1, x0
	mov	x0, x19
	bl	_reg_bitfield_target_p
	cbz	w0, LBB0_5
; %bb.7:
	mov	w0, #1
	b	LBB0_18
LBB0_8:
	mov	x0, x20
	bl	_GET_CODE
Lloh9:
	adrp	x8, _STRICT_LOW_PART@GOTPAGE
Lloh10:
	ldr	x8, [x8, _STRICT_LOW_PART@GOTPAGEOFF]
Lloh11:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_16
; %bb.9:
	mov	x0, x20
	mov	w1, #0
	bl	_XEXP
	bl	_SUBREG_REG
LBB0_10:
	mov	x20, x0
	bl	_GET_CODE
Lloh12:
	adrp	x8, _SUBREG@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SUBREG@GOTPAGEOFF]
Lloh14:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_12
; %bb.11:
	mov	x0, x20
	bl	_SUBREG_REG
	mov	x20, x0
LBB0_12:
	mov	x0, x20
	bl	_REG_P
	cbz	w0, LBB0_18
; %bb.13:
	mov	x0, x20
	bl	_REGNO
	mov	x21, x0
	mov	x0, x19
	bl	_REGNO
Lloh15:
	adrp	x8, _FIRST_PSEUDO_REGISTER@GOTPAGE
Lloh16:
	ldr	x8, [x8, _FIRST_PSEUDO_REGISTER@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	cmp	w21, w8
	b.hs	LBB0_17
; %bb.14:
	mov	x22, x0
	cmp	w0, w8
	b.hs	LBB0_17
; %bb.15:
Lloh18:
	adrp	x23, _hard_regno_nregs@GOTPAGE
Lloh19:
	ldr	x23, [x23, _hard_regno_nregs@GOTPAGEOFF]
	ldr	x8, [x23]
	ldr	x24, [x8, w21, uxtw #3]
	mov	x0, x20
	bl	_GET_MODE
	ldr	w8, [x24, x0, lsl #2]
	add	w20, w8, w21
	ldr	x8, [x23]
	ldr	x23, [x8, w22, uxtw #3]
	mov	x0, x19
	bl	_GET_MODE
	ldr	w8, [x23, x0, lsl #2]
	add	w8, w8, w22
	cmp	w8, w21
	ccmp	w22, w20, #2, hi
	cset	w0, lo
	b	LBB0_18
LBB0_16:
	mov	w0, #0
	b	LBB0_18
LBB0_17:
	cmp	x20, x19
	cset	w0, eq
LBB0_18:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_SET,8,3                        ; @SET
	.comm	_ZERO_EXTRACT,8,3               ; @ZERO_EXTRACT
	.comm	_STRICT_LOW_PART,8,3            ; @STRICT_LOW_PART
	.comm	_SUBREG,8,3                     ; @SUBREG
	.comm	_FIRST_PSEUDO_REGISTER,4,2      ; @FIRST_PSEUDO_REGISTER
	.comm	_hard_regno_nregs,8,3           ; @hard_regno_nregs
	.comm	_PARALLEL,8,3                   ; @PARALLEL
	.no_dead_strip	_reg_bitfield_target_p
.subsections_via_symbols
