	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_print_i386_disassembler_options ## -- Begin function print_i386_disassembler_options
	.p2align	4, 0x90
_print_i386_disassembler_options:       ## @print_i386_disassembler_options
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	leaq	L_.str(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_fprintf
	leaq	L_.str.1(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_fprintf
	leaq	L_.str.2(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_fprintf
	leaq	L_.str.3(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_fprintf
	leaq	L_.str.4(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_fprintf
	leaq	L_.str.5(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_fprintf
	leaq	L_.str.6(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_fprintf
	leaq	L_.str.7(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_fprintf
	leaq	L_.str.8(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_fprintf
	leaq	L_.str.9(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_fprintf
	leaq	L_.str.10(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_fprintf
	leaq	L_.str.11(%rip), %rdi
	callq	__
	movq	%rbx, %rdi
	movq	%rax, %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_fprintf                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\nThe following i386/x86-64 specific disassembler options are supported for use\nwith the -M switch (multiple options should be separated by commas):\n"

L_.str.1:                               ## @.str.1
	.asciz	"  x86-64      Disassemble in 64bit mode\n"

L_.str.2:                               ## @.str.2
	.asciz	"  i386        Disassemble in 32bit mode\n"

L_.str.3:                               ## @.str.3
	.asciz	"  i8086       Disassemble in 16bit mode\n"

L_.str.4:                               ## @.str.4
	.asciz	"  att         Display instruction in AT&T syntax\n"

L_.str.5:                               ## @.str.5
	.asciz	"  intel       Display instruction in Intel syntax\n"

L_.str.6:                               ## @.str.6
	.asciz	"  addr64      Assume 64bit address size\n"

L_.str.7:                               ## @.str.7
	.asciz	"  addr32      Assume 32bit address size\n"

L_.str.8:                               ## @.str.8
	.asciz	"  addr16      Assume 16bit address size\n"

L_.str.9:                               ## @.str.9
	.asciz	"  data32      Assume 32bit data size\n"

L_.str.10:                              ## @.str.10
	.asciz	"  data16      Assume 16bit data size\n"

L_.str.11:                              ## @.str.11
	.asciz	"  suffix      Always display instruction suffix in AT&T syntax\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_print_i386_disassembler_options ; -- Begin function print_i386_disassembler_options
	.p2align	2
_print_i386_disassembler_options:       ; @print_i386_disassembler_options
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh2:
	adrp	x0, l_.str.1@PAGE
Lloh3:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh4:
	adrp	x0, l_.str.2@PAGE
Lloh5:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh6:
	adrp	x0, l_.str.3@PAGE
Lloh7:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh8:
	adrp	x0, l_.str.4@PAGE
Lloh9:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh10:
	adrp	x0, l_.str.5@PAGE
Lloh11:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh12:
	adrp	x0, l_.str.6@PAGE
Lloh13:
	add	x0, x0, l_.str.6@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh14:
	adrp	x0, l_.str.7@PAGE
Lloh15:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh16:
	adrp	x0, l_.str.8@PAGE
Lloh17:
	add	x0, x0, l_.str.8@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh18:
	adrp	x0, l_.str.9@PAGE
Lloh19:
	add	x0, x0, l_.str.9@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh20:
	adrp	x0, l_.str.10@PAGE
Lloh21:
	add	x0, x0, l_.str.10@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	bl	_fprintf
Lloh22:
	adrp	x0, l_.str.11@PAGE
Lloh23:
	add	x0, x0, l_.str.11@PAGEOFF
	bl	__
	mov	x1, x0
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_fprintf
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\nThe following i386/x86-64 specific disassembler options are supported for use\nwith the -M switch (multiple options should be separated by commas):\n"

l_.str.1:                               ; @.str.1
	.asciz	"  x86-64      Disassemble in 64bit mode\n"

l_.str.2:                               ; @.str.2
	.asciz	"  i386        Disassemble in 32bit mode\n"

l_.str.3:                               ; @.str.3
	.asciz	"  i8086       Disassemble in 16bit mode\n"

l_.str.4:                               ; @.str.4
	.asciz	"  att         Display instruction in AT&T syntax\n"

l_.str.5:                               ; @.str.5
	.asciz	"  intel       Display instruction in Intel syntax\n"

l_.str.6:                               ; @.str.6
	.asciz	"  addr64      Assume 64bit address size\n"

l_.str.7:                               ; @.str.7
	.asciz	"  addr32      Assume 32bit address size\n"

l_.str.8:                               ; @.str.8
	.asciz	"  addr16      Assume 16bit address size\n"

l_.str.9:                               ; @.str.9
	.asciz	"  data32      Assume 32bit data size\n"

l_.str.10:                              ; @.str.10
	.asciz	"  data16      Assume 16bit data size\n"

l_.str.11:                              ; @.str.11
	.asciz	"  suffix      Always display instruction suffix in AT&T syntax\n"

.subsections_via_symbols
