	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function classify_vr4120_insn
_classify_vr4120_insn:                  ## @classify_vr4120_insn
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	leaq	L_.str(%rip), %rsi
	movl	$4, %edx
	callq	_strncmp
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	movl	$5, %edx
	callq	_strncmp
	testq	%rax, %rax
	je	LBB0_3
## %bb.4:
	leaq	L_.str.2(%rip), %rsi
	movq	%rbx, %rdi
	movl	$4, %edx
	callq	_strncmp
	testq	%rax, %rax
	je	LBB0_5
## %bb.6:
	leaq	L_.str.3(%rip), %rsi
	movq	%rbx, %rdi
	movl	$5, %edx
	callq	_strncmp
	testq	%rax, %rax
	je	LBB0_7
## %bb.8:
	leaq	L_.str.4(%rip), %rsi
	movq	%rbx, %rdi
	callq	_strstr
	testq	%rax, %rax
	je	LBB0_10
## %bb.9:
	movq	_FIX_VR4120_DIV@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_1:
	movq	_FIX_VR4120_MACC@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_3:
	movq	_FIX_VR4120_DMACC@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_5:
	movq	_FIX_VR4120_MULT@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_7:
	movq	_FIX_VR4120_DMULT@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_10:
	leaq	L_.str.5(%rip), %rsi
	movq	%rbx, %rdi
	callq	_strcmp
	testq	%rax, %rax
	je	LBB0_13
## %bb.11:
	leaq	L_.str.6(%rip), %rsi
	movq	%rbx, %rdi
	callq	_strcmp
	testq	%rax, %rax
	jne	LBB0_12
LBB0_13:
	movq	_FIX_VR4120_MTHILO@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_12:
	movq	_NUM_FIX_VR4120_CLASSES@GOTPCREL(%rip), %rax
LBB0_14:
	movl	(%rax), %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"macc"

	.comm	_FIX_VR4120_MACC,4,2            ## @FIX_VR4120_MACC
L_.str.1:                               ## @.str.1
	.asciz	"dmacc"

	.comm	_FIX_VR4120_DMACC,4,2           ## @FIX_VR4120_DMACC
L_.str.2:                               ## @.str.2
	.asciz	"mult"

	.comm	_FIX_VR4120_MULT,4,2            ## @FIX_VR4120_MULT
L_.str.3:                               ## @.str.3
	.asciz	"dmult"

	.comm	_FIX_VR4120_DMULT,4,2           ## @FIX_VR4120_DMULT
L_.str.4:                               ## @.str.4
	.asciz	"div"

	.comm	_FIX_VR4120_DIV,4,2             ## @FIX_VR4120_DIV
L_.str.5:                               ## @.str.5
	.asciz	"mtlo"

L_.str.6:                               ## @.str.6
	.asciz	"mthi"

	.comm	_FIX_VR4120_MTHILO,4,2          ## @FIX_VR4120_MTHILO
	.comm	_NUM_FIX_VR4120_CLASSES,4,2     ## @NUM_FIX_VR4120_CLASSES
	.no_dead_strip	_classify_vr4120_insn
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function classify_vr4120_insn
_classify_vr4120_insn:                  ; @classify_vr4120_insn
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	mov	w2, #4
	bl	_strncmp
	cbz	x0, LBB0_6
; %bb.1:
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	mov	w2, #5
	bl	_strncmp
	cbz	x0, LBB0_7
; %bb.2:
Lloh4:
	adrp	x1, l_.str.2@PAGE
Lloh5:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	mov	w2, #4
	bl	_strncmp
	cbz	x0, LBB0_8
; %bb.3:
Lloh6:
	adrp	x1, l_.str.3@PAGE
Lloh7:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
	mov	w2, #5
	bl	_strncmp
	cbz	x0, LBB0_9
; %bb.4:
Lloh8:
	adrp	x1, l_.str.4@PAGE
Lloh9:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_strstr
	cbz	x0, LBB0_10
; %bb.5:
Lloh10:
	adrp	x20, _FIX_VR4120_DIV@GOTPAGE
Lloh11:
	ldr	x20, [x20, _FIX_VR4120_DIV@GOTPAGEOFF]
	b	LBB0_12
LBB0_6:
Lloh12:
	adrp	x20, _FIX_VR4120_MACC@GOTPAGE
Lloh13:
	ldr	x20, [x20, _FIX_VR4120_MACC@GOTPAGEOFF]
	b	LBB0_12
LBB0_7:
Lloh14:
	adrp	x20, _FIX_VR4120_DMACC@GOTPAGE
Lloh15:
	ldr	x20, [x20, _FIX_VR4120_DMACC@GOTPAGEOFF]
	b	LBB0_12
LBB0_8:
Lloh16:
	adrp	x20, _FIX_VR4120_MULT@GOTPAGE
Lloh17:
	ldr	x20, [x20, _FIX_VR4120_MULT@GOTPAGEOFF]
	b	LBB0_12
LBB0_9:
Lloh18:
	adrp	x20, _FIX_VR4120_DMULT@GOTPAGE
Lloh19:
	ldr	x20, [x20, _FIX_VR4120_DMULT@GOTPAGEOFF]
	b	LBB0_12
LBB0_10:
Lloh20:
	adrp	x1, l_.str.5@PAGE
Lloh21:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x19
	bl	_strcmp
Lloh22:
	adrp	x20, _FIX_VR4120_MTHILO@GOTPAGE
Lloh23:
	ldr	x20, [x20, _FIX_VR4120_MTHILO@GOTPAGEOFF]
	cbz	x0, LBB0_12
; %bb.11:
Lloh24:
	adrp	x1, l_.str.6@PAGE
Lloh25:
	add	x1, x1, l_.str.6@PAGEOFF
	mov	x0, x19
	bl	_strcmp
Lloh26:
	adrp	x8, _NUM_FIX_VR4120_CLASSES@GOTPAGE
Lloh27:
	ldr	x8, [x8, _NUM_FIX_VR4120_CLASSES@GOTPAGEOFF]
	cmp	x0, #0
	csel	x20, x20, x8, eq
LBB0_12:
	ldr	w0, [x20]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpAdd	Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"macc"

	.comm	_FIX_VR4120_MACC,4,2            ; @FIX_VR4120_MACC
l_.str.1:                               ; @.str.1
	.asciz	"dmacc"

	.comm	_FIX_VR4120_DMACC,4,2           ; @FIX_VR4120_DMACC
l_.str.2:                               ; @.str.2
	.asciz	"mult"

	.comm	_FIX_VR4120_MULT,4,2            ; @FIX_VR4120_MULT
l_.str.3:                               ; @.str.3
	.asciz	"dmult"

	.comm	_FIX_VR4120_DMULT,4,2           ; @FIX_VR4120_DMULT
l_.str.4:                               ; @.str.4
	.asciz	"div"

	.comm	_FIX_VR4120_DIV,4,2             ; @FIX_VR4120_DIV
l_.str.5:                               ; @.str.5
	.asciz	"mtlo"

l_.str.6:                               ; @.str.6
	.asciz	"mthi"

	.comm	_FIX_VR4120_MTHILO,4,2          ; @FIX_VR4120_MTHILO
	.comm	_NUM_FIX_VR4120_CLASSES,4,2     ; @NUM_FIX_VR4120_CLASSES
	.no_dead_strip	_classify_vr4120_insn
.subsections_via_symbols
