	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function davinci_hw_common_param
_davinci_hw_common_param:               ## @davinci_hw_common_param
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r13
	movq	_DAVINCI_MCASP_PWREMUMGT_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	24(%r13), %rdi
	movq	_MCASP_SOFT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_mcasp_set_bits
	movq	_DAVINCI_MCASP_PFUNC_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	24(%r13), %rdi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	_mcasp_set_reg
	movq	_SNDRV_PCM_STREAM_PLAYBACK@GOTPCREL(%rip), %rax
	movl	%ebx, -48(%rbp)                 ## 4-byte Spill
	cmpl	%ebx, (%rax)
	movq	_DAVINCI_MCASP_RXSTAT_REG@GOTPCREL(%rip), %rax
	cmoveq	_DAVINCI_MCASP_TXSTAT_REG@GOTPCREL(%rip), %rax
	movq	_DAVINCI_MCASP_REVTCTL_REG@GOTPCREL(%rip), %rbx
	cmoveq	_DAVINCI_MCASP_XEVTCTL_REG@GOTPCREL(%rip), %rbx
	movq	_RXDATADMADIS@GOTPCREL(%rip), %r14
	cmoveq	_TXDATADMADIS@GOTPCREL(%rip), %r14
	movq	(%rax), %rdi
	addq	24(%r13), %rdi
	movl	$-1, %esi
	callq	_mcasp_set_reg
	movq	(%rbx), %rdi
	addq	24(%r13), %rdi
	movq	(%r14), %rsi
	callq	_mcasp_clr_bits
	cmpl	$0, (%r13)
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	jle	LBB0_7
## %bb.1:
	xorl	%ebx, %ebx
	movq	_TX_MODE@GOTPCREL(%rip), %r15
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	xorl	%r12d, %r12d
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_3:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	_DAVINCI_MCASP_PDIR_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %r14
	addq	24(%r13), %r14
	movl	%ebx, %edi
	callq	_AXR
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_mcasp_set_bits
	incl	%r12d
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%rbx
	movslq	(%r13), %rax
	cmpq	%rax, %rbx
	jge	LBB0_7
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	24(%r13), %r14
	movl	%ebx, %edi
	callq	_DAVINCI_MCASP_XRSRCTL_REG
	addq	%rax, %r14
	movq	8(%r13), %rax
	movq	(%rax,%rbx,8), %rsi
	movq	%r14, %rdi
	callq	_mcasp_set_bits
	movq	8(%r13), %rax
	movq	(%rax,%rbx,8), %rax
	cmpq	(%r15), %rax
	je	LBB0_3
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_RX_MODE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_DAVINCI_MCASP_PDIR_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %r14
	addq	24(%r13), %r14
	movl	%ebx, %edi
	callq	_AXR
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_mcasp_clr_bits
	incl	-44(%rbp)                       ## 4-byte Folded Spill
	jmp	LBB0_6
LBB0_7:
	movl	16(%r13), %eax
	testl	%eax, %eax
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	je	LBB0_12
## %bb.8:
	movq	_SNDRV_PCM_STREAM_PLAYBACK@GOTPCREL(%rip), %rcx
	cmpl	%ebx, (%rcx)
	jne	LBB0_12
## %bb.9:
	imull	%r12d, %eax
	cmpl	$65, %eax
	jl	LBB0_11
## %bb.10:
	movl	$1, 16(%r13)
LBB0_11:
	movq	_DAVINCI_MCASP_WFIFOCTL@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	addq	24(%r13), %rdi
	movq	_NUMDMA_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %esi
	callq	_mcasp_mod_bits
	movq	(%r14), %rdi
	addq	24(%r13), %rdi
	imull	16(%r13), %r12d
	shll	$8, %r12d
	movq	_NUMEVT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %esi
	callq	_mcasp_mod_bits
	movq	(%r14), %rdi
	addq	24(%r13), %rdi
	movq	_FIFO_ENABLE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_mcasp_set_bits
LBB0_12:
	movl	20(%r13), %eax
	testl	%eax, %eax
	je	LBB0_17
## %bb.13:
	movq	_SNDRV_PCM_STREAM_CAPTURE@GOTPCREL(%rip), %rcx
	cmpl	%ebx, (%rcx)
	jne	LBB0_17
## %bb.14:
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	imull	%ebx, %eax
	cmpl	$65, %eax
	jl	LBB0_16
## %bb.15:
	movl	$1, 20(%r13)
LBB0_16:
	movq	_DAVINCI_MCASP_RFIFOCTL@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	addq	24(%r13), %rdi
	movq	_NUMDMA_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%ebx, %esi
	callq	_mcasp_mod_bits
	movq	(%r14), %rdi
	addq	24(%r13), %rdi
	imull	20(%r13), %ebx
	shll	$8, %ebx
	movq	_NUMEVT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%ebx, %esi
	callq	_mcasp_mod_bits
	movq	(%r14), %rdi
	addq	24(%r13), %rdi
	movq	_FIFO_ENABLE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mcasp_set_bits                 ## TAILCALL
LBB0_17:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DAVINCI_MCASP_PWREMUMGT_REG,8,3 ## @DAVINCI_MCASP_PWREMUMGT_REG
	.comm	_MCASP_SOFT,8,3                 ## @MCASP_SOFT
	.comm	_DAVINCI_MCASP_PFUNC_REG,8,3    ## @DAVINCI_MCASP_PFUNC_REG
	.comm	_SNDRV_PCM_STREAM_PLAYBACK,4,2  ## @SNDRV_PCM_STREAM_PLAYBACK
	.comm	_DAVINCI_MCASP_TXSTAT_REG,8,3   ## @DAVINCI_MCASP_TXSTAT_REG
	.comm	_DAVINCI_MCASP_XEVTCTL_REG,8,3  ## @DAVINCI_MCASP_XEVTCTL_REG
	.comm	_TXDATADMADIS,8,3               ## @TXDATADMADIS
	.comm	_DAVINCI_MCASP_RXSTAT_REG,8,3   ## @DAVINCI_MCASP_RXSTAT_REG
	.comm	_DAVINCI_MCASP_REVTCTL_REG,8,3  ## @DAVINCI_MCASP_REVTCTL_REG
	.comm	_RXDATADMADIS,8,3               ## @RXDATADMADIS
	.comm	_TX_MODE,8,3                    ## @TX_MODE
	.comm	_DAVINCI_MCASP_PDIR_REG,8,3     ## @DAVINCI_MCASP_PDIR_REG
	.comm	_RX_MODE,8,3                    ## @RX_MODE
	.comm	_DAVINCI_MCASP_WFIFOCTL,8,3     ## @DAVINCI_MCASP_WFIFOCTL
	.comm	_NUMDMA_MASK,4,2                ## @NUMDMA_MASK
	.comm	_NUMEVT_MASK,4,2                ## @NUMEVT_MASK
	.comm	_FIFO_ENABLE,8,3                ## @FIFO_ENABLE
	.comm	_SNDRV_PCM_STREAM_CAPTURE,4,2   ## @SNDRV_PCM_STREAM_CAPTURE
	.comm	_DAVINCI_MCASP_RFIFOCTL,8,3     ## @DAVINCI_MCASP_RFIFOCTL
	.no_dead_strip	_davinci_hw_common_param
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function davinci_hw_common_param
_davinci_hw_common_param:               ; @davinci_hw_common_param
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _DAVINCI_MCASP_PWREMUMGT_REG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DAVINCI_MCASP_PWREMUMGT_REG@GOTPAGEOFF]
	ldr	x9, [x0, #24]
Lloh2:
	ldr	x8, [x8]
	add	x0, x8, x9
Lloh3:
	adrp	x8, _MCASP_SOFT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MCASP_SOFT@GOTPAGEOFF]
Lloh5:
	ldr	x1, [x8]
	bl	_mcasp_set_bits
	ldr	x8, [x19, #24]
Lloh6:
	adrp	x9, _DAVINCI_MCASP_PFUNC_REG@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DAVINCI_MCASP_PFUNC_REG@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	add	x0, x9, x8
	mov	w1, #0
	bl	_mcasp_set_reg
Lloh9:
	adrp	x25, _SNDRV_PCM_STREAM_PLAYBACK@GOTPAGE
Lloh10:
	ldr	x25, [x25, _SNDRV_PCM_STREAM_PLAYBACK@GOTPAGEOFF]
	ldr	w8, [x25]
	ldr	x9, [x19, #24]
Lloh11:
	adrp	x10, _DAVINCI_MCASP_TXSTAT_REG@GOTPAGE
Lloh12:
	ldr	x10, [x10, _DAVINCI_MCASP_TXSTAT_REG@GOTPAGEOFF]
Lloh13:
	adrp	x11, _DAVINCI_MCASP_RXSTAT_REG@GOTPAGE
Lloh14:
	ldr	x11, [x11, _DAVINCI_MCASP_RXSTAT_REG@GOTPAGEOFF]
	cmp	w8, w20
	csel	x8, x10, x11, eq
	ldr	x8, [x8]
	add	x0, x8, x9
Lloh15:
	adrp	x8, _DAVINCI_MCASP_XEVTCTL_REG@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DAVINCI_MCASP_XEVTCTL_REG@GOTPAGEOFF]
Lloh17:
	adrp	x9, _DAVINCI_MCASP_REVTCTL_REG@GOTPAGE
Lloh18:
	ldr	x9, [x9, _DAVINCI_MCASP_REVTCTL_REG@GOTPAGEOFF]
Lloh19:
	adrp	x10, _TXDATADMADIS@GOTPAGE
Lloh20:
	ldr	x10, [x10, _TXDATADMADIS@GOTPAGEOFF]
	csel	x21, x8, x9, eq
Lloh21:
	adrp	x8, _RXDATADMADIS@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RXDATADMADIS@GOTPAGEOFF]
	csel	x22, x10, x8, eq
	mov	w1, #-1
	bl	_mcasp_set_reg
	ldr	x8, [x19, #24]
	ldr	x9, [x21]
	add	x0, x9, x8
	ldr	x1, [x22]
	bl	_mcasp_clr_bits
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.1:
	mov	x23, #0
	mov	w21, #0
	mov	w22, #0
Lloh23:
	adrp	x26, _TX_MODE@GOTPAGE
Lloh24:
	ldr	x26, [x26, _TX_MODE@GOTPAGEOFF]
Lloh25:
	adrp	x27, _DAVINCI_MCASP_PDIR_REG@GOTPAGE
Lloh26:
	ldr	x27, [x27, _DAVINCI_MCASP_PDIR_REG@GOTPAGEOFF]
Lloh27:
	adrp	x28, _RX_MODE@GOTPAGE
Lloh28:
	ldr	x28, [x28, _RX_MODE@GOTPAGEOFF]
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	x8, [x19, #24]
	ldr	x9, [x27]
	add	x24, x9, x8
	mov	x0, x23
	bl	_AXR
	mov	x1, x0
	mov	x0, x24
	bl	_mcasp_set_bits
	add	w22, w22, #1
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	x23, x23, #1
	ldrsw	x8, [x19]
	cmp	x23, x8
	b.ge	LBB0_8
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x24, [x19, #24]
	mov	x0, x23
	bl	_DAVINCI_MCASP_XRSRCTL_REG
	add	x0, x0, x24
	ldr	x8, [x19, #8]
	lsl	x24, x23, #3
	ldr	x1, [x8, x24]
	bl	_mcasp_set_bits
	ldr	x8, [x19, #8]
	ldr	x8, [x8, x24]
	ldr	x9, [x26]
	cmp	x8, x9
	b.eq	LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	x9, [x28]
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	x8, [x19, #24]
	ldr	x9, [x27]
	add	x24, x9, x8
	mov	x0, x23
	bl	_AXR
	mov	x1, x0
	mov	x0, x24
	bl	_mcasp_clr_bits
	add	w21, w21, #1
	b	LBB0_3
LBB0_7:
	mov	w22, #0
	mov	w21, #0
LBB0_8:
	ldr	w8, [x19, #16]
Lloh29:
	adrp	x26, _NUMDMA_MASK@GOTPAGE
Lloh30:
	ldr	x26, [x26, _NUMDMA_MASK@GOTPAGEOFF]
Lloh31:
	adrp	x24, _NUMEVT_MASK@GOTPAGE
Lloh32:
	ldr	x24, [x24, _NUMEVT_MASK@GOTPAGEOFF]
Lloh33:
	adrp	x23, _FIFO_ENABLE@GOTPAGE
Lloh34:
	ldr	x23, [x23, _FIFO_ENABLE@GOTPAGEOFF]
	cbz	w8, LBB0_13
; %bb.9:
	ldr	w9, [x25]
	cmp	w9, w20
	b.ne	LBB0_13
; %bb.10:
	mul	w8, w8, w22
	cmp	w8, #65
	b.lt	LBB0_12
; %bb.11:
	mov	w8, #1
	str	w8, [x19, #16]
LBB0_12:
	ldr	x8, [x19, #24]
Lloh35:
	adrp	x25, _DAVINCI_MCASP_WFIFOCTL@GOTPAGE
Lloh36:
	ldr	x25, [x25, _DAVINCI_MCASP_WFIFOCTL@GOTPAGEOFF]
	ldr	x9, [x25]
	add	x0, x9, x8
	ldr	w2, [x26]
	mov	x1, x22
	bl	_mcasp_mod_bits
	ldr	x8, [x19, #24]
	ldr	x9, [x25]
	add	x0, x9, x8
	ldr	w8, [x19, #16]
	mul	w8, w22, w8
	lsl	w1, w8, #8
	ldr	w2, [x24]
	bl	_mcasp_mod_bits
	ldr	x8, [x19, #24]
	ldr	x9, [x25]
	add	x0, x9, x8
	ldr	x1, [x23]
	bl	_mcasp_set_bits
LBB0_13:
	ldr	w8, [x19, #20]
	cbz	w8, LBB0_18
; %bb.14:
Lloh37:
	adrp	x9, _SNDRV_PCM_STREAM_CAPTURE@GOTPAGE
Lloh38:
	ldr	x9, [x9, _SNDRV_PCM_STREAM_CAPTURE@GOTPAGEOFF]
Lloh39:
	ldr	w9, [x9]
	cmp	w9, w20
	b.ne	LBB0_18
; %bb.15:
	mul	w8, w8, w21
	cmp	w8, #65
	b.lt	LBB0_17
; %bb.16:
	mov	w8, #1
	str	w8, [x19, #20]
LBB0_17:
	ldr	x8, [x19, #24]
Lloh40:
	adrp	x20, _DAVINCI_MCASP_RFIFOCTL@GOTPAGE
Lloh41:
	ldr	x20, [x20, _DAVINCI_MCASP_RFIFOCTL@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x0, x9, x8
	ldr	w2, [x26]
	mov	x1, x21
	bl	_mcasp_mod_bits
	ldr	x8, [x19, #24]
	ldr	x9, [x20]
	add	x0, x9, x8
	ldr	w8, [x19, #20]
	mul	w8, w21, w8
	lsl	w1, w8, #8
	ldr	w2, [x24]
	bl	_mcasp_mod_bits
	ldr	x8, [x19, #24]
	ldr	x9, [x20]
	add	x0, x9, x8
	ldr	x1, [x23]
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_mcasp_set_bits
LBB0_18:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh40, Lloh41
	.cfi_endproc
                                        ; -- End function
	.comm	_DAVINCI_MCASP_PWREMUMGT_REG,8,3 ; @DAVINCI_MCASP_PWREMUMGT_REG
	.comm	_MCASP_SOFT,8,3                 ; @MCASP_SOFT
	.comm	_DAVINCI_MCASP_PFUNC_REG,8,3    ; @DAVINCI_MCASP_PFUNC_REG
	.comm	_SNDRV_PCM_STREAM_PLAYBACK,4,2  ; @SNDRV_PCM_STREAM_PLAYBACK
	.comm	_DAVINCI_MCASP_TXSTAT_REG,8,3   ; @DAVINCI_MCASP_TXSTAT_REG
	.comm	_DAVINCI_MCASP_XEVTCTL_REG,8,3  ; @DAVINCI_MCASP_XEVTCTL_REG
	.comm	_TXDATADMADIS,8,3               ; @TXDATADMADIS
	.comm	_DAVINCI_MCASP_RXSTAT_REG,8,3   ; @DAVINCI_MCASP_RXSTAT_REG
	.comm	_DAVINCI_MCASP_REVTCTL_REG,8,3  ; @DAVINCI_MCASP_REVTCTL_REG
	.comm	_RXDATADMADIS,8,3               ; @RXDATADMADIS
	.comm	_TX_MODE,8,3                    ; @TX_MODE
	.comm	_DAVINCI_MCASP_PDIR_REG,8,3     ; @DAVINCI_MCASP_PDIR_REG
	.comm	_RX_MODE,8,3                    ; @RX_MODE
	.comm	_DAVINCI_MCASP_WFIFOCTL,8,3     ; @DAVINCI_MCASP_WFIFOCTL
	.comm	_NUMDMA_MASK,4,2                ; @NUMDMA_MASK
	.comm	_NUMEVT_MASK,4,2                ; @NUMEVT_MASK
	.comm	_FIFO_ENABLE,8,3                ; @FIFO_ENABLE
	.comm	_SNDRV_PCM_STREAM_CAPTURE,4,2   ; @SNDRV_PCM_STREAM_CAPTURE
	.comm	_DAVINCI_MCASP_RFIFOCTL,8,3     ; @DAVINCI_MCASP_RFIFOCTL
	.no_dead_strip	_davinci_hw_common_param
.subsections_via_symbols
