	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_pcib_parse_fdt_resources
_tegra_pcib_parse_fdt_resources:        ## @tegra_pcib_parse_fdt_resources
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	16(%rdi), %edi
	leaq	72(%rbx), %rcx
	leaq	L_.str(%rip), %rdx
	xorl	%esi, %esi
	callq	_regulator_get_by_ofw_property
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_3
## %bb.1:
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_2
LBB0_3:
	leaq	68(%rbx), %rcx
	leaq	L_.str.2(%rip), %rdx
	xorl	%esi, %esi
	callq	_regulator_get_by_ofw_property
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	leaq	L_.str.3(%rip), %rsi
	jmp	LBB0_2
LBB0_5:
	leaq	64(%rbx), %rcx
	leaq	L_.str.4(%rip), %rdx
	xorl	%esi, %esi
	callq	_regulator_get_by_ofw_property
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_7
## %bb.6:
	leaq	L_.str.5(%rip), %rsi
	jmp	LBB0_2
LBB0_7:
	leaq	60(%rbx), %rcx
	leaq	L_.str.6(%rip), %rdx
	xorl	%esi, %esi
	callq	_regulator_get_by_ofw_property
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_9
## %bb.8:
	leaq	L_.str.7(%rip), %rsi
	jmp	LBB0_2
LBB0_9:
	leaq	56(%rbx), %rcx
	leaq	L_.str.8(%rip), %rdx
	xorl	%esi, %esi
	callq	_regulator_get_by_ofw_property
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_11
## %bb.10:
	leaq	L_.str.9(%rip), %rsi
	jmp	LBB0_2
LBB0_11:
	leaq	52(%rbx), %rcx
	leaq	L_.str.10(%rip), %rdx
	xorl	%esi, %esi
	callq	_regulator_get_by_ofw_property
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_13
## %bb.12:
	leaq	L_.str.11(%rip), %rsi
	jmp	LBB0_2
LBB0_13:
	leaq	48(%rbx), %rcx
	leaq	L_.str.12(%rip), %rdx
	xorl	%esi, %esi
	callq	_regulator_get_by_ofw_property
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_15
## %bb.14:
	leaq	L_.str.13(%rip), %rsi
	jmp	LBB0_2
LBB0_15:
	leaq	44(%rbx), %rcx
	leaq	L_.str.14(%rip), %rdx
	xorl	%esi, %esi
	callq	_hwreset_get_by_ofw_name
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_17
## %bb.16:
	leaq	L_.str.15(%rip), %rsi
	jmp	LBB0_2
LBB0_17:
	leaq	40(%rbx), %rcx
	leaq	L_.str.16(%rip), %rdx
	xorl	%esi, %esi
	callq	_hwreset_get_by_ofw_name
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_19
## %bb.18:
	leaq	L_.str.17(%rip), %rsi
	jmp	LBB0_2
LBB0_19:
	leaq	36(%rbx), %rcx
	leaq	L_.str.18(%rip), %rdx
	xorl	%esi, %esi
	callq	_hwreset_get_by_ofw_name
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_21
## %bb.20:
	leaq	L_.str.19(%rip), %rsi
	jmp	LBB0_2
LBB0_21:
	leaq	32(%rbx), %rcx
	leaq	L_.str.14(%rip), %rdx
	xorl	%esi, %esi
	callq	_clk_get_by_ofw_name
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_23
## %bb.22:
	leaq	L_.str.20(%rip), %rsi
	jmp	LBB0_2
LBB0_23:
	leaq	28(%rbx), %rcx
	leaq	L_.str.16(%rip), %rdx
	xorl	%esi, %esi
	callq	_clk_get_by_ofw_name
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_25
## %bb.24:
	leaq	L_.str.21(%rip), %rsi
	jmp	LBB0_2
LBB0_25:
	leaq	24(%rbx), %rcx
	leaq	L_.str.22(%rip), %rdx
	xorl	%esi, %esi
	callq	_clk_get_by_ofw_name
	movl	16(%rbx), %edi
	testl	%eax, %eax
	je	LBB0_27
## %bb.26:
	leaq	L_.str.23(%rip), %rsi
	jmp	LBB0_2
LBB0_27:
	leaq	20(%rbx), %rcx
	leaq	L_.str.24(%rip), %rdx
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	_clk_get_by_ofw_name
	testl	%eax, %eax
	je	LBB0_29
## %bb.28:
	movl	16(%rbx), %edi
	leaq	L_.str.25(%rip), %rsi
LBB0_2:
	callq	_device_printf
	movq	_ENXIO@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
LBB0_34:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_29:
	movq	$0, (%rbx)
	movq	%r14, %rdi
	callq	_OF_child
	testq	%rax, %rax
	je	LBB0_34
## %bb.30:
	movq	%rax, %r14
LBB0_31:                                ## =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_tegra_pcib_parse_port
	testq	%rax, %rax
	je	LBB0_32
## %bb.33:                              ##   in Loop: Header=BB0_31 Depth=1
	movq	(%rbx), %rcx
	movq	8(%rbx), %rdx
	leaq	1(%rcx), %rsi
	movq	%rsi, (%rbx)
	movq	%rax, (%rdx,%rcx,8)
	movq	%r14, %rdi
	callq	_OF_peer
	movq	%rax, %r14
	testq	%rax, %rax
	jne	LBB0_31
	jmp	LBB0_34
LBB0_32:
	movl	16(%rbx), %edi
	leaq	L_.str.26(%rip), %rsi
	jmp	LBB0_2
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"avddio-pex-supply"

L_.str.1:                               ## @.str.1
	.asciz	"Cannot get 'avddio-pex' regulator\n"

	.comm	_ENXIO,4,2                      ## @ENXIO
L_.str.2:                               ## @.str.2
	.asciz	"dvddio-pex-supply"

L_.str.3:                               ## @.str.3
	.asciz	"Cannot get 'dvddio-pex' regulator\n"

L_.str.4:                               ## @.str.4
	.asciz	"avdd-pex-pll-supply"

L_.str.5:                               ## @.str.5
	.asciz	"Cannot get 'avdd-pex-pll' regulator\n"

L_.str.6:                               ## @.str.6
	.asciz	"hvdd-pex-supply"

L_.str.7:                               ## @.str.7
	.asciz	"Cannot get 'hvdd-pex' regulator\n"

L_.str.8:                               ## @.str.8
	.asciz	"hvdd-pex-pll-e-supply"

L_.str.9:                               ## @.str.9
	.asciz	"Cannot get 'hvdd-pex-pll-e' regulator\n"

L_.str.10:                              ## @.str.10
	.asciz	"vddio-pex-ctl-supply"

L_.str.11:                              ## @.str.11
	.asciz	"Cannot get 'vddio-pex-ctl' regulator\n"

L_.str.12:                              ## @.str.12
	.asciz	"avdd-pll-erefe-supply"

L_.str.13:                              ## @.str.13
	.asciz	"Cannot get 'avdd-pll-erefe' regulator\n"

L_.str.14:                              ## @.str.14
	.asciz	"pex"

L_.str.15:                              ## @.str.15
	.asciz	"Cannot get 'pex' reset\n"

L_.str.16:                              ## @.str.16
	.asciz	"afi"

L_.str.17:                              ## @.str.17
	.asciz	"Cannot get 'afi' reset\n"

L_.str.18:                              ## @.str.18
	.asciz	"pcie_x"

L_.str.19:                              ## @.str.19
	.asciz	"Cannot get 'pcie_x' reset\n"

L_.str.20:                              ## @.str.20
	.asciz	"Cannot get 'pex' clock\n"

L_.str.21:                              ## @.str.21
	.asciz	"Cannot get 'afi' clock\n"

L_.str.22:                              ## @.str.22
	.asciz	"pll_e"

L_.str.23:                              ## @.str.23
	.asciz	"Cannot get 'pll_e' clock\n"

L_.str.24:                              ## @.str.24
	.asciz	"cml"

L_.str.25:                              ## @.str.25
	.asciz	"Cannot get 'cml' clock\n"

L_.str.26:                              ## @.str.26
	.asciz	"Cannot parse PCIe port node\n"

	.no_dead_strip	_tegra_pcib_parse_fdt_resources
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_pcib_parse_fdt_resources
_tegra_pcib_parse_fdt_resources:        ; @tegra_pcib_parse_fdt_resources
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	ldr	w0, [x0, #16]
	add	x3, x19, #72
Lloh0:
	adrp	x2, l_.str@PAGE
Lloh1:
	add	x2, x2, l_.str@PAGEOFF
	mov	w1, #0
	bl	_regulator_get_by_ofw_property
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_2
; %bb.1:
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_28
LBB0_2:
	add	x3, x19, #68
Lloh4:
	adrp	x2, l_.str.2@PAGE
Lloh5:
	add	x2, x2, l_.str.2@PAGEOFF
	mov	w1, #0
	bl	_regulator_get_by_ofw_property
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_4
; %bb.3:
Lloh6:
	adrp	x1, l_.str.3@PAGE
Lloh7:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_28
LBB0_4:
	add	x3, x19, #64
Lloh8:
	adrp	x2, l_.str.4@PAGE
Lloh9:
	add	x2, x2, l_.str.4@PAGEOFF
	mov	w1, #0
	bl	_regulator_get_by_ofw_property
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_6
; %bb.5:
Lloh10:
	adrp	x1, l_.str.5@PAGE
Lloh11:
	add	x1, x1, l_.str.5@PAGEOFF
	b	LBB0_28
LBB0_6:
	add	x3, x19, #60
Lloh12:
	adrp	x2, l_.str.6@PAGE
Lloh13:
	add	x2, x2, l_.str.6@PAGEOFF
	mov	w1, #0
	bl	_regulator_get_by_ofw_property
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_8
; %bb.7:
Lloh14:
	adrp	x1, l_.str.7@PAGE
Lloh15:
	add	x1, x1, l_.str.7@PAGEOFF
	b	LBB0_28
LBB0_8:
	add	x3, x19, #56
Lloh16:
	adrp	x2, l_.str.8@PAGE
Lloh17:
	add	x2, x2, l_.str.8@PAGEOFF
	mov	w1, #0
	bl	_regulator_get_by_ofw_property
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_10
; %bb.9:
Lloh18:
	adrp	x1, l_.str.9@PAGE
Lloh19:
	add	x1, x1, l_.str.9@PAGEOFF
	b	LBB0_28
LBB0_10:
	add	x3, x19, #52
Lloh20:
	adrp	x2, l_.str.10@PAGE
Lloh21:
	add	x2, x2, l_.str.10@PAGEOFF
	mov	w1, #0
	bl	_regulator_get_by_ofw_property
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_12
; %bb.11:
Lloh22:
	adrp	x1, l_.str.11@PAGE
Lloh23:
	add	x1, x1, l_.str.11@PAGEOFF
	b	LBB0_28
LBB0_12:
	add	x3, x19, #48
Lloh24:
	adrp	x2, l_.str.12@PAGE
Lloh25:
	add	x2, x2, l_.str.12@PAGEOFF
	mov	w1, #0
	bl	_regulator_get_by_ofw_property
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_14
; %bb.13:
Lloh26:
	adrp	x1, l_.str.13@PAGE
Lloh27:
	add	x1, x1, l_.str.13@PAGEOFF
	b	LBB0_28
LBB0_14:
	add	x3, x19, #44
Lloh28:
	adrp	x2, l_.str.14@PAGE
Lloh29:
	add	x2, x2, l_.str.14@PAGEOFF
	mov	w1, #0
	bl	_hwreset_get_by_ofw_name
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_16
; %bb.15:
Lloh30:
	adrp	x1, l_.str.15@PAGE
Lloh31:
	add	x1, x1, l_.str.15@PAGEOFF
	b	LBB0_28
LBB0_16:
	add	x3, x19, #40
Lloh32:
	adrp	x2, l_.str.16@PAGE
Lloh33:
	add	x2, x2, l_.str.16@PAGEOFF
	mov	w1, #0
	bl	_hwreset_get_by_ofw_name
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_18
; %bb.17:
Lloh34:
	adrp	x1, l_.str.17@PAGE
Lloh35:
	add	x1, x1, l_.str.17@PAGEOFF
	b	LBB0_28
LBB0_18:
	add	x3, x19, #36
Lloh36:
	adrp	x2, l_.str.18@PAGE
Lloh37:
	add	x2, x2, l_.str.18@PAGEOFF
	mov	w1, #0
	bl	_hwreset_get_by_ofw_name
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_20
; %bb.19:
Lloh38:
	adrp	x1, l_.str.19@PAGE
Lloh39:
	add	x1, x1, l_.str.19@PAGEOFF
	b	LBB0_28
LBB0_20:
	add	x3, x19, #32
Lloh40:
	adrp	x2, l_.str.14@PAGE
Lloh41:
	add	x2, x2, l_.str.14@PAGEOFF
	mov	w1, #0
	bl	_clk_get_by_ofw_name
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_22
; %bb.21:
Lloh42:
	adrp	x1, l_.str.20@PAGE
Lloh43:
	add	x1, x1, l_.str.20@PAGEOFF
	b	LBB0_28
LBB0_22:
	add	x3, x19, #28
Lloh44:
	adrp	x2, l_.str.16@PAGE
Lloh45:
	add	x2, x2, l_.str.16@PAGEOFF
	mov	w1, #0
	bl	_clk_get_by_ofw_name
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_24
; %bb.23:
Lloh46:
	adrp	x1, l_.str.21@PAGE
Lloh47:
	add	x1, x1, l_.str.21@PAGEOFF
	b	LBB0_28
LBB0_24:
	add	x3, x19, #24
Lloh48:
	adrp	x2, l_.str.22@PAGE
Lloh49:
	add	x2, x2, l_.str.22@PAGEOFF
	mov	w1, #0
	bl	_clk_get_by_ofw_name
	mov	x8, x0
	ldr	w0, [x19, #16]
	cbz	w8, LBB0_26
; %bb.25:
Lloh50:
	adrp	x1, l_.str.23@PAGE
Lloh51:
	add	x1, x1, l_.str.23@PAGEOFF
	b	LBB0_28
LBB0_26:
	add	x3, x19, #20
Lloh52:
	adrp	x2, l_.str.24@PAGE
Lloh53:
	add	x2, x2, l_.str.24@PAGEOFF
	mov	w1, #0
	bl	_clk_get_by_ofw_name
	cbz	w0, LBB0_30
; %bb.27:
	ldr	w0, [x19, #16]
Lloh54:
	adrp	x1, l_.str.25@PAGE
Lloh55:
	add	x1, x1, l_.str.25@PAGEOFF
LBB0_28:
	bl	_device_printf
Lloh56:
	adrp	x8, _ENXIO@GOTPAGE
Lloh57:
	ldr	x8, [x8, _ENXIO@GOTPAGEOFF]
Lloh58:
	ldr	w0, [x8]
LBB0_29:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_30:
	str	xzr, [x19]
	mov	x0, x20
	bl	_OF_child
	cbz	x0, LBB0_29
; %bb.31:
	mov	x20, x0
LBB0_32:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x20
	bl	_tegra_pcib_parse_port
	cbz	x0, LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_32 Depth=1
	ldp	x9, x8, [x19]
	add	x10, x9, #1
	str	x10, [x19]
	str	x0, [x8, x9, lsl #3]
	mov	x0, x20
	bl	_OF_peer
	mov	x20, x0
	mov	w0, #0
	cbnz	x20, LBB0_32
	b	LBB0_29
LBB0_34:
	ldr	w0, [x19, #16]
Lloh59:
	adrp	x1, l_.str.26@PAGE
Lloh60:
	add	x1, x1, l_.str.26@PAGEOFF
	b	LBB0_28
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpAdd	Lloh40, Lloh41
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpAdd	Lloh44, Lloh45
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpAdd	Lloh50, Lloh51
	.loh AdrpAdd	Lloh52, Lloh53
	.loh AdrpAdd	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpAdd	Lloh59, Lloh60
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"avddio-pex-supply"

l_.str.1:                               ; @.str.1
	.asciz	"Cannot get 'avddio-pex' regulator\n"

	.comm	_ENXIO,4,2                      ; @ENXIO
l_.str.2:                               ; @.str.2
	.asciz	"dvddio-pex-supply"

l_.str.3:                               ; @.str.3
	.asciz	"Cannot get 'dvddio-pex' regulator\n"

l_.str.4:                               ; @.str.4
	.asciz	"avdd-pex-pll-supply"

l_.str.5:                               ; @.str.5
	.asciz	"Cannot get 'avdd-pex-pll' regulator\n"

l_.str.6:                               ; @.str.6
	.asciz	"hvdd-pex-supply"

l_.str.7:                               ; @.str.7
	.asciz	"Cannot get 'hvdd-pex' regulator\n"

l_.str.8:                               ; @.str.8
	.asciz	"hvdd-pex-pll-e-supply"

l_.str.9:                               ; @.str.9
	.asciz	"Cannot get 'hvdd-pex-pll-e' regulator\n"

l_.str.10:                              ; @.str.10
	.asciz	"vddio-pex-ctl-supply"

l_.str.11:                              ; @.str.11
	.asciz	"Cannot get 'vddio-pex-ctl' regulator\n"

l_.str.12:                              ; @.str.12
	.asciz	"avdd-pll-erefe-supply"

l_.str.13:                              ; @.str.13
	.asciz	"Cannot get 'avdd-pll-erefe' regulator\n"

l_.str.14:                              ; @.str.14
	.asciz	"pex"

l_.str.15:                              ; @.str.15
	.asciz	"Cannot get 'pex' reset\n"

l_.str.16:                              ; @.str.16
	.asciz	"afi"

l_.str.17:                              ; @.str.17
	.asciz	"Cannot get 'afi' reset\n"

l_.str.18:                              ; @.str.18
	.asciz	"pcie_x"

l_.str.19:                              ; @.str.19
	.asciz	"Cannot get 'pcie_x' reset\n"

l_.str.20:                              ; @.str.20
	.asciz	"Cannot get 'pex' clock\n"

l_.str.21:                              ; @.str.21
	.asciz	"Cannot get 'afi' clock\n"

l_.str.22:                              ; @.str.22
	.asciz	"pll_e"

l_.str.23:                              ; @.str.23
	.asciz	"Cannot get 'pll_e' clock\n"

l_.str.24:                              ; @.str.24
	.asciz	"cml"

l_.str.25:                              ; @.str.25
	.asciz	"Cannot get 'cml' clock\n"

l_.str.26:                              ; @.str.26
	.asciz	"Cannot parse PCIe port node\n"

	.no_dead_strip	_tegra_pcib_parse_fdt_resources
.subsections_via_symbols
