	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_initializecpu                  ## -- Begin function initializecpu
	.p2align	4, 0x90
_initializecpu:                         ## @initializecpu
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	xorl	%eax, %eax
	callq	_rcr4
	movq	_cpu_feature@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	_CPUID_XMM@GOTPCREL(%rip), %rdx
	testl	%ecx, (%rdx)
	je	LBB0_3
## %bb.1:
	movq	_CPUID_FXSR@GOTPCREL(%rip), %rdx
	testl	%ecx, (%rdx)
	je	LBB0_3
## %bb.2:
	movq	_CR4_FXSR@GOTPCREL(%rip), %rcx
	movq	_CR4_XMM@GOTPCREL(%rip), %rdx
	orl	(%rcx), %eax
	orl	(%rdx), %eax
	movq	_hw_instruction_sse@GOTPCREL(%rip), %rcx
	movl	$1, (%rcx)
	movq	_cpu_fxsr@GOTPCREL(%rip), %rcx
	movl	$1, (%rcx)
LBB0_3:
	movq	_cpu_stdext_feature@GOTPCREL(%rip), %r15
	movq	_CPUID_STDEXT_FSGSBASE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	andl	(%r15), %ebx
	je	LBB0_5
## %bb.4:
	movq	_CR4_FSGSBASE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
LBB0_5:
	orl	%eax, %ebx
	movq	_cpu_stdext_feature2@GOTPCREL(%rip), %r14
	movq	_CPUID_STDEXT2_PKU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	(%r14), %eax
	je	LBB0_7
## %bb.6:
	movq	_CR4_PKE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_7:
	orl	%eax, %ebx
	xorl	%eax, %eax
	callq	_IS_BSP
	testq	%rax, %rax
	jne	LBB0_12
## %bb.8:
	movl	(%r15), %eax
	movq	_CPUID_STDEXT_SMEP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	je	LBB0_10
## %bb.9:
	movq	_CR4_SMEP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_10:
	orl	%ecx, %ebx
	movq	_CPUID_STDEXT_SMAP@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_12
## %bb.11:
	movq	_CR4_SMAP@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
LBB0_12:
	movl	%ebx, %edi
	callq	_load_cr4
	xorl	%eax, %eax
	callq	_IS_BSP
	testq	%rax, %rax
	je	LBB0_15
## %bb.13:
	movq	_amd_feature@GOTPCREL(%rip), %rax
	movq	_AMDID_NX@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rax)
	je	LBB0_15
## %bb.14:
	movq	_MSR_EFER@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_rdmsr
	movq	_EFER_NXE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_wrmsr
	movq	_PG_NX@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_pg_nx@GOTPCREL(%rip), %rcx
	movl	%eax, (%rcx)
LBB0_15:
	xorl	%eax, %eax
	callq	_hw_ibrs_recalculate
	xorl	%edi, %edi
	callq	_hw_ssb_recalculate
	xorl	%eax, %eax
	callq	_amd64_syscall_ret_flush_l1d_recalc
	movq	_cpu_vendor_id@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	$128, %eax
	je	LBB0_18
## %bb.16:
	cmpl	$129, %eax
	jne	LBB0_19
## %bb.17:
	xorl	%eax, %eax
	callq	_init_amd
	jmp	LBB0_19
LBB0_18:
	xorl	%eax, %eax
	callq	_init_via
LBB0_19:
	movq	_amd_feature@GOTPCREL(%rip), %rax
	movq	_AMDID_RDTSCP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rax)
	jne	LBB0_22
## %bb.20:
	movq	_CPUID_STDEXT2_RDPID@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r14)
	je	LBB0_21
LBB0_22:
	movq	_MSR_TSC_AUX@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_cpuid@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_PCPU_GET
	movl	%ebx, %edi
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_wrmsr                          ## TAILCALL
LBB0_21:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_cpu_feature,4,2                ## @cpu_feature
	.comm	_CPUID_XMM,4,2                  ## @CPUID_XMM
	.comm	_CPUID_FXSR,4,2                 ## @CPUID_FXSR
	.comm	_CR4_FXSR,4,2                   ## @CR4_FXSR
	.comm	_CR4_XMM,4,2                    ## @CR4_XMM
	.comm	_hw_instruction_sse,4,2         ## @hw_instruction_sse
	.comm	_cpu_fxsr,4,2                   ## @cpu_fxsr
	.comm	_cpu_stdext_feature,4,2         ## @cpu_stdext_feature
	.comm	_CPUID_STDEXT_FSGSBASE,4,2      ## @CPUID_STDEXT_FSGSBASE
	.comm	_CR4_FSGSBASE,4,2               ## @CR4_FSGSBASE
	.comm	_cpu_stdext_feature2,4,2        ## @cpu_stdext_feature2
	.comm	_CPUID_STDEXT2_PKU,4,2          ## @CPUID_STDEXT2_PKU
	.comm	_CR4_PKE,4,2                    ## @CR4_PKE
	.comm	_CPUID_STDEXT_SMEP,4,2          ## @CPUID_STDEXT_SMEP
	.comm	_CR4_SMEP,4,2                   ## @CR4_SMEP
	.comm	_CPUID_STDEXT_SMAP,4,2          ## @CPUID_STDEXT_SMAP
	.comm	_CR4_SMAP,4,2                   ## @CR4_SMAP
	.comm	_amd_feature,4,2                ## @amd_feature
	.comm	_AMDID_NX,4,2                   ## @AMDID_NX
	.comm	_MSR_EFER,4,2                   ## @MSR_EFER
	.comm	_EFER_NXE,4,2                   ## @EFER_NXE
	.comm	_PG_NX,4,2                      ## @PG_NX
	.comm	_pg_nx,4,2                      ## @pg_nx
	.comm	_cpu_vendor_id,4,2              ## @cpu_vendor_id
	.comm	_AMDID_RDTSCP,4,2               ## @AMDID_RDTSCP
	.comm	_CPUID_STDEXT2_RDPID,4,2        ## @CPUID_STDEXT2_RDPID
	.comm	_MSR_TSC_AUX,4,2                ## @MSR_TSC_AUX
	.comm	_cpuid,4,2                      ## @cpuid
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_initializecpu                  ; -- Begin function initializecpu
	.p2align	2
_initializecpu:                         ; @initializecpu
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_rcr4
Lloh0:
	adrp	x8, _cpu_feature@GOTPAGE
Lloh1:
	ldr	x8, [x8, _cpu_feature@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _CPUID_XMM@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CPUID_XMM@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.1:
Lloh6:
	adrp	x9, _CPUID_FXSR@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CPUID_FXSR@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.2:
Lloh9:
	adrp	x8, _CR4_FXSR@GOTPAGE
Lloh10:
	ldr	x8, [x8, _CR4_FXSR@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
Lloh12:
	adrp	x9, _CR4_XMM@GOTPAGE
Lloh13:
	ldr	x9, [x9, _CR4_XMM@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w8, w0
Lloh15:
	adrp	x10, _hw_instruction_sse@GOTPAGE
Lloh16:
	ldr	x10, [x10, _hw_instruction_sse@GOTPAGEOFF]
	orr	w0, w8, w9
	mov	w8, #1
Lloh17:
	str	w8, [x10]
Lloh18:
	adrp	x9, _cpu_fxsr@GOTPAGE
Lloh19:
	ldr	x9, [x9, _cpu_fxsr@GOTPAGEOFF]
Lloh20:
	str	w8, [x9]
LBB0_3:
Lloh21:
	adrp	x21, _cpu_stdext_feature@GOTPAGE
Lloh22:
	ldr	x21, [x21, _cpu_stdext_feature@GOTPAGEOFF]
	ldr	w8, [x21]
Lloh23:
	adrp	x9, _CPUID_STDEXT_FSGSBASE@GOTPAGE
Lloh24:
	ldr	x9, [x9, _CPUID_STDEXT_FSGSBASE@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
Lloh26:
	adrp	x10, _CR4_FSGSBASE@GOTPAGE
Lloh27:
	ldr	x10, [x10, _CR4_FSGSBASE@GOTPAGEOFF]
Lloh28:
	ldr	w10, [x10]
	tst	w9, w8
	csel	w8, wzr, w10, eq
	orr	w8, w8, w0
Lloh29:
	adrp	x20, _cpu_stdext_feature2@GOTPAGE
Lloh30:
	ldr	x20, [x20, _cpu_stdext_feature2@GOTPAGEOFF]
	ldr	w9, [x20]
Lloh31:
	adrp	x10, _CPUID_STDEXT2_PKU@GOTPAGE
Lloh32:
	ldr	x10, [x10, _CPUID_STDEXT2_PKU@GOTPAGEOFF]
Lloh33:
	ldr	w10, [x10]
Lloh34:
	adrp	x11, _CR4_PKE@GOTPAGE
Lloh35:
	ldr	x11, [x11, _CR4_PKE@GOTPAGEOFF]
Lloh36:
	ldr	w11, [x11]
	tst	w10, w9
	csel	w9, wzr, w11, eq
	orr	w19, w8, w9
	bl	_IS_BSP
	cbnz	x0, LBB0_6
; %bb.4:
Lloh37:
	adrp	x8, _CPUID_STDEXT_SMEP@GOTPAGE
Lloh38:
	ldr	x8, [x8, _CPUID_STDEXT_SMEP@GOTPAGEOFF]
	ldr	w9, [x21]
Lloh39:
	ldr	w8, [x8]
Lloh40:
	adrp	x10, _CR4_SMEP@GOTPAGE
Lloh41:
	ldr	x10, [x10, _CR4_SMEP@GOTPAGEOFF]
Lloh42:
	ldr	w10, [x10]
	tst	w8, w9
	csel	w8, wzr, w10, eq
	orr	w19, w8, w19
Lloh43:
	adrp	x8, _CPUID_STDEXT_SMAP@GOTPAGE
Lloh44:
	ldr	x8, [x8, _CPUID_STDEXT_SMAP@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	tst	w8, w9
	b.eq	LBB0_6
; %bb.5:
Lloh46:
	adrp	x8, _CR4_SMAP@GOTPAGE
Lloh47:
	ldr	x8, [x8, _CR4_SMAP@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
	orr	w19, w8, w19
LBB0_6:
	mov	x0, x19
	bl	_load_cr4
	bl	_IS_BSP
Lloh49:
	adrp	x19, _amd_feature@GOTPAGE
Lloh50:
	ldr	x19, [x19, _amd_feature@GOTPAGEOFF]
	cbz	x0, LBB0_9
; %bb.7:
	ldr	w8, [x19]
Lloh51:
	adrp	x9, _AMDID_NX@GOTPAGE
Lloh52:
	ldr	x9, [x9, _AMDID_NX@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.8:
Lloh54:
	adrp	x21, _MSR_EFER@GOTPAGE
Lloh55:
	ldr	x21, [x21, _MSR_EFER@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_rdmsr
Lloh56:
	adrp	x8, _EFER_NXE@GOTPAGE
Lloh57:
	ldr	x8, [x8, _EFER_NXE@GOTPAGEOFF]
Lloh58:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w0, [x21]
	bl	_wrmsr
Lloh59:
	adrp	x8, _PG_NX@GOTPAGE
Lloh60:
	ldr	x8, [x8, _PG_NX@GOTPAGEOFF]
Lloh61:
	ldr	w8, [x8]
Lloh62:
	adrp	x9, _pg_nx@GOTPAGE
Lloh63:
	ldr	x9, [x9, _pg_nx@GOTPAGEOFF]
Lloh64:
	str	w8, [x9]
LBB0_9:
	bl	_hw_ibrs_recalculate
	mov	w0, #0
	bl	_hw_ssb_recalculate
	bl	_amd64_syscall_ret_flush_l1d_recalc
Lloh65:
	adrp	x8, _cpu_vendor_id@GOTPAGE
Lloh66:
	ldr	x8, [x8, _cpu_vendor_id@GOTPAGEOFF]
Lloh67:
	ldr	w8, [x8]
	cmp	w8, #128
	b.eq	LBB0_12
; %bb.10:
	cmp	w8, #129
	b.ne	LBB0_13
; %bb.11:
	bl	_init_amd
	b	LBB0_13
LBB0_12:
	bl	_init_via
LBB0_13:
	ldr	w8, [x19]
Lloh68:
	adrp	x9, _AMDID_RDTSCP@GOTPAGE
Lloh69:
	ldr	x9, [x9, _AMDID_RDTSCP@GOTPAGEOFF]
Lloh70:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_15
; %bb.14:
	ldr	w8, [x20]
Lloh71:
	adrp	x9, _CPUID_STDEXT2_RDPID@GOTPAGE
Lloh72:
	ldr	x9, [x9, _CPUID_STDEXT2_RDPID@GOTPAGEOFF]
Lloh73:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_16
LBB0_15:
Lloh74:
	adrp	x8, _MSR_TSC_AUX@GOTPAGE
Lloh75:
	ldr	x8, [x8, _MSR_TSC_AUX@GOTPAGEOFF]
Lloh76:
	ldr	w19, [x8]
Lloh77:
	adrp	x8, _cpuid@GOTPAGE
Lloh78:
	ldr	x8, [x8, _cpuid@GOTPAGEOFF]
Lloh79:
	ldr	w0, [x8]
	bl	_PCPU_GET
	mov	x1, x0
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_wrmsr
LBB0_16:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotStr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotStr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotStr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.cfi_endproc
                                        ; -- End function
	.comm	_cpu_feature,4,2                ; @cpu_feature
	.comm	_CPUID_XMM,4,2                  ; @CPUID_XMM
	.comm	_CPUID_FXSR,4,2                 ; @CPUID_FXSR
	.comm	_CR4_FXSR,4,2                   ; @CR4_FXSR
	.comm	_CR4_XMM,4,2                    ; @CR4_XMM
	.comm	_hw_instruction_sse,4,2         ; @hw_instruction_sse
	.comm	_cpu_fxsr,4,2                   ; @cpu_fxsr
	.comm	_cpu_stdext_feature,4,2         ; @cpu_stdext_feature
	.comm	_CPUID_STDEXT_FSGSBASE,4,2      ; @CPUID_STDEXT_FSGSBASE
	.comm	_CR4_FSGSBASE,4,2               ; @CR4_FSGSBASE
	.comm	_cpu_stdext_feature2,4,2        ; @cpu_stdext_feature2
	.comm	_CPUID_STDEXT2_PKU,4,2          ; @CPUID_STDEXT2_PKU
	.comm	_CR4_PKE,4,2                    ; @CR4_PKE
	.comm	_CPUID_STDEXT_SMEP,4,2          ; @CPUID_STDEXT_SMEP
	.comm	_CR4_SMEP,4,2                   ; @CR4_SMEP
	.comm	_CPUID_STDEXT_SMAP,4,2          ; @CPUID_STDEXT_SMAP
	.comm	_CR4_SMAP,4,2                   ; @CR4_SMAP
	.comm	_amd_feature,4,2                ; @amd_feature
	.comm	_AMDID_NX,4,2                   ; @AMDID_NX
	.comm	_MSR_EFER,4,2                   ; @MSR_EFER
	.comm	_EFER_NXE,4,2                   ; @EFER_NXE
	.comm	_PG_NX,4,2                      ; @PG_NX
	.comm	_pg_nx,4,2                      ; @pg_nx
	.comm	_cpu_vendor_id,4,2              ; @cpu_vendor_id
	.comm	_AMDID_RDTSCP,4,2               ; @AMDID_RDTSCP
	.comm	_CPUID_STDEXT2_RDPID,4,2        ; @CPUID_STDEXT2_RDPID
	.comm	_MSR_TSC_AUX,4,2                ; @MSR_TSC_AUX
	.comm	_cpuid,4,2                      ; @cpuid
.subsections_via_symbols
