	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pcib_write_irq_mask
_pcib_write_irq_mask:                   ## @pcib_write_irq_mask
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	(%rdi), %rax
	movq	_MV_TYPE_PCIE@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rax
	jne	LBB0_1
## %bb.2:
	movl	%esi, %ecx
	movl	8(%rdi), %esi
	movl	12(%rdi), %edi
	movq	_PCIE_REG_IRQ_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	popq	%rbp
	jmp	_bus_space_write_4              ## TAILCALL
LBB0_1:
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MV_TYPE_PCIE,8,3               ## @MV_TYPE_PCIE
	.comm	_PCIE_REG_IRQ_MASK,4,2          ## @PCIE_REG_IRQ_MASK
	.no_dead_strip	_pcib_write_irq_mask
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pcib_write_irq_mask
_pcib_write_irq_mask:                   ; @pcib_write_irq_mask
	.cfi_startproc
; %bb.0:
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _MV_TYPE_PCIE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MV_TYPE_PCIE@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	mov	x3, x1
Lloh3:
	adrp	x9, _PCIE_REG_IRQ_MASK@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PCIE_REG_IRQ_MASK@GOTPAGEOFF]
	ldp	w1, w8, [x0, #8]
Lloh5:
	ldr	w2, [x9]
	mov	x0, x8
	b	_bus_space_write_4
LBB0_2:
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_MV_TYPE_PCIE,8,3               ; @MV_TYPE_PCIE
	.comm	_PCIE_REG_IRQ_MASK,4,2          ; @PCIE_REG_IRQ_MASK
	.no_dead_strip	_pcib_write_irq_mask
.subsections_via_symbols
