	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function aml8726_clkmsr_clock_frequency
_aml8726_clkmsr_clock_frequency:        ## @aml8726_clkmsr_clock_frequency
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_AML_CLKMSR_NCLKS@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	cmpl	%esi, (%rcx)
	jbe	LBB0_5
## %bb.1:
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movq	_AML_CLKMSR_0_REG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	xorl	%edx, %edx
	callq	_CSR_WRITE_4
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_CSR_BARRIER
	movq	_aml8726_clkmsr_clks@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movl	%r14d, %ecx
	movl	(%rax,%rcx,4), %eax
	movq	_AML_CLKMSR_0_MUX_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_AML_CLKMSR_DURATION@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	decl	%r14d
	movq	_AML_CLKMSR_0_DURATION_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r14d
	orl	%eax, %r14d
	movq	_AML_CLKMSR_0_MUX_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movq	_AML_CLKMSR_0_MEASURE@GOTPCREL(%rip), %r13
	orl	(%r13), %r14d
	movl	(%r15), %esi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	callq	_CSR_WRITE_4
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_CSR_BARRIER
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_CSR_READ_4
	movq	_AML_CLKMSR_0_BUSY@GOTPCREL(%rip), %r12
	testl	%eax, (%r12)
	je	LBB0_4
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	xorl	%eax, %eax
	callq	_cpu_spinwait
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_CSR_READ_4
	testl	%eax, (%r12)
	jne	LBB0_2
LBB0_4:
	movl	(%r13), %eax
	notl	%eax
	andl	%eax, %r14d
	movl	(%r15), %esi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	callq	_CSR_WRITE_4
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_CSR_BARRIER
	movq	_AML_CLKMSR_2_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_CSR_READ_4
	movq	_AML_CLKMSR_2_RESULT_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_AML_CLKMSR_2_RESULT_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movq	_AML_CLKMSR_DURATION@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, %edx
	shrl	$31, %edx
	addl	%ecx, %edx
	sarl	%edx
	addl	%edx, %eax
	cltd
	idivl	%ecx
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AML_CLKMSR_NCLKS,4,2           ## @AML_CLKMSR_NCLKS
	.comm	_AML_CLKMSR_0_REG,4,2           ## @AML_CLKMSR_0_REG
	.comm	_aml8726_clkmsr_clks,8,3        ## @aml8726_clkmsr_clks
	.comm	_AML_CLKMSR_0_MUX_SHIFT,4,2     ## @AML_CLKMSR_0_MUX_SHIFT
	.comm	_AML_CLKMSR_DURATION,4,2        ## @AML_CLKMSR_DURATION
	.comm	_AML_CLKMSR_0_DURATION_SHIFT,4,2 ## @AML_CLKMSR_0_DURATION_SHIFT
	.comm	_AML_CLKMSR_0_MUX_EN,4,2        ## @AML_CLKMSR_0_MUX_EN
	.comm	_AML_CLKMSR_0_MEASURE,4,2       ## @AML_CLKMSR_0_MEASURE
	.comm	_AML_CLKMSR_0_BUSY,4,2          ## @AML_CLKMSR_0_BUSY
	.comm	_AML_CLKMSR_2_REG,4,2           ## @AML_CLKMSR_2_REG
	.comm	_AML_CLKMSR_2_RESULT_MASK,4,2   ## @AML_CLKMSR_2_RESULT_MASK
	.comm	_AML_CLKMSR_2_RESULT_SHIFT,4,2  ## @AML_CLKMSR_2_RESULT_SHIFT
	.no_dead_strip	_aml8726_clkmsr_clock_frequency
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function aml8726_clkmsr_clock_frequency
_aml8726_clkmsr_clock_frequency:        ; @aml8726_clkmsr_clock_frequency
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
Lloh0:
	adrp	x8, _AML_CLKMSR_NCLKS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AML_CLKMSR_NCLKS@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w1
	b.ls	LBB0_4
; %bb.1:
	mov	x20, x1
	mov	x19, x0
Lloh3:
	adrp	x21, _AML_CLKMSR_0_REG@GOTPAGE
Lloh4:
	ldr	x21, [x21, _AML_CLKMSR_0_REG@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	w2, #0
	bl	_CSR_WRITE_4
	ldr	w1, [x21]
	mov	x0, x19
	bl	_CSR_BARRIER
Lloh5:
	adrp	x8, _aml8726_clkmsr_clks@GOTPAGE
Lloh6:
	ldr	x8, [x8, _aml8726_clkmsr_clks@GOTPAGEOFF]
Lloh7:
	ldr	x8, [x8]
	ldr	w8, [x8, w20, uxtw #2]
Lloh8:
	adrp	x9, _AML_CLKMSR_0_MUX_SHIFT@GOTPAGE
Lloh9:
	ldr	x9, [x9, _AML_CLKMSR_0_MUX_SHIFT@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh11:
	adrp	x22, _AML_CLKMSR_DURATION@GOTPAGE
Lloh12:
	ldr	x22, [x22, _AML_CLKMSR_DURATION@GOTPAGEOFF]
	ldr	w9, [x22]
	sub	w9, w9, #1
Lloh13:
	adrp	x10, _AML_CLKMSR_0_DURATION_SHIFT@GOTPAGE
Lloh14:
	ldr	x10, [x10, _AML_CLKMSR_0_DURATION_SHIFT@GOTPAGEOFF]
Lloh15:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
Lloh16:
	adrp	x9, _AML_CLKMSR_0_MUX_EN@GOTPAGE
Lloh17:
	ldr	x9, [x9, _AML_CLKMSR_0_MUX_EN@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh19:
	adrp	x23, _AML_CLKMSR_0_MEASURE@GOTPAGE
Lloh20:
	ldr	x23, [x23, _AML_CLKMSR_0_MEASURE@GOTPAGEOFF]
	ldr	w9, [x23]
	orr	w20, w8, w9
	ldr	w1, [x21]
	mov	x0, x19
	mov	x2, x20
	bl	_CSR_WRITE_4
	ldr	w1, [x21]
	mov	x0, x19
	bl	_CSR_BARRIER
	ldr	w1, [x21]
	mov	x0, x19
	bl	_CSR_READ_4
Lloh21:
	adrp	x24, _AML_CLKMSR_0_BUSY@GOTPAGE
Lloh22:
	ldr	x24, [x24, _AML_CLKMSR_0_BUSY@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x24]
	tst	w8, w0
	b.eq	LBB0_5
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	bl	_cpu_spinwait
	ldr	w1, [x21]
	mov	x0, x19
	bl	_CSR_READ_4
	b	LBB0_2
LBB0_4:
	mov	w0, #0
	b	LBB0_6
LBB0_5:
	ldr	w8, [x23]
	bic	w2, w20, w8
	ldr	w1, [x21]
	mov	x0, x19
	bl	_CSR_WRITE_4
	ldr	w1, [x21]
	mov	x0, x19
	bl	_CSR_BARRIER
Lloh23:
	adrp	x8, _AML_CLKMSR_2_REG@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AML_CLKMSR_2_REG@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_CSR_READ_4
Lloh26:
	adrp	x8, _AML_CLKMSR_2_RESULT_MASK@GOTPAGE
Lloh27:
	ldr	x8, [x8, _AML_CLKMSR_2_RESULT_MASK@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh29:
	adrp	x9, _AML_CLKMSR_2_RESULT_SHIFT@GOTPAGE
Lloh30:
	ldr	x9, [x9, _AML_CLKMSR_2_RESULT_SHIFT@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	asr	w8, w8, w9
	ldr	w9, [x22]
	cmp	w9, #0
	cinc	w10, w9, lt
	add	w8, w8, w10, asr #1
	sdiv	w0, w8, w9
LBB0_6:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_AML_CLKMSR_NCLKS,4,2           ; @AML_CLKMSR_NCLKS
	.comm	_AML_CLKMSR_0_REG,4,2           ; @AML_CLKMSR_0_REG
	.comm	_aml8726_clkmsr_clks,8,3        ; @aml8726_clkmsr_clks
	.comm	_AML_CLKMSR_0_MUX_SHIFT,4,2     ; @AML_CLKMSR_0_MUX_SHIFT
	.comm	_AML_CLKMSR_DURATION,4,2        ; @AML_CLKMSR_DURATION
	.comm	_AML_CLKMSR_0_DURATION_SHIFT,4,2 ; @AML_CLKMSR_0_DURATION_SHIFT
	.comm	_AML_CLKMSR_0_MUX_EN,4,2        ; @AML_CLKMSR_0_MUX_EN
	.comm	_AML_CLKMSR_0_MEASURE,4,2       ; @AML_CLKMSR_0_MEASURE
	.comm	_AML_CLKMSR_0_BUSY,4,2          ; @AML_CLKMSR_0_BUSY
	.comm	_AML_CLKMSR_2_REG,4,2           ; @AML_CLKMSR_2_REG
	.comm	_AML_CLKMSR_2_RESULT_MASK,4,2   ; @AML_CLKMSR_2_RESULT_MASK
	.comm	_AML_CLKMSR_2_RESULT_SHIFT,4,2  ; @AML_CLKMSR_2_RESULT_SHIFT
	.no_dead_strip	_aml8726_clkmsr_clock_frequency
.subsections_via_symbols
