	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mv_wdt_enable_armada_38x_xp_helper
_mv_wdt_enable_armada_38x_xp_helper:    ## @mv_wdt_enable_armada_38x_xp_helper
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	_BRIDGE_IRQ_CAUSE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_read_cpu_ctrl
	movq	_IRQ_TIMER_WD_CLR@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_write_cpu_ctrl
	movq	_WD_RSTOUTn_MASK@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_read_cpu_mp_clocks
	movq	_WD_GLOBAL_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_WD_CPU0_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_write_cpu_mp_clocks
	movq	_RSTOUTn_MASK_ARMV7@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_read_cpu_misc
	movq	_RSTOUTn_MASK_WD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%rbx), %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_write_cpu_misc                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_BRIDGE_IRQ_CAUSE,4,2           ## @BRIDGE_IRQ_CAUSE
	.comm	_IRQ_TIMER_WD_CLR,4,2           ## @IRQ_TIMER_WD_CLR
	.comm	_WD_RSTOUTn_MASK,4,2            ## @WD_RSTOUTn_MASK
	.comm	_WD_GLOBAL_MASK,4,2             ## @WD_GLOBAL_MASK
	.comm	_WD_CPU0_MASK,4,2               ## @WD_CPU0_MASK
	.comm	_RSTOUTn_MASK_ARMV7,4,2         ## @RSTOUTn_MASK_ARMV7
	.comm	_RSTOUTn_MASK_WD,4,2            ## @RSTOUTn_MASK_WD
	.no_dead_strip	_mv_wdt_enable_armada_38x_xp_helper
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mv_wdt_enable_armada_38x_xp_helper
_mv_wdt_enable_armada_38x_xp_helper:    ; @mv_wdt_enable_armada_38x_xp_helper
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x19, _BRIDGE_IRQ_CAUSE@GOTPAGE
Lloh1:
	ldr	x19, [x19, _BRIDGE_IRQ_CAUSE@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_read_cpu_ctrl
Lloh2:
	adrp	x8, _IRQ_TIMER_WD_CLR@GOTPAGE
Lloh3:
	ldr	x8, [x8, _IRQ_TIMER_WD_CLR@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	and	w1, w8, w0
	ldr	w0, [x19]
	bl	_write_cpu_ctrl
Lloh5:
	adrp	x19, _WD_RSTOUTn_MASK@GOTPAGE
Lloh6:
	ldr	x19, [x19, _WD_RSTOUTn_MASK@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_read_cpu_mp_clocks
Lloh7:
	adrp	x8, _WD_GLOBAL_MASK@GOTPAGE
Lloh8:
	ldr	x8, [x8, _WD_GLOBAL_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
Lloh10:
	adrp	x9, _WD_CPU0_MASK@GOTPAGE
Lloh11:
	ldr	x9, [x9, _WD_CPU0_MASK@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	orr	w8, w8, w0
	orr	w1, w8, w9
	ldr	w0, [x19]
	bl	_write_cpu_mp_clocks
Lloh13:
	adrp	x19, _RSTOUTn_MASK_ARMV7@GOTPAGE
Lloh14:
	ldr	x19, [x19, _RSTOUTn_MASK_ARMV7@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_read_cpu_misc
Lloh15:
	adrp	x8, _RSTOUTn_MASK_WD@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RSTOUTn_MASK_WD@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w0, [x19]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_write_cpu_misc
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_BRIDGE_IRQ_CAUSE,4,2           ; @BRIDGE_IRQ_CAUSE
	.comm	_IRQ_TIMER_WD_CLR,4,2           ; @IRQ_TIMER_WD_CLR
	.comm	_WD_RSTOUTn_MASK,4,2            ; @WD_RSTOUTn_MASK
	.comm	_WD_GLOBAL_MASK,4,2             ; @WD_GLOBAL_MASK
	.comm	_WD_CPU0_MASK,4,2               ; @WD_CPU0_MASK
	.comm	_RSTOUTn_MASK_ARMV7,4,2         ; @RSTOUTn_MASK_ARMV7
	.comm	_RSTOUTn_MASK_WD,4,2            ; @RSTOUTn_MASK_WD
	.no_dead_strip	_mv_wdt_enable_armada_38x_xp_helper
.subsections_via_symbols
