	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function a31dmac_set_config
_a31dmac_set_config:                    ## @a31dmac_set_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdx), %eax
	addl	$-8, %eax
	roll	$29, %eax
	cmpl	$8, %eax
	jae	LBB0_1
## %bb.2:
	movl	$139, %ecx
	btl	%eax, %ecx
	jb	LBB0_3
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_21:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movl	4(%rdx), %ecx
	decl	%ecx
	cmpl	$15, %ecx
	ja	LBB0_1
## %bb.4:
	movq	%rsi, %r15
	cltq
	leaq	l_switch.table.a31dmac_set_config(%rip), %rsi
	movq	(%rsi,%rax,8), %rax
	movl	(%rax), %r8d
	movq	_DMA_BST_LEN_1@GOTPCREL(%rip), %rax
	leaq	LJTI0_0(%rip), %rsi
	movslq	(%rsi,%rcx,4), %rcx
	addq	%rsi, %rcx
	jmpq	*%rcx
LBB0_7:
	movq	_DMA_BST_LEN_4@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_5:
	movq	_DMA_BST_LEN_8@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_6:
	movq	_DMA_BST_LEN_16@GOTPCREL(%rip), %rax
LBB0_8:
	movl	(%rax), %r9d
	movl	8(%rdx), %eax
	addl	$-8, %eax
	je	LBB0_9
## %bb.10:
	roll	$29, %eax
	cmpl	$3, %eax
	je	LBB0_13
## %bb.11:
	cmpl	$1, %eax
	jne	LBB0_1
## %bb.12:
	movq	_DMA_DATA_WIDTH_16BIT@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_9:
	movq	_DMA_DATA_WIDTH_8BIT@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_13:
	movq	_DMA_DATA_WIDTH_32BIT@GOTPCREL(%rip), %rax
LBB0_14:
	movl	12(%rdx), %ecx
	decl	%ecx
	cmpl	$15, %ecx
	ja	LBB0_1
## %bb.15:
	movl	(%rax), %r10d
	movq	_DMA_BST_LEN_1@GOTPCREL(%rip), %rdi
	leaq	LJTI0_1(%rip), %rax
	movslq	(%rax,%rcx,4), %rcx
	addq	%rax, %rcx
	jmpq	*%rcx
LBB0_18:
	movq	_DMA_BST_LEN_4@GOTPCREL(%rip), %rdi
	jmp	LBB0_19
LBB0_16:
	movq	_DMA_BST_LEN_8@GOTPCREL(%rip), %rdi
	jmp	LBB0_19
LBB0_17:
	movq	_DMA_BST_LEN_16@GOTPCREL(%rip), %rdi
LBB0_19:
	movl	16(%rdx), %r14d
	cmpl	20(%rdx), %r14d
	jne	LBB0_1
## %bb.20:
	cmpq	$0, 32(%rdx)
	movq	_DMA_ADDR_MODE_LINEAR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_DMA_ADDR_MODE_IO@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%esi, %r11d
	cmovel	%eax, %r11d
	cmpq	$0, 40(%rdx)
	cmovel	%eax, %esi
	movq	_DMA_DEST_DATA_WIDTH_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r8d
	movq	_DMA_DEST_BST_LEN_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r9d
	movq	_DMA_DEST_ADDR_MODE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %esi
	movl	(%rdi), %eax
	orl	%r9d, %esi
	movq	_DMA_DEST_DRQ_TYPE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	24(%rdx), %ebx
	shll	%cl, %ebx
	movl	28(%rdx), %edi
	orl	%esi, %ebx
	movq	_DMA_SRC_DATA_WIDTH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r10d
	movq	_DMA_SRC_BST_LEN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%ebx, %r10d
	orl	%r10d, %eax
	movq	_DMA_SRC_ADDR_MODE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r11d
	movq	_DMA_SRC_DRQ_TYPE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edi
	orl	%eax, %r11d
	orl	%r11d, %edi
	orl	%r8d, %edi
	movq	_WAIT_CYC_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r14d
	callq	_htole32
	movq	(%r15), %rcx
	movq	%rax, 8(%rcx)
	movl	%r14d, %edi
	callq	_htole32
	movq	(%r15), %rcx
	movq	%rax, (%rcx)
	xorl	%eax, %eax
	jmp	LBB0_21
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_1, LBB0_1-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
LJTI0_0:
	.long	L0_0_set_8
	.long	L0_0_set_1
	.long	L0_0_set_1
	.long	L0_0_set_7
	.long	L0_0_set_1
	.long	L0_0_set_1
	.long	L0_0_set_1
	.long	L0_0_set_5
	.long	L0_0_set_1
	.long	L0_0_set_1
	.long	L0_0_set_1
	.long	L0_0_set_1
	.long	L0_0_set_1
	.long	L0_0_set_1
	.long	L0_0_set_1
	.long	L0_0_set_6
.set L0_1_set_19, LBB0_19-LJTI0_1
.set L0_1_set_1, LBB0_1-LJTI0_1
.set L0_1_set_18, LBB0_18-LJTI0_1
.set L0_1_set_16, LBB0_16-LJTI0_1
.set L0_1_set_17, LBB0_17-LJTI0_1
LJTI0_1:
	.long	L0_1_set_19
	.long	L0_1_set_1
	.long	L0_1_set_1
	.long	L0_1_set_18
	.long	L0_1_set_1
	.long	L0_1_set_1
	.long	L0_1_set_1
	.long	L0_1_set_16
	.long	L0_1_set_1
	.long	L0_1_set_1
	.long	L0_1_set_1
	.long	L0_1_set_1
	.long	L0_1_set_1
	.long	L0_1_set_1
	.long	L0_1_set_1
	.long	L0_1_set_17
	.end_data_region
                                        ## -- End function
	.comm	_DMA_DATA_WIDTH_8BIT,4,2        ## @DMA_DATA_WIDTH_8BIT
	.comm	_DMA_DATA_WIDTH_16BIT,4,2       ## @DMA_DATA_WIDTH_16BIT
	.comm	_DMA_DATA_WIDTH_32BIT,4,2       ## @DMA_DATA_WIDTH_32BIT
	.comm	_DMA_DATA_WIDTH_64BIT,4,2       ## @DMA_DATA_WIDTH_64BIT
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_DMA_BST_LEN_1,4,2              ## @DMA_BST_LEN_1
	.comm	_DMA_BST_LEN_4,4,2              ## @DMA_BST_LEN_4
	.comm	_DMA_BST_LEN_8,4,2              ## @DMA_BST_LEN_8
	.comm	_DMA_BST_LEN_16,4,2             ## @DMA_BST_LEN_16
	.comm	_DMA_ADDR_MODE_IO,4,2           ## @DMA_ADDR_MODE_IO
	.comm	_DMA_ADDR_MODE_LINEAR,4,2       ## @DMA_ADDR_MODE_LINEAR
	.comm	_DMA_DEST_DATA_WIDTH_SHIFT,4,2  ## @DMA_DEST_DATA_WIDTH_SHIFT
	.comm	_DMA_DEST_BST_LEN_SHIFT,4,2     ## @DMA_DEST_BST_LEN_SHIFT
	.comm	_DMA_DEST_ADDR_MODE_SHIFT,4,2   ## @DMA_DEST_ADDR_MODE_SHIFT
	.comm	_DMA_DEST_DRQ_TYPE_SHIFT,4,2    ## @DMA_DEST_DRQ_TYPE_SHIFT
	.comm	_DMA_SRC_DATA_WIDTH_SHIFT,4,2   ## @DMA_SRC_DATA_WIDTH_SHIFT
	.comm	_DMA_SRC_BST_LEN_SHIFT,4,2      ## @DMA_SRC_BST_LEN_SHIFT
	.comm	_DMA_SRC_ADDR_MODE_SHIFT,4,2    ## @DMA_SRC_ADDR_MODE_SHIFT
	.comm	_DMA_SRC_DRQ_TYPE_SHIFT,4,2     ## @DMA_SRC_DRQ_TYPE_SHIFT
	.comm	_WAIT_CYC_SHIFT,4,2             ## @WAIT_CYC_SHIFT
	.no_dead_strip	_a31dmac_set_config
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.a31dmac_set_config
l_switch.table.a31dmac_set_config:
	.quad	_DMA_DATA_WIDTH_8BIT
	.quad	_DMA_DATA_WIDTH_16BIT
	.quad	_DMA_DATA_WIDTH_8BIT
	.quad	_DMA_DATA_WIDTH_32BIT
	.quad	_DMA_DATA_WIDTH_8BIT
	.quad	_DMA_DATA_WIDTH_8BIT
	.quad	_DMA_DATA_WIDTH_8BIT
	.quad	_DMA_DATA_WIDTH_64BIT

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function a31dmac_set_config
_a31dmac_set_config:                    ; @a31dmac_set_config
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	w8, [x2]
	sub	w8, w8, #8
	ror	w8, w8, #3
	cmp	w8, #8
	b.hs	LBB0_2
; %bb.1:
	mov	w9, #139
	lsr	w9, w9, w8
	tbnz	w9, #0, LBB0_4
LBB0_2:
Lloh0:
	adrp	x8, _EINVAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_4:
	ldr	w9, [x2, #4]
	sub	w10, w9, #1
	cmp	w10, #15
	b.hi	LBB0_2
; %bb.5:
	mov	x19, x1
Lloh3:
	adrp	x9, l_switch.table.a31dmac_set_config@PAGE
Lloh4:
	add	x9, x9, l_switch.table.a31dmac_set_config@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _DMA_BST_LEN_1@GOTPAGE
Lloh6:
	ldr	x9, [x9, _DMA_BST_LEN_1@GOTPAGEOFF]
Lloh7:
	adrp	x11, lJTI0_0@PAGE
Lloh8:
	add	x11, x11, lJTI0_0@PAGEOFF
	adr	x12, LBB0_2
	ldrb	w13, [x11, x10]
	add	x12, x12, x13, lsl #2
	br	x12
LBB0_6:
Lloh9:
	adrp	x9, _DMA_BST_LEN_4@GOTPAGE
Lloh10:
	ldr	x9, [x9, _DMA_BST_LEN_4@GOTPAGEOFF]
	b	LBB0_9
LBB0_7:
Lloh11:
	adrp	x9, _DMA_BST_LEN_8@GOTPAGE
Lloh12:
	ldr	x9, [x9, _DMA_BST_LEN_8@GOTPAGEOFF]
	b	LBB0_9
LBB0_8:
Lloh13:
	adrp	x9, _DMA_BST_LEN_16@GOTPAGE
Lloh14:
	ldr	x9, [x9, _DMA_BST_LEN_16@GOTPAGEOFF]
LBB0_9:
	ldr	w9, [x9]
	ldr	w10, [x2, #8]
	subs	w10, w10, #8
	b.eq	LBB0_13
; %bb.10:
	ror	w10, w10, #3
	cmp	w10, #3
	b.eq	LBB0_14
; %bb.11:
	cmp	w10, #1
	b.ne	LBB0_2
; %bb.12:
Lloh15:
	adrp	x10, _DMA_DATA_WIDTH_16BIT@GOTPAGE
Lloh16:
	ldr	x10, [x10, _DMA_DATA_WIDTH_16BIT@GOTPAGEOFF]
	b	LBB0_15
LBB0_13:
Lloh17:
	adrp	x10, _DMA_DATA_WIDTH_8BIT@GOTPAGE
Lloh18:
	ldr	x10, [x10, _DMA_DATA_WIDTH_8BIT@GOTPAGEOFF]
	b	LBB0_15
LBB0_14:
Lloh19:
	adrp	x10, _DMA_DATA_WIDTH_32BIT@GOTPAGE
Lloh20:
	ldr	x10, [x10, _DMA_DATA_WIDTH_32BIT@GOTPAGEOFF]
LBB0_15:
	ldr	w11, [x2, #12]
	sub	w11, w11, #1
	cmp	w11, #15
	b.hi	LBB0_2
; %bb.16:
	ldr	w10, [x10]
Lloh21:
	adrp	x12, _DMA_BST_LEN_1@GOTPAGE
Lloh22:
	ldr	x12, [x12, _DMA_BST_LEN_1@GOTPAGEOFF]
Lloh23:
	adrp	x13, lJTI0_1@PAGE
Lloh24:
	add	x13, x13, lJTI0_1@PAGEOFF
	adr	x14, LBB0_2
	ldrb	w15, [x13, x11]
	add	x14, x14, x15, lsl #2
	br	x14
LBB0_17:
Lloh25:
	adrp	x12, _DMA_BST_LEN_4@GOTPAGE
Lloh26:
	ldr	x12, [x12, _DMA_BST_LEN_4@GOTPAGEOFF]
	b	LBB0_20
LBB0_18:
Lloh27:
	adrp	x12, _DMA_BST_LEN_8@GOTPAGE
Lloh28:
	ldr	x12, [x12, _DMA_BST_LEN_8@GOTPAGEOFF]
	b	LBB0_20
LBB0_19:
Lloh29:
	adrp	x12, _DMA_BST_LEN_16@GOTPAGE
Lloh30:
	ldr	x12, [x12, _DMA_BST_LEN_16@GOTPAGEOFF]
LBB0_20:
	ldp	w11, w13, [x2, #16]
	cmp	w11, w13
	b.ne	LBB0_2
; %bb.21:
Lloh31:
	adrp	x13, _DMA_ADDR_MODE_LINEAR@GOTPAGE
Lloh32:
	ldr	x13, [x13, _DMA_ADDR_MODE_LINEAR@GOTPAGEOFF]
Lloh33:
	adrp	x14, _DMA_ADDR_MODE_IO@GOTPAGE
Lloh34:
	ldr	x14, [x14, _DMA_ADDR_MODE_IO@GOTPAGEOFF]
Lloh35:
	ldr	w13, [x13]
Lloh36:
	ldr	w14, [x14]
	ldp	x15, x16, [x2, #32]
	cmp	x15, #0
	csel	w15, w13, w14, eq
	cmp	x16, #0
	csel	w13, w13, w14, eq
	ldr	w12, [x12]
Lloh37:
	adrp	x14, _DMA_DEST_DATA_WIDTH_SHIFT@GOTPAGE
Lloh38:
	ldr	x14, [x14, _DMA_DEST_DATA_WIDTH_SHIFT@GOTPAGEOFF]
Lloh39:
	ldr	w14, [x14]
	lsl	w8, w8, w14
Lloh40:
	adrp	x14, _DMA_DEST_BST_LEN_SHIFT@GOTPAGE
Lloh41:
	ldr	x14, [x14, _DMA_DEST_BST_LEN_SHIFT@GOTPAGEOFF]
Lloh42:
	ldr	w14, [x14]
	lsl	w9, w9, w14
	orr	w8, w9, w8
Lloh43:
	adrp	x9, _DMA_DEST_ADDR_MODE_SHIFT@GOTPAGE
Lloh44:
	ldr	x9, [x9, _DMA_DEST_ADDR_MODE_SHIFT@GOTPAGEOFF]
Lloh45:
	ldr	w9, [x9]
	lsl	w9, w13, w9
Lloh46:
	adrp	x13, _DMA_DEST_DRQ_TYPE_SHIFT@GOTPAGE
Lloh47:
	ldr	x13, [x13, _DMA_DEST_DRQ_TYPE_SHIFT@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh48:
	ldr	w9, [x13]
	ldp	w13, w14, [x2, #24]
	lsl	w9, w13, w9
	orr	w8, w8, w9
Lloh49:
	adrp	x9, _DMA_SRC_DATA_WIDTH_SHIFT@GOTPAGE
Lloh50:
	ldr	x9, [x9, _DMA_SRC_DATA_WIDTH_SHIFT@GOTPAGEOFF]
Lloh51:
	ldr	w9, [x9]
	lsl	w9, w10, w9
Lloh52:
	adrp	x10, _DMA_SRC_BST_LEN_SHIFT@GOTPAGE
Lloh53:
	ldr	x10, [x10, _DMA_SRC_BST_LEN_SHIFT@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh54:
	ldr	w9, [x10]
	lsl	w9, w12, w9
	orr	w8, w8, w9
Lloh55:
	adrp	x9, _DMA_SRC_ADDR_MODE_SHIFT@GOTPAGE
Lloh56:
	ldr	x9, [x9, _DMA_SRC_ADDR_MODE_SHIFT@GOTPAGEOFF]
Lloh57:
	ldr	w9, [x9]
	lsl	w9, w15, w9
	orr	w8, w8, w9
Lloh58:
	adrp	x9, _DMA_SRC_DRQ_TYPE_SHIFT@GOTPAGE
Lloh59:
	ldr	x9, [x9, _DMA_SRC_DRQ_TYPE_SHIFT@GOTPAGEOFF]
Lloh60:
	ldr	w9, [x9]
	lsl	w9, w14, w9
	orr	w0, w8, w9
Lloh61:
	adrp	x8, _WAIT_CYC_SHIFT@GOTPAGE
Lloh62:
	ldr	x8, [x8, _WAIT_CYC_SHIFT@GOTPAGEOFF]
Lloh63:
	ldr	w8, [x8]
	lsl	w20, w11, w8
	bl	_htole32
	ldr	x8, [x19]
	str	x0, [x8, #8]
	mov	x0, x20
	bl	_htole32
	mov	x8, x0
	mov	w0, #0
	ldr	x9, [x19]
	str	x8, [x9]
	b	LBB0_3
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh35
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_9-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_8-LBB0_2)>>2
lJTI0_1:
	.byte	(LBB0_20-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_17-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_18-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_19-LBB0_2)>>2
                                        ; -- End function
	.comm	_DMA_DATA_WIDTH_8BIT,4,2        ; @DMA_DATA_WIDTH_8BIT
	.comm	_DMA_DATA_WIDTH_16BIT,4,2       ; @DMA_DATA_WIDTH_16BIT
	.comm	_DMA_DATA_WIDTH_32BIT,4,2       ; @DMA_DATA_WIDTH_32BIT
	.comm	_DMA_DATA_WIDTH_64BIT,4,2       ; @DMA_DATA_WIDTH_64BIT
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_DMA_BST_LEN_1,4,2              ; @DMA_BST_LEN_1
	.comm	_DMA_BST_LEN_4,4,2              ; @DMA_BST_LEN_4
	.comm	_DMA_BST_LEN_8,4,2              ; @DMA_BST_LEN_8
	.comm	_DMA_BST_LEN_16,4,2             ; @DMA_BST_LEN_16
	.comm	_DMA_ADDR_MODE_IO,4,2           ; @DMA_ADDR_MODE_IO
	.comm	_DMA_ADDR_MODE_LINEAR,4,2       ; @DMA_ADDR_MODE_LINEAR
	.comm	_DMA_DEST_DATA_WIDTH_SHIFT,4,2  ; @DMA_DEST_DATA_WIDTH_SHIFT
	.comm	_DMA_DEST_BST_LEN_SHIFT,4,2     ; @DMA_DEST_BST_LEN_SHIFT
	.comm	_DMA_DEST_ADDR_MODE_SHIFT,4,2   ; @DMA_DEST_ADDR_MODE_SHIFT
	.comm	_DMA_DEST_DRQ_TYPE_SHIFT,4,2    ; @DMA_DEST_DRQ_TYPE_SHIFT
	.comm	_DMA_SRC_DATA_WIDTH_SHIFT,4,2   ; @DMA_SRC_DATA_WIDTH_SHIFT
	.comm	_DMA_SRC_BST_LEN_SHIFT,4,2      ; @DMA_SRC_BST_LEN_SHIFT
	.comm	_DMA_SRC_ADDR_MODE_SHIFT,4,2    ; @DMA_SRC_ADDR_MODE_SHIFT
	.comm	_DMA_SRC_DRQ_TYPE_SHIFT,4,2     ; @DMA_SRC_DRQ_TYPE_SHIFT
	.comm	_WAIT_CYC_SHIFT,4,2             ; @WAIT_CYC_SHIFT
	.no_dead_strip	_a31dmac_set_config
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.a31dmac_set_config
l_switch.table.a31dmac_set_config:
	.quad	_DMA_DATA_WIDTH_8BIT
	.quad	_DMA_DATA_WIDTH_16BIT
	.quad	_DMA_DATA_WIDTH_8BIT
	.quad	_DMA_DATA_WIDTH_32BIT
	.quad	_DMA_DATA_WIDTH_8BIT
	.quad	_DMA_DATA_WIDTH_8BIT
	.quad	_DMA_DATA_WIDTH_8BIT
	.quad	_DMA_DATA_WIDTH_64BIT

.subsections_via_symbols
