	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pinmux_config_grp
_pinmux_config_grp:                     ## @pinmux_config_grp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %rbx
	movq	%rdx, %r15
	movq	%rdi, %r14
	movl	(%rdi), %edi
	movl	16(%rdx), %esi
	callq	_bus_read_4
	movq	(%rbx), %rsi
	movq	_PROP_ID_HIGH_SPEED_MODE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rsi,%rcx,4), %edx
	cmpl	$-1, %edx
	je	LBB0_2
## %bb.1:
	movq	_TEGRA_GRP_HSM_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	btrl	%ecx, %eax
	andl	$1, %edx
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %edx
	orl	%edx, %eax
LBB0_2:
	movq	_PROP_ID_SCHMITT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rsi,%rcx,4), %edx
	cmpl	$-1, %edx
	je	LBB0_4
## %bb.3:
	movq	_TEGRA_GRP_SCHMT_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	btrl	%ecx, %eax
	andl	$1, %edx
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %edx
	orl	%edx, %eax
LBB0_4:
	movq	_PROP_ID_DRIVE_TYPE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rsi,%rcx,4), %edx
	cmpl	$-1, %edx
	je	LBB0_6
## %bb.5:
	movq	_TEGRA_GRP_DRV_TYPE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_TEGRA_GRP_DRV_TYPE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%ebx, %edi
	shll	%cl, %edi
	andl	%ebx, %edx
	notl	%edi
	andl	%edi, %eax
	shll	%cl, %edx
	orl	%edx, %eax
LBB0_6:
	movq	_PROP_ID_SLEW_RATE_RISING@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rsi,%rcx,4), %edx
	cmpl	$-1, %edx
	je	LBB0_8
## %bb.7:
	movq	_TEGRA_GRP_DRV_DRVDN_SLWR_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_TEGRA_GRP_DRV_DRVDN_SLWR_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%ebx, %edi
	shll	%cl, %edi
	andl	%ebx, %edx
	notl	%edi
	andl	%edi, %eax
	shll	%cl, %edx
	orl	%edx, %eax
LBB0_8:
	movq	_PROP_ID_SLEW_RATE_FALLING@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rsi,%rcx,4), %edx
	cmpl	$-1, %edx
	je	LBB0_10
## %bb.9:
	movq	_TEGRA_GRP_DRV_DRVUP_SLWF_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_TEGRA_GRP_DRV_DRVUP_SLWF_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%ebx, %edi
	shll	%cl, %edi
	andl	%ebx, %edx
	notl	%edi
	andl	%edi, %eax
	shll	%cl, %edx
	orl	%edx, %eax
LBB0_10:
	movq	_PROP_ID_DRIVE_DOWN_STRENGTH@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rsi,%rcx,4), %edi
	cmpl	$-1, %edi
	je	LBB0_13
## %bb.11:
	movl	(%r15), %ecx
	cmpl	$-1, %ecx
	je	LBB0_13
## %bb.12:
	movl	4(%r15), %ebx
	movl	%ebx, %edx
	shll	%cl, %edx
	notl	%edx
	andl	%edx, %eax
	andl	%ecx, %edi
	movl	%ebx, %ecx
	shll	%cl, %edi
	orl	%edi, %eax
LBB0_13:
	movq	_PROP_ID_DRIVE_UP_STRENGTH@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rsi,%rcx,4), %esi
	cmpl	$-1, %esi
	je	LBB0_16
## %bb.14:
	movl	8(%r15), %ecx
	cmpl	$-1, %ecx
	je	LBB0_16
## %bb.15:
	movl	12(%r15), %edx
	movl	%edx, %edi
	shll	%cl, %edi
	notl	%edi
	andl	%edi, %eax
	andl	%ecx, %esi
	movl	%edx, %ecx
	shll	%cl, %esi
	orl	%esi, %eax
LBB0_16:
	movl	(%r14), %edi
	movl	16(%r15), %esi
	movl	%eax, %edx
	callq	_bus_write_4
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PROP_ID_HIGH_SPEED_MODE,8,3    ## @PROP_ID_HIGH_SPEED_MODE
	.comm	_TEGRA_GRP_HSM_SHIFT,4,2        ## @TEGRA_GRP_HSM_SHIFT
	.comm	_PROP_ID_SCHMITT,8,3            ## @PROP_ID_SCHMITT
	.comm	_TEGRA_GRP_SCHMT_SHIFT,4,2      ## @TEGRA_GRP_SCHMT_SHIFT
	.comm	_PROP_ID_DRIVE_TYPE,8,3         ## @PROP_ID_DRIVE_TYPE
	.comm	_TEGRA_GRP_DRV_TYPE_MASK,4,2    ## @TEGRA_GRP_DRV_TYPE_MASK
	.comm	_TEGRA_GRP_DRV_TYPE_SHIFT,4,2   ## @TEGRA_GRP_DRV_TYPE_SHIFT
	.comm	_PROP_ID_SLEW_RATE_RISING,8,3   ## @PROP_ID_SLEW_RATE_RISING
	.comm	_TEGRA_GRP_DRV_DRVDN_SLWR_MASK,4,2 ## @TEGRA_GRP_DRV_DRVDN_SLWR_MASK
	.comm	_TEGRA_GRP_DRV_DRVDN_SLWR_SHIFT,4,2 ## @TEGRA_GRP_DRV_DRVDN_SLWR_SHIFT
	.comm	_PROP_ID_SLEW_RATE_FALLING,8,3  ## @PROP_ID_SLEW_RATE_FALLING
	.comm	_TEGRA_GRP_DRV_DRVUP_SLWF_MASK,4,2 ## @TEGRA_GRP_DRV_DRVUP_SLWF_MASK
	.comm	_TEGRA_GRP_DRV_DRVUP_SLWF_SHIFT,4,2 ## @TEGRA_GRP_DRV_DRVUP_SLWF_SHIFT
	.comm	_PROP_ID_DRIVE_DOWN_STRENGTH,8,3 ## @PROP_ID_DRIVE_DOWN_STRENGTH
	.comm	_PROP_ID_DRIVE_UP_STRENGTH,8,3  ## @PROP_ID_DRIVE_UP_STRENGTH
	.no_dead_strip	_pinmux_config_grp
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pinmux_config_grp
_pinmux_config_grp:                     ; @pinmux_config_grp
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x3
	mov	x19, x2
	mov	x20, x0
	ldr	w0, [x0]
	ldr	w1, [x2, #16]
	bl	_bus_read_4
	mov	x2, x0
	ldr	x8, [x21]
Lloh0:
	adrp	x9, _PROP_ID_HIGH_SPEED_MODE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PROP_ID_HIGH_SPEED_MODE@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	ldr	w9, [x8, x9, lsl #2]
	cmn	w9, #1
	b.eq	LBB0_2
; %bb.1:
Lloh3:
	adrp	x10, _TEGRA_GRP_HSM_SHIFT@GOTPAGE
Lloh4:
	ldr	x10, [x10, _TEGRA_GRP_HSM_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	mov	w11, #1
	lsl	w11, w11, w10
	bic	w11, w2, w11
	and	w9, w9, #0x1
	lsl	w9, w9, w10
	orr	w2, w11, w9
LBB0_2:
Lloh6:
	adrp	x9, _PROP_ID_SCHMITT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _PROP_ID_SCHMITT@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	ldr	w9, [x8, x9, lsl #2]
	cmn	w9, #1
	b.eq	LBB0_4
; %bb.3:
Lloh9:
	adrp	x10, _TEGRA_GRP_SCHMT_SHIFT@GOTPAGE
Lloh10:
	ldr	x10, [x10, _TEGRA_GRP_SCHMT_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	mov	w11, #1
	lsl	w11, w11, w10
	bic	w11, w2, w11
	and	w9, w9, #0x1
	lsl	w9, w9, w10
	orr	w2, w11, w9
LBB0_4:
Lloh12:
	adrp	x9, _PROP_ID_DRIVE_TYPE@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PROP_ID_DRIVE_TYPE@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	ldr	w9, [x8, x9, lsl #2]
	cmn	w9, #1
	b.eq	LBB0_6
; %bb.5:
Lloh15:
	adrp	x10, _TEGRA_GRP_DRV_TYPE_MASK@GOTPAGE
Lloh16:
	ldr	x10, [x10, _TEGRA_GRP_DRV_TYPE_MASK@GOTPAGEOFF]
Lloh17:
	ldr	w10, [x10]
Lloh18:
	adrp	x11, _TEGRA_GRP_DRV_TYPE_SHIFT@GOTPAGE
Lloh19:
	ldr	x11, [x11, _TEGRA_GRP_DRV_TYPE_SHIFT@GOTPAGEOFF]
Lloh20:
	ldr	w11, [x11]
	lsl	w12, w10, w11
	bic	w12, w2, w12
	and	w9, w10, w9
	lsl	w9, w9, w11
	orr	w2, w12, w9
LBB0_6:
Lloh21:
	adrp	x9, _PROP_ID_SLEW_RATE_RISING@GOTPAGE
Lloh22:
	ldr	x9, [x9, _PROP_ID_SLEW_RATE_RISING@GOTPAGEOFF]
Lloh23:
	ldr	x9, [x9]
	ldr	w9, [x8, x9, lsl #2]
	cmn	w9, #1
	b.eq	LBB0_8
; %bb.7:
Lloh24:
	adrp	x10, _TEGRA_GRP_DRV_DRVDN_SLWR_MASK@GOTPAGE
Lloh25:
	ldr	x10, [x10, _TEGRA_GRP_DRV_DRVDN_SLWR_MASK@GOTPAGEOFF]
Lloh26:
	ldr	w10, [x10]
Lloh27:
	adrp	x11, _TEGRA_GRP_DRV_DRVDN_SLWR_SHIFT@GOTPAGE
Lloh28:
	ldr	x11, [x11, _TEGRA_GRP_DRV_DRVDN_SLWR_SHIFT@GOTPAGEOFF]
Lloh29:
	ldr	w11, [x11]
	lsl	w12, w10, w11
	bic	w12, w2, w12
	and	w9, w10, w9
	lsl	w9, w9, w11
	orr	w2, w12, w9
LBB0_8:
Lloh30:
	adrp	x9, _PROP_ID_SLEW_RATE_FALLING@GOTPAGE
Lloh31:
	ldr	x9, [x9, _PROP_ID_SLEW_RATE_FALLING@GOTPAGEOFF]
Lloh32:
	ldr	x9, [x9]
	ldr	w9, [x8, x9, lsl #2]
	cmn	w9, #1
	b.eq	LBB0_10
; %bb.9:
Lloh33:
	adrp	x10, _TEGRA_GRP_DRV_DRVUP_SLWF_MASK@GOTPAGE
Lloh34:
	ldr	x10, [x10, _TEGRA_GRP_DRV_DRVUP_SLWF_MASK@GOTPAGEOFF]
Lloh35:
	ldr	w10, [x10]
Lloh36:
	adrp	x11, _TEGRA_GRP_DRV_DRVUP_SLWF_SHIFT@GOTPAGE
Lloh37:
	ldr	x11, [x11, _TEGRA_GRP_DRV_DRVUP_SLWF_SHIFT@GOTPAGEOFF]
Lloh38:
	ldr	w11, [x11]
	lsl	w12, w10, w11
	bic	w12, w2, w12
	and	w9, w10, w9
	lsl	w9, w9, w11
	orr	w2, w12, w9
LBB0_10:
Lloh39:
	adrp	x9, _PROP_ID_DRIVE_DOWN_STRENGTH@GOTPAGE
Lloh40:
	ldr	x9, [x9, _PROP_ID_DRIVE_DOWN_STRENGTH@GOTPAGEOFF]
Lloh41:
	ldr	x9, [x9]
	ldr	w9, [x8, x9, lsl #2]
	cmn	w9, #1
	b.eq	LBB0_13
; %bb.11:
	ldr	w10, [x19]
	cmn	w10, #1
	b.eq	LBB0_13
; %bb.12:
	ldr	w11, [x19, #4]
	lsl	w12, w11, w10
	bic	w12, w2, w12
	and	w9, w10, w9
	lsl	w9, w9, w11
	orr	w2, w12, w9
LBB0_13:
Lloh42:
	adrp	x9, _PROP_ID_DRIVE_UP_STRENGTH@GOTPAGE
Lloh43:
	ldr	x9, [x9, _PROP_ID_DRIVE_UP_STRENGTH@GOTPAGEOFF]
Lloh44:
	ldr	x9, [x9]
	ldr	w8, [x8, x9, lsl #2]
	cmn	w8, #1
	b.eq	LBB0_16
; %bb.14:
	ldr	w9, [x19, #8]
	cmn	w9, #1
	b.eq	LBB0_16
; %bb.15:
	ldr	w10, [x19, #12]
	lsl	w11, w10, w9
	bic	w11, w2, w11
	and	w8, w9, w8
	lsl	w8, w8, w10
	orr	w2, w11, w8
LBB0_16:
	ldr	w0, [x20]
	ldr	w1, [x19, #16]
	bl	_bus_write_4
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.cfi_endproc
                                        ; -- End function
	.comm	_PROP_ID_HIGH_SPEED_MODE,8,3    ; @PROP_ID_HIGH_SPEED_MODE
	.comm	_TEGRA_GRP_HSM_SHIFT,4,2        ; @TEGRA_GRP_HSM_SHIFT
	.comm	_PROP_ID_SCHMITT,8,3            ; @PROP_ID_SCHMITT
	.comm	_TEGRA_GRP_SCHMT_SHIFT,4,2      ; @TEGRA_GRP_SCHMT_SHIFT
	.comm	_PROP_ID_DRIVE_TYPE,8,3         ; @PROP_ID_DRIVE_TYPE
	.comm	_TEGRA_GRP_DRV_TYPE_MASK,4,2    ; @TEGRA_GRP_DRV_TYPE_MASK
	.comm	_TEGRA_GRP_DRV_TYPE_SHIFT,4,2   ; @TEGRA_GRP_DRV_TYPE_SHIFT
	.comm	_PROP_ID_SLEW_RATE_RISING,8,3   ; @PROP_ID_SLEW_RATE_RISING
	.comm	_TEGRA_GRP_DRV_DRVDN_SLWR_MASK,4,2 ; @TEGRA_GRP_DRV_DRVDN_SLWR_MASK
	.comm	_TEGRA_GRP_DRV_DRVDN_SLWR_SHIFT,4,2 ; @TEGRA_GRP_DRV_DRVDN_SLWR_SHIFT
	.comm	_PROP_ID_SLEW_RATE_FALLING,8,3  ; @PROP_ID_SLEW_RATE_FALLING
	.comm	_TEGRA_GRP_DRV_DRVUP_SLWF_MASK,4,2 ; @TEGRA_GRP_DRV_DRVUP_SLWF_MASK
	.comm	_TEGRA_GRP_DRV_DRVUP_SLWF_SHIFT,4,2 ; @TEGRA_GRP_DRV_DRVUP_SLWF_SHIFT
	.comm	_PROP_ID_DRIVE_DOWN_STRENGTH,8,3 ; @PROP_ID_DRIVE_DOWN_STRENGTH
	.comm	_PROP_ID_DRIVE_UP_STRENGTH,8,3  ; @PROP_ID_DRIVE_UP_STRENGTH
	.no_dead_strip	_pinmux_config_grp
.subsections_via_symbols
