	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mv_wdt_enable_armv5
_mv_wdt_enable_armv5:                   ## @mv_wdt_enable_armv5
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	_BRIDGE_IRQ_CAUSE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_read_cpu_ctrl
	movq	_IRQ_TIMER_WD_CLR@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_write_cpu_ctrl
	movq	_BRIDGE_IRQ_MASK@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_read_cpu_ctrl
	movq	_IRQ_TIMER_WD_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_write_cpu_ctrl
	movq	_RSTOUTn_MASK@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_read_cpu_ctrl
	movq	_WD_RST_OUT_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_write_cpu_ctrl
	xorl	%eax, %eax
	callq	_mv_get_timer_control
	movq	_CPU_TIMER2_EN@GOTPCREL(%rip), %rcx
	movq	_CPU_TIMER2_AUTO@GOTPCREL(%rip), %rdx
	orl	(%rcx), %eax
	orl	(%rdx), %eax
	movl	%eax, %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_mv_set_timer_control           ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_BRIDGE_IRQ_CAUSE,4,2           ## @BRIDGE_IRQ_CAUSE
	.comm	_IRQ_TIMER_WD_CLR,4,2           ## @IRQ_TIMER_WD_CLR
	.comm	_BRIDGE_IRQ_MASK,4,2            ## @BRIDGE_IRQ_MASK
	.comm	_IRQ_TIMER_WD_MASK,4,2          ## @IRQ_TIMER_WD_MASK
	.comm	_RSTOUTn_MASK,4,2               ## @RSTOUTn_MASK
	.comm	_WD_RST_OUT_EN,4,2              ## @WD_RST_OUT_EN
	.comm	_CPU_TIMER2_EN,4,2              ## @CPU_TIMER2_EN
	.comm	_CPU_TIMER2_AUTO,4,2            ## @CPU_TIMER2_AUTO
	.no_dead_strip	_mv_wdt_enable_armv5
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mv_wdt_enable_armv5
_mv_wdt_enable_armv5:                   ; @mv_wdt_enable_armv5
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x19, _BRIDGE_IRQ_CAUSE@GOTPAGE
Lloh1:
	ldr	x19, [x19, _BRIDGE_IRQ_CAUSE@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_read_cpu_ctrl
Lloh2:
	adrp	x8, _IRQ_TIMER_WD_CLR@GOTPAGE
Lloh3:
	ldr	x8, [x8, _IRQ_TIMER_WD_CLR@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	and	w1, w8, w0
	ldr	w0, [x19]
	bl	_write_cpu_ctrl
Lloh5:
	adrp	x19, _BRIDGE_IRQ_MASK@GOTPAGE
Lloh6:
	ldr	x19, [x19, _BRIDGE_IRQ_MASK@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_read_cpu_ctrl
Lloh7:
	adrp	x8, _IRQ_TIMER_WD_MASK@GOTPAGE
Lloh8:
	ldr	x8, [x8, _IRQ_TIMER_WD_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w0, [x19]
	bl	_write_cpu_ctrl
Lloh10:
	adrp	x19, _RSTOUTn_MASK@GOTPAGE
Lloh11:
	ldr	x19, [x19, _RSTOUTn_MASK@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_read_cpu_ctrl
Lloh12:
	adrp	x8, _WD_RST_OUT_EN@GOTPAGE
Lloh13:
	ldr	x8, [x8, _WD_RST_OUT_EN@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w0, [x19]
	bl	_write_cpu_ctrl
	bl	_mv_get_timer_control
Lloh15:
	adrp	x8, _CPU_TIMER2_EN@GOTPAGE
Lloh16:
	ldr	x8, [x8, _CPU_TIMER2_EN@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
Lloh18:
	adrp	x9, _CPU_TIMER2_AUTO@GOTPAGE
Lloh19:
	ldr	x9, [x9, _CPU_TIMER2_AUTO@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w8, w8, w0
	orr	w0, w8, w9
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_mv_set_timer_control
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_BRIDGE_IRQ_CAUSE,4,2           ; @BRIDGE_IRQ_CAUSE
	.comm	_IRQ_TIMER_WD_CLR,4,2           ; @IRQ_TIMER_WD_CLR
	.comm	_BRIDGE_IRQ_MASK,4,2            ; @BRIDGE_IRQ_MASK
	.comm	_IRQ_TIMER_WD_MASK,4,2          ; @IRQ_TIMER_WD_MASK
	.comm	_RSTOUTn_MASK,4,2               ; @RSTOUTn_MASK
	.comm	_WD_RST_OUT_EN,4,2              ; @WD_RST_OUT_EN
	.comm	_CPU_TIMER2_EN,4,2              ; @CPU_TIMER2_EN
	.comm	_CPU_TIMER2_AUTO,4,2            ; @CPU_TIMER2_AUTO
	.no_dead_strip	_mv_wdt_enable_armv5
.subsections_via_symbols
