	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cpuinfo_init                   ## -- Begin function cpuinfo_init
	.p2align	4, 0x90
_cpuinfo_init:                          ## @cpuinfo_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	leaq	L_.str(%rip), %rdi
	movq	_cpu_quirks_actlr_mask@GOTPCREL(%rip), %rsi
	callq	_TUNABLE_INT_FETCH
	leaq	L_.str.1(%rip), %rdi
	movq	_cpu_quirks_actlr_set@GOTPCREL(%rip), %rsi
	callq	_TUNABLE_INT_FETCH
	xorl	%eax, %eax
	callq	_cp15_midr_get
	movq	_cpuinfo@GOTPCREL(%rip), %rbx
	movl	%eax, (%rbx)
	movq	_CPU_ID_IMPLEMENTOR_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	movq	_CPU_ID_ARM_LTD@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	jne	LBB0_6
## %bb.1:
	movl	%eax, %edi
	callq	_CPU_ID_ISOLD
	testq	%rax, %rax
	je	LBB0_3
LBB0_2:
	movl	$0, (%rbx)
	jmp	LBB0_8
LBB0_3:
	movl	(%rbx), %edi
	callq	_CPU_ID_IS7
	movq	%rax, %rcx
	movl	(%rbx), %eax
	testq	%rcx, %rcx
	je	LBB0_6
## %bb.4:
	testl	$8388608, %eax                  ## imm = 0x800000
	je	LBB0_2
## %bb.9:
	movl	$1, 4(%rbx)
	movl	%eax, %ecx
	shrl	$16, %ecx
	andl	$127, %ecx
	jmp	LBB0_7
LBB0_6:
	movl	%eax, %ecx
	shrl	$16, %ecx
	andl	$15, %ecx
	movl	%ecx, 4(%rbx)
	movl	%eax, %ecx
	shrl	$20, %ecx
	andl	$15, %ecx
LBB0_7:
	movl	%ecx, 8(%rbx)
	movl	%eax, %ecx
	shrl	$24, %ecx
	movl	%ecx, 12(%rbx)
	movl	%eax, %ecx
	shrl	$4, %ecx
	andl	$4095, %ecx                     ## imm = 0xFFF
	movl	%ecx, 16(%rbx)
	andl	$15, %eax
	movl	%eax, 20(%rbx)
	xorl	%eax, %eax
	callq	_cp15_ctr_get
	movl	%eax, 120(%rbx)
	xorl	%eax, %eax
	callq	_cp15_tcmtr_get
	movl	%eax, 164(%rbx)
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"hw.cpu.quirks.actlr_mask"

	.comm	_cpu_quirks_actlr_mask,4,2      ## @cpu_quirks_actlr_mask
L_.str.1:                               ## @.str.1
	.asciz	"hw.cpu.quirks.actlr_set"

	.comm	_cpu_quirks_actlr_set,4,2       ## @cpu_quirks_actlr_set
	.comm	_cpuinfo,168,2                  ## @cpuinfo
	.comm	_CPU_ID_IMPLEMENTOR_MASK,4,2    ## @CPU_ID_IMPLEMENTOR_MASK
	.comm	_CPU_ID_ARM_LTD,4,2             ## @CPU_ID_ARM_LTD
	.comm	_CPU_CT_ARMV7,8,3               ## @CPU_CT_ARMV7
	.comm	_HWCAP2_AES,4,2                 ## @HWCAP2_AES
	.comm	_HWCAP2_CRC32,4,2               ## @HWCAP2_CRC32
	.comm	_HWCAP2_PMULL,4,2               ## @HWCAP2_PMULL
	.comm	_HWCAP2_SHA1,4,2                ## @HWCAP2_SHA1
	.comm	_HWCAP2_SHA2,4,2                ## @HWCAP2_SHA2
	.comm	_HWCAP_EDSP,4,2                 ## @HWCAP_EDSP
	.comm	_HWCAP_FAST_MULT,4,2            ## @HWCAP_FAST_MULT
	.comm	_HWCAP_HALF,4,2                 ## @HWCAP_HALF
	.comm	_HWCAP_IDIVA,4,2                ## @HWCAP_IDIVA
	.comm	_HWCAP_IDIVT,4,2                ## @HWCAP_IDIVT
	.comm	_HWCAP_LPAE,4,2                 ## @HWCAP_LPAE
	.comm	_HWCAP_THUMB,4,2                ## @HWCAP_THUMB
	.comm	_HWCAP_THUMBEE,4,2              ## @HWCAP_THUMBEE
	.comm	_HWCAP_TLS,4,2                  ## @HWCAP_TLS
	.comm	_elf_hwcap,4,2                  ## @elf_hwcap
	.comm	_elf_hwcap2,4,2                 ## @elf_hwcap2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function cpuinfo_init
lCPI0_0:
	.long	4294967288                      ; 0xfffffff8
	.long	4294967284                      ; 0xfffffff4
lCPI0_2:
	.long	4294967284                      ; 0xfffffff4
	.long	4294967292                      ; 0xfffffffc
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4
lCPI0_1:
	.long	4294967276                      ; 0xffffffec
	.long	4294967276                      ; 0xffffffec
	.long	4294967284                      ; 0xfffffff4
	.long	4294967280                      ; 0xfffffff0
	.section	__TEXT,__text,regular,pure_instructions
	.globl	_cpuinfo_init
	.p2align	2
_cpuinfo_init:                          ; @cpuinfo_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
Lloh2:
	adrp	x1, _cpu_quirks_actlr_mask@GOTPAGE
Lloh3:
	ldr	x1, [x1, _cpu_quirks_actlr_mask@GOTPAGEOFF]
	bl	_TUNABLE_INT_FETCH
Lloh4:
	adrp	x0, l_.str.1@PAGE
Lloh5:
	add	x0, x0, l_.str.1@PAGEOFF
Lloh6:
	adrp	x1, _cpu_quirks_actlr_set@GOTPAGE
Lloh7:
	ldr	x1, [x1, _cpu_quirks_actlr_set@GOTPAGEOFF]
	bl	_TUNABLE_INT_FETCH
	bl	_cp15_midr_get
Lloh8:
	adrp	x19, _cpuinfo@GOTPAGE
Lloh9:
	ldr	x19, [x19, _cpuinfo@GOTPAGEOFF]
	str	w0, [x19]
Lloh10:
	adrp	x8, _CPU_ID_IMPLEMENTOR_MASK@GOTPAGE
Lloh11:
	ldr	x8, [x8, _CPU_ID_IMPLEMENTOR_MASK@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh13:
	adrp	x9, _CPU_ID_ARM_LTD@GOTPAGE
Lloh14:
	ldr	x9, [x9, _CPU_ID_ARM_LTD@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_6
; %bb.1:
	bl	_CPU_ID_ISOLD
	cbz	x0, LBB0_3
LBB0_2:
	str	wzr, [x19]
	b	LBB0_33
LBB0_3:
	ldr	w0, [x19]
	bl	_CPU_ID_IS7
	mov	x8, x0
	ldr	w0, [x19]
	cbz	x8, LBB0_6
; %bb.4:
	tbz	w0, #23, LBB0_2
; %bb.5:
	mov	w8, #1
	str	w8, [x19, #4]
	ubfx	w8, w0, #16, #7
	b	LBB0_7
LBB0_6:
	ubfx	w8, w0, #16, #4
	str	w8, [x19, #4]
	ubfx	w8, w0, #20, #4
LBB0_7:
	lsr	w9, w0, #24
	stp	w8, w9, [x19, #8]
	ubfx	w8, w0, #4, #12
	and	w9, w0, #0xf
	stp	w8, w9, [x19, #16]
	bl	_cp15_ctr_get
	str	w0, [x19, #120]
	bl	_cp15_tcmtr_get
	str	w0, [x19, #164]
	bl	_cp15_tlbtr_get
	str	w0, [x19, #160]
	bl	_cp15_mpidr_get
	str	w0, [x19, #24]
	bl	_cp15_revidr_get
	str	w0, [x19, #28]
	ldr	w8, [x19, #4]
	cmp	w8, #15
	b.ne	LBB0_33
; %bb.8:
	bl	_cp15_id_pfr0_get
	str	w0, [x19, #32]
	bl	_cp15_id_pfr1_get
	str	w0, [x19, #36]
	bl	_cp15_id_dfr0_get
	str	w0, [x19, #156]
	bl	_cp15_id_afr0_get
	str	w0, [x19, #152]
	bl	_cp15_id_mmfr0_get
	str	w0, [x19, #40]
	bl	_cp15_id_mmfr1_get
	str	w0, [x19, #148]
	bl	_cp15_id_mmfr2_get
	str	w0, [x19, #44]
	bl	_cp15_id_mmfr3_get
	str	w0, [x19, #48]
	bl	_cp15_id_isar0_get
	str	w0, [x19, #52]
	bl	_cp15_id_isar1_get
	str	w0, [x19, #144]
	bl	_cp15_id_isar2_get
	str	w0, [x19, #140]
	bl	_cp15_id_isar3_get
	str	w0, [x19, #136]
	bl	_cp15_id_isar4_get
	str	w0, [x19, #132]
	bl	_cp15_id_isar5_get
	str	w0, [x19, #56]
	ldr	w0, [x19, #120]
	bl	_CPU_CT_FORMAT
Lloh16:
	adrp	x20, _CPU_CT_ARMV7@GOTPAGE
Lloh17:
	ldr	x20, [x20, _CPU_CT_ARMV7@GOTPAGEOFF]
	ldr	x8, [x20]
	cmp	x0, x8
	b.ne	LBB0_10
; %bb.9:
	bl	_cp15_ccsidr_get
	str	w0, [x19, #128]
	bl	_cp15_clidr_get
	str	w0, [x19, #124]
LBB0_10:
	ldr	w8, [x19, #28]
	ldr	w9, [x19]
	cmp	w8, w9
	b.ne	LBB0_12
; %bb.11:
	str	wzr, [x19, #28]
LBB0_12:
	ldp	w9, w8, [x19, #36]
	dup.2s	v0, w8
Lloh18:
	adrp	x10, lCPI0_0@PAGE
Lloh19:
	ldr	d1, [x10, lCPI0_0@PAGEOFF]
	ushl.2s	v0, v0, v1
	movi.2s	v1, #15
	and.8b	v0, v0, v1
	stur	d0, [x19, #60]
	ubfx	w10, w8, #20, #4
	lsr	w8, w8, #28
	ldur	d0, [x19, #44]
	mov.s	v0[2], v0[1]
	mov.s	v0[3], w9
	stp	w10, w8, [x19, #68]
Lloh20:
	adrp	x8, lCPI0_1@PAGE
Lloh21:
	ldr	q2, [x8, lCPI0_1@PAGEOFF]
	ushl.4s	v0, v0, v2
	movi.4s	v2, #15
	and.16b	v0, v0, v2
	stur	q0, [x19, #76]
	dup.2s	v0, w9
Lloh22:
	adrp	x8, lCPI0_2@PAGE
Lloh23:
	ldr	d2, [x8, lCPI0_2@PAGEOFF]
	ushl.2s	v0, v0, v2
	and.8b	v0, v0, v1
	stur	d0, [x19, #92]
	ldr	w8, [x19, #24]
	lsr	w8, w8, #31
	str	w8, [x19, #100]
	ldr	w0, [x19, #120]
	bl	_CPU_CT_FORMAT
	mov	x8, x0
	ldr	x9, [x20]
	ldr	w0, [x19, #120]
	cmp	x8, x9
	b.ne	LBB0_14
; %bb.13:
	bl	_CPU_CT_DMINLINE
	add	w8, w0, #2
	mov	w9, #1
	lsl	w8, w9, w8
	str	w8, [x19, #104]
	ldr	w0, [x19, #120]
	bl	_CPU_CT_IMINLINE
	add	w8, w0, #2
	b	LBB0_15
LBB0_14:
	bl	_CPU_CT_DSIZE
	bl	_CPU_CT_xSIZE_LEN
	add	w8, w0, #3
	mov	w9, #1
	lsl	w8, w9, w8
	str	w8, [x19, #104]
	ldr	w0, [x19, #120]
	bl	_CPU_CT_ISIZE
	bl	_CPU_CT_xSIZE_LEN
	add	w8, w0, #3
LBB0_15:
	mov	w9, #1
	lsl	w8, w9, w8
	ldr	w9, [x19, #104]
	sub	w9, w9, #1
	stp	w8, w9, [x19, #108]
	sub	w8, w8, #1
	str	w8, [x19, #116]
Lloh24:
	adrp	x8, _HWCAP_HALF@GOTPAGE
Lloh25:
	ldr	x8, [x8, _HWCAP_HALF@GOTPAGEOFF]
Lloh26:
	adrp	x9, _HWCAP_FAST_MULT@GOTPAGE
Lloh27:
	ldr	x9, [x9, _HWCAP_FAST_MULT@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
Lloh29:
	ldr	w9, [x9]
	orr	w9, w9, w8
Lloh30:
	adrp	x8, _elf_hwcap@GOTPAGE
Lloh31:
	ldr	x8, [x8, _elf_hwcap@GOTPAGEOFF]
	ldr	w10, [x8]
	orr	w9, w9, w10
Lloh32:
	adrp	x10, _HWCAP_TLS@GOTPAGE
Lloh33:
	ldr	x10, [x10, _HWCAP_TLS@GOTPAGEOFF]
Lloh34:
	ldr	w10, [x10]
Lloh35:
	adrp	x11, _HWCAP_EDSP@GOTPAGE
Lloh36:
	ldr	x11, [x11, _HWCAP_EDSP@GOTPAGEOFF]
Lloh37:
	ldr	w11, [x11]
	orr	w9, w10, w9
	orr	w9, w9, w11
	str	w9, [x8]
	ldrb	w10, [x19, #55]
	ands	w10, w10, #0xf
	b.eq	LBB0_18
; %bb.16:
Lloh38:
	adrp	x11, _HWCAP_IDIVT@GOTPAGE
Lloh39:
	ldr	x11, [x11, _HWCAP_IDIVT@GOTPAGEOFF]
Lloh40:
	ldr	w11, [x11]
	orr	w9, w11, w9
	str	w9, [x8]
	cmp	w10, #1
	b.eq	LBB0_18
; %bb.17:
Lloh41:
	adrp	x10, _HWCAP_IDIVA@GOTPAGE
Lloh42:
	ldr	x10, [x10, _HWCAP_IDIVA@GOTPAGEOFF]
Lloh43:
	ldr	w10, [x10]
	orr	w9, w9, w10
	str	w9, [x8]
LBB0_18:
	ldr	w10, [x19, #32]
	tst	w10, #0xf0
	b.eq	LBB0_20
; %bb.19:
Lloh44:
	adrp	x11, _HWCAP_THUMB@GOTPAGE
Lloh45:
	ldr	x11, [x11, _HWCAP_THUMB@GOTPAGEOFF]
Lloh46:
	ldr	w11, [x11]
	orr	w9, w9, w11
	str	w9, [x8]
LBB0_20:
	tst	w10, #0xf000
	b.eq	LBB0_22
; %bb.21:
Lloh47:
	adrp	x10, _HWCAP_THUMBEE@GOTPAGE
Lloh48:
	ldr	x10, [x10, _HWCAP_THUMBEE@GOTPAGEOFF]
Lloh49:
	ldr	w10, [x10]
	orr	w9, w9, w10
	str	w9, [x8]
LBB0_22:
	ldr	w10, [x19, #40]
	and	w10, w10, #0xf
	cmp	w10, #5
	b.lo	LBB0_24
; %bb.23:
Lloh50:
	adrp	x10, _HWCAP_LPAE@GOTPAGE
Lloh51:
	ldr	x10, [x10, _HWCAP_LPAE@GOTPAGEOFF]
Lloh52:
	ldr	w10, [x10]
	orr	w9, w9, w10
	str	w9, [x8]
LBB0_24:
	ldr	w9, [x19, #56]
	ubfx	w10, w9, #4, #4
Lloh53:
	adrp	x8, _elf_hwcap2@GOTPAGE
Lloh54:
	ldr	x8, [x8, _elf_hwcap2@GOTPAGEOFF]
	cbz	w10, LBB0_27
; %bb.25:
Lloh55:
	adrp	x11, _HWCAP2_AES@GOTPAGE
Lloh56:
	ldr	x11, [x11, _HWCAP2_AES@GOTPAGEOFF]
Lloh57:
	ldr	w11, [x11]
	ldr	w12, [x8]
	orr	w11, w12, w11
	str	w11, [x8]
	cmp	w10, #1
	b.eq	LBB0_27
; %bb.26:
Lloh58:
	adrp	x10, _HWCAP2_PMULL@GOTPAGE
Lloh59:
	ldr	x10, [x10, _HWCAP2_PMULL@GOTPAGEOFF]
Lloh60:
	ldr	w10, [x10]
	orr	w10, w11, w10
	str	w10, [x8]
LBB0_27:
	tst	w9, #0xf00
	b.eq	LBB0_29
; %bb.28:
Lloh61:
	adrp	x10, _HWCAP2_SHA1@GOTPAGE
Lloh62:
	ldr	x10, [x10, _HWCAP2_SHA1@GOTPAGEOFF]
Lloh63:
	ldr	w10, [x10]
	ldr	w11, [x8]
	orr	w10, w11, w10
	str	w10, [x8]
LBB0_29:
	tst	w9, #0xf000
	b.eq	LBB0_31
; %bb.30:
Lloh64:
	adrp	x10, _HWCAP2_SHA2@GOTPAGE
Lloh65:
	ldr	x10, [x10, _HWCAP2_SHA2@GOTPAGEOFF]
Lloh66:
	ldr	w10, [x10]
	ldr	w11, [x8]
	orr	w10, w11, w10
	str	w10, [x8]
LBB0_31:
	tst	w9, #0xf0000
	b.eq	LBB0_33
; %bb.32:
Lloh67:
	adrp	x9, _HWCAP2_CRC32@GOTPAGE
Lloh68:
	ldr	x9, [x9, _HWCAP2_CRC32@GOTPAGEOFF]
Lloh69:
	ldr	w9, [x9]
	ldr	w10, [x8]
	orr	w9, w10, w9
	str	w9, [x8]
LBB0_33:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdr	Lloh22, Lloh23
	.loh AdrpAdrp	Lloh20, Lloh22
	.loh AdrpLdr	Lloh20, Lloh21
	.loh AdrpLdr	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh28
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"hw.cpu.quirks.actlr_mask"

	.comm	_cpu_quirks_actlr_mask,4,2      ; @cpu_quirks_actlr_mask
l_.str.1:                               ; @.str.1
	.asciz	"hw.cpu.quirks.actlr_set"

	.comm	_cpu_quirks_actlr_set,4,2       ; @cpu_quirks_actlr_set
	.comm	_cpuinfo,168,2                  ; @cpuinfo
	.comm	_CPU_ID_IMPLEMENTOR_MASK,4,2    ; @CPU_ID_IMPLEMENTOR_MASK
	.comm	_CPU_ID_ARM_LTD,4,2             ; @CPU_ID_ARM_LTD
	.comm	_CPU_CT_ARMV7,8,3               ; @CPU_CT_ARMV7
	.comm	_HWCAP_HALF,4,2                 ; @HWCAP_HALF
	.comm	_HWCAP_FAST_MULT,4,2            ; @HWCAP_FAST_MULT
	.comm	_elf_hwcap,4,2                  ; @elf_hwcap
	.comm	_HWCAP_TLS,4,2                  ; @HWCAP_TLS
	.comm	_HWCAP_EDSP,4,2                 ; @HWCAP_EDSP
	.comm	_HWCAP_IDIVT,4,2                ; @HWCAP_IDIVT
	.comm	_HWCAP_IDIVA,4,2                ; @HWCAP_IDIVA
	.comm	_HWCAP_THUMB,4,2                ; @HWCAP_THUMB
	.comm	_HWCAP_THUMBEE,4,2              ; @HWCAP_THUMBEE
	.comm	_HWCAP_LPAE,4,2                 ; @HWCAP_LPAE
	.comm	_HWCAP2_AES,4,2                 ; @HWCAP2_AES
	.comm	_elf_hwcap2,4,2                 ; @elf_hwcap2
	.comm	_HWCAP2_PMULL,4,2               ; @HWCAP2_PMULL
	.comm	_HWCAP2_SHA1,4,2                ; @HWCAP2_SHA1
	.comm	_HWCAP2_SHA2,4,2                ; @HWCAP2_SHA2
	.comm	_HWCAP2_CRC32,4,2               ; @HWCAP2_CRC32
.subsections_via_symbols
