	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	___emul_insn                    ## -- Begin function __emul_insn
	.p2align	4, 0x90
___emul_insn:                           ## @__emul_insn
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	(%rdi), %rax
	movl	(%rax), %r15d
	xorl	%eax, %eax
	callq	_flushw
	movl	%r15d, %edi
	callq	_IF_OP
	cmpl	$129, %eax
	je	LBB0_7
## %bb.1:
	cmpl	$128, %eax
	jne	LBB0_11
## %bb.2:
	movl	%r15d, %edi
	callq	_IF_F3_OP3
	cmpl	$132, %eax
	jne	LBB0_11
## %bb.3:
	movl	%r15d, %edi
	callq	_IF_F3_RS1
	testl	%eax, %eax
	jne	LBB0_11
## %bb.4:
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	___emul_f3_op2
	xorl	%ecx, %ecx
                                        ## implicit-def: $ebx
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	xorl	%edx, %edx
	btl	%ecx, %eax
	setb	%dl
	leal	1(%rcx), %esi
	btl	%esi, %eax
	adcl	%ebx, %edx
	incl	%esi
	movzbl	%sil, %esi
	xorl	%ebx, %ebx
	btl	%esi, %eax
	setb	%bl
	leal	3(%rcx), %esi
	btl	%esi, %eax
	adcl	%edx, %ebx
	addl	$4, %ecx
	cmpl	$64, %ecx
	jne	LBB0_5
## %bb.6:
	movl	%r15d, %edi
	callq	_IF_F3_RD
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	%ebx, %edx
	callq	___emul_store_reg
	xorl	%eax, %eax
	jmp	LBB0_12
LBB0_7:
	movl	%r15d, %edi
	callq	_IF_F3_OP3
	cmpl	$130, %eax
	je	LBB0_10
## %bb.8:
	cmpl	$131, %eax
	jne	LBB0_11
## %bb.9:
	movl	%r15d, %edi
	callq	_IF_F3_RD
	movl	%eax, %edi
	callq	_INSFPdq_RN
	movl	%eax, %ebx
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	___emul_f3_memop_addr
	movq	%rax, %r14
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	___fpu_setreg64
	addl	$2, %ebx
	movl	4(%r14), %esi
	movl	%ebx, %edi
	callq	___fpu_setreg64
	xorl	%eax, %eax
	jmp	LBB0_12
LBB0_11:
	movq	_SIGILL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_12:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	movl	%r15d, %edi
	callq	_IF_F3_RD
	movl	%eax, %edi
	callq	_INSFPdq_RN
	movl	%eax, %ebx
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	___emul_f3_memop_addr
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	___fpu_getreg64
	movl	%eax, (%r14)
	addl	$2, %ebx
	movl	%ebx, %edi
	callq	___fpu_getreg64
	movl	%eax, 4(%r14)
	xorl	%eax, %eax
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.comm	_SIGILL,4,2                     ## @SIGILL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	___emul_insn                    ; -- Begin function __emul_insn
	.p2align	2
___emul_insn:                           ; @__emul_insn
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0]
	ldr	w20, [x8]
	bl	_flushw
	mov	x0, x20
	bl	_IF_OP
	cmp	w0, #129
	b.eq	LBB0_5
; %bb.1:
	cmp	w0, #128
	b.ne	LBB0_8
; %bb.2:
	mov	x0, x20
	bl	_IF_F3_OP3
	cmp	w0, #132
	b.ne	LBB0_8
; %bb.3:
	mov	x0, x20
	bl	_IF_F3_RS1
	cbnz	w0, LBB0_8
; %bb.4:
	mov	x0, x19
	mov	x1, x20
	bl	___emul_f3_op2
	mov	x0, x20
	bl	_IF_F3_RD
	mov	x1, x0
	mov	x0, x19
	bl	___emul_store_reg
	mov	w0, #0
	b	LBB0_9
LBB0_5:
	mov	x0, x20
	bl	_IF_F3_OP3
	cmp	w0, #130
	b.eq	LBB0_10
; %bb.6:
	cmp	w0, #131
	b.ne	LBB0_8
; %bb.7:
	mov	x0, x20
	bl	_IF_F3_RD
	bl	_INSFPdq_RN
	mov	x21, x0
	mov	x0, x19
	mov	x1, x20
	bl	___emul_f3_memop_addr
	mov	x19, x0
	ldr	w1, [x0]
	mov	x0, x21
	bl	___fpu_setreg64
	add	w0, w21, #2
	ldr	w1, [x19, #4]
	bl	___fpu_setreg64
	mov	w0, #0
	b	LBB0_9
LBB0_8:
Lloh0:
	adrp	x8, _SIGILL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SIGILL@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_10:
	mov	x0, x20
	bl	_IF_F3_RD
	bl	_INSFPdq_RN
	mov	x21, x0
	mov	x0, x19
	mov	x1, x20
	bl	___emul_f3_memop_addr
	mov	x19, x0
	mov	x0, x21
	bl	___fpu_getreg64
	str	w0, [x19]
	add	w0, w21, #2
	bl	___fpu_getreg64
	mov	x8, x0
	mov	w0, #0
	str	w8, [x19, #4]
	b	LBB0_9
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SIGILL,4,2                     ; @SIGILL
.subsections_via_symbols
