	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function store_regs
_store_regs:                            ## @store_regs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$32, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	_ARM_A1_REGNUM@GOTPCREL(%rip), %rax
	movslq	(%rax), %rbx
	movq	_ARM_SP_REGNUM@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	cmpl	%edi, %ebx
	jge	LBB0_2
	.p2align	4, 0x90
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_regcache_collect
	incq	%rbx
	movslq	(%r14), %rdi
	cmpq	%rdi, %rbx
	jl	LBB0_1
LBB0_2:
	leaq	-36(%rbp), %rsi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_regcache_collect
	movq	_ARM_LR_REGNUM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-40(%rbp), %rsi
	callq	_regcache_collect
	movq	_arm_apcs_32@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_4
## %bb.3:
	movq	_ARM_PC_REGNUM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-48(%rbp), %rsi
	callq	_regcache_collect
	movq	_ARM_PS_REGNUM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-44(%rbp), %rsi
	callq	_regcache_collect
	jmp	LBB0_5
LBB0_4:
	movq	_ARM_PC_REGNUM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-20(%rbp), %rsi
	callq	_regcache_collect
	movq	_ARM_PS_REGNUM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-24(%rbp), %rsi
	callq	_regcache_collect
	movl	-20(%rbp), %edi
	callq	_ADDR_BITS_REMOVE
	movl	%eax, -20(%rbp)
	movl	-24(%rbp), %edi
	callq	_ADDR_BITS_REMOVE
	xorl	-24(%rbp), %eax
	orl	-20(%rbp), %eax
	movl	%eax, -48(%rbp)
LBB0_5:
	movq	_PT_SETREGS@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_inferior_ptid@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_PIDGET
	leaq	-48(%rbp), %rdx
	movl	%ebx, %edi
	movl	%eax, %esi
                                        ## kill: def $edx killed $edx killed $rdx
	xorl	%ecx, %ecx
	callq	_ptrace
	testl	%eax, %eax
	jns	LBB0_7
## %bb.6:
	leaq	L_.str(%rip), %rdi
	callq	_warning
LBB0_7:
	addq	$32, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ARM_A1_REGNUM,4,2              ## @ARM_A1_REGNUM
	.comm	_ARM_SP_REGNUM,4,2              ## @ARM_SP_REGNUM
	.comm	_ARM_LR_REGNUM,4,2              ## @ARM_LR_REGNUM
	.comm	_arm_apcs_32,8,3                ## @arm_apcs_32
	.comm	_ARM_PC_REGNUM,4,2              ## @ARM_PC_REGNUM
	.comm	_ARM_PS_REGNUM,4,2              ## @ARM_PS_REGNUM
	.comm	_PT_SETREGS,4,2                 ## @PT_SETREGS
	.comm	_inferior_ptid,4,2              ## @inferior_ptid
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"unable to store general registers"

	.no_dead_strip	_store_regs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function store_regs
_store_regs:                            ; @store_regs
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x8, _ARM_A1_REGNUM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ARM_A1_REGNUM@GOTPAGEOFF]
Lloh2:
	ldrsw	x19, [x8]
Lloh3:
	adrp	x20, _ARM_SP_REGNUM@GOTPAGE
Lloh4:
	ldr	x20, [x20, _ARM_SP_REGNUM@GOTPAGEOFF]
	ldr	w0, [x20]
	cmp	w19, w0
	b.ge	LBB0_2
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	bl	_regcache_collect
	add	x19, x19, #1
	ldrsw	x0, [x20]
	cmp	x19, x0
	b.lt	LBB0_1
LBB0_2:
	add	x19, sp, #8
	add	x1, x19, #12
                                        ; kill: def $w0 killed $w0 killed $x0
	bl	_regcache_collect
Lloh5:
	adrp	x8, _ARM_LR_REGNUM@GOTPAGE
Lloh6:
	ldr	x8, [x8, _ARM_LR_REGNUM@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	add	x1, x19, #8
	bl	_regcache_collect
Lloh8:
	adrp	x8, _arm_apcs_32@GOTPAGE
Lloh9:
	ldr	x8, [x8, _arm_apcs_32@GOTPAGEOFF]
Lloh10:
	ldr	x8, [x8]
	cbz	x8, LBB0_4
; %bb.3:
Lloh11:
	adrp	x8, _ARM_PC_REGNUM@GOTPAGE
Lloh12:
	ldr	x8, [x8, _ARM_PC_REGNUM@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	add	x1, sp, #8
	bl	_regcache_collect
Lloh14:
	adrp	x8, _ARM_PS_REGNUM@GOTPAGE
Lloh15:
	ldr	x8, [x8, _ARM_PS_REGNUM@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	orr	x1, x19, #0x4
	bl	_regcache_collect
	b	LBB0_5
LBB0_4:
Lloh17:
	adrp	x8, _ARM_PC_REGNUM@GOTPAGE
Lloh18:
	ldr	x8, [x8, _ARM_PC_REGNUM@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x8]
	add	x1, sp, #4
	bl	_regcache_collect
Lloh20:
	adrp	x8, _ARM_PS_REGNUM@GOTPAGE
Lloh21:
	ldr	x8, [x8, _ARM_PS_REGNUM@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	mov	x1, sp
	bl	_regcache_collect
	ldr	w0, [sp, #4]
	bl	_ADDR_BITS_REMOVE
	str	w0, [sp, #4]
	ldr	w0, [sp]
	bl	_ADDR_BITS_REMOVE
	ldp	w8, w9, [sp]
	eor	w8, w8, w0
	orr	w8, w9, w8
	str	w8, [sp, #8]
LBB0_5:
Lloh23:
	adrp	x8, _PT_SETREGS@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PT_SETREGS@GOTPAGEOFF]
Lloh25:
	ldr	w19, [x8]
Lloh26:
	adrp	x8, _inferior_ptid@GOTPAGE
Lloh27:
	ldr	x8, [x8, _inferior_ptid@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
	bl	_PIDGET
	mov	x1, x0
	add	x2, sp, #8
	mov	x0, x19
	mov	w3, #0
	bl	_ptrace
	tbz	w0, #31, LBB0_7
; %bb.6:
Lloh29:
	adrp	x0, l_.str@PAGE
Lloh30:
	add	x0, x0, l_.str@PAGEOFF
	bl	_warning
LBB0_7:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpAdd	Lloh29, Lloh30
	.cfi_endproc
                                        ; -- End function
	.comm	_ARM_A1_REGNUM,4,2              ; @ARM_A1_REGNUM
	.comm	_ARM_SP_REGNUM,4,2              ; @ARM_SP_REGNUM
	.comm	_ARM_LR_REGNUM,4,2              ; @ARM_LR_REGNUM
	.comm	_arm_apcs_32,8,3                ; @arm_apcs_32
	.comm	_ARM_PC_REGNUM,4,2              ; @ARM_PC_REGNUM
	.comm	_ARM_PS_REGNUM,4,2              ; @ARM_PS_REGNUM
	.comm	_PT_SETREGS,4,2                 ; @PT_SETREGS
	.comm	_inferior_ptid,4,2              ; @inferior_ptid
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"unable to store general registers"

	.no_dead_strip	_store_regs
.subsections_via_symbols
