	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mv_pcib_hw_cfgread
_mv_pcib_hw_cfgread:                    ## @mv_pcib_hw_cfgread
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, -56(%rbp)                 ## 4-byte Spill
	movl	%r8d, %r13d
	movl	%ecx, -48(%rbp)                 ## 4-byte Spill
	movl	%edx, %r15d
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	_MV_TYPE_PCI@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movq	_PCIE_REG_CFG_ADDR@GOTPCREL(%rip), %rax
	cmoveq	_PCI_REG_CFG_ADDR@GOTPCREL(%rip), %rax
	movq	_PCIE_REG_CFG_DATA@GOTPCREL(%rip), %rcx
	cmoveq	_PCI_REG_CFG_DATA@GOTPCREL(%rip), %rcx
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	(%rcx), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_PCI_CFG_ENA@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	%esi, %edi
	callq	_PCI_CFG_BUS
	movl	%eax, %r14d
	movl	%r15d, %edi
	callq	_PCI_CFG_DEV
	orl	%eax, %r14d
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	callq	_PCI_CFG_FUN
	orl	%eax, %r14d
	movl	%r13d, %edi
	callq	_PCI_CFG_PCIE_REG
	orl	%eax, %r14d
	orl	%r12d, %r14d
	movq	_pcicfg_mtx@GOTPCREL(%rip), %rdi
	callq	_mtx_lock_spin
	movl	8(%rbx), %esi
	movl	12(%rbx), %edi
	movl	-52(%rbp), %edx                 ## 4-byte Reload
	movl	%r14d, %ecx
	callq	_bus_space_write_4
	movl	-56(%rbp), %eax                 ## 4-byte Reload
	cmpl	$4, %eax
	je	LBB0_5
## %bb.1:
	cmpl	$2, %eax
	je	LBB0_4
## %bb.2:
	movl	$-1, %r14d
	cmpl	$1, %eax
	jne	LBB0_7
## %bb.3:
	movl	8(%rbx), %esi
	movl	12(%rbx), %edi
	andl	$3, %r13d
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	addl	%r13d, %edx
	callq	_bus_space_read_1
	jmp	LBB0_6
LBB0_5:
	movl	8(%rbx), %esi
	movl	12(%rbx), %edi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	callq	_bus_space_read_4
	movl	%eax, %edi
	callq	_le32toh
	jmp	LBB0_6
LBB0_4:
	movl	8(%rbx), %esi
	movl	12(%rbx), %edi
	andl	$2, %r13d
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	addl	%r13d, %edx
	callq	_bus_space_read_2
	movl	%eax, %edi
	callq	_le16toh
LBB0_6:
	movl	%eax, %r14d
LBB0_7:
	movq	_pcicfg_mtx@GOTPCREL(%rip), %rdi
	callq	_mtx_unlock_spin
	movl	%r14d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MV_TYPE_PCI,8,3                ## @MV_TYPE_PCI
	.comm	_PCIE_REG_CFG_ADDR,4,2          ## @PCIE_REG_CFG_ADDR
	.comm	_PCI_REG_CFG_ADDR,4,2           ## @PCI_REG_CFG_ADDR
	.comm	_PCIE_REG_CFG_DATA,4,2          ## @PCIE_REG_CFG_DATA
	.comm	_PCI_REG_CFG_DATA,4,2           ## @PCI_REG_CFG_DATA
	.comm	_PCI_CFG_ENA,4,2                ## @PCI_CFG_ENA
	.comm	_pcicfg_mtx,4,2                 ## @pcicfg_mtx
	.no_dead_strip	_mv_pcib_hw_cfgread
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mv_pcib_hw_cfgread
_mv_pcib_hw_cfgread:                    ; @mv_pcib_hw_cfgread
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x5
	mov	x19, x4
	mov	x23, x3
	mov	x24, x2
	mov	x20, x0
Lloh0:
	adrp	x8, _MV_TYPE_PCI@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MV_TYPE_PCI@GOTPAGEOFF]
	ldr	x9, [x0]
Lloh2:
	ldr	x8, [x8]
Lloh3:
	adrp	x10, _PCIE_REG_CFG_ADDR@GOTPAGE
Lloh4:
	ldr	x10, [x10, _PCIE_REG_CFG_ADDR@GOTPAGEOFF]
Lloh5:
	adrp	x11, _PCI_REG_CFG_ADDR@GOTPAGE
Lloh6:
	ldr	x11, [x11, _PCI_REG_CFG_ADDR@GOTPAGEOFF]
	cmp	x9, x8
	csel	x8, x11, x10, eq
Lloh7:
	adrp	x9, _PCIE_REG_CFG_DATA@GOTPAGE
Lloh8:
	ldr	x9, [x9, _PCIE_REG_CFG_DATA@GOTPAGEOFF]
Lloh9:
	adrp	x10, _PCI_REG_CFG_DATA@GOTPAGE
Lloh10:
	ldr	x10, [x10, _PCI_REG_CFG_DATA@GOTPAGEOFF]
	ldr	w25, [x8]
	csel	x8, x10, x9, eq
	ldr	w21, [x8]
Lloh11:
	adrp	x8, _PCI_CFG_ENA@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PCI_CFG_ENA@GOTPAGEOFF]
Lloh13:
	ldr	w26, [x8]
	mov	x0, x1
	bl	_PCI_CFG_BUS
	orr	w26, w0, w26
	mov	x0, x24
	bl	_PCI_CFG_DEV
	orr	w24, w26, w0
	mov	x0, x23
	bl	_PCI_CFG_FUN
	orr	w23, w24, w0
	mov	x0, x19
	bl	_PCI_CFG_PCIE_REG
	orr	w23, w23, w0
Lloh14:
	adrp	x0, _pcicfg_mtx@GOTPAGE
Lloh15:
	ldr	x0, [x0, _pcicfg_mtx@GOTPAGEOFF]
	bl	_mtx_lock_spin
	ldp	w1, w0, [x20, #8]
	mov	x2, x25
	mov	x3, x23
	bl	_bus_space_write_4
	cmp	w22, #4
	b.eq	LBB0_4
; %bb.1:
	cmp	w22, #2
	b.eq	LBB0_5
; %bb.2:
	cmp	w22, #1
	b.ne	LBB0_7
; %bb.3:
	ldp	w1, w0, [x20, #8]
	and	w8, w19, #0x3
	add	w2, w21, w8
	bl	_bus_space_read_1
	b	LBB0_6
LBB0_4:
	ldp	w1, w0, [x20, #8]
	mov	x2, x21
	bl	_bus_space_read_4
	bl	_le32toh
	b	LBB0_6
LBB0_5:
	ldp	w1, w0, [x20, #8]
	and	w8, w19, #0x2
	add	w2, w21, w8
	bl	_bus_space_read_2
	bl	_le16toh
LBB0_6:
	mov	x19, x0
	b	LBB0_8
LBB0_7:
	mov	w19, #-1
LBB0_8:
Lloh16:
	adrp	x0, _pcicfg_mtx@GOTPAGE
Lloh17:
	ldr	x0, [x0, _pcicfg_mtx@GOTPAGEOFF]
	bl	_mtx_unlock_spin
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_MV_TYPE_PCI,8,3                ; @MV_TYPE_PCI
	.comm	_PCIE_REG_CFG_ADDR,4,2          ; @PCIE_REG_CFG_ADDR
	.comm	_PCI_REG_CFG_ADDR,4,2           ; @PCI_REG_CFG_ADDR
	.comm	_PCIE_REG_CFG_DATA,4,2          ; @PCIE_REG_CFG_DATA
	.comm	_PCI_REG_CFG_DATA,4,2           ; @PCI_REG_CFG_DATA
	.comm	_PCI_CFG_ENA,4,2                ; @PCI_CFG_ENA
	.comm	_pcicfg_mtx,4,2                 ; @pcicfg_mtx
	.no_dead_strip	_mv_pcib_hw_cfgread
.subsections_via_symbols
