	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pll_set_std
_pll_set_std:                           ## @pll_set_std
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r14d
	movl	%esi, %r12d
	movb	24(%rdi), %cl
	movl	$1, %eax
	movl	$1, %esi
	shll	%cl, %esi
	cmpl	%r8d, %esi
	jle	LBB0_1
## %bb.2:
	movl	%r9d, %r15d
	movq	%rdi, %rbx
	movb	28(%rdi), %cl
	shll	%cl, %eax
	cmpl	%r9d, %eax
	jle	LBB0_1
## %bb.3:
	movl	%r8d, %r13d
	movq	%rdx, -56(%rbp)                 ## 8-byte Spill
	movl	16(%rbp), %esi
	movq	%rbx, %rdi
	callq	_pdiv_to_reg
	movb	32(%rbx), %cl
	movl	$1, %edx
	shll	%cl, %edx
	cmpl	%edx, %eax
	jge	LBB0_1
## %bb.4:
	movq	_CLK_SET_DRYRUN@GOTPCREL(%rip), %rax
	testl	%r14d, (%rax)
	je	LBB0_9
## %bb.5:
	movq	_CLK_SET_ROUND_UP@GOTPCREL(%rip), %rax
	movq	_CLK_SET_ROUND_DOWN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	testl	%r14d, %ecx
	je	LBB0_7
## %bb.6:
	movl	%r12d, %eax
	cltd
	idivl	%r13d
	imull	%r15d, %eax
	cltd
	idivl	16(%rbp)
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	movl	%eax, (%rsi)
	jmp	LBB0_14
LBB0_9:
	movq	%rbx, %rdi
	callq	_pll_disable
	movq	(%rbx), %rsi
	testq	%rsi, %rsi
	je	LBB0_11
## %bb.10:
	movl	20(%rbx), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_MD4
LBB0_11:
	movl	16(%rbx), %esi
	leaq	-44(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_RD4
	movl	-44(%rbp), %edi
	movq	_PLL_BASE_DIVM_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	24(%rbx), %ecx
	movl	%r13d, %esi
	callq	_set_masked
	movl	%eax, -44(%rbp)
	movq	_PLL_BASE_DIVN_SHIFT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	28(%rbx), %ecx
	movl	%eax, %edi
	movl	%r15d, %esi
	callq	_set_masked
	movl	%eax, %r14d
	movl	%eax, -44(%rbp)
	movq	%rbx, %rdi
	movl	16(%rbp), %esi
	callq	_pdiv_to_reg
	movl	32(%rbx), %ecx
	movl	36(%rbx), %edx
	movl	%r14d, %edi
	movl	%eax, %esi
	callq	_set_masked
	movl	%eax, -44(%rbp)
	movl	16(%rbx), %esi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_WR4
	movl	16(%rbx), %esi
	movq	%rbx, %rdi
	leaq	-44(%rbp), %r14
	movq	%r14, %rdx
	callq	_RD4
	movq	_PLL_BASE_ENABLE@GOTPCREL(%rip), %rax
	movl	-44(%rbp), %edx
	orl	(%rax), %edx
	movl	%edx, -44(%rbp)
	movl	16(%rbx), %esi
	movq	%rbx, %rdi
	callq	_WR4
	movl	12(%rbx), %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_RD4
	movl	-44(%rbp), %edx
	orl	8(%rbx), %edx
	movl	%edx, -44(%rbp)
	movl	12(%rbx), %esi
	movq	%rbx, %rdi
	callq	_WR4
	movq	%rbx, %rdi
	callq	_wait_for_lock
	testl	%eax, %eax
	je	LBB0_13
## %bb.12:
	movl	%eax, %r14d
	movl	16(%rbx), %esi
	leaq	-44(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_RD4
	movq	_PLL_BASE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	-44(%rbp), %edx
	movl	%edx, -44(%rbp)
	movl	16(%rbx), %esi
	movq	%rbx, %rdi
	callq	_WR4
	jmp	LBB0_15
LBB0_7:
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	movl	(%rsi), %ecx
	movl	%r12d, %eax
	cltd
	idivl	%r13d
	imull	%r15d, %eax
	cltd
	idivl	16(%rbp)
	cmpl	%eax, %ecx
	jne	LBB0_1
## %bb.8:
	movl	%eax, (%rsi)
	jmp	LBB0_14
LBB0_1:
	movq	_ERANGE@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
LBB0_15:
	movl	%r14d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_13:
	movl	12(%rbx), %esi
	leaq	-44(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_RD4
	movq	%rbx, %rdi
	callq	_pll_enable
	movl	%r12d, %eax
	cltd
	idivl	%r13d
	imull	%r15d, %eax
	cltd
	idivl	16(%rbp)
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movl	%eax, (%rcx)
LBB0_14:
	xorl	%r14d, %r14d
	jmp	LBB0_15
	.cfi_endproc
                                        ## -- End function
	.comm	_ERANGE,4,2                     ## @ERANGE
	.comm	_CLK_SET_DRYRUN,4,2             ## @CLK_SET_DRYRUN
	.comm	_CLK_SET_ROUND_UP,4,2           ## @CLK_SET_ROUND_UP
	.comm	_CLK_SET_ROUND_DOWN,4,2         ## @CLK_SET_ROUND_DOWN
	.comm	_PLL_BASE_DIVM_SHIFT,4,2        ## @PLL_BASE_DIVM_SHIFT
	.comm	_PLL_BASE_DIVN_SHIFT,4,2        ## @PLL_BASE_DIVN_SHIFT
	.comm	_PLL_BASE_ENABLE,4,2            ## @PLL_BASE_ENABLE
	.no_dead_strip	_pll_set_std
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pll_set_std
_pll_set_std:                           ; @pll_set_std
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	ldr	w9, [x0, #24]
	mov	w8, #1
	lsl	w9, w8, w9
	cmp	w9, w4
	b.le	LBB0_12
; %bb.1:
	mov	x21, x5
	mov	x24, x0
	ldr	w9, [x0, #28]
	lsl	w8, w8, w9
	cmp	w8, w5
	b.le	LBB0_12
; %bb.2:
	mov	x20, x6
	mov	x22, x4
	mov	x25, x3
	mov	x19, x2
	mov	x23, x1
	mov	x0, x24
	mov	x1, x6
	bl	_pdiv_to_reg
	ldr	w8, [x24, #32]
	mov	w9, #1
	lsl	w8, w9, w8
	cmp	w0, w8
	b.ge	LBB0_12
; %bb.3:
Lloh0:
	adrp	x8, _CLK_SET_DRYRUN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CLK_SET_DRYRUN@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	tst	w8, w25
	b.eq	LBB0_6
; %bb.4:
Lloh3:
	adrp	x8, _CLK_SET_ROUND_UP@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CLK_SET_ROUND_UP@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _CLK_SET_ROUND_DOWN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CLK_SET_ROUND_DOWN@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
	tst	w8, w25
	b.eq	LBB0_10
; %bb.5:
	sdiv	w8, w23, w22
	mul	w8, w8, w21
	sdiv	w8, w8, w20
	mov	w25, #0
	b	LBB0_15
LBB0_6:
	mov	x0, x24
	bl	_pll_disable
	ldr	x1, [x24]
	cbz	x1, LBB0_8
; %bb.7:
	ldr	w2, [x24, #20]
	mov	x0, x24
	mov	w3, #0
	bl	_MD4
LBB0_8:
	ldr	w1, [x24, #16]
	add	x2, sp, #12
	mov	x0, x24
	bl	_RD4
	ldr	w0, [sp, #12]
Lloh9:
	adrp	x8, _PLL_BASE_DIVM_SHIFT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PLL_BASE_DIVM_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	ldr	w3, [x24, #24]
	mov	x1, x22
	bl	_set_masked
	str	w0, [sp, #12]
Lloh12:
	adrp	x8, _PLL_BASE_DIVN_SHIFT@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PLL_BASE_DIVN_SHIFT@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	ldr	w3, [x24, #28]
	mov	x1, x21
	bl	_set_masked
	mov	x25, x0
	str	w0, [sp, #12]
	mov	x0, x24
	mov	x1, x20
	bl	_pdiv_to_reg
	mov	x1, x0
	ldp	w3, w2, [x24, #32]
	mov	x0, x25
	bl	_set_masked
	mov	x2, x0
	str	w0, [sp, #12]
	ldr	w1, [x24, #16]
	mov	x0, x24
	bl	_WR4
	ldr	w1, [x24, #16]
	add	x2, sp, #12
	mov	x0, x24
	bl	_RD4
Lloh15:
	adrp	x26, _PLL_BASE_ENABLE@GOTPAGE
Lloh16:
	ldr	x26, [x26, _PLL_BASE_ENABLE@GOTPAGEOFF]
	ldr	w8, [x26]
	ldr	w9, [sp, #12]
	orr	w2, w9, w8
	str	w2, [sp, #12]
	ldr	w1, [x24, #16]
	mov	x0, x24
	bl	_WR4
	ldr	w1, [x24, #12]
	add	x2, sp, #12
	mov	x0, x24
	bl	_RD4
	ldr	w8, [sp, #12]
	ldp	w9, w1, [x24, #8]
	orr	w2, w8, w9
	str	w2, [sp, #12]
	mov	x0, x24
	bl	_WR4
	mov	x0, x24
	bl	_wait_for_lock
	mov	x25, x0
	cbz	w0, LBB0_14
; %bb.9:
	ldr	w1, [x24, #16]
	add	x2, sp, #12
	mov	x0, x24
	bl	_RD4
	ldr	w8, [x26]
	ldr	w9, [sp, #12]
	bic	w2, w9, w8
	str	w2, [sp, #12]
	ldr	w1, [x24, #16]
	mov	x0, x24
	bl	_WR4
	b	LBB0_13
LBB0_10:
	ldr	w9, [x19]
	sdiv	w8, w23, w22
	mul	w8, w8, w21
	sdiv	w8, w8, w20
	cmp	w9, w8
	b.ne	LBB0_12
; %bb.11:
	mov	w25, #0
	b	LBB0_15
LBB0_12:
Lloh17:
	adrp	x8, _ERANGE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _ERANGE@GOTPAGEOFF]
Lloh19:
	ldr	w25, [x8]
LBB0_13:
	mov	x0, x25
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_14:
	ldr	w1, [x24, #12]
	add	x2, sp, #12
	mov	x0, x24
	bl	_RD4
	mov	x0, x24
	bl	_pll_enable
	sdiv	w8, w23, w22
	mul	w8, w8, w21
	sdiv	w8, w8, w20
LBB0_15:
	str	w8, [x19]
	b	LBB0_13
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_ERANGE,4,2                     ; @ERANGE
	.comm	_CLK_SET_DRYRUN,4,2             ; @CLK_SET_DRYRUN
	.comm	_CLK_SET_ROUND_UP,4,2           ; @CLK_SET_ROUND_UP
	.comm	_CLK_SET_ROUND_DOWN,4,2         ; @CLK_SET_ROUND_DOWN
	.comm	_PLL_BASE_DIVM_SHIFT,4,2        ; @PLL_BASE_DIVM_SHIFT
	.comm	_PLL_BASE_DIVN_SHIFT,4,2        ; @PLL_BASE_DIVN_SHIFT
	.comm	_PLL_BASE_ENABLE,4,2            ; @PLL_BASE_ENABLE
	.no_dead_strip	_pll_set_std
.subsections_via_symbols
