	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function aw_mmc_update_ios
_aw_mmc_update_ios:                     ## @aw_mmc_update_ios
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_device_get_softc
	movq	%rax, %r15
	movl	$-131, %eax
	addl	32(%r15), %eax
	cmpl	$2, %eax
	ja	LBB0_2
## %bb.1:
	cltq
	leaq	l_switch.table.aw_mmc_update_ios(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	movq	_AW_MMC_BWDR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_AW_MMC_WRITE_4
LBB0_2:
	movl	36(%r15), %eax
	cmpl	$128, %eax
	je	LBB0_11
## %bb.3:
	cmpl	$130, %eax
	jne	LBB0_18
## %bb.4:
	movq	_bootverbose@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_6
## %bb.5:
	movl	16(%r15), %edi
	leaq	L_.str(%rip), %rsi
	xorl	%eax, %eax
	callq	_device_printf
LBB0_6:
	movl	28(%r15), %edi
	testl	%edi, %edi
	je	LBB0_8
## %bb.7:
	callq	_regulator_disable
LBB0_8:
	movl	24(%r15), %edi
	testl	%edi, %edi
	je	LBB0_10
## %bb.9:
	callq	_regulator_disable
LBB0_10:
	movq	%r15, %rdi
	callq	_aw_mmc_reset
	jmp	LBB0_18
LBB0_11:
	movq	_bootverbose@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_13
## %bb.12:
	movl	16(%r15), %edi
	leaq	L_.str.1(%rip), %rsi
	xorl	%eax, %eax
	callq	_device_printf
LBB0_13:
	movl	28(%r15), %edi
	testl	%edi, %edi
	je	LBB0_15
## %bb.14:
	callq	_regulator_enable
LBB0_15:
	movl	24(%r15), %edi
	testl	%edi, %edi
	je	LBB0_17
## %bb.16:
	callq	_regulator_enable
LBB0_17:
	movq	%r15, %rdi
	callq	_aw_mmc_init
LBB0_18:
	movq	_AW_MMC_GCTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_AW_MMC_READ_4
	movq	40(%r15), %rcx
	movq	_bus_timing_uhs_ddr50@GOTPCREL(%rip), %rsi
	movq	_bus_timing_mmc_ddr52@GOTPCREL(%rip), %r13
	movq	_AW_MMC_GCTL_DDR_MOD_SEL@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	movl	%edx, %edi
	orl	%eax, %edi
	notl	%edx
	andl	%eax, %edx
	cmpq	(%r13), %rcx
	cmovel	%edi, %edx
	cmpq	(%rsi), %rcx
	cmovel	%edi, %edx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_AW_MMC_WRITE_4
	movl	48(%r15), %r14d
	testl	%r14d, %r14d
	je	LBB0_38
## %bb.19:
	cmpl	(%r15), %r14d
	jne	LBB0_20
LBB0_38:
	xorl	%ebx, %ebx
	jmp	LBB0_39
LBB0_20:
	movl	%r14d, (%r15)
	xorl	%r12d, %r12d
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_aw_mmc_update_clock
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_39
## %bb.21:
	movq	40(%r15), %rax
	cmpq	(%r13), %rax
	jne	LBB0_25
## %bb.22:
	movq	8(%r15), %rax
	cmpq	$0, 8(%rax)
	jne	LBB0_24
## %bb.23:
	cmpl	$131, 32(%r15)
	jne	LBB0_25
LBB0_24:
	addl	%r14d, %r14d
	movl	$1, %r12d
LBB0_25:
	movq	_AW_MMC_CKCR@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_AW_MMC_READ_4
	movq	_AW_MMC_CKCR_DIV@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	orl	%r12d, %edx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_AW_MMC_WRITE_4
	movq	8(%r15), %rax
	cmpq	$0, 8(%rax)
	je	LBB0_27
## %bb.26:
	movq	_AW_MMC_NTSR@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_AW_MMC_READ_4
	movq	_AW_MMC_NTSR_MODE_SELECT@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	%eax, %edx
	callq	_AW_MMC_WRITE_4
LBB0_27:
	movl	20(%r15), %edi
	callq	_clk_disable
	movq	_bootverbose@GOTPCREL(%rip), %r12
	testl	%eax, %eax
	je	LBB0_30
## %bb.28:
	cmpq	$0, (%r12)
	je	LBB0_30
## %bb.29:
	movl	16(%r15), %edi
	leaq	L_.str.2(%rip), %rsi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_device_printf
LBB0_30:
	movl	20(%r15), %edi
	movq	_CLK_SET_ROUND_DOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r14d, %esi
	callq	_clk_set_freq
	testl	%eax, %eax
	je	LBB0_32
## %bb.31:
	movl	%eax, %ebx
	movl	16(%r15), %edi
	leaq	L_.str.3(%rip), %rsi
	movl	%r14d, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_device_printf
	jmp	LBB0_39
LBB0_32:
	movl	20(%r15), %edi
	callq	_clk_enable
	testl	%eax, %eax
	je	LBB0_35
## %bb.33:
	cmpq	$0, (%r12)
	je	LBB0_35
## %bb.34:
	movl	16(%r15), %edi
	leaq	L_.str.4(%rip), %rsi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_device_printf
LBB0_35:
	movq	8(%r15), %rax
	cmpq	$0, (%rax)
	je	LBB0_37
## %bb.36:
	movq	_AW_MMC_SAMP_DL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AW_MMC_SAMP_DL_SW_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_AW_MMC_WRITE_4
LBB0_37:
	movq	%r15, %rdi
	movl	$1, %esi
	callq	_aw_mmc_update_clock
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_38
LBB0_39:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AW_MMC_BWDR,4,2                ## @AW_MMC_BWDR
	.comm	_AW_MMC_BWDR1,4,2               ## @AW_MMC_BWDR1
	.comm	_AW_MMC_BWDR4,4,2               ## @AW_MMC_BWDR4
	.comm	_AW_MMC_BWDR8,4,2               ## @AW_MMC_BWDR8
	.comm	_bootverbose,8,3                ## @bootverbose
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Powering down sd/mmc\n"

L_.str.1:                               ## @.str.1
	.asciz	"Powering up sd/mmc\n"

	.comm	_AW_MMC_GCTL,4,2                ## @AW_MMC_GCTL
	.comm	_bus_timing_uhs_ddr50,8,3       ## @bus_timing_uhs_ddr50
	.comm	_bus_timing_mmc_ddr52,8,3       ## @bus_timing_mmc_ddr52
	.comm	_AW_MMC_GCTL_DDR_MOD_SEL,4,2    ## @AW_MMC_GCTL_DDR_MOD_SEL
	.comm	_AW_MMC_CKCR,4,2                ## @AW_MMC_CKCR
	.comm	_AW_MMC_CKCR_DIV,4,2            ## @AW_MMC_CKCR_DIV
	.comm	_AW_MMC_NTSR,4,2                ## @AW_MMC_NTSR
	.comm	_AW_MMC_NTSR_MODE_SELECT,4,2    ## @AW_MMC_NTSR_MODE_SELECT
L_.str.2:                               ## @.str.2
	.asciz	"failed to disable mmc clock: %d\n"

	.comm	_CLK_SET_ROUND_DOWN,4,2         ## @CLK_SET_ROUND_DOWN
L_.str.3:                               ## @.str.3
	.asciz	"failed to set frequency to %u Hz: %d\n"

L_.str.4:                               ## @.str.4
	.asciz	"failed to re-enable mmc clock: %d\n"

	.comm	_AW_MMC_SAMP_DL,4,2             ## @AW_MMC_SAMP_DL
	.comm	_AW_MMC_SAMP_DL_SW_EN,4,2       ## @AW_MMC_SAMP_DL_SW_EN
	.no_dead_strip	_aw_mmc_update_ios
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.aw_mmc_update_ios
l_switch.table.aw_mmc_update_ios:
	.quad	_AW_MMC_BWDR8
	.quad	_AW_MMC_BWDR4
	.quad	_AW_MMC_BWDR1

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function aw_mmc_update_ios
_aw_mmc_update_ios:                     ; @aw_mmc_update_ios
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_device_get_softc
	mov	x19, x0
	ldr	w8, [x0, #32]
	sub	w8, w8, #131
	cmp	w8, #2
	b.hi	LBB0_2
; %bb.1:
Lloh0:
	adrp	x9, l_switch.table.aw_mmc_update_ios@PAGE
Lloh1:
	add	x9, x9, l_switch.table.aw_mmc_update_ios@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
Lloh2:
	adrp	x9, _AW_MMC_BWDR@GOTPAGE
Lloh3:
	ldr	x9, [x9, _AW_MMC_BWDR@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x9]
	ldr	w2, [x8]
	mov	x0, x19
	bl	_AW_MMC_WRITE_4
LBB0_2:
	ldr	w8, [x19, #36]
	cmp	w8, #128
	b.eq	LBB0_11
; %bb.3:
	cmp	w8, #130
	b.ne	LBB0_18
; %bb.4:
Lloh5:
	adrp	x8, _bootverbose@GOTPAGE
Lloh6:
	ldr	x8, [x8, _bootverbose@GOTPAGEOFF]
Lloh7:
	ldr	x8, [x8]
	cbz	x8, LBB0_6
; %bb.5:
	ldr	w0, [x19, #16]
Lloh8:
	adrp	x1, l_.str@PAGE
Lloh9:
	add	x1, x1, l_.str@PAGEOFF
	bl	_device_printf
LBB0_6:
	ldr	w0, [x19, #28]
	cbz	w0, LBB0_8
; %bb.7:
	bl	_regulator_disable
LBB0_8:
	ldr	w0, [x19, #24]
	cbz	w0, LBB0_10
; %bb.9:
	bl	_regulator_disable
LBB0_10:
	mov	x0, x19
	bl	_aw_mmc_reset
	b	LBB0_18
LBB0_11:
Lloh10:
	adrp	x8, _bootverbose@GOTPAGE
Lloh11:
	ldr	x8, [x8, _bootverbose@GOTPAGEOFF]
Lloh12:
	ldr	x8, [x8]
	cbz	x8, LBB0_13
; %bb.12:
	ldr	w0, [x19, #16]
Lloh13:
	adrp	x1, l_.str.1@PAGE
Lloh14:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_device_printf
LBB0_13:
	ldr	w0, [x19, #28]
	cbz	w0, LBB0_15
; %bb.14:
	bl	_regulator_enable
LBB0_15:
	ldr	w0, [x19, #24]
	cbz	w0, LBB0_17
; %bb.16:
	bl	_regulator_enable
LBB0_17:
	mov	x0, x19
	bl	_aw_mmc_init
LBB0_18:
Lloh15:
	adrp	x20, _AW_MMC_GCTL@GOTPAGE
Lloh16:
	ldr	x20, [x20, _AW_MMC_GCTL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_AW_MMC_READ_4
	ldr	x8, [x19, #40]
Lloh17:
	adrp	x9, _bus_timing_uhs_ddr50@GOTPAGE
Lloh18:
	ldr	x9, [x9, _bus_timing_uhs_ddr50@GOTPAGEOFF]
Lloh19:
	ldr	x9, [x9]
Lloh20:
	adrp	x22, _bus_timing_mmc_ddr52@GOTPAGE
Lloh21:
	ldr	x22, [x22, _bus_timing_mmc_ddr52@GOTPAGEOFF]
	ldr	x10, [x22]
	cmp	x8, x10
Lloh22:
	adrp	x10, _AW_MMC_GCTL_DDR_MOD_SEL@GOTPAGE
Lloh23:
	ldr	x10, [x10, _AW_MMC_GCTL_DDR_MOD_SEL@GOTPAGEOFF]
	ccmp	x8, x9, #4, ne
Lloh24:
	ldr	w8, [x10]
	orr	w9, w8, w0
	bic	w8, w0, w8
	csel	w2, w9, w8, eq
	ldr	w1, [x20]
	mov	x0, x19
	bl	_AW_MMC_WRITE_4
	ldr	w20, [x19, #48]
	cbz	w20, LBB0_20
; %bb.19:
	ldr	w8, [x19]
	cmp	w20, w8
	b.ne	LBB0_21
LBB0_20:
	mov	w21, #0
	b	LBB0_40
LBB0_21:
	str	w20, [x19]
	mov	x0, x19
	mov	w1, #0
	bl	_aw_mmc_update_clock
	mov	x21, x0
	cbnz	w0, LBB0_40
; %bb.22:
	ldr	x8, [x19, #40]
	ldr	x9, [x22]
	cmp	x8, x9
	b.ne	LBB0_26
; %bb.23:
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #8]
	cbnz	x8, LBB0_25
; %bb.24:
	ldr	w8, [x19, #32]
	cmp	w8, #131
	b.ne	LBB0_26
LBB0_25:
	lsl	w20, w20, #1
	mov	w21, #1
	b	LBB0_27
LBB0_26:
	mov	w21, #0
LBB0_27:
Lloh25:
	adrp	x22, _AW_MMC_CKCR@GOTPAGE
Lloh26:
	ldr	x22, [x22, _AW_MMC_CKCR@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_AW_MMC_READ_4
Lloh27:
	adrp	x8, _AW_MMC_CKCR_DIV@GOTPAGE
Lloh28:
	ldr	x8, [x8, _AW_MMC_CKCR_DIV@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	bic	w8, w0, w8
	orr	w2, w8, w21
	ldr	w1, [x22]
	mov	x0, x19
	bl	_AW_MMC_WRITE_4
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_29
; %bb.28:
Lloh30:
	adrp	x21, _AW_MMC_NTSR@GOTPAGE
Lloh31:
	ldr	x21, [x21, _AW_MMC_NTSR@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_AW_MMC_READ_4
Lloh32:
	adrp	x8, _AW_MMC_NTSR_MODE_SELECT@GOTPAGE
Lloh33:
	ldr	x8, [x8, _AW_MMC_NTSR_MODE_SELECT@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	orr	w2, w8, w0
	ldr	w1, [x21]
	mov	x0, x19
	bl	_AW_MMC_WRITE_4
LBB0_29:
	ldr	w0, [x19, #20]
	bl	_clk_disable
                                        ; kill: def $w0 killed $w0 def $x0
Lloh35:
	adrp	x22, _bootverbose@GOTPAGE
Lloh36:
	ldr	x22, [x22, _bootverbose@GOTPAGEOFF]
	cbz	w0, LBB0_32
; %bb.30:
	ldr	x8, [x22]
	cbz	x8, LBB0_32
; %bb.31:
	ldr	w8, [x19, #16]
	str	x0, [sp]
Lloh37:
	adrp	x1, l_.str.2@PAGE
Lloh38:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x8
	bl	_device_printf
LBB0_32:
	ldr	w0, [x19, #20]
Lloh39:
	adrp	x8, _CLK_SET_ROUND_DOWN@GOTPAGE
Lloh40:
	ldr	x8, [x8, _CLK_SET_ROUND_DOWN@GOTPAGEOFF]
Lloh41:
	ldr	w2, [x8]
	mov	x1, x20
	bl	_clk_set_freq
	cbz	w0, LBB0_34
; %bb.33:
	mov	x21, x0
	ldr	w0, [x19, #16]
	stp	x20, x21, [sp]
Lloh42:
	adrp	x1, l_.str.3@PAGE
Lloh43:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_device_printf
	b	LBB0_40
LBB0_34:
	ldr	w0, [x19, #20]
	bl	_clk_enable
                                        ; kill: def $w0 killed $w0 def $x0
	cbz	w0, LBB0_37
; %bb.35:
	ldr	x8, [x22]
	cbz	x8, LBB0_37
; %bb.36:
	ldr	w8, [x19, #16]
	str	x0, [sp]
Lloh44:
	adrp	x1, l_.str.4@PAGE
Lloh45:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x8
	bl	_device_printf
LBB0_37:
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	cbz	x8, LBB0_39
; %bb.38:
Lloh46:
	adrp	x8, _AW_MMC_SAMP_DL@GOTPAGE
Lloh47:
	ldr	x8, [x8, _AW_MMC_SAMP_DL@GOTPAGEOFF]
Lloh48:
	ldr	w1, [x8]
Lloh49:
	adrp	x8, _AW_MMC_SAMP_DL_SW_EN@GOTPAGE
Lloh50:
	ldr	x8, [x8, _AW_MMC_SAMP_DL_SW_EN@GOTPAGEOFF]
Lloh51:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_AW_MMC_WRITE_4
LBB0_39:
	mov	x0, x19
	mov	w1, #1
	bl	_aw_mmc_update_clock
	mov	x21, x0
	cbz	w0, LBB0_20
LBB0_40:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpAdd	Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.cfi_endproc
                                        ; -- End function
	.comm	_AW_MMC_BWDR,4,2                ; @AW_MMC_BWDR
	.comm	_AW_MMC_BWDR1,4,2               ; @AW_MMC_BWDR1
	.comm	_AW_MMC_BWDR4,4,2               ; @AW_MMC_BWDR4
	.comm	_AW_MMC_BWDR8,4,2               ; @AW_MMC_BWDR8
	.comm	_bootverbose,8,3                ; @bootverbose
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Powering down sd/mmc\n"

l_.str.1:                               ; @.str.1
	.asciz	"Powering up sd/mmc\n"

	.comm	_AW_MMC_GCTL,4,2                ; @AW_MMC_GCTL
	.comm	_bus_timing_uhs_ddr50,8,3       ; @bus_timing_uhs_ddr50
	.comm	_bus_timing_mmc_ddr52,8,3       ; @bus_timing_mmc_ddr52
	.comm	_AW_MMC_GCTL_DDR_MOD_SEL,4,2    ; @AW_MMC_GCTL_DDR_MOD_SEL
	.comm	_AW_MMC_CKCR,4,2                ; @AW_MMC_CKCR
	.comm	_AW_MMC_CKCR_DIV,4,2            ; @AW_MMC_CKCR_DIV
	.comm	_AW_MMC_NTSR,4,2                ; @AW_MMC_NTSR
	.comm	_AW_MMC_NTSR_MODE_SELECT,4,2    ; @AW_MMC_NTSR_MODE_SELECT
l_.str.2:                               ; @.str.2
	.asciz	"failed to disable mmc clock: %d\n"

	.comm	_CLK_SET_ROUND_DOWN,4,2         ; @CLK_SET_ROUND_DOWN
l_.str.3:                               ; @.str.3
	.asciz	"failed to set frequency to %u Hz: %d\n"

l_.str.4:                               ; @.str.4
	.asciz	"failed to re-enable mmc clock: %d\n"

	.comm	_AW_MMC_SAMP_DL,4,2             ; @AW_MMC_SAMP_DL
	.comm	_AW_MMC_SAMP_DL_SW_EN,4,2       ; @AW_MMC_SAMP_DL_SW_EN
	.no_dead_strip	_aw_mmc_update_ios
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.aw_mmc_update_ios
l_switch.table.aw_mmc_update_ios:
	.quad	_AW_MMC_BWDR8
	.quad	_AW_MMC_BWDR4
	.quad	_AW_MMC_BWDR1

.subsections_via_symbols
