	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function enable_fdt_resources
_enable_fdt_resources:                  ## @enable_fdt_resources
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	40(%rdi), %edi
	callq	_hwreset_assert
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_44
LBB0_2:
	movl	32(%r14), %edi
	callq	_hwreset_assert
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_44
LBB0_4:
	movl	80(%r14), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:
	movl	%eax, %ebx
	leaq	L_.str.2(%rip), %rsi
	jmp	LBB0_44
LBB0_6:
	movl	76(%r14), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	je	LBB0_8
## %bb.7:
	movl	%eax, %ebx
	leaq	L_.str.3(%rip), %rsi
	jmp	LBB0_44
LBB0_8:
	movl	72(%r14), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	je	LBB0_10
## %bb.9:
	movl	%eax, %ebx
	leaq	L_.str.4(%rip), %rsi
	jmp	LBB0_44
LBB0_10:
	movl	68(%r14), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	je	LBB0_12
## %bb.11:
	movl	%eax, %ebx
	leaq	L_.str.5(%rip), %rsi
	jmp	LBB0_44
LBB0_12:
	movl	64(%r14), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	je	LBB0_14
## %bb.13:
	movl	%eax, %ebx
	leaq	L_.str.6(%rip), %rsi
	jmp	LBB0_44
LBB0_14:
	movl	60(%r14), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	je	LBB0_16
## %bb.15:
	movl	%eax, %ebx
	leaq	L_.str.7(%rip), %rsi
	jmp	LBB0_44
LBB0_16:
	movl	56(%r14), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	je	LBB0_18
## %bb.17:
	movl	%eax, %ebx
	leaq	L_.str.8(%rip), %rsi
	jmp	LBB0_44
LBB0_18:
	movl	52(%r14), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	je	LBB0_20
## %bb.19:
	movl	%eax, %ebx
	leaq	L_.str.9(%rip), %rsi
	jmp	LBB0_44
LBB0_20:
	movq	_TEGRA_POWERGATE_XUSBA@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_tegra_powergate_power_off
	testl	%eax, %eax
	je	LBB0_22
## %bb.21:
	movl	%eax, %ebx
	leaq	L_.str.10(%rip), %rsi
	jmp	LBB0_44
LBB0_22:
	movq	_TEGRA_POWERGATE_XUSBC@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_tegra_powergate_power_off
	testl	%eax, %eax
	je	LBB0_24
## %bb.23:
	movl	%eax, %ebx
	leaq	L_.str.11(%rip), %rsi
	jmp	LBB0_44
LBB0_24:
	movl	36(%r14), %edi
	movq	_TEGRA_XHCI_SS_HIGH_SPEED@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_clk_set_freq
	movl	48(%r14), %edi
	callq	_clk_enable
	testl	%eax, %eax
	je	LBB0_26
## %bb.25:
	movl	%eax, %ebx
	leaq	L_.str.12(%rip), %rsi
	jmp	LBB0_44
LBB0_26:
	movl	(%r12), %edi
	movl	40(%r14), %edx
	movl	44(%r14), %esi
	callq	_tegra_powergate_sequence_power_up
	testl	%eax, %eax
	je	LBB0_28
## %bb.27:
	movl	%eax, %ebx
	leaq	L_.str.13(%rip), %rsi
	jmp	LBB0_44
LBB0_28:
	movl	(%r15), %edi
	movl	32(%r14), %edx
	movl	36(%r14), %esi
	callq	_tegra_powergate_sequence_power_up
	testl	%eax, %eax
	je	LBB0_30
## %bb.29:
	movl	%eax, %ebx
	leaq	L_.str.14(%rip), %rsi
	jmp	LBB0_44
LBB0_30:
	movl	28(%r14), %edi
	callq	_clk_enable
	testl	%eax, %eax
	je	LBB0_32
## %bb.31:
	movl	%eax, %ebx
	leaq	L_.str.15(%rip), %rsi
	jmp	LBB0_44
LBB0_32:
	movl	24(%r14), %edi
	callq	_clk_enable
	testl	%eax, %eax
	je	LBB0_34
## %bb.33:
	movl	%eax, %ebx
	leaq	L_.str.16(%rip), %rsi
	jmp	LBB0_44
LBB0_34:
	movl	20(%r14), %edi
	callq	_clk_enable
	testl	%eax, %eax
	je	LBB0_36
## %bb.35:
	movl	%eax, %ebx
	leaq	L_.str.17(%rip), %rsi
	jmp	LBB0_44
LBB0_36:
	movl	16(%r14), %edi
	callq	_phy_enable
	testl	%eax, %eax
	je	LBB0_38
## %bb.37:
	movl	%eax, %ebx
	leaq	L_.str.18(%rip), %rsi
	jmp	LBB0_44
LBB0_38:
	movl	12(%r14), %edi
	callq	_phy_enable
	testl	%eax, %eax
	je	LBB0_40
## %bb.39:
	movl	%eax, %ebx
	leaq	L_.str.19(%rip), %rsi
	jmp	LBB0_44
LBB0_40:
	movl	8(%r14), %edi
	callq	_phy_enable
	testl	%eax, %eax
	je	LBB0_42
## %bb.41:
	movl	%eax, %ebx
	leaq	L_.str.20(%rip), %rsi
	jmp	LBB0_44
LBB0_42:
	movl	4(%r14), %edi
	callq	_phy_enable
	testl	%eax, %eax
	je	LBB0_46
## %bb.43:
	movl	%eax, %ebx
	leaq	L_.str.21(%rip), %rsi
LBB0_44:
	movl	(%r14), %edi
	callq	_device_printf
LBB0_45:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_46:
	xorl	%ebx, %ebx
	jmp	LBB0_45
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Cannot reset 'xusb_host' reset\n"

L_.str.1:                               ## @.str.1
	.asciz	"Cannot reset 'xusb_ss' reset\n"

L_.str.2:                               ## @.str.2
	.asciz	"Cannot enable 'avddio_pex' regulator\n"

L_.str.3:                               ## @.str.3
	.asciz	"Cannot enable 'dvddio_pex' regulator\n"

L_.str.4:                               ## @.str.4
	.asciz	"Cannot enable 'avdd_usb' regulator\n"

L_.str.5:                               ## @.str.5
	.asciz	"Cannot enable 'avdd_pll_utmip-5v' regulator\n"

L_.str.6:                               ## @.str.6
	.asciz	"Cannot enable 'avdd_pll_erefe' regulator\n"

L_.str.7:                               ## @.str.7
	.asciz	"Cannot enable 'avdd_usb_ss_pll' regulator\n"

L_.str.8:                               ## @.str.8
	.asciz	"Cannot enable 'hvdd_usb_ss' regulator\n"

L_.str.9:                               ## @.str.9
	.asciz	"Cannot enable 'hvdd_usb_ss_pll_e' regulator\n"

	.comm	_TEGRA_POWERGATE_XUSBA,4,2      ## @TEGRA_POWERGATE_XUSBA
L_.str.10:                              ## @.str.10
	.asciz	"Cannot powerdown  'xusba' domain\n"

	.comm	_TEGRA_POWERGATE_XUSBC,4,2      ## @TEGRA_POWERGATE_XUSBC
L_.str.11:                              ## @.str.11
	.asciz	"Cannot powerdown  'xusbc' domain\n"

	.comm	_TEGRA_XHCI_SS_HIGH_SPEED,4,2   ## @TEGRA_XHCI_SS_HIGH_SPEED
L_.str.12:                              ## @.str.12
	.asciz	"Cannot enable 'xusb_gate' clock\n"

L_.str.13:                              ## @.str.13
	.asciz	"Cannot powerup 'xusbc' domain\n"

L_.str.14:                              ## @.str.14
	.asciz	"Cannot powerup 'xusba' domain\n"

L_.str.15:                              ## @.str.15
	.asciz	"Cannot enable 'xusb_falcon_src' clock\n"

L_.str.16:                              ## @.str.16
	.asciz	"Cannot enable 'xusb_fs_src' clock\n"

L_.str.17:                              ## @.str.17
	.asciz	"Cannot enable 'xusb_hs_src' clock\n"

L_.str.18:                              ## @.str.18
	.asciz	"Cannot enable USB2_0 phy\n"

L_.str.19:                              ## @.str.19
	.asciz	"Cannot enable USB2_1 phy\n"

L_.str.20:                              ## @.str.20
	.asciz	"Cannot enable USB2_2 phy\n"

L_.str.21:                              ## @.str.21
	.asciz	"Cannot enable USB3_0 phy\n"

	.no_dead_strip	_enable_fdt_resources
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function enable_fdt_resources
_enable_fdt_resources:                  ; @enable_fdt_resources
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x0, #40]
	bl	_hwreset_assert
	cbz	w0, LBB0_2
; %bb.1:
	mov	x20, x0
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_44
LBB0_2:
	ldr	w0, [x19, #32]
	bl	_hwreset_assert
	cbz	w0, LBB0_4
; %bb.3:
	mov	x20, x0
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_44
LBB0_4:
	ldr	w0, [x19, #80]
	bl	_regulator_enable
	cbz	w0, LBB0_6
; %bb.5:
	mov	x20, x0
Lloh4:
	adrp	x1, l_.str.2@PAGE
Lloh5:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_44
LBB0_6:
	ldr	w0, [x19, #76]
	bl	_regulator_enable
	cbz	w0, LBB0_8
; %bb.7:
	mov	x20, x0
Lloh6:
	adrp	x1, l_.str.3@PAGE
Lloh7:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_44
LBB0_8:
	ldr	w0, [x19, #72]
	bl	_regulator_enable
	cbz	w0, LBB0_10
; %bb.9:
	mov	x20, x0
Lloh8:
	adrp	x1, l_.str.4@PAGE
Lloh9:
	add	x1, x1, l_.str.4@PAGEOFF
	b	LBB0_44
LBB0_10:
	ldr	w0, [x19, #68]
	bl	_regulator_enable
	cbz	w0, LBB0_12
; %bb.11:
	mov	x20, x0
Lloh10:
	adrp	x1, l_.str.5@PAGE
Lloh11:
	add	x1, x1, l_.str.5@PAGEOFF
	b	LBB0_44
LBB0_12:
	ldr	w0, [x19, #64]
	bl	_regulator_enable
	cbz	w0, LBB0_14
; %bb.13:
	mov	x20, x0
Lloh12:
	adrp	x1, l_.str.6@PAGE
Lloh13:
	add	x1, x1, l_.str.6@PAGEOFF
	b	LBB0_44
LBB0_14:
	ldr	w0, [x19, #60]
	bl	_regulator_enable
	cbz	w0, LBB0_16
; %bb.15:
	mov	x20, x0
Lloh14:
	adrp	x1, l_.str.7@PAGE
Lloh15:
	add	x1, x1, l_.str.7@PAGEOFF
	b	LBB0_44
LBB0_16:
	ldr	w0, [x19, #56]
	bl	_regulator_enable
	cbz	w0, LBB0_18
; %bb.17:
	mov	x20, x0
Lloh16:
	adrp	x1, l_.str.8@PAGE
Lloh17:
	add	x1, x1, l_.str.8@PAGEOFF
	b	LBB0_44
LBB0_18:
	ldr	w0, [x19, #52]
	bl	_regulator_enable
	cbz	w0, LBB0_20
; %bb.19:
	mov	x20, x0
Lloh18:
	adrp	x1, l_.str.9@PAGE
Lloh19:
	add	x1, x1, l_.str.9@PAGEOFF
	b	LBB0_44
LBB0_20:
Lloh20:
	adrp	x21, _TEGRA_POWERGATE_XUSBA@GOTPAGE
Lloh21:
	ldr	x21, [x21, _TEGRA_POWERGATE_XUSBA@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_tegra_powergate_power_off
	cbz	w0, LBB0_22
; %bb.21:
	mov	x20, x0
Lloh22:
	adrp	x1, l_.str.10@PAGE
Lloh23:
	add	x1, x1, l_.str.10@PAGEOFF
	b	LBB0_44
LBB0_22:
Lloh24:
	adrp	x22, _TEGRA_POWERGATE_XUSBC@GOTPAGE
Lloh25:
	ldr	x22, [x22, _TEGRA_POWERGATE_XUSBC@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_tegra_powergate_power_off
	cbz	w0, LBB0_24
; %bb.23:
	mov	x20, x0
Lloh26:
	adrp	x1, l_.str.11@PAGE
Lloh27:
	add	x1, x1, l_.str.11@PAGEOFF
	b	LBB0_44
LBB0_24:
	ldr	w0, [x19, #36]
Lloh28:
	adrp	x8, _TEGRA_XHCI_SS_HIGH_SPEED@GOTPAGE
Lloh29:
	ldr	x8, [x8, _TEGRA_XHCI_SS_HIGH_SPEED@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_clk_set_freq
	ldr	w0, [x19, #48]
	bl	_clk_enable
	cbz	w0, LBB0_26
; %bb.25:
	mov	x20, x0
Lloh31:
	adrp	x1, l_.str.12@PAGE
Lloh32:
	add	x1, x1, l_.str.12@PAGEOFF
	b	LBB0_44
LBB0_26:
	ldr	w0, [x22]
	ldp	w2, w1, [x19, #40]
	bl	_tegra_powergate_sequence_power_up
	cbz	w0, LBB0_28
; %bb.27:
	mov	x20, x0
Lloh33:
	adrp	x1, l_.str.13@PAGE
Lloh34:
	add	x1, x1, l_.str.13@PAGEOFF
	b	LBB0_44
LBB0_28:
	ldr	w0, [x21]
	ldp	w2, w1, [x19, #32]
	bl	_tegra_powergate_sequence_power_up
	cbz	w0, LBB0_30
; %bb.29:
	mov	x20, x0
Lloh35:
	adrp	x1, l_.str.14@PAGE
Lloh36:
	add	x1, x1, l_.str.14@PAGEOFF
	b	LBB0_44
LBB0_30:
	ldr	w0, [x19, #28]
	bl	_clk_enable
	cbz	w0, LBB0_32
; %bb.31:
	mov	x20, x0
Lloh37:
	adrp	x1, l_.str.15@PAGE
Lloh38:
	add	x1, x1, l_.str.15@PAGEOFF
	b	LBB0_44
LBB0_32:
	ldr	w0, [x19, #24]
	bl	_clk_enable
	cbz	w0, LBB0_34
; %bb.33:
	mov	x20, x0
Lloh39:
	adrp	x1, l_.str.16@PAGE
Lloh40:
	add	x1, x1, l_.str.16@PAGEOFF
	b	LBB0_44
LBB0_34:
	ldr	w0, [x19, #20]
	bl	_clk_enable
	cbz	w0, LBB0_36
; %bb.35:
	mov	x20, x0
Lloh41:
	adrp	x1, l_.str.17@PAGE
Lloh42:
	add	x1, x1, l_.str.17@PAGEOFF
	b	LBB0_44
LBB0_36:
	ldr	w0, [x19, #16]
	bl	_phy_enable
	cbz	w0, LBB0_38
; %bb.37:
	mov	x20, x0
Lloh43:
	adrp	x1, l_.str.18@PAGE
Lloh44:
	add	x1, x1, l_.str.18@PAGEOFF
	b	LBB0_44
LBB0_38:
	ldr	w0, [x19, #12]
	bl	_phy_enable
	cbz	w0, LBB0_40
; %bb.39:
	mov	x20, x0
Lloh45:
	adrp	x1, l_.str.19@PAGE
Lloh46:
	add	x1, x1, l_.str.19@PAGEOFF
	b	LBB0_44
LBB0_40:
	ldr	w0, [x19, #8]
	bl	_phy_enable
	cbz	w0, LBB0_42
; %bb.41:
	mov	x20, x0
Lloh47:
	adrp	x1, l_.str.20@PAGE
Lloh48:
	add	x1, x1, l_.str.20@PAGEOFF
	b	LBB0_44
LBB0_42:
	ldr	w0, [x19, #4]
	bl	_phy_enable
	mov	x20, x0
	cbz	w0, LBB0_45
; %bb.43:
Lloh49:
	adrp	x1, l_.str.21@PAGE
Lloh50:
	add	x1, x1, l_.str.21@PAGEOFF
LBB0_44:
	ldr	w0, [x19]
	bl	_device_printf
LBB0_45:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpAdd	Lloh31, Lloh32
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpAdd	Lloh39, Lloh40
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpAdd	Lloh43, Lloh44
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpAdd	Lloh47, Lloh48
	.loh AdrpAdd	Lloh49, Lloh50
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Cannot reset 'xusb_host' reset\n"

l_.str.1:                               ; @.str.1
	.asciz	"Cannot reset 'xusb_ss' reset\n"

l_.str.2:                               ; @.str.2
	.asciz	"Cannot enable 'avddio_pex' regulator\n"

l_.str.3:                               ; @.str.3
	.asciz	"Cannot enable 'dvddio_pex' regulator\n"

l_.str.4:                               ; @.str.4
	.asciz	"Cannot enable 'avdd_usb' regulator\n"

l_.str.5:                               ; @.str.5
	.asciz	"Cannot enable 'avdd_pll_utmip-5v' regulator\n"

l_.str.6:                               ; @.str.6
	.asciz	"Cannot enable 'avdd_pll_erefe' regulator\n"

l_.str.7:                               ; @.str.7
	.asciz	"Cannot enable 'avdd_usb_ss_pll' regulator\n"

l_.str.8:                               ; @.str.8
	.asciz	"Cannot enable 'hvdd_usb_ss' regulator\n"

l_.str.9:                               ; @.str.9
	.asciz	"Cannot enable 'hvdd_usb_ss_pll_e' regulator\n"

	.comm	_TEGRA_POWERGATE_XUSBA,4,2      ; @TEGRA_POWERGATE_XUSBA
l_.str.10:                              ; @.str.10
	.asciz	"Cannot powerdown  'xusba' domain\n"

	.comm	_TEGRA_POWERGATE_XUSBC,4,2      ; @TEGRA_POWERGATE_XUSBC
l_.str.11:                              ; @.str.11
	.asciz	"Cannot powerdown  'xusbc' domain\n"

	.comm	_TEGRA_XHCI_SS_HIGH_SPEED,4,2   ; @TEGRA_XHCI_SS_HIGH_SPEED
l_.str.12:                              ; @.str.12
	.asciz	"Cannot enable 'xusb_gate' clock\n"

l_.str.13:                              ; @.str.13
	.asciz	"Cannot powerup 'xusbc' domain\n"

l_.str.14:                              ; @.str.14
	.asciz	"Cannot powerup 'xusba' domain\n"

l_.str.15:                              ; @.str.15
	.asciz	"Cannot enable 'xusb_falcon_src' clock\n"

l_.str.16:                              ; @.str.16
	.asciz	"Cannot enable 'xusb_fs_src' clock\n"

l_.str.17:                              ; @.str.17
	.asciz	"Cannot enable 'xusb_hs_src' clock\n"

l_.str.18:                              ; @.str.18
	.asciz	"Cannot enable USB2_0 phy\n"

l_.str.19:                              ; @.str.19
	.asciz	"Cannot enable USB2_1 phy\n"

l_.str.20:                              ; @.str.20
	.asciz	"Cannot enable USB2_2 phy\n"

l_.str.21:                              ; @.str.21
	.asciz	"Cannot enable USB3_0 phy\n"

	.no_dead_strip	_enable_fdt_resources
.subsections_via_symbols
