	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_x86_emulate_cpuid              ## -- Begin function x86_emulate_cpuid
	.p2align	4, 0x90
_x86_emulate_cpuid:                     ## @x86_emulate_cpuid
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r9, -96(%rbp)                  ## 8-byte Spill
	movq	%r8, %r12
	movq	%rcx, %r15
	movq	%rdx, %r13
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movl	(%rdx), %ecx
	movl	(%r8), %r8d
	leaq	L_.str(%rip), %rdx
	callq	_VCPU_CTR2
	movq	_cpu_exthigh@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	(%r13), %edi
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	testl	%edi, %edi
	js	LBB0_6
LBB0_2:
	cmpl	$1073741824, %edi               ## imm = 0x40000000
	jl	LBB0_4
## %bb.3:
	movq	_CPUID_VM_HIGH@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_4:
	movq	_cpu_high@GOTPCREL(%rip), %rax
LBB0_5:
	movl	(%rax), %eax
LBB0_6:
	cmpl	%eax, %edi
	jle	LBB0_8
## %bb.7:
	movl	%eax, (%r13)
	movl	%eax, %edi
LBB0_8:
	leal	-128(%rdi), %eax
	cmpl	$19, %eax
	ja	LBB0_11
## %bb.9:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_10:
	movl	(%r12), %esi
	leaq	-64(%rbp), %rdx
                                        ## kill: def $edi killed $edi killed $rdi
	jmp	LBB0_22
LBB0_11:
	cmpl	$1073741824, %edi               ## imm = 0x40000000
	jne	LBB0_21
## %bb.12:
	movq	_CPUID_VM_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -64(%rbp)
	movq	_bhyve_id@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	leaq	-60(%rbp), %rsi
	movl	$4, %edx
	callq	_bcopy
	movl	(%rbx), %edi
	addl	$4, %edi
	leaq	-56(%rbp), %rsi
	movl	$4, %edx
	callq	_bcopy
	movl	(%rbx), %edi
	addl	$8, %edi
	leaq	-52(%rbp), %rsi
	movl	$4, %edx
	callq	_bcopy
	jmp	LBB0_23
LBB0_13:
	xorl	%eax, %eax
	callq	_vmm_is_amd
	testl	%eax, %eax
	je	LBB0_21
## %bb.14:
	movq	_cpu_id@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_CPUID_TO_FAMILY
	cmpl	$22, %eax
	jl	LBB0_21
## %bb.15:
	leaq	-72(%rbp), %rsi
	leaq	-68(%rbp), %rdx
	leaq	-44(%rbp), %rcx
	leaq	-76(%rbp), %r8
	movq	%rbx, %rdi
	callq	_vm_get_topology
	movl	%r14d, -64(%rbp)
	movl	-44(%rbp), %esi
	decl	%esi
	movl	$255, %edi
	callq	_MIN
	movl	%eax, -44(%rbp)
	leal	1(%rax), %edi
	movl	%eax, %ebx
	shll	$8, %ebx
	callq	_log2
	movl	%eax, %ecx
	sarl	%cl, %r14d
	orl	%ebx, %r14d
	movl	%r14d, -60(%rbp)
	movq	$0, -56(%rbp)
	jmp	LBB0_23
LBB0_16:
	xorl	%r14d, %r14d
	xorl	%eax, %eax
	callq	_vmm_is_amd
	testl	%eax, %eax
	je	LBB0_21
## %bb.17:
	leaq	-72(%rbp), %rsi
	leaq	-68(%rbp), %rdx
	leaq	-44(%rbp), %rcx
	leaq	-76(%rbp), %r8
	movq	%rbx, %rdi
	callq	_vm_get_topology
	movl	(%r12), %eax
	cmpl	$2, %eax
	je	LBB0_63
## %bb.18:
	cmpl	$1, %eax
	je	LBB0_64
## %bb.19:
	movl	$0, %ecx
	movl	$0, %ebx
	movl	$0, %esi
	testl	%eax, %eax
	jne	LBB0_66
## %bb.20:
	movl	$1, %ebx
	movb	$1, %cl
	movl	$32, %r14d
	jmp	LBB0_65
LBB0_21:
	movq	_bhyve_xcpuids@GOTPCREL(%rip), %rdi
	movl	$1, %esi
	callq	_atomic_add_long
	movl	(%r13), %edi
	movl	(%r12), %esi
	leaq	-64(%rbp), %rdx
LBB0_22:
	callq	_cpuid_count
LBB0_23:
	movl	-64(%rbp), %eax
	movl	%eax, (%r13)
	movl	-60(%rbp), %eax
	movl	%eax, (%r15)
	movl	-56(%rbp), %eax
	movl	%eax, (%r12)
	movl	-52(%rbp), %eax
	movq	-96(%rbp), %rcx                 ## 8-byte Reload
	movl	%eax, (%rcx)
	movl	$1, %eax
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_24:
	movl	(%r12), %esi
	leaq	-64(%rbp), %rdx
	movl	$130, %edi
	callq	_cpuid_count
	xorl	%r14d, %r14d
	xorl	%eax, %eax
	callq	_vmm_is_amd
	testl	%eax, %eax
	je	LBB0_23
## %bb.25:
	movq	_AMDFEID_CLZERO@GOTPCREL(%rip), %rax
	movq	_AMDFEID_IRPERF@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_AMDFEID_XSAVEERPTR@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	andl	%ecx, -60(%rbp)
	leaq	-72(%rbp), %rsi
	leaq	-68(%rbp), %rdx
	leaq	-44(%rbp), %rcx
	leaq	-76(%rbp), %r8
	movq	%rbx, %rdi
	callq	_vm_get_topology
	movl	-68(%rbp), %edi
	imull	-44(%rbp), %edi
	callq	_log2
	movl	$15, %edi
	movl	%eax, %esi
	callq	_MIN
	cmpl	$4, %eax
	cmovgel	%eax, %r14d
	movl	-68(%rbp), %esi
	imull	-44(%rbp), %esi
	decl	%esi
	movl	$255, %edi
	callq	_MIN
	movq	_AMDID_COREID_SIZE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r14d
	orl	%eax, %r14d
	movl	%r14d, -56(%rbp)
	jmp	LBB0_23
LBB0_26:
	pxor	%xmm0, %xmm0
	movdqa	%xmm0, -64(%rbp)
	movq	_tsc_is_invariant@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	je	LBB0_23
## %bb.27:
	movq	_smp_tsc@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	je	LBB0_23
## %bb.28:
	movq	_AMDPM_TSC_INVARIANT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)
	jmp	LBB0_23
LBB0_29:
	movl	(%r12), %esi
	leaq	-64(%rbp), %rdx
	movl	$136, %edi
	callq	_cpuid_count
	movq	_AMDID2_SVM@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_AMDID2_PCXC@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_AMDID2_PNXC@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_AMDID2_PTSCEL2I@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_AMDID2_IBS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_AMDID2_NODE_ID@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_AMDID2_OSVW@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_AMDID2_MWAITX@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	notl	%eax
	andl	%eax, -56(%rbp)
	movq	_AMDID_RDTSCP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, -52(%rbp)
	jmp	LBB0_23
LBB0_30:
	xorl	%eax, %eax
	callq	_vmm_get_xsave_limits
	cmpl	$0, 8(%rax)
	je	LBB0_62
## %bb.31:
	movq	%rax, %rbx
	movl	(%r13), %edi
	movl	(%r12), %esi
	leaq	-64(%rbp), %rdx
	callq	_cpuid_count
	movl	(%r12), %ecx
	cmpq	$1, %rcx
	je	LBB0_60
## %bb.32:
	testl	%ecx, %ecx
	jne	LBB0_61
## %bb.33:
	movl	(%rbx), %eax
	andl	%eax, -64(%rbp)
	movl	4(%rbx), %eax
	movl	%eax, -56(%rbp)
	jmp	LBB0_23
LBB0_34:
	xorl	%eax, %eax
	callq	_vmm_is_intel
	testl	%eax, %eax
	je	LBB0_62
## %bb.35:
	leaq	-72(%rbp), %rsi
	leaq	-68(%rbp), %rdx
	leaq	-44(%rbp), %rcx
	leaq	-76(%rbp), %r8
	movq	%rbx, %rdi
	callq	_vm_get_topology
	movl	(%r12), %edx
                                        ## implicit-def: $ecx
                                        ## implicit-def: $eax
                                        ## implicit-def: $ebx
	testl	%edx, %edx
	jne	LBB0_37
## %bb.36:
	movl	-44(%rbp), %ebx
	movl	%ebx, %edi
	callq	_log2
	movq	_CPUID_TYPE_SMT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	(%r12), %edx
LBB0_37:
	cmpl	$1, %edx
	jne	LBB0_39
## %bb.38:
	movl	-68(%rbp), %ebx
	imull	-44(%rbp), %ebx
	movl	%ebx, %edi
	callq	_log2
	movq	_CPUID_TYPE_CORE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_39:
	movq	_cpuid_leaf_b@GOTPCREL(%rip), %rdx
	cmpl	$0, (%rdx)
	movl	(%r12), %edx
	je	LBB0_41
## %bb.40:
	cmpl	$2, %edx
	jl	LBB0_42
LBB0_41:
	xorl	%ecx, %ecx
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	xorl	%ebx, %ebx
LBB0_42:
	andl	$31, %eax
	movl	%eax, -64(%rbp)
	movzwl	%bx, %eax
	movl	%eax, -60(%rbp)
	shll	$8, %ecx
	movzbl	%dl, %eax
	orl	%ecx, %eax
	movl	%eax, -56(%rbp)
	movl	%r14d, -52(%rbp)
	jmp	LBB0_23
LBB0_43:
	pxor	%xmm0, %xmm0
	movdqa	%xmm0, -64(%rbp)
	cmpl	$0, (%r12)
	jne	LBB0_23
## %bb.44:
	leaq	-64(%rbp), %rdx
	movl	$141, %edi
	xorl	%esi, %esi
	callq	_cpuid_count
	movq	_CPUID_STDEXT_FSGSBASE@GOTPCREL(%rip), %rcx
	movq	_CPUID_STDEXT_BMI1@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	(%rcx), %eax
	movq	_CPUID_STDEXT_HLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_CPUID_STDEXT_AVX2@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_CPUID_STDEXT_BMI2@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_CPUID_STDEXT_ERMS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_CPUID_STDEXT_RTM@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_CPUID_STDEXT_AVX512F@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_CPUID_STDEXT_RDSEED@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_CPUID_STDEXT_AVX512PF@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_CPUID_STDEXT_AVX512ER@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_CPUID_STDEXT_AVX512CD@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_CPUID_STDEXT_SHA@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	$0, -64(%rbp)
	andl	%eax, -60(%rbp)
	movl	$0, -56(%rbp)
	movq	_CPUID_STDEXT3_MD_CLEAR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%eax, -52(%rbp)
	movq	_VM_CAP_ENABLE_INVPCID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-80(%rbp), %rcx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_vm_get_capability
	testl	%eax, %eax
	jne	LBB0_23
## %bb.45:
	cmpl	$0, -80(%rbp)
	je	LBB0_23
## %bb.46:
	movq	_CPUID_STDEXT_INVPCID@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -60(%rbp)
	jmp	LBB0_23
LBB0_47:
	movq	_CPUTPM1_ARAT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -64(%rbp)
LBB0_48:
	movq	$0, -60(%rbp)
	movl	$0, -52(%rbp)
	jmp	LBB0_23
LBB0_49:
	movl	(%r12), %esi
	leaq	-64(%rbp), %rdx
	movl	$143, %edi
	callq	_cpuid_count
	movdqa	-64(%rbp), %xmm0
	ptest	%xmm0, %xmm0
	je	LBB0_23
## %bb.50:
	leaq	-72(%rbp), %rsi
	leaq	-68(%rbp), %rdx
	leaq	-44(%rbp), %rcx
	leaq	-76(%rbp), %r8
	movq	%rbx, %rdi
	callq	_vm_get_topology
	movl	-64(%rbp), %eax
	movl	%eax, %ecx
	andl	$1023, %ecx                     ## imm = 0x3FF
	movl	-68(%rbp), %edx
	movl	%edx, %esi
	shll	$26, %esi
	andl	$224, %eax
	shll	$14, %edx
	cmpl	$65, %eax
	movl	$16384, %eax                    ## imm = 0x4000
	cmovael	%edx, %eax
	imull	-44(%rbp), %eax
	addl	%esi, %ecx
	addl	$-67108864, %ecx                ## imm = 0xFC000000
	addl	$-16384, %eax                   ## imm = 0xC000
	orl	%ecx, %eax
	movl	%eax, -64(%rbp)
	jmp	LBB0_23
LBB0_51:
	leaq	-64(%rbp), %rsi
	movl	$1, %edi
	callq	_do_cpuid
	leaq	-88(%rbp), %rdx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_vm_get_x2apic_state
	testl	%eax, %eax
	je	LBB0_53
## %bb.52:
	leaq	L_.str.1(%rip), %rdi
	movl	%eax, %esi
	callq	_panic
LBB0_53:
	movq	_CPUID_LOCAL_APIC_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	-60(%rbp), %edx
	movq	_CPUID_0000_0001_APICID_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r14d, %esi
	shll	%cl, %esi
	movq	_CPUID2_VMX@GOTPCREL(%rip), %rcx
	movq	_CPUID2_EST@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	(%rcx), %eax
	movq	_CPUID2_TM2@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	orl	%edx, %esi
	movq	_CPUID2_SMX@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%esi, -60(%rbp)
	notl	%eax
	andl	-56(%rbp), %eax
	movq	_CPUID2_HV@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	-88(%rbp), %ecx
	movq	_X2APIC_DISABLED@GOTPCREL(%rip), %rdx
	movq	_CPUID2_X2APIC@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	movl	%esi, %edi
	notl	%edi
	andl	%eax, %edi
	orl	%esi, %eax
	cmpl	(%rdx), %ecx
	cmovel	%edi, %eax
	movq	_CPUID2_OSXSAVE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, %edx
	andl	%eax, %edx
	movq	_CPUID2_XSAVE@GOTPCREL(%rip), %rsi
	movl	(%rsi), %r8d
	movl	%r8d, %edi
	notl	%edi
	xorl	%esi, %esi
	negl	%edx
	sbbl	%esi, %esi
	orl	%edi, %esi
	notl	%ecx
	andl	%eax, %ecx
	andl	%esi, %ecx
	movl	%ecx, -56(%rbp)
	testl	%ecx, %r8d
	je	LBB0_59
## %bb.54:
	movq	_VM_REG_GUEST_CR4@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-80(%rbp), %rcx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_vm_get_register
	testl	%eax, %eax
	je	LBB0_56
## %bb.55:
	leaq	L_.str.2(%rip), %rdi
	movl	%eax, %esi
	callq	_panic
LBB0_56:
	movq	_CR4_XSAVE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, -80(%rbp)
	movq	_CPUID2_OSXSAVE@GOTPCREL(%rip), %rax
	je	LBB0_58
## %bb.57:
	movl	-56(%rbp), %ecx
	orl	(%rax), %ecx
	jmp	LBB0_59
LBB0_58:
	movl	-56(%rbp), %ecx
LBB0_59:
	movq	_CPUID2_MON@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_CPUID2_PDCM@GOTPCREL(%rip), %rdx
	orl	(%rdx), %eax
	movq	_CPUID2_TSCDLT@GOTPCREL(%rip), %rdx
	orl	(%rdx), %eax
	notl	%eax
	andl	%ecx, %eax
	movl	%eax, -56(%rbp)
	movq	_CPUID_ACPI@GOTPCREL(%rip), %rax
	movq	_CPUID_TM@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_CPUID_DS@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	notl	%ecx
	andl	-52(%rbp), %ecx
	movq	_CPUID_MCA@GOTPCREL(%rip), %rax
	movq	_CPUID_MCE@GOTPCREL(%rip), %rdx
	orl	(%rax), %ecx
	orl	(%rdx), %ecx
	movq	_CPUID_MTRR@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	%ecx, -52(%rbp)
	leaq	-72(%rbp), %rsi
	leaq	-68(%rbp), %rdx
	leaq	-44(%rbp), %rcx
	leaq	-76(%rbp), %r8
	movq	%rbx, %rdi
	callq	_vm_get_topology
	movq	_CPUID_HTT_CORES@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	-60(%rbp), %eax
	movl	-44(%rbp), %ecx
	imull	-68(%rbp), %ecx
	movzbl	%cl, %ecx
	shll	$16, %ecx
	orl	%eax, %ecx
	movl	%ecx, -60(%rbp)
	movq	_CPUID_HTT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -52(%rbp)
	jmp	LBB0_23
LBB0_60:
	movq	_CPUID_EXTSTATE_XSAVEOPT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%eax, -64(%rbp)
	jmp	LBB0_48
LBB0_61:
	movl	$1, %eax
                                        ## kill: def $cl killed $cl killed $rcx
	shlq	%cl, %rax
	testl	%eax, (%rbx)
	jne	LBB0_23
LBB0_62:
	pxor	%xmm0, %xmm0
	movdqa	%xmm0, -64(%rbp)
	jmp	LBB0_23
LBB0_63:
	movl	-68(%rbp), %esi
	imull	-44(%rbp), %esi
	movl	$3, %ebx
	movb	$1, %cl
	movl	$96, %r14d
	jmp	LBB0_66
LBB0_64:
	movl	$3, %ebx
	movb	$1, %cl
	movl	$64, %r14d
LBB0_65:
	movl	-44(%rbp), %esi
LBB0_66:
	movl	%ecx, -84(%rbp)                 ## 4-byte Spill
	decl	%esi
	movl	$4095, %edi                     ## imm = 0xFFF
	callq	_MIN
	shll	$14, %eax
	orl	%r14d, %eax
	orl	%ebx, %eax
	orl	$256, %eax                      ## imm = 0x100
	movl	%eax, -64(%rbp)
	movq	_CACHE_LINE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	decl	%eax
	xorl	%ecx, %ecx
	cmpb	$0, -84(%rbp)                   ## 1-byte Folded Reload
	cmovnel	%eax, %ecx
	movl	%ecx, -60(%rbp)
	movq	$0, -56(%rbp)
	jmp	LBB0_23
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_24, LBB0_24-LJTI0_0
.set L0_0_set_26, LBB0_26-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_29, LBB0_29-LJTI0_0
.set L0_0_set_30, LBB0_30-LJTI0_0
.set L0_0_set_34, LBB0_34-LJTI0_0
.set L0_0_set_62, LBB0_62-LJTI0_0
.set L0_0_set_43, LBB0_43-LJTI0_0
.set L0_0_set_47, LBB0_47-LJTI0_0
.set L0_0_set_49, LBB0_49-LJTI0_0
.set L0_0_set_51, LBB0_51-LJTI0_0
LJTI0_0:
	.long	L0_0_set_13
	.long	L0_0_set_16
	.long	L0_0_set_24
	.long	L0_0_set_26
	.long	L0_0_set_10
	.long	L0_0_set_10
	.long	L0_0_set_10
	.long	L0_0_set_10
	.long	L0_0_set_29
	.long	L0_0_set_10
	.long	L0_0_set_30
	.long	L0_0_set_34
	.long	L0_0_set_62
	.long	L0_0_set_43
	.long	L0_0_set_47
	.long	L0_0_set_49
	.long	L0_0_set_10
	.long	L0_0_set_10
	.long	L0_0_set_51
	.long	L0_0_set_10
	.end_data_region
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"cpuid %#x,%#x"

	.comm	_cpu_exthigh,4,2                ## @cpu_exthigh
	.comm	_CPUID_VM_HIGH,4,2              ## @CPUID_VM_HIGH
	.comm	_cpu_high,4,2                   ## @cpu_high
	.comm	_AMDFEID_CLZERO,4,2             ## @AMDFEID_CLZERO
	.comm	_AMDFEID_IRPERF,4,2             ## @AMDFEID_IRPERF
	.comm	_AMDFEID_XSAVEERPTR,4,2         ## @AMDFEID_XSAVEERPTR
	.comm	_AMDID_COREID_SIZE_SHIFT,4,2    ## @AMDID_COREID_SIZE_SHIFT
	.comm	_AMDID2_SVM,4,2                 ## @AMDID2_SVM
	.comm	_AMDID2_PCXC,4,2                ## @AMDID2_PCXC
	.comm	_AMDID2_PNXC,4,2                ## @AMDID2_PNXC
	.comm	_AMDID2_PTSCEL2I,4,2            ## @AMDID2_PTSCEL2I
	.comm	_AMDID2_IBS,4,2                 ## @AMDID2_IBS
	.comm	_AMDID2_NODE_ID,4,2             ## @AMDID2_NODE_ID
	.comm	_AMDID2_OSVW,4,2                ## @AMDID2_OSVW
	.comm	_AMDID2_MWAITX,4,2              ## @AMDID2_MWAITX
	.comm	_AMDID_RDTSCP,4,2               ## @AMDID_RDTSCP
	.comm	_tsc_is_invariant,4,2           ## @tsc_is_invariant
	.comm	_smp_tsc,4,2                    ## @smp_tsc
	.comm	_AMDPM_TSC_INVARIANT,4,2        ## @AMDPM_TSC_INVARIANT
	.comm	_CACHE_LINE_SIZE,4,2            ## @CACHE_LINE_SIZE
	.comm	_cpu_id,4,2                     ## @cpu_id
L_.str.1:                               ## @.str.1
	.asciz	"x86_emulate_cpuid: error %d fetching x2apic state"

	.comm	_CPUID_LOCAL_APIC_ID,4,2        ## @CPUID_LOCAL_APIC_ID
	.comm	_CPUID_0000_0001_APICID_SHIFT,4,2 ## @CPUID_0000_0001_APICID_SHIFT
	.comm	_CPUID2_VMX,4,2                 ## @CPUID2_VMX
	.comm	_CPUID2_EST,4,2                 ## @CPUID2_EST
	.comm	_CPUID2_TM2,4,2                 ## @CPUID2_TM2
	.comm	_CPUID2_SMX,4,2                 ## @CPUID2_SMX
	.comm	_CPUID2_HV,4,2                  ## @CPUID2_HV
	.comm	_X2APIC_DISABLED,4,2            ## @X2APIC_DISABLED
	.comm	_CPUID2_X2APIC,4,2              ## @CPUID2_X2APIC
	.comm	_CPUID2_OSXSAVE,4,2             ## @CPUID2_OSXSAVE
	.comm	_CPUID2_XSAVE,4,2               ## @CPUID2_XSAVE
	.comm	_VM_REG_GUEST_CR4,4,2           ## @VM_REG_GUEST_CR4
L_.str.2:                               ## @.str.2
	.asciz	"x86_emulate_cpuid: error %d fetching %%cr4"

	.comm	_CR4_XSAVE,4,2                  ## @CR4_XSAVE
	.comm	_CPUID2_MON,4,2                 ## @CPUID2_MON
	.comm	_CPUID2_PDCM,4,2                ## @CPUID2_PDCM
	.comm	_CPUID2_TSCDLT,4,2              ## @CPUID2_TSCDLT
	.comm	_CPUID_ACPI,4,2                 ## @CPUID_ACPI
	.comm	_CPUID_TM,4,2                   ## @CPUID_TM
	.comm	_CPUID_DS,4,2                   ## @CPUID_DS
	.comm	_CPUID_MCA,4,2                  ## @CPUID_MCA
	.comm	_CPUID_MCE,4,2                  ## @CPUID_MCE
	.comm	_CPUID_MTRR,4,2                 ## @CPUID_MTRR
	.comm	_CPUID_HTT_CORES,4,2            ## @CPUID_HTT_CORES
	.comm	_CPUID_HTT,4,2                  ## @CPUID_HTT
	.comm	_CPUID_STDEXT_FSGSBASE,4,2      ## @CPUID_STDEXT_FSGSBASE
	.comm	_CPUID_STDEXT_BMI1,4,2          ## @CPUID_STDEXT_BMI1
	.comm	_CPUID_STDEXT_HLE,4,2           ## @CPUID_STDEXT_HLE
	.comm	_CPUID_STDEXT_AVX2,4,2          ## @CPUID_STDEXT_AVX2
	.comm	_CPUID_STDEXT_BMI2,4,2          ## @CPUID_STDEXT_BMI2
	.comm	_CPUID_STDEXT_ERMS,4,2          ## @CPUID_STDEXT_ERMS
	.comm	_CPUID_STDEXT_RTM,4,2           ## @CPUID_STDEXT_RTM
	.comm	_CPUID_STDEXT_AVX512F,4,2       ## @CPUID_STDEXT_AVX512F
	.comm	_CPUID_STDEXT_RDSEED,4,2        ## @CPUID_STDEXT_RDSEED
	.comm	_CPUID_STDEXT_AVX512PF,4,2      ## @CPUID_STDEXT_AVX512PF
	.comm	_CPUID_STDEXT_AVX512ER,4,2      ## @CPUID_STDEXT_AVX512ER
	.comm	_CPUID_STDEXT_AVX512CD,4,2      ## @CPUID_STDEXT_AVX512CD
	.comm	_CPUID_STDEXT_SHA,4,2           ## @CPUID_STDEXT_SHA
	.comm	_CPUID_STDEXT3_MD_CLEAR,4,2     ## @CPUID_STDEXT3_MD_CLEAR
	.comm	_VM_CAP_ENABLE_INVPCID,4,2      ## @VM_CAP_ENABLE_INVPCID
	.comm	_CPUID_STDEXT_INVPCID,4,2       ## @CPUID_STDEXT_INVPCID
	.comm	_CPUTPM1_ARAT,4,2               ## @CPUTPM1_ARAT
	.comm	_CPUID_TYPE_SMT,4,2             ## @CPUID_TYPE_SMT
	.comm	_CPUID_TYPE_CORE,4,2            ## @CPUID_TYPE_CORE
	.comm	_cpuid_leaf_b,4,2               ## @cpuid_leaf_b
	.comm	_CPUID_EXTSTATE_XSAVEOPT,4,2    ## @CPUID_EXTSTATE_XSAVEOPT
	.comm	_bhyve_id,4,2                   ## @bhyve_id
	.comm	_bhyve_xcpuids,4,2              ## @bhyve_xcpuids
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_x86_emulate_cpuid              ; -- Begin function x86_emulate_cpuid
	.p2align	2
_x86_emulate_cpuid:                     ; @x86_emulate_cpuid
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x5
	mov	x20, x4
	mov	x21, x3
	mov	x22, x2
	mov	x24, x1
	mov	x23, x0
	ldr	w3, [x2]
	ldr	w4, [x4]
Lloh0:
	adrp	x2, l_.str@PAGE
Lloh1:
	add	x2, x2, l_.str@PAGEOFF
	bl	_VCPU_CTR2
Lloh2:
	adrp	x8, _cpu_exthigh@GOTPAGE
Lloh3:
	ldr	x8, [x8, _cpu_exthigh@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	ldr	w0, [x22]
	cbz	w8, LBB0_2
; %bb.1:
	tbnz	w0, #31, LBB0_6
LBB0_2:
	mov	w8, #1073741824
	cmp	w0, w8
	b.lt	LBB0_4
; %bb.3:
Lloh5:
	adrp	x8, _CPUID_VM_HIGH@GOTPAGE
Lloh6:
	ldr	x8, [x8, _CPUID_VM_HIGH@GOTPAGEOFF]
	b	LBB0_5
LBB0_4:
Lloh7:
	adrp	x8, _cpu_high@GOTPAGE
Lloh8:
	ldr	x8, [x8, _cpu_high@GOTPAGEOFF]
LBB0_5:
	ldr	w8, [x8]
LBB0_6:
	cmp	w0, w8
	b.le	LBB0_8
; %bb.7:
	str	w8, [x22]
	mov	x0, x8
LBB0_8:
	sub	w8, w0, #128
	cmp	w8, #19
	b.hi	LBB0_13
; %bb.9:
Lloh9:
	adrp	x9, lJTI0_0@PAGE
Lloh10:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_10
	ldrh	w11, [x9, x8, lsl #1]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_10:
	bl	_vmm_is_amd
	cbz	w0, LBB0_20
; %bb.11:
Lloh11:
	adrp	x8, _cpu_id@GOTPAGE
Lloh12:
	ldr	x8, [x8, _cpu_id@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	bl	_CPUID_TO_FAMILY
	cmp	w0, #22
	b.lt	LBB0_20
; %bb.12:
	add	x1, sp, #16
	add	x2, sp, #24
	add	x3, sp, #12
	add	x4, sp, #20
	mov	x0, x23
	bl	_vm_get_topology
	str	w24, [sp, #32]
	ldr	w8, [sp, #12]
	sub	w1, w8, #1
	mov	w0, #255
	bl	_MIN
	mov	x23, x0
	str	w23, [sp, #12]
	add	w0, w23, #1
	bl	_log2
	asr	w8, w24, w0
	str	xzr, [sp, #40]
	orr	w8, w8, w23, lsl #8
	str	w8, [sp, #36]
	b	LBB0_22
LBB0_13:
	mov	w8, #1073741824
	cmp	w0, w8
	b.ne	LBB0_20
; %bb.14:
Lloh14:
	adrp	x8, _CPUID_VM_HIGH@GOTPAGE
Lloh15:
	ldr	x8, [x8, _CPUID_VM_HIGH@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	str	w8, [sp, #32]
Lloh17:
	adrp	x23, _bhyve_id@GOTPAGE
Lloh18:
	ldr	x23, [x23, _bhyve_id@GOTPAGEOFF]
	ldr	w0, [x23]
	add	x24, sp, #32
	orr	x1, x24, #0x4
	mov	w2, #4
	bl	_bcopy
	ldr	w8, [x23]
	add	w0, w8, #4
	orr	x1, x24, #0x8
	mov	w2, #4
	bl	_bcopy
	ldr	w8, [x23]
	add	w0, w8, #8
	orr	x1, x24, #0xc
	mov	w2, #4
	bl	_bcopy
	b	LBB0_22
LBB0_15:
	bl	_vmm_is_amd
	cbz	w0, LBB0_20
; %bb.16:
	add	x1, sp, #16
	add	x2, sp, #24
	add	x3, sp, #12
	add	x4, sp, #20
	mov	x0, x23
	bl	_vm_get_topology
	ldr	w8, [x20]
	cmp	w8, #2
	b.eq	LBB0_62
; %bb.17:
	cmp	w8, #1
	b.eq	LBB0_63
; %bb.18:
	cbnz	w8, LBB0_64
; %bb.19:
	mov	w23, #1
	mov	w24, #32
	ldr	w8, [sp, #12]
	mov	w25, #1
	b	LBB0_65
LBB0_20:
Lloh19:
	adrp	x0, _bhyve_xcpuids@GOTPAGE
Lloh20:
	ldr	x0, [x0, _bhyve_xcpuids@GOTPAGEOFF]
	mov	w1, #1
	bl	_atomic_add_long
	ldr	w0, [x22]
LBB0_21:
	ldr	w1, [x20]
	add	x2, sp, #32
	bl	_cpuid_count
LBB0_22:
	ldp	w8, w9, [sp, #32]
	str	w8, [x22]
	str	w9, [x21]
	ldp	w8, w9, [sp, #40]
	str	w8, [x20]
	str	w9, [x19]
	mov	w0, #1
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
LBB0_23:
	ldr	w1, [x20]
	add	x2, sp, #32
	mov	w0, #130
	bl	_cpuid_count
	bl	_vmm_is_amd
	cbz	w0, LBB0_22
; %bb.24:
Lloh21:
	adrp	x8, _AMDFEID_CLZERO@GOTPAGE
Lloh22:
	ldr	x8, [x8, _AMDFEID_CLZERO@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
Lloh24:
	adrp	x9, _AMDFEID_IRPERF@GOTPAGE
Lloh25:
	ldr	x9, [x9, _AMDFEID_IRPERF@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
Lloh27:
	adrp	x10, _AMDFEID_XSAVEERPTR@GOTPAGE
Lloh28:
	ldr	x10, [x10, _AMDFEID_XSAVEERPTR@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh29:
	ldr	w9, [x10]
	orr	w8, w8, w9
	ldr	w9, [sp, #36]
	and	w8, w9, w8
	str	w8, [sp, #36]
	add	x1, sp, #16
	add	x2, sp, #24
	add	x3, sp, #12
	add	x4, sp, #20
	mov	x0, x23
	bl	_vm_get_topology
	ldr	w8, [sp, #12]
	ldr	w9, [sp, #24]
	mul	w0, w9, w8
	bl	_log2
	mov	x1, x0
	mov	w0, #15
	bl	_MIN
	cmp	w0, #4
	csel	w23, wzr, w0, lt
	ldr	w8, [sp, #12]
	ldr	w9, [sp, #24]
	mul	w8, w9, w8
	sub	w1, w8, #1
	mov	w0, #255
	bl	_MIN
Lloh30:
	adrp	x8, _AMDID_COREID_SIZE_SHIFT@GOTPAGE
Lloh31:
	ldr	x8, [x8, _AMDID_COREID_SIZE_SHIFT@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	lsl	w8, w23, w8
	orr	w8, w8, w0
	str	w8, [sp, #40]
	b	LBB0_22
LBB0_25:
	stp	xzr, xzr, [sp, #32]
Lloh33:
	adrp	x8, _tsc_is_invariant@GOTPAGE
Lloh34:
	ldr	x8, [x8, _tsc_is_invariant@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
Lloh36:
	adrp	x9, _smp_tsc@GOTPAGE
Lloh37:
	ldr	x9, [x9, _smp_tsc@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	cmp	w8, #0
	ccmp	w9, #0, #4, ne
	b.eq	LBB0_22
; %bb.26:
Lloh39:
	adrp	x8, _AMDPM_TSC_INVARIANT@GOTPAGE
Lloh40:
	ldr	x8, [x8, _AMDPM_TSC_INVARIANT@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	str	w8, [sp, #44]
	b	LBB0_22
LBB0_27:
	ldr	w1, [x20]
	add	x2, sp, #32
	mov	w0, #136
	bl	_cpuid_count
Lloh42:
	adrp	x8, _AMDID2_SVM@GOTPAGE
Lloh43:
	ldr	x8, [x8, _AMDID2_SVM@GOTPAGEOFF]
Lloh44:
	ldr	w8, [x8]
Lloh45:
	adrp	x9, _AMDID2_PCXC@GOTPAGE
Lloh46:
	ldr	x9, [x9, _AMDID2_PCXC@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh48:
	adrp	x9, _AMDID2_PNXC@GOTPAGE
Lloh49:
	ldr	x9, [x9, _AMDID2_PNXC@GOTPAGEOFF]
Lloh50:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh51:
	adrp	x9, _AMDID2_PTSCEL2I@GOTPAGE
Lloh52:
	ldr	x9, [x9, _AMDID2_PTSCEL2I@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh54:
	adrp	x9, _AMDID2_IBS@GOTPAGE
Lloh55:
	ldr	x9, [x9, _AMDID2_IBS@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh57:
	adrp	x9, _AMDID2_NODE_ID@GOTPAGE
Lloh58:
	ldr	x9, [x9, _AMDID2_NODE_ID@GOTPAGEOFF]
Lloh59:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh60:
	adrp	x9, _AMDID2_OSVW@GOTPAGE
Lloh61:
	ldr	x9, [x9, _AMDID2_OSVW@GOTPAGEOFF]
Lloh62:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh63:
	adrp	x9, _AMDID2_MWAITX@GOTPAGE
Lloh64:
	ldr	x9, [x9, _AMDID2_MWAITX@GOTPAGEOFF]
Lloh65:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh66:
	adrp	x9, _AMDID_RDTSCP@GOTPAGE
Lloh67:
	ldr	x9, [x9, _AMDID_RDTSCP@GOTPAGEOFF]
	fmov	s0, w8
	ld1.s	{ v0 }[1], [x9]
	ldr	d1, [sp, #40]
	bic.8b	v0, v1, v0
	str	d0, [sp, #40]
	b	LBB0_22
LBB0_28:
	bl	_vmm_get_xsave_limits
	ldr	w8, [x0, #8]
	cbz	w8, LBB0_61
; %bb.29:
	mov	x23, x0
	ldr	w0, [x22]
	ldr	w1, [x20]
	add	x2, sp, #32
	bl	_cpuid_count
	ldr	w8, [x20]
	cmp	w8, #1
	b.eq	LBB0_59
; %bb.30:
	cbnz	w8, LBB0_60
; %bb.31:
	ldr	w8, [sp, #32]
	ldp	w9, w10, [x23]
	and	w8, w8, w9
	str	w8, [sp, #32]
	str	w10, [sp, #40]
	b	LBB0_22
LBB0_32:
	bl	_vmm_is_intel
	cbz	w0, LBB0_61
; %bb.33:
	add	x1, sp, #16
	add	x2, sp, #24
	add	x3, sp, #12
	add	x4, sp, #20
	mov	x0, x23
	bl	_vm_get_topology
	ldr	w9, [x20]
	cbz	w9, LBB0_50
; %bb.34:
                                        ; implicit-def: $w8
                                        ; implicit-def: $w0
                                        ; implicit-def: $w23
	b	LBB0_51
LBB0_35:
	stp	xzr, xzr, [sp, #32]
	ldr	w8, [x20]
	cbnz	w8, LBB0_22
; %bb.36:
	add	x2, sp, #32
	mov	w0, #141
	mov	w1, #0
	bl	_cpuid_count
Lloh68:
	adrp	x8, _CPUID_STDEXT_FSGSBASE@GOTPAGE
Lloh69:
	ldr	x8, [x8, _CPUID_STDEXT_FSGSBASE@GOTPAGEOFF]
Lloh70:
	ldr	w8, [x8]
Lloh71:
	adrp	x9, _CPUID_STDEXT_BMI1@GOTPAGE
Lloh72:
	ldr	x9, [x9, _CPUID_STDEXT_BMI1@GOTPAGEOFF]
Lloh73:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh74:
	adrp	x9, _CPUID_STDEXT_HLE@GOTPAGE
Lloh75:
	ldr	x9, [x9, _CPUID_STDEXT_HLE@GOTPAGEOFF]
Lloh76:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh77:
	adrp	x9, _CPUID_STDEXT_AVX2@GOTPAGE
Lloh78:
	ldr	x9, [x9, _CPUID_STDEXT_AVX2@GOTPAGEOFF]
Lloh79:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh80:
	adrp	x9, _CPUID_STDEXT_BMI2@GOTPAGE
Lloh81:
	ldr	x9, [x9, _CPUID_STDEXT_BMI2@GOTPAGEOFF]
Lloh82:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh83:
	adrp	x9, _CPUID_STDEXT_ERMS@GOTPAGE
Lloh84:
	ldr	x9, [x9, _CPUID_STDEXT_ERMS@GOTPAGEOFF]
Lloh85:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh86:
	adrp	x9, _CPUID_STDEXT_RTM@GOTPAGE
Lloh87:
	ldr	x9, [x9, _CPUID_STDEXT_RTM@GOTPAGEOFF]
Lloh88:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh89:
	adrp	x9, _CPUID_STDEXT_AVX512F@GOTPAGE
Lloh90:
	ldr	x9, [x9, _CPUID_STDEXT_AVX512F@GOTPAGEOFF]
Lloh91:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh92:
	adrp	x9, _CPUID_STDEXT_RDSEED@GOTPAGE
Lloh93:
	ldr	x9, [x9, _CPUID_STDEXT_RDSEED@GOTPAGEOFF]
Lloh94:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh95:
	adrp	x9, _CPUID_STDEXT_AVX512PF@GOTPAGE
Lloh96:
	ldr	x9, [x9, _CPUID_STDEXT_AVX512PF@GOTPAGEOFF]
Lloh97:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh98:
	adrp	x9, _CPUID_STDEXT_AVX512ER@GOTPAGE
Lloh99:
	ldr	x9, [x9, _CPUID_STDEXT_AVX512ER@GOTPAGEOFF]
Lloh100:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh101:
	adrp	x9, _CPUID_STDEXT_AVX512CD@GOTPAGE
Lloh102:
	ldr	x9, [x9, _CPUID_STDEXT_AVX512CD@GOTPAGEOFF]
Lloh103:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh104:
	adrp	x9, _CPUID_STDEXT_SHA@GOTPAGE
Lloh105:
	ldr	x9, [x9, _CPUID_STDEXT_SHA@GOTPAGEOFF]
Lloh106:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [sp, #36]
	ldr	w10, [sp, #44]
	and	w8, w9, w8
	stp	wzr, w8, [sp, #32]
Lloh107:
	adrp	x8, _CPUID_STDEXT3_MD_CLEAR@GOTPAGE
Lloh108:
	ldr	x8, [x8, _CPUID_STDEXT3_MD_CLEAR@GOTPAGEOFF]
Lloh109:
	ldr	w8, [x8]
	and	w8, w10, w8
	stp	wzr, w8, [sp, #40]
Lloh110:
	adrp	x8, _VM_CAP_ENABLE_INVPCID@GOTPAGE
Lloh111:
	ldr	x8, [x8, _VM_CAP_ENABLE_INVPCID@GOTPAGEOFF]
Lloh112:
	ldr	w2, [x8]
	add	x3, sp, #60
	mov	x0, x23
	mov	x1, x24
	bl	_vm_get_capability
	cbnz	w0, LBB0_22
; %bb.37:
	ldr	w8, [sp, #60]
	cbz	w8, LBB0_22
; %bb.38:
Lloh113:
	adrp	x8, _CPUID_STDEXT_INVPCID@GOTPAGE
Lloh114:
	ldr	x8, [x8, _CPUID_STDEXT_INVPCID@GOTPAGEOFF]
Lloh115:
	ldr	w8, [x8]
	ldr	w9, [sp, #36]
	orr	w8, w9, w8
	str	w8, [sp, #36]
	b	LBB0_22
LBB0_39:
Lloh116:
	adrp	x8, _CPUTPM1_ARAT@GOTPAGE
Lloh117:
	ldr	x8, [x8, _CPUTPM1_ARAT@GOTPAGEOFF]
Lloh118:
	ldr	w8, [x8]
LBB0_40:
	stp	w8, wzr, [sp, #32]
	str	xzr, [sp, #40]
	b	LBB0_22
LBB0_41:
	ldr	w1, [x20]
	add	x2, sp, #32
	mov	w0, #143
	bl	_cpuid_count
	ldr	q0, [sp, #32]
	cmtst.4s	v0, v0, v0
	xtn.4h	v0, v0
	umov.h	w8, v0[0]
	umov.h	w9, v0[1]
	and	w9, w9, #0x1
	bfi	w8, w9, #1, #1
	umov.h	w9, v0[2]
	and	w9, w9, #0x1
	bfi	w8, w9, #2, #1
	umov.h	w9, v0[3]
	bfi	w8, w9, #3, #29
	tst	w8, #0xf
	b.eq	LBB0_22
; %bb.42:
	add	x1, sp, #16
	add	x2, sp, #24
	add	x3, sp, #12
	add	x4, sp, #20
	mov	x0, x23
	bl	_vm_get_topology
	ldr	w8, [sp, #32]
	and	w9, w8, #0x3ff
	ldr	w10, [sp, #24]
	bfi	w9, w10, #26, #6
	mov	w11, #-67108864
	and	w8, w8, #0xe0
	lsl	w10, w10, #14
	mov	w12, #16384
	cmp	w8, #64
	csel	w8, w10, w12, hi
	ldr	w10, [sp, #12]
	mul	w8, w8, w10
	sub	w8, w8, #4, lsl #12             ; =16384
	add	w9, w9, w11
	orr	w8, w8, w9
	str	w8, [sp, #32]
	b	LBB0_22
LBB0_43:
	add	x1, sp, #32
	mov	w0, #1
	bl	_do_cpuid
	add	x2, sp, #28
	mov	x0, x23
	mov	x1, x24
	bl	_vm_get_x2apic_state
	cbz	w0, LBB0_45
; %bb.44:
	mov	x1, x0
Lloh119:
	adrp	x0, l_.str.1@PAGE
Lloh120:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_panic
LBB0_45:
Lloh121:
	adrp	x8, _CPUID_LOCAL_APIC_ID@GOTPAGE
Lloh122:
	ldr	x8, [x8, _CPUID_LOCAL_APIC_ID@GOTPAGEOFF]
Lloh123:
	ldr	w8, [x8]
	ldp	w9, w10, [sp, #36]
	bic	w8, w9, w8
Lloh124:
	adrp	x9, _CPUID_0000_0001_APICID_SHIFT@GOTPAGE
Lloh125:
	ldr	x9, [x9, _CPUID_0000_0001_APICID_SHIFT@GOTPAGEOFF]
Lloh126:
	ldr	w9, [x9]
	lsl	w9, w24, w9
	orr	w9, w9, w8
Lloh127:
	adrp	x8, _CPUID2_VMX@GOTPAGE
Lloh128:
	ldr	x8, [x8, _CPUID2_VMX@GOTPAGEOFF]
Lloh129:
	ldr	w8, [x8]
Lloh130:
	adrp	x11, _CPUID2_EST@GOTPAGE
Lloh131:
	ldr	x11, [x11, _CPUID2_EST@GOTPAGEOFF]
Lloh132:
	ldr	w11, [x11]
	orr	w8, w11, w8
Lloh133:
	adrp	x11, _CPUID2_TM2@GOTPAGE
Lloh134:
	ldr	x11, [x11, _CPUID2_TM2@GOTPAGEOFF]
Lloh135:
	ldr	w11, [x11]
	orr	w8, w8, w11
Lloh136:
	adrp	x11, _CPUID2_SMX@GOTPAGE
Lloh137:
	ldr	x11, [x11, _CPUID2_SMX@GOTPAGEOFF]
Lloh138:
	ldr	w11, [x11]
	orr	w8, w8, w11
	bic	w8, w10, w8
Lloh139:
	adrp	x10, _CPUID2_HV@GOTPAGE
Lloh140:
	ldr	x10, [x10, _CPUID2_HV@GOTPAGEOFF]
Lloh141:
	ldr	w10, [x10]
	orr	w8, w10, w8
	ldr	w10, [sp, #28]
Lloh142:
	adrp	x11, _X2APIC_DISABLED@GOTPAGE
Lloh143:
	ldr	x11, [x11, _X2APIC_DISABLED@GOTPAGEOFF]
Lloh144:
	ldr	w11, [x11]
Lloh145:
	adrp	x12, _CPUID2_X2APIC@GOTPAGE
Lloh146:
	ldr	x12, [x12, _CPUID2_X2APIC@GOTPAGEOFF]
Lloh147:
	ldr	w12, [x12]
	bic	w13, w8, w12
	orr	w8, w12, w8
	cmp	w10, w11
	csel	w8, w13, w8, eq
Lloh148:
	adrp	x25, _CPUID2_OSXSAVE@GOTPAGE
Lloh149:
	ldr	x25, [x25, _CPUID2_OSXSAVE@GOTPAGEOFF]
	ldr	w10, [x25]
Lloh150:
	adrp	x11, _CPUID2_XSAVE@GOTPAGE
Lloh151:
	ldr	x11, [x11, _CPUID2_XSAVE@GOTPAGEOFF]
Lloh152:
	ldr	w11, [x11]
	tst	w10, w8
	mov	w12, #-1
	csinv	w12, w12, w11, ne
	and	w8, w8, w12
	bic	w8, w8, w10
	stp	w9, w8, [sp, #36]
	tst	w11, w8
	b.eq	LBB0_58
; %bb.46:
Lloh153:
	adrp	x8, _VM_REG_GUEST_CR4@GOTPAGE
Lloh154:
	ldr	x8, [x8, _VM_REG_GUEST_CR4@GOTPAGEOFF]
Lloh155:
	ldr	w2, [x8]
	add	x3, sp, #60
	mov	x0, x23
	mov	x1, x24
	bl	_vm_get_register
	cbz	w0, LBB0_48
; %bb.47:
	mov	x1, x0
Lloh156:
	adrp	x0, l_.str.2@PAGE
Lloh157:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_panic
LBB0_48:
	ldr	w8, [sp, #60]
Lloh158:
	adrp	x9, _CR4_XSAVE@GOTPAGE
Lloh159:
	ldr	x9, [x9, _CR4_XSAVE@GOTPAGEOFF]
Lloh160:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_57
; %bb.49:
	ldr	w8, [x25]
	ldr	w9, [sp, #40]
	orr	w8, w9, w8
	b	LBB0_58
LBB0_50:
	ldr	w23, [sp, #12]
	mov	x0, x23
	bl	_log2
Lloh161:
	adrp	x8, _CPUID_TYPE_SMT@GOTPAGE
Lloh162:
	ldr	x8, [x8, _CPUID_TYPE_SMT@GOTPAGEOFF]
Lloh163:
	ldr	w8, [x8]
	ldr	w9, [x20]
LBB0_51:
	cmp	w9, #1
	b.ne	LBB0_53
; %bb.52:
	ldr	w8, [sp, #12]
	ldr	w9, [sp, #24]
	mul	w23, w9, w8
	mov	x0, x23
	bl	_log2
Lloh164:
	adrp	x8, _CPUID_TYPE_CORE@GOTPAGE
Lloh165:
	ldr	x8, [x8, _CPUID_TYPE_CORE@GOTPAGEOFF]
Lloh166:
	ldr	w8, [x8]
LBB0_53:
Lloh167:
	adrp	x9, _cpuid_leaf_b@GOTPAGE
Lloh168:
	ldr	x9, [x9, _cpuid_leaf_b@GOTPAGEOFF]
Lloh169:
	ldr	w10, [x9]
	ldr	w9, [x20]
	cbz	w10, LBB0_55
; %bb.54:
	cmp	w9, #2
	b.lt	LBB0_56
LBB0_55:
	mov	w8, #0
	mov	w0, #0
	mov	w24, #0
	mov	w23, #0
LBB0_56:
	and	w10, w0, #0x1f
	and	w11, w23, #0xffff
	stp	w10, w11, [sp, #32]
	bfi	w9, w8, #8, #24
	stp	w9, w24, [sp, #40]
	b	LBB0_22
LBB0_57:
	ldr	w8, [sp, #40]
LBB0_58:
Lloh170:
	adrp	x9, _CPUID2_MON@GOTPAGE
Lloh171:
	ldr	x9, [x9, _CPUID2_MON@GOTPAGEOFF]
Lloh172:
	ldr	w9, [x9]
Lloh173:
	adrp	x10, _CPUID2_PDCM@GOTPAGE
Lloh174:
	ldr	x10, [x10, _CPUID2_PDCM@GOTPAGEOFF]
Lloh175:
	ldr	w10, [x10]
	orr	w9, w9, w10
Lloh176:
	adrp	x10, _CPUID2_TSCDLT@GOTPAGE
Lloh177:
	ldr	x10, [x10, _CPUID2_TSCDLT@GOTPAGEOFF]
Lloh178:
	ldr	w10, [x10]
	orr	w9, w9, w10
	bic	w8, w8, w9
Lloh179:
	adrp	x9, _CPUID_ACPI@GOTPAGE
Lloh180:
	ldr	x9, [x9, _CPUID_ACPI@GOTPAGEOFF]
Lloh181:
	ldr	w9, [x9]
Lloh182:
	adrp	x10, _CPUID_TM@GOTPAGE
Lloh183:
	ldr	x10, [x10, _CPUID_TM@GOTPAGEOFF]
Lloh184:
	ldr	w10, [x10]
	orr	w9, w10, w9
Lloh185:
	adrp	x10, _CPUID_DS@GOTPAGE
Lloh186:
	ldr	x10, [x10, _CPUID_DS@GOTPAGEOFF]
	ldr	w11, [sp, #44]
Lloh187:
	ldr	w10, [x10]
	orr	w9, w9, w10
	bic	w9, w11, w9
Lloh188:
	adrp	x10, _CPUID_MCA@GOTPAGE
Lloh189:
	ldr	x10, [x10, _CPUID_MCA@GOTPAGEOFF]
Lloh190:
	ldr	w10, [x10]
Lloh191:
	adrp	x11, _CPUID_MCE@GOTPAGE
Lloh192:
	ldr	x11, [x11, _CPUID_MCE@GOTPAGEOFF]
	orr	w9, w10, w9
Lloh193:
	adrp	x10, _CPUID_MTRR@GOTPAGE
Lloh194:
	ldr	x10, [x10, _CPUID_MTRR@GOTPAGEOFF]
Lloh195:
	ldr	w11, [x11]
Lloh196:
	ldr	w10, [x10]
	orr	w9, w9, w11
	orr	w9, w9, w10
	stp	w8, w9, [sp, #40]
	add	x1, sp, #16
	add	x2, sp, #24
	add	x3, sp, #12
	add	x4, sp, #20
	mov	x0, x23
	bl	_vm_get_topology
	ldr	w8, [sp, #12]
Lloh197:
	adrp	x9, _CPUID_HTT_CORES@GOTPAGE
Lloh198:
	ldr	x9, [x9, _CPUID_HTT_CORES@GOTPAGEOFF]
Lloh199:
	ldr	w9, [x9]
	ldr	w10, [sp, #36]
	ldr	w11, [sp, #44]
	bic	w9, w10, w9
	ldr	w10, [sp, #24]
	mul	w8, w8, w10
	ubfiz	w8, w8, #16, #8
	orr	w8, w9, w8
Lloh200:
	adrp	x9, _CPUID_HTT@GOTPAGE
Lloh201:
	ldr	x9, [x9, _CPUID_HTT@GOTPAGEOFF]
Lloh202:
	ldr	w9, [x9]
	orr	w9, w11, w9
	str	w8, [sp, #36]
	str	w9, [sp, #44]
	b	LBB0_22
LBB0_59:
Lloh203:
	adrp	x8, _CPUID_EXTSTATE_XSAVEOPT@GOTPAGE
Lloh204:
	ldr	x8, [x8, _CPUID_EXTSTATE_XSAVEOPT@GOTPAGEOFF]
Lloh205:
	ldr	w8, [x8]
	ldr	w9, [sp, #32]
	and	w8, w9, w8
	b	LBB0_40
LBB0_60:
	ldr	w9, [x23]
	lsr	x8, x9, x8
	tbnz	w8, #0, LBB0_22
LBB0_61:
	stp	xzr, xzr, [sp, #32]
	b	LBB0_22
LBB0_62:
	ldr	w8, [sp, #12]
	ldr	w9, [sp, #24]
	mul	w8, w9, w8
	mov	w25, #3
	mov	w23, #1
	mov	w24, #96
	b	LBB0_65
LBB0_63:
	mov	w25, #3
	mov	w23, #1
	mov	w24, #64
	ldr	w8, [sp, #12]
	b	LBB0_65
LBB0_64:
	mov	w24, #0
	mov	w23, #0
	mov	w25, #0
	mov	w8, #0
LBB0_65:
	sub	w1, w8, #1
	mov	w0, #4095
	bl	_MIN
	bfi	w24, w0, #14, #18
	orr	w8, w24, w25
	orr	w8, w8, #0x100
Lloh206:
	adrp	x9, _CACHE_LINE_SIZE@GOTPAGE
Lloh207:
	ldr	x9, [x9, _CACHE_LINE_SIZE@GOTPAGEOFF]
Lloh208:
	ldr	w9, [x9]
	sub	w9, w9, #1
	cmp	w23, #0
	csel	w9, w9, wzr, ne
	stp	w8, w9, [sp, #32]
	str	xzr, [sp, #40]
	b	LBB0_22
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh110, Lloh111, Lloh112
	.loh AdrpLdrGotLdr	Lloh107, Lloh108, Lloh109
	.loh AdrpLdrGotLdr	Lloh104, Lloh105, Lloh106
	.loh AdrpLdrGotLdr	Lloh101, Lloh102, Lloh103
	.loh AdrpLdrGotLdr	Lloh98, Lloh99, Lloh100
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh97
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.loh AdrpAdd	Lloh119, Lloh120
	.loh AdrpLdrGotLdr	Lloh150, Lloh151, Lloh152
	.loh AdrpLdrGot	Lloh148, Lloh149
	.loh AdrpLdrGotLdr	Lloh145, Lloh146, Lloh147
	.loh AdrpLdrGotLdr	Lloh142, Lloh143, Lloh144
	.loh AdrpLdrGotLdr	Lloh139, Lloh140, Lloh141
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.loh AdrpLdrGotLdr	Lloh133, Lloh134, Lloh135
	.loh AdrpLdrGotLdr	Lloh130, Lloh131, Lloh132
	.loh AdrpLdrGotLdr	Lloh127, Lloh128, Lloh129
	.loh AdrpLdrGotLdr	Lloh124, Lloh125, Lloh126
	.loh AdrpLdrGotLdr	Lloh121, Lloh122, Lloh123
	.loh AdrpLdrGotLdr	Lloh153, Lloh154, Lloh155
	.loh AdrpAdd	Lloh156, Lloh157
	.loh AdrpLdrGotLdr	Lloh158, Lloh159, Lloh160
	.loh AdrpLdrGotLdr	Lloh161, Lloh162, Lloh163
	.loh AdrpLdrGotLdr	Lloh164, Lloh165, Lloh166
	.loh AdrpLdrGotLdr	Lloh167, Lloh168, Lloh169
	.loh AdrpLdrGotLdr	Lloh200, Lloh201, Lloh202
	.loh AdrpLdrGotLdr	Lloh197, Lloh198, Lloh199
	.loh AdrpLdrGotLdr	Lloh193, Lloh194, Lloh196
	.loh AdrpLdrGotLdr	Lloh191, Lloh192, Lloh195
	.loh AdrpLdrGotLdr	Lloh188, Lloh189, Lloh190
	.loh AdrpLdrGotLdr	Lloh185, Lloh186, Lloh187
	.loh AdrpLdrGotLdr	Lloh182, Lloh183, Lloh184
	.loh AdrpLdrGotLdr	Lloh179, Lloh180, Lloh181
	.loh AdrpLdrGotLdr	Lloh176, Lloh177, Lloh178
	.loh AdrpLdrGotLdr	Lloh173, Lloh174, Lloh175
	.loh AdrpLdrGotLdr	Lloh170, Lloh171, Lloh172
	.loh AdrpLdrGotLdr	Lloh203, Lloh204, Lloh205
	.loh AdrpLdrGotLdr	Lloh206, Lloh207, Lloh208
	.cfi_endproc
	.section	__TEXT,__const
	.p2align	1
lJTI0_0:
	.short	(LBB0_10-LBB0_10)>>2
	.short	(LBB0_15-LBB0_10)>>2
	.short	(LBB0_23-LBB0_10)>>2
	.short	(LBB0_25-LBB0_10)>>2
	.short	(LBB0_21-LBB0_10)>>2
	.short	(LBB0_21-LBB0_10)>>2
	.short	(LBB0_21-LBB0_10)>>2
	.short	(LBB0_21-LBB0_10)>>2
	.short	(LBB0_27-LBB0_10)>>2
	.short	(LBB0_21-LBB0_10)>>2
	.short	(LBB0_28-LBB0_10)>>2
	.short	(LBB0_32-LBB0_10)>>2
	.short	(LBB0_61-LBB0_10)>>2
	.short	(LBB0_35-LBB0_10)>>2
	.short	(LBB0_39-LBB0_10)>>2
	.short	(LBB0_41-LBB0_10)>>2
	.short	(LBB0_21-LBB0_10)>>2
	.short	(LBB0_21-LBB0_10)>>2
	.short	(LBB0_43-LBB0_10)>>2
	.short	(LBB0_21-LBB0_10)>>2
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"cpuid %#x,%#x"

	.comm	_cpu_exthigh,4,2                ; @cpu_exthigh
	.comm	_CPUID_VM_HIGH,4,2              ; @CPUID_VM_HIGH
	.comm	_cpu_high,4,2                   ; @cpu_high
	.comm	_AMDFEID_CLZERO,4,2             ; @AMDFEID_CLZERO
	.comm	_AMDFEID_IRPERF,4,2             ; @AMDFEID_IRPERF
	.comm	_AMDFEID_XSAVEERPTR,4,2         ; @AMDFEID_XSAVEERPTR
	.comm	_AMDID_COREID_SIZE_SHIFT,4,2    ; @AMDID_COREID_SIZE_SHIFT
	.comm	_AMDID2_SVM,4,2                 ; @AMDID2_SVM
	.comm	_AMDID2_PCXC,4,2                ; @AMDID2_PCXC
	.comm	_AMDID2_PNXC,4,2                ; @AMDID2_PNXC
	.comm	_AMDID2_PTSCEL2I,4,2            ; @AMDID2_PTSCEL2I
	.comm	_AMDID2_IBS,4,2                 ; @AMDID2_IBS
	.comm	_AMDID2_NODE_ID,4,2             ; @AMDID2_NODE_ID
	.comm	_AMDID2_OSVW,4,2                ; @AMDID2_OSVW
	.comm	_AMDID2_MWAITX,4,2              ; @AMDID2_MWAITX
	.comm	_AMDID_RDTSCP,4,2               ; @AMDID_RDTSCP
	.comm	_tsc_is_invariant,4,2           ; @tsc_is_invariant
	.comm	_smp_tsc,4,2                    ; @smp_tsc
	.comm	_AMDPM_TSC_INVARIANT,4,2        ; @AMDPM_TSC_INVARIANT
	.comm	_CACHE_LINE_SIZE,4,2            ; @CACHE_LINE_SIZE
	.comm	_cpu_id,4,2                     ; @cpu_id
l_.str.1:                               ; @.str.1
	.asciz	"x86_emulate_cpuid: error %d fetching x2apic state"

	.comm	_CPUID_LOCAL_APIC_ID,4,2        ; @CPUID_LOCAL_APIC_ID
	.comm	_CPUID_0000_0001_APICID_SHIFT,4,2 ; @CPUID_0000_0001_APICID_SHIFT
	.comm	_CPUID2_VMX,4,2                 ; @CPUID2_VMX
	.comm	_CPUID2_EST,4,2                 ; @CPUID2_EST
	.comm	_CPUID2_TM2,4,2                 ; @CPUID2_TM2
	.comm	_CPUID2_SMX,4,2                 ; @CPUID2_SMX
	.comm	_CPUID2_HV,4,2                  ; @CPUID2_HV
	.comm	_X2APIC_DISABLED,4,2            ; @X2APIC_DISABLED
	.comm	_CPUID2_X2APIC,4,2              ; @CPUID2_X2APIC
	.comm	_CPUID2_OSXSAVE,4,2             ; @CPUID2_OSXSAVE
	.comm	_CPUID2_XSAVE,4,2               ; @CPUID2_XSAVE
	.comm	_VM_REG_GUEST_CR4,4,2           ; @VM_REG_GUEST_CR4
l_.str.2:                               ; @.str.2
	.asciz	"x86_emulate_cpuid: error %d fetching %%cr4"

	.comm	_CR4_XSAVE,4,2                  ; @CR4_XSAVE
	.comm	_CPUID2_MON,4,2                 ; @CPUID2_MON
	.comm	_CPUID2_PDCM,4,2                ; @CPUID2_PDCM
	.comm	_CPUID2_TSCDLT,4,2              ; @CPUID2_TSCDLT
	.comm	_CPUID_ACPI,4,2                 ; @CPUID_ACPI
	.comm	_CPUID_TM,4,2                   ; @CPUID_TM
	.comm	_CPUID_DS,4,2                   ; @CPUID_DS
	.comm	_CPUID_MCA,4,2                  ; @CPUID_MCA
	.comm	_CPUID_MCE,4,2                  ; @CPUID_MCE
	.comm	_CPUID_MTRR,4,2                 ; @CPUID_MTRR
	.comm	_CPUID_HTT_CORES,4,2            ; @CPUID_HTT_CORES
	.comm	_CPUID_HTT,4,2                  ; @CPUID_HTT
	.comm	_CPUID_STDEXT_FSGSBASE,4,2      ; @CPUID_STDEXT_FSGSBASE
	.comm	_CPUID_STDEXT_BMI1,4,2          ; @CPUID_STDEXT_BMI1
	.comm	_CPUID_STDEXT_HLE,4,2           ; @CPUID_STDEXT_HLE
	.comm	_CPUID_STDEXT_AVX2,4,2          ; @CPUID_STDEXT_AVX2
	.comm	_CPUID_STDEXT_BMI2,4,2          ; @CPUID_STDEXT_BMI2
	.comm	_CPUID_STDEXT_ERMS,4,2          ; @CPUID_STDEXT_ERMS
	.comm	_CPUID_STDEXT_RTM,4,2           ; @CPUID_STDEXT_RTM
	.comm	_CPUID_STDEXT_AVX512F,4,2       ; @CPUID_STDEXT_AVX512F
	.comm	_CPUID_STDEXT_RDSEED,4,2        ; @CPUID_STDEXT_RDSEED
	.comm	_CPUID_STDEXT_AVX512PF,4,2      ; @CPUID_STDEXT_AVX512PF
	.comm	_CPUID_STDEXT_AVX512ER,4,2      ; @CPUID_STDEXT_AVX512ER
	.comm	_CPUID_STDEXT_AVX512CD,4,2      ; @CPUID_STDEXT_AVX512CD
	.comm	_CPUID_STDEXT_SHA,4,2           ; @CPUID_STDEXT_SHA
	.comm	_CPUID_STDEXT3_MD_CLEAR,4,2     ; @CPUID_STDEXT3_MD_CLEAR
	.comm	_VM_CAP_ENABLE_INVPCID,4,2      ; @VM_CAP_ENABLE_INVPCID
	.comm	_CPUID_STDEXT_INVPCID,4,2       ; @CPUID_STDEXT_INVPCID
	.comm	_CPUTPM1_ARAT,4,2               ; @CPUTPM1_ARAT
	.comm	_CPUID_TYPE_SMT,4,2             ; @CPUID_TYPE_SMT
	.comm	_CPUID_TYPE_CORE,4,2            ; @CPUID_TYPE_CORE
	.comm	_cpuid_leaf_b,4,2               ; @cpuid_leaf_b
	.comm	_CPUID_EXTSTATE_XSAVEOPT,4,2    ; @CPUID_EXTSTATE_XSAVEOPT
	.comm	_bhyve_id,4,2                   ; @bhyve_id
	.comm	_bhyve_xcpuids,4,2              ; @bhyve_xcpuids
.subsections_via_symbols
