	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mv_spi_transfer
_mv_spi_transfer:                       ## @mv_spi_transfer
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r12
	movl	%esi, %r13d
	movl	%edi, %r14d
	movq	(%rdx), %rax
	xorl	%edi, %edi
	cmpq	8(%rdx), %rax
	sete	%dil
	leaq	L_.str(%rip), %rsi
	callq	_KASSERT
	movq	16(%r12), %rax
	xorl	%edi, %edi
	cmpq	24(%r12), %rax
	sete	%dil
	leaq	L_.str.1(%rip), %rsi
	callq	_KASSERT
	leaq	-48(%rbp), %rsi
	movl	%r13d, %edi
	callq	_spibus_get_cs
	movq	_SPIBUS_CS_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, -48(%rbp)
	leaq	-44(%rbp), %rsi
	movl	%r13d, %edi
	callq	_spibus_get_mode
	movl	-44(%rbp), %ebx
	cmpl	$4, %ebx
	jl	LBB0_3
## %bb.1:
	movl	%r13d, %edi
	callq	_device_get_nameunit
	leaq	L_.str.2(%rip), %rsi
	movl	%r14d, %edi
	movl	%ebx, %edx
	jmp	LBB0_2
LBB0_3:
	leaq	-52(%rbp), %rsi
	movl	%r13d, %edi
	callq	_spibus_get_clock
	movl	-52(%rbp), %edi
	testl	%edi, %edi
	je	LBB0_4
## %bb.5:
	leaq	-64(%rbp), %rsi
	leaq	-60(%rbp), %rdx
	callq	_mv_spi_psc_calc
	testq	%rax, %rax
	je	LBB0_8
## %bb.6:
	movl	-52(%rbp), %r15d
	jmp	LBB0_7
LBB0_4:
	xorl	%r15d, %r15d
LBB0_7:
	movl	%r13d, %edi
	callq	_device_get_nameunit
	leaq	L_.str.3(%rip), %rsi
	movl	%r14d, %edi
	movl	%r15d, %edx
LBB0_2:
	movl	%eax, %ecx
	callq	_device_printf
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_21:
	movl	(%rax), %r12d
LBB0_22:
	movl	%r12d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_8:
	movl	%r14d, %edi
	callq	_device_get_softc
	movq	%rax, %r15
	movq	%rax, %rdi
	callq	_MV_SPI_LOCK
	movq	_MV_SPI_BUSY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %eax
	testl	%eax, (%r15)
	je	LBB0_11
## %bb.9:
	movq	%r15, %rbx
	addq	$32, %rbx
	.p2align	4, 0x90
LBB0_10:                                ## =>This Inner Loop Header: Depth=1
	movl	%r14d, %edi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	movq	%r15, %r13
	movq	%rcx, %r15
	leaq	L_.str.4(%rip), %rcx
	xorl	%r8d, %r8d
	callq	_mtx_sleep
	movq	%r15, %rcx
	movq	%r13, %r15
	movl	(%rcx), %eax
	testl	%eax, (%r13)
	jne	LBB0_10
LBB0_11:
	movl	%eax, (%r15)
	movq	%r12, 24(%r15)
	movq	$0, 16(%r15)
	movl	$0, 4(%r15)
	movq	16(%r12), %rax
	addq	(%r12), %rax
	movq	%rax, 8(%r15)
	movq	_MV_SPI_CONF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_MV_SPI_READ
	movq	_MV_SPI_CONF_MODE_MASK@GOTPCREL(%rip), %rcx
	movq	_MV_SPI_CONF_CLOCK_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	notl	%edx
	movl	-44(%rbp), %esi
	movq	_MV_SPI_CONF_MODE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	andl	%eax, %edx
	orl	%edx, %esi
	movq	_MV_SPI_CONF_CLOCK_SPR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-64(%rbp), %eax
	orl	%esi, %eax
	movl	-60(%rbp), %edx
	movq	_MV_SPI_CONF_CLOCK_SPPR_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	andl	%edx, %esi
	movq	_MV_SPI_CONF_CLOCK_SPPR_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	movq	_MV_SPI_CONF_CLOCK_SPPRHI_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %edx
	movq	_MV_SPI_CONF_CLOCK_SPPRHI_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%esi, %edx
	orl	%eax, %edx
	movq	_MV_SPI_CONTROL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_MV_SPI_WRITE
	movq	_MV_SPI_CTRL_CS_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	-48(%rbp), %edx
	movq	_MV_SPI_CTRL_CS_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edx
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_MV_SPI_WRITE
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_MV_SPI_READ
	movl	(%r12), %esi
	movq	_MV_SPI_CTRL_CS_ACTIVE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	%r15, %rdi
	movl	%eax, %edx
	callq	_MV_SPI_WRITE
	movl	8(%r15), %eax
	subl	4(%r15), %eax
	testl	%eax, %eax
	movl	%r14d, -56(%rbp)                ## 4-byte Spill
	jle	LBB0_12
## %bb.13:
	movq	_MV_SPI_INTR_STAT@GOTPCREL(%rip), %rax
	movq	_MV_SPI_CTRL_SMEMREADY@GOTPCREL(%rip), %r13
LBB0_14:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_15 Depth 2
	movq	%rax, %r14
	movl	(%rax), %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_MV_SPI_WRITE
	movq	%r15, %rdi
	callq	_mv_spi_tx_byte
	movl	$999, %ebx                      ## imm = 0x3E7
	.p2align	4, 0x90
LBB0_15:                                ##   Parent Loop BB0_14 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_MV_SPI_READ
	testl	%eax, (%r13)
	jne	LBB0_18
## %bb.16:                              ##   in Loop: Header=BB0_15 Depth=2
	movl	$1, %edi
	callq	_DELAY
	leal	-1(%rbx), %eax
	cmpl	$1, %ebx
	movl	%eax, %ebx
	ja	LBB0_15
	jmp	LBB0_17
LBB0_18:                                ##   in Loop: Header=BB0_14 Depth=1
	movq	%r15, %rdi
	callq	_mv_spi_rx_byte
	movl	8(%r15), %eax
	subl	4(%r15), %eax
	testl	%eax, %eax
	movq	%r14, %rax
	jg	LBB0_14
	jmp	LBB0_19
LBB0_17:
	xorl	%ebx, %ebx
	jmp	LBB0_19
LBB0_12:
                                        ## implicit-def: $ebx
LBB0_19:
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_MV_SPI_READ
	movl	(%r12), %esi
	movq	_MV_SPI_CTRL_CS_ACTIVE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movq	%r15, %rdi
	callq	_MV_SPI_WRITE
	movq	_MV_SPI_INTR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%r12d, %r12d
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_MV_SPI_WRITE
	movq	_MV_SPI_INTR_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_MV_SPI_WRITE
	movl	$0, (%r15)
	movl	-56(%rbp), %edi                 ## 4-byte Reload
	callq	_wakeup_one
	movq	%r15, %rdi
	callq	_MV_SPI_UNLOCK
	testl	%ebx, %ebx
	jne	LBB0_22
## %bb.20:
	movq	_EIO@GOTPCREL(%rip), %rax
	jmp	LBB0_21
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"TX/RX command sizes should be equal"

L_.str.1:                               ## @.str.1
	.asciz	"TX/RX data sizes should be equal"

	.comm	_SPIBUS_CS_HIGH,4,2             ## @SPIBUS_CS_HIGH
L_.str.2:                               ## @.str.2
	.asciz	"Invalid mode %u requested by %s\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
L_.str.3:                               ## @.str.3
	.asciz	"Invalid clock %uHz requested by %s\n"

	.comm	_MV_SPI_BUSY,4,2                ## @MV_SPI_BUSY
L_.str.4:                               ## @.str.4
	.asciz	"mv_spi"

	.comm	_MV_SPI_CONF,4,2                ## @MV_SPI_CONF
	.comm	_MV_SPI_CONF_MODE_MASK,4,2      ## @MV_SPI_CONF_MODE_MASK
	.comm	_MV_SPI_CONF_CLOCK_MASK,4,2     ## @MV_SPI_CONF_CLOCK_MASK
	.comm	_MV_SPI_CONF_MODE_SHIFT,4,2     ## @MV_SPI_CONF_MODE_SHIFT
	.comm	_MV_SPI_CONF_CLOCK_SPR_MASK,4,2 ## @MV_SPI_CONF_CLOCK_SPR_MASK
	.comm	_MV_SPI_CONF_CLOCK_SPPR_MASK,4,2 ## @MV_SPI_CONF_CLOCK_SPPR_MASK
	.comm	_MV_SPI_CONF_CLOCK_SPPR_SHIFT,4,2 ## @MV_SPI_CONF_CLOCK_SPPR_SHIFT
	.comm	_MV_SPI_CONF_CLOCK_SPPRHI_MASK,4,2 ## @MV_SPI_CONF_CLOCK_SPPRHI_MASK
	.comm	_MV_SPI_CONF_CLOCK_SPPRHI_SHIFT,4,2 ## @MV_SPI_CONF_CLOCK_SPPRHI_SHIFT
	.comm	_MV_SPI_CONTROL,4,2             ## @MV_SPI_CONTROL
	.comm	_MV_SPI_CTRL_CS_MASK,4,2        ## @MV_SPI_CTRL_CS_MASK
	.comm	_MV_SPI_CTRL_CS_SHIFT,4,2       ## @MV_SPI_CTRL_CS_SHIFT
	.comm	_MV_SPI_CTRL_CS_ACTIVE,4,2      ## @MV_SPI_CTRL_CS_ACTIVE
	.comm	_MV_SPI_INTR_STAT,4,2           ## @MV_SPI_INTR_STAT
	.comm	_MV_SPI_CTRL_SMEMREADY,4,2      ## @MV_SPI_CTRL_SMEMREADY
	.comm	_MV_SPI_INTR_MASK,4,2           ## @MV_SPI_INTR_MASK
	.comm	_EIO,4,2                        ## @EIO
	.no_dead_strip	_mv_spi_transfer
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mv_spi_transfer
_mv_spi_transfer:                       ; @mv_spi_transfer
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
	ldp	x8, x9, [x2]
	cmp	x8, x9
	cset	w0, eq
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_KASSERT
	ldp	x8, x9, [x21, #16]
	cmp	x8, x9
	cset	w0, eq
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_KASSERT
	add	x1, sp, #24
	mov	x0, x20
	bl	_spibus_get_cs
Lloh4:
	adrp	x8, _SPIBUS_CS_HIGH@GOTPAGE
Lloh5:
	ldr	x8, [x8, _SPIBUS_CS_HIGH@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	ldr	w9, [sp, #24]
	bic	w8, w9, w8
	str	w8, [sp, #24]
	add	x1, sp, #20
	mov	x0, x20
	bl	_spibus_get_mode
	ldr	w22, [sp, #20]
	cmp	w22, #4
	b.lt	LBB0_2
; %bb.1:
	mov	x0, x20
	bl	_device_get_nameunit
	mov	x3, x0
Lloh7:
	adrp	x1, l_.str.2@PAGE
Lloh8:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	mov	x2, x22
	b	LBB0_7
LBB0_2:
	add	x1, sp, #28
	mov	x0, x20
	bl	_spibus_get_clock
	ldr	w0, [sp, #28]
	cbz	w0, LBB0_5
; %bb.3:
	add	x1, sp, #16
	add	x2, sp, #12
	bl	_mv_spi_psc_calc
	cbz	x0, LBB0_9
; %bb.4:
	ldr	w21, [sp, #28]
	b	LBB0_6
LBB0_5:
	mov	w21, #0
LBB0_6:
	mov	x0, x20
	bl	_device_get_nameunit
	mov	x3, x0
Lloh9:
	adrp	x1, l_.str.3@PAGE
Lloh10:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
	mov	x2, x21
LBB0_7:
	bl	_device_printf
Lloh11:
	adrp	x8, _EINVAL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
LBB0_8:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_9:
	mov	x0, x19
	bl	_device_get_softc
	mov	x20, x0
	bl	_MV_SPI_LOCK
	ldr	w9, [x20]
Lloh14:
	adrp	x24, _MV_SPI_BUSY@GOTPAGE
Lloh15:
	ldr	x24, [x24, _MV_SPI_BUSY@GOTPAGEOFF]
	ldr	w8, [x24]
	tst	w8, w9
	b.eq	LBB0_12
; %bb.10:
	add	x22, x20, #32
Lloh16:
	adrp	x23, l_.str.4@PAGE
Lloh17:
	add	x23, x23, l_.str.4@PAGEOFF
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	mov	x3, x23
	mov	w4, #0
	bl	_mtx_sleep
	ldr	w9, [x20]
	ldr	w8, [x24]
	tst	w8, w9
	b.ne	LBB0_11
LBB0_12:
	stp	xzr, x21, [x20, #16]
	stp	w8, wzr, [x20]
	ldr	x8, [x21]
	ldr	x9, [x21, #16]
	add	x8, x9, x8
	str	x8, [x20, #8]
Lloh18:
	adrp	x8, _MV_SPI_CONF@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MV_SPI_CONF@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_MV_SPI_READ
Lloh21:
	adrp	x8, _MV_SPI_CONF_MODE_MASK@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MV_SPI_CONF_MODE_MASK@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
Lloh24:
	adrp	x9, _MV_SPI_CONF_CLOCK_MASK@GOTPAGE
Lloh25:
	ldr	x9, [x9, _MV_SPI_CONF_CLOCK_MASK@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w8, w0, w8
	ldr	w9, [sp, #20]
Lloh27:
	adrp	x10, _MV_SPI_CONF_MODE_SHIFT@GOTPAGE
Lloh28:
	ldr	x10, [x10, _MV_SPI_CONF_MODE_SHIFT@GOTPAGEOFF]
Lloh29:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
	ldr	w9, [sp, #16]
Lloh30:
	adrp	x10, _MV_SPI_CONF_CLOCK_SPR_MASK@GOTPAGE
Lloh31:
	ldr	x10, [x10, _MV_SPI_CONF_CLOCK_SPR_MASK@GOTPAGEOFF]
Lloh32:
	ldr	w10, [x10]
	and	w9, w10, w9
	orr	w8, w8, w9
	ldr	w9, [sp, #12]
Lloh33:
	adrp	x10, _MV_SPI_CONF_CLOCK_SPPR_MASK@GOTPAGE
Lloh34:
	ldr	x10, [x10, _MV_SPI_CONF_CLOCK_SPPR_MASK@GOTPAGEOFF]
Lloh35:
	ldr	w10, [x10]
	and	w10, w10, w9
Lloh36:
	adrp	x11, _MV_SPI_CONF_CLOCK_SPPR_SHIFT@GOTPAGE
Lloh37:
	ldr	x11, [x11, _MV_SPI_CONF_CLOCK_SPPR_SHIFT@GOTPAGEOFF]
Lloh38:
	ldr	w11, [x11]
	lsl	w10, w10, w11
	orr	w8, w8, w10
Lloh39:
	adrp	x10, _MV_SPI_CONF_CLOCK_SPPRHI_MASK@GOTPAGE
Lloh40:
	ldr	x10, [x10, _MV_SPI_CONF_CLOCK_SPPRHI_MASK@GOTPAGEOFF]
Lloh41:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh42:
	adrp	x10, _MV_SPI_CONF_CLOCK_SPPRHI_SHIFT@GOTPAGE
Lloh43:
	ldr	x10, [x10, _MV_SPI_CONF_CLOCK_SPPRHI_SHIFT@GOTPAGEOFF]
Lloh44:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w2, w8, w9
Lloh45:
	adrp	x21, _MV_SPI_CONTROL@GOTPAGE
Lloh46:
	ldr	x21, [x21, _MV_SPI_CONTROL@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_MV_SPI_WRITE
	ldr	w8, [sp, #24]
Lloh47:
	adrp	x9, _MV_SPI_CTRL_CS_MASK@GOTPAGE
Lloh48:
	ldr	x9, [x9, _MV_SPI_CTRL_CS_MASK@GOTPAGEOFF]
Lloh49:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh50:
	adrp	x9, _MV_SPI_CTRL_CS_SHIFT@GOTPAGE
Lloh51:
	ldr	x9, [x9, _MV_SPI_CTRL_CS_SHIFT@GOTPAGEOFF]
Lloh52:
	ldr	w9, [x9]
	lsl	w2, w8, w9
	ldr	w1, [x21]
	mov	x0, x20
	bl	_MV_SPI_WRITE
	ldr	w1, [x21]
	mov	x0, x20
	bl	_MV_SPI_READ
	ldr	w1, [x21]
Lloh53:
	adrp	x23, _MV_SPI_CTRL_CS_ACTIVE@GOTPAGE
Lloh54:
	ldr	x23, [x23, _MV_SPI_CTRL_CS_ACTIVE@GOTPAGEOFF]
	ldr	w8, [x23]
	orr	w2, w8, w0
	mov	x0, x20
	bl	_MV_SPI_WRITE
	ldp	w9, w8, [x20, #4]
	sub	w8, w8, w9
Lloh55:
	adrp	x22, _MV_SPI_INTR_STAT@GOTPAGE
Lloh56:
	ldr	x22, [x22, _MV_SPI_INTR_STAT@GOTPAGEOFF]
	cmp	w8, #1
	b.lt	LBB0_19
; %bb.13:
Lloh57:
	adrp	x25, _MV_SPI_CTRL_SMEMREADY@GOTPAGE
Lloh58:
	ldr	x25, [x25, _MV_SPI_CTRL_SMEMREADY@GOTPAGEOFF]
LBB0_14:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_15 Depth 2
	ldr	w1, [x22]
	mov	x0, x20
	mov	w2, #0
	bl	_MV_SPI_WRITE
	mov	x0, x20
	bl	_mv_spi_tx_byte
	mov	w24, #999
LBB0_15:                                ;   Parent Loop BB0_14 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	w1, [x21]
	mov	x0, x20
	bl	_MV_SPI_READ
	ldr	w8, [x25]
	tst	w8, w0
	b.ne	LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_15 Depth=2
	mov	w0, #1
	bl	_DELAY
	subs	w24, w24, #1
	b.hi	LBB0_15
	b	LBB0_18
LBB0_17:                                ;   in Loop: Header=BB0_14 Depth=1
	mov	x0, x20
	bl	_mv_spi_rx_byte
	ldp	w9, w8, [x20, #4]
	sub	w8, w8, w9
	cmp	w8, #0
	b.gt	LBB0_14
	b	LBB0_20
LBB0_18:
	mov	w24, #0
	b	LBB0_20
LBB0_19:
                                        ; implicit-def: $w24
LBB0_20:
	ldr	w1, [x21]
	mov	x0, x20
	bl	_MV_SPI_READ
	ldr	w1, [x21]
	ldr	w8, [x23]
	bic	w2, w0, w8
	mov	x0, x20
	bl	_MV_SPI_WRITE
Lloh59:
	adrp	x8, _MV_SPI_INTR_MASK@GOTPAGE
Lloh60:
	ldr	x8, [x8, _MV_SPI_INTR_MASK@GOTPAGEOFF]
Lloh61:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_MV_SPI_WRITE
	ldr	w1, [x22]
	mov	x0, x20
	mov	w2, #0
	bl	_MV_SPI_WRITE
	str	wzr, [x20]
	mov	x0, x19
	bl	_wakeup_one
	mov	x0, x20
	bl	_MV_SPI_UNLOCK
Lloh62:
	adrp	x8, _EIO@GOTPAGE
Lloh63:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
Lloh64:
	ldr	w8, [x8]
	cmp	w24, #0
	csel	w0, w8, wzr, eq
	b	LBB0_8
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"TX/RX command sizes should be equal"

l_.str.1:                               ; @.str.1
	.asciz	"TX/RX data sizes should be equal"

	.comm	_SPIBUS_CS_HIGH,4,2             ; @SPIBUS_CS_HIGH
l_.str.2:                               ; @.str.2
	.asciz	"Invalid mode %u requested by %s\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
l_.str.3:                               ; @.str.3
	.asciz	"Invalid clock %uHz requested by %s\n"

	.comm	_MV_SPI_BUSY,4,2                ; @MV_SPI_BUSY
l_.str.4:                               ; @.str.4
	.asciz	"mv_spi"

	.comm	_MV_SPI_CONF,4,2                ; @MV_SPI_CONF
	.comm	_MV_SPI_CONF_MODE_MASK,4,2      ; @MV_SPI_CONF_MODE_MASK
	.comm	_MV_SPI_CONF_CLOCK_MASK,4,2     ; @MV_SPI_CONF_CLOCK_MASK
	.comm	_MV_SPI_CONF_MODE_SHIFT,4,2     ; @MV_SPI_CONF_MODE_SHIFT
	.comm	_MV_SPI_CONF_CLOCK_SPR_MASK,4,2 ; @MV_SPI_CONF_CLOCK_SPR_MASK
	.comm	_MV_SPI_CONF_CLOCK_SPPR_MASK,4,2 ; @MV_SPI_CONF_CLOCK_SPPR_MASK
	.comm	_MV_SPI_CONF_CLOCK_SPPR_SHIFT,4,2 ; @MV_SPI_CONF_CLOCK_SPPR_SHIFT
	.comm	_MV_SPI_CONF_CLOCK_SPPRHI_MASK,4,2 ; @MV_SPI_CONF_CLOCK_SPPRHI_MASK
	.comm	_MV_SPI_CONF_CLOCK_SPPRHI_SHIFT,4,2 ; @MV_SPI_CONF_CLOCK_SPPRHI_SHIFT
	.comm	_MV_SPI_CONTROL,4,2             ; @MV_SPI_CONTROL
	.comm	_MV_SPI_CTRL_CS_MASK,4,2        ; @MV_SPI_CTRL_CS_MASK
	.comm	_MV_SPI_CTRL_CS_SHIFT,4,2       ; @MV_SPI_CTRL_CS_SHIFT
	.comm	_MV_SPI_CTRL_CS_ACTIVE,4,2      ; @MV_SPI_CTRL_CS_ACTIVE
	.comm	_MV_SPI_INTR_STAT,4,2           ; @MV_SPI_INTR_STAT
	.comm	_MV_SPI_CTRL_SMEMREADY,4,2      ; @MV_SPI_CTRL_SMEMREADY
	.comm	_MV_SPI_INTR_MASK,4,2           ; @MV_SPI_INTR_MASK
	.comm	_EIO,4,2                        ; @EIO
	.no_dead_strip	_mv_spi_transfer
.subsections_via_symbols
