	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_i2c_hw_init
_tegra_i2c_hw_init:                     ## @tegra_i2c_hw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	8(%rdi), %edi
	callq	_hwreset_assert
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	movl	%eax, %ebx
	movl	(%r14), %edi
	leaq	L_.str(%rip), %rsi
	callq	_device_printf
	jmp	LBB0_9
LBB0_2:
	movl	$10, %edi
	callq	_DELAY
	movl	8(%r14), %edi
	callq	_hwreset_deassert
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	movl	%eax, %ebx
	movl	(%r14), %edi
	leaq	L_.str.1(%rip), %rsi
	callq	_device_printf
	jmp	LBB0_9
LBB0_4:
	movq	_I2C_INTERRUPT_MASK_REGISTER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_WR4
	movq	_I2C_INTERRUPT_STATUS_REGISTER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$-1, %edx
	callq	_WR4
	movq	_I2C_CNFG@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_I2C_CNFG_NEW_MASTER_FSM@GOTPCREL(%rip), %rax
	movq	_I2C_CNFG_PACKET_MODE_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movl	$2, %edi
	callq	_I2C_CNFG_DEBOUNCE_CNT
	orl	%eax, %ebx
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%ebx, %edx
	callq	_WR4
	movl	4(%r14), %esi
	movq	%r14, %rdi
	callq	_tegra_i2c_setup_clk
	movq	_I2C_FIFO_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	$7, %edi
	callq	_I2C_FIFO_CONTROL_TX_FIFO_TRIG
	movl	%eax, %ebx
	xorl	%edi, %edi
	callq	_I2C_FIFO_CONTROL_RX_FIFO_TRIG
	orl	%eax, %ebx
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%ebx, %edx
	callq	_WR4
	movq	_I2C_CONFIG_LOAD@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_WR4
	movl	$1001, %ebx                     ## imm = 0x3E9
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_RD4
	testq	%rax, %rax
	je	LBB0_8
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movl	$10, %edi
	callq	_DELAY
	decl	%ebx
	cmpl	$1, %ebx
	ja	LBB0_5
## %bb.7:
	movl	(%r14), %edi
	leaq	L_.str.2(%rip), %rsi
	callq	_device_printf
LBB0_8:
	movq	%r14, %rdi
	callq	_tegra_i2c_bus_clear
	xorl	%ebx, %ebx
LBB0_9:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Cannot assert reset\n"

L_.str.1:                               ## @.str.1
	.asciz	"Cannot clear reset\n"

	.comm	_I2C_INTERRUPT_MASK_REGISTER,4,2 ## @I2C_INTERRUPT_MASK_REGISTER
	.comm	_I2C_INTERRUPT_STATUS_REGISTER,4,2 ## @I2C_INTERRUPT_STATUS_REGISTER
	.comm	_I2C_CNFG,4,2                   ## @I2C_CNFG
	.comm	_I2C_CNFG_NEW_MASTER_FSM,4,2    ## @I2C_CNFG_NEW_MASTER_FSM
	.comm	_I2C_CNFG_PACKET_MODE_EN,4,2    ## @I2C_CNFG_PACKET_MODE_EN
	.comm	_I2C_FIFO_CONTROL,4,2           ## @I2C_FIFO_CONTROL
	.comm	_I2C_CONFIG_LOAD,4,2            ## @I2C_CONFIG_LOAD
	.comm	_I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD,4,2 ## @I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD
L_.str.2:                               ## @.str.2
	.asciz	"config load timeouted\n"

	.no_dead_strip	_tegra_i2c_hw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_i2c_hw_init
_tegra_i2c_hw_init:                     ; @tegra_i2c_hw_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x0, #8]
	bl	_hwreset_assert
	cbz	w0, LBB0_2
; %bb.1:
	mov	x20, x0
	ldr	w0, [x19]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_device_printf
	b	LBB0_9
LBB0_2:
	mov	w0, #10
	bl	_DELAY
	ldr	w0, [x19, #8]
	bl	_hwreset_deassert
	cbz	w0, LBB0_4
; %bb.3:
	mov	x20, x0
	ldr	w0, [x19]
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_device_printf
	b	LBB0_9
LBB0_4:
Lloh4:
	adrp	x8, _I2C_INTERRUPT_MASK_REGISTER@GOTPAGE
Lloh5:
	ldr	x8, [x8, _I2C_INTERRUPT_MASK_REGISTER@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_WR4
Lloh7:
	adrp	x8, _I2C_INTERRUPT_STATUS_REGISTER@GOTPAGE
Lloh8:
	ldr	x8, [x8, _I2C_INTERRUPT_STATUS_REGISTER@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #-1
	bl	_WR4
Lloh10:
	adrp	x8, _I2C_CNFG@GOTPAGE
Lloh11:
	ldr	x8, [x8, _I2C_CNFG@GOTPAGEOFF]
Lloh12:
	adrp	x9, _I2C_CNFG_NEW_MASTER_FSM@GOTPAGE
Lloh13:
	ldr	x9, [x9, _I2C_CNFG_NEW_MASTER_FSM@GOTPAGEOFF]
Lloh14:
	ldr	w20, [x8]
Lloh15:
	ldr	w8, [x9]
Lloh16:
	adrp	x9, _I2C_CNFG_PACKET_MODE_EN@GOTPAGE
Lloh17:
	ldr	x9, [x9, _I2C_CNFG_PACKET_MODE_EN@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	orr	w21, w9, w8
	mov	w0, #2
	bl	_I2C_CNFG_DEBOUNCE_CNT
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_WR4
	ldr	w1, [x19, #4]
	mov	x0, x19
	bl	_tegra_i2c_setup_clk
Lloh19:
	adrp	x8, _I2C_FIFO_CONTROL@GOTPAGE
Lloh20:
	ldr	x8, [x8, _I2C_FIFO_CONTROL@GOTPAGEOFF]
Lloh21:
	ldr	w20, [x8]
	mov	w0, #7
	bl	_I2C_FIFO_CONTROL_TX_FIFO_TRIG
	mov	x21, x0
	mov	w0, #0
	bl	_I2C_FIFO_CONTROL_RX_FIFO_TRIG
	orr	w2, w0, w21
	mov	x0, x19
	mov	x1, x20
	bl	_WR4
Lloh22:
	adrp	x20, _I2C_CONFIG_LOAD@GOTPAGE
Lloh23:
	ldr	x20, [x20, _I2C_CONFIG_LOAD@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh24:
	adrp	x8, _I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD@GOTPAGE
Lloh25:
	ldr	x8, [x8, _I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_WR4
	mov	w21, #1001
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x20]
	mov	x0, x19
	bl	_RD4
	cbz	x0, LBB0_8
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	mov	w0, #10
	bl	_DELAY
	sub	w21, w21, #1
	cmp	w21, #1
	b.hi	LBB0_5
; %bb.7:
	ldr	w0, [x19]
Lloh27:
	adrp	x1, l_.str.2@PAGE
Lloh28:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_device_printf
LBB0_8:
	mov	x0, x19
	bl	_tegra_i2c_bus_clear
	mov	w20, #0
LBB0_9:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh14
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh27, Lloh28
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Cannot assert reset\n"

l_.str.1:                               ; @.str.1
	.asciz	"Cannot clear reset\n"

	.comm	_I2C_INTERRUPT_MASK_REGISTER,4,2 ; @I2C_INTERRUPT_MASK_REGISTER
	.comm	_I2C_INTERRUPT_STATUS_REGISTER,4,2 ; @I2C_INTERRUPT_STATUS_REGISTER
	.comm	_I2C_CNFG,4,2                   ; @I2C_CNFG
	.comm	_I2C_CNFG_NEW_MASTER_FSM,4,2    ; @I2C_CNFG_NEW_MASTER_FSM
	.comm	_I2C_CNFG_PACKET_MODE_EN,4,2    ; @I2C_CNFG_PACKET_MODE_EN
	.comm	_I2C_FIFO_CONTROL,4,2           ; @I2C_FIFO_CONTROL
	.comm	_I2C_CONFIG_LOAD,4,2            ; @I2C_CONFIG_LOAD
	.comm	_I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD,4,2 ; @I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD
l_.str.2:                               ; @.str.2
	.asciz	"config load timeouted\n"

	.no_dead_strip	_tegra_i2c_hw_init
.subsections_via_symbols
