	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_mc_intr
_tegra_mc_intr:                         ## @tegra_mc_intr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_MC_INTSTATUS@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_RD4
	movl	%eax, %ebx
	movq	_MC_INT_INT_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_1
## %bb.3:
	movl	(%r14), %edi
	leaq	L_.str(%rip), %rsi
	callq	_device_printf
	movq	_MC_INT_DECERR_MTS@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_5
## %bb.4:
	leaq	L_str.21(%rip), %rdi
	callq	_puts
LBB0_5:
	movq	_MC_INT_SECERR_SEC@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_7
## %bb.6:
	leaq	L_str.20(%rip), %rdi
	callq	_puts
LBB0_7:
	movq	_MC_INT_DECERR_VPR@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_9
## %bb.8:
	leaq	L_str.19(%rip), %rdi
	callq	_puts
LBB0_9:
	movq	_MC_INT_INVALID_APB_ASID_UPDATE@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_11
## %bb.10:
	leaq	L_str.18(%rip), %rdi
	callq	_puts
LBB0_11:
	movq	_MC_INT_INVALID_SMMU_PAGE@GOTPCREL(%rip), %r15
	testl	%ebx, (%r15)
	je	LBB0_13
## %bb.12:
	leaq	L_str.17(%rip), %rdi
	callq	_puts
LBB0_13:
	movq	_MC_INT_ARBITRATION_EMEM@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_15
## %bb.14:
	leaq	L_str.16(%rip), %rdi
	callq	_puts
LBB0_15:
	movq	_MC_INT_SECURITY_VIOLATION@GOTPCREL(%rip), %r12
	testl	%ebx, (%r12)
	je	LBB0_17
## %bb.16:
	leaq	L_str.15(%rip), %rdi
	callq	_puts
LBB0_17:
	movq	_MC_INT_DECERR_EMEM@GOTPCREL(%rip), %r13
	movl	(%r13), %eax
	testl	%ebx, %eax
	je	LBB0_19
## %bb.18:
	leaq	L_str(%rip), %rdi
	callq	_puts
	movl	(%r13), %eax
LBB0_19:
	movl	(%r12), %ecx
	orl	(%r15), %ecx
	orl	%eax, %ecx
	testl	%ebx, %ecx
	je	LBB0_21
## %bb.20:
	movq	_MC_ERR_STATUS@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_RD4
	movl	%eax, %r12d
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_RD4
	movl	%r12d, %edi
	callq	_MC_ERR_ADR_HI
	movq	_MC_ERR_SWAP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%ebx, %eax
	leaq	L_.str.11(%rip), %rax
	leaq	L_.str.10(%rip), %r12
	cmoveq	%rax, %r12
	movq	_MC_ERR_SECURITY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%ebx, %ecx
	leaq	L_.str.12(%rip), %r13
	cmoveq	%rax, %r13
	movq	_MC_ERR_RW@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%ebx, %eax
	leaq	L_.str.14(%rip), %rax
	leaq	L_.str.13(%rip), %r15
	cmoveq	%rax, %r15
	movq	_smmu_err_tbl@GOTPCREL(%rip), %rax
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movq	(%rax), %r14
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_MC_ERR_TYPE
	movl	(%r14,%rax,4), %r9d
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	leaq	L_.str.9(%rip), %rdi
	movq	%r12, %rdx
	movq	%r13, %rcx
	movq	%r15, %r8
	xorl	%eax, %eax
	callq	_printf
LBB0_21:
	movq	_MC_INTSTATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	jmp	LBB0_2
LBB0_1:
	movl	(%r15), %esi
LBB0_2:
	movq	%r14, %rdi
	movl	%ebx, %edx
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WR4                            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MC_INTSTATUS,4,2               ## @MC_INTSTATUS
	.comm	_MC_INT_INT_MASK,4,2            ## @MC_INT_INT_MASK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Memory Controller Interrupt:\n"

	.comm	_MC_INT_DECERR_MTS,4,2          ## @MC_INT_DECERR_MTS
	.comm	_MC_INT_SECERR_SEC,4,2          ## @MC_INT_SECERR_SEC
	.comm	_MC_INT_DECERR_VPR,4,2          ## @MC_INT_DECERR_VPR
	.comm	_MC_INT_INVALID_APB_ASID_UPDATE,4,2 ## @MC_INT_INVALID_APB_ASID_UPDATE
	.comm	_MC_INT_INVALID_SMMU_PAGE,4,2   ## @MC_INT_INVALID_SMMU_PAGE
	.comm	_MC_INT_ARBITRATION_EMEM,4,2    ## @MC_INT_ARBITRATION_EMEM
	.comm	_MC_INT_SECURITY_VIOLATION,4,2  ## @MC_INT_SECURITY_VIOLATION
	.comm	_MC_INT_DECERR_EMEM,4,2         ## @MC_INT_DECERR_EMEM
	.comm	_MC_ERR_STATUS,4,2              ## @MC_ERR_STATUS
L_.str.9:                               ## @.str.9
	.asciz	" at 0x%012llX [%s %s %s]  - %s error.\n"

	.comm	_MC_ERR_SWAP,4,2                ## @MC_ERR_SWAP
L_.str.10:                              ## @.str.10
	.asciz	"Swap, "

L_.str.11:                              ## @.str.11
	.space	1

	.comm	_MC_ERR_SECURITY,4,2            ## @MC_ERR_SECURITY
L_.str.12:                              ## @.str.12
	.asciz	"Sec, "

	.comm	_MC_ERR_RW,4,2                  ## @MC_ERR_RW
L_.str.13:                              ## @.str.13
	.asciz	"Write"

L_.str.14:                              ## @.str.14
	.asciz	"Read"

	.comm	_smmu_err_tbl,8,3               ## @smmu_err_tbl
L_str:                                  ## @str
	.asciz	" - SMMU address decode error"

L_str.15:                               ## @str.15
	.asciz	" - SMMU address translation security error"

L_str.16:                               ## @str.16
	.asciz	" - arbitration deadlock-prevention threshold hit"

L_str.17:                               ## @str.17
	.asciz	" - SMMU address translation error"

L_str.18:                               ## @str.18
	.asciz	" - ivalid APB ASID update"

L_str.19:                               ## @str.19
	.asciz	" - VPR requirements violated"

L_str.20:                               ## @str.20
	.asciz	" - SEC carveout violation"

L_str.21:                               ## @str.21
	.asciz	" - MTS carveout violation"

	.no_dead_strip	_tegra_mc_intr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_mc_intr
_tegra_mc_intr:                         ; @tegra_mc_intr
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x22, _MC_INTSTATUS@GOTPAGE
Lloh1:
	ldr	x22, [x22, _MC_INTSTATUS@GOTPAGEOFF]
	ldr	w1, [x22]
	bl	_RD4
	mov	x20, x0
Lloh2:
	adrp	x8, _MC_INT_INT_MASK@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MC_INT_INT_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_19
; %bb.1:
	ldr	w0, [x19]
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	bl	_device_printf
Lloh7:
	adrp	x8, _MC_INT_DECERR_MTS@GOTPAGE
Lloh8:
	ldr	x8, [x8, _MC_INT_DECERR_MTS@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_3
; %bb.2:
Lloh10:
	adrp	x0, l_str.21@PAGE
Lloh11:
	add	x0, x0, l_str.21@PAGEOFF
	bl	_puts
LBB0_3:
Lloh12:
	adrp	x8, _MC_INT_SECERR_SEC@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MC_INT_SECERR_SEC@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_5
; %bb.4:
Lloh15:
	adrp	x0, l_str.20@PAGE
Lloh16:
	add	x0, x0, l_str.20@PAGEOFF
	bl	_puts
LBB0_5:
Lloh17:
	adrp	x8, _MC_INT_DECERR_VPR@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MC_INT_DECERR_VPR@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_7
; %bb.6:
Lloh20:
	adrp	x0, l_str.19@PAGE
Lloh21:
	add	x0, x0, l_str.19@PAGEOFF
	bl	_puts
LBB0_7:
Lloh22:
	adrp	x8, _MC_INT_INVALID_APB_ASID_UPDATE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _MC_INT_INVALID_APB_ASID_UPDATE@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_9
; %bb.8:
Lloh25:
	adrp	x0, l_str.18@PAGE
Lloh26:
	add	x0, x0, l_str.18@PAGEOFF
	bl	_puts
LBB0_9:
Lloh27:
	adrp	x21, _MC_INT_INVALID_SMMU_PAGE@GOTPAGE
Lloh28:
	ldr	x21, [x21, _MC_INT_INVALID_SMMU_PAGE@GOTPAGEOFF]
	ldr	w8, [x21]
	tst	w8, w20
	b.eq	LBB0_11
; %bb.10:
Lloh29:
	adrp	x0, l_str.17@PAGE
Lloh30:
	add	x0, x0, l_str.17@PAGEOFF
	bl	_puts
LBB0_11:
Lloh31:
	adrp	x8, _MC_INT_ARBITRATION_EMEM@GOTPAGE
Lloh32:
	ldr	x8, [x8, _MC_INT_ARBITRATION_EMEM@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_13
; %bb.12:
Lloh34:
	adrp	x0, l_str.16@PAGE
Lloh35:
	add	x0, x0, l_str.16@PAGEOFF
	bl	_puts
LBB0_13:
Lloh36:
	adrp	x23, _MC_INT_SECURITY_VIOLATION@GOTPAGE
Lloh37:
	ldr	x23, [x23, _MC_INT_SECURITY_VIOLATION@GOTPAGEOFF]
	ldr	w8, [x23]
	tst	w8, w20
	b.eq	LBB0_15
; %bb.14:
Lloh38:
	adrp	x0, l_str.15@PAGE
Lloh39:
	add	x0, x0, l_str.15@PAGEOFF
	bl	_puts
LBB0_15:
Lloh40:
	adrp	x24, _MC_INT_DECERR_EMEM@GOTPAGE
Lloh41:
	ldr	x24, [x24, _MC_INT_DECERR_EMEM@GOTPAGEOFF]
	ldr	w8, [x24]
	tst	w8, w20
	b.eq	LBB0_17
; %bb.16:
Lloh42:
	adrp	x0, l_str@PAGE
Lloh43:
	add	x0, x0, l_str@PAGEOFF
	bl	_puts
	ldr	w8, [x24]
LBB0_17:
	ldr	w9, [x21]
	ldr	w10, [x23]
	orr	w9, w10, w9
	orr	w8, w9, w8
	tst	w8, w20
	b.eq	LBB0_19
; %bb.18:
Lloh44:
	adrp	x23, _MC_ERR_STATUS@GOTPAGE
Lloh45:
	ldr	x23, [x23, _MC_ERR_STATUS@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	bl	_RD4
	mov	x21, x0
	ldr	w1, [x23]
	mov	x0, x19
	bl	_RD4
	mov	x0, x21
	bl	_MC_ERR_ADR_HI
Lloh46:
	adrp	x8, _MC_ERR_SWAP@GOTPAGE
Lloh47:
	ldr	x8, [x8, _MC_ERR_SWAP@GOTPAGEOFF]
Lloh48:
	adrp	x9, l_.str.10@PAGE
Lloh49:
	add	x9, x9, l_.str.10@PAGEOFF
Lloh50:
	ldr	w8, [x8]
Lloh51:
	adrp	x10, l_.str.11@PAGE
Lloh52:
	add	x10, x10, l_.str.11@PAGEOFF
	tst	w8, w20
Lloh53:
	adrp	x8, _MC_ERR_SECURITY@GOTPAGE
Lloh54:
	ldr	x8, [x8, _MC_ERR_SECURITY@GOTPAGEOFF]
	csel	x23, x10, x9, eq
Lloh55:
	ldr	w8, [x8]
Lloh56:
	adrp	x9, l_.str.12@PAGE
Lloh57:
	add	x9, x9, l_.str.12@PAGEOFF
	tst	w8, w20
	csel	x24, x10, x9, eq
Lloh58:
	adrp	x8, _MC_ERR_RW@GOTPAGE
Lloh59:
	ldr	x8, [x8, _MC_ERR_RW@GOTPAGEOFF]
Lloh60:
	adrp	x9, l_.str.13@PAGE
Lloh61:
	add	x9, x9, l_.str.13@PAGEOFF
Lloh62:
	adrp	x10, l_.str.14@PAGE
Lloh63:
	add	x10, x10, l_.str.14@PAGEOFF
Lloh64:
	ldr	w8, [x8]
	tst	w8, w20
	csel	x25, x10, x9, eq
Lloh65:
	adrp	x8, _smmu_err_tbl@GOTPAGE
Lloh66:
	ldr	x8, [x8, _smmu_err_tbl@GOTPAGEOFF]
Lloh67:
	ldr	x26, [x8]
	mov	x0, x21
	bl	_MC_ERR_TYPE
	ldr	w8, [x26, x0, lsl #2]
	stp	x25, x8, [sp, #24]
	stp	x23, x24, [sp, #8]
Lloh68:
	adrp	x0, l_.str.9@PAGE
Lloh69:
	add	x0, x0, l_.str.9@PAGEOFF
	bl	_printf
LBB0_19:
	ldr	w1, [x22]
	mov	x0, x19
	mov	x2, x20
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #128
	b	_WR4
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpAdd	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpAdd	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpAdd	Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpAdd	Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh64
	.loh AdrpAdd	Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpAdd	Lloh51, Lloh52
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh50
	.loh AdrpLdrGot	Lloh44, Lloh45
	.cfi_endproc
                                        ; -- End function
	.comm	_MC_INTSTATUS,4,2               ; @MC_INTSTATUS
	.comm	_MC_INT_INT_MASK,4,2            ; @MC_INT_INT_MASK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Memory Controller Interrupt:\n"

	.comm	_MC_INT_DECERR_MTS,4,2          ; @MC_INT_DECERR_MTS
	.comm	_MC_INT_SECERR_SEC,4,2          ; @MC_INT_SECERR_SEC
	.comm	_MC_INT_DECERR_VPR,4,2          ; @MC_INT_DECERR_VPR
	.comm	_MC_INT_INVALID_APB_ASID_UPDATE,4,2 ; @MC_INT_INVALID_APB_ASID_UPDATE
	.comm	_MC_INT_INVALID_SMMU_PAGE,4,2   ; @MC_INT_INVALID_SMMU_PAGE
	.comm	_MC_INT_ARBITRATION_EMEM,4,2    ; @MC_INT_ARBITRATION_EMEM
	.comm	_MC_INT_SECURITY_VIOLATION,4,2  ; @MC_INT_SECURITY_VIOLATION
	.comm	_MC_INT_DECERR_EMEM,4,2         ; @MC_INT_DECERR_EMEM
	.comm	_MC_ERR_STATUS,4,2              ; @MC_ERR_STATUS
l_.str.9:                               ; @.str.9
	.asciz	" at 0x%012llX [%s %s %s]  - %s error.\n"

	.comm	_MC_ERR_SWAP,4,2                ; @MC_ERR_SWAP
l_.str.10:                              ; @.str.10
	.asciz	"Swap, "

l_.str.11:                              ; @.str.11
	.space	1

	.comm	_MC_ERR_SECURITY,4,2            ; @MC_ERR_SECURITY
l_.str.12:                              ; @.str.12
	.asciz	"Sec, "

	.comm	_MC_ERR_RW,4,2                  ; @MC_ERR_RW
l_.str.13:                              ; @.str.13
	.asciz	"Write"

l_.str.14:                              ; @.str.14
	.asciz	"Read"

	.comm	_smmu_err_tbl,8,3               ; @smmu_err_tbl
l_str:                                  ; @str
	.asciz	" - SMMU address decode error"

l_str.15:                               ; @str.15
	.asciz	" - SMMU address translation security error"

l_str.16:                               ; @str.16
	.asciz	" - arbitration deadlock-prevention threshold hit"

l_str.17:                               ; @str.17
	.asciz	" - SMMU address translation error"

l_str.18:                               ; @str.18
	.asciz	" - ivalid APB ASID update"

l_str.19:                               ; @str.19
	.asciz	" - VPR requirements violated"

l_str.20:                               ; @str.20
	.asciz	" - SEC carveout violation"

l_str.21:                               ; @str.21
	.asciz	" - MTS carveout violation"

	.no_dead_strip	_tegra_mc_intr
.subsections_via_symbols
