	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra124_cpufreq_settings
_tegra124_cpufreq_settings:             ## @tegra124_cpufreq_settings
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	testq	%rsi, %rsi
	je	LBB0_2
## %bb.1:
	movq	%rdx, %r14
	testq	%rdx, %rdx
	je	LBB0_2
## %bb.3:
	movq	%rsi, %r13
	movl	%edi, %r15d
	callq	_device_get_softc
	movq	%rax, %r12
	movq	_CPUFREQ_VAL_UNKNOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	shll	$4, %edx
	movq	%r13, %rdi
	callq	_memset
	movl	(%r12), %edi
	movl	(%r14), %esi
	callq	_min
	movl	(%r12), %ecx
	xorl	%eax, %eax
	movl	$0, %edx
	testl	%ecx, %ecx
	jle	LBB0_8
## %bb.4:
	movl	4(%r12), %r8d
	movq	16(%r12), %r9
	incq	%rcx
	xorl	%edx, %edx
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_5 Depth=1
	decq	%rcx
	cmpq	$1, %rcx
	jbe	LBB0_8
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	leal	-2(%rcx), %esi
	movl	(%r9,%rsi,8), %ebx
	cmpl	%ebx, %r8d
	jl	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movslq	%ebx, %rbx
	imulq	$1125899907, %rbx, %rbx         ## imm = 0x431BDE83
	movq	%rbx, %rdi
	shrq	$63, %rdi
	sarq	$50, %rbx
	addl	%edi, %ebx
	movslq	%edx, %rdx
	movq	%rdx, %rdi
	shlq	$4, %rdi
	movl	%ebx, (%r13,%rdi)
	movslq	4(%r9,%rsi,8), %rsi
	imulq	$274877907, %rsi, %rsi          ## imm = 0x10624DD3
	movq	%rsi, %rbx
	shrq	$63, %rbx
	sarq	$38, %rsi
	addl	%ebx, %esi
	movl	%esi, 4(%r13,%rdi)
	movl	8(%r12), %esi
	movl	%esi, 12(%r13,%rdi)
	movl	%r15d, 8(%r13,%rdi)
	incl	%edx
	jmp	LBB0_7
LBB0_2:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	jmp	LBB0_9
LBB0_8:
	movl	%edx, (%r14)
LBB0_9:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_CPUFREQ_VAL_UNKNOWN,4,2        ## @CPUFREQ_VAL_UNKNOWN
	.no_dead_strip	_tegra124_cpufreq_settings
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra124_cpufreq_settings
_tegra124_cpufreq_settings:             ; @tegra124_cpufreq_settings
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	cbz	x1, LBB0_7
; %bb.1:
	mov	x19, x2
	cbz	x2, LBB0_7
; %bb.2:
	mov	x20, x1
	mov	x21, x0
	bl	_device_get_softc
	mov	x22, x0
Lloh0:
	adrp	x8, _CPUFREQ_VAL_UNKNOWN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CPUFREQ_VAL_UNKNOWN@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	ldr	w8, [x19]
	lsl	w2, w8, #4
	mov	x0, x20
	bl	_memset
	ldr	w0, [x22]
	ldr	w1, [x19]
	bl	_min
	ldr	w11, [x22]
	cmp	w11, #1
	b.lt	LBB0_8
; %bb.3:
	mov	w8, #0
	ldr	w9, [x22, #4]
	ldr	x10, [x22, #16]
	add	x11, x11, #1
	mov	w12, #56963
	movk	w12, #17179, lsl #16
	mov	w13, #19923
	movk	w13, #4194, lsl #16
	b	LBB0_5
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
	sub	x11, x11, #1
	cmp	x11, #1
	b.ls	LBB0_9
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	sub	w14, w11, #2
	lsl	x15, x14, #3
	ldr	w15, [x10, x15]
	cmp	w9, w15
	b.lt	LBB0_4
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	smull	x15, w15, w12
	lsr	x16, x15, #63
	asr	x15, x15, #50
	add	w15, w15, w16
	add	x14, x10, x14, lsl #3
	ldrsw	x14, [x14, #4]
	mul	x14, x14, x13
	lsr	x16, x14, #63
	asr	x14, x14, #38
	add	w14, w14, w16
	add	x16, x20, w8, sxtw #4
	stp	w15, w14, [x16]
	ldr	w14, [x22, #8]
	stp	w21, w14, [x16, #8]
	add	w8, w8, #1
	b	LBB0_4
LBB0_7:
Lloh3:
	adrp	x8, _EINVAL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	b	LBB0_10
LBB0_8:
	mov	w8, #0
LBB0_9:
	mov	w0, #0
	str	w8, [x19]
LBB0_10:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_CPUFREQ_VAL_UNKNOWN,4,2        ; @CPUFREQ_VAL_UNKNOWN
	.no_dead_strip	_tegra124_cpufreq_settings
.subsections_via_symbols
