	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function _socfpga_mp_start_ap
__socfpga_mp_start_ap:                  ## @_socfpga_mp_start_ap
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edi, %r15d
	leaq	L_.str(%rip), %rdi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	_panic
	movq	_fdtbus_bs_tag@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_RSTMGR_PHYSBASE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RSTMGR_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-48(%rbp), %r8
	xorl	%ecx, %ecx
	callq	_bus_space_map
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	leaq	L_.str.1(%rip), %rdi
	xorl	%eax, %eax
	callq	_panic
LBB0_2:
	movl	(%r12), %edi
	movq	_RAM_PHYSBASE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RAM_SIZE@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	leaq	-44(%rbp), %r8
	xorl	%ecx, %ecx
	callq	_bus_space_map
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	leaq	L_.str.2(%rip), %rdi
	xorl	%eax, %eax
	callq	_panic
LBB0_4:
	movl	(%r12), %edi
	movq	_SCU_INV_TAGS_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_bus_space_write_4
	movl	(%r12), %edi
	movq	_SCU_DIAG_CONTROL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	callq	_bus_space_read_4
	movq	_SCU_DIAG_DISABLE_MIGBIT@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r12), %edi
	movl	(%rbx), %edx
	movl	%eax, %ecx
	callq	_bus_space_write_4
	leaq	L_.str(%rip), %r14
	movq	%r14, %rdi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	_panic
	movl	(%r12), %edi
	movq	_SCU_CONTROL_REG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	callq	_bus_space_read_4
	movq	_SCU_CONTROL_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r12), %edi
	movl	(%rbx), %edx
	movl	%eax, %ecx
	callq	_bus_space_write_4
	movq	_mpentry@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_pmap_kextract
	movq	_mpentry_addr@GOTPCREL(%rip), %rcx
	movq	%rax, (%rcx)
	movl	(%r12), %edi
	movl	-44(%rbp), %esi
	movq	_socfpga_trampoline@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	movl	$8, %r8d
	callq	_bus_space_write_region_4
	xorl	%eax, %eax
	callq	_dcache_wbinv_poc_all
	movq	%r14, %rdi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	_panic
	xorl	%eax, %eax
	callq	_dsb
	xorl	%eax, %eax
	callq	_sev
	movl	(%r12), %edi
	movq	_SCU_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_bus_space_unmap
	movl	(%r12), %edi
	movl	-48(%rbp), %esi
	movq	_RSTMGR_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_bus_space_unmap
	movl	(%r12), %edi
	movl	-44(%rbp), %esi
	movl	(%r13), %edx
	callq	_bus_space_unmap
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Unknown platform id %d\n"

	.comm	_fdtbus_bs_tag,4,2              ## @fdtbus_bs_tag
	.comm	_RSTMGR_PHYSBASE,4,2            ## @RSTMGR_PHYSBASE
	.comm	_RSTMGR_SIZE,4,2                ## @RSTMGR_SIZE
L_.str.1:                               ## @.str.1
	.asciz	"Couldn't map the reset manager (RSTMGR)\n"

	.comm	_RAM_PHYSBASE,4,2               ## @RAM_PHYSBASE
	.comm	_RAM_SIZE,4,2                   ## @RAM_SIZE
L_.str.2:                               ## @.str.2
	.asciz	"Couldn't map the first physram page\n"

	.comm	_SCU_INV_TAGS_REG,4,2           ## @SCU_INV_TAGS_REG
	.comm	_SCU_DIAG_CONTROL,4,2           ## @SCU_DIAG_CONTROL
	.comm	_SCU_DIAG_DISABLE_MIGBIT,4,2    ## @SCU_DIAG_DISABLE_MIGBIT
	.comm	_SCU_CONTROL_REG,4,2            ## @SCU_CONTROL_REG
	.comm	_SCU_CONTROL_ENABLE,4,2         ## @SCU_CONTROL_ENABLE
	.comm	_mpentry,8,3                    ## @mpentry
	.comm	_mpentry_addr,8,3               ## @mpentry_addr
	.comm	_socfpga_trampoline,4,2         ## @socfpga_trampoline
	.comm	_SCU_SIZE,4,2                   ## @SCU_SIZE
	.comm	_MPUMODRST_CPU1,4,2             ## @MPUMODRST_CPU1
	.comm	_RSTMGR_A10_MPUMODRST,4,2       ## @RSTMGR_A10_MPUMODRST
	.comm	_RSTMGR_MPUMODRST,4,2           ## @RSTMGR_MPUMODRST
	.comm	_SCU_PHYSBASE,4,2               ## @SCU_PHYSBASE
	.comm	_SCU_PHYSBASE_A10,4,2           ## @SCU_PHYSBASE_A10
	.no_dead_strip	__socfpga_mp_start_ap
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function _socfpga_mp_start_ap
__socfpga_mp_start_ap:                  ; @_socfpga_mp_start_ap
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	str	x19, [sp]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_panic
Lloh2:
	adrp	x20, _fdtbus_bs_tag@GOTPAGE
Lloh3:
	ldr	x20, [x20, _fdtbus_bs_tag@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh4:
	adrp	x8, _RSTMGR_PHYSBASE@GOTPAGE
Lloh5:
	ldr	x8, [x8, _RSTMGR_PHYSBASE@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
Lloh7:
	adrp	x21, _RSTMGR_SIZE@GOTPAGE
Lloh8:
	ldr	x21, [x21, _RSTMGR_SIZE@GOTPAGEOFF]
	ldr	w2, [x21]
	add	x4, sp, #12
	mov	w3, #0
	bl	_bus_space_map
	cbz	x0, LBB0_2
; %bb.1:
Lloh9:
	adrp	x0, l_.str.1@PAGE
Lloh10:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_panic
LBB0_2:
	ldr	w0, [x20]
Lloh11:
	adrp	x8, _RAM_PHYSBASE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _RAM_PHYSBASE@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
Lloh14:
	adrp	x22, _RAM_SIZE@GOTPAGE
Lloh15:
	ldr	x22, [x22, _RAM_SIZE@GOTPAGEOFF]
	ldr	w2, [x22]
	add	x4, sp, #8
	mov	w3, #0
	bl	_bus_space_map
	cbz	x0, LBB0_4
; %bb.3:
Lloh16:
	adrp	x0, l_.str.2@PAGE
Lloh17:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_panic
LBB0_4:
	ldr	w0, [x20]
Lloh18:
	adrp	x8, _SCU_INV_TAGS_REG@GOTPAGE
Lloh19:
	ldr	x8, [x8, _SCU_INV_TAGS_REG@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	w3, #65535
	bl	_bus_space_write_4
	ldr	w0, [x20]
Lloh21:
	adrp	x23, _SCU_DIAG_CONTROL@GOTPAGE
Lloh22:
	ldr	x23, [x23, _SCU_DIAG_CONTROL@GOTPAGEOFF]
	ldr	w2, [x23]
	bl	_bus_space_read_4
Lloh23:
	adrp	x8, _SCU_DIAG_DISABLE_MIGBIT@GOTPAGE
Lloh24:
	ldr	x8, [x8, _SCU_DIAG_DISABLE_MIGBIT@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	orr	w3, w8, w0
	ldr	w0, [x20]
	ldr	w2, [x23]
	bl	_bus_space_write_4
	mov	x23, x19
	str	x23, [sp]
Lloh26:
	adrp	x19, l_.str@PAGE
Lloh27:
	add	x19, x19, l_.str@PAGEOFF
	mov	x0, x19
	bl	_panic
	ldr	w0, [x20]
Lloh28:
	adrp	x24, _SCU_CONTROL_REG@GOTPAGE
Lloh29:
	ldr	x24, [x24, _SCU_CONTROL_REG@GOTPAGEOFF]
	ldr	w2, [x24]
	bl	_bus_space_read_4
Lloh30:
	adrp	x8, _SCU_CONTROL_ENABLE@GOTPAGE
Lloh31:
	ldr	x8, [x8, _SCU_CONTROL_ENABLE@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	orr	w3, w8, w0
	ldr	w0, [x20]
	ldr	w2, [x24]
	bl	_bus_space_write_4
Lloh33:
	adrp	x8, _mpentry@GOTPAGE
Lloh34:
	ldr	x8, [x8, _mpentry@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
	bl	_pmap_kextract
Lloh36:
	adrp	x8, _mpentry_addr@GOTPAGE
Lloh37:
	ldr	x8, [x8, _mpentry_addr@GOTPAGEOFF]
Lloh38:
	str	x0, [x8]
	ldr	w0, [x20]
	ldr	w1, [sp, #8]
Lloh39:
	adrp	x3, _socfpga_trampoline@GOTPAGE
Lloh40:
	ldr	x3, [x3, _socfpga_trampoline@GOTPAGEOFF]
	mov	w2, #0
	mov	w4, #8
	bl	_bus_space_write_region_4
	bl	_dcache_wbinv_poc_all
	str	x23, [sp]
	mov	x0, x19
	bl	_panic
	bl	_dsb
	bl	_sev
	ldr	w0, [x20]
Lloh41:
	adrp	x8, _SCU_SIZE@GOTPAGE
Lloh42:
	ldr	x8, [x8, _SCU_SIZE@GOTPAGEOFF]
Lloh43:
	ldr	w2, [x8]
	bl	_bus_space_unmap
	ldr	w0, [x20]
	ldr	w1, [sp, #12]
	ldr	w2, [x21]
	bl	_bus_space_unmap
	ldr	w0, [x20]
	ldr	w1, [sp, #8]
	ldr	w2, [x22]
	bl	_bus_space_unmap
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotStr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Unknown platform id %d\n"

	.comm	_fdtbus_bs_tag,4,2              ; @fdtbus_bs_tag
	.comm	_RSTMGR_PHYSBASE,4,2            ; @RSTMGR_PHYSBASE
	.comm	_RSTMGR_SIZE,4,2                ; @RSTMGR_SIZE
l_.str.1:                               ; @.str.1
	.asciz	"Couldn't map the reset manager (RSTMGR)\n"

	.comm	_RAM_PHYSBASE,4,2               ; @RAM_PHYSBASE
	.comm	_RAM_SIZE,4,2                   ; @RAM_SIZE
l_.str.2:                               ; @.str.2
	.asciz	"Couldn't map the first physram page\n"

	.comm	_SCU_INV_TAGS_REG,4,2           ; @SCU_INV_TAGS_REG
	.comm	_SCU_DIAG_CONTROL,4,2           ; @SCU_DIAG_CONTROL
	.comm	_SCU_DIAG_DISABLE_MIGBIT,4,2    ; @SCU_DIAG_DISABLE_MIGBIT
	.comm	_SCU_CONTROL_REG,4,2            ; @SCU_CONTROL_REG
	.comm	_SCU_CONTROL_ENABLE,4,2         ; @SCU_CONTROL_ENABLE
	.comm	_mpentry,8,3                    ; @mpentry
	.comm	_mpentry_addr,8,3               ; @mpentry_addr
	.comm	_socfpga_trampoline,4,2         ; @socfpga_trampoline
	.comm	_SCU_SIZE,4,2                   ; @SCU_SIZE
	.comm	_MPUMODRST_CPU1,4,2             ; @MPUMODRST_CPU1
	.comm	_RSTMGR_A10_MPUMODRST,4,2       ; @RSTMGR_A10_MPUMODRST
	.comm	_RSTMGR_MPUMODRST,4,2           ; @RSTMGR_MPUMODRST
	.comm	_SCU_PHYSBASE,4,2               ; @SCU_PHYSBASE
	.comm	_SCU_PHYSBASE_A10,4,2           ; @SCU_PHYSBASE_A10
	.no_dead_strip	__socfpga_mp_start_ap
.subsections_via_symbols
