	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ahci_a10_phy_reset
_ahci_a10_phy_reset:                    ## @ahci_a10_phy_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edi, -44(%rbp)                 ## 4-byte Spill
	callq	_device_get_softc
	movq	%rax, %r15
	movl	(%rax), %edi
	movq	_AHCI_RWCR@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	xorl	%edx, %edx
	callq	_ATA_OUTL
	movl	$100, %edi
	callq	_DELAY
	movl	(%r15), %edi
	movq	_AHCI_PHYCS1R@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_PHYCS1R_HIGHZ@GOTPCREL(%rip), %r14
	movq	(%r14), %rdx
	callq	_ahci_set
	movl	(%r15), %edi
	movq	_AHCI_PHYCS0R@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_PHYCS0R_UF2_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_PHYCS0R_UF2_INIT@GOTPCREL(%rip), %rax
	movq	_PHYCS0R_BIT23@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	notl	%edx
	movq	_PHYCS0R_BIT18@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	callq	_ahci_mask_set
	movl	(%r15), %edi
	movl	(%rbx), %esi
	movq	_PHYCS1R_UF1_MASK@GOTPCREL(%rip), %rax
	movq	_PHYCS1R_UF2_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_PHYCS1R_UF3_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_PHYCS1R_UF1_INIT@GOTPCREL(%rip), %rax
	movq	_PHYCS1R_UF2_INIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	notl	%edx
	movq	_PHYCS1R_UF3_INIT@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	callq	_ahci_mask_set
	movl	(%r15), %edi
	movl	(%rbx), %esi
	movq	_PHYCS1R_BIT15@GOTPCREL(%rip), %rax
	movq	_PHYCS1R_BIT28@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	orq	(%rax), %rdx
	callq	_ahci_set
	movl	(%r15), %edi
	movl	(%rbx), %esi
	movq	(%r14), %rdx
	callq	_ahci_clr
	movl	(%r15), %edi
	movl	(%r12), %esi
	movq	_PHYCS0R_UF1_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	_PHYCS0R_UF1_INIT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	callq	_ahci_mask_set
	movl	(%r15), %edi
	movq	_AHCI_PHYCS2R@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHYCS2R_UF1_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	_PHYCS2R_UF1_INIT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	callq	_ahci_mask_set
	movl	$100, %edi
	callq	_DELAY
	movl	(%r15), %edi
	movl	(%r12), %esi
	movq	_PHYCS0R_POWER_ENABLE@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	callq	_ahci_set
	movq	_PHY_RESET_TIMEOUT@GOTPCREL(%rip), %rbx
	movq	(%rbx), %r14
	testq	%r14, %r14
	jle	LBB0_1
## %bb.2:
	incq	%r14
	movq	_PHYCS0R_POWER_STATUS_MASK@GOTPCREL(%rip), %rbx
	movq	_PHYCS0R_PS_GOOD@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r15), %edi
	movq	_AHCI_PHYCS0R@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ATA_INL
	movq	%rax, %r12
	andq	(%rbx), %rax
	cmpq	(%r13), %rax
	je	LBB0_4
## %bb.5:                               ##   in Loop: Header=BB0_3 Depth=1
	movl	$10, %edi
	callq	_DELAY
	decq	%r14
	cmpq	$1, %r14
	jg	LBB0_3
## %bb.6:
	xorl	%r14d, %r14d
	movq	_AHCI_RWCR@GOTPCREL(%rip), %r13
	movq	_PHY_RESET_TIMEOUT@GOTPCREL(%rip), %rbx
	testq	%r14, %r14
	je	LBB0_8
	jmp	LBB0_10
LBB0_1:
                                        ## implicit-def: $r12
	testq	%r14, %r14
	jne	LBB0_10
LBB0_8:
	movq	_bootverbose@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_10
## %bb.9:
	leaq	L_.str(%rip), %rsi
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	movq	%r12, %rdx
	callq	_device_printf
	jmp	LBB0_10
LBB0_4:
	movq	_AHCI_RWCR@GOTPCREL(%rip), %r13
	movq	_PHY_RESET_TIMEOUT@GOTPCREL(%rip), %rbx
LBB0_10:
	movl	(%r15), %edi
	movq	_AHCI_PHYCS2R@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHYCS2R_CALIBRATE@GOTPCREL(%rip), %r14
	movq	(%r14), %rdx
	callq	_ahci_set
	movq	(%rbx), %rbx
	testq	%rbx, %rbx
	jle	LBB0_15
## %bb.11:
	incq	%rbx
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r15), %edi
	movq	_AHCI_PHYCS2R@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ATA_INL
	testq	%rax, (%r14)
	je	LBB0_18
## %bb.13:                              ##   in Loop: Header=BB0_12 Depth=1
	movq	%rax, %r12
	movl	$10, %edi
	callq	_DELAY
	decq	%rbx
	cmpq	$1, %rbx
	jg	LBB0_12
## %bb.14:
	xorl	%ebx, %ebx
LBB0_15:
	testq	%rbx, %rbx
	jne	LBB0_18
## %bb.16:
	movq	_bootverbose@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_18
## %bb.17:
	leaq	L_.str.1(%rip), %rsi
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	movq	%r12, %rdx
	callq	_device_printf
LBB0_18:
	movl	$1000, %edi                     ## imm = 0x3E8
	callq	_DELAY
	movl	(%r15), %edi
	movl	(%r13), %esi
	movl	$7, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ATA_OUTL                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AHCI_RWCR,4,2                  ## @AHCI_RWCR
	.comm	_AHCI_PHYCS1R,4,2               ## @AHCI_PHYCS1R
	.comm	_PHYCS1R_HIGHZ,8,3              ## @PHYCS1R_HIGHZ
	.comm	_AHCI_PHYCS0R,4,2               ## @AHCI_PHYCS0R
	.comm	_PHYCS0R_UF2_MASK,4,2           ## @PHYCS0R_UF2_MASK
	.comm	_PHYCS0R_UF2_INIT,4,2           ## @PHYCS0R_UF2_INIT
	.comm	_PHYCS0R_BIT23,4,2              ## @PHYCS0R_BIT23
	.comm	_PHYCS0R_BIT18,4,2              ## @PHYCS0R_BIT18
	.comm	_PHYCS1R_UF1_MASK,4,2           ## @PHYCS1R_UF1_MASK
	.comm	_PHYCS1R_UF2_MASK,4,2           ## @PHYCS1R_UF2_MASK
	.comm	_PHYCS1R_UF3_MASK,4,2           ## @PHYCS1R_UF3_MASK
	.comm	_PHYCS1R_UF1_INIT,4,2           ## @PHYCS1R_UF1_INIT
	.comm	_PHYCS1R_UF2_INIT,4,2           ## @PHYCS1R_UF2_INIT
	.comm	_PHYCS1R_UF3_INIT,4,2           ## @PHYCS1R_UF3_INIT
	.comm	_PHYCS1R_BIT15,8,3              ## @PHYCS1R_BIT15
	.comm	_PHYCS1R_BIT28,8,3              ## @PHYCS1R_BIT28
	.comm	_PHYCS0R_UF1_MASK,4,2           ## @PHYCS0R_UF1_MASK
	.comm	_PHYCS0R_UF1_INIT,4,2           ## @PHYCS0R_UF1_INIT
	.comm	_AHCI_PHYCS2R,4,2               ## @AHCI_PHYCS2R
	.comm	_PHYCS2R_UF1_MASK,4,2           ## @PHYCS2R_UF1_MASK
	.comm	_PHYCS2R_UF1_INIT,4,2           ## @PHYCS2R_UF1_INIT
	.comm	_PHYCS0R_POWER_ENABLE,8,3       ## @PHYCS0R_POWER_ENABLE
	.comm	_PHY_RESET_TIMEOUT,8,3          ## @PHY_RESET_TIMEOUT
	.comm	_PHYCS0R_POWER_STATUS_MASK,8,3  ## @PHYCS0R_POWER_STATUS_MASK
	.comm	_PHYCS0R_PS_GOOD,8,3            ## @PHYCS0R_PS_GOOD
	.comm	_bootverbose,8,3                ## @bootverbose
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"PHY Power Failed PHYCS0R = %#x\n"

	.comm	_PHYCS2R_CALIBRATE,8,3          ## @PHYCS2R_CALIBRATE
L_.str.1:                               ## @.str.1
	.asciz	"PHY Cal Failed PHYCS2R %#x\n"

	.no_dead_strip	_ahci_a10_phy_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ahci_a10_phy_reset
_ahci_a10_phy_reset:                    ; @ahci_a10_phy_reset
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x0
	bl	_device_get_softc
	mov	x19, x0
	ldr	w0, [x0]
Lloh0:
	adrp	x27, _AHCI_RWCR@GOTPAGE
Lloh1:
	ldr	x27, [x27, _AHCI_RWCR@GOTPAGEOFF]
	ldr	w1, [x27]
	mov	w2, #0
	bl	_ATA_OUTL
	mov	w0, #100
	bl	_DELAY
	ldr	w0, [x19]
Lloh2:
	adrp	x21, _AHCI_PHYCS1R@GOTPAGE
Lloh3:
	ldr	x21, [x21, _AHCI_PHYCS1R@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh4:
	adrp	x24, _PHYCS1R_HIGHZ@GOTPAGE
Lloh5:
	ldr	x24, [x24, _PHYCS1R_HIGHZ@GOTPAGEOFF]
	ldr	x2, [x24]
	bl	_ahci_set
	ldr	w0, [x19]
Lloh6:
	adrp	x23, _AHCI_PHYCS0R@GOTPAGE
Lloh7:
	ldr	x23, [x23, _AHCI_PHYCS0R@GOTPAGEOFF]
	ldr	w1, [x23]
Lloh8:
	adrp	x8, _PHYCS0R_UF2_MASK@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PHYCS0R_UF2_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	mvn	w2, w8
Lloh11:
	adrp	x8, _PHYCS0R_UF2_INIT@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PHYCS0R_UF2_INIT@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
Lloh14:
	adrp	x9, _PHYCS0R_BIT23@GOTPAGE
Lloh15:
	ldr	x9, [x9, _PHYCS0R_BIT23@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh17:
	adrp	x9, _PHYCS0R_BIT18@GOTPAGE
Lloh18:
	ldr	x9, [x9, _PHYCS0R_BIT18@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w3, w8, w9
	bl	_ahci_mask_set
	ldr	w0, [x19]
	ldr	w1, [x21]
Lloh20:
	adrp	x8, _PHYCS1R_UF1_MASK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PHYCS1R_UF1_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
Lloh23:
	adrp	x9, _PHYCS1R_UF2_MASK@GOTPAGE
Lloh24:
	ldr	x9, [x9, _PHYCS1R_UF2_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh26:
	adrp	x9, _PHYCS1R_UF3_MASK@GOTPAGE
Lloh27:
	ldr	x9, [x9, _PHYCS1R_UF3_MASK@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	orr	w8, w8, w9
	mvn	w2, w8
Lloh29:
	adrp	x8, _PHYCS1R_UF1_INIT@GOTPAGE
Lloh30:
	ldr	x8, [x8, _PHYCS1R_UF1_INIT@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
Lloh32:
	adrp	x9, _PHYCS1R_UF2_INIT@GOTPAGE
Lloh33:
	ldr	x9, [x9, _PHYCS1R_UF2_INIT@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh35:
	adrp	x9, _PHYCS1R_UF3_INIT@GOTPAGE
Lloh36:
	ldr	x9, [x9, _PHYCS1R_UF3_INIT@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
	orr	w3, w8, w9
	bl	_ahci_mask_set
	ldr	w0, [x19]
Lloh38:
	adrp	x8, _PHYCS1R_BIT15@GOTPAGE
Lloh39:
	ldr	x8, [x8, _PHYCS1R_BIT15@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh40:
	ldr	x8, [x8]
Lloh41:
	adrp	x9, _PHYCS1R_BIT28@GOTPAGE
Lloh42:
	ldr	x9, [x9, _PHYCS1R_BIT28@GOTPAGEOFF]
Lloh43:
	ldr	x9, [x9]
	orr	x2, x9, x8
	bl	_ahci_set
	ldr	w0, [x19]
	ldr	w1, [x21]
	ldr	x2, [x24]
	bl	_ahci_clr
	ldr	w0, [x19]
Lloh44:
	adrp	x8, _PHYCS0R_UF1_MASK@GOTPAGE
Lloh45:
	ldr	x8, [x8, _PHYCS0R_UF1_MASK@GOTPAGEOFF]
	ldr	w1, [x23]
Lloh46:
	ldr	w8, [x8]
	mvn	w2, w8
Lloh47:
	adrp	x8, _PHYCS0R_UF1_INIT@GOTPAGE
Lloh48:
	ldr	x8, [x8, _PHYCS0R_UF1_INIT@GOTPAGEOFF]
Lloh49:
	ldr	w3, [x8]
	bl	_ahci_mask_set
	ldr	w0, [x19]
Lloh50:
	adrp	x24, _AHCI_PHYCS2R@GOTPAGE
Lloh51:
	ldr	x24, [x24, _AHCI_PHYCS2R@GOTPAGEOFF]
Lloh52:
	adrp	x8, _PHYCS2R_UF1_MASK@GOTPAGE
Lloh53:
	ldr	x8, [x8, _PHYCS2R_UF1_MASK@GOTPAGEOFF]
	ldr	w1, [x24]
Lloh54:
	ldr	w8, [x8]
	mvn	w2, w8
Lloh55:
	adrp	x8, _PHYCS2R_UF1_INIT@GOTPAGE
Lloh56:
	ldr	x8, [x8, _PHYCS2R_UF1_INIT@GOTPAGEOFF]
Lloh57:
	ldr	w3, [x8]
	bl	_ahci_mask_set
	mov	w0, #100
	bl	_DELAY
	ldr	w0, [x19]
	ldr	w1, [x23]
Lloh58:
	adrp	x8, _PHYCS0R_POWER_ENABLE@GOTPAGE
Lloh59:
	ldr	x8, [x8, _PHYCS0R_POWER_ENABLE@GOTPAGEOFF]
Lloh60:
	ldr	x2, [x8]
	bl	_ahci_set
Lloh61:
	adrp	x26, _PHY_RESET_TIMEOUT@GOTPAGE
Lloh62:
	ldr	x26, [x26, _PHY_RESET_TIMEOUT@GOTPAGEOFF]
	ldr	x8, [x26]
Lloh63:
	adrp	x25, _bootverbose@GOTPAGE
Lloh64:
	ldr	x25, [x25, _bootverbose@GOTPAGEOFF]
	cmp	x8, #1
	b.lt	LBB0_5
; %bb.1:
	mov	x25, x27
	add	x27, x8, #1
Lloh65:
	adrp	x28, _PHYCS0R_POWER_STATUS_MASK@GOTPAGE
Lloh66:
	ldr	x28, [x28, _PHYCS0R_POWER_STATUS_MASK@GOTPAGEOFF]
Lloh67:
	adrp	x22, _PHYCS0R_PS_GOOD@GOTPAGE
Lloh68:
	ldr	x22, [x22, _PHYCS0R_PS_GOOD@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x19]
	ldr	w1, [x23]
	bl	_ATA_INL
	mov	x21, x0
	ldr	x8, [x28]
	and	x8, x8, x0
	ldr	x9, [x22]
	cmp	x8, x9
	b.eq	LBB0_8
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	w0, #10
	bl	_DELAY
	sub	x27, x27, #1
	cmp	x27, #1
	b.gt	LBB0_2
; %bb.4:
	mov	x8, #0
	mov	x27, x25
Lloh69:
	adrp	x25, _bootverbose@GOTPAGE
Lloh70:
	ldr	x25, [x25, _bootverbose@GOTPAGEOFF]
	cbz	x8, LBB0_6
	b	LBB0_9
LBB0_5:
                                        ; implicit-def: $x21
	cbnz	x8, LBB0_9
LBB0_6:
	ldr	x8, [x25]
	cbz	x8, LBB0_9
; %bb.7:
Lloh71:
	adrp	x1, l_.str@PAGE
Lloh72:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x20
	mov	x2, x21
	bl	_device_printf
	b	LBB0_9
LBB0_8:
	mov	x27, x25
Lloh73:
	adrp	x25, _bootverbose@GOTPAGE
Lloh74:
	ldr	x25, [x25, _bootverbose@GOTPAGEOFF]
LBB0_9:
	ldr	w0, [x19]
	ldr	w1, [x24]
Lloh75:
	adrp	x23, _PHYCS2R_CALIBRATE@GOTPAGE
Lloh76:
	ldr	x23, [x23, _PHYCS2R_CALIBRATE@GOTPAGEOFF]
	ldr	x2, [x23]
	bl	_ahci_set
	ldr	x8, [x26]
	cmp	x8, #1
	b.lt	LBB0_14
; %bb.10:
	add	x22, x8, #1
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x19]
	ldr	w1, [x24]
	bl	_ATA_INL
	ldr	x8, [x23]
	tst	x8, x0
	b.eq	LBB0_17
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=1
	mov	x21, x0
	mov	w0, #10
	bl	_DELAY
	sub	x22, x22, #1
	cmp	x22, #1
	b.gt	LBB0_11
; %bb.13:
	mov	x8, #0
LBB0_14:
	cbnz	x8, LBB0_17
; %bb.15:
	ldr	x8, [x25]
	cbz	x8, LBB0_17
; %bb.16:
Lloh77:
	adrp	x1, l_.str.1@PAGE
Lloh78:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	mov	x2, x21
	bl	_device_printf
LBB0_17:
	mov	w0, #1000
	bl	_DELAY
	ldr	w0, [x19]
	ldr	w1, [x27]
	mov	w2, #7
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_ATA_OUTL
	.loh AdrpLdrGot	Lloh63, Lloh64
	.loh AdrpLdrGot	Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpLdrGot	Lloh69, Lloh70
	.loh AdrpAdd	Lloh71, Lloh72
	.loh AdrpLdrGot	Lloh73, Lloh74
	.loh AdrpLdrGot	Lloh75, Lloh76
	.loh AdrpAdd	Lloh77, Lloh78
	.cfi_endproc
                                        ; -- End function
	.comm	_AHCI_RWCR,4,2                  ; @AHCI_RWCR
	.comm	_AHCI_PHYCS1R,4,2               ; @AHCI_PHYCS1R
	.comm	_PHYCS1R_HIGHZ,8,3              ; @PHYCS1R_HIGHZ
	.comm	_AHCI_PHYCS0R,4,2               ; @AHCI_PHYCS0R
	.comm	_PHYCS0R_UF2_MASK,4,2           ; @PHYCS0R_UF2_MASK
	.comm	_PHYCS0R_UF2_INIT,4,2           ; @PHYCS0R_UF2_INIT
	.comm	_PHYCS0R_BIT23,4,2              ; @PHYCS0R_BIT23
	.comm	_PHYCS0R_BIT18,4,2              ; @PHYCS0R_BIT18
	.comm	_PHYCS1R_UF1_MASK,4,2           ; @PHYCS1R_UF1_MASK
	.comm	_PHYCS1R_UF2_MASK,4,2           ; @PHYCS1R_UF2_MASK
	.comm	_PHYCS1R_UF3_MASK,4,2           ; @PHYCS1R_UF3_MASK
	.comm	_PHYCS1R_UF1_INIT,4,2           ; @PHYCS1R_UF1_INIT
	.comm	_PHYCS1R_UF2_INIT,4,2           ; @PHYCS1R_UF2_INIT
	.comm	_PHYCS1R_UF3_INIT,4,2           ; @PHYCS1R_UF3_INIT
	.comm	_PHYCS1R_BIT15,8,3              ; @PHYCS1R_BIT15
	.comm	_PHYCS1R_BIT28,8,3              ; @PHYCS1R_BIT28
	.comm	_PHYCS0R_UF1_MASK,4,2           ; @PHYCS0R_UF1_MASK
	.comm	_PHYCS0R_UF1_INIT,4,2           ; @PHYCS0R_UF1_INIT
	.comm	_AHCI_PHYCS2R,4,2               ; @AHCI_PHYCS2R
	.comm	_PHYCS2R_UF1_MASK,4,2           ; @PHYCS2R_UF1_MASK
	.comm	_PHYCS2R_UF1_INIT,4,2           ; @PHYCS2R_UF1_INIT
	.comm	_PHYCS0R_POWER_ENABLE,8,3       ; @PHYCS0R_POWER_ENABLE
	.comm	_PHY_RESET_TIMEOUT,8,3          ; @PHY_RESET_TIMEOUT
	.comm	_PHYCS0R_POWER_STATUS_MASK,8,3  ; @PHYCS0R_POWER_STATUS_MASK
	.comm	_PHYCS0R_PS_GOOD,8,3            ; @PHYCS0R_PS_GOOD
	.comm	_bootverbose,8,3                ; @bootverbose
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"PHY Power Failed PHYCS0R = %#x\n"

	.comm	_PHYCS2R_CALIBRATE,8,3          ; @PHYCS2R_CALIBRATE
l_.str.1:                               ; @.str.1
	.asciz	"PHY Cal Failed PHYCS2R %#x\n"

	.no_dead_strip	_ahci_a10_phy_reset
.subsections_via_symbols
