	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra124_init_speedo
_tegra124_init_speedo:                  ## @tegra124_init_speedo
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	_TEGRA124_FUSE_SKU_INFO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_RD4
	movq	%rax, 64(%r14)
	movq	_TEGRA124_FUSE_SOC_IDDQ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_RD4
	movq	%rax, 56(%r14)
	movq	_TEGRA124_FUSE_CPU_IDDQ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_RD4
	movq	%rax, 48(%r14)
	movq	_TEGRA124_FUSE_GPU_IDDQ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_RD4
	movq	%rax, 40(%r14)
	movq	_TEGRA124_FUSE_SOC_SPEEDO_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_RD4
	movq	%rax, (%r14)
	movq	_TEGRA124_FUSE_CPU_SPEEDO_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_RD4
	movq	%rax, 8(%r14)
	movq	_TEGRA124_FUSE_CPU_SPEEDO_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_RD4
	movq	%rax, 16(%r14)
	cmpq	$0, 8(%r14)
	je	LBB0_18
## %bb.1:
	leaq	-20(%rbp), %rdx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_tegra124_rev_sku_to_speedo_ids
	movq	_TEGRA124_SOC_PROCESS_CORNERS@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	xorl	%eax, %eax
	movl	$0, %edx
	testl	%ecx, %ecx
	jle	LBB0_6
## %bb.2:
	movq	(%r14), %rsi
	movq	_tegra124_soc_process_speedos@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movslq	-20(%rbp), %rdi
	movq	(%rdx,%rdi,8), %rdi
	xorl	%edx, %edx
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	cmpq	(%rdi,%rdx,8), %rsi
	jl	LBB0_6
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	incq	%rdx
	cmpq	%rdx, %rcx
	jne	LBB0_3
## %bb.5:
	movl	%ecx, %edx
LBB0_6:
	movl	%edx, 24(%r14)
	movq	_TEGRA124_CPU_PROCESS_CORNERS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, %ecx
	jle	LBB0_11
## %bb.7:
	movq	8(%r14), %rdx
	movq	_tegra124_cpu_process_speedos@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movslq	-20(%rbp), %rsi
	movq	(%rax,%rsi,8), %rsi
	xorl	%eax, %eax
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	cmpq	(%rsi,%rax,8), %rdx
	jl	LBB0_11
## %bb.9:                               ##   in Loop: Header=BB0_8 Depth=1
	incq	%rax
	cmpq	%rax, %rcx
	jne	LBB0_8
## %bb.10:
	movl	%ecx, %eax
LBB0_11:
	movl	%eax, 28(%r14)
	movq	_TEGRA124_GPU_PROCESS_CORNERS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, %eax
	jle	LBB0_12
## %bb.13:
	movq	16(%r14), %rdx
	movq	_tegra124_gpu_process_speedos@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movslq	-20(%rbp), %rsi
	movq	(%rcx,%rsi,8), %rsi
	xorl	%ecx, %ecx
	.p2align	4, 0x90
LBB0_14:                                ## =>This Inner Loop Header: Depth=1
	cmpq	(%rsi,%rcx,8), %rdx
	jl	LBB0_17
## %bb.15:                              ##   in Loop: Header=BB0_14 Depth=1
	incq	%rcx
	cmpq	%rcx, %rax
	jne	LBB0_14
## %bb.16:
	movl	%eax, %ecx
	jmp	LBB0_17
LBB0_18:
	movl	(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_device_printf                  ## TAILCALL
LBB0_12:
	xorl	%ecx, %ecx
LBB0_17:
	movl	%ecx, 32(%r14)
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TEGRA124_FUSE_SKU_INFO,4,2     ## @TEGRA124_FUSE_SKU_INFO
	.comm	_TEGRA124_FUSE_SOC_IDDQ,4,2     ## @TEGRA124_FUSE_SOC_IDDQ
	.comm	_TEGRA124_FUSE_CPU_IDDQ,4,2     ## @TEGRA124_FUSE_CPU_IDDQ
	.comm	_TEGRA124_FUSE_GPU_IDDQ,4,2     ## @TEGRA124_FUSE_GPU_IDDQ
	.comm	_TEGRA124_FUSE_SOC_SPEEDO_0,4,2 ## @TEGRA124_FUSE_SOC_SPEEDO_0
	.comm	_TEGRA124_FUSE_CPU_SPEEDO_0,4,2 ## @TEGRA124_FUSE_CPU_SPEEDO_0
	.comm	_TEGRA124_FUSE_CPU_SPEEDO_2,4,2 ## @TEGRA124_FUSE_CPU_SPEEDO_2
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"CPU Speedo value is not fused.\n"

	.comm	_TEGRA124_SOC_PROCESS_CORNERS,4,2 ## @TEGRA124_SOC_PROCESS_CORNERS
	.comm	_tegra124_soc_process_speedos,8,3 ## @tegra124_soc_process_speedos
	.comm	_TEGRA124_CPU_PROCESS_CORNERS,4,2 ## @TEGRA124_CPU_PROCESS_CORNERS
	.comm	_tegra124_cpu_process_speedos,8,3 ## @tegra124_cpu_process_speedos
	.comm	_TEGRA124_GPU_PROCESS_CORNERS,4,2 ## @TEGRA124_GPU_PROCESS_CORNERS
	.comm	_tegra124_gpu_process_speedos,8,3 ## @tegra124_gpu_process_speedos
	.no_dead_strip	_tegra124_init_speedo
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra124_init_speedo
_tegra124_init_speedo:                  ; @tegra124_init_speedo
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _TEGRA124_FUSE_SKU_INFO@GOTPAGE
Lloh1:
	ldr	x8, [x8, _TEGRA124_FUSE_SKU_INFO@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_RD4
	str	x0, [x19, #64]
Lloh3:
	adrp	x8, _TEGRA124_FUSE_SOC_IDDQ@GOTPAGE
Lloh4:
	ldr	x8, [x8, _TEGRA124_FUSE_SOC_IDDQ@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_RD4
	str	x0, [x19, #56]
Lloh6:
	adrp	x8, _TEGRA124_FUSE_CPU_IDDQ@GOTPAGE
Lloh7:
	ldr	x8, [x8, _TEGRA124_FUSE_CPU_IDDQ@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_RD4
	str	x0, [x19, #48]
Lloh9:
	adrp	x8, _TEGRA124_FUSE_GPU_IDDQ@GOTPAGE
Lloh10:
	ldr	x8, [x8, _TEGRA124_FUSE_GPU_IDDQ@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_RD4
	str	x0, [x19, #40]
Lloh12:
	adrp	x8, _TEGRA124_FUSE_SOC_SPEEDO_0@GOTPAGE
Lloh13:
	ldr	x8, [x8, _TEGRA124_FUSE_SOC_SPEEDO_0@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_RD4
	str	x0, [x19]
Lloh15:
	adrp	x8, _TEGRA124_FUSE_CPU_SPEEDO_0@GOTPAGE
Lloh16:
	ldr	x8, [x8, _TEGRA124_FUSE_CPU_SPEEDO_0@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_RD4
	str	x0, [x19, #8]
Lloh18:
	adrp	x8, _TEGRA124_FUSE_CPU_SPEEDO_2@GOTPAGE
Lloh19:
	ldr	x8, [x8, _TEGRA124_FUSE_CPU_SPEEDO_2@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_RD4
	str	x0, [x19, #16]
	ldr	x8, [x19, #8]
	cbz	x8, LBB0_6
; %bb.1:
	add	x2, sp, #12
	mov	x0, x20
	mov	x1, x19
	bl	_tegra124_rev_sku_to_speedo_ids
Lloh21:
	adrp	x8, _TEGRA124_SOC_PROCESS_CORNERS@GOTPAGE
Lloh22:
	ldr	x8, [x8, _TEGRA124_SOC_PROCESS_CORNERS@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_7
; %bb.2:
	mov	x8, #0
	ldr	x10, [x19]
Lloh24:
	adrp	x11, _tegra124_soc_process_speedos@GOTPAGE
Lloh25:
	ldr	x11, [x11, _tegra124_soc_process_speedos@GOTPAGEOFF]
Lloh26:
	ldr	x11, [x11]
	ldrsw	x12, [sp, #12]
	ldr	x11, [x11, x12, lsl #3]
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x12, [x11, x8, lsl #3]
	cmp	x10, x12
	b.lt	LBB0_8
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	add	x8, x8, #1
	cmp	x9, x8
	b.ne	LBB0_3
; %bb.5:
	mov	x8, x9
	b	LBB0_8
LBB0_6:
	ldr	w0, [x20]
Lloh27:
	adrp	x1, l_.str@PAGE
Lloh28:
	add	x1, x1, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	b	_device_printf
LBB0_7:
	mov	w8, #0
LBB0_8:
	str	w8, [x19, #24]
Lloh29:
	adrp	x8, _TEGRA124_CPU_PROCESS_CORNERS@GOTPAGE
Lloh30:
	ldr	x8, [x8, _TEGRA124_CPU_PROCESS_CORNERS@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_13
; %bb.9:
	mov	x8, #0
	ldr	x10, [x19, #8]
Lloh32:
	adrp	x11, _tegra124_cpu_process_speedos@GOTPAGE
Lloh33:
	ldr	x11, [x11, _tegra124_cpu_process_speedos@GOTPAGEOFF]
Lloh34:
	ldr	x11, [x11]
	ldrsw	x12, [sp, #12]
	ldr	x11, [x11, x12, lsl #3]
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	ldr	x12, [x11, x8, lsl #3]
	cmp	x10, x12
	b.lt	LBB0_14
; %bb.11:                               ;   in Loop: Header=BB0_10 Depth=1
	add	x8, x8, #1
	cmp	x9, x8
	b.ne	LBB0_10
; %bb.12:
	mov	x8, x9
	b	LBB0_14
LBB0_13:
	mov	w8, #0
LBB0_14:
	str	w8, [x19, #28]
Lloh35:
	adrp	x8, _TEGRA124_GPU_PROCESS_CORNERS@GOTPAGE
Lloh36:
	ldr	x8, [x8, _TEGRA124_GPU_PROCESS_CORNERS@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_19
; %bb.15:
	mov	x8, #0
	ldr	x10, [x19, #16]
Lloh38:
	adrp	x11, _tegra124_gpu_process_speedos@GOTPAGE
Lloh39:
	ldr	x11, [x11, _tegra124_gpu_process_speedos@GOTPAGEOFF]
Lloh40:
	ldr	x11, [x11]
	ldrsw	x12, [sp, #12]
	ldr	x11, [x11, x12, lsl #3]
LBB0_16:                                ; =>This Inner Loop Header: Depth=1
	ldr	x12, [x11, x8, lsl #3]
	cmp	x10, x12
	b.lt	LBB0_20
; %bb.17:                               ;   in Loop: Header=BB0_16 Depth=1
	add	x8, x8, #1
	cmp	x9, x8
	b.ne	LBB0_16
; %bb.18:
	mov	x8, x9
	b	LBB0_20
LBB0_19:
	mov	w8, #0
LBB0_20:
	str	w8, [x19, #32]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpAdd	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.cfi_endproc
                                        ; -- End function
	.comm	_TEGRA124_FUSE_SKU_INFO,4,2     ; @TEGRA124_FUSE_SKU_INFO
	.comm	_TEGRA124_FUSE_SOC_IDDQ,4,2     ; @TEGRA124_FUSE_SOC_IDDQ
	.comm	_TEGRA124_FUSE_CPU_IDDQ,4,2     ; @TEGRA124_FUSE_CPU_IDDQ
	.comm	_TEGRA124_FUSE_GPU_IDDQ,4,2     ; @TEGRA124_FUSE_GPU_IDDQ
	.comm	_TEGRA124_FUSE_SOC_SPEEDO_0,4,2 ; @TEGRA124_FUSE_SOC_SPEEDO_0
	.comm	_TEGRA124_FUSE_CPU_SPEEDO_0,4,2 ; @TEGRA124_FUSE_CPU_SPEEDO_0
	.comm	_TEGRA124_FUSE_CPU_SPEEDO_2,4,2 ; @TEGRA124_FUSE_CPU_SPEEDO_2
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"CPU Speedo value is not fused.\n"

	.comm	_TEGRA124_SOC_PROCESS_CORNERS,4,2 ; @TEGRA124_SOC_PROCESS_CORNERS
	.comm	_tegra124_soc_process_speedos,8,3 ; @tegra124_soc_process_speedos
	.comm	_TEGRA124_CPU_PROCESS_CORNERS,4,2 ; @TEGRA124_CPU_PROCESS_CORNERS
	.comm	_tegra124_cpu_process_speedos,8,3 ; @tegra124_cpu_process_speedos
	.comm	_TEGRA124_GPU_PROCESS_CORNERS,4,2 ; @TEGRA124_GPU_PROCESS_CORNERS
	.comm	_tegra124_gpu_process_speedos,8,3 ; @tegra124_gpu_process_speedos
	.no_dead_strip	_tegra124_init_speedo
.subsections_via_symbols
