	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_arm_vector_init                ## -- Begin function arm_vector_init
	.p2align	4, 0x90
_arm_vector_init:                       ## @arm_vector_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %eax
	movq	%rdi, %r14
	movq	_ARM_NVEC@GOTPCREL(%rip), %r8
	movl	(%r8), %esi
	testl	%esi, %esi
	jle	LBB0_5
## %bb.1:
	movq	_page0_data@GOTPCREL(%rip), %rcx
	movq	(%rcx), %r9
	movq	_page0@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdi
	movq	%r9, %rdx
	subq	%rdi, %rdx
	addq	%r14, %rdx
	xorl	%ebx, %ebx
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%rbx
	movslq	%esi, %rcx
	cmpq	%rcx, %rbx
	jge	LBB0_5
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	btl	%ebx, %eax
	jae	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	(%rdi,%rbx,4), %esi
	movl	%esi, (%r14,%rbx,4)
	movl	(%r9,%rbx,4), %esi
	movl	%esi, (%rdx,%rbx,4)
	movl	(%r8), %esi
	jmp	LBB0_4
LBB0_5:
	shll	$3, %esi
	movq	%r14, %rdi
	callq	_icache_sync
	movq	_vector_page@GOTPCREL(%rip), %rax
	movq	%r14, (%rax)
	movq	_ARM_VECTORS_HIGH@GOTPCREL(%rip), %rax
	cmpq	%r14, (%rax)
	jne	LBB0_6
## %bb.7:
	movq	_CPU_CONTROL_VECRELOC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, %esi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_cpu_control                    ## TAILCALL
LBB0_6:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_page0_data,8,3                 ## @page0_data
	.comm	_page0,8,3                      ## @page0
	.comm	_ARM_NVEC,4,2                   ## @ARM_NVEC
	.comm	_vector_page,8,3                ## @vector_page
	.comm	_ARM_VECTORS_HIGH,8,3           ## @ARM_VECTORS_HIGH
	.comm	_CPU_CONTROL_VECRELOC,4,2       ## @CPU_CONTROL_VECRELOC
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_arm_vector_init                ; -- Begin function arm_vector_init
	.p2align	2
_arm_vector_init:                       ; @arm_vector_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _ARM_NVEC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ARM_NVEC@GOTPAGEOFF]
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_5
; %bb.1:
	mov	x10, #0
Lloh2:
	adrp	x11, _page0_data@GOTPAGE
Lloh3:
	ldr	x11, [x11, _page0_data@GOTPAGEOFF]
Lloh4:
	ldr	x11, [x11]
Lloh5:
	adrp	x12, _page0@GOTPAGE
Lloh6:
	ldr	x12, [x12, _page0@GOTPAGEOFF]
Lloh7:
	ldr	x12, [x12]
	sub	x13, x11, x12
	add	x13, x19, x13
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x10, x10, #1
	cmp	x10, w9, sxtw
	b.ge	LBB0_5
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	lsr	w14, w1, w10
	tbz	w14, #0, LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	lsl	x9, x10, #2
	ldr	w14, [x12, x9]
	str	w14, [x19, x9]
	ldr	w14, [x11, x9]
	str	w14, [x13, x9]
	ldr	w9, [x8]
	b	LBB0_2
LBB0_5:
	lsl	w1, w9, #3
	mov	x0, x19
	bl	_icache_sync
Lloh8:
	adrp	x8, _vector_page@GOTPAGE
Lloh9:
	ldr	x8, [x8, _vector_page@GOTPAGEOFF]
Lloh10:
	str	x19, [x8]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotStr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_page0_data,8,3                 ; @page0_data
	.comm	_page0,8,3                      ; @page0
	.comm	_ARM_NVEC,4,2                   ; @ARM_NVEC
	.comm	_vector_page,8,3                ; @vector_page
	.comm	_ARM_VECTORS_HIGH,8,3           ; @ARM_VECTORS_HIGH
	.comm	_CPU_CONTROL_VECRELOC,4,2       ; @CPU_CONTROL_VECRELOC
.subsections_via_symbols
