	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pci_lpc_init
_pci_lpc_init:                          ## @pci_lpc_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	_lpc_bridge@GOTPCREL(%rip), %r14
	cmpq	$0, (%r14)
	je	LBB0_3
## %bb.1:
	movq	_stderr@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_2
LBB0_3:
	movq	%rsi, %rbx
	cmpq	$0, (%rsi)
	je	LBB0_5
## %bb.4:
	movq	_stderr@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str.1(%rip), %rsi
LBB0_2:
	callq	_fprintf
	movl	$-1, %eax
LBB0_7:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_5:
	callq	_lpc_init
	movq	%rax, %rcx
	movl	$-1, %eax
	testq	%rcx, %rcx
	jne	LBB0_7
## %bb.6:
	movq	_PCIR_DEVICE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_LPC_DEV@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_pci_set_cfgdata16
	movq	_PCIR_VENDOR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_LPC_VENDOR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_pci_set_cfgdata16
	movq	_PCIR_CLASS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PCIC_BRIDGE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_pci_set_cfgdata8
	movq	_PCIR_SUBCLASS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PCIS_BRIDGE_ISA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_pci_set_cfgdata8
	movq	%rbx, (%r14)
	xorl	%eax, %eax
	jmp	LBB0_7
	.cfi_endproc
                                        ## -- End function
	.comm	_lpc_bridge,8,3                 ## @lpc_bridge
	.comm	_stderr,4,2                     ## @stderr
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Only one LPC bridge is allowed.\n"

L_.str.1:                               ## @.str.1
	.asciz	"LPC bridge can be present only on bus 0.\n"

	.comm	_PCIR_DEVICE,4,2                ## @PCIR_DEVICE
	.comm	_LPC_DEV,4,2                    ## @LPC_DEV
	.comm	_PCIR_VENDOR,4,2                ## @PCIR_VENDOR
	.comm	_LPC_VENDOR,4,2                 ## @LPC_VENDOR
	.comm	_PCIR_CLASS,4,2                 ## @PCIR_CLASS
	.comm	_PCIC_BRIDGE,4,2                ## @PCIC_BRIDGE
	.comm	_PCIR_SUBCLASS,4,2              ## @PCIR_SUBCLASS
	.comm	_PCIS_BRIDGE_ISA,4,2            ## @PCIS_BRIDGE_ISA
	.no_dead_strip	_pci_lpc_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pci_lpc_init
_pci_lpc_init:                          ; @pci_lpc_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x20, _lpc_bridge@GOTPAGE
Lloh1:
	ldr	x20, [x20, _lpc_bridge@GOTPAGEOFF]
	ldr	x8, [x20]
	cbz	x8, LBB0_2
; %bb.1:
Lloh2:
	adrp	x8, _stderr@GOTPAGE
Lloh3:
	ldr	x8, [x8, _stderr@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_4
LBB0_2:
	mov	x19, x1
	ldr	x8, [x1]
	cbz	x8, LBB0_7
; %bb.3:
Lloh7:
	adrp	x8, _stderr@GOTPAGE
Lloh8:
	ldr	x8, [x8, _stderr@GOTPAGEOFF]
Lloh9:
	ldr	w0, [x8]
Lloh10:
	adrp	x1, l_.str.1@PAGE
Lloh11:
	add	x1, x1, l_.str.1@PAGEOFF
LBB0_4:
	bl	_fprintf
LBB0_5:
	mov	w0, #-1
LBB0_6:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_7:
	bl	_lpc_init
	cbnz	x0, LBB0_5
; %bb.8:
Lloh12:
	adrp	x8, _PCIR_DEVICE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCIR_DEVICE@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
Lloh15:
	adrp	x8, _LPC_DEV@GOTPAGE
Lloh16:
	ldr	x8, [x8, _LPC_DEV@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_pci_set_cfgdata16
Lloh18:
	adrp	x8, _PCIR_VENDOR@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PCIR_VENDOR@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
Lloh21:
	adrp	x8, _LPC_VENDOR@GOTPAGE
Lloh22:
	ldr	x8, [x8, _LPC_VENDOR@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_pci_set_cfgdata16
Lloh24:
	adrp	x8, _PCIR_CLASS@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PCIR_CLASS@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
Lloh27:
	adrp	x8, _PCIC_BRIDGE@GOTPAGE
Lloh28:
	ldr	x8, [x8, _PCIC_BRIDGE@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_pci_set_cfgdata8
Lloh30:
	adrp	x8, _PCIR_SUBCLASS@GOTPAGE
Lloh31:
	ldr	x8, [x8, _PCIR_SUBCLASS@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
Lloh33:
	adrp	x8, _PCIS_BRIDGE_ISA@GOTPAGE
Lloh34:
	ldr	x8, [x8, _PCIS_BRIDGE_ISA@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_pci_set_cfgdata8
	mov	w0, #0
	str	x19, [x20]
	b	LBB0_6
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_lpc_bridge,8,3                 ; @lpc_bridge
	.comm	_stderr,4,2                     ; @stderr
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Only one LPC bridge is allowed.\n"

l_.str.1:                               ; @.str.1
	.asciz	"LPC bridge can be present only on bus 0.\n"

	.comm	_PCIR_DEVICE,4,2                ; @PCIR_DEVICE
	.comm	_LPC_DEV,4,2                    ; @LPC_DEV
	.comm	_PCIR_VENDOR,4,2                ; @PCIR_VENDOR
	.comm	_LPC_VENDOR,4,2                 ; @LPC_VENDOR
	.comm	_PCIR_CLASS,4,2                 ; @PCIR_CLASS
	.comm	_PCIC_BRIDGE,4,2                ; @PCIC_BRIDGE
	.comm	_PCIR_SUBCLASS,4,2              ; @PCIR_SUBCLASS
	.comm	_PCIS_BRIDGE_ISA,4,2            ; @PCIS_BRIDGE_ISA
	.no_dead_strip	_pci_lpc_init
.subsections_via_symbols
