	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function xlp_pcib_read_config
_xlp_pcib_read_config:                  ## @xlp_pcib_read_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, %r15d
	movl	%r8d, %r14d
	movl	%edx, %r12d
	movl	%esi, %ebx
	xorl	%edi, %edi
	callq	_XLP_HDR_OFFSET
	movl	%eax, %edi
	callq	_nlm_pcicfg_base
	movl	$-1, %edx
	cmpl	$2, %r15d
	jne	LBB0_2
## %bb.1:
	movl	%r14d, %ecx
	andl	$1, %ecx
	jne	LBB0_12
LBB0_2:
	cmpl	$4, %r15d
	jne	LBB0_4
## %bb.3:
	movl	%r14d, %ecx
	andl	$3, %ecx
	jne	LBB0_12
LBB0_4:
	movl	%r14d, %esi
	sarl	$2, %esi
	testl	%ebx, %ebx
	jne	LBB0_8
## %bb.5:
	cmpl	$15, %esi
	jne	LBB0_8
## %bb.6:
	leal	7(%r12), %ecx
	testl	%r12d, %r12d
	cmovnsl	%r12d, %ecx
	andl	$-8, %ecx
	subl	%ecx, %r12d
	movl	$15, %esi
	cmpl	$2, %r12d
	jl	LBB0_8
## %bb.7:
	movq	_XLP_PCI_DEVSCRATCH_REG0@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
LBB0_8:
	movl	%eax, %edi
	callq	_nlm_read_pci_reg
	movl	%eax, %edx
	cmpl	$1, %r15d
	jne	LBB0_10
## %bb.9:
	shll	$3, %r14d
	movl	%r14d, %ecx
	sarl	%cl, %edx
	movzbl	%dl, %edx
	jmp	LBB0_12
LBB0_10:
	cmpl	$2, %r15d
	jne	LBB0_12
## %bb.11:
	shll	$3, %r14d
	movl	%r14d, %ecx
	sarl	%cl, %edx
	movzwl	%dx, %edx
LBB0_12:
	movl	%edx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_XLP_PCI_DEVSCRATCH_REG0,4,2    ## @XLP_PCI_DEVSCRATCH_REG0
	.no_dead_strip	_xlp_pcib_read_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function xlp_pcib_read_config
_xlp_pcib_read_config:                  ; @xlp_pcib_read_config
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x5
	mov	x20, x4
	mov	x21, x2
	mov	x22, x1
	mov	w0, #0
	bl	_XLP_HDR_OFFSET
	bl	_nlm_pcicfg_base
	cmp	w19, #2
	b.ne	LBB0_2
; %bb.1:
	tbnz	w20, #0, LBB0_4
LBB0_2:
	cmp	w19, #4
	b.ne	LBB0_5
; %bb.3:
	and	w8, w20, #0x3
	cbz	w8, LBB0_5
LBB0_4:
	mov	w0, #-1
	b	LBB0_9
LBB0_5:
	asr	w1, w20, #2
	cbnz	w22, LBB0_8
; %bb.6:
	cmp	w1, #15
	b.ne	LBB0_8
; %bb.7:
	negs	w8, w21
	and	w8, w8, #0x7
	and	w9, w21, #0x7
	csneg	w8, w9, w8, mi
Lloh0:
	adrp	x9, _XLP_PCI_DEVSCRATCH_REG0@GOTPAGE
Lloh1:
	ldr	x9, [x9, _XLP_PCI_DEVSCRATCH_REG0@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	mov	w10, #15
	cmp	w8, #1
	csel	w1, w9, w10, gt
LBB0_8:
	bl	_nlm_read_pci_reg
	ubfiz	w8, w20, #3, #2
	asr	w8, w0, w8
	and	w9, w8, #0xffff
	cmp	w19, #2
	csel	w9, w0, w9, ne
	and	w8, w8, #0xff
	cmp	w19, #1
	csel	w0, w9, w8, ne
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_XLP_PCI_DEVSCRATCH_REG0,4,2    ; @XLP_PCI_DEVSCRATCH_REG0
	.no_dead_strip	_xlp_pcib_read_config
.subsections_via_symbols
