	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bridge_pcie_ack
_bridge_pcie_ack:                       ## @bridge_pcie_ack
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%edi, %ebx
	xorl	%eax, %eax
	callq	_nlm_nodeid
	addl	$-128, %ebx
	cmpl	$3, %ebx
	ja	LBB0_7
## %bb.1:
	movq	_PCIE_MSI_STATUS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rbx,4), %rdx
	addq	%rcx, %rdx
	jmpq	*%rdx
LBB0_5:
	movl	%eax, %edi
	callq	_XLP_IO_PCIE3_OFFSET
	jmp	LBB0_6
LBB0_7:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_4:
	movl	%eax, %edi
	callq	_XLP_IO_PCIE2_OFFSET
	jmp	LBB0_6
LBB0_3:
	movl	%eax, %edi
	callq	_XLP_IO_PCIE1_OFFSET
	jmp	LBB0_6
LBB0_2:
	movl	%eax, %edi
	callq	_XLP_IO_PCIE0_OFFSET
LBB0_6:
	movl	%eax, %edi
	callq	_nlm_pcicfg_base
	movl	%eax, %edi
	movl	%r14d, %esi
	movl	$-1, %edx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_nlm_write_pci_reg              ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
LJTI0_0:
	.long	L0_0_set_5
	.long	L0_0_set_4
	.long	L0_0_set_3
	.long	L0_0_set_2
	.end_data_region
                                        ## -- End function
	.comm	_PCIE_MSI_STATUS,4,2            ## @PCIE_MSI_STATUS
	.no_dead_strip	_bridge_pcie_ack
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bridge_pcie_ack
_bridge_pcie_ack:                       ; @bridge_pcie_ack
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_nlm_nodeid
	sub	w8, w19, #128
	cmp	w8, #3
	b.hi	LBB0_3
; %bb.1:
Lloh0:
	adrp	x9, _PCIE_MSI_STATUS@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PCIE_MSI_STATUS@GOTPAGEOFF]
Lloh2:
	ldr	w19, [x9]
Lloh3:
	adrp	x9, lJTI0_0@PAGE
Lloh4:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
	bl	_XLP_IO_PCIE3_OFFSET
	b	LBB0_7
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_4:
	bl	_XLP_IO_PCIE2_OFFSET
	b	LBB0_7
LBB0_5:
	bl	_XLP_IO_PCIE1_OFFSET
	b	LBB0_7
LBB0_6:
	bl	_XLP_IO_PCIE0_OFFSET
LBB0_7:
	bl	_nlm_pcicfg_base
	mov	x1, x19
	mov	w2, #-1
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_nlm_write_pci_reg
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
                                        ; -- End function
	.comm	_PCIE_MSI_STATUS,4,2            ; @PCIE_MSI_STATUS
	.no_dead_strip	_bridge_pcie_ack
.subsections_via_symbols
