	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nvbl_setlevel
_nvbl_setlevel:                         ## @nvbl_setlevel
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$100, %esi
	movl	$100, %eax
	cmovll	%esi, %eax
	xorl	%ecx, %ecx
	testl	%eax, %eax
	cmovgl	%eax, %ecx
	movq	_NVIDIA_BRIGHT_SCALE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	imull	%ecx, %ebx
	movq	_NVIDIA_BRIGHT_MIN@GOTPCREL(%rip), %rdx
	addl	(%rdx), %ebx
	testl	%eax, %eax
	cmovlel	%ecx, %ebx
	movq	%rdi, %r14
	movl	(%rdi), %edi
	movq	_NVIDIA_PMC_OFF@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_bus_read_stream_4
	movq	_NVIDIA_PMC_BL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %ebx
	movzwl	%ax, %edx
	movq	_NVIDIA_PMC_BL_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	orl	%ebx, %edx
	movl	(%r14), %edi
	movl	(%r15), %esi
	callq	_bus_write_stream_4
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NVIDIA_BRIGHT_SCALE,4,2        ## @NVIDIA_BRIGHT_SCALE
	.comm	_NVIDIA_BRIGHT_MIN,4,2          ## @NVIDIA_BRIGHT_MIN
	.comm	_NVIDIA_PMC_OFF,4,2             ## @NVIDIA_PMC_OFF
	.comm	_NVIDIA_PMC_BL_EN,4,2           ## @NVIDIA_PMC_BL_EN
	.comm	_NVIDIA_PMC_BL_SHIFT,4,2        ## @NVIDIA_PMC_BL_SHIFT
	.no_dead_strip	_nvbl_setlevel
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nvbl_setlevel
_nvbl_setlevel:                         ; @nvbl_setlevel
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	mov	w8, #100
	cmp	w1, #100
	csel	w8, w1, w8, lt
Lloh0:
	adrp	x9, _NVIDIA_BRIGHT_SCALE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _NVIDIA_BRIGHT_SCALE@GOTPAGEOFF]
	cmp	w8, #0
	csel	w10, w8, wzr, gt
Lloh2:
	ldr	w9, [x9]
Lloh3:
	adrp	x11, _NVIDIA_BRIGHT_MIN@GOTPAGE
Lloh4:
	ldr	x11, [x11, _NVIDIA_BRIGHT_MIN@GOTPAGEOFF]
Lloh5:
	ldr	w11, [x11]
	madd	w9, w9, w10, w11
	cmp	w8, #1
	csel	w20, w10, w9, lt
	ldr	w0, [x0]
Lloh6:
	adrp	x21, _NVIDIA_PMC_OFF@GOTPAGE
Lloh7:
	ldr	x21, [x21, _NVIDIA_PMC_OFF@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_bus_read_stream_4
	and	w8, w0, #0xffff
Lloh8:
	adrp	x9, _NVIDIA_PMC_BL_EN@GOTPAGE
Lloh9:
	ldr	x9, [x9, _NVIDIA_PMC_BL_EN@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
Lloh11:
	adrp	x10, _NVIDIA_PMC_BL_SHIFT@GOTPAGE
Lloh12:
	ldr	x10, [x10, _NVIDIA_PMC_BL_SHIFT@GOTPAGEOFF]
Lloh13:
	ldr	w10, [x10]
	lsl	w10, w20, w10
	orr	w8, w8, w9
	orr	w2, w8, w10
	ldr	w0, [x19]
	ldr	w1, [x21]
	bl	_bus_write_stream_4
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_NVIDIA_BRIGHT_SCALE,4,2        ; @NVIDIA_BRIGHT_SCALE
	.comm	_NVIDIA_BRIGHT_MIN,4,2          ; @NVIDIA_BRIGHT_MIN
	.comm	_NVIDIA_PMC_OFF,4,2             ; @NVIDIA_PMC_OFF
	.comm	_NVIDIA_PMC_BL_EN,4,2           ; @NVIDIA_PMC_BL_EN
	.comm	_NVIDIA_PMC_BL_SHIFT,4,2        ; @NVIDIA_PMC_BL_SHIFT
	.no_dead_strip	_nvbl_setlevel
.subsections_via_symbols
