	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mpc85xx_enable_l3_cache        ## -- Begin function mpc85xx_enable_l3_cache
	.p2align	4, 0x90
_mpc85xx_enable_l3_cache:               ## @mpc85xx_enable_l3_cache
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	_SPR_SVR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_mfspr
	movl	%eax, %edi
	callq	_SVR_VER
	movq	_SVR_P2041@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_6
## %bb.1:
	movq	_SVR_P2041E@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_6
## %bb.2:
	movq	_SVR_P3041@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_6
## %bb.3:
	movq	_SVR_P3041E@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_6
## %bb.4:
	movq	_SVR_P5020@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_6
## %bb.5:
	movq	_SVR_P5020E@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_6
LBB0_10:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_6:
	movq	_OCP85XX_CPC_CSR0@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_ccsr_read4
	movq	_OCP85XX_CPC_CSR0_CE@GOTPCREL(%rip), %r14
	testq	%rax, (%r14)
	jne	LBB0_8
## %bb.7:
	xorl	%eax, %eax
	callq	_l3cache_inval
	xorl	%eax, %eax
	callq	_l3cache_enable
LBB0_8:
	movl	(%rbx), %edi
	callq	_ccsr_read4
	movq	%rax, %rbx
	movq	_boothowto@GOTPCREL(%rip), %rax
	movq	_RB_VERBOSE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rax)
	jne	LBB0_11
## %bb.9:
	testq	%rbx, (%r14)
	jne	LBB0_10
LBB0_11:
	movq	_OCP85XX_CPC_CFG0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_ccsr_read4
	movq	%rax, %rdi
	callq	_OCP85XX_CPC_CFG0_SZ_K
	andq	(%r14), %rbx
	leaq	L_.str.1(%rip), %rcx
	leaq	L_.str.2(%rip), %rdx
	cmoveq	%rcx, %rdx
	leaq	L_.str(%rip), %rdi
	movq	%rax, %rsi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_printf                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SPR_SVR,4,2                    ## @SPR_SVR
	.comm	_SVR_P2041,8,3                  ## @SVR_P2041
	.comm	_SVR_P2041E,8,3                 ## @SVR_P2041E
	.comm	_SVR_P3041,8,3                  ## @SVR_P3041
	.comm	_SVR_P3041E,8,3                 ## @SVR_P3041E
	.comm	_SVR_P5020,8,3                  ## @SVR_P5020
	.comm	_SVR_P5020E,8,3                 ## @SVR_P5020E
	.comm	_OCP85XX_CPC_CSR0,4,2           ## @OCP85XX_CPC_CSR0
	.comm	_OCP85XX_CPC_CSR0_CE,8,3        ## @OCP85XX_CPC_CSR0_CE
	.comm	_boothowto,4,2                  ## @boothowto
	.comm	_RB_VERBOSE,4,2                 ## @RB_VERBOSE
	.comm	_OCP85XX_CPC_CFG0,4,2           ## @OCP85XX_CPC_CFG0
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"L3 Corenet Platform Cache: %d KB %sabled\n"

L_.str.1:                               ## @.str.1
	.asciz	"dis"

L_.str.2:                               ## @.str.2
	.asciz	"en"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mpc85xx_enable_l3_cache        ; -- Begin function mpc85xx_enable_l3_cache
	.p2align	2
_mpc85xx_enable_l3_cache:               ; @mpc85xx_enable_l3_cache
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x8, _SPR_SVR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SPR_SVR@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_mfspr
	bl	_SVR_VER
Lloh3:
	adrp	x8, _SVR_P2041@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SVR_P2041@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
Lloh6:
	adrp	x9, _SVR_P2041E@GOTPAGE
Lloh7:
	ldr	x9, [x9, _SVR_P2041E@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
Lloh9:
	adrp	x10, _SVR_P3041@GOTPAGE
Lloh10:
	ldr	x10, [x10, _SVR_P3041@GOTPAGEOFF]
Lloh11:
	ldr	x10, [x10]
Lloh12:
	adrp	x11, _SVR_P3041E@GOTPAGE
Lloh13:
	ldr	x11, [x11, _SVR_P3041E@GOTPAGEOFF]
Lloh14:
	ldr	x11, [x11]
Lloh15:
	adrp	x12, _SVR_P5020@GOTPAGE
Lloh16:
	ldr	x12, [x12, _SVR_P5020@GOTPAGEOFF]
Lloh17:
	ldr	x12, [x12]
Lloh18:
	adrp	x13, _SVR_P5020E@GOTPAGE
Lloh19:
	ldr	x13, [x13, _SVR_P5020E@GOTPAGEOFF]
Lloh20:
	ldr	x13, [x13]
	cmp	x0, x8
	ccmp	x0, x9, #4, ne
	ccmp	x0, x10, #4, ne
	ccmp	x0, x11, #4, ne
	ccmp	x0, x12, #4, ne
	ccmp	x0, x13, #4, ne
	b.ne	LBB0_5
; %bb.1:
Lloh21:
	adrp	x19, _OCP85XX_CPC_CSR0@GOTPAGE
Lloh22:
	ldr	x19, [x19, _OCP85XX_CPC_CSR0@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_ccsr_read4
Lloh23:
	adrp	x20, _OCP85XX_CPC_CSR0_CE@GOTPAGE
Lloh24:
	ldr	x20, [x20, _OCP85XX_CPC_CSR0_CE@GOTPAGEOFF]
	ldr	x8, [x20]
	tst	x8, x0
	b.ne	LBB0_3
; %bb.2:
	bl	_l3cache_inval
	bl	_l3cache_enable
LBB0_3:
	ldr	w0, [x19]
	bl	_ccsr_read4
	mov	x19, x0
Lloh25:
	adrp	x8, _boothowto@GOTPAGE
Lloh26:
	ldr	x8, [x8, _boothowto@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
Lloh28:
	adrp	x9, _RB_VERBOSE@GOTPAGE
Lloh29:
	ldr	x9, [x9, _RB_VERBOSE@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_6
; %bb.4:
	ldr	x8, [x20]
	tst	x8, x19
	b.eq	LBB0_6
LBB0_5:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_6:
Lloh31:
	adrp	x8, _OCP85XX_CPC_CFG0@GOTPAGE
Lloh32:
	ldr	x8, [x8, _OCP85XX_CPC_CFG0@GOTPAGEOFF]
Lloh33:
	ldr	w0, [x8]
	bl	_ccsr_read4
	bl	_OCP85XX_CPC_CFG0_SZ_K
	mov	x1, x0
	ldr	x8, [x20]
Lloh34:
	adrp	x9, l_.str.2@PAGE
Lloh35:
	add	x9, x9, l_.str.2@PAGEOFF
Lloh36:
	adrp	x10, l_.str.1@PAGE
Lloh37:
	add	x10, x10, l_.str.1@PAGEOFF
	tst	x8, x19
	csel	x2, x10, x9, eq
Lloh38:
	adrp	x0, l_.str@PAGE
Lloh39:
	add	x0, x0, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_printf
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.cfi_endproc
                                        ; -- End function
	.comm	_SPR_SVR,4,2                    ; @SPR_SVR
	.comm	_SVR_P2041,8,3                  ; @SVR_P2041
	.comm	_SVR_P2041E,8,3                 ; @SVR_P2041E
	.comm	_SVR_P3041,8,3                  ; @SVR_P3041
	.comm	_SVR_P3041E,8,3                 ; @SVR_P3041E
	.comm	_SVR_P5020,8,3                  ; @SVR_P5020
	.comm	_SVR_P5020E,8,3                 ; @SVR_P5020E
	.comm	_OCP85XX_CPC_CSR0,4,2           ; @OCP85XX_CPC_CSR0
	.comm	_OCP85XX_CPC_CSR0_CE,8,3        ; @OCP85XX_CPC_CSR0_CE
	.comm	_boothowto,4,2                  ; @boothowto
	.comm	_RB_VERBOSE,4,2                 ; @RB_VERBOSE
	.comm	_OCP85XX_CPC_CFG0,4,2           ; @OCP85XX_CPC_CFG0
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"L3 Corenet Platform Cache: %d KB %sabled\n"

l_.str.1:                               ; @.str.1
	.asciz	"dis"

l_.str.2:                               ; @.str.2
	.asciz	"en"

.subsections_via_symbols
