	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cpu_sleep                      ## -- Begin function cpu_sleep
	.p2align	4, 0x90
_cpu_sleep:                             ## @cpu_sleep
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_pcpup@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_ap_pcpu@GOTPCREL(%rip), %rcx
	movl	%eax, (%rcx)
	movq	_restore@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	leaq	-40(%rbp), %rsi
	callq	_PCPU_SET
	xorl	%eax, %eax
	callq	_mfmsr
	movl	%eax, %r15d
	movq	_fputhread@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_PCPU_GET
	movq	%rax, %rbx
	movq	_vecthread@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_PCPU_GET
	movq	%rax, %r14
	testq	%rbx, %rbx
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_save_fpu
LBB0_2:
	testq	%r14, %r14
	je	LBB0_4
## %bb.3:
	movq	%r14, %rdi
	callq	_save_vec
LBB0_4:
	movq	-40(%rbp), %rdi
	callq	_setjmp
	testq	%rax, %rax
	je	LBB0_5
## %bb.7:
	movl	_cpu_sleep.timebase(%rip), %edi
	xorl	%esi, %esi
	callq	_platform_smp_timebase_sync
	movq	_curthread@GOTPCREL(%rip), %r12
	movq	(%r12), %rdi
	movq	%rdi, %rsi
	callq	_PCPU_SET
	movq	_curpcb@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	(%r12), %rax
	movq	(%rax), %rsi
	callq	_PCPU_SET
	movq	(%r12), %rdi
	callq	_pmap_activate
	xorl	%eax, %eax
	callq	_powerpc_sync
	movq	_SPR_SPRG0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	_cpu_sleep.sprgs.0(%rip), %esi
	callq	_mtspr
	movq	_SPR_SPRG1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	_cpu_sleep.sprgs.1(%rip), %esi
	callq	_mtspr
	movq	_SPR_SPRG2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	_cpu_sleep.sprgs.2(%rip), %esi
	callq	_mtspr
	movq	_SPR_SPRG3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	_cpu_sleep.sprgs.3(%rip), %esi
	callq	_mtspr
	movq	_SPR_SRR0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	_cpu_sleep.srrs.0(%rip), %esi
	callq	_mtspr
	movq	_SPR_SRR1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	_cpu_sleep.srrs.1(%rip), %esi
	callq	_mtspr
	movl	%r15d, %edi
	callq	_mtmsr
	movq	(%r12), %rax
	cmpq	%rax, %rbx
	je	LBB0_8
## %bb.9:
	cmpq	%rax, %r14
	je	LBB0_10
LBB0_11:
	xorl	%eax, %eax
	callq	_powerpc_sync
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	movq	_SPR_SPRG0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_mfspr
	movl	%eax, _cpu_sleep.sprgs.0(%rip)
	movq	_SPR_SPRG1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_mfspr
	movl	%eax, _cpu_sleep.sprgs.1(%rip)
	movq	_SPR_SPRG2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_mfspr
	movl	%eax, _cpu_sleep.sprgs.2(%rip)
	movq	_SPR_SPRG3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_mfspr
	movl	%eax, _cpu_sleep.sprgs.3(%rip)
	movq	_SPR_SRR0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_mfspr
	movl	%eax, _cpu_sleep.srrs.0(%rip)
	movq	_SPR_SRR1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_mfspr
	movl	%eax, _cpu_sleep.srrs.1(%rip)
	xorl	%eax, %eax
	callq	_mftb
	movl	%eax, _cpu_sleep.timebase(%rip)
	xorl	%eax, %eax
	callq	_powerpc_sync
	xorl	%eax, %eax
	callq	_flush_disable_caches
	movq	_SPR_HID0@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_mfspr
	movq	_HID0_DOZE@GOTPCREL(%rip), %rcx
	movq	_HID0_NAP@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r14d
	orl	(%rcx), %r14d
	notl	%r14d
	andl	%eax, %r14d
	movq	_HID0_SLEEP@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	xorl	%eax, %eax
	callq	_powerpc_sync
	xorl	%eax, %eax
	callq	_isync
	xorl	%eax, %eax
	callq	_mfmsr
	movl	%eax, %ebx
	movq	_PSL_POW@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	(%r15), %edi
	movl	%r14d, %esi
	callq	_mtspr
	xorl	%eax, %eax
	callq	_powerpc_sync
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	_mtmsr
	jmp	LBB0_6
LBB0_8:
	movq	%rbx, %rdi
	callq	_enable_fpu
	movq	(%r12), %rax
	cmpq	%rax, %r14
	jne	LBB0_11
LBB0_10:
	movq	%r14, %rdi
	callq	_enable_vec
	jmp	LBB0_11
	.cfi_endproc
                                        ## -- End function
.zerofill __DATA,__bss,_cpu_sleep.timebase,4,2 ## @cpu_sleep.timebase
.zerofill __DATA,__bss,_cpu_sleep.sprgs.0,4,4 ## @cpu_sleep.sprgs.0
.zerofill __DATA,__bss,_cpu_sleep.sprgs.1,4,4 ## @cpu_sleep.sprgs.1
.zerofill __DATA,__bss,_cpu_sleep.sprgs.2,4,3 ## @cpu_sleep.sprgs.2
.zerofill __DATA,__bss,_cpu_sleep.sprgs.3,4,4 ## @cpu_sleep.sprgs.3
.zerofill __DATA,__bss,_cpu_sleep.srrs.0,4,2 ## @cpu_sleep.srrs.0
.zerofill __DATA,__bss,_cpu_sleep.srrs.1,4,2 ## @cpu_sleep.srrs.1
	.comm	_pcpup,4,2                      ## @pcpup
	.comm	_ap_pcpu,4,2                    ## @ap_pcpu
	.comm	_restore,8,3                    ## @restore
	.comm	_fputhread,4,2                  ## @fputhread
	.comm	_vecthread,4,2                  ## @vecthread
	.comm	_SPR_SPRG0,4,2                  ## @SPR_SPRG0
	.comm	_SPR_SPRG1,4,2                  ## @SPR_SPRG1
	.comm	_SPR_SPRG2,4,2                  ## @SPR_SPRG2
	.comm	_SPR_SPRG3,4,2                  ## @SPR_SPRG3
	.comm	_SPR_SRR0,4,2                   ## @SPR_SRR0
	.comm	_SPR_SRR1,4,2                   ## @SPR_SRR1
	.comm	_SPR_HID0,4,2                   ## @SPR_HID0
	.comm	_HID0_DOZE,4,2                  ## @HID0_DOZE
	.comm	_HID0_NAP,4,2                   ## @HID0_NAP
	.comm	_HID0_SLEEP,4,2                 ## @HID0_SLEEP
	.comm	_PSL_POW,4,2                    ## @PSL_POW
	.comm	_curthread,8,3                  ## @curthread
	.comm	_curpcb,8,3                     ## @curpcb
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cpu_sleep                      ; -- Begin function cpu_sleep
	.p2align	2
_cpu_sleep:                             ; @cpu_sleep
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
Lloh0:
	adrp	x8, _pcpup@GOTPAGE
Lloh1:
	ldr	x8, [x8, _pcpup@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _ap_pcpu@GOTPAGE
Lloh4:
	ldr	x9, [x9, _ap_pcpu@GOTPAGEOFF]
Lloh5:
	str	w8, [x9]
Lloh6:
	adrp	x8, _restore@GOTPAGE
Lloh7:
	ldr	x8, [x8, _restore@GOTPAGEOFF]
Lloh8:
	ldr	x0, [x8]
	add	x1, sp, #8
	bl	_PCPU_SET
	bl	_mfmsr
	mov	x21, x0
Lloh9:
	adrp	x8, _fputhread@GOTPAGE
Lloh10:
	ldr	x8, [x8, _fputhread@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	_PCPU_GET
	mov	x20, x0
Lloh12:
	adrp	x8, _vecthread@GOTPAGE
Lloh13:
	ldr	x8, [x8, _vecthread@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	bl	_PCPU_GET
	mov	x19, x0
	cbz	x20, LBB0_2
; %bb.1:
	mov	x0, x20
	bl	_save_fpu
LBB0_2:
	cbz	x19, LBB0_4
; %bb.3:
	mov	x0, x19
	bl	_save_vec
LBB0_4:
	ldr	x0, [sp, #8]
	bl	_setjmp
	cbz	x0, LBB0_8
; %bb.5:
Lloh15:
	adrp	x8, _cpu_sleep.timebase@PAGE
Lloh16:
	ldr	w0, [x8, _cpu_sleep.timebase@PAGEOFF]
	mov	w1, #0
	bl	_platform_smp_timebase_sync
Lloh17:
	adrp	x22, _curthread@GOTPAGE
Lloh18:
	ldr	x22, [x22, _curthread@GOTPAGEOFF]
	ldr	x0, [x22]
	mov	x1, x0
	bl	_PCPU_SET
Lloh19:
	adrp	x8, _curpcb@GOTPAGE
Lloh20:
	ldr	x8, [x8, _curpcb@GOTPAGEOFF]
Lloh21:
	ldr	x0, [x8]
	ldr	x8, [x22]
	ldr	x1, [x8]
	bl	_PCPU_SET
	ldr	x0, [x22]
	bl	_pmap_activate
	bl	_powerpc_sync
Lloh22:
	adrp	x8, _SPR_SPRG0@GOTPAGE
Lloh23:
	ldr	x8, [x8, _SPR_SPRG0@GOTPAGEOFF]
Lloh24:
	ldr	w0, [x8]
Lloh25:
	adrp	x8, _cpu_sleep.sprgs.0@PAGE
Lloh26:
	ldr	w1, [x8, _cpu_sleep.sprgs.0@PAGEOFF]
	bl	_mtspr
Lloh27:
	adrp	x8, _SPR_SPRG1@GOTPAGE
Lloh28:
	ldr	x8, [x8, _SPR_SPRG1@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
Lloh30:
	adrp	x8, _cpu_sleep.sprgs.1@PAGE
Lloh31:
	ldr	w1, [x8, _cpu_sleep.sprgs.1@PAGEOFF]
	bl	_mtspr
Lloh32:
	adrp	x8, _SPR_SPRG2@GOTPAGE
Lloh33:
	ldr	x8, [x8, _SPR_SPRG2@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
Lloh35:
	adrp	x8, _cpu_sleep.sprgs.2@PAGE
Lloh36:
	ldr	w1, [x8, _cpu_sleep.sprgs.2@PAGEOFF]
	bl	_mtspr
Lloh37:
	adrp	x8, _SPR_SPRG3@GOTPAGE
Lloh38:
	ldr	x8, [x8, _SPR_SPRG3@GOTPAGEOFF]
Lloh39:
	ldr	w0, [x8]
Lloh40:
	adrp	x8, _cpu_sleep.sprgs.3@PAGE
Lloh41:
	ldr	w1, [x8, _cpu_sleep.sprgs.3@PAGEOFF]
	bl	_mtspr
Lloh42:
	adrp	x8, _SPR_SRR0@GOTPAGE
Lloh43:
	ldr	x8, [x8, _SPR_SRR0@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
Lloh45:
	adrp	x8, _cpu_sleep.srrs.0@PAGE
Lloh46:
	ldr	w1, [x8, _cpu_sleep.srrs.0@PAGEOFF]
	bl	_mtspr
Lloh47:
	adrp	x8, _SPR_SRR1@GOTPAGE
Lloh48:
	ldr	x8, [x8, _SPR_SRR1@GOTPAGEOFF]
Lloh49:
	ldr	w0, [x8]
Lloh50:
	adrp	x8, _cpu_sleep.srrs.1@PAGE
Lloh51:
	ldr	w1, [x8, _cpu_sleep.srrs.1@PAGEOFF]
	bl	_mtspr
	mov	x0, x21
	bl	_mtmsr
	ldr	x8, [x22]
	cmp	x20, x8
	b.eq	LBB0_10
; %bb.6:
	cmp	x19, x8
	b.eq	LBB0_11
LBB0_7:
	bl	_powerpc_sync
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_8:
Lloh52:
	adrp	x8, _SPR_SPRG0@GOTPAGE
Lloh53:
	ldr	x8, [x8, _SPR_SPRG0@GOTPAGEOFF]
Lloh54:
	ldr	w0, [x8]
	bl	_mfspr
Lloh55:
	adrp	x8, _cpu_sleep.sprgs.0@PAGE
	str	w0, [x8, _cpu_sleep.sprgs.0@PAGEOFF]
Lloh56:
	adrp	x8, _SPR_SPRG1@GOTPAGE
Lloh57:
	ldr	x8, [x8, _SPR_SPRG1@GOTPAGEOFF]
Lloh58:
	ldr	w0, [x8]
	bl	_mfspr
Lloh59:
	adrp	x8, _cpu_sleep.sprgs.1@PAGE
	str	w0, [x8, _cpu_sleep.sprgs.1@PAGEOFF]
Lloh60:
	adrp	x8, _SPR_SPRG2@GOTPAGE
Lloh61:
	ldr	x8, [x8, _SPR_SPRG2@GOTPAGEOFF]
Lloh62:
	ldr	w0, [x8]
	bl	_mfspr
Lloh63:
	adrp	x8, _cpu_sleep.sprgs.2@PAGE
	str	w0, [x8, _cpu_sleep.sprgs.2@PAGEOFF]
Lloh64:
	adrp	x8, _SPR_SPRG3@GOTPAGE
Lloh65:
	ldr	x8, [x8, _SPR_SPRG3@GOTPAGEOFF]
Lloh66:
	ldr	w0, [x8]
	bl	_mfspr
Lloh67:
	adrp	x8, _cpu_sleep.sprgs.3@PAGE
	str	w0, [x8, _cpu_sleep.sprgs.3@PAGEOFF]
Lloh68:
	adrp	x8, _SPR_SRR0@GOTPAGE
Lloh69:
	ldr	x8, [x8, _SPR_SRR0@GOTPAGEOFF]
Lloh70:
	ldr	w0, [x8]
	bl	_mfspr
Lloh71:
	adrp	x8, _cpu_sleep.srrs.0@PAGE
	str	w0, [x8, _cpu_sleep.srrs.0@PAGEOFF]
Lloh72:
	adrp	x8, _SPR_SRR1@GOTPAGE
Lloh73:
	ldr	x8, [x8, _SPR_SRR1@GOTPAGEOFF]
Lloh74:
	ldr	w0, [x8]
	bl	_mfspr
	adrp	x8, _cpu_sleep.srrs.1@PAGE
	str	w0, [x8, _cpu_sleep.srrs.1@PAGEOFF]
	bl	_mftb
	adrp	x8, _cpu_sleep.timebase@PAGE
	str	w0, [x8, _cpu_sleep.timebase@PAGEOFF]
	bl	_powerpc_sync
	bl	_flush_disable_caches
Lloh75:
	adrp	x21, _SPR_HID0@GOTPAGE
Lloh76:
	ldr	x21, [x21, _SPR_HID0@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_mfspr
Lloh77:
	adrp	x8, _HID0_DOZE@GOTPAGE
Lloh78:
	ldr	x8, [x8, _HID0_DOZE@GOTPAGEOFF]
Lloh79:
	ldr	w8, [x8]
Lloh80:
	adrp	x9, _HID0_NAP@GOTPAGE
Lloh81:
	ldr	x9, [x9, _HID0_NAP@GOTPAGEOFF]
Lloh82:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w8, w0, w8
Lloh83:
	adrp	x9, _HID0_SLEEP@GOTPAGE
Lloh84:
	ldr	x9, [x9, _HID0_SLEEP@GOTPAGEOFF]
Lloh85:
	ldr	w9, [x9]
	orr	w20, w8, w9
	bl	_powerpc_sync
	bl	_isync
	bl	_mfmsr
Lloh86:
	adrp	x8, _PSL_POW@GOTPAGE
Lloh87:
	ldr	x8, [x8, _PSL_POW@GOTPAGEOFF]
Lloh88:
	ldr	w8, [x8]
	orr	w19, w8, w0
	ldr	w0, [x21]
	mov	x1, x20
	bl	_mtspr
	bl	_powerpc_sync
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	bl	_mtmsr
	b	LBB0_9
LBB0_10:
	mov	x0, x20
	bl	_enable_fpu
	ldr	x8, [x22]
	cmp	x19, x8
	b.ne	LBB0_7
LBB0_11:
	mov	x0, x19
	bl	_enable_vec
	b	LBB0_7
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotStr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdr	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdr	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdr	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdr	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdr	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdr	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdr	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGot	Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpAdrp	Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpAdrp	Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpAdrp	Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpAdrp	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpAdrp	Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.cfi_endproc
                                        ; -- End function
.zerofill __DATA,__bss,_cpu_sleep.timebase,4,2 ; @cpu_sleep.timebase
.zerofill __DATA,__bss,_cpu_sleep.sprgs.0,4,2 ; @cpu_sleep.sprgs.0
.zerofill __DATA,__bss,_cpu_sleep.sprgs.1,4,2 ; @cpu_sleep.sprgs.1
.zerofill __DATA,__bss,_cpu_sleep.sprgs.2,4,2 ; @cpu_sleep.sprgs.2
.zerofill __DATA,__bss,_cpu_sleep.sprgs.3,4,2 ; @cpu_sleep.sprgs.3
.zerofill __DATA,__bss,_cpu_sleep.srrs.0,4,2 ; @cpu_sleep.srrs.0
.zerofill __DATA,__bss,_cpu_sleep.srrs.1,4,2 ; @cpu_sleep.srrs.1
	.comm	_pcpup,4,2                      ; @pcpup
	.comm	_ap_pcpu,4,2                    ; @ap_pcpu
	.comm	_restore,8,3                    ; @restore
	.comm	_fputhread,4,2                  ; @fputhread
	.comm	_vecthread,4,2                  ; @vecthread
	.comm	_SPR_SPRG0,4,2                  ; @SPR_SPRG0
	.comm	_SPR_SPRG1,4,2                  ; @SPR_SPRG1
	.comm	_SPR_SPRG2,4,2                  ; @SPR_SPRG2
	.comm	_SPR_SPRG3,4,2                  ; @SPR_SPRG3
	.comm	_SPR_SRR0,4,2                   ; @SPR_SRR0
	.comm	_SPR_SRR1,4,2                   ; @SPR_SRR1
	.comm	_SPR_HID0,4,2                   ; @SPR_HID0
	.comm	_HID0_DOZE,4,2                  ; @HID0_DOZE
	.comm	_HID0_NAP,4,2                   ; @HID0_NAP
	.comm	_HID0_SLEEP,4,2                 ; @HID0_SLEEP
	.comm	_PSL_POW,4,2                    ; @PSL_POW
	.comm	_curthread,8,3                  ; @curthread
	.comm	_curpcb,8,3                     ; @curpcb
.subsections_via_symbols
