	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_init_TSC                       ## -- Begin function init_TSC
	.p2align	4, 0x90
_init_TSC:                              ## @init_TSC
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	_cpu_feature@GOTPCREL(%rip), %rax
	movq	_CPUID_TSC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rax)
	je	LBB0_6
## %bb.1:
	movq	_tsc_disabled@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	jne	LBB0_6
## %bb.2:
	xorl	%eax, %eax
	callq	_probe_tsc_freq
	movq	_tsc_freq@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	testq	%rsi, %rsi
	je	LBB0_4
## %bb.3:
	movq	_rdtsc@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_tsc_is_invariant@GOTPCREL(%rip), %rax
	xorl	%edx, %edx
	cmpq	$0, (%rax)
	sete	%dl
	callq	_set_cputicker
LBB0_4:
	movq	_tsc_is_invariant@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	jne	LBB0_6
## %bb.5:
	movq	_cpufreq_pre_change@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_tsc_freq_changing@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_EVENTHANDLER_PRI_FIRST@GOTPCREL(%rip), %rbx
	movl	(%rbx), %ecx
	xorl	%edx, %edx
	callq	_EVENTHANDLER_REGISTER
	movq	_tsc_pre_tag@GOTPCREL(%rip), %rcx
	movq	%rax, (%rcx)
	movq	_cpufreq_post_change@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_tsc_freq_changed@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %ecx
	xorl	%edx, %edx
	callq	_EVENTHANDLER_REGISTER
	movq	_tsc_post_tag@GOTPCREL(%rip), %rcx
	movq	%rax, (%rcx)
	movq	_cpufreq_levels_changed@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_tsc_levels_changed@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_EVENTHANDLER_PRI_ANY@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	xorl	%edx, %edx
	callq	_EVENTHANDLER_REGISTER
	movq	_tsc_levels_tag@GOTPCREL(%rip), %rcx
	movq	%rax, (%rcx)
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_cpu_feature,4,2                ## @cpu_feature
	.comm	_CPUID_TSC,4,2                  ## @CPUID_TSC
	.comm	_tsc_disabled,8,3               ## @tsc_disabled
	.comm	_tsc_freq,8,3                   ## @tsc_freq
	.comm	_rdtsc,4,2                      ## @rdtsc
	.comm	_tsc_is_invariant,8,3           ## @tsc_is_invariant
	.comm	_cpufreq_pre_change,4,2         ## @cpufreq_pre_change
	.comm	_tsc_freq_changing,4,2          ## @tsc_freq_changing
	.comm	_EVENTHANDLER_PRI_FIRST,4,2     ## @EVENTHANDLER_PRI_FIRST
	.comm	_tsc_pre_tag,8,3                ## @tsc_pre_tag
	.comm	_cpufreq_post_change,4,2        ## @cpufreq_post_change
	.comm	_tsc_freq_changed,4,2           ## @tsc_freq_changed
	.comm	_tsc_post_tag,8,3               ## @tsc_post_tag
	.comm	_cpufreq_levels_changed,4,2     ## @cpufreq_levels_changed
	.comm	_tsc_levels_changed,4,2         ## @tsc_levels_changed
	.comm	_EVENTHANDLER_PRI_ANY,4,2       ## @EVENTHANDLER_PRI_ANY
	.comm	_tsc_levels_tag,8,3             ## @tsc_levels_tag
	.comm	_CPUID_STEPPING,4,2             ## @CPUID_STEPPING
	.comm	_cpu_id,4,2                     ## @cpu_id
	.comm	_cpu_vendor_id,4,2              ## @cpu_vendor_id
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_init_TSC                       ; -- Begin function init_TSC
	.p2align	2
_init_TSC:                              ; @init_TSC
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x8, _cpu_feature@GOTPAGE
Lloh1:
	ldr	x8, [x8, _cpu_feature@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _CPUID_TSC@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CPUID_TSC@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh6:
	adrp	x9, _tsc_disabled@GOTPAGE
Lloh7:
	ldr	x9, [x9, _tsc_disabled@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	cmp	w8, #0
	ccmp	x9, #0, #0, ne
	b.ne	LBB0_5
; %bb.1:
	bl	_probe_tsc_freq
Lloh9:
	adrp	x8, _tsc_freq@GOTPAGE
Lloh10:
	ldr	x8, [x8, _tsc_freq@GOTPAGEOFF]
Lloh11:
	ldr	x1, [x8]
Lloh12:
	adrp	x19, _tsc_is_invariant@GOTPAGE
Lloh13:
	ldr	x19, [x19, _tsc_is_invariant@GOTPAGEOFF]
	cbz	x1, LBB0_3
; %bb.2:
Lloh14:
	adrp	x8, _rdtsc@GOTPAGE
Lloh15:
	ldr	x8, [x8, _rdtsc@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	ldr	x8, [x19]
	cmp	x8, #0
	cset	w2, eq
	bl	_set_cputicker
LBB0_3:
	ldr	x8, [x19]
	cbnz	x8, LBB0_5
; %bb.4:
Lloh17:
	adrp	x8, _cpufreq_pre_change@GOTPAGE
Lloh18:
	ldr	x8, [x8, _cpufreq_pre_change@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x8]
Lloh20:
	adrp	x8, _tsc_freq_changing@GOTPAGE
Lloh21:
	ldr	x8, [x8, _tsc_freq_changing@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
Lloh23:
	adrp	x19, _EVENTHANDLER_PRI_FIRST@GOTPAGE
Lloh24:
	ldr	x19, [x19, _EVENTHANDLER_PRI_FIRST@GOTPAGEOFF]
	ldr	w3, [x19]
	mov	x2, #0
	bl	_EVENTHANDLER_REGISTER
Lloh25:
	adrp	x8, _tsc_pre_tag@GOTPAGE
Lloh26:
	ldr	x8, [x8, _tsc_pre_tag@GOTPAGEOFF]
Lloh27:
	adrp	x9, _cpufreq_post_change@GOTPAGE
Lloh28:
	ldr	x9, [x9, _cpufreq_post_change@GOTPAGEOFF]
Lloh29:
	str	x0, [x8]
Lloh30:
	ldr	w0, [x9]
Lloh31:
	adrp	x8, _tsc_freq_changed@GOTPAGE
Lloh32:
	ldr	x8, [x8, _tsc_freq_changed@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	ldr	w3, [x19]
	mov	x2, #0
	bl	_EVENTHANDLER_REGISTER
Lloh34:
	adrp	x8, _tsc_post_tag@GOTPAGE
Lloh35:
	ldr	x8, [x8, _tsc_post_tag@GOTPAGEOFF]
Lloh36:
	str	x0, [x8]
Lloh37:
	adrp	x8, _cpufreq_levels_changed@GOTPAGE
Lloh38:
	ldr	x8, [x8, _cpufreq_levels_changed@GOTPAGEOFF]
Lloh39:
	ldr	w0, [x8]
Lloh40:
	adrp	x8, _tsc_levels_changed@GOTPAGE
Lloh41:
	ldr	x8, [x8, _tsc_levels_changed@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
Lloh43:
	adrp	x8, _EVENTHANDLER_PRI_ANY@GOTPAGE
Lloh44:
	ldr	x8, [x8, _EVENTHANDLER_PRI_ANY@GOTPAGEOFF]
Lloh45:
	ldr	w3, [x8]
	mov	x2, #0
	bl	_EVENTHANDLER_REGISTER
Lloh46:
	adrp	x8, _tsc_levels_tag@GOTPAGE
Lloh47:
	ldr	x8, [x8, _tsc_levels_tag@GOTPAGEOFF]
Lloh48:
	str	x0, [x8]
LBB0_5:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotStr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotStr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh30
	.loh AdrpLdrGotStr	Lloh25, Lloh26, Lloh29
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_cpu_feature,4,2                ; @cpu_feature
	.comm	_CPUID_TSC,4,2                  ; @CPUID_TSC
	.comm	_tsc_disabled,8,3               ; @tsc_disabled
	.comm	_tsc_freq,8,3                   ; @tsc_freq
	.comm	_rdtsc,4,2                      ; @rdtsc
	.comm	_tsc_is_invariant,8,3           ; @tsc_is_invariant
	.comm	_cpufreq_pre_change,4,2         ; @cpufreq_pre_change
	.comm	_tsc_freq_changing,4,2          ; @tsc_freq_changing
	.comm	_EVENTHANDLER_PRI_FIRST,4,2     ; @EVENTHANDLER_PRI_FIRST
	.comm	_tsc_pre_tag,8,3                ; @tsc_pre_tag
	.comm	_cpufreq_post_change,4,2        ; @cpufreq_post_change
	.comm	_tsc_freq_changed,4,2           ; @tsc_freq_changed
	.comm	_tsc_post_tag,8,3               ; @tsc_post_tag
	.comm	_cpufreq_levels_changed,4,2     ; @cpufreq_levels_changed
	.comm	_tsc_levels_changed,4,2         ; @tsc_levels_changed
	.comm	_EVENTHANDLER_PRI_ANY,4,2       ; @EVENTHANDLER_PRI_ANY
	.comm	_tsc_levels_tag,8,3             ; @tsc_levels_tag
	.comm	_CPUID_STEPPING,4,2             ; @CPUID_STEPPING
	.comm	_cpu_id,4,2                     ; @cpu_id
	.comm	_cpu_vendor_id,4,2              ; @cpu_vendor_id
.subsections_via_symbols
