	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal4,4byte_literals
	.p2align	2                               ## -- Begin function DoRailCore
LCPI0_0:
	.long	0x3b800000                      ## float 0.00390625
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4
LCPI0_1:
	.long	0x80000000                      ## float -0
	.long	0x80000000                      ## float -0
	.long	0x80000000                      ## float -0
	.long	0x80000000                      ## float -0
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3
LCPI0_2:
	.quad	0x3fd0000000000000              ## double 0.25
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_DoRailCore:                            ## @DoRailCore
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movaps	%xmm1, -64(%rbp)                ## 16-byte Spill
	movl	%edx, %r15d
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movl	%edi, %r12d
	mulss	LCPI0_0(%rip), %xmm0
	movss	%xmm0, -48(%rbp)                ## 4-byte Spill
	movl	$4, %edi
	movl	$6, %esi
	callq	_RB_CHECKOVERFLOW
	movq	_tess@GOTPCREL(%rip), %rbx
	movslq	(%rbx), %r14
	movaps	LCPI0_1(%rip), %xmm1            ## xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	movaps	-64(%rbp), %xmm0                ## 16-byte Reload
	xorps	%xmm0, %xmm1
	movaps	%xmm1, -80(%rbp)                ## 16-byte Spill
	movq	40(%rbx), %rax
	movl	(%rax,%r14,4), %edx
	movl	%r12d, %edi
	movl	%r15d, %esi
	callq	_VectorMA
	movq	8(%rbx), %rax
	movslq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rcx
	movq	(%rcx), %rcx
	movl	$0, (%rcx)
	movslq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rax
	movq	(%rax), %rax
	movl	$0, 4(%rax)
	movq	_backEnd@GOTPCREL(%rip), %r13
	movq	(%r13), %rax
	movq	(%rax), %rax
	movsd	LCPI0_2(%rip), %xmm0            ## xmm0 = mem[0],zero
	movsd	(%rax), %xmm1                   ## xmm1 = mem[0],zero
	mulsd	%xmm0, %xmm1
	movq	16(%rbx), %rdx
	movq	(%rdx,%rcx,8), %rdx
	movsd	%xmm1, (%rdx)
	movsd	8(%rax), %xmm1                  ## xmm1 = mem[0],zero
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rdx)
	mulsd	16(%rax), %xmm0
	movsd	%xmm0, 16(%rdx)
	leaq	1(%rcx), %rax
	movl	%eax, (%rbx)
	movq	40(%rbx), %rax
	movl	4(%rax,%rcx,4), %edx
	movl	%r12d, %edi
	movaps	-80(%rbp), %xmm0                ## 16-byte Reload
	movl	%r15d, %esi
	callq	_VectorMA
	movq	8(%rbx), %rax
	movslq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rcx
	movq	(%rcx), %rcx
	movl	$0, (%rcx)
	movslq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rax
	movq	(%rax), %rax
	movl	$1, 4(%rax)
	movq	(%r13), %rax
	movq	(%rax), %rax
	movsd	(%rax), %xmm0                   ## xmm0 = mem[0],zero
	movq	16(%rbx), %rdx
	movq	(%rdx,%rcx,8), %rdx
	movsd	%xmm0, (%rdx)
	movsd	8(%rax), %xmm0                  ## xmm0 = mem[0],zero
	movsd	%xmm0, 8(%rdx)
	movsd	16(%rax), %xmm0                 ## xmm0 = mem[0],zero
	movsd	%xmm0, 16(%rdx)
	leaq	1(%rcx), %rax
	movl	%eax, (%rbx)
	movq	40(%rbx), %rax
	movl	4(%rax,%rcx,4), %edx
	movl	-44(%rbp), %r13d                ## 4-byte Reload
	movl	%r13d, %edi
	movaps	-64(%rbp), %xmm0                ## 16-byte Reload
	movl	%r15d, %esi
	callq	_VectorMA
	cvttss2si	-48(%rbp), %r12d        ## 4-byte Folded Reload
	movq	8(%rbx), %rax
	movslq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rcx
	movq	(%rcx), %rcx
	movl	%r12d, (%rcx)
	movslq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rax
	movq	(%rax), %rax
	movl	$0, 4(%rax)
	movq	_backEnd@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%rax), %rax
	movsd	(%rax), %xmm0                   ## xmm0 = mem[0],zero
	movq	16(%rbx), %rdx
	movq	(%rdx,%rcx,8), %rdx
	movsd	%xmm0, (%rdx)
	movsd	8(%rax), %xmm0                  ## xmm0 = mem[0],zero
	movsd	%xmm0, 8(%rdx)
	movsd	16(%rax), %xmm0                 ## xmm0 = mem[0],zero
	movsd	%xmm0, 16(%rdx)
	leaq	1(%rcx), %rax
	movl	%eax, (%rbx)
	movq	40(%rbx), %rax
	movl	4(%rax,%rcx,4), %edx
	movl	%r13d, %edi
	movaps	-80(%rbp), %xmm0                ## 16-byte Reload
	movl	%r15d, %esi
	callq	_VectorMA
	movq	8(%rbx), %rax
	movslq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rcx
	movq	(%rcx), %rcx
	movl	%r12d, (%rcx)
	movslq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rax
	movq	(%rax), %rax
	movl	$1, 4(%rax)
	movq	_backEnd@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%rax), %rax
	movsd	(%rax), %xmm0                   ## xmm0 = mem[0],zero
	movq	16(%rbx), %rdx
	movq	(%rdx,%rcx,8), %rdx
	movsd	%xmm0, (%rdx)
	movsd	8(%rax), %xmm0                  ## xmm0 = mem[0],zero
	movsd	%xmm0, 8(%rdx)
	movsd	16(%rax), %xmm0                 ## xmm0 = mem[0],zero
	movsd	%xmm0, 16(%rdx)
	leal	1(%rcx), %eax
	movl	%eax, (%rbx)
	movq	24(%rbx), %rax
	movslq	32(%rbx), %rcx
	leal	1(%rcx), %edx
	movl	%edx, 32(%rbx)
	movl	%r14d, (%rax,%rcx,4)
	leal	1(%r14), %ecx
	movslq	32(%rbx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 32(%rbx)
	movl	%ecx, (%rax,%rdx,4)
	leal	2(%r14), %edx
	movslq	32(%rbx), %rsi
	leal	1(%rsi), %edi
	movl	%edi, 32(%rbx)
	movl	%edx, (%rax,%rsi,4)
	movslq	32(%rbx), %rsi
	leal	1(%rsi), %edi
	movl	%edi, 32(%rbx)
	movl	%edx, (%rax,%rsi,4)
	movslq	32(%rbx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 32(%rbx)
	movl	%ecx, (%rax,%rdx,4)
	leal	3(%r14), %ecx
	movslq	32(%rbx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 32(%rbx)
	movl	%ecx, (%rax,%rdx,4)
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_tess,48,3                      ## @tess
	.comm	_backEnd,8,3                    ## @backEnd
	.no_dead_strip	_DoRailCore
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function DoRailCore
_DoRailCore:                            ; @DoRailCore
	.cfi_startproc
; %bb.0:
	stp	d11, d10, [sp, #-112]!          ; 16-byte Folded Spill
	.cfi_def_cfa_offset 112
	stp	d9, d8, [sp, #16]               ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset b8, -88
	.cfi_offset b9, -96
	.cfi_offset b10, -104
	.cfi_offset b11, -112
	fmov	s9, s1
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	mov	w8, #998244352
	fmov	s1, w8
	fmul	s10, s0, s1
	mov	w0, #4
	mov	w1, #6
	bl	_RB_CHECKOVERFLOW
Lloh0:
	adrp	x22, _tess@GOTPAGE
Lloh1:
	ldr	x22, [x22, _tess@GOTPAGEOFF]
	ldrsw	x23, [x22]
	fneg	s8, s9
	ldr	x8, [x22, #40]
	ldr	w2, [x8, x23, lsl #2]
	mov	x0, x21
	fmov	s0, s9
	mov	x1, x19
	bl	_VectorMA
	ldrsw	x8, [x22]
	ldp	x9, x10, [x22, #8]
	ldr	x8, [x9, x8, lsl #3]
	ldr	x8, [x8]
	str	wzr, [x8]
	ldrsw	x8, [x22]
	lsl	x11, x8, #3
	ldr	x9, [x9, x11]
	ldr	x9, [x9]
	str	wzr, [x9, #4]
Lloh2:
	adrp	x24, _backEnd@GOTPAGE
Lloh3:
	ldr	x24, [x24, _backEnd@GOTPAGEOFF]
	ldr	x9, [x24]
	ldr	x9, [x9]
	ldr	d0, [x9]
	fmov	d1, #0.25000000
	fmul	d0, d0, d1
	ldr	x10, [x10, x11]
	str	d0, [x10]
	ldr	d0, [x9, #8]
	fmul	d0, d0, d1
	str	d0, [x10, #8]
	ldr	d0, [x9, #16]
	fmul	d0, d0, d1
	str	d0, [x10, #16]
	add	x8, x8, #1
	str	w8, [x22]
	ldr	x9, [x22, #40]
	ldr	w2, [x9, x8, lsl #2]
	mov	x0, x21
	fmov	s0, s8
	mov	x1, x19
	bl	_VectorMA
	ldrsw	x8, [x22]
	ldp	x9, x10, [x22, #8]
	ldr	x8, [x9, x8, lsl #3]
	ldr	x8, [x8]
	str	wzr, [x8]
	ldrsw	x8, [x22]
	lsl	x11, x8, #3
	ldr	x9, [x9, x11]
	ldr	x9, [x9]
	mov	w21, #1
	str	w21, [x9, #4]
	ldr	x9, [x24]
	ldr	x9, [x9]
	ldr	d0, [x9]
	ldr	x10, [x10, x11]
	str	d0, [x10]
	ldr	d0, [x9, #8]
	str	d0, [x10, #8]
	ldr	d0, [x9, #16]
	str	d0, [x10, #16]
	add	x8, x8, #1
	str	w8, [x22]
	ldr	x9, [x22, #40]
	ldr	w2, [x9, x8, lsl #2]
	mov	x0, x20
	fmov	s0, s9
	mov	x1, x19
	bl	_VectorMA
	fcvtzs	w25, s10
	ldrsw	x8, [x22]
	ldp	x9, x10, [x22, #8]
	ldr	x8, [x9, x8, lsl #3]
	ldr	x8, [x8]
	str	w25, [x8]
	ldrsw	x8, [x22]
	lsl	x11, x8, #3
	ldr	x9, [x9, x11]
	ldr	x9, [x9]
	str	wzr, [x9, #4]
	ldr	x9, [x24]
	ldr	x9, [x9]
	ldr	d0, [x9]
	ldr	x10, [x10, x11]
	str	d0, [x10]
	ldr	d0, [x9, #8]
	str	d0, [x10, #8]
	ldr	d0, [x9, #16]
	str	d0, [x10, #16]
	add	x8, x8, #1
	str	w8, [x22]
	ldr	x9, [x22, #40]
	ldr	w2, [x9, x8, lsl #2]
	mov	x0, x20
	fmov	s0, s8
	mov	x1, x19
	bl	_VectorMA
	ldrsw	x8, [x22]
	ldp	x9, x10, [x22, #8]
	ldr	x8, [x9, x8, lsl #3]
	ldr	x8, [x8]
	str	w25, [x8]
	ldrsw	x8, [x22]
	lsl	x11, x8, #3
	ldr	x9, [x9, x11]
	ldr	x9, [x9]
	str	w21, [x9, #4]
	ldr	x9, [x24]
	ldr	x9, [x9]
	ldr	x10, [x10, x11]
	ldr	d0, [x9]
	str	d0, [x10]
	ldr	d0, [x9, #8]
	str	d0, [x10, #8]
	add	w8, w8, #1
	str	w8, [x22]
	ldr	x8, [x22, #24]
	ldrsw	x11, [x22, #32]
	add	w12, w11, #1
	str	w12, [x22, #32]
	str	w23, [x8, x11, lsl #2]
	add	w11, w23, #1
	ldrsw	x12, [x22, #32]
	add	w13, w12, #1
	str	w13, [x22, #32]
	str	w11, [x8, x12, lsl #2]
	ldrsw	x12, [x22, #32]
	add	w13, w12, #1
	str	w13, [x22, #32]
	add	w13, w23, #2
	str	w13, [x8, x12, lsl #2]
	ldr	d0, [x9, #16]
	ldrsw	x9, [x22, #32]
	add	w12, w9, #1
	str	w12, [x22, #32]
	str	w13, [x8, x9, lsl #2]
	str	d0, [x10, #16]
	ldrsw	x9, [x22, #32]
	add	w10, w9, #1
	str	w10, [x22, #32]
	str	w11, [x8, x9, lsl #2]
	add	w9, w23, #3
	ldrsw	x10, [x22, #32]
	add	w11, w10, #1
	str	w11, [x22, #32]
	str	w9, [x8, x10, lsl #2]
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	d9, d8, [sp, #16]               ; 16-byte Folded Reload
	ldp	d11, d10, [sp], #112            ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_tess,48,3                      ; @tess
	.comm	_backEnd,8,3                    ; @backEnd
	.no_dead_strip	_DoRailCore
.subsections_via_symbols
