	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function basl_fwrite_fadt
_basl_fwrite_fadt:                      ## @basl_fwrite_fadt
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	leaq	L_.str(%rip), %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.2(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.3(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.4(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.5(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.6(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.7(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.8(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.9(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.10(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.11(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.12(%rip), %r15
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_basl_acpi_base@GOTPCREL(%rip), %r14
	movq	_FACS_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	addq	(%r14), %rdx
	leaq	L_.str.13(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_DSDT_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	addq	(%r14), %rdx
	leaq	L_.str.14(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.15(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.16(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_SCI_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	L_.str.17(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_SMI_CMD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	L_.str.18(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_BHYVE_ACPI_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	L_.str.19(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_BHYVE_ACPI_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	L_.str.20(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.21(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.22(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_PM1A_EVT_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	L_.str.23(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.24(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_PM1A_CNT_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	L_.str.25(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.26(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.27(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_IO_PMTMR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	L_.str.28(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.29(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.30(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.31(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.32(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.33(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.34(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.35(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.36(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.37(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.38(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.39(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.40(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.41(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.42(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.43(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.44(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.45(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.46(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.47(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.48(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.49(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.50(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.51(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.52(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.53(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.54(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.55(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.56(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.57(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.58(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.59(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.60(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.61(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.62(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.63(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.64(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.65(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.66(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.67(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.68(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.69(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.70(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.71(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.72(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.73(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.74(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.75(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.76(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.77(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.78(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.79(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.80(%rip), %rsi
	movq	%rbx, %rdi
	movq	%rsi, %r12
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.81(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.82(%rip), %rsi
	movq	%rbx, %rdi
	movq	%rsi, %r13
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.83(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.84(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.85(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.86(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.87(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.88(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.89(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_FACS_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	addq	(%r14), %rdx
	leaq	L_.str.90(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_DSDT_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	addq	(%r14), %rdx
	leaq	L_.str.91(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.92(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.93(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.94(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_PM1A_EVT_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	L_.str.95(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r15, %r14
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.96(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.97(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.98(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.99(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.100(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.101(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.94(%rip), %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_PM1A_CNT_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	leaq	L_.str.95(%rip), %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.102(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movq	%r12, %r15
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.97(%rip), %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.98(%rip), %rsi
	movq	%rsi, %r13
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.99(%rip), %r12
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.103(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.81(%rip), %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.82(%rip), %r15
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.12(%rip), %r14
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.104(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.80(%rip), %r13
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.93(%rip), %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.105(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	_IO_PMTMR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	leaq	L_.str.95(%rip), %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.106(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.97(%rip), %r13
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.83(%rip), %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.12(%rip), %r14
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.107(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.80(%rip), %r15
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.82(%rip), %r13
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.98(%rip), %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.108(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.81(%rip), %rsi
	movq	%rsi, %r14
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.83(%rip), %rsi
	movq	%rsi, %r15
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.12(%rip), %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	leaq	L_.str.109(%rip), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	leaq	L_.str.80(%rip), %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	_EFPRINTF
	movq	%rbx, %rdi
	callq	_EFFLUSH
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"/*\n"

L_.str.1:                               ## @.str.1
	.asciz	" * bhyve FADT template\n"

L_.str.2:                               ## @.str.2
	.asciz	" */\n"

L_.str.3:                               ## @.str.3
	.asciz	"[0004]\t\tSignature : \"FACP\"\n"

L_.str.4:                               ## @.str.4
	.asciz	"[0004]\t\tTable Length : 0000010C\n"

L_.str.5:                               ## @.str.5
	.asciz	"[0001]\t\tRevision : 05\n"

L_.str.6:                               ## @.str.6
	.asciz	"[0001]\t\tChecksum : 00\n"

L_.str.7:                               ## @.str.7
	.asciz	"[0006]\t\tOem ID : \"BHYVE \"\n"

L_.str.8:                               ## @.str.8
	.asciz	"[0008]\t\tOem Table ID : \"BVFACP  \"\n"

L_.str.9:                               ## @.str.9
	.asciz	"[0004]\t\tOem Revision : 00000001\n"

L_.str.10:                              ## @.str.10
	.asciz	"[0004]\t\tAsl Compiler ID : \"xxxx\"\n"

L_.str.11:                              ## @.str.11
	.asciz	"[0004]\t\tAsl Compiler Revision : 00000000\n"

L_.str.12:                              ## @.str.12
	.asciz	"\n"

L_.str.13:                              ## @.str.13
	.asciz	"[0004]\t\tFACS Address : %08X\n"

	.comm	_basl_acpi_base,8,3             ## @basl_acpi_base
	.comm	_FACS_OFFSET,8,3                ## @FACS_OFFSET
L_.str.14:                              ## @.str.14
	.asciz	"[0004]\t\tDSDT Address : %08X\n"

	.comm	_DSDT_OFFSET,8,3                ## @DSDT_OFFSET
L_.str.15:                              ## @.str.15
	.asciz	"[0001]\t\tModel : 01\n"

L_.str.16:                              ## @.str.16
	.asciz	"[0001]\t\tPM Profile : 00 [Unspecified]\n"

L_.str.17:                              ## @.str.17
	.asciz	"[0002]\t\tSCI Interrupt : %04X\n"

	.comm	_SCI_INT,4,2                    ## @SCI_INT
L_.str.18:                              ## @.str.18
	.asciz	"[0004]\t\tSMI Command Port : %08X\n"

	.comm	_SMI_CMD,4,2                    ## @SMI_CMD
L_.str.19:                              ## @.str.19
	.asciz	"[0001]\t\tACPI Enable Value : %02X\n"

	.comm	_BHYVE_ACPI_ENABLE,4,2          ## @BHYVE_ACPI_ENABLE
L_.str.20:                              ## @.str.20
	.asciz	"[0001]\t\tACPI Disable Value : %02X\n"

	.comm	_BHYVE_ACPI_DISABLE,4,2         ## @BHYVE_ACPI_DISABLE
L_.str.21:                              ## @.str.21
	.asciz	"[0001]\t\tS4BIOS Command : 00\n"

L_.str.22:                              ## @.str.22
	.asciz	"[0001]\t\tP-State Control : 00\n"

L_.str.23:                              ## @.str.23
	.asciz	"[0004]\t\tPM1A Event Block Address : %08X\n"

	.comm	_PM1A_EVT_ADDR,4,2              ## @PM1A_EVT_ADDR
L_.str.24:                              ## @.str.24
	.asciz	"[0004]\t\tPM1B Event Block Address : 00000000\n"

L_.str.25:                              ## @.str.25
	.asciz	"[0004]\t\tPM1A Control Block Address : %08X\n"

	.comm	_PM1A_CNT_ADDR,4,2              ## @PM1A_CNT_ADDR
L_.str.26:                              ## @.str.26
	.asciz	"[0004]\t\tPM1B Control Block Address : 00000000\n"

L_.str.27:                              ## @.str.27
	.asciz	"[0004]\t\tPM2 Control Block Address : 00000000\n"

L_.str.28:                              ## @.str.28
	.asciz	"[0004]\t\tPM Timer Block Address : %08X\n"

	.comm	_IO_PMTMR,4,2                   ## @IO_PMTMR
L_.str.29:                              ## @.str.29
	.asciz	"[0004]\t\tGPE0 Block Address : 00000000\n"

L_.str.30:                              ## @.str.30
	.asciz	"[0004]\t\tGPE1 Block Address : 00000000\n"

L_.str.31:                              ## @.str.31
	.asciz	"[0001]\t\tPM1 Event Block Length : 04\n"

L_.str.32:                              ## @.str.32
	.asciz	"[0001]\t\tPM1 Control Block Length : 02\n"

L_.str.33:                              ## @.str.33
	.asciz	"[0001]\t\tPM2 Control Block Length : 00\n"

L_.str.34:                              ## @.str.34
	.asciz	"[0001]\t\tPM Timer Block Length : 04\n"

L_.str.35:                              ## @.str.35
	.asciz	"[0001]\t\tGPE0 Block Length : 00\n"

L_.str.36:                              ## @.str.36
	.asciz	"[0001]\t\tGPE1 Block Length : 00\n"

L_.str.37:                              ## @.str.37
	.asciz	"[0001]\t\tGPE1 Base Offset : 00\n"

L_.str.38:                              ## @.str.38
	.asciz	"[0001]\t\t_CST Support : 00\n"

L_.str.39:                              ## @.str.39
	.asciz	"[0002]\t\tC2 Latency : 0000\n"

L_.str.40:                              ## @.str.40
	.asciz	"[0002]\t\tC3 Latency : 0000\n"

L_.str.41:                              ## @.str.41
	.asciz	"[0002]\t\tCPU Cache Size : 0000\n"

L_.str.42:                              ## @.str.42
	.asciz	"[0002]\t\tCache Flush Stride : 0000\n"

L_.str.43:                              ## @.str.43
	.asciz	"[0001]\t\tDuty Cycle Offset : 00\n"

L_.str.44:                              ## @.str.44
	.asciz	"[0001]\t\tDuty Cycle Width : 00\n"

L_.str.45:                              ## @.str.45
	.asciz	"[0001]\t\tRTC Day Alarm Index : 00\n"

L_.str.46:                              ## @.str.46
	.asciz	"[0001]\t\tRTC Month Alarm Index : 00\n"

L_.str.47:                              ## @.str.47
	.asciz	"[0001]\t\tRTC Century Index : 32\n"

L_.str.48:                              ## @.str.48
	.asciz	"[0002]\t\tBoot Flags (decoded below) : 0000\n"

L_.str.49:                              ## @.str.49
	.asciz	"\t\t\tLegacy Devices Supported (V2) : 0\n"

L_.str.50:                              ## @.str.50
	.asciz	"\t\t\t8042 Present on ports 60/64 (V2) : 0\n"

L_.str.51:                              ## @.str.51
	.asciz	"\t\t\tVGA Not Present (V4) : 1\n"

L_.str.52:                              ## @.str.52
	.asciz	"\t\t\tMSI Not Supported (V4) : 0\n"

L_.str.53:                              ## @.str.53
	.asciz	"\t\t\tPCIe ASPM Not Supported (V4) : 1\n"

L_.str.54:                              ## @.str.54
	.asciz	"\t\t\tCMOS RTC Not Present (V5) : 0\n"

L_.str.55:                              ## @.str.55
	.asciz	"[0001]\t\tReserved : 00\n"

L_.str.56:                              ## @.str.56
	.asciz	"[0004]\t\tFlags (decoded below) : 00000000\n"

L_.str.57:                              ## @.str.57
	.asciz	"\t\t\tWBINVD instruction is operational (V1) : 1\n"

L_.str.58:                              ## @.str.58
	.asciz	"\t\t\tWBINVD flushes all caches (V1) : 0\n"

L_.str.59:                              ## @.str.59
	.asciz	"\t\t\tAll CPUs support C1 (V1) : 1\n"

L_.str.60:                              ## @.str.60
	.asciz	"\t\t\tC2 works on MP system (V1) : 0\n"

L_.str.61:                              ## @.str.61
	.asciz	"\t\t\tControl Method Power Button (V1) : 0\n"

L_.str.62:                              ## @.str.62
	.asciz	"\t\t\tControl Method Sleep Button (V1) : 1\n"

L_.str.63:                              ## @.str.63
	.asciz	"\t\t\tRTC wake not in fixed reg space (V1) : 0\n"

L_.str.64:                              ## @.str.64
	.asciz	"\t\t\tRTC can wake system from S4 (V1) : 0\n"

L_.str.65:                              ## @.str.65
	.asciz	"\t\t\t32-bit PM Timer (V1) : 1\n"

L_.str.66:                              ## @.str.66
	.asciz	"\t\t\tDocking Supported (V1) : 0\n"

L_.str.67:                              ## @.str.67
	.asciz	"\t\t\tReset Register Supported (V2) : 1\n"

L_.str.68:                              ## @.str.68
	.asciz	"\t\t\tSealed Case (V3) : 0\n"

L_.str.69:                              ## @.str.69
	.asciz	"\t\t\tHeadless - No Video (V3) : 1\n"

L_.str.70:                              ## @.str.70
	.asciz	"\t\t\tUse native instr after SLP_TYPx (V3) : 0\n"

L_.str.71:                              ## @.str.71
	.asciz	"\t\t\tPCIEXP_WAK Bits Supported (V4) : 0\n"

L_.str.72:                              ## @.str.72
	.asciz	"\t\t\tUse Platform Timer (V4) : 0\n"

L_.str.73:                              ## @.str.73
	.asciz	"\t\t\tRTC_STS valid on S4 wake (V4) : 0\n"

L_.str.74:                              ## @.str.74
	.asciz	"\t\t\tRemote Power-on capable (V4) : 0\n"

L_.str.75:                              ## @.str.75
	.asciz	"\t\t\tUse APIC Cluster Model (V4) : 0\n"

L_.str.76:                              ## @.str.76
	.asciz	"\t\t\tUse APIC Physical Destination Mode (V4) : 1\n"

L_.str.77:                              ## @.str.77
	.asciz	"\t\t\tHardware Reduced (V5) : 0\n"

L_.str.78:                              ## @.str.78
	.asciz	"\t\t\tLow Power S0 Idle (V5) : 0\n"

L_.str.79:                              ## @.str.79
	.asciz	"[0012]\t\tReset Register : [Generic Address Structure]\n"

L_.str.80:                              ## @.str.80
	.asciz	"[0001]\t\tSpace ID : 01 [SystemIO]\n"

L_.str.81:                              ## @.str.81
	.asciz	"[0001]\t\tBit Width : 08\n"

L_.str.82:                              ## @.str.82
	.asciz	"[0001]\t\tBit Offset : 00\n"

L_.str.83:                              ## @.str.83
	.asciz	"[0001]\t\tEncoded Access Width : 01 [Byte Access:8]\n"

L_.str.84:                              ## @.str.84
	.asciz	"[0008]\t\tAddress : 0000000000000CF9\n"

L_.str.85:                              ## @.str.85
	.asciz	"[0001]\t\tValue to cause reset : 06\n"

L_.str.86:                              ## @.str.86
	.asciz	"[0002]\t\tARM Flags (decoded below): 0000\n"

L_.str.87:                              ## @.str.87
	.asciz	"\t\t\tPSCI Compliant : 0\n"

L_.str.88:                              ## @.str.88
	.asciz	"\t\t\tMust use HVC for PSCI : 0\n"

L_.str.89:                              ## @.str.89
	.asciz	"[0001]\t\tFADT Minor Revision : 01\n"

L_.str.90:                              ## @.str.90
	.asciz	"[0008]\t\tFACS Address : 00000000%08X\n"

L_.str.91:                              ## @.str.91
	.asciz	"[0008]\t\tDSDT Address : 00000000%08X\n"

L_.str.92:                              ## @.str.92
	.asciz	"[0012]\t\tPM1A Event Block : [Generic Address Structure]\n"

L_.str.93:                              ## @.str.93
	.asciz	"[0001]\t\tBit Width : 20\n"

L_.str.94:                              ## @.str.94
	.asciz	"[0001]\t\tEncoded Access Width : 02 [Word Access:16]\n"

L_.str.95:                              ## @.str.95
	.asciz	"[0008]\t\tAddress : 00000000%08X\n"

L_.str.96:                              ## @.str.96
	.asciz	"[0012]\t\tPM1B Event Block : [Generic Address Structure]\n"

L_.str.97:                              ## @.str.97
	.asciz	"[0001]\t\tBit Width : 00\n"

L_.str.98:                              ## @.str.98
	.asciz	"[0001]\t\tEncoded Access Width : 00 [Undefined/Legacy]\n"

L_.str.99:                              ## @.str.99
	.asciz	"[0008]\t\tAddress : 0000000000000000\n"

L_.str.100:                             ## @.str.100
	.asciz	"[0012]\t\tPM1A Control Block : [Generic Address Structure]\n"

L_.str.101:                             ## @.str.101
	.asciz	"[0001]\t\tBit Width : 10\n"

L_.str.102:                             ## @.str.102
	.asciz	"[0012]\t\tPM1B Control Block : [Generic Address Structure]\n"

L_.str.103:                             ## @.str.103
	.asciz	"[0012]\t\tPM2 Control Block : [Generic Address Structure]\n"

L_.str.104:                             ## @.str.104
	.asciz	"[0012]\t\tPM Timer Block : [Generic Address Structure]\n"

L_.str.105:                             ## @.str.105
	.asciz	"[0001]\t\tEncoded Access Width : 03 [DWord Access:32]\n"

L_.str.106:                             ## @.str.106
	.asciz	"[0012]\t\tGPE0 Block : [Generic Address Structure]\n"

L_.str.107:                             ## @.str.107
	.asciz	"[0012]\t\tGPE1 Block : [Generic Address Structure]\n"

L_.str.108:                             ## @.str.108
	.asciz	"[0012]\t\tSleep Control Register : [Generic Address Structure]\n"

L_.str.109:                             ## @.str.109
	.asciz	"[0012]\t\tSleep Status Register : [Generic Address Structure]\n"

	.comm	_errno,4,2                      ## @errno
	.no_dead_strip	_basl_fwrite_fadt
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function basl_fwrite_fadt
_basl_fwrite_fadt:                      ; @basl_fwrite_fadt
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_EFPRINTF
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh4:
	adrp	x1, l_.str.2@PAGE
Lloh5:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh6:
	adrp	x1, l_.str.3@PAGE
Lloh7:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh8:
	adrp	x1, l_.str.4@PAGE
Lloh9:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh10:
	adrp	x1, l_.str.5@PAGE
Lloh11:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh12:
	adrp	x1, l_.str.6@PAGE
Lloh13:
	add	x1, x1, l_.str.6@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh14:
	adrp	x1, l_.str.7@PAGE
Lloh15:
	add	x1, x1, l_.str.7@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh16:
	adrp	x1, l_.str.8@PAGE
Lloh17:
	add	x1, x1, l_.str.8@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh18:
	adrp	x1, l_.str.9@PAGE
Lloh19:
	add	x1, x1, l_.str.9@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh20:
	adrp	x1, l_.str.10@PAGE
Lloh21:
	add	x1, x1, l_.str.10@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh22:
	adrp	x1, l_.str.11@PAGE
Lloh23:
	add	x1, x1, l_.str.11@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh24:
	adrp	x20, l_.str.12@PAGE
Lloh25:
	add	x20, x20, l_.str.12@PAGEOFF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh26:
	adrp	x22, _basl_acpi_base@GOTPAGE
Lloh27:
	ldr	x22, [x22, _basl_acpi_base@GOTPAGEOFF]
	ldr	x8, [x22]
Lloh28:
	adrp	x24, _FACS_OFFSET@GOTPAGE
Lloh29:
	ldr	x24, [x24, _FACS_OFFSET@GOTPAGEOFF]
	ldr	x9, [x24]
	add	x8, x9, x8
	str	x8, [sp]
Lloh30:
	adrp	x1, l_.str.13@PAGE
Lloh31:
	add	x1, x1, l_.str.13@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	ldr	x8, [x22]
Lloh32:
	adrp	x25, _DSDT_OFFSET@GOTPAGE
Lloh33:
	ldr	x25, [x25, _DSDT_OFFSET@GOTPAGEOFF]
	ldr	x9, [x25]
	add	x8, x9, x8
	str	x8, [sp]
Lloh34:
	adrp	x1, l_.str.14@PAGE
Lloh35:
	add	x1, x1, l_.str.14@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh36:
	adrp	x1, l_.str.15@PAGE
Lloh37:
	add	x1, x1, l_.str.15@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh38:
	adrp	x1, l_.str.16@PAGE
Lloh39:
	add	x1, x1, l_.str.16@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh40:
	adrp	x8, _SCI_INT@GOTPAGE
Lloh41:
	ldr	x8, [x8, _SCI_INT@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	str	x8, [sp]
Lloh43:
	adrp	x1, l_.str.17@PAGE
Lloh44:
	add	x1, x1, l_.str.17@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh45:
	adrp	x8, _SMI_CMD@GOTPAGE
Lloh46:
	ldr	x8, [x8, _SMI_CMD@GOTPAGEOFF]
Lloh47:
	ldr	w8, [x8]
	str	x8, [sp]
Lloh48:
	adrp	x1, l_.str.18@PAGE
Lloh49:
	add	x1, x1, l_.str.18@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh50:
	adrp	x8, _BHYVE_ACPI_ENABLE@GOTPAGE
Lloh51:
	ldr	x8, [x8, _BHYVE_ACPI_ENABLE@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	str	x8, [sp]
Lloh53:
	adrp	x1, l_.str.19@PAGE
Lloh54:
	add	x1, x1, l_.str.19@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh55:
	adrp	x8, _BHYVE_ACPI_DISABLE@GOTPAGE
Lloh56:
	ldr	x8, [x8, _BHYVE_ACPI_DISABLE@GOTPAGEOFF]
Lloh57:
	ldr	w8, [x8]
	str	x8, [sp]
Lloh58:
	adrp	x1, l_.str.20@PAGE
Lloh59:
	add	x1, x1, l_.str.20@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh60:
	adrp	x1, l_.str.21@PAGE
Lloh61:
	add	x1, x1, l_.str.21@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh62:
	adrp	x1, l_.str.22@PAGE
Lloh63:
	add	x1, x1, l_.str.22@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh64:
	adrp	x26, _PM1A_EVT_ADDR@GOTPAGE
Lloh65:
	ldr	x26, [x26, _PM1A_EVT_ADDR@GOTPAGEOFF]
	ldr	w8, [x26]
	str	x8, [sp]
Lloh66:
	adrp	x1, l_.str.23@PAGE
Lloh67:
	add	x1, x1, l_.str.23@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh68:
	adrp	x1, l_.str.24@PAGE
Lloh69:
	add	x1, x1, l_.str.24@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh70:
	adrp	x8, _PM1A_CNT_ADDR@GOTPAGE
Lloh71:
	ldr	x8, [x8, _PM1A_CNT_ADDR@GOTPAGEOFF]
Lloh72:
	ldr	w8, [x8]
	str	x8, [sp]
Lloh73:
	adrp	x1, l_.str.25@PAGE
Lloh74:
	add	x1, x1, l_.str.25@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh75:
	adrp	x1, l_.str.26@PAGE
Lloh76:
	add	x1, x1, l_.str.26@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh77:
	adrp	x1, l_.str.27@PAGE
Lloh78:
	add	x1, x1, l_.str.27@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh79:
	adrp	x8, _IO_PMTMR@GOTPAGE
Lloh80:
	ldr	x8, [x8, _IO_PMTMR@GOTPAGEOFF]
Lloh81:
	ldr	w8, [x8]
	str	x8, [sp]
Lloh82:
	adrp	x1, l_.str.28@PAGE
Lloh83:
	add	x1, x1, l_.str.28@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh84:
	adrp	x1, l_.str.29@PAGE
Lloh85:
	add	x1, x1, l_.str.29@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh86:
	adrp	x1, l_.str.30@PAGE
Lloh87:
	add	x1, x1, l_.str.30@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh88:
	adrp	x1, l_.str.31@PAGE
Lloh89:
	add	x1, x1, l_.str.31@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh90:
	adrp	x1, l_.str.32@PAGE
Lloh91:
	add	x1, x1, l_.str.32@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh92:
	adrp	x1, l_.str.33@PAGE
Lloh93:
	add	x1, x1, l_.str.33@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh94:
	adrp	x1, l_.str.34@PAGE
Lloh95:
	add	x1, x1, l_.str.34@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh96:
	adrp	x1, l_.str.35@PAGE
Lloh97:
	add	x1, x1, l_.str.35@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh98:
	adrp	x1, l_.str.36@PAGE
Lloh99:
	add	x1, x1, l_.str.36@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh100:
	adrp	x1, l_.str.37@PAGE
Lloh101:
	add	x1, x1, l_.str.37@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh102:
	adrp	x1, l_.str.38@PAGE
Lloh103:
	add	x1, x1, l_.str.38@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh104:
	adrp	x1, l_.str.39@PAGE
Lloh105:
	add	x1, x1, l_.str.39@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh106:
	adrp	x1, l_.str.40@PAGE
Lloh107:
	add	x1, x1, l_.str.40@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh108:
	adrp	x1, l_.str.41@PAGE
Lloh109:
	add	x1, x1, l_.str.41@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh110:
	adrp	x1, l_.str.42@PAGE
Lloh111:
	add	x1, x1, l_.str.42@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh112:
	adrp	x1, l_.str.43@PAGE
Lloh113:
	add	x1, x1, l_.str.43@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh114:
	adrp	x1, l_.str.44@PAGE
Lloh115:
	add	x1, x1, l_.str.44@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh116:
	adrp	x1, l_.str.45@PAGE
Lloh117:
	add	x1, x1, l_.str.45@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh118:
	adrp	x1, l_.str.46@PAGE
Lloh119:
	add	x1, x1, l_.str.46@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh120:
	adrp	x1, l_.str.47@PAGE
Lloh121:
	add	x1, x1, l_.str.47@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh122:
	adrp	x1, l_.str.48@PAGE
Lloh123:
	add	x1, x1, l_.str.48@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh124:
	adrp	x1, l_.str.49@PAGE
Lloh125:
	add	x1, x1, l_.str.49@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh126:
	adrp	x1, l_.str.50@PAGE
Lloh127:
	add	x1, x1, l_.str.50@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh128:
	adrp	x1, l_.str.51@PAGE
Lloh129:
	add	x1, x1, l_.str.51@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh130:
	adrp	x1, l_.str.52@PAGE
Lloh131:
	add	x1, x1, l_.str.52@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh132:
	adrp	x1, l_.str.53@PAGE
Lloh133:
	add	x1, x1, l_.str.53@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh134:
	adrp	x1, l_.str.54@PAGE
Lloh135:
	add	x1, x1, l_.str.54@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh136:
	adrp	x1, l_.str.55@PAGE
Lloh137:
	add	x1, x1, l_.str.55@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh138:
	adrp	x1, l_.str.56@PAGE
Lloh139:
	add	x1, x1, l_.str.56@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh140:
	adrp	x1, l_.str.57@PAGE
Lloh141:
	add	x1, x1, l_.str.57@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh142:
	adrp	x1, l_.str.58@PAGE
Lloh143:
	add	x1, x1, l_.str.58@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh144:
	adrp	x1, l_.str.59@PAGE
Lloh145:
	add	x1, x1, l_.str.59@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh146:
	adrp	x1, l_.str.60@PAGE
Lloh147:
	add	x1, x1, l_.str.60@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh148:
	adrp	x1, l_.str.61@PAGE
Lloh149:
	add	x1, x1, l_.str.61@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh150:
	adrp	x1, l_.str.62@PAGE
Lloh151:
	add	x1, x1, l_.str.62@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh152:
	adrp	x1, l_.str.63@PAGE
Lloh153:
	add	x1, x1, l_.str.63@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh154:
	adrp	x1, l_.str.64@PAGE
Lloh155:
	add	x1, x1, l_.str.64@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh156:
	adrp	x1, l_.str.65@PAGE
Lloh157:
	add	x1, x1, l_.str.65@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh158:
	adrp	x1, l_.str.66@PAGE
Lloh159:
	add	x1, x1, l_.str.66@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh160:
	adrp	x1, l_.str.67@PAGE
Lloh161:
	add	x1, x1, l_.str.67@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh162:
	adrp	x1, l_.str.68@PAGE
Lloh163:
	add	x1, x1, l_.str.68@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh164:
	adrp	x1, l_.str.69@PAGE
Lloh165:
	add	x1, x1, l_.str.69@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh166:
	adrp	x1, l_.str.70@PAGE
Lloh167:
	add	x1, x1, l_.str.70@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh168:
	adrp	x1, l_.str.71@PAGE
Lloh169:
	add	x1, x1, l_.str.71@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh170:
	adrp	x1, l_.str.72@PAGE
Lloh171:
	add	x1, x1, l_.str.72@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh172:
	adrp	x1, l_.str.73@PAGE
Lloh173:
	add	x1, x1, l_.str.73@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh174:
	adrp	x1, l_.str.74@PAGE
Lloh175:
	add	x1, x1, l_.str.74@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh176:
	adrp	x1, l_.str.75@PAGE
Lloh177:
	add	x1, x1, l_.str.75@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh178:
	adrp	x1, l_.str.76@PAGE
Lloh179:
	add	x1, x1, l_.str.76@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh180:
	adrp	x1, l_.str.77@PAGE
Lloh181:
	add	x1, x1, l_.str.77@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh182:
	adrp	x1, l_.str.78@PAGE
Lloh183:
	add	x1, x1, l_.str.78@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh184:
	adrp	x1, l_.str.79@PAGE
Lloh185:
	add	x1, x1, l_.str.79@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh186:
	adrp	x21, l_.str.80@PAGE
Lloh187:
	add	x21, x21, l_.str.80@PAGEOFF
	mov	x0, x19
	mov	x1, x21
	bl	_EFPRINTF
Lloh188:
	adrp	x1, l_.str.81@PAGE
Lloh189:
	add	x1, x1, l_.str.81@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh190:
	adrp	x23, l_.str.82@PAGE
Lloh191:
	add	x23, x23, l_.str.82@PAGEOFF
	mov	x0, x19
	mov	x1, x23
	bl	_EFPRINTF
Lloh192:
	adrp	x1, l_.str.83@PAGE
Lloh193:
	add	x1, x1, l_.str.83@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh194:
	adrp	x1, l_.str.84@PAGE
Lloh195:
	add	x1, x1, l_.str.84@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh196:
	adrp	x1, l_.str.85@PAGE
Lloh197:
	add	x1, x1, l_.str.85@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh198:
	adrp	x1, l_.str.86@PAGE
Lloh199:
	add	x1, x1, l_.str.86@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh200:
	adrp	x1, l_.str.87@PAGE
Lloh201:
	add	x1, x1, l_.str.87@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh202:
	adrp	x1, l_.str.88@PAGE
Lloh203:
	add	x1, x1, l_.str.88@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh204:
	adrp	x1, l_.str.89@PAGE
Lloh205:
	add	x1, x1, l_.str.89@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	ldr	x8, [x22]
	ldr	x9, [x24]
	add	x8, x9, x8
	str	x8, [sp]
Lloh206:
	adrp	x1, l_.str.90@PAGE
Lloh207:
	add	x1, x1, l_.str.90@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	ldr	x8, [x22]
	ldr	x9, [x25]
	add	x8, x9, x8
	str	x8, [sp]
Lloh208:
	adrp	x1, l_.str.91@PAGE
Lloh209:
	add	x1, x1, l_.str.91@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh210:
	adrp	x1, l_.str.92@PAGE
Lloh211:
	add	x1, x1, l_.str.92@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x21
	bl	_EFPRINTF
Lloh212:
	adrp	x28, l_.str.93@PAGE
Lloh213:
	add	x28, x28, l_.str.93@PAGEOFF
	mov	x0, x19
	mov	x1, x28
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x23
	bl	_EFPRINTF
Lloh214:
	adrp	x24, l_.str.94@PAGE
Lloh215:
	add	x24, x24, l_.str.94@PAGEOFF
	mov	x0, x19
	mov	x1, x24
	bl	_EFPRINTF
	ldr	w8, [x26]
	str	x8, [sp]
Lloh216:
	adrp	x22, l_.str.95@PAGE
Lloh217:
	add	x22, x22, l_.str.95@PAGEOFF
	mov	x0, x19
	mov	x1, x22
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh218:
	adrp	x1, l_.str.96@PAGE
Lloh219:
	add	x1, x1, l_.str.96@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x21
	bl	_EFPRINTF
Lloh220:
	adrp	x26, l_.str.97@PAGE
Lloh221:
	add	x26, x26, l_.str.97@PAGEOFF
	mov	x0, x19
	mov	x1, x26
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x23
	bl	_EFPRINTF
Lloh222:
	adrp	x27, l_.str.98@PAGE
Lloh223:
	add	x27, x27, l_.str.98@PAGEOFF
	mov	x0, x19
	mov	x1, x27
	bl	_EFPRINTF
Lloh224:
	adrp	x25, l_.str.99@PAGE
Lloh225:
	add	x25, x25, l_.str.99@PAGEOFF
	mov	x0, x19
	mov	x1, x25
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh226:
	adrp	x1, l_.str.100@PAGE
Lloh227:
	add	x1, x1, l_.str.100@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x21
	bl	_EFPRINTF
Lloh228:
	adrp	x1, l_.str.101@PAGE
Lloh229:
	add	x1, x1, l_.str.101@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x23
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x24
	bl	_EFPRINTF
Lloh230:
	adrp	x8, _PM1A_CNT_ADDR@GOTPAGE
Lloh231:
	ldr	x8, [x8, _PM1A_CNT_ADDR@GOTPAGEOFF]
Lloh232:
	ldr	w8, [x8]
	str	x8, [sp]
	mov	x0, x19
	mov	x1, x22
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh233:
	adrp	x1, l_.str.102@PAGE
Lloh234:
	add	x1, x1, l_.str.102@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x21
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x26
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x23
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x27
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x25
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh235:
	adrp	x1, l_.str.103@PAGE
Lloh236:
	add	x1, x1, l_.str.103@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x21
	bl	_EFPRINTF
	mov	x0, x19
Lloh237:
	adrp	x24, l_.str.81@PAGE
Lloh238:
	add	x24, x24, l_.str.81@PAGEOFF
	mov	x1, x24
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x23
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x27
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x25
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh239:
	adrp	x1, l_.str.104@PAGE
Lloh240:
	add	x1, x1, l_.str.104@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x21
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x28
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x23
	bl	_EFPRINTF
Lloh241:
	adrp	x1, l_.str.105@PAGE
Lloh242:
	add	x1, x1, l_.str.105@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
Lloh243:
	adrp	x8, _IO_PMTMR@GOTPAGE
Lloh244:
	ldr	x8, [x8, _IO_PMTMR@GOTPAGEOFF]
Lloh245:
	ldr	w8, [x8]
	str	x8, [sp]
	mov	x0, x19
	mov	x1, x22
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh246:
	adrp	x1, l_.str.106@PAGE
Lloh247:
	add	x1, x1, l_.str.106@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x21
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x26
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x23
	bl	_EFPRINTF
	mov	x0, x19
Lloh248:
	adrp	x22, l_.str.83@PAGE
Lloh249:
	add	x22, x22, l_.str.83@PAGEOFF
	mov	x1, x22
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x25
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh250:
	adrp	x1, l_.str.107@PAGE
Lloh251:
	add	x1, x1, l_.str.107@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x21
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x26
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x23
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x27
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x25
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh252:
	adrp	x1, l_.str.108@PAGE
Lloh253:
	add	x1, x1, l_.str.108@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x21
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x24
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x23
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x22
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x25
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x20
	bl	_EFPRINTF
Lloh254:
	adrp	x1, l_.str.109@PAGE
Lloh255:
	add	x1, x1, l_.str.109@PAGEOFF
	mov	x0, x19
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x21
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x24
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x23
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x22
	bl	_EFPRINTF
	mov	x0, x19
	mov	x1, x25
	bl	_EFPRINTF
	mov	x0, x19
	bl	_EFFLUSH
	mov	w0, #0
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpAdd	Lloh254, Lloh255
	.loh AdrpAdd	Lloh252, Lloh253
	.loh AdrpAdd	Lloh250, Lloh251
	.loh AdrpAdd	Lloh248, Lloh249
	.loh AdrpAdd	Lloh246, Lloh247
	.loh AdrpLdrGotLdr	Lloh243, Lloh244, Lloh245
	.loh AdrpAdd	Lloh241, Lloh242
	.loh AdrpAdd	Lloh239, Lloh240
	.loh AdrpAdd	Lloh237, Lloh238
	.loh AdrpAdd	Lloh235, Lloh236
	.loh AdrpAdd	Lloh233, Lloh234
	.loh AdrpLdrGotLdr	Lloh230, Lloh231, Lloh232
	.loh AdrpAdd	Lloh228, Lloh229
	.loh AdrpAdd	Lloh226, Lloh227
	.loh AdrpAdd	Lloh224, Lloh225
	.loh AdrpAdd	Lloh222, Lloh223
	.loh AdrpAdd	Lloh220, Lloh221
	.loh AdrpAdd	Lloh218, Lloh219
	.loh AdrpAdd	Lloh216, Lloh217
	.loh AdrpAdd	Lloh214, Lloh215
	.loh AdrpAdd	Lloh212, Lloh213
	.loh AdrpAdd	Lloh210, Lloh211
	.loh AdrpAdd	Lloh208, Lloh209
	.loh AdrpAdd	Lloh206, Lloh207
	.loh AdrpAdd	Lloh204, Lloh205
	.loh AdrpAdd	Lloh202, Lloh203
	.loh AdrpAdd	Lloh200, Lloh201
	.loh AdrpAdd	Lloh198, Lloh199
	.loh AdrpAdd	Lloh196, Lloh197
	.loh AdrpAdd	Lloh194, Lloh195
	.loh AdrpAdd	Lloh192, Lloh193
	.loh AdrpAdd	Lloh190, Lloh191
	.loh AdrpAdd	Lloh188, Lloh189
	.loh AdrpAdd	Lloh186, Lloh187
	.loh AdrpAdd	Lloh184, Lloh185
	.loh AdrpAdd	Lloh182, Lloh183
	.loh AdrpAdd	Lloh180, Lloh181
	.loh AdrpAdd	Lloh178, Lloh179
	.loh AdrpAdd	Lloh176, Lloh177
	.loh AdrpAdd	Lloh174, Lloh175
	.loh AdrpAdd	Lloh172, Lloh173
	.loh AdrpAdd	Lloh170, Lloh171
	.loh AdrpAdd	Lloh168, Lloh169
	.loh AdrpAdd	Lloh166, Lloh167
	.loh AdrpAdd	Lloh164, Lloh165
	.loh AdrpAdd	Lloh162, Lloh163
	.loh AdrpAdd	Lloh160, Lloh161
	.loh AdrpAdd	Lloh158, Lloh159
	.loh AdrpAdd	Lloh156, Lloh157
	.loh AdrpAdd	Lloh154, Lloh155
	.loh AdrpAdd	Lloh152, Lloh153
	.loh AdrpAdd	Lloh150, Lloh151
	.loh AdrpAdd	Lloh148, Lloh149
	.loh AdrpAdd	Lloh146, Lloh147
	.loh AdrpAdd	Lloh144, Lloh145
	.loh AdrpAdd	Lloh142, Lloh143
	.loh AdrpAdd	Lloh140, Lloh141
	.loh AdrpAdd	Lloh138, Lloh139
	.loh AdrpAdd	Lloh136, Lloh137
	.loh AdrpAdd	Lloh134, Lloh135
	.loh AdrpAdd	Lloh132, Lloh133
	.loh AdrpAdd	Lloh130, Lloh131
	.loh AdrpAdd	Lloh128, Lloh129
	.loh AdrpAdd	Lloh126, Lloh127
	.loh AdrpAdd	Lloh124, Lloh125
	.loh AdrpAdd	Lloh122, Lloh123
	.loh AdrpAdd	Lloh120, Lloh121
	.loh AdrpAdd	Lloh118, Lloh119
	.loh AdrpAdd	Lloh116, Lloh117
	.loh AdrpAdd	Lloh114, Lloh115
	.loh AdrpAdd	Lloh112, Lloh113
	.loh AdrpAdd	Lloh110, Lloh111
	.loh AdrpAdd	Lloh108, Lloh109
	.loh AdrpAdd	Lloh106, Lloh107
	.loh AdrpAdd	Lloh104, Lloh105
	.loh AdrpAdd	Lloh102, Lloh103
	.loh AdrpAdd	Lloh100, Lloh101
	.loh AdrpAdd	Lloh98, Lloh99
	.loh AdrpAdd	Lloh96, Lloh97
	.loh AdrpAdd	Lloh94, Lloh95
	.loh AdrpAdd	Lloh92, Lloh93
	.loh AdrpAdd	Lloh90, Lloh91
	.loh AdrpAdd	Lloh88, Lloh89
	.loh AdrpAdd	Lloh86, Lloh87
	.loh AdrpAdd	Lloh84, Lloh85
	.loh AdrpAdd	Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpAdd	Lloh77, Lloh78
	.loh AdrpAdd	Lloh75, Lloh76
	.loh AdrpAdd	Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpAdd	Lloh68, Lloh69
	.loh AdrpAdd	Lloh66, Lloh67
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpAdd	Lloh60, Lloh61
	.loh AdrpAdd	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpAdd	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpAdd	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"/*\n"

l_.str.1:                               ; @.str.1
	.asciz	" * bhyve FADT template\n"

l_.str.2:                               ; @.str.2
	.asciz	" */\n"

l_.str.3:                               ; @.str.3
	.asciz	"[0004]\t\tSignature : \"FACP\"\n"

l_.str.4:                               ; @.str.4
	.asciz	"[0004]\t\tTable Length : 0000010C\n"

l_.str.5:                               ; @.str.5
	.asciz	"[0001]\t\tRevision : 05\n"

l_.str.6:                               ; @.str.6
	.asciz	"[0001]\t\tChecksum : 00\n"

l_.str.7:                               ; @.str.7
	.asciz	"[0006]\t\tOem ID : \"BHYVE \"\n"

l_.str.8:                               ; @.str.8
	.asciz	"[0008]\t\tOem Table ID : \"BVFACP  \"\n"

l_.str.9:                               ; @.str.9
	.asciz	"[0004]\t\tOem Revision : 00000001\n"

l_.str.10:                              ; @.str.10
	.asciz	"[0004]\t\tAsl Compiler ID : \"xxxx\"\n"

l_.str.11:                              ; @.str.11
	.asciz	"[0004]\t\tAsl Compiler Revision : 00000000\n"

l_.str.12:                              ; @.str.12
	.asciz	"\n"

l_.str.13:                              ; @.str.13
	.asciz	"[0004]\t\tFACS Address : %08X\n"

	.comm	_basl_acpi_base,8,3             ; @basl_acpi_base
	.comm	_FACS_OFFSET,8,3                ; @FACS_OFFSET
l_.str.14:                              ; @.str.14
	.asciz	"[0004]\t\tDSDT Address : %08X\n"

	.comm	_DSDT_OFFSET,8,3                ; @DSDT_OFFSET
l_.str.15:                              ; @.str.15
	.asciz	"[0001]\t\tModel : 01\n"

l_.str.16:                              ; @.str.16
	.asciz	"[0001]\t\tPM Profile : 00 [Unspecified]\n"

l_.str.17:                              ; @.str.17
	.asciz	"[0002]\t\tSCI Interrupt : %04X\n"

	.comm	_SCI_INT,4,2                    ; @SCI_INT
l_.str.18:                              ; @.str.18
	.asciz	"[0004]\t\tSMI Command Port : %08X\n"

	.comm	_SMI_CMD,4,2                    ; @SMI_CMD
l_.str.19:                              ; @.str.19
	.asciz	"[0001]\t\tACPI Enable Value : %02X\n"

	.comm	_BHYVE_ACPI_ENABLE,4,2          ; @BHYVE_ACPI_ENABLE
l_.str.20:                              ; @.str.20
	.asciz	"[0001]\t\tACPI Disable Value : %02X\n"

	.comm	_BHYVE_ACPI_DISABLE,4,2         ; @BHYVE_ACPI_DISABLE
l_.str.21:                              ; @.str.21
	.asciz	"[0001]\t\tS4BIOS Command : 00\n"

l_.str.22:                              ; @.str.22
	.asciz	"[0001]\t\tP-State Control : 00\n"

l_.str.23:                              ; @.str.23
	.asciz	"[0004]\t\tPM1A Event Block Address : %08X\n"

	.comm	_PM1A_EVT_ADDR,4,2              ; @PM1A_EVT_ADDR
l_.str.24:                              ; @.str.24
	.asciz	"[0004]\t\tPM1B Event Block Address : 00000000\n"

l_.str.25:                              ; @.str.25
	.asciz	"[0004]\t\tPM1A Control Block Address : %08X\n"

	.comm	_PM1A_CNT_ADDR,4,2              ; @PM1A_CNT_ADDR
l_.str.26:                              ; @.str.26
	.asciz	"[0004]\t\tPM1B Control Block Address : 00000000\n"

l_.str.27:                              ; @.str.27
	.asciz	"[0004]\t\tPM2 Control Block Address : 00000000\n"

l_.str.28:                              ; @.str.28
	.asciz	"[0004]\t\tPM Timer Block Address : %08X\n"

	.comm	_IO_PMTMR,4,2                   ; @IO_PMTMR
l_.str.29:                              ; @.str.29
	.asciz	"[0004]\t\tGPE0 Block Address : 00000000\n"

l_.str.30:                              ; @.str.30
	.asciz	"[0004]\t\tGPE1 Block Address : 00000000\n"

l_.str.31:                              ; @.str.31
	.asciz	"[0001]\t\tPM1 Event Block Length : 04\n"

l_.str.32:                              ; @.str.32
	.asciz	"[0001]\t\tPM1 Control Block Length : 02\n"

l_.str.33:                              ; @.str.33
	.asciz	"[0001]\t\tPM2 Control Block Length : 00\n"

l_.str.34:                              ; @.str.34
	.asciz	"[0001]\t\tPM Timer Block Length : 04\n"

l_.str.35:                              ; @.str.35
	.asciz	"[0001]\t\tGPE0 Block Length : 00\n"

l_.str.36:                              ; @.str.36
	.asciz	"[0001]\t\tGPE1 Block Length : 00\n"

l_.str.37:                              ; @.str.37
	.asciz	"[0001]\t\tGPE1 Base Offset : 00\n"

l_.str.38:                              ; @.str.38
	.asciz	"[0001]\t\t_CST Support : 00\n"

l_.str.39:                              ; @.str.39
	.asciz	"[0002]\t\tC2 Latency : 0000\n"

l_.str.40:                              ; @.str.40
	.asciz	"[0002]\t\tC3 Latency : 0000\n"

l_.str.41:                              ; @.str.41
	.asciz	"[0002]\t\tCPU Cache Size : 0000\n"

l_.str.42:                              ; @.str.42
	.asciz	"[0002]\t\tCache Flush Stride : 0000\n"

l_.str.43:                              ; @.str.43
	.asciz	"[0001]\t\tDuty Cycle Offset : 00\n"

l_.str.44:                              ; @.str.44
	.asciz	"[0001]\t\tDuty Cycle Width : 00\n"

l_.str.45:                              ; @.str.45
	.asciz	"[0001]\t\tRTC Day Alarm Index : 00\n"

l_.str.46:                              ; @.str.46
	.asciz	"[0001]\t\tRTC Month Alarm Index : 00\n"

l_.str.47:                              ; @.str.47
	.asciz	"[0001]\t\tRTC Century Index : 32\n"

l_.str.48:                              ; @.str.48
	.asciz	"[0002]\t\tBoot Flags (decoded below) : 0000\n"

l_.str.49:                              ; @.str.49
	.asciz	"\t\t\tLegacy Devices Supported (V2) : 0\n"

l_.str.50:                              ; @.str.50
	.asciz	"\t\t\t8042 Present on ports 60/64 (V2) : 0\n"

l_.str.51:                              ; @.str.51
	.asciz	"\t\t\tVGA Not Present (V4) : 1\n"

l_.str.52:                              ; @.str.52
	.asciz	"\t\t\tMSI Not Supported (V4) : 0\n"

l_.str.53:                              ; @.str.53
	.asciz	"\t\t\tPCIe ASPM Not Supported (V4) : 1\n"

l_.str.54:                              ; @.str.54
	.asciz	"\t\t\tCMOS RTC Not Present (V5) : 0\n"

l_.str.55:                              ; @.str.55
	.asciz	"[0001]\t\tReserved : 00\n"

l_.str.56:                              ; @.str.56
	.asciz	"[0004]\t\tFlags (decoded below) : 00000000\n"

l_.str.57:                              ; @.str.57
	.asciz	"\t\t\tWBINVD instruction is operational (V1) : 1\n"

l_.str.58:                              ; @.str.58
	.asciz	"\t\t\tWBINVD flushes all caches (V1) : 0\n"

l_.str.59:                              ; @.str.59
	.asciz	"\t\t\tAll CPUs support C1 (V1) : 1\n"

l_.str.60:                              ; @.str.60
	.asciz	"\t\t\tC2 works on MP system (V1) : 0\n"

l_.str.61:                              ; @.str.61
	.asciz	"\t\t\tControl Method Power Button (V1) : 0\n"

l_.str.62:                              ; @.str.62
	.asciz	"\t\t\tControl Method Sleep Button (V1) : 1\n"

l_.str.63:                              ; @.str.63
	.asciz	"\t\t\tRTC wake not in fixed reg space (V1) : 0\n"

l_.str.64:                              ; @.str.64
	.asciz	"\t\t\tRTC can wake system from S4 (V1) : 0\n"

l_.str.65:                              ; @.str.65
	.asciz	"\t\t\t32-bit PM Timer (V1) : 1\n"

l_.str.66:                              ; @.str.66
	.asciz	"\t\t\tDocking Supported (V1) : 0\n"

l_.str.67:                              ; @.str.67
	.asciz	"\t\t\tReset Register Supported (V2) : 1\n"

l_.str.68:                              ; @.str.68
	.asciz	"\t\t\tSealed Case (V3) : 0\n"

l_.str.69:                              ; @.str.69
	.asciz	"\t\t\tHeadless - No Video (V3) : 1\n"

l_.str.70:                              ; @.str.70
	.asciz	"\t\t\tUse native instr after SLP_TYPx (V3) : 0\n"

l_.str.71:                              ; @.str.71
	.asciz	"\t\t\tPCIEXP_WAK Bits Supported (V4) : 0\n"

l_.str.72:                              ; @.str.72
	.asciz	"\t\t\tUse Platform Timer (V4) : 0\n"

l_.str.73:                              ; @.str.73
	.asciz	"\t\t\tRTC_STS valid on S4 wake (V4) : 0\n"

l_.str.74:                              ; @.str.74
	.asciz	"\t\t\tRemote Power-on capable (V4) : 0\n"

l_.str.75:                              ; @.str.75
	.asciz	"\t\t\tUse APIC Cluster Model (V4) : 0\n"

l_.str.76:                              ; @.str.76
	.asciz	"\t\t\tUse APIC Physical Destination Mode (V4) : 1\n"

l_.str.77:                              ; @.str.77
	.asciz	"\t\t\tHardware Reduced (V5) : 0\n"

l_.str.78:                              ; @.str.78
	.asciz	"\t\t\tLow Power S0 Idle (V5) : 0\n"

l_.str.79:                              ; @.str.79
	.asciz	"[0012]\t\tReset Register : [Generic Address Structure]\n"

l_.str.80:                              ; @.str.80
	.asciz	"[0001]\t\tSpace ID : 01 [SystemIO]\n"

l_.str.81:                              ; @.str.81
	.asciz	"[0001]\t\tBit Width : 08\n"

l_.str.82:                              ; @.str.82
	.asciz	"[0001]\t\tBit Offset : 00\n"

l_.str.83:                              ; @.str.83
	.asciz	"[0001]\t\tEncoded Access Width : 01 [Byte Access:8]\n"

l_.str.84:                              ; @.str.84
	.asciz	"[0008]\t\tAddress : 0000000000000CF9\n"

l_.str.85:                              ; @.str.85
	.asciz	"[0001]\t\tValue to cause reset : 06\n"

l_.str.86:                              ; @.str.86
	.asciz	"[0002]\t\tARM Flags (decoded below): 0000\n"

l_.str.87:                              ; @.str.87
	.asciz	"\t\t\tPSCI Compliant : 0\n"

l_.str.88:                              ; @.str.88
	.asciz	"\t\t\tMust use HVC for PSCI : 0\n"

l_.str.89:                              ; @.str.89
	.asciz	"[0001]\t\tFADT Minor Revision : 01\n"

l_.str.90:                              ; @.str.90
	.asciz	"[0008]\t\tFACS Address : 00000000%08X\n"

l_.str.91:                              ; @.str.91
	.asciz	"[0008]\t\tDSDT Address : 00000000%08X\n"

l_.str.92:                              ; @.str.92
	.asciz	"[0012]\t\tPM1A Event Block : [Generic Address Structure]\n"

l_.str.93:                              ; @.str.93
	.asciz	"[0001]\t\tBit Width : 20\n"

l_.str.94:                              ; @.str.94
	.asciz	"[0001]\t\tEncoded Access Width : 02 [Word Access:16]\n"

l_.str.95:                              ; @.str.95
	.asciz	"[0008]\t\tAddress : 00000000%08X\n"

l_.str.96:                              ; @.str.96
	.asciz	"[0012]\t\tPM1B Event Block : [Generic Address Structure]\n"

l_.str.97:                              ; @.str.97
	.asciz	"[0001]\t\tBit Width : 00\n"

l_.str.98:                              ; @.str.98
	.asciz	"[0001]\t\tEncoded Access Width : 00 [Undefined/Legacy]\n"

l_.str.99:                              ; @.str.99
	.asciz	"[0008]\t\tAddress : 0000000000000000\n"

l_.str.100:                             ; @.str.100
	.asciz	"[0012]\t\tPM1A Control Block : [Generic Address Structure]\n"

l_.str.101:                             ; @.str.101
	.asciz	"[0001]\t\tBit Width : 10\n"

l_.str.102:                             ; @.str.102
	.asciz	"[0012]\t\tPM1B Control Block : [Generic Address Structure]\n"

l_.str.103:                             ; @.str.103
	.asciz	"[0012]\t\tPM2 Control Block : [Generic Address Structure]\n"

l_.str.104:                             ; @.str.104
	.asciz	"[0012]\t\tPM Timer Block : [Generic Address Structure]\n"

l_.str.105:                             ; @.str.105
	.asciz	"[0001]\t\tEncoded Access Width : 03 [DWord Access:32]\n"

l_.str.106:                             ; @.str.106
	.asciz	"[0012]\t\tGPE0 Block : [Generic Address Structure]\n"

l_.str.107:                             ; @.str.107
	.asciz	"[0012]\t\tGPE1 Block : [Generic Address Structure]\n"

l_.str.108:                             ; @.str.108
	.asciz	"[0012]\t\tSleep Control Register : [Generic Address Structure]\n"

l_.str.109:                             ; @.str.109
	.asciz	"[0012]\t\tSleep Status Register : [Generic Address Structure]\n"

	.comm	_errno,4,2                      ; @errno
	.no_dead_strip	_basl_fwrite_fadt
.subsections_via_symbols
