	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amd_thresholding_supported
_amd_thresholding_supported:            ## @amd_thresholding_supported
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	_cpu_vendor_id@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	movq	_CPU_VENDOR_AMD@GOTPCREL(%rip), %rdx
	xorl	%eax, %eax
	cmpq	(%rdx), %rcx
	jne	LBB0_5
## %bb.1:
	movq	_cpu_id@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_CPUID_TO_FAMILY
	cmpl	$16, %eax
	jl	LBB0_3
## %bb.2:
	movl	(%rbx), %edi
	callq	_CPUID_TO_FAMILY
	movl	%eax, %ecx
	movl	$1, %eax
	cmpl	$23, %ecx
	jl	LBB0_5
LBB0_3:
	movl	(%rbx), %edi
	callq	_CPUID_TO_FAMILY
	movl	%eax, %ecx
	movl	$0, %eax
	cmpl	$23, %ecx
	jl	LBB0_5
## %bb.4:
	movq	_amd_rascap@GOTPCREL(%rip), %rcx
	movq	_AMDRAS_SCALABLE_MCA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%eax, %eax
	testl	%edx, (%rcx)
	setne	%al
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_cpu_vendor_id,8,3              ## @cpu_vendor_id
	.comm	_CPU_VENDOR_AMD,8,3             ## @CPU_VENDOR_AMD
	.comm	_cpu_id,4,2                     ## @cpu_id
	.comm	_amd_rascap,4,2                 ## @amd_rascap
	.comm	_AMDRAS_SCALABLE_MCA,4,2        ## @AMDRAS_SCALABLE_MCA
	.no_dead_strip	_amd_thresholding_supported
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amd_thresholding_supported
_amd_thresholding_supported:            ; @amd_thresholding_supported
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x8, _cpu_vendor_id@GOTPAGE
Lloh1:
	ldr	x8, [x8, _cpu_vendor_id@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
Lloh3:
	adrp	x9, _CPU_VENDOR_AMD@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CPU_VENDOR_AMD@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_6
; %bb.1:
Lloh6:
	adrp	x19, _cpu_id@GOTPAGE
Lloh7:
	ldr	x19, [x19, _cpu_id@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_CPUID_TO_FAMILY
	cmp	w0, #16
	b.lt	LBB0_4
; %bb.2:
	ldr	w0, [x19]
	bl	_CPUID_TO_FAMILY
	cmp	w0, #23
	b.ge	LBB0_4
; %bb.3:
	mov	w0, #1
	b	LBB0_7
LBB0_4:
	ldr	w0, [x19]
	bl	_CPUID_TO_FAMILY
	cmp	w0, #23
	b.lt	LBB0_6
; %bb.5:
Lloh8:
	adrp	x8, _amd_rascap@GOTPAGE
Lloh9:
	ldr	x8, [x8, _amd_rascap@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
Lloh11:
	adrp	x9, _AMDRAS_SCALABLE_MCA@GOTPAGE
Lloh12:
	ldr	x9, [x9, _AMDRAS_SCALABLE_MCA@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w0, ne
	b	LBB0_7
LBB0_6:
	mov	w0, #0
LBB0_7:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_cpu_vendor_id,8,3              ; @cpu_vendor_id
	.comm	_CPU_VENDOR_AMD,8,3             ; @CPU_VENDOR_AMD
	.comm	_cpu_id,4,2                     ; @cpu_id
	.comm	_amd_rascap,4,2                 ; @amd_rascap
	.comm	_AMDRAS_SCALABLE_MCA,4,2        ; @AMDRAS_SCALABLE_MCA
	.no_dead_strip	_amd_thresholding_supported
.subsections_via_symbols
