	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function init_TSC_tc
_init_TSC_tc:                           ## @init_TSC_tc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_cpu_feature@GOTPCREL(%rip), %r15
	movq	_CPUID_TSC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r15)
	je	LBB0_51
## %bb.1:
	movq	_tsc_disabled@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	jne	LBB0_51
## %bb.2:
	movq	_UINT_MAX@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	xorl	%eax, %eax
	callq	_power_pm_get_type
	movq	_POWER_PM_TYPE_APM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
## %bb.3:
	movq	_tsc_timecounter@GOTPCREL(%rip), %rax
	movl	$-1000, (%rax)                  ## imm = 0xFC18
	movq	_bootverbose@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_12
## %bb.4:
	leaq	L_str.4(%rip), %rdi
	callq	_puts
	jmp	LBB0_12
LBB0_5:
	movq	_cpu_vendor_id@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_CPU_VENDOR_INTEL@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_9
## %bb.6:
	movq	_amd_pminfo@GOTPCREL(%rip), %rax
	movq	_AMDPM_TSC_INVARIANT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rax)
	jne	LBB0_9
## %bb.7:
	movq	_TC_FLAGS_C2STOP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_tsc_timecounter@GOTPCREL(%rip), %rcx
	orl	%eax, 36(%rcx)
	movq	_bootverbose@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_9
## %bb.8:
	leaq	L_str(%rip), %rdi
	callq	_puts
LBB0_9:
	movq	_tsc_is_invariant@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_11
## %bb.10:
	movq	_tsc_timecounter@GOTPCREL(%rip), %rax
	movl	$1000, (%rax)                   ## imm = 0x3E8
LBB0_11:
	movq	_tsc_shift@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %ebx
LBB0_12:
	movq	_tsc_freq@GOTPCREL(%rip), %r12
	movl	(%r12), %eax
	xorl	%r14d, %r14d
	cmpl	%ebx, %eax
	jle	LBB0_44
## %bb.13:
	movl	%eax, %ecx
	sarl	%ecx
	movl	$1, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.14:
	movl	%eax, %ecx
	sarl	$2, %ecx
	movl	$2, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.15:
	movl	%eax, %ecx
	sarl	$3, %ecx
	movl	$3, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.16:
	movl	%eax, %ecx
	sarl	$4, %ecx
	movl	$4, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.17:
	movl	%eax, %ecx
	sarl	$5, %ecx
	movl	$5, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.18:
	movl	%eax, %ecx
	sarl	$6, %ecx
	movl	$6, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.19:
	movl	%eax, %ecx
	sarl	$7, %ecx
	movl	$7, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.20:
	movl	%eax, %ecx
	sarl	$8, %ecx
	movl	$8, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.21:
	movl	%eax, %ecx
	sarl	$9, %ecx
	movl	$9, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.22:
	movl	%eax, %ecx
	sarl	$10, %ecx
	movl	$10, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.23:
	movl	%eax, %ecx
	sarl	$11, %ecx
	movl	$11, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.24:
	movl	%eax, %ecx
	sarl	$12, %ecx
	movl	$12, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.25:
	movl	%eax, %ecx
	sarl	$13, %ecx
	movl	$13, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.26:
	movl	%eax, %ecx
	sarl	$14, %ecx
	movl	$14, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.27:
	movl	%eax, %ecx
	sarl	$15, %ecx
	movl	$15, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.28:
	movl	%eax, %ecx
	sarl	$16, %ecx
	movl	$16, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.29:
	movl	%eax, %ecx
	sarl	$17, %ecx
	movl	$17, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.30:
	movl	%eax, %ecx
	sarl	$18, %ecx
	movl	$18, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.31:
	movl	%eax, %ecx
	sarl	$19, %ecx
	movl	$19, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.32:
	movl	%eax, %ecx
	sarl	$20, %ecx
	movl	$20, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.33:
	movl	%eax, %ecx
	sarl	$21, %ecx
	movl	$21, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.34:
	movl	%eax, %ecx
	sarl	$22, %ecx
	movl	$22, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.35:
	movl	%eax, %ecx
	sarl	$23, %ecx
	movl	$23, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.36:
	movl	%eax, %ecx
	sarl	$24, %ecx
	movl	$24, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.37:
	movl	%eax, %ecx
	sarl	$25, %ecx
	movl	$25, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.38:
	movl	%eax, %ecx
	sarl	$26, %ecx
	movl	$26, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.39:
	movl	%eax, %ecx
	sarl	$27, %ecx
	movl	$27, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.40:
	movl	%eax, %ecx
	sarl	$28, %ecx
	movl	$28, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.41:
	movl	%eax, %ecx
	sarl	$29, %ecx
	movl	$29, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.42:
	movl	%eax, %ecx
	sarl	$30, %ecx
	movl	$30, %r14d
	cmpl	%ebx, %ecx
	jle	LBB0_44
## %bb.43:
	movl	%eax, %ecx
	sarl	$31, %ecx
	xorl	%r14d, %r14d
	cmpl	%ebx, %ecx
	setg	%r14b
	addl	$31, %r14d
LBB0_44:
	movq	_CPUID_SSE2@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_tsc_get_timecount@GOTPCREL(%rip), %rdx
	movq	_tsc_get_timecount_low@GOTPCREL(%rip), %rcx
	testl	%esi, (%r15)
	je	LBB0_47
## %bb.45:
	movq	_mp_ncpus@GOTPCREL(%rip), %rsi
	cmpl	$2, (%rsi)
	jl	LBB0_47
## %bb.46:
	movq	_cpu_vendor_id@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_CPU_VENDOR_AMD@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	movq	_tsc_get_timecount_low_lfence@GOTPCREL(%rip), %rcx
	cmoveq	_tsc_get_timecount_low_mfence@GOTPCREL(%rip), %rcx
	movq	_tsc_get_timecount_lfence@GOTPCREL(%rip), %rdx
	cmoveq	_tsc_get_timecount_mfence@GOTPCREL(%rip), %rdx
LBB0_47:
	cmpl	%ebx, %eax
	cmovleq	%rdx, %rcx
	movl	(%rcx), %ecx
	movq	_tsc_timecounter@GOTPCREL(%rip), %rbx
	movl	%ecx, 32(%rbx)
	jle	LBB0_50
## %bb.48:
	leaq	L_.str.2(%rip), %rcx
	movq	%rcx, 8(%rbx)
	movq	_bootverbose@GOTPCREL(%rip), %rcx
	cmpq	$0, (%rcx)
	je	LBB0_50
## %bb.49:
	leaq	L_.str.3(%rip), %rdi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	_printf
	movl	(%r12), %eax
LBB0_50:
	testl	%eax, %eax
	je	LBB0_51
## %bb.52:
	movl	%r14d, %ecx
	sarl	%cl, %eax
	movl	%eax, 16(%rbx)
	movl	%r14d, %eax
	movq	%rax, 24(%rbx)
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_tc_init                        ## TAILCALL
LBB0_51:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_cpu_feature,4,2                ## @cpu_feature
	.comm	_CPUID_TSC,4,2                  ## @CPUID_TSC
	.comm	_tsc_disabled,8,3               ## @tsc_disabled
	.comm	_UINT_MAX,4,2                   ## @UINT_MAX
	.comm	_POWER_PM_TYPE_APM,8,3          ## @POWER_PM_TYPE_APM
	.comm	_tsc_timecounter,40,3           ## @tsc_timecounter
	.comm	_bootverbose,8,3                ## @bootverbose
	.comm	_cpu_vendor_id,8,3              ## @cpu_vendor_id
	.comm	_CPU_VENDOR_INTEL,8,3           ## @CPU_VENDOR_INTEL
	.comm	_amd_pminfo,4,2                 ## @amd_pminfo
	.comm	_AMDPM_TSC_INVARIANT,4,2        ## @AMDPM_TSC_INVARIANT
	.comm	_TC_FLAGS_C2STOP,4,2            ## @TC_FLAGS_C2STOP
	.comm	_tsc_is_invariant,8,3           ## @tsc_is_invariant
	.comm	_tsc_shift,4,2                  ## @tsc_shift
	.comm	_tsc_freq,4,2                   ## @tsc_freq
	.comm	_CPUID_SSE2,4,2                 ## @CPUID_SSE2
	.comm	_mp_ncpus,4,2                   ## @mp_ncpus
	.comm	_CPU_VENDOR_AMD,8,3             ## @CPU_VENDOR_AMD
	.comm	_tsc_get_timecount_low_mfence,4,2 ## @tsc_get_timecount_low_mfence
	.comm	_tsc_get_timecount_mfence,4,2   ## @tsc_get_timecount_mfence
	.comm	_tsc_get_timecount_low_lfence,4,2 ## @tsc_get_timecount_low_lfence
	.comm	_tsc_get_timecount_lfence,4,2   ## @tsc_get_timecount_lfence
	.comm	_tsc_get_timecount_low,4,2      ## @tsc_get_timecount_low
	.comm	_tsc_get_timecount,4,2          ## @tsc_get_timecount
	.section	__TEXT,__cstring,cstring_literals
L_.str.2:                               ## @.str.2
	.asciz	"TSC-low"

L_.str.3:                               ## @.str.3
	.asciz	"TSC timecounter discards lower %d bit(s)\n"

	.comm	_smp_tsc_adjust,4,2             ## @smp_tsc_adjust
L_str:                                  ## @str
	.asciz	"TSC timecounter disables C2 and C3."

L_str.4:                                ## @str.4
	.asciz	"TSC timecounter disabled: APM enabled."

	.no_dead_strip	_init_TSC_tc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function init_TSC_tc
_init_TSC_tc:                           ; @init_TSC_tc
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
Lloh0:
	adrp	x21, _cpu_feature@GOTPAGE
Lloh1:
	ldr	x21, [x21, _cpu_feature@GOTPAGEOFF]
	ldr	w8, [x21]
Lloh2:
	adrp	x9, _CPUID_TSC@GOTPAGE
Lloh3:
	ldr	x9, [x9, _CPUID_TSC@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh5:
	adrp	x9, _tsc_disabled@GOTPAGE
Lloh6:
	ldr	x9, [x9, _tsc_disabled@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
	cmp	w8, #0
	ccmp	x9, #0, #0, ne
	b.ne	LBB0_82
; %bb.1:
Lloh8:
	adrp	x8, _UINT_MAX@GOTPAGE
Lloh9:
	ldr	x8, [x8, _UINT_MAX@GOTPAGEOFF]
Lloh10:
	ldr	w20, [x8]
	bl	_power_pm_get_type
Lloh11:
	adrp	x8, _POWER_PM_TYPE_APM@GOTPAGE
Lloh12:
	ldr	x8, [x8, _POWER_PM_TYPE_APM@GOTPAGEOFF]
Lloh13:
	ldr	x8, [x8]
Lloh14:
	adrp	x19, _tsc_timecounter@GOTPAGE
Lloh15:
	ldr	x19, [x19, _tsc_timecounter@GOTPAGEOFF]
	cmp	x0, x8
	b.ne	LBB0_4
; %bb.2:
	mov	w8, #-1000
	str	w8, [x19]
Lloh16:
	adrp	x8, _bootverbose@GOTPAGE
Lloh17:
	ldr	x8, [x8, _bootverbose@GOTPAGEOFF]
Lloh18:
	ldr	x8, [x8]
	cbz	x8, LBB0_11
; %bb.3:
Lloh19:
	adrp	x0, l_str.4@PAGE
Lloh20:
	add	x0, x0, l_str.4@PAGEOFF
	bl	_puts
	b	LBB0_11
LBB0_4:
Lloh21:
	adrp	x8, _cpu_vendor_id@GOTPAGE
Lloh22:
	ldr	x8, [x8, _cpu_vendor_id@GOTPAGEOFF]
Lloh23:
	ldr	x8, [x8]
Lloh24:
	adrp	x9, _CPU_VENDOR_INTEL@GOTPAGE
Lloh25:
	ldr	x9, [x9, _CPU_VENDOR_INTEL@GOTPAGEOFF]
Lloh26:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_8
; %bb.5:
Lloh27:
	adrp	x8, _amd_pminfo@GOTPAGE
Lloh28:
	ldr	x8, [x8, _amd_pminfo@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
Lloh30:
	adrp	x9, _AMDPM_TSC_INVARIANT@GOTPAGE
Lloh31:
	ldr	x9, [x9, _AMDPM_TSC_INVARIANT@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_8
; %bb.6:
Lloh33:
	adrp	x8, _TC_FLAGS_C2STOP@GOTPAGE
Lloh34:
	ldr	x8, [x8, _TC_FLAGS_C2STOP@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	ldr	w9, [x19, #36]
	orr	w8, w9, w8
	str	w8, [x19, #36]
Lloh36:
	adrp	x8, _bootverbose@GOTPAGE
Lloh37:
	ldr	x8, [x8, _bootverbose@GOTPAGEOFF]
Lloh38:
	ldr	x8, [x8]
	cbz	x8, LBB0_8
; %bb.7:
Lloh39:
	adrp	x0, l_str@PAGE
Lloh40:
	add	x0, x0, l_str@PAGEOFF
	bl	_puts
LBB0_8:
Lloh41:
	adrp	x8, _tsc_is_invariant@GOTPAGE
Lloh42:
	ldr	x8, [x8, _tsc_is_invariant@GOTPAGEOFF]
Lloh43:
	ldr	x8, [x8]
	cbz	x8, LBB0_10
; %bb.9:
	mov	w8, #1000
	str	w8, [x19]
LBB0_10:
Lloh44:
	adrp	x8, _tsc_shift@GOTPAGE
Lloh45:
	ldr	x8, [x8, _tsc_shift@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
	asr	w20, w20, w8
LBB0_11:
Lloh47:
	adrp	x22, _tsc_freq@GOTPAGE
Lloh48:
	ldr	x22, [x22, _tsc_freq@GOTPAGEOFF]
	ldr	w8, [x22]
	cmp	w8, w20
	b.le	LBB0_43
; %bb.12:
	cmp	w20, w8, asr #1
	b.ge	LBB0_44
; %bb.13:
	cmp	w20, w8, asr #2
	b.ge	LBB0_45
; %bb.14:
	cmp	w20, w8, asr #3
	b.ge	LBB0_46
; %bb.15:
	cmp	w20, w8, asr #4
	b.ge	LBB0_47
; %bb.16:
	cmp	w20, w8, asr #5
	b.ge	LBB0_48
; %bb.17:
	cmp	w20, w8, asr #6
	b.ge	LBB0_49
; %bb.18:
	cmp	w20, w8, asr #7
	b.ge	LBB0_50
; %bb.19:
	cmp	w20, w8, asr #8
	b.ge	LBB0_51
; %bb.20:
	cmp	w20, w8, asr #9
	b.ge	LBB0_52
; %bb.21:
	cmp	w20, w8, asr #10
	b.ge	LBB0_53
; %bb.22:
	cmp	w20, w8, asr #11
	b.ge	LBB0_54
; %bb.23:
	cmp	w20, w8, asr #12
	b.ge	LBB0_55
; %bb.24:
	cmp	w20, w8, asr #13
	b.ge	LBB0_56
; %bb.25:
	cmp	w20, w8, asr #14
	b.ge	LBB0_57
; %bb.26:
	cmp	w20, w8, asr #15
	b.ge	LBB0_58
; %bb.27:
	cmp	w20, w8, asr #16
	b.ge	LBB0_59
; %bb.28:
	cmp	w20, w8, asr #17
	b.ge	LBB0_60
; %bb.29:
	cmp	w20, w8, asr #18
	b.ge	LBB0_61
; %bb.30:
	cmp	w20, w8, asr #19
	b.ge	LBB0_62
; %bb.31:
	cmp	w20, w8, asr #20
	b.ge	LBB0_63
; %bb.32:
	cmp	w20, w8, asr #21
	b.ge	LBB0_64
; %bb.33:
	cmp	w20, w8, asr #22
	b.ge	LBB0_65
; %bb.34:
	cmp	w20, w8, asr #23
	b.ge	LBB0_66
; %bb.35:
	cmp	w20, w8, asr #24
	b.ge	LBB0_67
; %bb.36:
	cmp	w20, w8, asr #25
	b.ge	LBB0_68
; %bb.37:
	cmp	w20, w8, asr #26
	b.ge	LBB0_69
; %bb.38:
	cmp	w20, w8, asr #27
	b.ge	LBB0_70
; %bb.39:
	cmp	w20, w8, asr #28
	b.ge	LBB0_71
; %bb.40:
	cmp	w20, w8, asr #29
	b.ge	LBB0_72
; %bb.41:
	cmp	w20, w8, asr #30
	b.ge	LBB0_73
; %bb.42:
	cmp	w20, w8, asr #31
	mov	w9, #31
	cinc	w23, w9, lt
	b	LBB0_74
LBB0_43:
	mov	w23, #0
	b	LBB0_74
LBB0_44:
	mov	w23, #1
	b	LBB0_74
LBB0_45:
	mov	w23, #2
	b	LBB0_74
LBB0_46:
	mov	w23, #3
	b	LBB0_74
LBB0_47:
	mov	w23, #4
	b	LBB0_74
LBB0_48:
	mov	w23, #5
	b	LBB0_74
LBB0_49:
	mov	w23, #6
	b	LBB0_74
LBB0_50:
	mov	w23, #7
	b	LBB0_74
LBB0_51:
	mov	w23, #8
	b	LBB0_74
LBB0_52:
	mov	w23, #9
	b	LBB0_74
LBB0_53:
	mov	w23, #10
	b	LBB0_74
LBB0_54:
	mov	w23, #11
	b	LBB0_74
LBB0_55:
	mov	w23, #12
	b	LBB0_74
LBB0_56:
	mov	w23, #13
	b	LBB0_74
LBB0_57:
	mov	w23, #14
	b	LBB0_74
LBB0_58:
	mov	w23, #15
	b	LBB0_74
LBB0_59:
	mov	w23, #16
	b	LBB0_74
LBB0_60:
	mov	w23, #17
	b	LBB0_74
LBB0_61:
	mov	w23, #18
	b	LBB0_74
LBB0_62:
	mov	w23, #19
	b	LBB0_74
LBB0_63:
	mov	w23, #20
	b	LBB0_74
LBB0_64:
	mov	w23, #21
	b	LBB0_74
LBB0_65:
	mov	w23, #22
	b	LBB0_74
LBB0_66:
	mov	w23, #23
	b	LBB0_74
LBB0_67:
	mov	w23, #24
	b	LBB0_74
LBB0_68:
	mov	w23, #25
	b	LBB0_74
LBB0_69:
	mov	w23, #26
	b	LBB0_74
LBB0_70:
	mov	w23, #27
	b	LBB0_74
LBB0_71:
	mov	w23, #28
	b	LBB0_74
LBB0_72:
	mov	w23, #29
	b	LBB0_74
LBB0_73:
	mov	w23, #30
LBB0_74:
	ldr	w11, [x21]
Lloh49:
	adrp	x9, _CPUID_SSE2@GOTPAGE
Lloh50:
	ldr	x9, [x9, _CPUID_SSE2@GOTPAGEOFF]
Lloh51:
	ldr	w12, [x9]
Lloh52:
	adrp	x10, _tsc_get_timecount@GOTPAGE
Lloh53:
	ldr	x10, [x10, _tsc_get_timecount@GOTPAGEOFF]
Lloh54:
	adrp	x9, _tsc_get_timecount_low@GOTPAGE
Lloh55:
	ldr	x9, [x9, _tsc_get_timecount_low@GOTPAGEOFF]
	tst	w12, w11
	b.eq	LBB0_77
; %bb.75:
Lloh56:
	adrp	x11, _mp_ncpus@GOTPAGE
Lloh57:
	ldr	x11, [x11, _mp_ncpus@GOTPAGEOFF]
Lloh58:
	ldr	w11, [x11]
	cmp	w11, #2
	b.lt	LBB0_77
; %bb.76:
Lloh59:
	adrp	x9, _cpu_vendor_id@GOTPAGE
Lloh60:
	ldr	x9, [x9, _cpu_vendor_id@GOTPAGEOFF]
Lloh61:
	ldr	x9, [x9]
Lloh62:
	adrp	x10, _CPU_VENDOR_AMD@GOTPAGE
Lloh63:
	ldr	x10, [x10, _CPU_VENDOR_AMD@GOTPAGEOFF]
Lloh64:
	ldr	x10, [x10]
Lloh65:
	adrp	x11, _tsc_get_timecount_low_lfence@GOTPAGE
Lloh66:
	ldr	x11, [x11, _tsc_get_timecount_low_lfence@GOTPAGEOFF]
Lloh67:
	adrp	x12, _tsc_get_timecount_low_mfence@GOTPAGE
Lloh68:
	ldr	x12, [x12, _tsc_get_timecount_low_mfence@GOTPAGEOFF]
	cmp	x9, x10
	csel	x9, x12, x11, eq
Lloh69:
	adrp	x10, _tsc_get_timecount_lfence@GOTPAGE
Lloh70:
	ldr	x10, [x10, _tsc_get_timecount_lfence@GOTPAGEOFF]
Lloh71:
	adrp	x11, _tsc_get_timecount_mfence@GOTPAGE
Lloh72:
	ldr	x11, [x11, _tsc_get_timecount_mfence@GOTPAGEOFF]
	csel	x10, x11, x10, eq
LBB0_77:
	cmp	w8, w20
	csel	x9, x9, x10, gt
	ldr	w9, [x9]
	str	w9, [x19, #32]
	b.le	LBB0_80
; %bb.78:
Lloh73:
	adrp	x9, l_.str.2@PAGE
Lloh74:
	add	x9, x9, l_.str.2@PAGEOFF
	str	x9, [x19, #8]
Lloh75:
	adrp	x9, _bootverbose@GOTPAGE
Lloh76:
	ldr	x9, [x9, _bootverbose@GOTPAGEOFF]
Lloh77:
	ldr	x9, [x9]
	cbz	x9, LBB0_80
; %bb.79:
	str	x23, [sp]
Lloh78:
	adrp	x0, l_.str.3@PAGE
Lloh79:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_printf
	ldr	w8, [x22]
LBB0_80:
	cbz	w8, LBB0_82
; %bb.81:
	asr	w8, w8, w23
	mov	w9, w23
	str	w8, [x19, #16]
	str	x9, [x19, #24]
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_tc_init
LBB0_82:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpAdd	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh71, Lloh72
	.loh AdrpLdrGot	Lloh69, Lloh70
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpAdd	Lloh73, Lloh74
	.loh AdrpAdd	Lloh78, Lloh79
	.cfi_endproc
                                        ; -- End function
	.comm	_cpu_feature,4,2                ; @cpu_feature
	.comm	_CPUID_TSC,4,2                  ; @CPUID_TSC
	.comm	_tsc_disabled,8,3               ; @tsc_disabled
	.comm	_UINT_MAX,4,2                   ; @UINT_MAX
	.comm	_POWER_PM_TYPE_APM,8,3          ; @POWER_PM_TYPE_APM
	.comm	_tsc_timecounter,40,3           ; @tsc_timecounter
	.comm	_bootverbose,8,3                ; @bootverbose
	.comm	_cpu_vendor_id,8,3              ; @cpu_vendor_id
	.comm	_CPU_VENDOR_INTEL,8,3           ; @CPU_VENDOR_INTEL
	.comm	_amd_pminfo,4,2                 ; @amd_pminfo
	.comm	_AMDPM_TSC_INVARIANT,4,2        ; @AMDPM_TSC_INVARIANT
	.comm	_TC_FLAGS_C2STOP,4,2            ; @TC_FLAGS_C2STOP
	.comm	_tsc_is_invariant,8,3           ; @tsc_is_invariant
	.comm	_tsc_shift,4,2                  ; @tsc_shift
	.comm	_tsc_freq,4,2                   ; @tsc_freq
	.comm	_CPUID_SSE2,4,2                 ; @CPUID_SSE2
	.comm	_mp_ncpus,4,2                   ; @mp_ncpus
	.comm	_CPU_VENDOR_AMD,8,3             ; @CPU_VENDOR_AMD
	.comm	_tsc_get_timecount_low_mfence,4,2 ; @tsc_get_timecount_low_mfence
	.comm	_tsc_get_timecount_mfence,4,2   ; @tsc_get_timecount_mfence
	.comm	_tsc_get_timecount_low_lfence,4,2 ; @tsc_get_timecount_low_lfence
	.comm	_tsc_get_timecount_lfence,4,2   ; @tsc_get_timecount_lfence
	.comm	_tsc_get_timecount_low,4,2      ; @tsc_get_timecount_low
	.comm	_tsc_get_timecount,4,2          ; @tsc_get_timecount
	.section	__TEXT,__cstring,cstring_literals
l_.str.2:                               ; @.str.2
	.asciz	"TSC-low"

l_.str.3:                               ; @.str.3
	.asciz	"TSC timecounter discards lower %d bit(s)\n"

	.comm	_smp_tsc_adjust,4,2             ; @smp_tsc_adjust
l_str:                                  ; @str
	.asciz	"TSC timecounter disables C2 and C3."

l_str.4:                                ; @str.4
	.asciz	"TSC timecounter disabled: APM enabled."

	.no_dead_strip	_init_TSC_tc
.subsections_via_symbols
