	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function topo_probe_intel_0xb
_topo_probe_intel_0xb:                  ## @topo_probe_intel_0xb
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	leaq	-64(%rbp), %rdx
	movl	$11, %edi
	xorl	%esi, %esi
	callq	_cpuid_count
	cmpl	$0, -60(%rbp)
	je	LBB0_13
## %bb.1:
	leaq	-64(%rbp), %rdx
	movl	$11, %edi
	xorl	%esi, %esi
	callq	_cpuid_count
	movzbl	-55(%rbp), %esi
	testl	%esi, %esi
	je	LBB0_9
## %bb.2:
	movl	$1, %ebx
	movl	-64(%rbp), %eax
	movq	_CPUID_TYPE_SMT@GOTPCREL(%rip), %r12
	movq	_core_id_shift@GOTPCREL(%rip), %r13
	leaq	-64(%rbp), %r14
	movq	_CPUID_TYPE_CORE@GOTPCREL(%rip), %r15
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_3 Depth=1
	movl	%eax, (%r13)
LBB0_8:                                 ##   in Loop: Header=BB0_3 Depth=1
	movl	$11, %edi
	movl	%ebx, %esi
	movq	%r14, %rdx
	callq	_cpuid_count
	movl	-64(%rbp), %eax
	movzbl	-55(%rbp), %esi
	incl	%ebx
	testl	%esi, %esi
	je	LBB0_9
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	andl	$31, %eax
	cmpl	(%r12), %esi
	je	LBB0_4
## %bb.5:                               ##   in Loop: Header=BB0_3 Depth=1
	cmpl	(%r15), %esi
	jne	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	_pkg_id_shift@GOTPCREL(%rip), %rcx
	movl	%eax, (%rcx)
	jmp	LBB0_8
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_3 Depth=1
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_printf
	jmp	LBB0_8
LBB0_9:
	movq	_pkg_id_shift@GOTPCREL(%rip), %r14
	movl	(%r14), %eax
	movq	_core_id_shift@GOTPCREL(%rip), %rbx
	cmpl	(%rbx), %eax
	jge	LBB0_11
## %bb.10:
	leaq	L_str(%rip), %rdi
	callq	_puts
	movl	(%r14), %eax
	movl	%eax, (%rbx)
	jmp	LBB0_11
LBB0_13:
	xorl	%eax, %eax
	callq	_topo_probe_intel_0x4
LBB0_11:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_14
## %bb.12:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_14:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.comm	_CPUID_TYPE_SMT,4,2             ## @CPUID_TYPE_SMT
	.comm	_core_id_shift,4,2              ## @core_id_shift
	.comm	_CPUID_TYPE_CORE,4,2            ## @CPUID_TYPE_CORE
	.comm	_pkg_id_shift,4,2               ## @pkg_id_shift
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"unknown CPU level type %d\n"

L_str:                                  ## @str
	.asciz	"WARNING: core covers more APIC IDs than a package"

	.no_dead_strip	_topo_probe_intel_0xb
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function topo_probe_intel_0xb
_topo_probe_intel_0xb:                  ; @topo_probe_intel_0xb
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #24]
	add	x2, sp, #8
	mov	w0, #11
	mov	w1, #0
	bl	_cpuid_count
	ldr	w8, [sp, #12]
	cbz	w8, LBB0_11
; %bb.1:
	add	x2, sp, #8
	mov	w0, #11
	mov	w1, #0
	bl	_cpuid_count
	ldrb	w8, [sp, #17]
Lloh3:
	adrp	x21, _pkg_id_shift@GOTPAGE
Lloh4:
	ldr	x21, [x21, _pkg_id_shift@GOTPAGEOFF]
Lloh5:
	adrp	x22, _core_id_shift@GOTPAGE
Lloh6:
	ldr	x22, [x22, _core_id_shift@GOTPAGEOFF]
	cbz	w8, LBB0_9
; %bb.2:
	mov	w19, #1
	ldr	w9, [sp, #8]
Lloh7:
	adrp	x23, _CPUID_TYPE_SMT@GOTPAGE
Lloh8:
	ldr	x23, [x23, _CPUID_TYPE_SMT@GOTPAGEOFF]
Lloh9:
	adrp	x20, l_.str@PAGE
Lloh10:
	add	x20, x20, l_.str@PAGEOFF
Lloh11:
	adrp	x24, _CPUID_TYPE_CORE@GOTPAGE
Lloh12:
	ldr	x24, [x24, _CPUID_TYPE_CORE@GOTPAGEOFF]
	b	LBB0_5
LBB0_3:                                 ;   in Loop: Header=BB0_5 Depth=1
	str	w9, [x22]
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
	add	x2, sp, #8
	mov	w0, #11
	mov	x1, x19
	bl	_cpuid_count
	ldr	w9, [sp, #8]
	ldrb	w8, [sp, #17]
	add	w19, w19, #1
	cbz	w8, LBB0_9
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	and	w9, w9, #0x1f
	ldr	w10, [x23]
	cmp	w8, w10
	b.eq	LBB0_3
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	w10, [x24]
	cmp	w8, w10
	b.ne	LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=1
	str	w9, [x21]
	b	LBB0_4
LBB0_8:                                 ;   in Loop: Header=BB0_5 Depth=1
	str	x8, [sp]
	mov	x0, x20
	bl	_printf
	b	LBB0_4
LBB0_9:
	ldr	w8, [x21]
	ldr	w9, [x22]
	cmp	w8, w9
	b.ge	LBB0_12
; %bb.10:
Lloh13:
	adrp	x0, l_str@PAGE
Lloh14:
	add	x0, x0, l_str@PAGEOFF
	bl	_puts
	ldr	w8, [x21]
	str	w8, [x22]
	b	LBB0_12
LBB0_11:
	bl	_topo_probe_intel_0x4
LBB0_12:
	ldr	x8, [sp, #24]
Lloh15:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh16:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_14
; %bb.13:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_14:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_CPUID_TYPE_SMT,4,2             ; @CPUID_TYPE_SMT
	.comm	_core_id_shift,4,2              ; @core_id_shift
	.comm	_CPUID_TYPE_CORE,4,2            ; @CPUID_TYPE_CORE
	.comm	_pkg_id_shift,4,2               ; @pkg_id_shift
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"unknown CPU level type %d\n"

l_str:                                  ; @str
	.asciz	"WARNING: core covers more APIC IDs than a package"

	.no_dead_strip	_topo_probe_intel_0xb
.subsections_via_symbols
