	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function xlp_parse_mmu_options
LCPI0_0:
	.long	1                               ## 0x1
	.long	4294967295                      ## 0xffffffff
	.long	4294967295                      ## 0xffffffff
	.long	4294967295                      ## 0xffffffff
LCPI0_1:
	.long	1                               ## 0x1
	.long	2                               ## 0x2
	.long	3                               ## 0x3
	.long	4                               ## 0x4
LCPI0_2:
	.long	4                               ## 0x4
	.long	4                               ## 0x4
	.long	4                               ## 0x4
	.long	4                               ## 0x4
LCPI0_3:
	.long	1065353216                      ## 0x3f800000
	.long	1065353216                      ## 0x3f800000
	.long	1065353216                      ## 0x3f800000
	.long	1065353216                      ## 0x3f800000
LCPI0_4:
	.long	15                              ## 0xf
	.long	15                              ## 0xf
	.long	15                              ## 0xf
	.long	15                              ## 0xf
LCPI0_5:
	.long	8                               ## 0x8
	.long	8                               ## 0x8
	.long	8                               ## 0x8
	.long	8                               ## 0x8
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_xlp_parse_mmu_options:                 ## @xlp_parse_mmu_options
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_xlp_hw_thread_mask@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	cmpl	$2, %esi
	jb	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_printf
LBB0_2:
	movq	_xlp_ncores@GOTPCREL(%rip), %r15
	movl	$1, (%r15)
	movq	_xlp_threads_per_core@GOTPCREL(%rip), %r13
	movl	$1, (%r13)
	movq	_xlp_mmuval@GOTPCREL(%rip), %rax
	movl	$0, (%rax)
	xorl	%edi, %edi
	callq	_nlm_get_sys_regbase
	movq	_SYS_CPU_RESET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	callq	_nlm_read_sys_reg
	movzbl	%al, %ebx
	xorl	%eax, %eax
	callq	_nlm_processor_id
	movq	_CHIP_PROCESSOR_ID_XLP_416@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movl	$14, %eax
	cmovnel	%ebx, %eax
	movq	_XLP_MAX_CORES@GOTPCREL(%rip), %r9
	movl	(%r9), %r11d
	movl	$1, %r12d
	cmpl	$2, %r11d
	jl	LBB0_19
## %bb.3:
	leal	-1(%r11), %r8d
	movl	$1, %edx
	movl	$1, %r12d
	cmpl	$8, %r8d
	jb	LBB0_7
## %bb.4:
	movl	%r8d, %ecx
	andl	$-8, %ecx
	leal	1(%rcx), %edx
	movd	%eax, %xmm0
	pshufd	$0, %xmm0, %xmm13               ## xmm13 = xmm0[0,0,0,0]
	pcmpeqd	%xmm10, %xmm10
	movdqa	LCPI0_0(%rip), %xmm0            ## xmm0 = [1,4294967295,4294967295,4294967295]
	movdqa	LCPI0_1(%rip), %xmm1            ## xmm1 = [1,2,3,4]
	movdqa	LCPI0_2(%rip), %xmm8            ## xmm8 = [4,4,4,4]
	movdqa	LCPI0_3(%rip), %xmm5            ## xmm5 = [1065353216,1065353216,1065353216,1065353216]
	pxor	%xmm11, %xmm11
	movdqa	LCPI0_4(%rip), %xmm12           ## xmm12 = [15,15,15,15]
	movdqa	LCPI0_5(%rip), %xmm9            ## xmm9 = [8,8,8,8]
	movl	%ecx, %esi
	pcmpeqd	%xmm7, %xmm7
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movdqa	%xmm1, %xmm3
	paddd	%xmm8, %xmm3
	movdqa	%xmm1, %xmm2
	pslld	$23, %xmm2
	paddd	%xmm5, %xmm2
	cvttps2dq	%xmm2, %xmm6
	movdqa	%xmm3, %xmm2
	pslld	$23, %xmm2
	paddd	%xmm5, %xmm2
	cvttps2dq	%xmm2, %xmm2
	pand	%xmm13, %xmm6
	pand	%xmm13, %xmm2
	movdqa	%xmm1, %xmm4
	pslld	$25, %xmm4
	paddd	%xmm5, %xmm4
	cvttps2dq	%xmm4, %xmm4
	pmulld	%xmm12, %xmm4
	pslld	$25, %xmm3
	paddd	%xmm5, %xmm3
	cvttps2dq	%xmm3, %xmm3
	pmulld	%xmm12, %xmm3
	pxor	%xmm10, %xmm4
	pxor	%xmm10, %xmm3
	pcmpgtd	%xmm11, %xmm6
	por	%xmm4, %xmm6
	pand	%xmm6, %xmm0
	pcmpgtd	%xmm11, %xmm2
	por	%xmm3, %xmm2
	pand	%xmm2, %xmm7
	paddd	%xmm9, %xmm1
	addl	$-8, %esi
	jne	LBB0_5
## %bb.6:
	pand	%xmm0, %xmm7
	pshufd	$238, %xmm7, %xmm0              ## xmm0 = xmm7[2,3,2,3]
	pand	%xmm7, %xmm0
	pshufd	$85, %xmm0, %xmm1               ## xmm1 = xmm0[1,1,1,1]
	pand	%xmm0, %xmm1
	movd	%xmm1, %r12d
	cmpl	%ecx, %r8d
	je	LBB0_9
LBB0_7:
	leal	(,%rdx,4), %ecx
	movl	$-1, %esi
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movl	$15, %edi
	shll	%cl, %edi
	btl	%edx, %eax
	notl	%edi
	cmovbl	%esi, %edi
	andl	%edi, %r12d
	incl	%edx
	addl	$4, %ecx
	cmpl	%edx, %r11d
	jne	LBB0_8
LBB0_9:
	cmpl	$2, %r11d
	jl	LBB0_19
## %bb.10:
	movl	(%r15), %r10d
	movl	$4, %eax
	je	LBB0_16
## %bb.11:
	movl	%r8d, %esi
	andl	$-2, %esi
	movl	$8, %eax
	jmp	LBB0_12
	.p2align	4, 0x90
LBB0_14:                                ##   in Loop: Header=BB0_12 Depth=1
	addl	$8, %eax
	addl	$-2, %esi
	je	LBB0_15
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	leal	-4(%rax), %ecx
	movl	%r12d, %edi
                                        ## kill: def $cl killed $cl killed $ecx
	sarl	%cl, %edi
	andl	$15, %edi
	leal	1(%r10), %ebx
	testl	%edi, %edi
	cmovel	%r10d, %ebx
	movl	%r12d, %edx
	movl	%eax, %ecx
	sarl	%cl, %edx
	andl	$15, %edx
	leal	1(%rbx), %r10d
	testl	%edx, %edx
	cmovel	%ebx, %r10d
	orl	%edi, %edx
	je	LBB0_14
## %bb.13:                              ##   in Loop: Header=BB0_12 Depth=1
	movl	%r10d, (%r15)
	jmp	LBB0_14
LBB0_15:
	addl	$-4, %eax
LBB0_16:
	testb	$1, %r8b
	je	LBB0_19
## %bb.17:
	movl	%r12d, %edx
	movl	%eax, %ecx
	sarl	%cl, %edx
	testb	$15, %dl
	je	LBB0_19
## %bb.18:
	incl	%r10d
	movl	%r10d, (%r15)
LBB0_19:
	movl	%r12d, (%r14)
	movq	_MAXCPU@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	jle	LBB0_23
## %bb.20:
	movq	_xlp_hwtid_to_cpuid@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_xlp_cpuid_to_hwtid@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	xorl	%esi, %esi
	.p2align	4, 0x90
LBB0_21:                                ## =>This Inner Loop Header: Depth=1
	movl	$-1, (%rcx,%rsi,4)
	movl	$-1, (%rdx,%rsi,4)
	incq	%rsi
	movslq	(%rax), %rdi
	cmpq	%rdi, %rsi
	jl	LBB0_21
## %bb.22:
	movl	(%r9), %r11d
LBB0_23:
	testl	%r11d, %r11d
	jle	LBB0_31
## %bb.24:
	movq	_xlp_cpuid_to_hwtid@GOTPCREL(%rip), %rax
	movq	(%rax), %r8
	movq	_xlp_hwtid_to_cpuid@GOTPCREL(%rip), %rax
	movq	(%rax), %r10
	movl	(%r13), %esi
	xorl	%eax, %eax
	xorl	%r15d, %r15d
	xorl	%r14d, %r14d
	jmp	LBB0_25
	.p2align	4, 0x90
LBB0_30:                                ##   in Loop: Header=BB0_25 Depth=1
	incq	%r15
	movslq	%r11d, %rcx
	addq	$4, %rax
	cmpq	%rcx, %r15
	jge	LBB0_31
LBB0_25:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_28 Depth 2
	leal	(,%r15,4), %ecx
	movl	%r12d, %edx
                                        ## kill: def $cl killed $cl killed $ecx
	sarl	%cl, %edx
	testb	$15, %dl
	je	LBB0_30
## %bb.26:                              ##   in Loop: Header=BB0_25 Depth=1
	testl	%esi, %esi
	jle	LBB0_30
## %bb.27:                              ##   in Loop: Header=BB0_25 Depth=1
	movl	%eax, %ecx
	leaq	(%r10,%rcx,4), %rcx
	movslq	%r14d, %rdx
	leaq	(%r8,%rdx,4), %rdi
	movl	%edx, %edx
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_28:                                ##   Parent Loop BB0_25 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	leal	(%rax,%rbx), %esi
	movl	%esi, (%rdi,%rbx,4)
	leal	(%rdx,%rbx), %esi
	movl	%esi, (%rcx,%rbx,4)
	incq	%rbx
	movslq	(%r13), %rsi
	cmpq	%rsi, %rbx
	jl	LBB0_28
## %bb.29:                              ##   in Loop: Header=BB0_25 Depth=1
	addl	%ebx, %r14d
	movl	(%r9), %r11d
	jmp	LBB0_30
LBB0_31:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_xlp_hw_thread_mask,4,2         ## @xlp_hw_thread_mask
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"WARNING: Starting uniprocessor kernel on cpumask [0x%lx]!\nWARNING: Other CPUs will be unused.\n"

	.comm	_xlp_ncores,4,2                 ## @xlp_ncores
	.comm	_xlp_threads_per_core,4,2       ## @xlp_threads_per_core
	.comm	_xlp_mmuval,4,2                 ## @xlp_mmuval
	.comm	_SYS_CPU_RESET,4,2              ## @SYS_CPU_RESET
	.comm	_CHIP_PROCESSOR_ID_XLP_416,8,3  ## @CHIP_PROCESSOR_ID_XLP_416
	.comm	_XLP_MAX_CORES,4,2              ## @XLP_MAX_CORES
	.comm	_MAXCPU,4,2                     ## @MAXCPU
	.comm	_xlp_hwtid_to_cpuid,8,3         ## @xlp_hwtid_to_cpuid
	.comm	_xlp_cpuid_to_hwtid,8,3         ## @xlp_cpuid_to_hwtid
	.no_dead_strip	_xlp_parse_mmu_options
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ; -- Begin function xlp_parse_mmu_options
lCPI0_0:
	.long	1                               ; 0x1
	.long	4294967295                      ; 0xffffffff
	.long	4294967295                      ; 0xffffffff
	.long	4294967295                      ; 0xffffffff
lCPI0_1:
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.long	3                               ; 0x3
	.long	4                               ; 0x4
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_xlp_parse_mmu_options:                 ; @xlp_parse_mmu_options
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
Lloh0:
	adrp	x21, _xlp_hw_thread_mask@GOTPAGE
Lloh1:
	ldr	x21, [x21, _xlp_hw_thread_mask@GOTPAGEOFF]
	ldr	w1, [x21]
	cmp	w1, #2
	b.lo	LBB0_2
; %bb.1:
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	bl	_printf
LBB0_2:
Lloh4:
	adrp	x22, _xlp_ncores@GOTPAGE
Lloh5:
	ldr	x22, [x22, _xlp_ncores@GOTPAGEOFF]
	mov	w20, #1
	str	w20, [x22]
Lloh6:
	adrp	x19, _xlp_threads_per_core@GOTPAGE
Lloh7:
	ldr	x19, [x19, _xlp_threads_per_core@GOTPAGEOFF]
	str	w20, [x19]
Lloh8:
	adrp	x8, _xlp_mmuval@GOTPAGE
Lloh9:
	ldr	x8, [x8, _xlp_mmuval@GOTPAGEOFF]
Lloh10:
	str	wzr, [x8]
	mov	w0, #0
	bl	_nlm_get_sys_regbase
Lloh11:
	adrp	x8, _SYS_CPU_RESET@GOTPAGE
Lloh12:
	ldr	x8, [x8, _SYS_CPU_RESET@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	bl	_nlm_read_sys_reg
	and	w23, w0, #0xff
	bl	_nlm_processor_id
Lloh14:
	adrp	x8, _CHIP_PROCESSOR_ID_XLP_416@GOTPAGE
Lloh15:
	ldr	x8, [x8, _CHIP_PROCESSOR_ID_XLP_416@GOTPAGEOFF]
Lloh16:
	ldr	x8, [x8]
	cmp	x0, x8
	mov	w8, #14
	csel	w10, w8, w23, eq
Lloh17:
	adrp	x8, _XLP_MAX_CORES@GOTPAGE
Lloh18:
	ldr	x8, [x8, _XLP_MAX_CORES@GOTPAGEOFF]
	ldr	w9, [x8]
	subs	w12, w9, #1
	b.le	LBB0_15
; %bb.3:
	cmp	w12, #16
	b.hs	LBB0_5
; %bb.4:
	mov	w11, #1
	mov	w20, #1
	b	LBB0_8
LBB0_5:
	and	w13, w12, #0xfffffff0
	orr	w11, w13, #0x1
	dup.4s	v0, w10
Lloh19:
	adrp	x14, lCPI0_0@PAGE
Lloh20:
	ldr	q1, [x14, lCPI0_0@PAGEOFF]
	movi.2d	v2, #0xffffffffffffffff
	movi.4s	v3, #4
	movi.4s	v4, #8
Lloh21:
	adrp	x14, lCPI0_1@PAGE
Lloh22:
	ldr	q5, [x14, lCPI0_1@PAGEOFF]
	movi.4s	v6, #12
	movi.4s	v7, #1
	movi.4s	v16, #15
	movi.4s	v17, #16
	mov	x14, x13
	movi.2d	v18, #0xffffffffffffffff
	movi.2d	v19, #0xffffffffffffffff
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	add.4s	v20, v5, v3
	add.4s	v21, v5, v4
	add.4s	v22, v5, v6
	ushl.4s	v23, v7, v5
	ushl.4s	v24, v7, v20
	ushl.4s	v25, v7, v21
	ushl.4s	v26, v7, v22
	and.16b	v23, v23, v0
	and.16b	v24, v24, v0
	and.16b	v25, v25, v0
	and.16b	v26, v26, v0
	cmeq.4s	v23, v23, #0
	cmeq.4s	v24, v24, #0
	cmeq.4s	v25, v25, #0
	cmeq.4s	v26, v26, #0
	shl.4s	v27, v5, #2
	shl.4s	v20, v20, #2
	shl.4s	v21, v21, #2
	shl.4s	v22, v22, #2
	ushl.4s	v27, v16, v27
	ushl.4s	v20, v16, v20
	ushl.4s	v21, v16, v21
	ushl.4s	v22, v16, v22
	bic.16b	v27, v23, v27
	orn.16b	v23, v27, v23
	bic.16b	v20, v24, v20
	orn.16b	v20, v20, v24
	bic.16b	v21, v25, v21
	orn.16b	v21, v21, v25
	bic.16b	v22, v26, v22
	orn.16b	v22, v22, v26
	and.16b	v1, v23, v1
	and.16b	v2, v20, v2
	and.16b	v18, v21, v18
	and.16b	v19, v22, v19
	add.4s	v5, v5, v17
	subs	w14, w14, #16
	b.ne	LBB0_6
; %bb.7:
	and.16b	v0, v2, v1
	and.16b	v0, v18, v0
	and.16b	v0, v19, v0
	ext.16b	v1, v0, v0, #8
	and.8b	v0, v0, v1
	fmov	w14, s0
	mov.s	w15, v0[1]
	and	w20, w14, w15
	cmp	w12, w13
	b.eq	LBB0_10
LBB0_8:
	lsl	w12, w11, #2
	mov	w13, #15
	mov	w14, #-1
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	lsl	w15, w13, w12
	lsr	w16, w10, w11
	tst	w16, #0x1
	csinv	w15, w14, w15, ne
	and	w20, w15, w20
	add	w11, w11, #1
	add	w12, w12, #4
	cmp	w9, w11
	b.ne	LBB0_9
LBB0_10:
	subs	w10, w9, #1
	b.le	LBB0_15
; %bb.11:
	ldr	w11, [x22]
	mov	w12, #4
	b	LBB0_13
LBB0_12:                                ;   in Loop: Header=BB0_13 Depth=1
	add	w12, w12, #4
	subs	w10, w10, #1
	b.eq	LBB0_15
LBB0_13:                                ; =>This Inner Loop Header: Depth=1
	asr	w13, w20, w12
	tst	w13, #0xf
	b.eq	LBB0_12
; %bb.14:                               ;   in Loop: Header=BB0_13 Depth=1
	add	w11, w11, #1
	str	w11, [x22]
	b	LBB0_12
LBB0_15:
	str	w20, [x21]
Lloh23:
	adrp	x10, _MAXCPU@GOTPAGE
Lloh24:
	ldr	x10, [x10, _MAXCPU@GOTPAGEOFF]
	ldr	w11, [x10]
Lloh25:
	adrp	x14, _xlp_hwtid_to_cpuid@GOTPAGE
Lloh26:
	ldr	x14, [x14, _xlp_hwtid_to_cpuid@GOTPAGEOFF]
Lloh27:
	adrp	x13, _xlp_cpuid_to_hwtid@GOTPAGE
Lloh28:
	ldr	x13, [x13, _xlp_cpuid_to_hwtid@GOTPAGEOFF]
	cmp	w11, #1
	b.lt	LBB0_19
; %bb.16:
	mov	x9, #0
	ldr	x11, [x14]
	ldr	x12, [x13]
	mov	w15, #-1
LBB0_17:                                ; =>This Inner Loop Header: Depth=1
	lsl	x16, x9, #2
	str	w15, [x11, x16]
	str	w15, [x12, x16]
	add	x9, x9, #1
	ldrsw	x16, [x10]
	cmp	x9, x16
	b.lt	LBB0_17
; %bb.18:
	ldr	w9, [x8]
LBB0_19:
	cmp	w9, #1
	b.lt	LBB0_26
; %bb.20:
	mov	x10, #0
	mov	x11, #0
	mov	w12, #0
	ldr	x13, [x13]
	ldr	x14, [x14]
	ldr	w15, [x19]
	b	LBB0_22
LBB0_21:                                ;   in Loop: Header=BB0_22 Depth=1
	add	x11, x11, #1
	add	x10, x10, #4
	cmp	x11, w9, sxtw
	b.ge	LBB0_26
LBB0_22:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_24 Depth 2
	lsl	w16, w11, #2
	asr	w16, w20, w16
	and	w16, w16, #0xf
	cmp	w16, #0
	ccmp	w15, #1, #8, ne
	b.lt	LBB0_21
; %bb.23:                               ;   in Loop: Header=BB0_22 Depth=1
	mov	x9, #0
	add	x16, x14, w10, uxtw #2
	add	x17, x13, w12, sxtw #2
	mov	w0, w12
LBB0_24:                                ;   Parent Loop BB0_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	lsl	x15, x9, #2
	add	w1, w10, w9
	str	w1, [x17, x15]
	add	w1, w0, w9
	str	w1, [x16, x15]
	add	x9, x9, #1
	ldrsw	x15, [x19]
	cmp	x9, x15
	b.lt	LBB0_24
; %bb.25:                               ;   in Loop: Header=BB0_22 Depth=1
	add	w12, w12, w9
	ldr	w9, [x8]
	b	LBB0_21
LBB0_26:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotStr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdr	Lloh21, Lloh22
	.loh AdrpAdrp	Lloh19, Lloh21
	.loh AdrpLdr	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.comm	_xlp_hw_thread_mask,4,2         ; @xlp_hw_thread_mask
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"WARNING: Starting uniprocessor kernel on cpumask [0x%lx]!\nWARNING: Other CPUs will be unused.\n"

	.comm	_xlp_ncores,4,2                 ; @xlp_ncores
	.comm	_xlp_threads_per_core,4,2       ; @xlp_threads_per_core
	.comm	_xlp_mmuval,4,2                 ; @xlp_mmuval
	.comm	_SYS_CPU_RESET,4,2              ; @SYS_CPU_RESET
	.comm	_CHIP_PROCESSOR_ID_XLP_416,8,3  ; @CHIP_PROCESSOR_ID_XLP_416
	.comm	_XLP_MAX_CORES,4,2              ; @XLP_MAX_CORES
	.comm	_MAXCPU,4,2                     ; @MAXCPU
	.comm	_xlp_hwtid_to_cpuid,8,3         ; @xlp_hwtid_to_cpuid
	.comm	_xlp_cpuid_to_hwtid,8,3         ; @xlp_cpuid_to_hwtid
	.no_dead_strip	_xlp_parse_mmu_options
.subsections_via_symbols
