	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_fix_cpuid                      ## -- Begin function fix_cpuid
	.p2align	4, 0x90
_fix_cpuid:                             ## @fix_cpuid
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	_cpu_vendor_id@GOTPCREL(%rip), %r14
	movq	(%r14), %rax
	movq	_CPU_VENDOR_INTEL@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_7
## %bb.1:
	movq	_cpu_id@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_CPUID_TO_FAMILY
	cmpl	$15, %eax
	jne	LBB0_3
## %bb.2:
	movl	(%rbx), %edi
	callq	_CPUID_TO_MODEL
	cmpl	$2, %eax
	jg	LBB0_5
LBB0_3:
	movl	(%rbx), %edi
	callq	_CPUID_TO_FAMILY
	cmpl	$6, %eax
	jne	LBB0_7
## %bb.4:
	movl	(%rbx), %edi
	callq	_CPUID_TO_MODEL
	cmpl	$14, %eax
	jl	LBB0_7
LBB0_5:
	movq	_MSR_IA32_MISC_ENABLE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_rdmsr
	movq	_IA32_MISC_EN_LIMCPUID@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%eax, %ecx
	je	LBB0_7
## %bb.6:
	notl	%ecx
	andl	%ecx, %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_wrmsr
	movl	$1, %ebx
	jmp	LBB0_11
LBB0_7:
	movq	_vm_guest@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_VM_GUEST_NO@GOTPCREL(%rip), %rcx
	xorl	%ebx, %ebx
	cmpq	(%rcx), %rax
	jne	LBB0_11
## %bb.8:
	movq	(%r14), %rax
	movq	_CPU_VENDOR_AMD@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_11
## %bb.9:
	movq	_cpu_id@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_CPUID_TO_FAMILY
	cmpl	$21, %eax
	jne	LBB0_11
## %bb.10:
	movq	_MSR_EXTFEATURES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_rdmsr
LBB0_11:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_cpu_vendor_id,8,3              ## @cpu_vendor_id
	.comm	_CPU_VENDOR_INTEL,8,3           ## @CPU_VENDOR_INTEL
	.comm	_cpu_id,4,2                     ## @cpu_id
	.comm	_MSR_IA32_MISC_ENABLE,4,2       ## @MSR_IA32_MISC_ENABLE
	.comm	_IA32_MISC_EN_LIMCPUID,4,2      ## @IA32_MISC_EN_LIMCPUID
	.comm	_vm_guest,8,3                   ## @vm_guest
	.comm	_VM_GUEST_NO,8,3                ## @VM_GUEST_NO
	.comm	_CPU_VENDOR_AMD,8,3             ## @CPU_VENDOR_AMD
	.comm	_MSR_EXTFEATURES,4,2            ## @MSR_EXTFEATURES
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_fix_cpuid                      ; -- Begin function fix_cpuid
	.p2align	2
_fix_cpuid:                             ; @fix_cpuid
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x19, _cpu_vendor_id@GOTPAGE
Lloh1:
	ldr	x19, [x19, _cpu_vendor_id@GOTPAGEOFF]
	ldr	x8, [x19]
Lloh2:
	adrp	x9, _CPU_VENDOR_INTEL@GOTPAGE
Lloh3:
	ldr	x9, [x9, _CPU_VENDOR_INTEL@GOTPAGEOFF]
Lloh4:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_7
; %bb.1:
Lloh5:
	adrp	x20, _cpu_id@GOTPAGE
Lloh6:
	ldr	x20, [x20, _cpu_id@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	_CPUID_TO_FAMILY
	cmp	w0, #15
	b.ne	LBB0_3
; %bb.2:
	ldr	w0, [x20]
	bl	_CPUID_TO_MODEL
	cmp	w0, #2
	b.gt	LBB0_5
LBB0_3:
	ldr	w0, [x20]
	bl	_CPUID_TO_FAMILY
	cmp	w0, #6
	b.ne	LBB0_7
; %bb.4:
	ldr	w0, [x20]
	bl	_CPUID_TO_MODEL
	cmp	w0, #14
	b.lt	LBB0_7
LBB0_5:
Lloh7:
	adrp	x20, _MSR_IA32_MISC_ENABLE@GOTPAGE
Lloh8:
	ldr	x20, [x20, _MSR_IA32_MISC_ENABLE@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	_rdmsr
Lloh9:
	adrp	x8, _IA32_MISC_EN_LIMCPUID@GOTPAGE
Lloh10:
	ldr	x8, [x8, _IA32_MISC_EN_LIMCPUID@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_7
; %bb.6:
	bic	w1, w0, w8
	ldr	w0, [x20]
	bl	_wrmsr
	mov	w0, #1
	b	LBB0_12
LBB0_7:
Lloh12:
	adrp	x8, _vm_guest@GOTPAGE
Lloh13:
	ldr	x8, [x8, _vm_guest@GOTPAGEOFF]
Lloh14:
	ldr	x8, [x8]
Lloh15:
	adrp	x9, _VM_GUEST_NO@GOTPAGE
Lloh16:
	ldr	x9, [x9, _VM_GUEST_NO@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_11
; %bb.8:
	ldr	x8, [x19]
Lloh18:
	adrp	x9, _CPU_VENDOR_AMD@GOTPAGE
Lloh19:
	ldr	x9, [x9, _CPU_VENDOR_AMD@GOTPAGEOFF]
Lloh20:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_11
; %bb.9:
Lloh21:
	adrp	x8, _cpu_id@GOTPAGE
Lloh22:
	ldr	x8, [x8, _cpu_id@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
	bl	_CPUID_TO_FAMILY
	cmp	w0, #21
	b.ne	LBB0_11
; %bb.10:
Lloh24:
	adrp	x8, _MSR_EXTFEATURES@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MSR_EXTFEATURES@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	bl	_rdmsr
LBB0_11:
	mov	w0, #0
LBB0_12:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_cpu_vendor_id,8,3              ; @cpu_vendor_id
	.comm	_CPU_VENDOR_INTEL,8,3           ; @CPU_VENDOR_INTEL
	.comm	_cpu_id,4,2                     ; @cpu_id
	.comm	_MSR_IA32_MISC_ENABLE,4,2       ; @MSR_IA32_MISC_ENABLE
	.comm	_IA32_MISC_EN_LIMCPUID,4,2      ; @IA32_MISC_EN_LIMCPUID
	.comm	_vm_guest,8,3                   ; @vm_guest
	.comm	_VM_GUEST_NO,8,3                ; @VM_GUEST_NO
	.comm	_CPU_VENDOR_AMD,8,3             ; @CPU_VENDOR_AMD
	.comm	_MSR_EXTFEATURES,4,2            ; @MSR_EXTFEATURES
.subsections_via_symbols
