	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pn7_setfidvid
_pn7_setfidvid:                         ## @pn7_setfidvid
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r15d
	movl	%esi, %r12d
	movq	%rdi, -64(%rbp)                 ## 8-byte Spill
	movq	_MSR_AMDK7_FIDVID_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_rdmsr
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	_PN7_STA_CFID
	movl	%eax, %r14d
	movl	%ebx, %edi
	callq	_PN7_STA_CVID
	cmpl	%r12d, %r14d
	jne	LBB0_2
## %bb.1:
	cmpl	%r15d, %eax
	je	LBB0_12
LBB0_2:
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	%r14d, -52(%rbp)                ## 4-byte Spill
	movq	_MSR_AMDK7_FIDVID_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_rdmsr
	movl	%eax, %ebx
	movq	_PN7_CTR_FIDCHRATIO@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movl	%r12d, %edi
	callq	_PN7_CTR_FID
	movl	%eax, %r14d
	movl	%r15d, -48(%rbp)                ## 4-byte Spill
	movl	%r15d, %edi
	callq	_PN7_CTR_VID
	movl	%eax, %r15d
	orl	%r14d, %r15d
	movq	-64(%rbp), %r13                 ## 8-byte Reload
	movl	4(%r13), %edi
	callq	_PN7_CTR_SGTC
	movl	%eax, %r14d
	orl	%r15d, %r14d
	movq	_A0_ERRATA@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	testl	%eax, (%r13)
	je	LBB0_4
## %bb.3:
	xorl	%eax, %eax
	callq	_disable_intr
LBB0_4:
	orl	%r14d, %ebx
	movq	_pn7_fid_to_mult@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movslq	%r12d, %rcx
	movq	(%rax,%rcx,8), %rcx
	movl	-52(%rbp), %r13d                ## 4-byte Reload
	movslq	%r13d, %rdx
	movq	_MSR_AMDK7_FIDVID_CTL@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	cmpq	(%rax,%rdx,8), %rcx
	jge	LBB0_7
## %bb.5:
	movq	_PN7_CTR_FIDC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	%ebx, %esi
	callq	_wrmsr
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	cmpl	-48(%rbp), %eax                 ## 4-byte Folded Reload
	je	LBB0_10
## %bb.6:
	movq	_PN7_CTR_VIDC@GOTPCREL(%rip), %rax
	jmp	LBB0_9
LBB0_7:
	movq	_PN7_CTR_VIDC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	%ebx, %esi
	callq	_wrmsr
	cmpl	%r12d, %r13d
	je	LBB0_10
## %bb.8:
	movq	_PN7_CTR_FIDC@GOTPCREL(%rip), %rax
LBB0_9:
	movl	(%r14), %edi
	orl	(%rax), %ebx
	movl	%ebx, %esi
	callq	_wrmsr
LBB0_10:
	movl	(%r15), %eax
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
	testl	%eax, (%rcx)
	je	LBB0_12
## %bb.11:
	xorl	%eax, %eax
	callq	_enable_intr
LBB0_12:
	xorl	%eax, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MSR_AMDK7_FIDVID_STATUS,4,2    ## @MSR_AMDK7_FIDVID_STATUS
	.comm	_MSR_AMDK7_FIDVID_CTL,4,2       ## @MSR_AMDK7_FIDVID_CTL
	.comm	_PN7_CTR_FIDCHRATIO,4,2         ## @PN7_CTR_FIDCHRATIO
	.comm	_A0_ERRATA,4,2                  ## @A0_ERRATA
	.comm	_pn7_fid_to_mult,8,3            ## @pn7_fid_to_mult
	.comm	_PN7_CTR_FIDC,4,2               ## @PN7_CTR_FIDC
	.comm	_PN7_CTR_VIDC,4,2               ## @PN7_CTR_VIDC
	.no_dead_strip	_pn7_setfidvid
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pn7_setfidvid
_pn7_setfidvid:                         ; @pn7_setfidvid
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _MSR_AMDK7_FIDVID_STATUS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MSR_AMDK7_FIDVID_STATUS@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_rdmsr
	mov	x23, x0
	bl	_PN7_STA_CFID
	mov	x22, x0
	mov	x0, x23
	bl	_PN7_STA_CVID
	cmp	w22, w21
	ccmp	w0, w20, #0, eq
	b.eq	LBB0_11
; %bb.1:
	mov	x23, x0
Lloh3:
	adrp	x25, _MSR_AMDK7_FIDVID_CTL@GOTPAGE
Lloh4:
	ldr	x25, [x25, _MSR_AMDK7_FIDVID_CTL@GOTPAGEOFF]
	ldr	w0, [x25]
	bl	_rdmsr
Lloh5:
	adrp	x8, _PN7_CTR_FIDCHRATIO@GOTPAGE
Lloh6:
	ldr	x8, [x8, _PN7_CTR_FIDCHRATIO@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	and	w24, w8, w0
	mov	x0, x21
	bl	_PN7_CTR_FID
	orr	w24, w24, w0
	mov	x0, x20
	bl	_PN7_CTR_VID
	orr	w27, w24, w0
	ldr	w0, [x19, #4]
	bl	_PN7_CTR_SGTC
	mov	x24, x0
	ldr	w8, [x19]
Lloh8:
	adrp	x26, _A0_ERRATA@GOTPAGE
Lloh9:
	ldr	x26, [x26, _A0_ERRATA@GOTPAGEOFF]
	ldr	w9, [x26]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.2:
	bl	_disable_intr
LBB0_3:
	orr	w24, w27, w24
Lloh10:
	adrp	x8, _pn7_fid_to_mult@GOTPAGE
Lloh11:
	ldr	x8, [x8, _pn7_fid_to_mult@GOTPAGEOFF]
Lloh12:
	ldr	x8, [x8]
	ldr	x9, [x8, w21, sxtw #3]
	ldr	x8, [x8, w22, sxtw #3]
	ldr	w0, [x25]
	cmp	x9, x8
	b.ge	LBB0_6
; %bb.4:
Lloh13:
	adrp	x8, _PN7_CTR_FIDC@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PN7_CTR_FIDC@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	orr	w1, w8, w24
	bl	_wrmsr
	cmp	w23, w20
	b.eq	LBB0_9
; %bb.5:
Lloh16:
	adrp	x8, _PN7_CTR_VIDC@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PN7_CTR_VIDC@GOTPAGEOFF]
	b	LBB0_8
LBB0_6:
Lloh18:
	adrp	x8, _PN7_CTR_VIDC@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PN7_CTR_VIDC@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	orr	w1, w8, w24
	bl	_wrmsr
	cmp	w22, w21
	b.eq	LBB0_9
; %bb.7:
Lloh21:
	adrp	x8, _PN7_CTR_FIDC@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PN7_CTR_FIDC@GOTPAGEOFF]
LBB0_8:
	ldr	w0, [x25]
	ldr	w8, [x8]
	orr	w1, w8, w24
	bl	_wrmsr
LBB0_9:
	ldr	w8, [x19]
	ldr	w9, [x26]
	tst	w9, w8
	b.eq	LBB0_11
; %bb.10:
	bl	_enable_intr
LBB0_11:
	mov	w0, #0
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh21, Lloh22
	.cfi_endproc
                                        ; -- End function
	.comm	_MSR_AMDK7_FIDVID_STATUS,4,2    ; @MSR_AMDK7_FIDVID_STATUS
	.comm	_MSR_AMDK7_FIDVID_CTL,4,2       ; @MSR_AMDK7_FIDVID_CTL
	.comm	_PN7_CTR_FIDCHRATIO,4,2         ; @PN7_CTR_FIDCHRATIO
	.comm	_A0_ERRATA,4,2                  ; @A0_ERRATA
	.comm	_pn7_fid_to_mult,8,3            ; @pn7_fid_to_mult
	.comm	_PN7_CTR_FIDC,4,2               ; @PN7_CTR_FIDC
	.comm	_PN7_CTR_VIDC,4,2               ; @PN7_CTR_VIDC
	.no_dead_strip	_pn7_setfidvid
.subsections_via_symbols
