	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pci_emul_add_pciecap           ## -- Begin function pci_emul_add_pciecap
	.p2align	4, 0x90
_pci_emul_add_pciecap:                  ## @pci_emul_add_pciecap
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %ebx
	movq	%rdi, %r14
	leaq	-32(%rbp), %rdi
	movl	$16, %esi
	callq	_bzero
	movq	_PCIEM_TYPE_ENDPOINT@GOTPCREL(%rip), %rax
	cmpl	%ebx, (%rax)
	jne	LBB0_1
## %bb.2:
	cmpq	$0, (%r14)
	movq	_PCIEM_TYPE_ROOT_INT_EP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmovel	%eax, %ebx
	jmp	LBB0_3
LBB0_1:
	movq	_PCIEM_TYPE_ROOT_INT_EP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_3:
	movq	_PCIY_EXPRESS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, -20(%rbp)
	movq	_PCIECAP_VERSION@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ebx, %ecx
	movl	%ecx, -32(%rbp)
	cmpl	%eax, %ebx
	je	LBB0_5
## %bb.4:
	movabsq	$73014445073, %rax              ## imm = 0x1100000411
	movq	%rax, -28(%rbp)
LBB0_5:
	leaq	-32(%rbp), %rsi
	movq	%r14, %rdi
	movl	$16, %edx
	callq	_pci_emul_add_capability
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIEM_TYPE_ENDPOINT,4,2        ## @PCIEM_TYPE_ENDPOINT
	.comm	_PCIEM_TYPE_ROOT_INT_EP,4,2     ## @PCIEM_TYPE_ROOT_INT_EP
	.comm	_PCIY_EXPRESS,4,2               ## @PCIY_EXPRESS
	.comm	_PCIECAP_VERSION,4,2            ## @PCIECAP_VERSION
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function pci_emul_add_pciecap
lCPI0_0:
	.long	1041                            ; 0x411
	.long	17                              ; 0x11
	.section	__TEXT,__text,regular,pure_instructions
	.globl	_pci_emul_add_pciecap
	.p2align	2
_pci_emul_add_pciecap:                  ; @pci_emul_add_pciecap
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	mov	x0, sp
	mov	w1, #16
	bl	_bzero
Lloh0:
	adrp	x8, _PCIEM_TYPE_ENDPOINT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCIEM_TYPE_ENDPOINT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w20
	b.ne	LBB0_2
; %bb.1:
	ldr	x9, [x19]
Lloh3:
	adrp	x8, _PCIEM_TYPE_ROOT_INT_EP@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCIEM_TYPE_ROOT_INT_EP@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	x9, #0
	csel	w20, w8, w20, eq
	b	LBB0_3
LBB0_2:
Lloh6:
	adrp	x8, _PCIEM_TYPE_ROOT_INT_EP@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCIEM_TYPE_ROOT_INT_EP@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
LBB0_3:
Lloh9:
	adrp	x9, _PCIY_EXPRESS@GOTPAGE
Lloh10:
	ldr	x9, [x9, _PCIY_EXPRESS@GOTPAGEOFF]
Lloh11:
	adrp	x10, _PCIECAP_VERSION@GOTPAGE
Lloh12:
	ldr	x10, [x10, _PCIECAP_VERSION@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
Lloh14:
	ldr	w10, [x10]
	orr	w10, w10, w20
	str	w9, [sp, #12]
	str	w10, [sp]
	cmp	w20, w8
	b.eq	LBB0_5
; %bb.4:
Lloh15:
	adrp	x8, lCPI0_0@PAGE
Lloh16:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	stur	d0, [sp, #4]
LBB0_5:
	mov	x1, sp
	mov	x0, x19
	mov	w2, #16
	bl	_pci_emul_add_capability
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh13
	.loh AdrpLdr	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIEM_TYPE_ENDPOINT,4,2        ; @PCIEM_TYPE_ENDPOINT
	.comm	_PCIEM_TYPE_ROOT_INT_EP,4,2     ; @PCIEM_TYPE_ROOT_INT_EP
	.comm	_PCIY_EXPRESS,4,2               ; @PCIY_EXPRESS
	.comm	_PCIECAP_VERSION,4,2            ; @PCIECAP_VERSION
.subsections_via_symbols
