	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pci_emul_capwrite
_pci_emul_capwrite:                     ## @pci_emul_capwrite
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r12d
	leal	-1(%r12), %eax
	testl	%esi, %eax
	je	LBB0_1
LBB0_17:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movl	%esi, %r13d
	movq	%rdi, %r15
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movq	_CAP_START_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	%eax, %ebx
	leal	1(%rbx), %r14d
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_pci_get_cfgdata8
	testl	%eax, %eax
	je	LBB0_5
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	cmpl	%r13d, %ebx
	jg	LBB0_2
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	cmpl	%r13d, %eax
	jle	LBB0_2
LBB0_5:
	xorl	%edi, %edi
	cmpl	%r13d, %ebx
	setle	%dil
	callq	_assert
	cmpl	%r13d, %ebx
	je	LBB0_8
## %bb.6:
	cmpl	%r13d, %r14d
	je	LBB0_8
## %bb.7:
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	jmp	LBB0_11
LBB0_8:
	cmpl	$4, %r12d
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	jne	LBB0_17
## %bb.9:
	cmpl	%r13d, %ebx
	jne	LBB0_17
## %bb.10:
	addl	$2, %r13d
	sarl	$16, %r14d
	movl	$2, %r12d
LBB0_11:
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_pci_get_cfgdata8
	cmpl	$128, %eax
	je	LBB0_15
## %bb.12:
	cmpl	$130, %eax
	je	LBB0_16
## %bb.13:
	cmpl	$129, %eax
	jne	LBB0_17
## %bb.14:
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%r13d, %edx
	movl	%r12d, %ecx
	movl	%r14d, %r8d
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_msicap_cfgwrite                ## TAILCALL
LBB0_15:
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%r13d, %edx
	movl	%r12d, %ecx
	movl	%r14d, %r8d
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_msixcap_cfgwrite               ## TAILCALL
LBB0_16:
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%r13d, %edx
	movl	%r12d, %ecx
	movl	%r14d, %r8d
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_pciecap_cfgwrite               ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CAP_START_OFFSET,4,2           ## @CAP_START_OFFSET
	.no_dead_strip	_pci_emul_capwrite
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pci_emul_capwrite
_pci_emul_capwrite:                     ; @pci_emul_capwrite
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	sub	w8, w2, #1
	tst	w8, w1
	b.eq	LBB0_2
LBB0_1:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_2:
	mov	x19, x3
	mov	x21, x2
	mov	x20, x1
	mov	x22, x0
Lloh0:
	adrp	x8, _CAP_START_OFFSET@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CAP_START_OFFSET@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	mov	x23, x0
	add	w24, w0, #1
	mov	x0, x22
	mov	x1, x24
	bl	_pci_get_cfgdata8
	cbz	w0, LBB0_6
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	cmp	w23, w20
	b.gt	LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	cmp	w0, w20
	b.le	LBB0_3
LBB0_6:
	cmp	w23, w20
	cset	w0, le
	bl	_assert
	cmp	w23, w20
	b.eq	LBB0_8
; %bb.7:
	cmp	w24, w20
	b.ne	LBB0_11
LBB0_8:
	cmp	w21, #4
	b.ne	LBB0_1
; %bb.9:
	cmp	w23, w20
	b.ne	LBB0_1
; %bb.10:
	add	w20, w20, #2
	asr	w19, w19, #16
	mov	w21, #2
LBB0_11:
	mov	x0, x22
	mov	x1, x23
	bl	_pci_get_cfgdata8
	cmp	w0, #128
	b.eq	LBB0_15
; %bb.12:
	cmp	w0, #130
	b.eq	LBB0_16
; %bb.13:
	cmp	w0, #129
	b.ne	LBB0_1
; %bb.14:
	mov	x0, x22
	mov	x1, x23
	mov	x2, x20
	mov	x3, x21
	mov	x4, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_msicap_cfgwrite
LBB0_15:
	mov	x0, x22
	mov	x1, x23
	mov	x2, x20
	mov	x3, x21
	mov	x4, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_msixcap_cfgwrite
LBB0_16:
	mov	x0, x22
	mov	x1, x23
	mov	x2, x20
	mov	x3, x21
	mov	x4, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_pciecap_cfgwrite
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CAP_START_OFFSET,4,2           ; @CAP_START_OFFSET
	.no_dead_strip	_pci_emul_capwrite
.subsections_via_symbols
