	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_v10_0_init_golden_registers
_dce_v10_0_init_golden_registers:       ## @dce_v10_0_init_golden_registers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	(%rdi), %eax
	cmpl	$129, %eax
	je	LBB0_1
## %bb.2:
	cmpl	$128, %eax
	jne	LBB0_5
## %bb.3:
	movq	_golden_settings_tonga_a11@GOTPCREL(%rip), %r15
	movq	_tonga_mgcg_cgcg_init@GOTPCREL(%rip), %rax
	jmp	LBB0_4
LBB0_1:
	movq	_golden_settings_fiji_a10@GOTPCREL(%rip), %r15
	movq	_fiji_mgcg_cgcg_init@GOTPCREL(%rip), %rax
LBB0_4:
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movl	(%r15), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_device_program_register_sequence ## TAILCALL
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_fiji_mgcg_cgcg_init,4,2        ## @fiji_mgcg_cgcg_init
	.comm	_golden_settings_fiji_a10,4,2   ## @golden_settings_fiji_a10
	.comm	_tonga_mgcg_cgcg_init,4,2       ## @tonga_mgcg_cgcg_init
	.comm	_golden_settings_tonga_a11,4,2  ## @golden_settings_tonga_a11
	.no_dead_strip	_dce_v10_0_init_golden_registers
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_v10_0_init_golden_registers
_dce_v10_0_init_golden_registers:       ; @dce_v10_0_init_golden_registers
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w8, [x0]
	cmp	w8, #129
	b.eq	LBB0_3
; %bb.1:
	cmp	w8, #128
	b.ne	LBB0_5
; %bb.2:
Lloh0:
	adrp	x21, _golden_settings_tonga_a11@GOTPAGE
Lloh1:
	ldr	x21, [x21, _golden_settings_tonga_a11@GOTPAGEOFF]
Lloh2:
	adrp	x8, _tonga_mgcg_cgcg_init@GOTPAGE
Lloh3:
	ldr	x8, [x8, _tonga_mgcg_cgcg_init@GOTPAGEOFF]
	b	LBB0_4
LBB0_3:
Lloh4:
	adrp	x21, _golden_settings_fiji_a10@GOTPAGE
Lloh5:
	ldr	x21, [x21, _golden_settings_fiji_a10@GOTPAGEOFF]
Lloh6:
	adrp	x8, _fiji_mgcg_cgcg_init@GOTPAGE
Lloh7:
	ldr	x8, [x8, _fiji_mgcg_cgcg_init@GOTPAGEOFF]
LBB0_4:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
	ldr	w20, [x21]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_amdgpu_device_program_register_sequence
LBB0_5:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_fiji_mgcg_cgcg_init,4,2        ; @fiji_mgcg_cgcg_init
	.comm	_golden_settings_fiji_a10,4,2   ; @golden_settings_fiji_a10
	.comm	_tonga_mgcg_cgcg_init,4,2       ; @tonga_mgcg_cgcg_init
	.comm	_golden_settings_tonga_a11,4,2  ; @golden_settings_tonga_a11
	.no_dead_strip	_dce_v10_0_init_golden_registers
.subsections_via_symbols
