	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_enable_transcoder_func ## -- Begin function intel_ddi_enable_transcoder_func
	.p2align	4, 0x90
_intel_ddi_enable_transcoder_func:      ## @intel_ddi_enable_transcoder_func
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movl	48(%rdi), %edi
	callq	_to_intel_crtc
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_intel_ddi_get_crtc_encoder
	movq	%rax, %r12
	movl	4(%rbx), %edi
	callq	_to_i915
	movl	(%rbx), %ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movl	(%r15), %r13d
	movl	(%r12), %ebx
	movq	_TRANS_DDI_FUNC_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	movq	%rax, %rdi
	callq	_INTEL_GEN
	movl	%ebx, %edi
	cmpl	$12, %eax
	jl	LBB0_2
## %bb.1:
	callq	_TGL_TRANS_DDI_SELECT_PORT
	jmp	LBB0_3
LBB0_2:
	callq	_TRANS_DDI_SELECT_PORT
LBB0_3:
	movl	%eax, %r12d
	orl	%r14d, %r12d
	movl	4(%r15), %eax
	addl	$-18, %eax
	rorl	%eax
	cmpl	$9, %eax
	ja	LBB0_6
## %bb.4:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_5:
	movq	_TRANS_DDI_BPC_6@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_6:
	xorl	%eax, %eax
	callq	_BUG
	jmp	LBB0_11
LBB0_7:
	movq	_TRANS_DDI_BPC_8@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_8:
	movq	_TRANS_DDI_BPC_10@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_9:
	movq	_TRANS_DDI_BPC_12@GOTPCREL(%rip), %rax
LBB0_10:
	orl	(%rax), %r12d
LBB0_11:
	movl	44(%r15), %eax
	movq	_DRM_MODE_FLAG_PVSYNC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	andl	%eax, %ebx
	je	LBB0_13
## %bb.12:
	movq	_TRANS_DDI_PVSYNC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
LBB0_13:
	orl	%r12d, %ebx
	movq	_DRM_MODE_FLAG_PHSYNC@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	je	LBB0_15
## %bb.14:
	movq	_TRANS_DDI_PHSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_15:
	orl	%eax, %ebx
	movq	_TRANSCODER_EDP@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r13d
	jne	LBB0_26
## %bb.16:
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	cmpl	$128, %eax
	je	LBB0_21
## %bb.17:
	cmpl	$129, %eax
	je	LBB0_22
## %bb.18:
	cmpl	$130, %eax
	jne	LBB0_23
## %bb.19:
	cmpl	$0, 40(%r15)
	je	LBB0_24
## %bb.20:
	movq	_TRANS_DDI_EDP_INPUT_A_ONOFF@GOTPCREL(%rip), %rax
	jmp	LBB0_25
LBB0_21:
	movq	_TRANS_DDI_EDP_INPUT_C_ONOFF@GOTPCREL(%rip), %rax
	jmp	LBB0_25
LBB0_22:
	movq	_TRANS_DDI_EDP_INPUT_B_ONOFF@GOTPCREL(%rip), %rax
	jmp	LBB0_25
LBB0_23:
	xorl	%eax, %eax
	callq	_BUG
	jmp	LBB0_26
LBB0_24:
	movq	_TRANS_DDI_EDP_INPUT_A_ON@GOTPCREL(%rip), %rax
LBB0_25:
	orl	(%rax), %ebx
LBB0_26:
	movq	_INTEL_OUTPUT_HDMI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_intel_crtc_has_type
	testq	%rax, %rax
	je	LBB0_29
## %bb.27:
	cmpq	$0, 32(%r15)
	jne	LBB0_31
## %bb.28:
	movq	_TRANS_DDI_MODE_SELECT_DVI@GOTPCREL(%rip), %rax
	jmp	LBB0_32
LBB0_29:
	movq	_INTEL_OUTPUT_ANALOG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_intel_crtc_has_type
	testq	%rax, %rax
	je	LBB0_36
## %bb.30:
	movq	_TRANS_DDI_MODE_SELECT_FDI@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	8(%r15), %eax
	addl	%eax, %eax
	addl	$-2, %eax
	jmp	LBB0_40
LBB0_31:
	movq	_TRANS_DDI_MODE_SELECT_HDMI@GOTPCREL(%rip), %rax
LBB0_32:
	orl	(%rax), %ebx
	xorl	%eax, %eax
	cmpq	$0, 24(%r15)
	je	LBB0_34
## %bb.33:
	movq	_TRANS_DDI_HDMI_SCRAMBLING@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_34:
	orl	%eax, %ebx
	cmpq	$0, 16(%r15)
	je	LBB0_41
## %bb.35:
	movq	_TRANS_DDI_HIGH_TMDS_CHAR_RATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	jmp	LBB0_41
LBB0_36:
	movq	_INTEL_OUTPUT_DP_MST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_intel_crtc_has_type
	testq	%rax, %rax
	je	LBB0_38
## %bb.37:
	movq	_TRANS_DDI_MODE_SELECT_DP_MST@GOTPCREL(%rip), %rax
	jmp	LBB0_39
LBB0_38:
	movq	_TRANS_DDI_MODE_SELECT_DP_SST@GOTPCREL(%rip), %rax
LBB0_39:
	orl	(%rax), %ebx
	movl	12(%r15), %edi
	callq	_DDI_PORT_WIDTH
LBB0_40:
	orl	%eax, %ebx
LBB0_41:
	movl	%r13d, %edi
	callq	_TRANS_DDI_FUNC_CTL
	movl	%eax, %edi
	movl	%ebx, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_I915_WRITE                     ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
LJTI0_0:
	.long	L0_0_set_5
	.long	L0_0_set_6
	.long	L0_0_set_6
	.long	L0_0_set_7
	.long	L0_0_set_6
	.long	L0_0_set_6
	.long	L0_0_set_8
	.long	L0_0_set_6
	.long	L0_0_set_6
	.long	L0_0_set_9
	.end_data_region
                                        ## -- End function
	.comm	_TRANS_DDI_FUNC_ENABLE,4,2      ## @TRANS_DDI_FUNC_ENABLE
	.comm	_TRANS_DDI_BPC_6,4,2            ## @TRANS_DDI_BPC_6
	.comm	_TRANS_DDI_BPC_8,4,2            ## @TRANS_DDI_BPC_8
	.comm	_TRANS_DDI_BPC_10,4,2           ## @TRANS_DDI_BPC_10
	.comm	_TRANS_DDI_BPC_12,4,2           ## @TRANS_DDI_BPC_12
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ## @DRM_MODE_FLAG_PVSYNC
	.comm	_TRANS_DDI_PVSYNC,4,2           ## @TRANS_DDI_PVSYNC
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ## @DRM_MODE_FLAG_PHSYNC
	.comm	_TRANS_DDI_PHSYNC,4,2           ## @TRANS_DDI_PHSYNC
	.comm	_TRANSCODER_EDP,4,2             ## @TRANSCODER_EDP
	.comm	_TRANS_DDI_EDP_INPUT_A_ONOFF,4,2 ## @TRANS_DDI_EDP_INPUT_A_ONOFF
	.comm	_TRANS_DDI_EDP_INPUT_A_ON,4,2   ## @TRANS_DDI_EDP_INPUT_A_ON
	.comm	_TRANS_DDI_EDP_INPUT_B_ONOFF,4,2 ## @TRANS_DDI_EDP_INPUT_B_ONOFF
	.comm	_TRANS_DDI_EDP_INPUT_C_ONOFF,4,2 ## @TRANS_DDI_EDP_INPUT_C_ONOFF
	.comm	_INTEL_OUTPUT_HDMI,4,2          ## @INTEL_OUTPUT_HDMI
	.comm	_TRANS_DDI_MODE_SELECT_HDMI,4,2 ## @TRANS_DDI_MODE_SELECT_HDMI
	.comm	_TRANS_DDI_MODE_SELECT_DVI,4,2  ## @TRANS_DDI_MODE_SELECT_DVI
	.comm	_TRANS_DDI_HDMI_SCRAMBLING,4,2  ## @TRANS_DDI_HDMI_SCRAMBLING
	.comm	_TRANS_DDI_HIGH_TMDS_CHAR_RATE,4,2 ## @TRANS_DDI_HIGH_TMDS_CHAR_RATE
	.comm	_INTEL_OUTPUT_ANALOG,4,2        ## @INTEL_OUTPUT_ANALOG
	.comm	_TRANS_DDI_MODE_SELECT_FDI,4,2  ## @TRANS_DDI_MODE_SELECT_FDI
	.comm	_INTEL_OUTPUT_DP_MST,4,2        ## @INTEL_OUTPUT_DP_MST
	.comm	_TRANS_DDI_MODE_SELECT_DP_MST,4,2 ## @TRANS_DDI_MODE_SELECT_DP_MST
	.comm	_TRANS_DDI_MODE_SELECT_DP_SST,4,2 ## @TRANS_DDI_MODE_SELECT_DP_SST
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_enable_transcoder_func ; -- Begin function intel_ddi_enable_transcoder_func
	.p2align	2
_intel_ddi_enable_transcoder_func:      ; @intel_ddi_enable_transcoder_func
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x0
	ldr	w0, [x0, #48]
	bl	_to_intel_crtc
	mov	x19, x0
	bl	_intel_ddi_get_crtc_encoder
	mov	x21, x0
	ldr	w0, [x19, #4]
	bl	_to_i915
	ldr	w22, [x19]
	ldr	w19, [x20]
	ldr	w21, [x21]
Lloh0:
	adrp	x8, _TRANS_DDI_FUNC_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _TRANS_DDI_FUNC_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w23, [x8]
	bl	_INTEL_GEN
	cmp	w0, #12
	b.lt	LBB0_2
; %bb.1:
	mov	x0, x21
	bl	_TGL_TRANS_DDI_SELECT_PORT
	b	LBB0_3
LBB0_2:
	mov	x0, x21
	bl	_TRANS_DDI_SELECT_PORT
LBB0_3:
	orr	w21, w0, w23
	ldr	w8, [x20, #4]
	sub	w8, w8, #18
	ror	w8, w8, #1
	cmp	w8, #9
	b.hi	LBB0_6
; %bb.4:
Lloh3:
	adrp	x9, lJTI0_0@PAGE
Lloh4:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_5
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_5:
Lloh5:
	adrp	x8, _TRANS_DDI_BPC_6@GOTPAGE
Lloh6:
	ldr	x8, [x8, _TRANS_DDI_BPC_6@GOTPAGEOFF]
	b	LBB0_10
LBB0_6:
	bl	_BUG
	b	LBB0_11
LBB0_7:
Lloh7:
	adrp	x8, _TRANS_DDI_BPC_8@GOTPAGE
Lloh8:
	ldr	x8, [x8, _TRANS_DDI_BPC_8@GOTPAGEOFF]
	b	LBB0_10
LBB0_8:
Lloh9:
	adrp	x8, _TRANS_DDI_BPC_10@GOTPAGE
Lloh10:
	ldr	x8, [x8, _TRANS_DDI_BPC_10@GOTPAGEOFF]
	b	LBB0_10
LBB0_9:
Lloh11:
	adrp	x8, _TRANS_DDI_BPC_12@GOTPAGE
Lloh12:
	ldr	x8, [x8, _TRANS_DDI_BPC_12@GOTPAGEOFF]
LBB0_10:
	ldr	w8, [x8]
	orr	w21, w8, w21
LBB0_11:
	ldr	w8, [x20, #44]
Lloh13:
	adrp	x9, _DRM_MODE_FLAG_PVSYNC@GOTPAGE
Lloh14:
	ldr	x9, [x9, _DRM_MODE_FLAG_PVSYNC@GOTPAGEOFF]
Lloh15:
	adrp	x10, _TRANS_DDI_PVSYNC@GOTPAGE
Lloh16:
	ldr	x10, [x10, _TRANS_DDI_PVSYNC@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
Lloh18:
	ldr	w10, [x10]
	tst	w9, w8
	csel	w9, wzr, w10, eq
Lloh19:
	adrp	x10, _DRM_MODE_FLAG_PHSYNC@GOTPAGE
Lloh20:
	ldr	x10, [x10, _DRM_MODE_FLAG_PHSYNC@GOTPAGEOFF]
	orr	w9, w9, w21
Lloh21:
	ldr	w10, [x10]
Lloh22:
	adrp	x11, _TRANS_DDI_PHSYNC@GOTPAGE
Lloh23:
	ldr	x11, [x11, _TRANS_DDI_PHSYNC@GOTPAGEOFF]
Lloh24:
	ldr	w11, [x11]
	tst	w10, w8
	csel	w8, wzr, w11, eq
	orr	w21, w9, w8
Lloh25:
	adrp	x8, _TRANSCODER_EDP@GOTPAGE
Lloh26:
	ldr	x8, [x8, _TRANSCODER_EDP@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	cmp	w19, w8
	b.ne	LBB0_22
; %bb.12:
	cmp	w22, #128
	b.eq	LBB0_17
; %bb.13:
	cmp	w22, #129
	b.eq	LBB0_18
; %bb.14:
	cmp	w22, #130
	b.ne	LBB0_19
; %bb.15:
	ldr	w8, [x20, #40]
	cbz	w8, LBB0_20
; %bb.16:
Lloh28:
	adrp	x8, _TRANS_DDI_EDP_INPUT_A_ONOFF@GOTPAGE
Lloh29:
	ldr	x8, [x8, _TRANS_DDI_EDP_INPUT_A_ONOFF@GOTPAGEOFF]
	b	LBB0_21
LBB0_17:
Lloh30:
	adrp	x8, _TRANS_DDI_EDP_INPUT_C_ONOFF@GOTPAGE
Lloh31:
	ldr	x8, [x8, _TRANS_DDI_EDP_INPUT_C_ONOFF@GOTPAGEOFF]
	b	LBB0_21
LBB0_18:
Lloh32:
	adrp	x8, _TRANS_DDI_EDP_INPUT_B_ONOFF@GOTPAGE
Lloh33:
	ldr	x8, [x8, _TRANS_DDI_EDP_INPUT_B_ONOFF@GOTPAGEOFF]
	b	LBB0_21
LBB0_19:
	bl	_BUG
	b	LBB0_22
LBB0_20:
Lloh34:
	adrp	x8, _TRANS_DDI_EDP_INPUT_A_ON@GOTPAGE
Lloh35:
	ldr	x8, [x8, _TRANS_DDI_EDP_INPUT_A_ON@GOTPAGEOFF]
LBB0_21:
	ldr	w8, [x8]
	orr	w21, w8, w21
LBB0_22:
Lloh36:
	adrp	x8, _INTEL_OUTPUT_HDMI@GOTPAGE
Lloh37:
	ldr	x8, [x8, _INTEL_OUTPUT_HDMI@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_crtc_has_type
	cbz	x0, LBB0_25
; %bb.23:
	ldr	x8, [x20, #32]
Lloh39:
	adrp	x9, _TRANS_DDI_MODE_SELECT_DVI@GOTPAGE
Lloh40:
	ldr	x9, [x9, _TRANS_DDI_MODE_SELECT_DVI@GOTPAGEOFF]
Lloh41:
	adrp	x10, _TRANS_DDI_MODE_SELECT_HDMI@GOTPAGE
Lloh42:
	ldr	x10, [x10, _TRANS_DDI_MODE_SELECT_HDMI@GOTPAGEOFF]
	cmp	x8, #0
	csel	x8, x9, x10, eq
	ldr	w8, [x8]
	orr	w8, w8, w21
Lloh43:
	adrp	x9, _TRANS_DDI_HDMI_SCRAMBLING@GOTPAGE
Lloh44:
	ldr	x9, [x9, _TRANS_DDI_HDMI_SCRAMBLING@GOTPAGEOFF]
Lloh45:
	ldr	w9, [x9]
	ldp	x11, x10, [x20, #16]
	cmp	x10, #0
	csel	w9, wzr, w9, eq
	orr	w20, w8, w9
	cbz	x11, LBB0_31
; %bb.24:
Lloh46:
	adrp	x8, _TRANS_DDI_HIGH_TMDS_CHAR_RATE@GOTPAGE
Lloh47:
	ldr	x8, [x8, _TRANS_DDI_HIGH_TMDS_CHAR_RATE@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
	orr	w20, w8, w20
	b	LBB0_31
LBB0_25:
Lloh49:
	adrp	x8, _INTEL_OUTPUT_ANALOG@GOTPAGE
Lloh50:
	ldr	x8, [x8, _INTEL_OUTPUT_ANALOG@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_crtc_has_type
	cbz	x0, LBB0_27
; %bb.26:
Lloh52:
	adrp	x8, _TRANS_DDI_MODE_SELECT_FDI@GOTPAGE
Lloh53:
	ldr	x8, [x8, _TRANS_DDI_MODE_SELECT_FDI@GOTPAGEOFF]
Lloh54:
	ldr	w8, [x8]
	orr	w8, w8, w21
	ldr	w9, [x20, #8]
	lsl	w9, w9, #1
	sub	w9, w9, #2
	orr	w20, w8, w9
	b	LBB0_31
LBB0_27:
Lloh55:
	adrp	x8, _INTEL_OUTPUT_DP_MST@GOTPAGE
Lloh56:
	ldr	x8, [x8, _INTEL_OUTPUT_DP_MST@GOTPAGEOFF]
Lloh57:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_crtc_has_type
	cbz	x0, LBB0_29
; %bb.28:
Lloh58:
	adrp	x8, _TRANS_DDI_MODE_SELECT_DP_MST@GOTPAGE
Lloh59:
	ldr	x8, [x8, _TRANS_DDI_MODE_SELECT_DP_MST@GOTPAGEOFF]
	b	LBB0_30
LBB0_29:
Lloh60:
	adrp	x8, _TRANS_DDI_MODE_SELECT_DP_SST@GOTPAGE
Lloh61:
	ldr	x8, [x8, _TRANS_DDI_MODE_SELECT_DP_SST@GOTPAGEOFF]
LBB0_30:
	ldr	w8, [x8]
	orr	w21, w8, w21
	ldr	w0, [x20, #12]
	bl	_DDI_PORT_WIDTH
	orr	w20, w21, w0
LBB0_31:
	mov	x0, x19
	bl	_TRANS_DDI_FUNC_CTL
	mov	x1, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_I915_WRITE
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh17
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh60, Lloh61
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_5-LBB0_5)>>2
	.byte	(LBB0_6-LBB0_5)>>2
	.byte	(LBB0_6-LBB0_5)>>2
	.byte	(LBB0_7-LBB0_5)>>2
	.byte	(LBB0_6-LBB0_5)>>2
	.byte	(LBB0_6-LBB0_5)>>2
	.byte	(LBB0_8-LBB0_5)>>2
	.byte	(LBB0_6-LBB0_5)>>2
	.byte	(LBB0_6-LBB0_5)>>2
	.byte	(LBB0_9-LBB0_5)>>2
                                        ; -- End function
	.comm	_TRANS_DDI_FUNC_ENABLE,4,2      ; @TRANS_DDI_FUNC_ENABLE
	.comm	_TRANS_DDI_BPC_6,4,2            ; @TRANS_DDI_BPC_6
	.comm	_TRANS_DDI_BPC_8,4,2            ; @TRANS_DDI_BPC_8
	.comm	_TRANS_DDI_BPC_10,4,2           ; @TRANS_DDI_BPC_10
	.comm	_TRANS_DDI_BPC_12,4,2           ; @TRANS_DDI_BPC_12
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ; @DRM_MODE_FLAG_PVSYNC
	.comm	_TRANS_DDI_PVSYNC,4,2           ; @TRANS_DDI_PVSYNC
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ; @DRM_MODE_FLAG_PHSYNC
	.comm	_TRANS_DDI_PHSYNC,4,2           ; @TRANS_DDI_PHSYNC
	.comm	_TRANSCODER_EDP,4,2             ; @TRANSCODER_EDP
	.comm	_TRANS_DDI_EDP_INPUT_A_ONOFF,4,2 ; @TRANS_DDI_EDP_INPUT_A_ONOFF
	.comm	_TRANS_DDI_EDP_INPUT_A_ON,4,2   ; @TRANS_DDI_EDP_INPUT_A_ON
	.comm	_TRANS_DDI_EDP_INPUT_B_ONOFF,4,2 ; @TRANS_DDI_EDP_INPUT_B_ONOFF
	.comm	_TRANS_DDI_EDP_INPUT_C_ONOFF,4,2 ; @TRANS_DDI_EDP_INPUT_C_ONOFF
	.comm	_INTEL_OUTPUT_HDMI,4,2          ; @INTEL_OUTPUT_HDMI
	.comm	_TRANS_DDI_MODE_SELECT_HDMI,4,2 ; @TRANS_DDI_MODE_SELECT_HDMI
	.comm	_TRANS_DDI_MODE_SELECT_DVI,4,2  ; @TRANS_DDI_MODE_SELECT_DVI
	.comm	_TRANS_DDI_HDMI_SCRAMBLING,4,2  ; @TRANS_DDI_HDMI_SCRAMBLING
	.comm	_TRANS_DDI_HIGH_TMDS_CHAR_RATE,4,2 ; @TRANS_DDI_HIGH_TMDS_CHAR_RATE
	.comm	_INTEL_OUTPUT_ANALOG,4,2        ; @INTEL_OUTPUT_ANALOG
	.comm	_TRANS_DDI_MODE_SELECT_FDI,4,2  ; @TRANS_DDI_MODE_SELECT_FDI
	.comm	_INTEL_OUTPUT_DP_MST,4,2        ; @INTEL_OUTPUT_DP_MST
	.comm	_TRANS_DDI_MODE_SELECT_DP_MST,4,2 ; @TRANS_DDI_MODE_SELECT_DP_MST
	.comm	_TRANS_DDI_MODE_SELECT_DP_SST,4,2 ; @TRANS_DDI_MODE_SELECT_DP_SST
.subsections_via_symbols
