	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smu8_smu_init
_smu8_smu_init:                         ## @smu8_smu_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$48, %edi
	callq	_kzalloc
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	%rax, %r15
	movq	%rax, 8(%r14)
	movl	$4096, (%rax)                   ## imm = 0x1000
	movq	_UCODE_ID_RLC_SCRATCH_SIZE_BYTE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$32, %esi
	callq	_ALIGN
	movl	%eax, %r12d
	movq	_UCODE_ID_RLC_SRM_ARAM_SIZE_BYTE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$32, %esi
	callq	_ALIGN
	movl	%eax, %r13d
	addl	%r12d, %r13d
	movq	_UCODE_ID_RLC_SRM_DRAM_SIZE_BYTE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$32, %esi
	callq	_ALIGN
	movl	%eax, %r12d
	addl	%r13d, %r12d
	movl	$4, %edi
	movl	$32, %esi
	callq	_ALIGN
	movl	%eax, %ebx
	addl	%r12d, %ebx
	movl	$4, %edi
	movl	$32, %esi
	callq	_ALIGN
	addl	%ebx, %eax
	movl	%eax, 16(%r15)
	movq	%r14, -48(%rbp)                 ## 8-byte Spill
	movq	(%r14), %rdi
	movl	(%r15), %esi
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %r14
	movl	(%r14), %ecx
	leaq	12(%r15), %rbx
	leaq	8(%r15), %r12
	leaq	4(%r15), %r13
	movq	%r13, (%rsp)
	movq	%rbx, %r8
	movq	%r12, %r9
	callq	_amdgpu_bo_create_kernel
	testl	%eax, %eax
	jne	LBB0_12
## %bb.3:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rdi
	movl	16(%r15), %esi
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r14), %ecx
	leaq	28(%r15), %r8
	leaq	24(%r15), %r9
	movq	%r15, %r14
	addq	$20, %r14
	movq	%r14, (%rsp)
	movq	%r8, -72(%rbp)                  ## 8-byte Spill
	movq	%r9, -64(%rbp)                  ## 8-byte Spill
	callq	_amdgpu_bo_create_kernel
	testl	%eax, %eax
	jne	LBB0_11
## %bb.4:
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movq	_SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SCRATCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_UCODE_ID_RLC_SCRATCH_SIZE_BYTE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movslq	32(%r15), %rcx
	leal	1(%rcx), %eax
	movl	%eax, 32(%r15)
	shlq	$2, %rcx
	addq	40(%r15), %rcx
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movq	%r14, %rdi
	callq	_smu8_smu_populate_single_scratch_entry
	testq	%rax, %rax
	jne	LBB0_10
## %bb.5:
	movq	_SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_ARAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_UCODE_ID_RLC_SRM_ARAM_SIZE_BYTE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movslq	32(%r15), %rcx
	leal	1(%rcx), %eax
	movl	%eax, 32(%r15)
	shlq	$2, %rcx
	addq	40(%r15), %rcx
	movq	%r14, %rdi
	callq	_smu8_smu_populate_single_scratch_entry
	testq	%rax, %rax
	jne	LBB0_10
## %bb.6:
	movq	_SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_DRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_UCODE_ID_RLC_SRM_DRAM_SIZE_BYTE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movslq	32(%r15), %rcx
	leal	1(%rcx), %eax
	movl	%eax, 32(%r15)
	shlq	$2, %rcx
	addq	40(%r15), %rcx
	movq	%r14, %rdi
	callq	_smu8_smu_populate_single_scratch_entry
	testq	%rax, %rax
	jne	LBB0_10
## %bb.7:
	movq	_SMU8_SCRATCH_ENTRY_UCODE_ID_POWER_PROFILING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movslq	32(%r15), %rcx
	leal	1(%rcx), %eax
	movl	%eax, 32(%r15)
	shlq	$2, %rcx
	addq	40(%r15), %rcx
	movq	%r14, %rdi
	movl	$4, %edx
	callq	_smu8_smu_populate_single_scratch_entry
	testq	%rax, %rax
	jne	LBB0_10
## %bb.8:
	movq	_SMU8_SCRATCH_ENTRY_SMU8_FUSION_CLKTABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movslq	32(%r15), %rcx
	leal	1(%rcx), %eax
	movl	%eax, 32(%r15)
	shlq	$2, %rcx
	addq	40(%r15), %rcx
	movq	%r14, %rdi
	movl	$4, %edx
	callq	_smu8_smu_populate_single_scratch_entry
	testq	%rax, %rax
	je	LBB0_9
LBB0_10:
	leaq	L_.str(%rip), %rdi
	callq	_pr_err
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	movq	-64(%rbp), %rsi                 ## 8-byte Reload
	movq	-56(%rbp), %rdx                 ## 8-byte Reload
	callq	_amdgpu_bo_free_kernel
LBB0_11:
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	callq	_amdgpu_bo_free_kernel
LBB0_12:
	movq	%r15, %rdi
	callq	_kfree
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	jmp	LBB0_13
LBB0_1:
	movq	_ENOMEM@GOTPCREL(%rip), %rcx
LBB0_13:
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_14:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_9:
	xorl	%eax, %eax
	jmp	LBB0_14
	.cfi_endproc
                                        ## -- End function
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_UCODE_ID_RLC_SCRATCH_SIZE_BYTE,4,2 ## @UCODE_ID_RLC_SCRATCH_SIZE_BYTE
	.comm	_UCODE_ID_RLC_SRM_ARAM_SIZE_BYTE,4,2 ## @UCODE_ID_RLC_SRM_ARAM_SIZE_BYTE
	.comm	_UCODE_ID_RLC_SRM_DRAM_SIZE_BYTE,4,2 ## @UCODE_ID_RLC_SRM_DRAM_SIZE_BYTE
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ## @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SCRATCH,4,2 ## @SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SCRATCH
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Error when Populate Firmware Entry.\n"

	.comm	_SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_ARAM,4,2 ## @SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_ARAM
	.comm	_SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_DRAM,4,2 ## @SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_DRAM
	.comm	_SMU8_SCRATCH_ENTRY_UCODE_ID_POWER_PROFILING,4,2 ## @SMU8_SCRATCH_ENTRY_UCODE_ID_POWER_PROFILING
	.comm	_SMU8_SCRATCH_ENTRY_SMU8_FUSION_CLKTABLE,4,2 ## @SMU8_SCRATCH_ENTRY_SMU8_FUSION_CLKTABLE
	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_smu8_smu_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smu8_smu_init
_smu8_smu_init:                         ; @smu8_smu_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x0
Lloh0:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	w0, #48
	bl	_kzalloc
	cbz	x0, LBB0_11
; %bb.1:
	mov	x19, x0
	str	x0, [x20, #8]
	mov	w8, #4096
	str	w8, [x0]
Lloh3:
	adrp	x24, _UCODE_ID_RLC_SCRATCH_SIZE_BYTE@GOTPAGE
Lloh4:
	ldr	x24, [x24, _UCODE_ID_RLC_SCRATCH_SIZE_BYTE@GOTPAGEOFF]
	ldr	w0, [x24]
	mov	w1, #32
	bl	_ALIGN
	mov	x21, x0
Lloh5:
	adrp	x28, _UCODE_ID_RLC_SRM_ARAM_SIZE_BYTE@GOTPAGE
Lloh6:
	ldr	x28, [x28, _UCODE_ID_RLC_SRM_ARAM_SIZE_BYTE@GOTPAGEOFF]
	ldr	w0, [x28]
	mov	w1, #32
	bl	_ALIGN
	add	w21, w0, w21
Lloh7:
	adrp	x8, _UCODE_ID_RLC_SRM_DRAM_SIZE_BYTE@GOTPAGE
Lloh8:
	ldr	x8, [x8, _UCODE_ID_RLC_SRM_DRAM_SIZE_BYTE@GOTPAGEOFF]
Lloh9:
	ldr	w0, [x8]
	mov	w1, #32
	bl	_ALIGN
	add	w21, w21, w0
	mov	w0, #4
	mov	w1, #32
	bl	_ALIGN
	add	w21, w21, w0
	mov	w0, #4
	mov	w1, #32
	bl	_ALIGN
	add	w8, w21, w0
	str	w8, [x19, #16]
	ldr	x0, [x20]
	ldr	w1, [x19]
Lloh10:
	adrp	x26, _PAGE_SIZE@GOTPAGE
Lloh11:
	ldr	x26, [x26, _PAGE_SIZE@GOTPAGEOFF]
	ldr	w2, [x26]
Lloh12:
	adrp	x25, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGE
Lloh13:
	ldr	x25, [x25, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGEOFF]
	ldr	w3, [x25]
	add	x21, x19, #12
	add	x22, x19, #8
	add	x23, x19, #4
	mov	x4, x21
	mov	x5, x22
	mov	x6, x23
	bl	_amdgpu_bo_create_kernel
	cbnz	w0, LBB0_10
; %bb.2:
	ldr	x0, [x20]
	ldr	w1, [x19, #16]
	ldr	w2, [x26]
	add	x8, x19, #28
	add	x26, x19, #24
	add	x27, x19, #20
	ldr	w3, [x25]
	mov	x25, x8
	mov	x4, x8
	mov	x5, x26
	mov	x6, x27
	bl	_amdgpu_bo_create_kernel
	cbnz	w0, LBB0_9
; %bb.3:
	stp	x27, x26, [sp]                  ; 16-byte Folded Spill
Lloh14:
	adrp	x8, _SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SCRATCH@GOTPAGE
Lloh15:
	ldr	x8, [x8, _SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SCRATCH@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	ldr	w2, [x24]
	ldr	x8, [x19, #40]
	ldrsw	x9, [x19, #32]
	add	w10, w9, #1
	str	w10, [x19, #32]
	add	x3, x8, x9, lsl #2
	mov	x0, x20
	bl	_smu8_smu_populate_single_scratch_entry
	cbnz	x0, LBB0_8
; %bb.4:
Lloh17:
	adrp	x8, _SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_ARAM@GOTPAGE
Lloh18:
	ldr	x8, [x8, _SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_ARAM@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	ldr	w2, [x28]
	ldr	x8, [x19, #40]
	ldrsw	x9, [x19, #32]
	add	w10, w9, #1
	str	w10, [x19, #32]
	add	x3, x8, x9, lsl #2
	mov	x0, x20
	bl	_smu8_smu_populate_single_scratch_entry
	cbnz	x0, LBB0_8
; %bb.5:
Lloh20:
	adrp	x8, _SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_DRAM@GOTPAGE
Lloh21:
	ldr	x8, [x8, _SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_DRAM@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
Lloh23:
	adrp	x8, _UCODE_ID_RLC_SRM_DRAM_SIZE_BYTE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _UCODE_ID_RLC_SRM_DRAM_SIZE_BYTE@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	ldr	x8, [x19, #40]
	ldrsw	x9, [x19, #32]
	add	w10, w9, #1
	str	w10, [x19, #32]
	add	x3, x8, x9, lsl #2
	mov	x0, x20
	bl	_smu8_smu_populate_single_scratch_entry
	cbnz	x0, LBB0_8
; %bb.6:
Lloh26:
	adrp	x8, _SMU8_SCRATCH_ENTRY_UCODE_ID_POWER_PROFILING@GOTPAGE
Lloh27:
	ldr	x8, [x8, _SMU8_SCRATCH_ENTRY_UCODE_ID_POWER_PROFILING@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	ldr	x8, [x19, #40]
	ldrsw	x9, [x19, #32]
	add	w10, w9, #1
	str	w10, [x19, #32]
	add	x3, x8, x9, lsl #2
	mov	x0, x20
	mov	w2, #4
	bl	_smu8_smu_populate_single_scratch_entry
	cbnz	x0, LBB0_8
; %bb.7:
Lloh29:
	adrp	x8, _SMU8_SCRATCH_ENTRY_SMU8_FUSION_CLKTABLE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _SMU8_SCRATCH_ENTRY_SMU8_FUSION_CLKTABLE@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	ldr	x8, [x19, #40]
	ldrsw	x9, [x19, #32]
	add	w10, w9, #1
	str	w10, [x19, #32]
	add	x3, x8, x9, lsl #2
	mov	x0, x20
	mov	w2, #4
	bl	_smu8_smu_populate_single_scratch_entry
	cbz	x0, LBB0_13
LBB0_8:
Lloh32:
	adrp	x0, l_.str@PAGE
Lloh33:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_err
	mov	x0, x25
	ldp	x2, x1, [sp]                    ; 16-byte Folded Reload
	bl	_amdgpu_bo_free_kernel
LBB0_9:
	mov	x0, x21
	mov	x1, x22
	mov	x2, x23
	bl	_amdgpu_bo_free_kernel
LBB0_10:
	mov	x0, x19
	bl	_kfree
Lloh34:
	adrp	x8, _EINVAL@GOTPAGE
Lloh35:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_12
LBB0_11:
Lloh36:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh37:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
LBB0_12:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_13:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh36, Lloh37
	.cfi_endproc
                                        ; -- End function
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_UCODE_ID_RLC_SCRATCH_SIZE_BYTE,4,2 ; @UCODE_ID_RLC_SCRATCH_SIZE_BYTE
	.comm	_UCODE_ID_RLC_SRM_ARAM_SIZE_BYTE,4,2 ; @UCODE_ID_RLC_SRM_ARAM_SIZE_BYTE
	.comm	_UCODE_ID_RLC_SRM_DRAM_SIZE_BYTE,4,2 ; @UCODE_ID_RLC_SRM_DRAM_SIZE_BYTE
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ; @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SCRATCH,4,2 ; @SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SCRATCH
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Error when Populate Firmware Entry.\n"

	.comm	_SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_ARAM,4,2 ; @SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_ARAM
	.comm	_SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_DRAM,4,2 ; @SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_DRAM
	.comm	_SMU8_SCRATCH_ENTRY_UCODE_ID_POWER_PROFILING,4,2 ; @SMU8_SCRATCH_ENTRY_UCODE_ID_POWER_PROFILING
	.comm	_SMU8_SCRATCH_ENTRY_SMU8_FUSION_CLKTABLE,4,2 ; @SMU8_SCRATCH_ENTRY_SMU8_FUSION_CLKTABLE
	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_smu8_smu_init
.subsections_via_symbols
