	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pl08x_terminate_phy_chan
_pl08x_terminate_phy_chan:              ## @pl08x_terminate_phy_chan
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %r14
	movq	24(%rsi), %rbx
	movq	8(%rsi), %rdi
	callq	_readl
	testq	%rbx, %rbx
	je	LBB0_2
## %bb.1:
	movq	_FTDMAC020_CH_CFG_INT_ABT_MASK@GOTPCREL(%rip), %rcx
	movq	_FTDMAC020_CH_CFG_INT_ERR_MASK@GOTPCREL(%rip), %rdx
	orl	(%rcx), %eax
	orl	(%rdx), %eax
	movq	_FTDMAC020_CH_CFG_INT_TC_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	8(%r12), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	16(%r12), %rdi
	callq	_readl
	movq	_FTDMAC020_CH_CSR_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	movq	_FTDMAC020_CH_CSR_ABT@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	16(%r12), %rsi
	callq	_writel
	movq	(%r12), %rdi
	callq	_BIT
	movl	%eax, %r15d
	movq	(%r12), %rdi
	addq	$16, %rdi
	callq	_BIT
	orl	%r15d, %eax
	jmp	LBB0_3
LBB0_2:
	movq	_PL080_CONFIG_ENABLE@GOTPCREL(%rip), %rcx
	movq	_PL080_CONFIG_ERR_IRQ_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movq	_PL080_CONFIG_TC_IRQ_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	notl	%edx
	andl	%edx, %eax
	movq	8(%r12), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	(%r12), %rdi
	callq	_BIT
LBB0_3:
	movq	_PL080_ERR_CLEAR@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%r14), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	(%r12), %rdi
	callq	_BIT
	movq	_PL080_TC_CLEAR@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%r14), %rsi
	movl	%eax, %edi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_writel                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_FTDMAC020_CH_CFG_INT_ABT_MASK,4,2 ## @FTDMAC020_CH_CFG_INT_ABT_MASK
	.comm	_FTDMAC020_CH_CFG_INT_ERR_MASK,4,2 ## @FTDMAC020_CH_CFG_INT_ERR_MASK
	.comm	_FTDMAC020_CH_CFG_INT_TC_MASK,4,2 ## @FTDMAC020_CH_CFG_INT_TC_MASK
	.comm	_FTDMAC020_CH_CSR_EN,4,2        ## @FTDMAC020_CH_CSR_EN
	.comm	_FTDMAC020_CH_CSR_ABT,4,2       ## @FTDMAC020_CH_CSR_ABT
	.comm	_PL080_ERR_CLEAR,8,3            ## @PL080_ERR_CLEAR
	.comm	_PL080_TC_CLEAR,8,3             ## @PL080_TC_CLEAR
	.comm	_PL080_CONFIG_ENABLE,4,2        ## @PL080_CONFIG_ENABLE
	.comm	_PL080_CONFIG_ERR_IRQ_MASK,4,2  ## @PL080_CONFIG_ERR_IRQ_MASK
	.comm	_PL080_CONFIG_TC_IRQ_MASK,4,2   ## @PL080_CONFIG_TC_IRQ_MASK
	.no_dead_strip	_pl08x_terminate_phy_chan
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pl08x_terminate_phy_chan
_pl08x_terminate_phy_chan:              ; @pl08x_terminate_phy_chan
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	ldr	x21, [x1, #24]
	ldr	x0, [x1, #8]
	bl	_readl
	cbz	x21, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _FTDMAC020_CH_CFG_INT_ABT_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FTDMAC020_CH_CFG_INT_ABT_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _FTDMAC020_CH_CFG_INT_ERR_MASK@GOTPAGE
Lloh4:
	ldr	x9, [x9, _FTDMAC020_CH_CFG_INT_ERR_MASK@GOTPAGEOFF]
Lloh5:
	adrp	x10, _FTDMAC020_CH_CFG_INT_TC_MASK@GOTPAGE
Lloh6:
	ldr	x10, [x10, _FTDMAC020_CH_CFG_INT_TC_MASK@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
Lloh8:
	ldr	w10, [x10]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w0, w8, w10
	ldr	x1, [x20, #8]
	bl	_writel
	ldr	x0, [x20, #16]
	bl	_readl
Lloh9:
	adrp	x8, _FTDMAC020_CH_CSR_EN@GOTPAGE
Lloh10:
	ldr	x8, [x8, _FTDMAC020_CH_CSR_EN@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh12:
	adrp	x9, _FTDMAC020_CH_CSR_ABT@GOTPAGE
Lloh13:
	ldr	x9, [x9, _FTDMAC020_CH_CSR_ABT@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w0, w8, w9
	ldr	x1, [x20, #16]
	bl	_writel
	ldr	x0, [x20]
	bl	_BIT
	mov	x21, x0
	ldr	x8, [x20]
	add	x0, x8, #16
	bl	_BIT
	orr	w0, w0, w21
	b	LBB0_3
LBB0_2:
Lloh15:
	adrp	x8, _PL080_CONFIG_ENABLE@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PL080_CONFIG_ENABLE@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
Lloh18:
	adrp	x9, _PL080_CONFIG_ERR_IRQ_MASK@GOTPAGE
Lloh19:
	ldr	x9, [x9, _PL080_CONFIG_ERR_IRQ_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh21:
	adrp	x9, _PL080_CONFIG_TC_IRQ_MASK@GOTPAGE
Lloh22:
	ldr	x9, [x9, _PL080_CONFIG_TC_IRQ_MASK@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	orr	w8, w8, w9
	bic	w0, w0, w8
	ldr	x1, [x20, #8]
	bl	_writel
	ldr	x0, [x20]
	bl	_BIT
LBB0_3:
	ldr	x8, [x19]
Lloh24:
	adrp	x9, _PL080_ERR_CLEAR@GOTPAGE
Lloh25:
	ldr	x9, [x9, _PL080_ERR_CLEAR@GOTPAGEOFF]
Lloh26:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	x0, [x20]
	bl	_BIT
	ldr	x8, [x19]
Lloh27:
	adrp	x9, _PL080_TC_CLEAR@GOTPAGE
Lloh28:
	ldr	x9, [x9, _PL080_TC_CLEAR@GOTPAGEOFF]
Lloh29:
	ldr	x9, [x9]
	add	x1, x9, x8
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_writel
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_FTDMAC020_CH_CFG_INT_ABT_MASK,4,2 ; @FTDMAC020_CH_CFG_INT_ABT_MASK
	.comm	_FTDMAC020_CH_CFG_INT_ERR_MASK,4,2 ; @FTDMAC020_CH_CFG_INT_ERR_MASK
	.comm	_FTDMAC020_CH_CFG_INT_TC_MASK,4,2 ; @FTDMAC020_CH_CFG_INT_TC_MASK
	.comm	_FTDMAC020_CH_CSR_EN,4,2        ; @FTDMAC020_CH_CSR_EN
	.comm	_FTDMAC020_CH_CSR_ABT,4,2       ; @FTDMAC020_CH_CSR_ABT
	.comm	_PL080_ERR_CLEAR,8,3            ; @PL080_ERR_CLEAR
	.comm	_PL080_TC_CLEAR,8,3             ; @PL080_TC_CLEAR
	.comm	_PL080_CONFIG_ENABLE,4,2        ; @PL080_CONFIG_ENABLE
	.comm	_PL080_CONFIG_ERR_IRQ_MASK,4,2  ; @PL080_CONFIG_ERR_IRQ_MASK
	.comm	_PL080_CONFIG_TC_IRQ_MASK,4,2   ; @PL080_CONFIG_TC_IRQ_MASK
	.no_dead_strip	_pl08x_terminate_phy_chan
.subsections_via_symbols
