	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pp_atomfwctrl_get_clk_information_by_clkid ## -- Begin function pp_atomfwctrl_get_clk_information_by_clkid
	.p2align	4, 0x90
_pp_atomfwctrl_get_clk_information_by_clkid: ## @pp_atomfwctrl_get_clk_information_by_clkid
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$32, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rcx, %r14
	movq	(%rdi), %rbx
	movq	%rsi, -24(%rbp)
	movq	%rdx, -32(%rbp)
	movq	_GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -40(%rbp)
	movq	$0, -48(%rbp)
	movq	_getsmuclockinfo@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GetIndexIntoMasterCmdTable
	movl	(%rbx), %edi
	leaq	-48(%rbp), %rdx
	movl	%eax, %esi
	callq	_amdgpu_atom_execute_table
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_3
LBB0_2:
	movl	-48(%rbp), %edi
	callq	_le32_to_cpu
	cltq
	imulq	$1759218605, %rax, %rax         ## imm = 0x68DB8BAD
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$44, %rax
	addl	%ecx, %eax
	movl	%eax, (%r14)
	xorl	%eax, %eax
LBB0_3:
	addq	$32, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ,4,2 ## @GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ
	.comm	_getsmuclockinfo,4,2            ## @getsmuclockinfo
	.comm	_EINVAL,4,2                     ## @EINVAL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pp_atomfwctrl_get_clk_information_by_clkid ; -- Begin function pp_atomfwctrl_get_clk_information_by_clkid
	.p2align	2
_pp_atomfwctrl_get_clk_information_by_clkid: ; @pp_atomfwctrl_get_clk_information_by_clkid
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x3
	ldr	x20, [x0]
	stp	x2, x1, [sp, #16]
Lloh0:
	adrp	x8, _GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [sp, #8]
	str	xzr, [sp]
Lloh3:
	adrp	x8, _getsmuclockinfo@GOTPAGE
Lloh4:
	ldr	x8, [x8, _getsmuclockinfo@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	_GetIndexIntoMasterCmdTable
	mov	x1, x0
	ldr	w0, [x20]
	mov	x2, sp
	bl	_amdgpu_atom_execute_table
	cbz	x0, LBB0_2
; %bb.1:
Lloh6:
	adrp	x8, _EINVAL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_3
LBB0_2:
	ldr	w0, [sp]
	bl	_le32_to_cpu
	mov	x8, x0
	mov	w0, #0
	mov	w9, #35757
	movk	w9, #26843, lsl #16
	smull	x8, w8, w9
	lsr	x9, x8, #63
	asr	x8, x8, #44
	add	w8, w8, w9
	str	w8, [x19]
LBB0_3:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ,4,2 ; @GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ
	.comm	_getsmuclockinfo,4,2            ; @getsmuclockinfo
	.comm	_EINVAL,4,2                     ; @EINVAL
.subsections_via_symbols
