	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_gvt_schedule             ## -- Begin function intel_gvt_schedule
	.p2align	4, 0x90
_intel_gvt_schedule:                    ## @intel_gvt_schedule
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	16(%rdi), %r14
	callq	_mutex_lock
	xorl	%eax, %eax
	callq	_ktime_get
	movq	%rax, %r15
	movq	_INTEL_GVT_REQUEST_SCHED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	24(%rbx), %r12
	movq	%r12, %rsi
	callq	_test_and_clear_bit
	testq	%rax, %rax
	je	LBB0_3
## %bb.1:
	cmpq	(%r14), %r15
	jl	LBB0_3
## %bb.2:
	movq	%r14, %rdi
	callq	_gvt_balance_timeslice
	movq	_GVT_TS_BALANCE_PERIOD_MS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_ktime_add_ms
	movq	%rax, (%r14)
LBB0_3:
	movq	_INTEL_GVT_REQUEST_EVENT_SCHED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%r12, %rsi
	callq	_clear_bit
	movl	8(%rbx), %edi
	movq	%r15, %rsi
	callq	_vgpu_update_timeslice
	movq	%r14, %rdi
	callq	_tbs_sched_func
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mutex_unlock                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_GVT_REQUEST_SCHED,4,2    ## @INTEL_GVT_REQUEST_SCHED
	.comm	_GVT_TS_BALANCE_PERIOD_MS,4,2   ## @GVT_TS_BALANCE_PERIOD_MS
	.comm	_INTEL_GVT_REQUEST_EVENT_SCHED,4,2 ## @INTEL_GVT_REQUEST_EVENT_SCHED
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_gvt_schedule             ; -- Begin function intel_gvt_schedule
	.p2align	2
_intel_gvt_schedule:                    ; @intel_gvt_schedule
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0, #16]
	bl	_mutex_lock
	bl	_ktime_get
	mov	x21, x0
Lloh0:
	adrp	x8, _INTEL_GVT_REQUEST_SCHED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_GVT_REQUEST_SCHED@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	add	x22, x19, #24
	mov	x1, x22
	bl	_test_and_clear_bit
	cbz	x0, LBB0_3
; %bb.1:
	ldr	x8, [x20]
	cmp	x21, x8
	b.lt	LBB0_3
; %bb.2:
	mov	x0, x20
	bl	_gvt_balance_timeslice
Lloh3:
	adrp	x8, _GVT_TS_BALANCE_PERIOD_MS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GVT_TS_BALANCE_PERIOD_MS@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_ktime_add_ms
	str	x0, [x20]
LBB0_3:
Lloh6:
	adrp	x8, _INTEL_GVT_REQUEST_EVENT_SCHED@GOTPAGE
Lloh7:
	ldr	x8, [x8, _INTEL_GVT_REQUEST_EVENT_SCHED@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	mov	x1, x22
	bl	_clear_bit
	ldr	w0, [x19, #8]
	mov	x1, x21
	bl	_vgpu_update_timeslice
	mov	x0, x20
	bl	_tbs_sched_func
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_mutex_unlock
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_GVT_REQUEST_SCHED,4,2    ; @INTEL_GVT_REQUEST_SCHED
	.comm	_GVT_TS_BALANCE_PERIOD_MS,4,2   ; @GVT_TS_BALANCE_PERIOD_MS
	.comm	_INTEL_GVT_REQUEST_EVENT_SCHED,4,2 ; @INTEL_GVT_REQUEST_EVENT_SCHED
.subsections_via_symbols
