	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hdmi_v14_mode_apply
_hdmi_v14_mode_apply:                   ## @hdmi_v14_mode_apply
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %rax
	movq	(%rax), %r12
	movl	36(%r12), %ecx
	movl	40(%r12), %eax
	xorl	%r14d, %r14d
	cmpl	(%r12), %ecx
	je	LBB0_5
## %bb.1:
	cmpl	$1024, %eax                     ## imm = 0x400
	je	LBB0_4
## %bb.2:
	cmpl	$1366, %eax                     ## imm = 0x556
	je	LBB0_4
## %bb.3:
	cmpl	$1280, %eax                     ## imm = 0x500
	jne	LBB0_5
LBB0_4:
	movl	$258, %r14d                     ## imm = 0x102
LBB0_5:
	movq	_HDMI_H_BLANK_0@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	44(%r12), %ecx
	subl	%eax, %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V_LINE_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_H_LINE_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	44(%r12), %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_HSYNC_POL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DRM_MODE_FLAG_NHSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	andl	52(%r12), %eax
	setne	%cl
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_VSYNC_POL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DRM_MODE_FLAG_NVSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	andl	52(%r12), %eax
	setne	%cl
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_INT_PRO_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DRM_MODE_FLAG_INTERLACE@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	xorl	%ecx, %ecx
	andl	52(%r12), %eax
	setne	%cl
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	_hdmi_reg_writev
	movl	(%r15), %eax
	movl	56(%r12), %ecx
	subl	36(%r12), %ecx
	movq	_HDMI_V_SYNC_LINE_BEF_2_0@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	testl	%eax, 52(%r12)
	je	LBB0_7
## %bb.6:
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	%eax, %ecx
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_BEF_1_0@GOTPCREL(%rip), %rax
	movl	60(%r12), %edx
	subl	36(%r12), %edx
	movl	(%rax), %esi
	movl	%edx, %ecx
	shrl	$31, %ecx
	addl	%edx, %ecx
	sarl	%ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V2_BLANK_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V1_BLANK_0@GOTPCREL(%rip), %rax
	movl	48(%r12), %edx
	subl	36(%r12), %edx
	movl	(%rax), %esi
	movl	%edx, %ecx
	shrl	$31, %ecx
	addl	%edx, %ecx
	sarl	%ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V_BLANK_F0_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	36(%r12), %eax
	movl	48(%r12), %ecx
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	subl	%edx, %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V_BLANK_F1_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_2_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	addl	$7, %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_1_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	addl	$2, %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_PXL_2_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	44(%r12), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	addl	64(%r12), %ecx
	subl	40(%r12), %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_PXL_1_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	44(%r12), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	addl	64(%r12), %ecx
	subl	40(%r12), %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_VACT_ST_L@GOTPCREL(%rip), %rax
	movl	48(%r12), %edx
	subl	36(%r12), %edx
	movl	(%rax), %esi
	movl	%edx, %ecx
	shrl	$31, %ecx
	addl	%edx, %ecx
	sarl	%ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_VACT_SZ_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	36(%r12), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_VACT_ST2_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	36(%r12), %eax
	movl	48(%r12), %ecx
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	subl	%edx, %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_VSYNC2_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	incl	%ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_VSYNC_BOT_HDMI_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	incl	%ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_FIELD_BOT_HDMI_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	incl	%ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_VACT_ST3_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%r15d, %r15d
	movq	%rbx, %rdi
	movl	$2, %edx
	xorl	%ecx, %ecx
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_VACT_ST4_L@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_7:
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_BEF_1_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	60(%r12), %ecx
	subl	36(%r12), %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V2_BLANK_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V1_BLANK_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %ecx
	subl	36(%r12), %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_V_BLANK_F0_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_BLANK_F1_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_2_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_1_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_PXL_2_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_PXL_1_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_VACT_ST_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %ecx
	subl	36(%r12), %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movl	36(%r12), %r15d
	movq	_HDMI_TG_VACT_SZ_L@GOTPCREL(%rip), %rax
LBB0_8:
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	%r15d, %ecx
	callq	_hdmi_reg_writev
	movq	_HDMI_H_SYNC_START_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	64(%r12), %ecx
	subl	40(%r12), %ecx
	addl	$-2, %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_H_SYNC_END_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	68(%r12), %ecx
	subl	40(%r12), %ecx
	addl	$-2, %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_VACT_SPACE_1_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_VACT_SPACE_2_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_VACT_SPACE_3_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_VACT_SPACE_4_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_VACT_SPACE_5_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_VACT_SPACE_6_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_BLANK_F2_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_BLANK_F3_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_BLANK_F4_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_BLANK_F5_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_3_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_4_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_5_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_6_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_PXL_3_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_PXL_4_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_PXL_5_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_V_SYNC_LINE_AFT_PXL_6_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	$65535, %ecx                    ## imm = 0xFFFF
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_H_FSZ_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	44(%r12), %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_HACT_ST_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	44(%r12), %ecx
	movl	40(%r12), %eax
	addl	%r14d, %eax
	subl	%eax, %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_HACT_SZ_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	40(%r12), %r14d
	movq	%rbx, %rdi
	movl	$2, %edx
	movl	%r14d, %ecx
	callq	_hdmi_reg_writev
	movq	_HDMI_TG_V_FSZ_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	48(%r12), %ecx
	movq	%rbx, %rdi
	movl	$2, %edx
	callq	_hdmi_reg_writev
	movq	(%rbx), %rax
	cmpq	_exynos5433_hdmi_driver_data@GOTPCREL(%rip), %rax
	je	LBB0_10
## %bb.9:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	movq	_HDMI_TG_DECON_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_hdmi_reg_writeb                ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_HDMI_H_BLANK_0,4,2             ## @HDMI_H_BLANK_0
	.comm	_HDMI_V_LINE_0,4,2              ## @HDMI_V_LINE_0
	.comm	_HDMI_H_LINE_0,4,2              ## @HDMI_H_LINE_0
	.comm	_HDMI_HSYNC_POL,4,2             ## @HDMI_HSYNC_POL
	.comm	_DRM_MODE_FLAG_NHSYNC,4,2       ## @DRM_MODE_FLAG_NHSYNC
	.comm	_HDMI_VSYNC_POL,4,2             ## @HDMI_VSYNC_POL
	.comm	_DRM_MODE_FLAG_NVSYNC,4,2       ## @DRM_MODE_FLAG_NVSYNC
	.comm	_HDMI_INT_PRO_MODE,4,2          ## @HDMI_INT_PRO_MODE
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ## @DRM_MODE_FLAG_INTERLACE
	.comm	_HDMI_V_SYNC_LINE_BEF_2_0,4,2   ## @HDMI_V_SYNC_LINE_BEF_2_0
	.comm	_HDMI_V_SYNC_LINE_BEF_1_0,4,2   ## @HDMI_V_SYNC_LINE_BEF_1_0
	.comm	_HDMI_V2_BLANK_0,4,2            ## @HDMI_V2_BLANK_0
	.comm	_HDMI_V1_BLANK_0,4,2            ## @HDMI_V1_BLANK_0
	.comm	_HDMI_V_BLANK_F0_0,4,2          ## @HDMI_V_BLANK_F0_0
	.comm	_HDMI_V_BLANK_F1_0,4,2          ## @HDMI_V_BLANK_F1_0
	.comm	_HDMI_V_SYNC_LINE_AFT_2_0,4,2   ## @HDMI_V_SYNC_LINE_AFT_2_0
	.comm	_HDMI_V_SYNC_LINE_AFT_1_0,4,2   ## @HDMI_V_SYNC_LINE_AFT_1_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_2_0,4,2 ## @HDMI_V_SYNC_LINE_AFT_PXL_2_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_1_0,4,2 ## @HDMI_V_SYNC_LINE_AFT_PXL_1_0
	.comm	_HDMI_TG_VACT_ST_L,4,2          ## @HDMI_TG_VACT_ST_L
	.comm	_HDMI_TG_VACT_SZ_L,4,2          ## @HDMI_TG_VACT_SZ_L
	.comm	_HDMI_TG_VACT_ST2_L,4,2         ## @HDMI_TG_VACT_ST2_L
	.comm	_HDMI_TG_VSYNC2_L,4,2           ## @HDMI_TG_VSYNC2_L
	.comm	_HDMI_TG_VSYNC_BOT_HDMI_L,4,2   ## @HDMI_TG_VSYNC_BOT_HDMI_L
	.comm	_HDMI_TG_FIELD_BOT_HDMI_L,4,2   ## @HDMI_TG_FIELD_BOT_HDMI_L
	.comm	_HDMI_TG_VACT_ST3_L,4,2         ## @HDMI_TG_VACT_ST3_L
	.comm	_HDMI_TG_VACT_ST4_L,4,2         ## @HDMI_TG_VACT_ST4_L
	.comm	_HDMI_H_SYNC_START_0,4,2        ## @HDMI_H_SYNC_START_0
	.comm	_HDMI_H_SYNC_END_0,4,2          ## @HDMI_H_SYNC_END_0
	.comm	_HDMI_VACT_SPACE_1_0,4,2        ## @HDMI_VACT_SPACE_1_0
	.comm	_HDMI_VACT_SPACE_2_0,4,2        ## @HDMI_VACT_SPACE_2_0
	.comm	_HDMI_VACT_SPACE_3_0,4,2        ## @HDMI_VACT_SPACE_3_0
	.comm	_HDMI_VACT_SPACE_4_0,4,2        ## @HDMI_VACT_SPACE_4_0
	.comm	_HDMI_VACT_SPACE_5_0,4,2        ## @HDMI_VACT_SPACE_5_0
	.comm	_HDMI_VACT_SPACE_6_0,4,2        ## @HDMI_VACT_SPACE_6_0
	.comm	_HDMI_V_BLANK_F2_0,4,2          ## @HDMI_V_BLANK_F2_0
	.comm	_HDMI_V_BLANK_F3_0,4,2          ## @HDMI_V_BLANK_F3_0
	.comm	_HDMI_V_BLANK_F4_0,4,2          ## @HDMI_V_BLANK_F4_0
	.comm	_HDMI_V_BLANK_F5_0,4,2          ## @HDMI_V_BLANK_F5_0
	.comm	_HDMI_V_SYNC_LINE_AFT_3_0,4,2   ## @HDMI_V_SYNC_LINE_AFT_3_0
	.comm	_HDMI_V_SYNC_LINE_AFT_4_0,4,2   ## @HDMI_V_SYNC_LINE_AFT_4_0
	.comm	_HDMI_V_SYNC_LINE_AFT_5_0,4,2   ## @HDMI_V_SYNC_LINE_AFT_5_0
	.comm	_HDMI_V_SYNC_LINE_AFT_6_0,4,2   ## @HDMI_V_SYNC_LINE_AFT_6_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_3_0,4,2 ## @HDMI_V_SYNC_LINE_AFT_PXL_3_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_4_0,4,2 ## @HDMI_V_SYNC_LINE_AFT_PXL_4_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_5_0,4,2 ## @HDMI_V_SYNC_LINE_AFT_PXL_5_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_6_0,4,2 ## @HDMI_V_SYNC_LINE_AFT_PXL_6_0
	.comm	_HDMI_TG_H_FSZ_L,4,2            ## @HDMI_TG_H_FSZ_L
	.comm	_HDMI_TG_HACT_ST_L,4,2          ## @HDMI_TG_HACT_ST_L
	.comm	_HDMI_TG_HACT_SZ_L,4,2          ## @HDMI_TG_HACT_SZ_L
	.comm	_HDMI_TG_V_FSZ_L,4,2            ## @HDMI_TG_V_FSZ_L
	.comm	_exynos5433_hdmi_driver_data,4,2 ## @exynos5433_hdmi_driver_data
	.comm	_HDMI_TG_DECON_EN,4,2           ## @HDMI_TG_DECON_EN
	.no_dead_strip	_hdmi_v14_mode_apply
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hdmi_v14_mode_apply
_hdmi_v14_mode_apply:                   ; @hdmi_v14_mode_apply
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0, #8]
	ldr	x20, [x8]
	ldr	w9, [x20]
	ldp	w10, w8, [x20, #36]
	cmp	w10, w9
	b.eq	LBB0_5
; %bb.1:
	cmp	w8, #1024
	b.eq	LBB0_4
; %bb.2:
	cmp	w8, #1366
	b.eq	LBB0_4
; %bb.3:
	cmp	w8, #1280
	b.ne	LBB0_5
LBB0_4:
	mov	w21, #258
	b	LBB0_6
LBB0_5:
	mov	w21, #0
LBB0_6:
Lloh0:
	adrp	x9, _HDMI_H_BLANK_0@GOTPAGE
Lloh1:
	ldr	x9, [x9, _HDMI_H_BLANK_0@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x9]
	ldr	w9, [x20, #44]
	sub	w3, w9, w8
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh3:
	adrp	x8, _HDMI_V_LINE_0@GOTPAGE
Lloh4:
	ldr	x8, [x8, _HDMI_V_LINE_0@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	w3, [x20, #48]
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh6:
	adrp	x8, _HDMI_H_LINE_0@GOTPAGE
Lloh7:
	ldr	x8, [x8, _HDMI_H_LINE_0@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	ldr	w3, [x20, #44]
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh9:
	adrp	x8, _HDMI_HSYNC_POL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _HDMI_HSYNC_POL@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	w8, [x20, #52]
Lloh12:
	adrp	x9, _DRM_MODE_FLAG_NHSYNC@GOTPAGE
Lloh13:
	ldr	x9, [x9, _DRM_MODE_FLAG_NHSYNC@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w3, ne
	mov	x0, x19
	mov	w2, #1
	bl	_hdmi_reg_writev
Lloh15:
	adrp	x8, _HDMI_VSYNC_POL@GOTPAGE
Lloh16:
	ldr	x8, [x8, _HDMI_VSYNC_POL@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	ldr	w8, [x20, #52]
Lloh18:
	adrp	x9, _DRM_MODE_FLAG_NVSYNC@GOTPAGE
Lloh19:
	ldr	x9, [x9, _DRM_MODE_FLAG_NVSYNC@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w3, ne
	mov	x0, x19
	mov	w2, #1
	bl	_hdmi_reg_writev
Lloh21:
	adrp	x8, _HDMI_INT_PRO_MODE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _HDMI_INT_PRO_MODE@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	ldr	w8, [x20, #52]
Lloh24:
	adrp	x22, _DRM_MODE_FLAG_INTERLACE@GOTPAGE
Lloh25:
	ldr	x22, [x22, _DRM_MODE_FLAG_INTERLACE@GOTPAGEOFF]
	ldr	w9, [x22]
	tst	w9, w8
	cset	w3, ne
	mov	x0, x19
	mov	w2, #1
	bl	_hdmi_reg_writev
	ldr	w8, [x22]
Lloh26:
	adrp	x9, _HDMI_V_SYNC_LINE_BEF_2_0@GOTPAGE
Lloh27:
	ldr	x9, [x9, _HDMI_V_SYNC_LINE_BEF_2_0@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x9]
	ldp	w9, w10, [x20, #52]
	ldr	w11, [x20, #36]
	sub	w3, w10, w11
	and	w8, w8, w9
	cbz	w8, LBB0_8
; %bb.7:
	cmp	w3, #0
	cinc	w8, w3, lt
	asr	w3, w8, #1
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh29:
	adrp	x8, _HDMI_V_SYNC_LINE_BEF_1_0@GOTPAGE
Lloh30:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_BEF_1_0@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	ldr	w8, [x20, #60]
	ldr	w9, [x20, #36]
	sub	w8, w8, w9
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w3, w8, #1
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh32:
	adrp	x8, _HDMI_V2_BLANK_0@GOTPAGE
Lloh33:
	ldr	x8, [x8, _HDMI_V2_BLANK_0@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w3, w8, #1
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh35:
	adrp	x8, _HDMI_V1_BLANK_0@GOTPAGE
Lloh36:
	ldr	x8, [x8, _HDMI_V1_BLANK_0@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	ldr	w9, [x20, #36]
	sub	w8, w8, w9
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w3, w8, #1
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh38:
	adrp	x8, _HDMI_V_BLANK_F0_0@GOTPAGE
Lloh39:
	ldr	x8, [x8, _HDMI_V_BLANK_F0_0@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	ldr	w9, [x20, #36]
	cmp	w9, #0
	cinc	w9, w9, lt
	sub	w3, w8, w9, asr #1
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh41:
	adrp	x8, _HDMI_V_BLANK_F1_0@GOTPAGE
Lloh42:
	ldr	x8, [x8, _HDMI_V_BLANK_F1_0@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
	ldr	w3, [x20, #48]
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh44:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_2_0@GOTPAGE
Lloh45:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_2_0@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w8, w8, #1
	add	w3, w8, #7
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh47:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_1_0@GOTPAGE
Lloh48:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_1_0@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w8, w8, #1
	add	w3, w8, #2
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh50:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_PXL_2_0@GOTPAGE
Lloh51:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_PXL_2_0@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	ldp	w9, w8, [x20, #40]
	cmp	w8, #0
	cinc	w8, w8, lt
	ldr	w10, [x20, #64]
	add	w8, w10, w8, asr #1
	sub	w3, w8, w9
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh53:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_PXL_1_0@GOTPAGE
Lloh54:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_PXL_1_0@GOTPAGEOFF]
Lloh55:
	ldr	w1, [x8]
	ldp	w9, w8, [x20, #40]
	cmp	w8, #0
	cinc	w8, w8, lt
	ldr	w10, [x20, #64]
	add	w8, w10, w8, asr #1
	sub	w3, w8, w9
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh56:
	adrp	x8, _HDMI_TG_VACT_ST_L@GOTPAGE
Lloh57:
	ldr	x8, [x8, _HDMI_TG_VACT_ST_L@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	ldr	w9, [x20, #36]
	sub	w8, w8, w9
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w3, w8, #1
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh59:
	adrp	x8, _HDMI_TG_VACT_SZ_L@GOTPAGE
Lloh60:
	ldr	x8, [x8, _HDMI_TG_VACT_SZ_L@GOTPAGEOFF]
Lloh61:
	ldr	w1, [x8]
	ldr	w8, [x20, #36]
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w3, w8, #1
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh62:
	adrp	x8, _HDMI_TG_VACT_ST2_L@GOTPAGE
Lloh63:
	ldr	x8, [x8, _HDMI_TG_VACT_ST2_L@GOTPAGEOFF]
Lloh64:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	ldr	w9, [x20, #36]
	cmp	w9, #0
	cinc	w9, w9, lt
	sub	w3, w8, w9, asr #1
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh65:
	adrp	x8, _HDMI_TG_VSYNC2_L@GOTPAGE
Lloh66:
	ldr	x8, [x8, _HDMI_TG_VSYNC2_L@GOTPAGEOFF]
Lloh67:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w8, w8, #1
	add	w3, w8, #1
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh68:
	adrp	x8, _HDMI_TG_VSYNC_BOT_HDMI_L@GOTPAGE
Lloh69:
	ldr	x8, [x8, _HDMI_TG_VSYNC_BOT_HDMI_L@GOTPAGEOFF]
Lloh70:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w8, w8, #1
	add	w3, w8, #1
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh71:
	adrp	x8, _HDMI_TG_FIELD_BOT_HDMI_L@GOTPAGE
Lloh72:
	ldr	x8, [x8, _HDMI_TG_FIELD_BOT_HDMI_L@GOTPAGEOFF]
Lloh73:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w8, w8, #1
	add	w3, w8, #1
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh74:
	adrp	x8, _HDMI_TG_VACT_ST3_L@GOTPAGE
Lloh75:
	ldr	x8, [x8, _HDMI_TG_VACT_ST3_L@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #0
	bl	_hdmi_reg_writev
	mov	w3, #0
Lloh77:
	adrp	x8, _HDMI_TG_VACT_ST4_L@GOTPAGE
Lloh78:
	ldr	x8, [x8, _HDMI_TG_VACT_ST4_L@GOTPAGEOFF]
	b	LBB0_9
LBB0_8:
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh79:
	adrp	x8, _HDMI_V_SYNC_LINE_BEF_1_0@GOTPAGE
Lloh80:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_BEF_1_0@GOTPAGEOFF]
Lloh81:
	ldr	w1, [x8]
	ldr	w8, [x20, #60]
	ldr	w9, [x20, #36]
	sub	w3, w8, w9
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh82:
	adrp	x8, _HDMI_V2_BLANK_0@GOTPAGE
Lloh83:
	ldr	x8, [x8, _HDMI_V2_BLANK_0@GOTPAGEOFF]
Lloh84:
	ldr	w1, [x8]
	ldr	w3, [x20, #48]
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh85:
	adrp	x8, _HDMI_V1_BLANK_0@GOTPAGE
Lloh86:
	ldr	x8, [x8, _HDMI_V1_BLANK_0@GOTPAGEOFF]
Lloh87:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	ldr	w9, [x20, #36]
	sub	w3, w8, w9
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh88:
	adrp	x8, _HDMI_V_BLANK_F0_0@GOTPAGE
Lloh89:
	ldr	x8, [x8, _HDMI_V_BLANK_F0_0@GOTPAGEOFF]
Lloh90:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh91:
	adrp	x8, _HDMI_V_BLANK_F1_0@GOTPAGE
Lloh92:
	ldr	x8, [x8, _HDMI_V_BLANK_F1_0@GOTPAGEOFF]
Lloh93:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh94:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_2_0@GOTPAGE
Lloh95:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_2_0@GOTPAGEOFF]
Lloh96:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh97:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_1_0@GOTPAGE
Lloh98:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_1_0@GOTPAGEOFF]
Lloh99:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh100:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_PXL_2_0@GOTPAGE
Lloh101:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_PXL_2_0@GOTPAGEOFF]
Lloh102:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh103:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_PXL_1_0@GOTPAGE
Lloh104:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_PXL_1_0@GOTPAGEOFF]
Lloh105:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh106:
	adrp	x8, _HDMI_TG_VACT_ST_L@GOTPAGE
Lloh107:
	ldr	x8, [x8, _HDMI_TG_VACT_ST_L@GOTPAGEOFF]
Lloh108:
	ldr	w1, [x8]
	ldr	w8, [x20, #48]
	ldr	w9, [x20, #36]
	sub	w3, w8, w9
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
	ldr	w3, [x20, #36]
Lloh109:
	adrp	x8, _HDMI_TG_VACT_SZ_L@GOTPAGE
Lloh110:
	ldr	x8, [x8, _HDMI_TG_VACT_SZ_L@GOTPAGEOFF]
LBB0_9:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh111:
	adrp	x8, _HDMI_H_SYNC_START_0@GOTPAGE
Lloh112:
	ldr	x8, [x8, _HDMI_H_SYNC_START_0@GOTPAGEOFF]
Lloh113:
	ldr	w1, [x8]
	ldr	w8, [x20, #64]
	ldr	w9, [x20, #40]
	sub	w8, w8, w9
	sub	w3, w8, #2
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh114:
	adrp	x8, _HDMI_H_SYNC_END_0@GOTPAGE
Lloh115:
	ldr	x8, [x8, _HDMI_H_SYNC_END_0@GOTPAGEOFF]
Lloh116:
	ldr	w1, [x8]
	ldr	w8, [x20, #68]
	ldr	w9, [x20, #40]
	sub	w8, w8, w9
	sub	w3, w8, #2
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh117:
	adrp	x8, _HDMI_VACT_SPACE_1_0@GOTPAGE
Lloh118:
	ldr	x8, [x8, _HDMI_VACT_SPACE_1_0@GOTPAGEOFF]
Lloh119:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh120:
	adrp	x8, _HDMI_VACT_SPACE_2_0@GOTPAGE
Lloh121:
	ldr	x8, [x8, _HDMI_VACT_SPACE_2_0@GOTPAGEOFF]
Lloh122:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh123:
	adrp	x8, _HDMI_VACT_SPACE_3_0@GOTPAGE
Lloh124:
	ldr	x8, [x8, _HDMI_VACT_SPACE_3_0@GOTPAGEOFF]
Lloh125:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh126:
	adrp	x8, _HDMI_VACT_SPACE_4_0@GOTPAGE
Lloh127:
	ldr	x8, [x8, _HDMI_VACT_SPACE_4_0@GOTPAGEOFF]
Lloh128:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh129:
	adrp	x8, _HDMI_VACT_SPACE_5_0@GOTPAGE
Lloh130:
	ldr	x8, [x8, _HDMI_VACT_SPACE_5_0@GOTPAGEOFF]
Lloh131:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh132:
	adrp	x8, _HDMI_VACT_SPACE_6_0@GOTPAGE
Lloh133:
	ldr	x8, [x8, _HDMI_VACT_SPACE_6_0@GOTPAGEOFF]
Lloh134:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh135:
	adrp	x8, _HDMI_V_BLANK_F2_0@GOTPAGE
Lloh136:
	ldr	x8, [x8, _HDMI_V_BLANK_F2_0@GOTPAGEOFF]
Lloh137:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh138:
	adrp	x8, _HDMI_V_BLANK_F3_0@GOTPAGE
Lloh139:
	ldr	x8, [x8, _HDMI_V_BLANK_F3_0@GOTPAGEOFF]
Lloh140:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh141:
	adrp	x8, _HDMI_V_BLANK_F4_0@GOTPAGE
Lloh142:
	ldr	x8, [x8, _HDMI_V_BLANK_F4_0@GOTPAGEOFF]
Lloh143:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh144:
	adrp	x8, _HDMI_V_BLANK_F5_0@GOTPAGE
Lloh145:
	ldr	x8, [x8, _HDMI_V_BLANK_F5_0@GOTPAGEOFF]
Lloh146:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh147:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_3_0@GOTPAGE
Lloh148:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_3_0@GOTPAGEOFF]
Lloh149:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh150:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_4_0@GOTPAGE
Lloh151:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_4_0@GOTPAGEOFF]
Lloh152:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh153:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_5_0@GOTPAGE
Lloh154:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_5_0@GOTPAGEOFF]
Lloh155:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh156:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_6_0@GOTPAGE
Lloh157:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_6_0@GOTPAGEOFF]
Lloh158:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh159:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_PXL_3_0@GOTPAGE
Lloh160:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_PXL_3_0@GOTPAGEOFF]
Lloh161:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh162:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_PXL_4_0@GOTPAGE
Lloh163:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_PXL_4_0@GOTPAGEOFF]
Lloh164:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh165:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_PXL_5_0@GOTPAGE
Lloh166:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_PXL_5_0@GOTPAGEOFF]
Lloh167:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh168:
	adrp	x8, _HDMI_V_SYNC_LINE_AFT_PXL_6_0@GOTPAGE
Lloh169:
	ldr	x8, [x8, _HDMI_V_SYNC_LINE_AFT_PXL_6_0@GOTPAGEOFF]
Lloh170:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #65535
	bl	_hdmi_reg_writev
Lloh171:
	adrp	x8, _HDMI_TG_H_FSZ_L@GOTPAGE
Lloh172:
	ldr	x8, [x8, _HDMI_TG_H_FSZ_L@GOTPAGEOFF]
Lloh173:
	ldr	w1, [x8]
	ldr	w3, [x20, #44]
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh174:
	adrp	x8, _HDMI_TG_HACT_ST_L@GOTPAGE
Lloh175:
	ldr	x8, [x8, _HDMI_TG_HACT_ST_L@GOTPAGEOFF]
Lloh176:
	ldr	w1, [x8]
	ldp	w9, w8, [x20, #40]
	add	w9, w21, w9
	sub	w3, w8, w9
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh177:
	adrp	x8, _HDMI_TG_HACT_SZ_L@GOTPAGE
Lloh178:
	ldr	x8, [x8, _HDMI_TG_HACT_SZ_L@GOTPAGEOFF]
Lloh179:
	ldr	w1, [x8]
	ldr	w8, [x20, #40]
	add	w3, w8, w21
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
Lloh180:
	adrp	x8, _HDMI_TG_V_FSZ_L@GOTPAGE
Lloh181:
	ldr	x8, [x8, _HDMI_TG_V_FSZ_L@GOTPAGEOFF]
Lloh182:
	ldr	w1, [x8]
	ldr	w3, [x20, #48]
	mov	x0, x19
	mov	w2, #2
	bl	_hdmi_reg_writev
	ldr	x8, [x19]
Lloh183:
	adrp	x9, _exynos5433_hdmi_driver_data@GOTPAGE
Lloh184:
	ldr	x9, [x9, _exynos5433_hdmi_driver_data@GOTPAGEOFF]
	cmp	x8, x9
	b.eq	LBB0_11
; %bb.10:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_11:
Lloh185:
	adrp	x8, _HDMI_TG_DECON_EN@GOTPAGE
Lloh186:
	ldr	x8, [x8, _HDMI_TG_DECON_EN@GOTPAGEOFF]
Lloh187:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_hdmi_reg_writeb
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGot	Lloh183, Lloh184
	.loh AdrpLdrGotLdr	Lloh180, Lloh181, Lloh182
	.loh AdrpLdrGotLdr	Lloh177, Lloh178, Lloh179
	.loh AdrpLdrGotLdr	Lloh174, Lloh175, Lloh176
	.loh AdrpLdrGotLdr	Lloh171, Lloh172, Lloh173
	.loh AdrpLdrGotLdr	Lloh168, Lloh169, Lloh170
	.loh AdrpLdrGotLdr	Lloh165, Lloh166, Lloh167
	.loh AdrpLdrGotLdr	Lloh162, Lloh163, Lloh164
	.loh AdrpLdrGotLdr	Lloh159, Lloh160, Lloh161
	.loh AdrpLdrGotLdr	Lloh156, Lloh157, Lloh158
	.loh AdrpLdrGotLdr	Lloh153, Lloh154, Lloh155
	.loh AdrpLdrGotLdr	Lloh150, Lloh151, Lloh152
	.loh AdrpLdrGotLdr	Lloh147, Lloh148, Lloh149
	.loh AdrpLdrGotLdr	Lloh144, Lloh145, Lloh146
	.loh AdrpLdrGotLdr	Lloh141, Lloh142, Lloh143
	.loh AdrpLdrGotLdr	Lloh138, Lloh139, Lloh140
	.loh AdrpLdrGotLdr	Lloh135, Lloh136, Lloh137
	.loh AdrpLdrGotLdr	Lloh132, Lloh133, Lloh134
	.loh AdrpLdrGotLdr	Lloh129, Lloh130, Lloh131
	.loh AdrpLdrGotLdr	Lloh126, Lloh127, Lloh128
	.loh AdrpLdrGotLdr	Lloh123, Lloh124, Lloh125
	.loh AdrpLdrGotLdr	Lloh120, Lloh121, Lloh122
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh185, Lloh186, Lloh187
	.cfi_endproc
                                        ; -- End function
	.comm	_HDMI_H_BLANK_0,4,2             ; @HDMI_H_BLANK_0
	.comm	_HDMI_V_LINE_0,4,2              ; @HDMI_V_LINE_0
	.comm	_HDMI_H_LINE_0,4,2              ; @HDMI_H_LINE_0
	.comm	_HDMI_HSYNC_POL,4,2             ; @HDMI_HSYNC_POL
	.comm	_DRM_MODE_FLAG_NHSYNC,4,2       ; @DRM_MODE_FLAG_NHSYNC
	.comm	_HDMI_VSYNC_POL,4,2             ; @HDMI_VSYNC_POL
	.comm	_DRM_MODE_FLAG_NVSYNC,4,2       ; @DRM_MODE_FLAG_NVSYNC
	.comm	_HDMI_INT_PRO_MODE,4,2          ; @HDMI_INT_PRO_MODE
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ; @DRM_MODE_FLAG_INTERLACE
	.comm	_HDMI_V_SYNC_LINE_BEF_2_0,4,2   ; @HDMI_V_SYNC_LINE_BEF_2_0
	.comm	_HDMI_V_SYNC_LINE_BEF_1_0,4,2   ; @HDMI_V_SYNC_LINE_BEF_1_0
	.comm	_HDMI_V2_BLANK_0,4,2            ; @HDMI_V2_BLANK_0
	.comm	_HDMI_V1_BLANK_0,4,2            ; @HDMI_V1_BLANK_0
	.comm	_HDMI_V_BLANK_F0_0,4,2          ; @HDMI_V_BLANK_F0_0
	.comm	_HDMI_V_BLANK_F1_0,4,2          ; @HDMI_V_BLANK_F1_0
	.comm	_HDMI_V_SYNC_LINE_AFT_2_0,4,2   ; @HDMI_V_SYNC_LINE_AFT_2_0
	.comm	_HDMI_V_SYNC_LINE_AFT_1_0,4,2   ; @HDMI_V_SYNC_LINE_AFT_1_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_2_0,4,2 ; @HDMI_V_SYNC_LINE_AFT_PXL_2_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_1_0,4,2 ; @HDMI_V_SYNC_LINE_AFT_PXL_1_0
	.comm	_HDMI_TG_VACT_ST_L,4,2          ; @HDMI_TG_VACT_ST_L
	.comm	_HDMI_TG_VACT_SZ_L,4,2          ; @HDMI_TG_VACT_SZ_L
	.comm	_HDMI_TG_VACT_ST2_L,4,2         ; @HDMI_TG_VACT_ST2_L
	.comm	_HDMI_TG_VSYNC2_L,4,2           ; @HDMI_TG_VSYNC2_L
	.comm	_HDMI_TG_VSYNC_BOT_HDMI_L,4,2   ; @HDMI_TG_VSYNC_BOT_HDMI_L
	.comm	_HDMI_TG_FIELD_BOT_HDMI_L,4,2   ; @HDMI_TG_FIELD_BOT_HDMI_L
	.comm	_HDMI_TG_VACT_ST3_L,4,2         ; @HDMI_TG_VACT_ST3_L
	.comm	_HDMI_TG_VACT_ST4_L,4,2         ; @HDMI_TG_VACT_ST4_L
	.comm	_HDMI_H_SYNC_START_0,4,2        ; @HDMI_H_SYNC_START_0
	.comm	_HDMI_H_SYNC_END_0,4,2          ; @HDMI_H_SYNC_END_0
	.comm	_HDMI_VACT_SPACE_1_0,4,2        ; @HDMI_VACT_SPACE_1_0
	.comm	_HDMI_VACT_SPACE_2_0,4,2        ; @HDMI_VACT_SPACE_2_0
	.comm	_HDMI_VACT_SPACE_3_0,4,2        ; @HDMI_VACT_SPACE_3_0
	.comm	_HDMI_VACT_SPACE_4_0,4,2        ; @HDMI_VACT_SPACE_4_0
	.comm	_HDMI_VACT_SPACE_5_0,4,2        ; @HDMI_VACT_SPACE_5_0
	.comm	_HDMI_VACT_SPACE_6_0,4,2        ; @HDMI_VACT_SPACE_6_0
	.comm	_HDMI_V_BLANK_F2_0,4,2          ; @HDMI_V_BLANK_F2_0
	.comm	_HDMI_V_BLANK_F3_0,4,2          ; @HDMI_V_BLANK_F3_0
	.comm	_HDMI_V_BLANK_F4_0,4,2          ; @HDMI_V_BLANK_F4_0
	.comm	_HDMI_V_BLANK_F5_0,4,2          ; @HDMI_V_BLANK_F5_0
	.comm	_HDMI_V_SYNC_LINE_AFT_3_0,4,2   ; @HDMI_V_SYNC_LINE_AFT_3_0
	.comm	_HDMI_V_SYNC_LINE_AFT_4_0,4,2   ; @HDMI_V_SYNC_LINE_AFT_4_0
	.comm	_HDMI_V_SYNC_LINE_AFT_5_0,4,2   ; @HDMI_V_SYNC_LINE_AFT_5_0
	.comm	_HDMI_V_SYNC_LINE_AFT_6_0,4,2   ; @HDMI_V_SYNC_LINE_AFT_6_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_3_0,4,2 ; @HDMI_V_SYNC_LINE_AFT_PXL_3_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_4_0,4,2 ; @HDMI_V_SYNC_LINE_AFT_PXL_4_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_5_0,4,2 ; @HDMI_V_SYNC_LINE_AFT_PXL_5_0
	.comm	_HDMI_V_SYNC_LINE_AFT_PXL_6_0,4,2 ; @HDMI_V_SYNC_LINE_AFT_PXL_6_0
	.comm	_HDMI_TG_H_FSZ_L,4,2            ; @HDMI_TG_H_FSZ_L
	.comm	_HDMI_TG_HACT_ST_L,4,2          ; @HDMI_TG_HACT_ST_L
	.comm	_HDMI_TG_HACT_SZ_L,4,2          ; @HDMI_TG_HACT_SZ_L
	.comm	_HDMI_TG_V_FSZ_L,4,2            ; @HDMI_TG_V_FSZ_L
	.comm	_exynos5433_hdmi_driver_data,4,2 ; @exynos5433_hdmi_driver_data
	.comm	_HDMI_TG_DECON_EN,4,2           ; @HDMI_TG_DECON_EN
	.no_dead_strip	_hdmi_v14_mode_apply
.subsections_via_symbols
