	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vm_adjust_size          ## -- Begin function amdgpu_vm_adjust_size
	.p2align	4, 0x90
_amdgpu_vm_adjust_size:                 ## @amdgpu_vm_adjust_size
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, %r12d
	movl	%ecx, %ebx
	leal	-30(%r12), %ecx
	movl	$1, %r15d
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %r15d
	movl	%edx, %ecx
	movq	%rdi, %r14
	movq	_amdgpu_vm_size@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	cmpl	$-1, %edx
	movl	%ebx, -48(%rbp)                 ## 4-byte Spill
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	je	LBB0_4
## %bb.1:
	cmpl	%r15d, %edx
	jbe	LBB0_2
## %bb.3:
	movl	20(%r14), %edi
	leaq	L_.str(%rip), %rsi
	movl	%r15d, %ecx
	callq	_dev_warn
	jmp	LBB0_5
LBB0_4:
	movl	%esi, %r13d
	leaq	-64(%rbp), %rdi
	callq	_si_meminfo
	movl	-64(%rbp), %eax
	imull	-56(%rbp), %eax
	addl	$1073741823, %eax               ## imm = 0x3FFFFFFF
	sarl	$30, %eax
	leal	(%rax,%rax,2), %edi
	movl	%r13d, %esi
	callq	_max
	movl	%eax, %edi
	movl	%r15d, %esi
	callq	_min
	movq	%rax, %rdi
	callq	_roundup_pow_of_two
	movq	%rax, %r15
	jmp	LBB0_5
LBB0_2:
	movl	%edx, %r15d
LBB0_5:
	movl	%r15d, %eax
	shll	$18, %eax
	movl	%eax, (%r14)
	movslq	%eax, %rdi
	callq	_roundup_pow_of_two
	movq	_amdgpu_vm_block_size@GOTPCREL(%rip), %rbx
	movl	(%rbx), %ecx
	leal	-9(%rcx), %edx
	xorl	%esi, %esi
	cmpl	$-1, %ecx
	movzbl	%dl, %ecx
	cmovel	%esi, %ecx
                                        ## kill: def $cl killed $cl killed $ecx
	sarl	%cl, %eax
	movl	%eax, %edi
	callq	_fls64
	leaq	-1(%rax), %rdi
	movl	$9, %esi
	callq	_DIV_ROUND_UP
	movl	%eax, %r13d
	decl	%r13d
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	movl	%r13d, %esi
	callq	_min
	movl	%eax, 4(%r14)
	cmpl	$1, %eax
	je	LBB0_11
## %bb.6:
	cmpl	$2, %eax
	je	LBB0_10
## %bb.7:
	cmpl	$3, %eax
	jne	LBB0_12
## %bb.8:
	movq	_AMDGPU_VM_PDB2@GOTPCREL(%rip), %rax
	jmp	LBB0_9
LBB0_11:
	movq	_AMDGPU_VM_PDB0@GOTPCREL(%rip), %rax
	jmp	LBB0_9
LBB0_10:
	movq	_AMDGPU_VM_PDB1@GOTPCREL(%rip), %rax
LBB0_9:
	movl	(%rax), %eax
	movl	%eax, 16(%r14)
	jmp	LBB0_13
LBB0_12:
	movl	20(%r14), %edi
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_err
LBB0_13:
	movl	(%rbx), %edi
	cmpl	$-1, %edi
	je	LBB0_15
## %bb.14:
	movq	_AMDGPU_GPU_PAGE_SHIFT@GOTPCREL(%rip), %rax
	subl	(%rax), %r12d
	movl	4(%r14), %eax
	leal	(%rax,%rax,8), %eax
	subl	%eax, %r12d
	movl	%r12d, %esi
	callq	_min
	movq	%rax, %rcx
	jmp	LBB0_17
LBB0_15:
	movl	$9, %ecx
	cmpl	$1, 4(%r14)
	jg	LBB0_17
## %bb.16:
	movl	%r13d, %edi
	callq	_amdgpu_vm_get_block_size
	movl	%eax, %ecx
LBB0_17:
	movl	%ecx, 8(%r14)
	movq	_amdgpu_vm_fragment_size@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	$-1, %eax
	movl	-44(%rbp), %r8d                 ## 4-byte Reload
	cmovnel	%eax, %r8d
	movl	%r8d, 12(%r14)
	movl	4(%r14), %edx
	incl	%edx
	leaq	L_.str.2(%rip), %rdi
	movl	%r15d, %esi
                                        ## kill: def $ecx killed $ecx killed $rcx
	callq	_DRM_INFO
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_amdgpu_vm_size,4,2             ## @amdgpu_vm_size
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"VM size (%d) too large, max is %u GB\n"

	.comm	_amdgpu_vm_block_size,4,2       ## @amdgpu_vm_block_size
	.comm	_AMDGPU_VM_PDB2,4,2             ## @AMDGPU_VM_PDB2
	.comm	_AMDGPU_VM_PDB1,4,2             ## @AMDGPU_VM_PDB1
	.comm	_AMDGPU_VM_PDB0,4,2             ## @AMDGPU_VM_PDB0
L_.str.1:                               ## @.str.1
	.asciz	"VMPT only supports 2~4+1 levels\n"

	.comm	_AMDGPU_GPU_PAGE_SHIFT,4,2      ## @AMDGPU_GPU_PAGE_SHIFT
	.comm	_amdgpu_vm_fragment_size,4,2    ## @amdgpu_vm_fragment_size
L_.str.2:                               ## @.str.2
	.asciz	"vm size is %u GB, %u levels, block size is %u-bit, fragment size is %u-bit\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vm_adjust_size          ; -- Begin function amdgpu_vm_adjust_size
	.p2align	2
_amdgpu_vm_adjust_size:                 ; @amdgpu_vm_adjust_size
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x4
	mov	x23, x3
	mov	x20, x2
	mov	x19, x0
	sub	w8, w4, #30
	mov	w9, #1
	lsl	w21, w9, w8
Lloh0:
	adrp	x8, _amdgpu_vm_size@GOTPAGE
Lloh1:
	ldr	x8, [x8, _amdgpu_vm_size@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	cmn	w2, #1
	b.eq	LBB0_3
; %bb.1:
	cmp	w2, w21
	b.ls	LBB0_4
; %bb.2:
	ldr	w0, [x19, #20]
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	mov	x3, x21
	bl	_dev_warn
	b	LBB0_5
LBB0_3:
	mov	x24, x1
	mov	x0, sp
	bl	_si_meminfo
	ldr	w8, [sp, #8]
	ldr	w9, [sp]
	mov	w10, #1073741823
	madd	w8, w9, w8, w10
	asr	w8, w8, #30
	add	w0, w8, w8, lsl #1
	mov	x1, x24
	bl	_max
	mov	x1, x21
	bl	_min
	bl	_roundup_pow_of_two
	mov	x21, x0
	b	LBB0_5
LBB0_4:
	mov	x21, x2
LBB0_5:
	lsl	w8, w21, #18
	str	w8, [x19]
	sxtw	x0, w8
	bl	_roundup_pow_of_two
Lloh5:
	adrp	x25, _amdgpu_vm_block_size@GOTPAGE
Lloh6:
	ldr	x25, [x25, _amdgpu_vm_block_size@GOTPAGEOFF]
	ldr	w8, [x25]
	sub	w9, w8, #9
	cmn	w8, #1
	csel	w8, wzr, w9, eq
	asr	w0, w0, w8
	bl	_fls64
	sub	x0, x0, #1
	mov	w1, #9
	bl	_DIV_ROUND_UP
	sub	w24, w0, #1
	mov	x0, x23
	mov	x1, x24
	bl	_min
	str	w0, [x19, #4]
	cmp	w0, #1
	b.eq	LBB0_9
; %bb.6:
	cmp	w0, #2
	b.eq	LBB0_10
; %bb.7:
	cmp	w0, #3
	b.ne	LBB0_12
; %bb.8:
Lloh7:
	adrp	x8, _AMDGPU_VM_PDB2@GOTPAGE
Lloh8:
	ldr	x8, [x8, _AMDGPU_VM_PDB2@GOTPAGEOFF]
	b	LBB0_11
LBB0_9:
Lloh9:
	adrp	x8, _AMDGPU_VM_PDB0@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AMDGPU_VM_PDB0@GOTPAGEOFF]
	b	LBB0_11
LBB0_10:
Lloh11:
	adrp	x8, _AMDGPU_VM_PDB1@GOTPAGE
Lloh12:
	ldr	x8, [x8, _AMDGPU_VM_PDB1@GOTPAGEOFF]
LBB0_11:
	ldr	w8, [x8]
	str	w8, [x19, #16]
	b	LBB0_13
LBB0_12:
	ldr	w0, [x19, #20]
Lloh13:
	adrp	x1, l_.str.1@PAGE
Lloh14:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_err
LBB0_13:
	ldr	w0, [x25]
	cmn	w0, #1
	b.eq	LBB0_15
; %bb.14:
Lloh15:
	adrp	x8, _AMDGPU_GPU_PAGE_SHIFT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _AMDGPU_GPU_PAGE_SHIFT@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	ldr	w9, [x19, #4]
	add	w9, w9, w9, lsl #3
	sub	w8, w22, w8
	sub	w1, w8, w9
	bl	_min
	mov	x3, x0
	b	LBB0_18
LBB0_15:
	ldr	w8, [x19, #4]
	cmp	w8, #1
	b.le	LBB0_17
; %bb.16:
	mov	w3, #9
	b	LBB0_18
LBB0_17:
	mov	x0, x24
	bl	_amdgpu_vm_get_block_size
	mov	x3, x0
LBB0_18:
Lloh18:
	adrp	x8, _amdgpu_vm_fragment_size@GOTPAGE
Lloh19:
	ldr	x8, [x8, _amdgpu_vm_fragment_size@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	cmn	w8, #1
	csel	w4, w20, w8, eq
	stp	w3, w4, [x19, #8]
	ldr	w8, [x19, #4]
	add	w2, w8, #1
Lloh21:
	adrp	x0, l_.str.2@PAGE
Lloh22:
	add	x0, x0, l_.str.2@PAGEOFF
	mov	x1, x21
                                        ; kill: def $w3 killed $w3 killed $x3
	bl	_DRM_INFO
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.comm	_amdgpu_vm_size,4,2             ; @amdgpu_vm_size
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"VM size (%d) too large, max is %u GB\n"

	.comm	_amdgpu_vm_block_size,4,2       ; @amdgpu_vm_block_size
	.comm	_AMDGPU_VM_PDB2,4,2             ; @AMDGPU_VM_PDB2
	.comm	_AMDGPU_VM_PDB1,4,2             ; @AMDGPU_VM_PDB1
	.comm	_AMDGPU_VM_PDB0,4,2             ; @AMDGPU_VM_PDB0
l_.str.1:                               ; @.str.1
	.asciz	"VMPT only supports 2~4+1 levels\n"

	.comm	_AMDGPU_GPU_PAGE_SHIFT,4,2      ; @AMDGPU_GPU_PAGE_SHIFT
	.comm	_amdgpu_vm_fragment_size,4,2    ; @amdgpu_vm_fragment_size
l_.str.2:                               ; @.str.2
	.asciz	"vm size is %u GB, %u levels, block size is %u-bit, fragment size is %u-bit\n"

.subsections_via_symbols
