	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gmc_v6_0_set_prt
_gmc_v6_0_set_prt:                      ## @gmc_v6_0_set_prt
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r14
	testl	%esi, %esi
	je	LBB0_3
## %bb.1:
	cmpl	$0, 4(%r14)
	jne	LBB0_3
## %bb.2:
	movl	8(%r14), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_warn
	movl	$1, 4(%r14)
LBB0_3:
	movq	_mmVM_PRT_CNTL@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32
	movq	_VM_PRT_CNTL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_CB_DISABLE_FAULT_ON_UNMAPPED_ACCESS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r12), %esi
	movq	_TC_DISABLE_FAULT_ON_UNMAPPED_ACCESS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r12), %esi
	movq	_L2_CACHE_STORE_INVALID_ENTRIES@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r12), %esi
	movq	_L1_TLB_STORE_INVALID_ENTRIES@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r15), %edi
	movl	%eax, %esi
	callq	_WREG32
	testl	%ebx, %ebx
	je	LBB0_4
## %bb.5:
	movq	_AMDGPU_VA_RESERVED_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_AMDGPU_GPU_PAGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %ebx
	movl	(%r14), %r14d
	subl	%ebx, %r14d
	jmp	LBB0_6
LBB0_4:
	xorl	%r14d, %r14d
	movl	$268435455, %ebx                ## imm = 0xFFFFFFF
LBB0_6:
	movq	_mmVM_PRT_APERTURE0_LOW_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_WREG32
	movq	_mmVM_PRT_APERTURE1_LOW_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_WREG32
	movq	_mmVM_PRT_APERTURE2_LOW_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_WREG32
	movq	_mmVM_PRT_APERTURE3_LOW_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_WREG32
	movq	_mmVM_PRT_APERTURE0_HIGH_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	callq	_WREG32
	movq	_mmVM_PRT_APERTURE1_HIGH_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	callq	_WREG32
	movq	_mmVM_PRT_APERTURE2_HIGH_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	callq	_WREG32
	movq	_mmVM_PRT_APERTURE3_HIGH_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Disabling VM faults because of PRT request!\n"

	.comm	_mmVM_PRT_CNTL,4,2              ## @mmVM_PRT_CNTL
	.comm	_VM_PRT_CNTL,4,2                ## @VM_PRT_CNTL
	.comm	_CB_DISABLE_FAULT_ON_UNMAPPED_ACCESS,4,2 ## @CB_DISABLE_FAULT_ON_UNMAPPED_ACCESS
	.comm	_TC_DISABLE_FAULT_ON_UNMAPPED_ACCESS,4,2 ## @TC_DISABLE_FAULT_ON_UNMAPPED_ACCESS
	.comm	_L2_CACHE_STORE_INVALID_ENTRIES,4,2 ## @L2_CACHE_STORE_INVALID_ENTRIES
	.comm	_L1_TLB_STORE_INVALID_ENTRIES,4,2 ## @L1_TLB_STORE_INVALID_ENTRIES
	.comm	_AMDGPU_VA_RESERVED_SIZE,4,2    ## @AMDGPU_VA_RESERVED_SIZE
	.comm	_AMDGPU_GPU_PAGE_SHIFT,4,2      ## @AMDGPU_GPU_PAGE_SHIFT
	.comm	_mmVM_PRT_APERTURE0_LOW_ADDR,4,2 ## @mmVM_PRT_APERTURE0_LOW_ADDR
	.comm	_mmVM_PRT_APERTURE1_LOW_ADDR,4,2 ## @mmVM_PRT_APERTURE1_LOW_ADDR
	.comm	_mmVM_PRT_APERTURE2_LOW_ADDR,4,2 ## @mmVM_PRT_APERTURE2_LOW_ADDR
	.comm	_mmVM_PRT_APERTURE3_LOW_ADDR,4,2 ## @mmVM_PRT_APERTURE3_LOW_ADDR
	.comm	_mmVM_PRT_APERTURE0_HIGH_ADDR,4,2 ## @mmVM_PRT_APERTURE0_HIGH_ADDR
	.comm	_mmVM_PRT_APERTURE1_HIGH_ADDR,4,2 ## @mmVM_PRT_APERTURE1_HIGH_ADDR
	.comm	_mmVM_PRT_APERTURE2_HIGH_ADDR,4,2 ## @mmVM_PRT_APERTURE2_HIGH_ADDR
	.comm	_mmVM_PRT_APERTURE3_HIGH_ADDR,4,2 ## @mmVM_PRT_APERTURE3_HIGH_ADDR
	.no_dead_strip	_gmc_v6_0_set_prt
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gmc_v6_0_set_prt
_gmc_v6_0_set_prt:                      ; @gmc_v6_0_set_prt
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	cbz	w1, LBB0_3
; %bb.1:
	ldr	w8, [x19, #4]
	cbnz	w8, LBB0_3
; %bb.2:
	ldr	w0, [x19, #8]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_warn
	mov	w8, #1
	str	w8, [x19, #4]
LBB0_3:
Lloh2:
	adrp	x21, _mmVM_PRT_CNTL@GOTPAGE
Lloh3:
	ldr	x21, [x21, _mmVM_PRT_CNTL@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_RREG32
Lloh4:
	adrp	x22, _VM_PRT_CNTL@GOTPAGE
Lloh5:
	ldr	x22, [x22, _VM_PRT_CNTL@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh6:
	adrp	x8, _CB_DISABLE_FAULT_ON_UNMAPPED_ACCESS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _CB_DISABLE_FAULT_ON_UNMAPPED_ACCESS@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x3, x20
	bl	_REG_SET_FIELD
	ldr	w1, [x22]
Lloh9:
	adrp	x8, _TC_DISABLE_FAULT_ON_UNMAPPED_ACCESS@GOTPAGE
Lloh10:
	ldr	x8, [x8, _TC_DISABLE_FAULT_ON_UNMAPPED_ACCESS@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x3, x20
	bl	_REG_SET_FIELD
	ldr	w1, [x22]
Lloh12:
	adrp	x8, _L2_CACHE_STORE_INVALID_ENTRIES@GOTPAGE
Lloh13:
	ldr	x8, [x8, _L2_CACHE_STORE_INVALID_ENTRIES@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x3, x20
	bl	_REG_SET_FIELD
	ldr	w1, [x22]
Lloh15:
	adrp	x8, _L1_TLB_STORE_INVALID_ENTRIES@GOTPAGE
Lloh16:
	ldr	x8, [x8, _L1_TLB_STORE_INVALID_ENTRIES@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x3, x20
	bl	_REG_SET_FIELD
	mov	x1, x0
	ldr	w0, [x21]
	bl	_WREG32
	cbz	w20, LBB0_5
; %bb.4:
Lloh18:
	adrp	x8, _AMDGPU_VA_RESERVED_SIZE@GOTPAGE
Lloh19:
	ldr	x8, [x8, _AMDGPU_VA_RESERVED_SIZE@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
Lloh21:
	adrp	x9, _AMDGPU_GPU_PAGE_SHIFT@GOTPAGE
Lloh22:
	ldr	x9, [x9, _AMDGPU_GPU_PAGE_SHIFT@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	asr	w20, w8, w9
	ldr	w8, [x19]
	sub	w19, w8, w20
	b	LBB0_6
LBB0_5:
	mov	w19, #0
	mov	w20, #268435455
LBB0_6:
Lloh24:
	adrp	x8, _mmVM_PRT_APERTURE0_LOW_ADDR@GOTPAGE
Lloh25:
	ldr	x8, [x8, _mmVM_PRT_APERTURE0_LOW_ADDR@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_WREG32
Lloh27:
	adrp	x8, _mmVM_PRT_APERTURE1_LOW_ADDR@GOTPAGE
Lloh28:
	ldr	x8, [x8, _mmVM_PRT_APERTURE1_LOW_ADDR@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_WREG32
Lloh30:
	adrp	x8, _mmVM_PRT_APERTURE2_LOW_ADDR@GOTPAGE
Lloh31:
	ldr	x8, [x8, _mmVM_PRT_APERTURE2_LOW_ADDR@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_WREG32
Lloh33:
	adrp	x8, _mmVM_PRT_APERTURE3_LOW_ADDR@GOTPAGE
Lloh34:
	ldr	x8, [x8, _mmVM_PRT_APERTURE3_LOW_ADDR@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_WREG32
Lloh36:
	adrp	x8, _mmVM_PRT_APERTURE0_HIGH_ADDR@GOTPAGE
Lloh37:
	ldr	x8, [x8, _mmVM_PRT_APERTURE0_HIGH_ADDR@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_WREG32
Lloh39:
	adrp	x8, _mmVM_PRT_APERTURE1_HIGH_ADDR@GOTPAGE
Lloh40:
	ldr	x8, [x8, _mmVM_PRT_APERTURE1_HIGH_ADDR@GOTPAGEOFF]
Lloh41:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_WREG32
Lloh42:
	adrp	x8, _mmVM_PRT_APERTURE2_HIGH_ADDR@GOTPAGE
Lloh43:
	ldr	x8, [x8, _mmVM_PRT_APERTURE2_HIGH_ADDR@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_WREG32
Lloh45:
	adrp	x8, _mmVM_PRT_APERTURE3_HIGH_ADDR@GOTPAGE
Lloh46:
	ldr	x8, [x8, _mmVM_PRT_APERTURE3_HIGH_ADDR@GOTPAGEOFF]
Lloh47:
	ldr	w0, [x8]
	mov	x1, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Disabling VM faults because of PRT request!\n"

	.comm	_mmVM_PRT_CNTL,4,2              ; @mmVM_PRT_CNTL
	.comm	_VM_PRT_CNTL,4,2                ; @VM_PRT_CNTL
	.comm	_CB_DISABLE_FAULT_ON_UNMAPPED_ACCESS,4,2 ; @CB_DISABLE_FAULT_ON_UNMAPPED_ACCESS
	.comm	_TC_DISABLE_FAULT_ON_UNMAPPED_ACCESS,4,2 ; @TC_DISABLE_FAULT_ON_UNMAPPED_ACCESS
	.comm	_L2_CACHE_STORE_INVALID_ENTRIES,4,2 ; @L2_CACHE_STORE_INVALID_ENTRIES
	.comm	_L1_TLB_STORE_INVALID_ENTRIES,4,2 ; @L1_TLB_STORE_INVALID_ENTRIES
	.comm	_AMDGPU_VA_RESERVED_SIZE,4,2    ; @AMDGPU_VA_RESERVED_SIZE
	.comm	_AMDGPU_GPU_PAGE_SHIFT,4,2      ; @AMDGPU_GPU_PAGE_SHIFT
	.comm	_mmVM_PRT_APERTURE0_LOW_ADDR,4,2 ; @mmVM_PRT_APERTURE0_LOW_ADDR
	.comm	_mmVM_PRT_APERTURE1_LOW_ADDR,4,2 ; @mmVM_PRT_APERTURE1_LOW_ADDR
	.comm	_mmVM_PRT_APERTURE2_LOW_ADDR,4,2 ; @mmVM_PRT_APERTURE2_LOW_ADDR
	.comm	_mmVM_PRT_APERTURE3_LOW_ADDR,4,2 ; @mmVM_PRT_APERTURE3_LOW_ADDR
	.comm	_mmVM_PRT_APERTURE0_HIGH_ADDR,4,2 ; @mmVM_PRT_APERTURE0_HIGH_ADDR
	.comm	_mmVM_PRT_APERTURE1_HIGH_ADDR,4,2 ; @mmVM_PRT_APERTURE1_HIGH_ADDR
	.comm	_mmVM_PRT_APERTURE2_HIGH_ADDR,4,2 ; @mmVM_PRT_APERTURE2_HIGH_ADDR
	.comm	_mmVM_PRT_APERTURE3_HIGH_ADDR,4,2 ; @mmVM_PRT_APERTURE3_HIGH_ADDR
	.no_dead_strip	_gmc_v6_0_set_prt
.subsections_via_symbols
