	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dcn10_disable_vga
_dcn10_disable_vga:                     ## @dcn10_disable_vga
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	$0, -48(%rbp)
	movl	$0, -44(%rbp)
	movl	$0, -40(%rbp)
	movl	$0, -36(%rbp)
	movq	_D1VGA_CONTROL@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_D1VGA_MODE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-48(%rbp), %rdx
	callq	_REG_GET
	movq	_D2VGA_CONTROL@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	movq	_D2VGA_MODE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	callq	_REG_GET
	movq	_D3VGA_CONTROL@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_D3VGA_MODE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-40(%rbp), %rdx
	callq	_REG_GET
	movq	_D4VGA_CONTROL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movq	_D4VGA_MODE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-36(%rbp), %rdx
	callq	_REG_GET
	cmpl	$0, -48(%rbp)
	jne	LBB0_4
## %bb.1:
	cmpl	$0, -44(%rbp)
	jne	LBB0_4
## %bb.2:
	cmpl	$0, -40(%rbp)
	jne	LBB0_4
## %bb.3:
	cmpl	$0, -36(%rbp)
	je	LBB0_5
LBB0_4:
	movl	(%r14), %edi
	xorl	%esi, %esi
	callq	_REG_WRITE
	movl	(%r15), %edi
	xorl	%esi, %esi
	callq	_REG_WRITE
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_REG_WRITE
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_REG_WRITE
	movq	_VGA_TEST_CONTROL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movq	_VGA_TEST_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_REG_UPDATE
	movl	(%rbx), %edi
	movq	_VGA_TEST_RENDER_START@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_REG_UPDATE
LBB0_5:
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_D1VGA_CONTROL,4,2              ## @D1VGA_CONTROL
	.comm	_D1VGA_MODE_ENABLE,4,2          ## @D1VGA_MODE_ENABLE
	.comm	_D2VGA_CONTROL,4,2              ## @D2VGA_CONTROL
	.comm	_D2VGA_MODE_ENABLE,4,2          ## @D2VGA_MODE_ENABLE
	.comm	_D3VGA_CONTROL,4,2              ## @D3VGA_CONTROL
	.comm	_D3VGA_MODE_ENABLE,4,2          ## @D3VGA_MODE_ENABLE
	.comm	_D4VGA_CONTROL,4,2              ## @D4VGA_CONTROL
	.comm	_D4VGA_MODE_ENABLE,4,2          ## @D4VGA_MODE_ENABLE
	.comm	_VGA_TEST_CONTROL,4,2           ## @VGA_TEST_CONTROL
	.comm	_VGA_TEST_ENABLE,4,2            ## @VGA_TEST_ENABLE
	.comm	_VGA_TEST_RENDER_START,4,2      ## @VGA_TEST_RENDER_START
	.no_dead_strip	_dcn10_disable_vga
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dcn10_disable_vga
_dcn10_disable_vga:                     ; @dcn10_disable_vga
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	stp	xzr, xzr, [sp]
Lloh0:
	adrp	x19, _D1VGA_CONTROL@GOTPAGE
Lloh1:
	ldr	x19, [x19, _D1VGA_CONTROL@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh2:
	adrp	x8, _D1VGA_MODE_ENABLE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _D1VGA_MODE_ENABLE@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	add	x2, sp, #12
	bl	_REG_GET
Lloh5:
	adrp	x20, _D2VGA_CONTROL@GOTPAGE
Lloh6:
	ldr	x20, [x20, _D2VGA_CONTROL@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh7:
	adrp	x8, _D2VGA_MODE_ENABLE@GOTPAGE
Lloh8:
	ldr	x8, [x8, _D2VGA_MODE_ENABLE@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
	add	x2, sp, #8
	bl	_REG_GET
Lloh10:
	adrp	x21, _D3VGA_CONTROL@GOTPAGE
Lloh11:
	ldr	x21, [x21, _D3VGA_CONTROL@GOTPAGEOFF]
	ldr	w0, [x21]
Lloh12:
	adrp	x8, _D3VGA_MODE_ENABLE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _D3VGA_MODE_ENABLE@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	add	x2, sp, #4
	bl	_REG_GET
Lloh15:
	adrp	x22, _D4VGA_CONTROL@GOTPAGE
Lloh16:
	ldr	x22, [x22, _D4VGA_CONTROL@GOTPAGEOFF]
	ldr	w0, [x22]
Lloh17:
	adrp	x8, _D4VGA_MODE_ENABLE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _D4VGA_MODE_ENABLE@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x2, sp
	bl	_REG_GET
	ldr	w8, [sp, #12]
	cbnz	w8, LBB0_4
; %bb.1:
	ldr	w8, [sp, #8]
	cbnz	w8, LBB0_4
; %bb.2:
	ldr	w8, [sp, #4]
	cbnz	w8, LBB0_4
; %bb.3:
	ldr	w8, [sp]
	cbz	w8, LBB0_5
LBB0_4:
	ldr	w0, [x19]
	mov	w1, #0
	bl	_REG_WRITE
	ldr	w0, [x20]
	mov	w1, #0
	bl	_REG_WRITE
	ldr	w0, [x21]
	mov	w1, #0
	bl	_REG_WRITE
	ldr	w0, [x22]
	mov	w1, #0
	bl	_REG_WRITE
Lloh20:
	adrp	x19, _VGA_TEST_CONTROL@GOTPAGE
Lloh21:
	ldr	x19, [x19, _VGA_TEST_CONTROL@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh22:
	adrp	x8, _VGA_TEST_ENABLE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _VGA_TEST_ENABLE@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	mov	w2, #1
	bl	_REG_UPDATE
	ldr	w0, [x19]
Lloh25:
	adrp	x8, _VGA_TEST_RENDER_START@GOTPAGE
Lloh26:
	ldr	x8, [x8, _VGA_TEST_RENDER_START@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
	mov	w2, #1
	bl	_REG_UPDATE
LBB0_5:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_D1VGA_CONTROL,4,2              ; @D1VGA_CONTROL
	.comm	_D1VGA_MODE_ENABLE,4,2          ; @D1VGA_MODE_ENABLE
	.comm	_D2VGA_CONTROL,4,2              ; @D2VGA_CONTROL
	.comm	_D2VGA_MODE_ENABLE,4,2          ; @D2VGA_MODE_ENABLE
	.comm	_D3VGA_CONTROL,4,2              ; @D3VGA_CONTROL
	.comm	_D3VGA_MODE_ENABLE,4,2          ; @D3VGA_MODE_ENABLE
	.comm	_D4VGA_CONTROL,4,2              ; @D4VGA_CONTROL
	.comm	_D4VGA_MODE_ENABLE,4,2          ; @D4VGA_MODE_ENABLE
	.comm	_VGA_TEST_CONTROL,4,2           ; @VGA_TEST_CONTROL
	.comm	_VGA_TEST_ENABLE,4,2            ; @VGA_TEST_ENABLE
	.comm	_VGA_TEST_RENDER_START,4,2      ; @VGA_TEST_RENDER_START
	.no_dead_strip	_dcn10_disable_vga
.subsections_via_symbols
