	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_ring_init               ## -- Begin function amdgpu_ring_init
	.p2align	4, 0x90
_amdgpu_ring_init:                      ## @amdgpu_ring_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r13
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	_amdgpu_sched_hw_submission@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	96(%rsi), %rax
	movq	(%rax), %rax
	movq	_AMDGPU_RING_TYPE_KIQ@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movl	%r8d, -48(%rbp)                 ## 4-byte Spill
	jne	LBB0_2
## %bb.1:
	movl	%r12d, %edi
	movl	$256, %esi                      ## imm = 0x100
	callq	_max
	movl	%eax, %r12d
	cmpq	$0, 120(%rbx)
	jne	LBB0_7
	jmp	LBB0_4
LBB0_2:
	cmpq	%rbx, 40(%r14)
	movl	$256, %eax                      ## imm = 0x100
	cmovel	%eax, %r12d
	cmpq	$0, 120(%rbx)
	je	LBB0_4
LBB0_7:
	leaq	8(%rbx), %rsi
	movq	%r14, %rdi
	callq	_amdgpu_device_wb_get
	testl	%eax, %eax
	je	LBB0_10
## %bb.8:
	movl	%eax, %r15d
	movl	8(%r14), %edi
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_9
LBB0_4:
	movq	(%r14), %rax
	movq	_AMDGPU_MAX_RINGS@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_5
## %bb.6:
	movq	%r14, 120(%rbx)
	leaq	1(%rax), %rcx
	movq	%rcx, (%r14)
	movq	%rax, (%rbx)
	movq	32(%r14), %rcx
	movq	%rbx, (%rcx,%rax,8)
	movq	%rbx, %rdi
	movl	%r12d, %esi
	callq	_amdgpu_fence_driver_init_ring
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_29
	jmp	LBB0_7
LBB0_10:
	leaq	12(%rbx), %rsi
	movq	%r14, %rdi
	callq	_amdgpu_device_wb_get
	testl	%eax, %eax
	je	LBB0_12
## %bb.11:
	movl	%eax, %r15d
	movl	8(%r14), %edi
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_9
LBB0_5:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
	jmp	LBB0_29
LBB0_12:
	leaq	16(%rbx), %rsi
	movq	%r14, %rdi
	callq	_amdgpu_device_wb_get
	testl	%eax, %eax
	je	LBB0_14
## %bb.13:
	movl	%eax, %r15d
	movl	8(%r14), %edi
	leaq	L_.str.2(%rip), %rsi
	jmp	LBB0_9
LBB0_14:
	leaq	20(%rbx), %rsi
	movq	%r14, %rdi
	callq	_amdgpu_device_wb_get
	testl	%eax, %eax
	je	LBB0_16
## %bb.15:
	movl	%eax, %r15d
	movl	8(%r14), %edi
	leaq	L_.str.3(%rip), %rsi
	jmp	LBB0_9
LBB0_16:
	movslq	20(%rbx), %rax
	shlq	$2, %rax
	movq	24(%r14), %rcx
	addq	%rax, %rcx
	movq	%rcx, 112(%rbx)
	addq	16(%r14), %rax
	movq	%rax, 24(%rbx)
	leaq	32(%rbx), %rsi
	movq	%r14, %rdi
	callq	_amdgpu_device_wb_get
	testl	%eax, %eax
	je	LBB0_18
## %bb.17:
	movl	%eax, %r15d
	movl	8(%r14), %edi
	leaq	L_.str.4(%rip), %rsi
	jmp	LBB0_9
LBB0_18:
	movslq	32(%rbx), %rax
	leaq	(,%rax,4), %rcx
	addq	24(%r14), %rcx
	movq	%rcx, 104(%rbx)
	movq	16(%r14), %rcx
	leaq	(%rcx,%rax,4), %rdx
	movq	%rdx, 40(%rbx)
	movl	$1, (%rcx,%rax,4)
	movq	%rbx, %rdi
	movq	%r13, %rsi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	callq	_amdgpu_fence_driver_start_ring
	testl	%eax, %eax
	je	LBB0_20
## %bb.19:
	movl	%eax, %r15d
	movl	8(%r14), %edi
	leaq	L_.str.5(%rip), %rsi
LBB0_9:
	movl	%r15d, %edx
	callq	_dev_err
LBB0_29:
	movl	%r15d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_20:
	movl	-44(%rbp), %r13d                ## 4-byte Reload
	imull	%r13d, %r12d
	shll	$2, %r12d
	movl	%r12d, %edi
	callq	_roundup_pow_of_two
                                        ## kill: def $eax killed $eax def $rax
	movl	%eax, 48(%rbx)
	leal	3(%rax), %edx
	testl	%eax, %eax
	cmovnsl	%eax, %edx
	sarl	$2, %edx
	decl	%edx
	movl	%edx, 52(%rbx)
	movq	96(%rbx), %rcx
	xorl	%esi, %esi
	cmpq	16(%rcx), %rsi
	sbbl	%esi, %esi
	orl	%edx, %esi
	movl	%esi, 56(%rbx)
	cmpq	$0, 88(%rbx)
	je	LBB0_21
LBB0_24:
	movl	%r13d, 60(%rbx)
	movq	_DRM_SCHED_PRIORITY_NORMAL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 76(%rbx)
	leaq	72(%rbx), %rdi
	callq	_mutex_init
	movq	_DRM_SCHED_PRIORITY_MAX@GOTPCREL(%rip), %r15
	cmpl	$0, (%r15)
	jle	LBB0_27
## %bb.25:
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
LBB0_26:                                ## =>This Inner Loop Header: Depth=1
	movq	64(%rbx), %rdi
	addq	%r12, %rdi
	xorl	%esi, %esi
	callq	_atomic_set
	incq	%r13
	movslq	(%r15), %rax
	addq	$4, %r12
	cmpq	%rax, %r13
	jl	LBB0_26
LBB0_27:
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_amdgpu_debugfs_ring_init
	xorl	%r15d, %r15d
	testq	%rax, %rax
	je	LBB0_29
## %bb.28:
	leaq	L_.str.7(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_29
LBB0_21:
	leaq	88(%rbx), %r8
	addl	8(%rcx), %eax
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_AMDGPU_GEM_DOMAIN_GTT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	leaq	84(%rbx), %r9
	leaq	80(%rbx), %rsi
	movq	%rsi, (%rsp)
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_bo_create_kernel
	testl	%eax, %eax
	je	LBB0_23
## %bb.22:
	movl	%eax, %r15d
	movl	8(%r14), %edi
	leaq	L_.str.6(%rip), %rsi
	jmp	LBB0_9
LBB0_23:
	movq	%rbx, %rdi
	callq	_amdgpu_ring_clear_ring
	jmp	LBB0_24
	.cfi_endproc
                                        ## -- End function
	.comm	_amdgpu_sched_hw_submission,4,2 ## @amdgpu_sched_hw_submission
	.comm	_AMDGPU_RING_TYPE_KIQ,8,3       ## @AMDGPU_RING_TYPE_KIQ
	.comm	_AMDGPU_MAX_RINGS,8,3           ## @AMDGPU_MAX_RINGS
	.comm	_EINVAL,4,2                     ## @EINVAL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"(%d) ring rptr_offs wb alloc failed\n"

L_.str.1:                               ## @.str.1
	.asciz	"(%d) ring wptr_offs wb alloc failed\n"

L_.str.2:                               ## @.str.2
	.asciz	"(%d) ring fence_offs wb alloc failed\n"

L_.str.3:                               ## @.str.3
	.asciz	"(%d) ring trail_fence_offs wb alloc failed\n"

L_.str.4:                               ## @.str.4
	.asciz	"(%d) ring cond_exec_polling wb alloc failed\n"

L_.str.5:                               ## @.str.5
	.asciz	"failed initializing fences (%d).\n"

	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_GTT,4,2      ## @AMDGPU_GEM_DOMAIN_GTT
L_.str.6:                               ## @.str.6
	.asciz	"(%d) ring create failed\n"

	.comm	_DRM_SCHED_PRIORITY_NORMAL,4,2  ## @DRM_SCHED_PRIORITY_NORMAL
	.comm	_DRM_SCHED_PRIORITY_MAX,4,2     ## @DRM_SCHED_PRIORITY_MAX
L_.str.7:                               ## @.str.7
	.asciz	"Failed to register debugfs file for rings !\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_ring_init               ; -- Begin function amdgpu_ring_init
	.p2align	2
_amdgpu_ring_init:                      ; @amdgpu_ring_init
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x4
	mov	x23, x3
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
	ldr	x8, [x1, #96]
Lloh0:
	adrp	x9, _amdgpu_sched_hw_submission@GOTPAGE
Lloh1:
	ldr	x9, [x9, _amdgpu_sched_hw_submission@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x9]
	ldr	x8, [x8]
Lloh3:
	adrp	x9, _AMDGPU_RING_TYPE_KIQ@GOTPAGE
Lloh4:
	ldr	x9, [x9, _AMDGPU_RING_TYPE_KIQ@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	mov	w1, #256
	bl	_max
	mov	x25, x0
	ldr	x8, [x20, #120]
	cbnz	x8, LBB0_3
	b	LBB0_5
LBB0_2:
	ldr	x8, [x19, #40]
	cmp	x8, x20
	mov	w8, #256
	csel	w25, w8, w0, eq
	ldr	x8, [x20, #120]
	cbz	x8, LBB0_5
LBB0_3:
	add	x1, x20, #8
	mov	x0, x19
	bl	_amdgpu_device_wb_get
	cbz	w0, LBB0_7
; %bb.4:
	mov	x24, x0
	ldr	w0, [x19, #8]
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_18
LBB0_5:
	ldr	x8, [x19]
Lloh8:
	adrp	x9, _AMDGPU_MAX_RINGS@GOTPAGE
Lloh9:
	ldr	x9, [x9, _AMDGPU_MAX_RINGS@GOTPAGEOFF]
Lloh10:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_9
; %bb.6:
	str	x19, [x20, #120]
	add	x9, x8, #1
	str	x9, [x19]
	str	x8, [x20]
	ldr	x9, [x19, #32]
	str	x20, [x9, x8, lsl #3]
	mov	x0, x20
	mov	x1, x25
	bl	_amdgpu_fence_driver_init_ring
	mov	x24, x0
	cbnz	w0, LBB0_19
	b	LBB0_3
LBB0_7:
	add	x1, x20, #12
	mov	x0, x19
	bl	_amdgpu_device_wb_get
	cbz	w0, LBB0_10
; %bb.8:
	mov	x24, x0
	ldr	w0, [x19, #8]
Lloh11:
	adrp	x1, l_.str.1@PAGE
Lloh12:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_18
LBB0_9:
Lloh13:
	adrp	x8, _EINVAL@GOTPAGE
Lloh14:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	neg	w24, w8
	b	LBB0_19
LBB0_10:
	add	x1, x20, #16
	mov	x0, x19
	bl	_amdgpu_device_wb_get
	cbz	w0, LBB0_12
; %bb.11:
	mov	x24, x0
	ldr	w0, [x19, #8]
Lloh16:
	adrp	x1, l_.str.2@PAGE
Lloh17:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_18
LBB0_12:
	add	x1, x20, #20
	mov	x0, x19
	bl	_amdgpu_device_wb_get
	cbz	w0, LBB0_14
; %bb.13:
	mov	x24, x0
	ldr	w0, [x19, #8]
Lloh18:
	adrp	x1, l_.str.3@PAGE
Lloh19:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_18
LBB0_14:
	ldrsw	x8, [x20, #20]
	lsl	x8, x8, #2
	ldp	x10, x9, [x19, #16]
	add	x9, x9, x8
	str	x9, [x20, #112]
	add	x8, x10, x8
	str	x8, [x20, #24]
	add	x1, x20, #32
	mov	x0, x19
	bl	_amdgpu_device_wb_get
	cbz	w0, LBB0_16
; %bb.15:
	mov	x24, x0
	ldr	w0, [x19, #8]
Lloh20:
	adrp	x1, l_.str.4@PAGE
Lloh21:
	add	x1, x1, l_.str.4@PAGEOFF
	b	LBB0_18
LBB0_16:
	ldrsw	x8, [x20, #32]
	lsl	x8, x8, #2
	ldp	x10, x9, [x19, #16]
	add	x9, x9, x8
	str	x9, [x20, #104]
	add	x9, x10, x8
	str	x9, [x20, #40]
	mov	w9, #1
	str	w9, [x10, x8]
	mov	x0, x20
	mov	x1, x23
	mov	x2, x22
	bl	_amdgpu_fence_driver_start_ring
	cbz	w0, LBB0_20
; %bb.17:
	mov	x24, x0
	ldr	w0, [x19, #8]
Lloh22:
	adrp	x1, l_.str.5@PAGE
Lloh23:
	add	x1, x1, l_.str.5@PAGEOFF
LBB0_18:
	mov	x2, x24
	bl	_dev_err
LBB0_19:
	mov	x0, x24
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_20:
	mul	w8, w21, w25
	lsl	w0, w8, #2
	bl	_roundup_pow_of_two
	mov	x4, x20
	ldr	x9, [x4, #88]!
	add	w8, w0, #3
	cmp	w0, #0
	csel	w8, w8, w0, lt
	asr	w8, w8, #2
	sub	w10, w8, #1
	stp	w0, w10, [x4, #-40]
	ldr	x8, [x4, #8]
	ldr	x11, [x8, #16]
	cmp	x11, #0
	csinv	w10, w10, wzr, eq
	stur	w10, [x4, #-32]
	cbz	x9, LBB0_27
LBB0_21:
	str	w21, [x20, #60]
Lloh24:
	adrp	x8, _DRM_SCHED_PRIORITY_NORMAL@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DRM_SCHED_PRIORITY_NORMAL@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	str	w8, [x20, #76]
	add	x0, x20, #72
	bl	_mutex_init
Lloh27:
	adrp	x21, _DRM_SCHED_PRIORITY_MAX@GOTPAGE
Lloh28:
	ldr	x21, [x21, _DRM_SCHED_PRIORITY_MAX@GOTPAGEOFF]
	ldr	w8, [x21]
	cmp	w8, #1
	b.lt	LBB0_24
; %bb.22:
	mov	x22, #0
	mov	x23, #0
LBB0_23:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x20, #64]
	add	x0, x8, x22
	mov	w1, #0
	bl	_atomic_set
	add	x23, x23, #1
	ldrsw	x8, [x21]
	add	x22, x22, #4
	cmp	x23, x8
	b.lt	LBB0_23
LBB0_24:
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_debugfs_ring_init
	cbz	x0, LBB0_26
; %bb.25:
Lloh29:
	adrp	x0, l_.str.7@PAGE
Lloh30:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	_DRM_ERROR
LBB0_26:
	mov	w24, #0
	b	LBB0_19
LBB0_27:
	ldr	w8, [x8, #8]
	add	w1, w8, w0
Lloh31:
	adrp	x8, _PAGE_SIZE@GOTPAGE
Lloh32:
	ldr	x8, [x8, _PAGE_SIZE@GOTPAGEOFF]
Lloh33:
	ldr	w2, [x8]
Lloh34:
	adrp	x8, _AMDGPU_GEM_DOMAIN_GTT@GOTPAGE
Lloh35:
	ldr	x8, [x8, _AMDGPU_GEM_DOMAIN_GTT@GOTPAGEOFF]
Lloh36:
	ldr	w3, [x8]
	add	x5, x20, #84
	add	x6, x20, #80
	mov	x0, x19
	bl	_amdgpu_bo_create_kernel
	cbz	w0, LBB0_29
; %bb.28:
	mov	x24, x0
	ldr	w0, [x19, #8]
Lloh37:
	adrp	x1, l_.str.6@PAGE
Lloh38:
	add	x1, x1, l_.str.6@PAGEOFF
	b	LBB0_18
LBB0_29:
	mov	x0, x20
	bl	_amdgpu_ring_clear_ring
	b	LBB0_21
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpAdd	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpAdd	Lloh37, Lloh38
	.cfi_endproc
                                        ; -- End function
	.comm	_amdgpu_sched_hw_submission,4,2 ; @amdgpu_sched_hw_submission
	.comm	_AMDGPU_RING_TYPE_KIQ,8,3       ; @AMDGPU_RING_TYPE_KIQ
	.comm	_AMDGPU_MAX_RINGS,8,3           ; @AMDGPU_MAX_RINGS
	.comm	_EINVAL,4,2                     ; @EINVAL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"(%d) ring rptr_offs wb alloc failed\n"

l_.str.1:                               ; @.str.1
	.asciz	"(%d) ring wptr_offs wb alloc failed\n"

l_.str.2:                               ; @.str.2
	.asciz	"(%d) ring fence_offs wb alloc failed\n"

l_.str.3:                               ; @.str.3
	.asciz	"(%d) ring trail_fence_offs wb alloc failed\n"

l_.str.4:                               ; @.str.4
	.asciz	"(%d) ring cond_exec_polling wb alloc failed\n"

l_.str.5:                               ; @.str.5
	.asciz	"failed initializing fences (%d).\n"

	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_GTT,4,2      ; @AMDGPU_GEM_DOMAIN_GTT
l_.str.6:                               ; @.str.6
	.asciz	"(%d) ring create failed\n"

	.comm	_DRM_SCHED_PRIORITY_NORMAL,4,2  ; @DRM_SCHED_PRIORITY_NORMAL
	.comm	_DRM_SCHED_PRIORITY_MAX,4,2     ; @DRM_SCHED_PRIORITY_MAX
l_.str.7:                               ; @.str.7
	.asciz	"Failed to register debugfs file for rings !\n"

.subsections_via_symbols
