	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cnl_calc_wrpll_link            ## -- Begin function cnl_calc_wrpll_link
	.p2align	4, 0x90
_cnl_calc_wrpll_link:                   ## @cnl_calc_wrpll_link
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	movl	(%rsi), %ebx
	movq	_DPLL_CFGCR1_PDIV_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	andl	%ebx, %r12d
	movq	_DPLL_CFGCR1_KDIV_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	andl	%ebx, %r14d
	movl	$1, %r13d
	movl	$1, %edi
	callq	_DPLL_CFGCR1_QDIV_MODE
	testl	%ebx, %eax
	je	LBB0_2
## %bb.1:
	movq	_DPLL_CFGCR1_QDIV_RATIO_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	andl	(%r15), %r13d
	movq	_DPLL_CFGCR1_QDIV_RATIO_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r13d
LBB0_2:
	leal	-128(%r12), %eax
	cmpl	$3, %eax
	ja	LBB0_4
## %bb.3:
	cltq
	leaq	L_switch.table.cnl_calc_wrpll_link(%rip), %rcx
	movl	(%rcx,%rax,4), %r12d
LBB0_4:
	leal	-132(%r14), %eax
	movl	$135, %ebx
	subl	%r14d, %ebx
	cmpl	$3, %eax
	cmovael	%r14d, %ebx
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_cnl_hdmi_pll_ref_clock
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	4(%r15), %eax
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movq	_DPLL_CFGCR0_DCO_INTEGER_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_DPLL_CFGCR0_DCO_FRACTION_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	_DPLL_CFGCR0_DCO_FRACTION_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	testl	%r12d, %r12d
	sete	%al
	testl	%r13d, %r13d
	sete	%cl
	orb	%al, %cl
	testl	%ebx, %ebx
	sete	%al
	orb	%cl, %al
	movzbl	%al, %edi
	callq	_WARN_ON
	movq	%rax, %rcx
	xorl	%eax, %eax
	testq	%rcx, %rcx
	jne	LBB0_6
## %bb.5:
	movl	-56(%rbp), %ecx                 ## 4-byte Reload
	andl	%ecx, %r15d
	movl	-48(%rbp), %eax                 ## 4-byte Reload
	imull	%eax, %r15d
	andl	%ecx, %r14d
	movl	-52(%rbp), %ecx                 ## 4-byte Reload
                                        ## kill: def $cl killed $cl killed $ecx
	sarl	%cl, %r14d
	imull	%eax, %r14d
	leal	32767(%r14), %eax
	testl	%r14d, %r14d
	cmovnsl	%r14d, %eax
	sarl	$15, %eax
	addl	%r15d, %eax
	imull	%r12d, %r13d
	imull	%ebx, %r13d
	leal	(%r13,%r13,4), %ecx
	cltd
	idivl	%ecx
LBB0_6:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DPLL_CFGCR1_PDIV_MASK,4,2      ## @DPLL_CFGCR1_PDIV_MASK
	.comm	_DPLL_CFGCR1_KDIV_MASK,4,2      ## @DPLL_CFGCR1_KDIV_MASK
	.comm	_DPLL_CFGCR1_QDIV_RATIO_MASK,4,2 ## @DPLL_CFGCR1_QDIV_RATIO_MASK
	.comm	_DPLL_CFGCR1_QDIV_RATIO_SHIFT,4,2 ## @DPLL_CFGCR1_QDIV_RATIO_SHIFT
	.comm	_DPLL_CFGCR0_DCO_INTEGER_MASK,4,2 ## @DPLL_CFGCR0_DCO_INTEGER_MASK
	.comm	_DPLL_CFGCR0_DCO_FRACTION_MASK,4,2 ## @DPLL_CFGCR0_DCO_FRACTION_MASK
	.comm	_DPLL_CFGCR0_DCO_FRACTION_SHIFT,4,2 ## @DPLL_CFGCR0_DCO_FRACTION_SHIFT
	.section	__TEXT,__literal16,16byte_literals
	.p2align	2                               ## @switch.table.cnl_calc_wrpll_link
L_switch.table.cnl_calc_wrpll_link:
	.long	7                               ## 0x7
	.long	5                               ## 0x5
	.long	3                               ## 0x3
	.long	2                               ## 0x2

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cnl_calc_wrpll_link            ; -- Begin function cnl_calc_wrpll_link
	.p2align	2
_cnl_calc_wrpll_link:                   ; @cnl_calc_wrpll_link
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _DPLL_CFGCR1_PDIV_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DPLL_CFGCR1_PDIV_MASK@GOTPAGEOFF]
	ldr	w23, [x1]
Lloh2:
	ldr	w8, [x8]
	and	w21, w8, w23
Lloh3:
	adrp	x8, _DPLL_CFGCR1_KDIV_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DPLL_CFGCR1_KDIV_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w24, [x8]
	mov	w22, #1
	mov	w0, #1
	bl	_DPLL_CFGCR1_QDIV_MODE
	tst	w0, w23
	b.eq	LBB0_2
; %bb.1:
	ldr	w8, [x19]
Lloh6:
	adrp	x9, _DPLL_CFGCR1_QDIV_RATIO_MASK@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DPLL_CFGCR1_QDIV_RATIO_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh9:
	adrp	x9, _DPLL_CFGCR1_QDIV_RATIO_SHIFT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _DPLL_CFGCR1_QDIV_RATIO_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	asr	w22, w8, w9
LBB0_2:
	and	w8, w24, w23
	sub	w9, w21, #128
	cmp	w9, #3
	b.hi	LBB0_4
; %bb.3:
Lloh12:
	adrp	x10, l_switch.table.cnl_calc_wrpll_link@PAGE
Lloh13:
	add	x10, x10, l_switch.table.cnl_calc_wrpll_link@PAGEOFF
	ldr	w21, [x10, w9, sxtw #2]
LBB0_4:
	sub	w9, w8, #132
	mov	w10, #135
	sub	w10, w10, w8
	cmp	w9, #3
	csel	w23, w10, w8, lo
	mov	x0, x20
	bl	_cnl_hdmi_pll_ref_clock
	mov	x20, x0
Lloh14:
	adrp	x8, _DPLL_CFGCR0_DCO_INTEGER_MASK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _DPLL_CFGCR0_DCO_INTEGER_MASK@GOTPAGEOFF]
	ldr	w19, [x19, #4]
Lloh16:
	ldr	w24, [x8]
Lloh17:
	adrp	x8, _DPLL_CFGCR0_DCO_FRACTION_MASK@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DPLL_CFGCR0_DCO_FRACTION_MASK@GOTPAGEOFF]
Lloh19:
	adrp	x9, _DPLL_CFGCR0_DCO_FRACTION_SHIFT@GOTPAGE
Lloh20:
	ldr	x9, [x9, _DPLL_CFGCR0_DCO_FRACTION_SHIFT@GOTPAGEOFF]
Lloh21:
	ldr	w26, [x8]
Lloh22:
	ldr	w25, [x9]
	cmp	w21, #0
	ccmp	w22, #0, #4, ne
	ccmp	w23, #0, #4, ne
	cset	w0, eq
	bl	_WARN_ON
	cbz	x0, LBB0_6
; %bb.5:
	mov	w0, #0
	b	LBB0_7
LBB0_6:
	and	w8, w24, w19
	mul	w8, w8, w20
	and	w9, w26, w19
	asr	w9, w9, w25
	mul	w9, w9, w20
	mov	w10, #32767
	add	w10, w9, w10
	cmp	w9, #0
	csel	w9, w10, w9, lt
	add	w8, w8, w9, asr #15
	mul	w9, w22, w21
	mul	w9, w9, w23
	add	w9, w9, w9, lsl #2
	sdiv	w0, w8, w9
LBB0_7:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh21
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_DPLL_CFGCR1_PDIV_MASK,4,2      ; @DPLL_CFGCR1_PDIV_MASK
	.comm	_DPLL_CFGCR1_KDIV_MASK,4,2      ; @DPLL_CFGCR1_KDIV_MASK
	.comm	_DPLL_CFGCR1_QDIV_RATIO_MASK,4,2 ; @DPLL_CFGCR1_QDIV_RATIO_MASK
	.comm	_DPLL_CFGCR1_QDIV_RATIO_SHIFT,4,2 ; @DPLL_CFGCR1_QDIV_RATIO_SHIFT
	.comm	_DPLL_CFGCR0_DCO_INTEGER_MASK,4,2 ; @DPLL_CFGCR0_DCO_INTEGER_MASK
	.comm	_DPLL_CFGCR0_DCO_FRACTION_MASK,4,2 ; @DPLL_CFGCR0_DCO_FRACTION_MASK
	.comm	_DPLL_CFGCR0_DCO_FRACTION_SHIFT,4,2 ; @DPLL_CFGCR0_DCO_FRACTION_SHIFT
	.section	__TEXT,__literal16,16byte_literals
	.p2align	2                               ; @switch.table.cnl_calc_wrpll_link
l_switch.table.cnl_calc_wrpll_link:
	.long	7                               ; 0x7
	.long	5                               ; 0x5
	.long	3                               ; 0x3
	.long	2                               ; 0x2

.subsections_via_symbols
