	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce4_crtc_do_set_base
_dce4_crtc_do_set_base:                 ## @dce4_crtc_do_set_base
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, %r13d
	movl	%ecx, -84(%rbp)                 ## 4-byte Spill
	movl	%edx, -88(%rbp)                 ## 4-byte Spill
	movq	%rsi, %r14
	movq	%rdi, %rbx
	callq	_to_radeon_crtc
	movq	%rax, %r12
	movq	24(%rbx), %rax
	movq	(%rax), %r15
	movq	_EVERGREEN_GRPH_ENDIAN_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_ENDIAN_SWAP
	movq	%r14, %rcx
	movl	%r13d, -80(%rbp)                ## 4-byte Spill
	testl	%r13d, %r13d
	movq	%r14, %r13
	jne	LBB0_3
## %bb.1:
	movq	(%rbx), %rcx
	movq	(%rcx), %r13
	testq	%r13, %r13
	je	LBB0_2
LBB0_3:
	movl	%eax, -76(%rbp)                 ## 4-byte Spill
	movq	%rbx, -120(%rbp)                ## 8-byte Spill
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	movq	16(%r13), %rax
	movq	(%rax), %rdi
	callq	_gem_to_radeon_bo
	movq	%rax, %r15
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	_radeon_bo_reserve
	movl	%eax, %ebx
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_80
## %bb.4:
	cmpl	$0, -80(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_8
## %bb.5:
	movq	%r15, %rdi
	callq	_radeon_bo_gpu_offset
	movq	%rax, -72(%rbp)
LBB0_6:
	xorl	%ebx, %ebx
	leaq	-100(%rbp), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_radeon_bo_get_tiling_flags
	movq	%r15, %rdi
	callq	_radeon_bo_unreserve
	movq	24(%r13), %rax
	movl	(%rax), %edi
	leal	-128(%rdi), %eax
	cmpl	$15, %eax
	ja	LBB0_31
## %bb.7:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_17:
	movq	_EVERGREEN_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_EVERGREEN_GRPH_FORMAT_ARGB8888@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_2:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_KMS
	jmp	LBB0_79
LBB0_8:
	movq	_RADEON_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-72(%rbp), %rdx
	movq	%r15, %rdi
	callq	_radeon_bo_pin
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_6
## %bb.9:
	movq	%r15, %rdi
	callq	_radeon_bo_unreserve
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_80
LBB0_13:
	movq	_EVERGREEN_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_EVERGREEN_GRPH_FORMAT_ARGB4444@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_18:
	movq	_EVERGREEN_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_EVERGREEN_GRPH_FORMAT_ARGB2101010@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_14:
	movq	_EVERGREEN_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_EVERGREEN_GRPH_FORMAT_ARGB1555@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_30:
	movq	_EVERGREEN_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_EVERGREEN_GRPH_FORMAT_ARGB8888@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_FORMAT
	movl	%eax, %r15d
	orl	%ebx, %r15d
	movq	_EVERGREEN_GRPH_RED_SEL_B@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_RED_CROSSBAR
	movl	%eax, %ebx
	movq	_EVERGREEN_GRPH_BLUE_SEL_R@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_BLUE_CROSSBAR
	orl	%ebx, %eax
	movl	%eax, -76(%rbp)                 ## 4-byte Spill
	jmp	LBB0_12
LBB0_15:
	movq	_EVERGREEN_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_EVERGREEN_GRPH_FORMAT_BGRA5551@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_29:
	movq	_EVERGREEN_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_EVERGREEN_GRPH_FORMAT_BGRA1010102@GOTPCREL(%rip), %rax
LBB0_19:
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_FORMAT
	movl	%eax, %r15d
	orl	%ebx, %r15d
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	jmp	LBB0_20
LBB0_31:
	leaq	-64(%rbp), %rsi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_drm_get_format_name
	leaq	L_.str.1(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_41
LBB0_16:
	movq	_EVERGREEN_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_EVERGREEN_GRPH_FORMAT_ARGB565@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_10:
	movq	_EVERGREEN_GRPH_DEPTH_8BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_EVERGREEN_GRPH_FORMAT_INDEXED@GOTPCREL(%rip), %rax
LBB0_11:
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_FORMAT
	movl	%eax, %r15d
	orl	%ebx, %r15d
LBB0_12:
	movb	$1, %al
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
LBB0_20:
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movl	-100(%rbp), %edi
	movq	_RADEON_TILING_MACRO@GOTPCREL(%rip), %rax
	testl	%edi, (%rax)
	movq	%r14, -112(%rbp)                ## 8-byte Spill
	je	LBB0_50
## %bb.21:
	leaq	-64(%rbp), %rsi
	leaq	-96(%rbp), %rdx
	leaq	-92(%rbp), %rcx
	leaq	-60(%rbp), %r8
	callq	_evergreen_tiling_fields
	movq	(%rbx), %rax
	movq	_CHIP_TAHITI@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_22
## %bb.42:
	movq	_CHIP_CAYMAN@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	cmpq	(%rcx), %rax
	setge	%dl
	movl	24(%rbx,%rdx,4), %eax
	shrl	$4, %eax
	andl	$15, %eax
	cmpl	$2, %eax
	je	LBB0_46
## %bb.43:
	testl	%eax, %eax
	jne	LBB0_45
## %bb.44:
	movq	_EVERGREEN_ADDR_SURF_4_BANK@GOTPCREL(%rip), %rax
	jmp	LBB0_47
LBB0_50:
	movq	_RADEON_TILING_MICRO@GOTPCREL(%rip), %rax
	testl	%edi, (%rax)
	je	LBB0_53
## %bb.51:
	movq	_EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_ARRAY_MODE
	jmp	LBB0_52
LBB0_22:
	movq	_CHIP_BONAIRE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_23
## %bb.32:
	movq	24(%r13), %rax
	movq	8(%rax), %rax
	movl	(%rax), %eax
	shll	$3, %eax
	cmpl	$8, %eax
	je	LBB0_33
## %bb.34:
	cmpl	$16, %eax
	jne	LBB0_36
## %bb.35:
	movq	_SI_TILE_MODE_COLOR_2D_SCANOUT_16BPP@GOTPCREL(%rip), %rax
	jmp	LBB0_37
LBB0_23:
	movb	-60(%rbp), %cl
	movl	$64, %edi
	shll	%cl, %edi
	movq	24(%r13), %rax
	movq	8(%rax), %rax
	movl	(%rax), %esi
	shll	$6, %esi
	callq	_min
	xorl	%edx, %edx
	cmpl	$65, %eax
	jb	LBB0_28
## %bb.24:
	movl	$-1, %edx
	movl	%eax, %ecx
	.p2align	4, 0x90
LBB0_25:                                ## =>This Inner Loop Header: Depth=1
	shrl	%ecx
	incl	%edx
	cmpl	$129, %eax
	movl	%ecx, %eax
	ja	LBB0_25
## %bb.26:
	cmpl	$14, %edx
	jbe	LBB0_27
## %bb.40:
	movq	24(%r13), %rax
	movq	8(%rax), %rax
	movl	(%rax), %esi
	shll	$3, %esi
	movl	-60(%rbp), %edx
	leaq	L_.str.2(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_ERROR
LBB0_41:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_80
LBB0_46:
	movq	_EVERGREEN_ADDR_SURF_16_BANK@GOTPCREL(%rip), %rax
	jmp	LBB0_47
LBB0_45:
	movq	_EVERGREEN_ADDR_SURF_8_BANK@GOTPCREL(%rip), %rax
LBB0_47:
	movl	(%rax), %edi
	jmp	LBB0_48
LBB0_33:
	movl	$10, %edx
	jmp	LBB0_38
LBB0_36:
	movq	_SI_TILE_MODE_COLOR_2D_SCANOUT_32BPP@GOTPCREL(%rip), %rax
LBB0_37:
	movl	(%rax), %edx
LBB0_38:
	leaq	32(%rbx), %rax
	movl	$20, %ecx
	jmp	LBB0_39
LBB0_27:
	incl	%edx
LBB0_28:
	leaq	8(%rbx), %rax
	movl	$6, %ecx
LBB0_39:
	movq	(%rax), %rax
	movl	%edx, %edx
	movl	(%rax,%rdx,4), %edi
                                        ## kill: def $cl killed $cl killed $ecx
	shrl	%cl, %edi
	andl	$3, %edi
LBB0_48:
	callq	_EVERGREEN_GRPH_NUM_BANKS
	movl	%eax, %r14d
	orl	%r15d, %r14d
	movq	_EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_GRPH_ARRAY_MODE
	movl	%eax, %r15d
	movl	-60(%rbp), %edi
	callq	_EVERGREEN_GRPH_TILE_SPLIT
	movl	%eax, %ebx
	orl	%r15d, %ebx
	movl	-64(%rbp), %edi
	callq	_EVERGREEN_GRPH_BANK_WIDTH
	movl	%eax, %r15d
	orl	%ebx, %r15d
	movl	-96(%rbp), %edi
	callq	_EVERGREEN_GRPH_BANK_HEIGHT
	movl	%eax, %ebx
	orl	%r15d, %ebx
	movl	-92(%rbp), %edi
	callq	_EVERGREEN_GRPH_MACRO_TILE_ASPECT
	movl	%eax, %r15d
	orl	%ebx, %r15d
	orl	%r14d, %r15d
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	(%rbx), %rax
	movq	_CHIP_BONAIRE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_53
## %bb.49:
	movq	_CIK_DISPLAY_MICRO_TILING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_CIK_GRPH_MICRO_TILE_MODE
LBB0_52:
	orl	%eax, %r15d
LBB0_53:
	movq	(%rbx), %rax
	movq	_CHIP_BONAIRE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_54
## %bb.55:
	movq	_CHIP_TAHITI@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_57
## %bb.56:
	movq	_CHIP_PITCAIRN@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_57
## %bb.58:
	movq	_CHIP_VERDE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_61
## %bb.59:
	movq	_CHIP_OLAND@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_61
## %bb.60:
	movq	_CHIP_HAINAN@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_64
LBB0_61:
	movq	_SI_ADDR_SURF_P4_8x16@GOTPCREL(%rip), %rax
	jmp	LBB0_62
LBB0_54:
	movq	16(%rbx), %rax
	movl	40(%rax), %edi
	shrl	$6, %edi
	andl	$31, %edi
	callq	_CIK_GRPH_PIPE_CONFIG
	jmp	LBB0_63
LBB0_57:
	movq	_SI_ADDR_SURF_P8_32x32_8x16@GOTPCREL(%rip), %rax
LBB0_62:
	movl	(%rax), %edi
	callq	_SI_GRPH_PIPE_CONFIG
LBB0_63:
	orl	%eax, %r15d
LBB0_64:
	movslq	(%r12), %rax
	cmpq	$5, %rax
	ja	LBB0_66
## %bb.65:
	leaq	l_switch.table.dce4_crtc_do_set_base(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
LBB0_66:
	movq	_EVERGREEN_GRPH_FLIP_CONTROL@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movq	8(%r12), %rbx
	addq	(%rax), %rbx
	movq	-72(%rbp), %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movq	8(%r12), %rbx
	addq	(%rax), %rbx
	movq	-72(%rbp), %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	movq	_EVERGREEN_GRPH_SURFACE_ADDRESS_MASK@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	andl	-72(%rbp), %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	movl	(%rbx), %esi
	andl	-72(%rbp), %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_CONTROL@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	movl	%r15d, %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_SWAP_CONTROL@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	movl	-76(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_EVERGREEN_GRPH_LUT_10BIT_BYPASS_CONTROL@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	movq	_EVERGREEN_LUT_10BIT_BYPASS_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	testb	%bl, %bl
	cmovel	%edx, %r14d
	notl	%edx
	movl	%r14d, %esi
	callq	_WREG32_P
	testb	%bl, %bl
	jne	LBB0_68
## %bb.67:
	leaq	L_.str.3(%rip), %rdi
	callq	_DRM_DEBUG_KMS
LBB0_68:
	movq	_EVERGREEN_GRPH_SURFACE_OFFSET_X@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_SURFACE_OFFSET_Y@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_X_START@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_Y_START@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_X_END@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	movl	(%r13), %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_Y_END@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	movl	4(%r13), %esi
	callq	_WREG32
	movq	8(%r13), %rax
	movq	24(%r13), %rcx
	movl	(%rax), %eax
	movq	8(%rcx), %rcx
	cltd
	idivl	(%rcx)
	movq	_EVERGREEN_GRPH_PITCH@GOTPCREL(%rip), %rcx
	movq	8(%r12), %rdi
	addq	(%rcx), %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_EVERGREEN_GRPH_ENABLE@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	movl	$1, %esi
	callq	_WREG32
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	movq	(%r15), %rax
	movq	_CHIP_BONAIRE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movq	-112(%rbp), %r14                ## 8-byte Reload
	movq	-120(%rbp), %rbx                ## 8-byte Reload
	jge	LBB0_69
## %bb.70:
	movq	_EVERGREEN_DESKTOP_HEIGHT@GOTPCREL(%rip), %rax
	jmp	LBB0_71
LBB0_69:
	movq	_CIK_LB_DESKTOP_HEIGHT@GOTPCREL(%rip), %rax
LBB0_71:
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	movl	4(%r13), %esi
	callq	_WREG32
	movq	_EVERGREEN_VIEWPORT_START@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	movl	-84(%rbp), %eax                 ## 4-byte Reload
	andl	$-2, %eax
	movl	-88(%rbp), %esi                 ## 4-byte Reload
	andl	$-4, %esi
	shll	$16, %esi
	orl	%eax, %esi
	callq	_WREG32
	movl	8(%rbx), %esi
	movl	12(%rbx), %eax
	incl	%eax
	andl	$-2, %eax
	movq	(%r15), %rcx
	movq	_CHIP_BONAIRE@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jl	LBB0_73
## %bb.72:
	movq	_DRM_MODE_FLAG_INTERLACE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, 16(%rbx)
	setne	%cl
	shll	%cl, %eax
LBB0_73:
	movq	_EVERGREEN_VIEWPORT_SIZE@GOTPCREL(%rip), %rcx
	movq	8(%r12), %rdi
	addq	(%rcx), %rdi
	shll	$16, %esi
	orl	%eax, %esi
	callq	_WREG32
	movq	_EVERGREEN_MASTER_UPDATE_MODE@GOTPCREL(%rip), %rax
	movq	8(%r12), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	testq	%r14, %r14
	je	LBB0_78
## %bb.74:
	cmpl	$0, -80(%rbp)                   ## 4-byte Folded Reload
	jne	LBB0_78
## %bb.75:
	movq	(%rbx), %rax
	cmpq	%r14, (%rax)
	je	LBB0_78
## %bb.76:
	movq	16(%r14), %rax
	movq	(%rax), %rdi
	callq	_gem_to_radeon_bo
	movq	%rax, %r14
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	_radeon_bo_reserve
	movl	%eax, %ebx
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_80
## %bb.77:
	movq	%r14, %rdi
	callq	_radeon_bo_unpin
	movq	%r14, %rdi
	callq	_radeon_bo_unreserve
	movq	-56(%rbp), %r15                 ## 8-byte Reload
LBB0_78:
	movq	%r15, %rdi
	callq	_radeon_bandwidth_update
LBB0_79:
	xorl	%ebx, %ebx
LBB0_80:
	movl	%ebx, %eax
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_17, LBB0_17-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
.set L0_0_set_30, LBB0_30-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_29, LBB0_29-LJTI0_0
LJTI0_0:
	.long	L0_0_set_17
	.long	L0_0_set_13
	.long	L0_0_set_18
	.long	L0_0_set_14
	.long	L0_0_set_30
	.long	L0_0_set_16
	.long	L0_0_set_10
	.long	L0_0_set_15
	.long	L0_0_set_29
	.long	L0_0_set_15
	.long	L0_0_set_29
	.long	L0_0_set_17
	.long	L0_0_set_13
	.long	L0_0_set_18
	.long	L0_0_set_14
	.long	L0_0_set_30
	.end_data_region
                                        ## -- End function
	.comm	_EVERGREEN_GRPH_ENDIAN_NONE,4,2 ## @EVERGREEN_GRPH_ENDIAN_NONE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"No FB bound\n"

	.comm	_RADEON_GEM_DOMAIN_VRAM,4,2     ## @RADEON_GEM_DOMAIN_VRAM
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_EVERGREEN_GRPH_DEPTH_8BPP,4,2  ## @EVERGREEN_GRPH_DEPTH_8BPP
	.comm	_EVERGREEN_GRPH_FORMAT_INDEXED,4,2 ## @EVERGREEN_GRPH_FORMAT_INDEXED
	.comm	_EVERGREEN_GRPH_DEPTH_16BPP,4,2 ## @EVERGREEN_GRPH_DEPTH_16BPP
	.comm	_EVERGREEN_GRPH_FORMAT_ARGB4444,4,2 ## @EVERGREEN_GRPH_FORMAT_ARGB4444
	.comm	_EVERGREEN_GRPH_FORMAT_ARGB1555,4,2 ## @EVERGREEN_GRPH_FORMAT_ARGB1555
	.comm	_EVERGREEN_GRPH_FORMAT_BGRA5551,4,2 ## @EVERGREEN_GRPH_FORMAT_BGRA5551
	.comm	_EVERGREEN_GRPH_FORMAT_ARGB565,4,2 ## @EVERGREEN_GRPH_FORMAT_ARGB565
	.comm	_EVERGREEN_GRPH_DEPTH_32BPP,4,2 ## @EVERGREEN_GRPH_DEPTH_32BPP
	.comm	_EVERGREEN_GRPH_FORMAT_ARGB8888,4,2 ## @EVERGREEN_GRPH_FORMAT_ARGB8888
	.comm	_EVERGREEN_GRPH_FORMAT_ARGB2101010,4,2 ## @EVERGREEN_GRPH_FORMAT_ARGB2101010
	.comm	_EVERGREEN_GRPH_FORMAT_BGRA1010102,4,2 ## @EVERGREEN_GRPH_FORMAT_BGRA1010102
	.comm	_EVERGREEN_GRPH_RED_SEL_B,4,2   ## @EVERGREEN_GRPH_RED_SEL_B
	.comm	_EVERGREEN_GRPH_BLUE_SEL_R,4,2  ## @EVERGREEN_GRPH_BLUE_SEL_R
L_.str.1:                               ## @.str.1
	.asciz	"Unsupported screen format %s\n"

	.comm	_RADEON_TILING_MACRO,4,2        ## @RADEON_TILING_MACRO
	.comm	_CHIP_TAHITI,8,3                ## @CHIP_TAHITI
	.comm	_CHIP_BONAIRE,8,3               ## @CHIP_BONAIRE
L_.str.2:                               ## @.str.2
	.asciz	"Wrong screen bpp (%u) or tile split (%u)\n"

	.comm	_SI_TILE_MODE_COLOR_2D_SCANOUT_16BPP,4,2 ## @SI_TILE_MODE_COLOR_2D_SCANOUT_16BPP
	.comm	_SI_TILE_MODE_COLOR_2D_SCANOUT_32BPP,4,2 ## @SI_TILE_MODE_COLOR_2D_SCANOUT_32BPP
	.comm	_CHIP_CAYMAN,8,3                ## @CHIP_CAYMAN
	.comm	_EVERGREEN_ADDR_SURF_4_BANK,4,2 ## @EVERGREEN_ADDR_SURF_4_BANK
	.comm	_EVERGREEN_ADDR_SURF_8_BANK,4,2 ## @EVERGREEN_ADDR_SURF_8_BANK
	.comm	_EVERGREEN_ADDR_SURF_16_BANK,4,2 ## @EVERGREEN_ADDR_SURF_16_BANK
	.comm	_EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1,4,2 ## @EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1
	.comm	_CIK_DISPLAY_MICRO_TILING,4,2   ## @CIK_DISPLAY_MICRO_TILING
	.comm	_RADEON_TILING_MICRO,4,2        ## @RADEON_TILING_MICRO
	.comm	_EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1,4,2 ## @EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1
	.comm	_CHIP_PITCAIRN,8,3              ## @CHIP_PITCAIRN
	.comm	_SI_ADDR_SURF_P8_32x32_8x16,4,2 ## @SI_ADDR_SURF_P8_32x32_8x16
	.comm	_CHIP_VERDE,8,3                 ## @CHIP_VERDE
	.comm	_CHIP_OLAND,8,3                 ## @CHIP_OLAND
	.comm	_CHIP_HAINAN,8,3                ## @CHIP_HAINAN
	.comm	_SI_ADDR_SURF_P4_8x16,4,2       ## @SI_ADDR_SURF_P4_8x16
	.comm	_AVIVO_D1VGA_CONTROL,8,3        ## @AVIVO_D1VGA_CONTROL
	.comm	_AVIVO_D2VGA_CONTROL,8,3        ## @AVIVO_D2VGA_CONTROL
	.comm	_EVERGREEN_D3VGA_CONTROL,8,3    ## @EVERGREEN_D3VGA_CONTROL
	.comm	_EVERGREEN_D4VGA_CONTROL,8,3    ## @EVERGREEN_D4VGA_CONTROL
	.comm	_EVERGREEN_D5VGA_CONTROL,8,3    ## @EVERGREEN_D5VGA_CONTROL
	.comm	_EVERGREEN_D6VGA_CONTROL,8,3    ## @EVERGREEN_D6VGA_CONTROL
	.comm	_EVERGREEN_GRPH_FLIP_CONTROL,8,3 ## @EVERGREEN_GRPH_FLIP_CONTROL
	.comm	_EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH,8,3 ## @EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH
	.comm	_EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH,8,3 ## @EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH
	.comm	_EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS,8,3 ## @EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS
	.comm	_EVERGREEN_GRPH_SURFACE_ADDRESS_MASK,4,2 ## @EVERGREEN_GRPH_SURFACE_ADDRESS_MASK
	.comm	_EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS,8,3 ## @EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS
	.comm	_EVERGREEN_GRPH_CONTROL,8,3     ## @EVERGREEN_GRPH_CONTROL
	.comm	_EVERGREEN_GRPH_SWAP_CONTROL,8,3 ## @EVERGREEN_GRPH_SWAP_CONTROL
	.comm	_EVERGREEN_GRPH_LUT_10BIT_BYPASS_CONTROL,8,3 ## @EVERGREEN_GRPH_LUT_10BIT_BYPASS_CONTROL
	.comm	_EVERGREEN_LUT_10BIT_BYPASS_EN,4,2 ## @EVERGREEN_LUT_10BIT_BYPASS_EN
L_.str.3:                               ## @.str.3
	.asciz	"Bypassing hardware LUT due to 10 bit fb scanout.\n"

	.comm	_EVERGREEN_GRPH_SURFACE_OFFSET_X,8,3 ## @EVERGREEN_GRPH_SURFACE_OFFSET_X
	.comm	_EVERGREEN_GRPH_SURFACE_OFFSET_Y,8,3 ## @EVERGREEN_GRPH_SURFACE_OFFSET_Y
	.comm	_EVERGREEN_GRPH_X_START,8,3     ## @EVERGREEN_GRPH_X_START
	.comm	_EVERGREEN_GRPH_Y_START,8,3     ## @EVERGREEN_GRPH_Y_START
	.comm	_EVERGREEN_GRPH_X_END,8,3       ## @EVERGREEN_GRPH_X_END
	.comm	_EVERGREEN_GRPH_Y_END,8,3       ## @EVERGREEN_GRPH_Y_END
	.comm	_EVERGREEN_GRPH_PITCH,8,3       ## @EVERGREEN_GRPH_PITCH
	.comm	_EVERGREEN_GRPH_ENABLE,8,3      ## @EVERGREEN_GRPH_ENABLE
	.comm	_CIK_LB_DESKTOP_HEIGHT,8,3      ## @CIK_LB_DESKTOP_HEIGHT
	.comm	_EVERGREEN_DESKTOP_HEIGHT,8,3   ## @EVERGREEN_DESKTOP_HEIGHT
	.comm	_EVERGREEN_VIEWPORT_START,8,3   ## @EVERGREEN_VIEWPORT_START
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ## @DRM_MODE_FLAG_INTERLACE
	.comm	_EVERGREEN_VIEWPORT_SIZE,8,3    ## @EVERGREEN_VIEWPORT_SIZE
	.comm	_EVERGREEN_MASTER_UPDATE_MODE,8,3 ## @EVERGREEN_MASTER_UPDATE_MODE
	.comm	_EVERGREEN_GRPH_ENDIAN_8IN16,4,2 ## @EVERGREEN_GRPH_ENDIAN_8IN16
	.comm	_EVERGREEN_GRPH_ENDIAN_8IN32,4,2 ## @EVERGREEN_GRPH_ENDIAN_8IN32
	.no_dead_strip	_dce4_crtc_do_set_base
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.dce4_crtc_do_set_base
l_switch.table.dce4_crtc_do_set_base:
	.quad	_AVIVO_D1VGA_CONTROL
	.quad	_AVIVO_D2VGA_CONTROL
	.quad	_EVERGREEN_D3VGA_CONTROL
	.quad	_EVERGREEN_D4VGA_CONTROL
	.quad	_EVERGREEN_D5VGA_CONTROL
	.quad	_EVERGREEN_D6VGA_CONTROL

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce4_crtc_do_set_base
_dce4_crtc_do_set_base:                 ; @dce4_crtc_do_set_base
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x4
	mov	x25, x3
	mov	x27, x2
	mov	x24, x1
	mov	x22, x0
	bl	_to_radeon_crtc
	mov	x23, x0
	ldr	x8, [x22, #24]
	ldr	x19, [x8]
Lloh0:
	adrp	x8, _EVERGREEN_GRPH_ENDIAN_NONE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EVERGREEN_GRPH_ENDIAN_NONE@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_ENDIAN_SWAP
	mov	x26, x0
	mov	x20, x24
	cbnz	w21, LBB0_2
; %bb.1:
	ldr	x8, [x22]
	ldr	x20, [x8]
	cbz	x20, LBB0_8
LBB0_2:
	str	w27, [sp, #16]                  ; 4-byte Folded Spill
	ldr	x8, [x20, #16]
	ldr	x0, [x8]
	bl	_gem_to_radeon_bo
	mov	x27, x0
	mov	w1, #0
	bl	_radeon_bo_reserve
	mov	x28, x0
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbnz	x0, LBB0_79
; %bb.3:
	cbz	w21, LBB0_9
; %bb.4:
	mov	x0, x27
	bl	_radeon_bo_gpu_offset
	str	x0, [sp, #40]
LBB0_5:
	add	x1, sp, #36
	mov	x0, x27
	mov	x2, #0
	bl	_radeon_bo_get_tiling_flags
	mov	x0, x27
	bl	_radeon_bo_unreserve
	ldr	x8, [x20, #24]
	ldr	w0, [x8]
	sub	w8, w0, #128
	cmp	w8, #15
	b.hi	LBB0_18
; %bb.6:
Lloh3:
	adrp	x9, lJTI0_0@PAGE
Lloh4:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_7
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_7:
Lloh5:
	adrp	x8, _EVERGREEN_GRPH_DEPTH_32BPP@GOTPAGE
Lloh6:
	ldr	x8, [x8, _EVERGREEN_GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_DEPTH
	mov	x27, x0
Lloh8:
	adrp	x8, _EVERGREEN_GRPH_FORMAT_ARGB8888@GOTPAGE
Lloh9:
	ldr	x8, [x8, _EVERGREEN_GRPH_FORMAT_ARGB8888@GOTPAGEOFF]
	b	LBB0_21
LBB0_8:
Lloh10:
	adrp	x0, l_.str@PAGE
Lloh11:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
	b	LBB0_78
LBB0_9:
Lloh12:
	adrp	x8, _RADEON_GEM_DOMAIN_VRAM@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RADEON_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	add	x2, sp, #40
	mov	x0, x27
	bl	_radeon_bo_pin
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbz	x0, LBB0_5
; %bb.10:
	mov	x0, x27
	bl	_radeon_bo_unreserve
	b	LBB0_40
LBB0_11:
Lloh15:
	adrp	x8, _EVERGREEN_GRPH_DEPTH_16BPP@GOTPAGE
Lloh16:
	ldr	x8, [x8, _EVERGREEN_GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_DEPTH
	mov	x27, x0
Lloh18:
	adrp	x8, _EVERGREEN_GRPH_FORMAT_ARGB4444@GOTPAGE
Lloh19:
	ldr	x8, [x8, _EVERGREEN_GRPH_FORMAT_ARGB4444@GOTPAGEOFF]
	b	LBB0_21
LBB0_12:
Lloh20:
	adrp	x8, _EVERGREEN_GRPH_DEPTH_32BPP@GOTPAGE
Lloh21:
	ldr	x8, [x8, _EVERGREEN_GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_DEPTH
	mov	x27, x0
Lloh23:
	adrp	x8, _EVERGREEN_GRPH_FORMAT_ARGB2101010@GOTPAGE
Lloh24:
	ldr	x8, [x8, _EVERGREEN_GRPH_FORMAT_ARGB2101010@GOTPAGEOFF]
	b	LBB0_17
LBB0_13:
Lloh25:
	adrp	x8, _EVERGREEN_GRPH_DEPTH_16BPP@GOTPAGE
Lloh26:
	ldr	x8, [x8, _EVERGREEN_GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh27:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_DEPTH
	mov	x27, x0
Lloh28:
	adrp	x8, _EVERGREEN_GRPH_FORMAT_ARGB1555@GOTPAGE
Lloh29:
	ldr	x8, [x8, _EVERGREEN_GRPH_FORMAT_ARGB1555@GOTPAGEOFF]
	b	LBB0_21
LBB0_14:
Lloh30:
	adrp	x8, _EVERGREEN_GRPH_DEPTH_32BPP@GOTPAGE
Lloh31:
	ldr	x8, [x8, _EVERGREEN_GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_DEPTH
	mov	x26, x0
Lloh33:
	adrp	x8, _EVERGREEN_GRPH_FORMAT_ARGB8888@GOTPAGE
Lloh34:
	ldr	x8, [x8, _EVERGREEN_GRPH_FORMAT_ARGB8888@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_FORMAT
	orr	w27, w0, w26
Lloh36:
	adrp	x8, _EVERGREEN_GRPH_RED_SEL_B@GOTPAGE
Lloh37:
	ldr	x8, [x8, _EVERGREEN_GRPH_RED_SEL_B@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_RED_CROSSBAR
	mov	x26, x0
Lloh39:
	adrp	x8, _EVERGREEN_GRPH_BLUE_SEL_R@GOTPAGE
Lloh40:
	ldr	x8, [x8, _EVERGREEN_GRPH_BLUE_SEL_R@GOTPAGEOFF]
Lloh41:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_BLUE_CROSSBAR
	orr	w26, w0, w26
	b	LBB0_22
LBB0_15:
Lloh42:
	adrp	x8, _EVERGREEN_GRPH_DEPTH_16BPP@GOTPAGE
Lloh43:
	ldr	x8, [x8, _EVERGREEN_GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_DEPTH
	mov	x27, x0
Lloh45:
	adrp	x8, _EVERGREEN_GRPH_FORMAT_BGRA5551@GOTPAGE
Lloh46:
	ldr	x8, [x8, _EVERGREEN_GRPH_FORMAT_BGRA5551@GOTPAGEOFF]
	b	LBB0_21
LBB0_16:
Lloh47:
	adrp	x8, _EVERGREEN_GRPH_DEPTH_32BPP@GOTPAGE
Lloh48:
	ldr	x8, [x8, _EVERGREEN_GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh49:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_DEPTH
	mov	x27, x0
Lloh50:
	adrp	x8, _EVERGREEN_GRPH_FORMAT_BGRA1010102@GOTPAGE
Lloh51:
	ldr	x8, [x8, _EVERGREEN_GRPH_FORMAT_BGRA1010102@GOTPAGEOFF]
LBB0_17:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_FORMAT
	str	wzr, [sp, #12]                  ; 4-byte Folded Spill
	orr	w27, w0, w27
	b	LBB0_23
LBB0_18:
	add	x1, sp, #32
	bl	_drm_get_format_name
	mov	x1, x0
Lloh52:
	adrp	x0, l_.str.1@PAGE
Lloh53:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_39
LBB0_19:
Lloh54:
	adrp	x8, _EVERGREEN_GRPH_DEPTH_16BPP@GOTPAGE
Lloh55:
	ldr	x8, [x8, _EVERGREEN_GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh56:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_DEPTH
	mov	x27, x0
Lloh57:
	adrp	x8, _EVERGREEN_GRPH_FORMAT_ARGB565@GOTPAGE
Lloh58:
	ldr	x8, [x8, _EVERGREEN_GRPH_FORMAT_ARGB565@GOTPAGEOFF]
	b	LBB0_21
LBB0_20:
Lloh59:
	adrp	x8, _EVERGREEN_GRPH_DEPTH_8BPP@GOTPAGE
Lloh60:
	ldr	x8, [x8, _EVERGREEN_GRPH_DEPTH_8BPP@GOTPAGEOFF]
Lloh61:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_DEPTH
	mov	x27, x0
Lloh62:
	adrp	x8, _EVERGREEN_GRPH_FORMAT_INDEXED@GOTPAGE
Lloh63:
	ldr	x8, [x8, _EVERGREEN_GRPH_FORMAT_INDEXED@GOTPAGEOFF]
LBB0_21:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_FORMAT
	orr	w27, w0, w27
LBB0_22:
	mov	w8, #1
	str	w8, [sp, #12]                   ; 4-byte Folded Spill
LBB0_23:
	ldr	w0, [sp, #36]
Lloh64:
	adrp	x8, _RADEON_TILING_MACRO@GOTPAGE
Lloh65:
	ldr	x8, [x8, _RADEON_TILING_MACRO@GOTPAGEOFF]
Lloh66:
	ldr	w8, [x8]
Lloh67:
	adrp	x28, _CHIP_TAHITI@GOTPAGE
Lloh68:
	ldr	x28, [x28, _CHIP_TAHITI@GOTPAGEOFF]
	tst	w8, w0
	b.eq	LBB0_28
; %bb.24:
	add	x1, sp, #32
	add	x2, sp, #28
	add	x3, sp, #24
	add	x4, sp, #20
	bl	_evergreen_tiling_fields
	ldr	x8, [x19]
	ldr	x9, [x28]
	cmp	x8, x9
	b.ge	LBB0_30
; %bb.25:
Lloh69:
	adrp	x9, _CHIP_CAYMAN@GOTPAGE
Lloh70:
	ldr	x9, [x9, _CHIP_CAYMAN@GOTPAGEOFF]
Lloh71:
	ldr	x9, [x9]
	mov	w10, #28
	mov	w11, #24
	cmp	x8, x9
	csel	x8, x11, x10, lt
	ldr	w8, [x19, x8]
	ubfx	w8, w8, #4, #4
	cmp	w8, #2
	b.eq	LBB0_41
; %bb.26:
	cbnz	w8, LBB0_42
; %bb.27:
Lloh72:
	adrp	x8, _EVERGREEN_ADDR_SURF_4_BANK@GOTPAGE
Lloh73:
	ldr	x8, [x8, _EVERGREEN_ADDR_SURF_4_BANK@GOTPAGEOFF]
	b	LBB0_43
LBB0_28:
Lloh74:
	adrp	x8, _RADEON_TILING_MICRO@GOTPAGE
Lloh75:
	ldr	x8, [x8, _RADEON_TILING_MICRO@GOTPAGEOFF]
Lloh76:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_55
; %bb.29:
Lloh77:
	adrp	x8, _EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1@GOTPAGE
Lloh78:
	ldr	x8, [x8, _EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1@GOTPAGEOFF]
Lloh79:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_ARRAY_MODE
	b	LBB0_54
LBB0_30:
Lloh80:
	adrp	x9, _CHIP_BONAIRE@GOTPAGE
Lloh81:
	ldr	x9, [x9, _CHIP_BONAIRE@GOTPAGEOFF]
Lloh82:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_34
; %bb.31:
	ldr	x8, [x20, #24]
	ldr	x8, [x8, #8]
	ldr	w8, [x8]
	lsl	w8, w8, #3
	cmp	w8, #8
	b.eq	LBB0_45
; %bb.32:
	cmp	w8, #16
	b.ne	LBB0_46
; %bb.33:
Lloh83:
	adrp	x8, _SI_TILE_MODE_COLOR_2D_SCANOUT_16BPP@GOTPAGE
Lloh84:
	ldr	x8, [x8, _SI_TILE_MODE_COLOR_2D_SCANOUT_16BPP@GOTPAGEOFF]
	b	LBB0_47
LBB0_34:
	ldr	w8, [sp, #20]
	mov	w9, #64
	lsl	w0, w9, w8
	ldr	x8, [x20, #24]
	ldr	x8, [x8, #8]
	ldr	w8, [x8]
	lsl	w1, w8, #6
	bl	_min
	cmp	w0, #65
	b.lo	LBB0_44
; %bb.35:
	mov	w8, #-1
LBB0_36:                                ; =>This Inner Loop Header: Depth=1
	lsr	w9, w0, #1
	add	w8, w8, #1
	cmp	w0, #129
	mov	x0, x9
	b.hi	LBB0_36
; %bb.37:
	cmp	w8, #14
	b.ls	LBB0_49
; %bb.38:
	ldr	x8, [x20, #24]
	ldr	x8, [x8, #8]
	ldr	w8, [x8]
	lsl	w1, w8, #3
	ldr	w8, [sp, #20]
	str	x8, [sp]
Lloh85:
	adrp	x0, l_.str.2@PAGE
Lloh86:
	add	x0, x0, l_.str.2@PAGEOFF
LBB0_39:
	bl	_DRM_ERROR
LBB0_40:
Lloh87:
	adrp	x8, _EINVAL@GOTPAGE
Lloh88:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh89:
	ldr	w8, [x8]
	neg	w28, w8
	b	LBB0_79
LBB0_41:
Lloh90:
	adrp	x8, _EVERGREEN_ADDR_SURF_16_BANK@GOTPAGE
Lloh91:
	ldr	x8, [x8, _EVERGREEN_ADDR_SURF_16_BANK@GOTPAGEOFF]
	b	LBB0_43
LBB0_42:
Lloh92:
	adrp	x8, _EVERGREEN_ADDR_SURF_8_BANK@GOTPAGE
Lloh93:
	ldr	x8, [x8, _EVERGREEN_ADDR_SURF_8_BANK@GOTPAGEOFF]
LBB0_43:
	ldr	w0, [x8]
	b	LBB0_52
LBB0_44:
	mov	w8, #0
	b	LBB0_50
LBB0_45:
	mov	w8, #10
	b	LBB0_48
LBB0_46:
Lloh94:
	adrp	x8, _SI_TILE_MODE_COLOR_2D_SCANOUT_32BPP@GOTPAGE
Lloh95:
	ldr	x8, [x8, _SI_TILE_MODE_COLOR_2D_SCANOUT_32BPP@GOTPAGEOFF]
LBB0_47:
	ldr	w8, [x8]
LBB0_48:
	add	x9, x19, #32
	mov	w10, #20
	b	LBB0_51
LBB0_49:
	add	w8, w8, #1
LBB0_50:
	add	x9, x19, #8
	mov	w10, #6
LBB0_51:
	ldr	x9, [x9]
	ldr	w8, [x9, w8, uxtw #2]
	lsr	w8, w8, w10
	and	w0, w8, #0x3
LBB0_52:
	bl	_EVERGREEN_GRPH_NUM_BANKS
	orr	w27, w0, w27
Lloh96:
	adrp	x8, _EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1@GOTPAGE
Lloh97:
	ldr	x8, [x8, _EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1@GOTPAGEOFF]
Lloh98:
	ldr	w0, [x8]
	bl	_EVERGREEN_GRPH_ARRAY_MODE
	orr	w27, w27, w0
	ldr	w0, [sp, #20]
	bl	_EVERGREEN_GRPH_TILE_SPLIT
	orr	w27, w27, w0
	ldr	w0, [sp, #32]
	bl	_EVERGREEN_GRPH_BANK_WIDTH
	orr	w27, w27, w0
	ldr	w0, [sp, #28]
	bl	_EVERGREEN_GRPH_BANK_HEIGHT
	orr	w27, w27, w0
	ldr	w0, [sp, #24]
	bl	_EVERGREEN_GRPH_MACRO_TILE_ASPECT
	orr	w27, w27, w0
	ldr	x8, [x19]
Lloh99:
	adrp	x9, _CHIP_BONAIRE@GOTPAGE
Lloh100:
	ldr	x9, [x9, _CHIP_BONAIRE@GOTPAGEOFF]
Lloh101:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_55
; %bb.53:
Lloh102:
	adrp	x8, _CIK_DISPLAY_MICRO_TILING@GOTPAGE
Lloh103:
	ldr	x8, [x8, _CIK_DISPLAY_MICRO_TILING@GOTPAGEOFF]
Lloh104:
	ldr	w0, [x8]
	bl	_CIK_GRPH_MICRO_TILE_MODE
LBB0_54:
	orr	w27, w0, w27
LBB0_55:
	ldr	x8, [x19]
Lloh105:
	adrp	x9, _CHIP_BONAIRE@GOTPAGE
Lloh106:
	ldr	x9, [x9, _CHIP_BONAIRE@GOTPAGEOFF]
Lloh107:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_62
; %bb.56:
	ldr	x9, [x28]
	cmp	x8, x9
	b.eq	LBB0_63
; %bb.57:
Lloh108:
	adrp	x9, _CHIP_PITCAIRN@GOTPAGE
Lloh109:
	ldr	x9, [x9, _CHIP_PITCAIRN@GOTPAGEOFF]
Lloh110:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_63
; %bb.58:
Lloh111:
	adrp	x9, _CHIP_VERDE@GOTPAGE
Lloh112:
	ldr	x9, [x9, _CHIP_VERDE@GOTPAGEOFF]
Lloh113:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_61
; %bb.59:
Lloh114:
	adrp	x9, _CHIP_OLAND@GOTPAGE
Lloh115:
	ldr	x9, [x9, _CHIP_OLAND@GOTPAGEOFF]
Lloh116:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_61
; %bb.60:
Lloh117:
	adrp	x9, _CHIP_HAINAN@GOTPAGE
Lloh118:
	ldr	x9, [x9, _CHIP_HAINAN@GOTPAGEOFF]
Lloh119:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_66
LBB0_61:
Lloh120:
	adrp	x8, _SI_ADDR_SURF_P4_8x16@GOTPAGE
Lloh121:
	ldr	x8, [x8, _SI_ADDR_SURF_P4_8x16@GOTPAGEOFF]
	b	LBB0_64
LBB0_62:
	ldr	x8, [x19, #16]
	ldr	w8, [x8, #40]
	ubfx	w0, w8, #6, #5
	bl	_CIK_GRPH_PIPE_CONFIG
	b	LBB0_65
LBB0_63:
Lloh122:
	adrp	x8, _SI_ADDR_SURF_P8_32x32_8x16@GOTPAGE
Lloh123:
	ldr	x8, [x8, _SI_ADDR_SURF_P8_32x32_8x16@GOTPAGEOFF]
LBB0_64:
	ldr	w0, [x8]
	bl	_SI_GRPH_PIPE_CONFIG
LBB0_65:
	orr	w27, w0, w27
LBB0_66:
	ldrsw	x8, [x23]
	cmp	w8, #5
	b.hi	LBB0_68
; %bb.67:
Lloh124:
	adrp	x9, l_switch.table.dce4_crtc_do_set_base@PAGE
Lloh125:
	add	x9, x9, l_switch.table.dce4_crtc_do_set_base@PAGEOFF
	ldr	x8, [x9, x8, lsl #3]
	ldr	x0, [x8]
	mov	w1, #0
	bl	_WREG32
LBB0_68:
Lloh126:
	adrp	x8, _EVERGREEN_GRPH_FLIP_CONTROL@GOTPAGE
Lloh127:
	ldr	x8, [x8, _EVERGREEN_GRPH_FLIP_CONTROL@GOTPAGEOFF]
Lloh128:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh129:
	adrp	x8, _EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh130:
	ldr	x8, [x8, _EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
Lloh131:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x28, x9, x8
	ldr	x0, [sp, #40]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x28
	bl	_WREG32
Lloh132:
	adrp	x8, _EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh133:
	ldr	x8, [x8, _EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
Lloh134:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x28, x9, x8
	ldr	x0, [sp, #40]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x28
	bl	_WREG32
Lloh135:
	adrp	x8, _EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS@GOTPAGE
Lloh136:
	ldr	x8, [x8, _EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS@GOTPAGEOFF]
Lloh137:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	ldr	w8, [sp, #40]
Lloh138:
	adrp	x28, _EVERGREEN_GRPH_SURFACE_ADDRESS_MASK@GOTPAGE
Lloh139:
	ldr	x28, [x28, _EVERGREEN_GRPH_SURFACE_ADDRESS_MASK@GOTPAGEOFF]
	ldr	w9, [x28]
	and	w1, w9, w8
	bl	_WREG32
Lloh140:
	adrp	x8, _EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS@GOTPAGE
Lloh141:
	ldr	x8, [x8, _EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS@GOTPAGEOFF]
Lloh142:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	ldr	w8, [sp, #40]
	ldr	w9, [x28]
	and	w1, w9, w8
	bl	_WREG32
Lloh143:
	adrp	x8, _EVERGREEN_GRPH_CONTROL@GOTPAGE
Lloh144:
	ldr	x8, [x8, _EVERGREEN_GRPH_CONTROL@GOTPAGEOFF]
Lloh145:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	mov	x1, x27
	bl	_WREG32
Lloh146:
	adrp	x8, _EVERGREEN_GRPH_SWAP_CONTROL@GOTPAGE
Lloh147:
	ldr	x8, [x8, _EVERGREEN_GRPH_SWAP_CONTROL@GOTPAGEOFF]
Lloh148:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	mov	x1, x26
	bl	_WREG32
Lloh149:
	adrp	x8, _EVERGREEN_GRPH_LUT_10BIT_BYPASS_CONTROL@GOTPAGE
Lloh150:
	ldr	x8, [x8, _EVERGREEN_GRPH_LUT_10BIT_BYPASS_CONTROL@GOTPAGEOFF]
Lloh151:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
Lloh152:
	adrp	x8, _EVERGREEN_LUT_10BIT_BYPASS_EN@GOTPAGE
Lloh153:
	ldr	x8, [x8, _EVERGREEN_LUT_10BIT_BYPASS_EN@GOTPAGEOFF]
Lloh154:
	ldr	w8, [x8]
	ldr	w26, [sp, #12]                  ; 4-byte Folded Reload
	cmp	w26, #0
	csel	w1, wzr, w8, ne
	mvn	w2, w8
	bl	_WREG32_P
	tbnz	w26, #0, LBB0_70
; %bb.69:
Lloh155:
	adrp	x0, l_.str.3@PAGE
Lloh156:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_DEBUG_KMS
LBB0_70:
Lloh157:
	adrp	x8, _EVERGREEN_GRPH_SURFACE_OFFSET_X@GOTPAGE
Lloh158:
	ldr	x8, [x8, _EVERGREEN_GRPH_SURFACE_OFFSET_X@GOTPAGEOFF]
Lloh159:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh160:
	adrp	x8, _EVERGREEN_GRPH_SURFACE_OFFSET_Y@GOTPAGE
Lloh161:
	ldr	x8, [x8, _EVERGREEN_GRPH_SURFACE_OFFSET_Y@GOTPAGEOFF]
Lloh162:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh163:
	adrp	x8, _EVERGREEN_GRPH_X_START@GOTPAGE
Lloh164:
	ldr	x8, [x8, _EVERGREEN_GRPH_X_START@GOTPAGEOFF]
Lloh165:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh166:
	adrp	x8, _EVERGREEN_GRPH_Y_START@GOTPAGE
Lloh167:
	ldr	x8, [x8, _EVERGREEN_GRPH_Y_START@GOTPAGEOFF]
Lloh168:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh169:
	adrp	x8, _EVERGREEN_GRPH_X_END@GOTPAGE
Lloh170:
	ldr	x8, [x8, _EVERGREEN_GRPH_X_END@GOTPAGEOFF]
Lloh171:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	ldr	w1, [x20]
	bl	_WREG32
Lloh172:
	adrp	x8, _EVERGREEN_GRPH_Y_END@GOTPAGE
Lloh173:
	ldr	x8, [x8, _EVERGREEN_GRPH_Y_END@GOTPAGEOFF]
Lloh174:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	ldr	w1, [x20, #4]
	bl	_WREG32
	ldr	x8, [x20, #8]
	ldr	w8, [x8]
	ldr	x9, [x20, #24]
	ldr	x9, [x9, #8]
	ldr	w9, [x9]
	sdiv	w1, w8, w9
Lloh175:
	adrp	x8, _EVERGREEN_GRPH_PITCH@GOTPAGE
Lloh176:
	ldr	x8, [x8, _EVERGREEN_GRPH_PITCH@GOTPAGEOFF]
Lloh177:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	bl	_WREG32
Lloh178:
	adrp	x8, _EVERGREEN_GRPH_ENABLE@GOTPAGE
Lloh179:
	ldr	x8, [x8, _EVERGREEN_GRPH_ENABLE@GOTPAGEOFF]
Lloh180:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	mov	w1, #1
	bl	_WREG32
	ldr	x8, [x19]
Lloh181:
	adrp	x26, _CHIP_BONAIRE@GOTPAGE
Lloh182:
	ldr	x26, [x26, _CHIP_BONAIRE@GOTPAGEOFF]
	ldr	x9, [x26]
Lloh183:
	adrp	x10, _EVERGREEN_DESKTOP_HEIGHT@GOTPAGE
Lloh184:
	ldr	x10, [x10, _EVERGREEN_DESKTOP_HEIGHT@GOTPAGEOFF]
Lloh185:
	adrp	x11, _CIK_LB_DESKTOP_HEIGHT@GOTPAGE
Lloh186:
	ldr	x11, [x11, _CIK_LB_DESKTOP_HEIGHT@GOTPAGEOFF]
	cmp	x8, x9
	csel	x8, x10, x11, lt
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	ldr	w1, [x20, #4]
	bl	_WREG32
	and	w8, w25, #0xfffffffe
Lloh187:
	adrp	x9, _EVERGREEN_VIEWPORT_START@GOTPAGE
Lloh188:
	ldr	x9, [x9, _EVERGREEN_VIEWPORT_START@GOTPAGEOFF]
Lloh189:
	ldr	x9, [x9]
	ldr	x10, [x23, #8]
	add	x0, x10, x9
	ldr	w9, [sp, #16]                   ; 4-byte Folded Reload
	lsl	w9, w9, #16
	and	w9, w9, #0xfffc0000
	orr	w1, w9, w8
	bl	_WREG32
	ldp	w8, w9, [x22, #8]
	add	w9, w9, #1
	and	w9, w9, #0xfffffffe
	ldr	x10, [x19]
	ldr	x11, [x26]
	cmp	x10, x11
	b.lt	LBB0_72
; %bb.71:
	ldr	w10, [x22, #16]
Lloh190:
	adrp	x11, _DRM_MODE_FLAG_INTERLACE@GOTPAGE
Lloh191:
	ldr	x11, [x11, _DRM_MODE_FLAG_INTERLACE@GOTPAGEOFF]
Lloh192:
	ldr	w11, [x11]
	tst	w11, w10
	cset	w10, ne
	lsl	w9, w9, w10
LBB0_72:
Lloh193:
	adrp	x10, _EVERGREEN_VIEWPORT_SIZE@GOTPAGE
Lloh194:
	ldr	x10, [x10, _EVERGREEN_VIEWPORT_SIZE@GOTPAGEOFF]
Lloh195:
	ldr	x10, [x10]
	ldr	x11, [x23, #8]
	add	x0, x11, x10
	orr	w1, w9, w8, lsl #16
	bl	_WREG32
Lloh196:
	adrp	x8, _EVERGREEN_MASTER_UPDATE_MODE@GOTPAGE
Lloh197:
	ldr	x8, [x8, _EVERGREEN_MASTER_UPDATE_MODE@GOTPAGEOFF]
Lloh198:
	ldr	x8, [x8]
	ldr	x9, [x23, #8]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	cbz	x24, LBB0_77
; %bb.73:
	cbnz	w21, LBB0_77
; %bb.74:
	ldr	x8, [x22]
	ldr	x8, [x8]
	cmp	x8, x24
	b.eq	LBB0_77
; %bb.75:
	ldr	x8, [x24, #16]
	ldr	x0, [x8]
	bl	_gem_to_radeon_bo
	mov	x20, x0
	mov	w1, #0
	bl	_radeon_bo_reserve
	mov	x28, x0
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbnz	x0, LBB0_79
; %bb.76:
	mov	x0, x20
	bl	_radeon_bo_unpin
	mov	x0, x20
	bl	_radeon_bo_unreserve
LBB0_77:
	mov	x0, x19
	bl	_radeon_bandwidth_update
LBB0_78:
	mov	w28, #0
LBB0_79:
	mov	x0, x28
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpAdd	Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGot	Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGot	Lloh83, Lloh84
	.loh AdrpAdd	Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGot	Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGot	Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.loh AdrpLdrGot	Lloh120, Lloh121
	.loh AdrpLdrGot	Lloh122, Lloh123
	.loh AdrpAdd	Lloh124, Lloh125
	.loh AdrpLdrGotLdr	Lloh152, Lloh153, Lloh154
	.loh AdrpLdrGotLdr	Lloh149, Lloh150, Lloh151
	.loh AdrpLdrGotLdr	Lloh146, Lloh147, Lloh148
	.loh AdrpLdrGotLdr	Lloh143, Lloh144, Lloh145
	.loh AdrpLdrGotLdr	Lloh140, Lloh141, Lloh142
	.loh AdrpLdrGot	Lloh138, Lloh139
	.loh AdrpLdrGotLdr	Lloh135, Lloh136, Lloh137
	.loh AdrpLdrGotLdr	Lloh132, Lloh133, Lloh134
	.loh AdrpLdrGotLdr	Lloh129, Lloh130, Lloh131
	.loh AdrpLdrGotLdr	Lloh126, Lloh127, Lloh128
	.loh AdrpAdd	Lloh155, Lloh156
	.loh AdrpLdrGotLdr	Lloh187, Lloh188, Lloh189
	.loh AdrpLdrGot	Lloh185, Lloh186
	.loh AdrpLdrGot	Lloh183, Lloh184
	.loh AdrpLdrGot	Lloh181, Lloh182
	.loh AdrpLdrGotLdr	Lloh178, Lloh179, Lloh180
	.loh AdrpLdrGotLdr	Lloh175, Lloh176, Lloh177
	.loh AdrpLdrGotLdr	Lloh172, Lloh173, Lloh174
	.loh AdrpLdrGotLdr	Lloh169, Lloh170, Lloh171
	.loh AdrpLdrGotLdr	Lloh166, Lloh167, Lloh168
	.loh AdrpLdrGotLdr	Lloh163, Lloh164, Lloh165
	.loh AdrpLdrGotLdr	Lloh160, Lloh161, Lloh162
	.loh AdrpLdrGotLdr	Lloh157, Lloh158, Lloh159
	.loh AdrpLdrGotLdr	Lloh190, Lloh191, Lloh192
	.loh AdrpLdrGotLdr	Lloh196, Lloh197, Lloh198
	.loh AdrpLdrGotLdr	Lloh193, Lloh194, Lloh195
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_11-LBB0_7)>>2
	.byte	(LBB0_12-LBB0_7)>>2
	.byte	(LBB0_13-LBB0_7)>>2
	.byte	(LBB0_14-LBB0_7)>>2
	.byte	(LBB0_19-LBB0_7)>>2
	.byte	(LBB0_20-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_16-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_16-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_11-LBB0_7)>>2
	.byte	(LBB0_12-LBB0_7)>>2
	.byte	(LBB0_13-LBB0_7)>>2
	.byte	(LBB0_14-LBB0_7)>>2
                                        ; -- End function
	.comm	_EVERGREEN_GRPH_ENDIAN_NONE,4,2 ; @EVERGREEN_GRPH_ENDIAN_NONE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"No FB bound\n"

	.comm	_RADEON_GEM_DOMAIN_VRAM,4,2     ; @RADEON_GEM_DOMAIN_VRAM
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_EVERGREEN_GRPH_DEPTH_8BPP,4,2  ; @EVERGREEN_GRPH_DEPTH_8BPP
	.comm	_EVERGREEN_GRPH_FORMAT_INDEXED,4,2 ; @EVERGREEN_GRPH_FORMAT_INDEXED
	.comm	_EVERGREEN_GRPH_DEPTH_16BPP,4,2 ; @EVERGREEN_GRPH_DEPTH_16BPP
	.comm	_EVERGREEN_GRPH_FORMAT_ARGB4444,4,2 ; @EVERGREEN_GRPH_FORMAT_ARGB4444
	.comm	_EVERGREEN_GRPH_FORMAT_ARGB1555,4,2 ; @EVERGREEN_GRPH_FORMAT_ARGB1555
	.comm	_EVERGREEN_GRPH_FORMAT_BGRA5551,4,2 ; @EVERGREEN_GRPH_FORMAT_BGRA5551
	.comm	_EVERGREEN_GRPH_FORMAT_ARGB565,4,2 ; @EVERGREEN_GRPH_FORMAT_ARGB565
	.comm	_EVERGREEN_GRPH_DEPTH_32BPP,4,2 ; @EVERGREEN_GRPH_DEPTH_32BPP
	.comm	_EVERGREEN_GRPH_FORMAT_ARGB8888,4,2 ; @EVERGREEN_GRPH_FORMAT_ARGB8888
	.comm	_EVERGREEN_GRPH_FORMAT_ARGB2101010,4,2 ; @EVERGREEN_GRPH_FORMAT_ARGB2101010
	.comm	_EVERGREEN_GRPH_FORMAT_BGRA1010102,4,2 ; @EVERGREEN_GRPH_FORMAT_BGRA1010102
	.comm	_EVERGREEN_GRPH_RED_SEL_B,4,2   ; @EVERGREEN_GRPH_RED_SEL_B
	.comm	_EVERGREEN_GRPH_BLUE_SEL_R,4,2  ; @EVERGREEN_GRPH_BLUE_SEL_R
l_.str.1:                               ; @.str.1
	.asciz	"Unsupported screen format %s\n"

	.comm	_RADEON_TILING_MACRO,4,2        ; @RADEON_TILING_MACRO
	.comm	_CHIP_TAHITI,8,3                ; @CHIP_TAHITI
	.comm	_CHIP_BONAIRE,8,3               ; @CHIP_BONAIRE
l_.str.2:                               ; @.str.2
	.asciz	"Wrong screen bpp (%u) or tile split (%u)\n"

	.comm	_SI_TILE_MODE_COLOR_2D_SCANOUT_16BPP,4,2 ; @SI_TILE_MODE_COLOR_2D_SCANOUT_16BPP
	.comm	_SI_TILE_MODE_COLOR_2D_SCANOUT_32BPP,4,2 ; @SI_TILE_MODE_COLOR_2D_SCANOUT_32BPP
	.comm	_CHIP_CAYMAN,8,3                ; @CHIP_CAYMAN
	.comm	_EVERGREEN_ADDR_SURF_4_BANK,4,2 ; @EVERGREEN_ADDR_SURF_4_BANK
	.comm	_EVERGREEN_ADDR_SURF_8_BANK,4,2 ; @EVERGREEN_ADDR_SURF_8_BANK
	.comm	_EVERGREEN_ADDR_SURF_16_BANK,4,2 ; @EVERGREEN_ADDR_SURF_16_BANK
	.comm	_EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1,4,2 ; @EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1
	.comm	_CIK_DISPLAY_MICRO_TILING,4,2   ; @CIK_DISPLAY_MICRO_TILING
	.comm	_RADEON_TILING_MICRO,4,2        ; @RADEON_TILING_MICRO
	.comm	_EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1,4,2 ; @EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1
	.comm	_CHIP_PITCAIRN,8,3              ; @CHIP_PITCAIRN
	.comm	_SI_ADDR_SURF_P8_32x32_8x16,4,2 ; @SI_ADDR_SURF_P8_32x32_8x16
	.comm	_CHIP_VERDE,8,3                 ; @CHIP_VERDE
	.comm	_CHIP_OLAND,8,3                 ; @CHIP_OLAND
	.comm	_CHIP_HAINAN,8,3                ; @CHIP_HAINAN
	.comm	_SI_ADDR_SURF_P4_8x16,4,2       ; @SI_ADDR_SURF_P4_8x16
	.comm	_AVIVO_D1VGA_CONTROL,8,3        ; @AVIVO_D1VGA_CONTROL
	.comm	_AVIVO_D2VGA_CONTROL,8,3        ; @AVIVO_D2VGA_CONTROL
	.comm	_EVERGREEN_D3VGA_CONTROL,8,3    ; @EVERGREEN_D3VGA_CONTROL
	.comm	_EVERGREEN_D4VGA_CONTROL,8,3    ; @EVERGREEN_D4VGA_CONTROL
	.comm	_EVERGREEN_D5VGA_CONTROL,8,3    ; @EVERGREEN_D5VGA_CONTROL
	.comm	_EVERGREEN_D6VGA_CONTROL,8,3    ; @EVERGREEN_D6VGA_CONTROL
	.comm	_EVERGREEN_GRPH_FLIP_CONTROL,8,3 ; @EVERGREEN_GRPH_FLIP_CONTROL
	.comm	_EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH,8,3 ; @EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH
	.comm	_EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH,8,3 ; @EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH
	.comm	_EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS,8,3 ; @EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS
	.comm	_EVERGREEN_GRPH_SURFACE_ADDRESS_MASK,4,2 ; @EVERGREEN_GRPH_SURFACE_ADDRESS_MASK
	.comm	_EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS,8,3 ; @EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS
	.comm	_EVERGREEN_GRPH_CONTROL,8,3     ; @EVERGREEN_GRPH_CONTROL
	.comm	_EVERGREEN_GRPH_SWAP_CONTROL,8,3 ; @EVERGREEN_GRPH_SWAP_CONTROL
	.comm	_EVERGREEN_GRPH_LUT_10BIT_BYPASS_CONTROL,8,3 ; @EVERGREEN_GRPH_LUT_10BIT_BYPASS_CONTROL
	.comm	_EVERGREEN_LUT_10BIT_BYPASS_EN,4,2 ; @EVERGREEN_LUT_10BIT_BYPASS_EN
l_.str.3:                               ; @.str.3
	.asciz	"Bypassing hardware LUT due to 10 bit fb scanout.\n"

	.comm	_EVERGREEN_GRPH_SURFACE_OFFSET_X,8,3 ; @EVERGREEN_GRPH_SURFACE_OFFSET_X
	.comm	_EVERGREEN_GRPH_SURFACE_OFFSET_Y,8,3 ; @EVERGREEN_GRPH_SURFACE_OFFSET_Y
	.comm	_EVERGREEN_GRPH_X_START,8,3     ; @EVERGREEN_GRPH_X_START
	.comm	_EVERGREEN_GRPH_Y_START,8,3     ; @EVERGREEN_GRPH_Y_START
	.comm	_EVERGREEN_GRPH_X_END,8,3       ; @EVERGREEN_GRPH_X_END
	.comm	_EVERGREEN_GRPH_Y_END,8,3       ; @EVERGREEN_GRPH_Y_END
	.comm	_EVERGREEN_GRPH_PITCH,8,3       ; @EVERGREEN_GRPH_PITCH
	.comm	_EVERGREEN_GRPH_ENABLE,8,3      ; @EVERGREEN_GRPH_ENABLE
	.comm	_CIK_LB_DESKTOP_HEIGHT,8,3      ; @CIK_LB_DESKTOP_HEIGHT
	.comm	_EVERGREEN_DESKTOP_HEIGHT,8,3   ; @EVERGREEN_DESKTOP_HEIGHT
	.comm	_EVERGREEN_VIEWPORT_START,8,3   ; @EVERGREEN_VIEWPORT_START
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ; @DRM_MODE_FLAG_INTERLACE
	.comm	_EVERGREEN_VIEWPORT_SIZE,8,3    ; @EVERGREEN_VIEWPORT_SIZE
	.comm	_EVERGREEN_MASTER_UPDATE_MODE,8,3 ; @EVERGREEN_MASTER_UPDATE_MODE
	.comm	_EVERGREEN_GRPH_ENDIAN_8IN16,4,2 ; @EVERGREEN_GRPH_ENDIAN_8IN16
	.comm	_EVERGREEN_GRPH_ENDIAN_8IN32,4,2 ; @EVERGREEN_GRPH_ENDIAN_8IN32
	.no_dead_strip	_dce4_crtc_do_set_base
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.dce4_crtc_do_set_base
l_switch.table.dce4_crtc_do_set_base:
	.quad	_AVIVO_D1VGA_CONTROL
	.quad	_AVIVO_D2VGA_CONTROL
	.quad	_EVERGREEN_D3VGA_CONTROL
	.quad	_EVERGREEN_D4VGA_CONTROL
	.quad	_EVERGREEN_D5VGA_CONTROL
	.quad	_EVERGREEN_D6VGA_CONTROL

.subsections_via_symbols
