	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vmw_fifo_init                  ## -- Begin function vmw_fifo_init
	.p2align	4, 0x90
_vmw_fifo_init:                         ## @vmw_fifo_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r12
	movq	40(%rdi), %r15
	movl	$0, (%rsi)
	movq	_VMWGFX_FIFO_STATIC_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, 56(%rsi)
	callq	_vmalloc
	movq	%rax, 48(%r14)
	xorl	%edi, %edi
	testq	%rax, %rax
	sete	%dil
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_ENOMEM@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_6
LBB0_2:
	movl	$0, 4(%r14)
	leaq	28(%r14), %rdi
	xorps	%xmm0, %xmm0
	movups	%xmm0, 32(%r14)
	callq	_mutex_init
	leaq	24(%r14), %rdi
	callq	_init_rwsem
	movq	_SVGA_REG_WIDTH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_vmw_read
	leaq	L_.str(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_INFO
	movq	_SVGA_REG_HEIGHT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_vmw_read
	leaq	L_.str.1(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_INFO
	movq	_SVGA_REG_BITS_PER_PIXEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_vmw_read
	leaq	L_.str.2(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_INFO
	movq	_SVGA_REG_ENABLE@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	%r12, %rdi
	callq	_vmw_read
	movq	%rax, 32(%r12)
	movq	_SVGA_REG_CONFIG_DONE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_vmw_read
	movq	%rax, 24(%r12)
	movq	_SVGA_REG_TRACES@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_vmw_read
	movq	%rax, 16(%r12)
	movl	(%r13), %esi
	movq	_SVGA_REG_ENABLE_ENABLE@GOTPCREL(%rip), %rax
	movq	_SVGA_REG_ENABLE_HIDE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	%r12, %rdi
	callq	_vmw_write
	movl	(%rbx), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_vmw_write
	movq	_SVGA_CAP_EXTENDED_FIFO@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	je	LBB0_3
## %bb.4:
	movq	_SVGA_REG_MEM_REGS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_vmw_read
	shll	$2, %eax
	jmp	LBB0_5
LBB0_3:
	movl	$16, %eax
LBB0_5:
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	cmpl	%ebx, %eax
	cmovgl	%eax, %ebx
	movq	_SVGA_FIFO_MIN@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%r15,%rax,4), %rsi
	movl	%ebx, %edi
	callq	_vmw_mmio_write
	movl	4(%r12), %edi
	movq	_SVGA_FIFO_MAX@GOTPCREL(%rip), %r13
	movslq	(%r13), %rax
	leaq	(%r15,%rax,4), %rsi
	callq	_vmw_mmio_write
	xorl	%eax, %eax
	callq	_wmb
	movq	_SVGA_FIFO_NEXT_CMD@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%r15,%rax,4), %rsi
	movl	%ebx, %edi
	callq	_vmw_mmio_write
	movq	_SVGA_FIFO_STOP@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%r15,%rax,4), %rsi
	movl	%ebx, %edi
	callq	_vmw_mmio_write
	movq	_SVGA_FIFO_BUSY@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%r15,%rax,4), %rsi
	xorl	%edi, %edi
	callq	_vmw_mmio_write
	xorl	%eax, %eax
	callq	_mb
	movq	_SVGA_REG_CONFIG_DONE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movl	$1, %edx
	callq	_vmw_write
	movslq	(%r13), %rax
	leaq	(%r15,%rax,4), %rdi
	callq	_vmw_mmio_read
	movq	%rax, %r13
	movq	_SVGA_FIFO_MIN@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%r15,%rax,4), %rdi
	callq	_vmw_mmio_read
	movq	%rax, %rbx
	movq	_SVGA_FIFO_CAPABILITIES@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%r15,%rax,4), %rdi
	callq	_vmw_mmio_read
	movq	%rax, 16(%r14)
	leaq	L_.str.3(%rip), %rdi
	movl	%r13d, %esi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_DRM_INFO
	leaq	12(%r12), %rdi
	movl	8(%r12), %esi
	callq	_atomic_set
	movl	8(%r12), %edi
	movq	_SVGA_FIFO_FENCE@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%r15,%rax,4), %rsi
	callq	_vmw_mmio_write
	addq	$8, %r14
	movq	%r14, %rdi
	callq	_vmw_marker_queue_init
	xorl	%eax, %eax
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VMWGFX_FIFO_STATIC_SIZE,4,2    ## @VMWGFX_FIFO_STATIC_SIZE
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"width %d\n"

	.comm	_SVGA_REG_WIDTH,4,2             ## @SVGA_REG_WIDTH
L_.str.1:                               ## @.str.1
	.asciz	"height %d\n"

	.comm	_SVGA_REG_HEIGHT,4,2            ## @SVGA_REG_HEIGHT
L_.str.2:                               ## @.str.2
	.asciz	"bpp %d\n"

	.comm	_SVGA_REG_BITS_PER_PIXEL,4,2    ## @SVGA_REG_BITS_PER_PIXEL
	.comm	_SVGA_REG_ENABLE,4,2            ## @SVGA_REG_ENABLE
	.comm	_SVGA_REG_CONFIG_DONE,4,2       ## @SVGA_REG_CONFIG_DONE
	.comm	_SVGA_REG_TRACES,4,2            ## @SVGA_REG_TRACES
	.comm	_SVGA_REG_ENABLE_ENABLE,4,2     ## @SVGA_REG_ENABLE_ENABLE
	.comm	_SVGA_REG_ENABLE_HIDE,4,2       ## @SVGA_REG_ENABLE_HIDE
	.comm	_SVGA_CAP_EXTENDED_FIFO,4,2     ## @SVGA_CAP_EXTENDED_FIFO
	.comm	_SVGA_REG_MEM_REGS,4,2          ## @SVGA_REG_MEM_REGS
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_SVGA_FIFO_MIN,4,2              ## @SVGA_FIFO_MIN
	.comm	_SVGA_FIFO_MAX,4,2              ## @SVGA_FIFO_MAX
	.comm	_SVGA_FIFO_NEXT_CMD,4,2         ## @SVGA_FIFO_NEXT_CMD
	.comm	_SVGA_FIFO_STOP,4,2             ## @SVGA_FIFO_STOP
	.comm	_SVGA_FIFO_BUSY,4,2             ## @SVGA_FIFO_BUSY
	.comm	_SVGA_FIFO_CAPABILITIES,4,2     ## @SVGA_FIFO_CAPABILITIES
L_.str.3:                               ## @.str.3
	.asciz	"Fifo max 0x%08x min 0x%08x cap 0x%08x\n"

	.comm	_SVGA_FIFO_FENCE,4,2            ## @SVGA_FIFO_FENCE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vmw_fifo_init                  ; -- Begin function vmw_fifo_init
	.p2align	2
_vmw_fifo_init:                         ; @vmw_fifo_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	mov	x20, x0
	ldr	x23, [x0, #40]
	str	wzr, [x1]
Lloh0:
	adrp	x8, _VMWGFX_FIFO_STATIC_SIZE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VMWGFX_FIFO_STATIC_SIZE@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	str	w0, [x1, #56]
	bl	_vmalloc
	str	x0, [x19, #48]
	cmp	x0, #0
	cset	w0, eq
	bl	_unlikely
	cbz	x0, LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_6
LBB0_2:
	str	wzr, [x19, #4]
	add	x0, x19, #28
	stp	xzr, xzr, [x19, #32]
	bl	_mutex_init
	add	x0, x19, #24
	bl	_init_rwsem
Lloh6:
	adrp	x8, _SVGA_REG_WIDTH@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SVGA_REG_WIDTH@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_vmw_read
	mov	x1, x0
Lloh9:
	adrp	x0, l_.str@PAGE
Lloh10:
	add	x0, x0, l_.str@PAGEOFF
                                        ; kill: def $w1 killed $w1 killed $x1
	bl	_DRM_INFO
Lloh11:
	adrp	x8, _SVGA_REG_HEIGHT@GOTPAGE
Lloh12:
	ldr	x8, [x8, _SVGA_REG_HEIGHT@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_vmw_read
	mov	x1, x0
Lloh14:
	adrp	x0, l_.str.1@PAGE
Lloh15:
	add	x0, x0, l_.str.1@PAGEOFF
                                        ; kill: def $w1 killed $w1 killed $x1
	bl	_DRM_INFO
Lloh16:
	adrp	x8, _SVGA_REG_BITS_PER_PIXEL@GOTPAGE
Lloh17:
	ldr	x8, [x8, _SVGA_REG_BITS_PER_PIXEL@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_vmw_read
	mov	x1, x0
Lloh19:
	adrp	x0, l_.str.2@PAGE
Lloh20:
	add	x0, x0, l_.str.2@PAGEOFF
                                        ; kill: def $w1 killed $w1 killed $x1
	bl	_DRM_INFO
Lloh21:
	adrp	x21, _SVGA_REG_ENABLE@GOTPAGE
Lloh22:
	ldr	x21, [x21, _SVGA_REG_ENABLE@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_vmw_read
	str	x0, [x20, #32]
Lloh23:
	adrp	x22, _SVGA_REG_CONFIG_DONE@GOTPAGE
Lloh24:
	ldr	x22, [x22, _SVGA_REG_CONFIG_DONE@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x20
	bl	_vmw_read
	str	x0, [x20, #24]
Lloh25:
	adrp	x24, _SVGA_REG_TRACES@GOTPAGE
Lloh26:
	ldr	x24, [x24, _SVGA_REG_TRACES@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x20
	bl	_vmw_read
	str	x0, [x20, #16]
Lloh27:
	adrp	x8, _SVGA_REG_ENABLE_ENABLE@GOTPAGE
Lloh28:
	ldr	x8, [x8, _SVGA_REG_ENABLE_ENABLE@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh29:
	ldr	w8, [x8]
Lloh30:
	adrp	x9, _SVGA_REG_ENABLE_HIDE@GOTPAGE
Lloh31:
	ldr	x9, [x9, _SVGA_REG_ENABLE_HIDE@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x20
	bl	_vmw_write
	ldr	w1, [x24]
	mov	x0, x20
	mov	w2, #0
	bl	_vmw_write
	ldr	w8, [x20]
Lloh33:
	adrp	x9, _SVGA_CAP_EXTENDED_FIFO@GOTPAGE
Lloh34:
	ldr	x9, [x9, _SVGA_CAP_EXTENDED_FIFO@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.3:
Lloh36:
	adrp	x8, _SVGA_REG_MEM_REGS@GOTPAGE
Lloh37:
	ldr	x8, [x8, _SVGA_REG_MEM_REGS@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_vmw_read
	lsl	w8, w0, #2
	b	LBB0_5
LBB0_4:
	mov	w8, #16
LBB0_5:
Lloh39:
	adrp	x9, _PAGE_SIZE@GOTPAGE
Lloh40:
	ldr	x9, [x9, _PAGE_SIZE@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	cmp	w8, w9
	csel	w21, w8, w9, gt
Lloh42:
	adrp	x24, _SVGA_FIFO_MIN@GOTPAGE
Lloh43:
	ldr	x24, [x24, _SVGA_FIFO_MIN@GOTPAGEOFF]
	ldrsw	x8, [x24]
	add	x1, x23, x8, lsl #2
	mov	x0, x21
	bl	_vmw_mmio_write
	ldr	w0, [x20, #4]
Lloh44:
	adrp	x25, _SVGA_FIFO_MAX@GOTPAGE
Lloh45:
	ldr	x25, [x25, _SVGA_FIFO_MAX@GOTPAGEOFF]
	ldrsw	x8, [x25]
	add	x1, x23, x8, lsl #2
	bl	_vmw_mmio_write
	bl	_wmb
Lloh46:
	adrp	x8, _SVGA_FIFO_NEXT_CMD@GOTPAGE
Lloh47:
	ldr	x8, [x8, _SVGA_FIFO_NEXT_CMD@GOTPAGEOFF]
Lloh48:
	ldrsw	x8, [x8]
	add	x1, x23, x8, lsl #2
	mov	x0, x21
	bl	_vmw_mmio_write
Lloh49:
	adrp	x8, _SVGA_FIFO_STOP@GOTPAGE
Lloh50:
	ldr	x8, [x8, _SVGA_FIFO_STOP@GOTPAGEOFF]
Lloh51:
	ldrsw	x8, [x8]
	add	x1, x23, x8, lsl #2
	mov	x0, x21
	bl	_vmw_mmio_write
Lloh52:
	adrp	x8, _SVGA_FIFO_BUSY@GOTPAGE
Lloh53:
	ldr	x8, [x8, _SVGA_FIFO_BUSY@GOTPAGEOFF]
Lloh54:
	ldrsw	x8, [x8]
	add	x1, x23, x8, lsl #2
	mov	w0, #0
	bl	_vmw_mmio_write
	bl	_mb
	ldr	w1, [x22]
	mov	x0, x20
	mov	w2, #1
	bl	_vmw_write
	ldrsw	x8, [x25]
	add	x0, x23, x8, lsl #2
	bl	_vmw_mmio_read
	mov	x21, x0
	ldrsw	x8, [x24]
	add	x0, x23, x8, lsl #2
	bl	_vmw_mmio_read
	mov	x22, x0
Lloh55:
	adrp	x8, _SVGA_FIFO_CAPABILITIES@GOTPAGE
Lloh56:
	ldr	x8, [x8, _SVGA_FIFO_CAPABILITIES@GOTPAGEOFF]
Lloh57:
	ldrsw	x8, [x8]
	add	x0, x23, x8, lsl #2
	bl	_vmw_mmio_read
	str	x0, [x19, #16]
	stp	x22, x0, [sp]
Lloh58:
	adrp	x0, l_.str.3@PAGE
Lloh59:
	add	x0, x0, l_.str.3@PAGEOFF
	mov	x1, x21
	bl	_DRM_INFO
	add	x0, x20, #12
	ldr	w1, [x20, #8]
	bl	_atomic_set
	ldr	w0, [x20, #8]
Lloh60:
	adrp	x8, _SVGA_FIFO_FENCE@GOTPAGE
Lloh61:
	ldr	x8, [x8, _SVGA_FIFO_FENCE@GOTPAGEOFF]
Lloh62:
	ldrsw	x8, [x8]
	add	x1, x23, x8, lsl #2
	bl	_vmw_mmio_write
	add	x0, x19, #8
	bl	_vmw_marker_queue_init
	mov	w0, #0
LBB0_6:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpAdd	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.cfi_endproc
                                        ; -- End function
	.comm	_VMWGFX_FIFO_STATIC_SIZE,4,2    ; @VMWGFX_FIFO_STATIC_SIZE
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"width %d\n"

	.comm	_SVGA_REG_WIDTH,4,2             ; @SVGA_REG_WIDTH
l_.str.1:                               ; @.str.1
	.asciz	"height %d\n"

	.comm	_SVGA_REG_HEIGHT,4,2            ; @SVGA_REG_HEIGHT
l_.str.2:                               ; @.str.2
	.asciz	"bpp %d\n"

	.comm	_SVGA_REG_BITS_PER_PIXEL,4,2    ; @SVGA_REG_BITS_PER_PIXEL
	.comm	_SVGA_REG_ENABLE,4,2            ; @SVGA_REG_ENABLE
	.comm	_SVGA_REG_CONFIG_DONE,4,2       ; @SVGA_REG_CONFIG_DONE
	.comm	_SVGA_REG_TRACES,4,2            ; @SVGA_REG_TRACES
	.comm	_SVGA_REG_ENABLE_ENABLE,4,2     ; @SVGA_REG_ENABLE_ENABLE
	.comm	_SVGA_REG_ENABLE_HIDE,4,2       ; @SVGA_REG_ENABLE_HIDE
	.comm	_SVGA_CAP_EXTENDED_FIFO,4,2     ; @SVGA_CAP_EXTENDED_FIFO
	.comm	_SVGA_REG_MEM_REGS,4,2          ; @SVGA_REG_MEM_REGS
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_SVGA_FIFO_MIN,4,2              ; @SVGA_FIFO_MIN
	.comm	_SVGA_FIFO_MAX,4,2              ; @SVGA_FIFO_MAX
	.comm	_SVGA_FIFO_NEXT_CMD,4,2         ; @SVGA_FIFO_NEXT_CMD
	.comm	_SVGA_FIFO_STOP,4,2             ; @SVGA_FIFO_STOP
	.comm	_SVGA_FIFO_BUSY,4,2             ; @SVGA_FIFO_BUSY
	.comm	_SVGA_FIFO_CAPABILITIES,4,2     ; @SVGA_FIFO_CAPABILITIES
l_.str.3:                               ; @.str.3
	.asciz	"Fifo max 0x%08x min 0x%08x cap 0x%08x\n"

	.comm	_SVGA_FIFO_FENCE,4,2            ; @SVGA_FIFO_FENCE
.subsections_via_symbols
