	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ltdc_crtc_mode_fixup
_ltdc_crtc_mode_fixup:                  ## @ltdc_crtc_mode_fixup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, -48(%rbp)                 ## 8-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %rbx
	callq	_crtc_to_ltdc
	movq	%rax, %r14
	movq	(%rbx), %rbx
	imull	$1000, (%r15), %r13d            ## imm = 0x3E8
	movl	(%rbx), %edi
	callq	_pm_runtime_active
	movl	%eax, %r12d
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	movl	(%rbx), %edi
	callq	_pm_runtime_put_sync
LBB0_2:
	movl	(%r14), %edi
	movl	%r13d, %esi
	callq	_clk_set_rate
	testq	%rax, %rax
	js	LBB0_3
## %bb.4:
	movl	(%r14), %edi
	callq	_clk_get_rate
	cltq
	imulq	$274877907, %rax, %rdx          ## imm = 0x10624DD3
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$38, %rdx
	addl	%eax, %edx
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movl	%edx, (%r14)
	testl	%r12d, %r12d
	je	LBB0_7
## %bb.5:
	movl	(%rbx), %edi
	callq	_pm_runtime_get_sync
	testl	%eax, %eax
	je	LBB0_6
## %bb.9:
	leaq	L_.str.1(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_8
LBB0_3:
	leaq	L_.str(%rip), %rdi
	xorl	%ebx, %ebx
	movl	%r13d, %esi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_8
LBB0_6:
	movl	(%r14), %edx
LBB0_7:
	movl	(%r15), %esi
	leaq	L_.str.2(%rip), %rdi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_DRM_DEBUG_DRIVER
	movl	$1, %ebx
LBB0_8:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Cannot set rate (%dHz) for pixel clk\n"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to fixup mode, cannot get sync\n"

L_.str.2:                               ## @.str.2
	.asciz	"requested clock %dkHz, adjusted clock %dkHz\n"

	.no_dead_strip	_ltdc_crtc_mode_fixup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ltdc_crtc_mode_fixup
_ltdc_crtc_mode_fixup:                  ; @ltdc_crtc_mode_fixup
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x2
	mov	x19, x1
	mov	x21, x0
	bl	_crtc_to_ltdc
	mov	x22, x0
	ldr	x24, [x21]
	ldr	w8, [x19]
	mov	w9, #1000
	mul	w23, w8, w9
	ldr	w0, [x24]
	bl	_pm_runtime_active
	mov	x21, x0
	cbz	w0, LBB0_2
; %bb.1:
	ldr	w0, [x24]
	bl	_pm_runtime_put_sync
LBB0_2:
	ldr	w0, [x22]
	mov	x1, x23
	bl	_clk_set_rate
	tbnz	x0, #63, LBB0_6
; %bb.3:
	ldr	w0, [x22]
	bl	_clk_get_rate
	mov	w8, #19923
	movk	w8, #4194, lsl #16
	smull	x8, w0, w8
	lsr	x9, x8, #63
	asr	x8, x8, #38
	add	w2, w8, w9
	str	w2, [x20]
	cbz	w21, LBB0_9
; %bb.4:
	ldr	w0, [x24]
	bl	_pm_runtime_get_sync
	cbz	w0, LBB0_8
; %bb.5:
Lloh0:
	adrp	x0, l_.str.1@PAGE
Lloh1:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_7
LBB0_6:
	str	x23, [sp]
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
LBB0_7:
	bl	_DRM_ERROR
	mov	w0, #0
	b	LBB0_10
LBB0_8:
	ldr	w2, [x20]
LBB0_9:
	ldr	w1, [x19]
Lloh4:
	adrp	x0, l_.str.2@PAGE
Lloh5:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
	mov	w0, #1
LBB0_10:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Cannot set rate (%dHz) for pixel clk\n"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to fixup mode, cannot get sync\n"

l_.str.2:                               ; @.str.2
	.asciz	"requested clock %dkHz, adjusted clock %dkHz\n"

	.no_dead_strip	_ltdc_crtc_mode_fixup
.subsections_via_symbols
