	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function radeon_lookup_i2c_gpio_quirks
LCPI0_0:
	.long	8                               ## 0x8
	.long	8                               ## 0x8
	.long	8                               ## 0x8
	.long	8                               ## 0x8
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_radeon_lookup_i2c_gpio_quirks:         ## @radeon_lookup_i2c_gpio_quirks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	_CHIP_R420@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_3
## %bb.1:
	movq	_CHIP_R423@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_3
## %bb.2:
	movq	_CHIP_RV410@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_7
LBB0_3:
	movl	24(%r15), %edi
	callq	_le16_to_cpu
	cmpl	$24, %eax
	je	LBB0_6
## %bb.4:
	movl	24(%r15), %edi
	callq	_le16_to_cpu
	cmpl	$25, %eax
	je	LBB0_6
## %bb.5:
	movl	24(%r15), %edi
	callq	_le16_to_cpu
	cmpl	$26, %eax
	jne	LBB0_7
LBB0_6:
	movabsq	$103079215129, %rax             ## imm = 0x1800000019
	movq	%rax, (%r15)
LBB0_7:
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE4
	cmpl	$7, %r14d
	jne	LBB0_12
## %bb.8:
	testq	%rax, %rax
	je	LBB0_12
## %bb.9:
	movl	24(%r15), %edi
	callq	_le16_to_cpu
	cmpl	$6454, %eax                     ## imm = 0x1936
	jne	LBB0_12
## %bb.10:
	cmpl	$0, 20(%r15)
	jne	LBB0_12
## %bb.11:
	movl	$151, 20(%r15)
	movaps	LCPI0_0(%rip), %xmm0            ## xmm0 = [8,8,8,8]
	movups	%xmm0, 4(%r15)
LBB0_12:
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE3
	cmpl	$4, %r14d
	jne	LBB0_17
## %bb.13:
	testq	%rax, %rax
	je	LBB0_17
## %bb.14:
	movl	24(%r15), %edi
	callq	_le16_to_cpu
	cmpl	$8154, %eax                     ## imm = 0x1FDA
	jne	LBB0_17
## %bb.15:
	cmpl	$148, 20(%r15)
	jne	LBB0_17
## %bb.16:
	movl	$20, 20(%r15)
LBB0_17:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_R420,8,3                  ## @CHIP_R420
	.comm	_CHIP_R423,8,3                  ## @CHIP_R423
	.comm	_CHIP_RV410,8,3                 ## @CHIP_RV410
	.no_dead_strip	_radeon_lookup_i2c_gpio_quirks
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function radeon_lookup_i2c_gpio_quirks
lCPI0_0:
	.long	25                              ; 0x19
	.long	24                              ; 0x18
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_radeon_lookup_i2c_gpio_quirks:         ; @radeon_lookup_i2c_gpio_quirks
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x19, x1
	mov	x21, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _CHIP_R420@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_R420@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
Lloh3:
	adrp	x10, _CHIP_R423@GOTPAGE
Lloh4:
	ldr	x10, [x10, _CHIP_R423@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
Lloh6:
	adrp	x11, _CHIP_RV410@GOTPAGE
Lloh7:
	ldr	x11, [x11, _CHIP_RV410@GOTPAGEOFF]
Lloh8:
	ldr	x11, [x11]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	ccmp	x8, x11, #4, ne
	b.ne	LBB0_5
; %bb.1:
	ldr	w0, [x19, #24]
	bl	_le16_to_cpu
	cmp	w0, #24
	b.eq	LBB0_4
; %bb.2:
	ldr	w0, [x19, #24]
	bl	_le16_to_cpu
	cmp	w0, #25
	b.eq	LBB0_4
; %bb.3:
	ldr	w0, [x19, #24]
	bl	_le16_to_cpu
	cmp	w0, #26
	b.ne	LBB0_5
LBB0_4:
Lloh9:
	adrp	x8, lCPI0_0@PAGE
Lloh10:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	str	d0, [x19]
LBB0_5:
	mov	x0, x21
	bl	_ASIC_IS_DCE4
	cmp	w20, #7
	b.ne	LBB0_10
; %bb.6:
	cbz	x0, LBB0_10
; %bb.7:
	ldr	w0, [x19, #24]
	bl	_le16_to_cpu
	mov	w8, #6454
	cmp	w0, w8
	b.ne	LBB0_10
; %bb.8:
	ldr	w8, [x19, #20]
	cbnz	w8, LBB0_10
; %bb.9:
	mov	w8, #151
	str	w8, [x19, #20]
	movi.4s	v0, #8
	stur	q0, [x19, #4]
LBB0_10:
	mov	x0, x21
	bl	_ASIC_IS_DCE3
	cmp	w20, #4
	b.ne	LBB0_15
; %bb.11:
	cbz	x0, LBB0_15
; %bb.12:
	ldr	w0, [x19, #24]
	bl	_le16_to_cpu
	mov	w8, #8154
	cmp	w0, w8
	b.ne	LBB0_15
; %bb.13:
	ldr	w8, [x19, #20]
	cmp	w8, #148
	b.ne	LBB0_15
; %bb.14:
	mov	w8, #20
	str	w8, [x19, #20]
LBB0_15:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdr	Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_R420,8,3                  ; @CHIP_R420
	.comm	_CHIP_R423,8,3                  ; @CHIP_R423
	.comm	_CHIP_RV410,8,3                 ; @CHIP_RV410
	.no_dead_strip	_radeon_lookup_i2c_gpio_quirks
.subsections_via_symbols
