	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function adf4371_set_freq
_adf4371_set_freq:                      ## @adf4371_set_freq
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
                                        ## kill: def $edx killed $edx def $rdx
	movq	%rsi, %rbx
	movq	%rdi, %r12
	leal	-128(%rdx), %eax
	cmpl	$2, %eax
	jb	LBB0_5
## %bb.1:
	cmpl	$130, %edx
	je	LBB0_11
## %bb.2:
	cmpl	$131, %edx
	jne	LBB0_6
## %bb.3:
	movq	_OUT_RF16_FREQ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ADF4371_CHECK_RANGE
	testl	%eax, %eax
	jne	LBB0_6
## %bb.4:
	shrq	%rbx
	jmp	LBB0_13
LBB0_5:
	movq	_OUT_RF8_FREQ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ADF4371_CHECK_RANGE
	testl	%eax, %eax
	jne	LBB0_6
## %bb.7:
	movq	_ADF4371_MIN_VCO_FREQ@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	xorl	%eax, %eax
	cmpq	%rbx, %rcx
	jbe	LBB0_10
## %bb.8:
	xorl	%eax, %eax
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	addq	%rbx, %rbx
	incl	%eax
	cmpq	%rcx, %rbx
	jb	LBB0_9
LBB0_10:
	movl	%eax, 32(%r12)
	jmp	LBB0_13
LBB0_11:
	movq	_OUT_RF32_FREQ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_ADF4371_CHECK_RANGE
	testl	%eax, %eax
	je	LBB0_12
LBB0_6:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_20:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_12:
	shrq	$2, %rbx
LBB0_13:
	movl	36(%r12), %esi
	leaq	4(%r12), %r15
	leaq	8(%r12), %r14
	leaq	12(%r12), %r9
	movq	%rbx, %rdi
	movq	%r12, %rdx
	movq	%r15, %rcx
	movq	%r14, %r8
	callq	_adf4371_pll_fract_n_compute
	movl	(%r12), %eax
	sarl	$8, %eax
	movq	16(%r12), %rcx
	movl	%eax, (%rcx)
	movq	$64, 4(%rcx)
	movzbl	4(%r12), %eax
	movl	%eax, 12(%rcx)
	movl	4(%r12), %eax
	sarl	$8, %eax
	movl	%eax, 16(%rcx)
	movswl	6(%r12), %eax
	movl	%eax, 20(%rcx)
	movl	8(%r12), %edi
	andl	$127, %edi
	callq	_ADF4371_FRAC2WORD_L
	movl	%eax, %ebx
	movsbl	7(%r12), %edi
	callq	_ADF4371_FRAC1WORD
	orl	%ebx, %eax
	movq	16(%r12), %rcx
	movl	%eax, 24(%rcx)
	movl	8(%r12), %edi
	sarl	$7, %edi
	callq	_ADF4371_FRAC2WORD_H
	movq	16(%r12), %rcx
	movl	%eax, 28(%rcx)
	movzbl	12(%r12), %eax
	movl	%eax, 32(%rcx)
	movl	12(%r12), %edi
	sarl	$8, %edi
	callq	_ADF4371_MOD2WORD
	movq	16(%r12), %rcx
	movl	%eax, 36(%rcx)
	movl	28(%r12), %ebx
	movl	$17, %edi
	callq	_ADF4371_REG
	movq	16(%r12), %rdx
	movl	%ebx, %edi
	movl	%eax, %esi
	movl	$10, %ecx
	callq	_regmap_bulk_write
	testl	%eax, %eax
	js	LBB0_20
## %bb.14:
	movl	28(%r12), %ebx
	movl	$31, %edi
	callq	_ADF4371_REG
	movl	24(%r12), %edx
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_regmap_write
	testl	%eax, %eax
	js	LBB0_20
## %bb.15:
	movq	%r14, -48(%rbp)                 ## 8-byte Spill
	movl	28(%r12), %r13d
	movl	$36, %edi
	callq	_ADF4371_REG
	movl	%eax, %ebx
	movq	_ADF4371_RF_DIV_SEL_MSK@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	32(%r12), %edi
	callq	_ADF4371_RF_DIV_SEL
	movl	%r13d, %edi
	movl	%ebx, %esi
	movl	%r14d, %edx
	movl	%eax, %ecx
	callq	_regmap_update_bits
	testl	%eax, %eax
	js	LBB0_20
## %bb.16:
	imull	$375, (%r12), %esi              ## imm = 0x177
	movl	$700000, %edi                   ## imm = 0xAAE60
	callq	_DIV_ROUND_UP
	movl	%eax, %edi
	movl	$1, %esi
	movl	$255, %edx
	callq	_clamp
	movl	%eax, %r14d
	movl	28(%r12), %ebx
	movl	$38, %edi
	callq	_ADF4371_REG
	movl	%ebx, %edi
	movl	%eax, %esi
	movl	%r14d, %edx
	callq	_regmap_write
	testl	%eax, %eax
	js	LBB0_20
## %bb.17:
	xorl	%ebx, %ebx
	cmpl	$0, (%r15)
	jne	LBB0_19
## %bb.18:
	xorl	%ebx, %ebx
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	cmpl	$0, (%rax)
	sete	%bl
LBB0_19:
	movl	28(%r12), %r14d
	movl	$43, %edi
	callq	_ADF4371_REG
	movl	%r14d, %edi
	movl	%eax, %esi
	movl	%ebx, %edx
	callq	_regmap_write
	testl	%eax, %eax
	js	LBB0_20
## %bb.21:
	movl	28(%r12), %ebx
	movl	$16, %edi
	callq	_ADF4371_REG
	movzbl	(%r12), %edx
	movl	%ebx, %edi
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_regmap_write                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_OUT_RF8_FREQ,4,2               ## @OUT_RF8_FREQ
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_ADF4371_MIN_VCO_FREQ,8,3       ## @ADF4371_MIN_VCO_FREQ
	.comm	_OUT_RF16_FREQ,4,2              ## @OUT_RF16_FREQ
	.comm	_OUT_RF32_FREQ,4,2              ## @OUT_RF32_FREQ
	.comm	_ADF4371_RF_DIV_SEL_MSK,4,2     ## @ADF4371_RF_DIV_SEL_MSK
	.no_dead_strip	_adf4371_set_freq
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function adf4371_set_freq
lCPI0_0:
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_adf4371_set_freq:                      ; @adf4371_set_freq
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x1
	mov	x19, x0
	sub	w8, w2, #128
	cmp	w8, #2
	b.lo	LBB0_5
; %bb.1:
	cmp	w2, #130
	b.eq	LBB0_10
; %bb.2:
	cmp	w2, #131
	b.ne	LBB0_11
; %bb.3:
Lloh0:
	adrp	x8, _OUT_RF16_FREQ@GOTPAGE
Lloh1:
	ldr	x8, [x8, _OUT_RF16_FREQ@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x22
	bl	_ADF4371_CHECK_RANGE
	cbnz	w0, LBB0_11
; %bb.4:
	lsr	x22, x22, #1
	b	LBB0_15
LBB0_5:
Lloh3:
	adrp	x8, _OUT_RF8_FREQ@GOTPAGE
Lloh4:
	ldr	x8, [x8, _OUT_RF8_FREQ@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x22
	bl	_ADF4371_CHECK_RANGE
	cbnz	w0, LBB0_11
; %bb.6:
Lloh6:
	adrp	x8, _ADF4371_MIN_VCO_FREQ@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ADF4371_MIN_VCO_FREQ@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	cmp	x8, x22
	b.ls	LBB0_13
; %bb.7:
	mov	w9, #0
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	lsl	x22, x22, #1
	add	w9, w9, #1
	cmp	x22, x8
	b.lo	LBB0_8
; %bb.9:
	str	w9, [x19, #32]
	b	LBB0_15
LBB0_10:
Lloh9:
	adrp	x8, _OUT_RF32_FREQ@GOTPAGE
Lloh10:
	ldr	x8, [x8, _OUT_RF32_FREQ@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x22
	bl	_ADF4371_CHECK_RANGE
	cbz	w0, LBB0_14
LBB0_11:
Lloh12:
	adrp	x8, _EINVAL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_12:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_13:
	mov	w9, #0
	str	wzr, [x19, #32]
	b	LBB0_15
LBB0_14:
	lsr	x22, x22, #2
LBB0_15:
	ldr	w1, [x19, #36]
	add	x21, x19, #4
	add	x20, x19, #8
	add	x5, x19, #12
	mov	x0, x22
	mov	x2, x19
	mov	x3, x21
	mov	x4, x20
	bl	_adf4371_pll_fract_n_compute
	ldr	w8, [x19]
	asr	w8, w8, #8
	ldr	x9, [x19, #16]
	str	w8, [x9]
Lloh15:
	adrp	x8, lCPI0_0@PAGE
Lloh16:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	stur	d0, [x9, #4]
	ldrb	w8, [x19, #4]
	str	w8, [x9, #12]
	ldr	w8, [x19, #4]
	asr	w8, w8, #8
	str	w8, [x9, #16]
	ldrsh	w8, [x19, #6]
	str	w8, [x9, #20]
	ldr	w8, [x19, #8]
	and	w0, w8, #0x7f
	bl	_ADF4371_FRAC2WORD_L
	mov	x22, x0
	ldrsb	w0, [x19, #7]
	bl	_ADF4371_FRAC1WORD
	orr	w8, w0, w22
	ldr	x9, [x19, #16]
	str	w8, [x9, #24]
	ldr	w8, [x19, #8]
	asr	w0, w8, #7
	bl	_ADF4371_FRAC2WORD_H
	ldr	x8, [x19, #16]
	str	w0, [x8, #28]
	ldrb	w9, [x19, #12]
	str	w9, [x8, #32]
	ldr	w8, [x19, #12]
	asr	w0, w8, #8
	bl	_ADF4371_MOD2WORD
	ldr	x8, [x19, #16]
	str	w0, [x8, #36]
	ldr	w22, [x19, #28]
	mov	w0, #17
	bl	_ADF4371_REG
	mov	x1, x0
	ldr	x2, [x19, #16]
	mov	x0, x22
	mov	w3, #10
	bl	_regmap_bulk_write
	tbnz	w0, #31, LBB0_12
; %bb.16:
	ldr	w22, [x19, #28]
	mov	w0, #31
	bl	_ADF4371_REG
	mov	x1, x0
	ldr	w2, [x19, #24]
	mov	x0, x22
	bl	_regmap_write
	tbnz	w0, #31, LBB0_12
; %bb.17:
	ldr	w22, [x19, #28]
	mov	w0, #36
	bl	_ADF4371_REG
	mov	x23, x0
Lloh17:
	adrp	x8, _ADF4371_RF_DIV_SEL_MSK@GOTPAGE
Lloh18:
	ldr	x8, [x8, _ADF4371_RF_DIV_SEL_MSK@GOTPAGEOFF]
Lloh19:
	ldr	w24, [x8]
	ldr	w0, [x19, #32]
	bl	_ADF4371_RF_DIV_SEL
	mov	x3, x0
	mov	x0, x22
	mov	x1, x23
	mov	x2, x24
	bl	_regmap_update_bits
	tbnz	w0, #31, LBB0_12
; %bb.18:
	ldr	w8, [x19]
	mov	w9, #375
	mul	w1, w8, w9
	mov	w0, #44640
	movk	w0, #10, lsl #16
	bl	_DIV_ROUND_UP
	mov	w1, #1
	mov	w2, #255
	bl	_clamp
	mov	x22, x0
	ldr	w23, [x19, #28]
	mov	w0, #38
	bl	_ADF4371_REG
	mov	x1, x0
	mov	x0, x23
	mov	x2, x22
	bl	_regmap_write
	tbnz	w0, #31, LBB0_12
; %bb.19:
	ldr	w8, [x21]
	cbz	w8, LBB0_21
; %bb.20:
	mov	w20, #0
	b	LBB0_22
LBB0_21:
	ldr	w8, [x20]
	cmp	w8, #0
	cset	w20, eq
LBB0_22:
	ldr	w21, [x19, #28]
	mov	w0, #43
	bl	_ADF4371_REG
	mov	x1, x0
	mov	x0, x21
	mov	x2, x20
	bl	_regmap_write
	tbnz	w0, #31, LBB0_12
; %bb.23:
	ldr	w20, [x19, #28]
	mov	w0, #16
	bl	_ADF4371_REG
	mov	x1, x0
	ldrb	w2, [x19]
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_regmap_write
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdr	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_OUT_RF8_FREQ,4,2               ; @OUT_RF8_FREQ
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_ADF4371_MIN_VCO_FREQ,8,3       ; @ADF4371_MIN_VCO_FREQ
	.comm	_OUT_RF16_FREQ,4,2              ; @OUT_RF16_FREQ
	.comm	_OUT_RF32_FREQ,4,2              ; @OUT_RF32_FREQ
	.comm	_ADF4371_RF_DIV_SEL_MSK,4,2     ; @ADF4371_RF_DIV_SEL_MSK
	.no_dead_strip	_adf4371_set_freq
.subsections_via_symbols
