	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_dpm_hw_init
_si_dpm_hw_init:                        ## @si_dpm_hw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_amdgpu_dpm@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	je	LBB0_1
## %bb.2:
	movq	%rdi, %rbx
	leaq	4(%rdi), %r15
	movq	%r15, %rdi
	callq	_mutex_lock
	movq	%rbx, %rdi
	callq	_si_dpm_setup_asic
	movq	%rbx, %rdi
	callq	_si_dpm_enable
	movl	%eax, %r14d
	xorl	%eax, %eax
	testl	%r14d, %r14d
	sete	%al
	movl	%eax, (%rbx)
	movq	%r15, %rdi
	callq	_mutex_unlock
	movq	%rbx, %rdi
	callq	_amdgpu_pm_compute_clocks
	jmp	LBB0_3
LBB0_1:
	xorl	%r14d, %r14d
LBB0_3:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_amdgpu_dpm,4,2                 ## @amdgpu_dpm
	.no_dead_strip	_si_dpm_hw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_dpm_hw_init
_si_dpm_hw_init:                        ; @si_dpm_hw_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
Lloh0:
	adrp	x8, _amdgpu_dpm@GOTPAGE
Lloh1:
	ldr	x8, [x8, _amdgpu_dpm@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cbz	w8, LBB0_2
; %bb.1:
	mov	x19, x0
	add	x21, x0, #4
	mov	x0, x21
	bl	_mutex_lock
	mov	x0, x19
	bl	_si_dpm_setup_asic
	mov	x0, x19
	bl	_si_dpm_enable
	mov	x20, x0
	cmp	w0, #0
	cset	w8, eq
	str	w8, [x19]
	mov	x0, x21
	bl	_mutex_unlock
	mov	x0, x19
	bl	_amdgpu_pm_compute_clocks
	b	LBB0_3
LBB0_2:
	mov	w20, #0
LBB0_3:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_amdgpu_dpm,4,2                 ; @amdgpu_dpm
	.no_dead_strip	_si_dpm_hw_init
.subsections_via_symbols
