	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_ddi_get_power_domains
_intel_ddi_get_power_domains:           ## @intel_ddi_get_power_domains
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	(%rdi), %edi
	callq	_to_i915
	movq	%rax, %r12
	movl	4(%rbx), %esi
	movq	%rax, %rdi
	callq	_intel_port_to_phy
	movl	%eax, %r15d
	movq	_INTEL_OUTPUT_DP_MST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_intel_crtc_has_type
	movl	%eax, %edi
	callq	_WARN_ON
	testq	%rax, %rax
	je	LBB0_1
LBB0_5:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	%rbx, %rdi
	callq	_enc_to_dig_port
	movq	%rax, %rbx
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_intel_display_power_get
	movq	%r14, %rdi
	callq	_intel_crtc_has_dp_encoder
	testq	%rax, %rax
	jne	LBB0_3
## %bb.2:
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_intel_phy_is_tc
	testq	%rax, %rax
	je	LBB0_4
LBB0_3:
	movq	%rbx, %rdi
	callq	_intel_ddi_main_link_aux_domain
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_intel_display_power_get
LBB0_4:
	cmpq	$0, (%r14)
	je	LBB0_5
## %bb.6:
	movq	%r14, %rdi
	callq	_intel_dsc_power_domain
	movq	%r12, %rdi
	movl	%eax, %esi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_display_power_get        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_OUTPUT_DP_MST,4,2        ## @INTEL_OUTPUT_DP_MST
	.no_dead_strip	_intel_ddi_get_power_domains
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_ddi_get_power_domains
_intel_ddi_get_power_domains:           ; @intel_ddi_get_power_domains
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x22, x0
	ldr	w0, [x0]
	bl	_to_i915
	mov	x20, x0
	ldr	w1, [x22, #4]
	bl	_intel_port_to_phy
	mov	x21, x0
Lloh0:
	adrp	x8, _INTEL_OUTPUT_DP_MST@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_OUTPUT_DP_MST@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_intel_crtc_has_type
	bl	_WARN_ON
	cbz	x0, LBB0_2
LBB0_1:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_2:
	mov	x0, x22
	bl	_enc_to_dig_port
	mov	x22, x0
	ldr	w1, [x0]
	mov	x0, x20
	bl	_intel_display_power_get
	mov	x0, x19
	bl	_intel_crtc_has_dp_encoder
	cbnz	x0, LBB0_4
; %bb.3:
	mov	x0, x20
	mov	x1, x21
	bl	_intel_phy_is_tc
	cbz	x0, LBB0_5
LBB0_4:
	mov	x0, x22
	bl	_intel_ddi_main_link_aux_domain
	mov	x1, x0
	mov	x0, x20
	bl	_intel_display_power_get
LBB0_5:
	ldr	x8, [x19]
	cbz	x8, LBB0_1
; %bb.6:
	mov	x0, x19
	bl	_intel_dsc_power_domain
	mov	x1, x0
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_intel_display_power_get
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_OUTPUT_DP_MST,4,2        ; @INTEL_OUTPUT_DP_MST
	.no_dead_strip	_intel_ddi_get_power_domains
.subsections_via_symbols
