	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_g12a_crtc_enable_vd1
_meson_g12a_crtc_enable_vd1:            ## @meson_g12a_crtc_enable_vd1
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	_VD_BLEND_PREBLD_SRC_VD1@GOTPCREL(%rip), %rax
	movq	_VD_BLEND_PREBLD_PREMULT_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	_VD_BLEND_POSTBLD_SRC_VD1@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_VD_BLEND_POSTBLD_PREMULT_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	(%rdi), %r14
	movq	_VD1_BLEND_SRC_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %r14
	movl	%ebx, %edi
	movq	%r14, %rsi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_writel_relaxed                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VD_BLEND_PREBLD_SRC_VD1,4,2    ## @VD_BLEND_PREBLD_SRC_VD1
	.comm	_VD_BLEND_PREBLD_PREMULT_EN,4,2 ## @VD_BLEND_PREBLD_PREMULT_EN
	.comm	_VD_BLEND_POSTBLD_SRC_VD1,4,2   ## @VD_BLEND_POSTBLD_SRC_VD1
	.comm	_VD_BLEND_POSTBLD_PREMULT_EN,4,2 ## @VD_BLEND_POSTBLD_PREMULT_EN
	.comm	_VD1_BLEND_SRC_CTRL,4,2         ## @VD1_BLEND_SRC_CTRL
	.no_dead_strip	_meson_g12a_crtc_enable_vd1
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_g12a_crtc_enable_vd1
_meson_g12a_crtc_enable_vd1:            ; @meson_g12a_crtc_enable_vd1
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x8, _VD_BLEND_PREBLD_SRC_VD1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VD_BLEND_PREBLD_SRC_VD1@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _VD_BLEND_PREBLD_PREMULT_EN@GOTPAGE
Lloh4:
	ldr	x9, [x9, _VD_BLEND_PREBLD_PREMULT_EN@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh6:
	adrp	x9, _VD_BLEND_POSTBLD_SRC_VD1@GOTPAGE
Lloh7:
	ldr	x9, [x9, _VD_BLEND_POSTBLD_SRC_VD1@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh9:
	adrp	x9, _VD_BLEND_POSTBLD_PREMULT_EN@GOTPAGE
Lloh10:
	ldr	x9, [x9, _VD_BLEND_POSTBLD_PREMULT_EN@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w19, w8, w9
	ldr	x20, [x0]
Lloh12:
	adrp	x8, _VD1_BLEND_SRC_CTRL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VD1_BLEND_SRC_CTRL@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x20
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_writel_relaxed
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_VD_BLEND_PREBLD_SRC_VD1,4,2    ; @VD_BLEND_PREBLD_SRC_VD1
	.comm	_VD_BLEND_PREBLD_PREMULT_EN,4,2 ; @VD_BLEND_PREBLD_PREMULT_EN
	.comm	_VD_BLEND_POSTBLD_SRC_VD1,4,2   ; @VD_BLEND_POSTBLD_SRC_VD1
	.comm	_VD_BLEND_POSTBLD_PREMULT_EN,4,2 ; @VD_BLEND_POSTBLD_PREMULT_EN
	.comm	_VD1_BLEND_SRC_CTRL,4,2         ; @VD1_BLEND_SRC_CTRL
	.no_dead_strip	_meson_g12a_crtc_enable_vd1
.subsections_via_symbols
