	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v10_0_cp_gfx_resume
_gfx_v10_0_cp_gfx_resume:               ## @gfx_v10_0_cp_gfx_resume
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	_GC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rax, %rbx
	movq	_mmCP_RB_WPTR_DELAY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	callq	_WREG32_SOC15
	movl	(%rbx), %edi
	movq	%rbx, %r12
	movq	_mmCP_RB_VMID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	callq	_WREG32_SOC15
	leaq	16(%r15), %rbx
	movq	%rbx, %rdi
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	callq	_mutex_lock
	movq	_PIPE_ID0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_gfx_v10_0_cp_gfx_switch_pipe
	movq	%rbx, %rdi
	callq	_mutex_unlock
	movq	8(%r15), %rcx
	movl	(%rcx), %eax
	movq	%rcx, %r13
	movq	%rcx, -48(%rbp)                 ## 8-byte Spill
	leal	7(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$3, %edi
	callq	_order_base_2
	movl	%eax, %ebx
	movq	_CP_RB0_CNTL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_RB_BUFSZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%edi, %edi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_RB_BLKSZ@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	addl	$-2, %ebx
	movl	%eax, %edi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movl	(%r12), %edi
	movq	_mmCP_RB0_CNTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	xorl	%esi, %esi
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	$0, 4(%r13)
	movl	(%r12), %ebx
	movq	_mmCP_RB0_WPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	xorl	%edi, %edi
	callq	_lower_32_bits
	movl	%ebx, %edi
	xorl	%esi, %esi
	movl	%r14d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	(%r12), %ebx
	movq	_mmCP_RB0_WPTR_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	4(%r13), %edi
	callq	_upper_32_bits
	movl	%ebx, %edi
	xorl	%esi, %esi
	movl	%r14d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	8(%r13), %ebx
	shll	$2, %ebx
	movq	%r15, -64(%rbp)                 ## 8-byte Spill
	addl	20(%r15), %ebx
	movl	(%r12), %r14d
	movq	%r12, %r13
	movq	_mmCP_RB0_RPTR_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	%ebx, %edi
	callq	_lower_32_bits
	movl	%r14d, %edi
	xorl	%esi, %esi
	movl	%r12d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	(%r13), %r14d
	movq	_mmCP_RB0_RPTR_ADDR_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	%ebx, %edi
	callq	_upper_32_bits
	movq	_CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	%r14d, %edi
	xorl	%esi, %esi
	movl	%r12d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	movl	12(%r13), %ebx
	shll	$2, %ebx
	addl	20(%r15), %ebx
	movq	_GC@GOTPCREL(%rip), %r15
	movl	(%r15), %r14d
	movq	_mmCP_RB_WPTR_POLL_ADDR_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	%ebx, %edi
	callq	_lower_32_bits
	movl	%r14d, %edi
	xorl	%esi, %esi
	movl	%r12d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	(%r15), %r14d
	movq	_mmCP_RB_WPTR_POLL_ADDR_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	%ebx, %edi
	callq	_upper_32_bits
	movl	%r14d, %edi
	xorl	%esi, %esi
	movl	%r12d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	$1, %edi
	callq	_mdelay
	movl	(%r15), %edi
	movq	_mmCP_RB0_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	movl	-56(%rbp), %ecx                 ## 4-byte Reload
	callq	_WREG32_SOC15
	movl	16(%r13), %ebx
	sarl	$8, %ebx
	movl	(%r15), %edi
	movq	_mmCP_RB0_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	movl	%ebx, %ecx
	callq	_WREG32_SOC15
	movl	(%r15), %r14d
	movq	_mmCP_RB0_BASE_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	%ebx, %edi
	callq	_upper_32_bits
	movl	%r14d, %edi
	xorl	%esi, %esi
	movl	%r12d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	(%r15), %edi
	movq	_mmCP_RB_ACTIVE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	movl	$1, %ecx
	callq	_WREG32_SOC15
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	movq	%r15, %rdi
	movq	%r13, %rsi
	callq	_gfx_v10_0_cp_gfx_set_doorbell
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	callq	_mutex_lock
	movq	_PIPE_ID1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_gfx_v10_0_cp_gfx_switch_pipe
	movq	%rbx, %rdi
	callq	_mutex_unlock
	movq	8(%r15), %r14
	leaq	24(%r14), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movl	24(%r14), %eax
	leal	7(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$3, %edi
	callq	_order_base_2
	movl	%eax, %ebx
	movq	_CP_RB1_CNTL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_RB_BUFSZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%edi, %edi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r12), %esi
	movq	_RB_BLKSZ@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	addl	$-2, %ebx
	movl	%eax, %edi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_GC@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_mmCP_RB1_CNTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	xorl	%esi, %esi
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	$0, 28(%r14)
	movl	(%r12), %ebx
	movq	_mmCP_RB1_WPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	xorl	%edi, %edi
	callq	_lower_32_bits
	movl	%ebx, %edi
	xorl	%esi, %esi
	movl	%r13d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	(%r12), %ebx
	movq	_mmCP_RB1_WPTR_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	28(%r14), %edi
	callq	_upper_32_bits
	movl	%ebx, %edi
	xorl	%esi, %esi
	movl	%r13d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	32(%r14), %ebx
	shll	$2, %ebx
	addl	20(%r15), %ebx
	movl	(%r12), %r13d
	movq	_mmCP_RB1_RPTR_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	%ebx, %edi
	callq	_lower_32_bits
	movl	%r13d, %edi
	xorl	%esi, %esi
	movl	%r12d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movq	_GC@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_mmCP_RB1_RPTR_ADDR_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	%ebx, %edi
	callq	_upper_32_bits
	movq	_CP_RB1_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	%r12d, %edi
	xorl	%esi, %esi
	movl	%r13d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	36(%r14), %ebx
	shll	$2, %ebx
	addl	20(%r15), %ebx
	movq	_GC@GOTPCREL(%rip), %r15
	movl	(%r15), %r12d
	movq	_mmCP_RB_WPTR_POLL_ADDR_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	%ebx, %edi
	callq	_lower_32_bits
	movl	%r12d, %edi
	xorl	%esi, %esi
	movl	%r13d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	(%r15), %r12d
	movq	_mmCP_RB_WPTR_POLL_ADDR_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	%ebx, %edi
	callq	_upper_32_bits
	movl	%r12d, %edi
	xorl	%esi, %esi
	movl	%r13d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	$1, %edi
	callq	_mdelay
	movl	(%r15), %edi
	movq	_mmCP_RB1_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	callq	_WREG32_SOC15
	movl	40(%r14), %ebx
	sarl	$8, %ebx
	movl	(%r15), %edi
	movq	_mmCP_RB1_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	movl	%ebx, %ecx
	callq	_WREG32_SOC15
	movl	(%r15), %r14d
	movq	_mmCP_RB1_BASE_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	%ebx, %edi
	callq	_upper_32_bits
	movl	%r14d, %edi
	xorl	%esi, %esi
	movl	%r12d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	(%r15), %edi
	movq	_mmCP_RB1_ACTIVE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	movl	$1, %ecx
	callq	_WREG32_SOC15
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	callq	_gfx_v10_0_cp_gfx_set_doorbell
	movq	-72(%rbp), %r14                 ## 8-byte Reload
	movq	%r14, %rdi
	callq	_mutex_lock
	movq	_PIPE_ID0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_gfx_v10_0_cp_gfx_switch_pipe
	movq	%r14, %rdi
	callq	_mutex_unlock
	movq	%rbx, %rdi
	callq	_gfx_v10_0_cp_gfx_start
	movl	(%rbx), %edx
	testl	%edx, %edx
	jle	LBB0_8
## %bb.1:
	movq	8(%rbx), %rax
	leaq	-1(%rdx), %rsi
	movl	%edx, %ecx
	andl	$3, %ecx
	cmpq	$3, %rsi
	jae	LBB0_3
## %bb.2:
	xorl	%esi, %esi
	jmp	LBB0_5
LBB0_3:
	andl	$-4, %edx
	leaq	92(%rax), %rdi
	xorl	%esi, %esi
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movl	$1, -72(%rdi)
	movl	$1, -48(%rdi)
	movl	$1, -24(%rdi)
	movl	$1, (%rdi)
	addq	$4, %rsi
	addq	$96, %rdi
	cmpq	%rsi, %rdx
	jne	LBB0_4
LBB0_5:
	testq	%rcx, %rcx
	je	LBB0_8
## %bb.6:
	leaq	(%rsi,%rsi,2), %rdx
	leaq	(%rax,%rdx,8), %rax
	addq	$20, %rax
	shlq	$3, %rcx
	leaq	(%rcx,%rcx,2), %rcx
	xorl	%edx, %edx
	.p2align	4, 0x90
LBB0_7:                                 ## =>This Inner Loop Header: Depth=1
	movl	$1, (%rax,%rdx)
	addq	$24, %rdx
	cmpq	%rdx, %rcx
	jne	LBB0_7
LBB0_8:
	xorl	%eax, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GC,4,2                         ## @GC
	.comm	_mmCP_RB_WPTR_DELAY,4,2         ## @mmCP_RB_WPTR_DELAY
	.comm	_mmCP_RB_VMID,4,2               ## @mmCP_RB_VMID
	.comm	_PIPE_ID0,4,2                   ## @PIPE_ID0
	.comm	_CP_RB0_CNTL,4,2                ## @CP_RB0_CNTL
	.comm	_RB_BUFSZ,4,2                   ## @RB_BUFSZ
	.comm	_RB_BLKSZ,4,2                   ## @RB_BLKSZ
	.comm	_mmCP_RB0_CNTL,4,2              ## @mmCP_RB0_CNTL
	.comm	_mmCP_RB0_WPTR,4,2              ## @mmCP_RB0_WPTR
	.comm	_mmCP_RB0_WPTR_HI,4,2           ## @mmCP_RB0_WPTR_HI
	.comm	_mmCP_RB0_RPTR_ADDR,4,2         ## @mmCP_RB0_RPTR_ADDR
	.comm	_mmCP_RB0_RPTR_ADDR_HI,4,2      ## @mmCP_RB0_RPTR_ADDR_HI
	.comm	_CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK,4,2 ## @CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK
	.comm	_mmCP_RB_WPTR_POLL_ADDR_LO,4,2  ## @mmCP_RB_WPTR_POLL_ADDR_LO
	.comm	_mmCP_RB_WPTR_POLL_ADDR_HI,4,2  ## @mmCP_RB_WPTR_POLL_ADDR_HI
	.comm	_mmCP_RB0_BASE,4,2              ## @mmCP_RB0_BASE
	.comm	_mmCP_RB0_BASE_HI,4,2           ## @mmCP_RB0_BASE_HI
	.comm	_mmCP_RB_ACTIVE,4,2             ## @mmCP_RB_ACTIVE
	.comm	_PIPE_ID1,4,2                   ## @PIPE_ID1
	.comm	_CP_RB1_CNTL,4,2                ## @CP_RB1_CNTL
	.comm	_mmCP_RB1_CNTL,4,2              ## @mmCP_RB1_CNTL
	.comm	_mmCP_RB1_WPTR,4,2              ## @mmCP_RB1_WPTR
	.comm	_mmCP_RB1_WPTR_HI,4,2           ## @mmCP_RB1_WPTR_HI
	.comm	_mmCP_RB1_RPTR_ADDR,4,2         ## @mmCP_RB1_RPTR_ADDR
	.comm	_mmCP_RB1_RPTR_ADDR_HI,4,2      ## @mmCP_RB1_RPTR_ADDR_HI
	.comm	_CP_RB1_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK,4,2 ## @CP_RB1_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK
	.comm	_mmCP_RB1_BASE,4,2              ## @mmCP_RB1_BASE
	.comm	_mmCP_RB1_BASE_HI,4,2           ## @mmCP_RB1_BASE_HI
	.comm	_mmCP_RB1_ACTIVE,4,2            ## @mmCP_RB1_ACTIVE
	.comm	_BUF_SWAP,4,2                   ## @BUF_SWAP
	.no_dead_strip	_gfx_v10_0_cp_gfx_resume
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v10_0_cp_gfx_resume
_gfx_v10_0_cp_gfx_resume:               ; @gfx_v10_0_cp_gfx_resume
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x26, _GC@GOTPAGE
Lloh1:
	ldr	x26, [x26, _GC@GOTPAGEOFF]
	ldr	w0, [x26]
Lloh2:
	adrp	x8, _mmCP_RB_WPTR_DELAY@GOTPAGE
Lloh3:
	ldr	x8, [x8, _mmCP_RB_WPTR_DELAY@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	w1, #0
	mov	w3, #0
	bl	_WREG32_SOC15
	ldr	w0, [x26]
Lloh5:
	adrp	x8, _mmCP_RB_VMID@GOTPAGE
Lloh6:
	ldr	x8, [x8, _mmCP_RB_VMID@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	w1, #0
	mov	w3, #0
	bl	_WREG32_SOC15
	add	x20, x19, #16
	mov	x0, x20
	bl	_mutex_lock
Lloh8:
	adrp	x8, _PIPE_ID0@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PIPE_ID0@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_gfx_v10_0_cp_gfx_switch_pipe
	mov	x0, x20
	bl	_mutex_unlock
	ldr	x21, [x19, #8]
	ldr	w8, [x21]
	add	w9, w8, #7
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w0, w8, #3
	bl	_order_base_2
	mov	x22, x0
Lloh11:
	adrp	x23, _CP_RB0_CNTL@GOTPAGE
Lloh12:
	ldr	x23, [x23, _CP_RB0_CNTL@GOTPAGEOFF]
	ldr	w1, [x23]
Lloh13:
	adrp	x8, _RB_BUFSZ@GOTPAGE
Lloh14:
	ldr	x8, [x8, _RB_BUFSZ@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	mov	w0, #0
	mov	x3, x22
	bl	_REG_SET_FIELD
	ldr	w1, [x23]
Lloh16:
	adrp	x8, _RB_BLKSZ@GOTPAGE
Lloh17:
	ldr	x8, [x8, _RB_BLKSZ@GOTPAGEOFF]
Lloh18:
	ldr	w2, [x8]
	sub	w3, w22, #2
	bl	_REG_SET_FIELD
	mov	x22, x0
	ldr	w0, [x26]
Lloh19:
	adrp	x28, _mmCP_RB0_CNTL@GOTPAGE
Lloh20:
	ldr	x28, [x28, _mmCP_RB0_CNTL@GOTPAGEOFF]
	ldr	w2, [x28]
	mov	w1, #0
	mov	x3, x22
	bl	_WREG32_SOC15
	str	wzr, [x21, #4]
	ldr	w23, [x26]
Lloh21:
	adrp	x8, _mmCP_RB0_WPTR@GOTPAGE
Lloh22:
	ldr	x8, [x8, _mmCP_RB0_WPTR@GOTPAGEOFF]
Lloh23:
	ldr	w24, [x8]
	mov	w0, #0
	bl	_lower_32_bits
	mov	x3, x0
	mov	x0, x23
	mov	w1, #0
	mov	x2, x24
	bl	_WREG32_SOC15
	ldr	w23, [x26]
Lloh24:
	adrp	x8, _mmCP_RB0_WPTR_HI@GOTPAGE
Lloh25:
	ldr	x8, [x8, _mmCP_RB0_WPTR_HI@GOTPAGEOFF]
Lloh26:
	ldr	w24, [x8]
	ldr	w0, [x21, #4]
	bl	_upper_32_bits
	mov	x3, x0
	mov	x0, x23
	mov	w1, #0
	mov	x2, x24
	bl	_WREG32_SOC15
	ldr	w8, [x19, #20]
	ldr	w9, [x21, #8]
	add	w23, w8, w9, lsl #2
	ldr	w24, [x26]
Lloh27:
	adrp	x8, _mmCP_RB0_RPTR_ADDR@GOTPAGE
Lloh28:
	ldr	x8, [x8, _mmCP_RB0_RPTR_ADDR@GOTPAGEOFF]
Lloh29:
	ldr	w25, [x8]
	mov	x0, x23
	bl	_lower_32_bits
	mov	x3, x0
	mov	x0, x24
	mov	w1, #0
	mov	x2, x25
	bl	_WREG32_SOC15
	ldr	w24, [x26]
Lloh30:
	adrp	x8, _mmCP_RB0_RPTR_ADDR_HI@GOTPAGE
Lloh31:
	ldr	x8, [x8, _mmCP_RB0_RPTR_ADDR_HI@GOTPAGEOFF]
Lloh32:
	ldr	w25, [x8]
	mov	x0, x23
	bl	_upper_32_bits
Lloh33:
	adrp	x8, _CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK@GOTPAGE
Lloh34:
	ldr	x8, [x8, _CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	and	w3, w8, w0
	mov	x0, x24
	mov	w1, #0
	mov	x2, x25
	bl	_WREG32_SOC15
	ldr	w8, [x19, #20]
	ldr	w9, [x21, #12]
	add	w23, w8, w9, lsl #2
	ldr	w24, [x26]
Lloh36:
	adrp	x8, _mmCP_RB_WPTR_POLL_ADDR_LO@GOTPAGE
Lloh37:
	ldr	x8, [x8, _mmCP_RB_WPTR_POLL_ADDR_LO@GOTPAGEOFF]
Lloh38:
	ldr	w25, [x8]
	mov	x0, x23
	bl	_lower_32_bits
	mov	x3, x0
	mov	x0, x24
	mov	w1, #0
	mov	x2, x25
	bl	_WREG32_SOC15
	ldr	w24, [x26]
Lloh39:
	adrp	x27, _mmCP_RB_WPTR_POLL_ADDR_HI@GOTPAGE
Lloh40:
	ldr	x27, [x27, _mmCP_RB_WPTR_POLL_ADDR_HI@GOTPAGEOFF]
	ldr	w25, [x27]
	mov	x0, x23
	bl	_upper_32_bits
	mov	x3, x0
	mov	x0, x24
	mov	w1, #0
	mov	x2, x25
	bl	_WREG32_SOC15
	mov	w0, #1
	bl	_mdelay
	ldr	w0, [x26]
	ldr	w2, [x28]
	mov	w1, #0
	mov	x3, x22
	bl	_WREG32_SOC15
	ldr	w8, [x21, #16]
	asr	w22, w8, #8
	ldr	w0, [x26]
Lloh41:
	adrp	x8, _mmCP_RB0_BASE@GOTPAGE
Lloh42:
	ldr	x8, [x8, _mmCP_RB0_BASE@GOTPAGEOFF]
Lloh43:
	ldr	w2, [x8]
	mov	w1, #0
	mov	x3, x22
	bl	_WREG32_SOC15
	ldr	w23, [x26]
Lloh44:
	adrp	x8, _mmCP_RB0_BASE_HI@GOTPAGE
Lloh45:
	ldr	x8, [x8, _mmCP_RB0_BASE_HI@GOTPAGEOFF]
Lloh46:
	ldr	w24, [x8]
	mov	x0, x22
	bl	_upper_32_bits
	mov	x3, x0
	mov	x0, x23
	mov	w1, #0
	mov	x2, x24
	bl	_WREG32_SOC15
	ldr	w0, [x26]
Lloh47:
	adrp	x8, _mmCP_RB_ACTIVE@GOTPAGE
Lloh48:
	ldr	x8, [x8, _mmCP_RB_ACTIVE@GOTPAGEOFF]
Lloh49:
	ldr	w2, [x8]
	mov	w1, #0
	mov	w3, #1
	bl	_WREG32_SOC15
	mov	x0, x19
	mov	x1, x21
	bl	_gfx_v10_0_cp_gfx_set_doorbell
	mov	x0, x20
	bl	_mutex_lock
Lloh50:
	adrp	x8, _PIPE_ID1@GOTPAGE
Lloh51:
	ldr	x8, [x8, _PIPE_ID1@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_gfx_v10_0_cp_gfx_switch_pipe
	mov	x0, x20
	bl	_mutex_unlock
	ldr	x21, [x19, #8]
	ldr	w8, [x21, #24]!
	add	w9, w8, #7
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w0, w8, #3
	bl	_order_base_2
	mov	x22, x0
Lloh53:
	adrp	x23, _CP_RB1_CNTL@GOTPAGE
Lloh54:
	ldr	x23, [x23, _CP_RB1_CNTL@GOTPAGEOFF]
	ldr	w1, [x23]
Lloh55:
	adrp	x8, _RB_BUFSZ@GOTPAGE
Lloh56:
	ldr	x8, [x8, _RB_BUFSZ@GOTPAGEOFF]
Lloh57:
	ldr	w2, [x8]
	mov	w0, #0
	mov	x3, x22
	bl	_REG_SET_FIELD
	ldr	w1, [x23]
Lloh58:
	adrp	x8, _RB_BLKSZ@GOTPAGE
Lloh59:
	ldr	x8, [x8, _RB_BLKSZ@GOTPAGEOFF]
Lloh60:
	ldr	w2, [x8]
	sub	w3, w22, #2
	bl	_REG_SET_FIELD
	mov	x22, x0
	ldr	w0, [x26]
Lloh61:
	adrp	x28, _mmCP_RB1_CNTL@GOTPAGE
Lloh62:
	ldr	x28, [x28, _mmCP_RB1_CNTL@GOTPAGEOFF]
	ldr	w2, [x28]
	mov	w1, #0
	mov	x3, x22
	bl	_WREG32_SOC15
	str	wzr, [x21, #4]
	ldr	w23, [x26]
Lloh63:
	adrp	x8, _mmCP_RB1_WPTR@GOTPAGE
Lloh64:
	ldr	x8, [x8, _mmCP_RB1_WPTR@GOTPAGEOFF]
Lloh65:
	ldr	w24, [x8]
	mov	w0, #0
	bl	_lower_32_bits
	mov	x3, x0
	mov	x0, x23
	mov	w1, #0
	mov	x2, x24
	bl	_WREG32_SOC15
	ldr	w23, [x26]
Lloh66:
	adrp	x8, _mmCP_RB1_WPTR_HI@GOTPAGE
Lloh67:
	ldr	x8, [x8, _mmCP_RB1_WPTR_HI@GOTPAGEOFF]
Lloh68:
	ldr	w24, [x8]
	ldr	w0, [x21, #4]
	bl	_upper_32_bits
	mov	x3, x0
	mov	x0, x23
	mov	w1, #0
	mov	x2, x24
	bl	_WREG32_SOC15
	ldr	w8, [x19, #20]
	ldr	w9, [x21, #8]
	add	w23, w8, w9, lsl #2
	ldr	w24, [x26]
Lloh69:
	adrp	x8, _mmCP_RB1_RPTR_ADDR@GOTPAGE
Lloh70:
	ldr	x8, [x8, _mmCP_RB1_RPTR_ADDR@GOTPAGEOFF]
Lloh71:
	ldr	w25, [x8]
	mov	x0, x23
	bl	_lower_32_bits
	mov	x3, x0
	mov	x0, x24
	mov	w1, #0
	mov	x2, x25
	bl	_WREG32_SOC15
	ldr	w24, [x26]
Lloh72:
	adrp	x8, _mmCP_RB1_RPTR_ADDR_HI@GOTPAGE
Lloh73:
	ldr	x8, [x8, _mmCP_RB1_RPTR_ADDR_HI@GOTPAGEOFF]
Lloh74:
	ldr	w25, [x8]
	mov	x0, x23
	bl	_upper_32_bits
Lloh75:
	adrp	x8, _CP_RB1_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK@GOTPAGE
Lloh76:
	ldr	x8, [x8, _CP_RB1_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK@GOTPAGEOFF]
Lloh77:
	ldr	w8, [x8]
	and	w3, w8, w0
	mov	x0, x24
	mov	w1, #0
	mov	x2, x25
	bl	_WREG32_SOC15
	ldr	w8, [x19, #20]
	ldr	w9, [x21, #12]
	add	w23, w8, w9, lsl #2
	ldr	w24, [x26]
Lloh78:
	adrp	x8, _mmCP_RB_WPTR_POLL_ADDR_LO@GOTPAGE
Lloh79:
	ldr	x8, [x8, _mmCP_RB_WPTR_POLL_ADDR_LO@GOTPAGEOFF]
Lloh80:
	ldr	w25, [x8]
	mov	x0, x23
	bl	_lower_32_bits
	mov	x3, x0
	mov	x0, x24
	mov	w1, #0
	mov	x2, x25
	bl	_WREG32_SOC15
	ldr	w24, [x26]
	ldr	w25, [x27]
	mov	x0, x23
	bl	_upper_32_bits
	mov	x3, x0
	mov	x0, x24
	mov	w1, #0
	mov	x2, x25
	bl	_WREG32_SOC15
	mov	w0, #1
	bl	_mdelay
	ldr	w0, [x26]
	ldr	w2, [x28]
	mov	w1, #0
	mov	x3, x22
	bl	_WREG32_SOC15
	ldr	w8, [x21, #16]
	asr	w22, w8, #8
	ldr	w0, [x26]
Lloh81:
	adrp	x8, _mmCP_RB1_BASE@GOTPAGE
Lloh82:
	ldr	x8, [x8, _mmCP_RB1_BASE@GOTPAGEOFF]
Lloh83:
	ldr	w2, [x8]
	mov	w1, #0
	mov	x3, x22
	bl	_WREG32_SOC15
	ldr	w23, [x26]
Lloh84:
	adrp	x8, _mmCP_RB1_BASE_HI@GOTPAGE
Lloh85:
	ldr	x8, [x8, _mmCP_RB1_BASE_HI@GOTPAGEOFF]
Lloh86:
	ldr	w24, [x8]
	mov	x0, x22
	bl	_upper_32_bits
	mov	x3, x0
	mov	x0, x23
	mov	w1, #0
	mov	x2, x24
	bl	_WREG32_SOC15
	ldr	w0, [x26]
Lloh87:
	adrp	x8, _mmCP_RB1_ACTIVE@GOTPAGE
Lloh88:
	ldr	x8, [x8, _mmCP_RB1_ACTIVE@GOTPAGEOFF]
Lloh89:
	ldr	w2, [x8]
	mov	w1, #0
	mov	w3, #1
	bl	_WREG32_SOC15
	mov	x0, x19
	mov	x1, x21
	bl	_gfx_v10_0_cp_gfx_set_doorbell
	mov	x0, x20
	bl	_mutex_lock
Lloh90:
	adrp	x8, _PIPE_ID0@GOTPAGE
Lloh91:
	ldr	x8, [x8, _PIPE_ID0@GOTPAGEOFF]
Lloh92:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_gfx_v10_0_cp_gfx_switch_pipe
	mov	x0, x20
	bl	_mutex_unlock
	mov	x0, x19
	bl	_gfx_v10_0_cp_gfx_start
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_8
; %bb.1:
	ldr	x9, [x19, #8]
	cmp	w8, #4
	b.hs	LBB0_3
; %bb.2:
	mov	x10, #0
	b	LBB0_6
LBB0_3:
	and	x10, x8, #0xfffffffc
	add	x11, x9, #68
	mov	w12, #1
	mov	x13, x10
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	stur	w12, [x11, #-48]
	stur	w12, [x11, #-24]
	str	w12, [x11]
	str	w12, [x11, #24]
	add	x11, x11, #96
	subs	x13, x13, #4
	b.ne	LBB0_4
; %bb.5:
	cmp	x10, x8
	b.eq	LBB0_8
LBB0_6:
	mov	w11, #24
	madd	x9, x10, x11, x9
	add	x9, x9, #20
	sub	x8, x8, x10
	mov	w10, #1
LBB0_7:                                 ; =>This Inner Loop Header: Depth=1
	str	w10, [x9], #24
	subs	x8, x8, #1
	b.ne	LBB0_7
LBB0_8:
	mov	w0, #0
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_GC,4,2                         ; @GC
	.comm	_mmCP_RB_WPTR_DELAY,4,2         ; @mmCP_RB_WPTR_DELAY
	.comm	_mmCP_RB_VMID,4,2               ; @mmCP_RB_VMID
	.comm	_PIPE_ID0,4,2                   ; @PIPE_ID0
	.comm	_CP_RB0_CNTL,4,2                ; @CP_RB0_CNTL
	.comm	_RB_BUFSZ,4,2                   ; @RB_BUFSZ
	.comm	_RB_BLKSZ,4,2                   ; @RB_BLKSZ
	.comm	_mmCP_RB0_CNTL,4,2              ; @mmCP_RB0_CNTL
	.comm	_mmCP_RB0_WPTR,4,2              ; @mmCP_RB0_WPTR
	.comm	_mmCP_RB0_WPTR_HI,4,2           ; @mmCP_RB0_WPTR_HI
	.comm	_mmCP_RB0_RPTR_ADDR,4,2         ; @mmCP_RB0_RPTR_ADDR
	.comm	_mmCP_RB0_RPTR_ADDR_HI,4,2      ; @mmCP_RB0_RPTR_ADDR_HI
	.comm	_CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK,4,2 ; @CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK
	.comm	_mmCP_RB_WPTR_POLL_ADDR_LO,4,2  ; @mmCP_RB_WPTR_POLL_ADDR_LO
	.comm	_mmCP_RB_WPTR_POLL_ADDR_HI,4,2  ; @mmCP_RB_WPTR_POLL_ADDR_HI
	.comm	_mmCP_RB0_BASE,4,2              ; @mmCP_RB0_BASE
	.comm	_mmCP_RB0_BASE_HI,4,2           ; @mmCP_RB0_BASE_HI
	.comm	_mmCP_RB_ACTIVE,4,2             ; @mmCP_RB_ACTIVE
	.comm	_PIPE_ID1,4,2                   ; @PIPE_ID1
	.comm	_CP_RB1_CNTL,4,2                ; @CP_RB1_CNTL
	.comm	_mmCP_RB1_CNTL,4,2              ; @mmCP_RB1_CNTL
	.comm	_mmCP_RB1_WPTR,4,2              ; @mmCP_RB1_WPTR
	.comm	_mmCP_RB1_WPTR_HI,4,2           ; @mmCP_RB1_WPTR_HI
	.comm	_mmCP_RB1_RPTR_ADDR,4,2         ; @mmCP_RB1_RPTR_ADDR
	.comm	_mmCP_RB1_RPTR_ADDR_HI,4,2      ; @mmCP_RB1_RPTR_ADDR_HI
	.comm	_CP_RB1_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK,4,2 ; @CP_RB1_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK
	.comm	_mmCP_RB1_BASE,4,2              ; @mmCP_RB1_BASE
	.comm	_mmCP_RB1_BASE_HI,4,2           ; @mmCP_RB1_BASE_HI
	.comm	_mmCP_RB1_ACTIVE,4,2            ; @mmCP_RB1_ACTIVE
	.comm	_BUF_SWAP,4,2                   ; @BUF_SWAP
	.no_dead_strip	_gfx_v10_0_cp_gfx_resume
.subsections_via_symbols
