	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_uvd_send_upll_ctlreq    ## -- Begin function radeon_uvd_send_upll_ctlreq
	.p2align	4, 0x90
_radeon_uvd_send_upll_ctlreq:           ## @radeon_uvd_send_upll_ctlreq
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	_UPLL_CTLREQ_MASK@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	notl	%edx
	xorl	%ebx, %ebx
	movl	%esi, %edi
	xorl	%esi, %esi
	callq	_WREG32_P
	movl	$10, %edi
	callq	_mdelay
	movl	(%r14), %esi
	movl	%esi, %edx
	notl	%edx
	movl	%r15d, %edi
	callq	_WREG32_P
	movq	_UPLL_CTLACK_MASK@GOTPCREL(%rip), %r12
	movq	_UPLL_CTLACK2_MASK@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r13), %r14d
	orl	(%r12), %r14d
	movl	%r15d, %edi
	callq	_RREG32
	notl	%eax
	testl	%eax, %r14d
	je	LBB0_4
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	$10, %edi
	callq	_mdelay
	incl	%ebx
	cmpl	$100, %ebx
	jne	LBB0_1
## %bb.3:
	movl	$100, %ebx
LBB0_4:
	movq	_UPLL_CTLREQ_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	xorl	%r14d, %r14d
	movl	%r15d, %edi
	xorl	%esi, %esi
	callq	_WREG32_P
	cmpl	$100, %ebx
	jne	LBB0_6
## %bb.5:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_ERROR
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
LBB0_6:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_UPLL_CTLREQ_MASK,4,2           ## @UPLL_CTLREQ_MASK
	.comm	_UPLL_CTLACK_MASK,4,2           ## @UPLL_CTLACK_MASK
	.comm	_UPLL_CTLACK2_MASK,4,2          ## @UPLL_CTLACK2_MASK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Timeout setting UVD clocks!\n"

	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_uvd_send_upll_ctlreq    ; -- Begin function radeon_uvd_send_upll_ctlreq
	.p2align	2
_radeon_uvd_send_upll_ctlreq:           ; @radeon_uvd_send_upll_ctlreq
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
Lloh0:
	adrp	x20, _UPLL_CTLREQ_MASK@GOTPAGE
Lloh1:
	ldr	x20, [x20, _UPLL_CTLREQ_MASK@GOTPAGEOFF]
	ldr	w8, [x20]
	mvn	w2, w8
	mov	x0, x1
	mov	w1, #0
	bl	_WREG32_P
	mov	w0, #10
	bl	_mdelay
	ldr	w1, [x20]
	mvn	w2, w1
	mov	x0, x19
	bl	_WREG32_P
	mov	w21, #0
Lloh2:
	adrp	x22, _UPLL_CTLACK_MASK@GOTPAGE
Lloh3:
	ldr	x22, [x22, _UPLL_CTLACK_MASK@GOTPAGEOFF]
Lloh4:
	adrp	x23, _UPLL_CTLACK2_MASK@GOTPAGE
Lloh5:
	ldr	x23, [x23, _UPLL_CTLACK2_MASK@GOTPAGEOFF]
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w24, w9, w8
	mov	x0, x19
	bl	_RREG32
	bics	wzr, w24, w0
	b.eq	LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	mov	w0, #10
	bl	_mdelay
	add	w21, w21, #1
	cmp	w21, #100
	b.ne	LBB0_1
LBB0_3:
	ldr	w8, [x20]
	mvn	w2, w8
	mov	x0, x19
	mov	w1, #0
	bl	_WREG32_P
	mov	w0, #0
	cmp	w21, #100
	b.ne	LBB0_5
; %bb.4:
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
Lloh8:
	adrp	x8, _ETIMEDOUT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _ETIMEDOUT@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_5:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_UPLL_CTLREQ_MASK,4,2           ; @UPLL_CTLREQ_MASK
	.comm	_UPLL_CTLACK_MASK,4,2           ; @UPLL_CTLACK_MASK
	.comm	_UPLL_CTLACK2_MASK,4,2          ; @UPLL_CTLACK2_MASK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Timeout setting UVD clocks!\n"

	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
.subsections_via_symbols
