	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_crtc_atomic_disable
_tegra_crtc_atomic_disable:             ## @tegra_crtc_atomic_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_to_tegra_dc
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	_tegra_dc_idle
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	cmpq	$0, 8(%r14)
	je	LBB0_4
LBB0_3:
	movq	_DC_CMD_DISPLAY_POWER_CONTROL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_tegra_dc_readl
	movq	_PW0_ENABLE@GOTPCREL(%rip), %rcx
	movq	_PW1_ENABLE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	orl	(%rcx), %esi
	movq	_PW2_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_PW3_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_PW4_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_PM0_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_PM1_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r15), %edx
	movq	%r14, %rdi
	callq	_tegra_dc_writel
LBB0_4:
	movq	%r14, %rdi
	addq	$4, %rdi
	callq	_tegra_dc_stats_reset
	movq	%rbx, %rdi
	callq	_drm_crtc_vblank_off
	movq	(%rbx), %rdi
	callq	_spin_lock_irq
	movq	8(%rbx), %rax
	movq	(%rax), %rsi
	testq	%rsi, %rsi
	je	LBB0_6
## %bb.5:
	movq	%rbx, %rdi
	callq	_drm_crtc_send_vblank_event
	movq	8(%rbx), %rax
	movq	$0, (%rax)
LBB0_6:
	movq	(%rbx), %rdi
	callq	_spin_unlock_irq
	movl	(%r14), %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_pm_runtime_put_sync            ## TAILCALL
LBB0_1:
	movq	%r14, %rdi
	callq	_tegra_dc_stop
	movq	%r14, %rdi
	movl	$100, %esi
	callq	_tegra_dc_wait_idle
	cmpq	$0, 8(%r14)
	jne	LBB0_3
	jmp	LBB0_4
	.cfi_endproc
                                        ## -- End function
	.comm	_DC_CMD_DISPLAY_POWER_CONTROL,4,2 ## @DC_CMD_DISPLAY_POWER_CONTROL
	.comm	_PW0_ENABLE,4,2                 ## @PW0_ENABLE
	.comm	_PW1_ENABLE,4,2                 ## @PW1_ENABLE
	.comm	_PW2_ENABLE,4,2                 ## @PW2_ENABLE
	.comm	_PW3_ENABLE,4,2                 ## @PW3_ENABLE
	.comm	_PW4_ENABLE,4,2                 ## @PW4_ENABLE
	.comm	_PM0_ENABLE,4,2                 ## @PM0_ENABLE
	.comm	_PM1_ENABLE,4,2                 ## @PM1_ENABLE
	.no_dead_strip	_tegra_crtc_atomic_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_crtc_atomic_disable
_tegra_crtc_atomic_disable:             ; @tegra_crtc_atomic_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	bl	_to_tegra_dc
	mov	x19, x0
	bl	_tegra_dc_idle
	cbz	w0, LBB0_6
; %bb.1:
	ldr	x8, [x19, #8]
	cbz	x8, LBB0_3
LBB0_2:
Lloh0:
	adrp	x21, _DC_CMD_DISPLAY_POWER_CONTROL@GOTPAGE
Lloh1:
	ldr	x21, [x21, _DC_CMD_DISPLAY_POWER_CONTROL@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_tegra_dc_readl
Lloh2:
	adrp	x8, _PW0_ENABLE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PW0_ENABLE@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _PW1_ENABLE@GOTPAGE
Lloh6:
	ldr	x9, [x9, _PW1_ENABLE@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh8:
	adrp	x9, _PW2_ENABLE@GOTPAGE
Lloh9:
	ldr	x9, [x9, _PW2_ENABLE@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh11:
	adrp	x9, _PW3_ENABLE@GOTPAGE
Lloh12:
	ldr	x9, [x9, _PW3_ENABLE@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh14:
	adrp	x9, _PW4_ENABLE@GOTPAGE
Lloh15:
	ldr	x9, [x9, _PW4_ENABLE@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh17:
	adrp	x9, _PM0_ENABLE@GOTPAGE
Lloh18:
	ldr	x9, [x9, _PM0_ENABLE@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh20:
	adrp	x9, _PM1_ENABLE@GOTPAGE
Lloh21:
	ldr	x9, [x9, _PM1_ENABLE@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w8, w9
	bic	w1, w0, w8
	ldr	w2, [x21]
	mov	x0, x19
	bl	_tegra_dc_writel
LBB0_3:
	add	x0, x19, #4
	bl	_tegra_dc_stats_reset
	mov	x0, x20
	bl	_drm_crtc_vblank_off
	ldr	x0, [x20]
	bl	_spin_lock_irq
	ldr	x8, [x20, #8]
	ldr	x1, [x8]
	cbz	x1, LBB0_5
; %bb.4:
	mov	x0, x20
	bl	_drm_crtc_send_vblank_event
	ldr	x8, [x20, #8]
	str	xzr, [x8]
LBB0_5:
	ldr	x0, [x20]
	bl	_spin_unlock_irq
	ldr	w0, [x19]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_pm_runtime_put_sync
LBB0_6:
	mov	x0, x19
	bl	_tegra_dc_stop
	mov	x0, x19
	mov	w1, #100
	bl	_tegra_dc_wait_idle
	ldr	x8, [x19, #8]
	cbnz	x8, LBB0_2
	b	LBB0_3
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_DC_CMD_DISPLAY_POWER_CONTROL,4,2 ; @DC_CMD_DISPLAY_POWER_CONTROL
	.comm	_PW0_ENABLE,4,2                 ; @PW0_ENABLE
	.comm	_PW1_ENABLE,4,2                 ; @PW1_ENABLE
	.comm	_PW2_ENABLE,4,2                 ; @PW2_ENABLE
	.comm	_PW3_ENABLE,4,2                 ; @PW3_ENABLE
	.comm	_PW4_ENABLE,4,2                 ; @PW4_ENABLE
	.comm	_PM0_ENABLE,4,2                 ; @PM0_ENABLE
	.comm	_PM1_ENABLE,4,2                 ; @PM1_ENABLE
	.no_dead_strip	_tegra_crtc_atomic_disable
.subsections_via_symbols
