	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_irq_get                 ## -- Begin function amdgpu_irq_get
	.p2align	4, 0x90
_amdgpu_irq_get:                        ## @amdgpu_irq_get
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rax
	cmpl	$0, (%rax)
	je	LBB0_1
## %bb.3:
	movl	%edx, %r14d
	movq	%rsi, %rbx
	cmpl	%edx, (%rsi)
	jbe	LBB0_4
## %bb.5:
	movq	8(%rbx), %rax
	testq	%rax, %rax
	je	LBB0_4
## %bb.6:
	movq	16(%rbx), %rcx
	cmpl	$0, (%rcx)
	je	LBB0_4
## %bb.7:
	movq	%rdi, %r15
	movl	%r14d, %ecx
	leaq	(%rax,%rcx,4), %rdi
	callq	_atomic_inc_return
	movl	%eax, %ecx
	xorl	%eax, %eax
	cmpl	$1, %ecx
	jne	LBB0_8
## %bb.9:
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_irq_update              ## TAILCALL
LBB0_4:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	jmp	LBB0_2
LBB0_1:
	movq	_ENOENT@GOTPCREL(%rip), %rcx
LBB0_2:
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ENOENT,4,2                     ## @ENOENT
	.comm	_EINVAL,4,2                     ## @EINVAL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_irq_get                 ; -- Begin function amdgpu_irq_get
	.p2align	2
_amdgpu_irq_get:                        ; @amdgpu_irq_get
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x8, [x0]
	ldr	w8, [x8]
	cbz	w8, LBB0_7
; %bb.1:
	mov	x19, x2
	mov	x20, x1
	ldr	w8, [x1]
	cmp	w8, w2
	b.ls	LBB0_6
; %bb.2:
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_6
; %bb.3:
	ldr	x9, [x20, #16]
	ldr	w9, [x9]
	cbz	w9, LBB0_6
; %bb.4:
	mov	x21, x0
	add	x0, x8, w19, uxtw #2
	bl	_atomic_inc_return
	cmp	w0, #1
	b.ne	LBB0_10
; %bb.5:
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_amdgpu_irq_update
LBB0_6:
Lloh0:
	adrp	x8, _EINVAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:
Lloh2:
	adrp	x8, _ENOENT@GOTPAGE
Lloh3:
	ldr	x8, [x8, _ENOENT@GOTPAGEOFF]
LBB0_8:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_10:
	mov	w0, #0
	b	LBB0_9
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.cfi_endproc
                                        ; -- End function
	.comm	_ENOENT,4,2                     ; @ENOENT
	.comm	_EINVAL,4,2                     ; @EINVAL
.subsections_via_symbols
