	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function kv_dpm_disable
_kv_dpm_disable:                        ## @kv_dpm_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_kv_get_pi
	movq	%rax, %r14
	leaq	12(%rbx), %r15
	movq	_AMDGPU_THERMAL_IRQ_LOW_TO_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_amdgpu_irq_put
	movq	_AMDGPU_THERMAL_IRQ_HIGH_TO_LOW@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_amdgpu_irq_put
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_kv_smc_bapm_enable
	movq	(%rbx), %rax
	movq	_CHIP_MULLINS@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_kv_enable_nb_dpm
LBB0_2:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_kv_dpm_powergate_acp
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_kv_dpm_powergate_samu
	cmpq	$0, 8(%r14)
	je	LBB0_4
## %bb.3:
	movq	_PPSMC_MSG_VCEPowerON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_amdgpu_kv_notify_message_to_smu
LBB0_4:
	cmpq	$0, (%r14)
	je	LBB0_6
## %bb.5:
	movq	_PPSMC_MSG_UVDPowerON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_amdgpu_kv_notify_message_to_smu
LBB0_6:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_kv_enable_smc_cac
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_kv_enable_didt
	movq	%rbx, %rdi
	callq	_kv_clear_vc
	movq	%rbx, %rdi
	callq	_kv_stop_dpm
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_kv_enable_ulv
	movq	%rbx, %rdi
	callq	_kv_reset_am
	movl	8(%rbx), %esi
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_kv_update_current_ps           ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_THERMAL_IRQ_LOW_TO_HIGH,4,2 ## @AMDGPU_THERMAL_IRQ_LOW_TO_HIGH
	.comm	_AMDGPU_THERMAL_IRQ_HIGH_TO_LOW,4,2 ## @AMDGPU_THERMAL_IRQ_HIGH_TO_LOW
	.comm	_CHIP_MULLINS,8,3               ## @CHIP_MULLINS
	.comm	_PPSMC_MSG_VCEPowerON,4,2       ## @PPSMC_MSG_VCEPowerON
	.comm	_PPSMC_MSG_UVDPowerON,4,2       ## @PPSMC_MSG_UVDPowerON
	.no_dead_strip	_kv_dpm_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function kv_dpm_disable
_kv_dpm_disable:                        ; @kv_dpm_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_kv_get_pi
	mov	x20, x0
	add	x21, x19, #12
Lloh0:
	adrp	x8, _AMDGPU_THERMAL_IRQ_LOW_TO_HIGH@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_THERMAL_IRQ_LOW_TO_HIGH@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x21
	bl	_amdgpu_irq_put
Lloh3:
	adrp	x8, _AMDGPU_THERMAL_IRQ_HIGH_TO_LOW@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AMDGPU_THERMAL_IRQ_HIGH_TO_LOW@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x21
	bl	_amdgpu_irq_put
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_kv_smc_bapm_enable
	ldr	x8, [x19]
Lloh6:
	adrp	x9, _CHIP_MULLINS@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CHIP_MULLINS@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	mov	x0, x19
	mov	w1, #0
	bl	_kv_enable_nb_dpm
LBB0_2:
	mov	x0, x19
	mov	w1, #0
	bl	_kv_dpm_powergate_acp
	mov	x0, x19
	mov	w1, #0
	bl	_kv_dpm_powergate_samu
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_4
; %bb.3:
Lloh9:
	adrp	x8, _PPSMC_MSG_VCEPowerON@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PPSMC_MSG_VCEPowerON@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_amdgpu_kv_notify_message_to_smu
LBB0_4:
	ldr	x8, [x20]
	cbz	x8, LBB0_6
; %bb.5:
Lloh12:
	adrp	x8, _PPSMC_MSG_UVDPowerON@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PPSMC_MSG_UVDPowerON@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_amdgpu_kv_notify_message_to_smu
LBB0_6:
	mov	x0, x19
	mov	w1, #0
	bl	_kv_enable_smc_cac
	mov	x0, x19
	mov	w1, #0
	bl	_kv_enable_didt
	mov	x0, x19
	bl	_kv_clear_vc
	mov	x0, x19
	bl	_kv_stop_dpm
	mov	x0, x19
	mov	w1, #0
	bl	_kv_enable_ulv
	mov	x0, x19
	bl	_kv_reset_am
	ldr	w1, [x19, #8]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_kv_update_current_ps
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_THERMAL_IRQ_LOW_TO_HIGH,4,2 ; @AMDGPU_THERMAL_IRQ_LOW_TO_HIGH
	.comm	_AMDGPU_THERMAL_IRQ_HIGH_TO_LOW,4,2 ; @AMDGPU_THERMAL_IRQ_HIGH_TO_LOW
	.comm	_CHIP_MULLINS,8,3               ; @CHIP_MULLINS
	.comm	_PPSMC_MSG_VCEPowerON,4,2       ; @PPSMC_MSG_VCEPowerON
	.comm	_PPSMC_MSG_UVDPowerON,4,2       ; @PPSMC_MSG_UVDPowerON
	.no_dead_strip	_kv_dpm_disable
.subsections_via_symbols
