	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ironlake_crtc_compute_clock
_ironlake_crtc_compute_clock:           ## @ironlake_crtc_compute_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r13
	movq	%rdi, %r14
	movl	4(%rdi), %edi
	callq	_to_i915
	movq	%rax, %r15
	movl	20(%r13), %edi
	callq	_to_intel_atomic_state
	movq	%rax, %r12
	leaq	16(%r13), %rdi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	cmpl	$0, 12(%r13)
	je	LBB0_19
## %bb.1:
	movq	_INTEL_OUTPUT_LVDS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_intel_crtc_has_type
	testq	%rax, %rax
	movq	%r12, -48(%rbp)                 ## 8-byte Spill
	je	LBB0_2
## %bb.3:
	movq	%r15, %rdi
	callq	_intel_panel_use_ssc
	testq	%rax, %rax
	je	LBB0_4
## %bb.5:
	movl	(%r15), %esi
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_KMS
	movl	(%r15), %r12d
	jmp	LBB0_6
LBB0_2:
	movl	$120000, %r12d                  ## imm = 0x1D4C0
	movq	_intel_limits_ironlake_dac@GOTPCREL(%rip), %rdi
	cmpl	$0, 8(%r13)
	jne	LBB0_16
	jmp	LBB0_14
LBB0_4:
	movl	$120000, %r12d                  ## imm = 0x1D4C0
LBB0_6:
	movq	%r15, %rdi
	callq	_intel_is_dual_link_lvds
	testq	%rax, %rax
	je	LBB0_10
## %bb.7:
	cmpl	$100000, %r12d                  ## imm = 0x186A0
	jne	LBB0_8
## %bb.9:
	movq	_intel_limits_ironlake_dual_lvds_100m@GOTPCREL(%rip), %rdi
	cmpl	$0, 8(%r13)
	jne	LBB0_16
	jmp	LBB0_14
LBB0_10:
	cmpl	$100000, %r12d                  ## imm = 0x186A0
	jne	LBB0_11
## %bb.12:
	movq	_intel_limits_ironlake_single_lvds_100m@GOTPCREL(%rip), %rdi
	cmpl	$0, 8(%r13)
	jne	LBB0_16
	jmp	LBB0_14
LBB0_8:
	movq	_intel_limits_ironlake_dual_lvds@GOTPCREL(%rip), %rdi
	cmpl	$0, 8(%r13)
	jne	LBB0_16
	jmp	LBB0_14
LBB0_11:
	movq	_intel_limits_ironlake_single_lvds@GOTPCREL(%rip), %rdi
	cmpl	$0, 8(%r13)
	jne	LBB0_16
LBB0_14:
	movl	4(%r13), %edx
	xorl	%ebx, %ebx
	movq	%r13, %rsi
	movl	%r12d, %ecx
	xorl	%r8d, %r8d
	movq	%r13, %r9
	callq	_g4x_find_best_dpll
	testl	%eax, %eax
	je	LBB0_15
LBB0_16:
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	_ironlake_compute_dpll
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_intel_reserve_shared_dplls
	testl	%eax, %eax
	jne	LBB0_19
## %bb.17:
	movl	(%r14), %edi
	callq	_pipe_name
	leaq	L_.str.2(%rip), %rdi
	movl	%eax, %esi
	callq	_DRM_DEBUG_KMS
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	jmp	LBB0_18
LBB0_15:
	leaq	L_.str.1(%rip), %rdi
	callq	_DRM_ERROR
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_18:
	subl	(%rax), %ebx
LBB0_19:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_OUTPUT_LVDS,4,2          ## @INTEL_OUTPUT_LVDS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"using SSC reference clock of %d kHz\n"

	.comm	_intel_limits_ironlake_dual_lvds_100m,4,2 ## @intel_limits_ironlake_dual_lvds_100m
	.comm	_intel_limits_ironlake_dual_lvds,4,2 ## @intel_limits_ironlake_dual_lvds
	.comm	_intel_limits_ironlake_single_lvds_100m,4,2 ## @intel_limits_ironlake_single_lvds_100m
	.comm	_intel_limits_ironlake_single_lvds,4,2 ## @intel_limits_ironlake_single_lvds
	.comm	_intel_limits_ironlake_dac,4,2  ## @intel_limits_ironlake_dac
L_.str.1:                               ## @.str.1
	.asciz	"Couldn't find PLL settings for mode!\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
L_.str.2:                               ## @.str.2
	.asciz	"failed to find PLL for pipe %c\n"

	.no_dead_strip	_ironlake_crtc_compute_clock
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ironlake_crtc_compute_clock
_ironlake_crtc_compute_clock:           ; @ironlake_crtc_compute_clock
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
	ldr	w0, [x0, #4]
	bl	_to_i915
	mov	x23, x0
	ldr	w0, [x20, #20]
	bl	_to_intel_atomic_state
	mov	x21, x0
	add	x0, x20, #16
	mov	w1, #0
	mov	w2, #4
	bl	_memset
	ldr	w8, [x20, #12]
	cbz	w8, LBB0_8
; %bb.1:
	mov	w22, #54464
	movk	w22, #1, lsl #16
Lloh0:
	adrp	x8, _INTEL_OUTPUT_LVDS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_OUTPUT_LVDS@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_crtc_has_type
	cbz	x0, LBB0_5
; %bb.2:
	mov	x0, x23
	bl	_intel_panel_use_ssc
	cbz	x0, LBB0_4
; %bb.3:
	ldr	w1, [x23]
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
	ldr	w22, [x23]
LBB0_4:
	mov	x0, x23
	bl	_intel_is_dual_link_lvds
Lloh5:
	adrp	x8, _intel_limits_ironlake_single_lvds@GOTPAGE
Lloh6:
	ldr	x8, [x8, _intel_limits_ironlake_single_lvds@GOTPAGEOFF]
Lloh7:
	adrp	x9, _intel_limits_ironlake_single_lvds_100m@GOTPAGE
Lloh8:
	ldr	x9, [x9, _intel_limits_ironlake_single_lvds_100m@GOTPAGEOFF]
	sub	w10, w22, #24, lsl #12          ; =98304
	cmp	w10, #1696
Lloh9:
	adrp	x10, _intel_limits_ironlake_dual_lvds@GOTPAGE
Lloh10:
	ldr	x10, [x10, _intel_limits_ironlake_dual_lvds@GOTPAGEOFF]
	csel	x8, x9, x8, eq
Lloh11:
	adrp	x9, _intel_limits_ironlake_dual_lvds_100m@GOTPAGE
Lloh12:
	ldr	x9, [x9, _intel_limits_ironlake_dual_lvds_100m@GOTPAGEOFF]
	csel	x9, x9, x10, eq
	cmp	x0, #0
	csel	x0, x8, x9, eq
	ldr	w8, [x20, #8]
	cbnz	w8, LBB0_7
	b	LBB0_6
LBB0_5:
Lloh13:
	adrp	x0, _intel_limits_ironlake_dac@GOTPAGE
Lloh14:
	ldr	x0, [x0, _intel_limits_ironlake_dac@GOTPAGEOFF]
	ldr	w8, [x20, #8]
	cbnz	w8, LBB0_7
LBB0_6:
	ldr	w2, [x20, #4]
	mov	x1, x20
	mov	x3, x22
	mov	x4, #0
	mov	x5, x20
	bl	_g4x_find_best_dpll
	cbz	w0, LBB0_10
LBB0_7:
	mov	x0, x19
	mov	x1, x20
	mov	x2, #0
	bl	_ironlake_compute_dpll
	mov	x0, x21
	mov	x1, x19
	mov	x2, #0
	bl	_intel_reserve_shared_dplls
	cbz	w0, LBB0_9
LBB0_8:
	mov	w0, #0
	b	LBB0_12
LBB0_9:
	ldr	w0, [x19]
	bl	_pipe_name
	mov	x1, x0
Lloh15:
	adrp	x0, l_.str.2@PAGE
Lloh16:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_DEBUG_KMS
	b	LBB0_11
LBB0_10:
Lloh17:
	adrp	x0, l_.str.1@PAGE
Lloh18:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_ERROR
LBB0_11:
Lloh19:
	adrp	x8, _EINVAL@GOTPAGE
Lloh20:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_12:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_OUTPUT_LVDS,4,2          ; @INTEL_OUTPUT_LVDS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"using SSC reference clock of %d kHz\n"

	.comm	_intel_limits_ironlake_dual_lvds_100m,4,2 ; @intel_limits_ironlake_dual_lvds_100m
	.comm	_intel_limits_ironlake_dual_lvds,4,2 ; @intel_limits_ironlake_dual_lvds
	.comm	_intel_limits_ironlake_single_lvds_100m,4,2 ; @intel_limits_ironlake_single_lvds_100m
	.comm	_intel_limits_ironlake_single_lvds,4,2 ; @intel_limits_ironlake_single_lvds
	.comm	_intel_limits_ironlake_dac,4,2  ; @intel_limits_ironlake_dac
l_.str.1:                               ; @.str.1
	.asciz	"Couldn't find PLL settings for mode!\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
l_.str.2:                               ; @.str.2
	.asciz	"failed to find PLL for pipe %c\n"

	.no_dead_strip	_ironlake_crtc_compute_clock
.subsections_via_symbols
