	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function jpeg_v2_0_start
_jpeg_v2_0_start:                       ## @jpeg_v2_0_start
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %r15
	movq	_UVD_PGFSM_CONFIG__UVDJ_PWR_CONFIG__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$1, %ebx
	shll	%cl, %ebx
	movq	_UVD@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_mmUVD_PGFSM_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_WREG32
	movq	_VCN@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_mmUVD_PGFSM_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_UVD_PGFSM_STATUS_UVDJ_PWR_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	xorl	%esi, %esi
	xorl	%r9d, %r9d
	callq	_SOC15_WAIT_ON_RREG
	movl	(%r12), %edi
	movq	_mmUVD_JPEG_POWER_STATUS@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movl	%eax, %edi
	callq	_RREG32
	movl	%eax, %ebx
	andl	$-2, %ebx
	movl	(%r12), %edi
	movl	(%r13), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_WREG32
	movl	(%r14), %edi
	movq	_mmJPEG_CGC_CTRL@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	btsl	%ecx, %eax
	movq	_JPEG_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %dl
	movq	_JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$4, %ebx
	shll	%cl, %ebx
	btsl	%edx, %eax
	orl	%eax, %ebx
	movl	(%r14), %edi
	movl	(%r13), %edx
	xorl	%esi, %esi
	movl	%ebx, %ecx
	callq	_WREG32_SOC15
	movl	(%r14), %edi
	movq	_mmJPEG_CGC_GATE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_JPEG_CGC_GATE__JPEG_DEC_MASK@GOTPCREL(%rip), %rdx
	movq	_JPEG_CGC_GATE__JPEG2_DEC_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rdx), %ecx
	movq	_JPEG_CGC_GATE__JPEG_ENC_MASK@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	movq	_JPEG_CGC_GATE__JMCIF_MASK@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	movq	_JPEG_CGC_GATE__JRBBM_MASK@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	notl	%ecx
	andl	%eax, %ecx
	movl	(%r14), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	callq	_WREG32_SOC15
	movl	(%r12), %edi
	movq	_mmUVD_JMI_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movq	_UVD_JMI_CNTL__SOFT_RESET_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movl	%eax, %edi
	xorl	%esi, %esi
	callq	_WREG32_P
	movl	(%r14), %edi
	movq	_mmJPEG_SYS_INT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movq	_JPEG_SYS_INT_EN__DJRBC_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%esi, %edx
	notl	%edx
	movl	%eax, %edi
	callq	_WREG32_P
	movl	(%r12), %edi
	movq	_mmUVD_LMI_JRBC_RB_VMID@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	callq	_WREG32_SOC15
	movl	(%r12), %edi
	movq	_mmUVD_JRBC_RB_CNTL@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	xorl	%esi, %esi
	movl	$3, %ecx
	callq	_WREG32_SOC15
	movl	(%r12), %ebx
	movq	_mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	16(%r15), %edi
	callq	_lower_32_bits
	movl	%ebx, %edi
	xorl	%esi, %esi
	movl	%r14d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	(%r12), %ebx
	movq	_mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	16(%r15), %edi
	callq	_upper_32_bits
	movl	%ebx, %edi
	xorl	%esi, %esi
	movl	%r14d, %edx
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	(%r12), %edi
	movq	_mmUVD_JRBC_RB_RPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	callq	_WREG32_SOC15
	movl	(%r12), %edi
	movq	_mmUVD_JRBC_RB_WPTR@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	callq	_WREG32_SOC15
	movl	(%r12), %edi
	movl	(%r13), %edx
	xorl	%esi, %esi
	movl	$2, %ecx
	callq	_WREG32_SOC15
	movl	(%r12), %edi
	movq	_mmUVD_JRBC_RB_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%r15), %eax
	leal	3(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$2, %ecx
	xorl	%esi, %esi
	callq	_WREG32_SOC15
	movl	(%r12), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	%rax, 8(%r15)
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_UVD_PGFSM_CONFIG__UVDJ_PWR_CONFIG__SHIFT,4,2 ## @UVD_PGFSM_CONFIG__UVDJ_PWR_CONFIG__SHIFT
	.comm	_UVD,4,2                        ## @UVD
	.comm	_mmUVD_PGFSM_CONFIG,4,2         ## @mmUVD_PGFSM_CONFIG
	.comm	_VCN,4,2                        ## @VCN
	.comm	_mmUVD_PGFSM_STATUS,4,2         ## @mmUVD_PGFSM_STATUS
	.comm	_UVD_PGFSM_STATUS_UVDJ_PWR_ON,4,2 ## @UVD_PGFSM_STATUS_UVDJ_PWR_ON
	.comm	_UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK,4,2 ## @UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK
	.comm	_mmUVD_JPEG_POWER_STATUS,4,2    ## @mmUVD_JPEG_POWER_STATUS
	.comm	_mmJPEG_CGC_CTRL,4,2            ## @mmJPEG_CGC_CTRL
	.comm	_JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT,4,2 ## @JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT
	.comm	_JPEG_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT,4,2 ## @JPEG_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT
	.comm	_JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT,4,2 ## @JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT
	.comm	_mmJPEG_CGC_GATE,4,2            ## @mmJPEG_CGC_GATE
	.comm	_JPEG_CGC_GATE__JPEG_DEC_MASK,4,2 ## @JPEG_CGC_GATE__JPEG_DEC_MASK
	.comm	_JPEG_CGC_GATE__JPEG2_DEC_MASK,4,2 ## @JPEG_CGC_GATE__JPEG2_DEC_MASK
	.comm	_JPEG_CGC_GATE__JPEG_ENC_MASK,4,2 ## @JPEG_CGC_GATE__JPEG_ENC_MASK
	.comm	_JPEG_CGC_GATE__JMCIF_MASK,4,2  ## @JPEG_CGC_GATE__JMCIF_MASK
	.comm	_JPEG_CGC_GATE__JRBBM_MASK,4,2  ## @JPEG_CGC_GATE__JRBBM_MASK
	.comm	_mmUVD_JMI_CNTL,4,2             ## @mmUVD_JMI_CNTL
	.comm	_UVD_JMI_CNTL__SOFT_RESET_MASK,4,2 ## @UVD_JMI_CNTL__SOFT_RESET_MASK
	.comm	_mmJPEG_SYS_INT_EN,4,2          ## @mmJPEG_SYS_INT_EN
	.comm	_JPEG_SYS_INT_EN__DJRBC_MASK,4,2 ## @JPEG_SYS_INT_EN__DJRBC_MASK
	.comm	_mmUVD_LMI_JRBC_RB_VMID,4,2     ## @mmUVD_LMI_JRBC_RB_VMID
	.comm	_mmUVD_JRBC_RB_CNTL,4,2         ## @mmUVD_JRBC_RB_CNTL
	.comm	_mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW,4,2 ## @mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW
	.comm	_mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,4,2 ## @mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH
	.comm	_mmUVD_JRBC_RB_RPTR,4,2         ## @mmUVD_JRBC_RB_RPTR
	.comm	_mmUVD_JRBC_RB_WPTR,4,2         ## @mmUVD_JRBC_RB_WPTR
	.comm	_mmUVD_JRBC_RB_SIZE,4,2         ## @mmUVD_JRBC_RB_SIZE
	.no_dead_strip	_jpeg_v2_0_start
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function jpeg_v2_0_start
_jpeg_v2_0_start:                       ; @jpeg_v2_0_start
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	x21, [x0]
Lloh0:
	adrp	x8, _UVD_PGFSM_CONFIG__UVDJ_PWR_CONFIG__SHIFT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _UVD_PGFSM_CONFIG__UVDJ_PWR_CONFIG__SHIFT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	mov	w23, #1
	lsl	w19, w23, w8
Lloh3:
	adrp	x22, _UVD@GOTPAGE
Lloh4:
	ldr	x22, [x22, _UVD@GOTPAGEOFF]
	ldr	w0, [x22]
Lloh5:
	adrp	x8, _mmUVD_PGFSM_CONFIG@GOTPAGE
Lloh6:
	ldr	x8, [x8, _mmUVD_PGFSM_CONFIG@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	mov	x1, x19
	bl	_WREG32
Lloh8:
	adrp	x20, _VCN@GOTPAGE
Lloh9:
	ldr	x20, [x20, _VCN@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh10:
	adrp	x8, _mmUVD_PGFSM_STATUS@GOTPAGE
Lloh11:
	ldr	x8, [x8, _mmUVD_PGFSM_STATUS@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
Lloh13:
	adrp	x8, _UVD_PGFSM_STATUS_UVDJ_PWR_ON@GOTPAGE
Lloh14:
	ldr	x8, [x8, _UVD_PGFSM_STATUS_UVDJ_PWR_ON@GOTPAGEOFF]
Lloh15:
	ldr	w3, [x8]
Lloh16:
	adrp	x8, _UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK@GOTPAGE
Lloh17:
	ldr	x8, [x8, _UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK@GOTPAGEOFF]
Lloh18:
	ldr	w4, [x8]
	mov	w1, #0
	mov	w5, #0
	bl	_SOC15_WAIT_ON_RREG
	ldr	w0, [x22]
Lloh19:
	adrp	x24, _mmUVD_JPEG_POWER_STATUS@GOTPAGE
Lloh20:
	ldr	x24, [x24, _mmUVD_JPEG_POWER_STATUS@GOTPAGEOFF]
	ldr	w2, [x24]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	bl	_RREG32
	and	w19, w0, #0xfffffffe
	ldr	w0, [x22]
	ldr	w2, [x24]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	mov	x1, x19
	bl	_WREG32
	ldr	w0, [x20]
Lloh21:
	adrp	x19, _mmJPEG_CGC_CTRL@GOTPAGE
Lloh22:
	ldr	x19, [x19, _mmJPEG_CGC_CTRL@GOTPAGEOFF]
	ldr	w2, [x19]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh23:
	adrp	x8, _JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT@GOTPAGE
Lloh24:
	ldr	x8, [x8, _JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	lsl	w8, w23, w8
Lloh26:
	adrp	x9, _JPEG_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT@GOTPAGE
Lloh27:
	ldr	x9, [x9, _JPEG_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT@GOTPAGEOFF]
	orr	w8, w8, w0
Lloh28:
	ldr	w9, [x9]
	lsl	w9, w23, w9
	orr	w8, w8, w9
Lloh29:
	adrp	x9, _JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT@GOTPAGE
Lloh30:
	ldr	x9, [x9, _JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	mov	w10, #4
	lsl	w9, w10, w9
	orr	w3, w8, w9
	ldr	w0, [x20]
	ldr	w2, [x19]
	mov	w1, #0
	bl	_WREG32_SOC15
	ldr	w0, [x20]
Lloh32:
	adrp	x19, _mmJPEG_CGC_GATE@GOTPAGE
Lloh33:
	ldr	x19, [x19, _mmJPEG_CGC_GATE@GOTPAGEOFF]
	ldr	w2, [x19]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh34:
	adrp	x8, _JPEG_CGC_GATE__JPEG_DEC_MASK@GOTPAGE
Lloh35:
	ldr	x8, [x8, _JPEG_CGC_GATE__JPEG_DEC_MASK@GOTPAGEOFF]
Lloh36:
	adrp	x9, _JPEG_CGC_GATE__JPEG2_DEC_MASK@GOTPAGE
Lloh37:
	ldr	x9, [x9, _JPEG_CGC_GATE__JPEG2_DEC_MASK@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
Lloh39:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh40:
	adrp	x9, _JPEG_CGC_GATE__JPEG_ENC_MASK@GOTPAGE
Lloh41:
	ldr	x9, [x9, _JPEG_CGC_GATE__JPEG_ENC_MASK@GOTPAGEOFF]
Lloh42:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh43:
	adrp	x9, _JPEG_CGC_GATE__JMCIF_MASK@GOTPAGE
Lloh44:
	ldr	x9, [x9, _JPEG_CGC_GATE__JMCIF_MASK@GOTPAGEOFF]
Lloh45:
	ldr	w9, [x9]
Lloh46:
	adrp	x10, _JPEG_CGC_GATE__JRBBM_MASK@GOTPAGE
Lloh47:
	ldr	x10, [x10, _JPEG_CGC_GATE__JRBBM_MASK@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh48:
	ldr	w9, [x10]
	orr	w8, w8, w9
	bic	w3, w0, w8
	ldr	w0, [x20]
	ldr	w2, [x19]
	mov	w1, #0
	bl	_WREG32_SOC15
	ldr	w0, [x22]
Lloh49:
	adrp	x8, _mmUVD_JMI_CNTL@GOTPAGE
Lloh50:
	ldr	x8, [x8, _mmUVD_JMI_CNTL@GOTPAGEOFF]
Lloh51:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
Lloh52:
	adrp	x8, _UVD_JMI_CNTL__SOFT_RESET_MASK@GOTPAGE
Lloh53:
	ldr	x8, [x8, _UVD_JMI_CNTL__SOFT_RESET_MASK@GOTPAGEOFF]
Lloh54:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	w1, #0
	bl	_WREG32_P
	ldr	w0, [x20]
Lloh55:
	adrp	x8, _mmJPEG_SYS_INT_EN@GOTPAGE
Lloh56:
	ldr	x8, [x8, _mmJPEG_SYS_INT_EN@GOTPAGEOFF]
Lloh57:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
Lloh58:
	adrp	x8, _JPEG_SYS_INT_EN__DJRBC_MASK@GOTPAGE
Lloh59:
	ldr	x8, [x8, _JPEG_SYS_INT_EN__DJRBC_MASK@GOTPAGEOFF]
Lloh60:
	ldr	w1, [x8]
	mvn	w2, w1
	bl	_WREG32_P
	ldr	w0, [x22]
Lloh61:
	adrp	x8, _mmUVD_LMI_JRBC_RB_VMID@GOTPAGE
Lloh62:
	ldr	x8, [x8, _mmUVD_LMI_JRBC_RB_VMID@GOTPAGEOFF]
Lloh63:
	ldr	w2, [x8]
	mov	w1, #0
	mov	w3, #0
	bl	_WREG32_SOC15
	ldr	w0, [x22]
Lloh64:
	adrp	x23, _mmUVD_JRBC_RB_CNTL@GOTPAGE
Lloh65:
	ldr	x23, [x23, _mmUVD_JRBC_RB_CNTL@GOTPAGEOFF]
	ldr	w2, [x23]
	mov	w1, #0
	mov	w3, #3
	bl	_WREG32_SOC15
	ldr	w19, [x22]
Lloh66:
	adrp	x8, _mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW@GOTPAGE
Lloh67:
	ldr	x8, [x8, _mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW@GOTPAGEOFF]
Lloh68:
	ldr	w20, [x8]
	ldr	w0, [x21, #16]
	bl	_lower_32_bits
	mov	x3, x0
	mov	x0, x19
	mov	w1, #0
	mov	x2, x20
	bl	_WREG32_SOC15
	ldr	w19, [x22]
Lloh69:
	adrp	x8, _mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH@GOTPAGE
Lloh70:
	ldr	x8, [x8, _mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH@GOTPAGEOFF]
Lloh71:
	ldr	w20, [x8]
	ldr	w0, [x21, #16]
	bl	_upper_32_bits
	mov	x3, x0
	mov	x0, x19
	mov	w1, #0
	mov	x2, x20
	bl	_WREG32_SOC15
	ldr	w0, [x22]
Lloh72:
	adrp	x8, _mmUVD_JRBC_RB_RPTR@GOTPAGE
Lloh73:
	ldr	x8, [x8, _mmUVD_JRBC_RB_RPTR@GOTPAGEOFF]
Lloh74:
	ldr	w2, [x8]
	mov	w1, #0
	mov	w3, #0
	bl	_WREG32_SOC15
	ldr	w0, [x22]
Lloh75:
	adrp	x19, _mmUVD_JRBC_RB_WPTR@GOTPAGE
Lloh76:
	ldr	x19, [x19, _mmUVD_JRBC_RB_WPTR@GOTPAGEOFF]
	ldr	w2, [x19]
	mov	w1, #0
	mov	w3, #0
	bl	_WREG32_SOC15
	ldr	w0, [x22]
	ldr	w2, [x23]
	mov	w1, #0
	mov	w3, #2
	bl	_WREG32_SOC15
	ldr	w0, [x22]
Lloh77:
	adrp	x8, _mmUVD_JRBC_RB_SIZE@GOTPAGE
Lloh78:
	ldr	x8, [x8, _mmUVD_JRBC_RB_SIZE@GOTPAGEOFF]
Lloh79:
	ldr	w2, [x8]
	ldr	w8, [x21]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w3, w8, #2
	mov	w1, #0
	bl	_WREG32_SOC15
	ldr	w0, [x22]
	ldr	w2, [x19]
	mov	w1, #0
	bl	_RREG32_SOC15
	str	x0, [x21, #8]
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGot	Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh38
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_UVD_PGFSM_CONFIG__UVDJ_PWR_CONFIG__SHIFT,4,2 ; @UVD_PGFSM_CONFIG__UVDJ_PWR_CONFIG__SHIFT
	.comm	_UVD,4,2                        ; @UVD
	.comm	_mmUVD_PGFSM_CONFIG,4,2         ; @mmUVD_PGFSM_CONFIG
	.comm	_VCN,4,2                        ; @VCN
	.comm	_mmUVD_PGFSM_STATUS,4,2         ; @mmUVD_PGFSM_STATUS
	.comm	_UVD_PGFSM_STATUS_UVDJ_PWR_ON,4,2 ; @UVD_PGFSM_STATUS_UVDJ_PWR_ON
	.comm	_UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK,4,2 ; @UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK
	.comm	_mmUVD_JPEG_POWER_STATUS,4,2    ; @mmUVD_JPEG_POWER_STATUS
	.comm	_mmJPEG_CGC_CTRL,4,2            ; @mmJPEG_CGC_CTRL
	.comm	_JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT,4,2 ; @JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT
	.comm	_JPEG_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT,4,2 ; @JPEG_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT
	.comm	_JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT,4,2 ; @JPEG_CGC_CTRL__CLK_OFF_DELAY__SHIFT
	.comm	_mmJPEG_CGC_GATE,4,2            ; @mmJPEG_CGC_GATE
	.comm	_JPEG_CGC_GATE__JPEG_DEC_MASK,4,2 ; @JPEG_CGC_GATE__JPEG_DEC_MASK
	.comm	_JPEG_CGC_GATE__JPEG2_DEC_MASK,4,2 ; @JPEG_CGC_GATE__JPEG2_DEC_MASK
	.comm	_JPEG_CGC_GATE__JPEG_ENC_MASK,4,2 ; @JPEG_CGC_GATE__JPEG_ENC_MASK
	.comm	_JPEG_CGC_GATE__JMCIF_MASK,4,2  ; @JPEG_CGC_GATE__JMCIF_MASK
	.comm	_JPEG_CGC_GATE__JRBBM_MASK,4,2  ; @JPEG_CGC_GATE__JRBBM_MASK
	.comm	_mmUVD_JMI_CNTL,4,2             ; @mmUVD_JMI_CNTL
	.comm	_UVD_JMI_CNTL__SOFT_RESET_MASK,4,2 ; @UVD_JMI_CNTL__SOFT_RESET_MASK
	.comm	_mmJPEG_SYS_INT_EN,4,2          ; @mmJPEG_SYS_INT_EN
	.comm	_JPEG_SYS_INT_EN__DJRBC_MASK,4,2 ; @JPEG_SYS_INT_EN__DJRBC_MASK
	.comm	_mmUVD_LMI_JRBC_RB_VMID,4,2     ; @mmUVD_LMI_JRBC_RB_VMID
	.comm	_mmUVD_JRBC_RB_CNTL,4,2         ; @mmUVD_JRBC_RB_CNTL
	.comm	_mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW,4,2 ; @mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW
	.comm	_mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,4,2 ; @mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH
	.comm	_mmUVD_JRBC_RB_RPTR,4,2         ; @mmUVD_JRBC_RB_RPTR
	.comm	_mmUVD_JRBC_RB_WPTR,4,2         ; @mmUVD_JRBC_RB_WPTR
	.comm	_mmUVD_JRBC_RB_SIZE,4,2         ; @mmUVD_JRBC_RB_SIZE
	.no_dead_strip	_jpeg_v2_0_start
.subsections_via_symbols
