	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function init_skl_mmio_info
_init_skl_mmio_info:                    ## @init_skl_mmio_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_FORCEWAKE_RENDER_GEN9@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_D_SKL_PLUS@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_mul_force_wake_write@GOTPCREL(%rip), %r14
	movq	(%r14), %rcx
	xorl	%edx, %edx
	callq	_MMIO_DH
	movq	_FORCEWAKE_ACK_RENDER_GEN9@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movq	_FORCEWAKE_BLITTER_GEN9@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movq	(%r14), %rcx
	xorl	%edx, %edx
	callq	_MMIO_DH
	movq	_FORCEWAKE_ACK_BLITTER_GEN9@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movq	_FORCEWAKE_MEDIA_GEN9@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movq	(%r14), %rcx
	xorl	%edx, %edx
	callq	_MMIO_DH
	movq	_FORCEWAKE_ACK_MEDIA_GEN9@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movq	__DPB_AUX_CH_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %r9d
	movq	_dp_aux_ch_ctl_mmio_write@GOTPCREL(%rip), %r14
	movl	%eax, %edi
	movl	$24, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	(%r14)
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movq	__DPC_AUX_CH_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$24, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	(%r14)
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movq	__DPD_AUX_CH_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$24, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	(%r14)
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movq	_HSW_PWR_WELL_CTL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_HSW_PWR_WELL_CTL2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movq	_skl_power_well_ctl_write@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	xorl	%edx, %edx
	callq	_MMIO_DH
	movq	_DBUF_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movq	_gen9_dbuf_ctl_mmio_write@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	xorl	%edx, %edx
	callq	_MMIO_DH
	movq	_GEN9_PG_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_GEN9_MEDIA_PG_IDLE_HYSTERESIS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_GEN9_RENDER_PG_IDLE_HYSTERESIS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_GEN9_GAMT_ECO_REG_RW_IA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movq	_F_CMD_ACCESS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	movq	_MMCD_MISC_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movq	_CHICKEN_PAR1_1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movq	_DC_STATE_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_DC_STATE_DEBUG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_CDCLK_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_LCPLL1_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movq	_skl_lcpll_write@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rcx
	xorl	%edx, %edx
	callq	_MMIO_DH
	movq	_LCPLL2_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movq	(%rbx), %rcx
	xorl	%edx, %edx
	callq	_MMIO_DH
	movq	__DPLL1_CFGCR1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	__DPLL2_CFGCR1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	__DPLL3_CFGCR1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	__DPLL1_CFGCR2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	__DPLL2_CFGCR2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	__DPLL3_CFGCR2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	_DPLL_CTRL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_DPLL_CTRL2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_DPLL_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movq	_dpll_status_read@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movq	_PIPE_A@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rax, %rbx
	xorl	%esi, %esi
	callq	_SKL_PS_WIN_POS
	movl	(%r15), %esi
	movq	_pf_write@GOTPCREL(%rip), %r14
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$1, %esi
	callq	_SKL_PS_WIN_POS
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movq	_PIPE_B@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_SKL_PS_WIN_POS
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$1, %esi
	callq	_SKL_PS_WIN_POS
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movq	_PIPE_C@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_SKL_PS_WIN_POS
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$1, %esi
	callq	_SKL_PS_WIN_POS
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_SKL_PS_WIN_SZ
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$1, %esi
	callq	_SKL_PS_WIN_SZ
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_SKL_PS_WIN_SZ
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$1, %esi
	callq	_SKL_PS_WIN_SZ
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_SKL_PS_WIN_SZ
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$1, %esi
	callq	_SKL_PS_WIN_SZ
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_SKL_PS_CTRL
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$1, %esi
	callq	_SKL_PS_CTRL
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_SKL_PS_CTRL
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$1, %esi
	callq	_SKL_PS_CTRL
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_SKL_PS_CTRL
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$1, %esi
	callq	_SKL_PS_CTRL
	movl	(%r15), %esi
	movq	(%r14), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$1, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$2, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$3, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$1, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$2, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$3, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$1, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$2, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$3, %esi
	callq	_PLANE_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	callq	_CUR_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	callq	_CUR_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	callq	_CUR_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PLANE_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%rbx), %edi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_PLANE_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%rbx), %edi
	movl	$2, %esi
	xorl	%edx, %edx
	callq	_PLANE_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%r12), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PLANE_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%r12), %edi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_PLANE_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%r12), %edi
	movl	$2, %esi
	xorl	%edx, %edx
	callq	_PLANE_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%r13), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PLANE_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%r13), %edi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_PLANE_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%r13), %edi
	movl	$2, %esi
	xorl	%edx, %edx
	callq	_PLANE_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_CUR_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_CUR_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_CUR_WM
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_PLANE_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$1, %esi
	callq	_PLANE_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$2, %esi
	callq	_PLANE_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_PLANE_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$1, %esi
	callq	_PLANE_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$2, %esi
	callq	_PLANE_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_PLANE_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$1, %esi
	callq	_PLANE_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$2, %esi
	callq	_PLANE_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	callq	_CUR_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	callq	_CUR_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	callq	_CUR_WM_TRANS
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$1, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$2, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$3, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$1, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$2, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$3, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$1, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$2, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$3, %esi
	callq	_PLANE_NV12_BUF_CFG
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$1, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$2, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$3, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$4, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$1, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$2, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$3, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$4, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$1, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$2, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$3, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$4, %esi
	callq	__REG_701C0
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$1, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$2, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$3, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%rbx), %edi
	movl	$4, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$1, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$2, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$3, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r12), %edi
	movl	$4, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$1, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$2, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$3, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movl	(%r13), %edi
	movl	$4, %esi
	callq	__REG_701C4
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_MMIO_DH
	movq	__PLANE_CTL_3_A@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	__PLANE_CTL_3_B@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$467840, %edi                   ## imm = 0x72380
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$467868, %edi                   ## imm = 0x7239C
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	__PLANE_SURF_3_A@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	_CSR_SSP_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_CSR_HTP_SKL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_CSR_LAST_WRITE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_BDW_SCRATCH1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movq	_F_CMD_ACCESS@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	movq	_SKL_DFSM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_DISPIO_CR_TX_BMU_CR0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	xorl	%edi, %edi
	callq	_GEN9_GFX_MOCS
	movl	(%r14), %edx
	movl	(%r15), %r9d
	movl	%eax, %edi
	movl	$2040, %esi                     ## imm = 0x7F8
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movq	_GEN7_L3CNTLREG2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r14), %edx
	movl	(%r15), %r9d
	movl	$128, %esi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	pushq	$0
	pushq	$0
	callq	_MMIO_F
	addq	$16, %rsp
	movq	_RPM_CONFIG0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movl	$3336, %edi                     ## imm = 0xD08
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	_RC6_LOCATION@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movq	_GEN7_FF_SLICE_CS_CHICKEN1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movq	_F_MODE_MASK@GOTPCREL(%rip), %rbx
	movl	(%r14), %edx
	orl	(%rbx), %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	movq	_GEN9_CS_DEBUG_MODE1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movl	(%r14), %edx
	orl	(%rbx), %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	xorl	%edi, %edi
	callq	_TRVATTL3PTRDW
	movl	(%r15), %esi
	movl	(%r14), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	movl	$1, %edi
	callq	_TRVATTL3PTRDW
	movl	(%r15), %esi
	movl	(%r14), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	movl	$2, %edi
	callq	_TRVATTL3PTRDW
	movl	(%r15), %esi
	movl	(%r14), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	movl	$3, %edi
	callq	_TRVATTL3PTRDW
	movl	(%r15), %esi
	movl	(%r14), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	movq	_TRVADR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movl	(%r14), %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	movq	_TRTTE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movl	(%r14), %edx
	movq	_gen9_trtte_write@GOTPCREL(%rip), %rax
	movq	(%rax), %r8
	xorl	%ecx, %ecx
	callq	_MMIO_DFH
	movl	$19964, %edi                    ## imm = 0x4DFC
	callq	__MMIO
	movl	(%r15), %esi
	movq	_gen9_trtt_chicken_write@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	%eax, %edi
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	$287792, %edi                   ## imm = 0x46430
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$288032, %edi                   ## imm = 0x46520
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$802876, %edi                   ## imm = 0xC403C
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	_GEN8_GARBCNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movl	(%r14), %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	movq	_DMA_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movq	_dma_ctrl_write@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	xorl	%edx, %edx
	callq	_MMIO_DH
	movl	$416000, %edi                   ## imm = 0x65900
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	_GEN6_STOLEN_RESERVED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	callq	_MMIO_D
	movl	$16488, %edi                    ## imm = 0x4068
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$421972, %edi                   ## imm = 0x67054
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$451936, %edi                   ## imm = 0x6E560
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$451924, %edi                   ## imm = 0x6E554
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$11040, %edi                    ## imm = 0x2B20
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$417536, %edi                   ## imm = 0x65F00
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$417544, %edi                   ## imm = 0x65F08
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$205040, %edi                   ## imm = 0x320F0
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$458804, %edi                   ## imm = 0x70034
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$462900, %edi                   ## imm = 0x71034
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$466996, %edi                   ## imm = 0x72034
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	_PIPE_A@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	__PLANE_KEYVAL_1
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	(%r12), %edi
	callq	__PLANE_KEYVAL_1
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	(%r13), %edi
	callq	__PLANE_KEYVAL_1
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	(%rbx), %edi
	callq	__PLANE_KEYMAX_1
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	(%r12), %edi
	callq	__PLANE_KEYMAX_1
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	(%r13), %edi
	callq	__PLANE_KEYMAX_1
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	(%rbx), %edi
	callq	__PLANE_KEYMSK_1
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	(%r12), %edi
	callq	__PLANE_KEYMSK_1
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	(%r13), %edi
	callq	__PLANE_KEYMSK_1
	movl	%eax, %edi
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movl	$279808, %edi                   ## imm = 0x44500
	callq	__MMIO
	movl	(%r15), %esi
	movl	%eax, %edi
	callq	_MMIO_D
	movq	_CSFE_CHICKEN1_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movl	(%r14), %edx
	movq	_F_MODE_MASK@GOTPCREL(%rip), %rbx
	orl	(%rbx), %edx
	movq	_csfe_chicken1_mmio_write@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	xorl	%ecx, %ecx
	callq	_MMIO_RING_DFH
	movq	_GEN8_HDC_CHICKEN1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movl	(%r14), %edx
	orl	(%rbx), %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	movq	_GEN9_WM_CHICKEN3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15), %esi
	movl	(%r14), %edx
	orl	(%rbx), %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_MMIO_DFH
	movq	_GAMT_CHKN_BIT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_D_KBL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	callq	_MMIO_D
	movq	_GEN9_CTX_PREEMPT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_D_SKL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	(%rbx), %esi
	callq	_MMIO_D
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_FORCEWAKE_RENDER_GEN9,4,2      ## @FORCEWAKE_RENDER_GEN9
	.comm	_D_SKL_PLUS,4,2                 ## @D_SKL_PLUS
	.comm	_mul_force_wake_write,8,3       ## @mul_force_wake_write
	.comm	_FORCEWAKE_ACK_RENDER_GEN9,4,2  ## @FORCEWAKE_ACK_RENDER_GEN9
	.comm	_FORCEWAKE_BLITTER_GEN9,4,2     ## @FORCEWAKE_BLITTER_GEN9
	.comm	_FORCEWAKE_ACK_BLITTER_GEN9,4,2 ## @FORCEWAKE_ACK_BLITTER_GEN9
	.comm	_FORCEWAKE_MEDIA_GEN9,4,2       ## @FORCEWAKE_MEDIA_GEN9
	.comm	_FORCEWAKE_ACK_MEDIA_GEN9,4,2   ## @FORCEWAKE_ACK_MEDIA_GEN9
	.comm	__DPB_AUX_CH_CTL,4,2            ## @_DPB_AUX_CH_CTL
	.comm	_dp_aux_ch_ctl_mmio_write,8,3   ## @dp_aux_ch_ctl_mmio_write
	.comm	__DPC_AUX_CH_CTL,4,2            ## @_DPC_AUX_CH_CTL
	.comm	__DPD_AUX_CH_CTL,4,2            ## @_DPD_AUX_CH_CTL
	.comm	_HSW_PWR_WELL_CTL1,4,2          ## @HSW_PWR_WELL_CTL1
	.comm	_HSW_PWR_WELL_CTL2,4,2          ## @HSW_PWR_WELL_CTL2
	.comm	_skl_power_well_ctl_write,8,3   ## @skl_power_well_ctl_write
	.comm	_DBUF_CTL,4,2                   ## @DBUF_CTL
	.comm	_gen9_dbuf_ctl_mmio_write,8,3   ## @gen9_dbuf_ctl_mmio_write
	.comm	_GEN9_PG_ENABLE,4,2             ## @GEN9_PG_ENABLE
	.comm	_GEN9_MEDIA_PG_IDLE_HYSTERESIS,4,2 ## @GEN9_MEDIA_PG_IDLE_HYSTERESIS
	.comm	_GEN9_RENDER_PG_IDLE_HYSTERESIS,4,2 ## @GEN9_RENDER_PG_IDLE_HYSTERESIS
	.comm	_GEN9_GAMT_ECO_REG_RW_IA,4,2    ## @GEN9_GAMT_ECO_REG_RW_IA
	.comm	_F_CMD_ACCESS,4,2               ## @F_CMD_ACCESS
	.comm	_MMCD_MISC_CTRL,4,2             ## @MMCD_MISC_CTRL
	.comm	_CHICKEN_PAR1_1,4,2             ## @CHICKEN_PAR1_1
	.comm	_DC_STATE_EN,4,2                ## @DC_STATE_EN
	.comm	_DC_STATE_DEBUG,4,2             ## @DC_STATE_DEBUG
	.comm	_CDCLK_CTL,4,2                  ## @CDCLK_CTL
	.comm	_LCPLL1_CTL,4,2                 ## @LCPLL1_CTL
	.comm	_skl_lcpll_write,8,3            ## @skl_lcpll_write
	.comm	_LCPLL2_CTL,4,2                 ## @LCPLL2_CTL
	.comm	__DPLL1_CFGCR1,4,2              ## @_DPLL1_CFGCR1
	.comm	__DPLL2_CFGCR1,4,2              ## @_DPLL2_CFGCR1
	.comm	__DPLL3_CFGCR1,4,2              ## @_DPLL3_CFGCR1
	.comm	__DPLL1_CFGCR2,4,2              ## @_DPLL1_CFGCR2
	.comm	__DPLL2_CFGCR2,4,2              ## @_DPLL2_CFGCR2
	.comm	__DPLL3_CFGCR2,4,2              ## @_DPLL3_CFGCR2
	.comm	_DPLL_CTRL1,4,2                 ## @DPLL_CTRL1
	.comm	_DPLL_CTRL2,4,2                 ## @DPLL_CTRL2
	.comm	_DPLL_STATUS,4,2                ## @DPLL_STATUS
	.comm	_dpll_status_read,8,3           ## @dpll_status_read
	.comm	_PIPE_A,4,2                     ## @PIPE_A
	.comm	_pf_write,8,3                   ## @pf_write
	.comm	_PIPE_B,4,2                     ## @PIPE_B
	.comm	_PIPE_C,4,2                     ## @PIPE_C
	.comm	__PLANE_CTL_3_A,4,2             ## @_PLANE_CTL_3_A
	.comm	__PLANE_CTL_3_B,4,2             ## @_PLANE_CTL_3_B
	.comm	__PLANE_SURF_3_A,4,2            ## @_PLANE_SURF_3_A
	.comm	_CSR_SSP_BASE,4,2               ## @CSR_SSP_BASE
	.comm	_CSR_HTP_SKL,4,2                ## @CSR_HTP_SKL
	.comm	_CSR_LAST_WRITE,4,2             ## @CSR_LAST_WRITE
	.comm	_BDW_SCRATCH1,4,2               ## @BDW_SCRATCH1
	.comm	_SKL_DFSM,4,2                   ## @SKL_DFSM
	.comm	_DISPIO_CR_TX_BMU_CR0,4,2       ## @DISPIO_CR_TX_BMU_CR0
	.comm	_GEN7_L3CNTLREG2,4,2            ## @GEN7_L3CNTLREG2
	.comm	_RPM_CONFIG0,4,2                ## @RPM_CONFIG0
	.comm	_RC6_LOCATION,4,2               ## @RC6_LOCATION
	.comm	_GEN7_FF_SLICE_CS_CHICKEN1,4,2  ## @GEN7_FF_SLICE_CS_CHICKEN1
	.comm	_F_MODE_MASK,4,2                ## @F_MODE_MASK
	.comm	_GEN9_CS_DEBUG_MODE1,4,2        ## @GEN9_CS_DEBUG_MODE1
	.comm	_TRVADR,4,2                     ## @TRVADR
	.comm	_TRTTE,4,2                      ## @TRTTE
	.comm	_gen9_trtte_write,8,3           ## @gen9_trtte_write
	.comm	_gen9_trtt_chicken_write,8,3    ## @gen9_trtt_chicken_write
	.comm	_GEN8_GARBCNTL,4,2              ## @GEN8_GARBCNTL
	.comm	_DMA_CTRL,4,2                   ## @DMA_CTRL
	.comm	_dma_ctrl_write,8,3             ## @dma_ctrl_write
	.comm	_GEN6_STOLEN_RESERVED,4,2       ## @GEN6_STOLEN_RESERVED
	.comm	_CSFE_CHICKEN1_REG,4,2          ## @CSFE_CHICKEN1_REG
	.comm	_csfe_chicken1_mmio_write,4,2   ## @csfe_chicken1_mmio_write
	.comm	_GEN8_HDC_CHICKEN1,4,2          ## @GEN8_HDC_CHICKEN1
	.comm	_GEN9_WM_CHICKEN3,4,2           ## @GEN9_WM_CHICKEN3
	.comm	_GAMT_CHKN_BIT_REG,4,2          ## @GAMT_CHKN_BIT_REG
	.comm	_D_KBL,4,2                      ## @D_KBL
	.comm	_GEN9_CTX_PREEMPT_REG,4,2       ## @GEN9_CTX_PREEMPT_REG
	.comm	_D_SKL,4,2                      ## @D_SKL
	.no_dead_strip	_init_skl_mmio_info
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function init_skl_mmio_info
_init_skl_mmio_info:                    ; @init_skl_mmio_info
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
Lloh0:
	adrp	x8, _FORCEWAKE_RENDER_GEN9@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FORCEWAKE_RENDER_GEN9@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x19, _D_SKL_PLUS@GOTPAGE
Lloh4:
	ldr	x19, [x19, _D_SKL_PLUS@GOTPAGEOFF]
	ldr	w1, [x19]
Lloh5:
	adrp	x20, _mul_force_wake_write@GOTPAGE
Lloh6:
	ldr	x20, [x20, _mul_force_wake_write@GOTPAGEOFF]
	ldr	x3, [x20]
	mov	x2, #0
	bl	_MMIO_DH
Lloh7:
	adrp	x8, _FORCEWAKE_ACK_RENDER_GEN9@GOTPAGE
Lloh8:
	ldr	x8, [x8, _FORCEWAKE_ACK_RENDER_GEN9@GOTPAGEOFF]
Lloh9:
	ldr	w0, [x8]
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
Lloh10:
	adrp	x8, _FORCEWAKE_BLITTER_GEN9@GOTPAGE
Lloh11:
	ldr	x8, [x8, _FORCEWAKE_BLITTER_GEN9@GOTPAGEOFF]
Lloh12:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldr	x3, [x20]
	mov	x2, #0
	bl	_MMIO_DH
Lloh13:
	adrp	x8, _FORCEWAKE_ACK_BLITTER_GEN9@GOTPAGE
Lloh14:
	ldr	x8, [x8, _FORCEWAKE_ACK_BLITTER_GEN9@GOTPAGEOFF]
Lloh15:
	ldr	w0, [x8]
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
Lloh16:
	adrp	x8, _FORCEWAKE_MEDIA_GEN9@GOTPAGE
Lloh17:
	ldr	x8, [x8, _FORCEWAKE_MEDIA_GEN9@GOTPAGEOFF]
Lloh18:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldr	x3, [x20]
	mov	x2, #0
	bl	_MMIO_DH
Lloh19:
	adrp	x8, _FORCEWAKE_ACK_MEDIA_GEN9@GOTPAGE
Lloh20:
	ldr	x8, [x8, _FORCEWAKE_ACK_MEDIA_GEN9@GOTPAGEOFF]
Lloh21:
	ldr	w0, [x8]
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
Lloh22:
	adrp	x8, __DPB_AUX_CH_CTL@GOTPAGE
Lloh23:
	ldr	x8, [x8, __DPB_AUX_CH_CTL@GOTPAGEOFF]
Lloh24:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w5, [x19]
Lloh25:
	adrp	x20, _dp_aux_ch_ctl_mmio_write@GOTPAGE
Lloh26:
	ldr	x20, [x20, _dp_aux_ch_ctl_mmio_write@GOTPAGEOFF]
	ldr	x7, [x20]
	mov	w1, #24
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	bl	_MMIO_F
Lloh27:
	adrp	x8, __DPC_AUX_CH_CTL@GOTPAGE
Lloh28:
	ldr	x8, [x8, __DPC_AUX_CH_CTL@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w5, [x19]
	ldr	x7, [x20]
	mov	w1, #24
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	bl	_MMIO_F
Lloh30:
	adrp	x8, __DPD_AUX_CH_CTL@GOTPAGE
Lloh31:
	ldr	x8, [x8, __DPD_AUX_CH_CTL@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w5, [x19]
	ldr	x7, [x20]
	mov	w1, #24
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	bl	_MMIO_F
Lloh33:
	adrp	x8, _HSW_PWR_WELL_CTL1@GOTPAGE
Lloh34:
	ldr	x8, [x8, _HSW_PWR_WELL_CTL1@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh36:
	adrp	x8, _HSW_PWR_WELL_CTL2@GOTPAGE
Lloh37:
	ldr	x8, [x8, _HSW_PWR_WELL_CTL2@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	ldr	w1, [x19]
Lloh39:
	adrp	x8, _skl_power_well_ctl_write@GOTPAGE
Lloh40:
	ldr	x8, [x8, _skl_power_well_ctl_write@GOTPAGEOFF]
Lloh41:
	ldr	x3, [x8]
	mov	x2, #0
	bl	_MMIO_DH
Lloh42:
	adrp	x8, _DBUF_CTL@GOTPAGE
Lloh43:
	ldr	x8, [x8, _DBUF_CTL@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	ldr	w1, [x19]
Lloh45:
	adrp	x8, _gen9_dbuf_ctl_mmio_write@GOTPAGE
Lloh46:
	ldr	x8, [x8, _gen9_dbuf_ctl_mmio_write@GOTPAGEOFF]
Lloh47:
	ldr	x3, [x8]
	mov	x2, #0
	bl	_MMIO_DH
Lloh48:
	adrp	x8, _GEN9_PG_ENABLE@GOTPAGE
Lloh49:
	ldr	x8, [x8, _GEN9_PG_ENABLE@GOTPAGEOFF]
Lloh50:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh51:
	adrp	x8, _GEN9_MEDIA_PG_IDLE_HYSTERESIS@GOTPAGE
Lloh52:
	ldr	x8, [x8, _GEN9_MEDIA_PG_IDLE_HYSTERESIS@GOTPAGEOFF]
Lloh53:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh54:
	adrp	x8, _GEN9_RENDER_PG_IDLE_HYSTERESIS@GOTPAGE
Lloh55:
	ldr	x8, [x8, _GEN9_RENDER_PG_IDLE_HYSTERESIS@GOTPAGEOFF]
Lloh56:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh57:
	adrp	x8, _GEN9_GAMT_ECO_REG_RW_IA@GOTPAGE
Lloh58:
	ldr	x8, [x8, _GEN9_GAMT_ECO_REG_RW_IA@GOTPAGEOFF]
Lloh59:
	ldr	w0, [x8]
	ldr	w1, [x19]
Lloh60:
	adrp	x20, _F_CMD_ACCESS@GOTPAGE
Lloh61:
	ldr	x20, [x20, _F_CMD_ACCESS@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
Lloh62:
	adrp	x8, _MMCD_MISC_CTRL@GOTPAGE
Lloh63:
	ldr	x8, [x8, _MMCD_MISC_CTRL@GOTPAGEOFF]
Lloh64:
	ldr	w0, [x8]
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
Lloh65:
	adrp	x8, _CHICKEN_PAR1_1@GOTPAGE
Lloh66:
	ldr	x8, [x8, _CHICKEN_PAR1_1@GOTPAGEOFF]
Lloh67:
	ldr	w0, [x8]
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
Lloh68:
	adrp	x8, _DC_STATE_EN@GOTPAGE
Lloh69:
	ldr	x8, [x8, _DC_STATE_EN@GOTPAGEOFF]
Lloh70:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh71:
	adrp	x8, _DC_STATE_DEBUG@GOTPAGE
Lloh72:
	ldr	x8, [x8, _DC_STATE_DEBUG@GOTPAGEOFF]
Lloh73:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh74:
	adrp	x8, _CDCLK_CTL@GOTPAGE
Lloh75:
	ldr	x8, [x8, _CDCLK_CTL@GOTPAGEOFF]
Lloh76:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh77:
	adrp	x8, _LCPLL1_CTL@GOTPAGE
Lloh78:
	ldr	x8, [x8, _LCPLL1_CTL@GOTPAGEOFF]
Lloh79:
	ldr	w0, [x8]
	ldr	w1, [x19]
Lloh80:
	adrp	x21, _skl_lcpll_write@GOTPAGE
Lloh81:
	ldr	x21, [x21, _skl_lcpll_write@GOTPAGEOFF]
	ldr	x3, [x21]
	mov	x2, #0
	bl	_MMIO_DH
Lloh82:
	adrp	x8, _LCPLL2_CTL@GOTPAGE
Lloh83:
	ldr	x8, [x8, _LCPLL2_CTL@GOTPAGEOFF]
Lloh84:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldr	x3, [x21]
	mov	x2, #0
	bl	_MMIO_DH
Lloh85:
	adrp	x8, __DPLL1_CFGCR1@GOTPAGE
Lloh86:
	ldr	x8, [x8, __DPLL1_CFGCR1@GOTPAGEOFF]
Lloh87:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh88:
	adrp	x8, __DPLL2_CFGCR1@GOTPAGE
Lloh89:
	ldr	x8, [x8, __DPLL2_CFGCR1@GOTPAGEOFF]
Lloh90:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh91:
	adrp	x8, __DPLL3_CFGCR1@GOTPAGE
Lloh92:
	ldr	x8, [x8, __DPLL3_CFGCR1@GOTPAGEOFF]
Lloh93:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh94:
	adrp	x8, __DPLL1_CFGCR2@GOTPAGE
Lloh95:
	ldr	x8, [x8, __DPLL1_CFGCR2@GOTPAGEOFF]
Lloh96:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh97:
	adrp	x8, __DPLL2_CFGCR2@GOTPAGE
Lloh98:
	ldr	x8, [x8, __DPLL2_CFGCR2@GOTPAGEOFF]
Lloh99:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh100:
	adrp	x8, __DPLL3_CFGCR2@GOTPAGE
Lloh101:
	ldr	x8, [x8, __DPLL3_CFGCR2@GOTPAGEOFF]
Lloh102:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh103:
	adrp	x8, _DPLL_CTRL1@GOTPAGE
Lloh104:
	ldr	x8, [x8, _DPLL_CTRL1@GOTPAGEOFF]
Lloh105:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh106:
	adrp	x8, _DPLL_CTRL2@GOTPAGE
Lloh107:
	ldr	x8, [x8, _DPLL_CTRL2@GOTPAGEOFF]
Lloh108:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh109:
	adrp	x8, _DPLL_STATUS@GOTPAGE
Lloh110:
	ldr	x8, [x8, _DPLL_STATUS@GOTPAGEOFF]
Lloh111:
	ldr	w0, [x8]
	ldr	w1, [x19]
Lloh112:
	adrp	x8, _dpll_status_read@GOTPAGE
Lloh113:
	ldr	x8, [x8, _dpll_status_read@GOTPAGEOFF]
Lloh114:
	ldr	x2, [x8]
	mov	x3, #0
	bl	_MMIO_DH
Lloh115:
	adrp	x21, _PIPE_A@GOTPAGE
Lloh116:
	ldr	x21, [x21, _PIPE_A@GOTPAGEOFF]
	ldr	w0, [x21]
	mov	w1, #0
	bl	_SKL_PS_WIN_POS
	ldr	w1, [x19]
Lloh117:
	adrp	x24, _pf_write@GOTPAGE
Lloh118:
	ldr	x24, [x24, _pf_write@GOTPAGEOFF]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #1
	bl	_SKL_PS_WIN_POS
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
Lloh119:
	adrp	x22, _PIPE_B@GOTPAGE
Lloh120:
	ldr	x22, [x22, _PIPE_B@GOTPAGEOFF]
	ldr	w0, [x22]
	mov	w1, #0
	bl	_SKL_PS_WIN_POS
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #1
	bl	_SKL_PS_WIN_POS
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
Lloh121:
	adrp	x23, _PIPE_C@GOTPAGE
Lloh122:
	ldr	x23, [x23, _PIPE_C@GOTPAGEOFF]
	ldr	w0, [x23]
	mov	w1, #0
	bl	_SKL_PS_WIN_POS
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #1
	bl	_SKL_PS_WIN_POS
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #0
	bl	_SKL_PS_WIN_SZ
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #1
	bl	_SKL_PS_WIN_SZ
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #0
	bl	_SKL_PS_WIN_SZ
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #1
	bl	_SKL_PS_WIN_SZ
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #0
	bl	_SKL_PS_WIN_SZ
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #1
	bl	_SKL_PS_WIN_SZ
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #0
	bl	_SKL_PS_CTRL
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #1
	bl	_SKL_PS_CTRL
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #0
	bl	_SKL_PS_CTRL
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #1
	bl	_SKL_PS_CTRL
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #0
	bl	_SKL_PS_CTRL
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #1
	bl	_SKL_PS_CTRL
	ldr	w1, [x19]
	ldr	x3, [x24]
	mov	x2, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #1
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #2
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #3
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #1
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #2
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #3
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #0
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #1
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #2
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #3
	bl	_PLANE_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	bl	_CUR_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	bl	_CUR_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	bl	_CUR_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #0
	mov	w2, #0
	bl	_PLANE_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x21]
	mov	w1, #1
	mov	w2, #0
	bl	_PLANE_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x21]
	mov	w1, #2
	mov	w2, #0
	bl	_PLANE_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x22]
	mov	w1, #0
	mov	w2, #0
	bl	_PLANE_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x22]
	mov	w1, #1
	mov	w2, #0
	bl	_PLANE_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x22]
	mov	w1, #2
	mov	w2, #0
	bl	_PLANE_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x23]
	mov	w1, #0
	mov	w2, #0
	bl	_PLANE_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x23]
	mov	w1, #1
	mov	w2, #0
	bl	_PLANE_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x23]
	mov	w1, #2
	mov	w2, #0
	bl	_PLANE_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x21]
	mov	w1, #0
	bl	_CUR_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x22]
	mov	w1, #0
	bl	_CUR_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x23]
	mov	w1, #0
	bl	_CUR_WM
	ldr	w5, [x19]
	mov	w1, #32
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PLANE_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #1
	bl	_PLANE_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #2
	bl	_PLANE_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PLANE_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #1
	bl	_PLANE_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #2
	bl	_PLANE_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #0
	bl	_PLANE_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #1
	bl	_PLANE_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #2
	bl	_PLANE_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	bl	_CUR_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	bl	_CUR_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	bl	_CUR_WM_TRANS
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #1
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #2
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #3
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #1
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #2
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #3
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #0
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #1
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #2
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #3
	bl	_PLANE_NV12_BUF_CFG
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #1
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #2
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #3
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #4
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #1
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #2
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #3
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #4
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #1
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #2
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #3
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #4
	bl	__REG_701C0
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #1
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #2
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #3
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x21]
	mov	w1, #4
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #1
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #2
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #3
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x22]
	mov	w1, #4
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #1
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #2
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #3
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
	ldr	w0, [x23]
	mov	w1, #4
	bl	__REG_701C4
	bl	__MMIO
	ldr	w1, [x19]
	mov	x2, #0
	mov	x3, #0
	bl	_MMIO_DH
Lloh123:
	adrp	x8, __PLANE_CTL_3_A@GOTPAGE
Lloh124:
	ldr	x8, [x8, __PLANE_CTL_3_A@GOTPAGEOFF]
Lloh125:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh126:
	adrp	x8, __PLANE_CTL_3_B@GOTPAGE
Lloh127:
	ldr	x8, [x8, __PLANE_CTL_3_B@GOTPAGEOFF]
Lloh128:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w24, #9088
	movk	w24, #7, lsl #16
	mov	w0, #9088
	movk	w0, #7, lsl #16
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	orr	w0, w24, #0x1c
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh129:
	adrp	x8, __PLANE_SURF_3_A@GOTPAGE
Lloh130:
	ldr	x8, [x8, __PLANE_SURF_3_A@GOTPAGEOFF]
Lloh131:
	ldr	w0, [x8]
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh132:
	adrp	x8, _CSR_SSP_BASE@GOTPAGE
Lloh133:
	ldr	x8, [x8, _CSR_SSP_BASE@GOTPAGEOFF]
Lloh134:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh135:
	adrp	x8, _CSR_HTP_SKL@GOTPAGE
Lloh136:
	ldr	x8, [x8, _CSR_HTP_SKL@GOTPAGEOFF]
Lloh137:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh138:
	adrp	x8, _CSR_LAST_WRITE@GOTPAGE
Lloh139:
	ldr	x8, [x8, _CSR_LAST_WRITE@GOTPAGEOFF]
Lloh140:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh141:
	adrp	x8, _BDW_SCRATCH1@GOTPAGE
Lloh142:
	ldr	x8, [x8, _BDW_SCRATCH1@GOTPAGEOFF]
Lloh143:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldr	w2, [x20]
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
Lloh144:
	adrp	x8, _SKL_DFSM@GOTPAGE
Lloh145:
	ldr	x8, [x8, _SKL_DFSM@GOTPAGEOFF]
Lloh146:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh147:
	adrp	x8, _DISPIO_CR_TX_BMU_CR0@GOTPAGE
Lloh148:
	ldr	x8, [x8, _DISPIO_CR_TX_BMU_CR0@GOTPAGEOFF]
Lloh149:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w0, #0
	bl	_GEN9_GFX_MOCS
	ldr	w2, [x20]
	ldr	w5, [x19]
	mov	w1, #2040
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
Lloh150:
	adrp	x8, _GEN7_L3CNTLREG2@GOTPAGE
Lloh151:
	ldr	x8, [x8, _GEN7_L3CNTLREG2@GOTPAGEOFF]
Lloh152:
	ldr	w0, [x8]
	ldr	w2, [x20]
	ldr	w5, [x19]
	mov	w1, #128
	mov	w3, #0
	mov	w4, #0
	mov	x6, #0
	mov	x7, #0
	bl	_MMIO_F
Lloh153:
	adrp	x8, _RPM_CONFIG0@GOTPAGE
Lloh154:
	ldr	x8, [x8, _RPM_CONFIG0@GOTPAGEOFF]
Lloh155:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w0, #3336
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh156:
	adrp	x8, _RC6_LOCATION@GOTPAGE
Lloh157:
	ldr	x8, [x8, _RC6_LOCATION@GOTPAGEOFF]
Lloh158:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh159:
	adrp	x8, _GEN7_FF_SLICE_CS_CHICKEN1@GOTPAGE
Lloh160:
	ldr	x8, [x8, _GEN7_FF_SLICE_CS_CHICKEN1@GOTPAGEOFF]
Lloh161:
	ldr	w0, [x8]
	ldr	w1, [x19]
Lloh162:
	adrp	x24, _F_MODE_MASK@GOTPAGE
Lloh163:
	ldr	x24, [x24, _F_MODE_MASK@GOTPAGEOFF]
	ldr	w8, [x24]
	ldr	w9, [x20]
	orr	w2, w9, w8
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
Lloh164:
	adrp	x8, _GEN9_CS_DEBUG_MODE1@GOTPAGE
Lloh165:
	ldr	x8, [x8, _GEN9_CS_DEBUG_MODE1@GOTPAGEOFF]
Lloh166:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldr	w8, [x24]
	ldr	w9, [x20]
	orr	w2, w9, w8
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
	mov	w0, #0
	bl	_TRVATTL3PTRDW
	ldr	w1, [x19]
	ldr	w2, [x20]
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
	mov	w0, #1
	bl	_TRVATTL3PTRDW
	ldr	w1, [x19]
	ldr	w2, [x20]
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
	mov	w0, #2
	bl	_TRVATTL3PTRDW
	ldr	w1, [x19]
	ldr	w2, [x20]
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
	mov	w0, #3
	bl	_TRVATTL3PTRDW
	ldr	w1, [x19]
	ldr	w2, [x20]
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
Lloh167:
	adrp	x8, _TRVADR@GOTPAGE
Lloh168:
	ldr	x8, [x8, _TRVADR@GOTPAGEOFF]
Lloh169:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldr	w2, [x20]
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
Lloh170:
	adrp	x8, _TRTTE@GOTPAGE
Lloh171:
	ldr	x8, [x8, _TRTTE@GOTPAGEOFF]
Lloh172:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldr	w2, [x20]
Lloh173:
	adrp	x8, _gen9_trtte_write@GOTPAGE
Lloh174:
	ldr	x8, [x8, _gen9_trtte_write@GOTPAGEOFF]
Lloh175:
	ldr	x4, [x8]
	mov	x3, #0
	bl	_MMIO_DFH
	mov	w0, #19964
	bl	__MMIO
	ldr	w1, [x19]
Lloh176:
	adrp	x8, _gen9_trtt_chicken_write@GOTPAGE
Lloh177:
	ldr	x8, [x8, _gen9_trtt_chicken_write@GOTPAGEOFF]
Lloh178:
	ldr	x3, [x8]
	mov	x2, #0
	bl	_MMIO_DH
	mov	w25, #25648
	movk	w25, #4, lsl #16
	mov	w0, #25648
	movk	w0, #4, lsl #16
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	add	w0, w25, #240
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w0, #16444
	movk	w0, #12, lsl #16
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh179:
	adrp	x8, _GEN8_GARBCNTL@GOTPAGE
Lloh180:
	ldr	x8, [x8, _GEN8_GARBCNTL@GOTPAGEOFF]
Lloh181:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldr	w2, [x20]
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
Lloh182:
	adrp	x8, _DMA_CTRL@GOTPAGE
Lloh183:
	ldr	x8, [x8, _DMA_CTRL@GOTPAGEOFF]
Lloh184:
	ldr	w0, [x8]
	ldr	w1, [x19]
Lloh185:
	adrp	x8, _dma_ctrl_write@GOTPAGE
Lloh186:
	ldr	x8, [x8, _dma_ctrl_write@GOTPAGEOFF]
Lloh187:
	ldr	x3, [x8]
	mov	x2, #0
	bl	_MMIO_DH
	mov	w25, #22784
	movk	w25, #6, lsl #16
	mov	w0, #22784
	movk	w0, #6, lsl #16
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh188:
	adrp	x8, _GEN6_STOLEN_RESERVED@GOTPAGE
Lloh189:
	ldr	x8, [x8, _GEN6_STOLEN_RESERVED@GOTPAGEOFF]
Lloh190:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w0, #16488
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w0, #28756
	movk	w0, #6, lsl #16
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w8, #58708
	movk	w8, #6, lsl #16
	add	w0, w8, #12
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w0, #58708
	movk	w0, #6, lsl #16
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w0, #11040
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	orr	w0, w25, #0x600
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w8, #1544
	orr	w0, w25, w8
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w0, #8432
	movk	w0, #3, lsl #16
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w25, #52
	movk	w25, #7, lsl #16
	mov	w0, #52
	movk	w0, #7, lsl #16
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	orr	w0, w25, #0x1000
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	orr	w0, w25, #0x2000
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	ldr	w0, [x21]
	bl	__PLANE_KEYVAL_1
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	ldr	w0, [x22]
	bl	__PLANE_KEYVAL_1
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	ldr	w0, [x23]
	bl	__PLANE_KEYVAL_1
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	ldr	w0, [x21]
	bl	__PLANE_KEYMAX_1
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	ldr	w0, [x22]
	bl	__PLANE_KEYMAX_1
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	ldr	w0, [x23]
	bl	__PLANE_KEYMAX_1
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	ldr	w0, [x21]
	bl	__PLANE_KEYMSK_1
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	ldr	w0, [x22]
	bl	__PLANE_KEYMSK_1
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	ldr	w0, [x23]
	bl	__PLANE_KEYMSK_1
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
	mov	w0, #17664
	movk	w0, #4, lsl #16
	bl	__MMIO
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh191:
	adrp	x8, _CSFE_CHICKEN1_REG@GOTPAGE
Lloh192:
	ldr	x8, [x8, _CSFE_CHICKEN1_REG@GOTPAGEOFF]
Lloh193:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldr	w8, [x24]
	ldr	w9, [x20]
	orr	w2, w9, w8
Lloh194:
	adrp	x8, _csfe_chicken1_mmio_write@GOTPAGE
Lloh195:
	ldr	x8, [x8, _csfe_chicken1_mmio_write@GOTPAGEOFF]
Lloh196:
	ldr	w4, [x8]
	mov	x3, #0
	bl	_MMIO_RING_DFH
Lloh197:
	adrp	x8, _GEN8_HDC_CHICKEN1@GOTPAGE
Lloh198:
	ldr	x8, [x8, _GEN8_HDC_CHICKEN1@GOTPAGEOFF]
Lloh199:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldr	w8, [x24]
	ldr	w9, [x20]
	orr	w2, w9, w8
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
Lloh200:
	adrp	x8, _GEN9_WM_CHICKEN3@GOTPAGE
Lloh201:
	ldr	x8, [x8, _GEN9_WM_CHICKEN3@GOTPAGEOFF]
Lloh202:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldr	w8, [x24]
	ldr	w9, [x20]
	orr	w2, w9, w8
	mov	x3, #0
	mov	x4, #0
	bl	_MMIO_DFH
Lloh203:
	adrp	x8, _GAMT_CHKN_BIT_REG@GOTPAGE
Lloh204:
	ldr	x8, [x8, _GAMT_CHKN_BIT_REG@GOTPAGEOFF]
Lloh205:
	ldr	w0, [x8]
Lloh206:
	adrp	x19, _D_KBL@GOTPAGE
Lloh207:
	ldr	x19, [x19, _D_KBL@GOTPAGEOFF]
	ldr	w1, [x19]
	bl	_MMIO_D
Lloh208:
	adrp	x8, _GEN9_CTX_PREEMPT_REG@GOTPAGE
Lloh209:
	ldr	x8, [x8, _GEN9_CTX_PREEMPT_REG@GOTPAGEOFF]
Lloh210:
	ldr	w0, [x8]
	ldr	w8, [x19]
Lloh211:
	adrp	x9, _D_SKL@GOTPAGE
Lloh212:
	ldr	x9, [x9, _D_SKL@GOTPAGEOFF]
Lloh213:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_MMIO_D
	mov	w0, #0
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh211, Lloh212, Lloh213
	.loh AdrpLdrGotLdr	Lloh208, Lloh209, Lloh210
	.loh AdrpLdrGot	Lloh206, Lloh207
	.loh AdrpLdrGotLdr	Lloh203, Lloh204, Lloh205
	.loh AdrpLdrGotLdr	Lloh200, Lloh201, Lloh202
	.loh AdrpLdrGotLdr	Lloh197, Lloh198, Lloh199
	.loh AdrpLdrGotLdr	Lloh194, Lloh195, Lloh196
	.loh AdrpLdrGotLdr	Lloh191, Lloh192, Lloh193
	.loh AdrpLdrGotLdr	Lloh188, Lloh189, Lloh190
	.loh AdrpLdrGotLdr	Lloh185, Lloh186, Lloh187
	.loh AdrpLdrGotLdr	Lloh182, Lloh183, Lloh184
	.loh AdrpLdrGotLdr	Lloh179, Lloh180, Lloh181
	.loh AdrpLdrGotLdr	Lloh176, Lloh177, Lloh178
	.loh AdrpLdrGotLdr	Lloh173, Lloh174, Lloh175
	.loh AdrpLdrGotLdr	Lloh170, Lloh171, Lloh172
	.loh AdrpLdrGotLdr	Lloh167, Lloh168, Lloh169
	.loh AdrpLdrGotLdr	Lloh164, Lloh165, Lloh166
	.loh AdrpLdrGot	Lloh162, Lloh163
	.loh AdrpLdrGotLdr	Lloh159, Lloh160, Lloh161
	.loh AdrpLdrGotLdr	Lloh156, Lloh157, Lloh158
	.loh AdrpLdrGotLdr	Lloh153, Lloh154, Lloh155
	.loh AdrpLdrGotLdr	Lloh150, Lloh151, Lloh152
	.loh AdrpLdrGotLdr	Lloh147, Lloh148, Lloh149
	.loh AdrpLdrGotLdr	Lloh144, Lloh145, Lloh146
	.loh AdrpLdrGotLdr	Lloh141, Lloh142, Lloh143
	.loh AdrpLdrGotLdr	Lloh138, Lloh139, Lloh140
	.loh AdrpLdrGotLdr	Lloh135, Lloh136, Lloh137
	.loh AdrpLdrGotLdr	Lloh132, Lloh133, Lloh134
	.loh AdrpLdrGotLdr	Lloh129, Lloh130, Lloh131
	.loh AdrpLdrGotLdr	Lloh126, Lloh127, Lloh128
	.loh AdrpLdrGotLdr	Lloh123, Lloh124, Lloh125
	.loh AdrpLdrGot	Lloh121, Lloh122
	.loh AdrpLdrGot	Lloh119, Lloh120
	.loh AdrpLdrGot	Lloh117, Lloh118
	.loh AdrpLdrGot	Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh112, Lloh113, Lloh114
	.loh AdrpLdrGotLdr	Lloh109, Lloh110, Lloh111
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGot	Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGot	Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_FORCEWAKE_RENDER_GEN9,4,2      ; @FORCEWAKE_RENDER_GEN9
	.comm	_D_SKL_PLUS,4,2                 ; @D_SKL_PLUS
	.comm	_mul_force_wake_write,8,3       ; @mul_force_wake_write
	.comm	_FORCEWAKE_ACK_RENDER_GEN9,4,2  ; @FORCEWAKE_ACK_RENDER_GEN9
	.comm	_FORCEWAKE_BLITTER_GEN9,4,2     ; @FORCEWAKE_BLITTER_GEN9
	.comm	_FORCEWAKE_ACK_BLITTER_GEN9,4,2 ; @FORCEWAKE_ACK_BLITTER_GEN9
	.comm	_FORCEWAKE_MEDIA_GEN9,4,2       ; @FORCEWAKE_MEDIA_GEN9
	.comm	_FORCEWAKE_ACK_MEDIA_GEN9,4,2   ; @FORCEWAKE_ACK_MEDIA_GEN9
	.comm	__DPB_AUX_CH_CTL,4,2            ; @_DPB_AUX_CH_CTL
	.comm	_dp_aux_ch_ctl_mmio_write,8,3   ; @dp_aux_ch_ctl_mmio_write
	.comm	__DPC_AUX_CH_CTL,4,2            ; @_DPC_AUX_CH_CTL
	.comm	__DPD_AUX_CH_CTL,4,2            ; @_DPD_AUX_CH_CTL
	.comm	_HSW_PWR_WELL_CTL1,4,2          ; @HSW_PWR_WELL_CTL1
	.comm	_HSW_PWR_WELL_CTL2,4,2          ; @HSW_PWR_WELL_CTL2
	.comm	_skl_power_well_ctl_write,8,3   ; @skl_power_well_ctl_write
	.comm	_DBUF_CTL,4,2                   ; @DBUF_CTL
	.comm	_gen9_dbuf_ctl_mmio_write,8,3   ; @gen9_dbuf_ctl_mmio_write
	.comm	_GEN9_PG_ENABLE,4,2             ; @GEN9_PG_ENABLE
	.comm	_GEN9_MEDIA_PG_IDLE_HYSTERESIS,4,2 ; @GEN9_MEDIA_PG_IDLE_HYSTERESIS
	.comm	_GEN9_RENDER_PG_IDLE_HYSTERESIS,4,2 ; @GEN9_RENDER_PG_IDLE_HYSTERESIS
	.comm	_GEN9_GAMT_ECO_REG_RW_IA,4,2    ; @GEN9_GAMT_ECO_REG_RW_IA
	.comm	_F_CMD_ACCESS,4,2               ; @F_CMD_ACCESS
	.comm	_MMCD_MISC_CTRL,4,2             ; @MMCD_MISC_CTRL
	.comm	_CHICKEN_PAR1_1,4,2             ; @CHICKEN_PAR1_1
	.comm	_DC_STATE_EN,4,2                ; @DC_STATE_EN
	.comm	_DC_STATE_DEBUG,4,2             ; @DC_STATE_DEBUG
	.comm	_CDCLK_CTL,4,2                  ; @CDCLK_CTL
	.comm	_LCPLL1_CTL,4,2                 ; @LCPLL1_CTL
	.comm	_skl_lcpll_write,8,3            ; @skl_lcpll_write
	.comm	_LCPLL2_CTL,4,2                 ; @LCPLL2_CTL
	.comm	__DPLL1_CFGCR1,4,2              ; @_DPLL1_CFGCR1
	.comm	__DPLL2_CFGCR1,4,2              ; @_DPLL2_CFGCR1
	.comm	__DPLL3_CFGCR1,4,2              ; @_DPLL3_CFGCR1
	.comm	__DPLL1_CFGCR2,4,2              ; @_DPLL1_CFGCR2
	.comm	__DPLL2_CFGCR2,4,2              ; @_DPLL2_CFGCR2
	.comm	__DPLL3_CFGCR2,4,2              ; @_DPLL3_CFGCR2
	.comm	_DPLL_CTRL1,4,2                 ; @DPLL_CTRL1
	.comm	_DPLL_CTRL2,4,2                 ; @DPLL_CTRL2
	.comm	_DPLL_STATUS,4,2                ; @DPLL_STATUS
	.comm	_dpll_status_read,8,3           ; @dpll_status_read
	.comm	_PIPE_A,4,2                     ; @PIPE_A
	.comm	_pf_write,8,3                   ; @pf_write
	.comm	_PIPE_B,4,2                     ; @PIPE_B
	.comm	_PIPE_C,4,2                     ; @PIPE_C
	.comm	__PLANE_CTL_3_A,4,2             ; @_PLANE_CTL_3_A
	.comm	__PLANE_CTL_3_B,4,2             ; @_PLANE_CTL_3_B
	.comm	__PLANE_SURF_3_A,4,2            ; @_PLANE_SURF_3_A
	.comm	_CSR_SSP_BASE,4,2               ; @CSR_SSP_BASE
	.comm	_CSR_HTP_SKL,4,2                ; @CSR_HTP_SKL
	.comm	_CSR_LAST_WRITE,4,2             ; @CSR_LAST_WRITE
	.comm	_BDW_SCRATCH1,4,2               ; @BDW_SCRATCH1
	.comm	_SKL_DFSM,4,2                   ; @SKL_DFSM
	.comm	_DISPIO_CR_TX_BMU_CR0,4,2       ; @DISPIO_CR_TX_BMU_CR0
	.comm	_GEN7_L3CNTLREG2,4,2            ; @GEN7_L3CNTLREG2
	.comm	_RPM_CONFIG0,4,2                ; @RPM_CONFIG0
	.comm	_RC6_LOCATION,4,2               ; @RC6_LOCATION
	.comm	_GEN7_FF_SLICE_CS_CHICKEN1,4,2  ; @GEN7_FF_SLICE_CS_CHICKEN1
	.comm	_F_MODE_MASK,4,2                ; @F_MODE_MASK
	.comm	_GEN9_CS_DEBUG_MODE1,4,2        ; @GEN9_CS_DEBUG_MODE1
	.comm	_TRVADR,4,2                     ; @TRVADR
	.comm	_TRTTE,4,2                      ; @TRTTE
	.comm	_gen9_trtte_write,8,3           ; @gen9_trtte_write
	.comm	_gen9_trtt_chicken_write,8,3    ; @gen9_trtt_chicken_write
	.comm	_GEN8_GARBCNTL,4,2              ; @GEN8_GARBCNTL
	.comm	_DMA_CTRL,4,2                   ; @DMA_CTRL
	.comm	_dma_ctrl_write,8,3             ; @dma_ctrl_write
	.comm	_GEN6_STOLEN_RESERVED,4,2       ; @GEN6_STOLEN_RESERVED
	.comm	_CSFE_CHICKEN1_REG,4,2          ; @CSFE_CHICKEN1_REG
	.comm	_csfe_chicken1_mmio_write,4,2   ; @csfe_chicken1_mmio_write
	.comm	_GEN8_HDC_CHICKEN1,4,2          ; @GEN8_HDC_CHICKEN1
	.comm	_GEN9_WM_CHICKEN3,4,2           ; @GEN9_WM_CHICKEN3
	.comm	_GAMT_CHKN_BIT_REG,4,2          ; @GAMT_CHKN_BIT_REG
	.comm	_D_KBL,4,2                      ; @D_KBL
	.comm	_GEN9_CTX_PREEMPT_REG,4,2       ; @GEN9_CTX_PREEMPT_REG
	.comm	_D_SKL,4,2                      ; @D_SKL
	.no_dead_strip	_init_skl_mmio_info
.subsections_via_symbols
