	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function etnaviv_hw_reset
_etnaviv_hw_reset:                      ## @etnaviv_hw_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	_jiffies@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	movl	$1000, %edi                     ## imm = 0x3E8
	callq	_msecs_to_jiffies
	addq	%rbx, %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	%rax, %rdi
	callq	_time_is_after_jiffies
	testq	%rax, %rax
	je	LBB0_10
## %bb.1:
	movq	_VIVS_HI_CLOCK_CONTROL@GOTPCREL(%rip), %r13
	movq	_VIVS_HI_CLOCK_CONTROL_SOFT_RESET@GOTPCREL(%rip), %rbx
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	16(%r15), %edi
	callq	_dev_dbg
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_time_is_after_jiffies
	testq	%rax, %rax
	movq	%r14, %rbx
	je	LBB0_10
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movb	$6, %cl
	subb	(%r15), %cl
	movl	$1, %edi
	shll	%cl, %edi
	callq	_VIVS_HI_CLOCK_CONTROL_FSCALE_VAL
	movl	%eax, %r12d
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_etnaviv_gpu_load_clock
	movq	_VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movl	(%r13), %esi
	movq	%r15, %rdi
	movl	%r12d, %edx
	callq	_gpu_write
	movq	8(%r15), %rax
	movq	_ETNA_SEC_KERNEL@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_3
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_VIVS_MMUv2_AHB_CONTROL_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_VIVS_MMUv2_AHB_CONTROL@GOTPCREL(%rip), %rax
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_3:                                 ##   in Loop: Header=BB0_2 Depth=1
	orl	(%rbx), %r12d
	movl	%r12d, %edx
	movq	%r13, %rax
LBB0_5:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_gpu_write
	movl	$10, %edi
	movl	$20, %esi
	callq	_usleep_range
	movq	%rbx, %r14
	movl	(%rbx), %ebx
	notl	%ebx
	andl	%r12d, %ebx
	movl	(%r13), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_gpu_write
	movq	_VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	%ebx, %edx
	movl	(%r13), %esi
	movq	%r15, %rdi
	callq	_gpu_write
	movq	_VIVS_HI_IDLE_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_gpu_read
	leaq	L_.str(%rip), %rsi
	movq	_VIVS_HI_IDLE_STATE_FE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_9
## %bb.6:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r13), %esi
	movq	%r15, %rdi
	callq	_gpu_read
	leaq	L_.str.1(%rip), %rsi
	movq	_VIVS_HI_CLOCK_CONTROL_IDLE_3D@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_9
## %bb.7:                               ##   in Loop: Header=BB0_2 Depth=1
	leaq	L_.str.1(%rip), %rsi
	movq	_VIVS_HI_CLOCK_CONTROL_IDLE_2D@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_9
## %bb.8:
	movq	_VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_VIVS_HI_CLOCK_CONTROL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%r15, %rdi
	movl	%eax, %edx
	callq	_gpu_write
	movq	%r15, %rdi
	callq	_etnaviv_gpu_update_clock
	xorl	%eax, %eax
	jmp	LBB0_11
LBB0_10:
	movq	_VIVS_HI_IDLE_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_gpu_read
	movl	%eax, %ebx
	movq	_VIVS_HI_CLOCK_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_gpu_read
	movl	16(%r15), %edi
	movq	_VIVS_HI_IDLE_STATE_FE@GOTPCREL(%rip), %rcx
	andl	(%rcx), %ebx
	leaq	L_.str.4(%rip), %rsi
	leaq	L_.str.3(%rip), %r8
	movq	%r8, %rdx
	cmoveq	%rsi, %rdx
	movq	_VIVS_HI_CLOCK_CONTROL_IDLE_3D@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	movq	%r8, %rcx
	cmoveq	%rsi, %rcx
	movq	_VIVS_HI_CLOCK_CONTROL_IDLE_2D@GOTPCREL(%rip), %rbx
	andl	(%rbx), %eax
	cmoveq	%rsi, %r8
	leaq	L_.str.2(%rip), %rsi
	callq	_dev_err
	movq	_EBUSY@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_11:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_jiffies,8,3                    ## @jiffies
	.comm	_VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU,4,2 ## @VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU
	.comm	_VIVS_HI_CLOCK_CONTROL,4,2      ## @VIVS_HI_CLOCK_CONTROL
	.comm	_ETNA_SEC_KERNEL,8,3            ## @ETNA_SEC_KERNEL
	.comm	_VIVS_MMUv2_AHB_CONTROL,4,2     ## @VIVS_MMUv2_AHB_CONTROL
	.comm	_VIVS_MMUv2_AHB_CONTROL_RESET,4,2 ## @VIVS_MMUv2_AHB_CONTROL_RESET
	.comm	_VIVS_HI_CLOCK_CONTROL_SOFT_RESET,4,2 ## @VIVS_HI_CLOCK_CONTROL_SOFT_RESET
	.comm	_VIVS_HI_IDLE_STATE,4,2         ## @VIVS_HI_IDLE_STATE
	.comm	_VIVS_HI_IDLE_STATE_FE,4,2      ## @VIVS_HI_IDLE_STATE_FE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"FE is not idle\n"

	.comm	_VIVS_HI_CLOCK_CONTROL_IDLE_3D,4,2 ## @VIVS_HI_CLOCK_CONTROL_IDLE_3D
	.comm	_VIVS_HI_CLOCK_CONTROL_IDLE_2D,4,2 ## @VIVS_HI_CLOCK_CONTROL_IDLE_2D
L_.str.1:                               ## @.str.1
	.asciz	"GPU is not idle\n"

	.comm	_VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS,4,2 ## @VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS
L_.str.2:                               ## @.str.2
	.asciz	"GPU failed to reset: FE %sidle, 3D %sidle, 2D %sidle\n"

L_.str.3:                               ## @.str.3
	.space	1

L_.str.4:                               ## @.str.4
	.asciz	"not "

	.comm	_EBUSY,4,2                      ## @EBUSY
	.no_dead_strip	_etnaviv_hw_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function etnaviv_hw_reset
_etnaviv_hw_reset:                      ; @etnaviv_hw_reset
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x8, _jiffies@GOTPAGE
Lloh1:
	ldr	x8, [x8, _jiffies@GOTPAGEOFF]
Lloh2:
	ldr	x20, [x8]
	mov	w0, #1000
	bl	_msecs_to_jiffies
	add	x20, x0, x20
	mov	x0, x20
	bl	_time_is_after_jiffies
Lloh3:
	adrp	x26, _VIVS_HI_IDLE_STATE@GOTPAGE
Lloh4:
	ldr	x26, [x26, _VIVS_HI_IDLE_STATE@GOTPAGEOFF]
Lloh5:
	adrp	x25, _VIVS_HI_CLOCK_CONTROL@GOTPAGE
Lloh6:
	ldr	x25, [x25, _VIVS_HI_CLOCK_CONTROL@GOTPAGEOFF]
	cbz	x0, LBB0_8
; %bb.1:
Lloh7:
	adrp	x22, _VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU@GOTPAGE
Lloh8:
	ldr	x22, [x22, _VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU@GOTPAGEOFF]
Lloh9:
	adrp	x23, _ETNA_SEC_KERNEL@GOTPAGE
Lloh10:
	ldr	x23, [x23, _ETNA_SEC_KERNEL@GOTPAGEOFF]
Lloh11:
	adrp	x24, _VIVS_HI_CLOCK_CONTROL_SOFT_RESET@GOTPAGE
Lloh12:
	ldr	x24, [x24, _VIVS_HI_CLOCK_CONTROL_SOFT_RESET@GOTPAGEOFF]
Lloh13:
	adrp	x27, _VIVS_MMUv2_AHB_CONTROL_RESET@GOTPAGE
Lloh14:
	ldr	x27, [x27, _VIVS_MMUv2_AHB_CONTROL_RESET@GOTPAGEOFF]
Lloh15:
	adrp	x28, _VIVS_MMUv2_AHB_CONTROL@GOTPAGE
Lloh16:
	ldr	x28, [x28, _VIVS_MMUv2_AHB_CONTROL@GOTPAGEOFF]
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
Lloh17:
	adrp	x1, l_.str@PAGE
Lloh18:
	add	x1, x1, l_.str@PAGEOFF
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	w0, [x19, #16]
	bl	_dev_dbg
	mov	x0, x20
	bl	_time_is_after_jiffies
	cbz	x0, LBB0_8
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x19]
	mov	w9, #6
	sub	w8, w9, w8
	mov	w9, #1
	lsl	w0, w9, w8
	bl	_VIVS_HI_CLOCK_CONTROL_FSCALE_VAL
	mov	x21, x0
	mov	x0, x19
	mov	x1, x21
	bl	_etnaviv_gpu_load_clock
	ldr	w8, [x22]
	orr	w21, w8, w21
	ldr	w1, [x25]
	mov	x0, x19
	mov	x2, x21
	bl	_gpu_write
	ldr	x8, [x19, #8]
	ldr	x9, [x23]
	ldr	w10, [x24]
	orr	w10, w10, w21
	ldr	w11, [x27]
	cmp	x8, x9
	csel	x8, x28, x25, eq
	csel	w2, w11, w10, eq
	csel	w21, w21, w10, eq
	ldr	w1, [x8]
	mov	x0, x19
	bl	_gpu_write
	mov	w0, #10
	mov	w1, #20
	bl	_usleep_range
	ldr	w8, [x24]
	bic	w21, w21, w8
	ldr	w1, [x25]
	mov	x0, x19
	mov	x2, x21
	bl	_gpu_write
	ldr	w8, [x22]
	bic	w2, w21, w8
	ldr	w1, [x25]
	mov	x0, x19
	bl	_gpu_write
	ldr	w1, [x26]
	mov	x0, x19
	bl	_gpu_read
Lloh19:
	adrp	x8, _VIVS_HI_IDLE_STATE_FE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _VIVS_HI_IDLE_STATE_FE@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w1, [x25]
	mov	x0, x19
	bl	_gpu_read
Lloh22:
	adrp	x8, _VIVS_HI_CLOCK_CONTROL_IDLE_3D@GOTPAGE
Lloh23:
	ldr	x8, [x8, _VIVS_HI_CLOCK_CONTROL_IDLE_3D@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
Lloh25:
	adrp	x8, _VIVS_HI_CLOCK_CONTROL_IDLE_2D@GOTPAGE
Lloh26:
	ldr	x8, [x8, _VIVS_HI_CLOCK_CONTROL_IDLE_2D@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
Lloh28:
	adrp	x1, l_.str.1@PAGE
Lloh29:
	add	x1, x1, l_.str.1@PAGEOFF
	tst	w8, w0
	b.eq	LBB0_3
	b	LBB0_10
LBB0_7:                                 ;   in Loop: Header=BB0_4 Depth=1
Lloh30:
	adrp	x1, l_.str.1@PAGE
Lloh31:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_3
LBB0_8:
	ldr	w1, [x26]
	mov	x0, x19
	bl	_gpu_read
	mov	x20, x0
	ldr	w1, [x25]
	mov	x0, x19
	bl	_gpu_read
	ldr	w8, [x19, #16]
Lloh32:
	adrp	x9, _VIVS_HI_IDLE_STATE_FE@GOTPAGE
Lloh33:
	ldr	x9, [x9, _VIVS_HI_IDLE_STATE_FE@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
Lloh35:
	adrp	x10, l_.str.3@PAGE
Lloh36:
	add	x10, x10, l_.str.3@PAGEOFF
Lloh37:
	adrp	x11, l_.str.4@PAGE
Lloh38:
	add	x11, x11, l_.str.4@PAGEOFF
	tst	w9, w20
	csel	x2, x11, x10, eq
Lloh39:
	adrp	x9, _VIVS_HI_CLOCK_CONTROL_IDLE_3D@GOTPAGE
Lloh40:
	ldr	x9, [x9, _VIVS_HI_CLOCK_CONTROL_IDLE_3D@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	tst	w9, w0
	csel	x3, x11, x10, eq
Lloh42:
	adrp	x9, _VIVS_HI_CLOCK_CONTROL_IDLE_2D@GOTPAGE
Lloh43:
	ldr	x9, [x9, _VIVS_HI_CLOCK_CONTROL_IDLE_2D@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	tst	w9, w0
	csel	x4, x11, x10, eq
Lloh45:
	adrp	x1, l_.str.2@PAGE
Lloh46:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x8
	bl	_dev_err
Lloh47:
	adrp	x8, _EBUSY@GOTPAGE
Lloh48:
	ldr	x8, [x8, _EBUSY@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_9:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_10:
Lloh50:
	adrp	x8, _VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS@GOTPAGE
Lloh51:
	ldr	x8, [x8, _VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	orr	w2, w8, w0
	ldr	w1, [x25]
	mov	x0, x19
	bl	_gpu_write
	mov	x0, x19
	bl	_etnaviv_gpu_update_clock
	mov	w0, #0
	b	LBB0_9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.cfi_endproc
                                        ; -- End function
	.comm	_jiffies,8,3                    ; @jiffies
	.comm	_VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU,4,2 ; @VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU
	.comm	_VIVS_HI_CLOCK_CONTROL,4,2      ; @VIVS_HI_CLOCK_CONTROL
	.comm	_ETNA_SEC_KERNEL,8,3            ; @ETNA_SEC_KERNEL
	.comm	_VIVS_MMUv2_AHB_CONTROL,4,2     ; @VIVS_MMUv2_AHB_CONTROL
	.comm	_VIVS_MMUv2_AHB_CONTROL_RESET,4,2 ; @VIVS_MMUv2_AHB_CONTROL_RESET
	.comm	_VIVS_HI_CLOCK_CONTROL_SOFT_RESET,4,2 ; @VIVS_HI_CLOCK_CONTROL_SOFT_RESET
	.comm	_VIVS_HI_IDLE_STATE,4,2         ; @VIVS_HI_IDLE_STATE
	.comm	_VIVS_HI_IDLE_STATE_FE,4,2      ; @VIVS_HI_IDLE_STATE_FE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"FE is not idle\n"

	.comm	_VIVS_HI_CLOCK_CONTROL_IDLE_3D,4,2 ; @VIVS_HI_CLOCK_CONTROL_IDLE_3D
	.comm	_VIVS_HI_CLOCK_CONTROL_IDLE_2D,4,2 ; @VIVS_HI_CLOCK_CONTROL_IDLE_2D
l_.str.1:                               ; @.str.1
	.asciz	"GPU is not idle\n"

	.comm	_VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS,4,2 ; @VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS
l_.str.2:                               ; @.str.2
	.asciz	"GPU failed to reset: FE %sidle, 3D %sidle, 2D %sidle\n"

l_.str.3:                               ; @.str.3
	.space	1

l_.str.4:                               ; @.str.4
	.asciz	"not "

	.comm	_EBUSY,4,2                      ; @EBUSY
	.no_dead_strip	_etnaviv_hw_reset
.subsections_via_symbols
