	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_set_dpm_state
_amdgpu_set_dpm_state:                  ## @amdgpu_set_dpm_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r14
	movq	%rdx, %r13
	callq	_dev_get_drvdata
	movq	%rax, %r15
	movq	8(%rax), %r12
	leaq	L_.str(%rip), %rbx
	movq	%rbx, %rdi
	callq	_strlen
	movq	%rbx, %rdi
	movq	%r13, %rsi
	movl	%eax, %edx
	callq	_strncmp
	testq	%rax, %rax
	je	LBB0_1
## %bb.4:
	leaq	L_.str.1(%rip), %rbx
	movq	%rbx, %rdi
	callq	_strlen
	movq	%rbx, %rdi
	movq	%r13, %rsi
	movl	%eax, %edx
	callq	_strncmp
	testq	%rax, %rax
	je	LBB0_5
## %bb.6:
	leaq	L_.str.2(%rip), %rbx
	movq	%rbx, %rdi
	callq	_strlen
	movq	%rbx, %rdi
	movq	%r13, %rsi
	movl	%eax, %edx
	callq	_strncmp
	testq	%rax, %rax
	je	LBB0_7
## %bb.8:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subq	(%rax), %r14
	jmp	LBB0_14
LBB0_1:
	movq	_POWER_STATE_TYPE_BATTERY@GOTPCREL(%rip), %rax
	jmp	LBB0_2
LBB0_5:
	movq	_POWER_STATE_TYPE_BALANCED@GOTPCREL(%rip), %rax
	jmp	LBB0_2
LBB0_7:
	movq	_POWER_STATE_TYPE_PERFORMANCE@GOTPCREL(%rip), %rax
LBB0_2:
	movl	(%rax), %r13d
	movl	%r13d, -44(%rbp)
	movq	%r12, %rdi
	callq	_is_support_sw_smu
	testq	%rax, %rax
	je	LBB0_9
## %bb.3:
	leaq	4(%r12), %rbx
	movq	%rbx, %rdi
	callq	_mutex_lock
	movl	%r13d, 8(%r12)
	movq	%rbx, %rdi
	callq	_mutex_unlock
	jmp	LBB0_14
LBB0_9:
	movq	16(%r12), %rax
	cmpq	$0, (%rax)
	je	LBB0_11
## %bb.10:
	movq	_AMD_PP_TASK_ENABLE_USER_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	callq	_amdgpu_dpm_dispatch_task
	jmp	LBB0_14
LBB0_11:
	leaq	4(%r12), %rbx
	movq	%rbx, %rdi
	callq	_mutex_lock
	movl	%r13d, 8(%r12)
	movq	%rbx, %rdi
	callq	_mutex_unlock
	movq	_AMD_IS_PX@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	je	LBB0_13
## %bb.12:
	movq	(%r15), %rax
	movq	_DRM_SWITCH_POWER_ON@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_14
LBB0_13:
	movq	%r12, %rdi
	callq	_amdgpu_pm_compute_clocks
LBB0_14:
	movq	%r14, %rax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"battery"

	.comm	_POWER_STATE_TYPE_BATTERY,4,2   ## @POWER_STATE_TYPE_BATTERY
L_.str.1:                               ## @.str.1
	.asciz	"balanced"

	.comm	_POWER_STATE_TYPE_BALANCED,4,2  ## @POWER_STATE_TYPE_BALANCED
L_.str.2:                               ## @.str.2
	.asciz	"performance"

	.comm	_POWER_STATE_TYPE_PERFORMANCE,4,2 ## @POWER_STATE_TYPE_PERFORMANCE
	.comm	_EINVAL,8,3                     ## @EINVAL
	.comm	_AMD_PP_TASK_ENABLE_USER_STATE,4,2 ## @AMD_PP_TASK_ENABLE_USER_STATE
	.comm	_AMD_IS_PX,4,2                  ## @AMD_IS_PX
	.comm	_DRM_SWITCH_POWER_ON,8,3        ## @DRM_SWITCH_POWER_ON
	.no_dead_strip	_amdgpu_set_dpm_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_set_dpm_state
_amdgpu_set_dpm_state:                  ; @amdgpu_set_dpm_state
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x3
	mov	x22, x2
	bl	_dev_get_drvdata
	mov	x21, x0
	ldr	x20, [x0, #8]
Lloh0:
	adrp	x23, l_.str@PAGE
Lloh1:
	add	x23, x23, l_.str@PAGEOFF
	mov	x0, x23
	bl	_strlen
	mov	x2, x0
	mov	x0, x23
	mov	x1, x22
	bl	_strncmp
	cbz	x0, LBB0_4
; %bb.1:
Lloh2:
	adrp	x23, l_.str.1@PAGE
Lloh3:
	add	x23, x23, l_.str.1@PAGEOFF
	mov	x0, x23
	bl	_strlen
	mov	x2, x0
	mov	x0, x23
	mov	x1, x22
	bl	_strncmp
	cbz	x0, LBB0_5
; %bb.2:
Lloh4:
	adrp	x23, l_.str.2@PAGE
Lloh5:
	add	x23, x23, l_.str.2@PAGEOFF
	mov	x0, x23
	bl	_strlen
	mov	x2, x0
	mov	x0, x23
	mov	x1, x22
	bl	_strncmp
	cbz	x0, LBB0_6
; %bb.3:
Lloh6:
	adrp	x8, _EINVAL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	neg	x19, x8
	b	LBB0_14
LBB0_4:
Lloh9:
	adrp	x8, _POWER_STATE_TYPE_BATTERY@GOTPAGE
Lloh10:
	ldr	x8, [x8, _POWER_STATE_TYPE_BATTERY@GOTPAGEOFF]
	b	LBB0_7
LBB0_5:
Lloh11:
	adrp	x8, _POWER_STATE_TYPE_BALANCED@GOTPAGE
Lloh12:
	ldr	x8, [x8, _POWER_STATE_TYPE_BALANCED@GOTPAGEOFF]
	b	LBB0_7
LBB0_6:
Lloh13:
	adrp	x8, _POWER_STATE_TYPE_PERFORMANCE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _POWER_STATE_TYPE_PERFORMANCE@GOTPAGEOFF]
LBB0_7:
	ldr	w23, [x8]
	str	w23, [sp, #12]
	mov	x0, x20
	bl	_is_support_sw_smu
	cbz	x0, LBB0_9
; %bb.8:
	add	x21, x20, #4
	mov	x0, x21
	bl	_mutex_lock
	str	w23, [x20, #8]
	mov	x0, x21
	bl	_mutex_unlock
	b	LBB0_14
LBB0_9:
	ldr	x8, [x20, #16]
	ldr	x8, [x8]
	cbz	x8, LBB0_11
; %bb.10:
Lloh15:
	adrp	x8, _AMD_PP_TASK_ENABLE_USER_STATE@GOTPAGE
Lloh16:
	ldr	x8, [x8, _AMD_PP_TASK_ENABLE_USER_STATE@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	add	x2, sp, #12
	mov	x0, x20
	bl	_amdgpu_dpm_dispatch_task
	b	LBB0_14
LBB0_11:
	add	x22, x20, #4
	mov	x0, x22
	bl	_mutex_lock
	str	w23, [x20, #8]
	mov	x0, x22
	bl	_mutex_unlock
	ldr	w8, [x20]
Lloh18:
	adrp	x9, _AMD_IS_PX@GOTPAGE
Lloh19:
	ldr	x9, [x9, _AMD_IS_PX@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_13
; %bb.12:
	ldr	x8, [x21]
Lloh21:
	adrp	x9, _DRM_SWITCH_POWER_ON@GOTPAGE
Lloh22:
	ldr	x9, [x9, _DRM_SWITCH_POWER_ON@GOTPAGEOFF]
Lloh23:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_14
LBB0_13:
	mov	x0, x20
	bl	_amdgpu_pm_compute_clocks
LBB0_14:
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"battery"

	.comm	_POWER_STATE_TYPE_BATTERY,4,2   ; @POWER_STATE_TYPE_BATTERY
l_.str.1:                               ; @.str.1
	.asciz	"balanced"

	.comm	_POWER_STATE_TYPE_BALANCED,4,2  ; @POWER_STATE_TYPE_BALANCED
l_.str.2:                               ; @.str.2
	.asciz	"performance"

	.comm	_POWER_STATE_TYPE_PERFORMANCE,4,2 ; @POWER_STATE_TYPE_PERFORMANCE
	.comm	_EINVAL,8,3                     ; @EINVAL
	.comm	_AMD_PP_TASK_ENABLE_USER_STATE,4,2 ; @AMD_PP_TASK_ENABLE_USER_STATE
	.comm	_AMD_IS_PX,4,2                  ; @AMD_IS_PX
	.comm	_DRM_SWITCH_POWER_ON,8,3        ; @DRM_SWITCH_POWER_ON
	.no_dead_strip	_amdgpu_set_dpm_state
.subsections_via_symbols
