	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_tn_set_vce_clocks              ## -- Begin function tn_set_vce_clocks
	.p2align	4, 0x90
_tn_set_vce_clocks:                     ## @tn_set_vce_clocks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_COMPUTE_ENGINE_PLL_PARAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-32(%rbp), %r8
	xorl	%ecx, %ecx
	callq	_radeon_atom_get_clock_dividers
	testl	%eax, %eax
	jne	LBB0_9
## %bb.1:
	movl	$100, %ebx
	movq	_CG_ECLK_STATUS@GOTPCREL(%rip), %r14
	movq	_ECLK_STATUS@GOTPCREL(%rip), %r15
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %edi
	callq	_RREG32
	testl	%eax, (%r15)
	jne	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	$10, %edi
	callq	_mdelay
	decl	%ebx
	jne	LBB0_2
	jmp	LBB0_8
LBB0_4:
	movq	_CG_ECLK_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-32(%rbp), %esi
	movq	_ECLK_DIR_CNTL_EN@GOTPCREL(%rip), %rax
	movq	_ECLK_DIVIDER_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	notl	%edx
	callq	_WREG32_P
	movl	$100, %ebx
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %edi
	callq	_RREG32
	testl	%eax, (%r15)
	jne	LBB0_6
## %bb.7:                               ##   in Loop: Header=BB0_5 Depth=1
	movl	$10, %edi
	callq	_mdelay
	decl	%ebx
	jne	LBB0_5
LBB0_8:
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_9
LBB0_6:
	xorl	%eax, %eax
LBB0_9:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ## @COMPUTE_ENGINE_PLL_PARAM
	.comm	_CG_ECLK_STATUS,4,2             ## @CG_ECLK_STATUS
	.comm	_ECLK_STATUS,4,2                ## @ECLK_STATUS
	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
	.comm	_CG_ECLK_CNTL,4,2               ## @CG_ECLK_CNTL
	.comm	_ECLK_DIR_CNTL_EN,4,2           ## @ECLK_DIR_CNTL_EN
	.comm	_ECLK_DIVIDER_MASK,4,2          ## @ECLK_DIVIDER_MASK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_tn_set_vce_clocks              ; -- Begin function tn_set_vce_clocks
	.p2align	2
_tn_set_vce_clocks:                     ; @tn_set_vce_clocks
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
Lloh0:
	adrp	x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x4, sp, #8
	mov	w3, #0
	bl	_radeon_atom_get_clock_dividers
	cbnz	w0, LBB0_9
; %bb.1:
	mov	w21, #100
Lloh3:
	adrp	x19, _CG_ECLK_STATUS@GOTPAGE
Lloh4:
	ldr	x19, [x19, _CG_ECLK_STATUS@GOTPAGEOFF]
Lloh5:
	adrp	x20, _ECLK_STATUS@GOTPAGE
Lloh6:
	ldr	x20, [x20, _ECLK_STATUS@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x19]
	bl	_RREG32
	ldr	w8, [x20]
	tst	w8, w0
	b.ne	LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	w0, #10
	bl	_mdelay
	subs	w21, w21, #1
	b.ne	LBB0_2
	b	LBB0_7
LBB0_4:
Lloh7:
	adrp	x8, _CG_ECLK_CNTL@GOTPAGE
Lloh8:
	ldr	x8, [x8, _CG_ECLK_CNTL@GOTPAGEOFF]
Lloh9:
	ldr	w0, [x8]
	ldr	w1, [sp, #8]
Lloh10:
	adrp	x8, _ECLK_DIR_CNTL_EN@GOTPAGE
Lloh11:
	ldr	x8, [x8, _ECLK_DIR_CNTL_EN@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
Lloh13:
	adrp	x9, _ECLK_DIVIDER_MASK@GOTPAGE
Lloh14:
	ldr	x9, [x9, _ECLK_DIVIDER_MASK@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	orr	w8, w9, w8
	mvn	w2, w8
	bl	_WREG32_P
	mov	w21, #100
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x19]
	bl	_RREG32
	ldr	w8, [x20]
	tst	w8, w0
	b.ne	LBB0_8
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	mov	w0, #10
	bl	_mdelay
	subs	w21, w21, #1
	b.ne	LBB0_5
LBB0_7:
Lloh16:
	adrp	x8, _ETIMEDOUT@GOTPAGE
Lloh17:
	ldr	x8, [x8, _ETIMEDOUT@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_9
LBB0_8:
	mov	w0, #0
LBB0_9:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ; @COMPUTE_ENGINE_PLL_PARAM
	.comm	_CG_ECLK_STATUS,4,2             ; @CG_ECLK_STATUS
	.comm	_ECLK_STATUS,4,2                ; @ECLK_STATUS
	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
	.comm	_CG_ECLK_CNTL,4,2               ; @CG_ECLK_CNTL
	.comm	_ECLK_DIR_CNTL_EN,4,2           ; @ECLK_DIR_CNTL_EN
	.comm	_ECLK_DIVIDER_MASK,4,2          ; @ECLK_DIVIDER_MASK
.subsections_via_symbols
