	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_clock_read_integrated_info
_dce_clock_read_integrated_info:        ## @dce_clock_read_integrated_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	16(%rdi), %rax
	movq	(%rax), %r9
	movq	8(%rax), %r8
	movq	(%r9), %rax
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movl	(%rax), %eax
	movl	%eax, (%rdi)
	testl	%eax, %eax
	jne	LBB0_5
LBB0_4:
	movl	8(%r9), %eax
	testl	%eax, %eax
	movl	$3600000, %ecx                  ## imm = 0x36EE80
	cmovnel	%eax, %ecx
	movl	%ecx, (%rdi)
LBB0_5:
	movq	_NUMBER_OF_DISP_CLK_VOLTAGE@GOTPCREL(%rip), %r10
	movl	(%r10), %r14d
	testl	%r14d, %r14d
	jle	LBB0_13
## %bb.6:
	movq	(%r9), %r15
	leaq	l_switch.table.dce_clock_read_integrated_info(%rip), %rax
	xorl	%edx, %edx
	movq	_DM_PP_CLOCKS_STATE_INVALID@GOTPCREL(%rip), %r11
	jmp	LBB0_7
	.p2align	4, 0x90
LBB0_12:                                ##   in Loop: Header=BB0_7 Depth=1
	incq	%rdx
	movslq	%r14d, %rcx
	addq	$8, %rax
	cmpq	%rcx, %rdx
	jge	LBB0_13
LBB0_7:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r11, %rbx
	testl	$-4, %edx
	je	LBB0_8
## %bb.9:                               ##   in Loop: Header=BB0_7 Depth=1
	testq	%r15, %r15
	jne	LBB0_10
	jmp	LBB0_12
	.p2align	4, 0x90
LBB0_8:                                 ##   in Loop: Header=BB0_7 Depth=1
	movq	(%rax), %rbx
	testq	%r15, %r15
	je	LBB0_12
LBB0_10:                                ##   in Loop: Header=BB0_7 Depth=1
	movq	8(%r15), %rcx
	movl	(%rcx,%rdx,4), %ecx
	cmpl	$100000, %ecx                   ## imm = 0x186A0
	jl	LBB0_12
## %bb.11:                              ##   in Loop: Header=BB0_7 Depth=1
	movl	(%rbx), %ebx
	movq	8(%rdi), %rsi
	movl	%ecx, (%rsi,%rbx,4)
	movl	(%r10), %r14d
	jmp	LBB0_12
LBB0_13:
	cmpl	$0, (%r8)
	jne	LBB0_17
## %bb.14:
	movq	(%r9), %rax
	testq	%rax, %rax
	je	LBB0_17
## %bb.15:
	movq	_DFS_BYPASS_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, 4(%rax)
	je	LBB0_17
## %bb.16:
	movl	$1, 4(%rdi)
LBB0_17:
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movl	(%rdi), %eax
	testl	%eax, %eax
	jne	LBB0_5
	jmp	LBB0_4
	.cfi_endproc
                                        ## -- End function
	.comm	_NUMBER_OF_DISP_CLK_VOLTAGE,4,2 ## @NUMBER_OF_DISP_CLK_VOLTAGE
	.comm	_DM_PP_CLOCKS_STATE_INVALID,4,2 ## @DM_PP_CLOCKS_STATE_INVALID
	.comm	_DM_PP_CLOCKS_STATE_ULTRA_LOW,4,2 ## @DM_PP_CLOCKS_STATE_ULTRA_LOW
	.comm	_DM_PP_CLOCKS_STATE_LOW,4,2     ## @DM_PP_CLOCKS_STATE_LOW
	.comm	_DM_PP_CLOCKS_STATE_NOMINAL,4,2 ## @DM_PP_CLOCKS_STATE_NOMINAL
	.comm	_DM_PP_CLOCKS_STATE_PERFORMANCE,4,2 ## @DM_PP_CLOCKS_STATE_PERFORMANCE
	.comm	_DFS_BYPASS_ENABLE,4,2          ## @DFS_BYPASS_ENABLE
	.no_dead_strip	_dce_clock_read_integrated_info
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.dce_clock_read_integrated_info
l_switch.table.dce_clock_read_integrated_info:
	.quad	_DM_PP_CLOCKS_STATE_ULTRA_LOW
	.quad	_DM_PP_CLOCKS_STATE_LOW
	.quad	_DM_PP_CLOCKS_STATE_NOMINAL
	.quad	_DM_PP_CLOCKS_STATE_PERFORMANCE

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_clock_read_integrated_info
_dce_clock_read_integrated_info:        ; @dce_clock_read_integrated_info
	.cfi_startproc
; %bb.0:
	ldr	x8, [x0, #16]
	ldp	x8, x9, [x8]
	ldr	x10, [x8]
	cbz	x10, LBB0_13
; %bb.1:
	ldr	w10, [x10]
	str	w10, [x0]
	cbnz	w10, LBB0_3
LBB0_2:
	ldr	w10, [x8, #8]
	mov	w11, #61056
	movk	w11, #54, lsl #16
	cmp	w10, #0
	csel	w10, w11, w10, eq
	str	w10, [x0]
LBB0_3:
Lloh0:
	adrp	x10, _NUMBER_OF_DISP_CLK_VOLTAGE@GOTPAGE
Lloh1:
	ldr	x10, [x10, _NUMBER_OF_DISP_CLK_VOLTAGE@GOTPAGEOFF]
	ldr	w13, [x10]
	cmp	w13, #1
	b.lt	LBB0_11
; %bb.4:
	mov	x11, #0
	ldr	x12, [x8]
Lloh2:
	adrp	x14, _DM_PP_CLOCKS_STATE_INVALID@GOTPAGE
Lloh3:
	ldr	x14, [x14, _DM_PP_CLOCKS_STATE_INVALID@GOTPAGEOFF]
	mov	w15, #34464
	movk	w15, #1, lsl #16
Lloh4:
	adrp	x16, l_switch.table.dce_clock_read_integrated_info@PAGE
Lloh5:
	add	x16, x16, l_switch.table.dce_clock_read_integrated_info@PAGEOFF
	b	LBB0_6
LBB0_5:                                 ;   in Loop: Header=BB0_6 Depth=1
	add	x11, x11, #1
	cmp	x11, w13, sxtw
	b.ge	LBB0_11
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	mov	x17, x14
	tst	x11, #0xfffffffc
	b.eq	LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	cbnz	x12, LBB0_9
	b	LBB0_5
LBB0_8:                                 ;   in Loop: Header=BB0_6 Depth=1
	ldr	x17, [x16, x11, lsl #3]
	cbz	x12, LBB0_5
LBB0_9:                                 ;   in Loop: Header=BB0_6 Depth=1
	ldr	x1, [x12, #8]
	ldr	w1, [x1, x11, lsl #2]
	cmp	w1, w15
	b.lt	LBB0_5
; %bb.10:                               ;   in Loop: Header=BB0_6 Depth=1
	ldr	w13, [x17]
	ldr	x17, [x0, #8]
	str	w1, [x17, x13, lsl #2]
	ldr	w13, [x10]
	b	LBB0_5
LBB0_11:
	ldr	w9, [x9]
	cbz	w9, LBB0_14
LBB0_12:
	ret
LBB0_13:
	ldr	w10, [x0]
	cbnz	w10, LBB0_3
	b	LBB0_2
LBB0_14:
	ldr	x8, [x8]
	cbz	x8, LBB0_12
; %bb.15:
	ldr	w8, [x8, #4]
Lloh6:
	adrp	x9, _DFS_BYPASS_ENABLE@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DFS_BYPASS_ENABLE@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_12
; %bb.16:
	mov	w8, #1
	str	w8, [x0, #4]
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_NUMBER_OF_DISP_CLK_VOLTAGE,4,2 ; @NUMBER_OF_DISP_CLK_VOLTAGE
	.comm	_DM_PP_CLOCKS_STATE_INVALID,4,2 ; @DM_PP_CLOCKS_STATE_INVALID
	.comm	_DM_PP_CLOCKS_STATE_ULTRA_LOW,4,2 ; @DM_PP_CLOCKS_STATE_ULTRA_LOW
	.comm	_DM_PP_CLOCKS_STATE_LOW,4,2     ; @DM_PP_CLOCKS_STATE_LOW
	.comm	_DM_PP_CLOCKS_STATE_NOMINAL,4,2 ; @DM_PP_CLOCKS_STATE_NOMINAL
	.comm	_DM_PP_CLOCKS_STATE_PERFORMANCE,4,2 ; @DM_PP_CLOCKS_STATE_PERFORMANCE
	.comm	_DFS_BYPASS_ENABLE,4,2          ; @DFS_BYPASS_ENABLE
	.no_dead_strip	_dce_clock_read_integrated_info
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.dce_clock_read_integrated_info
l_switch.table.dce_clock_read_integrated_info:
	.quad	_DM_PP_CLOCKS_STATE_ULTRA_LOW
	.quad	_DM_PP_CLOCKS_STATE_LOW
	.quad	_DM_PP_CLOCKS_STATE_NOMINAL
	.quad	_DM_PP_CLOCKS_STATE_PERFORMANCE

.subsections_via_symbols
