	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_ras_feature_enable_on_boot ## -- Begin function amdgpu_ras_feature_enable_on_boot
	.p2align	4, 0x90
_amdgpu_ras_feature_enable_on_boot:     ## @amdgpu_ras_feature_enable_on_boot
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ebx
	movq	%rsi, %r14
	movq	%rdi, %r15
	callq	_amdgpu_ras_get_context
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	_AMDGPU_RAS_FLAG_INIT_BY_VBIOS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rax)
	je	LBB0_11
## %bb.3:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	testl	%ebx, %ebx
	je	LBB0_8
## %bb.4:
	callq	_amdgpu_ras_feature_enable
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	movl	%eax, %edx
	addl	(%rcx), %edx
	jne	LBB0_7
## %bb.5:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	___amdgpu_ras_feature_enable
	testl	%eax, %eax
	jne	LBB0_7
## %bb.6:
	movl	(%r14), %edi
	callq	_ras_block_str
	leaq	L_.str(%rip), %rdi
	movl	%eax, %esi
	callq	_DRM_INFO
	xorl	%eax, %eax
	jmp	LBB0_7
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_7:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_11:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
LBB0_10:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ras_feature_enable      ## TAILCALL
LBB0_8:
	callq	___amdgpu_ras_feature_enable
	testl	%eax, %eax
	jne	LBB0_7
## %bb.9:
	movq	%r15, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	jmp	LBB0_10
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_AMDGPU_RAS_FLAG_INIT_BY_VBIOS,4,2 ## @AMDGPU_RAS_FLAG_INIT_BY_VBIOS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"RAS INFO: %s setup object\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_ras_feature_enable_on_boot ; -- Begin function amdgpu_ras_feature_enable_on_boot
	.p2align	2
_amdgpu_ras_feature_enable_on_boot:     ; @amdgpu_ras_feature_enable_on_boot
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x2
	mov	x19, x1
	mov	x20, x0
	bl	_amdgpu_ras_get_context
	cbz	x0, LBB0_6
; %bb.1:
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _AMDGPU_RAS_FLAG_INIT_BY_VBIOS@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMDGPU_RAS_FLAG_INIT_BY_VBIOS@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_8
; %bb.2:
	mov	x0, x20
	mov	x1, x19
	mov	w2, #1
	cbz	w21, LBB0_10
; %bb.3:
	bl	_amdgpu_ras_feature_enable
Lloh3:
	adrp	x8, _EINVAL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmn	w0, w8
	b.ne	LBB0_7
; %bb.4:
	mov	x0, x20
	mov	x1, x19
	mov	w2, #1
	bl	___amdgpu_ras_feature_enable
	cbnz	w0, LBB0_7
; %bb.5:
	ldr	w0, [x19]
	bl	_ras_block_str
	mov	x1, x0
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_INFO
	mov	w0, #0
	b	LBB0_7
LBB0_6:
Lloh8:
	adrp	x8, _EINVAL@GOTPAGE
Lloh9:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_7:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_8:
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_amdgpu_ras_feature_enable
LBB0_10:
	bl	___amdgpu_ras_feature_enable
	cbnz	w0, LBB0_7
; %bb.11:
	mov	x0, x20
	mov	x1, x19
	mov	w2, #0
	b	LBB0_9
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_AMDGPU_RAS_FLAG_INIT_BY_VBIOS,4,2 ; @AMDGPU_RAS_FLAG_INIT_BY_VBIOS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"RAS INFO: %s setup object\n"

.subsections_via_symbols
