	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ti_edac_setup_dimm
_ti_edac_setup_dimm:                    ## @ti_edac_setup_dimm
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	16(%rdi), %r14
	movl	8(%rdi), %eax
	movl	(%rdi), %edx
	movl	4(%rdi), %esi
	movl	%eax, %edi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	_EDAC_DIMM_PTR
	movq	%rax, %r15
	movq	_EMIF_SDRAM_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_ti_edac_readl
	movq	_EMIF_TYPE_DRA7@GOTPCREL(%rip), %rcx
	cmpq	%rbx, (%rcx)
	jne	LBB0_3
## %bb.1:
	movq	_SDRAM_PAGESIZE_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	andq	%rax, %rdx
	movq	_SDRAM_PAGESIZE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarq	%cl, %rdx
	movq	_SDRAM_ROWSIZE_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	andq	%rax, %rsi
	movq	_SDRAM_ROWSIZE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarq	%cl, %rsi
	movq	_SDRAM_IBANK_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdi
	andq	%rax, %rdi
	movq	_SDRAM_IBANK_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarq	%cl, %rdi
	addl	%edx, %esi
	leal	(%rdi,%rsi), %edx
	addl	$17, %edx
	movq	_SDRAM_NARROW_MODE_MASK@GOTPCREL(%rip), %rcx
	testq	%rax, (%rcx)
	je	LBB0_7
## %bb.2:
	incl	%edx
	jmp	LBB0_9
LBB0_3:
	movq	_SDRAM_K2_PAGESIZE_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	andq	%rax, %rdx
	movq	_SDRAM_K2_PAGESIZE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarq	%cl, %rdx
	movq	_SDRAM_K2_IBANK_MASK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	andq	%rax, %rsi
	movq	_SDRAM_K2_IBANK_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarq	%cl, %rsi
	movq	_SDRAM_K2_EBANK_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_SDRAM_K2_EBANK_MASK@GOTPCREL(%rip), %rdi
	movq	(%rdi), %rdi
	andq	%rax, %rdi
	sarq	%cl, %rdi
	addl	%edx, %esi
	leal	(%rdi,%rsi), %edx
	addl	$24, %edx
	movq	_SDRAM_K2_NARROW_MODE_MASK@GOTPCREL(%rip), %rcx
	andq	(%rcx), %rax
	movq	_SDRAM_K2_NARROW_MODE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarq	%cl, %rax
	cmpq	$2, %rax
	je	LBB0_8
## %bb.4:
	cmpq	$1, %rax
	je	LBB0_10
## %bb.5:
	testq	%rax, %rax
	jne	LBB0_13
## %bb.6:
	addl	$3, %edx
	movq	_DEV_X64@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	jmp	LBB0_12
LBB0_7:
	addl	$2, %edx
	jmp	LBB0_11
LBB0_8:
	incl	%edx
	movl	$2, %eax
LBB0_9:
	movq	_DEV_X16@GOTPCREL(%rip), %rcx
	jmp	LBB0_12
LBB0_10:
	addl	$2, %edx
	movl	$1, %eax
LBB0_11:
	movq	_DEV_X32@GOTPCREL(%rip), %rcx
LBB0_12:
	movq	(%rcx), %rcx
	movq	%rcx, 24(%r15)
LBB0_13:
	movl	$1, %esi
	movl	%edx, %ecx
	shll	%cl, %esi
	movslq	%esi, %rdx
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarq	%cl, %rdx
	movq	%rdx, 16(%r15)
	movl	$4, (%r15)
	movq	_SDRAM_TYPE_MASK@GOTPCREL(%rip), %rcx
	andq	(%rcx), %rax
	movq	_SDRAM_TYPE_DDR2@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_15
## %bb.14:
	movq	_MEM_DDR2@GOTPCREL(%rip), %rax
	jmp	LBB0_16
LBB0_15:
	movq	_MEM_DDR3@GOTPCREL(%rip), %rax
LBB0_16:
	movl	(%rax), %eax
	movl	%eax, 8(%r15)
	movq	_EMIF_ECC_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_ti_edac_readl
	movq	_ECC_ENABLED@GOTPCREL(%rip), %rcx
	andq	(%rcx), %rax
	jne	LBB0_18
## %bb.17:
	movq	_EDAC_NONE@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_18:
	movq	_EDAC_SECDED@GOTPCREL(%rip), %rax
LBB0_19:
	movl	(%rax), %eax
	movl	%eax, 4(%r15)
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EMIF_SDRAM_CONFIG,4,2          ## @EMIF_SDRAM_CONFIG
	.comm	_EMIF_TYPE_DRA7,8,3             ## @EMIF_TYPE_DRA7
	.comm	_SDRAM_PAGESIZE_MASK,8,3        ## @SDRAM_PAGESIZE_MASK
	.comm	_SDRAM_PAGESIZE_SHIFT,8,3       ## @SDRAM_PAGESIZE_SHIFT
	.comm	_SDRAM_ROWSIZE_MASK,8,3         ## @SDRAM_ROWSIZE_MASK
	.comm	_SDRAM_ROWSIZE_SHIFT,8,3        ## @SDRAM_ROWSIZE_SHIFT
	.comm	_SDRAM_IBANK_MASK,8,3           ## @SDRAM_IBANK_MASK
	.comm	_SDRAM_IBANK_SHIFT,8,3          ## @SDRAM_IBANK_SHIFT
	.comm	_SDRAM_NARROW_MODE_MASK,8,3     ## @SDRAM_NARROW_MODE_MASK
	.comm	_DEV_X16,8,3                    ## @DEV_X16
	.comm	_DEV_X32,8,3                    ## @DEV_X32
	.comm	_SDRAM_K2_PAGESIZE_MASK,8,3     ## @SDRAM_K2_PAGESIZE_MASK
	.comm	_SDRAM_K2_PAGESIZE_SHIFT,8,3    ## @SDRAM_K2_PAGESIZE_SHIFT
	.comm	_SDRAM_K2_IBANK_MASK,8,3        ## @SDRAM_K2_IBANK_MASK
	.comm	_SDRAM_K2_IBANK_SHIFT,8,3       ## @SDRAM_K2_IBANK_SHIFT
	.comm	_SDRAM_K2_EBANK_MASK,8,3        ## @SDRAM_K2_EBANK_MASK
	.comm	_SDRAM_K2_EBANK_SHIFT,8,3       ## @SDRAM_K2_EBANK_SHIFT
	.comm	_SDRAM_K2_NARROW_MODE_MASK,8,3  ## @SDRAM_K2_NARROW_MODE_MASK
	.comm	_SDRAM_K2_NARROW_MODE_SHIFT,8,3 ## @SDRAM_K2_NARROW_MODE_SHIFT
	.comm	_DEV_X64,8,3                    ## @DEV_X64
	.comm	_PAGE_SHIFT,8,3                 ## @PAGE_SHIFT
	.comm	_SDRAM_TYPE_MASK,8,3            ## @SDRAM_TYPE_MASK
	.comm	_SDRAM_TYPE_DDR2,8,3            ## @SDRAM_TYPE_DDR2
	.comm	_MEM_DDR2,4,2                   ## @MEM_DDR2
	.comm	_MEM_DDR3,4,2                   ## @MEM_DDR3
	.comm	_EMIF_ECC_CTRL,4,2              ## @EMIF_ECC_CTRL
	.comm	_ECC_ENABLED,8,3                ## @ECC_ENABLED
	.comm	_EDAC_SECDED,4,2                ## @EDAC_SECDED
	.comm	_EDAC_NONE,4,2                  ## @EDAC_NONE
	.no_dead_strip	_ti_edac_setup_dimm
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ti_edac_setup_dimm
_ti_edac_setup_dimm:                    ; @ti_edac_setup_dimm
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x1
	ldr	x19, [x0, #16]
	ldp	w1, w8, [x0, #4]
	ldr	w2, [x0]
	mov	x0, x8
	mov	w3, #0
	mov	w4, #0
	mov	w5, #0
	bl	_EDAC_DIMM_PTR
	mov	x20, x0
Lloh0:
	adrp	x8, _EMIF_SDRAM_CONFIG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EMIF_SDRAM_CONFIG@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ti_edac_readl
Lloh3:
	adrp	x8, _EMIF_TYPE_DRA7@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EMIF_TYPE_DRA7@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	cmp	x8, x21
	b.ne	LBB0_2
; %bb.1:
Lloh6:
	adrp	x8, _SDRAM_PAGESIZE_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SDRAM_PAGESIZE_MASK@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	and	x8, x8, x0
Lloh9:
	adrp	x9, _SDRAM_PAGESIZE_SHIFT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _SDRAM_PAGESIZE_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	asr	x8, x8, x9
Lloh12:
	adrp	x9, _SDRAM_ROWSIZE_MASK@GOTPAGE
Lloh13:
	ldr	x9, [x9, _SDRAM_ROWSIZE_MASK@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	and	x9, x9, x0
Lloh15:
	adrp	x10, _SDRAM_ROWSIZE_SHIFT@GOTPAGE
Lloh16:
	ldr	x10, [x10, _SDRAM_ROWSIZE_SHIFT@GOTPAGEOFF]
Lloh17:
	ldr	x10, [x10]
	asr	x9, x9, x10
Lloh18:
	adrp	x10, _SDRAM_IBANK_MASK@GOTPAGE
Lloh19:
	ldr	x10, [x10, _SDRAM_IBANK_MASK@GOTPAGEOFF]
Lloh20:
	ldr	x10, [x10]
	and	x10, x10, x0
Lloh21:
	adrp	x11, _SDRAM_IBANK_SHIFT@GOTPAGE
Lloh22:
	ldr	x11, [x11, _SDRAM_IBANK_SHIFT@GOTPAGEOFF]
Lloh23:
	ldr	x11, [x11]
	asr	x10, x10, x11
	add	w8, w8, w9
	add	w8, w8, w10
	add	w8, w8, #17
Lloh24:
	adrp	x9, _SDRAM_NARROW_MODE_MASK@GOTPAGE
Lloh25:
	ldr	x9, [x9, _SDRAM_NARROW_MODE_MASK@GOTPAGEOFF]
Lloh26:
	ldr	x9, [x9]
	tst	x9, x0
	add	w10, w8, #2
Lloh27:
	adrp	x9, _DEV_X32@GOTPAGE
Lloh28:
	ldr	x9, [x9, _DEV_X32@GOTPAGEOFF]
Lloh29:
	adrp	x11, _DEV_X16@GOTPAGE
Lloh30:
	ldr	x11, [x11, _DEV_X16@GOTPAGEOFF]
	csel	x9, x9, x11, eq
	csinc	w8, w10, w8, eq
	b	LBB0_8
LBB0_2:
Lloh31:
	adrp	x8, _SDRAM_K2_PAGESIZE_MASK@GOTPAGE
Lloh32:
	ldr	x8, [x8, _SDRAM_K2_PAGESIZE_MASK@GOTPAGEOFF]
Lloh33:
	ldr	x8, [x8]
	and	x8, x8, x0
Lloh34:
	adrp	x9, _SDRAM_K2_PAGESIZE_SHIFT@GOTPAGE
Lloh35:
	ldr	x9, [x9, _SDRAM_K2_PAGESIZE_SHIFT@GOTPAGEOFF]
Lloh36:
	ldr	x9, [x9]
	asr	x8, x8, x9
Lloh37:
	adrp	x9, _SDRAM_K2_IBANK_MASK@GOTPAGE
Lloh38:
	ldr	x9, [x9, _SDRAM_K2_IBANK_MASK@GOTPAGEOFF]
Lloh39:
	ldr	x9, [x9]
	and	x9, x9, x0
Lloh40:
	adrp	x10, _SDRAM_K2_IBANK_SHIFT@GOTPAGE
Lloh41:
	ldr	x10, [x10, _SDRAM_K2_IBANK_SHIFT@GOTPAGEOFF]
Lloh42:
	ldr	x10, [x10]
	asr	x9, x9, x10
Lloh43:
	adrp	x10, _SDRAM_K2_EBANK_MASK@GOTPAGE
Lloh44:
	ldr	x10, [x10, _SDRAM_K2_EBANK_MASK@GOTPAGEOFF]
Lloh45:
	ldr	x10, [x10]
	and	x10, x10, x0
Lloh46:
	adrp	x11, _SDRAM_K2_EBANK_SHIFT@GOTPAGE
Lloh47:
	ldr	x11, [x11, _SDRAM_K2_EBANK_SHIFT@GOTPAGEOFF]
Lloh48:
	ldr	x11, [x11]
	asr	x10, x10, x11
	add	w8, w8, w9
	add	w8, w8, w10
	add	w8, w8, #24
Lloh49:
	adrp	x9, _SDRAM_K2_NARROW_MODE_MASK@GOTPAGE
Lloh50:
	ldr	x9, [x9, _SDRAM_K2_NARROW_MODE_MASK@GOTPAGEOFF]
Lloh51:
	ldr	x9, [x9]
	and	x9, x9, x0
Lloh52:
	adrp	x10, _SDRAM_K2_NARROW_MODE_SHIFT@GOTPAGE
Lloh53:
	ldr	x10, [x10, _SDRAM_K2_NARROW_MODE_SHIFT@GOTPAGEOFF]
Lloh54:
	ldr	x10, [x10]
	asr	x0, x9, x10
	cmp	x0, #2
	b.eq	LBB0_6
; %bb.3:
	cmp	x0, #1
	b.eq	LBB0_7
; %bb.4:
	cbnz	x0, LBB0_9
; %bb.5:
	add	w8, w8, #3
Lloh55:
	adrp	x9, _DEV_X64@GOTPAGE
Lloh56:
	ldr	x9, [x9, _DEV_X64@GOTPAGEOFF]
	b	LBB0_8
LBB0_6:
	add	w8, w8, #1
Lloh57:
	adrp	x9, _DEV_X16@GOTPAGE
Lloh58:
	ldr	x9, [x9, _DEV_X16@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:
	add	w8, w8, #2
Lloh59:
	adrp	x9, _DEV_X32@GOTPAGE
Lloh60:
	ldr	x9, [x9, _DEV_X32@GOTPAGEOFF]
LBB0_8:
	ldr	x9, [x9]
	str	x9, [x20, #24]
LBB0_9:
	mov	w9, #1
	lsl	w8, w9, w8
Lloh61:
	adrp	x9, _PAGE_SHIFT@GOTPAGE
Lloh62:
	ldr	x9, [x9, _PAGE_SHIFT@GOTPAGEOFF]
	sxtw	x8, w8
Lloh63:
	ldr	x9, [x9]
	asr	x8, x8, x9
	str	x8, [x20, #16]
	mov	w8, #4
	str	w8, [x20]
Lloh64:
	adrp	x8, _SDRAM_TYPE_MASK@GOTPAGE
Lloh65:
	ldr	x8, [x8, _SDRAM_TYPE_MASK@GOTPAGEOFF]
Lloh66:
	ldr	x8, [x8]
	and	x8, x8, x0
Lloh67:
	adrp	x9, _SDRAM_TYPE_DDR2@GOTPAGE
Lloh68:
	ldr	x9, [x9, _SDRAM_TYPE_DDR2@GOTPAGEOFF]
Lloh69:
	ldr	x9, [x9]
Lloh70:
	adrp	x10, _MEM_DDR2@GOTPAGE
Lloh71:
	ldr	x10, [x10, _MEM_DDR2@GOTPAGEOFF]
Lloh72:
	adrp	x11, _MEM_DDR3@GOTPAGE
Lloh73:
	ldr	x11, [x11, _MEM_DDR3@GOTPAGEOFF]
	cmp	x8, x9
	csel	x8, x10, x11, eq
	ldr	w8, [x8]
	str	w8, [x20, #8]
Lloh74:
	adrp	x8, _EMIF_ECC_CTRL@GOTPAGE
Lloh75:
	ldr	x8, [x8, _EMIF_ECC_CTRL@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ti_edac_readl
Lloh77:
	adrp	x8, _ECC_ENABLED@GOTPAGE
Lloh78:
	ldr	x8, [x8, _ECC_ENABLED@GOTPAGEOFF]
Lloh79:
	ldr	x8, [x8]
Lloh80:
	adrp	x9, _EDAC_NONE@GOTPAGE
Lloh81:
	ldr	x9, [x9, _EDAC_NONE@GOTPAGEOFF]
Lloh82:
	adrp	x10, _EDAC_SECDED@GOTPAGE
Lloh83:
	ldr	x10, [x10, _EDAC_SECDED@GOTPAGEOFF]
	tst	x8, x0
	csel	x8, x9, x10, eq
	ldr	w8, [x8]
	str	w8, [x20, #4]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh59, Lloh60
	.loh AdrpLdrGot	Lloh82, Lloh83
	.loh AdrpLdrGot	Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGot	Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.cfi_endproc
                                        ; -- End function
	.comm	_EMIF_SDRAM_CONFIG,4,2          ; @EMIF_SDRAM_CONFIG
	.comm	_EMIF_TYPE_DRA7,8,3             ; @EMIF_TYPE_DRA7
	.comm	_SDRAM_PAGESIZE_MASK,8,3        ; @SDRAM_PAGESIZE_MASK
	.comm	_SDRAM_PAGESIZE_SHIFT,8,3       ; @SDRAM_PAGESIZE_SHIFT
	.comm	_SDRAM_ROWSIZE_MASK,8,3         ; @SDRAM_ROWSIZE_MASK
	.comm	_SDRAM_ROWSIZE_SHIFT,8,3        ; @SDRAM_ROWSIZE_SHIFT
	.comm	_SDRAM_IBANK_MASK,8,3           ; @SDRAM_IBANK_MASK
	.comm	_SDRAM_IBANK_SHIFT,8,3          ; @SDRAM_IBANK_SHIFT
	.comm	_SDRAM_NARROW_MODE_MASK,8,3     ; @SDRAM_NARROW_MODE_MASK
	.comm	_DEV_X16,8,3                    ; @DEV_X16
	.comm	_DEV_X32,8,3                    ; @DEV_X32
	.comm	_SDRAM_K2_PAGESIZE_MASK,8,3     ; @SDRAM_K2_PAGESIZE_MASK
	.comm	_SDRAM_K2_PAGESIZE_SHIFT,8,3    ; @SDRAM_K2_PAGESIZE_SHIFT
	.comm	_SDRAM_K2_IBANK_MASK,8,3        ; @SDRAM_K2_IBANK_MASK
	.comm	_SDRAM_K2_IBANK_SHIFT,8,3       ; @SDRAM_K2_IBANK_SHIFT
	.comm	_SDRAM_K2_EBANK_MASK,8,3        ; @SDRAM_K2_EBANK_MASK
	.comm	_SDRAM_K2_EBANK_SHIFT,8,3       ; @SDRAM_K2_EBANK_SHIFT
	.comm	_SDRAM_K2_NARROW_MODE_MASK,8,3  ; @SDRAM_K2_NARROW_MODE_MASK
	.comm	_SDRAM_K2_NARROW_MODE_SHIFT,8,3 ; @SDRAM_K2_NARROW_MODE_SHIFT
	.comm	_DEV_X64,8,3                    ; @DEV_X64
	.comm	_PAGE_SHIFT,8,3                 ; @PAGE_SHIFT
	.comm	_SDRAM_TYPE_MASK,8,3            ; @SDRAM_TYPE_MASK
	.comm	_SDRAM_TYPE_DDR2,8,3            ; @SDRAM_TYPE_DDR2
	.comm	_MEM_DDR2,4,2                   ; @MEM_DDR2
	.comm	_MEM_DDR3,4,2                   ; @MEM_DDR3
	.comm	_EMIF_ECC_CTRL,4,2              ; @EMIF_ECC_CTRL
	.comm	_ECC_ENABLED,8,3                ; @ECC_ENABLED
	.comm	_EDAC_SECDED,4,2                ; @EDAC_SECDED
	.comm	_EDAC_NONE,4,2                  ; @EDAC_NONE
	.no_dead_strip	_ti_edac_setup_dimm
.subsections_via_symbols
