	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cdv_intel_dp_mode_fixup
_cdv_intel_dp_mode_fixup:               ## @cdv_intel_dp_mode_fixup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	(%rdi), %rax
	movq	(%rax), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	callq	_to_gma_encoder
	movq	%rax, %r15
	movq	(%rax), %r13
	movq	%rax, %rdi
	callq	_cdv_intel_dp_max_lane_count
	movl	%eax, %ebx
	movq	%r15, %rdi
	callq	_cdv_intel_dp_max_link_bw
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	movl	(%r12), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	%r15, -104(%rbp)                ## 8-byte Spill
	movq	%r15, %rdi
	callq	_is_edp
	movl	$24, -44(%rbp)                  ## 4-byte Folded Spill
	testq	%rax, %rax
	je	LBB0_3
## %bb.1:
	movq	8(%r13), %rdi
	testq	%rdi, %rdi
	je	LBB0_3
## %bb.2:
	movq	%r14, %rsi
	callq	_cdv_intel_fixed_panel_mode
	movq	8(%r13), %rax
	movl	(%rax), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
LBB0_3:
	movq	%r13, -72(%rbp)                 ## 8-byte Spill
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	testl	%ebx, %ebx
	jle	LBB0_10
## %bb.4:
	xorl	%r14d, %r14d
	cmpq	$128, -80(%rbp)                 ## 8-byte Folded Reload
	sete	%r14b
	leaq	_cdv_intel_dp_mode_fixup.bws(%rip), %rax
	leaq	(%rax,%r14,4), %rax
	incq	%r14
	movl	$1, %r12d
	movl	%ebx, -60(%rbp)                 ## 4-byte Spill
	movq	%r14, -96(%rbp)                 ## 8-byte Spill
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
LBB0_5:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_7 Depth 2
	movq	%rax, %rbx
	.p2align	4, 0x90
LBB0_7:                                 ##   Parent Loop BB0_5 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movl	(%rbx), %r15d
	movl	%r15d, %edi
	callq	_cdv_intel_dp_link_clock
	movq	%rax, %rdi
	movl	%r12d, %esi
	callq	_cdv_intel_dp_max_data_rate
	movl	%eax, %r13d
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_cdv_intel_dp_link_required
	cmpl	%r13d, %eax
	jle	LBB0_8
## %bb.6:                               ##   in Loop: Header=BB0_7 Depth=2
	addq	$-4, %rbx
	decq	%r14
	jg	LBB0_7
## %bb.9:                               ##   in Loop: Header=BB0_5 Depth=1
	addl	%r12d, %r12d
	movl	-60(%rbp), %ebx                 ## 4-byte Reload
	cmpl	%ebx, %r12d
	movq	-96(%rbp), %r14                 ## 8-byte Reload
	movq	-88(%rbp), %rax                 ## 8-byte Reload
	jle	LBB0_5
LBB0_10:
	movq	-104(%rbp), %rdi                ## 8-byte Reload
	callq	_is_edp
	testq	%rax, %rax
	je	LBB0_11
## %bb.12:
	xorl	%eax, %eax
	cmpq	$128, -80(%rbp)                 ## 8-byte Folded Reload
	sete	%al
	movq	-72(%rbp), %r14                 ## 8-byte Reload
	movl	%ebx, 4(%r14)
	leaq	_cdv_intel_dp_mode_fixup.bws(%rip), %rcx
	movl	(%rcx,%rax,4), %edi
	movl	%edi, (%r14)
	callq	_cdv_intel_dp_link_clock
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movl	%eax, (%rcx)
	movl	(%r14), %esi
	movl	4(%r14), %edx
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_13
LBB0_8:
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	movl	%r15d, (%rbx)
	movl	%r12d, 4(%rbx)
	movl	%r15d, %edi
	callq	_cdv_intel_dp_link_clock
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movl	%eax, (%rcx)
	movl	(%rbx), %esi
	movl	4(%rbx), %edx
	leaq	L_.str(%rip), %rdi
LBB0_13:
	movl	%eax, %ecx
	callq	_DRM_DEBUG_KMS
	movl	$1, %eax
LBB0_14:
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_11:
	xorl	%eax, %eax
	jmp	LBB0_14
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	2                               ## @cdv_intel_dp_mode_fixup.bws
_cdv_intel_dp_mode_fixup.bws:
	.long	129                             ## 0x81
	.long	128                             ## 0x80

	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Display port link bw %02x lane count %d clock %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"Force picking display port link bw %02x lane count %d clock %d\n"

	.no_dead_strip	_cdv_intel_dp_mode_fixup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cdv_intel_dp_mode_fixup
_cdv_intel_dp_mode_fixup:               ; @cdv_intel_dp_mode_fixup
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x2
	mov	x23, x1
	ldr	x8, [x0]
	ldr	x24, [x8]
	bl	_to_gma_encoder
	mov	x21, x0
	ldr	x28, [x0]
	bl	_cdv_intel_dp_max_lane_count
	mov	x20, x0
	mov	x0, x21
	bl	_cdv_intel_dp_max_link_bw
	mov	x22, x0
	ldr	w23, [x23]
	mov	x0, x21
	bl	_is_edp
	cbz	x0, LBB0_3
; %bb.1:
	ldr	x0, [x28, #8]
	cbz	x0, LBB0_3
; %bb.2:
	mov	x1, x19
	bl	_cdv_intel_fixed_panel_mode
	ldr	x8, [x28, #8]
	ldr	w23, [x8]
	ldr	w24, [x24]
	cmp	w20, #1
	b.ge	LBB0_4
	b	LBB0_11
LBB0_3:
	mov	w24, #24
	cmp	w20, #1
	b.lt	LBB0_11
LBB0_4:
	cmp	x22, #128
	cset	w8, eq
Lloh0:
	adrp	x9, _cdv_intel_dp_mode_fixup.bws@PAGE
Lloh1:
	add	x9, x9, _cdv_intel_dp_mode_fixup.bws@PAGEOFF
	ldr	w25, [x9, w8, uxtw #2]
	mov	w26, #1
	b	LBB0_6
LBB0_5:                                 ;   in Loop: Header=BB0_6 Depth=1
	lsl	w26, w26, #1
	cmp	w26, w20
	b.gt	LBB0_11
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x25
	bl	_cdv_intel_dp_link_clock
	mov	x1, x26
	bl	_cdv_intel_dp_max_data_rate
	mov	x27, x0
	mov	x0, x23
	mov	x1, x24
	bl	_cdv_intel_dp_link_required
	cmp	w0, w27
	b.le	LBB0_10
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	cmp	x22, #128
	b.ne	LBB0_5
; %bb.8:                                ;   in Loop: Header=BB0_6 Depth=1
	mov	w0, #129
	bl	_cdv_intel_dp_link_clock
	mov	x1, x26
	bl	_cdv_intel_dp_max_data_rate
	mov	x27, x0
	mov	x0, x23
	mov	x1, x24
	bl	_cdv_intel_dp_link_required
	cmp	w0, w27
	b.gt	LBB0_5
; %bb.9:
	mov	w25, #129
LBB0_10:
	stp	w25, w26, [x28]
	mov	x0, x25
	bl	_cdv_intel_dp_link_clock
	mov	x3, x0
	str	w3, [x19]
	ldp	w1, w2, [x28]
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_13
LBB0_11:
	mov	x0, x21
	bl	_is_edp
	cbz	x0, LBB0_14
; %bb.12:
	cmp	x22, #128
	cset	w8, eq
Lloh4:
	adrp	x9, _cdv_intel_dp_mode_fixup.bws@PAGE
Lloh5:
	add	x9, x9, _cdv_intel_dp_mode_fixup.bws@PAGEOFF
	ldr	w0, [x9, w8, uxtw #2]
	stp	w0, w20, [x28]
	bl	_cdv_intel_dp_link_clock
	mov	x3, x0
	str	w3, [x19]
	ldp	w1, w2, [x28]
Lloh6:
	adrp	x0, l_.str.1@PAGE
Lloh7:
	add	x0, x0, l_.str.1@PAGEOFF
LBB0_13:
                                        ; kill: def $w3 killed $w3 killed $x3
	bl	_DRM_DEBUG_KMS
	mov	w0, #1
LBB0_14:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @cdv_intel_dp_mode_fixup.bws
_cdv_intel_dp_mode_fixup.bws:
	.long	129                             ; 0x81
	.long	128                             ; 0x80

	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Display port link bw %02x lane count %d clock %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"Force picking display port link bw %02x lane count %d clock %d\n"

	.no_dead_strip	_cdv_intel_dp_mode_fixup
.subsections_via_symbols
