	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_clock_read_integrated_info
_dce_clock_read_integrated_info:        ## @dce_clock_read_integrated_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	16(%rdi), %rax
	movq	(%rax), %r14
	movq	8(%rax), %r15
	movq	$0, -40(%rbp)
	movq	(%r14), %rax
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movl	(%rax), %ecx
	movq	8(%rax), %rbx
	movl	%ecx, (%r12)
	testl	%ecx, %ecx
	jne	LBB0_4
	jmp	LBB0_3
LBB0_1:
	movl	$0, (%r12)
	xorl	%ebx, %ebx
LBB0_3:
	movq	8(%r14), %rax
	leaq	-40(%rbp), %rsi
	movq	%r14, %rdi
	callq	*(%rax)
	movl	-40(%rbp), %eax
	testl	%eax, %eax
	movl	$3600000, %ecx                  ## imm = 0x36EE80
	cmovnel	%eax, %ecx
	movl	%ecx, (%r12)
LBB0_4:
	movq	_NUMBER_OF_DISP_CLK_VOLTAGE@GOTPCREL(%rip), %r8
	movl	(%r8), %edx
	testl	%edx, %edx
	jle	LBB0_11
## %bb.5:
	leaq	l_switch.table.dce_clock_read_integrated_info(%rip), %rcx
	xorl	%esi, %esi
	movq	_DM_PP_CLOCKS_STATE_INVALID@GOTPCREL(%rip), %r9
	jmp	LBB0_6
	.p2align	4, 0x90
LBB0_10:                                ##   in Loop: Header=BB0_6 Depth=1
	incq	%rsi
	movslq	%edx, %rax
	addq	$8, %rcx
	cmpq	%rax, %rsi
	jge	LBB0_11
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r9, %rdi
	testl	$-4, %esi
	jne	LBB0_8
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=1
	movq	(%rcx), %rdi
LBB0_8:                                 ##   in Loop: Header=BB0_6 Depth=1
	movl	(%rbx,%rsi,4), %eax
	cmpl	$100000, %eax                   ## imm = 0x186A0
	jl	LBB0_10
## %bb.9:                               ##   in Loop: Header=BB0_6 Depth=1
	movl	(%rdi), %edx
	movq	8(%r12), %rdi
	movl	%eax, (%rdi,%rdx,4)
	movl	(%r8), %edx
	jmp	LBB0_10
LBB0_11:
	cmpl	$0, (%r15)
	jne	LBB0_15
## %bb.12:
	movq	(%r14), %rax
	testq	%rax, %rax
	je	LBB0_15
## %bb.13:
	movq	_DFS_BYPASS_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, 4(%rax)
	je	LBB0_15
## %bb.14:
	movl	$1, 4(%r12)
LBB0_15:
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NUMBER_OF_DISP_CLK_VOLTAGE,4,2 ## @NUMBER_OF_DISP_CLK_VOLTAGE
	.comm	_DM_PP_CLOCKS_STATE_INVALID,4,2 ## @DM_PP_CLOCKS_STATE_INVALID
	.comm	_DM_PP_CLOCKS_STATE_ULTRA_LOW,4,2 ## @DM_PP_CLOCKS_STATE_ULTRA_LOW
	.comm	_DM_PP_CLOCKS_STATE_LOW,4,2     ## @DM_PP_CLOCKS_STATE_LOW
	.comm	_DM_PP_CLOCKS_STATE_NOMINAL,4,2 ## @DM_PP_CLOCKS_STATE_NOMINAL
	.comm	_DM_PP_CLOCKS_STATE_PERFORMANCE,4,2 ## @DM_PP_CLOCKS_STATE_PERFORMANCE
	.comm	_DFS_BYPASS_ENABLE,4,2          ## @DFS_BYPASS_ENABLE
	.no_dead_strip	_dce_clock_read_integrated_info
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.dce_clock_read_integrated_info
l_switch.table.dce_clock_read_integrated_info:
	.quad	_DM_PP_CLOCKS_STATE_ULTRA_LOW
	.quad	_DM_PP_CLOCKS_STATE_LOW
	.quad	_DM_PP_CLOCKS_STATE_NOMINAL
	.quad	_DM_PP_CLOCKS_STATE_PERFORMANCE

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_clock_read_integrated_info
_dce_clock_read_integrated_info:        ; @dce_clock_read_integrated_info
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0, #16]
	ldp	x20, x21, [x8]
	str	xzr, [sp, #8]
	ldr	x8, [x20]
	cbz	x8, LBB0_2
; %bb.1:
	ldr	w9, [x8]
	ldr	x22, [x8, #8]
	str	w9, [x19]
	cbnz	w9, LBB0_4
	b	LBB0_3
LBB0_2:
	mov	x22, #0
	str	wzr, [x19]
LBB0_3:
	ldr	x8, [x20, #8]
	ldr	x8, [x8]
	add	x1, sp, #8
	mov	x0, x20
	blr	x8
	ldr	w8, [sp, #8]
	mov	w9, #61056
	movk	w9, #54, lsl #16
	cmp	w8, #0
	csel	w8, w9, w8, eq
	str	w8, [x19]
LBB0_4:
Lloh0:
	adrp	x8, _NUMBER_OF_DISP_CLK_VOLTAGE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NUMBER_OF_DISP_CLK_VOLTAGE@GOTPAGEOFF]
	ldr	w10, [x8]
	cmp	w10, #1
	b.lt	LBB0_11
; %bb.5:
	mov	x9, #0
Lloh2:
	adrp	x11, _DM_PP_CLOCKS_STATE_INVALID@GOTPAGE
Lloh3:
	ldr	x11, [x11, _DM_PP_CLOCKS_STATE_INVALID@GOTPAGEOFF]
	mov	w12, #34464
	movk	w12, #1, lsl #16
Lloh4:
	adrp	x13, l_switch.table.dce_clock_read_integrated_info@PAGE
Lloh5:
	add	x13, x13, l_switch.table.dce_clock_read_integrated_info@PAGEOFF
	b	LBB0_7
LBB0_6:                                 ;   in Loop: Header=BB0_7 Depth=1
	add	x9, x9, #1
	cmp	x9, w10, sxtw
	b.ge	LBB0_11
LBB0_7:                                 ; =>This Inner Loop Header: Depth=1
	mov	x14, x11
	tst	x9, #0xfffffffc
	b.ne	LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	ldr	x14, [x13, x9, lsl #3]
LBB0_9:                                 ;   in Loop: Header=BB0_7 Depth=1
	ldr	w15, [x22, x9, lsl #2]
	cmp	w15, w12
	b.lt	LBB0_6
; %bb.10:                               ;   in Loop: Header=BB0_7 Depth=1
	ldr	w10, [x14]
	ldr	x14, [x19, #8]
	str	w15, [x14, x10, lsl #2]
	ldr	w10, [x8]
	b	LBB0_6
LBB0_11:
	ldr	w8, [x21]
	cbnz	w8, LBB0_15
; %bb.12:
	ldr	x8, [x20]
	cbz	x8, LBB0_15
; %bb.13:
	ldr	w8, [x8, #4]
Lloh6:
	adrp	x9, _DFS_BYPASS_ENABLE@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DFS_BYPASS_ENABLE@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_15
; %bb.14:
	mov	w8, #1
	str	w8, [x19, #4]
LBB0_15:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_NUMBER_OF_DISP_CLK_VOLTAGE,4,2 ; @NUMBER_OF_DISP_CLK_VOLTAGE
	.comm	_DM_PP_CLOCKS_STATE_INVALID,4,2 ; @DM_PP_CLOCKS_STATE_INVALID
	.comm	_DM_PP_CLOCKS_STATE_ULTRA_LOW,4,2 ; @DM_PP_CLOCKS_STATE_ULTRA_LOW
	.comm	_DM_PP_CLOCKS_STATE_LOW,4,2     ; @DM_PP_CLOCKS_STATE_LOW
	.comm	_DM_PP_CLOCKS_STATE_NOMINAL,4,2 ; @DM_PP_CLOCKS_STATE_NOMINAL
	.comm	_DM_PP_CLOCKS_STATE_PERFORMANCE,4,2 ; @DM_PP_CLOCKS_STATE_PERFORMANCE
	.comm	_DFS_BYPASS_ENABLE,4,2          ; @DFS_BYPASS_ENABLE
	.no_dead_strip	_dce_clock_read_integrated_info
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.dce_clock_read_integrated_info
l_switch.table.dce_clock_read_integrated_info:
	.quad	_DM_PP_CLOCKS_STATE_ULTRA_LOW
	.quad	_DM_PP_CLOCKS_STATE_LOW
	.quad	_DM_PP_CLOCKS_STATE_NOMINAL
	.quad	_DM_PP_CLOCKS_STATE_PERFORMANCE

.subsections_via_symbols
