	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rv6xx_program_mclk_stepping_entry
_rv6xx_program_mclk_stepping_entry:     ## @rv6xx_program_mclk_stepping_entry
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %r15
	movq	_COMPUTE_MEMORY_PLL_PARAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%ebx, %ebx
	leaq	-48(%rbp), %r8
	xorl	%ecx, %ecx
	callq	_radeon_atom_get_clock_dividers
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_5
LBB0_2:
	movl	-32(%rbp), %edx
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_rv6xx_memory_clock_entry_set_reference_divider
	movl	-36(%rbp), %edx
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_rv6xx_memory_clock_entry_set_feedback_divider
	movl	-40(%rbp), %edx
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_rv6xx_memory_clock_entry_set_post_divider
	cmpq	$0, -48(%rbp)
	je	LBB0_4
## %bb.3:
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	$1, %edx
	callq	_rv6xx_memory_clock_entry_enable_post_divider
	xorl	%ebx, %ebx
	jmp	LBB0_5
LBB0_4:
	xorl	%ebx, %ebx
	movq	%r15, %rdi
	movl	%r14d, %esi
	xorl	%edx, %edx
	callq	_rv6xx_memory_clock_entry_enable_post_divider
LBB0_5:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_COMPUTE_MEMORY_PLL_PARAM,4,2   ## @COMPUTE_MEMORY_PLL_PARAM
	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_rv6xx_program_mclk_stepping_entry
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rv6xx_program_mclk_stepping_entry
_rv6xx_program_mclk_stepping_entry:     ; @rv6xx_program_mclk_stepping_entry
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _COMPUTE_MEMORY_PLL_PARAM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _COMPUTE_MEMORY_PLL_PARAM@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x4, sp, #8
	mov	w3, #0
	bl	_radeon_atom_get_clock_dividers
	cbz	x0, LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _EINVAL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_6
LBB0_2:
	ldr	w2, [sp, #24]
	mov	x0, x20
	mov	x1, x19
	bl	_rv6xx_memory_clock_entry_set_reference_divider
	ldr	w2, [sp, #20]
	mov	x0, x20
	mov	x1, x19
	bl	_rv6xx_memory_clock_entry_set_feedback_divider
	ldr	w2, [sp, #16]
	mov	x0, x20
	mov	x1, x19
	bl	_rv6xx_memory_clock_entry_set_post_divider
	ldr	x8, [sp, #8]
	cbz	x8, LBB0_4
; %bb.3:
	mov	x0, x20
	mov	x1, x19
	mov	w2, #1
	b	LBB0_5
LBB0_4:
	mov	x0, x20
	mov	x1, x19
	mov	w2, #0
LBB0_5:
	bl	_rv6xx_memory_clock_entry_enable_post_divider
	mov	w0, #0
LBB0_6:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_COMPUTE_MEMORY_PLL_PARAM,4,2   ; @COMPUTE_MEMORY_PLL_PARAM
	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_rv6xx_program_mclk_stepping_entry
.subsections_via_symbols
