	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function msic_bus_sync_unlock
_msic_bus_sync_unlock:                  ## @msic_bus_sync_unlock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	callq	_irq_data_get_irq_chip_data
	movq	%rax, %rbx
	movq	8(%rax), %rdi
	testq	%rdi, %rdi
	je	LBB0_7
## %bb.1:
	callq	___ffs
	movl	%eax, %edi
	callq	_msic_gpio_to_ireg
	testl	%eax, %eax
	js	LBB0_7
## %bb.2:
	movl	(%rbx), %esi
	movq	_IRQ_TYPE_EDGE_RISING@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%esi, %ecx
	je	LBB0_4
## %bb.3:
	movq	_MSIC_GPIO_TRIG_RISE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_4:
	movq	_IRQ_TYPE_EDGE_FALLING@GOTPCREL(%rip), %rdx
	andl	(%rdx), %esi
	je	LBB0_6
## %bb.5:
	movq	_MSIC_GPIO_TRIG_FALL@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
LBB0_6:
	orl	%ecx, %esi
	movq	_MSIC_GPIO_INTCNT_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	callq	_intel_msic_reg_update
	movq	$0, 8(%rbx)
LBB0_7:
	addq	$4, %rbx
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_mutex_unlock                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_IRQ_TYPE_EDGE_RISING,4,2       ## @IRQ_TYPE_EDGE_RISING
	.comm	_MSIC_GPIO_TRIG_RISE,4,2        ## @MSIC_GPIO_TRIG_RISE
	.comm	_IRQ_TYPE_EDGE_FALLING,4,2      ## @IRQ_TYPE_EDGE_FALLING
	.comm	_MSIC_GPIO_TRIG_FALL,4,2        ## @MSIC_GPIO_TRIG_FALL
	.comm	_MSIC_GPIO_INTCNT_MASK,4,2      ## @MSIC_GPIO_INTCNT_MASK
	.no_dead_strip	_msic_bus_sync_unlock
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function msic_bus_sync_unlock
_msic_bus_sync_unlock:                  ; @msic_bus_sync_unlock
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_irq_data_get_irq_chip_data
	mov	x19, x0
	ldr	x0, [x0, #8]
	cbz	x0, LBB0_3
; %bb.1:
	bl	___ffs
	bl	_msic_gpio_to_ireg
	tbnz	w0, #31, LBB0_3
; %bb.2:
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _IRQ_TYPE_EDGE_RISING@GOTPAGE
Lloh1:
	ldr	x9, [x9, _IRQ_TYPE_EDGE_RISING@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
Lloh3:
	adrp	x10, _MSIC_GPIO_TRIG_RISE@GOTPAGE
Lloh4:
	ldr	x10, [x10, _MSIC_GPIO_TRIG_RISE@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	tst	w9, w8
	csel	w9, wzr, w10, eq
Lloh6:
	adrp	x10, _IRQ_TYPE_EDGE_FALLING@GOTPAGE
Lloh7:
	ldr	x10, [x10, _IRQ_TYPE_EDGE_FALLING@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
Lloh9:
	adrp	x11, _MSIC_GPIO_TRIG_FALL@GOTPAGE
Lloh10:
	ldr	x11, [x11, _MSIC_GPIO_TRIG_FALL@GOTPAGEOFF]
Lloh11:
	ldr	w11, [x11]
	tst	w10, w8
	csel	w8, wzr, w11, eq
	orr	w1, w8, w9
Lloh12:
	adrp	x8, _MSIC_GPIO_INTCNT_MASK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MSIC_GPIO_INTCNT_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	bl	_intel_msic_reg_update
	str	xzr, [x19, #8]
LBB0_3:
	add	x0, x19, #4
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_mutex_unlock
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_IRQ_TYPE_EDGE_RISING,4,2       ; @IRQ_TYPE_EDGE_RISING
	.comm	_MSIC_GPIO_TRIG_RISE,4,2        ; @MSIC_GPIO_TRIG_RISE
	.comm	_IRQ_TYPE_EDGE_FALLING,4,2      ; @IRQ_TYPE_EDGE_FALLING
	.comm	_MSIC_GPIO_TRIG_FALL,4,2        ; @MSIC_GPIO_TRIG_FALL
	.comm	_MSIC_GPIO_INTCNT_MASK,4,2      ; @MSIC_GPIO_INTCNT_MASK
	.no_dead_strip	_msic_bus_sync_unlock
.subsections_via_symbols
