	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_mc_resume                 ## -- Begin function r100_mc_resume
	.p2align	4, 0x90
_r100_mc_resume:                        ## @r100_mc_resume
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	_R_00023C_DISPLAY_BASE_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	4(%rbx), %esi
	callq	_WREG32
	movq	_RADEON_SINGLE_CRTC@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	testl	%eax, (%rbx)
	jne	LBB0_2
## %bb.1:
	movq	_R_00033C_CRTC2_DISPLAY_BASE_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	4(%rbx), %esi
	callq	_WREG32
LBB0_2:
	movq	_R_0003C2_GENMO_WT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	12(%r14), %esi
	callq	_WREG8
	movq	_R_000054_CRTC_EXT_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	8(%r14), %esi
	callq	_WREG32
	movq	_R_000050_CRTC_GEN_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	4(%r14), %esi
	callq	_WREG32
	movl	(%r15), %eax
	testl	%eax, (%rbx)
	je	LBB0_4
## %bb.3:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	_R_0003F8_CRTC2_GEN_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r14), %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_R_00023C_DISPLAY_BASE_ADDR,4,2 ## @R_00023C_DISPLAY_BASE_ADDR
	.comm	_RADEON_SINGLE_CRTC,4,2         ## @RADEON_SINGLE_CRTC
	.comm	_R_00033C_CRTC2_DISPLAY_BASE_ADDR,4,2 ## @R_00033C_CRTC2_DISPLAY_BASE_ADDR
	.comm	_R_0003C2_GENMO_WT,4,2          ## @R_0003C2_GENMO_WT
	.comm	_R_000054_CRTC_EXT_CNTL,4,2     ## @R_000054_CRTC_EXT_CNTL
	.comm	_R_000050_CRTC_GEN_CNTL,4,2     ## @R_000050_CRTC_GEN_CNTL
	.comm	_R_0003F8_CRTC2_GEN_CNTL,4,2    ## @R_0003F8_CRTC2_GEN_CNTL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_mc_resume                 ; -- Begin function r100_mc_resume
	.p2align	2
_r100_mc_resume:                        ; @r100_mc_resume
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _R_00023C_DISPLAY_BASE_ADDR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _R_00023C_DISPLAY_BASE_ADDR@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	ldr	w1, [x20, #4]
	bl	_WREG32
	ldr	w8, [x20]
Lloh3:
	adrp	x21, _RADEON_SINGLE_CRTC@GOTPAGE
Lloh4:
	ldr	x21, [x21, _RADEON_SINGLE_CRTC@GOTPAGEOFF]
	ldr	w9, [x21]
	tst	w9, w8
	b.ne	LBB0_2
; %bb.1:
Lloh5:
	adrp	x8, _R_00033C_CRTC2_DISPLAY_BASE_ADDR@GOTPAGE
Lloh6:
	ldr	x8, [x8, _R_00033C_CRTC2_DISPLAY_BASE_ADDR@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	ldr	w1, [x20, #4]
	bl	_WREG32
LBB0_2:
Lloh8:
	adrp	x8, _R_0003C2_GENMO_WT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _R_0003C2_GENMO_WT@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	ldr	w1, [x19, #12]
	bl	_WREG8
Lloh11:
	adrp	x8, _R_000054_CRTC_EXT_CNTL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _R_000054_CRTC_EXT_CNTL@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	ldr	w1, [x19, #8]
	bl	_WREG32
Lloh14:
	adrp	x8, _R_000050_CRTC_GEN_CNTL@GOTPAGE
Lloh15:
	ldr	x8, [x8, _R_000050_CRTC_GEN_CNTL@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	ldr	w1, [x19, #4]
	bl	_WREG32
	ldr	w8, [x20]
	ldr	w9, [x21]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_4:
Lloh17:
	adrp	x8, _R_0003F8_CRTC2_GEN_CNTL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _R_0003F8_CRTC2_GEN_CNTL@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x8]
	ldr	w1, [x19]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_R_00023C_DISPLAY_BASE_ADDR,4,2 ; @R_00023C_DISPLAY_BASE_ADDR
	.comm	_RADEON_SINGLE_CRTC,4,2         ; @RADEON_SINGLE_CRTC
	.comm	_R_00033C_CRTC2_DISPLAY_BASE_ADDR,4,2 ; @R_00033C_CRTC2_DISPLAY_BASE_ADDR
	.comm	_R_0003C2_GENMO_WT,4,2          ; @R_0003C2_GENMO_WT
	.comm	_R_000054_CRTC_EXT_CNTL,4,2     ; @R_000054_CRTC_EXT_CNTL
	.comm	_R_000050_CRTC_GEN_CNTL,4,2     ; @R_000050_CRTC_GEN_CNTL
	.comm	_R_0003F8_CRTC2_GEN_CNTL,4,2    ; @R_0003F8_CRTC2_GEN_CNTL
.subsections_via_symbols
