	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_dcn2_update_clocks             ## -- Begin function dcn2_update_clocks
	.p2align	4, 0x90
_dcn2_update_clocks:                    ## @dcn2_update_clocks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r12d
	movq	%rsi, %r15
	movq	%rdi, %rbx
	callq	_TO_CLK_MGR_INTERNAL
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	40(%rbx), %rax
	movq	(%rax), %r13
	cmpq	$0, 24(%r13)
	jne	LBB0_49
## %bb.1:
	movq	%r13, %rdi
	movq	%r15, %rsi
	callq	_clk_mgr_helper_get_active_display_cnt
	movq	16(%r13), %rcx
	movq	(%rcx), %r14
	xorl	%ecx, %ecx
	testl	%eax, %eax
	sete	%cl
	cmpl	%r12d, %ecx
	jne	LBB0_5
## %bb.2:
	testq	%r14, %r14
	je	LBB0_5
## %bb.3:
	movq	56(%r14), %rcx
	testq	%rcx, %rcx
	je	LBB0_5
## %bb.4:
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	*%rcx
LBB0_5:
	movl	8(%r15), %esi
	movl	4(%rbx), %edx
	movl	%r12d, %edi
	callq	_should_set_clock
	testq	%rax, %rax
	je	LBB0_9
## %bb.6:
	movl	8(%r15), %ecx
	movl	%ecx, 4(%rbx)
	testq	%r14, %r14
	je	LBB0_9
## %bb.7:
	movq	48(%r14), %rax
	testq	%rax, %rax
	je	LBB0_9
## %bb.8:
	movq	_PP_SMU_NV_PHYCLK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	movslq	%ecx, %rcx
	imulq	$274877907, %rcx, %rdx          ## imm = 0x10624DD3
	movq	%rdx, %rcx
	shrq	$63, %rcx
	sarq	$38, %rdx
	addl	%ecx, %edx
	movq	%r14, %rdi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	*%rax
LBB0_9:
	movl	8(%r13), %eax
	movl	12(%r15), %esi
	testl	%eax, %eax
	jle	LBB0_11
## %bb.10:
	imull	$1000, %eax, %eax               ## imm = 0x3E8
	cmpl	%eax, %esi
	cmovlel	%eax, %esi
	movl	%esi, 12(%r15)
LBB0_11:
	movl	8(%rbx), %edx
	movl	%r12d, %edi
	callq	_should_set_clock
	testq	%rax, %rax
	je	LBB0_15
## %bb.12:
	movl	12(%r15), %ecx
	movl	%ecx, 8(%rbx)
	testq	%r14, %r14
	je	LBB0_15
## %bb.13:
	movq	40(%r14), %rax
	testq	%rax, %rax
	je	LBB0_15
## %bb.14:
	movslq	%ecx, %rcx
	imulq	$274877907, %rcx, %rsi          ## imm = 0x10624DD3
	movq	%rsi, %rcx
	shrq	$63, %rcx
	sarq	$38, %rsi
	addl	%ecx, %esi
	movq	%r14, %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	*%rax
LBB0_15:
	movl	16(%r15), %esi
	movl	12(%rbx), %edx
	movl	%r12d, %edi
	callq	_should_set_clock
	testq	%rax, %rax
	je	LBB0_19
## %bb.16:
	movl	16(%r15), %ecx
	movl	%ecx, 12(%rbx)
	testq	%r14, %r14
	je	LBB0_19
## %bb.17:
	movq	32(%r14), %rax
	testq	%rax, %rax
	je	LBB0_19
## %bb.18:
	movslq	%ecx, %rcx
	imulq	$274877907, %rcx, %rsi          ## imm = 0x10624DD3
	movq	%rsi, %rcx
	shrq	$63, %rcx
	sarq	$38, %rsi
	addl	%ecx, %esi
	movq	%r14, %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	*%rax
LBB0_19:
	movl	20(%r15), %esi
	movl	16(%rbx), %edx
	movl	%r12d, %edi
	callq	_should_set_clock
	testq	%rax, %rax
	je	LBB0_23
## %bb.20:
	movl	20(%r15), %ecx
	movl	%ecx, 16(%rbx)
	testq	%r14, %r14
	je	LBB0_23
## %bb.21:
	movq	24(%r14), %rax
	testq	%rax, %rax
	je	LBB0_23
## %bb.22:
	movslq	%ecx, %rcx
	imulq	$274877907, %rcx, %rsi          ## imm = 0x10624DD3
	movq	%rsi, %rcx
	shrq	$63, %rcx
	sarq	$38, %rsi
	addl	%ecx, %esi
	movq	%r14, %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	*%rax
LBB0_23:
	movl	40(%r15), %esi
	movl	32(%rbx), %edx
	movl	%r12d, %edi
	callq	_should_update_pstate_support
	testq	%rax, %rax
	je	LBB0_27
## %bb.24:
	movl	32(%rbx), %eax
	movl	%eax, 36(%rbx)
	movl	40(%r15), %esi
	movl	%esi, 32(%rbx)
	testq	%r14, %r14
	je	LBB0_27
## %bb.25:
	movq	16(%r14), %rax
	testq	%rax, %rax
	je	LBB0_27
## %bb.26:
	movq	%r14, %rdi
	callq	*%rax
LBB0_27:
	movl	20(%rbx), %edx
	movl	32(%rbx), %eax
	movl	%eax, 36(%rbx)
	movl	24(%r15), %esi
	movl	%r12d, %edi
	callq	_should_set_clock
	testq	%rax, %rax
	je	LBB0_31
## %bb.28:
	movl	24(%r15), %ecx
	movl	%ecx, 20(%rbx)
	testq	%r14, %r14
	je	LBB0_31
## %bb.29:
	movq	8(%r14), %rax
	testq	%rax, %rax
	je	LBB0_31
## %bb.30:
	movslq	%ecx, %rcx
	imulq	$274877907, %rcx, %rsi          ## imm = 0x10624DD3
	movq	%rsi, %rcx
	shrq	$63, %rcx
	sarq	$38, %rsi
	addl	%ecx, %esi
	movq	%r14, %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	*%rax
LBB0_31:
	cmpl	$0, (%r13)
	je	LBB0_32
LBB0_49:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_32:
	movl	28(%r15), %esi
	movl	(%rbx), %edx
	movl	%r12d, %edi
	callq	_should_set_clock
	testq	%rax, %rax
	je	LBB0_34
## %bb.33:
	movl	28(%r15), %esi
	movq	%rbx, %rdi
	callq	_request_voltage_and_program_disp_clk
LBB0_34:
	movq	32(%r15), %rsi
	movq	24(%rbx), %rax
	testl	%r12d, %r12d
	je	LBB0_35
## %bb.42:
	cmpq	%rax, %rsi
	jge	LBB0_44
## %bb.43:
	movq	%rbx, %rdi
	callq	_request_voltage_and_program_global_dpp_clk
LBB0_44:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	8(%rax), %rax
	movq	(%rax), %rcx
	movq	(%rcx), %rcx
	cmpl	$0, (%rcx)
	jle	LBB0_49
## %bb.45:
	movl	$16, %ebx
	xorl	%r14d, %r14d
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	jmp	LBB0_46
	.p2align	4, 0x90
LBB0_48:                                ##   in Loop: Header=BB0_46 Depth=1
	incq	%r14
	movq	(%rax), %rcx
	movq	(%rcx), %rcx
	movslq	(%rcx), %rcx
	addq	$24, %rbx
	cmpq	%rcx, %r14
	jge	LBB0_49
LBB0_46:                                ## =>This Inner Loop Header: Depth=1
	movq	(%r15), %rcx
	cmpl	$0, (%rcx,%rbx)
	je	LBB0_48
## %bb.47:                              ##   in Loop: Header=BB0_46 Depth=1
	movq	-8(%rcx,%rbx), %rax
	movl	(%rax), %esi
	movl	-16(%rcx,%rbx), %edx
	movq	(%r12), %rdi
	movq	(%rdi), %rax
	xorl	%ecx, %ecx
	callq	*(%rax)
	movq	8(%r12), %rax
	jmp	LBB0_48
LBB0_35:
	cmpq	%rax, %rsi
	jle	LBB0_37
## %bb.36:
	movq	%rbx, %rdi
	callq	_request_voltage_and_program_global_dpp_clk
LBB0_37:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	8(%rax), %rax
	movq	(%rax), %rcx
	movq	(%rcx), %rcx
	cmpl	$0, (%rcx)
	jle	LBB0_49
## %bb.38:
	movl	$16, %ebx
	xorl	%r14d, %r14d
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	jmp	LBB0_39
	.p2align	4, 0x90
LBB0_41:                                ##   in Loop: Header=BB0_39 Depth=1
	incq	%r14
	movq	(%rax), %rcx
	movq	(%rcx), %rcx
	movslq	(%rcx), %rcx
	addq	$24, %rbx
	cmpq	%rcx, %r14
	jge	LBB0_49
LBB0_39:                                ## =>This Inner Loop Header: Depth=1
	movq	(%r15), %rcx
	cmpl	$0, (%rcx,%rbx)
	je	LBB0_41
## %bb.40:                              ##   in Loop: Header=BB0_39 Depth=1
	movq	-8(%rcx,%rbx), %rax
	movl	(%rax), %esi
	movl	-16(%rcx,%rbx), %edx
	movq	(%r12), %rdi
	movq	(%rdi), %rax
	movl	$1, %ecx
	callq	*(%rax)
	movq	8(%r12), %rax
	jmp	LBB0_41
	.cfi_endproc
                                        ## -- End function
	.comm	_PP_SMU_NV_PHYCLK,4,2           ## @PP_SMU_NV_PHYCLK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_dcn2_update_clocks             ; -- Begin function dcn2_update_clocks
	.p2align	2
_dcn2_update_clocks:                    ; @dcn2_update_clocks
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x2
	mov	x19, x1
	mov	x21, x0
	bl	_TO_CLK_MGR_INTERNAL
	ldr	x8, [x21, #40]
	ldr	x23, [x8]
	ldr	x8, [x23, #24]
	cbnz	x8, LBB0_31
; %bb.1:
	mov	x20, x0
	mov	x0, x23
	mov	x1, x19
	bl	_clk_mgr_helper_get_active_display_cnt
	ldr	x8, [x23, #16]
	ldr	x24, [x8]
	cmp	w0, #0
	cset	w8, eq
	cmp	w8, w22
	ccmp	x24, #0, #4, eq
	b.eq	LBB0_4
; %bb.2:
	ldr	x8, [x24, #56]
	cbz	x8, LBB0_4
; %bb.3:
	mov	x1, x0
	mov	x0, x24
	blr	x8
LBB0_4:
	ldr	w1, [x19, #8]
	ldr	w2, [x21, #4]
	mov	x0, x22
	bl	_should_set_clock
	cbz	x0, LBB0_8
; %bb.5:
	ldr	w9, [x19, #8]
	str	w9, [x21, #4]
	cbz	x24, LBB0_8
; %bb.6:
	ldr	x8, [x24, #48]
	cbz	x8, LBB0_8
; %bb.7:
Lloh0:
	adrp	x10, _PP_SMU_NV_PHYCLK@GOTPAGE
Lloh1:
	ldr	x10, [x10, _PP_SMU_NV_PHYCLK@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x10]
	mov	w10, #19923
	movk	w10, #4194, lsl #16
	smull	x9, w9, w10
	lsr	x10, x9, #63
	asr	x9, x9, #38
	add	w2, w9, w10
	mov	x0, x24
	blr	x8
LBB0_8:
	ldr	w8, [x23, #8]
	ldr	w1, [x19, #12]
	cmp	w8, #1
	b.lt	LBB0_10
; %bb.9:
	mov	w9, #1000
	mul	w8, w8, w9
	cmp	w1, w8
	csel	w1, w1, w8, gt
	str	w1, [x19, #12]
LBB0_10:
	ldr	w2, [x21, #8]
	mov	x0, x22
	bl	_should_set_clock
	cbz	x0, LBB0_14
; %bb.11:
	ldr	w9, [x19, #12]
	str	w9, [x21, #8]
	cbz	x24, LBB0_14
; %bb.12:
	ldr	x8, [x24, #40]
	cbz	x8, LBB0_14
; %bb.13:
	mov	w10, #19923
	movk	w10, #4194, lsl #16
	smull	x9, w9, w10
	lsr	x10, x9, #63
	asr	x9, x9, #38
	add	w1, w9, w10
	mov	x0, x24
	blr	x8
LBB0_14:
	ldr	w1, [x19, #16]
	ldr	w2, [x21, #12]
	mov	x0, x22
	bl	_should_set_clock
	cbz	x0, LBB0_18
; %bb.15:
	ldr	w9, [x19, #16]
	str	w9, [x21, #12]
	cbz	x24, LBB0_18
; %bb.16:
	ldr	x8, [x24, #32]
	cbz	x8, LBB0_18
; %bb.17:
	mov	w10, #19923
	movk	w10, #4194, lsl #16
	smull	x9, w9, w10
	lsr	x10, x9, #63
	asr	x9, x9, #38
	add	w1, w9, w10
	mov	x0, x24
	blr	x8
LBB0_18:
	ldr	w1, [x19, #20]
	ldr	w2, [x21, #16]
	mov	x0, x22
	bl	_should_set_clock
	cbz	x0, LBB0_22
; %bb.19:
	ldr	w9, [x19, #20]
	str	w9, [x21, #16]
	cbz	x24, LBB0_22
; %bb.20:
	ldr	x8, [x24, #24]
	cbz	x8, LBB0_22
; %bb.21:
	mov	w10, #19923
	movk	w10, #4194, lsl #16
	smull	x9, w9, w10
	lsr	x10, x9, #63
	asr	x9, x9, #38
	add	w1, w9, w10
	mov	x0, x24
	blr	x8
LBB0_22:
	ldr	w1, [x19, #40]
	ldr	w2, [x21, #32]
	mov	x0, x22
	bl	_should_update_pstate_support
	cbz	x0, LBB0_26
; %bb.23:
	ldr	w8, [x21, #32]
	ldr	w1, [x19, #40]
	stp	w1, w8, [x21, #32]
	cbz	x24, LBB0_26
; %bb.24:
	ldr	x8, [x24, #16]
	cbz	x8, LBB0_26
; %bb.25:
	mov	x0, x24
	blr	x8
LBB0_26:
	ldr	w8, [x21, #32]
	str	w8, [x21, #36]
	ldr	w1, [x19, #24]
	ldr	w2, [x21, #20]
	mov	x0, x22
	bl	_should_set_clock
	cbz	x0, LBB0_30
; %bb.27:
	ldr	w9, [x19, #24]
	str	w9, [x21, #20]
	cbz	x24, LBB0_30
; %bb.28:
	ldr	x8, [x24, #8]
	cbz	x8, LBB0_30
; %bb.29:
	mov	w10, #19923
	movk	w10, #4194, lsl #16
	smull	x9, w9, w10
	lsr	x10, x9, #63
	asr	x9, x9, #38
	add	w1, w9, w10
	mov	x0, x24
	blr	x8
LBB0_30:
	ldr	w8, [x23]
	cbz	w8, LBB0_32
LBB0_31:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_32:
	ldr	w1, [x19, #28]
	ldr	w2, [x21]
	mov	x0, x22
	bl	_should_set_clock
	cbz	x0, LBB0_34
; %bb.33:
	ldr	w1, [x19, #28]
	mov	x0, x21
	bl	_request_voltage_and_program_disp_clk
LBB0_34:
	ldr	x1, [x19, #32]
	ldr	x8, [x21, #24]
	cmp	x1, x8
	cbz	w22, LBB0_42
; %bb.35:
	b.ge	LBB0_37
; %bb.36:
	mov	x0, x21
	bl	_request_voltage_and_program_global_dpp_clk
LBB0_37:
	ldr	x8, [x20, #8]
	ldr	x9, [x8]
	ldr	x9, [x9]
	ldr	w9, [x9]
	cmp	w9, #1
	b.lt	LBB0_31
; %bb.38:
	mov	x21, #0
	mov	x22, #0
	b	LBB0_40
LBB0_39:                                ;   in Loop: Header=BB0_40 Depth=1
	add	x22, x22, #1
	ldr	x9, [x8]
	ldr	x9, [x9]
	ldrsw	x9, [x9]
	add	x21, x21, #24
	cmp	x22, x9
	b.ge	LBB0_31
LBB0_40:                                ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x19]
	add	x9, x9, x21
	ldr	w10, [x9, #16]
	cbz	w10, LBB0_39
; %bb.41:                               ;   in Loop: Header=BB0_40 Depth=1
	ldr	x8, [x9, #8]
	ldr	w1, [x8]
	ldr	w2, [x9]
	ldr	x0, [x20]
	ldr	x8, [x0]
	ldr	x8, [x8]
	mov	w3, #0
	blr	x8
	ldr	x8, [x20, #8]
	b	LBB0_39
LBB0_42:
	b.le	LBB0_44
; %bb.43:
	mov	x0, x21
	bl	_request_voltage_and_program_global_dpp_clk
LBB0_44:
	ldr	x8, [x20, #8]
	ldr	x9, [x8]
	ldr	x9, [x9]
	ldr	w9, [x9]
	cmp	w9, #1
	b.lt	LBB0_31
; %bb.45:
	mov	x21, #0
	mov	x22, #0
	b	LBB0_47
LBB0_46:                                ;   in Loop: Header=BB0_47 Depth=1
	add	x22, x22, #1
	ldr	x9, [x8]
	ldr	x9, [x9]
	ldrsw	x9, [x9]
	add	x21, x21, #24
	cmp	x22, x9
	b.ge	LBB0_31
LBB0_47:                                ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x19]
	add	x9, x9, x21
	ldr	w10, [x9, #16]
	cbz	w10, LBB0_46
; %bb.48:                               ;   in Loop: Header=BB0_47 Depth=1
	ldr	x8, [x9, #8]
	ldr	w1, [x8]
	ldr	w2, [x9]
	ldr	x0, [x20]
	ldr	x8, [x0]
	ldr	x8, [x8]
	mov	w3, #1
	blr	x8
	ldr	x8, [x20, #8]
	b	LBB0_46
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PP_SMU_NV_PHYCLK,4,2           ; @PP_SMU_NV_PHYCLK
.subsections_via_symbols
