	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_dce110_timing_generator_setup_global_swap_lock ## -- Begin function dce110_timing_generator_setup_global_swap_lock
	.p2align	4, 0x90
_dce110_timing_generator_setup_global_swap_lock: ## @dce110_timing_generator_setup_global_swap_lock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r12
	callq	_DCE110TG_FROM_TG
	movq	_mmDCP_GSL_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_DCP_REG
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	4(%r12), %edi
	movl	%eax, %esi
	callq	_dm_read_reg
	movl	%eax, %ebx
	movq	_DCP_GSL_CONTROL@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movq	_DCP_GSL0_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ebx, %edi
	movl	$1, %esi
	callq	_set_reg_field_value
	movl	(%r15), %eax
	xorl	%esi, %esi
	cmpl	(%r12), %eax
	sete	%sil
	movl	(%r14), %edx
	movq	_DCP_GSL_MASTER_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ebx, %edi
	callq	_set_reg_field_value
	movq	_HFLIP_READY_DELAY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	_DCP_GSL_HSYNC_FLIP_FORCE_DELAY@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ebx, %edi
	callq	_set_reg_field_value
	movq	_HFLIP_CHECK_DELAY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	movq	_DCP_GSL_HSYNC_FLIP_CHECK_DELAY@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ebx, %edi
	callq	_set_reg_field_value
	movl	4(%r12), %r13d
	movq	_mmDCP_GSL_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_CRTC_REG
	movl	%r13d, %edi
	movl	%eax, %esi
	movl	%ebx, %edx
	callq	_dm_write_reg
	movl	(%r15), %esi
	movq	_DCIO_GSL0_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	_DCIO_GSL0_VSYNC_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	xorl	%edi, %edi
	callq	_set_reg_field_value
	movl	(%rbx), %edx
	movq	_DCIO_GSL0_TIMING_SYNC_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	callq	_set_reg_field_value
	movl	(%rbx), %edx
	movq	_DCIO_GSL0_GLOBAL_UNLOCK_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	callq	_set_reg_field_value
	movl	4(%r12), %ebx
	movq	_mmDCIO_GSL0_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_CRTC_REG
	movl	%ebx, %edi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_dm_write_reg
	movl	4(%r12), %ebx
	movq	_mmCRTC_V_TOTAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_CRTC_REG
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_dm_read_reg
	movl	%eax, %ebx
	movl	(%r14), %edx
	movq	_DCP_GSL_SYNC_SOURCE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	callq	_set_reg_field_value
	movq	_CRTC_V_TOTAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%ebx, %edi
	movl	%edx, %esi
	callq	_get_reg_field_value
	movl	%eax, %r15d
	movl	4(%r12), %ebx
	movq	_mmCRTC_GSL_WINDOW@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_CRTC_REG
	movl	%ebx, %edi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_dm_write_reg
	movl	(%r14), %edx
	movq	_DCP_GSL_DELAY_SURFACE_UPDATE_PENDING@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	xorl	%edi, %edi
	movl	$1, %esi
	callq	_set_reg_field_value
	movl	4(%r12), %edi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	xorl	%edx, %edx
	callq	_dm_write_reg
	movq	_mmCRTC_GSL_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_CRTC_REG
	movl	%eax, %r14d
	movl	4(%r12), %edi
	movl	%eax, %esi
	callq	_dm_read_reg
	movl	%eax, %ebx
	movq	_FLIP_READY_BACK_LOOKUP@GOTPCREL(%rip), %rax
	subl	(%rax), %r15d
	movq	_CRTC_GSL_CONTROL@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	movq	_CRTC_GSL_CHECK_LINE_NUM@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ebx, %edi
	movl	%r15d, %esi
	callq	_set_reg_field_value
	movq	_VFLIP_READY_DELAY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r13), %edx
	movq	_CRTC_GSL_FORCE_DELAY@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ebx, %edi
	callq	_set_reg_field_value
	movl	4(%r12), %edi
	movl	%r14d, %esi
	movl	%ebx, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dm_write_reg                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_mmDCP_GSL_CONTROL,4,2          ## @mmDCP_GSL_CONTROL
	.comm	_FLIP_READY_BACK_LOOKUP,4,2     ## @FLIP_READY_BACK_LOOKUP
	.comm	_DCP_GSL_CONTROL,4,2            ## @DCP_GSL_CONTROL
	.comm	_DCP_GSL0_EN,4,2                ## @DCP_GSL0_EN
	.comm	_DCP_GSL_MASTER_EN,4,2          ## @DCP_GSL_MASTER_EN
	.comm	_HFLIP_READY_DELAY,4,2          ## @HFLIP_READY_DELAY
	.comm	_DCP_GSL_HSYNC_FLIP_FORCE_DELAY,4,2 ## @DCP_GSL_HSYNC_FLIP_FORCE_DELAY
	.comm	_HFLIP_CHECK_DELAY,4,2          ## @HFLIP_CHECK_DELAY
	.comm	_DCP_GSL_HSYNC_FLIP_CHECK_DELAY,4,2 ## @DCP_GSL_HSYNC_FLIP_CHECK_DELAY
	.comm	_DCIO_GSL0_CNTL,4,2             ## @DCIO_GSL0_CNTL
	.comm	_DCIO_GSL0_VSYNC_SEL,4,2        ## @DCIO_GSL0_VSYNC_SEL
	.comm	_DCIO_GSL0_TIMING_SYNC_SEL,4,2  ## @DCIO_GSL0_TIMING_SYNC_SEL
	.comm	_DCIO_GSL0_GLOBAL_UNLOCK_SEL,4,2 ## @DCIO_GSL0_GLOBAL_UNLOCK_SEL
	.comm	_mmDCIO_GSL0_CNTL,4,2           ## @mmDCIO_GSL0_CNTL
	.comm	_mmCRTC_V_TOTAL,4,2             ## @mmCRTC_V_TOTAL
	.comm	_DCP_GSL_SYNC_SOURCE,4,2        ## @DCP_GSL_SYNC_SOURCE
	.comm	_CRTC_V_TOTAL,4,2               ## @CRTC_V_TOTAL
	.comm	_mmCRTC_GSL_WINDOW,4,2          ## @mmCRTC_GSL_WINDOW
	.comm	_DCP_GSL_DELAY_SURFACE_UPDATE_PENDING,4,2 ## @DCP_GSL_DELAY_SURFACE_UPDATE_PENDING
	.comm	_mmCRTC_GSL_CONTROL,4,2         ## @mmCRTC_GSL_CONTROL
	.comm	_CRTC_GSL_CONTROL,4,2           ## @CRTC_GSL_CONTROL
	.comm	_CRTC_GSL_CHECK_LINE_NUM,4,2    ## @CRTC_GSL_CHECK_LINE_NUM
	.comm	_VFLIP_READY_DELAY,4,2          ## @VFLIP_READY_DELAY
	.comm	_CRTC_GSL_FORCE_DELAY,4,2       ## @CRTC_GSL_FORCE_DELAY
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_dce110_timing_generator_setup_global_swap_lock ; -- Begin function dce110_timing_generator_setup_global_swap_lock
	.p2align	2
_dce110_timing_generator_setup_global_swap_lock: ; @dce110_timing_generator_setup_global_swap_lock
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x1
	mov	x19, x0
	bl	_DCE110TG_FROM_TG
Lloh0:
	adrp	x25, _mmDCP_GSL_CONTROL@GOTPAGE
Lloh1:
	ldr	x25, [x25, _mmDCP_GSL_CONTROL@GOTPAGEOFF]
	ldr	w0, [x25]
	bl	_DCP_REG
	mov	x20, x0
	ldr	w0, [x19, #4]
	mov	x1, x20
	bl	_dm_read_reg
	mov	x22, x0
Lloh2:
	adrp	x24, _DCP_GSL_CONTROL@GOTPAGE
Lloh3:
	ldr	x24, [x24, _DCP_GSL_CONTROL@GOTPAGEOFF]
	ldr	w2, [x24]
Lloh4:
	adrp	x8, _DCP_GSL0_EN@GOTPAGE
Lloh5:
	ldr	x8, [x8, _DCP_GSL0_EN@GOTPAGEOFF]
Lloh6:
	ldr	w3, [x8]
	mov	w1, #1
	bl	_set_reg_field_value
	ldr	w8, [x21]
	ldr	w9, [x19]
	cmp	w8, w9
	cset	w1, eq
	ldr	w2, [x24]
Lloh7:
	adrp	x8, _DCP_GSL_MASTER_EN@GOTPAGE
Lloh8:
	ldr	x8, [x8, _DCP_GSL_MASTER_EN@GOTPAGEOFF]
Lloh9:
	ldr	w3, [x8]
	mov	x0, x22
	bl	_set_reg_field_value
Lloh10:
	adrp	x8, _HFLIP_READY_DELAY@GOTPAGE
Lloh11:
	ldr	x8, [x8, _HFLIP_READY_DELAY@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	ldr	w2, [x24]
Lloh13:
	adrp	x8, _DCP_GSL_HSYNC_FLIP_FORCE_DELAY@GOTPAGE
Lloh14:
	ldr	x8, [x8, _DCP_GSL_HSYNC_FLIP_FORCE_DELAY@GOTPAGEOFF]
Lloh15:
	ldr	w3, [x8]
	mov	x0, x22
	bl	_set_reg_field_value
Lloh16:
	adrp	x8, _HFLIP_CHECK_DELAY@GOTPAGE
Lloh17:
	ldr	x8, [x8, _HFLIP_CHECK_DELAY@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	ldr	w2, [x24]
Lloh19:
	adrp	x8, _DCP_GSL_HSYNC_FLIP_CHECK_DELAY@GOTPAGE
Lloh20:
	ldr	x8, [x8, _DCP_GSL_HSYNC_FLIP_CHECK_DELAY@GOTPAGEOFF]
Lloh21:
	ldr	w3, [x8]
	mov	x0, x22
	bl	_set_reg_field_value
	ldr	w23, [x19, #4]
	ldr	w0, [x25]
	bl	_CRTC_REG
	mov	x1, x0
	mov	x0, x23
	mov	x2, x22
	bl	_dm_write_reg
	ldr	w1, [x21]
Lloh22:
	adrp	x21, _DCIO_GSL0_CNTL@GOTPAGE
Lloh23:
	ldr	x21, [x21, _DCIO_GSL0_CNTL@GOTPAGEOFF]
	ldr	w2, [x21]
Lloh24:
	adrp	x8, _DCIO_GSL0_VSYNC_SEL@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DCIO_GSL0_VSYNC_SEL@GOTPAGEOFF]
Lloh26:
	ldr	w3, [x8]
	mov	w0, #0
	bl	_set_reg_field_value
	ldr	w2, [x21]
Lloh27:
	adrp	x8, _DCIO_GSL0_TIMING_SYNC_SEL@GOTPAGE
Lloh28:
	ldr	x8, [x8, _DCIO_GSL0_TIMING_SYNC_SEL@GOTPAGEOFF]
Lloh29:
	ldr	w3, [x8]
	mov	w0, #0
	mov	w1, #0
	bl	_set_reg_field_value
	ldr	w2, [x21]
Lloh30:
	adrp	x8, _DCIO_GSL0_GLOBAL_UNLOCK_SEL@GOTPAGE
Lloh31:
	ldr	x8, [x8, _DCIO_GSL0_GLOBAL_UNLOCK_SEL@GOTPAGEOFF]
Lloh32:
	ldr	w3, [x8]
	mov	w0, #0
	mov	w1, #0
	bl	_set_reg_field_value
	ldr	w21, [x19, #4]
Lloh33:
	adrp	x8, _mmDCIO_GSL0_CNTL@GOTPAGE
Lloh34:
	ldr	x8, [x8, _mmDCIO_GSL0_CNTL@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
	bl	_CRTC_REG
	mov	x1, x0
	mov	x0, x21
	mov	w2, #0
	bl	_dm_write_reg
	ldr	w21, [x19, #4]
Lloh36:
	adrp	x8, _mmCRTC_V_TOTAL@GOTPAGE
Lloh37:
	ldr	x8, [x8, _mmCRTC_V_TOTAL@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	bl	_CRTC_REG
	mov	x1, x0
	mov	x0, x21
	bl	_dm_read_reg
	mov	x21, x0
	ldr	w2, [x24]
Lloh39:
	adrp	x8, _DCP_GSL_SYNC_SOURCE@GOTPAGE
Lloh40:
	ldr	x8, [x8, _DCP_GSL_SYNC_SOURCE@GOTPAGEOFF]
Lloh41:
	ldr	w3, [x8]
	mov	w0, #0
	mov	w1, #0
	bl	_set_reg_field_value
Lloh42:
	adrp	x8, _CRTC_V_TOTAL@GOTPAGE
Lloh43:
	ldr	x8, [x8, _CRTC_V_TOTAL@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
	mov	x0, x21
	mov	x2, x1
	bl	_get_reg_field_value
	mov	x21, x0
	ldr	w22, [x19, #4]
Lloh45:
	adrp	x8, _mmCRTC_GSL_WINDOW@GOTPAGE
Lloh46:
	ldr	x8, [x8, _mmCRTC_GSL_WINDOW@GOTPAGEOFF]
Lloh47:
	ldr	w0, [x8]
	bl	_CRTC_REG
	mov	x1, x0
	mov	x0, x22
	mov	w2, #0
	bl	_dm_write_reg
	ldr	w2, [x24]
Lloh48:
	adrp	x8, _DCP_GSL_DELAY_SURFACE_UPDATE_PENDING@GOTPAGE
Lloh49:
	ldr	x8, [x8, _DCP_GSL_DELAY_SURFACE_UPDATE_PENDING@GOTPAGEOFF]
Lloh50:
	ldr	w3, [x8]
	mov	w0, #0
	mov	w1, #1
	bl	_set_reg_field_value
	ldr	w0, [x19, #4]
	mov	x1, x20
	mov	w2, #0
	bl	_dm_write_reg
Lloh51:
	adrp	x8, _mmCRTC_GSL_CONTROL@GOTPAGE
Lloh52:
	ldr	x8, [x8, _mmCRTC_GSL_CONTROL@GOTPAGEOFF]
Lloh53:
	ldr	w0, [x8]
	bl	_CRTC_REG
	mov	x20, x0
	ldr	w0, [x19, #4]
	mov	x1, x20
	bl	_dm_read_reg
	mov	x22, x0
Lloh54:
	adrp	x8, _FLIP_READY_BACK_LOOKUP@GOTPAGE
Lloh55:
	ldr	x8, [x8, _FLIP_READY_BACK_LOOKUP@GOTPAGEOFF]
Lloh56:
	ldr	w8, [x8]
	sub	w1, w21, w8
Lloh57:
	adrp	x21, _CRTC_GSL_CONTROL@GOTPAGE
Lloh58:
	ldr	x21, [x21, _CRTC_GSL_CONTROL@GOTPAGEOFF]
	ldr	w2, [x21]
Lloh59:
	adrp	x8, _CRTC_GSL_CHECK_LINE_NUM@GOTPAGE
Lloh60:
	ldr	x8, [x8, _CRTC_GSL_CHECK_LINE_NUM@GOTPAGEOFF]
Lloh61:
	ldr	w3, [x8]
	bl	_set_reg_field_value
Lloh62:
	adrp	x8, _VFLIP_READY_DELAY@GOTPAGE
Lloh63:
	ldr	x8, [x8, _VFLIP_READY_DELAY@GOTPAGEOFF]
Lloh64:
	ldr	w1, [x8]
	ldr	w2, [x21]
Lloh65:
	adrp	x8, _CRTC_GSL_FORCE_DELAY@GOTPAGE
Lloh66:
	ldr	x8, [x8, _CRTC_GSL_FORCE_DELAY@GOTPAGEOFF]
Lloh67:
	ldr	w3, [x8]
	mov	x0, x22
	bl	_set_reg_field_value
	ldr	w0, [x19, #4]
	mov	x1, x20
	mov	x2, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_dm_write_reg
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_mmDCP_GSL_CONTROL,4,2          ; @mmDCP_GSL_CONTROL
	.comm	_FLIP_READY_BACK_LOOKUP,4,2     ; @FLIP_READY_BACK_LOOKUP
	.comm	_DCP_GSL_CONTROL,4,2            ; @DCP_GSL_CONTROL
	.comm	_DCP_GSL0_EN,4,2                ; @DCP_GSL0_EN
	.comm	_DCP_GSL_MASTER_EN,4,2          ; @DCP_GSL_MASTER_EN
	.comm	_HFLIP_READY_DELAY,4,2          ; @HFLIP_READY_DELAY
	.comm	_DCP_GSL_HSYNC_FLIP_FORCE_DELAY,4,2 ; @DCP_GSL_HSYNC_FLIP_FORCE_DELAY
	.comm	_HFLIP_CHECK_DELAY,4,2          ; @HFLIP_CHECK_DELAY
	.comm	_DCP_GSL_HSYNC_FLIP_CHECK_DELAY,4,2 ; @DCP_GSL_HSYNC_FLIP_CHECK_DELAY
	.comm	_DCIO_GSL0_CNTL,4,2             ; @DCIO_GSL0_CNTL
	.comm	_DCIO_GSL0_VSYNC_SEL,4,2        ; @DCIO_GSL0_VSYNC_SEL
	.comm	_DCIO_GSL0_TIMING_SYNC_SEL,4,2  ; @DCIO_GSL0_TIMING_SYNC_SEL
	.comm	_DCIO_GSL0_GLOBAL_UNLOCK_SEL,4,2 ; @DCIO_GSL0_GLOBAL_UNLOCK_SEL
	.comm	_mmDCIO_GSL0_CNTL,4,2           ; @mmDCIO_GSL0_CNTL
	.comm	_mmCRTC_V_TOTAL,4,2             ; @mmCRTC_V_TOTAL
	.comm	_DCP_GSL_SYNC_SOURCE,4,2        ; @DCP_GSL_SYNC_SOURCE
	.comm	_CRTC_V_TOTAL,4,2               ; @CRTC_V_TOTAL
	.comm	_mmCRTC_GSL_WINDOW,4,2          ; @mmCRTC_GSL_WINDOW
	.comm	_DCP_GSL_DELAY_SURFACE_UPDATE_PENDING,4,2 ; @DCP_GSL_DELAY_SURFACE_UPDATE_PENDING
	.comm	_mmCRTC_GSL_CONTROL,4,2         ; @mmCRTC_GSL_CONTROL
	.comm	_CRTC_GSL_CONTROL,4,2           ; @CRTC_GSL_CONTROL
	.comm	_CRTC_GSL_CHECK_LINE_NUM,4,2    ; @CRTC_GSL_CHECK_LINE_NUM
	.comm	_VFLIP_READY_DELAY,4,2          ; @VFLIP_READY_DELAY
	.comm	_CRTC_GSL_FORCE_DELAY,4,2       ; @CRTC_GSL_FORCE_DELAY
.subsections_via_symbols
