	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function oaktrail_restore_display_registers
_oaktrail_restore_display_registers:    ## @oaktrail_restore_display_registers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	(%rdi), %r15
	movq	152(%r15), %r12
	movl	24(%r15), %edi
	movq	_DSPARB@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	28(%r15), %edi
	movq	_DSPFW1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	32(%r15), %edi
	movq	_DSPFW2@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	36(%r15), %edi
	movq	_DSPFW3@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	40(%r15), %edi
	movq	_DSPFW4@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	44(%r15), %edi
	movq	_DSPFW5@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	48(%r15), %edi
	movq	_DSPFW6@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	52(%r15), %edi
	movq	_DSPCHICKENBIT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movq	_VGACNTRL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movl	$-2147483648, %edi              ## imm = 0x80000000
	callq	_PSB_WVDC32
	movl	(%r12), %edi
	movq	_MRST_FPA0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	4(%r12), %edi
	movq	_MRST_FPA1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	8(%r12), %edi
	movq	_MRST_DPLL_A@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	$150, %edi
	callq	_udelay
	movl	12(%r12), %edi
	movq	_HTOTAL_A@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	16(%r12), %edi
	movq	_HBLANK_A@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	20(%r12), %edi
	movq	_HSYNC_A@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	24(%r12), %edi
	movq	_VTOTAL_A@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	28(%r12), %edi
	movq	_VBLANK_A@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	32(%r12), %edi
	movq	_VSYNC_A@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	36(%r12), %edi
	movq	_PIPEASRC@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	56(%r15), %edi
	movq	_BCLRPAT_A@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	60(%r15), %edi
	movq	_MRST_PERF_MODE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	cmpq	$0, (%r15)
	je	LBB0_2
## %bb.1:
	movl	40(%r12), %edi
	movq	_PIPEACONF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
LBB0_2:
	movl	44(%r12), %edi
	movq	_DSPALINOFF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	48(%r12), %edi
	movq	_DSPASTRIDE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	52(%r12), %edi
	movq	_DSPATILEOFF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	56(%r12), %edi
	movq	_DSPACNTR@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	60(%r12), %edi
	movq	_DSPASURF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	64(%r15), %edi
	movq	_CURACNTR@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	68(%r15), %edi
	movq	_CURAPOS@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	72(%r15), %edi
	movq	_CURABASE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	xorl	%ebx, %ebx
	movq	_PALETTE_A@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	64(%r12), %rax
	movl	(%rax,%rbx), %edi
	movq	(%r13), %rsi
	addq	%rbx, %rsi
	callq	_PSB_WVDC32
	addq	$4, %rbx
	cmpq	$1024, %rbx                     ## imm = 0x400
	jne	LBB0_3
## %bb.4:
	cmpq	$0, 8(%r15)
	je	LBB0_6
## %bb.5:
	movq	%r14, %rdi
	callq	_oaktrail_hdmi_restore
LBB0_6:
	cmpq	$0, (%r15)
	je	LBB0_8
## %bb.7:
	movl	16(%r15), %edi
	movq	_BLC_PWM_CTL2@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	76(%r15), %edi
	movq	_LVDS@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	80(%r15), %edi
	movq	_PFIT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	84(%r15), %edi
	movq	_PFIT_PGM_RATIOS@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	88(%r15), %edi
	movq	_PFIT_AUTO_RATIOS@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	20(%r15), %edi
	movq	_BLC_PWM_CTL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	92(%r15), %edi
	movq	_LVDSPP_ON@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	96(%r15), %edi
	movq	_LVDSPP_OFF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	100(%r15), %edi
	movq	_PP_CYCLE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	104(%r15), %edi
	movq	_PP_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
LBB0_8:
	movq	_PP_STATUS@GOTPCREL(%rip), %rbx
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%rbx), %edi
	callq	_PSB_RVDC32
	testl	$134217728, %eax                ## imm = 0x8000000
	jne	LBB0_9
	.p2align	4, 0x90
LBB0_10:                                ## =>This Inner Loop Header: Depth=1
	movl	(%rbx), %edi
	callq	_PSB_RVDC32
	testl	$268435456, %eax                ## imm = 0x10000000
	jne	LBB0_10
## %bb.11:
	movl	108(%r15), %edi
	movq	_OV_OVADD@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	112(%r15), %edi
	movq	_OV_OGAMC0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	116(%r15), %edi
	movq	_OV_OGAMC1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	120(%r15), %edi
	movq	_OV_OGAMC2@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	124(%r15), %edi
	movq	_OV_OGAMC3@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	128(%r15), %edi
	movq	_OV_OGAMC4@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	132(%r15), %edi
	movq	_OV_OGAMC5@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	136(%r15), %edi
	movq	_HISTOGRAM_INT_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	140(%r15), %edi
	movq	_HISTOGRAM_LOGIC_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	movl	144(%r15), %edi
	movq	_PWM_CONTROL_LOGIC@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_PSB_WVDC32
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DSPARB,8,3                     ## @DSPARB
	.comm	_DSPFW1,8,3                     ## @DSPFW1
	.comm	_DSPFW2,8,3                     ## @DSPFW2
	.comm	_DSPFW3,8,3                     ## @DSPFW3
	.comm	_DSPFW4,8,3                     ## @DSPFW4
	.comm	_DSPFW5,8,3                     ## @DSPFW5
	.comm	_DSPFW6,8,3                     ## @DSPFW6
	.comm	_DSPCHICKENBIT,8,3              ## @DSPCHICKENBIT
	.comm	_VGACNTRL,8,3                   ## @VGACNTRL
	.comm	_MRST_FPA0,8,3                  ## @MRST_FPA0
	.comm	_MRST_FPA1,8,3                  ## @MRST_FPA1
	.comm	_MRST_DPLL_A,8,3                ## @MRST_DPLL_A
	.comm	_HTOTAL_A,8,3                   ## @HTOTAL_A
	.comm	_HBLANK_A,8,3                   ## @HBLANK_A
	.comm	_HSYNC_A,8,3                    ## @HSYNC_A
	.comm	_VTOTAL_A,8,3                   ## @VTOTAL_A
	.comm	_VBLANK_A,8,3                   ## @VBLANK_A
	.comm	_VSYNC_A,8,3                    ## @VSYNC_A
	.comm	_PIPEASRC,8,3                   ## @PIPEASRC
	.comm	_BCLRPAT_A,8,3                  ## @BCLRPAT_A
	.comm	_MRST_PERF_MODE,8,3             ## @MRST_PERF_MODE
	.comm	_PIPEACONF,8,3                  ## @PIPEACONF
	.comm	_DSPALINOFF,8,3                 ## @DSPALINOFF
	.comm	_DSPASTRIDE,8,3                 ## @DSPASTRIDE
	.comm	_DSPATILEOFF,8,3                ## @DSPATILEOFF
	.comm	_DSPACNTR,8,3                   ## @DSPACNTR
	.comm	_DSPASURF,8,3                   ## @DSPASURF
	.comm	_CURACNTR,8,3                   ## @CURACNTR
	.comm	_CURAPOS,8,3                    ## @CURAPOS
	.comm	_CURABASE,8,3                   ## @CURABASE
	.comm	_PALETTE_A,8,3                  ## @PALETTE_A
	.comm	_BLC_PWM_CTL2,8,3               ## @BLC_PWM_CTL2
	.comm	_LVDS,8,3                       ## @LVDS
	.comm	_PFIT_CONTROL,8,3               ## @PFIT_CONTROL
	.comm	_PFIT_PGM_RATIOS,8,3            ## @PFIT_PGM_RATIOS
	.comm	_PFIT_AUTO_RATIOS,8,3           ## @PFIT_AUTO_RATIOS
	.comm	_BLC_PWM_CTL,8,3                ## @BLC_PWM_CTL
	.comm	_LVDSPP_ON,8,3                  ## @LVDSPP_ON
	.comm	_LVDSPP_OFF,8,3                 ## @LVDSPP_OFF
	.comm	_PP_CYCLE,8,3                   ## @PP_CYCLE
	.comm	_PP_CONTROL,8,3                 ## @PP_CONTROL
	.comm	_PP_STATUS,4,2                  ## @PP_STATUS
	.comm	_OV_OVADD,8,3                   ## @OV_OVADD
	.comm	_OV_OGAMC0,8,3                  ## @OV_OGAMC0
	.comm	_OV_OGAMC1,8,3                  ## @OV_OGAMC1
	.comm	_OV_OGAMC2,8,3                  ## @OV_OGAMC2
	.comm	_OV_OGAMC3,8,3                  ## @OV_OGAMC3
	.comm	_OV_OGAMC4,8,3                  ## @OV_OGAMC4
	.comm	_OV_OGAMC5,8,3                  ## @OV_OGAMC5
	.comm	_HISTOGRAM_INT_CONTROL,8,3      ## @HISTOGRAM_INT_CONTROL
	.comm	_HISTOGRAM_LOGIC_CONTROL,8,3    ## @HISTOGRAM_LOGIC_CONTROL
	.comm	_PWM_CONTROL_LOGIC,8,3          ## @PWM_CONTROL_LOGIC
	.no_dead_strip	_oaktrail_restore_display_registers
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function oaktrail_restore_display_registers
_oaktrail_restore_display_registers:    ; @oaktrail_restore_display_registers
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x20, [x0]
	ldr	x21, [x20, #152]
	ldr	w0, [x20, #24]
Lloh0:
	adrp	x8, _DSPARB@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DSPARB@GOTPAGEOFF]
Lloh2:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #28]
Lloh3:
	adrp	x8, _DSPFW1@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DSPFW1@GOTPAGEOFF]
Lloh5:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #32]
Lloh6:
	adrp	x8, _DSPFW2@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DSPFW2@GOTPAGEOFF]
Lloh8:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #36]
Lloh9:
	adrp	x8, _DSPFW3@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DSPFW3@GOTPAGEOFF]
Lloh11:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #40]
Lloh12:
	adrp	x8, _DSPFW4@GOTPAGE
Lloh13:
	ldr	x8, [x8, _DSPFW4@GOTPAGEOFF]
Lloh14:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #44]
Lloh15:
	adrp	x8, _DSPFW5@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DSPFW5@GOTPAGEOFF]
Lloh17:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #48]
Lloh18:
	adrp	x8, _DSPFW6@GOTPAGE
Lloh19:
	ldr	x8, [x8, _DSPFW6@GOTPAGEOFF]
Lloh20:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #52]
Lloh21:
	adrp	x8, _DSPCHICKENBIT@GOTPAGE
Lloh22:
	ldr	x8, [x8, _DSPCHICKENBIT@GOTPAGEOFF]
Lloh23:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
Lloh24:
	adrp	x8, _VGACNTRL@GOTPAGE
Lloh25:
	ldr	x8, [x8, _VGACNTRL@GOTPAGEOFF]
Lloh26:
	ldr	x1, [x8]
	mov	w0, #-2147483648
	bl	_PSB_WVDC32
	ldr	w0, [x21]
Lloh27:
	adrp	x8, _MRST_FPA0@GOTPAGE
Lloh28:
	ldr	x8, [x8, _MRST_FPA0@GOTPAGEOFF]
Lloh29:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #4]
Lloh30:
	adrp	x8, _MRST_FPA1@GOTPAGE
Lloh31:
	ldr	x8, [x8, _MRST_FPA1@GOTPAGEOFF]
Lloh32:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #8]
Lloh33:
	adrp	x8, _MRST_DPLL_A@GOTPAGE
Lloh34:
	ldr	x8, [x8, _MRST_DPLL_A@GOTPAGEOFF]
Lloh35:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	mov	w0, #150
	bl	_udelay
	ldr	w0, [x21, #12]
Lloh36:
	adrp	x8, _HTOTAL_A@GOTPAGE
Lloh37:
	ldr	x8, [x8, _HTOTAL_A@GOTPAGEOFF]
Lloh38:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #16]
Lloh39:
	adrp	x8, _HBLANK_A@GOTPAGE
Lloh40:
	ldr	x8, [x8, _HBLANK_A@GOTPAGEOFF]
Lloh41:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #20]
Lloh42:
	adrp	x8, _HSYNC_A@GOTPAGE
Lloh43:
	ldr	x8, [x8, _HSYNC_A@GOTPAGEOFF]
Lloh44:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #24]
Lloh45:
	adrp	x8, _VTOTAL_A@GOTPAGE
Lloh46:
	ldr	x8, [x8, _VTOTAL_A@GOTPAGEOFF]
Lloh47:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #28]
Lloh48:
	adrp	x8, _VBLANK_A@GOTPAGE
Lloh49:
	ldr	x8, [x8, _VBLANK_A@GOTPAGEOFF]
Lloh50:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #32]
Lloh51:
	adrp	x8, _VSYNC_A@GOTPAGE
Lloh52:
	ldr	x8, [x8, _VSYNC_A@GOTPAGEOFF]
Lloh53:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #36]
Lloh54:
	adrp	x8, _PIPEASRC@GOTPAGE
Lloh55:
	ldr	x8, [x8, _PIPEASRC@GOTPAGEOFF]
Lloh56:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #56]
Lloh57:
	adrp	x8, _BCLRPAT_A@GOTPAGE
Lloh58:
	ldr	x8, [x8, _BCLRPAT_A@GOTPAGEOFF]
Lloh59:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #60]
Lloh60:
	adrp	x8, _MRST_PERF_MODE@GOTPAGE
Lloh61:
	ldr	x8, [x8, _MRST_PERF_MODE@GOTPAGEOFF]
Lloh62:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	x8, [x20]
	cbz	x8, LBB0_2
; %bb.1:
	ldr	w0, [x21, #40]
Lloh63:
	adrp	x8, _PIPEACONF@GOTPAGE
Lloh64:
	ldr	x8, [x8, _PIPEACONF@GOTPAGEOFF]
Lloh65:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
LBB0_2:
	ldr	w0, [x21, #44]
Lloh66:
	adrp	x8, _DSPALINOFF@GOTPAGE
Lloh67:
	ldr	x8, [x8, _DSPALINOFF@GOTPAGEOFF]
Lloh68:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #48]
Lloh69:
	adrp	x8, _DSPASTRIDE@GOTPAGE
Lloh70:
	ldr	x8, [x8, _DSPASTRIDE@GOTPAGEOFF]
Lloh71:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #52]
Lloh72:
	adrp	x8, _DSPATILEOFF@GOTPAGE
Lloh73:
	ldr	x8, [x8, _DSPATILEOFF@GOTPAGEOFF]
Lloh74:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #56]
Lloh75:
	adrp	x8, _DSPACNTR@GOTPAGE
Lloh76:
	ldr	x8, [x8, _DSPACNTR@GOTPAGEOFF]
Lloh77:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x21, #60]
Lloh78:
	adrp	x8, _DSPASURF@GOTPAGE
Lloh79:
	ldr	x8, [x8, _DSPASURF@GOTPAGEOFF]
Lloh80:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #64]
Lloh81:
	adrp	x8, _CURACNTR@GOTPAGE
Lloh82:
	ldr	x8, [x8, _CURACNTR@GOTPAGEOFF]
Lloh83:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #68]
Lloh84:
	adrp	x8, _CURAPOS@GOTPAGE
Lloh85:
	ldr	x8, [x8, _CURAPOS@GOTPAGEOFF]
Lloh86:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #72]
Lloh87:
	adrp	x8, _CURABASE@GOTPAGE
Lloh88:
	ldr	x8, [x8, _CURABASE@GOTPAGEOFF]
Lloh89:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	mov	x22, #0
Lloh90:
	adrp	x23, _PALETTE_A@GOTPAGE
Lloh91:
	ldr	x23, [x23, _PALETTE_A@GOTPAGEOFF]
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x21, #64]
	ldr	w0, [x8, x22]
	ldr	x8, [x23]
	add	x1, x22, x8
	bl	_PSB_WVDC32
	add	x22, x22, #4
	cmp	x22, #1024
	b.ne	LBB0_3
; %bb.4:
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_6
; %bb.5:
	mov	x0, x19
	bl	_oaktrail_hdmi_restore
LBB0_6:
	ldr	x8, [x20]
	cbz	x8, LBB0_8
; %bb.7:
	ldr	w0, [x20, #16]
Lloh92:
	adrp	x8, _BLC_PWM_CTL2@GOTPAGE
Lloh93:
	ldr	x8, [x8, _BLC_PWM_CTL2@GOTPAGEOFF]
Lloh94:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #76]
Lloh95:
	adrp	x8, _LVDS@GOTPAGE
Lloh96:
	ldr	x8, [x8, _LVDS@GOTPAGEOFF]
Lloh97:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #80]
Lloh98:
	adrp	x8, _PFIT_CONTROL@GOTPAGE
Lloh99:
	ldr	x8, [x8, _PFIT_CONTROL@GOTPAGEOFF]
Lloh100:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #84]
Lloh101:
	adrp	x8, _PFIT_PGM_RATIOS@GOTPAGE
Lloh102:
	ldr	x8, [x8, _PFIT_PGM_RATIOS@GOTPAGEOFF]
Lloh103:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #88]
Lloh104:
	adrp	x8, _PFIT_AUTO_RATIOS@GOTPAGE
Lloh105:
	ldr	x8, [x8, _PFIT_AUTO_RATIOS@GOTPAGEOFF]
Lloh106:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #20]
Lloh107:
	adrp	x8, _BLC_PWM_CTL@GOTPAGE
Lloh108:
	ldr	x8, [x8, _BLC_PWM_CTL@GOTPAGEOFF]
Lloh109:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #92]
Lloh110:
	adrp	x8, _LVDSPP_ON@GOTPAGE
Lloh111:
	ldr	x8, [x8, _LVDSPP_ON@GOTPAGEOFF]
Lloh112:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #96]
Lloh113:
	adrp	x8, _LVDSPP_OFF@GOTPAGE
Lloh114:
	ldr	x8, [x8, _LVDSPP_OFF@GOTPAGEOFF]
Lloh115:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #100]
Lloh116:
	adrp	x8, _PP_CYCLE@GOTPAGE
Lloh117:
	ldr	x8, [x8, _PP_CYCLE@GOTPAGEOFF]
Lloh118:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #104]
Lloh119:
	adrp	x8, _PP_CONTROL@GOTPAGE
Lloh120:
	ldr	x8, [x8, _PP_CONTROL@GOTPAGEOFF]
Lloh121:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
LBB0_8:
Lloh122:
	adrp	x19, _PP_STATUS@GOTPAGE
Lloh123:
	ldr	x19, [x19, _PP_STATUS@GOTPAGEOFF]
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x19]
	bl	_PSB_RVDC32
	tbnz	w0, #27, LBB0_9
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x19]
	bl	_PSB_RVDC32
	tbnz	w0, #28, LBB0_10
; %bb.11:
	ldr	w0, [x20, #108]
Lloh124:
	adrp	x8, _OV_OVADD@GOTPAGE
Lloh125:
	ldr	x8, [x8, _OV_OVADD@GOTPAGEOFF]
Lloh126:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #112]
Lloh127:
	adrp	x8, _OV_OGAMC0@GOTPAGE
Lloh128:
	ldr	x8, [x8, _OV_OGAMC0@GOTPAGEOFF]
Lloh129:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #116]
Lloh130:
	adrp	x8, _OV_OGAMC1@GOTPAGE
Lloh131:
	ldr	x8, [x8, _OV_OGAMC1@GOTPAGEOFF]
Lloh132:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #120]
Lloh133:
	adrp	x8, _OV_OGAMC2@GOTPAGE
Lloh134:
	ldr	x8, [x8, _OV_OGAMC2@GOTPAGEOFF]
Lloh135:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #124]
Lloh136:
	adrp	x8, _OV_OGAMC3@GOTPAGE
Lloh137:
	ldr	x8, [x8, _OV_OGAMC3@GOTPAGEOFF]
Lloh138:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #128]
Lloh139:
	adrp	x8, _OV_OGAMC4@GOTPAGE
Lloh140:
	ldr	x8, [x8, _OV_OGAMC4@GOTPAGEOFF]
Lloh141:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #132]
Lloh142:
	adrp	x8, _OV_OGAMC5@GOTPAGE
Lloh143:
	ldr	x8, [x8, _OV_OGAMC5@GOTPAGEOFF]
Lloh144:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #136]
Lloh145:
	adrp	x8, _HISTOGRAM_INT_CONTROL@GOTPAGE
Lloh146:
	ldr	x8, [x8, _HISTOGRAM_INT_CONTROL@GOTPAGEOFF]
Lloh147:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #140]
Lloh148:
	adrp	x8, _HISTOGRAM_LOGIC_CONTROL@GOTPAGE
Lloh149:
	ldr	x8, [x8, _HISTOGRAM_LOGIC_CONTROL@GOTPAGEOFF]
Lloh150:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	ldr	w0, [x20, #144]
Lloh151:
	adrp	x8, _PWM_CONTROL_LOGIC@GOTPAGE
Lloh152:
	ldr	x8, [x8, _PWM_CONTROL_LOGIC@GOTPAGEOFF]
Lloh153:
	ldr	x1, [x8]
	bl	_PSB_WVDC32
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh119, Lloh120, Lloh121
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh110, Lloh111, Lloh112
	.loh AdrpLdrGotLdr	Lloh107, Lloh108, Lloh109
	.loh AdrpLdrGotLdr	Lloh104, Lloh105, Lloh106
	.loh AdrpLdrGotLdr	Lloh101, Lloh102, Lloh103
	.loh AdrpLdrGotLdr	Lloh98, Lloh99, Lloh100
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh97
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGot	Lloh122, Lloh123
	.loh AdrpLdrGotLdr	Lloh151, Lloh152, Lloh153
	.loh AdrpLdrGotLdr	Lloh148, Lloh149, Lloh150
	.loh AdrpLdrGotLdr	Lloh145, Lloh146, Lloh147
	.loh AdrpLdrGotLdr	Lloh142, Lloh143, Lloh144
	.loh AdrpLdrGotLdr	Lloh139, Lloh140, Lloh141
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.loh AdrpLdrGotLdr	Lloh133, Lloh134, Lloh135
	.loh AdrpLdrGotLdr	Lloh130, Lloh131, Lloh132
	.loh AdrpLdrGotLdr	Lloh127, Lloh128, Lloh129
	.loh AdrpLdrGotLdr	Lloh124, Lloh125, Lloh126
	.cfi_endproc
                                        ; -- End function
	.comm	_DSPARB,8,3                     ; @DSPARB
	.comm	_DSPFW1,8,3                     ; @DSPFW1
	.comm	_DSPFW2,8,3                     ; @DSPFW2
	.comm	_DSPFW3,8,3                     ; @DSPFW3
	.comm	_DSPFW4,8,3                     ; @DSPFW4
	.comm	_DSPFW5,8,3                     ; @DSPFW5
	.comm	_DSPFW6,8,3                     ; @DSPFW6
	.comm	_DSPCHICKENBIT,8,3              ; @DSPCHICKENBIT
	.comm	_VGACNTRL,8,3                   ; @VGACNTRL
	.comm	_MRST_FPA0,8,3                  ; @MRST_FPA0
	.comm	_MRST_FPA1,8,3                  ; @MRST_FPA1
	.comm	_MRST_DPLL_A,8,3                ; @MRST_DPLL_A
	.comm	_HTOTAL_A,8,3                   ; @HTOTAL_A
	.comm	_HBLANK_A,8,3                   ; @HBLANK_A
	.comm	_HSYNC_A,8,3                    ; @HSYNC_A
	.comm	_VTOTAL_A,8,3                   ; @VTOTAL_A
	.comm	_VBLANK_A,8,3                   ; @VBLANK_A
	.comm	_VSYNC_A,8,3                    ; @VSYNC_A
	.comm	_PIPEASRC,8,3                   ; @PIPEASRC
	.comm	_BCLRPAT_A,8,3                  ; @BCLRPAT_A
	.comm	_MRST_PERF_MODE,8,3             ; @MRST_PERF_MODE
	.comm	_PIPEACONF,8,3                  ; @PIPEACONF
	.comm	_DSPALINOFF,8,3                 ; @DSPALINOFF
	.comm	_DSPASTRIDE,8,3                 ; @DSPASTRIDE
	.comm	_DSPATILEOFF,8,3                ; @DSPATILEOFF
	.comm	_DSPACNTR,8,3                   ; @DSPACNTR
	.comm	_DSPASURF,8,3                   ; @DSPASURF
	.comm	_CURACNTR,8,3                   ; @CURACNTR
	.comm	_CURAPOS,8,3                    ; @CURAPOS
	.comm	_CURABASE,8,3                   ; @CURABASE
	.comm	_PALETTE_A,8,3                  ; @PALETTE_A
	.comm	_BLC_PWM_CTL2,8,3               ; @BLC_PWM_CTL2
	.comm	_LVDS,8,3                       ; @LVDS
	.comm	_PFIT_CONTROL,8,3               ; @PFIT_CONTROL
	.comm	_PFIT_PGM_RATIOS,8,3            ; @PFIT_PGM_RATIOS
	.comm	_PFIT_AUTO_RATIOS,8,3           ; @PFIT_AUTO_RATIOS
	.comm	_BLC_PWM_CTL,8,3                ; @BLC_PWM_CTL
	.comm	_LVDSPP_ON,8,3                  ; @LVDSPP_ON
	.comm	_LVDSPP_OFF,8,3                 ; @LVDSPP_OFF
	.comm	_PP_CYCLE,8,3                   ; @PP_CYCLE
	.comm	_PP_CONTROL,8,3                 ; @PP_CONTROL
	.comm	_PP_STATUS,4,2                  ; @PP_STATUS
	.comm	_OV_OVADD,8,3                   ; @OV_OVADD
	.comm	_OV_OGAMC0,8,3                  ; @OV_OGAMC0
	.comm	_OV_OGAMC1,8,3                  ; @OV_OGAMC1
	.comm	_OV_OGAMC2,8,3                  ; @OV_OGAMC2
	.comm	_OV_OGAMC3,8,3                  ; @OV_OGAMC3
	.comm	_OV_OGAMC4,8,3                  ; @OV_OGAMC4
	.comm	_OV_OGAMC5,8,3                  ; @OV_OGAMC5
	.comm	_HISTOGRAM_INT_CONTROL,8,3      ; @HISTOGRAM_INT_CONTROL
	.comm	_HISTOGRAM_LOGIC_CONTROL,8,3    ; @HISTOGRAM_LOGIC_CONTROL
	.comm	_PWM_CONTROL_LOGIC,8,3          ; @PWM_CONTROL_LOGIC
	.no_dead_strip	_oaktrail_restore_display_registers
.subsections_via_symbols
