	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_dma_sw_init
_si_dma_sw_init:                        ## @si_dma_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	_AMDGPU_IRQ_CLIENTID_LEGACY@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	leaq	4(%rdi), %r14
	movl	$224, %edx
	movq	%r14, %rcx
	callq	_amdgpu_irq_add_id
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movl	(%rbx), %esi
	movq	%r12, %rdi
	movl	$244, %edx
	movq	%r14, %rcx
	callq	_amdgpu_irq_add_id
	testl	%eax, %eax
	jne	LBB0_2
## %bb.3:
	cmpl	$0, (%r12)
	jle	LBB0_10
## %bb.4:
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r12), %rax
	leaq	(%rax,%r15), %r13
	movq	$0, 8(%rax,%r15)
	movl	$0, (%rax,%r15)
	movl	4(%rax,%r15), %edi
	leaq	L_.str(%rip), %rsi
	movl	%ebx, %edx
	callq	_sprintf
	movq	_AMDGPU_SDMA_IRQ_INSTANCE1@GOTPCREL(%rip), %rax
	testq	%rbx, %rbx
	jne	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movq	_AMDGPU_SDMA_IRQ_INSTANCE0@GOTPCREL(%rip), %rax
LBB0_7:                                 ##   in Loop: Header=BB0_5 Depth=1
	movl	(%rax), %r8d
	movq	%r12, %rdi
	movq	%r13, %rsi
	movl	$1024, %edx                     ## imm = 0x400
	movq	%r14, %rcx
	callq	_amdgpu_ring_init
	testl	%eax, %eax
	jne	LBB0_2
## %bb.8:                               ##   in Loop: Header=BB0_5 Depth=1
	incq	%rbx
	movslq	(%r12), %rax
	addq	$16, %r15
	cmpq	%rax, %rbx
	jl	LBB0_5
LBB0_10:
	xorl	%eax, %eax
LBB0_2:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ## @AMDGPU_IRQ_CLIENTID_LEGACY
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"sdma%d"

	.comm	_AMDGPU_SDMA_IRQ_INSTANCE0,4,2  ## @AMDGPU_SDMA_IRQ_INSTANCE0
	.comm	_AMDGPU_SDMA_IRQ_INSTANCE1,4,2  ## @AMDGPU_SDMA_IRQ_INSTANCE1
	.no_dead_strip	_si_dma_sw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_dma_sw_init
_si_dma_sw_init:                        ; @si_dma_sw_init
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x21, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGE
Lloh1:
	ldr	x21, [x21, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x20, x0, #4
	mov	w2, #224
	mov	x3, x20
	bl	_amdgpu_irq_add_id
	cbnz	w0, LBB0_7
; %bb.1:
	ldr	w1, [x21]
	mov	x0, x19
	mov	w2, #244
	mov	x3, x20
	bl	_amdgpu_irq_add_id
	cbnz	w0, LBB0_7
; %bb.2:
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_6
; %bb.3:
	mov	x24, #0
	mov	x21, #0
Lloh2:
	adrp	x25, _AMDGPU_SDMA_IRQ_INSTANCE0@GOTPAGE
Lloh3:
	ldr	x25, [x25, _AMDGPU_SDMA_IRQ_INSTANCE0@GOTPAGEOFF]
Lloh4:
	adrp	x26, _AMDGPU_SDMA_IRQ_INSTANCE1@GOTPAGE
Lloh5:
	ldr	x26, [x26, _AMDGPU_SDMA_IRQ_INSTANCE1@GOTPAGEOFF]
Lloh6:
	adrp	x22, l_.str@PAGE
Lloh7:
	add	x22, x22, l_.str@PAGEOFF
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #8]
	add	x23, x8, x24
	str	xzr, [x23, #8]
	str	wzr, [x23]
	ldr	w0, [x23, #4]
	mov	x1, x22
	mov	x2, x21
	bl	_sprintf
	cmp	x21, #0
	csel	x8, x25, x26, eq
	ldr	w4, [x8]
	mov	x0, x19
	mov	x1, x23
	mov	w2, #1024
	mov	x3, x20
	bl	_amdgpu_ring_init
	cbnz	w0, LBB0_7
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	add	x21, x21, #1
	ldrsw	x8, [x19]
	add	x24, x24, #16
	cmp	x21, x8
	b.lt	LBB0_4
LBB0_6:
	mov	w0, #0
LBB0_7:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ; @AMDGPU_IRQ_CLIENTID_LEGACY
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"sdma%d"

	.comm	_AMDGPU_SDMA_IRQ_INSTANCE0,4,2  ; @AMDGPU_SDMA_IRQ_INSTANCE0
	.comm	_AMDGPU_SDMA_IRQ_INSTANCE1,4,2  ; @AMDGPU_SDMA_IRQ_INSTANCE1
	.no_dead_strip	_si_dma_sw_init
.subsections_via_symbols
