	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_lvds_get_config
_intel_lvds_get_config:                 ## @intel_lvds_get_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movl	(%rdi), %edi
	callq	_to_i915
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_to_lvds_encoder
	movq	%rax, %rbx
	movq	_INTEL_OUTPUT_LVDS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%eax, 20(%r15)
	movl	(%rbx), %edi
	callq	_I915_READ
	movl	%eax, %ebx
	movq	_LVDS_HSYNC_POLARITY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%ebx, %eax
	jne	LBB0_1
## %bb.2:
	movq	_DRM_MODE_FLAG_PHSYNC@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_DRM_MODE_FLAG_NHSYNC@GOTPCREL(%rip), %rax
LBB0_3:
	movq	_LVDS_VSYNC_POLARITY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%ebx, %ecx
	jne	LBB0_4
## %bb.5:
	movq	_DRM_MODE_FLAG_PVSYNC@GOTPCREL(%rip), %rcx
	jmp	LBB0_6
LBB0_4:
	movq	_DRM_MODE_FLAG_NVSYNC@GOTPCREL(%rip), %rcx
LBB0_6:
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	orl	%ecx, 4(%r15)
	movq	%r14, %rdi
	callq	_INTEL_GEN
	cmpl	$4, %eax
	jg	LBB0_8
## %bb.7:
	movq	_LVDS_BORDER_ENABLE@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movl	%ebx, 12(%r15)
LBB0_8:
	movq	%r14, %rdi
	callq	_INTEL_GEN
	cmpl	$3, %eax
	jg	LBB0_10
## %bb.9:
	movq	_PFIT_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movq	_PANEL_8TO6_DITHER_ENABLE@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	orl	%eax, 16(%r15)
LBB0_10:
	movl	(%r15), %eax
	movl	%eax, 8(%r15)
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_OUTPUT_LVDS,4,2          ## @INTEL_OUTPUT_LVDS
	.comm	_LVDS_HSYNC_POLARITY,4,2        ## @LVDS_HSYNC_POLARITY
	.comm	_DRM_MODE_FLAG_NHSYNC,4,2       ## @DRM_MODE_FLAG_NHSYNC
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ## @DRM_MODE_FLAG_PHSYNC
	.comm	_LVDS_VSYNC_POLARITY,4,2        ## @LVDS_VSYNC_POLARITY
	.comm	_DRM_MODE_FLAG_NVSYNC,4,2       ## @DRM_MODE_FLAG_NVSYNC
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ## @DRM_MODE_FLAG_PVSYNC
	.comm	_LVDS_BORDER_ENABLE,4,2         ## @LVDS_BORDER_ENABLE
	.comm	_PFIT_CONTROL,4,2               ## @PFIT_CONTROL
	.comm	_PANEL_8TO6_DITHER_ENABLE,4,2   ## @PANEL_8TO6_DITHER_ENABLE
	.no_dead_strip	_intel_lvds_get_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_lvds_get_config
_intel_lvds_get_config:                 ; @intel_lvds_get_config
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x21, x0
	ldr	w0, [x0]
	bl	_to_i915
	mov	x20, x0
	mov	x0, x21
	bl	_to_lvds_encoder
	mov	x21, x0
Lloh0:
	adrp	x8, _INTEL_OUTPUT_LVDS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_OUTPUT_LVDS@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_BIT
	ldr	w8, [x19, #20]
	orr	w8, w8, w0
	str	w8, [x19, #20]
	ldr	w0, [x21]
	bl	_I915_READ
	mov	x21, x0
Lloh3:
	adrp	x8, _LVDS_HSYNC_POLARITY@GOTPAGE
Lloh4:
	ldr	x8, [x8, _LVDS_HSYNC_POLARITY@GOTPAGEOFF]
Lloh5:
	adrp	x9, _DRM_MODE_FLAG_PHSYNC@GOTPAGE
Lloh6:
	ldr	x9, [x9, _DRM_MODE_FLAG_PHSYNC@GOTPAGEOFF]
Lloh7:
	adrp	x10, _DRM_MODE_FLAG_NHSYNC@GOTPAGE
Lloh8:
	ldr	x10, [x10, _DRM_MODE_FLAG_NHSYNC@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	tst	w8, w0
	csel	x8, x9, x10, eq
	ldr	w8, [x8]
Lloh10:
	adrp	x9, _LVDS_VSYNC_POLARITY@GOTPAGE
Lloh11:
	ldr	x9, [x9, _LVDS_VSYNC_POLARITY@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
Lloh13:
	adrp	x10, _DRM_MODE_FLAG_PVSYNC@GOTPAGE
Lloh14:
	ldr	x10, [x10, _DRM_MODE_FLAG_PVSYNC@GOTPAGEOFF]
Lloh15:
	adrp	x11, _DRM_MODE_FLAG_NVSYNC@GOTPAGE
Lloh16:
	ldr	x11, [x11, _DRM_MODE_FLAG_NVSYNC@GOTPAGEOFF]
	tst	w9, w0
	csel	x9, x10, x11, eq
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [x19, #4]
	orr	w8, w8, w9
	str	w8, [x19, #4]
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #4
	b.gt	LBB0_2
; %bb.1:
Lloh17:
	adrp	x8, _LVDS_BORDER_ENABLE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _LVDS_BORDER_ENABLE@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	and	w8, w8, w21
	str	w8, [x19, #12]
LBB0_2:
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #4
	b.ge	LBB0_4
; %bb.3:
Lloh20:
	adrp	x8, _PFIT_CONTROL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PFIT_CONTROL@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	bl	_I915_READ
Lloh23:
	adrp	x8, _PANEL_8TO6_DITHER_ENABLE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PANEL_8TO6_DITHER_ENABLE@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	and	w8, w8, w0
	ldr	w9, [x19, #16]
	orr	w8, w9, w8
	str	w8, [x19, #16]
LBB0_4:
	ldr	w8, [x19]
	str	w8, [x19, #8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh9
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_OUTPUT_LVDS,4,2          ; @INTEL_OUTPUT_LVDS
	.comm	_LVDS_HSYNC_POLARITY,4,2        ; @LVDS_HSYNC_POLARITY
	.comm	_DRM_MODE_FLAG_NHSYNC,4,2       ; @DRM_MODE_FLAG_NHSYNC
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ; @DRM_MODE_FLAG_PHSYNC
	.comm	_LVDS_VSYNC_POLARITY,4,2        ; @LVDS_VSYNC_POLARITY
	.comm	_DRM_MODE_FLAG_NVSYNC,4,2       ; @DRM_MODE_FLAG_NVSYNC
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ; @DRM_MODE_FLAG_PVSYNC
	.comm	_LVDS_BORDER_ENABLE,4,2         ; @LVDS_BORDER_ENABLE
	.comm	_PFIT_CONTROL,4,2               ; @PFIT_CONTROL
	.comm	_PANEL_8TO6_DITHER_ENABLE,4,2   ; @PANEL_8TO6_DITHER_ENABLE
	.no_dead_strip	_intel_lvds_get_config
.subsections_via_symbols
