	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ads1015_get_adc_result
_ads1015_get_adc_result:                ## @ads1015_get_adc_result
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	testl	%esi, %esi
	js	LBB0_2
## %bb.1:
	movl	%esi, %ebx
	movq	_ADS1015_CHANNELS@GOTPCREL(%rip), %rax
	cmpl	%esi, (%rax)
	jle	LBB0_2
## %bb.3:
	movq	%rdx, %r14
	movq	%rdi, %r15
	movl	8(%rdi), %edi
	movq	_ADS1015_CFG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	xorl	%eax, %eax
	callq	_regmap_read
	testl	%eax, %eax
	jne	LBB0_12
## %bb.4:
	movq	32(%r15), %rdx
	movl	%ebx, %r12d
	movl	(%rdx,%r12,8), %eax
	movq	_ADS1015_CFG_MUX_MASK@GOTPCREL(%rip), %rcx
	movq	_ADS1015_CFG_PGA_MASK@GOTPCREL(%rip), %rsi
	movl	(%rsi), %r13d
	orl	(%rcx), %r13d
	movq	_ADS1015_CFG_DR_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r13d
	movq	_ADS1015_CFG_MUX_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %ebx
	movq	_ADS1015_CFG_PGA_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movslq	4(%rdx,%r12,8), %rsi
	orl	%ebx, %eax
	movq	_ADS1015_CFG_DR_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	movl	%esi, %ebx
	shll	%cl, %ebx
	orl	%eax, %ebx
	movq	%r15, %rdi
	callq	_ads1015_event_channel_enabled
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movq	_ADS1015_CFG_COMP_QUE_MASK@GOTPCREL(%rip), %rax
	movq	24(%r15), %rcx
	movl	(%rcx,%r12,4), %edx
	movq	_ADS1015_CFG_COMP_QUE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_ADS1015_CFG_COMP_MODE_MASK@GOTPCREL(%rip), %rsi
	shll	%cl, %edx
	orl	(%rax), %r13d
	movq	_ADS1015_CFG_COMP_MODE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	(%r15), %eax
	shll	%cl, %eax
	orl	(%rsi), %r13d
	orl	%ebx, %edx
	orl	%eax, %edx
	movl	%edx, %ebx
LBB0_6:
	movl	-44(%rbp), %eax
	xorl	%eax, %ebx
	andl	%r13d, %ebx
	xorl	%eax, %ebx
	cmpl	%ebx, %eax
	jne	LBB0_7
## %bb.9:
	cmpl	$0, 4(%r15)
	jne	LBB0_10
	jmp	LBB0_11
LBB0_2:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_12
LBB0_7:
	movl	8(%r15), %edi
	movq	_ADS1015_CFG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edx
	callq	_regmap_write
	testl	%eax, %eax
	jne	LBB0_12
## %bb.8:
	movl	$1, 4(%r15)
LBB0_10:
	movq	_ADS1015_CFG_DR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-44(%rbp), %eax
	movq	_ADS1015_CFG_DR_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shrl	%cl, %eax
	movq	_USEC_PER_SEC@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	16(%r15), %rcx
	cltq
	movl	(%rcx,%rax,4), %esi
	callq	_DIV_ROUND_UP
	movl	%eax, %ebx
	movl	(%r12), %edi
	movq	16(%r15), %rax
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movl	(%rax,%rcx,4), %esi
	callq	_DIV_ROUND_UP
	addl	%ebx, %eax
	cltq
	imulq	$1717986919, %rax, %rcx         ## imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	leal	(%rcx,%rax), %esi
	incl	%esi
	movl	%ecx, %edi
	addl	%eax, %edi
	callq	_usleep_range
	movl	$0, 4(%r15)
LBB0_11:
	movl	8(%r15), %edi
	movq	_ADS1015_CONV_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	_regmap_read
LBB0_12:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ADS1015_CHANNELS,4,2           ## @ADS1015_CHANNELS
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_ADS1015_CFG_REG,4,2            ## @ADS1015_CFG_REG
	.comm	_ADS1015_CFG_MUX_MASK,4,2       ## @ADS1015_CFG_MUX_MASK
	.comm	_ADS1015_CFG_PGA_MASK,4,2       ## @ADS1015_CFG_PGA_MASK
	.comm	_ADS1015_CFG_DR_MASK,4,2        ## @ADS1015_CFG_DR_MASK
	.comm	_ADS1015_CFG_MUX_SHIFT,4,2      ## @ADS1015_CFG_MUX_SHIFT
	.comm	_ADS1015_CFG_PGA_SHIFT,4,2      ## @ADS1015_CFG_PGA_SHIFT
	.comm	_ADS1015_CFG_DR_SHIFT,4,2       ## @ADS1015_CFG_DR_SHIFT
	.comm	_ADS1015_CFG_COMP_QUE_MASK,4,2  ## @ADS1015_CFG_COMP_QUE_MASK
	.comm	_ADS1015_CFG_COMP_MODE_MASK,4,2 ## @ADS1015_CFG_COMP_MODE_MASK
	.comm	_ADS1015_CFG_COMP_QUE_SHIFT,4,2 ## @ADS1015_CFG_COMP_QUE_SHIFT
	.comm	_ADS1015_CFG_COMP_MODE_SHIFT,4,2 ## @ADS1015_CFG_COMP_MODE_SHIFT
	.comm	_USEC_PER_SEC,4,2               ## @USEC_PER_SEC
	.comm	_ADS1015_CONV_REG,4,2           ## @ADS1015_CONV_REG
	.no_dead_strip	_ads1015_get_adc_result
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ads1015_get_adc_result
_ads1015_get_adc_result:                ; @ads1015_get_adc_result
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	tbnz	w1, #31, LBB0_7
; %bb.1:
	mov	x21, x1
Lloh0:
	adrp	x8, _ADS1015_CHANNELS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ADS1015_CHANNELS@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w1
	b.le	LBB0_7
; %bb.2:
	mov	x19, x2
	mov	x20, x0
	ldr	w0, [x0, #8]
Lloh3:
	adrp	x23, _ADS1015_CFG_REG@GOTPAGE
Lloh4:
	ldr	x23, [x23, _ADS1015_CFG_REG@GOTPAGEOFF]
	ldr	w1, [x23]
	add	x8, sp, #12
	str	x8, [sp]
	bl	_regmap_read
	cbnz	w0, LBB0_12
; %bb.3:
	ldr	x8, [x20, #32]
	add	x8, x8, w21, uxtw #3
Lloh5:
	adrp	x9, _ADS1015_CFG_MUX_MASK@GOTPAGE
Lloh6:
	ldr	x9, [x9, _ADS1015_CFG_MUX_MASK@GOTPAGEOFF]
	ldp	w10, w22, [x8]
                                        ; kill: def $w22 killed $w22 def $x22
	sxtw	x22, w22
Lloh7:
	ldr	w8, [x9]
Lloh8:
	adrp	x9, _ADS1015_CFG_PGA_MASK@GOTPAGE
Lloh9:
	ldr	x9, [x9, _ADS1015_CFG_PGA_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh11:
	adrp	x24, _ADS1015_CFG_DR_MASK@GOTPAGE
Lloh12:
	ldr	x24, [x24, _ADS1015_CFG_DR_MASK@GOTPAGEOFF]
	ldr	w9, [x24]
	orr	w26, w8, w9
Lloh13:
	adrp	x8, _ADS1015_CFG_MUX_SHIFT@GOTPAGE
Lloh14:
	ldr	x8, [x8, _ADS1015_CFG_MUX_SHIFT@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	lsl	w8, w21, w8
Lloh16:
	adrp	x9, _ADS1015_CFG_PGA_SHIFT@GOTPAGE
Lloh17:
	ldr	x9, [x9, _ADS1015_CFG_PGA_SHIFT@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	lsl	w9, w10, w9
	orr	w8, w9, w8
Lloh19:
	adrp	x25, _ADS1015_CFG_DR_SHIFT@GOTPAGE
Lloh20:
	ldr	x25, [x25, _ADS1015_CFG_DR_SHIFT@GOTPAGEOFF]
	ldr	w9, [x25]
	lsl	w9, w22, w9
	orr	w27, w8, w9
	mov	x0, x20
	bl	_ads1015_event_channel_enabled
	cbz	x0, LBB0_5
; %bb.4:
	mov	w8, w21
Lloh21:
	adrp	x9, _ADS1015_CFG_COMP_QUE_MASK@GOTPAGE
Lloh22:
	ldr	x9, [x9, _ADS1015_CFG_COMP_QUE_MASK@GOTPAGEOFF]
Lloh23:
	adrp	x10, _ADS1015_CFG_COMP_MODE_MASK@GOTPAGE
Lloh24:
	ldr	x10, [x10, _ADS1015_CFG_COMP_MODE_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
Lloh26:
	ldr	w10, [x10]
	orr	w9, w9, w26
	ldr	x11, [x20, #24]
	ldr	w8, [x11, x8, lsl #2]
	orr	w26, w9, w10
Lloh27:
	adrp	x9, _ADS1015_CFG_COMP_QUE_SHIFT@GOTPAGE
Lloh28:
	ldr	x9, [x9, _ADS1015_CFG_COMP_QUE_SHIFT@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	ldr	w9, [x20]
Lloh30:
	adrp	x10, _ADS1015_CFG_COMP_MODE_SHIFT@GOTPAGE
Lloh31:
	ldr	x10, [x10, _ADS1015_CFG_COMP_MODE_SHIFT@GOTPAGEOFF]
Lloh32:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w8, w27
	orr	w27, w8, w9
LBB0_5:
	ldr	w8, [sp, #12]
	bic	w9, w8, w26
	and	w10, w27, w26
	orr	w2, w9, w10
	cmp	w8, w2
	b.ne	LBB0_8
; %bb.6:
	ldr	w8, [x20, #4]
	cbnz	w8, LBB0_10
	b	LBB0_11
LBB0_7:
Lloh33:
	adrp	x8, _EINVAL@GOTPAGE
Lloh34:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_12
LBB0_8:
	ldr	w0, [x20, #8]
	ldr	w1, [x23]
	bl	_regmap_write
	cbnz	w0, LBB0_12
; %bb.9:
	mov	w8, #1
	str	w8, [x20, #4]
LBB0_10:
	ldr	w8, [sp, #12]
	ldr	w9, [x24]
	and	w8, w9, w8
	ldr	w9, [x25]
	lsr	w8, w8, w9
Lloh36:
	adrp	x23, _USEC_PER_SEC@GOTPAGE
Lloh37:
	ldr	x23, [x23, _USEC_PER_SEC@GOTPAGEOFF]
	ldr	w0, [x23]
	ldr	x9, [x20, #16]
	ldr	w1, [x9, w8, sxtw #2]
	bl	_DIV_ROUND_UP
	mov	x21, x0
	ldr	w0, [x23]
	ldr	x8, [x20, #16]
	ldr	w1, [x8, x22, lsl #2]
	bl	_DIV_ROUND_UP
	add	w8, w0, w21
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	smull	x9, w8, w9
	lsr	x10, x9, #63
	asr	x9, x9, #34
	add	w9, w9, w10
	add	w0, w9, w8
	add	w1, w0, #1
	bl	_usleep_range
	str	wzr, [x20, #4]
LBB0_11:
	ldr	w0, [x20, #8]
Lloh38:
	adrp	x8, _ADS1015_CONV_REG@GOTPAGE
Lloh39:
	ldr	x8, [x8, _ADS1015_CONV_REG@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	str	x19, [sp]
	bl	_regmap_read
LBB0_12:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh25
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.cfi_endproc
                                        ; -- End function
	.comm	_ADS1015_CHANNELS,4,2           ; @ADS1015_CHANNELS
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_ADS1015_CFG_REG,4,2            ; @ADS1015_CFG_REG
	.comm	_ADS1015_CFG_MUX_MASK,4,2       ; @ADS1015_CFG_MUX_MASK
	.comm	_ADS1015_CFG_PGA_MASK,4,2       ; @ADS1015_CFG_PGA_MASK
	.comm	_ADS1015_CFG_DR_MASK,4,2        ; @ADS1015_CFG_DR_MASK
	.comm	_ADS1015_CFG_MUX_SHIFT,4,2      ; @ADS1015_CFG_MUX_SHIFT
	.comm	_ADS1015_CFG_PGA_SHIFT,4,2      ; @ADS1015_CFG_PGA_SHIFT
	.comm	_ADS1015_CFG_DR_SHIFT,4,2       ; @ADS1015_CFG_DR_SHIFT
	.comm	_ADS1015_CFG_COMP_QUE_MASK,4,2  ; @ADS1015_CFG_COMP_QUE_MASK
	.comm	_ADS1015_CFG_COMP_MODE_MASK,4,2 ; @ADS1015_CFG_COMP_MODE_MASK
	.comm	_ADS1015_CFG_COMP_QUE_SHIFT,4,2 ; @ADS1015_CFG_COMP_QUE_SHIFT
	.comm	_ADS1015_CFG_COMP_MODE_SHIFT,4,2 ; @ADS1015_CFG_COMP_MODE_SHIFT
	.comm	_USEC_PER_SEC,4,2               ; @USEC_PER_SEC
	.comm	_ADS1015_CONV_REG,4,2           ; @ADS1015_CONV_REG
	.no_dead_strip	_ads1015_get_adc_result
.subsections_via_symbols
