	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_dp_set_clock
_intel_dp_set_clock:                    ## @intel_dp_set_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %r14
	movl	(%rdi), %edi
	callq	_to_i915
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_IS_G4X
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_g4x_dpll@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_2:
	movq	%rbx, %rdi
	callq	_HAS_PCH_SPLIT
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_pch_dpll@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_4:
	movq	%rbx, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movq	_chv_dpll@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_6:
	movq	%rbx, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	je	LBB0_15
## %bb.7:
	movq	_vlv_dpll@GOTPCREL(%rip), %rax
LBB0_8:
	movq	(%rax), %rbx
	movq	%rbx, %rdi
	callq	_ARRAY_SIZE
	testq	%rbx, %rbx
	je	LBB0_15
## %bb.9:
	testl	%eax, %eax
	je	LBB0_15
## %bb.10:
	jle	LBB0_15
## %bb.11:
	movq	(%r14), %rcx
	movl	%eax, %eax
	shlq	$4, %rax
	xorl	%edx, %edx
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	cmpq	(%rbx,%rdx), %rcx
	je	LBB0_13
## %bb.14:                              ##   in Loop: Header=BB0_12 Depth=1
	addq	$16, %rdx
	cmpq	%rdx, %rax
	jne	LBB0_12
	jmp	LBB0_15
LBB0_13:
	movl	8(%rbx,%rdx), %eax
	movl	%eax, 12(%r14)
	movl	$1, 8(%r14)
LBB0_15:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_g4x_dpll,8,3                   ## @g4x_dpll
	.comm	_pch_dpll,8,3                   ## @pch_dpll
	.comm	_chv_dpll,8,3                   ## @chv_dpll
	.comm	_vlv_dpll,8,3                   ## @vlv_dpll
	.no_dead_strip	_intel_dp_set_clock
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_dp_set_clock
_intel_dp_set_clock:                    ; @intel_dp_set_clock
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	ldr	w0, [x0]
	bl	_to_i915
	mov	x20, x0
	bl	_IS_G4X
	cbz	x0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _g4x_dpll@GOTPAGE
Lloh1:
	ldr	x8, [x8, _g4x_dpll@GOTPAGEOFF]
	b	LBB0_8
LBB0_2:
	mov	x0, x20
	bl	_HAS_PCH_SPLIT
	cbz	x0, LBB0_4
; %bb.3:
Lloh2:
	adrp	x8, _pch_dpll@GOTPAGE
Lloh3:
	ldr	x8, [x8, _pch_dpll@GOTPAGEOFF]
	b	LBB0_8
LBB0_4:
	mov	x0, x20
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_6
; %bb.5:
Lloh4:
	adrp	x8, _chv_dpll@GOTPAGE
Lloh5:
	ldr	x8, [x8, _chv_dpll@GOTPAGEOFF]
	b	LBB0_8
LBB0_6:
	mov	x0, x20
	bl	_IS_VALLEYVIEW
	cbz	x0, LBB0_13
; %bb.7:
Lloh6:
	adrp	x8, _vlv_dpll@GOTPAGE
Lloh7:
	ldr	x8, [x8, _vlv_dpll@GOTPAGEOFF]
LBB0_8:
	ldr	x20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	cmp	x20, #0
	ccmp	w0, #0, #4, ne
	ccmp	w0, #1, #8, ne
	b.lt	LBB0_13
; %bb.9:
	ldr	x8, [x19]
	mov	w9, w0
	add	x10, x20, #8
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	ldur	x11, [x10, #-8]
	cmp	x8, x11
	b.eq	LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_10 Depth=1
	add	x10, x10, #16
	subs	x9, x9, #1
	b.ne	LBB0_10
	b	LBB0_13
LBB0_12:
	ldr	w8, [x10]
	mov	w9, #1
	stp	w9, w8, [x19, #8]
LBB0_13:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_g4x_dpll,8,3                   ; @g4x_dpll
	.comm	_pch_dpll,8,3                   ; @pch_dpll
	.comm	_chv_dpll,8,3                   ; @chv_dpll
	.comm	_vlv_dpll,8,3                   ; @vlv_dpll
	.no_dead_strip	_intel_dp_set_clock
.subsections_via_symbols
