	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function uvd_v4_2_ring_emit_ib
_uvd_v4_2_ring_emit_ib:                 ## @uvd_v4_2_ring_emit_ib
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdx, %r14
	movq	%rdi, %rbx
	movq	_mmUVD_RBC_IB_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	4(%r14), %esi
	movq	%rbx, %rdi
	callq	_amdgpu_ring_write
	movq	_mmUVD_RBC_IB_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	(%r14), %esi
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_mmUVD_RBC_IB_BASE,4,2          ## @mmUVD_RBC_IB_BASE
	.comm	_mmUVD_RBC_IB_SIZE,4,2          ## @mmUVD_RBC_IB_SIZE
	.no_dead_strip	_uvd_v4_2_ring_emit_ib
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function uvd_v4_2_ring_emit_ib
_uvd_v4_2_ring_emit_ib:                 ; @uvd_v4_2_ring_emit_ib
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x2
	mov	x20, x0
Lloh0:
	adrp	x8, _mmUVD_RBC_IB_BASE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _mmUVD_RBC_IB_BASE@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x20
	bl	_amdgpu_ring_write
	ldr	w1, [x19, #4]
	mov	x0, x20
	bl	_amdgpu_ring_write
Lloh3:
	adrp	x8, _mmUVD_RBC_IB_SIZE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _mmUVD_RBC_IB_SIZE@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x20
	bl	_amdgpu_ring_write
	ldr	w1, [x19]
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_mmUVD_RBC_IB_BASE,4,2          ; @mmUVD_RBC_IB_BASE
	.comm	_mmUVD_RBC_IB_SIZE,4,2          ; @mmUVD_RBC_IB_SIZE
	.no_dead_strip	_uvd_v4_2_ring_emit_ib
.subsections_via_symbols
