	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function skl_get_dram_type
_skl_get_dram_type:                     ## @skl_get_dram_type
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movq	_SKL_DRAM_DDR_TYPE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	addl	$-128, %ecx
	cmpl	$4, %ecx
	jae	LBB0_1
## %bb.2:
	movslq	%ecx, %rax
	leaq	l_switch.table.skl_get_dram_type(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	jmp	LBB0_3
LBB0_1:
	movl	%eax, %edi
	callq	_MISSING_CASE
	movq	_INTEL_DRAM_UNKNOWN@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN,4,2 ## @SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN
	.comm	_SKL_DRAM_DDR_TYPE_MASK,4,2     ## @SKL_DRAM_DDR_TYPE_MASK
	.comm	_INTEL_DRAM_DDR3,4,2            ## @INTEL_DRAM_DDR3
	.comm	_INTEL_DRAM_DDR4,4,2            ## @INTEL_DRAM_DDR4
	.comm	_INTEL_DRAM_LPDDR3,4,2          ## @INTEL_DRAM_LPDDR3
	.comm	_INTEL_DRAM_LPDDR4,4,2          ## @INTEL_DRAM_LPDDR4
	.comm	_INTEL_DRAM_UNKNOWN,4,2         ## @INTEL_DRAM_UNKNOWN
	.no_dead_strip	_skl_get_dram_type
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.skl_get_dram_type
l_switch.table.skl_get_dram_type:
	.quad	_INTEL_DRAM_LPDDR4
	.quad	_INTEL_DRAM_LPDDR3
	.quad	_INTEL_DRAM_DDR4
	.quad	_INTEL_DRAM_DDR3

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function skl_get_dram_type
_skl_get_dram_type:                     ; @skl_get_dram_type
	.cfi_startproc
; %bb.0:
	stp	x29, x30, [sp, #-16]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 16
	mov	x29, sp
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
Lloh0:
	adrp	x8, _SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_I915_READ
Lloh3:
	adrp	x8, _SKL_DRAM_DDR_TYPE_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SKL_DRAM_DDR_TYPE_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	and	w8, w8, w0
	sub	w8, w8, #128
	cmp	w8, #4
	b.hs	LBB0_2
; %bb.1:
Lloh6:
	adrp	x9, l_switch.table.skl_get_dram_type@PAGE
Lloh7:
	add	x9, x9, l_switch.table.skl_get_dram_type@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	b	LBB0_3
LBB0_2:
	bl	_MISSING_CASE
Lloh8:
	adrp	x8, _INTEL_DRAM_UNKNOWN@GOTPAGE
Lloh9:
	ldr	x8, [x8, _INTEL_DRAM_UNKNOWN@GOTPAGEOFF]
LBB0_3:
	ldr	w0, [x8]
	ldp	x29, x30, [sp], #16             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN,4,2 ; @SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN
	.comm	_SKL_DRAM_DDR_TYPE_MASK,4,2     ; @SKL_DRAM_DDR_TYPE_MASK
	.comm	_INTEL_DRAM_DDR3,4,2            ; @INTEL_DRAM_DDR3
	.comm	_INTEL_DRAM_DDR4,4,2            ; @INTEL_DRAM_DDR4
	.comm	_INTEL_DRAM_LPDDR3,4,2          ; @INTEL_DRAM_LPDDR3
	.comm	_INTEL_DRAM_LPDDR4,4,2          ; @INTEL_DRAM_LPDDR4
	.comm	_INTEL_DRAM_UNKNOWN,4,2         ; @INTEL_DRAM_UNKNOWN
	.no_dead_strip	_skl_get_dram_type
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.skl_get_dram_type
l_switch.table.skl_get_dram_type:
	.quad	_INTEL_DRAM_LPDDR4
	.quad	_INTEL_DRAM_LPDDR3
	.quad	_INTEL_DRAM_DDR4
	.quad	_INTEL_DRAM_DDR3

.subsections_via_symbols
