	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_dp_voltage_max       ## -- Begin function intel_ddi_dp_voltage_max
	.p2align	4, 0x90
_intel_ddi_dp_voltage_max:              ## @intel_ddi_dp_voltage_max
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	leaq	8(%rdi), %rbx
	movl	8(%rdi), %edi
	callq	_to_i915
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_enc_to_intel_dp
	movq	%rax, %rbx
	movl	(%r12), %r15d
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_intel_port_to_phy
	movl	%eax, %r13d
	movq	%r14, %rdi
	callq	_INTEL_GEN
	movq	%r14, %rdi
	cmpl	$11, %eax
	jl	LBB0_4
## %bb.1:
	movl	%r13d, %esi
	callq	_intel_phy_is_combo
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	movl	4(%r12), %esi
	movl	(%rbx), %edx
	leaq	-44(%rbp), %rcx
	movq	%r14, %rdi
	callq	_icl_get_combo_buf_trans
	jmp	LBB0_15
LBB0_4:
	callq	_IS_CANNONLAKE
	testq	%rax, %rax
	je	LBB0_8
## %bb.5:
	movl	4(%r12), %eax
	movq	_INTEL_OUTPUT_EDP@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_7
## %bb.6:
	leaq	-44(%rbp), %rsi
	movq	%r14, %rdi
	callq	_cnl_get_buf_trans_edp
	jmp	LBB0_15
LBB0_3:
	movq	_icl_mg_phy_ddi_translations@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_ARRAY_SIZE
	movl	%eax, -44(%rbp)
	jmp	LBB0_15
LBB0_8:
	movq	%r14, %rdi
	callq	_IS_GEN9_LP
	movl	4(%r12), %ecx
	movq	_INTEL_OUTPUT_EDP@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	testq	%rax, %rax
	je	LBB0_12
## %bb.9:
	leaq	-44(%rbp), %rsi
	movq	%r14, %rdi
	cmpl	%edx, %ecx
	jne	LBB0_11
## %bb.10:
	callq	_bxt_get_buf_trans_edp
	jmp	LBB0_15
LBB0_7:
	leaq	-44(%rbp), %rsi
	movq	%r14, %rdi
	callq	_cnl_get_buf_trans_dp
	jmp	LBB0_15
LBB0_12:
	cmpl	%edx, %ecx
	jne	LBB0_14
## %bb.13:
	leaq	-44(%rbp), %rdx
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_intel_ddi_get_buf_trans_edp
	jmp	LBB0_15
LBB0_11:
	callq	_bxt_get_buf_trans_dp
	jmp	LBB0_15
LBB0_14:
	leaq	-44(%rbp), %rdx
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_intel_ddi_get_buf_trans_dp
LBB0_15:
	xorl	%edi, %edi
	cmpl	$0, -44(%rbp)
	setle	%dil
	callq	_WARN_ON
	testq	%rax, %rax
	je	LBB0_16
## %bb.17:
	movl	$1, -44(%rbp)
	movl	$1, %ebx
	jmp	LBB0_18
LBB0_16:
	movl	-44(%rbp), %ebx
LBB0_18:
	movq	_index_to_dp_signal_levels@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	callq	_ARRAY_SIZE
	xorl	%edi, %edi
	cmpl	%eax, %ebx
	setg	%dil
	callq	_WARN_ON
	testq	%rax, %rax
	je	LBB0_19
## %bb.20:
	movq	(%r14), %rdi
	callq	_ARRAY_SIZE
	movl	%eax, -44(%rbp)
	jmp	LBB0_21
LBB0_19:
	movl	-44(%rbp), %eax
LBB0_21:
	movq	(%r14), %rcx
	movslq	%eax, %rdx
	movq	_DP_TRAIN_VOLTAGE_SWING_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-4(%rcx,%rdx,4), %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_icl_mg_phy_ddi_translations,8,3 ## @icl_mg_phy_ddi_translations
	.comm	_INTEL_OUTPUT_EDP,4,2           ## @INTEL_OUTPUT_EDP
	.comm	_index_to_dp_signal_levels,8,3  ## @index_to_dp_signal_levels
	.comm	_DP_TRAIN_VOLTAGE_SWING_MASK,4,2 ## @DP_TRAIN_VOLTAGE_SWING_MASK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_dp_voltage_max       ; -- Begin function intel_ddi_dp_voltage_max
	.p2align	2
_intel_ddi_dp_voltage_max:              ; @intel_ddi_dp_voltage_max
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x0
	mov	x21, x0
	ldr	w0, [x21, #8]!
	bl	_to_i915
	mov	x19, x0
	mov	x0, x21
	bl	_enc_to_intel_dp
	mov	x22, x0
	ldr	w21, [x20]
	mov	x0, x19
	mov	x1, x21
	bl	_intel_port_to_phy
	mov	x23, x0
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #11
	b.lt	LBB0_3
; %bb.1:
	mov	x0, x19
	mov	x1, x23
	bl	_intel_phy_is_combo
	cbz	x0, LBB0_6
; %bb.2:
	ldr	w1, [x20, #4]
	ldr	w2, [x22]
	add	x3, sp, #12
	mov	x0, x19
	bl	_icl_get_combo_buf_trans
	b	LBB0_15
LBB0_3:
	mov	x0, x19
	bl	_IS_CANNONLAKE
	cbz	x0, LBB0_7
; %bb.4:
	ldr	w8, [x20, #4]
Lloh0:
	adrp	x9, _INTEL_OUTPUT_EDP@GOTPAGE
Lloh1:
	ldr	x9, [x9, _INTEL_OUTPUT_EDP@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	add	x1, sp, #12
	mov	x0, x19
	cmp	w8, w9
	b.ne	LBB0_10
; %bb.5:
	bl	_cnl_get_buf_trans_edp
	b	LBB0_15
LBB0_6:
Lloh3:
	adrp	x8, _icl_mg_phy_ddi_translations@GOTPAGE
Lloh4:
	ldr	x8, [x8, _icl_mg_phy_ddi_translations@GOTPAGEOFF]
Lloh5:
	ldr	x0, [x8]
	bl	_ARRAY_SIZE
	str	w0, [sp, #12]
	b	LBB0_15
LBB0_7:
	mov	x0, x19
	bl	_IS_GEN9_LP
	ldr	w8, [x20, #4]
Lloh6:
	adrp	x9, _INTEL_OUTPUT_EDP@GOTPAGE
Lloh7:
	ldr	x9, [x9, _INTEL_OUTPUT_EDP@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	cmp	w8, w9
	cbz	x0, LBB0_11
; %bb.8:
	add	x1, sp, #12
	mov	x0, x19
	b.ne	LBB0_13
; %bb.9:
	bl	_bxt_get_buf_trans_edp
	b	LBB0_15
LBB0_10:
	bl	_cnl_get_buf_trans_dp
	b	LBB0_15
LBB0_11:
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x21
	b.ne	LBB0_14
; %bb.12:
	bl	_intel_ddi_get_buf_trans_edp
	b	LBB0_15
LBB0_13:
	bl	_bxt_get_buf_trans_dp
	b	LBB0_15
LBB0_14:
	bl	_intel_ddi_get_buf_trans_dp
LBB0_15:
	ldr	w8, [sp, #12]
	cmp	w8, #1
	cset	w0, lt
	bl	_WARN_ON
	cbz	x0, LBB0_17
; %bb.16:
	mov	w20, #1
	str	w20, [sp, #12]
	b	LBB0_18
LBB0_17:
	ldr	w20, [sp, #12]
LBB0_18:
Lloh9:
	adrp	x19, _index_to_dp_signal_levels@GOTPAGE
Lloh10:
	ldr	x19, [x19, _index_to_dp_signal_levels@GOTPAGEOFF]
	ldr	x0, [x19]
	bl	_ARRAY_SIZE
	cmp	w20, w0
	cset	w0, gt
	bl	_WARN_ON
	cbz	x0, LBB0_20
; %bb.19:
	ldr	x0, [x19]
	bl	_ARRAY_SIZE
	str	w0, [sp, #12]
	b	LBB0_21
LBB0_20:
	ldr	w0, [sp, #12]
LBB0_21:
	ldr	x8, [x19]
	sub	w9, w0, #1
	ldr	w8, [x8, w9, sxtw #2]
Lloh11:
	adrp	x9, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGE
Lloh12:
	ldr	x9, [x9, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	and	w0, w9, w8
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_icl_mg_phy_ddi_translations,8,3 ; @icl_mg_phy_ddi_translations
	.comm	_INTEL_OUTPUT_EDP,4,2           ; @INTEL_OUTPUT_EDP
	.comm	_index_to_dp_signal_levels,8,3  ; @index_to_dp_signal_levels
	.comm	_DP_TRAIN_VOLTAGE_SWING_MASK,4,2 ; @DP_TRAIN_VOLTAGE_SWING_MASK
.subsections_via_symbols
