	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function socfpga_fpga_ops_configure_complete
_socfpga_fpga_ops_configure_complete:   ## @socfpga_fpga_ops_configure_complete
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	(%rdi), %rbx
	movq	%rbx, %rdi
	callq	_socfpga_fpga_wait_for_config_done
	testl	%eax, %eax
	jne	LBB0_5
## %bb.1:
	movq	_SOCFPGA_FPGMGR_CTL_OFST@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_SOCFPGA_FPGMGR_CTL_AXICFGEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_socfpga_fpga_clr_bitsl
	movq	%rbx, %rdi
	movl	$4, %esi
	callq	_socfpga_fpga_dclk_set_and_wait_clear
	testq	%rax, %rax
	jne	LBB0_2
## %bb.3:
	movq	_SOCFPGA_FPGMGR_STAT_USER_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_socfpga_fpga_wait_for_state
	testq	%rax, %rax
	je	LBB0_4
LBB0_2:
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_5:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_4:
	movl	(%r14), %esi
	movq	_SOCFPGA_FPGMGR_CTL_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_socfpga_fpga_clr_bitsl
	xorl	%eax, %eax
	jmp	LBB0_5
	.cfi_endproc
                                        ## -- End function
	.comm	_SOCFPGA_FPGMGR_CTL_OFST,4,2    ## @SOCFPGA_FPGMGR_CTL_OFST
	.comm	_SOCFPGA_FPGMGR_CTL_AXICFGEN,4,2 ## @SOCFPGA_FPGMGR_CTL_AXICFGEN
	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
	.comm	_SOCFPGA_FPGMGR_STAT_USER_MODE,4,2 ## @SOCFPGA_FPGMGR_STAT_USER_MODE
	.comm	_SOCFPGA_FPGMGR_CTL_EN,4,2      ## @SOCFPGA_FPGMGR_CTL_EN
	.no_dead_strip	_socfpga_fpga_ops_configure_complete
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function socfpga_fpga_ops_configure_complete
_socfpga_fpga_ops_configure_complete:   ; @socfpga_fpga_ops_configure_complete
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	x19, [x0]
	mov	x0, x19
	bl	_socfpga_fpga_wait_for_config_done
	cbnz	w0, LBB0_4
; %bb.1:
Lloh0:
	adrp	x20, _SOCFPGA_FPGMGR_CTL_OFST@GOTPAGE
Lloh1:
	ldr	x20, [x20, _SOCFPGA_FPGMGR_CTL_OFST@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x8, _SOCFPGA_FPGMGR_CTL_AXICFGEN@GOTPAGE
Lloh3:
	ldr	x8, [x8, _SOCFPGA_FPGMGR_CTL_AXICFGEN@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_socfpga_fpga_clr_bitsl
	mov	x0, x19
	mov	w1, #4
	bl	_socfpga_fpga_dclk_set_and_wait_clear
	cbnz	x0, LBB0_3
; %bb.2:
Lloh5:
	adrp	x8, _SOCFPGA_FPGMGR_STAT_USER_MODE@GOTPAGE
Lloh6:
	ldr	x8, [x8, _SOCFPGA_FPGMGR_STAT_USER_MODE@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_socfpga_fpga_wait_for_state
	cbz	x0, LBB0_5
LBB0_3:
Lloh8:
	adrp	x8, _ETIMEDOUT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _ETIMEDOUT@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_4:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_5:
	ldr	w1, [x20]
Lloh11:
	adrp	x8, _SOCFPGA_FPGMGR_CTL_EN@GOTPAGE
Lloh12:
	ldr	x8, [x8, _SOCFPGA_FPGMGR_CTL_EN@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_socfpga_fpga_clr_bitsl
	mov	w0, #0
	b	LBB0_4
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_SOCFPGA_FPGMGR_CTL_OFST,4,2    ; @SOCFPGA_FPGMGR_CTL_OFST
	.comm	_SOCFPGA_FPGMGR_CTL_AXICFGEN,4,2 ; @SOCFPGA_FPGMGR_CTL_AXICFGEN
	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
	.comm	_SOCFPGA_FPGMGR_STAT_USER_MODE,4,2 ; @SOCFPGA_FPGMGR_STAT_USER_MODE
	.comm	_SOCFPGA_FPGMGR_CTL_EN,4,2      ; @SOCFPGA_FPGMGR_CTL_EN
	.no_dead_strip	_socfpga_fpga_ops_configure_complete
.subsections_via_symbols
