	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	___intel_wait_for_register      ## -- Begin function __intel_wait_for_register
	.p2align	4, 0x90
___intel_wait_for_register:             ## @__intel_wait_for_register
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, %r15d
	movl	%r9d, -60(%rbp)                 ## 4-byte Spill
	movl	%r8d, -64(%rbp)                 ## 4-byte Spill
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	movl	%edx, %r13d
	movl	%esi, %r12d
	movq	%rdi, %rbx
	movq	_FW_REG_READ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_intel_uncore_forcewake_for_reg
	movl	%eax, %r14d
	movl	%r15d, %edi
	callq	_might_sleep_if
	movq	%rbx, %rdi
	callq	_spin_lock_irq
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_intel_uncore_forcewake_get__locked
	leaq	-44(%rbp), %rax
	movq	%rax, (%rsp)
	movq	%rbx, %rdi
	movl	%r12d, -48(%rbp)                ## 4-byte Spill
	movl	%r12d, %esi
	movl	%r13d, -56(%rbp)                ## 4-byte Spill
	movl	%r13d, %edx
	movl	-52(%rbp), %ecx                 ## 4-byte Reload
	movl	-64(%rbp), %r8d                 ## 4-byte Reload
	xorl	%r9d, %r9d
	callq	___intel_wait_for_register_fw
	movl	%eax, %r15d
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	-60(%rbp), %r12d                ## 4-byte Reload
	callq	_intel_uncore_forcewake_put__locked
	movq	%rbx, %rdi
	callq	_spin_unlock_irq
	testl	%r12d, %r12d
	je	LBB0_1
## %bb.2:
	testl	%r15d, %r15d
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	je	LBB0_4
## %bb.3:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_intel_uncore_read_notrace
	movl	%eax, -44(%rbp)
	movl	-56(%rbp), %ecx                 ## 4-byte Reload
	andl	%eax, %ecx
	xorl	%esi, %esi
	cmpl	-52(%rbp), %ecx                 ## 4-byte Folded Reload
	sete	%sil
	imull	$1000, %r12d, %edx              ## imm = 0x3E8
	movl	%eax, %edi
	movl	$10, %ecx
	movl	$1000, %r8d                     ## imm = 0x3E8
	callq	___wait_for
	movl	%eax, %r15d
	jmp	LBB0_4
LBB0_1:
	movl	-48(%rbp), %r14d                ## 4-byte Reload
LBB0_4:
	movl	-44(%rbp), %edx
	xorl	%edi, %edi
	movl	%r14d, %esi
	movl	$4, %ecx
	movl	$1, %r8d
	callq	_trace_i915_reg_rw
	movq	16(%rbp), %rcx
	testq	%rcx, %rcx
	je	LBB0_6
## %bb.5:
	movl	-44(%rbp), %eax
	movl	%eax, (%rcx)
LBB0_6:
	movl	%r15d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_FW_REG_READ,4,2                ## @FW_REG_READ
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	___intel_wait_for_register      ; -- Begin function __intel_wait_for_register
	.p2align	2
___intel_wait_for_register:             ; @__intel_wait_for_register
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x6
	mov	x21, x5
	mov	x25, x4
	mov	x22, x3
	mov	x23, x2
	mov	x20, x1
	mov	x24, x0
Lloh0:
	adrp	x8, _FW_REG_READ@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FW_REG_READ@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	bl	_intel_uncore_forcewake_for_reg
	mov	x26, x0
	mov	x0, x21
	bl	_might_sleep_if
	mov	x0, x24
	bl	_spin_lock_irq
	mov	x0, x24
	mov	x1, x26
	bl	_intel_uncore_forcewake_get__locked
	add	x6, sp, #12
	mov	x0, x24
	mov	x1, x20
	mov	x2, x23
	mov	x3, x22
	mov	x4, x25
	mov	w5, #0
	bl	___intel_wait_for_register_fw
	mov	x25, x0
	mov	x0, x24
	mov	x1, x26
	bl	_intel_uncore_forcewake_put__locked
	mov	x0, x24
	bl	_spin_unlock_irq
	cbz	w21, LBB0_3
; %bb.1:
	cbz	w25, LBB0_3
; %bb.2:
	mov	x0, x24
	mov	x1, x20
	bl	_intel_uncore_read_notrace
	str	w0, [sp, #12]
	and	w8, w0, w23
	cmp	w8, w22
	cset	w1, eq
	mov	w8, #1000
	mul	w2, w21, w8
	mov	w3, #10
	mov	w4, #1000
	bl	___wait_for
	mov	x25, x0
LBB0_3:
	ldr	w2, [sp, #12]
	mov	w0, #0
	mov	x1, x20
	mov	w3, #4
	mov	w4, #1
	bl	_trace_i915_reg_rw
	cbz	x19, LBB0_5
; %bb.4:
	ldr	w8, [sp, #12]
	str	w8, [x19]
LBB0_5:
	mov	x0, x25
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_FW_REG_READ,4,2                ; @FW_REG_READ
.subsections_via_symbols
