	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vega10_populate_avfs_parameters
_vega10_populate_avfs_parameters:       ## @vega10_populate_avfs_parameters
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$224, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rax
	movq	8(%rdi), %r12
	movq	(%rax), %r14
	xorps	%xmm0, %xmm0
	movaps	%xmm0, -48(%rbp)
	movaps	%xmm0, -64(%rbp)
	movaps	%xmm0, -80(%rbp)
	movaps	%xmm0, -96(%rbp)
	movaps	%xmm0, -112(%rbp)
	movaps	%xmm0, -128(%rbp)
	movaps	%xmm0, -144(%rbp)
	movaps	%xmm0, -160(%rbp)
	movaps	%xmm0, -176(%rbp)
	movaps	%xmm0, -192(%rbp)
	movaps	%xmm0, -208(%rbp)
	movaps	%xmm0, -224(%rbp)
	movaps	%xmm0, -240(%rbp)
	movaps	%xmm0, -256(%rbp)
	movq	$255, 400(%r12)
	movq	$0, 392(%r12)
	movq	64(%r12), %rax
	movq	_GNLD_AVFS@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rcx
	cmpl	$0, (%rax,%rcx,4)
	je	LBB0_23
## %bb.1:
	leaq	-256(%rbp), %rsi
	callq	_pp_atomfwctrl_get_avfs_information
	testl	%eax, %eax
	je	LBB0_2
## %bb.22:
	movq	64(%r12), %rax
	movq	(%rbx), %rcx
	movl	$0, (%rax,%rcx,4)
	jmp	LBB0_23
LBB0_2:
	movq	-48(%rbp), %rdi
	callq	_convert_to_vid
	movq	%rax, 400(%r12)
	movq	-56(%rbp), %rdi
	callq	_convert_to_vid
	movq	%rax, 392(%r12)
	movl	-60(%rbp), %edi
	callq	_cpu_to_le32
	movq	384(%r12), %rcx
	movq	%rax, (%rcx)
	movl	-64(%rbp), %edi
	callq	_cpu_to_le32
	movq	384(%r12), %rcx
	movq	%rax, 8(%rcx)
	movl	-68(%rbp), %edi
	callq	_cpu_to_le32
	movq	384(%r12), %rcx
	movq	%rax, 16(%rcx)
	movl	-76(%rbp), %edi
	callq	_cpu_to_le16
	movq	%rax, 376(%r12)
	movl	-72(%rbp), %edi
	callq	_cpu_to_le16
	movq	%rax, 368(%r12)
	movl	-76(%rbp), %edi
	callq	_cpu_to_le16
	movq	%rax, 360(%r12)
	movl	-80(%rbp), %edi
	callq	_cpu_to_le16
	movq	%rax, 352(%r12)
	movl	-84(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 344(%r12)
	movl	$20, 312(%r12)
	movl	-88(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 336(%r12)
	movl	$20, 316(%r12)
	movl	-92(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 328(%r12)
	movl	$20, 320(%r12)
	movl	-96(%rbp), %eax
	movl	%eax, 304(%r12)
	movl	-100(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 296(%r12)
	movl	$20, 264(%r12)
	movl	-104(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 288(%r12)
	movl	$20, 268(%r12)
	movl	-108(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 280(%r12)
	movl	$20, 272(%r12)
	movl	-112(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 256(%r12)
	movl	-116(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 248(%r12)
	movl	-120(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 240(%r12)
	movabsq	$51539607576, %r15              ## imm = 0xC00000018
	movq	%r15, 224(%r12)
	movq	$0, 232(%r12)
	movl	-124(%rbp), %eax
	movl	%eax, 216(%r12)
	movl	-128(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 208(%r12)
	movl	-132(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 200(%r12)
	movl	-136(%rbp), %edi
	callq	_cpu_to_le32
	movq	%rax, 192(%r12)
	movq	%r15, 176(%r12)
	movq	$0, 184(%r12)
	cmpq	$0, (%r14)
	je	LBB0_5
## %bb.3:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r14), %rax
	movq	(%rax,%rbx,8), %rdi
	callq	_convert_to_vid
	movq	168(%r12), %rcx
	movq	%rax, (%rcx,%rbx,8)
	incq	%rbx
	cmpq	(%r14), %rbx
	jb	LBB0_4
LBB0_5:
	movq	_PPREGKEY_VEGA10QUADRATICEQUATION_DFLT@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	movq	(%r12), %rsi
	cmpq	%rsi, %rcx
	je	LBB0_8
## %bb.6:
	movq	8(%r12), %rdi
	cmpq	%rdi, %rcx
	jne	LBB0_7
LBB0_8:
	movq	-144(%rbp), %rsi
	movq	160(%r12), %rax
	movq	_DSPCLK_DISPCLK@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(%rdx,%rdx,4), %rdi
	movq	%rsi, 32(%rax,%rdi,8)
	movaps	-160(%rbp), %xmm0
	movups	%xmm0, 16(%rax,%rdi,8)
	jmp	LBB0_9
LBB0_7:
	movq	160(%r12), %rax
	movq	_DSPCLK_DISPCLK@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(%rdx,%rdx,4), %rbx
	movq	%rsi, 32(%rax,%rbx,8)
	movq	%rdi, 24(%rax,%rbx,8)
	movq	96(%r12), %rsi
	movq	%rsi, 16(%rax,%rbx,8)
LBB0_9:
	leaq	(%rdx,%rdx,4), %rdx
	movq	%r15, (%rax,%rdx,8)
	movl	$12, 8(%rax,%rdx,8)
	movq	16(%r12), %rsi
	cmpq	%rsi, %rcx
	je	LBB0_12
## %bb.10:
	movq	24(%r12), %rdi
	cmpq	%rdi, %rcx
	jne	LBB0_11
LBB0_12:
	movq	_DSPCLK_DCEFCLK@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(%rdx,%rdx,4), %rsi
	movaps	-176(%rbp), %xmm0
	movups	%xmm0, 24(%rax,%rsi,8)
	leaq	-184(%rbp), %rsi
	jmp	LBB0_13
LBB0_11:
	movq	_DSPCLK_DCEFCLK@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(%rdx,%rdx,4), %rbx
	movq	%rsi, 32(%rax,%rbx,8)
	movq	%rdi, 24(%rax,%rbx,8)
	leaq	88(%r12), %rsi
LBB0_13:
	movq	(%rsi), %rsi
	leaq	(%rdx,%rdx,4), %rdx
	movq	%rsi, 16(%rax,%rdx,8)
	movq	%r15, (%rax,%rdx,8)
	movl	$12, 8(%rax,%rdx,8)
	movq	32(%r12), %rsi
	cmpq	%rsi, %rcx
	je	LBB0_16
## %bb.14:
	movq	40(%r12), %rdi
	cmpq	%rdi, %rcx
	jne	LBB0_15
LBB0_16:
	movq	_DSPCLK_PIXCLK@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(%rdx,%rdx,4), %rsi
	movups	-200(%rbp), %xmm0
	movups	%xmm0, 24(%rax,%rsi,8)
	leaq	-208(%rbp), %rsi
	jmp	LBB0_17
LBB0_15:
	movq	_DSPCLK_PIXCLK@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(%rdx,%rdx,4), %rbx
	movq	%rsi, 32(%rax,%rbx,8)
	movq	%rdi, 24(%rax,%rbx,8)
	leaq	80(%r12), %rsi
LBB0_17:
	movq	(%rsi), %rsi
	leaq	(%rdx,%rdx,4), %rdx
	movq	%rsi, 16(%rax,%rdx,8)
	movq	%r15, (%rax,%rdx,8)
	movl	$12, 8(%rax,%rdx,8)
	movq	48(%r12), %rdx
	cmpq	%rdx, %rcx
	je	LBB0_20
## %bb.18:
	movq	56(%r12), %rsi
	cmpq	%rsi, %rcx
	jne	LBB0_19
LBB0_20:
	movq	_DSPCLK_PHYCLK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,4), %rdx
	movaps	-224(%rbp), %xmm0
	movups	%xmm0, 24(%rax,%rdx,8)
	leaq	-232(%rbp), %rdx
	jmp	LBB0_21
LBB0_19:
	movq	_DSPCLK_PHYCLK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,4), %rdi
	movq	%rdx, 32(%rax,%rdi,8)
	movq	%rsi, 24(%rax,%rdi,8)
	leaq	72(%r12), %rdx
LBB0_21:
	movq	(%rdx), %rdx
	leaq	(%rcx,%rcx,4), %rcx
	movq	%rdx, 16(%rax,%rcx,8)
	movq	%r15, (%rax,%rcx,8)
	movl	$12, 8(%rax,%rcx,8)
	movl	-236(%rbp), %eax
	movl	%eax, 156(%r12)
	movl	$20, 136(%r12)
	movl	-240(%rbp), %eax
	movl	%eax, 152(%r12)
	movl	$20, 140(%r12)
	movl	-244(%rbp), %eax
	movl	%eax, 148(%r12)
	movl	$20, 144(%r12)
	movl	-248(%rbp), %eax
	movl	%eax, 128(%r12)
	movl	-252(%rbp), %eax
	movl	%eax, 124(%r12)
	movl	-256(%rbp), %eax
	movl	%eax, 120(%r12)
	movq	%r15, 104(%r12)
	movq	$0, 112(%r12)
LBB0_23:
	xorl	%eax, %eax
	addq	$224, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GNLD_AVFS,8,3                  ## @GNLD_AVFS
	.comm	_PPREGKEY_VEGA10QUADRATICEQUATION_DFLT,8,3 ## @PPREGKEY_VEGA10QUADRATICEQUATION_DFLT
	.comm	_DSPCLK_DISPCLK,8,3             ## @DSPCLK_DISPCLK
	.comm	_DSPCLK_DCEFCLK,8,3             ## @DSPCLK_DCEFCLK
	.comm	_DSPCLK_PIXCLK,8,3              ## @DSPCLK_PIXCLK
	.comm	_DSPCLK_PHYCLK,8,3              ## @DSPCLK_PHYCLK
	.no_dead_strip	_vega10_populate_avfs_parameters
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function vega10_populate_avfs_parameters
lCPI0_0:
	.long	24                              ; 0x18
	.long	12                              ; 0xc
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_vega10_populate_avfs_parameters:       ; @vega10_populate_avfs_parameters
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #304
	.cfi_def_cfa_offset 304
	stp	d9, d8, [sp, #224]              ; 16-byte Folded Spill
	stp	x28, x27, [sp, #240]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #256]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #272]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #288]            ; 16-byte Folded Spill
	add	x29, sp, #288
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w27, -56
	.cfi_offset w28, -64
	.cfi_offset b8, -72
	.cfi_offset b9, -80
	ldp	x8, x19, [x0]
	ldr	x20, [x8]
	movi.2d	v0, #0000000000000000
	stp	q0, q0, [sp, #192]
	stp	q0, q0, [sp, #160]
	stp	q0, q0, [sp, #128]
	stp	q0, q0, [sp, #96]
	stp	q0, q0, [sp, #64]
	stp	q0, q0, [sp, #32]
	stp	q0, q0, [sp]
	mov	w8, #255
	stp	xzr, x8, [x19, #392]
	ldr	x8, [x19, #64]
Lloh0:
	adrp	x21, _GNLD_AVFS@GOTPAGE
Lloh1:
	ldr	x21, [x21, _GNLD_AVFS@GOTPAGEOFF]
	ldr	x9, [x21]
	ldr	w8, [x8, x9, lsl #2]
	cbz	w8, LBB0_23
; %bb.1:
	mov	x1, sp
	bl	_pp_atomfwctrl_get_avfs_information
	cbz	w0, LBB0_3
; %bb.2:
	ldr	x8, [x19, #64]
	ldr	x9, [x21]
	str	wzr, [x8, x9, lsl #2]
	b	LBB0_23
LBB0_3:
	ldr	x0, [sp, #208]
	bl	_convert_to_vid
	str	x0, [x19, #400]
	ldr	x0, [sp, #200]
	bl	_convert_to_vid
	str	x0, [x19, #392]
	ldr	w0, [sp, #196]
	bl	_cpu_to_le32
	ldr	x8, [x19, #384]
	str	x0, [x8]
	ldr	w0, [sp, #192]
	bl	_cpu_to_le32
	ldr	x8, [x19, #384]
	str	x0, [x8, #8]
	ldr	w0, [sp, #188]
	bl	_cpu_to_le32
	ldr	x8, [x19, #384]
	str	x0, [x8, #16]
	ldr	w0, [sp, #180]
	bl	_cpu_to_le16
	str	x0, [x19, #376]
	ldr	w0, [sp, #184]
	bl	_cpu_to_le16
	str	x0, [x19, #368]
	ldr	w0, [sp, #180]
	bl	_cpu_to_le16
	str	x0, [x19, #360]
	ldr	w0, [sp, #176]
	bl	_cpu_to_le16
	str	x0, [x19, #352]
	ldr	w0, [sp, #172]
	bl	_cpu_to_le32
	str	x0, [x19, #344]
	mov	w21, #20
	str	w21, [x19, #312]
	ldr	w0, [sp, #168]
	bl	_cpu_to_le32
	str	x0, [x19, #336]
	str	w21, [x19, #316]
	ldr	w0, [sp, #164]
	bl	_cpu_to_le32
	str	x0, [x19, #328]
	str	w21, [x19, #320]
	ldp	w0, w8, [sp, #156]
	str	w8, [x19, #304]
	bl	_cpu_to_le32
	str	x0, [x19, #296]
	str	w21, [x19, #264]
	ldr	w0, [sp, #152]
	bl	_cpu_to_le32
	str	x0, [x19, #288]
	str	w21, [x19, #268]
	ldr	w0, [sp, #148]
	bl	_cpu_to_le32
	str	x0, [x19, #280]
	str	w21, [x19, #272]
	ldr	w0, [sp, #144]
	bl	_cpu_to_le32
	str	x0, [x19, #256]
	ldr	w0, [sp, #140]
	bl	_cpu_to_le32
	str	x0, [x19, #248]
	ldr	w0, [sp, #136]
	bl	_cpu_to_le32
Lloh2:
	adrp	x8, lCPI0_0@PAGE
Lloh3:
	ldr	d8, [x8, lCPI0_0@PAGEOFF]
	str	d8, [x19, #224]
	stp	xzr, x0, [x19, #232]
	ldp	w0, w8, [sp, #128]
	str	w8, [x19, #216]
	bl	_cpu_to_le32
	str	x0, [x19, #208]
	ldr	w0, [sp, #124]
	bl	_cpu_to_le32
	str	x0, [x19, #200]
	ldr	w0, [sp, #120]
	bl	_cpu_to_le32
	str	d8, [x19, #176]
	stp	xzr, x0, [x19, #184]
	ldr	x8, [x20]
	cbz	x8, LBB0_6
; %bb.4:
	mov	x21, #0
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x20, #8]
	lsl	x22, x21, #3
	ldr	x0, [x8, x22]
	bl	_convert_to_vid
	ldr	x8, [x19, #168]
	str	x0, [x8, x22]
	add	x21, x21, #1
	ldr	x8, [x20]
	cmp	x21, x8
	b.lo	LBB0_5
LBB0_6:
Lloh4:
	adrp	x8, _PPREGKEY_VEGA10QUADRATICEQUATION_DFLT@GOTPAGE
Lloh5:
	ldr	x8, [x8, _PPREGKEY_VEGA10QUADRATICEQUATION_DFLT@GOTPAGEOFF]
Lloh6:
	ldr	x9, [x8]
	ldr	x11, [x19]
	cmp	x9, x11
	b.eq	LBB0_8
; %bb.7:
	ldr	x12, [x19, #8]
	cmp	x9, x12
	b.ne	LBB0_9
LBB0_8:
	ldr	x11, [sp, #112]
	ldr	x8, [x19, #160]
Lloh7:
	adrp	x10, _DSPCLK_DISPCLK@GOTPAGE
Lloh8:
	ldr	x10, [x10, _DSPCLK_DISPCLK@GOTPAGEOFF]
Lloh9:
	ldr	x10, [x10]
	mov	w12, #40
	madd	x12, x10, x12, x8
	str	x11, [x12, #32]
	ldr	q0, [sp, #96]
	str	q0, [x12, #16]
	b	LBB0_10
LBB0_9:
	ldr	x8, [x19, #160]
Lloh10:
	adrp	x10, _DSPCLK_DISPCLK@GOTPAGE
Lloh11:
	ldr	x10, [x10, _DSPCLK_DISPCLK@GOTPAGEOFF]
Lloh12:
	ldr	x10, [x10]
	mov	w13, #40
	madd	x13, x10, x13, x8
	stp	x12, x11, [x13, #24]
	ldr	x11, [x19, #96]
	str	x11, [x13, #16]
LBB0_10:
	mov	w11, #40
	madd	x10, x10, x11, x8
	str	d8, [x10]
	mov	w11, #12
	str	w11, [x10, #8]
	ldr	x11, [x19, #16]
	cmp	x9, x11
	b.eq	LBB0_12
; %bb.11:
	ldr	x12, [x19, #24]
	cmp	x9, x12
	b.ne	LBB0_13
LBB0_12:
	ldr	x11, [sp, #88]
Lloh13:
	adrp	x10, _DSPCLK_DCEFCLK@GOTPAGE
Lloh14:
	ldr	x10, [x10, _DSPCLK_DCEFCLK@GOTPAGEOFF]
Lloh15:
	ldr	x10, [x10]
	mov	w12, #40
	madd	x12, x10, x12, x8
	str	x11, [x12, #32]
	ldr	x11, [sp, #80]
	str	x11, [x12, #24]
	mov	x11, sp
	add	x11, x11, #72
	b	LBB0_14
LBB0_13:
Lloh16:
	adrp	x10, _DSPCLK_DCEFCLK@GOTPAGE
Lloh17:
	ldr	x10, [x10, _DSPCLK_DCEFCLK@GOTPAGEOFF]
Lloh18:
	ldr	x10, [x10]
	mov	w13, #40
	madd	x13, x10, x13, x8
	stp	x12, x11, [x13, #24]
	add	x11, x19, #88
LBB0_14:
	ldr	x11, [x11]
	mov	w12, #40
	madd	x10, x10, x12, x8
	str	x11, [x10, #16]
	str	d8, [x10]
	mov	w11, #12
	str	w11, [x10, #8]
	ldr	x11, [x19, #32]
	cmp	x9, x11
	b.eq	LBB0_16
; %bb.15:
	ldr	x12, [x19, #40]
	cmp	x9, x12
	b.ne	LBB0_17
LBB0_16:
	ldr	x11, [sp, #64]
Lloh19:
	adrp	x10, _DSPCLK_PIXCLK@GOTPAGE
Lloh20:
	ldr	x10, [x10, _DSPCLK_PIXCLK@GOTPAGEOFF]
Lloh21:
	ldr	x10, [x10]
	mov	w12, #40
	madd	x12, x10, x12, x8
	str	x11, [x12, #32]
	ldr	x11, [sp, #56]
	str	x11, [x12, #24]
	mov	x11, sp
	add	x11, x11, #48
	b	LBB0_18
LBB0_17:
Lloh22:
	adrp	x10, _DSPCLK_PIXCLK@GOTPAGE
Lloh23:
	ldr	x10, [x10, _DSPCLK_PIXCLK@GOTPAGEOFF]
Lloh24:
	ldr	x10, [x10]
	mov	w13, #40
	madd	x13, x10, x13, x8
	stp	x12, x11, [x13, #24]
	add	x11, x19, #80
LBB0_18:
	ldr	x11, [x11]
	mov	w12, #40
	madd	x10, x10, x12, x8
	str	x11, [x10, #16]
	str	d8, [x10]
	mov	w11, #12
	str	w11, [x10, #8]
	ldr	x10, [x19, #48]
	cmp	x9, x10
	b.eq	LBB0_20
; %bb.19:
	ldr	x11, [x19, #56]
	cmp	x9, x11
	b.ne	LBB0_21
LBB0_20:
	ldr	x10, [sp, #40]
Lloh25:
	adrp	x9, _DSPCLK_PHYCLK@GOTPAGE
Lloh26:
	ldr	x9, [x9, _DSPCLK_PHYCLK@GOTPAGEOFF]
Lloh27:
	ldr	x9, [x9]
	mov	w11, #40
	madd	x11, x9, x11, x8
	str	x10, [x11, #32]
	ldr	x10, [sp, #32]
	str	x10, [x11, #24]
	mov	x10, sp
	add	x10, x10, #24
	b	LBB0_22
LBB0_21:
Lloh28:
	adrp	x9, _DSPCLK_PHYCLK@GOTPAGE
Lloh29:
	ldr	x9, [x9, _DSPCLK_PHYCLK@GOTPAGEOFF]
Lloh30:
	ldr	x9, [x9]
	mov	w12, #40
	madd	x12, x9, x12, x8
	stp	x11, x10, [x12, #24]
	add	x10, x19, #72
LBB0_22:
	ldr	x10, [x10]
	mov	w11, #40
	madd	x8, x9, x11, x8
	str	x10, [x8, #16]
	str	d8, [x8]
	mov	w9, #12
	str	w9, [x8, #8]
	ldr	w8, [sp, #20]
	str	w8, [x19, #156]
	movi.2s	v0, #20
	str	d0, [x19, #136]
	ldur	d0, [sp, #12]
	stur	d0, [x19, #148]
	mov	w8, #20
	str	w8, [x19, #144]
	ldr	w8, [sp, #8]
	str	w8, [x19, #128]
	ldr	d0, [sp]
	str	d0, [x19, #120]
	str	d8, [x19, #104]
	str	xzr, [x19, #112]
LBB0_23:
	mov	w0, #0
	ldp	x29, x30, [sp, #288]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #272]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #256]            ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #240]            ; 16-byte Folded Reload
	ldp	d9, d8, [sp, #224]              ; 16-byte Folded Reload
	add	sp, sp, #304
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdr	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.cfi_endproc
                                        ; -- End function
	.comm	_GNLD_AVFS,8,3                  ; @GNLD_AVFS
	.comm	_PPREGKEY_VEGA10QUADRATICEQUATION_DFLT,8,3 ; @PPREGKEY_VEGA10QUADRATICEQUATION_DFLT
	.comm	_DSPCLK_DISPCLK,8,3             ; @DSPCLK_DISPCLK
	.comm	_DSPCLK_DCEFCLK,8,3             ; @DSPCLK_DCEFCLK
	.comm	_DSPCLK_PIXCLK,8,3              ; @DSPCLK_PIXCLK
	.comm	_DSPCLK_PHYCLK,8,3              ; @DSPCLK_PHYCLK
	.no_dead_strip	_vega10_populate_avfs_parameters
.subsections_via_symbols
