	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function set_pixel_clock_v7
_set_pixel_clock_v7:                    ## @set_pixel_clock_v7
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$128, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movq	_BP_RESULT_FAILURE@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	leaq	-88(%rbp), %rdi
	xorl	%esi, %esi
	movl	$56, %edx
	callq	_memset
	movq	(%r15), %rax
	movl	72(%rbx), %edi
	leaq	-96(%rbp), %rsi
	callq	*32(%rax)
	testq	%rax, %rax
	je	LBB0_18
## %bb.1:
	movq	(%r15), %rax
	movl	68(%rbx), %edi
	leaq	-104(%rbp), %rsi
	callq	*24(%rax)
	testq	%rax, %rax
	je	LBB0_18
## %bb.2:
	movq	-104(%rbp), %rax
	movq	%rax, -40(%rbp)
	movq	-96(%rbp), %rax
	movq	%rax, -48(%rbp)
	movq	(%r15), %rax
	movq	16(%rax), %r12
	movl	64(%rbx), %edi
	callq	_dal_graphics_object_id_get_encoder_id
	movl	%eax, %edi
	callq	*%r12
	movl	%eax, -56(%rbp)
	movq	(%r15), %rax
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	*8(%rax)
	movq	%rax, -64(%rbp)
	movl	60(%rbx), %edi
	callq	_cpu_to_le32
	movl	%eax, -72(%rbp)
	movq	(%r15), %rax
	movl	56(%rbx), %edi
	callq	*(%rax)
	movq	%rax, -80(%rbp)
	cmpq	$0, 48(%rbx)
	je	LBB0_4
## %bb.3:
	movq	_PIXEL_CLOCK_V7_MISC_FORCE_PROG_PPLL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -88(%rbp)
LBB0_4:
	cmpq	$0, 40(%rbx)
	je	LBB0_6
## %bb.5:
	movq	_PIXEL_CLOCK_V7_MISC_REF_DIV_SRC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -88(%rbp)
LBB0_6:
	cmpq	$0, 32(%rbx)
	je	LBB0_8
## %bb.7:
	movq	_PIXEL_CLOCK_V7_MISC_PROG_PHYPLL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -88(%rbp)
LBB0_8:
	cmpq	$0, 24(%rbx)
	je	LBB0_10
## %bb.9:
	movq	_PIXEL_CLOCK_V7_MISC_YUV420_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -88(%rbp)
LBB0_10:
	cmpq	$0, 16(%rbx)
	je	LBB0_12
## %bb.11:
	movq	_PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_XTALIN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -88(%rbp)
LBB0_12:
	cmpq	$0, 8(%rbx)
	je	LBB0_14
## %bb.13:
	movq	_PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_GENLK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -88(%rbp)
LBB0_14:
	movq	(%rbx), %rax
	movq	_SIGNAL_TYPE_DVI_DUAL_LINK@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_16
## %bb.15:
	movq	_PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -88(%rbp)
LBB0_16:
	movq	_SetPixelClock@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	-40(%rbp), %rax
	movq	%rax, 48(%rsp)
	movups	-88(%rbp), %xmm0
	movups	-72(%rbp), %xmm1
	movups	-56(%rbp), %xmm2
	movups	%xmm2, 32(%rsp)
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	callq	_EXEC_BIOS_CMD_TABLE
	testq	%rax, %rax
	je	LBB0_18
## %bb.17:
	movq	_BP_RESULT_OK@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
LBB0_18:
	movl	%r14d, %eax
	addq	$128, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BP_RESULT_FAILURE,4,2          ## @BP_RESULT_FAILURE
	.comm	_PIXEL_CLOCK_V7_MISC_FORCE_PROG_PPLL,4,2 ## @PIXEL_CLOCK_V7_MISC_FORCE_PROG_PPLL
	.comm	_PIXEL_CLOCK_V7_MISC_REF_DIV_SRC,4,2 ## @PIXEL_CLOCK_V7_MISC_REF_DIV_SRC
	.comm	_PIXEL_CLOCK_V7_MISC_PROG_PHYPLL,4,2 ## @PIXEL_CLOCK_V7_MISC_PROG_PHYPLL
	.comm	_PIXEL_CLOCK_V7_MISC_YUV420_MODE,4,2 ## @PIXEL_CLOCK_V7_MISC_YUV420_MODE
	.comm	_PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_XTALIN,4,2 ## @PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_XTALIN
	.comm	_PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_GENLK,4,2 ## @PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_GENLK
	.comm	_SIGNAL_TYPE_DVI_DUAL_LINK,8,3  ## @SIGNAL_TYPE_DVI_DUAL_LINK
	.comm	_PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN,4,2 ## @PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN
	.comm	_SetPixelClock,4,2              ## @SetPixelClock
	.comm	_BP_RESULT_OK,4,2               ## @BP_RESULT_OK
	.no_dead_strip	_set_pixel_clock_v7
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function set_pixel_clock_v7
_set_pixel_clock_v7:                    ; @set_pixel_clock_v7
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #176
	.cfi_def_cfa_offset 176
	stp	x22, x21, [sp, #128]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #144]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #160]            ; 16-byte Folded Spill
	add	x29, sp, #160
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x21, x0
Lloh0:
	adrp	x8, _BP_RESULT_FAILURE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _BP_RESULT_FAILURE@GOTPAGEOFF]
Lloh2:
	ldr	w19, [x8]
	add	x0, sp, #72
	mov	w1, #0
	mov	w2, #56
	bl	_memset
	ldr	x8, [x21]
	ldr	x8, [x8, #32]
	ldr	w0, [x20, #72]
	add	x1, sp, #56
	blr	x8
	cbz	x0, LBB0_17
; %bb.1:
	ldr	x8, [x21]
	ldr	x8, [x8, #24]
	ldr	w0, [x20, #68]
	add	x1, sp, #64
	blr	x8
	cbz	x0, LBB0_17
; %bb.2:
	ldp	x9, x8, [sp, #56]
	stp	x9, x8, [sp, #112]
	ldr	x8, [x21]
	ldr	x22, [x8, #16]
	ldr	w0, [x20, #64]
	bl	_dal_graphics_object_id_get_encoder_id
	blr	x22
	str	w0, [sp, #104]
	ldr	x8, [x21]
	ldr	x8, [x8, #8]
	ldr	x0, [x20]
	mov	w1, #0
	blr	x8
	str	x0, [sp, #96]
	ldr	w0, [x20, #60]
	bl	_cpu_to_le32
	str	w0, [sp, #88]
	ldr	x8, [x21]
	ldr	x8, [x8]
	ldr	w0, [x20, #56]
	blr	x8
	str	x0, [sp, #80]
	ldr	x8, [x20, #48]
	cbz	x8, LBB0_4
; %bb.3:
Lloh3:
	adrp	x8, _PIXEL_CLOCK_V7_MISC_FORCE_PROG_PPLL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PIXEL_CLOCK_V7_MISC_FORCE_PROG_PPLL@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	ldr	w9, [sp, #72]
	orr	w8, w9, w8
	str	w8, [sp, #72]
LBB0_4:
	ldr	x8, [x20, #40]
	cbz	x8, LBB0_6
; %bb.5:
Lloh6:
	adrp	x8, _PIXEL_CLOCK_V7_MISC_REF_DIV_SRC@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PIXEL_CLOCK_V7_MISC_REF_DIV_SRC@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	ldr	w9, [sp, #72]
	orr	w8, w9, w8
	str	w8, [sp, #72]
LBB0_6:
	ldr	x8, [x20, #32]
	cbz	x8, LBB0_8
; %bb.7:
Lloh9:
	adrp	x8, _PIXEL_CLOCK_V7_MISC_PROG_PHYPLL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PIXEL_CLOCK_V7_MISC_PROG_PHYPLL@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	ldr	w9, [sp, #72]
	orr	w8, w9, w8
	str	w8, [sp, #72]
LBB0_8:
	ldr	x8, [x20, #24]
	cbz	x8, LBB0_10
; %bb.9:
Lloh12:
	adrp	x8, _PIXEL_CLOCK_V7_MISC_YUV420_MODE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PIXEL_CLOCK_V7_MISC_YUV420_MODE@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	ldr	w9, [sp, #72]
	orr	w8, w9, w8
	str	w8, [sp, #72]
LBB0_10:
	ldr	x8, [x20, #16]
	cbz	x8, LBB0_12
; %bb.11:
Lloh15:
	adrp	x8, _PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_XTALIN@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_XTALIN@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	ldr	w9, [sp, #72]
	orr	w8, w9, w8
	str	w8, [sp, #72]
LBB0_12:
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_14
; %bb.13:
Lloh18:
	adrp	x8, _PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_GENLK@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_GENLK@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	ldr	w9, [sp, #72]
	orr	w8, w9, w8
	str	w8, [sp, #72]
LBB0_14:
	ldr	x8, [x20]
Lloh21:
	adrp	x9, _SIGNAL_TYPE_DVI_DUAL_LINK@GOTPAGE
Lloh22:
	ldr	x9, [x9, _SIGNAL_TYPE_DVI_DUAL_LINK@GOTPAGEOFF]
Lloh23:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_16
; %bb.15:
Lloh24:
	adrp	x8, _PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	ldr	w9, [sp, #72]
	orr	w8, w9, w8
	str	w8, [sp, #72]
LBB0_16:
Lloh27:
	adrp	x8, _SetPixelClock@GOTPAGE
Lloh28:
	ldr	x8, [x8, _SetPixelClock@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
	ldur	q0, [sp, #72]
	ldur	q1, [sp, #88]
	stp	q0, q1, [sp]
	ldur	q0, [sp, #104]
	str	q0, [sp, #32]
	ldr	x8, [sp, #120]
	str	x8, [sp, #48]
	mov	x1, sp
	bl	_EXEC_BIOS_CMD_TABLE
Lloh30:
	adrp	x8, _BP_RESULT_OK@GOTPAGE
Lloh31:
	ldr	x8, [x8, _BP_RESULT_OK@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	cmp	x0, #0
	csel	w19, w19, w8, eq
LBB0_17:
	mov	x0, x19
	ldp	x29, x30, [sp, #160]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #144]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #128]            ; 16-byte Folded Reload
	add	sp, sp, #176
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_BP_RESULT_FAILURE,4,2          ; @BP_RESULT_FAILURE
	.comm	_PIXEL_CLOCK_V7_MISC_FORCE_PROG_PPLL,4,2 ; @PIXEL_CLOCK_V7_MISC_FORCE_PROG_PPLL
	.comm	_PIXEL_CLOCK_V7_MISC_REF_DIV_SRC,4,2 ; @PIXEL_CLOCK_V7_MISC_REF_DIV_SRC
	.comm	_PIXEL_CLOCK_V7_MISC_PROG_PHYPLL,4,2 ; @PIXEL_CLOCK_V7_MISC_PROG_PHYPLL
	.comm	_PIXEL_CLOCK_V7_MISC_YUV420_MODE,4,2 ; @PIXEL_CLOCK_V7_MISC_YUV420_MODE
	.comm	_PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_XTALIN,4,2 ; @PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_XTALIN
	.comm	_PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_GENLK,4,2 ; @PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_GENLK
	.comm	_SIGNAL_TYPE_DVI_DUAL_LINK,8,3  ; @SIGNAL_TYPE_DVI_DUAL_LINK
	.comm	_PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN,4,2 ; @PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN
	.comm	_SetPixelClock,4,2              ; @SetPixelClock
	.comm	_BP_RESULT_OK,4,2               ; @BP_RESULT_OK
	.no_dead_strip	_set_pixel_clock_v7
.subsections_via_symbols
