	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_athub_v2_0_get_clockgating     ## -- Begin function athub_v2_0_get_clockgating
	.p2align	4, 0x90
_athub_v2_0_get_clockgating:            ## @athub_v2_0_get_clockgating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rsi, %rbx
	movq	_ATHUB@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmATHUB_MISC_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_ATHUB_MISC_CNTL__CG_ENABLE_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_2
## %bb.1:
	movq	_AMD_CG_SUPPORT_ATHUB_MGCG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, (%rbx)
LBB0_2:
	movq	_ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_4
## %bb.3:
	movq	_AMD_CG_SUPPORT_ATHUB_LS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%rbx)
LBB0_4:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ATHUB,4,2                      ## @ATHUB
	.comm	_mmATHUB_MISC_CNTL,4,2          ## @mmATHUB_MISC_CNTL
	.comm	_ATHUB_MISC_CNTL__CG_ENABLE_MASK,4,2 ## @ATHUB_MISC_CNTL__CG_ENABLE_MASK
	.comm	_AMD_CG_SUPPORT_ATHUB_MGCG,4,2  ## @AMD_CG_SUPPORT_ATHUB_MGCG
	.comm	_ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE_MASK,4,2 ## @ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE_MASK
	.comm	_AMD_CG_SUPPORT_ATHUB_LS,4,2    ## @AMD_CG_SUPPORT_ATHUB_LS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_athub_v2_0_get_clockgating     ; -- Begin function athub_v2_0_get_clockgating
	.p2align	2
_athub_v2_0_get_clockgating:            ; @athub_v2_0_get_clockgating
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
Lloh0:
	adrp	x8, _ATHUB@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ATHUB@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _mmATHUB_MISC_CNTL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _mmATHUB_MISC_CNTL@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh6:
	adrp	x8, _ATHUB_MISC_CNTL__CG_ENABLE_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ATHUB_MISC_CNTL__CG_ENABLE_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_2
; %bb.1:
Lloh9:
	adrp	x8, _AMD_CG_SUPPORT_ATHUB_MGCG@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AMD_CG_SUPPORT_ATHUB_MGCG@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_2:
Lloh12:
	adrp	x8, _ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE_MASK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_4
; %bb.3:
Lloh15:
	adrp	x8, _AMD_CG_SUPPORT_ATHUB_LS@GOTPAGE
Lloh16:
	ldr	x8, [x8, _AMD_CG_SUPPORT_ATHUB_LS@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_4:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_ATHUB,4,2                      ; @ATHUB
	.comm	_mmATHUB_MISC_CNTL,4,2          ; @mmATHUB_MISC_CNTL
	.comm	_ATHUB_MISC_CNTL__CG_ENABLE_MASK,4,2 ; @ATHUB_MISC_CNTL__CG_ENABLE_MASK
	.comm	_AMD_CG_SUPPORT_ATHUB_MGCG,4,2  ; @AMD_CG_SUPPORT_ATHUB_MGCG
	.comm	_ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE_MASK,4,2 ; @ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE_MASK
	.comm	_AMD_CG_SUPPORT_ATHUB_LS,4,2    ; @AMD_CG_SUPPORT_ATHUB_LS
.subsections_via_symbols
