	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdma_v4_0_set_irq_funcs
_sdma_v4_0_set_irq_funcs:               ## @sdma_v4_0_set_irq_funcs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	(%rdi), %ecx
	cmpl	$8, %ecx
	jne	LBB0_1
## %bb.2:
	movq	_AMDGPU_SDMA_IRQ_LAST@GOTPCREL(%rip), %rax
	cmpl	$1, %ecx
	je	LBB0_4
	jmp	LBB0_5
LBB0_1:
	movq	_AMDGPU_SDMA_IRQ_INSTANCE2@GOTPCREL(%rip), %rax
	cmpl	$1, %ecx
	jne	LBB0_5
LBB0_4:
	movq	_AMDGPU_SDMA_IRQ_INSTANCE1@GOTPCREL(%rip), %rax
LBB0_5:
	movq	(%rax), %rax
	movq	%rax, 40(%rdi)
	movq	%rax, 16(%rdi)
	movq	_sdma_v4_0_trap_irq_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 32(%rdi)
	movq	_sdma_v4_0_illegal_inst_irq_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 24(%rdi)
	movq	_sdma_v4_0_ecc_irq_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 8(%rdi)
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_SDMA_IRQ_INSTANCE1,8,3  ## @AMDGPU_SDMA_IRQ_INSTANCE1
	.comm	_AMDGPU_SDMA_IRQ_LAST,8,3       ## @AMDGPU_SDMA_IRQ_LAST
	.comm	_AMDGPU_SDMA_IRQ_INSTANCE2,8,3  ## @AMDGPU_SDMA_IRQ_INSTANCE2
	.comm	_sdma_v4_0_trap_irq_funcs,4,2   ## @sdma_v4_0_trap_irq_funcs
	.comm	_sdma_v4_0_illegal_inst_irq_funcs,4,2 ## @sdma_v4_0_illegal_inst_irq_funcs
	.comm	_sdma_v4_0_ecc_irq_funcs,4,2    ## @sdma_v4_0_ecc_irq_funcs
	.no_dead_strip	_sdma_v4_0_set_irq_funcs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdma_v4_0_set_irq_funcs
_sdma_v4_0_set_irq_funcs:               ; @sdma_v4_0_set_irq_funcs
	.cfi_startproc
; %bb.0:
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _AMDGPU_SDMA_IRQ_INSTANCE1@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMDGPU_SDMA_IRQ_INSTANCE1@GOTPAGEOFF]
Lloh2:
	adrp	x10, _AMDGPU_SDMA_IRQ_LAST@GOTPAGE
Lloh3:
	ldr	x10, [x10, _AMDGPU_SDMA_IRQ_LAST@GOTPAGEOFF]
Lloh4:
	adrp	x11, _AMDGPU_SDMA_IRQ_INSTANCE2@GOTPAGE
Lloh5:
	ldr	x11, [x11, _AMDGPU_SDMA_IRQ_INSTANCE2@GOTPAGEOFF]
	cmp	w8, #8
	csel	x10, x10, x11, eq
	cmp	w8, #1
	csel	x8, x9, x10, eq
	ldr	x8, [x8]
	str	x8, [x0, #40]
Lloh6:
	adrp	x9, _sdma_v4_0_trap_irq_funcs@GOTPAGE
Lloh7:
	ldr	x9, [x9, _sdma_v4_0_trap_irq_funcs@GOTPAGEOFF]
Lloh8:
	adrp	x10, _sdma_v4_0_illegal_inst_irq_funcs@GOTPAGE
Lloh9:
	ldr	x10, [x10, _sdma_v4_0_illegal_inst_irq_funcs@GOTPAGEOFF]
	stp	x10, x9, [x0, #24]
Lloh10:
	adrp	x9, _sdma_v4_0_ecc_irq_funcs@GOTPAGE
Lloh11:
	ldr	x9, [x9, _sdma_v4_0_ecc_irq_funcs@GOTPAGEOFF]
	stp	x9, x8, [x0, #8]
	ret
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_SDMA_IRQ_INSTANCE1,8,3  ; @AMDGPU_SDMA_IRQ_INSTANCE1
	.comm	_AMDGPU_SDMA_IRQ_LAST,8,3       ; @AMDGPU_SDMA_IRQ_LAST
	.comm	_AMDGPU_SDMA_IRQ_INSTANCE2,8,3  ; @AMDGPU_SDMA_IRQ_INSTANCE2
	.comm	_sdma_v4_0_trap_irq_funcs,4,2   ; @sdma_v4_0_trap_irq_funcs
	.comm	_sdma_v4_0_illegal_inst_irq_funcs,4,2 ; @sdma_v4_0_illegal_inst_irq_funcs
	.comm	_sdma_v4_0_ecc_irq_funcs,4,2    ; @sdma_v4_0_ecc_irq_funcs
	.no_dead_strip	_sdma_v4_0_set_irq_funcs
.subsections_via_symbols
