	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function chv_dpio_cmn_power_well_enable
_chv_dpio_cmn_power_well_enable:        ## @chv_dpio_cmn_power_well_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	(%rsi), %rax
	movq	(%rax), %rax
	movq	_VLV_DISP_PW_DPIO_CMN_BC@GOTPCREL(%rip), %rbx
	cmpq	(%rbx), %rax
	setne	%cl
	movq	_CHV_DISP_PW_DPIO_CMN_D@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rax
	movq	%rdi, %r14
	setne	%al
	andb	%cl, %al
	movzbl	%al, %edi
	callq	_WARN_ON_ONCE
	movq	(%r15), %rax
	movq	(%rax), %rdx
	movq	(%rbx), %rsi
	movq	_PIPE_A@GOTPCREL(%rip), %rax
	movq	_PIPE_C@GOTPCREL(%rip), %rcx
	movq	%rdx, -64(%rbp)                 ## 8-byte Spill
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	cmpq	%rsi, %rdx
	jne	LBB0_1
## %bb.2:
	movq	_DPIO_PHY0@GOTPCREL(%rip), %rdx
	jmp	LBB0_3
LBB0_1:
	movq	_DPIO_PHY1@GOTPCREL(%rip), %rdx
LBB0_3:
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	(%rcx), %r12d
	movl	(%rdx), %r13d
	movl	$1, %edi
	callq	_udelay
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	$1, %edx
	callq	_vlv_set_power_well
	movq	_DISPLAY_PHY_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%r13d, %edi
	callq	_PHY_POWERGOOD
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	movl	$1, %ecx
	callq	_intel_de_wait_for_set
	testq	%rax, %rax
	je	LBB0_5
## %bb.4:
	leaq	L_.str(%rip), %rdi
	movl	%r13d, %esi
	callq	_DRM_ERROR
LBB0_5:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	cmpq	%rax, -64(%rbp)                 ## 8-byte Folded Reload
	cmovel	-44(%rbp), %r12d                ## 4-byte Folded Reload
	movq	%r14, %rdi
	callq	_vlv_dpio_get
	movq	_CHV_CMN_DW28@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_vlv_dpio_read
	movq	_DPIO_DYNPWRDOWNEN_CH0@GOTPCREL(%rip), %rcx
	movq	_DPIO_CL1POWERDOWNEN@GOTPCREL(%rip), %rdx
	orl	(%rcx), %eax
	orl	(%rdx), %eax
	movq	_DPIO_SUS_CLK_CONFIG_GATE_CLKREQ@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%r12d, %esi
	movl	%eax, %ecx
	callq	_vlv_dpio_write
	movq	(%r15), %rax
	movq	(%rax), %rax
	movq	_VLV_DISP_PW_DPIO_CMN_BC@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movq	_CHV_CMN_DW30@GOTPCREL(%rip), %rbx
	cmoveq	__CHV_CMN_DW6_CH1@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	_DPIO_CL2_LDOFUSE_PWRENB@GOTPCREL(%rip), %r15
	cmoveq	_DPIO_DYNPWRDOWNEN_CH1@GOTPCREL(%rip), %r15
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_vlv_dpio_read
	orl	(%r15), %eax
	movl	(%rbx), %edx
	movq	%r14, %rdi
	movl	%r12d, %esi
	movl	%eax, %ecx
	callq	_vlv_dpio_write
	movq	%r14, %rdi
	callq	_vlv_dpio_put
	movl	%r13d, %edi
	callq	_PHY_COM_LANE_RESET_DEASSERT
	orl	(%r14), %eax
	movl	%eax, (%r14)
	movq	_DISPLAY_PHY_CONTROL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movl	(%r14), %edx
	leaq	L_.str.1(%rip), %rdi
	movl	%r13d, %esi
	callq	_DRM_DEBUG_KMS
	movq	%r14, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_assert_chv_phy_status          ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VLV_DISP_PW_DPIO_CMN_BC,8,3    ## @VLV_DISP_PW_DPIO_CMN_BC
	.comm	_CHV_DISP_PW_DPIO_CMN_D,8,3     ## @CHV_DISP_PW_DPIO_CMN_D
	.comm	_PIPE_A,4,2                     ## @PIPE_A
	.comm	_DPIO_PHY0,4,2                  ## @DPIO_PHY0
	.comm	_PIPE_C,4,2                     ## @PIPE_C
	.comm	_DPIO_PHY1,4,2                  ## @DPIO_PHY1
	.comm	_DISPLAY_PHY_STATUS,4,2         ## @DISPLAY_PHY_STATUS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Display PHY %d is not power up\n"

	.comm	_CHV_CMN_DW28,4,2               ## @CHV_CMN_DW28
	.comm	_DPIO_DYNPWRDOWNEN_CH0,4,2      ## @DPIO_DYNPWRDOWNEN_CH0
	.comm	_DPIO_CL1POWERDOWNEN,4,2        ## @DPIO_CL1POWERDOWNEN
	.comm	_DPIO_SUS_CLK_CONFIG_GATE_CLKREQ,4,2 ## @DPIO_SUS_CLK_CONFIG_GATE_CLKREQ
	.comm	__CHV_CMN_DW6_CH1,4,2           ## @_CHV_CMN_DW6_CH1
	.comm	_DPIO_DYNPWRDOWNEN_CH1,4,2      ## @DPIO_DYNPWRDOWNEN_CH1
	.comm	_CHV_CMN_DW30,4,2               ## @CHV_CMN_DW30
	.comm	_DPIO_CL2_LDOFUSE_PWRENB,4,2    ## @DPIO_CL2_LDOFUSE_PWRENB
	.comm	_DISPLAY_PHY_CONTROL,4,2        ## @DISPLAY_PHY_CONTROL
L_.str.1:                               ## @.str.1
	.asciz	"Enabled DPIO PHY%d (PHY_CONTROL=0x%08x)\n"

	.no_dead_strip	_chv_dpio_cmn_power_well_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function chv_dpio_cmn_power_well_enable
_chv_dpio_cmn_power_well_enable:        ; @chv_dpio_cmn_power_well_enable
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x1
	mov	x19, x0
	ldr	x8, [x1]
	ldr	x8, [x8]
Lloh0:
	adrp	x23, _VLV_DISP_PW_DPIO_CMN_BC@GOTPAGE
Lloh1:
	ldr	x23, [x23, _VLV_DISP_PW_DPIO_CMN_BC@GOTPAGEOFF]
	ldr	x9, [x23]
	cmp	x8, x9
Lloh2:
	adrp	x9, _CHV_DISP_PW_DPIO_CMN_D@GOTPAGE
Lloh3:
	ldr	x9, [x9, _CHV_DISP_PW_DPIO_CMN_D@GOTPAGEOFF]
Lloh4:
	ldr	x9, [x9]
	ccmp	x8, x9, #4, ne
	cset	w0, ne
	bl	_WARN_ON_ONCE
	ldr	x8, [x21]
	ldr	x24, [x8]
Lloh5:
	adrp	x8, _PIPE_A@GOTPAGE
Lloh6:
	ldr	x8, [x8, _PIPE_A@GOTPAGEOFF]
	ldr	x26, [x23]
Lloh7:
	ldr	w25, [x8]
Lloh8:
	adrp	x8, _PIPE_C@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PIPE_C@GOTPAGEOFF]
Lloh10:
	adrp	x9, _DPIO_PHY0@GOTPAGE
Lloh11:
	ldr	x9, [x9, _DPIO_PHY0@GOTPAGEOFF]
Lloh12:
	ldr	w27, [x8]
Lloh13:
	adrp	x8, _DPIO_PHY1@GOTPAGE
Lloh14:
	ldr	x8, [x8, _DPIO_PHY1@GOTPAGEOFF]
	cmp	x24, x26
	csel	x8, x9, x8, eq
	ldr	w20, [x8]
	mov	w0, #1
	bl	_udelay
	mov	x0, x19
	mov	x1, x21
	mov	w2, #1
	bl	_vlv_set_power_well
Lloh15:
	adrp	x8, _DISPLAY_PHY_STATUS@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DISPLAY_PHY_STATUS@GOTPAGEOFF]
Lloh17:
	ldr	w22, [x8]
	mov	x0, x20
	bl	_PHY_POWERGOOD
	mov	x2, x0
	mov	x0, x19
	mov	x1, x22
	mov	w3, #1
	bl	_intel_de_wait_for_set
	cbz	x0, LBB0_2
; %bb.1:
Lloh18:
	adrp	x0, l_.str@PAGE
Lloh19:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x20
	bl	_DRM_ERROR
LBB0_2:
	cmp	x24, x26
	csel	w22, w25, w27, eq
	mov	x0, x19
	bl	_vlv_dpio_get
Lloh20:
	adrp	x24, _CHV_CMN_DW28@GOTPAGE
Lloh21:
	ldr	x24, [x24, _CHV_CMN_DW28@GOTPAGEOFF]
	ldr	w2, [x24]
	mov	x0, x19
	mov	x1, x22
	bl	_vlv_dpio_read
Lloh22:
	adrp	x8, _DPIO_DYNPWRDOWNEN_CH0@GOTPAGE
Lloh23:
	ldr	x8, [x8, _DPIO_DYNPWRDOWNEN_CH0@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
Lloh25:
	adrp	x9, _DPIO_CL1POWERDOWNEN@GOTPAGE
Lloh26:
	ldr	x9, [x9, _DPIO_CL1POWERDOWNEN@GOTPAGEOFF]
Lloh27:
	adrp	x10, _DPIO_SUS_CLK_CONFIG_GATE_CLKREQ@GOTPAGE
Lloh28:
	ldr	x10, [x10, _DPIO_SUS_CLK_CONFIG_GATE_CLKREQ@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
Lloh30:
	ldr	w10, [x10]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w3, w8, w10
	ldr	w2, [x24]
	mov	x0, x19
	mov	x1, x22
	bl	_vlv_dpio_write
	ldr	x8, [x21]
	ldr	x8, [x8]
Lloh31:
	adrp	x9, _CHV_CMN_DW30@GOTPAGE
Lloh32:
	ldr	x9, [x9, _CHV_CMN_DW30@GOTPAGEOFF]
	ldr	x10, [x23]
Lloh33:
	adrp	x11, __CHV_CMN_DW6_CH1@GOTPAGE
Lloh34:
	ldr	x11, [x11, __CHV_CMN_DW6_CH1@GOTPAGEOFF]
	cmp	x8, x10
	csel	x21, x11, x9, eq
	ldr	w2, [x21]
Lloh35:
	adrp	x8, _DPIO_DYNPWRDOWNEN_CH1@GOTPAGE
Lloh36:
	ldr	x8, [x8, _DPIO_DYNPWRDOWNEN_CH1@GOTPAGEOFF]
Lloh37:
	adrp	x9, _DPIO_CL2_LDOFUSE_PWRENB@GOTPAGE
Lloh38:
	ldr	x9, [x9, _DPIO_CL2_LDOFUSE_PWRENB@GOTPAGEOFF]
	csel	x23, x8, x9, eq
	mov	x0, x19
	mov	x1, x22
	bl	_vlv_dpio_read
	ldr	w8, [x23]
	orr	w3, w8, w0
	ldr	w2, [x21]
	mov	x0, x19
	mov	x1, x22
	bl	_vlv_dpio_write
	mov	x0, x19
	bl	_vlv_dpio_put
	mov	x0, x20
	bl	_PHY_COM_LANE_RESET_DEASSERT
	ldr	w8, [x19]
	orr	w1, w8, w0
	str	w1, [x19]
Lloh39:
	adrp	x8, _DISPLAY_PHY_CONTROL@GOTPAGE
Lloh40:
	ldr	x8, [x8, _DISPLAY_PHY_CONTROL@GOTPAGEOFF]
Lloh41:
	ldr	w0, [x8]
	bl	_I915_WRITE
	ldr	w2, [x19]
Lloh42:
	adrp	x0, l_.str.1@PAGE
Lloh43:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	x1, x20
	bl	_DRM_DEBUG_KMS
	mov	x0, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_assert_chv_phy_status
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh12
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh29
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_VLV_DISP_PW_DPIO_CMN_BC,8,3    ; @VLV_DISP_PW_DPIO_CMN_BC
	.comm	_CHV_DISP_PW_DPIO_CMN_D,8,3     ; @CHV_DISP_PW_DPIO_CMN_D
	.comm	_PIPE_A,4,2                     ; @PIPE_A
	.comm	_DPIO_PHY0,4,2                  ; @DPIO_PHY0
	.comm	_PIPE_C,4,2                     ; @PIPE_C
	.comm	_DPIO_PHY1,4,2                  ; @DPIO_PHY1
	.comm	_DISPLAY_PHY_STATUS,4,2         ; @DISPLAY_PHY_STATUS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Display PHY %d is not power up\n"

	.comm	_CHV_CMN_DW28,4,2               ; @CHV_CMN_DW28
	.comm	_DPIO_DYNPWRDOWNEN_CH0,4,2      ; @DPIO_DYNPWRDOWNEN_CH0
	.comm	_DPIO_CL1POWERDOWNEN,4,2        ; @DPIO_CL1POWERDOWNEN
	.comm	_DPIO_SUS_CLK_CONFIG_GATE_CLKREQ,4,2 ; @DPIO_SUS_CLK_CONFIG_GATE_CLKREQ
	.comm	__CHV_CMN_DW6_CH1,4,2           ; @_CHV_CMN_DW6_CH1
	.comm	_DPIO_DYNPWRDOWNEN_CH1,4,2      ; @DPIO_DYNPWRDOWNEN_CH1
	.comm	_CHV_CMN_DW30,4,2               ; @CHV_CMN_DW30
	.comm	_DPIO_CL2_LDOFUSE_PWRENB,4,2    ; @DPIO_CL2_LDOFUSE_PWRENB
	.comm	_DISPLAY_PHY_CONTROL,4,2        ; @DISPLAY_PHY_CONTROL
l_.str.1:                               ; @.str.1
	.asciz	"Enabled DPIO PHY%d (PHY_CONTROL=0x%08x)\n"

	.no_dead_strip	_chv_dpio_cmn_power_well_enable
.subsections_via_symbols
