	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v8_0_rlc_init
_gfx_v8_0_rlc_init:                     ## @gfx_v8_0_rlc_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	_vi_cs_data@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 16(%rdi)
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_amdgpu_gfx_rlc_init_csb
	testl	%eax, %eax
	jne	LBB0_6
LBB0_2:
	movq	(%rbx), %rax
	movq	_CHIP_CARRIZO@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_4
## %bb.3:
	movq	_CHIP_STONEY@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
LBB0_4:
	movl	$1920, %edi                     ## imm = 0x780
	movl	$2048, %esi                     ## imm = 0x800
	callq	_ALIGN
	addq	$65536, %rax                    ## imm = 0x10000
	movq	%rax, 8(%rbx)
	movq	%rbx, %rdi
	callq	_amdgpu_gfx_rlc_init_cpt
	testl	%eax, %eax
	jne	LBB0_6
LBB0_5:
	xorl	%eax, %eax
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_vi_cs_data,8,3                 ## @vi_cs_data
	.comm	_CHIP_CARRIZO,8,3               ## @CHIP_CARRIZO
	.comm	_CHIP_STONEY,8,3                ## @CHIP_STONEY
	.no_dead_strip	_gfx_v8_0_rlc_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v8_0_rlc_init
_gfx_v8_0_rlc_init:                     ; @gfx_v8_0_rlc_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _vi_cs_data@GOTPAGE
Lloh1:
	ldr	x8, [x8, _vi_cs_data@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [x0, #16]
	cbz	x8, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_amdgpu_gfx_rlc_init_csb
	cbnz	w0, LBB0_5
LBB0_2:
	ldr	x8, [x19]
Lloh3:
	adrp	x9, _CHIP_CARRIZO@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CHIP_CARRIZO@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
Lloh6:
	adrp	x10, _CHIP_STONEY@GOTPAGE
Lloh7:
	ldr	x10, [x10, _CHIP_STONEY@GOTPAGEOFF]
Lloh8:
	ldr	x10, [x10]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	b.ne	LBB0_4
; %bb.3:
	mov	w0, #1920
	mov	w1, #2048
	bl	_ALIGN
	add	x8, x0, #16, lsl #12            ; =65536
	str	x8, [x19, #8]
	mov	x0, x19
	bl	_amdgpu_gfx_rlc_init_cpt
	cbnz	w0, LBB0_5
LBB0_4:
	mov	w0, #0
LBB0_5:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_vi_cs_data,8,3                 ; @vi_cs_data
	.comm	_CHIP_CARRIZO,8,3               ; @CHIP_CARRIZO
	.comm	_CHIP_STONEY,8,3                ; @CHIP_STONEY
	.no_dead_strip	_gfx_v8_0_rlc_init
.subsections_via_symbols
