	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function fiji_initialize_mc_reg_table
_fiji_initialize_mc_reg_table:          ## @fiji_initialize_mc_reg_table
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	(%rdi), %ebx
	movq	_mmMC_SEQ_RAS_TIMING_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_mmMC_SEQ_RAS_TIMING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_cgs_read_register
	movl	%ebx, %edi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_cgs_write_register
	movl	(%r14), %ebx
	movq	_mmMC_SEQ_CAS_TIMING_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_mmMC_SEQ_CAS_TIMING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_cgs_read_register
	movl	%ebx, %edi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_cgs_write_register
	movl	(%r14), %ebx
	movq	_mmMC_SEQ_MISC_TIMING2_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_mmMC_SEQ_MISC_TIMING2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_cgs_read_register
	movl	%ebx, %edi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_cgs_write_register
	movl	(%r14), %ebx
	movq	_mmMC_SEQ_WR_CTL_D1_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_mmMC_SEQ_WR_CTL_D1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_cgs_read_register
	movl	%ebx, %edi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_cgs_write_register
	movl	(%r14), %ebx
	movq	_mmMC_SEQ_RD_CTL_D0_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_mmMC_SEQ_RD_CTL_D0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_cgs_read_register
	movl	%ebx, %edi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_cgs_write_register
	movl	(%r14), %ebx
	movq	_mmMC_SEQ_RD_CTL_D1_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_mmMC_SEQ_RD_CTL_D1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_cgs_read_register
	movl	%ebx, %edi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_cgs_write_register
	movl	(%r14), %ebx
	movq	_mmMC_SEQ_PMG_TIMING_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	_mmMC_SEQ_PMG_TIMING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_cgs_read_register
	movl	%ebx, %edi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_cgs_write_register
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_mmMC_SEQ_RAS_TIMING_LP,4,2     ## @mmMC_SEQ_RAS_TIMING_LP
	.comm	_mmMC_SEQ_RAS_TIMING,4,2        ## @mmMC_SEQ_RAS_TIMING
	.comm	_mmMC_SEQ_CAS_TIMING_LP,4,2     ## @mmMC_SEQ_CAS_TIMING_LP
	.comm	_mmMC_SEQ_CAS_TIMING,4,2        ## @mmMC_SEQ_CAS_TIMING
	.comm	_mmMC_SEQ_MISC_TIMING2_LP,4,2   ## @mmMC_SEQ_MISC_TIMING2_LP
	.comm	_mmMC_SEQ_MISC_TIMING2,4,2      ## @mmMC_SEQ_MISC_TIMING2
	.comm	_mmMC_SEQ_WR_CTL_D1_LP,4,2      ## @mmMC_SEQ_WR_CTL_D1_LP
	.comm	_mmMC_SEQ_WR_CTL_D1,4,2         ## @mmMC_SEQ_WR_CTL_D1
	.comm	_mmMC_SEQ_RD_CTL_D0_LP,4,2      ## @mmMC_SEQ_RD_CTL_D0_LP
	.comm	_mmMC_SEQ_RD_CTL_D0,4,2         ## @mmMC_SEQ_RD_CTL_D0
	.comm	_mmMC_SEQ_RD_CTL_D1_LP,4,2      ## @mmMC_SEQ_RD_CTL_D1_LP
	.comm	_mmMC_SEQ_RD_CTL_D1,4,2         ## @mmMC_SEQ_RD_CTL_D1
	.comm	_mmMC_SEQ_PMG_TIMING_LP,4,2     ## @mmMC_SEQ_PMG_TIMING_LP
	.comm	_mmMC_SEQ_PMG_TIMING,4,2        ## @mmMC_SEQ_PMG_TIMING
	.no_dead_strip	_fiji_initialize_mc_reg_table
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function fiji_initialize_mc_reg_table
_fiji_initialize_mc_reg_table:          ; @fiji_initialize_mc_reg_table
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w20, [x0]
Lloh0:
	adrp	x8, _mmMC_SEQ_RAS_TIMING_LP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _mmMC_SEQ_RAS_TIMING_LP@GOTPAGEOFF]
Lloh2:
	ldr	w21, [x8]
Lloh3:
	adrp	x8, _mmMC_SEQ_RAS_TIMING@GOTPAGE
Lloh4:
	ldr	x8, [x8, _mmMC_SEQ_RAS_TIMING@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_cgs_read_register
	mov	x2, x0
	mov	x0, x20
	mov	x1, x21
	bl	_cgs_write_register
	ldr	w20, [x19]
Lloh6:
	adrp	x8, _mmMC_SEQ_CAS_TIMING_LP@GOTPAGE
Lloh7:
	ldr	x8, [x8, _mmMC_SEQ_CAS_TIMING_LP@GOTPAGEOFF]
Lloh8:
	ldr	w21, [x8]
Lloh9:
	adrp	x8, _mmMC_SEQ_CAS_TIMING@GOTPAGE
Lloh10:
	ldr	x8, [x8, _mmMC_SEQ_CAS_TIMING@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_cgs_read_register
	mov	x2, x0
	mov	x0, x20
	mov	x1, x21
	bl	_cgs_write_register
	ldr	w20, [x19]
Lloh12:
	adrp	x8, _mmMC_SEQ_MISC_TIMING2_LP@GOTPAGE
Lloh13:
	ldr	x8, [x8, _mmMC_SEQ_MISC_TIMING2_LP@GOTPAGEOFF]
Lloh14:
	ldr	w21, [x8]
Lloh15:
	adrp	x8, _mmMC_SEQ_MISC_TIMING2@GOTPAGE
Lloh16:
	ldr	x8, [x8, _mmMC_SEQ_MISC_TIMING2@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_cgs_read_register
	mov	x2, x0
	mov	x0, x20
	mov	x1, x21
	bl	_cgs_write_register
	ldr	w20, [x19]
Lloh18:
	adrp	x8, _mmMC_SEQ_WR_CTL_D1_LP@GOTPAGE
Lloh19:
	ldr	x8, [x8, _mmMC_SEQ_WR_CTL_D1_LP@GOTPAGEOFF]
Lloh20:
	ldr	w21, [x8]
Lloh21:
	adrp	x8, _mmMC_SEQ_WR_CTL_D1@GOTPAGE
Lloh22:
	ldr	x8, [x8, _mmMC_SEQ_WR_CTL_D1@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_cgs_read_register
	mov	x2, x0
	mov	x0, x20
	mov	x1, x21
	bl	_cgs_write_register
	ldr	w20, [x19]
Lloh24:
	adrp	x8, _mmMC_SEQ_RD_CTL_D0_LP@GOTPAGE
Lloh25:
	ldr	x8, [x8, _mmMC_SEQ_RD_CTL_D0_LP@GOTPAGEOFF]
Lloh26:
	ldr	w21, [x8]
Lloh27:
	adrp	x8, _mmMC_SEQ_RD_CTL_D0@GOTPAGE
Lloh28:
	ldr	x8, [x8, _mmMC_SEQ_RD_CTL_D0@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_cgs_read_register
	mov	x2, x0
	mov	x0, x20
	mov	x1, x21
	bl	_cgs_write_register
	ldr	w20, [x19]
Lloh30:
	adrp	x8, _mmMC_SEQ_RD_CTL_D1_LP@GOTPAGE
Lloh31:
	ldr	x8, [x8, _mmMC_SEQ_RD_CTL_D1_LP@GOTPAGEOFF]
Lloh32:
	ldr	w21, [x8]
Lloh33:
	adrp	x8, _mmMC_SEQ_RD_CTL_D1@GOTPAGE
Lloh34:
	ldr	x8, [x8, _mmMC_SEQ_RD_CTL_D1@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_cgs_read_register
	mov	x2, x0
	mov	x0, x20
	mov	x1, x21
	bl	_cgs_write_register
	ldr	w19, [x19]
Lloh36:
	adrp	x8, _mmMC_SEQ_PMG_TIMING_LP@GOTPAGE
Lloh37:
	ldr	x8, [x8, _mmMC_SEQ_PMG_TIMING_LP@GOTPAGEOFF]
Lloh38:
	ldr	w20, [x8]
Lloh39:
	adrp	x8, _mmMC_SEQ_PMG_TIMING@GOTPAGE
Lloh40:
	ldr	x8, [x8, _mmMC_SEQ_PMG_TIMING@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_cgs_read_register
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_cgs_write_register
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_mmMC_SEQ_RAS_TIMING_LP,4,2     ; @mmMC_SEQ_RAS_TIMING_LP
	.comm	_mmMC_SEQ_RAS_TIMING,4,2        ; @mmMC_SEQ_RAS_TIMING
	.comm	_mmMC_SEQ_CAS_TIMING_LP,4,2     ; @mmMC_SEQ_CAS_TIMING_LP
	.comm	_mmMC_SEQ_CAS_TIMING,4,2        ; @mmMC_SEQ_CAS_TIMING
	.comm	_mmMC_SEQ_MISC_TIMING2_LP,4,2   ; @mmMC_SEQ_MISC_TIMING2_LP
	.comm	_mmMC_SEQ_MISC_TIMING2,4,2      ; @mmMC_SEQ_MISC_TIMING2
	.comm	_mmMC_SEQ_WR_CTL_D1_LP,4,2      ; @mmMC_SEQ_WR_CTL_D1_LP
	.comm	_mmMC_SEQ_WR_CTL_D1,4,2         ; @mmMC_SEQ_WR_CTL_D1
	.comm	_mmMC_SEQ_RD_CTL_D0_LP,4,2      ; @mmMC_SEQ_RD_CTL_D0_LP
	.comm	_mmMC_SEQ_RD_CTL_D0,4,2         ; @mmMC_SEQ_RD_CTL_D0
	.comm	_mmMC_SEQ_RD_CTL_D1_LP,4,2      ; @mmMC_SEQ_RD_CTL_D1_LP
	.comm	_mmMC_SEQ_RD_CTL_D1,4,2         ; @mmMC_SEQ_RD_CTL_D1
	.comm	_mmMC_SEQ_PMG_TIMING_LP,4,2     ; @mmMC_SEQ_PMG_TIMING_LP
	.comm	_mmMC_SEQ_PMG_TIMING,4,2        ; @mmMC_SEQ_PMG_TIMING
	.no_dead_strip	_fiji_initialize_mc_reg_table
.subsections_via_symbols
