	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_afmt_init
_radeon_afmt_init:                      ## @radeon_afmt_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_RADEON_MAX_AFMT_BLOCKS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	testl	%edx, %edx
	jle	LBB0_7
## %bb.1:
	leaq	-1(%rdx), %rcx
	movl	%edx, %eax
	andl	$3, %eax
	cmpq	$3, %rcx
	jae	LBB0_3
## %bb.2:
	xorl	%ecx, %ecx
	jmp	LBB0_5
LBB0_3:
	andl	$-4, %edx
	xorl	%ecx, %ecx
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r14), %rsi
	movq	$0, (%rsi,%rcx,8)
	movq	8(%r14), %rsi
	movq	$0, 8(%rsi,%rcx,8)
	movq	8(%r14), %rsi
	movq	$0, 16(%rsi,%rcx,8)
	movq	8(%r14), %rsi
	movq	$0, 24(%rsi,%rcx,8)
	addq	$4, %rcx
	cmpq	%rcx, %rdx
	jne	LBB0_4
LBB0_5:
	testq	%rax, %rax
	je	LBB0_7
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r14), %rdx
	movq	$0, (%rdx,%rcx,8)
	incq	%rcx
	decq	%rax
	jne	LBB0_6
LBB0_7:
	movq	%r14, %rdi
	callq	_ASIC_IS_NODCE
	testq	%rax, %rax
	je	LBB0_8
LBB0_29:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_8:
	movq	%r14, %rdi
	callq	_ASIC_IS_DCE4
	movq	%r14, %rdi
	testq	%rax, %rax
	je	LBB0_17
## %bb.9:
	callq	_ASIC_IS_DCE8
	movl	$7, %r15d
	testq	%rax, %rax
	jne	LBB0_13
## %bb.10:
	movq	%r14, %rdi
	callq	_ASIC_IS_DCE6
	movl	$6, %r15d
	testq	%rax, %rax
	jne	LBB0_13
## %bb.11:
	movq	%r14, %rdi
	callq	_ASIC_IS_DCE5
	testq	%rax, %rax
	jne	LBB0_13
## %bb.12:
	movq	%r14, %rdi
	callq	_ASIC_IS_DCE41
	xorl	%ecx, %ecx
	testq	%rax, %rax
	sete	%cl
	leal	2(,%rcx,4), %r15d
LBB0_13:
	leaq	_radeon_afmt_init.eg_offsets(%rip), %r12
	movq	%r12, %rdi
	callq	_ARRAY_SIZE
	xorl	%edi, %edi
	cmpl	%eax, %r15d
	setg	%dil
	callq	_BUG_ON
	movl	%r15d, %r15d
	xorl	%ebx, %ebx
	movq	_GFP_KERNEL@GOTPCREL(%rip), %r13
	jmp	LBB0_14
	.p2align	4, 0x90
LBB0_16:                                ##   in Loop: Header=BB0_14 Depth=1
	incq	%rbx
	addq	$4, %r12
	cmpq	%rbx, %r15
	je	LBB0_29
LBB0_14:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r13), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%r14), %rcx
	movq	%rax, (%rcx,%rbx,8)
	movq	8(%r14), %rax
	movq	(%rax,%rbx,8), %rax
	testq	%rax, %rax
	je	LBB0_16
## %bb.15:                              ##   in Loop: Header=BB0_14 Depth=1
	movl	(%r12), %ecx
	movl	%ecx, (%rax)
	movl	%ebx, 4(%rax)
	jmp	LBB0_16
LBB0_17:
	callq	_ASIC_IS_DCE3
	testq	%rax, %rax
	je	LBB0_22
## %bb.18:
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%r14), %rcx
	movq	%rax, (%rcx)
	movq	8(%r14), %rax
	movq	(%rax), %rax
	testq	%rax, %rax
	je	LBB0_20
## %bb.19:
	movq	_DCE3_HDMI_OFFSET0@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%rax)
	movl	$0, 4(%rax)
LBB0_20:
	movl	(%rbx), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%r14), %rcx
	movq	%rax, 8(%rcx)
	movq	8(%r14), %rax
	movq	8(%rax), %rax
	testq	%rax, %rax
	je	LBB0_29
## %bb.21:
	movq	_DCE3_HDMI_OFFSET1@GOTPCREL(%rip), %rcx
LBB0_28:
	movl	(%rcx), %ecx
	movl	%ecx, (%rax)
	movl	$1, 4(%rax)
	jmp	LBB0_29
LBB0_22:
	movq	%r14, %rdi
	callq	_ASIC_IS_DCE2
	testq	%rax, %rax
	je	LBB0_29
## %bb.23:
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%r14), %rcx
	movq	%rax, (%rcx)
	movq	8(%r14), %rax
	movq	(%rax), %rax
	testq	%rax, %rax
	je	LBB0_25
## %bb.24:
	movq	_DCE2_HDMI_OFFSET0@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%rax)
	movl	$0, 4(%rax)
LBB0_25:
	movq	(%r14), %rax
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_29
## %bb.26:
	movl	(%rbx), %esi
	movl	$4, %edi
	callq	_kzalloc
	movq	8(%r14), %rcx
	movq	%rax, 8(%rcx)
	movq	8(%r14), %rax
	movq	8(%rax), %rax
	testq	%rax, %rax
	je	LBB0_29
## %bb.27:
	movq	_DCE2_HDMI_OFFSET1@GOTPCREL(%rip), %rcx
	jmp	LBB0_28
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_MAX_AFMT_BLOCKS,4,2     ## @RADEON_MAX_AFMT_BLOCKS
	.section	__DATA,__data
	.p2align	4                               ## @radeon_afmt_init.eg_offsets
_radeon_afmt_init.eg_offsets:
	.long	133                             ## 0x85
	.long	132                             ## 0x84
	.long	131                             ## 0x83
	.long	130                             ## 0x82
	.long	129                             ## 0x81
	.long	128                             ## 0x80
	.long	51200                           ## 0xc800

	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_DCE3_HDMI_OFFSET0,4,2          ## @DCE3_HDMI_OFFSET0
	.comm	_DCE3_HDMI_OFFSET1,4,2          ## @DCE3_HDMI_OFFSET1
	.comm	_DCE2_HDMI_OFFSET0,4,2          ## @DCE2_HDMI_OFFSET0
	.comm	_CHIP_R600,8,3                  ## @CHIP_R600
	.comm	_DCE2_HDMI_OFFSET1,4,2          ## @DCE2_HDMI_OFFSET1
	.no_dead_strip	_radeon_afmt_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_afmt_init
_radeon_afmt_init:                      ; @radeon_afmt_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _RADEON_MAX_AFMT_BLOCKS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_MAX_AFMT_BLOCKS@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x8, #0
	lsl	x9, x9, #3
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x10, [x19, #8]
	str	xzr, [x10, x8]
	add	x8, x8, #8
	cmp	x9, x8
	b.ne	LBB0_2
LBB0_3:
	mov	x0, x19
	bl	_ASIC_IS_NODCE
	cbz	x0, LBB0_5
LBB0_4:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_5:
	mov	x0, x19
	bl	_ASIC_IS_DCE4
	cbz	x0, LBB0_8
; %bb.6:
	mov	x0, x19
	bl	_ASIC_IS_DCE8
	cbz	x0, LBB0_13
; %bb.7:
	mov	w20, #7
	b	LBB0_23
LBB0_8:
	mov	x0, x19
	bl	_ASIC_IS_DCE3
	cbz	x0, LBB0_15
; %bb.9:
Lloh3:
	adrp	x20, _GFP_KERNEL@GOTPAGE
Lloh4:
	ldr	x20, [x20, _GFP_KERNEL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	cbz	x8, LBB0_11
; %bb.10:
Lloh5:
	adrp	x9, _DCE3_HDMI_OFFSET0@GOTPAGE
Lloh6:
	ldr	x9, [x9, _DCE3_HDMI_OFFSET0@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	stp	w9, wzr, [x8]
LBB0_11:
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_4
; %bb.12:
	mov	w9, #1
Lloh8:
	adrp	x10, _DCE3_HDMI_OFFSET1@GOTPAGE
Lloh9:
	ldr	x10, [x10, _DCE3_HDMI_OFFSET1@GOTPAGEOFF]
	b	LBB0_39
LBB0_13:
	mov	x0, x19
	bl	_ASIC_IS_DCE6
	cbz	x0, LBB0_21
; %bb.14:
	mov	w20, #6
	b	LBB0_23
LBB0_15:
	mov	x0, x19
	bl	_ASIC_IS_DCE2
	cbz	x0, LBB0_4
; %bb.16:
Lloh10:
	adrp	x20, _GFP_KERNEL@GOTPAGE
Lloh11:
	ldr	x20, [x20, _GFP_KERNEL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	cbz	x8, LBB0_18
; %bb.17:
Lloh12:
	adrp	x9, _DCE2_HDMI_OFFSET0@GOTPAGE
Lloh13:
	ldr	x9, [x9, _DCE2_HDMI_OFFSET0@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	stp	w9, wzr, [x8]
LBB0_18:
	ldr	x8, [x19]
Lloh15:
	adrp	x9, _CHIP_R600@GOTPAGE
Lloh16:
	ldr	x9, [x9, _CHIP_R600@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_4
; %bb.19:
	ldr	w1, [x20]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_4
; %bb.20:
	mov	w9, #1
Lloh18:
	adrp	x10, _DCE2_HDMI_OFFSET1@GOTPAGE
Lloh19:
	ldr	x10, [x10, _DCE2_HDMI_OFFSET1@GOTPAGEOFF]
	b	LBB0_39
LBB0_21:
	mov	x0, x19
	bl	_ASIC_IS_DCE5
	mov	w20, #6
	cbnz	x0, LBB0_23
; %bb.22:
	mov	x0, x19
	bl	_ASIC_IS_DCE41
	cmp	x0, #0
	mov	w8, #2
	csel	w20, w20, w8, eq
LBB0_23:
Lloh20:
	adrp	x0, _radeon_afmt_init.eg_offsets@PAGE
Lloh21:
	add	x0, x0, _radeon_afmt_init.eg_offsets@PAGEOFF
	bl	_ARRAY_SIZE
	cmp	w20, w0
	cset	w0, gt
	bl	_BUG_ON
Lloh22:
	adrp	x21, _GFP_KERNEL@GOTPAGE
Lloh23:
	ldr	x21, [x21, _GFP_KERNEL@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	cbz	x8, LBB0_25
; %bb.24:
Lloh24:
	adrp	x9, _radeon_afmt_init.eg_offsets@PAGE
Lloh25:
	ldr	w9, [x9, _radeon_afmt_init.eg_offsets@PAGEOFF]
	stp	w9, wzr, [x8]
LBB0_25:
	ldr	w1, [x21]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_27
; %bb.26:
Lloh26:
	adrp	x9, _radeon_afmt_init.eg_offsets@PAGE+4
Lloh27:
	ldr	w9, [x9, _radeon_afmt_init.eg_offsets@PAGEOFF+4]
	mov	w10, #1
	stp	w9, w10, [x8]
LBB0_27:
	cmp	w20, #2
	b.eq	LBB0_4
; %bb.28:
	ldr	w1, [x21]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #16]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #16]
	cbz	x8, LBB0_30
; %bb.29:
Lloh28:
	adrp	x9, _radeon_afmt_init.eg_offsets@PAGE+8
Lloh29:
	ldr	w9, [x9, _radeon_afmt_init.eg_offsets@PAGEOFF+8]
	mov	w10, #2
	stp	w9, w10, [x8]
LBB0_30:
	ldr	w1, [x21]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #24]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #24]
	cbz	x8, LBB0_32
; %bb.31:
Lloh30:
	adrp	x9, _radeon_afmt_init.eg_offsets@PAGE+12
Lloh31:
	ldr	w9, [x9, _radeon_afmt_init.eg_offsets@PAGEOFF+12]
	mov	w10, #3
	stp	w9, w10, [x8]
LBB0_32:
	ldr	w1, [x21]
	mov	w22, #4
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #32]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #32]
	cbz	x8, LBB0_34
; %bb.33:
Lloh32:
	adrp	x9, _radeon_afmt_init.eg_offsets@PAGE+16
Lloh33:
	ldr	w9, [x9, _radeon_afmt_init.eg_offsets@PAGEOFF+16]
	stp	w9, w22, [x8]
LBB0_34:
	ldr	w1, [x21]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #40]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #40]
	cbz	x8, LBB0_36
; %bb.35:
Lloh34:
	adrp	x9, _radeon_afmt_init.eg_offsets@PAGE+20
Lloh35:
	ldr	w9, [x9, _radeon_afmt_init.eg_offsets@PAGEOFF+20]
	mov	w10, #5
	stp	w9, w10, [x8]
LBB0_36:
	cmp	w20, #6
	b.eq	LBB0_4
; %bb.37:
	ldr	w1, [x21]
	mov	w0, #4
	bl	_kzalloc
	ldr	x8, [x19, #8]
	str	x0, [x8, #48]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #48]
	cbz	x8, LBB0_4
; %bb.38:
	mov	w9, #6
Lloh36:
	adrp	x10, _radeon_afmt_init.eg_offsets@PAGE+24
Lloh37:
	add	x10, x10, _radeon_afmt_init.eg_offsets@PAGEOFF+24
LBB0_39:
	ldr	w10, [x10]
	stp	w10, w9, [x8]
	b	LBB0_4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdr	Lloh24, Lloh25
	.loh AdrpLdr	Lloh26, Lloh27
	.loh AdrpLdr	Lloh28, Lloh29
	.loh AdrpLdr	Lloh30, Lloh31
	.loh AdrpLdr	Lloh32, Lloh33
	.loh AdrpLdr	Lloh34, Lloh35
	.loh AdrpAdd	Lloh36, Lloh37
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_MAX_AFMT_BLOCKS,4,2     ; @RADEON_MAX_AFMT_BLOCKS
	.section	__DATA,__data
	.p2align	2                               ; @radeon_afmt_init.eg_offsets
_radeon_afmt_init.eg_offsets:
	.long	133                             ; 0x85
	.long	132                             ; 0x84
	.long	131                             ; 0x83
	.long	130                             ; 0x82
	.long	129                             ; 0x81
	.long	128                             ; 0x80
	.long	51200                           ; 0xc800

	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_DCE3_HDMI_OFFSET0,4,2          ; @DCE3_HDMI_OFFSET0
	.comm	_DCE3_HDMI_OFFSET1,4,2          ; @DCE3_HDMI_OFFSET1
	.comm	_DCE2_HDMI_OFFSET0,4,2          ; @DCE2_HDMI_OFFSET0
	.comm	_CHIP_R600,8,3                  ; @CHIP_R600
	.comm	_DCE2_HDMI_OFFSET1,4,2          ; @DCE2_HDMI_OFFSET1
	.no_dead_strip	_radeon_afmt_init
.subsections_via_symbols
