	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cik_asic_reset                 ## -- Begin function cik_asic_reset
	.p2align	4, 0x90
_cik_asic_reset:                        ## @cik_asic_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	testl	%esi, %esi
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_cik_gpu_pci_config_reset
	jmp	LBB0_9
LBB0_2:
	movq	%rbx, %rdi
	callq	_cik_gpu_check_soft_reset
	movq	%rax, %r14
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_r600_set_bios_scratch_engine_hung
LBB0_4:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_cik_gpu_soft_reset
	movq	%rbx, %rdi
	callq	_cik_gpu_check_soft_reset
	testq	%rax, %rax
	je	LBB0_7
## %bb.5:
	movq	_radeon_hard_reset@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_7
## %bb.6:
	movq	%rbx, %rdi
	callq	_cik_gpu_pci_config_reset
LBB0_7:
	movq	%rbx, %rdi
	callq	_cik_gpu_check_soft_reset
	testq	%rax, %rax
	jne	LBB0_9
## %bb.8:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_r600_set_bios_scratch_engine_hung
LBB0_9:
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_radeon_hard_reset,8,3          ## @radeon_hard_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cik_asic_reset                 ; -- Begin function cik_asic_reset
	.p2align	2
_cik_asic_reset:                        ; @cik_asic_reset
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	cbz	w1, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_cik_gpu_pci_config_reset
	b	LBB0_9
LBB0_2:
	mov	x0, x19
	bl	_cik_gpu_check_soft_reset
	mov	x20, x0
	cbz	x0, LBB0_4
; %bb.3:
	mov	x0, x19
	mov	w1, #1
	bl	_r600_set_bios_scratch_engine_hung
LBB0_4:
	mov	x0, x19
	mov	x1, x20
	bl	_cik_gpu_soft_reset
	mov	x0, x19
	bl	_cik_gpu_check_soft_reset
	cbz	x0, LBB0_7
; %bb.5:
Lloh0:
	adrp	x8, _radeon_hard_reset@GOTPAGE
Lloh1:
	ldr	x8, [x8, _radeon_hard_reset@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cbz	x8, LBB0_7
; %bb.6:
	mov	x0, x19
	bl	_cik_gpu_pci_config_reset
LBB0_7:
	mov	x0, x19
	bl	_cik_gpu_check_soft_reset
	cbnz	x0, LBB0_9
; %bb.8:
	mov	x0, x19
	mov	w1, #0
	bl	_r600_set_bios_scratch_engine_hung
LBB0_9:
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_radeon_hard_reset,8,3          ; @radeon_hard_reset
.subsections_via_symbols
