	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function socfpga_fpga_cfg_mode_get
_socfpga_fpga_cfg_mode_get:             ## @socfpga_fpga_cfg_mode_get
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	_SOCFPGA_FPGMGR_STAT_OFST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_socfpga_fpga_readl
	movq	%rax, %rbx
	movq	_SOCFPGA_FPGMGR_STAT_MSEL_MASK@GOTPCREL(%rip), %rax
	andq	(%rax), %rbx
	movq	_SOCFPGA_FPGMGR_STAT_MSEL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shrq	%cl, %rbx
	movq	_cfgmgr_modes@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	callq	_ARRAY_SIZE
	cmpq	%rax, %rbx
	jae	LBB0_2
## %bb.1:
	movq	(%r14), %rax
	cmpl	$0, (%rax,%rbx,4)
	jne	LBB0_3
LBB0_2:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_3:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SOCFPGA_FPGMGR_STAT_OFST,4,2   ## @SOCFPGA_FPGMGR_STAT_OFST
	.comm	_SOCFPGA_FPGMGR_STAT_MSEL_MASK,8,3 ## @SOCFPGA_FPGMGR_STAT_MSEL_MASK
	.comm	_SOCFPGA_FPGMGR_STAT_MSEL_SHIFT,8,3 ## @SOCFPGA_FPGMGR_STAT_MSEL_SHIFT
	.comm	_cfgmgr_modes,8,3               ## @cfgmgr_modes
	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_socfpga_fpga_cfg_mode_get
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function socfpga_fpga_cfg_mode_get
_socfpga_fpga_cfg_mode_get:             ; @socfpga_fpga_cfg_mode_get
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x8, _SOCFPGA_FPGMGR_STAT_OFST@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SOCFPGA_FPGMGR_STAT_OFST@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_socfpga_fpga_readl
Lloh3:
	adrp	x8, _SOCFPGA_FPGMGR_STAT_MSEL_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SOCFPGA_FPGMGR_STAT_MSEL_MASK@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
Lloh6:
	adrp	x9, _SOCFPGA_FPGMGR_STAT_MSEL_SHIFT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _SOCFPGA_FPGMGR_STAT_MSEL_SHIFT@GOTPAGEOFF]
	and	x8, x8, x0
Lloh8:
	ldr	x9, [x9]
	lsr	x19, x8, x9
Lloh9:
	adrp	x20, _cfgmgr_modes@GOTPAGE
Lloh10:
	ldr	x20, [x20, _cfgmgr_modes@GOTPAGEOFF]
	ldr	x0, [x20]
	bl	_ARRAY_SIZE
	cmp	x19, x0
	b.hs	LBB0_2
; %bb.1:
	ldr	x8, [x20]
	ldr	w8, [x8, x19, lsl #2]
	cbnz	w8, LBB0_3
LBB0_2:
Lloh11:
	adrp	x8, _EINVAL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	neg	w19, w8
LBB0_3:
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_SOCFPGA_FPGMGR_STAT_OFST,4,2   ; @SOCFPGA_FPGMGR_STAT_OFST
	.comm	_SOCFPGA_FPGMGR_STAT_MSEL_MASK,8,3 ; @SOCFPGA_FPGMGR_STAT_MSEL_MASK
	.comm	_SOCFPGA_FPGMGR_STAT_MSEL_SHIFT,8,3 ; @SOCFPGA_FPGMGR_STAT_MSEL_SHIFT
	.comm	_cfgmgr_modes,8,3               ; @cfgmgr_modes
	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_socfpga_fpga_cfg_mode_get
.subsections_via_symbols
