	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_vcn_dec_send_msg
_amdgpu_vcn_dec_send_msg:               ## @amdgpu_vcn_dec_send_msg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	%rdi, %r15
	movq	%rsi, -64(%rbp)
	movq	(%rdi), %r13
	movq	$0, -48(%rbp)
	leaq	-56(%rbp), %rdx
	movq	%r13, %rdi
	movl	$64, %esi
	callq	_amdgpu_job_alloc_with_ib
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_6
## %bb.1:
	movq	%r14, -72(%rbp)                 ## 8-byte Spill
	movq	-56(%rbp), %rax
	movq	(%rax), %r14
	movq	%r12, %rdi
	callq	_amdgpu_bo_gpu_offset
	movl	%eax, %ebx
	movl	12(%r13), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	(%r14), %rcx
	movl	%eax, (%rcx)
	movl	%ebx, 4(%rcx)
	movl	8(%r13), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	(%r14), %rcx
	movl	%eax, 8(%rcx)
	movl	4(%r13), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	(%r14), %rcx
	movl	%eax, 16(%rcx)
	movl	$0, 20(%rcx)
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	(%r14), %rcx
	movl	%eax, 24(%rcx)
	movl	$0, 28(%rcx)
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	(%r14), %rcx
	movl	%eax, 32(%rcx)
	movl	$0, 36(%rcx)
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	(%r14), %rcx
	movl	%eax, 40(%rcx)
	movl	$0, 44(%rcx)
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	(%r14), %rcx
	movl	%eax, 48(%rcx)
	movl	$0, 52(%rcx)
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	(%r14), %rcx
	movl	%eax, 56(%rcx)
	movl	$0, 60(%rcx)
	movl	$16, 8(%r14)
	movq	-56(%rbp), %rdi
	leaq	-48(%rbp), %rdx
	movq	%r15, %rsi
	callq	_amdgpu_job_submit_direct
	testl	%eax, %eax
	je	LBB0_2
## %bb.5:
	movl	%eax, %ebx
	movq	-56(%rbp), %rdi
	callq	_amdgpu_job_free
LBB0_6:
	movq	%r12, %rdi
	callq	_amdgpu_bo_unreserve
	leaq	-64(%rbp), %rdi
	callq	_amdgpu_bo_unref
LBB0_7:
	movl	%ebx, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	-48(%rbp), %rsi
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_amdgpu_bo_fence
	movq	%r12, %rdi
	callq	_amdgpu_bo_unreserve
	leaq	-64(%rbp), %rdi
	callq	_amdgpu_bo_unref
	movq	-72(%rbp), %r14                 ## 8-byte Reload
	testq	%r14, %r14
	je	LBB0_4
## %bb.3:
	movq	-48(%rbp), %rdi
	callq	_dma_fence_get
	movq	%rax, (%r14)
LBB0_4:
	movq	-48(%rbp), %rdi
	callq	_dma_fence_put
	jmp	LBB0_7
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_amdgpu_vcn_dec_send_msg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_vcn_dec_send_msg
_amdgpu_vcn_dec_send_msg:               ; @amdgpu_vcn_dec_send_msg
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	stp	xzr, x1, [sp, #16]
	ldr	x22, [x0]
	add	x2, sp, #8
	mov	x0, x22
	mov	w1, #64
	bl	_amdgpu_job_alloc_with_ib
	mov	x23, x0
	cbnz	w0, LBB0_3
; %bb.1:
	ldr	x8, [sp, #8]
	ldr	x24, [x8]
	mov	x0, x20
	bl	_amdgpu_bo_gpu_offset
	mov	x23, x0
	ldr	w0, [x22, #12]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [x24]
	stp	w0, w23, [x8]
	ldr	w0, [x22, #8]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [x24]
	str	w0, [x8, #8]
	ldr	w0, [x22, #4]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [x24]
	stp	w0, wzr, [x8, #16]
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [x24]
	stp	w0, wzr, [x8, #24]
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [x24]
	stp	w0, wzr, [x8, #32]
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [x24]
	stp	w0, wzr, [x8, #40]
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [x24]
	stp	w0, wzr, [x8, #48]
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [x24]
	stp	w0, wzr, [x8, #56]
	mov	w8, #16
	str	w8, [x24, #8]
	ldr	x0, [sp, #8]
	add	x2, sp, #16
	mov	x1, x21
	bl	_amdgpu_job_submit_direct
	cbz	w0, LBB0_5
; %bb.2:
	mov	x23, x0
	ldr	x0, [sp, #8]
	bl	_amdgpu_job_free
LBB0_3:
	mov	x0, x20
	bl	_amdgpu_bo_unreserve
	add	x0, sp, #24
	bl	_amdgpu_bo_unref
LBB0_4:
	mov	x0, x23
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_5:
	ldr	x1, [sp, #16]
	mov	x0, x20
	mov	w2, #0
	bl	_amdgpu_bo_fence
	mov	x0, x20
	bl	_amdgpu_bo_unreserve
	add	x0, sp, #24
	bl	_amdgpu_bo_unref
	cbz	x19, LBB0_7
; %bb.6:
	ldr	x0, [sp, #16]
	bl	_dma_fence_get
	str	x0, [x19]
LBB0_7:
	ldr	x0, [sp, #16]
	bl	_dma_fence_put
	mov	w23, #0
	b	LBB0_4
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_amdgpu_vcn_dec_send_msg
.subsections_via_symbols
