	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cdv_intel_dp_set_vswing_premph
_cdv_intel_dp_set_vswing_premph:        ## @cdv_intel_dp_set_vswing_premph
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	(%rdi), %rax
	movq	(%rax), %rax
	movq	_DP_B@GOTPCREL(%rip), %rcx
	xorl	%r12d, %r12d
	cmpq	(%rcx), %rax
	setne	%al
	movq	_DP_TRAIN_VOLTAGE_SWING_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r13d
	andl	%esi, %r13d
	movq	_DP_TRAIN_PRE_EMPHASIS_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %ebx
	movq	_DP_TRAIN_PRE_EMPHASIS_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %ebx
	leal	(%rbx,%r13), %ecx
	cmpl	$3, %ecx
	jle	LBB0_1
## %bb.5:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	%rcx, -48(%rbp)                 ## 8-byte Spill
	movq	8(%rdi), %r14
	movq	_ddi_DP_train_table@GOTPCREL(%rip), %rcx
	movq	(%rcx), %r15
	movb	%al, %r12b
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_KMS
	movq	%r14, %rdi
	callq	_cdv_sb_reset
	leaq	(%r12,%r12,2), %r12
	movl	20(%r15,%r12,8), %esi
	movq	%r14, %rdi
	movl	$84226362, %edx                 ## imm = 0x505313A
	callq	_cdv_sb_write
	leaq	(%r15,%r12,8), %rax
	addq	$8, %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movl	8(%r15,%r12,8), %esi
	movq	%r14, %rdi
	movl	$1128292437, %edx               ## imm = 0x43406055
	callq	_cdv_sb_write
	cmpl	$1, %ebx
	jne	LBB0_3
## %bb.2:
	movl	$1433635156, %edx               ## imm = 0x55738954
	cmpl	$1, %r13d
	je	LBB0_4
LBB0_3:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	addl	%eax, %eax
	movq	_dp_vswing_premph_table@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	cltq
	movl	(%rcx,%rax,4), %edx
LBB0_4:
	movl	16(%r15,%r12,8), %esi
	movq	%r14, %rdi
	callq	_cdv_sb_write
	movq	_DP_TRAIN_VOLTAGE_SWING_LEVEL_3@GOTPCREL(%rip), %rax
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	cmpl	(%rax), %ecx
	movl	$1887445056, %eax               ## imm = 0x70802040
	movl	$1082138688, %edx               ## imm = 0x40802040
	cmovel	%eax, %edx
	movl	12(%r15,%r12,8), %esi
	movq	%r14, %rdi
	callq	_cdv_sb_write
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$-1019191211, %edx              ## imm = 0xC3406055
	callq	_cdv_sb_write
	movl	4(%r15,%r12,8), %esi
	movq	%r14, %rdi
	movl	$520290368, %edx                ## imm = 0x1F030040
	callq	_cdv_sb_write
	leal	(%rbx,%rbx), %eax
	incl	%eax
	movl	(%r15,%r12,8), %esi
	movq	_dp_vswing_premph_table@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	cltq
	movl	(%rcx,%rax,4), %edx
	movq	%r14, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_cdv_sb_write                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DP_B,8,3                       ## @DP_B
	.comm	_ddi_DP_train_table,8,3         ## @ddi_DP_train_table
	.comm	_DP_TRAIN_VOLTAGE_SWING_MASK,4,2 ## @DP_TRAIN_VOLTAGE_SWING_MASK
	.comm	_DP_TRAIN_PRE_EMPHASIS_MASK,4,2 ## @DP_TRAIN_PRE_EMPHASIS_MASK
	.comm	_DP_TRAIN_PRE_EMPHASIS_SHIFT,4,2 ## @DP_TRAIN_PRE_EMPHASIS_SHIFT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Test2\n"

	.comm	_dp_vswing_premph_table,8,3     ## @dp_vswing_premph_table
	.comm	_DP_TRAIN_VOLTAGE_SWING_LEVEL_3,4,2 ## @DP_TRAIN_VOLTAGE_SWING_LEVEL_3
	.no_dead_strip	_cdv_intel_dp_set_vswing_premph
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cdv_intel_dp_set_vswing_premph
_cdv_intel_dp_set_vswing_premph:        ; @cdv_intel_dp_set_vswing_premph
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _DP_B@GOTPAGE
Lloh1:
	ldr	x9, [x9, _DP_B@GOTPAGEOFF]
	ldr	x8, [x8]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	cset	w22, ne
Lloh3:
	adrp	x8, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	and	w24, w8, w1
Lloh6:
	adrp	x8, _DP_TRAIN_PRE_EMPHASIS_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DP_TRAIN_PRE_EMPHASIS_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	and	w8, w8, w1
Lloh9:
	adrp	x9, _DP_TRAIN_PRE_EMPHASIS_SHIFT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _DP_TRAIN_PRE_EMPHASIS_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	asr	w20, w8, w9
	add	w21, w20, w24
	cmp	w21, #3
	b.le	LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_2:
	ldr	x19, [x0, #8]
Lloh12:
	adrp	x8, _ddi_DP_train_table@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ddi_DP_train_table@GOTPAGEOFF]
Lloh14:
	ldr	x25, [x8]
Lloh15:
	adrp	x0, l_.str@PAGE
Lloh16:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
	mov	x0, x19
	bl	_cdv_sb_reset
	mov	w8, #24
	madd	x23, x22, x8, x25
	ldr	w1, [x23, #20]
	mov	x0, x19
	mov	w2, #12602
	movk	w2, #1285, lsl #16
	bl	_cdv_sb_write
	ldr	w1, [x23, #8]!
	mov	x0, x19
	mov	w2, #24661
	movk	w2, #17216, lsl #16
	bl	_cdv_sb_write
	cmp	w20, #1
	ccmp	w24, #1, #0, eq
Lloh17:
	adrp	x24, _dp_vswing_premph_table@GOTPAGE
Lloh18:
	ldr	x24, [x24, _dp_vswing_premph_table@GOTPAGEOFF]
	b.eq	LBB0_4
; %bb.3:
	lsl	w8, w21, #1
	ldr	x9, [x24]
	ldr	w2, [x9, w8, sxtw #2]
	b	LBB0_5
LBB0_4:
	mov	w2, #35156
	movk	w2, #21875, lsl #16
LBB0_5:
	mov	w8, #24
	madd	x22, x22, x8, x25
	ldr	w1, [x22, #16]
	mov	x0, x19
	bl	_cdv_sb_write
Lloh19:
	adrp	x8, _DP_TRAIN_VOLTAGE_SWING_LEVEL_3@GOTPAGE
Lloh20:
	ldr	x8, [x8, _DP_TRAIN_VOLTAGE_SWING_LEVEL_3@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	mov	w9, #8256
	movk	w9, #16512, lsl #16
	mov	w10, #8256
	movk	w10, #28800, lsl #16
	cmp	w21, w8
	csel	w2, w10, w9, eq
	ldr	w1, [x22, #12]
	mov	x0, x19
	bl	_cdv_sb_write
	ldr	w1, [x23]
	mov	x0, x19
	mov	w2, #24661
	movk	w2, #49984, lsl #16
	bl	_cdv_sb_write
	ldr	w1, [x22, #4]
	mov	x0, x19
	mov	w2, #64
	movk	w2, #7939, lsl #16
	bl	_cdv_sb_write
	mov	w8, #1
	bfi	w8, w20, #1, #31
	ldr	w1, [x22]
	ldr	x9, [x24]
	ldr	w2, [x9, w8, sxtw #2]
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_cdv_sb_write
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_DP_B,8,3                       ; @DP_B
	.comm	_ddi_DP_train_table,8,3         ; @ddi_DP_train_table
	.comm	_DP_TRAIN_VOLTAGE_SWING_MASK,4,2 ; @DP_TRAIN_VOLTAGE_SWING_MASK
	.comm	_DP_TRAIN_PRE_EMPHASIS_MASK,4,2 ; @DP_TRAIN_PRE_EMPHASIS_MASK
	.comm	_DP_TRAIN_PRE_EMPHASIS_SHIFT,4,2 ; @DP_TRAIN_PRE_EMPHASIS_SHIFT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Test2\n"

	.comm	_dp_vswing_premph_table,8,3     ; @dp_vswing_premph_table
	.comm	_DP_TRAIN_VOLTAGE_SWING_LEVEL_3,4,2 ; @DP_TRAIN_VOLTAGE_SWING_LEVEL_3
	.no_dead_strip	_cdv_intel_dp_set_vswing_premph
.subsections_via_symbols
