	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function jz4780_dma_begin
_jz4780_dma_begin:                      ## @jz4780_dma_begin
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_jz4780_dma_chan_parent
	movq	%rax, %r14
	movq	8(%rbx), %rcx
	testq	%rcx, %rcx
	je	LBB0_3
## %bb.1:
	movl	(%rbx), %eax
	incl	%eax
	xorl	%edx, %edx
	divl	8(%rcx)
	movl	%edx, (%rbx)
LBB0_2:
	movl	4(%rbx), %esi
	movq	%r14, %rdi
	callq	_jz4780_dma_chan_enable
	movl	4(%rbx), %esi
	movq	_JZ_DMA_REG_DCS@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	callq	_jz4780_dma_chn_writel
	movl	4(%rbx), %esi
	movq	_JZ_DMA_REG_DRT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	16(%rbx), %rcx
	movq	%r14, %rdi
	callq	_jz4780_dma_chn_writel
	movl	4(%rbx), %esi
	movq	_JZ_DMA_REG_DTC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	8(%rbx), %rax
	movq	24(%rax), %rax
	movslq	(%rbx), %rcx
	shlq	$4, %rcx
	movq	(%rax,%rcx), %rcx
	movq	%r14, %rdi
	callq	_jz4780_dma_chn_writel
	movq	8(%rbx), %rax
	movslq	(%rbx), %rcx
	shlq	$4, %rcx
	addq	16(%rax), %rcx
	movl	4(%rbx), %esi
	movq	_JZ_DMA_REG_DDA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_jz4780_dma_chn_writel
	movq	_JZ_DMA_REG_DDRS@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	4(%rbx), %edi
	callq	_BIT
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_jz4780_dma_ctrl_writel
	movl	4(%rbx), %esi
	movl	(%r12), %edx
	movq	_JZ_DMA_DCS_CTE@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	movq	%r14, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_jz4780_dma_chn_writel          ## TAILCALL
LBB0_3:
	leaq	24(%rbx), %rdi
	callq	_vchan_next_desc
	testq	%rax, %rax
	je	LBB0_9
## %bb.4:
	movq	%rax, %r15
	movq	%rax, %rdi
	addq	$8, %rdi
	callq	_list_del
	movq	%r15, %rdi
	callq	_to_jz4780_dma_desc
	movq	%rax, 8(%rbx)
	movl	$0, (%rbx)
	movq	(%rax), %rcx
	movq	_DMA_CYCLIC@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jne	LBB0_2
## %bb.5:
	cmpq	$0, (%r15)
	je	LBB0_2
## %bb.6:
	movl	8(%rax), %ecx
	testq	%rcx, %rcx
	je	LBB0_2
## %bb.7:
	movq	24(%rax), %r8
	cmpl	$5, %ecx
	jb	LBB0_8
## %bb.10:
	leaq	8(%r8), %rdx
	movq	_JZ_DMA_DCM_LINK@GOTPCREL(%rip), %rsi
	leaq	4(%rsi), %rdi
	cmpq	%rdi, %rdx
	jae	LBB0_13
## %bb.11:
	movq	%rcx, %rdx
	shlq	$4, %rdx
	addq	%r8, %rdx
	addq	$-4, %rdx
	cmpq	_JZ_DMA_DCM_LINK@GOTPCREL(%rip), %rdx
	jbe	LBB0_13
LBB0_8:
	xorl	%eax, %eax
	jmp	LBB0_15
LBB0_9:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_13:
	movl	%ecx, %edx
	andl	$3, %edx
	testq	%rdx, %rdx
	movl	$4, %edi
	cmovneq	%rdx, %rdi
	movq	%rcx, %rax
	subq	%rdi, %rax
	movd	(%rsi), %xmm0                   ## xmm0 = mem[0],zero,zero,zero
	pshufd	$0, %xmm0, %xmm1                ## xmm1 = xmm0[0,0,0,0]
	pcmpeqd	%xmm0, %xmm0
	pxor	%xmm1, %xmm0
	leaq	56(%r8), %rsi
	movq	%rax, %rdi
	.p2align	4, 0x90
LBB0_14:                                ## =>This Inner Loop Header: Depth=1
	movd	-48(%rsi), %xmm1                ## xmm1 = mem[0],zero,zero,zero
	pinsrd	$1, -32(%rsi), %xmm1
	pinsrd	$2, -16(%rsi), %xmm1
	pinsrd	$3, (%rsi), %xmm1
	pand	%xmm0, %xmm1
	movd	%xmm1, -48(%rsi)
	pextrd	$1, %xmm1, -32(%rsi)
	pextrd	$2, %xmm1, -16(%rsi)
	pextrd	$3, %xmm1, (%rsi)
	addq	$64, %rsi
	addq	$-4, %rdi
	jne	LBB0_14
LBB0_15:
	movl	%ecx, %edi
	subl	%eax, %edi
	movq	%rax, %rsi
	notq	%rsi
	testb	$1, %dil
	je	LBB0_17
## %bb.16:
	movq	_JZ_DMA_DCM_LINK@GOTPCREL(%rip), %rdi
	movl	(%rdi), %edi
	notl	%edi
	movq	%rax, %rdx
	shlq	$4, %rdx
	andl	%edi, 8(%r8,%rdx)
	incq	%rax
LBB0_17:
	addq	%rcx, %rsi
	je	LBB0_2
## %bb.18:
	subq	%rax, %rcx
	shlq	$4, %rax
	addq	%r8, %rax
	addq	$24, %rax
	movq	_JZ_DMA_DCM_LINK@GOTPCREL(%rip), %rdx
	.p2align	4, 0x90
LBB0_19:                                ## =>This Inner Loop Header: Depth=1
	movl	(%rdx), %esi
	notl	%esi
	andl	%esi, -16(%rax)
	movl	(%rdx), %esi
	notl	%esi
	andl	%esi, (%rax)
	addq	$32, %rax
	addq	$-2, %rcx
	jne	LBB0_19
	jmp	LBB0_2
	.cfi_endproc
                                        ## -- End function
	.comm	_DMA_CYCLIC,8,3                 ## @DMA_CYCLIC
	.comm	_JZ_DMA_DCM_LINK,4,2            ## @JZ_DMA_DCM_LINK
	.comm	_JZ_DMA_REG_DCS,4,2             ## @JZ_DMA_REG_DCS
	.comm	_JZ_DMA_REG_DRT,4,2             ## @JZ_DMA_REG_DRT
	.comm	_JZ_DMA_REG_DTC,4,2             ## @JZ_DMA_REG_DTC
	.comm	_JZ_DMA_REG_DDA,4,2             ## @JZ_DMA_REG_DDA
	.comm	_JZ_DMA_REG_DDRS,4,2            ## @JZ_DMA_REG_DDRS
	.comm	_JZ_DMA_DCS_CTE,8,3             ## @JZ_DMA_DCS_CTE
	.no_dead_strip	_jz4780_dma_begin
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function jz4780_dma_begin
_jz4780_dma_begin:                      ; @jz4780_dma_begin
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_jz4780_dma_chan_parent
	mov	x20, x0
	ldr	x8, [x19, #8]
	cbz	x8, LBB0_3
; %bb.1:
	ldr	w9, [x19]
	add	w9, w9, #1
	ldr	w8, [x8, #8]
	udiv	w10, w9, w8
	msub	w8, w10, w8, w9
	str	w8, [x19]
LBB0_2:
	ldr	w1, [x19, #4]
	mov	x0, x20
	bl	_jz4780_dma_chan_enable
	ldr	w1, [x19, #4]
Lloh0:
	adrp	x22, _JZ_DMA_REG_DCS@GOTPAGE
Lloh1:
	ldr	x22, [x22, _JZ_DMA_REG_DCS@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x20
	mov	x3, #0
	bl	_jz4780_dma_chn_writel
	ldr	w1, [x19, #4]
Lloh2:
	adrp	x8, _JZ_DMA_REG_DRT@GOTPAGE
Lloh3:
	ldr	x8, [x8, _JZ_DMA_REG_DRT@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	ldr	x3, [x19, #16]
	mov	x0, x20
	bl	_jz4780_dma_chn_writel
Lloh5:
	adrp	x8, _JZ_DMA_REG_DTC@GOTPAGE
Lloh6:
	ldr	x8, [x8, _JZ_DMA_REG_DTC@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #24]
	ldp	w9, w1, [x19]
                                        ; kill: def $w9 killed $w9 def $x9
	sxtw	x9, w9
	lsl	x9, x9, #4
	ldr	x3, [x8, x9]
	mov	x0, x20
	bl	_jz4780_dma_chn_writel
	ldr	x8, [x19, #8]
	ldr	x8, [x8, #16]
	ldp	w9, w1, [x19]
                                        ; kill: def $w9 killed $w9 def $x9
	sxtw	x9, w9
	add	x3, x8, x9, lsl #4
Lloh8:
	adrp	x8, _JZ_DMA_REG_DDA@GOTPAGE
Lloh9:
	ldr	x8, [x8, _JZ_DMA_REG_DDA@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_jz4780_dma_chn_writel
Lloh11:
	adrp	x8, _JZ_DMA_REG_DDRS@GOTPAGE
Lloh12:
	ldr	x8, [x8, _JZ_DMA_REG_DDRS@GOTPAGEOFF]
Lloh13:
	ldr	w21, [x8]
	ldr	w0, [x19, #4]
	bl	_BIT
	mov	x2, x0
	mov	x0, x20
	mov	x1, x21
	bl	_jz4780_dma_ctrl_writel
	ldr	w1, [x19, #4]
Lloh14:
	adrp	x8, _JZ_DMA_DCS_CTE@GOTPAGE
Lloh15:
	ldr	x8, [x8, _JZ_DMA_DCS_CTE@GOTPAGEOFF]
	ldr	w2, [x22]
Lloh16:
	ldr	x3, [x8]
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_jz4780_dma_chn_writel
LBB0_3:
	add	x0, x19, #24
	bl	_vchan_next_desc
	cbz	x0, LBB0_11
; %bb.4:
	mov	x21, x0
	add	x0, x0, #8
	bl	_list_del
	mov	x0, x21
	bl	_to_jz4780_dma_desc
	str	x0, [x19, #8]
	str	wzr, [x19]
	ldr	x8, [x0]
Lloh17:
	adrp	x9, _DMA_CYCLIC@GOTPAGE
Lloh18:
	ldr	x9, [x9, _DMA_CYCLIC@GOTPAGEOFF]
Lloh19:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.5:
	ldr	x8, [x21]
	cbz	x8, LBB0_2
; %bb.6:
	ldr	w9, [x0, #8]
	cbz	w9, LBB0_2
; %bb.7:
	ldr	x10, [x0, #24]
Lloh20:
	adrp	x8, _JZ_DMA_DCM_LINK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _JZ_DMA_DCM_LINK@GOTPAGEOFF]
	cmp	w9, #5
	b.lo	LBB0_10
; %bb.8:
	add	x11, x10, #8
	add	x12, x8, #4
	cmp	x11, x12
	b.hs	LBB0_12
; %bb.9:
	add	x11, x10, x9, lsl #4
	sub	x11, x11, #4
	cmp	x11, x8
	b.ls	LBB0_12
LBB0_10:
	mov	x11, #0
	b	LBB0_14
LBB0_11:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_12:
	ands	x11, x9, #0x3
	mov	w12, #4
	csel	x11, x12, x11, eq
	sub	x11, x9, x11
	ldr	s0, [x8]
	mvn.16b	v0, v0
	dup.4s	v0, v0[0]
	add	x12, x10, #40
	mov	x13, x11
LBB0_13:                                ; =>This Inner Loop Header: Depth=1
	sub	x14, x12, #32
	ld4.4s	{ v1, v2, v3, v4 }, [x14]
	sub	x14, x12, #16
	add	x15, x12, #16
	and.16b	v1, v1, v0
	stur	s1, [x12, #-32]
	st1.s	{ v1 }[1], [x14]
	st1.s	{ v1 }[2], [x12]
	st1.s	{ v1 }[3], [x15]
	add	x12, x12, #64
	subs	x13, x13, #4
	b.ne	LBB0_13
LBB0_14:
	add	x10, x10, x11, lsl #4
	add	x10, x10, #8
	sub	x9, x9, x11
LBB0_15:                                ; =>This Inner Loop Header: Depth=1
	ldr	w11, [x8]
	ldr	w12, [x10]
	bic	w11, w12, w11
	str	w11, [x10], #16
	subs	x9, x9, #1
	b.ne	LBB0_15
	b	LBB0_2
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_DMA_CYCLIC,8,3                 ; @DMA_CYCLIC
	.comm	_JZ_DMA_DCM_LINK,4,2            ; @JZ_DMA_DCM_LINK
	.comm	_JZ_DMA_REG_DCS,4,2             ; @JZ_DMA_REG_DCS
	.comm	_JZ_DMA_REG_DRT,4,2             ; @JZ_DMA_REG_DRT
	.comm	_JZ_DMA_REG_DTC,4,2             ; @JZ_DMA_REG_DTC
	.comm	_JZ_DMA_REG_DDA,4,2             ; @JZ_DMA_REG_DDA
	.comm	_JZ_DMA_REG_DDRS,4,2            ; @JZ_DMA_REG_DDRS
	.comm	_JZ_DMA_DCS_CTE,8,3             ; @JZ_DMA_DCS_CTE
	.no_dead_strip	_jz4780_dma_begin
.subsections_via_symbols
