	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smu7_patch_voltage_dependency_tables_with_lookup_table
_smu7_patch_voltage_dependency_tables_with_lookup_table: ## @smu7_patch_voltage_dependency_tables_with_lookup_table
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	(%rdi), %r11
	movq	8(%rdi), %rcx
	movq	32(%r11), %rax
	movq	16(%r11), %r9
	movq	24(%r11), %r10
	movq	(%rcx), %rcx
	movq	_SMU7_VOLTAGE_CONTROL_BY_SVID2@GOTPCREL(%rip), %rsi
	movq	(%rax), %r14
	cmpq	(%rsi), %rcx
	jne	LBB0_1
## %bb.4:
	testq	%r14, %r14
	je	LBB0_15
## %bb.5:
	movq	8(%rax), %r8
	movq	8(%r11), %rax
	movq	(%rax), %rdi
	cmpq	$1, %r14
	jne	LBB0_7
## %bb.6:
	xorl	%ecx, %ecx
	jmp	LBB0_9
LBB0_1:
	testq	%r14, %r14
	je	LBB0_15
## %bb.2:
	movq	8(%rax), %r8
	movq	(%r11), %rax
	movq	(%rax), %rdi
	cmpq	$1, %r14
	jne	LBB0_11
## %bb.3:
	xorl	%ecx, %ecx
	jmp	LBB0_13
LBB0_7:
	movq	%r14, %rsi
	andq	$-2, %rsi
	leaq	28(%r8), %rax
	xorl	%ecx, %ecx
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movq	-28(%rax), %rbx
	movq	-12(%rax), %rdx
	movl	(%rdi,%rbx,4), %ebx
	movl	%ebx, -16(%rax)
	movl	(%rdi,%rdx,4), %edx
	movl	%edx, (%rax)
	addq	$2, %rcx
	addq	$32, %rax
	cmpq	%rcx, %rsi
	jne	LBB0_8
LBB0_9:
	testb	$1, %r14b
	je	LBB0_15
## %bb.10:
	shlq	$4, %rcx
	movq	(%r8,%rcx), %rax
	movl	(%rdi,%rax,4), %eax
	movl	%eax, 12(%r8,%rcx)
	jmp	LBB0_15
LBB0_11:
	movq	%r14, %rsi
	andq	$-2, %rsi
	leaq	24(%r8), %rax
	xorl	%ecx, %ecx
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movq	-24(%rax), %rdx
	movq	-8(%rax), %rbx
	movl	(%rdi,%rdx,4), %edx
	movl	%edx, -16(%rax)
	movl	(%rdi,%rbx,4), %edx
	movl	%edx, (%rax)
	addq	$2, %rcx
	addq	$32, %rax
	cmpq	%rcx, %rsi
	jne	LBB0_12
LBB0_13:
	testb	$1, %r14b
	je	LBB0_15
## %bb.14:
	shlq	$4, %rcx
	movq	(%r8,%rcx), %rax
	movl	(%rdi,%rax,4), %eax
	movl	%eax, 8(%r8,%rcx)
LBB0_15:
	movq	(%r10), %r14
	testq	%r14, %r14
	je	LBB0_20
## %bb.16:
	movq	8(%r10), %r8
	movq	(%r11), %rax
	movq	(%rax), %rdi
	cmpq	$1, %r14
	jne	LBB0_23
## %bb.17:
	xorl	%ecx, %ecx
	jmp	LBB0_18
LBB0_23:
	movq	%r14, %rsi
	andq	$-2, %rsi
	leaq	24(%r8), %rax
	xorl	%ecx, %ecx
	.p2align	4, 0x90
LBB0_24:                                ## =>This Inner Loop Header: Depth=1
	movq	-24(%rax), %rbx
	movq	-8(%rax), %rdx
	movl	(%rdi,%rbx,4), %ebx
	movl	%ebx, -16(%rax)
	movl	(%rdi,%rdx,4), %edx
	movl	%edx, (%rax)
	addq	$2, %rcx
	addq	$32, %rax
	cmpq	%rcx, %rsi
	jne	LBB0_24
LBB0_18:
	testb	$1, %r14b
	je	LBB0_20
## %bb.19:
	shlq	$4, %rcx
	movq	(%r8,%rcx), %rax
	movl	(%rdi,%rax,4), %eax
	movl	%eax, 8(%r8,%rcx)
LBB0_20:
	movq	(%r9), %r10
	testq	%r10, %r10
	je	LBB0_29
## %bb.21:
	movq	8(%r9), %r8
	movq	(%r11), %rax
	movq	(%rax), %rax
	cmpq	$1, %r10
	jne	LBB0_25
## %bb.22:
	xorl	%esi, %esi
	jmp	LBB0_27
LBB0_25:
	movq	%r10, %rdi
	andq	$-2, %rdi
	leaq	24(%r8), %rcx
	xorl	%esi, %esi
	.p2align	4, 0x90
LBB0_26:                                ## =>This Inner Loop Header: Depth=1
	movq	-24(%rcx), %rbx
	movq	-8(%rcx), %rdx
	movl	(%rax,%rbx,4), %ebx
	movl	%ebx, -16(%rcx)
	movl	(%rax,%rdx,4), %edx
	movl	%edx, (%rcx)
	addq	$2, %rsi
	addq	$32, %rcx
	cmpq	%rsi, %rdi
	jne	LBB0_26
LBB0_27:
	testb	$1, %r10b
	je	LBB0_29
## %bb.28:
	shlq	$4, %rsi
	movq	(%r8,%rsi), %rcx
	movl	(%rax,%rcx,4), %eax
	movl	%eax, 8(%r8,%rsi)
LBB0_29:
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SMU7_VOLTAGE_CONTROL_BY_SVID2,8,3 ## @SMU7_VOLTAGE_CONTROL_BY_SVID2
	.no_dead_strip	_smu7_patch_voltage_dependency_tables_with_lookup_table
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smu7_patch_voltage_dependency_tables_with_lookup_table
_smu7_patch_voltage_dependency_tables_with_lookup_table: ; @smu7_patch_voltage_dependency_tables_with_lookup_table
	.cfi_startproc
; %bb.0:
	ldp	x8, x11, [x0]
	ldp	x10, x12, [x8, #24]
	ldr	x9, [x8, #16]
	ldr	x13, [x11]
Lloh0:
	adrp	x11, _SMU7_VOLTAGE_CONTROL_BY_SVID2@GOTPAGE
Lloh1:
	ldr	x11, [x11, _SMU7_VOLTAGE_CONTROL_BY_SVID2@GOTPAGEOFF]
Lloh2:
	ldr	x14, [x11]
	ldr	x11, [x12]
	cmp	x13, x14
	b.ne	LBB0_4
; %bb.1:
	cbz	x11, LBB0_17
; %bb.2:
	ldr	x13, [x12, #8]
	ldr	x12, [x8, #8]
	ldr	x12, [x12]
	cmp	x11, #4
	b.hs	LBB0_7
; %bb.3:
	mov	x14, #0
	b	LBB0_10
LBB0_4:
	cbz	x11, LBB0_17
; %bb.5:
	ldr	x13, [x12, #8]
	ldr	x12, [x8]
	ldr	x12, [x12]
	cmp	x11, #4
	b.hs	LBB0_12
; %bb.6:
	mov	x14, #0
	b	LBB0_15
LBB0_7:
	and	x14, x11, #0xfffffffffffffffc
	add	x15, x13, #32
	mov	x16, x14
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	ldur	x17, [x15, #-32]
	ldur	x0, [x15, #-16]
	ldr	x1, [x15]
	ldr	x2, [x15, #16]
	ldr	w17, [x12, x17, lsl #2]
	ldr	w0, [x12, x0, lsl #2]
	ldr	w1, [x12, x1, lsl #2]
	ldr	w2, [x12, x2, lsl #2]
	stur	w17, [x15, #-20]
	stur	w0, [x15, #-4]
	str	w1, [x15, #12]
	str	w2, [x15, #28]
	add	x15, x15, #64
	subs	x16, x16, #4
	b.ne	LBB0_8
; %bb.9:
	cmp	x11, x14
	b.eq	LBB0_17
LBB0_10:
	sub	x11, x11, x14
	add	x13, x13, x14, lsl #4
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	ldr	x14, [x13]
	ldr	w14, [x12, x14, lsl #2]
	str	w14, [x13, #12]
	add	x13, x13, #16
	subs	x11, x11, #1
	b.ne	LBB0_11
	b	LBB0_17
LBB0_12:
	and	x14, x11, #0xfffffffffffffffc
	add	x15, x13, #32
	mov	x16, x14
LBB0_13:                                ; =>This Inner Loop Header: Depth=1
	ldur	x17, [x15, #-32]
	ldur	x0, [x15, #-16]
	ldr	x1, [x15]
	ldr	x2, [x15, #16]
	ldr	w17, [x12, x17, lsl #2]
	ldr	w0, [x12, x0, lsl #2]
	ldr	w1, [x12, x1, lsl #2]
	ldr	w2, [x12, x2, lsl #2]
	stur	w17, [x15, #-24]
	stur	w0, [x15, #-8]
	str	w1, [x15, #8]
	str	w2, [x15, #24]
	add	x15, x15, #64
	subs	x16, x16, #4
	b.ne	LBB0_13
; %bb.14:
	cmp	x11, x14
	b.eq	LBB0_17
LBB0_15:
	sub	x11, x11, x14
	add	x13, x13, x14, lsl #4
	add	x13, x13, #8
LBB0_16:                                ; =>This Inner Loop Header: Depth=1
	ldur	x14, [x13, #-8]
	ldr	w14, [x12, x14, lsl #2]
	str	w14, [x13], #16
	subs	x11, x11, #1
	b.ne	LBB0_16
LBB0_17:
	ldr	x11, [x10]
	cbz	x11, LBB0_25
; %bb.18:
	ldr	x12, [x10, #8]
	ldr	x10, [x8]
	ldr	x10, [x10]
	cmp	x11, #4
	b.hs	LBB0_20
; %bb.19:
	mov	x13, #0
	b	LBB0_23
LBB0_20:
	and	x13, x11, #0xfffffffffffffffc
	add	x14, x12, #32
	mov	x15, x13
LBB0_21:                                ; =>This Inner Loop Header: Depth=1
	ldur	x16, [x14, #-32]
	ldur	x17, [x14, #-16]
	ldr	x0, [x14]
	ldr	x1, [x14, #16]
	ldr	w16, [x10, x16, lsl #2]
	ldr	w17, [x10, x17, lsl #2]
	ldr	w0, [x10, x0, lsl #2]
	ldr	w1, [x10, x1, lsl #2]
	stur	w16, [x14, #-24]
	stur	w17, [x14, #-8]
	str	w0, [x14, #8]
	str	w1, [x14, #24]
	add	x14, x14, #64
	subs	x15, x15, #4
	b.ne	LBB0_21
; %bb.22:
	cmp	x11, x13
	b.eq	LBB0_25
LBB0_23:
	sub	x11, x11, x13
	add	x12, x12, x13, lsl #4
	add	x12, x12, #8
LBB0_24:                                ; =>This Inner Loop Header: Depth=1
	ldur	x13, [x12, #-8]
	ldr	w13, [x10, x13, lsl #2]
	str	w13, [x12], #16
	subs	x11, x11, #1
	b.ne	LBB0_24
LBB0_25:
	ldr	x10, [x9]
	cbz	x10, LBB0_33
; %bb.26:
	ldr	x9, [x9, #8]
	ldr	x8, [x8]
	ldr	x8, [x8]
	cmp	x10, #4
	b.hs	LBB0_28
; %bb.27:
	mov	x11, #0
	b	LBB0_31
LBB0_28:
	and	x11, x10, #0xfffffffffffffffc
	add	x12, x9, #32
	mov	x13, x11
LBB0_29:                                ; =>This Inner Loop Header: Depth=1
	ldur	x14, [x12, #-32]
	ldur	x15, [x12, #-16]
	ldr	x16, [x12]
	ldr	x17, [x12, #16]
	ldr	w14, [x8, x14, lsl #2]
	ldr	w15, [x8, x15, lsl #2]
	ldr	w16, [x8, x16, lsl #2]
	ldr	w17, [x8, x17, lsl #2]
	stur	w14, [x12, #-24]
	stur	w15, [x12, #-8]
	str	w16, [x12, #8]
	str	w17, [x12, #24]
	add	x12, x12, #64
	subs	x13, x13, #4
	b.ne	LBB0_29
; %bb.30:
	cmp	x10, x11
	b.eq	LBB0_33
LBB0_31:
	sub	x10, x10, x11
	add	x9, x9, x11, lsl #4
	add	x9, x9, #8
LBB0_32:                                ; =>This Inner Loop Header: Depth=1
	ldur	x11, [x9, #-8]
	ldr	w11, [x8, x11, lsl #2]
	str	w11, [x9], #16
	subs	x10, x10, #1
	b.ne	LBB0_32
LBB0_33:
	mov	w0, #0
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SMU7_VOLTAGE_CONTROL_BY_SVID2,8,3 ; @SMU7_VOLTAGE_CONTROL_BY_SVID2
	.no_dead_strip	_smu7_patch_voltage_dependency_tables_with_lookup_table
.subsections_via_symbols
