	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gmc_v8_0_get_clockgating_state
_gmc_v8_0_get_clockgating_state:        ## @gmc_v8_0_get_clockgating_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rsi, %rbx
	callq	_amdgpu_sriov_vf
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movl	$0, (%rbx)
LBB0_2:
	movq	_mmMC_HUB_MISC_HUB_CG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	_MC_HUB_MISC_HUB_CG__ENABLE_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_4
## %bb.3:
	movq	_AMD_CG_SUPPORT_MC_MGCG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, (%rbx)
LBB0_4:
	movq	_MC_HUB_MISC_HUB_CG__MEM_LS_ENABLE_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_6
## %bb.5:
	movq	_AMD_CG_SUPPORT_MC_LS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%rbx)
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_mmMC_HUB_MISC_HUB_CG,4,2       ## @mmMC_HUB_MISC_HUB_CG
	.comm	_MC_HUB_MISC_HUB_CG__ENABLE_MASK,4,2 ## @MC_HUB_MISC_HUB_CG__ENABLE_MASK
	.comm	_AMD_CG_SUPPORT_MC_MGCG,4,2     ## @AMD_CG_SUPPORT_MC_MGCG
	.comm	_MC_HUB_MISC_HUB_CG__MEM_LS_ENABLE_MASK,4,2 ## @MC_HUB_MISC_HUB_CG__MEM_LS_ENABLE_MASK
	.comm	_AMD_CG_SUPPORT_MC_LS,4,2       ## @AMD_CG_SUPPORT_MC_LS
	.no_dead_strip	_gmc_v8_0_get_clockgating_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gmc_v8_0_get_clockgating_state
_gmc_v8_0_get_clockgating_state:        ; @gmc_v8_0_get_clockgating_state
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	bl	_amdgpu_sriov_vf
	cbz	x0, LBB0_2
; %bb.1:
	str	wzr, [x19]
LBB0_2:
Lloh0:
	adrp	x8, _mmMC_HUB_MISC_HUB_CG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _mmMC_HUB_MISC_HUB_CG@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_RREG32
Lloh3:
	adrp	x8, _MC_HUB_MISC_HUB_CG__ENABLE_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MC_HUB_MISC_HUB_CG__ENABLE_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_4
; %bb.3:
Lloh6:
	adrp	x8, _AMD_CG_SUPPORT_MC_MGCG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AMD_CG_SUPPORT_MC_MGCG@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_4:
Lloh9:
	adrp	x8, _MC_HUB_MISC_HUB_CG__MEM_LS_ENABLE_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MC_HUB_MISC_HUB_CG__MEM_LS_ENABLE_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_6
; %bb.5:
Lloh12:
	adrp	x8, _AMD_CG_SUPPORT_MC_LS@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AMD_CG_SUPPORT_MC_LS@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_6:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_mmMC_HUB_MISC_HUB_CG,4,2       ; @mmMC_HUB_MISC_HUB_CG
	.comm	_MC_HUB_MISC_HUB_CG__ENABLE_MASK,4,2 ; @MC_HUB_MISC_HUB_CG__ENABLE_MASK
	.comm	_AMD_CG_SUPPORT_MC_MGCG,4,2     ; @AMD_CG_SUPPORT_MC_MGCG
	.comm	_MC_HUB_MISC_HUB_CG__MEM_LS_ENABLE_MASK,4,2 ; @MC_HUB_MISC_HUB_CG__MEM_LS_ENABLE_MASK
	.comm	_AMD_CG_SUPPORT_MC_LS,4,2       ; @AMD_CG_SUPPORT_MC_LS
	.no_dead_strip	_gmc_v8_0_get_clockgating_state
.subsections_via_symbols
