	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function trinity_setup_uvd_clocks
_trinity_setup_uvd_clocks:              ## @trinity_setup_uvd_clocks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r12
	movq	%rsi, %r15
	movq	%rdi, %r13
	callq	_trinity_get_pi
	movq	%rax, %r14
	cmpq	$0, (%rax)
	je	LBB0_2
## %bb.1:
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_trinity_gfx_powergating_enable
LBB0_2:
	movq	8(%r14), %rbx
	movq	%r15, %rdi
	callq	_trinity_uvd_clocks_zero
	testq	%rbx, %rbx
	je	LBB0_11
## %bb.3:
	testq	%rax, %rax
	je	LBB0_6
## %bb.4:
	movq	%r12, %rdi
	callq	_trinity_uvd_clocks_zero
	testq	%rax, %rax
	je	LBB0_5
LBB0_6:
	movq	%r15, %rdi
	callq	_trinity_uvd_clocks_zero
	testq	%rax, %rax
	jne	LBB0_10
## %bb.7:
	movq	%r13, %rdi
	movq	%r15, %rsi
	callq	_trinity_setup_uvd_clock_table
	movq	%r12, %rdi
	callq	_trinity_uvd_clocks_zero
	testq	%rax, %rax
	je	LBB0_10
## %bb.8:
	movq	_CG_MISC_REG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_RREG32
	andl	$-3, %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_WREG32
	movl	(%r15), %edx
	movl	4(%r15), %esi
	movq	%r13, %rdi
	callq	_radeon_set_uvd_clocks
	movl	$3000, %esi                     ## imm = 0xBB8
	jmp	LBB0_9
LBB0_11:
	testq	%rax, %rax
	jne	LBB0_15
## %bb.12:
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_trinity_uvd_clocks_equal
	testq	%rax, %rax
	jne	LBB0_15
## %bb.13:
	movl	(%r15), %edx
	movl	4(%r15), %esi
	movq	%r13, %rdi
	callq	_radeon_set_uvd_clocks
	cmpq	$0, (%r14)
	jne	LBB0_16
LBB0_15:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	xorl	%esi, %esi
LBB0_9:
	movq	%r13, %rdi
	callq	_trinity_setup_uvd_dpm_interval
LBB0_10:
	movq	%r13, %rdi
	callq	_trinity_uvd_dpm_config
	cmpq	$0, (%r14)
	je	LBB0_15
LBB0_16:
	movq	%r13, %rdi
	movl	$1, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_trinity_gfx_powergating_enable ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CG_MISC_REG,4,2                ## @CG_MISC_REG
	.no_dead_strip	_trinity_setup_uvd_clocks
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function trinity_setup_uvd_clocks
_trinity_setup_uvd_clocks:              ; @trinity_setup_uvd_clocks
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x2
	mov	x21, x1
	mov	x19, x0
	bl	_trinity_get_pi
	mov	x20, x0
	ldr	x8, [x0]
	cbz	x8, LBB0_2
; %bb.1:
	mov	x0, x19
	mov	w1, #0
	bl	_trinity_gfx_powergating_enable
LBB0_2:
	ldr	x23, [x20, #8]
	mov	x0, x21
	bl	_trinity_uvd_clocks_zero
	cbz	x23, LBB0_8
; %bb.3:
	cbz	x0, LBB0_5
; %bb.4:
	mov	x0, x22
	bl	_trinity_uvd_clocks_zero
	cbz	x0, LBB0_12
LBB0_5:
	mov	x0, x21
	bl	_trinity_uvd_clocks_zero
	cbnz	x0, LBB0_14
; %bb.6:
	mov	x0, x19
	mov	x1, x21
	bl	_trinity_setup_uvd_clock_table
	mov	x0, x22
	bl	_trinity_uvd_clocks_zero
	cbz	x0, LBB0_14
; %bb.7:
Lloh0:
	adrp	x22, _CG_MISC_REG@GOTPAGE
Lloh1:
	ldr	x22, [x22, _CG_MISC_REG@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_RREG32
	and	w1, w0, #0xfffffffd
	ldr	w0, [x22]
	bl	_WREG32
	ldp	w2, w1, [x21]
	mov	x0, x19
	bl	_radeon_set_uvd_clocks
	mov	w1, #3000
	b	LBB0_13
LBB0_8:
	cbnz	x0, LBB0_11
; %bb.9:
	mov	x0, x21
	mov	x1, x22
	bl	_trinity_uvd_clocks_equal
	cbnz	x0, LBB0_11
; %bb.10:
	ldp	w2, w1, [x21]
	mov	x0, x19
	bl	_radeon_set_uvd_clocks
	ldr	x8, [x20]
	cbnz	x8, LBB0_15
LBB0_11:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_12:
	mov	w1, #0
LBB0_13:
	mov	x0, x19
	bl	_trinity_setup_uvd_dpm_interval
LBB0_14:
	mov	x0, x19
	bl	_trinity_uvd_dpm_config
	ldr	x8, [x20]
	cbz	x8, LBB0_11
LBB0_15:
	mov	x0, x19
	mov	w1, #1
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_trinity_gfx_powergating_enable
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_CG_MISC_REG,4,2                ; @CG_MISC_REG
	.no_dead_strip	_trinity_setup_uvd_clocks
.subsections_via_symbols
