	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdma_v4_0_process_trap_irq
_sdma_v4_0_process_trap_irq:            ## @sdma_v4_0_process_trap_irq
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdx, %rbx
	movq	%rdi, %r14
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG
	movl	4(%rbx), %edi
	callq	_sdma_v4_0_irq_id_to_seq
	movl	(%rbx), %ecx
	cmpl	$3, %ecx
	je	LBB0_5
## %bb.1:
	cmpl	$1, %ecx
	je	LBB0_4
## %bb.2:
	testl	%ecx, %ecx
	jne	LBB0_8
## %bb.3:
	movq	(%r14), %rcx
	leaq	(%rcx,%rax,8), %rdi
	addq	$4, %rdi
	jmp	LBB0_7
LBB0_5:
	movl	8(%r14), %ecx
	movq	_CHIP_VEGA20@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	jne	LBB0_6
	jmp	LBB0_8
LBB0_4:
	movl	8(%r14), %ecx
	movq	_CHIP_VEGA20@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	jne	LBB0_8
LBB0_6:
	shlq	$3, %rax
	addq	(%r14), %rax
	movq	%rax, %rdi
LBB0_7:
	callq	_amdgpu_fence_process
LBB0_8:
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"IH: SDMA trap\n"

	.comm	_CHIP_VEGA20,4,2                ## @CHIP_VEGA20
	.no_dead_strip	_sdma_v4_0_process_trap_irq
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdma_v4_0_process_trap_irq
_sdma_v4_0_process_trap_irq:            ; @sdma_v4_0_process_trap_irq
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x2
	mov	x19, x0
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w0, [x20, #4]
	bl	_sdma_v4_0_irq_id_to_seq
	ldr	w8, [x20]
	cmp	w8, #3
	b.eq	LBB0_4
; %bb.1:
	cmp	w8, #1
	b.eq	LBB0_5
; %bb.2:
	cbnz	w8, LBB0_8
; %bb.3:
	ldr	x8, [x19]
	add	x8, x8, x0, lsl #3
	add	x0, x8, #4
	b	LBB0_7
LBB0_4:
	ldr	w8, [x19, #8]
Lloh2:
	adrp	x9, _CHIP_VEGA20@GOTPAGE
Lloh3:
	ldr	x9, [x9, _CHIP_VEGA20@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_6
	b	LBB0_8
LBB0_5:
	ldr	w8, [x19, #8]
Lloh5:
	adrp	x9, _CHIP_VEGA20@GOTPAGE
Lloh6:
	ldr	x9, [x9, _CHIP_VEGA20@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_8
LBB0_6:
	ldr	x8, [x19]
	add	x0, x8, x0, lsl #3
LBB0_7:
	bl	_amdgpu_fence_process
LBB0_8:
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"IH: SDMA trap\n"

	.comm	_CHIP_VEGA20,4,2                ; @CHIP_VEGA20
	.no_dead_strip	_sdma_v4_0_process_trap_irq
.subsections_via_symbols
