	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_atom_get_clock_dividers ## -- Begin function radeon_atom_get_clock_dividers
	.p2align	4, 0x90
_radeon_atom_get_clock_dividers:        ## @radeon_atom_get_clock_dividers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r8, %r12
	movl	%ecx, -100(%rbp)                ## 4-byte Spill
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movl	%esi, %ebx
	movq	%rdi, %r13
	movq	_COMMAND@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_ComputeMemoryEnginePLL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_GetIndexIntoMasterTable
	movl	%eax, %r15d
	leaq	-88(%rbp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	movl	$40, %edx
	callq	_memset
	movq	%r12, -96(%rbp)                 ## 8-byte Spill
	movq	%r12, %rdi
	xorl	%esi, %esi
	movl	$240, %edx
	callq	_memset
	movl	(%r13), %edi
	leaq	-108(%rbp), %rdx
	leaq	-104(%rbp), %rcx
	movl	%r15d, %esi
	callq	_atom_parse_cmd_header
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movl	-104(%rbp), %eax
	decl	%eax
	cmpl	$5, %eax
	ja	LBB0_17
## %bb.3:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_5:
	movl	4(%r13), %eax
	movq	_CHIP_RV770@GOTPCREL(%rip), %r14
	cmpl	(%r14), %eax
	jle	LBB0_6
## %bb.9:
	movq	_COMPUTE_ENGINE_PLL_PARAM@GOTPCREL(%rip), %rcx
	cmpl	%ebx, (%rcx)
	jne	LBB0_11
## %bb.10:
	shll	$24, %ebx
	orl	-44(%rbp), %ebx                 ## 4-byte Folded Reload
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, -64(%rbp)
	jmp	LBB0_14
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_18
LBB0_6:
	movl	%ebx, -88(%rbp)
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_le32
	movq	%rax, -80(%rbp)
	movl	(%r13), %edi
	leaq	-88(%rbp), %rdx
	movl	%r15d, %esi
	callq	_atom_execute_table
	movl	-68(%rbp), %eax
	movq	-96(%rbp), %rbx                 ## 8-byte Reload
	movl	%eax, 72(%rbx)
	movl	-72(%rbp), %edi
	callq	_le16_to_cpu
	movl	%eax, (%rbx)
	movl	-88(%rbp), %ecx
	movl	%ecx, 8(%rbx)
	movl	4(%r13), %ecx
	cmpl	(%r14), %ecx
	jne	LBB0_8
## %bb.7:
	movq	-80(%rbp), %rdi
	callq	_le32_to_cpu
	shrl	$24, %eax
	andl	$1, %eax
	movl	%eax, 4(%rbx)
	movq	-80(%rbp), %rdi
	callq	_le32_to_cpu
	shrl	$25, %eax
	andl	$1, %eax
	movl	%eax, 12(%rbx)
	xorl	%r14d, %r14d
	jmp	LBB0_19
LBB0_4:
	movl	%ebx, -88(%rbp)
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_le32
	movq	%rax, -72(%rbp)
	movl	(%r13), %edi
	leaq	-88(%rbp), %rdx
	movl	%r15d, %esi
	callq	_atom_execute_table
	movl	-80(%rbp), %eax
	movq	-96(%rbp), %rcx                 ## 8-byte Reload
	movl	%eax, 72(%rcx)
	movl	-84(%rbp), %eax
	movl	%eax, (%rcx)
	movl	$1, 4(%rcx)
	xorl	%r14d, %r14d
	jmp	LBB0_19
LBB0_15:
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_le32
	movq	%rax, -88(%rbp)
	movl	(%r13), %edi
	leaq	-88(%rbp), %rdx
	movl	%r15d, %esi
	callq	_atom_execute_table
	movl	-80(%rbp), %eax
	movq	-96(%rbp), %rbx                 ## 8-byte Reload
	movl	%eax, 72(%rbx)
	movl	%eax, 64(%rbx)
	movq	-88(%rbp), %rdi
	callq	_le32_to_cpu
	movl	%eax, 20(%rbx)
	xorl	%r14d, %r14d
	jmp	LBB0_19
LBB0_16:
	movl	%ebx, -88(%rbp)
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_le32
	movq	%rax, -80(%rbp)
	movl	(%r13), %edi
	leaq	-88(%rbp), %rdx
	movl	%r15d, %esi
	callq	_atom_execute_table
	movl	-52(%rbp), %edi
	callq	_le16_to_cpu
	movq	-96(%rbp), %rbx                 ## 8-byte Reload
	movq	%rax, 88(%rbx)
	movl	-56(%rbp), %edi
	callq	_le16_to_cpu
	movq	%rax, 80(%rbx)
	movl	-88(%rbp), %eax
	movl	%eax, 8(%rbx)
	movl	-60(%rbp), %eax
	movl	%eax, 72(%rbx)
	movl	-64(%rbp), %eax
	movl	%eax, 68(%rbx)
	movq	-72(%rbp), %rdi
	callq	_le32_to_cpu
	movl	%eax, 20(%rbx)
	movl	-80(%rbp), %eax
	movl	%eax, 64(%rbx)
	xorl	%r14d, %r14d
	jmp	LBB0_19
LBB0_11:
	movq	_CHIP_TAHITI@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jge	LBB0_17
## %bb.12:
	shll	$24, %ebx
	orl	-44(%rbp), %ebx                 ## 4-byte Folded Reload
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, -64(%rbp)
	cmpl	$0, -100(%rbp)                  ## 4-byte Folded Reload
	je	LBB0_14
## %bb.13:
	movq	_ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -68(%rbp)
LBB0_14:
	movl	(%r13), %edi
	leaq	-88(%rbp), %rdx
	movl	%r15d, %esi
	callq	_atom_execute_table
	movl	-72(%rbp), %eax
	movq	-96(%rbp), %rbx                 ## 8-byte Reload
	movl	%eax, 72(%rbx)
	movl	-88(%rbp), %eax
	movq	_ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	setne	%dl
	movl	%edx, 4(%rbx)
	movq	_ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	andl	(%rcx), %eax
	sete	%dl
	movl	%edx, 16(%rbx)
	movl	-76(%rbp), %edi
	callq	_le16_to_cpu
	movq	%rax, 88(%rbx)
	movl	-80(%rbp), %edi
	callq	_le16_to_cpu
	movq	%rax, 80(%rbx)
	movl	-84(%rbp), %eax
	movl	%eax, 8(%rbx)
	movq	_ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	andl	-88(%rbp), %eax
	setne	%cl
	movl	%ecx, 12(%rbx)
	xorl	%r14d, %r14d
	jmp	LBB0_19
LBB0_17:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
LBB0_18:
	subl	(%rax), %r14d
LBB0_19:
	movl	%r14d, %eax
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_8:
	andl	$1, %eax
	movl	%eax, 4(%rbx)
	xorl	%r14d, %r14d
	jmp	LBB0_19
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
LJTI0_0:
	.long	L0_0_set_4
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_15
	.long	L0_0_set_5
	.long	L0_0_set_16
	.end_data_region
                                        ## -- End function
	.comm	_COMMAND,4,2                    ## @COMMAND
	.comm	_ComputeMemoryEnginePLL,4,2     ## @ComputeMemoryEnginePLL
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_CHIP_RV770,4,2                 ## @CHIP_RV770
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ## @COMPUTE_ENGINE_PLL_PARAM
	.comm	_ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN,4,2 ## @ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN
	.comm	_ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE,4,2 ## @ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE
	.comm	_ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE,4,2 ## @ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE
	.comm	_CHIP_TAHITI,4,2                ## @CHIP_TAHITI
	.comm	_ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN,4,2 ## @ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_atom_get_clock_dividers ; -- Begin function radeon_atom_get_clock_dividers
	.p2align	2
_radeon_atom_get_clock_dividers:        ; @radeon_atom_get_clock_dividers
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x4
	mov	x23, x3
	mov	x22, x2
	mov	x24, x1
	mov	x21, x0
Lloh0:
	adrp	x8, _COMMAND@GOTPAGE
Lloh1:
	ldr	x8, [x8, _COMMAND@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _ComputeMemoryEnginePLL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ComputeMemoryEnginePLL@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_GetIndexIntoMasterTable
	mov	x20, x0
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #40
	bl	_memset
	mov	x0, x19
	mov	w1, #0
	mov	w2, #240
	bl	_memset
	ldr	w0, [x21]
	add	x2, sp, #4
	mov	x3, sp
	mov	x1, x20
	bl	_atom_parse_cmd_header
	cbz	w0, LBB0_15
; %bb.1:
	ldr	w8, [sp]
	sub	w8, w8, #1
	cmp	w8, #5
	b.hi	LBB0_15
; %bb.2:
Lloh6:
	adrp	x9, lJTI0_0@PAGE
Lloh7:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_3
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_3:
	ldr	w8, [x21, #4]
Lloh8:
	adrp	x25, _CHIP_RV770@GOTPAGE
Lloh9:
	ldr	x25, [x25, _CHIP_RV770@GOTPAGEOFF]
	ldr	w9, [x25]
	cmp	w8, w9
	b.le	LBB0_6
; %bb.4:
Lloh10:
	adrp	x9, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGE
Lloh11:
	ldr	x9, [x9, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	cmp	w9, w24
	b.ne	LBB0_11
; %bb.5:
	orr	w0, w22, w24, lsl #24
	bl	_cpu_to_le32
	str	x0, [sp, #32]
	b	LBB0_14
LBB0_6:
	str	w24, [sp, #8]
	mov	x0, x22
	bl	_cpu_to_le32
	str	x0, [sp, #16]
	ldr	w0, [x21]
	add	x2, sp, #8
	mov	x1, x20
	bl	_atom_execute_table
	ldp	w0, w8, [sp, #24]
	str	w8, [x19, #72]
	bl	_le16_to_cpu
	mov	x8, x0
	str	w8, [x19]
	ldr	w9, [sp, #8]
	str	w9, [x19, #8]
	ldr	w9, [x21, #4]
	ldr	w10, [x25]
	cmp	w9, w10
	b.ne	LBB0_17
; %bb.7:
	ldr	x0, [sp, #16]
	bl	_le32_to_cpu
	ubfx	w8, w0, #24, #1
	str	w8, [x19, #4]
	ldr	x0, [sp, #16]
	bl	_le32_to_cpu
	mov	x8, x0
	mov	w0, #0
	ubfx	w8, w8, #25, #1
	str	w8, [x19, #12]
	b	LBB0_16
LBB0_8:
	str	w24, [sp, #8]
	mov	x0, x22
	bl	_cpu_to_le32
	str	x0, [sp, #24]
	ldr	w0, [x21]
	add	x2, sp, #8
	mov	x1, x20
	bl	_atom_execute_table
	mov	w0, #0
	ldp	w9, w8, [sp, #12]
	str	w8, [x19, #72]
	mov	w8, #1
	stp	w9, w8, [x19]
	b	LBB0_16
LBB0_9:
	mov	x0, x22
	bl	_cpu_to_le32
	str	x0, [sp, #8]
	ldr	w0, [x21]
	add	x2, sp, #8
	mov	x1, x20
	bl	_atom_execute_table
	ldr	w8, [sp, #16]
	str	w8, [x19, #72]
	str	w8, [x19, #64]
	ldr	x0, [sp, #8]
	bl	_le32_to_cpu
	mov	x8, x0
	mov	w0, #0
	str	w8, [x19, #20]
	b	LBB0_16
LBB0_10:
	str	w24, [sp, #8]
	mov	x0, x22
	bl	_cpu_to_le32
	str	x0, [sp, #16]
	ldr	w0, [x21]
	add	x2, sp, #8
	mov	x1, x20
	bl	_atom_execute_table
	ldr	w0, [sp, #44]
	bl	_le16_to_cpu
	str	x0, [x19, #88]
	ldr	w0, [sp, #40]
	bl	_le16_to_cpu
	str	x0, [x19, #80]
	ldr	w8, [sp, #8]
	str	w8, [x19, #8]
	ldr	d0, [sp, #32]
	stur	d0, [x19, #68]
	ldr	x0, [sp, #24]
	bl	_le32_to_cpu
	mov	x8, x0
	mov	w0, #0
	str	w8, [x19, #20]
	ldr	w8, [sp, #16]
	str	w8, [x19, #64]
	b	LBB0_16
LBB0_11:
Lloh13:
	adrp	x9, _CHIP_TAHITI@GOTPAGE
Lloh14:
	ldr	x9, [x9, _CHIP_TAHITI@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ge	LBB0_15
; %bb.12:
	orr	w0, w22, w24, lsl #24
	bl	_cpu_to_le32
	str	x0, [sp, #32]
	cbz	w23, LBB0_14
; %bb.13:
Lloh16:
	adrp	x8, _ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN@GOTPAGE
Lloh17:
	ldr	x8, [x8, _ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	str	w8, [sp, #28]
LBB0_14:
	ldr	w0, [x21]
	add	x2, sp, #8
	mov	x1, x20
	bl	_atom_execute_table
	ldp	w0, w8, [sp, #20]
	str	w8, [x19, #72]
Lloh19:
	adrp	x8, _ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN@GOTPAGE
Lloh20:
	ldr	x8, [x8, _ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	ldr	w9, [sp, #8]
	tst	w8, w9
	cset	w8, ne
	str	w8, [x19, #4]
Lloh22:
	adrp	x8, _ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	tst	w8, w9
	cset	w8, eq
	str	w8, [x19, #16]
	bl	_le16_to_cpu
	str	x0, [x19, #88]
	ldr	w0, [sp, #16]
	bl	_le16_to_cpu
	mov	x8, x0
	mov	w0, #0
	str	x8, [x19, #80]
Lloh25:
	adrp	x8, _ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE@GOTPAGE
Lloh26:
	ldr	x8, [x8, _ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE@GOTPAGEOFF]
	ldp	w10, w9, [sp, #8]
Lloh27:
	ldr	w8, [x8]
	tst	w8, w10
	cset	w8, ne
	stp	w9, w8, [x19, #8]
	b	LBB0_16
LBB0_15:
Lloh28:
	adrp	x8, _EINVAL@GOTPAGE
Lloh29:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_16:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_17:
	mov	w0, #0
	and	w8, w8, #0x1
	str	w8, [x19, #4]
	b	LBB0_16
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_8-LBB0_3)>>2
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_9-LBB0_3)>>2
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_10-LBB0_3)>>2
                                        ; -- End function
	.comm	_COMMAND,4,2                    ; @COMMAND
	.comm	_ComputeMemoryEnginePLL,4,2     ; @ComputeMemoryEnginePLL
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_CHIP_RV770,4,2                 ; @CHIP_RV770
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ; @COMPUTE_ENGINE_PLL_PARAM
	.comm	_ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN,4,2 ; @ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN
	.comm	_ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE,4,2 ; @ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE
	.comm	_ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE,4,2 ; @ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE
	.comm	_CHIP_TAHITI,4,2                ; @CHIP_TAHITI
	.comm	_ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN,4,2 ; @ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN
.subsections_via_symbols
