	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce112_enable_display_power_gating
_dce112_enable_display_power_gating:    ## @dce112_enable_display_power_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r14d
	movq	%rdx, %r13
	movq	%rsi, %r15
	movq	_BP_RESULT_OK@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	(%rdi), %rbx
	movl	(%rbx), %edi
	callq	_IS_FPGA_MAXIMUS_DC
	movq	%rax, %rcx
	movl	$1, %eax
	testq	%rcx, %rcx
	jne	LBB0_12
## %bb.1:
	movq	_PIPE_GATING_CONTROL_INIT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testq	%r15, %r15
	je	LBB0_3
## %bb.2:
	cmpl	%r14d, %eax
	je	LBB0_9
LBB0_3:
	movq	_PIPE_GATING_CONTROL_ENABLE@GOTPCREL(%rip), %rcx
	cmpl	%r14d, (%rcx)
	jne	LBB0_4
## %bb.5:
	movq	_ASIC_PIPE_ENABLE@GOTPCREL(%rip), %rcx
	cmpl	%r14d, %eax
	je	LBB0_7
	jmp	LBB0_8
LBB0_4:
	movq	_ASIC_PIPE_DISABLE@GOTPCREL(%rip), %rcx
	cmpl	%r14d, %eax
	jne	LBB0_8
LBB0_7:
	movq	_ASIC_PIPE_INIT@GOTPCREL(%rip), %rcx
LBB0_8:
	movl	(%rcx), %edx
	movq	(%r13), %rax
	leaq	1(%r15), %rsi
	movq	%r13, %rdi
	callq	*(%rax)
	movl	%eax, %r12d
	movq	_mmCRTC_MASTER_UPDATE_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%r15, %rsi
	callq	_HW_REG_CRTC
	movq	%rbx, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_dm_write_reg
LBB0_9:
	movq	_PIPE_GATING_CONTROL_ENABLE@GOTPCREL(%rip), %rax
	cmpl	%r14d, (%rax)
	movq	_BP_RESULT_OK@GOTPCREL(%rip), %rcx
	je	LBB0_11
## %bb.10:
	movq	%rbx, %rdi
	callq	_dce112_init_pte
	movq	_BP_RESULT_OK@GOTPCREL(%rip), %rcx
LBB0_11:
	xorl	%eax, %eax
	cmpl	(%rcx), %r12d
	sete	%al
LBB0_12:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BP_RESULT_OK,4,2               ## @BP_RESULT_OK
	.comm	_PIPE_GATING_CONTROL_INIT,4,2   ## @PIPE_GATING_CONTROL_INIT
	.comm	_ASIC_PIPE_INIT,4,2             ## @ASIC_PIPE_INIT
	.comm	_PIPE_GATING_CONTROL_ENABLE,4,2 ## @PIPE_GATING_CONTROL_ENABLE
	.comm	_ASIC_PIPE_ENABLE,4,2           ## @ASIC_PIPE_ENABLE
	.comm	_ASIC_PIPE_DISABLE,4,2          ## @ASIC_PIPE_DISABLE
	.comm	_mmCRTC_MASTER_UPDATE_MODE,4,2  ## @mmCRTC_MASTER_UPDATE_MODE
	.no_dead_strip	_dce112_enable_display_power_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce112_enable_display_power_gating
_dce112_enable_display_power_gating:    ; @dce112_enable_display_power_gating
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x3
	mov	x23, x2
	mov	x22, x1
Lloh0:
	adrp	x24, _BP_RESULT_OK@GOTPAGE
Lloh1:
	ldr	x24, [x24, _BP_RESULT_OK@GOTPAGEOFF]
	ldr	w21, [x24]
	ldr	x20, [x0]
	ldr	w0, [x20]
	bl	_IS_FPGA_MAXIMUS_DC
	cbz	x0, LBB0_2
; %bb.1:
	mov	w0, #1
	b	LBB0_8
LBB0_2:
Lloh2:
	adrp	x8, _PIPE_GATING_CONTROL_INIT@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PIPE_GATING_CONTROL_INIT@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x25, _PIPE_GATING_CONTROL_ENABLE@GOTPAGE
Lloh6:
	ldr	x25, [x25, _PIPE_GATING_CONTROL_ENABLE@GOTPAGEOFF]
	cbz	x22, LBB0_4
; %bb.3:
	cmp	w8, w19
	b.eq	LBB0_5
LBB0_4:
	ldr	w9, [x25]
Lloh7:
	adrp	x10, _ASIC_PIPE_INIT@GOTPAGE
Lloh8:
	ldr	x10, [x10, _ASIC_PIPE_INIT@GOTPAGEOFF]
Lloh9:
	adrp	x11, _ASIC_PIPE_ENABLE@GOTPAGE
Lloh10:
	ldr	x11, [x11, _ASIC_PIPE_ENABLE@GOTPAGEOFF]
Lloh11:
	adrp	x12, _ASIC_PIPE_DISABLE@GOTPAGE
Lloh12:
	ldr	x12, [x12, _ASIC_PIPE_DISABLE@GOTPAGEOFF]
	cmp	w9, w19
	csel	x9, x11, x12, eq
	cmp	w8, w19
	csel	x8, x10, x9, eq
	ldr	w2, [x8]
	ldr	x8, [x23]
	ldr	x8, [x8]
	add	x1, x22, #1
	mov	x0, x23
	blr	x8
	mov	x21, x0
Lloh13:
	adrp	x8, _mmCRTC_MASTER_UPDATE_MODE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _mmCRTC_MASTER_UPDATE_MODE@GOTPAGEOFF]
Lloh15:
	ldr	w0, [x8]
	mov	x1, x22
	bl	_HW_REG_CRTC
	mov	x1, x0
	mov	x0, x20
	mov	w2, #0
	bl	_dm_write_reg
LBB0_5:
	ldr	w8, [x25]
	cmp	w8, w19
	b.eq	LBB0_7
; %bb.6:
	mov	x0, x20
	bl	_dce112_init_pte
LBB0_7:
	ldr	w8, [x24]
	cmp	w21, w8
	cset	w0, eq
LBB0_8:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_BP_RESULT_OK,4,2               ; @BP_RESULT_OK
	.comm	_PIPE_GATING_CONTROL_INIT,4,2   ; @PIPE_GATING_CONTROL_INIT
	.comm	_ASIC_PIPE_INIT,4,2             ; @ASIC_PIPE_INIT
	.comm	_PIPE_GATING_CONTROL_ENABLE,4,2 ; @PIPE_GATING_CONTROL_ENABLE
	.comm	_ASIC_PIPE_ENABLE,4,2           ; @ASIC_PIPE_ENABLE
	.comm	_ASIC_PIPE_DISABLE,4,2          ; @ASIC_PIPE_DISABLE
	.comm	_mmCRTC_MASTER_UPDATE_MODE,4,2  ; @mmCRTC_MASTER_UPDATE_MODE
	.no_dead_strip	_dce112_enable_display_power_gating
.subsections_via_symbols
