	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_fbc_hw_tracking_covers_screen
_intel_fbc_hw_tracking_covers_screen:   ## @intel_fbc_hw_tracking_covers_screen
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdi), %edi
	callq	_to_i915
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_INTEL_GEN
	movl	$4096, %r15d                    ## imm = 0x1000
	movl	$5120, %r14d                    ## imm = 0x1400
	cmpl	$9, %eax
	jg	LBB0_8
## %bb.1:
	movq	%rbx, %rdi
	callq	_IS_GEMINILAKE
	testq	%rax, %rax
	jne	LBB0_8
## %bb.2:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	movl	$4096, %r14d                    ## imm = 0x1000
	cmpl	$7, %eax
	jg	LBB0_3
## %bb.4:
	movq	%rbx, %rdi
	callq	_IS_HASWELL
	testq	%rax, %rax
	je	LBB0_6
LBB0_3:
	movl	$4096, %r15d                    ## imm = 0x1000
LBB0_8:
	leaq	-32(%rbp), %rsi
	leaq	-28(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_intel_fbc_get_plane_source_size
	movl	-32(%rbp), %eax
	addl	8(%rbx), %eax
	movl	-28(%rbp), %ecx
	addl	(%rbx), %ecx
	cmpl	%r14d, %eax
	setbe	%al
	cmpl	%r15d, %ecx
	setbe	%cl
	andb	%al, %cl
	movzbl	%cl, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	movq	%rbx, %rdi
	callq	_IS_G4X
	movl	$2048, %r15d                    ## imm = 0x800
	testq	%rax, %rax
	jne	LBB0_8
## %bb.7:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	xorl	%r15d, %r15d
	cmpl	$5, %eax
	setge	%r15b
	movl	%r15d, %r14d
	shll	$11, %r14d
	addl	$2048, %r14d                    ## imm = 0x800
	shll	$9, %r15d
	addl	$1536, %r15d                    ## imm = 0x600
	jmp	LBB0_8
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_intel_fbc_hw_tracking_covers_screen
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_fbc_hw_tracking_covers_screen
_intel_fbc_hw_tracking_covers_screen:   ; @intel_fbc_hw_tracking_covers_screen
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	w0, [x0]
	bl	_to_i915
	mov	x19, x0
	bl	_INTEL_GEN
	cmp	w0, #9
	b.gt	LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_IS_GEMINILAKE
	cbz	x0, LBB0_4
LBB0_2:
	mov	w21, #4096
	mov	w20, #5120
LBB0_3:
	add	x1, sp, #12
	add	x2, sp, #8
	mov	x0, x19
	bl	_intel_fbc_get_plane_source_size
	ldr	w8, [x19, #8]
	ldp	w11, w9, [sp, #8]
	ldr	w10, [x19]
	add	w10, w11, w10
	add	w8, w9, w8
	cmp	w8, w20
	ccmp	w10, w21, #2, ls
	cset	w0, ls
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_4:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #7
	b.gt	LBB0_6
; %bb.5:
	mov	x0, x19
	bl	_IS_HASWELL
	cbz	x0, LBB0_7
LBB0_6:
	mov	w20, #4096
	mov	w21, #4096
	b	LBB0_3
LBB0_7:
	mov	x0, x19
	bl	_IS_G4X
	mov	w21, #2048
	mov	w20, #4096
	cbnz	x0, LBB0_3
; %bb.8:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #4
	csel	w20, w20, w21, gt
	mov	w8, #1536
	csel	w21, w21, w8, gt
	b	LBB0_3
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_intel_fbc_hw_tracking_covers_screen
.subsections_via_symbols
