	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function i9xx_update_wm
_i9xx_update_wm:                        ## @i9xx_update_wm
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	16(%rdi), %edi
	callq	_to_i915
	movq	%rax, %r13
	movq	%rax, %rdi
	callq	_IS_I945GM
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_i945_wm_info@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_2:
	movq	%r13, %rdi
	movl	$2, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	jne	LBB0_3
## %bb.4:
	movq	_i915_wm_info@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_3:
	movq	_i830_a_wm_info@GOTPCREL(%rip), %rax
LBB0_5:
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	_PLANE_A@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r13, %rdi
	callq	*(%r13)
	movl	%eax, %r12d
	movl	(%rbx), %esi
	movq	%r13, %rdi
	callq	_intel_get_crtc_for_plane
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	_intel_crtc_active
	testq	%rax, %rax
	je	LBB0_9
## %bb.6:
	movq	(%r14), %rbx
	movq	8(%r14), %rax
	movq	(%rax), %rax
	movq	(%rax), %r15
	movq	%r13, %rdi
	movl	$2, %esi
	callq	_IS_GEN
	movl	$4, %ecx
	testq	%rax, %rax
	jne	LBB0_8
## %bb.7:
	movq	(%r15), %rax
	movq	(%rax), %rax
	movl	(%rax), %ecx
LBB0_8:
	movl	4(%rbx), %edi
	movq	_pessimal_latency_ns@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	-48(%rbp), %rsi                 ## 8-byte Reload
	movl	%r12d, %edx
	callq	_intel_calculate_wm
	movl	%eax, %r12d
	jmp	LBB0_10
LBB0_9:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	subl	(%rax), %r12d
	movl	4(%rax), %eax
	cmpl	%eax, %r12d
	cmovgel	%eax, %r12d
	xorl	%r14d, %r14d
LBB0_10:
	movq	%r13, %rdi
	movl	$2, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_12
## %bb.11:
	movq	_i830_bc_wm_info@GOTPCREL(%rip), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
LBB0_12:
	movq	_PLANE_B@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r13, %rdi
	callq	*(%r13)
	movl	%eax, %r15d
	movl	(%rbx), %esi
	movq	%r13, %rdi
	callq	_intel_get_crtc_for_plane
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_intel_crtc_active
	testq	%rax, %rax
	movq	%r12, -72(%rbp)                 ## 8-byte Spill
	je	LBB0_16
## %bb.13:
	movq	(%rbx), %r12
	movq	8(%rbx), %rax
	movq	(%rax), %rax
	movq	(%rax), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	%r13, %rdi
	movl	$2, %esi
	callq	_IS_GEN
	movl	$4, %ecx
	testq	%rax, %rax
	jne	LBB0_15
## %bb.14:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rax
	movq	(%rax), %rax
	movl	(%rax), %ecx
LBB0_15:
	movl	4(%r12), %edi
	movq	_pessimal_latency_ns@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	-48(%rbp), %rsi                 ## 8-byte Reload
	movl	%r15d, %edx
	callq	_intel_calculate_wm
	movl	%eax, %r15d
	xorl	%eax, %eax
	testq	%r14, %r14
	cmoveq	%rbx, %rax
	movq	%rax, %r14
	movq	-72(%rbp), %r12                 ## 8-byte Reload
	jmp	LBB0_17
LBB0_16:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	subl	(%rax), %r15d
	movl	4(%rax), %eax
	cmpl	%eax, %r15d
	cmovgel	%eax, %r15d
LBB0_17:
	leaq	L_.str(%rip), %rdi
	movl	%r12d, %esi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movq	%r13, %rdi
	callq	_IS_I915GM
	testq	%r14, %r14
	je	LBB0_20
## %bb.18:
	testq	%rax, %rax
	je	LBB0_20
## %bb.19:
	movq	8(%r14), %rax
	movq	(%rax), %rax
	movq	(%rax), %rdi
	callq	_intel_fb_obj
	movq	%rax, %rdi
	callq	_i915_gem_object_is_tiled
	xorl	%ecx, %ecx
	testl	%eax, %eax
	cmoveq	%rcx, %r14
LBB0_20:
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_intel_set_memory_cxsr
	movq	%r13, %rdi
	callq	_HAS_FW_BLC
	movl	$1, %r12d
	testq	%r14, %r14
	je	LBB0_30
## %bb.21:
	testq	%rax, %rax
	je	LBB0_30
## %bb.22:
	movq	(%r14), %rax
	movq	8(%r14), %rcx
	movq	(%rcx), %rcx
	movq	(%rcx), %r12
	movl	(%rax), %ecx
	movl	%ecx, -56(%rbp)                 ## 4-byte Spill
	movl	4(%rax), %ecx
	movl	%ecx, -64(%rbp)                 ## 4-byte Spill
	movl	8(%rax), %eax
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movq	%r13, %rdi
	callq	_IS_I915GM
	movl	$4, %ebx
	testq	%rax, %rax
	jne	LBB0_25
## %bb.23:
	movq	%r13, %rdi
	callq	_IS_I945GM
	testq	%rax, %rax
	jne	LBB0_25
## %bb.24:
	movq	(%r12), %rax
	movq	(%rax), %rax
	movl	(%rax), %ebx
LBB0_25:
	movl	-64(%rbp), %edi                 ## 4-byte Reload
	movl	-60(%rbp), %esi                 ## 4-byte Reload
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	movl	%ebx, %ecx
	movl	$60, %r8d
	callq	_intel_wm_method2
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	movl	12(%r12), %esi
	movl	%eax, %edi
	callq	_DIV_ROUND_UP
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movl	8(%r12), %eax
	subl	%ebx, %eax
	movl	$1, %r12d
	cmovnsl	%eax, %r12d
	movq	%r13, %rdi
	callq	_IS_I945G
	testq	%rax, %rax
	jne	LBB0_27
## %bb.26:
	movq	%r13, %rdi
	callq	_IS_I945GM
	testq	%rax, %rax
	je	LBB0_28
LBB0_27:
	movq	_FW_BLC_SELF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_FW_BLC_SELF_FIFO_MASK@GOTPCREL(%rip), %rax
	movzbl	%r12b, %esi
	orl	(%rax), %esi
LBB0_29:
	callq	_I915_WRITE
LBB0_30:
	leaq	L_.str.2(%rip), %rdi
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	movl	%ebx, %esi
	movl	%r15d, %edx
	movl	$2, %ecx
	movl	%r12d, %r8d
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	andl	$63, %r15d
	shll	$16, %r15d
	andl	$63, %ebx
	leal	(%rbx,%r15), %esi
	addl	$16777472, %esi                 ## imm = 0x1000100
	movq	_FW_BLC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_WRITE
	movq	_FW_BLC2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$258, %esi                      ## imm = 0x102
	callq	_I915_WRITE
	testq	%r14, %r14
	je	LBB0_31
## %bb.32:
	movq	%r13, %rdi
	movl	$1, %esi
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_set_memory_cxsr          ## TAILCALL
LBB0_31:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_28:
	movq	_FW_BLC_SELF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r12d, %esi
	andl	$63, %esi
	jmp	LBB0_29
	.cfi_endproc
                                        ## -- End function
	.comm	_i945_wm_info,16,2              ## @i945_wm_info
	.comm	_i915_wm_info,16,2              ## @i915_wm_info
	.comm	_i830_a_wm_info,16,2            ## @i830_a_wm_info
	.comm	_PLANE_A,4,2                    ## @PLANE_A
	.comm	_pessimal_latency_ns,4,2        ## @pessimal_latency_ns
	.comm	_i830_bc_wm_info,16,2           ## @i830_bc_wm_info
	.comm	_PLANE_B,4,2                    ## @PLANE_B
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"FIFO watermarks - A: %d, B: %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"self-refresh entries: %d\n"

	.comm	_FW_BLC_SELF,4,2                ## @FW_BLC_SELF
	.comm	_FW_BLC_SELF_FIFO_MASK,4,2      ## @FW_BLC_SELF_FIFO_MASK
L_.str.2:                               ## @.str.2
	.asciz	"Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n"

	.comm	_FW_BLC,4,2                     ## @FW_BLC
	.comm	_FW_BLC2,4,2                    ## @FW_BLC2
	.no_dead_strip	_i9xx_update_wm
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function i9xx_update_wm
_i9xx_update_wm:                        ; @i9xx_update_wm
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w0, [x0, #16]
	bl	_to_i915
	mov	x19, x0
	bl	_IS_I945GM
	cbz	x0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x22, _i945_wm_info@GOTPAGE
Lloh1:
	ldr	x22, [x22, _i945_wm_info@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:
	mov	x0, x19
	mov	w1, #2
	bl	_IS_GEN
Lloh2:
	adrp	x8, _i830_a_wm_info@GOTPAGE
Lloh3:
	ldr	x8, [x8, _i830_a_wm_info@GOTPAGEOFF]
Lloh4:
	adrp	x9, _i915_wm_info@GOTPAGE
Lloh5:
	ldr	x9, [x9, _i915_wm_info@GOTPAGEOFF]
	cmp	x0, #0
	csel	x22, x9, x8, eq
LBB0_3:
	ldr	x8, [x19]
Lloh6:
	adrp	x20, _PLANE_A@GOTPAGE
Lloh7:
	ldr	x20, [x20, _PLANE_A@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	blr	x8
	mov	x21, x0
	ldr	w1, [x20]
	mov	x0, x19
	bl	_intel_get_crtc_for_plane
	mov	x20, x0
	bl	_intel_crtc_active
Lloh8:
	adrp	x25, _pessimal_latency_ns@GOTPAGE
Lloh9:
	ldr	x25, [x25, _pessimal_latency_ns@GOTPAGEOFF]
	cbz	x0, LBB0_6
; %bb.4:
	ldp	x23, x8, [x20]
	ldr	x8, [x8]
	ldr	x24, [x8]
	mov	x0, x19
	mov	w1, #2
	bl	_IS_GEN
	cbz	x0, LBB0_7
; %bb.5:
	mov	w3, #4
	b	LBB0_8
LBB0_6:
	mov	x20, #0
	ldp	w8, w9, [x22]
	sub	w8, w21, w8
	cmp	w8, w9
	csel	w21, w8, w9, lt
	b	LBB0_9
LBB0_7:
	ldr	x8, [x24]
	ldr	x8, [x8]
	ldr	w3, [x8]
LBB0_8:
	ldr	w0, [x23, #4]
	ldr	w4, [x25]
	mov	x1, x22
	mov	x2, x21
	bl	_intel_calculate_wm
	mov	x21, x0
LBB0_9:
	mov	x0, x19
	mov	w1, #2
	bl	_IS_GEN
Lloh10:
	adrp	x8, _i830_bc_wm_info@GOTPAGE
Lloh11:
	ldr	x8, [x8, _i830_bc_wm_info@GOTPAGEOFF]
	cmp	x0, #0
	csel	x22, x22, x8, eq
	ldr	x8, [x19]
Lloh12:
	adrp	x24, _PLANE_B@GOTPAGE
Lloh13:
	ldr	x24, [x24, _PLANE_B@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x19
	blr	x8
	mov	x23, x0
	ldr	w1, [x24]
	mov	x0, x19
	bl	_intel_get_crtc_for_plane
	mov	x24, x0
	bl	_intel_crtc_active
	cbz	x0, LBB0_12
; %bb.10:
	ldp	x26, x8, [x24]
	ldr	x8, [x8]
	ldr	x27, [x8]
	mov	x0, x19
	mov	w1, #2
	bl	_IS_GEN
	cbz	x0, LBB0_13
; %bb.11:
	mov	w3, #4
	b	LBB0_14
LBB0_12:
	ldp	w8, w9, [x22]
	sub	w8, w23, w8
	cmp	w8, w9
	csel	w23, w8, w9, lt
	b	LBB0_15
LBB0_13:
	ldr	x8, [x27]
	ldr	x8, [x8]
	ldr	w3, [x8]
LBB0_14:
	ldr	w0, [x26, #4]
	ldr	w4, [x25]
	mov	x1, x22
	mov	x2, x23
	bl	_intel_calculate_wm
	mov	x23, x0
	cmp	x20, #0
	csel	x20, x24, xzr, eq
LBB0_15:
	mov	x8, x23
	str	x8, [sp]
Lloh14:
	adrp	x0, l_.str@PAGE
Lloh15:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x21
	bl	_DRM_DEBUG_KMS
	mov	x0, x19
	bl	_IS_I915GM
	cbz	x20, LBB0_18
; %bb.16:
	cbz	x0, LBB0_18
; %bb.17:
	ldr	x8, [x20, #8]
	ldr	x8, [x8]
	ldr	x0, [x8]
	bl	_intel_fb_obj
	bl	_i915_gem_object_is_tiled
	cmp	w0, #0
	csel	x20, xzr, x20, eq
LBB0_18:
	mov	x0, x19
	mov	w1, #0
	bl	_intel_set_memory_cxsr
	mov	x0, x19
	bl	_HAS_FW_BLC
	mov	w24, #1
	cbz	x20, LBB0_27
; %bb.19:
	cbz	x0, LBB0_27
; %bb.20:
	ldp	x8, x9, [x20]
	ldr	x9, [x9]
	ldr	x27, [x9]
	ldp	w26, w24, [x8, #4]
	ldr	w25, [x8]
	mov	x0, x19
	bl	_IS_I915GM
	cbnz	x0, LBB0_22
; %bb.21:
	mov	x0, x19
	bl	_IS_I945GM
	cbz	x0, LBB0_30
LBB0_22:
	mov	w3, #4
LBB0_23:
	mov	x0, x26
	mov	x1, x24
	mov	x2, x25
	mov	w4, #60
	bl	_intel_wm_method2
	ldr	w1, [x22, #12]
	bl	_DIV_ROUND_UP
	mov	x24, x0
Lloh16:
	adrp	x0, l_.str.1@PAGE
Lloh17:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	x1, x24
	bl	_DRM_DEBUG_KMS
	ldr	w8, [x22, #8]
	sub	w8, w8, w24
	cmp	w8, #0
	csinc	w24, w8, wzr, ge
	mov	x0, x19
	bl	_IS_I945G
	cbnz	x0, LBB0_25
; %bb.24:
	mov	x0, x19
	bl	_IS_I945GM
	cbz	x0, LBB0_31
LBB0_25:
Lloh18:
	adrp	x8, _FW_BLC_SELF@GOTPAGE
Lloh19:
	ldr	x8, [x8, _FW_BLC_SELF@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
Lloh21:
	adrp	x8, _FW_BLC_SELF_FIFO_MASK@GOTPAGE
Lloh22:
	ldr	x8, [x8, _FW_BLC_SELF_FIFO_MASK@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	and	w9, w24, #0xff
	orr	w1, w8, w9
LBB0_26:
	bl	_I915_WRITE
LBB0_27:
	mov	w8, #2
	stp	x8, x24, [sp, #8]
	str	x23, [sp]
Lloh24:
	adrp	x0, l_.str.2@PAGE
Lloh25:
	add	x0, x0, l_.str.2@PAGEOFF
	mov	x1, x21
	bl	_DRM_DEBUG_KMS
	and	w8, w21, #0x3f
	bfi	w8, w23, #16, #6
	orr	w1, w8, #0x1000100
Lloh26:
	adrp	x8, _FW_BLC@GOTPAGE
Lloh27:
	ldr	x8, [x8, _FW_BLC@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
	bl	_I915_WRITE
Lloh29:
	adrp	x8, _FW_BLC2@GOTPAGE
Lloh30:
	ldr	x8, [x8, _FW_BLC2@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	mov	w1, #258
	bl	_I915_WRITE
	cbz	x20, LBB0_29
; %bb.28:
	mov	x0, x19
	mov	w1, #1
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	b	_intel_set_memory_cxsr
LBB0_29:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_30:
	ldr	x8, [x27]
	ldr	x8, [x8]
	ldr	w3, [x8]
	b	LBB0_23
LBB0_31:
Lloh32:
	adrp	x8, _FW_BLC_SELF@GOTPAGE
Lloh33:
	ldr	x8, [x8, _FW_BLC_SELF@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
	and	w1, w24, #0x3f
	b	LBB0_26
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.cfi_endproc
                                        ; -- End function
	.comm	_i945_wm_info,16,2              ; @i945_wm_info
	.comm	_i915_wm_info,16,2              ; @i915_wm_info
	.comm	_i830_a_wm_info,16,2            ; @i830_a_wm_info
	.comm	_PLANE_A,4,2                    ; @PLANE_A
	.comm	_pessimal_latency_ns,4,2        ; @pessimal_latency_ns
	.comm	_i830_bc_wm_info,16,2           ; @i830_bc_wm_info
	.comm	_PLANE_B,4,2                    ; @PLANE_B
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"FIFO watermarks - A: %d, B: %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"self-refresh entries: %d\n"

	.comm	_FW_BLC_SELF,4,2                ; @FW_BLC_SELF
	.comm	_FW_BLC_SELF_FIFO_MASK,4,2      ; @FW_BLC_SELF_FIFO_MASK
l_.str.2:                               ; @.str.2
	.asciz	"Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n"

	.comm	_FW_BLC,4,2                     ; @FW_BLC
	.comm	_FW_BLC2,4,2                    ; @FW_BLC2
	.no_dead_strip	_i9xx_update_wm
.subsections_via_symbols
