	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_combo_phy_power_up_lanes ## -- Begin function intel_combo_phy_power_up_lanes
	.p2align	4, 0x90
_intel_combo_phy_power_up_lanes:        ## @intel_combo_phy_power_up_lanes
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%ecx, %ebx
	movl	%esi, %r14d
	testl	%edx, %edx
	je	LBB0_6
## %bb.1:
	movl	%r8d, %edi
	callq	_WARN_ON
	leal	-1(%rbx), %eax
	cmpl	$3, %eax
	ja	LBB0_15
## %bb.2:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_3:
	movq	_PWR_DOWN_LN_3_1_0@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_6:
	cmpl	$4, %ebx
	je	LBB0_16
## %bb.7:
	cmpl	$2, %ebx
	je	LBB0_12
## %bb.8:
	cmpl	$1, %ebx
	jne	LBB0_15
## %bb.9:
	testl	%r8d, %r8d
	jne	LBB0_10
## %bb.11:
	movq	_PWR_DOWN_LN_3_2_1@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_15:
	movl	%ebx, %edi
	callq	_MISSING_CASE
LBB0_16:
	movq	_PWR_UP_ALL_LANES@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_4:
	movq	_PWR_DOWN_LN_3_1@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_5:
	movq	_PWR_DOWN_LN_3@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_12:
	testl	%r8d, %r8d
	jne	LBB0_13
## %bb.14:
	movq	_PWR_DOWN_LN_3_2@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_10:
	movq	_PWR_DOWN_LN_2_1_0@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_13:
	movq	_PWR_DOWN_LN_1_0@GOTPCREL(%rip), %rax
LBB0_17:
	movl	(%rax), %ebx
	movl	%r14d, %edi
	callq	_ICL_PORT_CL_DW10
	movl	%eax, %edi
	callq	_I915_READ
	movq	_PWR_DOWN_LN_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movq	_PWR_DOWN_LN_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %ebx
	orl	%edx, %ebx
	movl	%r14d, %edi
	callq	_ICL_PORT_CL_DW10
	movl	%eax, %edi
	movl	%ebx, %esi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_I915_WRITE                     ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
LJTI0_0:
	.long	L0_0_set_3
	.long	L0_0_set_4
	.long	L0_0_set_5
	.long	L0_0_set_16
	.end_data_region
                                        ## -- End function
	.comm	_PWR_DOWN_LN_3_1_0,4,2          ## @PWR_DOWN_LN_3_1_0
	.comm	_PWR_DOWN_LN_3_1,4,2            ## @PWR_DOWN_LN_3_1
	.comm	_PWR_DOWN_LN_3,4,2              ## @PWR_DOWN_LN_3
	.comm	_PWR_UP_ALL_LANES,4,2           ## @PWR_UP_ALL_LANES
	.comm	_PWR_DOWN_LN_2_1_0,4,2          ## @PWR_DOWN_LN_2_1_0
	.comm	_PWR_DOWN_LN_3_2_1,4,2          ## @PWR_DOWN_LN_3_2_1
	.comm	_PWR_DOWN_LN_1_0,4,2            ## @PWR_DOWN_LN_1_0
	.comm	_PWR_DOWN_LN_3_2,4,2            ## @PWR_DOWN_LN_3_2
	.comm	_PWR_DOWN_LN_MASK,4,2           ## @PWR_DOWN_LN_MASK
	.comm	_PWR_DOWN_LN_SHIFT,4,2          ## @PWR_DOWN_LN_SHIFT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_combo_phy_power_up_lanes ; -- Begin function intel_combo_phy_power_up_lanes
	.p2align	2
_intel_combo_phy_power_up_lanes:        ; @intel_combo_phy_power_up_lanes
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x3
	mov	x19, x1
	cbz	w2, LBB0_4
; %bb.1:
	mov	x0, x4
	bl	_WARN_ON
	sub	w8, w20, #1
	cmp	w8, #3
	b.hi	LBB0_8
; %bb.2:
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_3
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_3:
Lloh2:
	adrp	x8, _PWR_DOWN_LN_3_1_0@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PWR_DOWN_LN_3_1_0@GOTPAGEOFF]
	b	LBB0_14
LBB0_4:
	cmp	w20, #4
	b.eq	LBB0_9
; %bb.5:
	cmp	w20, #2
	b.eq	LBB0_12
; %bb.6:
	cmp	w20, #1
	b.ne	LBB0_8
; %bb.7:
Lloh4:
	adrp	x8, _PWR_DOWN_LN_2_1_0@GOTPAGE
Lloh5:
	ldr	x8, [x8, _PWR_DOWN_LN_2_1_0@GOTPAGEOFF]
Lloh6:
	adrp	x9, _PWR_DOWN_LN_3_2_1@GOTPAGE
Lloh7:
	ldr	x9, [x9, _PWR_DOWN_LN_3_2_1@GOTPAGEOFF]
	b	LBB0_13
LBB0_8:
	mov	x0, x20
	bl	_MISSING_CASE
LBB0_9:
Lloh8:
	adrp	x8, _PWR_UP_ALL_LANES@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PWR_UP_ALL_LANES@GOTPAGEOFF]
	b	LBB0_14
LBB0_10:
Lloh10:
	adrp	x8, _PWR_DOWN_LN_3_1@GOTPAGE
Lloh11:
	ldr	x8, [x8, _PWR_DOWN_LN_3_1@GOTPAGEOFF]
	b	LBB0_14
LBB0_11:
Lloh12:
	adrp	x8, _PWR_DOWN_LN_3@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PWR_DOWN_LN_3@GOTPAGEOFF]
	b	LBB0_14
LBB0_12:
Lloh14:
	adrp	x8, _PWR_DOWN_LN_1_0@GOTPAGE
Lloh15:
	ldr	x8, [x8, _PWR_DOWN_LN_1_0@GOTPAGEOFF]
Lloh16:
	adrp	x9, _PWR_DOWN_LN_3_2@GOTPAGE
Lloh17:
	ldr	x9, [x9, _PWR_DOWN_LN_3_2@GOTPAGEOFF]
LBB0_13:
	cmp	w4, #0
	csel	x8, x9, x8, eq
LBB0_14:
	ldr	w20, [x8]
	mov	x0, x19
	bl	_ICL_PORT_CL_DW10
	bl	_I915_READ
Lloh18:
	adrp	x8, _PWR_DOWN_LN_MASK@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PWR_DOWN_LN_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh21:
	adrp	x9, _PWR_DOWN_LN_SHIFT@GOTPAGE
Lloh22:
	ldr	x9, [x9, _PWR_DOWN_LN_SHIFT@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	lsl	w9, w20, w9
	orr	w20, w9, w8
	mov	x0, x19
	bl	_ICL_PORT_CL_DW10
	mov	x1, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_I915_WRITE
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_10-LBB0_3)>>2
	.byte	(LBB0_11-LBB0_3)>>2
	.byte	(LBB0_9-LBB0_3)>>2
                                        ; -- End function
	.comm	_PWR_DOWN_LN_3_1_0,4,2          ; @PWR_DOWN_LN_3_1_0
	.comm	_PWR_DOWN_LN_3_1,4,2            ; @PWR_DOWN_LN_3_1
	.comm	_PWR_DOWN_LN_3,4,2              ; @PWR_DOWN_LN_3
	.comm	_PWR_UP_ALL_LANES,4,2           ; @PWR_UP_ALL_LANES
	.comm	_PWR_DOWN_LN_2_1_0,4,2          ; @PWR_DOWN_LN_2_1_0
	.comm	_PWR_DOWN_LN_3_2_1,4,2          ; @PWR_DOWN_LN_3_2_1
	.comm	_PWR_DOWN_LN_1_0,4,2            ; @PWR_DOWN_LN_1_0
	.comm	_PWR_DOWN_LN_3_2,4,2            ; @PWR_DOWN_LN_3_2
	.comm	_PWR_DOWN_LN_MASK,4,2           ; @PWR_DOWN_LN_MASK
	.comm	_PWR_DOWN_LN_SHIFT,4,2          ; @PWR_DOWN_LN_SHIFT
.subsections_via_symbols
