	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function btc_initialize_mc_reg_table
_btc_initialize_mc_reg_table:           ## @btc_initialize_mc_reg_table
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	callq	_evergreen_get_pi
	movq	%rax, %r14
	movq	%r13, %rdi
	callq	_rv770_get_memory_module_index
	movl	%eax, %r12d
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$4, %edi
	callq	_kzalloc
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	%rax, %r15
	movq	_MC_SEQ_RAS_TIMING_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MC_SEQ_RAS_TIMING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_MC_SEQ_CAS_TIMING_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MC_SEQ_CAS_TIMING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_MC_SEQ_MISC_TIMING_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MC_SEQ_MISC_TIMING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_MC_SEQ_MISC_TIMING2_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MC_SEQ_MISC_TIMING2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_MC_SEQ_RD_CTL_D0_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MC_SEQ_RD_CTL_D0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_MC_SEQ_RD_CTL_D1_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MC_SEQ_RD_CTL_D1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_MC_SEQ_WR_CTL_D0_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MC_SEQ_WR_CTL_D0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_MC_SEQ_WR_CTL_D1_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MC_SEQ_WR_CTL_D1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_MC_SEQ_PMG_CMD_EMRS_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MC_PMG_CMD_EMRS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_MC_SEQ_PMG_CMD_MRS_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MC_PMG_CMD_MRS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_MC_SEQ_PMG_CMD_MRS1_LP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_MC_PMG_CMD_MRS1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	%r13, %rdi
	movl	%r12d, %esi
	movq	%r15, %rdx
	callq	_radeon_atom_init_mc_reg_table
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_6
## %bb.3:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_btc_copy_vbios_mc_reg_table
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_6
## %bb.4:
	movq	%r14, %rdi
	callq	_btc_set_s0_mc_reg_index
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	_btc_set_mc_special_registers
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_6
## %bb.5:
	movq	%r14, %rdi
	callq	_btc_set_valid_flag
	xorl	%ebx, %ebx
LBB0_6:
	movq	%r15, %rdi
	callq	_kfree
	jmp	LBB0_7
LBB0_1:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_7:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_MC_SEQ_RAS_TIMING_LP,4,2       ## @MC_SEQ_RAS_TIMING_LP
	.comm	_MC_SEQ_RAS_TIMING,4,2          ## @MC_SEQ_RAS_TIMING
	.comm	_MC_SEQ_CAS_TIMING_LP,4,2       ## @MC_SEQ_CAS_TIMING_LP
	.comm	_MC_SEQ_CAS_TIMING,4,2          ## @MC_SEQ_CAS_TIMING
	.comm	_MC_SEQ_MISC_TIMING_LP,4,2      ## @MC_SEQ_MISC_TIMING_LP
	.comm	_MC_SEQ_MISC_TIMING,4,2         ## @MC_SEQ_MISC_TIMING
	.comm	_MC_SEQ_MISC_TIMING2_LP,4,2     ## @MC_SEQ_MISC_TIMING2_LP
	.comm	_MC_SEQ_MISC_TIMING2,4,2        ## @MC_SEQ_MISC_TIMING2
	.comm	_MC_SEQ_RD_CTL_D0_LP,4,2        ## @MC_SEQ_RD_CTL_D0_LP
	.comm	_MC_SEQ_RD_CTL_D0,4,2           ## @MC_SEQ_RD_CTL_D0
	.comm	_MC_SEQ_RD_CTL_D1_LP,4,2        ## @MC_SEQ_RD_CTL_D1_LP
	.comm	_MC_SEQ_RD_CTL_D1,4,2           ## @MC_SEQ_RD_CTL_D1
	.comm	_MC_SEQ_WR_CTL_D0_LP,4,2        ## @MC_SEQ_WR_CTL_D0_LP
	.comm	_MC_SEQ_WR_CTL_D0,4,2           ## @MC_SEQ_WR_CTL_D0
	.comm	_MC_SEQ_WR_CTL_D1_LP,4,2        ## @MC_SEQ_WR_CTL_D1_LP
	.comm	_MC_SEQ_WR_CTL_D1,4,2           ## @MC_SEQ_WR_CTL_D1
	.comm	_MC_SEQ_PMG_CMD_EMRS_LP,4,2     ## @MC_SEQ_PMG_CMD_EMRS_LP
	.comm	_MC_PMG_CMD_EMRS,4,2            ## @MC_PMG_CMD_EMRS
	.comm	_MC_SEQ_PMG_CMD_MRS_LP,4,2      ## @MC_SEQ_PMG_CMD_MRS_LP
	.comm	_MC_PMG_CMD_MRS,4,2             ## @MC_PMG_CMD_MRS
	.comm	_MC_SEQ_PMG_CMD_MRS1_LP,4,2     ## @MC_SEQ_PMG_CMD_MRS1_LP
	.comm	_MC_PMG_CMD_MRS1,4,2            ## @MC_PMG_CMD_MRS1
	.no_dead_strip	_btc_initialize_mc_reg_table
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function btc_initialize_mc_reg_table
_btc_initialize_mc_reg_table:           ; @btc_initialize_mc_reg_table
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x0
	bl	_evergreen_get_pi
	mov	x19, x0
	mov	x0, x21
	bl	_rv770_get_memory_module_index
	mov	x22, x0
Lloh0:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	w0, #4
	bl	_kzalloc
	cbz	x0, LBB0_6
; %bb.1:
	mov	x20, x0
Lloh3:
	adrp	x8, _MC_SEQ_RAS_TIMING_LP@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MC_SEQ_RAS_TIMING_LP@GOTPAGEOFF]
Lloh5:
	ldr	w23, [x8]
Lloh6:
	adrp	x8, _MC_SEQ_RAS_TIMING@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MC_SEQ_RAS_TIMING@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh9:
	adrp	x8, _MC_SEQ_CAS_TIMING_LP@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MC_SEQ_CAS_TIMING_LP@GOTPAGEOFF]
Lloh11:
	ldr	w23, [x8]
Lloh12:
	adrp	x8, _MC_SEQ_CAS_TIMING@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MC_SEQ_CAS_TIMING@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh15:
	adrp	x8, _MC_SEQ_MISC_TIMING_LP@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MC_SEQ_MISC_TIMING_LP@GOTPAGEOFF]
Lloh17:
	ldr	w23, [x8]
Lloh18:
	adrp	x8, _MC_SEQ_MISC_TIMING@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MC_SEQ_MISC_TIMING@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh21:
	adrp	x8, _MC_SEQ_MISC_TIMING2_LP@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MC_SEQ_MISC_TIMING2_LP@GOTPAGEOFF]
Lloh23:
	ldr	w23, [x8]
Lloh24:
	adrp	x8, _MC_SEQ_MISC_TIMING2@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MC_SEQ_MISC_TIMING2@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh27:
	adrp	x8, _MC_SEQ_RD_CTL_D0_LP@GOTPAGE
Lloh28:
	ldr	x8, [x8, _MC_SEQ_RD_CTL_D0_LP@GOTPAGEOFF]
Lloh29:
	ldr	w23, [x8]
Lloh30:
	adrp	x8, _MC_SEQ_RD_CTL_D0@GOTPAGE
Lloh31:
	ldr	x8, [x8, _MC_SEQ_RD_CTL_D0@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh33:
	adrp	x8, _MC_SEQ_RD_CTL_D1_LP@GOTPAGE
Lloh34:
	ldr	x8, [x8, _MC_SEQ_RD_CTL_D1_LP@GOTPAGEOFF]
Lloh35:
	ldr	w23, [x8]
Lloh36:
	adrp	x8, _MC_SEQ_RD_CTL_D1@GOTPAGE
Lloh37:
	ldr	x8, [x8, _MC_SEQ_RD_CTL_D1@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh39:
	adrp	x8, _MC_SEQ_WR_CTL_D0_LP@GOTPAGE
Lloh40:
	ldr	x8, [x8, _MC_SEQ_WR_CTL_D0_LP@GOTPAGEOFF]
Lloh41:
	ldr	w23, [x8]
Lloh42:
	adrp	x8, _MC_SEQ_WR_CTL_D0@GOTPAGE
Lloh43:
	ldr	x8, [x8, _MC_SEQ_WR_CTL_D0@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh45:
	adrp	x8, _MC_SEQ_WR_CTL_D1_LP@GOTPAGE
Lloh46:
	ldr	x8, [x8, _MC_SEQ_WR_CTL_D1_LP@GOTPAGEOFF]
Lloh47:
	ldr	w23, [x8]
Lloh48:
	adrp	x8, _MC_SEQ_WR_CTL_D1@GOTPAGE
Lloh49:
	ldr	x8, [x8, _MC_SEQ_WR_CTL_D1@GOTPAGEOFF]
Lloh50:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh51:
	adrp	x8, _MC_SEQ_PMG_CMD_EMRS_LP@GOTPAGE
Lloh52:
	ldr	x8, [x8, _MC_SEQ_PMG_CMD_EMRS_LP@GOTPAGEOFF]
Lloh53:
	ldr	w23, [x8]
Lloh54:
	adrp	x8, _MC_PMG_CMD_EMRS@GOTPAGE
Lloh55:
	ldr	x8, [x8, _MC_PMG_CMD_EMRS@GOTPAGEOFF]
Lloh56:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh57:
	adrp	x8, _MC_SEQ_PMG_CMD_MRS_LP@GOTPAGE
Lloh58:
	ldr	x8, [x8, _MC_SEQ_PMG_CMD_MRS_LP@GOTPAGEOFF]
Lloh59:
	ldr	w23, [x8]
Lloh60:
	adrp	x8, _MC_PMG_CMD_MRS@GOTPAGE
Lloh61:
	ldr	x8, [x8, _MC_PMG_CMD_MRS@GOTPAGEOFF]
Lloh62:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh63:
	adrp	x8, _MC_SEQ_PMG_CMD_MRS1_LP@GOTPAGE
Lloh64:
	ldr	x8, [x8, _MC_SEQ_PMG_CMD_MRS1_LP@GOTPAGEOFF]
Lloh65:
	ldr	w23, [x8]
Lloh66:
	adrp	x8, _MC_PMG_CMD_MRS1@GOTPAGE
Lloh67:
	ldr	x8, [x8, _MC_PMG_CMD_MRS1@GOTPAGEOFF]
Lloh68:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
	mov	x0, x21
	mov	x1, x22
	mov	x2, x20
	bl	_radeon_atom_init_mc_reg_table
	mov	x22, x0
	cbnz	w0, LBB0_5
; %bb.2:
	mov	x0, x20
	mov	x1, x19
	bl	_btc_copy_vbios_mc_reg_table
	mov	x22, x0
	cbnz	w0, LBB0_5
; %bb.3:
	mov	x0, x19
	bl	_btc_set_s0_mc_reg_index
	mov	x0, x21
	mov	x1, x19
	bl	_btc_set_mc_special_registers
	mov	x22, x0
	cbnz	w0, LBB0_5
; %bb.4:
	mov	x0, x19
	bl	_btc_set_valid_flag
LBB0_5:
	mov	x0, x20
	bl	_kfree
	b	LBB0_7
LBB0_6:
Lloh69:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh70:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh71:
	ldr	w8, [x8]
	neg	w22, w8
LBB0_7:
	mov	x0, x22
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.cfi_endproc
                                        ; -- End function
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_MC_SEQ_RAS_TIMING_LP,4,2       ; @MC_SEQ_RAS_TIMING_LP
	.comm	_MC_SEQ_RAS_TIMING,4,2          ; @MC_SEQ_RAS_TIMING
	.comm	_MC_SEQ_CAS_TIMING_LP,4,2       ; @MC_SEQ_CAS_TIMING_LP
	.comm	_MC_SEQ_CAS_TIMING,4,2          ; @MC_SEQ_CAS_TIMING
	.comm	_MC_SEQ_MISC_TIMING_LP,4,2      ; @MC_SEQ_MISC_TIMING_LP
	.comm	_MC_SEQ_MISC_TIMING,4,2         ; @MC_SEQ_MISC_TIMING
	.comm	_MC_SEQ_MISC_TIMING2_LP,4,2     ; @MC_SEQ_MISC_TIMING2_LP
	.comm	_MC_SEQ_MISC_TIMING2,4,2        ; @MC_SEQ_MISC_TIMING2
	.comm	_MC_SEQ_RD_CTL_D0_LP,4,2        ; @MC_SEQ_RD_CTL_D0_LP
	.comm	_MC_SEQ_RD_CTL_D0,4,2           ; @MC_SEQ_RD_CTL_D0
	.comm	_MC_SEQ_RD_CTL_D1_LP,4,2        ; @MC_SEQ_RD_CTL_D1_LP
	.comm	_MC_SEQ_RD_CTL_D1,4,2           ; @MC_SEQ_RD_CTL_D1
	.comm	_MC_SEQ_WR_CTL_D0_LP,4,2        ; @MC_SEQ_WR_CTL_D0_LP
	.comm	_MC_SEQ_WR_CTL_D0,4,2           ; @MC_SEQ_WR_CTL_D0
	.comm	_MC_SEQ_WR_CTL_D1_LP,4,2        ; @MC_SEQ_WR_CTL_D1_LP
	.comm	_MC_SEQ_WR_CTL_D1,4,2           ; @MC_SEQ_WR_CTL_D1
	.comm	_MC_SEQ_PMG_CMD_EMRS_LP,4,2     ; @MC_SEQ_PMG_CMD_EMRS_LP
	.comm	_MC_PMG_CMD_EMRS,4,2            ; @MC_PMG_CMD_EMRS
	.comm	_MC_SEQ_PMG_CMD_MRS_LP,4,2      ; @MC_SEQ_PMG_CMD_MRS_LP
	.comm	_MC_PMG_CMD_MRS,4,2             ; @MC_PMG_CMD_MRS
	.comm	_MC_SEQ_PMG_CMD_MRS1_LP,4,2     ; @MC_SEQ_PMG_CMD_MRS1_LP
	.comm	_MC_PMG_CMD_MRS1,4,2            ; @MC_PMG_CMD_MRS1
	.no_dead_strip	_btc_initialize_mc_reg_table
.subsections_via_symbols
