	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vmw_fifo_have_3d               ## -- Begin function vmw_fifo_have_3d
	.p2align	4, 0x90
_vmw_fifo_have_3d:                      ## @vmw_fifo_have_3d
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdi), %eax
	movq	_SVGA_CAP_3D@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_15
## %bb.1:
	movq	%rdi, %rbx
	movq	_SVGA_CAP_GBOBJECTS@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_6
## %bb.2:
	cmpl	$0, 20(%rbx)
	je	LBB0_15
## %bb.3:
	leaq	16(%rbx), %r14
	movq	%r14, %rdi
	callq	_spin_lock
	movq	_SVGA_REG_DEV_CAP@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_SVGA3D_DEVCAP_3D@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_vmw_write
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_vmw_read
	movq	%rax, %rbx
	movq	%r14, %rdi
	callq	_spin_unlock
	testq	%rbx, %rbx
LBB0_4:
	setne	%cl
	jmp	LBB0_16
LBB0_6:
	movq	_SVGA_CAP_EXTENDED_FIFO@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_15
## %bb.7:
	movq	32(%rbx), %r14
	movq	_SVGA_FIFO_MIN@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%r14,%rax,4), %rdi
	callq	_vmw_mmio_read
	movq	_SVGA_FIFO_3D_HWVERSION@GOTPCREL(%rip), %rcx
	movslq	(%rcx), %rcx
	leaq	(,%rcx,4), %rdx
	cmpq	%rdx, %rax
	jbe	LBB0_15
## %bb.8:
	movq	_SVGA_FIFO_CAP_3D_HWVERSION_REVISED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	24(%rbx), %eax
	je	LBB0_10
## %bb.9:
	movq	_SVGA_FIFO_3D_HWVERSION_REVISED@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
LBB0_10:
	movslq	%ecx, %rax
	leaq	(%r14,%rax,4), %rdi
	callq	_vmw_mmio_read
	xorl	%ecx, %ecx
	testq	%rax, %rax
	je	LBB0_16
## %bb.11:
	movq	_SVGA3D_HWVERSION_WS8_B1@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rax
	jl	LBB0_16
## %bb.12:
	movq	8(%rbx), %rax
	movq	_vmw_du_legacy@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jmp	LBB0_4
LBB0_15:
	xorl	%ecx, %ecx
LBB0_16:
	movzbl	%cl, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SVGA_CAP_3D,4,2                ## @SVGA_CAP_3D
	.comm	_SVGA_CAP_GBOBJECTS,4,2         ## @SVGA_CAP_GBOBJECTS
	.comm	_SVGA_REG_DEV_CAP,4,2           ## @SVGA_REG_DEV_CAP
	.comm	_SVGA3D_DEVCAP_3D,4,2           ## @SVGA3D_DEVCAP_3D
	.comm	_SVGA_CAP_EXTENDED_FIFO,4,2     ## @SVGA_CAP_EXTENDED_FIFO
	.comm	_SVGA_FIFO_MIN,4,2              ## @SVGA_FIFO_MIN
	.comm	_SVGA_FIFO_3D_HWVERSION,4,2     ## @SVGA_FIFO_3D_HWVERSION
	.comm	_SVGA_FIFO_CAP_3D_HWVERSION_REVISED,4,2 ## @SVGA_FIFO_CAP_3D_HWVERSION_REVISED
	.comm	_SVGA_FIFO_3D_HWVERSION_REVISED,4,2 ## @SVGA_FIFO_3D_HWVERSION_REVISED
	.comm	_SVGA3D_HWVERSION_WS8_B1,8,3    ## @SVGA3D_HWVERSION_WS8_B1
	.comm	_vmw_du_legacy,8,3              ## @vmw_du_legacy
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vmw_fifo_have_3d               ; -- Begin function vmw_fifo_have_3d
	.p2align	2
_vmw_fifo_have_3d:                      ; @vmw_fifo_have_3d
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _SVGA_CAP_3D@GOTPAGE
Lloh1:
	ldr	x9, [x9, _SVGA_CAP_3D@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_8
; %bb.1:
	mov	x19, x0
Lloh3:
	adrp	x9, _SVGA_CAP_GBOBJECTS@GOTPAGE
Lloh4:
	ldr	x9, [x9, _SVGA_CAP_GBOBJECTS@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_5
; %bb.2:
	ldr	w8, [x19, #20]
	cbz	w8, LBB0_8
; %bb.3:
	add	x20, x19, #16
	mov	x0, x20
	bl	_spin_lock
Lloh6:
	adrp	x21, _SVGA_REG_DEV_CAP@GOTPAGE
Lloh7:
	ldr	x21, [x21, _SVGA_REG_DEV_CAP@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh8:
	adrp	x8, _SVGA3D_DEVCAP_3D@GOTPAGE
Lloh9:
	ldr	x8, [x8, _SVGA3D_DEVCAP_3D@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_vmw_write
	ldr	w1, [x21]
	mov	x0, x19
	bl	_vmw_read
	mov	x19, x0
	mov	x0, x20
	bl	_spin_unlock
	cmp	x19, #0
LBB0_4:
	cset	w0, ne
	b	LBB0_9
LBB0_5:
Lloh11:
	adrp	x9, _SVGA_CAP_EXTENDED_FIFO@GOTPAGE
Lloh12:
	ldr	x9, [x9, _SVGA_CAP_EXTENDED_FIFO@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_8
; %bb.6:
	ldr	x20, [x19, #32]
Lloh14:
	adrp	x8, _SVGA_FIFO_MIN@GOTPAGE
Lloh15:
	ldr	x8, [x8, _SVGA_FIFO_MIN@GOTPAGEOFF]
Lloh16:
	ldrsw	x8, [x8]
	add	x0, x20, x8, lsl #2
	bl	_vmw_mmio_read
Lloh17:
	adrp	x8, _SVGA_FIFO_3D_HWVERSION@GOTPAGE
Lloh18:
	ldr	x8, [x8, _SVGA_FIFO_3D_HWVERSION@GOTPAGEOFF]
Lloh19:
	ldrsw	x8, [x8]
	cmp	x0, x8, lsl #2
	b.ls	LBB0_8
; %bb.7:
	ldr	w9, [x19, #24]
Lloh20:
	adrp	x10, _SVGA_FIFO_CAP_3D_HWVERSION_REVISED@GOTPAGE
Lloh21:
	ldr	x10, [x10, _SVGA_FIFO_CAP_3D_HWVERSION_REVISED@GOTPAGEOFF]
Lloh22:
	ldr	w10, [x10]
Lloh23:
	adrp	x11, _SVGA_FIFO_3D_HWVERSION_REVISED@GOTPAGE
Lloh24:
	ldr	x11, [x11, _SVGA_FIFO_3D_HWVERSION_REVISED@GOTPAGEOFF]
Lloh25:
	ldr	w11, [x11]
	tst	w10, w9
	csel	w8, w8, w11, eq
	add	x0, x20, w8, sxtw #2
	bl	_vmw_mmio_read
Lloh26:
	adrp	x8, _SVGA3D_HWVERSION_WS8_B1@GOTPAGE
Lloh27:
	ldr	x8, [x8, _SVGA3D_HWVERSION_WS8_B1@GOTPAGEOFF]
Lloh28:
	ldr	x8, [x8]
	cmp	x0, #0
	ccmp	x0, x8, #8, ne
	b.ge	LBB0_10
LBB0_8:
	mov	w0, #0
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_10:
	ldr	x8, [x19, #8]
Lloh29:
	adrp	x9, _vmw_du_legacy@GOTPAGE
Lloh30:
	ldr	x9, [x9, _vmw_du_legacy@GOTPAGEOFF]
Lloh31:
	ldr	x9, [x9]
	cmp	x8, x9
	b	LBB0_4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.comm	_SVGA_CAP_3D,4,2                ; @SVGA_CAP_3D
	.comm	_SVGA_CAP_GBOBJECTS,4,2         ; @SVGA_CAP_GBOBJECTS
	.comm	_SVGA_REG_DEV_CAP,4,2           ; @SVGA_REG_DEV_CAP
	.comm	_SVGA3D_DEVCAP_3D,4,2           ; @SVGA3D_DEVCAP_3D
	.comm	_SVGA_CAP_EXTENDED_FIFO,4,2     ; @SVGA_CAP_EXTENDED_FIFO
	.comm	_SVGA_FIFO_MIN,4,2              ; @SVGA_FIFO_MIN
	.comm	_SVGA_FIFO_3D_HWVERSION,4,2     ; @SVGA_FIFO_3D_HWVERSION
	.comm	_SVGA_FIFO_CAP_3D_HWVERSION_REVISED,4,2 ; @SVGA_FIFO_CAP_3D_HWVERSION_REVISED
	.comm	_SVGA_FIFO_3D_HWVERSION_REVISED,4,2 ; @SVGA_FIFO_3D_HWVERSION_REVISED
	.comm	_SVGA3D_HWVERSION_WS8_B1,8,3    ; @SVGA3D_HWVERSION_WS8_B1
	.comm	_vmw_du_legacy,8,3              ; @vmw_du_legacy
.subsections_via_symbols
