	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cdv_intel_get_adjust_train
_cdv_intel_get_adjust_train:            ## @cdv_intel_get_adjust_train
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %r15
	xorl	%ebx, %ebx
	cmpl	$0, (%r15)
	jle	LBB0_1
## %bb.2:
	xorl	%r13d, %r13d
	xorl	%r12d, %r12d
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movl	16(%r15), %edi
	movl	%ebx, %esi
	callq	_cdv_intel_get_adjust_request_voltage
	movq	%rax, %r14
	movl	16(%r15), %edi
	movl	%ebx, %esi
	callq	_cdv_intel_get_adjust_request_pre_emphasis
	cmpq	%r13, %r14
	cmovgq	%r14, %r13
	cmpq	%r12, %rax
	cmovgq	%rax, %r12
	incl	%ebx
	cmpl	(%r15), %ebx
	jl	LBB0_3
	jmp	LBB0_4
LBB0_1:
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
LBB0_4:
	movq	_CDV_DP_VOLTAGE_MAX@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	movq	_DP_TRAIN_MAX_SWING_REACHED@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	orq	%rcx, %rax
	cmpq	%rcx, %r13
	cmovlq	%r13, %rax
	movq	_DP_TRAIN_PRE_EMPHASIS_MASK@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %r12
	jne	LBB0_5
## %bb.6:
	movq	_DP_TRAIN_MAX_PRE_EMPHASIS_REACHED@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	jmp	LBB0_7
LBB0_5:
	xorl	%ecx, %ecx
LBB0_7:
	orq	%r12, %rax
	orq	%rcx, %rax
	movq	8(%r15), %rcx
	movq	%rax, (%rcx)
	movq	%rax, 8(%rcx)
	movq	%rax, 16(%rcx)
	movq	%rax, 24(%rcx)
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CDV_DP_VOLTAGE_MAX,8,3         ## @CDV_DP_VOLTAGE_MAX
	.comm	_DP_TRAIN_MAX_SWING_REACHED,8,3 ## @DP_TRAIN_MAX_SWING_REACHED
	.comm	_DP_TRAIN_PRE_EMPHASIS_MASK,8,3 ## @DP_TRAIN_PRE_EMPHASIS_MASK
	.comm	_DP_TRAIN_MAX_PRE_EMPHASIS_REACHED,8,3 ## @DP_TRAIN_MAX_PRE_EMPHASIS_REACHED
	.no_dead_strip	_cdv_intel_get_adjust_train
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cdv_intel_get_adjust_train
_cdv_intel_get_adjust_train:            ; @cdv_intel_get_adjust_train
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	x21, [x0]
	ldr	w8, [x21]
	cmp	w8, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x23, #0
	mov	x22, #0
	mov	w19, #0
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x21, #16]
	mov	x1, x19
	bl	_cdv_intel_get_adjust_request_voltage
	mov	x20, x0
	ldr	w0, [x21, #16]
	mov	x1, x19
	bl	_cdv_intel_get_adjust_request_pre_emphasis
	cmp	x20, x23
	csel	x23, x20, x23, gt
	cmp	x0, x22
	csel	x22, x0, x22, gt
	add	w19, w19, #1
	ldr	w8, [x21]
	cmp	w19, w8
	b.lt	LBB0_2
	b	LBB0_4
LBB0_3:
	mov	x22, #0
	mov	x23, #0
LBB0_4:
Lloh0:
	adrp	x8, _CDV_DP_VOLTAGE_MAX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CDV_DP_VOLTAGE_MAX@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
Lloh3:
	adrp	x9, _DP_TRAIN_MAX_SWING_REACHED@GOTPAGE
Lloh4:
	ldr	x9, [x9, _DP_TRAIN_MAX_SWING_REACHED@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	orr	x9, x9, x8
	cmp	x23, x8
	csel	x8, x23, x9, lt
Lloh6:
	adrp	x9, _DP_TRAIN_PRE_EMPHASIS_MASK@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DP_TRAIN_PRE_EMPHASIS_MASK@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
Lloh9:
	adrp	x10, _DP_TRAIN_MAX_PRE_EMPHASIS_REACHED@GOTPAGE
Lloh10:
	ldr	x10, [x10, _DP_TRAIN_MAX_PRE_EMPHASIS_REACHED@GOTPAGEOFF]
Lloh11:
	ldr	x10, [x10]
	cmp	x22, x9
	csel	x9, x10, xzr, eq
	orr	x8, x8, x22
	orr	x8, x8, x9
	ldr	x9, [x21, #8]
	stp	x8, x8, [x9]
	stp	x8, x8, [x9, #16]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CDV_DP_VOLTAGE_MAX,8,3         ; @CDV_DP_VOLTAGE_MAX
	.comm	_DP_TRAIN_MAX_SWING_REACHED,8,3 ; @DP_TRAIN_MAX_SWING_REACHED
	.comm	_DP_TRAIN_PRE_EMPHASIS_MASK,8,3 ; @DP_TRAIN_PRE_EMPHASIS_MASK
	.comm	_DP_TRAIN_MAX_PRE_EMPHASIS_REACHED,8,3 ; @DP_TRAIN_MAX_PRE_EMPHASIS_REACHED
	.no_dead_strip	_cdv_intel_get_adjust_train
.subsections_via_symbols
