	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gmc_v9_0_emit_flush_gpu_tlb
_gmc_v9_0_emit_flush_gpu_tlb:           ## @gmc_v9_0_emit_flush_gpu_tlb
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movl	%esi, %ebx
	movq	%rbx, -64(%rbp)                 ## 8-byte Spill
	movq	%rdi, %r13
	movq	8(%rdi), %rax
	movq	16(%rdi), %rcx
	movq	(%rcx), %r14
	movq	(%rax), %r15
	movl	%esi, %edi
	xorl	%esi, %esi
	callq	_gmc_v9_0_get_invalidate_req
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	(%r13), %eax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	shlq	$5, %r15
	leal	(%rbx,%rbx), %r12d
	movq	%r14, %rbx
	movq	24(%r14,%r15), %r14
	addq	%r12, %r14
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_lower_32_bits
	movq	%r13, %rdi
	movq	%r14, %rsi
	movl	%eax, %edx
	callq	_amdgpu_ring_emit_wreg
	addq	16(%rbx,%r15), %r12
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	movl	%r14d, %edi
	callq	_upper_32_bits
	movq	%r13, %rdi
	movq	%r12, %rsi
	movl	%eax, %edx
	callq	_amdgpu_ring_emit_wreg
	movq	8(%rbx,%r15), %rsi
	movq	-56(%rbp), %rdx                 ## 8-byte Reload
	addq	%rdx, %rsi
	addq	(%rbx,%r15), %rdx
	movl	$1, %r8d
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
                                        ## kill: def $cl killed $cl killed $rcx
	shll	%cl, %r8d
	movq	%r13, %rdi
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	callq	_amdgpu_ring_emit_reg_write_reg_wait
	movl	%r14d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_gmc_v9_0_emit_flush_gpu_tlb
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gmc_v9_0_emit_flush_gpu_tlb
_gmc_v9_0_emit_flush_gpu_tlb:           ; @gmc_v9_0_emit_flush_gpu_tlb
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	ldp	x9, x8, [x0, #8]
	ldr	x23, [x8]
	ldr	x24, [x9]
	mov	x0, x1
	mov	w1, #0
	bl	_gmc_v9_0_get_invalidate_req
	mov	x22, x0
	ldr	w25, [x21]
	add	x24, x23, x24, lsl #5
	ldr	x8, [x24, #24]
	lsl	w26, w20, #1
	add	x23, x8, x26
	mov	x0, x19
	bl	_lower_32_bits
	mov	x2, x0
	mov	x0, x21
	mov	x1, x23
	bl	_amdgpu_ring_emit_wreg
	ldr	x8, [x24, #16]
	add	x23, x8, x26
	mov	x0, x19
	bl	_upper_32_bits
	mov	x2, x0
	mov	x0, x21
	mov	x1, x23
	bl	_amdgpu_ring_emit_wreg
	ldp	x9, x8, [x24]
	add	x1, x8, x25
	add	x2, x9, x25
	mov	w8, #1
	lsl	w4, w8, w20
	mov	x0, x21
	mov	x3, x22
	bl	_amdgpu_ring_emit_reg_write_reg_wait
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_gmc_v9_0_emit_flush_gpu_tlb
.subsections_via_symbols
