	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function capture_reg_state
_capture_reg_state:                     ## @capture_reg_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	136(%rdi), %rbx
	movq	%rbx, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_GTIER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, (%rcx)
	movq	_VLV_IER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 24(%r14)
	movq	_FORCEWAKE_VLV@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read_fw
	movq	%rax, 88(%r14)
LBB0_2:
	movq	%rbx, %rdi
	movl	$7, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_GEN7_ERR_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 128(%r14)
LBB0_4:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$11, %eax
	jle	LBB0_6
## %bb.5:
	movq	_GEN12_FAULT_TLB_DATA1@GOTPCREL(%rip), %r15
	movq	_GEN12_FAULT_TLB_DATA0@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_6:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$8, %eax
	jl	LBB0_9
## %bb.7:
	movq	_GEN8_FAULT_TLB_DATA1@GOTPCREL(%rip), %r15
	movq	_GEN8_FAULT_TLB_DATA0@GOTPCREL(%rip), %rax
LBB0_8:
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 120(%r14)
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 112(%r14)
LBB0_9:
	movq	%rbx, %rdi
	movl	$6, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_11
## %bb.10:
	movq	_FORCEWAKE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read_fw
	movq	%rax, 88(%r14)
	movq	_GAB_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 104(%r14)
	movq	_GFX_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 96(%r14)
LBB0_11:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$7, %eax
	jl	LBB0_13
## %bb.12:
	movq	_FORCEWAKE_MT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read_fw
	movq	%rax, 88(%r14)
LBB0_13:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$6, %eax
	jl	LBB0_16
## %bb.14:
	movq	_DERRMR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 80(%r14)
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$11, %eax
	jg	LBB0_16
## %bb.15:
	movq	_ERROR_GEN6@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 72(%r14)
	movq	_DONE_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 64(%r14)
LBB0_16:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$5, %eax
	jl	LBB0_18
## %bb.17:
	movq	_RENDER_RING_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_CCID
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_intel_uncore_read
	movq	%rax, 56(%r14)
LBB0_18:
	movq	%rbx, %rdi
	movl	$6, %esi
	movl	$7, %edx
	callq	_IS_GEN_RANGE
	testq	%rax, %rax
	je	LBB0_20
## %bb.19:
	movq	_GAM_ECOCHK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 48(%r14)
	movq	_GAC_ECO_BITS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 40(%r14)
LBB0_20:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$11, %eax
	jl	LBB0_22
## %bb.21:
	movq	_GEN8_DE_MISC_IER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 24(%r14)
	movq	_GEN11_RENDER_COPY_INTR_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, (%rcx)
	movq	_GEN11_VCS_VECS_INTR_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, 8(%rcx)
	movq	_GEN11_GUC_SG_INTR_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, 16(%rcx)
	movq	_GEN11_GPM_WGBOXPERF_INTR_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, 24(%rcx)
	movq	_GEN11_CRYPTO_RSVD_INTR_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, 32(%rcx)
	movq	_GEN11_GUNIT_CSME_INTR_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, 40(%rcx)
	movl	$6, (%r14)
	jmp	LBB0_31
LBB0_22:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$8, %eax
	jl	LBB0_24
## %bb.23:
	movq	_GEN8_DE_MISC_IER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 24(%r14)
	xorl	%edi, %edi
	callq	_GEN8_GT_IER
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, (%rcx)
	movl	$1, %edi
	callq	_GEN8_GT_IER
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, 8(%rcx)
	movl	$2, %edi
	callq	_GEN8_GT_IER
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, 16(%rcx)
	movl	$3, %edi
	callq	_GEN8_GT_IER
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, 24(%rcx)
	movl	$4, (%r14)
	jmp	LBB0_31
LBB0_24:
	movq	%rbx, %rdi
	callq	_HAS_PCH_SPLIT
	testq	%rax, %rax
	je	LBB0_26
## %bb.25:
	movq	_DEIER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 24(%r14)
	movq	_GTIER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	32(%r14), %rcx
	movq	%rax, (%rcx)
	movl	$1, (%r14)
	jmp	LBB0_31
LBB0_26:
	movq	%rbx, %rdi
	movl	$2, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_28
## %bb.27:
	movq	_GEN2_IER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read16
LBB0_30:
	movq	%rax, 24(%r14)
	jmp	LBB0_31
LBB0_28:
	movq	%rbx, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	je	LBB0_29
LBB0_31:
	movq	_EIR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 16(%r14)
	movq	_PGTBL_ER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	movq	%rax, 8(%r14)
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_29:
	movq	_GEN2_IER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read
	jmp	LBB0_30
	.cfi_endproc
                                        ## -- End function
	.comm	_GTIER,4,2                      ## @GTIER
	.comm	_VLV_IER,4,2                    ## @VLV_IER
	.comm	_FORCEWAKE_VLV,4,2              ## @FORCEWAKE_VLV
	.comm	_GEN7_ERR_INT,4,2               ## @GEN7_ERR_INT
	.comm	_GEN12_FAULT_TLB_DATA0,4,2      ## @GEN12_FAULT_TLB_DATA0
	.comm	_GEN12_FAULT_TLB_DATA1,4,2      ## @GEN12_FAULT_TLB_DATA1
	.comm	_GEN8_FAULT_TLB_DATA0,4,2       ## @GEN8_FAULT_TLB_DATA0
	.comm	_GEN8_FAULT_TLB_DATA1,4,2       ## @GEN8_FAULT_TLB_DATA1
	.comm	_FORCEWAKE,4,2                  ## @FORCEWAKE
	.comm	_GAB_CTL,4,2                    ## @GAB_CTL
	.comm	_GFX_MODE,4,2                   ## @GFX_MODE
	.comm	_FORCEWAKE_MT,4,2               ## @FORCEWAKE_MT
	.comm	_DERRMR,4,2                     ## @DERRMR
	.comm	_ERROR_GEN6,4,2                 ## @ERROR_GEN6
	.comm	_DONE_REG,4,2                   ## @DONE_REG
	.comm	_RENDER_RING_BASE,4,2           ## @RENDER_RING_BASE
	.comm	_GAM_ECOCHK,4,2                 ## @GAM_ECOCHK
	.comm	_GAC_ECO_BITS,4,2               ## @GAC_ECO_BITS
	.comm	_GEN8_DE_MISC_IER,4,2           ## @GEN8_DE_MISC_IER
	.comm	_GEN11_RENDER_COPY_INTR_ENABLE,4,2 ## @GEN11_RENDER_COPY_INTR_ENABLE
	.comm	_GEN11_VCS_VECS_INTR_ENABLE,4,2 ## @GEN11_VCS_VECS_INTR_ENABLE
	.comm	_GEN11_GUC_SG_INTR_ENABLE,4,2   ## @GEN11_GUC_SG_INTR_ENABLE
	.comm	_GEN11_GPM_WGBOXPERF_INTR_ENABLE,4,2 ## @GEN11_GPM_WGBOXPERF_INTR_ENABLE
	.comm	_GEN11_CRYPTO_RSVD_INTR_ENABLE,4,2 ## @GEN11_CRYPTO_RSVD_INTR_ENABLE
	.comm	_GEN11_GUNIT_CSME_INTR_ENABLE,4,2 ## @GEN11_GUNIT_CSME_INTR_ENABLE
	.comm	_DEIER,4,2                      ## @DEIER
	.comm	_GEN2_IER,4,2                   ## @GEN2_IER
	.comm	_EIR,4,2                        ## @EIR
	.comm	_PGTBL_ER,4,2                   ## @PGTBL_ER
	.no_dead_strip	_capture_reg_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function capture_reg_state
_capture_reg_state:                     ; @capture_reg_state
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0, #136]
	mov	x0, x20
	bl	_IS_VALLEYVIEW
	cbz	x0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _GTIER@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GTIER@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8]
Lloh3:
	adrp	x8, _VLV_IER@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VLV_IER@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #24]
Lloh6:
	adrp	x8, _FORCEWAKE_VLV@GOTPAGE
Lloh7:
	ldr	x8, [x8, _FORCEWAKE_VLV@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read_fw
	str	x0, [x19, #88]
LBB0_2:
	mov	x0, x20
	mov	w1, #7
	bl	_IS_GEN
	cbz	x0, LBB0_4
; %bb.3:
Lloh9:
	adrp	x8, _GEN7_ERR_INT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _GEN7_ERR_INT@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #128]
LBB0_4:
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #11
	b.le	LBB0_6
; %bb.5:
Lloh12:
	adrp	x21, _GEN12_FAULT_TLB_DATA1@GOTPAGE
Lloh13:
	ldr	x21, [x21, _GEN12_FAULT_TLB_DATA1@GOTPAGEOFF]
Lloh14:
	adrp	x8, _GEN12_FAULT_TLB_DATA0@GOTPAGE
Lloh15:
	ldr	x8, [x8, _GEN12_FAULT_TLB_DATA0@GOTPAGEOFF]
	b	LBB0_8
LBB0_6:
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #8
	b.lt	LBB0_9
; %bb.7:
Lloh16:
	adrp	x21, _GEN8_FAULT_TLB_DATA1@GOTPAGE
Lloh17:
	ldr	x21, [x21, _GEN8_FAULT_TLB_DATA1@GOTPAGEOFF]
Lloh18:
	adrp	x8, _GEN8_FAULT_TLB_DATA0@GOTPAGE
Lloh19:
	ldr	x8, [x8, _GEN8_FAULT_TLB_DATA0@GOTPAGEOFF]
LBB0_8:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #120]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #112]
LBB0_9:
	mov	x0, x20
	mov	w1, #6
	bl	_IS_GEN
	cbz	x0, LBB0_11
; %bb.10:
Lloh20:
	adrp	x8, _FORCEWAKE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _FORCEWAKE@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read_fw
	str	x0, [x19, #88]
Lloh23:
	adrp	x8, _GAB_CTL@GOTPAGE
Lloh24:
	ldr	x8, [x8, _GAB_CTL@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #104]
Lloh26:
	adrp	x8, _GFX_MODE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _GFX_MODE@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #96]
LBB0_11:
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #6
	b.le	LBB0_13
; %bb.12:
Lloh29:
	adrp	x8, _FORCEWAKE_MT@GOTPAGE
Lloh30:
	ldr	x8, [x8, _FORCEWAKE_MT@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read_fw
	str	x0, [x19, #88]
LBB0_13:
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #5
	b.le	LBB0_16
; %bb.14:
Lloh32:
	adrp	x8, _DERRMR@GOTPAGE
Lloh33:
	ldr	x8, [x8, _DERRMR@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #80]
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #11
	b.gt	LBB0_16
; %bb.15:
Lloh35:
	adrp	x8, _ERROR_GEN6@GOTPAGE
Lloh36:
	ldr	x8, [x8, _ERROR_GEN6@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #72]
Lloh38:
	adrp	x8, _DONE_REG@GOTPAGE
Lloh39:
	ldr	x8, [x8, _DONE_REG@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #64]
LBB0_16:
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #5
	b.lt	LBB0_18
; %bb.17:
Lloh41:
	adrp	x8, _RENDER_RING_BASE@GOTPAGE
Lloh42:
	ldr	x8, [x8, _RENDER_RING_BASE@GOTPAGEOFF]
Lloh43:
	ldr	w0, [x8]
	bl	_CCID
	mov	x1, x0
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #56]
LBB0_18:
	mov	x0, x20
	mov	w1, #6
	mov	w2, #7
	bl	_IS_GEN_RANGE
	cbz	x0, LBB0_20
; %bb.19:
Lloh44:
	adrp	x8, _GAM_ECOCHK@GOTPAGE
Lloh45:
	ldr	x8, [x8, _GAM_ECOCHK@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #48]
Lloh47:
	adrp	x8, _GAC_ECO_BITS@GOTPAGE
Lloh48:
	ldr	x8, [x8, _GAC_ECO_BITS@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #40]
LBB0_20:
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #11
	b.lt	LBB0_22
; %bb.21:
Lloh50:
	adrp	x8, _GEN8_DE_MISC_IER@GOTPAGE
Lloh51:
	ldr	x8, [x8, _GEN8_DE_MISC_IER@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #24]
Lloh53:
	adrp	x8, _GEN11_RENDER_COPY_INTR_ENABLE@GOTPAGE
Lloh54:
	ldr	x8, [x8, _GEN11_RENDER_COPY_INTR_ENABLE@GOTPAGEOFF]
Lloh55:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8]
Lloh56:
	adrp	x8, _GEN11_VCS_VECS_INTR_ENABLE@GOTPAGE
Lloh57:
	ldr	x8, [x8, _GEN11_VCS_VECS_INTR_ENABLE@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8, #8]
Lloh59:
	adrp	x8, _GEN11_GUC_SG_INTR_ENABLE@GOTPAGE
Lloh60:
	ldr	x8, [x8, _GEN11_GUC_SG_INTR_ENABLE@GOTPAGEOFF]
Lloh61:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8, #16]
Lloh62:
	adrp	x8, _GEN11_GPM_WGBOXPERF_INTR_ENABLE@GOTPAGE
Lloh63:
	ldr	x8, [x8, _GEN11_GPM_WGBOXPERF_INTR_ENABLE@GOTPAGEOFF]
Lloh64:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8, #24]
Lloh65:
	adrp	x8, _GEN11_CRYPTO_RSVD_INTR_ENABLE@GOTPAGE
Lloh66:
	ldr	x8, [x8, _GEN11_CRYPTO_RSVD_INTR_ENABLE@GOTPAGEOFF]
Lloh67:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8, #32]
Lloh68:
	adrp	x8, _GEN11_GUNIT_CSME_INTR_ENABLE@GOTPAGE
Lloh69:
	ldr	x8, [x8, _GEN11_GUNIT_CSME_INTR_ENABLE@GOTPAGEOFF]
Lloh70:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8, #40]
	mov	w8, #6
	str	w8, [x19]
	b	LBB0_30
LBB0_22:
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #8
	b.lt	LBB0_24
; %bb.23:
Lloh71:
	adrp	x8, _GEN8_DE_MISC_IER@GOTPAGE
Lloh72:
	ldr	x8, [x8, _GEN8_DE_MISC_IER@GOTPAGEOFF]
Lloh73:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #24]
	mov	w0, #0
	bl	_GEN8_GT_IER
	mov	x1, x0
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8]
	mov	w0, #1
	bl	_GEN8_GT_IER
	mov	x1, x0
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8, #8]
	mov	w0, #2
	bl	_GEN8_GT_IER
	mov	x1, x0
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8, #16]
	mov	w0, #3
	bl	_GEN8_GT_IER
	mov	x1, x0
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8, #24]
	mov	w8, #4
	str	w8, [x19]
	b	LBB0_30
LBB0_24:
	mov	x0, x20
	bl	_HAS_PCH_SPLIT
	cbz	x0, LBB0_26
; %bb.25:
Lloh74:
	adrp	x8, _DEIER@GOTPAGE
Lloh75:
	ldr	x8, [x8, _DEIER@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #24]
Lloh77:
	adrp	x8, _GTIER@GOTPAGE
Lloh78:
	ldr	x8, [x8, _GTIER@GOTPAGEOFF]
Lloh79:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	ldr	x8, [x19, #32]
	str	x0, [x8]
	mov	w8, #1
	str	w8, [x19]
	b	LBB0_30
LBB0_26:
	mov	x0, x20
	mov	w1, #2
	bl	_IS_GEN
	cbz	x0, LBB0_29
; %bb.27:
Lloh80:
	adrp	x8, _GEN2_IER@GOTPAGE
Lloh81:
	ldr	x8, [x8, _GEN2_IER@GOTPAGEOFF]
Lloh82:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read16
LBB0_28:
	str	x0, [x19, #24]
	b	LBB0_30
LBB0_29:
	mov	x0, x20
	bl	_IS_VALLEYVIEW
	cbz	x0, LBB0_31
LBB0_30:
Lloh83:
	adrp	x8, _EIR@GOTPAGE
Lloh84:
	ldr	x8, [x8, _EIR@GOTPAGEOFF]
Lloh85:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #16]
Lloh86:
	adrp	x8, _PGTBL_ER@GOTPAGE
Lloh87:
	ldr	x8, [x8, _PGTBL_ER@GOTPAGEOFF]
Lloh88:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	str	x0, [x19, #8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_31:
Lloh89:
	adrp	x8, _GEN2_IER@GOTPAGE
Lloh90:
	ldr	x8, [x8, _GEN2_IER@GOTPAGEOFF]
Lloh91:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	b	LBB0_28
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.cfi_endproc
                                        ; -- End function
	.comm	_GTIER,4,2                      ; @GTIER
	.comm	_VLV_IER,4,2                    ; @VLV_IER
	.comm	_FORCEWAKE_VLV,4,2              ; @FORCEWAKE_VLV
	.comm	_GEN7_ERR_INT,4,2               ; @GEN7_ERR_INT
	.comm	_GEN12_FAULT_TLB_DATA0,4,2      ; @GEN12_FAULT_TLB_DATA0
	.comm	_GEN12_FAULT_TLB_DATA1,4,2      ; @GEN12_FAULT_TLB_DATA1
	.comm	_GEN8_FAULT_TLB_DATA0,4,2       ; @GEN8_FAULT_TLB_DATA0
	.comm	_GEN8_FAULT_TLB_DATA1,4,2       ; @GEN8_FAULT_TLB_DATA1
	.comm	_FORCEWAKE,4,2                  ; @FORCEWAKE
	.comm	_GAB_CTL,4,2                    ; @GAB_CTL
	.comm	_GFX_MODE,4,2                   ; @GFX_MODE
	.comm	_FORCEWAKE_MT,4,2               ; @FORCEWAKE_MT
	.comm	_DERRMR,4,2                     ; @DERRMR
	.comm	_ERROR_GEN6,4,2                 ; @ERROR_GEN6
	.comm	_DONE_REG,4,2                   ; @DONE_REG
	.comm	_RENDER_RING_BASE,4,2           ; @RENDER_RING_BASE
	.comm	_GAM_ECOCHK,4,2                 ; @GAM_ECOCHK
	.comm	_GAC_ECO_BITS,4,2               ; @GAC_ECO_BITS
	.comm	_GEN8_DE_MISC_IER,4,2           ; @GEN8_DE_MISC_IER
	.comm	_GEN11_RENDER_COPY_INTR_ENABLE,4,2 ; @GEN11_RENDER_COPY_INTR_ENABLE
	.comm	_GEN11_VCS_VECS_INTR_ENABLE,4,2 ; @GEN11_VCS_VECS_INTR_ENABLE
	.comm	_GEN11_GUC_SG_INTR_ENABLE,4,2   ; @GEN11_GUC_SG_INTR_ENABLE
	.comm	_GEN11_GPM_WGBOXPERF_INTR_ENABLE,4,2 ; @GEN11_GPM_WGBOXPERF_INTR_ENABLE
	.comm	_GEN11_CRYPTO_RSVD_INTR_ENABLE,4,2 ; @GEN11_CRYPTO_RSVD_INTR_ENABLE
	.comm	_GEN11_GUNIT_CSME_INTR_ENABLE,4,2 ; @GEN11_GUNIT_CSME_INTR_ENABLE
	.comm	_DEIER,4,2                      ; @DEIER
	.comm	_GEN2_IER,4,2                   ; @GEN2_IER
	.comm	_EIR,4,2                        ; @EIR
	.comm	_PGTBL_ER,4,2                   ; @PGTBL_ER
	.no_dead_strip	_capture_reg_state
.subsections_via_symbols
