	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sii8620_mhl_discover
_sii8620_mhl_discover:                  ## @sii8620_mhl_discover
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$136, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, -176(%rbp)                ## 8-byte Spill
	movq	_REG_DISC_CTRL9@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	_BIT_DISC_CTRL9_WAKE_DRVFLT@GOTPCREL(%rip), %rax
	movq	_BIT_DISC_CTRL9_DISC_PULSE_PROCEED@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movl	%ecx, -48(%rbp)                 ## 4-byte Spill
	movq	_REG_DISC_CTRL4@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_VAL_PUP_5K@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_VAL_PUP_20K@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VAL_DISC_CTRL4
	movq	_BIT_MHL3_EST_INT@GOTPCREL(%rip), %rcx
	movq	_BIT_MHL_EST_INT@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	movq	_BIT_NOT_MHL_EST_INT@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movl	%eax, %r8d
	movq	_BIT_CBUS_MHL3_DISCON_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_BIT_CBUS_MHL12_DISCON_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_BIT_RGND_READY_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X@GOTPCREL(%rip), %rax
	movq	_BIT_MHL_PLL_CTL0_CRYSTAL_CLK_SEL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_BIT_MHL_PLL_CTL0_ZONE_MASK_OE@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	%rcx, -168(%rbp)                ## 8-byte Spill
	movq	_BIT_MHL_DP_CTL0_DP_OE@GOTPCREL(%rip), %rax
	movq	_BIT_MHL_DP_CTL0_TX_OE_OVR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	%rcx, -160(%rbp)                ## 8-byte Spill
	movq	_BIT_DPD_PWRON_PLL@GOTPCREL(%rip), %rax
	movq	_BIT_DPD_PDNTX12@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	orl	(%rax), %r15d
	movq	_REG_CBUS_DISC_INTR0_MASK@GOTPCREL(%rip), %rax
	movq	_BIT_DPD_OSC_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r15d
	movl	(%rax), %r9d
	movq	_BIT_DPD_PWRON_HSIC@GOTPCREL(%rip), %rax
	orl	(%rax), %r15d
	movq	_REG_MHL_PLL_CTL0@GOTPCREL(%rip), %rcx
	movq	_BIT_COC_PLL_LOCK_STATUS_CHANGE@GOTPCREL(%rip), %rax
	movq	_BIT_COC_CALIBRATION_DONE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r14d
	orl	(%rax), %r14d
	movq	_BIT_CBUS_MSC_ABORT_RCVD@GOTPCREL(%rip), %rdx
	movq	_BIT_CBUS_CMD_ABORT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	(%rdx), %eax
	movq	_BIT_CBUS_MSC_MT_DONE@GOTPCREL(%rip), %rdx
	movq	_BIT_CBUS_HPD_CHG@GOTPCREL(%rip), %rsi
	movl	(%rsi), %r13d
	orl	(%rdx), %r13d
	movl	(%rcx), %ecx
	movq	%rcx, -152(%rbp)                ## 8-byte Spill
	movq	_BIT_CBUS_MSC_MR_WRITE_STAT@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r13d
	movq	_REG_MHL_DP_CTL0@GOTPCREL(%rip), %rcx
	movq	_BIT_CBUS_MSC_MR_MSC_MSG@GOTPCREL(%rip), %rdx
	orl	(%rdx), %r13d
	movl	(%rcx), %ecx
	movq	%rcx, -144(%rbp)                ## 8-byte Spill
	movq	_BIT_CBUS_MSC_MR_WRITE_BURST@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r13d
	movq	_REG_M3_CTRL@GOTPCREL(%rip), %rcx
	movq	_BIT_CBUS_MSC_MR_SET_INT@GOTPCREL(%rip), %rdx
	orl	(%rdx), %r13d
	movl	(%rcx), %ecx
	movq	%rcx, -136(%rbp)                ## 8-byte Spill
	movq	_BIT_CBUS_MSC_MT_DONE_NACK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r13d
	movq	_VAL_M3_CTRL_MHL3_VALUE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%rcx, -128(%rbp)                ## 8-byte Spill
	movq	_REG_MHL_DP_CTL1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%rcx, -120(%rbp)                ## 8-byte Spill
	movq	_REG_MHL_DP_CTL2@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%rcx, -112(%rbp)                ## 8-byte Spill
	movq	_REG_MHL_DP_CTL3@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%rcx, -104(%rbp)                ## 8-byte Spill
	movq	_REG_MHL_DP_CTL5@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%rcx, -96(%rbp)                 ## 8-byte Spill
	movq	_REG_MHL_DP_CTL6@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%rcx, -88(%rbp)                 ## 8-byte Spill
	movq	_REG_MHL_DP_CTL7@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%rcx, -80(%rbp)                 ## 8-byte Spill
	movq	_REG_COC_CTLC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%rcx, -72(%rbp)                 ## 8-byte Spill
	movq	_REG_DPD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	%rcx, -64(%rbp)                 ## 8-byte Spill
	movq	_REG_COC_INTR_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r11d
	movq	_REG_CBUS_INT_1_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r10d
	movq	_REG_CBUS_INT_0_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r12d
	subq	$8, %rsp
	movq	-176(%rbp), %rdi                ## 8-byte Reload
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	pushq	%r13
	pushq	%r12
	pushq	%rax
	pushq	%r10
	pushq	%r14
	pushq	%r11
	pushq	%r15
	pushq	-64(%rbp)                       ## 8-byte Folded Reload
	pushq	$255
	pushq	-72(%rbp)                       ## 8-byte Folded Reload
	pushq	$3
	pushq	-80(%rbp)                       ## 8-byte Folded Reload
	pushq	$2
	pushq	-88(%rbp)                       ## 8-byte Folded Reload
	pushq	$2
	pushq	-96(%rbp)                       ## 8-byte Folded Reload
	pushq	$53
	pushq	-104(%rbp)                      ## 8-byte Folded Reload
	pushq	$3
	pushq	-112(%rbp)                      ## 8-byte Folded Reload
	pushq	$162
	pushq	-120(%rbp)                      ## 8-byte Folded Reload
	pushq	-128(%rbp)                      ## 8-byte Folded Reload
	pushq	-136(%rbp)                      ## 8-byte Folded Reload
	pushq	-160(%rbp)                      ## 8-byte Folded Reload
	pushq	-144(%rbp)                      ## 8-byte Folded Reload
	pushq	-168(%rbp)                      ## 8-byte Folded Reload
	pushq	-152(%rbp)                      ## 8-byte Folded Reload
	pushq	%rbx
	callq	_sii8620_write_seq_static
	addq	$376, %rsp                      ## imm = 0x178
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_DISC_CTRL9,4,2             ## @REG_DISC_CTRL9
	.comm	_BIT_DISC_CTRL9_WAKE_DRVFLT,4,2 ## @BIT_DISC_CTRL9_WAKE_DRVFLT
	.comm	_BIT_DISC_CTRL9_DISC_PULSE_PROCEED,4,2 ## @BIT_DISC_CTRL9_DISC_PULSE_PROCEED
	.comm	_REG_DISC_CTRL4,4,2             ## @REG_DISC_CTRL4
	.comm	_VAL_PUP_5K,4,2                 ## @VAL_PUP_5K
	.comm	_VAL_PUP_20K,4,2                ## @VAL_PUP_20K
	.comm	_REG_CBUS_DISC_INTR0_MASK,4,2   ## @REG_CBUS_DISC_INTR0_MASK
	.comm	_BIT_MHL3_EST_INT,4,2           ## @BIT_MHL3_EST_INT
	.comm	_BIT_MHL_EST_INT,4,2            ## @BIT_MHL_EST_INT
	.comm	_BIT_NOT_MHL_EST_INT,4,2        ## @BIT_NOT_MHL_EST_INT
	.comm	_BIT_CBUS_MHL3_DISCON_INT,4,2   ## @BIT_CBUS_MHL3_DISCON_INT
	.comm	_BIT_CBUS_MHL12_DISCON_INT,4,2  ## @BIT_CBUS_MHL12_DISCON_INT
	.comm	_BIT_RGND_READY_INT,4,2         ## @BIT_RGND_READY_INT
	.comm	_REG_MHL_PLL_CTL0,4,2           ## @REG_MHL_PLL_CTL0
	.comm	_VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X,4,2 ## @VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X
	.comm	_BIT_MHL_PLL_CTL0_CRYSTAL_CLK_SEL,4,2 ## @BIT_MHL_PLL_CTL0_CRYSTAL_CLK_SEL
	.comm	_BIT_MHL_PLL_CTL0_ZONE_MASK_OE,4,2 ## @BIT_MHL_PLL_CTL0_ZONE_MASK_OE
	.comm	_REG_MHL_DP_CTL0,4,2            ## @REG_MHL_DP_CTL0
	.comm	_BIT_MHL_DP_CTL0_DP_OE,4,2      ## @BIT_MHL_DP_CTL0_DP_OE
	.comm	_BIT_MHL_DP_CTL0_TX_OE_OVR,4,2  ## @BIT_MHL_DP_CTL0_TX_OE_OVR
	.comm	_REG_M3_CTRL,4,2                ## @REG_M3_CTRL
	.comm	_VAL_M3_CTRL_MHL3_VALUE,4,2     ## @VAL_M3_CTRL_MHL3_VALUE
	.comm	_REG_MHL_DP_CTL1,4,2            ## @REG_MHL_DP_CTL1
	.comm	_REG_MHL_DP_CTL2,4,2            ## @REG_MHL_DP_CTL2
	.comm	_REG_MHL_DP_CTL3,4,2            ## @REG_MHL_DP_CTL3
	.comm	_REG_MHL_DP_CTL5,4,2            ## @REG_MHL_DP_CTL5
	.comm	_REG_MHL_DP_CTL6,4,2            ## @REG_MHL_DP_CTL6
	.comm	_REG_MHL_DP_CTL7,4,2            ## @REG_MHL_DP_CTL7
	.comm	_REG_COC_CTLC,4,2               ## @REG_COC_CTLC
	.comm	_REG_DPD,4,2                    ## @REG_DPD
	.comm	_BIT_DPD_PWRON_PLL,4,2          ## @BIT_DPD_PWRON_PLL
	.comm	_BIT_DPD_PDNTX12,4,2            ## @BIT_DPD_PDNTX12
	.comm	_BIT_DPD_OSC_EN,4,2             ## @BIT_DPD_OSC_EN
	.comm	_BIT_DPD_PWRON_HSIC,4,2         ## @BIT_DPD_PWRON_HSIC
	.comm	_REG_COC_INTR_MASK,4,2          ## @REG_COC_INTR_MASK
	.comm	_BIT_COC_PLL_LOCK_STATUS_CHANGE,4,2 ## @BIT_COC_PLL_LOCK_STATUS_CHANGE
	.comm	_BIT_COC_CALIBRATION_DONE,4,2   ## @BIT_COC_CALIBRATION_DONE
	.comm	_REG_CBUS_INT_1_MASK,4,2        ## @REG_CBUS_INT_1_MASK
	.comm	_BIT_CBUS_MSC_ABORT_RCVD,4,2    ## @BIT_CBUS_MSC_ABORT_RCVD
	.comm	_BIT_CBUS_CMD_ABORT,4,2         ## @BIT_CBUS_CMD_ABORT
	.comm	_REG_CBUS_INT_0_MASK,4,2        ## @REG_CBUS_INT_0_MASK
	.comm	_BIT_CBUS_MSC_MT_DONE,4,2       ## @BIT_CBUS_MSC_MT_DONE
	.comm	_BIT_CBUS_HPD_CHG,4,2           ## @BIT_CBUS_HPD_CHG
	.comm	_BIT_CBUS_MSC_MR_WRITE_STAT,4,2 ## @BIT_CBUS_MSC_MR_WRITE_STAT
	.comm	_BIT_CBUS_MSC_MR_MSC_MSG,4,2    ## @BIT_CBUS_MSC_MR_MSC_MSG
	.comm	_BIT_CBUS_MSC_MR_WRITE_BURST,4,2 ## @BIT_CBUS_MSC_MR_WRITE_BURST
	.comm	_BIT_CBUS_MSC_MR_SET_INT,4,2    ## @BIT_CBUS_MSC_MR_SET_INT
	.comm	_BIT_CBUS_MSC_MT_DONE_NACK,4,2  ## @BIT_CBUS_MSC_MT_DONE_NACK
	.no_dead_strip	_sii8620_mhl_discover
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sii8620_mhl_discover
_sii8620_mhl_discover:                  ; @sii8620_mhl_discover
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #208
	.cfi_def_cfa_offset 208
	stp	x28, x27, [sp, #112]            ; 16-byte Folded Spill
	stp	x26, x25, [sp, #128]            ; 16-byte Folded Spill
	stp	x24, x23, [sp, #144]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #160]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #176]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #192]            ; 16-byte Folded Spill
	add	x29, sp, #192
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x8, _REG_DISC_CTRL9@GOTPAGE
Lloh1:
	ldr	x8, [x8, _REG_DISC_CTRL9@GOTPAGEOFF]
Lloh2:
	ldr	w20, [x8]
Lloh3:
	adrp	x8, _BIT_DISC_CTRL9_WAKE_DRVFLT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _BIT_DISC_CTRL9_WAKE_DRVFLT@GOTPAGEOFF]
Lloh5:
	adrp	x9, _BIT_DISC_CTRL9_DISC_PULSE_PROCEED@GOTPAGE
Lloh6:
	ldr	x9, [x9, _BIT_DISC_CTRL9_DISC_PULSE_PROCEED@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
Lloh8:
	ldr	w9, [x9]
	orr	w21, w9, w8
Lloh9:
	adrp	x8, _REG_DISC_CTRL4@GOTPAGE
Lloh10:
	ldr	x8, [x8, _REG_DISC_CTRL4@GOTPAGEOFF]
Lloh11:
	ldr	w22, [x8]
Lloh12:
	adrp	x8, _VAL_PUP_5K@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VAL_PUP_5K@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
Lloh15:
	adrp	x8, _VAL_PUP_20K@GOTPAGE
Lloh16:
	ldr	x8, [x8, _VAL_PUP_20K@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	bl	_VAL_DISC_CTRL4
	mov	x4, x0
Lloh18:
	adrp	x8, _REG_CBUS_DISC_INTR0_MASK@GOTPAGE
Lloh19:
	ldr	x8, [x8, _REG_CBUS_DISC_INTR0_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w5, [x8]
Lloh21:
	adrp	x8, _BIT_MHL3_EST_INT@GOTPAGE
Lloh22:
	ldr	x8, [x8, _BIT_MHL3_EST_INT@GOTPAGEOFF]
Lloh23:
	adrp	x9, _BIT_MHL_EST_INT@GOTPAGE
Lloh24:
	ldr	x9, [x9, _BIT_MHL_EST_INT@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
Lloh26:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh27:
	adrp	x9, _BIT_NOT_MHL_EST_INT@GOTPAGE
Lloh28:
	ldr	x9, [x9, _BIT_NOT_MHL_EST_INT@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh30:
	adrp	x9, _BIT_CBUS_MHL3_DISCON_INT@GOTPAGE
Lloh31:
	ldr	x9, [x9, _BIT_CBUS_MHL3_DISCON_INT@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
Lloh33:
	adrp	x10, _BIT_CBUS_MHL12_DISCON_INT@GOTPAGE
Lloh34:
	ldr	x10, [x10, _BIT_CBUS_MHL12_DISCON_INT@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh35:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh36:
	adrp	x9, _BIT_RGND_READY_INT@GOTPAGE
Lloh37:
	ldr	x9, [x9, _BIT_RGND_READY_INT@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	orr	w6, w8, w9
Lloh39:
	adrp	x8, _REG_MHL_PLL_CTL0@GOTPAGE
Lloh40:
	ldr	x8, [x8, _REG_MHL_PLL_CTL0@GOTPAGEOFF]
Lloh41:
	ldr	w7, [x8]
Lloh42:
	adrp	x8, _VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X@GOTPAGE
Lloh43:
	ldr	x8, [x8, _VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X@GOTPAGEOFF]
Lloh44:
	ldr	w8, [x8]
Lloh45:
	adrp	x9, _BIT_MHL_PLL_CTL0_CRYSTAL_CLK_SEL@GOTPAGE
Lloh46:
	ldr	x9, [x9, _BIT_MHL_PLL_CTL0_CRYSTAL_CLK_SEL@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
Lloh48:
	adrp	x10, _BIT_MHL_PLL_CTL0_ZONE_MASK_OE@GOTPAGE
Lloh49:
	ldr	x10, [x10, _BIT_MHL_PLL_CTL0_ZONE_MASK_OE@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh50:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh51:
	adrp	x9, _REG_MHL_DP_CTL0@GOTPAGE
Lloh52:
	ldr	x9, [x9, _REG_MHL_DP_CTL0@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
Lloh54:
	adrp	x10, _BIT_MHL_DP_CTL0_DP_OE@GOTPAGE
Lloh55:
	ldr	x10, [x10, _BIT_MHL_DP_CTL0_DP_OE@GOTPAGEOFF]
Lloh56:
	ldr	w10, [x10]
Lloh57:
	adrp	x11, _BIT_MHL_DP_CTL0_TX_OE_OVR@GOTPAGE
Lloh58:
	ldr	x11, [x11, _BIT_MHL_DP_CTL0_TX_OE_OVR@GOTPAGEOFF]
Lloh59:
	ldr	w11, [x11]
	orr	w10, w11, w10
Lloh60:
	adrp	x11, _REG_M3_CTRL@GOTPAGE
Lloh61:
	ldr	x11, [x11, _REG_M3_CTRL@GOTPAGEOFF]
Lloh62:
	ldr	w11, [x11]
Lloh63:
	adrp	x12, _VAL_M3_CTRL_MHL3_VALUE@GOTPAGE
Lloh64:
	ldr	x12, [x12, _VAL_M3_CTRL_MHL3_VALUE@GOTPAGEOFF]
Lloh65:
	ldr	w12, [x12]
Lloh66:
	adrp	x13, _REG_MHL_DP_CTL1@GOTPAGE
Lloh67:
	ldr	x13, [x13, _REG_MHL_DP_CTL1@GOTPAGEOFF]
Lloh68:
	ldr	w13, [x13]
Lloh69:
	adrp	x14, _REG_MHL_DP_CTL2@GOTPAGE
Lloh70:
	ldr	x14, [x14, _REG_MHL_DP_CTL2@GOTPAGEOFF]
Lloh71:
	ldr	w14, [x14]
Lloh72:
	adrp	x15, _REG_MHL_DP_CTL3@GOTPAGE
Lloh73:
	ldr	x15, [x15, _REG_MHL_DP_CTL3@GOTPAGEOFF]
Lloh74:
	ldr	w15, [x15]
Lloh75:
	adrp	x16, _REG_MHL_DP_CTL5@GOTPAGE
Lloh76:
	ldr	x16, [x16, _REG_MHL_DP_CTL5@GOTPAGEOFF]
Lloh77:
	ldr	w16, [x16]
Lloh78:
	adrp	x17, _REG_MHL_DP_CTL6@GOTPAGE
Lloh79:
	ldr	x17, [x17, _REG_MHL_DP_CTL6@GOTPAGEOFF]
Lloh80:
	ldr	w17, [x17]
Lloh81:
	adrp	x0, _REG_MHL_DP_CTL7@GOTPAGE
Lloh82:
	ldr	x0, [x0, _REG_MHL_DP_CTL7@GOTPAGEOFF]
Lloh83:
	ldr	w1, [x0]
Lloh84:
	adrp	x0, _REG_COC_CTLC@GOTPAGE
Lloh85:
	ldr	x0, [x0, _REG_COC_CTLC@GOTPAGEOFF]
Lloh86:
	ldr	w3, [x0]
Lloh87:
	adrp	x0, _REG_DPD@GOTPAGE
Lloh88:
	ldr	x0, [x0, _REG_DPD@GOTPAGEOFF]
Lloh89:
	ldr	w23, [x0]
Lloh90:
	adrp	x0, _BIT_DPD_PWRON_PLL@GOTPAGE
Lloh91:
	ldr	x0, [x0, _BIT_DPD_PWRON_PLL@GOTPAGEOFF]
Lloh92:
	ldr	w0, [x0]
Lloh93:
	adrp	x2, _BIT_DPD_PDNTX12@GOTPAGE
Lloh94:
	ldr	x2, [x2, _BIT_DPD_PDNTX12@GOTPAGEOFF]
Lloh95:
	ldr	w2, [x2]
	orr	w0, w2, w0
Lloh96:
	adrp	x2, _BIT_DPD_OSC_EN@GOTPAGE
Lloh97:
	ldr	x2, [x2, _BIT_DPD_OSC_EN@GOTPAGEOFF]
Lloh98:
	ldr	w2, [x2]
	orr	w0, w0, w2
Lloh99:
	adrp	x2, _BIT_DPD_PWRON_HSIC@GOTPAGE
Lloh100:
	ldr	x2, [x2, _BIT_DPD_PWRON_HSIC@GOTPAGEOFF]
Lloh101:
	ldr	w2, [x2]
	orr	w0, w0, w2
Lloh102:
	adrp	x2, _REG_COC_INTR_MASK@GOTPAGE
Lloh103:
	ldr	x2, [x2, _REG_COC_INTR_MASK@GOTPAGEOFF]
Lloh104:
	ldr	w2, [x2]
Lloh105:
	adrp	x24, _BIT_COC_PLL_LOCK_STATUS_CHANGE@GOTPAGE
Lloh106:
	ldr	x24, [x24, _BIT_COC_PLL_LOCK_STATUS_CHANGE@GOTPAGEOFF]
Lloh107:
	ldr	w24, [x24]
Lloh108:
	adrp	x25, _BIT_COC_CALIBRATION_DONE@GOTPAGE
Lloh109:
	ldr	x25, [x25, _BIT_COC_CALIBRATION_DONE@GOTPAGEOFF]
Lloh110:
	ldr	w25, [x25]
	orr	w24, w25, w24
Lloh111:
	adrp	x25, _REG_CBUS_INT_1_MASK@GOTPAGE
Lloh112:
	ldr	x25, [x25, _REG_CBUS_INT_1_MASK@GOTPAGEOFF]
Lloh113:
	adrp	x26, _BIT_CBUS_MSC_ABORT_RCVD@GOTPAGE
Lloh114:
	ldr	x26, [x26, _BIT_CBUS_MSC_ABORT_RCVD@GOTPAGEOFF]
Lloh115:
	ldr	w26, [x26]
Lloh116:
	adrp	x27, _BIT_CBUS_CMD_ABORT@GOTPAGE
Lloh117:
	ldr	x27, [x27, _BIT_CBUS_CMD_ABORT@GOTPAGEOFF]
Lloh118:
	ldr	w27, [x27]
Lloh119:
	adrp	x28, _REG_CBUS_INT_0_MASK@GOTPAGE
Lloh120:
	ldr	x28, [x28, _REG_CBUS_INT_0_MASK@GOTPAGEOFF]
	orr	w26, w27, w26
Lloh121:
	adrp	x27, _BIT_CBUS_MSC_MT_DONE@GOTPAGE
Lloh122:
	ldr	x27, [x27, _BIT_CBUS_MSC_MT_DONE@GOTPAGEOFF]
Lloh123:
	ldr	w27, [x27]
Lloh124:
	adrp	x30, _BIT_CBUS_HPD_CHG@GOTPAGE
Lloh125:
	ldr	x30, [x30, _BIT_CBUS_HPD_CHG@GOTPAGEOFF]
Lloh126:
	ldr	w30, [x30]
	orr	w27, w30, w27
Lloh127:
	adrp	x30, _BIT_CBUS_MSC_MR_WRITE_STAT@GOTPAGE
Lloh128:
	ldr	x30, [x30, _BIT_CBUS_MSC_MR_WRITE_STAT@GOTPAGEOFF]
Lloh129:
	ldr	w30, [x30]
	orr	w27, w27, w30
Lloh130:
	adrp	x30, _BIT_CBUS_MSC_MR_MSC_MSG@GOTPAGE
Lloh131:
	ldr	x30, [x30, _BIT_CBUS_MSC_MR_MSC_MSG@GOTPAGEOFF]
Lloh132:
	ldr	w30, [x30]
	orr	w27, w27, w30
Lloh133:
	adrp	x30, _BIT_CBUS_MSC_MR_WRITE_BURST@GOTPAGE
Lloh134:
	ldr	x30, [x30, _BIT_CBUS_MSC_MR_WRITE_BURST@GOTPAGEOFF]
Lloh135:
	ldr	w25, [x25]
Lloh136:
	ldr	w30, [x30]
	orr	w27, w27, w30
Lloh137:
	adrp	x30, _BIT_CBUS_MSC_MR_SET_INT@GOTPAGE
Lloh138:
	ldr	x30, [x30, _BIT_CBUS_MSC_MR_SET_INT@GOTPAGEOFF]
Lloh139:
	ldr	w30, [x30]
	orr	w27, w27, w30
Lloh140:
	adrp	x30, _BIT_CBUS_MSC_MT_DONE_NACK@GOTPAGE
Lloh141:
	ldr	x30, [x30, _BIT_CBUS_MSC_MT_DONE_NACK@GOTPAGEOFF]
Lloh142:
	ldr	w30, [x30]
	orr	w27, w27, w30
Lloh143:
	ldr	w28, [x28]
	stp	w26, w28, [sp, #96]
	stp	w24, w25, [sp, #88]
	mov	w24, #255
	stp	w24, w23, [sp, #72]
	mov	w23, #3
	stp	w23, w3, [sp, #64]
	mov	w3, #2
	stp	w3, w1, [sp, #56]
	stp	w3, w17, [sp, #48]
	mov	w17, #53
	stp	w17, w16, [sp, #40]
	stp	w23, w15, [sp, #32]
	mov	w15, #162
	stp	w15, w14, [sp, #24]
	stp	w12, w13, [sp, #16]
	stp	w10, w11, [sp, #8]
	stp	w8, w9, [sp]
	stp	w0, w2, [sp, #80]
	str	w27, [sp, #104]
	mov	x0, x19
	mov	x1, x20
	mov	x2, x21
	mov	x3, x22
	bl	_sii8620_write_seq_static
	ldp	x29, x30, [sp, #192]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #176]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #160]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #144]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #128]            ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #112]            ; 16-byte Folded Reload
	add	sp, sp, #208
	ret
	.loh AdrpLdrGotLdr	Lloh140, Lloh141, Lloh142
	.loh AdrpLdrGotLdr	Lloh137, Lloh138, Lloh139
	.loh AdrpLdrGotLdr	Lloh133, Lloh134, Lloh136
	.loh AdrpLdrGotLdr	Lloh130, Lloh131, Lloh132
	.loh AdrpLdrGotLdr	Lloh127, Lloh128, Lloh129
	.loh AdrpLdrGotLdr	Lloh124, Lloh125, Lloh126
	.loh AdrpLdrGotLdr	Lloh121, Lloh122, Lloh123
	.loh AdrpLdrGotLdr	Lloh119, Lloh120, Lloh143
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh135
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh25
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_DISC_CTRL9,4,2             ; @REG_DISC_CTRL9
	.comm	_BIT_DISC_CTRL9_WAKE_DRVFLT,4,2 ; @BIT_DISC_CTRL9_WAKE_DRVFLT
	.comm	_BIT_DISC_CTRL9_DISC_PULSE_PROCEED,4,2 ; @BIT_DISC_CTRL9_DISC_PULSE_PROCEED
	.comm	_REG_DISC_CTRL4,4,2             ; @REG_DISC_CTRL4
	.comm	_VAL_PUP_5K,4,2                 ; @VAL_PUP_5K
	.comm	_VAL_PUP_20K,4,2                ; @VAL_PUP_20K
	.comm	_REG_CBUS_DISC_INTR0_MASK,4,2   ; @REG_CBUS_DISC_INTR0_MASK
	.comm	_BIT_MHL3_EST_INT,4,2           ; @BIT_MHL3_EST_INT
	.comm	_BIT_MHL_EST_INT,4,2            ; @BIT_MHL_EST_INT
	.comm	_BIT_NOT_MHL_EST_INT,4,2        ; @BIT_NOT_MHL_EST_INT
	.comm	_BIT_CBUS_MHL3_DISCON_INT,4,2   ; @BIT_CBUS_MHL3_DISCON_INT
	.comm	_BIT_CBUS_MHL12_DISCON_INT,4,2  ; @BIT_CBUS_MHL12_DISCON_INT
	.comm	_BIT_RGND_READY_INT,4,2         ; @BIT_RGND_READY_INT
	.comm	_REG_MHL_PLL_CTL0,4,2           ; @REG_MHL_PLL_CTL0
	.comm	_VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X,4,2 ; @VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X
	.comm	_BIT_MHL_PLL_CTL0_CRYSTAL_CLK_SEL,4,2 ; @BIT_MHL_PLL_CTL0_CRYSTAL_CLK_SEL
	.comm	_BIT_MHL_PLL_CTL0_ZONE_MASK_OE,4,2 ; @BIT_MHL_PLL_CTL0_ZONE_MASK_OE
	.comm	_REG_MHL_DP_CTL0,4,2            ; @REG_MHL_DP_CTL0
	.comm	_BIT_MHL_DP_CTL0_DP_OE,4,2      ; @BIT_MHL_DP_CTL0_DP_OE
	.comm	_BIT_MHL_DP_CTL0_TX_OE_OVR,4,2  ; @BIT_MHL_DP_CTL0_TX_OE_OVR
	.comm	_REG_M3_CTRL,4,2                ; @REG_M3_CTRL
	.comm	_VAL_M3_CTRL_MHL3_VALUE,4,2     ; @VAL_M3_CTRL_MHL3_VALUE
	.comm	_REG_MHL_DP_CTL1,4,2            ; @REG_MHL_DP_CTL1
	.comm	_REG_MHL_DP_CTL2,4,2            ; @REG_MHL_DP_CTL2
	.comm	_REG_MHL_DP_CTL3,4,2            ; @REG_MHL_DP_CTL3
	.comm	_REG_MHL_DP_CTL5,4,2            ; @REG_MHL_DP_CTL5
	.comm	_REG_MHL_DP_CTL6,4,2            ; @REG_MHL_DP_CTL6
	.comm	_REG_MHL_DP_CTL7,4,2            ; @REG_MHL_DP_CTL7
	.comm	_REG_COC_CTLC,4,2               ; @REG_COC_CTLC
	.comm	_REG_DPD,4,2                    ; @REG_DPD
	.comm	_BIT_DPD_PWRON_PLL,4,2          ; @BIT_DPD_PWRON_PLL
	.comm	_BIT_DPD_PDNTX12,4,2            ; @BIT_DPD_PDNTX12
	.comm	_BIT_DPD_OSC_EN,4,2             ; @BIT_DPD_OSC_EN
	.comm	_BIT_DPD_PWRON_HSIC,4,2         ; @BIT_DPD_PWRON_HSIC
	.comm	_REG_COC_INTR_MASK,4,2          ; @REG_COC_INTR_MASK
	.comm	_BIT_COC_PLL_LOCK_STATUS_CHANGE,4,2 ; @BIT_COC_PLL_LOCK_STATUS_CHANGE
	.comm	_BIT_COC_CALIBRATION_DONE,4,2   ; @BIT_COC_CALIBRATION_DONE
	.comm	_REG_CBUS_INT_1_MASK,4,2        ; @REG_CBUS_INT_1_MASK
	.comm	_BIT_CBUS_MSC_ABORT_RCVD,4,2    ; @BIT_CBUS_MSC_ABORT_RCVD
	.comm	_BIT_CBUS_CMD_ABORT,4,2         ; @BIT_CBUS_CMD_ABORT
	.comm	_REG_CBUS_INT_0_MASK,4,2        ; @REG_CBUS_INT_0_MASK
	.comm	_BIT_CBUS_MSC_MT_DONE,4,2       ; @BIT_CBUS_MSC_MT_DONE
	.comm	_BIT_CBUS_HPD_CHG,4,2           ; @BIT_CBUS_HPD_CHG
	.comm	_BIT_CBUS_MSC_MR_WRITE_STAT,4,2 ; @BIT_CBUS_MSC_MR_WRITE_STAT
	.comm	_BIT_CBUS_MSC_MR_MSC_MSG,4,2    ; @BIT_CBUS_MSC_MR_MSC_MSG
	.comm	_BIT_CBUS_MSC_MR_WRITE_BURST,4,2 ; @BIT_CBUS_MSC_MR_WRITE_BURST
	.comm	_BIT_CBUS_MSC_MR_SET_INT,4,2    ; @BIT_CBUS_MSC_MR_SET_INT
	.comm	_BIT_CBUS_MSC_MT_DONE_NACK,4,2  ; @BIT_CBUS_MSC_MT_DONE_NACK
	.no_dead_strip	_sii8620_mhl_discover
.subsections_via_symbols
