	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function socfpga_a10_fpga_generate_dclks
_socfpga_a10_fpga_generate_dclks:       ## @socfpga_a10_fpga_generate_dclks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movl	(%rdi), %edi
	movq	_A10_FPGAMGR_DCLKSTAT_OFST@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_A10_FPGAMGR_DCLKSTAT_DCLKDONE@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	callq	_regmap_write
	movl	(%rbx), %edi
	movq	_A10_FPGAMGR_DCLKCNT_OFST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r14d, %edx
	callq	_regmap_write
	movl	(%rbx), %edi
	movl	(%r15), %esi
	movl	$1, %r8d
	movl	$100, %r9d
	callq	_regmap_read_poll_timeout
	movl	(%rbx), %edi
	movl	(%r15), %esi
	movl	(%r12), %edx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_regmap_write                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_A10_FPGAMGR_DCLKSTAT_OFST,4,2  ## @A10_FPGAMGR_DCLKSTAT_OFST
	.comm	_A10_FPGAMGR_DCLKSTAT_DCLKDONE,4,2 ## @A10_FPGAMGR_DCLKSTAT_DCLKDONE
	.comm	_A10_FPGAMGR_DCLKCNT_OFST,4,2   ## @A10_FPGAMGR_DCLKCNT_OFST
	.no_dead_strip	_socfpga_a10_fpga_generate_dclks
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function socfpga_a10_fpga_generate_dclks
_socfpga_a10_fpga_generate_dclks:       ; @socfpga_a10_fpga_generate_dclks
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
	ldr	w0, [x0]
Lloh0:
	adrp	x21, _A10_FPGAMGR_DCLKSTAT_OFST@GOTPAGE
Lloh1:
	ldr	x21, [x21, _A10_FPGAMGR_DCLKSTAT_OFST@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh2:
	adrp	x22, _A10_FPGAMGR_DCLKSTAT_DCLKDONE@GOTPAGE
Lloh3:
	ldr	x22, [x22, _A10_FPGAMGR_DCLKSTAT_DCLKDONE@GOTPAGEOFF]
	ldr	w2, [x22]
	bl	_regmap_write
	ldr	w0, [x20]
Lloh4:
	adrp	x8, _A10_FPGAMGR_DCLKCNT_OFST@GOTPAGE
Lloh5:
	ldr	x8, [x8, _A10_FPGAMGR_DCLKCNT_OFST@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
	mov	x2, x19
	bl	_regmap_write
	ldr	w0, [x20]
	ldr	w1, [x21]
	mov	w4, #1
	mov	w5, #100
	bl	_regmap_read_poll_timeout
	ldr	w0, [x20]
	ldr	w1, [x21]
	ldr	w2, [x22]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_regmap_write
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_A10_FPGAMGR_DCLKSTAT_OFST,4,2  ; @A10_FPGAMGR_DCLKSTAT_OFST
	.comm	_A10_FPGAMGR_DCLKSTAT_DCLKDONE,4,2 ; @A10_FPGAMGR_DCLKSTAT_DCLKDONE
	.comm	_A10_FPGAMGR_DCLKCNT_OFST,4,2   ; @A10_FPGAMGR_DCLKCNT_OFST
	.no_dead_strip	_socfpga_a10_fpga_generate_dclks
.subsections_via_symbols
