	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_move_blit
_amdgpu_move_blit:                      ## @amdgpu_move_blit
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r8, %r13
	movq	%rcx, %r14
	movl	%esi, -60(%rbp)                 ## 4-byte Spill
	movq	%rdi, %r15
	movl	12(%rdi), %edi
	callq	_amdgpu_ttm_adev
	movq	$0, -48(%rbp)
	movq	%r15, -96(%rbp)
	movq	%r15, -72(%rbp)
	movq	%r13, -104(%rbp)
	movq	%r14, -80(%rbp)
	movq	$0, -112(%rbp)
	movq	$0, -88(%rbp)
	movl	(%r14), %ebx
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %ebx
	movl	8(%r15), %r8d
	leaq	-112(%rbp), %rsi
	leaq	-88(%rbp), %rdx
	leaq	-48(%rbp), %r9
	movq	%rax, %rdi
	movl	%ebx, %ecx
	callq	_amdgpu_ttm_copy_mem_to_mem
	movl	%eax, %r12d
	testl	%eax, %eax
	je	LBB0_3
LBB0_1:
	movq	-48(%rbp), %rdi
	testq	%rdi, %rdi
	je	LBB0_7
## %bb.2:
	xorl	%esi, %esi
	callq	_dma_fence_wait
	jmp	LBB0_14
LBB0_3:
	movq	8(%r13), %rax
	movq	_TTM_PL_VRAM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movl	-60(%rbp), %ebx                 ## 4-byte Reload
	jne	LBB0_10
## %bb.4:
	movq	%r15, %rdi
	callq	_ttm_to_amdgpu_bo
	movq	_AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rax)
	je	LBB0_10
## %bb.5:
	movq	$0, -56(%rbp)
	movq	%r15, %rdi
	callq	_ttm_to_amdgpu_bo
	movq	_AMDGPU_POISON@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	leaq	-56(%rbp), %rcx
	movq	%rax, %rdi
	xorl	%edx, %edx
	callq	_amdgpu_fill_buffer
	testl	%eax, %eax
	je	LBB0_8
## %bb.6:
	movl	%eax, %r12d
	jmp	LBB0_1
LBB0_7:
	xorl	%edi, %edi
	jmp	LBB0_15
LBB0_8:
	cmpq	$0, -56(%rbp)
	je	LBB0_10
## %bb.9:
	movq	-48(%rbp), %rdi
	callq	_dma_fence_put
	movq	-56(%rbp), %rax
	movq	%rax, -48(%rbp)
LBB0_10:
	movq	(%r15), %rax
	movq	_ttm_bo_type_kernel@GOTPCREL(%rip), %rcx
	movq	-48(%rbp), %rsi
	cmpq	(%rcx), %rax
	jne	LBB0_12
## %bb.11:
	movq	%r15, %rdi
	movl	$1, %edx
	movq	%r14, %rcx
	callq	_ttm_bo_move_accel_cleanup
	jmp	LBB0_13
LBB0_12:
	movq	%r15, %rdi
	movl	%ebx, %edx
	movq	%r14, %rcx
	callq	_ttm_bo_pipeline_move
LBB0_13:
	movl	%eax, %r12d
LBB0_14:
	movq	-48(%rbp), %rdi
LBB0_15:
	callq	_dma_fence_put
	movl	%r12d, %eax
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PAGE_SHIFT,4,2                 ## @PAGE_SHIFT
	.comm	_TTM_PL_VRAM,8,3                ## @TTM_PL_VRAM
	.comm	_AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE,4,2 ## @AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE
	.comm	_AMDGPU_POISON,4,2              ## @AMDGPU_POISON
	.comm	_ttm_bo_type_kernel,8,3         ## @ttm_bo_type_kernel
	.no_dead_strip	_amdgpu_move_blit
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_move_blit
_amdgpu_move_blit:                      ; @amdgpu_move_blit
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x23, x4
	mov	x19, x3
	mov	x21, x1
	mov	x20, x0
	ldr	w0, [x0, #12]
	bl	_amdgpu_ttm_adev
	stp	xzr, xzr, [sp, #8]
	stp	x23, x20, [sp, #48]
	stp	x20, xzr, [sp, #32]
	str	x19, [sp, #24]
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _PAGE_SHIFT@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PAGE_SHIFT@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	lsl	w3, w8, w9
	ldr	w4, [x20, #8]
	add	x1, sp, #40
	add	x2, sp, #16
	add	x5, sp, #8
	bl	_amdgpu_ttm_copy_mem_to_mem
	mov	x22, x0
	cbz	w0, LBB0_3
; %bb.1:
	ldr	x0, [sp, #8]
	cbz	x0, LBB0_14
LBB0_2:
	mov	w1, #0
	bl	_dma_fence_wait
	b	LBB0_13
LBB0_3:
	ldr	x8, [x23, #8]
Lloh3:
	adrp	x9, _TTM_PL_VRAM@GOTPAGE
Lloh4:
	ldr	x9, [x9, _TTM_PL_VRAM@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_9
; %bb.4:
	mov	x0, x20
	bl	_ttm_to_amdgpu_bo
	ldr	w8, [x0]
Lloh6:
	adrp	x9, _AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE@GOTPAGE
Lloh7:
	ldr	x9, [x9, _AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.5:
	str	xzr, [sp]
	mov	x0, x20
	bl	_ttm_to_amdgpu_bo
Lloh9:
	adrp	x8, _AMDGPU_POISON@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AMDGPU_POISON@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x3, sp
	mov	x2, #0
	bl	_amdgpu_fill_buffer
	cbz	w0, LBB0_7
; %bb.6:
	mov	x22, x0
	ldr	x0, [sp, #8]
	cbnz	x0, LBB0_2
	b	LBB0_14
LBB0_7:
	ldr	x8, [sp]
	cbz	x8, LBB0_9
; %bb.8:
	ldr	x0, [sp, #8]
	bl	_dma_fence_put
	ldr	x8, [sp]
	str	x8, [sp, #8]
LBB0_9:
	ldr	x8, [x20]
Lloh12:
	adrp	x9, _ttm_bo_type_kernel@GOTPAGE
Lloh13:
	ldr	x9, [x9, _ttm_bo_type_kernel@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	ldr	x1, [sp, #8]
	mov	x0, x20
	cmp	x8, x9
	b.ne	LBB0_11
; %bb.10:
	mov	w2, #1
	mov	x3, x19
	bl	_ttm_bo_move_accel_cleanup
	b	LBB0_12
LBB0_11:
	mov	x2, x21
	mov	x3, x19
	bl	_ttm_bo_pipeline_move
LBB0_12:
	mov	x22, x0
LBB0_13:
	ldr	x0, [sp, #8]
LBB0_14:
	bl	_dma_fence_put
	mov	x0, x22
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_PAGE_SHIFT,4,2                 ; @PAGE_SHIFT
	.comm	_TTM_PL_VRAM,8,3                ; @TTM_PL_VRAM
	.comm	_AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE,4,2 ; @AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE
	.comm	_AMDGPU_POISON,4,2              ; @AMDGPU_POISON
	.comm	_ttm_bo_type_kernel,8,3         ; @ttm_bo_type_kernel
	.no_dead_strip	_amdgpu_move_blit
.subsections_via_symbols
