	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_v6_0_program_fmt
_dce_v6_0_program_fmt:                  ## @dce_v6_0_program_fmt
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_to_amdgpu_encoder
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	_amdgpu_get_connector_for_encoder
	movq	%rax, %r13
	movl	(%rbx), %edi
	callq	_to_amdgpu_crtc
	movq	%rax, %r14
	testq	%r13, %r13
	je	LBB0_1
## %bb.2:
	movq	%r13, %rdi
	callq	_to_amdgpu_connector
	movq	%rax, %r15
	movq	%r13, %rdi
	callq	_amdgpu_connector_get_monitor_bpc
	jmp	LBB0_3
LBB0_1:
	xorl	%eax, %eax
	movq	_AMDGPU_FMT_DITHER_DISABLE@GOTPCREL(%rip), %r15
LBB0_3:
	movq	_ATOM_DEVICE_LCD_SUPPORT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%r12)
	je	LBB0_4
LBB0_15:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	testl	%eax, %eax
	je	LBB0_15
## %bb.5:
	movl	(%r15), %ecx
	cmpl	$8, %eax
	je	LBB0_10
## %bb.6:
	xorl	%esi, %esi
	cmpl	$6, %eax
	jne	LBB0_14
## %bb.7:
	movq	_AMDGPU_FMT_DITHER_ENABLE@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ecx
	jne	LBB0_9
## %bb.8:
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rax
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPCREL(%rip), %rax
	jmp	LBB0_13
LBB0_10:
	movq	_AMDGPU_FMT_DITHER_ENABLE@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ecx
	jne	LBB0_12
## %bb.11:
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rax
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH_MASK@GOTPCREL(%rip), %rax
	jmp	LBB0_13
LBB0_9:
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	jmp	LBB0_14
LBB0_12:
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPCREL(%rip), %rax
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
LBB0_13:
	orl	(%rax), %esi
LBB0_14:
	movq	_mmFMT_BIT_DEPTH_CONTROL@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_FMT_DITHER_DISABLE,4,2  ## @AMDGPU_FMT_DITHER_DISABLE
	.comm	_ATOM_DEVICE_LCD_SUPPORT,4,2    ## @ATOM_DEVICE_LCD_SUPPORT
	.comm	_AMDGPU_FMT_DITHER_ENABLE,4,2   ## @AMDGPU_FMT_DITHER_ENABLE
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH_MASK
	.comm	_mmFMT_BIT_DEPTH_CONTROL,8,3    ## @mmFMT_BIT_DEPTH_CONTROL
	.no_dead_strip	_dce_v6_0_program_fmt
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_v6_0_program_fmt
_dce_v6_0_program_fmt:                  ; @dce_v6_0_program_fmt
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_to_amdgpu_encoder
	mov	x20, x0
	mov	x0, x19
	bl	_amdgpu_get_connector_for_encoder
	mov	x22, x0
	ldr	w0, [x19]
	bl	_to_amdgpu_crtc
	mov	x19, x0
	cbz	x22, LBB0_2
; %bb.1:
	mov	x0, x22
	bl	_to_amdgpu_connector
	mov	x21, x0
	mov	x0, x22
	bl	_amdgpu_connector_get_monitor_bpc
	b	LBB0_3
LBB0_2:
	mov	w0, #0
Lloh0:
	adrp	x21, _AMDGPU_FMT_DITHER_DISABLE@GOTPAGE
Lloh1:
	ldr	x21, [x21, _AMDGPU_FMT_DITHER_DISABLE@GOTPAGEOFF]
LBB0_3:
	ldr	w8, [x20]
Lloh2:
	adrp	x9, _ATOM_DEVICE_LCD_SUPPORT@GOTPAGE
Lloh3:
	ldr	x9, [x9, _ATOM_DEVICE_LCD_SUPPORT@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	and	w8, w9, w8
	cmp	w8, #0
	ccmp	w0, #0, #4, eq
	b.ne	LBB0_5
; %bb.4:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_5:
	ldr	w8, [x21]
	cmp	w0, #8
	b.eq	LBB0_9
; %bb.6:
	cmp	w0, #6
	b.ne	LBB0_12
; %bb.7:
Lloh5:
	adrp	x9, _AMDGPU_FMT_DITHER_ENABLE@GOTPAGE
Lloh6:
	ldr	x9, [x9, _AMDGPU_FMT_DITHER_ENABLE@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_13
; %bb.8:
Lloh8:
	adrp	x8, _FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPAGE
Lloh9:
	ldr	x8, [x8, _FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
Lloh11:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPAGE
Lloh12:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh14:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPAGE
Lloh15:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPAGEOFF]
	b	LBB0_11
LBB0_9:
Lloh16:
	adrp	x9, _AMDGPU_FMT_DITHER_ENABLE@GOTPAGE
Lloh17:
	ldr	x9, [x9, _AMDGPU_FMT_DITHER_ENABLE@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_14
; %bb.10:
Lloh19:
	adrp	x8, _FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPAGE
Lloh20:
	ldr	x8, [x8, _FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
Lloh22:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPAGE
Lloh23:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh25:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK@GOTPAGE
Lloh26:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh28:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPAGE
Lloh29:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh31:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH_MASK@GOTPAGE
Lloh32:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH_MASK@GOTPAGEOFF]
LBB0_11:
	ldr	w9, [x9]
	orr	w1, w8, w9
	b	LBB0_15
LBB0_12:
	mov	w1, #0
	b	LBB0_15
LBB0_13:
Lloh33:
	adrp	x8, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPAGE
Lloh34:
	ldr	x8, [x8, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	b	LBB0_15
LBB0_14:
Lloh36:
	adrp	x8, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPAGE
Lloh37:
	ldr	x8, [x8, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
Lloh39:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH_MASK@GOTPAGE
Lloh40:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH_MASK@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	orr	w1, w9, w8
LBB0_15:
Lloh42:
	adrp	x8, _mmFMT_BIT_DEPTH_CONTROL@GOTPAGE
Lloh43:
	ldr	x8, [x8, _mmFMT_BIT_DEPTH_CONTROL@GOTPAGEOFF]
Lloh44:
	ldr	x8, [x8]
	ldr	x9, [x19]
	add	x0, x9, x8
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_FMT_DITHER_DISABLE,4,2  ; @AMDGPU_FMT_DITHER_DISABLE
	.comm	_ATOM_DEVICE_LCD_SUPPORT,4,2    ; @ATOM_DEVICE_LCD_SUPPORT
	.comm	_AMDGPU_FMT_DITHER_ENABLE,4,2   ; @AMDGPU_FMT_DITHER_ENABLE
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH_MASK
	.comm	_mmFMT_BIT_DEPTH_CONTROL,8,3    ; @mmFMT_BIT_DEPTH_CONTROL
	.no_dead_strip	_dce_v6_0_program_fmt
.subsections_via_symbols
