	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mmhub_v2_0_gart_enable         ## -- Begin function mmhub_v2_0_gart_enable
	.p2align	4, 0x90
_mmhub_v2_0_gart_enable:                ## @mmhub_v2_0_gart_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	callq	_amdgpu_sriov_vf
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_MMHUB@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_mmMMMC_VM_FB_LOCATION_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movsbl	3(%rbx), %ecx
	xorl	%esi, %esi
	callq	_WREG32_SOC15
	movl	(%r14), %edi
	movq	_mmMMMC_VM_FB_LOCATION_TOP@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movsbl	7(%rbx), %ecx
	xorl	%esi, %esi
	callq	_WREG32_SOC15
LBB0_2:
	movq	%rbx, %rdi
	callq	_mmhub_v2_0_init_gart_aperture_regs
	movq	%rbx, %rdi
	callq	_mmhub_v2_0_init_system_aperture_regs
	movq	%rbx, %rdi
	callq	_mmhub_v2_0_init_tlb_regs
	movq	%rbx, %rdi
	callq	_mmhub_v2_0_init_cache_regs
	movq	%rbx, %rdi
	callq	_mmhub_v2_0_enable_system_domain
	movq	%rbx, %rdi
	callq	_mmhub_v2_0_disable_identity_aperture
	movq	%rbx, %rdi
	callq	_mmhub_v2_0_setup_vmid_config
	movq	%rbx, %rdi
	callq	_mmhub_v2_0_program_invalidation
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MMHUB,4,2                      ## @MMHUB
	.comm	_mmMMMC_VM_FB_LOCATION_BASE,4,2 ## @mmMMMC_VM_FB_LOCATION_BASE
	.comm	_mmMMMC_VM_FB_LOCATION_TOP,4,2  ## @mmMMMC_VM_FB_LOCATION_TOP
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mmhub_v2_0_gart_enable         ; -- Begin function mmhub_v2_0_gart_enable
	.p2align	2
_mmhub_v2_0_gart_enable:                ; @mmhub_v2_0_gart_enable
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_amdgpu_sriov_vf
	cbz	x0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x20, _MMHUB@GOTPAGE
Lloh1:
	ldr	x20, [x20, _MMHUB@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh2:
	adrp	x8, _mmMMMC_VM_FB_LOCATION_BASE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _mmMMMC_VM_FB_LOCATION_BASE@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	ldrsb	w3, [x19, #3]
	mov	w1, #0
	bl	_WREG32_SOC15
	ldr	w0, [x20]
Lloh5:
	adrp	x8, _mmMMMC_VM_FB_LOCATION_TOP@GOTPAGE
Lloh6:
	ldr	x8, [x8, _mmMMMC_VM_FB_LOCATION_TOP@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	ldrsb	w3, [x19, #7]
	mov	w1, #0
	bl	_WREG32_SOC15
LBB0_2:
	mov	x0, x19
	bl	_mmhub_v2_0_init_gart_aperture_regs
	mov	x0, x19
	bl	_mmhub_v2_0_init_system_aperture_regs
	mov	x0, x19
	bl	_mmhub_v2_0_init_tlb_regs
	mov	x0, x19
	bl	_mmhub_v2_0_init_cache_regs
	mov	x0, x19
	bl	_mmhub_v2_0_enable_system_domain
	mov	x0, x19
	bl	_mmhub_v2_0_disable_identity_aperture
	mov	x0, x19
	bl	_mmhub_v2_0_setup_vmid_config
	mov	x0, x19
	bl	_mmhub_v2_0_program_invalidation
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MMHUB,4,2                      ; @MMHUB
	.comm	_mmMMMC_VM_FB_LOCATION_BASE,4,2 ; @mmMMMC_VM_FB_LOCATION_BASE
	.comm	_mmMMMC_VM_FB_LOCATION_TOP,4,2  ; @mmMMMC_VM_FB_LOCATION_TOP
.subsections_via_symbols
