	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_startup
_si_startup:                            ## @si_startup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_si_pcie_gen3_enable
	movq	%r14, %rdi
	callq	_si_program_aspm
	movq	%r14, %rdi
	callq	_r600_vram_scratch_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
## %bb.1:
	movq	%r14, %rdi
	callq	_si_mc_program
	cmpl	$0, 56(%r14)
	je	LBB0_2
LBB0_5:
	movq	%r14, %rdi
	callq	_si_pcie_gart_enable
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
## %bb.6:
	movq	%r14, %rdi
	callq	_si_gpu_init
	movq	(%r14), %rax
	movq	_CHIP_VERDE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_8
## %bb.7:
	movq	_verde_rlc_save_restore_register_list@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, 48(%r14)
	callq	_ARRAY_SIZE
	movq	%rax, 40(%r14)
LBB0_8:
	movq	_si_cs_data@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%r14)
	movq	%r14, %rdi
	callq	_sumo_rlc_init
	testl	%eax, %eax
	je	LBB0_10
## %bb.9:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_4
LBB0_2:
	movq	%r14, %rdi
	callq	_si_mc_load_microcode
	testl	%eax, %eax
	je	LBB0_5
## %bb.3:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rdi
LBB0_4:
	xorl	%eax, %eax
	callq	_DRM_ERROR
LBB0_23:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	movq	%r14, %rdi
	callq	_radeon_wb_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
## %bb.11:
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %r15
	movq	(%r15), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	jne	LBB0_12
## %bb.14:
	movq	_CAYMAN_RING_TYPE_CP1_INDEX@GOTPCREL(%rip), %r13
	movq	(%r13), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	jne	LBB0_12
## %bb.15:
	movq	_CAYMAN_RING_TYPE_CP2_INDEX@GOTPCREL(%rip), %r12
	movq	(%r12), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	je	LBB0_16
LBB0_12:
	movl	%eax, %ebx
	movl	8(%r14), %edi
	leaq	L_.str.2(%rip), %rsi
LBB0_13:
	movl	%ebx, %edx
	callq	_dev_err
	jmp	LBB0_23
LBB0_16:
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	jne	LBB0_17
## %bb.18:
	movq	_CAYMAN_RING_TYPE_DMA1_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	je	LBB0_19
LBB0_17:
	movl	%eax, %ebx
	movl	8(%r14), %edi
	leaq	L_.str.3(%rip), %rsi
	jmp	LBB0_13
LBB0_19:
	movq	%r14, %rdi
	callq	_si_uvd_start
	movq	%r14, %rdi
	callq	_si_vce_start
	cmpl	$0, 24(%r14)
	je	LBB0_20
LBB0_21:
	movq	%r14, %rdi
	callq	_si_irq_init
	testl	%eax, %eax
	je	LBB0_24
## %bb.22:
	movl	%eax, %ebx
	leaq	L_.str.4(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	movq	%r14, %rdi
	callq	_radeon_irq_kms_fini
	jmp	LBB0_23
LBB0_20:
	movq	%r14, %rdi
	callq	_radeon_irq_kms_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
	jmp	LBB0_21
LBB0_24:
	movq	%r14, %rdi
	callq	_si_irq_set
	movq	16(%r14), %rax
	movq	(%r15), %rcx
	leaq	(%rax,%rcx,4), %rsi
	movl	(%rax,%rcx,4), %edx
	movq	_RADEON_WB_CP_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_RADEON_CP_PACKET2@GOTPCREL(%rip), %r15
	movl	(%r15), %r8d
	movq	%r14, %rdi
	callq	_radeon_ring_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
## %bb.25:
	movq	16(%r14), %rax
	movq	(%r13), %rcx
	leaq	(%rax,%rcx,4), %rsi
	movl	(%rax,%rcx,4), %edx
	movq	_RADEON_WB_CP1_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	(%r15), %r8d
	movq	%r14, %rdi
	callq	_radeon_ring_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
## %bb.26:
	movq	16(%r14), %rax
	movq	(%r12), %rcx
	leaq	(%rax,%rcx,4), %rsi
	movl	(%rax,%rcx,4), %edx
	movq	_RADEON_WB_CP2_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	(%r15), %r8d
	movq	%r14, %rdi
	callq	_radeon_ring_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
## %bb.27:
	movq	16(%r14), %rax
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rax,%rcx,4), %r12
	movl	(%rax,%rcx,4), %r15d
	movq	_R600_WB_DMA_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_DMA_PACKET_NOP@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_DMA_PACKET
	movq	%r14, %rdi
	movq	%r12, %rsi
	movl	%r15d, %edx
	movl	%ebx, %ecx
	movl	%eax, %r8d
	callq	_radeon_ring_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
## %bb.28:
	movq	16(%r14), %rax
	movq	_CAYMAN_RING_TYPE_DMA1_INDEX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rax,%rcx,4), %r12
	movl	(%rax,%rcx,4), %r15d
	movq	_CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	(%r13), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_DMA_PACKET
	movq	%r14, %rdi
	movq	%r12, %rsi
	movl	%r15d, %edx
	movl	%ebx, %ecx
	movl	%eax, %r8d
	callq	_radeon_ring_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
## %bb.29:
	movq	%r14, %rdi
	callq	_si_cp_load_microcode
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
## %bb.30:
	movq	%r14, %rdi
	callq	_si_cp_resume
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
## %bb.31:
	movq	%r14, %rdi
	callq	_cayman_dma_resume
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_23
## %bb.32:
	movq	%r14, %rdi
	callq	_si_uvd_resume
	movq	%r14, %rdi
	callq	_si_vce_resume
	movq	%r14, %rdi
	callq	_radeon_ib_pool_init
	testl	%eax, %eax
	je	LBB0_34
## %bb.33:
	movl	%eax, %ebx
	movl	8(%r14), %edi
	leaq	L_.str.5(%rip), %rsi
	jmp	LBB0_13
LBB0_34:
	movq	%r14, %rdi
	callq	_radeon_vm_manager_init
	testl	%eax, %eax
	je	LBB0_36
## %bb.35:
	movl	%eax, %ebx
	movl	8(%r14), %edi
	leaq	L_.str.6(%rip), %rsi
	jmp	LBB0_13
LBB0_36:
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_audio_init              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to load MC firmware!\n"

	.comm	_CHIP_VERDE,8,3                 ## @CHIP_VERDE
	.comm	_verde_rlc_save_restore_register_list,4,2 ## @verde_rlc_save_restore_register_list
	.comm	_si_cs_data,4,2                 ## @si_cs_data
L_.str.1:                               ## @.str.1
	.asciz	"Failed to init rlc BOs!\n"

	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
L_.str.2:                               ## @.str.2
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_CP1_INDEX,8,3 ## @CAYMAN_RING_TYPE_CP1_INDEX
	.comm	_CAYMAN_RING_TYPE_CP2_INDEX,8,3 ## @CAYMAN_RING_TYPE_CP2_INDEX
	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ## @R600_RING_TYPE_DMA_INDEX
L_.str.3:                               ## @.str.3
	.asciz	"failed initializing DMA fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ## @CAYMAN_RING_TYPE_DMA1_INDEX
L_.str.4:                               ## @.str.4
	.asciz	"radeon: IH init failed (%d).\n"

	.comm	_RADEON_WB_CP_RPTR_OFFSET,4,2   ## @RADEON_WB_CP_RPTR_OFFSET
	.comm	_RADEON_CP_PACKET2,4,2          ## @RADEON_CP_PACKET2
	.comm	_RADEON_WB_CP1_RPTR_OFFSET,4,2  ## @RADEON_WB_CP1_RPTR_OFFSET
	.comm	_RADEON_WB_CP2_RPTR_OFFSET,4,2  ## @RADEON_WB_CP2_RPTR_OFFSET
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ## @R600_WB_DMA_RPTR_OFFSET
	.comm	_DMA_PACKET_NOP,4,2             ## @DMA_PACKET_NOP
	.comm	_CAYMAN_WB_DMA1_RPTR_OFFSET,4,2 ## @CAYMAN_WB_DMA1_RPTR_OFFSET
L_.str.5:                               ## @.str.5
	.asciz	"IB initialization failed (%d).\n"

L_.str.6:                               ## @.str.6
	.asciz	"vm manager initialization failed (%d).\n"

	.no_dead_strip	_si_startup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_startup
_si_startup:                            ; @si_startup
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	bl	_si_pcie_gen3_enable
	mov	x0, x19
	bl	_si_program_aspm
	mov	x0, x19
	bl	_r600_vram_scratch_init
	mov	x20, x0
	cbnz	w0, LBB0_10
; %bb.1:
	mov	x0, x19
	bl	_si_mc_program
	ldr	w8, [x19, #56]
	cbz	w8, LBB0_7
LBB0_2:
	mov	x0, x19
	bl	_si_pcie_gart_enable
	mov	x20, x0
	cbnz	w0, LBB0_10
; %bb.3:
	mov	x0, x19
	bl	_si_gpu_init
	ldr	x8, [x19]
Lloh0:
	adrp	x9, _CHIP_VERDE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_VERDE@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_5
; %bb.4:
Lloh3:
	adrp	x8, _verde_rlc_save_restore_register_list@GOTPAGE
Lloh4:
	ldr	x8, [x8, _verde_rlc_save_restore_register_list@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	str	w0, [x19, #48]
	bl	_ARRAY_SIZE
	str	x0, [x19, #40]
LBB0_5:
Lloh6:
	adrp	x8, _si_cs_data@GOTPAGE
Lloh7:
	ldr	x8, [x8, _si_cs_data@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	str	w8, [x19, #32]
	mov	x0, x19
	bl	_sumo_rlc_init
	cbz	w0, LBB0_11
; %bb.6:
	mov	x20, x0
Lloh9:
	adrp	x0, l_.str.1@PAGE
Lloh10:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_9
LBB0_7:
	mov	x0, x19
	bl	_si_mc_load_microcode
	cbz	w0, LBB0_2
; %bb.8:
	mov	x20, x0
Lloh11:
	adrp	x0, l_.str@PAGE
Lloh12:
	add	x0, x0, l_.str@PAGEOFF
LBB0_9:
	bl	_DRM_ERROR
LBB0_10:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_11:
	mov	x0, x19
	bl	_radeon_wb_init
	mov	x20, x0
	cbnz	w0, LBB0_10
; %bb.12:
Lloh13:
	adrp	x21, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh14:
	ldr	x21, [x21, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
	ldr	x1, [x21]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbnz	w0, LBB0_15
; %bb.13:
Lloh15:
	adrp	x24, _CAYMAN_RING_TYPE_CP1_INDEX@GOTPAGE
Lloh16:
	ldr	x24, [x24, _CAYMAN_RING_TYPE_CP1_INDEX@GOTPAGEOFF]
	ldr	x1, [x24]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbnz	w0, LBB0_15
; %bb.14:
Lloh17:
	adrp	x23, _CAYMAN_RING_TYPE_CP2_INDEX@GOTPAGE
Lloh18:
	ldr	x23, [x23, _CAYMAN_RING_TYPE_CP2_INDEX@GOTPAGEOFF]
	ldr	x1, [x23]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbz	w0, LBB0_17
LBB0_15:
	mov	x20, x0
	ldr	w0, [x19, #8]
Lloh19:
	adrp	x1, l_.str.2@PAGE
Lloh20:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_16:
	mov	x2, x20
	bl	_dev_err
	b	LBB0_10
LBB0_17:
Lloh21:
	adrp	x22, _R600_RING_TYPE_DMA_INDEX@GOTPAGE
Lloh22:
	ldr	x22, [x22, _R600_RING_TYPE_DMA_INDEX@GOTPAGEOFF]
	ldr	x1, [x22]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbnz	w0, LBB0_19
; %bb.18:
Lloh23:
	adrp	x8, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGE
Lloh24:
	ldr	x8, [x8, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGEOFF]
Lloh25:
	ldr	x1, [x8]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbz	w0, LBB0_20
LBB0_19:
	mov	x20, x0
	ldr	w0, [x19, #8]
Lloh26:
	adrp	x1, l_.str.3@PAGE
Lloh27:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_16
LBB0_20:
	mov	x0, x19
	bl	_si_uvd_start
	mov	x0, x19
	bl	_si_vce_start
	ldr	w8, [x19, #24]
	cbz	w8, LBB0_23
LBB0_21:
	mov	x0, x19
	bl	_si_irq_init
	cbz	w0, LBB0_24
; %bb.22:
	mov	x20, x0
	str	x20, [sp]
Lloh28:
	adrp	x0, l_.str.4@PAGE
Lloh29:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_DRM_ERROR
	mov	x0, x19
	bl	_radeon_irq_kms_fini
	b	LBB0_10
LBB0_23:
	mov	x0, x19
	bl	_radeon_irq_kms_init
	mov	x20, x0
	cbnz	w0, LBB0_10
	b	LBB0_21
LBB0_24:
	mov	x0, x19
	bl	_si_irq_set
	ldr	x8, [x19, #16]
	ldr	x9, [x21]
	add	x1, x8, x9, lsl #2
	ldr	w2, [x1]
Lloh30:
	adrp	x8, _RADEON_WB_CP_RPTR_OFFSET@GOTPAGE
Lloh31:
	ldr	x8, [x8, _RADEON_WB_CP_RPTR_OFFSET@GOTPAGEOFF]
Lloh32:
	ldr	w3, [x8]
Lloh33:
	adrp	x21, _RADEON_CP_PACKET2@GOTPAGE
Lloh34:
	ldr	x21, [x21, _RADEON_CP_PACKET2@GOTPAGEOFF]
	ldr	w4, [x21]
	mov	x0, x19
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_10
; %bb.25:
	ldr	x8, [x19, #16]
	ldr	x9, [x24]
	add	x1, x8, x9, lsl #2
	ldr	w2, [x1]
Lloh35:
	adrp	x8, _RADEON_WB_CP1_RPTR_OFFSET@GOTPAGE
Lloh36:
	ldr	x8, [x8, _RADEON_WB_CP1_RPTR_OFFSET@GOTPAGEOFF]
Lloh37:
	ldr	w3, [x8]
	ldr	w4, [x21]
	mov	x0, x19
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_10
; %bb.26:
	ldr	x8, [x19, #16]
	ldr	x9, [x23]
	add	x1, x8, x9, lsl #2
	ldr	w2, [x1]
Lloh38:
	adrp	x8, _RADEON_WB_CP2_RPTR_OFFSET@GOTPAGE
Lloh39:
	ldr	x8, [x8, _RADEON_WB_CP2_RPTR_OFFSET@GOTPAGEOFF]
Lloh40:
	ldr	w3, [x8]
	ldr	w4, [x21]
	mov	x0, x19
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_10
; %bb.27:
	ldr	x8, [x19, #16]
	ldr	x9, [x22]
	add	x20, x8, x9, lsl #2
	ldr	w23, [x20]
Lloh41:
	adrp	x8, _R600_WB_DMA_RPTR_OFFSET@GOTPAGE
Lloh42:
	ldr	x8, [x8, _R600_WB_DMA_RPTR_OFFSET@GOTPAGEOFF]
Lloh43:
	ldr	w22, [x8]
Lloh44:
	adrp	x24, _DMA_PACKET_NOP@GOTPAGE
Lloh45:
	ldr	x24, [x24, _DMA_PACKET_NOP@GOTPAGEOFF]
	ldr	w0, [x24]
	mov	w1, #0
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	bl	_DMA_PACKET
	mov	x4, x0
	mov	x0, x19
	mov	x1, x20
	mov	x2, x23
	mov	x3, x22
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_10
; %bb.28:
	ldr	x9, [x19, #16]
Lloh46:
	adrp	x8, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGE
Lloh47:
	ldr	x8, [x8, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGEOFF]
Lloh48:
	ldr	x8, [x8]
	add	x20, x9, x8, lsl #2
	ldr	w21, [x20]
Lloh49:
	adrp	x8, _CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPAGE
Lloh50:
	ldr	x8, [x8, _CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPAGEOFF]
Lloh51:
	ldr	w22, [x8]
	ldr	w0, [x24]
	mov	w1, #0
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	bl	_DMA_PACKET
	mov	x4, x0
	mov	x0, x19
	mov	x1, x20
	mov	x2, x21
	mov	x3, x22
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_10
; %bb.29:
	mov	x0, x19
	bl	_si_cp_load_microcode
	mov	x20, x0
	cbnz	w0, LBB0_10
; %bb.30:
	mov	x0, x19
	bl	_si_cp_resume
	mov	x20, x0
	cbnz	w0, LBB0_10
; %bb.31:
	mov	x0, x19
	bl	_cayman_dma_resume
	mov	x20, x0
	cbnz	w0, LBB0_10
; %bb.32:
	mov	x0, x19
	bl	_si_uvd_resume
	mov	x0, x19
	bl	_si_vce_resume
	mov	x0, x19
	bl	_radeon_ib_pool_init
	cbz	w0, LBB0_34
; %bb.33:
	mov	x20, x0
	ldr	w0, [x19, #8]
Lloh52:
	adrp	x1, l_.str.5@PAGE
Lloh53:
	add	x1, x1, l_.str.5@PAGEOFF
	b	LBB0_16
LBB0_34:
	mov	x0, x19
	bl	_radeon_vm_manager_init
	cbz	w0, LBB0_36
; %bb.35:
	mov	x20, x0
	ldr	w0, [x19, #8]
Lloh54:
	adrp	x1, l_.str.6@PAGE
Lloh55:
	add	x1, x1, l_.str.6@PAGEOFF
	b	LBB0_16
LBB0_36:
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_radeon_audio_init
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpAdd	Lloh52, Lloh53
	.loh AdrpAdd	Lloh54, Lloh55
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to load MC firmware!\n"

	.comm	_CHIP_VERDE,8,3                 ; @CHIP_VERDE
	.comm	_verde_rlc_save_restore_register_list,4,2 ; @verde_rlc_save_restore_register_list
	.comm	_si_cs_data,4,2                 ; @si_cs_data
l_.str.1:                               ; @.str.1
	.asciz	"Failed to init rlc BOs!\n"

	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
l_.str.2:                               ; @.str.2
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_CP1_INDEX,8,3 ; @CAYMAN_RING_TYPE_CP1_INDEX
	.comm	_CAYMAN_RING_TYPE_CP2_INDEX,8,3 ; @CAYMAN_RING_TYPE_CP2_INDEX
	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ; @R600_RING_TYPE_DMA_INDEX
l_.str.3:                               ; @.str.3
	.asciz	"failed initializing DMA fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ; @CAYMAN_RING_TYPE_DMA1_INDEX
l_.str.4:                               ; @.str.4
	.asciz	"radeon: IH init failed (%d).\n"

	.comm	_RADEON_WB_CP_RPTR_OFFSET,4,2   ; @RADEON_WB_CP_RPTR_OFFSET
	.comm	_RADEON_CP_PACKET2,4,2          ; @RADEON_CP_PACKET2
	.comm	_RADEON_WB_CP1_RPTR_OFFSET,4,2  ; @RADEON_WB_CP1_RPTR_OFFSET
	.comm	_RADEON_WB_CP2_RPTR_OFFSET,4,2  ; @RADEON_WB_CP2_RPTR_OFFSET
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ; @R600_WB_DMA_RPTR_OFFSET
	.comm	_DMA_PACKET_NOP,4,2             ; @DMA_PACKET_NOP
	.comm	_CAYMAN_WB_DMA1_RPTR_OFFSET,4,2 ; @CAYMAN_WB_DMA1_RPTR_OFFSET
l_.str.5:                               ; @.str.5
	.asciz	"IB initialization failed (%d).\n"

l_.str.6:                               ; @.str.6
	.asciz	"vm manager initialization failed (%d).\n"

	.no_dead_strip	_si_startup
.subsections_via_symbols
