	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vlv_disable_pll
_vlv_disable_pll:                       ## @vlv_disable_pll
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %r14d
	callq	_assert_pipe_disabled
	movq	_DPLL_INTEGRATED_REF_CLK_VLV@GOTPCREL(%rip), %rax
	movq	_DPLL_REF_CLK_ENABLE_VLV@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	_DPLL_VGA_MODE_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_A@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	cmpl	%r14d, (%rcx)
	je	LBB0_2
## %bb.1:
	movq	_DPLL_INTEGRATED_CRI_CLK_VLV@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_2:
	orl	%eax, %ebx
	movl	%r14d, %edi
	callq	_DPLL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	%r14d, %edi
	callq	_DPLL
	movl	%eax, %edi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_POSTING_READ                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DPLL_INTEGRATED_REF_CLK_VLV,4,2 ## @DPLL_INTEGRATED_REF_CLK_VLV
	.comm	_DPLL_REF_CLK_ENABLE_VLV,4,2    ## @DPLL_REF_CLK_ENABLE_VLV
	.comm	_DPLL_VGA_MODE_DIS,4,2          ## @DPLL_VGA_MODE_DIS
	.comm	_PIPE_A,4,2                     ## @PIPE_A
	.comm	_DPLL_INTEGRATED_CRI_CLK_VLV,4,2 ## @DPLL_INTEGRATED_CRI_CLK_VLV
	.no_dead_strip	_vlv_disable_pll
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vlv_disable_pll
_vlv_disable_pll:                       ; @vlv_disable_pll
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	bl	_assert_pipe_disabled
Lloh0:
	adrp	x8, _DPLL_INTEGRATED_REF_CLK_VLV@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DPLL_INTEGRATED_REF_CLK_VLV@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _DPLL_REF_CLK_ENABLE_VLV@GOTPAGE
Lloh4:
	ldr	x9, [x9, _DPLL_REF_CLK_ENABLE_VLV@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
Lloh6:
	adrp	x10, _DPLL_VGA_MODE_DIS@GOTPAGE
Lloh7:
	ldr	x10, [x10, _DPLL_VGA_MODE_DIS@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh8:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh9:
	adrp	x9, _PIPE_A@GOTPAGE
Lloh10:
	ldr	x9, [x9, _PIPE_A@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
Lloh12:
	adrp	x10, _DPLL_INTEGRATED_CRI_CLK_VLV@GOTPAGE
Lloh13:
	ldr	x10, [x10, _DPLL_INTEGRATED_CRI_CLK_VLV@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
	cmp	w9, w19
	csel	w9, wzr, w10, eq
	orr	w20, w8, w9
	mov	x0, x19
	bl	_DPLL
	mov	x1, x20
	bl	_I915_WRITE
	mov	x0, x19
	bl	_DPLL
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_POSTING_READ
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_DPLL_INTEGRATED_REF_CLK_VLV,4,2 ; @DPLL_INTEGRATED_REF_CLK_VLV
	.comm	_DPLL_REF_CLK_ENABLE_VLV,4,2    ; @DPLL_REF_CLK_ENABLE_VLV
	.comm	_DPLL_VGA_MODE_DIS,4,2          ; @DPLL_VGA_MODE_DIS
	.comm	_PIPE_A,4,2                     ; @PIPE_A
	.comm	_DPLL_INTEGRATED_CRI_CLK_VLV,4,2 ; @DPLL_INTEGRATED_CRI_CLK_VLV
	.no_dead_strip	_vlv_disable_pll
.subsections_via_symbols
