	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v10_0_ring_emit_wreg
_gfx_v10_0_ring_emit_wreg:              ## @gfx_v10_0_ring_emit_wreg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movl	%esi, %r15d
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movl	(%rax), %eax
	cmpl	$128, %eax
	je	LBB0_1
## %bb.2:
	cmpl	$129, %eax
	jne	LBB0_4
## %bb.3:
	movl	$1, %edi
	callq	_WRITE_DATA_ENGINE_SEL
	movl	%eax, %r12d
	movq	_WR_CONFIRM@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	jmp	LBB0_5
LBB0_1:
	movl	$65536, %r12d                   ## imm = 0x10000
	jmp	LBB0_5
LBB0_4:
	movq	_WR_CONFIRM@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
LBB0_5:
	movq	_PACKET3_WRITE_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$3, %esi
	callq	_PACKET3
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%rbx, %rdi
	movl	%r12d, %esi
	callq	_amdgpu_ring_write
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_amdgpu_ring_write
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%rbx, %rdi
	movl	%r14d, %esi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_WR_CONFIRM,4,2                 ## @WR_CONFIRM
	.comm	_PACKET3_WRITE_DATA,4,2         ## @PACKET3_WRITE_DATA
	.no_dead_strip	_gfx_v10_0_ring_emit_wreg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v10_0_ring_emit_wreg
_gfx_v10_0_ring_emit_wreg:              ; @gfx_v10_0_ring_emit_wreg
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x21, x1
	mov	x20, x0
	ldr	x8, [x0]
	ldr	w8, [x8]
	cmp	w8, #128
	b.eq	LBB0_3
; %bb.1:
	cmp	w8, #129
	b.ne	LBB0_4
; %bb.2:
	mov	w0, #1
	bl	_WRITE_DATA_ENGINE_SEL
Lloh0:
	adrp	x8, _WR_CONFIRM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _WR_CONFIRM@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	orr	w22, w8, w0
	b	LBB0_5
LBB0_3:
	mov	w22, #65536
	b	LBB0_5
LBB0_4:
Lloh3:
	adrp	x8, _WR_CONFIRM@GOTPAGE
Lloh4:
	ldr	x8, [x8, _WR_CONFIRM@GOTPAGEOFF]
Lloh5:
	ldr	w22, [x8]
LBB0_5:
Lloh6:
	adrp	x8, _PACKET3_WRITE_DATA@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PACKET3_WRITE_DATA@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	mov	w1, #3
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x20
	bl	_amdgpu_ring_write
	mov	x0, x20
	mov	x1, x22
	bl	_amdgpu_ring_write
	mov	x0, x20
	mov	x1, x21
	bl	_amdgpu_ring_write
	mov	x0, x20
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_WR_CONFIRM,4,2                 ; @WR_CONFIRM
	.comm	_PACKET3_WRITE_DATA,4,2         ; @PACKET3_WRITE_DATA
	.no_dead_strip	_gfx_v10_0_ring_emit_wreg
.subsections_via_symbols
