	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function evergreen_startup
_evergreen_startup:                     ## @evergreen_startup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_evergreen_pcie_gen2_enable
	movq	%rbx, %rdi
	callq	_evergreen_program_aspm
	movq	%rbx, %rdi
	callq	_r600_vram_scratch_init
	movl	%eax, %r14d
	testl	%eax, %eax
	je	LBB0_1
LBB0_32:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	%rbx, %rdi
	callq	_evergreen_mc_program
	movq	%rbx, %rdi
	callq	_ASIC_IS_DCE5
	testq	%rax, %rax
	je	LBB0_5
## %bb.2:
	cmpl	$0, 48(%rbx)
	je	LBB0_3
LBB0_5:
	movq	_RADEON_IS_AGP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_7
## %bb.6:
	movq	%rbx, %rdi
	callq	_evergreen_agp_enable
LBB0_8:
	movq	%rbx, %rdi
	callq	_evergreen_gpu_init
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_11
## %bb.9:
	movq	_sumo_rlc_save_restore_register_list@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, 40(%rbx)
	callq	_ARRAY_SIZE
	movq	%rax, 32(%rbx)
	movq	_evergreen_cs_data@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rbx)
	movq	%rbx, %rdi
	callq	_sumo_rlc_init
	testl	%eax, %eax
	je	LBB0_11
## %bb.10:
	movl	%eax, %r14d
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_31
LBB0_11:
	movq	%rbx, %rdi
	callq	_radeon_wb_init
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_32
## %bb.12:
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %r12
	movq	(%r12), %rsi
	movq	%rbx, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	je	LBB0_15
## %bb.13:
	movl	%eax, %r14d
	movl	4(%rbx), %edi
	leaq	L_.str.2(%rip), %rsi
	jmp	LBB0_14
LBB0_7:
	movq	%rbx, %rdi
	callq	_evergreen_pcie_gart_enable
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_32
	jmp	LBB0_8
LBB0_3:
	movq	%rbx, %rdi
	callq	_ni_mc_load_microcode
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	movl	%eax, %r14d
	leaq	L_.str(%rip), %rdi
LBB0_31:
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_32
LBB0_15:
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %r15
	movq	(%r15), %rsi
	movq	%rbx, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	je	LBB0_17
## %bb.16:
	movl	%eax, %r14d
	movl	4(%rbx), %edi
	leaq	L_.str.3(%rip), %rsi
LBB0_14:
	movl	%r14d, %edx
	callq	_dev_err
	jmp	LBB0_32
LBB0_17:
	movq	%rbx, %rdi
	callq	_evergreen_uvd_start
	cmpl	$0, 16(%rbx)
	je	LBB0_18
LBB0_19:
	movq	%rbx, %rdi
	callq	_r600_irq_init
	testl	%eax, %eax
	je	LBB0_21
## %bb.20:
	movl	%eax, %r14d
	leaq	L_.str.4(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	movq	%rbx, %rdi
	callq	_radeon_irq_kms_fini
	jmp	LBB0_32
LBB0_18:
	movq	%rbx, %rdi
	callq	_radeon_irq_kms_init
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_32
	jmp	LBB0_19
LBB0_21:
	movq	%rbx, %rdi
	callq	_evergreen_irq_set
	movq	8(%rbx), %rax
	movq	(%r12), %rcx
	leaq	(%rax,%rcx,4), %rsi
	movl	(%rax,%rcx,4), %edx
	movq	_RADEON_WB_CP_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_RADEON_CP_PACKET2@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%rbx, %rdi
	callq	_radeon_ring_init
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_32
## %bb.22:
	movq	8(%rbx), %rax
	movq	(%r15), %rcx
	leaq	(%rax,%rcx,4), %r14
	movl	(%rax,%rcx,4), %r15d
	movq	_R600_WB_DMA_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_DMA_PACKET_NOP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_DMA_PACKET
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	%r15d, %edx
	movl	%r12d, %ecx
	movl	%eax, %r8d
	callq	_radeon_ring_init
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_32
## %bb.23:
	movq	%rbx, %rdi
	callq	_evergreen_cp_load_microcode
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_32
## %bb.24:
	movq	%rbx, %rdi
	callq	_evergreen_cp_resume
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_32
## %bb.25:
	movq	%rbx, %rdi
	callq	_r600_dma_resume
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_32
## %bb.26:
	movq	%rbx, %rdi
	callq	_evergreen_uvd_resume
	movq	%rbx, %rdi
	callq	_radeon_ib_pool_init
	testl	%eax, %eax
	je	LBB0_28
## %bb.27:
	movl	%eax, %r14d
	movl	4(%rbx), %edi
	leaq	L_.str.5(%rip), %rsi
	jmp	LBB0_14
LBB0_28:
	movq	%rbx, %rdi
	callq	_radeon_audio_init
	testl	%eax, %eax
	je	LBB0_29
## %bb.30:
	movl	%eax, %r14d
	leaq	L_.str.6(%rip), %rdi
	jmp	LBB0_31
LBB0_29:
	xorl	%r14d, %r14d
	jmp	LBB0_32
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to load MC firmware!\n"

	.comm	_RADEON_IS_AGP,4,2              ## @RADEON_IS_AGP
	.comm	_RADEON_IS_IGP,4,2              ## @RADEON_IS_IGP
	.comm	_sumo_rlc_save_restore_register_list,4,2 ## @sumo_rlc_save_restore_register_list
	.comm	_evergreen_cs_data,4,2          ## @evergreen_cs_data
L_.str.1:                               ## @.str.1
	.asciz	"Failed to init rlc BOs!\n"

	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
L_.str.2:                               ## @.str.2
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ## @R600_RING_TYPE_DMA_INDEX
L_.str.3:                               ## @.str.3
	.asciz	"failed initializing DMA fences (%d).\n"

L_.str.4:                               ## @.str.4
	.asciz	"radeon: IH init failed (%d).\n"

	.comm	_RADEON_WB_CP_RPTR_OFFSET,4,2   ## @RADEON_WB_CP_RPTR_OFFSET
	.comm	_RADEON_CP_PACKET2,4,2          ## @RADEON_CP_PACKET2
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ## @R600_WB_DMA_RPTR_OFFSET
	.comm	_DMA_PACKET_NOP,4,2             ## @DMA_PACKET_NOP
L_.str.5:                               ## @.str.5
	.asciz	"IB initialization failed (%d).\n"

L_.str.6:                               ## @.str.6
	.asciz	"radeon: audio init failed\n"

	.no_dead_strip	_evergreen_startup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function evergreen_startup
_evergreen_startup:                     ; @evergreen_startup
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_evergreen_pcie_gen2_enable
	mov	x0, x19
	bl	_evergreen_program_aspm
	mov	x0, x19
	bl	_r600_vram_scratch_init
	mov	x20, x0
	cbz	w0, LBB0_2
LBB0_1:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_2:
	mov	x0, x19
	bl	_evergreen_mc_program
	mov	x0, x19
	bl	_ASIC_IS_DCE5
	cbz	x0, LBB0_4
; %bb.3:
	ldr	w8, [x19, #48]
	cbz	w8, LBB0_13
LBB0_4:
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _RADEON_IS_AGP@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_IS_AGP@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	mov	x0, x19
	tst	w9, w8
	b.eq	LBB0_12
; %bb.5:
	bl	_evergreen_agp_enable
LBB0_6:
	mov	x0, x19
	bl	_evergreen_gpu_init
	ldr	w8, [x19]
Lloh3:
	adrp	x9, _RADEON_IS_IGP@GOTPAGE
Lloh4:
	ldr	x9, [x9, _RADEON_IS_IGP@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.7:
Lloh6:
	adrp	x8, _sumo_rlc_save_restore_register_list@GOTPAGE
Lloh7:
	ldr	x8, [x8, _sumo_rlc_save_restore_register_list@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	str	w0, [x19, #40]
	bl	_ARRAY_SIZE
	str	x0, [x19, #32]
Lloh9:
	adrp	x8, _evergreen_cs_data@GOTPAGE
Lloh10:
	ldr	x8, [x8, _evergreen_cs_data@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	str	w8, [x19, #24]
	mov	x0, x19
	bl	_sumo_rlc_init
	cbz	w0, LBB0_9
; %bb.8:
	mov	x20, x0
Lloh12:
	adrp	x0, l_.str.1@PAGE
Lloh13:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_15
LBB0_9:
	mov	x0, x19
	bl	_radeon_wb_init
	mov	x20, x0
	cbnz	w0, LBB0_1
; %bb.10:
Lloh14:
	adrp	x22, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh15:
	ldr	x22, [x22, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
	ldr	x1, [x22]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbz	w0, LBB0_16
; %bb.11:
	mov	x20, x0
	ldr	w0, [x19, #4]
Lloh16:
	adrp	x1, l_.str.2@PAGE
Lloh17:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_18
LBB0_12:
	bl	_evergreen_pcie_gart_enable
	mov	x20, x0
	cbnz	w0, LBB0_1
	b	LBB0_6
LBB0_13:
	mov	x0, x19
	bl	_ni_mc_load_microcode
	cbz	w0, LBB0_4
; %bb.14:
	mov	x20, x0
Lloh18:
	adrp	x0, l_.str@PAGE
Lloh19:
	add	x0, x0, l_.str@PAGEOFF
LBB0_15:
	bl	_DRM_ERROR
	b	LBB0_1
LBB0_16:
Lloh20:
	adrp	x21, _R600_RING_TYPE_DMA_INDEX@GOTPAGE
Lloh21:
	ldr	x21, [x21, _R600_RING_TYPE_DMA_INDEX@GOTPAGEOFF]
	ldr	x1, [x21]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbz	w0, LBB0_19
; %bb.17:
	mov	x20, x0
	ldr	w0, [x19, #4]
Lloh22:
	adrp	x1, l_.str.3@PAGE
Lloh23:
	add	x1, x1, l_.str.3@PAGEOFF
LBB0_18:
	mov	x2, x20
	bl	_dev_err
	b	LBB0_1
LBB0_19:
	mov	x0, x19
	bl	_evergreen_uvd_start
	ldr	w8, [x19, #16]
	cbz	w8, LBB0_22
LBB0_20:
	mov	x0, x19
	bl	_r600_irq_init
	cbz	w0, LBB0_23
; %bb.21:
	mov	x20, x0
	str	x20, [sp]
Lloh24:
	adrp	x0, l_.str.4@PAGE
Lloh25:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_DRM_ERROR
	mov	x0, x19
	bl	_radeon_irq_kms_fini
	b	LBB0_1
LBB0_22:
	mov	x0, x19
	bl	_radeon_irq_kms_init
	mov	x20, x0
	cbnz	w0, LBB0_1
	b	LBB0_20
LBB0_23:
	mov	x0, x19
	bl	_evergreen_irq_set
	ldr	x8, [x19, #8]
	ldr	x9, [x22]
	add	x1, x8, x9, lsl #2
	ldr	w2, [x1]
Lloh26:
	adrp	x8, _RADEON_WB_CP_RPTR_OFFSET@GOTPAGE
Lloh27:
	ldr	x8, [x8, _RADEON_WB_CP_RPTR_OFFSET@GOTPAGEOFF]
Lloh28:
	ldr	w3, [x8]
Lloh29:
	adrp	x8, _RADEON_CP_PACKET2@GOTPAGE
Lloh30:
	ldr	x8, [x8, _RADEON_CP_PACKET2@GOTPAGEOFF]
Lloh31:
	ldr	w4, [x8]
	mov	x0, x19
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_1
; %bb.24:
	ldr	x8, [x19, #8]
	ldr	x9, [x21]
	add	x20, x8, x9, lsl #2
	ldr	w21, [x20]
Lloh32:
	adrp	x8, _R600_WB_DMA_RPTR_OFFSET@GOTPAGE
Lloh33:
	ldr	x8, [x8, _R600_WB_DMA_RPTR_OFFSET@GOTPAGEOFF]
Lloh34:
	ldr	w22, [x8]
Lloh35:
	adrp	x8, _DMA_PACKET_NOP@GOTPAGE
Lloh36:
	ldr	x8, [x8, _DMA_PACKET_NOP@GOTPAGEOFF]
Lloh37:
	ldr	w0, [x8]
	mov	w1, #0
	mov	w2, #0
	bl	_DMA_PACKET
	mov	x4, x0
	mov	x0, x19
	mov	x1, x20
	mov	x2, x21
	mov	x3, x22
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_1
; %bb.25:
	mov	x0, x19
	bl	_evergreen_cp_load_microcode
	mov	x20, x0
	cbnz	w0, LBB0_1
; %bb.26:
	mov	x0, x19
	bl	_evergreen_cp_resume
	mov	x20, x0
	cbnz	w0, LBB0_1
; %bb.27:
	mov	x0, x19
	bl	_r600_dma_resume
	mov	x20, x0
	cbnz	w0, LBB0_1
; %bb.28:
	mov	x0, x19
	bl	_evergreen_uvd_resume
	mov	x0, x19
	bl	_radeon_ib_pool_init
	cbz	w0, LBB0_30
; %bb.29:
	mov	x20, x0
	ldr	w0, [x19, #4]
Lloh38:
	adrp	x1, l_.str.5@PAGE
Lloh39:
	add	x1, x1, l_.str.5@PAGEOFF
	b	LBB0_18
LBB0_30:
	mov	x0, x19
	bl	_radeon_audio_init
	mov	x20, x0
	cbz	w0, LBB0_1
; %bb.31:
Lloh40:
	adrp	x0, l_.str.6@PAGE
Lloh41:
	add	x0, x0, l_.str.6@PAGEOFF
	b	LBB0_15
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpAdd	Lloh40, Lloh41
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to load MC firmware!\n"

	.comm	_RADEON_IS_AGP,4,2              ; @RADEON_IS_AGP
	.comm	_RADEON_IS_IGP,4,2              ; @RADEON_IS_IGP
	.comm	_sumo_rlc_save_restore_register_list,4,2 ; @sumo_rlc_save_restore_register_list
	.comm	_evergreen_cs_data,4,2          ; @evergreen_cs_data
l_.str.1:                               ; @.str.1
	.asciz	"Failed to init rlc BOs!\n"

	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
l_.str.2:                               ; @.str.2
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ; @R600_RING_TYPE_DMA_INDEX
l_.str.3:                               ; @.str.3
	.asciz	"failed initializing DMA fences (%d).\n"

l_.str.4:                               ; @.str.4
	.asciz	"radeon: IH init failed (%d).\n"

	.comm	_RADEON_WB_CP_RPTR_OFFSET,4,2   ; @RADEON_WB_CP_RPTR_OFFSET
	.comm	_RADEON_CP_PACKET2,4,2          ; @RADEON_CP_PACKET2
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ; @R600_WB_DMA_RPTR_OFFSET
	.comm	_DMA_PACKET_NOP,4,2             ; @DMA_PACKET_NOP
l_.str.5:                               ; @.str.5
	.asciz	"IB initialization failed (%d).\n"

l_.str.6:                               ; @.str.6
	.asciz	"radeon: audio init failed\n"

	.no_dead_strip	_evergreen_startup
.subsections_via_symbols
