	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_device_handle_px_quirks
_radeon_device_handle_px_quirks:        ## @radeon_device_handle_px_quirks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	_radeon_px_quirk_list@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	testq	%rax, %rax
	je	LBB0_9
## %bb.1:
	movq	(%rax), %rsi
	testq	%rsi, %rsi
	je	LBB0_9
## %bb.2:
	movq	8(%rbx), %rcx
	movq	(%rcx), %rdx
	addq	$40, %rax
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_8:                                 ##   in Loop: Header=BB0_3 Depth=1
	movq	(%rax), %rsi
	addq	$40, %rax
	testq	%rsi, %rsi
	je	LBB0_9
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	cmpq	-32(%rax), %rdx
	jne	LBB0_8
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	cmpq	%rsi, 8(%rcx)
	jne	LBB0_8
## %bb.5:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	16(%rcx), %rsi
	cmpq	-24(%rax), %rsi
	jne	LBB0_8
## %bb.6:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	24(%rcx), %rsi
	cmpq	-16(%rax), %rsi
	jne	LBB0_8
## %bb.7:
	movl	-8(%rax), %eax
	movl	%eax, (%rbx)
LBB0_9:
	movq	_RADEON_PX_QUIRK_DISABLE_PX@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_11
## %bb.10:
	movq	_RADEON_IS_PX@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 4(%rbx)
LBB0_11:
	xorl	%eax, %eax
	callq	_radeon_is_atpx_hybrid
	testl	%eax, %eax
	jne	LBB0_14
## %bb.12:
	xorl	%eax, %eax
	callq	_radeon_has_atpx_dgpu_power_cntl
	testl	%eax, %eax
	jne	LBB0_14
## %bb.13:
	movq	_RADEON_IS_PX@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 4(%rbx)
LBB0_14:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_radeon_px_quirk_list,8,3       ## @radeon_px_quirk_list
	.comm	_RADEON_PX_QUIRK_DISABLE_PX,4,2 ## @RADEON_PX_QUIRK_DISABLE_PX
	.comm	_RADEON_IS_PX,4,2               ## @RADEON_IS_PX
	.no_dead_strip	_radeon_device_handle_px_quirks
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_device_handle_px_quirks
_radeon_device_handle_px_quirks:        ; @radeon_device_handle_px_quirks
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _radeon_px_quirk_list@GOTPAGE
Lloh1:
	ldr	x8, [x8, _radeon_px_quirk_list@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x8]
	cbz	x9, LBB0_9
; %bb.1:
	ldr	x11, [x9]
	cbz	x11, LBB0_9
; %bb.2:
	ldr	x8, [x19, #8]
	ldr	x10, [x8]
	add	x9, x9, #24
	b	LBB0_4
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	x11, [x9, #16]
	add	x9, x9, #40
	cbz	x11, LBB0_9
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldur	x12, [x9, #-16]
	cmp	x10, x12
	b.ne	LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	x12, [x8, #8]
	cmp	x12, x11
	b.ne	LBB0_3
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	x11, [x8, #16]
	ldur	x12, [x9, #-8]
	cmp	x11, x12
	b.ne	LBB0_3
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	x11, [x8, #24]
	ldr	x12, [x9]
	cmp	x11, x12
	b.ne	LBB0_3
; %bb.8:
	ldr	w8, [x9, #8]
	str	w8, [x19]
LBB0_9:
	ldr	w8, [x19]
Lloh3:
	adrp	x9, _RADEON_PX_QUIRK_DISABLE_PX@GOTPAGE
Lloh4:
	ldr	x9, [x9, _RADEON_PX_QUIRK_DISABLE_PX@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_11
; %bb.10:
Lloh6:
	adrp	x8, _RADEON_IS_PX@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RADEON_IS_PX@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	ldr	w9, [x19, #4]
	bic	w8, w9, w8
	str	w8, [x19, #4]
LBB0_11:
	bl	_radeon_is_atpx_hybrid
	cbnz	w0, LBB0_14
; %bb.12:
	bl	_radeon_has_atpx_dgpu_power_cntl
	cbnz	w0, LBB0_14
; %bb.13:
Lloh9:
	adrp	x8, _RADEON_IS_PX@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RADEON_IS_PX@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	ldr	w9, [x19, #4]
	bic	w8, w9, w8
	str	w8, [x19, #4]
LBB0_14:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_radeon_px_quirk_list,8,3       ; @radeon_px_quirk_list
	.comm	_RADEON_PX_QUIRK_DISABLE_PX,4,2 ; @RADEON_PX_QUIRK_DISABLE_PX
	.comm	_RADEON_IS_PX,4,2               ; @RADEON_IS_PX
	.no_dead_strip	_radeon_device_handle_px_quirks
.subsections_via_symbols
