	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_sar_adc_hw_disable
_meson_sar_adc_hw_disable:              ## @meson_sar_adc_hw_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_iio_priv
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	_meson_sar_adc_lock
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movl	12(%r15), %edi
	callq	_clk_disable_unprepare
	movl	8(%r15), %edi
	movq	_MESON_SAR_ADC_REG3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MESON_SAR_ADC_REG3_ADC_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_meson_sar_adc_set_bandgap
	movl	4(%r15), %edi
	callq	_clk_disable_unprepare
	movl	(%r15), %edi
	callq	_regulator_disable
	movq	%rbx, %rdi
	callq	_meson_sar_adc_unlock
LBB0_2:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MESON_SAR_ADC_REG3,4,2         ## @MESON_SAR_ADC_REG3
	.comm	_MESON_SAR_ADC_REG3_ADC_EN,4,2  ## @MESON_SAR_ADC_REG3_ADC_EN
	.no_dead_strip	_meson_sar_adc_hw_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_sar_adc_hw_disable
_meson_sar_adc_hw_disable:              ; @meson_sar_adc_hw_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_iio_priv
	mov	x21, x0
	mov	x0, x19
	bl	_meson_sar_adc_lock
	mov	x20, x0
	cbnz	w0, LBB0_2
; %bb.1:
	ldr	w0, [x21, #12]
	bl	_clk_disable_unprepare
	ldr	w0, [x21, #8]
Lloh0:
	adrp	x8, _MESON_SAR_ADC_REG3@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MESON_SAR_ADC_REG3@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _MESON_SAR_ADC_REG3_ADC_EN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MESON_SAR_ADC_REG3_ADC_EN@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_regmap_update_bits
	mov	x0, x19
	mov	w1, #0
	bl	_meson_sar_adc_set_bandgap
	ldr	w0, [x21, #4]
	bl	_clk_disable_unprepare
	ldr	w0, [x21]
	bl	_regulator_disable
	mov	x0, x19
	bl	_meson_sar_adc_unlock
LBB0_2:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MESON_SAR_ADC_REG3,4,2         ; @MESON_SAR_ADC_REG3
	.comm	_MESON_SAR_ADC_REG3_ADC_EN,4,2  ; @MESON_SAR_ADC_REG3_ADC_EN
	.no_dead_strip	_meson_sar_adc_hw_disable
.subsections_via_symbols
