	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_display_supported_domains ## -- Begin function amdgpu_display_supported_domains
	.p2align	4, 0x90
_amdgpu_display_supported_domains:      ## @amdgpu_display_supported_domains
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ## @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_AMDGPU_GEM_CREATE_CPU_GTT_USWC,4,2 ## @AMDGPU_GEM_CREATE_CPU_GTT_USWC
	.comm	_AMDGPU_GEM_DOMAIN_GTT,4,2      ## @AMDGPU_GEM_DOMAIN_GTT
	.comm	_AMD_IS_APU,4,2                 ## @AMD_IS_APU
	.comm	_CHIP_CARRIZO,8,3               ## @CHIP_CARRIZO
	.comm	_CHIP_RAVEN,8,3                 ## @CHIP_RAVEN
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_display_supported_domains ; -- Begin function amdgpu_display_supported_domains
	.p2align	2
_amdgpu_display_supported_domains:      ; @amdgpu_display_supported_domains
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ; @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_AMDGPU_GEM_CREATE_CPU_GTT_USWC,4,2 ; @AMDGPU_GEM_CREATE_CPU_GTT_USWC
	.comm	_AMDGPU_GEM_DOMAIN_GTT,4,2      ; @AMDGPU_GEM_DOMAIN_GTT
	.comm	_AMD_IS_APU,4,2                 ; @AMD_IS_APU
	.comm	_CHIP_CARRIZO,8,3               ; @CHIP_CARRIZO
	.comm	_CHIP_RAVEN,8,3                 ; @CHIP_RAVEN
.subsections_via_symbols
