	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vega10_odn_initial_default_setting
_vega10_odn_initial_default_setting:    ## @vega10_odn_initial_default_setting
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	8(%rdi), %r14
	movq	16(%rdi), %r12
	movl	$0, -48(%rbp)
	movq	$0, -56(%rbp)
	leaq	-56(%rbp), %rsi
	movq	%rdi, -72(%rbp)                 ## 8-byte Spill
	callq	_pp_atomfwctrl_get_avfs_information
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movl	-56(%rbp), %eax
	movl	%eax, (%r12)
	movl	-52(%rbp), %eax
	movl	%eax, 4(%r12)
LBB0_2:
	movq	24(%r14), %rax
	movq	(%rax), %r9
	testq	%r9, %r9
	je	LBB0_14
## %bb.3:
	movq	8(%rax), %rcx
	movq	32(%r12), %rdx
	cmpq	$8, %r9
	jae	LBB0_6
## %bb.4:
	xorl	%esi, %esi
	jmp	LBB0_5
LBB0_6:
	movq	%r9, %rsi
	andq	$-8, %rsi
	leaq	-8(%rsi), %rax
	movq	%rax, %rdi
	shrq	$3, %rdi
	incq	%rdi
	movl	%edi, %r8d
	andl	$3, %r8d
	cmpq	$24, %rax
	jae	LBB0_8
## %bb.7:
	xorl	%ebx, %ebx
	jmp	LBB0_10
LBB0_8:
	andq	$-4, %rdi
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	movups	(%rcx,%rbx,4), %xmm0
	movups	16(%rcx,%rbx,4), %xmm1
	movups	%xmm0, (%rdx,%rbx,4)
	movups	%xmm1, 16(%rdx,%rbx,4)
	movups	32(%rcx,%rbx,4), %xmm0
	movups	48(%rcx,%rbx,4), %xmm1
	movups	%xmm0, 32(%rdx,%rbx,4)
	movups	%xmm1, 48(%rdx,%rbx,4)
	movups	64(%rcx,%rbx,4), %xmm0
	movups	80(%rcx,%rbx,4), %xmm1
	movups	%xmm0, 64(%rdx,%rbx,4)
	movups	%xmm1, 80(%rdx,%rbx,4)
	movups	96(%rcx,%rbx,4), %xmm0
	movups	112(%rcx,%rbx,4), %xmm1
	movups	%xmm0, 96(%rdx,%rbx,4)
	movups	%xmm1, 112(%rdx,%rbx,4)
	addq	$32, %rbx
	addq	$-4, %rdi
	jne	LBB0_9
LBB0_10:
	testq	%r8, %r8
	je	LBB0_13
## %bb.11:
	leaq	(%rdx,%rbx,4), %rdi
	addq	$16, %rdi
	leaq	(%rcx,%rbx,4), %rbx
	addq	$16, %rbx
	shlq	$5, %r8
	xorl	%eax, %eax
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movups	-16(%rbx,%rax), %xmm0
	movups	(%rbx,%rax), %xmm1
	movups	%xmm0, -16(%rdi,%rax)
	movups	%xmm1, (%rdi,%rax)
	addq	$32, %rax
	cmpq	%rax, %r8
	jne	LBB0_12
	jmp	LBB0_13
LBB0_5:
	movl	(%rcx,%rsi,4), %eax
	movl	%eax, (%rdx,%rsi,4)
	incq	%rsi
LBB0_13:
	cmpq	%rsi, %r9
	jne	LBB0_5
LBB0_14:
	movq	%r9, 24(%r12)
	movq	16(%r14), %rdi
	movq	(%r14), %r15
	movq	8(%r14), %rbx
	leaq	16(%r12), %rsi
	leaq	12(%r12), %r14
	leaq	8(%r12), %r13
	movq	%rdi, -64(%rbp)                 ## 8-byte Spill
	callq	_smu_get_voltage_dependency_table_ppt_v1
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_smu_get_voltage_dependency_table_ppt_v1
	movq	%r15, %rdi
	movq	%r13, %rsi
	callq	_smu_get_voltage_dependency_table_ppt_v1
	movl	(%r12), %eax
	testl	%eax, %eax
	je	LBB0_16
## %bb.15:
	cmpl	$2001, %eax                     ## imm = 0x7D1
	jl	LBB0_17
LBB0_16:
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
	movq	8(%rcx), %rax
	movslq	(%rcx), %rcx
	shlq	$4, %rcx
	movl	-16(%rcx,%rax), %eax
	movl	%eax, (%r12)
LBB0_17:
	movl	4(%r12), %ecx
	testl	%ecx, %ecx
	je	LBB0_19
## %bb.18:
	cmpl	$2001, %ecx                     ## imm = 0x7D1
	jl	LBB0_20
LBB0_19:
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
	movq	8(%rcx), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 4(%r12)
LBB0_20:
	movslq	(%r13), %rcx
	shlq	$4, %rcx
	movq	-72(%rbp), %rdx                 ## 8-byte Reload
	movq	(%rdx), %rdx
	movq	8(%r13), %rsi
	movq	-8(%rcx,%rsi), %rdi
	cmpq	%rdi, %rdx
	cmovgq	%rdx, %rdi
	movq	%rdi, -8(%rcx,%rsi)
	movl	-16(%rcx,%rsi), %edx
	cmpl	%edx, %eax
	cmovgl	%eax, %edx
	movl	%edx, -16(%rcx,%rsi)
	xorl	%eax, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_vega10_odn_initial_default_setting
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vega10_odn_initial_default_setting
_vega10_odn_initial_default_setting:    ; @vega10_odn_initial_default_setting
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldp	x24, x25, [x0, #8]
	str	wzr, [sp, #8]
	str	xzr, [sp]
	mov	x1, sp
	bl	_pp_atomfwctrl_get_avfs_information
	cbnz	w0, LBB0_2
; %bb.1:
	ldr	d0, [sp]
	str	d0, [x25]
LBB0_2:
	ldr	x9, [x24, #24]
	ldr	x8, [x9]
	cbz	x8, LBB0_10
; %bb.3:
	ldr	x10, [x9, #8]
	ldr	x9, [x25, #32]
	cmp	x8, #16
	b.hs	LBB0_5
; %bb.4:
	mov	x11, #0
	b	LBB0_8
LBB0_5:
	and	x11, x8, #0xfffffffffffffff0
	add	x12, x10, #32
	add	x13, x9, #32
	mov	x14, x11
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldp	q0, q1, [x12, #-32]
	ldp	q2, q3, [x12], #64
	stp	q0, q1, [x13, #-32]
	stp	q2, q3, [x13], #64
	subs	x14, x14, #16
	b.ne	LBB0_6
; %bb.7:
	cmp	x8, x11
	b.eq	LBB0_10
LBB0_8:
	sub	x12, x8, x11
	lsl	x11, x11, #2
	add	x10, x10, x11
	add	x9, x9, x11
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w11, [x10], #4
	str	w11, [x9], #4
	subs	x12, x12, #1
	b.ne	LBB0_9
LBB0_10:
	str	x8, [x25, #24]
	ldp	x23, x20, [x24, #8]
	add	x1, x25, #16
	add	x22, x25, #12
	add	x21, x25, #8
	ldr	x24, [x24]
	mov	x0, x20
	bl	_smu_get_voltage_dependency_table_ppt_v1
	mov	x0, x23
	mov	x1, x22
	bl	_smu_get_voltage_dependency_table_ppt_v1
	mov	x0, x24
	mov	x1, x21
	bl	_smu_get_voltage_dependency_table_ppt_v1
	ldr	w8, [x25]
	cbz	w8, LBB0_12
; %bb.11:
	cmp	w8, #2001
	b.lt	LBB0_13
LBB0_12:
	ldr	x8, [x20, #8]
	ldrsw	x9, [x20]
	add	x8, x8, x9, lsl #4
	ldur	w8, [x8, #-16]
	str	w8, [x25]
LBB0_13:
	ldr	w9, [x25, #4]
	cbz	w9, LBB0_15
; %bb.14:
	cmp	w9, #2001
	b.lt	LBB0_16
LBB0_15:
	ldr	x9, [x20, #8]
	ldr	w9, [x9]
	str	w9, [x25, #4]
LBB0_16:
	ldrsw	x9, [x21]
	ldr	x10, [x19]
	ldr	x11, [x21, #8]
	add	x9, x11, x9, lsl #4
	ldur	x11, [x9, #-8]
	cmp	x10, x11
	csel	x10, x10, x11, gt
	stur	x10, [x9, #-8]
	ldur	w10, [x9, #-16]
	cmp	w8, w10
	csel	w8, w8, w10, gt
	stur	w8, [x9, #-16]
	mov	w0, #0
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_vega10_odn_initial_default_setting
.subsections_via_symbols
