	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function fill_plane_buffer_attributes
_fill_plane_buffer_attributes:          ## @fill_plane_buffer_attributes
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r9, %r12
	movq	%r8, -88(%rbp)                  ## 8-byte Spill
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movl	%edx, %r13d
	movq	%rsi, %r15
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	movq	24(%rbp), %rbx
	movq	16(%rbp), %r14
	movq	%r9, %rdi
	xorl	%esi, %esi
	movl	$48, %edx
	callq	_memset
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$200, %edx
	callq	_memset
	movq	%rbx, %rdi
	movq	32(%rbp), %rbx
	xorl	%esi, %esi
	movl	$200, %edx
	callq	_memset
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$200, %edx
	callq	_memset
	movq	_SURFACE_PIXEL_FORMAT_VIDEO_BEGIN@GOTPCREL(%rip), %rax
	cmpl	%r13d, (%rax)
	jbe	LBB0_2
## %bb.1:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 168(%r14)
	movl	8(%r15), %eax
	movl	%eax, 160(%r14)
	movl	12(%r15), %eax
	movl	%eax, 164(%r14)
	movq	16(%r15), %rax
	movq	24(%r15), %rcx
	movl	(%rax), %eax
	movq	(%rcx), %rcx
	cltd
	idivl	(%rcx)
	movl	%eax, (%r14)
	movq	_PLN_ADDR_TYPE_GRAPHICS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 128(%rbx)
	movq	(%r15), %rdi
	callq	_lower_32_bits
	movq	%rax, 192(%rbx)
	movq	(%r15), %rdi
	callq	_upper_32_bits
	movq	%rax, 184(%rbx)
	jmp	LBB0_4
LBB0_2:
	movq	_SURFACE_PIXEL_FORMAT_INVALID@GOTPCREL(%rip), %rax
	cmpl	%r13d, (%rax)
	jbe	LBB0_4
## %bb.3:
	movq	(%r15), %rdi
	movq	32(%r15), %rax
	movq	%r15, %rbx
	movl	%r13d, %r15d
	movq	8(%rax), %r13
	addq	%rdi, %r13
	xorps	%xmm0, %xmm0
	movq	16(%rbp), %r10
	movups	%xmm0, 168(%r10)
	movl	8(%rbx), %ecx
	movl	%ecx, 160(%r10)
	movl	12(%rbx), %esi
	movl	%esi, 164(%r10)
	movq	16(%rbx), %r9
	movq	24(%rbx), %rdx
	movl	(%r9), %eax
	movq	(%rdx), %r8
	cltd
	idivl	(%r8)
	movl	%eax, (%r10)
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	movups	%xmm0, 144(%r10)
	movl	%eax, 136(%r10)
	movl	%esi, %eax
	shrl	$31, %eax
	addl	%esi, %eax
	sarl	%eax
	movl	%eax, 140(%r10)
	movl	4(%r9), %eax
	cltd
	idivl	4(%r8)
	movl	%eax, 4(%r10)
	movq	_PLN_ADDR_TYPE_VIDEO_PROGRESSIVE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	32(%rbp), %r14
	movl	%eax, 128(%r14)
	callq	_lower_32_bits
	movq	%rax, 120(%r14)
	movq	(%rbx), %rdi
	callq	_upper_32_bits
	movq	%rax, 112(%r14)
	movq	%r13, %rdi
	callq	_lower_32_bits
	movq	%rax, 104(%r14)
	movq	%r13, %rdi
	movl	%r15d, %r13d
	movq	%rbx, %r15
	callq	_upper_32_bits
	movq	%rax, 96(%r14)
LBB0_4:
	movq	_ARRAY_MODE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	-88(%rbp), %r14                 ## 8-byte Reload
	movq	%r14, %rdi
	callq	_AMDGPU_TILING_GET
	movq	_DC_ARRAY_2D_TILED_THIN1@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_5
## %bb.6:
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_AMDGPU_TILING_GET
	movq	_DC_ARRAY_1D_TILED_THIN1@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_8
## %bb.7:
	movq	%rax, 32(%r12)
	jmp	LBB0_8
LBB0_5:
	movq	_BANK_WIDTH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_AMDGPU_TILING_GET
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	movq	_BANK_HEIGHT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_AMDGPU_TILING_GET
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	movq	_MACRO_TILE_ASPECT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_AMDGPU_TILING_GET
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	_TILE_SPLIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_AMDGPU_TILING_GET
	movl	%r13d, %ebx
	movq	%rax, %r13
	movq	_NUM_BANKS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_AMDGPU_TILING_GET
	movl	%eax, (%r12)
	movq	_DC_ARRAY_2D_TILED_THIN1@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 32(%r12)
	movl	%r13d, 4(%r12)
	movl	%ebx, %r13d
	movq	-80(%rbp), %rax                 ## 8-byte Reload
	movl	%eax, 8(%r12)
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	movl	%eax, 12(%r12)
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movl	%eax, 16(%r12)
	movq	_DC_ADDR_SURF_MICRO_TILING_DISPLAY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%r12)
LBB0_8:
	movq	_PIPE_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_AMDGPU_TILING_GET
	movq	%rax, 24(%r12)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rax
	movq	_CHIP_VEGA10@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_12
## %bb.9:
	movq	_CHIP_VEGA12@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_12
## %bb.10:
	movq	_CHIP_VEGA20@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_12
## %bb.11:
	movq	_CHIP_RAVEN@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_13
LBB0_12:
	movq	%r15, %rbx
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	movl	28(%r15), %eax
	movl	%eax, 36(%r12)
	movl	24(%r15), %eax
	movl	%eax, 32(%r12)
	movl	20(%r15), %eax
	movl	%eax, 28(%r12)
	movl	16(%r15), %eax
	movl	%eax, 24(%r12)
	movl	12(%r15), %eax
	movl	%eax, 20(%r12)
	movl	8(%r15), %eax
	movl	%eax, 16(%r12)
	movq	_SWIZZLE_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_AMDGPU_TILING_GET
	movq	%rax, 8(%r12)
	movl	$1, (%r12)
	subq	$8, %rsp
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r13d, %edx
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	movq	16(%rbp), %r8
	movq	%r12, %r9
	pushq	32(%rbp)
	pushq	24(%rbp)
	pushq	%r14
	callq	_fill_plane_dcc_attributes
	addq	$32, %rsp
	testl	%eax, %eax
	jne	LBB0_14
LBB0_13:
	xorl	%eax, %eax
LBB0_14:
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SURFACE_PIXEL_FORMAT_VIDEO_BEGIN,4,2 ## @SURFACE_PIXEL_FORMAT_VIDEO_BEGIN
	.comm	_PLN_ADDR_TYPE_GRAPHICS,4,2     ## @PLN_ADDR_TYPE_GRAPHICS
	.comm	_SURFACE_PIXEL_FORMAT_INVALID,4,2 ## @SURFACE_PIXEL_FORMAT_INVALID
	.comm	_PLN_ADDR_TYPE_VIDEO_PROGRESSIVE,4,2 ## @PLN_ADDR_TYPE_VIDEO_PROGRESSIVE
	.comm	_ARRAY_MODE,4,2                 ## @ARRAY_MODE
	.comm	_DC_ARRAY_2D_TILED_THIN1,8,3    ## @DC_ARRAY_2D_TILED_THIN1
	.comm	_BANK_WIDTH,4,2                 ## @BANK_WIDTH
	.comm	_BANK_HEIGHT,4,2                ## @BANK_HEIGHT
	.comm	_MACRO_TILE_ASPECT,4,2          ## @MACRO_TILE_ASPECT
	.comm	_TILE_SPLIT,4,2                 ## @TILE_SPLIT
	.comm	_NUM_BANKS,4,2                  ## @NUM_BANKS
	.comm	_DC_ADDR_SURF_MICRO_TILING_DISPLAY,4,2 ## @DC_ADDR_SURF_MICRO_TILING_DISPLAY
	.comm	_DC_ARRAY_1D_TILED_THIN1,8,3    ## @DC_ARRAY_1D_TILED_THIN1
	.comm	_PIPE_CONFIG,4,2                ## @PIPE_CONFIG
	.comm	_CHIP_VEGA10,8,3                ## @CHIP_VEGA10
	.comm	_CHIP_VEGA12,8,3                ## @CHIP_VEGA12
	.comm	_CHIP_VEGA20,8,3                ## @CHIP_VEGA20
	.comm	_CHIP_RAVEN,8,3                 ## @CHIP_RAVEN
	.comm	_SWIZZLE_MODE,4,2               ## @SWIZZLE_MODE
	.comm	_CHIP_NAVI10,8,3                ## @CHIP_NAVI10
	.comm	_CHIP_NAVI12,8,3                ## @CHIP_NAVI12
	.comm	_CHIP_NAVI14,8,3                ## @CHIP_NAVI14
	.comm	_CHIP_RENOIR,8,3                ## @CHIP_RENOIR
	.no_dead_strip	_fill_plane_buffer_attributes
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function fill_plane_buffer_attributes
_fill_plane_buffer_attributes:          ; @fill_plane_buffer_attributes
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x23, x7
	mov	x22, x6
	mov	x21, x5
	mov	x20, x4
	mov	x24, x3
	mov	x19, x2
	mov	x25, x1
	mov	x26, x0
	ldr	x27, [x29, #16]
	mov	x0, x5
	mov	w1, #0
	mov	w2, #48
	bl	_memset
	mov	x0, x22
	mov	w1, #0
	mov	w2, #200
	bl	_memset
	mov	x0, x23
	mov	w1, #0
	mov	w2, #200
	bl	_memset
	mov	x0, x27
	mov	w1, #0
	mov	w2, #200
	bl	_memset
Lloh0:
	adrp	x8, _SURFACE_PIXEL_FORMAT_VIDEO_BEGIN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SURFACE_PIXEL_FORMAT_VIDEO_BEGIN@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w19
	str	w19, [sp, #44]                  ; 4-byte Folded Spill
	b.ls	LBB0_2
; %bb.1:
	stp	xzr, xzr, [x22, #168]
	ldr	d0, [x25, #8]
	str	d0, [x22, #160]
	ldp	x8, x9, [x25, #16]
	ldr	w8, [x8]
	ldr	x9, [x9]
	ldr	w9, [x9]
	sdiv	w8, w8, w9
	str	w8, [x22]
Lloh3:
	adrp	x8, _PLN_ADDR_TYPE_GRAPHICS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PLN_ADDR_TYPE_GRAPHICS@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	str	w8, [x27, #128]
	ldr	x0, [x25]
	bl	_lower_32_bits
	str	x0, [x27, #192]
	ldr	x0, [x25]
	bl	_upper_32_bits
	str	x0, [x27, #184]
	b	LBB0_4
LBB0_2:
Lloh6:
	adrp	x8, _SURFACE_PIXEL_FORMAT_INVALID@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SURFACE_PIXEL_FORMAT_INVALID@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	w8, w19
	b.ls	LBB0_4
; %bb.3:
	ldr	x0, [x25]
	ldr	x8, [x25, #32]
	ldr	x8, [x8, #8]
	add	x28, x8, x0
	stp	xzr, xzr, [x22, #168]
	ldp	w8, w9, [x25, #8]
	stp	w8, w9, [x22, #160]
	ldp	x10, x11, [x25, #16]
	ldr	w12, [x10]
	ldr	x11, [x11]
	ldr	w13, [x11]
	sdiv	w12, w12, w13
	str	w12, [x22]
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w8, w8, #1
	stp	xzr, xzr, [x22, #144]
	cmp	w9, #0
	cinc	w9, w9, lt
	asr	w9, w9, #1
	stp	w8, w9, [x22, #136]
	ldr	w8, [x10, #4]
	ldr	w9, [x11, #4]
	sdiv	w8, w8, w9
	str	w8, [x22, #4]
Lloh9:
	adrp	x8, _PLN_ADDR_TYPE_VIDEO_PROGRESSIVE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PLN_ADDR_TYPE_VIDEO_PROGRESSIVE@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	str	w8, [x27, #128]
	bl	_lower_32_bits
	str	x0, [x27, #120]
	ldr	x0, [x25]
	bl	_upper_32_bits
	str	x0, [x27, #112]
	mov	x0, x28
	bl	_lower_32_bits
	str	x0, [x27, #104]
	mov	x0, x28
	bl	_upper_32_bits
	str	x0, [x27, #96]
LBB0_4:
Lloh12:
	adrp	x19, _ARRAY_MODE@GOTPAGE
Lloh13:
	ldr	x19, [x19, _ARRAY_MODE@GOTPAGEOFF]
	ldr	w1, [x19]
	mov	x0, x20
	bl	_AMDGPU_TILING_GET
Lloh14:
	adrp	x28, _DC_ARRAY_2D_TILED_THIN1@GOTPAGE
Lloh15:
	ldr	x28, [x28, _DC_ARRAY_2D_TILED_THIN1@GOTPAGEOFF]
	ldr	x8, [x28]
	cmp	x0, x8
	b.eq	LBB0_7
; %bb.5:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_AMDGPU_TILING_GET
Lloh16:
	adrp	x8, _DC_ARRAY_1D_TILED_THIN1@GOTPAGE
Lloh17:
	ldr	x8, [x8, _DC_ARRAY_1D_TILED_THIN1@GOTPAGEOFF]
Lloh18:
	ldr	x8, [x8]
	cmp	x0, x8
	ldr	w19, [sp, #44]                  ; 4-byte Folded Reload
	b.ne	LBB0_8
; %bb.6:
	str	x0, [x21, #32]
	b	LBB0_8
LBB0_7:
Lloh19:
	adrp	x8, _BANK_WIDTH@GOTPAGE
Lloh20:
	ldr	x8, [x8, _BANK_WIDTH@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_AMDGPU_TILING_GET
	str	x0, [sp, #24]                   ; 8-byte Folded Spill
Lloh22:
	adrp	x8, _BANK_HEIGHT@GOTPAGE
Lloh23:
	ldr	x8, [x8, _BANK_HEIGHT@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_AMDGPU_TILING_GET
	str	x23, [sp, #32]                  ; 8-byte Folded Spill
	str	x0, [sp, #16]                   ; 8-byte Folded Spill
Lloh25:
	adrp	x8, _MACRO_TILE_ASPECT@GOTPAGE
Lloh26:
	ldr	x8, [x8, _MACRO_TILE_ASPECT@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_AMDGPU_TILING_GET
	mov	x19, x0
Lloh28:
	adrp	x8, _TILE_SPLIT@GOTPAGE
Lloh29:
	ldr	x8, [x8, _TILE_SPLIT@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_AMDGPU_TILING_GET
	mov	x23, x24
	mov	x24, x0
Lloh31:
	adrp	x8, _NUM_BANKS@GOTPAGE
Lloh32:
	ldr	x8, [x8, _NUM_BANKS@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_AMDGPU_TILING_GET
	str	w0, [x21]
	ldr	x8, [x28]
	str	x8, [x21, #32]
	str	w24, [x21, #4]
	mov	x24, x23
	ldp	x9, x23, [sp, #24]              ; 16-byte Folded Reload
	ldr	x8, [sp, #16]                   ; 8-byte Folded Reload
	stp	w9, w8, [x21, #8]
	str	w19, [x21, #16]
Lloh34:
	adrp	x8, _DC_ADDR_SURF_MICRO_TILING_DISPLAY@GOTPAGE
Lloh35:
	ldr	x8, [x8, _DC_ADDR_SURF_MICRO_TILING_DISPLAY@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
	str	w8, [x21, #40]
	ldr	w19, [sp, #44]                  ; 4-byte Folded Reload
LBB0_8:
Lloh37:
	adrp	x8, _PIPE_CONFIG@GOTPAGE
Lloh38:
	ldr	x8, [x8, _PIPE_CONFIG@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_AMDGPU_TILING_GET
	str	x0, [x21, #24]
	ldr	x8, [x26]
Lloh40:
	adrp	x9, _CHIP_VEGA10@GOTPAGE
Lloh41:
	ldr	x9, [x9, _CHIP_VEGA10@GOTPAGEOFF]
Lloh42:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_12
; %bb.9:
Lloh43:
	adrp	x9, _CHIP_VEGA12@GOTPAGE
Lloh44:
	ldr	x9, [x9, _CHIP_VEGA12@GOTPAGEOFF]
Lloh45:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_12
; %bb.10:
Lloh46:
	adrp	x9, _CHIP_VEGA20@GOTPAGE
Lloh47:
	ldr	x9, [x9, _CHIP_VEGA20@GOTPAGEOFF]
Lloh48:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_12
; %bb.11:
Lloh49:
	adrp	x9, _CHIP_RAVEN@GOTPAGE
Lloh50:
	ldr	x9, [x9, _CHIP_RAVEN@GOTPAGEOFF]
Lloh51:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_13
LBB0_12:
	ldr	w8, [x26, #28]
	str	w8, [x21, #36]
	ldr	w8, [x26, #24]
	str	w8, [x21, #32]
	ldr	w8, [x26, #20]
	str	w8, [x21, #28]
	ldr	w8, [x26, #16]
	str	w8, [x21, #24]
	ldr	w8, [x26, #12]
	str	w8, [x21, #20]
	ldr	w8, [x26, #8]
	str	w8, [x21, #16]
Lloh52:
	adrp	x8, _SWIZZLE_MODE@GOTPAGE
Lloh53:
	ldr	x8, [x8, _SWIZZLE_MODE@GOTPAGEOFF]
Lloh54:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_AMDGPU_TILING_GET
	str	x0, [x21, #8]
	mov	w8, #1
	str	w8, [x21]
	str	x27, [sp]
	mov	x0, x26
	mov	x1, x25
	mov	x2, x19
	mov	x3, x24
	mov	x4, x22
	mov	x5, x21
	mov	x6, x20
	mov	x7, x23
	bl	_fill_plane_dcc_attributes
	cbnz	w0, LBB0_14
LBB0_13:
	mov	w0, #0
LBB0_14:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.cfi_endproc
                                        ; -- End function
	.comm	_SURFACE_PIXEL_FORMAT_VIDEO_BEGIN,4,2 ; @SURFACE_PIXEL_FORMAT_VIDEO_BEGIN
	.comm	_PLN_ADDR_TYPE_GRAPHICS,4,2     ; @PLN_ADDR_TYPE_GRAPHICS
	.comm	_SURFACE_PIXEL_FORMAT_INVALID,4,2 ; @SURFACE_PIXEL_FORMAT_INVALID
	.comm	_PLN_ADDR_TYPE_VIDEO_PROGRESSIVE,4,2 ; @PLN_ADDR_TYPE_VIDEO_PROGRESSIVE
	.comm	_ARRAY_MODE,4,2                 ; @ARRAY_MODE
	.comm	_DC_ARRAY_2D_TILED_THIN1,8,3    ; @DC_ARRAY_2D_TILED_THIN1
	.comm	_BANK_WIDTH,4,2                 ; @BANK_WIDTH
	.comm	_BANK_HEIGHT,4,2                ; @BANK_HEIGHT
	.comm	_MACRO_TILE_ASPECT,4,2          ; @MACRO_TILE_ASPECT
	.comm	_TILE_SPLIT,4,2                 ; @TILE_SPLIT
	.comm	_NUM_BANKS,4,2                  ; @NUM_BANKS
	.comm	_DC_ADDR_SURF_MICRO_TILING_DISPLAY,4,2 ; @DC_ADDR_SURF_MICRO_TILING_DISPLAY
	.comm	_DC_ARRAY_1D_TILED_THIN1,8,3    ; @DC_ARRAY_1D_TILED_THIN1
	.comm	_PIPE_CONFIG,4,2                ; @PIPE_CONFIG
	.comm	_CHIP_VEGA10,8,3                ; @CHIP_VEGA10
	.comm	_CHIP_VEGA12,8,3                ; @CHIP_VEGA12
	.comm	_CHIP_VEGA20,8,3                ; @CHIP_VEGA20
	.comm	_CHIP_RAVEN,8,3                 ; @CHIP_RAVEN
	.comm	_SWIZZLE_MODE,4,2               ; @SWIZZLE_MODE
	.comm	_CHIP_NAVI10,8,3                ; @CHIP_NAVI10
	.comm	_CHIP_NAVI12,8,3                ; @CHIP_NAVI12
	.comm	_CHIP_NAVI14,8,3                ; @CHIP_NAVI14
	.comm	_CHIP_RENOIR,8,3                ; @CHIP_RENOIR
	.no_dead_strip	_fill_plane_buffer_attributes
.subsections_via_symbols
