	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v8_0_init_golden_registers
_gfx_v8_0_init_golden_registers:        ## @gfx_v8_0_init_golden_registers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdi), %eax
	addl	$-128, %eax
	cmpl	$8, %eax
	ja	LBB0_20
## %bb.1:
	movq	%rdi, %r15
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_8:
	movq	_golden_settings_polaris11_a11@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_polaris11_golden_common_all@GOTPCREL(%rip), %rax
	jmp	LBB0_9
LBB0_5:
	movq	_golden_settings_vegam_a11@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_vegam_golden_common_all@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_2:
	movq	_iceland_mgcg_cgcg_init@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_golden_settings_iceland_a11@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_iceland_golden_common_all@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_4:
	movq	_tonga_mgcg_cgcg_init@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_golden_settings_tonga_a11@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_tonga_golden_common_all@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_18:
	movq	_stoney_mgcg_cgcg_init@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_stoney_golden_settings_a11@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_stoney_golden_common_all@GOTPCREL(%rip), %rax
	jmp	LBB0_9
LBB0_10:
	movq	_golden_settings_polaris10_a11@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_polaris10_golden_common_all@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_ixCG_ACLK_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$28, %esi
	callq	_WREG32_SMC
	movq	8(%r15), %rax
	cmpl	$199, (%rax)
	jne	LBB0_20
## %bb.11:
	movl	4(%rax), %ecx
	cmpl	$1192, %ecx                     ## imm = 0x4A8
	je	LBB0_19
## %bb.12:
	cmpl	$38016, %ecx                    ## imm = 0x9480
	je	LBB0_15
## %bb.13:
	cmpl	$2871, %ecx                     ## imm = 0xB37
	jne	LBB0_20
## %bb.14:
	cmpl	$4098, 8(%rax)                  ## imm = 0x1002
	jne	LBB0_20
	jmp	LBB0_16
LBB0_3:
	movq	_fiji_mgcg_cgcg_init@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_golden_settings_fiji_a10@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_fiji_golden_common_all@GOTPCREL(%rip), %rax
LBB0_6:
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%r14d, %esi
	jmp	LBB0_7
LBB0_17:
	movq	_cz_mgcg_cgcg_init@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_cz_golden_settings_a11@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_amdgpu_device_program_register_sequence
	movq	_cz_golden_common_all@GOTPCREL(%rip), %rax
LBB0_9:
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movq	%r15, %rdi
	movl	%ebx, %esi
LBB0_7:
	movl	%eax, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_device_program_register_sequence ## TAILCALL
LBB0_19:
	cmpl	$4163, 8(%rax)                  ## imm = 0x1043
	je	LBB0_16
LBB0_20:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_15:
	cmpl	$5762, 8(%rax)                  ## imm = 0x1682
	jne	LBB0_20
LBB0_16:
	movq	%r15, %rdi
	movl	$16, %esi
	movl	$150, %edx
	movl	$30, %ecx
	movl	$221, %r8d
	callq	_amdgpu_atombios_i2c_channel_trans
	movq	%r15, %rdi
	movl	$16, %esi
	movl	$150, %edx
	movl	$31, %ecx
	movl	$208, %r8d
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_atombios_i2c_channel_trans ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_17, LBB0_17-LJTI0_0
LJTI0_0:
	.long	L0_0_set_5
	.long	L0_0_set_2
	.long	L0_0_set_4
	.long	L0_0_set_18
	.long	L0_0_set_8
	.long	L0_0_set_8
	.long	L0_0_set_10
	.long	L0_0_set_3
	.long	L0_0_set_17
	.end_data_region
                                        ## -- End function
	.comm	_iceland_mgcg_cgcg_init,4,2     ## @iceland_mgcg_cgcg_init
	.comm	_golden_settings_iceland_a11,4,2 ## @golden_settings_iceland_a11
	.comm	_iceland_golden_common_all,4,2  ## @iceland_golden_common_all
	.comm	_fiji_mgcg_cgcg_init,4,2        ## @fiji_mgcg_cgcg_init
	.comm	_golden_settings_fiji_a10,4,2   ## @golden_settings_fiji_a10
	.comm	_fiji_golden_common_all,4,2     ## @fiji_golden_common_all
	.comm	_tonga_mgcg_cgcg_init,4,2       ## @tonga_mgcg_cgcg_init
	.comm	_golden_settings_tonga_a11,4,2  ## @golden_settings_tonga_a11
	.comm	_tonga_golden_common_all,4,2    ## @tonga_golden_common_all
	.comm	_golden_settings_vegam_a11,4,2  ## @golden_settings_vegam_a11
	.comm	_vegam_golden_common_all,4,2    ## @vegam_golden_common_all
	.comm	_golden_settings_polaris11_a11,4,2 ## @golden_settings_polaris11_a11
	.comm	_polaris11_golden_common_all,4,2 ## @polaris11_golden_common_all
	.comm	_golden_settings_polaris10_a11,4,2 ## @golden_settings_polaris10_a11
	.comm	_polaris10_golden_common_all,4,2 ## @polaris10_golden_common_all
	.comm	_ixCG_ACLK_CNTL,4,2             ## @ixCG_ACLK_CNTL
	.comm	_cz_mgcg_cgcg_init,4,2          ## @cz_mgcg_cgcg_init
	.comm	_cz_golden_settings_a11,4,2     ## @cz_golden_settings_a11
	.comm	_cz_golden_common_all,4,2       ## @cz_golden_common_all
	.comm	_stoney_mgcg_cgcg_init,4,2      ## @stoney_mgcg_cgcg_init
	.comm	_stoney_golden_settings_a11,4,2 ## @stoney_golden_settings_a11
	.comm	_stoney_golden_common_all,4,2   ## @stoney_golden_common_all
	.no_dead_strip	_gfx_v8_0_init_golden_registers
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v8_0_init_golden_registers
_gfx_v8_0_init_golden_registers:        ; @gfx_v8_0_init_golden_registers
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	w8, [x0]
	sub	w8, w8, #128
	cmp	w8, #8
	b.hi	LBB0_19
; %bb.1:
	mov	x19, x0
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
Lloh2:
	adrp	x8, _golden_settings_polaris11_a11@GOTPAGE
Lloh3:
	ldr	x8, [x8, _golden_settings_polaris11_a11@GOTPAGEOFF]
Lloh4:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh5:
	adrp	x8, _polaris11_golden_common_all@GOTPAGE
Lloh6:
	ldr	x8, [x8, _polaris11_golden_common_all@GOTPAGEOFF]
	b	LBB0_14
LBB0_3:
Lloh7:
	adrp	x8, _golden_settings_vegam_a11@GOTPAGE
Lloh8:
	ldr	x8, [x8, _golden_settings_vegam_a11@GOTPAGEOFF]
Lloh9:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh10:
	adrp	x8, _vegam_golden_common_all@GOTPAGE
Lloh11:
	ldr	x8, [x8, _vegam_golden_common_all@GOTPAGEOFF]
	b	LBB0_14
LBB0_4:
Lloh12:
	adrp	x8, _iceland_mgcg_cgcg_init@GOTPAGE
Lloh13:
	ldr	x8, [x8, _iceland_mgcg_cgcg_init@GOTPAGEOFF]
Lloh14:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh15:
	adrp	x8, _golden_settings_iceland_a11@GOTPAGE
Lloh16:
	ldr	x8, [x8, _golden_settings_iceland_a11@GOTPAGEOFF]
Lloh17:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh18:
	adrp	x8, _iceland_golden_common_all@GOTPAGE
Lloh19:
	ldr	x8, [x8, _iceland_golden_common_all@GOTPAGEOFF]
	b	LBB0_14
LBB0_5:
Lloh20:
	adrp	x8, _tonga_mgcg_cgcg_init@GOTPAGE
Lloh21:
	ldr	x8, [x8, _tonga_mgcg_cgcg_init@GOTPAGEOFF]
Lloh22:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh23:
	adrp	x8, _golden_settings_tonga_a11@GOTPAGE
Lloh24:
	ldr	x8, [x8, _golden_settings_tonga_a11@GOTPAGEOFF]
Lloh25:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh26:
	adrp	x8, _tonga_golden_common_all@GOTPAGE
Lloh27:
	ldr	x8, [x8, _tonga_golden_common_all@GOTPAGEOFF]
	b	LBB0_14
LBB0_6:
Lloh28:
	adrp	x8, _stoney_mgcg_cgcg_init@GOTPAGE
Lloh29:
	ldr	x8, [x8, _stoney_mgcg_cgcg_init@GOTPAGEOFF]
Lloh30:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh31:
	adrp	x8, _stoney_golden_settings_a11@GOTPAGE
Lloh32:
	ldr	x8, [x8, _stoney_golden_settings_a11@GOTPAGEOFF]
Lloh33:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh34:
	adrp	x8, _stoney_golden_common_all@GOTPAGE
Lloh35:
	ldr	x8, [x8, _stoney_golden_common_all@GOTPAGEOFF]
	b	LBB0_14
LBB0_7:
Lloh36:
	adrp	x8, _golden_settings_polaris10_a11@GOTPAGE
Lloh37:
	ldr	x8, [x8, _golden_settings_polaris10_a11@GOTPAGEOFF]
Lloh38:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh39:
	adrp	x8, _polaris10_golden_common_all@GOTPAGE
Lloh40:
	ldr	x8, [x8, _polaris10_golden_common_all@GOTPAGEOFF]
Lloh41:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh42:
	adrp	x8, _ixCG_ACLK_CNTL@GOTPAGE
Lloh43:
	ldr	x8, [x8, _ixCG_ACLK_CNTL@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	mov	w1, #28
	bl	_WREG32_SMC
	ldr	x8, [x19, #8]
	ldr	w9, [x8]
	cmp	w9, #199
	b.ne	LBB0_19
; %bb.8:
	ldr	w9, [x8, #4]
	cmp	w9, #1192
	b.eq	LBB0_15
; %bb.9:
	mov	w10, #38016
	cmp	w9, w10
	b.eq	LBB0_16
; %bb.10:
	cmp	w9, #2871
	b.ne	LBB0_19
; %bb.11:
	ldr	w8, [x8, #8]
	mov	w9, #4098
	b	LBB0_17
LBB0_12:
Lloh45:
	adrp	x8, _fiji_mgcg_cgcg_init@GOTPAGE
Lloh46:
	ldr	x8, [x8, _fiji_mgcg_cgcg_init@GOTPAGEOFF]
Lloh47:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh48:
	adrp	x8, _golden_settings_fiji_a10@GOTPAGE
Lloh49:
	ldr	x8, [x8, _golden_settings_fiji_a10@GOTPAGEOFF]
Lloh50:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh51:
	adrp	x8, _fiji_golden_common_all@GOTPAGE
Lloh52:
	ldr	x8, [x8, _fiji_golden_common_all@GOTPAGEOFF]
	b	LBB0_14
LBB0_13:
Lloh53:
	adrp	x8, _cz_mgcg_cgcg_init@GOTPAGE
Lloh54:
	ldr	x8, [x8, _cz_mgcg_cgcg_init@GOTPAGEOFF]
Lloh55:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh56:
	adrp	x8, _cz_golden_settings_a11@GOTPAGE
Lloh57:
	ldr	x8, [x8, _cz_golden_settings_a11@GOTPAGEOFF]
Lloh58:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_device_program_register_sequence
Lloh59:
	adrp	x8, _cz_golden_common_all@GOTPAGE
Lloh60:
	ldr	x8, [x8, _cz_golden_common_all@GOTPAGEOFF]
LBB0_14:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_amdgpu_device_program_register_sequence
LBB0_15:
	ldr	w8, [x8, #8]
	mov	w9, #4163
	b	LBB0_17
LBB0_16:
	ldr	w8, [x8, #8]
	mov	w9, #5762
LBB0_17:
	cmp	w8, w9
	b.ne	LBB0_19
; %bb.18:
	mov	x0, x19
	mov	w1, #16
	mov	w2, #150
	mov	w3, #30
	mov	w4, #221
	bl	_amdgpu_atombios_i2c_channel_trans
	mov	x0, x19
	mov	w1, #16
	mov	w2, #150
	mov	w3, #31
	mov	w4, #208
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_amdgpu_atombios_i2c_channel_trans
LBB0_19:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
	.byte	(LBB0_12-LBB0_2)>>2
	.byte	(LBB0_13-LBB0_2)>>2
                                        ; -- End function
	.comm	_iceland_mgcg_cgcg_init,4,2     ; @iceland_mgcg_cgcg_init
	.comm	_golden_settings_iceland_a11,4,2 ; @golden_settings_iceland_a11
	.comm	_iceland_golden_common_all,4,2  ; @iceland_golden_common_all
	.comm	_fiji_mgcg_cgcg_init,4,2        ; @fiji_mgcg_cgcg_init
	.comm	_golden_settings_fiji_a10,4,2   ; @golden_settings_fiji_a10
	.comm	_fiji_golden_common_all,4,2     ; @fiji_golden_common_all
	.comm	_tonga_mgcg_cgcg_init,4,2       ; @tonga_mgcg_cgcg_init
	.comm	_golden_settings_tonga_a11,4,2  ; @golden_settings_tonga_a11
	.comm	_tonga_golden_common_all,4,2    ; @tonga_golden_common_all
	.comm	_golden_settings_vegam_a11,4,2  ; @golden_settings_vegam_a11
	.comm	_vegam_golden_common_all,4,2    ; @vegam_golden_common_all
	.comm	_golden_settings_polaris11_a11,4,2 ; @golden_settings_polaris11_a11
	.comm	_polaris11_golden_common_all,4,2 ; @polaris11_golden_common_all
	.comm	_golden_settings_polaris10_a11,4,2 ; @golden_settings_polaris10_a11
	.comm	_polaris10_golden_common_all,4,2 ; @polaris10_golden_common_all
	.comm	_ixCG_ACLK_CNTL,4,2             ; @ixCG_ACLK_CNTL
	.comm	_cz_mgcg_cgcg_init,4,2          ; @cz_mgcg_cgcg_init
	.comm	_cz_golden_settings_a11,4,2     ; @cz_golden_settings_a11
	.comm	_cz_golden_common_all,4,2       ; @cz_golden_common_all
	.comm	_stoney_mgcg_cgcg_init,4,2      ; @stoney_mgcg_cgcg_init
	.comm	_stoney_golden_settings_a11,4,2 ; @stoney_golden_settings_a11
	.comm	_stoney_golden_common_all,4,2   ; @stoney_golden_common_all
	.no_dead_strip	_gfx_v8_0_init_golden_registers
.subsections_via_symbols
