	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_dpm_sw_init
_si_dpm_sw_init:                        ## @si_dpm_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_AMDGPU_IRQ_CLIENTID_LEGACY@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	leaq	24(%rdi), %r15
	movl	$230, %edx
	movq	%r15, %rcx
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_9
## %bb.1:
	movl	(%r12), %esi
	movq	%r14, %rdi
	movl	$231, %edx
	movq	%r15, %rcx
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_2
LBB0_9:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	_POWER_STATE_TYPE_BALANCED@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 40(%r14)
	movq	%rax, 32(%r14)
	movq	_AMD_DPM_FORCED_LEVEL_AUTO@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%r14)
	movq	72(%r14), %xmm0                 ## xmm0 = mem[0],zero
	pshufd	$68, %xmm0, %xmm0               ## xmm0 = xmm0[0,1,0,1]
	movdqu	%xmm0, 52(%r14)
	movq	_THERMAL_TYPE_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%r14)
	movq	_amdgpu_dpm@GOTPCREL(%rip), %r15
	xorl	%ebx, %ebx
	cmpl	$0, (%r15)
	je	LBB0_9
## %bb.3:
	movq	%r14, %rdi
	callq	_si_dpm_init_microcode
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_9
## %bb.4:
	leaq	20(%r14), %rdi
	movq	_amdgpu_dpm_thermal_work_handler@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_INIT_WORK
	movq	%r14, %rdi
	callq	_mutex_lock
	movq	%r14, %rdi
	callq	_si_dpm_init
	testl	%eax, %eax
	je	LBB0_5
## %bb.8:
	movl	%eax, %ebx
	movq	%r14, %rdi
	callq	_si_dpm_fini
	movq	%r14, %rdi
	callq	_mutex_unlock
	leaq	L_.str.1(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_9
LBB0_5:
	movl	8(%r14), %eax
	movl	%eax, 12(%r14)
	movl	%eax, 16(%r14)
	cmpl	$1, (%r15)
	jne	LBB0_7
## %bb.6:
	movq	%r14, %rdi
	callq	_amdgpu_pm_print_power_states
LBB0_7:
	movq	%r14, %rdi
	callq	_mutex_unlock
	leaq	L_.str(%rip), %rdi
	callq	_DRM_INFO
	xorl	%ebx, %ebx
	jmp	LBB0_9
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ## @AMDGPU_IRQ_CLIENTID_LEGACY
	.comm	_POWER_STATE_TYPE_BALANCED,8,3  ## @POWER_STATE_TYPE_BALANCED
	.comm	_AMD_DPM_FORCED_LEVEL_AUTO,4,2  ## @AMD_DPM_FORCED_LEVEL_AUTO
	.comm	_THERMAL_TYPE_NONE,4,2          ## @THERMAL_TYPE_NONE
	.comm	_amdgpu_dpm,4,2                 ## @amdgpu_dpm
	.comm	_amdgpu_dpm_thermal_work_handler,4,2 ## @amdgpu_dpm_thermal_work_handler
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"amdgpu: dpm initialized\n"

L_.str.1:                               ## @.str.1
	.asciz	"amdgpu: dpm initialization failed\n"

	.no_dead_strip	_si_dpm_sw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_dpm_sw_init
_si_dpm_sw_init:                        ; @si_dpm_sw_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x22, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGE
Lloh1:
	ldr	x22, [x22, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x21, x0, #24
	mov	w2, #230
	mov	x3, x21
	bl	_amdgpu_irq_add_id
	mov	x20, x0
	cbnz	w0, LBB0_2
; %bb.1:
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #231
	mov	x3, x21
	bl	_amdgpu_irq_add_id
	mov	x20, x0
	cbz	w0, LBB0_3
LBB0_2:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_3:
Lloh2:
	adrp	x8, _POWER_STATE_TYPE_BALANCED@GOTPAGE
Lloh3:
	ldr	x8, [x8, _POWER_STATE_TYPE_BALANCED@GOTPAGEOFF]
Lloh4:
	ldr	x8, [x8]
	stp	x8, x8, [x19, #32]
Lloh5:
	adrp	x8, _AMD_DPM_FORCED_LEVEL_AUTO@GOTPAGE
Lloh6:
	ldr	x8, [x8, _AMD_DPM_FORCED_LEVEL_AUTO@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	str	w8, [x19, #28]
	ldr	d0, [x19, #72]
	mov.d	v0[1], v0[0]
Lloh8:
	adrp	x8, _THERMAL_TYPE_NONE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _THERMAL_TYPE_NONE@GOTPAGEOFF]
	stur	q0, [x19, #52]
Lloh10:
	ldr	w8, [x8]
	str	w8, [x19, #48]
Lloh11:
	adrp	x21, _amdgpu_dpm@GOTPAGE
Lloh12:
	ldr	x21, [x21, _amdgpu_dpm@GOTPAGEOFF]
	ldr	w8, [x21]
	cbz	w8, LBB0_7
; %bb.4:
	mov	x0, x19
	bl	_si_dpm_init_microcode
	mov	x20, x0
	cbnz	w0, LBB0_2
; %bb.5:
	add	x0, x19, #20
Lloh13:
	adrp	x8, _amdgpu_dpm_thermal_work_handler@GOTPAGE
Lloh14:
	ldr	x8, [x8, _amdgpu_dpm_thermal_work_handler@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	bl	_INIT_WORK
	mov	x0, x19
	bl	_mutex_lock
	mov	x0, x19
	bl	_si_dpm_init
	cbz	w0, LBB0_8
; %bb.6:
	mov	x20, x0
	mov	x0, x19
	bl	_si_dpm_fini
	mov	x0, x19
	bl	_mutex_unlock
Lloh16:
	adrp	x0, l_.str.1@PAGE
Lloh17:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_2
LBB0_7:
	mov	w20, #0
	b	LBB0_2
LBB0_8:
	ldr	w8, [x19, #8]
	stp	w8, w8, [x19, #12]
	ldr	w8, [x21]
	cmp	w8, #1
	b.ne	LBB0_10
; %bb.9:
	mov	x0, x19
	bl	_amdgpu_pm_print_power_states
LBB0_10:
	mov	x0, x19
	bl	_mutex_unlock
Lloh18:
	adrp	x0, l_.str@PAGE
Lloh19:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_INFO
	mov	w20, #0
	b	LBB0_2
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ; @AMDGPU_IRQ_CLIENTID_LEGACY
	.comm	_POWER_STATE_TYPE_BALANCED,8,3  ; @POWER_STATE_TYPE_BALANCED
	.comm	_AMD_DPM_FORCED_LEVEL_AUTO,4,2  ; @AMD_DPM_FORCED_LEVEL_AUTO
	.comm	_THERMAL_TYPE_NONE,4,2          ; @THERMAL_TYPE_NONE
	.comm	_amdgpu_dpm,4,2                 ; @amdgpu_dpm
	.comm	_amdgpu_dpm_thermal_work_handler,4,2 ; @amdgpu_dpm_thermal_work_handler
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"amdgpu: dpm initialized\n"

l_.str.1:                               ; @.str.1
	.asciz	"amdgpu: dpm initialization failed\n"

	.no_dead_strip	_si_dpm_sw_init
.subsections_via_symbols
