	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nv50_gr_construct_gene_vfetch
_nv50_gr_construct_gene_vfetch:         ## @nv50_gr_construct_gene_vfetch
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	(%rdi), %r14
	movl	(%r14), %edi
	callq	_IS_NVA3F
	xorl	%r12d, %r12d
	testq	%rax, %rax
	setne	%r12b
	shll	$4, %r12d
	addl	$16, %r12d
	cmpl	$160, (%r14)
	jl	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_xf_emit
LBB0_2:
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$15, %edx
	callq	_xf_emit
	movl	%r12d, %ebx
	shrl	$3, %ebx
	leal	-1(%rbx), %esi
	movq	%r15, %rdi
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movl	%ebx, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$32, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movl	(%r14), %edi
	callq	_IS_NVA3F
	movl	$11, %esi
	testq	%rax, %rax
	jne	LBB0_4
## %bb.3:
	xorl	%esi, %esi
	cmpl	$160, (%r14)
	setge	%sil
	orl	$8, %esi
LBB0_4:
	xorl	%r13d, %r13d
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$26, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$12, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$8, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	xorl	%edx, %edx
	cmpl	$80, (%r14)
	setne	%dl
	shll	$10, %edx
	orl	$1023, %edx                     ## imm = 0x3FF
	movq	%r15, %rdi
	movl	$1, %esi
	callq	_xf_emit
	cmpl	$168, (%r14)
	jne	LBB0_6
## %bb.5:
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$7680, %edx                     ## imm = 0x1E00
	callq	_xf_emit
LBB0_6:
	movq	%r15, %rdi
	movl	$12, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$15, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movl	(%r14), %eax
	addl	$-81, %eax
	cmpl	$79, %eax
	adcl	$1, %r13d
	movq	%r15, %rdi
	movl	%r13d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movl	(%r14), %edi
	callq	_IS_NVA3F
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	testq	%rax, %rax
	sete	%cl
	setne	%dl
	leal	8(,%rdx,8), %esi
	movl	$2, %r13d
	subl	%ecx, %r13d
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	%r13d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$2, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	cmpl	$160, (%r14)
	jl	LBB0_8
## %bb.7:
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
LBB0_8:
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$2, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$3, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$3, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$3, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$3, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$3, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$3, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movl	(%r14), %edi
	callq	_IS_NVA3F
	testq	%rax, %rax
	je	LBB0_10
## %bb.9:
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$3, %esi
	xorl	%edx, %edx
	callq	_xf_emit
LBB0_10:
	movl	(%r14), %edi
	callq	_IS_NVA3F
	xorl	%ecx, %ecx
	testq	%rax, %rax
	sete	%cl
	leal	(%rcx,%rcx,2), %esi
	addl	$2, %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movl	(%r14), %edi
	cmpl	$159, %edi
	jg	LBB0_12
## %bb.11:
	movq	%r15, %rdi
	movl	$65, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movl	$17, %esi
	jmp	LBB0_13
LBB0_12:
	callq	_IS_NVA3F
	xorl	%ecx, %ecx
	testq	%rax, %rax
	setne	%cl
	leal	80(,%rcx,8), %esi
LBB0_13:
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$15, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_xf_emit
	shll	$2, %r12d
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$4, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movl	(%r14), %edi
	callq	_IS_NVA3F
	testq	%rax, %rax
	movl	$22, %eax
	movl	$29, %esi
	cmovel	%eax, %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$15, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	%ebx, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movl	(%r14), %edi
	movl	$8, %esi
	cmpl	$160, %edi
	jl	LBB0_15
## %bb.14:
	callq	_IS_NVA3F
	xorl	%ecx, %ecx
	testq	%rax, %rax
	setne	%cl
	leal	(%rcx,%rcx,4), %esi
	addl	$7, %esi
LBB0_15:
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$10, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movl	(%r14), %edi
	xorl	%eax, %eax
	cmpl	$160, %edi
	sete	%al
	leal	3(,%rax,8), %ebx
	.p2align	4, 0x90
LBB0_16:                                ## =>This Inner Loop Header: Depth=1
	callq	_IS_NVA3F
	testq	%rax, %rax
	je	LBB0_18
## %bb.17:                              ##   in Loop: Header=BB0_16 Depth=1
	movq	%r15, %rdi
	movl	$32, %esi
	xorl	%edx, %edx
	callq	_xf_emit
LBB0_18:                                ##   in Loop: Header=BB0_16 Depth=1
	movq	%r15, %rdi
	movl	$512, %esi                      ## imm = 0x200
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$4, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$4, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	subl	$1, %ebx
	jb	LBB0_20
## %bb.19:                              ##   in Loop: Header=BB0_16 Depth=1
	movl	(%r14), %edi
	jmp	LBB0_16
LBB0_20:
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$15, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
                                        ## kill: def $esi killed $esi killed $rsi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movq	%r15, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_xf_emit
	movl	(%r14), %edi
	callq	_IS_NVA3F
	xorl	%ecx, %ecx
	testq	%rax, %rax
	setne	%cl
	leal	(%rcx,%rcx), %esi
	addl	$5, %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_xf_emit                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_nv50_gr_construct_gene_vfetch
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nv50_gr_construct_gene_vfetch
_nv50_gr_construct_gene_vfetch:         ; @nv50_gr_construct_gene_vfetch
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x24, [x0]
	ldr	w0, [x24]
	bl	_IS_NVA3F
	cmp	x0, #0
	mov	w8, #32
	mov	w9, #16
	csel	w22, w9, w8, eq
	ldr	w8, [x24]
	cmp	w8, #160
	b.lt	LBB0_2
; %bb.1:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_xf_emit
LBB0_2:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #15
	bl	_xf_emit
	lsr	w20, w22, #3
	sub	w21, w20, #1
	mov	x0, x19
	mov	x1, x21
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #32
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	ldr	w0, [x24]
	bl	_IS_NVA3F
	cbz	x0, LBB0_4
; %bb.3:
	mov	w1, #11
	b	LBB0_5
LBB0_4:
	ldr	w8, [x24]
	cmp	w8, #159
	mov	w8, #8
	cinc	w1, w8, gt
LBB0_5:
	mov	x0, x19
	mov	w2, #0
	bl	_xf_emit
	mov	w23, #1
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #26
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #12
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_xf_emit
	mov	w25, #8
	mov	x0, x19
	mov	w1, #1
	mov	w2, #8
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	ldr	w8, [x24]
	mov	w9, #2047
	mov	w10, #1023
	cmp	w8, #80
	csel	w2, w10, w9, eq
	mov	x0, x19
	mov	w1, #1
	bl	_xf_emit
	ldr	w8, [x24]
	cmp	w8, #168
	b.ne	LBB0_7
; %bb.6:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #7680
	bl	_xf_emit
LBB0_7:
	mov	x0, x19
	mov	w1, #12
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #15
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x21
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	ldr	w8, [x24]
	sub	w8, w8, #81
	cmp	w8, #79
	cinc	w1, w23, lo
	mov	x0, x19
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	ldr	w0, [x24]
	bl	_IS_NVA3F
	cmp	x0, #0
	mov	w8, #16
	csel	w1, w25, w8, eq
	cinc	w23, w23, ne
	mov	x0, x19
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x23
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #2
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	bl	_xf_emit
	ldr	w8, [x24]
	cmp	w8, #160
	b.lt	LBB0_9
; %bb.8:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
LBB0_9:
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	bl	_xf_emit
	mov	w23, #2
	mov	x0, x19
	mov	w1, #2
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #3
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #3
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #3
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #3
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #3
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #3
	mov	w2, #0
	bl	_xf_emit
	ldr	w0, [x24]
	bl	_IS_NVA3F
	cbz	x0, LBB0_11
; %bb.10:
	mov	x0, x19
	mov	x1, x22
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #3
	mov	w2, #0
	bl	_xf_emit
LBB0_11:
	ldr	w0, [x24]
	bl	_IS_NVA3F
	cmp	x0, #0
	mov	w8, #5
	csel	w1, w8, w23, eq
	mov	x0, x19
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	ldr	w0, [x24]
	cmp	w0, #159
	b.gt	LBB0_13
; %bb.12:
	mov	x0, x19
	mov	w1, #65
	mov	w2, #0
	bl	_xf_emit
	mov	w1, #17
	b	LBB0_14
LBB0_13:
	bl	_IS_NVA3F
	cmp	x0, #0
	mov	w8, #88
	mov	w9, #80
	csel	w1, w9, w8, eq
LBB0_14:
	mov	x0, x19
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #15
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x21
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_xf_emit
	lsl	w1, w22, #2
	mov	x0, x19
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #4
	mov	w2, #0
	bl	_xf_emit
	ldr	w0, [x24]
	bl	_IS_NVA3F
	cmp	x0, #0
	mov	w8, #29
	mov	w9, #22
	csel	w1, w9, w8, eq
	mov	x0, x19
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #15
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x21
	mov	w2, #0
	bl	_xf_emit
	ldr	w0, [x24]
	cmp	w0, #160
	b.ge	LBB0_16
; %bb.15:
	mov	w1, #8
	b	LBB0_17
LBB0_16:
	bl	_IS_NVA3F
	cmp	x0, #0
	mov	w8, #12
	mov	w9, #7
	csel	w1, w9, w8, eq
LBB0_17:
	mov	x0, x19
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #10
	mov	w2, #0
	bl	_xf_emit
	ldr	w0, [x24]
	mov	w8, #3
	mov	w9, #11
	cmp	w0, #160
	csel	w22, w9, w8, eq
	bl	_IS_NVA3F
	cbz	x0, LBB0_19
LBB0_18:
	mov	x0, x19
	mov	w1, #32
	mov	w2, #0
	bl	_xf_emit
LBB0_19:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	w1, #512
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #4
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #4
	mov	w2, #0
	bl	_xf_emit
	cbz	w22, LBB0_21
; %bb.20:                               ;   in Loop: Header=BB0_19 Depth=1
	ldr	w0, [x24]
	sub	w22, w22, #1
	bl	_IS_NVA3F
	cbnz	x0, LBB0_18
	b	LBB0_19
LBB0_21:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #15
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x21
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_xf_emit
	ldr	w0, [x24]
	bl	_IS_NVA3F
	cmp	x0, #0
	mov	w8, #7
	mov	w9, #5
	csel	w1, w9, w8, eq
	mov	x0, x19
	mov	w2, #0
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_xf_emit
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_nv50_gr_construct_gene_vfetch
.subsections_via_symbols
