	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vce_v2_0_start
_vce_v2_0_start:                        ## @vce_v2_0_start
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_mmVCE_STATUS@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	movl	$1, %esi
	movl	$-2, %edx
	callq	_WREG32_P
	movq	%r14, %rdi
	callq	_vce_v2_0_init_cg
	movq	%r14, %rdi
	callq	_vce_v2_0_disable_cg
	movq	%r14, %rdi
	callq	_vce_v2_0_mc_resume
	movq	(%r14), %rbx
	movq	_mmVCE_RB_RPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	8(%rbx), %edi
	callq	_lower_32_bits
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_WPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	8(%rbx), %edi
	callq	_lower_32_bits
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_BASE_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%rbx), %esi
	callq	_WREG32
	movq	_mmVCE_RB_BASE_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	(%rbx), %edi
	callq	_upper_32_bits
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	4(%rbx), %eax
	leal	3(%rax), %esi
	testl	%eax, %eax
	cmovnsl	%eax, %esi
	sarl	$2, %esi
	callq	_WREG32
	movq	(%r14), %rbx
	movq	_mmVCE_RB_RPTR2@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	20(%rbx), %edi
	callq	_lower_32_bits
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_WPTR2@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	20(%rbx), %edi
	callq	_lower_32_bits
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_BASE_LO2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	12(%rbx), %esi
	callq	_WREG32
	movq	_mmVCE_RB_BASE_HI2@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	12(%rbx), %edi
	callq	_upper_32_bits
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_SIZE2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%rbx), %eax
	leal	3(%rax), %esi
	testl	%eax, %eax
	cmovnsl	%eax, %esi
	sarl	$2, %esi
	callq	_WREG32
	movq	_VCE_VCPU_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_CLK_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_WREG32_FIELD
	movq	_VCE_SOFT_RESET@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_ECPU_SOFT_RESET@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movl	$1, %edx
	callq	_WREG32_FIELD
	movl	$100, %edi
	callq	_mdelay
	movl	(%r12), %edi
	movl	(%rbx), %esi
	xorl	%edx, %edx
	callq	_WREG32_FIELD
	movq	%r14, %rdi
	callq	_vce_v2_0_firmware_loaded
	movl	%eax, %ebx
	movl	(%r15), %edi
	xorl	%esi, %esi
	movl	$-2, %edx
	callq	_WREG32_P
	testl	%ebx, %ebx
	je	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_ERROR
LBB0_2:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_mmVCE_STATUS,4,2               ## @mmVCE_STATUS
	.comm	_mmVCE_RB_RPTR,4,2              ## @mmVCE_RB_RPTR
	.comm	_mmVCE_RB_WPTR,4,2              ## @mmVCE_RB_WPTR
	.comm	_mmVCE_RB_BASE_LO,4,2           ## @mmVCE_RB_BASE_LO
	.comm	_mmVCE_RB_BASE_HI,4,2           ## @mmVCE_RB_BASE_HI
	.comm	_mmVCE_RB_SIZE,4,2              ## @mmVCE_RB_SIZE
	.comm	_mmVCE_RB_RPTR2,4,2             ## @mmVCE_RB_RPTR2
	.comm	_mmVCE_RB_WPTR2,4,2             ## @mmVCE_RB_WPTR2
	.comm	_mmVCE_RB_BASE_LO2,4,2          ## @mmVCE_RB_BASE_LO2
	.comm	_mmVCE_RB_BASE_HI2,4,2          ## @mmVCE_RB_BASE_HI2
	.comm	_mmVCE_RB_SIZE2,4,2             ## @mmVCE_RB_SIZE2
	.comm	_VCE_VCPU_CNTL,4,2              ## @VCE_VCPU_CNTL
	.comm	_CLK_EN,4,2                     ## @CLK_EN
	.comm	_VCE_SOFT_RESET,4,2             ## @VCE_SOFT_RESET
	.comm	_ECPU_SOFT_RESET,4,2            ## @ECPU_SOFT_RESET
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"VCE not responding, giving up!!!\n"

	.no_dead_strip	_vce_v2_0_start
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vce_v2_0_start
_vce_v2_0_start:                        ; @vce_v2_0_start
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x21, _mmVCE_STATUS@GOTPAGE
Lloh1:
	ldr	x21, [x21, _mmVCE_STATUS@GOTPAGEOFF]
	ldr	w0, [x21]
	mov	w1, #1
	mov	w2, #-2
	bl	_WREG32_P
	mov	x0, x19
	bl	_vce_v2_0_init_cg
	mov	x0, x19
	bl	_vce_v2_0_disable_cg
	mov	x0, x19
	bl	_vce_v2_0_mc_resume
	ldr	x22, [x19]
Lloh2:
	adrp	x8, _mmVCE_RB_RPTR@GOTPAGE
Lloh3:
	ldr	x8, [x8, _mmVCE_RB_RPTR@GOTPAGEOFF]
Lloh4:
	ldr	w20, [x8]
	ldr	w0, [x22, #8]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh5:
	adrp	x8, _mmVCE_RB_WPTR@GOTPAGE
Lloh6:
	ldr	x8, [x8, _mmVCE_RB_WPTR@GOTPAGEOFF]
Lloh7:
	ldr	w20, [x8]
	ldr	w0, [x22, #8]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh8:
	adrp	x8, _mmVCE_RB_BASE_LO@GOTPAGE
Lloh9:
	ldr	x8, [x8, _mmVCE_RB_BASE_LO@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	ldr	w1, [x22]
	bl	_WREG32
Lloh11:
	adrp	x8, _mmVCE_RB_BASE_HI@GOTPAGE
Lloh12:
	ldr	x8, [x8, _mmVCE_RB_BASE_HI@GOTPAGEOFF]
Lloh13:
	ldr	w20, [x8]
	ldr	w0, [x22]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh14:
	adrp	x8, _mmVCE_RB_SIZE@GOTPAGE
Lloh15:
	ldr	x8, [x8, _mmVCE_RB_SIZE@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	ldr	w8, [x22, #4]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w1, w8, #2
	bl	_WREG32
	ldr	x22, [x19]
Lloh17:
	adrp	x8, _mmVCE_RB_RPTR2@GOTPAGE
Lloh18:
	ldr	x8, [x8, _mmVCE_RB_RPTR2@GOTPAGEOFF]
Lloh19:
	ldr	w20, [x8]
	ldr	w0, [x22, #20]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh20:
	adrp	x8, _mmVCE_RB_WPTR2@GOTPAGE
Lloh21:
	ldr	x8, [x8, _mmVCE_RB_WPTR2@GOTPAGEOFF]
Lloh22:
	ldr	w20, [x8]
	ldr	w0, [x22, #20]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh23:
	adrp	x8, _mmVCE_RB_BASE_LO2@GOTPAGE
Lloh24:
	ldr	x8, [x8, _mmVCE_RB_BASE_LO2@GOTPAGEOFF]
Lloh25:
	ldr	w0, [x8]
	ldr	w1, [x22, #12]
	bl	_WREG32
Lloh26:
	adrp	x8, _mmVCE_RB_BASE_HI2@GOTPAGE
Lloh27:
	ldr	x8, [x8, _mmVCE_RB_BASE_HI2@GOTPAGEOFF]
Lloh28:
	ldr	w20, [x8]
	ldr	w0, [x22, #12]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh29:
	adrp	x8, _mmVCE_RB_SIZE2@GOTPAGE
Lloh30:
	ldr	x8, [x8, _mmVCE_RB_SIZE2@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	ldr	w8, [x22, #16]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w1, w8, #2
	bl	_WREG32
Lloh32:
	adrp	x8, _VCE_VCPU_CNTL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _VCE_VCPU_CNTL@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
Lloh35:
	adrp	x8, _CLK_EN@GOTPAGE
Lloh36:
	ldr	x8, [x8, _CLK_EN@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	mov	w2, #1
	bl	_WREG32_FIELD
Lloh38:
	adrp	x20, _VCE_SOFT_RESET@GOTPAGE
Lloh39:
	ldr	x20, [x20, _VCE_SOFT_RESET@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh40:
	adrp	x22, _ECPU_SOFT_RESET@GOTPAGE
Lloh41:
	ldr	x22, [x22, _ECPU_SOFT_RESET@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	w2, #1
	bl	_WREG32_FIELD
	mov	w0, #100
	bl	_mdelay
	ldr	w0, [x20]
	ldr	w1, [x22]
	mov	w2, #0
	bl	_WREG32_FIELD
	mov	x0, x19
	bl	_vce_v2_0_firmware_loaded
	mov	x19, x0
	ldr	w0, [x21]
	mov	w1, #0
	mov	w2, #-2
	bl	_WREG32_P
	cbz	w19, LBB0_2
; %bb.1:
Lloh42:
	adrp	x0, l_.str@PAGE
Lloh43:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
LBB0_2:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh42, Lloh43
	.cfi_endproc
                                        ; -- End function
	.comm	_mmVCE_STATUS,4,2               ; @mmVCE_STATUS
	.comm	_mmVCE_RB_RPTR,4,2              ; @mmVCE_RB_RPTR
	.comm	_mmVCE_RB_WPTR,4,2              ; @mmVCE_RB_WPTR
	.comm	_mmVCE_RB_BASE_LO,4,2           ; @mmVCE_RB_BASE_LO
	.comm	_mmVCE_RB_BASE_HI,4,2           ; @mmVCE_RB_BASE_HI
	.comm	_mmVCE_RB_SIZE,4,2              ; @mmVCE_RB_SIZE
	.comm	_mmVCE_RB_RPTR2,4,2             ; @mmVCE_RB_RPTR2
	.comm	_mmVCE_RB_WPTR2,4,2             ; @mmVCE_RB_WPTR2
	.comm	_mmVCE_RB_BASE_LO2,4,2          ; @mmVCE_RB_BASE_LO2
	.comm	_mmVCE_RB_BASE_HI2,4,2          ; @mmVCE_RB_BASE_HI2
	.comm	_mmVCE_RB_SIZE2,4,2             ; @mmVCE_RB_SIZE2
	.comm	_VCE_VCPU_CNTL,4,2              ; @VCE_VCPU_CNTL
	.comm	_CLK_EN,4,2                     ; @CLK_EN
	.comm	_VCE_SOFT_RESET,4,2             ; @VCE_SOFT_RESET
	.comm	_ECPU_SOFT_RESET,4,2            ; @ECPU_SOFT_RESET
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"VCE not responding, giving up!!!\n"

	.no_dead_strip	_vce_v2_0_start
.subsections_via_symbols
