	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_vgpu_create
_intel_vgpu_create:                     ## @intel_vgpu_create
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	%rsi, %rdi
	callq	_mdev_parent_dev
	movq	%rax, %rdi
	callq	_kdev_to_i915
	movq	(%rax), %r13
	movq	_intel_gvt_ops@GOTPCREL(%rip), %r12
	movq	(%r12), %rax
	movq	8(%rax), %rbx
	movq	%r15, %rdi
	callq	_kobject_name
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	*%rbx
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	(%r12), %rcx
	movq	%r13, %rdi
	movq	%rax, %rsi
	callq	*(%rcx)
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_IS_ERR_OR_NULL
	testq	%rax, %rax
	je	LBB0_7
## %bb.3:
	testq	%rbx, %rbx
	je	LBB0_4
## %bb.5:
	movq	%rbx, %rdi
	callq	_PTR_ERR
	movl	%eax, %ebx
	jmp	LBB0_6
LBB0_1:
	movq	%r15, %rdi
	callq	_kobject_name
	leaq	L_.str(%rip), %rdi
	movl	%eax, %esi
	callq	_gvt_vgpu_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_8
LBB0_7:
	movq	%rbx, %rdi
	addq	$8, %rdi
	movq	_intel_vgpu_release_work@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_INIT_WORK
	movq	%r14, (%rbx)
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_mdev_set_drvdata
	movq	%r14, %rdi
	callq	_mdev_dev
	movl	%eax, %edi
	callq	_dev_name
	leaq	L_.str.2(%rip), %rdi
	movl	%eax, %esi
	callq	_gvt_dbg_core
	xorl	%ebx, %ebx
	jmp	LBB0_8
LBB0_4:
	movq	_EFAULT@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_6:
	leaq	L_.str.1(%rip), %rdi
	movl	%ebx, %esi
	callq	_gvt_err
LBB0_8:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_intel_gvt_ops,8,3              ## @intel_gvt_ops
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to find type %s to create\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_EFAULT,4,2                     ## @EFAULT
L_.str.1:                               ## @.str.1
	.asciz	"failed to create intel vgpu: %d\n"

	.comm	_intel_vgpu_release_work,4,2    ## @intel_vgpu_release_work
L_.str.2:                               ## @.str.2
	.asciz	"intel_vgpu_create succeeded for mdev: %s\n"

	.no_dead_strip	_intel_vgpu_create
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_vgpu_create
_intel_vgpu_create:                     ; @intel_vgpu_create
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
	mov	x0, x1
	bl	_mdev_parent_dev
	bl	_kdev_to_i915
	ldr	x21, [x0]
Lloh0:
	adrp	x22, _intel_gvt_ops@GOTPAGE
Lloh1:
	ldr	x22, [x22, _intel_gvt_ops@GOTPAGEOFF]
	ldr	x8, [x22]
	ldr	x23, [x8, #8]
	mov	x0, x20
	bl	_kobject_name
	mov	x1, x0
	mov	x0, x21
	blr	x23
	cbz	x0, LBB0_4
; %bb.1:
	mov	x1, x0
	ldr	x8, [x22]
	ldr	x8, [x8]
	mov	x0, x21
	blr	x8
	mov	x20, x0
	bl	_IS_ERR_OR_NULL
	cbz	x0, LBB0_5
; %bb.2:
	cbz	x20, LBB0_6
; %bb.3:
	mov	x0, x20
	bl	_PTR_ERR
	mov	x19, x0
	b	LBB0_7
LBB0_4:
	mov	x0, x20
	bl	_kobject_name
	mov	x1, x0
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	bl	_gvt_vgpu_err
Lloh4:
	adrp	x8, _EINVAL@GOTPAGE
Lloh5:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	neg	w19, w8
	b	LBB0_8
LBB0_5:
	add	x0, x20, #8
Lloh7:
	adrp	x8, _intel_vgpu_release_work@GOTPAGE
Lloh8:
	ldr	x8, [x8, _intel_vgpu_release_work@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
	bl	_INIT_WORK
	str	x19, [x20]
	mov	x0, x19
	mov	x1, x20
	bl	_mdev_set_drvdata
	mov	x0, x19
	bl	_mdev_dev
	bl	_dev_name
	mov	x1, x0
Lloh10:
	adrp	x0, l_.str.2@PAGE
Lloh11:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_gvt_dbg_core
	mov	w19, #0
	b	LBB0_8
LBB0_6:
Lloh12:
	adrp	x8, _EFAULT@GOTPAGE
Lloh13:
	ldr	x8, [x8, _EFAULT@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	neg	w19, w8
LBB0_7:
Lloh15:
	adrp	x0, l_.str.1@PAGE
Lloh16:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	x1, x19
	bl	_gvt_err
LBB0_8:
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_intel_gvt_ops,8,3              ; @intel_gvt_ops
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to find type %s to create\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_EFAULT,4,2                     ; @EFAULT
l_.str.1:                               ; @.str.1
	.asciz	"failed to create intel vgpu: %d\n"

	.comm	_intel_vgpu_release_work,4,2    ; @intel_vgpu_release_work
l_.str.2:                               ; @.str.2
	.asciz	"intel_vgpu_create succeeded for mdev: %s\n"

	.no_dead_strip	_intel_vgpu_create
.subsections_via_symbols
