	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tiadc_buffer_preenable
_tiadc_buffer_preenable:                ## @tiadc_buffer_preenable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_iio_priv
	movq	%rax, %r14
	movq	_REG_IRQCLR@GOTPCREL(%rip), %rax
	movq	_IRQENB_FIFO1THRES@GOTPCREL(%rip), %rcx
	movq	_IRQENB_FIFO1OVRRUN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_IRQENB_FIFO1UNDRFLW@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r14, %rdi
	callq	_tiadc_writel
	movq	_REG_FIFO1CNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_tiadc_readl
	testl	%eax, %eax
	jle	LBB0_3
## %bb.1:
	movl	%eax, %ebx
	movq	_REG_FIFO1@GOTPCREL(%rip), %r15
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_tiadc_readl
	decl	%ebx
	jne	LBB0_2
LBB0_3:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_IRQCLR,4,2                 ## @REG_IRQCLR
	.comm	_IRQENB_FIFO1THRES,4,2          ## @IRQENB_FIFO1THRES
	.comm	_IRQENB_FIFO1OVRRUN,4,2         ## @IRQENB_FIFO1OVRRUN
	.comm	_IRQENB_FIFO1UNDRFLW,4,2        ## @IRQENB_FIFO1UNDRFLW
	.comm	_REG_FIFO1CNT,4,2               ## @REG_FIFO1CNT
	.comm	_REG_FIFO1,4,2                  ## @REG_FIFO1
	.no_dead_strip	_tiadc_buffer_preenable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tiadc_buffer_preenable
_tiadc_buffer_preenable:                ; @tiadc_buffer_preenable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_iio_priv
	mov	x19, x0
Lloh0:
	adrp	x8, _REG_IRQCLR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _REG_IRQCLR@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _IRQENB_FIFO1THRES@GOTPAGE
Lloh4:
	ldr	x8, [x8, _IRQENB_FIFO1THRES@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _IRQENB_FIFO1OVRRUN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _IRQENB_FIFO1OVRRUN@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh9:
	adrp	x9, _IRQENB_FIFO1UNDRFLW@GOTPAGE
Lloh10:
	ldr	x9, [x9, _IRQENB_FIFO1UNDRFLW@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w2, w8, w9
	bl	_tiadc_writel
Lloh12:
	adrp	x8, _REG_FIFO1CNT@GOTPAGE
Lloh13:
	ldr	x8, [x8, _REG_FIFO1CNT@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tiadc_readl
	cmp	w0, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x20, x0
Lloh15:
	adrp	x21, _REG_FIFO1@GOTPAGE
Lloh16:
	ldr	x21, [x21, _REG_FIFO1@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x21]
	mov	x0, x19
	bl	_tiadc_readl
	subs	w20, w20, #1
	b.ne	LBB0_2
LBB0_3:
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_IRQCLR,4,2                 ; @REG_IRQCLR
	.comm	_IRQENB_FIFO1THRES,4,2          ; @IRQENB_FIFO1THRES
	.comm	_IRQENB_FIFO1OVRRUN,4,2         ; @IRQENB_FIFO1OVRRUN
	.comm	_IRQENB_FIFO1UNDRFLW,4,2        ; @IRQENB_FIFO1UNDRFLW
	.comm	_REG_FIFO1CNT,4,2               ; @REG_FIFO1CNT
	.comm	_REG_FIFO1,4,2                  ; @REG_FIFO1
	.no_dead_strip	_tiadc_buffer_preenable
.subsections_via_symbols
