	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v9_0_ring_emit_vm_flush
_gfx_v9_0_ring_emit_vm_flush:           ## @gfx_v9_0_ring_emit_vm_flush
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	callq	_amdgpu_gmc_emit_flush_gpu_tlb
	movq	(%rbx), %rax
	movq	(%rax), %rax
	movq	_AMDGPU_RING_TYPE_GFX@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_1
## %bb.2:
	movq	_PACKET3_PFP_SYNC_ME@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%rbx, %rdi
	xorl	%esi, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
LBB0_1:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_RING_TYPE_GFX,8,3       ## @AMDGPU_RING_TYPE_GFX
	.comm	_PACKET3_PFP_SYNC_ME,4,2        ## @PACKET3_PFP_SYNC_ME
	.no_dead_strip	_gfx_v9_0_ring_emit_vm_flush
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v9_0_ring_emit_vm_flush
_gfx_v9_0_ring_emit_vm_flush:           ; @gfx_v9_0_ring_emit_vm_flush
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_amdgpu_gmc_emit_flush_gpu_tlb
	ldr	x8, [x19]
	ldr	x8, [x8]
Lloh0:
	adrp	x9, _AMDGPU_RING_TYPE_GFX@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMDGPU_RING_TYPE_GFX@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _PACKET3_PFP_SYNC_ME@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PACKET3_PFP_SYNC_ME@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
LBB0_2:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_RING_TYPE_GFX,8,3       ; @AMDGPU_RING_TYPE_GFX
	.comm	_PACKET3_PFP_SYNC_ME,4,2        ; @PACKET3_PFP_SYNC_ME
	.no_dead_strip	_gfx_v9_0_ring_emit_vm_flush
.subsections_via_symbols
