	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function chv_crtc_clock_get
_chv_crtc_clock_get:                    ## @chv_crtc_clock_get
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	(%rdi), %rdi
	callq	_to_i915
	movq	%rax, %r12
	movl	(%rbx), %r15d
	movl	%r15d, %edi
	callq	_vlv_pipe_to_channel
	movl	%eax, %r14d
	movq	_DPLL_VCO_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%rbx)
	je	LBB0_4
## %bb.1:
	movq	%rbx, -80(%rbp)                 ## 8-byte Spill
	movq	%r12, %rdi
	callq	_vlv_dpio_get
	movl	%r14d, %edi
	callq	_CHV_CMN_DW13
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_vlv_dpio_read
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	%r14d, %edi
	callq	_CHV_PLL_DW0
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_vlv_dpio_read
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	%r14d, %edi
	callq	_CHV_PLL_DW1
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_vlv_dpio_read
	movl	%eax, %r13d
	movl	%r14d, %edi
	callq	_CHV_PLL_DW2
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_vlv_dpio_read
	movl	%eax, %ebx
	movl	%r14d, %edi
	callq	_CHV_PLL_DW3
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_vlv_dpio_read
	movl	%eax, %r14d
	movq	%r12, %rdi
	callq	_vlv_dpio_put
	movl	%r13d, %eax
	andl	$7, %eax
	movq	_DPIO_CHV_M1_DIV_BY_2@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	cmpl	(%rcx), %eax
	sete	%dl
	addl	%edx, %edx
	movl	%edx, -72(%rbp)
	movzbl	-44(%rbp), %eax                 ## 1-byte Folded Reload
	shll	$22, %eax
	movl	%eax, -68(%rbp)
	movq	_DPIO_CHV_FRAC_DIV_EN@GOTPCREL(%rip), %rcx
	testl	%r14d, (%rcx)
	je	LBB0_3
## %bb.2:
	andl	$4194303, %ebx                  ## imm = 0x3FFFFF
	orl	%eax, %ebx
	movl	%ebx, -68(%rbp)
LBB0_3:
	movq	_DPIO_CHV_N_DIV_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r13d
	andl	$15, %r13d
	movl	%r13d, -64(%rbp)
	movq	_DPIO_CHV_P1_DIV_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	movl	%edx, %eax
	sarl	%cl, %eax
	movq	_DPIO_CHV_P2_DIV_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %edx
	andl	$7, %eax
	movl	%eax, -60(%rbp)
	andl	$31, %edx
	movl	%edx, -56(%rbp)
	leaq	-72(%rbp), %rsi
	movl	$100000, %edi                   ## imm = 0x186A0
	callq	_chv_calc_dpll_params
	movq	-80(%rbp), %rcx                 ## 8-byte Reload
	movl	%eax, 4(%rcx)
LBB0_4:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DPLL_VCO_ENABLE,4,2            ## @DPLL_VCO_ENABLE
	.comm	_DPIO_CHV_M1_DIV_BY_2,4,2       ## @DPIO_CHV_M1_DIV_BY_2
	.comm	_DPIO_CHV_FRAC_DIV_EN,4,2       ## @DPIO_CHV_FRAC_DIV_EN
	.comm	_DPIO_CHV_N_DIV_SHIFT,4,2       ## @DPIO_CHV_N_DIV_SHIFT
	.comm	_DPIO_CHV_P1_DIV_SHIFT,4,2      ## @DPIO_CHV_P1_DIV_SHIFT
	.comm	_DPIO_CHV_P2_DIV_SHIFT,4,2      ## @DPIO_CHV_P2_DIV_SHIFT
	.no_dead_strip	_chv_crtc_clock_get
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function chv_crtc_clock_get
_chv_crtc_clock_get:                    ; @chv_crtc_clock_get
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	ldr	x0, [x0]
	bl	_to_i915
	mov	x21, x0
	ldr	w22, [x19]
	mov	x0, x22
	bl	_vlv_pipe_to_channel
	ldr	w8, [x19, #8]
Lloh0:
	adrp	x9, _DPLL_VCO_ENABLE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _DPLL_VCO_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.1:
	mov	x23, x0
	mov	x0, x21
	bl	_vlv_dpio_get
	mov	x0, x23
	bl	_CHV_CMN_DW13
	mov	x2, x0
	mov	x0, x21
	mov	x1, x22
	bl	_vlv_dpio_read
	mov	x20, x0
	mov	x0, x23
	bl	_CHV_PLL_DW0
	mov	x2, x0
	mov	x0, x21
	mov	x1, x22
	bl	_vlv_dpio_read
	mov	x26, x0
	mov	x0, x23
	bl	_CHV_PLL_DW1
	mov	x2, x0
	mov	x0, x21
	mov	x1, x22
	bl	_vlv_dpio_read
	mov	x24, x0
	mov	x0, x23
	bl	_CHV_PLL_DW2
	mov	x2, x0
	mov	x0, x21
	mov	x1, x22
	bl	_vlv_dpio_read
	mov	x25, x0
	mov	x0, x23
	bl	_CHV_PLL_DW3
	mov	x2, x0
	mov	x0, x21
	mov	x1, x22
	bl	_vlv_dpio_read
	mov	x22, x0
	mov	x0, x21
	bl	_vlv_dpio_put
Lloh3:
	adrp	x8, _DPIO_CHV_M1_DIV_BY_2@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DPIO_CHV_M1_DIV_BY_2@GOTPAGEOFF]
	and	w9, w24, #0x7
Lloh5:
	ldr	w8, [x8]
	cmp	w9, w8
	cset	w8, eq
	lsl	w9, w8, #1
	ubfiz	w8, w26, #22, #8
	stp	w9, w8, [sp, #8]
Lloh6:
	adrp	x9, _DPIO_CHV_FRAC_DIV_EN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DPIO_CHV_FRAC_DIV_EN@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	tst	w9, w22
	b.eq	LBB0_3
; %bb.2:
	and	w9, w25, #0x3fffff
	orr	w8, w9, w8
	str	w8, [sp, #12]
LBB0_3:
Lloh9:
	adrp	x8, _DPIO_CHV_N_DIV_SHIFT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DPIO_CHV_N_DIV_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	asr	w8, w24, w8
Lloh12:
	adrp	x9, _DPIO_CHV_P1_DIV_SHIFT@GOTPAGE
Lloh13:
	ldr	x9, [x9, _DPIO_CHV_P1_DIV_SHIFT@GOTPAGEOFF]
	and	w8, w8, #0xf
Lloh14:
	ldr	w9, [x9]
	asr	w9, w20, w9
	and	w9, w9, #0x7
	stp	w8, w9, [sp, #16]
Lloh15:
	adrp	x8, _DPIO_CHV_P2_DIV_SHIFT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DPIO_CHV_P2_DIV_SHIFT@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	asr	w8, w20, w8
	and	w8, w8, #0x1f
	str	w8, [sp, #24]
	add	x1, sp, #8
	mov	w0, #34464
	movk	w0, #1, lsl #16
	bl	_chv_calc_dpll_params
	str	w0, [x19, #4]
LBB0_4:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_DPLL_VCO_ENABLE,4,2            ; @DPLL_VCO_ENABLE
	.comm	_DPIO_CHV_M1_DIV_BY_2,4,2       ; @DPIO_CHV_M1_DIV_BY_2
	.comm	_DPIO_CHV_FRAC_DIV_EN,4,2       ; @DPIO_CHV_FRAC_DIV_EN
	.comm	_DPIO_CHV_N_DIV_SHIFT,4,2       ; @DPIO_CHV_N_DIV_SHIFT
	.comm	_DPIO_CHV_P1_DIV_SHIFT,4,2      ; @DPIO_CHV_P1_DIV_SHIFT
	.comm	_DPIO_CHV_P2_DIV_SHIFT,4,2      ; @DPIO_CHV_P2_DIV_SHIFT
	.no_dead_strip	_chv_crtc_clock_get
.subsections_via_symbols
