	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_hdmi_setup_tmds
_tegra_hdmi_setup_tmds:                 ## @tegra_hdmi_setup_tmds
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	16(%rsi), %esi
	movq	_HDMI_NV_PDISP_SOR_PLL0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_tegra_hdmi_writel
	movl	12(%r14), %esi
	movq	_HDMI_NV_PDISP_SOR_PLL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_tegra_hdmi_writel
	movl	8(%r14), %esi
	movq	_HDMI_NV_PDISP_PE_CURRENT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_tegra_hdmi_writel
	movl	4(%r14), %esi
	movq	_HDMI_NV_PDISP_SOR_LANE_DRIVE_CURRENT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_tegra_hdmi_writel
	movq	(%rbx), %rax
	movl	8(%rax), %esi
	movq	%rbx, %rdi
	callq	_tegra_hdmi_readl
	movq	(%rbx), %rcx
	orl	12(%rcx), %eax
	movl	8(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_tegra_hdmi_writel
	movq	(%rbx), %rax
	cmpq	$0, (%rax)
	je	LBB0_1
## %bb.2:
	movl	(%r14), %esi
	movq	_HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_tegra_hdmi_writel              ## TAILCALL
LBB0_1:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_HDMI_NV_PDISP_SOR_PLL0,4,2     ## @HDMI_NV_PDISP_SOR_PLL0
	.comm	_HDMI_NV_PDISP_SOR_PLL1,4,2     ## @HDMI_NV_PDISP_SOR_PLL1
	.comm	_HDMI_NV_PDISP_PE_CURRENT,4,2   ## @HDMI_NV_PDISP_PE_CURRENT
	.comm	_HDMI_NV_PDISP_SOR_LANE_DRIVE_CURRENT,4,2 ## @HDMI_NV_PDISP_SOR_LANE_DRIVE_CURRENT
	.comm	_HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT,4,2 ## @HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT
	.no_dead_strip	_tegra_hdmi_setup_tmds
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_hdmi_setup_tmds
_tegra_hdmi_setup_tmds:                 ; @tegra_hdmi_setup_tmds
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	ldr	w1, [x1, #16]
Lloh0:
	adrp	x8, _HDMI_NV_PDISP_SOR_PLL0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _HDMI_NV_PDISP_SOR_PLL0@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	bl	_tegra_hdmi_writel
	ldr	w1, [x20, #12]
Lloh3:
	adrp	x8, _HDMI_NV_PDISP_SOR_PLL1@GOTPAGE
Lloh4:
	ldr	x8, [x8, _HDMI_NV_PDISP_SOR_PLL1@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_hdmi_writel
	ldr	w1, [x20, #8]
Lloh6:
	adrp	x8, _HDMI_NV_PDISP_PE_CURRENT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _HDMI_NV_PDISP_PE_CURRENT@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_hdmi_writel
	ldr	w1, [x20, #4]
Lloh9:
	adrp	x8, _HDMI_NV_PDISP_SOR_LANE_DRIVE_CURRENT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _HDMI_NV_PDISP_SOR_LANE_DRIVE_CURRENT@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_hdmi_writel
	ldr	x8, [x19]
	ldr	w1, [x8, #8]
	mov	x0, x19
	bl	_tegra_hdmi_readl
	ldr	x8, [x19]
	ldp	w2, w9, [x8, #8]
	orr	w1, w9, w0
	mov	x0, x19
	bl	_tegra_hdmi_writel
	ldr	x8, [x19]
	ldr	x8, [x8]
	cbz	x8, LBB0_2
; %bb.1:
	ldr	w1, [x20]
Lloh12:
	adrp	x8, _HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT@GOTPAGE
Lloh13:
	ldr	x8, [x8, _HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_tegra_hdmi_writel
LBB0_2:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_HDMI_NV_PDISP_SOR_PLL0,4,2     ; @HDMI_NV_PDISP_SOR_PLL0
	.comm	_HDMI_NV_PDISP_SOR_PLL1,4,2     ; @HDMI_NV_PDISP_SOR_PLL1
	.comm	_HDMI_NV_PDISP_PE_CURRENT,4,2   ; @HDMI_NV_PDISP_PE_CURRENT
	.comm	_HDMI_NV_PDISP_SOR_LANE_DRIVE_CURRENT,4,2 ; @HDMI_NV_PDISP_SOR_LANE_DRIVE_CURRENT
	.comm	_HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT,4,2 ; @HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT
	.no_dead_strip	_tegra_hdmi_setup_tmds
.subsections_via_symbols
