	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mtk_hdmi_hw_msic_setting
_mtk_hdmi_hw_msic_setting:              ## @mtk_hdmi_hw_msic_setting
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	_GRL_CFG4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CFG4_MHL_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_mtk_hdmi_clear_bits
	movq	_DRM_MODE_FLAG_INTERLACE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_4
## %bb.1:
	cmpl	$74250, 4(%rbx)                 ## imm = 0x1220A
	jne	LBB0_4
## %bb.2:
	cmpl	$1080, 8(%rbx)                  ## imm = 0x438
	jne	LBB0_4
## %bb.3:
	movq	_GRL_CFG2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CFG2_MHL_DE_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_mtk_hdmi_clear_bits            ## TAILCALL
LBB0_4:
	movq	_GRL_CFG2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CFG2_MHL_DE_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_mtk_hdmi_set_bits              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_GRL_CFG4,4,2                   ## @GRL_CFG4
	.comm	_CFG4_MHL_MODE,4,2              ## @CFG4_MHL_MODE
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ## @DRM_MODE_FLAG_INTERLACE
	.comm	_GRL_CFG2,4,2                   ## @GRL_CFG2
	.comm	_CFG2_MHL_DE_SEL,4,2            ## @CFG2_MHL_DE_SEL
	.no_dead_strip	_mtk_hdmi_hw_msic_setting
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mtk_hdmi_hw_msic_setting
_mtk_hdmi_hw_msic_setting:              ; @mtk_hdmi_hw_msic_setting
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _GRL_CFG4@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GRL_CFG4@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _CFG4_MHL_MODE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CFG4_MHL_MODE@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	bl	_mtk_hdmi_clear_bits
	ldr	w8, [x20]
Lloh6:
	adrp	x9, _DRM_MODE_FLAG_INTERLACE@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DRM_MODE_FLAG_INTERLACE@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.1:
	ldr	w8, [x20, #4]
	sub	w8, w8, #18, lsl #12            ; =73728
	cmp	w8, #522
	b.ne	LBB0_4
; %bb.2:
	ldr	w8, [x20, #8]
	cmp	w8, #1080
	b.ne	LBB0_4
; %bb.3:
Lloh9:
	adrp	x8, _GRL_CFG2@GOTPAGE
Lloh10:
	ldr	x8, [x8, _GRL_CFG2@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
Lloh12:
	adrp	x8, _CFG2_MHL_DE_SEL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _CFG2_MHL_DE_SEL@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_mtk_hdmi_clear_bits
LBB0_4:
Lloh15:
	adrp	x8, _GRL_CFG2@GOTPAGE
Lloh16:
	ldr	x8, [x8, _GRL_CFG2@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
Lloh18:
	adrp	x8, _CFG2_MHL_DE_SEL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _CFG2_MHL_DE_SEL@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_mtk_hdmi_set_bits
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_GRL_CFG4,4,2                   ; @GRL_CFG4
	.comm	_CFG4_MHL_MODE,4,2              ; @CFG4_MHL_MODE
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ; @DRM_MODE_FLAG_INTERLACE
	.comm	_GRL_CFG2,4,2                   ; @GRL_CFG2
	.comm	_CFG2_MHL_DE_SEL,4,2            ; @CFG2_MHL_DE_SEL
	.no_dead_strip	_mtk_hdmi_hw_msic_setting
.subsections_via_symbols
