	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_psp_update_vcn_sram            ## -- Begin function psp_update_vcn_sram
	.p2align	4, 0x90
_psp_update_vcn_sram:                   ## @psp_update_vcn_sram
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	subq	$16, %rsp
	movl	$0, -4(%rbp)
	testl	%esi, %esi
	jne	LBB0_1
## %bb.2:
	movq	_AMDGPU_UCODE_ID_VCN0_RAM@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_AMDGPU_UCODE_ID_VCN1_RAM@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %eax
	movl	%eax, -8(%rbp)
	movl	%edx, -12(%rbp)
	movl	%ecx, -16(%rbp)
	leaq	-16(%rbp), %rsi
	callq	_psp_execute_np_fw_load
	addq	$16, %rsp
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_UCODE_ID_VCN1_RAM,4,2   ## @AMDGPU_UCODE_ID_VCN1_RAM
	.comm	_AMDGPU_UCODE_ID_VCN0_RAM,4,2   ## @AMDGPU_UCODE_ID_VCN0_RAM
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_psp_update_vcn_sram            ; -- Begin function psp_update_vcn_sram
	.p2align	2
_psp_update_vcn_sram:                   ; @psp_update_vcn_sram
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #32
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	str	wzr, [sp, #12]
Lloh0:
	adrp	x8, _AMDGPU_UCODE_ID_VCN1_RAM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_UCODE_ID_VCN1_RAM@GOTPAGEOFF]
Lloh2:
	adrp	x9, _AMDGPU_UCODE_ID_VCN0_RAM@GOTPAGE
Lloh3:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_VCN0_RAM@GOTPAGEOFF]
	cmp	w1, #0
	csel	x8, x9, x8, eq
	ldr	w8, [x8]
	stp	w2, w8, [sp, #4]
	str	w3, [sp]
	mov	x1, sp
	bl	_psp_execute_np_fw_load
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #32
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_UCODE_ID_VCN1_RAM,4,2   ; @AMDGPU_UCODE_ID_VCN1_RAM
	.comm	_AMDGPU_UCODE_ID_VCN0_RAM,4,2   ; @AMDGPU_UCODE_ID_VCN0_RAM
.subsections_via_symbols
