	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ironlake_get_pipe_config
_ironlake_get_pipe_config:              ## @ironlake_get_pipe_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r12
	movq	8(%rdi), %rdi
	callq	_to_i915
	movq	%rax, %r14
	movq	(%r12), %rdi
	callq	_POWER_DOMAIN_PIPE
	movl	%eax, %r15d
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_intel_display_power_get_if_enabled
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movl	%eax, %r13d
	movq	_INTEL_OUTPUT_FORMAT_RGB@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%rbx)
	movq	(%r12), %rdi
	movl	%edi, (%rbx)
	movq	$0, 40(%rbx)
	callq	_PIPECONF
	movl	%eax, %edi
	callq	_I915_READ
	movq	_PIPECONF_ENABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_3
## %bb.4:
	movq	_PIPECONF_BPC_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	addl	$-128, %ecx
	cmpl	$3, %ecx
	ja	LBB0_6
## %bb.5:
	movslq	%ecx, %rcx
	leaq	L_switch.table.ironlake_get_pipe_config(%rip), %rdx
	movl	(%rdx,%rcx,4), %ecx
	movl	%ecx, 4(%rbx)
LBB0_6:
	movq	_PIPECONF_COLOR_RANGE_SELECT@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_8
## %bb.7:
	movl	$1, 8(%rbx)
LBB0_8:
	movq	_PIPECONF_GAMMA_MODE_MASK_ILK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_PIPECONF_GAMMA_MODE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movl	%eax, 12(%rbx)
	movq	(%r12), %rdi
	callq	_PIPE_CSC_MODE
	movl	%eax, %edi
	callq	_I915_READ
	movl	%eax, 16(%rbx)
	movq	%rbx, %rdi
	callq	_i9xx_get_pipe_color_config
	movq	%rbx, %rdi
	callq	_intel_color_get_config
	movq	(%r12), %rdi
	callq	_PCH_TRANSCONF
	movl	%eax, %edi
	callq	_I915_READ
	movq	_TRANS_ENABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_16
## %bb.9:
	movl	$1, 20(%rbx)
	movq	(%r12), %rdi
	callq	_FDI_RX_CTL
	movl	%eax, %edi
	callq	_I915_READ
	movq	_FDI_DP_PORT_WIDTH_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_FDI_DP_PORT_WIDTH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	incl	%eax
	movl	%eax, 24(%rbx)
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_ironlake_get_fdi_m_n_config
	movq	%r14, %rdi
	callq	_HAS_PCH_IBX
	testq	%rax, %rax
	je	LBB0_11
## %bb.10:
	movl	(%r12), %esi
	jmp	LBB0_15
LBB0_1:
	xorl	%ebx, %ebx
	jmp	LBB0_19
LBB0_3:
	xorl	%ebx, %ebx
	jmp	LBB0_18
LBB0_16:
	movl	$1, 28(%rbx)
	jmp	LBB0_17
LBB0_11:
	movq	_PCH_DPLL_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	(%r12), %rdi
	callq	_TRANS_DPLLB_SEL
	testl	%eax, -44(%rbp)                 ## 4-byte Folded Reload
	je	LBB0_13
## %bb.12:
	movq	_DPLL_ID_PCH_PLL_B@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_13:
	movq	_DPLL_ID_PCH_PLL_A@GOTPCREL(%rip), %rax
LBB0_14:
	movl	(%rax), %esi
LBB0_15:
	movq	%r14, %rdi
	callq	_intel_get_shared_dpll_by_id
	movq	%rax, 40(%rbx)
	movq	(%rax), %rcx
	movq	(%rcx), %rcx
	leaq	32(%rbx), %rdx
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	*(%rcx)
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	callq	_WARN_ON
	movq	_PLL_REF_SDVO_HDMI_MULTIPLIER_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	32(%rbx), %eax
	movq	_PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	incl	%eax
	movl	%eax, 28(%rbx)
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_ironlake_pch_clock_get
LBB0_17:
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_intel_get_pipe_timings
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_intel_get_pipe_src_size
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_ironlake_get_pfit_config
	movl	$1, %ebx
LBB0_18:
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%r13d, %edx
	callq	_intel_display_power_put
LBB0_19:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_OUTPUT_FORMAT_RGB,4,2    ## @INTEL_OUTPUT_FORMAT_RGB
	.comm	_PIPECONF_ENABLE,4,2            ## @PIPECONF_ENABLE
	.comm	_PIPECONF_BPC_MASK,4,2          ## @PIPECONF_BPC_MASK
	.comm	_PIPECONF_COLOR_RANGE_SELECT,4,2 ## @PIPECONF_COLOR_RANGE_SELECT
	.comm	_PIPECONF_GAMMA_MODE_MASK_ILK,4,2 ## @PIPECONF_GAMMA_MODE_MASK_ILK
	.comm	_PIPECONF_GAMMA_MODE_SHIFT,4,2  ## @PIPECONF_GAMMA_MODE_SHIFT
	.comm	_TRANS_ENABLE,4,2               ## @TRANS_ENABLE
	.comm	_FDI_DP_PORT_WIDTH_MASK,4,2     ## @FDI_DP_PORT_WIDTH_MASK
	.comm	_FDI_DP_PORT_WIDTH_SHIFT,4,2    ## @FDI_DP_PORT_WIDTH_SHIFT
	.comm	_PCH_DPLL_SEL,4,2               ## @PCH_DPLL_SEL
	.comm	_DPLL_ID_PCH_PLL_B,4,2          ## @DPLL_ID_PCH_PLL_B
	.comm	_DPLL_ID_PCH_PLL_A,4,2          ## @DPLL_ID_PCH_PLL_A
	.comm	_PLL_REF_SDVO_HDMI_MULTIPLIER_MASK,4,2 ## @PLL_REF_SDVO_HDMI_MULTIPLIER_MASK
	.comm	_PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT,4,2 ## @PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT
	.no_dead_strip	_ironlake_get_pipe_config
	.section	__TEXT,__literal16,16byte_literals
	.p2align	2                               ## @switch.table.ironlake_get_pipe_config
L_switch.table.ironlake_get_pipe_config:
	.long	24                              ## 0x18
	.long	18                              ## 0x12
	.long	36                              ## 0x24
	.long	30                              ## 0x1e

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ironlake_get_pipe_config
_ironlake_get_pipe_config:              ; @ironlake_get_pipe_config
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x1
	mov	x22, x0
	ldr	x0, [x0, #8]
	bl	_to_i915
	mov	x19, x0
	ldr	x0, [x22]
	bl	_POWER_DOMAIN_PIPE
	mov	x20, x0
	mov	x0, x19
	mov	x1, x20
	bl	_intel_display_power_get_if_enabled
	cbz	w0, LBB0_9
; %bb.1:
	mov	x23, x0
Lloh0:
	adrp	x8, _INTEL_OUTPUT_FORMAT_RGB@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_OUTPUT_FORMAT_RGB@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [x21, #48]
	ldr	x0, [x22]
	str	w0, [x21]
	str	xzr, [x21, #40]
	bl	_PIPECONF
	bl	_I915_READ
Lloh3:
	adrp	x8, _PIPECONF_ENABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PIPECONF_ENABLE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_10
; %bb.2:
Lloh6:
	adrp	x8, _PIPECONF_BPC_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PIPECONF_BPC_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	and	w8, w8, w0
	sub	w8, w8, #128
	cmp	w8, #3
	b.hi	LBB0_4
; %bb.3:
Lloh9:
	adrp	x9, l_switch.table.ironlake_get_pipe_config@PAGE
Lloh10:
	add	x9, x9, l_switch.table.ironlake_get_pipe_config@PAGEOFF
	ldr	w8, [x9, w8, sxtw #2]
	str	w8, [x21, #4]
LBB0_4:
Lloh11:
	adrp	x8, _PIPECONF_COLOR_RANGE_SELECT@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PIPECONF_COLOR_RANGE_SELECT@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_6
; %bb.5:
	mov	w8, #1
	str	w8, [x21, #8]
LBB0_6:
Lloh14:
	adrp	x8, _PIPECONF_GAMMA_MODE_MASK_ILK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _PIPECONF_GAMMA_MODE_MASK_ILK@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh17:
	adrp	x9, _PIPECONF_GAMMA_MODE_SHIFT@GOTPAGE
Lloh18:
	ldr	x9, [x9, _PIPECONF_GAMMA_MODE_SHIFT@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	asr	w8, w8, w9
	str	w8, [x21, #12]
	ldr	x0, [x22]
	bl	_PIPE_CSC_MODE
	bl	_I915_READ
	str	w0, [x21, #16]
	mov	x0, x21
	bl	_i9xx_get_pipe_color_config
	mov	x0, x21
	bl	_intel_color_get_config
	ldr	x0, [x22]
	bl	_PCH_TRANSCONF
	bl	_I915_READ
Lloh20:
	adrp	x8, _TRANS_ENABLE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _TRANS_ENABLE@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_11
; %bb.7:
	mov	w8, #1
	str	w8, [x21, #20]
	ldr	x0, [x22]
	bl	_FDI_RX_CTL
	bl	_I915_READ
Lloh23:
	adrp	x8, _FDI_DP_PORT_WIDTH_MASK@GOTPAGE
Lloh24:
	ldr	x8, [x8, _FDI_DP_PORT_WIDTH_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh26:
	adrp	x9, _FDI_DP_PORT_WIDTH_SHIFT@GOTPAGE
Lloh27:
	ldr	x9, [x9, _FDI_DP_PORT_WIDTH_SHIFT@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	asr	w8, w8, w9
	add	w8, w8, #1
	str	w8, [x21, #24]
	mov	x0, x22
	mov	x1, x21
	bl	_ironlake_get_fdi_m_n_config
	mov	x0, x19
	bl	_HAS_PCH_IBX
	cbz	x0, LBB0_12
; %bb.8:
	ldr	w1, [x22]
	b	LBB0_16
LBB0_9:
	mov	w21, #0
	b	LBB0_19
LBB0_10:
	mov	w21, #0
	b	LBB0_18
LBB0_11:
	mov	w8, #1
	str	w8, [x21, #28]
	b	LBB0_17
LBB0_12:
Lloh29:
	adrp	x8, _PCH_DPLL_SEL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _PCH_DPLL_SEL@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x24, x0
	ldr	x0, [x22]
	bl	_TRANS_DPLLB_SEL
	tst	w0, w24
	b.eq	LBB0_14
; %bb.13:
Lloh32:
	adrp	x8, _DPLL_ID_PCH_PLL_B@GOTPAGE
Lloh33:
	ldr	x8, [x8, _DPLL_ID_PCH_PLL_B@GOTPAGEOFF]
	b	LBB0_15
LBB0_14:
Lloh34:
	adrp	x8, _DPLL_ID_PCH_PLL_A@GOTPAGE
Lloh35:
	ldr	x8, [x8, _DPLL_ID_PCH_PLL_A@GOTPAGEOFF]
LBB0_15:
	ldr	w1, [x8]
LBB0_16:
	mov	x0, x19
	bl	_intel_get_shared_dpll_by_id
	mov	x1, x0
	str	x0, [x21, #40]
	ldr	x8, [x0]
	ldr	x8, [x8]
	ldr	x8, [x8]
	add	x2, x21, #32
	mov	x0, x19
	blr	x8
	cmp	w0, #0
	cset	w0, eq
	bl	_WARN_ON
	ldr	w8, [x21, #32]
Lloh36:
	adrp	x9, _PLL_REF_SDVO_HDMI_MULTIPLIER_MASK@GOTPAGE
Lloh37:
	ldr	x9, [x9, _PLL_REF_SDVO_HDMI_MULTIPLIER_MASK@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh39:
	adrp	x9, _PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT@GOTPAGE
Lloh40:
	ldr	x9, [x9, _PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	asr	w8, w8, w9
	add	w8, w8, #1
	str	w8, [x21, #28]
	mov	x0, x22
	mov	x1, x21
	bl	_ironlake_pch_clock_get
LBB0_17:
	mov	x0, x22
	mov	x1, x21
	bl	_intel_get_pipe_timings
	mov	x0, x22
	mov	x1, x21
	bl	_intel_get_pipe_src_size
	mov	x0, x22
	mov	x1, x21
	bl	_ironlake_get_pfit_config
	mov	w21, #1
LBB0_18:
	mov	x0, x19
	mov	x1, x20
	mov	x2, x23
	bl	_intel_display_power_put
LBB0_19:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_OUTPUT_FORMAT_RGB,4,2    ; @INTEL_OUTPUT_FORMAT_RGB
	.comm	_PIPECONF_ENABLE,4,2            ; @PIPECONF_ENABLE
	.comm	_PIPECONF_BPC_MASK,4,2          ; @PIPECONF_BPC_MASK
	.comm	_PIPECONF_COLOR_RANGE_SELECT,4,2 ; @PIPECONF_COLOR_RANGE_SELECT
	.comm	_PIPECONF_GAMMA_MODE_MASK_ILK,4,2 ; @PIPECONF_GAMMA_MODE_MASK_ILK
	.comm	_PIPECONF_GAMMA_MODE_SHIFT,4,2  ; @PIPECONF_GAMMA_MODE_SHIFT
	.comm	_TRANS_ENABLE,4,2               ; @TRANS_ENABLE
	.comm	_FDI_DP_PORT_WIDTH_MASK,4,2     ; @FDI_DP_PORT_WIDTH_MASK
	.comm	_FDI_DP_PORT_WIDTH_SHIFT,4,2    ; @FDI_DP_PORT_WIDTH_SHIFT
	.comm	_PCH_DPLL_SEL,4,2               ; @PCH_DPLL_SEL
	.comm	_DPLL_ID_PCH_PLL_B,4,2          ; @DPLL_ID_PCH_PLL_B
	.comm	_DPLL_ID_PCH_PLL_A,4,2          ; @DPLL_ID_PCH_PLL_A
	.comm	_PLL_REF_SDVO_HDMI_MULTIPLIER_MASK,4,2 ; @PLL_REF_SDVO_HDMI_MULTIPLIER_MASK
	.comm	_PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT,4,2 ; @PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT
	.no_dead_strip	_ironlake_get_pipe_config
	.section	__TEXT,__literal16,16byte_literals
	.p2align	2                               ; @switch.table.ironlake_get_pipe_config
l_switch.table.ironlake_get_pipe_config:
	.long	24                              ; 0x18
	.long	18                              ; 0x12
	.long	36                              ; 0x24
	.long	30                              ; 0x1e

.subsections_via_symbols
