	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_viu_set_g12a_osd1_matrix
_meson_viu_set_g12a_osd1_matrix:        ## @meson_viu_set_g12a_osd1_matrix
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movq	%rsi, %r13
	movq	%rdi, %r12
	movl	(%rsi), %eax
	shll	$16, %eax
	andl	$268369920, %eax                ## imm = 0xFFF0000
	movl	$4095, %ecx                     ## imm = 0xFFF
	movl	4(%rsi), %ebx
	andl	%ecx, %ebx
	movl	$4095, %r15d                    ## imm = 0xFFF
	orl	%eax, %ebx
	movq	(%rdi), %r14
	movq	_VPP_WRAP_OSD1_MATRIX_PRE_OFFSET0_1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %r14
	movl	%ebx, %edi
	movq	%r14, %rsi
	callq	_writel
	movl	8(%r13), %r14d
	andl	%r15d, %r14d
	movq	(%r12), %rbx
	movq	_VPP_WRAP_OSD1_MATRIX_PRE_OFFSET2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	%r14d, %edi
	movq	%rbx, %rsi
	callq	_writel
	movl	12(%r13), %eax
	shll	$16, %eax
	andl	$536805376, %eax                ## imm = 0x1FFF0000
	movl	$8191, %r14d                    ## imm = 0x1FFF
	movl	16(%r13), %ebx
	andl	%r14d, %ebx
	orl	%eax, %ebx
	movq	(%r12), %r15
	movq	_VPP_WRAP_OSD1_MATRIX_COEF00_01@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %r15
	movl	%ebx, %edi
	movq	%r15, %rsi
	callq	_writel
	movl	20(%r13), %eax
	shll	$16, %eax
	andl	$536805376, %eax                ## imm = 0x1FFF0000
	movl	24(%r13), %ebx
	andl	%r14d, %ebx
	orl	%eax, %ebx
	movq	(%r12), %r15
	movq	_VPP_WRAP_OSD1_MATRIX_COEF02_10@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %r15
	movl	%ebx, %edi
	movq	%r15, %rsi
	callq	_writel
	movl	28(%r13), %eax
	shll	$16, %eax
	andl	$536805376, %eax                ## imm = 0x1FFF0000
	movl	32(%r13), %ebx
	andl	%r14d, %ebx
	orl	%eax, %ebx
	movq	(%r12), %r15
	movq	_VPP_WRAP_OSD1_MATRIX_COEF11_12@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %r15
	movl	%ebx, %edi
	movq	%r15, %rsi
	callq	_writel
	movl	36(%r13), %eax
	shll	$16, %eax
	andl	$536805376, %eax                ## imm = 0x1FFF0000
	andl	40(%r13), %r14d
	orl	%eax, %r14d
	movq	(%r12), %rbx
	movq	_VPP_WRAP_OSD1_MATRIX_COEF20_21@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	%r14d, %edi
	movq	%rbx, %rsi
	callq	_writel
	movl	44(%r13), %ebx
	shll	$16, %ebx
	andl	$536805376, %ebx                ## imm = 0x1FFF0000
	movq	(%r12), %r14
	movq	_VPP_WRAP_OSD1_MATRIX_COEF22@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %r14
	movl	%ebx, %edi
	movq	%r14, %rsi
	callq	_writel
	movl	72(%r13), %eax
	shll	$16, %eax
	andl	$268369920, %eax                ## imm = 0xFFF0000
	movl	76(%r13), %ebx
	movl	$4095, %r15d                    ## imm = 0xFFF
	andl	%r15d, %ebx
	orl	%eax, %ebx
	movq	(%r12), %r14
	movq	_VPP_WRAP_OSD1_MATRIX_OFFSET0_1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %r14
	movl	%ebx, %edi
	movq	%r14, %rsi
	callq	_writel
	andl	80(%r13), %r15d
	movl	%r15d, %r14d
	movq	(%r12), %rbx
	movq	_VPP_WRAP_OSD1_MATRIX_OFFSET2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	%r15d, %edi
	movq	%rbx, %rsi
	callq	_writel
	xorl	%r14d, %r14d
	xorl	%edi, %edi
	callq	_BIT
	movl	%eax, %r15d
	cmpl	$0, -44(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_2
## %bb.1:
	xorl	%edi, %edi
	callq	_BIT
	movl	%eax, %r14d
LBB0_2:
	movq	(%r12), %rbx
	movq	_VPP_WRAP_OSD1_MATRIX_EN_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	%r15d, %edi
	movl	%r14d, %esi
	movq	%rbx, %rdx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_writel_bits_relaxed            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VPP_WRAP_OSD1_MATRIX_PRE_OFFSET0_1,4,2 ## @VPP_WRAP_OSD1_MATRIX_PRE_OFFSET0_1
	.comm	_VPP_WRAP_OSD1_MATRIX_PRE_OFFSET2,4,2 ## @VPP_WRAP_OSD1_MATRIX_PRE_OFFSET2
	.comm	_VPP_WRAP_OSD1_MATRIX_COEF00_01,4,2 ## @VPP_WRAP_OSD1_MATRIX_COEF00_01
	.comm	_VPP_WRAP_OSD1_MATRIX_COEF02_10,4,2 ## @VPP_WRAP_OSD1_MATRIX_COEF02_10
	.comm	_VPP_WRAP_OSD1_MATRIX_COEF11_12,4,2 ## @VPP_WRAP_OSD1_MATRIX_COEF11_12
	.comm	_VPP_WRAP_OSD1_MATRIX_COEF20_21,4,2 ## @VPP_WRAP_OSD1_MATRIX_COEF20_21
	.comm	_VPP_WRAP_OSD1_MATRIX_COEF22,4,2 ## @VPP_WRAP_OSD1_MATRIX_COEF22
	.comm	_VPP_WRAP_OSD1_MATRIX_OFFSET0_1,4,2 ## @VPP_WRAP_OSD1_MATRIX_OFFSET0_1
	.comm	_VPP_WRAP_OSD1_MATRIX_OFFSET2,4,2 ## @VPP_WRAP_OSD1_MATRIX_OFFSET2
	.comm	_VPP_WRAP_OSD1_MATRIX_EN_CTRL,4,2 ## @VPP_WRAP_OSD1_MATRIX_EN_CTRL
	.no_dead_strip	_meson_viu_set_g12a_osd1_matrix
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_viu_set_g12a_osd1_matrix
_meson_viu_set_g12a_osd1_matrix:        ; @meson_viu_set_g12a_osd1_matrix
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	ldp	w8, w9, [x1]
	and	w22, w9, #0xfff
	bfi	w22, w8, #16, #12
	ldr	x23, [x0]
Lloh0:
	adrp	x8, _VPP_WRAP_OSD1_MATRIX_PRE_OFFSET0_1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VPP_WRAP_OSD1_MATRIX_PRE_OFFSET0_1@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x23
	mov	x0, x22
	bl	_writel
	ldr	w8, [x21, #8]
	and	w22, w8, #0xfff
	ldr	x23, [x19]
Lloh3:
	adrp	x8, _VPP_WRAP_OSD1_MATRIX_PRE_OFFSET2@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VPP_WRAP_OSD1_MATRIX_PRE_OFFSET2@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x23
	mov	x0, x22
	bl	_writel
	ldp	w8, w9, [x21, #12]
	and	w22, w9, #0x1fff
	bfi	w22, w8, #16, #13
	ldr	x23, [x19]
Lloh6:
	adrp	x8, _VPP_WRAP_OSD1_MATRIX_COEF00_01@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VPP_WRAP_OSD1_MATRIX_COEF00_01@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x23
	mov	x0, x22
	bl	_writel
	ldp	w8, w9, [x21, #20]
	and	w22, w9, #0x1fff
	bfi	w22, w8, #16, #13
	ldr	x23, [x19]
Lloh9:
	adrp	x8, _VPP_WRAP_OSD1_MATRIX_COEF02_10@GOTPAGE
Lloh10:
	ldr	x8, [x8, _VPP_WRAP_OSD1_MATRIX_COEF02_10@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x23
	mov	x0, x22
	bl	_writel
	ldp	w8, w9, [x21, #28]
	and	w22, w9, #0x1fff
	bfi	w22, w8, #16, #13
	ldr	x23, [x19]
Lloh12:
	adrp	x8, _VPP_WRAP_OSD1_MATRIX_COEF11_12@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VPP_WRAP_OSD1_MATRIX_COEF11_12@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x23
	mov	x0, x22
	bl	_writel
	ldp	w8, w9, [x21, #36]
	and	w22, w9, #0x1fff
	bfi	w22, w8, #16, #13
	ldr	x23, [x19]
Lloh15:
	adrp	x8, _VPP_WRAP_OSD1_MATRIX_COEF20_21@GOTPAGE
Lloh16:
	ldr	x8, [x8, _VPP_WRAP_OSD1_MATRIX_COEF20_21@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x23
	mov	x0, x22
	bl	_writel
	ldr	w8, [x21, #44]
	ubfiz	w22, w8, #16, #13
	ldr	x23, [x19]
Lloh18:
	adrp	x8, _VPP_WRAP_OSD1_MATRIX_COEF22@GOTPAGE
Lloh19:
	ldr	x8, [x8, _VPP_WRAP_OSD1_MATRIX_COEF22@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x23
	mov	x0, x22
	bl	_writel
	ldp	w8, w9, [x21, #72]
	and	w22, w9, #0xfff
	bfi	w22, w8, #16, #12
	ldr	x23, [x19]
Lloh21:
	adrp	x8, _VPP_WRAP_OSD1_MATRIX_OFFSET0_1@GOTPAGE
Lloh22:
	ldr	x8, [x8, _VPP_WRAP_OSD1_MATRIX_OFFSET0_1@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x23
	mov	x0, x22
	bl	_writel
	ldr	w8, [x21, #80]
	and	w21, w8, #0xfff
	ldr	x22, [x19]
Lloh24:
	adrp	x8, _VPP_WRAP_OSD1_MATRIX_OFFSET2@GOTPAGE
Lloh25:
	ldr	x8, [x8, _VPP_WRAP_OSD1_MATRIX_OFFSET2@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x22
	mov	x0, x21
	bl	_writel
	mov	w0, #0
	bl	_BIT
	mov	x21, x0
	cbz	w20, LBB0_2
; %bb.1:
	mov	w0, #0
	bl	_BIT
	mov	x20, x0
LBB0_2:
	ldr	x19, [x19]
Lloh27:
	adrp	x8, _VPP_WRAP_OSD1_MATRIX_EN_CTRL@GOTPAGE
Lloh28:
	ldr	x8, [x8, _VPP_WRAP_OSD1_MATRIX_EN_CTRL@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
	bl	__REG
	add	x2, x0, x19
	mov	x0, x21
	mov	x1, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_writel_bits_relaxed
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_VPP_WRAP_OSD1_MATRIX_PRE_OFFSET0_1,4,2 ; @VPP_WRAP_OSD1_MATRIX_PRE_OFFSET0_1
	.comm	_VPP_WRAP_OSD1_MATRIX_PRE_OFFSET2,4,2 ; @VPP_WRAP_OSD1_MATRIX_PRE_OFFSET2
	.comm	_VPP_WRAP_OSD1_MATRIX_COEF00_01,4,2 ; @VPP_WRAP_OSD1_MATRIX_COEF00_01
	.comm	_VPP_WRAP_OSD1_MATRIX_COEF02_10,4,2 ; @VPP_WRAP_OSD1_MATRIX_COEF02_10
	.comm	_VPP_WRAP_OSD1_MATRIX_COEF11_12,4,2 ; @VPP_WRAP_OSD1_MATRIX_COEF11_12
	.comm	_VPP_WRAP_OSD1_MATRIX_COEF20_21,4,2 ; @VPP_WRAP_OSD1_MATRIX_COEF20_21
	.comm	_VPP_WRAP_OSD1_MATRIX_COEF22,4,2 ; @VPP_WRAP_OSD1_MATRIX_COEF22
	.comm	_VPP_WRAP_OSD1_MATRIX_OFFSET0_1,4,2 ; @VPP_WRAP_OSD1_MATRIX_OFFSET0_1
	.comm	_VPP_WRAP_OSD1_MATRIX_OFFSET2,4,2 ; @VPP_WRAP_OSD1_MATRIX_OFFSET2
	.comm	_VPP_WRAP_OSD1_MATRIX_EN_CTRL,4,2 ; @VPP_WRAP_OSD1_MATRIX_EN_CTRL
	.no_dead_strip	_meson_viu_set_g12a_osd1_matrix
.subsections_via_symbols
