	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ni_init_smc_table
_ni_init_smc_table:                     ## @ni_init_smc_table
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	callq	_rv770_get_pi
	movq	%rax, %r14
	movq	%r15, %rdi
	callq	_ni_get_pi
	movq	%rax, %rbx
	movq	16(%r15), %r12
	movq	%rax, %rdi
	xorl	%esi, %esi
	movl	$20, %edx
	callq	_memset
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_ni_populate_smc_voltage_tables
	movl	(%r15), %eax
	addl	$-128, %eax
	cmpl	$2, %eax
	ja	LBB0_1
## %bb.2:
	cltq
	leaq	l_switch.table.ni_init_smc_table(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %eax
	movl	%eax, 16(%rbx)
	movl	8(%r15), %eax
	movq	_ATOM_PP_PLATFORM_CAP_HARDWAREDC@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_5
## %bb.4:
	movq	_PPSMC_SYSTEMFLAG_GPIO_DC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, 12(%rbx)
LBB0_5:
	movq	_ATOM_PP_PLATFORM_CAP_REGULATOR_HOT@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_7
## %bb.6:
	movq	_PPSMC_SYSTEMFLAG_REGULATOR_HOT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, 12(%rbx)
LBB0_7:
	movq	_ATOM_PP_PLATFORM_CAP_STEPVDDC@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_9
## %bb.8:
	movq	_PPSMC_SYSTEMFLAG_STEPVDDC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 12(%rbx)
LBB0_9:
	cmpq	$0, 8(%r14)
	je	LBB0_11
## %bb.10:
	movq	_PPSMC_SYSTEMFLAG_GDDR5@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 12(%rbx)
LBB0_11:
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%rbx, %rdx
	callq	_ni_populate_smc_initial_state
	testl	%eax, %eax
	jne	LBB0_14
## %bb.12:
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_ni_populate_smc_acpi_state
	testl	%eax, %eax
	jne	LBB0_14
## %bb.13:
	movl	(%rbx), %eax
	movl	%eax, 8(%rbx)
	movl	%eax, 4(%rbx)
	movq	_NISLANDS_INITIAL_STATE_ARB_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_ni_do_program_memory_timing_parameters
	testl	%eax, %eax
	je	LBB0_15
LBB0_14:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_15:
	movl	(%r14), %r8d
	movl	4(%r14), %esi
	movq	%r15, %rdi
	movq	%rbx, %rdx
	movl	$20, %ecx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_rv770_copy_bytes_to_smc        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PPSMC_THERMAL_PROTECT_TYPE_INTERNAL,4,2 ## @PPSMC_THERMAL_PROTECT_TYPE_INTERNAL
	.comm	_PPSMC_THERMAL_PROTECT_TYPE_NONE,4,2 ## @PPSMC_THERMAL_PROTECT_TYPE_NONE
	.comm	_PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL,4,2 ## @PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL
	.comm	_ATOM_PP_PLATFORM_CAP_HARDWAREDC,4,2 ## @ATOM_PP_PLATFORM_CAP_HARDWAREDC
	.comm	_PPSMC_SYSTEMFLAG_GPIO_DC,4,2   ## @PPSMC_SYSTEMFLAG_GPIO_DC
	.comm	_ATOM_PP_PLATFORM_CAP_REGULATOR_HOT,4,2 ## @ATOM_PP_PLATFORM_CAP_REGULATOR_HOT
	.comm	_PPSMC_SYSTEMFLAG_REGULATOR_HOT,4,2 ## @PPSMC_SYSTEMFLAG_REGULATOR_HOT
	.comm	_ATOM_PP_PLATFORM_CAP_STEPVDDC,4,2 ## @ATOM_PP_PLATFORM_CAP_STEPVDDC
	.comm	_PPSMC_SYSTEMFLAG_STEPVDDC,4,2  ## @PPSMC_SYSTEMFLAG_STEPVDDC
	.comm	_PPSMC_SYSTEMFLAG_GDDR5,4,2     ## @PPSMC_SYSTEMFLAG_GDDR5
	.comm	_NISLANDS_INITIAL_STATE_ARB_INDEX,4,2 ## @NISLANDS_INITIAL_STATE_ARB_INDEX
	.no_dead_strip	_ni_init_smc_table
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.ni_init_smc_table
l_switch.table.ni_init_smc_table:
	.quad	_PPSMC_THERMAL_PROTECT_TYPE_NONE
	.quad	_PPSMC_THERMAL_PROTECT_TYPE_INTERNAL
	.quad	_PPSMC_THERMAL_PROTECT_TYPE_INTERNAL

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ni_init_smc_table
_ni_init_smc_table:                     ; @ni_init_smc_table
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_rv770_get_pi
	mov	x20, x0
	mov	x0, x19
	bl	_ni_get_pi
	mov	x21, x0
	ldr	x22, [x19, #16]
	mov	w1, #0
	mov	w2, #20
	bl	_memset
	mov	x0, x19
	mov	x1, x21
	bl	_ni_populate_smc_voltage_tables
	ldr	w8, [x19]
	sub	w8, w8, #128
	cmp	w8, #2
	b.hi	LBB0_2
; %bb.1:
Lloh0:
	adrp	x9, l_switch.table.ni_init_smc_table@PAGE
Lloh1:
	add	x9, x9, l_switch.table.ni_init_smc_table@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	b	LBB0_3
LBB0_2:
Lloh2:
	adrp	x8, _PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL@GOTPAGEOFF]
LBB0_3:
	ldr	w8, [x8]
	str	w8, [x21, #16]
	ldr	w8, [x19, #8]
Lloh4:
	adrp	x9, _ATOM_PP_PLATFORM_CAP_HARDWAREDC@GOTPAGE
Lloh5:
	ldr	x9, [x9, _ATOM_PP_PLATFORM_CAP_HARDWAREDC@GOTPAGEOFF]
Lloh6:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_5
; %bb.4:
Lloh7:
	adrp	x9, _PPSMC_SYSTEMFLAG_GPIO_DC@GOTPAGE
Lloh8:
	ldr	x9, [x9, _PPSMC_SYSTEMFLAG_GPIO_DC@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
	ldr	w10, [x21, #12]
	orr	w9, w10, w9
	str	w9, [x21, #12]
LBB0_5:
Lloh10:
	adrp	x9, _ATOM_PP_PLATFORM_CAP_REGULATOR_HOT@GOTPAGE
Lloh11:
	ldr	x9, [x9, _ATOM_PP_PLATFORM_CAP_REGULATOR_HOT@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_7
; %bb.6:
Lloh13:
	adrp	x9, _PPSMC_SYSTEMFLAG_REGULATOR_HOT@GOTPAGE
Lloh14:
	ldr	x9, [x9, _PPSMC_SYSTEMFLAG_REGULATOR_HOT@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	ldr	w10, [x21, #12]
	orr	w9, w10, w9
	str	w9, [x21, #12]
LBB0_7:
Lloh16:
	adrp	x9, _ATOM_PP_PLATFORM_CAP_STEPVDDC@GOTPAGE
Lloh17:
	ldr	x9, [x9, _ATOM_PP_PLATFORM_CAP_STEPVDDC@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.8:
Lloh19:
	adrp	x8, _PPSMC_SYSTEMFLAG_STEPVDDC@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PPSMC_SYSTEMFLAG_STEPVDDC@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	ldr	w9, [x21, #12]
	orr	w8, w9, w8
	str	w8, [x21, #12]
LBB0_9:
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_11
; %bb.10:
Lloh22:
	adrp	x8, _PPSMC_SYSTEMFLAG_GDDR5@GOTPAGE
Lloh23:
	ldr	x8, [x8, _PPSMC_SYSTEMFLAG_GDDR5@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	ldr	w9, [x21, #12]
	orr	w8, w9, w8
	str	w8, [x21, #12]
LBB0_11:
	mov	x0, x19
	mov	x1, x22
	mov	x2, x21
	bl	_ni_populate_smc_initial_state
	cbnz	w0, LBB0_14
; %bb.12:
	mov	x0, x19
	mov	x1, x21
	bl	_ni_populate_smc_acpi_state
	cbnz	w0, LBB0_14
; %bb.13:
	ldr	w8, [x21]
	stp	w8, w8, [x21, #4]
Lloh25:
	adrp	x8, _NISLANDS_INITIAL_STATE_ARB_INDEX@GOTPAGE
Lloh26:
	ldr	x8, [x8, _NISLANDS_INITIAL_STATE_ARB_INDEX@GOTPAGEOFF]
Lloh27:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x22
	bl	_ni_do_program_memory_timing_parameters
	cbz	w0, LBB0_15
LBB0_14:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_15:
	ldp	w4, w1, [x20]
	mov	x0, x19
	mov	x2, x21
	mov	w3, #20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_rv770_copy_bytes_to_smc
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.cfi_endproc
                                        ; -- End function
	.comm	_PPSMC_THERMAL_PROTECT_TYPE_INTERNAL,4,2 ; @PPSMC_THERMAL_PROTECT_TYPE_INTERNAL
	.comm	_PPSMC_THERMAL_PROTECT_TYPE_NONE,4,2 ; @PPSMC_THERMAL_PROTECT_TYPE_NONE
	.comm	_PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL,4,2 ; @PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL
	.comm	_ATOM_PP_PLATFORM_CAP_HARDWAREDC,4,2 ; @ATOM_PP_PLATFORM_CAP_HARDWAREDC
	.comm	_PPSMC_SYSTEMFLAG_GPIO_DC,4,2   ; @PPSMC_SYSTEMFLAG_GPIO_DC
	.comm	_ATOM_PP_PLATFORM_CAP_REGULATOR_HOT,4,2 ; @ATOM_PP_PLATFORM_CAP_REGULATOR_HOT
	.comm	_PPSMC_SYSTEMFLAG_REGULATOR_HOT,4,2 ; @PPSMC_SYSTEMFLAG_REGULATOR_HOT
	.comm	_ATOM_PP_PLATFORM_CAP_STEPVDDC,4,2 ; @ATOM_PP_PLATFORM_CAP_STEPVDDC
	.comm	_PPSMC_SYSTEMFLAG_STEPVDDC,4,2  ; @PPSMC_SYSTEMFLAG_STEPVDDC
	.comm	_PPSMC_SYSTEMFLAG_GDDR5,4,2     ; @PPSMC_SYSTEMFLAG_GDDR5
	.comm	_NISLANDS_INITIAL_STATE_ARB_INDEX,4,2 ; @NISLANDS_INITIAL_STATE_ARB_INDEX
	.no_dead_strip	_ni_init_smc_table
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.ni_init_smc_table
l_switch.table.ni_init_smc_table:
	.quad	_PPSMC_THERMAL_PROTECT_TYPE_NONE
	.quad	_PPSMC_THERMAL_PROTECT_TYPE_INTERNAL
	.quad	_PPSMC_THERMAL_PROTECT_TYPE_INTERNAL

.subsections_via_symbols
