	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_device_fw_loading
_amdgpu_device_fw_loading:              ## @amdgpu_device_fw_loading
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	(%rdi), %rax
	movq	_CHIP_VEGA10@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_14
## %bb.1:
	movl	8(%r15), %eax
	testl	%eax, %eax
	jle	LBB0_14
## %bb.2:
	movq	16(%r15), %rcx
	movq	_AMD_IP_BLOCK_TYPE_PSP@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	shlq	$4, %rax
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%rcx,%rbx), %rsi
	cmpq	%rdx, (%rsi)
	je	LBB0_4
## %bb.13:                              ##   in Loop: Header=BB0_3 Depth=1
	addq	$16, %rbx
	cmpq	%rbx, %rax
	jne	LBB0_3
	jmp	LBB0_14
LBB0_4:
	cmpl	$1, (%rcx,%rbx)
	je	LBB0_14
## %bb.5:
	cmpq	$0, 32(%r15)
	jne	LBB0_7
## %bb.6:
	cmpq	$0, 24(%r15)
	je	LBB0_10
LBB0_7:
	movq	8(%rsi), %rax
	movq	%r15, %rdi
	callq	*(%rax)
	testl	%eax, %eax
	je	LBB0_12
## %bb.8:
	movl	%eax, %r14d
	movq	16(%r15), %rax
	movq	8(%rax,%rbx), %rax
	movq	8(%rax), %rax
	movl	16(%rax), %esi
	leaq	L_.str(%rip), %rdi
LBB0_9:
	movl	%r14d, %edx
	callq	_DRM_ERROR
	jmp	LBB0_15
LBB0_10:
	movq	8(%rsi), %rax
	movq	%r15, %rdi
	callq	*8(%rax)
	testl	%eax, %eax
	je	LBB0_12
## %bb.11:
	movl	%eax, %r14d
	movq	16(%r15), %rax
	movq	8(%rax,%rbx), %rax
	movq	8(%rax), %rax
	movl	16(%rax), %esi
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_9
LBB0_12:
	movq	16(%r15), %rax
	movl	$1, (%rax,%rbx)
LBB0_14:
	leaq	-28(%rbp), %rsi
	movq	%r15, %rdi
	callq	_amdgpu_pm_load_smu_firmware
	movl	%eax, %r14d
LBB0_15:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_VEGA10,8,3                ## @CHIP_VEGA10
	.comm	_AMD_IP_BLOCK_TYPE_PSP,8,3      ## @AMD_IP_BLOCK_TYPE_PSP
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"resume of IP block <%s> failed %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"hw_init of IP block <%s> failed %d\n"

	.no_dead_strip	_amdgpu_device_fw_loading
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_device_fw_loading
_amdgpu_device_fw_loading:              ; @amdgpu_device_fw_loading
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _CHIP_VEGA10@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_VEGA10@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_14
; %bb.1:
	ldr	w9, [x19, #8]
	cmp	w9, #1
	b.lt	LBB0_14
; %bb.2:
	mov	x21, #0
	ldr	x8, [x19, #16]
Lloh3:
	adrp	x10, _AMD_IP_BLOCK_TYPE_PSP@GOTPAGE
Lloh4:
	ldr	x10, [x10, _AMD_IP_BLOCK_TYPE_PSP@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
	lsl	x11, x9, #4
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	add	x9, x8, x21
	ldr	x9, [x9, #8]
	ldr	x12, [x9]
	cmp	x12, x10
	b.eq	LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	add	x21, x21, #16
	cmp	x11, x21
	b.ne	LBB0_3
	b	LBB0_14
LBB0_5:
	ldr	w8, [x8, x21]
	cmp	w8, #1
	b.eq	LBB0_14
; %bb.6:
	ldr	x8, [x19, #32]
	cbnz	x8, LBB0_8
; %bb.7:
	ldr	x8, [x19, #24]
	cbz	x8, LBB0_11
LBB0_8:
	ldr	x8, [x9, #8]
	ldr	x8, [x8]
	mov	x0, x19
	blr	x8
	cbz	w0, LBB0_13
; %bb.9:
	mov	x20, x0
	ldr	x8, [x19, #16]
	add	x8, x8, x21
	ldr	x8, [x8, #8]
	ldr	x8, [x8, #8]
	ldr	w1, [x8, #16]
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
LBB0_10:
	mov	x2, x20
	bl	_DRM_ERROR
	b	LBB0_15
LBB0_11:
	ldr	x8, [x9, #8]
	ldr	x8, [x8, #8]
	mov	x0, x19
	blr	x8
	cbz	w0, LBB0_13
; %bb.12:
	mov	x20, x0
	ldr	x8, [x19, #16]
	add	x8, x8, x21
	ldr	x8, [x8, #8]
	ldr	x8, [x8, #8]
	ldr	w1, [x8, #16]
Lloh8:
	adrp	x0, l_.str.1@PAGE
Lloh9:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_10
LBB0_13:
	ldr	x8, [x19, #16]
	mov	w9, #1
	str	w9, [x8, x21]
LBB0_14:
	add	x1, sp, #12
	mov	x0, x19
	bl	_amdgpu_pm_load_smu_firmware
	mov	x20, x0
LBB0_15:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_VEGA10,8,3                ; @CHIP_VEGA10
	.comm	_AMD_IP_BLOCK_TYPE_PSP,8,3      ; @AMD_IP_BLOCK_TYPE_PSP
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"resume of IP block <%s> failed %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"hw_init of IP block <%s> failed %d\n"

	.no_dead_strip	_amdgpu_device_fw_loading
.subsections_via_symbols
