	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function _dpu_plane_setup_scaler3
__dpu_plane_setup_scaler3:              ## @_dpu_plane_setup_scaler3
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r9, -64(%rbp)                  ## 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r12
	movq	%rdx, %r13
	movq	%rsi, %rbx
	movq	16(%rbp), %rdi
	xorl	%esi, %esi
	movl	$120, %edx
	callq	_memset
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movq	_PHASE_STEP_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$1, %r15d
	movl	$1, %edi
	shll	%cl, %edi
	movq	%r13, %rsi
	movq	%r14, -80(%rbp)                 ## 8-byte Spill
	movq	%r14, %rdx
	callq	_mult_frac
	movq	16(%rbp), %rbx
	movq	(%rbx), %rcx
	movq	_DPU_SSPP_COMP_0@GOTPCREL(%rip), %r14
	movq	(%r14), %rdx
	movq	%rax, (%rcx,%rdx,8)
	movq	_PHASE_STEP_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r15d
	movl	%r15d, %edi
	movq	%r12, -48(%rbp)                 ## 8-byte Spill
	movq	%r12, %rsi
	movq	-64(%rbp), %rdx                 ## 8-byte Reload
	callq	_mult_frac
	movq	%rbx, %rdi
	movq	40(%rbp), %rsi
	movq	8(%rbx), %rcx
	movq	(%r14), %rdx
	movq	%rax, (%rcx,%rdx,8)
	movq	(%r14), %rax
	movq	(%rcx,%rax,8), %rax
	movq	%rax, %rdx
	orq	%rsi, %rdx
	shrq	$32, %rdx
	je	LBB0_1
## %bb.2:
	xorl	%edx, %edx
	divq	%rsi
	jmp	LBB0_3
LBB0_1:
                                        ## kill: def $eax killed $eax killed $rax
	xorl	%edx, %edx
	divl	%esi
                                        ## kill: def $eax killed $eax def $rax
LBB0_3:
	movq	_DPU_SSPP_COMP_1_2@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	%rax, (%rcx,%rdx,8)
	movq	(%rdi), %rsi
	movq	(%r14), %rax
	movq	(%rsi,%rax,8), %rax
	movq	%rax, %rdx
	movq	32(%rbp), %rdi
	orq	%rdi, %rdx
	shrq	$32, %rdx
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	je	LBB0_4
## %bb.5:
	xorl	%edx, %edx
	divq	%rdi
	jmp	LBB0_6
LBB0_4:
                                        ## kill: def $eax killed $eax killed $rax
	xorl	%edx, %edx
	divl	%edi
                                        ## kill: def $eax killed $eax def $rax
LBB0_6:
	movq	_DPU_SSPP_COMP_1_2@GOTPCREL(%rip), %r8
	movq	(%r8), %rdx
	movq	%rax, (%rsi,%rdx,8)
	movq	(%r8), %rax
	movq	(%rsi,%rax,8), %rax
	movq	_DPU_SSPP_COMP_2@GOTPCREL(%rip), %rdi
	movq	(%rdi), %rdx
	movq	%rax, (%rsi,%rdx,8)
	movq	(%r8), %rax
	movq	(%rcx,%rax,8), %rax
	movq	(%rdi), %rdx
	movq	%rax, (%rcx,%rdx,8)
	movq	(%r14), %rax
	movq	(%rsi,%rax,8), %rax
	movq	_DPU_SSPP_COMP_3@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdi
	movq	%rax, (%rsi,%rdi,8)
	movq	(%r14), %rax
	movq	(%rcx,%rax,8), %rax
	movq	(%rdx), %rdx
	movq	%rax, (%rcx,%rdx,8)
	movq	_DPU_MAX_PLANES@GOTPCREL(%rip), %rdi
	cmpq	$0, (%rdi)
	je	LBB0_18
## %bb.7:
	movq	16(%rbp), %rax
	movq	16(%rax), %rcx
	movq	24(%rax), %r9
	movq	112(%rax), %r15
	movq	104(%rax), %r11
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	32(%rax), %r14
	movq	40(%rax), %rsi
	xorl	%r8d, %r8d
	movq	_DPU_QSEED3_DEFAULT_PRELOAD_H@GOTPCREL(%rip), %r10
	movq	_DPU_QSEED3_DEFAULT_PRELOAD_V@GOTPCREL(%rip), %r12
	movq	%r13, -56(%rbp)                 ## 8-byte Spill
	movq	%rsi, -72(%rbp)                 ## 8-byte Spill
	jmp	LBB0_8
LBB0_14:                                ##   in Loop: Header=BB0_8 Depth=1
                                        ## kill: def $eax killed $eax killed $rax
	xorl	%edx, %edx
	divl	%r13d
                                        ## kill: def $eax killed $eax def $rax
LBB0_16:                                ##   in Loop: Header=BB0_8 Depth=1
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movq	-72(%rbp), %rsi                 ## 8-byte Reload
	movq	%rax, (%r9,%r8,8)
	movq	-56(%rbp), %r13                 ## 8-byte Reload
LBB0_17:                                ##   in Loop: Header=BB0_8 Depth=1
	movl	(%r10), %edx
	movl	%edx, (%r15,%r8,4)
	movl	(%r12), %edx
	movl	%edx, (%r11,%r8,4)
	movq	%rax, (%r14,%r8,8)
	movq	(%rcx,%r8,8), %rax
	movq	%rax, (%rsi,%r8,8)
	incq	%r8
	cmpq	(%rdi), %r8
	jae	LBB0_18
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r13, (%rcx,%r8,8)
	movq	%rbx, (%r9,%r8,8)
	movq	_DPU_SSPP_COMP_1_2@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r8
	je	LBB0_10
## %bb.9:                               ##   in Loop: Header=BB0_8 Depth=1
	movq	%rbx, %rax
	movq	_DPU_SSPP_COMP_2@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %r8
	jne	LBB0_17
LBB0_10:                                ##   in Loop: Header=BB0_8 Depth=1
	movq	%rdi, %rsi
	movq	(%rcx,%r8,8), %rax
	movq	%rax, %rdx
	movq	32(%rbp), %rdi
	orq	%rdi, %rdx
	shrq	$32, %rdx
	je	LBB0_11
## %bb.12:                              ##   in Loop: Header=BB0_8 Depth=1
	xorl	%edx, %edx
	divq	%rdi
	jmp	LBB0_13
LBB0_11:                                ##   in Loop: Header=BB0_8 Depth=1
                                        ## kill: def $eax killed $eax killed $rax
	xorl	%edx, %edx
	divl	%edi
                                        ## kill: def $eax killed $eax def $rax
LBB0_13:                                ##   in Loop: Header=BB0_8 Depth=1
	movq	%rax, (%rcx,%r8,8)
	movq	(%r9,%r8,8), %rax
	movq	%rax, %rdx
	movq	40(%rbp), %r13
	orq	%r13, %rdx
	shrq	$32, %rdx
	movq	%rsi, %rdi
	je	LBB0_14
## %bb.15:                              ##   in Loop: Header=BB0_8 Depth=1
	xorl	%edx, %edx
	divq	%r13
	jmp	LBB0_16
LBB0_18:
	movq	24(%rbp), %rdi
	callq	_DPU_FORMAT_IS_YUV
	movq	-80(%rbp), %rsi                 ## 8-byte Reload
	cmpq	%rsi, %r13
	movq	-64(%rbp), %rdx                 ## 8-byte Reload
	jne	LBB0_21
## %bb.19:
	cmpq	%rdx, -48(%rbp)                 ## 8-byte Folded Reload
	jne	LBB0_21
## %bb.20:
	testl	%eax, %eax
	je	LBB0_22
LBB0_21:
	movq	16(%rbp), %rcx
	movq	%rsi, 48(%rcx)
	movq	%rdx, 56(%rcx)
	movq	_DPU_SCALE_BIL@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 96(%rcx)
	movq	%rax, 88(%rcx)
	movq	_DPU_SCALE_ALPHA_BIL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 80(%rcx)
	movq	$0, 72(%rcx)
	movabsq	$4294967297, %rax               ## imm = 0x100000001
	movq	%rax, 64(%rcx)
LBB0_22:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PHASE_STEP_SHIFT,4,2           ## @PHASE_STEP_SHIFT
	.comm	_DPU_SSPP_COMP_0,8,3            ## @DPU_SSPP_COMP_0
	.comm	_DPU_SSPP_COMP_1_2,8,3          ## @DPU_SSPP_COMP_1_2
	.comm	_DPU_SSPP_COMP_2,8,3            ## @DPU_SSPP_COMP_2
	.comm	_DPU_SSPP_COMP_3,8,3            ## @DPU_SSPP_COMP_3
	.comm	_DPU_MAX_PLANES,8,3             ## @DPU_MAX_PLANES
	.comm	_DPU_QSEED3_DEFAULT_PRELOAD_H,4,2 ## @DPU_QSEED3_DEFAULT_PRELOAD_H
	.comm	_DPU_QSEED3_DEFAULT_PRELOAD_V,4,2 ## @DPU_QSEED3_DEFAULT_PRELOAD_V
	.comm	_DPU_SCALE_BIL,8,3              ## @DPU_SCALE_BIL
	.comm	_DPU_SCALE_ALPHA_BIL,4,2        ## @DPU_SCALE_ALPHA_BIL
	.no_dead_strip	__dpu_plane_setup_scaler3
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function _dpu_plane_setup_scaler3
__dpu_plane_setup_scaler3:              ; @_dpu_plane_setup_scaler3
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	str	x7, [sp]                        ; 8-byte Folded Spill
	mov	x19, x6
	mov	x21, x5
	mov	x20, x4
	mov	x22, x3
	mov	x24, x2
	mov	x25, x1
	ldp	x27, x26, [x29, #16]
	mov	x0, x6
	mov	w1, #0
	mov	w2, #120
	bl	_memset
	mov	x0, x25
	mov	w1, #0
	mov	w2, #4
	bl	_memset
Lloh0:
	adrp	x28, _PHASE_STEP_SHIFT@GOTPAGE
Lloh1:
	ldr	x28, [x28, _PHASE_STEP_SHIFT@GOTPAGEOFF]
	ldr	w8, [x28]
	mov	w23, #1
	lsl	w0, w23, w8
	mov	x1, x24
	str	x20, [sp, #8]                   ; 8-byte Folded Spill
	mov	x2, x20
	bl	_mult_frac
Lloh2:
	adrp	x20, _DPU_SSPP_COMP_0@GOTPAGE
Lloh3:
	ldr	x20, [x20, _DPU_SSPP_COMP_0@GOTPAGEOFF]
	ldr	x8, [x19]
	ldr	x9, [x20]
	str	x0, [x8, x9, lsl #3]
	ldr	w8, [x28]
	lsl	w0, w23, w8
	mov	x1, x22
	mov	x2, x21
	bl	_mult_frac
	ldr	x8, [x20]
	ldp	x11, x10, [x19]
	str	x0, [x10, x8, lsl #3]
	ldr	x8, [x20]
	ldr	x8, [x10, x8, lsl #3]
	udiv	x9, x8, x26
Lloh4:
	adrp	x8, _DPU_SSPP_COMP_1_2@GOTPAGE
Lloh5:
	ldr	x8, [x8, _DPU_SSPP_COMP_1_2@GOTPAGEOFF]
	ldr	x12, [x8]
	str	x9, [x10, x12, lsl #3]
	ldr	x9, [x20]
	ldr	x9, [x11, x9, lsl #3]
	udiv	x9, x9, x27
	ldr	x12, [x8]
	str	x9, [x11, x12, lsl #3]
	ldr	x9, [x8]
	ldr	x12, [x11, x9, lsl #3]
Lloh6:
	adrp	x9, _DPU_SSPP_COMP_2@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DPU_SSPP_COMP_2@GOTPAGEOFF]
	ldr	x13, [x9]
	str	x12, [x11, x13, lsl #3]
	ldr	x12, [x8]
	ldr	x12, [x10, x12, lsl #3]
	ldr	x13, [x9]
	str	x12, [x10, x13, lsl #3]
	ldr	x12, [x20]
	ldr	x12, [x11, x12, lsl #3]
Lloh8:
	adrp	x13, _DPU_SSPP_COMP_3@GOTPAGE
Lloh9:
	ldr	x13, [x13, _DPU_SSPP_COMP_3@GOTPAGEOFF]
	ldr	x14, [x13]
	str	x12, [x11, x14, lsl #3]
	ldr	x11, [x20]
	ldr	x11, [x10, x11, lsl #3]
	ldr	x12, [x13]
	str	x11, [x10, x12, lsl #3]
Lloh10:
	adrp	x10, _DPU_MAX_PLANES@GOTPAGE
Lloh11:
	ldr	x10, [x10, _DPU_MAX_PLANES@GOTPAGEOFF]
	ldr	x11, [x10]
	cbz	x11, LBB0_5
; %bb.1:
	mov	x11, #0
	ldp	x12, x13, [x19, #16]
	ldp	x15, x14, [x19, #104]
	ldp	x16, x17, [x25, #32]
Lloh12:
	adrp	x0, _DPU_QSEED3_DEFAULT_PRELOAD_H@GOTPAGE
Lloh13:
	ldr	x0, [x0, _DPU_QSEED3_DEFAULT_PRELOAD_H@GOTPAGEOFF]
Lloh14:
	adrp	x1, _DPU_QSEED3_DEFAULT_PRELOAD_V@GOTPAGE
Lloh15:
	ldr	x1, [x1, _DPU_QSEED3_DEFAULT_PRELOAD_V@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	ldr	w4, [x0]
	lsl	x5, x11, #2
	str	w4, [x14, x5]
	ldr	w4, [x1]
	str	w4, [x15, x5]
	str	x3, [x16, x2]
	ldr	x3, [x12, x2]
	str	x3, [x17, x2]
	add	x11, x11, #1
	ldr	x2, [x10]
	cmp	x11, x2
	b.hs	LBB0_5
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	lsl	x2, x11, #3
	str	x24, [x12, x2]
	str	x22, [x13, x2]
	ldr	x3, [x8]
	ldr	x4, [x9]
	cmp	x11, x3
	ccmp	x11, x4, #4, ne
	mov	x3, x22
	b.ne	LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	x3, [x12, x2]
	udiv	x3, x3, x27
	str	x3, [x12, x2]
	ldr	x3, [x13, x2]
	udiv	x3, x3, x26
	str	x3, [x13, x2]
	b	LBB0_2
LBB0_5:
	ldr	x0, [sp]                        ; 8-byte Folded Reload
	bl	_DPU_FORMAT_IS_YUV
	ldr	x8, [sp, #8]                    ; 8-byte Folded Reload
	cmp	x24, x8
	b.ne	LBB0_8
; %bb.6:
	cmp	x22, x21
	b.ne	LBB0_8
; %bb.7:
	cbz	w0, LBB0_9
LBB0_8:
	stp	x8, x21, [x19, #48]
Lloh16:
	adrp	x8, _DPU_SCALE_BIL@GOTPAGE
Lloh17:
	ldr	x8, [x8, _DPU_SCALE_BIL@GOTPAGEOFF]
Lloh18:
	ldr	x8, [x8]
Lloh19:
	adrp	x9, _DPU_SCALE_ALPHA_BIL@GOTPAGE
Lloh20:
	ldr	x9, [x9, _DPU_SCALE_ALPHA_BIL@GOTPAGEOFF]
	stp	x8, x8, [x19, #88]
Lloh21:
	ldr	w8, [x9]
	str	w8, [x19, #80]
	str	xzr, [x19, #72]
	movi.2s	v0, #1
	str	d0, [x19, #64]
LBB0_9:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.comm	_PHASE_STEP_SHIFT,4,2           ; @PHASE_STEP_SHIFT
	.comm	_DPU_SSPP_COMP_0,8,3            ; @DPU_SSPP_COMP_0
	.comm	_DPU_SSPP_COMP_1_2,8,3          ; @DPU_SSPP_COMP_1_2
	.comm	_DPU_SSPP_COMP_2,8,3            ; @DPU_SSPP_COMP_2
	.comm	_DPU_SSPP_COMP_3,8,3            ; @DPU_SSPP_COMP_3
	.comm	_DPU_MAX_PLANES,8,3             ; @DPU_MAX_PLANES
	.comm	_DPU_QSEED3_DEFAULT_PRELOAD_H,4,2 ; @DPU_QSEED3_DEFAULT_PRELOAD_H
	.comm	_DPU_QSEED3_DEFAULT_PRELOAD_V,4,2 ; @DPU_QSEED3_DEFAULT_PRELOAD_V
	.comm	_DPU_SCALE_BIL,8,3              ; @DPU_SCALE_BIL
	.comm	_DPU_SCALE_ALPHA_BIL,4,2        ; @DPU_SCALE_ALPHA_BIL
	.no_dead_strip	__dpu_plane_setup_scaler3
.subsections_via_symbols
