	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v8_0_set_priv_inst_fault_state
_gfx_v8_0_set_priv_inst_fault_state:    ## @gfx_v8_0_set_priv_inst_fault_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_CP_INT_CNTL_RING0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_PRIV_INSTR_INT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_AMDGPU_IRQ_STATE_DISABLE@GOTPCREL(%rip), %rax
	xorl	%edx, %edx
	cmpl	%ecx, (%rax)
	setne	%dl
	callq	_WREG32_FIELD
	xorl	%eax, %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CP_INT_CNTL_RING0,4,2          ## @CP_INT_CNTL_RING0
	.comm	_PRIV_INSTR_INT_ENABLE,4,2      ## @PRIV_INSTR_INT_ENABLE
	.comm	_AMDGPU_IRQ_STATE_DISABLE,4,2   ## @AMDGPU_IRQ_STATE_DISABLE
	.no_dead_strip	_gfx_v8_0_set_priv_inst_fault_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v8_0_set_priv_inst_fault_state
_gfx_v8_0_set_priv_inst_fault_state:    ; @gfx_v8_0_set_priv_inst_fault_state
	.cfi_startproc
; %bb.0:
	stp	x29, x30, [sp, #-16]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 16
	mov	x29, sp
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
Lloh0:
	adrp	x8, _CP_INT_CNTL_RING0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CP_INT_CNTL_RING0@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _PRIV_INSTR_INT_ENABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PRIV_INSTR_INT_ENABLE@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
Lloh6:
	adrp	x8, _AMDGPU_IRQ_STATE_DISABLE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AMDGPU_IRQ_STATE_DISABLE@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	w8, w3
	cset	w2, ne
	bl	_WREG32_FIELD
	mov	w0, #0
	ldp	x29, x30, [sp], #16             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CP_INT_CNTL_RING0,4,2          ; @CP_INT_CNTL_RING0
	.comm	_PRIV_INSTR_INT_ENABLE,4,2      ; @PRIV_INSTR_INT_ENABLE
	.comm	_AMDGPU_IRQ_STATE_DISABLE,4,2   ; @AMDGPU_IRQ_STATE_DISABLE
	.no_dead_strip	_gfx_v8_0_set_priv_inst_fault_state
.subsections_via_symbols
