	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ti_sn_bridge_set_video_timings
_ti_sn_bridge_set_video_timings:        ## @ti_sn_bridge_set_video_timings
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	8(%rdi), %rax
	movq	(%rax), %rax
	movq	(%rax), %rbx
	movq	_DRM_MODE_FLAG_PHSYNC@GOTPCREL(%rip), %rax
	movl	(%rbx), %r15d
	movl	(%rax), %r12d
	andl	%r15d, %r12d
	je	LBB0_2
## %bb.1:
	movq	_CHA_HSYNC_POLARITY@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
LBB0_2:
	movl	4(%rbx), %edx
	movq	_DRM_MODE_FLAG_PVSYNC@GOTPCREL(%rip), %rax
	andl	(%rax), %r15d
	je	LBB0_4
## %bb.3:
	movq	_CHA_VSYNC_POLARITY@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
LBB0_4:
	movq	_SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_ti_sn_bridge_write_u16
	movq	_SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	8(%rbx), %edx
	movq	%r14, %rdi
	callq	_ti_sn_bridge_write_u16
	movl	(%r14), %edi
	movq	_SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	12(%rbx), %eax
	subl	16(%rbx), %eax
	movzbl	%al, %edx
	callq	_regmap_write
	movl	(%r14), %edi
	movq	_SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG@GOTPCREL(%rip), %rax
	movl	12(%rbx), %edx
	subl	16(%rbx), %edx
	movl	(%rax), %esi
	shrl	$8, %edx
	andl	$127, %edx
	orl	%r12d, %edx
	callq	_regmap_write
	movl	(%r14), %edi
	movq	_SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	20(%rbx), %eax
	subl	24(%rbx), %eax
	movzbl	%al, %edx
	callq	_regmap_write
	movl	(%r14), %edi
	movq	_SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG@GOTPCREL(%rip), %rax
	movl	20(%rbx), %edx
	subl	24(%rbx), %edx
	movl	(%rax), %esi
	shrl	$8, %edx
	andl	$127, %edx
	orl	%r15d, %edx
	callq	_regmap_write
	movl	(%r14), %edi
	movq	_SN_CHA_HORIZONTAL_BACK_PORCH_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	28(%rbx), %eax
	subl	12(%rbx), %eax
	movzbl	%al, %edx
	callq	_regmap_write
	movl	(%r14), %edi
	movq	_SN_CHA_VERTICAL_BACK_PORCH_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	32(%rbx), %eax
	subl	20(%rbx), %eax
	movzbl	%al, %edx
	callq	_regmap_write
	movl	(%r14), %edi
	movq	_SN_CHA_HORIZONTAL_FRONT_PORCH_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	16(%rbx), %eax
	subl	4(%rbx), %eax
	movzbl	%al, %edx
	callq	_regmap_write
	movl	(%r14), %edi
	movq	_SN_CHA_VERTICAL_FRONT_PORCH_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	24(%rbx), %eax
	subl	8(%rbx), %eax
	movzbl	%al, %edx
	callq	_regmap_write
	movl	$10000, %edi                    ## imm = 0x2710
	movl	$10500, %esi                    ## imm = 0x2904
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_usleep_range                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ## @DRM_MODE_FLAG_PHSYNC
	.comm	_CHA_HSYNC_POLARITY,4,2         ## @CHA_HSYNC_POLARITY
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ## @DRM_MODE_FLAG_PVSYNC
	.comm	_CHA_VSYNC_POLARITY,4,2         ## @CHA_VSYNC_POLARITY
	.comm	_SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG,4,2 ## @SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG
	.comm	_SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG,4,2 ## @SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG
	.comm	_SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG,4,2 ## @SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG
	.comm	_SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG,4,2 ## @SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG
	.comm	_SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG,4,2 ## @SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG
	.comm	_SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG,4,2 ## @SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG
	.comm	_SN_CHA_HORIZONTAL_BACK_PORCH_REG,4,2 ## @SN_CHA_HORIZONTAL_BACK_PORCH_REG
	.comm	_SN_CHA_VERTICAL_BACK_PORCH_REG,4,2 ## @SN_CHA_VERTICAL_BACK_PORCH_REG
	.comm	_SN_CHA_HORIZONTAL_FRONT_PORCH_REG,4,2 ## @SN_CHA_HORIZONTAL_FRONT_PORCH_REG
	.comm	_SN_CHA_VERTICAL_FRONT_PORCH_REG,4,2 ## @SN_CHA_VERTICAL_FRONT_PORCH_REG
	.no_dead_strip	_ti_sn_bridge_set_video_timings
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ti_sn_bridge_set_video_timings
_ti_sn_bridge_set_video_timings:        ; @ti_sn_bridge_set_video_timings
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0, #8]
	ldr	x8, [x8]
	ldr	x20, [x8]
Lloh0:
	adrp	x8, _DRM_MODE_FLAG_PHSYNC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DRM_MODE_FLAG_PHSYNC@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _CHA_HSYNC_POLARITY@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CHA_HSYNC_POLARITY@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	ldp	w10, w2, [x20]
	tst	w8, w10
	csel	w22, wzr, w9, eq
Lloh6:
	adrp	x8, _DRM_MODE_FLAG_PVSYNC@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DRM_MODE_FLAG_PVSYNC@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x9, _CHA_VSYNC_POLARITY@GOTPAGE
Lloh10:
	ldr	x9, [x9, _CHA_VSYNC_POLARITY@GOTPAGEOFF]
	tst	w8, w10
Lloh11:
	ldr	w8, [x9]
	csel	w21, wzr, w8, eq
Lloh12:
	adrp	x8, _SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	bl	_ti_sn_bridge_write_u16
Lloh15:
	adrp	x8, _SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG@GOTPAGE
Lloh16:
	ldr	x8, [x8, _SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	ldr	w2, [x20, #8]
	mov	x0, x19
	bl	_ti_sn_bridge_write_u16
Lloh18:
	adrp	x8, _SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG@GOTPAGE
Lloh19:
	ldr	x8, [x8, _SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh20:
	ldr	w1, [x8]
	ldp	w8, w9, [x20, #12]
	sub	w8, w8, w9
	and	w2, w8, #0xff
	bl	_regmap_write
	ldr	w0, [x19]
Lloh21:
	adrp	x8, _SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG@GOTPAGE
Lloh22:
	ldr	x8, [x8, _SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	ldp	w8, w9, [x20, #12]
	sub	w8, w8, w9
	ubfx	w8, w8, #8, #7
	orr	w2, w8, w22
	bl	_regmap_write
Lloh24:
	adrp	x8, _SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG@GOTPAGE
Lloh25:
	ldr	x8, [x8, _SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh26:
	ldr	w1, [x8]
	ldp	w8, w9, [x20, #20]
	sub	w8, w8, w9
	and	w2, w8, #0xff
	bl	_regmap_write
	ldr	w0, [x19]
Lloh27:
	adrp	x8, _SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG@GOTPAGE
Lloh28:
	ldr	x8, [x8, _SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	ldp	w8, w9, [x20, #20]
	sub	w8, w8, w9
	ubfx	w8, w8, #8, #7
	orr	w2, w8, w21
	bl	_regmap_write
Lloh30:
	adrp	x8, _SN_CHA_HORIZONTAL_BACK_PORCH_REG@GOTPAGE
Lloh31:
	ldr	x8, [x8, _SN_CHA_HORIZONTAL_BACK_PORCH_REG@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh32:
	ldr	w1, [x8]
	ldr	w8, [x20, #28]
	ldr	w9, [x20, #12]
	sub	w8, w8, w9
	and	w2, w8, #0xff
	bl	_regmap_write
Lloh33:
	adrp	x8, _SN_CHA_VERTICAL_BACK_PORCH_REG@GOTPAGE
Lloh34:
	ldr	x8, [x8, _SN_CHA_VERTICAL_BACK_PORCH_REG@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh35:
	ldr	w1, [x8]
	ldr	w8, [x20, #32]
	ldr	w9, [x20, #20]
	sub	w8, w8, w9
	and	w2, w8, #0xff
	bl	_regmap_write
Lloh36:
	adrp	x8, _SN_CHA_HORIZONTAL_FRONT_PORCH_REG@GOTPAGE
Lloh37:
	ldr	x8, [x8, _SN_CHA_HORIZONTAL_FRONT_PORCH_REG@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh38:
	ldr	w1, [x8]
	ldr	w8, [x20, #16]
	ldr	w9, [x20, #4]
	sub	w8, w8, w9
	and	w2, w8, #0xff
	bl	_regmap_write
Lloh39:
	adrp	x8, _SN_CHA_VERTICAL_FRONT_PORCH_REG@GOTPAGE
Lloh40:
	ldr	x8, [x8, _SN_CHA_VERTICAL_FRONT_PORCH_REG@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh41:
	ldr	w1, [x8]
	ldr	w8, [x20, #24]
	ldr	w9, [x20, #8]
	sub	w8, w8, w9
	and	w2, w8, #0xff
	bl	_regmap_write
	mov	w0, #10000
	mov	w1, #10500
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_usleep_range
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ; @DRM_MODE_FLAG_PHSYNC
	.comm	_CHA_HSYNC_POLARITY,4,2         ; @CHA_HSYNC_POLARITY
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ; @DRM_MODE_FLAG_PVSYNC
	.comm	_CHA_VSYNC_POLARITY,4,2         ; @CHA_VSYNC_POLARITY
	.comm	_SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG,4,2 ; @SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG
	.comm	_SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG,4,2 ; @SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG
	.comm	_SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG,4,2 ; @SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG
	.comm	_SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG,4,2 ; @SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG
	.comm	_SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG,4,2 ; @SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG
	.comm	_SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG,4,2 ; @SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG
	.comm	_SN_CHA_HORIZONTAL_BACK_PORCH_REG,4,2 ; @SN_CHA_HORIZONTAL_BACK_PORCH_REG
	.comm	_SN_CHA_VERTICAL_BACK_PORCH_REG,4,2 ; @SN_CHA_VERTICAL_BACK_PORCH_REG
	.comm	_SN_CHA_HORIZONTAL_FRONT_PORCH_REG,4,2 ; @SN_CHA_HORIZONTAL_FRONT_PORCH_REG
	.comm	_SN_CHA_VERTICAL_FRONT_PORCH_REG,4,2 ; @SN_CHA_VERTICAL_FRONT_PORCH_REG
	.no_dead_strip	_ti_sn_bridge_set_video_timings
.subsections_via_symbols
