	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function jz4780_dma_chan_irq
_jz4780_dma_chan_irq:                   ## @jz4780_dma_chan_irq
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r12
	movq	(%rdi), %rax
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	32(%rsi), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	leaq	8(%rsi), %rdi
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	callq	_spin_lock
	movl	24(%rbx), %esi
	movq	_JZ_DMA_REG_DCS@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movq	%r12, %rdi
	callq	_jz4780_dma_chn_readl
	movl	%eax, %r15d
	movl	24(%rbx), %esi
	movl	(%r14), %edx
	movq	%r12, %rdi
	xorl	%ecx, %ecx
	callq	_jz4780_dma_chn_writel
	movq	_JZ_DMA_DCS_AR@GOTPCREL(%rip), %r13
	testl	%r15d, (%r13)
	je	LBB0_2
## %bb.1:
	movq	16(%rbx), %rdi
	leaq	L_.str(%rip), %rsi
	movl	%r15d, %edx
	callq	_dev_warn
LBB0_2:
	movq	_JZ_DMA_DCS_HLT@GOTPCREL(%rip), %r14
	testl	%r15d, (%r14)
	je	LBB0_4
## %bb.3:
	movq	16(%rbx), %rdi
	leaq	L_.str.1(%rip), %rsi
	movl	%r15d, %edx
	callq	_dev_warn
LBB0_4:
	movq	32(%rbx), %rdi
	testq	%rdi, %rdi
	je	LBB0_14
## %bb.5:
	movl	%r15d, (%rdi)
	movl	(%r14), %eax
	orl	(%r13), %eax
	movl	$1, %r13d
	testl	%r15d, %eax
	jne	LBB0_15
## %bb.6:
	movq	8(%rdi), %rax
	movq	_DMA_CYCLIC@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_8
## %bb.7:
	addq	$24, %rdi
	callq	_vchan_cyclic_callback
	jmp	LBB0_12
LBB0_14:
	movq	16(%rbx), %rdi
	leaq	L_.str.2(%rip), %rsi
	callq	_dev_err
	movl	$1, %r13d
	jmp	LBB0_15
LBB0_8:
	movq	_JZ_DMA_DCS_TT@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_13
## %bb.9:
	movq	_JZ_SOC_DATA_BREAK_LINKS@GOTPCREL(%rip), %rax
	movl	-52(%rbp), %ecx                 ## 4-byte Reload
	testl	%ecx, (%rax)
	movq	-64(%rbp), %rdi                 ## 8-byte Reload
	je	LBB0_11
## %bb.10:
	movq	(%rbx), %rax
	incq	%rax
	cmpq	16(%rdi), %rax
	jne	LBB0_12
LBB0_11:
	addq	$24, %rdi
	callq	_vchan_cookie_complete
	movq	$0, 32(%rbx)
LBB0_12:
	movq	%rbx, %rdi
	callq	_jz4780_dma_begin
	jmp	LBB0_15
LBB0_13:
	movl	24(%rbx), %esi
	movq	_JZ_DMA_REG_DCS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_JZ_DMA_DCS_CTE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r12, %rdi
	callq	_jz4780_dma_chn_writel
	xorl	%r13d, %r13d
LBB0_15:
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_spin_unlock
	movl	%r13d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_JZ_DMA_REG_DCS,4,2             ## @JZ_DMA_REG_DCS
	.comm	_JZ_DMA_DCS_AR,4,2              ## @JZ_DMA_DCS_AR
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"address error (DCS=0x%x)\n"

	.comm	_JZ_DMA_DCS_HLT,4,2             ## @JZ_DMA_DCS_HLT
L_.str.1:                               ## @.str.1
	.asciz	"channel halt (DCS=0x%x)\n"

	.comm	_DMA_CYCLIC,8,3                 ## @DMA_CYCLIC
	.comm	_JZ_DMA_DCS_TT,4,2              ## @JZ_DMA_DCS_TT
	.comm	_JZ_SOC_DATA_BREAK_LINKS,4,2    ## @JZ_SOC_DATA_BREAK_LINKS
	.comm	_JZ_DMA_DCS_CTE,4,2             ## @JZ_DMA_DCS_CTE
L_.str.2:                               ## @.str.2
	.asciz	"channel IRQ with no active transfer\n"

	.no_dead_strip	_jz4780_dma_chan_irq
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function jz4780_dma_chan_irq
_jz4780_dma_chan_irq:                   ; @jz4780_dma_chan_irq
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x1
	mov	x21, x0
	ldr	x8, [x0]
	ldr	w24, [x8]
	ldr	x23, [x1, #32]
	add	x19, x1, #8
	mov	x0, x19
	bl	_spin_lock
	ldr	w1, [x20, #24]
Lloh0:
	adrp	x25, _JZ_DMA_REG_DCS@GOTPAGE
Lloh1:
	ldr	x25, [x25, _JZ_DMA_REG_DCS@GOTPAGEOFF]
	ldr	w2, [x25]
	mov	x0, x21
	bl	_jz4780_dma_chn_readl
	mov	x22, x0
	ldr	w1, [x20, #24]
	ldr	w2, [x25]
	mov	x0, x21
	mov	w3, #0
	bl	_jz4780_dma_chn_writel
Lloh2:
	adrp	x26, _JZ_DMA_DCS_AR@GOTPAGE
Lloh3:
	ldr	x26, [x26, _JZ_DMA_DCS_AR@GOTPAGEOFF]
	ldr	w8, [x26]
	tst	w8, w22
	b.eq	LBB0_2
; %bb.1:
	ldr	x0, [x20, #16]
Lloh4:
	adrp	x1, l_.str@PAGE
Lloh5:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x22
	bl	_dev_warn
LBB0_2:
Lloh6:
	adrp	x27, _JZ_DMA_DCS_HLT@GOTPAGE
Lloh7:
	ldr	x27, [x27, _JZ_DMA_DCS_HLT@GOTPAGEOFF]
	ldr	w8, [x27]
	tst	w8, w22
	b.eq	LBB0_4
; %bb.3:
	ldr	x0, [x20, #16]
Lloh8:
	adrp	x1, l_.str.1@PAGE
Lloh9:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x2, x22
	bl	_dev_warn
LBB0_4:
	ldr	x8, [x20, #32]
	cbz	x8, LBB0_8
; %bb.5:
	str	w22, [x8]
	ldr	w9, [x26]
	ldr	w10, [x27]
	orr	w9, w10, w9
	tst	w9, w22
	b.ne	LBB0_14
; %bb.6:
	ldr	x9, [x8, #8]
Lloh10:
	adrp	x10, _DMA_CYCLIC@GOTPAGE
Lloh11:
	ldr	x10, [x10, _DMA_CYCLIC@GOTPAGEOFF]
Lloh12:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_9
; %bb.7:
	add	x0, x8, #24
	bl	_vchan_cyclic_callback
	b	LBB0_13
LBB0_8:
	ldr	x0, [x20, #16]
Lloh13:
	adrp	x1, l_.str.2@PAGE
Lloh14:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_dev_err
	b	LBB0_14
LBB0_9:
Lloh15:
	adrp	x8, _JZ_DMA_DCS_TT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _JZ_DMA_DCS_TT@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_16
; %bb.10:
Lloh18:
	adrp	x8, _JZ_SOC_DATA_BREAK_LINKS@GOTPAGE
Lloh19:
	ldr	x8, [x8, _JZ_SOC_DATA_BREAK_LINKS@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	tst	w8, w24
	b.eq	LBB0_12
; %bb.11:
	ldr	x8, [x20]
	add	x8, x8, #1
	ldr	x9, [x23, #16]
	cmp	x8, x9
	b.ne	LBB0_13
LBB0_12:
	add	x0, x23, #24
	bl	_vchan_cookie_complete
	str	xzr, [x20, #32]
LBB0_13:
	mov	x0, x20
	bl	_jz4780_dma_begin
LBB0_14:
	mov	w20, #1
LBB0_15:
	mov	x0, x19
	bl	_spin_unlock
	mov	x0, x20
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_16:
	ldr	w1, [x20, #24]
	ldr	w2, [x25]
Lloh21:
	adrp	x8, _JZ_DMA_DCS_CTE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _JZ_DMA_DCS_CTE@GOTPAGEOFF]
Lloh23:
	ldr	w3, [x8]
	mov	x0, x21
	bl	_jz4780_dma_chn_writel
	mov	w20, #0
	b	LBB0_15
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_JZ_DMA_REG_DCS,4,2             ; @JZ_DMA_REG_DCS
	.comm	_JZ_DMA_DCS_AR,4,2              ; @JZ_DMA_DCS_AR
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"address error (DCS=0x%x)\n"

	.comm	_JZ_DMA_DCS_HLT,4,2             ; @JZ_DMA_DCS_HLT
l_.str.1:                               ; @.str.1
	.asciz	"channel halt (DCS=0x%x)\n"

	.comm	_DMA_CYCLIC,8,3                 ; @DMA_CYCLIC
	.comm	_JZ_DMA_DCS_TT,4,2              ; @JZ_DMA_DCS_TT
	.comm	_JZ_SOC_DATA_BREAK_LINKS,4,2    ; @JZ_SOC_DATA_BREAK_LINKS
	.comm	_JZ_DMA_DCS_CTE,4,2             ; @JZ_DMA_DCS_CTE
l_.str.2:                               ; @.str.2
	.asciz	"channel IRQ with no active transfer\n"

	.no_dead_strip	_jz4780_dma_chan_irq
.subsections_via_symbols
