	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvebu_gpio_probe
_mvebu_gpio_probe:                      ## @mvebu_gpio_probe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	(%rdi), %rbx
	movq	_mvebu_gpio_of_match@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%r12, %rsi
	callq	_of_match_device
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movl	(%rax), %r13d
	jmp	LBB0_3
LBB0_2:
	movl	$128, %r13d
LBB0_3:
	movq	%rbx, %rdi
	callq	_of_irq_count
	movq	%rax, %r15
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	$104, %esi
	callq	_devm_kzalloc
	testq	%rax, %rax
	je	LBB0_7
## %bb.4:
	movq	%rax, %r14
	movq	%r12, %rdi
	movq	%rax, %rsi
	callq	_platform_set_drvdata
	movq	(%r12), %rdi
	leaq	L_.str(%rip), %rsi
	leaq	-44(%rbp), %rdx
	callq	_of_property_read_u32
	testq	%rax, %rax
	je	LBB0_10
## %bb.5:
	leaq	L_.str.1(%rip), %rsi
	xorl	%r15d, %r15d
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_dev_err
LBB0_6:
	movq	_ENODEV@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_7:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
LBB0_8:
	subl	(%rax), %r15d
LBB0_9:
	movl	%r15d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movq	%r15, %rbx
	movq	(%r12), %rdi
	leaq	L_.str.2(%rip), %rsi
	callq	_of_alias_get_id
	movl	%eax, %r15d
	testl	%eax, %eax
	js	LBB0_17
## %bb.11:
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_devm_clk_get
	movl	%eax, 96(%r14)
	movl	%eax, %edi
	callq	_IS_ERR
	testl	%eax, %eax
	jne	LBB0_13
## %bb.12:
	movl	96(%r14), %edi
	callq	_clk_prepare_enable
LBB0_13:
	movl	%r13d, (%r14)
	movq	%r12, %rdi
	callq	_dev_name
	movl	%eax, 20(%r14)
	movq	%r12, 72(%r14)
	movq	_gpiochip_generic_request@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 68(%r14)
	movq	_gpiochip_generic_free@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%r14)
	movq	_mvebu_gpio_get_direction@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 60(%r14)
	movq	_mvebu_gpio_direction_input@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%r14)
	movq	_mvebu_gpio_get@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 52(%r14)
	movq	_mvebu_gpio_direction_output@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%r14)
	movq	_mvebu_gpio_set@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 44(%r14)
	testq	%rbx, %rbx
	je	LBB0_15
## %bb.14:
	movq	_mvebu_gpio_to_irq@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%r14)
LBB0_15:
	movq	_MVEBU_MAX_GPIO_PER_BANK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%r15d, -48(%rbp)                ## 4-byte Spill
	imull	%r15d, %eax
	movl	%eax, 8(%r14)
	movl	-44(%rbp), %eax
	movl	%eax, 12(%r14)
	movl	$0, 16(%r14)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	%rax, 32(%r14)
	movq	_mvebu_gpio_dbg_show@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%r14)
	movq	%r12, %rdi
	movq	%r14, %rsi
	cmpl	$131, %r13d
	jne	LBB0_18
## %bb.16:
	callq	_mvebu_gpio_probe_syscon
	jmp	LBB0_19
LBB0_17:
	leaq	L_.str.3(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_dev_err
                                        ## kill: def $r15d killed $r15d def $r15
	jmp	LBB0_9
LBB0_18:
	callq	_mvebu_gpio_probe_raw
LBB0_19:
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_9
## %bb.20:
	movq	%r14, %r15
	addq	$8, %r15
	addl	$-128, %r13d
	cmpl	$3, %r13d
	ja	LBB0_23
## %bb.21:
	leaq	LJTI0_0(%rip), %rax
	movslq	(%rax,%r13,4), %rcx
	addq	%rax, %rcx
	jmpq	*%rcx
LBB0_22:
	movl	84(%r14), %edi
	movq	_GPIO_EDGE_CAUSE_OFF@GOTPCREL(%rip), %rax
	movq	88(%r14), %rsi
	addq	(%rax), %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	84(%r14), %edi
	movq	_GPIO_EDGE_MASK_OFF@GOTPCREL(%rip), %rax
	movq	88(%r14), %rsi
	addq	(%rax), %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	84(%r14), %edi
	movq	_GPIO_LEVEL_MASK_OFF@GOTPCREL(%rip), %rax
	movq	88(%r14), %rsi
	addq	(%rax), %rsi
	jmp	LBB0_27
LBB0_23:
	xorl	%eax, %eax
	callq	_BUG
	jmp	LBB0_28
LBB0_24:
	movl	84(%r14), %edi
	movq	_GPIO_EDGE_CAUSE_OFF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movq	%r15, %r13
	movl	84(%r14), %r15d
	xorl	%edi, %edi
	callq	_GPIO_EDGE_MASK_MV78200_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	84(%r14), %r15d
	xorl	%edi, %edi
	callq	_GPIO_LEVEL_MASK_MV78200_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	84(%r14), %r15d
	movl	$1, %edi
	callq	_GPIO_EDGE_MASK_MV78200_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	84(%r14), %r15d
	movl	$1, %edi
	callq	_GPIO_LEVEL_MASK_MV78200_OFF
	jmp	LBB0_26
LBB0_25:
	movl	84(%r14), %edi
	movq	_GPIO_EDGE_CAUSE_OFF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	84(%r14), %edi
	movq	_GPIO_EDGE_MASK_OFF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	84(%r14), %edi
	movq	_GPIO_LEVEL_MASK_OFF@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movq	%r15, %r13
	movl	80(%r14), %r15d
	xorl	%edi, %edi
	callq	_GPIO_EDGE_CAUSE_ARMADAXP_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	80(%r14), %r15d
	xorl	%edi, %edi
	callq	_GPIO_EDGE_MASK_ARMADAXP_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	80(%r14), %r15d
	xorl	%edi, %edi
	callq	_GPIO_LEVEL_MASK_ARMADAXP_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	80(%r14), %r15d
	movl	$1, %edi
	callq	_GPIO_EDGE_CAUSE_ARMADAXP_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	80(%r14), %r15d
	movl	$1, %edi
	callq	_GPIO_EDGE_MASK_ARMADAXP_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	80(%r14), %r15d
	movl	$1, %edi
	callq	_GPIO_LEVEL_MASK_ARMADAXP_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	80(%r14), %r15d
	movl	$2, %edi
	callq	_GPIO_EDGE_CAUSE_ARMADAXP_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	80(%r14), %r15d
	movl	$2, %edi
	callq	_GPIO_EDGE_MASK_ARMADAXP_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	80(%r14), %r15d
	movl	$2, %edi
	callq	_GPIO_LEVEL_MASK_ARMADAXP_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	80(%r14), %r15d
	movl	$3, %edi
	callq	_GPIO_EDGE_CAUSE_ARMADAXP_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	80(%r14), %r15d
	movl	$3, %edi
	callq	_GPIO_EDGE_MASK_ARMADAXP_OFF
	movl	%r15d, %edi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	80(%r14), %r15d
	movl	$3, %edi
	callq	_GPIO_LEVEL_MASK_ARMADAXP_OFF
LBB0_26:
	movl	%r15d, %edi
	movq	%r13, %r15
	movq	%rax, %rsi
LBB0_27:
	xorl	%edx, %edx
	callq	_regmap_write
LBB0_28:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	_devm_gpiochip_add_data
	testq	%rbx, %rbx
	je	LBB0_32
## %bb.29:
	movl	-44(%rbp), %esi
	movq	_irq_generic_chip_ops@GOTPCREL(%rip), %rdx
	xorl	%r15d, %r15d
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_irq_domain_add_linear
	movl	%eax, 4(%r14)
	testl	%eax, %eax
	je	LBB0_33
## %bb.30:
	movl	-44(%rbp), %esi
	movl	(%rbx), %ecx
	movq	_handle_level_irq@GOTPCREL(%rip), %r8
	movq	_IRQ_NOREQUEST@GOTPCREL(%rip), %rdi
	movq	_IRQ_NOPROBE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r9d
	orl	(%rdi), %r9d
	movl	(%r8), %r8d
	movq	_IRQ_LEVEL@GOTPCREL(%rip), %rdx
	orl	(%rdx), %r9d
	movl	%eax, %edi
	movl	$2, %edx
	pushq	$0
	pushq	$0
	callq	_irq_alloc_domain_generic_chips
	addq	$16, %rsp
	testl	%eax, %eax
	je	LBB0_34
## %bb.31:
	movl	%eax, %r15d
	movl	20(%r14), %edx
	leaq	L_.str.5(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movl	4(%r14), %edi
	callq	_irq_domain_remove
	jmp	LBB0_9
LBB0_33:
	movl	20(%r14), %edx
	leaq	L_.str.4(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_6
LBB0_34:
	movl	4(%r14), %edi
	xorl	%esi, %esi
	callq	_irq_get_domain_generic_chip
	movq	%r14, 8(%rax)
	movq	(%rax), %rax
	movq	_IRQ_TYPE_LEVEL_HIGH@GOTPCREL(%rip), %rcx
	movq	_IRQ_TYPE_LEVEL_LOW@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movl	%edx, (%rax)
	movq	_mvebu_gpio_level_irq_mask@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 28(%rax)
	movq	_mvebu_gpio_level_irq_unmask@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 24(%rax)
	movq	_mvebu_gpio_irq_set_type@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, 16(%rax)
	movl	20(%r14), %edx
	movl	%edx, 8(%rax)
	movq	_IRQ_TYPE_EDGE_RISING@GOTPCREL(%rip), %rsi
	movq	_IRQ_TYPE_EDGE_FALLING@GOTPCREL(%rip), %rdi
	movl	(%rdi), %edi
	orl	(%rsi), %edi
	movl	%edi, 48(%rax)
	movq	_mvebu_gpio_irq_ack@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	movl	%esi, 80(%rax)
	movq	_mvebu_gpio_edge_irq_mask@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	movl	%esi, 76(%rax)
	movq	_mvebu_gpio_edge_irq_unmask@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	movl	%esi, 72(%rax)
	movq	%rcx, 64(%rax)
	movq	_handle_edge_irq@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 88(%rax)
	movl	%edx, 56(%rax)
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_platform_get_irq
	testl	%eax, %eax
	js	LBB0_36
## %bb.35:
	movq	_mvebu_gpio_irq_handler@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	movq	%r14, %rdx
	callq	_irq_set_chained_handler_and_data
LBB0_36:
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_platform_get_irq
	testl	%eax, %eax
	movl	-48(%rbp), %r15d                ## 4-byte Reload
	js	LBB0_38
## %bb.37:
	movq	_mvebu_gpio_irq_handler@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	movq	%r14, %rdx
	callq	_irq_set_chained_handler_and_data
LBB0_38:
	movq	%r12, %rdi
	movl	$2, %esi
	callq	_platform_get_irq
	testl	%eax, %eax
	js	LBB0_40
## %bb.39:
	movq	_mvebu_gpio_irq_handler@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	movq	%r14, %rdx
	callq	_irq_set_chained_handler_and_data
LBB0_40:
	movq	%r12, %rdi
	movl	$3, %esi
	callq	_platform_get_irq
	testl	%eax, %eax
	js	LBB0_42
## %bb.41:
	movq	_mvebu_gpio_irq_handler@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	movq	%r14, %rdx
	callq	_irq_set_chained_handler_and_data
LBB0_42:
	movq	_CONFIG_PWM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_IS_ENABLED
	testq	%rax, %rax
	je	LBB0_32
## %bb.43:
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	%r15d, %edx
	callq	_mvebu_pwm_probe
	movl	%eax, %r15d
	jmp	LBB0_9
LBB0_32:
	xorl	%r15d, %r15d
	jmp	LBB0_9
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_22, LBB0_22-LJTI0_0
.set L0_0_set_24, LBB0_24-LJTI0_0
.set L0_0_set_25, LBB0_25-LJTI0_0
LJTI0_0:
	.long	L0_0_set_22
	.long	L0_0_set_24
	.long	L0_0_set_25
	.long	L0_0_set_22
	.end_data_region
                                        ## -- End function
	.comm	_mvebu_gpio_of_match,4,2        ## @mvebu_gpio_of_match
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"ngpios"

L_.str.1:                               ## @.str.1
	.asciz	"Missing ngpios OF property\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
L_.str.2:                               ## @.str.2
	.asciz	"gpio"

L_.str.3:                               ## @.str.3
	.asciz	"Couldn't get OF id\n"

	.comm	_gpiochip_generic_request,4,2   ## @gpiochip_generic_request
	.comm	_gpiochip_generic_free,4,2      ## @gpiochip_generic_free
	.comm	_mvebu_gpio_get_direction,4,2   ## @mvebu_gpio_get_direction
	.comm	_mvebu_gpio_direction_input,4,2 ## @mvebu_gpio_direction_input
	.comm	_mvebu_gpio_get,4,2             ## @mvebu_gpio_get
	.comm	_mvebu_gpio_direction_output,4,2 ## @mvebu_gpio_direction_output
	.comm	_mvebu_gpio_set,4,2             ## @mvebu_gpio_set
	.comm	_mvebu_gpio_to_irq,4,2          ## @mvebu_gpio_to_irq
	.comm	_MVEBU_MAX_GPIO_PER_BANK,4,2    ## @MVEBU_MAX_GPIO_PER_BANK
	.comm	_mvebu_gpio_dbg_show,4,2        ## @mvebu_gpio_dbg_show
	.comm	_GPIO_EDGE_CAUSE_OFF,8,3        ## @GPIO_EDGE_CAUSE_OFF
	.comm	_GPIO_EDGE_MASK_OFF,8,3         ## @GPIO_EDGE_MASK_OFF
	.comm	_GPIO_LEVEL_MASK_OFF,8,3        ## @GPIO_LEVEL_MASK_OFF
	.comm	_irq_generic_chip_ops,4,2       ## @irq_generic_chip_ops
L_.str.4:                               ## @.str.4
	.asciz	"couldn't allocate irq domain %s (DT).\n"

	.comm	_handle_level_irq,4,2           ## @handle_level_irq
	.comm	_IRQ_NOREQUEST,4,2              ## @IRQ_NOREQUEST
	.comm	_IRQ_NOPROBE,4,2                ## @IRQ_NOPROBE
	.comm	_IRQ_LEVEL,4,2                  ## @IRQ_LEVEL
L_.str.5:                               ## @.str.5
	.asciz	"couldn't allocate irq chips %s (DT).\n"

	.comm	_IRQ_TYPE_LEVEL_HIGH,4,2        ## @IRQ_TYPE_LEVEL_HIGH
	.comm	_IRQ_TYPE_LEVEL_LOW,4,2         ## @IRQ_TYPE_LEVEL_LOW
	.comm	_mvebu_gpio_level_irq_mask,4,2  ## @mvebu_gpio_level_irq_mask
	.comm	_mvebu_gpio_level_irq_unmask,4,2 ## @mvebu_gpio_level_irq_unmask
	.comm	_mvebu_gpio_irq_set_type,8,3    ## @mvebu_gpio_irq_set_type
	.comm	_IRQ_TYPE_EDGE_RISING,4,2       ## @IRQ_TYPE_EDGE_RISING
	.comm	_IRQ_TYPE_EDGE_FALLING,4,2      ## @IRQ_TYPE_EDGE_FALLING
	.comm	_mvebu_gpio_irq_ack,4,2         ## @mvebu_gpio_irq_ack
	.comm	_mvebu_gpio_edge_irq_mask,4,2   ## @mvebu_gpio_edge_irq_mask
	.comm	_mvebu_gpio_edge_irq_unmask,4,2 ## @mvebu_gpio_edge_irq_unmask
	.comm	_handle_edge_irq,4,2            ## @handle_edge_irq
	.comm	_mvebu_gpio_irq_handler,4,2     ## @mvebu_gpio_irq_handler
	.comm	_CONFIG_PWM,4,2                 ## @CONFIG_PWM
	.no_dead_strip	_mvebu_gpio_probe
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvebu_gpio_probe
_mvebu_gpio_probe:                      ; @mvebu_gpio_probe
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x22, [x0]
Lloh0:
	adrp	x8, _mvebu_gpio_of_match@GOTPAGE
Lloh1:
	ldr	x8, [x8, _mvebu_gpio_of_match@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_of_match_device
	cbz	x0, LBB0_2
; %bb.1:
	ldr	w25, [x0]
	b	LBB0_3
LBB0_2:
	mov	w25, #128
LBB0_3:
	mov	x0, x22
	bl	_of_irq_count
	mov	x23, x0
Lloh3:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #104
	bl	_devm_kzalloc
	cbz	x0, LBB0_7
; %bb.4:
	mov	x20, x0
	mov	x0, x19
	mov	x1, x20
	bl	_platform_set_drvdata
	ldr	x0, [x19]
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	add	x2, sp, #12
	bl	_of_property_read_u32
	cbz	x0, LBB0_10
; %bb.5:
Lloh8:
	adrp	x1, l_.str.1@PAGE
Lloh9:
	add	x1, x1, l_.str.1@PAGEOFF
LBB0_6:
	mov	x0, x19
	bl	_dev_err
Lloh10:
	adrp	x8, _ENODEV@GOTPAGE
Lloh11:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:
Lloh12:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
LBB0_8:
	ldr	w8, [x8]
	neg	w24, w8
LBB0_9:
	mov	x0, x24
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_10:
	ldr	x0, [x19]
Lloh14:
	adrp	x1, l_.str.2@PAGE
Lloh15:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_of_alias_get_id
	mov	x21, x0
	tbnz	w0, #31, LBB0_17
; %bb.11:
	mov	x0, x19
	mov	x1, #0
	bl	_devm_clk_get
	str	w0, [x20, #96]
	bl	_IS_ERR
	cbnz	w0, LBB0_13
; %bb.12:
	ldr	w0, [x20, #96]
	bl	_clk_prepare_enable
LBB0_13:
	str	w25, [x20]
	mov	x0, x19
	bl	_dev_name
	str	w0, [x20, #20]
	str	x19, [x20, #72]
Lloh16:
	adrp	x8, _gpiochip_generic_request@GOTPAGE
Lloh17:
	ldr	x8, [x8, _gpiochip_generic_request@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	str	w8, [x20, #68]
Lloh19:
	adrp	x8, _gpiochip_generic_free@GOTPAGE
Lloh20:
	ldr	x8, [x8, _gpiochip_generic_free@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
Lloh22:
	adrp	x9, _mvebu_gpio_get_direction@GOTPAGE
Lloh23:
	ldr	x9, [x9, _mvebu_gpio_get_direction@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	stp	w9, w8, [x20, #60]
Lloh25:
	adrp	x8, _mvebu_gpio_direction_input@GOTPAGE
Lloh26:
	ldr	x8, [x8, _mvebu_gpio_direction_input@GOTPAGEOFF]
Lloh27:
	adrp	x9, _mvebu_gpio_get@GOTPAGE
Lloh28:
	ldr	x9, [x9, _mvebu_gpio_get@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
Lloh30:
	ldr	w9, [x9]
	stp	w9, w8, [x20, #52]
Lloh31:
	adrp	x8, _mvebu_gpio_direction_output@GOTPAGE
Lloh32:
	ldr	x8, [x8, _mvebu_gpio_direction_output@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
Lloh34:
	adrp	x9, _mvebu_gpio_set@GOTPAGE
Lloh35:
	ldr	x9, [x9, _mvebu_gpio_set@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	stp	w9, w8, [x20, #44]
	cbz	x23, LBB0_15
; %bb.14:
Lloh37:
	adrp	x8, _mvebu_gpio_to_irq@GOTPAGE
Lloh38:
	ldr	x8, [x8, _mvebu_gpio_to_irq@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	str	w8, [x20, #40]
LBB0_15:
Lloh40:
	adrp	x8, _MVEBU_MAX_GPIO_PER_BANK@GOTPAGE
Lloh41:
	ldr	x8, [x8, _MVEBU_MAX_GPIO_PER_BANK@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	mul	w8, w8, w21
	ldr	w9, [sp, #12]
	stp	w8, w9, [x20, #8]
	str	wzr, [x20, #16]
	str	x22, [x20, #32]
Lloh43:
	adrp	x8, _mvebu_gpio_dbg_show@GOTPAGE
Lloh44:
	ldr	x8, [x8, _mvebu_gpio_dbg_show@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	str	w8, [x20, #24]
	mov	x0, x19
	mov	x1, x20
	cmp	w25, #131
	b.ne	LBB0_18
; %bb.16:
	bl	_mvebu_gpio_probe_syscon
	mov	x24, x0
	cbnz	w0, LBB0_9
	b	LBB0_19
LBB0_17:
Lloh46:
	adrp	x1, l_.str.3@PAGE
Lloh47:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
	bl	_dev_err
	mov	x24, x21
	b	LBB0_9
LBB0_18:
	bl	_mvebu_gpio_probe_raw
	mov	x24, x0
	cbnz	w0, LBB0_9
LBB0_19:
	add	x24, x20, #8
	sub	w8, w25, #128
	cmp	w8, #3
	b.hi	LBB0_22
; %bb.20:
Lloh48:
	adrp	x9, lJTI0_0@PAGE
Lloh49:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_21
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_21:
	ldr	w0, [x20, #84]
Lloh50:
	adrp	x8, _GPIO_EDGE_CAUSE_OFF@GOTPAGE
Lloh51:
	ldr	x8, [x8, _GPIO_EDGE_CAUSE_OFF@GOTPAGEOFF]
Lloh52:
	ldr	x8, [x8]
	ldr	x9, [x20, #88]
	add	x1, x9, x8
	mov	w2, #0
	bl	_regmap_write
	ldr	w0, [x20, #84]
Lloh53:
	adrp	x8, _GPIO_EDGE_MASK_OFF@GOTPAGE
Lloh54:
	ldr	x8, [x8, _GPIO_EDGE_MASK_OFF@GOTPAGEOFF]
Lloh55:
	ldr	x8, [x8]
	ldr	x9, [x20, #88]
	add	x1, x9, x8
	mov	w2, #0
	bl	_regmap_write
	ldr	w0, [x20, #84]
Lloh56:
	adrp	x8, _GPIO_LEVEL_MASK_OFF@GOTPAGE
Lloh57:
	ldr	x8, [x8, _GPIO_LEVEL_MASK_OFF@GOTPAGEOFF]
Lloh58:
	ldr	x8, [x8]
	ldr	x9, [x20, #88]
	add	x1, x9, x8
	b	LBB0_26
LBB0_22:
	bl	_BUG
	b	LBB0_27
LBB0_23:
	ldr	w0, [x20, #84]
Lloh59:
	adrp	x8, _GPIO_EDGE_CAUSE_OFF@GOTPAGE
Lloh60:
	ldr	x8, [x8, _GPIO_EDGE_CAUSE_OFF@GOTPAGEOFF]
Lloh61:
	ldr	x1, [x8]
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #84]
	mov	w0, #0
	bl	_GPIO_EDGE_MASK_MV78200_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #84]
	mov	w0, #0
	bl	_GPIO_LEVEL_MASK_MV78200_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #84]
	mov	w0, #1
	bl	_GPIO_EDGE_MASK_MV78200_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #84]
	mov	w0, #1
	bl	_GPIO_LEVEL_MASK_MV78200_OFF
	b	LBB0_25
LBB0_24:
	ldr	w0, [x20, #84]
Lloh62:
	adrp	x8, _GPIO_EDGE_CAUSE_OFF@GOTPAGE
Lloh63:
	ldr	x8, [x8, _GPIO_EDGE_CAUSE_OFF@GOTPAGEOFF]
Lloh64:
	ldr	x1, [x8]
	mov	w2, #0
	bl	_regmap_write
	ldr	w0, [x20, #84]
Lloh65:
	adrp	x8, _GPIO_EDGE_MASK_OFF@GOTPAGE
Lloh66:
	ldr	x8, [x8, _GPIO_EDGE_MASK_OFF@GOTPAGEOFF]
Lloh67:
	ldr	x1, [x8]
	mov	w2, #0
	bl	_regmap_write
	ldr	w0, [x20, #84]
Lloh68:
	adrp	x8, _GPIO_LEVEL_MASK_OFF@GOTPAGE
Lloh69:
	ldr	x8, [x8, _GPIO_LEVEL_MASK_OFF@GOTPAGEOFF]
Lloh70:
	ldr	x1, [x8]
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #0
	bl	_GPIO_EDGE_CAUSE_ARMADAXP_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #0
	bl	_GPIO_EDGE_MASK_ARMADAXP_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #0
	bl	_GPIO_LEVEL_MASK_ARMADAXP_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #1
	bl	_GPIO_EDGE_CAUSE_ARMADAXP_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #1
	bl	_GPIO_EDGE_MASK_ARMADAXP_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #1
	bl	_GPIO_LEVEL_MASK_ARMADAXP_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #2
	bl	_GPIO_EDGE_CAUSE_ARMADAXP_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #2
	bl	_GPIO_EDGE_MASK_ARMADAXP_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #2
	bl	_GPIO_LEVEL_MASK_ARMADAXP_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #3
	bl	_GPIO_EDGE_CAUSE_ARMADAXP_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #3
	bl	_GPIO_EDGE_MASK_ARMADAXP_OFF
	mov	x1, x0
	mov	x0, x25
	mov	w2, #0
	bl	_regmap_write
	ldr	w25, [x20, #80]
	mov	w0, #3
	bl	_GPIO_LEVEL_MASK_ARMADAXP_OFF
LBB0_25:
	mov	x1, x0
	mov	x0, x25
LBB0_26:
	mov	w2, #0
	bl	_regmap_write
LBB0_27:
	mov	x0, x19
	mov	x1, x24
	mov	x2, x20
	bl	_devm_gpiochip_add_data
	cbz	x23, LBB0_42
; %bb.28:
	ldr	w1, [sp, #12]
Lloh71:
	adrp	x2, _irq_generic_chip_ops@GOTPAGE
Lloh72:
	ldr	x2, [x2, _irq_generic_chip_ops@GOTPAGEOFF]
	mov	x0, x22
	mov	x3, #0
	bl	_irq_domain_add_linear
	str	w0, [x20, #4]
	cbz	w0, LBB0_31
; %bb.29:
	ldr	w1, [sp, #12]
	ldr	w3, [x22]
Lloh73:
	adrp	x8, _handle_level_irq@GOTPAGE
Lloh74:
	ldr	x8, [x8, _handle_level_irq@GOTPAGEOFF]
Lloh75:
	ldr	w4, [x8]
Lloh76:
	adrp	x8, _IRQ_NOREQUEST@GOTPAGE
Lloh77:
	ldr	x8, [x8, _IRQ_NOREQUEST@GOTPAGEOFF]
Lloh78:
	ldr	w8, [x8]
Lloh79:
	adrp	x9, _IRQ_NOPROBE@GOTPAGE
Lloh80:
	ldr	x9, [x9, _IRQ_NOPROBE@GOTPAGEOFF]
Lloh81:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh82:
	adrp	x9, _IRQ_LEVEL@GOTPAGE
Lloh83:
	ldr	x9, [x9, _IRQ_LEVEL@GOTPAGEOFF]
Lloh84:
	ldr	w9, [x9]
	orr	w5, w8, w9
	mov	w2, #2
	mov	w6, #0
	mov	w7, #0
	bl	_irq_alloc_domain_generic_chips
	cbz	w0, LBB0_32
; %bb.30:
	mov	x24, x0
	ldr	w8, [x20, #20]
	str	x8, [sp]
Lloh85:
	adrp	x1, l_.str.5@PAGE
Lloh86:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x19
	bl	_dev_err
	ldr	w0, [x20, #4]
	bl	_irq_domain_remove
	b	LBB0_9
LBB0_31:
	ldr	w8, [x20, #20]
	str	x8, [sp]
Lloh87:
	adrp	x1, l_.str.4@PAGE
Lloh88:
	add	x1, x1, l_.str.4@PAGEOFF
	b	LBB0_6
LBB0_32:
	ldr	w0, [x20, #4]
	mov	w1, #0
	bl	_irq_get_domain_generic_chip
	str	x20, [x0, #8]
	ldr	x8, [x0]
Lloh89:
	adrp	x9, _IRQ_TYPE_LEVEL_HIGH@GOTPAGE
Lloh90:
	ldr	x9, [x9, _IRQ_TYPE_LEVEL_HIGH@GOTPAGEOFF]
Lloh91:
	ldr	w9, [x9]
Lloh92:
	adrp	x10, _IRQ_TYPE_LEVEL_LOW@GOTPAGE
Lloh93:
	ldr	x10, [x10, _IRQ_TYPE_LEVEL_LOW@GOTPAGEOFF]
Lloh94:
	ldr	w10, [x10]
	orr	w9, w10, w9
	str	w9, [x8]
Lloh95:
	adrp	x9, _mvebu_gpio_level_irq_mask@GOTPAGE
Lloh96:
	ldr	x9, [x9, _mvebu_gpio_level_irq_mask@GOTPAGEOFF]
Lloh97:
	adrp	x10, _mvebu_gpio_level_irq_unmask@GOTPAGE
Lloh98:
	ldr	x10, [x10, _mvebu_gpio_level_irq_unmask@GOTPAGEOFF]
Lloh99:
	ldr	w9, [x9]
Lloh100:
	ldr	w10, [x10]
	stp	w10, w9, [x8, #24]
Lloh101:
	adrp	x9, _mvebu_gpio_irq_set_type@GOTPAGE
Lloh102:
	ldr	x9, [x9, _mvebu_gpio_irq_set_type@GOTPAGEOFF]
Lloh103:
	ldr	x9, [x9]
	str	x9, [x8, #16]
	ldr	w10, [x20, #20]
	str	w10, [x8, #8]
Lloh104:
	adrp	x11, _IRQ_TYPE_EDGE_RISING@GOTPAGE
Lloh105:
	ldr	x11, [x11, _IRQ_TYPE_EDGE_RISING@GOTPAGEOFF]
Lloh106:
	ldr	w11, [x11]
Lloh107:
	adrp	x12, _IRQ_TYPE_EDGE_FALLING@GOTPAGE
Lloh108:
	ldr	x12, [x12, _IRQ_TYPE_EDGE_FALLING@GOTPAGEOFF]
Lloh109:
	ldr	w12, [x12]
	orr	w11, w12, w11
	str	w11, [x8, #48]
Lloh110:
	adrp	x11, _mvebu_gpio_irq_ack@GOTPAGE
Lloh111:
	ldr	x11, [x11, _mvebu_gpio_irq_ack@GOTPAGEOFF]
Lloh112:
	ldr	w11, [x11]
	str	w11, [x8, #80]
Lloh113:
	adrp	x11, _mvebu_gpio_edge_irq_mask@GOTPAGE
Lloh114:
	ldr	x11, [x11, _mvebu_gpio_edge_irq_mask@GOTPAGEOFF]
Lloh115:
	ldr	w11, [x11]
Lloh116:
	adrp	x12, _mvebu_gpio_edge_irq_unmask@GOTPAGE
Lloh117:
	ldr	x12, [x12, _mvebu_gpio_edge_irq_unmask@GOTPAGEOFF]
Lloh118:
	ldr	w12, [x12]
	stp	w12, w11, [x8, #72]
	str	x9, [x8, #64]
Lloh119:
	adrp	x9, _handle_edge_irq@GOTPAGE
Lloh120:
	ldr	x9, [x9, _handle_edge_irq@GOTPAGEOFF]
Lloh121:
	ldr	w9, [x9]
	str	w9, [x8, #88]
	str	w10, [x8, #56]
	mov	x0, x19
	mov	w1, #0
	bl	_platform_get_irq
Lloh122:
	adrp	x22, _mvebu_gpio_irq_handler@GOTPAGE
Lloh123:
	ldr	x22, [x22, _mvebu_gpio_irq_handler@GOTPAGEOFF]
	tbnz	w0, #31, LBB0_34
; %bb.33:
	ldr	w1, [x22]
	mov	x2, x20
	bl	_irq_set_chained_handler_and_data
LBB0_34:
	mov	x0, x19
	mov	w1, #1
	bl	_platform_get_irq
	tbnz	w0, #31, LBB0_36
; %bb.35:
	ldr	w1, [x22]
	mov	x2, x20
	bl	_irq_set_chained_handler_and_data
LBB0_36:
	mov	x0, x19
	mov	w1, #2
	bl	_platform_get_irq
	tbnz	w0, #31, LBB0_38
; %bb.37:
	ldr	w1, [x22]
	mov	x2, x20
	bl	_irq_set_chained_handler_and_data
LBB0_38:
	mov	x0, x19
	mov	w1, #3
	bl	_platform_get_irq
	tbnz	w0, #31, LBB0_40
; %bb.39:
	ldr	w1, [x22]
	mov	x2, x20
	bl	_irq_set_chained_handler_and_data
LBB0_40:
Lloh124:
	adrp	x8, _CONFIG_PWM@GOTPAGE
Lloh125:
	ldr	x8, [x8, _CONFIG_PWM@GOTPAGEOFF]
Lloh126:
	ldr	w0, [x8]
	bl	_IS_ENABLED
	cbz	x0, LBB0_42
; %bb.41:
	mov	x0, x19
	mov	x1, x20
	mov	x2, x21
	bl	_mvebu_pwm_probe
	mov	x24, x0
	b	LBB0_9
LBB0_42:
	mov	w24, #0
	b	LBB0_9
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh29
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGot	Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpAdd	Lloh85, Lloh86
	.loh AdrpAdd	Lloh87, Lloh88
	.loh AdrpLdrGot	Lloh122, Lloh123
	.loh AdrpLdrGotLdr	Lloh119, Lloh120, Lloh121
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh110, Lloh111, Lloh112
	.loh AdrpLdrGotLdr	Lloh107, Lloh108, Lloh109
	.loh AdrpLdrGotLdr	Lloh104, Lloh105, Lloh106
	.loh AdrpLdrGotLdr	Lloh101, Lloh102, Lloh103
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh100
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh99
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh124, Lloh125, Lloh126
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_21-LBB0_21)>>2
	.byte	(LBB0_23-LBB0_21)>>2
	.byte	(LBB0_24-LBB0_21)>>2
	.byte	(LBB0_21-LBB0_21)>>2
                                        ; -- End function
	.comm	_mvebu_gpio_of_match,4,2        ; @mvebu_gpio_of_match
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"ngpios"

l_.str.1:                               ; @.str.1
	.asciz	"Missing ngpios OF property\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
l_.str.2:                               ; @.str.2
	.asciz	"gpio"

l_.str.3:                               ; @.str.3
	.asciz	"Couldn't get OF id\n"

	.comm	_gpiochip_generic_request,4,2   ; @gpiochip_generic_request
	.comm	_gpiochip_generic_free,4,2      ; @gpiochip_generic_free
	.comm	_mvebu_gpio_get_direction,4,2   ; @mvebu_gpio_get_direction
	.comm	_mvebu_gpio_direction_input,4,2 ; @mvebu_gpio_direction_input
	.comm	_mvebu_gpio_get,4,2             ; @mvebu_gpio_get
	.comm	_mvebu_gpio_direction_output,4,2 ; @mvebu_gpio_direction_output
	.comm	_mvebu_gpio_set,4,2             ; @mvebu_gpio_set
	.comm	_mvebu_gpio_to_irq,4,2          ; @mvebu_gpio_to_irq
	.comm	_MVEBU_MAX_GPIO_PER_BANK,4,2    ; @MVEBU_MAX_GPIO_PER_BANK
	.comm	_mvebu_gpio_dbg_show,4,2        ; @mvebu_gpio_dbg_show
	.comm	_GPIO_EDGE_CAUSE_OFF,8,3        ; @GPIO_EDGE_CAUSE_OFF
	.comm	_GPIO_EDGE_MASK_OFF,8,3         ; @GPIO_EDGE_MASK_OFF
	.comm	_GPIO_LEVEL_MASK_OFF,8,3        ; @GPIO_LEVEL_MASK_OFF
	.comm	_irq_generic_chip_ops,4,2       ; @irq_generic_chip_ops
l_.str.4:                               ; @.str.4
	.asciz	"couldn't allocate irq domain %s (DT).\n"

	.comm	_handle_level_irq,4,2           ; @handle_level_irq
	.comm	_IRQ_NOREQUEST,4,2              ; @IRQ_NOREQUEST
	.comm	_IRQ_NOPROBE,4,2                ; @IRQ_NOPROBE
	.comm	_IRQ_LEVEL,4,2                  ; @IRQ_LEVEL
l_.str.5:                               ; @.str.5
	.asciz	"couldn't allocate irq chips %s (DT).\n"

	.comm	_IRQ_TYPE_LEVEL_HIGH,4,2        ; @IRQ_TYPE_LEVEL_HIGH
	.comm	_IRQ_TYPE_LEVEL_LOW,4,2         ; @IRQ_TYPE_LEVEL_LOW
	.comm	_mvebu_gpio_level_irq_mask,4,2  ; @mvebu_gpio_level_irq_mask
	.comm	_mvebu_gpio_level_irq_unmask,4,2 ; @mvebu_gpio_level_irq_unmask
	.comm	_mvebu_gpio_irq_set_type,8,3    ; @mvebu_gpio_irq_set_type
	.comm	_IRQ_TYPE_EDGE_RISING,4,2       ; @IRQ_TYPE_EDGE_RISING
	.comm	_IRQ_TYPE_EDGE_FALLING,4,2      ; @IRQ_TYPE_EDGE_FALLING
	.comm	_mvebu_gpio_irq_ack,4,2         ; @mvebu_gpio_irq_ack
	.comm	_mvebu_gpio_edge_irq_mask,4,2   ; @mvebu_gpio_edge_irq_mask
	.comm	_mvebu_gpio_edge_irq_unmask,4,2 ; @mvebu_gpio_edge_irq_unmask
	.comm	_handle_edge_irq,4,2            ; @handle_edge_irq
	.comm	_mvebu_gpio_irq_handler,4,2     ; @mvebu_gpio_irq_handler
	.comm	_CONFIG_PWM,4,2                 ; @CONFIG_PWM
	.no_dead_strip	_mvebu_gpio_probe
.subsections_via_symbols
