	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_rc6_residency_ns         ## -- Begin function intel_rc6_residency_ns
	.p2align	4, 0x90
_intel_rc6_residency_ns:                ## @intel_rc6_residency_ns
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %r14
	callq	_HAS_RC6
	testl	%eax, %eax
	je	LBB0_7
## %bb.1:
	movl	%r15d, %edi
	callq	_i915_mmio_reg_offset
	movl	%eax, %ebx
	movq	_GEN6_GT_GFX_RC6_LOCKED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_i915_mmio_reg_offset
	subl	%eax, %ebx
	sarl	$2, %ebx
	movq	8(%r14), %rdi
	callq	_ARRAY_SIZE
	xorl	%edi, %edi
	cmpl	%eax, %ebx
	setae	%dil
	callq	_WARN_ON_ONCE
	testq	%rax, %rax
	je	LBB0_2
LBB0_7:
	xorl	%eax, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	leaq	24(%r14), %r12
	movq	_FW_REG_READ@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_intel_uncore_forcewake_for_reg
	movl	%eax, %r13d
	movq	%r12, %rdi
	callq	_spin_lock_irqsave
	movq	%r12, %rdi
	movl	%r13d, -52(%rbp)                ## 4-byte Spill
	movl	%r13d, %esi
	callq	_intel_uncore_forcewake_get__locked
	movq	%r14, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	jne	LBB0_4
## %bb.3:
	movq	%r14, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_5
LBB0_4:
	movl	(%r14), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	$40, %edi
	callq	_BIT_ULL
	movq	%rax, %r13
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_vlv_residency_raw
	movl	$1000000, %r15d                 ## imm = 0xF4240
LBB0_6:
	movq	16(%r14), %rcx
	movl	%ebx, %edx
	xorl	%esi, %esi
	movq	%rax, %rdi
	subq	(%rcx,%rdx,8), %rdi
	movq	%rax, (%rcx,%rdx,8)
	cmovlq	%r13, %rsi
	movq	8(%r14), %rax
	leaq	(%rdi,%rsi), %rbx
	addq	(%rax,%rdx,8), %rbx
	movq	%rbx, (%rax,%rdx,8)
	movq	%r12, %rdi
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_intel_uncore_forcewake_put__locked
	movq	%r12, %rdi
	callq	_spin_unlock_irqrestore
	movq	%rbx, %rdi
	movl	%r15d, %esi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mul_u64_u32_div                ## TAILCALL
LBB0_5:
	movq	%r14, %rdi
	callq	_IS_GEN9_LP
	testq	%rax, %rax
	movl	$1280, %eax                     ## imm = 0x500
	movl	$10000, %ecx                    ## imm = 0x2710
	cmovel	%eax, %ecx
	movl	%ecx, -48(%rbp)                 ## 4-byte Spill
	movl	$1, %eax
	movl	$12, %ecx
	cmovel	%eax, %ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movl	$32, %edi
	callq	_BIT_ULL
	movq	%rax, %r13
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	-48(%rbp), %r15d                ## 4-byte Reload
	callq	_intel_uncore_read_fw
	jmp	LBB0_6
	.cfi_endproc
                                        ## -- End function
	.comm	_GEN6_GT_GFX_RC6_LOCKED,4,2     ## @GEN6_GT_GFX_RC6_LOCKED
	.comm	_FW_REG_READ,4,2                ## @FW_REG_READ
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_rc6_residency_ns         ; -- Begin function intel_rc6_residency_ns
	.p2align	2
_intel_rc6_residency_ns:                ; @intel_rc6_residency_ns
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x1
	mov	x19, x0
	bl	_HAS_RC6
	cbz	w0, LBB0_2
; %bb.1:
	mov	x0, x21
	bl	_i915_mmio_reg_offset
	mov	x20, x0
Lloh0:
	adrp	x8, _GEN6_GT_GFX_RC6_LOCKED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GEN6_GT_GFX_RC6_LOCKED@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_i915_mmio_reg_offset
	sub	w8, w20, w0
	asr	w26, w8, #2
	ldr	x0, [x19, #8]
	bl	_ARRAY_SIZE
	cmp	w26, w0
	cset	w0, hs
	bl	_WARN_ON_ONCE
	cbz	x0, LBB0_3
LBB0_2:
	mov	x0, #0
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_3:
	add	x20, x19, #24
Lloh3:
	adrp	x8, _FW_REG_READ@GOTPAGE
Lloh4:
	ldr	x8, [x8, _FW_REG_READ@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x21
	bl	_intel_uncore_forcewake_for_reg
	mov	x22, x0
	mov	x0, x20
	bl	_spin_lock_irqsave
	mov	x0, x20
	mov	x1, x22
	bl	_intel_uncore_forcewake_get__locked
	mov	x0, x19
	bl	_IS_VALLEYVIEW
	cbnz	x0, LBB0_5
; %bb.4:
	mov	x0, x19
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_7
LBB0_5:
	ldr	w23, [x19]
	mov	w0, #40
	bl	_BIT_ULL
	mov	x25, x0
	mov	x0, x19
	mov	x1, x21
	bl	_vlv_residency_raw
	mov	w24, #16960
	movk	w24, #15, lsl #16
LBB0_6:
	lsl	x8, x26, #3
	ldp	x10, x9, [x19, #8]
	ldr	x11, [x9, x8]
	str	x0, [x9, x8]
	subs	x9, x0, x11
	csel	x11, x25, xzr, lt
	ldr	x12, [x10, x8]
	add	x9, x9, x11
	add	x19, x9, x12
	str	x19, [x10, x8]
	mov	x0, x20
	mov	x1, x22
	bl	_intel_uncore_forcewake_put__locked
	mov	x0, x20
	bl	_spin_unlock_irqrestore
	mov	x0, x19
	mov	x1, x24
	mov	x2, x23
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_mul_u64_u32_div
LBB0_7:
	mov	x0, x19
	bl	_IS_GEN9_LP
	cmp	x0, #0
	mov	w8, #10000
	mov	w9, #1280
	csel	w24, w9, w8, eq
	mov	w8, #12
	csinc	w23, w8, wzr, ne
	mov	w0, #32
	bl	_BIT_ULL
	mov	x25, x0
	mov	x0, x20
	mov	x1, x21
	bl	_intel_uncore_read_fw
	b	LBB0_6
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_GEN6_GT_GFX_RC6_LOCKED,4,2     ; @GEN6_GT_GFX_RC6_LOCKED
	.comm	_FW_REG_READ,4,2                ; @FW_REG_READ
.subsections_via_symbols
