	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_unregister_gpu_instance ## -- Begin function amdgpu_unregister_gpu_instance
	.p2align	4, 0x90
_amdgpu_unregister_gpu_instance:        ## @amdgpu_unregister_gpu_instance
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_mgpu_info@GOTPCREL(%rip), %r15
	leaq	4(%r15), %r14
	movq	%r14, %rdi
	callq	_mutex_lock
	movl	(%r15), %eax
	testl	%eax, %eax
	jle	LBB0_7
## %bb.1:
	movq	16(%r15), %rcx
	xorl	%edx, %edx
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	cmpq	%rbx, (%rcx,%rdx,8)
	je	LBB0_4
## %bb.2:                               ##   in Loop: Header=BB0_3 Depth=1
	incq	%rdx
	cmpq	%rdx, %rax
	jne	LBB0_3
	jmp	LBB0_7
LBB0_4:
	movslq	%eax, %rsi
	decl	%eax
	movq	-8(%rcx,%rsi,8), %rsi
	movq	%rsi, (%rcx,%rdx,8)
	movl	%eax, (%r15)
	movq	_AMD_IS_APU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_6
## %bb.5:
	decl	12(%r15)
	jmp	LBB0_7
LBB0_6:
	decl	8(%r15)
LBB0_7:
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mutex_unlock                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_mgpu_info,24,3                 ## @mgpu_info
	.comm	_AMD_IS_APU,4,2                 ## @AMD_IS_APU
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_unregister_gpu_instance ; -- Begin function amdgpu_unregister_gpu_instance
	.p2align	2
_amdgpu_unregister_gpu_instance:        ; @amdgpu_unregister_gpu_instance
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
Lloh0:
	adrp	x21, _mgpu_info@GOTPAGE
Lloh1:
	ldr	x21, [x21, _mgpu_info@GOTPAGEOFF]
	add	x19, x21, #4
	mov	x0, x19
	bl	_mutex_lock
	ldr	w8, [x21]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.1:
	ldr	x9, [x21, #16]
	mov	x11, x8
	mov	x10, x9
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x12, [x10]
	cmp	x12, x20
	b.eq	LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	add	x10, x10, #8
	subs	x11, x11, #1
	b.ne	LBB0_2
	b	LBB0_7
LBB0_4:
	sub	w8, w8, #1
	ldr	x9, [x9, w8, sxtw #3]
	str	x9, [x10]
	str	w8, [x21]
	ldr	w8, [x20]
Lloh2:
	adrp	x9, _AMD_IS_APU@GOTPAGE
Lloh3:
	ldr	x9, [x9, _AMD_IS_APU@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.5:
	ldr	w8, [x21, #12]
	sub	w8, w8, #1
	str	w8, [x21, #12]
	b	LBB0_7
LBB0_6:
	ldr	w8, [x21, #8]
	sub	w8, w8, #1
	str	w8, [x21, #8]
LBB0_7:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_mutex_unlock
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_mgpu_info,24,3                 ; @mgpu_info
	.comm	_AMD_IS_APU,4,2                 ; @AMD_IS_APU
.subsections_via_symbols
