	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si_dpm_disable                 ## -- Begin function si_dpm_disable
	.p2align	4, 0x90
_si_dpm_disable:                        ## @si_dpm_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_rv770_get_pi
	movq	%rax, %r15
	movq	(%rbx), %r14
	movq	%rbx, %rdi
	callq	_si_is_smc_running
	testl	%eax, %eax
	je	LBB0_4
## %bb.1:
	movq	%rbx, %rdi
	callq	_si_thermal_stop_thermal_controller
	movq	%rbx, %rdi
	callq	_si_disable_ulv
	movq	%rbx, %rdi
	callq	_si_clear_vc
	cmpq	$0, (%r15)
	je	LBB0_3
## %bb.2:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_si_enable_thermal_protection
LBB0_3:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_si_enable_power_containment
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_si_enable_smc_cac
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_si_enable_spread_spectrum
	movq	_RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_si_enable_auto_throttle_source
	movq	%rbx, %rdi
	callq	_si_stop_dpm
	movq	%rbx, %rdi
	callq	_si_reset_to_default
	movq	%rbx, %rdi
	callq	_si_dpm_stop_smc
	movq	%rbx, %rdi
	callq	_si_force_switch_to_arb_f0
	movq	%rbx, %rdi
	movq	%r14, %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ni_update_current_ps           ## TAILCALL
LBB0_4:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL,4,2 ## @RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si_dpm_disable                 ; -- Begin function si_dpm_disable
	.p2align	2
_si_dpm_disable:                        ; @si_dpm_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_rv770_get_pi
	mov	x21, x0
	ldr	x20, [x19]
	mov	x0, x19
	bl	_si_is_smc_running
	cbz	w0, LBB0_4
; %bb.1:
	mov	x0, x19
	bl	_si_thermal_stop_thermal_controller
	mov	x0, x19
	bl	_si_disable_ulv
	mov	x0, x19
	bl	_si_clear_vc
	ldr	x8, [x21]
	cbz	x8, LBB0_3
; %bb.2:
	mov	x0, x19
	mov	w1, #0
	bl	_si_enable_thermal_protection
LBB0_3:
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	bl	_si_enable_power_containment
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	bl	_si_enable_smc_cac
	mov	x0, x19
	mov	w1, #0
	bl	_si_enable_spread_spectrum
Lloh0:
	adrp	x8, _RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_si_enable_auto_throttle_source
	mov	x0, x19
	bl	_si_stop_dpm
	mov	x0, x19
	bl	_si_reset_to_default
	mov	x0, x19
	bl	_si_dpm_stop_smc
	mov	x0, x19
	bl	_si_force_switch_to_arb_f0
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_ni_update_current_ps
LBB0_4:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL,4,2 ; @RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL
.subsections_via_symbols
