	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_sar_adc_enable_channel
_meson_sar_adc_enable_channel:          ## @meson_sar_adc_enable_channel
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	callq	_iio_priv
	movq	%rax, %r14
	movq	_MESON_SAR_ADC_CHAN_LIST_MAX_INDEX_MASK@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	_FIELD_PREP
	movl	(%r14), %edi
	movq	_MESON_SAR_ADC_CHAN_LIST@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	(%rbx), %rdx
	movq	%rax, %rcx
	callq	_regmap_update_bits
	xorl	%edi, %edi
	callq	_MESON_SAR_ADC_CHAN_LIST_ENTRY_MASK
	movq	(%r15), %rsi
	movq	%rax, %rdi
	callq	_FIELD_PREP
	movq	%rax, %r12
	movl	(%r14), %ebx
	movl	(%r13), %r13d
	xorl	%edi, %edi
	callq	_MESON_SAR_ADC_CHAN_LIST_ENTRY_MASK
	movl	%ebx, %edi
	movl	%r13d, %esi
	movq	%rax, %rdx
	movq	%r12, %rcx
	callq	_regmap_update_bits
	movq	_MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	movq	(%r15), %rsi
	callq	_FIELD_PREP
	movl	(%r14), %edi
	movq	_MESON_SAR_ADC_DETECT_IDLE_SW@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	(%rbx), %rdx
	movq	%rax, %rcx
	callq	_regmap_update_bits
	movq	_MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	movq	(%r15), %rsi
	callq	_FIELD_PREP
	movl	(%r14), %edi
	movl	(%r12), %esi
	movq	(%rbx), %rdx
	movq	%rax, %rcx
	callq	_regmap_update_bits
	movq	(%r15), %rax
	movq	_MESON_SAR_ADC_VOLTAGE_AND_TEMP_CHANNEL@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_1
## %bb.2:
	movq	8(%r15), %rax
	movq	_IIO_TEMP@GOTPCREL(%rip), %rdx
	xorl	%ecx, %ecx
	cmpq	(%rdx), %rax
	movq	_MESON_SAR_ADC_DELTA_10_TEMP_SEL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	cmoveq	%rdx, %rcx
	movl	(%r14), %edi
	movq	_MESON_SAR_ADC_DELTA_10@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_regmap_update_bits             ## TAILCALL
LBB0_1:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MESON_SAR_ADC_CHAN_LIST_MAX_INDEX_MASK,8,3 ## @MESON_SAR_ADC_CHAN_LIST_MAX_INDEX_MASK
	.comm	_MESON_SAR_ADC_CHAN_LIST,4,2    ## @MESON_SAR_ADC_CHAN_LIST
	.comm	_MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK,8,3 ## @MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK
	.comm	_MESON_SAR_ADC_DETECT_IDLE_SW,4,2 ## @MESON_SAR_ADC_DETECT_IDLE_SW
	.comm	_MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK,8,3 ## @MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK
	.comm	_MESON_SAR_ADC_VOLTAGE_AND_TEMP_CHANNEL,8,3 ## @MESON_SAR_ADC_VOLTAGE_AND_TEMP_CHANNEL
	.comm	_IIO_TEMP,8,3                   ## @IIO_TEMP
	.comm	_MESON_SAR_ADC_DELTA_10_TEMP_SEL,8,3 ## @MESON_SAR_ADC_DELTA_10_TEMP_SEL
	.comm	_MESON_SAR_ADC_DELTA_10,4,2     ## @MESON_SAR_ADC_DELTA_10
	.no_dead_strip	_meson_sar_adc_enable_channel
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_sar_adc_enable_channel
_meson_sar_adc_enable_channel:          ; @meson_sar_adc_enable_channel
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	bl	_iio_priv
	mov	x19, x0
Lloh0:
	adrp	x21, _MESON_SAR_ADC_CHAN_LIST_MAX_INDEX_MASK@GOTPAGE
Lloh1:
	ldr	x21, [x21, _MESON_SAR_ADC_CHAN_LIST_MAX_INDEX_MASK@GOTPAGEOFF]
	ldr	x0, [x21]
	mov	x1, #0
	bl	_FIELD_PREP
	mov	x3, x0
	ldr	w0, [x19]
Lloh2:
	adrp	x23, _MESON_SAR_ADC_CHAN_LIST@GOTPAGE
Lloh3:
	ldr	x23, [x23, _MESON_SAR_ADC_CHAN_LIST@GOTPAGEOFF]
	ldr	w1, [x23]
	ldr	x2, [x21]
	bl	_regmap_update_bits
	mov	w0, #0
	bl	_MESON_SAR_ADC_CHAN_LIST_ENTRY_MASK
	ldr	x1, [x20]
	bl	_FIELD_PREP
	mov	x21, x0
	ldr	w22, [x19]
	ldr	w23, [x23]
	mov	w0, #0
	bl	_MESON_SAR_ADC_CHAN_LIST_ENTRY_MASK
	mov	x2, x0
	mov	x0, x22
	mov	x1, x23
	mov	x3, x21
	bl	_regmap_update_bits
Lloh4:
	adrp	x21, _MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK@GOTPAGE
Lloh5:
	ldr	x21, [x21, _MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK@GOTPAGEOFF]
	ldr	x0, [x21]
	ldr	x1, [x20]
	bl	_FIELD_PREP
	mov	x3, x0
	ldr	w0, [x19]
Lloh6:
	adrp	x22, _MESON_SAR_ADC_DETECT_IDLE_SW@GOTPAGE
Lloh7:
	ldr	x22, [x22, _MESON_SAR_ADC_DETECT_IDLE_SW@GOTPAGEOFF]
	ldr	w1, [x22]
	ldr	x2, [x21]
	bl	_regmap_update_bits
Lloh8:
	adrp	x21, _MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK@GOTPAGE
Lloh9:
	ldr	x21, [x21, _MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK@GOTPAGEOFF]
	ldr	x0, [x21]
	ldr	x1, [x20]
	bl	_FIELD_PREP
	mov	x3, x0
	ldr	w0, [x19]
	ldr	w1, [x22]
	ldr	x2, [x21]
	bl	_regmap_update_bits
	ldr	x8, [x20]
Lloh10:
	adrp	x9, _MESON_SAR_ADC_VOLTAGE_AND_TEMP_CHANNEL@GOTPAGE
Lloh11:
	ldr	x9, [x9, _MESON_SAR_ADC_VOLTAGE_AND_TEMP_CHANNEL@GOTPAGEOFF]
Lloh12:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	ldr	x8, [x20, #8]
Lloh13:
	adrp	x9, _IIO_TEMP@GOTPAGE
Lloh14:
	ldr	x9, [x9, _IIO_TEMP@GOTPAGEOFF]
Lloh15:
	adrp	x10, _MESON_SAR_ADC_DELTA_10_TEMP_SEL@GOTPAGE
Lloh16:
	ldr	x10, [x10, _MESON_SAR_ADC_DELTA_10_TEMP_SEL@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
Lloh18:
	ldr	x2, [x10]
	cmp	x8, x9
	csel	x3, x2, xzr, eq
Lloh19:
	adrp	x8, _MESON_SAR_ADC_DELTA_10@GOTPAGE
Lloh20:
	ldr	x8, [x8, _MESON_SAR_ADC_DELTA_10@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh21:
	ldr	w1, [x8]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_regmap_update_bits
LBB0_2:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_MESON_SAR_ADC_CHAN_LIST_MAX_INDEX_MASK,8,3 ; @MESON_SAR_ADC_CHAN_LIST_MAX_INDEX_MASK
	.comm	_MESON_SAR_ADC_CHAN_LIST,4,2    ; @MESON_SAR_ADC_CHAN_LIST
	.comm	_MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK,8,3 ; @MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK
	.comm	_MESON_SAR_ADC_DETECT_IDLE_SW,4,2 ; @MESON_SAR_ADC_DETECT_IDLE_SW
	.comm	_MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK,8,3 ; @MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK
	.comm	_MESON_SAR_ADC_VOLTAGE_AND_TEMP_CHANNEL,8,3 ; @MESON_SAR_ADC_VOLTAGE_AND_TEMP_CHANNEL
	.comm	_IIO_TEMP,8,3                   ; @IIO_TEMP
	.comm	_MESON_SAR_ADC_DELTA_10_TEMP_SEL,8,3 ; @MESON_SAR_ADC_DELTA_10_TEMP_SEL
	.comm	_MESON_SAR_ADC_DELTA_10,4,2     ; @MESON_SAR_ADC_DELTA_10
	.no_dead_strip	_meson_sar_adc_enable_channel
.subsections_via_symbols
