	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_psr_wait_loop
_dce_psr_wait_loop:                     ## @dce_psr_wait_loop
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	callq	_TO_DCE_DMCU
	cmpl	%r14d, (%rbx)
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_dce_is_dmcu_initialized
	testl	%eax, %eax
	je	LBB0_2
## %bb.3:
	movq	_MASTER_COMM_CNTL_REG@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	movq	_MASTER_COMM_INTERRUPT@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	xorl	%edx, %edx
	movl	$1, %ecx
	movl	$10000, %r8d                    ## imm = 0x2710
	callq	_REG_WAIT
	movl	%r14d, (%rbx)
	movl	4(%rbx), %ebx
	movq	_MASTER_COMM_DATA_REG1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_REG
	movl	%r14d, %edx
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_dm_write_reg
	movq	_MASTER_COMM_CMD_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MASTER_COMM_CMD_REG_BYTE0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PSR_SET_WAITLOOP@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_REG_UPDATE
	movl	(%r15), %edi
	movl	(%r12), %esi
	movl	$1, %edx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_REG_UPDATE                     ## TAILCALL
LBB0_2:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MASTER_COMM_CNTL_REG,4,2       ## @MASTER_COMM_CNTL_REG
	.comm	_MASTER_COMM_INTERRUPT,4,2      ## @MASTER_COMM_INTERRUPT
	.comm	_MASTER_COMM_DATA_REG1,4,2      ## @MASTER_COMM_DATA_REG1
	.comm	_MASTER_COMM_CMD_REG,4,2        ## @MASTER_COMM_CMD_REG
	.comm	_MASTER_COMM_CMD_REG_BYTE0,4,2  ## @MASTER_COMM_CMD_REG_BYTE0
	.comm	_PSR_SET_WAITLOOP,4,2           ## @PSR_SET_WAITLOOP
	.no_dead_strip	_dce_psr_wait_loop
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_psr_wait_loop
_dce_psr_wait_loop:                     ; @dce_psr_wait_loop
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
	bl	_TO_DCE_DMCU
	ldr	w8, [x20]
	cmp	w8, w19
	b.eq	LBB0_3
; %bb.1:
	mov	x0, x20
	bl	_dce_is_dmcu_initialized
	cbz	w0, LBB0_3
; %bb.2:
Lloh0:
	adrp	x21, _MASTER_COMM_CNTL_REG@GOTPAGE
Lloh1:
	ldr	x21, [x21, _MASTER_COMM_CNTL_REG@GOTPAGEOFF]
	ldr	w0, [x21]
Lloh2:
	adrp	x22, _MASTER_COMM_INTERRUPT@GOTPAGE
Lloh3:
	ldr	x22, [x22, _MASTER_COMM_INTERRUPT@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	w2, #0
	mov	w3, #1
	mov	w4, #10000
	bl	_REG_WAIT
	str	w19, [x20]
	ldr	w20, [x20, #4]
Lloh4:
	adrp	x8, _MASTER_COMM_DATA_REG1@GOTPAGE
Lloh5:
	ldr	x8, [x8, _MASTER_COMM_DATA_REG1@GOTPAGEOFF]
Lloh6:
	ldr	w0, [x8]
	bl	_REG
	mov	x1, x0
	mov	w2, w19
	mov	x0, x20
	bl	_dm_write_reg
Lloh7:
	adrp	x8, _MASTER_COMM_CMD_REG@GOTPAGE
Lloh8:
	ldr	x8, [x8, _MASTER_COMM_CMD_REG@GOTPAGEOFF]
Lloh9:
	ldr	w0, [x8]
Lloh10:
	adrp	x8, _MASTER_COMM_CMD_REG_BYTE0@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MASTER_COMM_CMD_REG_BYTE0@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
Lloh13:
	adrp	x8, _PSR_SET_WAITLOOP@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PSR_SET_WAITLOOP@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	bl	_REG_UPDATE
	ldr	w0, [x21]
	ldr	w1, [x22]
	mov	w2, #1
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_REG_UPDATE
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MASTER_COMM_CNTL_REG,4,2       ; @MASTER_COMM_CNTL_REG
	.comm	_MASTER_COMM_INTERRUPT,4,2      ; @MASTER_COMM_INTERRUPT
	.comm	_MASTER_COMM_DATA_REG1,4,2      ; @MASTER_COMM_DATA_REG1
	.comm	_MASTER_COMM_CMD_REG,4,2        ; @MASTER_COMM_CMD_REG
	.comm	_MASTER_COMM_CMD_REG_BYTE0,4,2  ; @MASTER_COMM_CMD_REG_BYTE0
	.comm	_PSR_SET_WAITLOOP,4,2           ; @PSR_SET_WAITLOOP
	.no_dead_strip	_dce_psr_wait_loop
.subsections_via_symbols
