	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_wb_init                 ## -- Begin function radeon_wb_init
	.p2align	4, 0x90
_radeon_wb_init:                        ## @radeon_wb_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$32, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	cmpq	$0, 32(%rdi)
	je	LBB0_1
LBB0_10:
	movq	24(%rbx), %rdi
	movq	_RADEON_GPU_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_memset
	movl	$0, 16(%rbx)
	movq	_radeon_no_wb@GOTPCREL(%rip), %rax
	cmpl	$1, (%rax)
	je	LBB0_11
## %bb.12:
	movq	_RADEON_IS_AGP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	jne	LBB0_11
## %bb.13:
	movq	8(%rbx), %rax
	movq	_CHIP_R300@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_14
LBB0_11:
	movl	$0, 20(%rbx)
	leaq	L_.str.5(%rip), %rdx
LBB0_16:
	movq	8(%rbx), %rax
	movq	_CHIP_PALM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_18
## %bb.17:
	movabsq	$4294967297, %rax               ## imm = 0x100000001
	movq	%rax, 16(%rbx)
	leaq	L_.str.4(%rip), %rdx
LBB0_18:
	movl	48(%rbx), %edi
	leaq	L_.str.3(%rip), %rsi
	callq	_dev_info
	xorl	%r14d, %r14d
	jmp	LBB0_19
LBB0_1:
	leaq	32(%rbx), %r12
	movq	_RADEON_GPU_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_RADEON_GEM_DOMAIN_GTT@GOTPCREL(%rip), %r15
	movl	(%r15), %r8d
	movq	%r12, 16(%rsp)
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rsp)
	movq	%rbx, %rdi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	_radeon_bo_create
	testl	%eax, %eax
	je	LBB0_3
## %bb.2:
	movl	%eax, %r14d
	movl	48(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	movl	%eax, %edx
	callq	_dev_warn
	jmp	LBB0_19
LBB0_3:
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	_radeon_bo_reserve
	movl	%eax, %r14d
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_4
## %bb.5:
	movq	32(%rbx), %rdi
	movl	(%r15), %esi
	leaq	40(%rbx), %rdx
	callq	_radeon_bo_pin
	movq	32(%rbx), %rdi
	testl	%eax, %eax
	je	LBB0_7
## %bb.6:
	movl	%eax, %r14d
	callq	_radeon_bo_unreserve
	movl	48(%rbx), %edi
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_9
LBB0_14:
	movl	$1, 20(%rbx)
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	leaq	L_.str.4(%rip), %rdx
	cmpq	(%rcx), %rax
	jl	LBB0_16
## %bb.15:
	movl	$1, 16(%rbx)
	jmp	LBB0_16
LBB0_7:
	leaq	24(%rbx), %rsi
	callq	_radeon_bo_kmap
	movl	%eax, %r14d
	movq	32(%rbx), %rdi
	callq	_radeon_bo_unreserve
	testl	%r14d, %r14d
	je	LBB0_10
## %bb.8:
	movl	48(%rbx), %edi
	leaq	L_.str.2(%rip), %rsi
LBB0_9:
	movl	%r14d, %edx
	callq	_dev_warn
LBB0_4:
	movq	%rbx, %rdi
	callq	_radeon_wb_fini
LBB0_19:
	movl	%r14d, %eax
	addq	$32, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ## @RADEON_GPU_PAGE_SIZE
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_RADEON_GEM_DOMAIN_GTT,4,2      ## @RADEON_GEM_DOMAIN_GTT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"(%d) create WB bo failed\n"

L_.str.1:                               ## @.str.1
	.asciz	"(%d) pin WB bo failed\n"

L_.str.2:                               ## @.str.2
	.asciz	"(%d) map WB bo failed\n"

	.comm	_radeon_no_wb,4,2               ## @radeon_no_wb
	.comm	_RADEON_IS_AGP,4,2              ## @RADEON_IS_AGP
	.comm	_CHIP_R300,8,3                  ## @CHIP_R300
	.comm	_CHIP_R600,8,3                  ## @CHIP_R600
	.comm	_CHIP_PALM,8,3                  ## @CHIP_PALM
L_.str.3:                               ## @.str.3
	.asciz	"WB %sabled\n"

L_.str.4:                               ## @.str.4
	.asciz	"en"

L_.str.5:                               ## @.str.5
	.asciz	"dis"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_wb_init                 ; -- Begin function radeon_wb_init
	.p2align	2
_radeon_wb_init:                        ; @radeon_wb_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	mov	x23, x0
	ldr	x8, [x23, #32]!
Lloh0:
	adrp	x21, _RADEON_GPU_PAGE_SIZE@GOTPAGE
Lloh1:
	ldr	x21, [x21, _RADEON_GPU_PAGE_SIZE@GOTPAGEOFF]
	cbz	x8, LBB0_8
LBB0_1:
	ldr	x0, [x19, #24]
	ldr	w2, [x21]
	mov	w1, #0
	bl	_memset
	str	wzr, [x19, #16]
Lloh2:
	adrp	x8, _radeon_no_wb@GOTPAGE
Lloh3:
	ldr	x8, [x8, _radeon_no_wb@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	cmp	w8, #1
	b.eq	LBB0_4
; %bb.2:
	ldr	w8, [x19]
Lloh5:
	adrp	x9, _RADEON_IS_AGP@GOTPAGE
Lloh6:
	ldr	x9, [x9, _RADEON_IS_AGP@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_4
; %bb.3:
	ldr	x8, [x19, #8]
Lloh8:
	adrp	x9, _CHIP_R300@GOTPAGE
Lloh9:
	ldr	x9, [x9, _CHIP_R300@GOTPAGEOFF]
Lloh10:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_13
LBB0_4:
	str	wzr, [x19, #20]
Lloh11:
	adrp	x2, l_.str.5@PAGE
Lloh12:
	add	x2, x2, l_.str.5@PAGEOFF
LBB0_5:
	ldr	x8, [x19, #8]
Lloh13:
	adrp	x9, _CHIP_PALM@GOTPAGE
Lloh14:
	ldr	x9, [x9, _CHIP_PALM@GOTPAGEOFF]
Lloh15:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_7
; %bb.6:
	movi.2s	v0, #1
	str	d0, [x19, #16]
Lloh16:
	adrp	x2, l_.str.4@PAGE
Lloh17:
	add	x2, x2, l_.str.4@PAGEOFF
LBB0_7:
	ldr	w0, [x19, #48]
Lloh18:
	adrp	x1, l_.str.3@PAGE
Lloh19:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_dev_info
	mov	w20, #0
	b	LBB0_20
LBB0_8:
	ldr	w1, [x21]
Lloh20:
	adrp	x8, _PAGE_SIZE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PAGE_SIZE@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
Lloh23:
	adrp	x22, _RADEON_GEM_DOMAIN_GTT@GOTPAGE
Lloh24:
	ldr	x22, [x22, _RADEON_GEM_DOMAIN_GTT@GOTPAGEOFF]
	ldr	w4, [x22]
	str	x23, [sp]
	mov	x0, x19
	mov	w3, #1
	mov	w5, #0
	mov	x6, #0
	mov	x7, #0
	bl	_radeon_bo_create
	cbz	w0, LBB0_10
; %bb.9:
	mov	x20, x0
	ldr	w0, [x19, #48]
Lloh25:
	adrp	x1, l_.str@PAGE
Lloh26:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x20
	bl	_dev_warn
	b	LBB0_20
LBB0_10:
	ldr	x0, [x23]
	mov	w1, #0
	bl	_radeon_bo_reserve
	mov	x20, x0
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbnz	x0, LBB0_19
; %bb.11:
	ldr	x0, [x19, #32]
	ldr	w1, [x22]
	add	x2, x19, #40
	bl	_radeon_bo_pin
	mov	x20, x0
	ldr	x0, [x19, #32]
	cbz	w20, LBB0_16
; %bb.12:
	bl	_radeon_bo_unreserve
	ldr	w0, [x19, #48]
Lloh27:
	adrp	x1, l_.str.1@PAGE
Lloh28:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_18
LBB0_13:
	mov	w9, #1
	str	w9, [x19, #20]
Lloh29:
	adrp	x10, _CHIP_R600@GOTPAGE
Lloh30:
	ldr	x10, [x10, _CHIP_R600@GOTPAGEOFF]
Lloh31:
	ldr	x10, [x10]
	cmp	x8, x10
	b.lt	LBB0_15
; %bb.14:
	str	w9, [x19, #16]
LBB0_15:
Lloh32:
	adrp	x2, l_.str.4@PAGE
Lloh33:
	add	x2, x2, l_.str.4@PAGEOFF
	b	LBB0_5
LBB0_16:
	add	x1, x19, #24
	bl	_radeon_bo_kmap
	mov	x20, x0
	ldr	x0, [x19, #32]
	bl	_radeon_bo_unreserve
	cbz	w20, LBB0_1
; %bb.17:
	ldr	w0, [x19, #48]
Lloh34:
	adrp	x1, l_.str.2@PAGE
Lloh35:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_18:
	mov	x2, x20
	bl	_dev_warn
LBB0_19:
	mov	x0, x19
	bl	_radeon_wb_fini
LBB0_20:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh25, Lloh26
	.loh AdrpAdd	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpAdd	Lloh34, Lloh35
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ; @RADEON_GPU_PAGE_SIZE
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_RADEON_GEM_DOMAIN_GTT,4,2      ; @RADEON_GEM_DOMAIN_GTT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"(%d) create WB bo failed\n"

l_.str.1:                               ; @.str.1
	.asciz	"(%d) pin WB bo failed\n"

l_.str.2:                               ; @.str.2
	.asciz	"(%d) map WB bo failed\n"

	.comm	_radeon_no_wb,4,2               ; @radeon_no_wb
	.comm	_RADEON_IS_AGP,4,2              ; @RADEON_IS_AGP
	.comm	_CHIP_R300,8,3                  ; @CHIP_R300
	.comm	_CHIP_R600,8,3                  ; @CHIP_R600
	.comm	_CHIP_PALM,8,3                  ; @CHIP_PALM
l_.str.3:                               ; @.str.3
	.asciz	"WB %sabled\n"

l_.str.4:                               ; @.str.4
	.asciz	"en"

l_.str.5:                               ; @.str.5
	.asciz	"dis"

.subsections_via_symbols
