	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rv6xx_enable_dynamic_pcie_gen2
_rv6xx_enable_dynamic_pcie_gen2:        ## @rv6xx_enable_dynamic_pcie_gen2
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ebx
	movq	%rdi, %r15
	movq	%rsi, %rdi
	callq	_rv6xx_get_ps
	testl	%ebx, %ebx
	je	LBB0_2
## %bb.1:
	movl	$1, %r14d
	movq	%r15, %rdi
	movl	$1, %esi
	callq	_rv6xx_enable_bif_dynamic_pcie_gen2
	movq	%r15, %rdi
	callq	_rv6xx_enable_pcie_gen2_support
	jmp	LBB0_5
LBB0_2:
	movq	_ATOM_PPLIB_R600_FLAGS_PCIEGEN2@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rax)
	jne	LBB0_4
## %bb.3:
	movq	%r15, %rdi
	callq	_rv6xx_force_pcie_gen1
LBB0_4:
	xorl	%r14d, %r14d
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_rv6xx_enable_bif_dynamic_pcie_gen2
LBB0_5:
	movq	%r15, %rdi
	movl	%r14d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_r600_enable_dynamic_pcie_gen2  ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ATOM_PPLIB_R600_FLAGS_PCIEGEN2,4,2 ## @ATOM_PPLIB_R600_FLAGS_PCIEGEN2
	.no_dead_strip	_rv6xx_enable_dynamic_pcie_gen2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rv6xx_enable_dynamic_pcie_gen2
_rv6xx_enable_dynamic_pcie_gen2:        ; @rv6xx_enable_dynamic_pcie_gen2
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x2
	mov	x19, x0
	mov	x0, x1
	bl	_rv6xx_get_ps
	cbz	w20, LBB0_2
; %bb.1:
	mov	w20, #1
	mov	x0, x19
	mov	w1, #1
	bl	_rv6xx_enable_bif_dynamic_pcie_gen2
	mov	x0, x19
	bl	_rv6xx_enable_pcie_gen2_support
	b	LBB0_5
LBB0_2:
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _ATOM_PPLIB_R600_FLAGS_PCIEGEN2@GOTPAGE
Lloh1:
	ldr	x9, [x9, _ATOM_PPLIB_R600_FLAGS_PCIEGEN2@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_4
; %bb.3:
	mov	x0, x19
	bl	_rv6xx_force_pcie_gen1
LBB0_4:
	mov	x0, x19
	mov	w1, #0
	bl	_rv6xx_enable_bif_dynamic_pcie_gen2
	mov	w20, #0
LBB0_5:
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_r600_enable_dynamic_pcie_gen2
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_ATOM_PPLIB_R600_FLAGS_PCIEGEN2,4,2 ; @ATOM_PPLIB_R600_FLAGS_PCIEGEN2
	.no_dead_strip	_rv6xx_enable_dynamic_pcie_gen2
.subsections_via_symbols
