	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv730_populate_smc_initial_state ## -- Begin function rv730_populate_smc_initial_state
	.p2align	4, 0x90
_rv730_populate_smc_initial_state:      ## @rv730_populate_smc_initial_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r13
	movq	%rdi, %r12
	movq	%rsi, %rdi
	callq	_rv770_get_ps
	movq	%rax, %r14
	movq	%r12, %rdi
	callq	_rv770_get_pi
	movq	%rax, %r15
	movl	16(%rax), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 144(%rcx)
	movl	20(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 136(%rcx)
	movl	24(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 128(%rcx)
	movl	28(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 120(%rcx)
	movl	32(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 112(%rcx)
	movl	36(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 104(%rcx)
	movl	40(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 96(%rcx)
	movl	(%r14), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 88(%rcx)
	movl	44(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 80(%rcx)
	movl	48(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 72(%rcx)
	movl	52(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 64(%rcx)
	movl	56(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 56(%rcx)
	movl	60(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 48(%rcx)
	movl	4(%r14), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 40(%rcx)
	movq	_MC_CG_ARB_FREQ_F0@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 36(%rcx)
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_rv770_get_seq_value
	movq	8(%r13), %rdx
	movl	%eax, 32(%rdx)
	movl	12(%r14), %esi
	addq	$28, %rdx
	movq	%r12, %rdi
	callq	_rv770_populate_vddc_value
	movq	8(%r13), %rsi
	addq	$24, %rsi
	movq	%r12, %rdi
	callq	_rv770_populate_initial_mvdd_value
	movl	$65535, %edi                    ## imm = 0xFFFF
	callq	_CG_R
	movl	%eax, %ebx
	xorl	%edi, %edi
	callq	_CG_L
	orl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rcx
	movq	%rax, 16(%rcx)
	movl	(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r13), %rsi
	movq	%rax, 8(%rsi)
	xorl	%eax, %eax
	cmpq	$0, 8(%r15)
	setne	%al
	movl	%eax, (%rsi)
	movq	_ATOM_PPLIB_R600_FLAGS_PCIEGEN2@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	andl	8(%r14), %eax
	setne	%cl
	movl	%ecx, 4(%rsi)
	leaq	152(%rsi), %rdi
	movl	$152, %edx
	callq	_memcpy
	movq	8(%r13), %rsi
	leaq	304(%rsi), %rdi
	movl	$152, %edx
	callq	_memcpy
	movq	_PPSMC_SWSTATE_FLAG_DC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r13)
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MC_CG_ARB_FREQ_F0,4,2          ## @MC_CG_ARB_FREQ_F0
	.comm	_ATOM_PPLIB_R600_FLAGS_PCIEGEN2,4,2 ## @ATOM_PPLIB_R600_FLAGS_PCIEGEN2
	.comm	_PPSMC_SWSTATE_FLAG_DC,4,2      ## @PPSMC_SWSTATE_FLAG_DC
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv730_populate_smc_initial_state ; -- Begin function rv730_populate_smc_initial_state
	.p2align	2
_rv730_populate_smc_initial_state:      ; @rv730_populate_smc_initial_state
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x22, x0
	mov	x0, x1
	bl	_rv770_get_ps
	mov	x20, x0
	mov	x0, x22
	bl	_rv770_get_pi
	mov	x21, x0
	ldr	w0, [x0, #16]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #144]
	ldr	w0, [x21, #20]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #136]
	ldr	w0, [x21, #24]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #128]
	ldr	w0, [x21, #28]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #120]
	ldr	w0, [x21, #32]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #112]
	ldr	w0, [x21, #36]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #104]
	ldr	w0, [x21, #40]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #96]
	ldr	w0, [x20]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #88]
	ldr	w0, [x21, #44]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #80]
	ldr	w0, [x21, #48]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #72]
	ldr	w0, [x21, #52]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #64]
	ldr	w0, [x21, #56]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #56]
	ldr	w0, [x21, #60]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #48]
	ldr	w0, [x20, #4]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #40]
Lloh0:
	adrp	x9, _MC_CG_ARB_FREQ_F0@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MC_CG_ARB_FREQ_F0@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	str	w9, [x8, #36]
	mov	x0, x22
	mov	x1, x20
	bl	_rv770_get_seq_value
	ldr	x8, [x19, #8]
	str	w0, [x8, #32]
	ldr	w1, [x20, #12]
	add	x2, x8, #28
	mov	x0, x22
	bl	_rv770_populate_vddc_value
	ldr	x8, [x19, #8]
	add	x1, x8, #24
	mov	x0, x22
	bl	_rv770_populate_initial_mvdd_value
	mov	w0, #65535
	bl	_CG_R
	mov	x22, x0
	mov	w0, #0
	bl	_CG_L
	orr	w0, w0, w22
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #16]
	ldr	w0, [x21]
	bl	_cpu_to_be32
	ldr	x8, [x19, #8]
	str	x0, [x8, #8]
	ldr	x9, [x21, #8]
	cmp	x9, #0
	cset	w9, ne
	str	w9, [x8]
Lloh3:
	adrp	x9, _ATOM_PPLIB_R600_FLAGS_PCIEGEN2@GOTPAGE
Lloh4:
	ldr	x9, [x9, _ATOM_PPLIB_R600_FLAGS_PCIEGEN2@GOTPAGEOFF]
	ldr	w10, [x20, #8]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w10
	cset	w9, ne
	str	w9, [x8, #4]
	ldp	q0, q1, [x8, #96]
	stur	q0, [x8, #248]
	ldp	q2, q0, [x8]
	stur	q0, [x8, #168]
	ldp	q3, q0, [x8, #64]
	stur	q0, [x8, #232]
	stur	q3, [x8, #216]
	ldp	q3, q0, [x8, #32]
	stur	q0, [x8, #200]
	add	x9, x8, #152
	stur	q3, [x8, #184]
	ldr	x10, [x8, #144]
	str	x10, [x9, #144]
	ldr	q0, [x8, #128]
	stp	q1, q0, [x9, #112]
	stur	q2, [x8, #152]
	ldr	x8, [x19, #8]
	ldp	q0, q1, [x8]
	stp	q0, q1, [x8, #304]
	ldp	q1, q0, [x8, #64]
	stp	q1, q0, [x8, #368]
	ldp	q1, q0, [x8, #32]
	stp	q1, q0, [x8, #336]
	ldr	x9, [x8, #144]
	str	x9, [x8, #448]
	ldr	q0, [x8, #128]
	str	q0, [x8, #432]
	ldp	q1, q0, [x8, #96]
Lloh6:
	adrp	x9, _PPSMC_SWSTATE_FLAG_DC@GOTPAGE
Lloh7:
	ldr	x9, [x9, _PPSMC_SWSTATE_FLAG_DC@GOTPAGEOFF]
	stp	q1, q0, [x8, #400]
Lloh8:
	ldr	w8, [x9]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MC_CG_ARB_FREQ_F0,4,2          ; @MC_CG_ARB_FREQ_F0
	.comm	_ATOM_PPLIB_R600_FLAGS_PCIEGEN2,4,2 ; @ATOM_PPLIB_R600_FLAGS_PCIEGEN2
	.comm	_PPSMC_SWSTATE_FLAG_DC,4,2      ; @PPSMC_SWSTATE_FLAG_DC
.subsections_via_symbols
