	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gmc_v7_0_mc_init
_gmc_v7_0_mc_init:                      ## @gmc_v7_0_mc_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_amdgpu_atombios_get_vram_width
	leaq	8(%rbx), %r14
	movl	%eax, 8(%rbx)
	testl	%eax, %eax
	jne	LBB0_4
## %bb.1:
	movq	_mmMC_ARB_RAMCFG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	_MC_ARB_RAMCFG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_CHANSIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	callq	_REG_GET_FIELD
	xorl	%r15d, %r15d
	testl	%eax, %eax
	setne	%r15b
	shll	$5, %r15d
	addl	$32, %r15d
	movq	_mmMC_SHARED_CHMAP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	_MC_SHARED_CHMAP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_NOOFCHAN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	callq	_REG_GET_FIELD
	decl	%eax
	movl	$1, %ecx
	cmpl	$7, %eax
	ja	LBB0_3
## %bb.2:
	cltq
	leaq	l_switch.table.gmc_v7_0_mc_init(%rip), %rcx
	movl	(%rcx,%rax,4), %ecx
LBB0_3:
	imull	%r15d, %ecx
	movl	%ecx, (%r14)
LBB0_4:
	movq	_mmCONFIG_MEMSIZE@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32
	shlq	$20, %rax
	movq	%rax, 16(%rbx)
	movl	(%r15), %edi
	callq	_RREG32
	shlq	$20, %rax
	movq	%rax, 24(%rbx)
	movq	_AMD_IS_APU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_5
LBB0_6:
	movl	64(%rbx), %edi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	_pci_resource_start
	movl	%eax, 32(%rbx)
	movl	64(%rbx), %edi
	xorl	%esi, %esi
	callq	_pci_resource_len
	movq	%rax, 40(%rbx)
	movq	24(%rbx), %rcx
	cmpq	%rcx, %rax
	cmovbq	%rax, %rcx
	movq	%rcx, 48(%rbx)
	movq	_amdgpu_gart_size@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, %ecx
	shll	$20, %ecx
	cmpl	$-1, %eax
	movl	$268435456, %eax                ## imm = 0x10000000
	cmovnel	%ecx, %eax
	cltq
	movq	%rax, 56(%rbx)
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_gmc_v7_0_vram_gtt_location
	jmp	LBB0_7
LBB0_5:
	movq	%rbx, %rdi
	callq	_amdgpu_device_resize_fb_bar
	movl	%eax, %r15d
	testl	%eax, %eax
	je	LBB0_6
LBB0_7:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_mmMC_ARB_RAMCFG,4,2            ## @mmMC_ARB_RAMCFG
	.comm	_MC_ARB_RAMCFG,4,2              ## @MC_ARB_RAMCFG
	.comm	_CHANSIZE,4,2                   ## @CHANSIZE
	.comm	_mmMC_SHARED_CHMAP,4,2          ## @mmMC_SHARED_CHMAP
	.comm	_MC_SHARED_CHMAP,4,2            ## @MC_SHARED_CHMAP
	.comm	_NOOFCHAN,4,2                   ## @NOOFCHAN
	.comm	_mmCONFIG_MEMSIZE,4,2           ## @mmCONFIG_MEMSIZE
	.comm	_AMD_IS_APU,4,2                 ## @AMD_IS_APU
	.comm	_amdgpu_gart_size,4,2           ## @amdgpu_gart_size
	.comm	_mmMC_VM_FB_OFFSET,4,2          ## @mmMC_VM_FB_OFFSET
	.no_dead_strip	_gmc_v7_0_mc_init
	.section	__TEXT,__const
	.p2align	2                               ## @switch.table.gmc_v7_0_mc_init
l_switch.table.gmc_v7_0_mc_init:
	.long	2                               ## 0x2
	.long	4                               ## 0x4
	.long	8                               ## 0x8
	.long	3                               ## 0x3
	.long	6                               ## 0x6
	.long	10                              ## 0xa
	.long	12                              ## 0xc
	.long	16                              ## 0x10

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gmc_v7_0_mc_init
_gmc_v7_0_mc_init:                      ; @gmc_v7_0_mc_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_amdgpu_atombios_get_vram_width
	mov	x20, x19
	str	w0, [x20, #8]!
	cbnz	w0, LBB0_5
; %bb.1:
Lloh0:
	adrp	x8, _mmMC_ARB_RAMCFG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _mmMC_ARB_RAMCFG@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_RREG32
Lloh3:
	adrp	x8, _MC_ARB_RAMCFG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MC_ARB_RAMCFG@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
Lloh6:
	adrp	x8, _CHANSIZE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _CHANSIZE@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	bl	_REG_GET_FIELD
	mov	w8, #64
	mov	w9, #32
	cmp	w0, #0
	csel	w21, w9, w8, eq
Lloh9:
	adrp	x8, _mmMC_SHARED_CHMAP@GOTPAGE
Lloh10:
	ldr	x8, [x8, _mmMC_SHARED_CHMAP@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	_RREG32
Lloh12:
	adrp	x8, _MC_SHARED_CHMAP@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MC_SHARED_CHMAP@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
Lloh15:
	adrp	x8, _NOOFCHAN@GOTPAGE
Lloh16:
	ldr	x8, [x8, _NOOFCHAN@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	bl	_REG_GET_FIELD
	sub	w8, w0, #1
	cmp	w8, #7
	b.hi	LBB0_3
; %bb.2:
Lloh18:
	adrp	x9, l_switch.table.gmc_v7_0_mc_init@PAGE
Lloh19:
	add	x9, x9, l_switch.table.gmc_v7_0_mc_init@PAGEOFF
	ldr	w8, [x9, w8, sxtw #2]
	b	LBB0_4
LBB0_3:
	mov	w8, #1
LBB0_4:
	mul	w8, w8, w21
	str	w8, [x20]
LBB0_5:
Lloh20:
	adrp	x21, _mmCONFIG_MEMSIZE@GOTPAGE
Lloh21:
	ldr	x21, [x21, _mmCONFIG_MEMSIZE@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_RREG32
	lsl	x8, x0, #20
	str	x8, [x19, #16]
	ldr	w0, [x21]
	bl	_RREG32
	lsl	x8, x0, #20
	str	x8, [x19, #24]
	ldr	w8, [x19]
Lloh22:
	adrp	x9, _AMD_IS_APU@GOTPAGE
Lloh23:
	ldr	x9, [x9, _AMD_IS_APU@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_7
LBB0_6:
	ldr	w0, [x19, #64]
	mov	w1, #0
	bl	_pci_resource_start
	str	w0, [x19, #32]
	ldr	w0, [x19, #64]
	mov	w1, #0
	bl	_pci_resource_len
	ldr	x8, [x19, #24]
	cmp	x0, x8
	csel	x8, x0, x8, lo
	stp	x0, x8, [x19, #40]
Lloh25:
	adrp	x8, _amdgpu_gart_size@GOTPAGE
Lloh26:
	ldr	x8, [x8, _amdgpu_gart_size@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	lsl	w9, w8, #20
	cmn	w8, #1
	mov	w8, #268435456
	csel	w8, w8, w9, eq
	sxtw	x8, w8
	str	x8, [x19, #56]
	mov	x0, x19
	mov	x1, x20
	bl	_gmc_v7_0_vram_gtt_location
	mov	w0, #0
	b	LBB0_8
LBB0_7:
	mov	x0, x19
	bl	_amdgpu_device_resize_fb_bar
	cbz	w0, LBB0_6
LBB0_8:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.cfi_endproc
                                        ; -- End function
	.comm	_mmMC_ARB_RAMCFG,4,2            ; @mmMC_ARB_RAMCFG
	.comm	_MC_ARB_RAMCFG,4,2              ; @MC_ARB_RAMCFG
	.comm	_CHANSIZE,4,2                   ; @CHANSIZE
	.comm	_mmMC_SHARED_CHMAP,4,2          ; @mmMC_SHARED_CHMAP
	.comm	_MC_SHARED_CHMAP,4,2            ; @MC_SHARED_CHMAP
	.comm	_NOOFCHAN,4,2                   ; @NOOFCHAN
	.comm	_mmCONFIG_MEMSIZE,4,2           ; @mmCONFIG_MEMSIZE
	.comm	_AMD_IS_APU,4,2                 ; @AMD_IS_APU
	.comm	_amdgpu_gart_size,4,2           ; @amdgpu_gart_size
	.comm	_mmMC_VM_FB_OFFSET,4,2          ; @mmMC_VM_FB_OFFSET
	.no_dead_strip	_gmc_v7_0_mc_init
	.section	__TEXT,__const
	.p2align	2                               ; @switch.table.gmc_v7_0_mc_init
l_switch.table.gmc_v7_0_mc_init:
	.long	2                               ; 0x2
	.long	4                               ; 0x4
	.long	8                               ; 0x8
	.long	3                               ; 0x3
	.long	6                               ; 0x6
	.long	10                              ; 0xa
	.long	12                              ; 0xc
	.long	16                              ; 0x10

.subsections_via_symbols
