	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_ddi_pre_pll_enable
_intel_ddi_pre_pll_enable:              ## @intel_ddi_pre_pll_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %r15
	leaq	4(%rdi), %rbx
	movl	4(%rdi), %edi
	callq	_to_i915
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_enc_to_dig_port
	movq	%rax, %rbx
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_intel_port_to_phy
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_intel_phy_is_tc
	movl	%eax, %r13d
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	movl	4(%r12), %esi
	movq	%rbx, %rdi
	callq	_intel_tc_port_get_link
	movq	%r12, %rdi
	callq	_intel_crtc_has_dp_encoder
	jmp	LBB0_3
LBB0_2:
	movq	%r12, %rdi
	callq	_intel_crtc_has_dp_encoder
	testq	%rax, %rax
	je	LBB0_5
LBB0_3:
	movq	%rbx, %rdi
	callq	_intel_ddi_main_link_aux_domain
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_intel_display_power_get
	testl	%r13d, %r13d
	je	LBB0_5
## %bb.4:
	movq	(%rbx), %rax
	movq	_TC_PORT_TBT_ALT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_7
LBB0_5:
	movq	%r14, %rdi
	callq	_IS_GEN9_LP
	testq	%rax, %rax
	je	LBB0_6
## %bb.8:
	movl	(%r12), %esi
	movq	%r15, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_bxt_ddi_phy_set_lane_optim_mask ## TAILCALL
LBB0_7:
	movl	4(%r12), %esi
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_tc_port_set_fia_lane_count ## TAILCALL
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TC_PORT_TBT_ALT,8,3            ## @TC_PORT_TBT_ALT
	.no_dead_strip	_intel_ddi_pre_pll_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_ddi_pre_pll_enable
_intel_ddi_pre_pll_enable:              ; @intel_ddi_pre_pll_enable
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
	mov	x22, x0
	ldr	w0, [x22, #4]!
	bl	_to_i915
	mov	x21, x0
	mov	x0, x22
	bl	_enc_to_dig_port
	mov	x22, x0
	ldr	w1, [x20]
	mov	x0, x21
	bl	_intel_port_to_phy
	mov	x1, x0
	mov	x0, x21
	bl	_intel_phy_is_tc
	mov	x23, x0
	cbz	w0, LBB0_2
; %bb.1:
	ldr	w1, [x19, #4]
	mov	x0, x22
	bl	_intel_tc_port_get_link
	mov	x0, x19
	bl	_intel_crtc_has_dp_encoder
	b	LBB0_3
LBB0_2:
	mov	x0, x19
	bl	_intel_crtc_has_dp_encoder
	cbz	x0, LBB0_5
LBB0_3:
	mov	x0, x22
	bl	_intel_ddi_main_link_aux_domain
	mov	x1, x0
	mov	x0, x21
	bl	_intel_display_power_get
	cbz	w23, LBB0_5
; %bb.4:
	ldr	x8, [x22]
Lloh0:
	adrp	x9, _TC_PORT_TBT_ALT@GOTPAGE
Lloh1:
	ldr	x9, [x9, _TC_PORT_TBT_ALT@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_7
LBB0_5:
	mov	x0, x21
	bl	_IS_GEN9_LP
	cbz	x0, LBB0_8
; %bb.6:
	ldr	w1, [x19]
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_bxt_ddi_phy_set_lane_optim_mask
LBB0_7:
	ldr	w1, [x19, #4]
	mov	x0, x22
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_intel_tc_port_set_fia_lane_count
LBB0_8:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_TC_PORT_TBT_ALT,8,3            ; @TC_PORT_TBT_ALT
	.no_dead_strip	_intel_ddi_pre_pll_enable
.subsections_via_symbols
