	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_device_set_pg_state
_amdgpu_device_set_pg_state:            ## @amdgpu_device_set_pg_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_amdgpu_emu_mode@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	cmpl	$1, (%rcx)
	je	LBB0_12
## %bb.1:
	movq	%rdi, %r12
	movl	(%rdi), %r15d
	testl	%r15d, %r15d
	jle	LBB0_12
## %bb.2:
	xorl	%ebx, %ebx
	movl	$-1, %r13d
	movq	_AMD_PG_STATE_GATE@GOTPCREL(%rip), %r8
	movq	_AMD_IP_BLOCK_TYPE_UVD@GOTPCREL(%rip), %r9
	movq	_AMD_IP_BLOCK_TYPE_VCE@GOTPCREL(%rip), %r10
	movq	_AMD_IP_BLOCK_TYPE_VCN@GOTPCREL(%rip), %r11
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_10:                                ##   in Loop: Header=BB0_3 Depth=1
	incl	%ebx
	decl	%r13d
	cmpl	%ebx, %r15d
	jle	LBB0_11
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	cmpl	%esi, (%r8)
	leal	(%r15,%r13), %edx
	cmovel	%ebx, %edx
	movq	8(%r12), %rcx
	movslq	%edx, %r14
	shlq	$4, %r14
	cmpl	$0, 8(%rcx,%r14)
	je	LBB0_10
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	(%rcx,%r14), %rcx
	movq	(%rcx), %rdx
	cmpq	(%r9), %rdx
	je	LBB0_10
## %bb.5:                               ##   in Loop: Header=BB0_3 Depth=1
	cmpq	(%r10), %rdx
	je	LBB0_10
## %bb.6:                               ##   in Loop: Header=BB0_3 Depth=1
	cmpq	(%r11), %rdx
	je	LBB0_10
## %bb.7:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	8(%rcx), %rcx
	movq	(%rcx), %rcx
	testq	%rcx, %rcx
	je	LBB0_10
## %bb.8:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	%r12, %rdi
	callq	*%rcx
	testl	%eax, %eax
	jne	LBB0_13
## %bb.9:                               ##   in Loop: Header=BB0_3 Depth=1
	movl	(%r12), %r15d
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movq	_AMD_PG_STATE_GATE@GOTPCREL(%rip), %r8
	movq	_AMD_IP_BLOCK_TYPE_UVD@GOTPCREL(%rip), %r9
	movq	_AMD_IP_BLOCK_TYPE_VCE@GOTPCREL(%rip), %r10
	movq	_AMD_IP_BLOCK_TYPE_VCN@GOTPCREL(%rip), %r11
	jmp	LBB0_10
LBB0_11:
	xorl	%eax, %eax
LBB0_12:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_13:
	movq	8(%r12), %rcx
	movq	(%rcx,%r14), %rcx
	movq	8(%rcx), %rcx
	movl	8(%rcx), %esi
	leaq	L_.str(%rip), %rdi
	movl	%eax, %ebx
	movl	%eax, %edx
	callq	_DRM_ERROR
	movl	%ebx, %eax
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.comm	_amdgpu_emu_mode,4,2            ## @amdgpu_emu_mode
	.comm	_AMD_PG_STATE_GATE,4,2          ## @AMD_PG_STATE_GATE
	.comm	_AMD_IP_BLOCK_TYPE_UVD,8,3      ## @AMD_IP_BLOCK_TYPE_UVD
	.comm	_AMD_IP_BLOCK_TYPE_VCE,8,3      ## @AMD_IP_BLOCK_TYPE_VCE
	.comm	_AMD_IP_BLOCK_TYPE_VCN,8,3      ## @AMD_IP_BLOCK_TYPE_VCN
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"set_powergating_state(gate) of IP block <%s> failed %d\n"

	.no_dead_strip	_amdgpu_device_set_pg_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_device_set_pg_state
_amdgpu_device_set_pg_state:            ; @amdgpu_device_set_pg_state
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
Lloh0:
	adrp	x8, _amdgpu_emu_mode@GOTPAGE
Lloh1:
	ldr	x8, [x8, _amdgpu_emu_mode@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, #1
	b.eq	LBB0_9
; %bb.1:
	mov	x19, x0
	ldr	w8, [x0]
	cmp	w8, #1
	b.lt	LBB0_9
; %bb.2:
	mov	x20, x1
	mov	w22, #0
	mov	w23, #-1
Lloh3:
	adrp	x24, _AMD_PG_STATE_GATE@GOTPAGE
Lloh4:
	ldr	x24, [x24, _AMD_PG_STATE_GATE@GOTPAGEOFF]
Lloh5:
	adrp	x25, _AMD_IP_BLOCK_TYPE_UVD@GOTPAGE
Lloh6:
	ldr	x25, [x25, _AMD_IP_BLOCK_TYPE_UVD@GOTPAGEOFF]
Lloh7:
	adrp	x26, _AMD_IP_BLOCK_TYPE_VCE@GOTPAGE
Lloh8:
	ldr	x26, [x26, _AMD_IP_BLOCK_TYPE_VCE@GOTPAGEOFF]
Lloh9:
	adrp	x27, _AMD_IP_BLOCK_TYPE_VCN@GOTPAGE
Lloh10:
	ldr	x27, [x27, _AMD_IP_BLOCK_TYPE_VCN@GOTPAGEOFF]
	b	LBB0_4
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	w22, w22, #1
	sub	w23, w23, #1
	cmp	w8, w22
	b.le	LBB0_9
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w9, [x24]
	add	w10, w8, w23
	cmp	w9, w20
	csel	w10, w22, w10, eq
	ldr	x9, [x19, #8]
	add	x11, x9, w10, sxtw #4
	ldr	w11, [x11, #8]
	cbz	w11, LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	sxtw	x10, w10
	lsl	x28, x10, #4
	ldr	x9, [x9, x28]
	ldr	x10, [x9]
	ldr	x11, [x25]
	ldr	x12, [x26]
	ldr	x13, [x27]
	cmp	x10, x11
	ccmp	x10, x12, #4, ne
	ccmp	x10, x13, #4, ne
	b.eq	LBB0_3
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	x9, [x9, #8]
	ldr	x9, [x9]
	cbz	x9, LBB0_3
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x19
	mov	x1, x20
	blr	x9
	cbnz	w0, LBB0_11
; %bb.8:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w8, [x19]
	b	LBB0_3
LBB0_9:
	mov	w21, #0
LBB0_10:
	mov	x0, x21
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_11:
	mov	x21, x0
	ldr	x8, [x19, #8]
	ldr	x8, [x8, x28]
	ldr	x8, [x8, #8]
	ldr	w1, [x8, #8]
Lloh11:
	adrp	x0, l_.str@PAGE
Lloh12:
	add	x0, x0, l_.str@PAGEOFF
	mov	x2, x21
	bl	_DRM_ERROR
	b	LBB0_10
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpAdd	Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_amdgpu_emu_mode,4,2            ; @amdgpu_emu_mode
	.comm	_AMD_PG_STATE_GATE,4,2          ; @AMD_PG_STATE_GATE
	.comm	_AMD_IP_BLOCK_TYPE_UVD,8,3      ; @AMD_IP_BLOCK_TYPE_UVD
	.comm	_AMD_IP_BLOCK_TYPE_VCE,8,3      ; @AMD_IP_BLOCK_TYPE_VCE
	.comm	_AMD_IP_BLOCK_TYPE_VCN,8,3      ; @AMD_IP_BLOCK_TYPE_VCN
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"set_powergating_state(gate) of IP block <%s> failed %d\n"

	.no_dead_strip	_amdgpu_device_set_pg_state
.subsections_via_symbols
