	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_vgpu_register_reg
_intel_vgpu_register_reg:               ## @intel_vgpu_register_reg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, -44(%rbp)                 ## 4-byte Spill
	movq	%r8, %r15
	movq	%rcx, %r12
	movl	%edx, %r13d
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movq	8(%rdi), %rdi
	movl	(%rbx), %eax
	leal	(%rax,%rax,4), %eax
	leal	40(,%rax,8), %esi
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_krealloc
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	16(%rbp), %rcx
	movq	%rax, 8(%rbx)
	movslq	(%rbx), %rdx
	leaq	(%rdx,%rdx,4), %rsi
	movl	%r14d, (%rax,%rsi,8)
	movl	%r13d, 4(%rax,%rsi,8)
	movq	%r12, 32(%rax,%rsi,8)
	movq	%r15, 8(%rax,%rsi,8)
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	movl	%edi, 24(%rax,%rsi,8)
	movq	%rcx, 16(%rax,%rsi,8)
	leal	1(%rdx), %eax
	movl	%eax, (%rbx)
	xorl	%eax, %eax
	jmp	LBB0_3
LBB0_1:
	movq	_ENOMEM@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.no_dead_strip	_intel_vgpu_register_reg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_vgpu_register_reg
_intel_vgpu_register_reg:               ; @intel_vgpu_register_reg
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x6
	mov	x20, x5
	mov	x21, x4
	mov	x23, x3
	mov	x24, x2
	mov	x25, x1
	mov	x22, x0
	ldr	x0, [x0, #8]
	ldr	w8, [x22]
	mov	w9, #40
	mul	w8, w8, w9
	add	w1, w8, #40
Lloh0:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	bl	_krealloc
	cbz	x0, LBB0_2
; %bb.1:
	mov	x8, x0
	mov	w0, #0
	str	x8, [x22, #8]
	ldrsw	x9, [x22]
	mov	w10, #40
	madd	x8, x9, x10, x8
	stp	w25, w24, [x8]
	str	x23, [x8, #32]
	str	w20, [x8, #24]
	stp	x21, x19, [x8, #8]
	add	w8, w9, #1
	str	w8, [x22]
	b	LBB0_3
LBB0_2:
Lloh3:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_3:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.no_dead_strip	_intel_vgpu_register_reg
.subsections_via_symbols
