	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nbio_v7_0_update_medium_grain_clock_gating
_nbio_v7_0_update_medium_grain_clock_gating: ## @nbio_v7_0_update_medium_grain_clock_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movq	_smnNBIF_MGCG_CTRL_LCLK@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32_PCIE
	testl	%r14d, %r14d
	je	LBB0_3
## %bb.1:
	movq	_AMD_CG_SUPPORT_BIF_MGCG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rbx)
	je	LBB0_3
## %bb.2:
	movq	_NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	%eax, %esi
	cmpl	%esi, %eax
	jne	LBB0_5
	jmp	LBB0_6
LBB0_3:
	movq	_NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	cmpl	%esi, %eax
	je	LBB0_6
LBB0_5:
	movl	(%r15), %edi
	callq	_WREG32_PCIE
LBB0_6:
	movq	_ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SOCCLK@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_nbio_7_0_read_syshub_ind_mmr
	testl	%r14d, %r14d
	je	LBB0_9
## %bb.7:
	movq	_AMD_CG_SUPPORT_BIF_MGCG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rbx)
	je	LBB0_9
## %bb.8:
	movq	_SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SOCCLK__SYSHUB_MGCG_EN_SOCCLK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	%eax, %edx
	cmpl	%edx, %eax
	jne	LBB0_11
	jmp	LBB0_12
LBB0_9:
	movq	_SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SOCCLK__SYSHUB_MGCG_EN_SOCCLK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	cmpl	%edx, %eax
	je	LBB0_12
LBB0_11:
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_nbio_7_0_write_syshub_ind_mmr
LBB0_12:
	movq	_ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SHUBCLK@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_nbio_7_0_read_syshub_ind_mmr
	testl	%r14d, %r14d
	je	LBB0_15
## %bb.13:
	movq	_AMD_CG_SUPPORT_BIF_MGCG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rbx)
	je	LBB0_15
## %bb.14:
	movq	_SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SHUBCLK__SYSHUB_MGCG_EN_SHUBCLK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	%eax, %edx
	cmpl	%edx, %eax
	je	LBB0_17
LBB0_18:
	movl	(%r15), %esi
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_nbio_7_0_write_syshub_ind_mmr  ## TAILCALL
LBB0_15:
	movq	_SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SHUBCLK__SYSHUB_MGCG_EN_SHUBCLK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	cmpl	%edx, %eax
	jne	LBB0_18
LBB0_17:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_smnNBIF_MGCG_CTRL_LCLK,4,2     ## @smnNBIF_MGCG_CTRL_LCLK
	.comm	_AMD_CG_SUPPORT_BIF_MGCG,4,2    ## @AMD_CG_SUPPORT_BIF_MGCG
	.comm	_NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK,4,2 ## @NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK
	.comm	_ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SOCCLK,4,2 ## @ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SOCCLK
	.comm	_SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SOCCLK__SYSHUB_MGCG_EN_SOCCLK_MASK,4,2 ## @SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SOCCLK__SYSHUB_MGCG_EN_SOCCLK_MASK
	.comm	_ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SHUBCLK,4,2 ## @ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SHUBCLK
	.comm	_SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SHUBCLK__SYSHUB_MGCG_EN_SHUBCLK_MASK,4,2 ## @SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SHUBCLK__SYSHUB_MGCG_EN_SHUBCLK_MASK
	.no_dead_strip	_nbio_v7_0_update_medium_grain_clock_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nbio_v7_0_update_medium_grain_clock_gating
_nbio_v7_0_update_medium_grain_clock_gating: ; @nbio_v7_0_update_medium_grain_clock_gating
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x22, _smnNBIF_MGCG_CTRL_LCLK@GOTPAGE
Lloh1:
	ldr	x22, [x22, _smnNBIF_MGCG_CTRL_LCLK@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_RREG32_PCIE
Lloh2:
	adrp	x21, _AMD_CG_SUPPORT_BIF_MGCG@GOTPAGE
Lloh3:
	ldr	x21, [x21, _AMD_CG_SUPPORT_BIF_MGCG@GOTPAGEOFF]
	cbz	w20, LBB0_3
; %bb.1:
	ldr	w8, [x19]
	ldr	w9, [x21]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.2:
Lloh4:
	adrp	x8, _NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK@GOTPAGE
Lloh5:
	ldr	x8, [x8, _NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	orr	w1, w8, w0
	cmp	w0, w1
	b.ne	LBB0_4
	b	LBB0_5
LBB0_3:
Lloh7:
	adrp	x8, _NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK@GOTPAGE
Lloh8:
	ldr	x8, [x8, _NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	bic	w1, w0, w8
	cmp	w0, w1
	b.eq	LBB0_5
LBB0_4:
	ldr	w0, [x22]
	bl	_WREG32_PCIE
LBB0_5:
Lloh10:
	adrp	x22, _ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SOCCLK@GOTPAGE
Lloh11:
	ldr	x22, [x22, _ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SOCCLK@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nbio_7_0_read_syshub_ind_mmr
	cbz	w20, LBB0_8
; %bb.6:
	ldr	w8, [x19]
	ldr	w9, [x21]
	tst	w9, w8
	b.eq	LBB0_8
; %bb.7:
Lloh12:
	adrp	x8, _SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SOCCLK__SYSHUB_MGCG_EN_SOCCLK_MASK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SOCCLK__SYSHUB_MGCG_EN_SOCCLK_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	orr	w2, w8, w0
	cmp	w0, w2
	b.ne	LBB0_9
	b	LBB0_10
LBB0_8:
Lloh15:
	adrp	x8, _SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SOCCLK__SYSHUB_MGCG_EN_SOCCLK_MASK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SOCCLK__SYSHUB_MGCG_EN_SOCCLK_MASK@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	bic	w2, w0, w8
	cmp	w0, w2
	b.eq	LBB0_10
LBB0_9:
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nbio_7_0_write_syshub_ind_mmr
LBB0_10:
Lloh18:
	adrp	x22, _ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SHUBCLK@GOTPAGE
Lloh19:
	ldr	x22, [x22, _ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SHUBCLK@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_nbio_7_0_read_syshub_ind_mmr
	cbz	w20, LBB0_14
; %bb.11:
	ldr	w8, [x19]
	ldr	w9, [x21]
	tst	w9, w8
	b.eq	LBB0_14
; %bb.12:
Lloh20:
	adrp	x8, _SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SHUBCLK__SYSHUB_MGCG_EN_SHUBCLK_MASK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SHUBCLK__SYSHUB_MGCG_EN_SHUBCLK_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	orr	w2, w8, w0
	cmp	w0, w2
	b.eq	LBB0_15
LBB0_13:
	ldr	w1, [x22]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_nbio_7_0_write_syshub_ind_mmr
LBB0_14:
Lloh23:
	adrp	x8, _SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SHUBCLK__SYSHUB_MGCG_EN_SHUBCLK_MASK@GOTPAGE
Lloh24:
	ldr	x8, [x8, _SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SHUBCLK__SYSHUB_MGCG_EN_SHUBCLK_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	bic	w2, w0, w8
	cmp	w0, w2
	b.ne	LBB0_13
LBB0_15:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_smnNBIF_MGCG_CTRL_LCLK,4,2     ; @smnNBIF_MGCG_CTRL_LCLK
	.comm	_AMD_CG_SUPPORT_BIF_MGCG,4,2    ; @AMD_CG_SUPPORT_BIF_MGCG
	.comm	_NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK,4,2 ; @NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK
	.comm	_ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SOCCLK,4,2 ; @ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SOCCLK
	.comm	_SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SOCCLK__SYSHUB_MGCG_EN_SOCCLK_MASK,4,2 ; @SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SOCCLK__SYSHUB_MGCG_EN_SOCCLK_MASK
	.comm	_ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SHUBCLK,4,2 ; @ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SHUBCLK
	.comm	_SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SHUBCLK__SYSHUB_MGCG_EN_SHUBCLK_MASK,4,2 ; @SYSHUB_MMREG_DIRECT_SYSHUB_MGCG_CTRL_SHUBCLK__SYSHUB_MGCG_EN_SHUBCLK_MASK
	.no_dead_strip	_nbio_v7_0_update_medium_grain_clock_gating
.subsections_via_symbols
