	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cik_sdma_ring_emit_pipeline_sync
_cik_sdma_ring_emit_pipeline_sync:      ## @cik_sdma_ring_emit_pipeline_sync
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movl	(%rdi), %r14d
	movl	4(%rdi), %r15d
	movq	_SDMA_OPCODE_POLL_REG_MEM@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	xorl	%edi, %edi
	callq	_SDMA_POLL_REG_MEM_EXTRA_OP
	movl	%eax, %ebx
	movl	$3, %edi
	callq	_SDMA_POLL_REG_MEM_EXTRA_FUNC
	orl	%eax, %ebx
	movq	_SDMA_POLL_REG_MEM_EXTRA_M@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	%r12d, %edi
	xorl	%esi, %esi
	movl	%ebx, %edx
	callq	_SDMA_PACKET
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	%r15d, %esi
	andl	$-4, %esi
	movq	%r13, %rdi
	callq	_amdgpu_ring_write
	movl	%r15d, %edi
	callq	_upper_32_bits
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	movl	$-1, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	movl	$268369924, %esi                ## imm = 0xFFF0004
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SDMA_OPCODE_POLL_REG_MEM,4,2   ## @SDMA_OPCODE_POLL_REG_MEM
	.comm	_SDMA_POLL_REG_MEM_EXTRA_M,4,2  ## @SDMA_POLL_REG_MEM_EXTRA_M
	.no_dead_strip	_cik_sdma_ring_emit_pipeline_sync
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cik_sdma_ring_emit_pipeline_sync
_cik_sdma_ring_emit_pipeline_sync:      ; @cik_sdma_ring_emit_pipeline_sync
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldp	w20, w21, [x0]
Lloh0:
	adrp	x8, _SDMA_OPCODE_POLL_REG_MEM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SDMA_OPCODE_POLL_REG_MEM@GOTPAGEOFF]
Lloh2:
	ldr	w22, [x8]
	mov	w0, #0
	bl	_SDMA_POLL_REG_MEM_EXTRA_OP
	mov	x23, x0
	mov	w0, #3
	bl	_SDMA_POLL_REG_MEM_EXTRA_FUNC
	orr	w8, w0, w23
Lloh3:
	adrp	x9, _SDMA_POLL_REG_MEM_EXTRA_M@GOTPAGE
Lloh4:
	ldr	x9, [x9, _SDMA_POLL_REG_MEM_EXTRA_M@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x22
	mov	w1, #0
	bl	_SDMA_PACKET
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	and	w1, w21, #0xfffffffc
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x21
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #-1
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #4
	movk	w1, #4095, lsl #16
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SDMA_OPCODE_POLL_REG_MEM,4,2   ; @SDMA_OPCODE_POLL_REG_MEM
	.comm	_SDMA_POLL_REG_MEM_EXTRA_M,4,2  ; @SDMA_POLL_REG_MEM_EXTRA_M
	.no_dead_strip	_cik_sdma_ring_emit_pipeline_sync
.subsections_via_symbols
