	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hdmi_phy_8x60_powerdown
_hdmi_phy_8x60_powerdown:               ## @hdmi_phy_8x60_powerdown
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_REG_HDMI_PHY_CTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_HDMI_PHY_CTRL_SW_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_hdmi_phy_write
	movl	$10, %edi
	callq	_udelay
	movl	(%r14), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_hdmi_phy_write
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_4@GOTPCREL(%rip), %rcx
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_3@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	orl	(%rcx), %edx
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_2@GOTPCREL(%rip), %r12
	orl	(%r12), %edx
	movq	_REG_HDMI_8x60_PHY_REG2@GOTPCREL(%rip), %r15
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_1@GOTPCREL(%rip), %r13
	orl	(%r13), %edx
	movl	(%r15), %esi
	movq	_HDMI_8x60_PHY_REG2_PD_DESER@GOTPCREL(%rip), %r14
	orl	(%r14), %edx
	movq	%rbx, %rdi
	callq	_hdmi_phy_write
	movl	$10, %edi
	callq	_udelay
	movq	_REG_HDMI_8x60_PHY_REG3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_hdmi_phy_write
	movl	(%r15), %esi
	movq	_HDMI_8x60_PHY_REG2_RCV_SENSE_EN@GOTPCREL(%rip), %rax
	movq	_HDMI_8x60_PHY_REG2_PD_PWRGEN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_HDMI_8x60_PHY_REG2_PD_PLL@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_4@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_3@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	orl	(%r12), %edx
	orl	(%r13), %edx
	orl	(%r14), %edx
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_hdmi_phy_write                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_HDMI_PHY_CTRL,4,2          ## @REG_HDMI_PHY_CTRL
	.comm	_HDMI_PHY_CTRL_SW_RESET,4,2     ## @HDMI_PHY_CTRL_SW_RESET
	.comm	_REG_HDMI_8x60_PHY_REG2,4,2     ## @REG_HDMI_8x60_PHY_REG2
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_4,4,2 ## @HDMI_8x60_PHY_REG2_PD_DRIVE_4
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_3,4,2 ## @HDMI_8x60_PHY_REG2_PD_DRIVE_3
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_2,4,2 ## @HDMI_8x60_PHY_REG2_PD_DRIVE_2
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_1,4,2 ## @HDMI_8x60_PHY_REG2_PD_DRIVE_1
	.comm	_HDMI_8x60_PHY_REG2_PD_DESER,4,2 ## @HDMI_8x60_PHY_REG2_PD_DESER
	.comm	_REG_HDMI_8x60_PHY_REG3,4,2     ## @REG_HDMI_8x60_PHY_REG3
	.comm	_HDMI_8x60_PHY_REG2_RCV_SENSE_EN,4,2 ## @HDMI_8x60_PHY_REG2_RCV_SENSE_EN
	.comm	_HDMI_8x60_PHY_REG2_PD_PWRGEN,4,2 ## @HDMI_8x60_PHY_REG2_PD_PWRGEN
	.comm	_HDMI_8x60_PHY_REG2_PD_PLL,4,2  ## @HDMI_8x60_PHY_REG2_PD_PLL
	.no_dead_strip	_hdmi_phy_8x60_powerdown
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hdmi_phy_8x60_powerdown
_hdmi_phy_8x60_powerdown:               ; @hdmi_phy_8x60_powerdown
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x20, _REG_HDMI_PHY_CTRL@GOTPAGE
Lloh1:
	ldr	x20, [x20, _REG_HDMI_PHY_CTRL@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x8, _HDMI_PHY_CTRL_SW_RESET@GOTPAGE
Lloh3:
	ldr	x8, [x8, _HDMI_PHY_CTRL_SW_RESET@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	bl	_hdmi_phy_write
	mov	w0, #10
	bl	_udelay
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #0
	bl	_hdmi_phy_write
Lloh5:
	adrp	x20, _REG_HDMI_8x60_PHY_REG2@GOTPAGE
Lloh6:
	ldr	x20, [x20, _REG_HDMI_8x60_PHY_REG2@GOTPAGEOFF]
Lloh7:
	adrp	x21, _HDMI_8x60_PHY_REG2_PD_DRIVE_4@GOTPAGE
Lloh8:
	ldr	x21, [x21, _HDMI_8x60_PHY_REG2_PD_DRIVE_4@GOTPAGEOFF]
	ldr	w1, [x20]
	ldr	w8, [x21]
Lloh9:
	adrp	x22, _HDMI_8x60_PHY_REG2_PD_DRIVE_3@GOTPAGE
Lloh10:
	ldr	x22, [x22, _HDMI_8x60_PHY_REG2_PD_DRIVE_3@GOTPAGEOFF]
	ldr	w9, [x22]
	orr	w8, w9, w8
Lloh11:
	adrp	x23, _HDMI_8x60_PHY_REG2_PD_DRIVE_2@GOTPAGE
Lloh12:
	ldr	x23, [x23, _HDMI_8x60_PHY_REG2_PD_DRIVE_2@GOTPAGEOFF]
	ldr	w9, [x23]
	orr	w8, w8, w9
Lloh13:
	adrp	x24, _HDMI_8x60_PHY_REG2_PD_DRIVE_1@GOTPAGE
Lloh14:
	ldr	x24, [x24, _HDMI_8x60_PHY_REG2_PD_DRIVE_1@GOTPAGEOFF]
	ldr	w9, [x24]
	orr	w8, w8, w9
Lloh15:
	adrp	x25, _HDMI_8x60_PHY_REG2_PD_DESER@GOTPAGE
Lloh16:
	ldr	x25, [x25, _HDMI_8x60_PHY_REG2_PD_DESER@GOTPAGEOFF]
	ldr	w9, [x25]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_hdmi_phy_write
	mov	w0, #10
	bl	_udelay
Lloh17:
	adrp	x8, _REG_HDMI_8x60_PHY_REG3@GOTPAGE
Lloh18:
	ldr	x8, [x8, _REG_HDMI_8x60_PHY_REG3@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_hdmi_phy_write
	ldr	w1, [x20]
Lloh20:
	adrp	x8, _HDMI_8x60_PHY_REG2_RCV_SENSE_EN@GOTPAGE
Lloh21:
	ldr	x8, [x8, _HDMI_8x60_PHY_REG2_RCV_SENSE_EN@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
Lloh23:
	adrp	x9, _HDMI_8x60_PHY_REG2_PD_PWRGEN@GOTPAGE
Lloh24:
	ldr	x9, [x9, _HDMI_8x60_PHY_REG2_PD_PWRGEN@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh26:
	adrp	x9, _HDMI_8x60_PHY_REG2_PD_PLL@GOTPAGE
Lloh27:
	ldr	x9, [x9, _HDMI_8x60_PHY_REG2_PD_PLL@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [x21]
	orr	w8, w8, w9
	ldr	w9, [x22]
	orr	w8, w8, w9
	ldr	w9, [x23]
	orr	w8, w8, w9
	ldr	w9, [x24]
	orr	w8, w8, w9
	ldr	w9, [x25]
	orr	w2, w8, w9
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_hdmi_phy_write
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_HDMI_PHY_CTRL,4,2          ; @REG_HDMI_PHY_CTRL
	.comm	_HDMI_PHY_CTRL_SW_RESET,4,2     ; @HDMI_PHY_CTRL_SW_RESET
	.comm	_REG_HDMI_8x60_PHY_REG2,4,2     ; @REG_HDMI_8x60_PHY_REG2
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_4,4,2 ; @HDMI_8x60_PHY_REG2_PD_DRIVE_4
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_3,4,2 ; @HDMI_8x60_PHY_REG2_PD_DRIVE_3
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_2,4,2 ; @HDMI_8x60_PHY_REG2_PD_DRIVE_2
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_1,4,2 ; @HDMI_8x60_PHY_REG2_PD_DRIVE_1
	.comm	_HDMI_8x60_PHY_REG2_PD_DESER,4,2 ; @HDMI_8x60_PHY_REG2_PD_DESER
	.comm	_REG_HDMI_8x60_PHY_REG3,4,2     ; @REG_HDMI_8x60_PHY_REG3
	.comm	_HDMI_8x60_PHY_REG2_RCV_SENSE_EN,4,2 ; @HDMI_8x60_PHY_REG2_RCV_SENSE_EN
	.comm	_HDMI_8x60_PHY_REG2_PD_PWRGEN,4,2 ; @HDMI_8x60_PHY_REG2_PD_PWRGEN
	.comm	_HDMI_8x60_PHY_REG2_PD_PLL,4,2  ; @HDMI_8x60_PHY_REG2_PD_PLL
	.no_dead_strip	_hdmi_phy_8x60_powerdown
.subsections_via_symbols
