	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_core_link_enable_stream        ## -- Begin function core_link_enable_stream
	.p2align	4, 0x90
_core_link_enable_stream:               ## @core_link_enable_stream
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r14
	movq	(%rsi), %rbx
	movq	56(%rbx), %rax
	movq	8(%rax), %r12
	movl	(%rax), %edi
	callq	_DC_LOGGER_INIT
	movq	(%r15), %rax
	movq	(%rax), %rdi
	callq	_dc_is_virtual_signal
	testq	%rax, %rax
	jne	LBB0_2
## %bb.1:
	movq	16(%rbx), %rax
	movq	16(%rax), %rdi
	movq	(%rdi), %rax
	movq	(%r15), %rcx
	movq	(%rcx), %rsi
	callq	*(%rax)
	movq	8(%r15), %rax
	movq	16(%r15), %rdi
	movq	(%rdi), %rcx
	movl	8(%rax), %esi
	movq	24(%rbx), %rax
	movq	_TIMING_3D_FORMAT_NONE@GOTPCREL(%rip), %r8
	xorl	%edx, %edx
	cmpq	(%r8), %rax
	setne	%dl
	callq	*32(%rcx)
LBB0_2:
	movq	(%r15), %rax
	movq	(%rax), %rdi
	callq	_dc_is_dp_signal
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	16(%r15), %rdi
	movq	(%rdi), %rax
	leaq	24(%rbx), %rsi
	movl	52(%rbx), %edx
	movq	16(%rbx), %rcx
	movl	12(%rcx), %ecx
	callq	*24(%rax)
LBB0_4:
	movq	(%r15), %rax
	movq	(%rax), %rdi
	callq	_dc_is_hdmi_tmds_signal
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movq	16(%r15), %rdi
	movq	(%rdi), %rax
	leaq	24(%rbx), %rsi
	movl	48(%rbx), %edx
	xorl	%ecx, %ecx
	cmpq	$0, 24(%r15)
	setne	%cl
	callq	*16(%rax)
LBB0_6:
	movq	(%r15), %rax
	movq	16(%rax), %rcx
	movl	$1, (%rcx)
	movq	(%rax), %rdi
	callq	_dc_is_dvi_signal
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:
	movq	(%r15), %rax
	movq	16(%r15), %rdi
	movq	(%rdi), %rcx
	leaq	24(%rbx), %rsi
	movq	(%rax), %rax
	movq	_SIGNAL_TYPE_DVI_DUAL_LINK@GOTPCREL(%rip), %r8
	xorl	%edx, %edx
	cmpq	(%r8), %rax
	sete	%dl
	callq	*8(%rcx)
LBB0_8:
	movq	(%r15), %rax
	movq	(%rax), %rdi
	callq	_dc_is_lvds_signal
	testq	%rax, %rax
	je	LBB0_10
## %bb.9:
	movq	16(%r15), %rdi
	movq	(%rdi), %rax
	addq	$24, %rbx
	movq	%rbx, %rsi
	callq	*(%rax)
LBB0_10:
	movq	32(%r12), %rax
	movl	(%rax), %edi
	callq	_IS_FPGA_MAXIMUS_DC
	testl	%eax, %eax
	jne	LBB0_17
## %bb.11:
	movq	(%r15), %rax
	movl	8(%rax), %ebx
	movl	$0, 8(%rax)
	movq	%r15, %rdi
	callq	_resource_build_info_frame
	movq	%r15, %rdi
	callq	*24(%r12)
	movq	(%r15), %rax
	cmpq	$0, 40(%rax)
	jne	LBB0_12
## %bb.13:
	movq	(%rax), %rcx
	movq	_SIGNAL_TYPE_EDP@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jne	LBB0_16
## %bb.14:
	testl	%ebx, %ebx
	je	LBB0_16
LBB0_12:
	movl	$0, 12(%rax)
LBB0_17:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_16:
	cmpl	$0, 12(%rax)
	jne	LBB0_17
## %bb.18:
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_enable_link
	movl	%eax, %ebx
	movq	_DC_OK@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ebx
	jne	LBB0_25
LBB0_19:
	movq	%r15, %rdi
	callq	*16(%r12)
	movq	8(%r15), %rdi
	movq	(%rdi), %rax
	movq	(%rax), %rax
	testq	%rax, %rax
	je	LBB0_21
## %bb.20:
	movq	_CONTROLLER_DP_TEST_PATTERN_VIDEOMODE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_COLOR_DEPTH_UNDEFINED@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	callq	*%rax
LBB0_21:
	movq	%r15, %rdi
	callq	*8(%r12)
	movq	(%r15), %rax
	movq	(%rax), %rcx
	movq	_SIGNAL_TYPE_DISPLAY_PORT_MST@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jne	LBB0_23
## %bb.22:
	movq	%r15, %rdi
	callq	_allocate_mst_payload
	movq	(%r15), %rax
LBB0_23:
	movq	16(%rax), %rsi
	addq	$4, %rsi
	movq	%r15, %rdi
	callq	*(%r12)
	movq	(%r15), %rax
	movq	(%rax), %rdi
	callq	_dc_is_dp_signal
	testq	%rax, %rax
	je	LBB0_17
## %bb.24:
	movq	%r15, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_enable_stream_features         ## TAILCALL
LBB0_25:
	movq	(%r15), %rax
	movq	16(%rax), %rax
	movl	8(%rax), %esi
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %edx
	callq	_DC_LOG_WARNING
	movq	_DC_FAIL_DP_LINK_TRAINING@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ebx
	jne	LBB0_27
## %bb.26:
	movq	(%r15), %rax
	movq	(%rax), %rax
	movq	_SIGNAL_TYPE_DISPLAY_PORT_MST@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_19
LBB0_27:
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_BREAK_TO_DEBUGGER              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_TIMING_3D_FORMAT_NONE,8,3      ## @TIMING_3D_FORMAT_NONE
	.comm	_SIGNAL_TYPE_DVI_DUAL_LINK,8,3  ## @SIGNAL_TYPE_DVI_DUAL_LINK
	.comm	_SIGNAL_TYPE_EDP,8,3            ## @SIGNAL_TYPE_EDP
	.comm	_DC_OK,4,2                      ## @DC_OK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"enabling link %u failed: %d\n"

	.comm	_DC_FAIL_DP_LINK_TRAINING,4,2   ## @DC_FAIL_DP_LINK_TRAINING
	.comm	_SIGNAL_TYPE_DISPLAY_PORT_MST,8,3 ## @SIGNAL_TYPE_DISPLAY_PORT_MST
	.comm	_CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,4,2 ## @CONTROLLER_DP_TEST_PATTERN_VIDEOMODE
	.comm	_COLOR_DEPTH_UNDEFINED,4,2      ## @COLOR_DEPTH_UNDEFINED
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_core_link_enable_stream        ; -- Begin function core_link_enable_stream
	.p2align	2
_core_link_enable_stream:               ; @core_link_enable_stream
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
	ldr	x22, [x1]
	ldr	x8, [x22, #56]
	ldr	x21, [x8, #8]
	ldr	w0, [x8]
	bl	_DC_LOGGER_INIT
	ldr	x8, [x19]
	ldr	x0, [x8]
	bl	_dc_is_virtual_signal
	cbnz	x0, LBB0_2
; %bb.1:
	ldr	x8, [x22, #16]
	ldr	x0, [x8, #16]
	ldr	x8, [x0]
	ldr	x8, [x8]
	ldr	x9, [x19]
	ldr	x1, [x9]
	blr	x8
	ldp	x8, x0, [x19, #8]
	ldr	x9, [x0]
	ldr	x9, [x9, #32]
	ldr	w1, [x8, #8]
	ldr	x8, [x22, #24]
Lloh0:
	adrp	x10, _TIMING_3D_FORMAT_NONE@GOTPAGE
Lloh1:
	ldr	x10, [x10, _TIMING_3D_FORMAT_NONE@GOTPAGEOFF]
Lloh2:
	ldr	x10, [x10]
	cmp	x8, x10
	cset	w2, ne
	blr	x9
LBB0_2:
	ldr	x8, [x19]
	ldr	x0, [x8]
	bl	_dc_is_dp_signal
	cbz	x0, LBB0_4
; %bb.3:
	ldr	x0, [x19, #16]
	ldr	x8, [x0]
	ldr	x8, [x8, #24]
	add	x1, x22, #24
	ldr	w2, [x22, #52]
	ldr	x9, [x22, #16]
	ldr	w3, [x9, #12]
	blr	x8
LBB0_4:
	ldr	x8, [x19]
	ldr	x0, [x8]
	bl	_dc_is_hdmi_tmds_signal
	cbz	x0, LBB0_6
; %bb.5:
	ldp	x0, x8, [x19, #16]
	ldr	x9, [x0]
	ldr	x9, [x9, #16]
	add	x1, x22, #24
	ldr	w2, [x22, #48]
	cmp	x8, #0
	cset	w3, ne
	blr	x9
LBB0_6:
	ldr	x8, [x19]
	ldr	x9, [x8, #16]
	mov	w10, #1
	str	w10, [x9]
	ldr	x0, [x8]
	bl	_dc_is_dvi_signal
	cbz	x0, LBB0_8
; %bb.7:
	ldr	x0, [x19, #16]
	ldr	x8, [x0]
	ldr	x8, [x8, #8]
	add	x1, x22, #24
	ldr	x9, [x19]
	ldr	x9, [x9]
Lloh3:
	adrp	x10, _SIGNAL_TYPE_DVI_DUAL_LINK@GOTPAGE
Lloh4:
	ldr	x10, [x10, _SIGNAL_TYPE_DVI_DUAL_LINK@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
	cmp	x9, x10
	cset	w2, eq
	blr	x8
LBB0_8:
	ldr	x8, [x19]
	ldr	x0, [x8]
	bl	_dc_is_lvds_signal
	cbz	x0, LBB0_10
; %bb.9:
	ldr	x0, [x19, #16]
	ldr	x8, [x0]
	ldr	x8, [x8]
	add	x1, x22, #24
	blr	x8
LBB0_10:
	ldr	x8, [x21, #32]
	ldr	w0, [x8]
	bl	_IS_FPGA_MAXIMUS_DC
	cbnz	w0, LBB0_15
; %bb.11:
	ldr	x8, [x19]
	ldr	w22, [x8, #8]
	str	wzr, [x8, #8]
	mov	x0, x19
	bl	_resource_build_info_frame
	ldr	x8, [x21, #24]
	mov	x0, x19
	blr	x8
	ldr	x8, [x19]
	ldr	x9, [x8, #40]
	cbnz	x9, LBB0_14
; %bb.12:
	ldr	x9, [x8]
Lloh6:
	adrp	x10, _SIGNAL_TYPE_EDP@GOTPAGE
Lloh7:
	ldr	x10, [x10, _SIGNAL_TYPE_EDP@GOTPAGEOFF]
Lloh8:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_16
; %bb.13:
	cbz	w22, LBB0_16
LBB0_14:
	str	wzr, [x8, #12]
LBB0_15:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_16:
	ldr	w8, [x8, #12]
	cbnz	w8, LBB0_15
; %bb.17:
	mov	x0, x20
	mov	x1, x19
	bl	_enable_link
Lloh9:
	adrp	x8, _DC_OK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DC_OK@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	cmp	w0, w8
	b.ne	LBB0_24
LBB0_18:
	ldr	x8, [x21, #16]
	mov	x0, x19
	blr	x8
	ldr	x0, [x19, #8]
	ldr	x8, [x0]
	ldr	x8, [x8]
	cbz	x8, LBB0_20
; %bb.19:
Lloh12:
	adrp	x9, _CONTROLLER_DP_TEST_PATTERN_VIDEOMODE@GOTPAGE
Lloh13:
	ldr	x9, [x9, _CONTROLLER_DP_TEST_PATTERN_VIDEOMODE@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x9]
Lloh15:
	adrp	x9, _COLOR_DEPTH_UNDEFINED@GOTPAGE
Lloh16:
	ldr	x9, [x9, _COLOR_DEPTH_UNDEFINED@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x9]
	blr	x8
LBB0_20:
	ldr	x8, [x21, #8]
	mov	x0, x19
	blr	x8
	ldr	x8, [x19]
	ldr	x9, [x8]
Lloh18:
	adrp	x10, _SIGNAL_TYPE_DISPLAY_PORT_MST@GOTPAGE
Lloh19:
	ldr	x10, [x10, _SIGNAL_TYPE_DISPLAY_PORT_MST@GOTPAGEOFF]
Lloh20:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_22
; %bb.21:
	mov	x0, x19
	bl	_allocate_mst_payload
	ldr	x8, [x19]
LBB0_22:
	ldr	x9, [x21]
	ldr	x8, [x8, #16]
	add	x1, x8, #4
	mov	x0, x19
	blr	x9
	ldr	x8, [x19]
	ldr	x0, [x8]
	bl	_dc_is_dp_signal
	cbz	x0, LBB0_15
; %bb.23:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_enable_stream_features
LBB0_24:
	mov	x20, x0
	ldr	x8, [x19]
	ldr	x8, [x8, #16]
	ldr	w1, [x8, #8]
Lloh21:
	adrp	x0, l_.str@PAGE
Lloh22:
	add	x0, x0, l_.str@PAGEOFF
	mov	x2, x20
	bl	_DC_LOG_WARNING
Lloh23:
	adrp	x8, _DC_FAIL_DP_LINK_TRAINING@GOTPAGE
Lloh24:
	ldr	x8, [x8, _DC_FAIL_DP_LINK_TRAINING@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	cmp	w20, w8
	b.ne	LBB0_26
; %bb.25:
	ldr	x8, [x19]
	ldr	x8, [x8]
Lloh26:
	adrp	x9, _SIGNAL_TYPE_DISPLAY_PORT_MST@GOTPAGE
Lloh27:
	ldr	x9, [x9, _SIGNAL_TYPE_DISPLAY_PORT_MST@GOTPAGEOFF]
Lloh28:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_18
LBB0_26:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_BREAK_TO_DEBUGGER
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.cfi_endproc
                                        ; -- End function
	.comm	_TIMING_3D_FORMAT_NONE,8,3      ; @TIMING_3D_FORMAT_NONE
	.comm	_SIGNAL_TYPE_DVI_DUAL_LINK,8,3  ; @SIGNAL_TYPE_DVI_DUAL_LINK
	.comm	_SIGNAL_TYPE_EDP,8,3            ; @SIGNAL_TYPE_EDP
	.comm	_DC_OK,4,2                      ; @DC_OK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"enabling link %u failed: %d\n"

	.comm	_DC_FAIL_DP_LINK_TRAINING,4,2   ; @DC_FAIL_DP_LINK_TRAINING
	.comm	_SIGNAL_TYPE_DISPLAY_PORT_MST,8,3 ; @SIGNAL_TYPE_DISPLAY_PORT_MST
	.comm	_CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,4,2 ; @CONTROLLER_DP_TEST_PATTERN_VIDEOMODE
	.comm	_COLOR_DEPTH_UNDEFINED,4,2      ; @COLOR_DEPTH_UNDEFINED
.subsections_via_symbols
