	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ad5755_setup_pdata
_ad5755_setup_pdata:                    ## @ad5755_setup_pdata
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %r14
	callq	_iio_priv
	movq	%rax, %r15
	movl	(%r12), %edx
	movq	_AD5755_DC_DC_PHASE_90_DEGREE@GOTPCREL(%rip), %rax
	cmpl	(%rax), %edx
	ja	LBB0_3
## %bb.1:
	movl	4(%r12), %eax
	movq	_AD5755_DC_DC_FREQ_650kHZ@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	ja	LBB0_3
## %bb.2:
	movl	8(%r12), %esi
	movq	_AD5755_DC_DC_MAXV_29V5@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %esi
	jbe	LBB0_4
LBB0_3:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_23:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	_AD5755_DC_DC_MAXV@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	movq	_AD5755_DC_DC_FREQ_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_AD5755_DC_DC_PHASE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%esi, %eax
	xorl	%ecx, %ecx
	cmpq	$0, 24(%r12)
	je	LBB0_6
## %bb.5:
	movq	_AD5755_EXT_DC_DC_COMP_RES@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_6:
	orl	%ecx, %edx
	orl	%edx, %eax
	movq	_AD5755_CTRL_REG_DC_DC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	%eax, %ecx
	callq	_ad5755_write_ctrl
	testl	%eax, %eax
	js	LBB0_23
## %bb.7:
	movq	16(%r12), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	je	LBB0_13
## %bb.8:
	movl	$32, %ebx
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	movq	16(%r12), %rdx
	movq	_AD5755_SLEW_STEP_SIZE_SHIFT@GOTPCREL(%rip), %rax
	movzbl	(%rax), %ecx
	movl	-8(%rdx,%rbx), %esi
	movl	-4(%rdx,%rbx), %eax
	shll	%cl, %esi
	movq	_AD5755_SLEW_RATE_SHIFT@GOTPCREL(%rip), %rcx
	movzbl	(%rcx), %ecx
	shll	%cl, %eax
	orl	%esi, %eax
	cmpq	$0, (%rdx,%rbx)
	movl	$0, %ecx
	je	LBB0_11
## %bb.10:                              ##   in Loop: Header=BB0_9 Depth=1
	movq	_AD5755_SLEW_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_11:                                ##   in Loop: Header=BB0_9 Depth=1
	orl	%ecx, %eax
	movq	_AD5755_CTRL_REG_SLEW@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	%eax, %ecx
	callq	_ad5755_write_ctrl
	testl	%eax, %eax
	js	LBB0_23
## %bb.12:                              ##   in Loop: Header=BB0_9 Depth=1
	incq	%r13
	movq	16(%r12), %rdi
	callq	_ARRAY_SIZE
	movl	%eax, %eax
	addq	$40, %rbx
	cmpq	%rax, %r13
	jb	LBB0_9
LBB0_13:
	movq	16(%r12), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	je	LBB0_14
## %bb.15:
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_17:                                ## =>This Inner Loop Header: Depth=1
	movq	16(%r12), %rax
	movl	(%rax,%rbx), %esi
	movq	%r15, %rdi
	callq	_ad5755_is_valid_mode
	testl	%eax, %eax
	je	LBB0_3
## %bb.18:                              ##   in Loop: Header=BB0_17 Depth=1
	movq	16(%r12), %rax
	xorl	%ecx, %ecx
	cmpl	$0, 16(%rax,%rbx)
	jne	LBB0_20
## %bb.19:                              ##   in Loop: Header=BB0_17 Depth=1
	movq	_AD5755_DAC_INT_CURRENT_SENSE_RESISTOR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_20:                                ##   in Loop: Header=BB0_17 Depth=1
	cmpq	$0, 8(%rax,%rbx)
	movl	$0, %edx
	je	LBB0_22
## %bb.21:                              ##   in Loop: Header=BB0_17 Depth=1
	movq	_AD5755_DAC_VOLTAGE_OVERRANGE_EN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
LBB0_22:                                ##   in Loop: Header=BB0_17 Depth=1
	orl	%ecx, %edx
	orl	(%rax,%rbx), %edx
	movq	%r14, %rdi
	movl	%r13d, %esi
	xorl	%ecx, %ecx
	callq	_ad5755_update_dac_ctrl
	testl	%eax, %eax
	js	LBB0_23
## %bb.16:                              ##   in Loop: Header=BB0_17 Depth=1
	incq	%r13
	movq	16(%r12), %rdi
	callq	_ARRAY_SIZE
	movl	%eax, %ecx
	addq	$40, %rbx
	xorl	%eax, %eax
	cmpq	%rcx, %r13
	jb	LBB0_17
	jmp	LBB0_23
LBB0_14:
	xorl	%eax, %eax
	jmp	LBB0_23
	.cfi_endproc
                                        ## -- End function
	.comm	_AD5755_DC_DC_PHASE_90_DEGREE,4,2 ## @AD5755_DC_DC_PHASE_90_DEGREE
	.comm	_AD5755_DC_DC_FREQ_650kHZ,4,2   ## @AD5755_DC_DC_FREQ_650kHZ
	.comm	_AD5755_DC_DC_MAXV_29V5,4,2     ## @AD5755_DC_DC_MAXV_29V5
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_AD5755_DC_DC_MAXV,4,2          ## @AD5755_DC_DC_MAXV
	.comm	_AD5755_DC_DC_FREQ_SHIFT,4,2    ## @AD5755_DC_DC_FREQ_SHIFT
	.comm	_AD5755_DC_DC_PHASE_SHIFT,4,2   ## @AD5755_DC_DC_PHASE_SHIFT
	.comm	_AD5755_EXT_DC_DC_COMP_RES,4,2  ## @AD5755_EXT_DC_DC_COMP_RES
	.comm	_AD5755_CTRL_REG_DC_DC,4,2      ## @AD5755_CTRL_REG_DC_DC
	.comm	_AD5755_SLEW_STEP_SIZE_SHIFT,4,2 ## @AD5755_SLEW_STEP_SIZE_SHIFT
	.comm	_AD5755_SLEW_RATE_SHIFT,4,2     ## @AD5755_SLEW_RATE_SHIFT
	.comm	_AD5755_SLEW_ENABLE,4,2         ## @AD5755_SLEW_ENABLE
	.comm	_AD5755_CTRL_REG_SLEW,4,2       ## @AD5755_CTRL_REG_SLEW
	.comm	_AD5755_DAC_INT_CURRENT_SENSE_RESISTOR,4,2 ## @AD5755_DAC_INT_CURRENT_SENSE_RESISTOR
	.comm	_AD5755_DAC_VOLTAGE_OVERRANGE_EN,4,2 ## @AD5755_DAC_VOLTAGE_OVERRANGE_EN
	.no_dead_strip	_ad5755_setup_pdata
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ad5755_setup_pdata
_ad5755_setup_pdata:                    ; @ad5755_setup_pdata
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x1
	mov	x20, x0
	bl	_iio_priv
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _AD5755_DC_DC_PHASE_90_DEGREE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AD5755_DC_DC_PHASE_90_DEGREE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	cmp	w8, w9
	b.hi	LBB0_3
; %bb.1:
	ldr	w9, [x19, #4]
Lloh3:
	adrp	x10, _AD5755_DC_DC_FREQ_650kHZ@GOTPAGE
Lloh4:
	ldr	x10, [x10, _AD5755_DC_DC_FREQ_650kHZ@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	cmp	w9, w10
	b.hi	LBB0_3
; %bb.2:
	ldr	w10, [x19, #8]
Lloh6:
	adrp	x11, _AD5755_DC_DC_MAXV_29V5@GOTPAGE
Lloh7:
	ldr	x11, [x11, _AD5755_DC_DC_MAXV_29V5@GOTPAGEOFF]
Lloh8:
	ldr	w11, [x11]
	cmp	w10, w11
	b.ls	LBB0_5
LBB0_3:
Lloh9:
	adrp	x8, _EINVAL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_4:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_5:
	mov	x21, x0
Lloh12:
	adrp	x11, _AD5755_DC_DC_MAXV@GOTPAGE
Lloh13:
	ldr	x11, [x11, _AD5755_DC_DC_MAXV@GOTPAGEOFF]
Lloh14:
	ldr	w11, [x11]
	lsl	w10, w10, w11
Lloh15:
	adrp	x11, _AD5755_DC_DC_FREQ_SHIFT@GOTPAGE
Lloh16:
	ldr	x11, [x11, _AD5755_DC_DC_FREQ_SHIFT@GOTPAGEOFF]
Lloh17:
	ldr	w11, [x11]
	lsl	w9, w9, w11
	orr	w9, w9, w10
Lloh18:
	adrp	x10, _AD5755_DC_DC_PHASE_SHIFT@GOTPAGE
Lloh19:
	ldr	x10, [x10, _AD5755_DC_DC_PHASE_SHIFT@GOTPAGEOFF]
Lloh20:
	ldr	w10, [x10]
	lsl	w8, w8, w10
	orr	w8, w9, w8
	ldr	x9, [x19, #24]
Lloh21:
	adrp	x10, _AD5755_EXT_DC_DC_COMP_RES@GOTPAGE
Lloh22:
	ldr	x10, [x10, _AD5755_EXT_DC_DC_COMP_RES@GOTPAGEOFF]
Lloh23:
	ldr	w10, [x10]
	cmp	x9, #0
	csel	w9, wzr, w10, eq
	orr	w3, w8, w9
Lloh24:
	adrp	x8, _AD5755_CTRL_REG_DC_DC@GOTPAGE
Lloh25:
	ldr	x8, [x8, _AD5755_CTRL_REG_DC_DC@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #0
	bl	_ad5755_write_ctrl
	tbnz	w0, #31, LBB0_4
; %bb.6:
	ldr	x0, [x19, #16]
	bl	_ARRAY_SIZE
	cbz	w0, LBB0_10
; %bb.7:
	mov	x23, #0
	mov	x22, #0
Lloh27:
	adrp	x24, _AD5755_SLEW_STEP_SIZE_SHIFT@GOTPAGE
Lloh28:
	ldr	x24, [x24, _AD5755_SLEW_STEP_SIZE_SHIFT@GOTPAGEOFF]
Lloh29:
	adrp	x25, _AD5755_SLEW_RATE_SHIFT@GOTPAGE
Lloh30:
	ldr	x25, [x25, _AD5755_SLEW_RATE_SHIFT@GOTPAGEOFF]
Lloh31:
	adrp	x26, _AD5755_SLEW_ENABLE@GOTPAGE
Lloh32:
	ldr	x26, [x26, _AD5755_SLEW_ENABLE@GOTPAGEOFF]
Lloh33:
	adrp	x27, _AD5755_CTRL_REG_SLEW@GOTPAGE
Lloh34:
	ldr	x27, [x27, _AD5755_CTRL_REG_SLEW@GOTPAGEOFF]
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #16]
	add	x8, x8, x23
	ldr	w9, [x24]
	ldp	w10, w11, [x8, #24]
	lsl	w9, w10, w9
	ldr	w10, [x25]
	lsl	w10, w11, w10
	orr	w9, w10, w9
	ldr	x8, [x8, #32]
	ldr	w10, [x26]
	cmp	x8, #0
	csel	w8, wzr, w10, eq
	orr	w3, w9, w8
	ldr	w2, [x27]
	mov	x0, x20
	mov	x1, x22
	bl	_ad5755_write_ctrl
	tbnz	w0, #31, LBB0_4
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=1
	add	x22, x22, #1
	ldr	x0, [x19, #16]
	bl	_ARRAY_SIZE
	add	x23, x23, #40
	cmp	x22, w0, uxtw
	b.lo	LBB0_8
LBB0_10:
	ldr	x0, [x19, #16]
	bl	_ARRAY_SIZE
	cbz	w0, LBB0_4
; %bb.11:
	mov	x23, #0
	mov	x22, #0
Lloh35:
	adrp	x24, _AD5755_DAC_INT_CURRENT_SENSE_RESISTOR@GOTPAGE
Lloh36:
	ldr	x24, [x24, _AD5755_DAC_INT_CURRENT_SENSE_RESISTOR@GOTPAGEOFF]
Lloh37:
	adrp	x25, _AD5755_DAC_VOLTAGE_OVERRANGE_EN@GOTPAGE
Lloh38:
	ldr	x25, [x25, _AD5755_DAC_VOLTAGE_OVERRANGE_EN@GOTPAGEOFF]
LBB0_12:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #16]
	ldr	w1, [x8, x23]
	mov	x0, x21
	bl	_ad5755_is_valid_mode
	cbz	w0, LBB0_3
; %bb.13:                               ;   in Loop: Header=BB0_12 Depth=1
	ldr	x8, [x19, #16]
	add	x8, x8, x23
	ldr	w9, [x8, #16]
	ldr	w10, [x24]
	cmp	w9, #0
	csel	w9, w10, wzr, eq
	ldr	x10, [x8, #8]
	ldr	w11, [x25]
	cmp	x10, #0
	csel	w10, wzr, w11, eq
	orr	w9, w10, w9
	ldr	w8, [x8]
	orr	w2, w9, w8
	mov	x0, x20
	mov	x1, x22
	mov	w3, #0
	bl	_ad5755_update_dac_ctrl
	tbnz	w0, #31, LBB0_4
; %bb.14:                               ;   in Loop: Header=BB0_12 Depth=1
	add	x22, x22, #1
	ldr	x0, [x19, #16]
	bl	_ARRAY_SIZE
	mov	x8, x0
	mov	w0, #0
	add	x23, x23, #40
	cmp	x22, w8, uxtw
	b.lo	LBB0_12
	b	LBB0_4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.cfi_endproc
                                        ; -- End function
	.comm	_AD5755_DC_DC_PHASE_90_DEGREE,4,2 ; @AD5755_DC_DC_PHASE_90_DEGREE
	.comm	_AD5755_DC_DC_FREQ_650kHZ,4,2   ; @AD5755_DC_DC_FREQ_650kHZ
	.comm	_AD5755_DC_DC_MAXV_29V5,4,2     ; @AD5755_DC_DC_MAXV_29V5
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_AD5755_DC_DC_MAXV,4,2          ; @AD5755_DC_DC_MAXV
	.comm	_AD5755_DC_DC_FREQ_SHIFT,4,2    ; @AD5755_DC_DC_FREQ_SHIFT
	.comm	_AD5755_DC_DC_PHASE_SHIFT,4,2   ; @AD5755_DC_DC_PHASE_SHIFT
	.comm	_AD5755_EXT_DC_DC_COMP_RES,4,2  ; @AD5755_EXT_DC_DC_COMP_RES
	.comm	_AD5755_CTRL_REG_DC_DC,4,2      ; @AD5755_CTRL_REG_DC_DC
	.comm	_AD5755_SLEW_STEP_SIZE_SHIFT,4,2 ; @AD5755_SLEW_STEP_SIZE_SHIFT
	.comm	_AD5755_SLEW_RATE_SHIFT,4,2     ; @AD5755_SLEW_RATE_SHIFT
	.comm	_AD5755_SLEW_ENABLE,4,2         ; @AD5755_SLEW_ENABLE
	.comm	_AD5755_CTRL_REG_SLEW,4,2       ; @AD5755_CTRL_REG_SLEW
	.comm	_AD5755_DAC_INT_CURRENT_SENSE_RESISTOR,4,2 ; @AD5755_DAC_INT_CURRENT_SENSE_RESISTOR
	.comm	_AD5755_DAC_VOLTAGE_OVERRANGE_EN,4,2 ; @AD5755_DAC_VOLTAGE_OVERRANGE_EN
	.no_dead_strip	_ad5755_setup_pdata
.subsections_via_symbols
