	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function a5xx_irq
_a5xx_irq:                              ## @a5xx_irq
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movq	_REG_A5XX_RBBM_INT_0_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_gpu_read
	movl	%eax, %ebx
	movq	_REG_A5XX_RBBM_INT_CLEAR_CMD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_A5XX_RBBM_INT_0_MASK_RBBM_AHB_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	%ebx, %edx
	movq	%r14, %rdi
	callq	_gpu_write
	movq	_RBBM_ERROR_MASK@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_2
## %bb.1:
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_a5xx_rbbm_err_irq
LBB0_2:
	movq	_A5XX_RBBM_INT_0_MASK_CP_HW_ERROR@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_4
## %bb.3:
	movq	%r14, %rdi
	callq	_a5xx_cp_err_irq
LBB0_4:
	movq	_A5XX_RBBM_INT_0_MASK_MISC_HANG_DETECT@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_6
## %bb.5:
	movq	%r14, %rdi
	callq	_a5xx_fault_detect_irq
LBB0_6:
	movq	_A5XX_RBBM_INT_0_MASK_UCHE_OOB_ACCESS@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_8
## %bb.7:
	movq	%r14, %rdi
	callq	_a5xx_uche_err_irq
LBB0_8:
	movq	_A5XX_RBBM_INT_0_MASK_GPMU_VOLTAGE_DROOP@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_10
## %bb.9:
	movq	%r14, %rdi
	callq	_a5xx_gpmu_err_irq
LBB0_10:
	movq	_A5XX_RBBM_INT_0_MASK_CP_CACHE_FLUSH_TS@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_12
## %bb.11:
	movq	%r14, %rdi
	callq	_a5xx_preempt_trigger
	movq	%r14, %rdi
	callq	_msm_gpu_retire
LBB0_12:
	movq	_A5XX_RBBM_INT_0_MASK_CP_SW@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_14
## %bb.13:
	movq	%r14, %rdi
	callq	_a5xx_preempt_irq
LBB0_14:
	movq	_IRQ_HANDLED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_A5XX_RBBM_INT_0_STATUS,4,2 ## @REG_A5XX_RBBM_INT_0_STATUS
	.comm	_REG_A5XX_RBBM_INT_CLEAR_CMD,4,2 ## @REG_A5XX_RBBM_INT_CLEAR_CMD
	.comm	_A5XX_RBBM_INT_0_MASK_RBBM_AHB_ERROR,4,2 ## @A5XX_RBBM_INT_0_MASK_RBBM_AHB_ERROR
	.comm	_RBBM_ERROR_MASK,4,2            ## @RBBM_ERROR_MASK
	.comm	_A5XX_RBBM_INT_0_MASK_CP_HW_ERROR,4,2 ## @A5XX_RBBM_INT_0_MASK_CP_HW_ERROR
	.comm	_A5XX_RBBM_INT_0_MASK_MISC_HANG_DETECT,4,2 ## @A5XX_RBBM_INT_0_MASK_MISC_HANG_DETECT
	.comm	_A5XX_RBBM_INT_0_MASK_UCHE_OOB_ACCESS,4,2 ## @A5XX_RBBM_INT_0_MASK_UCHE_OOB_ACCESS
	.comm	_A5XX_RBBM_INT_0_MASK_GPMU_VOLTAGE_DROOP,4,2 ## @A5XX_RBBM_INT_0_MASK_GPMU_VOLTAGE_DROOP
	.comm	_A5XX_RBBM_INT_0_MASK_CP_CACHE_FLUSH_TS,4,2 ## @A5XX_RBBM_INT_0_MASK_CP_CACHE_FLUSH_TS
	.comm	_A5XX_RBBM_INT_0_MASK_CP_SW,4,2 ## @A5XX_RBBM_INT_0_MASK_CP_SW
	.comm	_IRQ_HANDLED,4,2                ## @IRQ_HANDLED
	.no_dead_strip	_a5xx_irq
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function a5xx_irq
_a5xx_irq:                              ; @a5xx_irq
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _REG_A5XX_RBBM_INT_0_STATUS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _REG_A5XX_RBBM_INT_0_STATUS@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_gpu_read
	mov	x20, x0
Lloh3:
	adrp	x8, _REG_A5XX_RBBM_INT_CLEAR_CMD@GOTPAGE
Lloh4:
	ldr	x8, [x8, _REG_A5XX_RBBM_INT_CLEAR_CMD@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
Lloh6:
	adrp	x8, _A5XX_RBBM_INT_0_MASK_RBBM_AHB_ERROR@GOTPAGE
Lloh7:
	ldr	x8, [x8, _A5XX_RBBM_INT_0_MASK_RBBM_AHB_ERROR@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	bic	w2, w0, w8
	mov	x0, x19
	bl	_gpu_write
Lloh9:
	adrp	x8, _RBBM_ERROR_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RBBM_ERROR_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_2
; %bb.1:
	mov	x0, x19
	mov	x1, x20
	bl	_a5xx_rbbm_err_irq
LBB0_2:
Lloh12:
	adrp	x8, _A5XX_RBBM_INT_0_MASK_CP_HW_ERROR@GOTPAGE
Lloh13:
	ldr	x8, [x8, _A5XX_RBBM_INT_0_MASK_CP_HW_ERROR@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_4
; %bb.3:
	mov	x0, x19
	bl	_a5xx_cp_err_irq
LBB0_4:
Lloh15:
	adrp	x8, _A5XX_RBBM_INT_0_MASK_MISC_HANG_DETECT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _A5XX_RBBM_INT_0_MASK_MISC_HANG_DETECT@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_6
; %bb.5:
	mov	x0, x19
	bl	_a5xx_fault_detect_irq
LBB0_6:
Lloh18:
	adrp	x8, _A5XX_RBBM_INT_0_MASK_UCHE_OOB_ACCESS@GOTPAGE
Lloh19:
	ldr	x8, [x8, _A5XX_RBBM_INT_0_MASK_UCHE_OOB_ACCESS@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_8
; %bb.7:
	mov	x0, x19
	bl	_a5xx_uche_err_irq
LBB0_8:
Lloh21:
	adrp	x8, _A5XX_RBBM_INT_0_MASK_GPMU_VOLTAGE_DROOP@GOTPAGE
Lloh22:
	ldr	x8, [x8, _A5XX_RBBM_INT_0_MASK_GPMU_VOLTAGE_DROOP@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_10
; %bb.9:
	mov	x0, x19
	bl	_a5xx_gpmu_err_irq
LBB0_10:
Lloh24:
	adrp	x8, _A5XX_RBBM_INT_0_MASK_CP_CACHE_FLUSH_TS@GOTPAGE
Lloh25:
	ldr	x8, [x8, _A5XX_RBBM_INT_0_MASK_CP_CACHE_FLUSH_TS@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_12
; %bb.11:
	mov	x0, x19
	bl	_a5xx_preempt_trigger
	mov	x0, x19
	bl	_msm_gpu_retire
LBB0_12:
Lloh27:
	adrp	x8, _A5XX_RBBM_INT_0_MASK_CP_SW@GOTPAGE
Lloh28:
	ldr	x8, [x8, _A5XX_RBBM_INT_0_MASK_CP_SW@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_14
; %bb.13:
	mov	x0, x19
	bl	_a5xx_preempt_irq
LBB0_14:
Lloh30:
	adrp	x8, _IRQ_HANDLED@GOTPAGE
Lloh31:
	ldr	x8, [x8, _IRQ_HANDLED@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_A5XX_RBBM_INT_0_STATUS,4,2 ; @REG_A5XX_RBBM_INT_0_STATUS
	.comm	_REG_A5XX_RBBM_INT_CLEAR_CMD,4,2 ; @REG_A5XX_RBBM_INT_CLEAR_CMD
	.comm	_A5XX_RBBM_INT_0_MASK_RBBM_AHB_ERROR,4,2 ; @A5XX_RBBM_INT_0_MASK_RBBM_AHB_ERROR
	.comm	_RBBM_ERROR_MASK,4,2            ; @RBBM_ERROR_MASK
	.comm	_A5XX_RBBM_INT_0_MASK_CP_HW_ERROR,4,2 ; @A5XX_RBBM_INT_0_MASK_CP_HW_ERROR
	.comm	_A5XX_RBBM_INT_0_MASK_MISC_HANG_DETECT,4,2 ; @A5XX_RBBM_INT_0_MASK_MISC_HANG_DETECT
	.comm	_A5XX_RBBM_INT_0_MASK_UCHE_OOB_ACCESS,4,2 ; @A5XX_RBBM_INT_0_MASK_UCHE_OOB_ACCESS
	.comm	_A5XX_RBBM_INT_0_MASK_GPMU_VOLTAGE_DROOP,4,2 ; @A5XX_RBBM_INT_0_MASK_GPMU_VOLTAGE_DROOP
	.comm	_A5XX_RBBM_INT_0_MASK_CP_CACHE_FLUSH_TS,4,2 ; @A5XX_RBBM_INT_0_MASK_CP_CACHE_FLUSH_TS
	.comm	_A5XX_RBBM_INT_0_MASK_CP_SW,4,2 ; @A5XX_RBBM_INT_0_MASK_CP_SW
	.comm	_IRQ_HANDLED,4,2                ; @IRQ_HANDLED
	.no_dead_strip	_a5xx_irq
.subsections_via_symbols
