	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pwr_10_0_gfxip_control_over_cgpg
_pwr_10_0_gfxip_control_over_cgpg:      ## @pwr_10_0_gfxip_control_over_cgpg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	_PWR@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_mmPWR_MISC_CNTL_STATUS@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movl	%eax, %edi
	callq	_RREG32
	movl	%eax, %r14d
	movq	_PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	cmpl	$1, %r15d
	jne	LBB0_5
## %bb.1:
	orl	%r14d, %ebx
	cmpl	%ebx, %r14d
	je	LBB0_3
## %bb.2:
	movl	(%r12), %edi
	movl	(%r13), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_WREG32
LBB0_3:
	movq	_PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$2, %r15d
	shll	%cl, %r15d
	notl	%eax
	andl	%eax, %ebx
	orl	%ebx, %r15d
	cmpl	%r15d, %r14d
	je	LBB0_6
LBB0_4:
	movl	(%r12), %edi
	movl	(%r13), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movl	%eax, %edi
	movl	%r15d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
LBB0_5:
	notl	%ebx
	andl	%r14d, %ebx
	movl	%ebx, %r15d
	cmpl	%ebx, %r14d
	jne	LBB0_4
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PWR,4,2                        ## @PWR
	.comm	_mmPWR_MISC_CNTL_STATUS,4,2     ## @mmPWR_MISC_CNTL_STATUS
	.comm	_PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK,4,2 ## @PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK
	.comm	_PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS_MASK,4,2 ## @PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS_MASK
	.comm	_PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS__SHIFT,4,2 ## @PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS__SHIFT
	.no_dead_strip	_pwr_10_0_gfxip_control_over_cgpg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pwr_10_0_gfxip_control_over_cgpg
_pwr_10_0_gfxip_control_over_cgpg:      ; @pwr_10_0_gfxip_control_over_cgpg
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
Lloh0:
	adrp	x21, _PWR@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PWR@GOTPAGEOFF]
	ldr	w0, [x21]
Lloh2:
	adrp	x22, _mmPWR_MISC_CNTL_STATUS@GOTPAGE
Lloh3:
	ldr	x22, [x22, _mmPWR_MISC_CNTL_STATUS@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	bl	_RREG32
	mov	x19, x0
Lloh4:
	adrp	x8, _PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK@GOTPAGE
Lloh5:
	ldr	x8, [x8, _PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	cmp	w20, #1
	b.ne	LBB0_5
; %bb.1:
	orr	w20, w8, w19
	cmp	w19, w20
	b.eq	LBB0_3
; %bb.2:
	ldr	w0, [x21]
	ldr	w2, [x22]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	mov	x1, x20
	bl	_WREG32
LBB0_3:
Lloh7:
	adrp	x8, _PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS_MASK@GOTPAGE
Lloh8:
	ldr	x8, [x8, _PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
Lloh10:
	adrp	x9, _PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS__SHIFT@GOTPAGE
Lloh11:
	ldr	x9, [x9, _PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS__SHIFT@GOTPAGEOFF]
	bic	w8, w20, w8
Lloh12:
	ldr	w9, [x9]
	mov	w10, #2
	lsl	w9, w10, w9
	orr	w20, w9, w8
	cmp	w19, w20
	b.eq	LBB0_6
LBB0_4:
	ldr	w0, [x21]
	ldr	w2, [x22]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	mov	x1, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32
LBB0_5:
	bic	w20, w19, w8
	cmp	w19, w20
	b.ne	LBB0_4
LBB0_6:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_PWR,4,2                        ; @PWR
	.comm	_mmPWR_MISC_CNTL_STATUS,4,2     ; @mmPWR_MISC_CNTL_STATUS
	.comm	_PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK,4,2 ; @PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK
	.comm	_PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS_MASK,4,2 ; @PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS_MASK
	.comm	_PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS__SHIFT,4,2 ; @PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS__SHIFT
	.no_dead_strip	_pwr_10_0_gfxip_control_over_cgpg
.subsections_via_symbols
