	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v9_0_check_if_need_gfxoff
_gfx_v9_0_check_if_need_gfxoff:         ## @gfx_v9_0_check_if_need_gfxoff
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	(%rdi), %eax
	cmpl	$131, %eax
	je	LBB0_9
## %bb.1:
	cmpl	$132, %eax
	jne	LBB0_11
## %bb.2:
	cmpl	$7, 4(%rdi)
	jg	LBB0_9
## %bb.3:
	movq	32(%rdi), %rax
	cmpl	$5592, (%rax)                   ## imm = 0x15D8
	je	LBB0_9
## %bb.4:
	movl	16(%rdi), %edx
	cmpl	$106, %edx
	setne	%al
	cmpl	$531, %edx                      ## imm = 0x213
	setl	%cl
	cmpl	$53815, %edx                    ## imm = 0xD237
	je	LBB0_8
## %bb.5:
	andb	%cl, %al
	jne	LBB0_8
## %bb.6:
	cmpl	$0, 20(%rdi)
	jle	LBB0_8
## %bb.7:
	cmpl	$0, 24(%rdi)
	jne	LBB0_9
LBB0_8:
	movq	_PP_GFXOFF_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 12(%rdi)
LBB0_9:
	movq	_PP_GFXOFF_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 12(%rdi)
	je	LBB0_11
## %bb.10:
	movq	_AMD_PG_SUPPORT_GFX_PG@GOTPCREL(%rip), %rax
	movq	_AMD_PG_SUPPORT_CP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_AMD_PG_SUPPORT_RLC_SMU_HS@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	orl	%ecx, 8(%rdi)
LBB0_11:
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PP_GFXOFF_MASK,4,2             ## @PP_GFXOFF_MASK
	.comm	_AMD_PG_SUPPORT_GFX_PG,4,2      ## @AMD_PG_SUPPORT_GFX_PG
	.comm	_AMD_PG_SUPPORT_CP,4,2          ## @AMD_PG_SUPPORT_CP
	.comm	_AMD_PG_SUPPORT_RLC_SMU_HS,4,2  ## @AMD_PG_SUPPORT_RLC_SMU_HS
	.no_dead_strip	_gfx_v9_0_check_if_need_gfxoff
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v9_0_check_if_need_gfxoff
_gfx_v9_0_check_if_need_gfxoff:         ; @gfx_v9_0_check_if_need_gfxoff
	.cfi_startproc
; %bb.0:
	ldr	w8, [x0]
	cmp	w8, #131
	b.eq	LBB0_12
; %bb.1:
	cmp	w8, #132
	b.ne	LBB0_11
; %bb.2:
	ldr	w9, [x0, #4]
Lloh0:
	adrp	x8, _PP_GFXOFF_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PP_GFXOFF_MASK@GOTPAGEOFF]
	cmp	w9, #7
	b.gt	LBB0_9
; %bb.3:
	ldr	x9, [x0, #32]
	ldr	w9, [x9]
	mov	w10, #5592
	cmp	w9, w10
	b.eq	LBB0_9
; %bb.4:
	ldr	w10, [x0, #16]
	cmp	w10, #106
	mov	w9, #531
	ccmp	w10, w9, #0, ne
	cset	w9, lt
	mov	w11, #53815
	cmp	w10, w11
	b.eq	LBB0_8
; %bb.5:
	tbnz	w9, #0, LBB0_8
; %bb.6:
	ldr	w9, [x0, #20]
	cmp	w9, #1
	b.lt	LBB0_8
; %bb.7:
	ldr	w9, [x0, #24]
	cbnz	w9, LBB0_9
LBB0_8:
	ldr	w9, [x8]
	ldr	w10, [x0, #12]
	bic	w9, w10, w9
	str	w9, [x0, #12]
LBB0_9:
	ldr	w9, [x0, #12]
	ldr	w8, [x8]
	tst	w8, w9
	b.eq	LBB0_11
LBB0_10:
Lloh2:
	adrp	x8, _AMD_PG_SUPPORT_GFX_PG@GOTPAGE
Lloh3:
	ldr	x8, [x8, _AMD_PG_SUPPORT_GFX_PG@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _AMD_PG_SUPPORT_CP@GOTPAGE
Lloh6:
	ldr	x9, [x9, _AMD_PG_SUPPORT_CP@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
Lloh8:
	adrp	x10, _AMD_PG_SUPPORT_RLC_SMU_HS@GOTPAGE
Lloh9:
	ldr	x10, [x10, _AMD_PG_SUPPORT_RLC_SMU_HS@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh10:
	ldr	w9, [x10]
	orr	w8, w8, w9
	ldr	w9, [x0, #8]
	orr	w8, w8, w9
	str	w8, [x0, #8]
LBB0_11:
	ret
LBB0_12:
	ldr	w8, [x0, #12]
Lloh11:
	adrp	x9, _PP_GFXOFF_MASK@GOTPAGE
Lloh12:
	ldr	x9, [x9, _PP_GFXOFF_MASK@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_10
	b	LBB0_11
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_PP_GFXOFF_MASK,4,2             ; @PP_GFXOFF_MASK
	.comm	_AMD_PG_SUPPORT_GFX_PG,4,2      ; @AMD_PG_SUPPORT_GFX_PG
	.comm	_AMD_PG_SUPPORT_CP,4,2          ; @AMD_PG_SUPPORT_CP
	.comm	_AMD_PG_SUPPORT_RLC_SMU_HS,4,2  ; @AMD_PG_SUPPORT_RLC_SMU_HS
	.no_dead_strip	_gfx_v9_0_check_if_need_gfxoff
.subsections_via_symbols
