	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_get_gpu_reset
_intel_get_gpu_reset:                   ## @intel_get_gpu_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	callq	_INTEL_GEN
	cmpl	$8, %eax
	jl	LBB0_2
## %bb.1:
	movq	_gen8_reset_engines@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_2:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$6, %eax
	jl	LBB0_4
## %bb.3:
	movq	_gen6_reset_engines@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_4:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$5, %eax
	jl	LBB0_6
## %bb.5:
	movq	_ironlake_do_reset@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_6:
	movq	%rbx, %rdi
	callq	_IS_G4X
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:
	movq	_g4x_do_reset@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_8:
	movq	%rbx, %rdi
	callq	_IS_G33
	testq	%rax, %rax
	jne	LBB0_10
## %bb.9:
	movq	%rbx, %rdi
	callq	_IS_PINEVIEW
	testq	%rax, %rax
	je	LBB0_11
LBB0_10:
	movq	_g33_do_reset@GOTPCREL(%rip), %rax
LBB0_14:
	movq	(%rax), %rax
LBB0_15:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
LBB0_11:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$3, %eax
	jl	LBB0_12
## %bb.13:
	movq	_i915_do_reset@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_12:
	xorl	%eax, %eax
	jmp	LBB0_15
	.cfi_endproc
                                        ## -- End function
	.comm	_gen8_reset_engines,8,3         ## @gen8_reset_engines
	.comm	_gen6_reset_engines,8,3         ## @gen6_reset_engines
	.comm	_ironlake_do_reset,8,3          ## @ironlake_do_reset
	.comm	_g4x_do_reset,8,3               ## @g4x_do_reset
	.comm	_g33_do_reset,8,3               ## @g33_do_reset
	.comm	_i915_do_reset,8,3              ## @i915_do_reset
	.no_dead_strip	_intel_get_gpu_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_get_gpu_reset
_intel_get_gpu_reset:                   ; @intel_get_gpu_reset
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_INTEL_GEN
	cmp	w0, #8
	b.lt	LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _gen8_reset_engines@GOTPAGE
Lloh1:
	ldr	x8, [x8, _gen8_reset_engines@GOTPAGEOFF]
	b	LBB0_11
LBB0_2:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #5
	b.le	LBB0_4
; %bb.3:
Lloh2:
	adrp	x8, _gen6_reset_engines@GOTPAGE
Lloh3:
	ldr	x8, [x8, _gen6_reset_engines@GOTPAGEOFF]
	b	LBB0_11
LBB0_4:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #5
	b.lt	LBB0_6
; %bb.5:
Lloh4:
	adrp	x8, _ironlake_do_reset@GOTPAGE
Lloh5:
	ldr	x8, [x8, _ironlake_do_reset@GOTPAGEOFF]
	b	LBB0_11
LBB0_6:
	mov	x0, x19
	bl	_IS_G4X
	cbz	x0, LBB0_8
; %bb.7:
Lloh6:
	adrp	x8, _g4x_do_reset@GOTPAGE
Lloh7:
	ldr	x8, [x8, _g4x_do_reset@GOTPAGEOFF]
	b	LBB0_11
LBB0_8:
	mov	x0, x19
	bl	_IS_G33
	cbnz	x0, LBB0_10
; %bb.9:
	mov	x0, x19
	bl	_IS_PINEVIEW
	cbz	x0, LBB0_13
LBB0_10:
Lloh8:
	adrp	x8, _g33_do_reset@GOTPAGE
Lloh9:
	ldr	x8, [x8, _g33_do_reset@GOTPAGEOFF]
LBB0_11:
	ldr	x0, [x8]
LBB0_12:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_13:
	mov	x0, x19
	bl	_INTEL_GEN
Lloh10:
	adrp	x8, _i915_do_reset@GOTPAGE
Lloh11:
	ldr	x8, [x8, _i915_do_reset@GOTPAGEOFF]
Lloh12:
	ldr	x8, [x8]
	cmp	w0, #2
	csel	x0, x8, xzr, gt
	b	LBB0_12
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_gen8_reset_engines,8,3         ; @gen8_reset_engines
	.comm	_gen6_reset_engines,8,3         ; @gen6_reset_engines
	.comm	_ironlake_do_reset,8,3          ; @ironlake_do_reset
	.comm	_g4x_do_reset,8,3               ; @g4x_do_reset
	.comm	_g33_do_reset,8,3               ; @g33_do_reset
	.comm	_i915_do_reset,8,3              ; @i915_do_reset
	.no_dead_strip	_intel_get_gpu_reset
.subsections_via_symbols
