	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smu7_patch_voltage_workaround
_smu7_patch_voltage_workaround:         ## @smu7_patch_voltage_workaround
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	16(%rdi), %rcx
	testq	%rcx, %rcx
	je	LBB0_15
## %bb.1:
	movq	(%rdi), %rax
	movq	_CHIP_POLARIS10@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rax
	jne	LBB0_15
## %bb.2:
	movq	8(%rdi), %rax
	movq	(%rax), %rdi
	cmpl	$199, (%rdi)
	jne	LBB0_15
## %bb.3:
	movq	(%rcx), %rax
	movq	8(%rcx), %rsi
	movl	4(%rdi), %edx
	movl	8(%rdi), %ecx
	cmpl	$2871, %edx                     ## imm = 0xB37
	jne	LBB0_5
## %bb.4:
	cmpl	$4098, %ecx                     ## imm = 0x1002
	je	LBB0_9
LBB0_5:
	cmpl	$1192, %edx                     ## imm = 0x4A8
	jne	LBB0_7
## %bb.6:
	cmpl	$4163, %ecx                     ## imm = 0x1043
	je	LBB0_9
LBB0_7:
	cmpl	$38016, %edx                    ## imm = 0x9480
	jne	LBB0_15
## %bb.8:
	cmpl	$5762, %ecx                     ## imm = 0x1682
	jne	LBB0_15
LBB0_9:
	movq	8(%rax), %rdx
	movq	8(%rsi), %r8
	movslq	(%rsi), %r9
	movq	-8(%r8,%r9,8), %rcx
	cmpl	$999, (%rdx,%rcx,4)             ## imm = 0x3E7
	jg	LBB0_15
## %bb.10:
	movl	(%rax), %eax
	testl	%eax, %eax
	jle	LBB0_15
## %bb.11:
	xorl	%edi, %edi
	movl	$-1000, %ecx                    ## imm = 0xFC18
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movl	(%rdx,%rdi,4), %esi
	addl	%ecx, %esi
	cmpl	$64280, %esi                    ## imm = 0xFB18
	jbe	LBB0_13
## %bb.14:                              ##   in Loop: Header=BB0_12 Depth=1
	incq	%rdi
	cmpq	%rdi, %rax
	jne	LBB0_12
	jmp	LBB0_15
LBB0_13:
	movq	%rdi, -8(%r8,%r9,8)
LBB0_15:
	xorl	%eax, %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_POLARIS10,8,3             ## @CHIP_POLARIS10
	.no_dead_strip	_smu7_patch_voltage_workaround
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smu7_patch_voltage_workaround
_smu7_patch_voltage_workaround:         ; @smu7_patch_voltage_workaround
	.cfi_startproc
; %bb.0:
	ldr	x8, [x0, #16]
	cbz	x8, LBB0_11
; %bb.1:
	ldr	x9, [x0]
Lloh0:
	adrp	x10, _CHIP_POLARIS10@GOTPAGE
Lloh1:
	ldr	x10, [x10, _CHIP_POLARIS10@GOTPAGEOFF]
Lloh2:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_11
; %bb.2:
	ldr	x9, [x0, #8]
	ldr	x12, [x9]
	ldr	w9, [x12]
	cmp	w9, #199
	b.ne	LBB0_11
; %bb.3:
	ldp	x11, x10, [x8]
	ldp	w9, w8, [x12, #4]
	cmp	w9, #2871
	mov	w12, #4098
	ccmp	w8, w12, #0, eq
	b.eq	LBB0_6
; %bb.4:
	cmp	w9, #1192
	mov	w12, #4163
	ccmp	w8, w12, #0, eq
	b.eq	LBB0_6
; %bb.5:
	mov	w12, #38016
	cmp	w9, w12
	mov	w9, #5762
	ccmp	w8, w9, #0, eq
	b.ne	LBB0_11
LBB0_6:
	ldr	x9, [x11, #8]
	ldr	x8, [x10, #8]
	ldrsw	x10, [x10]
	sub	x10, x10, #1
	ldr	x12, [x8, x10, lsl #3]
	ldr	w12, [x9, x12, lsl #2]
	cmp	w12, #999
	b.gt	LBB0_11
; %bb.7:
	ldr	w11, [x11]
	cmp	w11, #1
	b.lt	LBB0_11
; %bb.8:
	mov	x12, #0
	mov	w13, #64280
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w14, [x9, x12, lsl #2]
	sub	w14, w14, #1000
	cmp	w14, w13
	b.ls	LBB0_12
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	add	x12, x12, #1
	cmp	x11, x12
	b.ne	LBB0_9
LBB0_11:
	mov	w0, #0
	ret
LBB0_12:
	str	x12, [x8, x10, lsl #3]
	mov	w0, #0
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_POLARIS10,8,3             ; @CHIP_POLARIS10
	.no_dead_strip	_smu7_patch_voltage_workaround
.subsections_via_symbols
