	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_ctx_add_fence           ## -- Begin function amdgpu_ctx_add_fence
	.p2align	4, 0x90
_amdgpu_ctx_add_fence:                  ## @amdgpu_ctx_add_fence
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, -56(%rbp)                 ## 8-byte Spill
	movq	%rdx, %r12
	movq	%rdi, %r15
	movq	%rsi, %rdi
	callq	_to_amdgpu_ctx_entity
	movq	%rax, %rbx
	movl	(%rax), %ecx
	movq	_amdgpu_sched_jobs@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	decl	%r14d
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	andl	%ecx, %r14d
	movq	8(%rbx), %rax
	movq	(%rax,%r14,8), %r13
	testq	%r13, %r13
	je	LBB0_2
## %bb.1:
	movq	%r13, %rdi
	callq	_dma_fence_is_signaled
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	callq	_BUG_ON
LBB0_2:
	movq	%r12, %rdi
	callq	_dma_fence_get
	movq	%r15, %rdi
	callq	_spin_lock
	movq	8(%rbx), %rax
	movq	%r12, (%rax,%r14,8)
	incl	(%rbx)
	movq	%r15, %rdi
	callq	_spin_unlock
	movq	%r13, %rdi
	callq	_dma_fence_put
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	movl	%ecx, (%rax)
LBB0_4:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_amdgpu_sched_jobs,4,2          ## @amdgpu_sched_jobs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_ctx_add_fence           ; -- Begin function amdgpu_ctx_add_fence
	.p2align	2
_amdgpu_ctx_add_fence:                  ; @amdgpu_ctx_add_fence
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x3
	mov	x21, x2
	mov	x20, x0
	mov	x0, x1
	bl	_to_amdgpu_ctx_entity
	mov	x22, x0
	ldr	w24, [x0]
Lloh0:
	adrp	x8, _amdgpu_sched_jobs@GOTPAGE
Lloh1:
	ldr	x8, [x8, _amdgpu_sched_jobs@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	sub	w8, w8, #1
	and	w25, w8, w24
	ldr	x8, [x0, #8]
	ldr	x23, [x8, w25, uxtw #3]
	cbz	x23, LBB0_2
; %bb.1:
	mov	x0, x23
	bl	_dma_fence_is_signaled
	cmp	w0, #0
	cset	w0, eq
	bl	_BUG_ON
LBB0_2:
	mov	x0, x21
	bl	_dma_fence_get
	mov	x0, x20
	bl	_spin_lock
	ldr	x8, [x22, #8]
	str	x21, [x8, x25, lsl #3]
	ldr	w8, [x22]
	add	w8, w8, #1
	str	w8, [x22]
	mov	x0, x20
	bl	_spin_unlock
	mov	x0, x23
	bl	_dma_fence_put
	cbz	x19, LBB0_4
; %bb.3:
	str	w24, [x19]
LBB0_4:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_amdgpu_sched_jobs,4,2          ; @amdgpu_sched_jobs
.subsections_via_symbols
