	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_venc_cvbs_encoder_enable
_meson_venc_cvbs_encoder_enable:        ## @meson_venc_cvbs_encoder_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_encoder_to_meson_venc_cvbs
	movq	(%rax), %r15
	movq	_VENC_VDAC_SEL_ATV_DMD@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	8(%r15), %rbx
	movq	_VENC_VDAC_DACSEL0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	%r14d, %edi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	_writel_bits_relaxed
	movq	_VPU_COMPATIBLE_GXBB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_meson_vpu_is_compatible
	movq	_HHI_VDAC_CNTL1@GOTPCREL(%rip), %r12
	movl	$1, %r14d
	movq	_HHI_VDAC_CNTL0@GOTPCREL(%rip), %rbx
	testq	%rax, %rax
	jne	LBB0_5
## %bb.1:
	movq	_VPU_COMPATIBLE_GXM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_meson_vpu_is_compatible
	movl	$983041, %r14d                  ## imm = 0xF0001
	testq	%rax, %rax
	jne	LBB0_5
## %bb.2:
	movq	_VPU_COMPATIBLE_GXL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_meson_vpu_is_compatible
	testq	%rax, %rax
	jne	LBB0_5
## %bb.3:
	movq	_VPU_COMPATIBLE_G12A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_meson_vpu_is_compatible
	testq	%rax, %rax
	je	LBB0_6
## %bb.4:
	movq	_HHI_VDAC_CNTL1_G12A@GOTPCREL(%rip), %r12
	movl	$9461761, %r14d                 ## imm = 0x906001
	movq	_HHI_VDAC_CNTL0_G12A@GOTPCREL(%rip), %rbx
LBB0_5:
	movl	(%r15), %edi
	movl	(%rbx), %esi
	movl	%r14d, %edx
	callq	_regmap_write
	movl	(%r15), %edi
	movl	(%r12), %esi
	xorl	%edx, %edx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_regmap_write                   ## TAILCALL
LBB0_6:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VENC_VDAC_SEL_ATV_DMD,4,2      ## @VENC_VDAC_SEL_ATV_DMD
	.comm	_VENC_VDAC_DACSEL0,4,2          ## @VENC_VDAC_DACSEL0
	.comm	_VPU_COMPATIBLE_GXBB,4,2        ## @VPU_COMPATIBLE_GXBB
	.comm	_HHI_VDAC_CNTL0,4,2             ## @HHI_VDAC_CNTL0
	.comm	_HHI_VDAC_CNTL1,4,2             ## @HHI_VDAC_CNTL1
	.comm	_VPU_COMPATIBLE_GXM,4,2         ## @VPU_COMPATIBLE_GXM
	.comm	_VPU_COMPATIBLE_GXL,4,2         ## @VPU_COMPATIBLE_GXL
	.comm	_VPU_COMPATIBLE_G12A,4,2        ## @VPU_COMPATIBLE_G12A
	.comm	_HHI_VDAC_CNTL0_G12A,4,2        ## @HHI_VDAC_CNTL0_G12A
	.comm	_HHI_VDAC_CNTL1_G12A,4,2        ## @HHI_VDAC_CNTL1_G12A
	.no_dead_strip	_meson_venc_cvbs_encoder_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_venc_cvbs_encoder_enable
_meson_venc_cvbs_encoder_enable:        ; @meson_venc_cvbs_encoder_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_encoder_to_meson_venc_cvbs
Lloh0:
	adrp	x8, _VENC_VDAC_SEL_ATV_DMD@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VENC_VDAC_SEL_ATV_DMD@GOTPAGEOFF]
	ldr	x19, [x0]
Lloh2:
	ldr	w20, [x8]
	ldr	x21, [x19, #8]
Lloh3:
	adrp	x8, _VENC_VDAC_DACSEL0@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VENC_VDAC_DACSEL0@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	__REG
	add	x2, x0, x21
	mov	x0, x20
	mov	w1, #0
	bl	_writel_bits_relaxed
Lloh6:
	adrp	x8, _VPU_COMPATIBLE_GXBB@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VPU_COMPATIBLE_GXBB@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_meson_vpu_is_compatible
	cbz	x0, LBB0_2
; %bb.1:
Lloh9:
	adrp	x21, _HHI_VDAC_CNTL1@GOTPAGE
Lloh10:
	ldr	x21, [x21, _HHI_VDAC_CNTL1@GOTPAGEOFF]
	mov	w20, #1
	b	LBB0_5
LBB0_2:
	mov	w20, #1
	movk	w20, #15, lsl #16
Lloh11:
	adrp	x8, _VPU_COMPATIBLE_GXM@GOTPAGE
Lloh12:
	ldr	x8, [x8, _VPU_COMPATIBLE_GXM@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_meson_vpu_is_compatible
	cbnz	x0, LBB0_4
; %bb.3:
Lloh14:
	adrp	x8, _VPU_COMPATIBLE_GXL@GOTPAGE
Lloh15:
	ldr	x8, [x8, _VPU_COMPATIBLE_GXL@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_meson_vpu_is_compatible
	cbz	x0, LBB0_7
LBB0_4:
Lloh17:
	adrp	x21, _HHI_VDAC_CNTL1@GOTPAGE
Lloh18:
	ldr	x21, [x21, _HHI_VDAC_CNTL1@GOTPAGEOFF]
LBB0_5:
Lloh19:
	adrp	x8, _HHI_VDAC_CNTL0@GOTPAGE
Lloh20:
	ldr	x8, [x8, _HHI_VDAC_CNTL0@GOTPAGEOFF]
LBB0_6:
	ldr	w0, [x19]
	ldr	w1, [x8]
	mov	x2, x20
	bl	_regmap_write
	ldr	w0, [x19]
	ldr	w1, [x21]
	mov	w2, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_regmap_write
LBB0_7:
Lloh21:
	adrp	x8, _VPU_COMPATIBLE_G12A@GOTPAGE
Lloh22:
	ldr	x8, [x8, _VPU_COMPATIBLE_G12A@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_meson_vpu_is_compatible
	cbz	x0, LBB0_9
; %bb.8:
	add	w20, w20, #2070, lsl #12        ; =8478720
Lloh24:
	adrp	x21, _HHI_VDAC_CNTL1_G12A@GOTPAGE
Lloh25:
	ldr	x21, [x21, _HHI_VDAC_CNTL1_G12A@GOTPAGEOFF]
Lloh26:
	adrp	x8, _HHI_VDAC_CNTL0_G12A@GOTPAGE
Lloh27:
	ldr	x8, [x8, _HHI_VDAC_CNTL0_G12A@GOTPAGEOFF]
	b	LBB0_6
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_VENC_VDAC_SEL_ATV_DMD,4,2      ; @VENC_VDAC_SEL_ATV_DMD
	.comm	_VENC_VDAC_DACSEL0,4,2          ; @VENC_VDAC_DACSEL0
	.comm	_VPU_COMPATIBLE_GXBB,4,2        ; @VPU_COMPATIBLE_GXBB
	.comm	_HHI_VDAC_CNTL0,4,2             ; @HHI_VDAC_CNTL0
	.comm	_HHI_VDAC_CNTL1,4,2             ; @HHI_VDAC_CNTL1
	.comm	_VPU_COMPATIBLE_GXM,4,2         ; @VPU_COMPATIBLE_GXM
	.comm	_VPU_COMPATIBLE_GXL,4,2         ; @VPU_COMPATIBLE_GXL
	.comm	_VPU_COMPATIBLE_G12A,4,2        ; @VPU_COMPATIBLE_G12A
	.comm	_HHI_VDAC_CNTL0_G12A,4,2        ; @HHI_VDAC_CNTL0_G12A
	.comm	_HHI_VDAC_CNTL1_G12A,4,2        ; @HHI_VDAC_CNTL1_G12A
	.no_dead_strip	_meson_venc_cvbs_encoder_enable
.subsections_via_symbols
