	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdma_v4_0_init_microcode
_sdma_v4_0_init_microcode:              ## @sdma_v4_0_init_microcode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movl	(%r15), %eax
	addl	$-128, %eax
	cmpl	$5, %eax
	ja	LBB0_9
## %bb.1:
	leaq	L_.str.1(%rip), %r14
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_3:
	leaq	L_.str.3(%rip), %r14
	jmp	LBB0_10
LBB0_9:
	xorl	%eax, %eax
	callq	_BUG
                                        ## implicit-def: $r14
	jmp	LBB0_10
LBB0_2:
	leaq	L_.str.2(%rip), %r14
	jmp	LBB0_10
LBB0_8:
	leaq	L_.str.8(%rip), %r14
	jmp	LBB0_10
LBB0_4:
	cmpl	$7, 4(%r15)
	jle	LBB0_6
## %bb.5:
	leaq	L_.str.4(%rip), %r14
	jmp	LBB0_10
LBB0_7:
	leaq	L_.str.7(%rip), %r14
	jmp	LBB0_10
LBB0_6:
	movq	56(%r15), %rax
	cmpl	$5592, (%rax)                   ## imm = 0x15D8
	leaq	L_.str.5(%rip), %rax
	leaq	L_.str.6(%rip), %r14
	cmoveq	%rax, %r14
LBB0_10:
	leaq	L_.str.9(%rip), %rdx
	leaq	-80(%rbp), %rbx
	movq	%rbx, %rdi
	movl	$30, %esi
	movq	%r14, %rcx
	xorl	%eax, %eax
	callq	_snprintf
	movq	40(%r15), %rdi
	movl	48(%r15), %edx
	movq	%rbx, %rsi
	callq	_request_firmware
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	LBB0_24
## %bb.11:
	movq	40(%r15), %rdi
	callq	_sdma_v4_0_init_inst_ctx
	movl	%eax, %r12d
	testl	%eax, %eax
	je	LBB0_12
LBB0_24:
	leaq	L_.str.14(%rip), %rdi
	leaq	-80(%rbp), %rsi
	callq	_DRM_ERROR
	movq	%r15, %rdi
	callq	_sdma_v4_0_destroy_inst_ctx
LBB0_25:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_27
## %bb.26:
	movl	%r12d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_12:
	cmpl	$2, 32(%r15)
	jl	LBB0_17
## %bb.13:
	movl	$1, %ebx
	movl	$8, %r13d
	jmp	LBB0_14
	.p2align	4, 0x90
LBB0_15:                                ##   in Loop: Header=BB0_14 Depth=1
	movq	40(%r15), %rsi
	leaq	(%rsi,%r13), %rdi
	movl	$4, %edx
	callq	_memcpy
LBB0_16:                                ##   in Loop: Header=BB0_14 Depth=1
	incq	%rbx
	movslq	32(%r15), %rax
	addq	$8, %r13
	cmpq	%rax, %rbx
	jge	LBB0_17
LBB0_14:                                ## =>This Inner Loop Header: Depth=1
	cmpl	$133, (%r15)
	je	LBB0_15
## %bb.21:                              ##   in Loop: Header=BB0_14 Depth=1
	leaq	-80(%rbp), %r12
	movq	%r12, %rdi
	movl	$30, %esi
	leaq	L_.str.10(%rip), %rdx
	movq	%r14, %rcx
	movl	%ebx, %r8d
	xorl	%eax, %eax
	callq	_snprintf
	movq	40(%r15), %rdi
	addq	%r13, %rdi
	movl	48(%r15), %edx
	movq	%r12, %rsi
	callq	_request_firmware
	testl	%eax, %eax
	jne	LBB0_23
## %bb.22:                              ##   in Loop: Header=BB0_14 Depth=1
	movq	40(%r15), %rdi
	addq	%r13, %rdi
	callq	_sdma_v4_0_init_inst_ctx
	testl	%eax, %eax
	je	LBB0_16
LBB0_23:
	movl	%eax, %r12d
	jmp	LBB0_24
LBB0_17:
	movq	8(%r15), %rax
	movq	_AMDGPU_FW_LOAD_PSP@GOTPCREL(%rip), %rbx
	cmpq	(%rbx), %rax
	leaq	L_.str.12(%rip), %rax
	leaq	L_.str.13(%rip), %rsi
	cmoveq	%rax, %rsi
	leaq	L_.str.11(%rip), %rdi
	xorl	%r12d, %r12d
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	movq	8(%r15), %rax
	cmpq	(%rbx), %rax
	jne	LBB0_25
## %bb.18:
	cmpl	$0, 32(%r15)
	jle	LBB0_25
## %bb.19:
	xorl	%r12d, %r12d
	movq	_AMDGPU_UCODE_ID_SDMA0@GOTPCREL(%rip), %r14
	movq	_PAGE_SIZE@GOTPCREL(%rip), %r13
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_20:                                ## =>This Inner Loop Header: Depth=1
	movq	24(%r15), %rax
	movslq	(%r14), %rcx
	leal	(%rbx,%rcx), %edx
	addq	%rbx, %rcx
	shlq	$4, %rcx
	movl	%edx, (%rax,%rcx)
	movq	40(%r15), %rdx
	movq	(%rdx,%rbx,8), %rdx
	movq	%rdx, 8(%rax,%rcx)
	movq	(%rdx), %rax
	movl	(%rax), %edi
	callq	_le32_to_cpu
	movl	(%r13), %esi
	movl	%eax, %edi
	callq	_ALIGN
	addl	%eax, 16(%r15)
	incq	%rbx
	movslq	32(%r15), %rax
	cmpq	%rax, %rbx
	jl	LBB0_20
	jmp	LBB0_25
LBB0_27:
	callq	___stack_chk_fail
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
LJTI0_0:
	.long	L0_0_set_3
	.long	L0_0_set_2
	.long	L0_0_set_10
	.long	L0_0_set_8
	.long	L0_0_set_4
	.long	L0_0_set_7
	.end_data_region
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\n"

L_.str.1:                               ## @.str.1
	.asciz	"vega10"

L_.str.2:                               ## @.str.2
	.asciz	"vega12"

L_.str.3:                               ## @.str.3
	.asciz	"vega20"

L_.str.4:                               ## @.str.4
	.asciz	"raven2"

L_.str.5:                               ## @.str.5
	.asciz	"picasso"

L_.str.6:                               ## @.str.6
	.asciz	"raven"

L_.str.7:                               ## @.str.7
	.asciz	"arcturus"

L_.str.8:                               ## @.str.8
	.asciz	"renoir"

L_.str.9:                               ## @.str.9
	.asciz	"amdgpu/%s_sdma.bin"

L_.str.10:                              ## @.str.10
	.asciz	"amdgpu/%s_sdma%d.bin"

L_.str.11:                              ## @.str.11
	.asciz	"psp_load == '%s'\n"

	.comm	_AMDGPU_FW_LOAD_PSP,8,3         ## @AMDGPU_FW_LOAD_PSP
L_.str.12:                              ## @.str.12
	.asciz	"true"

L_.str.13:                              ## @.str.13
	.asciz	"false"

	.comm	_AMDGPU_UCODE_ID_SDMA0,4,2      ## @AMDGPU_UCODE_ID_SDMA0
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
L_.str.14:                              ## @.str.14
	.asciz	"sdma_v4_0: Failed to load firmware \"%s\"\n"

	.no_dead_strip	_sdma_v4_0_init_microcode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdma_v4_0_init_microcode
_sdma_v4_0_init_microcode:              ; @sdma_v4_0_init_microcode
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #40]
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x19]
	sub	w8, w8, #128
	cmp	w8, #5
	b.hi	LBB0_3
; %bb.1:
Lloh5:
	adrp	x20, l_.str.1@PAGE
Lloh6:
	add	x20, x20, l_.str.1@PAGEOFF
Lloh7:
	adrp	x9, lJTI0_0@PAGE
Lloh8:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
Lloh9:
	adrp	x20, l_.str.3@PAGE
Lloh10:
	add	x20, x20, l_.str.3@PAGEOFF
	b	LBB0_10
LBB0_3:
	bl	_BUG
                                        ; implicit-def: $x20
	b	LBB0_10
LBB0_4:
Lloh11:
	adrp	x20, l_.str.2@PAGE
Lloh12:
	add	x20, x20, l_.str.2@PAGEOFF
	b	LBB0_10
LBB0_5:
Lloh13:
	adrp	x20, l_.str.8@PAGE
Lloh14:
	add	x20, x20, l_.str.8@PAGEOFF
	b	LBB0_10
LBB0_6:
	ldr	w8, [x19, #4]
	cmp	w8, #7
	b.le	LBB0_9
; %bb.7:
Lloh15:
	adrp	x20, l_.str.4@PAGE
Lloh16:
	add	x20, x20, l_.str.4@PAGEOFF
	b	LBB0_10
LBB0_8:
Lloh17:
	adrp	x20, l_.str.7@PAGE
Lloh18:
	add	x20, x20, l_.str.7@PAGEOFF
	b	LBB0_10
LBB0_9:
	ldr	x8, [x19, #56]
Lloh19:
	adrp	x9, l_.str.6@PAGE
Lloh20:
	add	x9, x9, l_.str.6@PAGEOFF
	ldr	w8, [x8]
Lloh21:
	adrp	x10, l_.str.5@PAGE
Lloh22:
	add	x10, x10, l_.str.5@PAGEOFF
	mov	w11, #5592
	cmp	w8, w11
	csel	x20, x10, x9, eq
LBB0_10:
Lloh23:
	adrp	x2, l_.str.9@PAGE
Lloh24:
	add	x2, x2, l_.str.9@PAGEOFF
	add	x0, sp, #10
	mov	w1, #30
	mov	x3, x20
	bl	_snprintf
	ldr	x0, [x19, #40]
	ldr	w2, [x19, #48]
	add	x1, sp, #10
	bl	_request_firmware
	mov	x22, x0
	cbnz	w0, LBB0_12
; %bb.11:
	ldr	x0, [x19, #40]
	bl	_sdma_v4_0_init_inst_ctx
	mov	x22, x0
	cbz	w0, LBB0_15
LBB0_12:
Lloh25:
	adrp	x0, l_.str.14@PAGE
Lloh26:
	add	x0, x0, l_.str.14@PAGEOFF
	add	x1, sp, #10
	bl	_DRM_ERROR
	mov	x0, x19
	bl	_sdma_v4_0_destroy_inst_ctx
LBB0_13:
	ldr	x8, [sp, #40]
Lloh27:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh28:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh29:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_28
; %bb.14:
	mov	x0, x22
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_15:
	ldr	w8, [x19, #32]
	cmp	w8, #2
	b.lt	LBB0_23
; %bb.16:
	mov	w23, #1
	mov	w24, #8
Lloh30:
	adrp	x21, l_.str.10@PAGE
Lloh31:
	add	x21, x21, l_.str.10@PAGEOFF
	b	LBB0_19
LBB0_17:                                ;   in Loop: Header=BB0_19 Depth=1
	ldr	x1, [x19, #40]
	add	x0, x1, x24
	mov	w2, #4
	bl	_memcpy
LBB0_18:                                ;   in Loop: Header=BB0_19 Depth=1
	add	x23, x23, #1
	ldrsw	x8, [x19, #32]
	add	x24, x24, #8
	cmp	x23, x8
	b.ge	LBB0_23
LBB0_19:                                ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x19]
	cmp	w8, #133
	b.eq	LBB0_17
; %bb.20:                               ;   in Loop: Header=BB0_19 Depth=1
	str	x23, [sp]
	add	x0, sp, #10
	mov	w1, #30
	mov	x2, x21
	mov	x3, x20
	bl	_snprintf
	ldr	x8, [x19, #40]
	add	x0, x8, x24
	ldr	w2, [x19, #48]
	add	x1, sp, #10
	bl	_request_firmware
	cbnz	w0, LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_19 Depth=1
	ldr	x8, [x19, #40]
	add	x0, x8, x24
	bl	_sdma_v4_0_init_inst_ctx
	cbz	w0, LBB0_18
LBB0_22:
	mov	x22, x0
	b	LBB0_12
LBB0_23:
	ldr	x8, [x19, #8]
Lloh32:
	adrp	x20, _AMDGPU_FW_LOAD_PSP@GOTPAGE
Lloh33:
	ldr	x20, [x20, _AMDGPU_FW_LOAD_PSP@GOTPAGEOFF]
	ldr	x9, [x20]
Lloh34:
	adrp	x10, l_.str.13@PAGE
Lloh35:
	add	x10, x10, l_.str.13@PAGEOFF
Lloh36:
	adrp	x11, l_.str.12@PAGE
Lloh37:
	add	x11, x11, l_.str.12@PAGEOFF
	cmp	x8, x9
	csel	x8, x11, x10, eq
	str	x8, [sp]
Lloh38:
	adrp	x0, l_.str.11@PAGE
Lloh39:
	add	x0, x0, l_.str.11@PAGEOFF
	bl	_DRM_DEBUG
	ldr	x8, [x19, #8]
	ldr	x9, [x20]
	cmp	x8, x9
	b.ne	LBB0_27
; %bb.24:
	ldr	w8, [x19, #32]
	cmp	w8, #1
	b.lt	LBB0_27
; %bb.25:
	mov	x20, #0
Lloh40:
	adrp	x21, _AMDGPU_UCODE_ID_SDMA0@GOTPAGE
Lloh41:
	ldr	x21, [x21, _AMDGPU_UCODE_ID_SDMA0@GOTPAGEOFF]
Lloh42:
	adrp	x22, _PAGE_SIZE@GOTPAGE
Lloh43:
	ldr	x22, [x22, _PAGE_SIZE@GOTPAGEOFF]
LBB0_26:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #24]
	ldrsw	x9, [x21]
	add	w10, w20, w9
	add	x9, x20, x9
	add	x8, x8, x9, lsl #4
	str	w10, [x8]
	ldr	x9, [x19, #40]
	ldr	x9, [x9, x20, lsl #3]
	str	x9, [x8, #8]
	ldr	x8, [x9]
	ldr	w0, [x8]
	bl	_le32_to_cpu
	ldr	w1, [x22]
	bl	_ALIGN
	ldr	w8, [x19, #16]
	add	w8, w8, w0
	str	w8, [x19, #16]
	add	x20, x20, #1
	ldrsw	x8, [x19, #32]
	cmp	x20, x8
	b.lt	LBB0_26
LBB0_27:
	mov	w22, #0
	b	LBB0_13
LBB0_28:
	bl	___stack_chk_fail
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpAdd	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh40, Lloh41
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_10-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_8-LBB0_2)>>2
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\n"

l_.str.1:                               ; @.str.1
	.asciz	"vega10"

l_.str.2:                               ; @.str.2
	.asciz	"vega12"

l_.str.3:                               ; @.str.3
	.asciz	"vega20"

l_.str.4:                               ; @.str.4
	.asciz	"raven2"

l_.str.5:                               ; @.str.5
	.asciz	"picasso"

l_.str.6:                               ; @.str.6
	.asciz	"raven"

l_.str.7:                               ; @.str.7
	.asciz	"arcturus"

l_.str.8:                               ; @.str.8
	.asciz	"renoir"

l_.str.9:                               ; @.str.9
	.asciz	"amdgpu/%s_sdma.bin"

l_.str.10:                              ; @.str.10
	.asciz	"amdgpu/%s_sdma%d.bin"

l_.str.11:                              ; @.str.11
	.asciz	"psp_load == '%s'\n"

	.comm	_AMDGPU_FW_LOAD_PSP,8,3         ; @AMDGPU_FW_LOAD_PSP
l_.str.12:                              ; @.str.12
	.asciz	"true"

l_.str.13:                              ; @.str.13
	.asciz	"false"

	.comm	_AMDGPU_UCODE_ID_SDMA0,4,2      ; @AMDGPU_UCODE_ID_SDMA0
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
l_.str.14:                              ; @.str.14
	.asciz	"sdma_v4_0: Failed to load firmware \"%s\"\n"

	.no_dead_strip	_sdma_v4_0_init_microcode
.subsections_via_symbols
