	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gmc_v10_0_mc_init
_gmc_v10_0_mc_init:                     ## @gmc_v10_0_mc_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_amdgpu_emu_mode@GOTPCREL(%rip), %rcx
	movl	$128, %eax
	cmpl	$0, (%rcx)
	jne	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_amdgpu_atomfirmware_get_vram_width
LBB0_2:
	leaq	8(%rbx), %r14
	movl	%eax, 8(%rbx)
	movl	72(%rbx), %edi
	xorl	%esi, %esi
	callq	_pci_resource_start
	movl	%eax, 56(%rbx)
	movl	72(%rbx), %edi
	xorl	%esi, %esi
	callq	_pci_resource_len
	movq	%rax, 16(%rbx)
	movq	64(%rbx), %rax
	movq	%rbx, %rdi
	callq	*(%rax)
	shlq	$20, %rax
	movq	%rax, 24(%rbx)
	movq	%rax, 32(%rbx)
	movq	16(%rbx), %rcx
	cmpq	%rax, %rcx
	cmovbq	%rcx, %rax
	movq	%rax, 40(%rbx)
	movq	_amdgpu_gart_size@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, %ecx
	shll	$20, %ecx
	cmpl	$-1, %eax
	movl	$536870912, %eax                ## imm = 0x20000000
	cmovnel	%ecx, %eax
	cltq
	movq	%rax, 48(%rbx)
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_gmc_v10_0_vram_gtt_location
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_amdgpu_emu_mode,4,2            ## @amdgpu_emu_mode
	.comm	_amdgpu_gart_size,4,2           ## @amdgpu_gart_size
	.no_dead_strip	_gmc_v10_0_mc_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gmc_v10_0_mc_init
_gmc_v10_0_mc_init:                     ; @gmc_v10_0_mc_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _amdgpu_emu_mode@GOTPAGE
Lloh1:
	ldr	x8, [x8, _amdgpu_emu_mode@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cbz	w8, LBB0_2
; %bb.1:
	mov	w0, #128
	b	LBB0_3
LBB0_2:
	mov	x0, x19
	bl	_amdgpu_atomfirmware_get_vram_width
LBB0_3:
	mov	x20, x19
	str	w0, [x20, #8]!
	ldr	w0, [x19, #72]
	mov	w1, #0
	bl	_pci_resource_start
	str	w0, [x19, #56]
	ldr	w0, [x19, #72]
	mov	w1, #0
	bl	_pci_resource_len
	str	x0, [x19, #16]
	ldr	x8, [x19, #64]
	ldr	x8, [x8]
	mov	x0, x19
	blr	x8
	lsl	x8, x0, #20
	stp	x8, x8, [x19, #24]
	ldr	x9, [x19, #16]
	cmp	x9, x8
	csel	x8, x9, x8, lo
Lloh3:
	adrp	x9, _amdgpu_gart_size@GOTPAGE
Lloh4:
	ldr	x9, [x9, _amdgpu_gart_size@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	lsl	w10, w9, #20
	cmn	w9, #1
	mov	w9, #536870912
	csel	w9, w9, w10, eq
	sxtw	x9, w9
	stp	x8, x9, [x19, #40]
	mov	x0, x19
	mov	x1, x20
	bl	_gmc_v10_0_vram_gtt_location
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_amdgpu_emu_mode,4,2            ; @amdgpu_emu_mode
	.comm	_amdgpu_gart_size,4,2           ; @amdgpu_gart_size
	.no_dead_strip	_gmc_v10_0_mc_init
.subsections_via_symbols
