	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_set_clk_bypass_mode
_si_set_clk_bypass_mode:                ## @si_set_clk_bypass_mode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	_CG_SPLL_FUNC_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_RREG32
	movslq	%eax, %rsi
	movq	_SPLL_BYPASS_EN@GOTPCREL(%rip), %rax
	orq	(%rax), %rsi
	movl	(%rbx), %edi
	callq	_WREG32
	movq	_CG_SPLL_FUNC_CNTL_2@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	callq	_RREG32
	movslq	%eax, %rsi
	movq	_SPLL_CTLREQ_CHG@GOTPCREL(%rip), %rax
	orq	(%rax), %rsi
	movl	(%r14), %edi
	callq	_WREG32
	cmpq	$0, (%r12)
	jle	LBB0_4
## %bb.1:
	xorl	%ebx, %ebx
	movq	_SPLL_STATUS@GOTPCREL(%rip), %r13
	movq	_SPLL_CHG_STATUS@GOTPCREL(%rip), %r15
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r13), %edi
	callq	_RREG32
	testl	%eax, (%r15)
	jne	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	$1, %edi
	callq	_udelay
	incq	%rbx
	cmpq	(%r12), %rbx
	jl	LBB0_2
LBB0_4:
	movl	(%r14), %edi
	callq	_RREG32
	movq	_SCLK_MUX_UPDATE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	movq	_SPLL_CTLREQ_CHG@GOTPCREL(%rip), %rcx
	orq	(%rcx), %rsi
	cltq
	notq	%rsi
	andq	%rax, %rsi
	movl	(%r14), %edi
	callq	_WREG32
	movq	_MPLL_CNTL_MODE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_RREG32
	cltq
	movq	_MPLL_MCLK_SEL@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	notq	%rsi
	andq	%rax, %rsi
	movl	(%rbx), %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CG_SPLL_FUNC_CNTL,4,2          ## @CG_SPLL_FUNC_CNTL
	.comm	_SPLL_BYPASS_EN,8,3             ## @SPLL_BYPASS_EN
	.comm	_CG_SPLL_FUNC_CNTL_2,4,2        ## @CG_SPLL_FUNC_CNTL_2
	.comm	_SPLL_CTLREQ_CHG,8,3            ## @SPLL_CTLREQ_CHG
	.comm	_SPLL_STATUS,4,2                ## @SPLL_STATUS
	.comm	_SPLL_CHG_STATUS,4,2            ## @SPLL_CHG_STATUS
	.comm	_SCLK_MUX_UPDATE,8,3            ## @SCLK_MUX_UPDATE
	.comm	_MPLL_CNTL_MODE,4,2             ## @MPLL_CNTL_MODE
	.comm	_MPLL_MCLK_SEL,8,3              ## @MPLL_MCLK_SEL
	.no_dead_strip	_si_set_clk_bypass_mode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_set_clk_bypass_mode
_si_set_clk_bypass_mode:                ; @si_set_clk_bypass_mode
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x20, _CG_SPLL_FUNC_CNTL@GOTPAGE
Lloh1:
	ldr	x20, [x20, _CG_SPLL_FUNC_CNTL@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	_RREG32
                                        ; kill: def $w0 killed $w0 def $x0
	sxtw	x8, w0
Lloh2:
	adrp	x9, _SPLL_BYPASS_EN@GOTPAGE
Lloh3:
	ldr	x9, [x9, _SPLL_BYPASS_EN@GOTPAGEOFF]
Lloh4:
	ldr	x9, [x9]
	orr	x1, x9, x8
	ldr	w0, [x20]
	bl	_WREG32
Lloh5:
	adrp	x20, _CG_SPLL_FUNC_CNTL_2@GOTPAGE
Lloh6:
	ldr	x20, [x20, _CG_SPLL_FUNC_CNTL_2@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	_RREG32
                                        ; kill: def $w0 killed $w0 def $x0
	sxtw	x8, w0
Lloh7:
	adrp	x21, _SPLL_CTLREQ_CHG@GOTPAGE
Lloh8:
	ldr	x21, [x21, _SPLL_CTLREQ_CHG@GOTPAGEOFF]
	ldr	x9, [x21]
	orr	x1, x9, x8
	ldr	w0, [x20]
	bl	_WREG32
	ldr	x8, [x19]
	cmp	x8, #1
	b.lt	LBB0_4
; %bb.1:
	mov	x22, #0
Lloh9:
	adrp	x23, _SPLL_STATUS@GOTPAGE
Lloh10:
	ldr	x23, [x23, _SPLL_STATUS@GOTPAGEOFF]
Lloh11:
	adrp	x24, _SPLL_CHG_STATUS@GOTPAGE
Lloh12:
	ldr	x24, [x24, _SPLL_CHG_STATUS@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x23]
	bl	_RREG32
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	w0, #1
	bl	_udelay
	add	x22, x22, #1
	ldr	x8, [x19]
	cmp	x22, x8
	b.lt	LBB0_2
LBB0_4:
	ldr	w0, [x20]
	bl	_RREG32
                                        ; kill: def $w0 killed $w0 def $x0
	sxtw	x8, w0
	ldr	x9, [x21]
Lloh13:
	adrp	x10, _SCLK_MUX_UPDATE@GOTPAGE
Lloh14:
	ldr	x10, [x10, _SCLK_MUX_UPDATE@GOTPAGEOFF]
Lloh15:
	ldr	x10, [x10]
	orr	x9, x10, x9
	bic	x1, x8, x9
	ldr	w0, [x20]
	bl	_WREG32
Lloh16:
	adrp	x19, _MPLL_CNTL_MODE@GOTPAGE
Lloh17:
	ldr	x19, [x19, _MPLL_CNTL_MODE@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_RREG32
                                        ; kill: def $w0 killed $w0 def $x0
Lloh18:
	adrp	x8, _MPLL_MCLK_SEL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MPLL_MCLK_SEL@GOTPAGEOFF]
	sxtw	x9, w0
Lloh20:
	ldr	x8, [x8]
	bic	x1, x9, x8
	ldr	w0, [x19]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.cfi_endproc
                                        ; -- End function
	.comm	_CG_SPLL_FUNC_CNTL,4,2          ; @CG_SPLL_FUNC_CNTL
	.comm	_SPLL_BYPASS_EN,8,3             ; @SPLL_BYPASS_EN
	.comm	_CG_SPLL_FUNC_CNTL_2,4,2        ; @CG_SPLL_FUNC_CNTL_2
	.comm	_SPLL_CTLREQ_CHG,8,3            ; @SPLL_CTLREQ_CHG
	.comm	_SPLL_STATUS,4,2                ; @SPLL_STATUS
	.comm	_SPLL_CHG_STATUS,4,2            ; @SPLL_CHG_STATUS
	.comm	_SCLK_MUX_UPDATE,8,3            ; @SCLK_MUX_UPDATE
	.comm	_MPLL_CNTL_MODE,4,2             ; @MPLL_CNTL_MODE
	.comm	_MPLL_MCLK_SEL,8,3              ; @MPLL_MCLK_SEL
	.no_dead_strip	_si_set_clk_bypass_mode
.subsections_via_symbols
