	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdma_v5_0_update_medium_grain_clock_gating
_sdma_v5_0_update_medium_grain_clock_gating: ## @sdma_v5_0_update_medium_grain_clock_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$0, 4(%rdi)
	jle	LBB0_9
## %bb.1:
	movl	%esi, %r14d
	movq	%rdi, %r15
	xorl	%r12d, %r12d
	movq	_mmSDMA0_CLK_CTRL@GOTPCREL(%rip), %r13
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_8:                                 ##   in Loop: Header=BB0_2 Depth=1
	incl	%r12d
	cmpl	4(%r15), %r12d
	jge	LBB0_9
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	testl	%r14d, %r14d
	je	LBB0_5
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_AMD_CG_SUPPORT_SDMA_MGCG@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r15)
	je	LBB0_5
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r13), %edx
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_sdma_v5_0_get_reg_offset
	movl	%eax, %edi
	callq	_RREG32
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE6_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE7_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE5_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE4_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE3_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE2_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE1_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE0_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	cmpl	%ebx, %eax
	je	LBB0_8
	jmp	LBB0_7
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r13), %edx
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_sdma_v5_0_get_reg_offset
	movl	%eax, %edi
	callq	_RREG32
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE7_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	%eax, %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE6_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE5_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE4_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE3_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE2_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE1_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_SDMA0_CLK_CTRL__SOFT_OVERRIDE0_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	cmpl	%ebx, %eax
	je	LBB0_8
LBB0_7:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r13), %edx
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_sdma_v5_0_get_reg_offset
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_WREG32
	jmp	LBB0_8
LBB0_9:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_CG_SUPPORT_SDMA_MGCG,4,2   ## @AMD_CG_SUPPORT_SDMA_MGCG
	.comm	_mmSDMA0_CLK_CTRL,4,2           ## @mmSDMA0_CLK_CTRL
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE7_MASK,4,2 ## @SDMA0_CLK_CTRL__SOFT_OVERRIDE7_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE6_MASK,4,2 ## @SDMA0_CLK_CTRL__SOFT_OVERRIDE6_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE5_MASK,4,2 ## @SDMA0_CLK_CTRL__SOFT_OVERRIDE5_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE4_MASK,4,2 ## @SDMA0_CLK_CTRL__SOFT_OVERRIDE4_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE3_MASK,4,2 ## @SDMA0_CLK_CTRL__SOFT_OVERRIDE3_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE2_MASK,4,2 ## @SDMA0_CLK_CTRL__SOFT_OVERRIDE2_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE1_MASK,4,2 ## @SDMA0_CLK_CTRL__SOFT_OVERRIDE1_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE0_MASK,4,2 ## @SDMA0_CLK_CTRL__SOFT_OVERRIDE0_MASK
	.no_dead_strip	_sdma_v5_0_update_medium_grain_clock_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdma_v5_0_update_medium_grain_clock_gating
_sdma_v5_0_update_medium_grain_clock_gating: ; @sdma_v5_0_update_medium_grain_clock_gating
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0, #4]
	cmp	w8, #1
	b.lt	LBB0_8
; %bb.1:
	mov	x19, x1
	mov	x20, x0
	mov	w21, #0
Lloh0:
	adrp	x23, _mmSDMA0_CLK_CTRL@GOTPAGE
Lloh1:
	ldr	x23, [x23, _mmSDMA0_CLK_CTRL@GOTPAGEOFF]
Lloh2:
	adrp	x27, _SDMA0_CLK_CTRL__SOFT_OVERRIDE4_MASK@GOTPAGE
Lloh3:
	ldr	x27, [x27, _SDMA0_CLK_CTRL__SOFT_OVERRIDE4_MASK@GOTPAGEOFF]
Lloh4:
	adrp	x28, _SDMA0_CLK_CTRL__SOFT_OVERRIDE3_MASK@GOTPAGE
Lloh5:
	ldr	x28, [x28, _SDMA0_CLK_CTRL__SOFT_OVERRIDE3_MASK@GOTPAGEOFF]
Lloh6:
	adrp	x24, _SDMA0_CLK_CTRL__SOFT_OVERRIDE2_MASK@GOTPAGE
Lloh7:
	ldr	x24, [x24, _SDMA0_CLK_CTRL__SOFT_OVERRIDE2_MASK@GOTPAGEOFF]
Lloh8:
	adrp	x25, _SDMA0_CLK_CTRL__SOFT_OVERRIDE1_MASK@GOTPAGE
Lloh9:
	ldr	x25, [x25, _SDMA0_CLK_CTRL__SOFT_OVERRIDE1_MASK@GOTPAGEOFF]
Lloh10:
	adrp	x26, _SDMA0_CLK_CTRL__SOFT_OVERRIDE0_MASK@GOTPAGE
Lloh11:
	ldr	x26, [x26, _SDMA0_CLK_CTRL__SOFT_OVERRIDE0_MASK@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	w21, w21, #1
	ldr	w8, [x20, #4]
	cmp	w21, w8
	b.ge	LBB0_8
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	cbz	w19, LBB0_6
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w8, [x20]
Lloh12:
	adrp	x9, _AMD_CG_SUPPORT_SDMA_MGCG@GOTPAGE
Lloh13:
	ldr	x9, [x9, _AMD_CG_SUPPORT_SDMA_MGCG@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w2, [x23]
	mov	x0, x20
	mov	x1, x21
	bl	_sdma_v5_0_get_reg_offset
	bl	_RREG32
Lloh15:
	adrp	x8, _SDMA0_CLK_CTRL__SOFT_OVERRIDE7_MASK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _SDMA0_CLK_CTRL__SOFT_OVERRIDE7_MASK@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
Lloh18:
	adrp	x9, _SDMA0_CLK_CTRL__SOFT_OVERRIDE6_MASK@GOTPAGE
Lloh19:
	ldr	x9, [x9, _SDMA0_CLK_CTRL__SOFT_OVERRIDE6_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh21:
	adrp	x9, _SDMA0_CLK_CTRL__SOFT_OVERRIDE5_MASK@GOTPAGE
Lloh22:
	ldr	x9, [x9, _SDMA0_CLK_CTRL__SOFT_OVERRIDE5_MASK@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [x27]
	orr	w8, w8, w9
	ldr	w9, [x28]
	orr	w8, w8, w9
	ldr	w9, [x24]
	orr	w8, w8, w9
	ldr	w9, [x25]
	orr	w8, w8, w9
	ldr	w9, [x26]
	orr	w8, w8, w9
	bic	w22, w0, w8
	cmp	w0, w22
	b.eq	LBB0_2
	b	LBB0_7
LBB0_6:                                 ;   in Loop: Header=BB0_3 Depth=1
	ldr	w2, [x23]
	mov	x0, x20
	mov	x1, x21
	bl	_sdma_v5_0_get_reg_offset
	bl	_RREG32
Lloh24:
	adrp	x8, _SDMA0_CLK_CTRL__SOFT_OVERRIDE7_MASK@GOTPAGE
Lloh25:
	ldr	x8, [x8, _SDMA0_CLK_CTRL__SOFT_OVERRIDE7_MASK@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
Lloh27:
	adrp	x9, _SDMA0_CLK_CTRL__SOFT_OVERRIDE6_MASK@GOTPAGE
Lloh28:
	ldr	x9, [x9, _SDMA0_CLK_CTRL__SOFT_OVERRIDE6_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
Lloh30:
	adrp	x10, _SDMA0_CLK_CTRL__SOFT_OVERRIDE5_MASK@GOTPAGE
Lloh31:
	ldr	x10, [x10, _SDMA0_CLK_CTRL__SOFT_OVERRIDE5_MASK@GOTPAGEOFF]
Lloh32:
	ldr	w10, [x10]
	ldr	w11, [x27]
	ldr	w12, [x28]
	ldr	w13, [x24]
	ldr	w14, [x25]
	ldr	w15, [x26]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w8, w8, w11
	orr	w8, w8, w12
	orr	w8, w8, w13
	orr	w8, w8, w14
	orr	w22, w8, w15
	cmp	w0, w22
	b.eq	LBB0_2
LBB0_7:                                 ;   in Loop: Header=BB0_3 Depth=1
	ldr	w2, [x23]
	mov	x0, x20
	mov	x1, x21
	bl	_sdma_v5_0_get_reg_offset
	mov	x1, x22
	bl	_WREG32
	b	LBB0_2
LBB0_8:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_CG_SUPPORT_SDMA_MGCG,4,2   ; @AMD_CG_SUPPORT_SDMA_MGCG
	.comm	_mmSDMA0_CLK_CTRL,4,2           ; @mmSDMA0_CLK_CTRL
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE7_MASK,4,2 ; @SDMA0_CLK_CTRL__SOFT_OVERRIDE7_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE6_MASK,4,2 ; @SDMA0_CLK_CTRL__SOFT_OVERRIDE6_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE5_MASK,4,2 ; @SDMA0_CLK_CTRL__SOFT_OVERRIDE5_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE4_MASK,4,2 ; @SDMA0_CLK_CTRL__SOFT_OVERRIDE4_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE3_MASK,4,2 ; @SDMA0_CLK_CTRL__SOFT_OVERRIDE3_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE2_MASK,4,2 ; @SDMA0_CLK_CTRL__SOFT_OVERRIDE2_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE1_MASK,4,2 ; @SDMA0_CLK_CTRL__SOFT_OVERRIDE1_MASK
	.comm	_SDMA0_CLK_CTRL__SOFT_OVERRIDE0_MASK,4,2 ; @SDMA0_CLK_CTRL__SOFT_OVERRIDE0_MASK
	.no_dead_strip	_sdma_v5_0_update_medium_grain_clock_gating
.subsections_via_symbols
