	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function stm32_adc_set_trig
_stm32_adc_set_trig:                    ## @stm32_adc_set_trig
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %rbx
	callq	_iio_priv
	movq	%rax, %r15
	xorl	%r14d, %r14d
	testq	%r12, %r12
	je	LBB0_1
## %bb.2:
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_stm32_adc_get_trig_extsel
	movl	%eax, %r13d
	testl	%eax, %eax
	js	LBB0_3
## %bb.4:
	movq	_STM32_EXTEN_HWTRIG_RISING_EDGE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	addl	(%r15), %ebx
	jmp	LBB0_5
LBB0_1:
	movq	_STM32_EXTEN_SWTRIG@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	xorl	%r13d, %r13d
LBB0_5:
	movq	%r15, %r12
	addq	$4, %r12
	movq	%r12, %rdi
	callq	_spin_lock_irqsave
	movq	8(%r15), %rax
	movq	(%rax), %rax
	movl	8(%rax), %esi
	movq	%r15, %rdi
	callq	_stm32_adc_readl
	movq	8(%r15), %rcx
	movq	(%rcx), %rdx
	movl	12(%rdx), %esi
	orl	(%rdx), %esi
	notl	%esi
	movb	4(%rdx), %cl
	shll	%cl, %ebx
	movb	16(%rdx), %cl
	shll	%cl, %r13d
	andl	%eax, %esi
	orl	%esi, %ebx
	orl	%ebx, %r13d
	movl	8(%rdx), %esi
	movq	%r15, %rdi
	movl	%r13d, %edx
	callq	_stm32_adc_writel
	movq	%r12, %rdi
	callq	_spin_unlock_irqrestore
	jmp	LBB0_6
LBB0_3:
	movl	%r13d, %r14d
LBB0_6:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_STM32_EXTEN_SWTRIG,4,2         ## @STM32_EXTEN_SWTRIG
	.comm	_STM32_EXTEN_HWTRIG_RISING_EDGE,4,2 ## @STM32_EXTEN_HWTRIG_RISING_EDGE
	.no_dead_strip	_stm32_adc_set_trig
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function stm32_adc_set_trig
_stm32_adc_set_trig:                    ; @stm32_adc_set_trig
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x21, x0
	bl	_iio_priv
	mov	x19, x0
	cbz	x20, LBB0_3
; %bb.1:
	mov	x0, x21
	mov	x1, x20
	bl	_stm32_adc_get_trig_extsel
	mov	x20, x0
	tbnz	w0, #31, LBB0_5
; %bb.2:
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _STM32_EXTEN_HWTRIG_RISING_EDGE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _STM32_EXTEN_HWTRIG_RISING_EDGE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	add	w22, w9, w8
	b	LBB0_4
LBB0_3:
Lloh3:
	adrp	x8, _STM32_EXTEN_SWTRIG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _STM32_EXTEN_SWTRIG@GOTPAGEOFF]
Lloh5:
	ldr	w22, [x8]
LBB0_4:
	add	x21, x19, #4
	mov	x0, x21
	bl	_spin_lock_irqsave
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	ldr	w1, [x8, #8]
	mov	x0, x19
	bl	_stm32_adc_readl
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	ldp	w9, w10, [x8]
	ldp	w1, w11, [x8, #8]
	orr	w9, w11, w9
	bic	w9, w0, w9
	lsl	w10, w22, w10
	orr	w9, w9, w10
	ldr	w8, [x8, #16]
	lsl	w8, w20, w8
	orr	w2, w9, w8
	mov	x0, x19
	bl	_stm32_adc_writel
	mov	x0, x21
	bl	_spin_unlock_irqrestore
	mov	w20, #0
LBB0_5:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_STM32_EXTEN_SWTRIG,4,2         ; @STM32_EXTEN_SWTRIG
	.comm	_STM32_EXTEN_HWTRIG_RISING_EDGE,4,2 ; @STM32_EXTEN_HWTRIG_RISING_EDGE
	.no_dead_strip	_stm32_adc_set_trig
.subsections_via_symbols
