	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_dmcu_set_psr_enable
_dce_dmcu_set_psr_enable:               ## @dce_dmcu_set_psr_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r15d
	movl	%esi, %r14d
	movq	%rdi, %r12
	callq	_TO_DCE_DMCU
	movq	$0, -48(%rbp)
	movq	_MASTER_COMM_CNTL_REG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movq	_MASTER_COMM_INTERRUPT@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	xorl	%edx, %edx
	movl	$100, %ecx
	movl	$801, %r8d                      ## imm = 0x321
	callq	_REG_WAIT
	movq	_MASTER_COMM_CMD_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MASTER_COMM_CMD_REG_BYTE0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	testl	%r14d, %r14d
	jne	LBB0_1
## %bb.2:
	movq	_PSR_EXIT@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_PSR_ENABLE@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %edx
	callq	_REG_UPDATE
	movl	(%rbx), %edi
	movl	(%r13), %esi
	movl	$1, %edx
	callq	_REG_UPDATE
	cmpl	$1, %r15d
	jne	LBB0_9
## %bb.4:
	movl	$101, %ebx
	leaq	-48(%rbp), %r15
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_5 Depth=1
	testq	%rax, %rax
	je	LBB0_9
LBB0_8:                                 ##   in Loop: Header=BB0_5 Depth=1
	movl	$10, %edi
	callq	_udelay
	decl	%ebx
	je	LBB0_9
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	_dce_get_dmcu_psr_state
	movq	-48(%rbp), %rax
	testl	%r14d, %r14d
	je	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	testq	%rax, %rax
	je	LBB0_8
LBB0_9:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MASTER_COMM_CNTL_REG,4,2       ## @MASTER_COMM_CNTL_REG
	.comm	_MASTER_COMM_INTERRUPT,4,2      ## @MASTER_COMM_INTERRUPT
	.comm	_MASTER_COMM_CMD_REG,4,2        ## @MASTER_COMM_CMD_REG
	.comm	_MASTER_COMM_CMD_REG_BYTE0,4,2  ## @MASTER_COMM_CMD_REG_BYTE0
	.comm	_PSR_ENABLE,4,2                 ## @PSR_ENABLE
	.comm	_PSR_EXIT,4,2                   ## @PSR_EXIT
	.no_dead_strip	_dce_dmcu_set_psr_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_dmcu_set_psr_enable
_dce_dmcu_set_psr_enable:               ; @dce_dmcu_set_psr_enable
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x19, x1
	mov	x20, x0
	bl	_TO_DCE_DMCU
	str	xzr, [sp, #8]
Lloh0:
	adrp	x22, _MASTER_COMM_CNTL_REG@GOTPAGE
Lloh1:
	ldr	x22, [x22, _MASTER_COMM_CNTL_REG@GOTPAGEOFF]
	ldr	w0, [x22]
Lloh2:
	adrp	x23, _MASTER_COMM_INTERRUPT@GOTPAGE
Lloh3:
	ldr	x23, [x23, _MASTER_COMM_INTERRUPT@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	w2, #0
	mov	w3, #100
	mov	w4, #801
	bl	_REG_WAIT
Lloh4:
	adrp	x8, _MASTER_COMM_CMD_REG@GOTPAGE
Lloh5:
	ldr	x8, [x8, _MASTER_COMM_CMD_REG@GOTPAGEOFF]
Lloh6:
	ldr	w0, [x8]
Lloh7:
	adrp	x8, _MASTER_COMM_CMD_REG_BYTE0@GOTPAGE
Lloh8:
	ldr	x8, [x8, _MASTER_COMM_CMD_REG_BYTE0@GOTPAGEOFF]
Lloh9:
	adrp	x9, _PSR_EXIT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _PSR_EXIT@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
Lloh12:
	adrp	x8, _PSR_ENABLE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PSR_ENABLE@GOTPAGEOFF]
	cmp	w19, #0
	csel	x8, x9, x8, eq
	ldr	w2, [x8]
	bl	_REG_UPDATE
	ldr	w0, [x22]
	ldr	w1, [x23]
	mov	w2, #1
	bl	_REG_UPDATE
	cmp	w21, #1
	b.ne	LBB0_6
; %bb.1:
	mov	w21, #101
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	cbz	x8, LBB0_6
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	mov	w0, #10
	bl	_udelay
	subs	w21, w21, #1
	b.eq	LBB0_6
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	add	x1, sp, #8
	mov	x0, x20
	bl	_dce_get_dmcu_psr_state
	ldr	x8, [sp, #8]
	cbz	w19, LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	cbz	x8, LBB0_3
LBB0_6:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh11
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MASTER_COMM_CNTL_REG,4,2       ; @MASTER_COMM_CNTL_REG
	.comm	_MASTER_COMM_INTERRUPT,4,2      ; @MASTER_COMM_INTERRUPT
	.comm	_MASTER_COMM_CMD_REG,4,2        ; @MASTER_COMM_CMD_REG
	.comm	_MASTER_COMM_CMD_REG_BYTE0,4,2  ; @MASTER_COMM_CMD_REG_BYTE0
	.comm	_PSR_ENABLE,4,2                 ; @PSR_ENABLE
	.comm	_PSR_EXIT,4,2                   ; @PSR_EXIT
	.no_dead_strip	_dce_dmcu_set_psr_enable
.subsections_via_symbols
