	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v8_0_enable_gfx_static_mg_power_gating
_gfx_v8_0_enable_gfx_static_mg_power_gating: ## @gfx_v8_0_enable_gfx_static_mg_power_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movl	%esi, %ebx
	movq	(%rdi), %rax
	movq	_CHIP_POLARIS11@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_3
## %bb.1:
	movq	_CHIP_POLARIS12@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_3
## %bb.2:
	movq	_CHIP_VEGAM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
LBB0_3:
	movq	8(%rdi), %rax
	cmpq	$0, (%rax)
	je	LBB0_5
## %bb.4:
	movq	_AMD_IP_BLOCK_TYPE_GFX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edx
	callq	_amdgpu_dpm_set_powergating_by_smu
LBB0_5:
	movq	_RLC_PG_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_STATIC_PER_CU_PG_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	testl	%ebx, %ebx
	setne	%dl
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_WREG32_FIELD                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_POLARIS11,8,3             ## @CHIP_POLARIS11
	.comm	_CHIP_POLARIS12,8,3             ## @CHIP_POLARIS12
	.comm	_CHIP_VEGAM,8,3                 ## @CHIP_VEGAM
	.comm	_AMD_IP_BLOCK_TYPE_GFX,4,2      ## @AMD_IP_BLOCK_TYPE_GFX
	.comm	_RLC_PG_CNTL,4,2                ## @RLC_PG_CNTL
	.comm	_STATIC_PER_CU_PG_ENABLE,4,2    ## @STATIC_PER_CU_PG_ENABLE
	.no_dead_strip	_gfx_v8_0_enable_gfx_static_mg_power_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v8_0_enable_gfx_static_mg_power_gating
_gfx_v8_0_enable_gfx_static_mg_power_gating: ; @gfx_v8_0_enable_gfx_static_mg_power_gating
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _CHIP_POLARIS11@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_POLARIS11@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
Lloh3:
	adrp	x10, _CHIP_POLARIS12@GOTPAGE
Lloh4:
	ldr	x10, [x10, _CHIP_POLARIS12@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
Lloh6:
	adrp	x11, _CHIP_VEGAM@GOTPAGE
Lloh7:
	ldr	x11, [x11, _CHIP_VEGAM@GOTPAGEOFF]
Lloh8:
	ldr	x11, [x11]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	ccmp	x8, x11, #4, ne
	b.ne	LBB0_3
; %bb.1:
	ldr	x8, [x0, #8]
	ldr	x8, [x8]
	cbz	x8, LBB0_3
; %bb.2:
Lloh9:
	adrp	x8, _AMD_IP_BLOCK_TYPE_GFX@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AMD_IP_BLOCK_TYPE_GFX@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x2, x19
	bl	_amdgpu_dpm_set_powergating_by_smu
LBB0_3:
Lloh12:
	adrp	x8, _RLC_PG_CNTL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RLC_PG_CNTL@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
Lloh15:
	adrp	x8, _STATIC_PER_CU_PG_ENABLE@GOTPAGE
Lloh16:
	ldr	x8, [x8, _STATIC_PER_CU_PG_ENABLE@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	cmp	w19, #0
	cset	w2, ne
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_WREG32_FIELD
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_POLARIS11,8,3             ; @CHIP_POLARIS11
	.comm	_CHIP_POLARIS12,8,3             ; @CHIP_POLARIS12
	.comm	_CHIP_VEGAM,8,3                 ; @CHIP_VEGAM
	.comm	_AMD_IP_BLOCK_TYPE_GFX,4,2      ; @AMD_IP_BLOCK_TYPE_GFX
	.comm	_RLC_PG_CNTL,4,2                ; @RLC_PG_CNTL
	.comm	_STATIC_PER_CU_PG_ENABLE,4,2    ; @STATIC_PER_CU_PG_ENABLE
	.no_dead_strip	_gfx_v8_0_enable_gfx_static_mg_power_gating
.subsections_via_symbols
