	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function xadc_zynq_setup
_xadc_zynq_setup:                       ## @xadc_zynq_setup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rdi
	callq	_iio_priv
	movq	%rax, %r12
	movq	_XADC_ZYNQ_IGAP_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_XADC_ZYNQ_TCK_RATE_MAX@GOTPCREL(%rip), %r13
	movl	(%r13), %ebx
	movl	$-1, (%r12)
	movl	4(%r12), %edi
	callq	_clk_get_rate
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	%rax, %r14
	movq	_XADC_ZYNQ_PCAP_RATE_MAX@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	cmpq	%rsi, %r14
	jbe	LBB0_4
## %bb.3:
	movl	4(%r12), %edi
	callq	_clk_set_rate
	testl	%eax, %eax
	jne	LBB0_20
LBB0_4:
	movq	%r14, %rax
	shrq	%rax
	movq	_XADC_ZYNQ_CFG_TCKRATE_DIV2@GOTPCREL(%rip), %rsi
	cmpq	%rax, %rbx
	ja	LBB0_17
## %bb.5:
	movq	%r14, %rdi
	shrq	$32, %rdi
	je	LBB0_6
## %bb.7:
	movq	%r14, %rax
	xorl	%edx, %edx
	divq	%rbx
	movq	%rax, %rcx
	jmp	LBB0_8
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_20
LBB0_6:
	movl	%r14d, %eax
	xorl	%edx, %edx
	divl	%ebx
	movl	%eax, %ecx
LBB0_8:
	movl	%ecx, %ebx
	testq	%rdi, %rdi
	je	LBB0_9
## %bb.10:
	movq	%r14, %rax
	xorl	%edx, %edx
	divq	%rbx
	jmp	LBB0_11
LBB0_9:
	movl	%r14d, %eax
	xorl	%edx, %edx
	divl	%ebx
                                        ## kill: def $eax killed $eax def $rax
LBB0_11:
	cmpq	%rax, (%r13)
	adcl	$0, %ecx
	cmpl	$4, %ecx
	jb	LBB0_17
## %bb.12:
	cmpl	$8, %ecx
	jae	LBB0_14
## %bb.13:
	movq	_XADC_ZYNQ_CFG_TCKRATE_DIV4@GOTPCREL(%rip), %rsi
	jmp	LBB0_17
LBB0_14:
	cmpl	$16, %ecx
	jae	LBB0_15
## %bb.16:
	movq	_XADC_ZYNQ_CFG_TCKRATE_DIV8@GOTPCREL(%rip), %rsi
	jmp	LBB0_17
LBB0_15:
	movq	_XADC_ZYNQ_CFG_TCKRATE_DIV16@GOTPCREL(%rip), %rsi
LBB0_17:
	movl	(%rsi), %ebx
	movq	_XADC_ZYNQ_REG_CTL@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	_XADC_ZYNQ_CTL_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_xadc_write_reg
	movl	(%r13), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_xadc_write_reg
	movq	_XADC_ZYNQ_REG_INTSTS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movl	$-1, %edx
	callq	_xadc_write_reg
	movq	_XADC_ZYNQ_REG_INTMSK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r12), %edx
	movq	%r12, %rdi
	callq	_xadc_write_reg
	movq	_XADC_ZYNQ_REG_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_XADC_ZYNQ_CFG_ENABLE@GOTPCREL(%rip), %rax
	movq	_XADC_ZYNQ_CFG_REDGE@GOTPCREL(%rip), %rcx
	movq	_XADC_ZYNQ_CFG_WEDGE@GOTPCREL(%rip), %rdx
	orl	(%rax), %ebx
	orl	(%rcx), %ebx
	orl	(%rdx), %ebx
	movl	%r15d, %edi
	callq	_XADC_ZYNQ_CFG_IGAP
	orl	%eax, %ebx
	movq	%r12, %rdi
	movl	%r13d, %esi
	movl	%ebx, %edx
	callq	_xadc_write_reg
	movq	_XADC_ZYNQ_PCAP_RATE_MAX@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r14
	jbe	LBB0_19
## %bb.18:
	movl	4(%r12), %edi
	movq	%r14, %rsi
	callq	_clk_set_rate
	testl	%eax, %eax
	jne	LBB0_20
LBB0_19:
	xorl	%eax, %eax
LBB0_20:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_XADC_ZYNQ_IGAP_DEFAULT,4,2     ## @XADC_ZYNQ_IGAP_DEFAULT
	.comm	_XADC_ZYNQ_TCK_RATE_MAX,8,3     ## @XADC_ZYNQ_TCK_RATE_MAX
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_XADC_ZYNQ_PCAP_RATE_MAX,8,3    ## @XADC_ZYNQ_PCAP_RATE_MAX
	.comm	_XADC_ZYNQ_CFG_TCKRATE_DIV2,4,2 ## @XADC_ZYNQ_CFG_TCKRATE_DIV2
	.comm	_XADC_ZYNQ_CFG_TCKRATE_DIV4,4,2 ## @XADC_ZYNQ_CFG_TCKRATE_DIV4
	.comm	_XADC_ZYNQ_CFG_TCKRATE_DIV8,4,2 ## @XADC_ZYNQ_CFG_TCKRATE_DIV8
	.comm	_XADC_ZYNQ_CFG_TCKRATE_DIV16,4,2 ## @XADC_ZYNQ_CFG_TCKRATE_DIV16
	.comm	_XADC_ZYNQ_REG_CTL,4,2          ## @XADC_ZYNQ_REG_CTL
	.comm	_XADC_ZYNQ_CTL_RESET,4,2        ## @XADC_ZYNQ_CTL_RESET
	.comm	_XADC_ZYNQ_REG_INTSTS,4,2       ## @XADC_ZYNQ_REG_INTSTS
	.comm	_XADC_ZYNQ_REG_INTMSK,4,2       ## @XADC_ZYNQ_REG_INTMSK
	.comm	_XADC_ZYNQ_REG_CFG,4,2          ## @XADC_ZYNQ_REG_CFG
	.comm	_XADC_ZYNQ_CFG_ENABLE,4,2       ## @XADC_ZYNQ_CFG_ENABLE
	.comm	_XADC_ZYNQ_CFG_REDGE,4,2        ## @XADC_ZYNQ_CFG_REDGE
	.comm	_XADC_ZYNQ_CFG_WEDGE,4,2        ## @XADC_ZYNQ_CFG_WEDGE
	.no_dead_strip	_xadc_zynq_setup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function xadc_zynq_setup
_xadc_zynq_setup:                       ; @xadc_zynq_setup
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x0, x1
	bl	_iio_priv
	mov	x19, x0
Lloh0:
	adrp	x8, _XADC_ZYNQ_IGAP_DEFAULT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _XADC_ZYNQ_IGAP_DEFAULT@GOTPAGEOFF]
Lloh2:
	ldr	w21, [x8]
Lloh3:
	adrp	x22, _XADC_ZYNQ_TCK_RATE_MAX@GOTPAGE
Lloh4:
	ldr	x22, [x22, _XADC_ZYNQ_TCK_RATE_MAX@GOTPAGEOFF]
	ldr	w24, [x22]
	mov	w8, #-1
	str	w8, [x0]
	ldr	w0, [x0, #4]
	bl	_clk_get_rate
	cbz	x0, LBB0_9
; %bb.1:
	mov	x20, x0
Lloh5:
	adrp	x23, _XADC_ZYNQ_PCAP_RATE_MAX@GOTPAGE
Lloh6:
	ldr	x23, [x23, _XADC_ZYNQ_PCAP_RATE_MAX@GOTPAGEOFF]
	ldr	x1, [x23]
	cmp	x0, x1
	b.ls	LBB0_3
; %bb.2:
	ldr	w0, [x19, #4]
	bl	_clk_set_rate
	cbnz	w0, LBB0_10
LBB0_3:
	cmp	x24, x20, lsr #1
	b.hi	LBB0_5
; %bb.4:
	udiv	x8, x20, x24
	and	x9, x8, #0xffffffff
	udiv	x9, x20, x9
	ldr	x10, [x22]
	cmp	x9, x10
	cinc	w8, w8, hi
	cmp	w8, #4
	b.hs	LBB0_11
LBB0_5:
Lloh7:
	adrp	x8, _XADC_ZYNQ_CFG_TCKRATE_DIV2@GOTPAGE
Lloh8:
	ldr	x8, [x8, _XADC_ZYNQ_CFG_TCKRATE_DIV2@GOTPAGEOFF]
LBB0_6:
	ldr	w24, [x8]
Lloh9:
	adrp	x22, _XADC_ZYNQ_REG_CTL@GOTPAGE
Lloh10:
	ldr	x22, [x22, _XADC_ZYNQ_REG_CTL@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh11:
	adrp	x8, _XADC_ZYNQ_CTL_RESET@GOTPAGE
Lloh12:
	ldr	x8, [x8, _XADC_ZYNQ_CTL_RESET@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_xadc_write_reg
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #0
	bl	_xadc_write_reg
Lloh14:
	adrp	x8, _XADC_ZYNQ_REG_INTSTS@GOTPAGE
Lloh15:
	ldr	x8, [x8, _XADC_ZYNQ_REG_INTSTS@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #-1
	bl	_xadc_write_reg
Lloh17:
	adrp	x8, _XADC_ZYNQ_REG_INTMSK@GOTPAGE
Lloh18:
	ldr	x8, [x8, _XADC_ZYNQ_REG_INTMSK@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	ldr	w2, [x19]
	mov	x0, x19
	bl	_xadc_write_reg
Lloh20:
	adrp	x8, _XADC_ZYNQ_REG_CFG@GOTPAGE
Lloh21:
	ldr	x8, [x8, _XADC_ZYNQ_REG_CFG@GOTPAGEOFF]
Lloh22:
	ldr	w22, [x8]
Lloh23:
	adrp	x8, _XADC_ZYNQ_CFG_ENABLE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _XADC_ZYNQ_CFG_ENABLE@GOTPAGEOFF]
Lloh25:
	ldr	w25, [x8]
Lloh26:
	adrp	x8, _XADC_ZYNQ_CFG_REDGE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _XADC_ZYNQ_CFG_REDGE@GOTPAGEOFF]
Lloh28:
	ldr	w26, [x8]
Lloh29:
	adrp	x8, _XADC_ZYNQ_CFG_WEDGE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _XADC_ZYNQ_CFG_WEDGE@GOTPAGEOFF]
Lloh31:
	ldr	w27, [x8]
	mov	x0, x21
	bl	_XADC_ZYNQ_CFG_IGAP
	orr	w8, w25, w24
	orr	w8, w8, w26
	orr	w8, w8, w27
	orr	w2, w8, w0
	mov	x0, x19
	mov	x1, x22
	bl	_xadc_write_reg
	ldr	x8, [x23]
	cmp	x20, x8
	b.ls	LBB0_8
; %bb.7:
	ldr	w0, [x19, #4]
	mov	x1, x20
	bl	_clk_set_rate
	cbnz	w0, LBB0_10
LBB0_8:
	mov	w0, #0
	b	LBB0_10
LBB0_9:
Lloh32:
	adrp	x8, _EINVAL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_10:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_11:
	cmp	w8, #8
	b.hs	LBB0_13
; %bb.12:
Lloh35:
	adrp	x8, _XADC_ZYNQ_CFG_TCKRATE_DIV4@GOTPAGE
Lloh36:
	ldr	x8, [x8, _XADC_ZYNQ_CFG_TCKRATE_DIV4@GOTPAGEOFF]
	b	LBB0_6
LBB0_13:
Lloh37:
	adrp	x9, _XADC_ZYNQ_CFG_TCKRATE_DIV16@GOTPAGE
Lloh38:
	ldr	x9, [x9, _XADC_ZYNQ_CFG_TCKRATE_DIV16@GOTPAGEOFF]
Lloh39:
	adrp	x10, _XADC_ZYNQ_CFG_TCKRATE_DIV8@GOTPAGE
Lloh40:
	ldr	x10, [x10, _XADC_ZYNQ_CFG_TCKRATE_DIV8@GOTPAGEOFF]
	cmp	w8, #16
	csel	x8, x10, x9, lo
	b	LBB0_6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh37, Lloh38
	.cfi_endproc
                                        ; -- End function
	.comm	_XADC_ZYNQ_IGAP_DEFAULT,4,2     ; @XADC_ZYNQ_IGAP_DEFAULT
	.comm	_XADC_ZYNQ_TCK_RATE_MAX,8,3     ; @XADC_ZYNQ_TCK_RATE_MAX
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_XADC_ZYNQ_PCAP_RATE_MAX,8,3    ; @XADC_ZYNQ_PCAP_RATE_MAX
	.comm	_XADC_ZYNQ_CFG_TCKRATE_DIV2,4,2 ; @XADC_ZYNQ_CFG_TCKRATE_DIV2
	.comm	_XADC_ZYNQ_CFG_TCKRATE_DIV4,4,2 ; @XADC_ZYNQ_CFG_TCKRATE_DIV4
	.comm	_XADC_ZYNQ_CFG_TCKRATE_DIV8,4,2 ; @XADC_ZYNQ_CFG_TCKRATE_DIV8
	.comm	_XADC_ZYNQ_CFG_TCKRATE_DIV16,4,2 ; @XADC_ZYNQ_CFG_TCKRATE_DIV16
	.comm	_XADC_ZYNQ_REG_CTL,4,2          ; @XADC_ZYNQ_REG_CTL
	.comm	_XADC_ZYNQ_CTL_RESET,4,2        ; @XADC_ZYNQ_CTL_RESET
	.comm	_XADC_ZYNQ_REG_INTSTS,4,2       ; @XADC_ZYNQ_REG_INTSTS
	.comm	_XADC_ZYNQ_REG_INTMSK,4,2       ; @XADC_ZYNQ_REG_INTMSK
	.comm	_XADC_ZYNQ_REG_CFG,4,2          ; @XADC_ZYNQ_REG_CFG
	.comm	_XADC_ZYNQ_CFG_ENABLE,4,2       ; @XADC_ZYNQ_CFG_ENABLE
	.comm	_XADC_ZYNQ_CFG_REDGE,4,2        ; @XADC_ZYNQ_CFG_REDGE
	.comm	_XADC_ZYNQ_CFG_WEDGE,4,2        ; @XADC_ZYNQ_CFG_WEDGE
	.no_dead_strip	_xadc_zynq_setup
.subsections_via_symbols
