	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_ttm_fw_reserve_vram_init
_amdgpu_ttm_fw_reserve_vram_init:       ## @amdgpu_ttm_fw_reserve_vram_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	$0, -64(%rbp)
	movq	32(%rdi), %r12
	movq	(%rdi), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	8(%rdi), %r13
	leaq	-104(%rbp), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	movl	$40, %edx
	callq	_memset
	movq	8(%rbx), %rax
	movq	%rax, -104(%rbp)
	movq	_PAGE_SIZE@GOTPCREL(%rip), %r14
	movl	(%r14), %ecx
	movl	%ecx, -72(%rbp)
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, -76(%rbp)
	movq	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPCREL(%rip), %rcx
	movq	_AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movl	%edx, -96(%rbp)
	movq	_ttm_bo_type_kernel@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, -80(%rbp)
	movq	$0, -88(%rbp)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rbx)
	testq	%rax, %rax
	jle	LBB0_19
## %bb.1:
	cmpq	%r12, %rax
	jg	LBB0_19
## %bb.2:
	leaq	16(%rbx), %r12
	leaq	-104(%rbp), %rsi
	movq	%rbx, %rdi
	movq	%r12, %rdx
	callq	_amdgpu_bo_create
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_18
## %bb.3:
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	_amdgpu_bo_reserve
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.4:
	movq	%r12, -48(%rbp)                 ## 8-byte Spill
	movq	(%r12), %r15
	movl	(%r14), %esi
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	_ALIGN
	leaq	4(%r15), %r12
	movl	4(%r15), %r9d
	testl	%r9d, %r9d
	jle	LBB0_11
## %bb.5:
	movq	8(%r15), %r8
	addq	%rax, %r13
	cmpl	$1, %r9d
	jne	LBB0_7
## %bb.6:
	xorl	%edi, %edi
	jmp	LBB0_9
LBB0_7:
	movl	%r9d, %r10d
	andl	$-2, %r10d
	leaq	24(%r8), %rdx
	xorl	%edi, %edi
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %r11
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movzbl	(%r11), %ecx
	movq	%rax, %rsi
	sarq	%cl, %rsi
	movq	%rsi, -16(%rdx)
	movzbl	(%r11), %ecx
	movq	%r13, %rsi
	sarq	%cl, %rsi
	movq	%rsi, -24(%rdx)
	movzbl	(%r11), %ecx
	movq	%rax, %rsi
	sarq	%cl, %rsi
	movq	%rsi, (%rdx)
	movzbl	(%r11), %ecx
	movq	%r13, %rsi
	sarq	%cl, %rsi
	movq	%rsi, -8(%rdx)
	addq	$2, %rdi
	addq	$32, %rdx
	cmpq	%rdi, %r10
	jne	LBB0_8
LBB0_9:
	testb	$1, %r9b
	je	LBB0_11
## %bb.10:
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rdx
	movb	(%rdx), %cl
	sarq	%cl, %rax
	shlq	$4, %rdi
	movq	%rax, 8(%r8,%rdi)
	movb	(%rdx), %cl
	sarq	%cl, %r13
	movq	%r13, (%r8,%rdi)
LBB0_11:
	movq	%r15, %rdi
	movq	%r15, %rsi
	callq	_ttm_bo_mem_put
	leaq	-64(%rbp), %rcx
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	callq	_ttm_bo_mem_space
	movl	%eax, %r15d
	testl	%eax, %eax
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	jne	LBB0_16
## %bb.12:
	movq	(%rbx), %rdx
	movq	16(%rbx), %rdi
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	8(%rbx), %rcx
	addq	%rdx, %rcx
	callq	_amdgpu_bo_pin_restricted
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_16
## %bb.13:
	addq	$24, %rbx
	movq	(%r12), %rdi
	movq	%rbx, %rsi
	callq	_amdgpu_bo_kmap
	movq	(%r12), %rdi
	testl	%eax, %eax
	je	LBB0_14
## %bb.15:
	movl	%eax, %r15d
	callq	_amdgpu_bo_unpin
LBB0_16:
	movq	(%r12), %rdi
	callq	_amdgpu_bo_unreserve
LBB0_17:
	movq	%r12, %rdi
	callq	_amdgpu_bo_unref
LBB0_18:
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%r12)
LBB0_19:
	movl	%r15d, %eax
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_14:
	callq	_amdgpu_bo_unreserve
	xorl	%r15d, %r15d
	jmp	LBB0_19
	.cfi_endproc
                                        ## -- End function
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ## @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,4,2 ## @AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
	.comm	_AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,4,2 ## @AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS
	.comm	_ttm_bo_type_kernel,4,2         ## @ttm_bo_type_kernel
	.comm	_PAGE_SHIFT,8,3                 ## @PAGE_SHIFT
	.no_dead_strip	_amdgpu_ttm_fw_reserve_vram_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_ttm_fw_reserve_vram_init
_amdgpu_ttm_fw_reserve_vram_init:       ; @amdgpu_ttm_fw_reserve_vram_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x0
	str	xzr, [sp, #40]
	ldr	x27, [x0, #32]
	ldp	x23, x25, [x0]
	mov	x0, sp
	mov	w1, #0
	mov	w2, #40
	bl	_memset
	mov	w22, #0
	ldr	x8, [x20, #8]
	str	x8, [sp]
Lloh0:
	adrp	x26, _PAGE_SIZE@GOTPAGE
Lloh1:
	ldr	x26, [x26, _PAGE_SIZE@GOTPAGEOFF]
	ldr	w9, [x26]
	str	w9, [sp, #32]
Lloh2:
	adrp	x24, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGE
Lloh3:
	ldr	x24, [x24, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh4:
	adrp	x9, _AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPAGE
Lloh5:
	ldr	x9, [x9, _AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPAGEOFF]
Lloh6:
	adrp	x10, _AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS@GOTPAGE
Lloh7:
	ldr	x10, [x10, _AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
Lloh9:
	ldr	w10, [x10]
	orr	w9, w10, w9
	str	w9, [sp, #8]
Lloh10:
	adrp	x9, _ttm_bo_type_kernel@GOTPAGE
Lloh11:
	ldr	x9, [x9, _ttm_bo_type_kernel@GOTPAGEOFF]
	ldr	w10, [x24]
Lloh12:
	ldr	w9, [x9]
	stp	w9, w10, [sp, #24]
	str	xzr, [sp, #16]
	mov	x19, x20
	str	xzr, [x19, #16]!
	mov	x21, x19
	str	xzr, [x21, #8]!
	cmp	x8, #1
	b.lt	LBB0_18
; %bb.1:
	cmp	x8, x27
	b.gt	LBB0_18
; %bb.2:
	mov	x1, sp
	mov	x0, x20
	mov	x2, x19
	bl	_amdgpu_bo_create
	mov	x22, x0
	cbnz	w0, LBB0_17
; %bb.3:
	ldr	x0, [x19]
	mov	w1, #0
	bl	_amdgpu_bo_reserve
	mov	x22, x0
	cbnz	w0, LBB0_16
; %bb.4:
	ldr	x22, [x19]
	ldr	w1, [x26]
	mov	x0, x23
	bl	_ALIGN
	mov	x23, x22
	ldr	w10, [x23, #4]!
	cmp	w10, #1
	b.lt	LBB0_11
; %bb.5:
	ldr	x11, [x22, #8]
	add	x8, x0, x25
Lloh13:
	adrp	x9, _PAGE_SHIFT@GOTPAGE
Lloh14:
	ldr	x9, [x9, _PAGE_SHIFT@GOTPAGEOFF]
	cmp	w10, #4
	b.lo	LBB0_8
; %bb.6:
	add	x12, x9, #8
	cmp	x11, x12
	b.hs	LBB0_19
; %bb.7:
	add	x12, x11, x10, lsl #4
	cmp	x12, x9
	b.ls	LBB0_19
LBB0_8:
	mov	x12, #0
LBB0_9:
	add	x11, x11, x12, lsl #4
	add	x11, x11, #8
	sub	x10, x10, x12
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	ldr	x12, [x9]
	asr	x12, x0, x12
	str	x12, [x11]
	ldr	x12, [x9]
	asr	x12, x8, x12
	stur	x12, [x11, #-8]
	add	x11, x11, #16
	subs	x10, x10, #1
	b.ne	LBB0_10
LBB0_11:
	mov	x0, x22
	mov	x1, x22
	bl	_ttm_bo_mem_put
	add	x3, sp, #40
	mov	x0, x22
	mov	x1, x23
	mov	x2, x22
	bl	_ttm_bo_mem_space
	mov	x22, x0
	cbnz	w0, LBB0_15
; %bb.12:
	ldp	x8, x0, [x20, #8]
	ldr	w1, [x24]
	ldr	x2, [x20]
	add	x3, x8, x2
	bl	_amdgpu_bo_pin_restricted
	mov	x22, x0
	cbnz	w0, LBB0_15
; %bb.13:
	ldr	x0, [x19]
	mov	x1, x21
	bl	_amdgpu_bo_kmap
	mov	x22, x0
	ldr	x0, [x19]
	cbz	w22, LBB0_22
; %bb.14:
	bl	_amdgpu_bo_unpin
LBB0_15:
	ldr	x0, [x19]
	bl	_amdgpu_bo_unreserve
LBB0_16:
	mov	x0, x19
	bl	_amdgpu_bo_unref
LBB0_17:
	stp	xzr, xzr, [x19]
LBB0_18:
	mov	x0, x22
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
LBB0_19:
	and	x12, x10, #0xfffffffc
	add	x13, x11, #32
	mov	x14, x12
LBB0_20:                                ; =>This Inner Loop Header: Depth=1
	ldr	x15, [x9]
	asr	x16, x0, x15
	dup.2d	v1, x16
	asr	x15, x8, x15
	dup.2d	v0, x15
	sub	x15, x13, #32
	st2.2d	{ v0, v1 }, [x15]
	st2.2d	{ v0, v1 }, [x13]
	add	x13, x13, #64
	subs	x14, x14, #4
	b.ne	LBB0_20
; %bb.21:
	cmp	x12, x10
	b.eq	LBB0_11
	b	LBB0_9
LBB0_22:
	bl	_amdgpu_bo_unreserve
	b	LBB0_18
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh8
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ; @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,4,2 ; @AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
	.comm	_AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,4,2 ; @AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS
	.comm	_ttm_bo_type_kernel,4,2         ; @ttm_bo_type_kernel
	.comm	_PAGE_SHIFT,8,3                 ; @PAGE_SHIFT
	.no_dead_strip	_amdgpu_ttm_fw_reserve_vram_init
.subsections_via_symbols
