	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_ras_release_bad_pages
_amdgpu_ras_release_bad_pages:          ## @amdgpu_ras_release_bad_pages
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	callq	_amdgpu_ras_get_context
	testq	%rax, %rax
	je	LBB0_7
## %bb.1:
	movq	%rax, %rbx
	cmpq	$0, 8(%rax)
	je	LBB0_7
## %bb.2:
	movq	%rbx, %rdi
	callq	_mutex_lock
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movq	8(%rbx), %r13
	testq	%r13, %r13
	je	LBB0_6
## %bb.3:
	movl	(%r13), %r14d
	testl	%r14d, %r14d
	jle	LBB0_6
## %bb.4:
	movq	8(%r13), %rax
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	leaq	-1(%r14), %rbx
	movl	%ebx, %r15d
	movq	(%rax,%r15,8), %rax
	movq	%rax, -48(%rbp)
	movq	%r12, %rdi
	leaq	-48(%rbp), %rsi
	callq	_amdgpu_ras_release_vram
	movq	-48(%rbp), %rcx
	movq	8(%r13), %rax
	movq	%rcx, (%rax,%r15,8)
	movl	%ebx, (%r13)
	cmpq	$1, %r14
	movq	%rbx, %r14
	ja	LBB0_5
LBB0_6:
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	_mutex_unlock
LBB0_7:
	xorl	%eax, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_amdgpu_ras_release_bad_pages
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_ras_release_bad_pages
_amdgpu_ras_release_bad_pages:          ; @amdgpu_ras_release_bad_pages
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	bl	_amdgpu_ras_get_context
	cbz	x0, LBB0_7
; %bb.1:
	mov	x20, x0
	ldr	x8, [x0, #8]
	cbz	x8, LBB0_7
; %bb.2:
	mov	x0, x20
	bl	_mutex_lock
	ldr	x21, [x20, #8]
	cbz	x21, LBB0_6
; %bb.3:
	ldr	w22, [x21]
	cmp	w22, #1
	b.lt	LBB0_6
; %bb.4:
	ldr	x8, [x21, #8]
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	subs	x9, x22, #1
	and	x9, x9, #0xffffffff
	lsl	x23, x9, #3
	ldr	x8, [x8, x23]
	str	x8, [sp, #8]
	add	x1, sp, #8
	mov	x0, x19
	bl	_amdgpu_ras_release_vram
	ldr	x9, [sp, #8]
	ldr	x8, [x21, #8]
	str	x9, [x8, x23]
	subs	x22, x22, #1
	str	w22, [x21]
	b.hi	LBB0_5
LBB0_6:
	mov	x0, x20
	bl	_mutex_unlock
LBB0_7:
	mov	w0, #0
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_amdgpu_ras_release_bad_pages
.subsections_via_symbols
