	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_dma_prep_dma_cyclic
_tegra_dma_prep_dma_cyclic:             ## @tegra_dma_prep_dma_cyclic
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r9, %r13
	movl	%r8d, %r14d
	movq	%rcx, %r15
	movq	%rdx, %rbx
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	callq	_to_tegra_dma_chan
	movq	%rax, %r12
	testq	%rbx, %rbx
	je	LBB0_5
## %bb.1:
	testq	%r15, %r15
	je	LBB0_5
## %bb.2:
	cmpl	$0, 40(%r12)
	je	LBB0_6
## %bb.3:
	cmpq	$0, 32(%r12)
	je	LBB0_7
## %bb.4:
	movq	%r12, %rdi
	callq	_tdc2dev
	leaq	L_.str.2(%rip), %rsi
	jmp	LBB0_14
LBB0_5:
	movq	%r12, %rdi
	callq	_tdc2dev
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_14
LBB0_6:
	movq	%r12, %rdi
	callq	_tdc2dev
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_14
LBB0_7:
	movq	%rbx, %rax
	orq	%r15, %rax
	shrq	$32, %rax
	je	LBB0_10
## %bb.8:
	movq	%rbx, %rax
	xorl	%edx, %edx
	divq	%r15
	testq	%rdx, %rdx
	je	LBB0_11
LBB0_9:
	movq	%r12, %rdi
	callq	_tdc2dev
	leaq	L_.str.3(%rip), %rsi
	jmp	LBB0_14
LBB0_10:
	movl	%ebx, %eax
	xorl	%edx, %edx
	divl	%r15d
                                        ## kill: def $edx killed $edx def $rdx
	testq	%rdx, %rdx
	jne	LBB0_9
LBB0_11:
	movl	%r15d, %eax
	orl	-44(%rbp), %eax                 ## 4-byte Folded Reload
	testb	$3, %al
	jne	LBB0_13
## %bb.12:
	movq	24(%r12), %rax
	movq	(%rax), %rax
	cmpl	%r15d, (%rax)
	jge	LBB0_17
LBB0_13:
	movq	%r12, %rdi
	callq	_tdc2dev
	leaq	L_.str.4(%rip), %rsi
LBB0_14:
	movl	%eax, %edi
	callq	_dev_err
LBB0_15:
	xorl	%r14d, %r14d
LBB0_16:
	movq	%r14, %rax
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_17:
	leaq	-60(%rbp), %rax
	movq	%rax, (%rsp)
	leaq	-112(%rbp), %rdx
	leaq	-80(%rbp), %rcx
	leaq	-56(%rbp), %r8
	leaq	-64(%rbp), %r9
	movq	%r12, %rdi
	movl	%r14d, %esi
	callq	_get_transfer_param
	testq	%rax, %rax
	js	LBB0_15
## %bb.18:
	movq	_TEGRA_APBDMA_AHBSEQ_WRAP_NONE@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	_TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shlq	%cl, %rdi
	movq	(%r12), %rax
	movq	_TEGRA_APBDMA_SLAVE_ID_INVALID@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_20
## %bb.19:
	movq	_TEGRA_APBDMA_CSR_FLOW@GOTPCREL(%rip), %rdx
	movq	_TEGRA_APBDMA_CSR_REQ_SEL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	-56(%rbp), %rsi
	shlq	%cl, %rax
	orq	(%rdx), %rsi
	orq	%rsi, %rax
	movq	%rax, -56(%rbp)
LBB0_20:
	movq	_DMA_PREP_INTERRUPT@GOTPCREL(%rip), %rax
	testq	%r13, (%rax)
	je	LBB0_31
## %bb.21:
	movq	_TEGRA_APBDMA_AHBSEQ_INTR_ENB@GOTPCREL(%rip), %rax
	orq	(%rax), %rdi
	movq	_TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32@GOTPCREL(%rip), %rax
	orq	(%rax), %rdi
	movq	%rdi, -72(%rbp)                 ## 8-byte Spill
	movq	_TEGRA_APBDMA_CSR_IE_EOC@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	orq	%rax, -56(%rbp)
	movq	_TEGRA_APBDMA_APBSEQ_WRAP_WORD_1@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	orq	%rax, -80(%rbp)
	movq	%r12, %rdi
	callq	_tegra_dma_desc_get
	testq	%rax, %rax
	je	LBB0_32
## %bb.22:
	movq	%rax, %r14
	movq	%r13, -88(%rbp)                 ## 8-byte Spill
	leaq	16(%rax), %rdi
	movq	%rdi, -104(%rbp)                ## 8-byte Spill
	callq	_INIT_LIST_HEAD
	leaq	40(%r14), %rdi
	callq	_INIT_LIST_HEAD
	xorps	%xmm0, %xmm0
	movups	%xmm0, 24(%r14)
	movq	%rbx, (%r14)
	movslq	%r15d, %rax
	movq	%rax, -96(%rbp)                 ## 8-byte Spill
	negq	%rbx
LBB0_23:                                ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	callq	_tegra_dma_sg_req_get
	testq	%rax, %rax
	je	LBB0_33
## %bb.24:                              ##   in Loop: Header=BB0_23 Depth=1
	movq	%rax, %r13
	movl	-64(%rbp), %esi
	movl	-60(%rbp), %edx
	movq	%r12, %rdi
	movl	%r15d, %ecx
	callq	_get_burst_size
	orq	%rax, -72(%rbp)                 ## 8-byte Folded Spill
	movq	-112(%rbp), %rax
	leaq	24(%r13), %rsi
	movq	%rax, 24(%r13)
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, 32(%r13)
	movq	-56(%rbp), %rax
	movq	%rax, 40(%r13)
	movq	%r12, %rdi
	movl	%r15d, %edx
	callq	_tegra_dma_prep_wcount
	movq	-80(%rbp), %rax
	movq	%rax, 48(%r13)
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	movq	%rax, 56(%r13)
	movq	$0, (%r13)
	movq	%r14, 16(%r13)
	movl	%r15d, 8(%r13)
	movq	%r13, %rdi
	addq	$12, %rdi
	movq	-104(%rbp), %rsi                ## 8-byte Reload
	callq	_list_add_tail
	addl	%r15d, -44(%rbp)                ## 4-byte Folded Spill
	addq	-96(%rbp), %rbx                 ## 8-byte Folded Reload
	jne	LBB0_23
## %bb.25:
	movl	$1, 4(%r13)
	movq	_DMA_CTRL_ACK@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	testq	%rax, -88(%rbp)                 ## 8-byte Folded Reload
	je	LBB0_27
## %bb.26:
	movq	%rax, 8(%r14)
LBB0_27:
	cmpq	$0, 16(%r12)
	je	LBB0_35
## %bb.28:
	cmpl	$0, 8(%r12)
	jne	LBB0_36
## %bb.29:
	movq	%r12, %rdi
	callq	_tdc2dev
	leaq	L_.str.7(%rip), %rsi
	jmp	LBB0_34
LBB0_31:
	movl	$1, %edi
	callq	_WARN_ON_ONCE
	jmp	LBB0_15
LBB0_32:
	movq	%r12, %rdi
	callq	_tdc2dev
	leaq	L_.str.5(%rip), %rsi
	jmp	LBB0_14
LBB0_33:
	movq	%r12, %rdi
	callq	_tdc2dev
	leaq	L_.str.6(%rip), %rsi
LBB0_34:
	movl	%eax, %edi
	callq	_dev_err
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_tegra_dma_desc_put
	jmp	LBB0_15
LBB0_35:
	movq	_handle_cont_sngl_cycle_dma_done@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 16(%r12)
	movl	$1, 8(%r12)
LBB0_36:
	addq	$8, %r14
	jmp	LBB0_16
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Invalid buffer/period len\n"

L_.str.1:                               ## @.str.1
	.asciz	"DMA slave is not configured\n"

L_.str.2:                               ## @.str.2
	.asciz	"Request not allowed when DMA running\n"

L_.str.3:                               ## @.str.3
	.asciz	"buf_len is not multiple of period_len\n"

L_.str.4:                               ## @.str.4
	.asciz	"Req len/mem address is not correct\n"

	.comm	_TEGRA_APBDMA_AHBSEQ_INTR_ENB,8,3 ## @TEGRA_APBDMA_AHBSEQ_INTR_ENB
	.comm	_TEGRA_APBDMA_AHBSEQ_WRAP_NONE,8,3 ## @TEGRA_APBDMA_AHBSEQ_WRAP_NONE
	.comm	_TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT,8,3 ## @TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT
	.comm	_TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32,8,3 ## @TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32
	.comm	_TEGRA_APBDMA_SLAVE_ID_INVALID,8,3 ## @TEGRA_APBDMA_SLAVE_ID_INVALID
	.comm	_TEGRA_APBDMA_CSR_FLOW,8,3      ## @TEGRA_APBDMA_CSR_FLOW
	.comm	_TEGRA_APBDMA_CSR_REQ_SEL_SHIFT,8,3 ## @TEGRA_APBDMA_CSR_REQ_SEL_SHIFT
	.comm	_DMA_PREP_INTERRUPT,8,3         ## @DMA_PREP_INTERRUPT
	.comm	_TEGRA_APBDMA_CSR_IE_EOC,8,3    ## @TEGRA_APBDMA_CSR_IE_EOC
	.comm	_TEGRA_APBDMA_APBSEQ_WRAP_WORD_1,8,3 ## @TEGRA_APBDMA_APBSEQ_WRAP_WORD_1
L_.str.5:                               ## @.str.5
	.asciz	"not enough descriptors available\n"

L_.str.6:                               ## @.str.6
	.asciz	"DMA sg-req not available\n"

	.comm	_DMA_CTRL_ACK,8,3               ## @DMA_CTRL_ACK
	.comm	_handle_cont_sngl_cycle_dma_done,8,3 ## @handle_cont_sngl_cycle_dma_done
L_.str.7:                               ## @.str.7
	.asciz	"DMA configuration conflict\n"

	.no_dead_strip	_tegra_dma_prep_dma_cyclic
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_dma_prep_dma_cyclic
_tegra_dma_prep_dma_cyclic:             ; @tegra_dma_prep_dma_cyclic
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x5
	mov	x23, x4
	mov	x21, x3
	mov	x24, x2
	mov	x22, x1
	bl	_to_tegra_dma_chan
	mov	x19, x0
	cbz	x24, LBB0_5
; %bb.1:
	cbz	x21, LBB0_5
; %bb.2:
	ldr	w8, [x19, #40]
	cbz	w8, LBB0_6
; %bb.3:
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_7
; %bb.4:
	mov	x0, x19
	bl	_tdc2dev
Lloh0:
	adrp	x1, l_.str.2@PAGE
Lloh1:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_12
LBB0_5:
	mov	x0, x19
	bl	_tdc2dev
Lloh2:
	adrp	x1, l_.str@PAGE
Lloh3:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_12
LBB0_6:
	mov	x0, x19
	bl	_tdc2dev
Lloh4:
	adrp	x1, l_.str.1@PAGE
Lloh5:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_12
LBB0_7:
	udiv	x8, x24, x21
	msub	x8, x8, x21, x24
	cbz	x8, LBB0_9
; %bb.8:
	mov	x0, x19
	bl	_tdc2dev
Lloh6:
	adrp	x1, l_.str.3@PAGE
Lloh7:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_12
LBB0_9:
	orr	w8, w21, w22
	tst	w8, #0x3
	b.ne	LBB0_11
; %bb.10:
	ldr	x8, [x19, #24]
	ldr	x8, [x8]
	ldr	w8, [x8]
	cmp	w8, w21
	b.ge	LBB0_15
LBB0_11:
	mov	x0, x19
	bl	_tdc2dev
Lloh8:
	adrp	x1, l_.str.4@PAGE
Lloh9:
	add	x1, x1, l_.str.4@PAGEOFF
LBB0_12:
	bl	_dev_err
LBB0_13:
	mov	x0, #0
LBB0_14:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_15:
	add	x2, sp, #16
	add	x3, sp, #8
	add	x4, sp, #24
	add	x5, sp, #4
	mov	x6, sp
	mov	x0, x19
	mov	x1, x23
	bl	_get_transfer_param
	tbnz	x0, #63, LBB0_13
; %bb.16:
	ldr	x8, [x19]
Lloh10:
	adrp	x9, _TEGRA_APBDMA_SLAVE_ID_INVALID@GOTPAGE
Lloh11:
	ldr	x9, [x9, _TEGRA_APBDMA_SLAVE_ID_INVALID@GOTPAGEOFF]
Lloh12:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_18
; %bb.17:
Lloh13:
	adrp	x9, _TEGRA_APBDMA_CSR_FLOW@GOTPAGE
Lloh14:
	ldr	x9, [x9, _TEGRA_APBDMA_CSR_FLOW@GOTPAGEOFF]
Lloh15:
	ldr	x9, [x9]
	ldr	x10, [sp, #24]
	orr	x9, x10, x9
Lloh16:
	adrp	x10, _TEGRA_APBDMA_CSR_REQ_SEL_SHIFT@GOTPAGE
Lloh17:
	ldr	x10, [x10, _TEGRA_APBDMA_CSR_REQ_SEL_SHIFT@GOTPAGEOFF]
Lloh18:
	ldr	x10, [x10]
	lsl	x8, x8, x10
	orr	x8, x8, x9
	str	x8, [sp, #24]
LBB0_18:
Lloh19:
	adrp	x8, _DMA_PREP_INTERRUPT@GOTPAGE
Lloh20:
	ldr	x8, [x8, _DMA_PREP_INTERRUPT@GOTPAGEOFF]
Lloh21:
	ldr	x8, [x8]
	tst	x8, x20
	b.eq	LBB0_28
; %bb.19:
Lloh22:
	adrp	x8, _TEGRA_APBDMA_AHBSEQ_WRAP_NONE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _TEGRA_APBDMA_AHBSEQ_WRAP_NONE@GOTPAGEOFF]
Lloh24:
	adrp	x9, _TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT@GOTPAGE
Lloh25:
	ldr	x9, [x9, _TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT@GOTPAGEOFF]
Lloh26:
	adrp	x10, _TEGRA_APBDMA_AHBSEQ_INTR_ENB@GOTPAGE
Lloh27:
	ldr	x10, [x10, _TEGRA_APBDMA_AHBSEQ_INTR_ENB@GOTPAGEOFF]
Lloh28:
	ldr	x25, [x8]
Lloh29:
	ldr	x27, [x9]
Lloh30:
	ldr	x26, [x10]
Lloh31:
	adrp	x8, _TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32@GOTPAGE
Lloh32:
	ldr	x8, [x8, _TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32@GOTPAGEOFF]
Lloh33:
	ldr	x28, [x8]
Lloh34:
	adrp	x8, _TEGRA_APBDMA_CSR_IE_EOC@GOTPAGE
Lloh35:
	ldr	x8, [x8, _TEGRA_APBDMA_CSR_IE_EOC@GOTPAGEOFF]
Lloh36:
	ldr	x8, [x8]
	ldr	x9, [sp, #24]
	orr	x8, x9, x8
	str	x8, [sp, #24]
Lloh37:
	adrp	x8, _TEGRA_APBDMA_APBSEQ_WRAP_WORD_1@GOTPAGE
Lloh38:
	ldr	x8, [x8, _TEGRA_APBDMA_APBSEQ_WRAP_WORD_1@GOTPAGEOFF]
Lloh39:
	ldr	x8, [x8]
	ldr	x9, [sp, #8]
	orr	x8, x9, x8
	str	x8, [sp, #8]
	mov	x0, x19
	bl	_tegra_dma_desc_get
	cbz	x0, LBB0_29
; %bb.20:
	mov	x23, x0
	lsl	x8, x25, x27
	orr	x8, x8, x26
	orr	x26, x8, x28
	add	x25, x0, #16
	mov	x0, x25
	bl	_INIT_LIST_HEAD
	add	x0, x23, #40
	bl	_INIT_LIST_HEAD
	stp	xzr, xzr, [x23, #24]
	sxtw	x27, w21
	neg	x28, x24
	str	x24, [x23]
LBB0_21:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	bl	_tegra_dma_sg_req_get
	cbz	x0, LBB0_30
; %bb.22:                               ;   in Loop: Header=BB0_21 Depth=1
	mov	x24, x0
	ldp	w2, w1, [sp]
	mov	x0, x19
	mov	x3, x21
	bl	_get_burst_size
	orr	x26, x0, x26
	ldr	x8, [sp, #16]
	mov	x1, x24
	str	x8, [x1, #24]!
	str	w22, [x24, #32]
	ldr	x8, [sp, #24]
	str	x8, [x24, #40]
	mov	x0, x19
	mov	x2, x21
	bl	_tegra_dma_prep_wcount
	ldr	x8, [sp, #8]
	stp	x8, x26, [x24, #48]
	str	xzr, [x24]
	str	x23, [x24, #16]
	str	w21, [x24, #8]
	add	x0, x24, #12
	mov	x1, x25
	bl	_list_add_tail
	add	w22, w22, w21
	adds	x28, x28, x27
	b.ne	LBB0_21
; %bb.23:
	mov	w8, #1
	str	w8, [x24, #4]
Lloh40:
	adrp	x8, _DMA_CTRL_ACK@GOTPAGE
Lloh41:
	ldr	x8, [x8, _DMA_CTRL_ACK@GOTPAGEOFF]
Lloh42:
	ldr	x8, [x8]
	tst	x8, x20
	b.eq	LBB0_25
; %bb.24:
	str	x8, [x23, #8]
LBB0_25:
	ldr	x8, [x19, #16]
	cbz	x8, LBB0_32
; %bb.26:
	ldr	w8, [x19, #8]
	cbnz	w8, LBB0_33
; %bb.27:
	mov	x0, x19
	bl	_tdc2dev
Lloh43:
	adrp	x1, l_.str.7@PAGE
Lloh44:
	add	x1, x1, l_.str.7@PAGEOFF
	b	LBB0_31
LBB0_28:
	mov	w0, #1
	bl	_WARN_ON_ONCE
	b	LBB0_13
LBB0_29:
	mov	x0, x19
	bl	_tdc2dev
Lloh45:
	adrp	x1, l_.str.5@PAGE
Lloh46:
	add	x1, x1, l_.str.5@PAGEOFF
	b	LBB0_12
LBB0_30:
	mov	x0, x19
	bl	_tdc2dev
Lloh47:
	adrp	x1, l_.str.6@PAGE
Lloh48:
	add	x1, x1, l_.str.6@PAGEOFF
LBB0_31:
	bl	_dev_err
	mov	x0, x19
	mov	x1, x23
	bl	_tegra_dma_desc_put
	b	LBB0_13
LBB0_32:
Lloh49:
	adrp	x8, _handle_cont_sngl_cycle_dma_done@GOTPAGE
Lloh50:
	ldr	x8, [x8, _handle_cont_sngl_cycle_dma_done@GOTPAGEOFF]
Lloh51:
	ldr	x8, [x8]
	str	x8, [x19, #16]
	mov	w8, #1
	str	w8, [x19, #8]
LBB0_33:
	add	x0, x23, #8
	b	LBB0_14
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh30
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh29
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh28
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpAdd	Lloh43, Lloh44
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpAdd	Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Invalid buffer/period len\n"

l_.str.1:                               ; @.str.1
	.asciz	"DMA slave is not configured\n"

l_.str.2:                               ; @.str.2
	.asciz	"Request not allowed when DMA running\n"

l_.str.3:                               ; @.str.3
	.asciz	"buf_len is not multiple of period_len\n"

l_.str.4:                               ; @.str.4
	.asciz	"Req len/mem address is not correct\n"

	.comm	_TEGRA_APBDMA_AHBSEQ_INTR_ENB,8,3 ; @TEGRA_APBDMA_AHBSEQ_INTR_ENB
	.comm	_TEGRA_APBDMA_AHBSEQ_WRAP_NONE,8,3 ; @TEGRA_APBDMA_AHBSEQ_WRAP_NONE
	.comm	_TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT,8,3 ; @TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT
	.comm	_TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32,8,3 ; @TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32
	.comm	_TEGRA_APBDMA_SLAVE_ID_INVALID,8,3 ; @TEGRA_APBDMA_SLAVE_ID_INVALID
	.comm	_TEGRA_APBDMA_CSR_FLOW,8,3      ; @TEGRA_APBDMA_CSR_FLOW
	.comm	_TEGRA_APBDMA_CSR_REQ_SEL_SHIFT,8,3 ; @TEGRA_APBDMA_CSR_REQ_SEL_SHIFT
	.comm	_DMA_PREP_INTERRUPT,8,3         ; @DMA_PREP_INTERRUPT
	.comm	_TEGRA_APBDMA_CSR_IE_EOC,8,3    ; @TEGRA_APBDMA_CSR_IE_EOC
	.comm	_TEGRA_APBDMA_APBSEQ_WRAP_WORD_1,8,3 ; @TEGRA_APBDMA_APBSEQ_WRAP_WORD_1
l_.str.5:                               ; @.str.5
	.asciz	"not enough descriptors available\n"

l_.str.6:                               ; @.str.6
	.asciz	"DMA sg-req not available\n"

	.comm	_DMA_CTRL_ACK,8,3               ; @DMA_CTRL_ACK
	.comm	_handle_cont_sngl_cycle_dma_done,8,3 ; @handle_cont_sngl_cycle_dma_done
l_.str.7:                               ; @.str.7
	.asciz	"DMA configuration conflict\n"

	.no_dead_strip	_tegra_dma_prep_dma_cyclic
.subsections_via_symbols
