	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cik_sdma_gfx_resume
_cik_sdma_gfx_resume:                   ## @cik_sdma_gfx_resume
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movb	$1, %al
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	testb	$1, %al
	movq	_CAYMAN_RING_TYPE_DMA1_INDEX@GOTPCREL(%rip), %rax
	cmovneq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rax
	movq	32(%r12), %rbx
	movq	(%rax), %rax
	leaq	(%rax,%rax,4), %r15
	leaq	(%rbx,%r15,4), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	_CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPCREL(%rip), %rax
	cmovneq	_R600_WB_DMA_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movq	_SDMA1_REGISTER_OFFSET@GOTPCREL(%rip), %rcx
	cmovneq	_SDMA0_REGISTER_OFFSET@GOTPCREL(%rip), %rcx
	movl	(%rax), %r12d
	movl	(%rcx), %r14d
	movq	_SDMA0_SEM_INCOMPLETE_TIMER_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	%r14d, %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_SDMA0_SEM_WAIT_FAIL_TIMER_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	%r14d, %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movl	(%rbx,%r15,4), %eax
	leal	3(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$2, %edi
	callq	_order_base_2
	movl	%eax, %r13d
	addl	%eax, %r13d
	movq	_SDMA0_GFX_RB_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	%r14d, %edi
	movl	%r13d, %esi
	callq	_WREG32
	movq	_SDMA0_GFX_RB_RPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	%r14d, %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_SDMA0_GFX_RB_WPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	%r14d, %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_SDMA0_GFX_RB_RPTR_ADDR_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	addl	%r14d, %ebx
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	16(%rax), %edi
	addl	%r12d, %edi
	callq	_upper_32_bits
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_SDMA0_GFX_RB_RPTR_ADDR_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	%r14d, %edi
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	addl	16(%rax), %r12d
	andl	$-4, %r12d
	movl	%r12d, %esi
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	callq	_WREG32
	cmpq	$0, 24(%r12)
	movl	$0, %ebx
	je	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_SDMA_RPTR_WRITEBACK_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	orl	%r13d, %ebx
	movq	_SDMA0_GFX_RB_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	%r14d, %edi
	movq	-72(%rbp), %r13                 ## 8-byte Reload
	movl	4(%r13,%r15,4), %esi
	sarl	$8, %esi
	callq	_WREG32
	movq	_SDMA0_GFX_RB_BASE_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	%r14d, %edi
	callq	_WREG32
	movl	$0, 8(%r13,%r15,4)
	movq	_SDMA0_GFX_RB_WPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	%r14d, %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_SDMA0_GFX_RB_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	%r14d, %edi
	movq	_SDMA_RB_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	%ebx, %esi
	callq	_WREG32
	movq	_SDMA_IB_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SDMA0_GFX_IB_CNTL@GOTPCREL(%rip), %rax
	addl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_WREG32
	movl	$1, 12(%r13,%r15,4)
	movl	16(%r13,%r15,4), %esi
	movq	%r12, %rdi
	movq	-64(%rbp), %rdx                 ## 8-byte Reload
	callq	_radeon_ring_test
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_5
## %bb.1:                               ##   in Loop: Header=BB0_2 Depth=1
	testb	$1, -52(%rbp)                   ## 1-byte Folded Reload
	movl	$0, %eax
	jne	LBB0_2
## %bb.6:
	movq	8(%r12), %rax
	movq	(%rax), %rax
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_8
## %bb.7:
	movq	_CAYMAN_RING_TYPE_DMA1_INDEX@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_9
LBB0_8:
	movl	(%r12), %esi
	movq	%r12, %rdi
	callq	_radeon_ttm_set_active_vram_size
	jmp	LBB0_9
LBB0_5:
	leaq	12(,%r15,4), %rax
	addq	%r13, %rax
	movl	$0, (%rax)
LBB0_9:
	movl	%ebx, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ## @R600_RING_TYPE_DMA_INDEX
	.comm	_SDMA0_REGISTER_OFFSET,4,2      ## @SDMA0_REGISTER_OFFSET
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ## @R600_WB_DMA_RPTR_OFFSET
	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ## @CAYMAN_RING_TYPE_DMA1_INDEX
	.comm	_SDMA1_REGISTER_OFFSET,4,2      ## @SDMA1_REGISTER_OFFSET
	.comm	_CAYMAN_WB_DMA1_RPTR_OFFSET,4,2 ## @CAYMAN_WB_DMA1_RPTR_OFFSET
	.comm	_SDMA0_SEM_INCOMPLETE_TIMER_CNTL,4,2 ## @SDMA0_SEM_INCOMPLETE_TIMER_CNTL
	.comm	_SDMA0_SEM_WAIT_FAIL_TIMER_CNTL,4,2 ## @SDMA0_SEM_WAIT_FAIL_TIMER_CNTL
	.comm	_SDMA0_GFX_RB_CNTL,4,2          ## @SDMA0_GFX_RB_CNTL
	.comm	_SDMA0_GFX_RB_RPTR,4,2          ## @SDMA0_GFX_RB_RPTR
	.comm	_SDMA0_GFX_RB_WPTR,4,2          ## @SDMA0_GFX_RB_WPTR
	.comm	_SDMA0_GFX_RB_RPTR_ADDR_HI,4,2  ## @SDMA0_GFX_RB_RPTR_ADDR_HI
	.comm	_SDMA0_GFX_RB_RPTR_ADDR_LO,4,2  ## @SDMA0_GFX_RB_RPTR_ADDR_LO
	.comm	_SDMA_RPTR_WRITEBACK_ENABLE,4,2 ## @SDMA_RPTR_WRITEBACK_ENABLE
	.comm	_SDMA0_GFX_RB_BASE,4,2          ## @SDMA0_GFX_RB_BASE
	.comm	_SDMA0_GFX_RB_BASE_HI,4,2       ## @SDMA0_GFX_RB_BASE_HI
	.comm	_SDMA_RB_ENABLE,4,2             ## @SDMA_RB_ENABLE
	.comm	_SDMA_IB_ENABLE,4,2             ## @SDMA_IB_ENABLE
	.comm	_SDMA0_GFX_IB_CNTL,4,2          ## @SDMA0_GFX_IB_CNTL
	.comm	_SDMA_IB_SWAP_ENABLE,4,2        ## @SDMA_IB_SWAP_ENABLE
	.comm	_SDMA_RB_SWAP_ENABLE,4,2        ## @SDMA_RB_SWAP_ENABLE
	.comm	_SDMA_RPTR_WRITEBACK_SWAP_ENABLE,4,2 ## @SDMA_RPTR_WRITEBACK_SWAP_ENABLE
	.no_dead_strip	_cik_sdma_gfx_resume
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cik_sdma_gfx_resume
_cik_sdma_gfx_resume:                   ; @cik_sdma_gfx_resume
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x26, _SDMA0_GFX_RB_CNTL@GOTPAGE
Lloh1:
	ldr	x26, [x26, _SDMA0_GFX_RB_CNTL@GOTPAGEOFF]
Lloh2:
	adrp	x28, _SDMA0_GFX_RB_WPTR@GOTPAGE
Lloh3:
	ldr	x28, [x28, _SDMA0_GFX_RB_WPTR@GOTPAGEOFF]
	mov	w8, #1
Lloh4:
	adrp	x23, _SDMA0_GFX_IB_CNTL@GOTPAGE
Lloh5:
	ldr	x23, [x23, _SDMA0_GFX_IB_CNTL@GOTPAGEOFF]
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
	mov	x25, x8
	ldr	x8, [x19, #32]
	tst	w25, #0x1
Lloh6:
	adrp	x9, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGEOFF]
Lloh8:
	adrp	x10, _R600_RING_TYPE_DMA_INDEX@GOTPAGE
Lloh9:
	ldr	x10, [x10, _R600_RING_TYPE_DMA_INDEX@GOTPAGEOFF]
	csel	x9, x10, x9, ne
	ldr	x9, [x9]
	mov	w10, #20
	madd	x20, x9, x10, x8
Lloh10:
	adrp	x8, _R600_WB_DMA_RPTR_OFFSET@GOTPAGE
Lloh11:
	ldr	x8, [x8, _R600_WB_DMA_RPTR_OFFSET@GOTPAGEOFF]
Lloh12:
	adrp	x9, _CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPAGE
Lloh13:
	ldr	x9, [x9, _CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPAGEOFF]
	csel	x8, x8, x9, ne
	ldr	w27, [x8]
Lloh14:
	adrp	x8, _SDMA0_REGISTER_OFFSET@GOTPAGE
Lloh15:
	ldr	x8, [x8, _SDMA0_REGISTER_OFFSET@GOTPAGEOFF]
Lloh16:
	adrp	x9, _SDMA1_REGISTER_OFFSET@GOTPAGE
Lloh17:
	ldr	x9, [x9, _SDMA1_REGISTER_OFFSET@GOTPAGEOFF]
	csel	x8, x8, x9, ne
	ldr	w24, [x8]
Lloh18:
	adrp	x8, _SDMA0_SEM_INCOMPLETE_TIMER_CNTL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _SDMA0_SEM_INCOMPLETE_TIMER_CNTL@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	add	w0, w8, w24
	mov	w1, #0
	bl	_WREG32
Lloh21:
	adrp	x8, _SDMA0_SEM_WAIT_FAIL_TIMER_CNTL@GOTPAGE
Lloh22:
	ldr	x8, [x8, _SDMA0_SEM_WAIT_FAIL_TIMER_CNTL@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	add	w0, w8, w24
	mov	w1, #0
	bl	_WREG32
	ldr	w8, [x20]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w0, w8, #2
	bl	_order_base_2
	lsl	w21, w0, #1
	ldr	w8, [x26]
	add	w0, w8, w24
	mov	x1, x21
	bl	_WREG32
Lloh24:
	adrp	x8, _SDMA0_GFX_RB_RPTR@GOTPAGE
Lloh25:
	ldr	x8, [x8, _SDMA0_GFX_RB_RPTR@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	add	w0, w8, w24
	mov	w1, #0
	bl	_WREG32
	ldr	w8, [x28]
	add	w0, w8, w24
	mov	w1, #0
	bl	_WREG32
Lloh27:
	adrp	x8, _SDMA0_GFX_RB_RPTR_ADDR_HI@GOTPAGE
Lloh28:
	ldr	x8, [x8, _SDMA0_GFX_RB_RPTR_ADDR_HI@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	add	w22, w8, w24
	ldr	w8, [x19, #16]
	add	w0, w8, w27
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x22
	bl	_WREG32
Lloh30:
	adrp	x8, _SDMA0_GFX_RB_RPTR_ADDR_LO@GOTPAGE
Lloh31:
	ldr	x8, [x8, _SDMA0_GFX_RB_RPTR_ADDR_LO@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	add	w0, w8, w24
	ldr	w8, [x19, #16]
	add	w8, w8, w27
	and	w1, w8, #0xfffffffc
	bl	_WREG32
	ldr	x8, [x19, #24]
Lloh33:
	adrp	x9, _SDMA_RPTR_WRITEBACK_ENABLE@GOTPAGE
Lloh34:
	ldr	x9, [x9, _SDMA_RPTR_WRITEBACK_ENABLE@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	cmp	x8, #0
	csel	w8, wzr, w9, eq
	orr	w21, w8, w21
Lloh36:
	adrp	x8, _SDMA0_GFX_RB_BASE@GOTPAGE
Lloh37:
	ldr	x8, [x8, _SDMA0_GFX_RB_BASE@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	add	w0, w8, w24
	ldr	w8, [x20, #4]
	asr	w1, w8, #8
	bl	_WREG32
Lloh39:
	adrp	x8, _SDMA0_GFX_RB_BASE_HI@GOTPAGE
Lloh40:
	ldr	x8, [x8, _SDMA0_GFX_RB_BASE_HI@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	add	w0, w8, w24
	bl	_WREG32
	str	wzr, [x20, #8]
	ldr	w8, [x28]
	add	w0, w8, w24
	mov	w1, #0
	bl	_WREG32
	ldr	w8, [x26]
	add	w0, w8, w24
Lloh42:
	adrp	x8, _SDMA_RB_ENABLE@GOTPAGE
Lloh43:
	ldr	x8, [x8, _SDMA_RB_ENABLE@GOTPAGEOFF]
Lloh44:
	ldr	w8, [x8]
	orr	w1, w21, w8
	bl	_WREG32
Lloh45:
	adrp	x8, _SDMA_IB_ENABLE@GOTPAGE
Lloh46:
	ldr	x8, [x8, _SDMA_IB_ENABLE@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	ldr	w8, [x23]
	add	w0, w8, w24
	bl	_WREG32
	mov	x21, x20
	mov	w8, #1
	str	w8, [x21, #12]!
	ldr	w1, [x20, #16]
	mov	x0, x19
	mov	x2, x20
	bl	_radeon_ring_test
	mov	x20, x0
	cbnz	w0, LBB0_6
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	mov	w8, #0
	tbnz	w25, #0, LBB0_1
; %bb.3:
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
Lloh48:
	adrp	x9, _R600_RING_TYPE_DMA_INDEX@GOTPAGE
Lloh49:
	ldr	x9, [x9, _R600_RING_TYPE_DMA_INDEX@GOTPAGEOFF]
Lloh50:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_5
; %bb.4:
Lloh51:
	adrp	x9, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGE
Lloh52:
	ldr	x9, [x9, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGEOFF]
Lloh53:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_7
LBB0_5:
	ldr	w1, [x19]
	mov	x0, x19
	bl	_radeon_ttm_set_active_vram_size
	b	LBB0_7
LBB0_6:
	str	wzr, [x21]
LBB0_7:
	mov	x0, x20
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.cfi_endproc
                                        ; -- End function
	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ; @R600_RING_TYPE_DMA_INDEX
	.comm	_SDMA0_REGISTER_OFFSET,4,2      ; @SDMA0_REGISTER_OFFSET
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ; @R600_WB_DMA_RPTR_OFFSET
	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ; @CAYMAN_RING_TYPE_DMA1_INDEX
	.comm	_SDMA1_REGISTER_OFFSET,4,2      ; @SDMA1_REGISTER_OFFSET
	.comm	_CAYMAN_WB_DMA1_RPTR_OFFSET,4,2 ; @CAYMAN_WB_DMA1_RPTR_OFFSET
	.comm	_SDMA0_SEM_INCOMPLETE_TIMER_CNTL,4,2 ; @SDMA0_SEM_INCOMPLETE_TIMER_CNTL
	.comm	_SDMA0_SEM_WAIT_FAIL_TIMER_CNTL,4,2 ; @SDMA0_SEM_WAIT_FAIL_TIMER_CNTL
	.comm	_SDMA0_GFX_RB_CNTL,4,2          ; @SDMA0_GFX_RB_CNTL
	.comm	_SDMA0_GFX_RB_RPTR,4,2          ; @SDMA0_GFX_RB_RPTR
	.comm	_SDMA0_GFX_RB_WPTR,4,2          ; @SDMA0_GFX_RB_WPTR
	.comm	_SDMA0_GFX_RB_RPTR_ADDR_HI,4,2  ; @SDMA0_GFX_RB_RPTR_ADDR_HI
	.comm	_SDMA0_GFX_RB_RPTR_ADDR_LO,4,2  ; @SDMA0_GFX_RB_RPTR_ADDR_LO
	.comm	_SDMA_RPTR_WRITEBACK_ENABLE,4,2 ; @SDMA_RPTR_WRITEBACK_ENABLE
	.comm	_SDMA0_GFX_RB_BASE,4,2          ; @SDMA0_GFX_RB_BASE
	.comm	_SDMA0_GFX_RB_BASE_HI,4,2       ; @SDMA0_GFX_RB_BASE_HI
	.comm	_SDMA_RB_ENABLE,4,2             ; @SDMA_RB_ENABLE
	.comm	_SDMA_IB_ENABLE,4,2             ; @SDMA_IB_ENABLE
	.comm	_SDMA0_GFX_IB_CNTL,4,2          ; @SDMA0_GFX_IB_CNTL
	.comm	_SDMA_IB_SWAP_ENABLE,4,2        ; @SDMA_IB_SWAP_ENABLE
	.comm	_SDMA_RB_SWAP_ENABLE,4,2        ; @SDMA_RB_SWAP_ENABLE
	.comm	_SDMA_RPTR_WRITEBACK_SWAP_ENABLE,4,2 ; @SDMA_RPTR_WRITEBACK_SWAP_ENABLE
	.no_dead_strip	_cik_sdma_gfx_resume
.subsections_via_symbols
