	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function _bxt_ddi_phy_init
__bxt_ddi_phy_init:                     ## @_bxt_ddi_phy_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r12d
	movq	%rdi, %r15
	callq	_bxt_get_phy_info
	movq	%rax, %r14
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_bxt_ddi_phy_is_enabled
	testq	%rax, %rax
	je	LBB0_5
## %bb.1:
	cmpl	$-1, (%r14)
	je	LBB0_3
## %bb.2:
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_bxt_get_grc
	movl	%eax, (%r15)
LBB0_3:
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_bxt_ddi_phy_verify_state
	testq	%rax, %rax
	je	LBB0_4
## %bb.14:
	leaq	L_.str(%rip), %rdi
	movl	%r12d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DRM_DEBUG_DRIVER               ## TAILCALL
LBB0_4:
	leaq	L_.str.1(%rip), %rdi
	movl	%r12d, %esi
	callq	_DRM_DEBUG_DRIVER
LBB0_5:
	movq	_BXT_P_CR_GT_DISP_PWRON@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_I915_READ
	orl	4(%r14), %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	leaq	4(%r15), %rbx
	movl	%r12d, %edi
	callq	_BXT_PORT_CL1CM_DW0
	movq	_PHY_RESERVED@GOTPCREL(%rip), %rdx
	movq	_PHY_POWER_GOOD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	(%rdx), %edx
	orl	%ecx, %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$1, %r8d
	callq	_intel_wait_for_register_fw
	testq	%rax, %rax
	je	LBB0_7
## %bb.6:
	leaq	L_.str.2(%rip), %rdi
	movl	%r12d, %esi
	callq	_DRM_ERROR
LBB0_7:
	movl	%r12d, %edi
	callq	_BXT_PORT_CL1CM_DW9
	movl	%eax, %edi
	callq	_I915_READ
	movq	_IREF0RC_OFFSET_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movq	_IREF0RC_OFFSET_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$228, %r13d
	movl	$228, %ebx
	shll	%cl, %ebx
	orl	%edx, %ebx
	movl	%r12d, %edi
	callq	_BXT_PORT_CL1CM_DW9
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	%r12d, %edi
	callq	_BXT_PORT_CL1CM_DW10
	movl	%eax, %edi
	callq	_I915_READ
	movq	_IREF1RC_OFFSET_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movq	_IREF1RC_OFFSET_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r13d
	orl	%edx, %r13d
	movl	%r12d, %edi
	callq	_BXT_PORT_CL1CM_DW10
	movl	%eax, %edi
	movl	%r13d, %esi
	callq	_I915_WRITE
	movl	%r12d, %edi
	callq	_BXT_PORT_CL1CM_DW28
	movl	%eax, %edi
	callq	_I915_READ
	movl	%eax, %ebx
	movq	_OCL1_POWER_DOWN_EN@GOTPCREL(%rip), %rax
	movq	_DW28_OLDO_DYN_PWR_DOWN_EN@GOTPCREL(%rip), %rcx
	movq	_SUS_CLK_CONFIG@GOTPCREL(%rip), %rdx
	orl	(%rax), %ebx
	orl	(%rcx), %ebx
	orl	(%rdx), %ebx
	movl	%r12d, %edi
	callq	_BXT_PORT_CL1CM_DW28
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	cmpq	$0, 16(%r14)
	je	LBB0_9
## %bb.8:
	movl	%r12d, %edi
	callq	_BXT_PORT_CL2CM_DW6
	movl	%eax, %edi
	callq	_I915_READ
	movl	%eax, %ebx
	movq	_DW6_OLDO_DYN_PWR_DOWN_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	%r12d, %edi
	callq	_BXT_PORT_CL2CM_DW6
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
LBB0_9:
	movl	(%r14), %esi
	cmpl	$-1, %esi
	je	LBB0_11
## %bb.10:
	movq	%r15, %rdi
	callq	_bxt_phy_wait_grc_done
	movl	(%r14), %esi
	movq	%r15, %rdi
	callq	_bxt_get_grc
	movl	%eax, (%r15)
	movq	_GRC_CODE_FAST_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%eax, %ebx
	shll	%cl, %ebx
	movq	_GRC_CODE_SLOW_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	orl	%eax, %ebx
	shll	%cl, %eax
	orl	%eax, %ebx
	movl	%r12d, %edi
	callq	_BXT_PORT_REF_DW6
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	%r12d, %edi
	callq	_BXT_PORT_REF_DW8
	movl	%eax, %edi
	callq	_I915_READ
	movl	%eax, %ebx
	movq	_GRC_DIS@GOTPCREL(%rip), %rax
	movq	_GRC_RDY_OVRD@GOTPCREL(%rip), %rcx
	orl	(%rax), %ebx
	orl	(%rcx), %ebx
	movl	%r12d, %edi
	callq	_BXT_PORT_REF_DW8
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
LBB0_11:
	movq	8(%r14), %rdi
	testq	%rdi, %rdi
	je	LBB0_13
## %bb.12:
	callq	_udelay
LBB0_13:
	movl	%r12d, %edi
	callq	_BXT_PHY_CTL_FAMILY
	movl	%eax, %edi
	callq	_I915_READ
	movl	%eax, %ebx
	movq	_COMMON_RESET_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	%r12d, %edi
	callq	_BXT_PHY_CTL_FAMILY
	movl	%eax, %edi
	movl	%ebx, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_I915_WRITE                     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"DDI PHY %d already enabled, won't reprogram it\n"

L_.str.1:                               ## @.str.1
	.asciz	"DDI PHY %d enabled with invalid state, force reprogramming it\n"

	.comm	_BXT_P_CR_GT_DISP_PWRON,4,2     ## @BXT_P_CR_GT_DISP_PWRON
	.comm	_PHY_RESERVED,4,2               ## @PHY_RESERVED
	.comm	_PHY_POWER_GOOD,4,2             ## @PHY_POWER_GOOD
L_.str.2:                               ## @.str.2
	.asciz	"timeout during PHY%d power on\n"

	.comm	_IREF0RC_OFFSET_MASK,4,2        ## @IREF0RC_OFFSET_MASK
	.comm	_IREF0RC_OFFSET_SHIFT,4,2       ## @IREF0RC_OFFSET_SHIFT
	.comm	_IREF1RC_OFFSET_MASK,4,2        ## @IREF1RC_OFFSET_MASK
	.comm	_IREF1RC_OFFSET_SHIFT,4,2       ## @IREF1RC_OFFSET_SHIFT
	.comm	_OCL1_POWER_DOWN_EN,4,2         ## @OCL1_POWER_DOWN_EN
	.comm	_DW28_OLDO_DYN_PWR_DOWN_EN,4,2  ## @DW28_OLDO_DYN_PWR_DOWN_EN
	.comm	_SUS_CLK_CONFIG,4,2             ## @SUS_CLK_CONFIG
	.comm	_DW6_OLDO_DYN_PWR_DOWN_EN,4,2   ## @DW6_OLDO_DYN_PWR_DOWN_EN
	.comm	_GRC_CODE_FAST_SHIFT,4,2        ## @GRC_CODE_FAST_SHIFT
	.comm	_GRC_CODE_SLOW_SHIFT,4,2        ## @GRC_CODE_SLOW_SHIFT
	.comm	_GRC_DIS,4,2                    ## @GRC_DIS
	.comm	_GRC_RDY_OVRD,4,2               ## @GRC_RDY_OVRD
	.comm	_COMMON_RESET_DIS,4,2           ## @COMMON_RESET_DIS
	.no_dead_strip	__bxt_ddi_phy_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function _bxt_ddi_phy_init
__bxt_ddi_phy_init:                     ; @_bxt_ddi_phy_init
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x21, x0
	bl	_bxt_get_phy_info
	mov	x20, x0
	mov	x0, x21
	mov	x1, x19
	bl	_bxt_ddi_phy_is_enabled
	cbz	x0, LBB0_6
; %bb.1:
	ldr	w8, [x20]
	cmn	w8, #1
	b.eq	LBB0_3
; %bb.2:
	mov	x0, x21
	mov	x1, x19
	bl	_bxt_get_grc
	str	w0, [x21]
LBB0_3:
	mov	x0, x21
	mov	x1, x19
	bl	_bxt_ddi_phy_verify_state
	cbz	x0, LBB0_5
; %bb.4:
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_DRM_DEBUG_DRIVER
LBB0_5:
Lloh2:
	adrp	x0, l_.str.1@PAGE
Lloh3:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	x1, x19
	bl	_DRM_DEBUG_DRIVER
LBB0_6:
Lloh4:
	adrp	x22, _BXT_P_CR_GT_DISP_PWRON@GOTPAGE
Lloh5:
	ldr	x22, [x22, _BXT_P_CR_GT_DISP_PWRON@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_I915_READ
	ldr	w8, [x20, #4]
	orr	w1, w8, w0
	ldr	w0, [x22]
	bl	_I915_WRITE
	add	x22, x21, #4
	mov	x0, x19
	bl	_BXT_PORT_CL1CM_DW0
	mov	x1, x0
Lloh6:
	adrp	x8, _PHY_RESERVED@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PHY_RESERVED@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x9, _PHY_POWER_GOOD@GOTPAGE
Lloh10:
	ldr	x9, [x9, _PHY_POWER_GOOD@GOTPAGEOFF]
Lloh11:
	ldr	w3, [x9]
	orr	w2, w3, w8
	mov	x0, x22
	mov	w4, #1
	bl	_intel_wait_for_register_fw
	cbz	x0, LBB0_8
; %bb.7:
Lloh12:
	adrp	x0, l_.str.2@PAGE
Lloh13:
	add	x0, x0, l_.str.2@PAGEOFF
	mov	x1, x19
	bl	_DRM_ERROR
LBB0_8:
	mov	x0, x19
	bl	_BXT_PORT_CL1CM_DW9
	bl	_I915_READ
Lloh14:
	adrp	x8, _IREF0RC_OFFSET_MASK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _IREF0RC_OFFSET_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh17:
	adrp	x9, _IREF0RC_OFFSET_SHIFT@GOTPAGE
Lloh18:
	ldr	x9, [x9, _IREF0RC_OFFSET_SHIFT@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	mov	w23, #228
	lsl	w9, w23, w9
	orr	w22, w9, w8
	mov	x0, x19
	bl	_BXT_PORT_CL1CM_DW9
	mov	x1, x22
	bl	_I915_WRITE
	mov	x0, x19
	bl	_BXT_PORT_CL1CM_DW10
	bl	_I915_READ
Lloh20:
	adrp	x8, _IREF1RC_OFFSET_MASK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _IREF1RC_OFFSET_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh23:
	adrp	x9, _IREF1RC_OFFSET_SHIFT@GOTPAGE
Lloh24:
	ldr	x9, [x9, _IREF1RC_OFFSET_SHIFT@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	lsl	w9, w23, w9
	orr	w22, w9, w8
	mov	x0, x19
	bl	_BXT_PORT_CL1CM_DW10
	mov	x1, x22
	bl	_I915_WRITE
	mov	x0, x19
	bl	_BXT_PORT_CL1CM_DW28
	bl	_I915_READ
Lloh26:
	adrp	x8, _OCL1_POWER_DOWN_EN@GOTPAGE
Lloh27:
	ldr	x8, [x8, _OCL1_POWER_DOWN_EN@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
Lloh29:
	adrp	x9, _DW28_OLDO_DYN_PWR_DOWN_EN@GOTPAGE
Lloh30:
	ldr	x9, [x9, _DW28_OLDO_DYN_PWR_DOWN_EN@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
Lloh32:
	adrp	x10, _SUS_CLK_CONFIG@GOTPAGE
Lloh33:
	ldr	x10, [x10, _SUS_CLK_CONFIG@GOTPAGEOFF]
Lloh34:
	ldr	w10, [x10]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w22, w8, w10
	mov	x0, x19
	bl	_BXT_PORT_CL1CM_DW28
	mov	x1, x22
	bl	_I915_WRITE
	ldr	x8, [x20, #16]
	cbz	x8, LBB0_10
; %bb.9:
	mov	x0, x19
	bl	_BXT_PORT_CL2CM_DW6
	bl	_I915_READ
Lloh35:
	adrp	x8, _DW6_OLDO_DYN_PWR_DOWN_EN@GOTPAGE
Lloh36:
	ldr	x8, [x8, _DW6_OLDO_DYN_PWR_DOWN_EN@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	orr	w22, w8, w0
	mov	x0, x19
	bl	_BXT_PORT_CL2CM_DW6
	mov	x1, x22
	bl	_I915_WRITE
LBB0_10:
	ldr	w1, [x20]
	cmn	w1, #1
	b.eq	LBB0_12
; %bb.11:
	mov	x0, x21
	bl	_bxt_phy_wait_grc_done
	ldr	w1, [x20]
	mov	x0, x21
	bl	_bxt_get_grc
	str	w0, [x21]
Lloh38:
	adrp	x8, _GRC_CODE_FAST_SHIFT@GOTPAGE
Lloh39:
	ldr	x8, [x8, _GRC_CODE_FAST_SHIFT@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	lsl	w8, w0, w8
Lloh41:
	adrp	x9, _GRC_CODE_SLOW_SHIFT@GOTPAGE
Lloh42:
	ldr	x9, [x9, _GRC_CODE_SLOW_SHIFT@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	lsl	w9, w0, w9
	orr	w8, w8, w0
	orr	w21, w8, w9
	mov	x0, x19
	bl	_BXT_PORT_REF_DW6
	mov	x1, x21
	bl	_I915_WRITE
	mov	x0, x19
	bl	_BXT_PORT_REF_DW8
	bl	_I915_READ
Lloh44:
	adrp	x8, _GRC_DIS@GOTPAGE
Lloh45:
	ldr	x8, [x8, _GRC_DIS@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
Lloh47:
	adrp	x9, _GRC_RDY_OVRD@GOTPAGE
Lloh48:
	ldr	x9, [x9, _GRC_RDY_OVRD@GOTPAGEOFF]
Lloh49:
	ldr	w9, [x9]
	orr	w8, w8, w0
	orr	w21, w8, w9
	mov	x0, x19
	bl	_BXT_PORT_REF_DW8
	mov	x1, x21
	bl	_I915_WRITE
LBB0_12:
	ldr	x0, [x20, #8]
	cbz	x0, LBB0_14
; %bb.13:
	bl	_udelay
LBB0_14:
	mov	x0, x19
	bl	_BXT_PHY_CTL_FAMILY
	bl	_I915_READ
Lloh50:
	adrp	x8, _COMMON_RESET_DIS@GOTPAGE
Lloh51:
	ldr	x8, [x8, _COMMON_RESET_DIS@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	orr	w20, w8, w0
	mov	x0, x19
	bl	_BXT_PHY_CTL_FAMILY
	mov	x1, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_I915_WRITE
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"DDI PHY %d already enabled, won't reprogram it\n"

l_.str.1:                               ; @.str.1
	.asciz	"DDI PHY %d enabled with invalid state, force reprogramming it\n"

	.comm	_BXT_P_CR_GT_DISP_PWRON,4,2     ; @BXT_P_CR_GT_DISP_PWRON
	.comm	_PHY_RESERVED,4,2               ; @PHY_RESERVED
	.comm	_PHY_POWER_GOOD,4,2             ; @PHY_POWER_GOOD
l_.str.2:                               ; @.str.2
	.asciz	"timeout during PHY%d power on\n"

	.comm	_IREF0RC_OFFSET_MASK,4,2        ; @IREF0RC_OFFSET_MASK
	.comm	_IREF0RC_OFFSET_SHIFT,4,2       ; @IREF0RC_OFFSET_SHIFT
	.comm	_IREF1RC_OFFSET_MASK,4,2        ; @IREF1RC_OFFSET_MASK
	.comm	_IREF1RC_OFFSET_SHIFT,4,2       ; @IREF1RC_OFFSET_SHIFT
	.comm	_OCL1_POWER_DOWN_EN,4,2         ; @OCL1_POWER_DOWN_EN
	.comm	_DW28_OLDO_DYN_PWR_DOWN_EN,4,2  ; @DW28_OLDO_DYN_PWR_DOWN_EN
	.comm	_SUS_CLK_CONFIG,4,2             ; @SUS_CLK_CONFIG
	.comm	_DW6_OLDO_DYN_PWR_DOWN_EN,4,2   ; @DW6_OLDO_DYN_PWR_DOWN_EN
	.comm	_GRC_CODE_FAST_SHIFT,4,2        ; @GRC_CODE_FAST_SHIFT
	.comm	_GRC_CODE_SLOW_SHIFT,4,2        ; @GRC_CODE_SLOW_SHIFT
	.comm	_GRC_DIS,4,2                    ; @GRC_DIS
	.comm	_GRC_RDY_OVRD,4,2               ; @GRC_RDY_OVRD
	.comm	_COMMON_RESET_DIS,4,2           ; @COMMON_RESET_DIS
	.no_dead_strip	__bxt_ddi_phy_init
.subsections_via_symbols
