	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function soc15_need_reset_on_init
_soc15_need_reset_on_init:              ## @soc15_need_reset_on_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	callq	_amdgpu_passthrough
	movl	%eax, %ecx
	xorl	%eax, %eax
	testl	%ecx, %ecx
	je	LBB0_3
## %bb.1:
	movq	_AMD_IS_APU@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rbx)
	jne	LBB0_3
## %bb.2:
	movq	_MP0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmMP0_SMN_C2PMSG_81@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	%rax, %rcx
	xorl	%eax, %eax
	testq	%rcx, %rcx
	setne	%al
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_IS_APU,4,2                 ## @AMD_IS_APU
	.comm	_MP0,4,2                        ## @MP0
	.comm	_mmMP0_SMN_C2PMSG_81,4,2        ## @mmMP0_SMN_C2PMSG_81
	.no_dead_strip	_soc15_need_reset_on_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function soc15_need_reset_on_init
_soc15_need_reset_on_init:              ; @soc15_need_reset_on_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_amdgpu_passthrough
	cbz	w0, LBB0_4
; %bb.1:
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _AMD_IS_APU@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMD_IS_APU@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.2:
	mov	w0, #0
	b	LBB0_4
LBB0_3:
Lloh3:
	adrp	x8, _MP0@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MP0@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
Lloh6:
	adrp	x8, _mmMP0_SMN_C2PMSG_81@GOTPAGE
Lloh7:
	ldr	x8, [x8, _mmMP0_SMN_C2PMSG_81@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	cmp	x0, #0
	cset	w0, ne
LBB0_4:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_IS_APU,4,2                 ; @AMD_IS_APU
	.comm	_MP0,4,2                        ; @MP0
	.comm	_mmMP0_SMN_C2PMSG_81,4,2        ; @mmMP0_SMN_C2PMSG_81
	.no_dead_strip	_soc15_need_reset_on_init
.subsections_via_symbols
