	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function detect_bit_6_swizzle
_detect_bit_6_swizzle:                  ## @detect_bit_6_swizzle
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movq	_I915_BIT_6_SWIZZLE_UNKNOWN@GOTPCREL(%rip), %r12
	movl	(%r12), %r15d
	callq	_INTEL_GEN
	cmpl	$7, %eax
	jg	LBB0_2
## %bb.1:
	movq	%r13, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	je	LBB0_3
LBB0_2:
	movq	_I915_BIT_6_SWIZZLE_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
LBB0_29:
	movl	%r15d, %ebx
LBB0_30:
	movl	(%r12), %eax
	cmpl	%eax, %ebx
	je	LBB0_32
## %bb.31:
	cmpl	%eax, %r15d
	jne	LBB0_33
LBB0_32:
	movq	_QUIRK_PIN_SWIZZLED_PAGES@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 8(%r13)
	movq	_I915_BIT_6_SWIZZLE_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	%r15d, %ebx
LBB0_33:
	movl	%ebx, (%r13)
	movl	%r15d, 4(%r13)
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	leaq	24(%r13), %r14
	movq	%r13, %rdi
	callq	_INTEL_GEN
	cmpl	$6, %eax
	jl	LBB0_9
## %bb.4:
	cmpq	$0, 16(%r13)
	je	LBB0_7
## %bb.5:
	movq	_DISP_ARB_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_intel_uncore_read
	movq	_DISP_TILE_SURFACE_SWIZZLING@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_6
	jmp	LBB0_2
LBB0_9:
	movq	%r13, %rdi
	movl	$5, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_10
LBB0_6:
	movq	_I915_BIT_6_SWIZZLE_9_10@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_I915_BIT_6_SWIZZLE_9@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	jmp	LBB0_30
LBB0_7:
	movq	_MAD_DIMM_C0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_intel_uncore_read
	movl	%eax, %r15d
	movq	_MAD_DIMM_C1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_intel_uncore_read
	movq	_MAD_DIMM_A_SIZE_MASK@GOTPCREL(%rip), %rcx
	movq	_MAD_DIMM_B_SIZE_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	xorl	%r15d, %eax
	testl	%eax, %edx
	jne	LBB0_2
## %bb.8:
	movq	_I915_BIT_6_SWIZZLE_9_10@GOTPCREL(%rip), %rax
	movq	_I915_BIT_6_SWIZZLE_9@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	movl	(%rax), %ebx
	jmp	LBB0_30
LBB0_10:
	movq	%r13, %rdi
	movl	$2, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	jne	LBB0_2
## %bb.11:
	movq	%r13, %rdi
	callq	_IS_G45
	testq	%rax, %rax
	jne	LBB0_14
## %bb.12:
	movq	%r13, %rdi
	callq	_IS_I965G
	testq	%rax, %rax
	jne	LBB0_14
## %bb.13:
	movq	%r13, %rdi
	callq	_IS_G33
	testq	%rax, %rax
	je	LBB0_15
LBB0_14:
	movq	_C0DRB3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_intel_uncore_read
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_C1DRB3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_intel_uncore_read
	movl	%r15d, %ebx
	cmpl	%eax, -44(%rbp)                 ## 4-byte Folded Reload
	jne	LBB0_30
	jmp	LBB0_6
LBB0_15:
	movq	_DCC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_intel_uncore_read
	movl	%eax, %ecx
	movq	_DCC_ADDRESSING_MODE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%ecx, %eax
	cmpl	$130, %eax
	je	LBB0_18
## %bb.16:
	cmpl	$129, %eax
	je	LBB0_19
## %bb.17:
	movl	%r15d, %ebx
	cmpl	$128, %eax
	jne	LBB0_25
LBB0_18:
	movq	_I915_BIT_6_SWIZZLE_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	%r15d, %ebx
	jmp	LBB0_25
LBB0_19:
	movq	_DCC_CHANNEL_XOR_DISABLE@GOTPCREL(%rip), %rax
	testl	%ecx, (%rax)
	je	LBB0_21
## %bb.20:
	movq	_I915_BIT_6_SWIZZLE_9_10@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_I915_BIT_6_SWIZZLE_9@GOTPCREL(%rip), %rax
	jmp	LBB0_24
LBB0_21:
	movq	_DCC_CHANNEL_XOR_BIT_17@GOTPCREL(%rip), %rax
	testl	%ecx, (%rax)
	je	LBB0_22
## %bb.23:
	movq	_I915_BIT_6_SWIZZLE_9_10_17@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_I915_BIT_6_SWIZZLE_9_17@GOTPCREL(%rip), %rax
	jmp	LBB0_24
LBB0_22:
	movq	_I915_BIT_6_SWIZZLE_9_10_11@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_I915_BIT_6_SWIZZLE_9_11@GOTPCREL(%rip), %rax
LBB0_24:
	movl	(%rax), %r15d
LBB0_25:
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movq	%r13, %rdi
	movl	$4, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_27
## %bb.26:
	movq	_DCC2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_intel_uncore_read
	movq	_DCC2_MODIFIED_ENHANCED_DISABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	movl	(%r12), %eax
	cmovel	%eax, %r15d
	cmovel	%eax, %ebx
LBB0_27:
	cmpl	$-1, -44(%rbp)                  ## 4-byte Folded Reload
	jne	LBB0_30
## %bb.28:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_ERROR
	movl	(%r12), %r15d
	jmp	LBB0_29
	.cfi_endproc
                                        ## -- End function
	.comm	_I915_BIT_6_SWIZZLE_UNKNOWN,4,2 ## @I915_BIT_6_SWIZZLE_UNKNOWN
	.comm	_I915_BIT_6_SWIZZLE_NONE,4,2    ## @I915_BIT_6_SWIZZLE_NONE
	.comm	_DISP_ARB_CTL,4,2               ## @DISP_ARB_CTL
	.comm	_DISP_TILE_SURFACE_SWIZZLING,4,2 ## @DISP_TILE_SURFACE_SWIZZLING
	.comm	_I915_BIT_6_SWIZZLE_9_10,4,2    ## @I915_BIT_6_SWIZZLE_9_10
	.comm	_I915_BIT_6_SWIZZLE_9,4,2       ## @I915_BIT_6_SWIZZLE_9
	.comm	_MAD_DIMM_C0,4,2                ## @MAD_DIMM_C0
	.comm	_MAD_DIMM_C1,4,2                ## @MAD_DIMM_C1
	.comm	_MAD_DIMM_A_SIZE_MASK,4,2       ## @MAD_DIMM_A_SIZE_MASK
	.comm	_MAD_DIMM_B_SIZE_MASK,4,2       ## @MAD_DIMM_B_SIZE_MASK
	.comm	_C0DRB3,4,2                     ## @C0DRB3
	.comm	_C1DRB3,4,2                     ## @C1DRB3
	.comm	_DCC,4,2                        ## @DCC
	.comm	_DCC_ADDRESSING_MODE_MASK,4,2   ## @DCC_ADDRESSING_MODE_MASK
	.comm	_DCC_CHANNEL_XOR_DISABLE,4,2    ## @DCC_CHANNEL_XOR_DISABLE
	.comm	_DCC_CHANNEL_XOR_BIT_17,4,2     ## @DCC_CHANNEL_XOR_BIT_17
	.comm	_I915_BIT_6_SWIZZLE_9_10_11,4,2 ## @I915_BIT_6_SWIZZLE_9_10_11
	.comm	_I915_BIT_6_SWIZZLE_9_11,4,2    ## @I915_BIT_6_SWIZZLE_9_11
	.comm	_I915_BIT_6_SWIZZLE_9_10_17,4,2 ## @I915_BIT_6_SWIZZLE_9_10_17
	.comm	_I915_BIT_6_SWIZZLE_9_17,4,2    ## @I915_BIT_6_SWIZZLE_9_17
	.comm	_DCC2,4,2                       ## @DCC2
	.comm	_DCC2_MODIFIED_ENHANCED_DISABLE,4,2 ## @DCC2_MODIFIED_ENHANCED_DISABLE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Couldn't read from MCHBAR.  Disabling tiling.\n"

	.comm	_QUIRK_PIN_SWIZZLED_PAGES,4,2   ## @QUIRK_PIN_SWIZZLED_PAGES
	.no_dead_strip	_detect_bit_6_swizzle
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function detect_bit_6_swizzle
_detect_bit_6_swizzle:                  ; @detect_bit_6_swizzle
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x22, _I915_BIT_6_SWIZZLE_UNKNOWN@GOTPAGE
Lloh1:
	ldr	x22, [x22, _I915_BIT_6_SWIZZLE_UNKNOWN@GOTPAGEOFF]
	ldr	w23, [x22]
	bl	_INTEL_GEN
	cmp	w0, #7
	b.gt	LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_IS_VALLEYVIEW
	cbz	x0, LBB0_7
LBB0_2:
Lloh2:
	adrp	x8, _I915_BIT_6_SWIZZLE_NONE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_NONE@GOTPAGEOFF]
Lloh4:
	ldr	w23, [x8]
LBB0_3:
	mov	x24, x23
LBB0_4:
	ldr	w8, [x22]
	cmp	w24, w8
	ccmp	w23, w8, #4, ne
	b.ne	LBB0_6
; %bb.5:
Lloh5:
	adrp	x8, _QUIRK_PIN_SWIZZLED_PAGES@GOTPAGE
Lloh6:
	ldr	x8, [x8, _QUIRK_PIN_SWIZZLED_PAGES@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	ldr	w9, [x19, #8]
	orr	w8, w9, w8
	str	w8, [x19, #8]
Lloh8:
	adrp	x8, _I915_BIT_6_SWIZZLE_NONE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_NONE@GOTPAGEOFF]
Lloh10:
	ldr	w23, [x8]
	mov	x24, x23
LBB0_6:
	stp	w24, w23, [x19]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_7:
	add	x20, x19, #24
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #6
	b.lt	LBB0_10
; %bb.8:
	ldr	x8, [x19, #16]
	cbz	x8, LBB0_12
; %bb.9:
Lloh11:
	adrp	x8, _DISP_ARB_CTL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DISP_ARB_CTL@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
Lloh14:
	adrp	x8, _DISP_TILE_SURFACE_SWIZZLING@GOTPAGE
Lloh15:
	ldr	x8, [x8, _DISP_TILE_SURFACE_SWIZZLING@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	tst	w8, w0
	b.ne	LBB0_11
	b	LBB0_2
LBB0_10:
	mov	x0, x19
	mov	w1, #5
	bl	_IS_GEN
	cbz	x0, LBB0_13
LBB0_11:
Lloh17:
	adrp	x8, _I915_BIT_6_SWIZZLE_9_10@GOTPAGE
Lloh18:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9_10@GOTPAGEOFF]
Lloh19:
	ldr	w24, [x8]
Lloh20:
	adrp	x8, _I915_BIT_6_SWIZZLE_9@GOTPAGE
Lloh21:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9@GOTPAGEOFF]
Lloh22:
	ldr	w23, [x8]
	b	LBB0_4
LBB0_12:
Lloh23:
	adrp	x8, _MAD_DIMM_C0@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MAD_DIMM_C0@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	mov	x21, x0
Lloh26:
	adrp	x8, _MAD_DIMM_C1@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MAD_DIMM_C1@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
Lloh29:
	adrp	x8, _MAD_DIMM_A_SIZE_MASK@GOTPAGE
Lloh30:
	ldr	x8, [x8, _MAD_DIMM_A_SIZE_MASK@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
Lloh32:
	adrp	x9, _MAD_DIMM_B_SIZE_MASK@GOTPAGE
Lloh33:
	ldr	x9, [x9, _MAD_DIMM_B_SIZE_MASK@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	orr	w8, w9, w8
	eor	w9, w0, w21
Lloh35:
	adrp	x10, _I915_BIT_6_SWIZZLE_9_10@GOTPAGE
Lloh36:
	ldr	x10, [x10, _I915_BIT_6_SWIZZLE_9_10@GOTPAGEOFF]
Lloh37:
	ldr	w10, [x10]
Lloh38:
	adrp	x11, _I915_BIT_6_SWIZZLE_9@GOTPAGE
Lloh39:
	ldr	x11, [x11, _I915_BIT_6_SWIZZLE_9@GOTPAGEOFF]
Lloh40:
	ldr	w11, [x11]
Lloh41:
	adrp	x12, _I915_BIT_6_SWIZZLE_NONE@GOTPAGE
Lloh42:
	ldr	x12, [x12, _I915_BIT_6_SWIZZLE_NONE@GOTPAGEOFF]
Lloh43:
	ldr	w12, [x12]
	tst	w8, w9
	csel	w23, w11, w12, eq
	csel	w24, w10, w12, eq
	b	LBB0_4
LBB0_13:
	mov	x0, x19
	mov	w1, #2
	bl	_IS_GEN
	cbnz	x0, LBB0_2
; %bb.14:
	mov	x0, x19
	bl	_IS_G45
	cbnz	x0, LBB0_17
; %bb.15:
	mov	x0, x19
	bl	_IS_I965G
	cbnz	x0, LBB0_17
; %bb.16:
	mov	x0, x19
	bl	_IS_G33
	cbz	x0, LBB0_18
LBB0_17:
Lloh44:
	adrp	x8, _C0DRB3@GOTPAGE
Lloh45:
	ldr	x8, [x8, _C0DRB3@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	mov	x21, x0
Lloh47:
	adrp	x8, _C1DRB3@GOTPAGE
Lloh48:
	ldr	x8, [x8, _C1DRB3@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	mov	x24, x23
	cmp	w21, w0
	b.ne	LBB0_4
	b	LBB0_11
LBB0_18:
Lloh50:
	adrp	x8, _DCC@GOTPAGE
Lloh51:
	ldr	x8, [x8, _DCC@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
	mov	x21, x0
Lloh53:
	adrp	x8, _DCC_ADDRESSING_MODE_MASK@GOTPAGE
Lloh54:
	ldr	x8, [x8, _DCC_ADDRESSING_MODE_MASK@GOTPAGEOFF]
Lloh55:
	ldr	w8, [x8]
	and	w8, w8, w0
	cmp	w8, #130
	b.eq	LBB0_21
; %bb.19:
	cmp	w8, #129
	b.eq	LBB0_22
; %bb.20:
	mov	x24, x23
	cmp	w8, #128
	b.ne	LBB0_28
LBB0_21:
Lloh56:
	adrp	x8, _I915_BIT_6_SWIZZLE_NONE@GOTPAGE
Lloh57:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_NONE@GOTPAGEOFF]
Lloh58:
	ldr	w23, [x8]
	mov	x24, x23
	b	LBB0_28
LBB0_22:
Lloh59:
	adrp	x8, _DCC_CHANNEL_XOR_DISABLE@GOTPAGE
Lloh60:
	ldr	x8, [x8, _DCC_CHANNEL_XOR_DISABLE@GOTPAGEOFF]
Lloh61:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_24
; %bb.23:
Lloh62:
	adrp	x8, _I915_BIT_6_SWIZZLE_9_10@GOTPAGE
Lloh63:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9_10@GOTPAGEOFF]
Lloh64:
	ldr	w24, [x8]
Lloh65:
	adrp	x8, _I915_BIT_6_SWIZZLE_9@GOTPAGE
Lloh66:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9@GOTPAGEOFF]
	b	LBB0_27
LBB0_24:
Lloh67:
	adrp	x8, _DCC_CHANNEL_XOR_BIT_17@GOTPAGE
Lloh68:
	ldr	x8, [x8, _DCC_CHANNEL_XOR_BIT_17@GOTPAGEOFF]
Lloh69:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_26
; %bb.25:
Lloh70:
	adrp	x8, _I915_BIT_6_SWIZZLE_9_10_17@GOTPAGE
Lloh71:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9_10_17@GOTPAGEOFF]
Lloh72:
	ldr	w24, [x8]
Lloh73:
	adrp	x8, _I915_BIT_6_SWIZZLE_9_17@GOTPAGE
Lloh74:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9_17@GOTPAGEOFF]
	b	LBB0_27
LBB0_26:
Lloh75:
	adrp	x8, _I915_BIT_6_SWIZZLE_9_10_11@GOTPAGE
Lloh76:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9_10_11@GOTPAGEOFF]
Lloh77:
	ldr	w24, [x8]
Lloh78:
	adrp	x8, _I915_BIT_6_SWIZZLE_9_11@GOTPAGE
Lloh79:
	ldr	x8, [x8, _I915_BIT_6_SWIZZLE_9_11@GOTPAGEOFF]
LBB0_27:
	ldr	w23, [x8]
LBB0_28:
	mov	x0, x19
	mov	w1, #4
	bl	_IS_GEN
	cbz	x0, LBB0_30
; %bb.29:
Lloh80:
	adrp	x8, _DCC2@GOTPAGE
Lloh81:
	ldr	x8, [x8, _DCC2@GOTPAGEOFF]
Lloh82:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_uncore_read
Lloh83:
	adrp	x8, _DCC2_MODIFIED_ENHANCED_DISABLE@GOTPAGE
Lloh84:
	ldr	x8, [x8, _DCC2_MODIFIED_ENHANCED_DISABLE@GOTPAGEOFF]
Lloh85:
	ldr	w8, [x8]
	ldr	w9, [x22]
	tst	w8, w0
	csel	w23, w9, w23, eq
	csel	w24, w9, w24, eq
LBB0_30:
	cmn	w21, #1
	b.ne	LBB0_4
; %bb.31:
Lloh86:
	adrp	x0, l_.str@PAGE
Lloh87:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
	ldr	w23, [x22]
	b	LBB0_3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGot	Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpAdd	Lloh86, Lloh87
	.cfi_endproc
                                        ; -- End function
	.comm	_I915_BIT_6_SWIZZLE_UNKNOWN,4,2 ; @I915_BIT_6_SWIZZLE_UNKNOWN
	.comm	_I915_BIT_6_SWIZZLE_NONE,4,2    ; @I915_BIT_6_SWIZZLE_NONE
	.comm	_DISP_ARB_CTL,4,2               ; @DISP_ARB_CTL
	.comm	_DISP_TILE_SURFACE_SWIZZLING,4,2 ; @DISP_TILE_SURFACE_SWIZZLING
	.comm	_I915_BIT_6_SWIZZLE_9_10,4,2    ; @I915_BIT_6_SWIZZLE_9_10
	.comm	_I915_BIT_6_SWIZZLE_9,4,2       ; @I915_BIT_6_SWIZZLE_9
	.comm	_MAD_DIMM_C0,4,2                ; @MAD_DIMM_C0
	.comm	_MAD_DIMM_C1,4,2                ; @MAD_DIMM_C1
	.comm	_MAD_DIMM_A_SIZE_MASK,4,2       ; @MAD_DIMM_A_SIZE_MASK
	.comm	_MAD_DIMM_B_SIZE_MASK,4,2       ; @MAD_DIMM_B_SIZE_MASK
	.comm	_C0DRB3,4,2                     ; @C0DRB3
	.comm	_C1DRB3,4,2                     ; @C1DRB3
	.comm	_DCC,4,2                        ; @DCC
	.comm	_DCC_ADDRESSING_MODE_MASK,4,2   ; @DCC_ADDRESSING_MODE_MASK
	.comm	_DCC_CHANNEL_XOR_DISABLE,4,2    ; @DCC_CHANNEL_XOR_DISABLE
	.comm	_DCC_CHANNEL_XOR_BIT_17,4,2     ; @DCC_CHANNEL_XOR_BIT_17
	.comm	_I915_BIT_6_SWIZZLE_9_10_11,4,2 ; @I915_BIT_6_SWIZZLE_9_10_11
	.comm	_I915_BIT_6_SWIZZLE_9_11,4,2    ; @I915_BIT_6_SWIZZLE_9_11
	.comm	_I915_BIT_6_SWIZZLE_9_10_17,4,2 ; @I915_BIT_6_SWIZZLE_9_10_17
	.comm	_I915_BIT_6_SWIZZLE_9_17,4,2    ; @I915_BIT_6_SWIZZLE_9_17
	.comm	_DCC2,4,2                       ; @DCC2
	.comm	_DCC2_MODIFIED_ENHANCED_DISABLE,4,2 ; @DCC2_MODIFIED_ENHANCED_DISABLE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Couldn't read from MCHBAR.  Disabling tiling.\n"

	.comm	_QUIRK_PIN_SWIZZLED_PAGES,4,2   ; @QUIRK_PIN_SWIZZLED_PAGES
	.no_dead_strip	_detect_bit_6_swizzle
.subsections_via_symbols
