	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_evergreen_gpu_pci_config_reset ## -- Begin function evergreen_gpu_pci_config_reset
	.p2align	4, 0x90
_evergreen_gpu_pci_config_reset:        ## @evergreen_gpu_pci_config_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	8(%rdi), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_info
	movq	_CP_ME_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_CP_ME_HALT@GOTPCREL(%rip), %rax
	movq	_CP_PFP_HALT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	orq	(%rax), %rsi
	callq	_WREG32
	movl	$50, %edi
	callq	_udelay
	movq	_DMA_RB_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_RREG32
	cltq
	movq	_DMA_RB_ENABLE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	notq	%rsi
	andq	%rax, %rsi
	movl	(%rbx), %edi
	callq	_WREG32
	movq	%r14, %rdi
	callq	_r600_rlc_stop
	movl	$50, %edi
	callq	_udelay
	movq	%r14, %rdi
	callq	_rv770_set_clk_bypass_mode
	movl	12(%r14), %edi
	callq	_pci_clear_master
	leaq	-32(%rbp), %rsi
	movq	%r14, %rdi
	callq	_evergreen_mc_stop
	movq	%r14, %rdi
	callq	_evergreen_mc_wait_for_idle
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movl	8(%r14), %edi
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_warn
LBB0_2:
	movq	%r14, %rdi
	callq	_radeon_pci_config_reset
	cmpq	$0, (%r14)
	jle	LBB0_6
## %bb.3:
	xorl	%ebx, %ebx
	movq	_CONFIG_MEMSIZE@GOTPCREL(%rip), %r15
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r15), %edi
	callq	_RREG32
	cmpl	$-1, %eax
	jne	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_4 Depth=1
	movl	$1, %edi
	callq	_udelay
	incq	%rbx
	cmpq	(%r14), %rbx
	jl	LBB0_4
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"GPU pci config reset\n"

	.comm	_CP_ME_CNTL,4,2                 ## @CP_ME_CNTL
	.comm	_CP_ME_HALT,8,3                 ## @CP_ME_HALT
	.comm	_CP_PFP_HALT,8,3                ## @CP_PFP_HALT
	.comm	_DMA_RB_CNTL,4,2                ## @DMA_RB_CNTL
	.comm	_DMA_RB_ENABLE,8,3              ## @DMA_RB_ENABLE
L_.str.1:                               ## @.str.1
	.asciz	"Wait for MC idle timed out !\n"

	.comm	_CONFIG_MEMSIZE,4,2             ## @CONFIG_MEMSIZE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_evergreen_gpu_pci_config_reset ; -- Begin function evergreen_gpu_pci_config_reset
	.p2align	2
_evergreen_gpu_pci_config_reset:        ; @evergreen_gpu_pci_config_reset
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x0, #8]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_info
Lloh2:
	adrp	x8, _CP_ME_CNTL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _CP_ME_CNTL@GOTPAGEOFF]
Lloh4:
	adrp	x9, _CP_ME_HALT@GOTPAGE
Lloh5:
	ldr	x9, [x9, _CP_ME_HALT@GOTPAGEOFF]
Lloh6:
	ldr	w0, [x8]
Lloh7:
	ldr	x8, [x9]
Lloh8:
	adrp	x9, _CP_PFP_HALT@GOTPAGE
Lloh9:
	ldr	x9, [x9, _CP_PFP_HALT@GOTPAGEOFF]
Lloh10:
	ldr	x9, [x9]
	orr	x1, x9, x8
	bl	_WREG32
	mov	w0, #50
	bl	_udelay
Lloh11:
	adrp	x20, _DMA_RB_CNTL@GOTPAGE
Lloh12:
	ldr	x20, [x20, _DMA_RB_CNTL@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	_RREG32
                                        ; kill: def $w0 killed $w0 def $x0
	sxtw	x8, w0
Lloh13:
	adrp	x9, _DMA_RB_ENABLE@GOTPAGE
Lloh14:
	ldr	x9, [x9, _DMA_RB_ENABLE@GOTPAGEOFF]
Lloh15:
	ldr	x9, [x9]
	bic	x1, x8, x9
	ldr	w0, [x20]
	bl	_WREG32
	mov	x0, x19
	bl	_r600_rlc_stop
	mov	w0, #50
	bl	_udelay
	mov	x0, x19
	bl	_rv770_set_clk_bypass_mode
	ldr	w0, [x19, #12]
	bl	_pci_clear_master
	add	x1, sp, #8
	mov	x0, x19
	bl	_evergreen_mc_stop
	mov	x0, x19
	bl	_evergreen_mc_wait_for_idle
	cbz	x0, LBB0_2
; %bb.1:
	ldr	w0, [x19, #8]
Lloh16:
	adrp	x1, l_.str.1@PAGE
Lloh17:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_warn
LBB0_2:
	mov	x0, x19
	bl	_radeon_pci_config_reset
	ldr	x8, [x19]
	cmp	x8, #1
	b.lt	LBB0_6
; %bb.3:
	mov	x20, #0
Lloh18:
	adrp	x21, _CONFIG_MEMSIZE@GOTPAGE
Lloh19:
	ldr	x21, [x21, _CONFIG_MEMSIZE@GOTPAGEOFF]
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x21]
	bl	_RREG32
	cmn	w0, #1
	b.ne	LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	w0, #1
	bl	_udelay
	add	x20, x20, #1
	ldr	x8, [x19]
	cmp	x20, x8
	b.lt	LBB0_4
LBB0_6:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh6
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"GPU pci config reset\n"

	.comm	_CP_ME_CNTL,4,2                 ; @CP_ME_CNTL
	.comm	_CP_ME_HALT,8,3                 ; @CP_ME_HALT
	.comm	_CP_PFP_HALT,8,3                ; @CP_PFP_HALT
	.comm	_DMA_RB_CNTL,4,2                ; @DMA_RB_CNTL
	.comm	_DMA_RB_ENABLE,8,3              ; @DMA_RB_ENABLE
l_.str.1:                               ; @.str.1
	.asciz	"Wait for MC idle timed out !\n"

	.comm	_CONFIG_MEMSIZE,4,2             ; @CONFIG_MEMSIZE
.subsections_via_symbols
