	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cdv_intel_dp_start_link_train
_cdv_intel_dp_start_link_train:         ## @cdv_intel_dp_start_link_train
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %r12
	movq	8(%rdi), %r13
	movq	_DP_PORT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	(%r12), %eax
	movq	_DP_LINK_TRAIN_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	notl	%r15d
	andl	%eax, %r15d
	movq	_DP_LINK_TRAIN_PAT_1@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	orl	%r15d, %esi
	movl	40(%r12), %edi
	callq	_REG_WRITE
	movl	40(%r12), %edi
	callq	_REG_READ
	movq	%r13, %rdi
	movq	%rbx, %r13
	callq	_gma_wait_for_vblank
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movq	_DP_LINK_BW_SET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	32(%r12), %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	_cdv_intel_dp_aux_native_write
	movq	8(%r12), %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	leaq	L_.str.1(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movl	(%r14), %ebx
	movl	%r15d, -52(%rbp)                ## 4-byte Spill
	orl	%r15d, %ebx
	leaq	L_.str.2(%rip), %rdi
	movq	_DP_TRAINING_PATTERN_1@GOTPCREL(%rip), %r15
	movl	$0, -48(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	movl	%ebx, -56(%rbp)                 ## 4-byte Spill
	jmp	LBB0_1
	.p2align	4, 0x90
LBB0_10:                                ##   in Loop: Header=BB0_1 Depth=1
	movq	%rbx, %rdi
	callq	_cdv_intel_get_adjust_train
	movl	%r13d, -48(%rbp)                ## 4-byte Spill
	movq	%rbx, %r13
	movl	%r15d, -44(%rbp)                ## 4-byte Spill
	movl	-56(%rbp), %ebx                 ## 4-byte Reload
	leaq	L_.str.2(%rip), %rdi
	movq	%r14, %r15
LBB0_1:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_13 Depth 2
	movq	8(%r12), %rax
	movq	32(%r12), %rcx
	movl	(%rax), %esi
	movl	(%rcx), %edx
	movl	4(%rcx), %ecx
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movl	(%r15), %edx
	movq	%r13, %rdi
	movl	%ebx, %esi
	callq	_cdv_intel_dp_set_link_train
	testl	%eax, %eax
	jne	LBB0_3
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	leaq	L_.str.3(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
LBB0_3:                                 ##   in Loop: Header=BB0_1 Depth=1
	movq	8(%r12), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_cdv_intel_dp_set_vswing_premph
	movq	%r15, %r14
	movl	(%r15), %esi
	movq	%r13, %rdi
	callq	_cdv_intel_dplink_set_level
	movl	$200, %edi
	callq	_udelay
	movq	%r13, %rbx
	movq	%r13, %rdi
	callq	_cdv_intel_dp_get_link_status
	testl	%eax, %eax
	je	LBB0_15
## %bb.4:                               ##   in Loop: Header=BB0_1 Depth=1
	movq	24(%r12), %rax
	movl	(%rax), %esi
	movl	4(%rax), %edx
	movl	8(%rax), %ecx
	movl	12(%rax), %r8d
	movl	16(%rax), %r9d
	movl	20(%rax), %eax
	movl	%eax, (%rsp)
	leaq	L_.str.4(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movq	24(%r12), %rdi
	movl	16(%r12), %esi
	callq	_cdv_intel_clock_recovery_ok
	testq	%rax, %rax
	jne	LBB0_11
## %bb.5:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	16(%r12), %eax
	testl	%eax, %eax
	jle	LBB0_6
## %bb.12:                              ##   in Loop: Header=BB0_1 Depth=1
	movq	8(%r12), %rdx
	movq	_DP_TRAIN_MAX_SWING_REACHED@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	xorl	%ecx, %ecx
	.p2align	4, 0x90
LBB0_13:                                ##   Parent Loop BB0_1 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	testl	%esi, (%rdx,%rcx,4)
	je	LBB0_7
## %bb.14:                              ##   in Loop: Header=BB0_13 Depth=2
	incq	%rcx
	cmpq	%rcx, %rax
	jne	LBB0_13
	jmp	LBB0_15
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_1 Depth=1
	xorl	%ecx, %ecx
LBB0_7:                                 ##   in Loop: Header=BB0_1 Depth=1
	cmpl	%eax, %ecx
	je	LBB0_15
## %bb.8:                               ##   in Loop: Header=BB0_1 Depth=1
	movq	8(%r12), %rax
	movq	_DP_TRAIN_VOLTAGE_SWING_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r13d
	andl	(%rax), %r13d
	xorl	%r15d, %r15d
	cmpl	-48(%rbp), %r13d                ## 4-byte Folded Reload
	jne	LBB0_10
## %bb.9:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	incl	%eax
	movl	%eax, %r15d
	cmpl	$5, %eax
	jne	LBB0_10
LBB0_15:
	movq	8(%r12), %rax
	movl	(%rax), %esi
	leaq	L_.str.6(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
LBB0_16:
	movl	-52(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, (%r12)
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_11:
	leaq	L_.str.5(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	jmp	LBB0_16
	.cfi_endproc
                                        ## -- End function
	.comm	_DP_PORT_EN,4,2                 ## @DP_PORT_EN
	.comm	_DP_LINK_TRAIN_MASK,4,2         ## @DP_LINK_TRAIN_MASK
	.comm	_DP_LINK_TRAIN_PAT_1,4,2        ## @DP_LINK_TRAIN_PAT_1
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Link config\n"

	.comm	_DP_LINK_BW_SET,4,2             ## @DP_LINK_BW_SET
L_.str.1:                               ## @.str.1
	.asciz	"Start train\n"

L_.str.2:                               ## @.str.2
	.asciz	"DP Link Train Set %x, Link_config %x, %x\n"

	.comm	_DP_TRAINING_PATTERN_1,4,2      ## @DP_TRAINING_PATTERN_1
L_.str.3:                               ## @.str.3
	.asciz	"Failure in aux-transfer setting pattern 1\n"

L_.str.4:                               ## @.str.4
	.asciz	"DP Link status %x, %x, %x, %x, %x, %x\n"

L_.str.5:                               ## @.str.5
	.asciz	"PT1 train is done\n"

	.comm	_DP_TRAIN_MAX_SWING_REACHED,4,2 ## @DP_TRAIN_MAX_SWING_REACHED
	.comm	_DP_TRAIN_VOLTAGE_SWING_MASK,4,2 ## @DP_TRAIN_VOLTAGE_SWING_MASK
L_.str.6:                               ## @.str.6
	.asciz	"failure in DP patter 1 training, train set %x\n"

	.no_dead_strip	_cdv_intel_dp_start_link_train
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cdv_intel_dp_start_link_train
_cdv_intel_dp_start_link_train:         ; @cdv_intel_dp_start_link_train
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldp	x24, x20, [x0]
Lloh0:
	adrp	x8, _DP_PORT_EN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DP_PORT_EN@GOTPAGEOFF]
	ldr	w9, [x24]
Lloh2:
	ldr	w8, [x8]
	orr	w8, w8, w9
Lloh3:
	adrp	x9, _DP_LINK_TRAIN_MASK@GOTPAGE
Lloh4:
	ldr	x9, [x9, _DP_LINK_TRAIN_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	bic	w25, w8, w9
Lloh6:
	adrp	x21, _DP_LINK_TRAIN_PAT_1@GOTPAGE
Lloh7:
	ldr	x21, [x21, _DP_LINK_TRAIN_PAT_1@GOTPAGEOFF]
	ldr	w8, [x21]
	orr	w1, w25, w8
	ldr	w0, [x24, #40]
	bl	_REG_WRITE
	ldr	w0, [x24, #40]
	bl	_REG_READ
	mov	x0, x20
	bl	_gma_wait_for_vblank
Lloh8:
	adrp	x0, l_.str@PAGE
Lloh9:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
Lloh10:
	adrp	x8, _DP_LINK_BW_SET@GOTPAGE
Lloh11:
	ldr	x8, [x8, _DP_LINK_BW_SET@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	ldr	x2, [x24, #32]
	mov	x0, x19
	mov	w3, #2
	bl	_cdv_intel_dp_aux_native_write
	ldr	x0, [x24, #8]
	mov	w1, #0
	mov	w2, #4
	bl	_memset
Lloh13:
	adrp	x0, l_.str.1@PAGE
Lloh14:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_DEBUG_KMS
	mov	w22, #0
	mov	w26, #0
	ldr	w8, [x21]
	orr	w20, w8, w25
Lloh15:
	adrp	x21, l_.str.2@PAGE
Lloh16:
	add	x21, x21, l_.str.2@PAGEOFF
Lloh17:
	adrp	x27, _DP_TRAINING_PATTERN_1@GOTPAGE
Lloh18:
	ldr	x27, [x27, _DP_TRAINING_PATTERN_1@GOTPAGEOFF]
Lloh19:
	adrp	x23, l_.str.4@PAGE
Lloh20:
	add	x23, x23, l_.str.4@PAGEOFF
LBB0_1:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_7 Depth 2
	ldr	x8, [x24, #8]
	ldr	x9, [x24, #32]
	ldr	w8, [x8]
	ldp	w10, w9, [x9]
	stp	x10, x9, [sp, #8]
	str	x8, [sp]
	mov	x0, x21
	bl	_DRM_DEBUG_KMS
	ldr	w2, [x27]
	mov	x0, x19
	mov	x1, x20
	bl	_cdv_intel_dp_set_link_train
	cbnz	w0, LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
Lloh21:
	adrp	x0, l_.str.3@PAGE
Lloh22:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_DEBUG_KMS
LBB0_3:                                 ;   in Loop: Header=BB0_1 Depth=1
	ldr	x8, [x24, #8]
	ldr	w1, [x8]
	mov	x0, x19
	bl	_cdv_intel_dp_set_vswing_premph
	ldr	w1, [x27]
	mov	x0, x19
	bl	_cdv_intel_dplink_set_level
	mov	w0, #200
	bl	_udelay
	mov	x0, x19
	bl	_cdv_intel_dp_get_link_status
	cbz	w0, LBB0_15
; %bb.4:                                ;   in Loop: Header=BB0_1 Depth=1
	ldr	x8, [x24, #24]
	ldp	w9, w10, [x8]
	ldp	w11, w12, [x8, #8]
	ldp	w13, w8, [x8, #16]
	stp	x13, x8, [sp, #32]
	stp	x11, x12, [sp, #16]
	stp	x9, x10, [sp]
	mov	x0, x23
	bl	_DRM_DEBUG_KMS
	ldr	x0, [x24, #24]
	ldr	w1, [x24, #16]
	bl	_cdv_intel_clock_recovery_ok
	cbnz	x0, LBB0_17
; %bb.5:                                ;   in Loop: Header=BB0_1 Depth=1
	ldr	w8, [x24, #16]
	cmp	w8, #1
	b.lt	LBB0_9
; %bb.6:                                ;   in Loop: Header=BB0_1 Depth=1
	mov	x9, #0
	ldr	x10, [x24, #8]
Lloh23:
	adrp	x11, _DP_TRAIN_MAX_SWING_REACHED@GOTPAGE
Lloh24:
	ldr	x11, [x11, _DP_TRAIN_MAX_SWING_REACHED@GOTPAGEOFF]
Lloh25:
	ldr	w11, [x11]
LBB0_7:                                 ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	w12, [x10, x9, lsl #2]
	tst	w11, w12
	b.eq	LBB0_10
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=2
	add	x9, x9, #1
	cmp	x8, x9
	b.ne	LBB0_7
	b	LBB0_15
LBB0_9:                                 ;   in Loop: Header=BB0_1 Depth=1
	mov	w9, #0
LBB0_10:                                ;   in Loop: Header=BB0_1 Depth=1
	cmp	w9, w8
	b.eq	LBB0_15
; %bb.11:                               ;   in Loop: Header=BB0_1 Depth=1
	ldr	x8, [x24, #8]
	ldr	w8, [x8]
Lloh26:
	adrp	x9, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGE
Lloh27:
	ldr	x9, [x9, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	and	w28, w9, w8
	cmp	w28, w22
	b.ne	LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_1 Depth=1
	add	w26, w26, #1
	cmp	w26, #5
	b.ne	LBB0_14
	b	LBB0_15
LBB0_13:                                ;   in Loop: Header=BB0_1 Depth=1
	mov	w26, #0
LBB0_14:                                ;   in Loop: Header=BB0_1 Depth=1
	mov	x0, x19
	bl	_cdv_intel_get_adjust_train
	mov	x22, x28
	b	LBB0_1
LBB0_15:
	ldr	x8, [x24, #8]
	ldr	w8, [x8]
	str	x8, [sp]
Lloh29:
	adrp	x0, l_.str.6@PAGE
Lloh30:
	add	x0, x0, l_.str.6@PAGEOFF
LBB0_16:
	bl	_DRM_DEBUG_KMS
	str	w25, [x24]
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
LBB0_17:
Lloh31:
	adrp	x0, l_.str.5@PAGE
Lloh32:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_16
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpAdd	Lloh29, Lloh30
	.loh AdrpAdd	Lloh31, Lloh32
	.cfi_endproc
                                        ; -- End function
	.comm	_DP_PORT_EN,4,2                 ; @DP_PORT_EN
	.comm	_DP_LINK_TRAIN_MASK,4,2         ; @DP_LINK_TRAIN_MASK
	.comm	_DP_LINK_TRAIN_PAT_1,4,2        ; @DP_LINK_TRAIN_PAT_1
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Link config\n"

	.comm	_DP_LINK_BW_SET,4,2             ; @DP_LINK_BW_SET
l_.str.1:                               ; @.str.1
	.asciz	"Start train\n"

l_.str.2:                               ; @.str.2
	.asciz	"DP Link Train Set %x, Link_config %x, %x\n"

	.comm	_DP_TRAINING_PATTERN_1,4,2      ; @DP_TRAINING_PATTERN_1
l_.str.3:                               ; @.str.3
	.asciz	"Failure in aux-transfer setting pattern 1\n"

l_.str.4:                               ; @.str.4
	.asciz	"DP Link status %x, %x, %x, %x, %x, %x\n"

l_.str.5:                               ; @.str.5
	.asciz	"PT1 train is done\n"

	.comm	_DP_TRAIN_MAX_SWING_REACHED,4,2 ; @DP_TRAIN_MAX_SWING_REACHED
	.comm	_DP_TRAIN_VOLTAGE_SWING_MASK,4,2 ; @DP_TRAIN_VOLTAGE_SWING_MASK
l_.str.6:                               ; @.str.6
	.asciz	"failure in DP patter 1 training, train set %x\n"

	.no_dead_strip	_cdv_intel_dp_start_link_train
.subsections_via_symbols
