	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function psp_print_fw_hdr
_psp_print_fw_hdr:                      ## @psp_print_fw_hdr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	(%rsi), %rcx
	leaq	-128(%rcx), %rdx
	cmpq	$13, %rdx
	ja	LBB0_10
## %bb.1:
	movq	(%rdi), %rax
	leaq	LJTI0_0(%rip), %rsi
	movslq	(%rsi,%rdx,4), %rdx
	addq	%rsi, %rdx
	jmpq	*%rdx
LBB0_2:
	movq	48(%rax), %rax
	movq	-1088(%rax,%rcx,8), %rax
	movq	(%rax), %rdi
	popq	%rbp
	jmp	_amdgpu_ucode_print_sdma_hdr    ## TAILCALL
LBB0_10:
	popq	%rbp
	retq
LBB0_9:
	movq	(%rax), %rax
	movq	(%rax), %rdi
	popq	%rbp
	jmp	_amdgpu_ucode_print_smc_hdr     ## TAILCALL
LBB0_8:
	movq	8(%rax), %rax
	movq	(%rax), %rdi
	popq	%rbp
	jmp	_amdgpu_ucode_print_rlc_hdr     ## TAILCALL
LBB0_5:
	movq	32(%rax), %rax
	jmp	LBB0_4
LBB0_7:
	movq	16(%rax), %rax
	jmp	LBB0_4
LBB0_6:
	movq	24(%rax), %rax
	jmp	LBB0_4
LBB0_3:
	movq	40(%rax), %rax
LBB0_4:
	movq	(%rax), %rdi
	popq	%rbp
	jmp	_amdgpu_ucode_print_gfx_hdr     ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
LJTI0_0:
	.long	L0_0_set_9
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_2
	.long	L0_0_set_8
	.long	L0_0_set_5
	.long	L0_0_set_7
	.long	L0_0_set_6
	.long	L0_0_set_3
	.end_data_region
                                        ## -- End function
	.no_dead_strip	_psp_print_fw_hdr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function psp_print_fw_hdr
_psp_print_fw_hdr:                      ; @psp_print_fw_hdr
	.cfi_startproc
; %bb.0:
	ldr	x9, [x1]
	sub	x10, x9, #128
	cmp	x10, #13
	b.hi	LBB0_3
; %bb.1:
	ldr	x8, [x0]
Lloh0:
	adrp	x11, lJTI0_0@PAGE
Lloh1:
	add	x11, x11, lJTI0_0@PAGEOFF
	adr	x12, LBB0_2
	ldrb	w13, [x11, x10]
	add	x12, x12, x13, lsl #2
	br	x12
LBB0_2:
	ldr	x8, [x8, #48]
	add	x8, x8, x9, lsl #3
	sub	x8, x8, #1088
	ldr	x8, [x8]
	ldr	x0, [x8]
	b	_amdgpu_ucode_print_sdma_hdr
LBB0_3:
	ret
LBB0_4:
	ldr	x8, [x8]
	ldr	x0, [x8]
	b	_amdgpu_ucode_print_smc_hdr
LBB0_5:
	ldr	x8, [x8, #8]
	ldr	x0, [x8]
	b	_amdgpu_ucode_print_rlc_hdr
LBB0_6:
	ldr	x8, [x8, #32]
	ldr	x0, [x8]
	b	_amdgpu_ucode_print_gfx_hdr
LBB0_7:
	ldr	x8, [x8, #16]
	ldr	x0, [x8]
	b	_amdgpu_ucode_print_gfx_hdr
LBB0_8:
	ldr	x8, [x8, #24]
	ldr	x0, [x8]
	b	_amdgpu_ucode_print_gfx_hdr
LBB0_9:
	ldr	x8, [x8, #40]
	ldr	x0, [x8]
	b	_amdgpu_ucode_print_gfx_hdr
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
	.byte	(LBB0_8-LBB0_2)>>2
	.byte	(LBB0_9-LBB0_2)>>2
                                        ; -- End function
	.no_dead_strip	_psp_print_fw_hdr
.subsections_via_symbols
