	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_d40_log_cfg                    ## -- Begin function d40_log_cfg
	.p2align	4, 0x90
_d40_log_cfg:                           ## @d40_log_cfg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, -56(%rbp)                 ## 8-byte Spill
	movq	%rsi, -48(%rbp)                 ## 8-byte Spill
	movq	%rdi, %r14
	movq	(%rdi), %rax
	movq	_DMA_MEM_TO_DEV@GOTPCREL(%rip), %rcx
	movq	_DMA_MEM_TO_MEM@GOTPCREL(%rip), %rbx
	cmpq	(%rcx), %rax
	je	LBB0_2
## %bb.1:
	xorl	%r12d, %r12d
	movq	(%rbx), %rcx
	cmpq	%rcx, %rax
	jne	LBB0_3
LBB0_2:
	movq	_D40_MEM_LCSP1_SCFG_INCR_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	movl	%eax, %r12d
	movq	(%r14), %rax
	movq	(%rbx), %rcx
LBB0_3:
	movq	_DMA_DEV_TO_MEM@GOTPCREL(%rip), %r15
	movq	(%r15), %rdx
	cmpq	%rdx, %rax
	je	LBB0_5
## %bb.4:
	xorl	%r13d, %r13d
	cmpq	%rcx, %rax
	jne	LBB0_6
LBB0_5:
	movq	_D40_MEM_LCSP3_DCFG_INCR_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	movl	%eax, %r13d
	movq	(%r14), %rax
	movq	(%r15), %rdx
LBB0_6:
	movq	_DMA_DEV_TO_DEV@GOTPCREL(%rip), %rbx
	cmpq	%rdx, %rax
	je	LBB0_8
## %bb.7:
	movq	(%rbx), %rcx
	cmpq	%rcx, %rax
	jne	LBB0_9
LBB0_8:
	movq	_D40_MEM_LCSP1_SCFG_MST_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%eax, %r12d
	movq	(%r14), %rax
	movq	(%rbx), %rcx
LBB0_9:
	movq	_DMA_MEM_TO_DEV@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rax
	je	LBB0_11
## %bb.10:
	cmpq	%rcx, %rax
	jne	LBB0_12
LBB0_11:
	movq	_D40_MEM_LCSP3_DCFG_MST_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%eax, %r13d
LBB0_12:
	movq	_D40_MEM_LCSP3_DCFG_EIM_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%r13d, %eax
	movq	_D40_MEM_LCSP3_DCFG_PSIZE_POS@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	16(%r14), %ebx
	movl	20(%r14), %edi
	shll	%cl, %ebx
	orl	%eax, %ebx
	callq	_d40_width_to_bits
	movl	%eax, %r15d
	movq	_D40_MEM_LCSP3_DCFG_ESIZE_POS@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r15d
	orl	%ebx, %r15d
	movq	_D40_MEM_LCSP1_SCFG_EIM_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%r12d, %eax
	movq	_D40_MEM_LCSP1_SCFG_PSIZE_POS@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	8(%r14), %ebx
	movl	12(%r14), %edi
	shll	%cl, %ebx
	orl	%eax, %ebx
	callq	_d40_width_to_bits
	movq	_D40_MEM_LCSP1_SCFG_ESIZE_POS@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%ebx, %eax
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movl	%eax, (%rcx)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	%r15d, (%rax)
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DMA_MEM_TO_DEV,8,3             ## @DMA_MEM_TO_DEV
	.comm	_DMA_MEM_TO_MEM,8,3             ## @DMA_MEM_TO_MEM
	.comm	_D40_MEM_LCSP1_SCFG_INCR_POS,4,2 ## @D40_MEM_LCSP1_SCFG_INCR_POS
	.comm	_DMA_DEV_TO_MEM,8,3             ## @DMA_DEV_TO_MEM
	.comm	_D40_MEM_LCSP3_DCFG_INCR_POS,4,2 ## @D40_MEM_LCSP3_DCFG_INCR_POS
	.comm	_DMA_DEV_TO_DEV,8,3             ## @DMA_DEV_TO_DEV
	.comm	_D40_MEM_LCSP1_SCFG_MST_POS,4,2 ## @D40_MEM_LCSP1_SCFG_MST_POS
	.comm	_D40_MEM_LCSP3_DCFG_MST_POS,4,2 ## @D40_MEM_LCSP3_DCFG_MST_POS
	.comm	_D40_MEM_LCSP3_DCFG_EIM_POS,4,2 ## @D40_MEM_LCSP3_DCFG_EIM_POS
	.comm	_D40_MEM_LCSP3_DCFG_PSIZE_POS,4,2 ## @D40_MEM_LCSP3_DCFG_PSIZE_POS
	.comm	_D40_MEM_LCSP3_DCFG_ESIZE_POS,4,2 ## @D40_MEM_LCSP3_DCFG_ESIZE_POS
	.comm	_D40_MEM_LCSP1_SCFG_EIM_POS,4,2 ## @D40_MEM_LCSP1_SCFG_EIM_POS
	.comm	_D40_MEM_LCSP1_SCFG_PSIZE_POS,4,2 ## @D40_MEM_LCSP1_SCFG_PSIZE_POS
	.comm	_D40_MEM_LCSP1_SCFG_ESIZE_POS,4,2 ## @D40_MEM_LCSP1_SCFG_ESIZE_POS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_d40_log_cfg                    ; -- Begin function d40_log_cfg
	.p2align	2
_d40_log_cfg:                           ; @d40_log_cfg
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x24, _DMA_MEM_TO_DEV@GOTPAGE
Lloh1:
	ldr	x24, [x24, _DMA_MEM_TO_DEV@GOTPAGEOFF]
	ldr	x10, [x24]
Lloh2:
	adrp	x23, _DMA_MEM_TO_MEM@GOTPAGE
Lloh3:
	ldr	x23, [x23, _DMA_MEM_TO_MEM@GOTPAGEOFF]
	ldr	x9, [x23]
	cmp	x8, x10
	ccmp	x8, x9, #4, ne
	b.ne	LBB0_2
; %bb.1:
Lloh4:
	adrp	x8, _D40_MEM_LCSP1_SCFG_INCR_POS@GOTPAGE
Lloh5:
	ldr	x8, [x8, _D40_MEM_LCSP1_SCFG_INCR_POS@GOTPAGEOFF]
Lloh6:
	ldr	w0, [x8]
	bl	_BIT
	mov	x22, x0
	ldr	x8, [x21]
	ldr	x9, [x23]
	b	LBB0_3
LBB0_2:
	mov	w22, #0
LBB0_3:
Lloh7:
	adrp	x25, _DMA_DEV_TO_MEM@GOTPAGE
Lloh8:
	ldr	x25, [x25, _DMA_DEV_TO_MEM@GOTPAGEOFF]
	ldr	x10, [x25]
	cmp	x8, x10
	ccmp	x8, x9, #4, ne
	b.ne	LBB0_5
; %bb.4:
Lloh9:
	adrp	x8, _D40_MEM_LCSP3_DCFG_INCR_POS@GOTPAGE
Lloh10:
	ldr	x8, [x8, _D40_MEM_LCSP3_DCFG_INCR_POS@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	_BIT
	mov	x23, x0
	ldr	x8, [x21]
	ldr	x10, [x25]
	b	LBB0_6
LBB0_5:
	mov	w23, #0
LBB0_6:
Lloh12:
	adrp	x25, _DMA_DEV_TO_DEV@GOTPAGE
Lloh13:
	ldr	x25, [x25, _DMA_DEV_TO_DEV@GOTPAGEOFF]
	ldr	x9, [x25]
	cmp	x8, x10
	ccmp	x8, x9, #4, ne
	b.ne	LBB0_8
; %bb.7:
Lloh14:
	adrp	x8, _D40_MEM_LCSP1_SCFG_MST_POS@GOTPAGE
Lloh15:
	ldr	x8, [x8, _D40_MEM_LCSP1_SCFG_MST_POS@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	bl	_BIT
	orr	w22, w0, w22
	ldr	x8, [x21]
	ldr	x9, [x25]
LBB0_8:
	ldr	x10, [x24]
	cmp	x8, x10
	ccmp	x8, x9, #4, ne
	b.ne	LBB0_10
; %bb.9:
Lloh17:
	adrp	x8, _D40_MEM_LCSP3_DCFG_MST_POS@GOTPAGE
Lloh18:
	ldr	x8, [x8, _D40_MEM_LCSP3_DCFG_MST_POS@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x8]
	bl	_BIT
	orr	w23, w0, w23
LBB0_10:
Lloh20:
	adrp	x8, _D40_MEM_LCSP3_DCFG_EIM_POS@GOTPAGE
Lloh21:
	ldr	x8, [x8, _D40_MEM_LCSP3_DCFG_EIM_POS@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	bl	_BIT
Lloh23:
	adrp	x8, _D40_MEM_LCSP3_DCFG_PSIZE_POS@GOTPAGE
Lloh24:
	ldr	x8, [x8, _D40_MEM_LCSP3_DCFG_PSIZE_POS@GOTPAGEOFF]
	orr	w9, w0, w23
Lloh25:
	ldr	w8, [x8]
	ldp	w10, w0, [x21, #16]
	lsl	w8, w10, w8
	orr	w23, w9, w8
	bl	_d40_width_to_bits
Lloh26:
	adrp	x8, _D40_MEM_LCSP3_DCFG_ESIZE_POS@GOTPAGE
Lloh27:
	ldr	x8, [x8, _D40_MEM_LCSP3_DCFG_ESIZE_POS@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	lsl	w8, w0, w8
	orr	w23, w23, w8
Lloh29:
	adrp	x8, _D40_MEM_LCSP1_SCFG_EIM_POS@GOTPAGE
Lloh30:
	ldr	x8, [x8, _D40_MEM_LCSP1_SCFG_EIM_POS@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	bl	_BIT
Lloh32:
	adrp	x8, _D40_MEM_LCSP1_SCFG_PSIZE_POS@GOTPAGE
Lloh33:
	ldr	x8, [x8, _D40_MEM_LCSP1_SCFG_PSIZE_POS@GOTPAGEOFF]
	orr	w9, w0, w22
Lloh34:
	ldr	w8, [x8]
	ldp	w10, w0, [x21, #8]
	lsl	w8, w10, w8
	orr	w21, w9, w8
	bl	_d40_width_to_bits
Lloh35:
	adrp	x8, _D40_MEM_LCSP1_SCFG_ESIZE_POS@GOTPAGE
Lloh36:
	ldr	x8, [x8, _D40_MEM_LCSP1_SCFG_ESIZE_POS@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	lsl	w8, w0, w8
	orr	w8, w21, w8
	str	w8, [x20]
	str	w23, [x19]
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.cfi_endproc
                                        ; -- End function
	.comm	_DMA_MEM_TO_DEV,8,3             ; @DMA_MEM_TO_DEV
	.comm	_DMA_MEM_TO_MEM,8,3             ; @DMA_MEM_TO_MEM
	.comm	_D40_MEM_LCSP1_SCFG_INCR_POS,4,2 ; @D40_MEM_LCSP1_SCFG_INCR_POS
	.comm	_DMA_DEV_TO_MEM,8,3             ; @DMA_DEV_TO_MEM
	.comm	_D40_MEM_LCSP3_DCFG_INCR_POS,4,2 ; @D40_MEM_LCSP3_DCFG_INCR_POS
	.comm	_DMA_DEV_TO_DEV,8,3             ; @DMA_DEV_TO_DEV
	.comm	_D40_MEM_LCSP1_SCFG_MST_POS,4,2 ; @D40_MEM_LCSP1_SCFG_MST_POS
	.comm	_D40_MEM_LCSP3_DCFG_MST_POS,4,2 ; @D40_MEM_LCSP3_DCFG_MST_POS
	.comm	_D40_MEM_LCSP3_DCFG_EIM_POS,4,2 ; @D40_MEM_LCSP3_DCFG_EIM_POS
	.comm	_D40_MEM_LCSP3_DCFG_PSIZE_POS,4,2 ; @D40_MEM_LCSP3_DCFG_PSIZE_POS
	.comm	_D40_MEM_LCSP3_DCFG_ESIZE_POS,4,2 ; @D40_MEM_LCSP3_DCFG_ESIZE_POS
	.comm	_D40_MEM_LCSP1_SCFG_EIM_POS,4,2 ; @D40_MEM_LCSP1_SCFG_EIM_POS
	.comm	_D40_MEM_LCSP1_SCFG_PSIZE_POS,4,2 ; @D40_MEM_LCSP1_SCFG_PSIZE_POS
	.comm	_D40_MEM_LCSP1_SCFG_ESIZE_POS,4,2 ; @D40_MEM_LCSP1_SCFG_ESIZE_POS
.subsections_via_symbols
