	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bxt_modeset_calc_cdclk
_bxt_modeset_calc_cdclk:                ## @bxt_modeset_calc_cdclk
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movl	44(%rdi), %edi
	callq	_to_i915
	movq	%rax, %r14
	movq	%r12, %rdi
	callq	_intel_compute_min_cdclk
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_11
## %bb.1:
	movq	%r14, %rdi
	callq	_IS_GEMINILAKE
	movl	%ebx, %edi
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	callq	_glk_calc_cdclk
	movl	%eax, %r15d
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_glk_de_pll_vco
	jmp	LBB0_4
LBB0_3:
	callq	_bxt_calc_cdclk
	movl	%eax, %r15d
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_bxt_de_pll_vco
LBB0_4:
	movl	%eax, 8(%r12)
	movl	%r15d, 12(%r12)
	movl	%r15d, %edi
	callq	_bxt_calc_voltage_level
	movq	%rax, 16(%r12)
	cmpl	$0, 40(%r12)
	je	LBB0_5
## %bb.9:
	leaq	8(%r12), %rax
	movups	(%rax), %xmm0
	movups	%xmm0, 24(%r12)
	jmp	LBB0_10
LBB0_5:
	movq	%r14, %rdi
	callq	_IS_GEMINILAKE
	movl	(%r12), %edi
	testq	%rax, %rax
	je	LBB0_7
## %bb.6:
	callq	_glk_calc_cdclk
	movl	%eax, %r15d
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_glk_de_pll_vco
	jmp	LBB0_8
LBB0_7:
	callq	_bxt_calc_cdclk
	movl	%eax, %r15d
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_bxt_de_pll_vco
LBB0_8:
	movl	%eax, 24(%r12)
	movl	%r15d, 28(%r12)
	movl	%r15d, %edi
	callq	_bxt_calc_voltage_level
	movq	%rax, 32(%r12)
LBB0_10:
	xorl	%ebx, %ebx
LBB0_11:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_bxt_modeset_calc_cdclk
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bxt_modeset_calc_cdclk
_bxt_modeset_calc_cdclk:                ; @bxt_modeset_calc_cdclk
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x0, #44]
	bl	_to_i915
	mov	x20, x0
	mov	x0, x19
	bl	_intel_compute_min_cdclk
	mov	x21, x0
	tbnz	w0, #31, LBB0_10
; %bb.1:
	mov	x0, x20
	bl	_IS_GEMINILAKE
	cbz	x0, LBB0_3
; %bb.2:
	mov	x0, x21
	bl	_glk_calc_cdclk
	mov	x21, x0
	mov	x0, x20
	mov	x1, x21
	bl	_glk_de_pll_vco
	b	LBB0_4
LBB0_3:
	mov	x0, x21
	bl	_bxt_calc_cdclk
	mov	x21, x0
	mov	x0, x20
	mov	x1, x21
	bl	_bxt_de_pll_vco
LBB0_4:
	mov	x22, x19
	stp	w0, w21, [x22, #8]!
	mov	x0, x21
	bl	_bxt_calc_voltage_level
	str	x0, [x22, #8]
	ldr	w8, [x22, #32]
	cbz	w8, LBB0_6
; %bb.5:
	mov	w21, #0
	ldr	q0, [x22]
	stur	q0, [x19, #24]
	b	LBB0_10
LBB0_6:
	mov	x0, x20
	bl	_IS_GEMINILAKE
	mov	x8, x0
	ldr	w0, [x19]
	cbz	x8, LBB0_8
; %bb.7:
	bl	_glk_calc_cdclk
	mov	x21, x0
	mov	x0, x20
	mov	x1, x21
	bl	_glk_de_pll_vco
	b	LBB0_9
LBB0_8:
	bl	_bxt_calc_cdclk
	mov	x21, x0
	mov	x0, x20
	mov	x1, x21
	bl	_bxt_de_pll_vco
LBB0_9:
	stp	w0, w21, [x19, #24]
	mov	x0, x21
	bl	_bxt_calc_voltage_level
	mov	w21, #0
	str	x0, [x19, #32]
LBB0_10:
	mov	x0, x21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_bxt_modeset_calc_cdclk
.subsections_via_symbols
