	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vi_detect_hw_virtualization
_vi_detect_hw_virtualization:           ## @vi_detect_hw_virtualization
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	_CHIP_TONGA@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_2
## %bb.1:
	movq	_CHIP_FIJI@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_7
LBB0_2:
	movq	_mmBIF_IOV_FUNC_IDENTIFIER@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	%rax, %r14
	movq	_BIF_IOV_FUNC_IDENTIFIER@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_FUNC_IDENTIFIER@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_REG_GET_FIELD
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_AMDGPU_SRIOV_CAPS_IS_VF@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 8(%rbx)
LBB0_4:
	movl	(%r15), %esi
	movq	_IOV_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_REG_GET_FIELD
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movq	_AMDGPU_SRIOV_CAPS_ENABLE_IOV@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 8(%rbx)
LBB0_6:
	testq	%r14, %r14
	jne	LBB0_9
LBB0_7:
	xorl	%eax, %eax
	callq	_is_virtual_machine
	testq	%rax, %rax
	je	LBB0_9
## %bb.8:
	movq	_AMDGPU_PASSTHROUGH_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 8(%rbx)
LBB0_9:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_TONGA,8,3                 ## @CHIP_TONGA
	.comm	_CHIP_FIJI,8,3                  ## @CHIP_FIJI
	.comm	_mmBIF_IOV_FUNC_IDENTIFIER,4,2  ## @mmBIF_IOV_FUNC_IDENTIFIER
	.comm	_BIF_IOV_FUNC_IDENTIFIER,4,2    ## @BIF_IOV_FUNC_IDENTIFIER
	.comm	_FUNC_IDENTIFIER,4,2            ## @FUNC_IDENTIFIER
	.comm	_AMDGPU_SRIOV_CAPS_IS_VF,4,2    ## @AMDGPU_SRIOV_CAPS_IS_VF
	.comm	_IOV_ENABLE,4,2                 ## @IOV_ENABLE
	.comm	_AMDGPU_SRIOV_CAPS_ENABLE_IOV,4,2 ## @AMDGPU_SRIOV_CAPS_ENABLE_IOV
	.comm	_AMDGPU_PASSTHROUGH_MODE,4,2    ## @AMDGPU_PASSTHROUGH_MODE
	.no_dead_strip	_vi_detect_hw_virtualization
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vi_detect_hw_virtualization
_vi_detect_hw_virtualization:           ; @vi_detect_hw_virtualization
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _CHIP_TONGA@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_TONGA@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
Lloh3:
	adrp	x10, _CHIP_FIJI@GOTPAGE
Lloh4:
	ldr	x10, [x10, _CHIP_FIJI@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	b.ne	LBB0_6
; %bb.1:
Lloh6:
	adrp	x8, _mmBIF_IOV_FUNC_IDENTIFIER@GOTPAGE
Lloh7:
	ldr	x8, [x8, _mmBIF_IOV_FUNC_IDENTIFIER@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x20, x0
Lloh9:
	adrp	x21, _BIF_IOV_FUNC_IDENTIFIER@GOTPAGE
Lloh10:
	ldr	x21, [x21, _BIF_IOV_FUNC_IDENTIFIER@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh11:
	adrp	x8, _FUNC_IDENTIFIER@GOTPAGE
Lloh12:
	ldr	x8, [x8, _FUNC_IDENTIFIER@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	bl	_REG_GET_FIELD
	cbz	x0, LBB0_3
; %bb.2:
Lloh14:
	adrp	x8, _AMDGPU_SRIOV_CAPS_IS_VF@GOTPAGE
Lloh15:
	ldr	x8, [x8, _AMDGPU_SRIOV_CAPS_IS_VF@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	ldr	w9, [x19, #8]
	orr	w8, w9, w8
	str	w8, [x19, #8]
LBB0_3:
	ldr	w1, [x21]
Lloh17:
	adrp	x8, _IOV_ENABLE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _IOV_ENABLE@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_REG_GET_FIELD
	cbz	x0, LBB0_5
; %bb.4:
Lloh20:
	adrp	x8, _AMDGPU_SRIOV_CAPS_ENABLE_IOV@GOTPAGE
Lloh21:
	ldr	x8, [x8, _AMDGPU_SRIOV_CAPS_ENABLE_IOV@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	ldr	w9, [x19, #8]
	orr	w8, w9, w8
	str	w8, [x19, #8]
LBB0_5:
	cbnz	x20, LBB0_8
LBB0_6:
	bl	_is_virtual_machine
	cbz	x0, LBB0_8
; %bb.7:
Lloh23:
	adrp	x8, _AMDGPU_PASSTHROUGH_MODE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AMDGPU_PASSTHROUGH_MODE@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	ldr	w9, [x19, #8]
	orr	w8, w9, w8
	str	w8, [x19, #8]
LBB0_8:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_TONGA,8,3                 ; @CHIP_TONGA
	.comm	_CHIP_FIJI,8,3                  ; @CHIP_FIJI
	.comm	_mmBIF_IOV_FUNC_IDENTIFIER,4,2  ; @mmBIF_IOV_FUNC_IDENTIFIER
	.comm	_BIF_IOV_FUNC_IDENTIFIER,4,2    ; @BIF_IOV_FUNC_IDENTIFIER
	.comm	_FUNC_IDENTIFIER,4,2            ; @FUNC_IDENTIFIER
	.comm	_AMDGPU_SRIOV_CAPS_IS_VF,4,2    ; @AMDGPU_SRIOV_CAPS_IS_VF
	.comm	_IOV_ENABLE,4,2                 ; @IOV_ENABLE
	.comm	_AMDGPU_SRIOV_CAPS_ENABLE_IOV,4,2 ; @AMDGPU_SRIOV_CAPS_ENABLE_IOV
	.comm	_AMDGPU_PASSTHROUGH_MODE,4,2    ; @AMDGPU_PASSTHROUGH_MODE
	.no_dead_strip	_vi_detect_hw_virtualization
.subsections_via_symbols
