	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nv_update_hdp_mem_power_gating
_nv_update_hdp_mem_power_gating:        ## @nv_update_hdp_mem_power_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_AMD_CG_SUPPORT_HDP_LS@GOTPCREL(%rip), %rcx
	movq	_AMD_CG_SUPPORT_HDP_DS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	(%rcx), %eax
	movq	_AMD_CG_SUPPORT_HDP_SD@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	testl	%eax, (%rdi)
	je	LBB0_7
## %bb.1:
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movq	_HDP@GOTPCREL(%rip), %r12
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	movl	(%r12), %edi
	movq	_mmHDP_CLK_CNTL@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movl	%eax, %ebx
	movl	(%r12), %edi
	movq	_mmHDP_MEM_POWER_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movl	%eax, %r15d
	movq	_HDP_CLK_CNTL@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	_IPH_MEM_CLK_SOFT_OVERRIDE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%ebx, -48(%rbp)                 ## 4-byte Spill
	movl	%ebx, %edi
	movl	$1, %ecx
	callq	_REG_SET_FIELD
	movl	(%r13), %esi
	movq	_RC_MEM_CLK_SOFT_OVERRIDE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	$1, %ecx
	callq	_REG_SET_FIELD
	movl	(%r12), %edi
	movl	(%r14), %edx
	xorl	%esi, %esi
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movq	_HDP_MEM_POWER_CTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_IPH_MEM_POWER_CTRL_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r15d, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_IPH_MEM_POWER_LS_EN@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_IPH_MEM_POWER_DS_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_IPH_MEM_POWER_SD_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_RC_MEM_POWER_CTRL_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_RC_MEM_POWER_LS_EN@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_RC_MEM_POWER_DS_EN@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_RC_MEM_POWER_SD_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	%eax, %ebx
	movq	_HDP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmHDP_MEM_POWER_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	movl	%ebx, %ecx
	callq	_WREG32_SOC15
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %eax
	movq	_AMD_CG_SUPPORT_HDP_LS@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_5
## %bb.2:
	movq	%r12, %r15
	movq	_IPH_MEM_POWER_SD_EN@GOTPCREL(%rip), %r13
	movq	_IPH_MEM_POWER_DS_EN@GOTPCREL(%rip), %r12
	movq	_AMD_CG_SUPPORT_HDP_DS@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_4
## %bb.3:
	movq	%r12, %r13
	jmp	LBB0_5
LBB0_7:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	_AMD_CG_SUPPORT_HDP_SD@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_6
LBB0_5:
	movl	(%r14), %esi
	movl	(%r13), %edx
	movl	%ebx, %edi
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movl	(%r15), %edx
	movl	%eax, %edi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	%eax, %ebx
LBB0_6:
	movq	_HDP@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_mmHDP_MEM_POWER_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	movl	%ebx, %ecx
	callq	_WREG32_SOC15
	movl	(%r14), %edi
	movq	_mmHDP_CLK_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32_SOC15                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_CG_SUPPORT_HDP_LS,4,2      ## @AMD_CG_SUPPORT_HDP_LS
	.comm	_AMD_CG_SUPPORT_HDP_DS,4,2      ## @AMD_CG_SUPPORT_HDP_DS
	.comm	_AMD_CG_SUPPORT_HDP_SD,4,2      ## @AMD_CG_SUPPORT_HDP_SD
	.comm	_HDP,4,2                        ## @HDP
	.comm	_mmHDP_CLK_CNTL,4,2             ## @mmHDP_CLK_CNTL
	.comm	_mmHDP_MEM_POWER_CTRL,4,2       ## @mmHDP_MEM_POWER_CTRL
	.comm	_HDP_CLK_CNTL,4,2               ## @HDP_CLK_CNTL
	.comm	_IPH_MEM_CLK_SOFT_OVERRIDE,4,2  ## @IPH_MEM_CLK_SOFT_OVERRIDE
	.comm	_RC_MEM_CLK_SOFT_OVERRIDE,4,2   ## @RC_MEM_CLK_SOFT_OVERRIDE
	.comm	_HDP_MEM_POWER_CTRL,4,2         ## @HDP_MEM_POWER_CTRL
	.comm	_IPH_MEM_POWER_CTRL_EN,4,2      ## @IPH_MEM_POWER_CTRL_EN
	.comm	_IPH_MEM_POWER_LS_EN,4,2        ## @IPH_MEM_POWER_LS_EN
	.comm	_IPH_MEM_POWER_DS_EN,4,2        ## @IPH_MEM_POWER_DS_EN
	.comm	_IPH_MEM_POWER_SD_EN,4,2        ## @IPH_MEM_POWER_SD_EN
	.comm	_RC_MEM_POWER_CTRL_EN,4,2       ## @RC_MEM_POWER_CTRL_EN
	.comm	_RC_MEM_POWER_LS_EN,4,2         ## @RC_MEM_POWER_LS_EN
	.comm	_RC_MEM_POWER_DS_EN,4,2         ## @RC_MEM_POWER_DS_EN
	.comm	_RC_MEM_POWER_SD_EN,4,2         ## @RC_MEM_POWER_SD_EN
	.no_dead_strip	_nv_update_hdp_mem_power_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nv_update_hdp_mem_power_gating
_nv_update_hdp_mem_power_gating:        ; @nv_update_hdp_mem_power_gating
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _AMD_CG_SUPPORT_HDP_LS@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMD_CG_SUPPORT_HDP_LS@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
Lloh3:
	adrp	x10, _AMD_CG_SUPPORT_HDP_DS@GOTPAGE
Lloh4:
	ldr	x10, [x10, _AMD_CG_SUPPORT_HDP_DS@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	orr	w9, w10, w9
Lloh6:
	adrp	x10, _AMD_CG_SUPPORT_HDP_SD@GOTPAGE
Lloh7:
	ldr	x10, [x10, _AMD_CG_SUPPORT_HDP_SD@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
	orr	w9, w9, w10
	tst	w9, w8
	b.eq	LBB0_7
; %bb.1:
	mov	x20, x1
	mov	x21, x0
Lloh9:
	adrp	x23, _HDP@GOTPAGE
Lloh10:
	ldr	x23, [x23, _HDP@GOTPAGEOFF]
	ldr	w0, [x23]
Lloh11:
	adrp	x25, _mmHDP_CLK_CNTL@GOTPAGE
Lloh12:
	ldr	x25, [x25, _mmHDP_CLK_CNTL@GOTPAGEOFF]
	ldr	w2, [x25]
	mov	w1, #0
	bl	_RREG32_SOC15
	mov	x19, x0
	ldr	w0, [x23]
Lloh13:
	adrp	x28, _mmHDP_MEM_POWER_CTRL@GOTPAGE
Lloh14:
	ldr	x28, [x28, _mmHDP_MEM_POWER_CTRL@GOTPAGEOFF]
	ldr	w2, [x28]
	mov	w1, #0
	bl	_RREG32_SOC15
	mov	x22, x0
Lloh15:
	adrp	x24, _HDP_CLK_CNTL@GOTPAGE
Lloh16:
	ldr	x24, [x24, _HDP_CLK_CNTL@GOTPAGEOFF]
	ldr	w1, [x24]
Lloh17:
	adrp	x8, _IPH_MEM_CLK_SOFT_OVERRIDE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _IPH_MEM_CLK_SOFT_OVERRIDE@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #1
	bl	_REG_SET_FIELD
	ldr	w1, [x24]
Lloh20:
	adrp	x8, _RC_MEM_CLK_SOFT_OVERRIDE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _RC_MEM_CLK_SOFT_OVERRIDE@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	mov	w3, #1
	bl	_REG_SET_FIELD
	mov	x3, x0
	ldr	w0, [x23]
	ldr	w2, [x25]
	mov	w1, #0
	bl	_WREG32_SOC15
Lloh23:
	adrp	x24, _HDP_MEM_POWER_CTRL@GOTPAGE
Lloh24:
	ldr	x24, [x24, _HDP_MEM_POWER_CTRL@GOTPAGEOFF]
	ldr	w1, [x24]
Lloh25:
	adrp	x8, _IPH_MEM_POWER_CTRL_EN@GOTPAGE
Lloh26:
	ldr	x8, [x8, _IPH_MEM_POWER_CTRL_EN@GOTPAGEOFF]
Lloh27:
	ldr	w2, [x8]
	mov	x0, x22
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x24]
Lloh28:
	adrp	x26, _IPH_MEM_POWER_LS_EN@GOTPAGE
Lloh29:
	ldr	x26, [x26, _IPH_MEM_POWER_LS_EN@GOTPAGEOFF]
	ldr	w2, [x26]
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x24]
Lloh30:
	adrp	x8, _IPH_MEM_POWER_DS_EN@GOTPAGE
Lloh31:
	ldr	x8, [x8, _IPH_MEM_POWER_DS_EN@GOTPAGEOFF]
Lloh32:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x24]
Lloh33:
	adrp	x8, _IPH_MEM_POWER_SD_EN@GOTPAGE
Lloh34:
	ldr	x8, [x8, _IPH_MEM_POWER_SD_EN@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x24]
Lloh36:
	adrp	x8, _RC_MEM_POWER_CTRL_EN@GOTPAGE
Lloh37:
	ldr	x8, [x8, _RC_MEM_POWER_CTRL_EN@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x24]
Lloh39:
	adrp	x25, _RC_MEM_POWER_LS_EN@GOTPAGE
Lloh40:
	ldr	x25, [x25, _RC_MEM_POWER_LS_EN@GOTPAGEOFF]
	ldr	w2, [x25]
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x24]
Lloh41:
	adrp	x8, _RC_MEM_POWER_DS_EN@GOTPAGE
Lloh42:
	ldr	x8, [x8, _RC_MEM_POWER_DS_EN@GOTPAGEOFF]
Lloh43:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x24]
Lloh44:
	adrp	x8, _RC_MEM_POWER_SD_EN@GOTPAGE
Lloh45:
	ldr	x8, [x8, _RC_MEM_POWER_SD_EN@GOTPAGEOFF]
Lloh46:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	mov	x22, x0
	ldr	w0, [x23]
	mov	x27, x28
	ldr	w2, [x28]
	mov	w1, #0
	mov	x3, x22
	bl	_WREG32_SOC15
	ldr	w8, [x21]
Lloh47:
	adrp	x9, _AMD_CG_SUPPORT_HDP_LS@GOTPAGE
Lloh48:
	ldr	x9, [x9, _AMD_CG_SUPPORT_HDP_LS@GOTPAGEOFF]
Lloh49:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_4
; %bb.2:
Lloh50:
	adrp	x9, _AMD_CG_SUPPORT_HDP_DS@GOTPAGE
Lloh51:
	ldr	x9, [x9, _AMD_CG_SUPPORT_HDP_DS@GOTPAGEOFF]
Lloh52:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_8
; %bb.3:
Lloh53:
	adrp	x25, _RC_MEM_POWER_DS_EN@GOTPAGE
Lloh54:
	ldr	x25, [x25, _RC_MEM_POWER_DS_EN@GOTPAGEOFF]
Lloh55:
	adrp	x26, _IPH_MEM_POWER_DS_EN@GOTPAGE
Lloh56:
	ldr	x26, [x26, _IPH_MEM_POWER_DS_EN@GOTPAGEOFF]
LBB0_4:
Lloh57:
	adrp	x21, _mmHDP_CLK_CNTL@GOTPAGE
Lloh58:
	ldr	x21, [x21, _mmHDP_CLK_CNTL@GOTPAGEOFF]
LBB0_5:
	ldr	w1, [x24]
	ldr	w2, [x26]
	mov	x0, x22
	mov	x3, x20
	bl	_REG_SET_FIELD
	ldr	w1, [x24]
	ldr	w2, [x25]
	mov	x3, x20
	bl	_REG_SET_FIELD
	mov	x22, x0
LBB0_6:
	ldr	w0, [x23]
	ldr	w2, [x27]
	mov	w1, #0
	mov	x3, x22
	bl	_WREG32_SOC15
	ldr	w0, [x23]
	ldr	w2, [x21]
	mov	w1, #0
	mov	x3, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_WREG32_SOC15
LBB0_7:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_8:
Lloh59:
	adrp	x9, _AMD_CG_SUPPORT_HDP_SD@GOTPAGE
Lloh60:
	ldr	x9, [x9, _AMD_CG_SUPPORT_HDP_SD@GOTPAGEOFF]
Lloh61:
	ldr	w9, [x9]
	tst	w9, w8
Lloh62:
	adrp	x21, _mmHDP_CLK_CNTL@GOTPAGE
Lloh63:
	ldr	x21, [x21, _mmHDP_CLK_CNTL@GOTPAGEOFF]
	b.eq	LBB0_6
; %bb.9:
Lloh64:
	adrp	x25, _RC_MEM_POWER_DS_EN@GOTPAGE
Lloh65:
	ldr	x25, [x25, _RC_MEM_POWER_DS_EN@GOTPAGEOFF]
Lloh66:
	adrp	x26, _IPH_MEM_POWER_SD_EN@GOTPAGE
Lloh67:
	ldr	x26, [x26, _IPH_MEM_POWER_SD_EN@GOTPAGEOFF]
	b	LBB0_5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGot	Lloh64, Lloh65
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_CG_SUPPORT_HDP_LS,4,2      ; @AMD_CG_SUPPORT_HDP_LS
	.comm	_AMD_CG_SUPPORT_HDP_DS,4,2      ; @AMD_CG_SUPPORT_HDP_DS
	.comm	_AMD_CG_SUPPORT_HDP_SD,4,2      ; @AMD_CG_SUPPORT_HDP_SD
	.comm	_HDP,4,2                        ; @HDP
	.comm	_mmHDP_CLK_CNTL,4,2             ; @mmHDP_CLK_CNTL
	.comm	_mmHDP_MEM_POWER_CTRL,4,2       ; @mmHDP_MEM_POWER_CTRL
	.comm	_HDP_CLK_CNTL,4,2               ; @HDP_CLK_CNTL
	.comm	_IPH_MEM_CLK_SOFT_OVERRIDE,4,2  ; @IPH_MEM_CLK_SOFT_OVERRIDE
	.comm	_RC_MEM_CLK_SOFT_OVERRIDE,4,2   ; @RC_MEM_CLK_SOFT_OVERRIDE
	.comm	_HDP_MEM_POWER_CTRL,4,2         ; @HDP_MEM_POWER_CTRL
	.comm	_IPH_MEM_POWER_CTRL_EN,4,2      ; @IPH_MEM_POWER_CTRL_EN
	.comm	_IPH_MEM_POWER_LS_EN,4,2        ; @IPH_MEM_POWER_LS_EN
	.comm	_IPH_MEM_POWER_DS_EN,4,2        ; @IPH_MEM_POWER_DS_EN
	.comm	_IPH_MEM_POWER_SD_EN,4,2        ; @IPH_MEM_POWER_SD_EN
	.comm	_RC_MEM_POWER_CTRL_EN,4,2       ; @RC_MEM_POWER_CTRL_EN
	.comm	_RC_MEM_POWER_LS_EN,4,2         ; @RC_MEM_POWER_LS_EN
	.comm	_RC_MEM_POWER_DS_EN,4,2         ; @RC_MEM_POWER_DS_EN
	.comm	_RC_MEM_POWER_SD_EN,4,2         ; @RC_MEM_POWER_SD_EN
	.no_dead_strip	_nv_update_hdp_mem_power_gating
.subsections_via_symbols
