	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_calculate_sclk_params
_si_calculate_sclk_params:              ## @si_calculate_sclk_params
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, -88(%rbp)                 ## 8-byte Spill
	movl	%esi, %r15d
	movq	%rdi, %r12
	callq	_rv770_get_pi
	movq	%rax, -96(%rbp)                 ## 8-byte Spill
	movq	%r12, %rdi
	callq	_si_get_pi
	movl	(%rax), %ecx
	movl	%ecx, -48(%rbp)                 ## 4-byte Spill
	movl	4(%rax), %ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movl	8(%rax), %ecx
	movl	%ecx, -104(%rbp)                ## 4-byte Spill
	movl	12(%rax), %r13d
	movl	16(%rax), %ebx
	movl	20(%rax), %r14d
	movl	(%r12), %eax
	movq	%rax, -112(%rbp)                ## 8-byte Spill
	movq	_COMPUTE_ENGINE_PLL_PARAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-80(%rbp), %r8
	movq	%r12, %rdi
	movl	%r15d, %edx
	xorl	%ecx, %ecx
	callq	_amdgpu_atombios_get_clock_dividers
	testl	%eax, %eax
	jne	LBB0_8
## %bb.1:
	movl	%ebx, -56(%rbp)                 ## 4-byte Spill
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movl	%r14d, -64(%rbp)                ## 4-byte Spill
	movl	%r13d, -68(%rbp)                ## 4-byte Spill
	movl	-80(%rbp), %eax
	incl	%eax
	movl	%r15d, %r14d
	movl	%eax, -100(%rbp)                ## 4-byte Spill
	imull	%eax, %r14d
	imull	-76(%rbp), %r14d
	shll	$14, %r14d
	movl	%r14d, %edi
	movq	-112(%rbp), %rsi                ## 8-byte Reload
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_do_div
	movq	_SPLL_PDIV_A_MASK@GOTPCREL(%rip), %rax
	movq	_SPLL_REF_DIV_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	notl	%ecx
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	andl	%ecx, %ebx
	movl	-80(%rbp), %edi
	callq	_SPLL_REF_DIV
	movl	%r15d, -48(%rbp)                ## 4-byte Spill
	movl	%eax, %r15d
	movl	-76(%rbp), %edi
	callq	_SPLL_PDIV_A
	orl	%r15d, %eax
	orl	%ebx, %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	_SCLK_MUX_SEL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	andl	%eax, %ebx
	movl	$2, %edi
	callq	_SCLK_MUX_SEL
	orl	%ebx, %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_SPLL_FB_DIV_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movl	-104(%rbp), %r13d               ## 4-byte Reload
	andl	%eax, %r13d
	movl	%r14d, %edi
	callq	_SPLL_FB_DIV
	movl	%eax, %edi
	orl	%r13d, %edi
	movq	_SPLL_DITHEN@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	-96(%rbp), %rax                 ## 8-byte Reload
	cmpq	$0, (%rax)
	movq	-112(%rbp), %r13                ## 8-byte Reload
	je	LBB0_2
## %bb.3:
	movl	%edi, -96(%rbp)                 ## 4-byte Spill
	movl	-100(%rbp), %r15d               ## 4-byte Reload
	movl	-76(%rbp), %ecx
	imull	-48(%rbp), %ecx                 ## 4-byte Folded Reload
	movq	_ASIC_INTERNAL_ENGINE_SS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-120(%rbp), %rsi
	movq	%r12, %rdi
	callq	_amdgpu_atombios_get_asic_ss_info
	testq	%rax, %rax
	je	LBB0_4
## %bb.5:
	leal	(%r13,%r13,4), %eax
	imull	-120(%rbp), %r15d
	cltd
	idivl	%r15d
	movl	%eax, %edi
	imull	-116(%rbp), %r14d
	shll	$2, %r14d
	imull	$10000, %eax, %ecx              ## imm = 0x2710
	movl	%r14d, %eax
	cltd
	idivl	%ecx
	movl	%eax, %r14d
	movq	_CLK_S_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movl	-56(%rbp), %ebx                 ## 4-byte Reload
	andl	%eax, %ebx
	callq	_CLK_S
	movl	%eax, %r13d
	orl	%ebx, %r13d
	movq	_SSEN@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	movq	_CLK_V_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movl	-64(%rbp), %ebx                 ## 4-byte Reload
	andl	%eax, %ebx
	movl	%r14d, %edi
	callq	_CLK_V
	orl	%eax, %ebx
	movq	-88(%rbp), %rdx                 ## 8-byte Reload
	movl	-68(%rbp), %r8d                 ## 4-byte Reload
	movl	-60(%rbp), %eax                 ## 4-byte Reload
	jmp	LBB0_6
LBB0_2:
	movq	-88(%rbp), %rdx                 ## 8-byte Reload
	movl	-68(%rbp), %r8d                 ## 4-byte Reload
	movl	-64(%rbp), %ebx                 ## 4-byte Reload
	movl	-60(%rbp), %eax                 ## 4-byte Reload
	movl	-56(%rbp), %r13d                ## 4-byte Reload
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	movl	-44(%rbp), %r9d                 ## 4-byte Reload
	jmp	LBB0_7
LBB0_4:
	movq	-88(%rbp), %rdx                 ## 8-byte Reload
	movl	-68(%rbp), %r8d                 ## 4-byte Reload
	movl	-64(%rbp), %ebx                 ## 4-byte Reload
	movl	-60(%rbp), %eax                 ## 4-byte Reload
	movl	-56(%rbp), %r13d                ## 4-byte Reload
LBB0_6:
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	movl	-44(%rbp), %r9d                 ## 4-byte Reload
	movl	-96(%rbp), %edi                 ## 4-byte Reload
LBB0_7:
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	movl	%ecx, (%rdx)
	movl	%esi, 4(%rdx)
	movl	%r9d, 8(%rdx)
	movl	%edi, 12(%rdx)
	movl	%r8d, 16(%rdx)
	movl	%r13d, 20(%rdx)
	movl	%ebx, 24(%rdx)
LBB0_8:
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ## @COMPUTE_ENGINE_PLL_PARAM
	.comm	_SPLL_PDIV_A_MASK,4,2           ## @SPLL_PDIV_A_MASK
	.comm	_SPLL_REF_DIV_MASK,4,2          ## @SPLL_REF_DIV_MASK
	.comm	_SCLK_MUX_SEL_MASK,4,2          ## @SCLK_MUX_SEL_MASK
	.comm	_SPLL_FB_DIV_MASK,4,2           ## @SPLL_FB_DIV_MASK
	.comm	_SPLL_DITHEN,4,2                ## @SPLL_DITHEN
	.comm	_ASIC_INTERNAL_ENGINE_SS,4,2    ## @ASIC_INTERNAL_ENGINE_SS
	.comm	_CLK_S_MASK,4,2                 ## @CLK_S_MASK
	.comm	_SSEN,4,2                       ## @SSEN
	.comm	_CLK_V_MASK,4,2                 ## @CLK_V_MASK
	.no_dead_strip	_si_calculate_sclk_params
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_calculate_sclk_params
_si_calculate_sclk_params:              ; @si_calculate_sclk_params
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x2
	mov	x21, x1
	mov	x22, x0
	bl	_rv770_get_pi
	str	x0, [sp, #24]                   ; 8-byte Folded Spill
	mov	x0, x22
	bl	_si_get_pi
	ldp	w28, w27, [x0]
	ldp	w8, w25, [x0, #8]
	str	w8, [sp, #20]                   ; 4-byte Folded Spill
	ldp	w23, w24, [x0, #16]
	ldr	w26, [x22]
Lloh0:
	adrp	x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x4, sp, #40
	mov	x0, x22
	mov	x2, x21
	mov	w3, #0
	bl	_amdgpu_atombios_get_clock_dividers
	mov	x20, x0
	cbnz	w0, LBB0_7
; %bb.1:
	stp	w23, w24, [sp, #8]              ; 8-byte Folded Spill
	str	w25, [sp, #16]                  ; 4-byte Folded Spill
	ldp	w8, w9, [sp, #40]
	add	w24, w8, #1
	mul	w8, w21, w24
	mul	w8, w8, w9
	lsl	w25, w8, #14
	mov	x0, x25
	mov	x23, x26
	mov	x1, x26
	bl	_do_div
Lloh3:
	adrp	x8, _SPLL_PDIV_A_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SPLL_PDIV_A_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _SPLL_REF_DIV_MASK@GOTPAGE
Lloh7:
	ldr	x9, [x9, _SPLL_REF_DIV_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w28, w28, w8
	ldr	w0, [sp, #40]
	bl	_SPLL_REF_DIV
	orr	w28, w28, w0
	ldr	w0, [sp, #44]
	bl	_SPLL_PDIV_A
	orr	w28, w28, w0
Lloh9:
	adrp	x8, _SCLK_MUX_SEL_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SCLK_MUX_SEL_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	bic	w27, w27, w8
	mov	w0, #2
	bl	_SCLK_MUX_SEL
	orr	w27, w27, w0
Lloh12:
	adrp	x8, _SPLL_FB_DIV_MASK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SPLL_FB_DIV_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	ldr	w9, [sp, #20]                   ; 4-byte Folded Reload
	bic	w26, w9, w8
	mov	x0, x25
	bl	_SPLL_FB_DIV
	orr	w8, w26, w0
Lloh15:
	adrp	x9, _SPLL_DITHEN@GOTPAGE
Lloh16:
	ldr	x9, [x9, _SPLL_DITHEN@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w9, w8, w9
	ldr	x8, [sp, #24]                   ; 8-byte Folded Reload
	ldr	x8, [x8]
	cbz	x8, LBB0_5
; %bb.2:
	stp	w9, w28, [sp, #20]              ; 8-byte Folded Spill
	mov	x28, x24
	ldr	w8, [sp, #44]
	mul	w3, w8, w21
Lloh18:
	adrp	x8, _ASIC_INTERNAL_ENGINE_SS@GOTPAGE
Lloh19:
	ldr	x8, [x8, _ASIC_INTERNAL_ENGINE_SS@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	add	x1, sp, #32
	mov	x0, x22
	bl	_amdgpu_atombios_get_asic_ss_info
	ldp	w26, w24, [sp, #8]              ; 8-byte Folded Reload
	cbz	x0, LBB0_4
; %bb.3:
	add	w8, w23, w23, lsl #2
	ldp	w9, w10, [sp, #32]
	mul	w9, w9, w28
	sdiv	w0, w8, w9
	mul	w8, w25, w10
	lsl	w8, w8, #2
	mov	w9, #10000
	mul	w9, w0, w9
	sdiv	w22, w8, w9
Lloh21:
	adrp	x8, _CLK_S_MASK@GOTPAGE
Lloh22:
	ldr	x8, [x8, _CLK_S_MASK@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	bic	w23, w26, w8
	bl	_CLK_S
	orr	w8, w23, w0
Lloh24:
	adrp	x9, _SSEN@GOTPAGE
Lloh25:
	ldr	x9, [x9, _SSEN@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	orr	w26, w8, w9
Lloh27:
	adrp	x8, _CLK_V_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _CLK_V_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	bic	w23, w24, w8
	mov	x0, x22
	bl	_CLK_V
	orr	w24, w23, w0
LBB0_4:
	ldp	w9, w28, [sp, #20]              ; 8-byte Folded Reload
	b	LBB0_6
LBB0_5:
	ldp	w26, w24, [sp, #8]              ; 8-byte Folded Reload
LBB0_6:
	stp	w21, w28, [x19]
	stp	w27, w9, [x19, #8]
	ldr	w8, [sp, #16]                   ; 4-byte Folded Reload
	stp	w8, w26, [x19, #16]
	str	w24, [x19, #24]
LBB0_7:
	mov	x0, x20
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ; @COMPUTE_ENGINE_PLL_PARAM
	.comm	_SPLL_PDIV_A_MASK,4,2           ; @SPLL_PDIV_A_MASK
	.comm	_SPLL_REF_DIV_MASK,4,2          ; @SPLL_REF_DIV_MASK
	.comm	_SCLK_MUX_SEL_MASK,4,2          ; @SCLK_MUX_SEL_MASK
	.comm	_SPLL_FB_DIV_MASK,4,2           ; @SPLL_FB_DIV_MASK
	.comm	_SPLL_DITHEN,4,2                ; @SPLL_DITHEN
	.comm	_ASIC_INTERNAL_ENGINE_SS,4,2    ; @ASIC_INTERNAL_ENGINE_SS
	.comm	_CLK_S_MASK,4,2                 ; @CLK_S_MASK
	.comm	_SSEN,4,2                       ; @SSEN
	.comm	_CLK_V_MASK,4,2                 ; @CLK_V_MASK
	.no_dead_strip	_si_calculate_sclk_params
.subsections_via_symbols
