	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gmc_v10_0_flush_gpu_tlb
_gmc_v10_0_flush_gpu_tlb:               ## @gmc_v10_0_flush_gpu_tlb
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rbx
	movq	%rsi, %r15
	movq	%rdi, %r12
	movq	16(%rdi), %r14
	movq	48(%rdi), %rax
	xorl	%esi, %esi
	callq	*(%rax)
	movq	%r12, %rdi
	callq	_mutex_lock
	movq	_AMDGPU_MMHUB_0@GOTPCREL(%rip), %rax
	cmpq	%rbx, (%rax)
	jne	LBB0_3
## %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%rbx, %rdx
	jmp	LBB0_2
LBB0_3:
	movq	_AMDGPU_GFXHUB_0@GOTPCREL(%rip), %r13
	xorl	%edi, %edi
	cmpq	%rbx, (%r13)
	setne	%dil
	callq	_BUG_ON
	cmpl	$0, 8(%r12)
	je	LBB0_6
## %bb.4:
	cmpl	$0, 40(%r12)
	je	LBB0_6
## %bb.5:
	cmpq	$0, 32(%r12)
	je	LBB0_7
LBB0_6:
	movq	(%r13), %rdx
	movq	%r12, %rdi
	movq	%r15, %rsi
LBB0_2:
	xorl	%ecx, %ecx
	callq	_gmc_v10_0_flush_vm_hub
	movq	%r12, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mutex_unlock                   ## TAILCALL
LBB0_7:
	leaq	-48(%rbp), %rdx
	movq	%r12, %rdi
	movl	$64, %esi
	callq	_amdgpu_job_alloc_with_ib
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_11
## %bb.8:
	movl	24(%r12), %edi
	callq	_amdgpu_gmc_pd_addr
	movq	-48(%rbp), %rcx
	movl	%eax, 16(%rcx)
	movl	$1, (%rcx)
	movq	(%r14), %rax
	movl	(%rax), %eax
	movq	8(%rcx), %rsi
	movq	8(%rsi), %rcx
	movslq	(%rsi), %rdx
	leal	1(%rdx), %edi
	movl	%edi, (%rsi)
	movl	%eax, (%rcx,%rdx,4)
	movq	%r14, %rdi
	callq	_amdgpu_ring_pad_ib
	movq	-48(%rbp), %rdi
	leaq	4(%r12), %rsi
	movq	_AMDGPU_FENCE_OWNER_UNDEFINED@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-56(%rbp), %rcx
	callq	_amdgpu_job_submit
	testl	%eax, %eax
	je	LBB0_9
## %bb.10:
	movl	%eax, %ebx
	movq	-48(%rbp), %rdi
	callq	_amdgpu_job_free
LBB0_11:
	movq	%r12, %rdi
	callq	_mutex_unlock
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %esi
	callq	_DRM_ERROR
LBB0_12:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_9:
	movq	%r12, %rdi
	callq	_mutex_unlock
	movq	-56(%rbp), %rdi
	xorl	%esi, %esi
	callq	_dma_fence_wait
	movq	-56(%rbp), %rdi
	callq	_dma_fence_put
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_MMHUB_0,8,3             ## @AMDGPU_MMHUB_0
	.comm	_AMDGPU_GFXHUB_0,8,3            ## @AMDGPU_GFXHUB_0
	.comm	_AMDGPU_FENCE_OWNER_UNDEFINED,4,2 ## @AMDGPU_FENCE_OWNER_UNDEFINED
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Error flushing GPU TLB using the SDMA (%d)!\n"

	.no_dead_strip	_gmc_v10_0_flush_gpu_tlb
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gmc_v10_0_flush_gpu_tlb
_gmc_v10_0_flush_gpu_tlb:               ; @gmc_v10_0_flush_gpu_tlb
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x2
	mov	x21, x1
	mov	x19, x0
	ldr	x20, [x0, #16]
	ldr	x8, [x0, #48]
	ldr	x8, [x8]
	mov	x1, #0
	blr	x8
	mov	x0, x19
	bl	_mutex_lock
Lloh0:
	adrp	x8, _AMDGPU_MMHUB_0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_MMHUB_0@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cmp	x8, x22
	b.ne	LBB0_2
; %bb.1:
	mov	x0, x19
	mov	x1, x21
	mov	x2, x22
	b	LBB0_6
LBB0_2:
Lloh3:
	adrp	x23, _AMDGPU_GFXHUB_0@GOTPAGE
Lloh4:
	ldr	x23, [x23, _AMDGPU_GFXHUB_0@GOTPAGEOFF]
	ldr	x8, [x23]
	cmp	x8, x22
	cset	w0, ne
	bl	_BUG_ON
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_5
; %bb.3:
	ldr	w8, [x19, #40]
	cbz	w8, LBB0_5
; %bb.4:
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_7
LBB0_5:
	ldr	x2, [x23]
	mov	x0, x19
	mov	x1, x21
LBB0_6:
	mov	w3, #0
	bl	_gmc_v10_0_flush_vm_hub
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_mutex_unlock
LBB0_7:
	mov	x2, sp
	mov	x0, x19
	mov	w1, #64
	bl	_amdgpu_job_alloc_with_ib
	mov	x21, x0
	cbnz	w0, LBB0_10
; %bb.8:
	ldr	w0, [x19, #24]
	bl	_amdgpu_gmc_pd_addr
	ldr	x8, [sp]
	str	w0, [x8, #16]
	mov	w9, #1
	str	w9, [x8]
	ldr	x9, [x20]
	ldr	w9, [x9]
	ldr	x1, [x8, #8]
	ldr	x8, [x1, #8]
	ldrsw	x10, [x1]
	add	w11, w10, #1
	str	w11, [x1]
	str	w9, [x8, x10, lsl #2]
	mov	x0, x20
	bl	_amdgpu_ring_pad_ib
	ldr	x0, [sp]
	add	x1, x19, #4
Lloh5:
	adrp	x8, _AMDGPU_FENCE_OWNER_UNDEFINED@GOTPAGE
Lloh6:
	ldr	x8, [x8, _AMDGPU_FENCE_OWNER_UNDEFINED@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	add	x3, sp, #8
	bl	_amdgpu_job_submit
	cbz	w0, LBB0_12
; %bb.9:
	mov	x21, x0
	ldr	x0, [sp]
	bl	_amdgpu_job_free
LBB0_10:
	mov	x0, x19
	bl	_mutex_unlock
Lloh8:
	adrp	x0, l_.str@PAGE
Lloh9:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x21
	bl	_DRM_ERROR
LBB0_11:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_12:
	mov	x0, x19
	bl	_mutex_unlock
	ldr	x0, [sp, #8]
	mov	w1, #0
	bl	_dma_fence_wait
	ldr	x0, [sp, #8]
	bl	_dma_fence_put
	b	LBB0_11
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_MMHUB_0,8,3             ; @AMDGPU_MMHUB_0
	.comm	_AMDGPU_GFXHUB_0,8,3            ; @AMDGPU_GFXHUB_0
	.comm	_AMDGPU_FENCE_OWNER_UNDEFINED,4,2 ; @AMDGPU_FENCE_OWNER_UNDEFINED
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Error flushing GPU TLB using the SDMA (%d)!\n"

	.no_dead_strip	_gmc_v10_0_flush_gpu_tlb
.subsections_via_symbols
