	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dpu_hw_sspp_setup_pe_config
_dpu_hw_sspp_setup_pe_config:           ## @dpu_hw_sspp_setup_pe_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	movq	_DPU_SSPP_SRC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-100(%rbp), %rdx
	callq	__sspp_subblk_offset
	testq	%rbx, %rbx
	je	LBB0_7
## %bb.1:
	testq	%rax, %rax
	jne	LBB0_7
## %bb.2:
	movq	_DPU_MAX_PLANES@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	shlq	$2, %rax
	xorl	%ecx, %ecx
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_3 Depth=1
	addq	$4, %rcx
	cmpq	%rcx, %rax
	je	LBB0_6
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	cmpq	$8, %rcx
	je	LBB0_5
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	(%rbx), %rdx
	movq	8(%rbx), %rsi
	movl	(%rdx,%rcx), %edx
	shll	$24, %edx
	movl	(%rsi,%rcx), %esi
	movzbl	%sil, %esi
	shll	$16, %esi
	orl	%edx, %esi
	movq	16(%rbx), %rdx
	movl	(%rdx,%rcx), %edx
	shll	$8, %edx
	movzwl	%dx, %edx
	orl	%esi, %edx
	movq	24(%rbx), %rsi
	movzbl	(%rsi,%rcx), %esi
	orl	%edx, %esi
	movl	%esi, -64(%rbp,%rcx)
	movq	32(%rbx), %rdx
	movq	40(%rbx), %rsi
	movl	(%rdx,%rcx), %edx
	shll	$24, %edx
	movl	(%rsi,%rcx), %esi
	movzbl	%sil, %esi
	shll	$16, %esi
	orl	%edx, %esi
	movq	48(%rbx), %rdx
	movl	(%rdx,%rcx), %edx
	shll	$8, %edx
	movzwl	%dx, %edx
	orl	%esi, %edx
	movq	56(%rbx), %rsi
	movzbl	(%rsi,%rcx), %esi
	orl	%edx, %esi
	movl	%esi, -80(%rbp,%rcx)
	movq	64(%rbx), %rdx
	movq	72(%rbx), %rsi
	movl	(%rsi,%rcx), %esi
	addl	(%rdx,%rcx), %esi
	movq	80(%rbx), %rdx
	addl	(%rdx,%rcx), %esi
	movq	88(%rbx), %rdx
	movq	96(%rbx), %rdi
	movl	(%rdi,%rcx), %edi
	addl	(%rdx,%rcx), %edi
	movq	104(%rbx), %rdx
	addl	(%rdx,%rcx), %edi
	shll	$16, %esi
	movzwl	%di, %edx
	orl	%esi, %edx
	movl	%edx, -96(%rbp,%rcx)
	jmp	LBB0_5
LBB0_6:
	movl	-64(%rbp), %edx
	movl	-60(%rbp), %r15d
	movl	-80(%rbp), %r13d
	movl	-76(%rbp), %eax
	movl	%eax, -104(%rbp)                ## 4-byte Spill
	movl	-96(%rbp), %r12d
	movl	-92(%rbp), %eax
	movl	%eax, -108(%rbp)                ## 4-byte Spill
	movl	-52(%rbp), %ebx
	movl	-84(%rbp), %eax
	movl	%eax, -112(%rbp)                ## 4-byte Spill
	movq	_SSPP_SW_PIX_EXT_C0_LR@GOTPCREL(%rip), %rax
	movl	-100(%rbp), %esi
	addl	(%rax), %esi
	movq	%r14, %rdi
	callq	_DPU_REG_WRITE
	movq	_SSPP_SW_PIX_EXT_C0_TB@GOTPCREL(%rip), %rax
	movl	-100(%rbp), %esi
	addl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r13d, %edx
	callq	_DPU_REG_WRITE
	movq	_SSPP_SW_PIX_EXT_C0_REQ_PIXELS@GOTPCREL(%rip), %rax
	movl	-100(%rbp), %esi
	addl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r12d, %edx
	callq	_DPU_REG_WRITE
	movq	_SSPP_SW_PIX_EXT_C1C2_LR@GOTPCREL(%rip), %rax
	movl	-100(%rbp), %esi
	addl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_DPU_REG_WRITE
	movq	_SSPP_SW_PIX_EXT_C1C2_TB@GOTPCREL(%rip), %rax
	movl	-100(%rbp), %esi
	addl	(%rax), %esi
	movq	%r14, %rdi
	movl	-104(%rbp), %edx                ## 4-byte Reload
	callq	_DPU_REG_WRITE
	movq	_SSPP_SW_PIX_EXT_C1C2_REQ_PIXELS@GOTPCREL(%rip), %rax
	movl	-100(%rbp), %esi
	addl	(%rax), %esi
	movq	%r14, %rdi
	movl	-108(%rbp), %edx                ## 4-byte Reload
	callq	_DPU_REG_WRITE
	movq	_SSPP_SW_PIX_EXT_C3_LR@GOTPCREL(%rip), %rax
	movl	-100(%rbp), %esi
	addl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_DPU_REG_WRITE
	movq	_SSPP_SW_PIX_EXT_C3_TB@GOTPCREL(%rip), %rax
	movl	-100(%rbp), %esi
	addl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_DPU_REG_WRITE
	movq	_SSPP_SW_PIX_EXT_C3_REQ_PIXELS@GOTPCREL(%rip), %rax
	movl	-100(%rbp), %esi
	addl	(%rax), %esi
	movq	%r14, %rdi
	movl	-112(%rbp), %edx                ## 4-byte Reload
	callq	_DPU_REG_WRITE
LBB0_7:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_9
## %bb.8:
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_9:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.comm	_DPU_SSPP_SRC,4,2               ## @DPU_SSPP_SRC
	.comm	_DPU_MAX_PLANES,4,2             ## @DPU_MAX_PLANES
	.comm	_SSPP_SW_PIX_EXT_C0_LR,4,2      ## @SSPP_SW_PIX_EXT_C0_LR
	.comm	_SSPP_SW_PIX_EXT_C0_TB,4,2      ## @SSPP_SW_PIX_EXT_C0_TB
	.comm	_SSPP_SW_PIX_EXT_C0_REQ_PIXELS,4,2 ## @SSPP_SW_PIX_EXT_C0_REQ_PIXELS
	.comm	_SSPP_SW_PIX_EXT_C1C2_LR,4,2    ## @SSPP_SW_PIX_EXT_C1C2_LR
	.comm	_SSPP_SW_PIX_EXT_C1C2_TB,4,2    ## @SSPP_SW_PIX_EXT_C1C2_TB
	.comm	_SSPP_SW_PIX_EXT_C1C2_REQ_PIXELS,4,2 ## @SSPP_SW_PIX_EXT_C1C2_REQ_PIXELS
	.comm	_SSPP_SW_PIX_EXT_C3_LR,4,2      ## @SSPP_SW_PIX_EXT_C3_LR
	.comm	_SSPP_SW_PIX_EXT_C3_TB,4,2      ## @SSPP_SW_PIX_EXT_C3_TB
	.comm	_SSPP_SW_PIX_EXT_C3_REQ_PIXELS,4,2 ## @SSPP_SW_PIX_EXT_C3_REQ_PIXELS
	.no_dead_strip	_dpu_hw_sspp_setup_pe_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dpu_hw_sspp_setup_pe_config
_dpu_hw_sspp_setup_pe_config:           ; @dpu_hw_sspp_setup_pe_config
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #56]
Lloh3:
	adrp	x8, _DPU_SSPP_SRC@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DPU_SSPP_SRC@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	add	x2, sp, #4
	bl	__sspp_subblk_offset
	cbz	x20, LBB0_7
; %bb.1:
	cbnz	x0, LBB0_7
; %bb.2:
	mov	x8, #0
Lloh6:
	adrp	x9, _DPU_MAX_PLANES@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DPU_MAX_PLANES@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	lsl	x9, x9, #2
	add	x10, sp, #40
	add	x11, sp, #24
	add	x12, sp, #8
	b	LBB0_4
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	x8, x8, #4
	cmp	x9, x8
	b.eq	LBB0_6
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	cmp	x8, #8
	b.eq	LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	ldp	x13, x14, [x20]
	ldr	w13, [x13, x8]
	lsl	w13, w13, #24
	ldr	w14, [x14, x8]
	bfi	w13, w14, #16, #8
	ldp	x14, x15, [x20, #16]
	ldr	w14, [x14, x8]
	bfi	w13, w14, #8, #8
	ldrb	w14, [x15, x8]
	ldp	x15, x16, [x20, #32]
	ldr	w15, [x15, x8]
	orr	w13, w13, w14
	lsl	w14, w15, #24
	ldr	w15, [x16, x8]
	bfi	w14, w15, #16, #8
	ldp	x15, x16, [x20, #48]
	ldr	w15, [x15, x8]
	bfi	w14, w15, #8, #8
	ldp	x15, x17, [x20, #64]
	ldr	w15, [x15, x8]
	ldr	w17, [x17, x8]
	ldp	x0, x1, [x20, #80]
	ldr	w0, [x0, x8]
	add	w15, w17, w15
	add	w15, w15, w0
	ldr	w17, [x1, x8]
	ldp	x0, x1, [x20, #96]
	ldr	w0, [x0, x8]
	ldr	w1, [x1, x8]
	add	w17, w0, w17
	add	w17, w17, w1
	str	w13, [x10, x8]
	ldrb	w13, [x16, x8]
	bfi	w17, w15, #16, #16
	orr	w13, w14, w13
	str	w13, [x11, x8]
	str	w17, [x12, x8]
	b	LBB0_3
LBB0_6:
	ldp	w2, w23, [sp, #40]
	ldp	w24, w25, [sp, #24]
	ldp	w26, w22, [sp, #8]
	ldr	w21, [sp, #52]
	ldr	w20, [sp, #20]
Lloh9:
	adrp	x8, _SSPP_SW_PIX_EXT_C0_LR@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SSPP_SW_PIX_EXT_C0_LR@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	ldr	w9, [sp, #4]
	add	w1, w9, w8
	mov	x0, x19
	bl	_DPU_REG_WRITE
Lloh12:
	adrp	x8, _SSPP_SW_PIX_EXT_C0_TB@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SSPP_SW_PIX_EXT_C0_TB@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	ldr	w9, [sp, #4]
	add	w1, w9, w8
	mov	x0, x19
	mov	x2, x24
	bl	_DPU_REG_WRITE
Lloh15:
	adrp	x8, _SSPP_SW_PIX_EXT_C0_REQ_PIXELS@GOTPAGE
Lloh16:
	ldr	x8, [x8, _SSPP_SW_PIX_EXT_C0_REQ_PIXELS@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	ldr	w9, [sp, #4]
	add	w1, w9, w8
	mov	x0, x19
	mov	x2, x26
	bl	_DPU_REG_WRITE
Lloh18:
	adrp	x8, _SSPP_SW_PIX_EXT_C1C2_LR@GOTPAGE
Lloh19:
	ldr	x8, [x8, _SSPP_SW_PIX_EXT_C1C2_LR@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	ldr	w9, [sp, #4]
	add	w1, w9, w8
	mov	x0, x19
	mov	x2, x23
	bl	_DPU_REG_WRITE
Lloh21:
	adrp	x8, _SSPP_SW_PIX_EXT_C1C2_TB@GOTPAGE
Lloh22:
	ldr	x8, [x8, _SSPP_SW_PIX_EXT_C1C2_TB@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	ldr	w9, [sp, #4]
	add	w1, w9, w8
	mov	x0, x19
	mov	x2, x25
	bl	_DPU_REG_WRITE
Lloh24:
	adrp	x8, _SSPP_SW_PIX_EXT_C1C2_REQ_PIXELS@GOTPAGE
Lloh25:
	ldr	x8, [x8, _SSPP_SW_PIX_EXT_C1C2_REQ_PIXELS@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	ldr	w9, [sp, #4]
	add	w1, w9, w8
	mov	x0, x19
	mov	x2, x22
	bl	_DPU_REG_WRITE
Lloh27:
	adrp	x8, _SSPP_SW_PIX_EXT_C3_LR@GOTPAGE
Lloh28:
	ldr	x8, [x8, _SSPP_SW_PIX_EXT_C3_LR@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	ldr	w9, [sp, #4]
	add	w1, w9, w8
	mov	x0, x19
	mov	x2, x21
	bl	_DPU_REG_WRITE
Lloh30:
	adrp	x8, _SSPP_SW_PIX_EXT_C3_TB@GOTPAGE
Lloh31:
	ldr	x8, [x8, _SSPP_SW_PIX_EXT_C3_TB@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	ldr	w9, [sp, #4]
	add	w1, w9, w8
	mov	x0, x19
	mov	x2, x21
	bl	_DPU_REG_WRITE
Lloh33:
	adrp	x8, _SSPP_SW_PIX_EXT_C3_REQ_PIXELS@GOTPAGE
Lloh34:
	ldr	x8, [x8, _SSPP_SW_PIX_EXT_C3_REQ_PIXELS@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	ldr	w9, [sp, #4]
	add	w1, w9, w8
	mov	x0, x19
	mov	x2, x20
	bl	_DPU_REG_WRITE
LBB0_7:
	ldr	x8, [sp, #56]
Lloh36:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh37:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh38:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_9
; %bb.8:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
LBB0_9:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.cfi_endproc
                                        ; -- End function
	.comm	_DPU_SSPP_SRC,4,2               ; @DPU_SSPP_SRC
	.comm	_DPU_MAX_PLANES,4,2             ; @DPU_MAX_PLANES
	.comm	_SSPP_SW_PIX_EXT_C0_LR,4,2      ; @SSPP_SW_PIX_EXT_C0_LR
	.comm	_SSPP_SW_PIX_EXT_C0_TB,4,2      ; @SSPP_SW_PIX_EXT_C0_TB
	.comm	_SSPP_SW_PIX_EXT_C0_REQ_PIXELS,4,2 ; @SSPP_SW_PIX_EXT_C0_REQ_PIXELS
	.comm	_SSPP_SW_PIX_EXT_C1C2_LR,4,2    ; @SSPP_SW_PIX_EXT_C1C2_LR
	.comm	_SSPP_SW_PIX_EXT_C1C2_TB,4,2    ; @SSPP_SW_PIX_EXT_C1C2_TB
	.comm	_SSPP_SW_PIX_EXT_C1C2_REQ_PIXELS,4,2 ; @SSPP_SW_PIX_EXT_C1C2_REQ_PIXELS
	.comm	_SSPP_SW_PIX_EXT_C3_LR,4,2      ; @SSPP_SW_PIX_EXT_C3_LR
	.comm	_SSPP_SW_PIX_EXT_C3_TB,4,2      ; @SSPP_SW_PIX_EXT_C3_TB
	.comm	_SSPP_SW_PIX_EXT_C3_REQ_PIXELS,4,2 ; @SSPP_SW_PIX_EXT_C3_REQ_PIXELS
	.no_dead_strip	_dpu_hw_sspp_setup_pe_config
.subsections_via_symbols
