	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_set_pp_feature_status
_amdgpu_set_pp_feature_status:          ## @amdgpu_set_pp_feature_status
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r15
	movq	%rdx, %rbx
	callq	_dev_get_drvdata
	movq	(%rax), %r14
	leaq	-28(%rbp), %rdx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_kstrtou64
	testl	%eax, %eax
	jne	LBB0_6
## %bb.1:
	movl	-28(%rbp), %esi
	leaq	L_.str(%rip), %rdi
	callq	_pr_debug
	movq	%r14, %rdi
	callq	_is_support_sw_smu
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	addq	$8, %r14
	movl	-28(%rbp), %esi
	movq	%r14, %rdi
	callq	_smu_sys_set_pp_feature_mask
	testl	%eax, %eax
	jne	LBB0_6
	jmp	LBB0_7
LBB0_3:
	movq	(%r14), %rax
	cmpq	$0, (%rax)
	je	LBB0_7
## %bb.4:
	movl	-28(%rbp), %esi
	movq	%r14, %rdi
	callq	_amdgpu_dpm_set_ppfeature_status
	testl	%eax, %eax
	je	LBB0_7
LBB0_6:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subq	(%rax), %r15
LBB0_7:
	movq	%r15, %rax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,8,3                     ## @EINVAL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"featuremask = 0x%llx\n"

	.no_dead_strip	_amdgpu_set_pp_feature_status
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_set_pp_feature_status
_amdgpu_set_pp_feature_status:          ; @amdgpu_set_pp_feature_status
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x3
	mov	x21, x2
	bl	_dev_get_drvdata
	ldr	x20, [x0]
	add	x2, sp, #12
	mov	x0, x21
	mov	w1, #0
	bl	_kstrtou64
	cbz	w0, LBB0_3
LBB0_1:
Lloh0:
	adrp	x8, _EINVAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	neg	x19, x8
LBB0_2:
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_3:
	ldr	w1, [sp, #12]
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_debug
	mov	x0, x20
	bl	_is_support_sw_smu
	cbz	x0, LBB0_5
; %bb.4:
	add	x0, x20, #8
	ldr	w1, [sp, #12]
	bl	_smu_sys_set_pp_feature_mask
	cbnz	w0, LBB0_1
	b	LBB0_2
LBB0_5:
	ldr	x8, [x20]
	ldr	x8, [x8]
	cbz	x8, LBB0_2
; %bb.6:
	ldr	w1, [sp, #12]
	mov	x0, x20
	bl	_amdgpu_dpm_set_ppfeature_status
	cbnz	w0, LBB0_1
	b	LBB0_2
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,8,3                     ; @EINVAL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"featuremask = 0x%llx\n"

	.no_dead_strip	_amdgpu_set_pp_feature_status
.subsections_via_symbols
