	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gen8_emit_flush_render
_gen8_emit_flush_render:                ## @gen8_emit_flush_render
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r12d
	movq	%rdi, %r15
	movq	8(%rdi), %rax
	movl	(%rax), %edi
	movq	_INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_intel_gt_scratch_offset
	movq	_PIPE_CONTROL_CS_STALL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_EMIT_FLUSH@GOTPCREL(%rip), %rcx
	testl	%r12d, (%rcx)
	je	LBB0_2
## %bb.1:
	movq	_PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_PIPE_CONTROL_DEPTH_CACHE_FLUSH@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_PIPE_CONTROL_DC_FLUSH_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_PIPE_CONTROL_FLUSH_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
LBB0_2:
	movq	_EMIT_INVALIDATE@GOTPCREL(%rip), %rcx
	movb	$1, %r13b
	testl	%r12d, (%rcx)
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	je	LBB0_3
## %bb.4:
	movq	_PIPE_CONTROL_TLB_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_VF_CACHE_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_CONST_CACHE_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_STATE_CACHE_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_QW_WRITE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_GLOBAL_GTT_IVB@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	(%r15), %edi
	movl	$9, %esi
	callq	_IS_GEN
	movq	%rax, %r12
	movl	(%r15), %edi
	movq	_KBL_REVID_B0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_IS_KBL_REVID
	testq	%r12, %r12
	sete	%r14b
	movl	$6, %ecx
	movl	$12, %esi
	cmovel	%ecx, %esi
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	addl	$12, %esi
	xorl	%r13d, %r13d
	jmp	LBB0_6
LBB0_3:
	movl	$6, %esi
	movb	$1, %r14b
LBB0_6:
	movq	%r15, %rdi
	callq	_intel_ring_begin
	movq	%rax, %r12
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_7
## %bb.13:
	movq	%r12, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_PTR_ERR                        ## TAILCALL
LBB0_7:
	testb	%r14b, %r14b
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	jne	LBB0_9
## %bb.8:
	movq	%r12, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_gen8_emit_pipe_control
	movq	%rax, %r12
LBB0_9:
	testb	%r13b, %r13b
	je	LBB0_11
## %bb.10:
	movq	%r12, %rdi
	movl	%ebx, %esi
	movl	%r14d, %edx
	jmp	LBB0_12
LBB0_11:
	movq	_PIPE_CONTROL_DC_FLUSH_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_gen8_emit_pipe_control
	movq	%rax, %rdi
	movl	%ebx, %esi
	movl	%r14d, %edx
	callq	_gen8_emit_pipe_control
	movq	_PIPE_CONTROL_CS_STALL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	%rax, %rdi
	xorl	%edx, %edx
LBB0_12:
	callq	_gen8_emit_pipe_control
	movq	%r15, %rdi
	movq	%rax, %rsi
	callq	_intel_ring_advance
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH,4,2 ## @INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH
	.comm	_PIPE_CONTROL_CS_STALL,4,2      ## @PIPE_CONTROL_CS_STALL
	.comm	_EMIT_FLUSH,4,2                 ## @EMIT_FLUSH
	.comm	_PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH,4,2 ## @PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH
	.comm	_PIPE_CONTROL_DEPTH_CACHE_FLUSH,4,2 ## @PIPE_CONTROL_DEPTH_CACHE_FLUSH
	.comm	_PIPE_CONTROL_DC_FLUSH_ENABLE,4,2 ## @PIPE_CONTROL_DC_FLUSH_ENABLE
	.comm	_PIPE_CONTROL_FLUSH_ENABLE,4,2  ## @PIPE_CONTROL_FLUSH_ENABLE
	.comm	_EMIT_INVALIDATE,4,2            ## @EMIT_INVALIDATE
	.comm	_PIPE_CONTROL_TLB_INVALIDATE,4,2 ## @PIPE_CONTROL_TLB_INVALIDATE
	.comm	_PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE,4,2 ## @PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE,4,2 ## @PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_VF_CACHE_INVALIDATE,4,2 ## @PIPE_CONTROL_VF_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_CONST_CACHE_INVALIDATE,4,2 ## @PIPE_CONTROL_CONST_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_STATE_CACHE_INVALIDATE,4,2 ## @PIPE_CONTROL_STATE_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_QW_WRITE,4,2      ## @PIPE_CONTROL_QW_WRITE
	.comm	_PIPE_CONTROL_GLOBAL_GTT_IVB,4,2 ## @PIPE_CONTROL_GLOBAL_GTT_IVB
	.comm	_KBL_REVID_B0,4,2               ## @KBL_REVID_B0
	.no_dead_strip	_gen8_emit_flush_render
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gen8_emit_flush_render
_gen8_emit_flush_render:                ; @gen8_emit_flush_render
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x23, x1
	mov	x19, x0
	ldr	x8, [x0, #8]
	ldr	w0, [x8]
Lloh0:
	adrp	x8, _INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_intel_gt_scratch_offset
	mov	x20, x0
Lloh3:
	adrp	x24, _PIPE_CONTROL_CS_STALL@GOTPAGE
Lloh4:
	ldr	x24, [x24, _PIPE_CONTROL_CS_STALL@GOTPAGEOFF]
	ldr	w21, [x24]
Lloh5:
	adrp	x8, _EMIT_FLUSH@GOTPAGE
Lloh6:
	ldr	x8, [x8, _EMIT_FLUSH@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	tst	w8, w23
	b.eq	LBB0_2
; %bb.1:
Lloh8:
	adrp	x8, _PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	orr	w8, w8, w21
Lloh11:
	adrp	x9, _PIPE_CONTROL_DEPTH_CACHE_FLUSH@GOTPAGE
Lloh12:
	ldr	x9, [x9, _PIPE_CONTROL_DEPTH_CACHE_FLUSH@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh14:
	adrp	x9, _PIPE_CONTROL_DC_FLUSH_ENABLE@GOTPAGE
Lloh15:
	ldr	x9, [x9, _PIPE_CONTROL_DC_FLUSH_ENABLE@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh17:
	adrp	x9, _PIPE_CONTROL_FLUSH_ENABLE@GOTPAGE
Lloh18:
	ldr	x9, [x9, _PIPE_CONTROL_FLUSH_ENABLE@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w21, w8, w9
LBB0_2:
Lloh20:
	adrp	x8, _EMIT_INVALIDATE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _EMIT_INVALIDATE@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	mov	w22, #6
	tst	w8, w23
	b.eq	LBB0_5
; %bb.3:
Lloh23:
	adrp	x8, _PIPE_CONTROL_TLB_INVALIDATE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PIPE_CONTROL_TLB_INVALIDATE@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	orr	w8, w8, w21
Lloh26:
	adrp	x9, _PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE@GOTPAGE
Lloh27:
	ldr	x9, [x9, _PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
Lloh29:
	adrp	x10, _PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE@GOTPAGE
Lloh30:
	ldr	x10, [x10, _PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh31:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh32:
	adrp	x9, _PIPE_CONTROL_VF_CACHE_INVALIDATE@GOTPAGE
Lloh33:
	ldr	x9, [x9, _PIPE_CONTROL_VF_CACHE_INVALIDATE@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh35:
	adrp	x9, _PIPE_CONTROL_CONST_CACHE_INVALIDATE@GOTPAGE
Lloh36:
	ldr	x9, [x9, _PIPE_CONTROL_CONST_CACHE_INVALIDATE@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
Lloh38:
	adrp	x10, _PIPE_CONTROL_STATE_CACHE_INVALIDATE@GOTPAGE
Lloh39:
	ldr	x10, [x10, _PIPE_CONTROL_STATE_CACHE_INVALIDATE@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh40:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh41:
	adrp	x9, _PIPE_CONTROL_QW_WRITE@GOTPAGE
Lloh42:
	ldr	x9, [x9, _PIPE_CONTROL_QW_WRITE@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh44:
	adrp	x9, _PIPE_CONTROL_GLOBAL_GTT_IVB@GOTPAGE
Lloh45:
	ldr	x9, [x9, _PIPE_CONTROL_GLOBAL_GTT_IVB@GOTPAGEOFF]
Lloh46:
	ldr	w9, [x9]
	orr	w21, w8, w9
	ldr	w0, [x19]
	mov	w1, #9
	bl	_IS_GEN
	mov	x23, x0
	ldr	w0, [x19]
Lloh47:
	adrp	x8, _KBL_REVID_B0@GOTPAGE
Lloh48:
	ldr	x8, [x8, _KBL_REVID_B0@GOTPAGEOFF]
Lloh49:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_IS_KBL_REVID
	cmp	x23, #0
	cset	w23, eq
	mov	w8, #12
	csel	w22, w22, w8, eq
	cbz	x0, LBB0_6
; %bb.4:
	mov	w25, #0
	add	w22, w22, #12
	b	LBB0_7
LBB0_5:
	mov	w23, #1
LBB0_6:
	mov	w25, #1
LBB0_7:
	mov	x0, x19
	mov	x1, x22
	bl	_intel_ring_begin
	mov	x22, x0
	bl	_IS_ERR
	cbz	x0, LBB0_9
; %bb.8:
	mov	x0, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_PTR_ERR
LBB0_9:
	tbnz	w23, #0, LBB0_11
; %bb.10:
	mov	x0, x22
	mov	w1, #0
	mov	w2, #0
	bl	_gen8_emit_pipe_control
	mov	x22, x0
LBB0_11:
	cbz	w25, LBB0_13
; %bb.12:
	mov	x0, x22
	mov	x1, x21
	mov	x2, x20
	b	LBB0_14
LBB0_13:
Lloh50:
	adrp	x8, _PIPE_CONTROL_DC_FLUSH_ENABLE@GOTPAGE
Lloh51:
	ldr	x8, [x8, _PIPE_CONTROL_DC_FLUSH_ENABLE@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	x0, x22
	mov	w2, #0
	bl	_gen8_emit_pipe_control
	mov	x1, x21
	mov	x2, x20
	bl	_gen8_emit_pipe_control
	ldr	w1, [x24]
	mov	w2, #0
LBB0_14:
	bl	_gen8_emit_pipe_control
	mov	x1, x0
	mov	x0, x19
	bl	_intel_ring_advance
	mov	w0, #0
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH,4,2 ; @INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH
	.comm	_PIPE_CONTROL_CS_STALL,4,2      ; @PIPE_CONTROL_CS_STALL
	.comm	_EMIT_FLUSH,4,2                 ; @EMIT_FLUSH
	.comm	_PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH,4,2 ; @PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH
	.comm	_PIPE_CONTROL_DEPTH_CACHE_FLUSH,4,2 ; @PIPE_CONTROL_DEPTH_CACHE_FLUSH
	.comm	_PIPE_CONTROL_DC_FLUSH_ENABLE,4,2 ; @PIPE_CONTROL_DC_FLUSH_ENABLE
	.comm	_PIPE_CONTROL_FLUSH_ENABLE,4,2  ; @PIPE_CONTROL_FLUSH_ENABLE
	.comm	_EMIT_INVALIDATE,4,2            ; @EMIT_INVALIDATE
	.comm	_PIPE_CONTROL_TLB_INVALIDATE,4,2 ; @PIPE_CONTROL_TLB_INVALIDATE
	.comm	_PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE,4,2 ; @PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE,4,2 ; @PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_VF_CACHE_INVALIDATE,4,2 ; @PIPE_CONTROL_VF_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_CONST_CACHE_INVALIDATE,4,2 ; @PIPE_CONTROL_CONST_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_STATE_CACHE_INVALIDATE,4,2 ; @PIPE_CONTROL_STATE_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_QW_WRITE,4,2      ; @PIPE_CONTROL_QW_WRITE
	.comm	_PIPE_CONTROL_GLOBAL_GTT_IVB,4,2 ; @PIPE_CONTROL_GLOBAL_GTT_IVB
	.comm	_KBL_REVID_B0,4,2               ; @KBL_REVID_B0
	.no_dead_strip	_gen8_emit_flush_render
.subsections_via_symbols
