	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_ctx_ioctl               ## -- Begin function amdgpu_ctx_ioctl
	.p2align	4, 0x90
_amdgpu_ctx_ioctl:                      ## @amdgpu_ctx_ioctl
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movq	%rsi, %rbx
	movq	(%rdi), %r12
	movq	(%rdx), %r14
	movl	8(%rsi), %r13d
	movl	%r13d, -44(%rbp)
	movl	4(%rsi), %edi
	callq	_amdgpu_to_sched_priority
	movl	(%rbx), %ecx
	addl	$-128, %ecx
	cmpl	$3, %ecx
	ja	LBB0_8
## %bb.1:
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%rcx,4), %rcx
	addq	%rdx, %rcx
	jmpq	*%rcx
LBB0_7:
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	%r13d, %edx
	movq	%rbx, %rcx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ctx_query2              ## TAILCALL
LBB0_5:
	movq	%r14, %rdi
	movl	%r13d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ctx_free                ## TAILCALL
LBB0_2:
	movq	_DRM_SCHED_PRIORITY_INVALID@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_4
## %bb.3:
	movq	_DRM_SCHED_PRIORITY_NORMAL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_4:
	leaq	-44(%rbp), %r8
	movq	%r12, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	%eax, %ecx
	callq	_amdgpu_ctx_alloc
	movl	-44(%rbp), %ecx
	movl	%ecx, (%rbx)
	jmp	LBB0_9
LBB0_8:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_9:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	%r13d, %edx
	movq	%rbx, %rcx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ctx_query               ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
LJTI0_0:
	.long	L0_0_set_7
	.long	L0_0_set_6
	.long	L0_0_set_5
	.long	L0_0_set_2
	.end_data_region
                                        ## -- End function
	.comm	_DRM_SCHED_PRIORITY_INVALID,4,2 ## @DRM_SCHED_PRIORITY_INVALID
	.comm	_DRM_SCHED_PRIORITY_NORMAL,4,2  ## @DRM_SCHED_PRIORITY_NORMAL
	.comm	_EINVAL,4,2                     ## @EINVAL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_ctx_ioctl               ; -- Begin function amdgpu_ctx_ioctl
	.p2align	2
_amdgpu_ctx_ioctl:                      ; @amdgpu_ctx_ioctl
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x19, x1
	ldr	x22, [x0]
	ldr	x20, [x2]
	ldp	w0, w23, [x1, #4]
	str	w23, [sp, #12]
	bl	_amdgpu_to_sched_priority
	ldr	w8, [x19]
	sub	w8, w8, #128
	cmp	w8, #3
	b.hi	LBB0_3
; %bb.1:
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
	mov	x0, x22
	mov	x1, x20
	mov	x2, x23
	mov	x3, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_amdgpu_ctx_query2
LBB0_3:
Lloh2:
	adrp	x8, _EINVAL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_7
LBB0_4:
	mov	x0, x22
	mov	x1, x20
	mov	x2, x23
	mov	x3, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_amdgpu_ctx_query
LBB0_5:
	mov	x0, x20
	mov	x1, x23
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_amdgpu_ctx_free
LBB0_6:
Lloh5:
	adrp	x8, _DRM_SCHED_PRIORITY_INVALID@GOTPAGE
Lloh6:
	ldr	x8, [x8, _DRM_SCHED_PRIORITY_INVALID@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
Lloh8:
	adrp	x9, _DRM_SCHED_PRIORITY_NORMAL@GOTPAGE
Lloh9:
	ldr	x9, [x9, _DRM_SCHED_PRIORITY_NORMAL@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	cmp	w0, w8
	csel	w3, w9, w0, eq
	add	x4, sp, #12
	mov	x0, x22
	mov	x1, x20
	mov	x2, x21
	bl	_amdgpu_ctx_alloc
	ldr	w8, [sp, #12]
	str	w8, [x19]
LBB0_7:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
                                        ; -- End function
	.comm	_DRM_SCHED_PRIORITY_INVALID,4,2 ; @DRM_SCHED_PRIORITY_INVALID
	.comm	_DRM_SCHED_PRIORITY_NORMAL,4,2  ; @DRM_SCHED_PRIORITY_NORMAL
	.comm	_EINVAL,4,2                     ; @EINVAL
.subsections_via_symbols
