	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_map_buffer
_amdgpu_map_buffer:                     ## @amdgpu_map_buffer
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, %ebx
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	movl	%edx, %r13d
	movq	%rsi, -88(%rbp)                 ## 8-byte Spill
	movq	16(%rbp), %r14
	movq	(%rdi), %rax
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	movq	%r9, -72(%rbp)                  ## 8-byte Spill
	movq	(%r9), %r15
	movq	8(%r15), %rax
	movq	_AMDGPU_GTT_MAX_TRANSFER_SIZE@GOTPCREL(%rip), %r12
	movl	(%r12), %ecx
	shll	$3, %ecx
	xorl	%edi, %edi
	cmpl	%ecx, (%rax)
	setl	%dil
	callq	_BUG_ON
	movl	20(%r15), %eax
	movl	%eax, (%r14)
	movl	(%r12), %ecx
	movq	%rbx, -64(%rbp)                 ## 8-byte Spill
	imull	%ebx, %ecx
	movq	_AMDGPU_GPU_PAGE_SIZE@GOTPCREL(%rip), %rdx
	imull	(%rdx), %ecx
	addl	%eax, %ecx
	movl	%ecx, (%r14)
	movq	8(%r15), %rax
	movl	4(%rax), %eax
	movl	%eax, %r12d
	negl	%r12d
	andl	$7, %r12d
	addl	%eax, %r12d
	movq	%r13, -96(%rbp)                 ## 8-byte Spill
	leal	(,%r13,8), %r14d
	leal	(%r14,%r12,4), %esi
	leaq	-48(%rbp), %rdx
	movq	%r15, %rdi
	callq	_amdgpu_job_alloc_with_ib
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	LBB0_5
## %bb.1:
	leal	(,%r12,4), %r13d
	movq	-48(%rbp), %rax
	movq	(%rax), %rax
	addl	16(%rax), %r13d
	movl	16(%r15), %edi
	callq	_amdgpu_bo_gpu_offset
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
	movq	_AMDGPU_GTT_MAX_TRANSFER_SIZE@GOTPCREL(%rip), %rdx
	imull	(%rdx), %ecx
                                        ## kill: def $eax killed $eax def $rax
	leal	(%rax,%rcx,8), %ecx
	movq	-48(%rbp), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	movl	%r13d, %edx
	movl	%r14d, %r8d
	callq	_amdgpu_emit_copy_buffer
	movq	-48(%rbp), %rax
	movq	(%rax), %rsi
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_amdgpu_ring_pad_ib
	movq	-48(%rbp), %rax
	movq	(%rax), %rax
	xorl	%edi, %edi
	cmpl	%r12d, (%rax)
	seta	%dil
	callq	_WARN_ON
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	-52(%rbp), %eax                 ## 4-byte Reload
	sarl	%cl, %eax
	movslq	%eax, %rbx
	shlq	$2, %rbx
	movq	-80(%rbp), %rsi                 ## 8-byte Reload
	addq	(%rsi), %rbx
	movq	%r15, %rdi
	movq	-88(%rbp), %rdx                 ## 8-byte Reload
	callq	_amdgpu_ttm_tt_pte_flags
	movq	-48(%rbp), %rcx
	movq	(%rcx), %rcx
	movl	%r12d, %r9d
	shlq	$2, %r9
	addq	8(%rcx), %r9
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	-96(%rbp), %rdx                 ## 8-byte Reload
                                        ## kill: def $edx killed $edx killed $rdx
	movq	%rbx, %rcx
	movl	%eax, %r8d
	callq	_amdgpu_gart_map
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	LBB0_4
## %bb.2:
	movq	-48(%rbp), %rdi
	movq	_AMDGPU_FENCE_OWNER_UNDEFINED@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-104(%rbp), %rcx
	movq	%r15, %rsi
	callq	_amdgpu_job_submit
	movl	%eax, %r13d
	testl	%eax, %eax
	je	LBB0_3
LBB0_4:
	movq	-48(%rbp), %rdi
	callq	_amdgpu_job_free
LBB0_5:
	movl	%r13d, %eax
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movq	-104(%rbp), %rdi
	callq	_dma_fence_put
	xorl	%r13d, %r13d
	jmp	LBB0_5
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_GTT_MAX_TRANSFER_SIZE,4,2 ## @AMDGPU_GTT_MAX_TRANSFER_SIZE
	.comm	_AMDGPU_GPU_PAGE_SIZE,4,2       ## @AMDGPU_GPU_PAGE_SIZE
	.comm	_PAGE_SHIFT,4,2                 ## @PAGE_SHIFT
	.comm	_AMDGPU_FENCE_OWNER_UNDEFINED,4,2 ## @AMDGPU_FENCE_OWNER_UNDEFINED
	.no_dead_strip	_amdgpu_map_buffer
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_map_buffer
_amdgpu_map_buffer:                     ; @amdgpu_map_buffer
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x26, x6
	mov	x24, x5
	mov	x25, x4
	str	w3, [sp, #4]                    ; 4-byte Folded Spill
	mov	x20, x2
	str	x1, [sp, #8]                    ; 8-byte Folded Spill
	ldr	x22, [x0]
	ldr	x19, [x5]
	ldr	x8, [x19, #8]
	ldr	w8, [x8]
Lloh0:
	adrp	x21, _AMDGPU_GTT_MAX_TRANSFER_SIZE@GOTPAGE
Lloh1:
	ldr	x21, [x21, _AMDGPU_GTT_MAX_TRANSFER_SIZE@GOTPAGEOFF]
	ldr	w9, [x21]
	cmp	w8, w9, lsl #3
	cset	w0, lt
	bl	_BUG_ON
	ldr	w8, [x19, #20]
	str	w8, [x26]
	ldr	w9, [x21]
Lloh2:
	adrp	x10, _AMDGPU_GPU_PAGE_SIZE@GOTPAGE
Lloh3:
	ldr	x10, [x10, _AMDGPU_GPU_PAGE_SIZE@GOTPAGEOFF]
	mul	w9, w9, w25
Lloh4:
	ldr	w10, [x10]
	madd	w8, w9, w10, w8
	str	w8, [x26]
	ldr	x8, [x19, #8]
	ldr	w8, [x8, #4]
	neg	w9, w8
	and	w9, w9, #0x7
	add	w28, w8, w9
	lsl	w26, w20, #3
	lsl	w23, w28, #2
	add	w1, w23, w26
	add	x2, sp, #24
	mov	x0, x19
	bl	_amdgpu_job_alloc_with_ib
	mov	x27, x0
	cbnz	w0, LBB0_4
; %bb.1:
	ldr	x8, [sp, #24]
	ldr	x8, [x8]
	ldr	w8, [x8, #16]
	add	w27, w23, w8
	ldr	w0, [x19, #16]
	bl	_amdgpu_bo_gpu_offset
	ldr	w8, [x21]
	mul	w8, w25, w8
	add	w3, w0, w8, lsl #3
	ldr	x8, [sp, #24]
	ldr	x1, [x8]
	mov	x0, x19
	mov	x2, x27
	mov	x4, x26
	bl	_amdgpu_emit_copy_buffer
	ldr	x8, [sp, #24]
	ldr	x1, [x8]
	mov	x0, x24
	bl	_amdgpu_ring_pad_ib
	ldr	x8, [sp, #24]
	ldr	x8, [x8]
	ldr	w8, [x8]
	cmp	w8, w28
	cset	w0, hi
	bl	_WARN_ON
	ldr	x8, [x22]
Lloh5:
	adrp	x9, _PAGE_SHIFT@GOTPAGE
Lloh6:
	ldr	x9, [x9, _PAGE_SHIFT@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	ldr	w10, [sp, #4]                   ; 4-byte Folded Reload
	asr	w9, w10, w9
	add	x23, x8, w9, sxtw #2
	mov	x0, x19
	mov	x1, x22
	ldr	x2, [sp, #8]                    ; 8-byte Folded Reload
	bl	_amdgpu_ttm_tt_pte_flags
	mov	x4, x0
	ldr	x8, [sp, #24]
	ldr	x8, [x8]
	ldr	x8, [x8, #8]
	add	x5, x8, w28, uxtw #2
	mov	x0, x19
	mov	w1, #0
	mov	x2, x20
	mov	x3, x23
	bl	_amdgpu_gart_map
	mov	x27, x0
	cbnz	w0, LBB0_3
; %bb.2:
	ldr	x0, [sp, #24]
Lloh8:
	adrp	x8, _AMDGPU_FENCE_OWNER_UNDEFINED@GOTPAGE
Lloh9:
	ldr	x8, [x8, _AMDGPU_FENCE_OWNER_UNDEFINED@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	add	x3, sp, #16
	mov	x1, x19
	bl	_amdgpu_job_submit
	mov	x27, x0
	cbz	w0, LBB0_5
LBB0_3:
	ldr	x0, [sp, #24]
	bl	_amdgpu_job_free
LBB0_4:
	mov	x0, x27
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_5:
	ldr	x0, [sp, #16]
	bl	_dma_fence_put
	b	LBB0_4
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_GTT_MAX_TRANSFER_SIZE,4,2 ; @AMDGPU_GTT_MAX_TRANSFER_SIZE
	.comm	_AMDGPU_GPU_PAGE_SIZE,4,2       ; @AMDGPU_GPU_PAGE_SIZE
	.comm	_PAGE_SHIFT,4,2                 ; @PAGE_SHIFT
	.comm	_AMDGPU_FENCE_OWNER_UNDEFINED,4,2 ; @AMDGPU_FENCE_OWNER_UNDEFINED
	.no_dead_strip	_amdgpu_map_buffer
.subsections_via_symbols
