	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cik_get_pcie_usage
_cik_get_pcie_usage:                    ## @cik_get_pcie_usage
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_AMD_IS_APU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rdi)
	je	LBB0_2
## %bb.1:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	_PCIE_PERF_CNTL_TXCLK@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_EVENT0_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%edi, %edi
	movl	$40, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_EVENT1_SEL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	$104, %ecx
	callq	_REG_SET_FIELD
	movq	_ixPCIE_PERF_CNTL_TXCLK@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	movl	%eax, %esi
	callq	_WREG32_PCIE
	movq	_ixPCIE_PERF_COUNT_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movl	$5, %esi
	callq	_WREG32_PCIE
	movl	$1000, %edi                     ## imm = 0x3E8
	callq	_msleep
	movl	(%rbx), %edi
	movl	$2, %esi
	callq	_WREG32_PCIE
	movl	(%r15), %edi
	callq	_RREG32_PCIE
	movl	%eax, %ebx
	movl	(%r14), %esi
	movq	_COUNTER0_UPPER@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%ebx, %edi
	callq	_REG_GET_FIELD
	movl	(%r14), %esi
	movq	_COUNTER1_UPPER@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%ebx, %edi
	callq	_REG_GET_FIELD
	movq	_ixPCIE_PERF_COUNT0_TXCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_PCIE
	movq	_ixPCIE_PERF_COUNT1_TXCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_RREG32_PCIE                    ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_IS_APU,4,2                 ## @AMD_IS_APU
	.comm	_PCIE_PERF_CNTL_TXCLK,4,2       ## @PCIE_PERF_CNTL_TXCLK
	.comm	_EVENT0_SEL,4,2                 ## @EVENT0_SEL
	.comm	_EVENT1_SEL,4,2                 ## @EVENT1_SEL
	.comm	_ixPCIE_PERF_CNTL_TXCLK,4,2     ## @ixPCIE_PERF_CNTL_TXCLK
	.comm	_ixPCIE_PERF_COUNT_CNTL,4,2     ## @ixPCIE_PERF_COUNT_CNTL
	.comm	_COUNTER0_UPPER,4,2             ## @COUNTER0_UPPER
	.comm	_COUNTER1_UPPER,4,2             ## @COUNTER1_UPPER
	.comm	_ixPCIE_PERF_COUNT0_TXCLK,4,2   ## @ixPCIE_PERF_COUNT0_TXCLK
	.comm	_ixPCIE_PERF_COUNT1_TXCLK,4,2   ## @ixPCIE_PERF_COUNT1_TXCLK
	.no_dead_strip	_cik_get_pcie_usage
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cik_get_pcie_usage
_cik_get_pcie_usage:                    ; @cik_get_pcie_usage
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _AMD_IS_APU@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMD_IS_APU@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_2:
Lloh3:
	adrp	x20, _PCIE_PERF_CNTL_TXCLK@GOTPAGE
Lloh4:
	ldr	x20, [x20, _PCIE_PERF_CNTL_TXCLK@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh5:
	adrp	x8, _EVENT0_SEL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _EVENT0_SEL@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	w0, #0
	mov	w3, #40
	bl	_REG_SET_FIELD
	ldr	w1, [x20]
Lloh8:
	adrp	x8, _EVENT1_SEL@GOTPAGE
Lloh9:
	ldr	x8, [x8, _EVENT1_SEL@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	w3, #104
	bl	_REG_SET_FIELD
	mov	x1, x0
Lloh11:
	adrp	x19, _ixPCIE_PERF_CNTL_TXCLK@GOTPAGE
Lloh12:
	ldr	x19, [x19, _ixPCIE_PERF_CNTL_TXCLK@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_WREG32_PCIE
Lloh13:
	adrp	x21, _ixPCIE_PERF_COUNT_CNTL@GOTPAGE
Lloh14:
	ldr	x21, [x21, _ixPCIE_PERF_COUNT_CNTL@GOTPAGEOFF]
	ldr	w0, [x21]
	mov	w1, #5
	bl	_WREG32_PCIE
	mov	w0, #1000
	bl	_msleep
	ldr	w0, [x21]
	mov	w1, #2
	bl	_WREG32_PCIE
	ldr	w0, [x19]
	bl	_RREG32_PCIE
	mov	x19, x0
	ldr	w1, [x20]
Lloh15:
	adrp	x8, _COUNTER0_UPPER@GOTPAGE
Lloh16:
	ldr	x8, [x8, _COUNTER0_UPPER@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	bl	_REG_GET_FIELD
	ldr	w1, [x20]
Lloh18:
	adrp	x8, _COUNTER1_UPPER@GOTPAGE
Lloh19:
	ldr	x8, [x8, _COUNTER1_UPPER@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_REG_GET_FIELD
Lloh21:
	adrp	x8, _ixPCIE_PERF_COUNT0_TXCLK@GOTPAGE
Lloh22:
	ldr	x8, [x8, _ixPCIE_PERF_COUNT0_TXCLK@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
	bl	_RREG32_PCIE
Lloh24:
	adrp	x8, _ixPCIE_PERF_COUNT1_TXCLK@GOTPAGE
Lloh25:
	ldr	x8, [x8, _ixPCIE_PERF_COUNT1_TXCLK@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_RREG32_PCIE
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_IS_APU,4,2                 ; @AMD_IS_APU
	.comm	_PCIE_PERF_CNTL_TXCLK,4,2       ; @PCIE_PERF_CNTL_TXCLK
	.comm	_EVENT0_SEL,4,2                 ; @EVENT0_SEL
	.comm	_EVENT1_SEL,4,2                 ; @EVENT1_SEL
	.comm	_ixPCIE_PERF_CNTL_TXCLK,4,2     ; @ixPCIE_PERF_CNTL_TXCLK
	.comm	_ixPCIE_PERF_COUNT_CNTL,4,2     ; @ixPCIE_PERF_COUNT_CNTL
	.comm	_COUNTER0_UPPER,4,2             ; @COUNTER0_UPPER
	.comm	_COUNTER1_UPPER,4,2             ; @COUNTER1_UPPER
	.comm	_ixPCIE_PERF_COUNT0_TXCLK,4,2   ; @ixPCIE_PERF_COUNT0_TXCLK
	.comm	_ixPCIE_PERF_COUNT1_TXCLK,4,2   ; @ixPCIE_PERF_COUNT1_TXCLK
	.no_dead_strip	_cik_get_pcie_usage
.subsections_via_symbols
