	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cik_update_cg                  ## -- Begin function cik_update_cg
	.p2align	4, 0x90
_cik_update_cg:                         ## @cik_update_cg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movl	%esi, %r15d
	movq	%rdi, %rbx
	movq	_RADEON_CG_BLOCK_GFX@GOTPCREL(%rip), %rax
	testl	%esi, (%rax)
	je	LBB0_5
## %bb.1:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_cik_enable_gui_idle_interrupt
	movq	%rbx, %rdi
	testl	%r14d, %r14d
	je	LBB0_3
## %bb.2:
	movl	$1, %esi
	callq	_cik_enable_mgcg
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_cik_enable_cgcg
	jmp	LBB0_4
LBB0_3:
	xorl	%esi, %esi
	callq	_cik_enable_cgcg
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_cik_enable_mgcg
LBB0_4:
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_cik_enable_gui_idle_interrupt
LBB0_5:
	movq	_RADEON_CG_BLOCK_MC@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_8
## %bb.6:
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	jne	LBB0_8
## %bb.7:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_cik_enable_mc_mgcg
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_cik_enable_mc_ls
LBB0_8:
	movq	_RADEON_CG_BLOCK_SDMA@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_10
## %bb.9:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_cik_enable_sdma_mgcg
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_cik_enable_sdma_mgls
LBB0_10:
	movq	_RADEON_CG_BLOCK_BIF@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_12
## %bb.11:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_cik_enable_bif_mgls
LBB0_12:
	movq	_RADEON_CG_BLOCK_UVD@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_15
## %bb.13:
	cmpq	$0, 8(%rbx)
	je	LBB0_15
## %bb.14:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_cik_enable_uvd_mgcg
LBB0_15:
	movq	_RADEON_CG_BLOCK_HDP@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_17
## %bb.16:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_cik_enable_hdp_mgcg
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_cik_enable_hdp_ls
LBB0_17:
	movq	_RADEON_CG_BLOCK_VCE@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_18
## %bb.19:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_vce_v2_0_enable_mgcg           ## TAILCALL
LBB0_18:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_CG_BLOCK_GFX,4,2        ## @RADEON_CG_BLOCK_GFX
	.comm	_RADEON_CG_BLOCK_MC,4,2         ## @RADEON_CG_BLOCK_MC
	.comm	_RADEON_IS_IGP,4,2              ## @RADEON_IS_IGP
	.comm	_RADEON_CG_BLOCK_SDMA,4,2       ## @RADEON_CG_BLOCK_SDMA
	.comm	_RADEON_CG_BLOCK_BIF,4,2        ## @RADEON_CG_BLOCK_BIF
	.comm	_RADEON_CG_BLOCK_UVD,4,2        ## @RADEON_CG_BLOCK_UVD
	.comm	_RADEON_CG_BLOCK_HDP,4,2        ## @RADEON_CG_BLOCK_HDP
	.comm	_RADEON_CG_BLOCK_VCE,4,2        ## @RADEON_CG_BLOCK_VCE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cik_update_cg                  ; -- Begin function cik_update_cg
	.p2align	2
_cik_update_cg:                         ; @cik_update_cg
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x21, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _RADEON_CG_BLOCK_GFX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_CG_BLOCK_GFX@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	tst	w8, w1
	b.eq	LBB0_5
; %bb.1:
	mov	x0, x20
	mov	w1, #0
	bl	_cik_enable_gui_idle_interrupt
	mov	x0, x20
	cbz	w19, LBB0_3
; %bb.2:
	mov	w1, #1
	bl	_cik_enable_mgcg
	mov	x0, x20
	mov	w1, #1
	bl	_cik_enable_cgcg
	b	LBB0_4
LBB0_3:
	mov	w1, #0
	bl	_cik_enable_cgcg
	mov	x0, x20
	mov	w1, #0
	bl	_cik_enable_mgcg
LBB0_4:
	mov	x0, x20
	mov	w1, #1
	bl	_cik_enable_gui_idle_interrupt
LBB0_5:
Lloh3:
	adrp	x8, _RADEON_CG_BLOCK_MC@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RADEON_CG_BLOCK_MC@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_8
; %bb.6:
	ldr	w8, [x20]
Lloh6:
	adrp	x9, _RADEON_IS_IGP@GOTPAGE
Lloh7:
	ldr	x9, [x9, _RADEON_IS_IGP@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_8
; %bb.7:
	mov	x0, x20
	mov	x1, x19
	bl	_cik_enable_mc_mgcg
	mov	x0, x20
	mov	x1, x19
	bl	_cik_enable_mc_ls
LBB0_8:
Lloh9:
	adrp	x8, _RADEON_CG_BLOCK_SDMA@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RADEON_CG_BLOCK_SDMA@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_10
; %bb.9:
	mov	x0, x20
	mov	x1, x19
	bl	_cik_enable_sdma_mgcg
	mov	x0, x20
	mov	x1, x19
	bl	_cik_enable_sdma_mgls
LBB0_10:
Lloh12:
	adrp	x8, _RADEON_CG_BLOCK_BIF@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RADEON_CG_BLOCK_BIF@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_12
; %bb.11:
	mov	x0, x20
	mov	x1, x19
	bl	_cik_enable_bif_mgls
LBB0_12:
Lloh15:
	adrp	x8, _RADEON_CG_BLOCK_UVD@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RADEON_CG_BLOCK_UVD@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_15
; %bb.13:
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_15
; %bb.14:
	mov	x0, x20
	mov	x1, x19
	bl	_cik_enable_uvd_mgcg
LBB0_15:
Lloh18:
	adrp	x8, _RADEON_CG_BLOCK_HDP@GOTPAGE
Lloh19:
	ldr	x8, [x8, _RADEON_CG_BLOCK_HDP@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_17
; %bb.16:
	mov	x0, x20
	mov	x1, x19
	bl	_cik_enable_hdp_mgcg
	mov	x0, x20
	mov	x1, x19
	bl	_cik_enable_hdp_ls
LBB0_17:
Lloh21:
	adrp	x8, _RADEON_CG_BLOCK_VCE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RADEON_CG_BLOCK_VCE@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_19
; %bb.18:
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_vce_v2_0_enable_mgcg
LBB0_19:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_CG_BLOCK_GFX,4,2        ; @RADEON_CG_BLOCK_GFX
	.comm	_RADEON_CG_BLOCK_MC,4,2         ; @RADEON_CG_BLOCK_MC
	.comm	_RADEON_IS_IGP,4,2              ; @RADEON_IS_IGP
	.comm	_RADEON_CG_BLOCK_SDMA,4,2       ; @RADEON_CG_BLOCK_SDMA
	.comm	_RADEON_CG_BLOCK_BIF,4,2        ; @RADEON_CG_BLOCK_BIF
	.comm	_RADEON_CG_BLOCK_UVD,4,2        ; @RADEON_CG_BLOCK_UVD
	.comm	_RADEON_CG_BLOCK_HDP,4,2        ; @RADEON_CG_BLOCK_HDP
	.comm	_RADEON_CG_BLOCK_VCE,4,2        ; @RADEON_CG_BLOCK_VCE
.subsections_via_symbols
