	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_dc_setup_window
_tegra_dc_setup_window:                 ## @tegra_dc_setup_window
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r12
	movq	(%rdi), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movl	(%rsi), %edi
	leaq	-48(%rbp), %rsi
	callq	_tegra_plane_format_is_yuv
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	xorl	%r13d, %r13d
	cmpl	$1, -48(%rbp)
	adcl	$1, %r13d
	jmp	LBB0_3
LBB0_1:
	movl	4(%r14), %eax
	leal	7(%rax), %r13d
	testl	%eax, %eax
	cmovnsl	%eax, %r13d
	sarl	$3, %r13d
LBB0_3:
	movl	(%r14), %esi
	movq	_DC_WIN_COLOR_DEPTH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_tegra_plane_writel
	movl	8(%r14), %esi
	movq	_DC_WIN_BYTE_SWAP@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_tegra_plane_writel
	movl	84(%r14), %edi
	callq	_V_POSITION
	movl	%eax, %ebx
	movl	80(%r14), %edi
	callq	_H_POSITION
	orl	%eax, %ebx
	movq	_DC_WIN_POSITION@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_tegra_plane_writel
	movl	72(%r14), %edi
	callq	_V_SIZE
	movl	%eax, %ebx
	movl	76(%r14), %edi
	callq	_H_SIZE
	orl	%eax, %ebx
	movq	_DC_WIN_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_tegra_plane_writel
	movl	56(%r14), %eax
	imull	%r13d, %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	64(%r14), %ebx
	imull	%r13d, %ebx
	movl	60(%r14), %eax
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	movl	68(%r14), %edi
	callq	_V_PRESCALED_SIZE
	movl	%eax, %r15d
	movl	%ebx, %edi
	callq	_H_PRESCALED_SIZE
	orl	%eax, %r15d
	movq	_DC_WIN_PRESCALED_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_tegra_plane_writel
	cmpl	$0, -48(%rbp)
	movl	$2, %ebx
	cmovel	%r13d, %ebx
	cmpl	$0, -44(%rbp)                   ## 4-byte Folded Reload
	cmovel	%r13d, %ebx
	movl	64(%r14), %edi
	movl	76(%r14), %esi
	xorl	%edx, %edx
	movl	%ebx, %ecx
	callq	_compute_dda_inc
	movl	%eax, %r15d
	movl	68(%r14), %edi
	movl	72(%r14), %esi
	movl	$1, %edx
	movl	%ebx, %ecx
	callq	_compute_dda_inc
	movl	%eax, %edi
	callq	_V_DDA_INC
	movl	%eax, %ebx
	movl	%r15d, %edi
	callq	_H_DDA_INC
	movl	%eax, %r15d
	orl	%ebx, %r15d
	movq	_DC_WIN_DDA_INC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_tegra_plane_writel
	movl	56(%r14), %edi
	callq	_compute_initial_dda
	movl	%eax, %ebx
	movl	60(%r14), %edi
	callq	_compute_initial_dda
	movl	%eax, %r13d
	movq	_DC_WIN_H_INITIAL_DDA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_tegra_plane_writel
	movq	_DC_WIN_V_INITIAL_DDA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r13d, %esi
	callq	_tegra_plane_writel
	movq	_DC_WIN_UV_BUF_STRIDE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_tegra_plane_writel
	movq	_DC_WIN_BUF_STRIDE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_tegra_plane_writel
	movq	16(%r14), %rax
	movl	(%rax), %esi
	movq	_DC_WINBUF_START_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_tegra_plane_writel
	cmpl	$0, -44(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_6
## %bb.4:
	cmpl	$0, -48(%rbp)
	je	LBB0_6
## %bb.5:
	movq	16(%r14), %rax
	movl	4(%rax), %esi
	movq	_DC_WINBUF_START_ADDR_U@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_tegra_plane_writel
	movq	16(%r14), %rax
	movl	8(%rax), %esi
	movq	_DC_WINBUF_START_ADDR_V@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_tegra_plane_writel
	movq	24(%r14), %rax
	movl	4(%rax), %esi
	shll	$16, %esi
	orl	(%rax), %esi
	movl	%esi, %r15d
	jmp	LBB0_7
LBB0_6:
	movq	24(%r14), %rax
	movl	(%rax), %esi
LBB0_7:
	movq	-64(%rbp), %r13                 ## 8-byte Reload
	movq	_DC_WIN_LINE_STRIDE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_tegra_plane_writel
	cmpq	$0, 32(%r14)
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	je	LBB0_9
## %bb.8:
	movl	68(%r14), %eax
	addl	%eax, %ebx
	decl	%ebx
LBB0_9:
	movq	_DC_WINBUF_ADDR_H_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_tegra_plane_writel
	movq	_DC_WINBUF_ADDR_V_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_tegra_plane_writel
	movq	(%r13), %rax
	cmpq	$0, 8(%rax)
	movl	48(%r14), %eax
	je	LBB0_16
## %bb.10:
	movq	_DC_WINBUF_SURFACE_KIND@GOTPCREL(%rip), %rbx
	cmpl	$128, %eax
	je	LBB0_14
## %bb.11:
	cmpl	$130, %eax
	je	LBB0_15
## %bb.12:
	cmpl	$129, %eax
	jne	LBB0_22
## %bb.13:
	movq	_DC_WINBUF_SURFACE_KIND_PITCH@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	jmp	LBB0_22
LBB0_16:
	movq	_DC_WIN_BUFFER_ADDR_MODE@GOTPCREL(%rip), %rbx
	cmpl	$128, %eax
	je	LBB0_19
## %bb.17:
	cmpl	$129, %eax
	jne	LBB0_22
## %bb.18:
	movq	_DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV@GOTPCREL(%rip), %rax
	movq	_DC_WIN_BUFFER_ADDR_MODE_LINEAR@GOTPCREL(%rip), %rcx
	jmp	LBB0_20
LBB0_14:
	movq	_DC_WINBUF_SURFACE_KIND_TILED@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	jmp	LBB0_22
LBB0_15:
	movq	40(%r14), %rdi
	callq	_DC_WINBUF_SURFACE_KIND_BLOCK_HEIGHT
	movl	%eax, %r15d
	movq	_DC_WINBUF_SURFACE_KIND_BLOCK@GOTPCREL(%rip), %rax
	jmp	LBB0_21
LBB0_19:
	movq	_DC_WIN_BUFFER_ADDR_MODE_TILE_UV@GOTPCREL(%rip), %rax
	movq	_DC_WIN_BUFFER_ADDR_MODE_TILE@GOTPCREL(%rip), %rcx
LBB0_20:
	movl	(%rcx), %r15d
LBB0_21:
	orl	(%rax), %r15d
LBB0_22:
	movl	(%rbx), %edx
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_tegra_plane_writel
	movq	_WIN_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	cmpl	$0, -44(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_24
## %bb.23:
	movq	_DC_WIN_CSC_YOF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	$240, %esi
	callq	_tegra_plane_writel
	movq	_DC_WIN_CSC_KYRGB@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	$298, %esi                      ## imm = 0x12A
	callq	_tegra_plane_writel
	movq	_DC_WIN_CSC_KUR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_tegra_plane_writel
	movq	_DC_WIN_CSC_KVR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	$408, %esi                      ## imm = 0x198
	callq	_tegra_plane_writel
	movq	_DC_WIN_CSC_KUG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	$923, %esi                      ## imm = 0x39B
	callq	_tegra_plane_writel
	movq	_DC_WIN_CSC_KVG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	$815, %esi                      ## imm = 0x32F
	callq	_tegra_plane_writel
	movq	_DC_WIN_CSC_KUB@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	$516, %esi                      ## imm = 0x204
	callq	_tegra_plane_writel
	movq	_DC_WIN_CSC_KVB@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_tegra_plane_writel
	movq	_CSC_ENABLE@GOTPCREL(%rip), %rax
	jmp	LBB0_26
LBB0_24:
	cmpl	$23, 4(%r14)
	jg	LBB0_27
## %bb.25:
	movq	_COLOR_EXPAND@GOTPCREL(%rip), %rax
LBB0_26:
	orl	(%rax), %ebx
LBB0_27:
	xorl	%r15d, %r15d
	cmpq	$0, 32(%r14)
	je	LBB0_29
## %bb.28:
	movq	_V_DIRECTION@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
LBB0_29:
	orl	%ebx, %r15d
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_tegra_plane_use_horizontal_filtering
	testq	%rax, %rax
	je	LBB0_31
## %bb.30:
	xorl	%edi, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$32768, %esi                    ## imm = 0x8000
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$1, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1040743649, %esi               ## imm = 0x3E087CE1
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$2, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$991001281, %esi                ## imm = 0x3B117AC1
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$3, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1494971306, %esi               ## imm = 0x591B73AA
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$4, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1462070682, %esi               ## imm = 0x57256D9A
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$5, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1429169803, %esi               ## imm = 0x552F668B
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$6, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1933074059, %esi               ## imm = 0x73385E8B
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$7, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1917015427, %esi               ## imm = 0x72435583
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$8, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1900825739, %esi               ## imm = 0x714C4C8B
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$9, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1884636051, %esi               ## imm = 0x70554393
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$10, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1902000283, %esi               ## imm = 0x715E389B
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$11, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1902522282, %esi               ## imm = 0x71662FAA
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$12, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1399662010, %esi               ## imm = 0x536D25BA
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$13, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1433607114, %esi               ## imm = 0x55731BCA
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$14, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$947524057, %esi                ## imm = 0x387A11D9
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$15, %edi
	callq	_DC_WIN_H_FILTER_P
	movq	%r12, %rdi
	movl	$1014761713, %esi               ## imm = 0x3C7C08F1
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movq	_H_FILTER@GOTPCREL(%rip), %rax
	orl	(%rax), %r15d
LBB0_31:
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_tegra_plane_use_vertical_filtering
	testq	%rax, %rax
	je	LBB0_33
## %bb.32:
	xorl	%edi, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$128, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$1, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$120, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$2, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$112, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$3, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$104, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$4, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$96, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$5, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$88, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$6, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$80, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$7, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$72, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$8, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$64, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$9, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$56, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$10, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$48, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$11, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$40, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$12, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$32, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$13, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$24, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$14, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$16, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movl	$15, %edi
	callq	_DC_WIN_V_FILTER_P
	movq	%r12, %rdi
	movl	$8, %esi
	movl	%eax, %edx
	callq	_tegra_plane_writel
	movq	_V_FILTER@GOTPCREL(%rip), %rax
	orl	(%rax), %r15d
LBB0_33:
	movq	_DC_WIN_WIN_OPTIONS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_tegra_plane_writel
	movq	(%r13), %rax
	cmpq	$0, (%rax)
	je	LBB0_35
## %bb.34:
	movq	%r12, %rdi
	callq	_tegra_plane_setup_blending_legacy
	jmp	LBB0_36
LBB0_35:
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_tegra_plane_setup_blending
LBB0_36:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DC_WIN_COLOR_DEPTH,4,2         ## @DC_WIN_COLOR_DEPTH
	.comm	_DC_WIN_BYTE_SWAP,4,2           ## @DC_WIN_BYTE_SWAP
	.comm	_DC_WIN_POSITION,4,2            ## @DC_WIN_POSITION
	.comm	_DC_WIN_SIZE,4,2                ## @DC_WIN_SIZE
	.comm	_DC_WIN_PRESCALED_SIZE,4,2      ## @DC_WIN_PRESCALED_SIZE
	.comm	_DC_WIN_DDA_INC,4,2             ## @DC_WIN_DDA_INC
	.comm	_DC_WIN_H_INITIAL_DDA,4,2       ## @DC_WIN_H_INITIAL_DDA
	.comm	_DC_WIN_V_INITIAL_DDA,4,2       ## @DC_WIN_V_INITIAL_DDA
	.comm	_DC_WIN_UV_BUF_STRIDE,4,2       ## @DC_WIN_UV_BUF_STRIDE
	.comm	_DC_WIN_BUF_STRIDE,4,2          ## @DC_WIN_BUF_STRIDE
	.comm	_DC_WINBUF_START_ADDR,4,2       ## @DC_WINBUF_START_ADDR
	.comm	_DC_WINBUF_START_ADDR_U,4,2     ## @DC_WINBUF_START_ADDR_U
	.comm	_DC_WINBUF_START_ADDR_V,4,2     ## @DC_WINBUF_START_ADDR_V
	.comm	_DC_WIN_LINE_STRIDE,4,2         ## @DC_WIN_LINE_STRIDE
	.comm	_DC_WINBUF_ADDR_H_OFFSET,4,2    ## @DC_WINBUF_ADDR_H_OFFSET
	.comm	_DC_WINBUF_ADDR_V_OFFSET,4,2    ## @DC_WINBUF_ADDR_V_OFFSET
	.comm	_DC_WINBUF_SURFACE_KIND_PITCH,4,2 ## @DC_WINBUF_SURFACE_KIND_PITCH
	.comm	_DC_WINBUF_SURFACE_KIND_TILED,4,2 ## @DC_WINBUF_SURFACE_KIND_TILED
	.comm	_DC_WINBUF_SURFACE_KIND_BLOCK,4,2 ## @DC_WINBUF_SURFACE_KIND_BLOCK
	.comm	_DC_WINBUF_SURFACE_KIND,4,2     ## @DC_WINBUF_SURFACE_KIND
	.comm	_DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV,4,2 ## @DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV
	.comm	_DC_WIN_BUFFER_ADDR_MODE_LINEAR,4,2 ## @DC_WIN_BUFFER_ADDR_MODE_LINEAR
	.comm	_DC_WIN_BUFFER_ADDR_MODE_TILE_UV,4,2 ## @DC_WIN_BUFFER_ADDR_MODE_TILE_UV
	.comm	_DC_WIN_BUFFER_ADDR_MODE_TILE,4,2 ## @DC_WIN_BUFFER_ADDR_MODE_TILE
	.comm	_DC_WIN_BUFFER_ADDR_MODE,4,2    ## @DC_WIN_BUFFER_ADDR_MODE
	.comm	_WIN_ENABLE,4,2                 ## @WIN_ENABLE
	.comm	_DC_WIN_CSC_YOF,4,2             ## @DC_WIN_CSC_YOF
	.comm	_DC_WIN_CSC_KYRGB,4,2           ## @DC_WIN_CSC_KYRGB
	.comm	_DC_WIN_CSC_KUR,4,2             ## @DC_WIN_CSC_KUR
	.comm	_DC_WIN_CSC_KVR,4,2             ## @DC_WIN_CSC_KVR
	.comm	_DC_WIN_CSC_KUG,4,2             ## @DC_WIN_CSC_KUG
	.comm	_DC_WIN_CSC_KVG,4,2             ## @DC_WIN_CSC_KVG
	.comm	_DC_WIN_CSC_KUB,4,2             ## @DC_WIN_CSC_KUB
	.comm	_DC_WIN_CSC_KVB,4,2             ## @DC_WIN_CSC_KVB
	.comm	_CSC_ENABLE,4,2                 ## @CSC_ENABLE
	.comm	_COLOR_EXPAND,4,2               ## @COLOR_EXPAND
	.comm	_V_DIRECTION,4,2                ## @V_DIRECTION
	.comm	_H_FILTER,4,2                   ## @H_FILTER
	.comm	_V_FILTER,4,2                   ## @V_FILTER
	.comm	_DC_WIN_WIN_OPTIONS,4,2         ## @DC_WIN_WIN_OPTIONS
	.no_dead_strip	_tegra_dc_setup_window
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_dc_setup_window
_tegra_dc_setup_window:                 ; @tegra_dc_setup_window
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x1
	mov	x19, x0
	ldr	x27, [x0]
	ldr	w0, [x1]
	add	x1, sp, #12
	bl	_tegra_plane_format_is_yuv
	mov	x21, x0
	cbz	w0, LBB0_2
; %bb.1:
	ldr	w8, [sp, #12]
	cmp	w8, #0
	mov	w8, #1
	cinc	w25, w8, eq
	b	LBB0_3
LBB0_2:
	ldr	w8, [x20, #4]
	add	w9, w8, #7
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w25, w8, #3
LBB0_3:
	ldr	w1, [x20]
Lloh0:
	adrp	x8, _DC_WIN_COLOR_DEPTH@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DC_WIN_COLOR_DEPTH@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_plane_writel
	ldr	w1, [x20, #8]
Lloh3:
	adrp	x8, _DC_WIN_BYTE_SWAP@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DC_WIN_BYTE_SWAP@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_plane_writel
	ldr	w0, [x20, #84]
	bl	_V_POSITION
	mov	x22, x0
	ldr	w0, [x20, #80]
	bl	_H_POSITION
	orr	w1, w0, w22
Lloh6:
	adrp	x8, _DC_WIN_POSITION@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DC_WIN_POSITION@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_plane_writel
	ldr	w0, [x20, #72]
	bl	_V_SIZE
	mov	x22, x0
	ldr	w0, [x20, #76]
	bl	_H_SIZE
	orr	w1, w0, w22
Lloh9:
	adrp	x8, _DC_WIN_SIZE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DC_WIN_SIZE@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_plane_writel
	ldp	w26, w22, [x20, #56]
	ldp	w8, w0, [x20, #64]
	mul	w23, w8, w25
	bl	_V_PRESCALED_SIZE
	mov	x24, x0
	mov	x0, x23
	bl	_H_PRESCALED_SIZE
	orr	w1, w0, w24
Lloh12:
	adrp	x8, _DC_WIN_PRESCALED_SIZE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _DC_WIN_PRESCALED_SIZE@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_plane_writel
	ldr	w8, [sp, #12]
	cmp	w8, #0
	ccmp	w21, #0, #4, ne
	mul	w24, w26, w25
	mov	w8, #2
	csel	w23, w8, w25, ne
	ldr	w0, [x20, #64]
	ldr	w1, [x20, #76]
	mov	w2, #0
	mov	x3, x23
	bl	_compute_dda_inc
	mov	x25, x0
	ldp	w0, w1, [x20, #68]
	mov	w2, #1
	mov	x3, x23
	bl	_compute_dda_inc
	bl	_V_DDA_INC
	mov	x23, x0
	mov	x0, x25
	bl	_H_DDA_INC
	orr	w23, w0, w23
Lloh15:
	adrp	x8, _DC_WIN_DDA_INC@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DC_WIN_DDA_INC@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x23
	bl	_tegra_plane_writel
	ldr	w0, [x20, #56]
	bl	_compute_initial_dda
	mov	x25, x0
	ldr	w0, [x20, #60]
	bl	_compute_initial_dda
	mov	x26, x0
Lloh18:
	adrp	x8, _DC_WIN_H_INITIAL_DDA@GOTPAGE
Lloh19:
	ldr	x8, [x8, _DC_WIN_H_INITIAL_DDA@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x25
	bl	_tegra_plane_writel
Lloh21:
	adrp	x8, _DC_WIN_V_INITIAL_DDA@GOTPAGE
Lloh22:
	ldr	x8, [x8, _DC_WIN_V_INITIAL_DDA@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x26
	bl	_tegra_plane_writel
Lloh24:
	adrp	x8, _DC_WIN_UV_BUF_STRIDE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DC_WIN_UV_BUF_STRIDE@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_tegra_plane_writel
Lloh27:
	adrp	x8, _DC_WIN_BUF_STRIDE@GOTPAGE
Lloh28:
	ldr	x8, [x8, _DC_WIN_BUF_STRIDE@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_tegra_plane_writel
	ldr	x8, [x20, #16]
	ldr	w1, [x8]
Lloh30:
	adrp	x8, _DC_WINBUF_START_ADDR@GOTPAGE
Lloh31:
	ldr	x8, [x8, _DC_WINBUF_START_ADDR@GOTPAGEOFF]
Lloh32:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_plane_writel
	cbz	w21, LBB0_6
; %bb.4:
	ldr	w8, [sp, #12]
	cbz	w8, LBB0_6
; %bb.5:
	ldr	x8, [x20, #16]
	ldr	w1, [x8, #4]
Lloh33:
	adrp	x8, _DC_WINBUF_START_ADDR_U@GOTPAGE
Lloh34:
	ldr	x8, [x8, _DC_WINBUF_START_ADDR_U@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_plane_writel
	ldr	x8, [x20, #16]
	ldr	w1, [x8, #8]
Lloh36:
	adrp	x8, _DC_WINBUF_START_ADDR_V@GOTPAGE
Lloh37:
	ldr	x8, [x8, _DC_WINBUF_START_ADDR_V@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_plane_writel
	ldr	x8, [x20, #24]
	ldp	w8, w9, [x8]
	orr	w1, w8, w9, lsl #16
	mov	x23, x1
	b	LBB0_7
LBB0_6:
	ldr	x8, [x20, #24]
	ldr	w1, [x8]
LBB0_7:
Lloh39:
	adrp	x8, _DC_WIN_LINE_STRIDE@GOTPAGE
Lloh40:
	ldr	x8, [x8, _DC_WIN_LINE_STRIDE@GOTPAGEOFF]
Lloh41:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tegra_plane_writel
	ldr	x8, [x20, #32]
	cbz	x8, LBB0_9
; %bb.8:
	ldr	w8, [x20, #68]
	add	w8, w22, w8
	sub	w22, w8, #1
LBB0_9:
Lloh42:
	adrp	x8, _DC_WINBUF_ADDR_H_OFFSET@GOTPAGE
Lloh43:
	ldr	x8, [x8, _DC_WINBUF_ADDR_H_OFFSET@GOTPAGEOFF]
Lloh44:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x24
	bl	_tegra_plane_writel
Lloh45:
	adrp	x8, _DC_WINBUF_ADDR_V_OFFSET@GOTPAGE
Lloh46:
	ldr	x8, [x8, _DC_WINBUF_ADDR_V_OFFSET@GOTPAGEOFF]
Lloh47:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x22
	bl	_tegra_plane_writel
	ldr	x8, [x27]
	ldr	x9, [x8, #8]
	ldr	w8, [x20, #48]
	cmp	w8, #128
	cbz	x9, LBB0_14
; %bb.10:
	b.eq	LBB0_17
; %bb.11:
	cmp	w8, #130
	b.eq	LBB0_19
; %bb.12:
	cmp	w8, #129
	b.ne	LBB0_20
; %bb.13:
Lloh48:
	adrp	x8, _DC_WINBUF_SURFACE_KIND_PITCH@GOTPAGE
Lloh49:
	ldr	x8, [x8, _DC_WINBUF_SURFACE_KIND_PITCH@GOTPAGEOFF]
	b	LBB0_18
LBB0_14:
	b.eq	LBB0_21
; %bb.15:
	cmp	w8, #129
	b.ne	LBB0_23
; %bb.16:
Lloh50:
	adrp	x8, _DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV@GOTPAGE
Lloh51:
	ldr	x8, [x8, _DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
Lloh53:
	adrp	x9, _DC_WIN_BUFFER_ADDR_MODE_LINEAR@GOTPAGE
Lloh54:
	ldr	x9, [x9, _DC_WIN_BUFFER_ADDR_MODE_LINEAR@GOTPAGEOFF]
	b	LBB0_22
LBB0_17:
Lloh55:
	adrp	x8, _DC_WINBUF_SURFACE_KIND_TILED@GOTPAGE
Lloh56:
	ldr	x8, [x8, _DC_WINBUF_SURFACE_KIND_TILED@GOTPAGEOFF]
LBB0_18:
	ldr	w23, [x8]
	b	LBB0_20
LBB0_19:
	ldr	x0, [x20, #40]
	bl	_DC_WINBUF_SURFACE_KIND_BLOCK_HEIGHT
Lloh57:
	adrp	x8, _DC_WINBUF_SURFACE_KIND_BLOCK@GOTPAGE
Lloh58:
	ldr	x8, [x8, _DC_WINBUF_SURFACE_KIND_BLOCK@GOTPAGEOFF]
Lloh59:
	ldr	w8, [x8]
	orr	w23, w8, w0
LBB0_20:
Lloh60:
	adrp	x8, _DC_WINBUF_SURFACE_KIND@GOTPAGE
Lloh61:
	ldr	x8, [x8, _DC_WINBUF_SURFACE_KIND@GOTPAGEOFF]
	b	LBB0_24
LBB0_21:
Lloh62:
	adrp	x8, _DC_WIN_BUFFER_ADDR_MODE_TILE_UV@GOTPAGE
Lloh63:
	ldr	x8, [x8, _DC_WIN_BUFFER_ADDR_MODE_TILE_UV@GOTPAGEOFF]
Lloh64:
	ldr	w8, [x8]
Lloh65:
	adrp	x9, _DC_WIN_BUFFER_ADDR_MODE_TILE@GOTPAGE
Lloh66:
	ldr	x9, [x9, _DC_WIN_BUFFER_ADDR_MODE_TILE@GOTPAGEOFF]
LBB0_22:
	ldr	w9, [x9]
	orr	w23, w9, w8
LBB0_23:
Lloh67:
	adrp	x8, _DC_WIN_BUFFER_ADDR_MODE@GOTPAGE
Lloh68:
	ldr	x8, [x8, _DC_WIN_BUFFER_ADDR_MODE@GOTPAGEOFF]
LBB0_24:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x23
	bl	_tegra_plane_writel
Lloh69:
	adrp	x8, _WIN_ENABLE@GOTPAGE
Lloh70:
	ldr	x8, [x8, _WIN_ENABLE@GOTPAGEOFF]
Lloh71:
	ldr	w22, [x8]
	cbz	w21, LBB0_26
; %bb.25:
Lloh72:
	adrp	x8, _DC_WIN_CSC_YOF@GOTPAGE
Lloh73:
	ldr	x8, [x8, _DC_WIN_CSC_YOF@GOTPAGEOFF]
Lloh74:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #240
	bl	_tegra_plane_writel
Lloh75:
	adrp	x8, _DC_WIN_CSC_KYRGB@GOTPAGE
Lloh76:
	ldr	x8, [x8, _DC_WIN_CSC_KYRGB@GOTPAGEOFF]
Lloh77:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #298
	bl	_tegra_plane_writel
Lloh78:
	adrp	x8, _DC_WIN_CSC_KUR@GOTPAGE
Lloh79:
	ldr	x8, [x8, _DC_WIN_CSC_KUR@GOTPAGEOFF]
Lloh80:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_tegra_plane_writel
Lloh81:
	adrp	x8, _DC_WIN_CSC_KVR@GOTPAGE
Lloh82:
	ldr	x8, [x8, _DC_WIN_CSC_KVR@GOTPAGEOFF]
Lloh83:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #408
	bl	_tegra_plane_writel
Lloh84:
	adrp	x8, _DC_WIN_CSC_KUG@GOTPAGE
Lloh85:
	ldr	x8, [x8, _DC_WIN_CSC_KUG@GOTPAGEOFF]
Lloh86:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #923
	bl	_tegra_plane_writel
Lloh87:
	adrp	x8, _DC_WIN_CSC_KVG@GOTPAGE
Lloh88:
	ldr	x8, [x8, _DC_WIN_CSC_KVG@GOTPAGEOFF]
Lloh89:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #815
	bl	_tegra_plane_writel
Lloh90:
	adrp	x8, _DC_WIN_CSC_KUB@GOTPAGE
Lloh91:
	ldr	x8, [x8, _DC_WIN_CSC_KUB@GOTPAGEOFF]
Lloh92:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #516
	bl	_tegra_plane_writel
Lloh93:
	adrp	x8, _DC_WIN_CSC_KVB@GOTPAGE
Lloh94:
	ldr	x8, [x8, _DC_WIN_CSC_KVB@GOTPAGEOFF]
Lloh95:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_tegra_plane_writel
Lloh96:
	adrp	x8, _CSC_ENABLE@GOTPAGE
Lloh97:
	ldr	x8, [x8, _CSC_ENABLE@GOTPAGEOFF]
	b	LBB0_28
LBB0_26:
	ldr	w8, [x20, #4]
	cmp	w8, #23
	b.gt	LBB0_29
; %bb.27:
Lloh98:
	adrp	x8, _COLOR_EXPAND@GOTPAGE
Lloh99:
	ldr	x8, [x8, _COLOR_EXPAND@GOTPAGEOFF]
LBB0_28:
	ldr	w8, [x8]
	orr	w22, w8, w22
LBB0_29:
	ldr	x8, [x20, #32]
Lloh100:
	adrp	x9, _V_DIRECTION@GOTPAGE
Lloh101:
	ldr	x9, [x9, _V_DIRECTION@GOTPAGEOFF]
Lloh102:
	ldr	w9, [x9]
	cmp	x8, #0
	csel	w8, wzr, w9, eq
	orr	w21, w8, w22
	mov	x0, x19
	mov	x1, x20
	bl	_tegra_plane_use_horizontal_filtering
	cbz	x0, LBB0_31
; %bb.30:
	mov	w0, #0
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #32768
	bl	_tegra_plane_writel
	mov	w0, #1
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #31969
	movk	w1, #15880, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #2
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #31425
	movk	w1, #15121, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #3
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #29610
	movk	w1, #22811, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #4
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #28058
	movk	w1, #22309, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #5
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #26251
	movk	w1, #21807, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #6
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #24203
	movk	w1, #29496, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #7
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #21891
	movk	w1, #29251, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #8
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #19595
	movk	w1, #29004, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #9
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #17299
	movk	w1, #28757, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #10
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #14491
	movk	w1, #29022, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #11
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #12202
	movk	w1, #29030, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #12
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #9658
	movk	w1, #21357, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #13
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #7114
	movk	w1, #21875, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #14
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #4569
	movk	w1, #14458, lsl #16
	bl	_tegra_plane_writel
	mov	w0, #15
	bl	_DC_WIN_H_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #2289
	movk	w1, #15484, lsl #16
	bl	_tegra_plane_writel
Lloh103:
	adrp	x8, _H_FILTER@GOTPAGE
Lloh104:
	ldr	x8, [x8, _H_FILTER@GOTPAGEOFF]
Lloh105:
	ldr	w8, [x8]
	orr	w21, w8, w21
LBB0_31:
	mov	x0, x19
	mov	x1, x20
	bl	_tegra_plane_use_vertical_filtering
	cbz	x0, LBB0_33
; %bb.32:
	mov	w0, #0
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #128
	bl	_tegra_plane_writel
	mov	w0, #1
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #120
	bl	_tegra_plane_writel
	mov	w0, #2
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #112
	bl	_tegra_plane_writel
	mov	w0, #3
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #104
	bl	_tegra_plane_writel
	mov	w0, #4
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #96
	bl	_tegra_plane_writel
	mov	w0, #5
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #88
	bl	_tegra_plane_writel
	mov	w0, #6
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #80
	bl	_tegra_plane_writel
	mov	w0, #7
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #72
	bl	_tegra_plane_writel
	mov	w0, #8
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #64
	bl	_tegra_plane_writel
	mov	w0, #9
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #56
	bl	_tegra_plane_writel
	mov	w0, #10
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #48
	bl	_tegra_plane_writel
	mov	w0, #11
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #40
	bl	_tegra_plane_writel
	mov	w0, #12
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #32
	bl	_tegra_plane_writel
	mov	w0, #13
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #24
	bl	_tegra_plane_writel
	mov	w0, #14
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #16
	bl	_tegra_plane_writel
	mov	w0, #15
	bl	_DC_WIN_V_FILTER_P
	mov	x2, x0
	mov	x0, x19
	mov	w1, #8
	bl	_tegra_plane_writel
Lloh106:
	adrp	x8, _V_FILTER@GOTPAGE
Lloh107:
	ldr	x8, [x8, _V_FILTER@GOTPAGEOFF]
Lloh108:
	ldr	w8, [x8]
	orr	w21, w8, w21
LBB0_33:
Lloh109:
	adrp	x8, _DC_WIN_WIN_OPTIONS@GOTPAGE
Lloh110:
	ldr	x8, [x8, _DC_WIN_WIN_OPTIONS@GOTPAGEOFF]
Lloh111:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x21
	bl	_tegra_plane_writel
	ldr	x8, [x27]
	ldr	x8, [x8]
	cbz	x8, LBB0_35
; %bb.34:
	mov	x0, x19
	bl	_tegra_plane_setup_blending_legacy
	b	LBB0_36
LBB0_35:
	mov	x0, x19
	mov	x1, x20
	bl	_tegra_plane_setup_blending
LBB0_36:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh96, Lloh97
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGot	Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh109, Lloh110, Lloh111
	.cfi_endproc
                                        ; -- End function
	.comm	_DC_WIN_COLOR_DEPTH,4,2         ; @DC_WIN_COLOR_DEPTH
	.comm	_DC_WIN_BYTE_SWAP,4,2           ; @DC_WIN_BYTE_SWAP
	.comm	_DC_WIN_POSITION,4,2            ; @DC_WIN_POSITION
	.comm	_DC_WIN_SIZE,4,2                ; @DC_WIN_SIZE
	.comm	_DC_WIN_PRESCALED_SIZE,4,2      ; @DC_WIN_PRESCALED_SIZE
	.comm	_DC_WIN_DDA_INC,4,2             ; @DC_WIN_DDA_INC
	.comm	_DC_WIN_H_INITIAL_DDA,4,2       ; @DC_WIN_H_INITIAL_DDA
	.comm	_DC_WIN_V_INITIAL_DDA,4,2       ; @DC_WIN_V_INITIAL_DDA
	.comm	_DC_WIN_UV_BUF_STRIDE,4,2       ; @DC_WIN_UV_BUF_STRIDE
	.comm	_DC_WIN_BUF_STRIDE,4,2          ; @DC_WIN_BUF_STRIDE
	.comm	_DC_WINBUF_START_ADDR,4,2       ; @DC_WINBUF_START_ADDR
	.comm	_DC_WINBUF_START_ADDR_U,4,2     ; @DC_WINBUF_START_ADDR_U
	.comm	_DC_WINBUF_START_ADDR_V,4,2     ; @DC_WINBUF_START_ADDR_V
	.comm	_DC_WIN_LINE_STRIDE,4,2         ; @DC_WIN_LINE_STRIDE
	.comm	_DC_WINBUF_ADDR_H_OFFSET,4,2    ; @DC_WINBUF_ADDR_H_OFFSET
	.comm	_DC_WINBUF_ADDR_V_OFFSET,4,2    ; @DC_WINBUF_ADDR_V_OFFSET
	.comm	_DC_WINBUF_SURFACE_KIND_PITCH,4,2 ; @DC_WINBUF_SURFACE_KIND_PITCH
	.comm	_DC_WINBUF_SURFACE_KIND_TILED,4,2 ; @DC_WINBUF_SURFACE_KIND_TILED
	.comm	_DC_WINBUF_SURFACE_KIND_BLOCK,4,2 ; @DC_WINBUF_SURFACE_KIND_BLOCK
	.comm	_DC_WINBUF_SURFACE_KIND,4,2     ; @DC_WINBUF_SURFACE_KIND
	.comm	_DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV,4,2 ; @DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV
	.comm	_DC_WIN_BUFFER_ADDR_MODE_LINEAR,4,2 ; @DC_WIN_BUFFER_ADDR_MODE_LINEAR
	.comm	_DC_WIN_BUFFER_ADDR_MODE_TILE_UV,4,2 ; @DC_WIN_BUFFER_ADDR_MODE_TILE_UV
	.comm	_DC_WIN_BUFFER_ADDR_MODE_TILE,4,2 ; @DC_WIN_BUFFER_ADDR_MODE_TILE
	.comm	_DC_WIN_BUFFER_ADDR_MODE,4,2    ; @DC_WIN_BUFFER_ADDR_MODE
	.comm	_WIN_ENABLE,4,2                 ; @WIN_ENABLE
	.comm	_DC_WIN_CSC_YOF,4,2             ; @DC_WIN_CSC_YOF
	.comm	_DC_WIN_CSC_KYRGB,4,2           ; @DC_WIN_CSC_KYRGB
	.comm	_DC_WIN_CSC_KUR,4,2             ; @DC_WIN_CSC_KUR
	.comm	_DC_WIN_CSC_KVR,4,2             ; @DC_WIN_CSC_KVR
	.comm	_DC_WIN_CSC_KUG,4,2             ; @DC_WIN_CSC_KUG
	.comm	_DC_WIN_CSC_KVG,4,2             ; @DC_WIN_CSC_KVG
	.comm	_DC_WIN_CSC_KUB,4,2             ; @DC_WIN_CSC_KUB
	.comm	_DC_WIN_CSC_KVB,4,2             ; @DC_WIN_CSC_KVB
	.comm	_CSC_ENABLE,4,2                 ; @CSC_ENABLE
	.comm	_COLOR_EXPAND,4,2               ; @COLOR_EXPAND
	.comm	_V_DIRECTION,4,2                ; @V_DIRECTION
	.comm	_H_FILTER,4,2                   ; @H_FILTER
	.comm	_V_FILTER,4,2                   ; @V_FILTER
	.comm	_DC_WIN_WIN_OPTIONS,4,2         ; @DC_WIN_WIN_OPTIONS
	.no_dead_strip	_tegra_dc_setup_window
.subsections_via_symbols
