	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vcn_v1_0_jpeg_ring_set_patch_ring
_vcn_v1_0_jpeg_ring_set_patch_ring:     ## @vcn_v1_0_jpeg_ring_set_patch_ring
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movl	%esi, -44(%rbp)
	movq	_UVD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rax, %rbx
	movq	_mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
                                        ## kill: def $eax killed $eax def $rax
	leal	(,%rax,4), %r15d
	movl	8(%r12), %edi
	callq	_lower_32_bits
	leaq	-44(%rbp), %r14
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	%r15d, %edx
	movl	%eax, %ecx
	callq	_vcn_v1_0_jpeg_ring_patch_wreg
	movl	(%rbx), %edi
	movq	_mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
                                        ## kill: def $eax killed $eax def $rax
	leal	(,%rax,4), %r15d
	movl	8(%r12), %edi
	callq	_upper_32_bits
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	%r15d, %edx
	movl	%eax, %ecx
	callq	_vcn_v1_0_jpeg_ring_patch_wreg
	movq	_PACKETJ_TYPE2@GOTPCREL(%rip), %r15
	movl	(%r15), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%r12), %rcx
	movslq	-44(%rbp), %rdx
	leal	1(%rdx), %esi
	movl	%esi, -44(%rbp)
	movl	%eax, (%rcx,%rdx,4)
	movslq	-44(%rbp), %rax
	leal	1(%rax), %edx
	movl	%edx, -44(%rbp)
	movl	$0, (%rcx,%rax,4)
	movl	(%r15), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%r12), %rcx
	movslq	-44(%rbp), %rdx
	leal	1(%rdx), %esi
	movl	%esi, -44(%rbp)
	movl	%eax, (%rcx,%rdx,4)
	movslq	-44(%rbp), %rax
	leal	1(%rax), %edx
	movl	%edx, -44(%rbp)
	movl	$0, (%rcx,%rax,4)
	movl	(%r15), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%r12), %rcx
	movslq	-44(%rbp), %rdx
	leal	1(%rdx), %esi
	movl	%esi, -44(%rbp)
	movl	%eax, (%rcx,%rdx,4)
	movslq	-44(%rbp), %rax
	leal	1(%rax), %edx
	movl	%edx, -44(%rbp)
	movl	$0, (%rcx,%rax,4)
	movl	(%rbx), %edi
	movq	_mmUVD_JRBC_RB_CNTL@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
                                        ## kill: def $eax killed $eax def $rax
	leal	(,%rax,4), %edx
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	$19, %ecx
	callq	_vcn_v1_0_jpeg_ring_patch_wreg
	movl	(%rbx), %edi
	movq	_mmUVD_JRBC_RB_REF_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
                                        ## kill: def $eax killed $eax def $rax
	leal	(,%rax,4), %edx
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	_vcn_v1_0_jpeg_ring_patch_wreg
	movl	(%rbx), %edi
	movl	(%r15), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movl	%eax, %r15d
	leal	(,%r15,4), %r14d
	movl	(%rbx), %edi
	movq	_mmUVD_JRBC_RB_COND_RD_TIMER@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movq	_PACKETJ_TYPE0@GOTPCREL(%rip), %r13
	movl	(%r13), %ecx
	movl	%eax, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%r12), %rcx
	movslq	-44(%rbp), %rdx
	leal	1(%rdx), %esi
	movl	%esi, -44(%rbp)
	movl	%eax, (%rcx,%rdx,4)
	movslq	-44(%rbp), %rax
	leal	1(%rax), %edx
	movl	%edx, -44(%rbp)
	movl	$20972032, (%rcx,%rax,4)        ## imm = 0x1400200
	movl	(%rbx), %edi
	movq	_mmUVD_JRBC_RB_REF_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movl	(%r13), %ecx
	movl	%eax, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%r12), %rcx
	movslq	-44(%rbp), %rdx
	leal	1(%rdx), %esi
	movl	%esi, -44(%rbp)
	movl	%eax, (%rcx,%rdx,4)
	movslq	-44(%rbp), %rax
	leal	1(%rax), %edx
	movl	%edx, -44(%rbp)
	movl	$1, (%rcx,%rax,4)
	movl	(%rbx), %edi
	movq	_mmUVD_JRBC_EXTERNAL_REG_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movl	(%r13), %ecx
	movl	%eax, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%r12), %rcx
	movslq	-44(%rbp), %rdx
	leal	1(%rdx), %esi
	movl	%esi, -44(%rbp)
	movl	%eax, (%rcx,%rdx,4)
	leal	-129024(,%r15,4), %edx
	movslq	-44(%rbp), %rax
	leal	1(%rax), %esi
	movl	%esi, -44(%rbp)
	cmpl	$10240, %edx                    ## imm = 0x2800
	jb	LBB0_2
## %bb.1:
	andl	$1073741696, %r15d              ## imm = 0x3FFFFF80
	cmpl	$30720, %r15d                   ## imm = 0x7800
	je	LBB0_2
## %bb.3:
	movl	%r14d, (%rcx,%rax,4)
	xorl	%r14d, %r14d
	jmp	LBB0_4
LBB0_2:
	movl	$0, (%rcx,%rax,4)
	sarl	$2, %r14d
LBB0_4:
	movq	_PACKETJ_TYPE3@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%r14d, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%r12), %rcx
	movslq	-44(%rbp), %rdx
	leal	1(%rdx), %esi
	movl	%esi, -44(%rbp)
	movl	%eax, (%rcx,%rdx,4)
	movslq	-44(%rbp), %rax
	leal	1(%rax), %edx
	movl	%edx, -44(%rbp)
	movl	$1, (%rcx,%rax,4)
	movl	$13, %ebx
	movq	_PACKETJ_TYPE6@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%r12), %rcx
	movslq	-44(%rbp), %rdx
	leal	1(%rdx), %esi
	movl	%esi, -44(%rbp)
	movl	%eax, (%rcx,%rdx,4)
	movslq	-44(%rbp), %rax
	leal	1(%rax), %edx
	movl	%edx, -44(%rbp)
	movl	$0, (%rcx,%rax,4)
	decl	%ebx
	jne	LBB0_5
## %bb.6:
	movq	_UVD@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movq	_mmUVD_JRBC_RB_RPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
                                        ## kill: def $eax killed $eax def $rax
	leal	(,%rax,4), %edx
	leaq	-44(%rbp), %r14
	movq	%r12, %rdi
	movq	%r14, %rsi
	xorl	%ecx, %ecx
	callq	_vcn_v1_0_jpeg_ring_patch_wreg
	movl	(%rbx), %edi
	movq	_mmUVD_JRBC_RB_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
                                        ## kill: def $eax killed $eax def $rax
	leal	(,%rax,4), %edx
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	$18, %ecx
	callq	_vcn_v1_0_jpeg_ring_patch_wreg
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_UVD,4,2                        ## @UVD
	.comm	_mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW,4,2 ## @mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW
	.comm	_mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH,4,2 ## @mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH
	.comm	_PACKETJ_TYPE2,4,2              ## @PACKETJ_TYPE2
	.comm	_mmUVD_JRBC_RB_CNTL,4,2         ## @mmUVD_JRBC_RB_CNTL
	.comm	_mmUVD_JRBC_RB_REF_DATA,4,2     ## @mmUVD_JRBC_RB_REF_DATA
	.comm	_mmUVD_JRBC_RB_COND_RD_TIMER,4,2 ## @mmUVD_JRBC_RB_COND_RD_TIMER
	.comm	_PACKETJ_TYPE0,4,2              ## @PACKETJ_TYPE0
	.comm	_mmUVD_JRBC_EXTERNAL_REG_BASE,4,2 ## @mmUVD_JRBC_EXTERNAL_REG_BASE
	.comm	_PACKETJ_TYPE3,4,2              ## @PACKETJ_TYPE3
	.comm	_PACKETJ_TYPE6,4,2              ## @PACKETJ_TYPE6
	.comm	_mmUVD_JRBC_RB_RPTR,4,2         ## @mmUVD_JRBC_RB_RPTR
	.no_dead_strip	_vcn_v1_0_jpeg_ring_set_patch_ring
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vcn_v1_0_jpeg_ring_set_patch_ring
_vcn_v1_0_jpeg_ring_set_patch_ring:     ; @vcn_v1_0_jpeg_ring_set_patch_ring
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	str	w1, [sp, #12]
Lloh0:
	adrp	x21, _UVD@GOTPAGE
Lloh1:
	ldr	x21, [x21, _UVD@GOTPAGEOFF]
	ldr	w0, [x21]
Lloh2:
	adrp	x8, _mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW@GOTPAGE
Lloh3:
	ldr	x8, [x8, _mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	lsl	w20, w0, #2
	ldr	w0, [x19, #8]
	bl	_lower_32_bits
	mov	x3, x0
	add	x1, sp, #12
	mov	x0, x19
	mov	x2, x20
	bl	_vcn_v1_0_jpeg_ring_patch_wreg
	ldr	w0, [x21]
Lloh5:
	adrp	x8, _mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH@GOTPAGE
Lloh6:
	ldr	x8, [x8, _mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	lsl	w20, w0, #2
	ldr	w0, [x19, #8]
	bl	_upper_32_bits
	mov	x3, x0
	add	x1, sp, #12
	mov	x0, x19
	mov	x2, x20
	bl	_vcn_v1_0_jpeg_ring_patch_wreg
Lloh8:
	adrp	x20, _PACKETJ_TYPE2@GOTPAGE
Lloh9:
	ldr	x20, [x20, _PACKETJ_TYPE2@GOTPAGEOFF]
	ldr	w3, [x20]
	mov	w0, #0
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x19]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	w0, [x8, x9, lsl #2]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	wzr, [x8, x9, lsl #2]
	ldr	w3, [x20]
	mov	w0, #0
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x19]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	w0, [x8, x9, lsl #2]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	wzr, [x8, x9, lsl #2]
	ldr	w3, [x20]
	mov	w0, #0
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x19]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	w0, [x8, x9, lsl #2]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	wzr, [x8, x9, lsl #2]
	ldr	w0, [x21]
Lloh10:
	adrp	x22, _mmUVD_JRBC_RB_CNTL@GOTPAGE
Lloh11:
	ldr	x22, [x22, _mmUVD_JRBC_RB_CNTL@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	lsl	w2, w0, #2
	add	x1, sp, #12
	mov	x0, x19
	mov	w3, #19
	bl	_vcn_v1_0_jpeg_ring_patch_wreg
	ldr	w0, [x21]
Lloh12:
	adrp	x26, _mmUVD_JRBC_RB_REF_DATA@GOTPAGE
Lloh13:
	ldr	x26, [x26, _mmUVD_JRBC_RB_REF_DATA@GOTPAGEOFF]
	ldr	w2, [x26]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	lsl	w2, w0, #2
	mov	w24, #1
	add	x1, sp, #12
	mov	x0, x19
	mov	w3, #1
	bl	_vcn_v1_0_jpeg_ring_patch_wreg
	ldr	w0, [x21]
	ldr	w2, [x22]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	mov	x20, x0
	lsl	w23, w0, #2
	ldr	w0, [x21]
Lloh14:
	adrp	x8, _mmUVD_JRBC_RB_COND_RD_TIMER@GOTPAGE
Lloh15:
	ldr	x8, [x8, _mmUVD_JRBC_RB_COND_RD_TIMER@GOTPAGEOFF]
Lloh16:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
Lloh17:
	adrp	x25, _PACKETJ_TYPE0@GOTPAGE
Lloh18:
	ldr	x25, [x25, _PACKETJ_TYPE0@GOTPAGEOFF]
	ldr	w3, [x25]
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x19]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	w0, [x8, x9, lsl #2]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	mov	w10, #512
	movk	w10, #320, lsl #16
	str	w10, [x8, x9, lsl #2]
	ldr	w0, [x21]
	ldr	w2, [x26]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	ldr	w3, [x25]
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x19]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	w0, [x8, x9, lsl #2]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	w24, [x8, x9, lsl #2]
	ldr	w0, [x21]
Lloh19:
	adrp	x8, _mmUVD_JRBC_EXTERNAL_REG_BASE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _mmUVD_JRBC_EXTERNAL_REG_BASE@GOTPAGEOFF]
Lloh21:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	ldr	w3, [x25]
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x19]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	w0, [x8, x9, lsl #2]
	mov	w9, #2048
	movk	w9, #65534, lsl #16
	add	w10, w23, w9
	ldrsw	x9, [sp, #12]
	add	w11, w9, #1
	str	w11, [sp, #12]
	lsr	w10, w10, #11
	cmp	w10, #5
	b.lo	LBB0_3
; %bb.1:
	and	w10, w20, #0x3fffff80
	mov	w11, #30720
	cmp	w10, w11
	b.eq	LBB0_3
; %bb.2:
	mov	w0, #0
	str	w23, [x8, x9, lsl #2]
	b	LBB0_4
LBB0_3:
	str	wzr, [x8, x9, lsl #2]
	asr	w0, w23, #2
LBB0_4:
Lloh22:
	adrp	x8, _PACKETJ_TYPE3@GOTPAGE
Lloh23:
	ldr	x8, [x8, _PACKETJ_TYPE3@GOTPAGEOFF]
Lloh24:
	ldr	w3, [x8]
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x19]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	w0, [x8, x9, lsl #2]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	mov	w10, #1
	str	w10, [x8, x9, lsl #2]
	mov	w20, #13
Lloh25:
	adrp	x23, _PACKETJ_TYPE6@GOTPAGE
Lloh26:
	ldr	x23, [x23, _PACKETJ_TYPE6@GOTPAGEOFF]
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w3, [x23]
	mov	w0, #0
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x19]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	w0, [x8, x9, lsl #2]
	ldrsw	x9, [sp, #12]
	add	w10, w9, #1
	str	w10, [sp, #12]
	str	wzr, [x8, x9, lsl #2]
	subs	w20, w20, #1
	b.ne	LBB0_5
; %bb.6:
	ldr	w0, [x21]
Lloh27:
	adrp	x8, _mmUVD_JRBC_RB_RPTR@GOTPAGE
Lloh28:
	ldr	x8, [x8, _mmUVD_JRBC_RB_RPTR@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	lsl	w2, w0, #2
	add	x1, sp, #12
	mov	x0, x19
	mov	w3, #0
	bl	_vcn_v1_0_jpeg_ring_patch_wreg
	ldr	w0, [x21]
	ldr	w2, [x22]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	lsl	w2, w0, #2
	add	x1, sp, #12
	mov	x0, x19
	mov	w3, #18
	bl	_vcn_v1_0_jpeg_ring_patch_wreg
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_UVD,4,2                        ; @UVD
	.comm	_mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW,4,2 ; @mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW
	.comm	_mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH,4,2 ; @mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH
	.comm	_PACKETJ_TYPE2,4,2              ; @PACKETJ_TYPE2
	.comm	_mmUVD_JRBC_RB_CNTL,4,2         ; @mmUVD_JRBC_RB_CNTL
	.comm	_mmUVD_JRBC_RB_REF_DATA,4,2     ; @mmUVD_JRBC_RB_REF_DATA
	.comm	_mmUVD_JRBC_RB_COND_RD_TIMER,4,2 ; @mmUVD_JRBC_RB_COND_RD_TIMER
	.comm	_PACKETJ_TYPE0,4,2              ; @PACKETJ_TYPE0
	.comm	_mmUVD_JRBC_EXTERNAL_REG_BASE,4,2 ; @mmUVD_JRBC_EXTERNAL_REG_BASE
	.comm	_PACKETJ_TYPE3,4,2              ; @PACKETJ_TYPE3
	.comm	_PACKETJ_TYPE6,4,2              ; @PACKETJ_TYPE6
	.comm	_mmUVD_JRBC_RB_RPTR,4,2         ; @mmUVD_JRBC_RB_RPTR
	.no_dead_strip	_vcn_v1_0_jpeg_ring_set_patch_ring
.subsections_via_symbols
