	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function uvd_v6_0_set_powergating_state
_uvd_v6_0_set_powergating_state:        ## @uvd_v6_0_set_powergating_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %ebx
	movq	%rdi, %r14
	movq	_mmUVD_POWER_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_UVD_POWER_STATUS__UVD_PG_EN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_AMD_PG_STATE_GATE@GOTPCREL(%rip), %rax
	cmpl	%ebx, (%rax)
	jne	LBB0_2
## %bb.1:
	movq	%r14, %rdi
	callq	_uvd_v6_0_stop
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_2:
	movq	%r14, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_uvd_v6_0_start                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_mmUVD_POWER_STATUS,4,2         ## @mmUVD_POWER_STATUS
	.comm	_UVD_POWER_STATUS__UVD_PG_EN_MASK,4,2 ## @UVD_POWER_STATUS__UVD_PG_EN_MASK
	.comm	_AMD_PG_STATE_GATE,4,2          ## @AMD_PG_STATE_GATE
	.no_dead_strip	_uvd_v6_0_set_powergating_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function uvd_v6_0_set_powergating_state
_uvd_v6_0_set_powergating_state:        ; @uvd_v6_0_set_powergating_state
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _mmUVD_POWER_STATUS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _mmUVD_POWER_STATUS@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _UVD_POWER_STATUS__UVD_PG_EN_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _UVD_POWER_STATUS__UVD_PG_EN_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_WREG32
Lloh6:
	adrp	x8, _AMD_PG_STATE_GATE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AMD_PG_STATE_GATE@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	mov	x0, x19
	cmp	w8, w20
	b.ne	LBB0_2
; %bb.1:
	bl	_uvd_v6_0_stop
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_2:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_uvd_v6_0_start
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_mmUVD_POWER_STATUS,4,2         ; @mmUVD_POWER_STATUS
	.comm	_UVD_POWER_STATUS__UVD_PG_EN_MASK,4,2 ; @UVD_POWER_STATUS__UVD_PG_EN_MASK
	.comm	_AMD_PG_STATE_GATE,4,2          ; @AMD_PG_STATE_GATE
	.no_dead_strip	_uvd_v6_0_set_powergating_state
.subsections_via_symbols
