	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function chv_disable_pll
_chv_disable_pll:                       ## @chv_disable_pll
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r12d
	movq	%rdi, %r14
	movl	%esi, %edi
	callq	_vlv_pipe_to_channel
	movl	%eax, %r15d
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_assert_pipe_disabled
	movq	_DPLL_SSC_REF_CLK_CHV@GOTPCREL(%rip), %rax
	movq	_DPLL_REF_CLK_ENABLE_VLV@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	_DPLL_VGA_MODE_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_A@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	cmpl	%r12d, (%rcx)
	je	LBB0_2
## %bb.1:
	movq	_DPLL_INTEGRATED_CRI_CLK_VLV@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_2:
	orl	%eax, %ebx
	movl	%r12d, %edi
	callq	_DPLL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	%r12d, %edi
	callq	_DPLL
	movl	%eax, %edi
	callq	_POSTING_READ
	movq	%r14, %rdi
	callq	_vlv_dpio_get
	movl	%r15d, %edi
	callq	_CHV_CMN_DW14
	movq	%r14, %rdi
	movl	%r12d, %esi
	movl	%eax, %edx
	callq	_vlv_dpio_read
	movq	_DPIO_DCLKP_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	%r15d, %edi
	callq	_CHV_CMN_DW14
	movq	%r14, %rdi
	movl	%r12d, %esi
	movl	%eax, %edx
	movl	%ebx, %ecx
	callq	_vlv_dpio_write
	movq	%r14, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_vlv_dpio_put                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DPLL_SSC_REF_CLK_CHV,4,2       ## @DPLL_SSC_REF_CLK_CHV
	.comm	_DPLL_REF_CLK_ENABLE_VLV,4,2    ## @DPLL_REF_CLK_ENABLE_VLV
	.comm	_DPLL_VGA_MODE_DIS,4,2          ## @DPLL_VGA_MODE_DIS
	.comm	_PIPE_A,4,2                     ## @PIPE_A
	.comm	_DPLL_INTEGRATED_CRI_CLK_VLV,4,2 ## @DPLL_INTEGRATED_CRI_CLK_VLV
	.comm	_DPIO_DCLKP_EN,4,2              ## @DPIO_DCLKP_EN
	.no_dead_strip	_chv_disable_pll
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function chv_disable_pll
_chv_disable_pll:                       ; @chv_disable_pll
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	mov	x0, x1
	bl	_vlv_pipe_to_channel
	mov	x21, x0
	mov	x0, x19
	mov	x1, x20
	bl	_assert_pipe_disabled
Lloh0:
	adrp	x8, _DPLL_SSC_REF_CLK_CHV@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DPLL_SSC_REF_CLK_CHV@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _DPLL_REF_CLK_ENABLE_VLV@GOTPAGE
Lloh4:
	ldr	x9, [x9, _DPLL_REF_CLK_ENABLE_VLV@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
Lloh6:
	adrp	x10, _DPLL_VGA_MODE_DIS@GOTPAGE
Lloh7:
	ldr	x10, [x10, _DPLL_VGA_MODE_DIS@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh8:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh9:
	adrp	x9, _PIPE_A@GOTPAGE
Lloh10:
	ldr	x9, [x9, _PIPE_A@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
Lloh12:
	adrp	x10, _DPLL_INTEGRATED_CRI_CLK_VLV@GOTPAGE
Lloh13:
	ldr	x10, [x10, _DPLL_INTEGRATED_CRI_CLK_VLV@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
	cmp	w9, w20
	csel	w9, wzr, w10, eq
	orr	w22, w8, w9
	mov	x0, x20
	bl	_DPLL
	mov	x1, x22
	bl	_I915_WRITE
	mov	x0, x20
	bl	_DPLL
	bl	_POSTING_READ
	mov	x0, x19
	bl	_vlv_dpio_get
	mov	x0, x21
	bl	_CHV_CMN_DW14
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_vlv_dpio_read
Lloh15:
	adrp	x8, _DPIO_DCLKP_EN@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DPIO_DCLKP_EN@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	bic	w22, w0, w8
	mov	x0, x21
	bl	_CHV_CMN_DW14
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	mov	x3, x22
	bl	_vlv_dpio_write
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_vlv_dpio_put
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_DPLL_SSC_REF_CLK_CHV,4,2       ; @DPLL_SSC_REF_CLK_CHV
	.comm	_DPLL_REF_CLK_ENABLE_VLV,4,2    ; @DPLL_REF_CLK_ENABLE_VLV
	.comm	_DPLL_VGA_MODE_DIS,4,2          ; @DPLL_VGA_MODE_DIS
	.comm	_PIPE_A,4,2                     ; @PIPE_A
	.comm	_DPLL_INTEGRATED_CRI_CLK_VLV,4,2 ; @DPLL_INTEGRATED_CRI_CLK_VLV
	.comm	_DPIO_DCLKP_EN,4,2              ; @DPIO_DCLKP_EN
	.no_dead_strip	_chv_disable_pll
.subsections_via_symbols
