	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vcn_v2_0_dec_ring_emit_wreg    ## -- Begin function vcn_v2_0_dec_ring_emit_wreg
	.p2align	4, 0x90
_vcn_v2_0_dec_ring_emit_wreg:           ## @vcn_v2_0_dec_ring_emit_wreg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movl	%esi, %r15d
	movq	%rdi, %rbx
	movq	(%rdi), %r12
	movl	8(%r12), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	shll	$2, %r15d
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_amdgpu_ring_write
	movl	4(%r12), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_amdgpu_ring_write
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	_VCN_DEC_KMD_CMD@GOTPCREL(%rip), %rax
	movq	_VCN_DEC_CMD_WRITE_REG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	addl	%esi, %esi
	orl	(%rax), %esi
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VCN_DEC_KMD_CMD,4,2            ## @VCN_DEC_KMD_CMD
	.comm	_VCN_DEC_CMD_WRITE_REG,4,2      ## @VCN_DEC_CMD_WRITE_REG
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vcn_v2_0_dec_ring_emit_wreg    ; -- Begin function vcn_v2_0_dec_ring_emit_wreg
	.p2align	2
_vcn_v2_0_dec_ring_emit_wreg:           ; @vcn_v2_0_dec_ring_emit_wreg
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	ldr	x22, [x0]
	ldr	w0, [x22, #8]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x21
	bl	_amdgpu_ring_write
	lsl	w1, w20, #2
	mov	x0, x21
	bl	_amdgpu_ring_write
	ldr	w0, [x22, #4]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x21
	bl	_amdgpu_ring_write
	mov	x0, x21
	mov	x1, x19
	bl	_amdgpu_ring_write
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x21
	bl	_amdgpu_ring_write
Lloh0:
	adrp	x8, _VCN_DEC_KMD_CMD@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VCN_DEC_KMD_CMD@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _VCN_DEC_CMD_WRITE_REG@GOTPAGE
Lloh4:
	ldr	x9, [x9, _VCN_DEC_CMD_WRITE_REG@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w1, w8, w9, lsl #1
	mov	x0, x21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_VCN_DEC_KMD_CMD,4,2            ; @VCN_DEC_KMD_CMD
	.comm	_VCN_DEC_CMD_WRITE_REG,4,2      ; @VCN_DEC_CMD_WRITE_REG
.subsections_via_symbols
