	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function gfx_v6_0_sw_init
LCPI0_0:
	.space	16
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_gfx_v6_0_sw_init:                      ## @gfx_v6_0_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	_AMDGPU_IRQ_CLIENTID_LEGACY@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	leaq	8(%rdi), %r14
	movl	$181, %edx
	movq	%r14, %rcx
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_8
## %bb.1:
	movl	(%r12), %esi
	leaq	44(%r15), %rcx
	movq	%r15, %rdi
	movl	$184, %edx
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_8
## %bb.2:
	movl	(%r12), %esi
	leaq	40(%r15), %rcx
	movq	%r15, %rdi
	movl	$185, %edx
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_8
## %bb.3:
	movq	%r15, %rdi
	callq	_gfx_v6_0_scratch_init
	movq	%r15, %rdi
	callq	_gfx_v6_0_init_microcode
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_7
LBB0_5:
	movq	32(%r15), %rax
	movq	%r15, %rdi
	callq	*(%rax)
	testl	%eax, %eax
	je	LBB0_9
## %bb.6:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
LBB0_7:
	xorl	%eax, %eax
	callq	_DRM_ERROR
LBB0_8:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_9:
	cmpl	$0, (%r15)
	jle	LBB0_13
## %bb.10:
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	movq	24(%r15), %rax
	leaq	(%rax,%r12), %rbx
	movq	$0, 32(%rax,%r12)
	movl	16(%rax,%r12), %edi
	leaq	L_.str.2(%rip), %rsi
	xorl	%eax, %eax
	callq	_sprintf
	movq	_AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	$1024, %edx                     ## imm = 0x400
	movq	%r14, %rcx
	callq	_amdgpu_ring_init
	testl	%eax, %eax
	jne	LBB0_19
## %bb.12:                              ##   in Loop: Header=BB0_11 Depth=1
	incq	%r13
	movslq	(%r15), %rax
	addq	$40, %r12
	cmpq	%rax, %r13
	jl	LBB0_11
LBB0_13:
	cmpl	$0, 4(%r15)
	jle	LBB0_20
## %bb.14:
	xorl	%r13d, %r13d
	xorl	%r12d, %r12d
LBB0_15:                                ## =>This Inner Loop Header: Depth=1
	cmpq	$31, %r12
	ja	LBB0_21
## %bb.16:                              ##   in Loop: Header=BB0_15 Depth=1
	movq	_AMDGPU_MAX_COMPUTE_RINGS@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	cmpq	%rax, %r12
	jge	LBB0_21
## %bb.17:                              ##   in Loop: Header=BB0_15 Depth=1
	movq	16(%r15), %rbx
	leaq	(%rbx,%r13), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movabsq	$4294967296, %rax               ## imm = 0x100000000
	movq	%rax, (%rbx,%r13)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 24(%rbx,%r13)
	movl	%r12d, 8(%rbx,%r13)
	movl	%r12d, 12(%rbx,%r13)
	movl	16(%rbx,%r13), %edi
	leaq	L_.str.4(%rip), %rsi
	movl	$1, %edx
	movl	%r12d, %ecx
	movl	%r12d, %r8d
	xorl	%eax, %eax
	callq	_sprintf
	movl	8(%rbx,%r13), %r8d
	movq	_AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP@GOTPCREL(%rip), %rax
	addl	(%rax), %r8d
	movq	%r15, %rdi
	movq	-48(%rbp), %rsi                 ## 8-byte Reload
	movl	$1024, %edx                     ## imm = 0x400
	movq	%r14, %rcx
	callq	_amdgpu_ring_init
	testl	%eax, %eax
	jne	LBB0_19
## %bb.18:                              ##   in Loop: Header=BB0_15 Depth=1
	incq	%r12
	movslq	4(%r15), %rax
	addq	$40, %r13
	xorl	%ebx, %ebx
	cmpq	%rax, %r12
	jl	LBB0_15
	jmp	LBB0_8
LBB0_19:
	movl	%eax, %ebx
	jmp	LBB0_8
LBB0_20:
	xorl	%ebx, %ebx
	jmp	LBB0_8
LBB0_21:
	leaq	L_.str.3(%rip), %rdi
	xorl	%ebx, %ebx
	movl	%r12d, %esi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_8
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ## @AMDGPU_IRQ_CLIENTID_LEGACY
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to load gfx firmware!\n"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to init rlc BOs!\n"

L_.str.2:                               ## @.str.2
	.asciz	"gfx"

	.comm	_AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP,4,2 ## @AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP
	.comm	_AMDGPU_MAX_COMPUTE_RINGS,4,2   ## @AMDGPU_MAX_COMPUTE_RINGS
L_.str.3:                               ## @.str.3
	.asciz	"Too many (%d) compute rings!\n"

L_.str.4:                               ## @.str.4
	.asciz	"comp_%d.%d.%d"

	.comm	_AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP,4,2 ## @AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP
	.no_dead_strip	_gfx_v6_0_sw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function gfx_v6_0_sw_init
lCPI0_0:
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_gfx_v6_0_sw_init:                      ; @gfx_v6_0_sw_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	d9, d8, [sp, #32]               ; 16-byte Folded Spill
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	.cfi_offset b8, -104
	.cfi_offset b9, -112
	mov	x19, x0
Lloh0:
	adrp	x22, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGE
Lloh1:
	ldr	x22, [x22, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x20, x0, #8
	mov	w2, #181
	mov	x3, x20
	bl	_amdgpu_irq_add_id
	mov	x21, x0
	cbnz	w0, LBB0_8
; %bb.1:
	ldr	w1, [x22]
	add	x3, x19, #44
	mov	x0, x19
	mov	w2, #184
	bl	_amdgpu_irq_add_id
	mov	x21, x0
	cbnz	w0, LBB0_8
; %bb.2:
	ldr	w1, [x22]
	add	x3, x19, #40
	mov	x0, x19
	mov	w2, #185
	bl	_amdgpu_irq_add_id
	mov	x21, x0
	cbnz	w0, LBB0_8
; %bb.3:
	mov	x0, x19
	bl	_gfx_v6_0_scratch_init
	mov	x0, x19
	bl	_gfx_v6_0_init_microcode
	cbz	w0, LBB0_5
; %bb.4:
	mov	x21, x0
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_7
LBB0_5:
	ldr	x8, [x19, #32]
	ldr	x8, [x8]
	mov	x0, x19
	blr	x8
	cbz	w0, LBB0_9
; %bb.6:
	mov	x21, x0
Lloh4:
	adrp	x0, l_.str.1@PAGE
Lloh5:
	add	x0, x0, l_.str.1@PAGEOFF
LBB0_7:
	bl	_DRM_ERROR
LBB0_8:
	mov	x0, x21
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	ldp	d9, d8, [sp, #32]               ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
LBB0_9:
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_13
; %bb.10:
	mov	x23, #0
	mov	x24, #0
Lloh6:
	adrp	x25, _AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP@GOTPAGE
Lloh7:
	ldr	x25, [x25, _AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP@GOTPAGEOFF]
Lloh8:
	adrp	x22, l_.str.2@PAGE
Lloh9:
	add	x22, x22, l_.str.2@PAGEOFF
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #24]
	add	x21, x8, x23
	str	xzr, [x21, #32]
	ldr	w0, [x21, #16]
	mov	x1, x22
	bl	_sprintf
	ldr	w4, [x25]
	mov	x0, x19
	mov	x1, x21
	mov	w2, #1024
	mov	x3, x20
	bl	_amdgpu_ring_init
	cbnz	w0, LBB0_19
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=1
	add	x24, x24, #1
	ldrsw	x8, [x19]
	add	x23, x23, #40
	cmp	x24, x8
	b.lt	LBB0_11
LBB0_13:
	ldr	w8, [x19, #4]
	cmp	w8, #1
	b.lt	LBB0_20
; %bb.14:
	mov	x24, #0
	mov	x23, #0
Lloh10:
	adrp	x25, _AMDGPU_MAX_COMPUTE_RINGS@GOTPAGE
Lloh11:
	ldr	x25, [x25, _AMDGPU_MAX_COMPUTE_RINGS@GOTPAGEOFF]
Lloh12:
	adrp	x8, lCPI0_0@PAGE
Lloh13:
	ldr	d8, [x8, lCPI0_0@PAGEOFF]
	mov	w26, #1
Lloh14:
	adrp	x27, _AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP@GOTPAGE
Lloh15:
	ldr	x27, [x27, _AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP@GOTPAGEOFF]
Lloh16:
	adrp	x22, l_.str.4@PAGE
Lloh17:
	add	x22, x22, l_.str.4@PAGEOFF
LBB0_15:                                ; =>This Inner Loop Header: Depth=1
	cmp	x23, #31
	b.hi	LBB0_21
; %bb.16:                               ;   in Loop: Header=BB0_15 Depth=1
	ldrsw	x8, [x25]
	cmp	x23, x8
	b.ge	LBB0_21
; %bb.17:                               ;   in Loop: Header=BB0_15 Depth=1
	ldr	x8, [x19, #16]
	add	x21, x8, x24
	stp	xzr, xzr, [x21, #24]
	str	d8, [x21]
	stp	w23, w23, [x21, #8]
	ldr	w0, [x21, #16]
	stp	x23, x23, [sp, #8]
	str	x26, [sp]
	mov	x1, x22
	bl	_sprintf
	ldr	w8, [x27]
	ldr	w9, [x21, #8]
	add	w4, w9, w8
	mov	x0, x19
	mov	x1, x21
	mov	w2, #1024
	mov	x3, x20
	bl	_amdgpu_ring_init
	mov	x21, x0
	cbnz	w0, LBB0_8
; %bb.18:                               ;   in Loop: Header=BB0_15 Depth=1
	add	x23, x23, #1
	ldrsw	x8, [x19, #4]
	add	x24, x24, #40
	cmp	x23, x8
	b.lt	LBB0_15
	b	LBB0_8
LBB0_19:
	mov	x21, x0
	b	LBB0_8
LBB0_20:
	mov	w21, #0
	b	LBB0_8
LBB0_21:
	str	x23, [sp]
Lloh18:
	adrp	x0, l_.str.3@PAGE
Lloh19:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_ERROR
	mov	w21, #0
	b	LBB0_8
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdr	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpAdd	Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ; @AMDGPU_IRQ_CLIENTID_LEGACY
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to load gfx firmware!\n"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to init rlc BOs!\n"

l_.str.2:                               ; @.str.2
	.asciz	"gfx"

	.comm	_AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP,4,2 ; @AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP
	.comm	_AMDGPU_MAX_COMPUTE_RINGS,4,2   ; @AMDGPU_MAX_COMPUTE_RINGS
l_.str.3:                               ; @.str.3
	.asciz	"Too many (%d) compute rings!\n"

l_.str.4:                               ; @.str.4
	.asciz	"comp_%d.%d.%d"

	.comm	_AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP,4,2 ; @AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP
	.no_dead_strip	_gfx_v6_0_sw_init
.subsections_via_symbols
