	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_dal_hw_factory_init            ## -- Begin function dal_hw_factory_init
	.p2align	4, 0x90
_dal_hw_factory_init:                   ## @dal_hw_factory_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %ebx
	movq	%rdi, %r14
	movl	%edx, %edi
	callq	_IS_FPGA_MAXIMUS_DC
	testq	%rax, %rax
	je	LBB0_4
## %bb.1:
	movq	%r14, %rdi
	callq	_dal_hw_factory_diag_fpga_init
LBB0_2:
	movl	$1, %ebx
LBB0_3:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_4:
	addl	$-132, %ebx
	cmpl	$8, %ebx
	ja	LBB0_9
## %bb.5:
	leaq	LJTI0_0(%rip), %rax
	movslq	(%rax,%rbx,4), %rcx
	addq	%rax, %rcx
	jmpq	*%rcx
LBB0_6:
	movq	%r14, %rdi
	callq	_dal_hw_factory_dce110_init
	jmp	LBB0_2
LBB0_7:
	movq	%r14, %rdi
	callq	_dal_hw_factory_dce80_init
	jmp	LBB0_2
LBB0_8:
	movq	%r14, %rdi
	callq	_dal_hw_factory_dce120_init
	jmp	LBB0_2
LBB0_9:
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	_ASSERT_CRITICAL
	jmp	LBB0_3
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
LJTI0_0:
	.long	L0_0_set_7
	.long	L0_0_set_7
	.long	L0_0_set_7
	.long	L0_0_set_8
	.long	L0_0_set_8
	.long	L0_0_set_6
	.long	L0_0_set_6
	.long	L0_0_set_6
	.long	L0_0_set_6
	.end_data_region
                                        ## -- End function
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_dal_hw_factory_init            ; -- Begin function dal_hw_factory_init
	.p2align	2
_dal_hw_factory_init:                   ; @dal_hw_factory_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	mov	x0, x2
	bl	_IS_FPGA_MAXIMUS_DC
	cbz	x0, LBB0_4
; %bb.1:
	mov	x0, x19
	bl	_dal_hw_factory_diag_fpga_init
LBB0_2:
	mov	w0, #1
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_4:
	sub	w8, w20, #132
	cmp	w8, #8
	b.hi	LBB0_9
; %bb.5:
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_6
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_6:
	mov	x0, x19
	bl	_dal_hw_factory_dce110_init
	b	LBB0_2
LBB0_7:
	mov	x0, x19
	bl	_dal_hw_factory_dce80_init
	b	LBB0_2
LBB0_8:
	mov	x0, x19
	bl	_dal_hw_factory_dce120_init
	b	LBB0_2
LBB0_9:
	mov	w0, #0
	bl	_ASSERT_CRITICAL
	mov	w0, #0
	b	LBB0_3
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_8-LBB0_6)>>2
	.byte	(LBB0_8-LBB0_6)>>2
	.byte	(LBB0_6-LBB0_6)>>2
	.byte	(LBB0_6-LBB0_6)>>2
	.byte	(LBB0_6-LBB0_6)>>2
	.byte	(LBB0_6-LBB0_6)>>2
                                        ; -- End function
.subsections_via_symbols
