	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hdmi_phy_8x60_powerup
_hdmi_phy_8x60_powerup:                 ## @hdmi_phy_8x60_powerup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r12
	movq	_REG_HDMI_8x60_PHY_REG0@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	$3, %edi
	callq	_HDMI_8x60_PHY_REG0_DESER_DEL_CTRL
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_hdmi_phy_write
	xorl	%ebx, %ebx
	cmpq	$27000000, %r14                 ## imm = 0x19BFCC0
	sete	%bl
	movq	_REG_HDMI_8x60_PHY_REG1@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	$5, %edi
	callq	_HDMI_8x60_PHY_REG1_DTEST_MUX_SEL
	movl	%eax, %r15d
	movl	$4, %edi
	subl	%ebx, %edi
	callq	_HDMI_8x60_PHY_REG1_OUTVOL_SWING_CTRL
	orl	%eax, %r15d
	movq	%r12, %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	callq	_hdmi_phy_write
	movq	_HDMI_8x60_PHY_REG2_PD_PWRGEN@GOTPCREL(%rip), %rax
	movq	_HDMI_8x60_PHY_REG2_PD_PLL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_4@GOTPCREL(%rip), %r14
	orl	(%r14), %edx
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_3@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_2@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_REG_HDMI_8x60_PHY_REG2@GOTPCREL(%rip), %r15
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_1@GOTPCREL(%rip), %r13
	orl	(%r13), %edx
	movl	(%r15), %esi
	movq	_HDMI_8x60_PHY_REG2_PD_DESER@GOTPCREL(%rip), %rbx
	orl	(%rbx), %edx
	movq	%r12, %rdi
	callq	_hdmi_phy_write
	movl	(%r15), %esi
	movl	(%r14), %edx
	movq	_HDMI_8x60_PHY_REG2_PD_PLL@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_3@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_2@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	orl	(%r13), %edx
	orl	(%rbx), %edx
	movq	%r12, %rdi
	callq	_hdmi_phy_write
	movl	(%r15), %esi
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_3@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	orl	(%r14), %edx
	movq	_HDMI_8x60_PHY_REG2_PD_DRIVE_2@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	orl	(%r13), %edx
	orl	(%rbx), %edx
	movq	%r12, %rdi
	callq	_hdmi_phy_write
	movq	_REG_HDMI_8x60_PHY_REG3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_HDMI_8x60_PHY_REG3_PLL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	callq	_hdmi_phy_write
	movq	_REG_HDMI_8x60_PHY_REG9@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_hdmi_phy_write
	movq	_REG_HDMI_8x60_PHY_REG12@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_HDMI_8x60_PHY_REG12_RETIMING_EN@GOTPCREL(%rip), %rax
	movq	_HDMI_8x60_PHY_REG12_PLL_LOCK_DETECT_EN@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	orl	(%rax), %edx
	movq	%r12, %rdi
	callq	_hdmi_phy_write
	movl	(%r15), %esi
	movl	(%rbx), %edx
	movq	%r12, %rdi
	callq	_hdmi_phy_write
	movl	(%r15), %esi
	movq	_HDMI_8x60_PHY_REG2_RCV_SENSE_EN@GOTPCREL(%rip), %rax
	movl	(%rbx), %edx
	orl	(%rax), %edx
	movq	%r12, %rdi
	callq	_hdmi_phy_write
	movq	_REG_HDMI_8x60_PHY_REG4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_hdmi_phy_write
	movq	_REG_HDMI_8x60_PHY_REG5@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_hdmi_phy_write
	movq	_REG_HDMI_8x60_PHY_REG6@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_hdmi_phy_write
	movq	_REG_HDMI_8x60_PHY_REG7@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_hdmi_phy_write
	movq	_REG_HDMI_8x60_PHY_REG8@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_hdmi_phy_write
	movl	(%r14), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_hdmi_phy_write
	movq	_REG_HDMI_8x60_PHY_REG10@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_hdmi_phy_write
	movq	_REG_HDMI_8x60_PHY_REG11@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_hdmi_phy_write
	movl	(%r13), %edx
	movq	_HDMI_8x60_PHY_REG12_RETIMING_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_REG_HDMI_8x60_PHY_REG12@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_HDMI_8x60_PHY_REG12_FORCE_LOCK@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r12, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_hdmi_phy_write                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_HDMI_8x60_PHY_REG0,4,2     ## @REG_HDMI_8x60_PHY_REG0
	.comm	_REG_HDMI_8x60_PHY_REG1,4,2     ## @REG_HDMI_8x60_PHY_REG1
	.comm	_REG_HDMI_8x60_PHY_REG2,4,2     ## @REG_HDMI_8x60_PHY_REG2
	.comm	_HDMI_8x60_PHY_REG2_PD_PWRGEN,4,2 ## @HDMI_8x60_PHY_REG2_PD_PWRGEN
	.comm	_HDMI_8x60_PHY_REG2_PD_PLL,4,2  ## @HDMI_8x60_PHY_REG2_PD_PLL
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_4,4,2 ## @HDMI_8x60_PHY_REG2_PD_DRIVE_4
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_3,4,2 ## @HDMI_8x60_PHY_REG2_PD_DRIVE_3
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_2,4,2 ## @HDMI_8x60_PHY_REG2_PD_DRIVE_2
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_1,4,2 ## @HDMI_8x60_PHY_REG2_PD_DRIVE_1
	.comm	_HDMI_8x60_PHY_REG2_PD_DESER,4,2 ## @HDMI_8x60_PHY_REG2_PD_DESER
	.comm	_REG_HDMI_8x60_PHY_REG3,4,2     ## @REG_HDMI_8x60_PHY_REG3
	.comm	_HDMI_8x60_PHY_REG3_PLL_ENABLE,4,2 ## @HDMI_8x60_PHY_REG3_PLL_ENABLE
	.comm	_REG_HDMI_8x60_PHY_REG9,4,2     ## @REG_HDMI_8x60_PHY_REG9
	.comm	_REG_HDMI_8x60_PHY_REG12,4,2    ## @REG_HDMI_8x60_PHY_REG12
	.comm	_HDMI_8x60_PHY_REG12_RETIMING_EN,4,2 ## @HDMI_8x60_PHY_REG12_RETIMING_EN
	.comm	_HDMI_8x60_PHY_REG12_PLL_LOCK_DETECT_EN,4,2 ## @HDMI_8x60_PHY_REG12_PLL_LOCK_DETECT_EN
	.comm	_HDMI_8x60_PHY_REG2_RCV_SENSE_EN,4,2 ## @HDMI_8x60_PHY_REG2_RCV_SENSE_EN
	.comm	_REG_HDMI_8x60_PHY_REG4,4,2     ## @REG_HDMI_8x60_PHY_REG4
	.comm	_REG_HDMI_8x60_PHY_REG5,4,2     ## @REG_HDMI_8x60_PHY_REG5
	.comm	_REG_HDMI_8x60_PHY_REG6,4,2     ## @REG_HDMI_8x60_PHY_REG6
	.comm	_REG_HDMI_8x60_PHY_REG7,4,2     ## @REG_HDMI_8x60_PHY_REG7
	.comm	_REG_HDMI_8x60_PHY_REG8,4,2     ## @REG_HDMI_8x60_PHY_REG8
	.comm	_REG_HDMI_8x60_PHY_REG10,4,2    ## @REG_HDMI_8x60_PHY_REG10
	.comm	_REG_HDMI_8x60_PHY_REG11,4,2    ## @REG_HDMI_8x60_PHY_REG11
	.comm	_HDMI_8x60_PHY_REG12_FORCE_LOCK,4,2 ## @HDMI_8x60_PHY_REG12_FORCE_LOCK
	.no_dead_strip	_hdmi_phy_8x60_powerup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hdmi_phy_8x60_powerup
_hdmi_phy_8x60_powerup:                 ; @hdmi_phy_8x60_powerup
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _REG_HDMI_8x60_PHY_REG0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _REG_HDMI_8x60_PHY_REG0@GOTPAGEOFF]
Lloh2:
	ldr	w21, [x8]
	mov	w23, #3
	mov	w0, #3
	bl	_HDMI_8x60_PHY_REG0_DESER_DEL_CTRL
	mov	x2, x0
	mov	x0, x19
	mov	x1, x21
	bl	_hdmi_phy_write
Lloh3:
	adrp	x8, _REG_HDMI_8x60_PHY_REG1@GOTPAGE
Lloh4:
	ldr	x8, [x8, _REG_HDMI_8x60_PHY_REG1@GOTPAGEOFF]
Lloh5:
	ldr	w21, [x8]
	mov	w0, #5
	bl	_HDMI_8x60_PHY_REG1_DTEST_MUX_SEL
	mov	x22, x0
	mov	w8, #64704
	movk	w8, #411, lsl #16
	cmp	x20, x8
	cinc	w0, w23, ne
	bl	_HDMI_8x60_PHY_REG1_OUTVOL_SWING_CTRL
	orr	w2, w0, w22
	mov	x0, x19
	mov	x1, x21
	bl	_hdmi_phy_write
Lloh6:
	adrp	x20, _REG_HDMI_8x60_PHY_REG2@GOTPAGE
Lloh7:
	ldr	x20, [x20, _REG_HDMI_8x60_PHY_REG2@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh8:
	adrp	x8, _HDMI_8x60_PHY_REG2_PD_PWRGEN@GOTPAGE
Lloh9:
	ldr	x8, [x8, _HDMI_8x60_PHY_REG2_PD_PWRGEN@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
Lloh11:
	adrp	x21, _HDMI_8x60_PHY_REG2_PD_PLL@GOTPAGE
Lloh12:
	ldr	x21, [x21, _HDMI_8x60_PHY_REG2_PD_PLL@GOTPAGEOFF]
	ldr	w9, [x21]
	orr	w8, w9, w8
Lloh13:
	adrp	x22, _HDMI_8x60_PHY_REG2_PD_DRIVE_4@GOTPAGE
Lloh14:
	ldr	x22, [x22, _HDMI_8x60_PHY_REG2_PD_DRIVE_4@GOTPAGEOFF]
	ldr	w9, [x22]
	orr	w8, w8, w9
Lloh15:
	adrp	x23, _HDMI_8x60_PHY_REG2_PD_DRIVE_3@GOTPAGE
Lloh16:
	ldr	x23, [x23, _HDMI_8x60_PHY_REG2_PD_DRIVE_3@GOTPAGEOFF]
	ldr	w9, [x23]
	orr	w8, w8, w9
Lloh17:
	adrp	x25, _HDMI_8x60_PHY_REG2_PD_DRIVE_2@GOTPAGE
Lloh18:
	ldr	x25, [x25, _HDMI_8x60_PHY_REG2_PD_DRIVE_2@GOTPAGEOFF]
	ldr	w9, [x25]
	orr	w8, w8, w9
Lloh19:
	adrp	x26, _HDMI_8x60_PHY_REG2_PD_DRIVE_1@GOTPAGE
Lloh20:
	ldr	x26, [x26, _HDMI_8x60_PHY_REG2_PD_DRIVE_1@GOTPAGEOFF]
	ldr	w9, [x26]
	orr	w8, w8, w9
Lloh21:
	adrp	x24, _HDMI_8x60_PHY_REG2_PD_DESER@GOTPAGE
Lloh22:
	ldr	x24, [x24, _HDMI_8x60_PHY_REG2_PD_DESER@GOTPAGEOFF]
	ldr	w9, [x24]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_hdmi_phy_write
	ldr	w1, [x20]
	ldr	w8, [x21]
	ldr	w9, [x22]
	orr	w8, w9, w8
	ldr	w9, [x23]
	orr	w8, w8, w9
	ldr	w9, [x25]
	orr	w8, w8, w9
	ldr	w9, [x26]
	orr	w8, w8, w9
	ldr	w9, [x24]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_hdmi_phy_write
	ldr	w1, [x20]
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	ldr	w9, [x25]
	orr	w8, w8, w9
	ldr	w9, [x26]
	orr	w8, w8, w9
	ldr	w9, [x24]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_hdmi_phy_write
Lloh23:
	adrp	x8, _REG_HDMI_8x60_PHY_REG3@GOTPAGE
Lloh24:
	ldr	x8, [x8, _REG_HDMI_8x60_PHY_REG3@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
Lloh26:
	adrp	x8, _HDMI_8x60_PHY_REG3_PLL_ENABLE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _HDMI_8x60_PHY_REG3_PLL_ENABLE@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_hdmi_phy_write
Lloh29:
	adrp	x25, _REG_HDMI_8x60_PHY_REG9@GOTPAGE
Lloh30:
	ldr	x25, [x25, _REG_HDMI_8x60_PHY_REG9@GOTPAGEOFF]
	ldr	w1, [x25]
	mov	x0, x19
	mov	w2, #0
	bl	_hdmi_phy_write
Lloh31:
	adrp	x21, _REG_HDMI_8x60_PHY_REG12@GOTPAGE
Lloh32:
	ldr	x21, [x21, _REG_HDMI_8x60_PHY_REG12@GOTPAGEOFF]
Lloh33:
	adrp	x22, _HDMI_8x60_PHY_REG12_RETIMING_EN@GOTPAGE
Lloh34:
	ldr	x22, [x22, _HDMI_8x60_PHY_REG12_RETIMING_EN@GOTPAGEOFF]
	ldr	w1, [x21]
	ldr	w8, [x22]
Lloh35:
	adrp	x23, _HDMI_8x60_PHY_REG12_PLL_LOCK_DETECT_EN@GOTPAGE
Lloh36:
	ldr	x23, [x23, _HDMI_8x60_PHY_REG12_PLL_LOCK_DETECT_EN@GOTPAGEOFF]
	ldr	w9, [x23]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_hdmi_phy_write
	ldr	w1, [x20]
	ldr	w2, [x24]
	mov	x0, x19
	bl	_hdmi_phy_write
	ldr	w1, [x20]
Lloh37:
	adrp	x8, _HDMI_8x60_PHY_REG2_RCV_SENSE_EN@GOTPAGE
Lloh38:
	ldr	x8, [x8, _HDMI_8x60_PHY_REG2_RCV_SENSE_EN@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	ldr	w9, [x24]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_hdmi_phy_write
Lloh40:
	adrp	x8, _REG_HDMI_8x60_PHY_REG4@GOTPAGE
Lloh41:
	ldr	x8, [x8, _REG_HDMI_8x60_PHY_REG4@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_hdmi_phy_write
Lloh43:
	adrp	x8, _REG_HDMI_8x60_PHY_REG5@GOTPAGE
Lloh44:
	ldr	x8, [x8, _REG_HDMI_8x60_PHY_REG5@GOTPAGEOFF]
Lloh45:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_hdmi_phy_write
Lloh46:
	adrp	x8, _REG_HDMI_8x60_PHY_REG6@GOTPAGE
Lloh47:
	ldr	x8, [x8, _REG_HDMI_8x60_PHY_REG6@GOTPAGEOFF]
Lloh48:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_hdmi_phy_write
Lloh49:
	adrp	x8, _REG_HDMI_8x60_PHY_REG7@GOTPAGE
Lloh50:
	ldr	x8, [x8, _REG_HDMI_8x60_PHY_REG7@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_hdmi_phy_write
Lloh52:
	adrp	x8, _REG_HDMI_8x60_PHY_REG8@GOTPAGE
Lloh53:
	ldr	x8, [x8, _REG_HDMI_8x60_PHY_REG8@GOTPAGEOFF]
Lloh54:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_hdmi_phy_write
	ldr	w1, [x25]
	mov	x0, x19
	mov	w2, #0
	bl	_hdmi_phy_write
Lloh55:
	adrp	x8, _REG_HDMI_8x60_PHY_REG10@GOTPAGE
Lloh56:
	ldr	x8, [x8, _REG_HDMI_8x60_PHY_REG10@GOTPAGEOFF]
Lloh57:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_hdmi_phy_write
Lloh58:
	adrp	x8, _REG_HDMI_8x60_PHY_REG11@GOTPAGE
Lloh59:
	ldr	x8, [x8, _REG_HDMI_8x60_PHY_REG11@GOTPAGEOFF]
Lloh60:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_hdmi_phy_write
	ldr	w1, [x21]
	ldr	w8, [x22]
	ldr	w9, [x23]
Lloh61:
	adrp	x10, _HDMI_8x60_PHY_REG12_FORCE_LOCK@GOTPAGE
Lloh62:
	ldr	x10, [x10, _HDMI_8x60_PHY_REG12_FORCE_LOCK@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh63:
	ldr	w9, [x10]
	orr	w2, w8, w9
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_hdmi_phy_write
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_HDMI_8x60_PHY_REG0,4,2     ; @REG_HDMI_8x60_PHY_REG0
	.comm	_REG_HDMI_8x60_PHY_REG1,4,2     ; @REG_HDMI_8x60_PHY_REG1
	.comm	_REG_HDMI_8x60_PHY_REG2,4,2     ; @REG_HDMI_8x60_PHY_REG2
	.comm	_HDMI_8x60_PHY_REG2_PD_PWRGEN,4,2 ; @HDMI_8x60_PHY_REG2_PD_PWRGEN
	.comm	_HDMI_8x60_PHY_REG2_PD_PLL,4,2  ; @HDMI_8x60_PHY_REG2_PD_PLL
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_4,4,2 ; @HDMI_8x60_PHY_REG2_PD_DRIVE_4
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_3,4,2 ; @HDMI_8x60_PHY_REG2_PD_DRIVE_3
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_2,4,2 ; @HDMI_8x60_PHY_REG2_PD_DRIVE_2
	.comm	_HDMI_8x60_PHY_REG2_PD_DRIVE_1,4,2 ; @HDMI_8x60_PHY_REG2_PD_DRIVE_1
	.comm	_HDMI_8x60_PHY_REG2_PD_DESER,4,2 ; @HDMI_8x60_PHY_REG2_PD_DESER
	.comm	_REG_HDMI_8x60_PHY_REG3,4,2     ; @REG_HDMI_8x60_PHY_REG3
	.comm	_HDMI_8x60_PHY_REG3_PLL_ENABLE,4,2 ; @HDMI_8x60_PHY_REG3_PLL_ENABLE
	.comm	_REG_HDMI_8x60_PHY_REG9,4,2     ; @REG_HDMI_8x60_PHY_REG9
	.comm	_REG_HDMI_8x60_PHY_REG12,4,2    ; @REG_HDMI_8x60_PHY_REG12
	.comm	_HDMI_8x60_PHY_REG12_RETIMING_EN,4,2 ; @HDMI_8x60_PHY_REG12_RETIMING_EN
	.comm	_HDMI_8x60_PHY_REG12_PLL_LOCK_DETECT_EN,4,2 ; @HDMI_8x60_PHY_REG12_PLL_LOCK_DETECT_EN
	.comm	_HDMI_8x60_PHY_REG2_RCV_SENSE_EN,4,2 ; @HDMI_8x60_PHY_REG2_RCV_SENSE_EN
	.comm	_REG_HDMI_8x60_PHY_REG4,4,2     ; @REG_HDMI_8x60_PHY_REG4
	.comm	_REG_HDMI_8x60_PHY_REG5,4,2     ; @REG_HDMI_8x60_PHY_REG5
	.comm	_REG_HDMI_8x60_PHY_REG6,4,2     ; @REG_HDMI_8x60_PHY_REG6
	.comm	_REG_HDMI_8x60_PHY_REG7,4,2     ; @REG_HDMI_8x60_PHY_REG7
	.comm	_REG_HDMI_8x60_PHY_REG8,4,2     ; @REG_HDMI_8x60_PHY_REG8
	.comm	_REG_HDMI_8x60_PHY_REG10,4,2    ; @REG_HDMI_8x60_PHY_REG10
	.comm	_REG_HDMI_8x60_PHY_REG11,4,2    ; @REG_HDMI_8x60_PHY_REG11
	.comm	_HDMI_8x60_PHY_REG12_FORCE_LOCK,4,2 ; @HDMI_8x60_PHY_REG12_FORCE_LOCK
	.no_dead_strip	_hdmi_phy_8x60_powerup
.subsections_via_symbols
