	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mmhubbub2_config_mcif_buf
_mmhubbub2_config_mcif_buf:             ## @mmhubbub2_config_mcif_buf
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movq	%rsi, %r15
	callq	_TO_DCN20_MMHUBBUB
	movq	_MCIF_WB_BUFMGR_SW_CONTROL@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_MCIF_WB_BUFMGR_SW_LOCK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r15), %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_1_ADDR_Y@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	24(%r15), %rax
	movl	(%rax), %edi
	callq	_MCIF_ADDR
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_1_ADDR_Y_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	24(%r15), %rax
	movl	(%rax), %edi
	callq	_MCIF_ADDR_HIGH
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_1_ADDR_Y_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, %esi
	xorl	%edx, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_1_ADDR_C@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	16(%r15), %rax
	movl	(%rax), %edi
	callq	_MCIF_ADDR
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_1_ADDR_C_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	16(%r15), %rax
	movl	(%rax), %edi
	callq	_MCIF_ADDR_HIGH
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_1_ADDR_C_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, %esi
	xorl	%edx, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_2_ADDR_Y@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	24(%r15), %rax
	movl	4(%rax), %edi
	callq	_MCIF_ADDR
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_2_ADDR_Y_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	24(%r15), %rax
	movl	4(%rax), %edi
	callq	_MCIF_ADDR_HIGH
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_2_ADDR_Y_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, %esi
	xorl	%edx, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_2_ADDR_C@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	16(%r15), %rax
	movl	4(%rax), %edi
	callq	_MCIF_ADDR
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_2_ADDR_C_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	16(%r15), %rax
	movl	4(%rax), %edi
	callq	_MCIF_ADDR_HIGH
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_2_ADDR_C_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, %esi
	xorl	%edx, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_3_ADDR_Y@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	24(%r15), %rax
	movl	8(%rax), %edi
	callq	_MCIF_ADDR
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_3_ADDR_Y_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	24(%r15), %rax
	movl	8(%rax), %edi
	callq	_MCIF_ADDR_HIGH
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_3_ADDR_Y_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, %esi
	xorl	%edx, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_3_ADDR_C@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	16(%r15), %rax
	movl	8(%rax), %edi
	callq	_MCIF_ADDR
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_3_ADDR_C_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	16(%r15), %rax
	movl	8(%rax), %edi
	callq	_MCIF_ADDR_HIGH
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_3_ADDR_C_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, %esi
	xorl	%edx, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_4_ADDR_Y@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	24(%r15), %rax
	movl	12(%rax), %edi
	callq	_MCIF_ADDR
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_4_ADDR_Y_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	24(%r15), %rax
	movl	12(%rax), %edi
	callq	_MCIF_ADDR_HIGH
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_4_ADDR_Y_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, %esi
	xorl	%edx, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_4_ADDR_C@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	16(%r15), %rax
	movl	12(%rax), %edi
	callq	_MCIF_ADDR
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_4_ADDR_C_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	16(%r15), %rax
	movl	12(%rax), %edi
	callq	_MCIF_ADDR_HIGH
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_4_ADDR_C_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, %esi
	xorl	%edx, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_LUMA_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	4(%r15), %edx
	sarl	$8, %edx
	imull	%r14d, %edx
	movl	%edi, %esi
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_CHROMA_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	8(%r15), %edx
	sarl	$8, %edx
	imull	%r14d, %edx
	movl	%edi, %esi
	callq	_REG_UPDATE
	movl	(%r12), %edi
	movq	_MCIF_WB_BUF_ADDR_FENCE_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_REG_UPDATE
	movq	_MCIF_WB_BUF_PITCH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MCIF_WB_BUF_LUMA_PITCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r15), %edx
	movl	8(%r15), %r8d
	sarl	$8, %edx
	movq	_MCIF_WB_BUF_CHROMA_PITCH@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	sarl	$8, %r8d
	callq	_REG_UPDATE_2
	movq	_MCIF_WB_WARM_UP_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MCIF_WB_PITCH_SIZE_WARMUP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	12(%r15), %edx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_REG_UPDATE                     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MCIF_WB_BUFMGR_SW_CONTROL,4,2  ## @MCIF_WB_BUFMGR_SW_CONTROL
	.comm	_MCIF_WB_BUFMGR_SW_LOCK,4,2     ## @MCIF_WB_BUFMGR_SW_LOCK
	.comm	_MCIF_WB_BUF_1_ADDR_Y,4,2       ## @MCIF_WB_BUF_1_ADDR_Y
	.comm	_MCIF_WB_BUF_1_ADDR_Y_HIGH,4,2  ## @MCIF_WB_BUF_1_ADDR_Y_HIGH
	.comm	_MCIF_WB_BUF_1_ADDR_Y_OFFSET,4,2 ## @MCIF_WB_BUF_1_ADDR_Y_OFFSET
	.comm	_MCIF_WB_BUF_1_ADDR_C,4,2       ## @MCIF_WB_BUF_1_ADDR_C
	.comm	_MCIF_WB_BUF_1_ADDR_C_HIGH,4,2  ## @MCIF_WB_BUF_1_ADDR_C_HIGH
	.comm	_MCIF_WB_BUF_1_ADDR_C_OFFSET,4,2 ## @MCIF_WB_BUF_1_ADDR_C_OFFSET
	.comm	_MCIF_WB_BUF_2_ADDR_Y,4,2       ## @MCIF_WB_BUF_2_ADDR_Y
	.comm	_MCIF_WB_BUF_2_ADDR_Y_HIGH,4,2  ## @MCIF_WB_BUF_2_ADDR_Y_HIGH
	.comm	_MCIF_WB_BUF_2_ADDR_Y_OFFSET,4,2 ## @MCIF_WB_BUF_2_ADDR_Y_OFFSET
	.comm	_MCIF_WB_BUF_2_ADDR_C,4,2       ## @MCIF_WB_BUF_2_ADDR_C
	.comm	_MCIF_WB_BUF_2_ADDR_C_HIGH,4,2  ## @MCIF_WB_BUF_2_ADDR_C_HIGH
	.comm	_MCIF_WB_BUF_2_ADDR_C_OFFSET,4,2 ## @MCIF_WB_BUF_2_ADDR_C_OFFSET
	.comm	_MCIF_WB_BUF_3_ADDR_Y,4,2       ## @MCIF_WB_BUF_3_ADDR_Y
	.comm	_MCIF_WB_BUF_3_ADDR_Y_HIGH,4,2  ## @MCIF_WB_BUF_3_ADDR_Y_HIGH
	.comm	_MCIF_WB_BUF_3_ADDR_Y_OFFSET,4,2 ## @MCIF_WB_BUF_3_ADDR_Y_OFFSET
	.comm	_MCIF_WB_BUF_3_ADDR_C,4,2       ## @MCIF_WB_BUF_3_ADDR_C
	.comm	_MCIF_WB_BUF_3_ADDR_C_HIGH,4,2  ## @MCIF_WB_BUF_3_ADDR_C_HIGH
	.comm	_MCIF_WB_BUF_3_ADDR_C_OFFSET,4,2 ## @MCIF_WB_BUF_3_ADDR_C_OFFSET
	.comm	_MCIF_WB_BUF_4_ADDR_Y,4,2       ## @MCIF_WB_BUF_4_ADDR_Y
	.comm	_MCIF_WB_BUF_4_ADDR_Y_HIGH,4,2  ## @MCIF_WB_BUF_4_ADDR_Y_HIGH
	.comm	_MCIF_WB_BUF_4_ADDR_Y_OFFSET,4,2 ## @MCIF_WB_BUF_4_ADDR_Y_OFFSET
	.comm	_MCIF_WB_BUF_4_ADDR_C,4,2       ## @MCIF_WB_BUF_4_ADDR_C
	.comm	_MCIF_WB_BUF_4_ADDR_C_HIGH,4,2  ## @MCIF_WB_BUF_4_ADDR_C_HIGH
	.comm	_MCIF_WB_BUF_4_ADDR_C_OFFSET,4,2 ## @MCIF_WB_BUF_4_ADDR_C_OFFSET
	.comm	_MCIF_WB_BUF_LUMA_SIZE,4,2      ## @MCIF_WB_BUF_LUMA_SIZE
	.comm	_MCIF_WB_BUF_CHROMA_SIZE,4,2    ## @MCIF_WB_BUF_CHROMA_SIZE
	.comm	_MCIF_WB_BUF_ADDR_FENCE_EN,4,2  ## @MCIF_WB_BUF_ADDR_FENCE_EN
	.comm	_MCIF_WB_BUF_PITCH,4,2          ## @MCIF_WB_BUF_PITCH
	.comm	_MCIF_WB_BUF_LUMA_PITCH,4,2     ## @MCIF_WB_BUF_LUMA_PITCH
	.comm	_MCIF_WB_BUF_CHROMA_PITCH,4,2   ## @MCIF_WB_BUF_CHROMA_PITCH
	.comm	_MCIF_WB_WARM_UP_CNTL,4,2       ## @MCIF_WB_WARM_UP_CNTL
	.comm	_MCIF_WB_PITCH_SIZE_WARMUP,4,2  ## @MCIF_WB_PITCH_SIZE_WARMUP
	.no_dead_strip	_mmhubbub2_config_mcif_buf
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mmhubbub2_config_mcif_buf
_mmhubbub2_config_mcif_buf:             ; @mmhubbub2_config_mcif_buf
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x19, x1
	bl	_TO_DCN20_MMHUBBUB
Lloh0:
	adrp	x22, _MCIF_WB_BUFMGR_SW_CONTROL@GOTPAGE
Lloh1:
	ldr	x22, [x22, _MCIF_WB_BUFMGR_SW_CONTROL@GOTPAGEOFF]
	ldr	w0, [x22]
Lloh2:
	adrp	x8, _MCIF_WB_BUFMGR_SW_LOCK@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MCIF_WB_BUFMGR_SW_LOCK@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	ldr	w2, [x19]
	bl	_REG_UPDATE
Lloh5:
	adrp	x8, _MCIF_WB_BUF_1_ADDR_Y@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MCIF_WB_BUF_1_ADDR_Y@GOTPAGEOFF]
Lloh7:
	ldr	w21, [x8]
	ldr	x8, [x19, #24]
	ldr	w0, [x8]
	bl	_MCIF_ADDR
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh8:
	adrp	x8, _MCIF_WB_BUF_1_ADDR_Y_HIGH@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MCIF_WB_BUF_1_ADDR_Y_HIGH@GOTPAGEOFF]
Lloh10:
	ldr	w21, [x8]
	ldr	x8, [x19, #24]
	ldr	w0, [x8]
	bl	_MCIF_ADDR_HIGH
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh11:
	adrp	x8, _MCIF_WB_BUF_1_ADDR_Y_OFFSET@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MCIF_WB_BUF_1_ADDR_Y_OFFSET@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	mov	x1, x0
	mov	w2, #0
	bl	_REG_UPDATE
Lloh14:
	adrp	x8, _MCIF_WB_BUF_1_ADDR_C@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MCIF_WB_BUF_1_ADDR_C@GOTPAGEOFF]
Lloh16:
	ldr	w21, [x8]
	ldr	x8, [x19, #16]
	ldr	w0, [x8]
	bl	_MCIF_ADDR
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh17:
	adrp	x8, _MCIF_WB_BUF_1_ADDR_C_HIGH@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MCIF_WB_BUF_1_ADDR_C_HIGH@GOTPAGEOFF]
Lloh19:
	ldr	w21, [x8]
	ldr	x8, [x19, #16]
	ldr	w0, [x8]
	bl	_MCIF_ADDR_HIGH
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh20:
	adrp	x8, _MCIF_WB_BUF_1_ADDR_C_OFFSET@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MCIF_WB_BUF_1_ADDR_C_OFFSET@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	mov	x1, x0
	mov	w2, #0
	bl	_REG_UPDATE
Lloh23:
	adrp	x8, _MCIF_WB_BUF_2_ADDR_Y@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MCIF_WB_BUF_2_ADDR_Y@GOTPAGEOFF]
Lloh25:
	ldr	w21, [x8]
	ldr	x8, [x19, #24]
	ldr	w0, [x8, #4]
	bl	_MCIF_ADDR
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh26:
	adrp	x8, _MCIF_WB_BUF_2_ADDR_Y_HIGH@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MCIF_WB_BUF_2_ADDR_Y_HIGH@GOTPAGEOFF]
Lloh28:
	ldr	w21, [x8]
	ldr	x8, [x19, #24]
	ldr	w0, [x8, #4]
	bl	_MCIF_ADDR_HIGH
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh29:
	adrp	x8, _MCIF_WB_BUF_2_ADDR_Y_OFFSET@GOTPAGE
Lloh30:
	ldr	x8, [x8, _MCIF_WB_BUF_2_ADDR_Y_OFFSET@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	mov	x1, x0
	mov	w2, #0
	bl	_REG_UPDATE
Lloh32:
	adrp	x8, _MCIF_WB_BUF_2_ADDR_C@GOTPAGE
Lloh33:
	ldr	x8, [x8, _MCIF_WB_BUF_2_ADDR_C@GOTPAGEOFF]
Lloh34:
	ldr	w21, [x8]
	ldr	x8, [x19, #16]
	ldr	w0, [x8, #4]
	bl	_MCIF_ADDR
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh35:
	adrp	x8, _MCIF_WB_BUF_2_ADDR_C_HIGH@GOTPAGE
Lloh36:
	ldr	x8, [x8, _MCIF_WB_BUF_2_ADDR_C_HIGH@GOTPAGEOFF]
Lloh37:
	ldr	w21, [x8]
	ldr	x8, [x19, #16]
	ldr	w0, [x8, #4]
	bl	_MCIF_ADDR_HIGH
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh38:
	adrp	x8, _MCIF_WB_BUF_2_ADDR_C_OFFSET@GOTPAGE
Lloh39:
	ldr	x8, [x8, _MCIF_WB_BUF_2_ADDR_C_OFFSET@GOTPAGEOFF]
Lloh40:
	ldr	w0, [x8]
	mov	x1, x0
	mov	w2, #0
	bl	_REG_UPDATE
Lloh41:
	adrp	x8, _MCIF_WB_BUF_3_ADDR_Y@GOTPAGE
Lloh42:
	ldr	x8, [x8, _MCIF_WB_BUF_3_ADDR_Y@GOTPAGEOFF]
Lloh43:
	ldr	w21, [x8]
	ldr	x8, [x19, #24]
	ldr	w0, [x8, #8]
	bl	_MCIF_ADDR
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh44:
	adrp	x8, _MCIF_WB_BUF_3_ADDR_Y_HIGH@GOTPAGE
Lloh45:
	ldr	x8, [x8, _MCIF_WB_BUF_3_ADDR_Y_HIGH@GOTPAGEOFF]
Lloh46:
	ldr	w21, [x8]
	ldr	x8, [x19, #24]
	ldr	w0, [x8, #8]
	bl	_MCIF_ADDR_HIGH
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh47:
	adrp	x8, _MCIF_WB_BUF_3_ADDR_Y_OFFSET@GOTPAGE
Lloh48:
	ldr	x8, [x8, _MCIF_WB_BUF_3_ADDR_Y_OFFSET@GOTPAGEOFF]
Lloh49:
	ldr	w0, [x8]
	mov	x1, x0
	mov	w2, #0
	bl	_REG_UPDATE
Lloh50:
	adrp	x8, _MCIF_WB_BUF_3_ADDR_C@GOTPAGE
Lloh51:
	ldr	x8, [x8, _MCIF_WB_BUF_3_ADDR_C@GOTPAGEOFF]
Lloh52:
	ldr	w21, [x8]
	ldr	x8, [x19, #16]
	ldr	w0, [x8, #8]
	bl	_MCIF_ADDR
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh53:
	adrp	x8, _MCIF_WB_BUF_3_ADDR_C_HIGH@GOTPAGE
Lloh54:
	ldr	x8, [x8, _MCIF_WB_BUF_3_ADDR_C_HIGH@GOTPAGEOFF]
Lloh55:
	ldr	w21, [x8]
	ldr	x8, [x19, #16]
	ldr	w0, [x8, #8]
	bl	_MCIF_ADDR_HIGH
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh56:
	adrp	x8, _MCIF_WB_BUF_3_ADDR_C_OFFSET@GOTPAGE
Lloh57:
	ldr	x8, [x8, _MCIF_WB_BUF_3_ADDR_C_OFFSET@GOTPAGEOFF]
Lloh58:
	ldr	w0, [x8]
	mov	x1, x0
	mov	w2, #0
	bl	_REG_UPDATE
Lloh59:
	adrp	x8, _MCIF_WB_BUF_4_ADDR_Y@GOTPAGE
Lloh60:
	ldr	x8, [x8, _MCIF_WB_BUF_4_ADDR_Y@GOTPAGEOFF]
Lloh61:
	ldr	w21, [x8]
	ldr	x8, [x19, #24]
	ldr	w0, [x8, #12]
	bl	_MCIF_ADDR
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh62:
	adrp	x8, _MCIF_WB_BUF_4_ADDR_Y_HIGH@GOTPAGE
Lloh63:
	ldr	x8, [x8, _MCIF_WB_BUF_4_ADDR_Y_HIGH@GOTPAGEOFF]
Lloh64:
	ldr	w21, [x8]
	ldr	x8, [x19, #24]
	ldr	w0, [x8, #12]
	bl	_MCIF_ADDR_HIGH
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh65:
	adrp	x8, _MCIF_WB_BUF_4_ADDR_Y_OFFSET@GOTPAGE
Lloh66:
	ldr	x8, [x8, _MCIF_WB_BUF_4_ADDR_Y_OFFSET@GOTPAGEOFF]
Lloh67:
	ldr	w0, [x8]
	mov	x1, x0
	mov	w2, #0
	bl	_REG_UPDATE
Lloh68:
	adrp	x8, _MCIF_WB_BUF_4_ADDR_C@GOTPAGE
Lloh69:
	ldr	x8, [x8, _MCIF_WB_BUF_4_ADDR_C@GOTPAGEOFF]
Lloh70:
	ldr	w21, [x8]
	ldr	x8, [x19, #16]
	ldr	w0, [x8, #12]
	bl	_MCIF_ADDR
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh71:
	adrp	x8, _MCIF_WB_BUF_4_ADDR_C_HIGH@GOTPAGE
Lloh72:
	ldr	x8, [x8, _MCIF_WB_BUF_4_ADDR_C_HIGH@GOTPAGEOFF]
Lloh73:
	ldr	w21, [x8]
	ldr	x8, [x19, #16]
	ldr	w0, [x8, #12]
	bl	_MCIF_ADDR_HIGH
	mov	x2, x0
	mov	x0, x21
	mov	x1, x21
	bl	_REG_UPDATE
Lloh74:
	adrp	x8, _MCIF_WB_BUF_4_ADDR_C_OFFSET@GOTPAGE
Lloh75:
	ldr	x8, [x8, _MCIF_WB_BUF_4_ADDR_C_OFFSET@GOTPAGEOFF]
Lloh76:
	ldr	w0, [x8]
	mov	x1, x0
	mov	w2, #0
	bl	_REG_UPDATE
Lloh77:
	adrp	x8, _MCIF_WB_BUF_LUMA_SIZE@GOTPAGE
Lloh78:
	ldr	x8, [x8, _MCIF_WB_BUF_LUMA_SIZE@GOTPAGEOFF]
Lloh79:
	ldr	w0, [x8]
	ldr	w8, [x19, #4]
	asr	w8, w8, #8
	mul	w2, w8, w20
	mov	x1, x0
	bl	_REG_UPDATE
Lloh80:
	adrp	x8, _MCIF_WB_BUF_CHROMA_SIZE@GOTPAGE
Lloh81:
	ldr	x8, [x8, _MCIF_WB_BUF_CHROMA_SIZE@GOTPAGEOFF]
Lloh82:
	ldr	w0, [x8]
	ldr	w8, [x19, #8]
	asr	w8, w8, #8
	mul	w2, w8, w20
	mov	x1, x0
	bl	_REG_UPDATE
	ldr	w0, [x22]
Lloh83:
	adrp	x8, _MCIF_WB_BUF_ADDR_FENCE_EN@GOTPAGE
Lloh84:
	ldr	x8, [x8, _MCIF_WB_BUF_ADDR_FENCE_EN@GOTPAGEOFF]
Lloh85:
	ldr	w1, [x8]
	mov	w2, #1
	bl	_REG_UPDATE
Lloh86:
	adrp	x8, _MCIF_WB_BUF_PITCH@GOTPAGE
Lloh87:
	ldr	x8, [x8, _MCIF_WB_BUF_PITCH@GOTPAGEOFF]
Lloh88:
	ldr	w0, [x8]
Lloh89:
	adrp	x8, _MCIF_WB_BUF_LUMA_PITCH@GOTPAGE
Lloh90:
	ldr	x8, [x8, _MCIF_WB_BUF_LUMA_PITCH@GOTPAGEOFF]
Lloh91:
	ldr	w1, [x8]
	ldp	w8, w9, [x19, #4]
	asr	w2, w8, #8
Lloh92:
	adrp	x8, _MCIF_WB_BUF_CHROMA_PITCH@GOTPAGE
Lloh93:
	ldr	x8, [x8, _MCIF_WB_BUF_CHROMA_PITCH@GOTPAGEOFF]
Lloh94:
	ldr	w3, [x8]
	asr	w4, w9, #8
	bl	_REG_UPDATE_2
Lloh95:
	adrp	x8, _MCIF_WB_WARM_UP_CNTL@GOTPAGE
Lloh96:
	ldr	x8, [x8, _MCIF_WB_WARM_UP_CNTL@GOTPAGEOFF]
Lloh97:
	adrp	x9, _MCIF_WB_PITCH_SIZE_WARMUP@GOTPAGE
Lloh98:
	ldr	x9, [x9, _MCIF_WB_PITCH_SIZE_WARMUP@GOTPAGEOFF]
Lloh99:
	ldr	w0, [x8]
Lloh100:
	ldr	w1, [x9]
	ldr	w2, [x19, #12]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_REG_UPDATE
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh100
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh99
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MCIF_WB_BUFMGR_SW_CONTROL,4,2  ; @MCIF_WB_BUFMGR_SW_CONTROL
	.comm	_MCIF_WB_BUFMGR_SW_LOCK,4,2     ; @MCIF_WB_BUFMGR_SW_LOCK
	.comm	_MCIF_WB_BUF_1_ADDR_Y,4,2       ; @MCIF_WB_BUF_1_ADDR_Y
	.comm	_MCIF_WB_BUF_1_ADDR_Y_HIGH,4,2  ; @MCIF_WB_BUF_1_ADDR_Y_HIGH
	.comm	_MCIF_WB_BUF_1_ADDR_Y_OFFSET,4,2 ; @MCIF_WB_BUF_1_ADDR_Y_OFFSET
	.comm	_MCIF_WB_BUF_1_ADDR_C,4,2       ; @MCIF_WB_BUF_1_ADDR_C
	.comm	_MCIF_WB_BUF_1_ADDR_C_HIGH,4,2  ; @MCIF_WB_BUF_1_ADDR_C_HIGH
	.comm	_MCIF_WB_BUF_1_ADDR_C_OFFSET,4,2 ; @MCIF_WB_BUF_1_ADDR_C_OFFSET
	.comm	_MCIF_WB_BUF_2_ADDR_Y,4,2       ; @MCIF_WB_BUF_2_ADDR_Y
	.comm	_MCIF_WB_BUF_2_ADDR_Y_HIGH,4,2  ; @MCIF_WB_BUF_2_ADDR_Y_HIGH
	.comm	_MCIF_WB_BUF_2_ADDR_Y_OFFSET,4,2 ; @MCIF_WB_BUF_2_ADDR_Y_OFFSET
	.comm	_MCIF_WB_BUF_2_ADDR_C,4,2       ; @MCIF_WB_BUF_2_ADDR_C
	.comm	_MCIF_WB_BUF_2_ADDR_C_HIGH,4,2  ; @MCIF_WB_BUF_2_ADDR_C_HIGH
	.comm	_MCIF_WB_BUF_2_ADDR_C_OFFSET,4,2 ; @MCIF_WB_BUF_2_ADDR_C_OFFSET
	.comm	_MCIF_WB_BUF_3_ADDR_Y,4,2       ; @MCIF_WB_BUF_3_ADDR_Y
	.comm	_MCIF_WB_BUF_3_ADDR_Y_HIGH,4,2  ; @MCIF_WB_BUF_3_ADDR_Y_HIGH
	.comm	_MCIF_WB_BUF_3_ADDR_Y_OFFSET,4,2 ; @MCIF_WB_BUF_3_ADDR_Y_OFFSET
	.comm	_MCIF_WB_BUF_3_ADDR_C,4,2       ; @MCIF_WB_BUF_3_ADDR_C
	.comm	_MCIF_WB_BUF_3_ADDR_C_HIGH,4,2  ; @MCIF_WB_BUF_3_ADDR_C_HIGH
	.comm	_MCIF_WB_BUF_3_ADDR_C_OFFSET,4,2 ; @MCIF_WB_BUF_3_ADDR_C_OFFSET
	.comm	_MCIF_WB_BUF_4_ADDR_Y,4,2       ; @MCIF_WB_BUF_4_ADDR_Y
	.comm	_MCIF_WB_BUF_4_ADDR_Y_HIGH,4,2  ; @MCIF_WB_BUF_4_ADDR_Y_HIGH
	.comm	_MCIF_WB_BUF_4_ADDR_Y_OFFSET,4,2 ; @MCIF_WB_BUF_4_ADDR_Y_OFFSET
	.comm	_MCIF_WB_BUF_4_ADDR_C,4,2       ; @MCIF_WB_BUF_4_ADDR_C
	.comm	_MCIF_WB_BUF_4_ADDR_C_HIGH,4,2  ; @MCIF_WB_BUF_4_ADDR_C_HIGH
	.comm	_MCIF_WB_BUF_4_ADDR_C_OFFSET,4,2 ; @MCIF_WB_BUF_4_ADDR_C_OFFSET
	.comm	_MCIF_WB_BUF_LUMA_SIZE,4,2      ; @MCIF_WB_BUF_LUMA_SIZE
	.comm	_MCIF_WB_BUF_CHROMA_SIZE,4,2    ; @MCIF_WB_BUF_CHROMA_SIZE
	.comm	_MCIF_WB_BUF_ADDR_FENCE_EN,4,2  ; @MCIF_WB_BUF_ADDR_FENCE_EN
	.comm	_MCIF_WB_BUF_PITCH,4,2          ; @MCIF_WB_BUF_PITCH
	.comm	_MCIF_WB_BUF_LUMA_PITCH,4,2     ; @MCIF_WB_BUF_LUMA_PITCH
	.comm	_MCIF_WB_BUF_CHROMA_PITCH,4,2   ; @MCIF_WB_BUF_CHROMA_PITCH
	.comm	_MCIF_WB_WARM_UP_CNTL,4,2       ; @MCIF_WB_WARM_UP_CNTL
	.comm	_MCIF_WB_PITCH_SIZE_WARMUP,4,2  ; @MCIF_WB_PITCH_SIZE_WARMUP
	.no_dead_strip	_mmhubbub2_config_mcif_buf
.subsections_via_symbols
