	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdma_v3_0_ring_emit_ib
_sdma_v3_0_ring_emit_ib:                ## @sdma_v3_0_ring_emit_ib
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rdi, %r12
	movq	%rsi, %rdi
	callq	_AMDGPU_JOB_GET_VMID
	movl	%eax, %r15d
	movl	(%r12), %edi
	callq	_lower_32_bits
	movl	$2, %esi
	subl	%eax, %esi
	andl	$7, %esi
	movq	%r12, %rdi
	callq	_sdma_v3_0_ring_insert_nop
	movq	_SDMA_OP_INDIRECT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_SDMA_PKT_HEADER_OP
	movl	%eax, %ebx
	andl	$15, %r15d
	movl	%r15d, %edi
	callq	_SDMA_PKT_INDIRECT_HEADER_VMID
	orl	%eax, %ebx
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_amdgpu_ring_write
	movl	4(%r14), %edi
	callq	_lower_32_bits
	andl	$-32, %eax
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	4(%r14), %edi
	callq	_upper_32_bits
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	(%r14), %esi
	movq	%r12, %rdi
	callq	_amdgpu_ring_write
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r12, %rdi
	xorl	%esi, %esi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SDMA_OP_INDIRECT,4,2           ## @SDMA_OP_INDIRECT
	.no_dead_strip	_sdma_v3_0_ring_emit_ib
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdma_v3_0_ring_emit_ib
_sdma_v3_0_ring_emit_ib:                ; @sdma_v3_0_ring_emit_ib
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x19, x0
	mov	x0, x1
	bl	_AMDGPU_JOB_GET_VMID
	mov	x21, x0
	ldr	w0, [x19]
	bl	_lower_32_bits
	mov	w8, #2
	sub	w8, w8, w0
	and	w1, w8, #0x7
	mov	x0, x19
	bl	_sdma_v3_0_ring_insert_nop
Lloh0:
	adrp	x8, _SDMA_OP_INDIRECT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SDMA_OP_INDIRECT@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_SDMA_PKT_HEADER_OP
	mov	x22, x0
	and	w0, w21, #0xf
	bl	_SDMA_PKT_INDIRECT_HEADER_VMID
	orr	w1, w0, w22
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w0, [x20, #4]
	bl	_lower_32_bits
	and	w1, w0, #0xffffffe0
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w0, [x20, #4]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w1, [x20]
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SDMA_OP_INDIRECT,4,2           ; @SDMA_OP_INDIRECT
	.no_dead_strip	_sdma_v3_0_ring_emit_ib
.subsections_via_symbols
