	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v6_0_ring_emit_vm_flush
_gfx_v6_0_ring_emit_vm_flush:           ## @gfx_v6_0_ring_emit_vm_flush
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	(%rdi), %rax
	movq	(%rax), %r15
	movq	_AMDGPU_RING_TYPE_GFX@GOTPCREL(%rip), %rax
	movq	(%rax), %r12
	callq	_amdgpu_gmc_emit_flush_gpu_tlb
	movq	_PACKET3_WAIT_REG_MEM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$5, %esi
	callq	_PACKET3
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	xorl	%edi, %edi
	callq	_WAIT_REG_MEM_FUNCTION
	movl	%eax, %ebx
	xorl	%edi, %edi
	callq	_WAIT_REG_MEM_ENGINE
	orl	%eax, %ebx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_amdgpu_ring_write
	movq	_mmVM_INVALIDATE_REQUEST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_amdgpu_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r14, %rdi
	movl	$32, %esi
	callq	_amdgpu_ring_write
	cmpq	%r12, %r15
	jne	LBB0_1
## %bb.2:
	movq	_PACKET3_PFP_SYNC_ME@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	_PACKET3_SWITCH_BUFFER@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
LBB0_1:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_RING_TYPE_GFX,8,3       ## @AMDGPU_RING_TYPE_GFX
	.comm	_PACKET3_WAIT_REG_MEM,4,2       ## @PACKET3_WAIT_REG_MEM
	.comm	_mmVM_INVALIDATE_REQUEST,4,2    ## @mmVM_INVALIDATE_REQUEST
	.comm	_PACKET3_PFP_SYNC_ME,4,2        ## @PACKET3_PFP_SYNC_ME
	.comm	_PACKET3_SWITCH_BUFFER,4,2      ## @PACKET3_SWITCH_BUFFER
	.no_dead_strip	_gfx_v6_0_ring_emit_vm_flush
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v6_0_ring_emit_vm_flush
_gfx_v6_0_ring_emit_vm_flush:           ; @gfx_v6_0_ring_emit_vm_flush
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0]
	ldr	x21, [x8]
Lloh0:
	adrp	x8, _AMDGPU_RING_TYPE_GFX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_RING_TYPE_GFX@GOTPAGEOFF]
Lloh2:
	ldr	x22, [x8]
	bl	_amdgpu_gmc_emit_flush_gpu_tlb
Lloh3:
	adrp	x8, _PACKET3_WAIT_REG_MEM@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PACKET3_WAIT_REG_MEM@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	w1, #5
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	w0, #0
	bl	_WAIT_REG_MEM_FUNCTION
	mov	x20, x0
	mov	w0, #0
	bl	_WAIT_REG_MEM_ENGINE
	orr	w1, w0, w20
	mov	x0, x19
	bl	_amdgpu_ring_write
Lloh6:
	adrp	x8, _mmVM_INVALIDATE_REQUEST@GOTPAGE
Lloh7:
	ldr	x8, [x8, _mmVM_INVALIDATE_REQUEST@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #32
	bl	_amdgpu_ring_write
	cmp	x21, x22
	b.ne	LBB0_2
; %bb.1:
Lloh9:
	adrp	x8, _PACKET3_PFP_SYNC_ME@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PACKET3_PFP_SYNC_ME@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
Lloh12:
	adrp	x20, _PACKET3_SWITCH_BUFFER@GOTPAGE
Lloh13:
	ldr	x20, [x20, _PACKET3_SWITCH_BUFFER@GOTPAGEOFF]
	ldr	w0, [x20]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	ldr	w0, [x20]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_RING_TYPE_GFX,8,3       ; @AMDGPU_RING_TYPE_GFX
	.comm	_PACKET3_WAIT_REG_MEM,4,2       ; @PACKET3_WAIT_REG_MEM
	.comm	_mmVM_INVALIDATE_REQUEST,4,2    ; @mmVM_INVALIDATE_REQUEST
	.comm	_PACKET3_PFP_SYNC_ME,4,2        ; @PACKET3_PFP_SYNC_ME
	.comm	_PACKET3_SWITCH_BUFFER,4,2      ; @PACKET3_SWITCH_BUFFER
	.no_dead_strip	_gfx_v6_0_ring_emit_vm_flush
.subsections_via_symbols
