	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bxt_get_dimm_type
_bxt_get_dimm_type:                     ## @bxt_get_dimm_type
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%edi, %ebx
	callq	_bxt_get_dimm_size
	movq	_INTEL_DRAM_UNKNOWN@GOTPCREL(%rip), %r14
	testl	%eax, %eax
	je	LBB0_4
## %bb.1:
	movq	_BXT_DRAM_TYPE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%ebx, %eax
	addl	$-128, %eax
	cmpl	$4, %eax
	jae	LBB0_2
## %bb.3:
	cltq
	leaq	l_switch.table.bxt_get_dimm_type(%rip), %rcx
	movq	(%rcx,%rax,8), %r14
	jmp	LBB0_4
LBB0_2:
	movl	%ebx, %edi
	callq	_MISSING_CASE
LBB0_4:
	movl	(%r14), %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_DRAM_UNKNOWN,4,2         ## @INTEL_DRAM_UNKNOWN
	.comm	_BXT_DRAM_TYPE_MASK,4,2         ## @BXT_DRAM_TYPE_MASK
	.comm	_INTEL_DRAM_DDR3,4,2            ## @INTEL_DRAM_DDR3
	.comm	_INTEL_DRAM_LPDDR3,4,2          ## @INTEL_DRAM_LPDDR3
	.comm	_INTEL_DRAM_DDR4,4,2            ## @INTEL_DRAM_DDR4
	.comm	_INTEL_DRAM_LPDDR4,4,2          ## @INTEL_DRAM_LPDDR4
	.no_dead_strip	_bxt_get_dimm_type
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.bxt_get_dimm_type
l_switch.table.bxt_get_dimm_type:
	.quad	_INTEL_DRAM_LPDDR4
	.quad	_INTEL_DRAM_LPDDR3
	.quad	_INTEL_DRAM_DDR4
	.quad	_INTEL_DRAM_DDR3

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bxt_get_dimm_type
_bxt_get_dimm_type:                     ; @bxt_get_dimm_type
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_bxt_get_dimm_size
	cbz	w0, LBB0_4
; %bb.1:
Lloh0:
	adrp	x8, _BXT_DRAM_TYPE_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _BXT_DRAM_TYPE_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	and	w8, w8, w19
	sub	w8, w8, #128
	cmp	w8, #4
	b.hs	LBB0_3
; %bb.2:
Lloh3:
	adrp	x9, l_switch.table.bxt_get_dimm_type@PAGE
Lloh4:
	add	x9, x9, l_switch.table.bxt_get_dimm_type@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	b	LBB0_5
LBB0_3:
	mov	x0, x19
	bl	_MISSING_CASE
LBB0_4:
Lloh5:
	adrp	x8, _INTEL_DRAM_UNKNOWN@GOTPAGE
Lloh6:
	ldr	x8, [x8, _INTEL_DRAM_UNKNOWN@GOTPAGEOFF]
LBB0_5:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_DRAM_UNKNOWN,4,2         ; @INTEL_DRAM_UNKNOWN
	.comm	_BXT_DRAM_TYPE_MASK,4,2         ; @BXT_DRAM_TYPE_MASK
	.comm	_INTEL_DRAM_DDR3,4,2            ; @INTEL_DRAM_DDR3
	.comm	_INTEL_DRAM_LPDDR3,4,2          ; @INTEL_DRAM_LPDDR3
	.comm	_INTEL_DRAM_DDR4,4,2            ; @INTEL_DRAM_DDR4
	.comm	_INTEL_DRAM_LPDDR4,4,2          ; @INTEL_DRAM_LPDDR4
	.no_dead_strip	_bxt_get_dimm_type
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.bxt_get_dimm_type
l_switch.table.bxt_get_dimm_type:
	.quad	_INTEL_DRAM_LPDDR4
	.quad	_INTEL_DRAM_LPDDR3
	.quad	_INTEL_DRAM_DDR4
	.quad	_INTEL_DRAM_DDR3

.subsections_via_symbols
