	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_nv40_ram_new                   ## -- Begin function nv40_ram_new
	.p2align	4, 0x90
_nv40_ram_new:                          ## @nv40_ram_new
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r12
	movq	(%rdi), %r15
	movq	%r15, %rdi
	movl	$4632, %esi                     ## imm = 0x1218
	callq	_nvkm_rd32
	movl	%eax, %ebx
	movq	%r15, %rdi
	movl	$1049100, %esi                  ## imm = 0x10020C
	callq	_nvkm_rd32
	andl	$-16777216, %eax                ## imm = 0xFF000000
	shrl	$8, %ebx
	andl	$3, %ebx
	leaq	l_switch.table.nv40_ram_new(%rip), %rcx
	movq	(%rcx,%rbx,8), %rcx
	movl	(%rcx), %esi
	movq	%r12, %rdi
	movl	%eax, %edx
	movq	%r14, %rcx
	callq	_nv40_ram_new_
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	movl	$1049088, %esi                  ## imm = 0x100200
	callq	_nvkm_rd32
	andl	$3, %eax
	incl	%eax
	movq	(%r14), %rcx
	movl	%eax, (%rcx)
LBB0_2:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NVKM_RAM_TYPE_UNKNOWN,4,2      ## @NVKM_RAM_TYPE_UNKNOWN
	.comm	_NVKM_RAM_TYPE_SDRAM,4,2        ## @NVKM_RAM_TYPE_SDRAM
	.comm	_NVKM_RAM_TYPE_DDR1,4,2         ## @NVKM_RAM_TYPE_DDR1
	.comm	_NVKM_RAM_TYPE_GDDR3,4,2        ## @NVKM_RAM_TYPE_GDDR3
	.comm	_NVKM_RAM_TYPE_DDR2,4,2         ## @NVKM_RAM_TYPE_DDR2
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.nv40_ram_new
l_switch.table.nv40_ram_new:
	.quad	_NVKM_RAM_TYPE_SDRAM
	.quad	_NVKM_RAM_TYPE_DDR1
	.quad	_NVKM_RAM_TYPE_GDDR3
	.quad	_NVKM_RAM_TYPE_DDR2

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_nv40_ram_new                   ; -- Begin function nv40_ram_new
	.p2align	2
_nv40_ram_new:                          ; @nv40_ram_new
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x21, x0
	mov	w23, #512
	movk	w23, #16, lsl #16
	ldr	x20, [x0]
	mov	x0, x20
	mov	w1, #4632
	bl	_nvkm_rd32
	mov	x22, x0
	orr	w1, w23, #0xc
	mov	x0, x20
	bl	_nvkm_rd32
	and	w2, w0, #0xff000000
	ubfx	w8, w22, #8, #2
Lloh0:
	adrp	x9, l_switch.table.nv40_ram_new@PAGE
Lloh1:
	add	x9, x9, l_switch.table.nv40_ram_new@PAGEOFF
	ldr	x8, [x9, w8, uxtw #3]
	ldr	w1, [x8]
	mov	x0, x21
	mov	x3, x19
	bl	_nv40_ram_new_
	mov	x21, x0
	cbnz	w0, LBB0_2
; %bb.1:
	mov	x0, x20
	mov	w1, #512
	movk	w1, #16, lsl #16
	bl	_nvkm_rd32
	and	w8, w0, #0x3
	add	w8, w8, #1
	ldr	x9, [x19]
	str	w8, [x9]
LBB0_2:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_NVKM_RAM_TYPE_UNKNOWN,4,2      ; @NVKM_RAM_TYPE_UNKNOWN
	.comm	_NVKM_RAM_TYPE_SDRAM,4,2        ; @NVKM_RAM_TYPE_SDRAM
	.comm	_NVKM_RAM_TYPE_DDR1,4,2         ; @NVKM_RAM_TYPE_DDR1
	.comm	_NVKM_RAM_TYPE_GDDR3,4,2        ; @NVKM_RAM_TYPE_GDDR3
	.comm	_NVKM_RAM_TYPE_DDR2,4,2         ; @NVKM_RAM_TYPE_DDR2
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.nv40_ram_new
l_switch.table.nv40_ram_new:
	.quad	_NVKM_RAM_TYPE_SDRAM
	.quad	_NVKM_RAM_TYPE_DDR1
	.quad	_NVKM_RAM_TYPE_GDDR3
	.quad	_NVKM_RAM_TYPE_DDR2

.subsections_via_symbols
