	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cypress_set_mc_reg_address_table
_cypress_set_mc_reg_address_table:      ## @cypress_set_mc_reg_address_table
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	callq	_evergreen_get_pi
	movq	_MC_SEQ_RAS_TIMING_LP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	sarl	$2, %edx
	movq	8(%rax), %rcx
	movl	%edx, (%rcx)
	movq	_MC_SEQ_RAS_TIMING@GOTPCREL(%rip), %rdx
	movq	_MC_SEQ_CAS_TIMING_LP@GOTPCREL(%rip), %rsi
	movq	_MC_SEQ_CAS_TIMING@GOTPCREL(%rip), %rdi
	movd	(%rdx), %xmm0                   ## xmm0 = mem[0],zero,zero,zero
	pinsrd	$1, (%rsi), %xmm0
	pinsrd	$2, (%rdi), %xmm0
	movq	_MC_SEQ_MISC_TIMING_LP@GOTPCREL(%rip), %rdx
	pinsrd	$3, (%rdx), %xmm0
	psrad	$2, %xmm0
	movdqu	%xmm0, 4(%rcx)
	movq	_MC_SEQ_MISC_TIMING@GOTPCREL(%rip), %rdx
	movq	_MC_SEQ_MISC_TIMING2_LP@GOTPCREL(%rip), %rsi
	movq	_MC_SEQ_MISC_TIMING2@GOTPCREL(%rip), %rdi
	movq	_MC_SEQ_RD_CTL_D0_LP@GOTPCREL(%rip), %r8
	movd	(%rdx), %xmm0                   ## xmm0 = mem[0],zero,zero,zero
	pinsrd	$1, (%rsi), %xmm0
	pinsrd	$2, (%rdi), %xmm0
	pinsrd	$3, (%r8), %xmm0
	psrad	$2, %xmm0
	movdqu	%xmm0, 20(%rcx)
	movq	_MC_SEQ_RD_CTL_D0@GOTPCREL(%rip), %rdx
	movq	_MC_SEQ_RD_CTL_D1_LP@GOTPCREL(%rip), %rsi
	movq	_MC_SEQ_RD_CTL_D1@GOTPCREL(%rip), %rdi
	movq	_MC_SEQ_WR_CTL_D0_LP@GOTPCREL(%rip), %r8
	movd	(%rdx), %xmm0                   ## xmm0 = mem[0],zero,zero,zero
	pinsrd	$1, (%rsi), %xmm0
	pinsrd	$2, (%rdi), %xmm0
	pinsrd	$3, (%r8), %xmm0
	psrad	$2, %xmm0
	movdqu	%xmm0, 36(%rcx)
	movq	_MC_SEQ_WR_CTL_D0@GOTPCREL(%rip), %rdx
	movq	_MC_SEQ_WR_CTL_D1_LP@GOTPCREL(%rip), %rsi
	movq	_MC_SEQ_WR_CTL_D1@GOTPCREL(%rip), %rdi
	movd	(%rdx), %xmm0                   ## xmm0 = mem[0],zero,zero,zero
	pinsrd	$1, (%rsi), %xmm0
	pinsrd	$2, (%rdi), %xmm0
	movq	_MC_SEQ_PMG_CMD_EMRS_LP@GOTPCREL(%rip), %rdx
	pinsrd	$3, (%rdx), %xmm0
	psrad	$2, %xmm0
	movdqu	%xmm0, 52(%rcx)
	movq	_MC_PMG_CMD_EMRS@GOTPCREL(%rip), %rdx
	movq	_MC_SEQ_PMG_CMD_MRS_LP@GOTPCREL(%rip), %rsi
	movq	_MC_PMG_CMD_MRS@GOTPCREL(%rip), %rdi
	movq	_MC_SEQ_PMG_CMD_MRS1_LP@GOTPCREL(%rip), %r8
	movd	(%rdx), %xmm0                   ## xmm0 = mem[0],zero,zero,zero
	pinsrd	$1, (%rsi), %xmm0
	pinsrd	$2, (%rdi), %xmm0
	pinsrd	$3, (%r8), %xmm0
	psrad	$2, %xmm0
	movdqu	%xmm0, 68(%rcx)
	movq	_MC_PMG_CMD_MRS1@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	sarl	$2, %edx
	movl	%edx, 84(%rcx)
	movq	_MC_SEQ_MISC1@GOTPCREL(%rip), %rdx
	movq	_MC_SEQ_RESERVE_M@GOTPCREL(%rip), %rsi
	movd	(%rdx), %xmm0                   ## xmm0 = mem[0],zero,zero,zero
	pinsrd	$1, (%rsi), %xmm0
	psrad	$2, %xmm0
	pshufd	$80, %xmm0, %xmm0               ## xmm0 = xmm0[0,0,1,1]
	movdqu	%xmm0, 88(%rcx)
	movq	_MC_SEQ_MISC3@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	sarl	$2, %edx
	movl	%edx, 104(%rcx)
	movl	%edx, 108(%rcx)
	movq	$14, (%rax)
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MC_SEQ_RAS_TIMING_LP,4,2       ## @MC_SEQ_RAS_TIMING_LP
	.comm	_MC_SEQ_RAS_TIMING,4,2          ## @MC_SEQ_RAS_TIMING
	.comm	_MC_SEQ_CAS_TIMING_LP,4,2       ## @MC_SEQ_CAS_TIMING_LP
	.comm	_MC_SEQ_CAS_TIMING,4,2          ## @MC_SEQ_CAS_TIMING
	.comm	_MC_SEQ_MISC_TIMING_LP,4,2      ## @MC_SEQ_MISC_TIMING_LP
	.comm	_MC_SEQ_MISC_TIMING,4,2         ## @MC_SEQ_MISC_TIMING
	.comm	_MC_SEQ_MISC_TIMING2_LP,4,2     ## @MC_SEQ_MISC_TIMING2_LP
	.comm	_MC_SEQ_MISC_TIMING2,4,2        ## @MC_SEQ_MISC_TIMING2
	.comm	_MC_SEQ_RD_CTL_D0_LP,4,2        ## @MC_SEQ_RD_CTL_D0_LP
	.comm	_MC_SEQ_RD_CTL_D0,4,2           ## @MC_SEQ_RD_CTL_D0
	.comm	_MC_SEQ_RD_CTL_D1_LP,4,2        ## @MC_SEQ_RD_CTL_D1_LP
	.comm	_MC_SEQ_RD_CTL_D1,4,2           ## @MC_SEQ_RD_CTL_D1
	.comm	_MC_SEQ_WR_CTL_D0_LP,4,2        ## @MC_SEQ_WR_CTL_D0_LP
	.comm	_MC_SEQ_WR_CTL_D0,4,2           ## @MC_SEQ_WR_CTL_D0
	.comm	_MC_SEQ_WR_CTL_D1_LP,4,2        ## @MC_SEQ_WR_CTL_D1_LP
	.comm	_MC_SEQ_WR_CTL_D1,4,2           ## @MC_SEQ_WR_CTL_D1
	.comm	_MC_SEQ_PMG_CMD_EMRS_LP,4,2     ## @MC_SEQ_PMG_CMD_EMRS_LP
	.comm	_MC_PMG_CMD_EMRS,4,2            ## @MC_PMG_CMD_EMRS
	.comm	_MC_SEQ_PMG_CMD_MRS_LP,4,2      ## @MC_SEQ_PMG_CMD_MRS_LP
	.comm	_MC_PMG_CMD_MRS,4,2             ## @MC_PMG_CMD_MRS
	.comm	_MC_SEQ_PMG_CMD_MRS1_LP,4,2     ## @MC_SEQ_PMG_CMD_MRS1_LP
	.comm	_MC_PMG_CMD_MRS1,4,2            ## @MC_PMG_CMD_MRS1
	.comm	_MC_SEQ_MISC1,4,2               ## @MC_SEQ_MISC1
	.comm	_MC_SEQ_RESERVE_M,4,2           ## @MC_SEQ_RESERVE_M
	.comm	_MC_SEQ_MISC3,4,2               ## @MC_SEQ_MISC3
	.no_dead_strip	_cypress_set_mc_reg_address_table
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cypress_set_mc_reg_address_table
_cypress_set_mc_reg_address_table:      ; @cypress_set_mc_reg_address_table
	.cfi_startproc
; %bb.0:
	stp	x29, x30, [sp, #-16]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 16
	mov	x29, sp
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	bl	_evergreen_get_pi
Lloh0:
	adrp	x8, _MC_SEQ_RAS_TIMING_LP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MC_SEQ_RAS_TIMING_LP@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	asr	w9, w8, #2
	ldr	x8, [x0, #8]
	str	w9, [x8]
Lloh3:
	adrp	x9, _MC_SEQ_RAS_TIMING@GOTPAGE
Lloh4:
	ldr	x9, [x9, _MC_SEQ_RAS_TIMING@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
Lloh6:
	adrp	x10, _MC_SEQ_CAS_TIMING_LP@GOTPAGE
Lloh7:
	ldr	x10, [x10, _MC_SEQ_CAS_TIMING_LP@GOTPAGEOFF]
	asr	w9, w9, #2
Lloh8:
	ldr	w10, [x10]
	asr	w10, w10, #2
Lloh9:
	adrp	x11, _MC_SEQ_CAS_TIMING@GOTPAGE
Lloh10:
	ldr	x11, [x11, _MC_SEQ_CAS_TIMING@GOTPAGEOFF]
	stp	w9, w10, [x8, #4]
Lloh11:
	ldr	w9, [x11]
	asr	w9, w9, #2
Lloh12:
	adrp	x10, _MC_SEQ_MISC_TIMING_LP@GOTPAGE
Lloh13:
	ldr	x10, [x10, _MC_SEQ_MISC_TIMING_LP@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
	asr	w10, w10, #2
	stp	w9, w10, [x8, #12]
Lloh15:
	adrp	x9, _MC_SEQ_MISC_TIMING@GOTPAGE
Lloh16:
	ldr	x9, [x9, _MC_SEQ_MISC_TIMING@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	asr	w9, w9, #2
Lloh18:
	adrp	x10, _MC_SEQ_MISC_TIMING2_LP@GOTPAGE
Lloh19:
	ldr	x10, [x10, _MC_SEQ_MISC_TIMING2_LP@GOTPAGEOFF]
Lloh20:
	ldr	w10, [x10]
	asr	w10, w10, #2
	stp	w9, w10, [x8, #20]
Lloh21:
	adrp	x9, _MC_SEQ_MISC_TIMING2@GOTPAGE
Lloh22:
	ldr	x9, [x9, _MC_SEQ_MISC_TIMING2@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
Lloh24:
	adrp	x10, _MC_SEQ_RD_CTL_D0_LP@GOTPAGE
Lloh25:
	ldr	x10, [x10, _MC_SEQ_RD_CTL_D0_LP@GOTPAGEOFF]
	asr	w9, w9, #2
Lloh26:
	ldr	w10, [x10]
	asr	w10, w10, #2
Lloh27:
	adrp	x11, _MC_SEQ_RD_CTL_D0@GOTPAGE
Lloh28:
	ldr	x11, [x11, _MC_SEQ_RD_CTL_D0@GOTPAGEOFF]
	stp	w9, w10, [x8, #28]
Lloh29:
	ldr	w9, [x11]
	asr	w9, w9, #2
Lloh30:
	adrp	x10, _MC_SEQ_RD_CTL_D1_LP@GOTPAGE
Lloh31:
	ldr	x10, [x10, _MC_SEQ_RD_CTL_D1_LP@GOTPAGEOFF]
Lloh32:
	ldr	w10, [x10]
	asr	w10, w10, #2
	stp	w9, w10, [x8, #36]
Lloh33:
	adrp	x9, _MC_SEQ_RD_CTL_D1@GOTPAGE
Lloh34:
	ldr	x9, [x9, _MC_SEQ_RD_CTL_D1@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	asr	w9, w9, #2
Lloh36:
	adrp	x10, _MC_SEQ_WR_CTL_D0_LP@GOTPAGE
Lloh37:
	ldr	x10, [x10, _MC_SEQ_WR_CTL_D0_LP@GOTPAGEOFF]
Lloh38:
	ldr	w10, [x10]
	asr	w10, w10, #2
	stp	w9, w10, [x8, #44]
Lloh39:
	adrp	x9, _MC_SEQ_WR_CTL_D0@GOTPAGE
Lloh40:
	ldr	x9, [x9, _MC_SEQ_WR_CTL_D0@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
Lloh42:
	adrp	x10, _MC_SEQ_WR_CTL_D1_LP@GOTPAGE
Lloh43:
	ldr	x10, [x10, _MC_SEQ_WR_CTL_D1_LP@GOTPAGEOFF]
	asr	w9, w9, #2
Lloh44:
	ldr	w10, [x10]
	asr	w10, w10, #2
Lloh45:
	adrp	x11, _MC_SEQ_WR_CTL_D1@GOTPAGE
Lloh46:
	ldr	x11, [x11, _MC_SEQ_WR_CTL_D1@GOTPAGEOFF]
	stp	w9, w10, [x8, #52]
Lloh47:
	ldr	w9, [x11]
	asr	w9, w9, #2
Lloh48:
	adrp	x10, _MC_SEQ_PMG_CMD_EMRS_LP@GOTPAGE
Lloh49:
	ldr	x10, [x10, _MC_SEQ_PMG_CMD_EMRS_LP@GOTPAGEOFF]
Lloh50:
	ldr	w10, [x10]
	asr	w10, w10, #2
	stp	w9, w10, [x8, #60]
Lloh51:
	adrp	x9, _MC_PMG_CMD_EMRS@GOTPAGE
Lloh52:
	ldr	x9, [x9, _MC_PMG_CMD_EMRS@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	asr	w9, w9, #2
Lloh54:
	adrp	x10, _MC_SEQ_PMG_CMD_MRS_LP@GOTPAGE
Lloh55:
	ldr	x10, [x10, _MC_SEQ_PMG_CMD_MRS_LP@GOTPAGEOFF]
Lloh56:
	ldr	w10, [x10]
	asr	w10, w10, #2
	stp	w9, w10, [x8, #68]
Lloh57:
	adrp	x9, _MC_PMG_CMD_MRS@GOTPAGE
Lloh58:
	ldr	x9, [x9, _MC_PMG_CMD_MRS@GOTPAGEOFF]
Lloh59:
	ldr	w9, [x9]
Lloh60:
	adrp	x10, _MC_SEQ_PMG_CMD_MRS1_LP@GOTPAGE
Lloh61:
	ldr	x10, [x10, _MC_SEQ_PMG_CMD_MRS1_LP@GOTPAGEOFF]
	asr	w9, w9, #2
Lloh62:
	ldr	w10, [x10]
	asr	w10, w10, #2
Lloh63:
	adrp	x11, _MC_PMG_CMD_MRS1@GOTPAGE
Lloh64:
	ldr	x11, [x11, _MC_PMG_CMD_MRS1@GOTPAGEOFF]
	stp	w9, w10, [x8, #76]
Lloh65:
	ldr	w9, [x11]
	asr	w9, w9, #2
Lloh66:
	adrp	x10, _MC_SEQ_MISC1@GOTPAGE
Lloh67:
	ldr	x10, [x10, _MC_SEQ_MISC1@GOTPAGEOFF]
Lloh68:
	ldr	w10, [x10]
	asr	w10, w10, #2
	stp	w9, w10, [x8, #84]
Lloh69:
	adrp	x9, _MC_SEQ_RESERVE_M@GOTPAGE
Lloh70:
	ldr	x9, [x9, _MC_SEQ_RESERVE_M@GOTPAGEOFF]
Lloh71:
	ldr	w9, [x9]
	asr	w9, w9, #2
	stp	w10, w9, [x8, #92]
Lloh72:
	adrp	x10, _MC_SEQ_MISC3@GOTPAGE
Lloh73:
	ldr	x10, [x10, _MC_SEQ_MISC3@GOTPAGEOFF]
Lloh74:
	ldr	w10, [x10]
	asr	w10, w10, #2
	stp	w9, w10, [x8, #100]
	str	w10, [x8, #108]
	mov	w8, #14
	str	x8, [x0]
	ldp	x29, x30, [sp], #16             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MC_SEQ_RAS_TIMING_LP,4,2       ; @MC_SEQ_RAS_TIMING_LP
	.comm	_MC_SEQ_RAS_TIMING,4,2          ; @MC_SEQ_RAS_TIMING
	.comm	_MC_SEQ_CAS_TIMING_LP,4,2       ; @MC_SEQ_CAS_TIMING_LP
	.comm	_MC_SEQ_CAS_TIMING,4,2          ; @MC_SEQ_CAS_TIMING
	.comm	_MC_SEQ_MISC_TIMING_LP,4,2      ; @MC_SEQ_MISC_TIMING_LP
	.comm	_MC_SEQ_MISC_TIMING,4,2         ; @MC_SEQ_MISC_TIMING
	.comm	_MC_SEQ_MISC_TIMING2_LP,4,2     ; @MC_SEQ_MISC_TIMING2_LP
	.comm	_MC_SEQ_MISC_TIMING2,4,2        ; @MC_SEQ_MISC_TIMING2
	.comm	_MC_SEQ_RD_CTL_D0_LP,4,2        ; @MC_SEQ_RD_CTL_D0_LP
	.comm	_MC_SEQ_RD_CTL_D0,4,2           ; @MC_SEQ_RD_CTL_D0
	.comm	_MC_SEQ_RD_CTL_D1_LP,4,2        ; @MC_SEQ_RD_CTL_D1_LP
	.comm	_MC_SEQ_RD_CTL_D1,4,2           ; @MC_SEQ_RD_CTL_D1
	.comm	_MC_SEQ_WR_CTL_D0_LP,4,2        ; @MC_SEQ_WR_CTL_D0_LP
	.comm	_MC_SEQ_WR_CTL_D0,4,2           ; @MC_SEQ_WR_CTL_D0
	.comm	_MC_SEQ_WR_CTL_D1_LP,4,2        ; @MC_SEQ_WR_CTL_D1_LP
	.comm	_MC_SEQ_WR_CTL_D1,4,2           ; @MC_SEQ_WR_CTL_D1
	.comm	_MC_SEQ_PMG_CMD_EMRS_LP,4,2     ; @MC_SEQ_PMG_CMD_EMRS_LP
	.comm	_MC_PMG_CMD_EMRS,4,2            ; @MC_PMG_CMD_EMRS
	.comm	_MC_SEQ_PMG_CMD_MRS_LP,4,2      ; @MC_SEQ_PMG_CMD_MRS_LP
	.comm	_MC_PMG_CMD_MRS,4,2             ; @MC_PMG_CMD_MRS
	.comm	_MC_SEQ_PMG_CMD_MRS1_LP,4,2     ; @MC_SEQ_PMG_CMD_MRS1_LP
	.comm	_MC_PMG_CMD_MRS1,4,2            ; @MC_PMG_CMD_MRS1
	.comm	_MC_SEQ_MISC1,4,2               ; @MC_SEQ_MISC1
	.comm	_MC_SEQ_RESERVE_M,4,2           ; @MC_SEQ_RESERVE_M
	.comm	_MC_SEQ_MISC3,4,2               ; @MC_SEQ_MISC3
	.no_dead_strip	_cypress_set_mc_reg_address_table
.subsections_via_symbols
