	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_fdi_post_disable     ## -- Begin function intel_ddi_fdi_post_disable
	.p2align	4, 0x90
_intel_ddi_fdi_post_disable:            ## @intel_ddi_fdi_post_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	movl	(%rdi), %edi
	callq	_to_i915
	movq	_PIPE_A@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_FDI_RX_CTL
	movl	%eax, %edi
	callq	_I915_READ
	movq	_FDI_RX_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	(%r12), %edi
	callq	_FDI_RX_CTL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_disable_ddi_buf
	movq	%r15, %rdi
	callq	_intel_ddi_clk_disable
	movl	(%r12), %edi
	callq	_FDI_RX_MISC
	movl	%eax, %edi
	callq	_I915_READ
	movq	_FDI_RX_PWRDN_LANE1_MASK@GOTPCREL(%rip), %rcx
	movq	_FDI_RX_PWRDN_LANE0_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	$2, %edi
	callq	_FDI_RX_PWRDN_LANE1_VAL
	movl	%eax, %r14d
	movl	$2, %edi
	callq	_FDI_RX_PWRDN_LANE0_VAL
	orl	%eax, %r14d
	orl	%ebx, %r14d
	movl	(%r12), %edi
	callq	_FDI_RX_MISC
	movl	%eax, %edi
	movl	%r14d, %esi
	callq	_I915_WRITE
	movl	(%r12), %edi
	callq	_FDI_RX_CTL
	movl	%eax, %edi
	callq	_I915_READ
	movq	_FDI_PCDCLK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	(%r12), %edi
	callq	_FDI_RX_CTL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	(%r12), %edi
	callq	_FDI_RX_CTL
	movl	%eax, %edi
	callq	_I915_READ
	movq	_FDI_RX_PLL_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	(%r12), %edi
	callq	_FDI_RX_CTL
	movl	%eax, %edi
	movl	%ebx, %esi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_I915_WRITE                     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PIPE_A,4,2                     ## @PIPE_A
	.comm	_FDI_RX_ENABLE,4,2              ## @FDI_RX_ENABLE
	.comm	_FDI_RX_PWRDN_LANE1_MASK,4,2    ## @FDI_RX_PWRDN_LANE1_MASK
	.comm	_FDI_RX_PWRDN_LANE0_MASK,4,2    ## @FDI_RX_PWRDN_LANE0_MASK
	.comm	_FDI_PCDCLK,4,2                 ## @FDI_PCDCLK
	.comm	_FDI_RX_PLL_ENABLE,4,2          ## @FDI_RX_PLL_ENABLE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_fdi_post_disable     ; -- Begin function intel_ddi_fdi_post_disable
	.p2align	2
_intel_ddi_fdi_post_disable:            ; @intel_ddi_fdi_post_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
	ldr	w0, [x0]
	bl	_to_i915
Lloh0:
	adrp	x22, _PIPE_A@GOTPAGE
Lloh1:
	ldr	x22, [x22, _PIPE_A@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_FDI_RX_CTL
	bl	_I915_READ
Lloh2:
	adrp	x8, _FDI_RX_ENABLE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _FDI_RX_ENABLE@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	bic	w21, w0, w8
	ldr	w0, [x22]
	bl	_FDI_RX_CTL
	mov	x1, x21
	bl	_I915_WRITE
	mov	x0, x20
	mov	x1, x19
	bl	_intel_disable_ddi_buf
	mov	x0, x20
	bl	_intel_ddi_clk_disable
	ldr	w0, [x22]
	bl	_FDI_RX_MISC
	bl	_I915_READ
Lloh5:
	adrp	x8, _FDI_RX_PWRDN_LANE1_MASK@GOTPAGE
Lloh6:
	ldr	x8, [x8, _FDI_RX_PWRDN_LANE1_MASK@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
Lloh8:
	adrp	x9, _FDI_RX_PWRDN_LANE0_MASK@GOTPAGE
Lloh9:
	ldr	x9, [x9, _FDI_RX_PWRDN_LANE0_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w20, w0, w8
	mov	w0, #2
	bl	_FDI_RX_PWRDN_LANE1_VAL
	mov	x19, x0
	mov	w0, #2
	bl	_FDI_RX_PWRDN_LANE0_VAL
	orr	w8, w0, w19
	orr	w19, w8, w20
	ldr	w0, [x22]
	bl	_FDI_RX_MISC
	mov	x1, x19
	bl	_I915_WRITE
	ldr	w0, [x22]
	bl	_FDI_RX_CTL
	bl	_I915_READ
Lloh11:
	adrp	x8, _FDI_PCDCLK@GOTPAGE
Lloh12:
	ldr	x8, [x8, _FDI_PCDCLK@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	bic	w19, w0, w8
	ldr	w0, [x22]
	bl	_FDI_RX_CTL
	mov	x1, x19
	bl	_I915_WRITE
	ldr	w0, [x22]
	bl	_FDI_RX_CTL
	bl	_I915_READ
Lloh14:
	adrp	x8, _FDI_RX_PLL_ENABLE@GOTPAGE
Lloh15:
	ldr	x8, [x8, _FDI_RX_PLL_ENABLE@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	bic	w19, w0, w8
	ldr	w0, [x22]
	bl	_FDI_RX_CTL
	mov	x1, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_I915_WRITE
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_PIPE_A,4,2                     ; @PIPE_A
	.comm	_FDI_RX_ENABLE,4,2              ; @FDI_RX_ENABLE
	.comm	_FDI_RX_PWRDN_LANE1_MASK,4,2    ; @FDI_RX_PWRDN_LANE1_MASK
	.comm	_FDI_RX_PWRDN_LANE0_MASK,4,2    ; @FDI_RX_PWRDN_LANE0_MASK
	.comm	_FDI_PCDCLK,4,2                 ; @FDI_PCDCLK
	.comm	_FDI_RX_PLL_ENABLE,4,2          ; @FDI_RX_PLL_ENABLE
.subsections_via_symbols
