	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_cs_get_fence
_amdgpu_cs_get_fence:                   ## @amdgpu_cs_get_fence
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rbx
	movl	(%rsi), %edi
	movl	16(%rdx), %esi
	callq	_amdgpu_ctx_get
	testq	%rax, %rax
	je	LBB0_5
## %bb.1:
	movq	%rax, %r14
	movl	12(%rbx), %esi
	movl	4(%rbx), %ecx
	movl	8(%rbx), %edx
	leaq	-32(%rbp), %r8
	movq	%rax, %rdi
	callq	_amdgpu_ctx_get_entity
	testl	%eax, %eax
	je	LBB0_3
## %bb.2:
	movl	%eax, %r15d
	movq	%r14, %rdi
	callq	_amdgpu_ctx_put
	movl	%r15d, %edi
	callq	_ERR_PTR
	movq	%rax, %rbx
	jmp	LBB0_4
LBB0_5:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%edi, %edi
	subl	(%rax), %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ERR_PTR                        ## TAILCALL
LBB0_3:
	movq	-32(%rbp), %rsi
	movl	(%rbx), %edx
	movq	%r14, %rdi
	callq	_amdgpu_ctx_get_fence
	movq	%rax, %rbx
	movq	%r14, %rdi
	callq	_amdgpu_ctx_put
LBB0_4:
	movq	%rbx, %rax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_amdgpu_cs_get_fence
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_cs_get_fence
_amdgpu_cs_get_fence:                   ; @amdgpu_cs_get_fence
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	ldr	w0, [x1]
	ldr	w1, [x2, #16]
	bl	_amdgpu_ctx_get
	cbz	x0, LBB0_3
; %bb.1:
	mov	x19, x0
	ldp	w2, w1, [x20, #8]
	ldr	w3, [x20, #4]
	add	x4, sp, #8
	bl	_amdgpu_ctx_get_entity
	cbz	w0, LBB0_4
; %bb.2:
	mov	x21, x0
	mov	x0, x19
	bl	_amdgpu_ctx_put
	mov	x0, x21
	bl	_ERR_PTR
	mov	x20, x0
	b	LBB0_5
LBB0_3:
Lloh0:
	adrp	x8, _EINVAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	neg	w0, w8
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	b	_ERR_PTR
LBB0_4:
	ldr	x1, [sp, #8]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_amdgpu_ctx_get_fence
	mov	x20, x0
	mov	x0, x19
	bl	_amdgpu_ctx_put
LBB0_5:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_amdgpu_cs_get_fence
.subsections_via_symbols
