	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function navi10_get_profiling_clk_mask
_navi10_get_profiling_clk_mask:         ## @navi10_get_profiling_clk_mask
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rbx
	movq	$0, -40(%rbp)
	movq	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK@GOTPCREL(%rip), %rax
	cmpl	%esi, (%rax)
	jne	LBB0_3
## %bb.1:
	xorl	%eax, %eax
	testq	%rbx, %rbx
	je	LBB0_17
## %bb.2:
	movq	$0, (%rbx)
	jmp	LBB0_17
LBB0_3:
	movq	%rcx, %r12
	movq	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK@GOTPCREL(%rip), %rax
	cmpl	%esi, (%rax)
	jne	LBB0_6
## %bb.4:
	xorl	%eax, %eax
	testq	%r12, %r12
	je	LBB0_17
## %bb.5:
	movq	$0, (%r12)
	jmp	LBB0_17
LBB0_6:
	movq	_AMD_DPM_FORCED_LEVEL_PROFILE_PEAK@GOTPCREL(%rip), %rax
	cmpl	%esi, (%rax)
	jne	LBB0_16
## %bb.7:
	movq	%r8, %r14
	movq	%rdi, %r15
	testq	%rbx, %rbx
	je	LBB0_10
## %bb.8:
	movq	_SMU_SCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-40(%rbp), %rdx
	movq	%r15, %rdi
	callq	_smu_get_dpm_level_count
	testl	%eax, %eax
	jne	LBB0_17
## %bb.9:
	movq	-40(%rbp), %rax
	decq	%rax
	movq	%rax, (%rbx)
LBB0_10:
	testq	%r12, %r12
	je	LBB0_13
## %bb.11:
	movq	_SMU_MCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-40(%rbp), %rdx
	movq	%r15, %rdi
	callq	_smu_get_dpm_level_count
	testl	%eax, %eax
	jne	LBB0_17
## %bb.12:
	movq	-40(%rbp), %rax
	decq	%rax
	movq	%rax, (%r12)
LBB0_13:
	testq	%r14, %r14
	je	LBB0_16
## %bb.14:
	movq	_SMU_SOCCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-40(%rbp), %rdx
	movq	%r15, %rdi
	callq	_smu_get_dpm_level_count
	testl	%eax, %eax
	jne	LBB0_17
## %bb.15:
	movq	-40(%rbp), %rax
	decq	%rax
	movq	%rax, (%r14)
LBB0_16:
	xorl	%eax, %eax
LBB0_17:
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK,4,2 ## @AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK,4,2 ## @AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_PEAK,4,2 ## @AMD_DPM_FORCED_LEVEL_PROFILE_PEAK
	.comm	_SMU_SCLK,4,2                   ## @SMU_SCLK
	.comm	_SMU_MCLK,4,2                   ## @SMU_MCLK
	.comm	_SMU_SOCCLK,4,2                 ## @SMU_SOCCLK
	.no_dead_strip	_navi10_get_profiling_clk_mask
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function navi10_get_profiling_clk_mask
_navi10_get_profiling_clk_mask:         ; @navi10_get_profiling_clk_mask
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x22, x2
	str	xzr, [sp, #8]
Lloh0:
	adrp	x8, _AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w1
	b.ne	LBB0_3
; %bb.1:
	mov	w0, #0
	cbz	x22, LBB0_17
; %bb.2:
	str	xzr, [x22]
	b	LBB0_17
LBB0_3:
	mov	x21, x3
Lloh3:
	adrp	x8, _AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w8, w1
	b.ne	LBB0_6
; %bb.4:
	mov	w0, #0
	cbz	x21, LBB0_17
; %bb.5:
	str	xzr, [x21]
	b	LBB0_17
LBB0_6:
Lloh6:
	adrp	x8, _AMD_DPM_FORCED_LEVEL_PROFILE_PEAK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AMD_DPM_FORCED_LEVEL_PROFILE_PEAK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	w8, w1
	b.ne	LBB0_16
; %bb.7:
	mov	x19, x4
	mov	x20, x0
	cbz	x22, LBB0_10
; %bb.8:
Lloh9:
	adrp	x8, _SMU_SCLK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SMU_SCLK@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	add	x2, sp, #8
	mov	x0, x20
	bl	_smu_get_dpm_level_count
	cbnz	w0, LBB0_17
; %bb.9:
	ldr	x8, [sp, #8]
	sub	x8, x8, #1
	str	x8, [x22]
LBB0_10:
	cbz	x21, LBB0_13
; %bb.11:
Lloh12:
	adrp	x8, _SMU_MCLK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SMU_MCLK@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	add	x2, sp, #8
	mov	x0, x20
	bl	_smu_get_dpm_level_count
	cbnz	w0, LBB0_17
; %bb.12:
	ldr	x8, [sp, #8]
	sub	x8, x8, #1
	str	x8, [x21]
LBB0_13:
	cbz	x19, LBB0_16
; %bb.14:
Lloh15:
	adrp	x8, _SMU_SOCCLK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _SMU_SOCCLK@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	add	x2, sp, #8
	mov	x0, x20
	bl	_smu_get_dpm_level_count
	cbnz	w0, LBB0_17
; %bb.15:
	ldr	x8, [sp, #8]
	sub	x8, x8, #1
	str	x8, [x19]
	b	LBB0_17
LBB0_16:
	mov	w0, #0
LBB0_17:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK,4,2 ; @AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK,4,2 ; @AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_PEAK,4,2 ; @AMD_DPM_FORCED_LEVEL_PROFILE_PEAK
	.comm	_SMU_SCLK,4,2                   ; @SMU_SCLK
	.comm	_SMU_MCLK,4,2                   ; @SMU_MCLK
	.comm	_SMU_SOCCLK,4,2                 ; @SMU_SOCCLK
	.no_dead_strip	_navi10_get_profiling_clk_mask
.subsections_via_symbols
