	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mod_freesync_is_valid_range    ## -- Begin function mod_freesync_is_valid_range
	.p2align	4, 0x90
_mod_freesync_is_valid_range:           ## @mod_freesync_is_valid_range
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, %r14d
	movl	%r8d, %r15d
	movl	%ecx, %ebx
	movl	%edx, %r12d
	movq	%rsi, %rdi
	callq	_mod_freesync_calc_nominal_field_rate
	leaq	500000(%rax), %rdi
	movl	$1000000, %esi                  ## imm = 0xF4240
	callq	_div_u64
	movq	%rax, %rcx
	movslq	%ebx, %rax
	imulq	$1125899907, %rax, %rax         ## imm = 0x431BDE83
	movq	%rax, %rdx
	shrq	$63, %rdx
	sarq	$50, %rax
	addl	%edx, %eax
	movslq	%eax, %r8
	xorl	%eax, %eax
	cmpq	%r8, %rcx
	ja	LBB0_8
## %bb.1:
	movslq	%r12d, %rsi
	imulq	$1125899907, %rsi, %rsi         ## imm = 0x431BDE83
	movq	%rsi, %rdi
	shrq	$63, %rdi
	sarq	$50, %rsi
	addl	%edi, %esi
	movslq	%esi, %rdi
	cmpq	%rdi, %rcx
	jb	LBB0_8
## %bb.2:
	movslq	%r15d, %rdi
	imulq	$1125899907, %rdi, %rdx         ## imm = 0x431BDE83
	movq	%rdx, %rdi
	shrq	$63, %rdi
	sarq	$50, %rdx
	addl	%edi, %edx
	movslq	%r14d, %rdi
	imulq	$1125899907, %rdi, %rbx         ## imm = 0x431BDE83
	movq	%rbx, %rdi
	shrq	$63, %rdi
	sarq	$50, %rbx
	addl	%edi, %ebx
	cmpq	%r8, %rcx
	cmovbl	%ecx, %r8d
	cmpl	%edx, %ebx
	jl	LBB0_8
## %bb.3:
	cmpl	%esi, %edx
	jl	LBB0_8
## %bb.4:
	cmpl	%r8d, %edx
	jg	LBB0_8
## %bb.5:
	cmpl	%esi, %ebx
	jl	LBB0_8
## %bb.6:
	cmpl	%r8d, %ebx
	jg	LBB0_8
## %bb.7:
	subl	%edx, %ebx
	sete	%al
	cmpl	$10, %ebx
	setge	%cl
	orb	%al, %cl
	movzbl	%cl, %eax
LBB0_8:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mod_freesync_is_valid_range    ; -- Begin function mod_freesync_is_valid_range
	.p2align	2
_mod_freesync_is_valid_range:           ; @mod_freesync_is_valid_range
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x5
	mov	x20, x4
	mov	x21, x3
	mov	x22, x2
	mov	x0, x1
	bl	_mod_freesync_calc_nominal_field_rate
	add	x8, x0, #122, lsl #12           ; =499712
	add	x0, x8, #288
	mov	w1, #16960
	movk	w1, #15, lsl #16
	bl	_div_u64
	mov	w10, #56963
	movk	w10, #17179, lsl #16
	smull	x8, w22, w10
	lsr	x9, x8, #63
	asr	x8, x8, #50
	add	w8, w8, w9
	smull	x9, w21, w10
	lsr	x11, x9, #63
	asr	x9, x9, #50
	add	w9, w9, w11
	sxtw	x11, w9
	sxtw	x9, w8
	cmp	x0, x11
	ccmp	x0, x9, #0, ls
	b.lo	LBB0_2
; %bb.1:
	smull	x9, w20, w10
	lsr	x12, x9, #63
	asr	x9, x9, #50
	add	w9, w9, w12
	smull	x10, w19, w10
	lsr	x12, x10, #63
	asr	x10, x10, #50
	cmp	x0, x11
	csel	w11, w0, w11, lo
	add	w10, w10, w12
	cmp	w10, w9
	b.ge	LBB0_4
LBB0_2:
	mov	w0, #0
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_4:
	mov	w0, #0
	cmp	w9, w8
	b.lt	LBB0_3
; %bb.5:
	cmp	w9, w11
	b.gt	LBB0_3
; %bb.6:
	mov	w0, #0
	cmp	w10, w8
	b.lt	LBB0_3
; %bb.7:
	cmp	w10, w11
	b.gt	LBB0_3
; %bb.8:
	subs	w8, w10, w9
	ccmp	w8, #9, #0, ne
	cset	w0, gt
	b	LBB0_3
	.cfi_endproc
                                        ; -- End function
.subsections_via_symbols
