	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function vega20_set_default_registry_data
LCPI0_0:
	.long	255                             ## 0xff
	.long	255                             ## 0xff
	.long	4294967295                      ## 0xffffffff
	.long	1                               ## 0x1
LCPI0_1:
	.long	65535                           ## 0xffff
	.long	65535                           ## 0xffff
	.long	1                               ## 0x1
	.long	421072655                       ## 0x19190f0f
LCPI0_2:
	.long	421075225                       ## 0x19191919
	.long	3850                            ## 0xf0a
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_vega20_set_default_registry_data:      ## @vega20_set_default_registry_data
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movq	8(%rdi), %rbx
	movq	_PPVEGA20_VEGA20GFXCLKAVERAGEALPHA_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 388(%rbx)
	movq	_PPVEGA20_VEGA20SOCCLKAVERAGEALPHA_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 384(%rbx)
	movq	_PPVEGA20_VEGA20UCLKCLKAVERAGEALPHA_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 380(%rbx)
	movq	_PPVEGA20_VEGA20GFXACTIVITYAVERAGEALPHA_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 376(%rbx)
	movq	_PPVEGA20_VEGA20LOWESTUCLKRESERVEDFORULV_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 372(%rbx)
	movq	_PPVEGA20_VEGA20DISPLAYVOLTAGEMODE_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 368(%rbx)
	movq	_PPREGKEY_VEGA20QUADRATICEQUATION_DFLT@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 360(%rbx)
	movq	%rax, 352(%rbx)
	movq	%rax, 344(%rbx)
	movq	%rax, 336(%rbx)
	movq	%rax, 328(%rbx)
	movq	%rax, 320(%rbx)
	movq	%rax, 312(%rbx)
	movq	%rax, 304(%rbx)
	movq	%rax, 296(%rbx)
	movq	%rax, 288(%rbx)
	movq	%rax, 280(%rbx)
	movq	%rax, 272(%rbx)
	movl	$-536601600, 16(%rbx)           ## imm = 0xE0041C00
	movq	_PPSMC_MSG_GetSmuVersion@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_smum_send_msg_to_smc
	movq	%r14, %rdi
	callq	_smum_get_argument
	movl	%eax, (%r14)
	cmpl	$2629887, %eax                  ## imm = 0x2820FF
	jg	LBB0_2
## %bb.1:
	movq	_FEATURE_ECC_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 16(%rbx)
LBB0_2:
	movl	4(%r14), %eax
	movq	_PP_PCIE_DPM_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_4
## %bb.3:
	movq	_FEATURE_DPM_LINK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, 16(%rbx)
LBB0_4:
	movq	_PP_SCLK_DPM_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_6
## %bb.5:
	movq	_FEATURE_DPM_GFXCLK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, 16(%rbx)
LBB0_6:
	movq	_PP_SOCCLK_DPM_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_8
## %bb.7:
	movq	_FEATURE_DPM_SOCCLK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, 16(%rbx)
LBB0_8:
	movq	_PP_MCLK_DPM_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_10
## %bb.9:
	movq	_FEATURE_DPM_UCLK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, 16(%rbx)
LBB0_10:
	movq	_PP_DCEFCLK_DPM_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_12
## %bb.11:
	movq	_FEATURE_DPM_DCEFCLK_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, 16(%rbx)
LBB0_12:
	movq	_PP_ULV_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_14
## %bb.13:
	movq	_FEATURE_ULV_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, 16(%rbx)
LBB0_14:
	movq	_PP_SCLK_DEEP_SLEEP_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_16
## %bb.15:
	movq	_FEATURE_DS_GFXCLK_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 16(%rbx)
LBB0_16:
	movq	$0, 264(%rbx)
	movl	$1, 20(%rbx)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 248(%rbx)
	movabsq	$322122547201, %rax             ## imm = 0x4B00000001
	movq	%rax, 24(%rbx)
	movups	%xmm0, 232(%rbx)
	movaps	LCPI0_0(%rip), %xmm1            ## xmm1 = [255,255,4294967295,1]
	movups	%xmm1, 44(%rbx)
	movups	%xmm0, 168(%rbx)
	movups	%xmm0, 136(%rbx)
	movups	%xmm0, 152(%rbx)
	movaps	LCPI0_1(%rip), %xmm1            ## xmm1 = [65535,65535,1,421072655]
	movups	%xmm1, 60(%rbx)
	movups	%xmm0, 120(%rbx)
	movaps	LCPI0_2(%rip), %xmm1            ## xmm1 = [421075225,3850,1,1]
	movups	%xmm1, 76(%rbx)
	movl	$100, 92(%rbx)
	movups	%xmm0, 104(%rbx)
	movabsq	$4294967346, %rax               ## imm = 0x100000032
	movq	%rax, 96(%rbx)
	movl	$0, (%rbx)
	movq	$0, 8(%rbx)
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PPVEGA20_VEGA20GFXCLKAVERAGEALPHA_DFLT,4,2 ## @PPVEGA20_VEGA20GFXCLKAVERAGEALPHA_DFLT
	.comm	_PPVEGA20_VEGA20SOCCLKAVERAGEALPHA_DFLT,4,2 ## @PPVEGA20_VEGA20SOCCLKAVERAGEALPHA_DFLT
	.comm	_PPVEGA20_VEGA20UCLKCLKAVERAGEALPHA_DFLT,4,2 ## @PPVEGA20_VEGA20UCLKCLKAVERAGEALPHA_DFLT
	.comm	_PPVEGA20_VEGA20GFXACTIVITYAVERAGEALPHA_DFLT,4,2 ## @PPVEGA20_VEGA20GFXACTIVITYAVERAGEALPHA_DFLT
	.comm	_PPVEGA20_VEGA20LOWESTUCLKRESERVEDFORULV_DFLT,4,2 ## @PPVEGA20_VEGA20LOWESTUCLKRESERVEDFORULV_DFLT
	.comm	_PPVEGA20_VEGA20DISPLAYVOLTAGEMODE_DFLT,4,2 ## @PPVEGA20_VEGA20DISPLAYVOLTAGEMODE_DFLT
	.comm	_PPREGKEY_VEGA20QUADRATICEQUATION_DFLT,8,3 ## @PPREGKEY_VEGA20QUADRATICEQUATION_DFLT
	.comm	_PPSMC_MSG_GetSmuVersion,4,2    ## @PPSMC_MSG_GetSmuVersion
	.comm	_FEATURE_ECC_MASK,4,2           ## @FEATURE_ECC_MASK
	.comm	_PP_PCIE_DPM_MASK,4,2           ## @PP_PCIE_DPM_MASK
	.comm	_FEATURE_DPM_LINK_MASK,4,2      ## @FEATURE_DPM_LINK_MASK
	.comm	_PP_SCLK_DPM_MASK,4,2           ## @PP_SCLK_DPM_MASK
	.comm	_FEATURE_DPM_GFXCLK_MASK,4,2    ## @FEATURE_DPM_GFXCLK_MASK
	.comm	_PP_SOCCLK_DPM_MASK,4,2         ## @PP_SOCCLK_DPM_MASK
	.comm	_FEATURE_DPM_SOCCLK_MASK,4,2    ## @FEATURE_DPM_SOCCLK_MASK
	.comm	_PP_MCLK_DPM_MASK,4,2           ## @PP_MCLK_DPM_MASK
	.comm	_FEATURE_DPM_UCLK_MASK,4,2      ## @FEATURE_DPM_UCLK_MASK
	.comm	_PP_DCEFCLK_DPM_MASK,4,2        ## @PP_DCEFCLK_DPM_MASK
	.comm	_FEATURE_DPM_DCEFCLK_MASK,4,2   ## @FEATURE_DPM_DCEFCLK_MASK
	.comm	_PP_ULV_MASK,4,2                ## @PP_ULV_MASK
	.comm	_FEATURE_ULV_MASK,4,2           ## @FEATURE_ULV_MASK
	.comm	_PP_SCLK_DEEP_SLEEP_MASK,4,2    ## @PP_SCLK_DEEP_SLEEP_MASK
	.comm	_FEATURE_DS_GFXCLK_MASK,4,2     ## @FEATURE_DS_GFXCLK_MASK
	.no_dead_strip	_vega20_set_default_registry_data
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ; -- Begin function vega20_set_default_registry_data
lCPI0_0:
	.long	255                             ; 0xff
	.long	255                             ; 0xff
	.long	4294967295                      ; 0xffffffff
	.long	1                               ; 0x1
lCPI0_1:
	.long	65535                           ; 0xffff
	.long	65535                           ; 0xffff
	.long	1                               ; 0x1
	.long	421072655                       ; 0x19190f0f
lCPI0_2:
	.long	421075225                       ; 0x19191919
	.long	3850                            ; 0xf0a
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3
lCPI0_3:
	.long	50                              ; 0x32
	.long	1                               ; 0x1
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_vega20_set_default_registry_data:      ; @vega20_set_default_registry_data
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x20, [x0, #8]
Lloh0:
	adrp	x8, _PPVEGA20_VEGA20GFXCLKAVERAGEALPHA_DFLT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PPVEGA20_VEGA20GFXCLKAVERAGEALPHA_DFLT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [x20, #388]
Lloh3:
	adrp	x8, _PPVEGA20_VEGA20SOCCLKAVERAGEALPHA_DFLT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PPVEGA20_VEGA20SOCCLKAVERAGEALPHA_DFLT@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	str	w8, [x20, #384]
Lloh6:
	adrp	x8, _PPVEGA20_VEGA20UCLKCLKAVERAGEALPHA_DFLT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PPVEGA20_VEGA20UCLKCLKAVERAGEALPHA_DFLT@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	str	w8, [x20, #380]
Lloh9:
	adrp	x8, _PPVEGA20_VEGA20GFXACTIVITYAVERAGEALPHA_DFLT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PPVEGA20_VEGA20GFXACTIVITYAVERAGEALPHA_DFLT@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	str	w8, [x20, #376]
Lloh12:
	adrp	x8, _PPVEGA20_VEGA20LOWESTUCLKRESERVEDFORULV_DFLT@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PPVEGA20_VEGA20LOWESTUCLKRESERVEDFORULV_DFLT@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	str	w8, [x20, #372]
Lloh15:
	adrp	x8, _PPVEGA20_VEGA20DISPLAYVOLTAGEMODE_DFLT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PPVEGA20_VEGA20DISPLAYVOLTAGEMODE_DFLT@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	str	w8, [x20, #368]
Lloh18:
	adrp	x8, _PPREGKEY_VEGA20QUADRATICEQUATION_DFLT@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PPREGKEY_VEGA20QUADRATICEQUATION_DFLT@GOTPAGEOFF]
Lloh20:
	ldr	x8, [x8]
	stp	x8, x8, [x20, #352]
	stp	x8, x8, [x20, #336]
	stp	x8, x8, [x20, #320]
	stp	x8, x8, [x20, #304]
	stp	x8, x8, [x20, #288]
	stp	x8, x8, [x20, #272]
	mov	w8, #7168
	movk	w8, #57348, lsl #16
	str	w8, [x20, #16]
Lloh21:
	adrp	x8, _PPSMC_MSG_GetSmuVersion@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PPSMC_MSG_GetSmuVersion@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	bl	_smum_send_msg_to_smc
	mov	x0, x19
	bl	_smum_get_argument
	str	w0, [x19]
	mov	w8, #8447
	movk	w8, #40, lsl #16
	cmp	w0, w8
	b.gt	LBB0_2
; %bb.1:
Lloh24:
	adrp	x8, _FEATURE_ECC_MASK@GOTPAGE
Lloh25:
	ldr	x8, [x8, _FEATURE_ECC_MASK@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	ldr	w9, [x20, #16]
	orr	w8, w9, w8
	str	w8, [x20, #16]
LBB0_2:
	ldr	w8, [x19, #4]
Lloh27:
	adrp	x9, _PP_PCIE_DPM_MASK@GOTPAGE
Lloh28:
	ldr	x9, [x9, _PP_PCIE_DPM_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_4
; %bb.3:
Lloh30:
	adrp	x9, _FEATURE_DPM_LINK_MASK@GOTPAGE
Lloh31:
	ldr	x9, [x9, _FEATURE_DPM_LINK_MASK@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	ldr	w10, [x20, #16]
	orr	w9, w10, w9
	str	w9, [x20, #16]
LBB0_4:
Lloh33:
	adrp	x9, _PP_SCLK_DPM_MASK@GOTPAGE
Lloh34:
	ldr	x9, [x9, _PP_SCLK_DPM_MASK@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_6
; %bb.5:
Lloh36:
	adrp	x9, _FEATURE_DPM_GFXCLK_MASK@GOTPAGE
Lloh37:
	ldr	x9, [x9, _FEATURE_DPM_GFXCLK_MASK@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	ldr	w10, [x20, #16]
	orr	w9, w10, w9
	str	w9, [x20, #16]
LBB0_6:
Lloh39:
	adrp	x9, _PP_SOCCLK_DPM_MASK@GOTPAGE
Lloh40:
	ldr	x9, [x9, _PP_SOCCLK_DPM_MASK@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_8
; %bb.7:
Lloh42:
	adrp	x9, _FEATURE_DPM_SOCCLK_MASK@GOTPAGE
Lloh43:
	ldr	x9, [x9, _FEATURE_DPM_SOCCLK_MASK@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	ldr	w10, [x20, #16]
	orr	w9, w10, w9
	str	w9, [x20, #16]
LBB0_8:
Lloh45:
	adrp	x9, _PP_MCLK_DPM_MASK@GOTPAGE
Lloh46:
	ldr	x9, [x9, _PP_MCLK_DPM_MASK@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_10
; %bb.9:
Lloh48:
	adrp	x9, _FEATURE_DPM_UCLK_MASK@GOTPAGE
Lloh49:
	ldr	x9, [x9, _FEATURE_DPM_UCLK_MASK@GOTPAGEOFF]
Lloh50:
	ldr	w9, [x9]
	ldr	w10, [x20, #16]
	orr	w9, w10, w9
	str	w9, [x20, #16]
LBB0_10:
Lloh51:
	adrp	x9, _PP_DCEFCLK_DPM_MASK@GOTPAGE
Lloh52:
	ldr	x9, [x9, _PP_DCEFCLK_DPM_MASK@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_12
; %bb.11:
Lloh54:
	adrp	x9, _FEATURE_DPM_DCEFCLK_MASK@GOTPAGE
Lloh55:
	ldr	x9, [x9, _FEATURE_DPM_DCEFCLK_MASK@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
	ldr	w10, [x20, #16]
	orr	w9, w10, w9
	str	w9, [x20, #16]
LBB0_12:
Lloh57:
	adrp	x9, _PP_ULV_MASK@GOTPAGE
Lloh58:
	ldr	x9, [x9, _PP_ULV_MASK@GOTPAGEOFF]
Lloh59:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_14
; %bb.13:
Lloh60:
	adrp	x9, _FEATURE_ULV_MASK@GOTPAGE
Lloh61:
	ldr	x9, [x9, _FEATURE_ULV_MASK@GOTPAGEOFF]
Lloh62:
	ldr	w9, [x9]
	ldr	w10, [x20, #16]
	orr	w9, w10, w9
	str	w9, [x20, #16]
LBB0_14:
Lloh63:
	adrp	x9, _PP_SCLK_DEEP_SLEEP_MASK@GOTPAGE
Lloh64:
	ldr	x9, [x9, _PP_SCLK_DEEP_SLEEP_MASK@GOTPAGEOFF]
Lloh65:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_16
; %bb.15:
Lloh66:
	adrp	x8, _FEATURE_DS_GFXCLK_MASK@GOTPAGE
Lloh67:
	ldr	x8, [x8, _FEATURE_DS_GFXCLK_MASK@GOTPAGEOFF]
Lloh68:
	ldr	w8, [x8]
	ldr	w9, [x20, #16]
	orr	w8, w9, w8
	str	w8, [x20, #16]
LBB0_16:
	str	xzr, [x20, #248]
	movi.2d	v0, #0000000000000000
	str	q0, [x20, #256]
	movi.2s	v1, #1
	stur	d1, [x20, #20]
	mov	w8, #75
	str	w8, [x20, #28]
	stur	q0, [x20, #232]
Lloh69:
	adrp	x8, lCPI0_0@PAGE
Lloh70:
	ldr	q1, [x8, lCPI0_0@PAGEOFF]
	stur	q1, [x20, #44]
	stur	q0, [x20, #168]
	stur	q0, [x20, #136]
	stur	q0, [x20, #152]
Lloh71:
	adrp	x8, lCPI0_1@PAGE
Lloh72:
	ldr	q1, [x8, lCPI0_1@PAGEOFF]
	stur	q1, [x20, #60]
	stur	q0, [x20, #120]
Lloh73:
	adrp	x8, lCPI0_2@PAGE
Lloh74:
	ldr	q1, [x8, lCPI0_2@PAGEOFF]
	stur	q1, [x20, #76]
	mov	w8, #100
	str	w8, [x20, #92]
	stur	q0, [x20, #104]
Lloh75:
	adrp	x8, lCPI0_3@PAGE
Lloh76:
	ldr	d0, [x8, lCPI0_3@PAGEOFF]
	str	d0, [x20, #96]
	str	wzr, [x20]
	str	xzr, [x20, #8]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdr	Lloh75, Lloh76
	.loh AdrpLdr	Lloh73, Lloh74
	.loh AdrpAdrp	Lloh71, Lloh73
	.loh AdrpLdr	Lloh71, Lloh72
	.loh AdrpAdrp	Lloh69, Lloh71
	.loh AdrpLdr	Lloh69, Lloh70
	.cfi_endproc
                                        ; -- End function
	.comm	_PPVEGA20_VEGA20GFXCLKAVERAGEALPHA_DFLT,4,2 ; @PPVEGA20_VEGA20GFXCLKAVERAGEALPHA_DFLT
	.comm	_PPVEGA20_VEGA20SOCCLKAVERAGEALPHA_DFLT,4,2 ; @PPVEGA20_VEGA20SOCCLKAVERAGEALPHA_DFLT
	.comm	_PPVEGA20_VEGA20UCLKCLKAVERAGEALPHA_DFLT,4,2 ; @PPVEGA20_VEGA20UCLKCLKAVERAGEALPHA_DFLT
	.comm	_PPVEGA20_VEGA20GFXACTIVITYAVERAGEALPHA_DFLT,4,2 ; @PPVEGA20_VEGA20GFXACTIVITYAVERAGEALPHA_DFLT
	.comm	_PPVEGA20_VEGA20LOWESTUCLKRESERVEDFORULV_DFLT,4,2 ; @PPVEGA20_VEGA20LOWESTUCLKRESERVEDFORULV_DFLT
	.comm	_PPVEGA20_VEGA20DISPLAYVOLTAGEMODE_DFLT,4,2 ; @PPVEGA20_VEGA20DISPLAYVOLTAGEMODE_DFLT
	.comm	_PPREGKEY_VEGA20QUADRATICEQUATION_DFLT,8,3 ; @PPREGKEY_VEGA20QUADRATICEQUATION_DFLT
	.comm	_PPSMC_MSG_GetSmuVersion,4,2    ; @PPSMC_MSG_GetSmuVersion
	.comm	_FEATURE_ECC_MASK,4,2           ; @FEATURE_ECC_MASK
	.comm	_PP_PCIE_DPM_MASK,4,2           ; @PP_PCIE_DPM_MASK
	.comm	_FEATURE_DPM_LINK_MASK,4,2      ; @FEATURE_DPM_LINK_MASK
	.comm	_PP_SCLK_DPM_MASK,4,2           ; @PP_SCLK_DPM_MASK
	.comm	_FEATURE_DPM_GFXCLK_MASK,4,2    ; @FEATURE_DPM_GFXCLK_MASK
	.comm	_PP_SOCCLK_DPM_MASK,4,2         ; @PP_SOCCLK_DPM_MASK
	.comm	_FEATURE_DPM_SOCCLK_MASK,4,2    ; @FEATURE_DPM_SOCCLK_MASK
	.comm	_PP_MCLK_DPM_MASK,4,2           ; @PP_MCLK_DPM_MASK
	.comm	_FEATURE_DPM_UCLK_MASK,4,2      ; @FEATURE_DPM_UCLK_MASK
	.comm	_PP_DCEFCLK_DPM_MASK,4,2        ; @PP_DCEFCLK_DPM_MASK
	.comm	_FEATURE_DPM_DCEFCLK_MASK,4,2   ; @FEATURE_DPM_DCEFCLK_MASK
	.comm	_PP_ULV_MASK,4,2                ; @PP_ULV_MASK
	.comm	_FEATURE_ULV_MASK,4,2           ; @FEATURE_ULV_MASK
	.comm	_PP_SCLK_DEEP_SLEEP_MASK,4,2    ; @PP_SCLK_DEEP_SLEEP_MASK
	.comm	_FEATURE_DS_GFXCLK_MASK,4,2     ; @FEATURE_DS_GFXCLK_MASK
	.no_dead_strip	_vega20_set_default_registry_data
.subsections_via_symbols
