	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function uvd_v5_0_sw_init
_uvd_v5_0_sw_init:                      ## @uvd_v5_0_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_AMDGPU_IRQ_CLIENTID_LEGACY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	(%rdi), %rcx
	callq	_amdgpu_irq_add_id
	testl	%eax, %eax
	jne	LBB0_4
## %bb.1:
	movq	%rbx, %rdi
	callq	_amdgpu_uvd_sw_init
	testl	%eax, %eax
	jne	LBB0_4
## %bb.2:
	movq	(%rbx), %r14
	movl	4(%r14), %edi
	addq	$4, %r14
	leaq	L_.str(%rip), %rsi
	callq	_sprintf
	movq	(%rbx), %rcx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$512, %edx                      ## imm = 0x200
	xorl	%r8d, %r8d
	callq	_amdgpu_ring_init
	testl	%eax, %eax
	jne	LBB0_4
## %bb.3:
	movq	%rbx, %rdi
	callq	_amdgpu_uvd_resume
	testl	%eax, %eax
	je	LBB0_5
LBB0_4:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_5:
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_amdgpu_uvd_entity_init         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ## @AMDGPU_IRQ_CLIENTID_LEGACY
	.comm	_VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE,4,2 ## @VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"uvd"

	.no_dead_strip	_uvd_v5_0_sw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function uvd_v5_0_sw_init
_uvd_v5_0_sw_init:                      ; @uvd_v5_0_sw_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	ldr	x3, [x0]
	bl	_amdgpu_irq_add_id
	cbnz	w0, LBB0_4
; %bb.1:
	mov	x0, x19
	bl	_amdgpu_uvd_sw_init
	cbnz	w0, LBB0_4
; %bb.2:
	ldr	x20, [x19]
	ldr	w0, [x20, #4]!
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	bl	_sprintf
	ldr	x3, [x19]
	mov	x0, x19
	mov	x1, x20
	mov	w2, #512
	mov	w4, #0
	bl	_amdgpu_ring_init
	cbnz	w0, LBB0_4
; %bb.3:
	mov	x0, x19
	bl	_amdgpu_uvd_resume
	cbz	w0, LBB0_5
LBB0_4:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_5:
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_amdgpu_uvd_entity_init
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ; @AMDGPU_IRQ_CLIENTID_LEGACY
	.comm	_VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE,4,2 ; @VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"uvd"

	.no_dead_strip	_uvd_v5_0_sw_init
.subsections_via_symbols
