	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_ddi_post_disable_dp
_intel_ddi_post_disable_dp:             ## @intel_ddi_post_disable_dp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %r15
	leaq	4(%rdi), %rbx
	movl	4(%rdi), %edi
	callq	_to_i915
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_enc_to_dig_port
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	leaq	12(%rax), %r13
	movq	_INTEL_OUTPUT_DP_MST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_intel_crtc_has_type
	movl	%eax, %ebx
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_intel_port_to_phy
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	testl	%ebx, %ebx
	jne	LBB0_2
## %bb.1:
	movq	%r12, %rdi
	callq	_intel_ddi_disable_pipe_clock
	movq	_DRM_MODE_DPMS_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_intel_dp_sink_dpms
LBB0_2:
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_intel_disable_ddi_buf
	movq	%r13, %rdi
	callq	_intel_edp_panel_vdd_on
	movq	%r13, %rdi
	callq	_intel_edp_panel_off
	movq	%r14, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_intel_phy_is_tc
	testl	%eax, %eax
	movq	-56(%rbp), %rdx                 ## 8-byte Reload
	je	LBB0_4
## %bb.3:
	movq	(%rdx), %rax
	movq	_TC_PORT_TBT_ALT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_5
LBB0_4:
	movl	8(%rdx), %esi
	movq	%r14, %rdi
	callq	_intel_display_power_put_unchecked
LBB0_5:
	movq	%r15, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_ddi_clk_disable          ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_OUTPUT_DP_MST,4,2        ## @INTEL_OUTPUT_DP_MST
	.comm	_DRM_MODE_DPMS_OFF,4,2          ## @DRM_MODE_DPMS_OFF
	.comm	_TC_PORT_TBT_ALT,8,3            ## @TC_PORT_TBT_ALT
	.no_dead_strip	_intel_ddi_post_disable_dp
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_ddi_post_disable_dp
_intel_ddi_post_disable_dp:             ; @intel_ddi_post_disable_dp
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x1
	mov	x19, x0
	mov	x21, x0
	ldr	w0, [x21, #4]!
	bl	_to_i915
	mov	x20, x0
	mov	x0, x21
	bl	_enc_to_dig_port
	mov	x21, x0
	add	x23, x0, #12
Lloh0:
	adrp	x8, _INTEL_OUTPUT_DP_MST@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_OUTPUT_DP_MST@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x22
	bl	_intel_crtc_has_type
	mov	x25, x0
	ldr	w1, [x19]
	mov	x0, x20
	bl	_intel_port_to_phy
	mov	x24, x0
	cbnz	w25, LBB0_2
; %bb.1:
	mov	x0, x22
	bl	_intel_ddi_disable_pipe_clock
Lloh3:
	adrp	x8, _DRM_MODE_DPMS_OFF@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DRM_MODE_DPMS_OFF@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_intel_dp_sink_dpms
LBB0_2:
	mov	x0, x19
	mov	x1, x22
	bl	_intel_disable_ddi_buf
	mov	x0, x23
	bl	_intel_edp_panel_vdd_on
	mov	x0, x23
	bl	_intel_edp_panel_off
	mov	x0, x20
	mov	x1, x24
	bl	_intel_phy_is_tc
	cbz	w0, LBB0_4
; %bb.3:
	ldr	x8, [x21]
Lloh6:
	adrp	x9, _TC_PORT_TBT_ALT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _TC_PORT_TBT_ALT@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_5
LBB0_4:
	ldr	w1, [x21, #8]
	mov	x0, x20
	bl	_intel_display_power_put_unchecked
LBB0_5:
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_intel_ddi_clk_disable
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_OUTPUT_DP_MST,4,2        ; @INTEL_OUTPUT_DP_MST
	.comm	_DRM_MODE_DPMS_OFF,4,2          ; @DRM_MODE_DPMS_OFF
	.comm	_TC_PORT_TBT_ALT,8,3            ; @TC_PORT_TBT_ALT
	.no_dead_strip	_intel_ddi_post_disable_dp
.subsections_via_symbols
