	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_v8_0_program_watermarks
_dce_v8_0_program_watermarks:           ## @dce_v8_0_program_watermarks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$168, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r13
	movl	$0, -48(%rbp)                   ## 4-byte Folded Spill
	testl	%ecx, %ecx
	je	LBB0_1
## %bb.2:
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	cmpq	$0, 40(%r13)
	movl	$0, %edx
	movl	$0, %r14d
	movl	$0, %eax
	je	LBB0_20
## %bb.3:
	movq	%rdi, %rbx
	movl	%ecx, -48(%rbp)                 ## 4-byte Spill
	imull	$1000000, 56(%r13), %edi        ## imm = 0xF4240
	movl	64(%r13), %esi
	callq	_div_u64
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	imull	$1000000, 72(%r13), %edi        ## imm = 0xF4240
	movl	64(%r13), %esi
	callq	_div_u64
	movl	%eax, %edi
	movl	$65535, %esi                    ## imm = 0xFFFF
	callq	_min
	movl	%eax, %r14d
	cmpq	$0, 16(%rbx)
	je	LBB0_5
## %bb.4:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_dpm_get_mclk
	movl	%eax, %r15d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_dpm_get_sclk
                                        ## kill: def $eax killed $eax def $rax
	jmp	LBB0_6
LBB0_1:
	xorl	%edx, %edx
	xorl	%r14d, %r14d
	xorl	%eax, %eax
	jmp	LBB0_20
LBB0_5:
	movl	8(%rbx), %r15d
	movl	12(%rbx), %eax
LBB0_6:
	addl	%eax, %eax
	leal	(%rax,%rax,4), %eax
	addl	%r15d, %r15d
	leal	(%r15,%r15,4), %ecx
	movl	%ecx, -208(%rbp)
	movl	%eax, -204(%rbp)
	movups	56(%r13), %xmm0
	movups	%xmm0, -152(%rbp)
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movl	%eax, -200(%rbp)
	movl	%r14d, %r12d
	subl	%eax, %r12d
	movl	%r12d, -196(%rbp)
	movq	_DRM_MODE_FLAG_INTERLACE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	andl	48(%r13), %eax
	setne	%cl
	movl	%ecx, -192(%rbp)
	movl	32(%r13), %eax
	movl	%eax, -160(%rbp)
	movq	(%r13), %rax
	movq	_RMX_OFF@GOTPCREL(%rip), %rdx
	xorl	%ecx, %ecx
	cmpq	(%rdx), %rax
	sete	%cl
	movl	$2, %eax
	subl	%ecx, %eax
	movl	%eax, -188(%rbp)
	movl	$4, -184(%rbp)
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, -180(%rbp)
	movq	%rbx, %rdi
	callq	_cik_get_number_of_dram_channels
	movq	%rax, -168(%rbp)
	movl	-48(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, -176(%rbp)
	leaq	-208(%rbp), %r15
	movq	%r15, %rdi
	callq	_dce_v8_0_latency_watermark
	movl	%eax, %edi
	movl	$65535, %esi                    ## imm = 0xFFFF
	callq	_min
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	%r15, %rdi
	callq	_dce_v8_0_average_bandwidth_vs_dram_bandwidth_for_display
	testl	%eax, %eax
	je	LBB0_10
## %bb.7:
	leaq	-208(%rbp), %rdi
	callq	_dce_v8_0_average_bandwidth_vs_available_bandwidth
	testl	%eax, %eax
	je	LBB0_10
## %bb.8:
	leaq	-208(%rbp), %rdi
	callq	_dce_v8_0_check_latency_hiding
	testl	%eax, %eax
	je	LBB0_10
## %bb.9:
	cmpl	$2, (%rbx)
	jne	LBB0_11
LBB0_10:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_KMS
LBB0_11:
	cmpq	$0, 16(%rbx)
	je	LBB0_13
## %bb.12:
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_amdgpu_dpm_get_mclk
                                        ## kill: def $eax killed $eax def $rax
	addl	%eax, %eax
	leal	(%rax,%rax,4), %eax
	movl	%eax, -136(%rbp)
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_amdgpu_dpm_get_sclk
                                        ## kill: def $eax killed $eax def $rax
	jmp	LBB0_14
LBB0_13:
	movl	8(%rbx), %eax
	addl	%eax, %eax
	leal	(%rax,%rax,4), %eax
	movl	%eax, -136(%rbp)
	movl	12(%rbx), %eax
LBB0_14:
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	addl	%eax, %eax
	leal	(%rax,%rax,4), %eax
	movl	%eax, -132(%rbp)
	movups	56(%r13), %xmm0
	movups	%xmm0, -80(%rbp)
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movl	%eax, -128(%rbp)
	movl	%r12d, -124(%rbp)
	movq	_DRM_MODE_FLAG_INTERLACE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	andl	48(%r13), %eax
	setne	%cl
	movl	%ecx, -120(%rbp)
	movl	32(%r13), %eax
	movl	%eax, -88(%rbp)
	movq	(%r13), %rax
	xorl	%ecx, %ecx
	movq	_RMX_OFF@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rax
	sete	%cl
	movl	$2, %eax
	subl	%ecx, %eax
	movl	%eax, -116(%rbp)
	movl	$4, -112(%rbp)
	movl	%r15d, -108(%rbp)
	movq	%rbx, %rdi
	callq	_cik_get_number_of_dram_channels
	movq	%rax, -96(%rbp)
	movl	-48(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, -104(%rbp)
	leaq	-136(%rbp), %r12
	movq	%r12, %rdi
	callq	_dce_v8_0_latency_watermark
	movl	%eax, %edi
	movl	$65535, %esi                    ## imm = 0xFFFF
	callq	_min
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	%r12, %rdi
	callq	_dce_v8_0_average_bandwidth_vs_dram_bandwidth_for_display
	testl	%eax, %eax
	je	LBB0_18
## %bb.15:
	leaq	-136(%rbp), %rdi
	callq	_dce_v8_0_average_bandwidth_vs_available_bandwidth
	testl	%eax, %eax
	je	LBB0_18
## %bb.16:
	leaq	-136(%rbp), %rdi
	callq	_dce_v8_0_check_latency_hiding
	testl	%eax, %eax
	je	LBB0_18
## %bb.17:
	cmpl	$2, (%rbx)
	jne	LBB0_19
LBB0_18:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_KMS
LBB0_19:
	movq	56(%r13), %rsi
	movl	%r15d, %edi
	callq	_DIV_ROUND_UP
	movl	-52(%rbp), %edx                 ## 4-byte Reload
LBB0_20:
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_mmDPG_WATERMARK_MASK_CONTROL@GOTPCREL(%rip), %r15
	movq	24(%r13), %rdi
	addq	(%r15), %rdi
	movl	%edx, %ebx
	movl	%edx, -52(%rbp)                 ## 4-byte Spill
	callq	_RREG32
	movq	_DPG_WATERMARK_MASK_CONTROL__URGENCY_WATERMARK_MASK__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$3, %esi
	shll	%cl, %esi
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	movl	$3, %r12d
	notl	%esi
	andl	%eax, %esi
	btsl	%ecx, %esi
	movq	24(%r13), %rdi
	addq	(%r15), %rdi
	callq	_WREG32
	movq	_mmDPG_PIPE_URGENCY_CONTROL@GOTPCREL(%rip), %rdx
	movq	24(%r13), %rdi
	movq	_DPG_PIPE_URGENCY_CONTROL__URGENCY_LOW_WATERMARK__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%ebx, %eax
	shll	%cl, %eax
	addq	(%rdx), %rdi
	movq	_DPG_PIPE_URGENCY_CONTROL__URGENCY_HIGH_WATERMARK__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%r14d, %esi
	shll	%cl, %esi
	orl	%eax, %esi
	callq	_WREG32
	movq	24(%r13), %rdi
	addq	(%r15), %rdi
	callq	_RREG32
	movq	_DPG_WATERMARK_MASK_CONTROL__URGENCY_WATERMARK_MASK__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r12d
	notl	%r12d
	andl	%eax, %r12d
	movl	$2, %esi
	shll	%cl, %esi
	orl	%r12d, %esi
	movq	24(%r13), %rdi
	addq	(%r15), %rdi
	callq	_WREG32
	movq	24(%r13), %rdi
	movq	_mmDPG_PIPE_URGENCY_CONTROL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	movq	_DPG_PIPE_URGENCY_CONTROL__URGENCY_LOW_WATERMARK__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %eax
	shll	%cl, %eax
	movq	_DPG_PIPE_URGENCY_CONTROL__URGENCY_HIGH_WATERMARK__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%r14d, %esi
	shll	%cl, %esi
	orl	%eax, %esi
	callq	_WREG32
	movq	24(%r13), %rdi
	addq	(%r15), %rdi
	movl	-64(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movl	%r14d, 8(%r13)
	movl	-52(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, 12(%r13)
	movl	%ebx, 16(%r13)
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, 20(%r13)
	addq	$168, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ## @DRM_MODE_FLAG_INTERLACE
	.comm	_RMX_OFF,8,3                    ## @RMX_OFF
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"force priority to high\n"

	.comm	_mmDPG_WATERMARK_MASK_CONTROL,8,3 ## @mmDPG_WATERMARK_MASK_CONTROL
	.comm	_DPG_WATERMARK_MASK_CONTROL__URGENCY_WATERMARK_MASK__SHIFT,4,2 ## @DPG_WATERMARK_MASK_CONTROL__URGENCY_WATERMARK_MASK__SHIFT
	.comm	_mmDPG_PIPE_URGENCY_CONTROL,8,3 ## @mmDPG_PIPE_URGENCY_CONTROL
	.comm	_DPG_PIPE_URGENCY_CONTROL__URGENCY_LOW_WATERMARK__SHIFT,4,2 ## @DPG_PIPE_URGENCY_CONTROL__URGENCY_LOW_WATERMARK__SHIFT
	.comm	_DPG_PIPE_URGENCY_CONTROL__URGENCY_HIGH_WATERMARK__SHIFT,4,2 ## @DPG_PIPE_URGENCY_CONTROL__URGENCY_HIGH_WATERMARK__SHIFT
	.no_dead_strip	_dce_v8_0_program_watermarks
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_v8_0_program_watermarks
_dce_v8_0_program_watermarks:           ; @dce_v8_0_program_watermarks
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #256
	.cfi_def_cfa_offset 256
	stp	x28, x27, [sp, #160]            ; 16-byte Folded Spill
	stp	x26, x25, [sp, #176]            ; 16-byte Folded Spill
	stp	x24, x23, [sp, #192]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #208]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #224]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #240]            ; 16-byte Folded Spill
	add	x29, sp, #240
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x1
	mov	w25, #0
	cbz	w3, LBB0_4
; %bb.1:
	mov	x23, x0
	ldr	x8, [x19, #40]
	mov	x26, x25
	mov	x20, x25
	mov	x0, x25
	cbz	x8, LBB0_20
; %bb.2:
	mov	x24, x3
	mov	x21, x2
	ldr	w8, [x19, #56]
	mov	w20, #16960
	movk	w20, #15, lsl #16
	mul	w0, w8, w20
	ldr	w1, [x19, #64]
	bl	_div_u64
	mov	x25, x0
	ldr	w8, [x19, #72]
	mul	w0, w8, w20
	ldr	w1, [x19, #64]
	bl	_div_u64
                                        ; kill: def $w0 killed $w0 killed $x0
	mov	w1, #65535
	bl	_min
	mov	x20, x0
	ldr	x8, [x23, #16]
	cbz	x8, LBB0_5
; %bb.3:
	mov	x0, x23
	mov	w1, #0
	bl	_amdgpu_dpm_get_mclk
	mov	x22, x0
	mov	x0, x23
	mov	w1, #0
	bl	_amdgpu_dpm_get_sclk
	b	LBB0_6
LBB0_4:
	mov	x26, x25
	mov	x20, x25
	mov	x0, x25
	b	LBB0_20
LBB0_5:
	ldp	w22, w0, [x23, #8]
LBB0_6:
	add	w8, w0, w0, lsl #2
	lsl	w8, w8, #1
	add	w9, w22, w22, lsl #2
	lsl	w9, w9, #1
	stp	w9, w8, [sp, #8]
	ldur	q0, [x19, #56]
	stur	q0, [sp, #64]
	ldr	w8, [x19, #48]
Lloh0:
	adrp	x26, _DRM_MODE_FLAG_INTERLACE@GOTPAGE
Lloh1:
	ldr	x26, [x26, _DRM_MODE_FLAG_INTERLACE@GOTPAGEOFF]
	ldr	w9, [x26]
	tst	w9, w8
	cset	w8, ne
	ldr	x9, [x19]
Lloh2:
	adrp	x27, _RMX_OFF@GOTPAGE
Lloh3:
	ldr	x27, [x27, _RMX_OFF@GOTPAGEOFF]
	ldr	x10, [x27]
	cmp	x9, x10
	sub	w28, w20, w25
	stp	w25, w28, [sp, #16]
	ldr	w9, [x19, #32]
	str	w9, [sp, #56]
	mov	w9, #1
	cinc	w9, w9, ne
	stp	w8, w9, [sp, #24]
	mov	w8, #4
	stp	w8, w21, [sp, #32]
	mov	x0, x23
	bl	_cik_get_number_of_dram_channels
	str	x0, [sp, #48]
	str	w24, [sp, #40]
	add	x0, sp, #8
	bl	_dce_v8_0_latency_watermark
	mov	w1, #65535
	bl	_min
	mov	x22, x0
	add	x0, sp, #8
	bl	_dce_v8_0_average_bandwidth_vs_dram_bandwidth_for_display
	cbz	w0, LBB0_10
; %bb.7:
	add	x0, sp, #8
	bl	_dce_v8_0_average_bandwidth_vs_available_bandwidth
	cbz	w0, LBB0_10
; %bb.8:
	add	x0, sp, #8
	bl	_dce_v8_0_check_latency_hiding
	cbz	w0, LBB0_10
; %bb.9:
	ldr	w8, [x23]
	cmp	w8, #2
	b.ne	LBB0_11
LBB0_10:
Lloh4:
	adrp	x0, l_.str@PAGE
Lloh5:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
LBB0_11:
	ldr	x8, [x23, #16]
	cbz	x8, LBB0_13
; %bb.12:
	mov	x0, x23
	mov	w1, #1
	bl	_amdgpu_dpm_get_mclk
	add	w8, w0, w0, lsl #2
	lsl	w8, w8, #1
	str	w8, [sp, #80]
	mov	x0, x23
	mov	w1, #1
	bl	_amdgpu_dpm_get_sclk
	b	LBB0_14
LBB0_13:
	ldp	w8, w0, [x23, #8]
	add	w8, w8, w8, lsl #2
	lsl	w8, w8, #1
	str	w8, [sp, #80]
LBB0_14:
	add	w8, w0, w0, lsl #2
	lsl	w8, w8, #1
	ldur	q0, [x19, #56]
	stur	q0, [sp, #136]
	stp	w8, w25, [sp, #84]
	ldr	w8, [x19, #48]
	ldr	w9, [x26]
	tst	w9, w8
	cset	w8, ne
	stp	w28, w8, [sp, #92]
	ldr	w8, [x19, #32]
	ldr	x9, [x19]
	ldr	x10, [x27]
	cmp	x9, x10
	mov	w9, #1
	cinc	w9, w9, ne
	mov	w10, #4
	stp	w9, w10, [sp, #100]
	str	w8, [sp, #128]
	str	w21, [sp, #108]
	mov	x0, x23
	bl	_cik_get_number_of_dram_channels
	str	x0, [sp, #120]
	str	w24, [sp, #112]
	add	x0, sp, #80
	bl	_dce_v8_0_latency_watermark
	mov	w1, #65535
	bl	_min
	mov	x25, x0
	add	x0, sp, #80
	bl	_dce_v8_0_average_bandwidth_vs_dram_bandwidth_for_display
	cbz	w0, LBB0_18
; %bb.15:
	add	x0, sp, #80
	bl	_dce_v8_0_average_bandwidth_vs_available_bandwidth
	cbz	w0, LBB0_18
; %bb.16:
	add	x0, sp, #80
	bl	_dce_v8_0_check_latency_hiding
	cbz	w0, LBB0_18
; %bb.17:
	ldr	w8, [x23]
	cmp	w8, #2
	b.ne	LBB0_19
LBB0_18:
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
LBB0_19:
	ldr	x1, [x19, #56]
	mov	x0, x21
	bl	_DIV_ROUND_UP
	mov	x26, x22
LBB0_20:
	str	w0, [sp, #4]                    ; 4-byte Folded Spill
Lloh8:
	adrp	x23, _mmDPG_WATERMARK_MASK_CONTROL@GOTPAGE
Lloh9:
	ldr	x23, [x23, _mmDPG_WATERMARK_MASK_CONTROL@GOTPAGEOFF]
	ldr	x8, [x23]
	ldr	x9, [x19, #24]
	add	x0, x9, x8
	bl	_RREG32
	mov	x21, x0
Lloh10:
	adrp	x8, _DPG_WATERMARK_MASK_CONTROL__URGENCY_WATERMARK_MASK__SHIFT@GOTPAGE
Lloh11:
	ldr	x8, [x8, _DPG_WATERMARK_MASK_CONTROL__URGENCY_WATERMARK_MASK__SHIFT@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	mov	w27, #3
	lsl	w9, w27, w8
	bic	w9, w0, w9
	mov	w10, #1
	lsl	w8, w10, w8
	orr	w1, w9, w8
	ldr	x8, [x23]
	ldr	x9, [x19, #24]
	add	x0, x9, x8
	bl	_WREG32
Lloh13:
	adrp	x28, _mmDPG_PIPE_URGENCY_CONTROL@GOTPAGE
Lloh14:
	ldr	x28, [x28, _mmDPG_PIPE_URGENCY_CONTROL@GOTPAGEOFF]
	ldr	x8, [x28]
	ldr	x9, [x19, #24]
	add	x0, x9, x8
Lloh15:
	adrp	x22, _DPG_PIPE_URGENCY_CONTROL__URGENCY_LOW_WATERMARK__SHIFT@GOTPAGE
Lloh16:
	ldr	x22, [x22, _DPG_PIPE_URGENCY_CONTROL__URGENCY_LOW_WATERMARK__SHIFT@GOTPAGEOFF]
	ldr	w8, [x22]
	lsl	w8, w26, w8
Lloh17:
	adrp	x24, _DPG_PIPE_URGENCY_CONTROL__URGENCY_HIGH_WATERMARK__SHIFT@GOTPAGE
Lloh18:
	ldr	x24, [x24, _DPG_PIPE_URGENCY_CONTROL__URGENCY_HIGH_WATERMARK__SHIFT@GOTPAGEOFF]
	ldr	w9, [x24]
	lsl	w9, w20, w9
	orr	w1, w9, w8
	bl	_WREG32
	ldr	x8, [x23]
	ldr	x9, [x19, #24]
	add	x0, x9, x8
	bl	_RREG32
Lloh19:
	adrp	x8, _DPG_WATERMARK_MASK_CONTROL__URGENCY_WATERMARK_MASK__SHIFT@GOTPAGE
Lloh20:
	ldr	x8, [x8, _DPG_WATERMARK_MASK_CONTROL__URGENCY_WATERMARK_MASK__SHIFT@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	lsl	w9, w27, w8
	bic	w9, w0, w9
	mov	w10, #2
	lsl	w8, w10, w8
	orr	w1, w9, w8
	ldr	x8, [x23]
	ldr	x9, [x19, #24]
	add	x0, x9, x8
	bl	_WREG32
	ldr	x8, [x28]
	ldr	x9, [x19, #24]
	add	x0, x9, x8
	ldr	w8, [x22]
	lsl	w8, w25, w8
	ldr	w9, [x24]
	lsl	w9, w20, w9
	orr	w1, w9, w8
	bl	_WREG32
	ldr	x8, [x23]
	ldr	x9, [x19, #24]
	add	x0, x9, x8
	mov	x1, x21
	bl	_WREG32
	stp	w20, w26, [x19, #8]
	ldr	w8, [sp, #4]                    ; 4-byte Folded Reload
	stp	w25, w8, [x19, #16]
	ldp	x29, x30, [sp, #240]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #224]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #208]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #192]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #176]            ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #160]            ; 16-byte Folded Reload
	add	sp, sp, #256
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ; @DRM_MODE_FLAG_INTERLACE
	.comm	_RMX_OFF,8,3                    ; @RMX_OFF
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"force priority to high\n"

	.comm	_mmDPG_WATERMARK_MASK_CONTROL,8,3 ; @mmDPG_WATERMARK_MASK_CONTROL
	.comm	_DPG_WATERMARK_MASK_CONTROL__URGENCY_WATERMARK_MASK__SHIFT,4,2 ; @DPG_WATERMARK_MASK_CONTROL__URGENCY_WATERMARK_MASK__SHIFT
	.comm	_mmDPG_PIPE_URGENCY_CONTROL,8,3 ; @mmDPG_PIPE_URGENCY_CONTROL
	.comm	_DPG_PIPE_URGENCY_CONTROL__URGENCY_LOW_WATERMARK__SHIFT,4,2 ; @DPG_PIPE_URGENCY_CONTROL__URGENCY_LOW_WATERMARK__SHIFT
	.comm	_DPG_PIPE_URGENCY_CONTROL__URGENCY_HIGH_WATERMARK__SHIFT,4,2 ; @DPG_PIPE_URGENCY_CONTROL__URGENCY_HIGH_WATERMARK__SHIFT
	.no_dead_strip	_dce_v8_0_program_watermarks
.subsections_via_symbols
