	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_gfx_set_wptr              ## -- Begin function r100_gfx_set_wptr
	.p2align	4, 0x90
_r100_gfx_set_wptr:                     ## @r100_gfx_set_wptr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	_RADEON_CP_RB_WPTR@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movl	(%rsi), %esi
	callq	_WREG32
	movl	(%rbx), %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_RREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_CP_RB_WPTR,4,2          ## @RADEON_CP_RB_WPTR
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_gfx_set_wptr              ; -- Begin function r100_gfx_set_wptr
	.p2align	2
_r100_gfx_set_wptr:                     ; @r100_gfx_set_wptr
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x19, _RADEON_CP_RB_WPTR@GOTPAGE
Lloh1:
	ldr	x19, [x19, _RADEON_CP_RB_WPTR@GOTPAGEOFF]
	ldr	w0, [x19]
	ldr	w1, [x1]
	bl	_WREG32
	ldr	w0, [x19]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_RREG32
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_CP_RB_WPTR,4,2          ; @RADEON_CP_RB_WPTR
.subsections_via_symbols
