	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gpu_enable_i2c_bus
_gpu_enable_i2c_bus:                    ## @gpu_enable_i2c_bus
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_I2C_MST_HYBRID_PADCTL@GOTPCREL(%rip), %r14
	movq	(%r14), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_I2C_MST_HYBRID_PADCTL_MODE_I2C@GOTPCREL(%rip), %rcx
	movq	_I2C_MST_HYBRID_PADCTL_I2C_SCL_INPUT_RCV@GOTPCREL(%rip), %rdx
	movq	_I2C_MST_HYBRID_PADCTL_I2C_SDA_INPUT_RCV@GOTPCREL(%rip), %rsi
	orl	(%rcx), %eax
	orl	(%rdx), %eax
	orl	(%rsi), %eax
	movq	(%r14), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	callq	_writel
	movq	_I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT_MAX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edi
	movq	_I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_I2C_MST_I2C0_TIMING_TIMEOUT_CHECK@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_I2C_MST_I2C0_TIMING@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rbx), %rsi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_writel                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_I2C_MST_HYBRID_PADCTL,8,3      ## @I2C_MST_HYBRID_PADCTL
	.comm	_I2C_MST_HYBRID_PADCTL_MODE_I2C,4,2 ## @I2C_MST_HYBRID_PADCTL_MODE_I2C
	.comm	_I2C_MST_HYBRID_PADCTL_I2C_SCL_INPUT_RCV,4,2 ## @I2C_MST_HYBRID_PADCTL_I2C_SCL_INPUT_RCV
	.comm	_I2C_MST_HYBRID_PADCTL_I2C_SDA_INPUT_RCV,4,2 ## @I2C_MST_HYBRID_PADCTL_I2C_SDA_INPUT_RCV
	.comm	_I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ,4,2 ## @I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ
	.comm	_I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT_MAX,4,2 ## @I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT_MAX
	.comm	_I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT,4,2 ## @I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT
	.comm	_I2C_MST_I2C0_TIMING_TIMEOUT_CHECK,4,2 ## @I2C_MST_I2C0_TIMING_TIMEOUT_CHECK
	.comm	_I2C_MST_I2C0_TIMING,8,3        ## @I2C_MST_I2C0_TIMING
	.no_dead_strip	_gpu_enable_i2c_bus
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gpu_enable_i2c_bus
_gpu_enable_i2c_bus:                    ; @gpu_enable_i2c_bus
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x20, _I2C_MST_HYBRID_PADCTL@GOTPAGE
Lloh1:
	ldr	x20, [x20, _I2C_MST_HYBRID_PADCTL@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x0, x9, x8
	bl	_readl
Lloh2:
	adrp	x8, _I2C_MST_HYBRID_PADCTL_MODE_I2C@GOTPAGE
Lloh3:
	ldr	x8, [x8, _I2C_MST_HYBRID_PADCTL_MODE_I2C@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _I2C_MST_HYBRID_PADCTL_I2C_SCL_INPUT_RCV@GOTPAGE
Lloh6:
	ldr	x9, [x9, _I2C_MST_HYBRID_PADCTL_I2C_SCL_INPUT_RCV@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
Lloh8:
	adrp	x10, _I2C_MST_HYBRID_PADCTL_I2C_SDA_INPUT_RCV@GOTPAGE
Lloh9:
	ldr	x10, [x10, _I2C_MST_HYBRID_PADCTL_I2C_SDA_INPUT_RCV@GOTPAGEOFF]
Lloh10:
	ldr	w10, [x10]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w0, w8, w10
	ldr	x8, [x19]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
Lloh11:
	adrp	x8, _I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ@GOTPAGE
Lloh12:
	ldr	x8, [x8, _I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ@GOTPAGEOFF]
Lloh13:
	adrp	x9, _I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT_MAX@GOTPAGE
Lloh14:
	ldr	x9, [x9, _I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT_MAX@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
Lloh16:
	ldr	w9, [x9]
Lloh17:
	adrp	x10, _I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT@GOTPAGE
Lloh18:
	ldr	x10, [x10, _I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT@GOTPAGEOFF]
Lloh19:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
Lloh20:
	adrp	x9, _I2C_MST_I2C0_TIMING_TIMEOUT_CHECK@GOTPAGE
Lloh21:
	ldr	x9, [x9, _I2C_MST_I2C0_TIMING_TIMEOUT_CHECK@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w0, w8, w9
	ldr	x8, [x19]
Lloh23:
	adrp	x9, _I2C_MST_I2C0_TIMING@GOTPAGE
Lloh24:
	ldr	x9, [x9, _I2C_MST_I2C0_TIMING@GOTPAGEOFF]
Lloh25:
	ldr	x9, [x9]
	add	x1, x9, x8
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_writel
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh15
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_I2C_MST_HYBRID_PADCTL,8,3      ; @I2C_MST_HYBRID_PADCTL
	.comm	_I2C_MST_HYBRID_PADCTL_MODE_I2C,4,2 ; @I2C_MST_HYBRID_PADCTL_MODE_I2C
	.comm	_I2C_MST_HYBRID_PADCTL_I2C_SCL_INPUT_RCV,4,2 ; @I2C_MST_HYBRID_PADCTL_I2C_SCL_INPUT_RCV
	.comm	_I2C_MST_HYBRID_PADCTL_I2C_SDA_INPUT_RCV,4,2 ; @I2C_MST_HYBRID_PADCTL_I2C_SDA_INPUT_RCV
	.comm	_I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ,4,2 ; @I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ
	.comm	_I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT_MAX,4,2 ; @I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT_MAX
	.comm	_I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT,4,2 ; @I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT
	.comm	_I2C_MST_I2C0_TIMING_TIMEOUT_CHECK,4,2 ; @I2C_MST_I2C0_TIMING_TIMEOUT_CHECK
	.comm	_I2C_MST_I2C0_TIMING,8,3        ; @I2C_MST_I2C0_TIMING
	.no_dead_strip	_gpu_enable_i2c_bus
.subsections_via_symbols
