	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vce_v3_0_set_clockgating_state
_vce_v3_0_set_clockgating_state:        ## @vce_v3_0_set_clockgating_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_AMD_CG_STATE_GATE@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	xorl	%r15d, %r15d
	cmpl	%esi, %r14d
	sete	%al
	movq	_AMD_CG_SUPPORT_VCE_MGCG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rdi)
	je	LBB0_10
## %bb.1:
	movl	%esi, %r12d
	movq	%rdi, %rbx
	movb	%al, %r15b
	addq	$4, %rdi
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	callq	_mutex_lock
	movl	8(%rbx), %eax
	testb	$1, %al
	jne	LBB0_5
## %bb.2:
	movq	_mmGRBM_GFX_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	xorl	%edi, %edi
	callq	_GET_VCE_INSTANCE
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	cmpl	%r12d, %r14d
	je	LBB0_4
## %bb.3:
	movq	_mmVCE_CLOCK_GATING_A@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	callq	_RREG32
                                        ## kill: def $eax killed $eax def $rax
	andl	$-4096, %eax                    ## imm = 0xF000
	leal	64(%rax), %esi
	movl	(%r13), %edi
	callq	_WREG32
	movq	_mmVCE_UENC_CLOCK_GATING@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	callq	_RREG32
                                        ## kill: def $eax killed $eax def $rax
	andl	$-4096, %eax                    ## imm = 0xF000
	leal	64(%rax), %esi
	movl	(%r13), %edi
	callq	_WREG32
LBB0_4:
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_vce_v3_0_set_vce_sw_clock_gating
	movl	8(%rbx), %eax
LBB0_5:
	testb	$2, %al
	jne	LBB0_9
## %bb.6:
	movq	_mmGRBM_GFX_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	$1, %edi
	callq	_GET_VCE_INSTANCE
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	cmpl	%r12d, %r14d
	je	LBB0_8
## %bb.7:
	movq	_mmVCE_CLOCK_GATING_A@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	callq	_RREG32
                                        ## kill: def $eax killed $eax def $rax
	andl	$-4096, %eax                    ## imm = 0xF000
	leal	64(%rax), %esi
	movl	(%r14), %edi
	callq	_WREG32
	movq	_mmVCE_UENC_CLOCK_GATING@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	callq	_RREG32
                                        ## kill: def $eax killed $eax def $rax
	andl	$-4096, %eax                    ## imm = 0xF000
	leal	64(%rax), %esi
	movl	(%r14), %edi
	callq	_WREG32
LBB0_8:
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_vce_v3_0_set_vce_sw_clock_gating
LBB0_9:
	movq	_mmGRBM_GFX_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmGRBM_GFX_INDEX_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_mutex_unlock
LBB0_10:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_CG_STATE_GATE,4,2          ## @AMD_CG_STATE_GATE
	.comm	_AMD_CG_SUPPORT_VCE_MGCG,4,2    ## @AMD_CG_SUPPORT_VCE_MGCG
	.comm	_mmGRBM_GFX_INDEX,4,2           ## @mmGRBM_GFX_INDEX
	.comm	_mmVCE_CLOCK_GATING_A,4,2       ## @mmVCE_CLOCK_GATING_A
	.comm	_mmVCE_UENC_CLOCK_GATING,4,2    ## @mmVCE_UENC_CLOCK_GATING
	.comm	_mmGRBM_GFX_INDEX_DEFAULT,4,2   ## @mmGRBM_GFX_INDEX_DEFAULT
	.no_dead_strip	_vce_v3_0_set_clockgating_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vce_v3_0_set_clockgating_state
_vce_v3_0_set_clockgating_state:        ; @vce_v3_0_set_clockgating_state
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
Lloh0:
	adrp	x8, _AMD_CG_STATE_GATE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMD_CG_STATE_GATE@GOTPAGEOFF]
Lloh2:
	ldr	w25, [x8]
	cmp	w25, w1
	cset	w21, eq
	ldr	w8, [x0]
Lloh3:
	adrp	x9, _AMD_CG_SUPPORT_VCE_MGCG@GOTPAGE
Lloh4:
	ldr	x9, [x9, _AMD_CG_SUPPORT_VCE_MGCG@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_10
; %bb.1:
	mov	x22, x1
	mov	x20, x0
	add	x19, x0, #4
	mov	x0, x19
	bl	_mutex_lock
	ldr	w8, [x20, #8]
Lloh6:
	adrp	x24, _mmGRBM_GFX_INDEX@GOTPAGE
Lloh7:
	ldr	x24, [x24, _mmGRBM_GFX_INDEX@GOTPAGEOFF]
	tbnz	w8, #0, LBB0_5
; %bb.2:
	ldr	w23, [x24]
	mov	w0, #0
	bl	_GET_VCE_INSTANCE
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
	cmp	w25, w22
	b.eq	LBB0_4
; %bb.3:
Lloh8:
	adrp	x23, _mmVCE_CLOCK_GATING_A@GOTPAGE
Lloh9:
	ldr	x23, [x23, _mmVCE_CLOCK_GATING_A@GOTPAGEOFF]
	ldr	w0, [x23]
	bl	_RREG32
	and	w8, w0, #0xfffff000
	orr	w1, w8, #0x40
	ldr	w0, [x23]
	bl	_WREG32
Lloh10:
	adrp	x23, _mmVCE_UENC_CLOCK_GATING@GOTPAGE
Lloh11:
	ldr	x23, [x23, _mmVCE_UENC_CLOCK_GATING@GOTPAGEOFF]
	ldr	w0, [x23]
	bl	_RREG32
	and	w8, w0, #0xfffff000
	orr	w1, w8, #0x40
	ldr	w0, [x23]
	bl	_WREG32
LBB0_4:
	mov	x0, x20
	mov	x1, x21
	bl	_vce_v3_0_set_vce_sw_clock_gating
	ldr	w8, [x20, #8]
LBB0_5:
	tbnz	w8, #1, LBB0_9
; %bb.6:
	ldr	w23, [x24]
	mov	w0, #1
	bl	_GET_VCE_INSTANCE
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
	cmp	w25, w22
	b.eq	LBB0_8
; %bb.7:
Lloh12:
	adrp	x22, _mmVCE_CLOCK_GATING_A@GOTPAGE
Lloh13:
	ldr	x22, [x22, _mmVCE_CLOCK_GATING_A@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_RREG32
	and	w8, w0, #0xfffff000
	orr	w1, w8, #0x40
	ldr	w0, [x22]
	bl	_WREG32
Lloh14:
	adrp	x22, _mmVCE_UENC_CLOCK_GATING@GOTPAGE
Lloh15:
	ldr	x22, [x22, _mmVCE_UENC_CLOCK_GATING@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_RREG32
	and	w8, w0, #0xfffff000
	orr	w1, w8, #0x40
	ldr	w0, [x22]
	bl	_WREG32
LBB0_8:
	mov	x0, x20
	mov	x1, x21
	bl	_vce_v3_0_set_vce_sw_clock_gating
LBB0_9:
	ldr	w0, [x24]
Lloh16:
	adrp	x8, _mmGRBM_GFX_INDEX_DEFAULT@GOTPAGE
Lloh17:
	ldr	x8, [x8, _mmGRBM_GFX_INDEX_DEFAULT@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	bl	_WREG32
	mov	x0, x19
	bl	_mutex_unlock
LBB0_10:
	mov	w0, #0
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_CG_STATE_GATE,4,2          ; @AMD_CG_STATE_GATE
	.comm	_AMD_CG_SUPPORT_VCE_MGCG,4,2    ; @AMD_CG_SUPPORT_VCE_MGCG
	.comm	_mmGRBM_GFX_INDEX,4,2           ; @mmGRBM_GFX_INDEX
	.comm	_mmVCE_CLOCK_GATING_A,4,2       ; @mmVCE_CLOCK_GATING_A
	.comm	_mmVCE_UENC_CLOCK_GATING,4,2    ; @mmVCE_UENC_CLOCK_GATING
	.comm	_mmGRBM_GFX_INDEX_DEFAULT,4,2   ; @mmGRBM_GFX_INDEX_DEFAULT
	.no_dead_strip	_vce_v3_0_set_clockgating_state
.subsections_via_symbols
