	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cdv_update_wm                  ## -- Begin function cdv_update_wm
	.p2align	4, 0x90
_cdv_update_wm:                         ## @cdv_update_wm
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r12
	movq	(%rdi), %r13
	movq	%rsi, %rdi
	callq	_to_gma_crtc
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_cdv_intel_pipe_enabled
	movl	%eax, %ebx
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_cdv_intel_pipe_enabled
	movq	_DSPFW1@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	cmpl	%eax, %ebx
	jne	LBB0_1
## %bb.5:
	movl	$1065879560, %esi               ## imm = 0x3F880808
	callq	_REG_WRITE
	movq	_DSPFW2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$184680962, %esi                ## imm = 0xB020202
	callq	_REG_WRITE
	movq	_DSPFW3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$603979776, %esi                ## imm = 0x24000000
	callq	_REG_WRITE
	movq	_DSPFW4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$134414850, %esi                ## imm = 0x8030202
	callq	_REG_WRITE
	movq	_DSPFW5@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$16843009, %esi                 ## imm = 0x1010101
	callq	_REG_WRITE
	movq	_DSPFW6@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$464, %esi                      ## imm = 0x1D0
	callq	_REG_WRITE
	movq	%r12, %rdi
	callq	_gma_wait_for_vblank
	movq	(%r13), %rax
	movq	%r12, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmpq	*(%rax)                         ## TAILCALL
LBB0_1:
	callq	_REG_READ
	movq	_DSP_FIFO_SR_WM_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_DSP_FIFO_SR_WM_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$126, %edi
	shll	%cl, %edi
	notl	%edx
	andl	%eax, %edx
	orl	%edx, %edi
	movq	_CURSOR_B_FIFO_WM_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movq	_CURSOR_B_FIFO_WM_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$4, %esi
	shll	%cl, %esi
	andl	%edi, %eax
	movl	$4, %ebx
	orl	%eax, %esi
	movl	(%r15), %edi
	callq	_REG_WRITE
	movq	_DSPFW2@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_REG_READ
	movq	_CURSOR_A_FIFO_WM_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movq	_CURSOR_A_FIFO_WM_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$6, %eax
	shll	%cl, %eax
	orl	%edx, %eax
	movq	_DSP_PLANE_C_FIFO_WM_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_DSP_PLANE_C_FIFO_WM_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$8, %esi
	shll	%cl, %esi
	notl	%edx
	andl	%eax, %edx
	orl	%edx, %esi
	movl	(%r15), %edi
	callq	_REG_WRITE
	movq	_DSPFW3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$905969664, %esi                ## imm = 0x36000000
	callq	_REG_WRITE
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	cmpl	$1, (%rax)
	jne	LBB0_3
## %bb.2:
	movq	_INTEL_OUTPUT_LVDS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_gma_pipe_has_type
	movl	$262960, %esi                   ## imm = 0x40330
	testq	%rax, %rax
	jne	LBB0_4
LBB0_3:
	movq	_DSP_PLANE_B_FIFO_WM1_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$3, %eax
	shll	%cl, %eax
	movq	_DSP_PLANE_A_FIFO_WM1_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$4, %edx
	shll	%cl, %edx
	movl	$3, %esi
	movq	_CURSOR_B_FIFO_WM1_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	movq	_CURSOR_FIFO_SR_WM1_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %ebx
	orl	%eax, %edx
	orl	%esi, %ebx
	orl	%edx, %ebx
	movl	%ebx, %esi
LBB0_4:
	movq	_DSPFW5@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_REG_WRITE
	movq	_DSPFW6@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$16, %esi
	callq	_REG_WRITE
	movq	%r12, %rdi
	callq	_gma_wait_for_vblank
	movq	_FW_BLC_SELF@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movq	_FW_BLC_SELF_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_REG_WRITE
	movl	(%rbx), %edi
	callq	_REG_READ
	movq	%r12, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_gma_wait_for_vblank            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DSPFW1,4,2                     ## @DSPFW1
	.comm	_DSP_FIFO_SR_WM_MASK,4,2        ## @DSP_FIFO_SR_WM_MASK
	.comm	_DSP_FIFO_SR_WM_SHIFT,4,2       ## @DSP_FIFO_SR_WM_SHIFT
	.comm	_CURSOR_B_FIFO_WM_MASK,4,2      ## @CURSOR_B_FIFO_WM_MASK
	.comm	_CURSOR_B_FIFO_WM_SHIFT,4,2     ## @CURSOR_B_FIFO_WM_SHIFT
	.comm	_DSPFW2,4,2                     ## @DSPFW2
	.comm	_CURSOR_A_FIFO_WM_MASK,4,2      ## @CURSOR_A_FIFO_WM_MASK
	.comm	_CURSOR_A_FIFO_WM_SHIFT,4,2     ## @CURSOR_A_FIFO_WM_SHIFT
	.comm	_DSP_PLANE_C_FIFO_WM_MASK,4,2   ## @DSP_PLANE_C_FIFO_WM_MASK
	.comm	_DSP_PLANE_C_FIFO_WM_SHIFT,4,2  ## @DSP_PLANE_C_FIFO_WM_SHIFT
	.comm	_DSPFW3,4,2                     ## @DSPFW3
	.comm	_INTEL_OUTPUT_LVDS,4,2          ## @INTEL_OUTPUT_LVDS
	.comm	_DSPFW5,4,2                     ## @DSPFW5
	.comm	_DSP_PLANE_B_FIFO_WM1_SHIFT,4,2 ## @DSP_PLANE_B_FIFO_WM1_SHIFT
	.comm	_DSP_PLANE_A_FIFO_WM1_SHIFT,4,2 ## @DSP_PLANE_A_FIFO_WM1_SHIFT
	.comm	_CURSOR_B_FIFO_WM1_SHIFT,4,2    ## @CURSOR_B_FIFO_WM1_SHIFT
	.comm	_CURSOR_FIFO_SR_WM1_SHIFT,4,2   ## @CURSOR_FIFO_SR_WM1_SHIFT
	.comm	_DSPFW6,4,2                     ## @DSPFW6
	.comm	_FW_BLC_SELF,4,2                ## @FW_BLC_SELF
	.comm	_FW_BLC_SELF_EN,4,2             ## @FW_BLC_SELF_EN
	.comm	_DSPFW4,4,2                     ## @DSPFW4
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cdv_update_wm                  ; -- Begin function cdv_update_wm
	.p2align	2
_cdv_update_wm:                         ; @cdv_update_wm
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
	ldr	x23, [x0]
	mov	x0, x1
	bl	_to_gma_crtc
	mov	x21, x0
	mov	x0, x19
	mov	w1, #0
	bl	_cdv_intel_pipe_enabled
	mov	x22, x0
	mov	x0, x19
	mov	w1, #1
	bl	_cdv_intel_pipe_enabled
	mov	x8, x0
Lloh0:
	adrp	x24, _DSPFW1@GOTPAGE
Lloh1:
	ldr	x24, [x24, _DSPFW1@GOTPAGEOFF]
	ldr	w0, [x24]
	cmp	w22, w8
	b.ne	LBB0_2
; %bb.1:
	mov	w1, #2056
	movk	w1, #16264, lsl #16
	bl	_REG_WRITE
Lloh2:
	adrp	x8, _DSPFW2@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DSPFW2@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	mov	w1, #514
	movk	w1, #2818, lsl #16
	bl	_REG_WRITE
Lloh5:
	adrp	x8, _DSPFW3@GOTPAGE
Lloh6:
	ldr	x8, [x8, _DSPFW3@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	mov	w1, #603979776
	bl	_REG_WRITE
Lloh8:
	adrp	x8, _DSPFW4@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DSPFW4@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	mov	w1, #514
	movk	w1, #2051, lsl #16
	bl	_REG_WRITE
Lloh11:
	adrp	x8, _DSPFW5@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DSPFW5@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	mov	w1, #16843009
	bl	_REG_WRITE
Lloh14:
	adrp	x8, _DSPFW6@GOTPAGE
Lloh15:
	ldr	x8, [x8, _DSPFW6@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	mov	w1, #464
	bl	_REG_WRITE
	mov	x0, x19
	bl	_gma_wait_for_vblank
	ldr	x8, [x23]
	ldr	x1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	br	x1
LBB0_2:
	bl	_REG_READ
Lloh17:
	adrp	x8, _DSP_FIFO_SR_WM_MASK@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DSP_FIFO_SR_WM_MASK@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh20:
	adrp	x9, _DSP_FIFO_SR_WM_SHIFT@GOTPAGE
Lloh21:
	ldr	x9, [x9, _DSP_FIFO_SR_WM_SHIFT@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	mov	w10, #126
	lsl	w9, w10, w9
	orr	w8, w9, w8
Lloh23:
	adrp	x9, _CURSOR_B_FIFO_WM_MASK@GOTPAGE
Lloh24:
	ldr	x9, [x9, _CURSOR_B_FIFO_WM_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
Lloh26:
	adrp	x10, _CURSOR_B_FIFO_WM_SHIFT@GOTPAGE
Lloh27:
	ldr	x10, [x10, _CURSOR_B_FIFO_WM_SHIFT@GOTPAGEOFF]
	bic	w8, w8, w9
Lloh28:
	ldr	w9, [x10]
	mov	w22, #4
	lsl	w9, w22, w9
	orr	w1, w8, w9
	ldr	w0, [x24]
	bl	_REG_WRITE
Lloh29:
	adrp	x23, _DSPFW2@GOTPAGE
Lloh30:
	ldr	x23, [x23, _DSPFW2@GOTPAGEOFF]
	ldr	w0, [x23]
	bl	_REG_READ
Lloh31:
	adrp	x8, _CURSOR_A_FIFO_WM_MASK@GOTPAGE
Lloh32:
	ldr	x8, [x8, _CURSOR_A_FIFO_WM_MASK@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh34:
	adrp	x9, _CURSOR_A_FIFO_WM_SHIFT@GOTPAGE
Lloh35:
	ldr	x9, [x9, _CURSOR_A_FIFO_WM_SHIFT@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	mov	w10, #6
	lsl	w9, w10, w9
	orr	w8, w9, w8
Lloh37:
	adrp	x9, _DSP_PLANE_C_FIFO_WM_MASK@GOTPAGE
Lloh38:
	ldr	x9, [x9, _DSP_PLANE_C_FIFO_WM_MASK@GOTPAGEOFF]
Lloh39:
	ldr	w9, [x9]
Lloh40:
	adrp	x10, _DSP_PLANE_C_FIFO_WM_SHIFT@GOTPAGE
Lloh41:
	ldr	x10, [x10, _DSP_PLANE_C_FIFO_WM_SHIFT@GOTPAGEOFF]
	bic	w8, w8, w9
Lloh42:
	ldr	w9, [x10]
	mov	w10, #8
	lsl	w9, w10, w9
	orr	w1, w8, w9
	ldr	w0, [x23]
	bl	_REG_WRITE
Lloh43:
	adrp	x8, _DSPFW3@GOTPAGE
Lloh44:
	ldr	x8, [x8, _DSPFW3@GOTPAGEOFF]
Lloh45:
	ldr	w0, [x8]
	mov	w1, #905969664
	bl	_REG_WRITE
	ldr	w8, [x21]
	cmp	w8, #1
	b.ne	LBB0_5
; %bb.3:
Lloh46:
	adrp	x8, _INTEL_OUTPUT_LVDS@GOTPAGE
Lloh47:
	ldr	x8, [x8, _INTEL_OUTPUT_LVDS@GOTPAGEOFF]
Lloh48:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_gma_pipe_has_type
	cbz	x0, LBB0_5
; %bb.4:
	mov	w1, #816
	movk	w1, #4, lsl #16
	b	LBB0_6
LBB0_5:
Lloh49:
	adrp	x8, _DSP_PLANE_B_FIFO_WM1_SHIFT@GOTPAGE
Lloh50:
	ldr	x8, [x8, _DSP_PLANE_B_FIFO_WM1_SHIFT@GOTPAGEOFF]
Lloh51:
	ldr	w8, [x8]
	mov	w9, #3
	lsl	w8, w9, w8
Lloh52:
	adrp	x10, _DSP_PLANE_A_FIFO_WM1_SHIFT@GOTPAGE
Lloh53:
	ldr	x10, [x10, _DSP_PLANE_A_FIFO_WM1_SHIFT@GOTPAGEOFF]
Lloh54:
	ldr	w10, [x10]
	lsl	w10, w22, w10
	orr	w8, w10, w8
Lloh55:
	adrp	x10, _CURSOR_B_FIFO_WM1_SHIFT@GOTPAGE
Lloh56:
	ldr	x10, [x10, _CURSOR_B_FIFO_WM1_SHIFT@GOTPAGEOFF]
Lloh57:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w8, w9
Lloh58:
	adrp	x9, _CURSOR_FIFO_SR_WM1_SHIFT@GOTPAGE
Lloh59:
	ldr	x9, [x9, _CURSOR_FIFO_SR_WM1_SHIFT@GOTPAGEOFF]
Lloh60:
	ldr	w9, [x9]
	lsl	w9, w22, w9
	orr	w1, w8, w9
LBB0_6:
Lloh61:
	adrp	x8, _DSPFW5@GOTPAGE
Lloh62:
	ldr	x8, [x8, _DSPFW5@GOTPAGEOFF]
Lloh63:
	ldr	w0, [x8]
	bl	_REG_WRITE
Lloh64:
	adrp	x8, _DSPFW6@GOTPAGE
Lloh65:
	ldr	x8, [x8, _DSPFW6@GOTPAGEOFF]
Lloh66:
	ldr	w0, [x8]
	mov	w1, #16
	bl	_REG_WRITE
	mov	x0, x19
	bl	_gma_wait_for_vblank
Lloh67:
	adrp	x20, _FW_BLC_SELF@GOTPAGE
Lloh68:
	ldr	x20, [x20, _FW_BLC_SELF@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh69:
	adrp	x8, _FW_BLC_SELF_EN@GOTPAGE
Lloh70:
	ldr	x8, [x8, _FW_BLC_SELF_EN@GOTPAGEOFF]
Lloh71:
	ldr	w1, [x8]
	bl	_REG_WRITE
	ldr	w0, [x20]
	bl	_REG_READ
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_gma_wait_for_vblank
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.cfi_endproc
                                        ; -- End function
	.comm	_DSPFW1,4,2                     ; @DSPFW1
	.comm	_DSP_FIFO_SR_WM_MASK,4,2        ; @DSP_FIFO_SR_WM_MASK
	.comm	_DSP_FIFO_SR_WM_SHIFT,4,2       ; @DSP_FIFO_SR_WM_SHIFT
	.comm	_CURSOR_B_FIFO_WM_MASK,4,2      ; @CURSOR_B_FIFO_WM_MASK
	.comm	_CURSOR_B_FIFO_WM_SHIFT,4,2     ; @CURSOR_B_FIFO_WM_SHIFT
	.comm	_DSPFW2,4,2                     ; @DSPFW2
	.comm	_CURSOR_A_FIFO_WM_MASK,4,2      ; @CURSOR_A_FIFO_WM_MASK
	.comm	_CURSOR_A_FIFO_WM_SHIFT,4,2     ; @CURSOR_A_FIFO_WM_SHIFT
	.comm	_DSP_PLANE_C_FIFO_WM_MASK,4,2   ; @DSP_PLANE_C_FIFO_WM_MASK
	.comm	_DSP_PLANE_C_FIFO_WM_SHIFT,4,2  ; @DSP_PLANE_C_FIFO_WM_SHIFT
	.comm	_DSPFW3,4,2                     ; @DSPFW3
	.comm	_INTEL_OUTPUT_LVDS,4,2          ; @INTEL_OUTPUT_LVDS
	.comm	_DSPFW5,4,2                     ; @DSPFW5
	.comm	_DSP_PLANE_B_FIFO_WM1_SHIFT,4,2 ; @DSP_PLANE_B_FIFO_WM1_SHIFT
	.comm	_DSP_PLANE_A_FIFO_WM1_SHIFT,4,2 ; @DSP_PLANE_A_FIFO_WM1_SHIFT
	.comm	_CURSOR_B_FIFO_WM1_SHIFT,4,2    ; @CURSOR_B_FIFO_WM1_SHIFT
	.comm	_CURSOR_FIFO_SR_WM1_SHIFT,4,2   ; @CURSOR_FIFO_SR_WM1_SHIFT
	.comm	_DSPFW6,4,2                     ; @DSPFW6
	.comm	_FW_BLC_SELF,4,2                ; @FW_BLC_SELF
	.comm	_FW_BLC_SELF_EN,4,2             ; @FW_BLC_SELF_EN
	.comm	_DSPFW4,4,2                     ; @DSPFW4
.subsections_via_symbols
