	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vega10_disable_psm_gc_edc_config
_vega10_disable_psm_gc_edc_config:      ## @vega10_disable_psm_gc_edc_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movq	8(%rdi), %rbx
	movq	%rbx, %rdi
	callq	_amdgpu_gfx_rlc_enter_safe_mode
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_vega10_didt_set_mask
	movq	%rbx, %rdi
	callq	_amdgpu_gfx_rlc_exit_safe_mode
	movq	_PHM_PlatformCaps_GCEDC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_PP_CAP
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movl	(%r14), %edi
	movq	_mmGC_EDC_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_cgs_write_register
LBB0_2:
	movq	_PHM_PlatformCaps_PSM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_PP_CAP
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_AvfsPSMResetConfig_vega10@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_vega10_program_gc_didt_config_registers
LBB0_4:
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PHM_PlatformCaps_GCEDC,4,2     ## @PHM_PlatformCaps_GCEDC
	.comm	_mmGC_EDC_CTRL,4,2              ## @mmGC_EDC_CTRL
	.comm	_PHM_PlatformCaps_PSM,4,2       ## @PHM_PlatformCaps_PSM
	.comm	_AvfsPSMResetConfig_vega10,4,2  ## @AvfsPSMResetConfig_vega10
	.no_dead_strip	_vega10_disable_psm_gc_edc_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vega10_disable_psm_gc_edc_config
_vega10_disable_psm_gc_edc_config:      ; @vega10_disable_psm_gc_edc_config
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x20, [x0, #8]
	mov	x0, x20
	bl	_amdgpu_gfx_rlc_enter_safe_mode
	mov	x0, x19
	mov	w1, #0
	bl	_vega10_didt_set_mask
	mov	x0, x20
	bl	_amdgpu_gfx_rlc_exit_safe_mode
Lloh0:
	adrp	x8, _PHM_PlatformCaps_GCEDC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PHM_PlatformCaps_GCEDC@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_PP_CAP
	cbz	x0, LBB0_2
; %bb.1:
	ldr	w0, [x19]
Lloh3:
	adrp	x8, _mmGC_EDC_CTRL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _mmGC_EDC_CTRL@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_cgs_write_register
LBB0_2:
Lloh6:
	adrp	x8, _PHM_PlatformCaps_PSM@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PHM_PlatformCaps_PSM@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	bl	_PP_CAP
	cbz	x0, LBB0_4
; %bb.3:
Lloh9:
	adrp	x8, _AvfsPSMResetConfig_vega10@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AvfsPSMResetConfig_vega10@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_vega10_program_gc_didt_config_registers
LBB0_4:
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_PHM_PlatformCaps_GCEDC,4,2     ; @PHM_PlatformCaps_GCEDC
	.comm	_mmGC_EDC_CTRL,4,2              ; @mmGC_EDC_CTRL
	.comm	_PHM_PlatformCaps_PSM,4,2       ; @PHM_PlatformCaps_PSM
	.comm	_AvfsPSMResetConfig_vega10,4,2  ; @AvfsPSMResetConfig_vega10
	.no_dead_strip	_vega10_disable_psm_gc_edc_config
.subsections_via_symbols
