	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dsi_host_parse_lane_data
_dsi_host_parse_lane_data:              ## @dsi_host_parse_lane_data
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %r14
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	movq	8(%rdi), %r15
	leaq	L_.str(%rip), %rsi
	leaq	-68(%rbp), %rdx
	movq	%r12, %rdi
	callq	_of_find_property
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movl	-68(%rbp), %ebx
	leal	-20(%rbx), %eax
	cmpl	$-17, %eax
	ja	LBB0_4
## %bb.3:
	leaq	L_.str.2(%rip), %rsi
	xorl	%r12d, %r12d
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	_DRM_DEV_ERROR
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_17
LBB0_1:
	leaq	L_.str.1(%rip), %rsi
	movq	%r15, %rdi
	callq	_DRM_DEV_DEBUG
	xorl	%r12d, %r12d
	jmp	LBB0_18
LBB0_4:
	sarl	$2, %ebx
	movl	%ebx, (%r14)
	leaq	L_.str(%rip), %rsi
	leaq	-64(%rbp), %rdx
	movq	%r12, %rdi
	movl	%ebx, %ecx
	callq	_of_property_read_u32_array
	testl	%eax, %eax
	je	LBB0_5
## %bb.20:
	movl	%eax, %r12d
	leaq	L_.str.3(%rip), %rsi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	_DRM_DEV_ERROR
	jmp	LBB0_18
LBB0_5:
	movq	%r15, -88(%rbp)                 ## 8-byte Spill
	movq	%r14, -80(%rbp)                 ## 8-byte Spill
	movq	_supported_data_lane_swaps@GOTPCREL(%rip), %r12
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	jle	LBB0_16
## %bb.6:
	cmpl	$2, %ebx
	movl	$1, %r15d
	cmovgel	%ebx, %r15d
	xorl	%r14d, %r14d
	.p2align	4, 0x90
LBB0_7:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_8 Depth 2
	movq	(%r12), %rax
	movq	(%rax,%r14,8), %r12
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_8:                                 ##   Parent Loop BB0_7 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movl	-64(%rbp,%r13,4), %edx
	cmpl	$4, %edx
	jb	LBB0_10
## %bb.9:                               ##   in Loop: Header=BB0_8 Depth=2
	movq	-88(%rbp), %rdi                 ## 8-byte Reload
	leaq	L_.str.4(%rip), %rsi
	xorl	%eax, %eax
	callq	_DRM_DEV_ERROR
	movl	-64(%rbp,%r13,4), %edx
LBB0_10:                                ##   in Loop: Header=BB0_8 Depth=2
	movslq	%edx, %rax
	movl	(%r12,%rax,4), %eax
	cmpq	%rax, %r13
	jne	LBB0_13
## %bb.11:                              ##   in Loop: Header=BB0_8 Depth=2
	incq	%r13
	cmpq	%r13, %r15
	jne	LBB0_8
## %bb.12:                              ##   in Loop: Header=BB0_7 Depth=1
	movl	%r15d, %r13d
LBB0_13:                                ##   in Loop: Header=BB0_7 Depth=1
	cmpl	%ebx, %r13d
	je	LBB0_14
## %bb.15:                              ##   in Loop: Header=BB0_7 Depth=1
	incq	%r14
	movq	_supported_data_lane_swaps@GOTPCREL(%rip), %r12
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	cltq
	cmpq	%rax, %r14
	jl	LBB0_7
LBB0_16:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r12d, %r12d
LBB0_17:
	subl	(%rax), %r12d
LBB0_18:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_21
## %bb.19:
	movl	%r12d, %eax
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_14:
	movq	-80(%rbp), %rax                 ## 8-byte Reload
	movl	%r14d, 4(%rax)
	xorl	%r12d, %r12d
	jmp	LBB0_18
LBB0_21:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"data-lanes"

L_.str.1:                               ## @.str.1
	.asciz	"failed to find data lane mapping, using default\n"

L_.str.2:                               ## @.str.2
	.asciz	"bad number of data lanes\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
L_.str.3:                               ## @.str.3
	.asciz	"failed to read lane data\n"

	.comm	_supported_data_lane_swaps,8,3  ## @supported_data_lane_swaps
L_.str.4:                               ## @.str.4
	.asciz	"bad physical lane entry %u\n"

	.no_dead_strip	_dsi_host_parse_lane_data
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dsi_host_parse_lane_data
_dsi_host_parse_lane_data:              ; @dsi_host_parse_lane_data
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x22, x1
	mov	x20, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #40]
	ldr	x19, [x0, #8]
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	add	x2, sp, #20
	mov	x0, x22
	bl	_of_find_property
	cbz	x0, LBB0_4
; %bb.1:
	ldr	w8, [sp, #20]
	sub	w9, w8, #20
	cmn	w9, #17
	b.hi	LBB0_5
; %bb.2:
Lloh5:
	adrp	x1, l_.str.2@PAGE
Lloh6:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_DRM_DEV_ERROR
LBB0_3:
Lloh7:
	adrp	x8, _EINVAL@GOTPAGE
Lloh8:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	neg	w22, w8
	b	LBB0_7
LBB0_4:
Lloh10:
	adrp	x1, l_.str.1@PAGE
Lloh11:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_DRM_DEV_DEBUG
	mov	w22, #0
	b	LBB0_7
LBB0_5:
	asr	w21, w8, #2
	str	w21, [x20]
Lloh12:
	adrp	x1, l_.str@PAGE
Lloh13:
	add	x1, x1, l_.str@PAGEOFF
	add	x2, sp, #24
	mov	x0, x22
	mov	x3, x21
	bl	_of_property_read_u32_array
	cbz	w0, LBB0_9
; %bb.6:
	mov	x22, x0
Lloh14:
	adrp	x1, l_.str.3@PAGE
Lloh15:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
	bl	_DRM_DEV_ERROR
LBB0_7:
	ldr	x8, [sp, #40]
Lloh16:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh17:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh18:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_20
; %bb.8:
	mov	x0, x22
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
LBB0_9:
Lloh19:
	adrp	x23, _supported_data_lane_swaps@GOTPAGE
Lloh20:
	ldr	x23, [x23, _supported_data_lane_swaps@GOTPAGEOFF]
	ldr	x0, [x23]
	bl	_ARRAY_SIZE
	cmp	w0, #1
	b.lt	LBB0_3
; %bb.10:
	mov	x24, #0
	cmp	w21, #1
	csinc	w25, w21, wzr, gt
	add	x26, sp, #24
Lloh21:
	adrp	x22, l_.str.4@PAGE
Lloh22:
	add	x22, x22, l_.str.4@PAGEOFF
LBB0_11:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_12 Depth 2
	mov	x27, #0
	ldr	x8, [x23]
	ldr	x28, [x8, x24, lsl #3]
LBB0_12:                                ;   Parent Loop BB0_11 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	w8, [x26, x27, lsl #2]
	cmp	w8, #4
	b.lo	LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_12 Depth=2
	str	x8, [sp]
	mov	x0, x19
	mov	x1, x22
	bl	_DRM_DEV_ERROR
	ldr	w8, [x26, x27, lsl #2]
LBB0_14:                                ;   in Loop: Header=BB0_12 Depth=2
	ldr	w8, [x28, w8, sxtw #2]
	cmp	x27, x8
	b.ne	LBB0_17
; %bb.15:                               ;   in Loop: Header=BB0_12 Depth=2
	add	x27, x27, #1
	cmp	x25, x27
	b.ne	LBB0_12
; %bb.16:                               ;   in Loop: Header=BB0_11 Depth=1
	mov	x27, x25
LBB0_17:                                ;   in Loop: Header=BB0_11 Depth=1
	cmp	w27, w21
	b.eq	LBB0_19
; %bb.18:                               ;   in Loop: Header=BB0_11 Depth=1
	add	x24, x24, #1
	ldr	x0, [x23]
	bl	_ARRAY_SIZE
	cmp	x24, w0, sxtw
	b.lt	LBB0_11
	b	LBB0_3
LBB0_19:
	mov	w22, #0
	str	w24, [x20, #4]
	b	LBB0_7
LBB0_20:
	bl	___stack_chk_fail
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpAdd	Lloh21, Lloh22
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"data-lanes"

l_.str.1:                               ; @.str.1
	.asciz	"failed to find data lane mapping, using default\n"

l_.str.2:                               ; @.str.2
	.asciz	"bad number of data lanes\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
l_.str.3:                               ; @.str.3
	.asciz	"failed to read lane data\n"

	.comm	_supported_data_lane_swaps,8,3  ; @supported_data_lane_swaps
l_.str.4:                               ; @.str.4
	.asciz	"bad physical lane entry %u\n"

	.no_dead_strip	_dsi_host_parse_lane_data
.subsections_via_symbols
