	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function etnaviv_hw_specs
_etnaviv_hw_specs:                      ## @etnaviv_hw_specs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_chipMinorFeatures0_MORE_MINOR_FEATURES@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rdi)
	je	LBB0_3
## %bb.1:
	movq	_VIVS_HI_CHIP_SPECS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_gpu_read
	movl	%eax, %r13d
	movq	_VIVS_HI_CHIP_SPECS_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_gpu_read
	movl	%eax, %r12d
	movq	_VIVS_HI_CHIP_SPECS_3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_gpu_read
	movl	%eax, %r15d
	movq	_VIVS_HI_CHIP_SPECS_4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_gpu_read
	movl	%eax, %r14d
	movq	_VIVS_HI_CHIP_SPECS_STREAM_COUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edi
	callq	_etnaviv_field
	movl	%eax, 4(%rbx)
	movq	_VIVS_HI_CHIP_SPECS_REGISTER_MAX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edi
	callq	_etnaviv_field
	movl	%eax, 8(%rbx)
	movq	_VIVS_HI_CHIP_SPECS_THREAD_COUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edi
	callq	_etnaviv_field
	movl	%eax, 12(%rbx)
	movq	_VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edi
	callq	_etnaviv_field
	movl	%eax, 16(%rbx)
	movq	_VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edi
	callq	_etnaviv_field
	movl	%eax, 20(%rbx)
	movq	_VIVS_HI_CHIP_SPECS_PIXEL_PIPES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edi
	callq	_etnaviv_field
	movl	%eax, 24(%rbx)
	movq	_VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r13d, %edi
	callq	_etnaviv_field
	movl	%eax, 28(%rbx)
	movq	_VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r12d, %edi
	callq	_etnaviv_field
	movq	%rax, 56(%rbx)
	movq	_VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r12d, %edi
	callq	_etnaviv_field
	movl	%eax, 32(%rbx)
	movq	_VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r12d, %edi
	callq	_etnaviv_field
	movl	%eax, 36(%rbx)
	movq	_VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edi
	callq	_etnaviv_field
	movl	%eax, 40(%rbx)
	movq	_VIVS_HI_CHIP_SPECS_4_STREAM_COUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r14d, %edi
	callq	_etnaviv_field
	testl	%eax, %eax
	je	LBB0_3
## %bb.2:
	movl	%eax, 4(%rbx)
LBB0_3:
	cmpl	$0, 4(%rbx)
	jne	LBB0_5
## %bb.4:
	xorl	%eax, %eax
	cmpl	$4096, 44(%rbx)                 ## imm = 0x1000
	setge	%al
	leal	(%rax,%rax,2), %eax
	incl	%eax
	movl	%eax, 4(%rbx)
LBB0_5:
	movl	8(%rbx), %ecx
	testl	%ecx, %ecx
	je	LBB0_7
## %bb.6:
	movl	$1, %eax
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %eax
	jmp	LBB0_8
LBB0_7:
	movl	44(%rbx), %ecx
	movq	_chipModel_GC400@GOTPCREL(%rip), %rdx
	xorl	%eax, %eax
	cmpl	(%rdx), %ecx
	setne	%al
	shll	$5, %eax
	addl	$32, %eax
LBB0_8:
	movl	%eax, 8(%rbx)
	movl	12(%rbx), %ecx
	testl	%ecx, %ecx
	je	LBB0_10
## %bb.9:
	movl	$1, %eax
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %eax
	jmp	LBB0_12
LBB0_10:
	movl	44(%rbx), %ecx
	movq	_chipModel_GC400@GOTPCREL(%rip), %rdx
	movl	$64, %eax
	cmpl	(%rdx), %ecx
	je	LBB0_12
## %bb.11:
	movq	_chipModel_GC500@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ecx
	setne	%al
	movq	_chipModel_GC530@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	setne	%cl
	andb	%al, %cl
	movzbl	%cl, %eax
	shll	$7, %eax
	subl	$-128, %eax
LBB0_12:
	movl	%eax, 12(%rbx)
	cmpl	$0, 16(%rbx)
	je	LBB0_13
## %bb.14:
	cmpl	$0, 20(%rbx)
	je	LBB0_15
LBB0_16:
	cmpl	$0, 24(%rbx)
	je	LBB0_17
LBB0_18:
	movl	28(%rbx), %ecx
	testl	%ecx, %ecx
	je	LBB0_20
## %bb.19:
	movl	$1, %eax
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %eax
	jmp	LBB0_23
LBB0_13:
	movl	$8, 16(%rbx)
	cmpl	$0, 20(%rbx)
	jne	LBB0_16
LBB0_15:
	xorl	%eax, %eax
	cmpl	$4096, 44(%rbx)                 ## imm = 0x1000
	setge	%al
	incl	%eax
	movl	%eax, 20(%rbx)
	cmpl	$0, 24(%rbx)
	jne	LBB0_18
LBB0_17:
	movl	$1, 24(%rbx)
	jmp	LBB0_18
LBB0_20:
	movl	44(%rbx), %ecx
	movq	_chipModel_GC400@GOTPCREL(%rip), %rdx
	movl	$512, %eax                      ## imm = 0x200
	cmpl	(%rdx), %ecx
	jne	LBB0_23
## %bb.21:
	movl	48(%rbx), %ecx
	cmpl	$16384, %ecx                    ## imm = 0x4000
	jl	LBB0_23
## %bb.22:
	xorl	%eax, %eax
	cmpl	$16896, %ecx                    ## imm = 0x4200
	setb	%al
	shll	$7, %eax
	subl	$-128, %eax
LBB0_23:
	movl	%eax, 28(%rbx)
	movl	32(%rbx), %eax
	cmpl	$2, %eax
	je	LBB0_29
## %bb.24:
	cmpl	$1, %eax
	je	LBB0_25
## %bb.26:
	testl	%eax, %eax
	jne	LBB0_30
## %bb.27:
	movq	_GC2000@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$20744, %edx                    ## imm = 0x5108
	callq	_etnaviv_is_model_rev
	movl	$512, %ecx                      ## imm = 0x200
	testq	%rax, %rax
	jne	LBB0_31
## %bb.28:
	movl	44(%rbx), %eax
	movq	_chipModel_GC880@GOTPCREL(%rip), %rdx
	xorl	%ecx, %ecx
	cmpl	(%rdx), %eax
	sete	%cl
	shll	$8, %ecx
	addl	$256, %ecx                      ## imm = 0x100
	jmp	LBB0_31
LBB0_29:
	movl	$2048, %ecx                     ## imm = 0x800
	jmp	LBB0_31
LBB0_25:
	movl	$1024, %ecx                     ## imm = 0x400
	jmp	LBB0_31
LBB0_30:
	movl	$256, %ecx                      ## imm = 0x100
LBB0_31:
	movl	%ecx, 32(%rbx)
	cmpl	$0, 36(%rbx)
	je	LBB0_32
## %bb.33:
	cmpl	$0, 40(%rbx)
	je	LBB0_34
LBB0_35:
	movq	_GC5000@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$21556, %edx                    ## imm = 0x5434
	callq	_etnaviv_is_model_rev
	testq	%rax, %rax
	jne	LBB0_46
## %bb.36:
	movq	_GC4000@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$21026, %edx                    ## imm = 0x5222
	callq	_etnaviv_is_model_rev
	testq	%rax, %rax
	jne	LBB0_46
## %bb.37:
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$21061, %edx                    ## imm = 0x5245
	callq	_etnaviv_is_model_rev
	testq	%rax, %rax
	jne	LBB0_46
## %bb.38:
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$21000, %edx                    ## imm = 0x5208
	callq	_etnaviv_is_model_rev
	testq	%rax, %rax
	jne	LBB0_46
## %bb.39:
	movq	_GC3000@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$21557, %edx                    ## imm = 0x5435
	callq	_etnaviv_is_model_rev
	testq	%rax, %rax
	jne	LBB0_46
## %bb.40:
	movq	_GC2200@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$21060, %edx                    ## imm = 0x5244
	callq	_etnaviv_is_model_rev
	testq	%rax, %rax
	jne	LBB0_46
## %bb.41:
	movq	_GC2100@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$20744, %edx                    ## imm = 0x5108
	callq	_etnaviv_is_model_rev
	testq	%rax, %rax
	jne	LBB0_46
## %bb.42:
	movq	_GC2000@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$20744, %edx                    ## imm = 0x5108
	callq	_etnaviv_is_model_rev
	testq	%rax, %rax
	jne	LBB0_46
## %bb.43:
	movq	_GC1500@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$21062, %edx                    ## imm = 0x5246
	callq	_etnaviv_is_model_rev
	testq	%rax, %rax
	jne	LBB0_46
## %bb.44:
	movq	_GC880@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$20743, %edx                    ## imm = 0x5107
	callq	_etnaviv_is_model_rev
	testq	%rax, %rax
	jne	LBB0_46
## %bb.45:
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$20742, %edx                    ## imm = 0x5106
	callq	_etnaviv_is_model_rev
	testq	%rax, %rax
	je	LBB0_47
LBB0_46:
	decl	40(%rbx)
LBB0_47:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_32:
	movl	$168, 36(%rbx)
	cmpl	$0, 40(%rbx)
	jne	LBB0_35
LBB0_34:
	movq	_chipMinorFeatures1_HALTI0@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	andl	52(%rbx), %eax
	setne	%cl
	leal	8(,%rcx,4), %eax
	movl	%eax, 40(%rbx)
	jmp	LBB0_35
	.cfi_endproc
                                        ## -- End function
	.comm	_chipMinorFeatures0_MORE_MINOR_FEATURES,4,2 ## @chipMinorFeatures0_MORE_MINOR_FEATURES
	.comm	_VIVS_HI_CHIP_SPECS,4,2         ## @VIVS_HI_CHIP_SPECS
	.comm	_VIVS_HI_CHIP_SPECS_2,4,2       ## @VIVS_HI_CHIP_SPECS_2
	.comm	_VIVS_HI_CHIP_SPECS_3,4,2       ## @VIVS_HI_CHIP_SPECS_3
	.comm	_VIVS_HI_CHIP_SPECS_4,4,2       ## @VIVS_HI_CHIP_SPECS_4
	.comm	_VIVS_HI_CHIP_SPECS_STREAM_COUNT,4,2 ## @VIVS_HI_CHIP_SPECS_STREAM_COUNT
	.comm	_VIVS_HI_CHIP_SPECS_REGISTER_MAX,4,2 ## @VIVS_HI_CHIP_SPECS_REGISTER_MAX
	.comm	_VIVS_HI_CHIP_SPECS_THREAD_COUNT,4,2 ## @VIVS_HI_CHIP_SPECS_THREAD_COUNT
	.comm	_VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE,4,2 ## @VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE
	.comm	_VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT,4,2 ## @VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT
	.comm	_VIVS_HI_CHIP_SPECS_PIXEL_PIPES,4,2 ## @VIVS_HI_CHIP_SPECS_PIXEL_PIPES
	.comm	_VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE,4,2 ## @VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE
	.comm	_VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE,4,2 ## @VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE
	.comm	_VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT,4,2 ## @VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT
	.comm	_VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS,4,2 ## @VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS
	.comm	_VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT,4,2 ## @VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT
	.comm	_VIVS_HI_CHIP_SPECS_4_STREAM_COUNT,4,2 ## @VIVS_HI_CHIP_SPECS_4_STREAM_COUNT
	.comm	_chipModel_GC400,4,2            ## @chipModel_GC400
	.comm	_chipModel_GC500,4,2            ## @chipModel_GC500
	.comm	_chipModel_GC530,4,2            ## @chipModel_GC530
	.comm	_GC2000,4,2                     ## @GC2000
	.comm	_chipModel_GC880,4,2            ## @chipModel_GC880
	.comm	_chipMinorFeatures1_HALTI0,4,2  ## @chipMinorFeatures1_HALTI0
	.comm	_GC5000,4,2                     ## @GC5000
	.comm	_GC4000,4,2                     ## @GC4000
	.comm	_GC3000,4,2                     ## @GC3000
	.comm	_GC2200,4,2                     ## @GC2200
	.comm	_GC2100,4,2                     ## @GC2100
	.comm	_GC1500,4,2                     ## @GC1500
	.comm	_GC880,4,2                      ## @GC880
	.no_dead_strip	_etnaviv_hw_specs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function etnaviv_hw_specs
_etnaviv_hw_specs:                      ; @etnaviv_hw_specs
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _chipMinorFeatures0_MORE_MINOR_FEATURES@GOTPAGE
Lloh1:
	ldr	x9, [x9, _chipMinorFeatures0_MORE_MINOR_FEATURES@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.1:
Lloh3:
	adrp	x8, _VIVS_HI_CHIP_SPECS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_gpu_read
	mov	x23, x0
Lloh6:
	adrp	x8, _VIVS_HI_CHIP_SPECS_2@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_2@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_gpu_read
	mov	x22, x0
Lloh9:
	adrp	x8, _VIVS_HI_CHIP_SPECS_3@GOTPAGE
Lloh10:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_3@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_gpu_read
	mov	x21, x0
Lloh12:
	adrp	x8, _VIVS_HI_CHIP_SPECS_4@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_4@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_gpu_read
	mov	x20, x0
Lloh15:
	adrp	x8, _VIVS_HI_CHIP_SPECS_STREAM_COUNT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_STREAM_COUNT@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_etnaviv_field
	str	w0, [x19, #4]
Lloh18:
	adrp	x8, _VIVS_HI_CHIP_SPECS_REGISTER_MAX@GOTPAGE
Lloh19:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_REGISTER_MAX@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_etnaviv_field
	str	w0, [x19, #8]
Lloh21:
	adrp	x8, _VIVS_HI_CHIP_SPECS_THREAD_COUNT@GOTPAGE
Lloh22:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_THREAD_COUNT@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_etnaviv_field
	str	w0, [x19, #12]
Lloh24:
	adrp	x8, _VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_etnaviv_field
	str	w0, [x19, #16]
Lloh27:
	adrp	x8, _VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT@GOTPAGE
Lloh28:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_etnaviv_field
	str	w0, [x19, #20]
Lloh30:
	adrp	x8, _VIVS_HI_CHIP_SPECS_PIXEL_PIPES@GOTPAGE
Lloh31:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_PIXEL_PIPES@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_etnaviv_field
	str	w0, [x19, #24]
Lloh33:
	adrp	x8, _VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE@GOTPAGE
Lloh34:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_etnaviv_field
	str	w0, [x19, #28]
Lloh36:
	adrp	x8, _VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE@GOTPAGE
Lloh37:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mov	x0, x22
	bl	_etnaviv_field
	str	x0, [x19, #56]
Lloh39:
	adrp	x8, _VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT@GOTPAGE
Lloh40:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
	mov	x0, x22
	bl	_etnaviv_field
	str	w0, [x19, #32]
Lloh42:
	adrp	x8, _VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS@GOTPAGE
Lloh43:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
	mov	x0, x22
	bl	_etnaviv_field
	str	w0, [x19, #36]
Lloh45:
	adrp	x8, _VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT@GOTPAGE
Lloh46:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_etnaviv_field
	str	w0, [x19, #40]
Lloh48:
	adrp	x8, _VIVS_HI_CHIP_SPECS_4_STREAM_COUNT@GOTPAGE
Lloh49:
	ldr	x8, [x8, _VIVS_HI_CHIP_SPECS_4_STREAM_COUNT@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_etnaviv_field
	cbz	w0, LBB0_3
; %bb.2:
	str	w0, [x19, #4]
LBB0_3:
	ldr	w8, [x19, #4]
	cbz	w8, LBB0_6
; %bb.4:
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_7
LBB0_5:
	mov	w9, #1
	lsl	w8, w9, w8
	b	LBB0_8
LBB0_6:
	ldr	w8, [x19, #44]
	cmp	w8, #4095
	mov	w8, #4
	csinc	w8, w8, wzr, gt
	str	w8, [x19, #4]
	ldr	w8, [x19, #8]
	cbnz	w8, LBB0_5
LBB0_7:
Lloh51:
	adrp	x8, _chipModel_GC400@GOTPAGE
Lloh52:
	ldr	x8, [x8, _chipModel_GC400@GOTPAGEOFF]
	ldr	w9, [x19, #44]
Lloh53:
	ldr	w8, [x8]
	mov	w10, #64
	mov	w11, #32
	cmp	w9, w8
	csel	w8, w11, w10, eq
LBB0_8:
	str	w8, [x19, #8]
	ldr	w8, [x19, #12]
	cbz	w8, LBB0_10
; %bb.9:
	mov	w9, #1
	lsl	w8, w9, w8
	b	LBB0_13
LBB0_10:
	ldr	w8, [x19, #44]
Lloh54:
	adrp	x9, _chipModel_GC400@GOTPAGE
Lloh55:
	ldr	x9, [x9, _chipModel_GC400@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_12
; %bb.11:
	mov	w8, #64
	b	LBB0_13
LBB0_12:
Lloh57:
	adrp	x9, _chipModel_GC500@GOTPAGE
Lloh58:
	ldr	x9, [x9, _chipModel_GC500@GOTPAGEOFF]
Lloh59:
	ldr	w9, [x9]
Lloh60:
	adrp	x10, _chipModel_GC530@GOTPAGE
Lloh61:
	ldr	x10, [x10, _chipModel_GC530@GOTPAGEOFF]
Lloh62:
	ldr	w10, [x10]
	cmp	w8, w10
	ccmp	w8, w9, #4, ne
	mov	w8, #256
	mov	w9, #128
	csel	w8, w9, w8, eq
LBB0_13:
	str	w8, [x19, #12]
	ldr	w8, [x19, #16]
	cbz	w8, LBB0_18
; %bb.14:
	ldr	w8, [x19, #20]
	cbz	w8, LBB0_19
LBB0_15:
	ldr	w8, [x19, #24]
	cbz	w8, LBB0_20
LBB0_16:
	ldr	w8, [x19, #28]
	cbz	w8, LBB0_21
LBB0_17:
	mov	w9, #1
	lsl	w8, w9, w8
	b	LBB0_25
LBB0_18:
	mov	w8, #8
	str	w8, [x19, #16]
	ldr	w8, [x19, #20]
	cbnz	w8, LBB0_15
LBB0_19:
	ldr	w8, [x19, #44]
	cmp	w8, #4095
	mov	w8, #1
	cinc	w8, w8, gt
	str	w8, [x19, #20]
	ldr	w8, [x19, #24]
	cbnz	w8, LBB0_16
LBB0_20:
	mov	w8, #1
	str	w8, [x19, #24]
	ldr	w8, [x19, #28]
	cbnz	w8, LBB0_17
LBB0_21:
	ldr	w8, [x19, #44]
Lloh63:
	adrp	x9, _chipModel_GC400@GOTPAGE
Lloh64:
	ldr	x9, [x9, _chipModel_GC400@GOTPAGEOFF]
Lloh65:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_23
; %bb.22:
	ldr	w8, [x19, #48]
	cmp	w8, #4, lsl #12                 ; =16384
	b.ge	LBB0_24
LBB0_23:
	mov	w8, #512
	b	LBB0_25
LBB0_24:
	lsr	w8, w8, #9
	mov	w9, #128
	mov	w10, #256
	cmp	w8, #33
	csel	w8, w10, w9, lo
LBB0_25:
	str	w8, [x19, #28]
	ldr	w8, [x19, #32]
	cmp	w8, #2
	b.eq	LBB0_30
; %bb.26:
	cmp	w8, #1
	b.eq	LBB0_31
; %bb.27:
	cbnz	w8, LBB0_32
; %bb.28:
Lloh66:
	adrp	x8, _GC2000@GOTPAGE
Lloh67:
	ldr	x8, [x8, _GC2000@GOTPAGEOFF]
Lloh68:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #20744
	bl	_etnaviv_is_model_rev
	mov	w8, #512
	cbnz	x0, LBB0_33
; %bb.29:
	ldr	w9, [x19, #44]
Lloh69:
	adrp	x10, _chipModel_GC880@GOTPAGE
Lloh70:
	ldr	x10, [x10, _chipModel_GC880@GOTPAGEOFF]
Lloh71:
	ldr	w10, [x10]
	mov	w11, #256
	cmp	w9, w10
	csel	w8, w8, w11, eq
	b	LBB0_33
LBB0_30:
	mov	w8, #2048
	b	LBB0_33
LBB0_31:
	mov	w8, #1024
	b	LBB0_33
LBB0_32:
	mov	w8, #256
LBB0_33:
	str	w8, [x19, #32]
	ldr	w8, [x19, #36]
	cbz	w8, LBB0_48
; %bb.34:
	ldr	w8, [x19, #40]
	cbz	w8, LBB0_49
LBB0_35:
Lloh72:
	adrp	x8, _GC5000@GOTPAGE
Lloh73:
	ldr	x8, [x8, _GC5000@GOTPAGEOFF]
Lloh74:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #21556
	bl	_etnaviv_is_model_rev
	cbnz	x0, LBB0_46
; %bb.36:
Lloh75:
	adrp	x20, _GC4000@GOTPAGE
Lloh76:
	ldr	x20, [x20, _GC4000@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #21026
	bl	_etnaviv_is_model_rev
	cbnz	x0, LBB0_46
; %bb.37:
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #21061
	bl	_etnaviv_is_model_rev
	cbnz	x0, LBB0_46
; %bb.38:
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #21000
	bl	_etnaviv_is_model_rev
	cbnz	x0, LBB0_46
; %bb.39:
Lloh77:
	adrp	x8, _GC3000@GOTPAGE
Lloh78:
	ldr	x8, [x8, _GC3000@GOTPAGEOFF]
Lloh79:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #21557
	bl	_etnaviv_is_model_rev
	cbnz	x0, LBB0_46
; %bb.40:
Lloh80:
	adrp	x8, _GC2200@GOTPAGE
Lloh81:
	ldr	x8, [x8, _GC2200@GOTPAGEOFF]
Lloh82:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #21060
	bl	_etnaviv_is_model_rev
	cbnz	x0, LBB0_46
; %bb.41:
Lloh83:
	adrp	x8, _GC2100@GOTPAGE
Lloh84:
	ldr	x8, [x8, _GC2100@GOTPAGEOFF]
Lloh85:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #20744
	bl	_etnaviv_is_model_rev
	cbnz	x0, LBB0_46
; %bb.42:
Lloh86:
	adrp	x8, _GC2000@GOTPAGE
Lloh87:
	ldr	x8, [x8, _GC2000@GOTPAGEOFF]
Lloh88:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #20744
	bl	_etnaviv_is_model_rev
	cbnz	x0, LBB0_46
; %bb.43:
Lloh89:
	adrp	x8, _GC1500@GOTPAGE
Lloh90:
	ldr	x8, [x8, _GC1500@GOTPAGEOFF]
Lloh91:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #21062
	bl	_etnaviv_is_model_rev
	cbnz	x0, LBB0_46
; %bb.44:
Lloh92:
	adrp	x20, _GC880@GOTPAGE
Lloh93:
	ldr	x20, [x20, _GC880@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #20743
	bl	_etnaviv_is_model_rev
	cbnz	x0, LBB0_46
; %bb.45:
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #20742
	bl	_etnaviv_is_model_rev
	cbz	x0, LBB0_47
LBB0_46:
	ldr	w8, [x19, #40]
	sub	w8, w8, #1
	str	w8, [x19, #40]
LBB0_47:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_48:
	mov	w8, #168
	str	w8, [x19, #36]
	ldr	w8, [x19, #40]
	cbnz	w8, LBB0_35
LBB0_49:
	ldr	w8, [x19, #52]
Lloh94:
	adrp	x9, _chipMinorFeatures1_HALTI0@GOTPAGE
Lloh95:
	ldr	x9, [x9, _chipMinorFeatures1_HALTI0@GOTPAGEOFF]
Lloh96:
	ldr	w9, [x9]
	tst	w9, w8
	mov	w8, #12
	mov	w9, #8
	csel	w8, w9, w8, eq
	str	w8, [x19, #40]
	b	LBB0_35
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGot	Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.cfi_endproc
                                        ; -- End function
	.comm	_chipMinorFeatures0_MORE_MINOR_FEATURES,4,2 ; @chipMinorFeatures0_MORE_MINOR_FEATURES
	.comm	_VIVS_HI_CHIP_SPECS,4,2         ; @VIVS_HI_CHIP_SPECS
	.comm	_VIVS_HI_CHIP_SPECS_2,4,2       ; @VIVS_HI_CHIP_SPECS_2
	.comm	_VIVS_HI_CHIP_SPECS_3,4,2       ; @VIVS_HI_CHIP_SPECS_3
	.comm	_VIVS_HI_CHIP_SPECS_4,4,2       ; @VIVS_HI_CHIP_SPECS_4
	.comm	_VIVS_HI_CHIP_SPECS_STREAM_COUNT,4,2 ; @VIVS_HI_CHIP_SPECS_STREAM_COUNT
	.comm	_VIVS_HI_CHIP_SPECS_REGISTER_MAX,4,2 ; @VIVS_HI_CHIP_SPECS_REGISTER_MAX
	.comm	_VIVS_HI_CHIP_SPECS_THREAD_COUNT,4,2 ; @VIVS_HI_CHIP_SPECS_THREAD_COUNT
	.comm	_VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE,4,2 ; @VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE
	.comm	_VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT,4,2 ; @VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT
	.comm	_VIVS_HI_CHIP_SPECS_PIXEL_PIPES,4,2 ; @VIVS_HI_CHIP_SPECS_PIXEL_PIPES
	.comm	_VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE,4,2 ; @VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE
	.comm	_VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE,4,2 ; @VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE
	.comm	_VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT,4,2 ; @VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT
	.comm	_VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS,4,2 ; @VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS
	.comm	_VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT,4,2 ; @VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT
	.comm	_VIVS_HI_CHIP_SPECS_4_STREAM_COUNT,4,2 ; @VIVS_HI_CHIP_SPECS_4_STREAM_COUNT
	.comm	_chipModel_GC400,4,2            ; @chipModel_GC400
	.comm	_chipModel_GC500,4,2            ; @chipModel_GC500
	.comm	_chipModel_GC530,4,2            ; @chipModel_GC530
	.comm	_GC2000,4,2                     ; @GC2000
	.comm	_chipModel_GC880,4,2            ; @chipModel_GC880
	.comm	_chipMinorFeatures1_HALTI0,4,2  ; @chipMinorFeatures1_HALTI0
	.comm	_GC5000,4,2                     ; @GC5000
	.comm	_GC4000,4,2                     ; @GC4000
	.comm	_GC3000,4,2                     ; @GC3000
	.comm	_GC2200,4,2                     ; @GC2200
	.comm	_GC2100,4,2                     ; @GC2100
	.comm	_GC1500,4,2                     ; @GC1500
	.comm	_GC880,4,2                      ; @GC880
	.no_dead_strip	_etnaviv_hw_specs
.subsections_via_symbols
