	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_dma_ring_emit_ib
_si_dma_ring_emit_ib:                   ## @si_dma_ring_emit_ib
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	callq	_AMDGPU_JOB_GET_VMID
	movl	%eax, %r15d
	movl	(%rbx), %edi
	callq	_lower_32_bits
	andl	$7, %eax
	cmpl	$5, %eax
	je	LBB0_3
## %bb.1:
	movq	_DMA_PACKET_NOP@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_DMA_PACKET
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	(%rbx), %edi
	callq	_lower_32_bits
	andl	$7, %eax
	cmpl	$5, %eax
	jne	LBB0_2
LBB0_3:
	movq	_DMA_PACKET_INDIRECT_BUFFER@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	xorl	%edx, %edx
	callq	_DMA_IB_PACKET
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	(%r14), %esi
	andl	$-32, %esi
	movq	%rbx, %rdi
	callq	_amdgpu_ring_write
	movl	(%r14), %edi
	movl	4(%r14), %r14d
	shll	$12, %r14d
	callq	_upper_32_bits
	movzbl	%al, %esi
	orl	%r14d, %esi
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DMA_PACKET_NOP,4,2             ## @DMA_PACKET_NOP
	.comm	_DMA_PACKET_INDIRECT_BUFFER,4,2 ## @DMA_PACKET_INDIRECT_BUFFER
	.no_dead_strip	_si_dma_ring_emit_ib
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_dma_ring_emit_ib
_si_dma_ring_emit_ib:                   ; @si_dma_ring_emit_ib
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x19, x0
	mov	x0, x1
	bl	_AMDGPU_JOB_GET_VMID
	mov	x21, x0
	ldr	w0, [x19]
	bl	_lower_32_bits
	and	w8, w0, #0x7
	cmp	w8, #5
	b.eq	LBB0_3
; %bb.1:
Lloh0:
	adrp	x22, _DMA_PACKET_NOP@GOTPAGE
Lloh1:
	ldr	x22, [x22, _DMA_PACKET_NOP@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x22]
	mov	w1, #0
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	bl	_DMA_PACKET
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w0, [x19]
	bl	_lower_32_bits
	and	w8, w0, #0x7
	cmp	w8, #5
	b.ne	LBB0_2
LBB0_3:
Lloh2:
	adrp	x8, _DMA_PACKET_INDIRECT_BUFFER@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DMA_PACKET_INDIRECT_BUFFER@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	mov	x1, x21
	mov	w2, #0
	bl	_DMA_IB_PACKET
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w8, [x20]
	and	w1, w8, #0xffffffe0
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldp	w0, w21, [x20]
	bl	_upper_32_bits
	and	w1, w0, #0xff
	bfi	w1, w21, #12, #20
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_DMA_PACKET_NOP,4,2             ; @DMA_PACKET_NOP
	.comm	_DMA_PACKET_INDIRECT_BUFFER,4,2 ; @DMA_PACKET_INDIRECT_BUFFER
	.no_dead_strip	_si_dma_ring_emit_ib
.subsections_via_symbols
