	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sun4i_tcon0_mode_set_cpu
_sun4i_tcon0_mode_set_cpu:              ## @sun4i_tcon0_mode_set_cpu
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r13
	movq	%rdi, %r12
	movq	%rsi, %rdi
	callq	_encoder_to_sun6i_dsi
	movq	(%rax), %rbx
	movl	4(%rbx), %edi
	callq	_mipi_dsi_pixel_format_to_bpp
	movl	%eax, %r15d
	movl	(%rbx), %ebx
	movq	_SUN6I_DSI_TCON_DIV@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 16(%r12)
	movq	%rax, 8(%r12)
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_sun4i_tcon0_mode_set_common
	movq	%r13, %rdi
	callq	_sun4i_tcon_get_connector
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_sun4i_tcon0_mode_set_dithering
	movl	(%r12), %edi
	movq	_SUN4I_TCON0_CTL_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SUN4I_TCON0_CTL_IF_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_SUN4I_TCON0_CTL_IF_8080@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	callq	_regmap_update_bits
	movl	(%r12), %edi
	movq	_SUN4I_TCON_ECC_FIFO_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SUN4I_TCON_ECC_FIFO_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_regmap_write
	movl	(%r12), %edi
	movq	_SUN4I_TCON0_CPU_IF_MODE_DSI@GOTPCREL(%rip), %rax
	movq	_SUN4I_TCON0_CPU_IF_TRI_FIFO_FLUSH@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_SUN4I_TCON0_CPU_IF_REG@GOTPCREL(%rip), %rax
	movq	_SUN4I_TCON0_CPU_IF_TRI_FIFO_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_SUN4I_TCON0_CPU_IF_TRI_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	callq	_regmap_write
	movl	(%r12), %edi
	movq	_SUN4I_TCON0_DCLK_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	callq	_regmap_read
	movl	$6, %edi
	xorl	%esi, %esi
	callq	_GENMASK
	movl	%eax, %ecx
	andl	-44(%rbp), %ecx
	movl	%ecx, -44(%rbp)
	imull	(%r14), %r15d
	imull	%ebx, %ecx
	movl	%r15d, %eax
	cltd
	idivl	%ecx
                                        ## kill: def $eax killed $eax def $rax
	subl	24(%r14), %eax
	leal	-40(%rax), %edi
	movl	(%r12), %r15d
	movq	_SUN4I_TCON0_CPU_TRI0_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	callq	_SUN4I_TCON0_CPU_TRI0_BLOCK_SPACE
	movl	%eax, %ebx
	movq	24(%r14), %rdi
	callq	_SUN4I_TCON0_CPU_TRI0_BLOCK_SIZE
	orl	%eax, %ebx
	movl	%r15d, %edi
	movl	%r13d, %esi
	movl	%ebx, %edx
	callq	_regmap_write
	movl	(%r12), %r15d
	movq	_SUN4I_TCON0_CPU_TRI1_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	20(%r14), %edi
	callq	_SUN4I_TCON0_CPU_TRI1_BLOCK_NUM
	movl	%r15d, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_regmap_write
	movl	4(%r14), %eax
	subl	8(%r14), %eax
	addl	$-11, %eax
	imull	12(%r14), %eax
	imull	$149, %eax, %eax
	movslq	16(%r14), %rcx
	imulq	$274877907, %rcx, %rcx          ## imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	cltd
	idivl	%ecx
                                        ## kill: def $eax killed $eax def $rax
	leal	7(%rax), %ebx
	testl	%eax, %eax
	cmovnsl	%eax, %ebx
	sarl	$3, %ebx
	movl	(%r12), %r14d
	movq	_SUN4I_TCON0_CPU_TRI2_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	$10, %edi
	callq	_SUN4I_TCON0_CPU_TRI2_TRANS_START_SET
	movl	%eax, %r13d
	movl	%ebx, %edi
	callq	_SUN4I_TCON0_CPU_TRI2_START_DELAY
	orl	%eax, %r13d
	movl	%r14d, %edi
	movl	%r15d, %esi
	movl	%r13d, %edx
	callq	_regmap_write
	movl	(%r12), %r14d
	movq	_SUN4I_TCON_SAFE_PERIOD_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	$3000, %edi                     ## imm = 0xBB8
	callq	_SUN4I_TCON_SAFE_PERIOD_NUM
	movl	%eax, %ebx
	movl	$3, %edi
	callq	_SUN4I_TCON_SAFE_PERIOD_MODE
	orl	%eax, %ebx
	movl	%r14d, %edi
	movl	%r15d, %esi
	movl	%ebx, %edx
	callq	_regmap_write
	movl	(%r12), %edi
	movq	_SUN4I_TCON0_IO_TRI_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$-536870912, %edx               ## imm = 0xE0000000
	callq	_regmap_write
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SUN6I_DSI_TCON_DIV,8,3         ## @SUN6I_DSI_TCON_DIV
	.comm	_SUN4I_TCON0_CTL_REG,4,2        ## @SUN4I_TCON0_CTL_REG
	.comm	_SUN4I_TCON0_CTL_IF_MASK,4,2    ## @SUN4I_TCON0_CTL_IF_MASK
	.comm	_SUN4I_TCON0_CTL_IF_8080,4,2    ## @SUN4I_TCON0_CTL_IF_8080
	.comm	_SUN4I_TCON_ECC_FIFO_REG,4,2    ## @SUN4I_TCON_ECC_FIFO_REG
	.comm	_SUN4I_TCON_ECC_FIFO_EN,4,2     ## @SUN4I_TCON_ECC_FIFO_EN
	.comm	_SUN4I_TCON0_CPU_IF_REG,4,2     ## @SUN4I_TCON0_CPU_IF_REG
	.comm	_SUN4I_TCON0_CPU_IF_MODE_DSI,4,2 ## @SUN4I_TCON0_CPU_IF_MODE_DSI
	.comm	_SUN4I_TCON0_CPU_IF_TRI_FIFO_FLUSH,4,2 ## @SUN4I_TCON0_CPU_IF_TRI_FIFO_FLUSH
	.comm	_SUN4I_TCON0_CPU_IF_TRI_FIFO_EN,4,2 ## @SUN4I_TCON0_CPU_IF_TRI_FIFO_EN
	.comm	_SUN4I_TCON0_CPU_IF_TRI_EN,4,2  ## @SUN4I_TCON0_CPU_IF_TRI_EN
	.comm	_SUN4I_TCON0_DCLK_REG,4,2       ## @SUN4I_TCON0_DCLK_REG
	.comm	_SUN4I_TCON0_CPU_TRI0_REG,4,2   ## @SUN4I_TCON0_CPU_TRI0_REG
	.comm	_SUN4I_TCON0_CPU_TRI1_REG,4,2   ## @SUN4I_TCON0_CPU_TRI1_REG
	.comm	_SUN4I_TCON0_CPU_TRI2_REG,4,2   ## @SUN4I_TCON0_CPU_TRI2_REG
	.comm	_SUN4I_TCON_SAFE_PERIOD_REG,4,2 ## @SUN4I_TCON_SAFE_PERIOD_REG
	.comm	_SUN4I_TCON0_IO_TRI_REG,4,2     ## @SUN4I_TCON0_IO_TRI_REG
	.no_dead_strip	_sun4i_tcon0_mode_set_cpu
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sun4i_tcon0_mode_set_cpu
_sun4i_tcon0_mode_set_cpu:              ; @sun4i_tcon0_mode_set_cpu
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x2
	mov	x22, x1
	mov	x19, x0
	mov	x0, x1
	bl	_encoder_to_sun6i_dsi
	ldr	x23, [x0]
	ldr	w0, [x23, #4]
	bl	_mipi_dsi_pixel_format_to_bpp
	mov	x21, x0
	ldr	w23, [x23]
Lloh0:
	adrp	x8, _SUN6I_DSI_TCON_DIV@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SUN6I_DSI_TCON_DIV@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	stp	x8, x8, [x19, #8]
	mov	x0, x19
	mov	x1, x20
	bl	_sun4i_tcon0_mode_set_common
	mov	x0, x22
	bl	_sun4i_tcon_get_connector
	mov	x1, x0
	mov	x0, x19
	bl	_sun4i_tcon0_mode_set_dithering
	ldr	w0, [x19]
Lloh3:
	adrp	x8, _SUN4I_TCON0_CTL_REG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SUN4I_TCON0_CTL_REG@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
Lloh6:
	adrp	x8, _SUN4I_TCON0_CTL_IF_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SUN4I_TCON0_CTL_IF_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
Lloh9:
	adrp	x8, _SUN4I_TCON0_CTL_IF_8080@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SUN4I_TCON0_CTL_IF_8080@GOTPAGEOFF]
Lloh11:
	ldr	w3, [x8]
	bl	_regmap_update_bits
	ldr	w0, [x19]
Lloh12:
	adrp	x8, _SUN4I_TCON_ECC_FIFO_REG@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SUN4I_TCON_ECC_FIFO_REG@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
Lloh15:
	adrp	x8, _SUN4I_TCON_ECC_FIFO_EN@GOTPAGE
Lloh16:
	ldr	x8, [x8, _SUN4I_TCON_ECC_FIFO_EN@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	bl	_regmap_write
	ldr	w0, [x19]
Lloh18:
	adrp	x8, _SUN4I_TCON0_CPU_IF_REG@GOTPAGE
Lloh19:
	ldr	x8, [x8, _SUN4I_TCON0_CPU_IF_REG@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
Lloh21:
	adrp	x8, _SUN4I_TCON0_CPU_IF_MODE_DSI@GOTPAGE
Lloh22:
	ldr	x8, [x8, _SUN4I_TCON0_CPU_IF_MODE_DSI@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
Lloh24:
	adrp	x9, _SUN4I_TCON0_CPU_IF_TRI_FIFO_FLUSH@GOTPAGE
Lloh25:
	ldr	x9, [x9, _SUN4I_TCON0_CPU_IF_TRI_FIFO_FLUSH@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh27:
	adrp	x9, _SUN4I_TCON0_CPU_IF_TRI_FIFO_EN@GOTPAGE
Lloh28:
	ldr	x9, [x9, _SUN4I_TCON0_CPU_IF_TRI_FIFO_EN@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh30:
	adrp	x9, _SUN4I_TCON0_CPU_IF_TRI_EN@GOTPAGE
Lloh31:
	ldr	x9, [x9, _SUN4I_TCON0_CPU_IF_TRI_EN@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	orr	w2, w8, w9
	bl	_regmap_write
	ldr	w0, [x19]
Lloh33:
	adrp	x8, _SUN4I_TCON0_DCLK_REG@GOTPAGE
Lloh34:
	ldr	x8, [x8, _SUN4I_TCON0_DCLK_REG@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	add	x2, sp, #12
	bl	_regmap_read
	mov	w0, #6
	mov	w1, #0
	bl	_GENMASK
	ldr	w8, [sp, #12]
	and	w8, w8, w0
	str	w8, [sp, #12]
	ldr	w9, [x20]
	mul	w9, w9, w21
	mul	w8, w8, w23
	sdiv	w8, w9, w8
	ldr	w9, [x20, #24]
	sub	w8, w8, w9
	sub	w0, w8, #40
	ldr	w21, [x19]
Lloh36:
	adrp	x8, _SUN4I_TCON0_CPU_TRI0_REG@GOTPAGE
Lloh37:
	ldr	x8, [x8, _SUN4I_TCON0_CPU_TRI0_REG@GOTPAGEOFF]
Lloh38:
	ldr	w22, [x8]
	bl	_SUN4I_TCON0_CPU_TRI0_BLOCK_SPACE
	mov	x23, x0
	ldr	x0, [x20, #24]
	bl	_SUN4I_TCON0_CPU_TRI0_BLOCK_SIZE
	orr	w2, w0, w23
	mov	x0, x21
	mov	x1, x22
	bl	_regmap_write
	ldr	w21, [x19]
Lloh39:
	adrp	x8, _SUN4I_TCON0_CPU_TRI1_REG@GOTPAGE
Lloh40:
	ldr	x8, [x8, _SUN4I_TCON0_CPU_TRI1_REG@GOTPAGEOFF]
Lloh41:
	ldr	w22, [x8]
	ldr	w0, [x20, #20]
	bl	_SUN4I_TCON0_CPU_TRI1_BLOCK_NUM
	mov	x2, x0
	mov	x0, x21
	mov	x1, x22
	bl	_regmap_write
	ldp	w8, w9, [x20, #4]
	sub	w8, w8, w9
	sub	w8, w8, #11
	ldp	w9, w10, [x20, #12]
                                        ; kill: def $w10 killed $w10 def $x10
	sxtw	x10, w10
	mul	w8, w9, w8
	mov	w9, #149
	mul	w8, w8, w9
	mov	w9, #19923
	movk	w9, #4194, lsl #16
	mul	x9, x10, x9
	lsr	x10, x9, #63
	asr	x9, x9, #38
	add	w9, w9, w10
	sdiv	w8, w8, w9
	add	w9, w8, #7
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w20, w8, #3
	ldr	w21, [x19]
Lloh42:
	adrp	x8, _SUN4I_TCON0_CPU_TRI2_REG@GOTPAGE
Lloh43:
	ldr	x8, [x8, _SUN4I_TCON0_CPU_TRI2_REG@GOTPAGEOFF]
Lloh44:
	ldr	w22, [x8]
	mov	w0, #10
	bl	_SUN4I_TCON0_CPU_TRI2_TRANS_START_SET
	mov	x23, x0
	mov	x0, x20
	bl	_SUN4I_TCON0_CPU_TRI2_START_DELAY
	orr	w2, w0, w23
	mov	x0, x21
	mov	x1, x22
	bl	_regmap_write
	ldr	w20, [x19]
Lloh45:
	adrp	x8, _SUN4I_TCON_SAFE_PERIOD_REG@GOTPAGE
Lloh46:
	ldr	x8, [x8, _SUN4I_TCON_SAFE_PERIOD_REG@GOTPAGEOFF]
Lloh47:
	ldr	w21, [x8]
	mov	w0, #3000
	bl	_SUN4I_TCON_SAFE_PERIOD_NUM
	mov	x22, x0
	mov	w0, #3
	bl	_SUN4I_TCON_SAFE_PERIOD_MODE
	orr	w2, w0, w22
	mov	x0, x20
	mov	x1, x21
	bl	_regmap_write
	ldr	w0, [x19]
Lloh48:
	adrp	x8, _SUN4I_TCON0_IO_TRI_REG@GOTPAGE
Lloh49:
	ldr	x8, [x8, _SUN4I_TCON0_IO_TRI_REG@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x8]
	mov	w2, #-536870912
	bl	_regmap_write
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SUN6I_DSI_TCON_DIV,8,3         ; @SUN6I_DSI_TCON_DIV
	.comm	_SUN4I_TCON0_CTL_REG,4,2        ; @SUN4I_TCON0_CTL_REG
	.comm	_SUN4I_TCON0_CTL_IF_MASK,4,2    ; @SUN4I_TCON0_CTL_IF_MASK
	.comm	_SUN4I_TCON0_CTL_IF_8080,4,2    ; @SUN4I_TCON0_CTL_IF_8080
	.comm	_SUN4I_TCON_ECC_FIFO_REG,4,2    ; @SUN4I_TCON_ECC_FIFO_REG
	.comm	_SUN4I_TCON_ECC_FIFO_EN,4,2     ; @SUN4I_TCON_ECC_FIFO_EN
	.comm	_SUN4I_TCON0_CPU_IF_REG,4,2     ; @SUN4I_TCON0_CPU_IF_REG
	.comm	_SUN4I_TCON0_CPU_IF_MODE_DSI,4,2 ; @SUN4I_TCON0_CPU_IF_MODE_DSI
	.comm	_SUN4I_TCON0_CPU_IF_TRI_FIFO_FLUSH,4,2 ; @SUN4I_TCON0_CPU_IF_TRI_FIFO_FLUSH
	.comm	_SUN4I_TCON0_CPU_IF_TRI_FIFO_EN,4,2 ; @SUN4I_TCON0_CPU_IF_TRI_FIFO_EN
	.comm	_SUN4I_TCON0_CPU_IF_TRI_EN,4,2  ; @SUN4I_TCON0_CPU_IF_TRI_EN
	.comm	_SUN4I_TCON0_DCLK_REG,4,2       ; @SUN4I_TCON0_DCLK_REG
	.comm	_SUN4I_TCON0_CPU_TRI0_REG,4,2   ; @SUN4I_TCON0_CPU_TRI0_REG
	.comm	_SUN4I_TCON0_CPU_TRI1_REG,4,2   ; @SUN4I_TCON0_CPU_TRI1_REG
	.comm	_SUN4I_TCON0_CPU_TRI2_REG,4,2   ; @SUN4I_TCON0_CPU_TRI2_REG
	.comm	_SUN4I_TCON_SAFE_PERIOD_REG,4,2 ; @SUN4I_TCON_SAFE_PERIOD_REG
	.comm	_SUN4I_TCON0_IO_TRI_REG,4,2     ; @SUN4I_TCON0_IO_TRI_REG
	.no_dead_strip	_sun4i_tcon0_mode_set_cpu
.subsections_via_symbols
