	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v8_ring_emit_cntxcntl
_gfx_v8_ring_emit_cntxcntl:             ## @gfx_v8_ring_emit_cntxcntl
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %r14
	movl	(%rdi), %edi
	callq	_amdgpu_sriov_vf
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%r14, %rdi
	callq	_gfx_v8_0_ring_emit_ce_meta
LBB0_2:
	movq	_AMDGPU_HAVE_CTX_SWITCH@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_4
## %bb.3:
	movq	%r14, %rdi
	callq	_gfx_v8_0_ring_emit_vgt_flush
	movq	_AMDGPU_PREAMBLE_IB_PRESENT@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	testl	%r15d, (%rax)
	setne	%bl
	shll	$28, %ebx
	orl	$-2130608125, %ebx              ## imm = 0x81018003
	jmp	LBB0_5
LBB0_4:
	movq	_AMDGPU_PREAMBLE_IB_PRESENT_FIRST@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	testl	%r15d, (%rax)
	setne	%bl
	orl	$-8, %ebx
	shll	$28, %ebx
LBB0_5:
	movq	_PACKET3_CONTEXT_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_PACKET3
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_amdgpu_ring_write
	movq	%r14, %rdi
	xorl	%esi, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_HAVE_CTX_SWITCH,4,2     ## @AMDGPU_HAVE_CTX_SWITCH
	.comm	_AMDGPU_PREAMBLE_IB_PRESENT,4,2 ## @AMDGPU_PREAMBLE_IB_PRESENT
	.comm	_AMDGPU_PREAMBLE_IB_PRESENT_FIRST,4,2 ## @AMDGPU_PREAMBLE_IB_PRESENT_FIRST
	.comm	_PACKET3_CONTEXT_CONTROL,4,2    ## @PACKET3_CONTEXT_CONTROL
	.no_dead_strip	_gfx_v8_ring_emit_cntxcntl
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v8_ring_emit_cntxcntl
_gfx_v8_ring_emit_cntxcntl:             ; @gfx_v8_ring_emit_cntxcntl
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	ldr	w0, [x0]
	bl	_amdgpu_sriov_vf
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_gfx_v8_0_ring_emit_ce_meta
LBB0_2:
Lloh0:
	adrp	x8, _AMDGPU_HAVE_CTX_SWITCH@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_HAVE_CTX_SWITCH@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_4
; %bb.3:
	mov	x0, x19
	bl	_gfx_v8_0_ring_emit_vgt_flush
Lloh3:
	adrp	x8, _AMDGPU_PREAMBLE_IB_PRESENT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AMDGPU_PREAMBLE_IB_PRESENT@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w20
	mov	w8, #32771
	movk	w8, #37121, lsl #16
	mov	w9, #32771
	movk	w9, #33025, lsl #16
	b	LBB0_5
LBB0_4:
Lloh6:
	adrp	x8, _AMDGPU_PREAMBLE_IB_PRESENT_FIRST@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AMDGPU_PREAMBLE_IB_PRESENT_FIRST@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	tst	w8, w20
	mov	w8, #-1879048192
	mov	w9, #-2147483648
LBB0_5:
	csel	w20, w9, w8, eq
Lloh9:
	adrp	x8, _PACKET3_CONTEXT_CONTROL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PACKET3_CONTEXT_CONTROL@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	mov	w1, #1
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_HAVE_CTX_SWITCH,4,2     ; @AMDGPU_HAVE_CTX_SWITCH
	.comm	_AMDGPU_PREAMBLE_IB_PRESENT,4,2 ; @AMDGPU_PREAMBLE_IB_PRESENT
	.comm	_AMDGPU_PREAMBLE_IB_PRESENT_FIRST,4,2 ; @AMDGPU_PREAMBLE_IB_PRESENT_FIRST
	.comm	_PACKET3_CONTEXT_CONTROL,4,2    ; @PACKET3_CONTEXT_CONTROL
	.no_dead_strip	_gfx_v8_ring_emit_cntxcntl
.subsections_via_symbols
