	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_vm_bo_update_mapping
_amdgpu_vm_bo_update_mapping:           ## @amdgpu_vm_bo_update_mapping
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, -48(%rbp)                 ## 4-byte Spill
	movl	%r8d, -44(%rbp)                 ## 4-byte Spill
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r13
	movq	%rdi, %r15
	movq	_AMDGPU_FENCE_OWNER_VM@GOTPCREL(%rip), %rax
	movq	(%rax), %r12
	leaq	-72(%rbp), %rdi
	xorl	%esi, %esi
	movl	$24, %edx
	callq	_memset
	movq	%r15, -56(%rbp)
	movq	%rbx, -64(%rbp)
	movq	%r14, -72(%rbp)
	movl	16(%rbp), %r14d
	movq	_AMDGPU_PTE_VALID@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r14d, %eax
	jne	LBB0_2
## %bb.1:
	movq	_AMDGPU_FENCE_OWNER_KFD@GOTPCREL(%rip), %rax
	movq	(%rax), %r12
LBB0_2:
	movq	(%rbx), %rax
	leaq	-72(%rbp), %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	callq	*(%rax)
	testl	%eax, %eax
	jne	LBB0_5
## %bb.3:
	movl	24(%rbp), %ecx
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	incl	%edx
	leaq	-72(%rbp), %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%r14d, %r8d
	callq	_amdgpu_vm_update_ptes
	testl	%eax, %eax
	jne	LBB0_5
## %bb.4:
	movq	32(%rbp), %rsi
	movq	(%rbx), %rax
	leaq	-72(%rbp), %rdi
	callq	*8(%rax)
LBB0_5:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_FENCE_OWNER_VM,8,3      ## @AMDGPU_FENCE_OWNER_VM
	.comm	_AMDGPU_PTE_VALID,4,2           ## @AMDGPU_PTE_VALID
	.comm	_AMDGPU_FENCE_OWNER_KFD,8,3     ## @AMDGPU_FENCE_OWNER_KFD
	.no_dead_strip	_amdgpu_vm_bo_update_mapping
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_vm_bo_update_mapping
_amdgpu_vm_bo_update_mapping:           ; @amdgpu_vm_bo_update_mapping
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x7
	mov	x20, x6
	mov	x23, x5
	mov	x22, x4
	mov	x19, x3
	mov	x24, x2
	mov	x25, x1
	mov	x26, x0
Lloh0:
	adrp	x8, _AMDGPU_FENCE_OWNER_VM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_FENCE_OWNER_VM@GOTPAGEOFF]
Lloh2:
	ldr	x27, [x8]
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #24
	bl	_memset
	stp	x19, x26, [sp, #16]
	str	x24, [sp, #8]
Lloh3:
	adrp	x8, _AMDGPU_PTE_VALID@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AMDGPU_PTE_VALID@GOTPAGEOFF]
Lloh5:
	adrp	x9, _AMDGPU_FENCE_OWNER_KFD@GOTPAGE
Lloh6:
	ldr	x9, [x9, _AMDGPU_FENCE_OWNER_KFD@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
Lloh8:
	ldr	x9, [x9]
	tst	w8, w20
	csel	x1, x9, x27, eq
	ldr	x8, [x19]
	ldr	x8, [x8]
	add	x0, sp, #8
	mov	x2, x25
	blr	x8
	cbnz	w0, LBB0_3
; %bb.1:
	add	w2, w23, #1
	add	x0, sp, #8
	mov	x1, x22
	mov	x3, x21
	mov	x4, x20
	bl	_amdgpu_vm_update_ptes
	cbnz	w0, LBB0_3
; %bb.2:
	ldr	x1, [x29, #16]
	ldr	x8, [x19]
	ldr	x8, [x8, #8]
	add	x0, sp, #8
	blr	x8
LBB0_3:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_FENCE_OWNER_VM,8,3      ; @AMDGPU_FENCE_OWNER_VM
	.comm	_AMDGPU_PTE_VALID,4,2           ; @AMDGPU_PTE_VALID
	.comm	_AMDGPU_FENCE_OWNER_KFD,8,3     ; @AMDGPU_FENCE_OWNER_KFD
	.no_dead_strip	_amdgpu_vm_bo_update_mapping
.subsections_via_symbols
