	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function update_mqd_sdma
_update_mqd_sdma:                       ## @update_mqd_sdma
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$48, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdx, %rbx
	movq	%rsi, %rdi
	callq	_get_sdma_mqd
	movq	%rax, %r14
	movl	(%rbx), %eax
	leal	3(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$2, %edi
	callq	_order_base_2
	movq	_SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	4(%rbx), %edx
	movq	_SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%eax, %edx
	movq	_SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	btsl	%eax, %edx
	movq	_SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$6, %eax
	shll	%cl, %eax
	orl	%edx, %eax
	movl	%eax, (%r14)
	movl	8(%rbx), %edi
	sarl	$8, %edi
	callq	_lower_32_bits
	movq	%rax, 48(%r14)
	movl	8(%rbx), %edi
	sarl	$8, %edi
	callq	_upper_32_bits
	movq	%rax, 40(%r14)
	movl	32(%rbx), %edi
	callq	_lower_32_bits
	movq	%rax, 32(%r14)
	movl	32(%rbx), %edi
	callq	_upper_32_bits
	movq	%rax, 24(%r14)
	movl	12(%rbx), %eax
	movq	_SDMA0_RLC0_DOORBELL__OFFSET__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	%eax, 4(%r14)
	movl	28(%rbx), %eax
	movl	%eax, 16(%r14)
	movl	24(%rbx), %eax
	movl	%eax, 12(%r14)
	movl	20(%rbx), %eax
	movl	%eax, 8(%r14)
	movq	32(%rbx), %rax
	movq	%rax, 32(%rsp)
	movups	(%rbx), %xmm0
	movups	16(%rbx), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	callq	_QUEUE_IS_ACTIVE
	movl	%eax, 16(%rbx)
	addq	$48, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT,4,2 ## @SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT
	.comm	_SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT,4,2 ## @SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT
	.comm	_SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT,4,2 ## @SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT
	.comm	_SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT,4,2 ## @SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT
	.comm	_SDMA0_RLC0_DOORBELL__OFFSET__SHIFT,4,2 ## @SDMA0_RLC0_DOORBELL__OFFSET__SHIFT
	.no_dead_strip	_update_mqd_sdma
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function update_mqd_sdma
_update_mqd_sdma:                       ; @update_mqd_sdma
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x2
	mov	x0, x1
	bl	_get_sdma_mqd
	mov	x20, x0
	ldr	w8, [x19]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w0, w8, #2
	bl	_order_base_2
Lloh0:
	adrp	x8, _SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	lsl	w8, w0, w8
	ldr	w9, [x19, #4]
Lloh3:
	adrp	x10, _SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT@GOTPAGE
Lloh4:
	ldr	x10, [x10, _SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
Lloh6:
	adrp	x9, _SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	mov	w10, #1
	lsl	w9, w10, w9
	orr	w8, w8, w9
Lloh9:
	adrp	x9, _SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	mov	w10, #6
	lsl	w9, w10, w9
	orr	w8, w8, w9
	str	w8, [x20]
	ldr	w8, [x19, #8]
	asr	w0, w8, #8
	bl	_lower_32_bits
	str	x0, [x20, #48]
	ldr	w8, [x19, #8]
	asr	w0, w8, #8
	bl	_upper_32_bits
	str	x0, [x20, #40]
	ldr	w0, [x19, #32]
	bl	_lower_32_bits
	str	x0, [x20, #32]
	ldr	w0, [x19, #32]
	bl	_upper_32_bits
	str	x0, [x20, #24]
	ldr	w8, [x19, #12]
Lloh12:
	adrp	x9, _SDMA0_RLC0_DOORBELL__OFFSET__SHIFT@GOTPAGE
Lloh13:
	ldr	x9, [x9, _SDMA0_RLC0_DOORBELL__OFFSET__SHIFT@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	str	w8, [x20, #4]
	ldr	w8, [x19, #28]
	str	w8, [x20, #16]
	ldur	d0, [x19, #20]
	str	d0, [x20, #8]
	ldp	q0, q1, [x19]
	stp	q0, q1, [sp]
	ldr	x8, [x19, #32]
	str	x8, [sp, #32]
	mov	x0, sp
	bl	_QUEUE_IS_ACTIVE
	str	w0, [x19, #16]
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT,4,2 ; @SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT
	.comm	_SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT,4,2 ; @SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT
	.comm	_SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT,4,2 ; @SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT
	.comm	_SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT,4,2 ; @SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT
	.comm	_SDMA0_RLC0_DOORBELL__OFFSET__SHIFT,4,2 ; @SDMA0_RLC0_DOORBELL__OFFSET__SHIFT
	.no_dead_strip	_update_mqd_sdma
.subsections_via_symbols
