	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r700_cp_stop                   ## -- Begin function r700_cp_stop
	.p2align	4, 0x90
_r700_cp_stop:                          ## @r700_cp_stop
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	16(%rdi), %rax
	movq	(%rax), %rax
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %r14
	cmpq	(%r14), %rax
	jne	LBB0_2
## %bb.1:
	movl	8(%rbx), %esi
	movq	%rbx, %rdi
	callq	_radeon_ttm_set_active_vram_size
LBB0_2:
	movq	_CP_ME_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_CP_ME_HALT@GOTPCREL(%rip), %rax
	movq	_CP_PFP_HALT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	callq	_WREG32
	movq	_SCRATCH_UMSK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	(%rbx), %rax
	movq	(%r14), %rcx
	movl	$0, (%rax,%rcx,4)
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
	.comm	_CP_ME_CNTL,4,2                 ## @CP_ME_CNTL
	.comm	_CP_ME_HALT,4,2                 ## @CP_ME_HALT
	.comm	_CP_PFP_HALT,4,2                ## @CP_PFP_HALT
	.comm	_SCRATCH_UMSK,4,2               ## @SCRATCH_UMSK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r700_cp_stop                   ; -- Begin function r700_cp_stop
	.p2align	2
_r700_cp_stop:                          ; @r700_cp_stop
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0, #16]
	ldr	x8, [x8]
Lloh0:
	adrp	x20, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh1:
	ldr	x20, [x20, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
	ldr	x9, [x20]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	ldr	w1, [x19, #8]
	mov	x0, x19
	bl	_radeon_ttm_set_active_vram_size
LBB0_2:
Lloh2:
	adrp	x8, _CP_ME_CNTL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _CP_ME_CNTL@GOTPAGEOFF]
Lloh4:
	adrp	x9, _CP_ME_HALT@GOTPAGE
Lloh5:
	ldr	x9, [x9, _CP_ME_HALT@GOTPAGEOFF]
Lloh6:
	ldr	w0, [x8]
Lloh7:
	ldr	w8, [x9]
Lloh8:
	adrp	x9, _CP_PFP_HALT@GOTPAGE
Lloh9:
	ldr	x9, [x9, _CP_PFP_HALT@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_WREG32
Lloh11:
	adrp	x8, _SCRATCH_UMSK@GOTPAGE
Lloh12:
	ldr	x8, [x8, _SCRATCH_UMSK@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
	ldr	x8, [x19]
	ldr	x9, [x20]
	str	wzr, [x8, x9, lsl #2]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
	.comm	_CP_ME_CNTL,4,2                 ; @CP_ME_CNTL
	.comm	_CP_ME_HALT,4,2                 ; @CP_ME_HALT
	.comm	_CP_PFP_HALT,4,2                ; @CP_PFP_HALT
	.comm	_SCRATCH_UMSK,4,2               ; @SCRATCH_UMSK
.subsections_via_symbols
