	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vmw_fifo_ping_host             ## -- Begin function vmw_fifo_ping_host
	.p2align	4, 0x90
_vmw_fifo_ping_host:                    ## @vmw_fifo_ping_host
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %r15
	movq	(%rdi), %rbx
	xorl	%eax, %eax
	callq	_preempt_disable
	movq	_SVGA_FIFO_BUSY@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%rbx,%rax,4), %rdi
	xorl	%esi, %esi
	movl	$1, %edx
	callq	_cmpxchg
	testq	%rax, %rax
	jne	LBB0_2
## %bb.1:
	movq	_SVGA_REG_SYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_vmw_write
LBB0_2:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_preempt_enable                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SVGA_FIFO_BUSY,4,2             ## @SVGA_FIFO_BUSY
	.comm	_SVGA_REG_SYNC,4,2              ## @SVGA_REG_SYNC
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vmw_fifo_ping_host             ; -- Begin function vmw_fifo_ping_host
	.p2align	2
_vmw_fifo_ping_host:                    ; @vmw_fifo_ping_host
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
	ldr	x21, [x0]
	bl	_preempt_disable
Lloh0:
	adrp	x8, _SVGA_FIFO_BUSY@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SVGA_FIFO_BUSY@GOTPAGEOFF]
Lloh2:
	ldrsw	x8, [x8]
	add	x0, x21, x8, lsl #2
	mov	w1, #0
	mov	w2, #1
	bl	_cmpxchg
	cbnz	x0, LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _SVGA_REG_SYNC@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SVGA_REG_SYNC@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x20
	mov	x2, x19
	bl	_vmw_write
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_preempt_enable
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_SVGA_FIFO_BUSY,4,2             ; @SVGA_FIFO_BUSY
	.comm	_SVGA_REG_SYNC,4,2              ; @SVGA_REG_SYNC
.subsections_via_symbols
