	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mdp4_lcdc_encoder_enable
_mdp4_lcdc_encoder_enable:              ## @mdp4_lcdc_encoder_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %r14
	callq	_to_mdp4_lcdc_encoder
	movq	%rax, %r12
	movq	(%rax), %r13
	movq	%rbx, %rdi
	callq	_get_kms
	movq	%rax, %r15
	movl	8(%r12), %edi
	callq	_WARN_ON
	testq	%rax, %rax
	jne	LBB0_15
## %bb.1:
	movq	%r13, -48(%rbp)                 ## 8-byte Spill
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	movq	%rbx, -64(%rbp)                 ## 8-byte Spill
	movq	_BPC6@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_MDP4_DMA_CONFIG_R_BPC
	movl	%eax, %r13d
	movl	(%rbx), %edi
	callq	_MDP4_DMA_CONFIG_G_BPC
	movl	%eax, %r15d
	orl	%r13d, %r15d
	movl	(%rbx), %edi
	callq	_MDP4_DMA_CONFIG_B_BPC
	movl	%eax, %ebx
	movl	$33, %edi
	callq	_MDP4_DMA_CONFIG_PACK
	movl	%eax, %r13d
	orl	%ebx, %r13d
	orl	%r15d, %r13d
	movq	_MDP4_DMA_CONFIG_DEFLKR_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	movq	_MDP4_DMA_CONFIG_DITHER_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	movq	(%r14), %rax
	movl	(%rax), %edi
	leaq	L_.str(%rip), %rsi
	callq	_of_property_read_bool
	xorl	%ecx, %ecx
	testl	%eax, %eax
	jne	LBB0_3
## %bb.2:
	movq	_MDP4_DMA_CONFIG_PACK_ALIGN_MSB@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
LBB0_3:
	orl	%ecx, %r13d
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	movl	(%r15), %edi
	movl	%r13d, %esi
	callq	_mdp4_crtc_set_config
	movl	(%r15), %edi
	movq	_INTF_LCDC_DTV@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_mdp4_crtc_set_intf
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_bs_set
	movq	24(%r12), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	jle	LBB0_8
## %bb.4:
	xorl	%ebx, %ebx
	leaq	L_.str.1(%rip), %r13
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_5 Depth=1
	incq	%rbx
	movq	24(%r12), %rdi
	callq	_ARRAY_SIZE
	cltq
	cmpq	%rax, %rbx
	jge	LBB0_8
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	24(%r12), %rax
	movl	(%rax,%rbx,4), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	je	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movq	(%r14), %rdi
	movq	%r13, %rsi
	movl	%eax, %edx
	callq	_DRM_DEV_ERROR
	jmp	LBB0_7
LBB0_8:
	leaq	L_.str.2(%rip), %rdi
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rsi
	callq	_DBG
	movl	16(%r12), %edi
	movq	%rbx, %rsi
	callq	_clk_set_rate
	testl	%eax, %eax
	je	LBB0_10
## %bb.9:
	movq	(%r14), %rdi
	leaq	L_.str.3(%rip), %rsi
	movl	%eax, %edx
	callq	_DRM_DEV_ERROR
LBB0_10:
	movl	16(%r12), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_12
## %bb.11:
	movq	(%r14), %rdi
	leaq	L_.str.4(%rip), %rsi
	movl	%eax, %edx
	callq	_DRM_DEV_ERROR
LBB0_12:
	movl	12(%r12), %edi
	callq	_of_drm_find_panel
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_IS_ERR
	testl	%eax, %eax
	jne	LBB0_14
## %bb.13:
	movq	%rbx, %rdi
	callq	_drm_panel_prepare
	movq	%rbx, %rdi
	callq	_drm_panel_enable
LBB0_14:
	movq	%r15, %rdi
	callq	_setup_phy
	movq	_REG_MDP4_LCDC_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movl	$1, %edx
	callq	_mdp4_write
	movl	$1, 8(%r12)
LBB0_15:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BPC6,4,2                       ## @BPC6
	.comm	_MDP4_DMA_CONFIG_DEFLKR_EN,4,2  ## @MDP4_DMA_CONFIG_DEFLKR_EN
	.comm	_MDP4_DMA_CONFIG_DITHER_EN,4,2  ## @MDP4_DMA_CONFIG_DITHER_EN
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"qcom,lcdc-align-lsb"

	.comm	_MDP4_DMA_CONFIG_PACK_ALIGN_MSB,4,2 ## @MDP4_DMA_CONFIG_PACK_ALIGN_MSB
	.comm	_INTF_LCDC_DTV,4,2              ## @INTF_LCDC_DTV
L_.str.1:                               ## @.str.1
	.asciz	"failed to enable regulator: %d\n"

L_.str.2:                               ## @.str.2
	.asciz	"setting lcdc_clk=%lu"

L_.str.3:                               ## @.str.3
	.asciz	"failed to configure lcdc_clk: %d\n"

L_.str.4:                               ## @.str.4
	.asciz	"failed to enable lcdc_clk: %d\n"

	.comm	_REG_MDP4_LCDC_ENABLE,4,2       ## @REG_MDP4_LCDC_ENABLE
	.no_dead_strip	_mdp4_lcdc_encoder_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mdp4_lcdc_encoder_enable
_mdp4_lcdc_encoder_enable:              ; @mdp4_lcdc_encoder_enable
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x0
	ldr	x24, [x0, #8]
	bl	_to_mdp4_lcdc_encoder
	mov	x19, x0
	ldr	x22, [x0]
	mov	x0, x20
	bl	_get_kms
	mov	x21, x0
	ldr	w0, [x19, #8]
	bl	_WARN_ON
	cbnz	x0, LBB0_13
; %bb.1:
Lloh0:
	adrp	x25, _BPC6@GOTPAGE
Lloh1:
	ldr	x25, [x25, _BPC6@GOTPAGEOFF]
	ldr	w0, [x25]
	bl	_MDP4_DMA_CONFIG_R_BPC
	mov	x23, x0
	ldr	w0, [x25]
	bl	_MDP4_DMA_CONFIG_G_BPC
	orr	w23, w0, w23
	ldr	w0, [x25]
	bl	_MDP4_DMA_CONFIG_B_BPC
	orr	w23, w23, w0
	mov	w0, #33
	bl	_MDP4_DMA_CONFIG_PACK
	orr	w8, w23, w0
Lloh2:
	adrp	x9, _MDP4_DMA_CONFIG_DEFLKR_EN@GOTPAGE
Lloh3:
	ldr	x9, [x9, _MDP4_DMA_CONFIG_DEFLKR_EN@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh5:
	adrp	x9, _MDP4_DMA_CONFIG_DITHER_EN@GOTPAGE
Lloh6:
	ldr	x9, [x9, _MDP4_DMA_CONFIG_DITHER_EN@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	orr	w23, w8, w9
	ldr	x8, [x24]
	ldr	w0, [x8]
Lloh8:
	adrp	x1, l_.str@PAGE
Lloh9:
	add	x1, x1, l_.str@PAGEOFF
	bl	_of_property_read_bool
Lloh10:
	adrp	x8, _MDP4_DMA_CONFIG_PACK_ALIGN_MSB@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MDP4_DMA_CONFIG_PACK_ALIGN_MSB@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	cmp	w0, #0
	csel	w8, w8, wzr, eq
	orr	w1, w23, w8
	ldr	w0, [x20]
	bl	_mdp4_crtc_set_config
	ldr	w0, [x20]
Lloh13:
	adrp	x8, _INTF_LCDC_DTV@GOTPAGE
Lloh14:
	ldr	x8, [x8, _INTF_LCDC_DTV@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_mdp4_crtc_set_intf
	mov	x0, x19
	mov	w1, #1
	bl	_bs_set
	ldr	x0, [x19, #24]
	bl	_ARRAY_SIZE
	cmp	w0, #1
	b.lt	LBB0_6
; %bb.2:
	mov	x25, #0
Lloh16:
	adrp	x23, l_.str.1@PAGE
Lloh17:
	add	x23, x23, l_.str.1@PAGEOFF
	b	LBB0_4
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	x25, x25, #1
	ldr	x0, [x19, #24]
	bl	_ARRAY_SIZE
	cmp	x25, w0, sxtw
	b.ge	LBB0_6
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #24]
	ldr	w0, [x8, x25, lsl #2]
	bl	_regulator_enable
	cbz	w0, LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	x2, x0
	ldr	x0, [x24]
	mov	x1, x23
	bl	_DRM_DEV_ERROR
	b	LBB0_3
LBB0_6:
Lloh18:
	adrp	x0, l_.str.2@PAGE
Lloh19:
	add	x0, x0, l_.str.2@PAGEOFF
	mov	x1, x22
	bl	_DBG
	ldr	w0, [x19, #16]
	mov	x1, x22
	bl	_clk_set_rate
	cbz	w0, LBB0_8
; %bb.7:
	mov	x2, x0
	ldr	x0, [x24]
Lloh20:
	adrp	x1, l_.str.3@PAGE
Lloh21:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_DRM_DEV_ERROR
LBB0_8:
	ldr	w0, [x19, #16]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_10
; %bb.9:
	mov	x2, x0
	ldr	x0, [x24]
Lloh22:
	adrp	x1, l_.str.4@PAGE
Lloh23:
	add	x1, x1, l_.str.4@PAGEOFF
	bl	_DRM_DEV_ERROR
LBB0_10:
	ldr	w0, [x19, #12]
	bl	_of_drm_find_panel
	mov	x22, x0
	bl	_IS_ERR
	cbnz	w0, LBB0_12
; %bb.11:
	mov	x0, x22
	bl	_drm_panel_prepare
	mov	x0, x22
	bl	_drm_panel_enable
LBB0_12:
	mov	x0, x20
	bl	_setup_phy
Lloh24:
	adrp	x8, _REG_MDP4_LCDC_ENABLE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _REG_MDP4_LCDC_ENABLE@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	w20, #1
	mov	x0, x21
	mov	w2, #1
	bl	_mdp4_write
	str	w20, [x19, #8]
LBB0_13:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_BPC6,4,2                       ; @BPC6
	.comm	_MDP4_DMA_CONFIG_DEFLKR_EN,4,2  ; @MDP4_DMA_CONFIG_DEFLKR_EN
	.comm	_MDP4_DMA_CONFIG_DITHER_EN,4,2  ; @MDP4_DMA_CONFIG_DITHER_EN
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"qcom,lcdc-align-lsb"

	.comm	_MDP4_DMA_CONFIG_PACK_ALIGN_MSB,4,2 ; @MDP4_DMA_CONFIG_PACK_ALIGN_MSB
	.comm	_INTF_LCDC_DTV,4,2              ; @INTF_LCDC_DTV
l_.str.1:                               ; @.str.1
	.asciz	"failed to enable regulator: %d\n"

l_.str.2:                               ; @.str.2
	.asciz	"setting lcdc_clk=%lu"

l_.str.3:                               ; @.str.3
	.asciz	"failed to configure lcdc_clk: %d\n"

l_.str.4:                               ; @.str.4
	.asciz	"failed to enable lcdc_clk: %d\n"

	.comm	_REG_MDP4_LCDC_ENABLE,4,2       ; @REG_MDP4_LCDC_ENABLE
	.no_dead_strip	_mdp4_lcdc_encoder_enable
.subsections_via_symbols
