	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function r300_errata
_r300_errata:                           ## @r300_errata
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movl	$0, 8(%rdi)
	movq	(%rdi), %rax
	movq	_CHIP_R300@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_3
## %bb.1:
	movq	%rdi, %rbx
	movq	_RADEON_CONFIG_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	_RADEON_CFG_ATI_REV_ID_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_RADEON_CFG_ATI_REV_A11@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_3
## %bb.2:
	movq	_CHIP_ERRATA_R300_CG@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 8(%rbx)
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_R300,8,3                  ## @CHIP_R300
	.comm	_RADEON_CONFIG_CNTL,4,2         ## @RADEON_CONFIG_CNTL
	.comm	_RADEON_CFG_ATI_REV_ID_MASK,4,2 ## @RADEON_CFG_ATI_REV_ID_MASK
	.comm	_RADEON_CFG_ATI_REV_A11,4,2     ## @RADEON_CFG_ATI_REV_A11
	.comm	_CHIP_ERRATA_R300_CG,4,2        ## @CHIP_ERRATA_R300_CG
	.no_dead_strip	_r300_errata
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function r300_errata
_r300_errata:                           ; @r300_errata
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	str	wzr, [x0, #8]
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _CHIP_R300@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_R300@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.1:
	mov	x19, x0
Lloh3:
	adrp	x8, _RADEON_CONFIG_CNTL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RADEON_CONFIG_CNTL@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	_RREG32
Lloh6:
	adrp	x8, _RADEON_CFG_ATI_REV_ID_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RADEON_CFG_ATI_REV_ID_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh9:
	adrp	x9, _RADEON_CFG_ATI_REV_A11@GOTPAGE
Lloh10:
	ldr	x9, [x9, _RADEON_CFG_ATI_REV_A11@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_3
; %bb.2:
Lloh12:
	adrp	x8, _CHIP_ERRATA_R300_CG@GOTPAGE
Lloh13:
	ldr	x8, [x8, _CHIP_ERRATA_R300_CG@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	ldr	w9, [x19, #8]
	orr	w8, w9, w8
	str	w8, [x19, #8]
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_R300,8,3                  ; @CHIP_R300
	.comm	_RADEON_CONFIG_CNTL,4,2         ; @RADEON_CONFIG_CNTL
	.comm	_RADEON_CFG_ATI_REV_ID_MASK,4,2 ; @RADEON_CFG_ATI_REV_ID_MASK
	.comm	_RADEON_CFG_ATI_REV_A11,4,2     ; @RADEON_CFG_ATI_REV_A11
	.comm	_CHIP_ERRATA_R300_CG,4,2        ; @CHIP_ERRATA_R300_CG
	.no_dead_strip	_r300_errata
.subsections_via_symbols
