	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_dm_connector_get_modes
_amdgpu_dm_connector_get_modes:         ## @amdgpu_dm_connector_get_modes
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_to_amdgpu_dm_connector
	movq	%rax, %r14
	movq	8(%rax), %r15
	movq	%rbx, %rdi
	callq	_amdgpu_dm_connector_to_encoder
	testq	%r15, %r15
	je	LBB0_2
## %bb.1:
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	_drm_edid_is_valid
	testl	%eax, %eax
	je	LBB0_2
## %bb.3:
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_amdgpu_dm_connector_ddc_get_modes
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_amdgpu_dm_connector_add_common_modes
	jmp	LBB0_4
LBB0_2:
	movq	%rbx, %rdi
	movl	$640, %esi                      ## imm = 0x280
	movl	$480, %edx                      ## imm = 0x1E0
	callq	_drm_add_modes_noedid
	movl	%eax, (%r14)
LBB0_4:
	movq	%rbx, %rdi
	callq	_amdgpu_dm_fbc_init
	movl	(%r14), %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_amdgpu_dm_connector_get_modes
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_dm_connector_get_modes
_amdgpu_dm_connector_get_modes:         ; @amdgpu_dm_connector_get_modes
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_to_amdgpu_dm_connector
	mov	x20, x0
	ldr	x21, [x0, #8]
	mov	x0, x19
	bl	_amdgpu_dm_connector_to_encoder
	cbz	x21, LBB0_3
; %bb.1:
	mov	x22, x0
	mov	x0, x21
	bl	_drm_edid_is_valid
	cbz	w0, LBB0_3
; %bb.2:
	mov	x0, x19
	mov	x1, x21
	bl	_amdgpu_dm_connector_ddc_get_modes
	mov	x0, x22
	mov	x1, x19
	bl	_amdgpu_dm_connector_add_common_modes
	b	LBB0_4
LBB0_3:
	mov	x0, x19
	mov	w1, #640
	mov	w2, #480
	bl	_drm_add_modes_noedid
	str	w0, [x20]
LBB0_4:
	mov	x0, x19
	bl	_amdgpu_dm_fbc_init
	ldr	w0, [x20]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_amdgpu_dm_connector_get_modes
.subsections_via_symbols
