	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mmhub_v1_0_update_power_gating ## -- Begin function mmhub_v1_0_update_power_gating
	.p2align	4, 0x90
_mmhub_v1_0_update_power_gating:        ## @mmhub_v1_0_update_power_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %ebx
	movq	%rdi, %r14
	callq	_amdgpu_sriov_vf
	testl	%ebx, %ebx
	je	LBB0_5
## %bb.1:
	testq	%rax, %rax
	jne	LBB0_5
## %bb.2:
	movq	_AMD_PG_SUPPORT_MMHUB@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r14)
	je	LBB0_5
## %bb.3:
	movq	8(%r14), %rax
	testq	%rax, %rax
	je	LBB0_5
## %bb.4:
	cmpq	$0, (%rax)
	je	LBB0_5
## %bb.6:
	movq	_AMD_IP_BLOCK_TYPE_GMC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_amdgpu_dpm_set_powergating_by_smu ## TAILCALL
LBB0_5:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_PG_SUPPORT_MMHUB,4,2       ## @AMD_PG_SUPPORT_MMHUB
	.comm	_AMD_IP_BLOCK_TYPE_GMC,4,2      ## @AMD_IP_BLOCK_TYPE_GMC
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mmhub_v1_0_update_power_gating ; -- Begin function mmhub_v1_0_update_power_gating
	.p2align	2
_mmhub_v1_0_update_power_gating:        ; @mmhub_v1_0_update_power_gating
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	bl	_amdgpu_sriov_vf
	cbz	w20, LBB0_6
; %bb.1:
	cbnz	x0, LBB0_6
; %bb.2:
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _AMD_PG_SUPPORT_MMHUB@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMD_PG_SUPPORT_MMHUB@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.3:
	ldr	x8, [x19, #8]
	cbz	x8, LBB0_6
; %bb.4:
	ldr	x8, [x8]
	cbz	x8, LBB0_6
; %bb.5:
Lloh3:
	adrp	x8, _AMD_IP_BLOCK_TYPE_GMC@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AMD_IP_BLOCK_TYPE_GMC@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_amdgpu_dpm_set_powergating_by_smu
LBB0_6:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_PG_SUPPORT_MMHUB,4,2       ; @AMD_PG_SUPPORT_MMHUB
	.comm	_AMD_IP_BLOCK_TYPE_GMC,4,2      ; @AMD_IP_BLOCK_TYPE_GMC
.subsections_via_symbols
