	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v10_0_get_clockgating_state
_gfx_v10_0_get_clockgating_state:       ## @gfx_v10_0_get_clockgating_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %rbx
	movq	_GC@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_mmRLC_CGTT_MGCG_OVERRIDE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_2
## %bb.1:
	movq	_AMD_CG_SUPPORT_GFX_MGCG@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%rbx)
LBB0_2:
	movl	(%r14), %edi
	movq	_mmRLC_CGCG_CGLS_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_4
## %bb.3:
	movq	_AMD_CG_SUPPORT_GFX_CGCG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, (%rbx)
LBB0_4:
	movq	_RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_6
## %bb.5:
	movq	_AMD_CG_SUPPORT_GFX_CGLS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%rbx)
LBB0_6:
	movl	(%r14), %edi
	movq	_mmRLC_MEM_SLP_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_8
## %bb.7:
	movq	_AMD_CG_SUPPORT_GFX_RLC_LS@GOTPCREL(%rip), %rax
	movq	_AMD_CG_SUPPORT_GFX_MGLS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	orl	%ecx, (%rbx)
LBB0_8:
	movl	(%r14), %edi
	movq	_mmCP_MEM_SLP_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_10
## %bb.9:
	movq	_AMD_CG_SUPPORT_GFX_CP_LS@GOTPCREL(%rip), %rax
	movq	_AMD_CG_SUPPORT_GFX_MGLS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	orl	%ecx, (%rbx)
LBB0_10:
	movl	(%r14), %edi
	movq	_mmRLC_CGCG_CGLS_CTRL_3D@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_12
## %bb.11:
	movq	_AMD_CG_SUPPORT_GFX_3D_CGCG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, (%rbx)
LBB0_12:
	movq	_RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_14
## %bb.13:
	movq	_AMD_CG_SUPPORT_GFX_3D_CGLS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%rbx)
LBB0_14:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GC,4,2                         ## @GC
	.comm	_mmRLC_CGTT_MGCG_OVERRIDE,4,2   ## @mmRLC_CGTT_MGCG_OVERRIDE
	.comm	_RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK,4,2 ## @RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK
	.comm	_AMD_CG_SUPPORT_GFX_MGCG,4,2    ## @AMD_CG_SUPPORT_GFX_MGCG
	.comm	_mmRLC_CGCG_CGLS_CTRL,4,2       ## @mmRLC_CGCG_CGLS_CTRL
	.comm	_RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK,4,2 ## @RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_CGCG,4,2    ## @AMD_CG_SUPPORT_GFX_CGCG
	.comm	_RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK,4,2 ## @RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_CGLS,4,2    ## @AMD_CG_SUPPORT_GFX_CGLS
	.comm	_mmRLC_MEM_SLP_CNTL,4,2         ## @mmRLC_MEM_SLP_CNTL
	.comm	_RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK,4,2 ## @RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_RLC_LS,4,2  ## @AMD_CG_SUPPORT_GFX_RLC_LS
	.comm	_AMD_CG_SUPPORT_GFX_MGLS,4,2    ## @AMD_CG_SUPPORT_GFX_MGLS
	.comm	_mmCP_MEM_SLP_CNTL,4,2          ## @mmCP_MEM_SLP_CNTL
	.comm	_CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK,4,2 ## @CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_CP_LS,4,2   ## @AMD_CG_SUPPORT_GFX_CP_LS
	.comm	_mmRLC_CGCG_CGLS_CTRL_3D,4,2    ## @mmRLC_CGCG_CGLS_CTRL_3D
	.comm	_RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK,4,2 ## @RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_3D_CGCG,4,2 ## @AMD_CG_SUPPORT_GFX_3D_CGCG
	.comm	_RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK,4,2 ## @RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_3D_CGLS,4,2 ## @AMD_CG_SUPPORT_GFX_3D_CGLS
	.no_dead_strip	_gfx_v10_0_get_clockgating_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v10_0_get_clockgating_state
_gfx_v10_0_get_clockgating_state:       ; @gfx_v10_0_get_clockgating_state
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
Lloh0:
	adrp	x20, _GC@GOTPAGE
Lloh1:
	ldr	x20, [x20, _GC@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh2:
	adrp	x8, _mmRLC_CGTT_MGCG_OVERRIDE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _mmRLC_CGTT_MGCG_OVERRIDE@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh5:
	adrp	x8, _RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK@GOTPAGE
Lloh6:
	ldr	x8, [x8, _RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	tst	w8, w0
	b.ne	LBB0_2
; %bb.1:
Lloh8:
	adrp	x8, _AMD_CG_SUPPORT_GFX_MGCG@GOTPAGE
Lloh9:
	ldr	x8, [x8, _AMD_CG_SUPPORT_GFX_MGCG@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_2:
	ldr	w0, [x20]
Lloh11:
	adrp	x8, _mmRLC_CGCG_CGLS_CTRL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _mmRLC_CGCG_CGLS_CTRL@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh14:
	adrp	x8, _RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_4
; %bb.3:
Lloh17:
	adrp	x8, _AMD_CG_SUPPORT_GFX_CGCG@GOTPAGE
Lloh18:
	ldr	x8, [x8, _AMD_CG_SUPPORT_GFX_CGCG@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_4:
Lloh20:
	adrp	x8, _RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_6
; %bb.5:
Lloh23:
	adrp	x8, _AMD_CG_SUPPORT_GFX_CGLS@GOTPAGE
Lloh24:
	ldr	x8, [x8, _AMD_CG_SUPPORT_GFX_CGLS@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_6:
	ldr	w0, [x20]
Lloh26:
	adrp	x8, _mmRLC_MEM_SLP_CNTL@GOTPAGE
Lloh27:
	ldr	x8, [x8, _mmRLC_MEM_SLP_CNTL@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh29:
	adrp	x8, _RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK@GOTPAGE
Lloh30:
	ldr	x8, [x8, _RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
Lloh32:
	adrp	x21, _AMD_CG_SUPPORT_GFX_MGLS@GOTPAGE
Lloh33:
	ldr	x21, [x21, _AMD_CG_SUPPORT_GFX_MGLS@GOTPAGEOFF]
	tst	w8, w0
	b.eq	LBB0_8
; %bb.7:
Lloh34:
	adrp	x8, _AMD_CG_SUPPORT_GFX_RLC_LS@GOTPAGE
Lloh35:
	ldr	x8, [x8, _AMD_CG_SUPPORT_GFX_RLC_LS@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
	ldr	w9, [x21]
	orr	w8, w9, w8
	ldr	w9, [x19]
	orr	w8, w8, w9
	str	w8, [x19]
LBB0_8:
	ldr	w0, [x20]
Lloh37:
	adrp	x8, _mmCP_MEM_SLP_CNTL@GOTPAGE
Lloh38:
	ldr	x8, [x8, _mmCP_MEM_SLP_CNTL@GOTPAGEOFF]
Lloh39:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh40:
	adrp	x8, _CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK@GOTPAGE
Lloh41:
	ldr	x8, [x8, _CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_10
; %bb.9:
Lloh43:
	adrp	x8, _AMD_CG_SUPPORT_GFX_CP_LS@GOTPAGE
Lloh44:
	ldr	x8, [x8, _AMD_CG_SUPPORT_GFX_CP_LS@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	ldr	w9, [x21]
	orr	w8, w9, w8
	ldr	w9, [x19]
	orr	w8, w8, w9
	str	w8, [x19]
LBB0_10:
	ldr	w0, [x20]
Lloh46:
	adrp	x8, _mmRLC_CGCG_CGLS_CTRL_3D@GOTPAGE
Lloh47:
	ldr	x8, [x8, _mmRLC_CGCG_CGLS_CTRL_3D@GOTPAGEOFF]
Lloh48:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh49:
	adrp	x8, _RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK@GOTPAGE
Lloh50:
	ldr	x8, [x8, _RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK@GOTPAGEOFF]
Lloh51:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_12
; %bb.11:
Lloh52:
	adrp	x8, _AMD_CG_SUPPORT_GFX_3D_CGCG@GOTPAGE
Lloh53:
	ldr	x8, [x8, _AMD_CG_SUPPORT_GFX_3D_CGCG@GOTPAGEOFF]
Lloh54:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_12:
Lloh55:
	adrp	x8, _RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK@GOTPAGE
Lloh56:
	ldr	x8, [x8, _RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK@GOTPAGEOFF]
Lloh57:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_14
; %bb.13:
Lloh58:
	adrp	x8, _AMD_CG_SUPPORT_GFX_3D_CGLS@GOTPAGE
Lloh59:
	ldr	x8, [x8, _AMD_CG_SUPPORT_GFX_3D_CGLS@GOTPAGEOFF]
Lloh60:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_14:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.cfi_endproc
                                        ; -- End function
	.comm	_GC,4,2                         ; @GC
	.comm	_mmRLC_CGTT_MGCG_OVERRIDE,4,2   ; @mmRLC_CGTT_MGCG_OVERRIDE
	.comm	_RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK,4,2 ; @RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK
	.comm	_AMD_CG_SUPPORT_GFX_MGCG,4,2    ; @AMD_CG_SUPPORT_GFX_MGCG
	.comm	_mmRLC_CGCG_CGLS_CTRL,4,2       ; @mmRLC_CGCG_CGLS_CTRL
	.comm	_RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK,4,2 ; @RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_CGCG,4,2    ; @AMD_CG_SUPPORT_GFX_CGCG
	.comm	_RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK,4,2 ; @RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_CGLS,4,2    ; @AMD_CG_SUPPORT_GFX_CGLS
	.comm	_mmRLC_MEM_SLP_CNTL,4,2         ; @mmRLC_MEM_SLP_CNTL
	.comm	_RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK,4,2 ; @RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_RLC_LS,4,2  ; @AMD_CG_SUPPORT_GFX_RLC_LS
	.comm	_AMD_CG_SUPPORT_GFX_MGLS,4,2    ; @AMD_CG_SUPPORT_GFX_MGLS
	.comm	_mmCP_MEM_SLP_CNTL,4,2          ; @mmCP_MEM_SLP_CNTL
	.comm	_CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK,4,2 ; @CP_MEM_SLP_CNTL__CP_MEM_LS_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_CP_LS,4,2   ; @AMD_CG_SUPPORT_GFX_CP_LS
	.comm	_mmRLC_CGCG_CGLS_CTRL_3D,4,2    ; @mmRLC_CGCG_CGLS_CTRL_3D
	.comm	_RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK,4,2 ; @RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_3D_CGCG,4,2 ; @AMD_CG_SUPPORT_GFX_3D_CGCG
	.comm	_RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK,4,2 ; @RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK
	.comm	_AMD_CG_SUPPORT_GFX_3D_CGLS,4,2 ; @AMD_CG_SUPPORT_GFX_3D_CGLS
	.no_dead_strip	_gfx_v10_0_get_clockgating_state
.subsections_via_symbols
