	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_enable_rc6
_intel_enable_rc6:                      ## @intel_enable_rc6
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	addq	$16, %rdi
	callq	_lockdep_assert_held
	cmpl	$0, (%rbx)
	jne	LBB0_15
## %bb.1:
	cmpq	$0, 8(%rbx)
	jne	LBB0_15
## %bb.2:
	movq	%rbx, %rdi
	callq	_IS_CHERRYVIEW
	movq	%rbx, %rdi
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	callq	_cherryview_enable_rc6
	jmp	LBB0_14
LBB0_4:
	callq	_IS_VALLEYVIEW
	movq	%rbx, %rdi
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	callq	_valleyview_enable_rc6
	jmp	LBB0_14
LBB0_6:
	callq	_INTEL_GEN
	movq	%rbx, %rdi
	cmpl	$11, %eax
	jl	LBB0_8
## %bb.7:
	callq	_gen11_enable_rc6
	jmp	LBB0_14
LBB0_8:
	callq	_INTEL_GEN
	movq	%rbx, %rdi
	cmpl	$9, %eax
	jl	LBB0_10
## %bb.9:
	callq	_gen9_enable_rc6
	jmp	LBB0_14
LBB0_10:
	callq	_IS_BROADWELL
	movq	%rbx, %rdi
	testq	%rax, %rax
	je	LBB0_12
## %bb.11:
	callq	_gen8_enable_rc6
	jmp	LBB0_14
LBB0_12:
	callq	_INTEL_GEN
	cmpl	$6, %eax
	jl	LBB0_14
## %bb.13:
	movq	%rbx, %rdi
	callq	_gen6_enable_rc6
LBB0_14:
	movl	$1, (%rbx)
LBB0_15:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_intel_enable_rc6
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_enable_rc6
_intel_enable_rc6:                      ; @intel_enable_rc6
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	add	x0, x0, #16
	bl	_lockdep_assert_held
	ldr	w8, [x19]
	cbnz	w8, LBB0_15
; %bb.1:
	ldr	x8, [x19, #8]
	cbnz	x8, LBB0_15
; %bb.2:
	mov	x0, x19
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_4
; %bb.3:
	mov	x0, x19
	bl	_cherryview_enable_rc6
	b	LBB0_14
LBB0_4:
	mov	x0, x19
	bl	_IS_VALLEYVIEW
	cbz	x0, LBB0_6
; %bb.5:
	mov	x0, x19
	bl	_valleyview_enable_rc6
	b	LBB0_14
LBB0_6:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #11
	b.lt	LBB0_8
; %bb.7:
	mov	x0, x19
	bl	_gen11_enable_rc6
	b	LBB0_14
LBB0_8:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #9
	b.lt	LBB0_10
; %bb.9:
	mov	x0, x19
	bl	_gen9_enable_rc6
	b	LBB0_14
LBB0_10:
	mov	x0, x19
	bl	_IS_BROADWELL
	cbz	x0, LBB0_12
; %bb.11:
	mov	x0, x19
	bl	_gen8_enable_rc6
	b	LBB0_14
LBB0_12:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #6
	b.lt	LBB0_14
; %bb.13:
	mov	x0, x19
	bl	_gen6_enable_rc6
LBB0_14:
	mov	w8, #1
	str	w8, [x19]
LBB0_15:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_intel_enable_rc6
.subsections_via_symbols
