	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_vm_init                 ## -- Begin function radeon_vm_init
	.p2align	4, 0x90
_radeon_vm_init:                        ## @radeon_vm_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$32, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	_RADEON_VM_PTB_ALIGN_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RADEON_VM_PTE_COUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	shll	$3, %esi
	callq	_min
	movl	%eax, %r15d
	movq	$0, 48(%rbx)
	movq	_RADEON_NUM_RINGS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, %eax
	jle	LBB0_2
## %bb.1:
	movq	40(%rbx), %rdi
	shlq	$3, %rax
	leaq	(%rax,%rax,2), %rsi
	callq	___bzero
LBB0_2:
	leaq	36(%rbx), %rdi
	callq	_mutex_init
	movq	_RB_ROOT_CACHED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rbx)
	leaq	28(%rbx), %rdi
	callq	_spin_lock_init
	leaq	24(%rbx), %rdi
	callq	_INIT_LIST_HEAD
	leaq	20(%rbx), %rdi
	callq	_INIT_LIST_HEAD
	leaq	16(%rbx), %rdi
	callq	_INIT_LIST_HEAD
	movq	%r14, %rdi
	callq	_radeon_vm_directory_size
	movl	%eax, %r12d
	movq	%r14, %rdi
	callq	_radeon_vm_num_pdes
                                        ## kill: def $eax killed $eax def $rax
	leal	(,%rax,4), %edi
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_kzalloc
	movq	%rax, 8(%rbx)
	testq	%rax, %rax
	je	LBB0_3
## %bb.4:
	movq	_RADEON_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%rbx, 16(%rsp)
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rsp)
	movq	%r14, %rdi
	movl	%r12d, %esi
	movl	%r15d, %edx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	_radeon_bo_create
	testl	%eax, %eax
	jne	LBB0_7
## %bb.5:
	movq	(%rbx), %rsi
	movq	%r14, %rdi
	callq	_radeon_vm_clear_bo
	movl	%eax, %r14d
	movl	$0, %eax
	testl	%r14d, %r14d
	je	LBB0_7
## %bb.6:
	movq	%rbx, %rdi
	callq	_radeon_bo_unref
	movq	$0, (%rbx)
	movl	%r14d, %eax
	jmp	LBB0_7
LBB0_3:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_ERROR
	movq	_ENOMEM@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_7:
	addq	$32, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_VM_PTB_ALIGN_SIZE,4,2   ## @RADEON_VM_PTB_ALIGN_SIZE
	.comm	_RADEON_VM_PTE_COUNT,4,2        ## @RADEON_VM_PTE_COUNT
	.comm	_RADEON_NUM_RINGS,4,2           ## @RADEON_NUM_RINGS
	.comm	_RB_ROOT_CACHED,4,2             ## @RB_ROOT_CACHED
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Cannot allocate memory for page table array\n"

	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_RADEON_GEM_DOMAIN_VRAM,4,2     ## @RADEON_GEM_DOMAIN_VRAM
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_vm_init                 ; -- Begin function radeon_vm_init
	.p2align	2
_radeon_vm_init:                        ; @radeon_vm_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _RADEON_VM_PTB_ALIGN_SIZE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_VM_PTB_ALIGN_SIZE@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _RADEON_VM_PTE_COUNT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RADEON_VM_PTE_COUNT@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	lsl	w1, w8, #3
	bl	_min
	mov	x21, x0
	str	xzr, [x19, #48]
Lloh6:
	adrp	x8, _RADEON_NUM_RINGS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RADEON_NUM_RINGS@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	w8, #1
	b.lt	LBB0_2
; %bb.1:
	ldr	x0, [x19, #40]
	add	x8, x8, x8, lsl #1
	lsl	x1, x8, #3
	bl	_bzero
LBB0_2:
	add	x0, x19, #36
	bl	_mutex_init
Lloh9:
	adrp	x8, _RB_ROOT_CACHED@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RB_ROOT_CACHED@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	str	w8, [x19, #32]
	add	x0, x19, #28
	bl	_spin_lock_init
	add	x0, x19, #24
	bl	_INIT_LIST_HEAD
	add	x0, x19, #20
	bl	_INIT_LIST_HEAD
	add	x0, x19, #16
	bl	_INIT_LIST_HEAD
	mov	x0, x20
	bl	_radeon_vm_directory_size
	mov	x22, x0
	mov	x0, x20
	bl	_radeon_vm_num_pdes
	lsl	w0, w0, #2
Lloh12:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	bl	_kzalloc
	str	x0, [x19, #8]
	cbz	x0, LBB0_6
; %bb.3:
Lloh15:
	adrp	x8, _RADEON_GEM_DOMAIN_VRAM@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RADEON_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh17:
	ldr	w4, [x8]
	str	x19, [sp]
	mov	x0, x20
	mov	x1, x22
	mov	x2, x21
	mov	w3, #1
	mov	w5, #0
	mov	x6, #0
	mov	x7, #0
	bl	_radeon_bo_create
	mov	x21, x0
	cbnz	w0, LBB0_7
; %bb.4:
	ldr	x1, [x19]
	mov	x0, x20
	bl	_radeon_vm_clear_bo
	mov	x21, x0
	cbz	w0, LBB0_7
; %bb.5:
	mov	x0, x19
	bl	_radeon_bo_unref
	str	xzr, [x19]
	b	LBB0_7
LBB0_6:
Lloh18:
	adrp	x0, l_.str@PAGE
Lloh19:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
Lloh20:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh21:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_7:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_VM_PTB_ALIGN_SIZE,4,2   ; @RADEON_VM_PTB_ALIGN_SIZE
	.comm	_RADEON_VM_PTE_COUNT,4,2        ; @RADEON_VM_PTE_COUNT
	.comm	_RADEON_NUM_RINGS,4,2           ; @RADEON_NUM_RINGS
	.comm	_RB_ROOT_CACHED,4,2             ; @RB_ROOT_CACHED
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Cannot allocate memory for page table array\n"

	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_RADEON_GEM_DOMAIN_VRAM,4,2     ; @RADEON_GEM_DOMAIN_VRAM
.subsections_via_symbols
