	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vm_make_compute         ## -- Begin function amdgpu_vm_make_compute
	.p2align	4, 0x90
_amdgpu_vm_make_compute:                ## @amdgpu_vm_make_compute
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movq	%rsi, %r12
	movq	%rdi, %r15
	movq	(%rdi), %rax
	movq	_CHIP_RAVEN@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	sete	%r13b
	movq	16(%rsi), %rdi
	movl	$1, %esi
	callq	_amdgpu_bo_reserve
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_19
## %bb.1:
	movb	%r13b, -41(%rbp)                ## 1-byte Spill
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_amdgpu_vm_check_clean_reserved
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_2
LBB0_18:
	movq	16(%r12), %rdi
	callq	_amdgpu_bo_unreserve
LBB0_19:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	testl	%r14d, %r14d
	je	LBB0_4
## %bb.3:
	leaq	12(%r15), %r13
	movq	%r13, %rdi
	callq	_spin_lock_irqsave
	leaq	16(%r15), %rdi
	movq	%r14, %rdx
	leal	1(%r14), %ecx
	movq	_GFP_ATOMIC@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%r12, %rsi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_idr_alloc
	movl	%eax, %ebx
	movq	%r13, %rdi
	callq	_spin_unlock_irqrestore
	movq	_ENOSPC@GOTPCREL(%rip), %rax
	movl	%ebx, %ecx
	addl	(%rax), %ecx
	je	LBB0_18
LBB0_4:
	movb	-41(%rbp), %al                  ## 1-byte Reload
	xorl	%ecx, %ecx
	movb	%al, %cl
	cmpl	%ecx, (%r12)
	je	LBB0_6
## %bb.5:
	movl	%ecx, (%r12)
	movq	16(%r12), %rdx
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_amdgpu_vm_clear_bo
	testl	%eax, %eax
	je	LBB0_6
## %bb.16:
	movl	%eax, %ebx
	testl	%r14d, %r14d
	je	LBB0_18
## %bb.17:
	leaq	12(%r15), %r13
	movq	%r13, %rdi
	callq	_spin_lock_irqsave
	addq	$16, %r15
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_idr_remove
	movq	%r13, %rdi
	callq	_spin_unlock_irqrestore
	jmp	LBB0_18
LBB0_6:
	movq	_AMDGPU_VM_USE_CPU_FOR_COMPUTE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	andl	8(%r15), %eax
	setne	%cl
	movl	%ecx, 4(%r12)
	leaq	L_.str.1(%rip), %rax
	leaq	L_.str.2(%rip), %rsi
	cmovneq	%rax, %rsi
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_DRIVER
	cmpl	$0, 4(%r12)
	je	LBB0_7
## %bb.8:
	leaq	20(%r15), %rdi
	callq	_amdgpu_gmc_vram_full_visible
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	jmp	LBB0_9
LBB0_7:
	xorl	%edi, %edi
LBB0_9:
	leaq	L_.str.3(%rip), %rsi
	callq	_WARN_ONCE
	cmpl	$0, 4(%r12)
	jne	LBB0_10
## %bb.11:
	movq	_amdgpu_vm_sdma_funcs@GOTPCREL(%rip), %rax
	jmp	LBB0_12
LBB0_10:
	movq	_amdgpu_vm_cpu_funcs@GOTPCREL(%rip), %rax
LBB0_12:
	movq	%rax, 32(%r12)
	movq	24(%r12), %rdi
	callq	_dma_fence_put
	movq	$0, 24(%r12)
	cmpl	$0, 8(%r12)
	je	LBB0_14
## %bb.13:
	leaq	12(%r15), %rbx
	movq	%rbx, %rdi
	callq	_spin_lock_irqsave
	addq	$16, %r15
	movl	8(%r12), %esi
	movq	%r15, %rdi
	callq	_idr_remove
	movq	%rbx, %rdi
	callq	_spin_unlock_irqrestore
	movl	8(%r12), %edi
	callq	_amdgpu_pasid_free
	movl	$0, 8(%r12)
LBB0_14:
	movq	16(%r12), %rdi
	callq	_amdgpu_bo_unref
	xorl	%ebx, %ebx
	testl	%r14d, %r14d
	je	LBB0_18
## %bb.15:
	movl	%r14d, 8(%r12)
	jmp	LBB0_18
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_RAVEN,8,3                 ## @CHIP_RAVEN
	.comm	_GFP_ATOMIC,4,2                 ## @GFP_ATOMIC
	.comm	_ENOSPC,4,2                     ## @ENOSPC
	.comm	_AMDGPU_VM_USE_CPU_FOR_COMPUTE,4,2 ## @AMDGPU_VM_USE_CPU_FOR_COMPUTE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"VM update mode is %s\n"

L_.str.1:                               ## @.str.1
	.asciz	"CPU"

L_.str.2:                               ## @.str.2
	.asciz	"SDMA"

L_.str.3:                               ## @.str.3
	.asciz	"CPU update of VM recommended only for large BAR system\n"

	.comm	_amdgpu_vm_cpu_funcs,4,2        ## @amdgpu_vm_cpu_funcs
	.comm	_amdgpu_vm_sdma_funcs,4,2       ## @amdgpu_vm_sdma_funcs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vm_make_compute         ; -- Begin function amdgpu_vm_make_compute
	.p2align	2
_amdgpu_vm_make_compute:                ; @amdgpu_vm_make_compute
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x2
	mov	x19, x1
	mov	x21, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _CHIP_RAVEN@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_RAVEN@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	cset	w24, eq
	ldr	x0, [x1, #16]
	mov	w1, #1
	bl	_amdgpu_bo_reserve
	mov	x22, x0
	cbnz	w0, LBB0_3
; %bb.1:
	mov	x0, x21
	mov	x1, x19
	bl	_amdgpu_vm_check_clean_reserved
	mov	x22, x0
	cbz	w0, LBB0_4
LBB0_2:
	ldr	x0, [x19, #16]
	bl	_amdgpu_bo_unreserve
LBB0_3:
	mov	x0, x22
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_4:
	cbz	w20, LBB0_6
; %bb.5:
	add	x23, x21, #12
	mov	x0, x23
	bl	_spin_lock_irqsave
	add	x0, x21, #16
	add	w3, w20, #1
Lloh3:
	adrp	x8, _GFP_ATOMIC@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GFP_ATOMIC@GOTPAGEOFF]
Lloh5:
	ldr	w4, [x8]
	mov	x1, x19
	mov	x2, x20
	bl	_idr_alloc
	mov	x22, x0
	mov	x0, x23
	bl	_spin_unlock_irqrestore
Lloh6:
	adrp	x8, _ENOSPC@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ENOSPC@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmn	w22, w8
	b.eq	LBB0_2
LBB0_6:
	ldr	w8, [x19]
	cmp	w8, w24
	b.eq	LBB0_10
; %bb.7:
	str	w24, [x19]
	ldr	x2, [x19, #16]
	mov	x0, x21
	mov	x1, x19
	bl	_amdgpu_vm_clear_bo
	cbz	w0, LBB0_10
; %bb.8:
	mov	x22, x0
	cbz	w20, LBB0_2
; %bb.9:
	add	x23, x21, #12
	mov	x0, x23
	bl	_spin_lock_irqsave
	add	x0, x21, #16
	mov	x1, x20
	bl	_idr_remove
	mov	x0, x23
	bl	_spin_unlock_irqrestore
	b	LBB0_2
LBB0_10:
	ldr	w8, [x21, #8]
Lloh9:
	adrp	x9, _AMDGPU_VM_USE_CPU_FOR_COMPUTE@GOTPAGE
Lloh10:
	ldr	x9, [x9, _AMDGPU_VM_USE_CPU_FOR_COMPUTE@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w8, ne
	str	w8, [x19, #4]
Lloh12:
	adrp	x8, l_.str.2@PAGE
Lloh13:
	add	x8, x8, l_.str.2@PAGEOFF
Lloh14:
	adrp	x9, l_.str.1@PAGE
Lloh15:
	add	x9, x9, l_.str.1@PAGEOFF
	csel	x1, x9, x8, ne
Lloh16:
	adrp	x0, l_.str@PAGE
Lloh17:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
	ldr	w8, [x19, #4]
	cbz	w8, LBB0_12
; %bb.11:
	add	x0, x21, #20
	bl	_amdgpu_gmc_vram_full_visible
	cmp	w0, #0
	cset	w0, eq
	b	LBB0_13
LBB0_12:
	mov	w0, #0
LBB0_13:
Lloh18:
	adrp	x1, l_.str.3@PAGE
Lloh19:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_WARN_ONCE
	ldr	w8, [x19, #4]
Lloh20:
	adrp	x9, _amdgpu_vm_cpu_funcs@GOTPAGE
Lloh21:
	ldr	x9, [x9, _amdgpu_vm_cpu_funcs@GOTPAGEOFF]
Lloh22:
	adrp	x10, _amdgpu_vm_sdma_funcs@GOTPAGE
Lloh23:
	ldr	x10, [x10, _amdgpu_vm_sdma_funcs@GOTPAGEOFF]
	cmp	w8, #0
	csel	x8, x10, x9, eq
	str	x8, [x19, #32]
	ldr	x0, [x19, #24]
	bl	_dma_fence_put
	str	xzr, [x19, #24]
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_15
; %bb.14:
	add	x22, x21, #12
	mov	x0, x22
	bl	_spin_lock_irqsave
	add	x0, x21, #16
	ldr	w1, [x19, #8]
	bl	_idr_remove
	mov	x0, x22
	bl	_spin_unlock_irqrestore
	ldr	w0, [x19, #8]
	bl	_amdgpu_pasid_free
	str	wzr, [x19, #8]
LBB0_15:
	ldr	x0, [x19, #16]
	bl	_amdgpu_bo_unref
	mov	w22, #0
	cbz	w20, LBB0_2
; %bb.16:
	str	w20, [x19, #8]
	b	LBB0_2
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpAdd	Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_RAVEN,8,3                 ; @CHIP_RAVEN
	.comm	_GFP_ATOMIC,4,2                 ; @GFP_ATOMIC
	.comm	_ENOSPC,4,2                     ; @ENOSPC
	.comm	_AMDGPU_VM_USE_CPU_FOR_COMPUTE,4,2 ; @AMDGPU_VM_USE_CPU_FOR_COMPUTE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"VM update mode is %s\n"

l_.str.1:                               ; @.str.1
	.asciz	"CPU"

l_.str.2:                               ; @.str.2
	.asciz	"SDMA"

l_.str.3:                               ; @.str.3
	.asciz	"CPU update of VM recommended only for large BAR system\n"

	.comm	_amdgpu_vm_cpu_funcs,4,2        ; @amdgpu_vm_cpu_funcs
	.comm	_amdgpu_vm_sdma_funcs,4,2       ; @amdgpu_vm_sdma_funcs
.subsections_via_symbols
