	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vc4_vec_encoder_enable
_vc4_vec_encoder_enable:                ## @vc4_vec_encoder_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_to_vc4_vec_encoder
	movq	(%rax), %rbx
	movq	16(%rbx), %rdi
	callq	_pm_runtime_get_sync
	testl	%eax, %eax
	js	LBB0_1
## %bb.3:
	movl	8(%rbx), %edi
	movl	$108000000, %esi                ## imm = 0x66FF300
	callq	_clk_set_rate
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_2
LBB0_1:
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_2
LBB0_5:
	movl	8(%rbx), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_7
## %bb.6:
	leaq	L_.str.2(%rip), %rdi
LBB0_2:
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DRM_ERROR                      ## TAILCALL
LBB0_7:
	movq	_VEC_WSE_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_VEC_WRITE
	movq	_VEC_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_VEC_WRITE
	movq	_VEC_WSE_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_VEC_WRITE
	movq	_VEC_SCHPH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$40, %esi
	callq	_VEC_WRITE
	movq	_VEC_CLMP0_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$172, %esi
	callq	_VEC_WRITE
	movq	_VEC_CLMP0_END@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$236, %esi
	callq	_VEC_WRITE
	movq	_VEC_CONFIG2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_VEC_CONFIG2_UV_DIG_DIS@GOTPCREL(%rip), %rax
	movq	_VEC_CONFIG2_RGB_DIG_DIS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	callq	_VEC_WRITE
	movq	_VEC_CONFIG3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_VEC_CONFIG3_HORIZ_LEN_STD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VEC_WRITE
	movq	_VEC_DAC_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	$12, %edi
	callq	_VEC_DAC_CONFIG_DAC_CTRL
	movl	%eax, %r15d
	movl	$12, %edi
	callq	_VEC_DAC_CONFIG_DRIVER_CTRL
	orl	%eax, %r15d
	movl	$70, %edi
	callq	_VEC_DAC_CONFIG_LDO_BIAS_CTRL
	orl	%eax, %r15d
	movl	%r14d, %edi
	movl	%r15d, %esi
	callq	_VEC_WRITE
	movq	_VEC_MASK0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_VEC_WRITE
	movq	(%rbx), %rax
	movq	%rbx, %rdi
	callq	*(%rax)
	movq	_VEC_DAC_MISC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_VEC_DAC_MISC_VID_ACT@GOTPCREL(%rip), %rax
	movq	_VEC_DAC_MISC_DAC_RST_N@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	callq	_VEC_WRITE
	movq	_VEC_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_VEC_CFG_VEC_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_VEC_WRITE                      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to retain power domain: %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to set clock rate: %d\n"

L_.str.2:                               ## @.str.2
	.asciz	"Failed to turn on core clock: %d\n"

	.comm	_VEC_WSE_RESET,4,2              ## @VEC_WSE_RESET
	.comm	_VEC_SOFT_RESET,4,2             ## @VEC_SOFT_RESET
	.comm	_VEC_WSE_CONTROL,4,2            ## @VEC_WSE_CONTROL
	.comm	_VEC_SCHPH,4,2                  ## @VEC_SCHPH
	.comm	_VEC_CLMP0_START,4,2            ## @VEC_CLMP0_START
	.comm	_VEC_CLMP0_END,4,2              ## @VEC_CLMP0_END
	.comm	_VEC_CONFIG2,4,2                ## @VEC_CONFIG2
	.comm	_VEC_CONFIG2_UV_DIG_DIS,4,2     ## @VEC_CONFIG2_UV_DIG_DIS
	.comm	_VEC_CONFIG2_RGB_DIG_DIS,4,2    ## @VEC_CONFIG2_RGB_DIG_DIS
	.comm	_VEC_CONFIG3,4,2                ## @VEC_CONFIG3
	.comm	_VEC_CONFIG3_HORIZ_LEN_STD,4,2  ## @VEC_CONFIG3_HORIZ_LEN_STD
	.comm	_VEC_DAC_CONFIG,4,2             ## @VEC_DAC_CONFIG
	.comm	_VEC_MASK0,4,2                  ## @VEC_MASK0
	.comm	_VEC_DAC_MISC,4,2               ## @VEC_DAC_MISC
	.comm	_VEC_DAC_MISC_VID_ACT,4,2       ## @VEC_DAC_MISC_VID_ACT
	.comm	_VEC_DAC_MISC_DAC_RST_N,4,2     ## @VEC_DAC_MISC_DAC_RST_N
	.comm	_VEC_CFG,4,2                    ## @VEC_CFG
	.comm	_VEC_CFG_VEC_EN,4,2             ## @VEC_CFG_VEC_EN
	.no_dead_strip	_vc4_vec_encoder_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vc4_vec_encoder_enable
_vc4_vec_encoder_enable:                ; @vc4_vec_encoder_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_to_vc4_vec_encoder
	ldr	x19, [x0]
	ldr	x0, [x19, #16]
	bl	_pm_runtime_get_sync
	tbnz	w0, #31, LBB0_3
; %bb.1:
	ldr	w0, [x19, #8]
	mov	w1, #62208
	movk	w1, #1647, lsl #16
	bl	_clk_set_rate
	cbz	w0, LBB0_4
; %bb.2:
	mov	x1, x0
Lloh0:
	adrp	x0, l_.str.1@PAGE
Lloh1:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_6
LBB0_3:
	mov	x1, x0
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_6
LBB0_4:
	ldr	w0, [x19, #8]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_7
; %bb.5:
	mov	x1, x0
Lloh4:
	adrp	x0, l_.str.2@PAGE
Lloh5:
	add	x0, x0, l_.str.2@PAGEOFF
LBB0_6:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_DRM_ERROR
LBB0_7:
Lloh6:
	adrp	x8, _VEC_WSE_RESET@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VEC_WSE_RESET@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	mov	w1, #1
	bl	_VEC_WRITE
Lloh9:
	adrp	x8, _VEC_SOFT_RESET@GOTPAGE
Lloh10:
	ldr	x8, [x8, _VEC_SOFT_RESET@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	mov	w1, #1
	bl	_VEC_WRITE
Lloh12:
	adrp	x8, _VEC_WSE_CONTROL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VEC_WSE_CONTROL@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_VEC_WRITE
Lloh15:
	adrp	x8, _VEC_SCHPH@GOTPAGE
Lloh16:
	ldr	x8, [x8, _VEC_SCHPH@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	mov	w1, #40
	bl	_VEC_WRITE
Lloh18:
	adrp	x8, _VEC_CLMP0_START@GOTPAGE
Lloh19:
	ldr	x8, [x8, _VEC_CLMP0_START@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	mov	w1, #172
	bl	_VEC_WRITE
Lloh21:
	adrp	x8, _VEC_CLMP0_END@GOTPAGE
Lloh22:
	ldr	x8, [x8, _VEC_CLMP0_END@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
	mov	w1, #236
	bl	_VEC_WRITE
Lloh24:
	adrp	x8, _VEC_CONFIG2@GOTPAGE
Lloh25:
	ldr	x8, [x8, _VEC_CONFIG2@GOTPAGEOFF]
Lloh26:
	adrp	x9, _VEC_CONFIG2_UV_DIG_DIS@GOTPAGE
Lloh27:
	ldr	x9, [x9, _VEC_CONFIG2_UV_DIG_DIS@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
Lloh29:
	ldr	w8, [x9]
Lloh30:
	adrp	x9, _VEC_CONFIG2_RGB_DIG_DIS@GOTPAGE
Lloh31:
	ldr	x9, [x9, _VEC_CONFIG2_RGB_DIG_DIS@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_VEC_WRITE
Lloh33:
	adrp	x8, _VEC_CONFIG3@GOTPAGE
Lloh34:
	ldr	x8, [x8, _VEC_CONFIG3@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
Lloh36:
	adrp	x8, _VEC_CONFIG3_HORIZ_LEN_STD@GOTPAGE
Lloh37:
	ldr	x8, [x8, _VEC_CONFIG3_HORIZ_LEN_STD@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	bl	_VEC_WRITE
Lloh39:
	adrp	x8, _VEC_DAC_CONFIG@GOTPAGE
Lloh40:
	ldr	x8, [x8, _VEC_DAC_CONFIG@GOTPAGEOFF]
Lloh41:
	ldr	w20, [x8]
	mov	w0, #12
	bl	_VEC_DAC_CONFIG_DAC_CTRL
	mov	x21, x0
	mov	w0, #12
	bl	_VEC_DAC_CONFIG_DRIVER_CTRL
	orr	w21, w0, w21
	mov	w0, #70
	bl	_VEC_DAC_CONFIG_LDO_BIAS_CTRL
	orr	w1, w21, w0
	mov	x0, x20
	bl	_VEC_WRITE
Lloh42:
	adrp	x8, _VEC_MASK0@GOTPAGE
Lloh43:
	ldr	x8, [x8, _VEC_MASK0@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_VEC_WRITE
	ldr	x8, [x19]
	ldr	x8, [x8]
	mov	x0, x19
	blr	x8
Lloh45:
	adrp	x8, _VEC_DAC_MISC@GOTPAGE
Lloh46:
	ldr	x8, [x8, _VEC_DAC_MISC@GOTPAGEOFF]
Lloh47:
	adrp	x9, _VEC_DAC_MISC_VID_ACT@GOTPAGE
Lloh48:
	ldr	x9, [x9, _VEC_DAC_MISC_VID_ACT@GOTPAGEOFF]
Lloh49:
	ldr	w0, [x8]
Lloh50:
	ldr	w8, [x9]
Lloh51:
	adrp	x9, _VEC_DAC_MISC_DAC_RST_N@GOTPAGE
Lloh52:
	ldr	x9, [x9, _VEC_DAC_MISC_DAC_RST_N@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_VEC_WRITE
Lloh54:
	adrp	x8, _VEC_CFG@GOTPAGE
Lloh55:
	ldr	x8, [x8, _VEC_CFG@GOTPAGEOFF]
Lloh56:
	ldr	w0, [x8]
Lloh57:
	adrp	x8, _VEC_CFG_VEC_EN@GOTPAGE
Lloh58:
	ldr	x8, [x8, _VEC_CFG_VEC_EN@GOTPAGEOFF]
Lloh59:
	ldr	w1, [x8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_VEC_WRITE
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh49
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh28
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to retain power domain: %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to set clock rate: %d\n"

l_.str.2:                               ; @.str.2
	.asciz	"Failed to turn on core clock: %d\n"

	.comm	_VEC_WSE_RESET,4,2              ; @VEC_WSE_RESET
	.comm	_VEC_SOFT_RESET,4,2             ; @VEC_SOFT_RESET
	.comm	_VEC_WSE_CONTROL,4,2            ; @VEC_WSE_CONTROL
	.comm	_VEC_SCHPH,4,2                  ; @VEC_SCHPH
	.comm	_VEC_CLMP0_START,4,2            ; @VEC_CLMP0_START
	.comm	_VEC_CLMP0_END,4,2              ; @VEC_CLMP0_END
	.comm	_VEC_CONFIG2,4,2                ; @VEC_CONFIG2
	.comm	_VEC_CONFIG2_UV_DIG_DIS,4,2     ; @VEC_CONFIG2_UV_DIG_DIS
	.comm	_VEC_CONFIG2_RGB_DIG_DIS,4,2    ; @VEC_CONFIG2_RGB_DIG_DIS
	.comm	_VEC_CONFIG3,4,2                ; @VEC_CONFIG3
	.comm	_VEC_CONFIG3_HORIZ_LEN_STD,4,2  ; @VEC_CONFIG3_HORIZ_LEN_STD
	.comm	_VEC_DAC_CONFIG,4,2             ; @VEC_DAC_CONFIG
	.comm	_VEC_MASK0,4,2                  ; @VEC_MASK0
	.comm	_VEC_DAC_MISC,4,2               ; @VEC_DAC_MISC
	.comm	_VEC_DAC_MISC_VID_ACT,4,2       ; @VEC_DAC_MISC_VID_ACT
	.comm	_VEC_DAC_MISC_DAC_RST_N,4,2     ; @VEC_DAC_MISC_DAC_RST_N
	.comm	_VEC_CFG,4,2                    ; @VEC_CFG
	.comm	_VEC_CFG_VEC_EN,4,2             ; @VEC_CFG_VEC_EN
	.no_dead_strip	_vc4_vec_encoder_enable
.subsections_via_symbols
