	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_uvd_cs_reg
_radeon_uvd_cs_reg:                     ## @radeon_uvd_cs_reg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r9, -64(%rbp)                  ## 8-byte Spill
	movq	%r8, -56(%rbp)                  ## 8-byte Spill
	movl	(%rdi), %eax
	incl	%eax
	movl	%eax, (%rdi)
	cmpl	$0, (%rsi)
	js	LBB0_9
## %bb.1:
	movq	%rcx, %r8
	movq	%rdx, %r13
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	$-1, %r12d
	xorl	%r15d, %r15d
	leaq	LJTI0_0(%rip), %rsi
	movq	%rcx, -48(%rbp)                 ## 8-byte Spill
	jmp	LBB0_2
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	%r8, %rcx
LBB0_7:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	%eax, (%rcx)
LBB0_8:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r14), %eax
	incl	%eax
	movl	%eax, (%r14)
	incl	%r12d
	addl	$4, %r15d
	cmpl	(%rbx), %r12d
	jge	LBB0_9
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	4(%rbx), %ecx
	leal	(%r15,%rcx), %edx
	addl	$-128, %edx
	cmpl	$4, %edx
	ja	LBB0_5
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movslq	(%rsi,%rdx,4), %rdx
	addq	%rsi, %rdx
	movq	%r13, %rcx
	jmpq	*%rdx
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r13), %esi
	movl	(%r8), %edx
	movq	%r14, %rdi
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movq	-64(%rbp), %r8                  ## 8-byte Reload
	callq	_radeon_uvd_cs_reloc
	leaq	LJTI0_0(%rip), %rsi
	movq	-48(%rbp), %r8                  ## 8-byte Reload
	testl	%eax, %eax
	je	LBB0_8
	jmp	LBB0_10
LBB0_9:
	xorl	%eax, %eax
LBB0_10:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	addl	%ecx, %r15d
	leaq	L_.str(%rip), %rdi
	movl	%r15d, %esi
	callq	_DRM_ERROR
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_10
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
LJTI0_0:
	.long	L0_0_set_8
	.long	L0_0_set_6
	.long	L0_0_set_7
	.long	L0_0_set_4
	.long	L0_0_set_8
	.end_data_region
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Invalid reg 0x%X!\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_radeon_uvd_cs_reg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_uvd_cs_reg
_radeon_uvd_cs_reg:                     ; @radeon_uvd_cs_reg
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0]
	add	w8, w8, #1
	str	w8, [x0]
	ldr	w9, [x1]
	tbnz	w9, #31, LBB0_8
; %bb.1:
	mov	x19, x5
	mov	x20, x4
	mov	x21, x3
	mov	x22, x2
	mov	x23, x1
	mov	x24, x0
	mov	w25, #0
	mov	w26, #-1
Lloh0:
	adrp	x27, lJTI0_0@PAGE
Lloh1:
	add	x27, x27, lJTI0_0@PAGEOFF
	b	LBB0_5
LBB0_2:                                 ;   in Loop: Header=BB0_5 Depth=1
	mov	x9, x21
LBB0_3:                                 ;   in Loop: Header=BB0_5 Depth=1
	str	w8, [x9]
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
	ldr	w8, [x24]
	add	w8, w8, #1
	str	w8, [x24]
	ldr	w9, [x23]
	add	w26, w26, #1
	add	w25, w25, #4
	cmp	w26, w9
	b.ge	LBB0_8
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w9, [x23, #4]
	add	w1, w25, w9
	sub	w9, w1, #128
	cmp	w9, #4
	b.hi	LBB0_10
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	adr	x10, LBB0_2
	ldrb	w11, [x27, x9]
	add	x10, x10, x11, lsl #2
	mov	x9, x22
	br	x10
LBB0_7:                                 ;   in Loop: Header=BB0_5 Depth=1
	ldr	w1, [x22]
	ldr	w2, [x21]
	mov	x0, x24
	mov	x3, x20
	mov	x4, x19
	bl	_radeon_uvd_cs_reloc
	cbz	w0, LBB0_4
	b	LBB0_9
LBB0_8:
	mov	w0, #0
LBB0_9:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_10:
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
Lloh4:
	adrp	x8, _EINVAL@GOTPAGE
Lloh5:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_9
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh2, Lloh3
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Invalid reg 0x%X!\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_radeon_uvd_cs_reg
.subsections_via_symbols
