	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function skl_pipe_crc_ctl_reg
_skl_pipe_crc_ctl_reg:                  ## @skl_pipe_crc_ctl_reg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	(%rdx), %eax
	movq	_INTEL_PIPE_CRC_SOURCE_AUTO@GOTPCREL(%rip), %rsi
	cmpl	(%rsi), %eax
	jne	LBB0_4
## %bb.1:
	movl	$135, (%rdx)
LBB0_2:
	movq	_PIPE_CRC_ENABLE@GOTPCREL(%rip), %rax
	movq	_PIPE_CRC_SOURCE_DMUX_SKL@GOTPCREL(%rip), %rdx
LBB0_3:
	movl	(%rdx), %edx
	orl	(%rax), %edx
	movl	%edx, (%rcx)
LBB0_15:
	xorl	%eax, %eax
	popq	%rbp
	retq
LBB0_4:
	addl	$-128, %eax
	cmpl	$8, %eax
	ja	LBB0_7
## %bb.5:
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%rax,4), %rax
	addq	%rdx, %rax
	jmpq	*%rax
LBB0_6:
	movq	_PIPE_CRC_ENABLE@GOTPCREL(%rip), %rax
	movq	_PIPE_CRC_SOURCE_PLANE_7_SKL@GOTPCREL(%rip), %rdx
	jmp	LBB0_3
LBB0_7:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	popq	%rbp
	retq
LBB0_8:
	movq	_PIPE_CRC_ENABLE@GOTPCREL(%rip), %rax
	movq	_PIPE_CRC_SOURCE_PLANE_6_SKL@GOTPCREL(%rip), %rdx
	jmp	LBB0_3
LBB0_9:
	movq	_PIPE_CRC_ENABLE@GOTPCREL(%rip), %rax
	movq	_PIPE_CRC_SOURCE_PLANE_5_SKL@GOTPCREL(%rip), %rdx
	jmp	LBB0_3
LBB0_10:
	movq	_PIPE_CRC_ENABLE@GOTPCREL(%rip), %rax
	movq	_PIPE_CRC_SOURCE_PLANE_4_SKL@GOTPCREL(%rip), %rdx
	jmp	LBB0_3
LBB0_11:
	movq	_PIPE_CRC_ENABLE@GOTPCREL(%rip), %rax
	movq	_PIPE_CRC_SOURCE_PLANE_3_SKL@GOTPCREL(%rip), %rdx
	jmp	LBB0_3
LBB0_12:
	movq	_PIPE_CRC_ENABLE@GOTPCREL(%rip), %rax
	movq	_PIPE_CRC_SOURCE_PLANE_2_SKL@GOTPCREL(%rip), %rdx
	jmp	LBB0_3
LBB0_13:
	movq	_PIPE_CRC_ENABLE@GOTPCREL(%rip), %rax
	movq	_PIPE_CRC_SOURCE_PLANE_1_SKL@GOTPCREL(%rip), %rdx
	jmp	LBB0_3
LBB0_14:
	movl	$0, (%rcx)
	jmp	LBB0_15
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_12, LBB0_12-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
LJTI0_0:
	.long	L0_0_set_6
	.long	L0_0_set_8
	.long	L0_0_set_9
	.long	L0_0_set_10
	.long	L0_0_set_11
	.long	L0_0_set_12
	.long	L0_0_set_13
	.long	L0_0_set_2
	.long	L0_0_set_14
	.end_data_region
                                        ## -- End function
	.comm	_INTEL_PIPE_CRC_SOURCE_AUTO,4,2 ## @INTEL_PIPE_CRC_SOURCE_AUTO
	.comm	_PIPE_CRC_ENABLE,4,2            ## @PIPE_CRC_ENABLE
	.comm	_PIPE_CRC_SOURCE_PLANE_1_SKL,4,2 ## @PIPE_CRC_SOURCE_PLANE_1_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_2_SKL,4,2 ## @PIPE_CRC_SOURCE_PLANE_2_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_3_SKL,4,2 ## @PIPE_CRC_SOURCE_PLANE_3_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_4_SKL,4,2 ## @PIPE_CRC_SOURCE_PLANE_4_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_5_SKL,4,2 ## @PIPE_CRC_SOURCE_PLANE_5_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_6_SKL,4,2 ## @PIPE_CRC_SOURCE_PLANE_6_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_7_SKL,4,2 ## @PIPE_CRC_SOURCE_PLANE_7_SKL
	.comm	_PIPE_CRC_SOURCE_DMUX_SKL,4,2   ## @PIPE_CRC_SOURCE_DMUX_SKL
	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_skl_pipe_crc_ctl_reg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function skl_pipe_crc_ctl_reg
_skl_pipe_crc_ctl_reg:                  ; @skl_pipe_crc_ctl_reg
	.cfi_startproc
; %bb.0:
	ldr	w8, [x2]
Lloh0:
	adrp	x9, _INTEL_PIPE_CRC_SOURCE_AUTO@GOTPAGE
Lloh1:
	ldr	x9, [x9, _INTEL_PIPE_CRC_SOURCE_AUTO@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_4
; %bb.1:
	mov	w8, #135
	str	w8, [x2]
LBB0_2:
	mov	w0, #0
Lloh3:
	adrp	x8, _PIPE_CRC_ENABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PIPE_CRC_ENABLE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _PIPE_CRC_SOURCE_DMUX_SKL@GOTPAGE
Lloh7:
	ldr	x9, [x9, _PIPE_CRC_SOURCE_DMUX_SKL@GOTPAGEOFF]
LBB0_3:
	ldr	w9, [x9]
	orr	w8, w9, w8
	str	w8, [x3]
	ret
LBB0_4:
	sub	w8, w8, #128
	cmp	w8, #8
	b.hi	LBB0_7
; %bb.5:
Lloh8:
	adrp	x9, lJTI0_0@PAGE
Lloh9:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_6:
	mov	w0, #0
Lloh10:
	adrp	x8, _PIPE_CRC_ENABLE@GOTPAGE
Lloh11:
	ldr	x8, [x8, _PIPE_CRC_ENABLE@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
Lloh13:
	adrp	x9, _PIPE_CRC_SOURCE_PLANE_7_SKL@GOTPAGE
Lloh14:
	ldr	x9, [x9, _PIPE_CRC_SOURCE_PLANE_7_SKL@GOTPAGEOFF]
	b	LBB0_3
LBB0_7:
Lloh15:
	adrp	x8, _EINVAL@GOTPAGE
Lloh16:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	neg	w0, w8
	ret
LBB0_8:
	mov	w0, #0
Lloh18:
	adrp	x8, _PIPE_CRC_ENABLE@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PIPE_CRC_ENABLE@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
Lloh21:
	adrp	x9, _PIPE_CRC_SOURCE_PLANE_6_SKL@GOTPAGE
Lloh22:
	ldr	x9, [x9, _PIPE_CRC_SOURCE_PLANE_6_SKL@GOTPAGEOFF]
	b	LBB0_3
LBB0_9:
	mov	w0, #0
Lloh23:
	adrp	x8, _PIPE_CRC_ENABLE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PIPE_CRC_ENABLE@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
Lloh26:
	adrp	x9, _PIPE_CRC_SOURCE_PLANE_5_SKL@GOTPAGE
Lloh27:
	ldr	x9, [x9, _PIPE_CRC_SOURCE_PLANE_5_SKL@GOTPAGEOFF]
	b	LBB0_3
LBB0_10:
	mov	w0, #0
Lloh28:
	adrp	x8, _PIPE_CRC_ENABLE@GOTPAGE
Lloh29:
	ldr	x8, [x8, _PIPE_CRC_ENABLE@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
Lloh31:
	adrp	x9, _PIPE_CRC_SOURCE_PLANE_4_SKL@GOTPAGE
Lloh32:
	ldr	x9, [x9, _PIPE_CRC_SOURCE_PLANE_4_SKL@GOTPAGEOFF]
	b	LBB0_3
LBB0_11:
	mov	w0, #0
Lloh33:
	adrp	x8, _PIPE_CRC_ENABLE@GOTPAGE
Lloh34:
	ldr	x8, [x8, _PIPE_CRC_ENABLE@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
Lloh36:
	adrp	x9, _PIPE_CRC_SOURCE_PLANE_3_SKL@GOTPAGE
Lloh37:
	ldr	x9, [x9, _PIPE_CRC_SOURCE_PLANE_3_SKL@GOTPAGEOFF]
	b	LBB0_3
LBB0_12:
	mov	w0, #0
Lloh38:
	adrp	x8, _PIPE_CRC_ENABLE@GOTPAGE
Lloh39:
	ldr	x8, [x8, _PIPE_CRC_ENABLE@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
Lloh41:
	adrp	x9, _PIPE_CRC_SOURCE_PLANE_2_SKL@GOTPAGE
Lloh42:
	ldr	x9, [x9, _PIPE_CRC_SOURCE_PLANE_2_SKL@GOTPAGEOFF]
	b	LBB0_3
LBB0_13:
	mov	w0, #0
Lloh43:
	adrp	x8, _PIPE_CRC_ENABLE@GOTPAGE
Lloh44:
	ldr	x8, [x8, _PIPE_CRC_ENABLE@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
Lloh46:
	adrp	x9, _PIPE_CRC_SOURCE_PLANE_1_SKL@GOTPAGE
Lloh47:
	ldr	x9, [x9, _PIPE_CRC_SOURCE_PLANE_1_SKL@GOTPAGEOFF]
	b	LBB0_3
LBB0_14:
	mov	w0, #0
	str	wzr, [x3]
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_8-LBB0_2)>>2
	.byte	(LBB0_9-LBB0_2)>>2
	.byte	(LBB0_10-LBB0_2)>>2
	.byte	(LBB0_11-LBB0_2)>>2
	.byte	(LBB0_12-LBB0_2)>>2
	.byte	(LBB0_13-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_14-LBB0_2)>>2
                                        ; -- End function
	.comm	_INTEL_PIPE_CRC_SOURCE_AUTO,4,2 ; @INTEL_PIPE_CRC_SOURCE_AUTO
	.comm	_PIPE_CRC_ENABLE,4,2            ; @PIPE_CRC_ENABLE
	.comm	_PIPE_CRC_SOURCE_PLANE_1_SKL,4,2 ; @PIPE_CRC_SOURCE_PLANE_1_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_2_SKL,4,2 ; @PIPE_CRC_SOURCE_PLANE_2_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_3_SKL,4,2 ; @PIPE_CRC_SOURCE_PLANE_3_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_4_SKL,4,2 ; @PIPE_CRC_SOURCE_PLANE_4_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_5_SKL,4,2 ; @PIPE_CRC_SOURCE_PLANE_5_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_6_SKL,4,2 ; @PIPE_CRC_SOURCE_PLANE_6_SKL
	.comm	_PIPE_CRC_SOURCE_PLANE_7_SKL,4,2 ; @PIPE_CRC_SOURCE_PLANE_7_SKL
	.comm	_PIPE_CRC_SOURCE_DMUX_SKL,4,2   ; @PIPE_CRC_SOURCE_DMUX_SKL
	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_skl_pipe_crc_ctl_reg
.subsections_via_symbols
