	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_gfx_mqd_sw_fini         ## -- Begin function amdgpu_gfx_mqd_sw_fini
	.p2align	4, 0x90
_amdgpu_gfx_mqd_sw_fini:                ## @amdgpu_gfx_mqd_sw_fini
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	(%rdi), %rax
	movq	_CHIP_NAVI10@GOTPCREL(%rip), %r15
	cmpq	(%r15), %rax
	jl	LBB0_5
## %bb.1:
	movq	_amdgpu_async_gfx_ring@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_5
## %bb.2:
	cmpl	$0, 8(%r12)
	jle	LBB0_5
## %bb.3:
	movl	$8, %ebx
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	24(%r12), %rax
	movq	56(%r12), %r14
	movl	(%rax,%r13,4), %edi
	callq	_kfree
	leaq	(%r14,%rbx), %rdi
	leaq	(%r14,%rbx), %rsi
	addq	$-4, %rsi
	leaq	(%r14,%rbx), %rdx
	addq	$-8, %rdx
	callq	_amdgpu_bo_free_kernel
	incq	%r13
	movslq	8(%r12), %rax
	addq	$12, %rbx
	cmpq	%rax, %r13
	jl	LBB0_4
LBB0_5:
	cmpl	$0, 12(%r12)
	jle	LBB0_8
## %bb.6:
	movl	$8, %ebx
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_7:                                 ## =>This Inner Loop Header: Depth=1
	movq	16(%r12), %rax
	movq	48(%r12), %r14
	movl	(%rax,%r13,4), %edi
	callq	_kfree
	leaq	(%r14,%rbx), %rdi
	leaq	(%r14,%rbx), %rsi
	addq	$-4, %rsi
	leaq	(%r14,%rbx), %rdx
	addq	$-8, %rdx
	callq	_amdgpu_bo_free_kernel
	incq	%r13
	movslq	12(%r12), %rax
	addq	$12, %rbx
	cmpq	%rax, %r13
	jl	LBB0_7
LBB0_8:
	movq	(%r12), %rax
	cmpq	(%r15), %rax
	jl	LBB0_11
## %bb.9:
	movq	_amdgpu_async_gfx_ring@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_11
## %bb.10:
	movq	24(%r12), %rax
	movq	_AMDGPU_MAX_GFX_RINGS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edi
	callq	_kfree
LBB0_11:
	movq	16(%r12), %rax
	movq	_AMDGPU_MAX_COMPUTE_RINGS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edi
	callq	_kfree
	leaq	40(%r12), %rdi
	leaq	32(%r12), %rdx
	addq	$36, %r12
	movq	%r12, %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_bo_free_kernel          ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_NAVI10,8,3                ## @CHIP_NAVI10
	.comm	_amdgpu_async_gfx_ring,8,3      ## @amdgpu_async_gfx_ring
	.comm	_AMDGPU_MAX_GFX_RINGS,8,3       ## @AMDGPU_MAX_GFX_RINGS
	.comm	_AMDGPU_MAX_COMPUTE_RINGS,8,3   ## @AMDGPU_MAX_COMPUTE_RINGS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_gfx_mqd_sw_fini         ; -- Begin function amdgpu_gfx_mqd_sw_fini
	.p2align	2
_amdgpu_gfx_mqd_sw_fini:                ; @amdgpu_gfx_mqd_sw_fini
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x20, _CHIP_NAVI10@GOTPAGE
Lloh1:
	ldr	x20, [x20, _CHIP_NAVI10@GOTPAGEOFF]
	ldr	x9, [x20]
Lloh2:
	adrp	x21, _amdgpu_async_gfx_ring@GOTPAGE
Lloh3:
	ldr	x21, [x21, _amdgpu_async_gfx_ring@GOTPAGEOFF]
	ldr	x10, [x21]
	cmp	x8, x9
	ccmp	x10, #0, #4, ge
	b.eq	LBB0_4
; %bb.1:
	ldr	w8, [x19, #8]
	cmp	w8, #1
	b.lt	LBB0_4
; %bb.2:
	mov	x22, #0
	mov	w23, #8
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x24, [x19, #56]
	ldr	x8, [x19, #24]
	ldr	w0, [x8, x22, lsl #2]
	bl	_kfree
	add	x0, x24, x23
	sub	x1, x0, #4
	sub	x2, x0, #8
	bl	_amdgpu_bo_free_kernel
	add	x22, x22, #1
	ldrsw	x8, [x19, #8]
	add	x23, x23, #12
	cmp	x22, x8
	b.lt	LBB0_3
LBB0_4:
	ldr	w8, [x19, #12]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.5:
	mov	x22, #0
	mov	w23, #8
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x24, [x19, #48]
	ldr	x8, [x19, #16]
	ldr	w0, [x8, x22, lsl #2]
	bl	_kfree
	add	x0, x24, x23
	sub	x1, x0, #4
	sub	x2, x0, #8
	bl	_amdgpu_bo_free_kernel
	add	x22, x22, #1
	ldrsw	x8, [x19, #12]
	add	x23, x23, #12
	cmp	x22, x8
	b.lt	LBB0_6
LBB0_7:
	ldr	x8, [x19]
	ldr	x9, [x20]
	ldr	x10, [x21]
	cmp	x8, x9
	ccmp	x10, #0, #4, ge
	b.eq	LBB0_9
; %bb.8:
	ldr	x8, [x19, #24]
Lloh4:
	adrp	x9, _AMDGPU_MAX_GFX_RINGS@GOTPAGE
Lloh5:
	ldr	x9, [x9, _AMDGPU_MAX_GFX_RINGS@GOTPAGEOFF]
Lloh6:
	ldr	x9, [x9]
	ldr	w0, [x8, x9, lsl #2]
	bl	_kfree
LBB0_9:
	ldr	x8, [x19, #16]
Lloh7:
	adrp	x9, _AMDGPU_MAX_COMPUTE_RINGS@GOTPAGE
Lloh8:
	ldr	x9, [x9, _AMDGPU_MAX_COMPUTE_RINGS@GOTPAGEOFF]
Lloh9:
	ldr	x9, [x9]
	ldr	w0, [x8, x9, lsl #2]
	bl	_kfree
	add	x0, x19, #40
	add	x2, x19, #32
	add	x1, x19, #36
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_amdgpu_bo_free_kernel
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_NAVI10,8,3                ; @CHIP_NAVI10
	.comm	_amdgpu_async_gfx_ring,8,3      ; @amdgpu_async_gfx_ring
	.comm	_AMDGPU_MAX_GFX_RINGS,8,3       ; @AMDGPU_MAX_GFX_RINGS
	.comm	_AMDGPU_MAX_COMPUTE_RINGS,8,3   ; @AMDGPU_MAX_COMPUTE_RINGS
.subsections_via_symbols
