	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function atombios_adjust_pll
_atombios_adjust_pll:                   ## @atombios_adjust_pll
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$152, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %rbx
	callq	_to_radeon_crtc
	movq	%rax, %r14
	movq	(%rbx), %rax
	movq	(%rax), %r15
	movq	48(%r14), %r13
	movq	%r13, %rdi
	callq	_to_radeon_encoder
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	movq	%r13, %rdi
	callq	_radeon_get_connector_for_encoder
	movq	%rax, -128(%rbp)                ## 8-byte Spill
	movl	(%r12), %eax
	movl	%eax, -68(%rbp)                 ## 4-byte Spill
	movq	%r13, %rdi
	callq	_atombios_get_encoder_mode
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	(%r12), %esi
	movl	(%r14), %eax
	movl	%eax, -112(%rbp)                ## 4-byte Spill
	movq	%r13, -96(%rbp)                 ## 8-byte Spill
	movq	%r13, %rdi
	movq	%rsi, -48(%rbp)                 ## 8-byte Spill
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_radeon_dig_monitor_is_duallink
	movl	%eax, %ebx
	movl	$0, 8(%r14)
	movq	%r14, -80(%rbp)                 ## 8-byte Spill
	addq	$8, %r14
	movq	%r15, %rdi
	callq	_ASIC_IS_AVIVO
	testq	%rax, %rax
	movq	%r15, -64(%rbp)                 ## 8-byte Spill
	movq	%r12, -104(%rbp)                ## 8-byte Spill
	movl	%ebx, -108(%rbp)                ## 4-byte Spill
	je	LBB0_22
## %bb.1:
	movq	(%r15), %rax
	movq	_CHIP_RS600@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_4
## %bb.2:
	movq	_CHIP_RS690@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_4
## %bb.3:
	movq	_CHIP_RS740@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
LBB0_4:
	movq	_RADEON_PLL_PREFER_CLOSEST_LOWER@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r14)
LBB0_5:
	movq	-64(%rbp), %rdi                 ## 8-byte Reload
	callq	_ASIC_IS_DCE32
	testq	%rax, %rax
	movl	-52(%rbp), %ebx                 ## 4-byte Reload
	movq	-104(%rbp), %rax                ## 8-byte Reload
	je	LBB0_8
## %bb.6:
	cmpl	$200000, (%rax)                 ## imm = 0x30D40
	jle	LBB0_8
## %bb.7:
	movq	_RADEON_PLL_PREFER_HIGH_FB_DIV@GOTPCREL(%rip), %rcx
	jmp	LBB0_9
LBB0_8:
	movq	_RADEON_PLL_PREFER_LOW_REF_DIV@GOTPCREL(%rip), %rcx
LBB0_9:
	movq	-88(%rbp), %r12                 ## 8-byte Reload
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	movl	(%r14), %eax
	orl	(%rcx), %eax
	movl	%eax, (%r14)
	movq	(%r15), %rcx
	movq	_CHIP_RV770@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jge	LBB0_11
## %bb.10:
	movq	_RADEON_PLL_PREFER_MINM_OVER_MAXP@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, (%r14)
LBB0_11:
	movq	%r15, %rdi
	callq	_ASIC_IS_DCE41
	testq	%rax, %rax
	jne	LBB0_14
## %bb.12:
	movq	%r15, %rdi
	callq	_ASIC_IS_DCE61
	testq	%rax, %rax
	jne	LBB0_14
## %bb.13:
	movq	%r15, %rdi
	callq	_ASIC_IS_DCE8
	testq	%rax, %rax
	je	LBB0_15
LBB0_14:
	movq	_RADEON_PLL_USE_FRAC_FB_DIV@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r14)
LBB0_15:
	movq	(%r15), %rax
	movq	_CHIP_RS780@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_17
## %bb.16:
	movq	_CHIP_RS880@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_19
LBB0_17:
	movq	-80(%rbp), %rax                 ## 8-byte Reload
	cmpq	$0, 40(%rax)
	jne	LBB0_19
## %bb.18:
	movq	_RADEON_PLL_USE_FRAC_FB_DIV@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r14)
LBB0_19:
	movq	%r15, %rdi
	callq	_ASIC_IS_DCE32
	testq	%rax, %rax
	je	LBB0_27
## %bb.20:
	movq	-104(%rbp), %rax                ## 8-byte Reload
	cmpl	$165001, (%rax)                 ## imm = 0x28489
	jl	LBB0_27
## %bb.21:
	movq	_RADEON_PLL_USE_FRAC_FB_DIV@GOTPCREL(%rip), %rcx
	movl	(%r14), %eax
	orl	(%rcx), %eax
	jmp	LBB0_26
LBB0_22:
	movq	_RADEON_PLL_LEGACY@GOTPCREL(%rip), %rcx
	movl	(%r14), %eax
	orl	(%rcx), %eax
	cmpl	$200001, (%r12)                 ## imm = 0x30D41
	jl	LBB0_24
## %bb.23:
	movq	_RADEON_PLL_PREFER_HIGH_FB_DIV@GOTPCREL(%rip), %rcx
	jmp	LBB0_25
LBB0_24:
	movq	_RADEON_PLL_PREFER_LOW_REF_DIV@GOTPCREL(%rip), %rcx
LBB0_25:
	orl	(%rcx), %eax
	movl	-52(%rbp), %ebx                 ## 4-byte Reload
	movq	-88(%rbp), %r12                 ## 8-byte Reload
	movq	-64(%rbp), %r15                 ## 8-byte Reload
LBB0_26:
	movl	%eax, (%r14)
LBB0_27:
	movq	_ATOM_DEVICE_LCD_SUPPORT@GOTPCREL(%rip), %rcx
	movq	_ATOM_DEVICE_DFP_SUPPORT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	%rcx, %r13
	orl	(%rcx), %eax
	testl	%eax, (%r12)
	jne	LBB0_29
## %bb.28:
	movq	-96(%rbp), %rdi                 ## 8-byte Reload
	callq	_radeon_encoder_get_dp_bridge_encoder_id
	movq	_ENCODER_OBJECT_ID_NONE@GOTPCREL(%rip), %rcx
	movq	-48(%rbp), %rdx                 ## 8-byte Reload
                                        ## kill: def $edx killed $edx killed $rdx
	cmpq	(%rcx), %rax
	je	LBB0_31
LBB0_29:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	%eax, %edx
	movq	-128(%rbp), %rdi                ## 8-byte Reload
	testq	%rdi, %rdi
	je	LBB0_31
## %bb.30:
	callq	_to_radeon_connector
	movq	(%rax), %rax
	movl	(%rax), %edx
LBB0_31:
	cmpq	$0, 32(%r12)
	je	LBB0_33
## %bb.32:
	movq	24(%r12), %rax
	movq	8(%rax), %rax
	movq	(%rax), %rax
	movl	(%rax), %edx
LBB0_33:
	movl	%edx, -52(%rbp)                 ## 4-byte Spill
	movl	(%r13), %eax
	testl	%eax, (%r12)
	je	LBB0_40
## %bb.34:
	movq	-80(%rbp), %rax                 ## 8-byte Reload
	cmpq	$0, 40(%rax)
	je	LBB0_40
## %bb.35:
	movq	-80(%rbp), %rax                 ## 8-byte Reload
	movq	32(%rax), %rax
	testq	%rax, %rax
	je	LBB0_40
## %bb.36:
	movq	_RADEON_PLL_USE_REF_DIV@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	-80(%rbp), %rdx                 ## 8-byte Reload
	orl	%ecx, 8(%rdx)
	movq	%rax, 16(%rdx)
	movq	%r15, %rdi
	callq	_ASIC_IS_AVIVO
	testq	%rax, %rax
	je	LBB0_40
## %bb.37:
	movq	(%r15), %rax
	movq	_CHIP_RS780@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_40
## %bb.38:
	movq	_CHIP_RS880@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_40
## %bb.39:
	movq	_RADEON_PLL_USE_FRAC_FB_DIV@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r14)
LBB0_40:
	movq	%r15, %rdi
	callq	_ASIC_IS_AVIVO
	testq	%rax, %rax
	je	LBB0_47
## %bb.41:
	movq	8(%r12), %rax
	movq	_ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_43
## %bb.42:
	movq	-104(%rbp), %rax                ## 8-byte Reload
	movl	(%rax), %eax
	addl	%eax, %eax
	movl	%eax, -68(%rbp)                 ## 4-byte Spill
LBB0_43:
	movq	_ATOM_DEVICE_TV_SUPPORT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 16(%r12)
	je	LBB0_45
## %bb.44:
	movq	_RADEON_PLL_PREFER_CLOSEST_LOWER@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r14)
LBB0_45:
	movl	(%r13), %eax
	testl	%eax, (%r12)
	je	LBB0_52
## %bb.46:
	movq	_RADEON_PLL_IS_LCD@GOTPCREL(%rip), %rax
	jmp	LBB0_51
LBB0_47:
	movq	-96(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rax
	movq	_DRM_MODE_ENCODER_DAC@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_49
## %bb.48:
	movq	_RADEON_PLL_NO_ODD_POST_DIV@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, (%r14)
LBB0_49:
	movq	_DRM_MODE_ENCODER_LVDS@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_52
## %bb.50:
	movq	_RADEON_PLL_USE_REF_DIV@GOTPCREL(%rip), %rax
LBB0_51:
	movl	(%rax), %eax
	orl	%eax, (%r14)
LBB0_52:
	movq	_ATOM_ENCODER_MODE_HDMI@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ebx
	jne	LBB0_60
## %bb.53:
	movl	-112(%rbp), %eax                ## 4-byte Reload
	cmpl	$16, %eax
	je	LBB0_57
## %bb.54:
	cmpl	$12, %eax
	je	LBB0_58
## %bb.55:
	cmpl	$10, %eax
	jne	LBB0_60
## %bb.56:
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	leal	(%rcx,%rcx,4), %eax
	leal	(%rcx,%rcx,4), %ecx
	addl	$3, %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$2, %ecx
	jmp	LBB0_59
LBB0_57:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	addl	%eax, %eax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	jmp	LBB0_60
LBB0_58:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	leal	(%rax,%rax,2), %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
LBB0_59:
	movq	%rcx, -48(%rbp)                 ## 8-byte Spill
LBB0_60:
	movq	%r15, %rdi
	callq	_ASIC_IS_DCE3
	testq	%rax, %rax
	je	LBB0_75
## %bb.61:
	movq	_COMMAND@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_AdjustDisplayPll@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_GetIndexIntoMasterTable
	movq	%r15, %rcx
	movl	%eax, %r15d
	movl	8(%rcx), %edi
	leaq	-120(%rbp), %rdx
	leaq	-116(%rbp), %rcx
	movl	%eax, %esi
	callq	_atom_parse_cmd_header
	testl	%eax, %eax
	je	LBB0_75
## %bb.62:
	leaq	-192(%rbp), %rdi
	xorl	%esi, %esi
	movl	$64, %edx
	callq	_memset
	movl	-120(%rbp), %esi
	movl	-116(%rbp), %edx
	cmpl	$1, %esi
	jne	LBB0_74
## %bb.63:
	leal	-1(%rdx), %eax
	cmpl	$2, %eax
	jae	LBB0_68
## %bb.64:
	movslq	-48(%rbp), %rax                 ## 4-byte Folded Reload
	imulq	$1717986919, %rax, %rdi         ## imm = 0x66666667
	movq	%rdi, %rax
	shrq	$63, %rax
	sarq	$34, %rdi
	addl	%eax, %edi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_cpu_to_le16
	movq	%rax, -176(%rbp)
	movq	8(%r12), %rax
	movq	%rax, -192(%rbp)
	movl	%ebx, -184(%rbp)
	movq	-80(%rbp), %rax                 ## 8-byte Reload
	cmpq	$0, 40(%rax)
	je	LBB0_67
## %bb.65:
	cmpl	$0, 24(%rax)
	je	LBB0_67
## %bb.66:
	movq	_ADJUST_DISPLAY_CONFIG_SS_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -168(%rbp)
LBB0_67:
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movl	8(%rax), %edi
	leaq	-192(%rbp), %rdx
	movl	%r15d, %esi
	callq	_atom_execute_table
	movq	-176(%rbp), %rdi
	callq	_le16_to_cpu
                                        ## kill: def $eax killed $eax def $rax
	jmp	LBB0_89
LBB0_68:
	movl	$1, %esi
	cmpl	$3, %edx
	jne	LBB0_74
## %bb.69:
	movslq	-48(%rbp), %rax                 ## 4-byte Folded Reload
	imulq	$1717986919, %rax, %rdi         ## imm = 0x66666667
	movq	%rdi, %rax
	shrq	$63, %rax
	sarq	$34, %rdi
	addl	%eax, %edi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_cpu_to_le16
	movq	%rax, -136(%rbp)
	movq	8(%r12), %rax
	movq	%rax, -168(%rbp)
	movl	%ebx, -160(%rbp)
	movl	$0, -144(%rbp)
	movq	-80(%rbp), %r14                 ## 8-byte Reload
	cmpq	$0, 40(%r14)
	je	LBB0_72
## %bb.70:
	cmpl	$0, 24(%r14)
	je	LBB0_72
## %bb.71:
	movq	_DISPPLL_CONFIG_SS_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -144(%rbp)
LBB0_72:
	movl	%ebx, %edi
	callq	_ENCODER_MODE_IS_DP
	testl	%eax, %eax
	je	LBB0_77
## %bb.73:
	movq	_DISPPLL_CONFIG_COHERENT_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -144(%rbp)
	movslq	-52(%rbp), %rax                 ## 4-byte Folded Reload
	imulq	$1717986919, %rax, %rdi         ## imm = 0x66666667
	movq	%rdi, %rax
	shrq	$63, %rax
	sarq	$34, %rdi
	addl	%eax, %edi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_cpu_to_le16
	movq	%rax, -136(%rbp)
	jmp	LBB0_82
LBB0_74:
	leaq	L_.str(%rip), %rdi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_DRM_ERROR
LBB0_75:
	movl	-68(%rbp), %eax                 ## 4-byte Reload
LBB0_76:
	addq	$152, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_77:
	movq	_ATOM_DEVICE_DFP_SUPPORT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	je	LBB0_82
## %bb.78:
	movq	24(%r12), %rax
	cmpl	$0, (%rax)
	je	LBB0_80
## %bb.79:
	movq	_DISPPLL_CONFIG_COHERENT_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -144(%rbp)
LBB0_80:
	cmpl	$0, -108(%rbp)                  ## 4-byte Folded Reload
	je	LBB0_82
## %bb.81:
	movq	_DISPPLL_CONFIG_DUAL_LINK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -144(%rbp)
LBB0_82:
	movq	-96(%rbp), %r12                 ## 8-byte Reload
	movq	%r12, %rdi
	callq	_radeon_encoder_get_dp_bridge_encoder_id
	movq	_ENCODER_OBJECT_ID_NONE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_84
## %bb.83:
	xorl	%eax, %eax
	jmp	LBB0_85
LBB0_84:
	movq	%r12, %rdi
	callq	_radeon_encoder_get_dp_bridge_encoder_id
LBB0_85:
	movq	%rax, -152(%rbp)
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movl	8(%rax), %edi
	leaq	-192(%rbp), %rdx
	movl	%r15d, %esi
	callq	_atom_execute_table
	movl	-176(%rbp), %edi
	callq	_le32_to_cpu
                                        ## kill: def $eax killed $eax def $rax
	cmpq	$0, -184(%rbp)
	je	LBB0_87
## %bb.86:
	movq	_RADEON_PLL_USE_FRAC_FB_DIV@GOTPCREL(%rip), %rcx
	movl	8(%r14), %edx
	orl	(%rcx), %edx
	movq	_RADEON_PLL_USE_REF_DIV@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movl	%edx, 8(%r14)
	movq	-184(%rbp), %rcx
	movq	%rcx, 16(%r14)
LBB0_87:
	movl	-192(%rbp), %ecx
	testl	%ecx, %ecx
	je	LBB0_89
## %bb.88:
	movq	_RADEON_PLL_USE_FRAC_FB_DIV@GOTPCREL(%rip), %rdx
	movl	8(%r14), %esi
	orl	(%rdx), %esi
	movq	_RADEON_PLL_USE_POST_DIV@GOTPCREL(%rip), %rdx
	orl	(%rdx), %esi
	movl	%esi, 8(%r14)
	movl	%ecx, 4(%r14)
LBB0_89:
	addl	%eax, %eax
	leal	(%rax,%rax,4), %eax
	jmp	LBB0_76
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_RS600,8,3                 ## @CHIP_RS600
	.comm	_CHIP_RS690,8,3                 ## @CHIP_RS690
	.comm	_CHIP_RS740,8,3                 ## @CHIP_RS740
	.comm	_RADEON_PLL_PREFER_CLOSEST_LOWER,4,2 ## @RADEON_PLL_PREFER_CLOSEST_LOWER
	.comm	_RADEON_PLL_PREFER_HIGH_FB_DIV,4,2 ## @RADEON_PLL_PREFER_HIGH_FB_DIV
	.comm	_RADEON_PLL_PREFER_LOW_REF_DIV,4,2 ## @RADEON_PLL_PREFER_LOW_REF_DIV
	.comm	_CHIP_RV770,8,3                 ## @CHIP_RV770
	.comm	_RADEON_PLL_PREFER_MINM_OVER_MAXP,4,2 ## @RADEON_PLL_PREFER_MINM_OVER_MAXP
	.comm	_RADEON_PLL_USE_FRAC_FB_DIV,4,2 ## @RADEON_PLL_USE_FRAC_FB_DIV
	.comm	_CHIP_RS780,8,3                 ## @CHIP_RS780
	.comm	_CHIP_RS880,8,3                 ## @CHIP_RS880
	.comm	_RADEON_PLL_LEGACY,4,2          ## @RADEON_PLL_LEGACY
	.comm	_ATOM_DEVICE_LCD_SUPPORT,4,2    ## @ATOM_DEVICE_LCD_SUPPORT
	.comm	_ATOM_DEVICE_DFP_SUPPORT,4,2    ## @ATOM_DEVICE_DFP_SUPPORT
	.comm	_ENCODER_OBJECT_ID_NONE,8,3     ## @ENCODER_OBJECT_ID_NONE
	.comm	_RADEON_PLL_USE_REF_DIV,4,2     ## @RADEON_PLL_USE_REF_DIV
	.comm	_ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1,8,3 ## @ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1
	.comm	_ATOM_DEVICE_TV_SUPPORT,4,2     ## @ATOM_DEVICE_TV_SUPPORT
	.comm	_RADEON_PLL_IS_LCD,4,2          ## @RADEON_PLL_IS_LCD
	.comm	_DRM_MODE_ENCODER_DAC,8,3       ## @DRM_MODE_ENCODER_DAC
	.comm	_RADEON_PLL_NO_ODD_POST_DIV,4,2 ## @RADEON_PLL_NO_ODD_POST_DIV
	.comm	_DRM_MODE_ENCODER_LVDS,8,3      ## @DRM_MODE_ENCODER_LVDS
	.comm	_ATOM_ENCODER_MODE_HDMI,4,2     ## @ATOM_ENCODER_MODE_HDMI
	.comm	_COMMAND,4,2                    ## @COMMAND
	.comm	_AdjustDisplayPll,4,2           ## @AdjustDisplayPll
	.comm	_ADJUST_DISPLAY_CONFIG_SS_ENABLE,4,2 ## @ADJUST_DISPLAY_CONFIG_SS_ENABLE
	.comm	_DISPPLL_CONFIG_SS_ENABLE,4,2   ## @DISPPLL_CONFIG_SS_ENABLE
	.comm	_DISPPLL_CONFIG_COHERENT_MODE,4,2 ## @DISPPLL_CONFIG_COHERENT_MODE
	.comm	_DISPPLL_CONFIG_DUAL_LINK,4,2   ## @DISPPLL_CONFIG_DUAL_LINK
	.comm	_RADEON_PLL_USE_POST_DIV,4,2    ## @RADEON_PLL_USE_POST_DIV
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Unknown table version %d %d\n"

	.no_dead_strip	_atombios_adjust_pll
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function atombios_adjust_pll
_atombios_adjust_pll:                   ; @atombios_adjust_pll
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #192
	.cfi_def_cfa_offset 192
	stp	x28, x27, [sp, #96]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #112]            ; 16-byte Folded Spill
	stp	x24, x23, [sp, #128]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #144]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #160]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #176]            ; 16-byte Folded Spill
	add	x29, sp, #176
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x27, x1
	mov	x20, x0
	bl	_to_radeon_crtc
	mov	x24, x0
	ldr	x8, [x20]
	ldr	x20, [x8]
	ldr	x21, [x0, #48]
	mov	x0, x21
	bl	_to_radeon_encoder
	mov	x22, x0
	mov	x0, x21
	bl	_radeon_get_connector_for_encoder
	mov	x28, x0
	ldr	w8, [x27]
	str	w8, [sp, #20]                   ; 4-byte Folded Spill
	mov	x0, x21
	bl	_atombios_get_encoder_mode
	ldr	w26, [x27]
	ldr	w8, [x24]
	stp	w8, w0, [sp, #12]               ; 8-byte Folded Spill
	mov	x0, x21
	mov	x1, x26
	bl	_radeon_dig_monitor_is_duallink
	str	w0, [sp, #8]                    ; 4-byte Folded Spill
	mov	x19, x24
	str	wzr, [x19, #8]!
	mov	x0, x20
	bl	_ASIC_IS_AVIVO
	cbz	x0, LBB0_20
; %bb.1:
	ldr	x8, [x20]
Lloh0:
	adrp	x9, _CHIP_RS600@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_RS600@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
Lloh3:
	adrp	x10, _CHIP_RS690@GOTPAGE
Lloh4:
	ldr	x10, [x10, _CHIP_RS690@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
Lloh6:
	adrp	x11, _CHIP_RS740@GOTPAGE
Lloh7:
	ldr	x11, [x11, _CHIP_RS740@GOTPAGEOFF]
Lloh8:
	ldr	x11, [x11]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	ccmp	x8, x11, #4, ne
	b.ne	LBB0_3
; %bb.2:
Lloh9:
	adrp	x8, _RADEON_PLL_PREFER_CLOSEST_LOWER@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RADEON_PLL_PREFER_CLOSEST_LOWER@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_3:
	mov	x0, x20
	bl	_ASIC_IS_DCE32
	cbz	x0, LBB0_6
; %bb.4:
	ldr	w8, [x27]
	mov	w9, #3392
	movk	w9, #3, lsl #16
	cmp	w8, w9
	b.le	LBB0_6
; %bb.5:
Lloh12:
	adrp	x8, _RADEON_PLL_PREFER_HIGH_FB_DIV@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RADEON_PLL_PREFER_HIGH_FB_DIV@GOTPAGEOFF]
	b	LBB0_7
LBB0_6:
Lloh14:
	adrp	x8, _RADEON_PLL_PREFER_LOW_REF_DIV@GOTPAGE
Lloh15:
	ldr	x8, [x8, _RADEON_PLL_PREFER_LOW_REF_DIV@GOTPAGEOFF]
LBB0_7:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
	ldr	x9, [x20]
Lloh16:
	adrp	x10, _CHIP_RV770@GOTPAGE
Lloh17:
	ldr	x10, [x10, _CHIP_RV770@GOTPAGEOFF]
Lloh18:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ge	LBB0_9
; %bb.8:
Lloh19:
	adrp	x9, _RADEON_PLL_PREFER_MINM_OVER_MAXP@GOTPAGE
Lloh20:
	ldr	x9, [x9, _RADEON_PLL_PREFER_MINM_OVER_MAXP@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_9:
	mov	x0, x20
	bl	_ASIC_IS_DCE41
Lloh22:
	adrp	x23, _RADEON_PLL_USE_FRAC_FB_DIV@GOTPAGE
Lloh23:
	ldr	x23, [x23, _RADEON_PLL_USE_FRAC_FB_DIV@GOTPAGEOFF]
	cbnz	x0, LBB0_12
; %bb.10:
	mov	x0, x20
	bl	_ASIC_IS_DCE61
	cbnz	x0, LBB0_12
; %bb.11:
	mov	x0, x20
	bl	_ASIC_IS_DCE8
	cbz	x0, LBB0_13
LBB0_12:
	ldr	w8, [x23]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_13:
	ldr	x8, [x20]
Lloh24:
	adrp	x9, _CHIP_RS780@GOTPAGE
Lloh25:
	ldr	x9, [x9, _CHIP_RS780@GOTPAGEOFF]
Lloh26:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_15
; %bb.14:
Lloh27:
	adrp	x9, _CHIP_RS880@GOTPAGE
Lloh28:
	ldr	x9, [x9, _CHIP_RS880@GOTPAGEOFF]
Lloh29:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_17
LBB0_15:
	ldr	x8, [x24, #40]
	cbnz	x8, LBB0_17
; %bb.16:
	ldr	w8, [x23]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_17:
	mov	x0, x20
	bl	_ASIC_IS_DCE32
	cbz	x0, LBB0_25
; %bb.18:
	ldr	w8, [x27]
	mov	w9, #33929
	movk	w9, #2, lsl #16
	cmp	w8, w9
	b.lt	LBB0_25
; %bb.19:
	ldr	w8, [x23]
	ldr	w9, [x19]
	b	LBB0_24
LBB0_20:
Lloh30:
	adrp	x8, _RADEON_PLL_LEGACY@GOTPAGE
Lloh31:
	ldr	x8, [x8, _RADEON_PLL_LEGACY@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	ldr	w9, [x27]
	mov	w10, #3392
	movk	w10, #3, lsl #16
	cmp	w9, w10
	b.le	LBB0_22
; %bb.21:
Lloh33:
	adrp	x9, _RADEON_PLL_PREFER_HIGH_FB_DIV@GOTPAGE
Lloh34:
	ldr	x9, [x9, _RADEON_PLL_PREFER_HIGH_FB_DIV@GOTPAGEOFF]
	b	LBB0_23
LBB0_22:
Lloh35:
	adrp	x9, _RADEON_PLL_PREFER_LOW_REF_DIV@GOTPAGE
Lloh36:
	ldr	x9, [x9, _RADEON_PLL_PREFER_LOW_REF_DIV@GOTPAGEOFF]
LBB0_23:
	ldr	w9, [x9]
LBB0_24:
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_25:
	ldr	w8, [x22]
Lloh37:
	adrp	x23, _ATOM_DEVICE_LCD_SUPPORT@GOTPAGE
Lloh38:
	ldr	x23, [x23, _ATOM_DEVICE_LCD_SUPPORT@GOTPAGEOFF]
	ldr	w9, [x23]
Lloh39:
	adrp	x10, _ATOM_DEVICE_DFP_SUPPORT@GOTPAGE
Lloh40:
	ldr	x10, [x10, _ATOM_DEVICE_DFP_SUPPORT@GOTPAGEOFF]
Lloh41:
	ldr	w10, [x10]
	orr	w9, w10, w9
	tst	w9, w8
	b.ne	LBB0_27
; %bb.26:
	mov	x0, x21
	bl	_radeon_encoder_get_dp_bridge_encoder_id
Lloh42:
	adrp	x8, _ENCODER_OBJECT_ID_NONE@GOTPAGE
Lloh43:
	ldr	x8, [x8, _ENCODER_OBJECT_ID_NONE@GOTPAGEOFF]
Lloh44:
	ldr	x8, [x8]
	mov	x25, x26
	cmp	x0, x8
	b.eq	LBB0_29
LBB0_27:
	mov	x25, x26
	cbz	x28, LBB0_29
; %bb.28:
	mov	x0, x28
	bl	_to_radeon_connector
	ldr	x8, [x0]
	ldr	w25, [x8]
LBB0_29:
	ldr	x8, [x22, #32]
	cbz	x8, LBB0_31
; %bb.30:
	ldr	x8, [x22, #24]
	ldr	x8, [x8, #8]
	ldr	x8, [x8]
	ldr	w25, [x8]
LBB0_31:
	ldr	w8, [x22]
	ldr	w9, [x23]
	tst	w9, w8
	ldr	w28, [sp, #20]                  ; 4-byte Folded Reload
	b.eq	LBB0_38
; %bb.32:
	ldr	x8, [x24, #40]
	cbz	x8, LBB0_38
; %bb.33:
	ldr	x8, [x24, #32]
	cbz	x8, LBB0_38
; %bb.34:
Lloh45:
	adrp	x9, _RADEON_PLL_USE_REF_DIV@GOTPAGE
Lloh46:
	ldr	x9, [x9, _RADEON_PLL_USE_REF_DIV@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	ldr	w10, [x24, #8]
	orr	w9, w10, w9
	str	w9, [x24, #8]
	str	x8, [x24, #16]
	mov	x0, x20
	bl	_ASIC_IS_AVIVO
	cbz	x0, LBB0_38
; %bb.35:
	ldr	x8, [x20]
Lloh48:
	adrp	x9, _CHIP_RS780@GOTPAGE
Lloh49:
	ldr	x9, [x9, _CHIP_RS780@GOTPAGEOFF]
Lloh50:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_38
; %bb.36:
Lloh51:
	adrp	x9, _CHIP_RS880@GOTPAGE
Lloh52:
	ldr	x9, [x9, _CHIP_RS880@GOTPAGEOFF]
Lloh53:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_38
; %bb.37:
Lloh54:
	adrp	x8, _RADEON_PLL_USE_FRAC_FB_DIV@GOTPAGE
Lloh55:
	ldr	x8, [x8, _RADEON_PLL_USE_FRAC_FB_DIV@GOTPAGEOFF]
Lloh56:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_38:
	mov	x0, x20
	bl	_ASIC_IS_AVIVO
	cbz	x0, LBB0_45
; %bb.39:
	ldr	x8, [x22, #8]
Lloh57:
	adrp	x9, _ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1@GOTPAGE
Lloh58:
	ldr	x9, [x9, _ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1@GOTPAGEOFF]
Lloh59:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_41
; %bb.40:
	ldr	w8, [x27]
	lsl	w28, w8, #1
LBB0_41:
	ldr	w8, [x22, #16]
Lloh60:
	adrp	x9, _ATOM_DEVICE_TV_SUPPORT@GOTPAGE
Lloh61:
	ldr	x9, [x9, _ATOM_DEVICE_TV_SUPPORT@GOTPAGEOFF]
Lloh62:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_43
; %bb.42:
Lloh63:
	adrp	x8, _RADEON_PLL_PREFER_CLOSEST_LOWER@GOTPAGE
Lloh64:
	ldr	x8, [x8, _RADEON_PLL_PREFER_CLOSEST_LOWER@GOTPAGEOFF]
Lloh65:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_43:
	ldr	w8, [x22]
	ldr	w9, [x23]
	tst	w9, w8
	b.eq	LBB0_50
; %bb.44:
Lloh66:
	adrp	x8, _RADEON_PLL_IS_LCD@GOTPAGE
Lloh67:
	ldr	x8, [x8, _RADEON_PLL_IS_LCD@GOTPAGEOFF]
	b	LBB0_49
LBB0_45:
	ldr	x8, [x21]
Lloh68:
	adrp	x9, _DRM_MODE_ENCODER_DAC@GOTPAGE
Lloh69:
	ldr	x9, [x9, _DRM_MODE_ENCODER_DAC@GOTPAGEOFF]
Lloh70:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_47
; %bb.46:
Lloh71:
	adrp	x9, _RADEON_PLL_NO_ODD_POST_DIV@GOTPAGE
Lloh72:
	ldr	x9, [x9, _RADEON_PLL_NO_ODD_POST_DIV@GOTPAGEOFF]
Lloh73:
	ldr	w9, [x9]
	ldr	w10, [x19]
	orr	w9, w10, w9
	str	w9, [x19]
LBB0_47:
Lloh74:
	adrp	x9, _DRM_MODE_ENCODER_LVDS@GOTPAGE
Lloh75:
	ldr	x9, [x9, _DRM_MODE_ENCODER_LVDS@GOTPAGEOFF]
Lloh76:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_50
; %bb.48:
Lloh77:
	adrp	x8, _RADEON_PLL_USE_REF_DIV@GOTPAGE
Lloh78:
	ldr	x8, [x8, _RADEON_PLL_USE_REF_DIV@GOTPAGEOFF]
LBB0_49:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_50:
	ldr	w19, [sp, #16]                  ; 4-byte Folded Reload
Lloh79:
	adrp	x8, _ATOM_ENCODER_MODE_HDMI@GOTPAGE
Lloh80:
	ldr	x8, [x8, _ATOM_ENCODER_MODE_HDMI@GOTPAGEOFF]
Lloh81:
	ldr	w8, [x8]
	cmp	w19, w8
	b.ne	LBB0_57
; %bb.51:
	ldr	w8, [sp, #12]                   ; 4-byte Folded Reload
	cmp	w8, #16
	b.eq	LBB0_55
; %bb.52:
	cmp	w8, #12
	b.eq	LBB0_56
; %bb.53:
	cmp	w8, #10
	b.ne	LBB0_57
; %bb.54:
	add	w8, w26, w26, lsl #2
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w26, w8, #2
	b	LBB0_57
LBB0_55:
	lsl	w26, w26, #1
	b	LBB0_57
LBB0_56:
	add	w8, w26, w26, lsl #1
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w26, w8, #1
LBB0_57:
	mov	x0, x20
	bl	_ASIC_IS_DCE3
	cbz	x0, LBB0_86
; %bb.58:
Lloh82:
	adrp	x8, _COMMAND@GOTPAGE
Lloh83:
	ldr	x8, [x8, _COMMAND@GOTPAGEOFF]
Lloh84:
	ldr	w0, [x8]
Lloh85:
	adrp	x8, _AdjustDisplayPll@GOTPAGE
Lloh86:
	ldr	x8, [x8, _AdjustDisplayPll@GOTPAGEOFF]
Lloh87:
	ldr	w1, [x8]
	bl	_GetIndexIntoMasterTable
	mov	x27, x0
	ldr	w0, [x20, #8]
	add	x2, sp, #28
	add	x3, sp, #24
	mov	x1, x27
	bl	_atom_parse_cmd_header
	cbz	w0, LBB0_86
; %bb.59:
	add	x0, sp, #32
	mov	w1, #0
	mov	w2, #64
	bl	_memset
	ldp	w2, w1, [sp, #24]
	cmp	w1, #1
	b.ne	LBB0_72
; %bb.60:
	sub	w8, w2, #1
	cmp	w8, #2
	b.hs	LBB0_65
; %bb.61:
	mov	w8, #26215
	movk	w8, #26214, lsl #16
	smull	x8, w26, w8
	lsr	x9, x8, #63
	asr	x8, x8, #34
	add	w0, w8, w9
	bl	_cpu_to_le16
	str	x0, [sp, #48]
	ldr	x8, [x22, #8]
	str	x8, [sp, #32]
	str	w19, [sp, #40]
	ldr	x8, [x24, #40]
	cbz	x8, LBB0_64
; %bb.62:
	ldr	w8, [x24, #24]
	cbz	w8, LBB0_64
; %bb.63:
Lloh88:
	adrp	x8, _ADJUST_DISPLAY_CONFIG_SS_ENABLE@GOTPAGE
Lloh89:
	ldr	x8, [x8, _ADJUST_DISPLAY_CONFIG_SS_ENABLE@GOTPAGEOFF]
Lloh90:
	ldr	w8, [x8]
	ldr	w9, [sp, #56]
	orr	w8, w9, w8
	str	w8, [sp, #56]
LBB0_64:
	ldr	w0, [x20, #8]
	add	x2, sp, #32
	mov	x1, x27
	bl	_atom_execute_table
	ldr	x0, [sp, #48]
	bl	_le16_to_cpu
	b	LBB0_85
LBB0_65:
	cmp	w2, #3
	b.ne	LBB0_71
; %bb.66:
	mov	w8, #26215
	movk	w8, #26214, lsl #16
	smull	x8, w26, w8
	lsr	x9, x8, #32
	lsr	x8, x8, #63
	add	w0, w8, w9, asr #2
	bl	_cpu_to_le16
	str	x0, [sp, #88]
	ldr	x8, [x22, #8]
	str	x8, [sp, #56]
	str	w19, [sp, #64]
	str	wzr, [sp, #80]
	ldr	x8, [x24, #40]
	cbz	x8, LBB0_69
; %bb.67:
	ldr	w8, [x24, #24]
	cbz	w8, LBB0_69
; %bb.68:
Lloh91:
	adrp	x8, _DISPPLL_CONFIG_SS_ENABLE@GOTPAGE
Lloh92:
	ldr	x8, [x8, _DISPPLL_CONFIG_SS_ENABLE@GOTPAGEOFF]
Lloh93:
	ldr	w8, [x8]
	str	w8, [sp, #80]
LBB0_69:
	mov	x0, x19
	bl	_ENCODER_MODE_IS_DP
	cbz	w0, LBB0_73
; %bb.70:
Lloh94:
	adrp	x8, _DISPPLL_CONFIG_COHERENT_MODE@GOTPAGE
Lloh95:
	ldr	x8, [x8, _DISPPLL_CONFIG_COHERENT_MODE@GOTPAGEOFF]
Lloh96:
	ldr	w8, [x8]
	ldr	w9, [sp, #80]
	orr	w8, w9, w8
	str	w8, [sp, #80]
	mov	w8, #26215
	movk	w8, #26214, lsl #16
	smull	x8, w25, w8
	lsr	x9, x8, #63
	asr	x8, x8, #34
	add	w0, w8, w9
	bl	_cpu_to_le16
	str	x0, [sp, #88]
	b	LBB0_78
LBB0_71:
	mov	w1, #1
LBB0_72:
Lloh97:
	adrp	x0, l_.str@PAGE
Lloh98:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_86
LBB0_73:
	ldr	w8, [x22]
Lloh99:
	adrp	x9, _ATOM_DEVICE_DFP_SUPPORT@GOTPAGE
Lloh100:
	ldr	x9, [x9, _ATOM_DEVICE_DFP_SUPPORT@GOTPAGEOFF]
Lloh101:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_78
; %bb.74:
	ldr	x8, [x22, #24]
	ldr	w8, [x8]
	cbz	w8, LBB0_76
; %bb.75:
Lloh102:
	adrp	x8, _DISPPLL_CONFIG_COHERENT_MODE@GOTPAGE
Lloh103:
	ldr	x8, [x8, _DISPPLL_CONFIG_COHERENT_MODE@GOTPAGEOFF]
Lloh104:
	ldr	w8, [x8]
	ldr	w9, [sp, #80]
	orr	w8, w9, w8
	str	w8, [sp, #80]
LBB0_76:
	ldr	w8, [sp, #8]                    ; 4-byte Folded Reload
	cbz	w8, LBB0_78
; %bb.77:
Lloh105:
	adrp	x8, _DISPPLL_CONFIG_DUAL_LINK@GOTPAGE
Lloh106:
	ldr	x8, [x8, _DISPPLL_CONFIG_DUAL_LINK@GOTPAGEOFF]
Lloh107:
	ldr	w8, [x8]
	ldr	w9, [sp, #80]
	orr	w8, w9, w8
	str	w8, [sp, #80]
LBB0_78:
	mov	x0, x21
	bl	_radeon_encoder_get_dp_bridge_encoder_id
Lloh108:
	adrp	x8, _ENCODER_OBJECT_ID_NONE@GOTPAGE
Lloh109:
	ldr	x8, [x8, _ENCODER_OBJECT_ID_NONE@GOTPAGEOFF]
Lloh110:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_80
; %bb.79:
	mov	x0, #0
	b	LBB0_81
LBB0_80:
	mov	x0, x21
	bl	_radeon_encoder_get_dp_bridge_encoder_id
LBB0_81:
	str	x0, [sp, #72]
	ldr	w0, [x20, #8]
	add	x2, sp, #32
	mov	x1, x27
	bl	_atom_execute_table
	ldr	w0, [sp, #48]
	bl	_le32_to_cpu
	ldr	x8, [sp, #40]
	cbz	x8, LBB0_83
; %bb.82:
Lloh111:
	adrp	x8, _RADEON_PLL_USE_FRAC_FB_DIV@GOTPAGE
Lloh112:
	ldr	x8, [x8, _RADEON_PLL_USE_FRAC_FB_DIV@GOTPAGEOFF]
Lloh113:
	ldr	w8, [x8]
	ldr	w9, [x24, #8]
Lloh114:
	adrp	x10, _RADEON_PLL_USE_REF_DIV@GOTPAGE
Lloh115:
	ldr	x10, [x10, _RADEON_PLL_USE_REF_DIV@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh116:
	ldr	w9, [x10]
	orr	w8, w9, w8
	str	w8, [x24, #8]
	ldr	x8, [sp, #40]
	str	x8, [x24, #16]
LBB0_83:
	ldr	w8, [sp, #32]
	cbz	w8, LBB0_85
; %bb.84:
Lloh117:
	adrp	x9, _RADEON_PLL_USE_FRAC_FB_DIV@GOTPAGE
Lloh118:
	ldr	x9, [x9, _RADEON_PLL_USE_FRAC_FB_DIV@GOTPAGEOFF]
Lloh119:
	ldr	w9, [x9]
	ldr	w10, [x24, #8]
	orr	w9, w10, w9
Lloh120:
	adrp	x10, _RADEON_PLL_USE_POST_DIV@GOTPAGE
Lloh121:
	ldr	x10, [x10, _RADEON_PLL_USE_POST_DIV@GOTPAGEOFF]
Lloh122:
	ldr	w10, [x10]
	orr	w9, w10, w9
	stp	w8, w9, [x24, #4]
LBB0_85:
	add	w8, w0, w0, lsl #2
	lsl	w28, w8, #1
LBB0_86:
	mov	x0, x28
	ldp	x29, x30, [sp, #176]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #160]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #144]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #128]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #112]            ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #96]             ; 16-byte Folded Reload
	add	sp, sp, #192
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpAdd	Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh120, Lloh121, Lloh122
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_RS600,8,3                 ; @CHIP_RS600
	.comm	_CHIP_RS690,8,3                 ; @CHIP_RS690
	.comm	_CHIP_RS740,8,3                 ; @CHIP_RS740
	.comm	_RADEON_PLL_PREFER_CLOSEST_LOWER,4,2 ; @RADEON_PLL_PREFER_CLOSEST_LOWER
	.comm	_RADEON_PLL_PREFER_HIGH_FB_DIV,4,2 ; @RADEON_PLL_PREFER_HIGH_FB_DIV
	.comm	_RADEON_PLL_PREFER_LOW_REF_DIV,4,2 ; @RADEON_PLL_PREFER_LOW_REF_DIV
	.comm	_CHIP_RV770,8,3                 ; @CHIP_RV770
	.comm	_RADEON_PLL_PREFER_MINM_OVER_MAXP,4,2 ; @RADEON_PLL_PREFER_MINM_OVER_MAXP
	.comm	_RADEON_PLL_USE_FRAC_FB_DIV,4,2 ; @RADEON_PLL_USE_FRAC_FB_DIV
	.comm	_CHIP_RS780,8,3                 ; @CHIP_RS780
	.comm	_CHIP_RS880,8,3                 ; @CHIP_RS880
	.comm	_RADEON_PLL_LEGACY,4,2          ; @RADEON_PLL_LEGACY
	.comm	_ATOM_DEVICE_LCD_SUPPORT,4,2    ; @ATOM_DEVICE_LCD_SUPPORT
	.comm	_ATOM_DEVICE_DFP_SUPPORT,4,2    ; @ATOM_DEVICE_DFP_SUPPORT
	.comm	_ENCODER_OBJECT_ID_NONE,8,3     ; @ENCODER_OBJECT_ID_NONE
	.comm	_RADEON_PLL_USE_REF_DIV,4,2     ; @RADEON_PLL_USE_REF_DIV
	.comm	_ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1,8,3 ; @ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1
	.comm	_ATOM_DEVICE_TV_SUPPORT,4,2     ; @ATOM_DEVICE_TV_SUPPORT
	.comm	_RADEON_PLL_IS_LCD,4,2          ; @RADEON_PLL_IS_LCD
	.comm	_DRM_MODE_ENCODER_DAC,8,3       ; @DRM_MODE_ENCODER_DAC
	.comm	_RADEON_PLL_NO_ODD_POST_DIV,4,2 ; @RADEON_PLL_NO_ODD_POST_DIV
	.comm	_DRM_MODE_ENCODER_LVDS,8,3      ; @DRM_MODE_ENCODER_LVDS
	.comm	_ATOM_ENCODER_MODE_HDMI,4,2     ; @ATOM_ENCODER_MODE_HDMI
	.comm	_COMMAND,4,2                    ; @COMMAND
	.comm	_AdjustDisplayPll,4,2           ; @AdjustDisplayPll
	.comm	_ADJUST_DISPLAY_CONFIG_SS_ENABLE,4,2 ; @ADJUST_DISPLAY_CONFIG_SS_ENABLE
	.comm	_DISPPLL_CONFIG_SS_ENABLE,4,2   ; @DISPPLL_CONFIG_SS_ENABLE
	.comm	_DISPPLL_CONFIG_COHERENT_MODE,4,2 ; @DISPPLL_CONFIG_COHERENT_MODE
	.comm	_DISPPLL_CONFIG_DUAL_LINK,4,2   ; @DISPPLL_CONFIG_DUAL_LINK
	.comm	_RADEON_PLL_USE_POST_DIV,4,2    ; @RADEON_PLL_USE_POST_DIV
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Unknown table version %d %d\n"

	.no_dead_strip	_atombios_adjust_pll
.subsections_via_symbols
