	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v9_0_do_edc_gds_workarounds
_gfx_v9_0_do_edc_gds_workarounds:       ## @gfx_v9_0_do_edc_gds_workarounds
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	8(%rdi), %r15
	movq	%r15, %rdi
	movl	$7, %esi
	callq	_amdgpu_ring_alloc
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	movl	%eax, %ebx
	movl	8(%r15), %esi
	leaq	L_.str(%rip), %rdi
	movl	%eax, %edx
	callq	_DRM_ERROR
	jmp	LBB0_8
LBB0_2:
	movq	_GC@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_mmGDS_VMID0_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	callq	_WREG32_SOC15
	movl	(%r12), %edi
	movq	_mmGDS_VMID0_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	4(%r14), %ecx
	xorl	%esi, %esi
	callq	_WREG32_SOC15
	movq	_PACKET3_DMA_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$5, %esi
	callq	_PACKET3
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	_PACKET3_DMA_DATA_CP_SYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	$1, %edi
	callq	_PACKET3_DMA_DATA_DST_SEL
	movl	%eax, %ebx
	movl	$2, %edi
	callq	_PACKET3_DMA_DATA_SRC_SEL
	orl	%eax, %ebx
	xorl	%edi, %edi
	callq	_PACKET3_DMA_DATA_ENGINE
	orl	%eax, %ebx
	orl	%r13d, %ebx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_amdgpu_ring_write
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	_PACKET3_DMA_DATA_CMD_RAW_WAIT@GOTPCREL(%rip), %rax
	movl	4(%r14), %esi
	orl	(%rax), %esi
	movq	%r15, %rdi
	callq	_amdgpu_ring_write
	movq	%r15, %rdi
	callq	_amdgpu_ring_commit
	movl	(%r14), %eax
	movl	$0, %r13d
	testl	%eax, %eax
	jle	LBB0_7
## %bb.3:
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r15), %rbx
	movq	%r15, %rdi
	callq	_gfx_v9_0_ring_get_rptr_compute
	cmpq	%rax, %rbx
	je	LBB0_5
## %bb.6:                               ##   in Loop: Header=BB0_4 Depth=1
	movl	$1, %edi
	callq	_udelay
	incl	%r13d
	movl	(%r14), %eax
	cmpl	%eax, %r13d
	jl	LBB0_4
	jmp	LBB0_7
LBB0_5:
	movl	(%r14), %eax
LBB0_7:
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rcx
	xorl	%ebx, %ebx
	subl	(%rcx), %ebx
	cmpl	%eax, %r13d
	movl	$0, %eax
	cmovll	%eax, %ebx
	movl	(%r12), %edi
	movq	_mmGDS_VMID0_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	callq	_WREG32_SOC15
LBB0_8:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"amdgpu: GDS workarounds failed to lock ring %s (%d).\n"

	.comm	_GC,4,2                         ## @GC
	.comm	_mmGDS_VMID0_BASE,4,2           ## @mmGDS_VMID0_BASE
	.comm	_mmGDS_VMID0_SIZE,4,2           ## @mmGDS_VMID0_SIZE
	.comm	_PACKET3_DMA_DATA,4,2           ## @PACKET3_DMA_DATA
	.comm	_PACKET3_DMA_DATA_CP_SYNC,4,2   ## @PACKET3_DMA_DATA_CP_SYNC
	.comm	_PACKET3_DMA_DATA_CMD_RAW_WAIT,4,2 ## @PACKET3_DMA_DATA_CMD_RAW_WAIT
	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
	.no_dead_strip	_gfx_v9_0_do_edc_gds_workarounds
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v9_0_do_edc_gds_workarounds
_gfx_v9_0_do_edc_gds_workarounds:       ; @gfx_v9_0_do_edc_gds_workarounds
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x0
	ldr	x19, [x0, #8]
	mov	x0, x19
	mov	w1, #7
	bl	_amdgpu_ring_alloc
	cbz	w0, LBB0_2
; %bb.1:
	mov	x21, x0
	ldr	w1, [x19, #8]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	mov	x2, x21
	bl	_DRM_ERROR
	b	LBB0_9
LBB0_2:
Lloh2:
	adrp	x22, _GC@GOTPAGE
Lloh3:
	ldr	x22, [x22, _GC@GOTPAGEOFF]
	ldr	w0, [x22]
Lloh4:
	adrp	x8, _mmGDS_VMID0_BASE@GOTPAGE
Lloh5:
	ldr	x8, [x8, _mmGDS_VMID0_BASE@GOTPAGEOFF]
Lloh6:
	ldr	w2, [x8]
	mov	w1, #0
	mov	w3, #0
	bl	_WREG32_SOC15
	ldr	w0, [x22]
Lloh7:
	adrp	x23, _mmGDS_VMID0_SIZE@GOTPAGE
Lloh8:
	ldr	x23, [x23, _mmGDS_VMID0_SIZE@GOTPAGEOFF]
	ldr	w2, [x23]
	ldr	w3, [x20, #4]
	mov	w1, #0
	bl	_WREG32_SOC15
Lloh9:
	adrp	x8, _PACKET3_DMA_DATA@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PACKET3_DMA_DATA@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	mov	w1, #5
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
Lloh12:
	adrp	x8, _PACKET3_DMA_DATA_CP_SYNC@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PACKET3_DMA_DATA_CP_SYNC@GOTPAGEOFF]
Lloh14:
	ldr	w21, [x8]
	mov	w0, #1
	bl	_PACKET3_DMA_DATA_DST_SEL
	orr	w21, w0, w21
	mov	w0, #2
	bl	_PACKET3_DMA_DATA_SRC_SEL
	orr	w21, w21, w0
	mov	w0, #0
	bl	_PACKET3_DMA_DATA_ENGINE
	orr	w1, w21, w0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
Lloh15:
	adrp	x8, _PACKET3_DMA_DATA_CMD_RAW_WAIT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PACKET3_DMA_DATA_CMD_RAW_WAIT@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	ldr	w9, [x20, #4]
	orr	w1, w9, w8
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	bl	_amdgpu_ring_commit
	ldr	w8, [x20]
	cmp	w8, #1
	b.lt	LBB0_6
; %bb.3:
	mov	w21, #0
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x24, [x19]
	mov	x0, x19
	bl	_gfx_v9_0_ring_get_rptr_compute
	cmp	x24, x0
	b.eq	LBB0_7
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	w0, #1
	bl	_udelay
	add	w21, w21, #1
	ldr	w8, [x20]
	cmp	w21, w8
	b.lt	LBB0_4
	b	LBB0_8
LBB0_6:
	mov	w21, #0
	b	LBB0_8
LBB0_7:
	ldr	w8, [x20]
LBB0_8:
Lloh18:
	adrp	x9, _ETIMEDOUT@GOTPAGE
Lloh19:
	ldr	x9, [x9, _ETIMEDOUT@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	cmp	w21, w8
	csneg	w21, wzr, w9, lt
	ldr	w0, [x22]
	ldr	w2, [x23]
	mov	w1, #0
	mov	w3, #0
	bl	_WREG32_SOC15
LBB0_9:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"amdgpu: GDS workarounds failed to lock ring %s (%d).\n"

	.comm	_GC,4,2                         ; @GC
	.comm	_mmGDS_VMID0_BASE,4,2           ; @mmGDS_VMID0_BASE
	.comm	_mmGDS_VMID0_SIZE,4,2           ; @mmGDS_VMID0_SIZE
	.comm	_PACKET3_DMA_DATA,4,2           ; @PACKET3_DMA_DATA
	.comm	_PACKET3_DMA_DATA_CP_SYNC,4,2   ; @PACKET3_DMA_DATA_CP_SYNC
	.comm	_PACKET3_DMA_DATA_CMD_RAW_WAIT,4,2 ; @PACKET3_DMA_DATA_CMD_RAW_WAIT
	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
	.no_dead_strip	_gfx_v9_0_do_edc_gds_workarounds
.subsections_via_symbols
