	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_dvo_get_config
_intel_dvo_get_config:                  ## @intel_dvo_get_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	(%rdi), %edi
	callq	_to_i915
	movq	%rbx, %rdi
	callq	_enc_to_dvo
	movq	%rax, %rbx
	movq	_INTEL_OUTPUT_DVO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	orl	%eax, 12(%r14)
	movl	(%rbx), %edi
	callq	_I915_READ
	movq	_DVO_HSYNC_ACTIVE_HIGH@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	jne	LBB0_1
## %bb.2:
	movq	_DRM_MODE_FLAG_NHSYNC@GOTPCREL(%rip), %rcx
	jmp	LBB0_3
LBB0_1:
	movq	_DRM_MODE_FLAG_PHSYNC@GOTPCREL(%rip), %rcx
LBB0_3:
	movq	_DVO_VSYNC_ACTIVE_HIGH@GOTPCREL(%rip), %rdx
	andl	(%rdx), %eax
	jne	LBB0_4
## %bb.5:
	movq	_DRM_MODE_FLAG_NVSYNC@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_4:
	movq	_DRM_MODE_FLAG_PVSYNC@GOTPCREL(%rip), %rax
LBB0_6:
	movl	(%rax), %eax
	orl	(%rcx), %eax
	orl	%eax, 4(%r14)
	movl	(%r14), %eax
	movl	%eax, 8(%r14)
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_OUTPUT_DVO,4,2           ## @INTEL_OUTPUT_DVO
	.comm	_DVO_HSYNC_ACTIVE_HIGH,4,2      ## @DVO_HSYNC_ACTIVE_HIGH
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ## @DRM_MODE_FLAG_PHSYNC
	.comm	_DRM_MODE_FLAG_NHSYNC,4,2       ## @DRM_MODE_FLAG_NHSYNC
	.comm	_DVO_VSYNC_ACTIVE_HIGH,4,2      ## @DVO_VSYNC_ACTIVE_HIGH
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ## @DRM_MODE_FLAG_PVSYNC
	.comm	_DRM_MODE_FLAG_NVSYNC,4,2       ## @DRM_MODE_FLAG_NVSYNC
	.no_dead_strip	_intel_dvo_get_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_dvo_get_config
_intel_dvo_get_config:                  ; @intel_dvo_get_config
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	mov	x20, x0
	ldr	w0, [x0]
	bl	_to_i915
	mov	x0, x20
	bl	_enc_to_dvo
	mov	x20, x0
Lloh0:
	adrp	x8, _INTEL_OUTPUT_DVO@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_OUTPUT_DVO@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_BIT
	ldr	w8, [x19, #12]
	orr	w8, w8, w0
	str	w8, [x19, #12]
	ldr	w0, [x20]
	bl	_I915_READ
Lloh3:
	adrp	x8, _DVO_HSYNC_ACTIVE_HIGH@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DVO_HSYNC_ACTIVE_HIGH@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _DRM_MODE_FLAG_NHSYNC@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DRM_MODE_FLAG_NHSYNC@GOTPAGEOFF]
Lloh8:
	adrp	x10, _DRM_MODE_FLAG_PHSYNC@GOTPAGE
Lloh9:
	ldr	x10, [x10, _DRM_MODE_FLAG_PHSYNC@GOTPAGEOFF]
	tst	w8, w0
	csel	x8, x9, x10, eq
	ldr	w8, [x8]
Lloh10:
	adrp	x9, _DVO_VSYNC_ACTIVE_HIGH@GOTPAGE
Lloh11:
	ldr	x9, [x9, _DVO_VSYNC_ACTIVE_HIGH@GOTPAGEOFF]
Lloh12:
	adrp	x10, _DRM_MODE_FLAG_NVSYNC@GOTPAGE
Lloh13:
	ldr	x10, [x10, _DRM_MODE_FLAG_NVSYNC@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
Lloh15:
	adrp	x11, _DRM_MODE_FLAG_PVSYNC@GOTPAGE
Lloh16:
	ldr	x11, [x11, _DRM_MODE_FLAG_PVSYNC@GOTPAGEOFF]
	tst	w9, w0
	csel	x9, x10, x11, eq
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldp	w10, w9, [x19]
	orr	w8, w8, w9
	stp	w8, w10, [x19, #4]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh14
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_OUTPUT_DVO,4,2           ; @INTEL_OUTPUT_DVO
	.comm	_DVO_HSYNC_ACTIVE_HIGH,4,2      ; @DVO_HSYNC_ACTIVE_HIGH
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ; @DRM_MODE_FLAG_PHSYNC
	.comm	_DRM_MODE_FLAG_NHSYNC,4,2       ; @DRM_MODE_FLAG_NHSYNC
	.comm	_DVO_VSYNC_ACTIVE_HIGH,4,2      ; @DVO_VSYNC_ACTIVE_HIGH
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ; @DRM_MODE_FLAG_PVSYNC
	.comm	_DRM_MODE_FLAG_NVSYNC,4,2       ; @DRM_MODE_FLAG_NVSYNC
	.no_dead_strip	_intel_dvo_get_config
.subsections_via_symbols
