	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_legacy_primary_dac_detect
_radeon_legacy_primary_dac_detect:      ## @radeon_legacy_primary_dac_detect
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rax
	movq	(%rax), %r14
	movq	_connector_status_disconnected@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	%r14, %rdi
	callq	_ASIC_IS_RN50
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_connector_status_connected@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	jmp	LBB0_11
LBB0_2:
	movq	_RADEON_VCLK_ECP_CNTL@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32_PLL
	movl	%eax, %r13d
	movq	_RADEON_CRTC_EXT_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%eax, %r12d
	movq	_RADEON_DAC_EXT_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	_RADEON_DAC_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_RADEON_DAC_MACRO_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	_RADEON_PIXCLK_ALWAYS_ONb@GOTPCREL(%rip), %rcx
	movq	_RADEON_PIXCLK_DAC_ALWAYS_ONb@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	orl	(%rcx), %esi
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	notl	%esi
	movl	%r13d, -56(%rbp)                ## 4-byte Spill
	andl	%r13d, %esi
	movq	_RADEON_CRTC_EXT_CNTL@GOTPCREL(%rip), %r13
	movl	(%r15), %edi
	callq	_WREG32_PLL
	movq	_RADEON_CRTC_CRT_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	%r12d, %esi
	movl	(%r13), %edi
	callq	_WREG32
	movq	_RADEON_DAC_FORCE_BLANK_OFF_EN@GOTPCREL(%rip), %rax
	movq	_RADEON_DAC_FORCE_DATA_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	orl	(%rax), %r15d
	movq	_RADEON_DAC_FORCE_DATA_SEL_RGB@GOTPCREL(%rip), %rax
	orl	(%rax), %r15d
	movq	%r14, %rdi
	callq	_ASIC_IS_R300
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_RADEON_DAC_FORCE_DATA_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$438, %eax                      ## imm = 0x1B6
	jmp	LBB0_8
LBB0_4:
	movq	%r14, %rdi
	callq	_ASIC_IS_RV100
	movq	_RADEON_DAC_FORCE_DATA_SHIFT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movl	$428, %eax                      ## imm = 0x1AC
	jmp	LBB0_7
LBB0_6:
	movl	$384, %eax                      ## imm = 0x180
LBB0_7:
                                        ## kill: def $cl killed $cl killed $ecx
LBB0_8:
	shll	%cl, %eax
	movq	_RADEON_DAC_EXT_CNTL@GOTPCREL(%rip), %r14
	orl	%eax, %r15d
	movl	(%r14), %edi
	movl	%r15d, %esi
	callq	_WREG32
	movq	_RADEON_DAC_RANGE_CNTL_MASK@GOTPCREL(%rip), %rax
	movq	_RADEON_DAC_PDWN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	notl	%ecx
	andl	-48(%rbp), %ecx                 ## 4-byte Folded Reload
	movq	_RADEON_DAC_RANGE_CNTL_PS2@GOTPCREL(%rip), %rax
	movq	_RADEON_DAC_CMP_EN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	orl	(%rax), %esi
	orl	%ecx, %esi
	movq	_RADEON_DAC_CNTL@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_WREG32
	movq	_RADEON_DAC_PDWN_R@GOTPCREL(%rip), %rax
	movq	_RADEON_DAC_PDWN_G@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_RADEON_DAC_PDWN_B@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	notl	%esi
	andl	-44(%rbp), %esi                 ## 4-byte Folded Reload
	movq	_RADEON_DAC_MACRO_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_WREG32
	movl	$2, %edi
	callq	_mdelay
	movl	(%r15), %edi
	callq	_RREG32
	movq	_RADEON_DAC_CMP_OUTPUT@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	je	LBB0_10
## %bb.9:
	movq	_connector_status_connected@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
LBB0_10:
	movl	(%r15), %edi
	movl	-48(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_RADEON_DAC_MACRO_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movl	(%r14), %edi
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movl	(%r13), %edi
	movl	%r12d, %esi
	callq	_WREG32
	movq	_RADEON_VCLK_ECP_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-56(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32_PLL
LBB0_11:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_connector_status_disconnected,4,2 ## @connector_status_disconnected
	.comm	_connector_status_connected,4,2 ## @connector_status_connected
	.comm	_RADEON_VCLK_ECP_CNTL,4,2       ## @RADEON_VCLK_ECP_CNTL
	.comm	_RADEON_CRTC_EXT_CNTL,4,2       ## @RADEON_CRTC_EXT_CNTL
	.comm	_RADEON_DAC_EXT_CNTL,4,2        ## @RADEON_DAC_EXT_CNTL
	.comm	_RADEON_DAC_CNTL,4,2            ## @RADEON_DAC_CNTL
	.comm	_RADEON_DAC_MACRO_CNTL,4,2      ## @RADEON_DAC_MACRO_CNTL
	.comm	_RADEON_PIXCLK_ALWAYS_ONb,4,2   ## @RADEON_PIXCLK_ALWAYS_ONb
	.comm	_RADEON_PIXCLK_DAC_ALWAYS_ONb,4,2 ## @RADEON_PIXCLK_DAC_ALWAYS_ONb
	.comm	_RADEON_CRTC_CRT_ON,4,2         ## @RADEON_CRTC_CRT_ON
	.comm	_RADEON_DAC_FORCE_BLANK_OFF_EN,4,2 ## @RADEON_DAC_FORCE_BLANK_OFF_EN
	.comm	_RADEON_DAC_FORCE_DATA_EN,4,2   ## @RADEON_DAC_FORCE_DATA_EN
	.comm	_RADEON_DAC_FORCE_DATA_SEL_RGB,4,2 ## @RADEON_DAC_FORCE_DATA_SEL_RGB
	.comm	_RADEON_DAC_FORCE_DATA_SEL_G,4,2 ## @RADEON_DAC_FORCE_DATA_SEL_G
	.comm	_RADEON_DAC_FORCE_DATA_SHIFT,4,2 ## @RADEON_DAC_FORCE_DATA_SHIFT
	.comm	_RADEON_DAC_RANGE_CNTL_MASK,4,2 ## @RADEON_DAC_RANGE_CNTL_MASK
	.comm	_RADEON_DAC_PDWN,4,2            ## @RADEON_DAC_PDWN
	.comm	_RADEON_DAC_RANGE_CNTL_PS2,4,2  ## @RADEON_DAC_RANGE_CNTL_PS2
	.comm	_RADEON_DAC_CMP_EN,4,2          ## @RADEON_DAC_CMP_EN
	.comm	_RADEON_DAC_PDWN_R,4,2          ## @RADEON_DAC_PDWN_R
	.comm	_RADEON_DAC_PDWN_G,4,2          ## @RADEON_DAC_PDWN_G
	.comm	_RADEON_DAC_PDWN_B,4,2          ## @RADEON_DAC_PDWN_B
	.comm	_RADEON_DAC_CMP_OUTPUT,4,2      ## @RADEON_DAC_CMP_OUTPUT
	.no_dead_strip	_radeon_legacy_primary_dac_detect
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_legacy_primary_dac_detect
_radeon_legacy_primary_dac_detect:      ; @radeon_legacy_primary_dac_detect
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	x8, [x0]
	ldr	x24, [x8]
Lloh0:
	adrp	x8, _connector_status_disconnected@GOTPAGE
Lloh1:
	ldr	x8, [x8, _connector_status_disconnected@GOTPAGEOFF]
Lloh2:
	ldr	w27, [x8]
	mov	x0, x24
	bl	_ASIC_IS_RN50
	cbz	x0, LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _connector_status_connected@GOTPAGE
Lloh4:
	ldr	x8, [x8, _connector_status_connected@GOTPAGEOFF]
Lloh5:
	ldr	w24, [x8]
	b	LBB0_6
LBB0_2:
Lloh6:
	adrp	x28, _RADEON_VCLK_ECP_CNTL@GOTPAGE
Lloh7:
	ldr	x28, [x28, _RADEON_VCLK_ECP_CNTL@GOTPAGEOFF]
	ldr	w0, [x28]
	bl	_RREG32_PLL
	mov	x19, x0
Lloh8:
	adrp	x21, _RADEON_CRTC_EXT_CNTL@GOTPAGE
Lloh9:
	ldr	x21, [x21, _RADEON_CRTC_EXT_CNTL@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_RREG32
	mov	x20, x0
Lloh10:
	adrp	x8, _RADEON_DAC_EXT_CNTL@GOTPAGE
Lloh11:
	ldr	x8, [x8, _RADEON_DAC_EXT_CNTL@GOTPAGEOFF]
Lloh12:
	ldr	w0, [x8]
	bl	_RREG32
	str	w0, [sp, #12]                   ; 4-byte Folded Spill
Lloh13:
	adrp	x25, _RADEON_DAC_CNTL@GOTPAGE
Lloh14:
	ldr	x25, [x25, _RADEON_DAC_CNTL@GOTPAGEOFF]
	ldr	w0, [x25]
	bl	_RREG32
	mov	x22, x0
Lloh15:
	adrp	x26, _RADEON_DAC_MACRO_CNTL@GOTPAGE
Lloh16:
	ldr	x26, [x26, _RADEON_DAC_MACRO_CNTL@GOTPAGEOFF]
	ldr	w0, [x26]
	bl	_RREG32
	mov	x23, x0
Lloh17:
	adrp	x8, _RADEON_PIXCLK_ALWAYS_ONb@GOTPAGE
Lloh18:
	ldr	x8, [x8, _RADEON_PIXCLK_ALWAYS_ONb@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
Lloh20:
	adrp	x9, _RADEON_PIXCLK_DAC_ALWAYS_ONb@GOTPAGE
Lloh21:
	ldr	x9, [x9, _RADEON_PIXCLK_DAC_ALWAYS_ONb@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w1, w19, w8
	ldr	w0, [x28]
	bl	_WREG32_PLL
Lloh23:
	adrp	x8, _RADEON_CRTC_CRT_ON@GOTPAGE
Lloh24:
	ldr	x8, [x8, _RADEON_CRTC_CRT_ON@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	orr	w1, w8, w20
	ldr	w0, [x21]
	bl	_WREG32
Lloh26:
	adrp	x8, _RADEON_DAC_FORCE_BLANK_OFF_EN@GOTPAGE
Lloh27:
	ldr	x8, [x8, _RADEON_DAC_FORCE_BLANK_OFF_EN@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
Lloh29:
	adrp	x9, _RADEON_DAC_FORCE_DATA_EN@GOTPAGE
Lloh30:
	ldr	x9, [x9, _RADEON_DAC_FORCE_DATA_EN@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh32:
	adrp	x9, _RADEON_DAC_FORCE_DATA_SEL_RGB@GOTPAGE
Lloh33:
	ldr	x9, [x9, _RADEON_DAC_FORCE_DATA_SEL_RGB@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	orr	w28, w8, w9
	mov	x0, x24
	bl	_ASIC_IS_R300
	cbz	x0, LBB0_4
; %bb.3:
Lloh35:
	adrp	x8, _RADEON_DAC_FORCE_DATA_SHIFT@GOTPAGE
Lloh36:
	ldr	x8, [x8, _RADEON_DAC_FORCE_DATA_SHIFT@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	mov	w9, #438
	lsl	w8, w9, w8
	b	LBB0_5
LBB0_4:
	mov	x0, x24
	bl	_ASIC_IS_RV100
Lloh38:
	adrp	x8, _RADEON_DAC_FORCE_DATA_SHIFT@GOTPAGE
Lloh39:
	ldr	x8, [x8, _RADEON_DAC_FORCE_DATA_SHIFT@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	mov	w9, #384
	lsl	w9, w9, w8
	mov	w10, #428
	lsl	w8, w10, w8
	cmp	x0, #0
	csel	w8, w9, w8, eq
LBB0_5:
	orr	w1, w28, w8
Lloh41:
	adrp	x21, _RADEON_DAC_EXT_CNTL@GOTPAGE
Lloh42:
	ldr	x21, [x21, _RADEON_DAC_EXT_CNTL@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_WREG32
Lloh43:
	adrp	x8, _RADEON_DAC_RANGE_CNTL_MASK@GOTPAGE
Lloh44:
	ldr	x8, [x8, _RADEON_DAC_RANGE_CNTL_MASK@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
Lloh46:
	adrp	x9, _RADEON_DAC_PDWN@GOTPAGE
Lloh47:
	ldr	x9, [x9, _RADEON_DAC_PDWN@GOTPAGEOFF]
Lloh48:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w8, w22, w8
Lloh49:
	adrp	x9, _RADEON_DAC_RANGE_CNTL_PS2@GOTPAGE
Lloh50:
	ldr	x9, [x9, _RADEON_DAC_RANGE_CNTL_PS2@GOTPAGEOFF]
Lloh51:
	ldr	w9, [x9]
Lloh52:
	adrp	x10, _RADEON_DAC_CMP_EN@GOTPAGE
Lloh53:
	ldr	x10, [x10, _RADEON_DAC_CMP_EN@GOTPAGEOFF]
Lloh54:
	ldr	w10, [x10]
	orr	w9, w10, w9
	orr	w1, w9, w8
	ldr	w0, [x25]
	bl	_WREG32
Lloh55:
	adrp	x8, _RADEON_DAC_PDWN_R@GOTPAGE
Lloh56:
	ldr	x8, [x8, _RADEON_DAC_PDWN_R@GOTPAGEOFF]
Lloh57:
	ldr	w8, [x8]
Lloh58:
	adrp	x9, _RADEON_DAC_PDWN_G@GOTPAGE
Lloh59:
	ldr	x9, [x9, _RADEON_DAC_PDWN_G@GOTPAGEOFF]
Lloh60:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh61:
	adrp	x9, _RADEON_DAC_PDWN_B@GOTPAGE
Lloh62:
	ldr	x9, [x9, _RADEON_DAC_PDWN_B@GOTPAGEOFF]
Lloh63:
	ldr	w9, [x9]
	orr	w8, w8, w9
	bic	w1, w23, w8
	ldr	w0, [x26]
	bl	_WREG32
	mov	w0, #2
	bl	_mdelay
	ldr	w0, [x25]
	bl	_RREG32
Lloh64:
	adrp	x8, _RADEON_DAC_CMP_OUTPUT@GOTPAGE
Lloh65:
	ldr	x8, [x8, _RADEON_DAC_CMP_OUTPUT@GOTPAGEOFF]
Lloh66:
	ldr	w8, [x8]
Lloh67:
	adrp	x9, _connector_status_connected@GOTPAGE
Lloh68:
	ldr	x9, [x9, _connector_status_connected@GOTPAGEOFF]
Lloh69:
	ldr	w9, [x9]
	tst	w8, w0
	csel	w24, w27, w9, eq
	ldr	w0, [x25]
	mov	x1, x22
	bl	_WREG32
	ldr	w0, [x26]
	mov	x1, x23
	bl	_WREG32
	ldr	w0, [x21]
	ldr	w1, [sp, #12]                   ; 4-byte Folded Reload
	bl	_WREG32
Lloh70:
	adrp	x8, _RADEON_CRTC_EXT_CNTL@GOTPAGE
Lloh71:
	ldr	x8, [x8, _RADEON_CRTC_EXT_CNTL@GOTPAGEOFF]
Lloh72:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_WREG32
Lloh73:
	adrp	x8, _RADEON_VCLK_ECP_CNTL@GOTPAGE
Lloh74:
	ldr	x8, [x8, _RADEON_VCLK_ECP_CNTL@GOTPAGEOFF]
Lloh75:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_WREG32_PLL
LBB0_6:
	mov	x0, x24
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh41, Lloh42
	.cfi_endproc
                                        ; -- End function
	.comm	_connector_status_disconnected,4,2 ; @connector_status_disconnected
	.comm	_connector_status_connected,4,2 ; @connector_status_connected
	.comm	_RADEON_VCLK_ECP_CNTL,4,2       ; @RADEON_VCLK_ECP_CNTL
	.comm	_RADEON_CRTC_EXT_CNTL,4,2       ; @RADEON_CRTC_EXT_CNTL
	.comm	_RADEON_DAC_EXT_CNTL,4,2        ; @RADEON_DAC_EXT_CNTL
	.comm	_RADEON_DAC_CNTL,4,2            ; @RADEON_DAC_CNTL
	.comm	_RADEON_DAC_MACRO_CNTL,4,2      ; @RADEON_DAC_MACRO_CNTL
	.comm	_RADEON_PIXCLK_ALWAYS_ONb,4,2   ; @RADEON_PIXCLK_ALWAYS_ONb
	.comm	_RADEON_PIXCLK_DAC_ALWAYS_ONb,4,2 ; @RADEON_PIXCLK_DAC_ALWAYS_ONb
	.comm	_RADEON_CRTC_CRT_ON,4,2         ; @RADEON_CRTC_CRT_ON
	.comm	_RADEON_DAC_FORCE_BLANK_OFF_EN,4,2 ; @RADEON_DAC_FORCE_BLANK_OFF_EN
	.comm	_RADEON_DAC_FORCE_DATA_EN,4,2   ; @RADEON_DAC_FORCE_DATA_EN
	.comm	_RADEON_DAC_FORCE_DATA_SEL_RGB,4,2 ; @RADEON_DAC_FORCE_DATA_SEL_RGB
	.comm	_RADEON_DAC_FORCE_DATA_SEL_G,4,2 ; @RADEON_DAC_FORCE_DATA_SEL_G
	.comm	_RADEON_DAC_FORCE_DATA_SHIFT,4,2 ; @RADEON_DAC_FORCE_DATA_SHIFT
	.comm	_RADEON_DAC_RANGE_CNTL_MASK,4,2 ; @RADEON_DAC_RANGE_CNTL_MASK
	.comm	_RADEON_DAC_PDWN,4,2            ; @RADEON_DAC_PDWN
	.comm	_RADEON_DAC_RANGE_CNTL_PS2,4,2  ; @RADEON_DAC_RANGE_CNTL_PS2
	.comm	_RADEON_DAC_CMP_EN,4,2          ; @RADEON_DAC_CMP_EN
	.comm	_RADEON_DAC_PDWN_R,4,2          ; @RADEON_DAC_PDWN_R
	.comm	_RADEON_DAC_PDWN_G,4,2          ; @RADEON_DAC_PDWN_G
	.comm	_RADEON_DAC_PDWN_B,4,2          ; @RADEON_DAC_PDWN_B
	.comm	_RADEON_DAC_CMP_OUTPUT,4,2      ; @RADEON_DAC_CMP_OUTPUT
	.no_dead_strip	_radeon_legacy_primary_dac_detect
.subsections_via_symbols
