	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function i915_frequency_info
_i915_frequency_info:                   ## @i915_frequency_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movl	(%rdi), %edi
	callq	_node_to_i915
	movq	%rax, %r15
	leaq	20(%rax), %rbx
	leaq	12(%rax), %r14
	movq	%r14, %rdi
	callq	_intel_runtime_pm_get
	movl	%eax, %r13d
	movq	%r15, %rdi
	movl	$5, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_MEMSWCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read16
	movl	%r13d, -72(%rbp)                ## 4-byte Spill
	movq	%r14, %r13
	movl	%eax, %r14d
	movq	_MEMSTAT_ILK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_read16
	movl	%eax, %ebx
	movl	%r14d, %edx
	shrl	$8, %edx
	andl	$15, %edx
	leaq	L_.str(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	andl	$63, %r14d
	leaq	L_.str.1(%rip), %rsi
	movq	%r12, %rdi
	movl	%r14d, %edx
	movq	%r13, %r14
	movl	-72(%rbp), %r13d                ## 4-byte Reload
	xorl	%eax, %eax
	callq	_seq_printf
	movq	_MEMSTAT_VID_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	%ebx, %edx
	movq	_MEMSTAT_VID_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %edx
	leaq	L_.str.2(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	movq	_MEMSTAT_PSTATE_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movq	_MEMSTAT_PSTATE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %ebx
	leaq	L_.str.3(%rip), %rsi
	movq	%r12, %rdi
	movl	%ebx, %edx
	jmp	LBB0_31
LBB0_2:
	movq	%r15, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	jne	LBB0_4
## %bb.3:
	movq	%r15, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_5
LBB0_4:
	movq	_GEN6_RP_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, %ebx
	movq	_GEN6_RP_MEDIA_TURBO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	%ebx, %edi
	callq	_yesno
	leaq	L_.str.4(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movq	_GEN6_RP_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	%ebx, %edi
	callq	_yesno
	leaq	L_.str.5(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movq	_GEN6_RP_MEDIA_MODE_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movq	_GEN6_RP_MEDIA_SW_MODE@GOTPCREL(%rip), %rax
	xorl	%edi, %edi
	cmpl	(%rax), %ebx
	sete	%dil
	callq	_yesno
	leaq	L_.str.6(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r15, %rdi
	callq	_vlv_punit_get
	movq	_PUNIT_REG_GPU_FREQ_STS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_vlv_punit_read
	movl	%eax, %ebx
	movq	%r15, %rdi
	callq	_vlv_punit_put
	leaq	L_.str.7(%rip), %rsi
	movq	%r12, %rdi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	(%r15), %edx
	leaq	L_.str.8(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	movzbl	%bh, %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.9(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	24(%r15), %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.10(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	28(%r15), %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.11(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	32(%r15), %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.12(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	36(%r15), %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.13(%rip), %rsi
LBB0_30:
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	40(%r15), %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.14(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
LBB0_31:
	xorl	%eax, %eax
	callq	_seq_printf
LBB0_33:
	movl	16(%r15), %edx
	leaq	L_.str.47(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	movl	4(%r15), %edx
	leaq	L_.str.48(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	movl	8(%r15), %edx
	leaq	L_.str.49(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r14, %rdi
	movl	%r13d, %esi
	callq	_intel_runtime_pm_put
	xorl	%eax, %eax
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	movq	%r15, %rdi
	callq	_INTEL_GEN
	cmpl	$6, %eax
	jl	LBB0_32
## %bb.6:
	movl	%r13d, -72(%rbp)                ## 4-byte Spill
	movq	%r14, -128(%rbp)                ## 8-byte Spill
	movq	_GEN6_RP_STATE_LIMITS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	movq	%r15, %rdi
	callq	_IS_GEN9_LP
	testq	%rax, %rax
	movq	_BXT_RP_STATE_CAP@GOTPCREL(%rip), %rax
	cmoveq	_GEN6_RP_STATE_CAP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_BXT_GT_PERF_STATUS@GOTPCREL(%rip), %r14
	cmoveq	_GEN6_GT_PERF_STATUS@GOTPCREL(%rip), %r14
	callq	_I915_READ
	movl	%eax, -68(%rbp)                 ## 4-byte Spill
	movl	(%r14), %edi
	callq	_I915_READ
	movl	%eax, -116(%rbp)                ## 4-byte Spill
	movq	_FORCEWAKE_ALL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_forcewake_get
	movq	_GEN6_RPNSWREQ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, %r13d
	movq	%r15, %rdi
	callq	_INTEL_GEN
	cmpl	$9, %eax
	jl	LBB0_8
## %bb.7:
	sarl	$23, %r13d
	jmp	LBB0_12
LBB0_32:
	leaq	L_.str.46(%rip), %rsi
	movq	%r12, %rdi
	callq	_seq_puts
	jmp	LBB0_33
LBB0_8:
	movq	_GEN6_TURBO_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r13d
	movq	%r15, %rdi
	callq	_IS_HASWELL
	testq	%rax, %rax
	jne	LBB0_10
## %bb.9:
	movq	%r15, %rdi
	callq	_IS_BROADWELL
	testq	%rax, %rax
	je	LBB0_11
LBB0_10:
	sarl	$24, %r13d
LBB0_12:
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_intel_gpu_freq
	movl	%eax, -108(%rbp)                ## 4-byte Spill
	movq	_GEN6_RP_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movq	_GEN6_RP_UP_THRESHOLD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, -88(%rbp)                 ## 4-byte Spill
	movq	_GEN6_RP_DOWN_THRESHOLD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, -92(%rbp)                 ## 4-byte Spill
	movq	_GEN6_RPSTAT1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, %r14d
	movq	_GEN6_RP_CUR_UP_EI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movq	_GEN6_CURICONT_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	%eax, -96(%rbp)                 ## 4-byte Spill
	movq	_GEN6_RP_CUR_UP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movq	_GEN6_CURBSYTAVG_MASK@GOTPCREL(%rip), %r13
	andl	(%r13), %eax
	movl	%eax, -100(%rbp)                ## 4-byte Spill
	movq	_GEN6_RP_PREV_UP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	andl	(%r13), %eax
	movl	%eax, -104(%rbp)                ## 4-byte Spill
	movq	_GEN6_RP_CUR_DOWN_EI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movq	_GEN6_CURIAVG_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	%eax, -112(%rbp)                ## 4-byte Spill
	movq	_GEN6_RP_CUR_DOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	andl	(%r13), %eax
	movl	%eax, -120(%rbp)                ## 4-byte Spill
	movq	_GEN6_RP_PREV_DOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	andl	(%r13), %eax
	movl	%eax, %r13d
	movq	%r15, %rdi
	movl	%r14d, -84(%rbp)                ## 4-byte Spill
	movl	%r14d, %esi
	callq	_intel_get_cagf
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_intel_gpu_freq
	movl	%eax, -76(%rbp)                 ## 4-byte Spill
	movq	_FORCEWAKE_ALL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_uncore_forcewake_put
	movq	%r15, %rdi
	callq	_INTEL_GEN
	cmpl	$11, %eax
	movl	%r13d, -80(%rbp)                ## 4-byte Spill
	jl	LBB0_14
## %bb.13:
	movq	_GEN11_GPM_WGBOXPERF_INTR_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movq	_GEN11_GPM_WGBOXPERF_INTR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	$0, -48(%rbp)                   ## 4-byte Folded Spill
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	jmp	LBB0_18
LBB0_14:
	movq	%r15, %rdi
	callq	_INTEL_GEN
	cmpl	$8, %eax
	jl	LBB0_16
## %bb.15:
	movl	$2, %edi
	callq	_GEN8_GT_IER
	movl	%eax, %edi
	callq	_I915_READ
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movl	$2, %edi
	callq	_GEN8_GT_IMR
	movl	%eax, %edi
	callq	_I915_READ
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	$2, %edi
	callq	_GEN8_GT_ISR
	movl	%eax, %edi
	callq	_I915_READ
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	$2, %edi
	callq	_GEN8_GT_IIR
	movl	%eax, %edi
	jmp	LBB0_17
LBB0_16:
	movq	_GEN6_PMIER@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movq	_GEN6_PMIMR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	_GEN6_PMISR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_GEN6_PMIIR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
LBB0_17:
	callq	_I915_READ
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
LBB0_18:
	movl	-64(%rbp), %r14d                ## 4-byte Reload
	movl	-60(%rbp), %ebx                 ## 4-byte Reload
	movq	_GEN6_PMINTRMSK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, %r13d
	movq	_GEN6_RP_MEDIA_TURBO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	%ebx, %edi
	callq	_yesno
	leaq	L_.str.4(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movq	_GEN6_RP_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	%ebx, %edi
	callq	_yesno
	leaq	L_.str.5(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movq	_GEN6_RP_MEDIA_MODE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%ebx, %eax
	movq	_GEN6_RP_MEDIA_SW_MODE@GOTPCREL(%rip), %rcx
	xorl	%edi, %edi
	cmpl	(%rcx), %eax
	sete	%dil
	callq	_yesno
	leaq	L_.str.6(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	leaq	L_.str.15(%rip), %rsi
	movq	%r12, %rdi
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	movl	-52(%rbp), %ecx                 ## 4-byte Reload
	movl	%r13d, %r8d
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r15, %rdi
	callq	_INTEL_GEN
	cmpl	$10, %eax
	movl	%ebx, %r13d
	jg	LBB0_20
## %bb.19:
	leaq	L_.str.16(%rip), %rsi
	movq	%r12, %rdi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_seq_printf
LBB0_20:
	movl	44(%r15), %edx
	leaq	L_.str.17(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	leaq	L_.str.18(%rip), %rsi
	movq	%r12, %rdi
	movl	-116(%rbp), %ebx                ## 4-byte Reload
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r15, %rdi
	callq	_INTEL_GEN
	xorl	%edx, %edx
	cmpl	$9, %eax
	setge	%dl
	shll	$16, %edx
	orl	$65280, %edx                    ## imm = 0xFF00
	andl	%ebx, %edx
	shrl	$8, %edx
	leaq	L_.str.19(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	movzbl	%bl, %edx
	leaq	L_.str.20(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	movzbl	%r14b, %edx
	leaq	L_.str.21(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	leaq	L_.str.22(%rip), %rsi
	movq	%r12, %rdi
	movl	-84(%rbp), %edx                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_seq_printf
	leaq	L_.str.23(%rip), %rsi
	movq	%r12, %rdi
	movl	%r13d, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	leaq	L_.str.24(%rip), %rsi
	movq	%r12, %rdi
	movl	-88(%rbp), %edx                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_seq_printf
	leaq	L_.str.25(%rip), %rsi
	movq	%r12, %rdi
	movl	-92(%rbp), %edx                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_seq_printf
	leaq	L_.str.26(%rip), %rsi
	movq	%r12, %rdi
	movl	-108(%rbp), %edx                ## 4-byte Reload
	xorl	%eax, %eax
	callq	_seq_printf
	leaq	L_.str.27(%rip), %rsi
	movq	%r12, %rdi
	movl	-76(%rbp), %edx                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r15, %rdi
	movl	-96(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %esi
	callq	_GT_PM_INTERVAL_TO_US
	leaq	L_.str.28(%rip), %rsi
	movq	%r12, %rdi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r15, %rdi
	movl	-100(%rbp), %ebx                ## 4-byte Reload
	movl	%ebx, %esi
	callq	_GT_PM_INTERVAL_TO_US
	leaq	L_.str.29(%rip), %rsi
	movq	%r12, %rdi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r15, %rdi
	movl	-104(%rbp), %ebx                ## 4-byte Reload
	movl	%ebx, %esi
	callq	_GT_PM_INTERVAL_TO_US
	leaq	L_.str.30(%rip), %rsi
	movq	%r12, %rdi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	52(%r15), %edx
	leaq	L_.str.31(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r15, %rdi
	movl	-112(%rbp), %ebx                ## 4-byte Reload
	movl	%ebx, %esi
	callq	_GT_PM_INTERVAL_TO_US
	leaq	L_.str.32(%rip), %rsi
	movq	%r12, %rdi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r15, %rdi
	movl	-120(%rbp), %ebx                ## 4-byte Reload
	movl	%ebx, %esi
	callq	_GT_PM_INTERVAL_TO_US
	leaq	L_.str.33(%rip), %rsi
	movq	%r12, %rdi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r15, %rdi
	movl	-80(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %esi
	callq	_GT_PM_INTERVAL_TO_US
	leaq	L_.str.34(%rip), %rsi
	movq	%r12, %rdi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	56(%r15), %edx
	leaq	L_.str.35(%rip), %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r15, %rdi
	callq	_IS_GEN9_LP
	movl	-68(%rbp), %ecx                 ## 4-byte Reload
	movl	%ecx, %ebx
	sarl	$16, %ebx
	testq	%rax, %rax
	movl	%ecx, %eax
	cmovel	%ebx, %eax
	movzbl	%al, %r14d
	movq	%r15, %rdi
	callq	_IS_GEN9_BC
	testq	%rax, %rax
	movl	-72(%rbp), %r13d                ## 4-byte Reload
	jne	LBB0_22
## %bb.21:
	movq	%r15, %rdi
	callq	_INTEL_GEN
	movl	$1, %esi
	cmpl	$10, %eax
	jl	LBB0_23
LBB0_22:
	movq	_GEN9_FREQ_SCALER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_23:
	imull	%r14d, %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.36(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	-68(%rbp), %eax                 ## 4-byte Reload
	movzbl	%ah, %eax
	movl	%eax, %r14d
	movq	%r15, %rdi
	callq	_IS_GEN9_BC
	testq	%rax, %rax
	jne	LBB0_25
## %bb.24:
	movq	%r15, %rdi
	callq	_INTEL_GEN
	movl	$1, %esi
	cmpl	$10, %eax
	jl	LBB0_26
LBB0_25:
	movq	_GEN9_FREQ_SCALER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_26:
	imull	%r14d, %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.37(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movq	%r15, %rdi
	callq	_IS_GEN9_LP
	testq	%rax, %rax
	cmovel	-68(%rbp), %ebx                 ## 4-byte Folded Reload
	movzbl	%bl, %ebx
	movq	%r15, %rdi
	callq	_IS_GEN9_BC
	testq	%rax, %rax
	movq	-128(%rbp), %r14                ## 8-byte Reload
	jne	LBB0_28
## %bb.27:
	movq	%r15, %rdi
	callq	_INTEL_GEN
	movl	$1, %esi
	cmpl	$10, %eax
	jl	LBB0_29
LBB0_28:
	movq	_GEN9_FREQ_SCALER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_29:
	imull	%ebx, %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.38(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	28(%r15), %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.39(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	24(%r15), %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.40(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	leaq	L_.str.41(%rip), %rsi
	movq	%r12, %rdi
	movl	-76(%rbp), %edx                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_seq_printf
	movl	36(%r15), %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.42(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	32(%r15), %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.43(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	48(%r15), %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.44(%rip), %rsi
	movq	%r12, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_seq_printf
	movl	28(%r15), %esi
	movq	%r15, %rdi
	callq	_intel_gpu_freq
	leaq	L_.str.45(%rip), %rsi
	jmp	LBB0_30
LBB0_11:
	sarl	$25, %r13d
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.comm	_MEMSWCTL,4,2                   ## @MEMSWCTL
	.comm	_MEMSTAT_ILK,4,2                ## @MEMSTAT_ILK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Requested P-state: %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"Requested VID: %d\n"

L_.str.2:                               ## @.str.2
	.asciz	"Current VID: %d\n"

	.comm	_MEMSTAT_VID_MASK,4,2           ## @MEMSTAT_VID_MASK
	.comm	_MEMSTAT_VID_SHIFT,4,2          ## @MEMSTAT_VID_SHIFT
L_.str.3:                               ## @.str.3
	.asciz	"Current P-state: %d\n"

	.comm	_MEMSTAT_PSTATE_MASK,4,2        ## @MEMSTAT_PSTATE_MASK
	.comm	_MEMSTAT_PSTATE_SHIFT,4,2       ## @MEMSTAT_PSTATE_SHIFT
	.comm	_GEN6_RP_CONTROL,4,2            ## @GEN6_RP_CONTROL
L_.str.4:                               ## @.str.4
	.asciz	"Video Turbo Mode: %s\n"

	.comm	_GEN6_RP_MEDIA_TURBO,4,2        ## @GEN6_RP_MEDIA_TURBO
L_.str.5:                               ## @.str.5
	.asciz	"HW control enabled: %s\n"

	.comm	_GEN6_RP_ENABLE,4,2             ## @GEN6_RP_ENABLE
L_.str.6:                               ## @.str.6
	.asciz	"SW control enabled: %s\n"

	.comm	_GEN6_RP_MEDIA_MODE_MASK,4,2    ## @GEN6_RP_MEDIA_MODE_MASK
	.comm	_GEN6_RP_MEDIA_SW_MODE,4,2      ## @GEN6_RP_MEDIA_SW_MODE
	.comm	_PUNIT_REG_GPU_FREQ_STS,4,2     ## @PUNIT_REG_GPU_FREQ_STS
L_.str.7:                               ## @.str.7
	.asciz	"PUNIT_REG_GPU_FREQ_STS: 0x%08x\n"

L_.str.8:                               ## @.str.8
	.asciz	"DDR freq: %d MHz\n"

L_.str.9:                               ## @.str.9
	.asciz	"actual GPU freq: %d MHz\n"

L_.str.10:                              ## @.str.10
	.asciz	"current GPU freq: %d MHz\n"

L_.str.11:                              ## @.str.11
	.asciz	"max GPU freq: %d MHz\n"

L_.str.12:                              ## @.str.12
	.asciz	"min GPU freq: %d MHz\n"

L_.str.13:                              ## @.str.13
	.asciz	"idle GPU freq: %d MHz\n"

L_.str.14:                              ## @.str.14
	.asciz	"efficient (RPe) frequency: %d MHz\n"

	.comm	_GEN6_RP_STATE_LIMITS,4,2       ## @GEN6_RP_STATE_LIMITS
	.comm	_BXT_RP_STATE_CAP,4,2           ## @BXT_RP_STATE_CAP
	.comm	_BXT_GT_PERF_STATUS,4,2         ## @BXT_GT_PERF_STATUS
	.comm	_GEN6_RP_STATE_CAP,4,2          ## @GEN6_RP_STATE_CAP
	.comm	_GEN6_GT_PERF_STATUS,4,2        ## @GEN6_GT_PERF_STATUS
	.comm	_FORCEWAKE_ALL,4,2              ## @FORCEWAKE_ALL
	.comm	_GEN6_RPNSWREQ,4,2              ## @GEN6_RPNSWREQ
	.comm	_GEN6_TURBO_DISABLE,4,2         ## @GEN6_TURBO_DISABLE
	.comm	_GEN6_RP_UP_THRESHOLD,4,2       ## @GEN6_RP_UP_THRESHOLD
	.comm	_GEN6_RP_DOWN_THRESHOLD,4,2     ## @GEN6_RP_DOWN_THRESHOLD
	.comm	_GEN6_RPSTAT1,4,2               ## @GEN6_RPSTAT1
	.comm	_GEN6_RP_CUR_UP_EI,4,2          ## @GEN6_RP_CUR_UP_EI
	.comm	_GEN6_CURICONT_MASK,4,2         ## @GEN6_CURICONT_MASK
	.comm	_GEN6_RP_CUR_UP,4,2             ## @GEN6_RP_CUR_UP
	.comm	_GEN6_CURBSYTAVG_MASK,4,2       ## @GEN6_CURBSYTAVG_MASK
	.comm	_GEN6_RP_PREV_UP,4,2            ## @GEN6_RP_PREV_UP
	.comm	_GEN6_RP_CUR_DOWN_EI,4,2        ## @GEN6_RP_CUR_DOWN_EI
	.comm	_GEN6_CURIAVG_MASK,4,2          ## @GEN6_CURIAVG_MASK
	.comm	_GEN6_RP_CUR_DOWN,4,2           ## @GEN6_RP_CUR_DOWN
	.comm	_GEN6_RP_PREV_DOWN,4,2          ## @GEN6_RP_PREV_DOWN
	.comm	_GEN11_GPM_WGBOXPERF_INTR_ENABLE,4,2 ## @GEN11_GPM_WGBOXPERF_INTR_ENABLE
	.comm	_GEN11_GPM_WGBOXPERF_INTR_MASK,4,2 ## @GEN11_GPM_WGBOXPERF_INTR_MASK
	.comm	_GEN6_PMIER,4,2                 ## @GEN6_PMIER
	.comm	_GEN6_PMIMR,4,2                 ## @GEN6_PMIMR
	.comm	_GEN6_PMISR,4,2                 ## @GEN6_PMISR
	.comm	_GEN6_PMIIR,4,2                 ## @GEN6_PMIIR
	.comm	_GEN6_PMINTRMSK,4,2             ## @GEN6_PMINTRMSK
L_.str.15:                              ## @.str.15
	.asciz	"PM IER=0x%08x IMR=0x%08x, MASK=0x%08x\n"

L_.str.16:                              ## @.str.16
	.asciz	"PM ISR=0x%08x IIR=0x%08x\n"

L_.str.17:                              ## @.str.17
	.asciz	"pm_intrmsk_mbz: 0x%08x\n"

L_.str.18:                              ## @.str.18
	.asciz	"GT_PERF_STATUS: 0x%08x\n"

L_.str.19:                              ## @.str.19
	.asciz	"Render p-state ratio: %d\n"

L_.str.20:                              ## @.str.20
	.asciz	"Render p-state VID: %d\n"

L_.str.21:                              ## @.str.21
	.asciz	"Render p-state limit: %d\n"

L_.str.22:                              ## @.str.22
	.asciz	"RPSTAT1: 0x%08x\n"

L_.str.23:                              ## @.str.23
	.asciz	"RPMODECTL: 0x%08x\n"

L_.str.24:                              ## @.str.24
	.asciz	"RPINCLIMIT: 0x%08x\n"

L_.str.25:                              ## @.str.25
	.asciz	"RPDECLIMIT: 0x%08x\n"

L_.str.26:                              ## @.str.26
	.asciz	"RPNSWREQ: %dMHz\n"

L_.str.27:                              ## @.str.27
	.asciz	"CAGF: %dMHz\n"

L_.str.28:                              ## @.str.28
	.asciz	"RP CUR UP EI: %d (%dus)\n"

L_.str.29:                              ## @.str.29
	.asciz	"RP CUR UP: %d (%dus)\n"

L_.str.30:                              ## @.str.30
	.asciz	"RP PREV UP: %d (%dus)\n"

L_.str.31:                              ## @.str.31
	.asciz	"Up threshold: %d%%\n"

L_.str.32:                              ## @.str.32
	.asciz	"RP CUR DOWN EI: %d (%dus)\n"

L_.str.33:                              ## @.str.33
	.asciz	"RP CUR DOWN: %d (%dus)\n"

L_.str.34:                              ## @.str.34
	.asciz	"RP PREV DOWN: %d (%dus)\n"

L_.str.35:                              ## @.str.35
	.asciz	"Down threshold: %d%%\n"

	.comm	_GEN9_FREQ_SCALER,4,2           ## @GEN9_FREQ_SCALER
L_.str.36:                              ## @.str.36
	.asciz	"Lowest (RPN) frequency: %dMHz\n"

L_.str.37:                              ## @.str.37
	.asciz	"Nominal (RP1) frequency: %dMHz\n"

L_.str.38:                              ## @.str.38
	.asciz	"Max non-overclocked (RP0) frequency: %dMHz\n"

L_.str.39:                              ## @.str.39
	.asciz	"Max overclocked frequency: %dMHz\n"

L_.str.40:                              ## @.str.40
	.asciz	"Current freq: %d MHz\n"

L_.str.41:                              ## @.str.41
	.asciz	"Actual freq: %d MHz\n"

L_.str.42:                              ## @.str.42
	.asciz	"Idle freq: %d MHz\n"

L_.str.43:                              ## @.str.43
	.asciz	"Min freq: %d MHz\n"

L_.str.44:                              ## @.str.44
	.asciz	"Boost freq: %d MHz\n"

L_.str.45:                              ## @.str.45
	.asciz	"Max freq: %d MHz\n"

L_.str.46:                              ## @.str.46
	.asciz	"no P-state info available\n"

L_.str.47:                              ## @.str.47
	.asciz	"Current CD clock frequency: %d kHz\n"

L_.str.48:                              ## @.str.48
	.asciz	"Max CD clock frequency: %d kHz\n"

L_.str.49:                              ## @.str.49
	.asciz	"Max pixel clock frequency: %d kHz\n"

	.no_dead_strip	_i915_frequency_info
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function i915_frequency_info
_i915_frequency_info:                   ; @i915_frequency_info
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #176
	.cfi_def_cfa_offset 176
	stp	x28, x27, [sp, #80]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #96]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #112]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #128]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #144]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #160]            ; 16-byte Folded Spill
	add	x29, sp, #160
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	w0, [x0]
	bl	_node_to_i915
	mov	x21, x0
	add	x23, x0, #20
	add	x20, x0, #12
	mov	x0, x20
	bl	_intel_runtime_pm_get
	mov	x22, x0
	mov	x0, x21
	mov	w1, #5
	bl	_IS_GEN
	cbz	x0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _MEMSWCTL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MEMSWCTL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_intel_uncore_read16
	mov	x24, x0
Lloh3:
	adrp	x8, _MEMSTAT_ILK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MEMSTAT_ILK@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_intel_uncore_read16
	mov	x23, x0
	ubfx	w2, w24, #8, #4
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	and	w2, w24, #0x3f
Lloh8:
	adrp	x1, l_.str.1@PAGE
Lloh9:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
Lloh10:
	adrp	x8, _MEMSTAT_VID_MASK@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MEMSTAT_VID_MASK@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	and	w8, w8, w23
Lloh13:
	adrp	x9, _MEMSTAT_VID_SHIFT@GOTPAGE
Lloh14:
	ldr	x9, [x9, _MEMSTAT_VID_SHIFT@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	asr	w2, w8, w9
Lloh16:
	adrp	x1, l_.str.2@PAGE
Lloh17:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
Lloh18:
	adrp	x8, _MEMSTAT_PSTATE_MASK@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MEMSTAT_PSTATE_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	and	w8, w8, w23
Lloh21:
	adrp	x9, _MEMSTAT_PSTATE_SHIFT@GOTPAGE
Lloh22:
	ldr	x9, [x9, _MEMSTAT_PSTATE_SHIFT@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	asr	w2, w8, w9
Lloh24:
	adrp	x1, l_.str.3@PAGE
Lloh25:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_6
LBB0_2:
	mov	x0, x21
	bl	_IS_VALLEYVIEW
	cbnz	x0, LBB0_4
; %bb.3:
	mov	x0, x21
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_8
LBB0_4:
Lloh26:
	adrp	x8, _GEN6_RP_CONTROL@GOTPAGE
Lloh27:
	ldr	x8, [x8, _GEN6_RP_CONTROL@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x23, x0
Lloh29:
	adrp	x8, _GEN6_RP_MEDIA_TURBO@GOTPAGE
Lloh30:
	ldr	x8, [x8, _GEN6_RP_MEDIA_TURBO@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	and	w0, w8, w0
	bl	_yesno
	mov	x2, x0
Lloh32:
	adrp	x1, l_.str.4@PAGE
Lloh33:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
Lloh34:
	adrp	x8, _GEN6_RP_ENABLE@GOTPAGE
Lloh35:
	ldr	x8, [x8, _GEN6_RP_ENABLE@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
	and	w0, w8, w23
	bl	_yesno
	mov	x2, x0
Lloh37:
	adrp	x1, l_.str.5@PAGE
Lloh38:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
Lloh39:
	adrp	x8, _GEN6_RP_MEDIA_MODE_MASK@GOTPAGE
Lloh40:
	ldr	x8, [x8, _GEN6_RP_MEDIA_MODE_MASK@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	and	w8, w8, w23
Lloh42:
	adrp	x9, _GEN6_RP_MEDIA_SW_MODE@GOTPAGE
Lloh43:
	ldr	x9, [x9, _GEN6_RP_MEDIA_SW_MODE@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	cmp	w8, w9
	cset	w0, eq
	bl	_yesno
	mov	x2, x0
Lloh45:
	adrp	x1, l_.str.6@PAGE
Lloh46:
	add	x1, x1, l_.str.6@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	mov	x0, x21
	bl	_vlv_punit_get
Lloh47:
	adrp	x8, _PUNIT_REG_GPU_FREQ_STS@GOTPAGE
Lloh48:
	ldr	x8, [x8, _PUNIT_REG_GPU_FREQ_STS@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_vlv_punit_read
	mov	x23, x0
	mov	x0, x21
	bl	_vlv_punit_put
Lloh50:
	adrp	x1, l_.str.7@PAGE
Lloh51:
	add	x1, x1, l_.str.7@PAGEOFF
	mov	x0, x19
	mov	x2, x23
	bl	_seq_printf
	ldr	w2, [x21]
Lloh52:
	adrp	x1, l_.str.8@PAGE
Lloh53:
	add	x1, x1, l_.str.8@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ubfx	w1, w23, #8, #8
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh54:
	adrp	x1, l_.str.9@PAGE
Lloh55:
	add	x1, x1, l_.str.9@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w1, [x21, #24]
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh56:
	adrp	x1, l_.str.10@PAGE
Lloh57:
	add	x1, x1, l_.str.10@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w1, [x21, #28]
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh58:
	adrp	x1, l_.str.11@PAGE
Lloh59:
	add	x1, x1, l_.str.11@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w1, [x21, #32]
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh60:
	adrp	x1, l_.str.12@PAGE
Lloh61:
	add	x1, x1, l_.str.12@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w1, [x21, #36]
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh62:
	adrp	x1, l_.str.13@PAGE
Lloh63:
	add	x1, x1, l_.str.13@PAGEOFF
LBB0_5:
	mov	x0, x19
	bl	_seq_printf
	ldr	w1, [x21, #40]
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh64:
	adrp	x1, l_.str.14@PAGE
Lloh65:
	add	x1, x1, l_.str.14@PAGEOFF
LBB0_6:
	mov	x0, x19
	bl	_seq_printf
LBB0_7:
	ldr	w2, [x21, #16]
Lloh66:
	adrp	x1, l_.str.47@PAGE
Lloh67:
	add	x1, x1, l_.str.47@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w2, [x21, #4]
Lloh68:
	adrp	x1, l_.str.48@PAGE
Lloh69:
	add	x1, x1, l_.str.48@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w2, [x21, #8]
Lloh70:
	adrp	x1, l_.str.49@PAGE
Lloh71:
	add	x1, x1, l_.str.49@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	mov	x0, x20
	mov	x1, x22
	bl	_intel_runtime_pm_put
	mov	w0, #0
	ldp	x29, x30, [sp, #160]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #144]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #128]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #112]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #96]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #80]             ; 16-byte Folded Reload
	add	sp, sp, #176
	ret
LBB0_8:
	mov	x0, x21
	bl	_INTEL_GEN
	cmp	w0, #6
	b.lt	LBB0_11
; %bb.9:
Lloh72:
	adrp	x8, _GEN6_RP_STATE_LIMITS@GOTPAGE
Lloh73:
	ldr	x8, [x8, _GEN6_RP_STATE_LIMITS@GOTPAGEOFF]
Lloh74:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x25, x0
	mov	x0, x21
	bl	_IS_GEN9_LP
Lloh75:
	adrp	x8, _GEN6_RP_STATE_CAP@GOTPAGE
Lloh76:
	ldr	x8, [x8, _GEN6_RP_STATE_CAP@GOTPAGEOFF]
Lloh77:
	adrp	x9, _BXT_RP_STATE_CAP@GOTPAGE
Lloh78:
	ldr	x9, [x9, _BXT_RP_STATE_CAP@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x8, x9, eq
	ldr	w0, [x8]
Lloh79:
	adrp	x8, _GEN6_GT_PERF_STATUS@GOTPAGE
Lloh80:
	ldr	x8, [x8, _GEN6_GT_PERF_STATUS@GOTPAGEOFF]
Lloh81:
	adrp	x9, _BXT_GT_PERF_STATUS@GOTPAGE
Lloh82:
	ldr	x9, [x9, _BXT_GT_PERF_STATUS@GOTPAGEOFF]
	csel	x24, x8, x9, eq
	bl	_I915_READ
	mov	x26, x0
	ldr	w0, [x24]
	bl	_I915_READ
	mov	x28, x0
Lloh83:
	adrp	x27, _FORCEWAKE_ALL@GOTPAGE
Lloh84:
	ldr	x27, [x27, _FORCEWAKE_ALL@GOTPAGEOFF]
	ldr	w1, [x27]
	mov	x0, x23
	bl	_intel_uncore_forcewake_get
Lloh85:
	adrp	x8, _GEN6_RPNSWREQ@GOTPAGE
Lloh86:
	ldr	x8, [x8, _GEN6_RPNSWREQ@GOTPAGEOFF]
Lloh87:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x24, x0
	mov	x0, x21
	bl	_INTEL_GEN
	cmp	w0, #9
	str	w26, [sp, #76]                  ; 4-byte Folded Spill
	str	w25, [sp, #68]                  ; 4-byte Folded Spill
	str	w28, [sp, #56]                  ; 4-byte Folded Spill
	b.lt	LBB0_12
; %bb.10:
	asr	w1, w24, #23
	b	LBB0_15
LBB0_11:
Lloh88:
	adrp	x1, l_.str.46@PAGE
Lloh89:
	add	x1, x1, l_.str.46@PAGEOFF
	mov	x0, x19
	bl	_seq_puts
	b	LBB0_7
LBB0_12:
Lloh90:
	adrp	x8, _GEN6_TURBO_DISABLE@GOTPAGE
Lloh91:
	ldr	x8, [x8, _GEN6_TURBO_DISABLE@GOTPAGEOFF]
Lloh92:
	ldr	w8, [x8]
	bic	w24, w24, w8
	mov	x0, x21
	bl	_IS_HASWELL
	cbnz	x0, LBB0_14
; %bb.13:
	mov	x0, x21
	bl	_IS_BROADWELL
	cbz	x0, LBB0_36
LBB0_14:
	asr	w1, w24, #24
LBB0_15:
	mov	x0, x21
	bl	_intel_gpu_freq
	str	w0, [sp, #48]                   ; 4-byte Folded Spill
Lloh93:
	adrp	x8, _GEN6_RP_CONTROL@GOTPAGE
Lloh94:
	ldr	x8, [x8, _GEN6_RP_CONTROL@GOTPAGEOFF]
Lloh95:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x25, x0
Lloh96:
	adrp	x8, _GEN6_RP_UP_THRESHOLD@GOTPAGE
Lloh97:
	ldr	x8, [x8, _GEN6_RP_UP_THRESHOLD@GOTPAGEOFF]
Lloh98:
	ldr	w0, [x8]
	bl	_I915_READ
	str	w0, [sp, #32]                   ; 4-byte Folded Spill
Lloh99:
	adrp	x8, _GEN6_RP_DOWN_THRESHOLD@GOTPAGE
Lloh100:
	ldr	x8, [x8, _GEN6_RP_DOWN_THRESHOLD@GOTPAGEOFF]
Lloh101:
	ldr	w0, [x8]
	bl	_I915_READ
	str	w0, [sp, #28]                   ; 4-byte Folded Spill
Lloh102:
	adrp	x8, _GEN6_RPSTAT1@GOTPAGE
Lloh103:
	ldr	x8, [x8, _GEN6_RPSTAT1@GOTPAGEOFF]
Lloh104:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x26, x0
Lloh105:
	adrp	x8, _GEN6_RP_CUR_UP_EI@GOTPAGE
Lloh106:
	ldr	x8, [x8, _GEN6_RP_CUR_UP_EI@GOTPAGEOFF]
Lloh107:
	ldr	w0, [x8]
	bl	_I915_READ
Lloh108:
	adrp	x8, _GEN6_CURICONT_MASK@GOTPAGE
Lloh109:
	ldr	x8, [x8, _GEN6_CURICONT_MASK@GOTPAGEOFF]
Lloh110:
	ldr	w8, [x8]
	and	w8, w8, w0
	str	w8, [sp, #36]                   ; 4-byte Folded Spill
Lloh111:
	adrp	x8, _GEN6_RP_CUR_UP@GOTPAGE
Lloh112:
	ldr	x8, [x8, _GEN6_RP_CUR_UP@GOTPAGEOFF]
Lloh113:
	ldr	w0, [x8]
	bl	_I915_READ
Lloh114:
	adrp	x24, _GEN6_CURBSYTAVG_MASK@GOTPAGE
Lloh115:
	ldr	x24, [x24, _GEN6_CURBSYTAVG_MASK@GOTPAGEOFF]
	ldr	w8, [x24]
	and	w8, w8, w0
	str	w8, [sp, #40]                   ; 4-byte Folded Spill
Lloh116:
	adrp	x8, _GEN6_RP_PREV_UP@GOTPAGE
Lloh117:
	ldr	x8, [x8, _GEN6_RP_PREV_UP@GOTPAGEOFF]
Lloh118:
	ldr	w0, [x8]
	bl	_I915_READ
	ldr	w8, [x24]
	and	w8, w8, w0
	str	w8, [sp, #44]                   ; 4-byte Folded Spill
Lloh119:
	adrp	x8, _GEN6_RP_CUR_DOWN_EI@GOTPAGE
Lloh120:
	ldr	x8, [x8, _GEN6_RP_CUR_DOWN_EI@GOTPAGEOFF]
Lloh121:
	ldr	w0, [x8]
	bl	_I915_READ
Lloh122:
	adrp	x8, _GEN6_CURIAVG_MASK@GOTPAGE
Lloh123:
	ldr	x8, [x8, _GEN6_CURIAVG_MASK@GOTPAGEOFF]
Lloh124:
	ldr	w8, [x8]
	and	w8, w8, w0
	str	w8, [sp, #52]                   ; 4-byte Folded Spill
Lloh125:
	adrp	x8, _GEN6_RP_CUR_DOWN@GOTPAGE
Lloh126:
	ldr	x8, [x8, _GEN6_RP_CUR_DOWN@GOTPAGEOFF]
Lloh127:
	ldr	w0, [x8]
	bl	_I915_READ
	ldr	w8, [x24]
	and	w8, w8, w0
	str	w8, [sp, #60]                   ; 4-byte Folded Spill
Lloh128:
	adrp	x8, _GEN6_RP_PREV_DOWN@GOTPAGE
Lloh129:
	ldr	x8, [x8, _GEN6_RP_PREV_DOWN@GOTPAGEOFF]
Lloh130:
	ldr	w0, [x8]
	bl	_I915_READ
	ldr	w8, [x24]
	and	w28, w8, w0
	mov	x0, x21
	str	w26, [sp, #24]                  ; 4-byte Folded Spill
	mov	x1, x26
	bl	_intel_get_cagf
	mov	x1, x0
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x24, x0
	ldr	w1, [x27]
	mov	x0, x23
	bl	_intel_uncore_forcewake_put
	mov	x0, x21
	bl	_INTEL_GEN
	cmp	w0, #11
	str	w24, [sp, #72]                  ; 4-byte Folded Spill
	str	w28, [sp, #64]                  ; 4-byte Folded Spill
	b.lt	LBB0_17
; %bb.16:
Lloh131:
	adrp	x8, _GEN11_GPM_WGBOXPERF_INTR_ENABLE@GOTPAGE
Lloh132:
	ldr	x8, [x8, _GEN11_GPM_WGBOXPERF_INTR_ENABLE@GOTPAGEOFF]
Lloh133:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x23, x0
Lloh134:
	adrp	x8, _GEN11_GPM_WGBOXPERF_INTR_MASK@GOTPAGE
Lloh135:
	ldr	x8, [x8, _GEN11_GPM_WGBOXPERF_INTR_MASK@GOTPAGEOFF]
Lloh136:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x26, x0
	mov	w27, #0
	mov	w24, #0
	b	LBB0_21
LBB0_17:
	mov	x0, x21
	bl	_INTEL_GEN
	cmp	w0, #8
	b.lt	LBB0_19
; %bb.18:
	mov	w0, #2
	bl	_GEN8_GT_IER
	bl	_I915_READ
	mov	x23, x0
	mov	w0, #2
	bl	_GEN8_GT_IMR
	bl	_I915_READ
	mov	x26, x0
	mov	w0, #2
	bl	_GEN8_GT_ISR
	bl	_I915_READ
	mov	x27, x0
	mov	w0, #2
	bl	_GEN8_GT_IIR
	b	LBB0_20
LBB0_19:
Lloh137:
	adrp	x8, _GEN6_PMIER@GOTPAGE
Lloh138:
	ldr	x8, [x8, _GEN6_PMIER@GOTPAGEOFF]
Lloh139:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x23, x0
Lloh140:
	adrp	x8, _GEN6_PMIMR@GOTPAGE
Lloh141:
	ldr	x8, [x8, _GEN6_PMIMR@GOTPAGEOFF]
Lloh142:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x26, x0
Lloh143:
	adrp	x8, _GEN6_PMISR@GOTPAGE
Lloh144:
	ldr	x8, [x8, _GEN6_PMISR@GOTPAGEOFF]
Lloh145:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x27, x0
Lloh146:
	adrp	x8, _GEN6_PMIIR@GOTPAGE
Lloh147:
	ldr	x8, [x8, _GEN6_PMIIR@GOTPAGEOFF]
Lloh148:
	ldr	w0, [x8]
LBB0_20:
	bl	_I915_READ
	mov	x24, x0
LBB0_21:
Lloh149:
	adrp	x8, _GEN6_PMINTRMSK@GOTPAGE
Lloh150:
	ldr	x8, [x8, _GEN6_PMINTRMSK@GOTPAGEOFF]
Lloh151:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x28, x0
Lloh152:
	adrp	x8, _GEN6_RP_MEDIA_TURBO@GOTPAGE
Lloh153:
	ldr	x8, [x8, _GEN6_RP_MEDIA_TURBO@GOTPAGEOFF]
Lloh154:
	ldr	w8, [x8]
	and	w0, w8, w25
	bl	_yesno
	mov	x2, x0
Lloh155:
	adrp	x1, l_.str.4@PAGE
Lloh156:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
Lloh157:
	adrp	x8, _GEN6_RP_ENABLE@GOTPAGE
Lloh158:
	ldr	x8, [x8, _GEN6_RP_ENABLE@GOTPAGEOFF]
Lloh159:
	ldr	w8, [x8]
	and	w0, w8, w25
	bl	_yesno
	mov	x2, x0
Lloh160:
	adrp	x1, l_.str.5@PAGE
Lloh161:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
Lloh162:
	adrp	x8, _GEN6_RP_MEDIA_MODE_MASK@GOTPAGE
Lloh163:
	ldr	x8, [x8, _GEN6_RP_MEDIA_MODE_MASK@GOTPAGEOFF]
Lloh164:
	ldr	w8, [x8]
	and	w8, w8, w25
Lloh165:
	adrp	x9, _GEN6_RP_MEDIA_SW_MODE@GOTPAGE
Lloh166:
	ldr	x9, [x9, _GEN6_RP_MEDIA_SW_MODE@GOTPAGEOFF]
Lloh167:
	ldr	w9, [x9]
	cmp	w8, w9
	cset	w0, eq
	bl	_yesno
	mov	x2, x0
Lloh168:
	adrp	x1, l_.str.6@PAGE
Lloh169:
	add	x1, x1, l_.str.6@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	stp	x26, x28, [sp]
Lloh170:
	adrp	x1, l_.str.15@PAGE
Lloh171:
	add	x1, x1, l_.str.15@PAGEOFF
	mov	x0, x19
	mov	x2, x23
	bl	_seq_printf
	mov	x0, x21
	bl	_INTEL_GEN
	cmp	w0, #10
	b.gt	LBB0_23
; %bb.22:
	str	x24, [sp]
Lloh172:
	adrp	x1, l_.str.16@PAGE
Lloh173:
	add	x1, x1, l_.str.16@PAGEOFF
	mov	x0, x19
	mov	x2, x27
	bl	_seq_printf
LBB0_23:
	ldr	w2, [x21, #44]
Lloh174:
	adrp	x1, l_.str.17@PAGE
Lloh175:
	add	x1, x1, l_.str.17@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
Lloh176:
	adrp	x1, l_.str.18@PAGE
Lloh177:
	add	x1, x1, l_.str.18@PAGEOFF
	mov	x0, x19
	ldr	w23, [sp, #56]                  ; 4-byte Folded Reload
	mov	x2, x23
	bl	_seq_printf
	mov	x0, x21
	bl	_INTEL_GEN
	mov	w8, #65280
	mov	w9, #130816
	cmp	w0, #8
	csel	w8, w9, w8, gt
	and	w8, w8, w23
	lsr	w2, w8, #8
Lloh178:
	adrp	x1, l_.str.19@PAGE
Lloh179:
	add	x1, x1, l_.str.19@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	and	w2, w23, #0xff
Lloh180:
	adrp	x1, l_.str.20@PAGE
Lloh181:
	add	x1, x1, l_.str.20@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w8, [sp, #68]                   ; 4-byte Folded Reload
	and	w2, w8, #0xff
Lloh182:
	adrp	x1, l_.str.21@PAGE
Lloh183:
	add	x1, x1, l_.str.21@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
Lloh184:
	adrp	x1, l_.str.22@PAGE
Lloh185:
	add	x1, x1, l_.str.22@PAGEOFF
	mov	x0, x19
	ldr	w2, [sp, #24]                   ; 4-byte Folded Reload
	bl	_seq_printf
Lloh186:
	adrp	x1, l_.str.23@PAGE
Lloh187:
	add	x1, x1, l_.str.23@PAGEOFF
	mov	x0, x19
	mov	x2, x25
	bl	_seq_printf
Lloh188:
	adrp	x1, l_.str.24@PAGE
Lloh189:
	add	x1, x1, l_.str.24@PAGEOFF
	mov	x0, x19
	ldr	w2, [sp, #32]                   ; 4-byte Folded Reload
	bl	_seq_printf
Lloh190:
	adrp	x1, l_.str.25@PAGE
Lloh191:
	add	x1, x1, l_.str.25@PAGEOFF
	mov	x0, x19
	ldr	w2, [sp, #28]                   ; 4-byte Folded Reload
	bl	_seq_printf
Lloh192:
	adrp	x1, l_.str.26@PAGE
Lloh193:
	add	x1, x1, l_.str.26@PAGEOFF
	mov	x0, x19
	ldr	w2, [sp, #48]                   ; 4-byte Folded Reload
	bl	_seq_printf
Lloh194:
	adrp	x1, l_.str.27@PAGE
Lloh195:
	add	x1, x1, l_.str.27@PAGEOFF
	mov	x0, x19
	ldr	w27, [sp, #72]                  ; 4-byte Folded Reload
	mov	x2, x27
	bl	_seq_printf
	mov	x0, x21
	ldr	w23, [sp, #36]                  ; 4-byte Folded Reload
	mov	x1, x23
	bl	_GT_PM_INTERVAL_TO_US
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh196:
	adrp	x1, l_.str.28@PAGE
Lloh197:
	add	x1, x1, l_.str.28@PAGEOFF
	mov	x0, x19
	mov	x2, x23
	bl	_seq_printf
	mov	x0, x21
	ldr	w23, [sp, #40]                  ; 4-byte Folded Reload
	mov	x1, x23
	bl	_GT_PM_INTERVAL_TO_US
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh198:
	adrp	x1, l_.str.29@PAGE
Lloh199:
	add	x1, x1, l_.str.29@PAGEOFF
	mov	x0, x19
	mov	x2, x23
	bl	_seq_printf
	mov	x0, x21
	ldr	w23, [sp, #44]                  ; 4-byte Folded Reload
	mov	x1, x23
	bl	_GT_PM_INTERVAL_TO_US
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh200:
	adrp	x1, l_.str.30@PAGE
Lloh201:
	add	x1, x1, l_.str.30@PAGEOFF
	mov	x0, x19
	mov	x2, x23
	bl	_seq_printf
	ldr	w2, [x21, #52]
Lloh202:
	adrp	x1, l_.str.31@PAGE
Lloh203:
	add	x1, x1, l_.str.31@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	mov	x0, x21
	ldr	w23, [sp, #52]                  ; 4-byte Folded Reload
	mov	x1, x23
	bl	_GT_PM_INTERVAL_TO_US
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh204:
	adrp	x1, l_.str.32@PAGE
Lloh205:
	add	x1, x1, l_.str.32@PAGEOFF
	mov	x0, x19
	mov	x2, x23
	bl	_seq_printf
	mov	x0, x21
	ldr	w23, [sp, #60]                  ; 4-byte Folded Reload
	mov	x1, x23
	bl	_GT_PM_INTERVAL_TO_US
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh206:
	adrp	x1, l_.str.33@PAGE
Lloh207:
	add	x1, x1, l_.str.33@PAGEOFF
	mov	x0, x19
	mov	x2, x23
	bl	_seq_printf
	mov	x0, x21
	ldr	w23, [sp, #64]                  ; 4-byte Folded Reload
	mov	x1, x23
	bl	_GT_PM_INTERVAL_TO_US
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh208:
	adrp	x1, l_.str.34@PAGE
Lloh209:
	add	x1, x1, l_.str.34@PAGEOFF
	mov	x0, x19
	mov	x2, x23
	bl	_seq_printf
	ldr	w2, [x21, #56]
Lloh210:
	adrp	x1, l_.str.35@PAGE
Lloh211:
	add	x1, x1, l_.str.35@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	mov	x0, x21
	bl	_IS_GEN9_LP
	ldr	w26, [sp, #76]                  ; 4-byte Folded Reload
	asr	w24, w26, #16
	cmp	x0, #0
	csel	w8, w24, w26, eq
	and	w25, w8, #0xff
	mov	x0, x21
	bl	_IS_GEN9_BC
Lloh212:
	adrp	x23, _GEN9_FREQ_SCALER@GOTPAGE
Lloh213:
	ldr	x23, [x23, _GEN9_FREQ_SCALER@GOTPAGEOFF]
	cbnz	x0, LBB0_25
; %bb.24:
	mov	x0, x21
	bl	_INTEL_GEN
	cmp	w0, #10
	b.lt	LBB0_33
LBB0_25:
	ldr	w8, [x23]
LBB0_26:
	mul	w1, w8, w25
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh214:
	adrp	x1, l_.str.36@PAGE
Lloh215:
	add	x1, x1, l_.str.36@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ubfx	w25, w26, #8, #8
	mov	x0, x21
	bl	_IS_GEN9_BC
	cbnz	x0, LBB0_28
; %bb.27:
	mov	x0, x21
	bl	_INTEL_GEN
	cmp	w0, #10
	b.lt	LBB0_34
LBB0_28:
	ldr	w8, [x23]
LBB0_29:
	mul	w1, w8, w25
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh216:
	adrp	x1, l_.str.37@PAGE
Lloh217:
	add	x1, x1, l_.str.37@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	mov	x0, x21
	bl	_IS_GEN9_LP
	cmp	x0, #0
	csel	w8, w26, w24, eq
	and	w24, w8, #0xff
	mov	x0, x21
	bl	_IS_GEN9_BC
	cbnz	x0, LBB0_31
; %bb.30:
	mov	x0, x21
	bl	_INTEL_GEN
	cmp	w0, #10
	b.lt	LBB0_35
LBB0_31:
	ldr	w8, [x23]
LBB0_32:
	mul	w1, w8, w24
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh218:
	adrp	x1, l_.str.38@PAGE
Lloh219:
	add	x1, x1, l_.str.38@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w1, [x21, #28]
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh220:
	adrp	x1, l_.str.39@PAGE
Lloh221:
	add	x1, x1, l_.str.39@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w1, [x21, #24]
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh222:
	adrp	x1, l_.str.40@PAGE
Lloh223:
	add	x1, x1, l_.str.40@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
Lloh224:
	adrp	x1, l_.str.41@PAGE
Lloh225:
	add	x1, x1, l_.str.41@PAGEOFF
	mov	x0, x19
	mov	x2, x27
	bl	_seq_printf
	ldr	w1, [x21, #36]
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh226:
	adrp	x1, l_.str.42@PAGE
Lloh227:
	add	x1, x1, l_.str.42@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w1, [x21, #32]
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh228:
	adrp	x1, l_.str.43@PAGE
Lloh229:
	add	x1, x1, l_.str.43@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w1, [x21, #48]
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh230:
	adrp	x1, l_.str.44@PAGE
Lloh231:
	add	x1, x1, l_.str.44@PAGEOFF
	mov	x0, x19
	bl	_seq_printf
	ldr	w1, [x21, #28]
	mov	x0, x21
	bl	_intel_gpu_freq
	mov	x2, x0
Lloh232:
	adrp	x1, l_.str.45@PAGE
Lloh233:
	add	x1, x1, l_.str.45@PAGEOFF
	b	LBB0_5
LBB0_33:
	mov	w8, #1
	b	LBB0_26
LBB0_34:
	mov	w8, #1
	b	LBB0_29
LBB0_35:
	mov	w8, #1
	b	LBB0_32
LBB0_36:
	asr	w1, w24, #25
	b	LBB0_15
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpAdd	Lloh60, Lloh61
	.loh AdrpAdd	Lloh58, Lloh59
	.loh AdrpAdd	Lloh56, Lloh57
	.loh AdrpAdd	Lloh54, Lloh55
	.loh AdrpAdd	Lloh52, Lloh53
	.loh AdrpAdd	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpAdd	Lloh64, Lloh65
	.loh AdrpAdd	Lloh70, Lloh71
	.loh AdrpAdd	Lloh68, Lloh69
	.loh AdrpAdd	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGot	Lloh83, Lloh84
	.loh AdrpLdrGot	Lloh81, Lloh82
	.loh AdrpLdrGot	Lloh79, Lloh80
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpLdrGot	Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpAdd	Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh128, Lloh129, Lloh130
	.loh AdrpLdrGotLdr	Lloh125, Lloh126, Lloh127
	.loh AdrpLdrGotLdr	Lloh122, Lloh123, Lloh124
	.loh AdrpLdrGotLdr	Lloh119, Lloh120, Lloh121
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.loh AdrpLdrGot	Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh134, Lloh135, Lloh136
	.loh AdrpLdrGotLdr	Lloh131, Lloh132, Lloh133
	.loh AdrpLdrGotLdr	Lloh146, Lloh147, Lloh148
	.loh AdrpLdrGotLdr	Lloh143, Lloh144, Lloh145
	.loh AdrpLdrGotLdr	Lloh140, Lloh141, Lloh142
	.loh AdrpLdrGotLdr	Lloh137, Lloh138, Lloh139
	.loh AdrpAdd	Lloh170, Lloh171
	.loh AdrpAdd	Lloh168, Lloh169
	.loh AdrpLdrGotLdr	Lloh165, Lloh166, Lloh167
	.loh AdrpLdrGotLdr	Lloh162, Lloh163, Lloh164
	.loh AdrpAdd	Lloh160, Lloh161
	.loh AdrpLdrGotLdr	Lloh157, Lloh158, Lloh159
	.loh AdrpAdd	Lloh155, Lloh156
	.loh AdrpLdrGotLdr	Lloh152, Lloh153, Lloh154
	.loh AdrpLdrGotLdr	Lloh149, Lloh150, Lloh151
	.loh AdrpAdd	Lloh172, Lloh173
	.loh AdrpLdrGot	Lloh212, Lloh213
	.loh AdrpAdd	Lloh210, Lloh211
	.loh AdrpAdd	Lloh208, Lloh209
	.loh AdrpAdd	Lloh206, Lloh207
	.loh AdrpAdd	Lloh204, Lloh205
	.loh AdrpAdd	Lloh202, Lloh203
	.loh AdrpAdd	Lloh200, Lloh201
	.loh AdrpAdd	Lloh198, Lloh199
	.loh AdrpAdd	Lloh196, Lloh197
	.loh AdrpAdd	Lloh194, Lloh195
	.loh AdrpAdd	Lloh192, Lloh193
	.loh AdrpAdd	Lloh190, Lloh191
	.loh AdrpAdd	Lloh188, Lloh189
	.loh AdrpAdd	Lloh186, Lloh187
	.loh AdrpAdd	Lloh184, Lloh185
	.loh AdrpAdd	Lloh182, Lloh183
	.loh AdrpAdd	Lloh180, Lloh181
	.loh AdrpAdd	Lloh178, Lloh179
	.loh AdrpAdd	Lloh176, Lloh177
	.loh AdrpAdd	Lloh174, Lloh175
	.loh AdrpAdd	Lloh214, Lloh215
	.loh AdrpAdd	Lloh216, Lloh217
	.loh AdrpAdd	Lloh232, Lloh233
	.loh AdrpAdd	Lloh230, Lloh231
	.loh AdrpAdd	Lloh228, Lloh229
	.loh AdrpAdd	Lloh226, Lloh227
	.loh AdrpAdd	Lloh224, Lloh225
	.loh AdrpAdd	Lloh222, Lloh223
	.loh AdrpAdd	Lloh220, Lloh221
	.loh AdrpAdd	Lloh218, Lloh219
	.cfi_endproc
                                        ; -- End function
	.comm	_MEMSWCTL,4,2                   ; @MEMSWCTL
	.comm	_MEMSTAT_ILK,4,2                ; @MEMSTAT_ILK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Requested P-state: %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"Requested VID: %d\n"

l_.str.2:                               ; @.str.2
	.asciz	"Current VID: %d\n"

	.comm	_MEMSTAT_VID_MASK,4,2           ; @MEMSTAT_VID_MASK
	.comm	_MEMSTAT_VID_SHIFT,4,2          ; @MEMSTAT_VID_SHIFT
l_.str.3:                               ; @.str.3
	.asciz	"Current P-state: %d\n"

	.comm	_MEMSTAT_PSTATE_MASK,4,2        ; @MEMSTAT_PSTATE_MASK
	.comm	_MEMSTAT_PSTATE_SHIFT,4,2       ; @MEMSTAT_PSTATE_SHIFT
	.comm	_GEN6_RP_CONTROL,4,2            ; @GEN6_RP_CONTROL
l_.str.4:                               ; @.str.4
	.asciz	"Video Turbo Mode: %s\n"

	.comm	_GEN6_RP_MEDIA_TURBO,4,2        ; @GEN6_RP_MEDIA_TURBO
l_.str.5:                               ; @.str.5
	.asciz	"HW control enabled: %s\n"

	.comm	_GEN6_RP_ENABLE,4,2             ; @GEN6_RP_ENABLE
l_.str.6:                               ; @.str.6
	.asciz	"SW control enabled: %s\n"

	.comm	_GEN6_RP_MEDIA_MODE_MASK,4,2    ; @GEN6_RP_MEDIA_MODE_MASK
	.comm	_GEN6_RP_MEDIA_SW_MODE,4,2      ; @GEN6_RP_MEDIA_SW_MODE
	.comm	_PUNIT_REG_GPU_FREQ_STS,4,2     ; @PUNIT_REG_GPU_FREQ_STS
l_.str.7:                               ; @.str.7
	.asciz	"PUNIT_REG_GPU_FREQ_STS: 0x%08x\n"

l_.str.8:                               ; @.str.8
	.asciz	"DDR freq: %d MHz\n"

l_.str.9:                               ; @.str.9
	.asciz	"actual GPU freq: %d MHz\n"

l_.str.10:                              ; @.str.10
	.asciz	"current GPU freq: %d MHz\n"

l_.str.11:                              ; @.str.11
	.asciz	"max GPU freq: %d MHz\n"

l_.str.12:                              ; @.str.12
	.asciz	"min GPU freq: %d MHz\n"

l_.str.13:                              ; @.str.13
	.asciz	"idle GPU freq: %d MHz\n"

l_.str.14:                              ; @.str.14
	.asciz	"efficient (RPe) frequency: %d MHz\n"

	.comm	_GEN6_RP_STATE_LIMITS,4,2       ; @GEN6_RP_STATE_LIMITS
	.comm	_BXT_RP_STATE_CAP,4,2           ; @BXT_RP_STATE_CAP
	.comm	_BXT_GT_PERF_STATUS,4,2         ; @BXT_GT_PERF_STATUS
	.comm	_GEN6_RP_STATE_CAP,4,2          ; @GEN6_RP_STATE_CAP
	.comm	_GEN6_GT_PERF_STATUS,4,2        ; @GEN6_GT_PERF_STATUS
	.comm	_FORCEWAKE_ALL,4,2              ; @FORCEWAKE_ALL
	.comm	_GEN6_RPNSWREQ,4,2              ; @GEN6_RPNSWREQ
	.comm	_GEN6_TURBO_DISABLE,4,2         ; @GEN6_TURBO_DISABLE
	.comm	_GEN6_RP_UP_THRESHOLD,4,2       ; @GEN6_RP_UP_THRESHOLD
	.comm	_GEN6_RP_DOWN_THRESHOLD,4,2     ; @GEN6_RP_DOWN_THRESHOLD
	.comm	_GEN6_RPSTAT1,4,2               ; @GEN6_RPSTAT1
	.comm	_GEN6_RP_CUR_UP_EI,4,2          ; @GEN6_RP_CUR_UP_EI
	.comm	_GEN6_CURICONT_MASK,4,2         ; @GEN6_CURICONT_MASK
	.comm	_GEN6_RP_CUR_UP,4,2             ; @GEN6_RP_CUR_UP
	.comm	_GEN6_CURBSYTAVG_MASK,4,2       ; @GEN6_CURBSYTAVG_MASK
	.comm	_GEN6_RP_PREV_UP,4,2            ; @GEN6_RP_PREV_UP
	.comm	_GEN6_RP_CUR_DOWN_EI,4,2        ; @GEN6_RP_CUR_DOWN_EI
	.comm	_GEN6_CURIAVG_MASK,4,2          ; @GEN6_CURIAVG_MASK
	.comm	_GEN6_RP_CUR_DOWN,4,2           ; @GEN6_RP_CUR_DOWN
	.comm	_GEN6_RP_PREV_DOWN,4,2          ; @GEN6_RP_PREV_DOWN
	.comm	_GEN11_GPM_WGBOXPERF_INTR_ENABLE,4,2 ; @GEN11_GPM_WGBOXPERF_INTR_ENABLE
	.comm	_GEN11_GPM_WGBOXPERF_INTR_MASK,4,2 ; @GEN11_GPM_WGBOXPERF_INTR_MASK
	.comm	_GEN6_PMIER,4,2                 ; @GEN6_PMIER
	.comm	_GEN6_PMIMR,4,2                 ; @GEN6_PMIMR
	.comm	_GEN6_PMISR,4,2                 ; @GEN6_PMISR
	.comm	_GEN6_PMIIR,4,2                 ; @GEN6_PMIIR
	.comm	_GEN6_PMINTRMSK,4,2             ; @GEN6_PMINTRMSK
l_.str.15:                              ; @.str.15
	.asciz	"PM IER=0x%08x IMR=0x%08x, MASK=0x%08x\n"

l_.str.16:                              ; @.str.16
	.asciz	"PM ISR=0x%08x IIR=0x%08x\n"

l_.str.17:                              ; @.str.17
	.asciz	"pm_intrmsk_mbz: 0x%08x\n"

l_.str.18:                              ; @.str.18
	.asciz	"GT_PERF_STATUS: 0x%08x\n"

l_.str.19:                              ; @.str.19
	.asciz	"Render p-state ratio: %d\n"

l_.str.20:                              ; @.str.20
	.asciz	"Render p-state VID: %d\n"

l_.str.21:                              ; @.str.21
	.asciz	"Render p-state limit: %d\n"

l_.str.22:                              ; @.str.22
	.asciz	"RPSTAT1: 0x%08x\n"

l_.str.23:                              ; @.str.23
	.asciz	"RPMODECTL: 0x%08x\n"

l_.str.24:                              ; @.str.24
	.asciz	"RPINCLIMIT: 0x%08x\n"

l_.str.25:                              ; @.str.25
	.asciz	"RPDECLIMIT: 0x%08x\n"

l_.str.26:                              ; @.str.26
	.asciz	"RPNSWREQ: %dMHz\n"

l_.str.27:                              ; @.str.27
	.asciz	"CAGF: %dMHz\n"

l_.str.28:                              ; @.str.28
	.asciz	"RP CUR UP EI: %d (%dus)\n"

l_.str.29:                              ; @.str.29
	.asciz	"RP CUR UP: %d (%dus)\n"

l_.str.30:                              ; @.str.30
	.asciz	"RP PREV UP: %d (%dus)\n"

l_.str.31:                              ; @.str.31
	.asciz	"Up threshold: %d%%\n"

l_.str.32:                              ; @.str.32
	.asciz	"RP CUR DOWN EI: %d (%dus)\n"

l_.str.33:                              ; @.str.33
	.asciz	"RP CUR DOWN: %d (%dus)\n"

l_.str.34:                              ; @.str.34
	.asciz	"RP PREV DOWN: %d (%dus)\n"

l_.str.35:                              ; @.str.35
	.asciz	"Down threshold: %d%%\n"

	.comm	_GEN9_FREQ_SCALER,4,2           ; @GEN9_FREQ_SCALER
l_.str.36:                              ; @.str.36
	.asciz	"Lowest (RPN) frequency: %dMHz\n"

l_.str.37:                              ; @.str.37
	.asciz	"Nominal (RP1) frequency: %dMHz\n"

l_.str.38:                              ; @.str.38
	.asciz	"Max non-overclocked (RP0) frequency: %dMHz\n"

l_.str.39:                              ; @.str.39
	.asciz	"Max overclocked frequency: %dMHz\n"

l_.str.40:                              ; @.str.40
	.asciz	"Current freq: %d MHz\n"

l_.str.41:                              ; @.str.41
	.asciz	"Actual freq: %d MHz\n"

l_.str.42:                              ; @.str.42
	.asciz	"Idle freq: %d MHz\n"

l_.str.43:                              ; @.str.43
	.asciz	"Min freq: %d MHz\n"

l_.str.44:                              ; @.str.44
	.asciz	"Boost freq: %d MHz\n"

l_.str.45:                              ; @.str.45
	.asciz	"Max freq: %d MHz\n"

l_.str.46:                              ; @.str.46
	.asciz	"no P-state info available\n"

l_.str.47:                              ; @.str.47
	.asciz	"Current CD clock frequency: %d kHz\n"

l_.str.48:                              ; @.str.48
	.asciz	"Max CD clock frequency: %d kHz\n"

l_.str.49:                              ; @.str.49
	.asciz	"Max pixel clock frequency: %d kHz\n"

	.no_dead_strip	_i915_frequency_info
.subsections_via_symbols
