	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sumo_gfx_powergating_initialize
_sumo_gfx_powergating_initialize:       ## @sumo_gfx_powergating_initialize
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	callq	_radeon_get_xclk
	movl	%eax, %r14d
	movq	(%r15), %rax
	movq	_CHIP_PALM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movl	$4, %eax
	movl	$16, %r12d
	cmovel	%eax, %r12d
	movl	$247, %ecx
	movl	$113, %edx
	cmovel	%ecx, %edx
	movl	%edx, -52(%rbp)                 ## 4-byte Spill
	movl	$10, %edx
	movl	$50, %ecx
	cmovnel	%ecx, %edx
	movl	%edx, -56(%rbp)                 ## 4-byte Spill
	cmovel	%eax, %ecx
	movl	%ecx, -60(%rbp)                 ## 4-byte Spill
	movq	_CG_SCRATCH2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$28707351, %esi                 ## imm = 0x1B60A17
	callq	_WREG32
	movq	_SUMO_GFXPOWERGATINGT_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-48(%rbp), %rcx
	leaq	-44(%rbp), %r8
	movl	%r14d, %esi
	movl	$16, %edx
	callq	_r600_calculate_u_and_p
	movq	_CG_PWR_GATING_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	-48(%rbp), %edi
	callq	_PGP
	movl	%eax, %r13d
	movl	-44(%rbp), %edi
	callq	_PGU
	orl	%eax, %r13d
	movq	_PGP_MASK@GOTPCREL(%rip), %rax
	movq	_PGU_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	notl	%edx
	movl	%ebx, %edi
	movl	%r13d, %esi
	callq	_WREG32_P
	movq	_SUMO_VOLTAGEDROPT_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	movl	$16, %edx
	leaq	-48(%rbp), %rcx
	leaq	-44(%rbp), %r8
	callq	_r600_calculate_u_and_p
	movq	_CG_CG_VOLTAGE_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	-48(%rbp), %edi
	callq	_PGP
	movl	%eax, %ebx
	movl	-44(%rbp), %edi
	callq	_PGU
	orl	%eax, %ebx
	movq	_PGU_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_PGP_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	notl	%edx
	movl	%r14d, %edi
	movl	%ebx, %esi
	callq	_WREG32_P
	movq	(%r15), %rax
	movq	_CHIP_PALM@GOTPCREL(%rip), %r13
	cmpq	(%r13), %rax
	movq	_RCU_PWR_GATING_SEQ0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$269496848, %eax                ## imm = 0x10103210
	movl	$1985229328, %esi               ## imm = 0x76543210
	cmovel	%eax, %esi
	movl	$269488144, %eax                ## imm = 0x10101010
	movl	$-19088744, %ebx                ## imm = 0xFEDCBA98
	cmovel	%eax, %ebx
	callq	_WREG32_RCU
	movq	_RCU_PWR_GATING_SEQ1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_WREG32_RCU
	movq	_RCU_PWR_GATING_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_RCU
	movq	_RSVD_MASK@GOTPCREL(%rip), %rcx
	movq	_PCV_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	movq	_PGS_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	%r12d, -64(%rbp)                ## 4-byte Spill
	movl	%r12d, %edi
	callq	_PCV
	movl	%eax, %r14d
	movl	$1, %edi
	callq	_PGS
	movl	%eax, %r12d
	orl	%r14d, %r12d
	orl	%ebx, %r12d
	movq	_PWR_GATING_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movq	%r15, -72(%rbp)                 ## 8-byte Spill
	movq	(%r15), %rax
	cmpq	(%r13), %rax
	jne	LBB0_2
## %bb.1:
	movq	_PCP_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r12d
	movl	$119, %edi
	callq	_PCP
	orl	%eax, %r12d
LBB0_2:
	movq	_RCU_PWR_GATING_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r12d, %esi
	callq	_WREG32_RCU
	movq	_RCU_PWR_GATING_CNTL_2@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32_RCU
	movq	_MPPU_MASK@GOTPCREL(%rip), %rcx
	movq	_MPPD_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	-52(%rbp), %edi                 ## 4-byte Reload
	callq	_MPPU
	movl	%eax, %r14d
	movl	$50, %edi
	callq	_MPPD
	orl	%eax, %r14d
	orl	%ebx, %r14d
	movl	(%r15), %edi
	movl	%r14d, %esi
	callq	_WREG32_RCU
	movq	_RCU_PWR_GATING_CNTL_3@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_RREG32_RCU
	movq	_DPPU_MASK@GOTPCREL(%rip), %rcx
	movq	_DPPD_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	-56(%rbp), %r15d                ## 4-byte Reload
	movl	%r15d, %edi
	callq	_DPPU
	movl	%eax, %r14d
	movl	$50, %edi
	callq	_DPPD
	orl	%eax, %r14d
	orl	%ebx, %r14d
	movl	(%r12), %edi
	movl	%r14d, %esi
	callq	_WREG32_RCU
	movq	_RCU_PWR_GATING_CNTL_4@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	callq	_RREG32_RCU
	movq	_RT_MASK@GOTPCREL(%rip), %rcx
	movq	_IT_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r12d
	orl	(%rcx), %r12d
	notl	%r12d
	andl	%eax, %r12d
	movl	%r15d, %edi
	callq	_RT
	movl	%eax, %ebx
	movl	-60(%rbp), %edi                 ## 4-byte Reload
	callq	_IT
	orl	%eax, %ebx
	orl	%r12d, %ebx
	movl	(%r14), %edi
	movl	%ebx, %esi
	callq	_WREG32_RCU
	movq	-72(%rbp), %r15                 ## 8-byte Reload
	movq	(%r15), %rax
	cmpq	(%r13), %rax
	jne	LBB0_4
## %bb.3:
	movq	_RCU_PWR_GATING_CNTL_5@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$2562, %esi                     ## imm = 0xA02
	callq	_WREG32_RCU
LBB0_4:
	movq	%r15, %rdi
	callq	_sumo_smu_pg_init
	movq	_RCU_PWR_GATING_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_RCU
	movq	_PCV_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_RSVD_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_PGS_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	-64(%rbp), %edi                 ## 4-byte Reload
	callq	_PCV
	movl	%eax, %r14d
	movl	$4, %edi
	callq	_PGS
	movl	%eax, %r12d
	orl	%r14d, %r12d
	orl	%ebx, %r12d
	movq	_PWR_GATING_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movq	(%r15), %rax
	cmpq	(%r13), %rax
	jne	LBB0_6
## %bb.5:
	movq	_PCP_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r12d
	movl	$119, %edi
	callq	_PCP
	orl	%eax, %r12d
LBB0_6:
	movq	_RCU_PWR_GATING_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r12d, %esi
	callq	_WREG32_RCU
	movq	-72(%rbp), %r12                 ## 8-byte Reload
	movq	(%r12), %rax
	cmpq	(%r13), %rax
	jne	LBB0_8
## %bb.7:
	movq	_RCU_PWR_GATING_CNTL_2@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32_RCU
	movq	_MPPD_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_MPPU_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	$113, %edi
	callq	_MPPU
	movl	%eax, %r14d
	movl	$50, %edi
	callq	_MPPD
	orl	%eax, %r14d
	orl	%ebx, %r14d
	movl	(%r15), %edi
	movl	%r14d, %esi
	callq	_WREG32_RCU
	movq	_RCU_PWR_GATING_CNTL_3@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32_RCU
	movq	_DPPD_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_DPPU_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	$16, %edi
	callq	_DPPU
	movl	%eax, %r14d
	movl	$50, %edi
	callq	_DPPD
	orl	%eax, %r14d
	orl	%ebx, %r14d
	movl	(%r15), %edi
	movl	%r14d, %esi
	callq	_WREG32_RCU
LBB0_8:
	movq	%r12, %rdi
	callq	_sumo_smu_pg_init
	movq	_RCU_PWR_GATING_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_RCU
	movq	_PCV_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_RSVD_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_PGS_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	$5, %edi
	callq	_PGS
	movl	%eax, %r14d
	movq	_PWR_GATING_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	orl	%ebx, %r14d
	movq	(%r12), %rax
	cmpq	(%r13), %rax
	jne	LBB0_10
## %bb.9:
	movl	$4, %edi
	callq	_PCV
	orl	%r14d, %eax
	movq	_PCP_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	$119, %edi
	callq	_PCP
	orl	%ebx, %eax
	jmp	LBB0_11
LBB0_10:
	movl	$11, %edi
	callq	_PCV
	orl	%r14d, %eax
LBB0_11:
	movq	_RCU_PWR_GATING_CNTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%eax, %esi
	callq	_WREG32_RCU
	movq	(%r12), %rax
	cmpq	(%r13), %rax
	jne	LBB0_13
## %bb.12:
	movq	_RCU_PWR_GATING_CNTL_2@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32_RCU
	movq	_MPPD_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_MPPU_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	$113, %edi
	callq	_MPPU
	movl	%eax, %r14d
	movl	$50, %edi
	callq	_MPPD
	orl	%eax, %r14d
	orl	%ebx, %r14d
	movl	(%r15), %edi
	movl	%r14d, %esi
	callq	_WREG32_RCU
	movq	_RCU_PWR_GATING_CNTL_3@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32_RCU
	movq	_DPPD_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	movq	_DPPU_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	$22, %edi
	callq	_DPPU
	movl	%eax, %r14d
	movl	$50, %edi
	callq	_DPPD
	orl	%eax, %r14d
	orl	%ebx, %r14d
	movl	(%r15), %edi
	movl	%r14d, %esi
	callq	_WREG32_RCU
LBB0_13:
	movq	%r12, %rdi
	callq	_sumo_smu_pg_init
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_PALM,8,3                  ## @CHIP_PALM
	.comm	_CG_SCRATCH2,4,2                ## @CG_SCRATCH2
	.comm	_SUMO_GFXPOWERGATINGT_DFLT,4,2  ## @SUMO_GFXPOWERGATINGT_DFLT
	.comm	_CG_PWR_GATING_CNTL,4,2         ## @CG_PWR_GATING_CNTL
	.comm	_PGP_MASK,4,2                   ## @PGP_MASK
	.comm	_PGU_MASK,4,2                   ## @PGU_MASK
	.comm	_SUMO_VOLTAGEDROPT_DFLT,4,2     ## @SUMO_VOLTAGEDROPT_DFLT
	.comm	_CG_CG_VOLTAGE_CNTL,4,2         ## @CG_CG_VOLTAGE_CNTL
	.comm	_RCU_PWR_GATING_SEQ0,4,2        ## @RCU_PWR_GATING_SEQ0
	.comm	_RCU_PWR_GATING_SEQ1,4,2        ## @RCU_PWR_GATING_SEQ1
	.comm	_RCU_PWR_GATING_CNTL,4,2        ## @RCU_PWR_GATING_CNTL
	.comm	_RSVD_MASK,4,2                  ## @RSVD_MASK
	.comm	_PCV_MASK,4,2                   ## @PCV_MASK
	.comm	_PGS_MASK,4,2                   ## @PGS_MASK
	.comm	_PWR_GATING_EN,4,2              ## @PWR_GATING_EN
	.comm	_PCP_MASK,4,2                   ## @PCP_MASK
	.comm	_RCU_PWR_GATING_CNTL_2,4,2      ## @RCU_PWR_GATING_CNTL_2
	.comm	_MPPU_MASK,4,2                  ## @MPPU_MASK
	.comm	_MPPD_MASK,4,2                  ## @MPPD_MASK
	.comm	_RCU_PWR_GATING_CNTL_3,4,2      ## @RCU_PWR_GATING_CNTL_3
	.comm	_DPPU_MASK,4,2                  ## @DPPU_MASK
	.comm	_DPPD_MASK,4,2                  ## @DPPD_MASK
	.comm	_RCU_PWR_GATING_CNTL_4,4,2      ## @RCU_PWR_GATING_CNTL_4
	.comm	_RT_MASK,4,2                    ## @RT_MASK
	.comm	_IT_MASK,4,2                    ## @IT_MASK
	.comm	_RCU_PWR_GATING_CNTL_5,4,2      ## @RCU_PWR_GATING_CNTL_5
	.no_dead_strip	_sumo_gfx_powergating_initialize
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sumo_gfx_powergating_initialize
_sumo_gfx_powergating_initialize:       ; @sumo_gfx_powergating_initialize
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	bl	_radeon_get_xclk
	mov	x24, x0
	ldr	x8, [x19]
Lloh0:
	adrp	x27, _CHIP_PALM@GOTPAGE
Lloh1:
	ldr	x27, [x27, _CHIP_PALM@GOTPAGEOFF]
	ldr	x9, [x27]
	cmp	x8, x9
	mov	w8, #16
	mov	w9, #4
	csel	w20, w9, w8, eq
	mov	w8, #113
	mov	w10, #247
	csel	w23, w10, w8, eq
	mov	w8, #50
	mov	w10, #10
	csel	w22, w10, w8, eq
	csel	w21, w9, w8, eq
Lloh2:
	adrp	x8, _CG_SCRATCH2@GOTPAGE
Lloh3:
	ldr	x8, [x8, _CG_SCRATCH2@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	mov	w1, #2583
	movk	w1, #438, lsl #16
	bl	_WREG32
Lloh5:
	adrp	x8, _SUMO_GFXPOWERGATINGT_DFLT@GOTPAGE
Lloh6:
	ldr	x8, [x8, _SUMO_GFXPOWERGATINGT_DFLT@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	add	x3, sp, #12
	add	x4, sp, #8
	mov	x1, x24
	mov	w2, #16
	bl	_r600_calculate_u_and_p
Lloh8:
	adrp	x8, _CG_PWR_GATING_CNTL@GOTPAGE
Lloh9:
	ldr	x8, [x8, _CG_PWR_GATING_CNTL@GOTPAGEOFF]
Lloh10:
	ldr	w25, [x8]
	ldr	w0, [sp, #12]
	bl	_PGP
	mov	x26, x0
	ldr	w0, [sp, #8]
	bl	_PGU
	orr	w1, w0, w26
Lloh11:
	adrp	x26, _PGP_MASK@GOTPAGE
Lloh12:
	ldr	x26, [x26, _PGP_MASK@GOTPAGEOFF]
	ldr	w8, [x26]
Lloh13:
	adrp	x28, _PGU_MASK@GOTPAGE
Lloh14:
	ldr	x28, [x28, _PGU_MASK@GOTPAGEOFF]
	ldr	w9, [x28]
	orr	w8, w9, w8
	mvn	w2, w8
	mov	x0, x25
	bl	_WREG32_P
Lloh15:
	adrp	x8, _SUMO_VOLTAGEDROPT_DFLT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _SUMO_VOLTAGEDROPT_DFLT@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	add	x3, sp, #12
	add	x4, sp, #8
	mov	x1, x24
	mov	w2, #16
	bl	_r600_calculate_u_and_p
Lloh18:
	adrp	x8, _CG_CG_VOLTAGE_CNTL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _CG_CG_VOLTAGE_CNTL@GOTPAGEOFF]
Lloh20:
	ldr	w24, [x8]
	ldr	w0, [sp, #12]
	bl	_PGP
	mov	x25, x0
	ldr	w0, [sp, #8]
	bl	_PGU
	orr	w1, w0, w25
	ldr	w8, [x26]
	ldr	w9, [x28]
	orr	w8, w9, w8
	mvn	w2, w8
	mov	x0, x24
	bl	_WREG32_P
	ldr	x8, [x19]
	ldr	x9, [x27]
Lloh21:
	adrp	x10, _RCU_PWR_GATING_SEQ0@GOTPAGE
Lloh22:
	ldr	x10, [x10, _RCU_PWR_GATING_SEQ0@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x10]
	cmp	x8, x9
	mov	w8, #12816
	movk	w8, #30292, lsl #16
	mov	w9, #12816
	movk	w9, #4112, lsl #16
	csel	w1, w9, w8, eq
	mov	w8, #47768
	movk	w8, #65244, lsl #16
	mov	w9, #269488144
	csel	w24, w9, w8, eq
	bl	_WREG32_RCU
Lloh24:
	adrp	x8, _RCU_PWR_GATING_SEQ1@GOTPAGE
Lloh25:
	ldr	x8, [x8, _RCU_PWR_GATING_SEQ1@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	mov	x1, x24
	bl	_WREG32_RCU
Lloh27:
	adrp	x25, _RCU_PWR_GATING_CNTL@GOTPAGE
Lloh28:
	ldr	x25, [x25, _RCU_PWR_GATING_CNTL@GOTPAGEOFF]
	ldr	w0, [x25]
	bl	_RREG32_RCU
Lloh29:
	adrp	x8, _RSVD_MASK@GOTPAGE
Lloh30:
	ldr	x8, [x8, _RSVD_MASK@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
Lloh32:
	adrp	x9, _PCV_MASK@GOTPAGE
Lloh33:
	ldr	x9, [x9, _PCV_MASK@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh35:
	adrp	x9, _PGS_MASK@GOTPAGE
Lloh36:
	ldr	x9, [x9, _PGS_MASK@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
	orr	w8, w8, w9
	bic	w26, w0, w8
	mov	x0, x20
	bl	_PCV
	mov	x24, x0
	mov	w0, #1
	bl	_PGS
	orr	w8, w0, w24
Lloh38:
	adrp	x9, _PWR_GATING_EN@GOTPAGE
Lloh39:
	ldr	x9, [x9, _PWR_GATING_EN@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	orr	w8, w8, w26
	orr	w1, w8, w9
	ldr	x8, [x19]
	ldr	x9, [x27]
Lloh41:
	adrp	x10, _PCP_MASK@GOTPAGE
Lloh42:
	ldr	x10, [x10, _PCP_MASK@GOTPAGEOFF]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	ldr	w8, [x10]
	bic	w24, w1, w8
	mov	w0, #119
	bl	_PCP
	orr	w1, w24, w0
LBB0_2:
	ldr	w0, [x25]
	bl	_WREG32_RCU
Lloh43:
	adrp	x24, _RCU_PWR_GATING_CNTL_2@GOTPAGE
Lloh44:
	ldr	x24, [x24, _RCU_PWR_GATING_CNTL_2@GOTPAGEOFF]
	ldr	w0, [x24]
	bl	_RREG32_RCU
Lloh45:
	adrp	x8, _MPPU_MASK@GOTPAGE
Lloh46:
	ldr	x8, [x8, _MPPU_MASK@GOTPAGEOFF]
Lloh47:
	ldr	w8, [x8]
Lloh48:
	adrp	x9, _MPPD_MASK@GOTPAGE
Lloh49:
	ldr	x9, [x9, _MPPD_MASK@GOTPAGEOFF]
Lloh50:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w26, w0, w8
	mov	x0, x23
	bl	_MPPU
	mov	x23, x0
	mov	w0, #50
	bl	_MPPD
	orr	w8, w0, w23
	orr	w1, w8, w26
	ldr	w0, [x24]
	bl	_WREG32_RCU
Lloh51:
	adrp	x26, _RCU_PWR_GATING_CNTL_3@GOTPAGE
Lloh52:
	ldr	x26, [x26, _RCU_PWR_GATING_CNTL_3@GOTPAGEOFF]
	ldr	w0, [x26]
	bl	_RREG32_RCU
Lloh53:
	adrp	x8, _DPPU_MASK@GOTPAGE
Lloh54:
	ldr	x8, [x8, _DPPU_MASK@GOTPAGEOFF]
Lloh55:
	ldr	w8, [x8]
Lloh56:
	adrp	x9, _DPPD_MASK@GOTPAGE
Lloh57:
	ldr	x9, [x9, _DPPD_MASK@GOTPAGEOFF]
Lloh58:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w28, w0, w8
	mov	x0, x22
	bl	_DPPU
	mov	x23, x0
	mov	w0, #50
	bl	_DPPD
	orr	w8, w0, w23
	orr	w1, w8, w28
	ldr	w0, [x26]
	bl	_WREG32_RCU
Lloh59:
	adrp	x23, _RCU_PWR_GATING_CNTL_4@GOTPAGE
Lloh60:
	ldr	x23, [x23, _RCU_PWR_GATING_CNTL_4@GOTPAGEOFF]
	ldr	w0, [x23]
	bl	_RREG32_RCU
Lloh61:
	adrp	x8, _RT_MASK@GOTPAGE
Lloh62:
	ldr	x8, [x8, _RT_MASK@GOTPAGEOFF]
Lloh63:
	ldr	w8, [x8]
Lloh64:
	adrp	x9, _IT_MASK@GOTPAGE
Lloh65:
	ldr	x9, [x9, _IT_MASK@GOTPAGEOFF]
Lloh66:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w28, w0, w8
	mov	x0, x22
	bl	_RT
	mov	x22, x0
	mov	x0, x21
	bl	_IT
	orr	w8, w0, w22
	orr	w1, w8, w28
	ldr	w0, [x23]
	bl	_WREG32_RCU
	ldr	x8, [x19]
	ldr	x9, [x27]
	cmp	x8, x9
	b.ne	LBB0_4
; %bb.3:
Lloh67:
	adrp	x8, _RCU_PWR_GATING_CNTL_5@GOTPAGE
Lloh68:
	ldr	x8, [x8, _RCU_PWR_GATING_CNTL_5@GOTPAGEOFF]
Lloh69:
	ldr	w0, [x8]
	mov	w1, #2562
	bl	_WREG32_RCU
LBB0_4:
	mov	x0, x19
	bl	_sumo_smu_pg_init
	ldr	w0, [x25]
	bl	_RREG32_RCU
Lloh70:
	adrp	x22, _RSVD_MASK@GOTPAGE
Lloh71:
	ldr	x22, [x22, _RSVD_MASK@GOTPAGEOFF]
	ldr	w8, [x22]
Lloh72:
	adrp	x23, _PCV_MASK@GOTPAGE
Lloh73:
	ldr	x23, [x23, _PCV_MASK@GOTPAGEOFF]
	ldr	w9, [x23]
	orr	w8, w9, w8
Lloh74:
	adrp	x9, _PGS_MASK@GOTPAGE
Lloh75:
	ldr	x9, [x9, _PGS_MASK@GOTPAGEOFF]
Lloh76:
	ldr	w9, [x9]
	orr	w8, w8, w9
	bic	w21, w0, w8
	mov	x0, x20
	bl	_PCV
	mov	x20, x0
	mov	w0, #4
	bl	_PGS
	orr	w8, w0, w20
Lloh77:
	adrp	x9, _PWR_GATING_EN@GOTPAGE
Lloh78:
	ldr	x9, [x9, _PWR_GATING_EN@GOTPAGEOFF]
Lloh79:
	ldr	w9, [x9]
	orr	w8, w8, w21
	orr	w1, w8, w9
	ldr	x8, [x19]
	ldr	x9, [x27]
	cmp	x8, x9
Lloh80:
	adrp	x28, _PCP_MASK@GOTPAGE
Lloh81:
	ldr	x28, [x28, _PCP_MASK@GOTPAGEOFF]
	b.ne	LBB0_6
; %bb.5:
	ldr	w8, [x28]
	bic	w20, w1, w8
	mov	w0, #119
	bl	_PCP
	orr	w1, w20, w0
LBB0_6:
	ldr	w0, [x25]
	bl	_WREG32_RCU
	ldr	x8, [x19]
	ldr	x9, [x27]
	cmp	x8, x9
	b.ne	LBB0_8
; %bb.7:
	ldr	w0, [x24]
	bl	_RREG32_RCU
Lloh82:
	adrp	x8, _MPPU_MASK@GOTPAGE
Lloh83:
	ldr	x8, [x8, _MPPU_MASK@GOTPAGEOFF]
Lloh84:
	ldr	w8, [x8]
Lloh85:
	adrp	x9, _MPPD_MASK@GOTPAGE
Lloh86:
	ldr	x9, [x9, _MPPD_MASK@GOTPAGEOFF]
Lloh87:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w21, w0, w8
	mov	w0, #113
	bl	_MPPU
	mov	x20, x0
	mov	w0, #50
	bl	_MPPD
	orr	w8, w0, w20
	orr	w1, w8, w21
	ldr	w0, [x24]
	bl	_WREG32_RCU
	ldr	w0, [x26]
	bl	_RREG32_RCU
Lloh88:
	adrp	x8, _DPPU_MASK@GOTPAGE
Lloh89:
	ldr	x8, [x8, _DPPU_MASK@GOTPAGEOFF]
Lloh90:
	ldr	w8, [x8]
Lloh91:
	adrp	x9, _DPPD_MASK@GOTPAGE
Lloh92:
	ldr	x9, [x9, _DPPD_MASK@GOTPAGEOFF]
Lloh93:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w21, w0, w8
	mov	w0, #16
	bl	_DPPU
	mov	x20, x0
	mov	w0, #50
	bl	_DPPD
	orr	w8, w0, w20
	orr	w1, w8, w21
	ldr	w0, [x26]
	bl	_WREG32_RCU
LBB0_8:
	mov	x0, x19
	bl	_sumo_smu_pg_init
	ldr	w0, [x25]
	bl	_RREG32_RCU
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
Lloh94:
	adrp	x9, _PGS_MASK@GOTPAGE
Lloh95:
	ldr	x9, [x9, _PGS_MASK@GOTPAGEOFF]
Lloh96:
	ldr	w9, [x9]
	orr	w8, w8, w9
	bic	w20, w0, w8
	mov	w0, #5
	bl	_PGS
Lloh97:
	adrp	x8, _PWR_GATING_EN@GOTPAGE
Lloh98:
	ldr	x8, [x8, _PWR_GATING_EN@GOTPAGEOFF]
Lloh99:
	ldr	w8, [x8]
	orr	w8, w8, w0
	orr	w20, w8, w20
	ldr	x8, [x19]
	ldr	x9, [x27]
	cmp	x8, x9
	b.ne	LBB0_10
; %bb.9:
	mov	w0, #4
	bl	_PCV
	orr	w8, w0, w20
	ldr	w9, [x28]
	bic	w20, w8, w9
	mov	w0, #119
	bl	_PCP
	orr	w1, w20, w0
	b	LBB0_11
LBB0_10:
	mov	w0, #11
	bl	_PCV
	orr	w1, w0, w20
LBB0_11:
	ldr	w0, [x25]
	bl	_WREG32_RCU
	ldr	x8, [x19]
	ldr	x9, [x27]
	cmp	x8, x9
	b.ne	LBB0_13
; %bb.12:
	ldr	w0, [x24]
	bl	_RREG32_RCU
Lloh100:
	adrp	x8, _MPPU_MASK@GOTPAGE
Lloh101:
	ldr	x8, [x8, _MPPU_MASK@GOTPAGEOFF]
Lloh102:
	ldr	w8, [x8]
Lloh103:
	adrp	x9, _MPPD_MASK@GOTPAGE
Lloh104:
	ldr	x9, [x9, _MPPD_MASK@GOTPAGEOFF]
Lloh105:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w21, w0, w8
	mov	w0, #113
	bl	_MPPU
	mov	x20, x0
	mov	w0, #50
	bl	_MPPD
	orr	w8, w0, w20
	orr	w1, w8, w21
	ldr	w0, [x24]
	bl	_WREG32_RCU
	ldr	w0, [x26]
	bl	_RREG32_RCU
Lloh106:
	adrp	x8, _DPPU_MASK@GOTPAGE
Lloh107:
	ldr	x8, [x8, _DPPU_MASK@GOTPAGEOFF]
Lloh108:
	ldr	w8, [x8]
Lloh109:
	adrp	x9, _DPPD_MASK@GOTPAGE
Lloh110:
	ldr	x9, [x9, _DPPD_MASK@GOTPAGEOFF]
Lloh111:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w21, w0, w8
	mov	w0, #22
	bl	_DPPU
	mov	x20, x0
	mov	w0, #50
	bl	_DPPD
	orr	w8, w0, w20
	orr	w1, w8, w21
	ldr	w0, [x26]
	bl	_WREG32_RCU
LBB0_13:
	mov	x0, x19
	bl	_sumo_smu_pg_init
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGot	Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh109, Lloh110, Lloh111
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_PALM,8,3                  ; @CHIP_PALM
	.comm	_CG_SCRATCH2,4,2                ; @CG_SCRATCH2
	.comm	_SUMO_GFXPOWERGATINGT_DFLT,4,2  ; @SUMO_GFXPOWERGATINGT_DFLT
	.comm	_CG_PWR_GATING_CNTL,4,2         ; @CG_PWR_GATING_CNTL
	.comm	_PGP_MASK,4,2                   ; @PGP_MASK
	.comm	_PGU_MASK,4,2                   ; @PGU_MASK
	.comm	_SUMO_VOLTAGEDROPT_DFLT,4,2     ; @SUMO_VOLTAGEDROPT_DFLT
	.comm	_CG_CG_VOLTAGE_CNTL,4,2         ; @CG_CG_VOLTAGE_CNTL
	.comm	_RCU_PWR_GATING_SEQ0,4,2        ; @RCU_PWR_GATING_SEQ0
	.comm	_RCU_PWR_GATING_SEQ1,4,2        ; @RCU_PWR_GATING_SEQ1
	.comm	_RCU_PWR_GATING_CNTL,4,2        ; @RCU_PWR_GATING_CNTL
	.comm	_RSVD_MASK,4,2                  ; @RSVD_MASK
	.comm	_PCV_MASK,4,2                   ; @PCV_MASK
	.comm	_PGS_MASK,4,2                   ; @PGS_MASK
	.comm	_PWR_GATING_EN,4,2              ; @PWR_GATING_EN
	.comm	_PCP_MASK,4,2                   ; @PCP_MASK
	.comm	_RCU_PWR_GATING_CNTL_2,4,2      ; @RCU_PWR_GATING_CNTL_2
	.comm	_MPPU_MASK,4,2                  ; @MPPU_MASK
	.comm	_MPPD_MASK,4,2                  ; @MPPD_MASK
	.comm	_RCU_PWR_GATING_CNTL_3,4,2      ; @RCU_PWR_GATING_CNTL_3
	.comm	_DPPU_MASK,4,2                  ; @DPPU_MASK
	.comm	_DPPD_MASK,4,2                  ; @DPPD_MASK
	.comm	_RCU_PWR_GATING_CNTL_4,4,2      ; @RCU_PWR_GATING_CNTL_4
	.comm	_RT_MASK,4,2                    ; @RT_MASK
	.comm	_IT_MASK,4,2                    ; @IT_MASK
	.comm	_RCU_PWR_GATING_CNTL_5,4,2      ; @RCU_PWR_GATING_CNTL_5
	.no_dead_strip	_sumo_gfx_powergating_initialize
.subsections_via_symbols
