	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_uvd_sw_fini             ## -- Begin function amdgpu_uvd_sw_fini
	.p2align	4, 0x90
_amdgpu_uvd_sw_fini:                    ## @amdgpu_uvd_sw_fini
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	addq	$24, %rdi
	callq	_drm_sched_entity_destroy
	cmpl	$0, (%r12)
	jle	LBB0_7
## %bb.1:
	xorl	%edx, %edx
	movq	_AMDGPU_MAX_UVD_ENC_RINGS@GOTPCREL(%rip), %rcx
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	-48(%rbp), %rdx                 ## 8-byte Reload
	incq	%rdx
	movslq	(%r12), %rax
	cmpq	%rax, %rdx
	jge	LBB0_7
LBB0_2:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_5 Depth 2
	movl	4(%r12), %eax
	movq	%rdx, -48(%rbp)                 ## 8-byte Spill
	btl	%edx, %eax
	jb	LBB0_6
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	16(%r12), %rax
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	shlq	$5, %r13
	movl	24(%rax,%r13), %edi
	movq	%rcx, %r14
	callq	_kvfree
	movq	16(%r12), %rax
	leaq	(%rax,%r13), %rdi
	addq	$20, %rdi
	leaq	(%rax,%r13), %rsi
	addq	$16, %rsi
	leaq	(%rax,%r13), %rdx
	addq	$12, %rdx
	callq	_amdgpu_bo_free_kernel
	movq	16(%r12), %rax
	leaq	(%rax,%r13), %rdi
	addq	$8, %rdi
	callq	_amdgpu_ring_fini
	movq	%r14, %rcx
	cmpl	$0, (%r14)
	jle	LBB0_6
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	xorl	%ebx, %ebx
	xorl	%r15d, %r15d
	.p2align	4, 0x90
LBB0_5:                                 ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	16(%r12), %rax
	movq	(%rax,%r13), %rdi
	addq	%rbx, %rdi
	callq	_amdgpu_ring_fini
	movq	%r14, %rcx
	incq	%r15
	movslq	(%r14), %rax
	addq	$4, %rbx
	cmpq	%rax, %r15
	jl	LBB0_5
	jmp	LBB0_6
LBB0_7:
	movl	8(%r12), %edi
	callq	_release_firmware
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_MAX_UVD_ENC_RINGS,4,2   ## @AMDGPU_MAX_UVD_ENC_RINGS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_uvd_sw_fini             ; -- Begin function amdgpu_uvd_sw_fini
	.p2align	2
_amdgpu_uvd_sw_fini:                    ; @amdgpu_uvd_sw_fini
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	add	x0, x0, #24
	bl	_drm_sched_entity_destroy
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.1:
	mov	x20, #0
Lloh0:
	adrp	x21, _AMDGPU_MAX_UVD_ENC_RINGS@GOTPAGE
Lloh1:
	ldr	x21, [x21, _AMDGPU_MAX_UVD_ENC_RINGS@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x20, x20, #1
	ldrsw	x8, [x19]
	cmp	x20, x8
	b.ge	LBB0_7
LBB0_3:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	ldr	w8, [x19, #4]
	lsr	w8, w8, w20
	tbnz	w8, #0, LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	x8, [x19, #16]
	lsl	x22, x20, #5
	add	x8, x8, x22
	ldr	w0, [x8, #24]
	bl	_kvfree
	ldr	x8, [x19, #16]
	add	x8, x8, x22
	add	x0, x8, #20
	add	x1, x8, #16
	add	x2, x8, #12
	bl	_amdgpu_bo_free_kernel
	ldr	x8, [x19, #16]
	add	x8, x8, x22
	add	x0, x8, #8
	bl	_amdgpu_ring_fini
	ldr	w8, [x21]
	cmp	w8, #1
	b.lt	LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	mov	x23, #0
	mov	x24, #0
LBB0_6:                                 ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	x8, [x19, #16]
	ldr	x8, [x8, x22]
	add	x0, x8, x23
	bl	_amdgpu_ring_fini
	add	x24, x24, #1
	ldrsw	x8, [x21]
	add	x23, x23, #4
	cmp	x24, x8
	b.lt	LBB0_6
	b	LBB0_2
LBB0_7:
	ldr	w0, [x19, #8]
	bl	_release_firmware
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_MAX_UVD_ENC_RINGS,4,2   ; @AMDGPU_MAX_UVD_ENC_RINGS
.subsections_via_symbols
