	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function fsl_ddr_init_csrows
_fsl_ddr_init_csrows:                   ## @fsl_ddr_init_csrows
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movq	16(%rdi), %r15
	movq	_FSL_MC_DDR_SDRAM_CFG@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%r15), %rdi
	callq	_ddr_in32
	movq	_DSC_SDTYPE_MASK@GOTPCREL(%rip), %rcx
	movl	%eax, %esi
	andl	(%rcx), %esi
	addl	$-33554432, %esi                ## imm = 0xFE000000
	roll	$8, %esi
	cmpl	$5, %esi
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	ja	LBB0_1
## %bb.2:
	movq	_DSC_RD_EN@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	leaq	l_switch.table.fsl_ddr_init_csrows.1(%rip), %rcx
	leaq	l_switch.table.fsl_ddr_init_csrows(%rip), %rdx
	cmoveq	%rcx, %rdx
	movslq	%esi, %rax
	movq	(%rdx,%rax,8), %rax
	cmpl	$0, (%r13)
	jg	LBB0_4
	jmp	LBB0_10
LBB0_1:
	movq	_MEM_UNKNOWN@GOTPCREL(%rip), %rax
	cmpl	$0, (%r13)
	jle	LBB0_10
LBB0_4:
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	xorl	%ebx, %ebx
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_8:                                 ##   in Loop: Header=BB0_5 Depth=1
	movq	_EDAC_SECDED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%r14)
LBB0_9:                                 ##   in Loop: Header=BB0_5 Depth=1
	incq	%rbx
	movslq	(%r13), %rax
	cmpq	%rax, %rbx
	jge	LBB0_10
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r13), %rax
	movq	(%rax,%rbx,8), %r12
	movq	8(%r12), %rax
	movq	(%rax), %rax
	movq	(%rax), %r14
	movq	_FSL_MC_CS_BNDS_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	addq	(%r15), %rax
	movq	_FSL_MC_CS_BNDS_OFS@GOTPCREL(%rip), %rcx
	movslq	(%rcx), %rcx
	movslq	%ebx, %rdi
	imulq	%rcx, %rdi
	addq	%rax, %rdi
	callq	_ddr_in32
	movzwl	%ax, %edx
	shrl	$16, %eax
	cmpl	%edx, %eax
	je	LBB0_9
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movb	$24, %cl
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rsi
	subb	(%rsi), %cl
	shll	%cl, %eax
	shll	%cl, %edx
	movl	$-1, %esi
	shll	%cl, %esi
	notl	%esi
	orl	%edx, %esi
	movl	%eax, (%r12)
	movl	%esi, 4(%r12)
	subl	%eax, %esi
	incl	%esi
	movl	%esi, (%r14)
	movl	$8, 4(%r14)
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, 8(%r14)
	movq	_DEV_UNKNOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%r14)
	movl	-48(%rbp), %eax                 ## 4-byte Reload
	movq	_DSC_X32_EN@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_8
## %bb.7:                               ##   in Loop: Header=BB0_5 Depth=1
	movq	_DEV_X32@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%r14)
	jmp	LBB0_8
LBB0_10:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_FSL_MC_DDR_SDRAM_CFG,8,3       ## @FSL_MC_DDR_SDRAM_CFG
	.comm	_DSC_SDTYPE_MASK,4,2            ## @DSC_SDTYPE_MASK
	.comm	_DSC_RD_EN,4,2                  ## @DSC_RD_EN
	.comm	_MEM_RDDR,4,2                   ## @MEM_RDDR
	.comm	_MEM_RDDR2,4,2                  ## @MEM_RDDR2
	.comm	_MEM_RDDR3,4,2                  ## @MEM_RDDR3
	.comm	_MEM_RDDR4,4,2                  ## @MEM_RDDR4
	.comm	_MEM_UNKNOWN,4,2                ## @MEM_UNKNOWN
	.comm	_MEM_DDR,4,2                    ## @MEM_DDR
	.comm	_MEM_DDR2,4,2                   ## @MEM_DDR2
	.comm	_MEM_DDR3,4,2                   ## @MEM_DDR3
	.comm	_MEM_DDR4,4,2                   ## @MEM_DDR4
	.comm	_FSL_MC_CS_BNDS_0,8,3           ## @FSL_MC_CS_BNDS_0
	.comm	_FSL_MC_CS_BNDS_OFS,4,2         ## @FSL_MC_CS_BNDS_OFS
	.comm	_PAGE_SHIFT,4,2                 ## @PAGE_SHIFT
	.comm	_DEV_UNKNOWN,4,2                ## @DEV_UNKNOWN
	.comm	_DSC_X32_EN,4,2                 ## @DSC_X32_EN
	.comm	_DEV_X32,4,2                    ## @DEV_X32
	.comm	_EDAC_SECDED,4,2                ## @EDAC_SECDED
	.no_dead_strip	_fsl_ddr_init_csrows
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.fsl_ddr_init_csrows
l_switch.table.fsl_ddr_init_csrows:
	.quad	_MEM_RDDR
	.quad	_MEM_RDDR2
	.quad	_MEM_UNKNOWN
	.quad	_MEM_RDDR4
	.quad	_MEM_UNKNOWN
	.quad	_MEM_RDDR3

	.p2align	3                               ## @switch.table.fsl_ddr_init_csrows.1
l_switch.table.fsl_ddr_init_csrows.1:
	.quad	_MEM_DDR
	.quad	_MEM_DDR2
	.quad	_MEM_UNKNOWN
	.quad	_MEM_DDR4
	.quad	_MEM_UNKNOWN
	.quad	_MEM_DDR3

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function fsl_ddr_init_csrows
_fsl_ddr_init_csrows:                   ; @fsl_ddr_init_csrows
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	x21, [x0, #16]
	ldr	x8, [x21]
Lloh0:
	adrp	x9, _FSL_MC_DDR_SDRAM_CFG@GOTPAGE
Lloh1:
	ldr	x9, [x9, _FSL_MC_DDR_SDRAM_CFG@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x0, x9, x8
	bl	_ddr_in32
	mov	x20, x0
Lloh3:
	adrp	x8, _DSC_SDTYPE_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DSC_SDTYPE_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	and	w8, w8, w0
	mov	w9, #-33554432
	add	w8, w8, w9
	ror	w8, w8, #24
	cmp	w8, #5
	b.hi	LBB0_2
; %bb.1:
Lloh6:
	adrp	x9, _DSC_RD_EN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DSC_RD_EN@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
Lloh9:
	adrp	x10, l_switch.table.fsl_ddr_init_csrows@PAGE
Lloh10:
	add	x10, x10, l_switch.table.fsl_ddr_init_csrows@PAGEOFF
Lloh11:
	adrp	x11, l_switch.table.fsl_ddr_init_csrows.1@PAGE
Lloh12:
	add	x11, x11, l_switch.table.fsl_ddr_init_csrows.1@PAGEOFF
	tst	w9, w20
	csel	x9, x11, x10, eq
	ldr	x8, [x9, w8, sxtw #3]
	b	LBB0_3
LBB0_2:
Lloh13:
	adrp	x8, _MEM_UNKNOWN@GOTPAGE
Lloh14:
	ldr	x8, [x8, _MEM_UNKNOWN@GOTPAGEOFF]
LBB0_3:
	ldr	w9, [x19]
	cmp	w9, #1
	b.lt	LBB0_10
; %bb.4:
	mov	x22, #0
Lloh15:
	adrp	x23, _FSL_MC_CS_BNDS_0@GOTPAGE
Lloh16:
	ldr	x23, [x23, _FSL_MC_CS_BNDS_0@GOTPAGEOFF]
Lloh17:
	adrp	x24, _FSL_MC_CS_BNDS_OFS@GOTPAGE
Lloh18:
	ldr	x24, [x24, _FSL_MC_CS_BNDS_OFS@GOTPAGEOFF]
	ldr	w26, [x8]
Lloh19:
	adrp	x25, _EDAC_SECDED@GOTPAGE
Lloh20:
	ldr	x25, [x25, _EDAC_SECDED@GOTPAGEOFF]
	b	LBB0_7
LBB0_5:                                 ;   in Loop: Header=BB0_7 Depth=1
	ldr	w8, [x25]
	str	w8, [x27, #12]
LBB0_6:                                 ;   in Loop: Header=BB0_7 Depth=1
	add	x22, x22, #1
	ldrsw	x8, [x19]
	cmp	x22, x8
	b.ge	LBB0_10
LBB0_7:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #8]
	ldr	x28, [x8, x22, lsl #3]
	ldr	x8, [x28, #8]
	ldr	x8, [x8]
	ldr	x27, [x8]
	ldr	x8, [x21]
	ldr	x9, [x23]
	add	x8, x9, x8
	ldrsw	x9, [x24]
	sxtw	x10, w22
	madd	x0, x9, x10, x8
	bl	_ddr_in32
	lsr	w8, w0, #16
	and	w9, w0, #0xffff
	cmp	w8, w9
	b.eq	LBB0_6
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
Lloh21:
	adrp	x10, _PAGE_SHIFT@GOTPAGE
Lloh22:
	ldr	x10, [x10, _PAGE_SHIFT@GOTPAGEOFF]
Lloh23:
	ldr	w10, [x10]
	mov	w11, #24
	sub	w10, w11, w10
	lsl	w8, w8, w10
	lsl	w9, w9, w10
	mov	w11, #-1
	lsl	w10, w11, w10
	orn	w9, w9, w10
	stp	w8, w9, [x28]
	sub	w8, w9, w8
	add	w9, w8, #1
	mov	w8, #8
	stp	w9, w8, [x27]
	str	w26, [x27, #8]
Lloh24:
	adrp	x8, _DEV_UNKNOWN@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DEV_UNKNOWN@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	str	w8, [x27, #16]
Lloh27:
	adrp	x8, _DSC_X32_EN@GOTPAGE
Lloh28:
	ldr	x8, [x8, _DSC_X32_EN@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_5
; %bb.9:                                ;   in Loop: Header=BB0_7 Depth=1
Lloh30:
	adrp	x8, _DEV_X32@GOTPAGE
Lloh31:
	ldr	x8, [x8, _DEV_X32@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	str	w8, [x27, #16]
	b	LBB0_5
LBB0_10:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.cfi_endproc
                                        ; -- End function
	.comm	_FSL_MC_DDR_SDRAM_CFG,8,3       ; @FSL_MC_DDR_SDRAM_CFG
	.comm	_DSC_SDTYPE_MASK,4,2            ; @DSC_SDTYPE_MASK
	.comm	_DSC_RD_EN,4,2                  ; @DSC_RD_EN
	.comm	_MEM_RDDR,4,2                   ; @MEM_RDDR
	.comm	_MEM_RDDR2,4,2                  ; @MEM_RDDR2
	.comm	_MEM_RDDR3,4,2                  ; @MEM_RDDR3
	.comm	_MEM_RDDR4,4,2                  ; @MEM_RDDR4
	.comm	_MEM_UNKNOWN,4,2                ; @MEM_UNKNOWN
	.comm	_MEM_DDR,4,2                    ; @MEM_DDR
	.comm	_MEM_DDR2,4,2                   ; @MEM_DDR2
	.comm	_MEM_DDR3,4,2                   ; @MEM_DDR3
	.comm	_MEM_DDR4,4,2                   ; @MEM_DDR4
	.comm	_FSL_MC_CS_BNDS_0,8,3           ; @FSL_MC_CS_BNDS_0
	.comm	_FSL_MC_CS_BNDS_OFS,4,2         ; @FSL_MC_CS_BNDS_OFS
	.comm	_PAGE_SHIFT,4,2                 ; @PAGE_SHIFT
	.comm	_DEV_UNKNOWN,4,2                ; @DEV_UNKNOWN
	.comm	_DSC_X32_EN,4,2                 ; @DSC_X32_EN
	.comm	_DEV_X32,4,2                    ; @DEV_X32
	.comm	_EDAC_SECDED,4,2                ; @EDAC_SECDED
	.no_dead_strip	_fsl_ddr_init_csrows
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.fsl_ddr_init_csrows
l_switch.table.fsl_ddr_init_csrows:
	.quad	_MEM_RDDR
	.quad	_MEM_RDDR2
	.quad	_MEM_UNKNOWN
	.quad	_MEM_RDDR4
	.quad	_MEM_UNKNOWN
	.quad	_MEM_RDDR3

	.p2align	3                               ; @switch.table.fsl_ddr_init_csrows.1
l_switch.table.fsl_ddr_init_csrows.1:
	.quad	_MEM_DDR
	.quad	_MEM_DDR2
	.quad	_MEM_UNKNOWN
	.quad	_MEM_DDR4
	.quad	_MEM_UNKNOWN
	.quad	_MEM_DDR3

.subsections_via_symbols
