	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function i830_overlay_clock_gating
_i830_overlay_clock_gating:             ## @i830_overlay_clock_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	(%rdi), %r15
	xorl	%esi, %esi
	movq	_DSPCLK_GATE_D@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	testl	%r14d, %r14d
	jne	LBB0_2
## %bb.1:
	movq	_OVRUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_2:
	callq	_I915_WRITE
	movl	(%r15), %ebx
	xorl	%edi, %edi
	xorl	%esi, %esi
	callq	_PCI_DEVFN
	movq	_I830_CLOCK_GATE@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	leaq	-36(%rbp), %rcx
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_pci_bus_read_config_byte
	movq	_I830_L2_CACHE_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%r14d, %r14d
	je	LBB0_4
## %bb.3:
	notl	%eax
	andl	-36(%rbp), %eax
	jmp	LBB0_5
LBB0_4:
	orl	-36(%rbp), %eax
LBB0_5:
	movl	%eax, -36(%rbp)
	movl	(%r15), %ebx
	xorl	%edi, %edi
	xorl	%esi, %esi
	callq	_PCI_DEVFN
	movl	(%r12), %edx
	movl	-36(%rbp), %ecx
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_pci_bus_write_config_byte
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DSPCLK_GATE_D,4,2              ## @DSPCLK_GATE_D
	.comm	_OVRUNIT_CLOCK_GATE_DISABLE,4,2 ## @OVRUNIT_CLOCK_GATE_DISABLE
	.comm	_I830_CLOCK_GATE,4,2            ## @I830_CLOCK_GATE
	.comm	_I830_L2_CACHE_CLOCK_GATE_DISABLE,4,2 ## @I830_L2_CACHE_CLOCK_GATE_DISABLE
	.no_dead_strip	_i830_overlay_clock_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function i830_overlay_clock_gating
_i830_overlay_clock_gating:             ; @i830_overlay_clock_gating
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	ldr	x21, [x0]
Lloh0:
	adrp	x8, _DSPCLK_GATE_D@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DSPCLK_GATE_D@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _OVRUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _OVRUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w1, #0
	csel	w1, w8, wzr, eq
	bl	_I915_WRITE
	ldr	w20, [x21]
	mov	w0, #0
	mov	w1, #0
	bl	_PCI_DEVFN
	mov	x1, x0
Lloh6:
	adrp	x22, _I830_CLOCK_GATE@GOTPAGE
Lloh7:
	ldr	x22, [x22, _I830_CLOCK_GATE@GOTPAGEOFF]
	ldr	w2, [x22]
	add	x3, sp, #12
	mov	x0, x20
	bl	_pci_bus_read_config_byte
Lloh8:
	adrp	x8, _I830_L2_CACHE_CLOCK_GATE_DISABLE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _I830_L2_CACHE_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	cbz	w19, LBB0_2
; %bb.1:
	ldr	w9, [sp, #12]
	bic	w8, w9, w8
	b	LBB0_3
LBB0_2:
	ldr	w9, [sp, #12]
	orr	w8, w9, w8
LBB0_3:
	str	w8, [sp, #12]
	ldr	w19, [x21]
	mov	w0, #0
	mov	w1, #0
	bl	_PCI_DEVFN
	mov	x1, x0
	ldr	w2, [x22]
	ldr	w3, [sp, #12]
	mov	x0, x19
	bl	_pci_bus_write_config_byte
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_DSPCLK_GATE_D,4,2              ; @DSPCLK_GATE_D
	.comm	_OVRUNIT_CLOCK_GATE_DISABLE,4,2 ; @OVRUNIT_CLOCK_GATE_DISABLE
	.comm	_I830_CLOCK_GATE,4,2            ; @I830_CLOCK_GATE
	.comm	_I830_L2_CACHE_CLOCK_GATE_DISABLE,4,2 ; @I830_L2_CACHE_CLOCK_GATE_DISABLE
	.no_dead_strip	_i830_overlay_clock_gating
.subsections_via_symbols
