	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_uvd_force_into_uvd_segment
_amdgpu_uvd_force_into_uvd_segment:     ## @amdgpu_uvd_force_into_uvd_segment
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	8(%rdi), %r8d
	testl	%r8d, %r8d
	jle	LBB0_7
## %bb.1:
	movq	(%rdi), %rax
	cmpl	$1, %r8d
	jne	LBB0_3
## %bb.2:
	xorl	%esi, %esi
	jmp	LBB0_5
LBB0_3:
	movl	%r8d, %r9d
	andl	$-2, %r9d
	xorl	%esi, %esi
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rdx
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movl	$0, (%rax,%rsi,8)
	movzbl	(%rdx), %ecx
	movl	$268435456, %edi                ## imm = 0x10000000
	shrl	%cl, %edi
	movl	%edi, 4(%rax,%rsi,8)
	movl	$0, 8(%rax,%rsi,8)
	movzbl	(%rdx), %ecx
	movl	$268435456, %edi                ## imm = 0x10000000
	shrl	%cl, %edi
	movl	%edi, 12(%rax,%rsi,8)
	addq	$2, %rsi
	cmpq	%rsi, %r9
	jne	LBB0_4
LBB0_5:
	testb	$1, %r8b
	je	LBB0_7
## %bb.6:
	movl	$0, (%rax,%rsi,8)
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$268435456, %edx                ## imm = 0x10000000
	shrl	%cl, %edx
	movl	%edx, 4(%rax,%rsi,8)
LBB0_7:
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PAGE_SHIFT,4,2                 ## @PAGE_SHIFT
	.no_dead_strip	_amdgpu_uvd_force_into_uvd_segment
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_uvd_force_into_uvd_segment
_amdgpu_uvd_force_into_uvd_segment:     ; @amdgpu_uvd_force_into_uvd_segment
	.cfi_startproc
; %bb.0:
	ldr	w9, [x0, #8]
	cmp	w9, #1
	b.lt	LBB0_9
; %bb.1:
	ldr	x10, [x0]
Lloh0:
	adrp	x8, _PAGE_SHIFT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PAGE_SHIFT@GOTPAGEOFF]
	cmp	w9, #16
	b.lo	LBB0_6
; %bb.2:
	add	x11, x10, x9, lsl #3
	add	x12, x8, #4
	cmp	x10, x12
	ccmp	x11, x8, #0, lo
	b.hi	LBB0_6
; %bb.3:
	and	x11, x9, #0xfffffff0
	add	x13, x10, #64
	movi.4s	v0, #16, lsl #24
	movi.2d	v1, #0000000000000000
	mov	x12, x11
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	s3, [x8]
	neg.4s	v3, v3
	ushl.4s	v3, v0, v3
	dup.4s	v2, v3[0]
	sub	x14, x13, #64
	st2.4s	{ v1, v2 }, [x14]
	sub	x14, x13, #32
	st2.4s	{ v1, v2 }, [x14]
	add	x14, x13, #128
	st2.4s	{ v1, v2 }, [x13], #32
	st2.4s	{ v1, v2 }, [x13]
	mov	x13, x14
	subs	x12, x12, #16
	b.ne	LBB0_4
; %bb.5:
	cmp	x11, x9
	b.ne	LBB0_7
	b	LBB0_9
LBB0_6:
	mov	x11, #0
LBB0_7:
	add	x10, x10, x11, lsl #3
	add	x10, x10, #4
	sub	x9, x9, x11
	mov	w11, #268435456
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	stur	wzr, [x10, #-4]
	ldr	w12, [x8]
	lsr	w12, w11, w12
	str	w12, [x10], #8
	subs	x9, x9, #1
	b.ne	LBB0_8
LBB0_9:
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_PAGE_SHIFT,4,2                 ; @PAGE_SHIFT
	.no_dead_strip	_amdgpu_uvd_force_into_uvd_segment
.subsections_via_symbols
