	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vce_sw_init             ## -- Begin function amdgpu_vce_sw_init
	.p2align	4, 0x90
_amdgpu_vce_sw_init:                    ## @amdgpu_vce_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdi), %eax
	addl	$-128, %eax
	cmpl	$15, %eax
	jae	LBB0_1
## %bb.2:
	movl	$25087, %ecx                    ## imm = 0x61FF
	btl	%eax, %ecx
	jb	LBB0_3
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_12:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movq	%rsi, %r14
	movq	%rdi, %r15
	cltq
	leaq	l_switch.table.amdgpu_vce_sw_init(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	movq	(%rax), %r12
	leaq	56(%rdi), %r13
	movl	64(%rdi), %edx
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	_request_firmware
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	movl	%eax, %ebx
	movl	64(%r15), %edi
	leaq	L_.str(%rip), %rsi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_12
LBB0_5:
	movq	(%r13), %rdi
	callq	_amdgpu_ucode_validate
	testl	%eax, %eax
	je	LBB0_7
## %bb.6:
	movl	%eax, %ebx
	movl	64(%r15), %edi
	leaq	L_.str.1(%rip), %rsi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	_dev_err
	movq	56(%r15), %rdi
	callq	_release_firmware
	movq	$0, 56(%r15)
	jmp	LBB0_12
LBB0_7:
	movq	56(%r15), %rax
	movq	(%rax), %rax
	movl	(%rax), %edi
	callq	_le32_to_cpu
	movl	%eax, %r13d
	movl	%eax, %ebx
	movzbl	%r13b, %r12d
	shrl	$20, %r13d
	shrl	$8, %ebx
	andl	$4095, %ebx                     ## imm = 0xFFF
	leaq	L_.str.2(%rip), %rdi
	movl	%r13d, %esi
	movl	%ebx, %edx
	movl	%r12d, %ecx
	callq	_DRM_INFO
	shll	$24, %r13d
	shll	$16, %ebx
	orl	%r13d, %ebx
	shll	$8, %r12d
	orl	%ebx, %r12d
	movl	%r12d, 8(%r15)
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	48(%r15), %r8
	leaq	44(%r15), %r9
	leaq	40(%r15), %rax
	movq	%rax, (%rsp)
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_amdgpu_bo_create_kernel
	testl	%eax, %eax
	je	LBB0_8
## %bb.13:
	movl	%eax, %ebx
	movl	64(%r15), %edi
	leaq	L_.str.3(%rip), %rsi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_12
LBB0_8:
	movq	_AMDGPU_MAX_VCE_HANDLES@GOTPCREL(%rip), %r14
	cmpl	$0, (%r14)
	jle	LBB0_11
## %bb.9:
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
	.p2align	4, 0x90
LBB0_10:                                ## =>This Inner Loop Header: Depth=1
	movq	32(%r15), %rdi
	addq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_atomic_set
	movq	24(%r15), %rax
	movq	$0, (%rax,%rbx,2)
	incq	%r12
	movslq	(%r14), %rax
	addq	$4, %rbx
	cmpq	%rax, %r12
	jl	LBB0_10
LBB0_11:
	leaq	16(%r15), %rdi
	movq	_amdgpu_vce_idle_work_handler@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_INIT_DELAYED_WORK
	addq	$12, %r15
	movq	%r15, %rdi
	callq	_mutex_init
	xorl	%ebx, %ebx
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.comm	_FIRMWARE_TONGA,8,3             ## @FIRMWARE_TONGA
	.comm	_FIRMWARE_CARRIZO,8,3           ## @FIRMWARE_CARRIZO
	.comm	_FIRMWARE_FIJI,8,3              ## @FIRMWARE_FIJI
	.comm	_FIRMWARE_STONEY,8,3            ## @FIRMWARE_STONEY
	.comm	_FIRMWARE_POLARIS10,8,3         ## @FIRMWARE_POLARIS10
	.comm	_FIRMWARE_POLARIS11,8,3         ## @FIRMWARE_POLARIS11
	.comm	_FIRMWARE_POLARIS12,8,3         ## @FIRMWARE_POLARIS12
	.comm	_FIRMWARE_VEGAM,8,3             ## @FIRMWARE_VEGAM
	.comm	_FIRMWARE_VEGA10,8,3            ## @FIRMWARE_VEGA10
	.comm	_FIRMWARE_VEGA12,8,3            ## @FIRMWARE_VEGA12
	.comm	_FIRMWARE_VEGA20,8,3            ## @FIRMWARE_VEGA20
	.comm	_EINVAL,4,2                     ## @EINVAL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"amdgpu_vce: Can't load firmware \"%s\"\n"

L_.str.1:                               ## @.str.1
	.asciz	"amdgpu_vce: Can't validate firmware \"%s\"\n"

L_.str.2:                               ## @.str.2
	.asciz	"Found VCE firmware Version: %hhd.%hhd Binary ID: %hhd\n"

	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ## @AMDGPU_GEM_DOMAIN_VRAM
L_.str.3:                               ## @.str.3
	.asciz	"(%d) failed to allocate VCE bo\n"

	.comm	_AMDGPU_MAX_VCE_HANDLES,4,2     ## @AMDGPU_MAX_VCE_HANDLES
	.comm	_amdgpu_vce_idle_work_handler,4,2 ## @amdgpu_vce_idle_work_handler
	.comm	_FIRMWARE_BONAIRE,8,3           ## @FIRMWARE_BONAIRE
	.comm	_FIRMWARE_HAWAII,8,3            ## @FIRMWARE_HAWAII
	.comm	_FIRMWARE_KABINI,8,3            ## @FIRMWARE_KABINI
	.comm	_FIRMWARE_KAVERI,8,3            ## @FIRMWARE_KAVERI
	.comm	_FIRMWARE_MULLINS,8,3           ## @FIRMWARE_MULLINS
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.amdgpu_vce_sw_init
l_switch.table.amdgpu_vce_sw_init:
	.quad	_FIRMWARE_VEGAM
	.quad	_FIRMWARE_VEGA20
	.quad	_FIRMWARE_VEGA12
	.quad	_FIRMWARE_VEGA10
	.quad	_FIRMWARE_TONGA
	.quad	_FIRMWARE_STONEY
	.quad	_FIRMWARE_POLARIS12
	.quad	_FIRMWARE_POLARIS11
	.quad	_FIRMWARE_POLARIS10
	.quad	_FIRMWARE_TONGA
	.quad	_FIRMWARE_TONGA
	.quad	_FIRMWARE_TONGA
	.quad	_FIRMWARE_TONGA
	.quad	_FIRMWARE_FIJI
	.quad	_FIRMWARE_CARRIZO

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vce_sw_init             ; -- Begin function amdgpu_vce_sw_init
	.p2align	2
_amdgpu_vce_sw_init:                    ; @amdgpu_vce_sw_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	w8, [x0]
	sub	w8, w8, #128
	cmp	w8, #15
	b.hs	LBB0_2
; %bb.1:
	mov	w9, #25087
	lsr	w9, w9, w8
	tbnz	w9, #0, LBB0_4
LBB0_2:
Lloh0:
	adrp	x8, _EINVAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_3:
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_4:
	mov	x20, x1
	mov	x19, x0
Lloh3:
	adrp	x9, l_switch.table.amdgpu_vce_sw_init@PAGE
Lloh4:
	add	x9, x9, l_switch.table.amdgpu_vce_sw_init@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	ldr	x22, [x8]
	add	x23, x0, #56
	ldr	w2, [x0, #64]
	mov	x0, x23
	mov	x1, x22
	bl	_request_firmware
	cbz	w0, LBB0_6
; %bb.5:
	mov	x21, x0
	ldr	w0, [x19, #64]
	str	x22, [sp]
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
	b	LBB0_3
LBB0_6:
	ldr	x0, [x23]
	bl	_amdgpu_ucode_validate
	cbz	w0, LBB0_8
; %bb.7:
	mov	x21, x0
	ldr	w0, [x19, #64]
	str	x22, [sp]
Lloh7:
	adrp	x1, l_.str.1@PAGE
Lloh8:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_err
	ldr	x0, [x19, #56]
	bl	_release_firmware
	str	xzr, [x19, #56]
	b	LBB0_3
LBB0_8:
	ldr	x8, [x19, #56]
	ldr	x8, [x8]
	ldr	w0, [x8]
	bl	_le32_to_cpu
	lsr	w21, w0, #20
	ubfx	w22, w0, #8, #12
	and	w23, w0, #0xff
Lloh9:
	adrp	x0, l_.str.2@PAGE
Lloh10:
	add	x0, x0, l_.str.2@PAGEOFF
	mov	x1, x21
	mov	x2, x22
	mov	x3, x23
	bl	_DRM_INFO
	lsl	w8, w21, #24
	orr	w8, w8, w22, lsl #16
	bfi	w8, w23, #8, #8
	str	w8, [x19, #8]
Lloh11:
	adrp	x8, _PAGE_SIZE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PAGE_SIZE@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
Lloh14:
	adrp	x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGE
Lloh15:
	ldr	x8, [x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh16:
	ldr	w3, [x8]
	add	x4, x19, #48
	add	x5, x19, #44
	add	x6, x19, #40
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_bo_create_kernel
	cbz	w0, LBB0_10
; %bb.9:
	mov	x21, x0
	ldr	w0, [x19, #64]
	str	x21, [sp]
Lloh17:
	adrp	x1, l_.str.3@PAGE
Lloh18:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_dev_err
	b	LBB0_3
LBB0_10:
Lloh19:
	adrp	x20, _AMDGPU_MAX_VCE_HANDLES@GOTPAGE
Lloh20:
	ldr	x20, [x20, _AMDGPU_MAX_VCE_HANDLES@GOTPAGEOFF]
	ldr	w8, [x20]
	cmp	w8, #1
	b.lt	LBB0_13
; %bb.11:
	mov	x21, #0
	mov	x22, #0
LBB0_12:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #32]
	add	x0, x8, x21
	mov	w1, #0
	bl	_atomic_set
	ldr	x8, [x19, #24]
	str	xzr, [x8, x22, lsl #3]
	add	x22, x22, #1
	ldrsw	x8, [x20]
	add	x21, x21, #4
	cmp	x22, x8
	b.lt	LBB0_12
LBB0_13:
	add	x0, x19, #16
Lloh21:
	adrp	x8, _amdgpu_vce_idle_work_handler@GOTPAGE
Lloh22:
	ldr	x8, [x8, _amdgpu_vce_idle_work_handler@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	bl	_INIT_DELAYED_WORK
	add	x0, x19, #12
	bl	_mutex_init
	mov	w21, #0
	b	LBB0_3
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_FIRMWARE_TONGA,8,3             ; @FIRMWARE_TONGA
	.comm	_FIRMWARE_CARRIZO,8,3           ; @FIRMWARE_CARRIZO
	.comm	_FIRMWARE_FIJI,8,3              ; @FIRMWARE_FIJI
	.comm	_FIRMWARE_STONEY,8,3            ; @FIRMWARE_STONEY
	.comm	_FIRMWARE_POLARIS10,8,3         ; @FIRMWARE_POLARIS10
	.comm	_FIRMWARE_POLARIS11,8,3         ; @FIRMWARE_POLARIS11
	.comm	_FIRMWARE_POLARIS12,8,3         ; @FIRMWARE_POLARIS12
	.comm	_FIRMWARE_VEGAM,8,3             ; @FIRMWARE_VEGAM
	.comm	_FIRMWARE_VEGA10,8,3            ; @FIRMWARE_VEGA10
	.comm	_FIRMWARE_VEGA12,8,3            ; @FIRMWARE_VEGA12
	.comm	_FIRMWARE_VEGA20,8,3            ; @FIRMWARE_VEGA20
	.comm	_EINVAL,4,2                     ; @EINVAL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"amdgpu_vce: Can't load firmware \"%s\"\n"

l_.str.1:                               ; @.str.1
	.asciz	"amdgpu_vce: Can't validate firmware \"%s\"\n"

l_.str.2:                               ; @.str.2
	.asciz	"Found VCE firmware Version: %hhd.%hhd Binary ID: %hhd\n"

	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ; @AMDGPU_GEM_DOMAIN_VRAM
l_.str.3:                               ; @.str.3
	.asciz	"(%d) failed to allocate VCE bo\n"

	.comm	_AMDGPU_MAX_VCE_HANDLES,4,2     ; @AMDGPU_MAX_VCE_HANDLES
	.comm	_amdgpu_vce_idle_work_handler,4,2 ; @amdgpu_vce_idle_work_handler
	.comm	_FIRMWARE_BONAIRE,8,3           ; @FIRMWARE_BONAIRE
	.comm	_FIRMWARE_HAWAII,8,3            ; @FIRMWARE_HAWAII
	.comm	_FIRMWARE_KABINI,8,3            ; @FIRMWARE_KABINI
	.comm	_FIRMWARE_KAVERI,8,3            ; @FIRMWARE_KAVERI
	.comm	_FIRMWARE_MULLINS,8,3           ; @FIRMWARE_MULLINS
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.amdgpu_vce_sw_init
l_switch.table.amdgpu_vce_sw_init:
	.quad	_FIRMWARE_VEGAM
	.quad	_FIRMWARE_VEGA20
	.quad	_FIRMWARE_VEGA12
	.quad	_FIRMWARE_VEGA10
	.quad	_FIRMWARE_TONGA
	.quad	_FIRMWARE_STONEY
	.quad	_FIRMWARE_POLARIS12
	.quad	_FIRMWARE_POLARIS11
	.quad	_FIRMWARE_POLARIS10
	.quad	_FIRMWARE_TONGA
	.quad	_FIRMWARE_TONGA
	.quad	_FIRMWARE_TONGA
	.quad	_FIRMWARE_TONGA
	.quad	_FIRMWARE_FIJI
	.quad	_FIRMWARE_CARRIZO

.subsections_via_symbols
