	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_bm_disable                ## -- Begin function r100_bm_disable
	.p2align	4, 0x90
_r100_bm_disable:                       ## @r100_bm_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_R_000030_BUS_CNTL@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32
	movl	%eax, %ebx
	movl	(%r15), %edi
	movl	%eax, %esi
	orl	$68, %esi
	callq	_WREG32
	movl	$1, %edi
	callq	_mdelay
	movl	(%r15), %edi
	movl	%ebx, %esi
	orl	$66, %esi
	callq	_WREG32
	movl	$1, %edi
	callq	_mdelay
	movl	(%r15), %edi
	orl	$64, %ebx
	movl	%ebx, %esi
	callq	_WREG32
	movq	_RADEON_BUS_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	$1, %edi
	callq	_mdelay
	movl	(%r14), %edi
	callq	_pci_clear_master
	movl	$1, %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mdelay                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_R_000030_BUS_CNTL,4,2          ## @R_000030_BUS_CNTL
	.comm	_RADEON_BUS_CNTL,4,2            ## @RADEON_BUS_CNTL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_bm_disable                ; -- Begin function r100_bm_disable
	.p2align	2
_r100_bm_disable:                       ; @r100_bm_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x21, _R_000030_BUS_CNTL@GOTPAGE
Lloh1:
	ldr	x21, [x21, _R_000030_BUS_CNTL@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_RREG32
	mov	x20, x0
	ldr	w0, [x21]
	mov	w8, #68
	orr	w1, w20, w8
	bl	_WREG32
	mov	w0, #1
	bl	_mdelay
	ldr	w0, [x21]
	mov	w8, #66
	orr	w1, w20, w8
	bl	_WREG32
	mov	w0, #1
	bl	_mdelay
	ldr	w0, [x21]
	orr	w1, w20, #0x40
	bl	_WREG32
Lloh2:
	adrp	x8, _RADEON_BUS_CNTL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RADEON_BUS_CNTL@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	bl	_RREG32
	mov	w0, #1
	bl	_mdelay
	ldr	w0, [x19]
	bl	_pci_clear_master
	mov	w0, #1
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_mdelay
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_R_000030_BUS_CNTL,4,2          ; @R_000030_BUS_CNTL
	.comm	_RADEON_BUS_CNTL,4,2            ; @RADEON_BUS_CNTL
.subsections_via_symbols
