	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function assert_chv_phy_status
_assert_chv_phy_status:                 ## @assert_chv_phy_status
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_VLV_DISP_PW_DPIO_CMN_BC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_lookup_power_well
	movq	%rax, %r12
	movq	_CHV_DISP_PW_DPIO_CMN_D@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_lookup_power_well
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	movl	(%rbx), %eax
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movq	8(%rbx), %rax
	movq	_DPIO_PHY0@GOTPCREL(%rip), %r13
	movq	(%r13), %rdi
	movl	$-1, -48(%rbp)                  ## 4-byte Folded Spill
	cmpl	$0, (%rax,%rdi,4)
	jne	LBB0_2
## %bb.1:
	movq	_DPIO_CH0@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	callq	_PHY_STATUS_CMN_LDO
	movl	%eax, %r15d
	movq	(%r13), %rdi
	movl	(%r14), %esi
	xorl	%edx, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	movl	%eax, %ebx
	orl	%r15d, %ebx
	movq	(%r13), %rdi
	movl	(%r14), %esi
	movl	$1, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	movl	%eax, %r15d
	movq	(%r13), %rdi
	movq	_DPIO_CH1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_PHY_STATUS_CMN_LDO
	movl	%eax, %r14d
	orl	%r15d, %r14d
	orl	%ebx, %r14d
	movq	(%r13), %rdi
	movq	_DPIO_CH1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	movl	%eax, %ebx
	movq	(%r13), %rdi
	movq	_DPIO_CH1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	orl	%ebx, %eax
	orl	%r14d, %eax
	notl	%eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	8(%rax), %rax
LBB0_2:
	movq	_DPIO_PHY1@GOTPCREL(%rip), %r13
	movq	(%r13), %rdi
	cmpl	$0, (%rax,%rdi,4)
	jne	LBB0_4
## %bb.3:
	movq	_DPIO_CH0@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_PHY_STATUS_CMN_LDO
	movl	%eax, %r14d
	movq	(%r13), %rdi
	movl	(%r15), %esi
	xorl	%edx, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	movl	%eax, %ebx
	orl	%r14d, %ebx
	movq	(%r13), %rdi
	movl	(%r15), %esi
	movl	$1, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	orl	%ebx, %eax
	notl	%eax
	andl	%eax, -48(%rbp)                 ## 4-byte Folded Spill
LBB0_4:
	movq	(%r12), %rax
	movq	(%rax), %rax
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%r12, %rsi
	callq	*(%rax)
	testq	%rax, %rax
	movq	_DPIO_PHY0@GOTPCREL(%rip), %r13
	je	LBB0_5
## %bb.6:
	movq	(%r13), %rdi
	callq	_PHY_POWERGOOD
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	(%r13), %rdi
	movq	_DPIO_CH0@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	callq	_PHY_CH_POWER_DOWN_OVRD_EN
	movl	-60(%rbp), %r15d                ## 4-byte Reload
	testl	%r15d, %eax
	jne	LBB0_8
## %bb.7:
	movq	(%r13), %rsi
	movl	(%r12), %edx
	movl	$15, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	orl	%eax, %r15d
LBB0_8:
	movq	(%r13), %rdi
	movq	_DPIO_CH1@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	callq	_PHY_CH_POWER_DOWN_OVRD_EN
	testl	%r15d, %eax
	jne	LBB0_10
## %bb.9:
	movq	(%r13), %rsi
	movl	(%rbx), %edx
	movl	$15, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	orl	%eax, %r15d
LBB0_10:
	movq	%rbx, %r14
	movq	(%r13), %rsi
	movl	(%r12), %edx
	movl	$15, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	movl	%eax, %ebx
	movq	(%r13), %rsi
	movq	%r14, %r13
	movl	(%r14), %edx
	movl	$15, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	orl	%eax, %ebx
	movl	%r15d, %r14d
	movl	%r15d, %edi
	movl	%ebx, %esi
	callq	_BITS_SET
	movq	_DPIO_PHY0@GOTPCREL(%rip), %rbx
	testq	%rax, %rax
	je	LBB0_12
## %bb.11:
	movq	(%rbx), %rdi
	movl	(%r12), %esi
	callq	_PHY_STATUS_CMN_LDO
	orl	%eax, -44(%rbp)                 ## 4-byte Folded Spill
LBB0_12:
	movq	%r12, %r15
	movl	%r14d, %r12d
	movq	(%rbx), %rsi
	movl	(%r13), %edx
	movl	$15, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	movl	%r14d, %edi
	movl	%eax, %esi
	callq	_BITS_SET
	testq	%rax, %rax
	je	LBB0_15
## %bb.13:
	movq	_PIPE_B@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_DPLL
	movl	%eax, %edi
	callq	_I915_READ
	movq	_DPLL_VCO_ENABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_15
## %bb.14:
	movq	(%rbx), %rdi
	movl	(%r13), %esi
	callq	_PHY_STATUS_CMN_LDO
	orl	%eax, -44(%rbp)                 ## 4-byte Folded Spill
LBB0_15:
	movq	(%rbx), %rsi
	movl	(%r15), %edx
	movl	$3, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_BITS_SET
	testq	%rax, %rax
	je	LBB0_17
## %bb.16:
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	xorl	%edx, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	orl	%eax, -44(%rbp)                 ## 4-byte Folded Spill
LBB0_17:
	movq	(%rbx), %rsi
	movl	(%r15), %edx
	movl	$12, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_BITS_SET
	testq	%rax, %rax
	je	LBB0_18
## %bb.19:
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	movl	$1, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	orl	%eax, %r15d
	jmp	LBB0_20
LBB0_5:
	xorl	%r15d, %r15d
	movl	-60(%rbp), %r12d                ## 4-byte Reload
	jmp	LBB0_24
LBB0_18:
	movl	-44(%rbp), %r15d                ## 4-byte Reload
LBB0_20:
	movq	(%rbx), %rsi
	movl	(%r13), %edx
	movl	$3, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_BITS_SET
	testq	%rax, %rax
	je	LBB0_22
## %bb.21:
	movq	(%rbx), %rdi
	movl	(%r13), %esi
	xorl	%edx, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	orl	%eax, %r15d
LBB0_22:
	movq	(%rbx), %rsi
	movl	(%r13), %edx
	movl	$12, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_BITS_SET
	testq	%rax, %rax
	je	LBB0_24
## %bb.23:
	movq	(%rbx), %rdi
	movl	(%r13), %esi
	movl	$1, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	orl	%eax, %r15d
LBB0_24:
	movq	-72(%rbp), %rsi                 ## 8-byte Reload
	movq	(%rsi), %rax
	movq	(%rax), %rax
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	*(%rax)
	testq	%rax, %rax
	je	LBB0_34
## %bb.25:
	movq	_DPIO_PHY1@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	callq	_PHY_POWERGOOD
	movl	%eax, %r13d
	movq	(%rbx), %rdi
	movq	_DPIO_CH0@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	callq	_PHY_CH_POWER_DOWN_OVRD_EN
	testl	%r12d, %eax
	jne	LBB0_27
## %bb.26:
	movq	(%rbx), %rsi
	movl	(%r14), %edx
	movl	$15, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	orl	%eax, %r12d
LBB0_27:
	orl	%r15d, %r13d
	movq	(%rbx), %rsi
	movl	(%r14), %edx
	movl	$15, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	movl	%r12d, %r15d
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_BITS_SET
	testq	%rax, %rax
	je	LBB0_29
## %bb.28:
	movq	(%rbx), %rdi
	movl	(%r14), %esi
	callq	_PHY_STATUS_CMN_LDO
	orl	%eax, %r13d
LBB0_29:
	movq	(%rbx), %rsi
	movl	(%r14), %edx
	movl	$3, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_BITS_SET
	testq	%rax, %rax
	je	LBB0_31
## %bb.30:
	movq	(%rbx), %rdi
	movl	(%r14), %esi
	xorl	%edx, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	orl	%eax, %r13d
LBB0_31:
	movq	(%rbx), %rsi
	movl	(%r14), %edx
	movl	$12, %edi
	callq	_PHY_CH_POWER_DOWN_OVRD
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_BITS_SET
	testq	%rax, %rax
	je	LBB0_32
## %bb.33:
	movq	(%rbx), %rdi
	movl	(%r14), %esi
	movl	$1, %edx
	callq	_PHY_STATUS_SPLINE_LDO
	movl	%eax, %r15d
	orl	%r13d, %r15d
	jmp	LBB0_34
LBB0_32:
	movl	%r13d, %r15d
LBB0_34:
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	andl	%ebx, %r15d
	movq	_DISPLAY_PHY_STATUS@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movl	%ebx, %edx
	movl	%r15d, %ecx
	movl	$10, %r8d
	callq	_intel_de_wait_for_register
	testq	%rax, %rax
	je	LBB0_35
## %bb.36:
	movl	(%r14), %edi
	callq	_I915_READ
	andl	%eax, %ebx
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %ecx
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %esi
	movl	%r15d, %edx
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DRM_ERROR                      ## TAILCALL
LBB0_35:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VLV_DISP_PW_DPIO_CMN_BC,4,2    ## @VLV_DISP_PW_DPIO_CMN_BC
	.comm	_CHV_DISP_PW_DPIO_CMN_D,4,2     ## @CHV_DISP_PW_DPIO_CMN_D
	.comm	_DPIO_PHY0,8,3                  ## @DPIO_PHY0
	.comm	_DPIO_CH0,4,2                   ## @DPIO_CH0
	.comm	_DPIO_CH1,4,2                   ## @DPIO_CH1
	.comm	_DPIO_PHY1,8,3                  ## @DPIO_PHY1
	.comm	_PIPE_B,4,2                     ## @PIPE_B
	.comm	_DPLL_VCO_ENABLE,4,2            ## @DPLL_VCO_ENABLE
	.comm	_DISPLAY_PHY_STATUS,4,2         ## @DISPLAY_PHY_STATUS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Unexpected PHY_STATUS 0x%08x, expected 0x%08x (PHY_CONTROL=0x%08x)\n"

	.no_dead_strip	_assert_chv_phy_status
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function assert_chv_phy_status
_assert_chv_phy_status:                 ; @assert_chv_phy_status
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x8, _VLV_DISP_PW_DPIO_CMN_BC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VLV_DISP_PW_DPIO_CMN_BC@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_lookup_power_well
	mov	x22, x0
Lloh3:
	adrp	x8, _CHV_DISP_PW_DPIO_CMN_D@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CHV_DISP_PW_DPIO_CMN_D@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_lookup_power_well
	mov	x23, x0
	ldr	w20, [x19]
	ldr	x8, [x19, #8]
Lloh6:
	adrp	x27, _DPIO_PHY0@GOTPAGE
Lloh7:
	ldr	x27, [x27, _DPIO_PHY0@GOTPAGEOFF]
	ldr	x0, [x27]
	ldr	w9, [x8, x0, lsl #2]
Lloh8:
	adrp	x25, _DPIO_CH0@GOTPAGE
Lloh9:
	ldr	x25, [x25, _DPIO_CH0@GOTPAGEOFF]
Lloh10:
	adrp	x28, _DPIO_CH1@GOTPAGE
Lloh11:
	ldr	x28, [x28, _DPIO_CH1@GOTPAGEOFF]
	cbz	w9, LBB0_2
; %bb.1:
	mov	w21, #-1
	b	LBB0_3
LBB0_2:
	ldr	w1, [x25]
	bl	_PHY_STATUS_CMN_LDO
	mov	x21, x0
	ldr	x0, [x27]
	ldr	w1, [x25]
	mov	w2, #0
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w21, w0, w21
	ldr	x0, [x27]
	ldr	w1, [x25]
	mov	w2, #1
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w21, w21, w0
	ldr	x0, [x27]
	ldr	w1, [x28]
	bl	_PHY_STATUS_CMN_LDO
	orr	w21, w21, w0
	ldr	x0, [x27]
	ldr	w1, [x28]
	mov	w2, #0
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w21, w21, w0
	ldr	x0, [x27]
	ldr	w1, [x28]
	mov	w2, #1
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w8, w21, w0
	mvn	w21, w8
	ldr	x8, [x19, #8]
LBB0_3:
Lloh12:
	adrp	x26, _DPIO_PHY1@GOTPAGE
Lloh13:
	ldr	x26, [x26, _DPIO_PHY1@GOTPAGEOFF]
	ldr	x0, [x26]
	ldr	w8, [x8, x0, lsl #2]
	cbnz	w8, LBB0_5
; %bb.4:
	ldr	w1, [x25]
	bl	_PHY_STATUS_CMN_LDO
	mov	x24, x0
	ldr	x0, [x26]
	ldr	w1, [x25]
	mov	w2, #0
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w24, w0, w24
	ldr	x0, [x26]
	ldr	w1, [x25]
	mov	w2, #1
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w8, w24, w0
	bic	w21, w21, w8
LBB0_5:
	ldr	x8, [x22]
	ldr	x8, [x8]
	ldr	x8, [x8]
	mov	x0, x19
	mov	x1, x22
	blr	x8
	cbz	x0, LBB0_23
; %bb.6:
	ldr	x0, [x27]
	bl	_PHY_POWERGOOD
	mov	x22, x0
	ldr	x0, [x27]
	ldr	w1, [x25]
	bl	_PHY_CH_POWER_DOWN_OVRD_EN
	tst	w0, w20
	b.ne	LBB0_8
; %bb.7:
	ldr	x1, [x27]
	ldr	w2, [x25]
	mov	w0, #15
	bl	_PHY_CH_POWER_DOWN_OVRD
	orr	w20, w0, w20
LBB0_8:
	ldr	x0, [x27]
	ldr	w1, [x28]
	bl	_PHY_CH_POWER_DOWN_OVRD_EN
	tst	w0, w20
	b.ne	LBB0_10
; %bb.9:
	ldr	x1, [x27]
	ldr	w2, [x28]
	mov	w0, #15
	bl	_PHY_CH_POWER_DOWN_OVRD
	orr	w20, w0, w20
LBB0_10:
	ldr	x1, [x27]
	ldr	w2, [x25]
	mov	w0, #15
	bl	_PHY_CH_POWER_DOWN_OVRD
	mov	x24, x0
	ldr	x1, [x27]
	ldr	w2, [x28]
	mov	w0, #15
	bl	_PHY_CH_POWER_DOWN_OVRD
	orr	w1, w0, w24
	mov	x0, x20
	bl	_BITS_SET
	cbz	x0, LBB0_12
; %bb.11:
	ldr	x0, [x27]
	ldr	w1, [x25]
	bl	_PHY_STATUS_CMN_LDO
	orr	w22, w0, w22
LBB0_12:
	ldr	x1, [x27]
	ldr	w2, [x28]
	mov	w0, #15
	bl	_PHY_CH_POWER_DOWN_OVRD
	mov	x1, x0
	mov	x0, x20
	bl	_BITS_SET
	cbz	x0, LBB0_15
; %bb.13:
Lloh14:
	adrp	x8, _PIPE_B@GOTPAGE
Lloh15:
	ldr	x8, [x8, _PIPE_B@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	bl	_DPLL
	bl	_I915_READ
Lloh17:
	adrp	x8, _DPLL_VCO_ENABLE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DPLL_VCO_ENABLE@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	tst	w8, w0
	b.ne	LBB0_15
; %bb.14:
	ldr	x0, [x27]
	ldr	w1, [x28]
	bl	_PHY_STATUS_CMN_LDO
	orr	w22, w0, w22
LBB0_15:
	ldr	x1, [x27]
	ldr	w2, [x25]
	mov	w0, #3
	bl	_PHY_CH_POWER_DOWN_OVRD
	mov	x1, x0
	mov	x0, x20
	bl	_BITS_SET
	cbz	x0, LBB0_17
; %bb.16:
	ldr	x0, [x27]
	ldr	w1, [x25]
	mov	w2, #0
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w22, w0, w22
LBB0_17:
	ldr	x1, [x27]
	ldr	w2, [x25]
	mov	w0, #12
	bl	_PHY_CH_POWER_DOWN_OVRD
	mov	x1, x0
	mov	x0, x20
	bl	_BITS_SET
	cbz	x0, LBB0_19
; %bb.18:
	ldr	x0, [x27]
	ldr	w1, [x25]
	mov	w2, #1
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w22, w0, w22
LBB0_19:
	ldr	x1, [x27]
	ldr	w2, [x28]
	mov	w0, #3
	bl	_PHY_CH_POWER_DOWN_OVRD
	mov	x1, x0
	mov	x0, x20
	bl	_BITS_SET
	cbz	x0, LBB0_21
; %bb.20:
	ldr	x0, [x27]
	ldr	w1, [x28]
	mov	w2, #0
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w22, w0, w22
LBB0_21:
	ldr	x1, [x27]
	ldr	w2, [x28]
	mov	w0, #12
	bl	_PHY_CH_POWER_DOWN_OVRD
	mov	x1, x0
	mov	x0, x20
	bl	_BITS_SET
	cbz	x0, LBB0_24
; %bb.22:
	ldr	x0, [x27]
	ldr	w1, [x28]
	mov	w2, #1
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w22, w0, w22
	b	LBB0_24
LBB0_23:
	mov	w22, #0
LBB0_24:
	ldr	x8, [x23]
	ldr	x8, [x8]
	ldr	x8, [x8]
	mov	x0, x19
	mov	x1, x23
	blr	x8
	cbz	x0, LBB0_33
; %bb.25:
	ldr	x0, [x26]
	bl	_PHY_POWERGOOD
	mov	x23, x0
	ldr	x0, [x26]
	ldr	w1, [x25]
	bl	_PHY_CH_POWER_DOWN_OVRD_EN
	tst	w0, w20
	b.ne	LBB0_27
; %bb.26:
	ldr	x1, [x26]
	ldr	w2, [x25]
	mov	w0, #15
	bl	_PHY_CH_POWER_DOWN_OVRD
	orr	w20, w0, w20
LBB0_27:
	orr	w22, w23, w22
	ldr	x1, [x26]
	ldr	w2, [x25]
	mov	w0, #15
	bl	_PHY_CH_POWER_DOWN_OVRD
	mov	x1, x0
	mov	x0, x20
	bl	_BITS_SET
	cbz	x0, LBB0_29
; %bb.28:
	ldr	x0, [x26]
	ldr	w1, [x25]
	bl	_PHY_STATUS_CMN_LDO
	orr	w22, w0, w22
LBB0_29:
	ldr	x1, [x26]
	ldr	w2, [x25]
	mov	w0, #3
	bl	_PHY_CH_POWER_DOWN_OVRD
	mov	x1, x0
	mov	x0, x20
	bl	_BITS_SET
	cbz	x0, LBB0_31
; %bb.30:
	ldr	x0, [x26]
	ldr	w1, [x25]
	mov	w2, #0
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w22, w0, w22
LBB0_31:
	ldr	x1, [x26]
	ldr	w2, [x25]
	mov	w0, #12
	bl	_PHY_CH_POWER_DOWN_OVRD
	mov	x1, x0
	mov	x0, x20
	bl	_BITS_SET
	cbz	x0, LBB0_33
; %bb.32:
	ldr	x0, [x26]
	ldr	w1, [x25]
	mov	w2, #1
	bl	_PHY_STATUS_SPLINE_LDO
	orr	w22, w0, w22
LBB0_33:
	and	w20, w22, w21
Lloh20:
	adrp	x22, _DISPLAY_PHY_STATUS@GOTPAGE
Lloh21:
	ldr	x22, [x22, _DISPLAY_PHY_STATUS@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	mov	x2, x21
	mov	x3, x20
	mov	w4, #10
	bl	_intel_de_wait_for_register
	cbz	x0, LBB0_35
; %bb.34:
	ldr	w0, [x22]
	bl	_I915_READ
	and	w1, w0, w21
	ldr	w3, [x19]
Lloh22:
	adrp	x0, l_.str@PAGE
Lloh23:
	add	x0, x0, l_.str@PAGEOFF
	mov	x2, x20
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_DRM_ERROR
LBB0_35:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_VLV_DISP_PW_DPIO_CMN_BC,4,2    ; @VLV_DISP_PW_DPIO_CMN_BC
	.comm	_CHV_DISP_PW_DPIO_CMN_D,4,2     ; @CHV_DISP_PW_DPIO_CMN_D
	.comm	_DPIO_PHY0,8,3                  ; @DPIO_PHY0
	.comm	_DPIO_CH0,4,2                   ; @DPIO_CH0
	.comm	_DPIO_CH1,4,2                   ; @DPIO_CH1
	.comm	_DPIO_PHY1,8,3                  ; @DPIO_PHY1
	.comm	_PIPE_B,4,2                     ; @PIPE_B
	.comm	_DPLL_VCO_ENABLE,4,2            ; @DPLL_VCO_ENABLE
	.comm	_DISPLAY_PHY_STATUS,4,2         ; @DISPLAY_PHY_STATUS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Unexpected PHY_STATUS 0x%08x, expected 0x%08x (PHY_CONTROL=0x%08x)\n"

	.no_dead_strip	_assert_chv_phy_status
.subsections_via_symbols
