	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vce_v2_0_resume                ## -- Begin function vce_v2_0_resume
	.p2align	4, 0x90
_vce_v2_0_resume:                       ## @vce_v2_0_resume
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	(%rdi), %ebx
	movq	_VCE_CLOCK_GATING_A@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	movl	$-65537, %edx                   ## imm = 0xFFFEFFFF
	callq	_WREG32_P
	movq	_VCE_UENC_CLOCK_GATING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$2093056, %esi                  ## imm = 0x1FF000
	movl	$6295551, %edx                  ## imm = 0x600FFF
	callq	_WREG32_P
	movq	_VCE_UENC_REG_CLOCK_GATING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$63, %esi
	movl	$-64, %edx
	callq	_WREG32_P
	movq	_VCE_CLOCK_GATING_B@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$247, %esi
	callq	_WREG32
	movq	_VCE_LMI_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$3768320, %esi                  ## imm = 0x398000
	callq	_WREG32
	movq	_VCE_LMI_CACHE_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	movl	$-2, %edx
	callq	_WREG32_P
	movq	_VCE_LMI_SWAP_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_VCE_LMI_SWAP_CNTL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_VCE_LMI_VM_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_VCE_LMI_VCPU_CACHE_40BIT_BAR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	sarl	$8, %esi
	callq	_WREG32
	movzbl	%bl, %r15d
	movq	_VCE_V2_0_FW_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_VCE_VCPU_CACHE_OFFSET0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	callq	_WREG32
	movq	_VCE_VCPU_CACHE_SIZE0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_WREG32
	addl	%r15d, %ebx
	movq	_VCE_V2_0_STACK_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_VCE_VCPU_CACHE_OFFSET1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	andl	$2147483647, %esi               ## imm = 0x7FFFFFFF
	callq	_WREG32
	movq	_VCE_VCPU_CACHE_SIZE1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	callq	_WREG32
	addl	%r15d, %ebx
	movq	_VCE_V2_0_DATA_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_VCE_VCPU_CACHE_OFFSET2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	$2147483647, %ebx               ## imm = 0x7FFFFFFF
	movl	%ebx, %esi
	callq	_WREG32
	movq	_VCE_VCPU_CACHE_SIZE2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	callq	_WREG32
	movq	_VCE_LMI_CTRL2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	movl	$-257, %edx                     ## imm = 0xFEFF
	callq	_WREG32_P
	movq	_VCE_SYS_INT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_VCE_SYS_INT_TRAP_INTERRUPT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%esi, %edx
	notl	%edx
	callq	_WREG32_P
	movq	%r14, %rdi
	callq	_vce_v2_0_init_cg
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VCE_CLOCK_GATING_A,4,2         ## @VCE_CLOCK_GATING_A
	.comm	_VCE_UENC_CLOCK_GATING,4,2      ## @VCE_UENC_CLOCK_GATING
	.comm	_VCE_UENC_REG_CLOCK_GATING,4,2  ## @VCE_UENC_REG_CLOCK_GATING
	.comm	_VCE_CLOCK_GATING_B,4,2         ## @VCE_CLOCK_GATING_B
	.comm	_VCE_LMI_CTRL,4,2               ## @VCE_LMI_CTRL
	.comm	_VCE_LMI_CACHE_CTRL,4,2         ## @VCE_LMI_CACHE_CTRL
	.comm	_VCE_LMI_SWAP_CNTL,4,2          ## @VCE_LMI_SWAP_CNTL
	.comm	_VCE_LMI_SWAP_CNTL1,4,2         ## @VCE_LMI_SWAP_CNTL1
	.comm	_VCE_LMI_VM_CTRL,4,2            ## @VCE_LMI_VM_CTRL
	.comm	_VCE_LMI_VCPU_CACHE_40BIT_BAR,4,2 ## @VCE_LMI_VCPU_CACHE_40BIT_BAR
	.comm	_VCE_V2_0_FW_SIZE,4,2           ## @VCE_V2_0_FW_SIZE
	.comm	_VCE_VCPU_CACHE_OFFSET0,4,2     ## @VCE_VCPU_CACHE_OFFSET0
	.comm	_VCE_VCPU_CACHE_SIZE0,4,2       ## @VCE_VCPU_CACHE_SIZE0
	.comm	_VCE_V2_0_STACK_SIZE,4,2        ## @VCE_V2_0_STACK_SIZE
	.comm	_VCE_VCPU_CACHE_OFFSET1,4,2     ## @VCE_VCPU_CACHE_OFFSET1
	.comm	_VCE_VCPU_CACHE_SIZE1,4,2       ## @VCE_VCPU_CACHE_SIZE1
	.comm	_VCE_V2_0_DATA_SIZE,4,2         ## @VCE_V2_0_DATA_SIZE
	.comm	_VCE_VCPU_CACHE_OFFSET2,4,2     ## @VCE_VCPU_CACHE_OFFSET2
	.comm	_VCE_VCPU_CACHE_SIZE2,4,2       ## @VCE_VCPU_CACHE_SIZE2
	.comm	_VCE_LMI_CTRL2,4,2              ## @VCE_LMI_CTRL2
	.comm	_VCE_SYS_INT_EN,4,2             ## @VCE_SYS_INT_EN
	.comm	_VCE_SYS_INT_TRAP_INTERRUPT_EN,4,2 ## @VCE_SYS_INT_TRAP_INTERRUPT_EN
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vce_v2_0_resume                ; -- Begin function vce_v2_0_resume
	.p2align	2
_vce_v2_0_resume:                       ; @vce_v2_0_resume
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w20, [x0]
Lloh0:
	adrp	x8, _VCE_CLOCK_GATING_A@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VCE_CLOCK_GATING_A@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	w1, #0
	mov	w2, #-65537
	bl	_WREG32_P
Lloh3:
	adrp	x8, _VCE_UENC_CLOCK_GATING@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VCE_UENC_CLOCK_GATING@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	w1, #2093056
	mov	w2, #4095
	movk	w2, #96, lsl #16
	bl	_WREG32_P
Lloh6:
	adrp	x8, _VCE_UENC_REG_CLOCK_GATING@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VCE_UENC_REG_CLOCK_GATING@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	mov	w1, #63
	mov	w2, #-64
	bl	_WREG32_P
Lloh9:
	adrp	x8, _VCE_CLOCK_GATING_B@GOTPAGE
Lloh10:
	ldr	x8, [x8, _VCE_CLOCK_GATING_B@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	mov	w1, #247
	bl	_WREG32
Lloh12:
	adrp	x8, _VCE_LMI_CTRL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VCE_LMI_CTRL@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	mov	w1, #32768
	movk	w1, #57, lsl #16
	bl	_WREG32
Lloh15:
	adrp	x8, _VCE_LMI_CACHE_CTRL@GOTPAGE
Lloh16:
	ldr	x8, [x8, _VCE_LMI_CACHE_CTRL@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	mov	w1, #0
	mov	w2, #-2
	bl	_WREG32_P
Lloh18:
	adrp	x8, _VCE_LMI_SWAP_CNTL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _VCE_LMI_SWAP_CNTL@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh21:
	adrp	x8, _VCE_LMI_SWAP_CNTL1@GOTPAGE
Lloh22:
	ldr	x8, [x8, _VCE_LMI_SWAP_CNTL1@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh24:
	adrp	x8, _VCE_LMI_VM_CTRL@GOTPAGE
Lloh25:
	ldr	x8, [x8, _VCE_LMI_VM_CTRL@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh27:
	adrp	x8, _VCE_LMI_VCPU_CACHE_40BIT_BAR@GOTPAGE
Lloh28:
	ldr	x8, [x8, _VCE_LMI_VCPU_CACHE_40BIT_BAR@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
	asr	w1, w20, #8
	bl	_WREG32
	and	w20, w20, #0xff
Lloh30:
	adrp	x8, _VCE_V2_0_FW_SIZE@GOTPAGE
Lloh31:
	ldr	x8, [x8, _VCE_V2_0_FW_SIZE@GOTPAGEOFF]
Lloh32:
	ldr	w21, [x8]
Lloh33:
	adrp	x8, _VCE_VCPU_CACHE_OFFSET0@GOTPAGE
Lloh34:
	ldr	x8, [x8, _VCE_VCPU_CACHE_OFFSET0@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_WREG32
Lloh36:
	adrp	x8, _VCE_VCPU_CACHE_SIZE0@GOTPAGE
Lloh37:
	ldr	x8, [x8, _VCE_VCPU_CACHE_SIZE0@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	mov	x1, x21
	bl	_WREG32
Lloh39:
	adrp	x8, _VCE_V2_0_STACK_SIZE@GOTPAGE
Lloh40:
	ldr	x8, [x8, _VCE_V2_0_STACK_SIZE@GOTPAGEOFF]
	add	w21, w21, w20
Lloh41:
	ldr	w20, [x8]
Lloh42:
	adrp	x8, _VCE_VCPU_CACHE_OFFSET1@GOTPAGE
Lloh43:
	ldr	x8, [x8, _VCE_VCPU_CACHE_OFFSET1@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	and	w1, w21, #0x7fffffff
	bl	_WREG32
Lloh45:
	adrp	x8, _VCE_VCPU_CACHE_SIZE1@GOTPAGE
Lloh46:
	ldr	x8, [x8, _VCE_VCPU_CACHE_SIZE1@GOTPAGEOFF]
Lloh47:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_WREG32
Lloh48:
	adrp	x8, _VCE_V2_0_DATA_SIZE@GOTPAGE
Lloh49:
	ldr	x8, [x8, _VCE_V2_0_DATA_SIZE@GOTPAGEOFF]
	add	w9, w20, w21
Lloh50:
	ldr	w20, [x8]
Lloh51:
	adrp	x8, _VCE_VCPU_CACHE_OFFSET2@GOTPAGE
Lloh52:
	ldr	x8, [x8, _VCE_VCPU_CACHE_OFFSET2@GOTPAGEOFF]
Lloh53:
	ldr	w0, [x8]
	and	w1, w9, #0x7fffffff
	bl	_WREG32
Lloh54:
	adrp	x8, _VCE_VCPU_CACHE_SIZE2@GOTPAGE
Lloh55:
	ldr	x8, [x8, _VCE_VCPU_CACHE_SIZE2@GOTPAGEOFF]
Lloh56:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_WREG32
Lloh57:
	adrp	x8, _VCE_LMI_CTRL2@GOTPAGE
Lloh58:
	ldr	x8, [x8, _VCE_LMI_CTRL2@GOTPAGEOFF]
Lloh59:
	ldr	w0, [x8]
	mov	w1, #0
	mov	w2, #-257
	bl	_WREG32_P
Lloh60:
	adrp	x8, _VCE_SYS_INT_EN@GOTPAGE
Lloh61:
	ldr	x8, [x8, _VCE_SYS_INT_EN@GOTPAGEOFF]
Lloh62:
	ldr	w0, [x8]
Lloh63:
	adrp	x8, _VCE_SYS_INT_TRAP_INTERRUPT_EN@GOTPAGE
Lloh64:
	ldr	x8, [x8, _VCE_SYS_INT_TRAP_INTERRUPT_EN@GOTPAGEOFF]
Lloh65:
	ldr	w1, [x8]
	mvn	w2, w1
	bl	_WREG32_P
	mov	x0, x19
	bl	_vce_v2_0_init_cg
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_VCE_CLOCK_GATING_A,4,2         ; @VCE_CLOCK_GATING_A
	.comm	_VCE_UENC_CLOCK_GATING,4,2      ; @VCE_UENC_CLOCK_GATING
	.comm	_VCE_UENC_REG_CLOCK_GATING,4,2  ; @VCE_UENC_REG_CLOCK_GATING
	.comm	_VCE_CLOCK_GATING_B,4,2         ; @VCE_CLOCK_GATING_B
	.comm	_VCE_LMI_CTRL,4,2               ; @VCE_LMI_CTRL
	.comm	_VCE_LMI_CACHE_CTRL,4,2         ; @VCE_LMI_CACHE_CTRL
	.comm	_VCE_LMI_SWAP_CNTL,4,2          ; @VCE_LMI_SWAP_CNTL
	.comm	_VCE_LMI_SWAP_CNTL1,4,2         ; @VCE_LMI_SWAP_CNTL1
	.comm	_VCE_LMI_VM_CTRL,4,2            ; @VCE_LMI_VM_CTRL
	.comm	_VCE_LMI_VCPU_CACHE_40BIT_BAR,4,2 ; @VCE_LMI_VCPU_CACHE_40BIT_BAR
	.comm	_VCE_V2_0_FW_SIZE,4,2           ; @VCE_V2_0_FW_SIZE
	.comm	_VCE_VCPU_CACHE_OFFSET0,4,2     ; @VCE_VCPU_CACHE_OFFSET0
	.comm	_VCE_VCPU_CACHE_SIZE0,4,2       ; @VCE_VCPU_CACHE_SIZE0
	.comm	_VCE_V2_0_STACK_SIZE,4,2        ; @VCE_V2_0_STACK_SIZE
	.comm	_VCE_VCPU_CACHE_OFFSET1,4,2     ; @VCE_VCPU_CACHE_OFFSET1
	.comm	_VCE_VCPU_CACHE_SIZE1,4,2       ; @VCE_VCPU_CACHE_SIZE1
	.comm	_VCE_V2_0_DATA_SIZE,4,2         ; @VCE_V2_0_DATA_SIZE
	.comm	_VCE_VCPU_CACHE_OFFSET2,4,2     ; @VCE_VCPU_CACHE_OFFSET2
	.comm	_VCE_VCPU_CACHE_SIZE2,4,2       ; @VCE_VCPU_CACHE_SIZE2
	.comm	_VCE_LMI_CTRL2,4,2              ; @VCE_LMI_CTRL2
	.comm	_VCE_SYS_INT_EN,4,2             ; @VCE_SYS_INT_EN
	.comm	_VCE_SYS_INT_TRAP_INTERRUPT_EN,4,2 ; @VCE_SYS_INT_TRAP_INTERRUPT_EN
.subsections_via_symbols
