	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_pm_print_states
_radeon_pm_print_states:                ## @radeon_pm_print_states
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movl	8(%rdi), %esi
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
	cmpl	$0, 8(%r13)
	jle	LBB0_16
## %bb.1:
	xorl	%r15d, %r15d
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_15:                                ##   in Loop: Header=BB0_2 Depth=1
	incq	%r15
	movslq	8(%r13), %rax
	cmpq	%rax, %r15
	jge	LBB0_16
LBB0_2:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_11 Depth 2
	movq	16(%r13), %r12
	movq	_radeon_pm_state_type_name@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%r15, %r14
	shlq	$5, %r14
	movq	(%r12,%r14), %rcx
	movl	(%rax,%rcx,4), %edx
	leaq	L_.str.1(%rip), %rdi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
	movl	12(%r13), %eax
	cmpq	%rax, %r15
	jne	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	leaq	L_.str.2(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r13), %eax
	movq	_RADEON_IS_PCIE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_7
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	24(%r12,%r14), %esi
	leaq	L_.str.3(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
LBB0_7:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	_RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%r12,%r14)
	je	LBB0_9
## %bb.8:                               ##   in Loop: Header=BB0_2 Depth=1
	leaq	L_.str.4(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
LBB0_9:                                 ##   in Loop: Header=BB0_2 Depth=1
	movl	12(%r12,%r14), %esi
	leaq	L_.str.5(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
	cmpl	$0, 12(%r12,%r14)
	jle	LBB0_15
## %bb.10:                              ##   in Loop: Header=BB0_2 Depth=1
	addq	%r12, %r14
	addq	$12, %r14
	movl	$8, %ebx
	xorl	%r12d, %r12d
	jmp	LBB0_11
	.p2align	4, 0x90
LBB0_13:                                ##   in Loop: Header=BB0_11 Depth=2
	movl	-4(%rax,%rbx), %ecx
	movl	(%rax,%rbx), %r8d
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	leaq	L_.str.7(%rip), %rdi
	movl	%r12d, %esi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
LBB0_14:                                ##   in Loop: Header=BB0_11 Depth=2
	incq	%r12
	movslq	(%r14), %rax
	addq	$12, %rbx
	cmpq	%rax, %r12
	jge	LBB0_15
LBB0_11:                                ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	4(%r14), %rax
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	-8(%rax,%rbx), %edx
	addl	%edx, %edx
	leal	(%rdx,%rdx,4), %edx
	testl	%ecx, (%r13)
	je	LBB0_13
## %bb.12:                              ##   in Loop: Header=BB0_11 Depth=2
	leaq	L_.str.6(%rip), %rdi
	movl	%r12d, %esi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
	jmp	LBB0_14
LBB0_16:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"%d Power State(s)\n"

L_.str.1:                               ## @.str.1
	.asciz	"State %d: %s\n"

	.comm	_radeon_pm_state_type_name,8,3  ## @radeon_pm_state_type_name
L_.str.2:                               ## @.str.2
	.asciz	"\tDefault"

	.comm	_RADEON_IS_PCIE,4,2             ## @RADEON_IS_PCIE
	.comm	_RADEON_IS_IGP,4,2              ## @RADEON_IS_IGP
L_.str.3:                               ## @.str.3
	.asciz	"\t%d PCIE Lanes\n"

	.comm	_RADEON_PM_STATE_SINGLE_DISPLAY_ONLY,4,2 ## @RADEON_PM_STATE_SINGLE_DISPLAY_ONLY
L_.str.4:                               ## @.str.4
	.asciz	"\tSingle display only\n"

L_.str.5:                               ## @.str.5
	.asciz	"\t%d Clock Mode(s)\n"

L_.str.6:                               ## @.str.6
	.asciz	"\t\t%d e: %d\n"

L_.str.7:                               ## @.str.7
	.asciz	"\t\t%d e: %d\tm: %d\tv: %d\n"

	.no_dead_strip	_radeon_pm_print_states
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_pm_print_states
_radeon_pm_print_states:                ; @radeon_pm_print_states
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	w8, [x0, #8]
	str	x8, [sp]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
	ldr	w8, [x19, #8]
	cmp	w8, #1
	b.lt	LBB0_16
; %bb.1:
	mov	x27, #0
Lloh2:
	adrp	x22, l_.str.5@PAGE
Lloh3:
	add	x22, x22, l_.str.5@PAGEOFF
Lloh4:
	adrp	x25, _RADEON_IS_IGP@GOTPAGE
Lloh5:
	ldr	x25, [x25, _RADEON_IS_IGP@GOTPAGEOFF]
Lloh6:
	adrp	x23, l_.str.7@PAGE
Lloh7:
	add	x23, x23, l_.str.7@PAGEOFF
Lloh8:
	adrp	x24, l_.str.6@PAGE
Lloh9:
	add	x24, x24, l_.str.6@PAGEOFF
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x27, x27, #1
	ldrsw	x8, [x19, #8]
	cmp	x27, x8
	b.ge	LBB0_16
LBB0_3:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_14 Depth 2
	ldr	x20, [x19, #16]
Lloh10:
	adrp	x8, _radeon_pm_state_type_name@GOTPAGE
Lloh11:
	ldr	x8, [x8, _radeon_pm_state_type_name@GOTPAGEOFF]
Lloh12:
	ldr	x8, [x8]
	lsl	x9, x27, #5
	ldr	x9, [x20, x9]
	ldr	w8, [x8, x9, lsl #2]
	stp	x27, x8, [sp]
Lloh13:
	adrp	x0, l_.str.1@PAGE
Lloh14:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
	ldr	w8, [x19, #12]
	cmp	x27, x8
	b.ne	LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
Lloh15:
	adrp	x0, l_.str.2@PAGE
Lloh16:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
LBB0_5:                                 ;   in Loop: Header=BB0_3 Depth=1
	ldr	w8, [x19]
Lloh17:
	adrp	x9, _RADEON_IS_PCIE@GOTPAGE
Lloh18:
	ldr	x9, [x9, _RADEON_IS_PCIE@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_8
; %bb.6:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w9, [x25]
	tst	w9, w8
	b.ne	LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_3 Depth=1
	add	x8, x20, x27, lsl #5
	ldr	w8, [x8, #24]
	str	x8, [sp]
Lloh20:
	adrp	x0, l_.str.3@PAGE
Lloh21:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
LBB0_8:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x28, x20, x27, lsl #5
	ldr	w8, [x28, #8]
Lloh22:
	adrp	x9, _RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPAGE
Lloh23:
	ldr	x9, [x9, _RADEON_PM_STATE_SINGLE_DISPLAY_ONLY@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_3 Depth=1
Lloh25:
	adrp	x0, l_.str.4@PAGE
Lloh26:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
LBB0_10:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w8, [x28, #12]!
	str	x8, [sp]
	mov	x0, x22
	bl	_DRM_DEBUG_DRIVER
	ldr	w8, [x28]
	cmp	w8, #1
	b.lt	LBB0_2
; %bb.11:                               ;   in Loop: Header=BB0_3 Depth=1
	mov	x26, #0
	mov	x21, #0
	add	x8, x20, x27, lsl #5
	add	x20, x8, #16
	b	LBB0_14
LBB0_12:                                ;   in Loop: Header=BB0_14 Depth=2
	add	x9, x9, x26
	ldp	w10, w9, [x9, #4]
	add	w10, w10, w10, lsl #2
	lsl	w10, w10, #1
	stp	x10, x9, [sp, #16]
                                        ; kill: def $w8 killed $w8 killed $x8 def $x8
	stp	x21, x8, [sp]
	mov	x0, x23
LBB0_13:                                ;   in Loop: Header=BB0_14 Depth=2
	bl	_DRM_DEBUG_DRIVER
	add	x21, x21, #1
	ldrsw	x8, [x28]
	add	x26, x26, #12
	cmp	x21, x8
	b.ge	LBB0_2
LBB0_14:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	x9, [x20]
	ldr	w10, [x19]
	ldr	w11, [x25]
	ldr	w8, [x9, x26]
	add	w8, w8, w8, lsl #2
	lsl	w8, w8, #1
	tst	w11, w10
	b.eq	LBB0_12
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=2
	stp	x21, x8, [sp]
	mov	x0, x24
	b	LBB0_13
LBB0_16:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpAdd	Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"%d Power State(s)\n"

l_.str.1:                               ; @.str.1
	.asciz	"State %d: %s\n"

	.comm	_radeon_pm_state_type_name,8,3  ; @radeon_pm_state_type_name
l_.str.2:                               ; @.str.2
	.asciz	"\tDefault"

	.comm	_RADEON_IS_PCIE,4,2             ; @RADEON_IS_PCIE
	.comm	_RADEON_IS_IGP,4,2              ; @RADEON_IS_IGP
l_.str.3:                               ; @.str.3
	.asciz	"\t%d PCIE Lanes\n"

	.comm	_RADEON_PM_STATE_SINGLE_DISPLAY_ONLY,4,2 ; @RADEON_PM_STATE_SINGLE_DISPLAY_ONLY
l_.str.4:                               ; @.str.4
	.asciz	"\tSingle display only\n"

l_.str.5:                               ; @.str.5
	.asciz	"\t%d Clock Mode(s)\n"

l_.str.6:                               ; @.str.6
	.asciz	"\t\t%d e: %d\n"

l_.str.7:                               ; @.str.7
	.asciz	"\t\t%d e: %d\tm: %d\tv: %d\n"

	.no_dead_strip	_radeon_pm_print_states
.subsections_via_symbols
