	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rs780_set_engine_clock_wfc
_rs780_set_engine_clock_wfc:            ## @rs780_set_engine_clock_wfc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_FVTHROT_UTC0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTUTC0_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_UTC1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTUTC1_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_UTC2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTUTC2_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_UTC3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTUTC3_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_UTC4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTUTC4_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_DTC0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTDTC0_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_DTC1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTDTC1_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_DTC2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTDTC2_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_DTC3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTDTC3_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_DTC4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTDTC4_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_FVTHROT_UTC0,4,2               ## @FVTHROT_UTC0
	.comm	_RS780_FVTHROTUTC0_DFLT,4,2     ## @RS780_FVTHROTUTC0_DFLT
	.comm	_FVTHROT_UTC1,4,2               ## @FVTHROT_UTC1
	.comm	_RS780_FVTHROTUTC1_DFLT,4,2     ## @RS780_FVTHROTUTC1_DFLT
	.comm	_FVTHROT_UTC2,4,2               ## @FVTHROT_UTC2
	.comm	_RS780_FVTHROTUTC2_DFLT,4,2     ## @RS780_FVTHROTUTC2_DFLT
	.comm	_FVTHROT_UTC3,4,2               ## @FVTHROT_UTC3
	.comm	_RS780_FVTHROTUTC3_DFLT,4,2     ## @RS780_FVTHROTUTC3_DFLT
	.comm	_FVTHROT_UTC4,4,2               ## @FVTHROT_UTC4
	.comm	_RS780_FVTHROTUTC4_DFLT,4,2     ## @RS780_FVTHROTUTC4_DFLT
	.comm	_FVTHROT_DTC0,4,2               ## @FVTHROT_DTC0
	.comm	_RS780_FVTHROTDTC0_DFLT,4,2     ## @RS780_FVTHROTDTC0_DFLT
	.comm	_FVTHROT_DTC1,4,2               ## @FVTHROT_DTC1
	.comm	_RS780_FVTHROTDTC1_DFLT,4,2     ## @RS780_FVTHROTDTC1_DFLT
	.comm	_FVTHROT_DTC2,4,2               ## @FVTHROT_DTC2
	.comm	_RS780_FVTHROTDTC2_DFLT,4,2     ## @RS780_FVTHROTDTC2_DFLT
	.comm	_FVTHROT_DTC3,4,2               ## @FVTHROT_DTC3
	.comm	_RS780_FVTHROTDTC3_DFLT,4,2     ## @RS780_FVTHROTDTC3_DFLT
	.comm	_FVTHROT_DTC4,4,2               ## @FVTHROT_DTC4
	.comm	_RS780_FVTHROTDTC4_DFLT,4,2     ## @RS780_FVTHROTDTC4_DFLT
	.no_dead_strip	_rs780_set_engine_clock_wfc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rs780_set_engine_clock_wfc
_rs780_set_engine_clock_wfc:            ; @rs780_set_engine_clock_wfc
	.cfi_startproc
; %bb.0:
	stp	x29, x30, [sp, #-16]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 16
	mov	x29, sp
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
Lloh0:
	adrp	x8, _FVTHROT_UTC0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FVTHROT_UTC0@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _RS780_FVTHROTUTC0_DFLT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RS780_FVTHROTUTC0_DFLT@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_WREG32
Lloh6:
	adrp	x8, _FVTHROT_UTC1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _FVTHROT_UTC1@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
Lloh9:
	adrp	x8, _RS780_FVTHROTUTC1_DFLT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RS780_FVTHROTUTC1_DFLT@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	bl	_WREG32
Lloh12:
	adrp	x8, _FVTHROT_UTC2@GOTPAGE
Lloh13:
	ldr	x8, [x8, _FVTHROT_UTC2@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
Lloh15:
	adrp	x8, _RS780_FVTHROTUTC2_DFLT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RS780_FVTHROTUTC2_DFLT@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	bl	_WREG32
Lloh18:
	adrp	x8, _FVTHROT_UTC3@GOTPAGE
Lloh19:
	ldr	x8, [x8, _FVTHROT_UTC3@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
Lloh21:
	adrp	x8, _RS780_FVTHROTUTC3_DFLT@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RS780_FVTHROTUTC3_DFLT@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	bl	_WREG32
Lloh24:
	adrp	x8, _FVTHROT_UTC4@GOTPAGE
Lloh25:
	ldr	x8, [x8, _FVTHROT_UTC4@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
Lloh27:
	adrp	x8, _RS780_FVTHROTUTC4_DFLT@GOTPAGE
Lloh28:
	ldr	x8, [x8, _RS780_FVTHROTUTC4_DFLT@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	bl	_WREG32
Lloh30:
	adrp	x8, _FVTHROT_DTC0@GOTPAGE
Lloh31:
	ldr	x8, [x8, _FVTHROT_DTC0@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
Lloh33:
	adrp	x8, _RS780_FVTHROTDTC0_DFLT@GOTPAGE
Lloh34:
	ldr	x8, [x8, _RS780_FVTHROTDTC0_DFLT@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	bl	_WREG32
Lloh36:
	adrp	x8, _FVTHROT_DTC1@GOTPAGE
Lloh37:
	ldr	x8, [x8, _FVTHROT_DTC1@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
Lloh39:
	adrp	x8, _RS780_FVTHROTDTC1_DFLT@GOTPAGE
Lloh40:
	ldr	x8, [x8, _RS780_FVTHROTDTC1_DFLT@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
	bl	_WREG32
Lloh42:
	adrp	x8, _FVTHROT_DTC2@GOTPAGE
Lloh43:
	ldr	x8, [x8, _FVTHROT_DTC2@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
Lloh45:
	adrp	x8, _RS780_FVTHROTDTC2_DFLT@GOTPAGE
Lloh46:
	ldr	x8, [x8, _RS780_FVTHROTDTC2_DFLT@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	bl	_WREG32
Lloh48:
	adrp	x8, _FVTHROT_DTC3@GOTPAGE
Lloh49:
	ldr	x8, [x8, _FVTHROT_DTC3@GOTPAGEOFF]
Lloh50:
	ldr	w0, [x8]
Lloh51:
	adrp	x8, _RS780_FVTHROTDTC3_DFLT@GOTPAGE
Lloh52:
	ldr	x8, [x8, _RS780_FVTHROTDTC3_DFLT@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	bl	_WREG32
Lloh54:
	adrp	x8, _FVTHROT_DTC4@GOTPAGE
Lloh55:
	ldr	x8, [x8, _FVTHROT_DTC4@GOTPAGEOFF]
Lloh56:
	ldr	w0, [x8]
Lloh57:
	adrp	x8, _RS780_FVTHROTDTC4_DFLT@GOTPAGE
Lloh58:
	ldr	x8, [x8, _RS780_FVTHROTDTC4_DFLT@GOTPAGEOFF]
Lloh59:
	ldr	w1, [x8]
	ldp	x29, x30, [sp], #16             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_FVTHROT_UTC0,4,2               ; @FVTHROT_UTC0
	.comm	_RS780_FVTHROTUTC0_DFLT,4,2     ; @RS780_FVTHROTUTC0_DFLT
	.comm	_FVTHROT_UTC1,4,2               ; @FVTHROT_UTC1
	.comm	_RS780_FVTHROTUTC1_DFLT,4,2     ; @RS780_FVTHROTUTC1_DFLT
	.comm	_FVTHROT_UTC2,4,2               ; @FVTHROT_UTC2
	.comm	_RS780_FVTHROTUTC2_DFLT,4,2     ; @RS780_FVTHROTUTC2_DFLT
	.comm	_FVTHROT_UTC3,4,2               ; @FVTHROT_UTC3
	.comm	_RS780_FVTHROTUTC3_DFLT,4,2     ; @RS780_FVTHROTUTC3_DFLT
	.comm	_FVTHROT_UTC4,4,2               ; @FVTHROT_UTC4
	.comm	_RS780_FVTHROTUTC4_DFLT,4,2     ; @RS780_FVTHROTUTC4_DFLT
	.comm	_FVTHROT_DTC0,4,2               ; @FVTHROT_DTC0
	.comm	_RS780_FVTHROTDTC0_DFLT,4,2     ; @RS780_FVTHROTDTC0_DFLT
	.comm	_FVTHROT_DTC1,4,2               ; @FVTHROT_DTC1
	.comm	_RS780_FVTHROTDTC1_DFLT,4,2     ; @RS780_FVTHROTDTC1_DFLT
	.comm	_FVTHROT_DTC2,4,2               ; @FVTHROT_DTC2
	.comm	_RS780_FVTHROTDTC2_DFLT,4,2     ; @RS780_FVTHROTDTC2_DFLT
	.comm	_FVTHROT_DTC3,4,2               ; @FVTHROT_DTC3
	.comm	_RS780_FVTHROTDTC3_DFLT,4,2     ; @RS780_FVTHROTDTC3_DFLT
	.comm	_FVTHROT_DTC4,4,2               ; @FVTHROT_DTC4
	.comm	_RS780_FVTHROTDTC4_DFLT,4,2     ; @RS780_FVTHROTDTC4_DFLT
	.no_dead_strip	_rs780_set_engine_clock_wfc
.subsections_via_symbols
