	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_vm_bo_insert_map
_amdgpu_vm_bo_insert_map:               ## @amdgpu_vm_bo_insert_map
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movq	%rdi, %r12
	movq	8(%rsi), %r13
	movq	16(%rsi), %r15
	movq	%rsi, 8(%rdx)
	leaq	4(%rdx), %rdi
	addq	$24, %rsi
	callq	_list_add
	leaq	16(%r15), %rsi
	movq	%r14, %rdi
	callq	_amdgpu_vm_it_insert
	movq	_AMDGPU_PTE_PRT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r14)
	je	LBB0_2
## %bb.1:
	movq	%r12, %rdi
	callq	_amdgpu_vm_prt_get
LBB0_2:
	testq	%r13, %r13
	je	LBB0_6
## %bb.3:
	movq	(%r13), %rax
	movq	8(%r15), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_6
## %bb.4:
	cmpl	$0, 4(%rbx)
	jne	LBB0_6
## %bb.5:
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_list_move
LBB0_6:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_trace_amdgpu_vm_bo_map         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_PTE_PRT,4,2             ## @AMDGPU_PTE_PRT
	.no_dead_strip	_amdgpu_vm_bo_insert_map
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_vm_bo_insert_map
_amdgpu_vm_bo_insert_map:               ; @amdgpu_vm_bo_insert_map
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x20, x1
	mov	x22, x0
	ldp	x23, x21, [x1, #8]
	str	x1, [x2, #8]
	add	x0, x2, #4
	add	x1, x1, #24
	bl	_list_add
	add	x1, x21, #16
	mov	x0, x19
	bl	_amdgpu_vm_it_insert
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _AMDGPU_PTE_PRT@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMDGPU_PTE_PRT@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	mov	x0, x22
	bl	_amdgpu_vm_prt_get
LBB0_2:
	cbz	x23, LBB0_6
; %bb.3:
	ldr	x8, [x23]
	ldr	x9, [x21, #8]
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_6
; %bb.4:
	ldr	w8, [x20, #4]
	cbnz	w8, LBB0_6
; %bb.5:
	mov	x0, x20
	mov	x1, x21
	bl	_list_move
LBB0_6:
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_trace_amdgpu_vm_bo_map
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_PTE_PRT,4,2             ; @AMDGPU_PTE_PRT
	.no_dead_strip	_amdgpu_vm_bo_insert_map
.subsections_via_symbols
