	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function zynqmp_fpga_ops_write
_zynqmp_fpga_ops_write:                 ## @zynqmp_fpga_ops_write
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r13
	movq	%rdi, %r15
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_zynqmp_pm_get_eemi_ops
	movq	%rax, %r12
	movq	%rax, %rdi
	callq	_IS_ERR_OR_NULL
	testq	%rax, %rax
	je	LBB0_4
LBB0_1:
	movq	_ENXIO@GOTPCREL(%rip), %rax
LBB0_2:
	subl	(%rax), %ebx
LBB0_3:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	cmpq	$0, (%r12)
	je	LBB0_1
## %bb.5:
	movq	(%r15), %rbx
	movl	4(%rbx), %edi
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	-44(%rbp), %rdx
	movq	%r14, %rsi
	callq	_dma_alloc_coherent
	testq	%rax, %rax
	je	LBB0_9
## %bb.6:
	movq	%rax, %r15
	movq	%rax, %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	callq	_memcpy
	xorl	%eax, %eax
	callq	_wmb
	movq	_FPGA_MGR_PARTIAL_RECONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %r13
	andl	(%rbx), %edx
	je	LBB0_8
## %bb.7:
	movq	_XILINX_ZYNQMP_PM_FPGA_PARTIAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
LBB0_8:
	movl	-44(%rbp), %edi
	movq	%r14, %rsi
	callq	*(%r12)
	movl	%eax, %ebx
	movl	4(%r13), %edi
	movl	-44(%rbp), %ecx
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_dma_free_coherent
	jmp	LBB0_3
LBB0_9:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	jmp	LBB0_2
	.cfi_endproc
                                        ## -- End function
	.comm	_ENXIO,4,2                      ## @ENXIO
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_FPGA_MGR_PARTIAL_RECONFIG,4,2  ## @FPGA_MGR_PARTIAL_RECONFIG
	.comm	_XILINX_ZYNQMP_PM_FPGA_PARTIAL,4,2 ## @XILINX_ZYNQMP_PM_FPGA_PARTIAL
	.no_dead_strip	_zynqmp_fpga_ops_write
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function zynqmp_fpga_ops_write
_zynqmp_fpga_ops_write:                 ; @zynqmp_fpga_ops_write
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x21, x1
	mov	x22, x0
	bl	_zynqmp_pm_get_eemi_ops
	mov	x20, x0
	bl	_IS_ERR_OR_NULL
	cbz	x0, LBB0_4
LBB0_1:
Lloh0:
	adrp	x8, _ENXIO@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ENXIO@GOTPAGEOFF]
LBB0_2:
	ldr	w8, [x8]
	neg	w20, w8
LBB0_3:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_4:
	ldr	x8, [x20]
	cbz	x8, LBB0_1
; %bb.5:
	ldr	x23, [x22]
	ldr	w0, [x23, #4]
Lloh2:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh4:
	ldr	w3, [x8]
	add	x2, sp, #12
	mov	x1, x19
	bl	_dma_alloc_coherent
	cbz	x0, LBB0_7
; %bb.6:
	mov	x22, x0
	mov	x1, x21
	mov	x2, x19
	bl	_memcpy
	bl	_wmb
	ldr	w8, [x23]
Lloh5:
	adrp	x9, _FPGA_MGR_PARTIAL_RECONFIG@GOTPAGE
Lloh6:
	ldr	x9, [x9, _FPGA_MGR_PARTIAL_RECONFIG@GOTPAGEOFF]
Lloh7:
	adrp	x10, _XILINX_ZYNQMP_PM_FPGA_PARTIAL@GOTPAGE
Lloh8:
	ldr	x10, [x10, _XILINX_ZYNQMP_PM_FPGA_PARTIAL@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
Lloh10:
	ldr	w10, [x10]
	tst	w9, w8
	csel	w2, wzr, w10, eq
	ldr	x8, [x20]
	ldr	w0, [sp, #12]
	mov	x1, x19
	blr	x8
	mov	x20, x0
	ldr	w0, [x23, #4]
	ldr	w3, [sp, #12]
	mov	x1, x19
	mov	x2, x22
	bl	_dma_free_coherent
	b	LBB0_3
LBB0_7:
Lloh11:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh12:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
	b	LBB0_2
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh9
	.loh AdrpLdrGot	Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_ENXIO,4,2                      ; @ENXIO
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_FPGA_MGR_PARTIAL_RECONFIG,4,2  ; @FPGA_MGR_PARTIAL_RECONFIG
	.comm	_XILINX_ZYNQMP_PM_FPGA_PARTIAL,4,2 ; @XILINX_ZYNQMP_PM_FPGA_PARTIAL
	.no_dead_strip	_zynqmp_fpga_ops_write
.subsections_via_symbols
