	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tiadc_start_dma
_tiadc_start_dma:                       ## @tiadc_start_dma
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	callq	_iio_priv
	movq	%rax, %rbx
	movq	$0, 32(%rax)
	movq	_FIFO1_THRESHOLD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	incl	%edi
	movl	(%rbx), %esi
	callq	_rounddown
	decq	%rax
	movl	%eax, 8(%rbx)
	movq	_DMA_BUFFER_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, %edi
	shrl	$31, %edi
	addl	%ecx, %edi
	sarl	%edi
	shlq	$32, %rax
	movabsq	$4294967296, %rsi               ## imm = 0x100000000
	addq	%rax, %rsi
	shrq	$30, %rsi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_rounddown
	movl	%eax, 12(%rbx)
	movl	8(%rbx), %eax
	movl	16(%rbx), %edi
	incl	%eax
	leaq	28(%rbx), %rsi
	movl	%eax, 28(%rbx)
	callq	_dmaengine_slave_config
	movl	12(%rbx), %ecx
	movl	16(%rbx), %edi
	movl	24(%rbx), %esi
	leal	(%rcx,%rcx), %edx
	movq	_DMA_DEV_TO_MEM@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	_DMA_PREP_INTERRUPT@GOTPCREL(%rip), %rax
	movl	(%rax), %r9d
                                        ## kill: def $ecx killed $ecx killed $rcx
	callq	_dmaengine_prep_dma_cyclic
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	_tiadc_dma_rx_complete@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 8(%rax)
	movq	%r14, (%rax)
	movq	%rax, %rdi
	callq	_dmaengine_submit
	movl	%eax, 20(%rbx)
	movl	16(%rbx), %edi
	callq	_dma_async_issue_pending
	movq	_REG_FIFO1THR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	8(%rbx), %edx
	movq	%rbx, %rdi
	callq	_tiadc_writel
	movq	_REG_DMA1REQ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	8(%rbx), %edx
	movq	%rbx, %rdi
	callq	_tiadc_writel
	movq	_REG_DMAENABLE_SET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DMA_FIFO1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_tiadc_writel
	xorl	%eax, %eax
	jmp	LBB0_3
LBB0_1:
	movq	_EBUSY@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_3:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_FIFO1_THRESHOLD,4,2            ## @FIFO1_THRESHOLD
	.comm	_DMA_BUFFER_SIZE,4,2            ## @DMA_BUFFER_SIZE
	.comm	_DMA_DEV_TO_MEM,4,2             ## @DMA_DEV_TO_MEM
	.comm	_DMA_PREP_INTERRUPT,4,2         ## @DMA_PREP_INTERRUPT
	.comm	_EBUSY,4,2                      ## @EBUSY
	.comm	_tiadc_dma_rx_complete,4,2      ## @tiadc_dma_rx_complete
	.comm	_REG_FIFO1THR,4,2               ## @REG_FIFO1THR
	.comm	_REG_DMA1REQ,4,2                ## @REG_DMA1REQ
	.comm	_REG_DMAENABLE_SET,4,2          ## @REG_DMAENABLE_SET
	.comm	_DMA_FIFO1,4,2                  ## @DMA_FIFO1
	.no_dead_strip	_tiadc_start_dma
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tiadc_start_dma
_tiadc_start_dma:                       ; @tiadc_start_dma
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x0
	bl	_iio_priv
	mov	x19, x0
	str	xzr, [x0, #32]
Lloh0:
	adrp	x8, _FIFO1_THRESHOLD@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FIFO1_THRESHOLD@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	add	w0, w8, #1
	ldr	w1, [x19]
	bl	_rounddown
	sub	x8, x0, #1
	str	w8, [x19, #8]
Lloh3:
	adrp	x9, _DMA_BUFFER_SIZE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _DMA_BUFFER_SIZE@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	cmp	w9, #0
	cinc	w9, w9, lt
	asr	w0, w9, #1
	mov	x9, #4294967296
	add	x8, x9, x8, lsl #32
	lsr	x1, x8, #30
                                        ; kill: def $w1 killed $w1 killed $x1
	bl	_rounddown
	str	w0, [x19, #12]
	ldr	w8, [x19, #8]
	add	w8, w8, #1
	mov	x1, x19
	str	w8, [x1, #28]!
	ldr	w0, [x19, #16]
	bl	_dmaengine_slave_config
	ldr	w1, [x19, #24]
	ldp	w3, w0, [x19, #12]
	lsl	w2, w3, #1
Lloh6:
	adrp	x8, _DMA_DEV_TO_MEM@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DMA_DEV_TO_MEM@GOTPAGEOFF]
Lloh8:
	ldr	w4, [x8]
Lloh9:
	adrp	x8, _DMA_PREP_INTERRUPT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DMA_PREP_INTERRUPT@GOTPAGEOFF]
Lloh11:
	ldr	w5, [x8]
	bl	_dmaengine_prep_dma_cyclic
	cbz	x0, LBB0_2
; %bb.1:
Lloh12:
	adrp	x8, _tiadc_dma_rx_complete@GOTPAGE
Lloh13:
	ldr	x8, [x8, _tiadc_dma_rx_complete@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	str	w8, [x0, #8]
	str	x20, [x0]
	bl	_dmaengine_submit
	str	w0, [x19, #20]
	ldr	w0, [x19, #16]
	bl	_dma_async_issue_pending
Lloh15:
	adrp	x8, _REG_FIFO1THR@GOTPAGE
Lloh16:
	ldr	x8, [x8, _REG_FIFO1THR@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	ldr	w2, [x19, #8]
	mov	x0, x19
	bl	_tiadc_writel
Lloh18:
	adrp	x8, _REG_DMA1REQ@GOTPAGE
Lloh19:
	ldr	x8, [x8, _REG_DMA1REQ@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	ldr	w2, [x19, #8]
	mov	x0, x19
	bl	_tiadc_writel
Lloh21:
	adrp	x8, _REG_DMAENABLE_SET@GOTPAGE
Lloh22:
	ldr	x8, [x8, _REG_DMAENABLE_SET@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
Lloh24:
	adrp	x8, _DMA_FIFO1@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DMA_FIFO1@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_tiadc_writel
	mov	w0, #0
	b	LBB0_3
LBB0_2:
Lloh27:
	adrp	x8, _EBUSY@GOTPAGE
Lloh28:
	ldr	x8, [x8, _EBUSY@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_FIFO1_THRESHOLD,4,2            ; @FIFO1_THRESHOLD
	.comm	_DMA_BUFFER_SIZE,4,2            ; @DMA_BUFFER_SIZE
	.comm	_DMA_DEV_TO_MEM,4,2             ; @DMA_DEV_TO_MEM
	.comm	_DMA_PREP_INTERRUPT,4,2         ; @DMA_PREP_INTERRUPT
	.comm	_EBUSY,4,2                      ; @EBUSY
	.comm	_tiadc_dma_rx_complete,4,2      ; @tiadc_dma_rx_complete
	.comm	_REG_FIFO1THR,4,2               ; @REG_FIFO1THR
	.comm	_REG_DMA1REQ,4,2                ; @REG_DMA1REQ
	.comm	_REG_DMAENABLE_SET,4,2          ; @REG_DMAENABLE_SET
	.comm	_DMA_FIFO1,4,2                  ; @DMA_FIFO1
	.no_dead_strip	_tiadc_start_dma
.subsections_via_symbols
