	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vega20_force_clk_levels
_vega20_force_clk_levels:               ## @vega20_force_clk_levels
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	8(%rdi), %rax
	movq	_AMD_DPM_FORCED_LEVEL_MANUAL@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_1
## %bb.2:
	movq	%rdx, %rbx
	movl	%esi, %r13d
	movq	%rdi, %r14
	callq	_mutex_lock
	xorl	%r12d, %r12d
	testq	%rbx, %rbx
	je	LBB0_3
## %bb.4:
	movq	%rbx, %rdi
	callq	_ffs
	movq	%rax, %r15
	decq	%r15
	movq	%rbx, %rdi
	callq	_fls
	decq	%rax
	jmp	LBB0_5
LBB0_1:
	leaq	L_.str(%rip), %rdi
	callq	_pr_info
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r12d, %r12d
	subl	(%rax), %r12d
	jmp	LBB0_31
LBB0_3:
	xorl	%r15d, %r15d
	xorl	%eax, %eax
LBB0_5:
	addl	$-128, %r13d
	cmpl	$5, %r13d
	ja	LBB0_30
## %bb.6:
	movq	16(%r14), %rcx
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%r13,4), %rsi
	addq	%rdx, %rsi
	jmpq	*%rsi
LBB0_17:
	movq	64(%rcx), %rdx
	cmpq	%rdx, %rax
	jae	LBB0_8
## %bb.18:
	movq	72(%rcx), %rdx
	movl	(%rdx,%r15,4), %esi
	movl	%esi, 88(%rcx)
	movl	(%rdx,%rax,4), %eax
	movl	%eax, 84(%rcx)
	movq	_FEATURE_DPM_SOCCLK_MASK@GOTPCREL(%rip), %r15
	jmp	LBB0_11
LBB0_7:
	movq	128(%rcx), %rdx
	cmpq	%rdx, %rax
	jae	LBB0_8
## %bb.10:
	movq	136(%rcx), %rdx
	movl	(%rdx,%r15,4), %esi
	movl	%esi, 152(%rcx)
	movl	(%rdx,%rax,4), %eax
	movl	%eax, 148(%rcx)
	movq	_FEATURE_DPM_GFXCLK_MASK@GOTPCREL(%rip), %r15
	jmp	LBB0_11
LBB0_24:
	movq	_NUM_LINK_LEVELS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	cmpq	%rcx, %r15
	jae	LBB0_26
## %bb.25:
	cmpq	%rcx, %rax
	jae	LBB0_26
## %bb.27:
	movq	_SMU_MSG_SetMinLinkDpmByIndex@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	callq	_smu_send_smc_msg_with_param
	testl	%eax, %eax
	je	LBB0_30
## %bb.28:
	movl	%eax, %ebx
	leaq	L_.str.4(%rip), %rdi
	jmp	LBB0_29
LBB0_15:
	movq	96(%rcx), %rdx
	cmpq	%rdx, %rax
	jae	LBB0_8
## %bb.16:
	movq	104(%rcx), %rdx
	movl	(%rdx,%r15,4), %esi
	movl	%esi, 120(%rcx)
	movl	(%rdx,%rax,4), %eax
	movl	%eax, 116(%rcx)
	movq	_FEATURE_DPM_UCLK_MASK@GOTPCREL(%rip), %r15
	jmp	LBB0_11
LBB0_19:
	movq	32(%rcx), %rdx
	cmpq	%rdx, %rax
	jae	LBB0_8
## %bb.20:
	movq	40(%rcx), %rdx
	movl	(%rdx,%r15,4), %esi
	movl	%esi, 56(%rcx)
	movl	(%rdx,%rax,4), %eax
	movl	%eax, 52(%rcx)
	movq	_FEATURE_DPM_FCLK_MASK@GOTPCREL(%rip), %r15
LBB0_11:
	movl	(%r15), %edx
	xorl	%r12d, %r12d
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_vega20_upload_dpm_level
	testl	%eax, %eax
	je	LBB0_13
LBB0_12:
	movl	%eax, %ebx
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_29
LBB0_8:
	decq	%rdx
	leaq	L_.str.1(%rip), %rdi
	xorl	%r12d, %r12d
	movq	%rax, %rsi
LBB0_9:
	xorl	%eax, %eax
	callq	_pr_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %r12d
	jmp	LBB0_30
LBB0_21:
	movq	(%rcx), %rdx
	cmpq	%rdx, %r15
	jae	LBB0_22
## %bb.23:
	movq	8(%rcx), %rax
	movl	(%rax,%r15,4), %eax
	movl	%eax, 16(%rcx)
	movq	_FEATURE_DPM_DCEFCLK_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%r12d, %r12d
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_vega20_upload_dpm_level
	testl	%eax, %eax
	jne	LBB0_12
	jmp	LBB0_30
LBB0_13:
	movl	(%r15), %edx
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_vega20_upload_dpm_level
	testl	%eax, %eax
	je	LBB0_30
## %bb.14:
	movl	%eax, %ebx
	leaq	L_.str.3(%rip), %rdi
LBB0_29:
	xorl	%eax, %eax
	callq	_pr_err
	movl	%ebx, %r12d
LBB0_30:
	movq	%r14, %rdi
	callq	_mutex_unlock
LBB0_31:
	movl	%r12d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_26:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r12d, %r12d
	subl	(%rax), %r12d
	jmp	LBB0_30
LBB0_22:
	decq	%rdx
	leaq	L_.str.1(%rip), %rdi
	xorl	%r12d, %r12d
	movq	%r15, %rsi
	jmp	LBB0_9
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_17, LBB0_17-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_24, LBB0_24-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_19, LBB0_19-LJTI0_0
.set L0_0_set_21, LBB0_21-LJTI0_0
LJTI0_0:
	.long	L0_0_set_17
	.long	L0_0_set_7
	.long	L0_0_set_24
	.long	L0_0_set_15
	.long	L0_0_set_19
	.long	L0_0_set_21
	.end_data_region
                                        ## -- End function
	.comm	_AMD_DPM_FORCED_LEVEL_MANUAL,8,3 ## @AMD_DPM_FORCED_LEVEL_MANUAL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"force clock level is for dpm manual mode only.\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
L_.str.1:                               ## @.str.1
	.asciz	"Clock level specified %d is over max allowed %d\n"

	.comm	_FEATURE_DPM_GFXCLK_MASK,4,2    ## @FEATURE_DPM_GFXCLK_MASK
L_.str.2:                               ## @.str.2
	.asciz	"Failed to upload boot level to lowest!\n"

L_.str.3:                               ## @.str.3
	.asciz	"Failed to upload dpm max level to highest!\n"

	.comm	_FEATURE_DPM_UCLK_MASK,4,2      ## @FEATURE_DPM_UCLK_MASK
	.comm	_FEATURE_DPM_SOCCLK_MASK,4,2    ## @FEATURE_DPM_SOCCLK_MASK
	.comm	_FEATURE_DPM_FCLK_MASK,4,2      ## @FEATURE_DPM_FCLK_MASK
	.comm	_FEATURE_DPM_DCEFCLK_MASK,4,2   ## @FEATURE_DPM_DCEFCLK_MASK
	.comm	_NUM_LINK_LEVELS,8,3            ## @NUM_LINK_LEVELS
	.comm	_SMU_MSG_SetMinLinkDpmByIndex,4,2 ## @SMU_MSG_SetMinLinkDpmByIndex
L_.str.4:                               ## @.str.4
	.asciz	"Failed to set min link dpm level!\n"

	.no_dead_strip	_vega20_force_clk_levels
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vega20_force_clk_levels
_vega20_force_clk_levels:               ; @vega20_force_clk_levels
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x8, [x0, #8]
Lloh0:
	adrp	x9, _AMD_DPM_FORCED_LEVEL_MANUAL@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMD_DPM_FORCED_LEVEL_MANUAL@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.1:
	mov	x22, x2
	mov	x21, x1
	mov	x19, x0
	bl	_mutex_lock
	cbz	x22, LBB0_4
; %bb.2:
	mov	x0, x22
	bl	_ffs
	sub	x20, x0, #1
	mov	x0, x22
	bl	_fls
	sub	x8, x0, #1
	b	LBB0_5
LBB0_3:
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_info
Lloh5:
	adrp	x8, _EINVAL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_31
LBB0_4:
	mov	x20, #0
	mov	x8, #0
LBB0_5:
	sub	w10, w21, #128
	cmp	w10, #5
	b.hi	LBB0_9
; %bb.6:
	ldr	x9, [x19, #16]
Lloh8:
	adrp	x11, lJTI0_0@PAGE
Lloh9:
	add	x11, x11, lJTI0_0@PAGEOFF
	adr	x12, LBB0_7
	ldrb	w13, [x11, x10]
	add	x12, x12, x13, lsl #2
	br	x12
LBB0_7:
	ldr	x10, [x9, #64]
	cmp	x8, x10
	b.hs	LBB0_22
; %bb.8:
	ldr	x10, [x9, #72]
	ldr	w11, [x10, x20, lsl #2]
	ldr	w8, [x10, x8, lsl #2]
	stp	w8, w11, [x9, #84]
Lloh10:
	adrp	x21, _FEATURE_DPM_SOCCLK_MASK@GOTPAGE
Lloh11:
	ldr	x21, [x21, _FEATURE_DPM_SOCCLK_MASK@GOTPAGEOFF]
	b	LBB0_19
LBB0_9:
	mov	w20, #0
	b	LBB0_30
LBB0_10:
	ldr	x10, [x9, #128]
	cmp	x8, x10
	b.hs	LBB0_22
; %bb.11:
	ldr	x10, [x9, #136]
	ldr	w11, [x10, x20, lsl #2]
	ldr	w8, [x10, x8, lsl #2]
	stp	w8, w11, [x9, #148]
Lloh12:
	adrp	x21, _FEATURE_DPM_GFXCLK_MASK@GOTPAGE
Lloh13:
	ldr	x21, [x21, _FEATURE_DPM_GFXCLK_MASK@GOTPAGEOFF]
	b	LBB0_19
LBB0_12:
Lloh14:
	adrp	x9, _NUM_LINK_LEVELS@GOTPAGE
Lloh15:
	ldr	x9, [x9, _NUM_LINK_LEVELS@GOTPAGEOFF]
Lloh16:
	ldr	x9, [x9]
	cmp	x20, x9
	ccmp	x8, x9, #2, lo
	b.hs	LBB0_24
; %bb.13:
Lloh17:
	adrp	x8, _SMU_MSG_SetMinLinkDpmByIndex@GOTPAGE
Lloh18:
	ldr	x8, [x8, _SMU_MSG_SetMinLinkDpmByIndex@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_smu_send_smc_msg_with_param
	mov	x20, x0
	cbz	w0, LBB0_30
; %bb.14:
Lloh20:
	adrp	x0, l_.str.4@PAGE
Lloh21:
	add	x0, x0, l_.str.4@PAGEOFF
	b	LBB0_29
LBB0_15:
	ldr	x10, [x9, #96]
	cmp	x8, x10
	b.hs	LBB0_22
; %bb.16:
	ldr	x10, [x9, #104]
	ldr	w11, [x10, x20, lsl #2]
	ldr	w8, [x10, x8, lsl #2]
	stp	w8, w11, [x9, #116]
Lloh22:
	adrp	x21, _FEATURE_DPM_UCLK_MASK@GOTPAGE
Lloh23:
	ldr	x21, [x21, _FEATURE_DPM_UCLK_MASK@GOTPAGEOFF]
	b	LBB0_19
LBB0_17:
	ldr	x10, [x9, #32]
	cmp	x8, x10
	b.hs	LBB0_22
; %bb.18:
	ldr	x10, [x9, #40]
	ldr	w11, [x10, x20, lsl #2]
	ldr	w8, [x10, x8, lsl #2]
	stp	w8, w11, [x9, #52]
Lloh24:
	adrp	x21, _FEATURE_DPM_FCLK_MASK@GOTPAGE
Lloh25:
	ldr	x21, [x21, _FEATURE_DPM_FCLK_MASK@GOTPAGEOFF]
LBB0_19:
	ldr	w2, [x21]
	mov	x0, x19
	mov	w1, #0
	bl	_vega20_upload_dpm_level
	cbz	w0, LBB0_27
; %bb.20:
	mov	x20, x0
LBB0_21:
Lloh26:
	adrp	x0, l_.str.2@PAGE
Lloh27:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_29
LBB0_22:
	sub	x9, x10, #1
	stp	x8, x9, [sp]
LBB0_23:
Lloh28:
	adrp	x0, l_.str.1@PAGE
Lloh29:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_pr_err
LBB0_24:
Lloh30:
	adrp	x8, _EINVAL@GOTPAGE
Lloh31:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_30
LBB0_25:
	ldr	x8, [x9]
	cmp	x20, x8
	b.hs	LBB0_32
; %bb.26:
	ldr	x8, [x9, #8]
	ldr	w8, [x8, x20, lsl #2]
	str	w8, [x9, #16]
Lloh33:
	adrp	x8, _FEATURE_DPM_DCEFCLK_MASK@GOTPAGE
Lloh34:
	ldr	x8, [x8, _FEATURE_DPM_DCEFCLK_MASK@GOTPAGEOFF]
Lloh35:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_vega20_upload_dpm_level
	mov	x20, x0
	cbnz	w0, LBB0_21
	b	LBB0_30
LBB0_27:
	ldr	w2, [x21]
	mov	x0, x19
	mov	w1, #1
	bl	_vega20_upload_dpm_level
	mov	x20, x0
	cbz	w0, LBB0_30
; %bb.28:
Lloh36:
	adrp	x0, l_.str.3@PAGE
Lloh37:
	add	x0, x0, l_.str.3@PAGEOFF
LBB0_29:
	bl	_pr_err
LBB0_30:
	mov	x0, x19
	bl	_mutex_unlock
LBB0_31:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_32:
	sub	x8, x8, #1
	stp	x20, x8, [sp]
	b	LBB0_23
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpAdd	Lloh36, Lloh37
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_10-LBB0_7)>>2
	.byte	(LBB0_12-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_17-LBB0_7)>>2
	.byte	(LBB0_25-LBB0_7)>>2
                                        ; -- End function
	.comm	_AMD_DPM_FORCED_LEVEL_MANUAL,8,3 ; @AMD_DPM_FORCED_LEVEL_MANUAL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"force clock level is for dpm manual mode only.\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
l_.str.1:                               ; @.str.1
	.asciz	"Clock level specified %d is over max allowed %d\n"

	.comm	_FEATURE_DPM_GFXCLK_MASK,4,2    ; @FEATURE_DPM_GFXCLK_MASK
l_.str.2:                               ; @.str.2
	.asciz	"Failed to upload boot level to lowest!\n"

l_.str.3:                               ; @.str.3
	.asciz	"Failed to upload dpm max level to highest!\n"

	.comm	_FEATURE_DPM_UCLK_MASK,4,2      ; @FEATURE_DPM_UCLK_MASK
	.comm	_FEATURE_DPM_SOCCLK_MASK,4,2    ; @FEATURE_DPM_SOCCLK_MASK
	.comm	_FEATURE_DPM_FCLK_MASK,4,2      ; @FEATURE_DPM_FCLK_MASK
	.comm	_FEATURE_DPM_DCEFCLK_MASK,4,2   ; @FEATURE_DPM_DCEFCLK_MASK
	.comm	_NUM_LINK_LEVELS,8,3            ; @NUM_LINK_LEVELS
	.comm	_SMU_MSG_SetMinLinkDpmByIndex,4,2 ; @SMU_MSG_SetMinLinkDpmByIndex
l_.str.4:                               ; @.str.4
	.asciz	"Failed to set min link dpm level!\n"

	.no_dead_strip	_vega20_force_clk_levels
.subsections_via_symbols
