	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v9_0_rlc_init
_gfx_v9_0_rlc_init:                     ## @gfx_v9_0_rlc_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movq	_gfx9_cs_data@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 16(%rdi)
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%r14, %rdi
	callq	_amdgpu_gfx_rlc_init_csb
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
LBB0_2:
	movl	(%r14), %eax
	cmpl	$129, %eax
	je	LBB0_4
## %bb.3:
	movq	_CHIP_RENOIR@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_6
LBB0_4:
	movl	$1920, %edi                     ## imm = 0x780
	movl	$2048, %esi                     ## imm = 0x800
	callq	_ALIGN
	addq	$65536, %rax                    ## imm = 0x10000
	movq	%rax, 8(%r14)
	movq	%r14, %rdi
	callq	_amdgpu_gfx_rlc_init_cpt
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
## %bb.5:
	movl	(%r14), %eax
LBB0_6:
	xorl	%ebx, %ebx
	cmpl	$128, %eax
	je	LBB0_9
## %bb.7:
	cmpl	$129, %eax
	jne	LBB0_10
## %bb.8:
	movq	%r14, %rdi
	callq	_gfx_v9_0_init_lbpw
	jmp	LBB0_10
LBB0_9:
	movq	%r14, %rdi
	callq	_gfx_v9_4_init_lbpw
LBB0_10:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_gfx9_cs_data,8,3               ## @gfx9_cs_data
	.comm	_CHIP_RENOIR,4,2                ## @CHIP_RENOIR
	.no_dead_strip	_gfx_v9_0_rlc_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v9_0_rlc_init
_gfx_v9_0_rlc_init:                     ; @gfx_v9_0_rlc_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _gfx9_cs_data@GOTPAGE
Lloh1:
	ldr	x8, [x8, _gfx9_cs_data@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [x0, #16]
	cbz	x8, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_amdgpu_gfx_rlc_init_csb
	cbnz	w0, LBB0_10
LBB0_2:
	ldr	w8, [x19]
Lloh3:
	adrp	x9, _CHIP_RENOIR@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CHIP_RENOIR@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	cmp	w8, #129
	ccmp	w8, w9, #4, ne
	b.ne	LBB0_5
; %bb.3:
	mov	w0, #1920
	mov	w1, #2048
	bl	_ALIGN
	add	x8, x0, #16, lsl #12            ; =65536
	str	x8, [x19, #8]
	mov	x0, x19
	bl	_amdgpu_gfx_rlc_init_cpt
	cbnz	w0, LBB0_10
; %bb.4:
	ldr	w8, [x19]
LBB0_5:
	cmp	w8, #128
	b.eq	LBB0_8
; %bb.6:
	cmp	w8, #129
	b.ne	LBB0_9
; %bb.7:
	mov	x0, x19
	bl	_gfx_v9_0_init_lbpw
	b	LBB0_9
LBB0_8:
	mov	x0, x19
	bl	_gfx_v9_4_init_lbpw
LBB0_9:
	mov	w0, #0
LBB0_10:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_gfx9_cs_data,8,3               ; @gfx9_cs_data
	.comm	_CHIP_RENOIR,4,2                ; @CHIP_RENOIR
	.no_dead_strip	_gfx_v9_0_rlc_init
.subsections_via_symbols
