	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function kv_dpm_init
LCPI0_0:
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.long	0                               ## 0x0
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_kv_dpm_init:                           ## @kv_dpm_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$112, %edi
	callq	_kzalloc
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	%rax, %rbx
	movq	%rax, 16(%r14)
	movq	%r14, %rdi
	callq	_amdgpu_get_platform_caps
	testl	%eax, %eax
	jne	LBB0_10
## %bb.3:
	movq	%r14, %rdi
	callq	_amdgpu_parse_extended_power_table
	testl	%eax, %eax
	jne	LBB0_10
## %bb.4:
	movq	_SUMO_MAX_HARDWARE_POWERLEVELS@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	jle	LBB0_7
## %bb.5:
	movq	104(%rbx), %rcx
	xorl	%edx, %edx
	movq	_TRINITY_AT_DFLT@GOTPCREL(%rip), %rsi
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%rsi), %edi
	movl	%edi, (%rcx,%rdx,4)
	incq	%rdx
	movslq	(%rax), %rdi
	cmpq	%rdi, %rdx
	jl	LBB0_6
LBB0_7:
	movq	_SMC_RAM_END@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 96(%rbx)
	movaps	LCPI0_0(%rip), %xmm0            ## xmm0 = [1,1,1,0]
	movups	%xmm0, (%rbx)
	movq	_PP_SCLK_DEEP_SLEEP_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	andl	8(%r14), %eax
	setne	%cl
	movl	%ecx, 32(%rbx)
	movq	$1, 36(%rbx)
	movq	_amdgpu_bapm@GOTPCREL(%rip), %rax
	xorl	%ecx, %ecx
	cmpq	$0, (%rax)
	setne	%cl
	movl	%ecx, 44(%rbx)
	movq	$0, 88(%rbx)
	movq	$0, 48(%rbx)
	movl	(%r14), %eax
	movq	_AMD_PG_SUPPORT_UVD@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	setne	%dl
	movl	%edx, 56(%rbx)
	movl	$1, 60(%rbx)
	movq	_AMD_PG_SUPPORT_VCE@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	setne	%dl
	movl	%edx, 64(%rbx)
	movq	_AMD_PG_SUPPORT_SAMU@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	setne	%dl
	movl	%edx, 68(%rbx)
	movq	_AMD_PG_SUPPORT_ACP@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	andl	(%rcx), %eax
	setne	%dl
	movl	%edx, 72(%rbx)
	movl	$0, 76(%rbx)
	movq	%r14, %rdi
	callq	_kv_parse_sys_info_table
	testl	%eax, %eax
	jne	LBB0_10
## %bb.8:
	movq	%r14, %rdi
	callq	_kv_patch_voltage_values
	movq	%r14, %rdi
	callq	_kv_construct_boot_state
	movq	%r14, %rdi
	callq	_kv_parse_power_table
	testl	%eax, %eax
	jne	LBB0_10
## %bb.9:
	movl	$1, 80(%rbx)
	xorl	%eax, %eax
	jmp	LBB0_10
LBB0_1:
	movq	_ENOMEM@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_10:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_SUMO_MAX_HARDWARE_POWERLEVELS,4,2 ## @SUMO_MAX_HARDWARE_POWERLEVELS
	.comm	_TRINITY_AT_DFLT,4,2            ## @TRINITY_AT_DFLT
	.comm	_SMC_RAM_END,4,2                ## @SMC_RAM_END
	.comm	_PP_SCLK_DEEP_SLEEP_MASK,4,2    ## @PP_SCLK_DEEP_SLEEP_MASK
	.comm	_amdgpu_bapm,8,3                ## @amdgpu_bapm
	.comm	_AMD_PG_SUPPORT_UVD,4,2         ## @AMD_PG_SUPPORT_UVD
	.comm	_AMD_PG_SUPPORT_VCE,4,2         ## @AMD_PG_SUPPORT_VCE
	.comm	_AMD_PG_SUPPORT_SAMU,4,2        ## @AMD_PG_SUPPORT_SAMU
	.comm	_AMD_PG_SUPPORT_ACP,4,2         ## @AMD_PG_SUPPORT_ACP
	.no_dead_strip	_kv_dpm_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ; -- Begin function kv_dpm_init
lCPI0_0:
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.long	1                               ; 0x1
	.long	0                               ; 0x0
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3
lCPI0_1:
	.long	1                               ; 0x1
	.long	0                               ; 0x0
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_kv_dpm_init:                           ; @kv_dpm_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x0
Lloh0:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	w0, #112
	bl	_kzalloc
	cbz	x0, LBB0_9
; %bb.1:
	mov	x19, x0
	str	x0, [x20, #16]
	mov	x0, x20
	bl	_amdgpu_get_platform_caps
	cbnz	w0, LBB0_10
; %bb.2:
	mov	x0, x20
	bl	_amdgpu_parse_extended_power_table
	cbnz	w0, LBB0_10
; %bb.3:
Lloh3:
	adrp	x8, _SUMO_MAX_HARDWARE_POWERLEVELS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SUMO_MAX_HARDWARE_POWERLEVELS@GOTPAGEOFF]
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_6
; %bb.4:
	mov	x9, #0
	ldr	x10, [x19, #104]
Lloh5:
	adrp	x11, _TRINITY_AT_DFLT@GOTPAGE
Lloh6:
	ldr	x11, [x11, _TRINITY_AT_DFLT@GOTPAGEOFF]
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w12, [x11]
	str	w12, [x10, x9, lsl #2]
	add	x9, x9, #1
	ldrsw	x12, [x8]
	cmp	x9, x12
	b.lt	LBB0_5
LBB0_6:
Lloh7:
	adrp	x8, _SMC_RAM_END@GOTPAGE
Lloh8:
	ldr	x8, [x8, _SMC_RAM_END@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	str	w8, [x19, #96]
Lloh10:
	adrp	x8, lCPI0_0@PAGE
Lloh11:
	ldr	q0, [x8, lCPI0_0@PAGEOFF]
	str	q0, [x19]
	ldr	w8, [x20, #8]
Lloh12:
	adrp	x9, _PP_SCLK_DEEP_SLEEP_MASK@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PP_SCLK_DEEP_SLEEP_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w8, ne
	str	w8, [x19, #32]
Lloh15:
	adrp	x8, lCPI0_1@PAGE
Lloh16:
	ldr	d0, [x8, lCPI0_1@PAGEOFF]
Lloh17:
	adrp	x8, _amdgpu_bapm@GOTPAGE
Lloh18:
	ldr	x8, [x8, _amdgpu_bapm@GOTPAGEOFF]
	stur	d0, [x19, #36]
Lloh19:
	ldr	x8, [x8]
	cmp	x8, #0
	cset	w8, ne
	str	w8, [x19, #44]
	str	xzr, [x19, #48]
	ldr	w8, [x20]
Lloh20:
	adrp	x9, _AMD_PG_SUPPORT_UVD@GOTPAGE
Lloh21:
	ldr	x9, [x9, _AMD_PG_SUPPORT_UVD@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w9, ne
	mov	w10, #1
	stp	w9, w10, [x19, #56]
Lloh23:
	adrp	x9, _AMD_PG_SUPPORT_VCE@GOTPAGE
Lloh24:
	ldr	x9, [x9, _AMD_PG_SUPPORT_VCE@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w9, ne
Lloh26:
	adrp	x10, _AMD_PG_SUPPORT_SAMU@GOTPAGE
Lloh27:
	ldr	x10, [x10, _AMD_PG_SUPPORT_SAMU@GOTPAGEOFF]
Lloh28:
	ldr	w10, [x10]
	tst	w10, w8
	cset	w10, ne
	stp	w9, w10, [x19, #64]
Lloh29:
	adrp	x9, _AMD_PG_SUPPORT_ACP@GOTPAGE
Lloh30:
	ldr	x9, [x9, _AMD_PG_SUPPORT_ACP@GOTPAGEOFF]
	str	xzr, [x19, #88]
Lloh31:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w8, ne
	stp	w8, wzr, [x19, #72]
	mov	x0, x20
	bl	_kv_parse_sys_info_table
	cbnz	w0, LBB0_10
; %bb.7:
	mov	x0, x20
	bl	_kv_patch_voltage_values
	mov	x0, x20
	bl	_kv_construct_boot_state
	mov	x0, x20
	bl	_kv_parse_power_table
	cbnz	w0, LBB0_10
; %bb.8:
	mov	w8, #1
	str	w8, [x19, #80]
	b	LBB0_10
LBB0_9:
Lloh32:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh33:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_10:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdrp	Lloh15, Lloh17
	.loh AdrpLdr	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdr	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.cfi_endproc
                                        ; -- End function
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_SUMO_MAX_HARDWARE_POWERLEVELS,4,2 ; @SUMO_MAX_HARDWARE_POWERLEVELS
	.comm	_TRINITY_AT_DFLT,4,2            ; @TRINITY_AT_DFLT
	.comm	_SMC_RAM_END,4,2                ; @SMC_RAM_END
	.comm	_PP_SCLK_DEEP_SLEEP_MASK,4,2    ; @PP_SCLK_DEEP_SLEEP_MASK
	.comm	_amdgpu_bapm,8,3                ; @amdgpu_bapm
	.comm	_AMD_PG_SUPPORT_UVD,4,2         ; @AMD_PG_SUPPORT_UVD
	.comm	_AMD_PG_SUPPORT_VCE,4,2         ; @AMD_PG_SUPPORT_VCE
	.comm	_AMD_PG_SUPPORT_SAMU,4,2        ; @AMD_PG_SUPPORT_SAMU
	.comm	_AMD_PG_SUPPORT_ACP,4,2         ; @AMD_PG_SUPPORT_ACP
	.no_dead_strip	_kv_dpm_init
.subsections_via_symbols
