	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function i9xx_crtc_disable
_i9xx_crtc_disable:                     ## @i9xx_crtc_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, -48(%rbp)                 ## 8-byte Spill
	movq	%rdi, %rbx
	movq	(%rdi), %r14
	movq	(%r14), %rdi
	callq	_to_i915
	movq	%rax, %r13
	movq	%r14, %rdi
	callq	_to_intel_crtc
	movq	%rax, %r15
	movl	(%rax), %r12d
	movq	%r13, %rdi
	movl	$2, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%r13, %rdi
	movl	%r12d, %esi
	callq	_intel_wait_for_vblank
LBB0_2:
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r12d, -52(%rbp)                ## 4-byte Spill
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	movq	%r12, %rdx
	callq	_intel_encoders_disable
	movq	%r14, %rdi
	callq	_drm_crtc_vblank_off
	movq	%r14, %rdi
	callq	_assert_vblank_disabled
	movq	%rbx, %rdi
	callq	_intel_disable_pipe
	movq	%rbx, %rdi
	callq	_i9xx_pfit_disable
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	callq	_intel_encoders_post_disable
	movq	_INTEL_OUTPUT_DSI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_crtc_has_type
	testl	%eax, %eax
	movl	-52(%rbp), %r14d                ## 4-byte Reload
	jne	LBB0_9
## %bb.3:
	movq	%r13, %rdi
	callq	_IS_CHERRYVIEW
	movq	%r13, %rdi
	testq	%rax, %rax
	je	LBB0_5
## %bb.4:
	movl	%r14d, %esi
	callq	_chv_disable_pll
	jmp	LBB0_8
LBB0_5:
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	je	LBB0_7
## %bb.6:
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_vlv_disable_pll
	jmp	LBB0_8
LBB0_7:
	movq	%rbx, %rdi
	callq	_i9xx_disable_pll
LBB0_8:
	movq	-48(%rbp), %r12                 ## 8-byte Reload
LBB0_9:
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	callq	_intel_encoders_post_pll_disable
	movq	%r13, %rdi
	movl	$2, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_10
## %bb.11:
	cmpl	$0, (%r13)
	je	LBB0_12
LBB0_13:
	movq	%r13, %rdi
	callq	_IS_I830
	testq	%rax, %rax
	je	LBB0_14
## %bb.15:
	movq	%r13, %rdi
	movl	%r14d, %esi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_i830_enable_pipe               ## TAILCALL
LBB0_10:
	movq	%r13, %rdi
	movl	%r14d, %esi
	xorl	%edx, %edx
	callq	_intel_set_cpu_fifo_underrun_reporting
	cmpl	$0, (%r13)
	jne	LBB0_13
LBB0_12:
	movq	%r15, %rdi
	callq	_intel_update_watermarks
	jmp	LBB0_13
LBB0_14:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_OUTPUT_DSI,4,2           ## @INTEL_OUTPUT_DSI
	.no_dead_strip	_i9xx_crtc_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function i9xx_crtc_disable
_i9xx_crtc_disable:                     ; @i9xx_crtc_disable
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x1
	mov	x23, x0
	ldr	x24, [x0]
	ldr	x0, [x24]
	bl	_to_i915
	mov	x19, x0
	mov	x0, x24
	bl	_to_intel_crtc
	mov	x21, x0
	ldr	w20, [x0]
	mov	x0, x19
	mov	w1, #2
	bl	_IS_GEN
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x19
	mov	x1, x20
	bl	_intel_wait_for_vblank
LBB0_2:
	mov	x0, x21
	mov	x1, x23
	mov	x2, x22
	bl	_intel_encoders_disable
	mov	x0, x24
	bl	_drm_crtc_vblank_off
	mov	x0, x24
	bl	_assert_vblank_disabled
	mov	x0, x23
	bl	_intel_disable_pipe
	mov	x0, x23
	bl	_i9xx_pfit_disable
	mov	x0, x21
	mov	x1, x23
	mov	x2, x22
	bl	_intel_encoders_post_disable
Lloh0:
	adrp	x8, _INTEL_OUTPUT_DSI@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_OUTPUT_DSI@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_intel_crtc_has_type
	cbnz	w0, LBB0_8
; %bb.3:
	mov	x0, x19
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_5
; %bb.4:
	mov	x0, x19
	mov	x1, x20
	bl	_chv_disable_pll
	b	LBB0_8
LBB0_5:
	mov	x0, x19
	bl	_IS_VALLEYVIEW
	cbz	x0, LBB0_7
; %bb.6:
	mov	x0, x19
	mov	x1, x20
	bl	_vlv_disable_pll
	b	LBB0_8
LBB0_7:
	mov	x0, x23
	bl	_i9xx_disable_pll
LBB0_8:
	mov	x0, x21
	mov	x1, x23
	mov	x2, x22
	bl	_intel_encoders_post_pll_disable
	mov	x0, x19
	mov	w1, #2
	bl	_IS_GEN
	cbz	x0, LBB0_12
; %bb.9:
	ldr	w8, [x19]
	cbz	w8, LBB0_13
LBB0_10:
	mov	x0, x19
	bl	_IS_I830
	cbz	x0, LBB0_14
; %bb.11:
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_i830_enable_pipe
LBB0_12:
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	bl	_intel_set_cpu_fifo_underrun_reporting
	ldr	w8, [x19]
	cbnz	w8, LBB0_10
LBB0_13:
	mov	x0, x21
	bl	_intel_update_watermarks
	b	LBB0_10
LBB0_14:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_OUTPUT_DSI,4,2           ; @INTEL_OUTPUT_DSI
	.no_dead_strip	_i9xx_crtc_disable
.subsections_via_symbols
