	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v10_0_ring_emit_ib_gfx
_gfx_v10_0_ring_emit_ib_gfx:            ## @gfx_v10_0_ring_emit_ib_gfx
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r12d
	movq	%rdx, %rbx
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	_AMDGPU_JOB_GET_VMID
	movl	%eax, %r15d
	movq	_AMDGPU_IB_FLAG_CE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	(%rbx), %eax
	jne	LBB0_2
## %bb.1:
	movq	_PACKET3_INDIRECT_BUFFER@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_2:
	movq	_PACKET3_INDIRECT_BUFFER_CNST@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %edi
	movl	$2, %esi
	callq	_PACKET3
	shll	$24, %r15d
	orl	4(%rbx), %r15d
	movl	%eax, %r13d
	movq	_amdgpu_mcbp@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_10
## %bb.4:
	movq	_AMDGPU_IB_FLAG_PREEMPT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_10
## %bb.5:
	movl	$1, %edi
	callq	_INDIRECT_BUFFER_PRE_ENB
	movl	%r12d, %ecx
	movl	%eax, %r12d
	orl	%r15d, %r12d
	movq	_AMDGPU_IB_PREEMPTED@GOTPCREL(%rip), %rdx
	movl	%ecx, %r15d
	testl	%ecx, (%rdx)
	je	LBB0_7
## %bb.6:
	movl	$1, %edi
	callq	_INDIRECT_BUFFER_PRE_RESUME
	movq	_AMDGPU_IB_PREEMPTED@GOTPCREL(%rip), %rdx
	orl	%eax, %r12d
LBB0_7:
	movq	_AMDGPU_IB_FLAG_CE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	jne	LBB0_11
## %bb.8:
	xorl	%esi, %esi
	andl	(%rdx), %r15d
	setne	%sil
	movq	%r14, %rdi
	callq	_gfx_v10_0_ring_emit_de_meta
	jmp	LBB0_11
LBB0_10:
	movl	%r15d, %r12d
LBB0_11:
	movq	%r14, %rdi
	movl	%r13d, %esi
	callq	_amdgpu_ring_write
	movl	8(%rbx), %edi
	andl	$3, %edi
	callq	_BUG_ON
	movl	8(%rbx), %edi
	callq	_lower_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	8(%rbx), %edi
	callq	_upper_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r14, %rdi
	movl	%r12d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_IB_FLAG_CE,4,2          ## @AMDGPU_IB_FLAG_CE
	.comm	_PACKET3_INDIRECT_BUFFER_CNST,4,2 ## @PACKET3_INDIRECT_BUFFER_CNST
	.comm	_PACKET3_INDIRECT_BUFFER,4,2    ## @PACKET3_INDIRECT_BUFFER
	.comm	_amdgpu_mcbp,8,3                ## @amdgpu_mcbp
	.comm	_AMDGPU_IB_FLAG_PREEMPT,4,2     ## @AMDGPU_IB_FLAG_PREEMPT
	.comm	_AMDGPU_IB_PREEMPTED,4,2        ## @AMDGPU_IB_PREEMPTED
	.no_dead_strip	_gfx_v10_0_ring_emit_ib_gfx
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v10_0_ring_emit_ib_gfx
_gfx_v10_0_ring_emit_ib_gfx:            ; @gfx_v10_0_ring_emit_ib_gfx
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x3
	mov	x20, x2
	mov	x19, x0
	mov	x0, x1
	bl	_AMDGPU_JOB_GET_VMID
	mov	x21, x0
	ldr	w8, [x20]
Lloh0:
	adrp	x24, _AMDGPU_IB_FLAG_CE@GOTPAGE
Lloh1:
	ldr	x24, [x24, _AMDGPU_IB_FLAG_CE@GOTPAGEOFF]
Lloh2:
	adrp	x9, _PACKET3_INDIRECT_BUFFER@GOTPAGE
Lloh3:
	ldr	x9, [x9, _PACKET3_INDIRECT_BUFFER@GOTPAGEOFF]
	ldr	w10, [x24]
Lloh4:
	adrp	x11, _PACKET3_INDIRECT_BUFFER_CNST@GOTPAGE
Lloh5:
	ldr	x11, [x11, _PACKET3_INDIRECT_BUFFER_CNST@GOTPAGEOFF]
	tst	w10, w8
	csel	x8, x9, x11, eq
	ldr	w0, [x8]
	mov	w1, #2
	bl	_PACKET3
	mov	x23, x0
	ldr	w8, [x20, #4]
	orr	w21, w8, w21, lsl #24
Lloh6:
	adrp	x8, _amdgpu_mcbp@GOTPAGE
Lloh7:
	ldr	x8, [x8, _amdgpu_mcbp@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	cbz	x8, LBB0_6
; %bb.1:
	ldr	w8, [x20]
Lloh9:
	adrp	x9, _AMDGPU_IB_FLAG_PREEMPT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _AMDGPU_IB_FLAG_PREEMPT@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.2:
	mov	w0, #1
	bl	_INDIRECT_BUFFER_PRE_ENB
	orr	w21, w0, w21
Lloh12:
	adrp	x25, _AMDGPU_IB_PREEMPTED@GOTPAGE
Lloh13:
	ldr	x25, [x25, _AMDGPU_IB_PREEMPTED@GOTPAGEOFF]
	ldr	w8, [x25]
	tst	w8, w22
	b.eq	LBB0_4
; %bb.3:
	mov	w0, #1
	bl	_INDIRECT_BUFFER_PRE_RESUME
	orr	w21, w0, w21
LBB0_4:
	ldr	w8, [x20]
	ldr	w9, [x24]
	tst	w9, w8
	b.ne	LBB0_6
; %bb.5:
	ldr	w8, [x25]
	tst	w8, w22
	cset	w1, ne
	mov	x0, x19
	bl	_gfx_v10_0_ring_emit_de_meta
LBB0_6:
	mov	x0, x19
	mov	x1, x23
	bl	_amdgpu_ring_write
	ldr	w8, [x20, #8]
	and	w0, w8, #0x3
	bl	_BUG_ON
	ldr	w0, [x20, #8]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w0, [x20, #8]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	x1, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_IB_FLAG_CE,4,2          ; @AMDGPU_IB_FLAG_CE
	.comm	_PACKET3_INDIRECT_BUFFER_CNST,4,2 ; @PACKET3_INDIRECT_BUFFER_CNST
	.comm	_PACKET3_INDIRECT_BUFFER,4,2    ; @PACKET3_INDIRECT_BUFFER
	.comm	_amdgpu_mcbp,8,3                ; @amdgpu_mcbp
	.comm	_AMDGPU_IB_FLAG_PREEMPT,4,2     ; @AMDGPU_IB_FLAG_PREEMPT
	.comm	_AMDGPU_IB_PREEMPTED,4,2        ; @AMDGPU_IB_PREEMPTED
	.no_dead_strip	_gfx_v10_0_ring_emit_ib_gfx
.subsections_via_symbols
