	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function lpc18xx_gpio_pin_ic_unmask
_lpc18xx_gpio_pin_ic_unmask:            ## @lpc18xx_gpio_pin_ic_unmask
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %r14
	callq	_irqd_get_trigger_type
	movl	%eax, %r15d
	movq	%r14, %rdi
	callq	_raw_spin_lock
	movq	_IRQ_TYPE_LEVEL_MASK@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	jne	LBB0_2
## %bb.1:
	movq	_IRQ_TYPE_EDGE_RISING@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_3
LBB0_2:
	movl	(%rbx), %esi
	movq	_LPC18XX_GPIO_PIN_IC_SIENR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_lpc18xx_gpio_pin_ic_set
LBB0_3:
	movq	_IRQ_TYPE_EDGE_FALLING@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_5
## %bb.4:
	movl	(%rbx), %esi
	movq	_LPC18XX_GPIO_PIN_IC_SIENF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_lpc18xx_gpio_pin_ic_set
LBB0_5:
	movq	%r14, %rdi
	callq	_raw_spin_unlock
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_irq_chip_unmask_parent         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_IRQ_TYPE_LEVEL_MASK,4,2        ## @IRQ_TYPE_LEVEL_MASK
	.comm	_IRQ_TYPE_EDGE_RISING,4,2       ## @IRQ_TYPE_EDGE_RISING
	.comm	_LPC18XX_GPIO_PIN_IC_SIENR,4,2  ## @LPC18XX_GPIO_PIN_IC_SIENR
	.comm	_IRQ_TYPE_EDGE_FALLING,4,2      ## @IRQ_TYPE_EDGE_FALLING
	.comm	_LPC18XX_GPIO_PIN_IC_SIENF,4,2  ## @LPC18XX_GPIO_PIN_IC_SIENF
	.no_dead_strip	_lpc18xx_gpio_pin_ic_unmask
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function lpc18xx_gpio_pin_ic_unmask
_lpc18xx_gpio_pin_ic_unmask:            ; @lpc18xx_gpio_pin_ic_unmask
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0, #8]
	bl	_irqd_get_trigger_type
	mov	x21, x0
	mov	x0, x20
	bl	_raw_spin_lock
Lloh0:
	adrp	x8, _IRQ_TYPE_LEVEL_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _IRQ_TYPE_LEVEL_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	tst	w8, w21
	b.ne	LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _IRQ_TYPE_EDGE_RISING@GOTPAGE
Lloh4:
	ldr	x8, [x8, _IRQ_TYPE_EDGE_RISING@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_3
LBB0_2:
	ldr	w1, [x19]
Lloh6:
	adrp	x8, _LPC18XX_GPIO_PIN_IC_SIENR@GOTPAGE
Lloh7:
	ldr	x8, [x8, _LPC18XX_GPIO_PIN_IC_SIENR@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_lpc18xx_gpio_pin_ic_set
LBB0_3:
Lloh9:
	adrp	x8, _IRQ_TYPE_EDGE_FALLING@GOTPAGE
Lloh10:
	ldr	x8, [x8, _IRQ_TYPE_EDGE_FALLING@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_5
; %bb.4:
	ldr	w1, [x19]
Lloh12:
	adrp	x8, _LPC18XX_GPIO_PIN_IC_SIENF@GOTPAGE
Lloh13:
	ldr	x8, [x8, _LPC18XX_GPIO_PIN_IC_SIENF@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_lpc18xx_gpio_pin_ic_set
LBB0_5:
	mov	x0, x20
	bl	_raw_spin_unlock
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_irq_chip_unmask_parent
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_IRQ_TYPE_LEVEL_MASK,4,2        ; @IRQ_TYPE_LEVEL_MASK
	.comm	_IRQ_TYPE_EDGE_RISING,4,2       ; @IRQ_TYPE_EDGE_RISING
	.comm	_LPC18XX_GPIO_PIN_IC_SIENR,4,2  ; @LPC18XX_GPIO_PIN_IC_SIENR
	.comm	_IRQ_TYPE_EDGE_FALLING,4,2      ; @IRQ_TYPE_EDGE_FALLING
	.comm	_LPC18XX_GPIO_PIN_IC_SIENF,4,2  ; @LPC18XX_GPIO_PIN_IC_SIENF
	.no_dead_strip	_lpc18xx_gpio_pin_ic_unmask
.subsections_via_symbols
