	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_gfx_mqd_sw_init         ## -- Begin function amdgpu_gfx_mqd_sw_init
	.p2align	4, 0x90
_amdgpu_gfx_mqd_sw_init:                ## @amdgpu_gfx_mqd_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r12d
	movq	%rdi, %r13
	cmpl	$0, 68(%rdi)
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	je	LBB0_1
LBB0_6:
	movq	(%r13), %rax
	movq	_CHIP_NAVI10@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_16
## %bb.7:
	movq	_amdgpu_async_gfx_ring@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_16
## %bb.8:
	cmpl	$0, 16(%r13)
	jle	LBB0_16
## %bb.9:
	movl	$12, %ebx
	xorl	%r15d, %r15d
	jmp	LBB0_10
	.p2align	4, 0x90
LBB0_15:                                ##   in Loop: Header=BB0_10 Depth=1
	incq	%r15
	movslq	16(%r13), %rax
	addq	$16, %rbx
	cmpq	%rax, %r15
	jge	LBB0_16
LBB0_10:                                ## =>This Inner Loop Header: Depth=1
	movq	48(%r13), %r14
	cmpl	$0, (%r14,%rbx)
	jne	LBB0_15
## %bb.11:                              ##   in Loop: Header=BB0_10 Depth=1
	leaq	(%r14,%rbx), %r8
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AMDGPU_GEM_DOMAIN_GTT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	-4(%r14,%rbx), %r9
	leaq	-8(%r14,%rbx), %rax
	movq	%rax, (%rsp)
	movq	%r13, %rdi
	movl	%r12d, %esi
	callq	_amdgpu_bo_create_kernel
	testl	%eax, %eax
	jne	LBB0_12
## %bb.13:                              ##   in Loop: Header=BB0_10 Depth=1
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r12d, %edi
	callq	_kmalloc
	movq	40(%r13), %rcx
	movq	%rax, (%rcx,%r15,8)
	movq	40(%r13), %rax
	cmpq	$0, (%rax,%r15,8)
	jne	LBB0_15
## %bb.14:                              ##   in Loop: Header=BB0_10 Depth=1
	movl	8(%r13), %edi
	movl	-12(%r14,%rbx), %edx
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_warn
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	jmp	LBB0_15
LBB0_16:
	cmpl	$0, 20(%r13)
	jle	LBB0_23
## %bb.17:
	movl	$12, %ebx
	xorl	%r15d, %r15d
	jmp	LBB0_18
	.p2align	4, 0x90
LBB0_22:                                ##   in Loop: Header=BB0_18 Depth=1
	incq	%r15
	movslq	20(%r13), %rax
	addq	$16, %rbx
	cmpq	%rax, %r15
	jge	LBB0_23
LBB0_18:                                ## =>This Inner Loop Header: Depth=1
	movq	32(%r13), %r14
	cmpl	$0, (%r14,%rbx)
	jne	LBB0_22
## %bb.19:                              ##   in Loop: Header=BB0_18 Depth=1
	leaq	(%r14,%rbx), %r8
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AMDGPU_GEM_DOMAIN_GTT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	-4(%r14,%rbx), %r9
	leaq	-8(%r14,%rbx), %rax
	movq	%rax, (%rsp)
	movq	%r13, %rdi
	movl	%r12d, %esi
	callq	_amdgpu_bo_create_kernel
	testl	%eax, %eax
	jne	LBB0_12
## %bb.20:                              ##   in Loop: Header=BB0_18 Depth=1
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r12d, %edi
	callq	_kmalloc
	movq	24(%r13), %rcx
	movq	%rax, (%rcx,%r15,8)
	movq	24(%r13), %rax
	cmpq	$0, (%rax,%r15,8)
	jne	LBB0_22
## %bb.21:                              ##   in Loop: Header=BB0_18 Depth=1
	movl	8(%r13), %edi
	movl	-12(%r14,%rbx), %edx
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_warn
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	jmp	LBB0_22
LBB0_23:
	xorl	%eax, %eax
	jmp	LBB0_24
LBB0_1:
	leaq	68(%r13), %r8
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	64(%r13), %r9
	leaq	60(%r13), %rax
	movq	%rax, (%rsp)
	movq	%r13, %rdi
	movl	%r12d, %esi
	callq	_amdgpu_bo_create_kernel
	testl	%eax, %eax
	je	LBB0_4
## %bb.2:
	movl	8(%r13), %edi
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_3
LBB0_12:
	movl	8(%r13), %edi
	leaq	L_.str.2(%rip), %rsi
LBB0_3:
	movl	%eax, %edx
	movl	%eax, %ebx
	callq	_dev_warn
	movl	%ebx, %eax
LBB0_24:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r12d, %edi
	callq	_kmalloc
	movq	24(%r13), %rcx
	movq	_AMDGPU_MAX_COMPUTE_RINGS@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	%rax, (%rcx,%rdx,8)
	movq	24(%r13), %rax
	cmpq	$0, (%rax,%rdx,8)
	jne	LBB0_6
## %bb.5:
	movl	8(%r13), %edi
	movl	56(%r13), %edx
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_warn
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	jmp	LBB0_6
	.cfi_endproc
                                        ## -- End function
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ## @AMDGPU_GEM_DOMAIN_VRAM
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to create ring mqd ob (%d)"

	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_AMDGPU_MAX_COMPUTE_RINGS,8,3   ## @AMDGPU_MAX_COMPUTE_RINGS
L_.str.1:                               ## @.str.1
	.asciz	"no memory to create MQD backup for ring %s\n"

	.comm	_CHIP_NAVI10,8,3                ## @CHIP_NAVI10
	.comm	_amdgpu_async_gfx_ring,8,3      ## @amdgpu_async_gfx_ring
	.comm	_AMDGPU_GEM_DOMAIN_GTT,4,2      ## @AMDGPU_GEM_DOMAIN_GTT
L_.str.2:                               ## @.str.2
	.asciz	"failed to create ring mqd bo (%d)"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_gfx_mqd_sw_init         ; -- Begin function amdgpu_gfx_mqd_sw_init
	.p2align	2
_amdgpu_gfx_mqd_sw_init:                ; @amdgpu_gfx_mqd_sw_init
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x1
	mov	x19, x0
	mov	x4, x0
	ldr	w8, [x4, #68]!
	cbz	w8, LBB0_17
LBB0_1:
	ldr	x8, [x19]
Lloh0:
	adrp	x9, _CHIP_NAVI10@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_NAVI10@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
Lloh3:
	adrp	x10, _amdgpu_async_gfx_ring@GOTPAGE
Lloh4:
	ldr	x10, [x10, _amdgpu_async_gfx_ring@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
	cmp	x8, x9
	ccmp	x10, #0, #4, ge
	b.eq	LBB0_9
; %bb.2:
	ldr	w8, [x19, #16]
	cmp	w8, #1
	b.lt	LBB0_9
; %bb.3:
	mov	x23, #0
	mov	x24, #0
Lloh6:
	adrp	x25, _PAGE_SIZE@GOTPAGE
Lloh7:
	ldr	x25, [x25, _PAGE_SIZE@GOTPAGEOFF]
Lloh8:
	adrp	x26, _AMDGPU_GEM_DOMAIN_GTT@GOTPAGE
Lloh9:
	ldr	x26, [x26, _AMDGPU_GEM_DOMAIN_GTT@GOTPAGEOFF]
Lloh10:
	adrp	x27, _GFP_KERNEL@GOTPAGE
Lloh11:
	ldr	x27, [x27, _GFP_KERNEL@GOTPAGEOFF]
Lloh12:
	adrp	x21, l_.str.1@PAGE
Lloh13:
	add	x21, x21, l_.str.1@PAGEOFF
	b	LBB0_5
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
	add	x24, x24, #1
	ldrsw	x8, [x19, #16]
	add	x23, x23, #16
	cmp	x24, x8
	b.ge	LBB0_9
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x28, [x19, #48]
	add	x8, x28, x23
	mov	x4, x8
	ldr	w9, [x4, #12]!
	cbnz	w9, LBB0_4
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	w2, [x25]
	ldr	w3, [x26]
	add	x5, x8, #8
	add	x6, x8, #4
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_bo_create_kernel
	cbnz	w0, LBB0_19
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	w1, [x27]
	mov	x0, x20
	bl	_kmalloc
	ldr	x8, [x19, #40]
	lsl	x9, x24, #3
	str	x0, [x8, x9]
	ldr	x8, [x19, #40]
	ldr	x8, [x8, x9]
	cbnz	x8, LBB0_4
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	w0, [x19, #8]
	ldr	w2, [x28, x23]
	mov	x1, x21
	bl	_dev_warn
	b	LBB0_4
LBB0_9:
	ldr	w8, [x19, #20]
	cmp	w8, #1
	b.lt	LBB0_16
; %bb.10:
	mov	x23, #0
	mov	x24, #0
Lloh14:
	adrp	x25, _PAGE_SIZE@GOTPAGE
Lloh15:
	ldr	x25, [x25, _PAGE_SIZE@GOTPAGEOFF]
Lloh16:
	adrp	x26, _AMDGPU_GEM_DOMAIN_GTT@GOTPAGE
Lloh17:
	ldr	x26, [x26, _AMDGPU_GEM_DOMAIN_GTT@GOTPAGEOFF]
Lloh18:
	adrp	x27, _GFP_KERNEL@GOTPAGE
Lloh19:
	ldr	x27, [x27, _GFP_KERNEL@GOTPAGEOFF]
Lloh20:
	adrp	x21, l_.str.1@PAGE
Lloh21:
	add	x21, x21, l_.str.1@PAGEOFF
	b	LBB0_12
LBB0_11:                                ;   in Loop: Header=BB0_12 Depth=1
	add	x24, x24, #1
	ldrsw	x8, [x19, #20]
	add	x23, x23, #16
	cmp	x24, x8
	b.ge	LBB0_16
LBB0_12:                                ; =>This Inner Loop Header: Depth=1
	ldr	x28, [x19, #32]
	add	x8, x28, x23
	mov	x4, x8
	ldr	w9, [x4, #12]!
	cbnz	w9, LBB0_11
; %bb.13:                               ;   in Loop: Header=BB0_12 Depth=1
	ldr	w2, [x25]
	ldr	w3, [x26]
	add	x5, x8, #8
	add	x6, x8, #4
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_bo_create_kernel
	cbnz	w0, LBB0_19
; %bb.14:                               ;   in Loop: Header=BB0_12 Depth=1
	ldr	w1, [x27]
	mov	x0, x20
	bl	_kmalloc
	ldr	x8, [x19, #24]
	lsl	x9, x24, #3
	str	x0, [x8, x9]
	ldr	x8, [x19, #24]
	ldr	x8, [x8, x9]
	cbnz	x8, LBB0_11
; %bb.15:                               ;   in Loop: Header=BB0_12 Depth=1
	ldr	w0, [x19, #8]
	ldr	w2, [x28, x23]
	mov	x1, x21
	bl	_dev_warn
	b	LBB0_11
LBB0_16:
	mov	w22, #0
	b	LBB0_21
LBB0_17:
Lloh22:
	adrp	x8, _PAGE_SIZE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _PAGE_SIZE@GOTPAGEOFF]
Lloh24:
	ldr	w2, [x8]
Lloh25:
	adrp	x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGE
Lloh26:
	ldr	x8, [x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh27:
	ldr	w3, [x8]
	add	x5, x19, #64
	add	x6, x19, #60
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_bo_create_kernel
	cbz	w0, LBB0_22
; %bb.18:
	mov	x22, x0
	ldr	w0, [x19, #8]
Lloh28:
	adrp	x1, l_.str@PAGE
Lloh29:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_20
LBB0_19:
	mov	x22, x0
	ldr	w0, [x19, #8]
Lloh30:
	adrp	x1, l_.str.2@PAGE
Lloh31:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_20:
	mov	x2, x22
	bl	_dev_warn
LBB0_21:
	mov	x0, x22
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_22:
Lloh32:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_kmalloc
	ldr	x8, [x19, #24]
Lloh35:
	adrp	x9, _AMDGPU_MAX_COMPUTE_RINGS@GOTPAGE
Lloh36:
	ldr	x9, [x9, _AMDGPU_MAX_COMPUTE_RINGS@GOTPAGEOFF]
Lloh37:
	ldr	x9, [x9]
	lsl	x9, x9, #3
	str	x0, [x8, x9]
	ldr	x8, [x19, #24]
	ldr	x8, [x8, x9]
	cbnz	x8, LBB0_1
; %bb.23:
	ldr	w0, [x19, #8]
	ldr	w2, [x19, #56]
Lloh38:
	adrp	x1, l_.str.1@PAGE
Lloh39:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_warn
	b	LBB0_1
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpAdd	Lloh38, Lloh39
	.cfi_endproc
                                        ; -- End function
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ; @AMDGPU_GEM_DOMAIN_VRAM
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to create ring mqd ob (%d)"

	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_AMDGPU_MAX_COMPUTE_RINGS,8,3   ; @AMDGPU_MAX_COMPUTE_RINGS
l_.str.1:                               ; @.str.1
	.asciz	"no memory to create MQD backup for ring %s\n"

	.comm	_CHIP_NAVI10,8,3                ; @CHIP_NAVI10
	.comm	_amdgpu_async_gfx_ring,8,3      ; @amdgpu_async_gfx_ring
	.comm	_AMDGPU_GEM_DOMAIN_GTT,4,2      ; @AMDGPU_GEM_DOMAIN_GTT
l_.str.2:                               ; @.str.2
	.asciz	"failed to create ring mqd bo (%d)"

.subsections_via_symbols
