	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function zynq_gpio_set_value
_zynq_gpio_set_value:                   ## @zynq_gpio_set_value
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movl	%esi, %ebx
	callq	_gpiochip_get_data
	movq	%rax, %r15
	leaq	-32(%rbp), %rsi
	leaq	-28(%rbp), %rdx
	movl	%ebx, %edi
	movq	%rax, %rcx
	callq	_zynq_gpio_get_bank_pin
	movl	-28(%rbp), %eax
	movq	_ZYNQ_GPIO_MID_PIN_NUM@GOTPCREL(%rip), %rbx
	subl	(%rbx), %eax
	jae	LBB0_1
## %bb.2:
	movl	-32(%rbp), %edi
	callq	_ZYNQ_GPIO_DATA_LSW_OFFSET
	jmp	LBB0_3
LBB0_1:
	movl	%eax, -28(%rbp)
	movl	-32(%rbp), %edi
	callq	_ZYNQ_GPIO_DATA_MSW_OFFSET
LBB0_3:
	xorl	%edi, %edi
	testl	%r14d, %r14d
	setne	%dil
	movl	-28(%rbp), %ecx
	movl	(%rbx), %edx
	shll	%cl, %edi
	addl	%ecx, %edx
	movq	_ZYNQ_GPIO_UPPER_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edi
	btrl	%edx, %edi
	movl	%eax, %esi
	addq	(%r15), %rsi
	callq	_writel_relaxed
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ZYNQ_GPIO_MID_PIN_NUM,4,2      ## @ZYNQ_GPIO_MID_PIN_NUM
	.comm	_ZYNQ_GPIO_UPPER_MASK,4,2       ## @ZYNQ_GPIO_UPPER_MASK
	.no_dead_strip	_zynq_gpio_set_value
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function zynq_gpio_set_value
_zynq_gpio_set_value:                   ; @zynq_gpio_set_value
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x21, x1
	bl	_gpiochip_get_data
	mov	x19, x0
	add	x1, sp, #12
	add	x2, sp, #8
	mov	x0, x21
	mov	x3, x19
	bl	_zynq_gpio_get_bank_pin
	ldr	w8, [sp, #8]
Lloh0:
	adrp	x21, _ZYNQ_GPIO_MID_PIN_NUM@GOTPAGE
Lloh1:
	ldr	x21, [x21, _ZYNQ_GPIO_MID_PIN_NUM@GOTPAGEOFF]
	ldr	w9, [x21]
	subs	w8, w8, w9
	b.hs	LBB0_2
; %bb.1:
	ldr	w0, [sp, #12]
	bl	_ZYNQ_GPIO_DATA_LSW_OFFSET
	b	LBB0_3
LBB0_2:
	str	w8, [sp, #8]
	ldr	w0, [sp, #12]
	bl	_ZYNQ_GPIO_DATA_MSW_OFFSET
LBB0_3:
	cmp	w20, #0
	cset	w8, ne
	ldr	w9, [sp, #8]
	ldr	w10, [x21]
	add	w10, w10, w9
	mov	w11, #1
	lsl	w10, w11, w10
Lloh2:
	adrp	x11, _ZYNQ_GPIO_UPPER_MASK@GOTPAGE
Lloh3:
	ldr	x11, [x11, _ZYNQ_GPIO_UPPER_MASK@GOTPAGEOFF]
	lsl	w8, w8, w9
Lloh4:
	ldr	w9, [x11]
	orr	w8, w9, w8
	bic	w8, w8, w10
	ldr	x9, [x19]
	add	x1, x9, w0, uxtw
	mov	x0, x8
	bl	_writel_relaxed
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_ZYNQ_GPIO_MID_PIN_NUM,4,2      ; @ZYNQ_GPIO_MID_PIN_NUM
	.comm	_ZYNQ_GPIO_UPPER_MASK,4,2       ; @ZYNQ_GPIO_UPPER_MASK
	.no_dead_strip	_zynq_gpio_set_value
.subsections_via_symbols
