	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vce_v3_0_start
_vce_v3_0_start:                        ## @vce_v3_0_start
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	addq	$8, %rdi
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	callq	_mutex_lock
	xorl	%r13d, %r13d
	movb	$1, %r14b
	xorl	%r12d, %r12d
	jmp	LBB0_1
LBB0_7:                                 ##   in Loop: Header=BB0_1 Depth=1
	movq	_VCE_VCPU_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_CLK_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_WREG32_FIELD
LBB0_8:                                 ##   in Loop: Header=BB0_1 Depth=1
	movq	_VCE_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_ECPU_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_WREG32_FIELD
	movl	$100, %edi
	callq	_mdelay
	movq	%r15, %rdi
	callq	_vce_v3_0_firmware_loaded
	movl	%eax, %ebx
	movq	_VCE_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_JOB_BUSY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_WREG32_FIELD
	testl	%ebx, %ebx
	jne	LBB0_9
LBB0_10:                                ##   in Loop: Header=BB0_1 Depth=1
	movl	$1, %r12d
	movb	$1, %r13b
	xorl	%ebx, %ebx
	testb	$1, %r14b
	movl	$0, %r14d
	je	LBB0_11
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	movl	16(%r15), %eax
	btl	%r12d, %eax
	jb	LBB0_10
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	movq	_mmGRBM_GFX_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%r12d, %edi
	callq	_GET_VCE_INSTANCE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	testb	$1, %r13b
	je	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	16(%r15), %eax
	movq	_AMDGPU_VCE_HARVEST_VCE0@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_5
LBB0_4:                                 ##   in Loop: Header=BB0_1 Depth=1
	movq	24(%r15), %rbx
	movq	_mmVCE_RB_RPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	8(%rbx), %edi
	callq	_lower_32_bits
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_WPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	8(%rbx), %edi
	callq	_lower_32_bits
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_BASE_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%rbx), %esi
	callq	_WREG32
	movq	_mmVCE_RB_BASE_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	(%rbx), %edi
	callq	_upper_32_bits
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	4(%rbx), %eax
	leal	3(%rax), %esi
	testl	%eax, %eax
	cmovnsl	%eax, %esi
	sarl	$2, %esi
	callq	_WREG32
	movq	24(%r15), %rbx
	movq	_mmVCE_RB_RPTR2@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	20(%rbx), %edi
	callq	_lower_32_bits
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_WPTR2@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	20(%rbx), %edi
	callq	_lower_32_bits
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_BASE_LO2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	12(%rbx), %esi
	callq	_WREG32
	movq	_mmVCE_RB_BASE_HI2@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	12(%rbx), %edi
	callq	_upper_32_bits
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_SIZE2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	16(%rbx), %eax
	leal	3(%rax), %esi
	testl	%eax, %eax
	cmovnsl	%eax, %esi
	sarl	$2, %esi
	callq	_WREG32
	movq	24(%r15), %rbx
	movq	_mmVCE_RB_RPTR3@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	32(%rbx), %edi
	callq	_lower_32_bits
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_WPTR3@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	32(%rbx), %edi
	callq	_lower_32_bits
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_BASE_LO3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	24(%rbx), %esi
	callq	_WREG32
	movq	_mmVCE_RB_BASE_HI3@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	24(%rbx), %edi
	callq	_upper_32_bits
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmVCE_RB_SIZE3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	28(%rbx), %eax
	leal	3(%rax), %esi
	testl	%eax, %eax
	cmovnsl	%eax, %esi
	sarl	$2, %esi
	callq	_WREG32
LBB0_5:                                 ##   in Loop: Header=BB0_1 Depth=1
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_vce_v3_0_mc_resume
	movq	_VCE_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_JOB_BUSY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_WREG32_FIELD
	movq	(%r15), %rax
	movq	_CHIP_STONEY@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_1 Depth=1
	movq	_mmVCE_VCPU_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	movl	$-2097154, %edx                 ## imm = 0xFFDFFFFE
	callq	_WREG32_P
	jmp	LBB0_8
LBB0_11:
	movq	_mmGRBM_GFX_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmGRBM_GFX_INDEX_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	jmp	LBB0_12
LBB0_9:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_ERROR
LBB0_12:
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_mutex_unlock
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_mmGRBM_GFX_INDEX,4,2           ## @mmGRBM_GFX_INDEX
	.comm	_AMDGPU_VCE_HARVEST_VCE0,4,2    ## @AMDGPU_VCE_HARVEST_VCE0
	.comm	_mmVCE_RB_RPTR,4,2              ## @mmVCE_RB_RPTR
	.comm	_mmVCE_RB_WPTR,4,2              ## @mmVCE_RB_WPTR
	.comm	_mmVCE_RB_BASE_LO,4,2           ## @mmVCE_RB_BASE_LO
	.comm	_mmVCE_RB_BASE_HI,4,2           ## @mmVCE_RB_BASE_HI
	.comm	_mmVCE_RB_SIZE,4,2              ## @mmVCE_RB_SIZE
	.comm	_mmVCE_RB_RPTR2,4,2             ## @mmVCE_RB_RPTR2
	.comm	_mmVCE_RB_WPTR2,4,2             ## @mmVCE_RB_WPTR2
	.comm	_mmVCE_RB_BASE_LO2,4,2          ## @mmVCE_RB_BASE_LO2
	.comm	_mmVCE_RB_BASE_HI2,4,2          ## @mmVCE_RB_BASE_HI2
	.comm	_mmVCE_RB_SIZE2,4,2             ## @mmVCE_RB_SIZE2
	.comm	_mmVCE_RB_RPTR3,4,2             ## @mmVCE_RB_RPTR3
	.comm	_mmVCE_RB_WPTR3,4,2             ## @mmVCE_RB_WPTR3
	.comm	_mmVCE_RB_BASE_LO3,4,2          ## @mmVCE_RB_BASE_LO3
	.comm	_mmVCE_RB_BASE_HI3,4,2          ## @mmVCE_RB_BASE_HI3
	.comm	_mmVCE_RB_SIZE3,4,2             ## @mmVCE_RB_SIZE3
	.comm	_VCE_STATUS,4,2                 ## @VCE_STATUS
	.comm	_JOB_BUSY,4,2                   ## @JOB_BUSY
	.comm	_CHIP_STONEY,8,3                ## @CHIP_STONEY
	.comm	_mmVCE_VCPU_CNTL,4,2            ## @mmVCE_VCPU_CNTL
	.comm	_VCE_VCPU_CNTL,4,2              ## @VCE_VCPU_CNTL
	.comm	_CLK_EN,4,2                     ## @CLK_EN
	.comm	_VCE_SOFT_RESET,4,2             ## @VCE_SOFT_RESET
	.comm	_ECPU_SOFT_RESET,4,2            ## @ECPU_SOFT_RESET
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"VCE not responding, giving up!!!\n"

	.comm	_mmGRBM_GFX_INDEX_DEFAULT,4,2   ## @mmGRBM_GFX_INDEX_DEFAULT
	.no_dead_strip	_vce_v3_0_start
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vce_v3_0_start
_vce_v3_0_start:                        ; @vce_v3_0_start
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x0
	add	x0, x0, #8
	str	x0, [sp, #8]                    ; 8-byte Folded Spill
	bl	_mutex_lock
	mov	w21, #0
Lloh0:
	adrp	x23, _mmGRBM_GFX_INDEX@GOTPAGE
Lloh1:
	ldr	x23, [x23, _mmGRBM_GFX_INDEX@GOTPAGEOFF]
	mov	w8, #1
Lloh2:
	adrp	x28, _VCE_STATUS@GOTPAGE
Lloh3:
	ldr	x28, [x28, _VCE_STATUS@GOTPAGEOFF]
Lloh4:
	adrp	x24, _JOB_BUSY@GOTPAGE
Lloh5:
	ldr	x24, [x24, _JOB_BUSY@GOTPAGEOFF]
Lloh6:
	adrp	x25, _VCE_SOFT_RESET@GOTPAGE
Lloh7:
	ldr	x25, [x25, _VCE_SOFT_RESET@GOTPAGEOFF]
Lloh8:
	adrp	x26, _ECPU_SOFT_RESET@GOTPAGE
Lloh9:
	ldr	x26, [x26, _ECPU_SOFT_RESET@GOTPAGEOFF]
	b	LBB0_4
LBB0_1:                                 ;   in Loop: Header=BB0_4 Depth=1
Lloh10:
	adrp	x8, _VCE_VCPU_CNTL@GOTPAGE
Lloh11:
	ldr	x8, [x8, _VCE_VCPU_CNTL@GOTPAGEOFF]
Lloh12:
	ldr	w0, [x8]
Lloh13:
	adrp	x8, _CLK_EN@GOTPAGE
Lloh14:
	ldr	x8, [x8, _CLK_EN@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	w2, #1
	bl	_WREG32_FIELD
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	w0, [x25]
	ldr	w1, [x26]
	mov	w2, #0
	bl	_WREG32_FIELD
	mov	w0, #100
	bl	_mdelay
	mov	x0, x20
	bl	_vce_v3_0_firmware_loaded
	mov	x21, x0
	ldr	w0, [x28]
	ldr	w1, [x24]
	mov	w2, #0
	bl	_WREG32_FIELD
	cbnz	w21, LBB0_11
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	mov	w8, #0
	mov	w21, #1
	tbz	w27, #0, LBB0_10
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	mov	x27, x8
	ldr	w8, [x20, #16]
	lsr	w8, w8, w21
	tbnz	w8, #0, LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w22, [x23]
	mov	x0, x21
	bl	_GET_VCE_INSTANCE
	mov	x1, x0
	mov	x0, x22
	bl	_WREG32
	tbz	w21, #0, LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w8, [x20, #16]
Lloh16:
	adrp	x9, _AMDGPU_VCE_HARVEST_VCE0@GOTPAGE
Lloh17:
	ldr	x9, [x9, _AMDGPU_VCE_HARVEST_VCE0@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_8
LBB0_7:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	x19, [x20, #24]
Lloh19:
	adrp	x8, _mmVCE_RB_RPTR@GOTPAGE
Lloh20:
	ldr	x8, [x8, _mmVCE_RB_RPTR@GOTPAGEOFF]
Lloh21:
	ldr	w22, [x8]
	ldr	w0, [x19, #8]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x22
	bl	_WREG32
Lloh22:
	adrp	x8, _mmVCE_RB_WPTR@GOTPAGE
Lloh23:
	ldr	x8, [x8, _mmVCE_RB_WPTR@GOTPAGEOFF]
Lloh24:
	ldr	w22, [x8]
	ldr	w0, [x19, #8]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x22
	bl	_WREG32
Lloh25:
	adrp	x8, _mmVCE_RB_BASE_LO@GOTPAGE
Lloh26:
	ldr	x8, [x8, _mmVCE_RB_BASE_LO@GOTPAGEOFF]
Lloh27:
	ldr	w0, [x8]
	ldr	w1, [x19]
	bl	_WREG32
Lloh28:
	adrp	x8, _mmVCE_RB_BASE_HI@GOTPAGE
Lloh29:
	ldr	x8, [x8, _mmVCE_RB_BASE_HI@GOTPAGEOFF]
Lloh30:
	ldr	w22, [x8]
	ldr	w0, [x19]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x22
	bl	_WREG32
Lloh31:
	adrp	x8, _mmVCE_RB_SIZE@GOTPAGE
Lloh32:
	ldr	x8, [x8, _mmVCE_RB_SIZE@GOTPAGEOFF]
Lloh33:
	ldr	w0, [x8]
	ldr	w8, [x19, #4]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w1, w8, #2
	bl	_WREG32
	ldr	x19, [x20, #24]
Lloh34:
	adrp	x8, _mmVCE_RB_RPTR2@GOTPAGE
Lloh35:
	ldr	x8, [x8, _mmVCE_RB_RPTR2@GOTPAGEOFF]
Lloh36:
	ldr	w22, [x8]
	ldr	w0, [x19, #20]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x22
	bl	_WREG32
Lloh37:
	adrp	x8, _mmVCE_RB_WPTR2@GOTPAGE
Lloh38:
	ldr	x8, [x8, _mmVCE_RB_WPTR2@GOTPAGEOFF]
Lloh39:
	ldr	w22, [x8]
	ldr	w0, [x19, #20]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x22
	bl	_WREG32
Lloh40:
	adrp	x8, _mmVCE_RB_BASE_LO2@GOTPAGE
Lloh41:
	ldr	x8, [x8, _mmVCE_RB_BASE_LO2@GOTPAGEOFF]
Lloh42:
	ldr	w0, [x8]
	ldr	w1, [x19, #12]
	bl	_WREG32
Lloh43:
	adrp	x8, _mmVCE_RB_BASE_HI2@GOTPAGE
Lloh44:
	ldr	x8, [x8, _mmVCE_RB_BASE_HI2@GOTPAGEOFF]
Lloh45:
	ldr	w22, [x8]
	ldr	w0, [x19, #12]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x22
	bl	_WREG32
Lloh46:
	adrp	x8, _mmVCE_RB_SIZE2@GOTPAGE
Lloh47:
	ldr	x8, [x8, _mmVCE_RB_SIZE2@GOTPAGEOFF]
Lloh48:
	ldr	w0, [x8]
	ldr	w8, [x19, #16]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w1, w8, #2
	bl	_WREG32
	ldr	x19, [x20, #24]
Lloh49:
	adrp	x8, _mmVCE_RB_RPTR3@GOTPAGE
Lloh50:
	ldr	x8, [x8, _mmVCE_RB_RPTR3@GOTPAGEOFF]
Lloh51:
	ldr	w22, [x8]
	ldr	w0, [x19, #32]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x22
	bl	_WREG32
Lloh52:
	adrp	x8, _mmVCE_RB_WPTR3@GOTPAGE
Lloh53:
	ldr	x8, [x8, _mmVCE_RB_WPTR3@GOTPAGEOFF]
Lloh54:
	ldr	w22, [x8]
	ldr	w0, [x19, #32]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x22
	bl	_WREG32
Lloh55:
	adrp	x8, _mmVCE_RB_BASE_LO3@GOTPAGE
Lloh56:
	ldr	x8, [x8, _mmVCE_RB_BASE_LO3@GOTPAGEOFF]
Lloh57:
	ldr	w0, [x8]
	ldr	w1, [x19, #24]
	bl	_WREG32
Lloh58:
	adrp	x8, _mmVCE_RB_BASE_HI3@GOTPAGE
Lloh59:
	ldr	x8, [x8, _mmVCE_RB_BASE_HI3@GOTPAGEOFF]
Lloh60:
	ldr	w22, [x8]
	ldr	w0, [x19, #24]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x22
	bl	_WREG32
Lloh61:
	adrp	x8, _mmVCE_RB_SIZE3@GOTPAGE
Lloh62:
	ldr	x8, [x8, _mmVCE_RB_SIZE3@GOTPAGEOFF]
Lloh63:
	ldr	w0, [x8]
	ldr	w8, [x19, #28]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w1, w8, #2
	bl	_WREG32
LBB0_8:                                 ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x20
	mov	x1, x21
	bl	_vce_v3_0_mc_resume
	ldr	w0, [x28]
	ldr	w1, [x24]
	mov	w2, #1
	bl	_WREG32_FIELD
	ldr	x8, [x20]
Lloh64:
	adrp	x9, _CHIP_STONEY@GOTPAGE
Lloh65:
	ldr	x9, [x9, _CHIP_STONEY@GOTPAGEOFF]
Lloh66:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_1
; %bb.9:                                ;   in Loop: Header=BB0_4 Depth=1
Lloh67:
	adrp	x8, _mmVCE_VCPU_CNTL@GOTPAGE
Lloh68:
	ldr	x8, [x8, _mmVCE_VCPU_CNTL@GOTPAGEOFF]
Lloh69:
	ldr	w0, [x8]
	mov	w1, #1
	mov	w2, #65534
	movk	w2, #65503, lsl #16
	bl	_WREG32_P
	b	LBB0_2
LBB0_10:
	ldr	w0, [x23]
Lloh70:
	adrp	x8, _mmGRBM_GFX_INDEX_DEFAULT@GOTPAGE
Lloh71:
	ldr	x8, [x8, _mmGRBM_GFX_INDEX_DEFAULT@GOTPAGEOFF]
Lloh72:
	ldr	w1, [x8]
	bl	_WREG32
	mov	w21, #0
	b	LBB0_12
LBB0_11:
Lloh73:
	adrp	x0, l_.str@PAGE
Lloh74:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
LBB0_12:
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
	bl	_mutex_unlock
	mov	x0, x21
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpAdd	Lloh73, Lloh74
	.cfi_endproc
                                        ; -- End function
	.comm	_mmGRBM_GFX_INDEX,4,2           ; @mmGRBM_GFX_INDEX
	.comm	_AMDGPU_VCE_HARVEST_VCE0,4,2    ; @AMDGPU_VCE_HARVEST_VCE0
	.comm	_mmVCE_RB_RPTR,4,2              ; @mmVCE_RB_RPTR
	.comm	_mmVCE_RB_WPTR,4,2              ; @mmVCE_RB_WPTR
	.comm	_mmVCE_RB_BASE_LO,4,2           ; @mmVCE_RB_BASE_LO
	.comm	_mmVCE_RB_BASE_HI,4,2           ; @mmVCE_RB_BASE_HI
	.comm	_mmVCE_RB_SIZE,4,2              ; @mmVCE_RB_SIZE
	.comm	_mmVCE_RB_RPTR2,4,2             ; @mmVCE_RB_RPTR2
	.comm	_mmVCE_RB_WPTR2,4,2             ; @mmVCE_RB_WPTR2
	.comm	_mmVCE_RB_BASE_LO2,4,2          ; @mmVCE_RB_BASE_LO2
	.comm	_mmVCE_RB_BASE_HI2,4,2          ; @mmVCE_RB_BASE_HI2
	.comm	_mmVCE_RB_SIZE2,4,2             ; @mmVCE_RB_SIZE2
	.comm	_mmVCE_RB_RPTR3,4,2             ; @mmVCE_RB_RPTR3
	.comm	_mmVCE_RB_WPTR3,4,2             ; @mmVCE_RB_WPTR3
	.comm	_mmVCE_RB_BASE_LO3,4,2          ; @mmVCE_RB_BASE_LO3
	.comm	_mmVCE_RB_BASE_HI3,4,2          ; @mmVCE_RB_BASE_HI3
	.comm	_mmVCE_RB_SIZE3,4,2             ; @mmVCE_RB_SIZE3
	.comm	_VCE_STATUS,4,2                 ; @VCE_STATUS
	.comm	_JOB_BUSY,4,2                   ; @JOB_BUSY
	.comm	_CHIP_STONEY,8,3                ; @CHIP_STONEY
	.comm	_mmVCE_VCPU_CNTL,4,2            ; @mmVCE_VCPU_CNTL
	.comm	_VCE_VCPU_CNTL,4,2              ; @VCE_VCPU_CNTL
	.comm	_CLK_EN,4,2                     ; @CLK_EN
	.comm	_VCE_SOFT_RESET,4,2             ; @VCE_SOFT_RESET
	.comm	_ECPU_SOFT_RESET,4,2            ; @ECPU_SOFT_RESET
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"VCE not responding, giving up!!!\n"

	.comm	_mmGRBM_GFX_INDEX_DEFAULT,4,2   ; @mmGRBM_GFX_INDEX_DEFAULT
	.no_dead_strip	_vce_v3_0_start
.subsections_via_symbols
