	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_psb_irq_turn_off_dpst          ## -- Begin function psb_irq_turn_off_dpst
	.p2align	4, 0x90
_psb_irq_turn_off_dpst:                 ## @psb_irq_turn_off_dpst
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %r14
	xorl	%esi, %esi
	callq	_gma_power_begin
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	_HISTOGRAM_INT_CONTROL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	xorl	%edi, %edi
	callq	_PSB_WVDC32
	movl	(%r15), %edi
	callq	_PSB_RVDC32
	movq	_PIPE_DPST_EVENT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_psb_disable_pipestat
	movq	_PWM_CONTROL_LOGIC@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	callq	_PSB_RVDC32
	movq	_PWM_PHASEIN_INT_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	movl	(%r14), %esi
	callq	_PSB_WVDC32
	movl	(%r14), %edi
	callq	_PSB_RVDC32
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_gma_power_end                  ## TAILCALL
LBB0_1:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_HISTOGRAM_INT_CONTROL,4,2      ## @HISTOGRAM_INT_CONTROL
	.comm	_PIPE_DPST_EVENT_ENABLE,4,2     ## @PIPE_DPST_EVENT_ENABLE
	.comm	_PWM_CONTROL_LOGIC,4,2          ## @PWM_CONTROL_LOGIC
	.comm	_PWM_PHASEIN_INT_ENABLE,4,2     ## @PWM_PHASEIN_INT_ENABLE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_psb_irq_turn_off_dpst          ; -- Begin function psb_irq_turn_off_dpst
	.p2align	2
_psb_irq_turn_off_dpst:                 ; @psb_irq_turn_off_dpst
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0]
	mov	w1, #0
	bl	_gma_power_begin
	cbz	x0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x21, _HISTOGRAM_INT_CONTROL@GOTPAGE
Lloh1:
	ldr	x21, [x21, _HISTOGRAM_INT_CONTROL@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	w0, #0
	bl	_PSB_WVDC32
	ldr	w0, [x21]
	bl	_PSB_RVDC32
Lloh2:
	adrp	x8, _PIPE_DPST_EVENT_ENABLE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PIPE_DPST_EVENT_ENABLE@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #0
	bl	_psb_disable_pipestat
Lloh5:
	adrp	x20, _PWM_CONTROL_LOGIC@GOTPAGE
Lloh6:
	ldr	x20, [x20, _PWM_CONTROL_LOGIC@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	_PSB_RVDC32
Lloh7:
	adrp	x8, _PWM_PHASEIN_INT_ENABLE@GOTPAGE
Lloh8:
	ldr	x8, [x8, _PWM_PHASEIN_INT_ENABLE@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	bic	w0, w0, w8
	ldr	w1, [x20]
	bl	_PSB_WVDC32
	ldr	w0, [x20]
	bl	_PSB_RVDC32
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_gma_power_end
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_HISTOGRAM_INT_CONTROL,4,2      ; @HISTOGRAM_INT_CONTROL
	.comm	_PIPE_DPST_EVENT_ENABLE,4,2     ; @PIPE_DPST_EVENT_ENABLE
	.comm	_PWM_CONTROL_LOGIC,4,2          ; @PWM_CONTROL_LOGIC
	.comm	_PWM_PHASEIN_INT_ENABLE,4,2     ; @PWM_PHASEIN_INT_ENABLE
.subsections_via_symbols
