	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_dpm_enable_uvd          ## -- Begin function radeon_dpm_enable_uvd
	.p2align	4, 0x90
_radeon_dpm_enable_uvd:                 ## @radeon_dpm_enable_uvd
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movq	32(%rdi), %rax
	cmpq	$0, (%rax)
	je	LBB0_1
## %bb.5:
	movq	%rbx, %rdi
	callq	_mutex_lock
	xorl	%eax, %eax
	cmpq	$0, 8(%rbx)
	setg	%al
	orl	%r14d, %eax
	xorl	%ecx, %ecx
	cmpq	$0, 16(%rbx)
	setg	%cl
	xorl	%esi, %esi
	orl	%eax, %ecx
	sete	%sil
	movq	%rbx, %rdi
	callq	_radeon_dpm_powergate_uvd
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_mutex_unlock                   ## TAILCALL
LBB0_1:
	movq	%rbx, %rdi
	callq	_mutex_lock
	testl	%r14d, %r14d
	je	LBB0_3
## %bb.2:
	movl	$1, 24(%rbx)
	movq	_POWER_STATE_TYPE_INTERNAL_UVD@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%rbx)
	jmp	LBB0_4
LBB0_3:
	movl	$0, 24(%rbx)
LBB0_4:
	movq	%rbx, %rdi
	callq	_mutex_unlock
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_radeon_pm_compute_clocks       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_POWER_STATE_TYPE_INTERNAL_UVD,4,2 ## @POWER_STATE_TYPE_INTERNAL_UVD
	.comm	_POWER_STATE_TYPE_INTERNAL_UVD_HD,4,2 ## @POWER_STATE_TYPE_INTERNAL_UVD_HD
	.comm	_POWER_STATE_TYPE_INTERNAL_UVD_HD2,4,2 ## @POWER_STATE_TYPE_INTERNAL_UVD_HD2
	.comm	_POWER_STATE_TYPE_INTERNAL_UVD_SD,4,2 ## @POWER_STATE_TYPE_INTERNAL_UVD_SD
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_dpm_enable_uvd          ; -- Begin function radeon_dpm_enable_uvd
	.p2align	2
_radeon_dpm_enable_uvd:                 ; @radeon_dpm_enable_uvd
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	ldr	x8, [x0, #32]
	ldr	x8, [x8]
	cbz	x8, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_mutex_lock
	ldp	x8, x9, [x19, #8]
	cmp	x8, #0
	cset	w8, gt
	orr	w8, w8, w20
	cmp	x9, #0
	cset	w9, gt
	orr	w8, w8, w9
	cmp	w8, #0
	cset	w1, eq
	mov	x0, x19
	bl	_radeon_dpm_powergate_uvd
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_mutex_unlock
LBB0_2:
	mov	x0, x19
	bl	_mutex_lock
	cbz	w20, LBB0_4
; %bb.3:
	mov	w8, #1
Lloh0:
	adrp	x9, _POWER_STATE_TYPE_INTERNAL_UVD@GOTPAGE
Lloh1:
	ldr	x9, [x9, _POWER_STATE_TYPE_INTERNAL_UVD@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	stp	w8, w9, [x19, #24]
	b	LBB0_5
LBB0_4:
	str	wzr, [x19, #24]
LBB0_5:
	mov	x0, x19
	bl	_mutex_unlock
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_radeon_pm_compute_clocks
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_POWER_STATE_TYPE_INTERNAL_UVD,4,2 ; @POWER_STATE_TYPE_INTERNAL_UVD
	.comm	_POWER_STATE_TYPE_INTERNAL_UVD_HD,4,2 ; @POWER_STATE_TYPE_INTERNAL_UVD_HD
	.comm	_POWER_STATE_TYPE_INTERNAL_UVD_HD2,4,2 ; @POWER_STATE_TYPE_INTERNAL_UVD_HD2
	.comm	_POWER_STATE_TYPE_INTERNAL_UVD_SD,4,2 ; @POWER_STATE_TYPE_INTERNAL_UVD_SD
.subsections_via_symbols
