	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_ttm_set_active_vram_size ## -- Begin function radeon_ttm_set_active_vram_size
	.p2align	4, 0x90
_radeon_ttm_set_active_vram_size:       ## @radeon_ttm_set_active_vram_size
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	cmpl	$0, 8(%rdi)
	je	LBB0_2
## %bb.1:
	movq	(%rdi), %rax
	movq	_TTM_PL_VRAM@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %esi
	movl	%esi, (%rax,%rdx,4)
LBB0_2:
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TTM_PL_VRAM,8,3                ## @TTM_PL_VRAM
	.comm	_PAGE_SHIFT,4,2                 ## @PAGE_SHIFT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_ttm_set_active_vram_size ; -- Begin function radeon_ttm_set_active_vram_size
	.p2align	2
_radeon_ttm_set_active_vram_size:       ; @radeon_ttm_set_active_vram_size
	.cfi_startproc
; %bb.0:
	ldr	w8, [x0, #8]
	cbz	w8, LBB0_2
; %bb.1:
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _TTM_PL_VRAM@GOTPAGE
Lloh1:
	ldr	x9, [x9, _TTM_PL_VRAM@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
Lloh3:
	adrp	x10, _PAGE_SHIFT@GOTPAGE
Lloh4:
	ldr	x10, [x10, _PAGE_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	asr	w10, w1, w10
	str	w10, [x8, x9, lsl #2]
LBB0_2:
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_TTM_PL_VRAM,8,3                ; @TTM_PL_VRAM
	.comm	_PAGE_SHIFT,4,2                 ; @PAGE_SHIFT
.subsections_via_symbols
