	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_gmbus_is_valid_pin       ## -- Begin function intel_gmbus_is_valid_pin
	.p2align	4, 0x90
_intel_gmbus_is_valid_pin:              ## @intel_gmbus_is_valid_pin
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	callq	_INTEL_PCH_TYPE
	movq	_PCH_ICP@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_1
## %bb.2:
	movq	%rbx, %rdi
	callq	_HAS_PCH_CNP
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_gmbus_pins_cnp@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_1:
	movq	_gmbus_pins_icp@GOTPCREL(%rip), %rax
LBB0_11:
	movl	(%rax), %edi
	callq	_ARRAY_SIZE
	movl	%eax, %ecx
	xorl	%eax, %eax
	cmpl	%r14d, %ecx
	jbe	LBB0_13
## %bb.12:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_get_gmbus_pin
	movq	%rax, %rcx
	xorl	%eax, %eax
	cmpq	$0, (%rcx)
	setne	%al
LBB0_13:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_4:
	movq	%rbx, %rdi
	callq	_IS_GEN9_LP
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movq	_gmbus_pins_bxt@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_6:
	movq	%rbx, %rdi
	callq	_IS_GEN9_BC
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:
	movq	_gmbus_pins_skl@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_8:
	movq	%rbx, %rdi
	callq	_IS_BROADWELL
	testq	%rax, %rax
	jne	LBB0_9
## %bb.10:
	movq	_gmbus_pins@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_9:
	movq	_gmbus_pins_bdw@GOTPCREL(%rip), %rax
	jmp	LBB0_11
	.cfi_endproc
                                        ## -- End function
	.comm	_PCH_ICP,8,3                    ## @PCH_ICP
	.comm	_gmbus_pins_icp,4,2             ## @gmbus_pins_icp
	.comm	_gmbus_pins_cnp,4,2             ## @gmbus_pins_cnp
	.comm	_gmbus_pins_bxt,4,2             ## @gmbus_pins_bxt
	.comm	_gmbus_pins_skl,4,2             ## @gmbus_pins_skl
	.comm	_gmbus_pins_bdw,4,2             ## @gmbus_pins_bdw
	.comm	_gmbus_pins,4,2                 ## @gmbus_pins
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_gmbus_is_valid_pin       ; -- Begin function intel_gmbus_is_valid_pin
	.p2align	2
_intel_gmbus_is_valid_pin:              ; @intel_gmbus_is_valid_pin
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	mov	x20, x0
	bl	_INTEL_PCH_TYPE
Lloh0:
	adrp	x8, _PCH_ICP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCH_ICP@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ge	LBB0_3
; %bb.1:
	mov	x0, x20
	bl	_HAS_PCH_CNP
	cbz	x0, LBB0_8
; %bb.2:
Lloh3:
	adrp	x8, _gmbus_pins_cnp@GOTPAGE
Lloh4:
	ldr	x8, [x8, _gmbus_pins_cnp@GOTPAGEOFF]
	b	LBB0_4
LBB0_3:
Lloh5:
	adrp	x8, _gmbus_pins_icp@GOTPAGE
Lloh6:
	ldr	x8, [x8, _gmbus_pins_icp@GOTPAGEOFF]
LBB0_4:
	ldr	w0, [x8]
	bl	_ARRAY_SIZE
	cmp	w0, w19
	b.ls	LBB0_6
; %bb.5:
	mov	x0, x20
	mov	x1, x19
	bl	_get_gmbus_pin
	ldr	x8, [x0]
	cmp	x8, #0
	cset	w0, ne
	b	LBB0_7
LBB0_6:
	mov	w0, #0
LBB0_7:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_8:
	mov	x0, x20
	bl	_IS_GEN9_LP
	cbz	x0, LBB0_10
; %bb.9:
Lloh7:
	adrp	x8, _gmbus_pins_bxt@GOTPAGE
Lloh8:
	ldr	x8, [x8, _gmbus_pins_bxt@GOTPAGEOFF]
	b	LBB0_4
LBB0_10:
	mov	x0, x20
	bl	_IS_GEN9_BC
	cbz	x0, LBB0_12
; %bb.11:
Lloh9:
	adrp	x8, _gmbus_pins_skl@GOTPAGE
Lloh10:
	ldr	x8, [x8, _gmbus_pins_skl@GOTPAGEOFF]
	b	LBB0_4
LBB0_12:
	mov	x0, x20
	bl	_IS_BROADWELL
Lloh11:
	adrp	x8, _gmbus_pins_bdw@GOTPAGE
Lloh12:
	ldr	x8, [x8, _gmbus_pins_bdw@GOTPAGEOFF]
Lloh13:
	adrp	x9, _gmbus_pins@GOTPAGE
Lloh14:
	ldr	x9, [x9, _gmbus_pins@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x9, x8, eq
	b	LBB0_4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_PCH_ICP,8,3                    ; @PCH_ICP
	.comm	_gmbus_pins_icp,4,2             ; @gmbus_pins_icp
	.comm	_gmbus_pins_cnp,4,2             ; @gmbus_pins_cnp
	.comm	_gmbus_pins_bxt,4,2             ; @gmbus_pins_bxt
	.comm	_gmbus_pins_skl,4,2             ; @gmbus_pins_skl
	.comm	_gmbus_pins_bdw,4,2             ; @gmbus_pins_bdw
	.comm	_gmbus_pins,4,2                 ; @gmbus_pins
.subsections_via_symbols
