	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dpu_encoder_phys_cmd_init_ops
_dpu_encoder_phys_cmd_init_ops:         ## @dpu_encoder_phys_cmd_init_ops
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_dpu_encoder_phys_cmd_is_master@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 72(%rdi)
	movq	_dpu_encoder_phys_cmd_mode_set@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 68(%rdi)
	movq	_dpu_encoder_phys_cmd_mode_fixup@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%rdi)
	movq	_dpu_encoder_phys_cmd_enable@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 60(%rdi)
	movq	_dpu_encoder_phys_cmd_disable@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%rdi)
	movq	_dpu_encoder_phys_cmd_destroy@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 52(%rdi)
	movq	_dpu_encoder_phys_cmd_get_hw_resources@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%rdi)
	movq	_dpu_encoder_phys_cmd_control_vblank_irq@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 44(%rdi)
	movq	_dpu_encoder_phys_cmd_wait_for_commit_done@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rdi)
	movq	_dpu_encoder_phys_cmd_prepare_for_kickoff@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 36(%rdi)
	movq	_dpu_encoder_phys_cmd_wait_for_tx_complete@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rdi)
	movq	_dpu_encoder_phys_cmd_wait_for_vblank@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%rdi)
	movq	_dpu_encoder_phys_cmd_trigger_start@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rdi)
	movq	_dpu_encoder_phys_cmd_needs_single_flush@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%rdi)
	movq	_dpu_encoder_phys_cmd_irq_control@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rdi)
	movq	_dpu_encoder_phys_cmd_enable_helper@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%rdi)
	movq	_dpu_encoder_phys_cmd_prepare_idle_pc@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rdi)
	movq	_dpu_encoder_phys_cmd_handle_post_kickoff@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 4(%rdi)
	movq	_dpu_encoder_phys_cmd_get_line_count@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%rdi)
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_dpu_encoder_phys_cmd_is_master,4,2 ## @dpu_encoder_phys_cmd_is_master
	.comm	_dpu_encoder_phys_cmd_mode_set,4,2 ## @dpu_encoder_phys_cmd_mode_set
	.comm	_dpu_encoder_phys_cmd_mode_fixup,4,2 ## @dpu_encoder_phys_cmd_mode_fixup
	.comm	_dpu_encoder_phys_cmd_enable,4,2 ## @dpu_encoder_phys_cmd_enable
	.comm	_dpu_encoder_phys_cmd_disable,4,2 ## @dpu_encoder_phys_cmd_disable
	.comm	_dpu_encoder_phys_cmd_destroy,4,2 ## @dpu_encoder_phys_cmd_destroy
	.comm	_dpu_encoder_phys_cmd_get_hw_resources,4,2 ## @dpu_encoder_phys_cmd_get_hw_resources
	.comm	_dpu_encoder_phys_cmd_control_vblank_irq,4,2 ## @dpu_encoder_phys_cmd_control_vblank_irq
	.comm	_dpu_encoder_phys_cmd_wait_for_commit_done,4,2 ## @dpu_encoder_phys_cmd_wait_for_commit_done
	.comm	_dpu_encoder_phys_cmd_prepare_for_kickoff,4,2 ## @dpu_encoder_phys_cmd_prepare_for_kickoff
	.comm	_dpu_encoder_phys_cmd_wait_for_tx_complete,4,2 ## @dpu_encoder_phys_cmd_wait_for_tx_complete
	.comm	_dpu_encoder_phys_cmd_wait_for_vblank,4,2 ## @dpu_encoder_phys_cmd_wait_for_vblank
	.comm	_dpu_encoder_phys_cmd_trigger_start,4,2 ## @dpu_encoder_phys_cmd_trigger_start
	.comm	_dpu_encoder_phys_cmd_needs_single_flush,4,2 ## @dpu_encoder_phys_cmd_needs_single_flush
	.comm	_dpu_encoder_phys_cmd_irq_control,4,2 ## @dpu_encoder_phys_cmd_irq_control
	.comm	_dpu_encoder_phys_cmd_enable_helper,4,2 ## @dpu_encoder_phys_cmd_enable_helper
	.comm	_dpu_encoder_phys_cmd_prepare_idle_pc,4,2 ## @dpu_encoder_phys_cmd_prepare_idle_pc
	.comm	_dpu_encoder_phys_cmd_handle_post_kickoff,4,2 ## @dpu_encoder_phys_cmd_handle_post_kickoff
	.comm	_dpu_encoder_phys_cmd_get_line_count,4,2 ## @dpu_encoder_phys_cmd_get_line_count
	.no_dead_strip	_dpu_encoder_phys_cmd_init_ops
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dpu_encoder_phys_cmd_init_ops
_dpu_encoder_phys_cmd_init_ops:         ; @dpu_encoder_phys_cmd_init_ops
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _dpu_encoder_phys_cmd_is_master@GOTPAGE
Lloh1:
	ldr	x8, [x8, _dpu_encoder_phys_cmd_is_master@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [x0, #72]
Lloh3:
	adrp	x8, _dpu_encoder_phys_cmd_mode_set@GOTPAGE
Lloh4:
	ldr	x8, [x8, _dpu_encoder_phys_cmd_mode_set@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _dpu_encoder_phys_cmd_mode_fixup@GOTPAGE
Lloh7:
	ldr	x9, [x9, _dpu_encoder_phys_cmd_mode_fixup@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #64]
Lloh9:
	adrp	x8, _dpu_encoder_phys_cmd_enable@GOTPAGE
Lloh10:
	ldr	x8, [x8, _dpu_encoder_phys_cmd_enable@GOTPAGEOFF]
Lloh11:
	adrp	x9, _dpu_encoder_phys_cmd_disable@GOTPAGE
Lloh12:
	ldr	x9, [x9, _dpu_encoder_phys_cmd_disable@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
Lloh14:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #56]
Lloh15:
	adrp	x8, _dpu_encoder_phys_cmd_destroy@GOTPAGE
Lloh16:
	ldr	x8, [x8, _dpu_encoder_phys_cmd_destroy@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
Lloh18:
	adrp	x9, _dpu_encoder_phys_cmd_get_hw_resources@GOTPAGE
Lloh19:
	ldr	x9, [x9, _dpu_encoder_phys_cmd_get_hw_resources@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #48]
Lloh21:
	adrp	x8, _dpu_encoder_phys_cmd_control_vblank_irq@GOTPAGE
Lloh22:
	ldr	x8, [x8, _dpu_encoder_phys_cmd_control_vblank_irq@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
Lloh24:
	adrp	x9, _dpu_encoder_phys_cmd_wait_for_commit_done@GOTPAGE
Lloh25:
	ldr	x9, [x9, _dpu_encoder_phys_cmd_wait_for_commit_done@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #40]
Lloh27:
	adrp	x8, _dpu_encoder_phys_cmd_prepare_for_kickoff@GOTPAGE
Lloh28:
	ldr	x8, [x8, _dpu_encoder_phys_cmd_prepare_for_kickoff@GOTPAGEOFF]
Lloh29:
	adrp	x9, _dpu_encoder_phys_cmd_wait_for_tx_complete@GOTPAGE
Lloh30:
	ldr	x9, [x9, _dpu_encoder_phys_cmd_wait_for_tx_complete@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
Lloh32:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #32]
Lloh33:
	adrp	x8, _dpu_encoder_phys_cmd_wait_for_vblank@GOTPAGE
Lloh34:
	ldr	x8, [x8, _dpu_encoder_phys_cmd_wait_for_vblank@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
Lloh36:
	adrp	x9, _dpu_encoder_phys_cmd_trigger_start@GOTPAGE
Lloh37:
	ldr	x9, [x9, _dpu_encoder_phys_cmd_trigger_start@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #24]
Lloh39:
	adrp	x8, _dpu_encoder_phys_cmd_needs_single_flush@GOTPAGE
Lloh40:
	ldr	x8, [x8, _dpu_encoder_phys_cmd_needs_single_flush@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
Lloh42:
	adrp	x9, _dpu_encoder_phys_cmd_irq_control@GOTPAGE
Lloh43:
	ldr	x9, [x9, _dpu_encoder_phys_cmd_irq_control@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #16]
Lloh45:
	adrp	x8, _dpu_encoder_phys_cmd_enable_helper@GOTPAGE
Lloh46:
	ldr	x8, [x8, _dpu_encoder_phys_cmd_enable_helper@GOTPAGEOFF]
Lloh47:
	adrp	x9, _dpu_encoder_phys_cmd_prepare_idle_pc@GOTPAGE
Lloh48:
	ldr	x9, [x9, _dpu_encoder_phys_cmd_prepare_idle_pc@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
Lloh50:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #8]
Lloh51:
	adrp	x8, _dpu_encoder_phys_cmd_handle_post_kickoff@GOTPAGE
Lloh52:
	ldr	x8, [x8, _dpu_encoder_phys_cmd_handle_post_kickoff@GOTPAGEOFF]
Lloh53:
	ldr	w8, [x8]
Lloh54:
	adrp	x9, _dpu_encoder_phys_cmd_get_line_count@GOTPAGE
Lloh55:
	ldr	x9, [x9, _dpu_encoder_phys_cmd_get_line_count@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
	stp	w9, w8, [x0]
	ret
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh49
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh31
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh13
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_dpu_encoder_phys_cmd_is_master,4,2 ; @dpu_encoder_phys_cmd_is_master
	.comm	_dpu_encoder_phys_cmd_mode_set,4,2 ; @dpu_encoder_phys_cmd_mode_set
	.comm	_dpu_encoder_phys_cmd_mode_fixup,4,2 ; @dpu_encoder_phys_cmd_mode_fixup
	.comm	_dpu_encoder_phys_cmd_enable,4,2 ; @dpu_encoder_phys_cmd_enable
	.comm	_dpu_encoder_phys_cmd_disable,4,2 ; @dpu_encoder_phys_cmd_disable
	.comm	_dpu_encoder_phys_cmd_destroy,4,2 ; @dpu_encoder_phys_cmd_destroy
	.comm	_dpu_encoder_phys_cmd_get_hw_resources,4,2 ; @dpu_encoder_phys_cmd_get_hw_resources
	.comm	_dpu_encoder_phys_cmd_control_vblank_irq,4,2 ; @dpu_encoder_phys_cmd_control_vblank_irq
	.comm	_dpu_encoder_phys_cmd_wait_for_commit_done,4,2 ; @dpu_encoder_phys_cmd_wait_for_commit_done
	.comm	_dpu_encoder_phys_cmd_prepare_for_kickoff,4,2 ; @dpu_encoder_phys_cmd_prepare_for_kickoff
	.comm	_dpu_encoder_phys_cmd_wait_for_tx_complete,4,2 ; @dpu_encoder_phys_cmd_wait_for_tx_complete
	.comm	_dpu_encoder_phys_cmd_wait_for_vblank,4,2 ; @dpu_encoder_phys_cmd_wait_for_vblank
	.comm	_dpu_encoder_phys_cmd_trigger_start,4,2 ; @dpu_encoder_phys_cmd_trigger_start
	.comm	_dpu_encoder_phys_cmd_needs_single_flush,4,2 ; @dpu_encoder_phys_cmd_needs_single_flush
	.comm	_dpu_encoder_phys_cmd_irq_control,4,2 ; @dpu_encoder_phys_cmd_irq_control
	.comm	_dpu_encoder_phys_cmd_enable_helper,4,2 ; @dpu_encoder_phys_cmd_enable_helper
	.comm	_dpu_encoder_phys_cmd_prepare_idle_pc,4,2 ; @dpu_encoder_phys_cmd_prepare_idle_pc
	.comm	_dpu_encoder_phys_cmd_handle_post_kickoff,4,2 ; @dpu_encoder_phys_cmd_handle_post_kickoff
	.comm	_dpu_encoder_phys_cmd_get_line_count,4,2 ; @dpu_encoder_phys_cmd_get_line_count
	.no_dead_strip	_dpu_encoder_phys_cmd_init_ops
.subsections_via_symbols
