	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_dsc_disable              ## -- Begin function intel_dsc_disable
	.p2align	4, 0x90
_intel_dsc_disable:                     ## @intel_dsc_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movl	12(%rdi), %edi
	callq	_to_intel_crtc
	movq	%rax, %rbx
	movl	4(%rax), %edi
	callq	_to_i915
	cmpl	$0, 8(%r13)
	je	LBB0_5
## %bb.1:
	movq	%rax, %r14
	movq	(%r13), %rax
	movq	_TRANSCODER_EDP@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_3
## %bb.2:
	movq	_DSS_CTL1@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_DSS_CTL2@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	jmp	LBB0_4
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movl	(%rbx), %ebx
	movl	%ebx, %edi
	callq	_ICL_PIPE_DSS_CTL1
	movl	%eax, %r12d
	movl	%ebx, %edi
	callq	_ICL_PIPE_DSS_CTL2
	movl	%eax, %r15d
LBB0_4:
	movl	%r12d, %edi
	callq	_I915_READ
	movq	_JOINER_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, %edx
	andl	%eax, %edx
	notl	%ecx
	xorl	%ebx, %ebx
	cmpl	$1, %edx
	movl	$0, %esi
	sbbl	%esi, %esi
	orl	%ecx, %esi
	andl	%eax, %esi
	movl	%r12d, %edi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_I915_READ
	movq	_LEFT_BRANCH_VDSC_ENABLE@GOTPCREL(%rip), %rcx
	movq	_RIGHT_BRANCH_VDSC_ENABLE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movl	%edx, %ecx
	andl	%eax, %ecx
	notl	%edx
	cmpl	$1, %ecx
	sbbl	%ebx, %ebx
	orl	%edx, %ebx
	andl	%eax, %ebx
	movl	%r15d, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movq	%r13, %rdi
	callq	_intel_dsc_power_domain
	movq	%r14, %rdi
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_display_power_put_unchecked ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_TRANSCODER_EDP,8,3             ## @TRANSCODER_EDP
	.comm	_DSS_CTL1,4,2                   ## @DSS_CTL1
	.comm	_DSS_CTL2,4,2                   ## @DSS_CTL2
	.comm	_JOINER_ENABLE,4,2              ## @JOINER_ENABLE
	.comm	_LEFT_BRANCH_VDSC_ENABLE,4,2    ## @LEFT_BRANCH_VDSC_ENABLE
	.comm	_RIGHT_BRANCH_VDSC_ENABLE,4,2   ## @RIGHT_BRANCH_VDSC_ENABLE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_dsc_disable              ; -- Begin function intel_dsc_disable
	.p2align	2
_intel_dsc_disable:                     ; @intel_dsc_disable
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	w0, [x0, #12]
	bl	_to_intel_crtc
	mov	x21, x0
	ldr	w0, [x0, #4]
	bl	_to_i915
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_3
; %bb.1:
	mov	x20, x0
	ldr	x8, [x19]
Lloh0:
	adrp	x9, _TRANSCODER_EDP@GOTPAGE
Lloh1:
	ldr	x9, [x9, _TRANSCODER_EDP@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_4
; %bb.2:
Lloh3:
	adrp	x8, _DSS_CTL1@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DSS_CTL1@GOTPAGEOFF]
Lloh5:
	ldr	w22, [x8]
Lloh6:
	adrp	x8, _DSS_CTL2@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DSS_CTL2@GOTPAGEOFF]
Lloh8:
	ldr	w21, [x8]
	b	LBB0_5
LBB0_3:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_4:
	ldr	w21, [x21]
	mov	x0, x21
	bl	_ICL_PIPE_DSS_CTL1
	mov	x22, x0
	mov	x0, x21
	bl	_ICL_PIPE_DSS_CTL2
	mov	x21, x0
LBB0_5:
	mov	x0, x22
	bl	_I915_READ
Lloh9:
	adrp	x8, _JOINER_ENABLE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _JOINER_ENABLE@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	tst	w8, w0
	mov	w23, #-1
	csinv	w8, w23, w8, eq
	and	w1, w8, w0
	mov	x0, x22
	bl	_I915_WRITE
	mov	x0, x21
	bl	_I915_READ
Lloh12:
	adrp	x8, _LEFT_BRANCH_VDSC_ENABLE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _LEFT_BRANCH_VDSC_ENABLE@GOTPAGEOFF]
Lloh14:
	adrp	x9, _RIGHT_BRANCH_VDSC_ENABLE@GOTPAGE
Lloh15:
	ldr	x9, [x9, _RIGHT_BRANCH_VDSC_ENABLE@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	ldr	w9, [x9]
	orr	w8, w9, w8
	tst	w8, w0
	csinv	w8, w23, w8, eq
	and	w1, w0, w8
	mov	x0, x21
	bl	_I915_WRITE
	mov	x0, x19
	bl	_intel_dsc_power_domain
	mov	x1, x0
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_intel_display_power_put_unchecked
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh16
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_TRANSCODER_EDP,8,3             ; @TRANSCODER_EDP
	.comm	_DSS_CTL1,4,2                   ; @DSS_CTL1
	.comm	_DSS_CTL2,4,2                   ; @DSS_CTL2
	.comm	_JOINER_ENABLE,4,2              ; @JOINER_ENABLE
	.comm	_LEFT_BRANCH_VDSC_ENABLE,4,2    ; @LEFT_BRANCH_VDSC_ENABLE
	.comm	_RIGHT_BRANCH_VDSC_ENABLE,4,2   ; @RIGHT_BRANCH_VDSC_ENABLE
.subsections_via_symbols
