	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smu8_apply_state_adjust_rules
_smu8_apply_state_adjust_rules:         ## @smu8_apply_state_adjust_rules
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rbx
	movq	%rsi, %r13
	movq	%rdi, %r12
	leaq	8(%rsi), %rdi
	callq	_cast_smu8_power_state
	movq	%rax, %r14
	addq	$8, %rbx
	movq	%rbx, %rdi
	callq	_cast_const_smu8_power_state
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	32(%r12), %r15
	movl	$1, (%r14)
	movq	_PP_StateUILabel_Battery@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	xorl	%ecx, %ecx
	cmpq	(%r13), %rax
	sete	%cl
	movl	%ecx, (%r15)
	movq	8(%r12), %rax
	movq	(%rax), %rbx
	testq	%rbx, %rbx
	jne	LBB0_2
## %bb.1:
	movq	8(%r15), %rax
	movq	8(%rax), %rbx
LBB0_2:
	movl	24(%r12), %edi
	movq	_PHM_PlatformCaps_StablePState@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_phm_cap_enabled
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	16(%r12), %rbx
LBB0_4:
	movq	8(%r15), %rax
	movq	_SMU8_NUM_NBPMEMORYCLOCK@GOTPCREL(%rip), %rcx
	movslq	(%rcx), %rcx
	cmpq	-8(%rax,%rcx,8), %rbx
	jle	LBB0_6
## %bb.5:
	xorl	%eax, %eax
	jmp	LBB0_7
LBB0_6:
	movq	8(%r12), %rax
	cmpl	$3, 8(%rax)
	setl	%al
LBB0_7:
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movq	8(%rcx), %rcx
	movq	%rcx, 8(%r14)
	movq	(%r12), %rdx
	movq	_AMD_DPM_FORCED_LEVEL_PROFILE_PEAK@GOTPCREL(%rip), %rsi
	cmpq	(%rsi), %rdx
	jne	LBB0_9
## %bb.8:
	movq	%r12, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_smu8_nbdpm_pstate_enable_disable
	jmp	LBB0_17
LBB0_9:
	movq	_AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD@GOTPCREL(%rip), %rsi
	cmpq	(%rsi), %rdx
	jne	LBB0_11
## %bb.10:
	movq	%r12, %rdi
	xorl	%esi, %esi
	movl	$1, %edx
	callq	_smu8_nbdpm_pstate_enable_disable
	jmp	LBB0_17
LBB0_11:
	movq	_FORCE_HIGH@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	cmpq	%rdx, %rcx
	sete	%bl
	andb	%al, %bl
	cmpb	$1, %bl
	jne	LBB0_13
## %bb.12:
	movq	_CANCEL_FORCE_HIGH@GOTPCREL(%rip), %rax
	jmp	LBB0_16
LBB0_13:
	cmpq	%rdx, %rcx
	sete	%cl
	orb	%cl, %al
	je	LBB0_14
## %bb.15:
	movq	_DO_NOTHING@GOTPCREL(%rip), %rax
LBB0_16:
	movq	(%rax), %rax
	movq	%rax, 8(%r14)
	jmp	LBB0_17
LBB0_14:
	movq	%rdx, 8(%r14)
LBB0_17:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PP_StateUILabel_Battery,8,3    ## @PP_StateUILabel_Battery
	.comm	_PHM_PlatformCaps_StablePState,4,2 ## @PHM_PlatformCaps_StablePState
	.comm	_SMU8_NUM_NBPMEMORYCLOCK,4,2    ## @SMU8_NUM_NBPMEMORYCLOCK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_PEAK,8,3 ## @AMD_DPM_FORCED_LEVEL_PROFILE_PEAK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD,8,3 ## @AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD
	.comm	_FORCE_HIGH,8,3                 ## @FORCE_HIGH
	.comm	_CANCEL_FORCE_HIGH,8,3          ## @CANCEL_FORCE_HIGH
	.comm	_DO_NOTHING,8,3                 ## @DO_NOTHING
	.no_dead_strip	_smu8_apply_state_adjust_rules
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smu8_apply_state_adjust_rules
_smu8_apply_state_adjust_rules:         ; @smu8_apply_state_adjust_rules
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x22, x1
	mov	x20, x0
	add	x0, x1, #8
	bl	_cast_smu8_power_state
	mov	x19, x0
	add	x0, x21, #8
	bl	_cast_const_smu8_power_state
	mov	x21, x0
	ldr	x23, [x20, #32]
	mov	w8, #1
	str	w8, [x19]
Lloh0:
	adrp	x8, _PP_StateUILabel_Battery@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PP_StateUILabel_Battery@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	ldr	x9, [x22]
	cmp	x8, x9
	cset	w8, eq
	str	w8, [x23]
	ldr	x8, [x20, #8]
	ldr	x22, [x8]
	cbnz	x22, LBB0_2
; %bb.1:
	ldr	x8, [x23, #8]
	ldr	x22, [x8, #8]
LBB0_2:
	ldr	w0, [x20, #24]
Lloh3:
	adrp	x8, _PHM_PlatformCaps_StablePState@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PHM_PlatformCaps_StablePState@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_phm_cap_enabled
	cbz	x0, LBB0_4
; %bb.3:
	ldr	x22, [x20, #16]
LBB0_4:
	ldr	x8, [x23, #8]
Lloh6:
	adrp	x9, _SMU8_NUM_NBPMEMORYCLOCK@GOTPAGE
Lloh7:
	ldr	x9, [x9, _SMU8_NUM_NBPMEMORYCLOCK@GOTPAGEOFF]
Lloh8:
	ldrsw	x9, [x9]
	add	x8, x8, x9, lsl #3
	ldur	x8, [x8, #-8]
	cmp	x22, x8
	b.le	LBB0_6
; %bb.5:
	mov	w8, #0
	b	LBB0_7
LBB0_6:
	ldr	x8, [x20, #8]
	ldr	w8, [x8, #8]
	cmp	w8, #3
	cset	w8, lt
LBB0_7:
	ldr	x9, [x21, #8]
	str	x9, [x19, #8]
	ldr	x10, [x20]
Lloh9:
	adrp	x11, _AMD_DPM_FORCED_LEVEL_PROFILE_PEAK@GOTPAGE
Lloh10:
	ldr	x11, [x11, _AMD_DPM_FORCED_LEVEL_PROFILE_PEAK@GOTPAGEOFF]
Lloh11:
	ldr	x11, [x11]
	cmp	x10, x11
	b.ne	LBB0_9
; %bb.8:
	mov	x0, x20
	mov	w1, #0
	mov	w2, #0
	bl	_smu8_nbdpm_pstate_enable_disable
	b	LBB0_17
LBB0_9:
Lloh12:
	adrp	x11, _AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD@GOTPAGE
Lloh13:
	ldr	x11, [x11, _AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD@GOTPAGEOFF]
Lloh14:
	ldr	x11, [x11]
	cmp	x10, x11
	b.ne	LBB0_11
; %bb.10:
	mov	x0, x20
	mov	w1, #0
	mov	w2, #1
	bl	_smu8_nbdpm_pstate_enable_disable
	b	LBB0_17
LBB0_11:
Lloh15:
	adrp	x10, _FORCE_HIGH@GOTPAGE
Lloh16:
	ldr	x10, [x10, _FORCE_HIGH@GOTPAGEOFF]
Lloh17:
	ldr	x10, [x10]
	cmp	x9, x10
	cset	w11, eq
	and	w11, w8, w11
	cmp	w11, #1
	b.ne	LBB0_13
; %bb.12:
Lloh18:
	adrp	x8, _CANCEL_FORCE_HIGH@GOTPAGE
Lloh19:
	ldr	x8, [x8, _CANCEL_FORCE_HIGH@GOTPAGEOFF]
	b	LBB0_15
LBB0_13:
	cmp	x9, x10
	cset	w9, eq
	orr	w8, w8, w9
	tbz	w8, #0, LBB0_16
; %bb.14:
Lloh20:
	adrp	x8, _DO_NOTHING@GOTPAGE
Lloh21:
	ldr	x8, [x8, _DO_NOTHING@GOTPAGEOFF]
LBB0_15:
	ldr	x8, [x8]
	str	x8, [x19, #8]
	b	LBB0_17
LBB0_16:
	str	x10, [x19, #8]
LBB0_17:
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_PP_StateUILabel_Battery,8,3    ; @PP_StateUILabel_Battery
	.comm	_PHM_PlatformCaps_StablePState,4,2 ; @PHM_PlatformCaps_StablePState
	.comm	_SMU8_NUM_NBPMEMORYCLOCK,4,2    ; @SMU8_NUM_NBPMEMORYCLOCK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_PEAK,8,3 ; @AMD_DPM_FORCED_LEVEL_PROFILE_PEAK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD,8,3 ; @AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD
	.comm	_FORCE_HIGH,8,3                 ; @FORCE_HIGH
	.comm	_CANCEL_FORCE_HIGH,8,3          ; @CANCEL_FORCE_HIGH
	.comm	_DO_NOTHING,8,3                 ; @DO_NOTHING
	.no_dead_strip	_smu8_apply_state_adjust_rules
.subsections_via_symbols
