	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_parse_pplib_clock_info
_si_parse_pplib_clock_info:             ## @si_parse_pplib_clock_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r13
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movq	%rsi, %rbx
	movq	%rdi, %r15
	callq	_rv770_get_pi
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	movq	%r15, %rdi
	callq	_evergreen_get_pi
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	movq	%r15, %rdi
	callq	_si_get_pi
	movq	%rax, %r12
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	callq	_ni_get_ps
	movq	8(%rax), %r14
	movslq	-44(%rbp), %rcx                 ## 4-byte Folded Reload
	movq	%r12, %rbx
	movq	%rcx, %r12
	shlq	$5, %r12
	incl	%ecx
	movl	%ecx, (%rax)
	movl	28(%r13), %edi
	callq	_le16_to_cpu
	movl	%eax, (%r14,%r12)
	movl	(%r13), %ecx
	shll	$16, %ecx
	orl	%eax, %ecx
	movl	%ecx, (%r14,%r12)
	movl	24(%r13), %edi
	callq	_le16_to_cpu
	movl	%eax, 4(%r14,%r12)
	movl	4(%r13), %ecx
	shll	$16, %ecx
	orl	%eax, %ecx
	movl	%ecx, 4(%r14,%r12)
	movl	20(%r13), %edi
	callq	_le16_to_cpu
	leaq	(%r14,%r12), %rcx
	addq	$8, %rcx
	movq	%rcx, -64(%rbp)                 ## 8-byte Spill
	movq	%rax, 8(%r14,%r12)
	movl	16(%r13), %edi
	callq	_le16_to_cpu
	movq	%rax, 16(%r14,%r12)
	movl	12(%r13), %edi
	callq	_le32_to_cpu
	movl	%eax, 28(%r14,%r12)
	movl	68(%rbx), %edx
	movl	72(%rbx), %esi
	movl	8(%r13), %ecx
	movq	%r15, %rdi
	callq	_r600_get_pcie_gen_support
	movl	%eax, 24(%r14,%r12)
	movq	8(%r14,%r12), %rsi
	leaq	-120(%rbp), %rdx
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	movq	%r15, %rdi
	callq	_si_get_leakage_voltage_from_leakage_index
	movq	-64(%rbp), %rsi                 ## 8-byte Reload
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	-120(%rbp), %rax
	movq	%rax, (%rsi)
LBB0_2:
	leaq	(%r14,%r12), %r9
	addq	$16, %r9
	movq	_ATOM_PPLIB_CLASSIFICATION_ACPI@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	testl	%eax, (%rdi)
	movq	%rdi, %r8
	movq	-88(%rbp), %rdx                 ## 8-byte Reload
	je	LBB0_4
## %bb.3:
	leaq	(%r14,%r12), %rax
	addq	$24, %rax
	movq	(%rsi), %rcx
	movq	%rcx, (%rdx)
	movq	(%r9), %rcx
	movq	-80(%rbp), %rdi                 ## 8-byte Reload
	movq	%rcx, (%rdi)
	movl	(%rax), %eax
	movl	%eax, 64(%rbx)
LBB0_4:
	leaq	(%r14,%r12), %rdi
	cmpl	$0, -44(%rbp)                   ## 4-byte Folded Reload
	jne	LBB0_7
## %bb.5:
	movq	_ATOM_PPLIB_CLASSIFICATION2_ULV@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	4(%r8), %eax
	je	LBB0_7
## %bb.6:
	movl	$0, 8(%rbx)
	movups	(%rdi), %xmm0
	movups	16(%rdi), %xmm1
	movups	%xmm0, 32(%rbx)
	movups	%xmm1, 48(%rbx)
	movl	$0, 12(%rbx)
	movq	_SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rbx)
	movq	_SISLANDS_CGULVPARAMETER_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%rbx)
	movq	_SISLANDS_CGULVCONTROL_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rbx)
LBB0_7:
	movq	(%rsi), %rax
	cmpq	%rax, 8(%rdx)
	jle	LBB0_9
## %bb.8:
	movq	%rax, 8(%rdx)
LBB0_9:
	cmpq	%rax, 16(%rdx)
	jge	LBB0_11
## %bb.10:
	movq	%rax, 16(%rdx)
LBB0_11:
	leaq	(%r14,%r12), %r15
	addq	$4, %r15
	movl	(%r8), %eax
	movq	_ATOM_PPLIB_CLASSIFICATION_BOOT@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_13
## %bb.12:
	leaq	-112(%rbp), %rsi
	leaq	-104(%rbp), %rdx
	leaq	-96(%rbp), %rcx
	movq	%rdi, %r14
	movq	-56(%rbp), %r13                 ## 8-byte Reload
	movq	%r13, %rdi
	movq	%r9, %r12
	callq	_radeon_atombios_get_default_voltages
	movq	%r14, %rdi
	movq	%r12, %r9
	movq	-64(%rbp), %rsi                 ## 8-byte Reload
	movl	24(%r13), %eax
	movl	%eax, (%r15)
	movl	28(%r13), %eax
	movl	%eax, (%r14)
	movq	-112(%rbp), %rax
	movq	%rax, (%rsi)
	movq	-104(%rbp), %rax
	movq	%rax, (%r12)
	movq	-96(%rbp), %rax
	movq	%rax, (%rbx)
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %eax
LBB0_13:
	movq	_ATOM_PPLIB_CLASSIFICATION_UI_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_15
## %bb.14:
	movl	(%rdi), %eax
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movl	%eax, (%rcx)
	movl	(%r15), %eax
	movl	%eax, 4(%rcx)
	movq	(%rsi), %rax
	movq	%rax, 8(%rcx)
	movq	(%r9), %rax
	movq	%rax, 16(%rcx)
LBB0_15:
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ATOM_PPLIB_CLASSIFICATION_ACPI,4,2 ## @ATOM_PPLIB_CLASSIFICATION_ACPI
	.comm	_ATOM_PPLIB_CLASSIFICATION2_ULV,4,2 ## @ATOM_PPLIB_CLASSIFICATION2_ULV
	.comm	_SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT,4,2 ## @SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT
	.comm	_SISLANDS_CGULVPARAMETER_DFLT,4,2 ## @SISLANDS_CGULVPARAMETER_DFLT
	.comm	_SISLANDS_CGULVCONTROL_DFLT,4,2 ## @SISLANDS_CGULVCONTROL_DFLT
	.comm	_ATOM_PPLIB_CLASSIFICATION_BOOT,4,2 ## @ATOM_PPLIB_CLASSIFICATION_BOOT
	.comm	_ATOM_PPLIB_CLASSIFICATION_UI_MASK,4,2 ## @ATOM_PPLIB_CLASSIFICATION_UI_MASK
	.comm	_ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE,4,2 ## @ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE
	.no_dead_strip	_si_parse_pplib_clock_info
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_parse_pplib_clock_info
_si_parse_pplib_clock_info:             ; @si_parse_pplib_clock_info
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x25, x3
	mov	x23, x2
	mov	x20, x1
	mov	x19, x0
	bl	_rv770_get_pi
	mov	x22, x0
	mov	x0, x19
	bl	_evergreen_get_pi
	mov	x24, x0
	mov	x0, x19
	bl	_si_get_pi
	mov	x21, x0
	mov	x0, x20
	bl	_ni_get_ps
	ldr	x8, [x0, #8]
	sxtw	x9, w23
	add	x26, x8, x9, lsl #5
	add	w8, w23, #1
	str	w8, [x0]
	ldr	w0, [x25, #28]
	bl	_le16_to_cpu
	str	w0, [x26]
	ldr	w8, [x25]
	orr	w8, w0, w8, lsl #16
	str	w8, [x26]
	ldr	w0, [x25, #24]
	bl	_le16_to_cpu
	str	w0, [x26, #4]
	ldr	w8, [x25, #4]
	orr	w8, w0, w8, lsl #16
	str	w8, [x26, #4]
	ldr	w0, [x25, #20]
	bl	_le16_to_cpu
	mov	x27, x26
	str	x0, [x27, #8]!
	ldr	w0, [x25, #16]
	bl	_le16_to_cpu
	mov	x28, x26
	str	x0, [x28, #16]!
	ldr	w0, [x25, #12]
	bl	_le32_to_cpu
	str	w0, [x26, #28]
	ldp	w2, w1, [x21, #68]
	ldr	w3, [x25, #8]
	mov	x0, x19
	bl	_r600_get_pcie_gen_support
	mov	x25, x26
	str	w0, [x25, #24]!
	ldr	x1, [x27]
	add	x2, sp, #24
	mov	x0, x19
	bl	_si_get_leakage_voltage_from_leakage_index
	cbnz	w0, LBB0_2
; %bb.1:
	ldr	x8, [sp, #24]
	str	x8, [x27]
LBB0_2:
	ldr	w8, [x20]
Lloh0:
	adrp	x9, _ATOM_PPLIB_CLASSIFICATION_ACPI@GOTPAGE
Lloh1:
	ldr	x9, [x9, _ATOM_PPLIB_CLASSIFICATION_ACPI@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.3:
	ldr	x8, [x27]
	str	x8, [x22]
	ldr	x8, [x28]
	str	x8, [x24]
	ldr	w8, [x25]
	str	w8, [x21, #64]
LBB0_4:
	cbnz	w23, LBB0_7
; %bb.5:
	ldr	w8, [x20, #4]
Lloh3:
	adrp	x9, _ATOM_PPLIB_CLASSIFICATION2_ULV@GOTPAGE
Lloh4:
	ldr	x9, [x9, _ATOM_PPLIB_CLASSIFICATION2_ULV@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	and	w8, w9, w8
	cbz	w8, LBB0_7
; %bb.6:
	str	wzr, [x21, #8]
	ldp	q0, q1, [x26]
Lloh6:
	adrp	x8, _SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT@GOTPAGEOFF]
	stp	q0, q1, [x21, #32]
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x9, _SISLANDS_CGULVPARAMETER_DFLT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _SISLANDS_CGULVPARAMETER_DFLT@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	stp	w9, w8, [x21, #20]
Lloh12:
	adrp	x8, _SISLANDS_CGULVCONTROL_DFLT@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SISLANDS_CGULVCONTROL_DFLT@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	stp	wzr, w8, [x21, #12]
LBB0_7:
	ldr	x9, [x22, #8]
	ldr	x8, [x27]
	cmp	x9, x8
	b.le	LBB0_9
; %bb.8:
	str	x8, [x22, #8]
LBB0_9:
	ldr	x9, [x22, #16]
	cmp	x9, x8
	b.ge	LBB0_11
; %bb.10:
	str	x8, [x22, #16]
LBB0_11:
	ldr	w8, [x20]
Lloh15:
	adrp	x9, _ATOM_PPLIB_CLASSIFICATION_BOOT@GOTPAGE
Lloh16:
	ldr	x9, [x9, _ATOM_PPLIB_CLASSIFICATION_BOOT@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_13
; %bb.12:
	add	x1, sp, #16
	add	x2, sp, #8
	mov	x3, sp
	mov	x0, x19
	bl	_radeon_atombios_get_default_voltages
	ldr	d0, [x19, #24]
	rev64.2s	v0, v0
	str	d0, [x26]
	ldr	x8, [sp, #16]
	str	x8, [x27]
	ldr	x8, [sp, #8]
	str	x8, [x28]
	ldr	x8, [sp]
	str	x8, [x21]
	ldr	w8, [x20]
LBB0_13:
Lloh18:
	adrp	x9, _ATOM_PPLIB_CLASSIFICATION_UI_MASK@GOTPAGE
Lloh19:
	ldr	x9, [x9, _ATOM_PPLIB_CLASSIFICATION_UI_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh21:
	adrp	x9, _ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE@GOTPAGE
Lloh22:
	ldr	x9, [x9, _ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_15
; %bb.14:
	ldr	d0, [x26]
	str	d0, [x19]
	ldr	x8, [x27]
	str	x8, [x19, #8]
	ldr	x8, [x28]
	str	x8, [x19, #16]
LBB0_15:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.comm	_ATOM_PPLIB_CLASSIFICATION_ACPI,4,2 ; @ATOM_PPLIB_CLASSIFICATION_ACPI
	.comm	_ATOM_PPLIB_CLASSIFICATION2_ULV,4,2 ; @ATOM_PPLIB_CLASSIFICATION2_ULV
	.comm	_SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT,4,2 ; @SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT
	.comm	_SISLANDS_CGULVPARAMETER_DFLT,4,2 ; @SISLANDS_CGULVPARAMETER_DFLT
	.comm	_SISLANDS_CGULVCONTROL_DFLT,4,2 ; @SISLANDS_CGULVCONTROL_DFLT
	.comm	_ATOM_PPLIB_CLASSIFICATION_BOOT,4,2 ; @ATOM_PPLIB_CLASSIFICATION_BOOT
	.comm	_ATOM_PPLIB_CLASSIFICATION_UI_MASK,4,2 ; @ATOM_PPLIB_CLASSIFICATION_UI_MASK
	.comm	_ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE,4,2 ; @ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE
	.no_dead_strip	_si_parse_pplib_clock_info
.subsections_via_symbols
