	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function dce_virtual_sw_init
LCPI0_0:
	.long	16384                           ## 0x4000
	.long	16384                           ## 0x4000
	.long	24                              ## 0x18
	.long	1                               ## 0x1
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_dce_virtual_sw_init:                   ## @dce_virtual_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movq	_AMDGPU_IRQ_CLIENTID_LEGACY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	20(%rdi), %rcx
	callq	_amdgpu_irq_add_id
	testl	%eax, %eax
	jne	LBB0_9
## %bb.1:
	movq	8(%r14), %rax
	movq	$0, 32(%rax)
	movq	_amdgpu_mode_funcs@GOTPCREL(%rip), %rcx
	movq	%rcx, 24(%rax)
	movaps	LCPI0_0(%rip), %xmm0            ## xmm0 = [16384,16384,24,1]
	movups	%xmm0, (%rax)
	movl	16(%r14), %ecx
	movl	%ecx, 16(%rax)
	movq	%r14, %rdi
	callq	_amdgpu_display_modeset_create_props
	testl	%eax, %eax
	jne	LBB0_9
## %bb.2:
	movq	8(%r14), %rdi
	movabsq	$70368744194048, %rax           ## imm = 0x400000004000
	movq	%rax, (%rdi)
	cmpl	$0, (%r14)
	jle	LBB0_8
## %bb.3:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_dce_virtual_crtc_init
	testl	%eax, %eax
	jne	LBB0_9
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_dce_virtual_connector_encoder_init
	testl	%eax, %eax
	jne	LBB0_9
## %bb.4:                               ##   in Loop: Header=BB0_5 Depth=1
	incl	%ebx
	cmpl	(%r14), %ebx
	jl	LBB0_5
## %bb.7:
	movq	8(%r14), %rdi
LBB0_8:
	callq	_drm_kms_helper_poll_init
	movl	$1, 4(%r14)
	xorl	%eax, %eax
LBB0_9:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ## @AMDGPU_IRQ_CLIENTID_LEGACY
	.comm	_VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER,4,2 ## @VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER
	.comm	_amdgpu_mode_funcs,4,2          ## @amdgpu_mode_funcs
	.no_dead_strip	_dce_virtual_sw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ; -- Begin function dce_virtual_sw_init
lCPI0_0:
	.long	16384                           ; 0x4000
	.long	16384                           ; 0x4000
	.long	24                              ; 0x18
	.long	1                               ; 0x1
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_dce_virtual_sw_init:                   ; @dce_virtual_sw_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	add	x3, x0, #20
	bl	_amdgpu_irq_add_id
	cbnz	w0, LBB0_9
; %bb.1:
	ldr	x8, [x19, #8]
Lloh6:
	adrp	x9, _amdgpu_mode_funcs@GOTPAGE
Lloh7:
	ldr	x9, [x9, _amdgpu_mode_funcs@GOTPAGEOFF]
	stp	x9, xzr, [x8, #24]
Lloh8:
	adrp	x9, lCPI0_0@PAGE
Lloh9:
	ldr	q0, [x9, lCPI0_0@PAGEOFF]
	str	q0, [x8]
	ldr	w9, [x19, #16]
	str	w9, [x8, #16]
	mov	x0, x19
	bl	_amdgpu_display_modeset_create_props
	cbnz	w0, LBB0_9
; %bb.2:
	ldr	x0, [x19, #8]
	movi.2s	v0, #64, lsl #8
	str	d0, [x0]
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_8
; %bb.3:
	mov	w20, #0
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x20
	bl	_dce_virtual_crtc_init
	cbnz	w0, LBB0_9
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x19
	mov	x1, x20
	bl	_dce_virtual_connector_encoder_init
	cbnz	w0, LBB0_9
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	add	w20, w20, #1
	ldr	w8, [x19]
	cmp	w20, w8
	b.lt	LBB0_4
; %bb.7:
	ldr	x0, [x19, #8]
LBB0_8:
	bl	_drm_kms_helper_poll_init
	mov	w0, #0
	mov	w8, #1
	str	w8, [x19, #4]
LBB0_9:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdr	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ; @AMDGPU_IRQ_CLIENTID_LEGACY
	.comm	_VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER,4,2 ; @VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER
	.comm	_amdgpu_mode_funcs,4,2          ; @amdgpu_mode_funcs
	.no_dead_strip	_dce_virtual_sw_init
.subsections_via_symbols
