	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rs780_dpm_force_performance_level ## -- Begin function rs780_dpm_force_performance_level
	.p2align	4, 0x90
_rs780_dpm_force_performance_level:     ## @rs780_dpm_force_performance_level
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	callq	_rs780_get_pi
	movq	%rax, %r15
	movq	8(%rbx), %r12
	movq	%r12, %rdi
	callq	_rs780_get_ps
	movq	%rax, %r13
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_rs780_clk_scaling_enable
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_rs780_voltage_scaling_enable
	movq	_RADEON_DPM_FORCED_LEVEL_HIGH@GOTPCREL(%rip), %rax
	cmpl	%r14d, (%rax)
	jne	LBB0_5
## %bb.1:
	cmpq	$0, (%r15)
	je	LBB0_3
## %bb.2:
	movl	8(%r15), %esi
	movq	%rbx, %rdi
	callq	_rs780_force_voltage
LBB0_3:
	movq	_COMPUTE_ENGINE_PLL_PARAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	(%r13), %rdx
	leaq	-48(%rbp), %r8
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_radeon_atom_get_clock_dividers
	testl	%eax, %eax
	jne	LBB0_16
## %bb.4:
	movl	-48(%rbp), %esi
	movq	%rbx, %rdi
	callq	_rs780_force_fbdiv
	jmp	LBB0_15
LBB0_5:
	movq	_RADEON_DPM_FORCED_LEVEL_LOW@GOTPCREL(%rip), %rax
	cmpl	%r14d, (%rax)
	jne	LBB0_9
## %bb.6:
	movq	_COMPUTE_ENGINE_PLL_PARAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	8(%r13), %rdx
	leaq	-48(%rbp), %r8
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_radeon_atom_get_clock_dividers
	testl	%eax, %eax
	jne	LBB0_16
## %bb.7:
	movl	-48(%rbp), %esi
	movq	%rbx, %rdi
	callq	_rs780_force_fbdiv
	cmpq	$0, (%r15)
	je	LBB0_15
## %bb.8:
	movl	12(%r15), %esi
	movq	%rbx, %rdi
	callq	_rs780_force_voltage
	jmp	LBB0_15
LBB0_9:
	cmpq	$0, (%r15)
	je	LBB0_11
## %bb.10:
	movl	8(%r15), %esi
	movq	%rbx, %rdi
	callq	_rs780_force_voltage
LBB0_11:
	movq	(%r13), %rax
	cmpq	8(%r13), %rax
	je	LBB0_13
## %bb.12:
	movq	_FVTHROT_FBDIV_REG1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_FORCE_FEEDBACK_DIV@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	xorl	%esi, %esi
	callq	_WREG32_P
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_rs780_clk_scaling_enable
LBB0_13:
	cmpq	$0, (%r15)
	je	LBB0_15
## %bb.14:
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_rs780_voltage_scaling_enable
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_rs780_enable_voltage_scaling
LBB0_15:
	movl	%r14d, (%rbx)
	xorl	%eax, %eax
LBB0_16:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_DPM_FORCED_LEVEL_HIGH,4,2 ## @RADEON_DPM_FORCED_LEVEL_HIGH
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ## @COMPUTE_ENGINE_PLL_PARAM
	.comm	_RADEON_DPM_FORCED_LEVEL_LOW,4,2 ## @RADEON_DPM_FORCED_LEVEL_LOW
	.comm	_FVTHROT_FBDIV_REG1,4,2         ## @FVTHROT_FBDIV_REG1
	.comm	_FORCE_FEEDBACK_DIV,4,2         ## @FORCE_FEEDBACK_DIV
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rs780_dpm_force_performance_level ; -- Begin function rs780_dpm_force_performance_level
	.p2align	2
_rs780_dpm_force_performance_level:     ; @rs780_dpm_force_performance_level
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
	bl	_rs780_get_pi
	mov	x21, x0
	ldr	x22, [x20, #8]
	mov	x0, x22
	bl	_rs780_get_ps
	mov	x23, x0
	mov	x0, x20
	mov	w1, #0
	bl	_rs780_clk_scaling_enable
	mov	x0, x20
	mov	w1, #0
	bl	_rs780_voltage_scaling_enable
Lloh0:
	adrp	x8, _RADEON_DPM_FORCED_LEVEL_HIGH@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_DPM_FORCED_LEVEL_HIGH@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w19
	b.ne	LBB0_5
; %bb.1:
	ldr	x8, [x21]
	cbz	x8, LBB0_3
; %bb.2:
	ldr	w1, [x21, #8]
	mov	x0, x20
	bl	_rs780_force_voltage
LBB0_3:
Lloh3:
	adrp	x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGE
Lloh4:
	ldr	x8, [x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	x2, [x23]
	add	x4, sp, #8
	mov	x0, x20
	mov	w3, #0
	bl	_radeon_atom_get_clock_dividers
	cbnz	w0, LBB0_16
; %bb.4:
	ldr	w1, [sp, #8]
	mov	x0, x20
	bl	_rs780_force_fbdiv
	b	LBB0_15
LBB0_5:
Lloh6:
	adrp	x8, _RADEON_DPM_FORCED_LEVEL_LOW@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RADEON_DPM_FORCED_LEVEL_LOW@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	w8, w19
	b.ne	LBB0_9
; %bb.6:
Lloh9:
	adrp	x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGE
Lloh10:
	ldr	x8, [x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	x2, [x23, #8]
	add	x4, sp, #8
	mov	x0, x20
	mov	w3, #0
	bl	_radeon_atom_get_clock_dividers
	cbnz	w0, LBB0_16
; %bb.7:
	ldr	w1, [sp, #8]
	mov	x0, x20
	bl	_rs780_force_fbdiv
	ldr	x8, [x21]
	cbz	x8, LBB0_15
; %bb.8:
	ldr	w1, [x21, #12]
	mov	x0, x20
	bl	_rs780_force_voltage
	b	LBB0_15
LBB0_9:
	ldr	x8, [x21]
	cbz	x8, LBB0_11
; %bb.10:
	ldr	w1, [x21, #8]
	mov	x0, x20
	bl	_rs780_force_voltage
LBB0_11:
	ldp	x8, x9, [x23]
	cmp	x8, x9
	b.eq	LBB0_13
; %bb.12:
Lloh12:
	adrp	x8, _FVTHROT_FBDIV_REG1@GOTPAGE
Lloh13:
	ldr	x8, [x8, _FVTHROT_FBDIV_REG1@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
Lloh15:
	adrp	x8, _FORCE_FEEDBACK_DIV@GOTPAGE
Lloh16:
	ldr	x8, [x8, _FORCE_FEEDBACK_DIV@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	w1, #0
	bl	_WREG32_P
	mov	x0, x20
	mov	w1, #1
	bl	_rs780_clk_scaling_enable
LBB0_13:
	ldr	x8, [x21]
	cbz	x8, LBB0_15
; %bb.14:
	mov	x0, x20
	mov	w1, #1
	bl	_rs780_voltage_scaling_enable
	mov	x0, x20
	mov	x1, x22
	bl	_rs780_enable_voltage_scaling
LBB0_15:
	mov	w0, #0
	str	w19, [x20]
LBB0_16:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_DPM_FORCED_LEVEL_HIGH,4,2 ; @RADEON_DPM_FORCED_LEVEL_HIGH
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ; @COMPUTE_ENGINE_PLL_PARAM
	.comm	_RADEON_DPM_FORCED_LEVEL_LOW,4,2 ; @RADEON_DPM_FORCED_LEVEL_LOW
	.comm	_FVTHROT_FBDIV_REG1,4,2         ; @FVTHROT_FBDIV_REG1
	.comm	_FORCE_FEEDBACK_DIV,4,2         ; @FORCE_FEEDBACK_DIV
.subsections_via_symbols
