	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_hdmi_update_acr           ## -- Begin function r600_hdmi_update_acr
	.p2align	4, 0x90
_r600_hdmi_update_acr:                  ## @r600_hdmi_update_acr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	(%rdi), %rax
	movq	(%rax), %rdi
	callq	_ASIC_IS_DCE3
	testq	%rax, %rax
	jne	LBB0_1
## %bb.2:
	movq	_HDMI0_ACR_PACKET_CONTROL@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_DCE3_HDMI0_ACR_PACKET_CONTROL@GOTPCREL(%rip), %rax
LBB0_3:
	movq	(%rax), %rdi
	addq	%r15, %rdi
	movq	_HDMI0_ACR_SOURCE@GOTPCREL(%rip), %rax
	movq	_HDMI0_ACR_AUTO_SEND@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movl	%esi, %edx
	notl	%edx
	callq	_WREG32_P
	movq	_HDMI0_ACR_32_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	addq	%r15, %rbx
	movl	20(%r14), %edi
	callq	_HDMI0_ACR_CTS_32
	movq	_HDMI0_ACR_CTS_32_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32_P
	movq	_HDMI0_ACR_32_1@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	addq	%r15, %rbx
	movl	16(%r14), %edi
	callq	_HDMI0_ACR_N_32
	movq	_HDMI0_ACR_N_32_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32_P
	movq	_HDMI0_ACR_44_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	addq	%r15, %rbx
	movl	12(%r14), %edi
	callq	_HDMI0_ACR_CTS_44
	movq	_HDMI0_ACR_CTS_44_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32_P
	movq	_HDMI0_ACR_44_1@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	addq	%r15, %rbx
	movl	8(%r14), %edi
	callq	_HDMI0_ACR_N_44
	movq	_HDMI0_ACR_N_44_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32_P
	movq	_HDMI0_ACR_48_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	addq	%r15, %rbx
	movl	4(%r14), %edi
	callq	_HDMI0_ACR_CTS_48
	movq	_HDMI0_ACR_CTS_48_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32_P
	movq	_HDMI0_ACR_48_1@GOTPCREL(%rip), %rax
	addq	(%rax), %r15
	movl	(%r14), %edi
	callq	_HDMI0_ACR_N_48
	movq	_HDMI0_ACR_N_48_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movq	%r15, %rdi
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32_P                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DCE3_HDMI0_ACR_PACKET_CONTROL,8,3 ## @DCE3_HDMI0_ACR_PACKET_CONTROL
	.comm	_HDMI0_ACR_PACKET_CONTROL,8,3   ## @HDMI0_ACR_PACKET_CONTROL
	.comm	_HDMI0_ACR_SOURCE,4,2           ## @HDMI0_ACR_SOURCE
	.comm	_HDMI0_ACR_AUTO_SEND,4,2        ## @HDMI0_ACR_AUTO_SEND
	.comm	_HDMI0_ACR_32_0,8,3             ## @HDMI0_ACR_32_0
	.comm	_HDMI0_ACR_CTS_32_MASK,4,2      ## @HDMI0_ACR_CTS_32_MASK
	.comm	_HDMI0_ACR_32_1,8,3             ## @HDMI0_ACR_32_1
	.comm	_HDMI0_ACR_N_32_MASK,4,2        ## @HDMI0_ACR_N_32_MASK
	.comm	_HDMI0_ACR_44_0,8,3             ## @HDMI0_ACR_44_0
	.comm	_HDMI0_ACR_CTS_44_MASK,4,2      ## @HDMI0_ACR_CTS_44_MASK
	.comm	_HDMI0_ACR_44_1,8,3             ## @HDMI0_ACR_44_1
	.comm	_HDMI0_ACR_N_44_MASK,4,2        ## @HDMI0_ACR_N_44_MASK
	.comm	_HDMI0_ACR_48_0,8,3             ## @HDMI0_ACR_48_0
	.comm	_HDMI0_ACR_CTS_48_MASK,4,2      ## @HDMI0_ACR_CTS_48_MASK
	.comm	_HDMI0_ACR_48_1,8,3             ## @HDMI0_ACR_48_1
	.comm	_HDMI0_ACR_N_48_MASK,4,2        ## @HDMI0_ACR_N_48_MASK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_hdmi_update_acr           ; -- Begin function r600_hdmi_update_acr
	.p2align	2
_r600_hdmi_update_acr:                  ; @r600_hdmi_update_acr
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x20, x1
	ldr	x8, [x0]
	ldr	x0, [x8]
	bl	_ASIC_IS_DCE3
Lloh0:
	adrp	x8, _DCE3_HDMI0_ACR_PACKET_CONTROL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DCE3_HDMI0_ACR_PACKET_CONTROL@GOTPAGEOFF]
Lloh2:
	adrp	x9, _HDMI0_ACR_PACKET_CONTROL@GOTPAGE
Lloh3:
	ldr	x9, [x9, _HDMI0_ACR_PACKET_CONTROL@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x9, x8, eq
	ldr	x8, [x8]
	add	x0, x8, x20
Lloh4:
	adrp	x8, _HDMI0_ACR_SOURCE@GOTPAGE
Lloh5:
	ldr	x8, [x8, _HDMI0_ACR_SOURCE@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
Lloh7:
	adrp	x9, _HDMI0_ACR_AUTO_SEND@GOTPAGE
Lloh8:
	ldr	x9, [x9, _HDMI0_ACR_AUTO_SEND@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
	orr	w1, w9, w8
	mvn	w2, w1
	bl	_WREG32_P
Lloh10:
	adrp	x8, _HDMI0_ACR_32_0@GOTPAGE
Lloh11:
	ldr	x8, [x8, _HDMI0_ACR_32_0@GOTPAGEOFF]
Lloh12:
	ldr	x8, [x8]
	add	x21, x8, x20
	ldr	w0, [x19, #20]
	bl	_HDMI0_ACR_CTS_32
	mov	x1, x0
Lloh13:
	adrp	x8, _HDMI0_ACR_CTS_32_MASK@GOTPAGE
Lloh14:
	ldr	x8, [x8, _HDMI0_ACR_CTS_32_MASK@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x21
	bl	_WREG32_P
Lloh16:
	adrp	x8, _HDMI0_ACR_32_1@GOTPAGE
Lloh17:
	ldr	x8, [x8, _HDMI0_ACR_32_1@GOTPAGEOFF]
Lloh18:
	ldr	x8, [x8]
	add	x21, x8, x20
	ldr	w0, [x19, #16]
	bl	_HDMI0_ACR_N_32
	mov	x1, x0
Lloh19:
	adrp	x8, _HDMI0_ACR_N_32_MASK@GOTPAGE
Lloh20:
	ldr	x8, [x8, _HDMI0_ACR_N_32_MASK@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x21
	bl	_WREG32_P
Lloh22:
	adrp	x8, _HDMI0_ACR_44_0@GOTPAGE
Lloh23:
	ldr	x8, [x8, _HDMI0_ACR_44_0@GOTPAGEOFF]
Lloh24:
	ldr	x8, [x8]
	add	x21, x8, x20
	ldr	w0, [x19, #12]
	bl	_HDMI0_ACR_CTS_44
	mov	x1, x0
Lloh25:
	adrp	x8, _HDMI0_ACR_CTS_44_MASK@GOTPAGE
Lloh26:
	ldr	x8, [x8, _HDMI0_ACR_CTS_44_MASK@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x21
	bl	_WREG32_P
Lloh28:
	adrp	x8, _HDMI0_ACR_44_1@GOTPAGE
Lloh29:
	ldr	x8, [x8, _HDMI0_ACR_44_1@GOTPAGEOFF]
Lloh30:
	ldr	x8, [x8]
	add	x21, x8, x20
	ldr	w0, [x19, #8]
	bl	_HDMI0_ACR_N_44
	mov	x1, x0
Lloh31:
	adrp	x8, _HDMI0_ACR_N_44_MASK@GOTPAGE
Lloh32:
	ldr	x8, [x8, _HDMI0_ACR_N_44_MASK@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x21
	bl	_WREG32_P
Lloh34:
	adrp	x8, _HDMI0_ACR_48_0@GOTPAGE
Lloh35:
	ldr	x8, [x8, _HDMI0_ACR_48_0@GOTPAGEOFF]
Lloh36:
	ldr	x8, [x8]
	add	x21, x8, x20
	ldr	w0, [x19, #4]
	bl	_HDMI0_ACR_CTS_48
	mov	x1, x0
Lloh37:
	adrp	x8, _HDMI0_ACR_CTS_48_MASK@GOTPAGE
Lloh38:
	ldr	x8, [x8, _HDMI0_ACR_CTS_48_MASK@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x21
	bl	_WREG32_P
Lloh40:
	adrp	x8, _HDMI0_ACR_48_1@GOTPAGE
Lloh41:
	ldr	x8, [x8, _HDMI0_ACR_48_1@GOTPAGEOFF]
Lloh42:
	ldr	x8, [x8]
	add	x20, x8, x20
	ldr	w0, [x19]
	bl	_HDMI0_ACR_N_48
	mov	x1, x0
Lloh43:
	adrp	x8, _HDMI0_ACR_N_48_MASK@GOTPAGE
Lloh44:
	ldr	x8, [x8, _HDMI0_ACR_N_48_MASK@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32_P
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_DCE3_HDMI0_ACR_PACKET_CONTROL,8,3 ; @DCE3_HDMI0_ACR_PACKET_CONTROL
	.comm	_HDMI0_ACR_PACKET_CONTROL,8,3   ; @HDMI0_ACR_PACKET_CONTROL
	.comm	_HDMI0_ACR_SOURCE,4,2           ; @HDMI0_ACR_SOURCE
	.comm	_HDMI0_ACR_AUTO_SEND,4,2        ; @HDMI0_ACR_AUTO_SEND
	.comm	_HDMI0_ACR_32_0,8,3             ; @HDMI0_ACR_32_0
	.comm	_HDMI0_ACR_CTS_32_MASK,4,2      ; @HDMI0_ACR_CTS_32_MASK
	.comm	_HDMI0_ACR_32_1,8,3             ; @HDMI0_ACR_32_1
	.comm	_HDMI0_ACR_N_32_MASK,4,2        ; @HDMI0_ACR_N_32_MASK
	.comm	_HDMI0_ACR_44_0,8,3             ; @HDMI0_ACR_44_0
	.comm	_HDMI0_ACR_CTS_44_MASK,4,2      ; @HDMI0_ACR_CTS_44_MASK
	.comm	_HDMI0_ACR_44_1,8,3             ; @HDMI0_ACR_44_1
	.comm	_HDMI0_ACR_N_44_MASK,4,2        ; @HDMI0_ACR_N_44_MASK
	.comm	_HDMI0_ACR_48_0,8,3             ; @HDMI0_ACR_48_0
	.comm	_HDMI0_ACR_CTS_48_MASK,4,2      ; @HDMI0_ACR_CTS_48_MASK
	.comm	_HDMI0_ACR_48_1,8,3             ; @HDMI0_ACR_48_1
	.comm	_HDMI0_ACR_N_48_MASK,4,2        ; @HDMI0_ACR_N_48_MASK
.subsections_via_symbols
