	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_vmid_grab_reserved
_amdgpu_vmid_grab_reserved:             ## @amdgpu_vmid_grab_reserved
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, -64(%rbp)                 ## 8-byte Spill
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	(%rsi), %r15
	movq	8(%rsi), %rcx
	movq	16(%rsi), %rax
	movl	(%rax), %eax
	movq	%rcx, -72(%rbp)                 ## 8-byte Spill
	addq	(%rcx), %r15
	movq	%rdx, -80(%rbp)                 ## 8-byte Spill
	movq	(%rdx), %r13
	movl	(%rdi), %edx
	movq	16(%rdi), %rcx
	movq	(%rcx,%rax,8), %rdi
	movq	%r9, %r12
	movq	%rdi, (%r9)
	testq	%r13, %r13
	movq	%r8, -56(%rbp)                  ## 8-byte Spill
	je	LBB0_4
## %bb.1:
	movq	16(%rdi), %rsi
	testq	%rsi, %rsi
	je	LBB0_5
## %bb.2:
	movq	(%r13), %rax
	cmpq	(%rsi), %rax
	jne	LBB0_5
## %bb.3:
	movq	%r13, %rdi
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	callq	_dma_fence_is_later
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	movq	-56(%rbp), %r8                  ## 8-byte Reload
	xorl	%ecx, %ecx
	testl	%eax, %eax
	cmoveq	%rcx, %r13
	movq	(%r12), %rdi
	jmp	LBB0_5
LBB0_4:
	xorl	%r13d, %r13d
LBB0_5:
	movq	(%rdi), %rax
	cmpq	8(%r14), %rax
	jne	LBB0_13
## %bb.6:
	movq	(%r8), %rax
	cmpq	8(%rdi), %rax
	jne	LBB0_13
## %bb.7:
	testq	%r13, %r13
	movq	%r12, %r14
	jne	LBB0_14
## %bb.8:
	movq	32(%rdi), %rax
	testq	%rax, %rax
	je	LBB0_14
## %bb.9:
	movl	%edx, %r12d
	cmpq	%r15, (%rax)
	je	LBB0_17
## %bb.10:
	movq	%rax, %rdi
	callq	_dma_fence_is_signaled
	testl	%eax, %eax
	jne	LBB0_17
## %bb.11:
	movq	(%r14), %rdi
	jmp	LBB0_14
LBB0_13:
	movq	%r12, %r14
LBB0_14:
	movq	$0, 8(%rdi)
	addq	$24, %rdi
	movq	%rbx, %rsi
	callq	_amdgpu_sync_peek_fence
	testq	%rax, %rax
	je	LBB0_16
## %bb.15:
	movq	$0, (%r14)
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	movq	-80(%rbp), %rsi                 ## 8-byte Reload
	movq	%rax, %rdx
	xorl	%ecx, %ecx
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_sync_fence              ## TAILCALL
LBB0_16:
	movl	$1, %r12d
LBB0_17:
	movq	8(%rbx), %rdi
	movq	(%r14), %rsi
	addq	$24, %rsi
	movq	-64(%rbp), %rdx                 ## 8-byte Reload
	xorl	%ecx, %ecx
	callq	_amdgpu_sync_fence
	testl	%eax, %eax
	jne	LBB0_21
## %bb.18:
	testq	%r13, %r13
	je	LBB0_20
## %bb.19:
	movq	(%r14), %rax
	movq	16(%rax), %rdi
	callq	_dma_fence_put
	movq	%r13, %rdi
	callq	_dma_fence_get
	movq	(%r14), %rcx
	movq	%rax, 16(%rcx)
LBB0_20:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	%r12d, 8(%rax)
	xorl	%eax, %eax
LBB0_21:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_amdgpu_vmid_grab_reserved
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_vmid_grab_reserved
_amdgpu_vmid_grab_reserved:             ; @amdgpu_vmid_grab_reserved
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x5
	mov	x22, x3
	mov	x24, x2
	mov	x23, x1
	mov	x26, x0
	ldp	x25, x8, [x1, #8]
	ldr	w8, [x8]
	ldr	x28, [x1]
	ldr	x20, [x25]
	ldr	x21, [x2]
	ldr	w27, [x0]
	ldr	x9, [x0, #16]
	ldr	x8, [x9, x8, lsl #3]
	str	x8, [x5]
	str	x4, [sp, #8]                    ; 8-byte Folded Spill
	cbz	x21, LBB0_4
; %bb.1:
	ldr	x1, [x8, #16]
	cbz	x1, LBB0_4
; %bb.2:
	ldr	x9, [x21]
	ldr	x10, [x1]
	cmp	x9, x10
	b.ne	LBB0_4
; %bb.3:
	mov	x0, x21
	bl	_dma_fence_is_later
	ldr	x4, [sp, #8]                    ; 8-byte Folded Reload
	cmp	w0, #0
	csel	x21, xzr, x21, eq
	ldr	x8, [x19]
LBB0_4:
	ldr	x9, [x8]
	ldr	x10, [x26, #8]
	cmp	x9, x10
	b.ne	LBB0_10
; %bb.5:
	ldr	x9, [x4]
	ldr	x10, [x8, #8]
	cmp	x9, x10
	ccmp	x21, #0, #0, eq
	b.ne	LBB0_10
; %bb.6:
	ldr	x0, [x8, #32]
	cbz	x0, LBB0_10
; %bb.7:
	ldr	x8, [x0]
	add	x9, x28, x20
	cmp	x8, x9
	b.eq	LBB0_13
; %bb.8:
	bl	_dma_fence_is_signaled
	cbnz	w0, LBB0_13
; %bb.9:
	ldr	x8, [x19]
LBB0_10:
	str	xzr, [x8, #8]
	add	x0, x8, #24
	mov	x1, x23
	bl	_amdgpu_sync_peek_fence
	cbz	x0, LBB0_12
; %bb.11:
	mov	x2, x0
	str	xzr, [x19]
	mov	x0, x25
	mov	x1, x24
	mov	w3, #0
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_amdgpu_sync_fence
LBB0_12:
	mov	w27, #1
LBB0_13:
	ldr	x0, [x23, #8]
	ldr	x8, [x19]
	add	x1, x8, #24
	mov	x2, x22
	mov	w3, #0
	bl	_amdgpu_sync_fence
	cbnz	w0, LBB0_17
; %bb.14:
	cbz	x21, LBB0_16
; %bb.15:
	ldr	x8, [x19]
	ldr	x0, [x8, #16]
	bl	_dma_fence_put
	mov	x0, x21
	bl	_dma_fence_get
	ldr	x8, [x19]
	str	x0, [x8, #16]
LBB0_16:
	mov	w0, #0
	ldr	x8, [sp, #8]                    ; 8-byte Folded Reload
	str	w27, [x8, #8]
LBB0_17:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_amdgpu_vmid_grab_reserved
.subsections_via_symbols
