	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vega20_odn_edit_dpm_table
_vega20_odn_edit_dpm_table:             ## @vega20_odn_edit_dpm_table
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
                                        ## kill: def $esi killed $esi def $rsi
	testq	%rdx, %rdx
	je	LBB0_5
## %bb.1:
	leal	-128(%rsi), %eax
	cmpl	$4, %eax
	ja	LBB0_6
## %bb.2:
	movq	%rdx, %rbx
	movq	%rdi, %r13
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movq	16(%rdi), %r11
	movq	24(%rdi), %r14
	movq	40(%rdi), %r12
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_3:
	movq	_SMU_TABLE_OVERDRIVE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%r15d, %r15d
	movq	%r13, %rdi
	xorl	%edx, %edx
	movq	%r11, %rcx
	xorl	%r8d, %r8d
	callq	_smu_update_table
	testl	%eax, %eax
	je	LBB0_39
## %bb.4:
	movl	%eax, %ebx
	leaq	L_.str.13(%rip), %rdi
	callq	_pr_err
	movl	%ebx, %r15d
	jmp	LBB0_39
LBB0_5:
	leaq	L_.str(%rip), %rdi
	callq	_pr_warn
LBB0_6:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	jmp	LBB0_38
LBB0_7:
	movq	8(%r14), %rdi
	movq	_OD8_SETTING_GFXCLK_FREQ1@GOTPCREL(%rip), %rax
	movq	(%rax), %r9
	leaq	(%r9,%r9,2), %rax
	cmpl	$0, 8(%rdi,%rax,4)
	je	LBB0_24
## %bb.8:
	movq	_OD8_SETTING_GFXCLK_FREQ2@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	leaq	(%rax,%rax,2), %rax
	cmpl	$0, 8(%rdi,%rax,4)
	je	LBB0_24
## %bb.9:
	movq	_OD8_SETTING_GFXCLK_FREQ3@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	leaq	(%rax,%rax,2), %rax
	cmpl	$0, 8(%rdi,%rax,4)
	je	LBB0_24
## %bb.10:
	movq	_OD8_SETTING_GFXCLK_VOLTAGE1@GOTPCREL(%rip), %rax
	movq	(%rax), %r10
	leaq	(%r10,%r10,2), %rax
	cmpl	$0, 8(%rdi,%rax,4)
	je	LBB0_24
## %bb.11:
	movq	_OD8_SETTING_GFXCLK_VOLTAGE2@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	leaq	(%rax,%rax,2), %rax
	cmpl	$0, 8(%rdi,%rax,4)
	je	LBB0_24
## %bb.12:
	movq	_OD8_SETTING_GFXCLK_VOLTAGE3@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	leaq	(%rax,%rax,2), %rax
	cmpl	$0, 8(%rdi,%rax,4)
	je	LBB0_24
## %bb.13:
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	testl	%ecx, %ecx
	jle	LBB0_53
## %bb.14:
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	leaq	28(%r11), %rax
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	movq	_VOLTAGE_SCALE@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	leaq	32(%r11), %rax
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	leaq	20(%r11), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	leaq	24(%r11), %rax
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	leaq	12(%r11), %r15
	addq	$16, %r11
	xorl	%eax, %eax
	jmp	LBB0_62
LBB0_15:
	movq	8(%r14), %rax
	movq	_OD8_SETTING_GFXCLK_FMIN@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, 8(%rax,%rcx,4)
	je	LBB0_35
## %bb.16:
	movq	_OD8_SETTING_GFXCLK_FMAX@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(%rdx,%rdx,2), %rdx
	cmpl	$0, 8(%rax,%rdx,4)
	je	LBB0_35
## %bb.17:
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	movq	%r11, %r15
	movl	-44(%rbp), %r11d                ## 4-byte Reload
	testl	%r11d, %r11d
	jle	LBB0_53
## %bb.18:
	leaq	(%rax,%rcx,4), %r8
	leaq	(%rax,%rdx,4), %r10
	addq	$4, %r10
	leaq	4(%r15), %r9
	xorl	%edi, %edi
	jmp	LBB0_27
LBB0_19:
	movq	8(%r14), %rax
	movq	_OD8_SETTING_UCLK_FMAX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, 8(%rax,%rcx,4)
	je	LBB0_36
## %bb.20:
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	movq	%r11, -64(%rbp)                 ## 8-byte Spill
	addq	$16, %r12
	leaq	-96(%rbp), %rsi
	movq	%r13, %rdi
	movq	%r12, %rdx
	callq	_vega20_get_clk_table
	testl	%eax, %eax
	je	LBB0_44
## %bb.21:
	movl	%eax, %r15d
	leaq	L_.str.7(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_39
LBB0_22:
	movq	_SMU_TABLE_OVERDRIVE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	xorl	%edx, %edx
	movq	%r11, %rcx
	movl	$1, %r8d
	callq	_smu_update_table
	testl	%eax, %eax
	je	LBB0_40
## %bb.23:
	movl	%eax, %r15d
	leaq	L_.str.14(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_39
LBB0_24:
	leaq	L_.str.9(%rip), %rdi
	jmp	LBB0_37
LBB0_25:                                ##   in Loop: Header=BB0_27 Depth=1
	movl	%esi, (%rax)
	movl	$1, (%r14)
LBB0_26:                                ##   in Loop: Header=BB0_27 Depth=1
	cmpl	%r11d, %edi
	jge	LBB0_71
LBB0_27:                                ## =>This Inner Loop Header: Depth=1
	movq	%rdi, %rax
	addq	$2, %rdi
	cmpl	%r11d, %edi
	jg	LBB0_56
## %bb.28:                              ##   in Loop: Header=BB0_27 Depth=1
	movq	(%rbx,%rax,8), %rax
	cmpl	$2, %eax
	jae	LBB0_57
## %bb.29:                              ##   in Loop: Header=BB0_27 Depth=1
	movq	-8(%rbx,%rdi,8), %rsi
	movl	(%r8), %edx
	movl	(%r10), %ecx
	cmpl	%esi, %edx
	jg	LBB0_73
## %bb.30:                              ##   in Loop: Header=BB0_27 Depth=1
	cmpl	%esi, %ecx
	jl	LBB0_73
## %bb.31:                              ##   in Loop: Header=BB0_27 Depth=1
	cmpl	$1, %eax
	je	LBB0_34
## %bb.32:                              ##   in Loop: Header=BB0_27 Depth=1
	testl	%eax, %eax
	jne	LBB0_26
## %bb.33:                              ##   in Loop: Header=BB0_27 Depth=1
	movq	%r15, %rcx
	movq	%r15, %rax
	cmpl	%esi, (%r15)
	jne	LBB0_25
	jmp	LBB0_26
LBB0_34:                                ##   in Loop: Header=BB0_27 Depth=1
	movq	%r9, %rax
	cmpl	%esi, (%r9)
	je	LBB0_26
	jmp	LBB0_25
LBB0_35:
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_37
LBB0_36:
	leaq	L_.str.6(%rip), %rdi
LBB0_37:
	xorl	%r15d, %r15d
	xorl	%eax, %eax
	callq	_pr_info
	movq	_EOPNOTSUPP@GOTPCREL(%rip), %rax
LBB0_38:
	subl	(%rax), %r15d
LBB0_39:
	movl	%r15d, %eax
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_40:
	cmpl	$0, (%r14)
	je	LBB0_72
## %bb.41:
	movl	$0, (%r14)
	movq	_SMU_FEATURE_DPM_GFXCLK_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_smu_feature_is_enabled
	testl	%eax, %eax
	je	LBB0_54
## %bb.42:
	movq	_PPCLK_GFXCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_72
## %bb.43:
	movl	%eax, %r15d
	leaq	L_.str.15(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_39
LBB0_44:
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	testl	%ecx, %ecx
	jle	LBB0_53
## %bb.45:
	movq	-96(%rbp), %r8
	movq	_OD8_SETTING_UCLK_FMAX@GOTPCREL(%rip), %r10
	movq	(%r10), %rax
	xorl	%edx, %edx
	leaq	(%rax,%rax,2), %r9
	jmp	LBB0_47
LBB0_46:                                ##   in Loop: Header=BB0_47 Depth=1
	movq	%rdi, %rdx
	cmpl	%ecx, %edi
	jge	LBB0_71
LBB0_47:                                ## =>This Inner Loop Header: Depth=1
	leaq	2(%rdx), %rdi
	cmpl	%ecx, %edi
	jg	LBB0_75
## %bb.48:                              ##   in Loop: Header=BB0_47 Depth=1
	movq	(%rbx,%rdx,8), %rsi
	cmpl	$1, %esi
	jne	LBB0_76
## %bb.49:                              ##   in Loop: Header=BB0_47 Depth=1
	movq	-8(%rbx,%rdi,8), %rsi
	movslq	(%r8), %rax
	imulq	$274877907, %rax, %rdx          ## imm = 0x10624DD3
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$38, %rdx
	addl	%eax, %edx
	movq	8(%r14), %rax
	cmpl	%esi, %edx
	jg	LBB0_58
## %bb.50:                              ##   in Loop: Header=BB0_47 Depth=1
	cmpl	%esi, 4(%rax,%r9,4)
	jl	LBB0_58
## %bb.51:                              ##   in Loop: Header=BB0_47 Depth=1
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	cmpl	%esi, 8(%rax)
	je	LBB0_46
## %bb.52:                              ##   in Loop: Header=BB0_47 Depth=1
	movl	$1, (%r14)
	movl	%esi, 8(%rax)
	jmp	LBB0_46
LBB0_53:
	xorl	%r15d, %r15d
	jmp	LBB0_39
LBB0_54:
	movl	$1, (%r12)
	movslq	8(%r13), %rax
	imulq	$1374389535, %rax, %rax         ## imm = 0x51EB851F
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$37, %rax
	addl	%ecx, %eax
	movq	8(%r12), %rcx
	movl	%eax, (%rcx)
	jmp	LBB0_72
LBB0_56:
	leaq	L_.str.2(%rip), %rdi
	xorl	%r15d, %r15d
	movl	%r11d, %esi
	jmp	LBB0_79
LBB0_57:
	leaq	L_.str.3(%rip), %rdi
	xorl	%r15d, %r15d
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_pr_info
	leaq	L_.str.4(%rip), %rdi
	jmp	LBB0_81
LBB0_58:
	movq	(%r10), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movl	4(%rax,%rcx,4), %ecx
	leaq	L_.str.5(%rip), %rdi
	xorl	%r15d, %r15d
                                        ## kill: def $esi killed $esi killed $rsi
                                        ## kill: def $edx killed $edx killed $rdx
	jmp	LBB0_74
LBB0_59:                                ##   in Loop: Header=BB0_62 Depth=1
	movq	-80(%rbp), %rcx                 ## 8-byte Reload
	movq	-72(%rbp), %rdx                 ## 8-byte Reload
LBB0_60:                                ##   in Loop: Header=BB0_62 Depth=1
	movl	%esi, (%rcx)
	movl	%r14d, %eax
	imull	%r8d, %eax
	movl	%eax, (%rdx)
LBB0_61:                                ##   in Loop: Header=BB0_62 Depth=1
	movq	%r12, %rax
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	cmpl	%ecx, %r12d
	jge	LBB0_71
LBB0_62:                                ## =>This Inner Loop Header: Depth=1
	leaq	3(%rax), %r12
	cmpl	%ecx, %r12d
	jg	LBB0_78
## %bb.63:                              ##   in Loop: Header=BB0_62 Depth=1
	movq	(%rbx,%rax,8), %rax
	cmpl	$3, %eax
	jge	LBB0_80
## %bb.64:                              ##   in Loop: Header=BB0_62 Depth=1
	movq	-16(%rbx,%r12,8), %rsi
	leal	(%r9,%rax,2), %ecx
	movslq	%ecx, %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movl	(%rdi,%rcx,4), %edx
	movl	4(%rdi,%rcx,4), %ecx
	cmpl	%esi, %edx
	jg	LBB0_73
## %bb.65:                              ##   in Loop: Header=BB0_62 Depth=1
	cmpl	%esi, %ecx
	jl	LBB0_73
## %bb.66:                              ##   in Loop: Header=BB0_62 Depth=1
	movq	-8(%rbx,%r12,8), %r8
	leal	(%rax,%rax), %ecx
	addl	%r10d, %ecx
	movslq	%ecx, %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movl	(%rdi,%rcx,4), %edx
	movl	4(%rdi,%rcx,4), %ecx
	cmpl	%r8d, %edx
	jg	LBB0_83
## %bb.67:                              ##   in Loop: Header=BB0_62 Depth=1
	cmpl	%r8d, %ecx
	jl	LBB0_83
## %bb.68:                              ##   in Loop: Header=BB0_62 Depth=1
	movq	%r15, %rcx
	movq	%r11, %rdx
	testl	%eax, %eax
	je	LBB0_60
## %bb.69:                              ##   in Loop: Header=BB0_62 Depth=1
	cmpl	$2, %eax
	je	LBB0_59
## %bb.70:                              ##   in Loop: Header=BB0_62 Depth=1
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
	movq	-88(%rbp), %rdx                 ## 8-byte Reload
	cmpl	$1, %eax
	je	LBB0_60
	jmp	LBB0_61
LBB0_71:
	xorl	%r15d, %r15d
	cmpl	$132, -56(%rbp)                 ## 4-byte Folded Reload
	jne	LBB0_39
LBB0_72:
	movq	%r13, %rdi
	callq	_mutex_lock
	movl	32(%r13), %esi
	movq	_AMD_PP_TASK_READJUST_POWER_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	callq	_smu_handle_task
	movl	%eax, %r15d
	movq	%r13, %rdi
	callq	_mutex_unlock
	jmp	LBB0_39
LBB0_73:
	leaq	L_.str.5(%rip), %rdi
	xorl	%r15d, %r15d
                                        ## kill: def $esi killed $esi killed $rsi
LBB0_74:
	xorl	%eax, %eax
	callq	_pr_info
	jmp	LBB0_82
LBB0_75:
	leaq	L_.str.2(%rip), %rdi
	xorl	%r15d, %r15d
	movl	%ecx, %esi
	jmp	LBB0_79
LBB0_76:
	leaq	L_.str.3(%rip), %rdi
	xorl	%r15d, %r15d
                                        ## kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	_pr_info
	leaq	L_.str.8(%rip), %rdi
	jmp	LBB0_81
LBB0_78:
	leaq	L_.str.2(%rip), %rdi
	xorl	%r15d, %r15d
	movl	-44(%rbp), %esi                 ## 4-byte Reload
LBB0_79:
	xorl	%eax, %eax
	callq	_pr_info
	jmp	LBB0_82
LBB0_80:
	incl	%eax
	leaq	L_.str.10(%rip), %rdi
	xorl	%r15d, %r15d
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_pr_info
	leaq	L_.str.11(%rip), %rdi
LBB0_81:
	xorl	%eax, %eax
	callq	_pr_info
LBB0_82:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_38
LBB0_83:
	leaq	L_.str.12(%rip), %rdi
	xorl	%r15d, %r15d
	movl	%r8d, %esi
	jmp	LBB0_74
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_19, LBB0_19-LJTI0_0
.set L0_0_set_22, LBB0_22-LJTI0_0
LJTI0_0:
	.long	L0_0_set_3
	.long	L0_0_set_7
	.long	L0_0_set_15
	.long	L0_0_set_19
	.long	L0_0_set_22
	.end_data_region
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"NULL user input for clock and voltage\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_OD8_SETTING_GFXCLK_FMIN,8,3    ## @OD8_SETTING_GFXCLK_FMIN
	.comm	_OD8_SETTING_GFXCLK_FMAX,8,3    ## @OD8_SETTING_GFXCLK_FMAX
L_.str.1:                               ## @.str.1
	.asciz	"Sclk min/max frequency overdrive not supported\n"

	.comm	_EOPNOTSUPP,4,2                 ## @EOPNOTSUPP
L_.str.2:                               ## @.str.2
	.asciz	"invalid number of input parameters %d\n"

L_.str.3:                               ## @.str.3
	.asciz	"Invalid index %d\n"

L_.str.4:                               ## @.str.4
	.asciz	"Support min/max sclk frequency settingonly which index by 0/1\n"

L_.str.5:                               ## @.str.5
	.asciz	"clock freq %d is not within allowed range [%d - %d]\n"

	.comm	_OD8_SETTING_UCLK_FMAX,8,3      ## @OD8_SETTING_UCLK_FMAX
L_.str.6:                               ## @.str.6
	.asciz	"Mclk max frequency overdrive not supported\n"

L_.str.7:                               ## @.str.7
	.asciz	"Attempt to get memory clk levels Failed!"

L_.str.8:                               ## @.str.8
	.asciz	"Support max Mclk frequency setting only which index by 1\n"

	.comm	_OD8_SETTING_GFXCLK_FREQ1,8,3   ## @OD8_SETTING_GFXCLK_FREQ1
	.comm	_OD8_SETTING_GFXCLK_FREQ2,8,3   ## @OD8_SETTING_GFXCLK_FREQ2
	.comm	_OD8_SETTING_GFXCLK_FREQ3,8,3   ## @OD8_SETTING_GFXCLK_FREQ3
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE1,8,3 ## @OD8_SETTING_GFXCLK_VOLTAGE1
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE2,8,3 ## @OD8_SETTING_GFXCLK_VOLTAGE2
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE3,8,3 ## @OD8_SETTING_GFXCLK_VOLTAGE3
L_.str.9:                               ## @.str.9
	.asciz	"Voltage curve calibrate not supported\n"

L_.str.10:                              ## @.str.10
	.asciz	"Setting for point %d is not supported\n"

L_.str.11:                              ## @.str.11
	.asciz	"Three supported points index by 0, 1, 2\n"

L_.str.12:                              ## @.str.12
	.asciz	"clock voltage %d is not within allowed range [%d- %d]\n"

	.comm	_VOLTAGE_SCALE,4,2              ## @VOLTAGE_SCALE
	.comm	_SMU_TABLE_OVERDRIVE,4,2        ## @SMU_TABLE_OVERDRIVE
L_.str.13:                              ## @.str.13
	.asciz	"Failed to export over drive table!\n"

L_.str.14:                              ## @.str.14
	.asciz	"Failed to import over drive table!\n"

	.comm	_SMU_FEATURE_DPM_GFXCLK_BIT,4,2 ## @SMU_FEATURE_DPM_GFXCLK_BIT
	.comm	_PPCLK_GFXCLK,4,2               ## @PPCLK_GFXCLK
L_.str.15:                              ## @.str.15
	.asciz	"[Setoverdrive] failed to refresh dpm table!\n"

	.comm	_AMD_PP_TASK_READJUST_POWER_STATE,4,2 ## @AMD_PP_TASK_READJUST_POWER_STATE
	.no_dead_strip	_vega20_odn_edit_dpm_table
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vega20_odn_edit_dpm_table
_vega20_odn_edit_dpm_table:             ; @vega20_odn_edit_dpm_table
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	cbz	x2, LBB0_5
; %bb.1:
	mov	x21, x1
	sub	w8, w1, #128
	cmp	w8, #4
	b.hi	LBB0_6
; %bb.2:
	mov	x20, x3
	mov	x22, x2
	mov	x19, x0
	ldp	x23, x26, [x0, #16]
	ldr	x25, [x0, #40]
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_3
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_3:
Lloh2:
	adrp	x8, _SMU_TABLE_OVERDRIVE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _SMU_TABLE_OVERDRIVE@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	x3, x23
	mov	w4, #0
	bl	_smu_update_table
	mov	x24, x0
	cbz	w0, LBB0_38
; %bb.4:
Lloh5:
	adrp	x0, l_.str.13@PAGE
Lloh6:
	add	x0, x0, l_.str.13@PAGEOFF
	bl	_pr_err
	b	LBB0_38
LBB0_5:
Lloh7:
	adrp	x0, l_.str@PAGE
Lloh8:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_warn
LBB0_6:
Lloh9:
	adrp	x8, _EINVAL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_37
LBB0_7:
	ldr	x8, [x26, #8]
Lloh11:
	adrp	x9, _OD8_SETTING_GFXCLK_FREQ1@GOTPAGE
Lloh12:
	ldr	x9, [x9, _OD8_SETTING_GFXCLK_FREQ1@GOTPAGEOFF]
Lloh13:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x10, x9, x10, x8
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_24
; %bb.8:
Lloh14:
	adrp	x10, _OD8_SETTING_GFXCLK_FREQ2@GOTPAGE
Lloh15:
	ldr	x10, [x10, _OD8_SETTING_GFXCLK_FREQ2@GOTPAGEOFF]
Lloh16:
	ldr	x10, [x10]
	mov	w11, #12
	madd	x10, x10, x11, x8
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_24
; %bb.9:
Lloh17:
	adrp	x10, _OD8_SETTING_GFXCLK_FREQ3@GOTPAGE
Lloh18:
	ldr	x10, [x10, _OD8_SETTING_GFXCLK_FREQ3@GOTPAGEOFF]
Lloh19:
	ldr	x10, [x10]
	mov	w11, #12
	madd	x10, x10, x11, x8
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_24
; %bb.10:
Lloh20:
	adrp	x10, _OD8_SETTING_GFXCLK_VOLTAGE1@GOTPAGE
Lloh21:
	ldr	x10, [x10, _OD8_SETTING_GFXCLK_VOLTAGE1@GOTPAGEOFF]
Lloh22:
	ldr	x10, [x10]
	mov	w11, #12
	madd	x11, x10, x11, x8
	ldr	w11, [x11, #8]
	cbz	w11, LBB0_24
; %bb.11:
Lloh23:
	adrp	x11, _OD8_SETTING_GFXCLK_VOLTAGE2@GOTPAGE
Lloh24:
	ldr	x11, [x11, _OD8_SETTING_GFXCLK_VOLTAGE2@GOTPAGEOFF]
Lloh25:
	ldr	x11, [x11]
	mov	w12, #12
	madd	x11, x11, x12, x8
	ldr	w11, [x11, #8]
	cbz	w11, LBB0_24
; %bb.12:
Lloh26:
	adrp	x11, _OD8_SETTING_GFXCLK_VOLTAGE3@GOTPAGE
Lloh27:
	ldr	x11, [x11, _OD8_SETTING_GFXCLK_VOLTAGE3@GOTPAGEOFF]
Lloh28:
	ldr	x11, [x11]
	mov	w12, #12
	madd	x11, x11, x12, x8
	ldr	w11, [x11, #8]
	cbz	w11, LBB0_24
; %bb.13:
	cmp	w20, #1
	b.lt	LBB0_69
; %bb.14:
	mov	x2, #0
	add	x11, x23, #28
Lloh29:
	adrp	x13, _VOLTAGE_SCALE@GOTPAGE
Lloh30:
	ldr	x13, [x13, _VOLTAGE_SCALE@GOTPAGEOFF]
	add	x12, x23, #32
Lloh31:
	ldr	w13, [x13]
	add	x14, x23, #20
	add	x15, x23, #24
	add	x16, x23, #12
	add	x17, x23, #16
	mov	w0, #12
	b	LBB0_60
LBB0_15:
	ldr	x9, [x26, #8]
Lloh32:
	adrp	x8, _OD8_SETTING_GFXCLK_FMIN@GOTPAGE
Lloh33:
	ldr	x8, [x8, _OD8_SETTING_GFXCLK_FMIN@GOTPAGEOFF]
Lloh34:
	ldr	x8, [x8]
	mov	w10, #12
	madd	x10, x8, x10, x9
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_34
; %bb.16:
Lloh35:
	adrp	x10, _OD8_SETTING_GFXCLK_FMAX@GOTPAGE
Lloh36:
	ldr	x10, [x10, _OD8_SETTING_GFXCLK_FMAX@GOTPAGEOFF]
Lloh37:
	ldr	x10, [x10]
	mov	w11, #12
	madd	x11, x10, x11, x9
	ldr	w11, [x11, #8]
	cbz	w11, LBB0_34
; %bb.17:
	cmp	w20, #1
	b.lt	LBB0_69
; %bb.18:
	mov	x13, #0
	mov	w11, #12
	madd	x8, x8, x11, x9
	madd	x9, x10, x11, x9
	add	x9, x9, #4
	add	x10, x23, #4
	mov	w11, #1
	b	LBB0_27
LBB0_19:
	ldr	x8, [x26, #8]
Lloh38:
	adrp	x27, _OD8_SETTING_UCLK_FMAX@GOTPAGE
Lloh39:
	ldr	x27, [x27, _OD8_SETTING_UCLK_FMAX@GOTPAGEOFF]
	ldr	x9, [x27]
	mov	w10, #12
	madd	x8, x9, x10, x8
	ldr	w8, [x8, #8]
	cbz	w8, LBB0_35
; %bb.20:
	add	x2, x25, #16
	add	x1, sp, #24
	mov	x0, x19
	bl	_vega20_get_clk_table
	cbz	w0, LBB0_43
; %bb.21:
	mov	x24, x0
Lloh40:
	adrp	x0, l_.str.7@PAGE
Lloh41:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	_pr_err
	b	LBB0_38
LBB0_22:
Lloh42:
	adrp	x8, _SMU_TABLE_OVERDRIVE@GOTPAGE
Lloh43:
	ldr	x8, [x8, _SMU_TABLE_OVERDRIVE@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	x3, x23
	mov	w4, #1
	bl	_smu_update_table
	cbz	w0, LBB0_39
; %bb.23:
	mov	x24, x0
Lloh45:
	adrp	x0, l_.str.14@PAGE
Lloh46:
	add	x0, x0, l_.str.14@PAGEOFF
	bl	_pr_err
	b	LBB0_38
LBB0_24:
Lloh47:
	adrp	x0, l_.str.9@PAGE
Lloh48:
	add	x0, x0, l_.str.9@PAGEOFF
	b	LBB0_36
LBB0_25:                                ;   in Loop: Header=BB0_27 Depth=1
	str	w13, [x14]
	str	w11, [x26]
LBB0_26:                                ;   in Loop: Header=BB0_27 Depth=1
	mov	x13, x12
	cmp	w12, w20
	b.ge	LBB0_67
LBB0_27:                                ; =>This Inner Loop Header: Depth=1
	add	x12, x13, #2
	cmp	w12, w20
	b.gt	LBB0_71
; %bb.28:                               ;   in Loop: Header=BB0_27 Depth=1
	add	x13, x22, x13, lsl #3
	ldr	x14, [x13]
	cmp	w14, #2
	b.hs	LBB0_53
; %bb.29:                               ;   in Loop: Header=BB0_27 Depth=1
	ldr	x13, [x13, #8]
	ldr	w15, [x8]
	ldr	w16, [x9]
	cmp	w15, w13
	ccmp	w16, w13, #8, le
	b.lt	LBB0_54
; %bb.30:                               ;   in Loop: Header=BB0_27 Depth=1
	cmp	w14, #1
	b.eq	LBB0_33
; %bb.31:                               ;   in Loop: Header=BB0_27 Depth=1
	cbnz	w14, LBB0_26
; %bb.32:                               ;   in Loop: Header=BB0_27 Depth=1
	ldr	w15, [x23]
	mov	x14, x23
	cmp	w15, w13
	b.eq	LBB0_26
	b	LBB0_25
LBB0_33:                                ;   in Loop: Header=BB0_27 Depth=1
	ldr	w15, [x10]
	mov	x14, x10
	cmp	w15, w13
	b.eq	LBB0_26
	b	LBB0_25
LBB0_34:
Lloh49:
	adrp	x0, l_.str.1@PAGE
Lloh50:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_36
LBB0_35:
Lloh51:
	adrp	x0, l_.str.6@PAGE
Lloh52:
	add	x0, x0, l_.str.6@PAGEOFF
LBB0_36:
	bl	_pr_info
Lloh53:
	adrp	x8, _EOPNOTSUPP@GOTPAGE
Lloh54:
	ldr	x8, [x8, _EOPNOTSUPP@GOTPAGEOFF]
LBB0_37:
	ldr	w8, [x8]
	neg	w24, w8
LBB0_38:
	mov	x0, x24
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_39:
	ldr	w8, [x26]
	cbz	w8, LBB0_68
; %bb.40:
	str	wzr, [x26]
Lloh55:
	adrp	x8, _SMU_FEATURE_DPM_GFXCLK_BIT@GOTPAGE
Lloh56:
	ldr	x8, [x8, _SMU_FEATURE_DPM_GFXCLK_BIT@GOTPAGEOFF]
Lloh57:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_smu_feature_is_enabled
	cbz	w0, LBB0_52
; %bb.41:
Lloh58:
	adrp	x8, _PPCLK_GFXCLK@GOTPAGE
Lloh59:
	ldr	x8, [x8, _PPCLK_GFXCLK@GOTPAGEOFF]
Lloh60:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x25
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_68
; %bb.42:
	mov	x24, x0
Lloh61:
	adrp	x0, l_.str.15@PAGE
Lloh62:
	add	x0, x0, l_.str.15@PAGEOFF
	bl	_pr_err
	b	LBB0_38
LBB0_43:
	cmp	w20, #1
	b.lt	LBB0_69
; %bb.44:
	mov	x14, #0
	ldr	x8, [sp, #24]
	ldr	x9, [x27]
	mov	w10, #19923
	movk	w10, #4194, lsl #16
	mov	w11, #12
	mov	w12, #1
	b	LBB0_46
LBB0_45:                                ;   in Loop: Header=BB0_46 Depth=1
	mov	x14, x13
	cmp	w13, w20
	b.ge	LBB0_67
LBB0_46:                                ; =>This Inner Loop Header: Depth=1
	add	x13, x14, #2
	cmp	w13, w20
	b.gt	LBB0_70
; %bb.47:                               ;   in Loop: Header=BB0_46 Depth=1
	add	x15, x22, x14, lsl #3
	ldr	x14, [x15]
	cmp	w14, #1
	b.ne	LBB0_72
; %bb.48:                               ;   in Loop: Header=BB0_46 Depth=1
	ldr	x14, [x15, #8]
	ldrsw	x15, [x8]
	mul	x15, x15, x10
	lsr	x17, x15, #63
	asr	x15, x15, #38
	ldr	x16, [x26, #8]
	add	w15, w15, w17
	cmp	w15, w14
	b.gt	LBB0_55
; %bb.49:                               ;   in Loop: Header=BB0_46 Depth=1
	madd	x17, x9, x11, x16
	ldr	w17, [x17, #4]
	cmp	w17, w14
	b.lt	LBB0_55
; %bb.50:                               ;   in Loop: Header=BB0_46 Depth=1
	ldr	w15, [x23, #8]
	cmp	w15, w14
	b.eq	LBB0_45
; %bb.51:                               ;   in Loop: Header=BB0_46 Depth=1
	str	w12, [x26]
	str	w14, [x23, #8]
	b	LBB0_45
LBB0_52:
	mov	w8, #1
	str	w8, [x25]
	ldrsw	x8, [x19, #8]
	mov	w9, #34079
	movk	w9, #20971, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #37
	add	w8, w8, w9
	ldr	x9, [x25, #8]
	str	w8, [x9]
	b	LBB0_68
LBB0_53:
	str	x14, [sp]
Lloh63:
	adrp	x0, l_.str.3@PAGE
Lloh64:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_pr_info
Lloh65:
	adrp	x0, l_.str.4@PAGE
Lloh66:
	add	x0, x0, l_.str.4@PAGEOFF
	b	LBB0_76
LBB0_54:
	stp	x15, x16, [sp, #8]
	str	x13, [sp]
	b	LBB0_56
LBB0_55:
	ldr	x8, [x27]
	mov	w9, #12
	madd	x8, x8, x9, x16
	ldr	w8, [x8, #4]
	stp	x15, x8, [sp, #8]
	str	x14, [sp]
LBB0_56:
Lloh67:
	adrp	x0, l_.str.5@PAGE
Lloh68:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_76
LBB0_57:                                ;   in Loop: Header=BB0_60 Depth=1
	mov	x5, x11
	mov	x6, x12
LBB0_58:                                ;   in Loop: Header=BB0_60 Depth=1
	str	w2, [x5]
	mul	w2, w13, w4
	str	w2, [x6]
LBB0_59:                                ;   in Loop: Header=BB0_60 Depth=1
	mov	x2, x1
	cmp	w1, w20
	b.ge	LBB0_67
LBB0_60:                                ; =>This Inner Loop Header: Depth=1
	add	x1, x2, #3
	cmp	w1, w20
	b.gt	LBB0_70
; %bb.61:                               ;   in Loop: Header=BB0_60 Depth=1
	add	x4, x22, x2, lsl #3
	ldr	x3, [x4]
	cmp	w3, #3
	b.ge	LBB0_73
; %bb.62:                               ;   in Loop: Header=BB0_60 Depth=1
	ldr	x2, [x4, #8]
	lsl	w6, w3, #1
	add	w5, w6, w9
	smaddl	x7, w5, w0, x8
	ldp	w5, w7, [x7]
	cmp	w5, w2
	ccmp	w7, w2, #8, le
	b.lt	LBB0_74
; %bb.63:                               ;   in Loop: Header=BB0_60 Depth=1
	ldr	x4, [x4, #16]
	add	w5, w6, w10
	smaddl	x6, w5, w0, x8
	ldp	w5, w6, [x6]
	cmp	w5, w4
	ccmp	w6, w4, #8, le
	b.lt	LBB0_75
; %bb.64:                               ;   in Loop: Header=BB0_60 Depth=1
	mov	x5, x16
	mov	x6, x17
	cbz	w3, LBB0_58
; %bb.65:                               ;   in Loop: Header=BB0_60 Depth=1
	cmp	w3, #2
	b.eq	LBB0_57
; %bb.66:                               ;   in Loop: Header=BB0_60 Depth=1
	mov	x5, x14
	mov	x6, x15
	cmp	w3, #1
	b.eq	LBB0_58
	b	LBB0_59
LBB0_67:
	cmp	w21, #132
	b.ne	LBB0_69
LBB0_68:
	mov	x0, x19
	bl	_mutex_lock
	ldr	w1, [x19, #32]
Lloh69:
	adrp	x8, _AMD_PP_TASK_READJUST_POWER_STATE@GOTPAGE
Lloh70:
	ldr	x8, [x8, _AMD_PP_TASK_READJUST_POWER_STATE@GOTPAGEOFF]
Lloh71:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_smu_handle_task
	mov	x24, x0
	mov	x0, x19
	bl	_mutex_unlock
	b	LBB0_38
LBB0_69:
	mov	w24, #0
	b	LBB0_38
LBB0_70:
                                        ; kill: def $w20 killed $w20 killed $x20 def $x20
LBB0_71:
	str	x20, [sp]
Lloh72:
	adrp	x0, l_.str.2@PAGE
Lloh73:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_76
LBB0_72:
	str	x14, [sp]
Lloh74:
	adrp	x0, l_.str.3@PAGE
Lloh75:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_pr_info
Lloh76:
	adrp	x0, l_.str.8@PAGE
Lloh77:
	add	x0, x0, l_.str.8@PAGEOFF
	b	LBB0_76
LBB0_73:
	add	w8, w3, #1
	str	x8, [sp]
Lloh78:
	adrp	x0, l_.str.10@PAGE
Lloh79:
	add	x0, x0, l_.str.10@PAGEOFF
	bl	_pr_info
Lloh80:
	adrp	x0, l_.str.11@PAGE
Lloh81:
	add	x0, x0, l_.str.11@PAGEOFF
	b	LBB0_76
LBB0_74:
	stp	x5, x7, [sp, #8]
	str	x2, [sp]
	b	LBB0_56
LBB0_75:
	stp	x5, x6, [sp, #8]
	str	x4, [sp]
Lloh82:
	adrp	x0, l_.str.12@PAGE
Lloh83:
	add	x0, x0, l_.str.12@PAGEOFF
LBB0_76:
	bl	_pr_info
	b	LBB0_6
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpAdd	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpAdd	Lloh47, Lloh48
	.loh AdrpAdd	Lloh49, Lloh50
	.loh AdrpAdd	Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpAdd	Lloh61, Lloh62
	.loh AdrpAdd	Lloh65, Lloh66
	.loh AdrpAdd	Lloh63, Lloh64
	.loh AdrpAdd	Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpAdd	Lloh72, Lloh73
	.loh AdrpAdd	Lloh76, Lloh77
	.loh AdrpAdd	Lloh74, Lloh75
	.loh AdrpAdd	Lloh80, Lloh81
	.loh AdrpAdd	Lloh78, Lloh79
	.loh AdrpAdd	Lloh82, Lloh83
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_7-LBB0_3)>>2
	.byte	(LBB0_15-LBB0_3)>>2
	.byte	(LBB0_19-LBB0_3)>>2
	.byte	(LBB0_22-LBB0_3)>>2
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"NULL user input for clock and voltage\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_OD8_SETTING_GFXCLK_FMIN,8,3    ; @OD8_SETTING_GFXCLK_FMIN
	.comm	_OD8_SETTING_GFXCLK_FMAX,8,3    ; @OD8_SETTING_GFXCLK_FMAX
l_.str.1:                               ; @.str.1
	.asciz	"Sclk min/max frequency overdrive not supported\n"

	.comm	_EOPNOTSUPP,4,2                 ; @EOPNOTSUPP
l_.str.2:                               ; @.str.2
	.asciz	"invalid number of input parameters %d\n"

l_.str.3:                               ; @.str.3
	.asciz	"Invalid index %d\n"

l_.str.4:                               ; @.str.4
	.asciz	"Support min/max sclk frequency settingonly which index by 0/1\n"

l_.str.5:                               ; @.str.5
	.asciz	"clock freq %d is not within allowed range [%d - %d]\n"

	.comm	_OD8_SETTING_UCLK_FMAX,8,3      ; @OD8_SETTING_UCLK_FMAX
l_.str.6:                               ; @.str.6
	.asciz	"Mclk max frequency overdrive not supported\n"

l_.str.7:                               ; @.str.7
	.asciz	"Attempt to get memory clk levels Failed!"

l_.str.8:                               ; @.str.8
	.asciz	"Support max Mclk frequency setting only which index by 1\n"

	.comm	_OD8_SETTING_GFXCLK_FREQ1,8,3   ; @OD8_SETTING_GFXCLK_FREQ1
	.comm	_OD8_SETTING_GFXCLK_FREQ2,8,3   ; @OD8_SETTING_GFXCLK_FREQ2
	.comm	_OD8_SETTING_GFXCLK_FREQ3,8,3   ; @OD8_SETTING_GFXCLK_FREQ3
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE1,8,3 ; @OD8_SETTING_GFXCLK_VOLTAGE1
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE2,8,3 ; @OD8_SETTING_GFXCLK_VOLTAGE2
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE3,8,3 ; @OD8_SETTING_GFXCLK_VOLTAGE3
l_.str.9:                               ; @.str.9
	.asciz	"Voltage curve calibrate not supported\n"

l_.str.10:                              ; @.str.10
	.asciz	"Setting for point %d is not supported\n"

l_.str.11:                              ; @.str.11
	.asciz	"Three supported points index by 0, 1, 2\n"

l_.str.12:                              ; @.str.12
	.asciz	"clock voltage %d is not within allowed range [%d- %d]\n"

	.comm	_VOLTAGE_SCALE,4,2              ; @VOLTAGE_SCALE
	.comm	_SMU_TABLE_OVERDRIVE,4,2        ; @SMU_TABLE_OVERDRIVE
l_.str.13:                              ; @.str.13
	.asciz	"Failed to export over drive table!\n"

l_.str.14:                              ; @.str.14
	.asciz	"Failed to import over drive table!\n"

	.comm	_SMU_FEATURE_DPM_GFXCLK_BIT,4,2 ; @SMU_FEATURE_DPM_GFXCLK_BIT
	.comm	_PPCLK_GFXCLK,4,2               ; @PPCLK_GFXCLK
l_.str.15:                              ; @.str.15
	.asciz	"[Setoverdrive] failed to refresh dpm table!\n"

	.comm	_AMD_PP_TASK_READJUST_POWER_STATE,4,2 ; @AMD_PP_TASK_READJUST_POWER_STATE
	.no_dead_strip	_vega20_odn_edit_dpm_table
.subsections_via_symbols
