	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smu_v11_0_load_microcode
_smu_v11_0_load_microcode:              ## @smu_v11_0_load_microcode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %r15
	movq	_MP1_SRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	8(%r15), %rax
	movq	(%rax), %rbx
	movl	(%rbx), %edi
	callq	_le32_to_cpu
	movq	_MP1_SMC_SIZE@GOTPCREL(%rip), %r12
	cmpl	$12, (%r12)
	jl	LBB0_3
## %bb.1:
	movq	%rax, %r14
	addq	%rbx, %r14
	movl	$1, %ebx
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r14,%rbx,4), %esi
	movl	%r13d, %edi
	callq	_WREG32_PCIE
	addl	$4, %r13d
	incq	%rbx
	movl	(%r12), %eax
	leal	3(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$2, %ecx
	decl	%ecx
	movslq	%ecx, %rax
	cmpq	%rax, %rbx
	jl	LBB0_2
LBB0_3:
	movq	_MP1_Public@GOTPCREL(%rip), %rbx
	movq	_smnMP1_PUB_CTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	orl	(%rbx), %edi
	movq	_MP1_SMN_PUB_CTRL__RESET_MASK@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	andl	$1, %esi
	callq	_WREG32_PCIE
	movl	(%r14), %edi
	orl	(%rbx), %edi
	movl	(%r12), %esi
	notl	%esi
	andl	$1, %esi
	callq	_WREG32_PCIE
	movl	(%r15), %ecx
	movl	$0, %ebx
	testl	%ecx, %ecx
	jle	LBB0_8
## %bb.4:
	xorl	%ebx, %ebx
	movq	_smnMP1_FIRMWARE_FLAGS@GOTPCREL(%rip), %r13
	movq	_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK@GOTPCREL(%rip), %r14
	movq	_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r13), %edi
	movq	_MP1_Public@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	callq	_RREG32_PCIE
	andl	(%r14), %eax
	movzbl	(%r12), %ecx
	sarl	%cl, %eax
	testl	%eax, %eax
	jne	LBB0_6
## %bb.7:                               ##   in Loop: Header=BB0_5 Depth=1
	movl	$1, %edi
	callq	_udelay
	incl	%ebx
	movl	(%r15), %ecx
	cmpl	%ecx, %ebx
	jl	LBB0_5
	jmp	LBB0_8
LBB0_6:
	movl	(%r15), %ecx
LBB0_8:
	movq	_ETIME@GOTPCREL(%rip), %rdx
	xorl	%eax, %eax
	subl	(%rdx), %eax
	cmpl	%ecx, %ebx
	movl	$0, %ecx
	cmovnel	%ecx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MP1_SRAM,4,2                   ## @MP1_SRAM
	.comm	_MP1_SMC_SIZE,4,2               ## @MP1_SMC_SIZE
	.comm	_MP1_Public,4,2                 ## @MP1_Public
	.comm	_smnMP1_PUB_CTRL,4,2            ## @smnMP1_PUB_CTRL
	.comm	_MP1_SMN_PUB_CTRL__RESET_MASK,4,2 ## @MP1_SMN_PUB_CTRL__RESET_MASK
	.comm	_smnMP1_FIRMWARE_FLAGS,4,2      ## @smnMP1_FIRMWARE_FLAGS
	.comm	_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK,4,2 ## @MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK
	.comm	_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT,4,2 ## @MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT
	.comm	_ETIME,4,2                      ## @ETIME
	.no_dead_strip	_smu_v11_0_load_microcode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smu_v11_0_load_microcode
_smu_v11_0_load_microcode:              ; @smu_v11_0_load_microcode
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	x20, [x0]
Lloh0:
	adrp	x8, _MP1_SRAM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MP1_SRAM@GOTPAGEOFF]
Lloh2:
	ldr	w19, [x8]
	ldr	x8, [x20, #8]
	ldr	x22, [x8]
	ldr	w0, [x22]
	bl	_le32_to_cpu
Lloh3:
	adrp	x21, _MP1_SMC_SIZE@GOTPAGE
Lloh4:
	ldr	x21, [x21, _MP1_SMC_SIZE@GOTPAGEOFF]
	ldr	w8, [x21]
	cmp	w8, #12
	b.lt	LBB0_3
; %bb.1:
	add	x22, x0, x22
	mov	w23, #1
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x22, x23, lsl #2]
	mov	x0, x19
	bl	_WREG32_PCIE
	add	w19, w19, #4
	add	x23, x23, #1
	ldr	w8, [x21]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w8, w8, #2
	sub	w8, w8, #1
	cmp	x23, w8, sxtw
	b.lt	LBB0_2
LBB0_3:
Lloh5:
	adrp	x19, _MP1_Public@GOTPAGE
Lloh6:
	ldr	x19, [x19, _MP1_Public@GOTPAGEOFF]
	ldr	w8, [x19]
Lloh7:
	adrp	x21, _smnMP1_PUB_CTRL@GOTPAGE
Lloh8:
	ldr	x21, [x21, _smnMP1_PUB_CTRL@GOTPAGEOFF]
	ldr	w9, [x21]
	orr	w0, w9, w8
Lloh9:
	adrp	x22, _MP1_SMN_PUB_CTRL__RESET_MASK@GOTPAGE
Lloh10:
	ldr	x22, [x22, _MP1_SMN_PUB_CTRL__RESET_MASK@GOTPAGEOFF]
	ldr	w8, [x22]
	and	w1, w8, #0x1
	bl	_WREG32_PCIE
	ldr	w8, [x19]
	ldr	w9, [x21]
	orr	w0, w9, w8
	ldr	w8, [x22]
	mvn	w8, w8
	and	w1, w8, #0x1
	bl	_WREG32_PCIE
	ldr	w8, [x20]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.4:
	mov	w21, #0
Lloh11:
	adrp	x22, _smnMP1_FIRMWARE_FLAGS@GOTPAGE
Lloh12:
	ldr	x22, [x22, _smnMP1_FIRMWARE_FLAGS@GOTPAGEOFF]
Lloh13:
	adrp	x23, _MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK@GOTPAGE
Lloh14:
	ldr	x23, [x23, _MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK@GOTPAGEOFF]
Lloh15:
	adrp	x24, _MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT@GOTPAGE
Lloh16:
	ldr	x24, [x24, _MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT@GOTPAGEOFF]
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x19]
	ldr	w9, [x22]
	orr	w0, w9, w8
	bl	_RREG32_PCIE
	ldr	w8, [x23]
	and	w8, w8, w0
	ldr	w9, [x24]
	asr	w8, w8, w9
	cbnz	w8, LBB0_8
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	mov	w0, #1
	bl	_udelay
	add	w21, w21, #1
	ldr	w8, [x20]
	cmp	w21, w8
	b.lt	LBB0_5
	b	LBB0_9
LBB0_7:
	mov	w21, #0
	b	LBB0_9
LBB0_8:
	ldr	w8, [x20]
LBB0_9:
Lloh17:
	adrp	x9, _ETIME@GOTPAGE
Lloh18:
	ldr	x9, [x9, _ETIME@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	cmp	w21, w8
	csneg	w0, wzr, w9, ne
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_MP1_SRAM,4,2                   ; @MP1_SRAM
	.comm	_MP1_SMC_SIZE,4,2               ; @MP1_SMC_SIZE
	.comm	_MP1_Public,4,2                 ; @MP1_Public
	.comm	_smnMP1_PUB_CTRL,4,2            ; @smnMP1_PUB_CTRL
	.comm	_MP1_SMN_PUB_CTRL__RESET_MASK,4,2 ; @MP1_SMN_PUB_CTRL__RESET_MASK
	.comm	_smnMP1_FIRMWARE_FLAGS,4,2      ; @smnMP1_FIRMWARE_FLAGS
	.comm	_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK,4,2 ; @MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK
	.comm	_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT,4,2 ; @MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT
	.comm	_ETIME,4,2                      ; @ETIME
	.no_dead_strip	_smu_v11_0_load_microcode
.subsections_via_symbols
