	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function r300_startup
_r300_startup:                          ## @r300_startup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	callq	_r100_set_common_regs
	movq	%rbx, %rdi
	callq	_r300_mc_program
	movq	%rbx, %rdi
	callq	_r300_clock_startup
	movq	%rbx, %rdi
	callq	_r300_gpu_init
	movq	_RADEON_IS_PCIE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_rv370_pcie_gart_enable
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_19
LBB0_2:
	movq	8(%rbx), %rax
	movq	_CHIP_R300@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_5
## %bb.3:
	movq	_CHIP_R350@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_5
## %bb.4:
	movq	_CHIP_RV350@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_6
LBB0_5:
	movq	%rbx, %rdi
	callq	_r100_enable_bm
LBB0_6:
	movq	_RADEON_IS_PCI@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_8
## %bb.7:
	movq	%rbx, %rdi
	callq	_r100_pci_gart_enable
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_19
LBB0_8:
	movq	%rbx, %rdi
	callq	_radeon_wb_init
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_19
## %bb.9:
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	je	LBB0_11
## %bb.10:
	movl	%eax, %r14d
	movl	16(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_18
LBB0_11:
	cmpl	$0, 24(%rbx)
	je	LBB0_12
LBB0_13:
	movq	%rbx, %rdi
	callq	_r100_irq_set
	movq	_RADEON_HOST_PATH_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%eax, 20(%rbx)
	movq	%rbx, %rdi
	movl	$1048576, %esi                  ## imm = 0x100000
	callq	_r100_cp_init
	testl	%eax, %eax
	je	LBB0_15
## %bb.14:
	movl	%eax, %r14d
	movl	16(%rbx), %edi
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_18
LBB0_12:
	movq	%rbx, %rdi
	callq	_radeon_irq_kms_init
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_19
	jmp	LBB0_13
LBB0_15:
	movq	%rbx, %rdi
	callq	_radeon_ib_pool_init
	testl	%eax, %eax
	je	LBB0_16
## %bb.17:
	movl	%eax, %r14d
	movl	16(%rbx), %edi
	leaq	L_.str.2(%rip), %rsi
LBB0_18:
	movl	%r14d, %edx
	callq	_dev_err
LBB0_19:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_16:
	xorl	%r14d, %r14d
	jmp	LBB0_19
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_IS_PCIE,4,2             ## @RADEON_IS_PCIE
	.comm	_CHIP_R300,8,3                  ## @CHIP_R300
	.comm	_CHIP_R350,8,3                  ## @CHIP_R350
	.comm	_CHIP_RV350,8,3                 ## @CHIP_RV350
	.comm	_RADEON_IS_PCI,4,2              ## @RADEON_IS_PCI
	.comm	_RADEON_RING_TYPE_GFX_INDEX,4,2 ## @RADEON_RING_TYPE_GFX_INDEX
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_RADEON_HOST_PATH_CNTL,4,2      ## @RADEON_HOST_PATH_CNTL
L_.str.1:                               ## @.str.1
	.asciz	"failed initializing CP (%d).\n"

L_.str.2:                               ## @.str.2
	.asciz	"IB initialization failed (%d).\n"

	.no_dead_strip	_r300_startup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function r300_startup
_r300_startup:                          ; @r300_startup
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_r100_set_common_regs
	mov	x0, x19
	bl	_r300_mc_program
	mov	x0, x19
	bl	_r300_clock_startup
	mov	x0, x19
	bl	_r300_gpu_init
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _RADEON_IS_PCIE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_IS_PCIE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_rv370_pcie_gart_enable
	mov	x20, x0
	cbnz	w0, LBB0_16
LBB0_2:
	ldr	x8, [x19, #8]
Lloh3:
	adrp	x9, _CHIP_R300@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CHIP_R300@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
Lloh6:
	adrp	x10, _CHIP_R350@GOTPAGE
Lloh7:
	ldr	x10, [x10, _CHIP_R350@GOTPAGEOFF]
Lloh8:
	ldr	x10, [x10]
Lloh9:
	adrp	x11, _CHIP_RV350@GOTPAGE
Lloh10:
	ldr	x11, [x11, _CHIP_RV350@GOTPAGEOFF]
Lloh11:
	ldr	x11, [x11]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	ccmp	x8, x11, #4, ne
	b.ne	LBB0_4
; %bb.3:
	mov	x0, x19
	bl	_r100_enable_bm
LBB0_4:
	ldr	w8, [x19]
Lloh12:
	adrp	x9, _RADEON_IS_PCI@GOTPAGE
Lloh13:
	ldr	x9, [x9, _RADEON_IS_PCI@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.5:
	mov	x0, x19
	bl	_r100_pci_gart_enable
	mov	x20, x0
	cbnz	w0, LBB0_16
LBB0_6:
	mov	x0, x19
	bl	_radeon_wb_init
	mov	x20, x0
	cbnz	w0, LBB0_16
; %bb.7:
Lloh15:
	adrp	x8, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbz	w0, LBB0_9
; %bb.8:
	mov	x20, x0
	ldr	w0, [x19, #16]
Lloh18:
	adrp	x1, l_.str@PAGE
Lloh19:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_15
LBB0_9:
	ldr	w8, [x19, #24]
	cbz	w8, LBB0_12
LBB0_10:
	mov	x0, x19
	bl	_r100_irq_set
Lloh20:
	adrp	x8, _RADEON_HOST_PATH_CNTL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _RADEON_HOST_PATH_CNTL@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	bl	_RREG32
	str	w0, [x19, #20]
	mov	x0, x19
	mov	w1, #1048576
	bl	_r100_cp_init
	cbz	w0, LBB0_13
; %bb.11:
	mov	x20, x0
	ldr	w0, [x19, #16]
Lloh23:
	adrp	x1, l_.str.1@PAGE
Lloh24:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_15
LBB0_12:
	mov	x0, x19
	bl	_radeon_irq_kms_init
	mov	x20, x0
	cbnz	w0, LBB0_16
	b	LBB0_10
LBB0_13:
	mov	x0, x19
	bl	_radeon_ib_pool_init
	mov	x20, x0
	cbz	w0, LBB0_16
; %bb.14:
	ldr	w0, [x19, #16]
Lloh25:
	adrp	x1, l_.str.2@PAGE
Lloh26:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_15:
	mov	x2, x20
	bl	_dev_err
LBB0_16:
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpAdd	Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_IS_PCIE,4,2             ; @RADEON_IS_PCIE
	.comm	_CHIP_R300,8,3                  ; @CHIP_R300
	.comm	_CHIP_R350,8,3                  ; @CHIP_R350
	.comm	_CHIP_RV350,8,3                 ; @CHIP_RV350
	.comm	_RADEON_IS_PCI,4,2              ; @RADEON_IS_PCI
	.comm	_RADEON_RING_TYPE_GFX_INDEX,4,2 ; @RADEON_RING_TYPE_GFX_INDEX
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_RADEON_HOST_PATH_CNTL,4,2      ; @RADEON_HOST_PATH_CNTL
l_.str.1:                               ; @.str.1
	.asciz	"failed initializing CP (%d).\n"

l_.str.2:                               ; @.str.2
	.asciz	"IB initialization failed (%d).\n"

	.no_dead_strip	_r300_startup
.subsections_via_symbols
