	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rv6xx_enable_pcie_gen2_support
_rv6xx_enable_pcie_gen2_support:        ## @rv6xx_enable_pcie_gen2_support
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	_PCIE_LC_SPEED_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_RREG32_PCIE_PORT
	movq	_LC_OTHER_SIDE_EVER_SENT_GEN2@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_2
## %bb.1:
	movq	_LC_OTHER_SIDE_SUPPORTS_GEN2@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_2
## %bb.3:
	movq	_LC_GEN2_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_WREG32_PCIE_PORT               ## TAILCALL
LBB0_2:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_LC_SPEED_CNTL,4,2         ## @PCIE_LC_SPEED_CNTL
	.comm	_LC_OTHER_SIDE_EVER_SENT_GEN2,4,2 ## @LC_OTHER_SIDE_EVER_SENT_GEN2
	.comm	_LC_OTHER_SIDE_SUPPORTS_GEN2,4,2 ## @LC_OTHER_SIDE_SUPPORTS_GEN2
	.comm	_LC_GEN2_EN,4,2                 ## @LC_GEN2_EN
	.no_dead_strip	_rv6xx_enable_pcie_gen2_support
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rv6xx_enable_pcie_gen2_support
_rv6xx_enable_pcie_gen2_support:        ; @rv6xx_enable_pcie_gen2_support
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x19, _PCIE_LC_SPEED_CNTL@GOTPAGE
Lloh1:
	ldr	x19, [x19, _PCIE_LC_SPEED_CNTL@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_RREG32_PCIE_PORT
Lloh2:
	adrp	x8, _LC_OTHER_SIDE_EVER_SENT_GEN2@GOTPAGE
Lloh3:
	ldr	x8, [x8, _LC_OTHER_SIDE_EVER_SENT_GEN2@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_3
; %bb.1:
Lloh5:
	adrp	x8, _LC_OTHER_SIDE_SUPPORTS_GEN2@GOTPAGE
Lloh6:
	ldr	x8, [x8, _LC_OTHER_SIDE_SUPPORTS_GEN2@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_3
; %bb.2:
Lloh8:
	adrp	x8, _LC_GEN2_EN@GOTPAGE
Lloh9:
	ldr	x8, [x8, _LC_GEN2_EN@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w0, [x19]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_WREG32_PCIE_PORT
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_LC_SPEED_CNTL,4,2         ; @PCIE_LC_SPEED_CNTL
	.comm	_LC_OTHER_SIDE_EVER_SENT_GEN2,4,2 ; @LC_OTHER_SIDE_EVER_SENT_GEN2
	.comm	_LC_OTHER_SIDE_SUPPORTS_GEN2,4,2 ; @LC_OTHER_SIDE_SUPPORTS_GEN2
	.comm	_LC_GEN2_EN,4,2                 ; @LC_GEN2_EN
	.no_dead_strip	_rv6xx_enable_pcie_gen2_support
.subsections_via_symbols
