	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_uvd_resume              ## -- Begin function amdgpu_uvd_resume
	.p2align	4, 0x90
_amdgpu_uvd_resume:                     ## @amdgpu_uvd_resume
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$0, (%rdi)
	jle	LBB0_11
## %bb.1:
	movq	%rdi, %rbx
	xorl	%r12d, %r12d
	xorl	%r14d, %r14d
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	%r15, %rdi
	callq	_memcpy_toio
	movq	8(%rbx), %rax
	movq	16(%rax,%r12), %rdi
	callq	_kvfree
	movq	8(%rbx), %rax
	movq	$0, 16(%rax,%r12)
LBB0_10:                                ##   in Loop: Header=BB0_2 Depth=1
	incq	%r14
	movslq	(%rbx), %rax
	addq	$32, %r12
	cmpq	%rax, %r14
	jge	LBB0_11
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	4(%rbx), %eax
	btl	%r14d, %eax
	jb	LBB0_10
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	8(%rbx), %rax
	movq	24(%rax,%r12), %rdi
	testq	%rdi, %rdi
	je	LBB0_4
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	callq	_amdgpu_bo_size
	movl	%eax, %edx
	movq	8(%rbx), %rax
	movq	(%rax,%r12), %r15
	movq	16(%rax,%r12), %rsi
	testq	%rsi, %rsi
	jne	LBB0_6
## %bb.7:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	24(%rbx), %rax
	movq	_AMDGPU_FW_LOAD_PSP@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_9
## %bb.8:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	16(%rbx), %rax
	movq	(%rax), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movl	4(%rax), %edi
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	callq	_le32_to_cpu
	movq	8(%rbx), %rcx
	movq	16(%rbx), %rdx
	movq	(%rcx,%r12), %rcx
	movq	%rcx, -64(%rbp)                 ## 8-byte Spill
	movl	%eax, %r13d
	shlq	$2, %r13
	addq	(%rdx), %r13
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edi
	callq	_le32_to_cpu
	movq	-64(%rbp), %rdi                 ## 8-byte Reload
	movq	%r13, %rsi
	movl	%eax, %edx
	callq	_memcpy_toio
	movq	-56(%rbp), %r13                 ## 8-byte Reload
	movl	(%r13), %edi
	callq	_le32_to_cpu
	subl	%eax, -44(%rbp)                 ## 4-byte Folded Spill
	movl	(%r13), %edi
	callq	_le32_to_cpu
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	movl	%eax, %eax
	addq	%rax, %r15
LBB0_9:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_memset_io
	movq	8(%rbx), %rax
	leaq	(%rax,%r12), %rdi
	addq	$8, %rdi
	callq	_amdgpu_fence_driver_force_completion
	jmp	LBB0_10
LBB0_11:
	xorl	%eax, %eax
LBB0_12:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_AMDGPU_FW_LOAD_PSP,8,3         ## @AMDGPU_FW_LOAD_PSP
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_uvd_resume              ; -- Begin function amdgpu_uvd_resume
	.p2align	2
_amdgpu_uvd_resume:                     ; @amdgpu_uvd_resume
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0]
	cmp	w8, #1
	b.lt	LBB0_10
; %bb.1:
	mov	x19, x0
	mov	x24, #0
	mov	x25, #0
Lloh0:
	adrp	x26, _AMDGPU_FW_LOAD_PSP@GOTPAGE
Lloh1:
	ldr	x26, [x26, _AMDGPU_FW_LOAD_PSP@GOTPAGEOFF]
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x21
	mov	w1, #0
	mov	x2, x20
	bl	_memset_io
	ldr	x8, [x19, #8]
	add	x8, x8, x24
	add	x0, x8, #8
	bl	_amdgpu_fence_driver_force_completion
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	x25, x25, #1
	ldrsw	x8, [x19]
	add	x24, x24, #32
	cmp	x25, x8
	b.ge	LBB0_10
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x19, #4]
	lsr	w8, w8, w25
	tbnz	w8, #0, LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	x8, [x19, #8]
	add	x8, x8, x24
	ldr	x0, [x8, #24]
	cbz	x0, LBB0_12
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	bl	_amdgpu_bo_size
	mov	x20, x0
	ldr	x8, [x19, #8]
	add	x8, x8, x24
	ldr	x21, [x8]
	ldr	x1, [x8, #16]
	cbz	x1, LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x21
	mov	x2, x20
	bl	_memcpy_toio
	ldr	x8, [x19, #8]
	add	x8, x8, x24
	ldr	x0, [x8, #16]
	bl	_kvfree
	ldr	x8, [x19, #8]
	add	x8, x8, x24
	str	xzr, [x8, #16]
	b	LBB0_3
LBB0_8:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	x8, [x19, #24]
	ldr	x9, [x26]
	cmp	x8, x9
	b.eq	LBB0_2
; %bb.9:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	x8, [x19, #16]
	ldr	x27, [x8]
	ldr	w0, [x27, #4]
	bl	_le32_to_cpu
	ldp	x8, x9, [x19, #8]
	ldr	x22, [x8, x24]
	ldr	x8, [x9]
	add	x23, x8, w0, uxtw #2
	ldr	w0, [x27]
	bl	_le32_to_cpu
	mov	x2, x0
	mov	x0, x22
	mov	x1, x23
	bl	_memcpy_toio
	ldr	w0, [x27]
	bl	_le32_to_cpu
	sub	w20, w20, w0
	ldr	w0, [x27]
	bl	_le32_to_cpu
	add	x21, x21, w0, uxtw
	b	LBB0_2
LBB0_10:
	mov	w0, #0
LBB0_11:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_12:
Lloh2:
	adrp	x8, _EINVAL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_11
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_AMDGPU_FW_LOAD_PSP,8,3         ; @AMDGPU_FW_LOAD_PSP
.subsections_via_symbols
