	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rockchip_lvds_poweron
_rockchip_lvds_poweron:                 ## @rockchip_lvds_poweron
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	8(%rdi), %edi
	callq	_clk_enable
	movl	12(%r14), %edi
	testl	%eax, %eax
	js	LBB0_1
## %bb.2:
	callq	_pm_runtime_get_sync
	testl	%eax, %eax
	js	LBB0_3
## %bb.4:
	movq	_RK3288_LVDS_CH0_REG0_LANE4_EN@GOTPCREL(%rip), %rax
	movq	_RK3288_LVDS_CH0_REG0_LANE3_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG0_LANE2_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG0_LANE1_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG0_LANE0_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	(%r14), %rax
	movq	_DISPLAY_OUTPUT_RGB@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_6
## %bb.5:
	movq	_RK3288_LVDS_CH0_REG0_TTL_EN@GOTPCREL(%rip), %rax
	movq	_RK3288_LVDS_CH0_REG0_LANECK_EN@GOTPCREL(%rip), %rcx
	orl	(%rax), %edx
	orl	(%rcx), %edx
	movq	_RK3288_LVDS_CH0_REG0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_lvds_writel
	movq	_RK3288_LVDS_CH0_REG2@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$70, %edi
	callq	_RK3288_LVDS_PLL_FBDIV_REG2
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_lvds_writel
	movq	_RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE@GOTPCREL(%rip), %rax
	movq	_RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG4@GOTPCREL(%rip), %rax
	movq	_RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r14, %rdi
	callq	_lvds_writel
	movq	_RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA@GOTPCREL(%rip), %rax
	movq	_RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG5@GOTPCREL(%rip), %rax
	movq	_RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r14, %rdi
	jmp	LBB0_7
LBB0_1:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rsi
	movl	%eax, %edx
	callq	_DRM_DEV_ERROR
	jmp	LBB0_8
LBB0_3:
	movl	%eax, %ebx
	movl	12(%r14), %edi
	leaq	L_.str.1(%rip), %rsi
	movl	%eax, %edx
	callq	_DRM_DEV_ERROR
	movl	8(%r14), %edi
	callq	_clk_disable
	jmp	LBB0_8
LBB0_6:
	movq	_RK3288_LVDS_CH0_REG0_LVDS_EN@GOTPCREL(%rip), %rax
	movq	_RK3288_LVDS_CH0_REG0_LANECK_EN@GOTPCREL(%rip), %rcx
	orl	(%rax), %edx
	orl	(%rcx), %edx
	movq	_RK3288_LVDS_CH0_REG0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_lvds_writel
	movq	_RK3288_LVDS_CH0_REG1_LANECK_BIAS@GOTPCREL(%rip), %rax
	movq	_RK3288_LVDS_CH0_REG1_LANE4_BIAS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG1_LANE3_BIAS@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG1_LANE2_BIAS@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_RK3288_LVDS_CH0_REG1@GOTPCREL(%rip), %rax
	movq	_RK3288_LVDS_CH0_REG1_LANE1_BIAS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_RK3288_LVDS_CH0_REG1_LANE0_BIAS@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r14, %rdi
	callq	_lvds_writel
	movq	_RK3288_LVDS_CH0_REG2_RESERVE_ON@GOTPCREL(%rip), %rax
	movq	_RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	_RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_RK3288_LVDS_CH0_REG2@GOTPCREL(%rip), %rax
	movq	_RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movl	(%rax), %r15d
	movq	_RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	$70, %edi
	callq	_RK3288_LVDS_PLL_FBDIV_REG2
	orl	%eax, %ebx
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%ebx, %edx
	callq	_lvds_writel
	movq	_RK3288_LVDS_CH0_REG4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_lvds_writel
	movq	_RK3288_LVDS_CH0_REG5@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
LBB0_7:
	callq	_lvds_writel
	movq	_RK3288_LVDS_CH0_REG3@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$70, %edi
	callq	_RK3288_LVDS_PLL_FBDIV_REG3
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_lvds_writel
	movq	_RK3288_LVDS_CH0_REGD@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$10, %edi
	callq	_RK3288_LVDS_PLL_PREDIV_REGD
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_lvds_writel
	movq	_RK3288_LVDS_CH0_REG20@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RK3288_LVDS_CH0_REG20_LSB@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_lvds_writel
	movq	_RK3288_LVDS_CFG_REGC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RK3288_LVDS_CFG_REGC_PLL_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_lvds_writel
	movq	_RK3288_LVDS_CFG_REG21@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RK3288_LVDS_CFG_REG21_TX_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_lvds_writel
	xorl	%ebx, %ebx
LBB0_8:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to enable lvds pclk %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"failed to get pm runtime: %d\n"

	.comm	_RK3288_LVDS_CH0_REG0_LANE4_EN,4,2 ## @RK3288_LVDS_CH0_REG0_LANE4_EN
	.comm	_RK3288_LVDS_CH0_REG0_LANE3_EN,4,2 ## @RK3288_LVDS_CH0_REG0_LANE3_EN
	.comm	_RK3288_LVDS_CH0_REG0_LANE2_EN,4,2 ## @RK3288_LVDS_CH0_REG0_LANE2_EN
	.comm	_RK3288_LVDS_CH0_REG0_LANE1_EN,4,2 ## @RK3288_LVDS_CH0_REG0_LANE1_EN
	.comm	_RK3288_LVDS_CH0_REG0_LANE0_EN,4,2 ## @RK3288_LVDS_CH0_REG0_LANE0_EN
	.comm	_DISPLAY_OUTPUT_RGB,8,3         ## @DISPLAY_OUTPUT_RGB
	.comm	_RK3288_LVDS_CH0_REG0_TTL_EN,4,2 ## @RK3288_LVDS_CH0_REG0_TTL_EN
	.comm	_RK3288_LVDS_CH0_REG0_LANECK_EN,4,2 ## @RK3288_LVDS_CH0_REG0_LANECK_EN
	.comm	_RK3288_LVDS_CH0_REG0,4,2       ## @RK3288_LVDS_CH0_REG0
	.comm	_RK3288_LVDS_CH0_REG2,4,2       ## @RK3288_LVDS_CH0_REG2
	.comm	_RK3288_LVDS_CH0_REG4,4,2       ## @RK3288_LVDS_CH0_REG4
	.comm	_RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE,4,2 ## @RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE,4,2 ## @RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE,4,2 ## @RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE,4,2 ## @RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE,4,2 ## @RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE,4,2 ## @RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG5,4,2       ## @RK3288_LVDS_CH0_REG5
	.comm	_RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA,4,2 ## @RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA,4,2 ## @RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA,4,2 ## @RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA,4,2 ## @RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA,4,2 ## @RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA,4,2 ## @RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG0_LVDS_EN,4,2 ## @RK3288_LVDS_CH0_REG0_LVDS_EN
	.comm	_RK3288_LVDS_CH0_REG1,4,2       ## @RK3288_LVDS_CH0_REG1
	.comm	_RK3288_LVDS_CH0_REG1_LANECK_BIAS,4,2 ## @RK3288_LVDS_CH0_REG1_LANECK_BIAS
	.comm	_RK3288_LVDS_CH0_REG1_LANE4_BIAS,4,2 ## @RK3288_LVDS_CH0_REG1_LANE4_BIAS
	.comm	_RK3288_LVDS_CH0_REG1_LANE3_BIAS,4,2 ## @RK3288_LVDS_CH0_REG1_LANE3_BIAS
	.comm	_RK3288_LVDS_CH0_REG1_LANE2_BIAS,4,2 ## @RK3288_LVDS_CH0_REG1_LANE2_BIAS
	.comm	_RK3288_LVDS_CH0_REG1_LANE1_BIAS,4,2 ## @RK3288_LVDS_CH0_REG1_LANE1_BIAS
	.comm	_RK3288_LVDS_CH0_REG1_LANE0_BIAS,4,2 ## @RK3288_LVDS_CH0_REG1_LANE0_BIAS
	.comm	_RK3288_LVDS_CH0_REG2_RESERVE_ON,4,2 ## @RK3288_LVDS_CH0_REG2_RESERVE_ON
	.comm	_RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE,4,2 ## @RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE,4,2 ## @RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE,4,2 ## @RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE,4,2 ## @RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE,4,2 ## @RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE,4,2 ## @RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG3,4,2       ## @RK3288_LVDS_CH0_REG3
	.comm	_RK3288_LVDS_CH0_REGD,4,2       ## @RK3288_LVDS_CH0_REGD
	.comm	_RK3288_LVDS_CH0_REG20,4,2      ## @RK3288_LVDS_CH0_REG20
	.comm	_RK3288_LVDS_CH0_REG20_LSB,4,2  ## @RK3288_LVDS_CH0_REG20_LSB
	.comm	_RK3288_LVDS_CFG_REGC,4,2       ## @RK3288_LVDS_CFG_REGC
	.comm	_RK3288_LVDS_CFG_REGC_PLL_ENABLE,4,2 ## @RK3288_LVDS_CFG_REGC_PLL_ENABLE
	.comm	_RK3288_LVDS_CFG_REG21,4,2      ## @RK3288_LVDS_CFG_REG21
	.comm	_RK3288_LVDS_CFG_REG21_TX_ENABLE,4,2 ## @RK3288_LVDS_CFG_REG21_TX_ENABLE
	.no_dead_strip	_rockchip_lvds_poweron
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rockchip_lvds_poweron
_rockchip_lvds_poweron:                 ; @rockchip_lvds_poweron
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x0, #8]
	bl	_clk_enable
	mov	x20, x0
	ldr	w0, [x19, #12]
	tbnz	w20, #31, LBB0_4
; %bb.1:
	bl	_pm_runtime_get_sync
	tbnz	w0, #31, LBB0_5
; %bb.2:
Lloh0:
	adrp	x8, _RK3288_LVDS_CH0_REG0_LANE4_EN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG0_LANE4_EN@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _RK3288_LVDS_CH0_REG0_LANE3_EN@GOTPAGE
Lloh4:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG0_LANE3_EN@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh6:
	adrp	x9, _RK3288_LVDS_CH0_REG0_LANE2_EN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG0_LANE2_EN@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
Lloh9:
	adrp	x10, _RK3288_LVDS_CH0_REG0_LANE1_EN@GOTPAGE
Lloh10:
	ldr	x10, [x10, _RK3288_LVDS_CH0_REG0_LANE1_EN@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh11:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh12:
	adrp	x9, _RK3288_LVDS_CH0_REG0_LANE0_EN@GOTPAGE
Lloh13:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG0_LANE0_EN@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	x9, [x19]
Lloh15:
	adrp	x10, _DISPLAY_OUTPUT_RGB@GOTPAGE
Lloh16:
	ldr	x10, [x10, _DISPLAY_OUTPUT_RGB@GOTPAGEOFF]
Lloh17:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_6
; %bb.3:
Lloh18:
	adrp	x9, _RK3288_LVDS_CH0_REG0_TTL_EN@GOTPAGE
Lloh19:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG0_TTL_EN@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
Lloh21:
	adrp	x10, _RK3288_LVDS_CH0_REG0_LANECK_EN@GOTPAGE
Lloh22:
	ldr	x10, [x10, _RK3288_LVDS_CH0_REG0_LANECK_EN@GOTPAGEOFF]
Lloh23:
	ldr	w10, [x10]
	orr	w8, w9, w8
	orr	w2, w8, w10
Lloh24:
	adrp	x8, _RK3288_LVDS_CH0_REG0@GOTPAGE
Lloh25:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG0@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_lvds_writel
Lloh27:
	adrp	x8, _RK3288_LVDS_CH0_REG2@GOTPAGE
Lloh28:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG2@GOTPAGEOFF]
Lloh29:
	ldr	w20, [x8]
	mov	w0, #70
	bl	_RK3288_LVDS_PLL_FBDIV_REG2
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_lvds_writel
Lloh30:
	adrp	x8, _RK3288_LVDS_CH0_REG4@GOTPAGE
Lloh31:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG4@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
Lloh33:
	adrp	x8, _RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE@GOTPAGE
Lloh34:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
Lloh36:
	adrp	x9, _RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE@GOTPAGE
Lloh37:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh39:
	adrp	x9, _RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE@GOTPAGE
Lloh40:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh42:
	adrp	x9, _RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE@GOTPAGE
Lloh43:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh45:
	adrp	x9, _RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE@GOTPAGE
Lloh46:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh48:
	adrp	x9, _RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE@GOTPAGE
Lloh49:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE@GOTPAGEOFF]
Lloh50:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_lvds_writel
Lloh51:
	adrp	x8, _RK3288_LVDS_CH0_REG5@GOTPAGE
Lloh52:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG5@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
Lloh54:
	adrp	x8, _RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA@GOTPAGE
Lloh55:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA@GOTPAGEOFF]
Lloh56:
	ldr	w8, [x8]
Lloh57:
	adrp	x9, _RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA@GOTPAGE
Lloh58:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA@GOTPAGEOFF]
Lloh59:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh60:
	adrp	x9, _RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA@GOTPAGE
Lloh61:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA@GOTPAGEOFF]
Lloh62:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh63:
	adrp	x9, _RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA@GOTPAGE
Lloh64:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA@GOTPAGEOFF]
Lloh65:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh66:
	adrp	x9, _RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA@GOTPAGE
Lloh67:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA@GOTPAGEOFF]
Lloh68:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh69:
	adrp	x9, _RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA@GOTPAGE
Lloh70:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA@GOTPAGEOFF]
Lloh71:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	b	LBB0_7
LBB0_4:
Lloh72:
	adrp	x1, l_.str@PAGE
Lloh73:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x20
	bl	_DRM_DEV_ERROR
	b	LBB0_8
LBB0_5:
	mov	x20, x0
	ldr	w0, [x19, #12]
Lloh74:
	adrp	x1, l_.str.1@PAGE
Lloh75:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x2, x20
	bl	_DRM_DEV_ERROR
	ldr	w0, [x19, #8]
	bl	_clk_disable
	b	LBB0_8
LBB0_6:
Lloh76:
	adrp	x9, _RK3288_LVDS_CH0_REG0_LVDS_EN@GOTPAGE
Lloh77:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG0_LVDS_EN@GOTPAGEOFF]
Lloh78:
	ldr	w9, [x9]
Lloh79:
	adrp	x10, _RK3288_LVDS_CH0_REG0_LANECK_EN@GOTPAGE
Lloh80:
	ldr	x10, [x10, _RK3288_LVDS_CH0_REG0_LANECK_EN@GOTPAGEOFF]
Lloh81:
	ldr	w10, [x10]
	orr	w8, w9, w8
	orr	w2, w8, w10
Lloh82:
	adrp	x8, _RK3288_LVDS_CH0_REG0@GOTPAGE
Lloh83:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG0@GOTPAGEOFF]
Lloh84:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_lvds_writel
Lloh85:
	adrp	x8, _RK3288_LVDS_CH0_REG1@GOTPAGE
Lloh86:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG1@GOTPAGEOFF]
Lloh87:
	ldr	w1, [x8]
Lloh88:
	adrp	x8, _RK3288_LVDS_CH0_REG1_LANECK_BIAS@GOTPAGE
Lloh89:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG1_LANECK_BIAS@GOTPAGEOFF]
Lloh90:
	ldr	w8, [x8]
Lloh91:
	adrp	x9, _RK3288_LVDS_CH0_REG1_LANE4_BIAS@GOTPAGE
Lloh92:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG1_LANE4_BIAS@GOTPAGEOFF]
Lloh93:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh94:
	adrp	x9, _RK3288_LVDS_CH0_REG1_LANE3_BIAS@GOTPAGE
Lloh95:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG1_LANE3_BIAS@GOTPAGEOFF]
Lloh96:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh97:
	adrp	x9, _RK3288_LVDS_CH0_REG1_LANE2_BIAS@GOTPAGE
Lloh98:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG1_LANE2_BIAS@GOTPAGEOFF]
Lloh99:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh100:
	adrp	x9, _RK3288_LVDS_CH0_REG1_LANE1_BIAS@GOTPAGE
Lloh101:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG1_LANE1_BIAS@GOTPAGEOFF]
Lloh102:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh103:
	adrp	x9, _RK3288_LVDS_CH0_REG1_LANE0_BIAS@GOTPAGE
Lloh104:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG1_LANE0_BIAS@GOTPAGEOFF]
Lloh105:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_lvds_writel
Lloh106:
	adrp	x8, _RK3288_LVDS_CH0_REG2@GOTPAGE
Lloh107:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG2@GOTPAGEOFF]
Lloh108:
	ldr	w20, [x8]
Lloh109:
	adrp	x8, _RK3288_LVDS_CH0_REG2_RESERVE_ON@GOTPAGE
Lloh110:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG2_RESERVE_ON@GOTPAGEOFF]
Lloh111:
	ldr	w8, [x8]
Lloh112:
	adrp	x9, _RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE@GOTPAGE
Lloh113:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE@GOTPAGEOFF]
Lloh114:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh115:
	adrp	x9, _RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE@GOTPAGE
Lloh116:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE@GOTPAGEOFF]
Lloh117:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh118:
	adrp	x9, _RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE@GOTPAGE
Lloh119:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE@GOTPAGEOFF]
Lloh120:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh121:
	adrp	x9, _RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE@GOTPAGE
Lloh122:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE@GOTPAGEOFF]
Lloh123:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh124:
	adrp	x9, _RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE@GOTPAGE
Lloh125:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE@GOTPAGEOFF]
Lloh126:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh127:
	adrp	x9, _RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE@GOTPAGE
Lloh128:
	ldr	x9, [x9, _RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE@GOTPAGEOFF]
Lloh129:
	ldr	w9, [x9]
	orr	w21, w8, w9
	mov	w0, #70
	bl	_RK3288_LVDS_PLL_FBDIV_REG2
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_lvds_writel
Lloh130:
	adrp	x8, _RK3288_LVDS_CH0_REG4@GOTPAGE
Lloh131:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG4@GOTPAGEOFF]
Lloh132:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_lvds_writel
Lloh133:
	adrp	x8, _RK3288_LVDS_CH0_REG5@GOTPAGE
Lloh134:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG5@GOTPAGEOFF]
Lloh135:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
LBB0_7:
	bl	_lvds_writel
Lloh136:
	adrp	x8, _RK3288_LVDS_CH0_REG3@GOTPAGE
Lloh137:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG3@GOTPAGEOFF]
Lloh138:
	ldr	w20, [x8]
	mov	w0, #70
	bl	_RK3288_LVDS_PLL_FBDIV_REG3
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_lvds_writel
Lloh139:
	adrp	x8, _RK3288_LVDS_CH0_REGD@GOTPAGE
Lloh140:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REGD@GOTPAGEOFF]
Lloh141:
	ldr	w20, [x8]
	mov	w0, #10
	bl	_RK3288_LVDS_PLL_PREDIV_REGD
	mov	x2, x0
	mov	x0, x19
	mov	x1, x20
	bl	_lvds_writel
Lloh142:
	adrp	x8, _RK3288_LVDS_CH0_REG20@GOTPAGE
Lloh143:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG20@GOTPAGEOFF]
Lloh144:
	ldr	w1, [x8]
Lloh145:
	adrp	x8, _RK3288_LVDS_CH0_REG20_LSB@GOTPAGE
Lloh146:
	ldr	x8, [x8, _RK3288_LVDS_CH0_REG20_LSB@GOTPAGEOFF]
Lloh147:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_lvds_writel
Lloh148:
	adrp	x8, _RK3288_LVDS_CFG_REGC@GOTPAGE
Lloh149:
	ldr	x8, [x8, _RK3288_LVDS_CFG_REGC@GOTPAGEOFF]
Lloh150:
	ldr	w1, [x8]
Lloh151:
	adrp	x8, _RK3288_LVDS_CFG_REGC_PLL_ENABLE@GOTPAGE
Lloh152:
	ldr	x8, [x8, _RK3288_LVDS_CFG_REGC_PLL_ENABLE@GOTPAGEOFF]
Lloh153:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_lvds_writel
Lloh154:
	adrp	x8, _RK3288_LVDS_CFG_REG21@GOTPAGE
Lloh155:
	ldr	x8, [x8, _RK3288_LVDS_CFG_REG21@GOTPAGEOFF]
Lloh156:
	ldr	w1, [x8]
Lloh157:
	adrp	x8, _RK3288_LVDS_CFG_REG21_TX_ENABLE@GOTPAGE
Lloh158:
	ldr	x8, [x8, _RK3288_LVDS_CFG_REG21_TX_ENABLE@GOTPAGEOFF]
Lloh159:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_lvds_writel
	mov	w20, #0
LBB0_8:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh72, Lloh73
	.loh AdrpAdd	Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh133, Lloh134, Lloh135
	.loh AdrpLdrGotLdr	Lloh130, Lloh131, Lloh132
	.loh AdrpLdrGotLdr	Lloh127, Lloh128, Lloh129
	.loh AdrpLdrGotLdr	Lloh124, Lloh125, Lloh126
	.loh AdrpLdrGotLdr	Lloh121, Lloh122, Lloh123
	.loh AdrpLdrGotLdr	Lloh118, Lloh119, Lloh120
	.loh AdrpLdrGotLdr	Lloh115, Lloh116, Lloh117
	.loh AdrpLdrGotLdr	Lloh112, Lloh113, Lloh114
	.loh AdrpLdrGotLdr	Lloh109, Lloh110, Lloh111
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh157, Lloh158, Lloh159
	.loh AdrpLdrGotLdr	Lloh154, Lloh155, Lloh156
	.loh AdrpLdrGotLdr	Lloh151, Lloh152, Lloh153
	.loh AdrpLdrGotLdr	Lloh148, Lloh149, Lloh150
	.loh AdrpLdrGotLdr	Lloh145, Lloh146, Lloh147
	.loh AdrpLdrGotLdr	Lloh142, Lloh143, Lloh144
	.loh AdrpLdrGotLdr	Lloh139, Lloh140, Lloh141
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to enable lvds pclk %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"failed to get pm runtime: %d\n"

	.comm	_RK3288_LVDS_CH0_REG0_LANE4_EN,4,2 ; @RK3288_LVDS_CH0_REG0_LANE4_EN
	.comm	_RK3288_LVDS_CH0_REG0_LANE3_EN,4,2 ; @RK3288_LVDS_CH0_REG0_LANE3_EN
	.comm	_RK3288_LVDS_CH0_REG0_LANE2_EN,4,2 ; @RK3288_LVDS_CH0_REG0_LANE2_EN
	.comm	_RK3288_LVDS_CH0_REG0_LANE1_EN,4,2 ; @RK3288_LVDS_CH0_REG0_LANE1_EN
	.comm	_RK3288_LVDS_CH0_REG0_LANE0_EN,4,2 ; @RK3288_LVDS_CH0_REG0_LANE0_EN
	.comm	_DISPLAY_OUTPUT_RGB,8,3         ; @DISPLAY_OUTPUT_RGB
	.comm	_RK3288_LVDS_CH0_REG0_TTL_EN,4,2 ; @RK3288_LVDS_CH0_REG0_TTL_EN
	.comm	_RK3288_LVDS_CH0_REG0_LANECK_EN,4,2 ; @RK3288_LVDS_CH0_REG0_LANECK_EN
	.comm	_RK3288_LVDS_CH0_REG0,4,2       ; @RK3288_LVDS_CH0_REG0
	.comm	_RK3288_LVDS_CH0_REG2,4,2       ; @RK3288_LVDS_CH0_REG2
	.comm	_RK3288_LVDS_CH0_REG4,4,2       ; @RK3288_LVDS_CH0_REG4
	.comm	_RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE,4,2 ; @RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE,4,2 ; @RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE,4,2 ; @RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE,4,2 ; @RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE,4,2 ; @RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE,4,2 ; @RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE
	.comm	_RK3288_LVDS_CH0_REG5,4,2       ; @RK3288_LVDS_CH0_REG5
	.comm	_RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA,4,2 ; @RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA,4,2 ; @RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA,4,2 ; @RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA,4,2 ; @RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA,4,2 ; @RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA,4,2 ; @RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA
	.comm	_RK3288_LVDS_CH0_REG0_LVDS_EN,4,2 ; @RK3288_LVDS_CH0_REG0_LVDS_EN
	.comm	_RK3288_LVDS_CH0_REG1,4,2       ; @RK3288_LVDS_CH0_REG1
	.comm	_RK3288_LVDS_CH0_REG1_LANECK_BIAS,4,2 ; @RK3288_LVDS_CH0_REG1_LANECK_BIAS
	.comm	_RK3288_LVDS_CH0_REG1_LANE4_BIAS,4,2 ; @RK3288_LVDS_CH0_REG1_LANE4_BIAS
	.comm	_RK3288_LVDS_CH0_REG1_LANE3_BIAS,4,2 ; @RK3288_LVDS_CH0_REG1_LANE3_BIAS
	.comm	_RK3288_LVDS_CH0_REG1_LANE2_BIAS,4,2 ; @RK3288_LVDS_CH0_REG1_LANE2_BIAS
	.comm	_RK3288_LVDS_CH0_REG1_LANE1_BIAS,4,2 ; @RK3288_LVDS_CH0_REG1_LANE1_BIAS
	.comm	_RK3288_LVDS_CH0_REG1_LANE0_BIAS,4,2 ; @RK3288_LVDS_CH0_REG1_LANE0_BIAS
	.comm	_RK3288_LVDS_CH0_REG2_RESERVE_ON,4,2 ; @RK3288_LVDS_CH0_REG2_RESERVE_ON
	.comm	_RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE,4,2 ; @RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE,4,2 ; @RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE,4,2 ; @RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE,4,2 ; @RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE,4,2 ; @RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE,4,2 ; @RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE
	.comm	_RK3288_LVDS_CH0_REG3,4,2       ; @RK3288_LVDS_CH0_REG3
	.comm	_RK3288_LVDS_CH0_REGD,4,2       ; @RK3288_LVDS_CH0_REGD
	.comm	_RK3288_LVDS_CH0_REG20,4,2      ; @RK3288_LVDS_CH0_REG20
	.comm	_RK3288_LVDS_CH0_REG20_LSB,4,2  ; @RK3288_LVDS_CH0_REG20_LSB
	.comm	_RK3288_LVDS_CFG_REGC,4,2       ; @RK3288_LVDS_CFG_REGC
	.comm	_RK3288_LVDS_CFG_REGC_PLL_ENABLE,4,2 ; @RK3288_LVDS_CFG_REGC_PLL_ENABLE
	.comm	_RK3288_LVDS_CFG_REG21,4,2      ; @RK3288_LVDS_CFG_REG21
	.comm	_RK3288_LVDS_CFG_REG21_TX_ENABLE,4,2 ; @RK3288_LVDS_CFG_REG21_TX_ENABLE
	.no_dead_strip	_rockchip_lvds_poweron
.subsections_via_symbols
