	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function _sspp_setup_opmode
__sspp_setup_opmode:                    ## @_sspp_setup_opmode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	_DPU_SSPP_SCALER_QSEED2@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	8(%rbx), %rsi
	callq	_test_bit
	testl	%eax, %eax
	je	LBB0_4
## %bb.1:
	movl	(%r12), %esi
	leaq	-40(%rbp), %rdx
	movq	%rbx, %rdi
	callq	__sspp_subblk_offset
	testq	%rax, %rax
	jne	LBB0_4
## %bb.2:
	movq	_DPU_SSPP_CSC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	8(%rbx), %rsi
	callq	_test_bit
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	movq	_SSPP_VIG_OP_MODE@GOTPCREL(%rip), %r12
	movq	-40(%rbp), %rsi
	addq	(%r12), %rsi
	movq	%rbx, %rdi
	callq	_DPU_REG_READ
	movq	%rax, %rcx
	orq	%r14, %rcx
	notq	%r14
	andq	%rax, %r14
	testq	%r15, %r15
	cmovneq	%rcx, %r14
	movq	-40(%rbp), %rsi
	addq	(%r12), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_DPU_REG_WRITE
LBB0_4:
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DPU_SSPP_SCALER_QSEED2,4,2     ## @DPU_SSPP_SCALER_QSEED2
	.comm	_DPU_SSPP_CSC,4,2               ## @DPU_SSPP_CSC
	.comm	_SSPP_VIG_OP_MODE,8,3           ## @SSPP_VIG_OP_MODE
	.no_dead_strip	__sspp_setup_opmode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function _sspp_setup_opmode
__sspp_setup_opmode:                    ; @_sspp_setup_opmode
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
Lloh0:
	adrp	x22, _DPU_SSPP_SCALER_QSEED2@GOTPAGE
Lloh1:
	ldr	x22, [x22, _DPU_SSPP_SCALER_QSEED2@GOTPAGEOFF]
	ldr	w0, [x22]
	ldr	x1, [x19, #8]
	bl	_test_bit
	cbz	w0, LBB0_4
; %bb.1:
	ldr	w1, [x22]
	add	x2, sp, #8
	mov	x0, x19
	bl	__sspp_subblk_offset
	cbnz	x0, LBB0_4
; %bb.2:
Lloh2:
	adrp	x8, _DPU_SSPP_CSC@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DPU_SSPP_CSC@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	ldr	x1, [x19, #8]
	bl	_test_bit
	cbz	w0, LBB0_4
; %bb.3:
Lloh5:
	adrp	x22, _SSPP_VIG_OP_MODE@GOTPAGE
Lloh6:
	ldr	x22, [x22, _SSPP_VIG_OP_MODE@GOTPAGEOFF]
	ldr	x8, [x22]
	ldr	x9, [sp, #8]
	add	x1, x9, x8
	mov	x0, x19
	bl	_DPU_REG_READ
	orr	x8, x0, x21
	bic	x9, x0, x21
	cmp	x20, #0
	csel	x2, x9, x8, eq
	ldr	x8, [x22]
	ldr	x9, [sp, #8]
	add	x1, x9, x8
	mov	x0, x19
	bl	_DPU_REG_WRITE
LBB0_4:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_DPU_SSPP_SCALER_QSEED2,4,2     ; @DPU_SSPP_SCALER_QSEED2
	.comm	_DPU_SSPP_CSC,4,2               ; @DPU_SSPP_CSC
	.comm	_SSPP_VIG_OP_MODE,8,3           ; @SSPP_VIG_OP_MODE
	.no_dead_strip	__sspp_setup_opmode
.subsections_via_symbols
