	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sti_hda_pre_enable
_sti_hda_pre_enable:                    ## @sti_hda_pre_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %r13
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
	cmpl	$0, (%r13)
	je	LBB0_1
LBB0_21:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movl	12(%r13), %edi
	callq	_clk_prepare_enable
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	leaq	L_.str.1(%rip), %rdi
	callq	_DRM_ERROR
LBB0_3:
	movl	8(%r13), %edi
	callq	_clk_prepare_enable
	testq	%rax, %rax
	je	LBB0_5
## %bb.4:
	leaq	L_.str.2(%rip), %rdi
	callq	_DRM_ERROR
LBB0_5:
	movl	4(%r13), %edi
	leaq	-56(%rbp), %rsi
	callq	_hda_get_mode_idx
	testl	%eax, %eax
	je	LBB0_6
## %bb.7:
	movq	_hda_supported_modes@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	-56(%rbp), %rsi
	leaq	(%rsi,%rsi,2), %rcx
	movl	(%rax,%rcx,4), %eax
	addl	$-128, %eax
	cmpl	$3, %eax
	ja	LBB0_12
## %bb.8:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_11:
	leaq	L_.str.5(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_21
LBB0_6:
	leaq	L_.str.3(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_21
LBB0_12:
	leaq	L_.str.6(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_21
LBB0_13:
	movq	_coef_y_alt_2x@GOTPCREL(%rip), %rax
	movq	(%rax), %r12
	movq	_coef_c_alt_2x@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	_CFG_AWG_FLTR_MODE_HD@GOTPCREL(%rip), %rax
	movq	_HDA_ANA_SRC_C_CFG_ALT_2X@GOTPCREL(%rip), %rcx
	movq	_HDA_ANA_SRC_Y_CFG_ALT_2X@GOTPCREL(%rip), %rdx
	jmp	LBB0_14
LBB0_9:
	leaq	L_.str.4(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_21
LBB0_10:
	movq	_coef_yc_4x@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	_CFG_AWG_FLTR_MODE_ED@GOTPCREL(%rip), %rax
	movq	_HDA_ANA_SRC_C_CFG_4X@GOTPCREL(%rip), %rcx
	movq	_HDA_ANA_SRC_Y_CFG_4X@GOTPCREL(%rip), %rdx
	movq	%rdi, %r12
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
LBB0_14:
	movq	(%rax), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	(%rcx), %r14
	movq	(%rdx), %rbx
	leaq	L_.str.7(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_DRIVER
	movq	%r13, %rdi
	movl	$1, %esi
	callq	_hda_enable_hd_dacs
	movq	_SCALE_CTRL_Y_DFLT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	_HDA_ANA_SCALE_CTRL_Y@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r13, %rdi
	callq	_hda_write
	movq	_SCALE_CTRL_CB_DFLT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	_HDA_ANA_SCALE_CTRL_CB@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r13, %rdi
	callq	_hda_write
	movq	_SCALE_CTRL_CR_DFLT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	_HDA_ANA_SCALE_CTRL_CR@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r13, %rdi
	callq	_hda_write
	movq	_HDA_ANA_SRC_Y_CFG@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	_hda_write
	movq	_HDA_ANA_SRC_C_CFG@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	_hda_write
	movq	_SAMPLER_COEF_NB@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_17
## %bb.15:
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
	.p2align	4, 0x90
LBB0_16:                                ## =>This Inner Loop Header: Depth=1
	movq	(%r12,%r14,8), %rsi
	movq	_HDA_COEFF_Y_PH1_TAP123@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdx
	addq	%rbx, %rdx
	movq	%r13, %rdi
	movq	%rax, %r15
	callq	_hda_write
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax,%r14,8), %rsi
	movq	_HDA_COEFF_C_PH1_TAP123@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	addq	%rbx, %rdx
	movq	%r13, %rdi
	callq	_hda_write
	movq	%r15, %rax
	incq	%r14
	addq	$4, %rbx
	cmpq	(%r15), %r14
	jb	LBB0_16
LBB0_17:
	movq	_DRM_MODE_FLAG_INTERLACE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	4(%r13), %eax
	jne	LBB0_18
## %bb.19:
	movq	_CFG_AWG_ASYNC_VSYNC_MTD@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	jmp	LBB0_20
LBB0_18:
	xorl	%eax, %eax
LBB0_20:
	movq	_CFG_PBPR_SYNC_OFF_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_CFG_PBPR_SYNC_OFF_VAL@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rsi
	shlq	%cl, %rsi
	orq	-64(%rbp), %rax                 ## 8-byte Folded Reload
	orq	%rax, %rsi
	movq	_HDA_ANA_CFG@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdx
	movq	%r13, %rdi
	callq	_hda_write
	movq	_hda_supported_modes@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	-56(%rbp), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movl	4(%rax,%rcx,4), %edx
	movl	8(%rax,%rcx,4), %esi
	movq	%r13, %rdi
	callq	_sti_hda_configure_awg
	movq	(%rbx), %rsi
	movq	%r13, %rdi
	callq	_hda_read
	movq	_CFG_AWG_ASYNC_EN@GOTPCREL(%rip), %rcx
	orq	(%rcx), %rax
	movq	(%rbx), %rdx
	movq	%r13, %rdi
	movq	%rax, %rsi
	callq	_hda_write
	movl	$1, (%r13)
	jmp	LBB0_21
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
LJTI0_0:
	.long	L0_0_set_11
	.long	L0_0_set_13
	.long	L0_0_set_9
	.long	L0_0_set_10
	.end_data_region
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\n"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to prepare/enable hda_pix clk\n"

L_.str.2:                               ## @.str.2
	.asciz	"Failed to prepare/enable hda_hddac clk\n"

L_.str.3:                               ## @.str.3
	.asciz	"Undefined mode\n"

	.comm	_hda_supported_modes,8,3        ## @hda_supported_modes
L_.str.4:                               ## @.str.4
	.asciz	"Beyond HD analog capabilities\n"

	.comm	_CFG_AWG_FLTR_MODE_HD,8,3       ## @CFG_AWG_FLTR_MODE_HD
	.comm	_HDA_ANA_SRC_Y_CFG_ALT_2X,8,3   ## @HDA_ANA_SRC_Y_CFG_ALT_2X
	.comm	_HDA_ANA_SRC_C_CFG_ALT_2X,8,3   ## @HDA_ANA_SRC_C_CFG_ALT_2X
	.comm	_coef_y_alt_2x,8,3              ## @coef_y_alt_2x
	.comm	_coef_c_alt_2x,8,3              ## @coef_c_alt_2x
	.comm	_CFG_AWG_FLTR_MODE_ED,8,3       ## @CFG_AWG_FLTR_MODE_ED
	.comm	_HDA_ANA_SRC_Y_CFG_4X,8,3       ## @HDA_ANA_SRC_Y_CFG_4X
	.comm	_HDA_ANA_SRC_C_CFG_4X,8,3       ## @HDA_ANA_SRC_C_CFG_4X
	.comm	_coef_yc_4x,8,3                 ## @coef_yc_4x
L_.str.5:                               ## @.str.5
	.asciz	"Not supported\n"

L_.str.6:                               ## @.str.6
	.asciz	"Undefined resolution\n"

L_.str.7:                               ## @.str.7
	.asciz	"Using HDA mode #%d\n"

	.comm	_SCALE_CTRL_Y_DFLT,8,3          ## @SCALE_CTRL_Y_DFLT
	.comm	_HDA_ANA_SCALE_CTRL_Y,8,3       ## @HDA_ANA_SCALE_CTRL_Y
	.comm	_SCALE_CTRL_CB_DFLT,8,3         ## @SCALE_CTRL_CB_DFLT
	.comm	_HDA_ANA_SCALE_CTRL_CB,8,3      ## @HDA_ANA_SCALE_CTRL_CB
	.comm	_SCALE_CTRL_CR_DFLT,8,3         ## @SCALE_CTRL_CR_DFLT
	.comm	_HDA_ANA_SCALE_CTRL_CR,8,3      ## @HDA_ANA_SCALE_CTRL_CR
	.comm	_HDA_ANA_SRC_Y_CFG,8,3          ## @HDA_ANA_SRC_Y_CFG
	.comm	_HDA_ANA_SRC_C_CFG,8,3          ## @HDA_ANA_SRC_C_CFG
	.comm	_SAMPLER_COEF_NB,8,3            ## @SAMPLER_COEF_NB
	.comm	_HDA_COEFF_Y_PH1_TAP123,8,3     ## @HDA_COEFF_Y_PH1_TAP123
	.comm	_HDA_COEFF_C_PH1_TAP123,8,3     ## @HDA_COEFF_C_PH1_TAP123
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ## @DRM_MODE_FLAG_INTERLACE
	.comm	_CFG_AWG_ASYNC_VSYNC_MTD,8,3    ## @CFG_AWG_ASYNC_VSYNC_MTD
	.comm	_CFG_PBPR_SYNC_OFF_VAL,8,3      ## @CFG_PBPR_SYNC_OFF_VAL
	.comm	_CFG_PBPR_SYNC_OFF_SHIFT,8,3    ## @CFG_PBPR_SYNC_OFF_SHIFT
	.comm	_HDA_ANA_CFG,8,3                ## @HDA_ANA_CFG
	.comm	_CFG_AWG_ASYNC_EN,8,3           ## @CFG_AWG_ASYNC_EN
	.no_dead_strip	_sti_hda_pre_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sti_hda_pre_enable
_sti_hda_pre_enable:                    ; @sti_hda_pre_enable
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	x19, [x0]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
	ldr	w8, [x19]
	cbz	w8, LBB0_2
LBB0_1:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_2:
	ldr	w0, [x19, #12]
	bl	_clk_prepare_enable
	cbz	x0, LBB0_4
; %bb.3:
Lloh2:
	adrp	x0, l_.str.1@PAGE
Lloh3:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_ERROR
LBB0_4:
	ldr	w0, [x19, #8]
	bl	_clk_prepare_enable
	cbz	x0, LBB0_6
; %bb.5:
Lloh4:
	adrp	x0, l_.str.2@PAGE
Lloh5:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_ERROR
LBB0_6:
	ldr	w0, [x19, #4]
	add	x1, sp, #24
	bl	_hda_get_mode_idx
	cbz	w0, LBB0_10
; %bb.7:
Lloh6:
	adrp	x22, _hda_supported_modes@GOTPAGE
Lloh7:
	ldr	x22, [x22, _hda_supported_modes@GOTPAGEOFF]
	ldr	x9, [x22]
	ldr	x8, [sp, #24]
	mov	w10, #12
	mul	x10, x8, x10
	ldr	w9, [x9, x10]
	sub	w9, w9, #128
	cmp	w9, #3
	b.hi	LBB0_11
; %bb.8:
Lloh8:
	adrp	x10, lJTI0_0@PAGE
Lloh9:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_9
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_9:
Lloh10:
	adrp	x0, l_.str.5@PAGE
Lloh11:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_1
LBB0_10:
Lloh12:
	adrp	x0, l_.str.3@PAGE
Lloh13:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_1
LBB0_11:
Lloh14:
	adrp	x0, l_.str.6@PAGE
Lloh15:
	add	x0, x0, l_.str.6@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_1
LBB0_12:
Lloh16:
	adrp	x9, _coef_y_alt_2x@GOTPAGE
Lloh17:
	ldr	x9, [x9, _coef_y_alt_2x@GOTPAGEOFF]
Lloh18:
	ldr	x24, [x9]
Lloh19:
	adrp	x9, _coef_c_alt_2x@GOTPAGE
Lloh20:
	ldr	x9, [x9, _coef_c_alt_2x@GOTPAGEOFF]
Lloh21:
	ldr	x25, [x9]
Lloh22:
	adrp	x9, _CFG_AWG_FLTR_MODE_HD@GOTPAGE
Lloh23:
	ldr	x9, [x9, _CFG_AWG_FLTR_MODE_HD@GOTPAGEOFF]
Lloh24:
	adrp	x10, _HDA_ANA_SRC_C_CFG_ALT_2X@GOTPAGE
Lloh25:
	ldr	x10, [x10, _HDA_ANA_SRC_C_CFG_ALT_2X@GOTPAGEOFF]
Lloh26:
	adrp	x11, _HDA_ANA_SRC_Y_CFG_ALT_2X@GOTPAGE
Lloh27:
	ldr	x11, [x11, _HDA_ANA_SRC_Y_CFG_ALT_2X@GOTPAGEOFF]
	b	LBB0_15
LBB0_13:
Lloh28:
	adrp	x0, l_.str.4@PAGE
Lloh29:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_1
LBB0_14:
Lloh30:
	adrp	x10, _coef_yc_4x@GOTPAGE
Lloh31:
	ldr	x10, [x10, _coef_yc_4x@GOTPAGEOFF]
Lloh32:
	adrp	x9, _CFG_AWG_FLTR_MODE_ED@GOTPAGE
Lloh33:
	ldr	x9, [x9, _CFG_AWG_FLTR_MODE_ED@GOTPAGEOFF]
Lloh34:
	ldr	x24, [x10]
Lloh35:
	adrp	x10, _HDA_ANA_SRC_C_CFG_4X@GOTPAGE
Lloh36:
	ldr	x10, [x10, _HDA_ANA_SRC_C_CFG_4X@GOTPAGEOFF]
Lloh37:
	adrp	x11, _HDA_ANA_SRC_Y_CFG_4X@GOTPAGE
Lloh38:
	ldr	x11, [x11, _HDA_ANA_SRC_Y_CFG_4X@GOTPAGEOFF]
	mov	x25, x24
LBB0_15:
	ldr	x9, [x9]
	str	x9, [sp, #16]                   ; 8-byte Folded Spill
	ldr	x20, [x10]
	ldr	x21, [x11]
	str	x8, [sp]
Lloh39:
	adrp	x0, l_.str.7@PAGE
Lloh40:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
	mov	x0, x19
	mov	w1, #1
	bl	_hda_enable_hd_dacs
Lloh41:
	adrp	x8, _SCALE_CTRL_Y_DFLT@GOTPAGE
Lloh42:
	ldr	x8, [x8, _SCALE_CTRL_Y_DFLT@GOTPAGEOFF]
Lloh43:
	ldr	x1, [x8]
Lloh44:
	adrp	x8, _HDA_ANA_SCALE_CTRL_Y@GOTPAGE
Lloh45:
	ldr	x8, [x8, _HDA_ANA_SCALE_CTRL_Y@GOTPAGEOFF]
Lloh46:
	ldr	x2, [x8]
	mov	x0, x19
	bl	_hda_write
Lloh47:
	adrp	x8, _SCALE_CTRL_CB_DFLT@GOTPAGE
Lloh48:
	ldr	x8, [x8, _SCALE_CTRL_CB_DFLT@GOTPAGEOFF]
Lloh49:
	ldr	x1, [x8]
Lloh50:
	adrp	x8, _HDA_ANA_SCALE_CTRL_CB@GOTPAGE
Lloh51:
	ldr	x8, [x8, _HDA_ANA_SCALE_CTRL_CB@GOTPAGEOFF]
Lloh52:
	ldr	x2, [x8]
	mov	x0, x19
	bl	_hda_write
Lloh53:
	adrp	x8, _SCALE_CTRL_CR_DFLT@GOTPAGE
Lloh54:
	ldr	x8, [x8, _SCALE_CTRL_CR_DFLT@GOTPAGEOFF]
Lloh55:
	ldr	x1, [x8]
Lloh56:
	adrp	x8, _HDA_ANA_SCALE_CTRL_CR@GOTPAGE
Lloh57:
	ldr	x8, [x8, _HDA_ANA_SCALE_CTRL_CR@GOTPAGEOFF]
Lloh58:
	ldr	x2, [x8]
	mov	x0, x19
	bl	_hda_write
Lloh59:
	adrp	x8, _HDA_ANA_SRC_Y_CFG@GOTPAGE
Lloh60:
	ldr	x8, [x8, _HDA_ANA_SRC_Y_CFG@GOTPAGEOFF]
Lloh61:
	ldr	x2, [x8]
	mov	x0, x19
	mov	x1, x21
	bl	_hda_write
Lloh62:
	adrp	x8, _HDA_ANA_SRC_C_CFG@GOTPAGE
Lloh63:
	ldr	x8, [x8, _HDA_ANA_SRC_C_CFG@GOTPAGEOFF]
Lloh64:
	ldr	x2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_hda_write
Lloh65:
	adrp	x20, _SAMPLER_COEF_NB@GOTPAGE
Lloh66:
	ldr	x20, [x20, _SAMPLER_COEF_NB@GOTPAGEOFF]
	ldr	x8, [x20]
	cbz	x8, LBB0_18
; %bb.16:
	mov	x21, #0
	mov	x27, #0
Lloh67:
	adrp	x28, _HDA_COEFF_Y_PH1_TAP123@GOTPAGE
Lloh68:
	ldr	x28, [x28, _HDA_COEFF_Y_PH1_TAP123@GOTPAGEOFF]
Lloh69:
	adrp	x23, _HDA_COEFF_C_PH1_TAP123@GOTPAGE
Lloh70:
	ldr	x23, [x23, _HDA_COEFF_C_PH1_TAP123@GOTPAGEOFF]
LBB0_17:                                ; =>This Inner Loop Header: Depth=1
	lsl	x26, x27, #3
	ldr	x1, [x24, x26]
	ldr	x8, [x28]
	add	x2, x21, x8
	mov	x0, x19
	bl	_hda_write
	ldr	x1, [x25, x26]
	ldr	x8, [x23]
	add	x2, x21, x8
	mov	x0, x19
	bl	_hda_write
	add	x27, x27, #1
	ldr	x8, [x20]
	add	x21, x21, #4
	cmp	x27, x8
	b.lo	LBB0_17
LBB0_18:
	ldr	w8, [x19, #4]
Lloh71:
	adrp	x9, _DRM_MODE_FLAG_INTERLACE@GOTPAGE
Lloh72:
	ldr	x9, [x9, _DRM_MODE_FLAG_INTERLACE@GOTPAGEOFF]
Lloh73:
	ldr	w9, [x9]
Lloh74:
	adrp	x10, _CFG_AWG_ASYNC_VSYNC_MTD@GOTPAGE
Lloh75:
	ldr	x10, [x10, _CFG_AWG_ASYNC_VSYNC_MTD@GOTPAGEOFF]
Lloh76:
	ldr	x10, [x10]
	tst	w9, w8
	csel	x8, x10, xzr, eq
Lloh77:
	adrp	x9, _CFG_PBPR_SYNC_OFF_VAL@GOTPAGE
Lloh78:
	ldr	x9, [x9, _CFG_PBPR_SYNC_OFF_VAL@GOTPAGEOFF]
Lloh79:
	ldr	x9, [x9]
Lloh80:
	adrp	x10, _CFG_PBPR_SYNC_OFF_SHIFT@GOTPAGE
Lloh81:
	ldr	x10, [x10, _CFG_PBPR_SYNC_OFF_SHIFT@GOTPAGEOFF]
Lloh82:
	ldr	x10, [x10]
	lsl	x9, x9, x10
	ldr	x10, [sp, #16]                  ; 8-byte Folded Reload
	orr	x8, x8, x10
	orr	x1, x8, x9
Lloh83:
	adrp	x20, _HDA_ANA_CFG@GOTPAGE
Lloh84:
	ldr	x20, [x20, _HDA_ANA_CFG@GOTPAGEOFF]
	ldr	x2, [x20]
	mov	x0, x19
	bl	_hda_write
	ldr	x8, [x22]
	ldr	x9, [sp, #24]
	mov	w10, #12
	madd	x8, x9, x10, x8
	ldp	w2, w1, [x8, #4]
	mov	x0, x19
	bl	_sti_hda_configure_awg
	ldr	x1, [x20]
	mov	x0, x19
	bl	_hda_read
Lloh85:
	adrp	x8, _CFG_AWG_ASYNC_EN@GOTPAGE
Lloh86:
	ldr	x8, [x8, _CFG_AWG_ASYNC_EN@GOTPAGEOFF]
Lloh87:
	ldr	x8, [x8]
	orr	x1, x8, x0
	ldr	x2, [x20]
	mov	x0, x19
	bl	_hda_write
	mov	w8, #1
	str	w8, [x19]
	b	LBB0_1
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh34
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpAdd	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh69, Lloh70
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGot	Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_9-LBB0_9)>>2
	.byte	(LBB0_12-LBB0_9)>>2
	.byte	(LBB0_13-LBB0_9)>>2
	.byte	(LBB0_14-LBB0_9)>>2
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\n"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to prepare/enable hda_pix clk\n"

l_.str.2:                               ; @.str.2
	.asciz	"Failed to prepare/enable hda_hddac clk\n"

l_.str.3:                               ; @.str.3
	.asciz	"Undefined mode\n"

	.comm	_hda_supported_modes,8,3        ; @hda_supported_modes
l_.str.4:                               ; @.str.4
	.asciz	"Beyond HD analog capabilities\n"

	.comm	_CFG_AWG_FLTR_MODE_HD,8,3       ; @CFG_AWG_FLTR_MODE_HD
	.comm	_HDA_ANA_SRC_Y_CFG_ALT_2X,8,3   ; @HDA_ANA_SRC_Y_CFG_ALT_2X
	.comm	_HDA_ANA_SRC_C_CFG_ALT_2X,8,3   ; @HDA_ANA_SRC_C_CFG_ALT_2X
	.comm	_coef_y_alt_2x,8,3              ; @coef_y_alt_2x
	.comm	_coef_c_alt_2x,8,3              ; @coef_c_alt_2x
	.comm	_CFG_AWG_FLTR_MODE_ED,8,3       ; @CFG_AWG_FLTR_MODE_ED
	.comm	_HDA_ANA_SRC_Y_CFG_4X,8,3       ; @HDA_ANA_SRC_Y_CFG_4X
	.comm	_HDA_ANA_SRC_C_CFG_4X,8,3       ; @HDA_ANA_SRC_C_CFG_4X
	.comm	_coef_yc_4x,8,3                 ; @coef_yc_4x
l_.str.5:                               ; @.str.5
	.asciz	"Not supported\n"

l_.str.6:                               ; @.str.6
	.asciz	"Undefined resolution\n"

l_.str.7:                               ; @.str.7
	.asciz	"Using HDA mode #%d\n"

	.comm	_SCALE_CTRL_Y_DFLT,8,3          ; @SCALE_CTRL_Y_DFLT
	.comm	_HDA_ANA_SCALE_CTRL_Y,8,3       ; @HDA_ANA_SCALE_CTRL_Y
	.comm	_SCALE_CTRL_CB_DFLT,8,3         ; @SCALE_CTRL_CB_DFLT
	.comm	_HDA_ANA_SCALE_CTRL_CB,8,3      ; @HDA_ANA_SCALE_CTRL_CB
	.comm	_SCALE_CTRL_CR_DFLT,8,3         ; @SCALE_CTRL_CR_DFLT
	.comm	_HDA_ANA_SCALE_CTRL_CR,8,3      ; @HDA_ANA_SCALE_CTRL_CR
	.comm	_HDA_ANA_SRC_Y_CFG,8,3          ; @HDA_ANA_SRC_Y_CFG
	.comm	_HDA_ANA_SRC_C_CFG,8,3          ; @HDA_ANA_SRC_C_CFG
	.comm	_SAMPLER_COEF_NB,8,3            ; @SAMPLER_COEF_NB
	.comm	_HDA_COEFF_Y_PH1_TAP123,8,3     ; @HDA_COEFF_Y_PH1_TAP123
	.comm	_HDA_COEFF_C_PH1_TAP123,8,3     ; @HDA_COEFF_C_PH1_TAP123
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ; @DRM_MODE_FLAG_INTERLACE
	.comm	_CFG_AWG_ASYNC_VSYNC_MTD,8,3    ; @CFG_AWG_ASYNC_VSYNC_MTD
	.comm	_CFG_PBPR_SYNC_OFF_VAL,8,3      ; @CFG_PBPR_SYNC_OFF_VAL
	.comm	_CFG_PBPR_SYNC_OFF_SHIFT,8,3    ; @CFG_PBPR_SYNC_OFF_SHIFT
	.comm	_HDA_ANA_CFG,8,3                ; @HDA_ANA_CFG
	.comm	_CFG_AWG_ASYNC_EN,8,3           ; @CFG_AWG_ASYNC_EN
	.no_dead_strip	_sti_hda_pre_enable
.subsections_via_symbols
