	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_atom_initialize_bios_scratch_regs ## -- Begin function radeon_atom_initialize_bios_scratch_regs
	.p2align	4, 0x90
_radeon_atom_initialize_bios_scratch_regs: ## @radeon_atom_initialize_bios_scratch_regs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %r14
	movq	(%r14), %rax
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movq	_R600_BIOS_2_SCRATCH@GOTPCREL(%rip), %r13
	movq	%r13, %rax
	cmovlq	_RADEON_BIOS_2_SCRATCH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_R600_BIOS_6_SCRATCH@GOTPCREL(%rip), %r15
	movq	%r15, %rbx
	cmovlq	_RADEON_BIOS_6_SCRATCH@GOTPCREL(%rip), %rbx
	callq	_RREG32
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	(%rbx), %edi
	callq	_RREG32
	movl	%eax, %r12d
	movq	_ATOM_S2_VRI_BRIGHT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	notl	%ebx
	movq	_ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movq	%r14, %rdi
	callq	_ASIC_IS_DCE4
	movq	_ATOM_S2_DEVICE_DPMS_STATE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	xorl	%esi, %esi
	cmpq	$1, %rax
	sbbl	%esi, %esi
	orl	%ecx, %esi
	andl	%ebx, %esi
	andl	-44(%rbp), %esi                 ## 4-byte Folded Reload
	movq	(%r14), %rax
	movq	_CHIP_R600@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	cmovlq	_RADEON_BIOS_2_SCRATCH@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	cmovlq	_RADEON_BIOS_6_SCRATCH@GOTPCREL(%rip), %r15
	callq	_WREG32
	movl	(%r15), %edi
	movl	%r12d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_R600,8,3                  ## @CHIP_R600
	.comm	_R600_BIOS_2_SCRATCH,4,2        ## @R600_BIOS_2_SCRATCH
	.comm	_R600_BIOS_6_SCRATCH,4,2        ## @R600_BIOS_6_SCRATCH
	.comm	_RADEON_BIOS_2_SCRATCH,4,2      ## @RADEON_BIOS_2_SCRATCH
	.comm	_RADEON_BIOS_6_SCRATCH,4,2      ## @RADEON_BIOS_6_SCRATCH
	.comm	_ATOM_S2_VRI_BRIGHT_ENABLE,4,2  ## @ATOM_S2_VRI_BRIGHT_ENABLE
	.comm	_ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH,4,2 ## @ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH
	.comm	_ATOM_S2_DEVICE_DPMS_STATE,4,2  ## @ATOM_S2_DEVICE_DPMS_STATE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_atom_initialize_bios_scratch_regs ; -- Begin function radeon_atom_initialize_bios_scratch_regs
	.p2align	2
_radeon_atom_initialize_bios_scratch_regs: ; @radeon_atom_initialize_bios_scratch_regs
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	ldr	x19, [x0]
	ldr	x8, [x19]
Lloh0:
	adrp	x21, _CHIP_R600@GOTPAGE
Lloh1:
	ldr	x21, [x21, _CHIP_R600@GOTPAGEOFF]
Lloh2:
	adrp	x22, _RADEON_BIOS_2_SCRATCH@GOTPAGE
Lloh3:
	ldr	x22, [x22, _RADEON_BIOS_2_SCRATCH@GOTPAGEOFF]
	ldr	x9, [x21]
Lloh4:
	adrp	x23, _R600_BIOS_2_SCRATCH@GOTPAGE
Lloh5:
	ldr	x23, [x23, _R600_BIOS_2_SCRATCH@GOTPAGEOFF]
	cmp	x8, x9
	csel	x8, x22, x23, lt
	ldr	w0, [x8]
Lloh6:
	adrp	x24, _RADEON_BIOS_6_SCRATCH@GOTPAGE
Lloh7:
	ldr	x24, [x24, _RADEON_BIOS_6_SCRATCH@GOTPAGEOFF]
Lloh8:
	adrp	x25, _R600_BIOS_6_SCRATCH@GOTPAGE
Lloh9:
	ldr	x25, [x25, _R600_BIOS_6_SCRATCH@GOTPAGEOFF]
	csel	x26, x24, x25, lt
	bl	_RREG32
	mov	x20, x0
	ldr	w0, [x26]
	bl	_RREG32
Lloh10:
	adrp	x8, _ATOM_S2_VRI_BRIGHT_ENABLE@GOTPAGE
Lloh11:
	ldr	x8, [x8, _ATOM_S2_VRI_BRIGHT_ENABLE@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	bic	w26, w20, w8
Lloh13:
	adrp	x8, _ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH@GOTPAGE
Lloh14:
	ldr	x8, [x8, _ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	orr	w20, w8, w0
	mov	x0, x19
	bl	_ASIC_IS_DCE4
Lloh16:
	adrp	x8, _ATOM_S2_DEVICE_DPMS_STATE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _ATOM_S2_DEVICE_DPMS_STATE@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	cmp	x0, #0
	mov	w9, #-1
	csinv	w8, w9, w8, eq
	and	w1, w26, w8
	ldr	x8, [x19]
	ldr	x9, [x21]
	cmp	x8, x9
	csel	x8, x22, x23, lt
	ldr	w0, [x8]
	csel	x19, x24, x25, lt
	bl	_WREG32
	ldr	w0, [x19]
	mov	x1, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_R600,8,3                  ; @CHIP_R600
	.comm	_R600_BIOS_2_SCRATCH,4,2        ; @R600_BIOS_2_SCRATCH
	.comm	_R600_BIOS_6_SCRATCH,4,2        ; @R600_BIOS_6_SCRATCH
	.comm	_RADEON_BIOS_2_SCRATCH,4,2      ; @RADEON_BIOS_2_SCRATCH
	.comm	_RADEON_BIOS_6_SCRATCH,4,2      ; @RADEON_BIOS_6_SCRATCH
	.comm	_ATOM_S2_VRI_BRIGHT_ENABLE,4,2  ; @ATOM_S2_VRI_BRIGHT_ENABLE
	.comm	_ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH,4,2 ; @ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH
	.comm	_ATOM_S2_DEVICE_DPMS_STATE,4,2  ; @ATOM_S2_DEVICE_DPMS_STATE
.subsections_via_symbols
