	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function exynos_dsi_init_link
_exynos_dsi_init_link:                  ## @exynos_dsi_init_link
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movq	16(%rdi), %r15
	movq	_DSIM_FIFOCTRL_REG@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	callq	_exynos_dsi_read
	movl	%eax, %ebx
	movl	%eax, %edx
	andl	$-32, %edx
	movl	(%r14), %esi
	movq	%r13, %rdi
	callq	_exynos_dsi_write
	movl	$9000, %edi                     ## imm = 0x2328
	movl	$11000, %esi                    ## imm = 0x2AF8
	callq	_usleep_range
	orl	$31, %ebx
	movl	(%r14), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_exynos_dsi_write
	movl	$9000, %edi                     ## imm = 0x2328
	movl	$11000, %esi                    ## imm = 0x2AF8
	callq	_usleep_range
	movl	(%r13), %eax
	movq	_MIPI_DSI_MODE_VIDEO@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_1
## %bb.2:
	movq	_MIPI_DSI_MODE_VSYNC_FLUSH@GOTPCREL(%rip), %rdx
	xorl	%r8d, %r8d
	movl	$0, %ecx
	testl	%eax, (%rdx)
	jne	LBB0_4
## %bb.3:
	movq	_DSIM_MFLUSH_VS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_4:
	movq	_MIPI_DSI_MODE_VIDEO_SYNC_PULSE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edi
	andl	%eax, %edi
	je	LBB0_6
## %bb.5:
	movq	_DSIM_SYNC_INFORM@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edi
LBB0_6:
	movq	_MIPI_DSI_MODE_VIDEO_BURST@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	andl	%eax, %esi
	je	LBB0_8
## %bb.7:
	movq	_DSIM_BURST_MODE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
LBB0_8:
	movq	_DSIM_VIDEO_MODE@GOTPCREL(%rip), %rbx
	movq	_MIPI_DSI_MODE_VIDEO_AUTO_VERT@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	andl	%eax, %edx
	je	LBB0_10
## %bb.9:
	movq	_DSIM_AUTO_MODE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
LBB0_10:
	orl	(%rbx), %ecx
	movq	_MIPI_DSI_MODE_VIDEO_HSE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %ebx
	andl	%eax, %ebx
	je	LBB0_12
## %bb.11:
	movq	_DSIM_HSE_MODE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %ebx
LBB0_12:
	orl	%edi, %ecx
	orl	%edx, %esi
	movq	_MIPI_DSI_MODE_VIDEO_HFP@GOTPCREL(%rip), %rdi
	movl	$0, %edx
	testl	%eax, (%rdi)
	jne	LBB0_14
## %bb.13:
	movq	_DSIM_HFP_MODE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
LBB0_14:
	orl	%edx, %ebx
	orl	%esi, %ecx
	movq	_MIPI_DSI_MODE_VIDEO_HBP@GOTPCREL(%rip), %rdx
	testl	%eax, (%rdx)
	jne	LBB0_16
## %bb.15:
	movq	_DSIM_HBP_MODE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r8d
LBB0_16:
	orl	%r8d, %ebx
	orl	%ebx, %ecx
	movq	_MIPI_DSI_MODE_VIDEO_HSA@GOTPCREL(%rip), %rdx
	testl	%eax, (%rdx)
	jne	LBB0_18
## %bb.17:
	movq	_DSIM_HSA_MODE@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	jmp	LBB0_18
LBB0_1:
	xorl	%ecx, %ecx
LBB0_18:
	movl	4(%r13), %esi
	addl	$-128, %esi
	cmpl	$4, %esi
	jae	LBB0_19
## %bb.21:
	movq	_MIPI_DSI_MODE_EOT_PACKET@GOTPCREL(%rip), %rdi
	xorl	%edx, %edx
	testl	%eax, (%rdi)
	jne	LBB0_23
## %bb.22:
	movq	_DSIM_EOT_DISABLE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
LBB0_23:
	orl	%ecx, %edx
	movslq	%esi, %rcx
	leaq	l_switch.table.exynos_dsi_init_link(%rip), %rsi
	movq	(%rsi,%rcx,8), %rcx
	orl	(%rcx), %edx
	cmpq	$0, 8(%r15)
	movq	%r15, -48(%rbp)                 ## 8-byte Spill
	je	LBB0_26
## %bb.24:
	movq	_MIPI_DSI_CLOCK_NON_CONTINUOUS@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_26
## %bb.25:
	movq	_DSIM_CLKLANE_STOP@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
LBB0_26:
	movq	_DSIM_CONFIG_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_exynos_dsi_write
	movl	12(%r13), %edi
	callq	_BIT
	movl	%eax, %r15d
	decl	%r15d
	movq	%r13, %r12
	movq	%r13, %rdi
	movl	%r15d, %esi
	callq	_exynos_dsi_enable_lane
	movl	$-101, %ebx
	movq	_DSIM_TX_READY_HS_CLK@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_27:                                ## =>This Inner Loop Header: Depth=1
	incl	%ebx
	je	LBB0_28
## %bb.29:                              ##   in Loop: Header=BB0_27 Depth=1
	movq	_DSIM_STATUS_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_exynos_dsi_read
	movl	%eax, %r13d
	movl	%r15d, %edi
	callq	_DSIM_STOP_STATE_DAT
	movl	%r15d, %edi
	callq	_DSIM_STOP_STATE_DAT
	movl	(%r14), %eax
	movq	_DSIM_STOP_STATE_CLK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	testl	%r13d, %eax
	je	LBB0_27
## %bb.30:
	movq	_DSIM_ESCMODE_REG@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%r12, %rdi
	callq	_exynos_dsi_read
	movq	_DSIM_STOP_STATE_CNT_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rax
	movq	_STOP_STATE_CNT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edi
	callq	_DSIM_STOP_STATE_CNT
	orl	%eax, %ebx
	movl	(%r14), %esi
	movq	%r12, %rdi
	movl	%ebx, %edx
	callq	_exynos_dsi_write
	movl	$255, %edi
	callq	_DSIM_BTA_TIMEOUT
	movl	%eax, %ebx
	movl	$65535, %edi                    ## imm = 0xFFFF
	callq	_DSIM_LPDR_TIMEOUT
	orl	%eax, %ebx
	movq	_DSIM_TIMEOUT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movl	%ebx, %edx
	callq	_exynos_dsi_write
	xorl	%eax, %eax
	jmp	LBB0_31
LBB0_19:
	movl	8(%r13), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	jmp	LBB0_20
LBB0_28:
	movl	8(%r12), %edi
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_err
	movq	_EFAULT@GOTPCREL(%rip), %rcx
LBB0_20:
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_31:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DSIM_FIFOCTRL_REG,4,2          ## @DSIM_FIFOCTRL_REG
	.comm	_MIPI_DSI_MODE_VIDEO,4,2        ## @MIPI_DSI_MODE_VIDEO
	.comm	_DSIM_VIDEO_MODE,4,2            ## @DSIM_VIDEO_MODE
	.comm	_MIPI_DSI_MODE_VSYNC_FLUSH,4,2  ## @MIPI_DSI_MODE_VSYNC_FLUSH
	.comm	_DSIM_MFLUSH_VS,4,2             ## @DSIM_MFLUSH_VS
	.comm	_MIPI_DSI_MODE_VIDEO_SYNC_PULSE,4,2 ## @MIPI_DSI_MODE_VIDEO_SYNC_PULSE
	.comm	_DSIM_SYNC_INFORM,4,2           ## @DSIM_SYNC_INFORM
	.comm	_MIPI_DSI_MODE_VIDEO_BURST,4,2  ## @MIPI_DSI_MODE_VIDEO_BURST
	.comm	_DSIM_BURST_MODE,4,2            ## @DSIM_BURST_MODE
	.comm	_MIPI_DSI_MODE_VIDEO_AUTO_VERT,4,2 ## @MIPI_DSI_MODE_VIDEO_AUTO_VERT
	.comm	_DSIM_AUTO_MODE,4,2             ## @DSIM_AUTO_MODE
	.comm	_MIPI_DSI_MODE_VIDEO_HSE,4,2    ## @MIPI_DSI_MODE_VIDEO_HSE
	.comm	_DSIM_HSE_MODE,4,2              ## @DSIM_HSE_MODE
	.comm	_MIPI_DSI_MODE_VIDEO_HFP,4,2    ## @MIPI_DSI_MODE_VIDEO_HFP
	.comm	_DSIM_HFP_MODE,4,2              ## @DSIM_HFP_MODE
	.comm	_MIPI_DSI_MODE_VIDEO_HBP,4,2    ## @MIPI_DSI_MODE_VIDEO_HBP
	.comm	_DSIM_HBP_MODE,4,2              ## @DSIM_HBP_MODE
	.comm	_MIPI_DSI_MODE_VIDEO_HSA,4,2    ## @MIPI_DSI_MODE_VIDEO_HSA
	.comm	_DSIM_HSA_MODE,4,2              ## @DSIM_HSA_MODE
	.comm	_MIPI_DSI_MODE_EOT_PACKET,4,2   ## @MIPI_DSI_MODE_EOT_PACKET
	.comm	_DSIM_EOT_DISABLE,4,2           ## @DSIM_EOT_DISABLE
	.comm	_DSIM_MAIN_PIX_FORMAT_RGB888,4,2 ## @DSIM_MAIN_PIX_FORMAT_RGB888
	.comm	_DSIM_MAIN_PIX_FORMAT_RGB666,4,2 ## @DSIM_MAIN_PIX_FORMAT_RGB666
	.comm	_DSIM_MAIN_PIX_FORMAT_RGB666_P,4,2 ## @DSIM_MAIN_PIX_FORMAT_RGB666_P
	.comm	_DSIM_MAIN_PIX_FORMAT_RGB565,4,2 ## @DSIM_MAIN_PIX_FORMAT_RGB565
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"invalid pixel format\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_MIPI_DSI_CLOCK_NON_CONTINUOUS,4,2 ## @MIPI_DSI_CLOCK_NON_CONTINUOUS
	.comm	_DSIM_CLKLANE_STOP,4,2          ## @DSIM_CLKLANE_STOP
	.comm	_DSIM_CONFIG_REG,4,2            ## @DSIM_CONFIG_REG
L_.str.1:                               ## @.str.1
	.asciz	"waiting for bus lanes timed out\n"

	.comm	_EFAULT,4,2                     ## @EFAULT
	.comm	_DSIM_STATUS_REG,4,2            ## @DSIM_STATUS_REG
	.comm	_DSIM_STOP_STATE_CLK,4,2        ## @DSIM_STOP_STATE_CLK
	.comm	_DSIM_TX_READY_HS_CLK,4,2       ## @DSIM_TX_READY_HS_CLK
	.comm	_DSIM_ESCMODE_REG,4,2           ## @DSIM_ESCMODE_REG
	.comm	_DSIM_STOP_STATE_CNT_MASK,4,2   ## @DSIM_STOP_STATE_CNT_MASK
	.comm	_STOP_STATE_CNT,8,3             ## @STOP_STATE_CNT
	.comm	_DSIM_TIMEOUT_REG,4,2           ## @DSIM_TIMEOUT_REG
	.no_dead_strip	_exynos_dsi_init_link
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.exynos_dsi_init_link
l_switch.table.exynos_dsi_init_link:
	.quad	_DSIM_MAIN_PIX_FORMAT_RGB888
	.quad	_DSIM_MAIN_PIX_FORMAT_RGB666_P
	.quad	_DSIM_MAIN_PIX_FORMAT_RGB666
	.quad	_DSIM_MAIN_PIX_FORMAT_RGB565

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function exynos_dsi_init_link
_exynos_dsi_init_link:                  ; @exynos_dsi_init_link
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x22, [x0, #16]
Lloh0:
	adrp	x21, _DSIM_FIFOCTRL_REG@GOTPAGE
Lloh1:
	ldr	x21, [x21, _DSIM_FIFOCTRL_REG@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_exynos_dsi_read
	mov	x20, x0
	and	w2, w0, #0xffffffe0
	ldr	w1, [x21]
	mov	x0, x19
	bl	_exynos_dsi_write
	mov	w0, #9000
	mov	w1, #11000
	bl	_usleep_range
	orr	w2, w20, #0x1f
	ldr	w1, [x21]
	mov	x0, x19
	bl	_exynos_dsi_write
	mov	w0, #9000
	mov	w1, #11000
	bl	_usleep_range
	ldr	w8, [x19]
Lloh2:
	adrp	x9, _MIPI_DSI_MODE_VIDEO@GOTPAGE
Lloh3:
	ldr	x9, [x9, _MIPI_DSI_MODE_VIDEO@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.1:
Lloh5:
	adrp	x9, _DSIM_VIDEO_MODE@GOTPAGE
Lloh6:
	ldr	x9, [x9, _DSIM_VIDEO_MODE@GOTPAGEOFF]
Lloh7:
	adrp	x10, _MIPI_DSI_MODE_VSYNC_FLUSH@GOTPAGE
Lloh8:
	ldr	x10, [x10, _MIPI_DSI_MODE_VSYNC_FLUSH@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
Lloh10:
	ldr	w10, [x10]
Lloh11:
	adrp	x11, _DSIM_MFLUSH_VS@GOTPAGE
Lloh12:
	ldr	x11, [x11, _DSIM_MFLUSH_VS@GOTPAGEOFF]
Lloh13:
	ldr	w11, [x11]
	tst	w10, w8
	csel	w10, w11, wzr, eq
	orr	w9, w10, w9
Lloh14:
	adrp	x10, _MIPI_DSI_MODE_VIDEO_SYNC_PULSE@GOTPAGE
Lloh15:
	ldr	x10, [x10, _MIPI_DSI_MODE_VIDEO_SYNC_PULSE@GOTPAGEOFF]
Lloh16:
	adrp	x11, _DSIM_SYNC_INFORM@GOTPAGE
Lloh17:
	ldr	x11, [x11, _DSIM_SYNC_INFORM@GOTPAGEOFF]
Lloh18:
	ldr	w10, [x10]
Lloh19:
	ldr	w11, [x11]
	tst	w10, w8
	csel	w10, wzr, w11, eq
Lloh20:
	adrp	x11, _MIPI_DSI_MODE_VIDEO_BURST@GOTPAGE
Lloh21:
	ldr	x11, [x11, _MIPI_DSI_MODE_VIDEO_BURST@GOTPAGEOFF]
	orr	w9, w9, w10
Lloh22:
	ldr	w10, [x11]
Lloh23:
	adrp	x11, _DSIM_BURST_MODE@GOTPAGE
Lloh24:
	ldr	x11, [x11, _DSIM_BURST_MODE@GOTPAGEOFF]
Lloh25:
	ldr	w11, [x11]
	tst	w10, w8
	csel	w10, wzr, w11, eq
	orr	w9, w9, w10
Lloh26:
	adrp	x10, _MIPI_DSI_MODE_VIDEO_AUTO_VERT@GOTPAGE
Lloh27:
	ldr	x10, [x10, _MIPI_DSI_MODE_VIDEO_AUTO_VERT@GOTPAGEOFF]
Lloh28:
	adrp	x11, _DSIM_AUTO_MODE@GOTPAGE
Lloh29:
	ldr	x11, [x11, _DSIM_AUTO_MODE@GOTPAGEOFF]
Lloh30:
	ldr	w10, [x10]
Lloh31:
	ldr	w11, [x11]
	tst	w10, w8
	csel	w10, wzr, w11, eq
Lloh32:
	adrp	x11, _MIPI_DSI_MODE_VIDEO_HSE@GOTPAGE
Lloh33:
	ldr	x11, [x11, _MIPI_DSI_MODE_VIDEO_HSE@GOTPAGEOFF]
	orr	w9, w9, w10
Lloh34:
	ldr	w10, [x11]
Lloh35:
	adrp	x11, _DSIM_HSE_MODE@GOTPAGE
Lloh36:
	ldr	x11, [x11, _DSIM_HSE_MODE@GOTPAGEOFF]
Lloh37:
	ldr	w11, [x11]
	tst	w10, w8
	csel	w10, wzr, w11, eq
	orr	w9, w9, w10
Lloh38:
	adrp	x10, _MIPI_DSI_MODE_VIDEO_HFP@GOTPAGE
Lloh39:
	ldr	x10, [x10, _MIPI_DSI_MODE_VIDEO_HFP@GOTPAGEOFF]
Lloh40:
	adrp	x11, _DSIM_HFP_MODE@GOTPAGE
Lloh41:
	ldr	x11, [x11, _DSIM_HFP_MODE@GOTPAGEOFF]
Lloh42:
	ldr	w10, [x10]
Lloh43:
	ldr	w11, [x11]
	tst	w10, w8
	csel	w10, w11, wzr, eq
Lloh44:
	adrp	x11, _MIPI_DSI_MODE_VIDEO_HBP@GOTPAGE
Lloh45:
	ldr	x11, [x11, _MIPI_DSI_MODE_VIDEO_HBP@GOTPAGEOFF]
	orr	w9, w9, w10
Lloh46:
	ldr	w10, [x11]
Lloh47:
	adrp	x11, _DSIM_HBP_MODE@GOTPAGE
Lloh48:
	ldr	x11, [x11, _DSIM_HBP_MODE@GOTPAGEOFF]
Lloh49:
	ldr	w11, [x11]
	tst	w10, w8
	csel	w10, w11, wzr, eq
	orr	w9, w9, w10
Lloh50:
	adrp	x10, _MIPI_DSI_MODE_VIDEO_HSA@GOTPAGE
Lloh51:
	ldr	x10, [x10, _MIPI_DSI_MODE_VIDEO_HSA@GOTPAGEOFF]
Lloh52:
	ldr	w10, [x10]
	tst	w10, w8
	b.ne	LBB0_4
; %bb.2:
Lloh53:
	adrp	x10, _DSIM_HSA_MODE@GOTPAGE
Lloh54:
	ldr	x10, [x10, _DSIM_HSA_MODE@GOTPAGEOFF]
Lloh55:
	ldr	w10, [x10]
	orr	w9, w10, w9
	b	LBB0_4
LBB0_3:
	mov	w9, #0
LBB0_4:
	ldr	w10, [x19, #4]
	sub	w10, w10, #128
	cmp	w10, #4
	b.hs	LBB0_12
; %bb.5:
Lloh56:
	adrp	x11, _MIPI_DSI_MODE_EOT_PACKET@GOTPAGE
Lloh57:
	ldr	x11, [x11, _MIPI_DSI_MODE_EOT_PACKET@GOTPAGEOFF]
Lloh58:
	adrp	x12, _DSIM_EOT_DISABLE@GOTPAGE
Lloh59:
	ldr	x12, [x12, _DSIM_EOT_DISABLE@GOTPAGEOFF]
Lloh60:
	ldr	w11, [x11]
Lloh61:
	ldr	w12, [x12]
	tst	w11, w8
	csel	w11, w12, wzr, eq
Lloh62:
	adrp	x12, l_switch.table.exynos_dsi_init_link@PAGE
Lloh63:
	add	x12, x12, l_switch.table.exynos_dsi_init_link@PAGEOFF
	orr	w9, w11, w9
	ldr	x10, [x12, w10, sxtw #3]
	ldr	w10, [x10]
	orr	w2, w9, w10
	ldr	x9, [x22, #8]
	cbz	x9, LBB0_8
; %bb.6:
Lloh64:
	adrp	x9, _MIPI_DSI_CLOCK_NON_CONTINUOUS@GOTPAGE
Lloh65:
	ldr	x9, [x9, _MIPI_DSI_CLOCK_NON_CONTINUOUS@GOTPAGEOFF]
Lloh66:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_8
; %bb.7:
Lloh67:
	adrp	x8, _DSIM_CLKLANE_STOP@GOTPAGE
Lloh68:
	ldr	x8, [x8, _DSIM_CLKLANE_STOP@GOTPAGEOFF]
Lloh69:
	ldr	w8, [x8]
	orr	w2, w8, w2
LBB0_8:
Lloh70:
	adrp	x8, _DSIM_CONFIG_REG@GOTPAGE
Lloh71:
	ldr	x8, [x8, _DSIM_CONFIG_REG@GOTPAGEOFF]
Lloh72:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_exynos_dsi_write
	ldr	w0, [x19, #12]
	bl	_BIT
	sub	w20, w0, #1
	mov	x0, x19
	mov	x1, x20
	bl	_exynos_dsi_enable_lane
	mov	w23, #-101
Lloh73:
	adrp	x24, _DSIM_STATUS_REG@GOTPAGE
Lloh74:
	ldr	x24, [x24, _DSIM_STATUS_REG@GOTPAGEOFF]
Lloh75:
	adrp	x25, _DSIM_STOP_STATE_CLK@GOTPAGE
Lloh76:
	ldr	x25, [x25, _DSIM_STOP_STATE_CLK@GOTPAGEOFF]
Lloh77:
	adrp	x26, _DSIM_TX_READY_HS_CLK@GOTPAGE
Lloh78:
	ldr	x26, [x26, _DSIM_TX_READY_HS_CLK@GOTPAGEOFF]
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	adds	w23, w23, #1
	b.hs	LBB0_13
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	ldr	w1, [x24]
	mov	x0, x19
	bl	_exynos_dsi_read
	mov	x21, x0
	mov	x0, x20
	bl	_DSIM_STOP_STATE_DAT
	mov	x0, x20
	bl	_DSIM_STOP_STATE_DAT
	ldr	w8, [x25]
	ldr	w9, [x26]
	orr	w8, w9, w8
	tst	w8, w21
	b.eq	LBB0_9
; %bb.11:
Lloh79:
	adrp	x20, _DSIM_ESCMODE_REG@GOTPAGE
Lloh80:
	ldr	x20, [x20, _DSIM_ESCMODE_REG@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_exynos_dsi_read
Lloh81:
	adrp	x8, _DSIM_STOP_STATE_CNT_MASK@GOTPAGE
Lloh82:
	ldr	x8, [x8, _DSIM_STOP_STATE_CNT_MASK@GOTPAGEOFF]
Lloh83:
	ldr	w8, [x8]
	bic	w21, w0, w8
	ldr	x8, [x22]
Lloh84:
	adrp	x9, _STOP_STATE_CNT@GOTPAGE
Lloh85:
	ldr	x9, [x9, _STOP_STATE_CNT@GOTPAGEOFF]
Lloh86:
	ldr	x9, [x9]
	ldr	w0, [x8, x9, lsl #2]
	bl	_DSIM_STOP_STATE_CNT
	orr	w2, w0, w21
	ldr	w1, [x20]
	mov	x0, x19
	bl	_exynos_dsi_write
	mov	w0, #255
	bl	_DSIM_BTA_TIMEOUT
	mov	x20, x0
	mov	w0, #65535
	bl	_DSIM_LPDR_TIMEOUT
	orr	w2, w0, w20
Lloh87:
	adrp	x8, _DSIM_TIMEOUT_REG@GOTPAGE
Lloh88:
	ldr	x8, [x8, _DSIM_TIMEOUT_REG@GOTPAGEOFF]
Lloh89:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_exynos_dsi_write
	mov	w0, #0
	b	LBB0_15
LBB0_12:
	ldr	w0, [x19, #8]
Lloh90:
	adrp	x1, l_.str@PAGE
Lloh91:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
Lloh92:
	adrp	x8, _EINVAL@GOTPAGE
Lloh93:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_14
LBB0_13:
	ldr	w0, [x19, #8]
Lloh94:
	adrp	x1, l_.str.1@PAGE
Lloh95:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_err
Lloh96:
	adrp	x8, _EFAULT@GOTPAGE
Lloh97:
	ldr	x8, [x8, _EFAULT@GOTPAGEOFF]
LBB0_14:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_15:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh42
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh30
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh18
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh9
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh60
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpLdrGot	Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGot	Lloh79, Lloh80
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpAdd	Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh96, Lloh97
	.loh AdrpAdd	Lloh94, Lloh95
	.cfi_endproc
                                        ; -- End function
	.comm	_DSIM_FIFOCTRL_REG,4,2          ; @DSIM_FIFOCTRL_REG
	.comm	_MIPI_DSI_MODE_VIDEO,4,2        ; @MIPI_DSI_MODE_VIDEO
	.comm	_DSIM_VIDEO_MODE,4,2            ; @DSIM_VIDEO_MODE
	.comm	_MIPI_DSI_MODE_VSYNC_FLUSH,4,2  ; @MIPI_DSI_MODE_VSYNC_FLUSH
	.comm	_DSIM_MFLUSH_VS,4,2             ; @DSIM_MFLUSH_VS
	.comm	_MIPI_DSI_MODE_VIDEO_SYNC_PULSE,4,2 ; @MIPI_DSI_MODE_VIDEO_SYNC_PULSE
	.comm	_DSIM_SYNC_INFORM,4,2           ; @DSIM_SYNC_INFORM
	.comm	_MIPI_DSI_MODE_VIDEO_BURST,4,2  ; @MIPI_DSI_MODE_VIDEO_BURST
	.comm	_DSIM_BURST_MODE,4,2            ; @DSIM_BURST_MODE
	.comm	_MIPI_DSI_MODE_VIDEO_AUTO_VERT,4,2 ; @MIPI_DSI_MODE_VIDEO_AUTO_VERT
	.comm	_DSIM_AUTO_MODE,4,2             ; @DSIM_AUTO_MODE
	.comm	_MIPI_DSI_MODE_VIDEO_HSE,4,2    ; @MIPI_DSI_MODE_VIDEO_HSE
	.comm	_DSIM_HSE_MODE,4,2              ; @DSIM_HSE_MODE
	.comm	_MIPI_DSI_MODE_VIDEO_HFP,4,2    ; @MIPI_DSI_MODE_VIDEO_HFP
	.comm	_DSIM_HFP_MODE,4,2              ; @DSIM_HFP_MODE
	.comm	_MIPI_DSI_MODE_VIDEO_HBP,4,2    ; @MIPI_DSI_MODE_VIDEO_HBP
	.comm	_DSIM_HBP_MODE,4,2              ; @DSIM_HBP_MODE
	.comm	_MIPI_DSI_MODE_VIDEO_HSA,4,2    ; @MIPI_DSI_MODE_VIDEO_HSA
	.comm	_DSIM_HSA_MODE,4,2              ; @DSIM_HSA_MODE
	.comm	_MIPI_DSI_MODE_EOT_PACKET,4,2   ; @MIPI_DSI_MODE_EOT_PACKET
	.comm	_DSIM_EOT_DISABLE,4,2           ; @DSIM_EOT_DISABLE
	.comm	_DSIM_MAIN_PIX_FORMAT_RGB888,4,2 ; @DSIM_MAIN_PIX_FORMAT_RGB888
	.comm	_DSIM_MAIN_PIX_FORMAT_RGB666,4,2 ; @DSIM_MAIN_PIX_FORMAT_RGB666
	.comm	_DSIM_MAIN_PIX_FORMAT_RGB666_P,4,2 ; @DSIM_MAIN_PIX_FORMAT_RGB666_P
	.comm	_DSIM_MAIN_PIX_FORMAT_RGB565,4,2 ; @DSIM_MAIN_PIX_FORMAT_RGB565
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"invalid pixel format\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_MIPI_DSI_CLOCK_NON_CONTINUOUS,4,2 ; @MIPI_DSI_CLOCK_NON_CONTINUOUS
	.comm	_DSIM_CLKLANE_STOP,4,2          ; @DSIM_CLKLANE_STOP
	.comm	_DSIM_CONFIG_REG,4,2            ; @DSIM_CONFIG_REG
l_.str.1:                               ; @.str.1
	.asciz	"waiting for bus lanes timed out\n"

	.comm	_EFAULT,4,2                     ; @EFAULT
	.comm	_DSIM_STATUS_REG,4,2            ; @DSIM_STATUS_REG
	.comm	_DSIM_STOP_STATE_CLK,4,2        ; @DSIM_STOP_STATE_CLK
	.comm	_DSIM_TX_READY_HS_CLK,4,2       ; @DSIM_TX_READY_HS_CLK
	.comm	_DSIM_ESCMODE_REG,4,2           ; @DSIM_ESCMODE_REG
	.comm	_DSIM_STOP_STATE_CNT_MASK,4,2   ; @DSIM_STOP_STATE_CNT_MASK
	.comm	_STOP_STATE_CNT,8,3             ; @STOP_STATE_CNT
	.comm	_DSIM_TIMEOUT_REG,4,2           ; @DSIM_TIMEOUT_REG
	.no_dead_strip	_exynos_dsi_init_link
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.exynos_dsi_init_link
l_switch.table.exynos_dsi_init_link:
	.quad	_DSIM_MAIN_PIX_FORMAT_RGB888
	.quad	_DSIM_MAIN_PIX_FORMAT_RGB666_P
	.quad	_DSIM_MAIN_PIX_FORMAT_RGB666
	.quad	_DSIM_MAIN_PIX_FORMAT_RGB565

.subsections_via_symbols
