	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smu_v11_0_i2c_set_clock_gating
_smu_v11_0_i2c_set_clock_gating:        ## @smu_v11_0_i2c_set_clock_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	callq	_to_amdgpu_device
	movq	_SMUIO@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_mmSMUIO_PWRMGT@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_SMUIO_PWRMGT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_i2c_clk_gate_en@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	xorl	%ecx, %ecx
	testl	%ebx, %ebx
	setne	%cl
	movl	%eax, %edi
	callq	_REG_SET_FIELD
	movl	(%r14), %edi
	movl	(%r15), %edx
	xorl	%esi, %esi
	movl	%eax, %ecx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32_SOC15                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SMUIO,4,2                      ## @SMUIO
	.comm	_mmSMUIO_PWRMGT,4,2             ## @mmSMUIO_PWRMGT
	.comm	_SMUIO_PWRMGT,4,2               ## @SMUIO_PWRMGT
	.comm	_i2c_clk_gate_en,4,2            ## @i2c_clk_gate_en
	.no_dead_strip	_smu_v11_0_i2c_set_clock_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smu_v11_0_i2c_set_clock_gating
_smu_v11_0_i2c_set_clock_gating:        ; @smu_v11_0_i2c_set_clock_gating
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	bl	_to_amdgpu_device
Lloh0:
	adrp	x20, _SMUIO@GOTPAGE
Lloh1:
	ldr	x20, [x20, _SMUIO@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh2:
	adrp	x21, _mmSMUIO_PWRMGT@GOTPAGE
Lloh3:
	ldr	x21, [x21, _mmSMUIO_PWRMGT@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh4:
	adrp	x8, _SMUIO_PWRMGT@GOTPAGE
Lloh5:
	ldr	x8, [x8, _SMUIO_PWRMGT@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
Lloh7:
	adrp	x8, _i2c_clk_gate_en@GOTPAGE
Lloh8:
	ldr	x8, [x8, _i2c_clk_gate_en@GOTPAGEOFF]
Lloh9:
	ldr	w2, [x8]
	cmp	w19, #0
	cset	w3, ne
	bl	_REG_SET_FIELD
	mov	x3, x0
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32_SOC15
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_SMUIO,4,2                      ; @SMUIO
	.comm	_mmSMUIO_PWRMGT,4,2             ; @mmSMUIO_PWRMGT
	.comm	_SMUIO_PWRMGT,4,2               ; @SMUIO_PWRMGT
	.comm	_i2c_clk_gate_en,4,2            ; @i2c_clk_gate_en
	.no_dead_strip	_smu_v11_0_i2c_set_clock_gating
.subsections_via_symbols
