	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si_irq_set                     ## -- Begin function si_irq_set
	.p2align	4, 0x90
_si_irq_set:                            ## @si_irq_set
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$0, 48(%rdi)
	je	LBB0_1
## %bb.2:
	cmpl	$0, 56(%rdi)
	je	LBB0_3
## %bb.4:
	movq	_CP_INT_CNTL_RING0@GOTPCREL(%rip), %rax
	movq	%rdi, %r15
	movq	(%rax), %rdi
	callq	_RREG32
	movq	_CNTX_BUSY_INT_ENABLE@GOTPCREL(%rip), %rcx
	movq	_CNTX_EMPTY_INT_ENABLE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r13d
	orl	(%rcx), %r13d
	andl	%eax, %r13d
	movq	_DMA_CNTL@GOTPCREL(%rip), %r14
	movq	_DMA0_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%r14), %rdi
	callq	_RREG32
	movl	%eax, -72(%rbp)                 ## 4-byte Spill
	movq	_TRAP_ENABLE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %r12d
	movq	_DMA1_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%r14), %rdi
	callq	_RREG32
	movl	%eax, -68(%rbp)                 ## 4-byte Spill
	movl	(%rbx), %ebx
	movq	_CG_THERMAL_INT@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_RREG32
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_THERM_INT_MASK_HIGH@GOTPCREL(%rip), %rcx
	movq	_THERM_INT_MASK_LOW@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	orl	(%rcx), %r14d
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	shlq	$2, %rdi
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	addq	40(%r15), %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	leaq	L_.str.1(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_TIME_STAMP_INT_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
LBB0_6:
	movq	_CAYMAN_RING_TYPE_CP1_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	shlq	$2, %rdi
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	addq	40(%rax), %rdi
	callq	_atomic_read
	movl	$0, -60(%rbp)                   ## 4-byte Folded Spill
	movl	$0, %ecx
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:
	leaq	L_.str.2(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_TIME_STAMP_INT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
LBB0_8:
	movl	%ecx, -64(%rbp)                 ## 4-byte Spill
	notl	%r12d
	movq	_CAYMAN_RING_TYPE_CP2_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	shlq	$2, %rdi
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	addq	40(%rax), %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_10
## %bb.9:
	leaq	L_.str.3(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_TIME_STAMP_INT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
LBB0_10:
	notl	%ebx
	movl	-72(%rbp), %r15d                ## 4-byte Reload
	andl	%r12d, %r15d
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	shlq	$2, %rdi
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	addq	40(%rax), %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_12
## %bb.11:
	leaq	L_.str.4(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_TRAP_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %r15d
LBB0_12:
	notl	%r14d
	movl	-68(%rbp), %r12d                ## 4-byte Reload
	andl	%ebx, %r12d
	movq	_CAYMAN_RING_TYPE_DMA1_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	shlq	$2, %rdi
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	addq	40(%rax), %rdi
	callq	_atomic_read
	testq	%rax, %rax
	je	LBB0_14
## %bb.13:
	leaq	L_.str.5(%rip), %rdi
	callq	_DRM_DEBUG
	movq	_TRAP_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
LBB0_14:
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	andl	%r14d, %ebx
	movq	_CP_INT_CNTL_RING0@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	%r13d, %esi
	callq	_WREG32
	movq	_CP_INT_CNTL_RING1@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	-64(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_CP_INT_CNTL_RING2@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	-60(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_DMA0_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	_DMA_CNTL@GOTPCREL(%rip), %r14
	addq	(%r14), %rdi
	movl	%r15d, %esi
	callq	_WREG32
	movq	_DMA1_REGISTER_OFFSET@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	(%r14), %rdi
	movl	%r12d, %esi
	callq	_WREG32
	movq	_GRBM_INT_CNTL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	cmpq	$0, 32(%rcx)
	je	LBB0_16
## %bb.15:
	leaq	L_.str.6(%rip), %rdi
	callq	_DRM_DEBUG
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movq	_THERM_INT_MASK_HIGH@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_THERM_INT_MASK_LOW@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
LBB0_16:
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	cmpl	$0, (%rcx)
	jle	LBB0_24
## %bb.17:
	xorl	%r14d, %r14d
	movq	_crtc_offsets@GOTPCREL(%rip), %r13
	xorl	%ebx, %ebx
	jmp	LBB0_18
	.p2align	4, 0x90
LBB0_20:                                ##   in Loop: Header=BB0_18 Depth=1
	movzbl	%al, %ecx
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%r12, %rsi
	movl	%r13d, %edx
	leaq	L_.str.7(%rip), %r8
	movl	%ebx, %r9d
	callq	_radeon_irq_kms_set_irq_n_enabled
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	incq	%rbx
	movslq	(%rcx), %rax
	addq	$4, %r14
	cmpq	%rax, %rbx
	movq	%r15, %r13
	jge	LBB0_21
LBB0_18:                                ## =>This Inner Loop Header: Depth=1
	movq	%r13, %r15
	movq	(%r13), %rax
	movq	(%rax,%r14,2), %r12
	movq	_VBLANK_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	24(%rcx), %rcx
	movb	$1, %al
	movq	_INT_MASK@GOTPCREL(%rip), %rdx
	addq	(%rdx), %r12
	cmpq	$0, (%rcx,%r14,2)
	jne	LBB0_20
## %bb.19:                              ##   in Loop: Header=BB0_18 Depth=1
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	16(%rax), %rdi
	addq	%r14, %rdi
	callq	_atomic_read
	testq	%rax, %rax
	setne	%al
	jmp	LBB0_20
LBB0_1:
	leaq	L_.str(%rip), %rsi
	movl	$1, %edi
	callq	_WARN
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_28
LBB0_21:
	testl	%eax, %eax
	jle	LBB0_24
## %bb.22:
	xorl	%ebx, %ebx
	movq	_GRPH_INT_CONTROL@GOTPCREL(%rip), %r14
	movq	_GRPH_PFLIP_INT_MASK@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_23:                                ## =>This Inner Loop Header: Depth=1
	movq	(%r13), %rax
	movq	(%rax,%rbx,8), %rdi
	addq	(%r14), %rdi
	movl	(%r12), %esi
	callq	_WREG32
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	incq	%rbx
	movslq	(%rcx), %rax
	cmpq	%rax, %rbx
	jl	LBB0_23
LBB0_24:
	movq	%rcx, %rbx
	movq	%rcx, %rdi
	callq	_ASIC_IS_NODCE
	testl	%eax, %eax
	jne	LBB0_26
## %bb.25:
	xorl	%edi, %edi
	callq	_DC_HPDx_INT_CONTROL
	movq	_DC_HPDx_INT_EN@GOTPCREL(%rip), %r12
	movq	_DC_HPDx_RX_INT_EN@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	orl	(%r12), %edx
	movq	8(%rbx), %rcx
	movl	(%rcx), %ecx
	leaq	L_.str.8(%rip), %r14
	movq	%rbx, %rdi
	movq	%rax, %rsi
	movq	%r14, %r8
	xorl	%r9d, %r9d
	callq	_radeon_irq_kms_set_irq_n_enabled
	movl	$1, %edi
	callq	_DC_HPDx_INT_CONTROL
	movl	(%r15), %edx
	orl	(%r12), %edx
	movq	8(%rbx), %rcx
	movl	4(%rcx), %ecx
	movq	%rbx, %rdi
	movq	%rax, %rsi
	movq	%r14, %r8
	movl	$1, %r9d
	callq	_radeon_irq_kms_set_irq_n_enabled
	movl	$2, %edi
	callq	_DC_HPDx_INT_CONTROL
	movl	(%r15), %edx
	orl	(%r12), %edx
	movq	8(%rbx), %rcx
	movl	8(%rcx), %ecx
	movq	%rbx, %rdi
	movq	%rax, %rsi
	movq	%r14, %r8
	movl	$2, %r9d
	callq	_radeon_irq_kms_set_irq_n_enabled
	movl	$3, %edi
	callq	_DC_HPDx_INT_CONTROL
	movl	(%r15), %edx
	orl	(%r12), %edx
	movq	8(%rbx), %rcx
	movl	12(%rcx), %ecx
	movq	%rbx, %rdi
	movq	%rax, %rsi
	movq	%r14, %r8
	movl	$3, %r9d
	callq	_radeon_irq_kms_set_irq_n_enabled
	movl	$4, %edi
	callq	_DC_HPDx_INT_CONTROL
	movl	(%r15), %edx
	orl	(%r12), %edx
	movq	8(%rbx), %rcx
	movl	16(%rcx), %ecx
	movq	%rbx, %rdi
	movq	%rax, %rsi
	movq	%r14, %r8
	movl	$4, %r9d
	callq	_radeon_irq_kms_set_irq_n_enabled
	movl	$5, %edi
	callq	_DC_HPDx_INT_CONTROL
	movl	(%r15), %edx
	orl	(%r12), %edx
	movq	8(%rbx), %rcx
	movl	20(%rcx), %ecx
	movq	%rbx, %rdi
	movq	%rax, %rsi
	movq	%r14, %r8
	movl	$5, %r9d
	callq	_radeon_irq_kms_set_irq_n_enabled
LBB0_26:
	movq	_CG_THERMAL_INT@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_SRBM_STATUS@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_RREG32
	jmp	LBB0_27
LBB0_3:
	movq	%rdi, %rbx
	callq	_si_disable_interrupts
	movq	%rbx, %rdi
	callq	_si_disable_interrupt_state
LBB0_27:
	xorl	%eax, %eax
LBB0_28:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Can't enable IRQ/MSI because no handler is installed\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_CP_INT_CNTL_RING0,8,3          ## @CP_INT_CNTL_RING0
	.comm	_CNTX_BUSY_INT_ENABLE,4,2       ## @CNTX_BUSY_INT_ENABLE
	.comm	_CNTX_EMPTY_INT_ENABLE,4,2      ## @CNTX_EMPTY_INT_ENABLE
	.comm	_DMA_CNTL,8,3                   ## @DMA_CNTL
	.comm	_DMA0_REGISTER_OFFSET,8,3       ## @DMA0_REGISTER_OFFSET
	.comm	_TRAP_ENABLE,4,2                ## @TRAP_ENABLE
	.comm	_DMA1_REGISTER_OFFSET,8,3       ## @DMA1_REGISTER_OFFSET
	.comm	_CG_THERMAL_INT,8,3             ## @CG_THERMAL_INT
	.comm	_THERM_INT_MASK_HIGH,4,2        ## @THERM_INT_MASK_HIGH
	.comm	_THERM_INT_MASK_LOW,4,2         ## @THERM_INT_MASK_LOW
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
L_.str.1:                               ## @.str.1
	.asciz	"si_irq_set: sw int gfx\n"

	.comm	_TIME_STAMP_INT_ENABLE,4,2      ## @TIME_STAMP_INT_ENABLE
	.comm	_CAYMAN_RING_TYPE_CP1_INDEX,8,3 ## @CAYMAN_RING_TYPE_CP1_INDEX
L_.str.2:                               ## @.str.2
	.asciz	"si_irq_set: sw int cp1\n"

	.comm	_CAYMAN_RING_TYPE_CP2_INDEX,8,3 ## @CAYMAN_RING_TYPE_CP2_INDEX
L_.str.3:                               ## @.str.3
	.asciz	"si_irq_set: sw int cp2\n"

	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ## @R600_RING_TYPE_DMA_INDEX
L_.str.4:                               ## @.str.4
	.asciz	"si_irq_set: sw int dma\n"

	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ## @CAYMAN_RING_TYPE_DMA1_INDEX
L_.str.5:                               ## @.str.5
	.asciz	"si_irq_set: sw int dma1\n"

	.comm	_CP_INT_CNTL_RING1,8,3          ## @CP_INT_CNTL_RING1
	.comm	_CP_INT_CNTL_RING2,8,3          ## @CP_INT_CNTL_RING2
	.comm	_GRBM_INT_CNTL,8,3              ## @GRBM_INT_CNTL
L_.str.6:                               ## @.str.6
	.asciz	"dpm thermal\n"

	.comm	_INT_MASK,8,3                   ## @INT_MASK
	.comm	_crtc_offsets,8,3               ## @crtc_offsets
	.comm	_VBLANK_INT_MASK,4,2            ## @VBLANK_INT_MASK
L_.str.7:                               ## @.str.7
	.asciz	"vblank"

	.comm	_GRPH_INT_CONTROL,8,3           ## @GRPH_INT_CONTROL
	.comm	_GRPH_PFLIP_INT_MASK,4,2        ## @GRPH_PFLIP_INT_MASK
	.comm	_DC_HPDx_INT_EN,4,2             ## @DC_HPDx_INT_EN
	.comm	_DC_HPDx_RX_INT_EN,4,2          ## @DC_HPDx_RX_INT_EN
L_.str.8:                               ## @.str.8
	.asciz	"HPD"

	.comm	_SRBM_STATUS,8,3                ## @SRBM_STATUS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si_irq_set                     ; -- Begin function si_irq_set
	.p2align	2
_si_irq_set:                            ; @si_irq_set
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0, #48]
	cbz	w8, LBB0_6
; %bb.1:
	mov	x19, x0
	ldr	w8, [x0, #56]
	cbz	w8, LBB0_7
; %bb.2:
Lloh0:
	adrp	x8, _CP_INT_CNTL_RING0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CP_INT_CNTL_RING0@GOTPAGEOFF]
Lloh2:
	ldr	x0, [x8]
	bl	_RREG32
Lloh3:
	adrp	x8, _CNTX_BUSY_INT_ENABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CNTX_BUSY_INT_ENABLE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _CNTX_EMPTY_INT_ENABLE@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CNTX_EMPTY_INT_ENABLE@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh9:
	adrp	x20, _DMA_CNTL@GOTPAGE
Lloh10:
	ldr	x20, [x20, _DMA_CNTL@GOTPAGEOFF]
	and	w21, w8, w0
	ldr	x8, [x20]
Lloh11:
	adrp	x9, _DMA0_REGISTER_OFFSET@GOTPAGE
Lloh12:
	ldr	x9, [x9, _DMA0_REGISTER_OFFSET@GOTPAGEOFF]
Lloh13:
	ldr	x9, [x9]
	add	x0, x9, x8
	bl	_RREG32
	mov	x23, x0
Lloh14:
	adrp	x24, _TRAP_ENABLE@GOTPAGE
Lloh15:
	ldr	x24, [x24, _TRAP_ENABLE@GOTPAGEOFF]
	ldr	w26, [x24]
	ldr	x8, [x20]
Lloh16:
	adrp	x9, _DMA1_REGISTER_OFFSET@GOTPAGE
Lloh17:
	ldr	x9, [x9, _DMA1_REGISTER_OFFSET@GOTPAGEOFF]
Lloh18:
	ldr	x9, [x9]
	add	x0, x9, x8
	bl	_RREG32
	mov	x22, x0
	ldr	w28, [x24]
Lloh19:
	adrp	x8, _CG_THERMAL_INT@GOTPAGE
Lloh20:
	ldr	x8, [x8, _CG_THERMAL_INT@GOTPAGEOFF]
Lloh21:
	ldr	x0, [x8]
	bl	_RREG32
	str	w0, [sp, #12]                   ; 4-byte Folded Spill
Lloh22:
	adrp	x8, _THERM_INT_MASK_HIGH@GOTPAGE
Lloh23:
	ldr	x8, [x8, _THERM_INT_MASK_HIGH@GOTPAGEOFF]
Lloh24:
	ldr	w27, [x8]
Lloh25:
	adrp	x8, _THERM_INT_MASK_LOW@GOTPAGE
Lloh26:
	ldr	x8, [x8, _THERM_INT_MASK_LOW@GOTPAGEOFF]
Lloh27:
	ldr	w20, [x8]
	ldr	x8, [x19, #40]
Lloh28:
	adrp	x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh29:
	ldr	x9, [x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh30:
	ldr	x9, [x9]
	add	x0, x8, x9, lsl #2
	bl	_atomic_read
Lloh31:
	adrp	x25, _TIME_STAMP_INT_ENABLE@GOTPAGE
Lloh32:
	ldr	x25, [x25, _TIME_STAMP_INT_ENABLE@GOTPAGEOFF]
	cbz	x0, LBB0_4
; %bb.3:
Lloh33:
	adrp	x0, l_.str.1@PAGE
Lloh34:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x25]
	orr	w21, w8, w21
LBB0_4:
	ldr	x8, [x19, #40]
Lloh35:
	adrp	x9, _CAYMAN_RING_TYPE_CP1_INDEX@GOTPAGE
Lloh36:
	ldr	x9, [x9, _CAYMAN_RING_TYPE_CP1_INDEX@GOTPAGEOFF]
Lloh37:
	ldr	x9, [x9]
	add	x0, x8, x9, lsl #2
	bl	_atomic_read
	cbz	x0, LBB0_8
; %bb.5:
Lloh38:
	adrp	x0, l_.str.2@PAGE
Lloh39:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w24, [x25]
	b	LBB0_9
LBB0_6:
Lloh40:
	adrp	x1, l_.str@PAGE
Lloh41:
	add	x1, x1, l_.str@PAGEOFF
	mov	w0, #1
	bl	_WARN
Lloh42:
	adrp	x8, _EINVAL@GOTPAGE
Lloh43:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh44:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_32
LBB0_7:
	mov	x0, x19
	bl	_si_disable_interrupts
	mov	x0, x19
	bl	_si_disable_interrupt_state
	b	LBB0_31
LBB0_8:
	mov	w24, #0
LBB0_9:
	ldr	x8, [x19, #40]
Lloh45:
	adrp	x9, _CAYMAN_RING_TYPE_CP2_INDEX@GOTPAGE
Lloh46:
	ldr	x9, [x9, _CAYMAN_RING_TYPE_CP2_INDEX@GOTPAGEOFF]
Lloh47:
	ldr	x9, [x9]
	add	x0, x8, x9, lsl #2
	bl	_atomic_read
	cbz	x0, LBB0_11
; %bb.10:
Lloh48:
	adrp	x0, l_.str.3@PAGE
Lloh49:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w25, [x25]
	b	LBB0_12
LBB0_11:
	mov	w25, #0
LBB0_12:
	bic	w23, w23, w26
	ldr	x8, [x19, #40]
Lloh50:
	adrp	x9, _R600_RING_TYPE_DMA_INDEX@GOTPAGE
Lloh51:
	ldr	x9, [x9, _R600_RING_TYPE_DMA_INDEX@GOTPAGEOFF]
Lloh52:
	ldr	x9, [x9]
	add	x0, x8, x9, lsl #2
	bl	_atomic_read
	cbz	x0, LBB0_14
; %bb.13:
Lloh53:
	adrp	x0, l_.str.4@PAGE
Lloh54:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_DRM_DEBUG
Lloh55:
	adrp	x26, _TRAP_ENABLE@GOTPAGE
Lloh56:
	ldr	x26, [x26, _TRAP_ENABLE@GOTPAGEOFF]
	ldr	w8, [x26]
	orr	w23, w8, w23
	b	LBB0_15
LBB0_14:
Lloh57:
	adrp	x26, _TRAP_ENABLE@GOTPAGE
Lloh58:
	ldr	x26, [x26, _TRAP_ENABLE@GOTPAGEOFF]
LBB0_15:
	orr	w20, w20, w27
	bic	w22, w22, w28
	ldr	x8, [x19, #40]
Lloh59:
	adrp	x9, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGE
Lloh60:
	ldr	x9, [x9, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGEOFF]
Lloh61:
	ldr	x9, [x9]
	add	x0, x8, x9, lsl #2
	bl	_atomic_read
	cbz	x0, LBB0_17
; %bb.16:
Lloh62:
	adrp	x0, l_.str.5@PAGE
Lloh63:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x26]
	orr	w22, w8, w22
LBB0_17:
	ldr	w8, [sp, #12]                   ; 4-byte Folded Reload
	bic	w26, w8, w20
Lloh64:
	adrp	x8, _CP_INT_CNTL_RING0@GOTPAGE
Lloh65:
	ldr	x8, [x8, _CP_INT_CNTL_RING0@GOTPAGEOFF]
Lloh66:
	ldr	x0, [x8]
	mov	x1, x21
	bl	_WREG32
Lloh67:
	adrp	x8, _CP_INT_CNTL_RING1@GOTPAGE
Lloh68:
	ldr	x8, [x8, _CP_INT_CNTL_RING1@GOTPAGEOFF]
Lloh69:
	ldr	x0, [x8]
	mov	x1, x24
	bl	_WREG32
Lloh70:
	adrp	x8, _CP_INT_CNTL_RING2@GOTPAGE
Lloh71:
	ldr	x8, [x8, _CP_INT_CNTL_RING2@GOTPAGEOFF]
Lloh72:
	ldr	x0, [x8]
	mov	x1, x25
	bl	_WREG32
Lloh73:
	adrp	x20, _DMA_CNTL@GOTPAGE
Lloh74:
	ldr	x20, [x20, _DMA_CNTL@GOTPAGEOFF]
	ldr	x8, [x20]
Lloh75:
	adrp	x9, _DMA0_REGISTER_OFFSET@GOTPAGE
Lloh76:
	ldr	x9, [x9, _DMA0_REGISTER_OFFSET@GOTPAGEOFF]
Lloh77:
	ldr	x9, [x9]
	add	x0, x9, x8
	mov	x1, x23
	bl	_WREG32
	ldr	x8, [x20]
Lloh78:
	adrp	x9, _DMA1_REGISTER_OFFSET@GOTPAGE
Lloh79:
	ldr	x9, [x9, _DMA1_REGISTER_OFFSET@GOTPAGEOFF]
Lloh80:
	ldr	x9, [x9]
	add	x0, x9, x8
	mov	x1, x22
	bl	_WREG32
Lloh81:
	adrp	x8, _GRBM_INT_CNTL@GOTPAGE
Lloh82:
	ldr	x8, [x8, _GRBM_INT_CNTL@GOTPAGEOFF]
Lloh83:
	ldr	x0, [x8]
	mov	w1, #0
	bl	_WREG32
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_19
; %bb.18:
Lloh84:
	adrp	x0, l_.str.6@PAGE
Lloh85:
	add	x0, x0, l_.str.6@PAGEOFF
	bl	_DRM_DEBUG
Lloh86:
	adrp	x8, _THERM_INT_MASK_HIGH@GOTPAGE
Lloh87:
	ldr	x8, [x8, _THERM_INT_MASK_HIGH@GOTPAGEOFF]
Lloh88:
	ldr	w8, [x8]
Lloh89:
	adrp	x9, _THERM_INT_MASK_LOW@GOTPAGE
Lloh90:
	ldr	x9, [x9, _THERM_INT_MASK_LOW@GOTPAGEOFF]
Lloh91:
	ldr	w9, [x9]
	orr	w8, w8, w26
	orr	w26, w8, w9
LBB0_19:
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_28
; %bb.20:
	str	w26, [sp, #12]                  ; 4-byte Folded Spill
	mov	x25, #0
	mov	x21, #0
Lloh92:
	adrp	x26, _INT_MASK@GOTPAGE
Lloh93:
	ldr	x26, [x26, _INT_MASK@GOTPAGEOFF]
Lloh94:
	adrp	x24, _crtc_offsets@GOTPAGE
Lloh95:
	ldr	x24, [x24, _crtc_offsets@GOTPAGEOFF]
Lloh96:
	adrp	x27, _VBLANK_INT_MASK@GOTPAGE
Lloh97:
	ldr	x27, [x27, _VBLANK_INT_MASK@GOTPAGEOFF]
Lloh98:
	adrp	x22, l_.str.7@PAGE
Lloh99:
	add	x22, x22, l_.str.7@PAGEOFF
	b	LBB0_23
LBB0_21:                                ;   in Loop: Header=BB0_23 Depth=1
	ldr	x8, [x19, #16]
	add	x0, x8, x25
	bl	_atomic_read
	cmp	x0, #0
	cset	w3, ne
LBB0_22:                                ;   in Loop: Header=BB0_23 Depth=1
	add	x1, x20, x28
	mov	x0, x19
	mov	x2, x23
	mov	x4, x22
	mov	x5, x21
	bl	_radeon_irq_kms_set_irq_n_enabled
	add	x21, x21, #1
	ldrsw	x8, [x19]
	add	x25, x25, #4
	cmp	x21, x8
	b.ge	LBB0_25
LBB0_23:                                ; =>This Inner Loop Header: Depth=1
	ldr	x28, [x26]
	ldr	x8, [x24]
	lsl	x9, x21, #3
	ldr	x20, [x8, x9]
	ldr	w23, [x27]
	ldr	x8, [x19, #24]
	ldr	x8, [x8, x9]
	cbz	x8, LBB0_21
; %bb.24:                               ;   in Loop: Header=BB0_23 Depth=1
	mov	w3, #1
	b	LBB0_22
LBB0_25:
	cmp	w8, #1
	ldr	w26, [sp, #12]                  ; 4-byte Folded Reload
	b.lt	LBB0_28
; %bb.26:
	mov	x21, #0
Lloh100:
	adrp	x20, _GRPH_INT_CONTROL@GOTPAGE
Lloh101:
	ldr	x20, [x20, _GRPH_INT_CONTROL@GOTPAGEOFF]
Lloh102:
	adrp	x22, _GRPH_PFLIP_INT_MASK@GOTPAGE
Lloh103:
	ldr	x22, [x22, _GRPH_PFLIP_INT_MASK@GOTPAGEOFF]
LBB0_27:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x20]
	ldr	x9, [x24]
	ldr	x9, [x9, x21, lsl #3]
	add	x0, x9, x8
	ldr	w1, [x22]
	bl	_WREG32
	add	x21, x21, #1
	ldrsw	x8, [x19]
	cmp	x21, x8
	b.lt	LBB0_27
LBB0_28:
	mov	x0, x19
	bl	_ASIC_IS_NODCE
	cbnz	w0, LBB0_30
; %bb.29:
	bl	_DC_HPDx_INT_CONTROL
	mov	x1, x0
Lloh104:
	adrp	x22, _DC_HPDx_INT_EN@GOTPAGE
Lloh105:
	ldr	x22, [x22, _DC_HPDx_INT_EN@GOTPAGEOFF]
	ldr	w8, [x22]
Lloh106:
	adrp	x23, _DC_HPDx_RX_INT_EN@GOTPAGE
Lloh107:
	ldr	x23, [x23, _DC_HPDx_RX_INT_EN@GOTPAGEOFF]
	ldr	w9, [x23]
	orr	w2, w9, w8
	ldr	x8, [x19, #8]
	ldr	w3, [x8]
Lloh108:
	adrp	x21, l_.str.8@PAGE
Lloh109:
	add	x21, x21, l_.str.8@PAGEOFF
	mov	x0, x19
	mov	x4, x21
	mov	w5, #0
	bl	_radeon_irq_kms_set_irq_n_enabled
	mov	w0, #1
	bl	_DC_HPDx_INT_CONTROL
	mov	x1, x0
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w2, w9, w8
	ldr	x8, [x19, #8]
	ldr	w3, [x8, #4]
	mov	x0, x19
	mov	x4, x21
	mov	w5, #1
	bl	_radeon_irq_kms_set_irq_n_enabled
	mov	w0, #2
	bl	_DC_HPDx_INT_CONTROL
	mov	x1, x0
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w2, w9, w8
	ldr	x8, [x19, #8]
	ldr	w3, [x8, #8]
	mov	x0, x19
	mov	x4, x21
	mov	w5, #2
	bl	_radeon_irq_kms_set_irq_n_enabled
	mov	w0, #3
	bl	_DC_HPDx_INT_CONTROL
	mov	x1, x0
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w2, w9, w8
	ldr	x8, [x19, #8]
	ldr	w3, [x8, #12]
	mov	x0, x19
	mov	x4, x21
	mov	w5, #3
	bl	_radeon_irq_kms_set_irq_n_enabled
	mov	w0, #4
	bl	_DC_HPDx_INT_CONTROL
	mov	x1, x0
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w2, w9, w8
	ldr	x8, [x19, #8]
	ldr	w3, [x8, #16]
	mov	x0, x19
	mov	x4, x21
	mov	w5, #4
	bl	_radeon_irq_kms_set_irq_n_enabled
	mov	w0, #5
	bl	_DC_HPDx_INT_CONTROL
	mov	x1, x0
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w2, w9, w8
	ldr	x8, [x19, #8]
	ldr	w3, [x8, #20]
	mov	x0, x19
	mov	x4, x21
	mov	w5, #5
	bl	_radeon_irq_kms_set_irq_n_enabled
LBB0_30:
Lloh110:
	adrp	x8, _CG_THERMAL_INT@GOTPAGE
Lloh111:
	ldr	x8, [x8, _CG_THERMAL_INT@GOTPAGEOFF]
Lloh112:
	ldr	x0, [x8]
	mov	x1, x26
	bl	_WREG32
Lloh113:
	adrp	x8, _SRBM_STATUS@GOTPAGE
Lloh114:
	ldr	x8, [x8, _SRBM_STATUS@GOTPAGEOFF]
Lloh115:
	ldr	x0, [x8]
	bl	_RREG32
LBB0_31:
	mov	w0, #0
LBB0_32:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpAdd	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpAdd	Lloh53, Lloh54
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGot	Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpAdd	Lloh84, Lloh85
	.loh AdrpAdd	Lloh98, Lloh99
	.loh AdrpLdrGot	Lloh96, Lloh97
	.loh AdrpLdrGot	Lloh94, Lloh95
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGot	Lloh102, Lloh103
	.loh AdrpLdrGot	Lloh100, Lloh101
	.loh AdrpAdd	Lloh108, Lloh109
	.loh AdrpLdrGot	Lloh106, Lloh107
	.loh AdrpLdrGot	Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh110, Lloh111, Lloh112
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Can't enable IRQ/MSI because no handler is installed\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_CP_INT_CNTL_RING0,8,3          ; @CP_INT_CNTL_RING0
	.comm	_CNTX_BUSY_INT_ENABLE,4,2       ; @CNTX_BUSY_INT_ENABLE
	.comm	_CNTX_EMPTY_INT_ENABLE,4,2      ; @CNTX_EMPTY_INT_ENABLE
	.comm	_DMA_CNTL,8,3                   ; @DMA_CNTL
	.comm	_DMA0_REGISTER_OFFSET,8,3       ; @DMA0_REGISTER_OFFSET
	.comm	_TRAP_ENABLE,4,2                ; @TRAP_ENABLE
	.comm	_DMA1_REGISTER_OFFSET,8,3       ; @DMA1_REGISTER_OFFSET
	.comm	_CG_THERMAL_INT,8,3             ; @CG_THERMAL_INT
	.comm	_THERM_INT_MASK_HIGH,4,2        ; @THERM_INT_MASK_HIGH
	.comm	_THERM_INT_MASK_LOW,4,2         ; @THERM_INT_MASK_LOW
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
l_.str.1:                               ; @.str.1
	.asciz	"si_irq_set: sw int gfx\n"

	.comm	_TIME_STAMP_INT_ENABLE,4,2      ; @TIME_STAMP_INT_ENABLE
	.comm	_CAYMAN_RING_TYPE_CP1_INDEX,8,3 ; @CAYMAN_RING_TYPE_CP1_INDEX
l_.str.2:                               ; @.str.2
	.asciz	"si_irq_set: sw int cp1\n"

	.comm	_CAYMAN_RING_TYPE_CP2_INDEX,8,3 ; @CAYMAN_RING_TYPE_CP2_INDEX
l_.str.3:                               ; @.str.3
	.asciz	"si_irq_set: sw int cp2\n"

	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ; @R600_RING_TYPE_DMA_INDEX
l_.str.4:                               ; @.str.4
	.asciz	"si_irq_set: sw int dma\n"

	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ; @CAYMAN_RING_TYPE_DMA1_INDEX
l_.str.5:                               ; @.str.5
	.asciz	"si_irq_set: sw int dma1\n"

	.comm	_CP_INT_CNTL_RING1,8,3          ; @CP_INT_CNTL_RING1
	.comm	_CP_INT_CNTL_RING2,8,3          ; @CP_INT_CNTL_RING2
	.comm	_GRBM_INT_CNTL,8,3              ; @GRBM_INT_CNTL
l_.str.6:                               ; @.str.6
	.asciz	"dpm thermal\n"

	.comm	_INT_MASK,8,3                   ; @INT_MASK
	.comm	_crtc_offsets,8,3               ; @crtc_offsets
	.comm	_VBLANK_INT_MASK,4,2            ; @VBLANK_INT_MASK
l_.str.7:                               ; @.str.7
	.asciz	"vblank"

	.comm	_GRPH_INT_CONTROL,8,3           ; @GRPH_INT_CONTROL
	.comm	_GRPH_PFLIP_INT_MASK,4,2        ; @GRPH_PFLIP_INT_MASK
	.comm	_DC_HPDx_INT_EN,4,2             ; @DC_HPDx_INT_EN
	.comm	_DC_HPDx_RX_INT_EN,4,2          ; @DC_HPDx_RX_INT_EN
l_.str.8:                               ; @.str.8
	.asciz	"HPD"

	.comm	_SRBM_STATUS,8,3                ; @SRBM_STATUS
.subsections_via_symbols
