	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_ib_pool_init            ## -- Begin function radeon_ib_pool_init
	.p2align	4, 0x90
_radeon_ib_pool_init:                   ## @radeon_ib_pool_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	xorl	%ebx, %ebx
	cmpl	$0, (%rdi)
	jne	LBB0_7
## %bb.1:
	movq	%rdi, %r15
	movq	8(%rdi), %rax
	movq	_CHIP_BONAIRE@GOTPCREL(%rip), %rsi
	leaq	20(%rdi), %r14
	movq	_RADEON_IB_POOL_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	shll	$16, %edx
	xorl	%r9d, %r9d
	movq	_RADEON_GPU_PAGE_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	_RADEON_GEM_DOMAIN_GTT@GOTPCREL(%rip), %rdi
	movl	(%rdi), %r8d
	cmpq	(%rsi), %rax
	jl	LBB0_3
## %bb.2:
	movq	_RADEON_GEM_GTT_WC@GOTPCREL(%rip), %rax
	movl	(%rax), %r9d
LBB0_3:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_radeon_sa_bo_manager_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_7
## %bb.4:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_radeon_sa_bo_manager_start
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_7
## %bb.5:
	movl	$1, (%r15)
	movq	%r15, %rdi
	callq	_radeon_debugfs_sa_init
	xorl	%ebx, %ebx
	testq	%rax, %rax
	je	LBB0_7
## %bb.6:
	movl	16(%r15), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_err
LBB0_7:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_BONAIRE,8,3               ## @CHIP_BONAIRE
	.comm	_RADEON_IB_POOL_SIZE,4,2        ## @RADEON_IB_POOL_SIZE
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ## @RADEON_GPU_PAGE_SIZE
	.comm	_RADEON_GEM_DOMAIN_GTT,4,2      ## @RADEON_GEM_DOMAIN_GTT
	.comm	_RADEON_GEM_GTT_WC,4,2          ## @RADEON_GEM_GTT_WC
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to register debugfs file for SA\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_ib_pool_init            ; -- Begin function radeon_ib_pool_init
	.p2align	2
_radeon_ib_pool_init:                   ; @radeon_ib_pool_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	w8, [x0]
	cbz	w8, LBB0_2
LBB0_1:
	mov	w0, #0
	b	LBB0_4
LBB0_2:
	mov	x19, x0
Lloh0:
	adrp	x8, _CHIP_BONAIRE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CHIP_BONAIRE@GOTPAGEOFF]
	ldr	x9, [x0, #8]
Lloh2:
	ldr	x8, [x8]
	add	x20, x0, #20
Lloh3:
	adrp	x10, _RADEON_IB_POOL_SIZE@GOTPAGE
Lloh4:
	ldr	x10, [x10, _RADEON_IB_POOL_SIZE@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	lsl	w2, w10, #16
Lloh6:
	adrp	x10, _RADEON_GPU_PAGE_SIZE@GOTPAGE
Lloh7:
	ldr	x10, [x10, _RADEON_GPU_PAGE_SIZE@GOTPAGEOFF]
Lloh8:
	ldr	w3, [x10]
Lloh9:
	adrp	x10, _RADEON_GEM_DOMAIN_GTT@GOTPAGE
Lloh10:
	ldr	x10, [x10, _RADEON_GEM_DOMAIN_GTT@GOTPAGEOFF]
Lloh11:
	ldr	w4, [x10]
Lloh12:
	adrp	x10, _RADEON_GEM_GTT_WC@GOTPAGE
Lloh13:
	ldr	x10, [x10, _RADEON_GEM_GTT_WC@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
	cmp	x9, x8
	csel	w5, wzr, w10, lt
	mov	x1, x20
	bl	_radeon_sa_bo_manager_init
	cbnz	w0, LBB0_4
; %bb.3:
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_sa_bo_manager_start
	cbz	w0, LBB0_5
LBB0_4:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_5:
	mov	w8, #1
	str	w8, [x19]
	mov	x0, x19
	bl	_radeon_debugfs_sa_init
	cbz	x0, LBB0_4
; %bb.6:
	ldr	w0, [x19, #16]
Lloh15:
	adrp	x1, l_.str@PAGE
Lloh16:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
	b	LBB0_1
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_BONAIRE,8,3               ; @CHIP_BONAIRE
	.comm	_RADEON_IB_POOL_SIZE,4,2        ; @RADEON_IB_POOL_SIZE
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ; @RADEON_GPU_PAGE_SIZE
	.comm	_RADEON_GEM_DOMAIN_GTT,4,2      ; @RADEON_GEM_DOMAIN_GTT
	.comm	_RADEON_GEM_GTT_WC,4,2          ; @RADEON_GEM_GTT_WC
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to register debugfs file for SA\n"

.subsections_via_symbols
