	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v9_0_ras_error_inject
_gfx_v9_0_ras_error_inject:             ## @gfx_v9_0_ras_error_inject
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$32, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	$0, -36(%rbp)
	movq	(%rdi), %rax
	movq	_CHIP_VEGA20@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_1
## %bb.3:
	movq	%rsi, %r12
	movq	%rdi, %r14
	movq	8(%rsi), %rbx
	movq	_ras_gfx_subblocks@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	callq	_ARRAY_SIZE
	cmpq	%rax, %rbx
	jae	LBB0_1
## %bb.4:
	movq	(%r15), %rax
	movq	8(%r12), %rcx
	shlq	$4, %rcx
	movl	12(%rax,%rcx), %esi
	testl	%esi, %esi
	je	LBB0_5
## %bb.6:
	movl	16(%r12), %edx
	testl	%edx, (%rax,%rcx)
	je	LBB0_7
## %bb.9:
	testl	%edx, 4(%rax,%rcx)
	je	LBB0_10
## %bb.11:
	movl	20(%r12), %edi
	callq	_amdgpu_ras_block_to_ta
	movl	%eax, -40(%rbp)
	movq	(%r15), %rax
	movq	8(%r12), %rcx
	shlq	$4, %rcx
	movl	8(%rax,%rcx), %eax
	movl	%eax, -44(%rbp)
	movl	16(%r12), %edi
	callq	_amdgpu_ras_error_to_ta
	movl	%eax, -48(%rbp)
	movl	4(%r12), %eax
	movl	%eax, -52(%rbp)
	movl	(%r12), %eax
	movl	%eax, -56(%rbp)
	leaq	8(%r14), %r15
	movq	%r15, %rdi
	callq	_mutex_lock
	addq	$12, %r14
	leaq	-56(%rbp), %rsi
	movq	%r14, %rdi
	callq	_psp_ras_trigger_error
	movl	%eax, %ebx
	movq	%r15, %rdi
	callq	_mutex_unlock
	jmp	LBB0_12
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_2:
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_12:
	movl	%ebx, %eax
	addq	$32, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	movq	_EPERM@GOTPCREL(%rip), %rax
	jmp	LBB0_2
LBB0_7:
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_8
LBB0_10:
	leaq	L_.str.1(%rip), %rdi
LBB0_8:
	callq	_DRM_ERROR
	movq	_EPERM@GOTPCREL(%rip), %rax
	jmp	LBB0_2
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_VEGA20,8,3                ## @CHIP_VEGA20
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_ras_gfx_subblocks,8,3          ## @ras_gfx_subblocks
	.comm	_EPERM,4,2                      ## @EPERM
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"GFX Subblock %s, hardware do not support type 0x%x\n"

L_.str.1:                               ## @.str.1
	.asciz	"GFX Subblock %s, driver do not support type 0x%x\n"

	.no_dead_strip	_gfx_v9_0_ras_error_inject
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v9_0_ras_error_inject
_gfx_v9_0_ras_error_inject:             ; @gfx_v9_0_ras_error_inject
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	str	wzr, [sp, #28]
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _CHIP_VEGA20@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_VEGA20@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_6
; %bb.1:
	mov	x20, x1
	mov	x19, x0
	ldr	x22, [x1, #8]
Lloh3:
	adrp	x21, _ras_gfx_subblocks@GOTPAGE
Lloh4:
	ldr	x21, [x21, _ras_gfx_subblocks@GOTPAGEOFF]
	ldr	x0, [x21]
	bl	_ARRAY_SIZE
	cmp	x22, x0
	b.hs	LBB0_6
; %bb.2:
	ldr	x8, [x21]
	ldr	x9, [x20, #8]
	add	x10, x8, x9, lsl #4
	ldr	w1, [x10, #12]
	cbz	w1, LBB0_12
; %bb.3:
	lsl	x10, x9, #4
	ldr	w10, [x8, x10]
	ldr	w2, [x20, #16]
	tst	w2, w10
	b.eq	LBB0_9
; %bb.4:
	add	x8, x8, x9, lsl #4
	ldr	w8, [x8, #4]
	tst	w8, w2
	b.eq	LBB0_10
; %bb.5:
	ldr	w0, [x20, #20]
	bl	_amdgpu_ras_block_to_ta
	str	w0, [sp, #24]
	ldr	x8, [x21]
	ldr	x9, [x20, #8]
	add	x8, x8, x9, lsl #4
	ldr	w8, [x8, #8]
	str	w8, [sp, #20]
	ldr	w0, [x20, #16]
	bl	_amdgpu_ras_error_to_ta
	str	w0, [sp, #16]
	ldr	d0, [x20]
	str	d0, [sp, #8]
	add	x20, x19, #8
	mov	x0, x20
	bl	_mutex_lock
	add	x0, x19, #12
	add	x1, sp, #8
	bl	_psp_ras_trigger_error
	mov	x19, x0
	mov	x0, x20
	bl	_mutex_unlock
	b	LBB0_8
LBB0_6:
Lloh5:
	adrp	x8, _EINVAL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
LBB0_7:
	ldr	w8, [x8]
	neg	w19, w8
LBB0_8:
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_9:
Lloh7:
	adrp	x0, l_.str@PAGE
Lloh8:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_11
LBB0_10:
Lloh9:
	adrp	x0, l_.str.1@PAGE
Lloh10:
	add	x0, x0, l_.str.1@PAGEOFF
LBB0_11:
	bl	_DRM_ERROR
LBB0_12:
Lloh11:
	adrp	x8, _EPERM@GOTPAGE
Lloh12:
	ldr	x8, [x8, _EPERM@GOTPAGEOFF]
	b	LBB0_7
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_VEGA20,8,3                ; @CHIP_VEGA20
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_ras_gfx_subblocks,8,3          ; @ras_gfx_subblocks
	.comm	_EPERM,4,2                      ; @EPERM
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"GFX Subblock %s, hardware do not support type 0x%x\n"

l_.str.1:                               ; @.str.1
	.asciz	"GFX Subblock %s, driver do not support type 0x%x\n"

	.no_dead_strip	_gfx_v9_0_ras_error_inject
.subsections_via_symbols
