	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function gfx_v9_0_gpu_early_init
LCPI0_0:
	.long	8                               ## 0x8
	.long	32                              ## 0x20
	.long	256                             ## 0x100
	.long	128                             ## 0x80
LCPI0_1:
	.long	8                               ## 0x8
	.long	32                              ## 0x20
	.long	256                             ## 0x100
	.long	48                              ## 0x30
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_gfx_v9_0_gpu_early_init:               ## @gfx_v9_0_gpu_early_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_gfx_v9_0_gfx_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 64(%rdi)
	movl	(%rdi), %eax
	addl	$-128, %eax
	cmpl	$5, %eax
	ja	LBB0_10
## %bb.1:
	movq	%rdi, %rbx
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_3:
	movaps	LCPI0_1(%rip), %xmm0            ## xmm0 = [8,32,256,48]
	movups	%xmm0, 8(%rbx)
	movl	$1216, 24(%rbx)                 ## imm = 0x4C0
	movq	_GC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmGB_ADDR_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movl	%eax, %r14d
	movq	%rbx, %rdi
	callq	_amdgpu_atomfirmware_get_gfx_info
	testl	%eax, %eax
	jne	LBB0_14
	jmp	LBB0_4
LBB0_5:
	movaps	LCPI0_1(%rip), %xmm0            ## xmm0 = [8,32,256,48]
	movups	%xmm0, 8(%rbx)
	movl	$1216, 24(%rbx)                 ## imm = 0x4C0
	cmpl	$8, 4(%rbx)
	jl	LBB0_7
## %bb.6:
	movq	_RAVEN2_GB_ADDR_CONFIG_GOLDEN@GOTPCREL(%rip), %rax
	jmp	LBB0_12
LBB0_11:
	movaps	LCPI0_1(%rip), %xmm0            ## xmm0 = [8,32,256,48]
	movups	%xmm0, 8(%rbx)
	movl	$1216, 24(%rbx)                 ## imm = 0x4C0
	movq	_VEGA10_GB_ADDR_CONFIG_GOLDEN@GOTPCREL(%rip), %rax
	jmp	LBB0_12
LBB0_2:
	movaps	LCPI0_1(%rip), %xmm0            ## xmm0 = [8,32,256,48]
	movups	%xmm0, 8(%rbx)
	movl	$1216, 24(%rbx)                 ## imm = 0x4C0
	movq	_VEGA12_GB_ADDR_CONFIG_GOLDEN@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	leaq	L_.str(%rip), %rdi
	callq	_DRM_INFO
	jmp	LBB0_13
LBB0_9:
	movaps	LCPI0_0(%rip), %xmm0            ## xmm0 = [8,32,256,128]
	movups	%xmm0, 8(%rbx)
	movl	$1216, 24(%rbx)                 ## imm = 0x4C0
	movq	_GC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmGB_ADDR_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movl	%eax, %r14d
	andl	$202934272, %r14d               ## imm = 0xC188800
	orl	$570490946, %r14d               ## imm = 0x22010042
	jmp	LBB0_13
LBB0_8:
	movaps	LCPI0_1(%rip), %xmm0            ## xmm0 = [8,32,256,48]
	movups	%xmm0, 8(%rbx)
	movl	$1216, 24(%rbx)                 ## imm = 0x4C0
	movq	_GC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmGB_ADDR_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movl	%eax, %r14d
LBB0_4:
	andl	$202934272, %r14d               ## imm = 0xC188800
	orl	$570507330, %r14d               ## imm = 0x22014042
	jmp	LBB0_13
LBB0_7:
	movq	_RAVEN_GB_ADDR_CONFIG_GOLDEN@GOTPCREL(%rip), %rax
LBB0_12:
	movl	(%rax), %r14d
LBB0_13:
	movl	%r14d, 28(%rbx)
	movq	_GB_ADDR_CONFIG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_NUM_PIPES@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r14d, %edi
	callq	_REG_GET_FIELD
	movl	$1, %edx
	movl	%eax, %ecx
	shll	%cl, %edx
	movl	$1, %r14d
	movl	%edx, 36(%rbx)
	movl	%edx, 32(%rbx)
	movl	28(%rbx), %edi
	movl	(%r15), %esi
	movq	_NUM_BANKS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_REG_GET_FIELD
	movl	$1, %edx
	movl	%eax, %ecx
	shll	%cl, %edx
	movl	%edx, 40(%rbx)
	movl	28(%rbx), %edi
	movl	(%r15), %esi
	movq	_MAX_COMPRESSED_FRAGS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_REG_GET_FIELD
	movl	$1, %edx
	movl	%eax, %ecx
	shll	%cl, %edx
	movl	%edx, 44(%rbx)
	movl	28(%rbx), %edi
	movl	(%r15), %esi
	movq	_NUM_RB_PER_SE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_REG_GET_FIELD
	movl	$1, %edx
	movl	%eax, %ecx
	shll	%cl, %edx
	movl	%edx, 48(%rbx)
	movl	28(%rbx), %edi
	movl	(%r15), %esi
	movq	_NUM_SHADER_ENGINES@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_REG_GET_FIELD
	movl	$1, %edx
	movl	%eax, %ecx
	shll	%cl, %edx
	movl	%edx, 52(%rbx)
	movl	28(%rbx), %edi
	movl	(%r15), %esi
	movq	_PIPE_INTERLEAVE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_REG_GET_FIELD
                                        ## kill: def $eax killed $eax def $rax
	leal	8(%rax), %ecx
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %r14d
	movl	%r14d, 56(%rbx)
	xorl	%eax, %eax
LBB0_14:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	xorl	%eax, %eax
	callq	_BUG
	ud2
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
LJTI0_0:
	.long	L0_0_set_3
	.long	L0_0_set_2
	.long	L0_0_set_11
	.long	L0_0_set_9
	.long	L0_0_set_5
	.long	L0_0_set_8
	.end_data_region
                                        ## -- End function
	.comm	_gfx_v9_0_gfx_funcs,4,2         ## @gfx_v9_0_gfx_funcs
	.comm	_VEGA10_GB_ADDR_CONFIG_GOLDEN,4,2 ## @VEGA10_GB_ADDR_CONFIG_GOLDEN
	.comm	_VEGA12_GB_ADDR_CONFIG_GOLDEN,4,2 ## @VEGA12_GB_ADDR_CONFIG_GOLDEN
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"fix gfx.config for vega12\n"

	.comm	_GC,4,2                         ## @GC
	.comm	_mmGB_ADDR_CONFIG,4,2           ## @mmGB_ADDR_CONFIG
	.comm	_RAVEN2_GB_ADDR_CONFIG_GOLDEN,4,2 ## @RAVEN2_GB_ADDR_CONFIG_GOLDEN
	.comm	_RAVEN_GB_ADDR_CONFIG_GOLDEN,4,2 ## @RAVEN_GB_ADDR_CONFIG_GOLDEN
	.comm	_GB_ADDR_CONFIG,4,2             ## @GB_ADDR_CONFIG
	.comm	_NUM_PIPES,4,2                  ## @NUM_PIPES
	.comm	_NUM_BANKS,4,2                  ## @NUM_BANKS
	.comm	_MAX_COMPRESSED_FRAGS,4,2       ## @MAX_COMPRESSED_FRAGS
	.comm	_NUM_RB_PER_SE,4,2              ## @NUM_RB_PER_SE
	.comm	_NUM_SHADER_ENGINES,4,2         ## @NUM_SHADER_ENGINES
	.comm	_PIPE_INTERLEAVE_SIZE,4,2       ## @PIPE_INTERLEAVE_SIZE
	.no_dead_strip	_gfx_v9_0_gpu_early_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ; -- Begin function gfx_v9_0_gpu_early_init
lCPI0_0:
	.long	8                               ; 0x8
	.long	32                              ; 0x20
	.long	256                             ; 0x100
	.long	128                             ; 0x80
lCPI0_1:
	.long	8                               ; 0x8
	.long	32                              ; 0x20
	.long	256                             ; 0x100
	.long	48                              ; 0x30
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_gfx_v9_0_gpu_early_init:               ; @gfx_v9_0_gpu_early_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
Lloh0:
	adrp	x8, _gfx_v9_0_gfx_funcs@GOTPAGE
Lloh1:
	ldr	x8, [x8, _gfx_v9_0_gfx_funcs@GOTPAGEOFF]
	str	x8, [x0, #64]
	ldr	w8, [x0]
	sub	w8, w8, #128
	cmp	w8, #5
	b.hi	LBB0_15
; %bb.1:
	mov	x19, x0
Lloh2:
	adrp	x9, lJTI0_0@PAGE
Lloh3:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
Lloh4:
	adrp	x8, lCPI0_1@PAGE
Lloh5:
	ldr	q0, [x8, lCPI0_1@PAGEOFF]
	stur	q0, [x19, #8]
	mov	w8, #1216
	str	w8, [x19, #24]
Lloh6:
	adrp	x8, _GC@GOTPAGE
Lloh7:
	ldr	x8, [x8, _GC@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
Lloh9:
	adrp	x8, _mmGB_ADDR_CONFIG@GOTPAGE
Lloh10:
	ldr	x8, [x8, _mmGB_ADDR_CONFIG@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	mov	x20, x0
	mov	x0, x19
	bl	_amdgpu_atomfirmware_get_gfx_info
	cbnz	w0, LBB0_14
; %bb.3:
	mov	w8, #34816
	movk	w8, #3096, lsl #16
	and	w8, w20, w8
	b	LBB0_10
LBB0_4:
Lloh12:
	adrp	x8, lCPI0_1@PAGE
Lloh13:
	ldr	q0, [x8, lCPI0_1@PAGEOFF]
	stur	q0, [x19, #8]
	mov	w8, #1216
	str	w8, [x19, #24]
	ldr	w8, [x19, #4]
	cmp	w8, #8
	b.lt	LBB0_11
; %bb.5:
Lloh14:
	adrp	x8, _RAVEN2_GB_ADDR_CONFIG_GOLDEN@GOTPAGE
Lloh15:
	ldr	x8, [x8, _RAVEN2_GB_ADDR_CONFIG_GOLDEN@GOTPAGEOFF]
	b	LBB0_12
LBB0_6:
Lloh16:
	adrp	x8, lCPI0_1@PAGE
Lloh17:
	ldr	q0, [x8, lCPI0_1@PAGEOFF]
	stur	q0, [x19, #8]
	mov	w8, #1216
	str	w8, [x19, #24]
Lloh18:
	adrp	x8, _VEGA10_GB_ADDR_CONFIG_GOLDEN@GOTPAGE
Lloh19:
	ldr	x8, [x8, _VEGA10_GB_ADDR_CONFIG_GOLDEN@GOTPAGEOFF]
	b	LBB0_12
LBB0_7:
Lloh20:
	adrp	x8, lCPI0_1@PAGE
Lloh21:
	ldr	q0, [x8, lCPI0_1@PAGEOFF]
	stur	q0, [x19, #8]
	mov	w8, #1216
	str	w8, [x19, #24]
Lloh22:
	adrp	x8, _VEGA12_GB_ADDR_CONFIG_GOLDEN@GOTPAGE
Lloh23:
	ldr	x8, [x8, _VEGA12_GB_ADDR_CONFIG_GOLDEN@GOTPAGEOFF]
Lloh24:
	ldr	w20, [x8]
Lloh25:
	adrp	x0, l_.str@PAGE
Lloh26:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_INFO
	b	LBB0_13
LBB0_8:
Lloh27:
	adrp	x8, lCPI0_0@PAGE
Lloh28:
	ldr	q0, [x8, lCPI0_0@PAGEOFF]
	stur	q0, [x19, #8]
	mov	w8, #1216
	str	w8, [x19, #24]
Lloh29:
	adrp	x8, _GC@GOTPAGE
Lloh30:
	ldr	x8, [x8, _GC@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
Lloh32:
	adrp	x8, _mmGB_ADDR_CONFIG@GOTPAGE
Lloh33:
	ldr	x8, [x8, _mmGB_ADDR_CONFIG@GOTPAGEOFF]
Lloh34:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	mov	w8, #34816
	movk	w8, #3096, lsl #16
	and	w8, w0, w8
	mov	w9, #16450
	movk	w9, #8705, lsl #16
	orr	w8, w8, w9
	sub	w20, w8, #4, lsl #12            ; =16384
	b	LBB0_13
LBB0_9:
Lloh35:
	adrp	x8, lCPI0_1@PAGE
Lloh36:
	ldr	q0, [x8, lCPI0_1@PAGEOFF]
	stur	q0, [x19, #8]
	mov	w8, #1216
	str	w8, [x19, #24]
Lloh37:
	adrp	x8, _GC@GOTPAGE
Lloh38:
	ldr	x8, [x8, _GC@GOTPAGEOFF]
Lloh39:
	ldr	w0, [x8]
Lloh40:
	adrp	x8, _mmGB_ADDR_CONFIG@GOTPAGE
Lloh41:
	ldr	x8, [x8, _mmGB_ADDR_CONFIG@GOTPAGEOFF]
Lloh42:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	mov	w8, #34816
	movk	w8, #3096, lsl #16
	and	w8, w0, w8
LBB0_10:
	mov	w9, #16450
	movk	w9, #8705, lsl #16
	orr	w20, w8, w9
	b	LBB0_13
LBB0_11:
Lloh43:
	adrp	x8, _RAVEN_GB_ADDR_CONFIG_GOLDEN@GOTPAGE
Lloh44:
	ldr	x8, [x8, _RAVEN_GB_ADDR_CONFIG_GOLDEN@GOTPAGEOFF]
LBB0_12:
	ldr	w20, [x8]
LBB0_13:
	str	w20, [x19, #28]
Lloh45:
	adrp	x21, _GB_ADDR_CONFIG@GOTPAGE
Lloh46:
	ldr	x21, [x21, _GB_ADDR_CONFIG@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh47:
	adrp	x8, _NUM_PIPES@GOTPAGE
Lloh48:
	ldr	x8, [x8, _NUM_PIPES@GOTPAGEOFF]
Lloh49:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_REG_GET_FIELD
	mov	w20, #1
	lsl	w8, w20, w0
	stp	w8, w8, [x19, #32]
	ldr	w0, [x19, #28]
	ldr	w1, [x21]
Lloh50:
	adrp	x8, _NUM_BANKS@GOTPAGE
Lloh51:
	ldr	x8, [x8, _NUM_BANKS@GOTPAGEOFF]
Lloh52:
	ldr	w2, [x8]
	bl	_REG_GET_FIELD
	lsl	w8, w20, w0
	str	w8, [x19, #40]
	ldr	w0, [x19, #28]
	ldr	w1, [x21]
Lloh53:
	adrp	x8, _MAX_COMPRESSED_FRAGS@GOTPAGE
Lloh54:
	ldr	x8, [x8, _MAX_COMPRESSED_FRAGS@GOTPAGEOFF]
Lloh55:
	ldr	w2, [x8]
	bl	_REG_GET_FIELD
	lsl	w8, w20, w0
	str	w8, [x19, #44]
	ldr	w0, [x19, #28]
	ldr	w1, [x21]
Lloh56:
	adrp	x8, _NUM_RB_PER_SE@GOTPAGE
Lloh57:
	ldr	x8, [x8, _NUM_RB_PER_SE@GOTPAGEOFF]
Lloh58:
	ldr	w2, [x8]
	bl	_REG_GET_FIELD
	lsl	w8, w20, w0
	str	w8, [x19, #48]
	ldr	w0, [x19, #28]
	ldr	w1, [x21]
Lloh59:
	adrp	x8, _NUM_SHADER_ENGINES@GOTPAGE
Lloh60:
	ldr	x8, [x8, _NUM_SHADER_ENGINES@GOTPAGEOFF]
Lloh61:
	ldr	w2, [x8]
	bl	_REG_GET_FIELD
	lsl	w8, w20, w0
	str	w8, [x19, #52]
	ldr	w0, [x19, #28]
	ldr	w1, [x21]
Lloh62:
	adrp	x8, _PIPE_INTERLEAVE_SIZE@GOTPAGE
Lloh63:
	ldr	x8, [x8, _PIPE_INTERLEAVE_SIZE@GOTPAGEOFF]
Lloh64:
	ldr	w2, [x8]
	bl	_REG_GET_FIELD
	mov	x8, x0
	mov	w0, #0
	add	w8, w8, #8
	lsl	w8, w20, w8
	str	w8, [x19, #56]
LBB0_14:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_15:
	bl	_BUG
	brk	#0x1
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdr	Lloh4, Lloh5
	.loh AdrpLdr	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdr	Lloh16, Lloh17
	.loh AdrpAdd	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdr	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdr	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdr	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh45, Lloh46
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_8-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_9-LBB0_2)>>2
                                        ; -- End function
	.comm	_gfx_v9_0_gfx_funcs,4,2         ; @gfx_v9_0_gfx_funcs
	.comm	_VEGA10_GB_ADDR_CONFIG_GOLDEN,4,2 ; @VEGA10_GB_ADDR_CONFIG_GOLDEN
	.comm	_VEGA12_GB_ADDR_CONFIG_GOLDEN,4,2 ; @VEGA12_GB_ADDR_CONFIG_GOLDEN
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"fix gfx.config for vega12\n"

	.comm	_GC,4,2                         ; @GC
	.comm	_mmGB_ADDR_CONFIG,4,2           ; @mmGB_ADDR_CONFIG
	.comm	_RAVEN2_GB_ADDR_CONFIG_GOLDEN,4,2 ; @RAVEN2_GB_ADDR_CONFIG_GOLDEN
	.comm	_RAVEN_GB_ADDR_CONFIG_GOLDEN,4,2 ; @RAVEN_GB_ADDR_CONFIG_GOLDEN
	.comm	_GB_ADDR_CONFIG,4,2             ; @GB_ADDR_CONFIG
	.comm	_NUM_PIPES,4,2                  ; @NUM_PIPES
	.comm	_NUM_BANKS,4,2                  ; @NUM_BANKS
	.comm	_MAX_COMPRESSED_FRAGS,4,2       ; @MAX_COMPRESSED_FRAGS
	.comm	_NUM_RB_PER_SE,4,2              ; @NUM_RB_PER_SE
	.comm	_NUM_SHADER_ENGINES,4,2         ; @NUM_SHADER_ENGINES
	.comm	_PIPE_INTERLEAVE_SIZE,4,2       ; @PIPE_INTERLEAVE_SIZE
	.no_dead_strip	_gfx_v9_0_gpu_early_init
.subsections_via_symbols
