	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_lpt_get_iclkip                 ## -- Begin function lpt_get_iclkip
	.p2align	4, 0x90
_lpt_get_iclkip:                        ## @lpt_get_iclkip
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	_PIXCLK_GATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movq	_PIXCLK_GATE_UNGATE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_3
## %bb.1:
	movq	%r15, %rdi
	callq	_mutex_lock
	movq	_SBI_SSCCTL6@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SBI_ICLK@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_intel_sbi_read
	movq	_SBI_SSCCTL_DISABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_4
## %bb.2:
	movq	%r15, %rdi
	callq	_mutex_unlock
LBB0_3:
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	_SBI_SSCDIVINTPHASE6@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_intel_sbi_read
	movl	%eax, %r14d
	movq	_SBI_SSCDIVINTPHASE_DIVSEL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	andl	%r14d, %r12d
	movq	_SBI_SSCDIVINTPHASE_DIVSEL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r12d
	movq	_SBI_SSCDIVINTPHASE_INCVAL_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %r14d
	movq	_SBI_SSCDIVINTPHASE_INCVAL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r14d
	movq	_SBI_SSCAUXDIV6@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_intel_sbi_read
	movl	%eax, %ebx
	movq	_SBI_SSCAUXDIV_FINALDIV2SEL_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movq	_SBI_SSCAUXDIV_FINALDIV2SEL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %ebx
	movq	%r15, %rdi
	callq	_mutex_unlock
	shll	$6, %r12d
	leal	(%r12,%r14), %esi
	addl	$128, %esi
	movl	%ebx, %ecx
	shll	%cl, %esi
	movl	$172800000, %edi                ## imm = 0xA4CB800
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DIV_ROUND_CLOSEST              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PIXCLK_GATE,4,2                ## @PIXCLK_GATE
	.comm	_PIXCLK_GATE_UNGATE,4,2         ## @PIXCLK_GATE_UNGATE
	.comm	_SBI_SSCCTL6,4,2                ## @SBI_SSCCTL6
	.comm	_SBI_ICLK,4,2                   ## @SBI_ICLK
	.comm	_SBI_SSCCTL_DISABLE,4,2         ## @SBI_SSCCTL_DISABLE
	.comm	_SBI_SSCDIVINTPHASE6,4,2        ## @SBI_SSCDIVINTPHASE6
	.comm	_SBI_SSCDIVINTPHASE_DIVSEL_MASK,4,2 ## @SBI_SSCDIVINTPHASE_DIVSEL_MASK
	.comm	_SBI_SSCDIVINTPHASE_DIVSEL_SHIFT,4,2 ## @SBI_SSCDIVINTPHASE_DIVSEL_SHIFT
	.comm	_SBI_SSCDIVINTPHASE_INCVAL_MASK,4,2 ## @SBI_SSCDIVINTPHASE_INCVAL_MASK
	.comm	_SBI_SSCDIVINTPHASE_INCVAL_SHIFT,4,2 ## @SBI_SSCDIVINTPHASE_INCVAL_SHIFT
	.comm	_SBI_SSCAUXDIV6,4,2             ## @SBI_SSCAUXDIV6
	.comm	_SBI_SSCAUXDIV_FINALDIV2SEL_MASK,4,2 ## @SBI_SSCAUXDIV_FINALDIV2SEL_MASK
	.comm	_SBI_SSCAUXDIV_FINALDIV2SEL_SHIFT,4,2 ## @SBI_SSCAUXDIV_FINALDIV2SEL_SHIFT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_lpt_get_iclkip                 ; -- Begin function lpt_get_iclkip
	.p2align	2
_lpt_get_iclkip:                        ; @lpt_get_iclkip
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _PIXCLK_GATE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PIXCLK_GATE@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_I915_READ
Lloh3:
	adrp	x8, _PIXCLK_GATE_UNGATE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PIXCLK_GATE_UNGATE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_3
; %bb.1:
	mov	x0, x19
	bl	_mutex_lock
Lloh6:
	adrp	x8, _SBI_SSCCTL6@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SBI_SSCCTL6@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
Lloh9:
	adrp	x20, _SBI_ICLK@GOTPAGE
Lloh10:
	ldr	x20, [x20, _SBI_ICLK@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_intel_sbi_read
Lloh11:
	adrp	x8, _SBI_SSCCTL_DISABLE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _SBI_SSCCTL_DISABLE@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_4
; %bb.2:
	mov	x0, x19
	bl	_mutex_unlock
LBB0_3:
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_4:
Lloh14:
	adrp	x8, _SBI_SSCDIVINTPHASE6@GOTPAGE
Lloh15:
	ldr	x8, [x8, _SBI_SSCDIVINTPHASE6@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_intel_sbi_read
Lloh17:
	adrp	x8, _SBI_SSCDIVINTPHASE_DIVSEL_MASK@GOTPAGE
Lloh18:
	ldr	x8, [x8, _SBI_SSCDIVINTPHASE_DIVSEL_MASK@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh20:
	adrp	x9, _SBI_SSCDIVINTPHASE_DIVSEL_SHIFT@GOTPAGE
Lloh21:
	ldr	x9, [x9, _SBI_SSCDIVINTPHASE_DIVSEL_SHIFT@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	asr	w21, w8, w9
Lloh23:
	adrp	x8, _SBI_SSCDIVINTPHASE_INCVAL_MASK@GOTPAGE
Lloh24:
	ldr	x8, [x8, _SBI_SSCDIVINTPHASE_INCVAL_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh26:
	adrp	x9, _SBI_SSCDIVINTPHASE_INCVAL_SHIFT@GOTPAGE
Lloh27:
	ldr	x9, [x9, _SBI_SSCDIVINTPHASE_INCVAL_SHIFT@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	asr	w22, w8, w9
Lloh29:
	adrp	x8, _SBI_SSCAUXDIV6@GOTPAGE
Lloh30:
	ldr	x8, [x8, _SBI_SSCAUXDIV6@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_intel_sbi_read
Lloh32:
	adrp	x8, _SBI_SSCAUXDIV_FINALDIV2SEL_MASK@GOTPAGE
Lloh33:
	ldr	x8, [x8, _SBI_SSCAUXDIV_FINALDIV2SEL_MASK@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh35:
	adrp	x9, _SBI_SSCAUXDIV_FINALDIV2SEL_SHIFT@GOTPAGE
Lloh36:
	ldr	x9, [x9, _SBI_SSCAUXDIV_FINALDIV2SEL_SHIFT@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
	asr	w20, w8, w9
	mov	x0, x19
	bl	_mutex_unlock
	add	w8, w22, w21, lsl #6
	add	w8, w8, #128
	lsl	w1, w8, w20
	mov	w0, #47104
	movk	w0, #2636, lsl #16
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_DIV_ROUND_CLOSEST
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_PIXCLK_GATE,4,2                ; @PIXCLK_GATE
	.comm	_PIXCLK_GATE_UNGATE,4,2         ; @PIXCLK_GATE_UNGATE
	.comm	_SBI_SSCCTL6,4,2                ; @SBI_SSCCTL6
	.comm	_SBI_ICLK,4,2                   ; @SBI_ICLK
	.comm	_SBI_SSCCTL_DISABLE,4,2         ; @SBI_SSCCTL_DISABLE
	.comm	_SBI_SSCDIVINTPHASE6,4,2        ; @SBI_SSCDIVINTPHASE6
	.comm	_SBI_SSCDIVINTPHASE_DIVSEL_MASK,4,2 ; @SBI_SSCDIVINTPHASE_DIVSEL_MASK
	.comm	_SBI_SSCDIVINTPHASE_DIVSEL_SHIFT,4,2 ; @SBI_SSCDIVINTPHASE_DIVSEL_SHIFT
	.comm	_SBI_SSCDIVINTPHASE_INCVAL_MASK,4,2 ; @SBI_SSCDIVINTPHASE_INCVAL_MASK
	.comm	_SBI_SSCDIVINTPHASE_INCVAL_SHIFT,4,2 ; @SBI_SSCDIVINTPHASE_INCVAL_SHIFT
	.comm	_SBI_SSCAUXDIV6,4,2             ; @SBI_SSCAUXDIV6
	.comm	_SBI_SSCAUXDIV_FINALDIV2SEL_MASK,4,2 ; @SBI_SSCAUXDIV_FINALDIV2SEL_MASK
	.comm	_SBI_SSCAUXDIV_FINALDIV2SEL_SHIFT,4,2 ; @SBI_SSCAUXDIV_FINALDIV2SEL_SHIFT
.subsections_via_symbols
