	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_sar_adc_start_sample_engine
_meson_sar_adc_start_sample_engine:     ## @meson_sar_adc_start_sample_engine
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	callq	_iio_priv
	movq	%rax, %rbx
	leaq	4(%rax), %rdi
	callq	_reinit_completion
	movl	(%rbx), %edi
	movq	_MESON_SAR_ADC_REG0@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_MESON_SAR_ADC_REG0_FIFO_IRQ_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ecx, %edx
	callq	_regmap_update_bits
	movl	(%rbx), %edi
	movl	(%r14), %esi
	movq	_MESON_SAR_ADC_REG0_SAMPLE_ENGINE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ecx, %edx
	callq	_regmap_update_bits
	movl	(%rbx), %edi
	movl	(%r14), %esi
	movq	_MESON_SAR_ADC_REG0_SAMPLING_START@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ecx, %edx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_regmap_update_bits             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MESON_SAR_ADC_REG0,4,2         ## @MESON_SAR_ADC_REG0
	.comm	_MESON_SAR_ADC_REG0_FIFO_IRQ_EN,4,2 ## @MESON_SAR_ADC_REG0_FIFO_IRQ_EN
	.comm	_MESON_SAR_ADC_REG0_SAMPLE_ENGINE_ENABLE,4,2 ## @MESON_SAR_ADC_REG0_SAMPLE_ENGINE_ENABLE
	.comm	_MESON_SAR_ADC_REG0_SAMPLING_START,4,2 ## @MESON_SAR_ADC_REG0_SAMPLING_START
	.no_dead_strip	_meson_sar_adc_start_sample_engine
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_sar_adc_start_sample_engine
_meson_sar_adc_start_sample_engine:     ; @meson_sar_adc_start_sample_engine
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_iio_priv
	mov	x19, x0
	add	x0, x0, #4
	bl	_reinit_completion
	ldr	w0, [x19]
Lloh0:
	adrp	x20, _MESON_SAR_ADC_REG0@GOTPAGE
Lloh1:
	ldr	x20, [x20, _MESON_SAR_ADC_REG0@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x8, _MESON_SAR_ADC_REG0_FIFO_IRQ_EN@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MESON_SAR_ADC_REG0_FIFO_IRQ_EN@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	x3, x2
	bl	_regmap_update_bits
	ldr	w0, [x19]
	ldr	w1, [x20]
Lloh5:
	adrp	x8, _MESON_SAR_ADC_REG0_SAMPLE_ENGINE_ENABLE@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MESON_SAR_ADC_REG0_SAMPLE_ENGINE_ENABLE@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	x3, x2
	bl	_regmap_update_bits
	ldr	w0, [x19]
Lloh8:
	adrp	x8, _MESON_SAR_ADC_REG0_SAMPLING_START@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MESON_SAR_ADC_REG0_SAMPLING_START@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh10:
	ldr	w2, [x8]
	mov	x3, x2
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_regmap_update_bits
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MESON_SAR_ADC_REG0,4,2         ; @MESON_SAR_ADC_REG0
	.comm	_MESON_SAR_ADC_REG0_FIFO_IRQ_EN,4,2 ; @MESON_SAR_ADC_REG0_FIFO_IRQ_EN
	.comm	_MESON_SAR_ADC_REG0_SAMPLE_ENGINE_ENABLE,4,2 ; @MESON_SAR_ADC_REG0_SAMPLE_ENGINE_ENABLE
	.comm	_MESON_SAR_ADC_REG0_SAMPLING_START,4,2 ; @MESON_SAR_ADC_REG0_SAMPLING_START
	.no_dead_strip	_meson_sar_adc_start_sample_engine
.subsections_via_symbols
