	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gen6_init_rps_frequencies
_gen6_init_rps_frequencies:             ## @gen6_init_rps_frequencies
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	callq	_IS_GEN9_LP
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_BXT_RP_STATE_CAP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, %ecx
	shrl	$16, %eax
	movl	%ecx, %edx
	jmp	LBB0_3
LBB0_2:
	movq	_GEN6_RP_STATE_CAP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, %edx
	shrl	$16, %edx
	movl	%eax, %ecx
LBB0_3:
	movzbl	%dl, %edx
	movzbl	%ch, %ecx
	movzbl	%al, %eax
	movl	%eax, (%rbx)
	movl	%ecx, 4(%rbx)
	movl	%edx, 8(%rbx)
	movl	%eax, 12(%rbx)
	movl	%ecx, 16(%rbx)
	movq	%rbx, %rdi
	callq	_IS_HASWELL
	testq	%rax, %rax
	jne	LBB0_7
## %bb.4:
	movq	%rbx, %rdi
	callq	_IS_BROADWELL
	testq	%rax, %rax
	jne	LBB0_7
## %bb.5:
	movq	%rbx, %rdi
	callq	_IS_GEN9_BC
	testq	%rax, %rax
	jne	LBB0_7
## %bb.6:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$10, %eax
	jl	LBB0_9
LBB0_7:
	movl	$0, -12(%rbp)
	movq	_HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-12(%rbp), %rdx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_sandybridge_pcode_read
	testq	%rax, %rax
	jne	LBB0_9
## %bb.8:
	movq	_u8@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movzbl	-11(%rbp), %esi
	movl	8(%rbx), %edx
	movl	12(%rbx), %ecx
	callq	_clamp_t
	movl	%eax, 16(%rbx)
LBB0_9:
	movq	%rbx, %rdi
	callq	_IS_GEN9_BC
	testq	%rax, %rax
	jne	LBB0_11
## %bb.10:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$10, %eax
	jl	LBB0_12
LBB0_11:
	movq	_GEN9_FREQ_SCALER@GOTPCREL(%rip), %rax
	movl	(%rbx), %ecx
	imull	(%rax), %ecx
	movl	%ecx, (%rbx)
	movdqu	4(%rbx), %xmm0
	movd	(%rax), %xmm1                   ## xmm1 = mem[0],zero,zero,zero
	pshufd	$0, %xmm1, %xmm1                ## xmm1 = xmm1[0,0,0,0]
	pmulld	%xmm0, %xmm1
	movdqu	%xmm1, 4(%rbx)
LBB0_12:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BXT_RP_STATE_CAP,4,2           ## @BXT_RP_STATE_CAP
	.comm	_GEN6_RP_STATE_CAP,4,2          ## @GEN6_RP_STATE_CAP
	.comm	_HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL,4,2 ## @HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL
	.comm	_u8,4,2                         ## @u8
	.comm	_GEN9_FREQ_SCALER,4,2           ## @GEN9_FREQ_SCALER
	.no_dead_strip	_gen6_init_rps_frequencies
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gen6_init_rps_frequencies
_gen6_init_rps_frequencies:             ; @gen6_init_rps_frequencies
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_IS_GEN9_LP
	cbz	x0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _BXT_RP_STATE_CAP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _BXT_RP_STATE_CAP@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x8, x0
	lsr	w0, w0, #16
	mov	x9, x8
	b	LBB0_3
LBB0_2:
Lloh3:
	adrp	x8, _GEN6_RP_STATE_CAP@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GEN6_RP_STATE_CAP@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	_I915_READ
	lsr	w9, w0, #16
	mov	x8, x0
LBB0_3:
	and	w9, w9, #0xff
	ubfx	w8, w8, #8, #8
	and	w10, w0, #0xff
	stp	w10, w8, [x19]
	stp	w9, w10, [x19, #8]
	str	w8, [x19, #16]
	mov	x0, x19
	bl	_IS_HASWELL
	cbnz	x0, LBB0_7
; %bb.4:
	mov	x0, x19
	bl	_IS_BROADWELL
	cbnz	x0, LBB0_7
; %bb.5:
	mov	x0, x19
	bl	_IS_GEN9_BC
	cbnz	x0, LBB0_7
; %bb.6:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #10
	b.lt	LBB0_9
LBB0_7:
	str	wzr, [sp, #12]
Lloh6:
	adrp	x8, _HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	add	x2, sp, #12
	mov	x0, x19
	mov	x3, #0
	bl	_sandybridge_pcode_read
	cbnz	x0, LBB0_9
; %bb.8:
Lloh9:
	adrp	x8, _u8@GOTPAGE
Lloh10:
	ldr	x8, [x8, _u8@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	ldrb	w1, [sp, #13]
	ldp	w2, w3, [x19, #8]
	bl	_clamp_t
	str	w0, [x19, #16]
LBB0_9:
	mov	x0, x19
	bl	_IS_GEN9_BC
	cbnz	x0, LBB0_11
; %bb.10:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #10
	b.lt	LBB0_12
LBB0_11:
Lloh12:
	adrp	x8, _GEN9_FREQ_SCALER@GOTPAGE
Lloh13:
	ldr	x8, [x8, _GEN9_FREQ_SCALER@GOTPAGEOFF]
	ldr	w9, [x8]
	ldr	w10, [x19]
	mul	w9, w10, w9
	str	w9, [x19]
	ldur	q0, [x19, #4]
	ld1r.4s	{ v1 }, [x8]
	mul.4s	v0, v0, v1
	stur	q0, [x19, #4]
LBB0_12:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_BXT_RP_STATE_CAP,4,2           ; @BXT_RP_STATE_CAP
	.comm	_GEN6_RP_STATE_CAP,4,2          ; @GEN6_RP_STATE_CAP
	.comm	_HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL,4,2 ; @HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL
	.comm	_u8,4,2                         ; @u8
	.comm	_GEN9_FREQ_SCALER,4,2           ; @GEN9_FREQ_SCALER
	.no_dead_strip	_gen6_init_rps_frequencies
.subsections_via_symbols
