	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ci_read_clock_registers
_ci_read_clock_registers:               ## @ci_read_clock_registers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	callq	_ci_get_pi
	movq	%rax, %rbx
	movq	_CG_SPLL_FUNC_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_SMC
	movq	%rax, 112(%rbx)
	movq	_CG_SPLL_FUNC_CNTL_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_SMC
	movq	%rax, 104(%rbx)
	movq	_CG_SPLL_FUNC_CNTL_3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_SMC
	movq	%rax, 96(%rbx)
	movq	_CG_SPLL_FUNC_CNTL_4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_SMC
	movq	%rax, 88(%rbx)
	movq	_CG_SPLL_SPREAD_SPECTRUM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_SMC
	movq	%rax, 80(%rbx)
	movq	_CG_SPLL_SPREAD_SPECTRUM_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_SMC
	movq	%rax, 72(%rbx)
	movq	_DLL_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	%rax, 64(%rbx)
	movq	_MCLK_PWRMGT_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	%rax, 56(%rbx)
	movq	_MPLL_AD_FUNC_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	%rax, 48(%rbx)
	movq	_MPLL_DQ_FUNC_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	%rax, 40(%rbx)
	movq	_MPLL_FUNC_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	%rax, 32(%rbx)
	movq	_MPLL_FUNC_CNTL_1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	%rax, 24(%rbx)
	movq	_MPLL_FUNC_CNTL_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	%rax, 16(%rbx)
	movq	_MPLL_SS1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	%rax, 8(%rbx)
	movq	_MPLL_SS2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	%rax, (%rbx)
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CG_SPLL_FUNC_CNTL,4,2          ## @CG_SPLL_FUNC_CNTL
	.comm	_CG_SPLL_FUNC_CNTL_2,4,2        ## @CG_SPLL_FUNC_CNTL_2
	.comm	_CG_SPLL_FUNC_CNTL_3,4,2        ## @CG_SPLL_FUNC_CNTL_3
	.comm	_CG_SPLL_FUNC_CNTL_4,4,2        ## @CG_SPLL_FUNC_CNTL_4
	.comm	_CG_SPLL_SPREAD_SPECTRUM,4,2    ## @CG_SPLL_SPREAD_SPECTRUM
	.comm	_CG_SPLL_SPREAD_SPECTRUM_2,4,2  ## @CG_SPLL_SPREAD_SPECTRUM_2
	.comm	_DLL_CNTL,4,2                   ## @DLL_CNTL
	.comm	_MCLK_PWRMGT_CNTL,4,2           ## @MCLK_PWRMGT_CNTL
	.comm	_MPLL_AD_FUNC_CNTL,4,2          ## @MPLL_AD_FUNC_CNTL
	.comm	_MPLL_DQ_FUNC_CNTL,4,2          ## @MPLL_DQ_FUNC_CNTL
	.comm	_MPLL_FUNC_CNTL,4,2             ## @MPLL_FUNC_CNTL
	.comm	_MPLL_FUNC_CNTL_1,4,2           ## @MPLL_FUNC_CNTL_1
	.comm	_MPLL_FUNC_CNTL_2,4,2           ## @MPLL_FUNC_CNTL_2
	.comm	_MPLL_SS1,4,2                   ## @MPLL_SS1
	.comm	_MPLL_SS2,4,2                   ## @MPLL_SS2
	.no_dead_strip	_ci_read_clock_registers
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ci_read_clock_registers
_ci_read_clock_registers:               ; @ci_read_clock_registers
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_ci_get_pi
	mov	x19, x0
Lloh0:
	adrp	x8, _CG_SPLL_FUNC_CNTL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CG_SPLL_FUNC_CNTL@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_RREG32_SMC
	str	x0, [x19, #112]
Lloh3:
	adrp	x8, _CG_SPLL_FUNC_CNTL_2@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CG_SPLL_FUNC_CNTL_2@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	_RREG32_SMC
	str	x0, [x19, #104]
Lloh6:
	adrp	x8, _CG_SPLL_FUNC_CNTL_3@GOTPAGE
Lloh7:
	ldr	x8, [x8, _CG_SPLL_FUNC_CNTL_3@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	bl	_RREG32_SMC
	str	x0, [x19, #96]
Lloh9:
	adrp	x8, _CG_SPLL_FUNC_CNTL_4@GOTPAGE
Lloh10:
	ldr	x8, [x8, _CG_SPLL_FUNC_CNTL_4@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	_RREG32_SMC
	str	x0, [x19, #88]
Lloh12:
	adrp	x8, _CG_SPLL_SPREAD_SPECTRUM@GOTPAGE
Lloh13:
	ldr	x8, [x8, _CG_SPLL_SPREAD_SPECTRUM@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	bl	_RREG32_SMC
	str	x0, [x19, #80]
Lloh15:
	adrp	x8, _CG_SPLL_SPREAD_SPECTRUM_2@GOTPAGE
Lloh16:
	ldr	x8, [x8, _CG_SPLL_SPREAD_SPECTRUM_2@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	bl	_RREG32_SMC
	str	x0, [x19, #72]
Lloh18:
	adrp	x8, _DLL_CNTL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _DLL_CNTL@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	bl	_RREG32
	str	x0, [x19, #64]
Lloh21:
	adrp	x8, _MCLK_PWRMGT_CNTL@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MCLK_PWRMGT_CNTL@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
	bl	_RREG32
	str	x0, [x19, #56]
Lloh24:
	adrp	x8, _MPLL_AD_FUNC_CNTL@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MPLL_AD_FUNC_CNTL@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	bl	_RREG32
	str	x0, [x19, #48]
Lloh27:
	adrp	x8, _MPLL_DQ_FUNC_CNTL@GOTPAGE
Lloh28:
	ldr	x8, [x8, _MPLL_DQ_FUNC_CNTL@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
	bl	_RREG32
	str	x0, [x19, #40]
Lloh30:
	adrp	x8, _MPLL_FUNC_CNTL@GOTPAGE
Lloh31:
	ldr	x8, [x8, _MPLL_FUNC_CNTL@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
	bl	_RREG32
	str	x0, [x19, #32]
Lloh33:
	adrp	x8, _MPLL_FUNC_CNTL_1@GOTPAGE
Lloh34:
	ldr	x8, [x8, _MPLL_FUNC_CNTL_1@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
	bl	_RREG32
	str	x0, [x19, #24]
Lloh36:
	adrp	x8, _MPLL_FUNC_CNTL_2@GOTPAGE
Lloh37:
	ldr	x8, [x8, _MPLL_FUNC_CNTL_2@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	bl	_RREG32
	str	x0, [x19, #16]
Lloh39:
	adrp	x8, _MPLL_SS1@GOTPAGE
Lloh40:
	ldr	x8, [x8, _MPLL_SS1@GOTPAGEOFF]
Lloh41:
	ldr	w0, [x8]
	bl	_RREG32
	str	x0, [x19, #8]
Lloh42:
	adrp	x8, _MPLL_SS2@GOTPAGE
Lloh43:
	ldr	x8, [x8, _MPLL_SS2@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	bl	_RREG32
	str	x0, [x19]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CG_SPLL_FUNC_CNTL,4,2          ; @CG_SPLL_FUNC_CNTL
	.comm	_CG_SPLL_FUNC_CNTL_2,4,2        ; @CG_SPLL_FUNC_CNTL_2
	.comm	_CG_SPLL_FUNC_CNTL_3,4,2        ; @CG_SPLL_FUNC_CNTL_3
	.comm	_CG_SPLL_FUNC_CNTL_4,4,2        ; @CG_SPLL_FUNC_CNTL_4
	.comm	_CG_SPLL_SPREAD_SPECTRUM,4,2    ; @CG_SPLL_SPREAD_SPECTRUM
	.comm	_CG_SPLL_SPREAD_SPECTRUM_2,4,2  ; @CG_SPLL_SPREAD_SPECTRUM_2
	.comm	_DLL_CNTL,4,2                   ; @DLL_CNTL
	.comm	_MCLK_PWRMGT_CNTL,4,2           ; @MCLK_PWRMGT_CNTL
	.comm	_MPLL_AD_FUNC_CNTL,4,2          ; @MPLL_AD_FUNC_CNTL
	.comm	_MPLL_DQ_FUNC_CNTL,4,2          ; @MPLL_DQ_FUNC_CNTL
	.comm	_MPLL_FUNC_CNTL,4,2             ; @MPLL_FUNC_CNTL
	.comm	_MPLL_FUNC_CNTL_1,4,2           ; @MPLL_FUNC_CNTL_1
	.comm	_MPLL_FUNC_CNTL_2,4,2           ; @MPLL_FUNC_CNTL_2
	.comm	_MPLL_SS1,4,2                   ; @MPLL_SS1
	.comm	_MPLL_SS2,4,2                   ; @MPLL_SS2
	.no_dead_strip	_ci_read_clock_registers
.subsections_via_symbols
