	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_gvt_hypervisor_inject_msi
_intel_gvt_hypervisor_inject_msi:       ## @intel_gvt_hypervisor_inject_msi
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	8(%rdi), %rax
	movq	(%rax), %rbx
	callq	_vgpu_cfg_space
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_MSI_CAP_CONTROL
	movl	(%rax,%r14), %r13d
	movq	%r15, %rdi
	callq	_vgpu_cfg_space
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_MSI_CAP_ADDRESS
	movl	(%rax,%r14), %r14d
	movq	%r15, %rdi
	callq	_vgpu_cfg_space
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	_MSI_CAP_DATA
	movq	_MSI_CAP_EN@GOTPCREL(%rip), %rcx
	testl	%r13d, (%rcx)
	je	LBB0_1
## %bb.2:
	movl	(%rax,%r12), %r12d
	movl	$15, %edi
	movl	$1, %esi
	callq	_GENMASK
	andl	%eax, %r13d
	leaq	L_.str(%rip), %rsi
	movl	%r13d, %edi
	callq	_WARN
	testq	%rax, %rax
	je	LBB0_5
## %bb.3:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_4
LBB0_1:
	xorl	%eax, %eax
LBB0_4:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	movl	4(%r15), %edi
	movl	%r14d, %esi
	movl	%r12d, %edx
	callq	_trace_inject_msi
	movq	_intel_gvt_host@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%rax), %rax
	movl	(%r15), %edi
	movl	%r14d, %esi
	movl	%r12d, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmpq	*%rax                           ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MSI_CAP_EN,4,2                 ## @MSI_CAP_EN
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"only support one MSI format\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_intel_gvt_host,8,3             ## @intel_gvt_host
	.no_dead_strip	_intel_gvt_hypervisor_inject_msi
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_gvt_hypervisor_inject_msi
_intel_gvt_hypervisor_inject_msi:       ; @intel_gvt_hypervisor_inject_msi
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x8, [x0, #8]
	ldr	x22, [x8]
	bl	_vgpu_cfg_space
	mov	x20, x0
	mov	x0, x22
	bl	_MSI_CAP_CONTROL
	ldr	w23, [x0, x20]
	mov	x0, x19
	bl	_vgpu_cfg_space
	mov	x20, x0
	mov	x0, x22
	bl	_MSI_CAP_ADDRESS
	ldr	w20, [x0, x20]
	mov	x0, x19
	bl	_vgpu_cfg_space
	mov	x21, x0
	mov	x0, x22
	bl	_MSI_CAP_DATA
Lloh0:
	adrp	x8, _MSI_CAP_EN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MSI_CAP_EN@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	tst	w8, w23
	b.eq	LBB0_3
; %bb.1:
	ldr	w21, [x0, x21]
	mov	w0, #15
	mov	w1, #1
	bl	_GENMASK
	and	w0, w0, w23
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	bl	_WARN
	cbz	x0, LBB0_5
; %bb.2:
Lloh5:
	adrp	x8, _EINVAL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_4
LBB0_3:
	mov	w0, #0
LBB0_4:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_5:
	ldr	w0, [x19, #4]
	mov	x1, x20
	mov	x2, x21
	bl	_trace_inject_msi
Lloh8:
	adrp	x8, _intel_gvt_host@GOTPAGE
Lloh9:
	ldr	x8, [x8, _intel_gvt_host@GOTPAGEOFF]
Lloh10:
	ldr	x8, [x8]
	ldr	x3, [x8]
	ldr	w0, [x19]
	mov	x1, x20
	mov	x2, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	br	x3
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_MSI_CAP_EN,4,2                 ; @MSI_CAP_EN
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"only support one MSI format\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_intel_gvt_host,8,3             ; @intel_gvt_host
	.no_dead_strip	_intel_gvt_hypervisor_inject_msi
.subsections_via_symbols
