	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_pll_reduce_ratio
_amdgpu_pll_reduce_ratio:               ## @amdgpu_pll_reduce_ratio
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r15d
	movl	%edx, %r12d
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	(%rdi), %edi
	movl	(%rsi), %esi
	callq	_gcd
	movl	%eax, %ecx
	movl	(%rbx), %eax
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, (%rbx)
	movl	(%r14), %eax
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, (%r14)
	movl	(%rbx), %esi
	cmpl	%r12d, %esi
	jae	LBB0_2
## %bb.1:
	movl	%r12d, %edi
	callq	_DIV_ROUND_UP
	movl	(%rbx), %ecx
	imull	%eax, %ecx
	movl	%ecx, (%rbx)
	imull	(%r14), %eax
	movl	%eax, (%r14)
LBB0_2:
	cmpl	%r15d, %eax
	jae	LBB0_4
## %bb.3:
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_DIV_ROUND_UP
	movl	(%rbx), %ecx
	imull	%eax, %ecx
	movl	%ecx, (%rbx)
	imull	(%r14), %eax
	movl	%eax, (%r14)
LBB0_4:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_amdgpu_pll_reduce_ratio
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_pll_reduce_ratio
_amdgpu_pll_reduce_ratio:               ; @amdgpu_pll_reduce_ratio
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x3
	mov	x22, x2
	mov	x19, x1
	mov	x20, x0
	ldr	w0, [x0]
	ldr	w1, [x1]
	bl	_gcd
	ldr	w8, [x20]
	udiv	w8, w8, w0
	str	w8, [x20]
	ldr	w8, [x19]
	udiv	w1, w8, w0
	str	w1, [x19]
	ldr	w8, [x20]
	cmp	w8, w22
	b.hs	LBB0_2
; %bb.1:
	mov	x0, x22
	mov	x1, x8
	bl	_DIV_ROUND_UP
	ldr	w8, [x20]
	mul	w8, w8, w0
	str	w8, [x20]
	ldr	w8, [x19]
	mul	w1, w8, w0
	str	w1, [x19]
LBB0_2:
	cmp	w1, w21
	b.hs	LBB0_4
; %bb.3:
	mov	x0, x21
	bl	_DIV_ROUND_UP
	ldr	w8, [x20]
	mul	w8, w8, w0
	str	w8, [x20]
	ldr	w8, [x19]
	mul	w8, w8, w0
	str	w8, [x19]
LBB0_4:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_amdgpu_pll_reduce_ratio
.subsections_via_symbols
