	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mixer_irq_handler
_mixer_irq_handler:                     ## @mixer_irq_handler
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rsi, %rdi
	callq	_spin_lock
	movq	_MXR_INT_STATUS@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_mixer_reg_read
	movl	%eax, %ebx
	movq	_MXR_INT_STATUS_VSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%ebx, %eax
	je	LBB0_4
## %bb.1:
	movq	_MXR_INT_CLEAR_VSYNC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ebx, %ecx
	notl	%eax
	movl	%eax, %ebx
	andl	%ecx, %ebx
	movq	_MXR_BIT_INTERLACE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	16(%r14), %rsi
	callq	_test_bit
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	movq	%r14, %rdi
	callq	_mixer_is_synced
	testl	%eax, %eax
	je	LBB0_4
LBB0_3:
	movq	8(%r14), %rdi
	callq	_drm_crtc_handle_vblank
LBB0_4:
	movl	(%r15), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_mixer_reg_write
	movq	%r14, %rdi
	callq	_spin_unlock
	movq	_IRQ_HANDLED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MXR_INT_STATUS,4,2             ## @MXR_INT_STATUS
	.comm	_MXR_INT_STATUS_VSYNC,4,2       ## @MXR_INT_STATUS_VSYNC
	.comm	_MXR_INT_CLEAR_VSYNC,4,2        ## @MXR_INT_CLEAR_VSYNC
	.comm	_MXR_BIT_INTERLACE,4,2          ## @MXR_BIT_INTERLACE
	.comm	_IRQ_HANDLED,4,2                ## @IRQ_HANDLED
	.no_dead_strip	_mixer_irq_handler
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mixer_irq_handler
_mixer_irq_handler:                     ; @mixer_irq_handler
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x0, x1
	bl	_spin_lock
Lloh0:
	adrp	x21, _MXR_INT_STATUS@GOTPAGE
Lloh1:
	ldr	x21, [x21, _MXR_INT_STATUS@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_mixer_reg_read
	mov	x20, x0
Lloh2:
	adrp	x8, _MXR_INT_STATUS_VSYNC@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MXR_INT_STATUS_VSYNC@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_4
; %bb.1:
Lloh5:
	adrp	x9, _MXR_INT_CLEAR_VSYNC@GOTPAGE
Lloh6:
	ldr	x9, [x9, _MXR_INT_CLEAR_VSYNC@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	orr	w9, w9, w20
	bic	w20, w9, w8
Lloh8:
	adrp	x8, _MXR_BIT_INTERLACE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MXR_BIT_INTERLACE@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	add	x1, x19, #16
	bl	_test_bit
	cbz	x0, LBB0_3
; %bb.2:
	mov	x0, x19
	bl	_mixer_is_synced
	cbz	w0, LBB0_4
LBB0_3:
	ldr	x0, [x19, #8]
	bl	_drm_crtc_handle_vblank
LBB0_4:
	ldr	w1, [x21]
	mov	x0, x19
	mov	x2, x20
	bl	_mixer_reg_write
	mov	x0, x19
	bl	_spin_unlock
Lloh11:
	adrp	x8, _IRQ_HANDLED@GOTPAGE
Lloh12:
	ldr	x8, [x8, _IRQ_HANDLED@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_MXR_INT_STATUS,4,2             ; @MXR_INT_STATUS
	.comm	_MXR_INT_STATUS_VSYNC,4,2       ; @MXR_INT_STATUS_VSYNC
	.comm	_MXR_INT_CLEAR_VSYNC,4,2        ; @MXR_INT_CLEAR_VSYNC
	.comm	_MXR_BIT_INTERLACE,4,2          ; @MXR_BIT_INTERLACE
	.comm	_IRQ_HANDLED,4,2                ; @IRQ_HANDLED
	.no_dead_strip	_mixer_irq_handler
.subsections_via_symbols
