	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_gem_create_ioctl        ## -- Begin function amdgpu_gem_create_ioctl
	.p2align	4, 0x90
_amdgpu_gem_create_ioctl:               ## @amdgpu_gem_create_ioctl
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPCREL(%rip), %rcx
	movq	_AMDGPU_GEM_CREATE_NO_CPU_ACCESS@GOTPCREL(%rip), %rax
	movl	(%rax), %r10d
	movl	(%rcx), %ecx
	orl	%r10d, %ecx
	movq	_AMDGPU_GEM_CREATE_CPU_GTT_USWC@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	movl	(%rsi), %r12d
	movq	_AMDGPU_GEM_CREATE_VRAM_CLEARED@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	movq	_AMDGPU_GEM_CREATE_VM_ALWAYS_VALID@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	orl	%edx, %ecx
	movq	_AMDGPU_GEM_CREATE_EXPLICIT_SYNC@GOTPCREL(%rip), %rsi
	orl	(%rsi), %ecx
	notl	%ecx
	testl	%ecx, %r12d
	jne	LBB0_1
## %bb.2:
	movl	8(%r15), %ecx
	movq	_AMDGPU_GEM_DOMAIN_MASK@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	notl	%esi
	testl	%esi, %ecx
	je	LBB0_3
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_18:
	movl	%ebx, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movq	(%rdi), %rdi
	movq	(%r14), %r9
	movl	4(%r15), %esi
	movq	_AMDGPU_GEM_DOMAIN_GDS@GOTPCREL(%rip), %r8
	movq	_AMDGPU_GEM_DOMAIN_GWS@GOTPCREL(%rip), %rbx
	movl	(%rbx), %ebx
	orl	(%r8), %ebx
	movq	_AMDGPU_GEM_DOMAIN_OA@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	testl	%ecx, %ebx
	je	LBB0_7
## %bb.4:
	testl	%r12d, %edx
	je	LBB0_6
## %bb.5:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_1
LBB0_6:
	orl	%r10d, %r12d
LBB0_7:
	testl	%edx, %r12d
	movq	%r9, -48(%rbp)                  ## 8-byte Spill
	je	LBB0_8
## %bb.9:
	movl	%esi, -60(%rbp)                 ## 4-byte Spill
	movq	%rdi, -72(%rbp)                 ## 8-byte Spill
	movq	(%r9), %rdi
	xorl	%esi, %esi
	callq	_amdgpu_bo_reserve
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_18
## %bb.10:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rax
	movq	(%rax), %rax
	movl	8(%r15), %ecx
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	movl	-60(%rbp), %esi                 ## 4-byte Reload
	jmp	LBB0_11
LBB0_8:
	xorl	%eax, %eax
LBB0_11:
	movl	12(%r15), %edx
	movq	_ttm_bo_type_device@GOTPCREL(%rip), %rbx
	movl	(%rbx), %r9d
	leaq	-56(%rbp), %rbx
	movl	%r12d, %r8d
	pushq	%rbx
	pushq	%rax
	callq	_amdgpu_gem_object_create
	addq	$16, %rsp
	movl	%eax, %ebx
	testl	%r12d, (%r13)
	je	LBB0_15
## %bb.12:
	testl	%ebx, %ebx
	jne	LBB0_14
## %bb.13:
	movq	-56(%rbp), %rdi
	callq	_gem_to_amdgpu_bo
	movq	%rax, %r12
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rdi
	callq	_amdgpu_bo_ref
	movl	%eax, (%r12)
LBB0_14:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rdi
	callq	_amdgpu_bo_unreserve
LBB0_15:
	testl	%ebx, %ebx
	jne	LBB0_18
## %bb.16:
	movq	-56(%rbp), %rsi
	leaq	-64(%rbp), %rdx
	movq	%r14, %rdi
	callq	_drm_gem_handle_create
	movl	%eax, %ebx
	movq	-56(%rbp), %rdi
	callq	_drm_gem_object_put_unlocked
	testl	%ebx, %ebx
	jne	LBB0_18
## %bb.17:
	xorl	%ebx, %ebx
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$16, %edx
	callq	_memset
	movl	-64(%rbp), %eax
	movl	%eax, (%r15)
	jmp	LBB0_18
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,4,2 ## @AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
	.comm	_AMDGPU_GEM_CREATE_NO_CPU_ACCESS,4,2 ## @AMDGPU_GEM_CREATE_NO_CPU_ACCESS
	.comm	_AMDGPU_GEM_CREATE_CPU_GTT_USWC,4,2 ## @AMDGPU_GEM_CREATE_CPU_GTT_USWC
	.comm	_AMDGPU_GEM_CREATE_VRAM_CLEARED,4,2 ## @AMDGPU_GEM_CREATE_VRAM_CLEARED
	.comm	_AMDGPU_GEM_CREATE_VM_ALWAYS_VALID,4,2 ## @AMDGPU_GEM_CREATE_VM_ALWAYS_VALID
	.comm	_AMDGPU_GEM_CREATE_EXPLICIT_SYNC,4,2 ## @AMDGPU_GEM_CREATE_EXPLICIT_SYNC
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_AMDGPU_GEM_DOMAIN_MASK,4,2     ## @AMDGPU_GEM_DOMAIN_MASK
	.comm	_AMDGPU_GEM_DOMAIN_GDS,4,2      ## @AMDGPU_GEM_DOMAIN_GDS
	.comm	_AMDGPU_GEM_DOMAIN_GWS,4,2      ## @AMDGPU_GEM_DOMAIN_GWS
	.comm	_AMDGPU_GEM_DOMAIN_OA,4,2       ## @AMDGPU_GEM_DOMAIN_OA
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"GDS bo cannot be per-vm-bo\n"

	.comm	_ttm_bo_type_device,4,2         ## @ttm_bo_type_device
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_gem_create_ioctl        ; -- Begin function amdgpu_gem_create_ioctl
	.p2align	2
_amdgpu_gem_create_ioctl:               ; @amdgpu_gem_create_ioctl
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	ldr	w21, [x1]
Lloh0:
	adrp	x8, _AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _AMDGPU_GEM_CREATE_NO_CPU_ACCESS@GOTPAGE
Lloh4:
	ldr	x9, [x9, _AMDGPU_GEM_CREATE_NO_CPU_ACCESS@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh6:
	adrp	x10, _AMDGPU_GEM_CREATE_CPU_GTT_USWC@GOTPAGE
Lloh7:
	ldr	x10, [x10, _AMDGPU_GEM_CREATE_CPU_GTT_USWC@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
Lloh9:
	adrp	x11, _AMDGPU_GEM_CREATE_VRAM_CLEARED@GOTPAGE
Lloh10:
	ldr	x11, [x11, _AMDGPU_GEM_CREATE_VRAM_CLEARED@GOTPAGEOFF]
	orr	w8, w8, w10
Lloh11:
	ldr	w10, [x11]
	orr	w10, w8, w10
Lloh12:
	adrp	x26, _AMDGPU_GEM_CREATE_VM_ALWAYS_VALID@GOTPAGE
Lloh13:
	ldr	x26, [x26, _AMDGPU_GEM_CREATE_VM_ALWAYS_VALID@GOTPAGEOFF]
	ldr	w8, [x26]
	orr	w10, w10, w8
Lloh14:
	adrp	x11, _AMDGPU_GEM_CREATE_EXPLICIT_SYNC@GOTPAGE
Lloh15:
	ldr	x11, [x11, _AMDGPU_GEM_CREATE_EXPLICIT_SYNC@GOTPAGEOFF]
Lloh16:
	ldr	w11, [x11]
	orr	w10, w10, w11
	bics	wzr, w21, w10
	b.ne	LBB0_2
; %bb.1:
	mov	x19, x1
	ldr	w3, [x1, #8]
Lloh17:
	adrp	x10, _AMDGPU_GEM_DOMAIN_MASK@GOTPAGE
Lloh18:
	ldr	x10, [x10, _AMDGPU_GEM_DOMAIN_MASK@GOTPAGEOFF]
Lloh19:
	ldr	w10, [x10]
	bics	wzr, w3, w10
	b.eq	LBB0_4
LBB0_2:
Lloh20:
	adrp	x8, _EINVAL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	neg	w24, w8
LBB0_3:
	mov	x0, x24
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_4:
	mov	x20, x2
	ldr	x22, [x0]
	ldr	x25, [x2]
	ldr	w23, [x19, #4]
Lloh23:
	adrp	x10, _AMDGPU_GEM_DOMAIN_GDS@GOTPAGE
Lloh24:
	ldr	x10, [x10, _AMDGPU_GEM_DOMAIN_GDS@GOTPAGEOFF]
Lloh25:
	ldr	w10, [x10]
Lloh26:
	adrp	x11, _AMDGPU_GEM_DOMAIN_GWS@GOTPAGE
Lloh27:
	ldr	x11, [x11, _AMDGPU_GEM_DOMAIN_GWS@GOTPAGEOFF]
Lloh28:
	ldr	w11, [x11]
	orr	w10, w11, w10
Lloh29:
	adrp	x11, _AMDGPU_GEM_DOMAIN_OA@GOTPAGE
Lloh30:
	ldr	x11, [x11, _AMDGPU_GEM_DOMAIN_OA@GOTPAGEOFF]
Lloh31:
	ldr	w11, [x11]
	orr	w10, w10, w11
	tst	w10, w3
	b.eq	LBB0_8
; %bb.5:
	tst	w8, w21
	b.eq	LBB0_7
; %bb.6:
Lloh32:
	adrp	x0, l_.str@PAGE
Lloh33:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_2
LBB0_7:
	orr	w21, w9, w21
LBB0_8:
	tst	w21, w8
	b.eq	LBB0_11
; %bb.9:
	ldr	x0, [x25]
	mov	w1, #0
	bl	_amdgpu_bo_reserve
	mov	x24, x0
	cbnz	w0, LBB0_3
; %bb.10:
	ldr	x8, [x25]
	ldr	x6, [x8]
	ldr	w3, [x19, #8]
	b	LBB0_12
LBB0_11:
	mov	x6, #0
LBB0_12:
	ldr	w2, [x19, #12]
Lloh34:
	adrp	x8, _ttm_bo_type_device@GOTPAGE
Lloh35:
	ldr	x8, [x8, _ttm_bo_type_device@GOTPAGEOFF]
Lloh36:
	ldr	w5, [x8]
	add	x7, sp, #8
	mov	x0, x22
	mov	x1, x23
	mov	x4, x21
	bl	_amdgpu_gem_object_create
	mov	x24, x0
	ldr	w8, [x26]
	tst	w8, w21
	b.eq	LBB0_16
; %bb.13:
	cbnz	w24, LBB0_15
; %bb.14:
	ldr	x0, [sp, #8]
	bl	_gem_to_amdgpu_bo
	mov	x21, x0
	ldr	x0, [x25]
	bl	_amdgpu_bo_ref
	str	w0, [x21]
LBB0_15:
	ldr	x0, [x25]
	bl	_amdgpu_bo_unreserve
LBB0_16:
	cbnz	w24, LBB0_3
; %bb.17:
	ldr	x1, [sp, #8]
	add	x2, sp, #4
	mov	x0, x20
	bl	_drm_gem_handle_create
	mov	x24, x0
	ldr	x0, [sp, #8]
	bl	_drm_gem_object_put_unlocked
	cbnz	w24, LBB0_3
; %bb.18:
	mov	x0, x19
	mov	w1, #0
	mov	w2, #16
	bl	_memset
	ldr	w8, [sp, #4]
	str	w8, [x19]
	b	LBB0_3
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,4,2 ; @AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
	.comm	_AMDGPU_GEM_CREATE_NO_CPU_ACCESS,4,2 ; @AMDGPU_GEM_CREATE_NO_CPU_ACCESS
	.comm	_AMDGPU_GEM_CREATE_CPU_GTT_USWC,4,2 ; @AMDGPU_GEM_CREATE_CPU_GTT_USWC
	.comm	_AMDGPU_GEM_CREATE_VRAM_CLEARED,4,2 ; @AMDGPU_GEM_CREATE_VRAM_CLEARED
	.comm	_AMDGPU_GEM_CREATE_VM_ALWAYS_VALID,4,2 ; @AMDGPU_GEM_CREATE_VM_ALWAYS_VALID
	.comm	_AMDGPU_GEM_CREATE_EXPLICIT_SYNC,4,2 ; @AMDGPU_GEM_CREATE_EXPLICIT_SYNC
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_AMDGPU_GEM_DOMAIN_MASK,4,2     ; @AMDGPU_GEM_DOMAIN_MASK
	.comm	_AMDGPU_GEM_DOMAIN_GDS,4,2      ; @AMDGPU_GEM_DOMAIN_GDS
	.comm	_AMDGPU_GEM_DOMAIN_GWS,4,2      ; @AMDGPU_GEM_DOMAIN_GWS
	.comm	_AMDGPU_GEM_DOMAIN_OA,4,2       ; @AMDGPU_GEM_DOMAIN_OA
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"GDS bo cannot be per-vm-bo\n"

	.comm	_ttm_bo_type_device,4,2         ; @ttm_bo_type_device
.subsections_via_symbols
