	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_vm_sdma_update
_amdgpu_vm_sdma_update:                 ## @amdgpu_vm_sdma_update
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r9, -64(%rbp)                  ## 8-byte Spill
	movl	%r8d, %r15d
	movl	%ecx, %ebx
	movl	%edx, %r12d
	movq	%rsi, %r14
	movl	16(%rbp), %r13d
	leaq	16(%rdi), %rax
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	jmp	LBB0_1
	.p2align	4, 0x90
LBB0_14:                                ##   in Loop: Header=BB0_1 Depth=1
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	%r14, %rsi
	movl	%r12d, %edx
	movl	%r13d, %ecx
	callq	_amdgpu_vm_sdma_copy_ptes
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	leal	(%r12,%r13,8), %r12d
	movq	-96(%rbp), %r15                 ## 8-byte Reload
	subl	%r13d, %r15d
	movl	16(%rbp), %r13d
	je	LBB0_15
LBB0_1:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_11 Depth 2
	movl	(%rdi), %r14d
	movq	16(%rdi), %rax
	movq	(%rax), %rax
	subl	8(%rax), %r14d
	cmpl	$31, %r14d
	ja	LBB0_5
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	movq	%rdi, %r13
	xorl	%esi, %esi
	callq	_amdgpu_vm_sdma_commit
	testl	%eax, %eax
	jne	LBB0_16
## %bb.3:                               ##   in Loop: Header=BB0_1 Depth=1
	cmpq	$0, 8(%r13)
	leal	32(%r15,%r15), %edi
	movl	$32, %eax
	cmovel	%eax, %edi
	movq	_AMDGPU_VM_SDMA_MIN_NUM_DW@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_max
	movq	_AMDGPU_VM_SDMA_MAX_NUM_DW@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	callq	_min
	movl	%eax, %r14d
	movq	24(%r13), %rdi
	leal	(,%r14,4), %esi
	movq	-72(%rbp), %rdx                 ## 8-byte Reload
	callq	_amdgpu_job_alloc_with_ib
	testl	%eax, %eax
	jne	LBB0_16
## %bb.4:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	%r14d, (%r13)
	movq	%r13, %rdi
	movl	16(%rbp), %r13d
LBB0_5:                                 ##   in Loop: Header=BB0_1 Depth=1
	cmpq	$0, 8(%rdi)
	je	LBB0_6
## %bb.9:                               ##   in Loop: Header=BB0_1 Depth=1
	movq	%r12, -88(%rbp)                 ## 8-byte Spill
	movq	24(%rdi), %rax
	movq	(%rax), %rax
	xorl	%ecx, %ecx
	movq	-56(%rbp), %rdx                 ## 8-byte Reload
	cmpq	$0, (%rdx)
	sete	%cl
	orl	$-2, %ecx
	imull	(%rax), %ecx
	leal	(%r14,%rcx), %esi
	addl	$-7, %esi
	shrl	%esi
	movq	%r15, -96(%rbp)                 ## 8-byte Spill
	movl	%r15d, %edi
	callq	_min
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
                                        ## kill: def $eax killed $eax def $rax
	movl	(%rcx), %r12d
	subl	%eax, %r12d
	subl	%eax, %r12d
	movl	%r12d, (%rcx)
	testl	%eax, %eax
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	je	LBB0_12
## %bb.10:                              ##   in Loop: Header=BB0_1 Depth=1
	movq	16(%rcx), %rcx
	movq	(%rcx), %rcx
	shlq	$2, %r12
	addq	(%rcx), %r12
	movl	%eax, %r14d
	xorl	%r15d, %r15d
	movq	-64(%rbp), %r13                 ## 8-byte Reload
	.p2align	4, 0x90
LBB0_11:                                ##   Parent Loop BB0_1 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	8(%rax), %rdi
	movl	%ebx, %esi
	callq	_amdgpu_vm_map_gart
	orl	16(%rbp), %eax
	movl	%eax, (%r12,%r15,4)
	incq	%r15
	addl	%r13d, %ebx
	cmpq	%r15, %r14
	jne	LBB0_11
LBB0_12:                                ##   in Loop: Header=BB0_1 Depth=1
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	movq	(%r14), %rsi
	testq	%rsi, %rsi
	movq	-88(%rbp), %r12                 ## 8-byte Reload
	movq	-80(%rbp), %r13                 ## 8-byte Reload
	je	LBB0_14
## %bb.13:                              ##   in Loop: Header=BB0_1 Depth=1
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movl	%r12d, %edx
	movl	%r13d, %ecx
	callq	_amdgpu_vm_sdma_copy_ptes
	jmp	LBB0_14
LBB0_6:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rsi
	testq	%rsi, %rsi
	movq	-64(%rbp), %r14                 ## 8-byte Reload
	je	LBB0_8
## %bb.7:
	movl	%r13d, (%rsp)
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movl	%r12d, %edx
	movl	%ebx, %ecx
	movl	%r15d, %r8d
	movq	%r14, %r9
	callq	_amdgpu_vm_sdma_set_ptes
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
LBB0_8:
	movl	%r13d, (%rsp)
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	movl	%r12d, %edx
	movl	%ebx, %ecx
	movl	%r15d, %r8d
	movq	%r14, %r9
	callq	_amdgpu_vm_sdma_set_ptes
LBB0_15:
	xorl	%eax, %eax
LBB0_16:
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_VM_SDMA_MIN_NUM_DW,4,2  ## @AMDGPU_VM_SDMA_MIN_NUM_DW
	.comm	_AMDGPU_VM_SDMA_MAX_NUM_DW,4,2  ## @AMDGPU_VM_SDMA_MAX_NUM_DW
	.no_dead_strip	_amdgpu_vm_sdma_update
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_vm_sdma_update
_amdgpu_vm_sdma_update:                 ; @amdgpu_vm_sdma_update
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x6
	mov	x20, x5
	mov	x21, x4
	mov	x22, x3
	mov	x23, x2
	mov	x24, x1
	mov	x25, x0
	add	x8, x0, #16
	str	x8, [sp, #8]                    ; 8-byte Folded Spill
	b	LBB0_2
LBB0_1:                                 ;   in Loop: Header=BB0_2 Depth=1
	mov	x0, x25
	mov	x1, x24
	mov	x2, x23
	mov	x3, x27
	bl	_amdgpu_vm_sdma_copy_ptes
	add	w23, w23, w27, lsl #3
	subs	w21, w21, w27
	b.eq	LBB0_15
LBB0_2:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_9 Depth 2
	ldr	w8, [x25]
	ldr	x9, [x25, #16]
	ldr	x9, [x9]
	ldr	w9, [x9, #8]
	sub	w27, w8, w9
	cmp	w27, #31
	b.hi	LBB0_6
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	x0, x25
	mov	x1, #0
	bl	_amdgpu_vm_sdma_commit
	cbnz	w0, LBB0_16
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	ldr	x8, [x25, #8]
	lsl	w9, w21, #1
	add	w9, w9, #32
	cmp	x8, #0
	mov	w8, #32
	csel	w0, w8, w9, eq
Lloh0:
	adrp	x8, _AMDGPU_VM_SDMA_MIN_NUM_DW@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_VM_SDMA_MIN_NUM_DW@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_max
Lloh3:
	adrp	x8, _AMDGPU_VM_SDMA_MAX_NUM_DW@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AMDGPU_VM_SDMA_MAX_NUM_DW@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_min
	mov	x27, x0
	ldr	x0, [x25, #24]
	lsl	w1, w27, #2
	ldr	x2, [sp, #8]                    ; 8-byte Folded Reload
	bl	_amdgpu_job_alloc_with_ib
	cbnz	w0, LBB0_16
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	str	w27, [x25]
LBB0_6:                                 ;   in Loop: Header=BB0_2 Depth=1
	ldr	x8, [x25, #8]
	cbz	x8, LBB0_12
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	ldr	x8, [x25, #24]
	ldr	x8, [x8]
	ldr	w8, [x8]
	ldr	x9, [x24]
	cmp	x9, #0
	mov	w9, #-2
	cinc	w9, w9, eq
	madd	w8, w9, w8, w27
	sub	w8, w8, #7
	lsr	w1, w8, #1
	mov	x0, x21
	bl	_min
	mov	x27, x0
	ldr	w8, [x25]
	sub	w8, w8, w0, lsl #1
	str	w8, [x25]
	cbz	w0, LBB0_10
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	ldr	x9, [x25, #16]
	ldr	x9, [x9]
	ldr	x9, [x9]
	add	x28, x9, w8, uxtw #2
	mov	w26, w27
LBB0_9:                                 ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	x0, [x25, #8]
	mov	x1, x22
	bl	_amdgpu_vm_map_gart
	orr	w8, w0, w19
	str	w8, [x28], #4
	add	w22, w22, w20
	subs	x26, x26, #1
	b.ne	LBB0_9
LBB0_10:                                ;   in Loop: Header=BB0_2 Depth=1
	ldr	x1, [x24]
	cbz	x1, LBB0_1
; %bb.11:                               ;   in Loop: Header=BB0_2 Depth=1
	mov	x0, x25
	mov	x2, x23
	mov	x3, x27
	bl	_amdgpu_vm_sdma_copy_ptes
	b	LBB0_1
LBB0_12:
	ldr	x1, [x24]
	cbz	x1, LBB0_14
; %bb.13:
	mov	x0, x25
	mov	x2, x23
	mov	x3, x22
	mov	x4, x21
	mov	x5, x20
	mov	x6, x19
	bl	_amdgpu_vm_sdma_set_ptes
LBB0_14:
	mov	x0, x25
	mov	x1, x24
	mov	x2, x23
	mov	x3, x22
	mov	x4, x21
	mov	x5, x20
	mov	x6, x19
	bl	_amdgpu_vm_sdma_set_ptes
LBB0_15:
	mov	w0, #0
LBB0_16:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_VM_SDMA_MIN_NUM_DW,4,2  ; @AMDGPU_VM_SDMA_MIN_NUM_DW
	.comm	_AMDGPU_VM_SDMA_MAX_NUM_DW,4,2  ; @AMDGPU_VM_SDMA_MAX_NUM_DW
	.no_dead_strip	_amdgpu_vm_sdma_update
.subsections_via_symbols
