	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vc4_create_rcl_bo
_vc4_create_rcl_bo:                     ## @vc4_create_rcl_bo
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, -96(%rbp)                 ## 8-byte Spill
	movq	16(%rsi), %r14
	movl	24(%r14), %eax
	movq	_VC4_SUBMIT_CL_FIXED_RCL_ORDER@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_1
## %bb.2:
	movq	_VC4_SUBMIT_CL_RCL_ORDER_INCREASING_X@GOTPCREL(%rip), %rcx
	xorl	%r8d, %r8d
	testl	%eax, (%rcx)
	setne	%r8b
	movq	_VC4_SUBMIT_CL_RCL_ORDER_INCREASING_Y@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	sete	%cl
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	jmp	LBB0_3
LBB0_1:
	movl	$1, %r8d
	movl	$0, -52(%rbp)                   ## 4-byte Folded Spill
LBB0_3:
	movq	_VC4_PACKET_TILE_RENDERING_MODE_CONFIG_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	movq	_VC4_PACKET_TILE_COORDINATES_SIZE@GOTPCREL(%rip), %rdi
	movl	(%rdi), %r9d
	movq	_VC4_SUBMIT_CL_USE_CLEAR_COLOR@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	movq	%rsi, -72(%rbp)                 ## 8-byte Spill
	je	LBB0_5
## %bb.4:
	movq	_VC4_PACKET_CLEAR_COLORS_SIZE@GOTPCREL(%rip), %rax
	movq	_VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE@GOTPCREL(%rip), %rsi
	addl	%r9d, %r15d
	addl	(%rax), %r15d
	addl	(%rsi), %r15d
LBB0_5:
	movq	48(%rdx), %rax
	movl	%r9d, %ecx
	testq	%rax, %rax
	je	LBB0_10
## %bb.6:
	movq	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	testl	%esi, 84(%r14)
	je	LBB0_8
## %bb.7:
	movq	_VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE@GOTPCREL(%rip), %rsi
	jmp	LBB0_9
LBB0_8:
	movq	_VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE@GOTPCREL(%rip), %rsi
LBB0_9:
	movl	(%rsi), %ecx
	addl	%r9d, %ecx
LBB0_10:
	movl	8(%r14), %esi
	movl	12(%r14), %edi
	movq	%rdi, -120(%rbp)                ## 8-byte Spill
	movl	16(%r14), %edi
	movl	%edi, -48(%rbp)                 ## 4-byte Spill
	movl	20(%r14), %edi
	movl	%edi, -60(%rbp)                 ## 4-byte Spill
	movq	(%r14), %r10
	cmpq	$0, 56(%rdx)
	movq	%r9, -88(%rbp)                  ## 8-byte Spill
	je	LBB0_11
## %bb.12:
	leal	(%rcx,%r9), %edi
	movq	_VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %r11d
	addl	%r11d, %edi
	testq	%rax, %rax
	cmovel	%ecx, %edi
	movq	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 80(%r14)
	je	LBB0_14
## %bb.13:
	movq	_VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE@GOTPCREL(%rip), %rax
	jmp	LBB0_15
LBB0_11:
	movq	_VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %r11d
	jmp	LBB0_16
LBB0_14:
	movq	_VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE@GOTPCREL(%rip), %rax
LBB0_15:
	addl	(%rax), %edi
	movl	%edi, %ecx
LBB0_16:
	movl	-48(%rbp), %eax                 ## 4-byte Reload
                                        ## kill: def $eax killed $eax def $rax
	movq	%rsi, -128(%rbp)                ## 8-byte Spill
	subl	%esi, %eax
	movq	%rax, -112(%rbp)                ## 8-byte Spill
	movl	-60(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, %esi
	subl	-120(%rbp), %esi                ## 4-byte Folded Reload
	xorl	%r9d, %r9d
	movl	$0, %ebx
	movl	$0, %eax
	testq	%r10, %r10
	je	LBB0_18
## %bb.17:
	movq	_VC4_PACKET_WAIT_ON_SEMAPHORE_SIZE@GOTPCREL(%rip), %rax
	movq	_VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE@GOTPCREL(%rip), %rdi
	movl	(%rdi), %ebx
	movl	(%rax), %eax
LBB0_18:
	movl	%r8d, -64(%rbp)                 ## 4-byte Spill
	addl	%r15d, %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	addl	%ecx, %ebx
	movq	-112(%rbp), %rax                ## 8-byte Reload
	leal	1(%rax), %ecx
	xorl	%r12d, %r12d
	cmpq	$0, 40(%rdx)
	movq	%rsi, -104(%rbp)                ## 8-byte Spill
	leal	1(%rsi), %eax
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	sete	%r10b
	movq	_VC4_PACKET_STORE_FULL_RES_TILE_BUFFER_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%esi, %eax
	cmovel	%r9d, %eax
	addl	%ebx, %eax
	xorl	%ebx, %ebx
	cmpq	$0, 24(%rdx)
	cmovel	%r9d, %r11d
	setne	%r15b
	movq	%rdx, -80(%rbp)                 ## 8-byte Spill
	cmpq	$0, 16(%rdx)
	movl	$0, %r13d
	je	LBB0_20
## %bb.19:
	movq	_VC4_PACKET_STORE_MS_TILE_BUFFER_SIZE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r13d
LBB0_20:
	setne	%r8b
	xorl	%edx, %edx
	movq	-80(%rbp), %rdi                 ## 8-byte Reload
	cmpq	$0, 32(%rdi)
	cmovel	%r9d, %esi
	setne	%dl
	addl	%esi, %eax
	addl	%r11d, %eax
	addl	%r13d, %eax
	movq	%rdi, %r13
	movb	%r10b, %r12b
	subl	%r12d, %edx
	movb	%r15b, %bl
	addl	%ebx, %edx
	movzbl	%r8b, %esi
	addl	%esi, %edx
	imull	-88(%rbp), %edx                 ## 4-byte Folded Reload
	addl	%eax, %edx
	imull	-56(%rbp), %ecx                 ## 4-byte Folded Reload
	imull	%edx, %ecx
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	addl	%ecx, %ebx
	movq	_VC4_BO_TYPE_RCL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	-96(%rbp), %rdi                 ## 8-byte Reload
	movl	%ebx, %esi
	movl	$1, %edx
	callq	_vc4_bo_create
	movq	%rax, 8(%r13)
	movq	%rax, %rdi
	callq	_IS_ERR
	movq	8(%r13), %rdi
	testq	%rax, %rax
	je	LBB0_21
## %bb.33:
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_PTR_ERR                        ## TAILCALL
LBB0_21:
	addq	$4, %rdi
	callq	_to_vc4_bo
	movq	-72(%rbp), %rcx                 ## 8-byte Reload
	leaq	8(%rcx), %rsi
	movq	%rax, %rdi
	callq	_list_add_tail
	movq	_VC4_SUBMIT_CL_USE_CLEAR_COLOR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 24(%r14)
	je	LBB0_23
## %bb.22:
	movq	_VC4_PACKET_CLEAR_COLORS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_rcl_u8
	movq	72(%r14), %rax
	movq	(%rax), %rsi
	movq	%r13, %rdi
	callq	_rcl_u32
	movq	72(%r14), %rax
	movq	8(%rax), %rsi
	movq	%r13, %rdi
	callq	_rcl_u32
	movq	64(%r14), %rsi
	movq	%r13, %rdi
	callq	_rcl_u32
	movl	56(%r14), %esi
	movq	%r13, %rdi
	callq	_rcl_u8
	movq	%r13, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_vc4_tile_coordinates
	movq	_VC4_PACKET_STORE_TILE_BUFFER_GENERAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_rcl_u8
	movq	_VC4_LOADSTORE_TILE_BUFFER_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_rcl_u16
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_rcl_u32
LBB0_23:
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	movq	_VC4_PACKET_TILE_RENDERING_MODE_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_rcl_u8
	movq	16(%r13), %rax
	testq	%rax, %rax
	je	LBB0_24
## %bb.25:
	movq	40(%r14), %rsi
	addq	(%rax), %rsi
	jmp	LBB0_26
LBB0_24:
	xorl	%esi, %esi
LBB0_26:
	movq	%r13, %rdi
	callq	_rcl_u32
	movl	52(%r14), %esi
	movq	%r13, %rdi
	callq	_rcl_u16
	movl	48(%r14), %esi
	movq	%r13, %rdi
	callq	_rcl_u16
	movl	32(%r14), %esi
	movq	%r13, %rdi
	callq	_rcl_u16
	cmpl	$0, -104(%rbp)                  ## 4-byte Folded Reload
	movq	-128(%rbp), %r10                ## 8-byte Reload
	js	LBB0_32
## %bb.27:
	leal	-1(%r10), %edx
	xorl	%r9d, %r9d
	movl	%edx, -88(%rbp)                 ## 4-byte Spill
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	movq	-80(%rbp), %r13                 ## 8-byte Reload
	jmp	LBB0_28
	.p2align	4, 0x90
LBB0_31:                                ##   in Loop: Header=BB0_28 Depth=1
	incl	%r9d
	cmpl	-56(%rbp), %r9d                 ## 4-byte Folded Reload
	je	LBB0_32
LBB0_28:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_30 Depth 2
	movq	-120(%rbp), %rax                ## 8-byte Reload
	addl	%r9d, %eax
	movl	-60(%rbp), %r12d                ## 4-byte Reload
	subl	%r9d, %r12d
	cmpb	$0, -52(%rbp)                   ## 1-byte Folded Reload
	cmovel	%eax, %r12d
	cmpl	$0, -112(%rbp)                  ## 4-byte Folded Reload
	movl	-64(%rbp), %edi                 ## 4-byte Reload
	movq	-104(%rbp), %rax                ## 8-byte Reload
	js	LBB0_31
## %bb.29:                              ##   in Loop: Header=BB0_28 Depth=1
	xorl	%r14d, %r14d
	movl	-48(%rbp), %r15d                ## 4-byte Reload
	movq	%r9, -96(%rbp)                  ## 8-byte Spill
	.p2align	4, 0x90
LBB0_30:                                ##   Parent Loop BB0_28 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movl	%r9d, %r11d
	xorl	%eax, %r11d
	leal	(%r10,%r14), %edx
	testl	%edi, %edi
	cmovel	%r15d, %edx
	xorl	%r8d, %r8d
	movl	%r14d, %edi
	orl	%r9d, %edi
	sete	%r8b
	movl	%r10d, %edi
	xorl	%r15d, %edi
	xorl	%r9d, %r9d
	orl	%r11d, %edi
	sete	%r9b
	movq	%rbx, %rdi
	movq	%r13, %rsi
	movl	%r12d, %ecx
	callq	_emit_tile
	movq	-104(%rbp), %rax                ## 8-byte Reload
	movl	-64(%rbp), %edi                 ## 4-byte Reload
	movq	-96(%rbp), %r9                  ## 8-byte Reload
	movl	-88(%rbp), %edx                 ## 4-byte Reload
	movq	-128(%rbp), %r10                ## 8-byte Reload
	incl	%r14d
	decl	%r15d
	cmpl	%r15d, %edx
	jne	LBB0_30
	jmp	LBB0_31
LBB0_32:
	xorl	%edi, %edi
	movq	-80(%rbp), %rbx                 ## 8-byte Reload
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	cmpl	%eax, (%rbx)
	setne	%dil
	callq	_BUG_ON
	movq	8(%rbx), %rax
	movl	(%rax), %eax
	movq	-72(%rbp), %rcx                 ## 8-byte Reload
	movl	%eax, (%rcx)
	addl	(%rbx), %eax
	movl	%eax, 4(%rcx)
	xorl	%eax, %eax
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VC4_SUBMIT_CL_FIXED_RCL_ORDER,4,2 ## @VC4_SUBMIT_CL_FIXED_RCL_ORDER
	.comm	_VC4_SUBMIT_CL_RCL_ORDER_INCREASING_X,4,2 ## @VC4_SUBMIT_CL_RCL_ORDER_INCREASING_X
	.comm	_VC4_SUBMIT_CL_RCL_ORDER_INCREASING_Y,4,2 ## @VC4_SUBMIT_CL_RCL_ORDER_INCREASING_Y
	.comm	_VC4_PACKET_TILE_RENDERING_MODE_CONFIG_SIZE,4,2 ## @VC4_PACKET_TILE_RENDERING_MODE_CONFIG_SIZE
	.comm	_VC4_PACKET_TILE_COORDINATES_SIZE,4,2 ## @VC4_PACKET_TILE_COORDINATES_SIZE
	.comm	_VC4_SUBMIT_CL_USE_CLEAR_COLOR,4,2 ## @VC4_SUBMIT_CL_USE_CLEAR_COLOR
	.comm	_VC4_PACKET_CLEAR_COLORS_SIZE,4,2 ## @VC4_PACKET_CLEAR_COLORS_SIZE
	.comm	_VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE,4,2 ## @VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE
	.comm	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES,4,2 ## @VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES
	.comm	_VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE,8,3 ## @VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE
	.comm	_VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE,8,3 ## @VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE
	.comm	_VC4_PACKET_WAIT_ON_SEMAPHORE_SIZE,4,2 ## @VC4_PACKET_WAIT_ON_SEMAPHORE_SIZE
	.comm	_VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE,8,3 ## @VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE
	.comm	_VC4_PACKET_STORE_FULL_RES_TILE_BUFFER_SIZE,8,3 ## @VC4_PACKET_STORE_FULL_RES_TILE_BUFFER_SIZE
	.comm	_VC4_PACKET_STORE_MS_TILE_BUFFER_SIZE,8,3 ## @VC4_PACKET_STORE_MS_TILE_BUFFER_SIZE
	.comm	_VC4_BO_TYPE_RCL,4,2            ## @VC4_BO_TYPE_RCL
	.comm	_VC4_PACKET_CLEAR_COLORS,4,2    ## @VC4_PACKET_CLEAR_COLORS
	.comm	_VC4_PACKET_STORE_TILE_BUFFER_GENERAL,4,2 ## @VC4_PACKET_STORE_TILE_BUFFER_GENERAL
	.comm	_VC4_LOADSTORE_TILE_BUFFER_NONE,4,2 ## @VC4_LOADSTORE_TILE_BUFFER_NONE
	.comm	_VC4_PACKET_TILE_RENDERING_MODE_CONFIG,4,2 ## @VC4_PACKET_TILE_RENDERING_MODE_CONFIG
	.no_dead_strip	_vc4_create_rcl_bo
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vc4_create_rcl_bo
_vc4_create_rcl_bo:                     ; @vc4_create_rcl_bo
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x2
	mov	x19, x1
	ldr	x22, [x1, #16]
	ldr	w10, [x22, #24]
Lloh0:
	adrp	x8, _VC4_SUBMIT_CL_FIXED_RCL_ORDER@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VC4_SUBMIT_CL_FIXED_RCL_ORDER@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	tst	w8, w10
	b.eq	LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _VC4_SUBMIT_CL_RCL_ORDER_INCREASING_X@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VC4_SUBMIT_CL_RCL_ORDER_INCREASING_X@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w10
	cset	w23, ne
Lloh6:
	adrp	x8, _VC4_SUBMIT_CL_RCL_ORDER_INCREASING_Y@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VC4_SUBMIT_CL_RCL_ORDER_INCREASING_Y@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	tst	w8, w10
	cset	w8, eq
	str	w8, [sp, #16]                   ; 4-byte Folded Spill
	b	LBB0_3
LBB0_2:
	str	wzr, [sp, #16]                  ; 4-byte Folded Spill
	mov	w23, #1
LBB0_3:
	ldp	w25, w9, [x22, #8]
	ldr	w8, [x22, #16]
	str	w8, [sp, #8]                    ; 4-byte Folded Spill
	ldr	w8, [x22, #20]
	stp	w8, w9, [sp, #24]               ; 8-byte Folded Spill
Lloh9:
	adrp	x8, _VC4_PACKET_TILE_RENDERING_MODE_CONFIG_SIZE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _VC4_PACKET_TILE_RENDERING_MODE_CONFIG_SIZE@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x8]
Lloh12:
	adrp	x8, _VC4_PACKET_TILE_COORDINATES_SIZE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VC4_PACKET_TILE_COORDINATES_SIZE@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
Lloh15:
	adrp	x24, _VC4_SUBMIT_CL_USE_CLEAR_COLOR@GOTPAGE
Lloh16:
	ldr	x24, [x24, _VC4_SUBMIT_CL_USE_CLEAR_COLOR@GOTPAGEOFF]
	ldr	w11, [x24]
Lloh17:
	adrp	x13, _VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE@GOTPAGE
Lloh18:
	ldr	x13, [x13, _VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE@GOTPAGEOFF]
	tst	w11, w10
	b.eq	LBB0_5
; %bb.4:
Lloh19:
	adrp	x10, _VC4_PACKET_CLEAR_COLORS_SIZE@GOTPAGE
Lloh20:
	ldr	x10, [x10, _VC4_PACKET_CLEAR_COLORS_SIZE@GOTPAGEOFF]
Lloh21:
	ldr	w10, [x10]
	ldr	w11, [x13]
	add	w9, w8, w9
	add	w9, w9, w10
	add	w9, w9, w11
LBB0_5:
	ldr	w10, [sp, #8]                   ; 4-byte Folded Reload
	sub	w10, w10, w25
	str	w10, [sp, #20]                  ; 4-byte Folded Spill
	ldp	w11, w10, [sp, #24]             ; 8-byte Folded Reload
	sub	w27, w11, w10
	ldr	x16, [x20, #48]
Lloh22:
	adrp	x15, _VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPAGE
Lloh23:
	ldr	x15, [x15, _VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPAGEOFF]
	cbz	x16, LBB0_8
; %bb.6:
	ldr	w10, [x22, #84]
	ldr	w11, [x15]
	tst	w11, w10
	b.eq	LBB0_9
; %bb.7:
Lloh24:
	adrp	x10, _VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE@GOTPAGE
Lloh25:
	ldr	x10, [x10, _VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE@GOTPAGEOFF]
	b	LBB0_10
LBB0_8:
	mov	x12, x8
	b	LBB0_11
LBB0_9:
Lloh26:
	adrp	x10, _VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE@GOTPAGE
Lloh27:
	ldr	x10, [x10, _VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE@GOTPAGEOFF]
LBB0_10:
	ldr	w10, [x10]
	add	w12, w8, w10
LBB0_11:
	ldr	x14, [x22]
	ldr	w10, [sp, #20]                  ; 4-byte Folded Reload
	add	w10, w10, #1
	add	w11, w27, #1
	ldr	x17, [x20, #56]
	cbz	x17, LBB0_14
; %bb.12:
	ldr	w13, [x13]
	add	w17, w12, w8
	add	w17, w17, w13
	cmp	x16, #0
	csel	w12, w12, w17, eq
	ldr	w16, [x22, #80]
	ldr	w15, [x15]
	tst	w15, w16
	b.eq	LBB0_15
; %bb.13:
Lloh28:
	adrp	x15, _VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE@GOTPAGE
Lloh29:
	ldr	x15, [x15, _VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE@GOTPAGEOFF]
	b	LBB0_16
LBB0_14:
	ldr	w13, [x13]
	b	LBB0_17
LBB0_15:
Lloh30:
	adrp	x15, _VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE@GOTPAGE
Lloh31:
	ldr	x15, [x15, _VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE@GOTPAGEOFF]
LBB0_16:
	ldr	w15, [x15]
	add	w12, w12, w15
LBB0_17:
Lloh32:
	adrp	x15, _VC4_PACKET_WAIT_ON_SEMAPHORE_SIZE@GOTPAGE
Lloh33:
	ldr	x15, [x15, _VC4_PACKET_WAIT_ON_SEMAPHORE_SIZE@GOTPAGEOFF]
Lloh34:
	ldr	w15, [x15]
Lloh35:
	adrp	x16, _VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE@GOTPAGE
Lloh36:
	ldr	x16, [x16, _VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE@GOTPAGEOFF]
Lloh37:
	ldr	w16, [x16]
	cmp	x14, #0
	csel	w14, wzr, w16, eq
	csel	w15, wzr, w15, eq
	add	w9, w15, w9
	ldp	x16, x15, [x20, #32]
	cmp	x15, #0
	cset	w15, eq
Lloh38:
	adrp	x17, _VC4_PACKET_STORE_FULL_RES_TILE_BUFFER_SIZE@GOTPAGE
Lloh39:
	ldr	x17, [x17, _VC4_PACKET_STORE_FULL_RES_TILE_BUFFER_SIZE@GOTPAGEOFF]
Lloh40:
	ldr	w17, [x17]
	csel	w1, wzr, w17, eq
	add	w12, w14, w12
	add	w12, w12, w1
	cmp	x16, #0
	csel	w14, wzr, w17, eq
	cset	w16, ne
	sub	w15, w16, w15
	ldp	x17, x16, [x20, #16]
	cmp	x16, #0
	csel	w13, wzr, w13, eq
	add	w12, w12, w14
	add	w12, w12, w13
Lloh41:
	adrp	x13, _VC4_PACKET_STORE_MS_TILE_BUFFER_SIZE@GOTPAGE
Lloh42:
	ldr	x13, [x13, _VC4_PACKET_STORE_MS_TILE_BUFFER_SIZE@GOTPAGEOFF]
Lloh43:
	ldr	w13, [x13]
	cinc	w14, w15, ne
	cmp	x17, #0
	csel	w13, wzr, w13, eq
	add	w12, w12, w13
	cinc	w13, w14, ne
	madd	w8, w13, w8, w12
	mul	w10, w11, w10
	madd	w21, w10, w8, w9
Lloh44:
	adrp	x8, _VC4_BO_TYPE_RCL@GOTPAGE
Lloh45:
	ldr	x8, [x8, _VC4_BO_TYPE_RCL@GOTPAGEOFF]
Lloh46:
	ldr	w3, [x8]
	mov	x1, x21
	mov	w2, #1
	bl	_vc4_bo_create
	str	x0, [x20, #8]
	bl	_IS_ERR
	mov	x8, x0
	ldr	x0, [x20, #8]
	cbz	x8, LBB0_19
; %bb.18:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	b	_PTR_ERR
LBB0_19:
	add	x0, x0, #4
	bl	_to_vc4_bo
	add	x1, x19, #8
	bl	_list_add_tail
	ldr	w8, [x22, #24]
	ldr	w9, [x24]
	tst	w9, w8
	b.eq	LBB0_21
; %bb.20:
Lloh47:
	adrp	x8, _VC4_PACKET_CLEAR_COLORS@GOTPAGE
Lloh48:
	ldr	x8, [x8, _VC4_PACKET_CLEAR_COLORS@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rcl_u8
	ldr	x8, [x22, #72]
	ldr	x1, [x8]
	mov	x0, x20
	bl	_rcl_u32
	ldr	x8, [x22, #72]
	ldr	x1, [x8, #8]
	mov	x0, x20
	bl	_rcl_u32
	ldr	x1, [x22, #64]
	mov	x0, x20
	bl	_rcl_u32
	ldr	w1, [x22, #56]
	mov	x0, x20
	bl	_rcl_u8
	mov	x0, x20
	mov	w1, #0
	mov	w2, #0
	bl	_vc4_tile_coordinates
Lloh50:
	adrp	x8, _VC4_PACKET_STORE_TILE_BUFFER_GENERAL@GOTPAGE
Lloh51:
	ldr	x8, [x8, _VC4_PACKET_STORE_TILE_BUFFER_GENERAL@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rcl_u8
Lloh53:
	adrp	x8, _VC4_LOADSTORE_TILE_BUFFER_NONE@GOTPAGE
Lloh54:
	ldr	x8, [x8, _VC4_LOADSTORE_TILE_BUFFER_NONE@GOTPAGEOFF]
Lloh55:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rcl_u16
	mov	x0, x20
	mov	x1, #0
	bl	_rcl_u32
LBB0_21:
Lloh56:
	adrp	x8, _VC4_PACKET_TILE_RENDERING_MODE_CONFIG@GOTPAGE
Lloh57:
	ldr	x8, [x8, _VC4_PACKET_TILE_RENDERING_MODE_CONFIG@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rcl_u8
	ldr	x8, [x20, #16]
	str	w21, [sp, #4]                   ; 4-byte Folded Spill
	cbz	x8, LBB0_23
; %bb.22:
	ldr	x8, [x8]
	ldr	x9, [x22, #40]
	add	x1, x9, x8
	b	LBB0_24
LBB0_23:
	mov	x1, #0
LBB0_24:
	mov	x0, x20
	bl	_rcl_u32
	ldr	w1, [x22, #52]
	mov	x0, x20
	bl	_rcl_u16
	ldr	w1, [x22, #48]
	mov	x0, x20
	bl	_rcl_u16
	ldr	w1, [x22, #32]
	mov	x0, x20
	bl	_rcl_u16
	tbnz	w27, #31, LBB0_30
; %bb.25:
	mov	w24, #0
	add	w8, w27, #1
	str	w8, [sp, #12]                   ; 4-byte Folded Spill
	sub	w28, w25, #1
	b	LBB0_27
LBB0_26:                                ;   in Loop: Header=BB0_27 Depth=1
	add	w24, w24, #1
	ldr	w8, [sp, #12]                   ; 4-byte Folded Reload
	cmp	w24, w8
	b.eq	LBB0_30
LBB0_27:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_29 Depth 2
	ldp	w9, w8, [sp, #24]               ; 8-byte Folded Reload
	add	w8, w24, w8
	sub	w9, w9, w24
	ldr	w10, [sp, #16]                  ; 4-byte Folded Reload
	cmp	w10, #0
	csel	w22, w9, w8, ne
	ldr	w8, [sp, #20]                   ; 4-byte Folded Reload
	tbnz	w8, #31, LBB0_26
; %bb.28:                               ;   in Loop: Header=BB0_27 Depth=1
	mov	w21, #0
	ldr	w26, [sp, #8]                   ; 4-byte Folded Reload
LBB0_29:                                ;   Parent Loop BB0_27 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	add	w8, w25, w21
	cmp	w23, #0
	csel	w2, w26, w8, eq
	orr	w8, w21, w24
	cmp	w8, #0
	cset	w4, eq
	cmp	w25, w26
	ccmp	w24, w27, #0, eq
	cset	w5, eq
	mov	x0, x19
	mov	x1, x20
	mov	x3, x22
	bl	_emit_tile
	add	w21, w21, #1
	sub	w26, w26, #1
	cmp	w28, w26
	b.ne	LBB0_29
	b	LBB0_26
LBB0_30:
	ldr	w8, [x20]
	ldr	w9, [sp, #4]                    ; 4-byte Folded Reload
	cmp	w8, w9
	cset	w0, ne
	bl	_BUG_ON
	ldr	x8, [x20, #8]
	ldr	w8, [x8]
	ldr	w9, [x20]
	add	w9, w9, w8
	stp	w8, w9, [x19]
	mov	w0, #0
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.cfi_endproc
                                        ; -- End function
	.comm	_VC4_SUBMIT_CL_FIXED_RCL_ORDER,4,2 ; @VC4_SUBMIT_CL_FIXED_RCL_ORDER
	.comm	_VC4_SUBMIT_CL_RCL_ORDER_INCREASING_X,4,2 ; @VC4_SUBMIT_CL_RCL_ORDER_INCREASING_X
	.comm	_VC4_SUBMIT_CL_RCL_ORDER_INCREASING_Y,4,2 ; @VC4_SUBMIT_CL_RCL_ORDER_INCREASING_Y
	.comm	_VC4_PACKET_TILE_RENDERING_MODE_CONFIG_SIZE,4,2 ; @VC4_PACKET_TILE_RENDERING_MODE_CONFIG_SIZE
	.comm	_VC4_PACKET_TILE_COORDINATES_SIZE,4,2 ; @VC4_PACKET_TILE_COORDINATES_SIZE
	.comm	_VC4_SUBMIT_CL_USE_CLEAR_COLOR,4,2 ; @VC4_SUBMIT_CL_USE_CLEAR_COLOR
	.comm	_VC4_PACKET_CLEAR_COLORS_SIZE,4,2 ; @VC4_PACKET_CLEAR_COLORS_SIZE
	.comm	_VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE,4,2 ; @VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE
	.comm	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES,4,2 ; @VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES
	.comm	_VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE,8,3 ; @VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE
	.comm	_VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE,8,3 ; @VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE
	.comm	_VC4_PACKET_WAIT_ON_SEMAPHORE_SIZE,4,2 ; @VC4_PACKET_WAIT_ON_SEMAPHORE_SIZE
	.comm	_VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE,8,3 ; @VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE
	.comm	_VC4_PACKET_STORE_FULL_RES_TILE_BUFFER_SIZE,8,3 ; @VC4_PACKET_STORE_FULL_RES_TILE_BUFFER_SIZE
	.comm	_VC4_PACKET_STORE_MS_TILE_BUFFER_SIZE,8,3 ; @VC4_PACKET_STORE_MS_TILE_BUFFER_SIZE
	.comm	_VC4_BO_TYPE_RCL,4,2            ; @VC4_BO_TYPE_RCL
	.comm	_VC4_PACKET_CLEAR_COLORS,4,2    ; @VC4_PACKET_CLEAR_COLORS
	.comm	_VC4_PACKET_STORE_TILE_BUFFER_GENERAL,4,2 ; @VC4_PACKET_STORE_TILE_BUFFER_GENERAL
	.comm	_VC4_LOADSTORE_TILE_BUFFER_NONE,4,2 ; @VC4_LOADSTORE_TILE_BUFFER_NONE
	.comm	_VC4_PACKET_TILE_RENDERING_MODE_CONFIG,4,2 ; @VC4_PACKET_TILE_RENDERING_MODE_CONFIG
	.no_dead_strip	_vc4_create_rcl_bo
.subsections_via_symbols
