	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_v8_0_crtc_do_set_base
_dce_v8_0_crtc_do_set_base:             ## @dce_v8_0_crtc_do_set_base
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, %r14d
	movl	%ecx, -84(%rbp)                 ## 4-byte Spill
	movl	%edx, -88(%rbp)                 ## 4-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	callq	_to_amdgpu_crtc
	movq	%rax, %r13
	movq	16(%rbx), %rax
	movq	(%rax), %r15
	movq	_GRPH_ENDIAN_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edx
	movq	%r12, %rcx
	movl	%r14d, -64(%rbp)                ## 4-byte Spill
	testl	%r14d, %r14d
	jne	LBB0_3
## %bb.1:
	movq	(%rbx), %rax
	movq	(%rax), %rcx
	testq	%rcx, %rcx
	je	LBB0_2
LBB0_3:
	movq	%r12, -120(%rbp)                ## 8-byte Spill
	movl	%edx, -60(%rbp)                 ## 4-byte Spill
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movq	16(%rcx), %rax
	movq	(%rax), %rdi
	movq	%rcx, %r12
	callq	_gem_to_amdgpu_bo
	movq	%rax, %r14
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_bo_reserve
	movl	%eax, %ebx
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_36
## %bb.4:
	movq	%r12, -96(%rbp)                 ## 8-byte Spill
	cmpl	$0, -64(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_5
LBB0_8:
	movq	%r14, %rdi
	callq	_amdgpu_bo_gpu_offset
	movq	%rax, %rbx
	leaq	-56(%rbp), %rsi
	movq	%r14, %rdi
	callq	_amdgpu_bo_get_tiling_flags
	movq	%r14, %rdi
	callq	_amdgpu_bo_unreserve
	movq	-56(%rbp), %rdi
	movq	_PIPE_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movl	%eax, %ecx
	movq	-96(%rbp), %rax                 ## 8-byte Reload
	movq	24(%rax), %rax
	movl	(%rax), %edi
	leal	-128(%rdi), %eax
	cmpl	$15, %eax
	ja	LBB0_24
## %bb.9:
	movl	%ecx, -80(%rbp)                 ## 4-byte Spill
	movq	%r15, -112(%rbp)                ## 8-byte Spill
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	movq	%rbx, -104(%rbp)                ## 8-byte Spill
	jmpq	*%rax
LBB0_17:
	movq	_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_GRPH_FORMAT_ARGB8888@GOTPCREL(%rip), %rcx
	jmp	LBB0_11
LBB0_2:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_KMS
	jmp	LBB0_35
LBB0_5:
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_amdgpu_bo_pin
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_8
## %bb.6:
	movq	%r14, %rdi
	callq	_amdgpu_bo_unreserve
LBB0_7:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_36
LBB0_13:
	movq	_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_GRPH_FORMAT_ARGB4444@GOTPCREL(%rip), %rcx
	jmp	LBB0_11
LBB0_18:
	movq	_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_GRPH_FORMAT_ARGB2101010@GOTPCREL(%rip), %rcx
	jmp	LBB0_19
LBB0_14:
	movq	_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_GRPH_FORMAT_ARGB1555@GOTPCREL(%rip), %rcx
	jmp	LBB0_11
LBB0_23:
	movq	_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_GRPH_FORMAT_ARGB8888@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	movq	_GRPH_CONTROL__GRPH_FORMAT__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r15d
	movq	_GRPH_RED_SEL_B@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_GRPH_SWAP_CNTL__GRPH_RED_CROSSBAR__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_GRPH_SWAP_CNTL__GRPH_BLUE_CROSSBAR__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_GRPH_BLUE_SEL_R@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	shll	%cl, %esi
	orl	%eax, %r15d
	orl	%edx, %esi
	movl	%esi, -60(%rbp)                 ## 4-byte Spill
	jmp	LBB0_12
LBB0_15:
	movq	_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_GRPH_FORMAT_BGRA5551@GOTPCREL(%rip), %rcx
	jmp	LBB0_11
LBB0_22:
	movq	_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_GRPH_FORMAT_BGRA1010102@GOTPCREL(%rip), %rcx
LBB0_19:
	movl	(%rcx), %r15d
	movq	_GRPH_CONTROL__GRPH_FORMAT__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r15d
	orl	%eax, %r15d
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	jmp	LBB0_20
LBB0_24:
	leaq	-128(%rbp), %rsi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_drm_get_format_name
	leaq	L_.str.1(%rip), %rdi
	movl	%eax, %esi
	callq	_DRM_ERROR
	jmp	LBB0_7
LBB0_16:
	movq	_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_GRPH_FORMAT_ARGB565@GOTPCREL(%rip), %rcx
	jmp	LBB0_11
LBB0_10:
	movq	_GRPH_DEPTH_8BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_GRPH_FORMAT_INDEXED@GOTPCREL(%rip), %rcx
LBB0_11:
	movl	(%rcx), %r15d
	movq	_GRPH_CONTROL__GRPH_FORMAT__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r15d
	orl	%eax, %r15d
LBB0_12:
	movb	$1, %al
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
LBB0_20:
	movq	-56(%rbp), %rdi
	movq	_ARRAY_MODE@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	callq	_AMDGPU_TILING_GET
	movq	_ARRAY_2D_TILED_THIN1@GOTPCREL(%rip), %rcx
	movq	-56(%rbp), %rdi
	cmpl	(%rcx), %eax
	jne	LBB0_25
## %bb.21:
	movq	_BANK_WIDTH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movl	%eax, -76(%rbp)                 ## 4-byte Spill
	movq	-56(%rbp), %rdi
	movq	_BANK_HEIGHT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movl	%eax, %r12d
	movq	-56(%rbp), %rdi
	movq	_MACRO_TILE_ASPECT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movl	%eax, %r14d
	movq	-56(%rbp), %rdi
	movq	_TILE_SPLIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movl	%eax, %ebx
	movq	-56(%rbp), %rdi
	movq	_NUM_BANKS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movq	_GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_GRPH_ARRAY_2D_TILED_THIN1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %ebx
	movq	_GRPH_CONTROL__GRPH_BANK_WIDTH__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	-76(%rbp), %esi                 ## 4-byte Reload
	shll	%cl, %esi
	orl	%r15d, %eax
	orl	%edx, %ebx
	movq	_GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r12d
	movq	_GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r14d
	orl	%eax, %ebx
	orl	%esi, %r12d
	orl	%r12d, %r14d
	orl	%ebx, %r14d
	movq	_DISPLAY_MICRO_TILING@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_GRPH_CONTROL__GRPH_MICRO_TILE_MODE__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r15d
	orl	%r14d, %r15d
	jmp	LBB0_27
LBB0_25:
	movl	(%r14), %esi
	callq	_AMDGPU_TILING_GET
	movq	_ARRAY_1D_TILED_THIN1@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_27
## %bb.26:
	movq	_GRPH_ARRAY_1D_TILED_THIN1@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %r15d
LBB0_27:
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	movq	_GRPH_CONTROL__GRPH_PIPE_CONFIG__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	-80(%rbp), %r14d                ## 4-byte Reload
	shll	%cl, %r14d
	orl	%r15d, %r14d
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	_dce_v8_0_vga_enable
	movq	_mmGRPH_FLIP_CONTROL@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movq	(%r13), %rbx
	addq	(%rax), %rbx
	movq	-104(%rbp), %r15                ## 8-byte Reload
	movq	%r15, %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movq	(%r13), %rbx
	addq	(%rax), %rbx
	movq	%r15, %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmGRPH_PRIMARY_SURFACE_ADDRESS@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	movq	_GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	andl	%r15d, %esi
	callq	_WREG32
	movq	_mmGRPH_SECONDARY_SURFACE_ADDRESS@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	movq	_GRPH_SECONDARY_SURFACE_ADDRESS__GRPH_SECONDARY_SURFACE_ADDRESS_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %r15d
	movl	%r15d, %esi
	callq	_WREG32
	movq	_mmGRPH_CONTROL@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	movl	%r14d, %esi
	callq	_WREG32
	movq	_mmGRPH_SWAP_CNTL@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	movl	-60(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_mmGRPH_LUT_10BIT_BYPASS_CONTROL@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	movq	_LUT_10BIT_BYPASS_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	testb	%bl, %bl
	cmovel	%edx, %r12d
	notl	%edx
	movl	%r12d, %esi
	callq	_WREG32_P
	testb	%bl, %bl
	jne	LBB0_29
## %bb.28:
	leaq	L_.str.2(%rip), %rdi
	callq	_DRM_DEBUG_KMS
LBB0_29:
	movq	_mmGRPH_SURFACE_OFFSET_X@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmGRPH_SURFACE_OFFSET_Y@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmGRPH_X_START@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmGRPH_Y_START@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmGRPH_X_END@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	movq	-96(%rbp), %r14                 ## 8-byte Reload
	movl	(%r14), %esi
	callq	_WREG32
	movq	_mmGRPH_Y_END@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	movl	4(%r14), %esi
	callq	_WREG32
	movq	8(%r14), %rax
	movq	24(%r14), %rcx
	movl	(%rax), %eax
	movq	8(%rcx), %rcx
	xorl	%edx, %edx
	divl	(%rcx)
	movq	_mmGRPH_PITCH@GOTPCREL(%rip), %rcx
	movq	(%r13), %rdi
	addq	(%rcx), %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_dce_v8_0_grph_enable
	movq	_mmLB_DESKTOP_HEIGHT@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	movl	4(%r14), %esi
	callq	_WREG32
	movq	_mmVIEWPORT_START@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	movl	-84(%rbp), %eax                 ## 4-byte Reload
	andl	$-2, %eax
	movl	-88(%rbp), %esi                 ## 4-byte Reload
	andl	$-4, %esi
	shll	$16, %esi
	orl	%eax, %esi
	callq	_WREG32
	movl	8(%rbx), %esi
	movl	12(%rbx), %eax
	incl	%eax
	andl	$-2, %eax
	movq	_mmVIEWPORT_SIZE@GOTPCREL(%rip), %rcx
	movq	(%r13), %rdi
	addq	(%rcx), %rdi
	shll	$16, %esi
	orl	%eax, %esi
	callq	_WREG32
	movq	_mmMASTER_UPDATE_MODE@GOTPCREL(%rip), %rax
	movq	(%r13), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	-120(%rbp), %rcx                ## 8-byte Reload
	testq	%rcx, %rcx
	movq	-112(%rbp), %r15                ## 8-byte Reload
	je	LBB0_34
## %bb.30:
	cmpl	$0, -64(%rbp)                   ## 4-byte Folded Reload
	jne	LBB0_34
## %bb.31:
	movq	(%rbx), %rax
	cmpq	%rcx, (%rax)
	je	LBB0_34
## %bb.32:
	movq	16(%rcx), %rax
	movq	(%rax), %rdi
	callq	_gem_to_amdgpu_bo
	movq	%rax, %r14
	movq	%rax, %rdi
	movl	$1, %esi
	callq	_amdgpu_bo_reserve
	movl	%eax, %ebx
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_36
## %bb.33:
	movq	%r14, %rdi
	callq	_amdgpu_bo_unpin
	movq	%r14, %rdi
	callq	_amdgpu_bo_unreserve
LBB0_34:
	movq	%r15, %rdi
	callq	_dce_v8_0_bandwidth_update
LBB0_35:
	xorl	%ebx, %ebx
LBB0_36:
	movl	%ebx, %eax
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_17, LBB0_17-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
.set L0_0_set_23, LBB0_23-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_22, LBB0_22-LJTI0_0
LJTI0_0:
	.long	L0_0_set_17
	.long	L0_0_set_13
	.long	L0_0_set_18
	.long	L0_0_set_14
	.long	L0_0_set_23
	.long	L0_0_set_16
	.long	L0_0_set_10
	.long	L0_0_set_15
	.long	L0_0_set_22
	.long	L0_0_set_15
	.long	L0_0_set_22
	.long	L0_0_set_17
	.long	L0_0_set_13
	.long	L0_0_set_18
	.long	L0_0_set_14
	.long	L0_0_set_23
	.end_data_region
                                        ## -- End function
	.comm	_GRPH_ENDIAN_NONE,4,2           ## @GRPH_ENDIAN_NONE
	.comm	_GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT,4,2 ## @GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"No FB bound\n"

	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ## @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_PIPE_CONFIG,4,2                ## @PIPE_CONFIG
	.comm	_GRPH_DEPTH_8BPP,4,2            ## @GRPH_DEPTH_8BPP
	.comm	_GRPH_CONTROL__GRPH_DEPTH__SHIFT,4,2 ## @GRPH_CONTROL__GRPH_DEPTH__SHIFT
	.comm	_GRPH_FORMAT_INDEXED,4,2        ## @GRPH_FORMAT_INDEXED
	.comm	_GRPH_CONTROL__GRPH_FORMAT__SHIFT,4,2 ## @GRPH_CONTROL__GRPH_FORMAT__SHIFT
	.comm	_GRPH_DEPTH_16BPP,4,2           ## @GRPH_DEPTH_16BPP
	.comm	_GRPH_FORMAT_ARGB4444,4,2       ## @GRPH_FORMAT_ARGB4444
	.comm	_GRPH_FORMAT_ARGB1555,4,2       ## @GRPH_FORMAT_ARGB1555
	.comm	_GRPH_FORMAT_BGRA5551,4,2       ## @GRPH_FORMAT_BGRA5551
	.comm	_GRPH_FORMAT_ARGB565,4,2        ## @GRPH_FORMAT_ARGB565
	.comm	_GRPH_DEPTH_32BPP,4,2           ## @GRPH_DEPTH_32BPP
	.comm	_GRPH_FORMAT_ARGB8888,4,2       ## @GRPH_FORMAT_ARGB8888
	.comm	_GRPH_FORMAT_ARGB2101010,4,2    ## @GRPH_FORMAT_ARGB2101010
	.comm	_GRPH_FORMAT_BGRA1010102,4,2    ## @GRPH_FORMAT_BGRA1010102
	.comm	_GRPH_RED_SEL_B,4,2             ## @GRPH_RED_SEL_B
	.comm	_GRPH_SWAP_CNTL__GRPH_RED_CROSSBAR__SHIFT,4,2 ## @GRPH_SWAP_CNTL__GRPH_RED_CROSSBAR__SHIFT
	.comm	_GRPH_BLUE_SEL_R,4,2            ## @GRPH_BLUE_SEL_R
	.comm	_GRPH_SWAP_CNTL__GRPH_BLUE_CROSSBAR__SHIFT,4,2 ## @GRPH_SWAP_CNTL__GRPH_BLUE_CROSSBAR__SHIFT
L_.str.1:                               ## @.str.1
	.asciz	"Unsupported screen format %s\n"

	.comm	_ARRAY_MODE,4,2                 ## @ARRAY_MODE
	.comm	_ARRAY_2D_TILED_THIN1,4,2       ## @ARRAY_2D_TILED_THIN1
	.comm	_BANK_WIDTH,4,2                 ## @BANK_WIDTH
	.comm	_BANK_HEIGHT,4,2                ## @BANK_HEIGHT
	.comm	_MACRO_TILE_ASPECT,4,2          ## @MACRO_TILE_ASPECT
	.comm	_TILE_SPLIT,4,2                 ## @TILE_SPLIT
	.comm	_NUM_BANKS,4,2                  ## @NUM_BANKS
	.comm	_GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT,4,2 ## @GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT
	.comm	_GRPH_ARRAY_2D_TILED_THIN1,4,2  ## @GRPH_ARRAY_2D_TILED_THIN1
	.comm	_GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT,4,2 ## @GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT
	.comm	_GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT,4,2 ## @GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT
	.comm	_GRPH_CONTROL__GRPH_BANK_WIDTH__SHIFT,4,2 ## @GRPH_CONTROL__GRPH_BANK_WIDTH__SHIFT
	.comm	_GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT,4,2 ## @GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT
	.comm	_GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT,4,2 ## @GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT
	.comm	_DISPLAY_MICRO_TILING,4,2       ## @DISPLAY_MICRO_TILING
	.comm	_GRPH_CONTROL__GRPH_MICRO_TILE_MODE__SHIFT,4,2 ## @GRPH_CONTROL__GRPH_MICRO_TILE_MODE__SHIFT
	.comm	_ARRAY_1D_TILED_THIN1,4,2       ## @ARRAY_1D_TILED_THIN1
	.comm	_GRPH_ARRAY_1D_TILED_THIN1,4,2  ## @GRPH_ARRAY_1D_TILED_THIN1
	.comm	_GRPH_CONTROL__GRPH_PIPE_CONFIG__SHIFT,4,2 ## @GRPH_CONTROL__GRPH_PIPE_CONFIG__SHIFT
	.comm	_mmGRPH_FLIP_CONTROL,8,3        ## @mmGRPH_FLIP_CONTROL
	.comm	_mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH,8,3 ## @mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH
	.comm	_mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH,8,3 ## @mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH
	.comm	_mmGRPH_PRIMARY_SURFACE_ADDRESS,8,3 ## @mmGRPH_PRIMARY_SURFACE_ADDRESS
	.comm	_GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK,4,2 ## @GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK
	.comm	_mmGRPH_SECONDARY_SURFACE_ADDRESS,8,3 ## @mmGRPH_SECONDARY_SURFACE_ADDRESS
	.comm	_GRPH_SECONDARY_SURFACE_ADDRESS__GRPH_SECONDARY_SURFACE_ADDRESS_MASK,4,2 ## @GRPH_SECONDARY_SURFACE_ADDRESS__GRPH_SECONDARY_SURFACE_ADDRESS_MASK
	.comm	_mmGRPH_CONTROL,8,3             ## @mmGRPH_CONTROL
	.comm	_mmGRPH_SWAP_CNTL,8,3           ## @mmGRPH_SWAP_CNTL
	.comm	_mmGRPH_LUT_10BIT_BYPASS_CONTROL,8,3 ## @mmGRPH_LUT_10BIT_BYPASS_CONTROL
	.comm	_LUT_10BIT_BYPASS_EN,4,2        ## @LUT_10BIT_BYPASS_EN
L_.str.2:                               ## @.str.2
	.asciz	"Bypassing hardware LUT due to 10 bit fb scanout.\n"

	.comm	_mmGRPH_SURFACE_OFFSET_X,8,3    ## @mmGRPH_SURFACE_OFFSET_X
	.comm	_mmGRPH_SURFACE_OFFSET_Y,8,3    ## @mmGRPH_SURFACE_OFFSET_Y
	.comm	_mmGRPH_X_START,8,3             ## @mmGRPH_X_START
	.comm	_mmGRPH_Y_START,8,3             ## @mmGRPH_Y_START
	.comm	_mmGRPH_X_END,8,3               ## @mmGRPH_X_END
	.comm	_mmGRPH_Y_END,8,3               ## @mmGRPH_Y_END
	.comm	_mmGRPH_PITCH,8,3               ## @mmGRPH_PITCH
	.comm	_mmLB_DESKTOP_HEIGHT,8,3        ## @mmLB_DESKTOP_HEIGHT
	.comm	_mmVIEWPORT_START,8,3           ## @mmVIEWPORT_START
	.comm	_mmVIEWPORT_SIZE,8,3            ## @mmVIEWPORT_SIZE
	.comm	_mmMASTER_UPDATE_MODE,8,3       ## @mmMASTER_UPDATE_MODE
	.comm	_GRPH_ENDIAN_8IN16,4,2          ## @GRPH_ENDIAN_8IN16
	.comm	_GRPH_ENDIAN_8IN32,4,2          ## @GRPH_ENDIAN_8IN32
	.no_dead_strip	_dce_v8_0_crtc_do_set_base
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_v8_0_crtc_do_set_base
_dce_v8_0_crtc_do_set_base:             ; @dce_v8_0_crtc_do_set_base
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #160
	.cfi_def_cfa_offset 160
	stp	x28, x27, [sp, #64]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #80]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #96]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #112]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #128]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #144]            ; 16-byte Folded Spill
	add	x29, sp, #144
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x4
	mov	x27, x3
	mov	x26, x2
	mov	x25, x1
	mov	x22, x0
	bl	_to_amdgpu_crtc
	mov	x23, x0
	ldr	x8, [x22, #16]
Lloh0:
	adrp	x9, _GRPH_ENDIAN_NONE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _GRPH_ENDIAN_NONE@GOTPAGEOFF]
	ldr	x28, [x8]
Lloh2:
	ldr	w19, [x9]
Lloh3:
	adrp	x8, _GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w24, [x8]
	mov	x20, x25
	cbnz	w21, LBB0_2
; %bb.1:
	ldr	x8, [x22]
	ldr	x20, [x8]
	cbz	x20, LBB0_7
LBB0_2:
	stp	w27, w26, [sp, #40]             ; 8-byte Folded Spill
	ldr	x8, [x20, #16]
	ldr	x0, [x8]
	bl	_gem_to_amdgpu_bo
	mov	x27, x0
	mov	w1, #0
	bl	_amdgpu_bo_reserve
	mov	x26, x0
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbnz	x0, LBB0_36
; %bb.3:
	cbz	w21, LBB0_8
LBB0_4:
	mov	x0, x27
	bl	_amdgpu_bo_gpu_offset
	mov	x26, x0
	add	x1, sp, #56
	mov	x0, x27
	bl	_amdgpu_bo_get_tiling_flags
	mov	x0, x27
	bl	_amdgpu_bo_unreserve
	ldr	x0, [sp, #56]
Lloh6:
	adrp	x8, _PIPE_CONFIG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PIPE_CONFIG@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
	mov	x9, x0
	ldr	x8, [x20, #24]
	ldr	w0, [x8]
	sub	w8, w0, #128
	cmp	w8, #15
	b.hi	LBB0_18
; %bb.5:
	str	w9, [sp, #20]                   ; 4-byte Folded Spill
	str	x26, [sp, #24]                  ; 8-byte Folded Spill
	lsl	w27, w19, w24
Lloh9:
	adrp	x9, lJTI0_0@PAGE
Lloh10:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_6
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_6:
Lloh11:
	adrp	x8, _GRPH_DEPTH_32BPP@GOTPAGE
Lloh12:
	ldr	x8, [x8, _GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh13:
	adrp	x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGE
Lloh14:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
Lloh16:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh17:
	adrp	x9, _GRPH_FORMAT_ARGB8888@GOTPAGE
Lloh18:
	ldr	x9, [x9, _GRPH_FORMAT_ARGB8888@GOTPAGEOFF]
	b	LBB0_21
LBB0_7:
Lloh19:
	adrp	x0, l_.str@PAGE
Lloh20:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
	b	LBB0_35
LBB0_8:
Lloh21:
	adrp	x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGE
Lloh22:
	ldr	x8, [x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x27
	bl	_amdgpu_bo_pin
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbz	x0, LBB0_4
; %bb.9:
	mov	x0, x27
	bl	_amdgpu_bo_unreserve
LBB0_10:
Lloh24:
	adrp	x8, _EINVAL@GOTPAGE
Lloh25:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	neg	w26, w8
	b	LBB0_36
LBB0_11:
Lloh27:
	adrp	x8, _GRPH_DEPTH_16BPP@GOTPAGE
Lloh28:
	ldr	x8, [x8, _GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh29:
	adrp	x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGE
Lloh30:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
Lloh32:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh33:
	adrp	x9, _GRPH_FORMAT_ARGB4444@GOTPAGE
Lloh34:
	ldr	x9, [x9, _GRPH_FORMAT_ARGB4444@GOTPAGEOFF]
	b	LBB0_21
LBB0_12:
	str	wzr, [sp, #16]                  ; 4-byte Folded Spill
Lloh35:
	adrp	x8, _GRPH_DEPTH_32BPP@GOTPAGE
Lloh36:
	ldr	x8, [x8, _GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
Lloh38:
	adrp	x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGE
Lloh39:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh41:
	adrp	x9, _GRPH_FORMAT_ARGB2101010@GOTPAGE
Lloh42:
	ldr	x9, [x9, _GRPH_FORMAT_ARGB2101010@GOTPAGEOFF]
	b	LBB0_17
LBB0_13:
Lloh43:
	adrp	x8, _GRPH_DEPTH_16BPP@GOTPAGE
Lloh44:
	ldr	x8, [x8, _GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh45:
	adrp	x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGE
Lloh46:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGEOFF]
Lloh47:
	ldr	w8, [x8]
Lloh48:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh49:
	adrp	x9, _GRPH_FORMAT_ARGB1555@GOTPAGE
Lloh50:
	ldr	x9, [x9, _GRPH_FORMAT_ARGB1555@GOTPAGEOFF]
	b	LBB0_21
LBB0_14:
Lloh51:
	adrp	x8, _GRPH_DEPTH_32BPP@GOTPAGE
Lloh52:
	ldr	x8, [x8, _GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh53:
	ldr	w8, [x8]
Lloh54:
	adrp	x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGE
Lloh55:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh57:
	adrp	x9, _GRPH_FORMAT_ARGB8888@GOTPAGE
Lloh58:
	ldr	x9, [x9, _GRPH_FORMAT_ARGB8888@GOTPAGEOFF]
Lloh59:
	ldr	w9, [x9]
Lloh60:
	adrp	x10, _GRPH_CONTROL__GRPH_FORMAT__SHIFT@GOTPAGE
Lloh61:
	ldr	x10, [x10, _GRPH_CONTROL__GRPH_FORMAT__SHIFT@GOTPAGEOFF]
Lloh62:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w26, w9, w8
Lloh63:
	adrp	x8, _GRPH_RED_SEL_B@GOTPAGE
Lloh64:
	ldr	x8, [x8, _GRPH_RED_SEL_B@GOTPAGEOFF]
Lloh65:
	adrp	x9, _GRPH_SWAP_CNTL__GRPH_RED_CROSSBAR__SHIFT@GOTPAGE
Lloh66:
	ldr	x9, [x9, _GRPH_SWAP_CNTL__GRPH_RED_CROSSBAR__SHIFT@GOTPAGEOFF]
Lloh67:
	ldr	w8, [x8]
Lloh68:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh69:
	adrp	x9, _GRPH_BLUE_SEL_R@GOTPAGE
Lloh70:
	ldr	x9, [x9, _GRPH_BLUE_SEL_R@GOTPAGEOFF]
Lloh71:
	ldr	w9, [x9]
Lloh72:
	adrp	x10, _GRPH_SWAP_CNTL__GRPH_BLUE_CROSSBAR__SHIFT@GOTPAGE
Lloh73:
	ldr	x10, [x10, _GRPH_SWAP_CNTL__GRPH_BLUE_CROSSBAR__SHIFT@GOTPAGEOFF]
Lloh74:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w27, w9, w8
	b	LBB0_22
LBB0_15:
Lloh75:
	adrp	x8, _GRPH_DEPTH_16BPP@GOTPAGE
Lloh76:
	ldr	x8, [x8, _GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh77:
	adrp	x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGE
Lloh78:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGEOFF]
Lloh79:
	ldr	w8, [x8]
Lloh80:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh81:
	adrp	x9, _GRPH_FORMAT_BGRA5551@GOTPAGE
Lloh82:
	ldr	x9, [x9, _GRPH_FORMAT_BGRA5551@GOTPAGEOFF]
	b	LBB0_21
LBB0_16:
	str	wzr, [sp, #16]                  ; 4-byte Folded Spill
Lloh83:
	adrp	x8, _GRPH_DEPTH_32BPP@GOTPAGE
Lloh84:
	ldr	x8, [x8, _GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh85:
	ldr	w8, [x8]
Lloh86:
	adrp	x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGE
Lloh87:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGEOFF]
Lloh88:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh89:
	adrp	x9, _GRPH_FORMAT_BGRA1010102@GOTPAGE
Lloh90:
	ldr	x9, [x9, _GRPH_FORMAT_BGRA1010102@GOTPAGEOFF]
LBB0_17:
	ldr	w9, [x9]
Lloh91:
	adrp	x10, _GRPH_CONTROL__GRPH_FORMAT__SHIFT@GOTPAGE
Lloh92:
	ldr	x10, [x10, _GRPH_CONTROL__GRPH_FORMAT__SHIFT@GOTPAGEOFF]
Lloh93:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w26, w9, w8
	b	LBB0_23
LBB0_18:
	add	x1, sp, #48
	bl	_drm_get_format_name
	mov	x1, x0
Lloh94:
	adrp	x0, l_.str.1@PAGE
Lloh95:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_10
LBB0_19:
Lloh96:
	adrp	x8, _GRPH_DEPTH_16BPP@GOTPAGE
Lloh97:
	ldr	x8, [x8, _GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh98:
	adrp	x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGE
Lloh99:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGEOFF]
Lloh100:
	ldr	w8, [x8]
Lloh101:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh102:
	adrp	x9, _GRPH_FORMAT_ARGB565@GOTPAGE
Lloh103:
	ldr	x9, [x9, _GRPH_FORMAT_ARGB565@GOTPAGEOFF]
	b	LBB0_21
LBB0_20:
Lloh104:
	adrp	x8, _GRPH_DEPTH_8BPP@GOTPAGE
Lloh105:
	ldr	x8, [x8, _GRPH_DEPTH_8BPP@GOTPAGEOFF]
Lloh106:
	adrp	x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGE
Lloh107:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_DEPTH__SHIFT@GOTPAGEOFF]
Lloh108:
	ldr	w8, [x8]
Lloh109:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh110:
	adrp	x9, _GRPH_FORMAT_INDEXED@GOTPAGE
Lloh111:
	ldr	x9, [x9, _GRPH_FORMAT_INDEXED@GOTPAGEOFF]
LBB0_21:
	ldr	w9, [x9]
Lloh112:
	adrp	x10, _GRPH_CONTROL__GRPH_FORMAT__SHIFT@GOTPAGE
Lloh113:
	ldr	x10, [x10, _GRPH_CONTROL__GRPH_FORMAT__SHIFT@GOTPAGEOFF]
Lloh114:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w26, w9, w8
LBB0_22:
	mov	w8, #1
	str	w8, [sp, #16]                   ; 4-byte Folded Spill
LBB0_23:
	ldr	x0, [sp, #56]
Lloh115:
	adrp	x19, _ARRAY_MODE@GOTPAGE
Lloh116:
	ldr	x19, [x19, _ARRAY_MODE@GOTPAGEOFF]
	ldr	w1, [x19]
	bl	_AMDGPU_TILING_GET
	mov	x8, x0
Lloh117:
	adrp	x9, _ARRAY_2D_TILED_THIN1@GOTPAGE
Lloh118:
	ldr	x9, [x9, _ARRAY_2D_TILED_THIN1@GOTPAGEOFF]
Lloh119:
	ldr	w9, [x9]
	ldr	x0, [sp, #56]
	cmp	w8, w9
	str	x28, [sp, #32]                  ; 8-byte Folded Spill
	b.ne	LBB0_25
; %bb.24:
Lloh120:
	adrp	x8, _BANK_WIDTH@GOTPAGE
Lloh121:
	ldr	x8, [x8, _BANK_WIDTH@GOTPAGEOFF]
Lloh122:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
	str	w27, [sp, #12]                  ; 4-byte Folded Spill
	mov	x27, x0
	ldr	x0, [sp, #56]
Lloh123:
	adrp	x8, _BANK_HEIGHT@GOTPAGE
Lloh124:
	ldr	x8, [x8, _BANK_HEIGHT@GOTPAGEOFF]
Lloh125:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
	mov	x28, x0
	ldr	x0, [sp, #56]
Lloh126:
	adrp	x8, _MACRO_TILE_ASPECT@GOTPAGE
Lloh127:
	ldr	x8, [x8, _MACRO_TILE_ASPECT@GOTPAGEOFF]
Lloh128:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
	mov	x19, x0
	ldr	x0, [sp, #56]
Lloh129:
	adrp	x8, _TILE_SPLIT@GOTPAGE
Lloh130:
	ldr	x8, [x8, _TILE_SPLIT@GOTPAGEOFF]
Lloh131:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
	mov	x24, x0
	ldr	x0, [sp, #56]
Lloh132:
	adrp	x8, _NUM_BANKS@GOTPAGE
Lloh133:
	ldr	x8, [x8, _NUM_BANKS@GOTPAGEOFF]
Lloh134:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
Lloh135:
	adrp	x8, _GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT@GOTPAGE
Lloh136:
	ldr	x8, [x8, _GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT@GOTPAGEOFF]
Lloh137:
	ldr	w8, [x8]
	lsl	w8, w0, w8
	orr	w8, w8, w26
Lloh138:
	adrp	x9, _GRPH_ARRAY_2D_TILED_THIN1@GOTPAGE
Lloh139:
	ldr	x9, [x9, _GRPH_ARRAY_2D_TILED_THIN1@GOTPAGEOFF]
Lloh140:
	ldr	w9, [x9]
Lloh141:
	adrp	x10, _GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT@GOTPAGE
Lloh142:
	ldr	x10, [x10, _GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT@GOTPAGEOFF]
Lloh143:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w8, w9
Lloh144:
	adrp	x9, _GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT@GOTPAGE
Lloh145:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT@GOTPAGEOFF]
Lloh146:
	ldr	w9, [x9]
	lsl	w9, w24, w9
	orr	w8, w8, w9
Lloh147:
	adrp	x9, _GRPH_CONTROL__GRPH_BANK_WIDTH__SHIFT@GOTPAGE
Lloh148:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_BANK_WIDTH__SHIFT@GOTPAGEOFF]
Lloh149:
	ldr	w9, [x9]
	lsl	w9, w27, w9
	ldr	w27, [sp, #12]                  ; 4-byte Folded Reload
	orr	w8, w8, w9
Lloh150:
	adrp	x9, _GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT@GOTPAGE
Lloh151:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT@GOTPAGEOFF]
Lloh152:
	ldr	w9, [x9]
	lsl	w9, w28, w9
Lloh153:
	adrp	x10, _GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT@GOTPAGE
Lloh154:
	ldr	x10, [x10, _GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh155:
	ldr	w9, [x10]
	lsl	w9, w19, w9
	orr	w8, w8, w9
Lloh156:
	adrp	x9, _DISPLAY_MICRO_TILING@GOTPAGE
Lloh157:
	ldr	x9, [x9, _DISPLAY_MICRO_TILING@GOTPAGEOFF]
Lloh158:
	ldr	w9, [x9]
Lloh159:
	adrp	x10, _GRPH_CONTROL__GRPH_MICRO_TILE_MODE__SHIFT@GOTPAGE
Lloh160:
	ldr	x10, [x10, _GRPH_CONTROL__GRPH_MICRO_TILE_MODE__SHIFT@GOTPAGEOFF]
Lloh161:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w26, w8, w9
	b	LBB0_27
LBB0_25:
	ldr	w1, [x19]
	bl	_AMDGPU_TILING_GET
Lloh162:
	adrp	x8, _ARRAY_1D_TILED_THIN1@GOTPAGE
Lloh163:
	ldr	x8, [x8, _ARRAY_1D_TILED_THIN1@GOTPAGEOFF]
Lloh164:
	ldr	w8, [x8]
	cmp	w0, w8
	b.ne	LBB0_27
; %bb.26:
Lloh165:
	adrp	x8, _GRPH_ARRAY_1D_TILED_THIN1@GOTPAGE
Lloh166:
	ldr	x8, [x8, _GRPH_ARRAY_1D_TILED_THIN1@GOTPAGEOFF]
Lloh167:
	ldr	w8, [x8]
Lloh168:
	adrp	x9, _GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT@GOTPAGE
Lloh169:
	ldr	x9, [x9, _GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT@GOTPAGEOFF]
Lloh170:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	orr	w26, w8, w26
LBB0_27:
	ldr	w24, [sp, #40]                  ; 4-byte Folded Reload
	ldr	w9, [sp, #20]                   ; 4-byte Folded Reload
Lloh171:
	adrp	x8, _GRPH_CONTROL__GRPH_PIPE_CONFIG__SHIFT@GOTPAGE
Lloh172:
	ldr	x8, [x8, _GRPH_CONTROL__GRPH_PIPE_CONFIG__SHIFT@GOTPAGEOFF]
Lloh173:
	ldr	w8, [x8]
	lsl	w8, w9, w8
	orr	w28, w8, w26
	mov	x0, x22
	mov	w1, #0
	bl	_dce_v8_0_vga_enable
Lloh174:
	adrp	x8, _mmGRPH_FLIP_CONTROL@GOTPAGE
Lloh175:
	ldr	x8, [x8, _mmGRPH_FLIP_CONTROL@GOTPAGEOFF]
Lloh176:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh177:
	adrp	x8, _mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh178:
	ldr	x8, [x8, _mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
Lloh179:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x19, x9, x8
	ldr	x26, [sp, #24]                  ; 8-byte Folded Reload
	mov	x0, x26
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_WREG32
Lloh180:
	adrp	x8, _mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh181:
	ldr	x8, [x8, _mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
Lloh182:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x19, x9, x8
	mov	x0, x26
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_WREG32
Lloh183:
	adrp	x8, _mmGRPH_PRIMARY_SURFACE_ADDRESS@GOTPAGE
Lloh184:
	ldr	x8, [x8, _mmGRPH_PRIMARY_SURFACE_ADDRESS@GOTPAGEOFF]
Lloh185:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
Lloh186:
	adrp	x8, _GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK@GOTPAGE
Lloh187:
	ldr	x8, [x8, _GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK@GOTPAGEOFF]
Lloh188:
	ldr	w8, [x8]
	and	w1, w8, w26
	bl	_WREG32
Lloh189:
	adrp	x8, _mmGRPH_SECONDARY_SURFACE_ADDRESS@GOTPAGE
Lloh190:
	ldr	x8, [x8, _mmGRPH_SECONDARY_SURFACE_ADDRESS@GOTPAGEOFF]
Lloh191:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
Lloh192:
	adrp	x8, _GRPH_SECONDARY_SURFACE_ADDRESS__GRPH_SECONDARY_SURFACE_ADDRESS_MASK@GOTPAGE
Lloh193:
	ldr	x8, [x8, _GRPH_SECONDARY_SURFACE_ADDRESS__GRPH_SECONDARY_SURFACE_ADDRESS_MASK@GOTPAGEOFF]
Lloh194:
	ldr	w8, [x8]
	and	w1, w8, w26
	bl	_WREG32
Lloh195:
	adrp	x8, _mmGRPH_CONTROL@GOTPAGE
Lloh196:
	ldr	x8, [x8, _mmGRPH_CONTROL@GOTPAGEOFF]
Lloh197:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	x1, x28
	bl	_WREG32
Lloh198:
	adrp	x8, _mmGRPH_SWAP_CNTL@GOTPAGE
Lloh199:
	ldr	x8, [x8, _mmGRPH_SWAP_CNTL@GOTPAGEOFF]
Lloh200:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	x1, x27
	bl	_WREG32
Lloh201:
	adrp	x8, _mmGRPH_LUT_10BIT_BYPASS_CONTROL@GOTPAGE
Lloh202:
	ldr	x8, [x8, _mmGRPH_LUT_10BIT_BYPASS_CONTROL@GOTPAGEOFF]
Lloh203:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
Lloh204:
	adrp	x8, _LUT_10BIT_BYPASS_EN@GOTPAGE
Lloh205:
	ldr	x8, [x8, _LUT_10BIT_BYPASS_EN@GOTPAGEOFF]
Lloh206:
	ldr	w8, [x8]
	ldr	w19, [sp, #16]                  ; 4-byte Folded Reload
	cmp	w19, #0
	csel	w1, wzr, w8, ne
	mvn	w2, w8
	bl	_WREG32_P
	tbnz	w19, #0, LBB0_29
; %bb.28:
Lloh207:
	adrp	x0, l_.str.2@PAGE
Lloh208:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_DEBUG_KMS
LBB0_29:
Lloh209:
	adrp	x8, _mmGRPH_SURFACE_OFFSET_X@GOTPAGE
Lloh210:
	ldr	x8, [x8, _mmGRPH_SURFACE_OFFSET_X@GOTPAGEOFF]
Lloh211:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh212:
	adrp	x8, _mmGRPH_SURFACE_OFFSET_Y@GOTPAGE
Lloh213:
	ldr	x8, [x8, _mmGRPH_SURFACE_OFFSET_Y@GOTPAGEOFF]
Lloh214:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh215:
	adrp	x8, _mmGRPH_X_START@GOTPAGE
Lloh216:
	ldr	x8, [x8, _mmGRPH_X_START@GOTPAGEOFF]
Lloh217:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh218:
	adrp	x8, _mmGRPH_Y_START@GOTPAGE
Lloh219:
	ldr	x8, [x8, _mmGRPH_Y_START@GOTPAGEOFF]
Lloh220:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh221:
	adrp	x8, _mmGRPH_X_END@GOTPAGE
Lloh222:
	ldr	x8, [x8, _mmGRPH_X_END@GOTPAGEOFF]
Lloh223:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	ldr	w1, [x20]
	bl	_WREG32
Lloh224:
	adrp	x8, _mmGRPH_Y_END@GOTPAGE
Lloh225:
	ldr	x8, [x8, _mmGRPH_Y_END@GOTPAGEOFF]
Lloh226:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	ldr	w1, [x20, #4]
	bl	_WREG32
	ldr	x8, [x20, #8]
	ldr	w8, [x8]
	ldr	x9, [x20, #24]
	ldr	x9, [x9, #8]
	ldr	w9, [x9]
	udiv	w1, w8, w9
Lloh227:
	adrp	x8, _mmGRPH_PITCH@GOTPAGE
Lloh228:
	ldr	x8, [x8, _mmGRPH_PITCH@GOTPAGEOFF]
Lloh229:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	bl	_WREG32
	mov	x0, x22
	mov	w1, #1
	bl	_dce_v8_0_grph_enable
Lloh230:
	adrp	x8, _mmLB_DESKTOP_HEIGHT@GOTPAGE
Lloh231:
	ldr	x8, [x8, _mmLB_DESKTOP_HEIGHT@GOTPAGEOFF]
Lloh232:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	ldr	w1, [x20, #4]
	bl	_WREG32
	and	w8, w24, #0xfffffffe
Lloh233:
	adrp	x9, _mmVIEWPORT_START@GOTPAGE
Lloh234:
	ldr	x9, [x9, _mmVIEWPORT_START@GOTPAGEOFF]
Lloh235:
	ldr	x9, [x9]
	ldr	x10, [x23]
	add	x0, x10, x9
	ldr	w9, [sp, #44]                   ; 4-byte Folded Reload
	lsl	w9, w9, #16
	and	w9, w9, #0xfffc0000
	orr	w1, w9, w8
	bl	_WREG32
	ldp	w8, w9, [x22, #8]
	add	w9, w9, #1
	and	w9, w9, #0xfffffffe
Lloh236:
	adrp	x10, _mmVIEWPORT_SIZE@GOTPAGE
Lloh237:
	ldr	x10, [x10, _mmVIEWPORT_SIZE@GOTPAGEOFF]
Lloh238:
	ldr	x10, [x10]
	ldr	x11, [x23]
	add	x0, x11, x10
	orr	w1, w9, w8, lsl #16
	bl	_WREG32
Lloh239:
	adrp	x8, _mmMASTER_UPDATE_MODE@GOTPAGE
Lloh240:
	ldr	x8, [x8, _mmMASTER_UPDATE_MODE@GOTPAGEOFF]
Lloh241:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	ldr	x19, [sp, #32]                  ; 8-byte Folded Reload
	cbz	x25, LBB0_34
; %bb.30:
	cbnz	w21, LBB0_34
; %bb.31:
	ldr	x8, [x22]
	ldr	x8, [x8]
	cmp	x8, x25
	b.eq	LBB0_34
; %bb.32:
	ldr	x8, [x25, #16]
	ldr	x0, [x8]
	bl	_gem_to_amdgpu_bo
	mov	x20, x0
	mov	w1, #1
	bl	_amdgpu_bo_reserve
	mov	x26, x0
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbnz	x0, LBB0_36
; %bb.33:
	mov	x0, x20
	bl	_amdgpu_bo_unpin
	mov	x0, x20
	bl	_amdgpu_bo_unreserve
LBB0_34:
	mov	x0, x19
	bl	_dce_v8_0_bandwidth_update
LBB0_35:
	mov	w26, #0
LBB0_36:
	mov	x0, x26
	ldp	x29, x30, [sp, #144]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #128]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #112]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #96]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #80]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #160
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh15
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh31
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh47
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh67
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh79
	.loh AdrpLdrGot	Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpAdd	Lloh94, Lloh95
	.loh AdrpLdrGot	Lloh102, Lloh103
	.loh AdrpLdrGotLdr	Lloh98, Lloh99, Lloh101
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh100
	.loh AdrpLdrGot	Lloh110, Lloh111
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh109
	.loh AdrpLdrGotLdr	Lloh104, Lloh105, Lloh108
	.loh AdrpLdrGotLdr	Lloh112, Lloh113, Lloh114
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.loh AdrpLdrGot	Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh159, Lloh160, Lloh161
	.loh AdrpLdrGotLdr	Lloh156, Lloh157, Lloh158
	.loh AdrpLdrGotLdr	Lloh153, Lloh154, Lloh155
	.loh AdrpLdrGotLdr	Lloh150, Lloh151, Lloh152
	.loh AdrpLdrGotLdr	Lloh147, Lloh148, Lloh149
	.loh AdrpLdrGotLdr	Lloh144, Lloh145, Lloh146
	.loh AdrpLdrGotLdr	Lloh141, Lloh142, Lloh143
	.loh AdrpLdrGotLdr	Lloh138, Lloh139, Lloh140
	.loh AdrpLdrGotLdr	Lloh135, Lloh136, Lloh137
	.loh AdrpLdrGotLdr	Lloh132, Lloh133, Lloh134
	.loh AdrpLdrGotLdr	Lloh129, Lloh130, Lloh131
	.loh AdrpLdrGotLdr	Lloh126, Lloh127, Lloh128
	.loh AdrpLdrGotLdr	Lloh123, Lloh124, Lloh125
	.loh AdrpLdrGotLdr	Lloh120, Lloh121, Lloh122
	.loh AdrpLdrGotLdr	Lloh162, Lloh163, Lloh164
	.loh AdrpLdrGotLdr	Lloh168, Lloh169, Lloh170
	.loh AdrpLdrGotLdr	Lloh165, Lloh166, Lloh167
	.loh AdrpLdrGotLdr	Lloh204, Lloh205, Lloh206
	.loh AdrpLdrGotLdr	Lloh201, Lloh202, Lloh203
	.loh AdrpLdrGotLdr	Lloh198, Lloh199, Lloh200
	.loh AdrpLdrGotLdr	Lloh195, Lloh196, Lloh197
	.loh AdrpLdrGotLdr	Lloh192, Lloh193, Lloh194
	.loh AdrpLdrGotLdr	Lloh189, Lloh190, Lloh191
	.loh AdrpLdrGotLdr	Lloh186, Lloh187, Lloh188
	.loh AdrpLdrGotLdr	Lloh183, Lloh184, Lloh185
	.loh AdrpLdrGotLdr	Lloh180, Lloh181, Lloh182
	.loh AdrpLdrGotLdr	Lloh177, Lloh178, Lloh179
	.loh AdrpLdrGotLdr	Lloh174, Lloh175, Lloh176
	.loh AdrpLdrGotLdr	Lloh171, Lloh172, Lloh173
	.loh AdrpAdd	Lloh207, Lloh208
	.loh AdrpLdrGotLdr	Lloh239, Lloh240, Lloh241
	.loh AdrpLdrGotLdr	Lloh236, Lloh237, Lloh238
	.loh AdrpLdrGotLdr	Lloh233, Lloh234, Lloh235
	.loh AdrpLdrGotLdr	Lloh230, Lloh231, Lloh232
	.loh AdrpLdrGotLdr	Lloh227, Lloh228, Lloh229
	.loh AdrpLdrGotLdr	Lloh224, Lloh225, Lloh226
	.loh AdrpLdrGotLdr	Lloh221, Lloh222, Lloh223
	.loh AdrpLdrGotLdr	Lloh218, Lloh219, Lloh220
	.loh AdrpLdrGotLdr	Lloh215, Lloh216, Lloh217
	.loh AdrpLdrGotLdr	Lloh212, Lloh213, Lloh214
	.loh AdrpLdrGotLdr	Lloh209, Lloh210, Lloh211
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_6-LBB0_6)>>2
	.byte	(LBB0_11-LBB0_6)>>2
	.byte	(LBB0_12-LBB0_6)>>2
	.byte	(LBB0_13-LBB0_6)>>2
	.byte	(LBB0_14-LBB0_6)>>2
	.byte	(LBB0_19-LBB0_6)>>2
	.byte	(LBB0_20-LBB0_6)>>2
	.byte	(LBB0_15-LBB0_6)>>2
	.byte	(LBB0_16-LBB0_6)>>2
	.byte	(LBB0_15-LBB0_6)>>2
	.byte	(LBB0_16-LBB0_6)>>2
	.byte	(LBB0_6-LBB0_6)>>2
	.byte	(LBB0_11-LBB0_6)>>2
	.byte	(LBB0_12-LBB0_6)>>2
	.byte	(LBB0_13-LBB0_6)>>2
	.byte	(LBB0_14-LBB0_6)>>2
                                        ; -- End function
	.comm	_GRPH_ENDIAN_NONE,4,2           ; @GRPH_ENDIAN_NONE
	.comm	_GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT,4,2 ; @GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"No FB bound\n"

	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ; @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_PIPE_CONFIG,4,2                ; @PIPE_CONFIG
	.comm	_GRPH_DEPTH_8BPP,4,2            ; @GRPH_DEPTH_8BPP
	.comm	_GRPH_CONTROL__GRPH_DEPTH__SHIFT,4,2 ; @GRPH_CONTROL__GRPH_DEPTH__SHIFT
	.comm	_GRPH_FORMAT_INDEXED,4,2        ; @GRPH_FORMAT_INDEXED
	.comm	_GRPH_CONTROL__GRPH_FORMAT__SHIFT,4,2 ; @GRPH_CONTROL__GRPH_FORMAT__SHIFT
	.comm	_GRPH_DEPTH_16BPP,4,2           ; @GRPH_DEPTH_16BPP
	.comm	_GRPH_FORMAT_ARGB4444,4,2       ; @GRPH_FORMAT_ARGB4444
	.comm	_GRPH_FORMAT_ARGB1555,4,2       ; @GRPH_FORMAT_ARGB1555
	.comm	_GRPH_FORMAT_BGRA5551,4,2       ; @GRPH_FORMAT_BGRA5551
	.comm	_GRPH_FORMAT_ARGB565,4,2        ; @GRPH_FORMAT_ARGB565
	.comm	_GRPH_DEPTH_32BPP,4,2           ; @GRPH_DEPTH_32BPP
	.comm	_GRPH_FORMAT_ARGB8888,4,2       ; @GRPH_FORMAT_ARGB8888
	.comm	_GRPH_FORMAT_ARGB2101010,4,2    ; @GRPH_FORMAT_ARGB2101010
	.comm	_GRPH_FORMAT_BGRA1010102,4,2    ; @GRPH_FORMAT_BGRA1010102
	.comm	_GRPH_RED_SEL_B,4,2             ; @GRPH_RED_SEL_B
	.comm	_GRPH_SWAP_CNTL__GRPH_RED_CROSSBAR__SHIFT,4,2 ; @GRPH_SWAP_CNTL__GRPH_RED_CROSSBAR__SHIFT
	.comm	_GRPH_BLUE_SEL_R,4,2            ; @GRPH_BLUE_SEL_R
	.comm	_GRPH_SWAP_CNTL__GRPH_BLUE_CROSSBAR__SHIFT,4,2 ; @GRPH_SWAP_CNTL__GRPH_BLUE_CROSSBAR__SHIFT
l_.str.1:                               ; @.str.1
	.asciz	"Unsupported screen format %s\n"

	.comm	_ARRAY_MODE,4,2                 ; @ARRAY_MODE
	.comm	_ARRAY_2D_TILED_THIN1,4,2       ; @ARRAY_2D_TILED_THIN1
	.comm	_BANK_WIDTH,4,2                 ; @BANK_WIDTH
	.comm	_BANK_HEIGHT,4,2                ; @BANK_HEIGHT
	.comm	_MACRO_TILE_ASPECT,4,2          ; @MACRO_TILE_ASPECT
	.comm	_TILE_SPLIT,4,2                 ; @TILE_SPLIT
	.comm	_NUM_BANKS,4,2                  ; @NUM_BANKS
	.comm	_GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT,4,2 ; @GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT
	.comm	_GRPH_ARRAY_2D_TILED_THIN1,4,2  ; @GRPH_ARRAY_2D_TILED_THIN1
	.comm	_GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT,4,2 ; @GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT
	.comm	_GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT,4,2 ; @GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT
	.comm	_GRPH_CONTROL__GRPH_BANK_WIDTH__SHIFT,4,2 ; @GRPH_CONTROL__GRPH_BANK_WIDTH__SHIFT
	.comm	_GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT,4,2 ; @GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT
	.comm	_GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT,4,2 ; @GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT
	.comm	_DISPLAY_MICRO_TILING,4,2       ; @DISPLAY_MICRO_TILING
	.comm	_GRPH_CONTROL__GRPH_MICRO_TILE_MODE__SHIFT,4,2 ; @GRPH_CONTROL__GRPH_MICRO_TILE_MODE__SHIFT
	.comm	_ARRAY_1D_TILED_THIN1,4,2       ; @ARRAY_1D_TILED_THIN1
	.comm	_GRPH_ARRAY_1D_TILED_THIN1,4,2  ; @GRPH_ARRAY_1D_TILED_THIN1
	.comm	_GRPH_CONTROL__GRPH_PIPE_CONFIG__SHIFT,4,2 ; @GRPH_CONTROL__GRPH_PIPE_CONFIG__SHIFT
	.comm	_mmGRPH_FLIP_CONTROL,8,3        ; @mmGRPH_FLIP_CONTROL
	.comm	_mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH,8,3 ; @mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH
	.comm	_mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH,8,3 ; @mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH
	.comm	_mmGRPH_PRIMARY_SURFACE_ADDRESS,8,3 ; @mmGRPH_PRIMARY_SURFACE_ADDRESS
	.comm	_GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK,4,2 ; @GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK
	.comm	_mmGRPH_SECONDARY_SURFACE_ADDRESS,8,3 ; @mmGRPH_SECONDARY_SURFACE_ADDRESS
	.comm	_GRPH_SECONDARY_SURFACE_ADDRESS__GRPH_SECONDARY_SURFACE_ADDRESS_MASK,4,2 ; @GRPH_SECONDARY_SURFACE_ADDRESS__GRPH_SECONDARY_SURFACE_ADDRESS_MASK
	.comm	_mmGRPH_CONTROL,8,3             ; @mmGRPH_CONTROL
	.comm	_mmGRPH_SWAP_CNTL,8,3           ; @mmGRPH_SWAP_CNTL
	.comm	_mmGRPH_LUT_10BIT_BYPASS_CONTROL,8,3 ; @mmGRPH_LUT_10BIT_BYPASS_CONTROL
	.comm	_LUT_10BIT_BYPASS_EN,4,2        ; @LUT_10BIT_BYPASS_EN
l_.str.2:                               ; @.str.2
	.asciz	"Bypassing hardware LUT due to 10 bit fb scanout.\n"

	.comm	_mmGRPH_SURFACE_OFFSET_X,8,3    ; @mmGRPH_SURFACE_OFFSET_X
	.comm	_mmGRPH_SURFACE_OFFSET_Y,8,3    ; @mmGRPH_SURFACE_OFFSET_Y
	.comm	_mmGRPH_X_START,8,3             ; @mmGRPH_X_START
	.comm	_mmGRPH_Y_START,8,3             ; @mmGRPH_Y_START
	.comm	_mmGRPH_X_END,8,3               ; @mmGRPH_X_END
	.comm	_mmGRPH_Y_END,8,3               ; @mmGRPH_Y_END
	.comm	_mmGRPH_PITCH,8,3               ; @mmGRPH_PITCH
	.comm	_mmLB_DESKTOP_HEIGHT,8,3        ; @mmLB_DESKTOP_HEIGHT
	.comm	_mmVIEWPORT_START,8,3           ; @mmVIEWPORT_START
	.comm	_mmVIEWPORT_SIZE,8,3            ; @mmVIEWPORT_SIZE
	.comm	_mmMASTER_UPDATE_MODE,8,3       ; @mmMASTER_UPDATE_MODE
	.comm	_GRPH_ENDIAN_8IN16,4,2          ; @GRPH_ENDIAN_8IN16
	.comm	_GRPH_ENDIAN_8IN32,4,2          ; @GRPH_ENDIAN_8IN32
	.no_dead_strip	_dce_v8_0_crtc_do_set_base
.subsections_via_symbols
