	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function etnaviv_iommuv1_restore
_etnaviv_iommuv1_restore:               ## @etnaviv_iommuv1_restore
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r12
	movq	%rsi, %rdi
	callq	_to_v1_context
	movq	%rax, %r14
	movq	_VIVS_MC_MEMORY_BASE_ADDR_RA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	(%r15), %rax
	movq	(%rax), %rdx
	movq	%r12, %rdi
	callq	_gpu_write
	movq	_VIVS_MC_MEMORY_BASE_ADDR_FE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	(%r15), %rax
	movq	(%rax), %rdx
	movq	%r12, %rdi
	callq	_gpu_write
	movq	_VIVS_MC_MEMORY_BASE_ADDR_TX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	(%r15), %rax
	movq	(%rax), %rdx
	movq	%r12, %rdi
	callq	_gpu_write
	movq	_VIVS_MC_MEMORY_BASE_ADDR_PEZ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	(%r15), %rax
	movq	(%rax), %rdx
	movq	%r12, %rdi
	callq	_gpu_write
	movq	_VIVS_MC_MEMORY_BASE_ADDR_PE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	(%r15), %rax
	movq	(%rax), %rdx
	movq	%r12, %rdi
	callq	_gpu_write
	movq	(%r14), %rbx
	movq	_VIVS_MC_MMU_FE_PAGE_TABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	callq	_gpu_write
	movq	_VIVS_MC_MMU_TX_PAGE_TABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	callq	_gpu_write
	movq	_VIVS_MC_MMU_PE_PAGE_TABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	callq	_gpu_write
	movq	_VIVS_MC_MMU_PEZ_PAGE_TABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	callq	_gpu_write
	movq	_VIVS_MC_MMU_RA_PAGE_TABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_gpu_write                      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VIVS_MC_MEMORY_BASE_ADDR_RA,4,2 ## @VIVS_MC_MEMORY_BASE_ADDR_RA
	.comm	_VIVS_MC_MEMORY_BASE_ADDR_FE,4,2 ## @VIVS_MC_MEMORY_BASE_ADDR_FE
	.comm	_VIVS_MC_MEMORY_BASE_ADDR_TX,4,2 ## @VIVS_MC_MEMORY_BASE_ADDR_TX
	.comm	_VIVS_MC_MEMORY_BASE_ADDR_PEZ,4,2 ## @VIVS_MC_MEMORY_BASE_ADDR_PEZ
	.comm	_VIVS_MC_MEMORY_BASE_ADDR_PE,4,2 ## @VIVS_MC_MEMORY_BASE_ADDR_PE
	.comm	_VIVS_MC_MMU_FE_PAGE_TABLE,4,2  ## @VIVS_MC_MMU_FE_PAGE_TABLE
	.comm	_VIVS_MC_MMU_TX_PAGE_TABLE,4,2  ## @VIVS_MC_MMU_TX_PAGE_TABLE
	.comm	_VIVS_MC_MMU_PE_PAGE_TABLE,4,2  ## @VIVS_MC_MMU_PE_PAGE_TABLE
	.comm	_VIVS_MC_MMU_PEZ_PAGE_TABLE,4,2 ## @VIVS_MC_MMU_PEZ_PAGE_TABLE
	.comm	_VIVS_MC_MMU_RA_PAGE_TABLE,4,2  ## @VIVS_MC_MMU_RA_PAGE_TABLE
	.no_dead_strip	_etnaviv_iommuv1_restore
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function etnaviv_iommuv1_restore
_etnaviv_iommuv1_restore:               ; @etnaviv_iommuv1_restore
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	mov	x0, x1
	bl	_to_v1_context
	mov	x21, x0
Lloh0:
	adrp	x8, _VIVS_MC_MEMORY_BASE_ADDR_RA@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VIVS_MC_MEMORY_BASE_ADDR_RA@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	ldr	x8, [x20]
	ldr	x2, [x8]
	mov	x0, x19
	bl	_gpu_write
Lloh3:
	adrp	x8, _VIVS_MC_MEMORY_BASE_ADDR_FE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VIVS_MC_MEMORY_BASE_ADDR_FE@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	x8, [x20]
	ldr	x2, [x8]
	mov	x0, x19
	bl	_gpu_write
Lloh6:
	adrp	x8, _VIVS_MC_MEMORY_BASE_ADDR_TX@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VIVS_MC_MEMORY_BASE_ADDR_TX@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	ldr	x8, [x20]
	ldr	x2, [x8]
	mov	x0, x19
	bl	_gpu_write
Lloh9:
	adrp	x8, _VIVS_MC_MEMORY_BASE_ADDR_PEZ@GOTPAGE
Lloh10:
	ldr	x8, [x8, _VIVS_MC_MEMORY_BASE_ADDR_PEZ@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	x8, [x20]
	ldr	x2, [x8]
	mov	x0, x19
	bl	_gpu_write
Lloh12:
	adrp	x8, _VIVS_MC_MEMORY_BASE_ADDR_PE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VIVS_MC_MEMORY_BASE_ADDR_PE@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	x8, [x20]
	ldr	x2, [x8]
	mov	x0, x19
	bl	_gpu_write
	ldr	x20, [x21]
Lloh15:
	adrp	x8, _VIVS_MC_MMU_FE_PAGE_TABLE@GOTPAGE
Lloh16:
	ldr	x8, [x8, _VIVS_MC_MMU_FE_PAGE_TABLE@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_gpu_write
Lloh18:
	adrp	x8, _VIVS_MC_MMU_TX_PAGE_TABLE@GOTPAGE
Lloh19:
	ldr	x8, [x8, _VIVS_MC_MMU_TX_PAGE_TABLE@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_gpu_write
Lloh21:
	adrp	x8, _VIVS_MC_MMU_PE_PAGE_TABLE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _VIVS_MC_MMU_PE_PAGE_TABLE@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_gpu_write
Lloh24:
	adrp	x8, _VIVS_MC_MMU_PEZ_PAGE_TABLE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _VIVS_MC_MMU_PEZ_PAGE_TABLE@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_gpu_write
Lloh27:
	adrp	x8, _VIVS_MC_MMU_RA_PAGE_TABLE@GOTPAGE
Lloh28:
	ldr	x8, [x8, _VIVS_MC_MMU_RA_PAGE_TABLE@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_gpu_write
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_VIVS_MC_MEMORY_BASE_ADDR_RA,4,2 ; @VIVS_MC_MEMORY_BASE_ADDR_RA
	.comm	_VIVS_MC_MEMORY_BASE_ADDR_FE,4,2 ; @VIVS_MC_MEMORY_BASE_ADDR_FE
	.comm	_VIVS_MC_MEMORY_BASE_ADDR_TX,4,2 ; @VIVS_MC_MEMORY_BASE_ADDR_TX
	.comm	_VIVS_MC_MEMORY_BASE_ADDR_PEZ,4,2 ; @VIVS_MC_MEMORY_BASE_ADDR_PEZ
	.comm	_VIVS_MC_MEMORY_BASE_ADDR_PE,4,2 ; @VIVS_MC_MEMORY_BASE_ADDR_PE
	.comm	_VIVS_MC_MMU_FE_PAGE_TABLE,4,2  ; @VIVS_MC_MMU_FE_PAGE_TABLE
	.comm	_VIVS_MC_MMU_TX_PAGE_TABLE,4,2  ; @VIVS_MC_MMU_TX_PAGE_TABLE
	.comm	_VIVS_MC_MMU_PE_PAGE_TABLE,4,2  ; @VIVS_MC_MMU_PE_PAGE_TABLE
	.comm	_VIVS_MC_MMU_PEZ_PAGE_TABLE,4,2 ; @VIVS_MC_MMU_PEZ_PAGE_TABLE
	.comm	_VIVS_MC_MMU_RA_PAGE_TABLE,4,2  ; @VIVS_MC_MMU_RA_PAGE_TABLE
	.no_dead_strip	_etnaviv_iommuv1_restore
.subsections_via_symbols
