	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_gem_va_ioctl            ## -- Begin function radeon_gem_va_ioctl
	.p2align	4, 0x90
_radeon_gem_va_ioctl:                   ## @radeon_gem_va_ioctl
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	8(%rdi), %r12
	cmpl	$0, (%r12)
	je	LBB0_3
## %bb.1:
	cmpq	$0, 24(%r15)
	je	LBB0_5
## %bb.2:
	movq	_RADEON_VA_RESULT_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r15)
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_4
LBB0_3:
	movq	_RADEON_VA_RESULT_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r15)
	movq	_ENOTTY@GOTPCREL(%rip), %rax
LBB0_4:
	xorl	%ebx, %ebx
	jmp	LBB0_15
LBB0_5:
	movq	8(%r15), %rax
	movq	_RADEON_VA_RESERVED_SIZE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	cmpq	%rcx, %rax
	jge	LBB0_7
## %bb.6:
	movq	(%rdi), %rdi
	leaq	L_.str(%rip), %rsi
	xorl	%ebx, %ebx
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_14
LBB0_7:
	movq	_RADEON_VM_PAGE_VALID@GOTPCREL(%rip), %rax
	movq	_RADEON_VM_PAGE_SYSTEM@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movl	16(%r15), %eax
	testl	%ecx, %eax
	je	LBB0_9
## %bb.8:
	movq	(%rdi), %rdi
	leaq	L_.str.1(%rip), %rsi
	xorl	%ebx, %ebx
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_14
LBB0_9:
	movl	(%r15), %eax
	movl	%eax, %ecx
	andl	$-2, %ecx
	cmpl	$128, %ecx
	jne	LBB0_13
## %bb.10:
	movq	(%rdx), %rbx
	movl	20(%r15), %esi
	movq	%rdx, %rdi
	callq	_drm_gem_object_lookup
	testq	%rax, %rax
	je	LBB0_17
## %bb.11:
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movq	%rax, %r13
	movq	%rax, %rdi
	callq	_gem_to_radeon_bo
	movq	%rax, %r14
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	_radeon_bo_reserve
	testl	%eax, %eax
	je	LBB0_19
## %bb.12:
	movl	%eax, %ebx
	movq	_RADEON_VA_RESULT_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r15)
	movq	%r13, %rdi
	jmp	LBB0_32
LBB0_13:
	movq	(%rdi), %rdi
	leaq	L_.str.2(%rip), %rsi
	xorl	%ebx, %ebx
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_err
LBB0_14:
	movq	_RADEON_VA_RESULT_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r15)
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_15:
	subl	(%rax), %ebx
LBB0_16:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_17:
	movq	_RADEON_VA_RESULT_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r15)
LBB0_18:
	movq	_ENOENT@GOTPCREL(%rip), %rax
	jmp	LBB0_4
LBB0_19:
	movq	%r13, -48(%rbp)                 ## 8-byte Spill
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%r14, %rsi
	callq	_radeon_vm_bo_find
	testq	%rax, %rax
	je	LBB0_24
## %bb.20:
	movq	%rax, %r13
	movl	(%r15), %eax
	cmpl	$128, %eax
	je	LBB0_25
## %bb.21:
	cmpl	$129, %eax
	jne	LBB0_29
## %bb.22:
	movslq	(%r13), %rax
	testq	%rax, %rax
	je	LBB0_26
## %bb.23:
	movq	_RADEON_VA_RESULT_VA_EXIST@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%r15)
	movq	_RADEON_GPU_PAGE_SIZE@GOTPCREL(%rip), %rcx
	movslq	(%rcx), %rcx
	imulq	%rax, %rcx
	movq	%rcx, 8(%r15)
	movq	%r14, %rdi
	callq	_radeon_bo_unreserve
	jmp	LBB0_30
LBB0_24:
	movq	_RADEON_VA_RESULT_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r15)
	movq	%r14, %rdi
	callq	_radeon_bo_unreserve
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_drm_gem_object_put_unlocked
	jmp	LBB0_18
LBB0_25:
	movq	%r12, %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	jmp	LBB0_27
LBB0_26:
	movl	8(%r15), %edx
	movl	16(%r15), %ecx
	movq	%r12, %rdi
	movq	%r13, %rsi
LBB0_27:
	callq	_radeon_vm_bo_set_addr
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_29
## %bb.28:
	movq	_RADEON_VA_RESULT_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r15)
	jmp	LBB0_31
LBB0_29:
	movq	%r12, %rdi
	movq	%r13, %rsi
	callq	_radeon_gem_va_update_vm
	movq	_RADEON_VA_RESULT_OK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r15)
LBB0_30:
	xorl	%ebx, %ebx
LBB0_31:
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
LBB0_32:
	callq	_drm_gem_object_put_unlocked
	jmp	LBB0_16
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_VA_RESULT_ERROR,8,3     ## @RADEON_VA_RESULT_ERROR
	.comm	_ENOTTY,4,2                     ## @ENOTTY
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_RADEON_VA_RESERVED_SIZE,8,3    ## @RADEON_VA_RESERVED_SIZE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"offset 0x%lX is in reserved area 0x%X\n"

	.comm	_RADEON_VM_PAGE_VALID,4,2       ## @RADEON_VM_PAGE_VALID
	.comm	_RADEON_VM_PAGE_SYSTEM,4,2      ## @RADEON_VM_PAGE_SYSTEM
L_.str.1:                               ## @.str.1
	.asciz	"invalid flags 0x%08X vs 0x%08X\n"

L_.str.2:                               ## @.str.2
	.asciz	"unsupported operation %d\n"

	.comm	_ENOENT,4,2                     ## @ENOENT
	.comm	_RADEON_VA_RESULT_VA_EXIST,4,2  ## @RADEON_VA_RESULT_VA_EXIST
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ## @RADEON_GPU_PAGE_SIZE
	.comm	_RADEON_VA_RESULT_OK,4,2        ## @RADEON_VA_RESULT_OK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_gem_va_ioctl            ; -- Begin function radeon_gem_va_ioctl
	.p2align	2
_radeon_gem_va_ioctl:                   ; @radeon_gem_va_ioctl
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	ldr	x21, [x0, #8]
	ldr	w8, [x21]
	cbz	w8, LBB0_4
; %bb.1:
	ldr	x8, [x19, #24]
	cbnz	x8, LBB0_16
; %bb.2:
	ldr	x8, [x19, #8]
Lloh0:
	adrp	x9, _RADEON_VA_RESERVED_SIZE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_VA_RESERVED_SIZE@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_5
; %bb.3:
	ldr	x0, [x0]
	str	x9, [sp]
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x8
	b	LBB0_15
LBB0_4:
Lloh5:
	adrp	x8, _RADEON_VA_RESULT_ERROR@GOTPAGE
Lloh6:
	ldr	x8, [x8, _RADEON_VA_RESULT_ERROR@GOTPAGEOFF]
Lloh7:
	ldr	x8, [x8]
	str	w8, [x19]
Lloh8:
	adrp	x8, _ENOTTY@GOTPAGE
Lloh9:
	ldr	x8, [x8, _ENOTTY@GOTPAGEOFF]
	b	LBB0_17
LBB0_5:
Lloh10:
	adrp	x8, _RADEON_VM_PAGE_VALID@GOTPAGE
Lloh11:
	ldr	x8, [x8, _RADEON_VM_PAGE_VALID@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
Lloh13:
	adrp	x9, _RADEON_VM_PAGE_SYSTEM@GOTPAGE
Lloh14:
	ldr	x9, [x9, _RADEON_VM_PAGE_SYSTEM@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	orr	w9, w9, w8
	ldr	w8, [x19, #16]
	tst	w8, w9
	b.eq	LBB0_7
; %bb.6:
	ldr	x0, [x0]
	str	x9, [sp]
Lloh16:
	adrp	x1, l_.str.1@PAGE
Lloh17:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_14
LBB0_7:
	ldr	w8, [x19]
	and	w9, w8, #0xfffffffe
	cmp	w9, #128
	b.ne	LBB0_13
; %bb.8:
	ldr	x24, [x2]
	ldr	w1, [x19, #20]
	mov	x0, x2
	bl	_drm_gem_object_lookup
	cbz	x0, LBB0_19
; %bb.9:
	mov	x20, x0
	bl	_gem_to_radeon_bo
	mov	x23, x0
	mov	w1, #0
	bl	_radeon_bo_reserve
	cbz	w0, LBB0_21
; %bb.10:
	mov	x22, x0
LBB0_11:
Lloh18:
	adrp	x8, _RADEON_VA_RESULT_ERROR@GOTPAGE
Lloh19:
	ldr	x8, [x8, _RADEON_VA_RESULT_ERROR@GOTPAGEOFF]
Lloh20:
	ldr	x8, [x8]
	str	w8, [x19]
LBB0_12:
	mov	x0, x20
	bl	_drm_gem_object_put_unlocked
	b	LBB0_18
LBB0_13:
	ldr	x0, [x0]
Lloh21:
	adrp	x1, l_.str.2@PAGE
Lloh22:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_14:
	mov	x2, x8
LBB0_15:
	bl	_dev_err
LBB0_16:
Lloh23:
	adrp	x8, _RADEON_VA_RESULT_ERROR@GOTPAGE
Lloh24:
	ldr	x8, [x8, _RADEON_VA_RESULT_ERROR@GOTPAGEOFF]
Lloh25:
	ldr	x8, [x8]
	str	w8, [x19]
Lloh26:
	adrp	x8, _EINVAL@GOTPAGE
Lloh27:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
LBB0_17:
	ldr	w8, [x8]
	neg	w22, w8
LBB0_18:
	mov	x0, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_19:
Lloh28:
	adrp	x8, _RADEON_VA_RESULT_ERROR@GOTPAGE
Lloh29:
	ldr	x8, [x8, _RADEON_VA_RESULT_ERROR@GOTPAGEOFF]
Lloh30:
	ldr	x8, [x8]
	str	w8, [x19]
LBB0_20:
Lloh31:
	adrp	x8, _ENOENT@GOTPAGE
Lloh32:
	ldr	x8, [x8, _ENOENT@GOTPAGEOFF]
	b	LBB0_17
LBB0_21:
	mov	x0, x24
	mov	x1, x23
	bl	_radeon_vm_bo_find
	cbz	x0, LBB0_26
; %bb.22:
	mov	x24, x0
	ldr	w8, [x19]
	cmp	w8, #128
	b.eq	LBB0_27
; %bb.23:
	cmp	w8, #129
	b.ne	LBB0_30
; %bb.24:
	ldrsw	x8, [x24]
	cbz	w8, LBB0_28
; %bb.25:
Lloh33:
	adrp	x9, _RADEON_VA_RESULT_VA_EXIST@GOTPAGE
Lloh34:
	ldr	x9, [x9, _RADEON_VA_RESULT_VA_EXIST@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	str	w9, [x19]
Lloh36:
	adrp	x9, _RADEON_GPU_PAGE_SIZE@GOTPAGE
Lloh37:
	ldr	x9, [x9, _RADEON_GPU_PAGE_SIZE@GOTPAGEOFF]
Lloh38:
	ldrsw	x9, [x9]
	mul	x8, x9, x8
	str	x8, [x19, #8]
	mov	x0, x23
	bl	_radeon_bo_unreserve
	mov	w22, #0
	b	LBB0_12
LBB0_26:
Lloh39:
	adrp	x8, _RADEON_VA_RESULT_ERROR@GOTPAGE
Lloh40:
	ldr	x8, [x8, _RADEON_VA_RESULT_ERROR@GOTPAGEOFF]
Lloh41:
	ldr	x8, [x8]
	str	w8, [x19]
	mov	x0, x23
	bl	_radeon_bo_unreserve
	mov	x0, x20
	bl	_drm_gem_object_put_unlocked
	b	LBB0_20
LBB0_27:
	mov	x0, x21
	mov	x1, x24
	mov	w2, #0
	mov	w3, #0
	b	LBB0_29
LBB0_28:
	ldr	w2, [x19, #8]
	ldr	w3, [x19, #16]
	mov	x0, x21
	mov	x1, x24
LBB0_29:
	bl	_radeon_vm_bo_set_addr
	mov	x22, x0
	cbnz	w0, LBB0_11
LBB0_30:
	mov	x0, x21
	mov	x1, x24
	bl	_radeon_gem_va_update_vm
	mov	w22, #0
Lloh42:
	adrp	x8, _RADEON_VA_RESULT_OK@GOTPAGE
Lloh43:
	ldr	x8, [x8, _RADEON_VA_RESULT_OK@GOTPAGEOFF]
Lloh44:
	ldr	w8, [x8]
	str	w8, [x19]
	b	LBB0_12
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_VA_RESULT_ERROR,8,3     ; @RADEON_VA_RESULT_ERROR
	.comm	_ENOTTY,4,2                     ; @ENOTTY
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_RADEON_VA_RESERVED_SIZE,8,3    ; @RADEON_VA_RESERVED_SIZE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"offset 0x%lX is in reserved area 0x%X\n"

	.comm	_RADEON_VM_PAGE_VALID,4,2       ; @RADEON_VM_PAGE_VALID
	.comm	_RADEON_VM_PAGE_SYSTEM,4,2      ; @RADEON_VM_PAGE_SYSTEM
l_.str.1:                               ; @.str.1
	.asciz	"invalid flags 0x%08X vs 0x%08X\n"

l_.str.2:                               ; @.str.2
	.asciz	"unsupported operation %d\n"

	.comm	_ENOENT,4,2                     ; @ENOENT
	.comm	_RADEON_VA_RESULT_VA_EXIST,4,2  ; @RADEON_VA_RESULT_VA_EXIST
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ; @RADEON_GPU_PAGE_SIZE
	.comm	_RADEON_VA_RESULT_OK,4,2        ; @RADEON_VA_RESULT_OK
.subsections_via_symbols
