	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nv10_gr_load_dma_vtxbuf
_nv10_gr_load_dma_vtxbuf:               ## @nv10_gr_load_dma_vtxbuf
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$152, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ebx
	movl	%esi, -192(%rbp)                ## 4-byte Spill
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	movq	(%rdi), %rax
	movq	(%rax), %r14
	xorl	%r12d, %r12d
	xorl	%edi, %edi
	xorl	%esi, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	andl	$4095, %eax                     ## imm = 0xFFF
	cmpl	$86, %eax
	je	LBB0_24
## %bb.1:
	cmpl	$150, %eax
	je	LBB0_24
## %bb.2:
	cmpl	$153, %eax
	jne	LBB0_3
LBB0_24:
	testl	%ebx, %ebx
	je	LBB0_32
## %bb.25:
	movl	%ebx, -188(%rbp)                ## 4-byte Spill
	movq	_NV10_PGRAPH_CTX_USER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_nvkm_rd32
	movl	%eax, -184(%rbp)                ## 4-byte Spill
	xorl	%edi, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	movl	%eax, -180(%rbp)                ## 4-byte Spill
	movl	$1, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	movl	%eax, -176(%rbp)                ## 4-byte Spill
	movl	$2, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	movl	%eax, -172(%rbp)                ## 4-byte Spill
	movl	$3, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	movl	%eax, -168(%rbp)                ## 4-byte Spill
	movl	$4, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	movl	%eax, -164(%rbp)                ## 4-byte Spill
	movq	_NV10_PGRAPH_FFINTFC_ST2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_nvkm_rd32
	movl	%eax, -160(%rbp)                ## 4-byte Spill
	movq	_NV10_PGRAPH_FFINTFC_ST2_DL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_nvkm_rd32
	movl	%eax, -156(%rbp)                ## 4-byte Spill
	movq	_NV10_PGRAPH_FFINTFC_ST2_DH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_nvkm_rd32
	movl	%eax, -152(%rbp)                ## 4-byte Spill
	movq	_NV10_PGRAPH_FFINTFC_FIFO_PTR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_nvkm_rd32
	movl	%eax, -148(%rbp)                ## 4-byte Spill
	leaq	-144(%rbp), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	jle	LBB0_28
## %bb.26:
	movl	$4196256, %r13d                 ## imm = 0x4007A0
	xorl	%r15d, %r15d
	leaq	-144(%rbp), %rbx
	.p2align	4, 0x90
LBB0_27:                                ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%r13d, %esi
	callq	_nvkm_rd32
	movl	%eax, -144(%rbp,%r15,4)
	incq	%r15
	movq	%rbx, %rdi
	callq	_ARRAY_SIZE
	cltq
	addl	$4, %r13d
	cmpq	%rax, %r15
	jl	LBB0_27
LBB0_28:
	xorl	%edi, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movl	%eax, %ebx
	movl	%r12d, %edi
	xorl	%esi, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_nvkm_wr32
	movl	$1, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movl	%eax, %ebx
	movl	%r12d, %edi
	movl	$1, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_nvkm_wr32
	movl	$2, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movl	%eax, %ebx
	movl	%r12d, %edi
	movl	$2, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_nvkm_wr32
	movl	$3, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movl	%eax, %ebx
	movl	%r12d, %edi
	movl	$3, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_nvkm_wr32
	movl	$4, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movl	%eax, %ebx
	movl	%r12d, %edi
	movl	$4, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_nvkm_wr32
	movq	_NV10_PGRAPH_CTX_USER@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movl	%r12d, %ecx
	shll	$13, %ecx
	movq	%r14, %rdi
	movl	$57344, %edx                    ## imm = 0xE000
	callq	_nvkm_mask
	movq	_NV10_PGRAPH_FFINTFC_FIFO_PTR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_nvkm_wr32
	movq	_NV10_PGRAPH_FFINTFC_ST2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-192(%rbp), %eax                ## 4-byte Reload
	shll	$20, %eax
	shll	$16, %r12d
	orl	%eax, %r12d
	orl	$738197900, %r12d               ## imm = 0x2C00018C
	movq	%r14, %rdi
	movl	%r12d, %edx
	callq	_nvkm_wr32
	movq	_NV10_PGRAPH_FFINTFC_ST2_DL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-188(%rbp), %edx                ## 4-byte Reload
	callq	_nvkm_wr32
	movq	_NV10_PGRAPH_CTX_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	movl	$65536, %ecx                    ## imm = 0x10000
	callq	_nvkm_mask
	movq	_NV04_PGRAPH_FIFO@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	movl	$1, %ecx
	callq	_nvkm_mask
	movl	(%rbx), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_nvkm_mask
	leaq	-144(%rbp), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	jle	LBB0_31
## %bb.29:
	movl	$4196256, %r12d                 ## imm = 0x4007A0
	xorl	%ebx, %ebx
	leaq	-144(%rbp), %r15
	.p2align	4, 0x90
LBB0_30:                                ## =>This Inner Loop Header: Depth=1
	movl	-144(%rbp,%rbx,4), %edx
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_nvkm_wr32
	incq	%rbx
	movq	%r15, %rdi
	callq	_ARRAY_SIZE
	cltq
	addl	$4, %r12d
	cmpq	%rax, %rbx
	jl	LBB0_30
LBB0_31:
	movq	_NV10_PGRAPH_FFINTFC_FIFO_PTR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-148(%rbp), %edx                ## 4-byte Reload
	callq	_nvkm_wr32
	movq	_NV10_PGRAPH_FFINTFC_ST2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-160(%rbp), %edx                ## 4-byte Reload
	callq	_nvkm_wr32
	movq	_NV10_PGRAPH_FFINTFC_ST2_DL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-156(%rbp), %edx                ## 4-byte Reload
	callq	_nvkm_wr32
	movq	_NV10_PGRAPH_FFINTFC_ST2_DH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-152(%rbp), %edx                ## 4-byte Reload
	callq	_nvkm_wr32
	xorl	%edi, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	-180(%rbp), %edx                ## 4-byte Reload
	callq	_nvkm_wr32
	movl	$1, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	-176(%rbp), %edx                ## 4-byte Reload
	callq	_nvkm_wr32
	movl	$2, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	-172(%rbp), %edx                ## 4-byte Reload
	callq	_nvkm_wr32
	movl	$3, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	-168(%rbp), %edx                ## 4-byte Reload
	callq	_nvkm_wr32
	movl	$4, %edi
	callq	_NV10_PGRAPH_CTX_SWITCH
	movq	%r14, %rdi
	movl	%eax, %esi
	movl	-164(%rbp), %edx                ## 4-byte Reload
	callq	_nvkm_wr32
	movl	(%r13), %esi
	movq	%r14, %rdi
	movl	-184(%rbp), %edx                ## 4-byte Reload
	callq	_nvkm_wr32
LBB0_32:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_34
## %bb.33:
	addq	$152, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movl	$1, %r12d
	movl	$1, %edi
	xorl	%esi, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	andl	$4095, %eax                     ## imm = 0xFFF
	cmpl	$86, %eax
	je	LBB0_24
## %bb.4:
	cmpl	$150, %eax
	je	LBB0_24
## %bb.5:
	cmpl	$153, %eax
	je	LBB0_24
## %bb.6:
	movl	$2, %r12d
	movl	$2, %edi
	xorl	%esi, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	andl	$4095, %eax                     ## imm = 0xFFF
	cmpl	$86, %eax
	je	LBB0_24
## %bb.7:
	cmpl	$150, %eax
	je	LBB0_24
## %bb.8:
	cmpl	$153, %eax
	je	LBB0_24
## %bb.9:
	movl	$3, %r12d
	movl	$3, %edi
	xorl	%esi, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	andl	$4095, %eax                     ## imm = 0xFFF
	cmpl	$86, %eax
	je	LBB0_24
## %bb.10:
	cmpl	$150, %eax
	je	LBB0_24
## %bb.11:
	cmpl	$153, %eax
	je	LBB0_24
## %bb.12:
	movl	$4, %r12d
	movl	$4, %edi
	xorl	%esi, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	andl	$4095, %eax                     ## imm = 0xFFF
	cmpl	$86, %eax
	je	LBB0_24
## %bb.13:
	cmpl	$150, %eax
	je	LBB0_24
## %bb.14:
	cmpl	$153, %eax
	je	LBB0_24
## %bb.15:
	movl	$5, %r12d
	movl	$5, %edi
	xorl	%esi, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	andl	$4095, %eax                     ## imm = 0xFFF
	cmpl	$86, %eax
	je	LBB0_24
## %bb.16:
	cmpl	$150, %eax
	je	LBB0_24
## %bb.17:
	cmpl	$153, %eax
	je	LBB0_24
## %bb.18:
	movl	$6, %r12d
	movl	$6, %edi
	xorl	%esi, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	andl	$4095, %eax                     ## imm = 0xFFF
	cmpl	$86, %eax
	je	LBB0_24
## %bb.19:
	cmpl	$150, %eax
	je	LBB0_24
## %bb.20:
	cmpl	$153, %eax
	je	LBB0_24
## %bb.21:
	movl	$7, %r12d
	movl	$7, %edi
	xorl	%esi, %esi
	callq	_NV10_PGRAPH_CTX_CACHE
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_nvkm_rd32
	andl	$4095, %eax                     ## imm = 0xFFF
	cmpl	$86, %eax
	je	LBB0_24
## %bb.22:
	cmpl	$153, %eax
	je	LBB0_24
## %bb.23:
	cmpl	$150, %eax
	je	LBB0_24
	jmp	LBB0_32
LBB0_34:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.comm	_NV10_PGRAPH_CTX_USER,4,2       ## @NV10_PGRAPH_CTX_USER
	.comm	_NV10_PGRAPH_FFINTFC_ST2,4,2    ## @NV10_PGRAPH_FFINTFC_ST2
	.comm	_NV10_PGRAPH_FFINTFC_ST2_DL,4,2 ## @NV10_PGRAPH_FFINTFC_ST2_DL
	.comm	_NV10_PGRAPH_FFINTFC_ST2_DH,4,2 ## @NV10_PGRAPH_FFINTFC_ST2_DH
	.comm	_NV10_PGRAPH_FFINTFC_FIFO_PTR,4,2 ## @NV10_PGRAPH_FFINTFC_FIFO_PTR
	.comm	_NV10_PGRAPH_CTX_CONTROL,4,2    ## @NV10_PGRAPH_CTX_CONTROL
	.comm	_NV04_PGRAPH_FIFO,4,2           ## @NV04_PGRAPH_FIFO
	.no_dead_strip	_nv10_gr_load_dma_vtxbuf
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nv10_gr_load_dma_vtxbuf
_nv10_gr_load_dma_vtxbuf:               ; @nv10_gr_load_dma_vtxbuf
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #240
	.cfi_def_cfa_offset 240
	stp	x28, x27, [sp, #144]            ; 16-byte Folded Spill
	stp	x26, x25, [sp, #160]            ; 16-byte Folded Spill
	stp	x24, x23, [sp, #176]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #192]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #208]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #224]            ; 16-byte Folded Spill
	add	x29, sp, #224
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x2
	mov	x25, x1
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	stur	x8, [x29, #-88]
	ldr	x8, [x0]
	ldr	x19, [x8]
	mov	w0, #0
	mov	w1, #0
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	mov	w22, #0
	and	w8, w0, #0xfff
	cmp	w8, #86
	b.eq	LBB0_3
; %bb.1:
	cmp	w8, #150
	b.eq	LBB0_3
; %bb.2:
	cmp	w8, #153
	b.ne	LBB0_13
LBB0_3:
	cbz	w20, LBB0_11
; %bb.4:
	mov	w23, #1952
	movk	w23, #64, lsl #16
Lloh3:
	adrp	x8, _NV10_PGRAPH_CTX_USER@GOTPAGE
Lloh4:
	ldr	x8, [x8, _NV10_PGRAPH_CTX_USER@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_nvkm_rd32
	str	w0, [sp, #36]                   ; 4-byte Folded Spill
	mov	w0, #0
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	str	w0, [sp, #32]                   ; 4-byte Folded Spill
	mov	w0, #1
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	str	w0, [sp, #28]                   ; 4-byte Folded Spill
	mov	w0, #2
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	str	w0, [sp, #24]                   ; 4-byte Folded Spill
	mov	w0, #3
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	str	w0, [sp, #20]                   ; 4-byte Folded Spill
	mov	w0, #4
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	str	w0, [sp, #16]                   ; 4-byte Folded Spill
Lloh6:
	adrp	x8, _NV10_PGRAPH_FFINTFC_ST2@GOTPAGE
Lloh7:
	ldr	x8, [x8, _NV10_PGRAPH_FFINTFC_ST2@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_nvkm_rd32
	str	w0, [sp, #12]                   ; 4-byte Folded Spill
Lloh9:
	adrp	x8, _NV10_PGRAPH_FFINTFC_ST2_DL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _NV10_PGRAPH_FFINTFC_ST2_DL@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_nvkm_rd32
	str	w0, [sp, #8]                    ; 4-byte Folded Spill
Lloh12:
	adrp	x8, _NV10_PGRAPH_FFINTFC_ST2_DH@GOTPAGE
Lloh13:
	ldr	x8, [x8, _NV10_PGRAPH_FFINTFC_ST2_DH@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_nvkm_rd32
	str	w0, [sp, #4]                    ; 4-byte Folded Spill
Lloh15:
	adrp	x28, _NV10_PGRAPH_FFINTFC_FIFO_PTR@GOTPAGE
Lloh16:
	ldr	x28, [x28, _NV10_PGRAPH_FFINTFC_FIFO_PTR@GOTPAGEOFF]
	ldr	w1, [x28]
	mov	x0, x19
	bl	_nvkm_rd32
	mov	x26, x0
	add	x21, sp, #40
	add	x0, sp, #40
	bl	_ARRAY_SIZE
	cmp	w0, #1
	b.lt	LBB0_7
; %bb.5:
	mov	x24, #0
	mov	w27, #1952
	movk	w27, #64, lsl #16
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x27
	bl	_nvkm_rd32
	str	w0, [x21, x24, lsl #2]
	add	x24, x24, #1
	add	x0, sp, #40
	bl	_ARRAY_SIZE
	add	w27, w27, #4
	cmp	x24, w0, sxtw
	b.lt	LBB0_6
LBB0_7:
	mov	w0, #0
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x27, x0
	mov	x0, x22
	mov	w1, #0
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	mov	x2, x0
	mov	x0, x19
	mov	x1, x27
	bl	_nvkm_wr32
	mov	w0, #1
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x27, x0
	mov	x0, x22
	mov	w1, #1
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	mov	x2, x0
	mov	x0, x19
	mov	x1, x27
	bl	_nvkm_wr32
	mov	w0, #2
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x27, x0
	mov	x0, x22
	mov	w1, #2
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	mov	x2, x0
	mov	x0, x19
	mov	x1, x27
	bl	_nvkm_wr32
	mov	w0, #3
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x27, x0
	mov	x0, x22
	mov	w1, #3
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	mov	x2, x0
	mov	x0, x19
	mov	x1, x27
	bl	_nvkm_wr32
	mov	w0, #4
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x27, x0
	mov	x0, x22
	mov	w1, #4
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	mov	x2, x0
	mov	x0, x19
	mov	x1, x27
	bl	_nvkm_wr32
Lloh17:
	adrp	x24, _NV10_PGRAPH_CTX_USER@GOTPAGE
Lloh18:
	ldr	x24, [x24, _NV10_PGRAPH_CTX_USER@GOTPAGEOFF]
	ldr	w1, [x24]
	lsl	w3, w22, #13
	mov	x0, x19
	mov	w2, #57344
	bl	_nvkm_mask
	ldr	w1, [x28]
	mov	x0, x19
	mov	w2, #0
	bl	_nvkm_wr32
Lloh19:
	adrp	x27, _NV10_PGRAPH_FFINTFC_ST2@GOTPAGE
Lloh20:
	ldr	x27, [x27, _NV10_PGRAPH_FFINTFC_ST2@GOTPAGEOFF]
	ldr	w1, [x27]
	lsl	w8, w22, #16
	bfi	w8, w25, #20, #12
	mov	w9, #396
	movk	w9, #11264, lsl #16
	orr	w2, w8, w9
	mov	x0, x19
	bl	_nvkm_wr32
Lloh21:
	adrp	x22, _NV10_PGRAPH_FFINTFC_ST2_DL@GOTPAGE
Lloh22:
	ldr	x22, [x22, _NV10_PGRAPH_FFINTFC_ST2_DL@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	mov	x2, x20
	bl	_nvkm_wr32
Lloh23:
	adrp	x8, _NV10_PGRAPH_CTX_CONTROL@GOTPAGE
Lloh24:
	ldr	x8, [x8, _NV10_PGRAPH_CTX_CONTROL@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	w3, #65536
	bl	_nvkm_mask
Lloh26:
	adrp	x20, _NV04_PGRAPH_FIFO@GOTPAGE
Lloh27:
	ldr	x20, [x20, _NV04_PGRAPH_FIFO@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #1
	mov	w3, #1
	bl	_nvkm_mask
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #1
	mov	w3, #0
	bl	_nvkm_mask
	add	x20, sp, #40
	add	x0, sp, #40
	bl	_ARRAY_SIZE
	cmp	w0, #1
	b.lt	LBB0_10
; %bb.8:
	mov	x21, #0
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w2, [x20, x21, lsl #2]
	mov	x0, x19
	mov	x1, x23
	bl	_nvkm_wr32
	add	x21, x21, #1
	add	x0, sp, #40
	bl	_ARRAY_SIZE
	add	w23, w23, #4
	cmp	x21, w0, sxtw
	b.lt	LBB0_9
LBB0_10:
	ldr	w1, [x28]
	mov	x0, x19
	mov	x2, x26
	bl	_nvkm_wr32
	ldr	w1, [x27]
	mov	x0, x19
	ldr	w2, [sp, #12]                   ; 4-byte Folded Reload
	bl	_nvkm_wr32
	ldr	w1, [x22]
	mov	x0, x19
	ldr	w2, [sp, #8]                    ; 4-byte Folded Reload
	bl	_nvkm_wr32
Lloh28:
	adrp	x8, _NV10_PGRAPH_FFINTFC_ST2_DH@GOTPAGE
Lloh29:
	ldr	x8, [x8, _NV10_PGRAPH_FFINTFC_ST2_DH@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
	mov	x0, x19
	ldr	w2, [sp, #4]                    ; 4-byte Folded Reload
	bl	_nvkm_wr32
	mov	w0, #0
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x1, x0
	mov	x0, x19
	ldr	w2, [sp, #32]                   ; 4-byte Folded Reload
	bl	_nvkm_wr32
	mov	w0, #1
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x1, x0
	mov	x0, x19
	ldr	w2, [sp, #28]                   ; 4-byte Folded Reload
	bl	_nvkm_wr32
	mov	w0, #2
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x1, x0
	mov	x0, x19
	ldr	w2, [sp, #24]                   ; 4-byte Folded Reload
	bl	_nvkm_wr32
	mov	w0, #3
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x1, x0
	mov	x0, x19
	ldr	w2, [sp, #20]                   ; 4-byte Folded Reload
	bl	_nvkm_wr32
	mov	w0, #4
	bl	_NV10_PGRAPH_CTX_SWITCH
	mov	x1, x0
	mov	x0, x19
	ldr	w2, [sp, #16]                   ; 4-byte Folded Reload
	bl	_nvkm_wr32
	ldr	w1, [x24]
	mov	x0, x19
	ldr	w2, [sp, #36]                   ; 4-byte Folded Reload
	bl	_nvkm_wr32
LBB0_11:
	ldur	x8, [x29, #-88]
Lloh31:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh32:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh33:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_34
; %bb.12:
	ldp	x29, x30, [sp, #224]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #208]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #192]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #176]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #160]            ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #144]            ; 16-byte Folded Reload
	add	sp, sp, #240
	ret
LBB0_13:
	mov	w22, #1
	mov	w0, #1
	mov	w1, #0
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	and	w8, w0, #0xfff
	cmp	w8, #86
	b.eq	LBB0_3
; %bb.14:
	cmp	w8, #150
	b.eq	LBB0_3
; %bb.15:
	cmp	w8, #153
	b.eq	LBB0_3
; %bb.16:
	mov	w22, #2
	mov	w0, #2
	mov	w1, #0
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	and	w8, w0, #0xfff
	cmp	w8, #86
	b.eq	LBB0_3
; %bb.17:
	cmp	w8, #150
	b.eq	LBB0_3
; %bb.18:
	cmp	w8, #153
	b.eq	LBB0_3
; %bb.19:
	mov	w22, #3
	mov	w0, #3
	mov	w1, #0
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	and	w8, w0, #0xfff
	cmp	w8, #86
	b.eq	LBB0_3
; %bb.20:
	cmp	w8, #150
	b.eq	LBB0_3
; %bb.21:
	cmp	w8, #153
	b.eq	LBB0_3
; %bb.22:
	mov	w22, #4
	mov	w0, #4
	mov	w1, #0
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	and	w8, w0, #0xfff
	cmp	w8, #86
	b.eq	LBB0_3
; %bb.23:
	cmp	w8, #150
	b.eq	LBB0_3
; %bb.24:
	cmp	w8, #153
	b.eq	LBB0_3
; %bb.25:
	mov	w22, #5
	mov	w0, #5
	mov	w1, #0
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	and	w8, w0, #0xfff
	cmp	w8, #86
	b.eq	LBB0_3
; %bb.26:
	cmp	w8, #150
	b.eq	LBB0_3
; %bb.27:
	cmp	w8, #153
	b.eq	LBB0_3
; %bb.28:
	mov	w22, #6
	mov	w0, #6
	mov	w1, #0
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	and	w8, w0, #0xfff
	cmp	w8, #86
	b.eq	LBB0_3
; %bb.29:
	cmp	w8, #150
	b.eq	LBB0_3
; %bb.30:
	cmp	w8, #153
	b.eq	LBB0_3
; %bb.31:
	mov	w22, #7
	mov	w0, #7
	mov	w1, #0
	bl	_NV10_PGRAPH_CTX_CACHE
	mov	x1, x0
	mov	x0, x19
	bl	_nvkm_rd32
	and	w8, w0, #0xfff
	cmp	w8, #86
	b.eq	LBB0_3
; %bb.32:
	cmp	w8, #153
	b.eq	LBB0_3
; %bb.33:
	cmp	w8, #150
	b.eq	LBB0_3
	b	LBB0_11
LBB0_34:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.cfi_endproc
                                        ; -- End function
	.comm	_NV10_PGRAPH_CTX_USER,4,2       ; @NV10_PGRAPH_CTX_USER
	.comm	_NV10_PGRAPH_FFINTFC_ST2,4,2    ; @NV10_PGRAPH_FFINTFC_ST2
	.comm	_NV10_PGRAPH_FFINTFC_ST2_DL,4,2 ; @NV10_PGRAPH_FFINTFC_ST2_DL
	.comm	_NV10_PGRAPH_FFINTFC_ST2_DH,4,2 ; @NV10_PGRAPH_FFINTFC_ST2_DH
	.comm	_NV10_PGRAPH_FFINTFC_FIFO_PTR,4,2 ; @NV10_PGRAPH_FFINTFC_FIFO_PTR
	.comm	_NV10_PGRAPH_CTX_CONTROL,4,2    ; @NV10_PGRAPH_CTX_CONTROL
	.comm	_NV04_PGRAPH_FIFO,4,2           ; @NV04_PGRAPH_FIFO
	.no_dead_strip	_nv10_gr_load_dma_vtxbuf
.subsections_via_symbols
