	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cik_startup
_cik_startup:                           ## @cik_startup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_cik_pcie_gen3_enable
	movq	%r14, %rdi
	callq	_cik_program_aspm
	movq	%r14, %rdi
	callq	_r600_vram_scratch_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_29
## %bb.1:
	movq	%r14, %rdi
	callq	_cik_mc_program
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	testl	%eax, (%r14)
	jne	LBB0_6
## %bb.2:
	cmpl	$0, 72(%r14)
	je	LBB0_3
LBB0_6:
	movq	%r14, %rdi
	callq	_cik_pcie_gart_enable
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_29
## %bb.7:
	movq	%r14, %rdi
	callq	_cik_gpu_init
	movl	(%r15), %eax
	testl	%eax, (%r14)
	je	LBB0_12
## %bb.8:
	movq	8(%r14), %rax
	movq	_CHIP_KAVERI@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_9
## %bb.10:
	movq	_spectre_rlc_save_restore_register_list@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_3:
	movq	%r14, %rdi
	callq	_ci_mc_load_microcode
	testl	%eax, %eax
	je	LBB0_6
## %bb.4:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_5
LBB0_9:
	movq	_kalindi_rlc_save_restore_register_list@GOTPCREL(%rip), %rax
LBB0_11:
	movq	(%rax), %rdi
	movq	%rdi, 64(%r14)
	callq	_ARRAY_SIZE
	movq	%rax, 56(%r14)
LBB0_12:
	movq	_ci_cs_data@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 52(%r14)
	movq	_CP_ME_TABLE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	shll	$2, %eax
	leal	(%rax,%rax,4), %edi
	movl	$2048, %esi                     ## imm = 0x800
	callq	_ALIGN
	addl	$65536, %eax                    ## imm = 0x10000
	movl	%eax, 48(%r14)
	movq	%r14, %rdi
	callq	_sumo_rlc_init
	testl	%eax, %eax
	je	LBB0_14
## %bb.13:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
LBB0_5:
	xorl	%eax, %eax
	callq	_DRM_ERROR
LBB0_29:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_14:
	movq	%r14, %rdi
	callq	_radeon_wb_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_29
## %bb.15:
	movq	%r14, %rdi
	callq	_cik_mec_init
	testl	%eax, %eax
	je	LBB0_17
## %bb.16:
	movl	%eax, %ebx
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_5
LBB0_17:
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %r12
	movq	(%r12), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	jne	LBB0_18
## %bb.20:
	movq	_CAYMAN_RING_TYPE_CP1_INDEX@GOTPCREL(%rip), %r13
	movq	(%r13), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	jne	LBB0_18
## %bb.21:
	movq	_CAYMAN_RING_TYPE_CP2_INDEX@GOTPCREL(%rip), %r15
	movq	(%r15), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	je	LBB0_22
LBB0_18:
	movl	%eax, %ebx
	movl	16(%r14), %edi
	leaq	L_.str.3(%rip), %rsi
LBB0_19:
	movl	%ebx, %edx
	callq	_dev_err
	jmp	LBB0_29
LBB0_22:
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	jne	LBB0_23
## %bb.24:
	movq	_CAYMAN_RING_TYPE_DMA1_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, %rdi
	callq	_radeon_fence_driver_start_ring
	testl	%eax, %eax
	je	LBB0_25
LBB0_23:
	movl	%eax, %ebx
	movl	16(%r14), %edi
	leaq	L_.str.4(%rip), %rsi
	jmp	LBB0_19
LBB0_25:
	movq	%r14, %rdi
	callq	_cik_uvd_start
	movq	%r14, %rdi
	callq	_cik_vce_start
	cmpl	$0, 40(%r14)
	je	LBB0_26
LBB0_27:
	movq	%r14, %rdi
	callq	_cik_irq_init
	testl	%eax, %eax
	je	LBB0_30
## %bb.28:
	movl	%eax, %ebx
	leaq	L_.str.5(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	movq	%r14, %rdi
	callq	_radeon_irq_kms_fini
	jmp	LBB0_29
LBB0_26:
	movq	%r14, %rdi
	callq	_radeon_irq_kms_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_29
	jmp	LBB0_27
LBB0_30:
	movq	%r14, %rdi
	callq	_cik_irq_set
	movq	8(%r14), %rax
	movq	_CHIP_HAWAII@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_33
## %bb.31:
	cmpq	$0, 32(%r14)
	je	LBB0_32
LBB0_33:
	movq	_PACKET3_NOP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$16383, %esi                    ## imm = 0x3FFF
	callq	_PACKET3
LBB0_34:
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	24(%r14), %rax
	movq	(%r12), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	leaq	(%rax,%rcx,8), %rsi
	movl	8(%rax,%rcx,8), %edx
	movq	_RADEON_WB_CP_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	movq	-48(%rbp), %r8                  ## 8-byte Reload
	callq	_radeon_ring_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_29
## %bb.35:
	movq	24(%r14), %r12
	movq	(%r13), %rax
	leaq	(%rax,%rax,2), %r13
	leaq	(%r12,%r13,8), %rsi
	movl	8(%r12,%r13,8), %edx
	movq	_RADEON_WB_CP1_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	movq	-48(%rbp), %r8                  ## 8-byte Reload
	callq	_radeon_ring_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_29
## %bb.36:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	$1, (%rax)
	movq	$0, 16(%r12,%r13,8)
	movl	$0, 4(%r12,%r13,8)
	movq	_CIK_WB_CP1_WPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%r12,%r13,8)
	movq	24(%r14), %r12
	movq	(%r15), %rax
	leaq	(%rax,%rax,2), %r15
	leaq	(%r12,%r15,8), %r13
	movl	8(%r12,%r15,8), %edx
	movq	_RADEON_WB_CP2_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	movq	%r13, %rsi
	movq	-48(%rbp), %r8                  ## 8-byte Reload
	callq	_radeon_ring_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_29
## %bb.37:
	movl	$1, (%r13)
	movq	$0, 16(%r12,%r15,8)
	movl	$1, 4(%r12,%r15,8)
	movq	_CIK_WB_CP2_WPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%r12,%r15,8)
	movq	24(%r14), %rax
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	leaq	(%rax,%rcx,8), %r12
	movl	8(%rax,%rcx,8), %r15d
	movq	_R600_WB_DMA_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_SDMA_OPCODE_NOP@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_SDMA_PACKET
	movq	%r14, %rdi
	movq	%r12, %rsi
	movl	%r15d, %edx
	movl	%ebx, %ecx
	movq	%rax, %r8
	callq	_radeon_ring_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_29
## %bb.38:
	movq	24(%r14), %rax
	movq	_CAYMAN_RING_TYPE_DMA1_INDEX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	leaq	(%rax,%rcx,8), %r12
	movl	8(%rax,%rcx,8), %r15d
	movq	_CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	(%r13), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_SDMA_PACKET
	movq	%r14, %rdi
	movq	%r12, %rsi
	movl	%r15d, %edx
	movl	%ebx, %ecx
	movq	%rax, %r8
	callq	_radeon_ring_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_29
## %bb.39:
	movq	%r14, %rdi
	callq	_cik_cp_resume
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_29
## %bb.40:
	movq	%r14, %rdi
	callq	_cik_sdma_resume
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_29
## %bb.41:
	movq	%r14, %rdi
	callq	_cik_uvd_resume
	movq	%r14, %rdi
	callq	_cik_vce_resume
	movq	%r14, %rdi
	callq	_radeon_ib_pool_init
	testl	%eax, %eax
	je	LBB0_43
## %bb.42:
	movl	%eax, %ebx
	movl	16(%r14), %edi
	leaq	L_.str.6(%rip), %rsi
	jmp	LBB0_19
LBB0_32:
	movq	_RADEON_CP_PACKET2@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	jmp	LBB0_34
LBB0_43:
	movq	%r14, %rdi
	callq	_radeon_vm_manager_init
	testl	%eax, %eax
	je	LBB0_45
## %bb.44:
	movl	%eax, %ebx
	movl	16(%r14), %edi
	leaq	L_.str.7(%rip), %rsi
	jmp	LBB0_19
LBB0_45:
	movq	%r14, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_audio_init              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_IS_IGP,4,2              ## @RADEON_IS_IGP
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to load MC firmware!\n"

	.comm	_CHIP_KAVERI,8,3                ## @CHIP_KAVERI
	.comm	_spectre_rlc_save_restore_register_list,8,3 ## @spectre_rlc_save_restore_register_list
	.comm	_kalindi_rlc_save_restore_register_list,8,3 ## @kalindi_rlc_save_restore_register_list
	.comm	_ci_cs_data,4,2                 ## @ci_cs_data
	.comm	_CP_ME_TABLE_SIZE,4,2           ## @CP_ME_TABLE_SIZE
L_.str.1:                               ## @.str.1
	.asciz	"Failed to init rlc BOs!\n"

L_.str.2:                               ## @.str.2
	.asciz	"Failed to init MEC BOs!\n"

	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
L_.str.3:                               ## @.str.3
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_CP1_INDEX,8,3 ## @CAYMAN_RING_TYPE_CP1_INDEX
	.comm	_CAYMAN_RING_TYPE_CP2_INDEX,8,3 ## @CAYMAN_RING_TYPE_CP2_INDEX
	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ## @R600_RING_TYPE_DMA_INDEX
L_.str.4:                               ## @.str.4
	.asciz	"failed initializing DMA fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ## @CAYMAN_RING_TYPE_DMA1_INDEX
L_.str.5:                               ## @.str.5
	.asciz	"radeon: IH init failed (%d).\n"

	.comm	_CHIP_HAWAII,8,3                ## @CHIP_HAWAII
	.comm	_PACKET3_NOP,4,2                ## @PACKET3_NOP
	.comm	_RADEON_CP_PACKET2,8,3          ## @RADEON_CP_PACKET2
	.comm	_RADEON_WB_CP_RPTR_OFFSET,4,2   ## @RADEON_WB_CP_RPTR_OFFSET
	.comm	_RADEON_WB_CP1_RPTR_OFFSET,4,2  ## @RADEON_WB_CP1_RPTR_OFFSET
	.comm	_CIK_WB_CP1_WPTR_OFFSET,4,2     ## @CIK_WB_CP1_WPTR_OFFSET
	.comm	_RADEON_WB_CP2_RPTR_OFFSET,4,2  ## @RADEON_WB_CP2_RPTR_OFFSET
	.comm	_CIK_WB_CP2_WPTR_OFFSET,4,2     ## @CIK_WB_CP2_WPTR_OFFSET
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ## @R600_WB_DMA_RPTR_OFFSET
	.comm	_SDMA_OPCODE_NOP,4,2            ## @SDMA_OPCODE_NOP
	.comm	_CAYMAN_WB_DMA1_RPTR_OFFSET,4,2 ## @CAYMAN_WB_DMA1_RPTR_OFFSET
L_.str.6:                               ## @.str.6
	.asciz	"IB initialization failed (%d).\n"

L_.str.7:                               ## @.str.7
	.asciz	"vm manager initialization failed (%d).\n"

	.no_dead_strip	_cik_startup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function cik_startup
lCPI0_0:
	.long	1                               ; 0x1
	.long	0                               ; 0x0
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_cik_startup:                           ; @cik_startup
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	bl	_cik_pcie_gen3_enable
	mov	x0, x19
	bl	_cik_program_aspm
	mov	x0, x19
	bl	_r600_vram_scratch_init
	mov	x20, x0
	cbnz	w0, LBB0_14
; %bb.1:
	mov	x0, x19
	bl	_cik_mc_program
	ldr	w8, [x19]
Lloh0:
	adrp	x21, _RADEON_IS_IGP@GOTPAGE
Lloh1:
	ldr	x21, [x21, _RADEON_IS_IGP@GOTPAGEOFF]
	ldr	w9, [x21]
	tst	w9, w8
	b.ne	LBB0_3
; %bb.2:
	ldr	w8, [x19, #72]
	cbz	w8, LBB0_8
LBB0_3:
	mov	x0, x19
	bl	_cik_pcie_gart_enable
	mov	x20, x0
	cbnz	w0, LBB0_14
; %bb.4:
	mov	x0, x19
	bl	_cik_gpu_init
	ldr	w8, [x19]
	ldr	w9, [x21]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.5:
	ldr	x8, [x19, #8]
Lloh2:
	adrp	x9, _CHIP_KAVERI@GOTPAGE
Lloh3:
	ldr	x9, [x9, _CHIP_KAVERI@GOTPAGEOFF]
Lloh4:
	ldr	x9, [x9]
Lloh5:
	adrp	x10, _spectre_rlc_save_restore_register_list@GOTPAGE
Lloh6:
	ldr	x10, [x10, _spectre_rlc_save_restore_register_list@GOTPAGEOFF]
Lloh7:
	adrp	x11, _kalindi_rlc_save_restore_register_list@GOTPAGE
Lloh8:
	ldr	x11, [x11, _kalindi_rlc_save_restore_register_list@GOTPAGEOFF]
	cmp	x8, x9
	csel	x8, x10, x11, eq
	ldr	x0, [x8]
	str	x0, [x19, #64]
	bl	_ARRAY_SIZE
	str	x0, [x19, #56]
LBB0_6:
Lloh9:
	adrp	x8, _ci_cs_data@GOTPAGE
Lloh10:
	ldr	x8, [x8, _ci_cs_data@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	str	w8, [x19, #52]
Lloh12:
	adrp	x8, _CP_ME_TABLE_SIZE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _CP_ME_TABLE_SIZE@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	add	w8, w8, w8, lsl #2
	lsl	w0, w8, #2
	mov	w1, #2048
	bl	_ALIGN
	add	w8, w0, #16, lsl #12            ; =65536
	str	w8, [x19, #48]
	mov	x0, x19
	bl	_sumo_rlc_init
	cbz	w0, LBB0_10
; %bb.7:
	mov	x20, x0
Lloh15:
	adrp	x0, l_.str.1@PAGE
Lloh16:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_13
LBB0_8:
	mov	x0, x19
	bl	_ci_mc_load_microcode
	cbz	w0, LBB0_3
; %bb.9:
	mov	x20, x0
Lloh17:
	adrp	x0, l_.str@PAGE
Lloh18:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_13
LBB0_10:
	mov	x0, x19
	bl	_radeon_wb_init
	mov	x20, x0
	cbnz	w0, LBB0_14
; %bb.11:
	mov	x0, x19
	bl	_cik_mec_init
	cbz	w0, LBB0_15
; %bb.12:
	mov	x20, x0
Lloh19:
	adrp	x0, l_.str.2@PAGE
Lloh20:
	add	x0, x0, l_.str.2@PAGEOFF
LBB0_13:
	bl	_DRM_ERROR
LBB0_14:
	mov	x0, x20
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_15:
Lloh21:
	adrp	x8, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh23:
	ldr	x1, [x8]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbnz	w0, LBB0_18
; %bb.16:
Lloh24:
	adrp	x22, _CAYMAN_RING_TYPE_CP1_INDEX@GOTPAGE
Lloh25:
	ldr	x22, [x22, _CAYMAN_RING_TYPE_CP1_INDEX@GOTPAGEOFF]
	ldr	x1, [x22]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbnz	w0, LBB0_18
; %bb.17:
Lloh26:
	adrp	x21, _CAYMAN_RING_TYPE_CP2_INDEX@GOTPAGE
Lloh27:
	ldr	x21, [x21, _CAYMAN_RING_TYPE_CP2_INDEX@GOTPAGEOFF]
	ldr	x1, [x21]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbz	w0, LBB0_20
LBB0_18:
	mov	x20, x0
	ldr	w0, [x19, #16]
Lloh28:
	adrp	x1, l_.str.3@PAGE
Lloh29:
	add	x1, x1, l_.str.3@PAGEOFF
LBB0_19:
	mov	x2, x20
	bl	_dev_err
	b	LBB0_14
LBB0_20:
Lloh30:
	adrp	x8, _R600_RING_TYPE_DMA_INDEX@GOTPAGE
Lloh31:
	ldr	x8, [x8, _R600_RING_TYPE_DMA_INDEX@GOTPAGEOFF]
Lloh32:
	ldr	x1, [x8]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbnz	w0, LBB0_22
; %bb.21:
Lloh33:
	adrp	x8, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGE
Lloh34:
	ldr	x8, [x8, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGEOFF]
Lloh35:
	ldr	x1, [x8]
	mov	x0, x19
	bl	_radeon_fence_driver_start_ring
	cbz	w0, LBB0_23
LBB0_22:
	mov	x20, x0
	ldr	w0, [x19, #16]
Lloh36:
	adrp	x1, l_.str.4@PAGE
Lloh37:
	add	x1, x1, l_.str.4@PAGEOFF
	b	LBB0_19
LBB0_23:
	mov	x0, x19
	bl	_cik_uvd_start
	mov	x0, x19
	bl	_cik_vce_start
	ldr	w8, [x19, #40]
	cbz	w8, LBB0_26
LBB0_24:
	mov	x0, x19
	bl	_cik_irq_init
	cbz	w0, LBB0_27
; %bb.25:
	mov	x20, x0
	str	x20, [sp]
Lloh38:
	adrp	x0, l_.str.5@PAGE
Lloh39:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_DRM_ERROR
	mov	x0, x19
	bl	_radeon_irq_kms_fini
	b	LBB0_14
LBB0_26:
	mov	x0, x19
	bl	_radeon_irq_kms_init
	mov	x20, x0
	cbnz	w0, LBB0_14
	b	LBB0_24
LBB0_27:
	mov	x0, x19
	bl	_cik_irq_set
	ldr	x8, [x19, #8]
Lloh40:
	adrp	x9, _CHIP_HAWAII@GOTPAGE
Lloh41:
	ldr	x9, [x9, _CHIP_HAWAII@GOTPAGEOFF]
Lloh42:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_29
; %bb.28:
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_39
LBB0_29:
Lloh43:
	adrp	x8, _PACKET3_NOP@GOTPAGE
Lloh44:
	ldr	x8, [x8, _PACKET3_NOP@GOTPAGEOFF]
Lloh45:
	ldr	w0, [x8]
	mov	w1, #16383
	bl	_PACKET3
	mov	x23, x0
LBB0_30:
	ldr	x9, [x19, #24]
Lloh46:
	adrp	x8, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh47:
	ldr	x8, [x8, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh48:
	ldr	x8, [x8]
	mov	w10, #24
	madd	x1, x8, x10, x9
	ldr	w2, [x1, #8]
Lloh49:
	adrp	x8, _RADEON_WB_CP_RPTR_OFFSET@GOTPAGE
Lloh50:
	ldr	x8, [x8, _RADEON_WB_CP_RPTR_OFFSET@GOTPAGEOFF]
Lloh51:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x4, x23
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_14
; %bb.31:
	ldr	x24, [x19, #24]
	ldr	x25, [x22]
	mov	w8, #24
	madd	x22, x25, x8, x24
	ldr	w2, [x22, #8]
Lloh52:
	adrp	x8, _RADEON_WB_CP1_RPTR_OFFSET@GOTPAGE
Lloh53:
	ldr	x8, [x8, _RADEON_WB_CP1_RPTR_OFFSET@GOTPAGEOFF]
Lloh54:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x1, x22
	mov	x4, x23
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_14
; %bb.32:
	mov	w8, #24
	madd	x9, x25, x8, x24
	str	xzr, [x9, #16]
Lloh55:
	adrp	x10, lCPI0_0@PAGE
Lloh56:
	ldr	d0, [x10, lCPI0_0@PAGEOFF]
	str	d0, [x22]
Lloh57:
	adrp	x10, _CIK_WB_CP1_WPTR_OFFSET@GOTPAGE
Lloh58:
	ldr	x10, [x10, _CIK_WB_CP1_WPTR_OFFSET@GOTPAGEOFF]
Lloh59:
	ldr	w10, [x10]
	str	w10, [x9, #12]
	ldr	x24, [x19, #24]
	ldr	x21, [x21]
	madd	x22, x21, x8, x24
	ldr	w2, [x22, #8]
Lloh60:
	adrp	x8, _RADEON_WB_CP2_RPTR_OFFSET@GOTPAGE
Lloh61:
	ldr	x8, [x8, _RADEON_WB_CP2_RPTR_OFFSET@GOTPAGEOFF]
Lloh62:
	ldr	w3, [x8]
	mov	x0, x19
	mov	x1, x22
	mov	x4, x23
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_14
; %bb.33:
	mov	w9, #24
	madd	x8, x21, x9, x24
	str	xzr, [x8, #16]
	movi.2s	v0, #1
	str	d0, [x22]
Lloh63:
	adrp	x10, _CIK_WB_CP2_WPTR_OFFSET@GOTPAGE
Lloh64:
	ldr	x10, [x10, _CIK_WB_CP2_WPTR_OFFSET@GOTPAGEOFF]
Lloh65:
	ldr	w10, [x10]
	str	w10, [x8, #12]
	ldr	x10, [x19, #24]
Lloh66:
	adrp	x8, _R600_RING_TYPE_DMA_INDEX@GOTPAGE
Lloh67:
	ldr	x8, [x8, _R600_RING_TYPE_DMA_INDEX@GOTPAGEOFF]
Lloh68:
	ldr	x8, [x8]
	madd	x20, x8, x9, x10
	ldr	w21, [x20, #8]
Lloh69:
	adrp	x8, _R600_WB_DMA_RPTR_OFFSET@GOTPAGE
Lloh70:
	ldr	x8, [x8, _R600_WB_DMA_RPTR_OFFSET@GOTPAGEOFF]
Lloh71:
	ldr	w22, [x8]
Lloh72:
	adrp	x23, _SDMA_OPCODE_NOP@GOTPAGE
Lloh73:
	ldr	x23, [x23, _SDMA_OPCODE_NOP@GOTPAGEOFF]
	ldr	w0, [x23]
	mov	w1, #0
	mov	w2, #0
	bl	_SDMA_PACKET
	mov	x4, x0
	mov	x0, x19
	mov	x1, x20
	mov	x2, x21
	mov	x3, x22
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_14
; %bb.34:
	ldr	x9, [x19, #24]
Lloh74:
	adrp	x8, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGE
Lloh75:
	ldr	x8, [x8, _CAYMAN_RING_TYPE_DMA1_INDEX@GOTPAGEOFF]
Lloh76:
	ldr	x8, [x8]
	mov	w10, #24
	madd	x20, x8, x10, x9
	ldr	w21, [x20, #8]
Lloh77:
	adrp	x8, _CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPAGE
Lloh78:
	ldr	x8, [x8, _CAYMAN_WB_DMA1_RPTR_OFFSET@GOTPAGEOFF]
Lloh79:
	ldr	w22, [x8]
	ldr	w0, [x23]
	mov	w1, #0
	mov	w2, #0
	bl	_SDMA_PACKET
	mov	x4, x0
	mov	x0, x19
	mov	x1, x20
	mov	x2, x21
	mov	x3, x22
	bl	_radeon_ring_init
	mov	x20, x0
	cbnz	w0, LBB0_14
; %bb.35:
	mov	x0, x19
	bl	_cik_cp_resume
	mov	x20, x0
	cbnz	w0, LBB0_14
; %bb.36:
	mov	x0, x19
	bl	_cik_sdma_resume
	mov	x20, x0
	cbnz	w0, LBB0_14
; %bb.37:
	mov	x0, x19
	bl	_cik_uvd_resume
	mov	x0, x19
	bl	_cik_vce_resume
	mov	x0, x19
	bl	_radeon_ib_pool_init
	cbz	w0, LBB0_40
; %bb.38:
	mov	x20, x0
	ldr	w0, [x19, #16]
Lloh80:
	adrp	x1, l_.str.6@PAGE
Lloh81:
	add	x1, x1, l_.str.6@PAGEOFF
	b	LBB0_19
LBB0_39:
Lloh82:
	adrp	x8, _RADEON_CP_PACKET2@GOTPAGE
Lloh83:
	ldr	x8, [x8, _RADEON_CP_PACKET2@GOTPAGEOFF]
Lloh84:
	ldr	x23, [x8]
	b	LBB0_30
LBB0_40:
	mov	x0, x19
	bl	_radeon_vm_manager_init
	cbz	w0, LBB0_42
; %bb.41:
	mov	x20, x0
	ldr	w0, [x19, #16]
Lloh85:
	adrp	x1, l_.str.7@PAGE
Lloh86:
	add	x1, x1, l_.str.7@PAGEOFF
	b	LBB0_19
LBB0_42:
	mov	x0, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	b	_radeon_audio_init
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpAdrp	Lloh55, Lloh57
	.loh AdrpLdr	Lloh55, Lloh56
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpAdd	Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpAdd	Lloh85, Lloh86
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_IS_IGP,4,2              ; @RADEON_IS_IGP
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to load MC firmware!\n"

	.comm	_CHIP_KAVERI,8,3                ; @CHIP_KAVERI
	.comm	_spectre_rlc_save_restore_register_list,8,3 ; @spectre_rlc_save_restore_register_list
	.comm	_kalindi_rlc_save_restore_register_list,8,3 ; @kalindi_rlc_save_restore_register_list
	.comm	_ci_cs_data,4,2                 ; @ci_cs_data
	.comm	_CP_ME_TABLE_SIZE,4,2           ; @CP_ME_TABLE_SIZE
l_.str.1:                               ; @.str.1
	.asciz	"Failed to init rlc BOs!\n"

l_.str.2:                               ; @.str.2
	.asciz	"Failed to init MEC BOs!\n"

	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
l_.str.3:                               ; @.str.3
	.asciz	"failed initializing CP fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_CP1_INDEX,8,3 ; @CAYMAN_RING_TYPE_CP1_INDEX
	.comm	_CAYMAN_RING_TYPE_CP2_INDEX,8,3 ; @CAYMAN_RING_TYPE_CP2_INDEX
	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ; @R600_RING_TYPE_DMA_INDEX
l_.str.4:                               ; @.str.4
	.asciz	"failed initializing DMA fences (%d).\n"

	.comm	_CAYMAN_RING_TYPE_DMA1_INDEX,8,3 ; @CAYMAN_RING_TYPE_DMA1_INDEX
l_.str.5:                               ; @.str.5
	.asciz	"radeon: IH init failed (%d).\n"

	.comm	_CHIP_HAWAII,8,3                ; @CHIP_HAWAII
	.comm	_PACKET3_NOP,4,2                ; @PACKET3_NOP
	.comm	_RADEON_CP_PACKET2,8,3          ; @RADEON_CP_PACKET2
	.comm	_RADEON_WB_CP_RPTR_OFFSET,4,2   ; @RADEON_WB_CP_RPTR_OFFSET
	.comm	_RADEON_WB_CP1_RPTR_OFFSET,4,2  ; @RADEON_WB_CP1_RPTR_OFFSET
	.comm	_CIK_WB_CP1_WPTR_OFFSET,4,2     ; @CIK_WB_CP1_WPTR_OFFSET
	.comm	_RADEON_WB_CP2_RPTR_OFFSET,4,2  ; @RADEON_WB_CP2_RPTR_OFFSET
	.comm	_CIK_WB_CP2_WPTR_OFFSET,4,2     ; @CIK_WB_CP2_WPTR_OFFSET
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ; @R600_WB_DMA_RPTR_OFFSET
	.comm	_SDMA_OPCODE_NOP,4,2            ; @SDMA_OPCODE_NOP
	.comm	_CAYMAN_WB_DMA1_RPTR_OFFSET,4,2 ; @CAYMAN_WB_DMA1_RPTR_OFFSET
l_.str.6:                               ; @.str.6
	.asciz	"IB initialization failed (%d).\n"

l_.str.7:                               ; @.str.7
	.asciz	"vm manager initialization failed (%d).\n"

	.no_dead_strip	_cik_startup
.subsections_via_symbols
