	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function kgd_init_interrupts
_kgd_init_interrupts:                   ## @kgd_init_interrupts
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	callq	_get_amdgpu_device
	movq	%rax, %rcx
	movl	%r14d, %eax
	cltd
	idivl	(%rcx)
                                        ## kill: def $eax killed $eax def $rax
	leal	1(%rax), %esi
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_lock_srbm
	movq	_mmCPC_INT_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK@GOTPCREL(%rip), %rax
	movq	_CP_INT_CNTL_RING0__OPCODE_ERROR_INT_ENABLE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	callq	_WREG32
	movq	%rbx, %rdi
	callq	_unlock_srbm
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_mmCPC_INT_CNTL,4,2             ## @mmCPC_INT_CNTL
	.comm	_CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK,4,2 ## @CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK
	.comm	_CP_INT_CNTL_RING0__OPCODE_ERROR_INT_ENABLE_MASK,4,2 ## @CP_INT_CNTL_RING0__OPCODE_ERROR_INT_ENABLE_MASK
	.no_dead_strip	_kgd_init_interrupts
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function kgd_init_interrupts
_kgd_init_interrupts:                   ; @kgd_init_interrupts
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	mov	x20, x0
	bl	_get_amdgpu_device
	ldr	w8, [x0]
	sdiv	w9, w19, w8
	add	w1, w9, #1
	msub	w2, w9, w8, w19
	mov	x0, x20
	mov	w3, #0
	mov	w4, #0
	bl	_lock_srbm
Lloh0:
	adrp	x8, _mmCPC_INT_CNTL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _mmCPC_INT_CNTL@GOTPAGEOFF]
Lloh2:
	adrp	x9, _CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK@GOTPAGE
Lloh3:
	ldr	x9, [x9, _CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
Lloh5:
	ldr	w8, [x9]
Lloh6:
	adrp	x9, _CP_INT_CNTL_RING0__OPCODE_ERROR_INT_ENABLE_MASK@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CP_INT_CNTL_RING0__OPCODE_ERROR_INT_ENABLE_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_WREG32
	mov	x0, x20
	bl	_unlock_srbm
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_mmCPC_INT_CNTL,4,2             ; @mmCPC_INT_CNTL
	.comm	_CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK,4,2 ; @CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK
	.comm	_CP_INT_CNTL_RING0__OPCODE_ERROR_INT_ENABLE_MASK,4,2 ; @CP_INT_CNTL_RING0__OPCODE_ERROR_INT_ENABLE_MASK
	.no_dead_strip	_kgd_init_interrupts
.subsections_via_symbols
