	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function construct
LCPI0_0:
	.long	200                             ## 0xc8
	.long	100                             ## 0x64
	.long	256                             ## 0x100
	.long	2048                            ## 0x800
LCPI0_1:
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.long	1                               ## 0x1
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_construct:                             ## @construct
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r13
	movq	%rsi, %r14
	movl	%edi, %r15d
	movq	56(%rsi), %r12
	movq	8(%r12), %rsi
	movq	_bios_regs@GOTPCREL(%rip), %rax
	movq	%rax, (%rsi)
	movq	_res_cap_rn@GOTPCREL(%rip), %rax
	movq	%rax, 24(%rdx)
	movq	_dcn21_res_pool_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 160(%rdx)
	movq	_NO_UNDERLAY_PIPE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 152(%rdx)
	movl	$4, (%rdx)
	movaps	LCPI0_0(%rip), %xmm0            ## xmm0 = [200,100,256,2048]
	movups	%xmm0, 8(%r14)
	movaps	LCPI0_1(%rip), %xmm0            ## xmm0 = [1,1,1,1]
	movups	%xmm0, 24(%r14)
	movq	(%r12), %rax
	movq	_DCE_ENV_PRODUCTION_DRV@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_1
## %bb.2:
	movq	_debug_defaults_drv@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_debug_defaults_diags@GOTPCREL(%rip), %rax
LBB0_3:
	movq	(%rax), %rax
	movq	%rax, 80(%r14)
	movq	72(%r14), %rdi
	testq	%rdi, %rdi
	je	LBB0_5
## %bb.4:
	movl	$16, %esi
	callq	_vm_helper_init
	movq	8(%r12), %rsi
LBB0_5:
	movq	_CLOCK_SOURCE_COMBO_PHY_PLL0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_clk_src_regs@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rcx
	movq	%r12, %rdi
	xorl	%r8d, %r8d
	callq	_dcn21_clock_source_create
	movq	136(%r13), %rcx
	movq	_DCN20_CLK_SRC_PLL0@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	%rax, (%rcx,%rdx,8)
	movq	8(%r12), %rsi
	movq	_CLOCK_SOURCE_COMBO_PHY_PLL1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	(%rbx), %rcx
	addq	$4, %rcx
	movq	%r12, %rdi
	xorl	%r8d, %r8d
	callq	_dcn21_clock_source_create
	movq	136(%r13), %rcx
	movq	_DCN20_CLK_SRC_PLL1@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	%rax, (%rcx,%rdx,8)
	movq	_DCN20_CLK_SRC_TOTAL_DCN21@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 4(%r13)
	movq	8(%r12), %rsi
	movq	_CLOCK_SOURCE_ID_DP_DTO@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	(%rbx), %rcx
	movq	%r12, %rdi
	movl	$1, %r8d
	callq	_dcn21_clock_source_create
	movq	%rax, 144(%r13)
	movl	4(%r13), %eax
	testl	%eax, %eax
	jle	LBB0_11
## %bb.6:
	movq	136(%r13), %rcx
	xorl	%edx, %edx
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	cmpq	$0, (%rcx,%rdx,8)
	je	LBB0_9
## %bb.7:                               ##   in Loop: Header=BB0_8 Depth=1
	incq	%rdx
	cmpq	%rdx, %rax
	jne	LBB0_8
LBB0_11:
	movq	_dccg_regs@GOTPCREL(%rip), %rsi
	movq	_dccg_shift@GOTPCREL(%rip), %rdx
	movq	_dccg_mask@GOTPCREL(%rip), %rcx
	movq	%r12, %rdi
	callq	_dccg2_create
	movq	%rax, 128(%r13)
	testq	%rax, %rax
	je	LBB0_12
## %bb.13:
	movq	%r12, %rdi
	callq	_dcn21_pp_smu_create
	movl	%eax, 116(%r13)
	leaq	64(%r14), %rdi
	movq	_DML_PROJECT_DCN21@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_dcn2_1_soc@GOTPCREL(%rip), %rsi
	movq	_dcn2_1_ip@GOTPCREL(%rip), %rdx
	callq	_dml_init_instance
	movq	56(%r14), %rax
	movq	%rax, -48(%rbp)
	leaq	-48(%rbp), %rdi
	callq	_dal_irq_service_dcn21_create
	movl	%eax, 112(%r13)
	testl	%eax, %eax
	je	LBB0_19
## %bb.14:
	cmpl	$0, (%r13)
	jle	LBB0_21
## %bb.15:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_16:                                ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_dcn21_hubp_create
	movq	104(%r13), %rcx
	movq	%rax, (%rcx,%rbx,8)
	movq	104(%r13), %rax
	cmpq	$0, (%rax,%rbx,8)
	je	LBB0_17
## %bb.25:                              ##   in Loop: Header=BB0_16 Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_dcn21_ipp_create
	movq	96(%r13), %rcx
	movq	%rax, (%rcx,%rbx,8)
	movq	96(%r13), %rax
	cmpq	$0, (%rax,%rbx,8)
	je	LBB0_26
## %bb.27:                              ##   in Loop: Header=BB0_16 Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_dcn21_dpp_create
	movq	88(%r13), %rcx
	movq	%rax, (%rcx,%rbx,8)
	movq	88(%r13), %rax
	cmpq	$0, (%rax,%rbx,8)
	je	LBB0_28
## %bb.20:                              ##   in Loop: Header=BB0_16 Depth=1
	incq	%rbx
	movslq	(%r13), %rax
	cmpq	%rax, %rbx
	jl	LBB0_16
LBB0_21:
	movq	24(%r13), %rax
	cmpl	$0, (%rax)
	jle	LBB0_30
## %bb.22:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_23:                                ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_dcn21_aux_engine_create
	movq	80(%r13), %rcx
	movq	%rax, (%rcx,%rbx,8)
	movq	80(%r13), %rax
	cmpq	$0, (%rax,%rbx,8)
	je	LBB0_24
## %bb.34:                              ##   in Loop: Header=BB0_23 Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_dcn21_i2c_hw_create
	movq	72(%r13), %rcx
	movq	%rax, (%rcx,%rbx,8)
	movq	72(%r13), %rax
	cmpq	$0, (%rax,%rbx,8)
	je	LBB0_35
## %bb.29:                              ##   in Loop: Header=BB0_23 Depth=1
	movq	64(%r13), %rax
	movq	$0, (%rax,%rbx,8)
	incq	%rbx
	movq	24(%r13), %rax
	movslq	(%rax), %rcx
	cmpq	%rcx, %rbx
	jl	LBB0_23
LBB0_30:
	cmpl	$0, 4(%rax)
	jle	LBB0_37
## %bb.31:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_32:                                ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_dcn21_opp_create
	movq	56(%r13), %rcx
	movq	%rax, (%rcx,%rbx,8)
	movq	56(%r13), %rax
	cmpq	$0, (%rax,%rbx,8)
	je	LBB0_33
## %bb.36:                              ##   in Loop: Header=BB0_32 Depth=1
	incq	%rbx
	movq	24(%r13), %rax
	movslq	4(%rax), %rcx
	cmpq	%rcx, %rbx
	jl	LBB0_32
LBB0_37:
	cmpl	$0, 8(%rax)
	jle	LBB0_38
## %bb.39:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_40:                                ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_dcn21_timing_generator_create
	movq	48(%r13), %rcx
	movq	%rax, (%rcx,%rbx,8)
	movq	48(%r13), %rax
	cmpq	$0, (%rax,%rbx,8)
	je	LBB0_41
## %bb.42:                              ##   in Loop: Header=BB0_40 Depth=1
	incq	%rbx
	movq	24(%r13), %rax
	movslq	8(%rax), %rax
	cmpq	%rax, %rbx
	jl	LBB0_40
	jmp	LBB0_43
LBB0_9:
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_10
LBB0_12:
	leaq	L_.str.1(%rip), %rdi
LBB0_10:
	xorl	%eax, %eax
	callq	_dm_error
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	jmp	LBB0_19
LBB0_17:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_18
LBB0_26:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	leaq	L_.str.3(%rip), %rdi
	jmp	LBB0_18
LBB0_28:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	leaq	L_.str.4(%rip), %rdi
	jmp	LBB0_18
LBB0_24:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	leaq	L_.str.5(%rip), %rdi
	jmp	LBB0_18
LBB0_35:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	leaq	L_.str.6(%rip), %rdi
	jmp	LBB0_18
LBB0_33:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	leaq	L_.str.7(%rip), %rdi
	jmp	LBB0_18
LBB0_38:
	xorl	%ebx, %ebx
LBB0_43:
	movl	%ebx, 8(%r13)
	movq	%r12, %rdi
	callq	_dcn21_mpc_create
	movq	%rax, 40(%r13)
	testq	%rax, %rax
	je	LBB0_44
## %bb.45:
	movq	%r12, %rdi
	callq	_dcn21_hubbub_create
	movq	%rax, 32(%r13)
	testq	%rax, %rax
	je	LBB0_46
## %bb.47:
	movq	%r12, %rdi
	movq	%r13, %rsi
	callq	_dcn20_dwbc_create
	testl	%eax, %eax
	je	LBB0_48
## %bb.49:
	movq	%r12, %rdi
	movq	%r13, %rsi
	callq	_dcn20_mmhubbub_create
	testl	%eax, %eax
	je	LBB0_50
## %bb.51:
	movq	56(%r14), %rax
	movq	(%rax), %rdi
	callq	_IS_FPGA_MAXIMUS_DC
	testq	%rax, %rax
	jne	LBB0_52
## %bb.53:
	movq	_res_create_funcs@GOTPCREL(%rip), %rcx
	jmp	LBB0_54
LBB0_41:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	leaq	L_.str.8(%rip), %rdi
	jmp	LBB0_18
LBB0_44:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	leaq	L_.str.9(%rip), %rdi
	jmp	LBB0_18
LBB0_46:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	leaq	L_.str.10(%rip), %rdi
	jmp	LBB0_18
LBB0_48:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	leaq	L_.str.11(%rip), %rdi
	jmp	LBB0_18
LBB0_50:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	leaq	L_.str.12(%rip), %rdi
LBB0_18:
	xorl	%eax, %eax
	callq	_dm_error
LBB0_19:
	movq	%r13, %rdi
	callq	_destruct
	xorl	%eax, %eax
LBB0_59:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_52:
	movq	_res_create_maximus_funcs@GOTPCREL(%rip), %rcx
LBB0_54:
	movl	%r15d, %edi
	movq	%r14, %rsi
	movq	%r13, %rdx
	callq	_resource_construct
	testl	%eax, %eax
	je	LBB0_19
## %bb.55:
	movq	%r14, %rdi
	callq	_dcn20_hw_sequencer_construct
	movl	(%r13), %eax
	movl	%eax, 40(%r14)
	testl	%eax, %eax
	jle	LBB0_58
## %bb.56:
	movq	48(%r14), %rax
	xorl	%ecx, %ecx
	movq	_plane_cap@GOTPCREL(%rip), %rdx
LBB0_57:                                ## =>This Inner Loop Header: Depth=1
	movl	(%rdx), %esi
	movl	%esi, (%rax,%rcx,4)
	incq	%rcx
	movslq	40(%r14), %rsi
	cmpq	%rsi, %rcx
	jl	LBB0_57
LBB0_58:
	movq	_cap_funcs@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r14)
	movl	$1, %eax
	jmp	LBB0_59
	.cfi_endproc
                                        ## -- End function
	.comm	_bios_regs,4,2                  ## @bios_regs
	.comm	_res_cap_rn,16,2                ## @res_cap_rn
	.comm	_dcn21_res_pool_funcs,4,2       ## @dcn21_res_pool_funcs
	.comm	_NO_UNDERLAY_PIPE,4,2           ## @NO_UNDERLAY_PIPE
	.comm	_DCE_ENV_PRODUCTION_DRV,8,3     ## @DCE_ENV_PRODUCTION_DRV
	.comm	_debug_defaults_drv,8,3         ## @debug_defaults_drv
	.comm	_DCE_ENV_FPGA_MAXIMUS,8,3       ## @DCE_ENV_FPGA_MAXIMUS
	.comm	_debug_defaults_diags,8,3       ## @debug_defaults_diags
	.comm	_CLOCK_SOURCE_COMBO_PHY_PLL0,4,2 ## @CLOCK_SOURCE_COMBO_PHY_PLL0
	.comm	_clk_src_regs,8,3               ## @clk_src_regs
	.comm	_DCN20_CLK_SRC_PLL0,8,3         ## @DCN20_CLK_SRC_PLL0
	.comm	_CLOCK_SOURCE_COMBO_PHY_PLL1,4,2 ## @CLOCK_SOURCE_COMBO_PHY_PLL1
	.comm	_DCN20_CLK_SRC_PLL1,8,3         ## @DCN20_CLK_SRC_PLL1
	.comm	_DCN20_CLK_SRC_TOTAL_DCN21,4,2  ## @DCN20_CLK_SRC_TOTAL_DCN21
	.comm	_CLOCK_SOURCE_ID_DP_DTO,4,2     ## @CLOCK_SOURCE_ID_DP_DTO
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"DC: failed to create clock sources!\n"

	.comm	_dccg_regs,4,2                  ## @dccg_regs
	.comm	_dccg_shift,4,2                 ## @dccg_shift
	.comm	_dccg_mask,4,2                  ## @dccg_mask
L_.str.1:                               ## @.str.1
	.asciz	"DC: failed to create dccg!\n"

	.comm	_dcn2_1_soc,4,2                 ## @dcn2_1_soc
	.comm	_dcn2_1_ip,4,2                  ## @dcn2_1_ip
	.comm	_DML_PROJECT_DCN21,4,2          ## @DML_PROJECT_DCN21
L_.str.2:                               ## @.str.2
	.asciz	"DC: failed to create memory input!\n"

L_.str.3:                               ## @.str.3
	.asciz	"DC: failed to create input pixel processor!\n"

L_.str.4:                               ## @.str.4
	.asciz	"DC: failed to create dpps!\n"

L_.str.5:                               ## @.str.5
	.asciz	"DC:failed to create aux engine!!\n"

L_.str.6:                               ## @.str.6
	.asciz	"DC:failed to create hw i2c!!\n"

L_.str.7:                               ## @.str.7
	.asciz	"DC: failed to create output pixel processor!\n"

L_.str.8:                               ## @.str.8
	.asciz	"DC: failed to create tg!\n"

L_.str.9:                               ## @.str.9
	.asciz	"DC: failed to create mpc!\n"

L_.str.10:                              ## @.str.10
	.asciz	"DC: failed to create hubbub!\n"

L_.str.11:                              ## @.str.11
	.asciz	"DC: failed to create dwbc!\n"

L_.str.12:                              ## @.str.12
	.asciz	"DC: failed to create mcif_wb!\n"

	.comm	_res_create_funcs,4,2           ## @res_create_funcs
	.comm	_res_create_maximus_funcs,4,2   ## @res_create_maximus_funcs
	.comm	_plane_cap,4,2                  ## @plane_cap
	.comm	_cap_funcs,4,2                  ## @cap_funcs
	.comm	_dmcub_mask,4,2                 ## @dmcub_mask
	.comm	_dmcub_regs,4,2                 ## @dmcub_regs
	.comm	_dmcub_shift,4,2                ## @dmcub_shift
	.comm	_res_cap_rn_FPGA_4pipe,16,2     ## @res_cap_rn_FPGA_4pipe
	.no_dead_strip	_construct
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ; -- Begin function construct
lCPI0_0:
	.long	200                             ; 0xc8
	.long	100                             ; 0x64
	.long	256                             ; 0x100
	.long	2048                            ; 0x800
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_construct:                             ; @construct
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	ldr	x22, [x1, #56]
Lloh0:
	adrp	x8, _bios_regs@GOTPAGE
Lloh1:
	ldr	x8, [x8, _bios_regs@GOTPAGEOFF]
	ldp	x9, x1, [x22]
	str	x8, [x1]
Lloh2:
	adrp	x8, _res_cap_rn@GOTPAGE
Lloh3:
	ldr	x8, [x8, _res_cap_rn@GOTPAGEOFF]
	str	x8, [x2, #24]
Lloh4:
	adrp	x8, _dcn21_res_pool_funcs@GOTPAGE
Lloh5:
	ldr	x8, [x8, _dcn21_res_pool_funcs@GOTPAGEOFF]
	str	x8, [x2, #160]
Lloh6:
	adrp	x8, _NO_UNDERLAY_PIPE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _NO_UNDERLAY_PIPE@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	str	w8, [x2, #152]
	mov	w8, #4
	str	w8, [x2]
Lloh9:
	adrp	x8, lCPI0_0@PAGE
Lloh10:
	ldr	q0, [x8, lCPI0_0@PAGEOFF]
	stur	q0, [x20, #8]
	movi.4s	v0, #1
	stur	q0, [x20, #24]
Lloh11:
	adrp	x8, _DCE_ENV_PRODUCTION_DRV@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DCE_ENV_PRODUCTION_DRV@GOTPAGEOFF]
Lloh13:
	adrp	x10, _debug_defaults_drv@GOTPAGE
Lloh14:
	ldr	x10, [x10, _debug_defaults_drv@GOTPAGEOFF]
Lloh15:
	adrp	x11, _debug_defaults_diags@GOTPAGE
Lloh16:
	ldr	x11, [x11, _debug_defaults_diags@GOTPAGEOFF]
Lloh17:
	ldr	x8, [x8]
	cmp	x9, x8
	csel	x8, x10, x11, eq
	ldr	x8, [x8]
	str	x8, [x20, #80]
	ldr	x0, [x20, #72]
	cbz	x0, LBB0_2
; %bb.1:
	mov	w1, #16
	bl	_vm_helper_init
	ldr	x1, [x22, #8]
LBB0_2:
Lloh18:
	adrp	x8, _CLOCK_SOURCE_COMBO_PHY_PLL0@GOTPAGE
Lloh19:
	ldr	x8, [x8, _CLOCK_SOURCE_COMBO_PHY_PLL0@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
Lloh21:
	adrp	x23, _clk_src_regs@GOTPAGE
Lloh22:
	ldr	x23, [x23, _clk_src_regs@GOTPAGEOFF]
	ldr	x3, [x23]
	mov	x0, x22
	mov	w4, #0
	bl	_dcn21_clock_source_create
	ldr	x8, [x19, #136]
Lloh23:
	adrp	x9, _DCN20_CLK_SRC_PLL0@GOTPAGE
Lloh24:
	ldr	x9, [x9, _DCN20_CLK_SRC_PLL0@GOTPAGEOFF]
Lloh25:
	ldr	x9, [x9]
	str	x0, [x8, x9, lsl #3]
	ldr	x1, [x22, #8]
Lloh26:
	adrp	x8, _CLOCK_SOURCE_COMBO_PHY_PLL1@GOTPAGE
Lloh27:
	ldr	x8, [x8, _CLOCK_SOURCE_COMBO_PHY_PLL1@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	ldr	x8, [x23]
	add	x3, x8, #4
	mov	x0, x22
	mov	w4, #0
	bl	_dcn21_clock_source_create
	ldr	x8, [x19, #136]
Lloh29:
	adrp	x9, _DCN20_CLK_SRC_PLL1@GOTPAGE
Lloh30:
	ldr	x9, [x9, _DCN20_CLK_SRC_PLL1@GOTPAGEOFF]
Lloh31:
	ldr	x9, [x9]
	str	x0, [x8, x9, lsl #3]
Lloh32:
	adrp	x8, _DCN20_CLK_SRC_TOTAL_DCN21@GOTPAGE
Lloh33:
	ldr	x8, [x8, _DCN20_CLK_SRC_TOTAL_DCN21@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	str	w8, [x19, #4]
	ldr	x1, [x22, #8]
Lloh35:
	adrp	x8, _CLOCK_SOURCE_ID_DP_DTO@GOTPAGE
Lloh36:
	ldr	x8, [x8, _CLOCK_SOURCE_ID_DP_DTO@GOTPAGEOFF]
Lloh37:
	ldr	w2, [x8]
	ldr	x3, [x23]
	mov	x0, x22
	mov	w4, #1
	bl	_dcn21_clock_source_create
	str	x0, [x19, #144]
	ldr	w8, [x19, #4]
	cmp	w8, #1
	b.lt	LBB0_6
; %bb.3:
	ldr	x9, [x19, #136]
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x10, [x9]
	cbz	x10, LBB0_27
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	add	x9, x9, #8
	subs	x8, x8, #1
	b.ne	LBB0_4
LBB0_6:
Lloh38:
	adrp	x1, _dccg_regs@GOTPAGE
Lloh39:
	ldr	x1, [x1, _dccg_regs@GOTPAGEOFF]
Lloh40:
	adrp	x2, _dccg_shift@GOTPAGE
Lloh41:
	ldr	x2, [x2, _dccg_shift@GOTPAGEOFF]
Lloh42:
	adrp	x3, _dccg_mask@GOTPAGE
Lloh43:
	ldr	x3, [x3, _dccg_mask@GOTPAGEOFF]
	mov	x0, x22
	bl	_dccg2_create
	str	x0, [x19, #128]
	cbz	x0, LBB0_28
; %bb.7:
	mov	x0, x22
	bl	_dcn21_pp_smu_create
	str	w0, [x19, #116]
	add	x0, x20, #64
Lloh44:
	adrp	x8, _DML_PROJECT_DCN21@GOTPAGE
Lloh45:
	ldr	x8, [x8, _DML_PROJECT_DCN21@GOTPAGEOFF]
Lloh46:
	ldr	w3, [x8]
Lloh47:
	adrp	x1, _dcn2_1_soc@GOTPAGE
Lloh48:
	ldr	x1, [x1, _dcn2_1_soc@GOTPAGEOFF]
Lloh49:
	adrp	x2, _dcn2_1_ip@GOTPAGE
Lloh50:
	ldr	x2, [x2, _dcn2_1_ip@GOTPAGEOFF]
	bl	_dml_init_instance
	ldr	x8, [x20, #56]
	str	x8, [sp, #8]
	add	x0, sp, #8
	bl	_dal_irq_service_dcn21_create
	str	w0, [x19, #112]
	cbz	w0, LBB0_52
; %bb.8:
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_14
; %bb.9:
	mov	x23, #0
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x22
	mov	x1, x23
	bl	_dcn21_hubp_create
	ldr	x8, [x19, #104]
	lsl	x24, x23, #3
	str	x0, [x8, x24]
	ldr	x8, [x19, #104]
	ldr	x8, [x8, x24]
	cbz	x8, LBB0_30
; %bb.11:                               ;   in Loop: Header=BB0_10 Depth=1
	mov	x0, x22
	mov	x1, x23
	bl	_dcn21_ipp_create
	ldr	x8, [x19, #96]
	str	x0, [x8, x24]
	ldr	x8, [x19, #96]
	ldr	x8, [x8, x24]
	cbz	x8, LBB0_31
; %bb.12:                               ;   in Loop: Header=BB0_10 Depth=1
	mov	x0, x22
	mov	x1, x23
	bl	_dcn21_dpp_create
	ldr	x8, [x19, #88]
	str	x0, [x8, x24]
	ldr	x8, [x19, #88]
	ldr	x8, [x8, x24]
	cbz	x8, LBB0_32
; %bb.13:                               ;   in Loop: Header=BB0_10 Depth=1
	add	x23, x23, #1
	ldrsw	x8, [x19]
	cmp	x23, x8
	b.lt	LBB0_10
LBB0_14:
	ldr	x8, [x19, #24]
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_19
; %bb.15:
	mov	x23, #0
LBB0_16:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x22
	mov	x1, x23
	bl	_dcn21_aux_engine_create
	ldr	x8, [x19, #80]
	lsl	x24, x23, #3
	str	x0, [x8, x24]
	ldr	x8, [x19, #80]
	ldr	x8, [x8, x24]
	cbz	x8, LBB0_33
; %bb.17:                               ;   in Loop: Header=BB0_16 Depth=1
	mov	x0, x22
	mov	x1, x23
	bl	_dcn21_i2c_hw_create
	ldr	x8, [x19, #72]
	str	x0, [x8, x24]
	ldr	x8, [x19, #72]
	ldr	x8, [x8, x24]
	cbz	x8, LBB0_34
; %bb.18:                               ;   in Loop: Header=BB0_16 Depth=1
	ldr	x8, [x19, #64]
	str	xzr, [x8, x23, lsl #3]
	add	x23, x23, #1
	ldr	x8, [x19, #24]
	ldrsw	x9, [x8]
	cmp	x23, x9
	b.lt	LBB0_16
LBB0_19:
	ldr	w9, [x8, #4]
	cmp	w9, #1
	b.lt	LBB0_23
; %bb.20:
	mov	x23, #0
LBB0_21:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x22
	mov	x1, x23
	bl	_dcn21_opp_create
	ldr	x8, [x19, #56]
	lsl	x9, x23, #3
	str	x0, [x8, x9]
	ldr	x8, [x19, #56]
	ldr	x8, [x8, x9]
	cbz	x8, LBB0_35
; %bb.22:                               ;   in Loop: Header=BB0_21 Depth=1
	add	x23, x23, #1
	ldr	x8, [x19, #24]
	ldrsw	x9, [x8, #4]
	cmp	x23, x9
	b.lt	LBB0_21
LBB0_23:
	ldr	w8, [x8, #8]
	cmp	w8, #1
	b.lt	LBB0_36
; %bb.24:
	mov	x23, #0
LBB0_25:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x22
	mov	x1, x23
	bl	_dcn21_timing_generator_create
	ldr	x8, [x19, #48]
	lsl	x9, x23, #3
	str	x0, [x8, x9]
	ldr	x8, [x19, #48]
	ldr	x8, [x8, x9]
	cbz	x8, LBB0_46
; %bb.26:                               ;   in Loop: Header=BB0_25 Depth=1
	add	x23, x23, #1
	ldr	x8, [x19, #24]
	ldrsw	x8, [x8, #8]
	cmp	x23, x8
	b.lt	LBB0_25
	b	LBB0_37
LBB0_27:
Lloh51:
	adrp	x0, l_.str@PAGE
Lloh52:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_29
LBB0_28:
Lloh53:
	adrp	x0, l_.str.1@PAGE
Lloh54:
	add	x0, x0, l_.str.1@PAGEOFF
LBB0_29:
	bl	_dm_error
	bl	_BREAK_TO_DEBUGGER
	b	LBB0_52
LBB0_30:
	bl	_BREAK_TO_DEBUGGER
Lloh55:
	adrp	x0, l_.str.2@PAGE
Lloh56:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_51
LBB0_31:
	bl	_BREAK_TO_DEBUGGER
Lloh57:
	adrp	x0, l_.str.3@PAGE
Lloh58:
	add	x0, x0, l_.str.3@PAGEOFF
	b	LBB0_51
LBB0_32:
	bl	_BREAK_TO_DEBUGGER
Lloh59:
	adrp	x0, l_.str.4@PAGE
Lloh60:
	add	x0, x0, l_.str.4@PAGEOFF
	b	LBB0_51
LBB0_33:
	bl	_BREAK_TO_DEBUGGER
Lloh61:
	adrp	x0, l_.str.5@PAGE
Lloh62:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_51
LBB0_34:
	bl	_BREAK_TO_DEBUGGER
Lloh63:
	adrp	x0, l_.str.6@PAGE
Lloh64:
	add	x0, x0, l_.str.6@PAGEOFF
	b	LBB0_51
LBB0_35:
	bl	_BREAK_TO_DEBUGGER
Lloh65:
	adrp	x0, l_.str.7@PAGE
Lloh66:
	add	x0, x0, l_.str.7@PAGEOFF
	b	LBB0_51
LBB0_36:
	mov	w23, #0
LBB0_37:
	str	w23, [x19, #8]
	mov	x0, x22
	bl	_dcn21_mpc_create
	str	x0, [x19, #40]
	cbz	x0, LBB0_47
; %bb.38:
	mov	x0, x22
	bl	_dcn21_hubbub_create
	str	x0, [x19, #32]
	cbz	x0, LBB0_48
; %bb.39:
	mov	x0, x22
	mov	x1, x19
	bl	_dcn20_dwbc_create
	cbz	w0, LBB0_49
; %bb.40:
	mov	x0, x22
	mov	x1, x19
	bl	_dcn20_mmhubbub_create
	cbz	w0, LBB0_50
; %bb.41:
	ldr	x8, [x20, #56]
	ldr	x0, [x8]
	bl	_IS_FPGA_MAXIMUS_DC
Lloh67:
	adrp	x8, _res_create_maximus_funcs@GOTPAGE
Lloh68:
	ldr	x8, [x8, _res_create_maximus_funcs@GOTPAGEOFF]
Lloh69:
	adrp	x9, _res_create_funcs@GOTPAGE
Lloh70:
	ldr	x9, [x9, _res_create_funcs@GOTPAGEOFF]
	cmp	x0, #0
	csel	x3, x9, x8, eq
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	bl	_resource_construct
	cbz	w0, LBB0_52
; %bb.42:
	mov	x0, x20
	bl	_dcn20_hw_sequencer_construct
	ldr	w8, [x19]
	str	w8, [x20, #40]
	cmp	w8, #1
	b.lt	LBB0_45
; %bb.43:
	mov	x8, #0
	ldr	x9, [x20, #48]
Lloh71:
	adrp	x10, _plane_cap@GOTPAGE
Lloh72:
	ldr	x10, [x10, _plane_cap@GOTPAGEOFF]
LBB0_44:                                ; =>This Inner Loop Header: Depth=1
	ldr	w11, [x10]
	str	w11, [x9, x8, lsl #2]
	add	x8, x8, #1
	ldrsw	x11, [x20, #40]
	cmp	x8, x11
	b.lt	LBB0_44
LBB0_45:
Lloh73:
	adrp	x8, _cap_funcs@GOTPAGE
Lloh74:
	ldr	x8, [x8, _cap_funcs@GOTPAGEOFF]
Lloh75:
	ldr	w8, [x8]
	str	w8, [x20]
	mov	w0, #1
	b	LBB0_53
LBB0_46:
	bl	_BREAK_TO_DEBUGGER
Lloh76:
	adrp	x0, l_.str.8@PAGE
Lloh77:
	add	x0, x0, l_.str.8@PAGEOFF
	b	LBB0_51
LBB0_47:
	bl	_BREAK_TO_DEBUGGER
Lloh78:
	adrp	x0, l_.str.9@PAGE
Lloh79:
	add	x0, x0, l_.str.9@PAGEOFF
	b	LBB0_51
LBB0_48:
	bl	_BREAK_TO_DEBUGGER
Lloh80:
	adrp	x0, l_.str.10@PAGE
Lloh81:
	add	x0, x0, l_.str.10@PAGEOFF
	b	LBB0_51
LBB0_49:
	bl	_BREAK_TO_DEBUGGER
Lloh82:
	adrp	x0, l_.str.11@PAGE
Lloh83:
	add	x0, x0, l_.str.11@PAGEOFF
	b	LBB0_51
LBB0_50:
	bl	_BREAK_TO_DEBUGGER
Lloh84:
	adrp	x0, l_.str.12@PAGE
Lloh85:
	add	x0, x0, l_.str.12@PAGEOFF
LBB0_51:
	bl	_dm_error
LBB0_52:
	mov	x0, x19
	bl	_destruct
	mov	w0, #0
LBB0_53:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh17
	.loh AdrpAdrp	Lloh9, Lloh11
	.loh AdrpLdr	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpAdd	Lloh51, Lloh52
	.loh AdrpAdd	Lloh53, Lloh54
	.loh AdrpAdd	Lloh55, Lloh56
	.loh AdrpAdd	Lloh57, Lloh58
	.loh AdrpAdd	Lloh59, Lloh60
	.loh AdrpAdd	Lloh61, Lloh62
	.loh AdrpAdd	Lloh63, Lloh64
	.loh AdrpAdd	Lloh65, Lloh66
	.loh AdrpLdrGot	Lloh69, Lloh70
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGot	Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpAdd	Lloh76, Lloh77
	.loh AdrpAdd	Lloh78, Lloh79
	.loh AdrpAdd	Lloh80, Lloh81
	.loh AdrpAdd	Lloh82, Lloh83
	.loh AdrpAdd	Lloh84, Lloh85
	.cfi_endproc
                                        ; -- End function
	.comm	_bios_regs,4,2                  ; @bios_regs
	.comm	_res_cap_rn,16,2                ; @res_cap_rn
	.comm	_dcn21_res_pool_funcs,4,2       ; @dcn21_res_pool_funcs
	.comm	_NO_UNDERLAY_PIPE,4,2           ; @NO_UNDERLAY_PIPE
	.comm	_DCE_ENV_PRODUCTION_DRV,8,3     ; @DCE_ENV_PRODUCTION_DRV
	.comm	_debug_defaults_drv,8,3         ; @debug_defaults_drv
	.comm	_DCE_ENV_FPGA_MAXIMUS,8,3       ; @DCE_ENV_FPGA_MAXIMUS
	.comm	_debug_defaults_diags,8,3       ; @debug_defaults_diags
	.comm	_CLOCK_SOURCE_COMBO_PHY_PLL0,4,2 ; @CLOCK_SOURCE_COMBO_PHY_PLL0
	.comm	_clk_src_regs,8,3               ; @clk_src_regs
	.comm	_DCN20_CLK_SRC_PLL0,8,3         ; @DCN20_CLK_SRC_PLL0
	.comm	_CLOCK_SOURCE_COMBO_PHY_PLL1,4,2 ; @CLOCK_SOURCE_COMBO_PHY_PLL1
	.comm	_DCN20_CLK_SRC_PLL1,8,3         ; @DCN20_CLK_SRC_PLL1
	.comm	_DCN20_CLK_SRC_TOTAL_DCN21,4,2  ; @DCN20_CLK_SRC_TOTAL_DCN21
	.comm	_CLOCK_SOURCE_ID_DP_DTO,4,2     ; @CLOCK_SOURCE_ID_DP_DTO
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"DC: failed to create clock sources!\n"

	.comm	_dccg_regs,4,2                  ; @dccg_regs
	.comm	_dccg_shift,4,2                 ; @dccg_shift
	.comm	_dccg_mask,4,2                  ; @dccg_mask
l_.str.1:                               ; @.str.1
	.asciz	"DC: failed to create dccg!\n"

	.comm	_dcn2_1_soc,4,2                 ; @dcn2_1_soc
	.comm	_dcn2_1_ip,4,2                  ; @dcn2_1_ip
	.comm	_DML_PROJECT_DCN21,4,2          ; @DML_PROJECT_DCN21
l_.str.2:                               ; @.str.2
	.asciz	"DC: failed to create memory input!\n"

l_.str.3:                               ; @.str.3
	.asciz	"DC: failed to create input pixel processor!\n"

l_.str.4:                               ; @.str.4
	.asciz	"DC: failed to create dpps!\n"

l_.str.5:                               ; @.str.5
	.asciz	"DC:failed to create aux engine!!\n"

l_.str.6:                               ; @.str.6
	.asciz	"DC:failed to create hw i2c!!\n"

l_.str.7:                               ; @.str.7
	.asciz	"DC: failed to create output pixel processor!\n"

l_.str.8:                               ; @.str.8
	.asciz	"DC: failed to create tg!\n"

l_.str.9:                               ; @.str.9
	.asciz	"DC: failed to create mpc!\n"

l_.str.10:                              ; @.str.10
	.asciz	"DC: failed to create hubbub!\n"

l_.str.11:                              ; @.str.11
	.asciz	"DC: failed to create dwbc!\n"

l_.str.12:                              ; @.str.12
	.asciz	"DC: failed to create mcif_wb!\n"

	.comm	_res_create_funcs,4,2           ; @res_create_funcs
	.comm	_res_create_maximus_funcs,4,2   ; @res_create_maximus_funcs
	.comm	_plane_cap,4,2                  ; @plane_cap
	.comm	_cap_funcs,4,2                  ; @cap_funcs
	.comm	_dmcub_mask,4,2                 ; @dmcub_mask
	.comm	_dmcub_regs,4,2                 ; @dmcub_regs
	.comm	_dmcub_shift,4,2                ; @dmcub_shift
	.comm	_res_cap_rn_FPGA_4pipe,16,2     ; @res_cap_rn_FPGA_4pipe
	.no_dead_strip	_construct
.subsections_via_symbols
