	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rcs_resume
_rcs_resume:                            ## @rcs_resume
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	(%rdi), %r12
	movq	%r12, %rdi
	movl	$4, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_ECOSKPD@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_ECO_CONSTANT_BUFFER_SR_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
LBB0_2:
	movq	%r12, %rdi
	movl	$4, %esi
	movl	$6, %edx
	callq	_IS_GEN_RANGE
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_MI_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_VS_TIMER_DISPATCH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
LBB0_4:
	movq	%r12, %rdi
	movl	$6, %esi
	movl	$7, %edx
	callq	_IS_GEN_RANGE
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movq	_MI_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_ASYNC_FLIP_PERF_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
LBB0_6:
	movq	%r12, %rdi
	movl	$6, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:
	movq	_GFX_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_GFX_TLB_INVALIDATE_EXPLICIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
LBB0_8:
	movq	%r12, %rdi
	movl	$7, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_10
## %bb.9:
	movq	_GFX_MODE_GEN7@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_GFX_TLB_INVALIDATE_EXPLICIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%eax, %ebx
	movq	_GFX_REPLAY_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_ENABLE
	orl	%eax, %ebx
	movl	%r15d, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
LBB0_10:
	movq	%r12, %rdi
	movl	$6, %esi
	callq	_IS_GEN
	testq	%rax, %rax
	je	LBB0_12
## %bb.11:
	movq	_CACHE_MODE_0@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_CM0_STC_EVICT_DISABLE_LRA_SNB@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_DISABLE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
LBB0_12:
	movq	%r12, %rdi
	movl	$6, %esi
	movl	$7, %edx
	callq	_IS_GEN_RANGE
	testq	%rax, %rax
	je	LBB0_14
## %bb.13:
	movq	_INSTPM@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_INSTPM_FORCE_ORDERING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
LBB0_14:
	movq	%r14, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_xcs_resume                     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ECOSKPD,4,2                    ## @ECOSKPD
	.comm	_ECO_CONSTANT_BUFFER_SR_DISABLE,4,2 ## @ECO_CONSTANT_BUFFER_SR_DISABLE
	.comm	_MI_MODE,4,2                    ## @MI_MODE
	.comm	_VS_TIMER_DISPATCH,4,2          ## @VS_TIMER_DISPATCH
	.comm	_ASYNC_FLIP_PERF_DISABLE,4,2    ## @ASYNC_FLIP_PERF_DISABLE
	.comm	_GFX_MODE,4,2                   ## @GFX_MODE
	.comm	_GFX_TLB_INVALIDATE_EXPLICIT,4,2 ## @GFX_TLB_INVALIDATE_EXPLICIT
	.comm	_GFX_MODE_GEN7,4,2              ## @GFX_MODE_GEN7
	.comm	_GFX_REPLAY_MODE,4,2            ## @GFX_REPLAY_MODE
	.comm	_CACHE_MODE_0,4,2               ## @CACHE_MODE_0
	.comm	_CM0_STC_EVICT_DISABLE_LRA_SNB,4,2 ## @CM0_STC_EVICT_DISABLE_LRA_SNB
	.comm	_INSTPM,4,2                     ## @INSTPM
	.comm	_INSTPM_FORCE_ORDERING,4,2      ## @INSTPM_FORCE_ORDERING
	.no_dead_strip	_rcs_resume
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rcs_resume
_rcs_resume:                            ; @rcs_resume
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0]
	mov	x0, x20
	mov	w1, #4
	bl	_IS_GEN
	cbz	x0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _ECOSKPD@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ECOSKPD@GOTPAGEOFF]
Lloh2:
	ldr	w21, [x8]
Lloh3:
	adrp	x8, _ECO_CONSTANT_BUFFER_SR_DISABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ECO_CONSTANT_BUFFER_SR_DISABLE@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	__MASKED_BIT_ENABLE
	mov	x1, x0
	mov	x0, x21
	bl	_I915_WRITE
LBB0_2:
	mov	x0, x20
	mov	w1, #4
	mov	w2, #6
	bl	_IS_GEN_RANGE
Lloh6:
	adrp	x22, _MI_MODE@GOTPAGE
Lloh7:
	ldr	x22, [x22, _MI_MODE@GOTPAGEOFF]
	cbz	x0, LBB0_4
; %bb.3:
	ldr	w21, [x22]
Lloh8:
	adrp	x8, _VS_TIMER_DISPATCH@GOTPAGE
Lloh9:
	ldr	x8, [x8, _VS_TIMER_DISPATCH@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	bl	__MASKED_BIT_ENABLE
	mov	x1, x0
	mov	x0, x21
	bl	_I915_WRITE
LBB0_4:
	mov	x0, x20
	mov	w1, #6
	mov	w2, #7
	bl	_IS_GEN_RANGE
	cbz	x0, LBB0_6
; %bb.5:
	ldr	w21, [x22]
Lloh11:
	adrp	x8, _ASYNC_FLIP_PERF_DISABLE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _ASYNC_FLIP_PERF_DISABLE@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	bl	__MASKED_BIT_ENABLE
	mov	x1, x0
	mov	x0, x21
	bl	_I915_WRITE
LBB0_6:
	mov	x0, x20
	mov	w1, #6
	bl	_IS_GEN
Lloh14:
	adrp	x22, _GFX_TLB_INVALIDATE_EXPLICIT@GOTPAGE
Lloh15:
	ldr	x22, [x22, _GFX_TLB_INVALIDATE_EXPLICIT@GOTPAGEOFF]
	cbz	x0, LBB0_8
; %bb.7:
Lloh16:
	adrp	x8, _GFX_MODE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _GFX_MODE@GOTPAGEOFF]
Lloh18:
	ldr	w21, [x8]
	ldr	w0, [x22]
	bl	__MASKED_BIT_ENABLE
	mov	x1, x0
	mov	x0, x21
	bl	_I915_WRITE
LBB0_8:
	mov	x0, x20
	mov	w1, #7
	bl	_IS_GEN
	cbz	x0, LBB0_10
; %bb.9:
Lloh19:
	adrp	x8, _GFX_MODE_GEN7@GOTPAGE
Lloh20:
	ldr	x8, [x8, _GFX_MODE_GEN7@GOTPAGEOFF]
Lloh21:
	ldr	w21, [x8]
	ldr	w0, [x22]
	bl	__MASKED_BIT_ENABLE
	mov	x22, x0
Lloh22:
	adrp	x8, _GFX_REPLAY_MODE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _GFX_REPLAY_MODE@GOTPAGEOFF]
Lloh24:
	ldr	w0, [x8]
	bl	__MASKED_BIT_ENABLE
	orr	w1, w0, w22
	mov	x0, x21
	bl	_I915_WRITE
LBB0_10:
	mov	x0, x20
	mov	w1, #6
	bl	_IS_GEN
	cbz	x0, LBB0_12
; %bb.11:
Lloh25:
	adrp	x8, _CACHE_MODE_0@GOTPAGE
Lloh26:
	ldr	x8, [x8, _CACHE_MODE_0@GOTPAGEOFF]
Lloh27:
	ldr	w21, [x8]
Lloh28:
	adrp	x8, _CM0_STC_EVICT_DISABLE_LRA_SNB@GOTPAGE
Lloh29:
	ldr	x8, [x8, _CM0_STC_EVICT_DISABLE_LRA_SNB@GOTPAGEOFF]
Lloh30:
	ldr	w0, [x8]
	bl	__MASKED_BIT_DISABLE
	mov	x1, x0
	mov	x0, x21
	bl	_I915_WRITE
LBB0_12:
	mov	x0, x20
	mov	w1, #6
	mov	w2, #7
	bl	_IS_GEN_RANGE
	cbz	x0, LBB0_14
; %bb.13:
Lloh31:
	adrp	x8, _INSTPM@GOTPAGE
Lloh32:
	ldr	x8, [x8, _INSTPM@GOTPAGEOFF]
Lloh33:
	ldr	w20, [x8]
Lloh34:
	adrp	x8, _INSTPM_FORCE_ORDERING@GOTPAGE
Lloh35:
	ldr	x8, [x8, _INSTPM_FORCE_ORDERING@GOTPAGEOFF]
Lloh36:
	ldr	w0, [x8]
	bl	__MASKED_BIT_ENABLE
	mov	x1, x0
	mov	x0, x20
	bl	_I915_WRITE
LBB0_14:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_xcs_resume
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.cfi_endproc
                                        ; -- End function
	.comm	_ECOSKPD,4,2                    ; @ECOSKPD
	.comm	_ECO_CONSTANT_BUFFER_SR_DISABLE,4,2 ; @ECO_CONSTANT_BUFFER_SR_DISABLE
	.comm	_MI_MODE,4,2                    ; @MI_MODE
	.comm	_VS_TIMER_DISPATCH,4,2          ; @VS_TIMER_DISPATCH
	.comm	_ASYNC_FLIP_PERF_DISABLE,4,2    ; @ASYNC_FLIP_PERF_DISABLE
	.comm	_GFX_MODE,4,2                   ; @GFX_MODE
	.comm	_GFX_TLB_INVALIDATE_EXPLICIT,4,2 ; @GFX_TLB_INVALIDATE_EXPLICIT
	.comm	_GFX_MODE_GEN7,4,2              ; @GFX_MODE_GEN7
	.comm	_GFX_REPLAY_MODE,4,2            ; @GFX_REPLAY_MODE
	.comm	_CACHE_MODE_0,4,2               ; @CACHE_MODE_0
	.comm	_CM0_STC_EVICT_DISABLE_LRA_SNB,4,2 ; @CM0_STC_EVICT_DISABLE_LRA_SNB
	.comm	_INSTPM,4,2                     ; @INSTPM
	.comm	_INSTPM_FORCE_ORDERING,4,2      ; @INSTPM_FORCE_ORDERING
	.no_dead_strip	_rcs_resume
.subsections_via_symbols
