	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v7_0_ring_emit_vgt_flush
_gfx_v7_0_ring_emit_vgt_flush:          ## @gfx_v7_0_ring_emit_vgt_flush
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_PACKET3_EVENT_WRITE@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	_VS_PARTIAL_FLUSH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVENT_TYPE
	movl	%eax, %ebx
	movl	$4, %edi
	callq	_EVENT_INDEX
	orl	%eax, %ebx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_amdgpu_ring_write
	movl	(%r15), %edi
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	_VGT_FLUSH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVENT_TYPE
	movl	%eax, %ebx
	xorl	%edi, %edi
	callq	_EVENT_INDEX
	orl	%eax, %ebx
	movq	%r14, %rdi
	movl	%ebx, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PACKET3_EVENT_WRITE,4,2        ## @PACKET3_EVENT_WRITE
	.comm	_VS_PARTIAL_FLUSH,4,2           ## @VS_PARTIAL_FLUSH
	.comm	_VGT_FLUSH,4,2                  ## @VGT_FLUSH
	.no_dead_strip	_gfx_v7_0_ring_emit_vgt_flush
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v7_0_ring_emit_vgt_flush
_gfx_v7_0_ring_emit_vgt_flush:          ; @gfx_v7_0_ring_emit_vgt_flush
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x21, _PACKET3_EVENT_WRITE@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PACKET3_EVENT_WRITE@GOTPAGEOFF]
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
Lloh2:
	adrp	x8, _VS_PARTIAL_FLUSH@GOTPAGE
Lloh3:
	ldr	x8, [x8, _VS_PARTIAL_FLUSH@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	bl	_EVENT_TYPE
	mov	x20, x0
	mov	w0, #4
	bl	_EVENT_INDEX
	orr	w1, w0, w20
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
Lloh5:
	adrp	x8, _VGT_FLUSH@GOTPAGE
Lloh6:
	ldr	x8, [x8, _VGT_FLUSH@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	bl	_EVENT_TYPE
	mov	x20, x0
	mov	w0, #0
	bl	_EVENT_INDEX
	orr	w1, w0, w20
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_PACKET3_EVENT_WRITE,4,2        ; @PACKET3_EVENT_WRITE
	.comm	_VS_PARTIAL_FLUSH,4,2           ; @VS_PARTIAL_FLUSH
	.comm	_VGT_FLUSH,4,2                  ; @VGT_FLUSH
	.no_dead_strip	_gfx_v7_0_ring_emit_vgt_flush
.subsections_via_symbols
