	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function exynos_dsi_enable_clock
_exynos_dsi_enable_clock:               ## @exynos_dsi_enable_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movl	12(%rdi), %esi
	callq	_exynos_dsi_set_pll
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	%rax, %r15
	movq	%rax, %rbx
	shrq	$3, %rbx
	movl	8(%r12), %esi
	movq	%rbx, %rdi
	callq	_DIV_ROUND_UP
	movq	%rax, %r14
	movq	%rbx, %rax
	orq	%r14, %rax
	shrq	$32, %rax
	je	LBB0_3
## %bb.4:
	movq	%rbx, %rax
	xorl	%edx, %edx
	divq	%r14
	jmp	LBB0_5
LBB0_1:
	movl	4(%r12), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_err
	movq	_EFAULT@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
	jmp	LBB0_10
LBB0_3:
	movl	%ebx, %eax
	xorl	%edx, %edx
	divl	%r14d
                                        ## kill: def $eax killed $eax def $rax
LBB0_5:
	movq	_MHZ@GOTPCREL(%rip), %rcx
	movslq	(%rcx), %rcx
	shlq	$2, %rcx
	leaq	(%rcx,%rcx,4), %rcx
	cmpq	%rcx, %rax
	jbe	LBB0_9
## %bb.6:
	incq	%r14
	movq	%rbx, %rax
	orq	%r14, %rax
	shrq	$32, %rax
	je	LBB0_7
## %bb.8:
	movq	%rbx, %rax
	xorl	%edx, %edx
	divq	%r14
	jmp	LBB0_9
LBB0_7:
	movl	%ebx, %eax
	xorl	%edx, %edx
	divl	%r14d
                                        ## kill: def $eax killed $eax def $rax
LBB0_9:
	movl	4(%r12), %edi
	leaq	L_.str.1(%rip), %rsi
	movq	%r15, %rdx
	movq	%rbx, %rcx
	movq	%rax, %r8
	callq	_dev_dbg
	movq	_DSIM_CLKCTRL_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_exynos_dsi_read
	movq	_DSIM_ESC_PRESCALER_MASK@GOTPCREL(%rip), %rcx
	movq	_DSIM_LANE_ESC_CLK_EN_CLK@GOTPCREL(%rip), %rbx
	movl	(%rbx), %r15d
	orl	(%rcx), %r15d
	movq	_DSIM_LANE_ESC_CLK_EN_DATA_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r15d
	movq	_DSIM_PLL_BYPASS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r15d
	movq	_DSIM_BYTE_CLK_SRC_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r15d
	notl	%r15d
	andl	%eax, %r15d
	movq	_DSIM_ESC_CLKEN@GOTPCREL(%rip), %rax
	movq	_DSIM_BYTE_CLKEN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r13d
	orl	(%rax), %r13d
	movq	%r14, %rdi
	callq	_DSIM_ESC_PRESCALER
	movl	(%r12), %edi
	orl	%eax, %r13d
	orl	%r15d, %r13d
	orl	(%rbx), %r13d
	callq	_BIT
	leaq	-1(%rax), %rdi
	callq	_DSIM_LANE_ESC_CLK_EN_DATA
	movl	%eax, %ebx
	xorl	%r14d, %r14d
	xorl	%edi, %edi
	callq	_DSIM_BYTE_CLK_SRC
	movq	_DSIM_TX_REQUEST_HSCLK@GOTPCREL(%rip), %rcx
	orl	%eax, %ebx
	orl	%r13d, %ebx
	orl	(%rcx), %ebx
	movq	_DSIM_CLKCTRL_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	movl	%ebx, %edx
	callq	_exynos_dsi_write
LBB0_10:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to configure DSI PLL\n"

	.comm	_EFAULT,4,2                     ## @EFAULT
	.comm	_MHZ,4,2                        ## @MHZ
L_.str.1:                               ## @.str.1
	.asciz	"hs_clk = %lu, byte_clk = %lu, esc_clk = %lu\n"

	.comm	_DSIM_CLKCTRL_REG,4,2           ## @DSIM_CLKCTRL_REG
	.comm	_DSIM_ESC_PRESCALER_MASK,4,2    ## @DSIM_ESC_PRESCALER_MASK
	.comm	_DSIM_LANE_ESC_CLK_EN_CLK,4,2   ## @DSIM_LANE_ESC_CLK_EN_CLK
	.comm	_DSIM_LANE_ESC_CLK_EN_DATA_MASK,4,2 ## @DSIM_LANE_ESC_CLK_EN_DATA_MASK
	.comm	_DSIM_PLL_BYPASS,4,2            ## @DSIM_PLL_BYPASS
	.comm	_DSIM_BYTE_CLK_SRC_MASK,4,2     ## @DSIM_BYTE_CLK_SRC_MASK
	.comm	_DSIM_ESC_CLKEN,4,2             ## @DSIM_ESC_CLKEN
	.comm	_DSIM_BYTE_CLKEN,4,2            ## @DSIM_BYTE_CLKEN
	.comm	_DSIM_TX_REQUEST_HSCLK,4,2      ## @DSIM_TX_REQUEST_HSCLK
	.no_dead_strip	_exynos_dsi_enable_clock
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function exynos_dsi_enable_clock
_exynos_dsi_enable_clock:               ; @exynos_dsi_enable_clock
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	w1, [x0, #12]
	bl	_exynos_dsi_set_pll
	cbz	x0, LBB0_2
; %bb.1:
	mov	x20, x0
	lsr	x21, x0, #3
	ldr	w1, [x19, #8]
	mov	x0, x21
	bl	_DIV_ROUND_UP
	udiv	x8, x21, x0
Lloh0:
	adrp	x9, _MHZ@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MHZ@GOTPAGEOFF]
Lloh2:
	ldrsw	x9, [x9]
	add	x9, x9, x9, lsl #2
	cmp	x8, x9, lsl #2
	add	x9, x0, #1
	udiv	x9, x21, x9
	csel	x4, x8, x9, ls
	cinc	x22, x0, hi
	ldr	w0, [x19, #4]
Lloh3:
	adrp	x1, l_.str.1@PAGE
Lloh4:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x2, x20
	mov	x3, x21
	bl	_dev_dbg
Lloh5:
	adrp	x23, _DSIM_CLKCTRL_REG@GOTPAGE
Lloh6:
	ldr	x23, [x23, _DSIM_CLKCTRL_REG@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	bl	_exynos_dsi_read
Lloh7:
	adrp	x8, _DSIM_ESC_PRESCALER_MASK@GOTPAGE
Lloh8:
	ldr	x8, [x8, _DSIM_ESC_PRESCALER_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
Lloh10:
	adrp	x21, _DSIM_LANE_ESC_CLK_EN_CLK@GOTPAGE
Lloh11:
	ldr	x21, [x21, _DSIM_LANE_ESC_CLK_EN_CLK@GOTPAGEOFF]
	ldr	w9, [x21]
	orr	w8, w9, w8
Lloh12:
	adrp	x9, _DSIM_LANE_ESC_CLK_EN_DATA_MASK@GOTPAGE
Lloh13:
	ldr	x9, [x9, _DSIM_LANE_ESC_CLK_EN_DATA_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh15:
	adrp	x9, _DSIM_PLL_BYPASS@GOTPAGE
Lloh16:
	ldr	x9, [x9, _DSIM_PLL_BYPASS@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh18:
	adrp	x9, _DSIM_BYTE_CLK_SRC_MASK@GOTPAGE
Lloh19:
	ldr	x9, [x9, _DSIM_BYTE_CLK_SRC_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh21:
	adrp	x9, _DSIM_ESC_CLKEN@GOTPAGE
Lloh22:
	ldr	x9, [x9, _DSIM_ESC_CLKEN@GOTPAGEOFF]
	bic	w24, w0, w8
Lloh23:
	ldr	w8, [x9]
Lloh24:
	adrp	x9, _DSIM_BYTE_CLKEN@GOTPAGE
Lloh25:
	ldr	x9, [x9, _DSIM_BYTE_CLKEN@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	orr	w25, w9, w8
	mov	x0, x22
	bl	_DSIM_ESC_PRESCALER
	mov	x20, x0
	ldr	w22, [x21]
	ldr	w0, [x19]
	bl	_BIT
	sub	x0, x0, #1
	bl	_DSIM_LANE_ESC_CLK_EN_DATA
	mov	x21, x0
	mov	w0, #0
	bl	_DSIM_BYTE_CLK_SRC
Lloh27:
	adrp	x8, _DSIM_TX_REQUEST_HSCLK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _DSIM_TX_REQUEST_HSCLK@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	orr	w9, w25, w24
	orr	w9, w9, w20
	orr	w9, w9, w22
	orr	w9, w9, w21
	orr	w9, w9, w0
	orr	w2, w9, w8
	ldr	w1, [x23]
	mov	x0, x19
	bl	_exynos_dsi_write
	mov	w0, #0
	b	LBB0_3
LBB0_2:
	ldr	w0, [x19, #4]
Lloh30:
	adrp	x1, l_.str@PAGE
Lloh31:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
Lloh32:
	adrp	x8, _EFAULT@GOTPAGE
Lloh33:
	ldr	x8, [x8, _EFAULT@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_3:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpAdd	Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to configure DSI PLL\n"

	.comm	_EFAULT,4,2                     ; @EFAULT
	.comm	_MHZ,4,2                        ; @MHZ
l_.str.1:                               ; @.str.1
	.asciz	"hs_clk = %lu, byte_clk = %lu, esc_clk = %lu\n"

	.comm	_DSIM_CLKCTRL_REG,4,2           ; @DSIM_CLKCTRL_REG
	.comm	_DSIM_ESC_PRESCALER_MASK,4,2    ; @DSIM_ESC_PRESCALER_MASK
	.comm	_DSIM_LANE_ESC_CLK_EN_CLK,4,2   ; @DSIM_LANE_ESC_CLK_EN_CLK
	.comm	_DSIM_LANE_ESC_CLK_EN_DATA_MASK,4,2 ; @DSIM_LANE_ESC_CLK_EN_DATA_MASK
	.comm	_DSIM_PLL_BYPASS,4,2            ; @DSIM_PLL_BYPASS
	.comm	_DSIM_BYTE_CLK_SRC_MASK,4,2     ; @DSIM_BYTE_CLK_SRC_MASK
	.comm	_DSIM_ESC_CLKEN,4,2             ; @DSIM_ESC_CLKEN
	.comm	_DSIM_BYTE_CLKEN,4,2            ; @DSIM_BYTE_CLKEN
	.comm	_DSIM_TX_REQUEST_HSCLK,4,2      ; @DSIM_TX_REQUEST_HSCLK
	.no_dead_strip	_exynos_dsi_enable_clock
.subsections_via_symbols
