	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_bo_fault_reserve_notify ## -- Begin function amdgpu_bo_fault_reserve_notify
	.p2align	4, 0x90
_amdgpu_bo_fault_reserve_notify:        ## @amdgpu_bo_fault_reserve_notify
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movl	24(%rdi), %edi
	callq	_amdgpu_ttm_adev
	movq	%rax, %r14
	movq	$0, -48(%rbp)
	movq	%rbx, %rdi
	callq	_amdgpu_bo_is_amdgpu_bo
	testl	%eax, %eax
	je	LBB0_7
## %bb.1:
	movq	%rbx, %rdi
	callq	_ttm_to_amdgpu_bo
	movq	%rax, %r15
	movq	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 32(%r15)
	movq	(%rbx), %rax
	movq	_TTM_PL_VRAM@GOTPCREL(%rip), %r13
	cmpq	(%r13), %rax
	jne	LBB0_7
## %bb.2:
	movq	8(%rbx), %rax
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	%rax, %r12
	shlq	%cl, %r12
	addq	16(%rbx), %rax
	shlq	%cl, %rax
	cmpq	(%r14), %rax
	jbe	LBB0_7
## %bb.3:
	cmpq	$0, (%r15)
	jle	LBB0_9
LBB0_4:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
	jmp	LBB0_8
LBB0_9:
	movq	%r14, %rdi
	addq	$8, %rdi
	callq	_atomic64_inc
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movq	_AMDGPU_GEM_DOMAIN_GTT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	%r15, %rdi
	callq	_amdgpu_bo_placement_from_domain
	movq	%r15, %rsi
	addq	$8, %rsi
	movl	$1, 8(%r15)
	movq	24(%r15), %rax
	addq	$4, %rax
	movq	%rax, 16(%r15)
	leaq	-48(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_ttm_bo_validate
	movl	%eax, %r15d
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_8
## %bb.10:
	movq	(%rbx), %rax
	cmpq	(%r13), %rax
	jne	LBB0_7
## %bb.11:
	movq	16(%rbx), %rax
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rax
	addq	%r12, %rax
	movl	$0, %r15d
	cmpq	(%r14), %rax
	ja	LBB0_4
	jmp	LBB0_8
LBB0_7:
	xorl	%r15d, %r15d
LBB0_8:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,4,2 ## @AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
	.comm	_TTM_PL_VRAM,8,3                ## @TTM_PL_VRAM
	.comm	_PAGE_SHIFT,8,3                 ## @PAGE_SHIFT
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ## @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_AMDGPU_GEM_DOMAIN_GTT,4,2      ## @AMDGPU_GEM_DOMAIN_GTT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_bo_fault_reserve_notify ; -- Begin function amdgpu_bo_fault_reserve_notify
	.p2align	2
_amdgpu_bo_fault_reserve_notify:        ; @amdgpu_bo_fault_reserve_notify
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	w0, [x0, #24]
	bl	_amdgpu_ttm_adev
	mov	x20, x0
	str	xzr, [sp, #8]
	mov	x0, x19
	bl	_amdgpu_bo_is_amdgpu_bo
	cbz	w0, LBB0_8
; %bb.1:
	mov	x0, x19
	bl	_ttm_to_amdgpu_bo
Lloh0:
	adrp	x8, _AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	ldr	w9, [x0, #32]
	orr	w8, w9, w8
	str	w8, [x0, #32]
	ldr	x8, [x19]
Lloh3:
	adrp	x22, _TTM_PL_VRAM@GOTPAGE
Lloh4:
	ldr	x22, [x22, _TTM_PL_VRAM@GOTPAGEOFF]
	ldr	x9, [x22]
	cmp	x8, x9
	b.ne	LBB0_8
; %bb.2:
Lloh5:
	adrp	x23, _PAGE_SHIFT@GOTPAGE
Lloh6:
	ldr	x23, [x23, _PAGE_SHIFT@GOTPAGEOFF]
	ldr	x24, [x23]
	ldp	x25, x8, [x19, #8]
	add	x8, x8, x25
	lsl	x8, x8, x24
	ldr	x9, [x20]
	cmp	x8, x9
	b.ls	LBB0_8
; %bb.3:
	mov	x21, x0
	ldr	x8, [x0]
	cmp	x8, #1
	b.lt	LBB0_5
LBB0_4:
Lloh7:
	adrp	x8, _EINVAL@GOTPAGE
Lloh8:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	neg	w21, w8
	b	LBB0_9
LBB0_5:
	add	x0, x20, #8
	bl	_atomic64_inc
Lloh10:
	adrp	x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGE
Lloh11:
	ldr	x8, [x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
Lloh13:
	adrp	x9, _AMDGPU_GEM_DOMAIN_GTT@GOTPAGE
Lloh14:
	ldr	x9, [x9, _AMDGPU_GEM_DOMAIN_GTT@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	orr	w1, w9, w8
	mov	x0, x21
	bl	_amdgpu_bo_placement_from_domain
	mov	w8, #1
	str	w8, [x21, #8]!
	ldr	x8, [x21, #16]
	add	x8, x8, #4
	str	x8, [x21, #8]
	add	x2, sp, #8
	mov	x0, x19
	mov	x1, x21
	bl	_ttm_bo_validate
	mov	x21, x0
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbnz	x0, LBB0_9
; %bb.6:
	ldr	x8, [x19]
	ldr	x9, [x22]
	cmp	x8, x9
	b.ne	LBB0_8
; %bb.7:
	lsl	x8, x25, x24
	ldr	x9, [x19, #16]
	ldr	x10, [x23]
	lsl	x9, x9, x10
	ldr	x10, [x20]
	add	x8, x9, x8
	cmp	x8, x10
	b.hi	LBB0_4
LBB0_8:
	mov	w21, #0
LBB0_9:
	mov	x0, x21
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,4,2 ; @AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
	.comm	_TTM_PL_VRAM,8,3                ; @TTM_PL_VRAM
	.comm	_PAGE_SHIFT,8,3                 ; @PAGE_SHIFT
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ; @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_AMDGPU_GEM_DOMAIN_GTT,4,2      ; @AMDGPU_GEM_DOMAIN_GTT
.subsections_via_symbols
