	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hsw_get_dpll
_hsw_get_dpll:                          ## @hsw_get_dpll
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	callq	_intel_atomic_get_new_crtc_state
	movq	%rax, %r13
	leaq	16(%rax), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movq	_INTEL_OUTPUT_HDMI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_intel_crtc_has_type
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_hsw_ddi_hdmi_get_dpll
	jmp	LBB0_7
LBB0_2:
	movq	%r13, %rdi
	callq	_intel_crtc_has_dp_encoder
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	%r13, %rdi
	callq	_hsw_ddi_dp_get_dpll
LBB0_7:
	movq	%rax, %rbx
	testq	%rax, %rax
	je	LBB0_8
## %bb.9:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movq	%r12, %rcx
	callq	_intel_reference_shared_dpll
	movq	%rbx, 8(%r13)
	movl	$1, %ebx
	jmp	LBB0_10
LBB0_8:
	xorl	%ebx, %ebx
LBB0_10:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	_INTEL_OUTPUT_ANALOG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_intel_crtc_has_type
	xorl	%ebx, %ebx
	testq	%rax, %rax
	je	LBB0_10
## %bb.5:
	movl	(%r13), %eax
	andl	$-2, %eax
	xorl	%edi, %edi
	cmpl	$270000, %eax                   ## imm = 0x41EB0
	setne	%dil
	callq	_WARN_ON
	testq	%rax, %rax
	jne	LBB0_10
## %bb.6:
	movq	_SPLL_PLL_ENABLE@GOTPCREL(%rip), %rax
	movq	_SPLL_FREQ_1350MHz@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_SPLL_REF_MUXED_SSC@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	%ecx, (%r12)
	movq	_DPLL_ID_SPLL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	%ecx, %r8d
	callq	_intel_find_shared_dpll
	jmp	LBB0_7
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_OUTPUT_HDMI,4,2          ## @INTEL_OUTPUT_HDMI
	.comm	_INTEL_OUTPUT_ANALOG,4,2        ## @INTEL_OUTPUT_ANALOG
	.comm	_SPLL_PLL_ENABLE,4,2            ## @SPLL_PLL_ENABLE
	.comm	_SPLL_FREQ_1350MHz,4,2          ## @SPLL_FREQ_1350MHz
	.comm	_SPLL_REF_MUXED_SSC,4,2         ## @SPLL_REF_MUXED_SSC
	.comm	_DPLL_ID_SPLL,4,2               ## @DPLL_ID_SPLL
	.no_dead_strip	_hsw_get_dpll
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hsw_get_dpll
_hsw_get_dpll:                          ; @hsw_get_dpll
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x21, x0
	bl	_intel_atomic_get_new_crtc_state
	mov	x20, x0
	add	x22, x0, #16
	mov	x0, x22
	mov	w1, #0
	mov	w2, #4
	bl	_memset
Lloh0:
	adrp	x8, _INTEL_OUTPUT_HDMI@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_OUTPUT_HDMI@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_crtc_has_type
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x21
	mov	x1, x19
	bl	_hsw_ddi_hdmi_get_dpll
	mov	x23, x0
	cbnz	x0, LBB0_4
	b	LBB0_8
LBB0_2:
	mov	x0, x20
	bl	_intel_crtc_has_dp_encoder
	cbz	x0, LBB0_5
; %bb.3:
	mov	x0, x20
	bl	_hsw_ddi_dp_get_dpll
	mov	x23, x0
	cbz	x0, LBB0_8
LBB0_4:
	mov	x0, x21
	mov	x1, x19
	mov	x2, x23
	mov	x3, x22
	bl	_intel_reference_shared_dpll
	str	x23, [x20, #8]
	mov	w0, #1
	b	LBB0_9
LBB0_5:
Lloh3:
	adrp	x8, _INTEL_OUTPUT_ANALOG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _INTEL_OUTPUT_ANALOG@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_intel_crtc_has_type
	cbz	x0, LBB0_9
; %bb.6:
	ldr	w8, [x20]
	mov	w9, #3928
	movk	w9, #2, lsl #16
	cmp	w9, w8, lsr #1
	cset	w0, ne
	bl	_WARN_ON
	cbnz	x0, LBB0_8
; %bb.7:
Lloh6:
	adrp	x8, _SPLL_PLL_ENABLE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SPLL_PLL_ENABLE@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x9, _SPLL_FREQ_1350MHz@GOTPAGE
Lloh10:
	ldr	x9, [x9, _SPLL_FREQ_1350MHz@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh12:
	adrp	x9, _SPLL_REF_MUXED_SSC@GOTPAGE
Lloh13:
	ldr	x9, [x9, _SPLL_REF_MUXED_SSC@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w8, w9
	str	w8, [x22]
Lloh15:
	adrp	x8, _DPLL_ID_SPLL@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DPLL_ID_SPLL@GOTPAGEOFF]
Lloh17:
	ldr	w3, [x8]
	mov	x0, x21
	mov	x1, x19
	mov	x2, x22
	mov	x4, x3
	bl	_intel_find_shared_dpll
	mov	x23, x0
	cbnz	x0, LBB0_4
LBB0_8:
	mov	w0, #0
LBB0_9:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_OUTPUT_HDMI,4,2          ; @INTEL_OUTPUT_HDMI
	.comm	_INTEL_OUTPUT_ANALOG,4,2        ; @INTEL_OUTPUT_ANALOG
	.comm	_SPLL_PLL_ENABLE,4,2            ; @SPLL_PLL_ENABLE
	.comm	_SPLL_FREQ_1350MHz,4,2          ; @SPLL_FREQ_1350MHz
	.comm	_SPLL_REF_MUXED_SSC,4,2         ; @SPLL_REF_MUXED_SSC
	.comm	_DPLL_ID_SPLL,4,2               ; @DPLL_ID_SPLL
	.no_dead_strip	_hsw_get_dpll
.subsections_via_symbols
