	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v10_0_cp_resume
_gfx_v10_0_cp_resume:                   ## @gfx_v10_0_cp_resume
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	_AMD_IS_APU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rdi)
	jne	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_gfx_v10_0_enable_gui_idle_interrupt
LBB0_2:
	movq	32(%r15), %rax
	movq	_AMDGPU_FW_LOAD_DIRECT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
## %bb.3:
	movq	%r15, %rdi
	callq	_gfx_v10_0_cp_gfx_load_microcode
	testl	%eax, %eax
	jne	LBB0_22
## %bb.4:
	movq	%r15, %rdi
	callq	_gfx_v10_0_cp_compute_load_microcode
	testl	%eax, %eax
	jne	LBB0_22
LBB0_5:
	movq	%r15, %rdi
	callq	_gfx_v10_0_kiq_resume
	testl	%eax, %eax
	jne	LBB0_22
## %bb.6:
	movq	%r15, %rdi
	callq	_gfx_v10_0_kcq_resume
	testl	%eax, %eax
	jne	LBB0_22
## %bb.7:
	movq	_amdgpu_async_gfx_ring@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	je	LBB0_8
## %bb.9:
	movq	%r15, %rdi
	callq	_gfx_v10_0_cp_async_gfx_ring_resume
	testl	%eax, %eax
	jne	LBB0_22
	jmp	LBB0_11
LBB0_8:
	movq	%r15, %rdi
	callq	_gfx_v10_0_cp_gfx_resume
	testl	%eax, %eax
	jne	LBB0_22
LBB0_11:
	cmpl	$0, 8(%r15)
	jle	LBB0_15
## %bb.12:
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_13:                                ## =>This Inner Loop Header: Depth=1
	movq	24(%r15), %r14
	leaq	(%r14,%rbx), %r12
	movl	12(%r14,%rbx), %edx
	movl	4(%r14,%rbx), %r8d
	movl	8(%r14,%rbx), %ecx
	leaq	L_.str(%rip), %rdi
	movl	%r13d, %esi
	callq	_DRM_INFO
	movq	%r12, %rdi
	callq	_amdgpu_ring_test_ring
	testl	%eax, %eax
	jne	LBB0_17
## %bb.14:                              ##   in Loop: Header=BB0_13 Depth=1
	incq	%r13
	movslq	8(%r15), %rax
	addq	$16, %rbx
	cmpq	%rax, %r13
	jl	LBB0_13
LBB0_15:
	cmpl	$0, 12(%r15)
	jle	LBB0_16
## %bb.18:
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
	jmp	LBB0_19
	.p2align	4, 0x90
LBB0_21:                                ##   in Loop: Header=BB0_19 Depth=1
	incq	%r13
	movslq	12(%r15), %rcx
	addq	$16, %rbx
	xorl	%eax, %eax
	cmpq	%rcx, %r13
	jge	LBB0_22
LBB0_19:                                ## =>This Inner Loop Header: Depth=1
	movq	16(%r15), %r14
	leaq	(%r14,%rbx), %r12
	movl	$1, (%r14,%rbx)
	movl	12(%r14,%rbx), %edx
	movl	4(%r14,%rbx), %r8d
	movl	8(%r14,%rbx), %ecx
	leaq	L_.str.1(%rip), %rdi
	movl	%r13d, %esi
	callq	_DRM_INFO
	movq	%r12, %rdi
	callq	_amdgpu_ring_test_ring
	testl	%eax, %eax
	je	LBB0_21
## %bb.20:                              ##   in Loop: Header=BB0_19 Depth=1
	movl	$0, (%r14,%rbx)
	jmp	LBB0_21
LBB0_17:
	movl	$0, (%r14,%rbx)
	jmp	LBB0_22
LBB0_16:
	xorl	%eax, %eax
LBB0_22:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_IS_APU,4,2                 ## @AMD_IS_APU
	.comm	_AMDGPU_FW_LOAD_DIRECT,8,3      ## @AMDGPU_FW_LOAD_DIRECT
	.comm	_amdgpu_async_gfx_ring,4,2      ## @amdgpu_async_gfx_ring
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"gfx %d ring me %d pipe %d q %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"compute ring %d mec %d pipe %d q %d\n"

	.no_dead_strip	_gfx_v10_0_cp_resume
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v10_0_cp_resume
_gfx_v10_0_cp_resume:                   ; @gfx_v10_0_cp_resume
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _AMD_IS_APU@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMD_IS_APU@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_2
; %bb.1:
	mov	x0, x19
	mov	w1, #0
	bl	_gfx_v10_0_enable_gui_idle_interrupt
LBB0_2:
	ldr	x8, [x19, #32]
Lloh3:
	adrp	x9, _AMDGPU_FW_LOAD_DIRECT@GOTPAGE
Lloh4:
	ldr	x9, [x9, _AMDGPU_FW_LOAD_DIRECT@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_5
; %bb.3:
	mov	x0, x19
	bl	_gfx_v10_0_cp_gfx_load_microcode
	cbnz	w0, LBB0_7
; %bb.4:
	mov	x0, x19
	bl	_gfx_v10_0_cp_compute_load_microcode
	cbnz	w0, LBB0_7
LBB0_5:
	mov	x0, x19
	bl	_gfx_v10_0_kiq_resume
	cbnz	w0, LBB0_7
; %bb.6:
	mov	x0, x19
	bl	_gfx_v10_0_kcq_resume
	cbz	w0, LBB0_8
LBB0_7:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_8:
Lloh6:
	adrp	x8, _amdgpu_async_gfx_ring@GOTPAGE
Lloh7:
	ldr	x8, [x8, _amdgpu_async_gfx_ring@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cbz	w8, LBB0_10
; %bb.9:
	mov	x0, x19
	bl	_gfx_v10_0_cp_async_gfx_ring_resume
	cbnz	w0, LBB0_7
	b	LBB0_11
LBB0_10:
	mov	x0, x19
	bl	_gfx_v10_0_cp_gfx_resume
	cbnz	w0, LBB0_7
LBB0_11:
	ldr	w8, [x19, #8]
	cmp	w8, #1
	b.lt	LBB0_15
; %bb.12:
	mov	x23, #0
	mov	x20, #0
Lloh9:
	adrp	x21, l_.str@PAGE
Lloh10:
	add	x21, x21, l_.str@PAGEOFF
LBB0_13:                                ; =>This Inner Loop Header: Depth=1
	ldr	x24, [x19, #24]
	add	x22, x24, x23
	ldp	w3, w2, [x22, #8]
	ldr	w4, [x22, #4]
	mov	x0, x21
	mov	x1, x20
	bl	_DRM_INFO
	mov	x0, x22
	bl	_amdgpu_ring_test_ring
	cbnz	w0, LBB0_20
; %bb.14:                               ;   in Loop: Header=BB0_13 Depth=1
	add	x20, x20, #1
	ldrsw	x8, [x19, #8]
	add	x23, x23, #16
	cmp	x20, x8
	b.lt	LBB0_13
LBB0_15:
	ldr	w8, [x19, #12]
	cmp	w8, #1
	b.lt	LBB0_21
; %bb.16:
	mov	x23, #0
	mov	x20, #0
	mov	w24, #1
Lloh11:
	adrp	x21, l_.str.1@PAGE
Lloh12:
	add	x21, x21, l_.str.1@PAGEOFF
	b	LBB0_18
LBB0_17:                                ;   in Loop: Header=BB0_18 Depth=1
	mov	w0, #0
	add	x20, x20, #1
	ldrsw	x8, [x19, #12]
	add	x23, x23, #16
	cmp	x20, x8
	b.ge	LBB0_7
LBB0_18:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #16]
	add	x22, x8, x23
	str	w24, [x22]
	ldp	w3, w2, [x22, #8]
	ldr	w4, [x22, #4]
	mov	x0, x21
	mov	x1, x20
	bl	_DRM_INFO
	mov	x0, x22
	bl	_amdgpu_ring_test_ring
	cbz	w0, LBB0_17
; %bb.19:                               ;   in Loop: Header=BB0_18 Depth=1
	str	wzr, [x22]
	b	LBB0_17
LBB0_20:
	str	wzr, [x24, x23]
	b	LBB0_7
LBB0_21:
	mov	w0, #0
	b	LBB0_7
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_IS_APU,4,2                 ; @AMD_IS_APU
	.comm	_AMDGPU_FW_LOAD_DIRECT,8,3      ; @AMDGPU_FW_LOAD_DIRECT
	.comm	_amdgpu_async_gfx_ring,4,2      ; @amdgpu_async_gfx_ring
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"gfx %d ring me %d pipe %d q %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"compute ring %d mec %d pipe %d q %d\n"

	.no_dead_strip	_gfx_v10_0_cp_resume
.subsections_via_symbols
