	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_show_cursor
_radeon_show_cursor:                    ## @radeon_show_cursor
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_to_radeon_crtc
	cmpq	$0, 16(%rax)
	je	LBB0_1
LBB0_16:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	%rax, %r15
	movq	(%rbx), %rax
	movq	(%rax), %r14
	movq	%r14, %rdi
	callq	_ASIC_IS_DCE4
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	movq	_EVERGREEN_CUR_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movslq	(%r15), %rbx
	addq	(%rax), %rbx
	movl	4(%r15), %edi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_EVERGREEN_CUR_SURFACE_ADDRESS@GOTPCREL(%rip), %rax
	movslq	(%r15), %rbx
	addq	(%rax), %rbx
	movl	4(%r15), %edi
	callq	_lower_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_RADEON_MM_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	_EVERGREEN_CUR_CONTROL@GOTPCREL(%rip), %rax
	movl	(%r15), %esi
	addl	(%rax), %esi
	callq	_WREG32
	movq	_RADEON_MM_DATA@GOTPCREL(%rip), %rax
	movq	(%rax), %r14
	movq	_EVERGREEN_CURSOR_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_EVERGREEN_CURSOR_24_8_PRE_MULT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_CURSOR_MODE
	orl	%eax, %ebx
	movq	_EVERGREEN_CURSOR_URGENT_1_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVERGREEN_CURSOR_URGENT_CONTROL
	orl	%eax, %ebx
	movq	%r14, %rdi
	movl	%ebx, %esi
	jmp	LBB0_10
LBB0_3:
	movq	%r14, %rdi
	callq	_ASIC_IS_AVIVO
	testq	%rax, %rax
	je	LBB0_11
## %bb.4:
	movq	(%r14), %rax
	movq	_CHIP_RV770@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_9
## %bb.5:
	cmpl	$0, 8(%r15)
	jne	LBB0_6
## %bb.7:
	movq	_R700_D1CUR_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_11:
	movq	_RADEON_CUR_OFFSET@GOTPCREL(%rip), %rax
	movslq	(%r15), %rdi
	addq	(%rax), %rdi
	movl	4(%r15), %esi
	subl	12(%r15), %esi
	callq	_WREG32
	movl	8(%r15), %eax
	testl	%eax, %eax
	je	LBB0_12
## %bb.13:
	cmpl	$1, %eax
	jne	LBB0_16
## %bb.14:
	movq	_RADEON_CRTC2_GEN_CNTL@GOTPCREL(%rip), %rax
	jmp	LBB0_15
LBB0_6:
	movq	_R700_D2CUR_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
LBB0_8:
	movq	(%rax), %rbx
	movl	4(%r15), %edi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
LBB0_9:
	movq	_AVIVO_D1CUR_SURFACE_ADDRESS@GOTPCREL(%rip), %rax
	movslq	(%r15), %rbx
	addq	(%rax), %rbx
	movl	4(%r15), %edi
	callq	_lower_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_RADEON_MM_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	_AVIVO_D1CUR_CONTROL@GOTPCREL(%rip), %rax
	movl	(%r15), %esi
	addl	(%rax), %esi
	callq	_WREG32
	movq	_RADEON_MM_DATA@GOTPCREL(%rip), %rax
	movq	_AVIVO_D1CURSOR_MODE_24BPP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_AVIVO_D1CURSOR_MODE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	movq	(%rax), %rdi
	movq	_AVIVO_D1CURSOR_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
LBB0_10:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
LBB0_12:
	movq	_RADEON_CRTC_GEN_CNTL@GOTPCREL(%rip), %rax
LBB0_15:
	movq	_RADEON_MM_INDEX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdi
	movl	(%rax), %esi
	callq	_WREG32
	movq	_RADEON_MM_DATA@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	_RADEON_CRTC_CUR_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_RADEON_CRTC_CUR_MODE_24BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RADEON_CRTC_CUR_MODE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %esi
	orl	%edx, %esi
	movq	_RADEON_CRTC_CUR_MODE_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	notl	%edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32_P                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_EVERGREEN_CUR_SURFACE_ADDRESS_HIGH,8,3 ## @EVERGREEN_CUR_SURFACE_ADDRESS_HIGH
	.comm	_EVERGREEN_CUR_SURFACE_ADDRESS,8,3 ## @EVERGREEN_CUR_SURFACE_ADDRESS
	.comm	_RADEON_MM_INDEX,8,3            ## @RADEON_MM_INDEX
	.comm	_EVERGREEN_CUR_CONTROL,4,2      ## @EVERGREEN_CUR_CONTROL
	.comm	_RADEON_MM_DATA,8,3             ## @RADEON_MM_DATA
	.comm	_EVERGREEN_CURSOR_EN,4,2        ## @EVERGREEN_CURSOR_EN
	.comm	_EVERGREEN_CURSOR_24_8_PRE_MULT,4,2 ## @EVERGREEN_CURSOR_24_8_PRE_MULT
	.comm	_EVERGREEN_CURSOR_URGENT_1_2,4,2 ## @EVERGREEN_CURSOR_URGENT_1_2
	.comm	_CHIP_RV770,8,3                 ## @CHIP_RV770
	.comm	_R700_D2CUR_SURFACE_ADDRESS_HIGH,8,3 ## @R700_D2CUR_SURFACE_ADDRESS_HIGH
	.comm	_R700_D1CUR_SURFACE_ADDRESS_HIGH,8,3 ## @R700_D1CUR_SURFACE_ADDRESS_HIGH
	.comm	_AVIVO_D1CUR_SURFACE_ADDRESS,8,3 ## @AVIVO_D1CUR_SURFACE_ADDRESS
	.comm	_AVIVO_D1CUR_CONTROL,4,2        ## @AVIVO_D1CUR_CONTROL
	.comm	_AVIVO_D1CURSOR_EN,4,2          ## @AVIVO_D1CURSOR_EN
	.comm	_AVIVO_D1CURSOR_MODE_24BPP,4,2  ## @AVIVO_D1CURSOR_MODE_24BPP
	.comm	_AVIVO_D1CURSOR_MODE_SHIFT,4,2  ## @AVIVO_D1CURSOR_MODE_SHIFT
	.comm	_RADEON_CUR_OFFSET,8,3          ## @RADEON_CUR_OFFSET
	.comm	_RADEON_CRTC_GEN_CNTL,4,2       ## @RADEON_CRTC_GEN_CNTL
	.comm	_RADEON_CRTC2_GEN_CNTL,4,2      ## @RADEON_CRTC2_GEN_CNTL
	.comm	_RADEON_CRTC_CUR_EN,4,2         ## @RADEON_CRTC_CUR_EN
	.comm	_RADEON_CRTC_CUR_MODE_24BPP,4,2 ## @RADEON_CRTC_CUR_MODE_24BPP
	.comm	_RADEON_CRTC_CUR_MODE_SHIFT,4,2 ## @RADEON_CRTC_CUR_MODE_SHIFT
	.comm	_RADEON_CRTC_CUR_MODE_MASK,4,2  ## @RADEON_CRTC_CUR_MODE_MASK
	.no_dead_strip	_radeon_show_cursor
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_show_cursor
_radeon_show_cursor:                    ; @radeon_show_cursor
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x0
	bl	_to_radeon_crtc
	ldr	x8, [x0, #16]
	cbz	x8, LBB0_2
LBB0_1:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_2:
	mov	x19, x0
	ldr	x8, [x20]
	ldr	x20, [x8]
	mov	x0, x20
	bl	_ASIC_IS_DCE4
	cbz	x0, LBB0_4
; %bb.3:
Lloh0:
	adrp	x8, _EVERGREEN_CUR_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EVERGREEN_CUR_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	ldp	w9, w0, [x19]
                                        ; kill: def $w9 killed $w9 def $x9
	sxtw	x9, w9
	add	x20, x8, x9
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh3:
	adrp	x8, _EVERGREEN_CUR_SURFACE_ADDRESS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EVERGREEN_CUR_SURFACE_ADDRESS@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	ldp	w9, w0, [x19]
                                        ; kill: def $w9 killed $w9 def $x9
	sxtw	x9, w9
	add	x20, x8, x9
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh6:
	adrp	x8, _RADEON_MM_INDEX@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RADEON_MM_INDEX@GOTPAGEOFF]
Lloh8:
	ldr	x0, [x8]
Lloh9:
	adrp	x8, _EVERGREEN_CUR_CONTROL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _EVERGREEN_CUR_CONTROL@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	ldr	w9, [x19]
	add	w1, w9, w8
	bl	_WREG32
Lloh12:
	adrp	x8, _RADEON_MM_DATA@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RADEON_MM_DATA@GOTPAGEOFF]
Lloh14:
	ldr	x19, [x8]
Lloh15:
	adrp	x8, _EVERGREEN_CURSOR_EN@GOTPAGE
Lloh16:
	ldr	x8, [x8, _EVERGREEN_CURSOR_EN@GOTPAGEOFF]
Lloh17:
	ldr	w20, [x8]
Lloh18:
	adrp	x8, _EVERGREEN_CURSOR_24_8_PRE_MULT@GOTPAGE
Lloh19:
	ldr	x8, [x8, _EVERGREEN_CURSOR_24_8_PRE_MULT@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	bl	_EVERGREEN_CURSOR_MODE
	orr	w20, w0, w20
Lloh21:
	adrp	x8, _EVERGREEN_CURSOR_URGENT_1_2@GOTPAGE
Lloh22:
	ldr	x8, [x8, _EVERGREEN_CURSOR_URGENT_1_2@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
	bl	_EVERGREEN_CURSOR_URGENT_CONTROL
	orr	w1, w20, w0
	mov	x0, x19
	b	LBB0_8
LBB0_4:
	mov	x0, x20
	bl	_ASIC_IS_AVIVO
	cbz	x0, LBB0_9
; %bb.5:
	ldr	x8, [x20]
Lloh24:
	adrp	x9, _CHIP_RV770@GOTPAGE
Lloh25:
	ldr	x9, [x9, _CHIP_RV770@GOTPAGEOFF]
Lloh26:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_7
; %bb.6:
Lloh27:
	adrp	x8, _R700_D1CUR_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh28:
	ldr	x8, [x8, _R700_D1CUR_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
Lloh29:
	adrp	x9, _R700_D2CUR_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh30:
	ldr	x9, [x9, _R700_D2CUR_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
	ldp	w0, w10, [x19, #4]
	cmp	w10, #0
	csel	x8, x8, x9, eq
	ldr	x20, [x8]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
LBB0_7:
Lloh31:
	adrp	x8, _AVIVO_D1CUR_SURFACE_ADDRESS@GOTPAGE
Lloh32:
	ldr	x8, [x8, _AVIVO_D1CUR_SURFACE_ADDRESS@GOTPAGEOFF]
Lloh33:
	ldr	x8, [x8]
	ldp	w9, w0, [x19]
                                        ; kill: def $w9 killed $w9 def $x9
	sxtw	x9, w9
	add	x20, x8, x9
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh34:
	adrp	x8, _RADEON_MM_INDEX@GOTPAGE
Lloh35:
	ldr	x8, [x8, _RADEON_MM_INDEX@GOTPAGEOFF]
Lloh36:
	ldr	x0, [x8]
Lloh37:
	adrp	x8, _AVIVO_D1CUR_CONTROL@GOTPAGE
Lloh38:
	ldr	x8, [x8, _AVIVO_D1CUR_CONTROL@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	ldr	w9, [x19]
	add	w1, w9, w8
	bl	_WREG32
Lloh40:
	adrp	x8, _RADEON_MM_DATA@GOTPAGE
Lloh41:
	ldr	x8, [x8, _RADEON_MM_DATA@GOTPAGEOFF]
Lloh42:
	adrp	x9, _AVIVO_D1CURSOR_EN@GOTPAGE
Lloh43:
	ldr	x9, [x9, _AVIVO_D1CURSOR_EN@GOTPAGEOFF]
Lloh44:
	ldr	x0, [x8]
Lloh45:
	ldr	w8, [x9]
Lloh46:
	adrp	x9, _AVIVO_D1CURSOR_MODE_24BPP@GOTPAGE
Lloh47:
	ldr	x9, [x9, _AVIVO_D1CURSOR_MODE_24BPP@GOTPAGEOFF]
Lloh48:
	adrp	x10, _AVIVO_D1CURSOR_MODE_SHIFT@GOTPAGE
Lloh49:
	ldr	x10, [x10, _AVIVO_D1CURSOR_MODE_SHIFT@GOTPAGEOFF]
Lloh50:
	ldr	w9, [x9]
Lloh51:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w1, w9, w8
LBB0_8:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_WREG32
LBB0_9:
Lloh52:
	adrp	x8, _RADEON_CUR_OFFSET@GOTPAGE
Lloh53:
	ldr	x8, [x8, _RADEON_CUR_OFFSET@GOTPAGEOFF]
Lloh54:
	ldr	x8, [x8]
	ldp	w9, w10, [x19]
                                        ; kill: def $w9 killed $w9 def $x9
	sxtw	x9, w9
	add	x0, x8, x9
	ldr	w8, [x19, #12]
	sub	w1, w10, w8
	bl	_WREG32
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_12
; %bb.10:
	cmp	w8, #1
	b.ne	LBB0_1
; %bb.11:
Lloh55:
	adrp	x8, _RADEON_CRTC2_GEN_CNTL@GOTPAGE
Lloh56:
	ldr	x8, [x8, _RADEON_CRTC2_GEN_CNTL@GOTPAGEOFF]
	b	LBB0_13
LBB0_12:
Lloh57:
	adrp	x8, _RADEON_CRTC_GEN_CNTL@GOTPAGE
Lloh58:
	ldr	x8, [x8, _RADEON_CRTC_GEN_CNTL@GOTPAGEOFF]
LBB0_13:
Lloh59:
	adrp	x9, _RADEON_MM_INDEX@GOTPAGE
Lloh60:
	ldr	x9, [x9, _RADEON_MM_INDEX@GOTPAGEOFF]
Lloh61:
	ldr	x0, [x9]
	ldr	w1, [x8]
	bl	_WREG32
Lloh62:
	adrp	x8, _RADEON_MM_DATA@GOTPAGE
Lloh63:
	ldr	x8, [x8, _RADEON_MM_DATA@GOTPAGEOFF]
Lloh64:
	adrp	x9, _RADEON_CRTC_CUR_EN@GOTPAGE
Lloh65:
	ldr	x9, [x9, _RADEON_CRTC_CUR_EN@GOTPAGEOFF]
Lloh66:
	ldr	x0, [x8]
Lloh67:
	ldr	w8, [x9]
Lloh68:
	adrp	x9, _RADEON_CRTC_CUR_MODE_24BPP@GOTPAGE
Lloh69:
	ldr	x9, [x9, _RADEON_CRTC_CUR_MODE_24BPP@GOTPAGEOFF]
Lloh70:
	adrp	x10, _RADEON_CRTC_CUR_MODE_SHIFT@GOTPAGE
Lloh71:
	ldr	x10, [x10, _RADEON_CRTC_CUR_MODE_SHIFT@GOTPAGEOFF]
Lloh72:
	ldr	w9, [x9]
Lloh73:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w1, w9, w8
Lloh74:
	adrp	x9, _RADEON_CRTC_CUR_MODE_MASK@GOTPAGE
Lloh75:
	ldr	x9, [x9, _RADEON_CRTC_CUR_MODE_MASK@GOTPAGEOFF]
Lloh76:
	ldr	w9, [x9]
	orr	w8, w9, w8
	mvn	w2, w8
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_WREG32_P
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh50
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh44
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh72
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh66
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.cfi_endproc
                                        ; -- End function
	.comm	_EVERGREEN_CUR_SURFACE_ADDRESS_HIGH,8,3 ; @EVERGREEN_CUR_SURFACE_ADDRESS_HIGH
	.comm	_EVERGREEN_CUR_SURFACE_ADDRESS,8,3 ; @EVERGREEN_CUR_SURFACE_ADDRESS
	.comm	_RADEON_MM_INDEX,8,3            ; @RADEON_MM_INDEX
	.comm	_EVERGREEN_CUR_CONTROL,4,2      ; @EVERGREEN_CUR_CONTROL
	.comm	_RADEON_MM_DATA,8,3             ; @RADEON_MM_DATA
	.comm	_EVERGREEN_CURSOR_EN,4,2        ; @EVERGREEN_CURSOR_EN
	.comm	_EVERGREEN_CURSOR_24_8_PRE_MULT,4,2 ; @EVERGREEN_CURSOR_24_8_PRE_MULT
	.comm	_EVERGREEN_CURSOR_URGENT_1_2,4,2 ; @EVERGREEN_CURSOR_URGENT_1_2
	.comm	_CHIP_RV770,8,3                 ; @CHIP_RV770
	.comm	_R700_D2CUR_SURFACE_ADDRESS_HIGH,8,3 ; @R700_D2CUR_SURFACE_ADDRESS_HIGH
	.comm	_R700_D1CUR_SURFACE_ADDRESS_HIGH,8,3 ; @R700_D1CUR_SURFACE_ADDRESS_HIGH
	.comm	_AVIVO_D1CUR_SURFACE_ADDRESS,8,3 ; @AVIVO_D1CUR_SURFACE_ADDRESS
	.comm	_AVIVO_D1CUR_CONTROL,4,2        ; @AVIVO_D1CUR_CONTROL
	.comm	_AVIVO_D1CURSOR_EN,4,2          ; @AVIVO_D1CURSOR_EN
	.comm	_AVIVO_D1CURSOR_MODE_24BPP,4,2  ; @AVIVO_D1CURSOR_MODE_24BPP
	.comm	_AVIVO_D1CURSOR_MODE_SHIFT,4,2  ; @AVIVO_D1CURSOR_MODE_SHIFT
	.comm	_RADEON_CUR_OFFSET,8,3          ; @RADEON_CUR_OFFSET
	.comm	_RADEON_CRTC_GEN_CNTL,4,2       ; @RADEON_CRTC_GEN_CNTL
	.comm	_RADEON_CRTC2_GEN_CNTL,4,2      ; @RADEON_CRTC2_GEN_CNTL
	.comm	_RADEON_CRTC_CUR_EN,4,2         ; @RADEON_CRTC_CUR_EN
	.comm	_RADEON_CRTC_CUR_MODE_24BPP,4,2 ; @RADEON_CRTC_CUR_MODE_24BPP
	.comm	_RADEON_CRTC_CUR_MODE_SHIFT,4,2 ; @RADEON_CRTC_CUR_MODE_SHIFT
	.comm	_RADEON_CRTC_CUR_MODE_MASK,4,2  ; @RADEON_CRTC_CUR_MODE_MASK
	.no_dead_strip	_radeon_show_cursor
.subsections_via_symbols
