	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_meson_venc_init                ## -- Begin function meson_venc_init
	.p2align	4, 0x90
_meson_venc_init:                       ## @meson_venc_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_VPU_COMPATIBLE_G12A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_meson_vpu_is_compatible
	testq	%rax, %rax
	movl	16(%r14), %edi
	movq	_HHI_VDAC_CNTL0_G12A@GOTPCREL(%rip), %rax
	cmoveq	_HHI_VDAC_CNTL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_HHI_VDAC_CNTL1_G12A@GOTPCREL(%rip), %rbx
	cmoveq	_HHI_VDAC_CNTL1@GOTPCREL(%rip), %rbx
	xorl	%edx, %edx
	callq	_regmap_write
	movl	16(%r14), %edi
	movl	(%rbx), %esi
	movl	$8, %edx
	callq	_regmap_write
	movq	8(%r14), %rbx
	movq	_VENC_VDAC_SETTING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	$255, %edi
	movq	%rbx, %rsi
	callq	_writel_relaxed
	movl	16(%r14), %edi
	movq	_HHI_HDMI_PHY_CNTL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_regmap_write
	movq	_VPU_HDMI_ENCI_DATA_TO_HDMI@GOTPCREL(%rip), %rax
	movq	_VPU_HDMI_ENCP_DATA_TO_HDMI@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	orl	(%rax), %r15d
	movq	8(%r14), %rbx
	movq	_VPU_HDMI_SETTING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	%r15d, %edi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	_writel_bits_relaxed
	movq	8(%r14), %rbx
	movq	_ENCI_VIDEO_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	_writel_relaxed
	movq	8(%r14), %rbx
	movq	_ENCP_VIDEO_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	_writel_relaxed
	movq	8(%r14), %rbx
	movq	_ENCL_VIDEO_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	_writel_relaxed
	movq	%r14, %rdi
	callq	_meson_venc_disable_vsync
	movq	_MESON_VENC_MODE_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r14)
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VPU_COMPATIBLE_G12A,4,2        ## @VPU_COMPATIBLE_G12A
	.comm	_HHI_VDAC_CNTL0_G12A,4,2        ## @HHI_VDAC_CNTL0_G12A
	.comm	_HHI_VDAC_CNTL1_G12A,4,2        ## @HHI_VDAC_CNTL1_G12A
	.comm	_HHI_VDAC_CNTL0,4,2             ## @HHI_VDAC_CNTL0
	.comm	_HHI_VDAC_CNTL1,4,2             ## @HHI_VDAC_CNTL1
	.comm	_VENC_VDAC_SETTING,4,2          ## @VENC_VDAC_SETTING
	.comm	_HHI_HDMI_PHY_CNTL0,4,2         ## @HHI_HDMI_PHY_CNTL0
	.comm	_VPU_HDMI_ENCI_DATA_TO_HDMI,4,2 ## @VPU_HDMI_ENCI_DATA_TO_HDMI
	.comm	_VPU_HDMI_ENCP_DATA_TO_HDMI,4,2 ## @VPU_HDMI_ENCP_DATA_TO_HDMI
	.comm	_VPU_HDMI_SETTING,4,2           ## @VPU_HDMI_SETTING
	.comm	_ENCI_VIDEO_EN,4,2              ## @ENCI_VIDEO_EN
	.comm	_ENCP_VIDEO_EN,4,2              ## @ENCP_VIDEO_EN
	.comm	_ENCL_VIDEO_EN,4,2              ## @ENCL_VIDEO_EN
	.comm	_MESON_VENC_MODE_NONE,4,2       ## @MESON_VENC_MODE_NONE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_meson_venc_init                ; -- Begin function meson_venc_init
	.p2align	2
_meson_venc_init:                       ; @meson_venc_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _VPU_COMPATIBLE_G12A@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VPU_COMPATIBLE_G12A@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_meson_vpu_is_compatible
Lloh3:
	adrp	x9, _HHI_VDAC_CNTL0@GOTPAGE
Lloh4:
	ldr	x9, [x9, _HHI_VDAC_CNTL0@GOTPAGEOFF]
	ldr	w8, [x19, #16]
Lloh5:
	adrp	x10, _HHI_VDAC_CNTL0_G12A@GOTPAGE
Lloh6:
	ldr	x10, [x10, _HHI_VDAC_CNTL0_G12A@GOTPAGEOFF]
	cmp	x0, #0
	csel	x9, x9, x10, eq
	ldr	w1, [x9]
Lloh7:
	adrp	x9, _HHI_VDAC_CNTL1@GOTPAGE
Lloh8:
	ldr	x9, [x9, _HHI_VDAC_CNTL1@GOTPAGEOFF]
Lloh9:
	adrp	x10, _HHI_VDAC_CNTL1_G12A@GOTPAGE
Lloh10:
	ldr	x10, [x10, _HHI_VDAC_CNTL1_G12A@GOTPAGEOFF]
	csel	x20, x9, x10, eq
	mov	x0, x8
	mov	w2, #0
	bl	_regmap_write
	ldr	w0, [x19, #16]
	ldr	w1, [x20]
	mov	w2, #8
	bl	_regmap_write
	ldr	x20, [x19, #8]
Lloh11:
	adrp	x8, _VENC_VDAC_SETTING@GOTPAGE
Lloh12:
	ldr	x8, [x8, _VENC_VDAC_SETTING@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x20
	mov	w0, #255
	bl	_writel_relaxed
	ldr	w0, [x19, #16]
Lloh14:
	adrp	x8, _HHI_HDMI_PHY_CNTL0@GOTPAGE
Lloh15:
	ldr	x8, [x8, _HHI_HDMI_PHY_CNTL0@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_regmap_write
Lloh17:
	adrp	x8, _VPU_HDMI_ENCI_DATA_TO_HDMI@GOTPAGE
Lloh18:
	ldr	x8, [x8, _VPU_HDMI_ENCI_DATA_TO_HDMI@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
Lloh20:
	adrp	x9, _VPU_HDMI_ENCP_DATA_TO_HDMI@GOTPAGE
Lloh21:
	ldr	x9, [x9, _VPU_HDMI_ENCP_DATA_TO_HDMI@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w20, w9, w8
	ldr	x21, [x19, #8]
Lloh23:
	adrp	x8, _VPU_HDMI_SETTING@GOTPAGE
Lloh24:
	ldr	x8, [x8, _VPU_HDMI_SETTING@GOTPAGEOFF]
Lloh25:
	ldr	w0, [x8]
	bl	__REG
	add	x2, x0, x21
	mov	x0, x20
	mov	w1, #0
	bl	_writel_bits_relaxed
	ldr	x20, [x19, #8]
Lloh26:
	adrp	x8, _ENCI_VIDEO_EN@GOTPAGE
Lloh27:
	ldr	x8, [x8, _ENCI_VIDEO_EN@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x20
	mov	w0, #0
	bl	_writel_relaxed
	ldr	x20, [x19, #8]
Lloh29:
	adrp	x8, _ENCP_VIDEO_EN@GOTPAGE
Lloh30:
	ldr	x8, [x8, _ENCP_VIDEO_EN@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x20
	mov	w0, #0
	bl	_writel_relaxed
	ldr	x20, [x19, #8]
Lloh32:
	adrp	x8, _ENCL_VIDEO_EN@GOTPAGE
Lloh33:
	ldr	x8, [x8, _ENCL_VIDEO_EN@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x20
	mov	w0, #0
	bl	_writel_relaxed
	mov	x0, x19
	bl	_meson_venc_disable_vsync
Lloh35:
	adrp	x8, _MESON_VENC_MODE_NONE@GOTPAGE
Lloh36:
	ldr	x8, [x8, _MESON_VENC_MODE_NONE@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	str	w8, [x19]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_VPU_COMPATIBLE_G12A,4,2        ; @VPU_COMPATIBLE_G12A
	.comm	_HHI_VDAC_CNTL0_G12A,4,2        ; @HHI_VDAC_CNTL0_G12A
	.comm	_HHI_VDAC_CNTL1_G12A,4,2        ; @HHI_VDAC_CNTL1_G12A
	.comm	_HHI_VDAC_CNTL0,4,2             ; @HHI_VDAC_CNTL0
	.comm	_HHI_VDAC_CNTL1,4,2             ; @HHI_VDAC_CNTL1
	.comm	_VENC_VDAC_SETTING,4,2          ; @VENC_VDAC_SETTING
	.comm	_HHI_HDMI_PHY_CNTL0,4,2         ; @HHI_HDMI_PHY_CNTL0
	.comm	_VPU_HDMI_ENCI_DATA_TO_HDMI,4,2 ; @VPU_HDMI_ENCI_DATA_TO_HDMI
	.comm	_VPU_HDMI_ENCP_DATA_TO_HDMI,4,2 ; @VPU_HDMI_ENCP_DATA_TO_HDMI
	.comm	_VPU_HDMI_SETTING,4,2           ; @VPU_HDMI_SETTING
	.comm	_ENCI_VIDEO_EN,4,2              ; @ENCI_VIDEO_EN
	.comm	_ENCP_VIDEO_EN,4,2              ; @ENCP_VIDEO_EN
	.comm	_ENCL_VIDEO_EN,4,2              ; @ENCL_VIDEO_EN
	.comm	_MESON_VENC_MODE_NONE,4,2       ; @MESON_VENC_MODE_NONE
.subsections_via_symbols
