	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vc4_hdmi_encoder_enable
_vc4_hdmi_encoder_enable:               ## @vc4_hdmi_encoder_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %rax
	movq	(%rax), %r14
	callq	_to_vc4_hdmi_encoder
	movq	%rax, -104(%rbp)                ## 8-byte Spill
	movq	%rbx, -96(%rbp)                 ## 8-byte Spill
	movq	(%rbx), %rdi
	callq	_to_vc4_dev
	movq	(%rax), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movl	(%r14), %ecx
	movl	4(%r14), %edi
	movq	_DRM_MODE_FLAG_PHSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movq	_DRM_MODE_FLAG_PVSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	_DRM_MODE_FLAG_INTERLACE@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	andl	%ecx, %r13d
	movq	_DRM_MODE_FLAG_DBLCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%ecx, -84(%rbp)                 ## 4-byte Spill
	andl	%ecx, %eax
	cmpl	$1, %eax
	movl	$2, %r15d
	movl	$2, %eax
	sbbl	$0, %eax
	movl	%eax, -88(%rbp)                 ## 4-byte Spill
	subl	8(%r14), %edi
	movq	_VC4_HDMI_VERTA_VSP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_SET_FIELD
	movl	%eax, -68(%rbp)                 ## 4-byte Spill
	movl	8(%r14), %edi
	subl	12(%r14), %edi
	movq	_VC4_HDMI_VERTA_VFP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_SET_FIELD
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	12(%r14), %edi
	movq	_VC4_HDMI_VERTA_VAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_SET_FIELD
	movl	%eax, -80(%rbp)                 ## 4-byte Spill
	movq	_VC4_HDMI_VERTB_VSPO@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	xorl	%edi, %edi
	callq	_VC4_SET_FIELD
	movl	%eax, -76(%rbp)                 ## 4-byte Spill
	movl	16(%r14), %edi
	subl	4(%r14), %edi
	movq	_VC4_HDMI_VERTB_VBP@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	callq	_VC4_SET_FIELD
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	(%rbx), %esi
	xorl	%edi, %edi
	callq	_VC4_SET_FIELD
	movl	%eax, -72(%rbp)                 ## 4-byte Spill
	movl	16(%r14), %edi
	addl	4(%r14), %r13d
	subl	%r13d, %edi
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	movl	(%r12), %esi
	callq	_VC4_SET_FIELD
	movl	%eax, %r12d
	movq	8(%rbx), %rdi
	callq	_pm_runtime_get_sync
	testl	%eax, %eax
	js	LBB0_3
## %bb.1:
	movq	_DRM_MODE_FLAG_DBLCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	(%r14), %eax
	cmpl	$1, %eax
	sbbl	$0, %r15d
	movl	16(%rbx), %edi
	imull	20(%r14), %r15d
	imull	$1000, %r15d, %esi              ## imm = 0x3E8
	callq	_clk_set_rate
	testl	%eax, %eax
	je	LBB0_4
## %bb.2:
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_6
LBB0_3:
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_6
LBB0_4:
	movl	16(%rbx), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_7
## %bb.5:
	leaq	L_.str.2(%rip), %rdi
LBB0_6:
	movl	%eax, %esi
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DRM_ERROR                      ## TAILCALL
LBB0_7:
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	orl	-68(%rbp), %ebx                 ## 4-byte Folded Reload
	movq	_VC4_HDMI_SW_RESET_CONTROL@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	movq	_VC4_HDMI_SW_RESET_HDMI@GOTPCREL(%rip), %rax
	movq	_VC4_HDMI_SW_RESET_FORMAT_DETECT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	callq	_HDMI_WRITE
	movl	(%r15), %edi
	xorl	%esi, %esi
	callq	_HDMI_WRITE
	movq	_VC4_HDMI_TX_PHY_RESET_CTL@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	movl	$983040, %esi                   ## imm = 0xF0000
	callq	_HDMI_WRITE
	movl	(%r15), %edi
	xorl	%esi, %esi
	callq	_HDMI_WRITE
	movq	_VC4_HD_VID_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_HD_WRITE
	movq	_VC4_HDMI_SCHEDULER_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	%r15d, %edi
	callq	_HDMI_READ
	movq	_VC4_HDMI_SCHEDULER_CONTROL_MANUAL_FORMAT@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_VC4_HDMI_SCHEDULER_CONTROL_IGNORE_VSYNC_PREDICTS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_HDMI_WRITE
	movq	_VC4_HDMI_HORZA@GOTPCREL(%rip), %rcx
	movl	-52(%rbp), %eax                 ## 4-byte Reload
	movl	-84(%rbp), %edx                 ## 4-byte Reload
	andl	%edx, %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	je	LBB0_9
## %bb.8:
	movq	_VC4_HDMI_HORZA_VPOS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_9:
	orl	-80(%rbp), %ebx                 ## 4-byte Folded Reload
	movl	%ebx, -48(%rbp)                 ## 4-byte Spill
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	orl	-76(%rbp), %esi                 ## 4-byte Folded Reload
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	orl	-72(%rbp), %r12d                ## 4-byte Folded Reload
	movl	%r12d, -64(%rbp)                ## 4-byte Spill
	movl	(%rcx), %r12d
	movl	-56(%rbp), %r15d                ## 4-byte Reload
	andl	%edx, %r15d
	movl	%r15d, -56(%rbp)                ## 4-byte Spill
	je	LBB0_11
## %bb.10:
	movq	_VC4_HDMI_HORZA_HPOS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
LBB0_11:
	orl	%eax, %r15d
	movl	24(%r14), %edi
	movl	-88(%rbp), %r13d                ## 4-byte Reload
	imull	%r13d, %edi
	movq	_VC4_HDMI_HORZA_HAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_SET_FIELD
	orl	%eax, %r15d
	movl	%r12d, %edi
	movl	%r15d, %esi
	callq	_HDMI_WRITE
	movq	_VC4_HDMI_HORZB@GOTPCREL(%rip), %rax
	movl	28(%r14), %edi
	subl	32(%r14), %edi
	movl	(%rax), %ebx
	imull	%r13d, %edi
	movq	_VC4_HDMI_HORZB_HBP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_SET_FIELD
	movl	32(%r14), %edi
	subl	36(%r14), %edi
	movl	%eax, %r15d
	imull	%r13d, %edi
	movq	_VC4_HDMI_HORZB_HSP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_SET_FIELD
	movl	36(%r14), %edi
	subl	24(%r14), %edi
	orl	%eax, %r15d
	imull	%r13d, %edi
	movq	_VC4_HDMI_HORZB_HFP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_SET_FIELD
	orl	%eax, %r15d
	movl	%ebx, %edi
	movl	%r15d, %esi
	callq	_HDMI_WRITE
	movq	_VC4_HDMI_VERTA0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %esi
	callq	_HDMI_WRITE
	movq	_VC4_HDMI_VERTA1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_HDMI_WRITE
	movq	_VC4_HDMI_VERTB0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-64(%rbp), %esi                 ## 4-byte Reload
	callq	_HDMI_WRITE
	movq	_VC4_HDMI_VERTB1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_HDMI_WRITE
	movl	$0, %eax
	cmpl	$0, -52(%rbp)                   ## 4-byte Folded Reload
	jne	LBB0_13
## %bb.12:
	movq	_VC4_HD_VID_CTL_VSYNC_LOW@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_13:
	movq	_VC4_HD_VID_CTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	$0, %esi
	cmpl	$0, -56(%rbp)                   ## 4-byte Folded Reload
	movq	-104(%rbp), %r15                ## 8-byte Reload
	movq	_VC4_HDMI_SCHEDULER_CONTROL@GOTPCREL(%rip), %r12
	jne	LBB0_15
## %bb.14:
	movq	_VC4_HD_VID_CTL_HSYNC_LOW@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
LBB0_15:
	orl	%eax, %esi
	callq	_HD_WRITE
	movq	_VC4_HD_CSC_CTL_ORDER_BGR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_VC4_HD_CSC_CTL_ORDER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_SET_FIELD
	movl	%eax, %ebx
	cmpq	$0, 8(%r15)
	je	LBB0_19
## %bb.16:
	movq	%r14, %rdi
	callq	_drm_default_rgb_quant_range
	movq	_HDMI_QUANTIZATION_RANGE_LIMITED@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_19
## %bb.17:
	movq	_VC4_HD_CSC_CTL_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_VC4_HD_CSC_CTL_RGB2YCC@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_VC4_HD_CSC_CTL_MODE_CUSTOM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_VC4_HD_CSC_CTL_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_SET_FIELD
	orl	%eax, %ebx
	movq	_VC4_HD_CSC_12_11@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_HD_WRITE
	movq	_VC4_HD_CSC_14_13@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$16778976, %esi                 ## imm = 0x10006E0
	callq	_HD_WRITE
	movq	_VC4_HD_CSC_22_21@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$115343360, %esi                ## imm = 0x6E00000
	callq	_HD_WRITE
	movq	_VC4_HD_CSC_24_23@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$16777216, %esi                 ## imm = 0x1000000
	callq	_HD_WRITE
	movq	_VC4_HD_CSC_32_31@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1760, %esi                     ## imm = 0x6E0
	callq	_HD_WRITE
	movq	_VC4_HD_CSC_34_33@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$16777216, %esi                 ## imm = 0x1000000
	callq	_HD_WRITE
	movl	$1, %eax
	jmp	LBB0_20
LBB0_19:
	xorl	%eax, %eax
LBB0_20:
	movl	%eax, (%r15)
	movq	_VC4_HD_CSC_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_HD_WRITE
	movq	_VC4_HDMI_FIFO_CTL@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_HDMI_WRITE
	movq	_VC4_HD_VID_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_HD_READ
	movq	_VC4_HD_VID_CTL_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_VC4_HD_VID_CTL_UNDERFLOW_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_VC4_HD_VID_CTL_FRAME_COUNTER_RESET@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_HD_WRITE
	cmpq	$0, 8(%r15)
	je	LBB0_22
## %bb.21:
	movl	(%r12), %ebx
	movl	%ebx, %edi
	callq	_HDMI_READ
	movq	_VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_HDMI_WRITE
	movl	(%r12), %edi
	callq	_HDMI_READ
	movl	%eax, %edi
	movq	_VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE@GOTPCREL(%rip), %rax
	andl	(%rax), %edi
	leaq	L_.str.5(%rip), %rbx
	jmp	LBB0_23
LBB0_22:
	movq	_VC4_HDMI_RAM_PACKET_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_HDMI_READ
	movq	_VC4_HDMI_RAM_PACKET_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	%ebx, %edi
	callq	_HDMI_WRITE
	movl	(%r12), %ebx
	movl	%ebx, %edi
	callq	_HDMI_READ
	movq	_VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	%ebx, %edi
	callq	_HDMI_WRITE
	movl	(%r12), %edi
	callq	_HDMI_READ
	movq	_VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE@GOTPCREL(%rip), %rcx
	xorl	%edi, %edi
	testl	%eax, (%rcx)
	sete	%dil
	leaq	L_.str.6(%rip), %rbx
LBB0_23:
	movl	$1000, %esi                     ## imm = 0x3E8
	callq	_wait_for
	movl	%eax, %edi
	movq	%rbx, %rsi
	callq	_WARN_ONCE
	cmpq	$0, 8(%r15)
	je	LBB0_25
## %bb.24:
	movl	(%r12), %edi
	callq	_HDMI_READ
	movq	_VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE@GOTPCREL(%rip), %rcx
	xorl	%edi, %edi
	andl	(%rcx), %eax
	sete	%dil
	callq	_WARN_ON
	movl	(%r12), %ebx
	movl	%ebx, %edi
	callq	_HDMI_READ
	movq	_VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_HDMI_WRITE
	movq	_VC4_HDMI_RAM_PACKET_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_VC4_HDMI_RAM_PACKET_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_HDMI_WRITE
	movq	-96(%rbp), %rdi                 ## 8-byte Reload
	callq	_vc4_hdmi_set_infoframes
	movl	(%r14), %edi
	callq	_HDMI_READ
	movl	%eax, %ebx
	movq	_VC4_HDMI_FIFO_VALID_WRITE_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movl	(%r14), %edi
	movq	_VC4_HDMI_FIFO_CTL_RECENTER@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	notl	%esi
	andl	%ebx, %esi
	callq	_HDMI_WRITE
	movl	(%r14), %edi
	movl	(%r15), %esi
	orl	%ebx, %esi
	callq	_HDMI_WRITE
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$1100, %esi                     ## imm = 0x44C
	callq	_usleep_range
	movl	(%r14), %edi
	movl	(%r15), %esi
	notl	%esi
	andl	%ebx, %esi
	callq	_HDMI_WRITE
	movl	(%r14), %edi
	orl	(%r15), %ebx
	movl	%ebx, %esi
	callq	_HDMI_WRITE
	movl	(%r14), %edi
	callq	_HDMI_READ
	movq	_VC4_HDMI_FIFO_CTL_RECENTER_DONE@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movl	%eax, %edi
	movl	$1, %esi
	callq	_wait_for
	leaq	L_.str.7(%rip), %rsi
	movl	%eax, %edi
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WARN_ONCE                      ## TAILCALL
LBB0_25:
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ## @DRM_MODE_FLAG_PHSYNC
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ## @DRM_MODE_FLAG_PVSYNC
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ## @DRM_MODE_FLAG_INTERLACE
	.comm	_DRM_MODE_FLAG_DBLCLK,4,2       ## @DRM_MODE_FLAG_DBLCLK
	.comm	_VC4_HDMI_VERTA_VSP,4,2         ## @VC4_HDMI_VERTA_VSP
	.comm	_VC4_HDMI_VERTA_VFP,4,2         ## @VC4_HDMI_VERTA_VFP
	.comm	_VC4_HDMI_VERTA_VAL,4,2         ## @VC4_HDMI_VERTA_VAL
	.comm	_VC4_HDMI_VERTB_VSPO,4,2        ## @VC4_HDMI_VERTB_VSPO
	.comm	_VC4_HDMI_VERTB_VBP,4,2         ## @VC4_HDMI_VERTB_VBP
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to retain power domain: %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to set pixel clock rate: %d\n"

L_.str.2:                               ## @.str.2
	.asciz	"Failed to turn on pixel clock: %d\n"

	.comm	_VC4_HDMI_SW_RESET_CONTROL,4,2  ## @VC4_HDMI_SW_RESET_CONTROL
	.comm	_VC4_HDMI_SW_RESET_HDMI,4,2     ## @VC4_HDMI_SW_RESET_HDMI
	.comm	_VC4_HDMI_SW_RESET_FORMAT_DETECT,4,2 ## @VC4_HDMI_SW_RESET_FORMAT_DETECT
	.comm	_VC4_HDMI_TX_PHY_RESET_CTL,4,2  ## @VC4_HDMI_TX_PHY_RESET_CTL
	.comm	_VC4_HD_VID_CTL,4,2             ## @VC4_HD_VID_CTL
	.comm	_VC4_HDMI_SCHEDULER_CONTROL,4,2 ## @VC4_HDMI_SCHEDULER_CONTROL
	.comm	_VC4_HDMI_SCHEDULER_CONTROL_MANUAL_FORMAT,4,2 ## @VC4_HDMI_SCHEDULER_CONTROL_MANUAL_FORMAT
	.comm	_VC4_HDMI_SCHEDULER_CONTROL_IGNORE_VSYNC_PREDICTS,4,2 ## @VC4_HDMI_SCHEDULER_CONTROL_IGNORE_VSYNC_PREDICTS
	.comm	_VC4_HDMI_HORZA,4,2             ## @VC4_HDMI_HORZA
	.comm	_VC4_HDMI_HORZA_VPOS,4,2        ## @VC4_HDMI_HORZA_VPOS
	.comm	_VC4_HDMI_HORZA_HPOS,4,2        ## @VC4_HDMI_HORZA_HPOS
	.comm	_VC4_HDMI_HORZA_HAP,4,2         ## @VC4_HDMI_HORZA_HAP
	.comm	_VC4_HDMI_HORZB,4,2             ## @VC4_HDMI_HORZB
	.comm	_VC4_HDMI_HORZB_HBP,4,2         ## @VC4_HDMI_HORZB_HBP
	.comm	_VC4_HDMI_HORZB_HSP,4,2         ## @VC4_HDMI_HORZB_HSP
	.comm	_VC4_HDMI_HORZB_HFP,4,2         ## @VC4_HDMI_HORZB_HFP
	.comm	_VC4_HDMI_VERTA0,4,2            ## @VC4_HDMI_VERTA0
	.comm	_VC4_HDMI_VERTA1,4,2            ## @VC4_HDMI_VERTA1
	.comm	_VC4_HDMI_VERTB0,4,2            ## @VC4_HDMI_VERTB0
	.comm	_VC4_HDMI_VERTB1,4,2            ## @VC4_HDMI_VERTB1
	.comm	_VC4_HD_VID_CTL_VSYNC_LOW,4,2   ## @VC4_HD_VID_CTL_VSYNC_LOW
	.comm	_VC4_HD_VID_CTL_HSYNC_LOW,4,2   ## @VC4_HD_VID_CTL_HSYNC_LOW
	.comm	_VC4_HD_CSC_CTL_ORDER_BGR,4,2   ## @VC4_HD_CSC_CTL_ORDER_BGR
	.comm	_VC4_HD_CSC_CTL_ORDER,4,2       ## @VC4_HD_CSC_CTL_ORDER
	.comm	_HDMI_QUANTIZATION_RANGE_LIMITED,8,3 ## @HDMI_QUANTIZATION_RANGE_LIMITED
	.comm	_VC4_HD_CSC_CTL_ENABLE,4,2      ## @VC4_HD_CSC_CTL_ENABLE
	.comm	_VC4_HD_CSC_CTL_RGB2YCC,4,2     ## @VC4_HD_CSC_CTL_RGB2YCC
	.comm	_VC4_HD_CSC_CTL_MODE_CUSTOM,4,2 ## @VC4_HD_CSC_CTL_MODE_CUSTOM
	.comm	_VC4_HD_CSC_CTL_MODE,4,2        ## @VC4_HD_CSC_CTL_MODE
	.comm	_VC4_HD_CSC_12_11,4,2           ## @VC4_HD_CSC_12_11
	.comm	_VC4_HD_CSC_14_13,4,2           ## @VC4_HD_CSC_14_13
	.comm	_VC4_HD_CSC_22_21,4,2           ## @VC4_HD_CSC_22_21
	.comm	_VC4_HD_CSC_24_23,4,2           ## @VC4_HD_CSC_24_23
	.comm	_VC4_HD_CSC_32_31,4,2           ## @VC4_HD_CSC_32_31
	.comm	_VC4_HD_CSC_34_33,4,2           ## @VC4_HD_CSC_34_33
	.comm	_VC4_HD_CSC_CTL,4,2             ## @VC4_HD_CSC_CTL
	.comm	_VC4_HDMI_FIFO_CTL,4,2          ## @VC4_HDMI_FIFO_CTL
	.comm	_VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N,4,2 ## @VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N
	.comm	_VC4_HD_VID_CTL_ENABLE,4,2      ## @VC4_HD_VID_CTL_ENABLE
	.comm	_VC4_HD_VID_CTL_UNDERFLOW_ENABLE,4,2 ## @VC4_HD_VID_CTL_UNDERFLOW_ENABLE
	.comm	_VC4_HD_VID_CTL_FRAME_COUNTER_RESET,4,2 ## @VC4_HD_VID_CTL_FRAME_COUNTER_RESET
	.comm	_VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI,4,2 ## @VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI
	.comm	_VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE,4,2 ## @VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE
L_.str.5:                               ## @.str.5
	.asciz	"Timeout waiting for VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE\n"

	.comm	_VC4_HDMI_RAM_PACKET_CONFIG,4,2 ## @VC4_HDMI_RAM_PACKET_CONFIG
	.comm	_VC4_HDMI_RAM_PACKET_ENABLE,4,2 ## @VC4_HDMI_RAM_PACKET_ENABLE
L_.str.6:                               ## @.str.6
	.asciz	"Timeout waiting for !VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE\n"

	.comm	_VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT,4,2 ## @VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT
	.comm	_VC4_HDMI_FIFO_VALID_WRITE_MASK,4,2 ## @VC4_HDMI_FIFO_VALID_WRITE_MASK
	.comm	_VC4_HDMI_FIFO_CTL_RECENTER,4,2 ## @VC4_HDMI_FIFO_CTL_RECENTER
	.comm	_VC4_HDMI_FIFO_CTL_RECENTER_DONE,4,2 ## @VC4_HDMI_FIFO_CTL_RECENTER_DONE
L_.str.7:                               ## @.str.7
	.asciz	"Timeout waiting for VC4_HDMI_FIFO_CTL_RECENTER_DONE"

	.no_dead_strip	_vc4_hdmi_encoder_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vc4_hdmi_encoder_enable
_vc4_hdmi_encoder_enable:               ; @vc4_hdmi_encoder_enable
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	x8, [x0, #8]
	ldr	x21, [x8]
	bl	_to_vc4_hdmi_encoder
	str	x0, [sp, #40]                   ; 8-byte Folded Spill
	str	x19, [sp, #8]                   ; 8-byte Folded Spill
	ldr	x0, [x19]
	bl	_to_vc4_dev
	ldr	x19, [x0]
Lloh0:
	adrp	x8, _DRM_MODE_FLAG_PHSYNC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DRM_MODE_FLAG_PHSYNC@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [sp, #32]                   ; 4-byte Folded Spill
Lloh3:
	adrp	x8, _DRM_MODE_FLAG_PVSYNC@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DRM_MODE_FLAG_PVSYNC@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	str	w8, [sp, #28]                   ; 4-byte Folded Spill
Lloh6:
	adrp	x8, _DRM_MODE_FLAG_INTERLACE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DRM_MODE_FLAG_INTERLACE@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	ldp	w20, w9, [x21]
	and	w28, w8, w20
Lloh9:
	adrp	x23, _DRM_MODE_FLAG_DBLCLK@GOTPAGE
Lloh10:
	ldr	x23, [x23, _DRM_MODE_FLAG_DBLCLK@GOTPAGEOFF]
	ldr	w8, [x23]
	tst	w8, w20
	mov	w22, #1
	cinc	w8, w22, ne
	str	w8, [sp, #36]                   ; 4-byte Folded Spill
	ldr	w8, [x21, #8]
	sub	w0, w9, w8
Lloh11:
	adrp	x8, _VC4_HDMI_VERTA_VSP@GOTPAGE
Lloh12:
	ldr	x8, [x8, _VC4_HDMI_VERTA_VSP@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	bl	_VC4_SET_FIELD
	str	w0, [sp, #24]                   ; 4-byte Folded Spill
	ldp	w8, w9, [x21, #8]
	sub	w0, w8, w9
Lloh14:
	adrp	x8, _VC4_HDMI_VERTA_VFP@GOTPAGE
Lloh15:
	ldr	x8, [x8, _VC4_HDMI_VERTA_VFP@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	bl	_VC4_SET_FIELD
	str	w0, [sp, #20]                   ; 4-byte Folded Spill
	ldr	w0, [x21, #12]
Lloh17:
	adrp	x8, _VC4_HDMI_VERTA_VAL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _VC4_HDMI_VERTA_VAL@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	bl	_VC4_SET_FIELD
	str	w0, [sp, #16]                   ; 4-byte Folded Spill
Lloh20:
	adrp	x27, _VC4_HDMI_VERTB_VSPO@GOTPAGE
Lloh21:
	ldr	x27, [x27, _VC4_HDMI_VERTB_VSPO@GOTPAGEOFF]
	ldr	w1, [x27]
	mov	w0, #0
	bl	_VC4_SET_FIELD
	mov	x25, x0
	ldr	w8, [x21, #16]
	ldr	w9, [x21, #4]
	sub	w0, w8, w9
Lloh22:
	adrp	x24, _VC4_HDMI_VERTB_VBP@GOTPAGE
Lloh23:
	ldr	x24, [x24, _VC4_HDMI_VERTB_VBP@GOTPAGEOFF]
	ldr	w1, [x24]
	bl	_VC4_SET_FIELD
	mov	x26, x0
	ldr	w1, [x27]
	mov	w0, #0
	bl	_VC4_SET_FIELD
	mov	x27, x0
	ldr	w8, [x21, #16]
	ldr	w9, [x21, #4]
	add	w9, w28, w9
	sub	w0, w8, w9
	ldr	w1, [x24]
	bl	_VC4_SET_FIELD
	mov	x28, x0
	ldr	x0, [x19, #8]
	bl	_pm_runtime_get_sync
	tbnz	w0, #31, LBB0_3
; %bb.1:
	ldr	w0, [x19, #16]
	ldr	w8, [x21, #20]
	ldr	w9, [x21]
	ldr	w10, [x23]
	tst	w10, w9
	cinc	w9, w22, ne
	mul	w8, w8, w9
	mov	w9, #1000
	mul	w1, w8, w9
	bl	_clk_set_rate
	cbz	w0, LBB0_4
; %bb.2:
	mov	x1, x0
Lloh24:
	adrp	x0, l_.str.1@PAGE
Lloh25:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_6
LBB0_3:
	mov	x1, x0
Lloh26:
	adrp	x0, l_.str@PAGE
Lloh27:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_6
LBB0_4:
	ldr	w0, [x19, #16]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_7
; %bb.5:
	mov	x1, x0
Lloh28:
	adrp	x0, l_.str.2@PAGE
Lloh29:
	add	x0, x0, l_.str.2@PAGEOFF
LBB0_6:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	b	_DRM_ERROR
LBB0_7:
	ldr	w8, [sp, #32]                   ; 4-byte Folded Reload
	and	w22, w8, w20
	ldr	w8, [sp, #28]                   ; 4-byte Folded Reload
	and	w20, w8, w20
	ldp	w9, w8, [sp, #20]               ; 8-byte Folded Reload
	orr	w8, w9, w8
	ldr	w9, [sp, #16]                   ; 4-byte Folded Reload
	orr	w24, w8, w9
	orr	w8, w26, w25
	str	w8, [sp, #32]                   ; 4-byte Folded Spill
	orr	w23, w28, w27
Lloh30:
	adrp	x19, _VC4_HDMI_SW_RESET_CONTROL@GOTPAGE
Lloh31:
	ldr	x19, [x19, _VC4_HDMI_SW_RESET_CONTROL@GOTPAGEOFF]
Lloh32:
	adrp	x8, _VC4_HDMI_SW_RESET_HDMI@GOTPAGE
Lloh33:
	ldr	x8, [x8, _VC4_HDMI_SW_RESET_HDMI@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh34:
	ldr	w8, [x8]
Lloh35:
	adrp	x9, _VC4_HDMI_SW_RESET_FORMAT_DETECT@GOTPAGE
Lloh36:
	ldr	x9, [x9, _VC4_HDMI_SW_RESET_FORMAT_DETECT@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_HDMI_WRITE
	ldr	w0, [x19]
	mov	w1, #0
	bl	_HDMI_WRITE
Lloh38:
	adrp	x19, _VC4_HDMI_TX_PHY_RESET_CTL@GOTPAGE
Lloh39:
	ldr	x19, [x19, _VC4_HDMI_TX_PHY_RESET_CTL@GOTPAGEOFF]
	ldr	w0, [x19]
	mov	w1, #983040
	bl	_HDMI_WRITE
	ldr	w0, [x19]
	mov	w1, #0
	bl	_HDMI_WRITE
Lloh40:
	adrp	x8, _VC4_HD_VID_CTL@GOTPAGE
Lloh41:
	ldr	x8, [x8, _VC4_HD_VID_CTL@GOTPAGEOFF]
Lloh42:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_HD_WRITE
Lloh43:
	adrp	x8, _VC4_HDMI_SCHEDULER_CONTROL@GOTPAGE
Lloh44:
	ldr	x8, [x8, _VC4_HDMI_SCHEDULER_CONTROL@GOTPAGEOFF]
Lloh45:
	ldr	w25, [x8]
	mov	x0, x25
	bl	_HDMI_READ
Lloh46:
	adrp	x8, _VC4_HDMI_SCHEDULER_CONTROL_MANUAL_FORMAT@GOTPAGE
Lloh47:
	ldr	x8, [x8, _VC4_HDMI_SCHEDULER_CONTROL_MANUAL_FORMAT@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
	orr	w8, w8, w0
Lloh49:
	adrp	x9, _VC4_HDMI_SCHEDULER_CONTROL_IGNORE_VSYNC_PREDICTS@GOTPAGE
Lloh50:
	ldr	x9, [x9, _VC4_HDMI_SCHEDULER_CONTROL_IGNORE_VSYNC_PREDICTS@GOTPAGEOFF]
Lloh51:
	ldr	w9, [x9]
	orr	w1, w8, w9
	mov	x0, x25
	bl	_HDMI_WRITE
Lloh52:
	adrp	x8, _VC4_HDMI_HORZA@GOTPAGE
Lloh53:
	ldr	x8, [x8, _VC4_HDMI_HORZA@GOTPAGEOFF]
Lloh54:
	ldr	w25, [x8]
Lloh55:
	adrp	x8, _VC4_HDMI_HORZA_VPOS@GOTPAGE
Lloh56:
	ldr	x8, [x8, _VC4_HDMI_HORZA_VPOS@GOTPAGEOFF]
Lloh57:
	ldr	w8, [x8]
	cmp	w20, #0
	mov	x28, x20
	csel	w8, wzr, w8, eq
Lloh58:
	adrp	x9, _VC4_HDMI_HORZA_HPOS@GOTPAGE
Lloh59:
	ldr	x9, [x9, _VC4_HDMI_HORZA_HPOS@GOTPAGEOFF]
Lloh60:
	ldr	w9, [x9]
	cmp	w22, #0
	csel	w9, wzr, w9, eq
	orr	w19, w9, w8
	ldr	w8, [x21, #24]
	ldr	w20, [sp, #36]                  ; 4-byte Folded Reload
	mul	w0, w8, w20
Lloh61:
	adrp	x8, _VC4_HDMI_HORZA_HAP@GOTPAGE
Lloh62:
	ldr	x8, [x8, _VC4_HDMI_HORZA_HAP@GOTPAGEOFF]
Lloh63:
	ldr	w1, [x8]
	bl	_VC4_SET_FIELD
	orr	w1, w19, w0
	mov	x0, x25
	bl	_HDMI_WRITE
Lloh64:
	adrp	x8, _VC4_HDMI_HORZB@GOTPAGE
Lloh65:
	ldr	x8, [x8, _VC4_HDMI_HORZB@GOTPAGEOFF]
Lloh66:
	ldr	w25, [x8]
	ldp	w8, w9, [x21, #28]
	sub	w8, w8, w9
	mul	w0, w8, w20
Lloh67:
	adrp	x8, _VC4_HDMI_HORZB_HBP@GOTPAGE
Lloh68:
	ldr	x8, [x8, _VC4_HDMI_HORZB_HBP@GOTPAGEOFF]
Lloh69:
	ldr	w1, [x8]
	bl	_VC4_SET_FIELD
	mov	x26, x0
	ldp	w8, w9, [x21, #32]
	sub	w8, w8, w9
	mul	w0, w8, w20
Lloh70:
	adrp	x8, _VC4_HDMI_HORZB_HSP@GOTPAGE
Lloh71:
	ldr	x8, [x8, _VC4_HDMI_HORZB_HSP@GOTPAGEOFF]
Lloh72:
	ldr	w1, [x8]
	bl	_VC4_SET_FIELD
	orr	w19, w0, w26
	ldr	w8, [x21, #36]
	ldr	w9, [x21, #24]
	sub	w8, w8, w9
	mul	w0, w8, w20
Lloh73:
	adrp	x8, _VC4_HDMI_HORZB_HFP@GOTPAGE
Lloh74:
	ldr	x8, [x8, _VC4_HDMI_HORZB_HFP@GOTPAGEOFF]
Lloh75:
	ldr	w1, [x8]
	bl	_VC4_SET_FIELD
	orr	w1, w19, w0
	mov	x0, x25
	bl	_HDMI_WRITE
Lloh76:
	adrp	x8, _VC4_HDMI_VERTA0@GOTPAGE
Lloh77:
	ldr	x8, [x8, _VC4_HDMI_VERTA0@GOTPAGEOFF]
Lloh78:
	ldr	w0, [x8]
	mov	x1, x24
	bl	_HDMI_WRITE
Lloh79:
	adrp	x8, _VC4_HDMI_VERTA1@GOTPAGE
Lloh80:
	ldr	x8, [x8, _VC4_HDMI_VERTA1@GOTPAGEOFF]
Lloh81:
	ldr	w0, [x8]
	mov	x1, x24
Lloh82:
	adrp	x24, _VC4_HD_VID_CTL@GOTPAGE
Lloh83:
	ldr	x24, [x24, _VC4_HD_VID_CTL@GOTPAGEOFF]
	bl	_HDMI_WRITE
Lloh84:
	adrp	x8, _VC4_HDMI_VERTB0@GOTPAGE
Lloh85:
	ldr	x8, [x8, _VC4_HDMI_VERTB0@GOTPAGEOFF]
Lloh86:
	ldr	w0, [x8]
	mov	x1, x23
	bl	_HDMI_WRITE
Lloh87:
	adrp	x8, _VC4_HDMI_VERTB1@GOTPAGE
Lloh88:
	ldr	x8, [x8, _VC4_HDMI_VERTB1@GOTPAGEOFF]
Lloh89:
	ldr	w0, [x8]
	ldr	w1, [sp, #32]                   ; 4-byte Folded Reload
	bl	_HDMI_WRITE
Lloh90:
	adrp	x8, _VC4_HD_VID_CTL_VSYNC_LOW@GOTPAGE
Lloh91:
	ldr	x8, [x8, _VC4_HD_VID_CTL_VSYNC_LOW@GOTPAGEOFF]
Lloh92:
	ldr	w8, [x8]
	cmp	w28, #0
	csel	w8, w8, wzr, eq
	ldr	w0, [x24]
Lloh93:
	adrp	x9, _VC4_HD_VID_CTL_HSYNC_LOW@GOTPAGE
Lloh94:
	ldr	x9, [x9, _VC4_HD_VID_CTL_HSYNC_LOW@GOTPAGEOFF]
Lloh95:
	ldr	w9, [x9]
	cmp	w22, #0
	csel	w9, w9, wzr, eq
	orr	w1, w9, w8
	bl	_HD_WRITE
Lloh96:
	adrp	x8, _VC4_HD_CSC_CTL_ORDER_BGR@GOTPAGE
Lloh97:
	ldr	x8, [x8, _VC4_HD_CSC_CTL_ORDER_BGR@GOTPAGEOFF]
Lloh98:
	ldr	w0, [x8]
Lloh99:
	adrp	x8, _VC4_HD_CSC_CTL_ORDER@GOTPAGE
Lloh100:
	ldr	x8, [x8, _VC4_HD_CSC_CTL_ORDER@GOTPAGEOFF]
Lloh101:
	ldr	w1, [x8]
	bl	_VC4_SET_FIELD
	mov	x22, x0
	ldr	x20, [sp, #40]                  ; 8-byte Folded Reload
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_11
; %bb.8:
	mov	x0, x21
	bl	_drm_default_rgb_quant_range
Lloh102:
	adrp	x8, _HDMI_QUANTIZATION_RANGE_LIMITED@GOTPAGE
Lloh103:
	ldr	x8, [x8, _HDMI_QUANTIZATION_RANGE_LIMITED@GOTPAGEOFF]
Lloh104:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_10
; %bb.9:
Lloh105:
	adrp	x8, _VC4_HD_CSC_CTL_ENABLE@GOTPAGE
Lloh106:
	ldr	x8, [x8, _VC4_HD_CSC_CTL_ENABLE@GOTPAGEOFF]
Lloh107:
	ldr	w8, [x8]
	orr	w8, w8, w22
Lloh108:
	adrp	x9, _VC4_HD_CSC_CTL_RGB2YCC@GOTPAGE
Lloh109:
	ldr	x9, [x9, _VC4_HD_CSC_CTL_RGB2YCC@GOTPAGEOFF]
Lloh110:
	ldr	w9, [x9]
	orr	w19, w8, w9
Lloh111:
	adrp	x8, _VC4_HD_CSC_CTL_MODE_CUSTOM@GOTPAGE
Lloh112:
	ldr	x8, [x8, _VC4_HD_CSC_CTL_MODE_CUSTOM@GOTPAGEOFF]
Lloh113:
	ldr	w0, [x8]
Lloh114:
	adrp	x8, _VC4_HD_CSC_CTL_MODE@GOTPAGE
Lloh115:
	ldr	x8, [x8, _VC4_HD_CSC_CTL_MODE@GOTPAGEOFF]
Lloh116:
	ldr	w1, [x8]
	bl	_VC4_SET_FIELD
	orr	w22, w19, w0
Lloh117:
	adrp	x8, _VC4_HD_CSC_12_11@GOTPAGE
Lloh118:
	ldr	x8, [x8, _VC4_HD_CSC_12_11@GOTPAGEOFF]
Lloh119:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_HD_WRITE
Lloh120:
	adrp	x8, _VC4_HD_CSC_14_13@GOTPAGE
Lloh121:
	ldr	x8, [x8, _VC4_HD_CSC_14_13@GOTPAGEOFF]
Lloh122:
	ldr	w0, [x8]
	mov	w1, #1760
	movk	w1, #256, lsl #16
	bl	_HD_WRITE
Lloh123:
	adrp	x8, _VC4_HD_CSC_22_21@GOTPAGE
Lloh124:
	ldr	x8, [x8, _VC4_HD_CSC_22_21@GOTPAGEOFF]
Lloh125:
	ldr	w0, [x8]
	mov	w1, #115343360
	bl	_HD_WRITE
Lloh126:
	adrp	x8, _VC4_HD_CSC_24_23@GOTPAGE
Lloh127:
	ldr	x8, [x8, _VC4_HD_CSC_24_23@GOTPAGEOFF]
Lloh128:
	ldr	w0, [x8]
	mov	w1, #16777216
	bl	_HD_WRITE
Lloh129:
	adrp	x8, _VC4_HD_CSC_32_31@GOTPAGE
Lloh130:
	ldr	x8, [x8, _VC4_HD_CSC_32_31@GOTPAGEOFF]
Lloh131:
	ldr	w0, [x8]
	mov	w1, #1760
	bl	_HD_WRITE
Lloh132:
	adrp	x8, _VC4_HD_CSC_34_33@GOTPAGE
Lloh133:
	ldr	x8, [x8, _VC4_HD_CSC_34_33@GOTPAGEOFF]
Lloh134:
	ldr	w0, [x8]
	mov	w1, #16777216
	bl	_HD_WRITE
	mov	w8, #1
	b	LBB0_11
LBB0_10:
	mov	w8, #0
LBB0_11:
Lloh135:
	adrp	x23, _VC4_HDMI_SCHEDULER_CONTROL@GOTPAGE
Lloh136:
	ldr	x23, [x23, _VC4_HDMI_SCHEDULER_CONTROL@GOTPAGEOFF]
	str	w8, [x20]
Lloh137:
	adrp	x8, _VC4_HD_CSC_CTL@GOTPAGE
Lloh138:
	ldr	x8, [x8, _VC4_HD_CSC_CTL@GOTPAGEOFF]
Lloh139:
	ldr	w0, [x8]
	mov	x1, x22
	bl	_HD_WRITE
Lloh140:
	adrp	x22, _VC4_HDMI_FIFO_CTL@GOTPAGE
Lloh141:
	ldr	x22, [x22, _VC4_HDMI_FIFO_CTL@GOTPAGEOFF]
	ldr	w0, [x22]
Lloh142:
	adrp	x8, _VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N@GOTPAGE
Lloh143:
	ldr	x8, [x8, _VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N@GOTPAGEOFF]
Lloh144:
	ldr	w1, [x8]
	bl	_HDMI_WRITE
	ldr	w21, [x24]
	mov	x0, x21
	bl	_HD_READ
Lloh145:
	adrp	x8, _VC4_HD_VID_CTL_ENABLE@GOTPAGE
Lloh146:
	ldr	x8, [x8, _VC4_HD_VID_CTL_ENABLE@GOTPAGEOFF]
Lloh147:
	ldr	w8, [x8]
	orr	w8, w8, w0
Lloh148:
	adrp	x9, _VC4_HD_VID_CTL_UNDERFLOW_ENABLE@GOTPAGE
Lloh149:
	ldr	x9, [x9, _VC4_HD_VID_CTL_UNDERFLOW_ENABLE@GOTPAGEOFF]
Lloh150:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh151:
	adrp	x9, _VC4_HD_VID_CTL_FRAME_COUNTER_RESET@GOTPAGE
Lloh152:
	ldr	x9, [x9, _VC4_HD_VID_CTL_FRAME_COUNTER_RESET@GOTPAGEOFF]
Lloh153:
	ldr	w9, [x9]
	orr	w1, w8, w9
	mov	x0, x21
	bl	_HD_WRITE
	ldr	x8, [x20, #8]
Lloh154:
	adrp	x19, _VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE@GOTPAGE
Lloh155:
	ldr	x19, [x19, _VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE@GOTPAGEOFF]
	cbz	x8, LBB0_13
; %bb.12:
	ldr	w21, [x23]
	mov	x0, x21
	bl	_HDMI_READ
Lloh156:
	adrp	x8, _VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI@GOTPAGE
Lloh157:
	ldr	x8, [x8, _VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI@GOTPAGEOFF]
Lloh158:
	ldr	w8, [x8]
	orr	w1, w8, w0
	mov	x0, x21
	bl	_HDMI_WRITE
	ldr	w0, [x23]
	bl	_HDMI_READ
	ldr	w8, [x19]
	and	w0, w8, w0
Lloh159:
	adrp	x21, l_.str.5@PAGE
Lloh160:
	add	x21, x21, l_.str.5@PAGEOFF
	b	LBB0_14
LBB0_13:
Lloh161:
	adrp	x8, _VC4_HDMI_RAM_PACKET_CONFIG@GOTPAGE
Lloh162:
	ldr	x8, [x8, _VC4_HDMI_RAM_PACKET_CONFIG@GOTPAGEOFF]
Lloh163:
	ldr	w21, [x8]
	mov	x0, x21
	bl	_HDMI_READ
Lloh164:
	adrp	x8, _VC4_HDMI_RAM_PACKET_ENABLE@GOTPAGE
Lloh165:
	ldr	x8, [x8, _VC4_HDMI_RAM_PACKET_ENABLE@GOTPAGEOFF]
Lloh166:
	ldr	w8, [x8]
	bic	w1, w0, w8
	mov	x0, x21
	bl	_HDMI_WRITE
	ldr	w21, [x23]
	mov	x0, x21
	bl	_HDMI_READ
Lloh167:
	adrp	x8, _VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI@GOTPAGE
Lloh168:
	ldr	x8, [x8, _VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI@GOTPAGEOFF]
Lloh169:
	ldr	w8, [x8]
	bic	w1, w0, w8
	mov	x0, x21
	bl	_HDMI_WRITE
	ldr	w0, [x23]
	bl	_HDMI_READ
	ldr	w8, [x19]
	tst	w8, w0
	cset	w0, eq
Lloh170:
	adrp	x21, l_.str.6@PAGE
Lloh171:
	add	x21, x21, l_.str.6@PAGEOFF
LBB0_14:
	mov	w1, #1000
	bl	_wait_for
	mov	x1, x21
	bl	_WARN_ONCE
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_16
; %bb.15:
	ldr	w0, [x23]
	bl	_HDMI_READ
	ldr	w8, [x19]
	tst	w8, w0
	cset	w0, eq
	bl	_WARN_ON
	ldr	w20, [x23]
	mov	x0, x20
	bl	_HDMI_READ
Lloh172:
	adrp	x8, _VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT@GOTPAGE
Lloh173:
	ldr	x8, [x8, _VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT@GOTPAGEOFF]
Lloh174:
	ldr	w8, [x8]
	orr	w1, w8, w0
	mov	x0, x20
	bl	_HDMI_WRITE
Lloh175:
	adrp	x8, _VC4_HDMI_RAM_PACKET_CONFIG@GOTPAGE
Lloh176:
	ldr	x8, [x8, _VC4_HDMI_RAM_PACKET_CONFIG@GOTPAGEOFF]
Lloh177:
	ldr	w0, [x8]
Lloh178:
	adrp	x8, _VC4_HDMI_RAM_PACKET_ENABLE@GOTPAGE
Lloh179:
	ldr	x8, [x8, _VC4_HDMI_RAM_PACKET_ENABLE@GOTPAGEOFF]
Lloh180:
	ldr	w1, [x8]
	bl	_HDMI_WRITE
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
	bl	_vc4_hdmi_set_infoframes
	ldr	w0, [x22]
	bl	_HDMI_READ
Lloh181:
	adrp	x8, _VC4_HDMI_FIFO_VALID_WRITE_MASK@GOTPAGE
Lloh182:
	ldr	x8, [x8, _VC4_HDMI_FIFO_VALID_WRITE_MASK@GOTPAGEOFF]
Lloh183:
	ldr	w8, [x8]
	and	w19, w8, w0
	ldr	w0, [x22]
Lloh184:
	adrp	x20, _VC4_HDMI_FIFO_CTL_RECENTER@GOTPAGE
Lloh185:
	ldr	x20, [x20, _VC4_HDMI_FIFO_CTL_RECENTER@GOTPAGEOFF]
	ldr	w8, [x20]
	bic	w1, w19, w8
	bl	_HDMI_WRITE
	ldr	w0, [x22]
	ldr	w8, [x20]
	orr	w1, w8, w19
	bl	_HDMI_WRITE
	mov	w0, #1000
	mov	w1, #1100
	bl	_usleep_range
	ldr	w0, [x22]
	ldr	w8, [x20]
	bic	w1, w19, w8
	bl	_HDMI_WRITE
	ldr	w0, [x22]
	ldr	w8, [x20]
	orr	w1, w8, w19
	bl	_HDMI_WRITE
	ldr	w0, [x22]
	bl	_HDMI_READ
Lloh186:
	adrp	x8, _VC4_HDMI_FIFO_CTL_RECENTER_DONE@GOTPAGE
Lloh187:
	ldr	x8, [x8, _VC4_HDMI_FIFO_CTL_RECENTER_DONE@GOTPAGEOFF]
Lloh188:
	ldr	w8, [x8]
	and	w0, w8, w0
	mov	w1, #1
	bl	_wait_for
Lloh189:
	adrp	x1, l_.str.7@PAGE
Lloh190:
	add	x1, x1, l_.str.7@PAGEOFF
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	b	_WARN_ONCE
LBB0_16:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGot	Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh132, Lloh133, Lloh134
	.loh AdrpLdrGotLdr	Lloh129, Lloh130, Lloh131
	.loh AdrpLdrGotLdr	Lloh126, Lloh127, Lloh128
	.loh AdrpLdrGotLdr	Lloh123, Lloh124, Lloh125
	.loh AdrpLdrGotLdr	Lloh120, Lloh121, Lloh122
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGot	Lloh154, Lloh155
	.loh AdrpLdrGotLdr	Lloh151, Lloh152, Lloh153
	.loh AdrpLdrGotLdr	Lloh148, Lloh149, Lloh150
	.loh AdrpLdrGotLdr	Lloh145, Lloh146, Lloh147
	.loh AdrpLdrGotLdr	Lloh142, Lloh143, Lloh144
	.loh AdrpLdrGot	Lloh140, Lloh141
	.loh AdrpLdrGotLdr	Lloh137, Lloh138, Lloh139
	.loh AdrpLdrGot	Lloh135, Lloh136
	.loh AdrpAdd	Lloh159, Lloh160
	.loh AdrpLdrGotLdr	Lloh156, Lloh157, Lloh158
	.loh AdrpAdd	Lloh170, Lloh171
	.loh AdrpLdrGotLdr	Lloh167, Lloh168, Lloh169
	.loh AdrpLdrGotLdr	Lloh164, Lloh165, Lloh166
	.loh AdrpLdrGotLdr	Lloh161, Lloh162, Lloh163
	.loh AdrpAdd	Lloh189, Lloh190
	.loh AdrpLdrGotLdr	Lloh186, Lloh187, Lloh188
	.loh AdrpLdrGot	Lloh184, Lloh185
	.loh AdrpLdrGotLdr	Lloh181, Lloh182, Lloh183
	.loh AdrpLdrGotLdr	Lloh178, Lloh179, Lloh180
	.loh AdrpLdrGotLdr	Lloh175, Lloh176, Lloh177
	.loh AdrpLdrGotLdr	Lloh172, Lloh173, Lloh174
	.cfi_endproc
                                        ; -- End function
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ; @DRM_MODE_FLAG_PHSYNC
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ; @DRM_MODE_FLAG_PVSYNC
	.comm	_DRM_MODE_FLAG_INTERLACE,4,2    ; @DRM_MODE_FLAG_INTERLACE
	.comm	_DRM_MODE_FLAG_DBLCLK,4,2       ; @DRM_MODE_FLAG_DBLCLK
	.comm	_VC4_HDMI_VERTA_VSP,4,2         ; @VC4_HDMI_VERTA_VSP
	.comm	_VC4_HDMI_VERTA_VFP,4,2         ; @VC4_HDMI_VERTA_VFP
	.comm	_VC4_HDMI_VERTA_VAL,4,2         ; @VC4_HDMI_VERTA_VAL
	.comm	_VC4_HDMI_VERTB_VSPO,4,2        ; @VC4_HDMI_VERTB_VSPO
	.comm	_VC4_HDMI_VERTB_VBP,4,2         ; @VC4_HDMI_VERTB_VBP
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to retain power domain: %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to set pixel clock rate: %d\n"

l_.str.2:                               ; @.str.2
	.asciz	"Failed to turn on pixel clock: %d\n"

	.comm	_VC4_HDMI_SW_RESET_CONTROL,4,2  ; @VC4_HDMI_SW_RESET_CONTROL
	.comm	_VC4_HDMI_SW_RESET_HDMI,4,2     ; @VC4_HDMI_SW_RESET_HDMI
	.comm	_VC4_HDMI_SW_RESET_FORMAT_DETECT,4,2 ; @VC4_HDMI_SW_RESET_FORMAT_DETECT
	.comm	_VC4_HDMI_TX_PHY_RESET_CTL,4,2  ; @VC4_HDMI_TX_PHY_RESET_CTL
	.comm	_VC4_HD_VID_CTL,4,2             ; @VC4_HD_VID_CTL
	.comm	_VC4_HDMI_SCHEDULER_CONTROL,4,2 ; @VC4_HDMI_SCHEDULER_CONTROL
	.comm	_VC4_HDMI_SCHEDULER_CONTROL_MANUAL_FORMAT,4,2 ; @VC4_HDMI_SCHEDULER_CONTROL_MANUAL_FORMAT
	.comm	_VC4_HDMI_SCHEDULER_CONTROL_IGNORE_VSYNC_PREDICTS,4,2 ; @VC4_HDMI_SCHEDULER_CONTROL_IGNORE_VSYNC_PREDICTS
	.comm	_VC4_HDMI_HORZA,4,2             ; @VC4_HDMI_HORZA
	.comm	_VC4_HDMI_HORZA_VPOS,4,2        ; @VC4_HDMI_HORZA_VPOS
	.comm	_VC4_HDMI_HORZA_HPOS,4,2        ; @VC4_HDMI_HORZA_HPOS
	.comm	_VC4_HDMI_HORZA_HAP,4,2         ; @VC4_HDMI_HORZA_HAP
	.comm	_VC4_HDMI_HORZB,4,2             ; @VC4_HDMI_HORZB
	.comm	_VC4_HDMI_HORZB_HBP,4,2         ; @VC4_HDMI_HORZB_HBP
	.comm	_VC4_HDMI_HORZB_HSP,4,2         ; @VC4_HDMI_HORZB_HSP
	.comm	_VC4_HDMI_HORZB_HFP,4,2         ; @VC4_HDMI_HORZB_HFP
	.comm	_VC4_HDMI_VERTA0,4,2            ; @VC4_HDMI_VERTA0
	.comm	_VC4_HDMI_VERTA1,4,2            ; @VC4_HDMI_VERTA1
	.comm	_VC4_HDMI_VERTB0,4,2            ; @VC4_HDMI_VERTB0
	.comm	_VC4_HDMI_VERTB1,4,2            ; @VC4_HDMI_VERTB1
	.comm	_VC4_HD_VID_CTL_VSYNC_LOW,4,2   ; @VC4_HD_VID_CTL_VSYNC_LOW
	.comm	_VC4_HD_VID_CTL_HSYNC_LOW,4,2   ; @VC4_HD_VID_CTL_HSYNC_LOW
	.comm	_VC4_HD_CSC_CTL_ORDER_BGR,4,2   ; @VC4_HD_CSC_CTL_ORDER_BGR
	.comm	_VC4_HD_CSC_CTL_ORDER,4,2       ; @VC4_HD_CSC_CTL_ORDER
	.comm	_HDMI_QUANTIZATION_RANGE_LIMITED,8,3 ; @HDMI_QUANTIZATION_RANGE_LIMITED
	.comm	_VC4_HD_CSC_CTL_ENABLE,4,2      ; @VC4_HD_CSC_CTL_ENABLE
	.comm	_VC4_HD_CSC_CTL_RGB2YCC,4,2     ; @VC4_HD_CSC_CTL_RGB2YCC
	.comm	_VC4_HD_CSC_CTL_MODE_CUSTOM,4,2 ; @VC4_HD_CSC_CTL_MODE_CUSTOM
	.comm	_VC4_HD_CSC_CTL_MODE,4,2        ; @VC4_HD_CSC_CTL_MODE
	.comm	_VC4_HD_CSC_12_11,4,2           ; @VC4_HD_CSC_12_11
	.comm	_VC4_HD_CSC_14_13,4,2           ; @VC4_HD_CSC_14_13
	.comm	_VC4_HD_CSC_22_21,4,2           ; @VC4_HD_CSC_22_21
	.comm	_VC4_HD_CSC_24_23,4,2           ; @VC4_HD_CSC_24_23
	.comm	_VC4_HD_CSC_32_31,4,2           ; @VC4_HD_CSC_32_31
	.comm	_VC4_HD_CSC_34_33,4,2           ; @VC4_HD_CSC_34_33
	.comm	_VC4_HD_CSC_CTL,4,2             ; @VC4_HD_CSC_CTL
	.comm	_VC4_HDMI_FIFO_CTL,4,2          ; @VC4_HDMI_FIFO_CTL
	.comm	_VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N,4,2 ; @VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N
	.comm	_VC4_HD_VID_CTL_ENABLE,4,2      ; @VC4_HD_VID_CTL_ENABLE
	.comm	_VC4_HD_VID_CTL_UNDERFLOW_ENABLE,4,2 ; @VC4_HD_VID_CTL_UNDERFLOW_ENABLE
	.comm	_VC4_HD_VID_CTL_FRAME_COUNTER_RESET,4,2 ; @VC4_HD_VID_CTL_FRAME_COUNTER_RESET
	.comm	_VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI,4,2 ; @VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI
	.comm	_VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE,4,2 ; @VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE
l_.str.5:                               ; @.str.5
	.asciz	"Timeout waiting for VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE\n"

	.comm	_VC4_HDMI_RAM_PACKET_CONFIG,4,2 ; @VC4_HDMI_RAM_PACKET_CONFIG
	.comm	_VC4_HDMI_RAM_PACKET_ENABLE,4,2 ; @VC4_HDMI_RAM_PACKET_ENABLE
l_.str.6:                               ; @.str.6
	.asciz	"Timeout waiting for !VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE\n"

	.comm	_VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT,4,2 ; @VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT
	.comm	_VC4_HDMI_FIFO_VALID_WRITE_MASK,4,2 ; @VC4_HDMI_FIFO_VALID_WRITE_MASK
	.comm	_VC4_HDMI_FIFO_CTL_RECENTER,4,2 ; @VC4_HDMI_FIFO_CTL_RECENTER
	.comm	_VC4_HDMI_FIFO_CTL_RECENTER_DONE,4,2 ; @VC4_HDMI_FIFO_CTL_RECENTER_DONE
l_.str.7:                               ; @.str.7
	.asciz	"Timeout waiting for VC4_HDMI_FIFO_CTL_RECENTER_DONE"

	.no_dead_strip	_vc4_hdmi_encoder_enable
.subsections_via_symbols
