	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vc4_validate_branches
_vc4_validate_branches:                 ## @vc4_validate_branches
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdi), %eax
	testl	%eax, %eax
	jle	LBB0_1
## %bb.2:
	movq	%rdi, %r14
	movl	$-2, %r15d
	xorl	%r13d, %r13d
	xorl	%eax, %eax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_3 Depth=1
	leal	3(%r13), %eax
	movl	%eax, (%r14)
LBB0_20:                                ##   in Loop: Header=BB0_3 Depth=1
	incq	%r13
	movslq	(%r14), %rax
	cmpq	%rax, %r13
	jge	LBB0_21
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r14), %rax
	movl	(%rax,%r13,4), %ebx
	movq	_QPU_BRANCH_TARGET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_QPU_GET_FIELD
	movq	%rax, %r12
	movq	_QPU_SIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	callq	_QPU_GET_FIELD
	movq	_QPU_SIG_PROG_END@GOTPCREL(%rip), %rcx
	cmpq	%rax, (%rcx)
	je	LBB0_4
## %bb.5:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	_QPU_SIG_BRANCH@GOTPCREL(%rip), %rcx
	cmpq	%rax, (%rcx)
	jne	LBB0_20
## %bb.6:                               ##   in Loop: Header=BB0_3 Depth=1
	movl	%r13d, %eax
	subl	%r15d, %eax
	cmpl	$3, %eax
	jle	LBB0_7
## %bb.8:                               ##   in Loop: Header=BB0_3 Depth=1
	movq	_QPU_BRANCH_REG@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	jne	LBB0_9
## %bb.10:                              ##   in Loop: Header=BB0_3 Depth=1
	movq	_QPU_BRANCH_REL@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_11
## %bb.12:                              ##   in Loop: Header=BB0_3 Depth=1
	testb	$3, %r12b
	jne	LBB0_13
## %bb.14:                              ##   in Loop: Header=BB0_3 Depth=1
	sarl	$3, %r12d
	movslq	%r12d, %rax
	leaq	(%rax,%r13), %rdi
	addq	$4, %rdi
	movslq	(%r14), %rcx
	cmpq	%rcx, %rdi
	jge	LBB0_15
## %bb.17:                              ##   in Loop: Header=BB0_3 Depth=1
	leaq	4(%r13), %rbx
	movl	16(%r14), %esi
	callq	_set_bit
	movslq	(%r14), %rcx
	cmpq	%rcx, %rbx
	jge	LBB0_18
## %bb.19:                              ##   in Loop: Header=BB0_3 Depth=1
	movl	16(%r14), %esi
	movq	%rbx, %rdi
	callq	_set_bit
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	%rbx, %rsi
	callq	_max
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movl	%r13d, %r15d
	jmp	LBB0_20
LBB0_1:
	xorl	%ecx, %ecx
	jmp	LBB0_22
LBB0_21:
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
LBB0_22:
	addl	$-3, %eax
	cltq
	movl	$1, %r14d
	cmpq	%rax, %rcx
	jle	LBB0_25
## %bb.23:
	leaq	L_.str.6(%rip), %rdi
LBB0_24:
	xorl	%r14d, %r14d
	xorl	%eax, %eax
	callq	_DRM_DEBUG
LBB0_25:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_7:
	leaq	L_.str(%rip), %rdi
	xorl	%r14d, %r14d
	movl	%r13d, %esi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	jmp	LBB0_25
LBB0_9:
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_24
LBB0_11:
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_24
LBB0_13:
	leaq	L_.str.3(%rip), %rdi
	jmp	LBB0_24
LBB0_15:
	leaq	(%rax,%r13), %rdx
	addq	$4, %rdx
	leaq	L_.str.4(%rip), %rdi
	xorl	%r14d, %r14d
	movl	%r13d, %esi
	jmp	LBB0_16
LBB0_18:
	leaq	L_.str.5(%rip), %rdi
	xorl	%r14d, %r14d
	movl	%r13d, %esi
	movq	%rbx, %rdx
LBB0_16:
                                        ## kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	jmp	LBB0_25
	.cfi_endproc
                                        ## -- End function
	.comm	_QPU_BRANCH_TARGET,4,2          ## @QPU_BRANCH_TARGET
	.comm	_QPU_SIG,4,2                    ## @QPU_SIG
	.comm	_QPU_SIG_PROG_END,8,3           ## @QPU_SIG_PROG_END
	.comm	_QPU_SIG_BRANCH,8,3             ## @QPU_SIG_BRANCH
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Branch at %d during delay slots\n"

	.comm	_QPU_BRANCH_REG,4,2             ## @QPU_BRANCH_REG
L_.str.1:                               ## @.str.1
	.asciz	"branching from register relative not supported\n"

	.comm	_QPU_BRANCH_REL,4,2             ## @QPU_BRANCH_REL
L_.str.2:                               ## @.str.2
	.asciz	"relative branching required\n"

L_.str.3:                               ## @.str.3
	.asciz	"branch target not aligned\n"

L_.str.4:                               ## @.str.4
	.asciz	"Branch at %d outside of shader (ip %d/%d)\n"

L_.str.5:                               ## @.str.5
	.asciz	"Branch at %d continues past shader end (%d/%d)\n"

L_.str.6:                               ## @.str.6
	.asciz	"Branch landed after QPU_SIG_PROG_END"

	.no_dead_strip	_vc4_validate_branches
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vc4_validate_branches
_vc4_validate_branches:                 ; @vc4_validate_branches
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0]
	cmp	w8, #1
	b.lt	LBB0_13
; %bb.1:
	mov	x20, x0
	mov	x23, #0
	mov	x19, #0
	mov	w28, #-2
Lloh0:
	adrp	x24, _QPU_BRANCH_TARGET@GOTPAGE
Lloh1:
	ldr	x24, [x24, _QPU_BRANCH_TARGET@GOTPAGEOFF]
Lloh2:
	adrp	x25, _QPU_SIG@GOTPAGE
Lloh3:
	ldr	x25, [x25, _QPU_SIG@GOTPAGEOFF]
Lloh4:
	adrp	x26, _QPU_SIG_PROG_END@GOTPAGE
Lloh5:
	ldr	x26, [x26, _QPU_SIG_PROG_END@GOTPAGEOFF]
Lloh6:
	adrp	x27, _QPU_SIG_BRANCH@GOTPAGE
Lloh7:
	ldr	x27, [x27, _QPU_SIG_BRANCH@GOTPAGEOFF]
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	w8, w23, #3
	str	w8, [x20]
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	x23, x23, #1
	ldrsw	x8, [x20]
	cmp	x23, x8
	b.ge	LBB0_14
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x20, #8]
	ldr	w22, [x8, x23, lsl #2]
	ldr	w1, [x24]
	mov	x0, x22
	bl	_QPU_GET_FIELD
	mov	x21, x0
	ldr	w1, [x25]
	mov	x0, x22
	bl	_QPU_GET_FIELD
	ldr	x8, [x26]
	cmp	x8, x0
	b.eq	LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	x8, [x27]
	cmp	x8, x0
	b.ne	LBB0_3
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	sub	w8, w23, w28
	cmp	w8, #3
	b.le	LBB0_19
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
Lloh8:
	adrp	x8, _QPU_BRANCH_REG@GOTPAGE
Lloh9:
	ldr	x8, [x8, _QPU_BRANCH_REG@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	tst	w8, w22
	b.ne	LBB0_20
; %bb.8:                                ;   in Loop: Header=BB0_4 Depth=1
Lloh11:
	adrp	x8, _QPU_BRANCH_REL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _QPU_BRANCH_REL@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_21
; %bb.9:                                ;   in Loop: Header=BB0_4 Depth=1
	tst	x21, #0x3
	b.ne	LBB0_22
; %bb.10:                               ;   in Loop: Header=BB0_4 Depth=1
	asr	w8, w21, #3
	add	x8, x23, w8, sxtw
	add	x0, x8, #4
	ldrsw	x8, [x20]
	cmp	x0, x8
	b.ge	LBB0_23
; %bb.11:                               ;   in Loop: Header=BB0_4 Depth=1
	add	x21, x23, #4
	ldr	w1, [x20, #16]
	bl	_set_bit
	ldrsw	x8, [x20]
	cmp	x21, x8
	b.ge	LBB0_24
; %bb.12:                               ;   in Loop: Header=BB0_4 Depth=1
	ldr	w1, [x20, #16]
	mov	x0, x21
	bl	_set_bit
	mov	x0, x19
	mov	x1, x21
	bl	_max
	mov	x19, x0
	mov	x28, x23
	b	LBB0_3
LBB0_13:
	mov	x19, #0
LBB0_14:
	sub	w8, w8, #3
	cmp	x19, w8, sxtw
	b.le	LBB0_17
; %bb.15:
Lloh14:
	adrp	x0, l_.str.6@PAGE
Lloh15:
	add	x0, x0, l_.str.6@PAGEOFF
LBB0_16:
	bl	_DRM_DEBUG
	mov	w0, #0
	b	LBB0_18
LBB0_17:
	mov	w0, #1
LBB0_18:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_19:
	str	x23, [sp]
Lloh16:
	adrp	x0, l_.str@PAGE
Lloh17:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_16
LBB0_20:
Lloh18:
	adrp	x0, l_.str.1@PAGE
Lloh19:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_16
LBB0_21:
Lloh20:
	adrp	x0, l_.str.2@PAGE
Lloh21:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_16
LBB0_22:
Lloh22:
	adrp	x0, l_.str.3@PAGE
Lloh23:
	add	x0, x0, l_.str.3@PAGEOFF
	b	LBB0_16
LBB0_23:
                                        ; kill: def $w8 killed $w8 killed $x8 def $x8
	stp	x0, x8, [sp, #8]
	str	x23, [sp]
Lloh24:
	adrp	x0, l_.str.4@PAGE
Lloh25:
	add	x0, x0, l_.str.4@PAGEOFF
	b	LBB0_16
LBB0_24:
	add	x9, x23, #4
                                        ; kill: def $w8 killed $w8 killed $x8 def $x8
	stp	x9, x8, [sp, #8]
	str	x23, [sp]
Lloh26:
	adrp	x0, l_.str.5@PAGE
Lloh27:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_16
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.cfi_endproc
                                        ; -- End function
	.comm	_QPU_BRANCH_TARGET,4,2          ; @QPU_BRANCH_TARGET
	.comm	_QPU_SIG,4,2                    ; @QPU_SIG
	.comm	_QPU_SIG_PROG_END,8,3           ; @QPU_SIG_PROG_END
	.comm	_QPU_SIG_BRANCH,8,3             ; @QPU_SIG_BRANCH
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Branch at %d during delay slots\n"

	.comm	_QPU_BRANCH_REG,4,2             ; @QPU_BRANCH_REG
l_.str.1:                               ; @.str.1
	.asciz	"branching from register relative not supported\n"

	.comm	_QPU_BRANCH_REL,4,2             ; @QPU_BRANCH_REL
l_.str.2:                               ; @.str.2
	.asciz	"relative branching required\n"

l_.str.3:                               ; @.str.3
	.asciz	"branch target not aligned\n"

l_.str.4:                               ; @.str.4
	.asciz	"Branch at %d outside of shader (ip %d/%d)\n"

l_.str.5:                               ; @.str.5
	.asciz	"Branch at %d continues past shader end (%d/%d)\n"

l_.str.6:                               ; @.str.6
	.asciz	"Branch landed after QPU_SIG_PROG_END"

	.no_dead_strip	_vc4_validate_branches
.subsections_via_symbols
