	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gen7_render_ring_flush
_gen7_render_ring_flush:                ## @gen7_render_ring_flush
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r12d
	movq	%rdi, %r15
	movq	(%rdi), %rax
	movl	(%rax), %edi
	movq	_INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_intel_gt_scratch_offset
	movl	%eax, %r14d
	movq	_PIPE_CONTROL_CS_STALL@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_EMIT_FLUSH@GOTPCREL(%rip), %rax
	testl	%r12d, (%rax)
	je	LBB0_2
## %bb.1:
	movq	_PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_DEPTH_CACHE_FLUSH@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_DC_FLUSH_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_FLUSH_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
LBB0_2:
	movq	_EMIT_INVALIDATE@GOTPCREL(%rip), %rax
	testl	%r12d, (%rax)
	je	LBB0_4
## %bb.3:
	movq	_PIPE_CONTROL_TLB_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_VF_CACHE_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_CONST_CACHE_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_STATE_CACHE_INVALIDATE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_MEDIA_STATE_CLEAR@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_QW_WRITE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_GLOBAL_GTT_IVB@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_PIPE_CONTROL_STALL_AT_SCOREBOARD@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	%r15, %rdi
	callq	_gen7_render_ring_cs_stall_wa
LBB0_4:
	movq	%r15, %rdi
	movl	$4, %esi
	callq	_intel_ring_begin
	movq	%rax, %r12
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_5
## %bb.6:
	movq	%r12, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_PTR_ERR                        ## TAILCALL
LBB0_5:
	movl	$4, %edi
	callq	_GFX_OP_PIPE_CONTROL
	movl	%eax, (%r12)
	movl	%ebx, 4(%r12)
	movl	%r14d, 8(%r12)
	movq	%r12, %rsi
	addq	$16, %rsi
	movl	$0, 12(%r12)
	movq	%r15, %rdi
	callq	_intel_ring_advance
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH,4,2 ## @INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH
	.comm	_PIPE_CONTROL_CS_STALL,4,2      ## @PIPE_CONTROL_CS_STALL
	.comm	_EMIT_FLUSH,4,2                 ## @EMIT_FLUSH
	.comm	_PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH,4,2 ## @PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH
	.comm	_PIPE_CONTROL_DEPTH_CACHE_FLUSH,4,2 ## @PIPE_CONTROL_DEPTH_CACHE_FLUSH
	.comm	_PIPE_CONTROL_DC_FLUSH_ENABLE,4,2 ## @PIPE_CONTROL_DC_FLUSH_ENABLE
	.comm	_PIPE_CONTROL_FLUSH_ENABLE,4,2  ## @PIPE_CONTROL_FLUSH_ENABLE
	.comm	_EMIT_INVALIDATE,4,2            ## @EMIT_INVALIDATE
	.comm	_PIPE_CONTROL_TLB_INVALIDATE,4,2 ## @PIPE_CONTROL_TLB_INVALIDATE
	.comm	_PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE,4,2 ## @PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE,4,2 ## @PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_VF_CACHE_INVALIDATE,4,2 ## @PIPE_CONTROL_VF_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_CONST_CACHE_INVALIDATE,4,2 ## @PIPE_CONTROL_CONST_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_STATE_CACHE_INVALIDATE,4,2 ## @PIPE_CONTROL_STATE_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_MEDIA_STATE_CLEAR,4,2 ## @PIPE_CONTROL_MEDIA_STATE_CLEAR
	.comm	_PIPE_CONTROL_QW_WRITE,4,2      ## @PIPE_CONTROL_QW_WRITE
	.comm	_PIPE_CONTROL_GLOBAL_GTT_IVB,4,2 ## @PIPE_CONTROL_GLOBAL_GTT_IVB
	.comm	_PIPE_CONTROL_STALL_AT_SCOREBOARD,4,2 ## @PIPE_CONTROL_STALL_AT_SCOREBOARD
	.no_dead_strip	_gen7_render_ring_flush
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gen7_render_ring_flush
_gen7_render_ring_flush:                ; @gen7_render_ring_flush
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x1
	mov	x19, x0
	ldr	x8, [x0]
	ldr	w0, [x8]
Lloh0:
	adrp	x8, _INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_intel_gt_scratch_offset
	mov	x20, x0
Lloh3:
	adrp	x8, _PIPE_CONTROL_CS_STALL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PIPE_CONTROL_CS_STALL@GOTPAGEOFF]
Lloh5:
	ldr	w22, [x8]
Lloh6:
	adrp	x8, _EMIT_FLUSH@GOTPAGE
Lloh7:
	ldr	x8, [x8, _EMIT_FLUSH@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_2
; %bb.1:
Lloh9:
	adrp	x8, _PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	orr	w8, w8, w22
Lloh12:
	adrp	x9, _PIPE_CONTROL_DEPTH_CACHE_FLUSH@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PIPE_CONTROL_DEPTH_CACHE_FLUSH@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh15:
	adrp	x9, _PIPE_CONTROL_DC_FLUSH_ENABLE@GOTPAGE
Lloh16:
	ldr	x9, [x9, _PIPE_CONTROL_DC_FLUSH_ENABLE@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh18:
	adrp	x9, _PIPE_CONTROL_FLUSH_ENABLE@GOTPAGE
Lloh19:
	ldr	x9, [x9, _PIPE_CONTROL_FLUSH_ENABLE@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w22, w8, w9
LBB0_2:
Lloh21:
	adrp	x8, _EMIT_INVALIDATE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _EMIT_INVALIDATE@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_4
; %bb.3:
Lloh24:
	adrp	x8, _PIPE_CONTROL_TLB_INVALIDATE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PIPE_CONTROL_TLB_INVALIDATE@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	orr	w8, w8, w22
Lloh27:
	adrp	x9, _PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE@GOTPAGE
Lloh28:
	ldr	x9, [x9, _PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh30:
	adrp	x9, _PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE@GOTPAGE
Lloh31:
	ldr	x9, [x9, _PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh33:
	adrp	x9, _PIPE_CONTROL_VF_CACHE_INVALIDATE@GOTPAGE
Lloh34:
	ldr	x9, [x9, _PIPE_CONTROL_VF_CACHE_INVALIDATE@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh36:
	adrp	x9, _PIPE_CONTROL_CONST_CACHE_INVALIDATE@GOTPAGE
Lloh37:
	ldr	x9, [x9, _PIPE_CONTROL_CONST_CACHE_INVALIDATE@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh39:
	adrp	x9, _PIPE_CONTROL_STATE_CACHE_INVALIDATE@GOTPAGE
Lloh40:
	ldr	x9, [x9, _PIPE_CONTROL_STATE_CACHE_INVALIDATE@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh42:
	adrp	x9, _PIPE_CONTROL_MEDIA_STATE_CLEAR@GOTPAGE
Lloh43:
	ldr	x9, [x9, _PIPE_CONTROL_MEDIA_STATE_CLEAR@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh45:
	adrp	x9, _PIPE_CONTROL_QW_WRITE@GOTPAGE
Lloh46:
	ldr	x9, [x9, _PIPE_CONTROL_QW_WRITE@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh48:
	adrp	x9, _PIPE_CONTROL_GLOBAL_GTT_IVB@GOTPAGE
Lloh49:
	ldr	x9, [x9, _PIPE_CONTROL_GLOBAL_GTT_IVB@GOTPAGEOFF]
Lloh50:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh51:
	adrp	x9, _PIPE_CONTROL_STALL_AT_SCOREBOARD@GOTPAGE
Lloh52:
	ldr	x9, [x9, _PIPE_CONTROL_STALL_AT_SCOREBOARD@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	orr	w22, w8, w9
	mov	x0, x19
	bl	_gen7_render_ring_cs_stall_wa
LBB0_4:
	mov	x0, x19
	mov	w1, #4
	bl	_intel_ring_begin
	mov	x21, x0
	bl	_IS_ERR
	cbz	x0, LBB0_6
; %bb.5:
	mov	x0, x21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_PTR_ERR
LBB0_6:
	mov	w0, #4
	bl	_GFX_OP_PIPE_CONTROL
	stp	w0, w22, [x21]
	add	x1, x21, #16
	stp	w20, wzr, [x21, #8]
	mov	x0, x19
	bl	_intel_ring_advance
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH,4,2 ; @INTEL_GT_SCRATCH_FIELD_RENDER_FLUSH
	.comm	_PIPE_CONTROL_CS_STALL,4,2      ; @PIPE_CONTROL_CS_STALL
	.comm	_EMIT_FLUSH,4,2                 ; @EMIT_FLUSH
	.comm	_PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH,4,2 ; @PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH
	.comm	_PIPE_CONTROL_DEPTH_CACHE_FLUSH,4,2 ; @PIPE_CONTROL_DEPTH_CACHE_FLUSH
	.comm	_PIPE_CONTROL_DC_FLUSH_ENABLE,4,2 ; @PIPE_CONTROL_DC_FLUSH_ENABLE
	.comm	_PIPE_CONTROL_FLUSH_ENABLE,4,2  ; @PIPE_CONTROL_FLUSH_ENABLE
	.comm	_EMIT_INVALIDATE,4,2            ; @EMIT_INVALIDATE
	.comm	_PIPE_CONTROL_TLB_INVALIDATE,4,2 ; @PIPE_CONTROL_TLB_INVALIDATE
	.comm	_PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE,4,2 ; @PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE,4,2 ; @PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_VF_CACHE_INVALIDATE,4,2 ; @PIPE_CONTROL_VF_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_CONST_CACHE_INVALIDATE,4,2 ; @PIPE_CONTROL_CONST_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_STATE_CACHE_INVALIDATE,4,2 ; @PIPE_CONTROL_STATE_CACHE_INVALIDATE
	.comm	_PIPE_CONTROL_MEDIA_STATE_CLEAR,4,2 ; @PIPE_CONTROL_MEDIA_STATE_CLEAR
	.comm	_PIPE_CONTROL_QW_WRITE,4,2      ; @PIPE_CONTROL_QW_WRITE
	.comm	_PIPE_CONTROL_GLOBAL_GTT_IVB,4,2 ; @PIPE_CONTROL_GLOBAL_GTT_IVB
	.comm	_PIPE_CONTROL_STALL_AT_SCOREBOARD,4,2 ; @PIPE_CONTROL_STALL_AT_SCOREBOARD
	.no_dead_strip	_gen7_render_ring_flush
.subsections_via_symbols
