	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_virt_kiq_wreg           ## -- Begin function amdgpu_virt_kiq_wreg
	.p2align	4, 0x90
_amdgpu_virt_kiq_wreg:                  ## @amdgpu_virt_kiq_wreg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r13d
	movl	%esi, %r14d
	movq	%rdi, %rbx
	leaq	16(%rdi), %r15
	leaq	8(%rdi), %r12
	movq	16(%rdi), %rax
	xorl	%edi, %edi
	cmpl	$0, (%rax)
	sete	%dil
	callq	_BUG_ON
	movq	%r12, %rdi
	callq	_spin_lock_irqsave
	movq	%r15, %rdi
	movl	$32, %esi
	callq	_amdgpu_ring_alloc
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%r13d, %edx
	callq	_amdgpu_ring_emit_wreg
	leaq	-44(%rbp), %rsi
	movq	%r15, %rdi
	callq	_amdgpu_fence_emit_polling
	movq	%r15, %rdi
	callq	_amdgpu_ring_commit
	movq	%r12, %rdi
	callq	_spin_unlock_irqrestore
	movl	-44(%rbp), %esi
	movq	_MAX_KIQ_REG_WAIT@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	%r15, %rdi
	callq	_amdgpu_fence_wait_polling
	testq	%rax, %rax
	jle	LBB0_1
## %bb.9:
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_might_sleep
LBB0_6:
	movq	_MAX_KIQ_REG_TRY@GOTPCREL(%rip), %rax
	cmpq	(%rax), %rbx
	jg	LBB0_7
	jmp	LBB0_8
LBB0_1:
	cmpq	$0, (%rbx)
	jne	LBB0_7
## %bb.2:
	xorl	%eax, %eax
	callq	_in_interrupt
	testq	%rax, %rax
	je	LBB0_3
LBB0_7:
	leaq	L_.str(%rip), %rdi
	movl	%r14d, %esi
	callq	_pr_err
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	xorl	%eax, %eax
	callq	_might_sleep
	movl	$1, %ecx
	movq	_MAX_KIQ_REG_TRY@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	%rcx, %rbx
	leaq	-1(%rcx), %rax
	cmpq	(%r13), %rax
	jge	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_4 Depth=1
	movq	_MAX_KIQ_REG_BAILOUT_INTERVAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_msleep
	movl	-44(%rbp), %esi
	movl	(%r12), %edx
	movq	%r15, %rdi
	callq	_amdgpu_fence_wait_polling
	leaq	1(%rbx), %rcx
	testq	%rax, %rax
	jle	LBB0_4
	jmp	LBB0_6
	.cfi_endproc
                                        ## -- End function
	.comm	_MAX_KIQ_REG_WAIT,4,2           ## @MAX_KIQ_REG_WAIT
	.comm	_MAX_KIQ_REG_TRY,8,3            ## @MAX_KIQ_REG_TRY
	.comm	_MAX_KIQ_REG_BAILOUT_INTERVAL,4,2 ## @MAX_KIQ_REG_BAILOUT_INTERVAL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to write reg:%x\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_virt_kiq_wreg           ; -- Begin function amdgpu_virt_kiq_wreg
	.p2align	2
_amdgpu_virt_kiq_wreg:                  ; @amdgpu_virt_kiq_wreg
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x2
	mov	x19, x1
	mov	x21, x0
	mov	x20, x0
	ldr	x8, [x20, #16]!
	sub	x23, x20, #8
	ldr	w8, [x8]
	cmp	w8, #0
	cset	w0, eq
	bl	_BUG_ON
	mov	x0, x23
	bl	_spin_lock_irqsave
	mov	x0, x20
	mov	w1, #32
	bl	_amdgpu_ring_alloc
	mov	x0, x20
	mov	x1, x19
	mov	x2, x22
	bl	_amdgpu_ring_emit_wreg
	add	x1, sp, #12
	mov	x0, x20
	bl	_amdgpu_fence_emit_polling
	mov	x0, x20
	bl	_amdgpu_ring_commit
	mov	x0, x23
	bl	_spin_unlock_irqrestore
	ldr	w1, [sp, #12]
Lloh0:
	adrp	x22, _MAX_KIQ_REG_WAIT@GOTPAGE
Lloh1:
	ldr	x22, [x22, _MAX_KIQ_REG_WAIT@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x20
	bl	_amdgpu_fence_wait_polling
	cmp	x0, #0
	b.le	LBB0_3
; %bb.1:
	bl	_might_sleep
	mov	x21, #0
LBB0_2:
Lloh2:
	adrp	x8, _MAX_KIQ_REG_TRY@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MAX_KIQ_REG_TRY@GOTPAGEOFF]
Lloh4:
	ldr	x8, [x8]
	cmp	x21, x8
	b.gt	LBB0_5
	b	LBB0_6
LBB0_3:
	ldr	x8, [x21]
	cbnz	x8, LBB0_5
; %bb.4:
	bl	_in_interrupt
	cbz	x0, LBB0_7
LBB0_5:
Lloh5:
	adrp	x0, l_.str@PAGE
Lloh6:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x19
	bl	_pr_err
LBB0_6:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_7:
	bl	_might_sleep
	mov	w8, #1
Lloh7:
	adrp	x23, _MAX_KIQ_REG_TRY@GOTPAGE
Lloh8:
	ldr	x23, [x23, _MAX_KIQ_REG_TRY@GOTPAGEOFF]
Lloh9:
	adrp	x24, _MAX_KIQ_REG_BAILOUT_INTERVAL@GOTPAGE
Lloh10:
	ldr	x24, [x24, _MAX_KIQ_REG_BAILOUT_INTERVAL@GOTPAGEOFF]
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	mov	x21, x8
	sub	x8, x8, #1
	ldr	x9, [x23]
	cmp	x8, x9
	b.ge	LBB0_2
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=1
	ldr	w0, [x24]
	bl	_msleep
	ldr	w1, [sp, #12]
	ldr	w2, [x22]
	mov	x0, x20
	bl	_amdgpu_fence_wait_polling
	add	x8, x21, #1
	cmp	x0, #1
	b.lt	LBB0_8
	b	LBB0_2
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_MAX_KIQ_REG_WAIT,4,2           ; @MAX_KIQ_REG_WAIT
	.comm	_MAX_KIQ_REG_TRY,8,3            ; @MAX_KIQ_REG_TRY
	.comm	_MAX_KIQ_REG_BAILOUT_INTERVAL,4,2 ; @MAX_KIQ_REG_BAILOUT_INTERVAL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to write reg:%x\n"

.subsections_via_symbols
