	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_device_ip_fini
_amdgpu_device_ip_fini:                 ## @amdgpu_device_ip_fini
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	callq	_amdgpu_ras_pre_fini
	cmpl	$2, 20(%r12)
	jl	LBB0_2
## %bb.1:
	movq	%r12, %rdi
	callq	_amdgpu_xgmi_remove_device
LBB0_2:
	movq	%r12, %rdi
	callq	_amdgpu_amdkfd_device_fini
	movq	_AMD_PG_STATE_UNGATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_amdgpu_device_set_pg_state
	movq	_AMD_CG_STATE_UNGATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_amdgpu_device_set_cg_state
	movl	(%r12), %eax
	testl	%eax, %eax
	jle	LBB0_33
## %bb.3:
	movq	8(%r12), %rcx
	movq	_AMD_IP_BLOCK_TYPE_SMC@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(,%rax,8), %rsi
	leaq	(%rsi,%rsi,2), %rsi
	xorl	%ebx, %ebx
	jmp	LBB0_4
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_4 Depth=1
	addq	$24, %rbx
	cmpq	%rbx, %rsi
	je	LBB0_10
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	cmpl	$0, (%rcx,%rbx)
	je	LBB0_9
## %bb.5:                               ##   in Loop: Header=BB0_4 Depth=1
	movq	16(%rcx,%rbx), %rdi
	cmpq	%rdx, (%rdi)
	jne	LBB0_9
## %bb.6:
	movq	8(%rdi), %rax
	movq	%r12, %rdi
	callq	*(%rax)
	testl	%eax, %eax
	je	LBB0_8
## %bb.7:
	movq	8(%r12), %rcx
	movq	16(%rcx,%rbx), %rcx
	movq	8(%rcx), %rcx
	movl	24(%rcx), %esi
	leaq	L_.str(%rip), %rdi
	movl	%eax, %edx
	callq	_DRM_DEBUG
LBB0_8:
	movq	8(%r12), %rax
	movl	$0, (%rax,%rbx)
	movl	(%r12), %eax
LBB0_10:
	testl	%eax, %eax
	jle	LBB0_33
## %bb.11:
	movl	%eax, %ebx
	movq	8(%r12), %rax
	incq	%rbx
	leaq	L_.str(%rip), %r14
	jmp	LBB0_12
	.p2align	4, 0x90
LBB0_15:                                ##   in Loop: Header=BB0_12 Depth=1
	movq	8(%r12), %rax
	movl	$0, (%rax,%r15,8)
LBB0_16:                                ##   in Loop: Header=BB0_12 Depth=1
	decq	%rbx
	cmpq	$1, %rbx
	jbe	LBB0_17
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	leal	-2(%rbx), %ecx
	leaq	(%rcx,%rcx,2), %r15
	cmpl	$0, (%rax,%r15,8)
	je	LBB0_16
## %bb.13:                              ##   in Loop: Header=BB0_12 Depth=1
	movq	16(%rax,%r15,8), %rax
	movq	8(%rax), %rax
	movq	%r12, %rdi
	callq	*(%rax)
	testl	%eax, %eax
	je	LBB0_15
## %bb.14:                              ##   in Loop: Header=BB0_12 Depth=1
	movq	8(%r12), %rcx
	movq	16(%rcx,%r15,8), %rcx
	movq	8(%rcx), %rcx
	movl	24(%rcx), %esi
	movq	%r14, %rdi
	movl	%eax, %edx
	callq	_DRM_DEBUG
	jmp	LBB0_15
LBB0_17:
	movl	(%r12), %ebx
	testl	%ebx, %ebx
	jle	LBB0_33
## %bb.18:
	leaq	16(%r12), %r14
	movq	8(%r12), %rax
	incq	%rbx
	movq	_AMD_IP_BLOCK_TYPE_GMC@GOTPCREL(%rip), %r13
	jmp	LBB0_19
	.p2align	4, 0x90
LBB0_24:                                ##   in Loop: Header=BB0_19 Depth=1
	movq	8(%r12), %rax
	movq	$0, 4(%rax,%r15,8)
LBB0_25:                                ##   in Loop: Header=BB0_19 Depth=1
	decq	%rbx
	cmpq	$1, %rbx
	jbe	LBB0_26
LBB0_19:                                ## =>This Inner Loop Header: Depth=1
	leal	-2(%rbx), %ecx
	leaq	(%rcx,%rcx,2), %r15
	cmpl	$0, 4(%rax,%r15,8)
	je	LBB0_25
## %bb.20:                              ##   in Loop: Header=BB0_19 Depth=1
	movq	16(%rax,%r15,8), %rax
	movq	(%rax), %rcx
	cmpq	(%r13), %rcx
	jne	LBB0_22
## %bb.21:                              ##   in Loop: Header=BB0_19 Depth=1
	movq	%r12, %rdi
	callq	_amdgpu_ucode_free_bo
	movq	%r14, %rdi
	callq	_amdgpu_free_static_csa
	movq	%r12, %rdi
	callq	_amdgpu_device_wb_fini
	movq	%r12, %rdi
	callq	_amdgpu_device_vram_scratch_fini
	movq	%r12, %rdi
	callq	_amdgpu_ib_pool_fini
	movq	8(%r12), %rax
	movq	16(%rax,%r15,8), %rax
LBB0_22:                                ##   in Loop: Header=BB0_19 Depth=1
	movq	8(%rax), %rax
	movq	%r12, %rdi
	callq	*8(%rax)
	testl	%eax, %eax
	je	LBB0_24
## %bb.23:                              ##   in Loop: Header=BB0_19 Depth=1
	movq	8(%r12), %rcx
	movq	16(%rcx,%r15,8), %rcx
	movq	8(%rcx), %rcx
	movl	24(%rcx), %esi
	leaq	L_.str.1(%rip), %rdi
	movl	%eax, %edx
	callq	_DRM_DEBUG
	jmp	LBB0_24
LBB0_26:
	movl	(%r12), %ebx
	testl	%ebx, %ebx
	jle	LBB0_33
## %bb.27:
	movq	8(%r12), %rax
	incq	%rbx
	jmp	LBB0_28
	.p2align	4, 0x90
LBB0_31:                                ##   in Loop: Header=BB0_28 Depth=1
	movl	$0, 12(%rax,%r14,8)
LBB0_32:                                ##   in Loop: Header=BB0_28 Depth=1
	decq	%rbx
	cmpq	$1, %rbx
	jbe	LBB0_33
LBB0_28:                                ## =>This Inner Loop Header: Depth=1
	leal	-2(%rbx), %ecx
	leaq	(%rcx,%rcx,2), %r14
	cmpl	$0, 12(%rax,%r14,8)
	je	LBB0_32
## %bb.29:                              ##   in Loop: Header=BB0_28 Depth=1
	movq	16(%rax,%r14,8), %rcx
	movq	8(%rcx), %rcx
	movq	16(%rcx), %rcx
	testq	%rcx, %rcx
	je	LBB0_31
## %bb.30:                              ##   in Loop: Header=BB0_28 Depth=1
	movq	%r12, %rdi
	callq	*%rcx
	movq	8(%r12), %rax
	jmp	LBB0_31
LBB0_33:
	movq	%r12, %rdi
	callq	_amdgpu_ras_fini
	movq	%r12, %rdi
	callq	_amdgpu_sriov_vf
	testq	%rax, %rax
	je	LBB0_36
## %bb.34:
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_virt_release_full_gpu
	testq	%rax, %rax
	je	LBB0_36
## %bb.35:
	leaq	L_.str.2(%rip), %rdi
	callq	_DRM_ERROR
LBB0_36:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_PG_STATE_UNGATE,4,2        ## @AMD_PG_STATE_UNGATE
	.comm	_AMD_CG_STATE_UNGATE,4,2        ## @AMD_CG_STATE_UNGATE
	.comm	_AMD_IP_BLOCK_TYPE_SMC,8,3      ## @AMD_IP_BLOCK_TYPE_SMC
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"hw_fini of IP block <%s> failed %d\n"

	.comm	_AMD_IP_BLOCK_TYPE_GMC,8,3      ## @AMD_IP_BLOCK_TYPE_GMC
L_.str.1:                               ## @.str.1
	.asciz	"sw_fini of IP block <%s> failed %d\n"

L_.str.2:                               ## @.str.2
	.asciz	"failed to release exclusive mode on fini\n"

	.no_dead_strip	_amdgpu_device_ip_fini
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_device_ip_fini
_amdgpu_device_ip_fini:                 ; @amdgpu_device_ip_fini
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	bl	_amdgpu_ras_pre_fini
	ldr	w8, [x19, #20]
	cmp	w8, #1
	b.le	LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_amdgpu_xgmi_remove_device
LBB0_2:
	mov	x0, x19
	bl	_amdgpu_amdkfd_device_fini
Lloh0:
	adrp	x8, _AMD_PG_STATE_UNGATE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMD_PG_STATE_UNGATE@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_amdgpu_device_set_pg_state
Lloh3:
	adrp	x8, _AMD_CG_STATE_UNGATE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AMD_CG_STATE_UNGATE@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_amdgpu_device_set_cg_state
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_33
; %bb.3:
	mov	x20, #0
	ldr	x9, [x19, #8]
Lloh6:
	adrp	x10, _AMD_IP_BLOCK_TYPE_SMC@GOTPAGE
Lloh7:
	ldr	x10, [x10, _AMD_IP_BLOCK_TYPE_SMC@GOTPAGEOFF]
Lloh8:
	ldr	x10, [x10]
	add	x11, x8, x8, lsl #1
	lsl	x11, x11, #3
	b	LBB0_5
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
	add	x20, x20, #24
	cmp	x11, x20
	b.eq	LBB0_10
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w12, [x9, x20]
	cbz	w12, LBB0_4
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	add	x12, x9, x20
	ldr	x12, [x12, #16]
	ldr	x13, [x12]
	cmp	x13, x10
	b.ne	LBB0_4
; %bb.7:
	ldr	x8, [x12, #8]
	ldr	x8, [x8]
	mov	x0, x19
	blr	x8
	cbz	w0, LBB0_9
; %bb.8:
	mov	x2, x0
	ldr	x8, [x19, #8]
	add	x8, x8, x20
	ldr	x8, [x8, #16]
	ldr	x8, [x8, #8]
	ldr	w1, [x8, #24]
Lloh9:
	adrp	x0, l_.str@PAGE
Lloh10:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
LBB0_9:
	ldr	x8, [x19, #8]
	str	wzr, [x8, x20]
	ldr	w8, [x19]
LBB0_10:
	cmp	w8, #1
	b.lt	LBB0_33
; %bb.11:
	mov	w9, w8
	ldr	x8, [x19, #8]
	add	x21, x9, #1
	mov	w22, #24
Lloh11:
	adrp	x20, l_.str@PAGE
Lloh12:
	add	x20, x20, l_.str@PAGEOFF
	b	LBB0_14
LBB0_12:                                ;   in Loop: Header=BB0_14 Depth=1
	ldr	x8, [x19, #8]
	mul	x9, x23, x22
	str	wzr, [x8, x9]
LBB0_13:                                ;   in Loop: Header=BB0_14 Depth=1
	sub	x21, x21, #1
	cmp	x21, #1
	b.ls	LBB0_17
LBB0_14:                                ; =>This Inner Loop Header: Depth=1
	sub	w23, w21, #2
	umull	x9, w23, w22
	ldr	w9, [x8, x9]
	cbz	w9, LBB0_13
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=1
	madd	x8, x23, x22, x8
	ldr	x8, [x8, #16]
	ldr	x8, [x8, #8]
	ldr	x8, [x8]
	mov	x0, x19
	blr	x8
	cbz	w0, LBB0_12
; %bb.16:                               ;   in Loop: Header=BB0_14 Depth=1
	mov	x2, x0
	ldr	x8, [x19, #8]
	madd	x8, x23, x22, x8
	ldr	x8, [x8, #16]
	ldr	x8, [x8, #8]
	ldr	w1, [x8, #24]
	mov	x0, x20
	bl	_DRM_DEBUG
	b	LBB0_12
LBB0_17:
	ldr	w9, [x19]
	cmp	w9, #1
	b.lt	LBB0_33
; %bb.18:
	add	x20, x19, #16
	ldr	x8, [x19, #8]
	add	x22, x9, #1
	mov	w23, #24
Lloh13:
	adrp	x24, _AMD_IP_BLOCK_TYPE_GMC@GOTPAGE
Lloh14:
	ldr	x24, [x24, _AMD_IP_BLOCK_TYPE_GMC@GOTPAGEOFF]
Lloh15:
	adrp	x21, l_.str.1@PAGE
Lloh16:
	add	x21, x21, l_.str.1@PAGEOFF
	b	LBB0_21
LBB0_19:                                ;   in Loop: Header=BB0_21 Depth=1
	ldr	x8, [x19, #8]
	madd	x9, x25, x23, x8
	stp	wzr, wzr, [x9, #4]
LBB0_20:                                ;   in Loop: Header=BB0_21 Depth=1
	sub	x22, x22, #1
	cmp	x22, #1
	b.ls	LBB0_26
LBB0_21:                                ; =>This Inner Loop Header: Depth=1
	sub	w25, w22, #2
	umaddl	x9, w25, w23, x8
	ldr	w9, [x9, #4]
	cbz	w9, LBB0_20
; %bb.22:                               ;   in Loop: Header=BB0_21 Depth=1
	madd	x8, x25, x23, x8
	ldr	x8, [x8, #16]
	ldr	x9, [x8]
	ldr	x10, [x24]
	cmp	x9, x10
	b.ne	LBB0_24
; %bb.23:                               ;   in Loop: Header=BB0_21 Depth=1
	mov	x0, x19
	bl	_amdgpu_ucode_free_bo
	mov	x0, x20
	bl	_amdgpu_free_static_csa
	mov	x0, x19
	bl	_amdgpu_device_wb_fini
	mov	x0, x19
	bl	_amdgpu_device_vram_scratch_fini
	mov	x0, x19
	bl	_amdgpu_ib_pool_fini
	ldr	x8, [x19, #8]
	madd	x8, x25, x23, x8
	ldr	x8, [x8, #16]
LBB0_24:                                ;   in Loop: Header=BB0_21 Depth=1
	ldr	x8, [x8, #8]
	ldr	x8, [x8, #8]
	mov	x0, x19
	blr	x8
	cbz	w0, LBB0_19
; %bb.25:                               ;   in Loop: Header=BB0_21 Depth=1
	mov	x2, x0
	ldr	x8, [x19, #8]
	madd	x8, x25, x23, x8
	ldr	x8, [x8, #16]
	ldr	x8, [x8, #8]
	ldr	w1, [x8, #24]
	mov	x0, x21
	bl	_DRM_DEBUG
	b	LBB0_19
LBB0_26:
	ldr	w9, [x19]
	cmp	w9, #1
	b.lt	LBB0_33
; %bb.27:
	ldr	x8, [x19, #8]
	add	x20, x9, #1
	mov	w21, #24
	b	LBB0_30
LBB0_28:                                ;   in Loop: Header=BB0_30 Depth=1
	madd	x9, x22, x21, x8
	str	wzr, [x9, #12]
LBB0_29:                                ;   in Loop: Header=BB0_30 Depth=1
	sub	x20, x20, #1
	cmp	x20, #1
	b.ls	LBB0_33
LBB0_30:                                ; =>This Inner Loop Header: Depth=1
	sub	w22, w20, #2
	umaddl	x9, w22, w21, x8
	ldr	w9, [x9, #12]
	cbz	w9, LBB0_29
; %bb.31:                               ;   in Loop: Header=BB0_30 Depth=1
	madd	x9, x22, x21, x8
	ldr	x9, [x9, #16]
	ldr	x9, [x9, #8]
	ldr	x9, [x9, #16]
	cbz	x9, LBB0_28
; %bb.32:                               ;   in Loop: Header=BB0_30 Depth=1
	mov	x0, x19
	blr	x9
	ldr	x8, [x19, #8]
	b	LBB0_28
LBB0_33:
	mov	x0, x19
	bl	_amdgpu_ras_fini
	mov	x0, x19
	bl	_amdgpu_sriov_vf
	cbz	x0, LBB0_36
; %bb.34:
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_virt_release_full_gpu
	cbz	x0, LBB0_36
; %bb.35:
Lloh17:
	adrp	x0, l_.str.2@PAGE
Lloh18:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_ERROR
LBB0_36:
	mov	w0, #0
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpAdd	Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_PG_STATE_UNGATE,4,2        ; @AMD_PG_STATE_UNGATE
	.comm	_AMD_CG_STATE_UNGATE,4,2        ; @AMD_CG_STATE_UNGATE
	.comm	_AMD_IP_BLOCK_TYPE_SMC,8,3      ; @AMD_IP_BLOCK_TYPE_SMC
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"hw_fini of IP block <%s> failed %d\n"

	.comm	_AMD_IP_BLOCK_TYPE_GMC,8,3      ; @AMD_IP_BLOCK_TYPE_GMC
l_.str.1:                               ; @.str.1
	.asciz	"sw_fini of IP block <%s> failed %d\n"

l_.str.2:                               ; @.str.2
	.asciz	"failed to release exclusive mode on fini\n"

	.no_dead_strip	_amdgpu_device_ip_fini
.subsections_via_symbols
