	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vgpu_ips_enabled
_vgpu_ips_enabled:                      ## @vgpu_ips_enabled
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movq	(%rdi), %rax
	movq	(%rax), %rbx
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$9, %eax
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$10, %eax
	jne	LBB0_3
LBB0_2:
	movq	_GEN8_GAMW_ECO_DEV_RW_IA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_vgpu_vreg_t
	movq	_GAMW_ECO_ENABLE_64K_IPS_FIELD@GOTPCREL(%rip), %rcx
	notl	%eax
	testl	%eax, (%rcx)
	sete	%al
	jmp	LBB0_4
LBB0_3:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$11, %eax
	setge	%al
LBB0_4:
	movzbl	%al, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GEN8_GAMW_ECO_DEV_RW_IA,4,2    ## @GEN8_GAMW_ECO_DEV_RW_IA
	.comm	_GAMW_ECO_ENABLE_64K_IPS_FIELD,4,2 ## @GAMW_ECO_ENABLE_64K_IPS_FIELD
	.no_dead_strip	_vgpu_ips_enabled
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vgpu_ips_enabled
_vgpu_ips_enabled:                      ; @vgpu_ips_enabled
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0]
	ldr	x20, [x8]
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #9
	b.eq	LBB0_2
; %bb.1:
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #10
	b.ne	LBB0_3
LBB0_2:
Lloh0:
	adrp	x8, _GEN8_GAMW_ECO_DEV_RW_IA@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GEN8_GAMW_ECO_DEV_RW_IA@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_vgpu_vreg_t
Lloh3:
	adrp	x8, _GAMW_ECO_ENABLE_64K_IPS_FIELD@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GAMW_ECO_ENABLE_64K_IPS_FIELD@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	bics	wzr, w8, w0
	cset	w0, eq
	b	LBB0_4
LBB0_3:
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #10
	cset	w0, gt
LBB0_4:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_GEN8_GAMW_ECO_DEV_RW_IA,4,2    ; @GEN8_GAMW_ECO_DEV_RW_IA
	.comm	_GAMW_ECO_ENABLE_64K_IPS_FIELD,4,2 ; @GAMW_ECO_ENABLE_64K_IPS_FIELD
	.no_dead_strip	_vgpu_ips_enabled
.subsections_via_symbols
