	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx10_kiq_unmap_queues
_gfx10_kiq_unmap_queues:                ## @gfx10_kiq_unmap_queues
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, -48(%rbp)                 ## 4-byte Spill
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movl	%edx, %ebx
	movl	%edx, -52(%rbp)                 ## 4-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %r12
	movq	8(%rsi), %rax
	movq	(%rax), %rax
	movq	_AMDGPU_RING_TYPE_GFX@GOTPCREL(%rip), %rcx
	xorl	%r14d, %r14d
	cmpq	(%rcx), %rax
	sete	%r14b
	shll	$2, %r14d
	movq	_PACKET3_UNMAP_QUEUES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$4, %esi
	callq	_PACKET3
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	%ebx, %edi
	callq	_PACKET3_UNMAP_QUEUES_ACTION
	movl	%eax, %r13d
	xorl	%edi, %edi
	callq	_PACKET3_UNMAP_QUEUES_QUEUE_SEL
	orl	%eax, %r13d
	movl	%r14d, %edi
	callq	_PACKET3_UNMAP_QUEUES_ENGINE_SEL
	movl	%eax, %ebx
	movl	$1, %edi
	callq	_PACKET3_UNMAP_QUEUES_NUM_QUEUES
	orl	%eax, %r13d
	orl	%ebx, %r13d
	movq	%r12, %rdi
	movl	%r13d, %esi
	callq	_amdgpu_ring_write
	movl	(%r15), %edi
	callq	_PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	_PREEMPT_QUEUES_NO_UNMAP@GOTPCREL(%rip), %rax
	movl	-52(%rbp), %ecx                 ## 4-byte Reload
	cmpl	%ecx, (%rax)
	jne	LBB0_2
## %bb.1:
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	movl	%ebx, %edi
	callq	_lower_32_bits
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	%ebx, %edi
	callq	_upper_32_bits
	movl	%eax, %esi
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	jmp	LBB0_3
LBB0_2:
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	xorl	%ebx, %ebx
	xorl	%esi, %esi
LBB0_3:
	movq	%r12, %rdi
	callq	_amdgpu_ring_write
	movq	%r12, %rdi
	movl	%ebx, %esi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_RING_TYPE_GFX,8,3       ## @AMDGPU_RING_TYPE_GFX
	.comm	_PACKET3_UNMAP_QUEUES,4,2       ## @PACKET3_UNMAP_QUEUES
	.comm	_PREEMPT_QUEUES_NO_UNMAP,4,2    ## @PREEMPT_QUEUES_NO_UNMAP
	.no_dead_strip	_gfx10_kiq_unmap_queues
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx10_kiq_unmap_queues
_gfx10_kiq_unmap_queues:                ; @gfx10_kiq_unmap_queues
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x4
	mov	x21, x3
	mov	x22, x2
	mov	x23, x1
	mov	x19, x0
	ldr	x8, [x1, #8]
	ldr	x8, [x8]
Lloh0:
	adrp	x9, _AMDGPU_RING_TYPE_GFX@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMDGPU_RING_TYPE_GFX@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	cset	w8, eq
	lsl	w24, w8, #2
Lloh3:
	adrp	x8, _PACKET3_UNMAP_QUEUES@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PACKET3_UNMAP_QUEUES@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	w1, #4
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x22
	bl	_PACKET3_UNMAP_QUEUES_ACTION
	mov	x25, x0
	mov	w0, #0
	bl	_PACKET3_UNMAP_QUEUES_QUEUE_SEL
	orr	w25, w0, w25
	mov	x0, x24
	bl	_PACKET3_UNMAP_QUEUES_ENGINE_SEL
	orr	w24, w25, w0
	mov	w0, #1
	bl	_PACKET3_UNMAP_QUEUES_NUM_QUEUES
	orr	w1, w24, w0
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w0, [x23]
	bl	_PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
Lloh6:
	adrp	x8, _PREEMPT_QUEUES_NO_UNMAP@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PREEMPT_QUEUES_NO_UNMAP@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	w8, w22
	b.ne	LBB0_2
; %bb.1:
	mov	x0, x21
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x21
	bl	_upper_32_bits
	mov	x1, x0
	b	LBB0_3
LBB0_2:
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	w1, #0
	mov	w20, #0
LBB0_3:
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	x1, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_RING_TYPE_GFX,8,3       ; @AMDGPU_RING_TYPE_GFX
	.comm	_PACKET3_UNMAP_QUEUES,4,2       ; @PACKET3_UNMAP_QUEUES
	.comm	_PREEMPT_QUEUES_NO_UNMAP,4,2    ; @PREEMPT_QUEUES_NO_UNMAP
	.no_dead_strip	_gfx10_kiq_unmap_queues
.subsections_via_symbols
