	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_vgpu_get_stride
_intel_vgpu_get_stride:                 ## @intel_vgpu_get_stride
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
                                        ## kill: def $r8d killed $r8d def $r8
	movq	%r8, -48(%rbp)                  ## 8-byte Spill
	movl	%ecx, %r13d
	movl	%edx, %r15d
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	(%rax), %r14
	movl	%esi, %edi
	callq	_DSPSTRIDE
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_vgpu_vreg_t
	movl	%eax, %r12d
	andl	%r13d, %r12d
	movq	%r14, %rdi
	callq	_INTEL_GEN
	cmpl	$9, %eax
	jl	LBB0_11
## %bb.1:
	leal	-128(%r15), %eax
	cmpl	$3, %eax
	ja	LBB0_9
## %bb.2:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_3:
	movq	-48(%rbp), %rsi                 ## 8-byte Reload
	leal	-8(%rsi), %eax
	roll	$29, %eax
	cmpl	$7, %eax
	ja	LBB0_13
## %bb.4:
	leaq	LJTI0_1(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_6:
	shll	$7, %r12d
	jmp	LBB0_11
LBB0_8:
	shll	$6, %r12d
	jmp	LBB0_11
LBB0_7:
	shll	$9, %r12d
	jmp	LBB0_11
LBB0_9:
	leaq	L_.str.1(%rip), %rdi
	movl	%r15d, %esi
LBB0_10:
	callq	_gvt_dbg_core
LBB0_11:
	movl	%r12d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_13:
	leaq	L_.str(%rip), %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	jmp	LBB0_10
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
LJTI0_0:
	.long	L0_0_set_3
	.long	L0_0_set_6
	.long	L0_0_set_7
	.long	L0_0_set_8
.set L0_1_set_8, LBB0_8-LJTI0_1
.set L0_1_set_6, LBB0_6-LJTI0_1
.set L0_1_set_13, LBB0_13-LJTI0_1
LJTI0_1:
	.long	L0_1_set_8
	.long	L0_1_set_6
	.long	L0_1_set_13
	.long	L0_1_set_6
	.long	L0_1_set_13
	.long	L0_1_set_13
	.long	L0_1_set_13
	.long	L0_1_set_6
	.end_data_region
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"skl: unsupported bpp:%d\n"

L_.str.1:                               ## @.str.1
	.asciz	"skl: unsupported tile format:%x\n"

	.no_dead_strip	_intel_vgpu_get_stride
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_vgpu_get_stride
_intel_vgpu_get_stride:                 ; @intel_vgpu_get_stride
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x4
	mov	x19, x3
	mov	x21, x2
	mov	x22, x0
	ldr	x8, [x0]
	ldr	x23, [x8]
	mov	x0, x1
	bl	_DSPSTRIDE
	mov	x1, x0
	mov	x0, x22
	bl	_vgpu_vreg_t
	and	w19, w0, w19
	mov	x0, x23
	bl	_INTEL_GEN
	cmp	w0, #9
	b.lt	LBB0_10
; %bb.1:
	sub	w8, w21, #128
	cmp	w8, #3
	b.hi	LBB0_8
; %bb.2:
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_3
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_3:
	sub	w8, w20, #8
	ror	w8, w8, #3
	cmp	w8, #7
	b.hi	LBB0_11
; %bb.4:
Lloh2:
	adrp	x9, lJTI0_1@PAGE
Lloh3:
	add	x9, x9, lJTI0_1@PAGEOFF
	adr	x10, LBB0_5
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_5:
	lsl	w19, w19, #7
	b	LBB0_10
LBB0_6:
	lsl	w19, w19, #6
	b	LBB0_10
LBB0_7:
	lsl	w19, w19, #9
	b	LBB0_10
LBB0_8:
Lloh4:
	adrp	x0, l_.str.1@PAGE
Lloh5:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	x1, x21
LBB0_9:
	bl	_gvt_dbg_core
LBB0_10:
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_11:
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x20
	b	LBB0_9
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_5-LBB0_3)>>2
	.byte	(LBB0_7-LBB0_3)>>2
	.byte	(LBB0_6-LBB0_3)>>2
lJTI0_1:
	.byte	(LBB0_6-LBB0_5)>>2
	.byte	(LBB0_5-LBB0_5)>>2
	.byte	(LBB0_11-LBB0_5)>>2
	.byte	(LBB0_5-LBB0_5)>>2
	.byte	(LBB0_11-LBB0_5)>>2
	.byte	(LBB0_11-LBB0_5)>>2
	.byte	(LBB0_11-LBB0_5)>>2
	.byte	(LBB0_5-LBB0_5)>>2
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"skl: unsupported bpp:%d\n"

l_.str.1:                               ; @.str.1
	.asciz	"skl: unsupported tile format:%x\n"

	.no_dead_strip	_intel_vgpu_get_stride
.subsections_via_symbols
