	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vce_v3_0_early_init
_vce_v3_0_early_init:                   ## @vce_v3_0_early_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	callq	_vce_v3_0_get_harvest_config
	movl	%eax, (%rbx)
	movq	_AMDGPU_VCE_HARVEST_VCE0@GOTPCREL(%rip), %rcx
	movq	_AMDGPU_VCE_HARVEST_VCE1@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	notl	%eax
	testl	%eax, %edx
	jne	LBB0_2
## %bb.1:
	movq	_ENOENT@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_3
LBB0_2:
	movl	$3, 4(%rbx)
	movq	%rbx, %rdi
	callq	_vce_v3_0_set_ring_funcs
	movq	%rbx, %rdi
	callq	_vce_v3_0_set_irq_funcs
	xorl	%eax, %eax
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_VCE_HARVEST_VCE0,4,2    ## @AMDGPU_VCE_HARVEST_VCE0
	.comm	_AMDGPU_VCE_HARVEST_VCE1,4,2    ## @AMDGPU_VCE_HARVEST_VCE1
	.comm	_ENOENT,4,2                     ## @ENOENT
	.no_dead_strip	_vce_v3_0_early_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vce_v3_0_early_init
_vce_v3_0_early_init:                   ; @vce_v3_0_early_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_vce_v3_0_get_harvest_config
	str	w0, [x19]
Lloh0:
	adrp	x8, _AMDGPU_VCE_HARVEST_VCE0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_VCE_HARVEST_VCE0@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _AMDGPU_VCE_HARVEST_VCE1@GOTPAGE
Lloh4:
	ldr	x9, [x9, _AMDGPU_VCE_HARVEST_VCE1@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bics	wzr, w8, w0
	b.ne	LBB0_2
; %bb.1:
Lloh6:
	adrp	x8, _ENOENT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ENOENT@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_3
LBB0_2:
	mov	w8, #3
	str	w8, [x19, #4]
	mov	x0, x19
	bl	_vce_v3_0_set_ring_funcs
	mov	x0, x19
	bl	_vce_v3_0_set_irq_funcs
	mov	w0, #0
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_VCE_HARVEST_VCE0,4,2    ; @AMDGPU_VCE_HARVEST_VCE0
	.comm	_AMDGPU_VCE_HARVEST_VCE1,4,2    ; @AMDGPU_VCE_HARVEST_VCE1
	.comm	_ENOENT,4,2                     ; @ENOENT
	.no_dead_strip	_vce_v3_0_early_init
.subsections_via_symbols
