	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mtk_mipi_tx_pll_unprepare
_mtk_mipi_tx_pll_unprepare:             ## @mtk_mipi_tx_pll_unprepare
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	callq	_mtk_mipi_tx_from_clk_hw
	movq	%rax, %rbx
	movl	(%rax), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_dbg
	movq	_MIPITX_DSI_PLL_CON0@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_RG_DSI_MPPLL_PLL_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_mipi_tx_clear_bits
	movq	_MIPITX_DSI_PLL_TOP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RG_DSI_MPPLL_PRESERVE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_mtk_mipi_tx_update_bits
	movq	_MIPITX_DSI_PLL_PWR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RG_DSI_MPPLL_SDM_ISO_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_RG_DSI_MPPLL_SDM_PWR_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	orl	%ecx, %edx
	movq	%rbx, %rdi
	callq	_mtk_mipi_tx_update_bits
	movq	_MIPITX_DSI_TOP_CON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RG_DSI_LNT_HS_BIAS_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_mipi_tx_clear_bits
	movq	_MIPITX_DSI_CON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RG_DSI_CKG_LDOOUT_EN@GOTPCREL(%rip), %rax
	movq	_RG_DSI_LDOCORE_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_mipi_tx_clear_bits
	movq	_MIPITX_DSI_BG_CON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RG_DSI_BG_CKEN@GOTPCREL(%rip), %rax
	movq	_RG_DSI_BG_CORE_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_mipi_tx_clear_bits
	movl	(%r14), %esi
	movq	_RG_DSI_MPPLL_DIV_MSK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_mtk_mipi_tx_clear_bits         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"unprepare\n"

	.comm	_MIPITX_DSI_PLL_CON0,4,2        ## @MIPITX_DSI_PLL_CON0
	.comm	_RG_DSI_MPPLL_PLL_EN,4,2        ## @RG_DSI_MPPLL_PLL_EN
	.comm	_MIPITX_DSI_PLL_TOP,4,2         ## @MIPITX_DSI_PLL_TOP
	.comm	_RG_DSI_MPPLL_PRESERVE,4,2      ## @RG_DSI_MPPLL_PRESERVE
	.comm	_MIPITX_DSI_PLL_PWR,4,2         ## @MIPITX_DSI_PLL_PWR
	.comm	_RG_DSI_MPPLL_SDM_ISO_EN,4,2    ## @RG_DSI_MPPLL_SDM_ISO_EN
	.comm	_RG_DSI_MPPLL_SDM_PWR_ON,4,2    ## @RG_DSI_MPPLL_SDM_PWR_ON
	.comm	_MIPITX_DSI_TOP_CON,4,2         ## @MIPITX_DSI_TOP_CON
	.comm	_RG_DSI_LNT_HS_BIAS_EN,4,2      ## @RG_DSI_LNT_HS_BIAS_EN
	.comm	_MIPITX_DSI_CON,4,2             ## @MIPITX_DSI_CON
	.comm	_RG_DSI_CKG_LDOOUT_EN,4,2       ## @RG_DSI_CKG_LDOOUT_EN
	.comm	_RG_DSI_LDOCORE_EN,4,2          ## @RG_DSI_LDOCORE_EN
	.comm	_MIPITX_DSI_BG_CON,4,2          ## @MIPITX_DSI_BG_CON
	.comm	_RG_DSI_BG_CKEN,4,2             ## @RG_DSI_BG_CKEN
	.comm	_RG_DSI_BG_CORE_EN,4,2          ## @RG_DSI_BG_CORE_EN
	.comm	_RG_DSI_MPPLL_DIV_MSK,4,2       ## @RG_DSI_MPPLL_DIV_MSK
	.no_dead_strip	_mtk_mipi_tx_pll_unprepare
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mtk_mipi_tx_pll_unprepare
_mtk_mipi_tx_pll_unprepare:             ; @mtk_mipi_tx_pll_unprepare
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_mtk_mipi_tx_from_clk_hw
	mov	x19, x0
	ldr	w0, [x0]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_dbg
Lloh2:
	adrp	x20, _MIPITX_DSI_PLL_CON0@GOTPAGE
Lloh3:
	ldr	x20, [x20, _MIPITX_DSI_PLL_CON0@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh4:
	adrp	x8, _RG_DSI_MPPLL_PLL_EN@GOTPAGE
Lloh5:
	ldr	x8, [x8, _RG_DSI_MPPLL_PLL_EN@GOTPAGEOFF]
Lloh6:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_mipi_tx_clear_bits
Lloh7:
	adrp	x8, _MIPITX_DSI_PLL_TOP@GOTPAGE
Lloh8:
	ldr	x8, [x8, _MIPITX_DSI_PLL_TOP@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
Lloh10:
	adrp	x8, _RG_DSI_MPPLL_PRESERVE@GOTPAGE
Lloh11:
	ldr	x8, [x8, _RG_DSI_MPPLL_PRESERVE@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_mtk_mipi_tx_update_bits
Lloh13:
	adrp	x8, _MIPITX_DSI_PLL_PWR@GOTPAGE
Lloh14:
	ldr	x8, [x8, _MIPITX_DSI_PLL_PWR@GOTPAGEOFF]
Lloh15:
	adrp	x9, _RG_DSI_MPPLL_SDM_ISO_EN@GOTPAGE
Lloh16:
	ldr	x9, [x9, _RG_DSI_MPPLL_SDM_ISO_EN@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
Lloh18:
	ldr	w3, [x9]
Lloh19:
	adrp	x8, _RG_DSI_MPPLL_SDM_PWR_ON@GOTPAGE
Lloh20:
	ldr	x8, [x8, _RG_DSI_MPPLL_SDM_PWR_ON@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	orr	w2, w8, w3
	mov	x0, x19
	bl	_mtk_mipi_tx_update_bits
Lloh22:
	adrp	x8, _MIPITX_DSI_TOP_CON@GOTPAGE
Lloh23:
	ldr	x8, [x8, _MIPITX_DSI_TOP_CON@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
Lloh25:
	adrp	x8, _RG_DSI_LNT_HS_BIAS_EN@GOTPAGE
Lloh26:
	ldr	x8, [x8, _RG_DSI_LNT_HS_BIAS_EN@GOTPAGEOFF]
Lloh27:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_mipi_tx_clear_bits
Lloh28:
	adrp	x8, _MIPITX_DSI_CON@GOTPAGE
Lloh29:
	ldr	x8, [x8, _MIPITX_DSI_CON@GOTPAGEOFF]
Lloh30:
	adrp	x9, _RG_DSI_CKG_LDOOUT_EN@GOTPAGE
Lloh31:
	ldr	x9, [x9, _RG_DSI_CKG_LDOOUT_EN@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
Lloh33:
	ldr	w8, [x9]
Lloh34:
	adrp	x9, _RG_DSI_LDOCORE_EN@GOTPAGE
Lloh35:
	ldr	x9, [x9, _RG_DSI_LDOCORE_EN@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_mtk_mipi_tx_clear_bits
Lloh37:
	adrp	x8, _MIPITX_DSI_BG_CON@GOTPAGE
Lloh38:
	ldr	x8, [x8, _MIPITX_DSI_BG_CON@GOTPAGEOFF]
Lloh39:
	adrp	x9, _RG_DSI_BG_CKEN@GOTPAGE
Lloh40:
	ldr	x9, [x9, _RG_DSI_BG_CKEN@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
Lloh42:
	ldr	w8, [x9]
Lloh43:
	adrp	x9, _RG_DSI_BG_CORE_EN@GOTPAGE
Lloh44:
	ldr	x9, [x9, _RG_DSI_BG_CORE_EN@GOTPAGEOFF]
Lloh45:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_mtk_mipi_tx_clear_bits
	ldr	w1, [x20]
Lloh46:
	adrp	x8, _RG_DSI_MPPLL_DIV_MSK@GOTPAGE
Lloh47:
	ldr	x8, [x8, _RG_DSI_MPPLL_DIV_MSK@GOTPAGEOFF]
Lloh48:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_mtk_mipi_tx_clear_bits
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh41
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh32
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh17
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"unprepare\n"

	.comm	_MIPITX_DSI_PLL_CON0,4,2        ; @MIPITX_DSI_PLL_CON0
	.comm	_RG_DSI_MPPLL_PLL_EN,4,2        ; @RG_DSI_MPPLL_PLL_EN
	.comm	_MIPITX_DSI_PLL_TOP,4,2         ; @MIPITX_DSI_PLL_TOP
	.comm	_RG_DSI_MPPLL_PRESERVE,4,2      ; @RG_DSI_MPPLL_PRESERVE
	.comm	_MIPITX_DSI_PLL_PWR,4,2         ; @MIPITX_DSI_PLL_PWR
	.comm	_RG_DSI_MPPLL_SDM_ISO_EN,4,2    ; @RG_DSI_MPPLL_SDM_ISO_EN
	.comm	_RG_DSI_MPPLL_SDM_PWR_ON,4,2    ; @RG_DSI_MPPLL_SDM_PWR_ON
	.comm	_MIPITX_DSI_TOP_CON,4,2         ; @MIPITX_DSI_TOP_CON
	.comm	_RG_DSI_LNT_HS_BIAS_EN,4,2      ; @RG_DSI_LNT_HS_BIAS_EN
	.comm	_MIPITX_DSI_CON,4,2             ; @MIPITX_DSI_CON
	.comm	_RG_DSI_CKG_LDOOUT_EN,4,2       ; @RG_DSI_CKG_LDOOUT_EN
	.comm	_RG_DSI_LDOCORE_EN,4,2          ; @RG_DSI_LDOCORE_EN
	.comm	_MIPITX_DSI_BG_CON,4,2          ; @MIPITX_DSI_BG_CON
	.comm	_RG_DSI_BG_CKEN,4,2             ; @RG_DSI_BG_CKEN
	.comm	_RG_DSI_BG_CORE_EN,4,2          ; @RG_DSI_BG_CORE_EN
	.comm	_RG_DSI_MPPLL_DIV_MSK,4,2       ; @RG_DSI_MPPLL_DIV_MSK
	.no_dead_strip	_mtk_mipi_tx_pll_unprepare
.subsections_via_symbols
