	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_vm_bo_update            ## -- Begin function radeon_vm_bo_update
	.p2align	4, 0x90
_radeon_vm_bo_update:                   ## @radeon_vm_bo_update
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	32(%rsi), %r15
	cmpl	$0, 8(%rsi)
	je	LBB0_1
## %bb.2:
	movq	%rdx, %r13
	movq	%rdi, -64(%rbp)                 ## 8-byte Spill
	leaq	8(%r15), %r12
	movq	%r12, %rdi
	callq	_spin_lock
	leaq	24(%r14), %rbx
	testq	%r13, %r13
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	je	LBB0_6
## %bb.3:
	callq	_list_empty
	testq	%rax, %rax
	je	LBB0_5
## %bb.4:
	movq	%r12, %rdi
	callq	_spin_unlock
	xorl	%ebx, %ebx
	jmp	LBB0_38
LBB0_1:
	movl	8(%rdi), %edi
	movq	16(%r14), %rdx
	leaq	L_.str(%rip), %rsi
	movq	%r15, %rcx
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_25
LBB0_6:
	callq	_list_del
	leaq	12(%r15), %rsi
	movq	%rbx, %rdi
	callq	_list_add
	jmp	LBB0_7
LBB0_5:
	movq	%rbx, %rdi
	callq	_list_del_init
LBB0_7:
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	movq	%r12, %rdi
	callq	_spin_unlock
	movq	_RADEON_VM_PAGE_VALID@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	(%r14), %eax
	movl	%eax, (%r14)
	movq	_RADEON_VM_PAGE_SYSTEM@GOTPCREL(%rip), %r12
	movl	(%r12), %ecx
	notl	%ecx
	andl	%eax, %ecx
	movl	%ecx, (%r14)
	movq	_RADEON_VM_PAGE_SNOOPED@GOTPCREL(%rip), %rbx
	movl	(%rbx), %eax
	notl	%eax
	andl	%ecx, %eax
	movl	%eax, (%r14)
	movq	16(%r14), %rax
	testq	%rax, %rax
	je	LBB0_10
## %bb.8:
	movl	4(%rax), %edi
	callq	_radeon_ttm_tt_is_readonly
	testq	%rax, %rax
	je	LBB0_10
## %bb.9:
	movq	_RADEON_VM_PAGE_WRITEABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, (%r14)
LBB0_10:
	testq	%r13, %r13
	je	LBB0_11
## %bb.12:
	movq	%r12, %rdx
	movq	%rbx, %rdi
	movl	8(%r13), %r12d
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r12d
	movq	(%r13), %rax
	movq	_TTM_PL_SYSTEM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_14
## %bb.13:
	movq	_RADEON_VM_PAGE_VALID@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, (%r14)
LBB0_14:
	movq	_TTM_PL_TT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_17
## %bb.15:
	movl	(%r14), %eax
	orl	(%rdx), %eax
	movl	%eax, (%r14)
	movq	16(%r14), %rcx
	movq	_RADEON_GEM_GTT_WC@GOTPCREL(%rip), %rdx
	movq	_RADEON_GEM_GTT_UC@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	orl	(%rdx), %esi
	testl	%esi, (%rcx)
	jne	LBB0_18
## %bb.16:
	orl	(%rdi), %eax
	movl	%eax, (%r14)
	jmp	LBB0_18
LBB0_11:
	xorl	%r12d, %r12d
	jmp	LBB0_18
LBB0_17:
	addl	(%r15), %r12d
LBB0_18:
	movq	%r14, %rdi
	callq	_trace_radeon_vm_bo_update
	movl	12(%r14), %r13d
	subl	8(%r14), %r13d
	incl	%r13d
	movq	_radeon_vm_block_size@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$11, %esi
	callq	_min
	movl	%r13d, %ebx
	movl	%eax, %ecx
	shrl	%cl, %ebx
	incl	%ebx
	movl	(%r14), %edi
	callq	_radeon_vm_page_flags
	movq	_R600_PTE_GART_MASK@GOTPCREL(%rip), %rcx
	movl	%eax, %edx
	notl	%edx
	testl	%edx, (%rcx)
	jne	LBB0_20
## %bb.19:
	leal	(,%rbx,8), %r13d
	subl	%ebx, %r13d
	addl	$64, %r13d
	cmpl	$1048576, %r13d                 ## imm = 0x100000
	jae	LBB0_24
	jmp	LBB0_26
LBB0_20:
	movq	_R600_PTE_SYSTEM@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_22
## %bb.21:
	shll	$2, %ebx
	leal	(%rbx,%r13,2), %r13d
	addl	$64, %r13d
	cmpl	$1048576, %r13d                 ## imm = 0x100000
	jb	LBB0_26
LBB0_24:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
LBB0_25:
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_38:
	movl	%ebx, %eax
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_22:
	leal	(%rbx,%rbx,4), %eax
	leal	(%rax,%rax), %r13d
	addl	$84, %r13d
	cmpl	$1048576, %r13d                 ## imm = 0x100000
	jae	LBB0_24
LBB0_26:
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leal	(,%r13,4), %r8d
	leaq	-88(%rbp), %rdx
	movq	%r15, %rdi
	xorl	%ecx, %ecx
	callq	_radeon_ib_get
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_38
## %bb.27:
	movl	$0, -88(%rbp)
	movl	(%r14), %edi
	movq	_RADEON_VM_PAGE_VALID@GOTPCREL(%rip), %rax
	testl	%edi, (%rax)
	jne	LBB0_32
## %bb.28:
	movq	_RADEON_NUM_RINGS@GOTPCREL(%rip), %rcx
	cmpl	$0, (%rcx)
	je	LBB0_32
## %bb.29:
	movq	%r13, -96(%rbp)                 ## 8-byte Spill
	movl	%r12d, -44(%rbp)                ## 4-byte Spill
	leaq	-72(%rbp), %rbx
	xorl	%r15d, %r15d
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	.p2align	4, 0x90
LBB0_30:                                ## =>This Inner Loop Header: Depth=1
	movq	(%r12), %rax
	movl	(%rax,%r15,4), %esi
	movq	%rbx, %rdi
	movq	%rcx, %r13
	callq	_radeon_sync_fence
	movq	%r13, %rcx
	incq	%r15
	movl	(%r13), %eax
	cmpq	%rax, %r15
	jb	LBB0_30
## %bb.31:
	movl	(%r14), %edi
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	movl	-44(%rbp), %r12d                ## 4-byte Reload
	movq	-96(%rbp), %r13                 ## 8-byte Reload
LBB0_32:
	movl	8(%r14), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	12(%r14), %ebx
	incl	%ebx
	callq	_radeon_vm_page_flags
	movl	%eax, (%rsp)
	leaq	-88(%rbp), %rdx
	movq	%r15, %rdi
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	movl	%ebx, %r8d
	movl	%r12d, %r9d
	callq	_radeon_vm_update_ptes
	testl	%eax, %eax
	je	LBB0_34
## %bb.33:
	movl	%eax, %ebx
LBB0_37:
	leaq	-88(%rbp), %rsi
	movq	%r15, %rdi
	callq	_radeon_ib_free
	jmp	LBB0_38
LBB0_34:
	leaq	-88(%rbp), %r12
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_radeon_asic_vm_pad_ib
	xorl	%edi, %edi
	cmpl	%r13d, -88(%rbp)
	seta	%dil
	callq	_WARN_ON
	xorl	%ebx, %ebx
	movq	%r15, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_radeon_ib_schedule
	testl	%eax, %eax
	je	LBB0_36
## %bb.35:
	movl	%eax, %r12d
	leaq	-88(%rbp), %rsi
	movq	%r15, %rdi
	callq	_radeon_ib_free
	movl	%r12d, %ebx
	jmp	LBB0_38
LBB0_36:
	movq	-80(%rbp), %rcx
	movl	$1, (%rcx)
	movl	8(%r14), %esi
	movl	12(%r14), %edx
	incl	%edx
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	_radeon_vm_fence_pts
	leaq	4(%r14), %rdi
	callq	_radeon_fence_unref
	movq	-80(%rbp), %rdi
	callq	_radeon_fence_ref
	movl	%eax, 4(%r14)
	jmp	LBB0_37
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"bo %p don't has a mapping in vm %p\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_RADEON_VM_PAGE_VALID,4,2       ## @RADEON_VM_PAGE_VALID
	.comm	_RADEON_VM_PAGE_SYSTEM,4,2      ## @RADEON_VM_PAGE_SYSTEM
	.comm	_RADEON_VM_PAGE_SNOOPED,4,2     ## @RADEON_VM_PAGE_SNOOPED
	.comm	_RADEON_VM_PAGE_WRITEABLE,4,2   ## @RADEON_VM_PAGE_WRITEABLE
	.comm	_PAGE_SHIFT,4,2                 ## @PAGE_SHIFT
	.comm	_TTM_PL_SYSTEM,8,3              ## @TTM_PL_SYSTEM
	.comm	_TTM_PL_TT,8,3                  ## @TTM_PL_TT
	.comm	_RADEON_GEM_GTT_WC,4,2          ## @RADEON_GEM_GTT_WC
	.comm	_RADEON_GEM_GTT_UC,4,2          ## @RADEON_GEM_GTT_UC
	.comm	_radeon_vm_block_size,4,2       ## @radeon_vm_block_size
	.comm	_R600_PTE_GART_MASK,4,2         ## @R600_PTE_GART_MASK
	.comm	_R600_PTE_SYSTEM,4,2            ## @R600_PTE_SYSTEM
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_R600_RING_TYPE_DMA_INDEX,4,2   ## @R600_RING_TYPE_DMA_INDEX
	.comm	_RADEON_NUM_RINGS,4,2           ## @RADEON_NUM_RINGS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_vm_bo_update            ; -- Begin function radeon_vm_bo_update
	.p2align	2
_radeon_vm_bo_update:                   ; @radeon_vm_bo_update
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x1
	mov	x19, x0
	ldr	x21, [x1, #32]
	ldr	w8, [x1, #8]
	cbz	w8, LBB0_4
; %bb.1:
	mov	x22, x2
	add	x23, x21, #8
	mov	x0, x23
	bl	_spin_lock
	add	x24, x20, #24
	mov	x0, x24
	cbz	x22, LBB0_5
; %bb.2:
	bl	_list_empty
	cbz	x0, LBB0_6
; %bb.3:
	mov	x0, x23
	bl	_spin_unlock
	mov	w23, #0
	b	LBB0_30
LBB0_4:
	ldr	w0, [x19, #8]
	ldr	x2, [x20, #16]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	mov	x3, x21
	bl	_dev_err
Lloh2:
	adrp	x8, _EINVAL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_29
LBB0_5:
	bl	_list_del
	add	x1, x21, #12
	mov	x0, x24
	bl	_list_add
	b	LBB0_7
LBB0_6:
	mov	x0, x24
	bl	_list_del_init
LBB0_7:
	mov	x0, x23
	bl	_spin_unlock
Lloh4:
	adrp	x24, _RADEON_VM_PAGE_VALID@GOTPAGE
Lloh5:
	ldr	x24, [x24, _RADEON_VM_PAGE_VALID@GOTPAGEOFF]
	ldr	w8, [x24]
	ldr	w9, [x20]
	bic	w8, w9, w8
	str	w8, [x20]
Lloh6:
	adrp	x25, _RADEON_VM_PAGE_SYSTEM@GOTPAGE
Lloh7:
	ldr	x25, [x25, _RADEON_VM_PAGE_SYSTEM@GOTPAGEOFF]
	ldr	w9, [x25]
	bic	w8, w8, w9
	str	w8, [x20]
Lloh8:
	adrp	x23, _RADEON_VM_PAGE_SNOOPED@GOTPAGE
Lloh9:
	ldr	x23, [x23, _RADEON_VM_PAGE_SNOOPED@GOTPAGEOFF]
	ldr	w9, [x23]
	bic	w8, w8, w9
	str	w8, [x20]
	ldr	x8, [x20, #16]
	cbz	x8, LBB0_10
; %bb.8:
	ldr	w0, [x8, #4]
	bl	_radeon_ttm_tt_is_readonly
	cbz	x0, LBB0_10
; %bb.9:
Lloh10:
	adrp	x8, _RADEON_VM_PAGE_WRITEABLE@GOTPAGE
Lloh11:
	ldr	x8, [x8, _RADEON_VM_PAGE_WRITEABLE@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	ldr	w9, [x20]
	bic	w8, w9, w8
	str	w8, [x20]
LBB0_10:
	cbz	x22, LBB0_17
; %bb.11:
	ldr	w8, [x22, #8]
Lloh13:
	adrp	x9, _PAGE_SHIFT@GOTPAGE
Lloh14:
	ldr	x9, [x9, _PAGE_SHIFT@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	ldr	x10, [x22]
Lloh16:
	adrp	x11, _TTM_PL_SYSTEM@GOTPAGE
Lloh17:
	ldr	x11, [x11, _TTM_PL_SYSTEM@GOTPAGEOFF]
Lloh18:
	ldr	x11, [x11]
	cmp	x10, x11
	b.eq	LBB0_13
; %bb.12:
	ldr	w11, [x24]
	ldr	w12, [x20]
	orr	w11, w12, w11
	str	w11, [x20]
LBB0_13:
	lsl	w22, w8, w9
Lloh19:
	adrp	x8, _TTM_PL_TT@GOTPAGE
Lloh20:
	ldr	x8, [x8, _TTM_PL_TT@GOTPAGEOFF]
Lloh21:
	ldr	x8, [x8]
	cmp	x10, x8
	b.ne	LBB0_16
; %bb.14:
	ldr	w8, [x25]
	ldr	w9, [x20]
	orr	w8, w9, w8
	str	w8, [x20]
	ldr	x9, [x20, #16]
	ldr	w9, [x9]
Lloh22:
	adrp	x10, _RADEON_GEM_GTT_WC@GOTPAGE
Lloh23:
	ldr	x10, [x10, _RADEON_GEM_GTT_WC@GOTPAGEOFF]
Lloh24:
	ldr	w10, [x10]
Lloh25:
	adrp	x11, _RADEON_GEM_GTT_UC@GOTPAGE
Lloh26:
	ldr	x11, [x11, _RADEON_GEM_GTT_UC@GOTPAGEOFF]
Lloh27:
	ldr	w11, [x11]
	orr	w10, w11, w10
	tst	w10, w9
	b.ne	LBB0_17
; %bb.15:
	ldr	w9, [x23]
	orr	w8, w9, w8
	str	w8, [x20]
	b	LBB0_17
LBB0_16:
	ldr	w8, [x19]
	add	w22, w22, w8
LBB0_17:
	mov	x0, x20
	bl	_trace_radeon_vm_bo_update
	ldp	w9, w8, [x20, #8]
	sub	w8, w8, w9
	add	w23, w8, #1
Lloh28:
	adrp	x8, _radeon_vm_block_size@GOTPAGE
Lloh29:
	ldr	x8, [x8, _radeon_vm_block_size@GOTPAGEOFF]
Lloh30:
	ldr	w0, [x8]
	mov	w1, #11
	bl	_min
	lsr	w8, w23, w0
	add	w25, w8, #1
	ldr	w0, [x20]
	bl	_radeon_vm_page_flags
Lloh31:
	adrp	x8, _R600_PTE_GART_MASK@GOTPAGE
Lloh32:
	ldr	x8, [x8, _R600_PTE_GART_MASK@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
	bics	wzr, w8, w0
	b.ne	LBB0_27
; %bb.18:
	lsl	w8, w25, #3
	sub	w8, w8, w25
	add	w25, w8, #64
	cmp	w25, #256, lsl #12              ; =1048576
	b.hs	LBB0_28
LBB0_19:
Lloh34:
	adrp	x8, _R600_RING_TYPE_DMA_INDEX@GOTPAGE
Lloh35:
	ldr	x8, [x8, _R600_RING_TYPE_DMA_INDEX@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	lsl	w4, w25, #2
	add	x2, sp, #8
	mov	x0, x19
	mov	x3, #0
	bl	_radeon_ib_get
	mov	x23, x0
	cbnz	w0, LBB0_30
; %bb.20:
	str	wzr, [sp, #8]
	ldr	w0, [x20]
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_25
; %bb.21:
Lloh37:
	adrp	x24, _RADEON_NUM_RINGS@GOTPAGE
Lloh38:
	ldr	x24, [x24, _RADEON_NUM_RINGS@GOTPAGEOFF]
	ldr	w8, [x24]
	cbz	w8, LBB0_25
; %bb.22:
	mov	x26, #0
	add	x8, sp, #8
	add	x23, x8, #16
LBB0_23:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x21]
	ldr	w1, [x8, x26, lsl #2]
	mov	x0, x23
	bl	_radeon_sync_fence
	add	x26, x26, #1
	ldr	w8, [x24]
	cmp	x26, x8
	b.lo	LBB0_23
; %bb.24:
	ldr	w0, [x20]
LBB0_25:
	ldp	w23, w8, [x20, #8]
	add	w24, w8, #1
	bl	_radeon_vm_page_flags
	mov	x6, x0
	add	x2, sp, #8
	mov	x0, x19
	mov	x1, x21
	mov	x3, x23
	mov	x4, x24
	mov	x5, x22
	bl	_radeon_vm_update_ptes
	cbz	w0, LBB0_31
; %bb.26:
	mov	x23, x0
	b	LBB0_33
LBB0_27:
Lloh39:
	adrp	x8, _R600_PTE_SYSTEM@GOTPAGE
Lloh40:
	ldr	x8, [x8, _R600_PTE_SYSTEM@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	tst	w8, w0
	mov	w8, #10
	mul	w8, w25, w8
	add	w8, w8, #84
	lsl	w9, w23, #1
	add	w9, w9, w25, lsl #2
	add	w9, w9, #64
	csel	w25, w8, w9, eq
	cmp	w25, #256, lsl #12              ; =1048576
	b.lo	LBB0_19
LBB0_28:
Lloh42:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh43:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
LBB0_29:
	ldr	w8, [x8]
	neg	w23, w8
LBB0_30:
	mov	x0, x23
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_31:
	add	x1, sp, #8
	mov	x0, x19
	bl	_radeon_asic_vm_pad_ib
	ldr	w8, [sp, #8]
	cmp	w8, w25
	cset	w0, hi
	bl	_WARN_ON
	add	x1, sp, #8
	mov	x0, x19
	mov	x2, #0
	mov	w3, #0
	bl	_radeon_ib_schedule
	mov	x23, x0
	cbnz	w0, LBB0_33
; %bb.32:
	ldr	x3, [sp, #16]
	mov	w8, #1
	str	w8, [x3]
	ldp	w1, w8, [x20, #8]
	add	w2, w8, #1
	mov	x0, x21
	bl	_radeon_vm_fence_pts
	add	x0, x20, #4
	bl	_radeon_fence_unref
	ldr	x0, [sp, #16]
	bl	_radeon_fence_ref
	str	w0, [x20, #4]
LBB0_33:
	add	x1, sp, #8
	mov	x0, x19
	bl	_radeon_ib_free
	b	LBB0_30
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh42, Lloh43
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"bo %p don't has a mapping in vm %p\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_RADEON_VM_PAGE_VALID,4,2       ; @RADEON_VM_PAGE_VALID
	.comm	_RADEON_VM_PAGE_SYSTEM,4,2      ; @RADEON_VM_PAGE_SYSTEM
	.comm	_RADEON_VM_PAGE_SNOOPED,4,2     ; @RADEON_VM_PAGE_SNOOPED
	.comm	_RADEON_VM_PAGE_WRITEABLE,4,2   ; @RADEON_VM_PAGE_WRITEABLE
	.comm	_PAGE_SHIFT,4,2                 ; @PAGE_SHIFT
	.comm	_TTM_PL_SYSTEM,8,3              ; @TTM_PL_SYSTEM
	.comm	_TTM_PL_TT,8,3                  ; @TTM_PL_TT
	.comm	_RADEON_GEM_GTT_WC,4,2          ; @RADEON_GEM_GTT_WC
	.comm	_RADEON_GEM_GTT_UC,4,2          ; @RADEON_GEM_GTT_UC
	.comm	_radeon_vm_block_size,4,2       ; @radeon_vm_block_size
	.comm	_R600_PTE_GART_MASK,4,2         ; @R600_PTE_GART_MASK
	.comm	_R600_PTE_SYSTEM,4,2            ; @R600_PTE_SYSTEM
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_R600_RING_TYPE_DMA_INDEX,4,2   ; @R600_RING_TYPE_DMA_INDEX
	.comm	_RADEON_NUM_RINGS,4,2           ; @RADEON_NUM_RINGS
.subsections_via_symbols
