	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cik_enable_bif_mgls
_cik_enable_bif_mgls:                   ## @cik_enable_bif_mgls
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r14
	movq	_PCIE_CNTL2@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	_RREG32_PCIE_PORT
	testl	%ebx, %ebx
	je	LBB0_3
## %bb.1:
	movq	_RADEON_CG_SUPPORT_BIF_LS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%r14)
	je	LBB0_3
## %bb.2:
	movq	_SLV_MEM_LS_EN@GOTPCREL(%rip), %rcx
	movq	_MST_MEM_LS_EN@GOTPCREL(%rip), %rdx
	movq	_REPLAY_MEM_LS_EN@GOTPCREL(%rip), %rdi
	movq	_SLV_MEM_AGGRESSIVE_LS_EN@GOTPCREL(%rip), %rbx
	movl	(%rcx), %esi
	orl	%eax, %esi
	orl	(%rdx), %esi
	orl	(%rdi), %esi
	orl	(%rbx), %esi
	cmpl	%esi, %eax
	je	LBB0_5
LBB0_6:
	movl	(%r15), %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32_PCIE_PORT               ## TAILCALL
LBB0_3:
	movq	_SLV_MEM_LS_EN@GOTPCREL(%rip), %rcx
	movq	_MST_MEM_LS_EN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	orl	(%rcx), %esi
	movq	_REPLAY_MEM_LS_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movq	_SLV_MEM_AGGRESSIVE_LS_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	cmpl	%esi, %eax
	jne	LBB0_6
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_CNTL2,4,2                 ## @PCIE_CNTL2
	.comm	_RADEON_CG_SUPPORT_BIF_LS,4,2   ## @RADEON_CG_SUPPORT_BIF_LS
	.comm	_SLV_MEM_LS_EN,4,2              ## @SLV_MEM_LS_EN
	.comm	_MST_MEM_LS_EN,4,2              ## @MST_MEM_LS_EN
	.comm	_REPLAY_MEM_LS_EN,4,2           ## @REPLAY_MEM_LS_EN
	.comm	_SLV_MEM_AGGRESSIVE_LS_EN,4,2   ## @SLV_MEM_AGGRESSIVE_LS_EN
	.no_dead_strip	_cik_enable_bif_mgls
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cik_enable_bif_mgls
_cik_enable_bif_mgls:                   ; @cik_enable_bif_mgls
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x21, _PCIE_CNTL2@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PCIE_CNTL2@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_RREG32_PCIE_PORT
	cbz	w20, LBB0_4
; %bb.1:
	ldr	w8, [x19]
Lloh2:
	adrp	x9, _RADEON_CG_SUPPORT_BIF_LS@GOTPAGE
Lloh3:
	ldr	x9, [x9, _RADEON_CG_SUPPORT_BIF_LS@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.2:
Lloh5:
	adrp	x8, _SLV_MEM_LS_EN@GOTPAGE
Lloh6:
	ldr	x8, [x8, _SLV_MEM_LS_EN@GOTPAGEOFF]
Lloh7:
	adrp	x9, _MST_MEM_LS_EN@GOTPAGE
Lloh8:
	ldr	x9, [x9, _MST_MEM_LS_EN@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
Lloh10:
	ldr	w9, [x9]
Lloh11:
	adrp	x10, _REPLAY_MEM_LS_EN@GOTPAGE
Lloh12:
	ldr	x10, [x10, _REPLAY_MEM_LS_EN@GOTPAGEOFF]
Lloh13:
	adrp	x11, _SLV_MEM_AGGRESSIVE_LS_EN@GOTPAGE
Lloh14:
	ldr	x11, [x11, _SLV_MEM_AGGRESSIVE_LS_EN@GOTPAGEOFF]
Lloh15:
	ldr	w10, [x10]
Lloh16:
	ldr	w11, [x11]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w1, w8, w11
	cmp	w0, w1
	b.eq	LBB0_5
LBB0_3:
	ldr	w0, [x21]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32_PCIE_PORT
LBB0_4:
Lloh17:
	adrp	x8, _SLV_MEM_LS_EN@GOTPAGE
Lloh18:
	ldr	x8, [x8, _SLV_MEM_LS_EN@GOTPAGEOFF]
Lloh19:
	adrp	x9, _MST_MEM_LS_EN@GOTPAGE
Lloh20:
	ldr	x9, [x9, _MST_MEM_LS_EN@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh23:
	adrp	x9, _REPLAY_MEM_LS_EN@GOTPAGE
Lloh24:
	ldr	x9, [x9, _REPLAY_MEM_LS_EN@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh26:
	adrp	x9, _SLV_MEM_AGGRESSIVE_LS_EN@GOTPAGE
Lloh27:
	ldr	x9, [x9, _SLV_MEM_AGGRESSIVE_LS_EN@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	orr	w8, w8, w9
	bic	w1, w0, w8
	cmp	w0, w1
	b.ne	LBB0_3
LBB0_5:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh15
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh9
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_CNTL2,4,2                 ; @PCIE_CNTL2
	.comm	_RADEON_CG_SUPPORT_BIF_LS,4,2   ; @RADEON_CG_SUPPORT_BIF_LS
	.comm	_SLV_MEM_LS_EN,4,2              ; @SLV_MEM_LS_EN
	.comm	_MST_MEM_LS_EN,4,2              ; @MST_MEM_LS_EN
	.comm	_REPLAY_MEM_LS_EN,4,2           ; @REPLAY_MEM_LS_EN
	.comm	_SLV_MEM_AGGRESSIVE_LS_EN,4,2   ; @SLV_MEM_AGGRESSIVE_LS_EN
	.no_dead_strip	_cik_enable_bif_mgls
.subsections_via_symbols
