	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_nv04_fifo_dma_fini             ## -- Begin function nv04_fifo_dma_fini
	.p2align	4, 0x90
_nv04_fifo_dma_fini:                    ## @nv04_fifo_dma_fini
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_nv04_fifo_chan
	movq	%rax, %r15
	movq	8(%rax), %rcx
	movq	8(%rcx), %r14
	movq	(%r14), %rax
	movq	(%rax), %rbx
	movl	(%rcx), %r13d
	decl	%r13d
	movl	(%r15), %r12d
	movq	%rcx, -56(%rbp)                 ## 8-byte Spill
	leaq	4(%rcx), %rdi
	movq	%rdi, -64(%rbp)                 ## 8-byte Spill
	callq	_spin_lock_irqsave
	movq	_NV03_PFIFO_CACHES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_nvkm_wr32
	movq	_NV03_PFIFO_CACHE1_PUSH1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_nvkm_rd32
	movl	%r13d, -44(%rbp)                ## 4-byte Spill
	andl	%r13d, %eax
	movq	_NV03_PFIFO_CACHES@GOTPCREL(%rip), %r13
	movq	%r15, -80(%rbp)                 ## 8-byte Spill
	movl	4(%r15), %ecx
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	cmpl	%ecx, %eax
	jne	LBB0_6
## %bb.1:
	movq	_NV04_PFIFO_CACHE1_DMA_PUSH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_nvkm_mask
	movq	_NV03_PFIFO_CACHE1_PUSH0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_nvkm_wr32
	movq	_NV04_PFIFO_CACHE1_PULL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_nvkm_mask
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	16(%rax), %r15
	movq	%rbx, %rdi
	callq	_nvkm_kmap
	movq	(%r15), %rcx
	addq	$32, %r15
	movq	%r14, -72(%rbp)                 ## 8-byte Spill
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	$-1, %r14
                                        ## kill: def $cl killed $cl killed $rcx
	shlq	%cl, %r14
	notq	%r14
	movzbl	-24(%r15), %ecx
	movzbl	-16(%r15), %eax
	movq	%r14, %r13
	shlq	%cl, %r13
	movl	%eax, %ecx
	shlq	%cl, %r14
	movl	-4(%r15), %esi
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_nvkm_rd32
	andl	%eax, %r13d
	movzbl	-24(%r15), %ecx
	sarl	%cl, %r13d
	movl	-8(%r15), %esi
	addl	%r12d, %esi
	movq	%rbx, %rdi
	callq	_nvkm_ro32
	notl	%r14d
	andl	%eax, %r14d
	movl	-8(%r15), %esi
	addl	%r12d, %esi
	movzbl	-16(%r15), %ecx
	shll	%cl, %r13d
	orl	%r14d, %r13d
	movq	%rbx, %rdi
	movl	%r13d, %edx
	callq	_nvkm_wo32
	movq	(%r15), %rcx
	addq	$32, %r15
	testq	%rcx, %rcx
	jne	LBB0_2
## %bb.3:
	movq	%rbx, %rdi
	callq	_nvkm_done
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	16(%rax), %rbx
	addq	$32, %rbx
	movq	-72(%rbp), %r14                 ## 8-byte Reload
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movl	-4(%rbx), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_nvkm_wr32
	cmpq	$0, (%rbx)
	leaq	32(%rbx), %rbx
	jne	LBB0_4
## %bb.5:
	movq	_NV03_PFIFO_CACHE1_GET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_nvkm_wr32
	movq	_NV03_PFIFO_CACHE1_PUT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_nvkm_wr32
	movq	_NV03_PFIFO_CACHE1_PUSH1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	callq	_nvkm_wr32
	movq	_NV03_PFIFO_CACHE1_PUSH0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_nvkm_wr32
	movq	_NV04_PFIFO_CACHE1_PULL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_nvkm_wr32
	movq	-80(%rbp), %rax                 ## 8-byte Reload
	movl	4(%rax), %ecx
	movq	-64(%rbp), %r15                 ## 8-byte Reload
	movq	_NV03_PFIFO_CACHES@GOTPCREL(%rip), %r13
LBB0_6:
	movq	_NV04_PFIFO_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	callq	_nvkm_mask
	movl	(%r13), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_nvkm_wr32
	movq	%r15, %rdi
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_spin_unlock_irqrestore         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_NV03_PFIFO_CACHES,4,2          ## @NV03_PFIFO_CACHES
	.comm	_NV03_PFIFO_CACHE1_PUSH1,4,2    ## @NV03_PFIFO_CACHE1_PUSH1
	.comm	_NV04_PFIFO_CACHE1_DMA_PUSH,4,2 ## @NV04_PFIFO_CACHE1_DMA_PUSH
	.comm	_NV03_PFIFO_CACHE1_PUSH0,4,2    ## @NV03_PFIFO_CACHE1_PUSH0
	.comm	_NV04_PFIFO_CACHE1_PULL0,4,2    ## @NV04_PFIFO_CACHE1_PULL0
	.comm	_NV03_PFIFO_CACHE1_GET,4,2      ## @NV03_PFIFO_CACHE1_GET
	.comm	_NV03_PFIFO_CACHE1_PUT,4,2      ## @NV03_PFIFO_CACHE1_PUT
	.comm	_NV04_PFIFO_MODE,4,2            ## @NV04_PFIFO_MODE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_nv04_fifo_dma_fini             ; -- Begin function nv04_fifo_dma_fini
	.p2align	2
_nv04_fifo_dma_fini:                    ; @nv04_fifo_dma_fini
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	bl	_nv04_fifo_chan
	mov	x21, x0
	ldr	x26, [x0, #8]
	ldr	x19, [x26, #8]
	ldr	x8, [x19]
	ldr	x23, [x8]
	ldr	w8, [x26]
	sub	w24, w8, #1
	ldr	w27, [x0]
	add	x20, x26, #4
	mov	x0, x20
	bl	_spin_lock_irqsave
Lloh0:
	adrp	x22, _NV03_PFIFO_CACHES@GOTPAGE
Lloh1:
	ldr	x22, [x22, _NV03_PFIFO_CACHES@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #0
	bl	_nvkm_wr32
Lloh2:
	adrp	x8, _NV03_PFIFO_CACHE1_PUSH1@GOTPAGE
Lloh3:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_PUSH1@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_nvkm_rd32
	and	w9, w0, w24
	ldr	w8, [x21, #4]
	cmp	w9, w8
	b.ne	LBB0_6
; %bb.1:
	str	w24, [sp, #12]                  ; 4-byte Folded Spill
Lloh5:
	adrp	x8, _NV04_PFIFO_CACHE1_DMA_PUSH@GOTPAGE
Lloh6:
	ldr	x8, [x8, _NV04_PFIFO_CACHE1_DMA_PUSH@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	mov	w3, #0
	bl	_nvkm_mask
Lloh8:
	adrp	x8, _NV03_PFIFO_CACHE1_PUSH0@GOTPAGE
Lloh9:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_PUSH0@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_nvkm_wr32
Lloh11:
	adrp	x8, _NV04_PFIFO_CACHE1_PULL0@GOTPAGE
Lloh12:
	ldr	x8, [x8, _NV04_PFIFO_CACHE1_PULL0@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	mov	w3, #0
	bl	_nvkm_mask
	ldr	x28, [x26, #16]
	mov	x0, x23
	bl	_nvkm_kmap
	ldr	x8, [x28], #16
	mov	x24, #-1
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	lsl	x8, x24, x8
	mvn	x8, x8
	ldur	x9, [x28, #-8]
	lsl	x25, x8, x9
	ldr	x9, [x28]
	lsl	x22, x8, x9
	ldr	w1, [x28, #12]
	mov	x0, x19
	bl	_nvkm_rd32
	and	w8, w0, w25
	ldur	w9, [x28, #-8]
	asr	w25, w8, w9
	ldr	w8, [x28, #8]
	add	w1, w8, w27
	mov	x0, x23
	bl	_nvkm_ro32
	bic	w8, w0, w22
	ldr	w9, [x28, #8]
	add	w1, w9, w27
	ldr	w9, [x28]
	lsl	w9, w25, w9
	orr	w2, w9, w8
	mov	x0, x23
	bl	_nvkm_wo32
	ldr	x8, [x28, #16]
	add	x28, x28, #32
	cbnz	x8, LBB0_2
; %bb.3:
	mov	x0, x23
	bl	_nvkm_done
	ldr	x8, [x26, #16]
	add	x23, x8, #32
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldur	w1, [x23, #-4]
	mov	x0, x19
	mov	w2, #0
	bl	_nvkm_wr32
	ldr	x8, [x23], #32
	cbnz	x8, LBB0_4
; %bb.5:
Lloh14:
	adrp	x8, _NV03_PFIFO_CACHE1_GET@GOTPAGE
Lloh15:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_GET@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_nvkm_wr32
Lloh17:
	adrp	x8, _NV03_PFIFO_CACHE1_PUT@GOTPAGE
Lloh18:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_PUT@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_nvkm_wr32
Lloh20:
	adrp	x8, _NV03_PFIFO_CACHE1_PUSH1@GOTPAGE
Lloh21:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_PUSH1@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x19
	ldr	w2, [sp, #12]                   ; 4-byte Folded Reload
	bl	_nvkm_wr32
Lloh23:
	adrp	x8, _NV03_PFIFO_CACHE1_PUSH0@GOTPAGE
Lloh24:
	ldr	x8, [x8, _NV03_PFIFO_CACHE1_PUSH0@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	bl	_nvkm_wr32
Lloh26:
	adrp	x8, _NV04_PFIFO_CACHE1_PULL0@GOTPAGE
Lloh27:
	ldr	x8, [x8, _NV04_PFIFO_CACHE1_PULL0@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	bl	_nvkm_wr32
	ldr	w8, [x21, #4]
Lloh29:
	adrp	x22, _NV03_PFIFO_CACHES@GOTPAGE
Lloh30:
	ldr	x22, [x22, _NV03_PFIFO_CACHES@GOTPAGEOFF]
LBB0_6:
Lloh31:
	adrp	x9, _NV04_PFIFO_MODE@GOTPAGE
Lloh32:
	ldr	x9, [x9, _NV04_PFIFO_MODE@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x9]
	mov	w9, #1
	lsl	w2, w9, w8
	mov	x0, x19
	mov	w3, #0
	bl	_nvkm_mask
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #1
	bl	_nvkm_wr32
	mov	x0, x20
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_spin_unlock_irqrestore
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.cfi_endproc
                                        ; -- End function
	.comm	_NV03_PFIFO_CACHES,4,2          ; @NV03_PFIFO_CACHES
	.comm	_NV03_PFIFO_CACHE1_PUSH1,4,2    ; @NV03_PFIFO_CACHE1_PUSH1
	.comm	_NV04_PFIFO_CACHE1_DMA_PUSH,4,2 ; @NV04_PFIFO_CACHE1_DMA_PUSH
	.comm	_NV03_PFIFO_CACHE1_PUSH0,4,2    ; @NV03_PFIFO_CACHE1_PUSH0
	.comm	_NV04_PFIFO_CACHE1_PULL0,4,2    ; @NV04_PFIFO_CACHE1_PULL0
	.comm	_NV03_PFIFO_CACHE1_GET,4,2      ; @NV03_PFIFO_CACHE1_GET
	.comm	_NV03_PFIFO_CACHE1_PUT,4,2      ; @NV03_PFIFO_CACHE1_PUT
	.comm	_NV04_PFIFO_MODE,4,2            ; @NV04_PFIFO_MODE
.subsections_via_symbols
