	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bmc150_accel_chip_init
_bmc150_accel_chip_init:                ## @bmc150_accel_chip_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movl	4(%rdi), %edi
	callq	_regmap_get_device
	movq	%rax, %r14
	movl	4(%r15), %edi
	movq	_BMC150_ACCEL_REG_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BMC150_ACCEL_RESET_VAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_regmap_write
	movl	$1800, %edi                     ## imm = 0x708
	movl	$2500, %esi                     ## imm = 0x9C4
	callq	_usleep_range
	movl	4(%r15), %edi
	movq	_BMC150_ACCEL_REG_CHIP_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	callq	_regmap_read
	testl	%eax, %eax
	js	LBB0_12
## %bb.1:
	movl	-44(%rbp), %edx
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_dbg
	movq	_bmc150_accel_chip_info_tbl@GOTPCREL(%rip), %r12
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	jle	LBB0_5
## %bb.2:
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r12), %rdi
	movl	(%rdi,%r13), %eax
	cmpl	-44(%rbp), %eax
	je	LBB0_14
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	incq	%rbx
	callq	_ARRAY_SIZE
	cltq
	addq	$4, %r13
	cmpq	%rax, %rbx
	jl	LBB0_3
LBB0_5:
	cmpq	$0, 16(%r15)
	je	LBB0_15
LBB0_6:
	movq	_BMC150_ACCEL_SLEEP_MODE_NORMAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_bmc150_accel_set_mode
	testl	%eax, %eax
	js	LBB0_19
## %bb.7:
	movq	_BMC150_ACCEL_DEF_BW@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_bmc150_accel_set_bw
	testl	%eax, %eax
	js	LBB0_19
## %bb.8:
	movl	4(%r15), %edi
	movq	_BMC150_ACCEL_REG_PMU_RANGE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BMC150_ACCEL_DEF_RANGE_4G@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	callq	_regmap_write
	testl	%eax, %eax
	js	LBB0_18
## %bb.9:
	movl	(%r12), %eax
	movl	%eax, (%r15)
	movq	_BMC150_ACCEL_DEF_SLOPE_THRESHOLD@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%r15)
	movq	_BMC150_ACCEL_DEF_SLOPE_DURATION@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%r15)
	movq	%r15, %rdi
	callq	_bmc150_accel_update_slope
	testl	%eax, %eax
	js	LBB0_19
## %bb.10:
	movl	4(%r15), %edi
	movq	_BMC150_ACCEL_REG_INT_RST_LATCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BMC150_ACCEL_INT_MODE_LATCH_INT@GOTPCREL(%rip), %rax
	movq	_BMC150_ACCEL_INT_MODE_LATCH_RESET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	callq	_regmap_write
	xorl	%ebx, %ebx
	testl	%eax, %eax
	jns	LBB0_20
## %bb.11:
	movl	%eax, %r15d
	leaq	L_.str.4(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movl	%r15d, %ebx
	jmp	LBB0_20
LBB0_12:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rsi
LBB0_13:
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_20
LBB0_19:
	movl	%eax, %ebx
	jmp	LBB0_20
LBB0_14:
	addq	%r13, %rdi
	movq	%rdi, 16(%r15)
	cmpq	$0, 16(%r15)
	jne	LBB0_6
LBB0_15:
	movl	-44(%rbp), %edx
	leaq	L_.str.2(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movq	_ENODEV@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
LBB0_20:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_18:
	movl	%eax, %ebx
	leaq	L_.str.3(%rip), %rsi
	jmp	LBB0_13
	.cfi_endproc
                                        ## -- End function
	.comm	_BMC150_ACCEL_REG_RESET,4,2     ## @BMC150_ACCEL_REG_RESET
	.comm	_BMC150_ACCEL_RESET_VAL,4,2     ## @BMC150_ACCEL_RESET_VAL
	.comm	_BMC150_ACCEL_REG_CHIP_ID,4,2   ## @BMC150_ACCEL_REG_CHIP_ID
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Error: Reading chip id\n"

L_.str.1:                               ## @.str.1
	.asciz	"Chip Id %x\n"

	.comm	_bmc150_accel_chip_info_tbl,8,3 ## @bmc150_accel_chip_info_tbl
L_.str.2:                               ## @.str.2
	.asciz	"Invalid chip %x\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_BMC150_ACCEL_SLEEP_MODE_NORMAL,4,2 ## @BMC150_ACCEL_SLEEP_MODE_NORMAL
	.comm	_BMC150_ACCEL_DEF_BW,4,2        ## @BMC150_ACCEL_DEF_BW
	.comm	_BMC150_ACCEL_REG_PMU_RANGE,4,2 ## @BMC150_ACCEL_REG_PMU_RANGE
	.comm	_BMC150_ACCEL_DEF_RANGE_4G,4,2  ## @BMC150_ACCEL_DEF_RANGE_4G
L_.str.3:                               ## @.str.3
	.asciz	"Error writing reg_pmu_range\n"

	.comm	_BMC150_ACCEL_DEF_SLOPE_THRESHOLD,4,2 ## @BMC150_ACCEL_DEF_SLOPE_THRESHOLD
	.comm	_BMC150_ACCEL_DEF_SLOPE_DURATION,4,2 ## @BMC150_ACCEL_DEF_SLOPE_DURATION
	.comm	_BMC150_ACCEL_REG_INT_RST_LATCH,4,2 ## @BMC150_ACCEL_REG_INT_RST_LATCH
	.comm	_BMC150_ACCEL_INT_MODE_LATCH_INT,4,2 ## @BMC150_ACCEL_INT_MODE_LATCH_INT
	.comm	_BMC150_ACCEL_INT_MODE_LATCH_RESET,4,2 ## @BMC150_ACCEL_INT_MODE_LATCH_RESET
L_.str.4:                               ## @.str.4
	.asciz	"Error writing reg_int_rst_latch\n"

	.no_dead_strip	_bmc150_accel_chip_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bmc150_accel_chip_init
_bmc150_accel_chip_init:                ; @bmc150_accel_chip_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x0
	ldr	w0, [x0, #4]
	bl	_regmap_get_device
	mov	x19, x0
	ldr	w0, [x20, #4]
Lloh0:
	adrp	x8, _BMC150_ACCEL_REG_RESET@GOTPAGE
Lloh1:
	ldr	x8, [x8, _BMC150_ACCEL_REG_RESET@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _BMC150_ACCEL_RESET_VAL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _BMC150_ACCEL_RESET_VAL@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	bl	_regmap_write
	mov	w0, #1800
	mov	w1, #2500
	bl	_usleep_range
	ldr	w0, [x20, #4]
Lloh6:
	adrp	x8, _BMC150_ACCEL_REG_CHIP_ID@GOTPAGE
Lloh7:
	ldr	x8, [x8, _BMC150_ACCEL_REG_CHIP_ID@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	add	x2, sp, #12
	bl	_regmap_read
	tbnz	w0, #31, LBB0_12
; %bb.1:
	ldr	w2, [sp, #12]
Lloh9:
	adrp	x1, l_.str.1@PAGE
Lloh10:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_dev_dbg
Lloh11:
	adrp	x21, _bmc150_accel_chip_info_tbl@GOTPAGE
Lloh12:
	ldr	x21, [x21, _bmc150_accel_chip_info_tbl@GOTPAGEOFF]
	ldr	x0, [x21]
	bl	_ARRAY_SIZE
	cmp	w0, #1
	b.lt	LBB0_5
; %bb.2:
	mov	x22, #0
	mov	x23, #0
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x0, [x21]
	ldr	w8, [x0, x22]
	ldr	w9, [sp, #12]
	cmp	w8, w9
	b.eq	LBB0_15
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	add	x23, x23, #1
	bl	_ARRAY_SIZE
	add	x22, x22, #4
	cmp	x23, w0, sxtw
	b.lt	LBB0_3
LBB0_5:
	ldr	x8, [x20, #16]
	cbz	x8, LBB0_16
LBB0_6:
Lloh13:
	adrp	x8, _BMC150_ACCEL_SLEEP_MODE_NORMAL@GOTPAGE
Lloh14:
	ldr	x8, [x8, _BMC150_ACCEL_SLEEP_MODE_NORMAL@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_bmc150_accel_set_mode
	tbnz	w0, #31, LBB0_14
; %bb.7:
Lloh16:
	adrp	x8, _BMC150_ACCEL_DEF_BW@GOTPAGE
Lloh17:
	ldr	x8, [x8, _BMC150_ACCEL_DEF_BW@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_bmc150_accel_set_bw
	tbnz	w0, #31, LBB0_14
; %bb.8:
	ldr	w0, [x20, #4]
Lloh19:
	adrp	x8, _BMC150_ACCEL_REG_PMU_RANGE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _BMC150_ACCEL_REG_PMU_RANGE@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
Lloh22:
	adrp	x22, _BMC150_ACCEL_DEF_RANGE_4G@GOTPAGE
Lloh23:
	ldr	x22, [x22, _BMC150_ACCEL_DEF_RANGE_4G@GOTPAGEOFF]
	ldr	w2, [x22]
	bl	_regmap_write
	tbnz	w0, #31, LBB0_18
; %bb.9:
	ldr	w8, [x22]
	str	w8, [x20]
Lloh24:
	adrp	x8, _BMC150_ACCEL_DEF_SLOPE_THRESHOLD@GOTPAGE
Lloh25:
	ldr	x8, [x8, _BMC150_ACCEL_DEF_SLOPE_THRESHOLD@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
Lloh27:
	adrp	x9, _BMC150_ACCEL_DEF_SLOPE_DURATION@GOTPAGE
Lloh28:
	ldr	x9, [x9, _BMC150_ACCEL_DEF_SLOPE_DURATION@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	stp	w9, w8, [x20, #8]
	mov	x0, x20
	bl	_bmc150_accel_update_slope
	tbnz	w0, #31, LBB0_14
; %bb.10:
	ldr	w0, [x20, #4]
Lloh30:
	adrp	x8, _BMC150_ACCEL_REG_INT_RST_LATCH@GOTPAGE
Lloh31:
	ldr	x8, [x8, _BMC150_ACCEL_REG_INT_RST_LATCH@GOTPAGEOFF]
Lloh32:
	adrp	x9, _BMC150_ACCEL_INT_MODE_LATCH_INT@GOTPAGE
Lloh33:
	ldr	x9, [x9, _BMC150_ACCEL_INT_MODE_LATCH_INT@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
Lloh35:
	ldr	w8, [x9]
Lloh36:
	adrp	x9, _BMC150_ACCEL_INT_MODE_LATCH_RESET@GOTPAGE
Lloh37:
	ldr	x9, [x9, _BMC150_ACCEL_INT_MODE_LATCH_RESET@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	orr	w2, w9, w8
	bl	_regmap_write
	tbnz	w0, #31, LBB0_19
; %bb.11:
	mov	w21, #0
	b	LBB0_17
LBB0_12:
	mov	x21, x0
Lloh39:
	adrp	x1, l_.str@PAGE
Lloh40:
	add	x1, x1, l_.str@PAGEOFF
LBB0_13:
	mov	x0, x19
	bl	_dev_err
	b	LBB0_17
LBB0_14:
	mov	x21, x0
	b	LBB0_17
LBB0_15:
	add	x8, x0, x22
	str	x8, [x20, #16]
	ldr	x8, [x20, #16]
	cbnz	x8, LBB0_6
LBB0_16:
	ldr	w8, [sp, #12]
	str	x8, [sp]
Lloh41:
	adrp	x1, l_.str.2@PAGE
Lloh42:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_dev_err
Lloh43:
	adrp	x8, _ENODEV@GOTPAGE
Lloh44:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_17:
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_18:
	mov	x21, x0
Lloh46:
	adrp	x1, l_.str.3@PAGE
Lloh47:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_13
LBB0_19:
	mov	x21, x0
Lloh48:
	adrp	x1, l_.str.4@PAGE
Lloh49:
	add	x1, x1, l_.str.4@PAGEOFF
	b	LBB0_13
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh34
	.loh AdrpAdd	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpAdd	Lloh48, Lloh49
	.cfi_endproc
                                        ; -- End function
	.comm	_BMC150_ACCEL_REG_RESET,4,2     ; @BMC150_ACCEL_REG_RESET
	.comm	_BMC150_ACCEL_RESET_VAL,4,2     ; @BMC150_ACCEL_RESET_VAL
	.comm	_BMC150_ACCEL_REG_CHIP_ID,4,2   ; @BMC150_ACCEL_REG_CHIP_ID
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Error: Reading chip id\n"

l_.str.1:                               ; @.str.1
	.asciz	"Chip Id %x\n"

	.comm	_bmc150_accel_chip_info_tbl,8,3 ; @bmc150_accel_chip_info_tbl
l_.str.2:                               ; @.str.2
	.asciz	"Invalid chip %x\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_BMC150_ACCEL_SLEEP_MODE_NORMAL,4,2 ; @BMC150_ACCEL_SLEEP_MODE_NORMAL
	.comm	_BMC150_ACCEL_DEF_BW,4,2        ; @BMC150_ACCEL_DEF_BW
	.comm	_BMC150_ACCEL_REG_PMU_RANGE,4,2 ; @BMC150_ACCEL_REG_PMU_RANGE
	.comm	_BMC150_ACCEL_DEF_RANGE_4G,4,2  ; @BMC150_ACCEL_DEF_RANGE_4G
l_.str.3:                               ; @.str.3
	.asciz	"Error writing reg_pmu_range\n"

	.comm	_BMC150_ACCEL_DEF_SLOPE_THRESHOLD,4,2 ; @BMC150_ACCEL_DEF_SLOPE_THRESHOLD
	.comm	_BMC150_ACCEL_DEF_SLOPE_DURATION,4,2 ; @BMC150_ACCEL_DEF_SLOPE_DURATION
	.comm	_BMC150_ACCEL_REG_INT_RST_LATCH,4,2 ; @BMC150_ACCEL_REG_INT_RST_LATCH
	.comm	_BMC150_ACCEL_INT_MODE_LATCH_INT,4,2 ; @BMC150_ACCEL_INT_MODE_LATCH_INT
	.comm	_BMC150_ACCEL_INT_MODE_LATCH_RESET,4,2 ; @BMC150_ACCEL_INT_MODE_LATCH_RESET
l_.str.4:                               ; @.str.4
	.asciz	"Error writing reg_int_rst_latch\n"

	.no_dead_strip	_bmc150_accel_chip_init
.subsections_via_symbols
