	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function _dpu_hw_setup_scaler3_de
__dpu_hw_setup_scaler3_de:              ## @_dpu_hw_setup_scaler3_de
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$0, 64(%rsi)
	je	LBB0_1
## %bb.2:
	movl	%edx, %r8d
	movl	$511, %eax                      ## imm = 0x1FF
	andl	(%rsi), %eax
	movl	4(%rsi), %edx
	movl	8(%rsi), %ecx
	shll	$16, %edx
	andl	$33488896, %edx                 ## imm = 0x1FF0000
	orl	%eax, %edx
	andl	$15, %ecx
	shll	$9, %ecx
	movl	12(%rsi), %eax
	shll	$13, %eax
	movzwl	%ax, %eax
	orl	%ecx, %eax
	movl	16(%rsi), %ecx
	andl	$7, %ecx
	shll	$16, %ecx
	orl	%eax, %ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movzbl	20(%rsi), %eax
	movl	24(%rsi), %ecx
	shll	$16, %ecx
	andl	$67043328, %ecx                 ## imm = 0x3FF0000
	orl	%eax, %ecx
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	movl	$1023, %r9d                     ## imm = 0x3FF
	movl	28(%rsi), %ecx
	andl	%r9d, %ecx
	movl	32(%rsi), %eax
	shll	$16, %eax
	andl	$67043328, %eax                 ## imm = 0x3FF0000
	orl	%ecx, %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	40(%rsi), %rcx
	movl	(%rcx), %eax
	andl	%r9d, %eax
	movl	4(%rcx), %ebx
	movl	8(%rcx), %r14d
	shll	$10, %ebx
	andl	$1047552, %ebx                  ## imm = 0xFFC00
	orl	%eax, %ebx
	shll	$20, %r14d
	andl	$1072693248, %r14d              ## imm = 0x3FF00000
	orl	%ebx, %r14d
	movq	48(%rsi), %rcx
	movl	(%rcx), %eax
	andl	%r9d, %eax
	movl	4(%rcx), %ebx
	movl	8(%rcx), %r15d
	shll	$10, %ebx
	andl	$1047552, %ebx                  ## imm = 0xFFC00
	orl	%eax, %ebx
	shll	$20, %r15d
	andl	$1072693248, %r15d              ## imm = 0x3FF00000
	movq	56(%rsi), %rcx
	andl	(%rcx), %r9d
	orl	%ebx, %r15d
	movl	4(%rcx), %esi
	movl	8(%rcx), %r12d
	shll	$10, %esi
	andl	$1047552, %esi                  ## imm = 0xFFC00
	orl	%r9d, %esi
	shll	$20, %r12d
	andl	$1072693248, %r12d              ## imm = 0x3FF00000
	orl	%esi, %r12d
	movq	_QSEED3_DE_SHARPEN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	%r8d, %esi
	movl	%r8d, %ebx
	movq	%rdi, %r13
	callq	_DPU_REG_WRITE
	movq	_QSEED3_DE_SHARPEN_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	%ebx, %esi
	movq	%r13, %rdi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	callq	_DPU_REG_WRITE
	movq	_QSEED3_DE_SHAPE_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	%ebx, %esi
	movq	%r13, %rdi
	movl	-52(%rbp), %edx                 ## 4-byte Reload
	callq	_DPU_REG_WRITE
	movq	_QSEED3_DE_THRESHOLD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	%ebx, %esi
	movq	%r13, %rdi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	callq	_DPU_REG_WRITE
	movq	_QSEED3_DE_ADJUST_DATA_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	%ebx, %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_DPU_REG_WRITE
	movq	_QSEED3_DE_ADJUST_DATA_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	%ebx, %esi
	movq	%r13, %rdi
	movl	%r15d, %edx
	callq	_DPU_REG_WRITE
	movq	_QSEED3_DE_ADJUST_DATA_2@GOTPCREL(%rip), %rax
	addl	(%rax), %ebx
	movq	%r13, %rdi
	movl	%ebx, %esi
	movl	%r12d, %edx
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DPU_REG_WRITE                  ## TAILCALL
LBB0_1:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_QSEED3_DE_SHARPEN,4,2          ## @QSEED3_DE_SHARPEN
	.comm	_QSEED3_DE_SHARPEN_CTL,4,2      ## @QSEED3_DE_SHARPEN_CTL
	.comm	_QSEED3_DE_SHAPE_CTL,4,2        ## @QSEED3_DE_SHAPE_CTL
	.comm	_QSEED3_DE_THRESHOLD,4,2        ## @QSEED3_DE_THRESHOLD
	.comm	_QSEED3_DE_ADJUST_DATA_0,4,2    ## @QSEED3_DE_ADJUST_DATA_0
	.comm	_QSEED3_DE_ADJUST_DATA_1,4,2    ## @QSEED3_DE_ADJUST_DATA_1
	.comm	_QSEED3_DE_ADJUST_DATA_2,4,2    ## @QSEED3_DE_ADJUST_DATA_2
	.no_dead_strip	__dpu_hw_setup_scaler3_de
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function _dpu_hw_setup_scaler3_de
__dpu_hw_setup_scaler3_de:              ; @_dpu_hw_setup_scaler3_de
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	ldr	w8, [x1, #64]
	cbz	w8, LBB0_2
; %bb.1:
	mov	x19, x2
	mov	x20, x0
	ldp	w8, w9, [x1]
	and	w2, w8, #0x1ff
	bfi	w2, w9, #16, #9
	ldp	w8, w9, [x1, #8]
	ubfiz	w26, w8, #9, #4
	bfi	w26, w9, #13, #3
	ldr	w8, [x1, #16]
	bfi	w26, w8, #16, #3
	ldrb	w24, [x1, #20]
	ldp	w8, w9, [x1, #24]
	bfi	w24, w8, #16, #10
	and	w23, w9, #0x3ff
	ldr	w8, [x1, #32]
	bfi	w23, w8, #16, #10
	ldp	x8, x9, [x1, #40]
	ldp	w10, w11, [x8]
	and	w25, w10, #0x3ff
	bfi	w25, w11, #10, #10
	ldr	w8, [x8, #8]
	bfi	w25, w8, #20, #10
	ldp	w8, w10, [x9]
	and	w21, w8, #0x3ff
	bfi	w21, w10, #10, #10
	ldr	w8, [x9, #8]
	bfi	w21, w8, #20, #10
	ldr	x8, [x1, #56]
	ldp	w9, w10, [x8]
	and	w22, w9, #0x3ff
	bfi	w22, w10, #10, #10
	ldr	w8, [x8, #8]
	bfi	w22, w8, #20, #10
Lloh0:
	adrp	x8, _QSEED3_DE_SHARPEN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _QSEED3_DE_SHARPEN@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	add	w1, w8, w19
	bl	_DPU_REG_WRITE
Lloh3:
	adrp	x8, _QSEED3_DE_SHARPEN_CTL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _QSEED3_DE_SHARPEN_CTL@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	add	w1, w8, w19
	mov	x0, x20
	mov	x2, x26
	bl	_DPU_REG_WRITE
Lloh6:
	adrp	x8, _QSEED3_DE_SHAPE_CTL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _QSEED3_DE_SHAPE_CTL@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	add	w1, w8, w19
	mov	x0, x20
	mov	x2, x24
	bl	_DPU_REG_WRITE
Lloh9:
	adrp	x8, _QSEED3_DE_THRESHOLD@GOTPAGE
Lloh10:
	ldr	x8, [x8, _QSEED3_DE_THRESHOLD@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	add	w1, w8, w19
	mov	x0, x20
	mov	x2, x23
	bl	_DPU_REG_WRITE
Lloh12:
	adrp	x8, _QSEED3_DE_ADJUST_DATA_0@GOTPAGE
Lloh13:
	ldr	x8, [x8, _QSEED3_DE_ADJUST_DATA_0@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	add	w1, w8, w19
	mov	x0, x20
	mov	x2, x25
	bl	_DPU_REG_WRITE
Lloh15:
	adrp	x8, _QSEED3_DE_ADJUST_DATA_1@GOTPAGE
Lloh16:
	ldr	x8, [x8, _QSEED3_DE_ADJUST_DATA_1@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	add	w1, w8, w19
	mov	x0, x20
	mov	x2, x21
	bl	_DPU_REG_WRITE
Lloh18:
	adrp	x8, _QSEED3_DE_ADJUST_DATA_2@GOTPAGE
Lloh19:
	ldr	x8, [x8, _QSEED3_DE_ADJUST_DATA_2@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	add	w1, w8, w19
	mov	x0, x20
	mov	x2, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_DPU_REG_WRITE
LBB0_2:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_QSEED3_DE_SHARPEN,4,2          ; @QSEED3_DE_SHARPEN
	.comm	_QSEED3_DE_SHARPEN_CTL,4,2      ; @QSEED3_DE_SHARPEN_CTL
	.comm	_QSEED3_DE_SHAPE_CTL,4,2        ; @QSEED3_DE_SHAPE_CTL
	.comm	_QSEED3_DE_THRESHOLD,4,2        ; @QSEED3_DE_THRESHOLD
	.comm	_QSEED3_DE_ADJUST_DATA_0,4,2    ; @QSEED3_DE_ADJUST_DATA_0
	.comm	_QSEED3_DE_ADJUST_DATA_1,4,2    ; @QSEED3_DE_ADJUST_DATA_1
	.comm	_QSEED3_DE_ADJUST_DATA_2,4,2    ; @QSEED3_DE_ADJUST_DATA_2
	.no_dead_strip	__dpu_hw_setup_scaler3_de
.subsections_via_symbols
