	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_mipi_power_up
_tegra_mipi_power_up:                   ## @tegra_mipi_power_up
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movl	(%rdi), %edi
	callq	_clk_enable
	testl	%eax, %eax
	js	LBB0_1
## %bb.2:
	movq	_MIPI_CAL_BIAS_PAD_CFG0@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_tegra_mipi_readl
	movq	_MIPI_CAL_BIAS_PAD_PDVCLAMP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	andl	%eax, %ecx
	movq	8(%rbx), %rax
	xorl	%r14d, %r14d
	cmpq	$0, (%rax)
	movl	$0, %esi
	je	LBB0_4
## %bb.3:
	movq	_MIPI_CAL_BIAS_PAD_E_VCLAMP_REF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_4:
	orl	%ecx, %esi
	movl	(%r15), %edx
	movq	%rbx, %rdi
	callq	_tegra_mipi_writel
	movq	_MIPI_CAL_BIAS_PAD_CFG2@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_tegra_mipi_readl
	movq	_MIPI_CAL_BIAS_PAD_PDVREG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r15), %edx
	movq	%rbx, %rdi
	callq	_tegra_mipi_writel
	movl	(%rbx), %edi
	callq	_clk_disable
	jmp	LBB0_5
LBB0_1:
	movl	%eax, %r14d
LBB0_5:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MIPI_CAL_BIAS_PAD_CFG0,4,2     ## @MIPI_CAL_BIAS_PAD_CFG0
	.comm	_MIPI_CAL_BIAS_PAD_PDVCLAMP,4,2 ## @MIPI_CAL_BIAS_PAD_PDVCLAMP
	.comm	_MIPI_CAL_BIAS_PAD_E_VCLAMP_REF,4,2 ## @MIPI_CAL_BIAS_PAD_E_VCLAMP_REF
	.comm	_MIPI_CAL_BIAS_PAD_CFG2,4,2     ## @MIPI_CAL_BIAS_PAD_CFG2
	.comm	_MIPI_CAL_BIAS_PAD_PDVREG,4,2   ## @MIPI_CAL_BIAS_PAD_PDVREG
	.no_dead_strip	_tegra_mipi_power_up
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_mipi_power_up
_tegra_mipi_power_up:                   ; @tegra_mipi_power_up
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w0, [x0]
	bl	_clk_enable
	tbnz	w0, #31, LBB0_2
; %bb.1:
Lloh0:
	adrp	x20, _MIPI_CAL_BIAS_PAD_CFG0@GOTPAGE
Lloh1:
	ldr	x20, [x20, _MIPI_CAL_BIAS_PAD_CFG0@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_tegra_mipi_readl
Lloh2:
	adrp	x8, _MIPI_CAL_BIAS_PAD_PDVCLAMP@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MIPI_CAL_BIAS_PAD_PDVCLAMP@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	x9, [x19, #8]
Lloh5:
	adrp	x10, _MIPI_CAL_BIAS_PAD_E_VCLAMP_REF@GOTPAGE
Lloh6:
	ldr	x10, [x10, _MIPI_CAL_BIAS_PAD_E_VCLAMP_REF@GOTPAGEOFF]
	ldr	x9, [x9]
Lloh7:
	ldr	w10, [x10]
	cmp	x9, #0
	csel	w9, wzr, w10, eq
	orr	w1, w9, w8
	ldr	w2, [x20]
	mov	x0, x19
	bl	_tegra_mipi_writel
Lloh8:
	adrp	x20, _MIPI_CAL_BIAS_PAD_CFG2@GOTPAGE
Lloh9:
	ldr	x20, [x20, _MIPI_CAL_BIAS_PAD_CFG2@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_tegra_mipi_readl
Lloh10:
	adrp	x8, _MIPI_CAL_BIAS_PAD_PDVREG@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MIPI_CAL_BIAS_PAD_PDVREG@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w2, [x20]
	mov	x0, x19
	bl	_tegra_mipi_writel
	ldr	w0, [x19]
	bl	_clk_disable
	mov	w0, #0
LBB0_2:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MIPI_CAL_BIAS_PAD_CFG0,4,2     ; @MIPI_CAL_BIAS_PAD_CFG0
	.comm	_MIPI_CAL_BIAS_PAD_PDVCLAMP,4,2 ; @MIPI_CAL_BIAS_PAD_PDVCLAMP
	.comm	_MIPI_CAL_BIAS_PAD_E_VCLAMP_REF,4,2 ; @MIPI_CAL_BIAS_PAD_E_VCLAMP_REF
	.comm	_MIPI_CAL_BIAS_PAD_CFG2,4,2     ; @MIPI_CAL_BIAS_PAD_CFG2
	.comm	_MIPI_CAL_BIAS_PAD_PDVREG,4,2   ; @MIPI_CAL_BIAS_PAD_PDVREG
	.no_dead_strip	_tegra_mipi_power_up
.subsections_via_symbols
