	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function anx78xx_dp_link_training
_anx78xx_dp_link_training:              ## @anx78xx_dp_link_training
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	8(%rdi), %rax
	movq	_I2C_IDX_RX_P0@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edi
	movq	_SP_HDMI_MUTE_CTRL_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_30
## %bb.1:
	movq	8(%r12), %rax
	movq	_I2C_IDX_TX_P2@GOTPCREL(%rip), %r15
	movq	(%r15), %rcx
	movl	(%rax,%rcx,4), %edi
	movq	_SP_POWERDOWN_CTRL_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	_SP_TOTAL_PD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_anx78xx_clear_bits
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_2
LBB0_30:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	leaq	20(%r12), %r14
	movq	_DP_MAX_LINK_RATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	movq	%r14, %rdi
	callq	_drm_dp_dpcd_readb
	testl	%eax, %eax
	js	LBB0_29
## %bb.3:
	movl	-44(%rbp), %esi
	leal	-128(%rsi), %eax
	cmpl	$3, %eax
	jae	LBB0_4
## %bb.5:
	movq	8(%r12), %rax
	movq	(%r15), %rcx
	movl	(%rax,%rcx,4), %edi
	movq	_SP_VID_CTRL1_REG@GOTPCREL(%rip), %r13
	movq	(%r13), %rsi
	movq	_SP_VIDEO_MUTE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_anx78xx_set_bits
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_30
## %bb.6:
	movq	8(%r12), %rax
	movq	(%r15), %rcx
	movl	(%rax,%rcx,4), %edi
	movq	(%r13), %rsi
	movq	_SP_VIDEO_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_anx78xx_clear_bits
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_30
## %bb.7:
	movq	_DP_DPCD_REV@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DP_RECEIVER_CAP_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r14, %rdi
	movq	%r12, %rdx
	callq	_drm_dp_dpcd_read
	testl	%eax, %eax
	js	LBB0_8
## %bb.10:
	movq	8(%r12), %rax
	movq	_I2C_IDX_TX_P0@GOTPCREL(%rip), %r13
	movq	(%r13), %rcx
	movl	(%rax,%rcx,4), %edi
	movq	_SP_DP_ANALOG_POWER_DOWN_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	_SP_CH0_PD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_anx78xx_clear_bits
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_30
## %bb.11:
	leaq	16(%r12), %r15
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_drm_dp_link_probe
	testl	%eax, %eax
	js	LBB0_12
## %bb.13:
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_drm_dp_link_power_up
	testl	%eax, %eax
	js	LBB0_14
## %bb.15:
	movq	8(%r12), %rax
	movq	(%r13), %rcx
	movl	(%rax,%rcx,4), %edi
	movq	_SP_DP_DOWNSPREAD_CTRL1_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_30
## %bb.16:
	movq	_SP_DP_DOWNSPREAD_CTRL1_REG@GOTPCREL(%rip), %rbx
	movq	(%r12), %rax
	movq	_DP_MAX_DOWNSPREAD@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	_DP_MAX_DOWNSPREAD_0_5@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	testl	%edx, (%rax,%rcx,4)
	je	LBB0_19
## %bb.17:
	leaq	L_.str.4(%rip), %rdi
	callq	_DRM_DEBUG
	movq	8(%r12), %rax
	movq	(%r13), %rcx
	movl	(%rax,%rcx,4), %edi
	movl	(%rbx), %esi
	movl	$8, %edx
	callq	_regmap_write
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_30
## %bb.18:
	movq	_DP_DOWNSPREAD_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DP_SPREAD_AMP_0_5@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	jmp	LBB0_20
LBB0_4:
	leaq	L_.str(%rip), %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_DRM_DEBUG_KMS
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_30
LBB0_8:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
LBB0_9:
	movl	%ebx, %esi
	callq	_DRM_ERROR
	jmp	LBB0_30
LBB0_12:
	movl	%eax, %ebx
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_9
LBB0_14:
	movl	%eax, %ebx
	leaq	L_.str.3(%rip), %rdi
	jmp	LBB0_9
LBB0_19:
	movq	_DP_DOWNSPREAD_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
LBB0_20:
	callq	_drm_dp_dpcd_writeb
	testl	%eax, %eax
	js	LBB0_29
## %bb.21:
	movq	(%r12), %rdi
	callq	_drm_dp_enhanced_frame_cap
	movq	_SP_DP_SYSTEM_CTRL_BASE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	$4, %rsi
	movq	8(%r12), %rcx
	movq	(%r13), %rdx
	movl	(%rcx,%rdx,4), %edi
	movq	_SP_ENHANCED_MODE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	testq	%rax, %rax
	je	LBB0_23
## %bb.22:
	callq	_anx78xx_set_bits
	jmp	LBB0_24
LBB0_23:
	callq	_anx78xx_clear_bits
LBB0_24:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_30
## %bb.25:
	movl	16(%r12), %edi
	callq	_drm_dp_link_rate_to_bw_code
	movq	8(%r12), %rcx
	movq	(%r13), %rdx
	movl	(%rcx,%rdx,4), %edi
	movq	_SP_DP_MAIN_LINK_BW_SET_REG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edx
	callq	_regmap_write
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_30
## %bb.26:
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_drm_dp_link_configure
	testl	%eax, %eax
	js	LBB0_27
## %bb.28:
	movq	8(%r12), %rax
	movq	(%r13), %rcx
	movl	(%rax,%rcx,4), %edi
	movq	_SP_DP_LT_CTRL_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SP_LT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_regmap_write
LBB0_29:
	movl	%eax, %ebx
	jmp	LBB0_30
LBB0_27:
	movl	%eax, %ebx
	leaq	L_.str.5(%rip), %rdi
	jmp	LBB0_9
	.cfi_endproc
                                        ## -- End function
	.comm	_I2C_IDX_RX_P0,8,3              ## @I2C_IDX_RX_P0
	.comm	_SP_HDMI_MUTE_CTRL_REG,4,2      ## @SP_HDMI_MUTE_CTRL_REG
	.comm	_I2C_IDX_TX_P2,8,3              ## @I2C_IDX_TX_P2
	.comm	_SP_POWERDOWN_CTRL_REG,8,3      ## @SP_POWERDOWN_CTRL_REG
	.comm	_SP_TOTAL_PD,4,2                ## @SP_TOTAL_PD
	.comm	_DP_MAX_LINK_RATE,4,2           ## @DP_MAX_LINK_RATE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"DP bandwidth (%#02x) not supported\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_SP_VID_CTRL1_REG,8,3           ## @SP_VID_CTRL1_REG
	.comm	_SP_VIDEO_MUTE,4,2              ## @SP_VIDEO_MUTE
	.comm	_SP_VIDEO_EN,4,2                ## @SP_VIDEO_EN
	.comm	_DP_DPCD_REV,4,2                ## @DP_DPCD_REV
	.comm	_DP_RECEIVER_CAP_SIZE,4,2       ## @DP_RECEIVER_CAP_SIZE
L_.str.1:                               ## @.str.1
	.asciz	"Failed to read DPCD: %d\n"

	.comm	_I2C_IDX_TX_P0,8,3              ## @I2C_IDX_TX_P0
	.comm	_SP_DP_ANALOG_POWER_DOWN_REG,8,3 ## @SP_DP_ANALOG_POWER_DOWN_REG
	.comm	_SP_CH0_PD,4,2                  ## @SP_CH0_PD
L_.str.2:                               ## @.str.2
	.asciz	"Failed to probe link capabilities: %d\n"

L_.str.3:                               ## @.str.3
	.asciz	"Failed to power up DisplayPort link: %d\n"

	.comm	_SP_DP_DOWNSPREAD_CTRL1_REG,4,2 ## @SP_DP_DOWNSPREAD_CTRL1_REG
	.comm	_DP_MAX_DOWNSPREAD,8,3          ## @DP_MAX_DOWNSPREAD
	.comm	_DP_MAX_DOWNSPREAD_0_5,4,2      ## @DP_MAX_DOWNSPREAD_0_5
L_.str.4:                               ## @.str.4
	.asciz	"Enable downspread on the sink\n"

	.comm	_DP_DOWNSPREAD_CTRL,4,2         ## @DP_DOWNSPREAD_CTRL
	.comm	_DP_SPREAD_AMP_0_5,4,2          ## @DP_SPREAD_AMP_0_5
	.comm	_SP_DP_SYSTEM_CTRL_BASE,8,3     ## @SP_DP_SYSTEM_CTRL_BASE
	.comm	_SP_ENHANCED_MODE,4,2           ## @SP_ENHANCED_MODE
	.comm	_SP_DP_MAIN_LINK_BW_SET_REG,4,2 ## @SP_DP_MAIN_LINK_BW_SET_REG
L_.str.5:                               ## @.str.5
	.asciz	"Failed to configure DisplayPort link: %d\n"

	.comm	_SP_DP_LT_CTRL_REG,4,2          ## @SP_DP_LT_CTRL_REG
	.comm	_SP_LT_EN,4,2                   ## @SP_LT_EN
	.no_dead_strip	_anx78xx_dp_link_training
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function anx78xx_dp_link_training
_anx78xx_dp_link_training:              ; @anx78xx_dp_link_training
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x8, [x0, #8]
Lloh0:
	adrp	x9, _I2C_IDX_RX_P0@GOTPAGE
Lloh1:
	ldr	x9, [x9, _I2C_IDX_RX_P0@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	ldr	w0, [x8, x9, lsl #2]
Lloh3:
	adrp	x8, _SP_HDMI_MUTE_CTRL_REG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SP_HDMI_MUTE_CTRL_REG@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_regmap_write
	mov	x22, x0
	cbnz	w0, LBB0_2
; %bb.1:
	ldr	x8, [x19, #8]
Lloh6:
	adrp	x21, _I2C_IDX_TX_P2@GOTPAGE
Lloh7:
	ldr	x21, [x21, _I2C_IDX_TX_P2@GOTPAGEOFF]
	ldr	x9, [x21]
	ldr	w0, [x8, x9, lsl #2]
Lloh8:
	adrp	x8, _SP_POWERDOWN_CTRL_REG@GOTPAGE
Lloh9:
	ldr	x8, [x8, _SP_POWERDOWN_CTRL_REG@GOTPAGEOFF]
Lloh10:
	ldr	x1, [x8]
Lloh11:
	adrp	x8, _SP_TOTAL_PD@GOTPAGE
Lloh12:
	ldr	x8, [x8, _SP_TOTAL_PD@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	bl	_anx78xx_clear_bits
	mov	x22, x0
	cbz	w0, LBB0_3
LBB0_2:
	mov	x0, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_3:
	add	x20, x19, #20
Lloh14:
	adrp	x8, _DP_MAX_LINK_RATE@GOTPAGE
Lloh15:
	ldr	x8, [x8, _DP_MAX_LINK_RATE@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	add	x2, sp, #12
	mov	x0, x20
	bl	_drm_dp_dpcd_readb
	tbnz	w0, #31, LBB0_29
; %bb.4:
	ldr	w1, [sp, #12]
	sub	w8, w1, #128
	cmp	w8, #3
	b.hs	LBB0_15
; %bb.5:
	ldr	x8, [x19, #8]
	ldr	x9, [x21]
	ldr	w0, [x8, x9, lsl #2]
Lloh17:
	adrp	x23, _SP_VID_CTRL1_REG@GOTPAGE
Lloh18:
	ldr	x23, [x23, _SP_VID_CTRL1_REG@GOTPAGEOFF]
	ldr	x1, [x23]
Lloh19:
	adrp	x8, _SP_VIDEO_MUTE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _SP_VIDEO_MUTE@GOTPAGEOFF]
Lloh21:
	ldr	w2, [x8]
	bl	_anx78xx_set_bits
	mov	x22, x0
	cbnz	w0, LBB0_2
; %bb.6:
	ldr	x8, [x19, #8]
	ldr	x9, [x21]
	ldr	w0, [x8, x9, lsl #2]
	ldr	x1, [x23]
Lloh22:
	adrp	x8, _SP_VIDEO_EN@GOTPAGE
Lloh23:
	ldr	x8, [x8, _SP_VIDEO_EN@GOTPAGEOFF]
Lloh24:
	ldr	w2, [x8]
	bl	_anx78xx_clear_bits
	mov	x22, x0
	cbnz	w0, LBB0_2
; %bb.7:
Lloh25:
	adrp	x8, _DP_DPCD_REV@GOTPAGE
Lloh26:
	ldr	x8, [x8, _DP_DPCD_REV@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
Lloh28:
	adrp	x8, _DP_RECEIVER_CAP_SIZE@GOTPAGE
Lloh29:
	ldr	x8, [x8, _DP_RECEIVER_CAP_SIZE@GOTPAGEOFF]
Lloh30:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x2, x19
	bl	_drm_dp_dpcd_read
	tbnz	w0, #31, LBB0_16
; %bb.8:
	ldr	x8, [x19, #8]
Lloh31:
	adrp	x23, _I2C_IDX_TX_P0@GOTPAGE
Lloh32:
	ldr	x23, [x23, _I2C_IDX_TX_P0@GOTPAGEOFF]
	ldr	x9, [x23]
	ldr	w0, [x8, x9, lsl #2]
Lloh33:
	adrp	x8, _SP_DP_ANALOG_POWER_DOWN_REG@GOTPAGE
Lloh34:
	ldr	x8, [x8, _SP_DP_ANALOG_POWER_DOWN_REG@GOTPAGEOFF]
Lloh35:
	ldr	x1, [x8]
Lloh36:
	adrp	x8, _SP_CH0_PD@GOTPAGE
Lloh37:
	ldr	x8, [x8, _SP_CH0_PD@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	bl	_anx78xx_clear_bits
	mov	x22, x0
	cbnz	w0, LBB0_2
; %bb.9:
	add	x21, x19, #16
	mov	x0, x20
	mov	x1, x21
	bl	_drm_dp_link_probe
	tbnz	w0, #31, LBB0_18
; %bb.10:
	mov	x0, x20
	mov	x1, x21
	bl	_drm_dp_link_power_up
	tbnz	w0, #31, LBB0_19
; %bb.11:
	ldr	x8, [x19, #8]
	ldr	x9, [x23]
	ldr	w0, [x8, x9, lsl #2]
Lloh39:
	adrp	x24, _SP_DP_DOWNSPREAD_CTRL1_REG@GOTPAGE
Lloh40:
	ldr	x24, [x24, _SP_DP_DOWNSPREAD_CTRL1_REG@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	w2, #0
	bl	_regmap_write
	mov	x22, x0
	cbnz	w0, LBB0_2
; %bb.12:
	ldr	x8, [x19]
Lloh41:
	adrp	x9, _DP_MAX_DOWNSPREAD@GOTPAGE
Lloh42:
	ldr	x9, [x9, _DP_MAX_DOWNSPREAD@GOTPAGEOFF]
Lloh43:
	ldr	x9, [x9]
	ldr	w8, [x8, x9, lsl #2]
Lloh44:
	adrp	x9, _DP_MAX_DOWNSPREAD_0_5@GOTPAGE
Lloh45:
	ldr	x9, [x9, _DP_MAX_DOWNSPREAD_0_5@GOTPAGEOFF]
Lloh46:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_20
; %bb.13:
Lloh47:
	adrp	x0, l_.str.4@PAGE
Lloh48:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_DRM_DEBUG
	ldr	x8, [x19, #8]
	ldr	x9, [x23]
	ldr	w0, [x8, x9, lsl #2]
	ldr	w1, [x24]
	mov	w2, #8
	bl	_regmap_write
	mov	x22, x0
	cbnz	w0, LBB0_2
; %bb.14:
Lloh49:
	adrp	x8, _DP_DOWNSPREAD_CTRL@GOTPAGE
Lloh50:
	ldr	x8, [x8, _DP_DOWNSPREAD_CTRL@GOTPAGEOFF]
Lloh51:
	ldr	w1, [x8]
Lloh52:
	adrp	x8, _DP_SPREAD_AMP_0_5@GOTPAGE
Lloh53:
	ldr	x8, [x8, _DP_SPREAD_AMP_0_5@GOTPAGEOFF]
Lloh54:
	ldr	w2, [x8]
	mov	x0, x20
	b	LBB0_21
LBB0_15:
Lloh55:
	adrp	x0, l_.str@PAGE
Lloh56:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
Lloh57:
	adrp	x8, _EINVAL@GOTPAGE
Lloh58:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh59:
	ldr	w8, [x8]
	neg	w22, w8
	b	LBB0_2
LBB0_16:
	mov	x22, x0
Lloh60:
	adrp	x0, l_.str.1@PAGE
Lloh61:
	add	x0, x0, l_.str.1@PAGEOFF
LBB0_17:
	mov	x1, x22
	bl	_DRM_ERROR
	b	LBB0_2
LBB0_18:
	mov	x22, x0
Lloh62:
	adrp	x0, l_.str.2@PAGE
Lloh63:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_17
LBB0_19:
	mov	x22, x0
Lloh64:
	adrp	x0, l_.str.3@PAGE
Lloh65:
	add	x0, x0, l_.str.3@PAGEOFF
	b	LBB0_17
LBB0_20:
Lloh66:
	adrp	x8, _DP_DOWNSPREAD_CTRL@GOTPAGE
Lloh67:
	ldr	x8, [x8, _DP_DOWNSPREAD_CTRL@GOTPAGEOFF]
Lloh68:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #0
LBB0_21:
	bl	_drm_dp_dpcd_writeb
	tbnz	w0, #31, LBB0_29
; %bb.22:
	ldr	x0, [x19]
	bl	_drm_dp_enhanced_frame_cap
	mov	x8, x0
	ldr	x9, [x19, #8]
	ldr	x10, [x23]
	ldr	w0, [x9, x10, lsl #2]
Lloh69:
	adrp	x9, _SP_DP_SYSTEM_CTRL_BASE@GOTPAGE
Lloh70:
	ldr	x9, [x9, _SP_DP_SYSTEM_CTRL_BASE@GOTPAGEOFF]
Lloh71:
	ldr	x9, [x9]
	add	x1, x9, #4
Lloh72:
	adrp	x9, _SP_ENHANCED_MODE@GOTPAGE
Lloh73:
	ldr	x9, [x9, _SP_ENHANCED_MODE@GOTPAGEOFF]
Lloh74:
	ldr	w2, [x9]
	cbz	x8, LBB0_24
; %bb.23:
	bl	_anx78xx_set_bits
	b	LBB0_25
LBB0_24:
	bl	_anx78xx_clear_bits
LBB0_25:
	mov	x22, x0
	cbnz	w0, LBB0_2
; %bb.26:
	ldr	w0, [x19, #16]
	bl	_drm_dp_link_rate_to_bw_code
	mov	x2, x0
	ldr	x8, [x19, #8]
	ldr	x9, [x23]
	ldr	w0, [x8, x9, lsl #2]
Lloh75:
	adrp	x8, _SP_DP_MAIN_LINK_BW_SET_REG@GOTPAGE
Lloh76:
	ldr	x8, [x8, _SP_DP_MAIN_LINK_BW_SET_REG@GOTPAGEOFF]
Lloh77:
	ldr	w1, [x8]
	bl	_regmap_write
	mov	x22, x0
	cbnz	w0, LBB0_2
; %bb.27:
	mov	x0, x20
	mov	x1, x21
	bl	_drm_dp_link_configure
	tbnz	w0, #31, LBB0_30
; %bb.28:
	ldr	x8, [x19, #8]
	ldr	x9, [x23]
	ldr	w0, [x8, x9, lsl #2]
Lloh78:
	adrp	x8, _SP_DP_LT_CTRL_REG@GOTPAGE
Lloh79:
	ldr	x8, [x8, _SP_DP_LT_CTRL_REG@GOTPAGEOFF]
Lloh80:
	ldr	w1, [x8]
Lloh81:
	adrp	x8, _SP_LT_EN@GOTPAGE
Lloh82:
	ldr	x8, [x8, _SP_LT_EN@GOTPAGEOFF]
Lloh83:
	ldr	w2, [x8]
	bl	_regmap_write
LBB0_29:
	mov	x22, x0
	b	LBB0_2
LBB0_30:
	mov	x22, x0
Lloh84:
	adrp	x0, l_.str.5@PAGE
Lloh85:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_17
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpAdd	Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpAdd	Lloh55, Lloh56
	.loh AdrpAdd	Lloh60, Lloh61
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpAdd	Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpAdd	Lloh84, Lloh85
	.cfi_endproc
                                        ; -- End function
	.comm	_I2C_IDX_RX_P0,8,3              ; @I2C_IDX_RX_P0
	.comm	_SP_HDMI_MUTE_CTRL_REG,4,2      ; @SP_HDMI_MUTE_CTRL_REG
	.comm	_I2C_IDX_TX_P2,8,3              ; @I2C_IDX_TX_P2
	.comm	_SP_POWERDOWN_CTRL_REG,8,3      ; @SP_POWERDOWN_CTRL_REG
	.comm	_SP_TOTAL_PD,4,2                ; @SP_TOTAL_PD
	.comm	_DP_MAX_LINK_RATE,4,2           ; @DP_MAX_LINK_RATE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"DP bandwidth (%#02x) not supported\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_SP_VID_CTRL1_REG,8,3           ; @SP_VID_CTRL1_REG
	.comm	_SP_VIDEO_MUTE,4,2              ; @SP_VIDEO_MUTE
	.comm	_SP_VIDEO_EN,4,2                ; @SP_VIDEO_EN
	.comm	_DP_DPCD_REV,4,2                ; @DP_DPCD_REV
	.comm	_DP_RECEIVER_CAP_SIZE,4,2       ; @DP_RECEIVER_CAP_SIZE
l_.str.1:                               ; @.str.1
	.asciz	"Failed to read DPCD: %d\n"

	.comm	_I2C_IDX_TX_P0,8,3              ; @I2C_IDX_TX_P0
	.comm	_SP_DP_ANALOG_POWER_DOWN_REG,8,3 ; @SP_DP_ANALOG_POWER_DOWN_REG
	.comm	_SP_CH0_PD,4,2                  ; @SP_CH0_PD
l_.str.2:                               ; @.str.2
	.asciz	"Failed to probe link capabilities: %d\n"

l_.str.3:                               ; @.str.3
	.asciz	"Failed to power up DisplayPort link: %d\n"

	.comm	_SP_DP_DOWNSPREAD_CTRL1_REG,4,2 ; @SP_DP_DOWNSPREAD_CTRL1_REG
	.comm	_DP_MAX_DOWNSPREAD,8,3          ; @DP_MAX_DOWNSPREAD
	.comm	_DP_MAX_DOWNSPREAD_0_5,4,2      ; @DP_MAX_DOWNSPREAD_0_5
l_.str.4:                               ; @.str.4
	.asciz	"Enable downspread on the sink\n"

	.comm	_DP_DOWNSPREAD_CTRL,4,2         ; @DP_DOWNSPREAD_CTRL
	.comm	_DP_SPREAD_AMP_0_5,4,2          ; @DP_SPREAD_AMP_0_5
	.comm	_SP_DP_SYSTEM_CTRL_BASE,8,3     ; @SP_DP_SYSTEM_CTRL_BASE
	.comm	_SP_ENHANCED_MODE,4,2           ; @SP_ENHANCED_MODE
	.comm	_SP_DP_MAIN_LINK_BW_SET_REG,4,2 ; @SP_DP_MAIN_LINK_BW_SET_REG
l_.str.5:                               ; @.str.5
	.asciz	"Failed to configure DisplayPort link: %d\n"

	.comm	_SP_DP_LT_CTRL_REG,4,2          ; @SP_DP_LT_CTRL_REG
	.comm	_SP_LT_EN,4,2                   ; @SP_LT_EN
	.no_dead_strip	_anx78xx_dp_link_training
.subsections_via_symbols
