	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv770_get_memory_type          ## -- Begin function rv770_get_memory_type
	.p2align	4, 0x90
_rv770_get_memory_type:                 ## @rv770_get_memory_type
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	callq	_rv770_get_pi
	movq	%rax, %rbx
	movq	_MC_SEQ_MISC0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	_MC_SEQ_MISC0_GDDR5_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_MC_SEQ_MISC0_GDDR5_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movq	_MC_SEQ_MISC0_GDDR5_VALUE@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	cmpl	(%rcx), %eax
	sete	%dl
	movl	%edx, (%rbx)
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MC_SEQ_MISC0,4,2               ## @MC_SEQ_MISC0
	.comm	_MC_SEQ_MISC0_GDDR5_MASK,4,2    ## @MC_SEQ_MISC0_GDDR5_MASK
	.comm	_MC_SEQ_MISC0_GDDR5_SHIFT,4,2   ## @MC_SEQ_MISC0_GDDR5_SHIFT
	.comm	_MC_SEQ_MISC0_GDDR5_VALUE,4,2   ## @MC_SEQ_MISC0_GDDR5_VALUE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv770_get_memory_type          ; -- Begin function rv770_get_memory_type
	.p2align	2
_rv770_get_memory_type:                 ; @rv770_get_memory_type
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_rv770_get_pi
	mov	x19, x0
Lloh0:
	adrp	x8, _MC_SEQ_MISC0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MC_SEQ_MISC0@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_RREG32
Lloh3:
	adrp	x8, _MC_SEQ_MISC0_GDDR5_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MC_SEQ_MISC0_GDDR5_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh6:
	adrp	x9, _MC_SEQ_MISC0_GDDR5_SHIFT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _MC_SEQ_MISC0_GDDR5_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	asr	w8, w8, w9
Lloh9:
	adrp	x9, _MC_SEQ_MISC0_GDDR5_VALUE@GOTPAGE
Lloh10:
	ldr	x9, [x9, _MC_SEQ_MISC0_GDDR5_VALUE@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	cmp	w8, w9
	cset	w8, eq
	str	w8, [x19]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_MC_SEQ_MISC0,4,2               ; @MC_SEQ_MISC0
	.comm	_MC_SEQ_MISC0_GDDR5_MASK,4,2    ; @MC_SEQ_MISC0_GDDR5_MASK
	.comm	_MC_SEQ_MISC0_GDDR5_SHIFT,4,2   ; @MC_SEQ_MISC0_GDDR5_SHIFT
	.comm	_MC_SEQ_MISC0_GDDR5_VALUE,4,2   ; @MC_SEQ_MISC0_GDDR5_VALUE
.subsections_via_symbols
