	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_crtc_compute_config
_intel_crtc_compute_config:             ## @intel_crtc_compute_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %r14
	movl	(%rdi), %edi
	callq	_to_i915
	movq	%rax, %r15
	movl	(%rax), %ebx
	movq	%rax, %rdi
	callq	_INTEL_GEN
	cmpl	$3, %eax
	jg	LBB0_4
## %bb.1:
	movl	4(%r15), %eax
	leal	(%rax,%rax,8), %eax
	cltq
	imulq	$1717986919, %rax, %rbx         ## imm = 0x66666667
	movq	%rbx, %rax
	shrq	$63, %rax
	sarq	$34, %rbx
	addl	%eax, %ebx
	movq	%r14, %rdi
	callq	_intel_crtc_supports_double_wide
	testq	%rax, %rax
	je	LBB0_4
## %bb.2:
	cmpl	%ebx, 40(%r12)
	jle	LBB0_4
## %bb.3:
	movl	(%r15), %ebx
	movl	$1, (%r12)
LBB0_4:
	movl	40(%r12), %r13d
	cmpl	%ebx, %r13d
	jle	LBB0_6
## %bb.5:
	movl	(%r12), %edi
	callq	_yesno
	leaq	L_.str(%rip), %rdi
	xorl	%r14d, %r14d
	movl	%r13d, %esi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	jmp	LBB0_18
LBB0_6:
	movq	8(%r12), %rax
	movq	_INTEL_OUTPUT_FORMAT_YCBCR420@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_8
## %bb.7:
	movq	_INTEL_OUTPUT_FORMAT_YCBCR444@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_10
LBB0_8:
	cmpq	$0, 32(%r12)
	je	LBB0_10
## %bb.9:
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_17
LBB0_10:
	testb	$1, 16(%r12)
	jne	LBB0_15
LBB0_11:
	movq	%r15, %rdi
	callq	_INTEL_GEN
	cmpl	$4, %eax
	jg	LBB0_13
## %bb.12:
	movq	%r15, %rdi
	callq	_IS_G4X
	testq	%rax, %rax
	je	LBB0_21
LBB0_13:
	movq	48(%r12), %rax
	cmpq	56(%r12), %rax
	jne	LBB0_21
## %bb.14:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	jmp	LBB0_19
LBB0_15:
	cmpl	$0, (%r12)
	je	LBB0_23
## %bb.16:
	leaq	L_.str.2(%rip), %rdi
LBB0_17:
	xorl	%r14d, %r14d
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
LBB0_18:
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_19:
	subl	(%rax), %r14d
LBB0_20:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_21:
	movq	%r12, %rdi
	callq	_intel_crtc_compute_pixel_rate
	cmpq	$0, 24(%r12)
	je	LBB0_26
## %bb.22:
	movq	%r14, %rdi
	movq	%r12, %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ironlake_fdi_compute_config    ## TAILCALL
LBB0_23:
	movq	_INTEL_OUTPUT_LVDS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_intel_crtc_has_type
	testq	%rax, %rax
	je	LBB0_11
## %bb.24:
	movq	%r15, %rdi
	callq	_intel_is_dual_link_lvds
	testq	%rax, %rax
	je	LBB0_11
## %bb.25:
	leaq	L_.str.3(%rip), %rdi
	jmp	LBB0_17
LBB0_26:
	xorl	%r14d, %r14d
	jmp	LBB0_20
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"requested pixel clock (%d kHz) too high (max: %d kHz, double wide: %s)\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_INTEL_OUTPUT_FORMAT_YCBCR420,8,3 ## @INTEL_OUTPUT_FORMAT_YCBCR420
	.comm	_INTEL_OUTPUT_FORMAT_YCBCR444,8,3 ## @INTEL_OUTPUT_FORMAT_YCBCR444
L_.str.1:                               ## @.str.1
	.asciz	"YCBCR420 and CTM together are not possible\n"

L_.str.2:                               ## @.str.2
	.asciz	"Odd pipe source width not supported with double wide pipe\n"

	.comm	_INTEL_OUTPUT_LVDS,4,2          ## @INTEL_OUTPUT_LVDS
L_.str.3:                               ## @.str.3
	.asciz	"Odd pipe source width not supported with dual link LVDS\n"

	.no_dead_strip	_intel_crtc_compute_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_crtc_compute_config
_intel_crtc_compute_config:             ; @intel_crtc_compute_config
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
	ldr	w0, [x0]
	bl	_to_i915
	mov	x21, x0
	ldr	w22, [x0]
	bl	_INTEL_GEN
	cmp	w0, #3
	b.gt	LBB0_4
; %bb.1:
	ldr	w8, [x21, #4]
	add	w8, w8, w8, lsl #3
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	smull	x8, w8, w9
	lsr	x9, x8, #63
	asr	x8, x8, #34
	add	w22, w8, w9
	mov	x0, x20
	bl	_intel_crtc_supports_double_wide
	cbz	x0, LBB0_4
; %bb.2:
	ldr	w8, [x19, #40]
	cmp	w8, w22
	b.le	LBB0_4
; %bb.3:
	ldr	w22, [x21]
	mov	w8, #1
	str	w8, [x19]
LBB0_4:
	ldr	w23, [x19, #40]
	cmp	w23, w22
	b.le	LBB0_6
; %bb.5:
	ldr	w0, [x19]
	bl	_yesno
                                        ; kill: def $w0 killed $w0 def $x0
	stp	x22, x0, [sp, #8]
	str	x23, [sp]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_20
LBB0_6:
	ldr	x8, [x19, #8]
Lloh2:
	adrp	x9, _INTEL_OUTPUT_FORMAT_YCBCR420@GOTPAGE
Lloh3:
	ldr	x9, [x9, _INTEL_OUTPUT_FORMAT_YCBCR420@GOTPAGEOFF]
Lloh4:
	ldr	x9, [x9]
Lloh5:
	adrp	x10, _INTEL_OUTPUT_FORMAT_YCBCR444@GOTPAGE
Lloh6:
	ldr	x10, [x10, _INTEL_OUTPUT_FORMAT_YCBCR444@GOTPAGEOFF]
Lloh7:
	ldr	x10, [x10]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	b.ne	LBB0_9
; %bb.7:
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_9
; %bb.8:
Lloh8:
	adrp	x0, l_.str.1@PAGE
Lloh9:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_20
LBB0_9:
	ldrb	w8, [x19, #16]
	tbnz	w8, #0, LBB0_15
LBB0_10:
	mov	x0, x21
	bl	_INTEL_GEN
	cmp	w0, #4
	b.gt	LBB0_12
; %bb.11:
	mov	x0, x21
	bl	_IS_G4X
	cbz	x0, LBB0_13
LBB0_12:
	ldp	x8, x9, [x19, #48]
	cmp	x8, x9
	b.eq	LBB0_21
LBB0_13:
	mov	x0, x19
	bl	_intel_crtc_compute_pixel_rate
	ldr	x8, [x19, #24]
	cbz	x8, LBB0_23
; %bb.14:
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #96
	b	_ironlake_fdi_compute_config
LBB0_15:
	ldr	w8, [x19]
	cbz	w8, LBB0_17
; %bb.16:
Lloh10:
	adrp	x0, l_.str.2@PAGE
Lloh11:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_20
LBB0_17:
Lloh12:
	adrp	x8, _INTEL_OUTPUT_LVDS@GOTPAGE
Lloh13:
	ldr	x8, [x8, _INTEL_OUTPUT_LVDS@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_intel_crtc_has_type
	cbz	x0, LBB0_10
; %bb.18:
	mov	x0, x21
	bl	_intel_is_dual_link_lvds
	cbz	x0, LBB0_10
; %bb.19:
Lloh15:
	adrp	x0, l_.str.3@PAGE
Lloh16:
	add	x0, x0, l_.str.3@PAGEOFF
LBB0_20:
	bl	_DRM_DEBUG_KMS
LBB0_21:
Lloh17:
	adrp	x8, _EINVAL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_22:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_23:
	mov	w0, #0
	b	LBB0_22
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"requested pixel clock (%d kHz) too high (max: %d kHz, double wide: %s)\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_INTEL_OUTPUT_FORMAT_YCBCR420,8,3 ; @INTEL_OUTPUT_FORMAT_YCBCR420
	.comm	_INTEL_OUTPUT_FORMAT_YCBCR444,8,3 ; @INTEL_OUTPUT_FORMAT_YCBCR444
l_.str.1:                               ; @.str.1
	.asciz	"YCBCR420 and CTM together are not possible\n"

l_.str.2:                               ; @.str.2
	.asciz	"Odd pipe source width not supported with double wide pipe\n"

	.comm	_INTEL_OUTPUT_LVDS,4,2          ; @INTEL_OUTPUT_LVDS
l_.str.3:                               ; @.str.3
	.asciz	"Odd pipe source width not supported with dual link LVDS\n"

	.no_dead_strip	_intel_crtc_compute_config
.subsections_via_symbols
