	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_kfd_topology_add_device        ## -- Begin function kfd_topology_add_device
	.p2align	4, 0x90
_kfd_topology_add_device:               ## @kfd_topology_add_device
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movq	$0, -56(%rbp)
	movq	$0, -80(%rbp)
	leaq	-48(%rbp), %rdi
	callq	_INIT_LIST_HEAD
	movq	%r13, %rdi
	callq	_kfd_generate_gpu_id
	movq	%rax, %r14
	leaq	L_.str(%rip), %rdi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	_pr_debug
	movq	_topology_crat_proximity_domain@GOTPCREL(%rip), %rdi
	callq	_atomic_inc_return
	movl	%eax, %r12d
	movq	%r13, %rdi
	callq	_kfd_assign_gpu
	movq	%rax, %rbx
	movl	$0, %r15d
	testq	%rax, %rax
	je	LBB0_1
LBB0_10:
	movq	%r14, 72(%rbx)
	movq	%r14, 24(%r13)
	movq	64(%rbx), %rax
	movq	(%rax), %rdi
	leaq	-72(%rbp), %rsi
	callq	_amdgpu_amdkfd_get_cu_info
	movl	56(%rbx), %edi
	movq	(%r13), %rax
	movl	8(%rax), %esi
	movq	_KFD_TOPOLOGY_PUBLIC_NAME_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_strncpy
	movl	-64(%rbp), %eax
	movl	%eax, 52(%rbx)
	movq	16(%r13), %rdi
	movl	4(%rdi), %eax
	movl	%eax, 48(%rbx)
	movl	(%rdi), %eax
	movl	%eax, 44(%rbx)
	callq	_pci_dev_id
	movl	%eax, 40(%rbx)
	movq	64(%rbx), %rax
	movq	(%rax), %rdi
	callq	_amdgpu_amdkfd_get_max_engine_clock_in_mhz
	movl	%eax, 36(%rbx)
	xorl	%edi, %edi
	callq	_cpufreq_quick_get_max
	cltq
	imulq	$274877907, %rax, %rax          ## imm = 0x10624DD3
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$38, %rax
	addl	%ecx, %eax
	movl	%eax, (%rbx)
	movq	(%r13), %rax
	movsd	8(%r13), %xmm0                  ## xmm0 = mem[0],zero
	movsd	(%rax), %xmm1                   ## xmm1 = mem[0],zero
	movlhps	%xmm0, %xmm1                    ## xmm1 = xmm1[0],xmm0[0]
	movups	%xmm1, 20(%rbx)
	movq	_hws_gws_support@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_11
## %bb.12:
	movq	64(%rbx), %rsi
	movq	16(%rsi), %rcx
	movq	(%rcx), %rcx
	movq	_KFD_SCHED_POLICY_NO_HWS@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	movl	$0, %eax
	je	LBB0_14
## %bb.13:
	movq	(%rsi), %rdi
	callq	_amdgpu_amdkfd_get_num_gws
	jmp	LBB0_14
LBB0_1:
	movq	_COMPUTE_UNIT_GPU@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-56(%rbp), %rdi
	leaq	-80(%rbp), %rsi
	movq	%r13, %rcx
	movl	%r12d, %r8d
	callq	_kfd_create_crat_image_virtual
	testl	%eax, %eax
	je	LBB0_3
## %bb.2:
	movl	%eax, %r15d
	leaq	L_.str.1(%rip), %rdi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	_pr_err
	jmp	LBB0_40
LBB0_11:
	xorl	%eax, %eax
LBB0_14:
	movl	%eax, 16(%rbx)
	movq	%rbx, %rdi
	callq	_kfd_fill_mem_clk_max_info
	movq	%rbx, %rdi
	callq	_kfd_fill_iolink_non_crat_info
	movq	64(%rbx), %rax
	movq	8(%rax), %rax
	movl	(%rax), %edx
	leal	-128(%rdx), %eax
	cmpl	$14, %eax
	ja	LBB0_21
## %bb.15:
	movl	$12737, %ecx                    ## imm = 0x31C1
	btl	%eax, %ecx
	jb	LBB0_19
## %bb.16:
	movl	$16942, %ecx                    ## imm = 0x422E
	btl	%eax, %ecx
	jae	LBB0_17
## %bb.20:
	movq	_HSA_CAP_DOORBELL_TYPE_2_0@GOTPCREL(%rip), %rax
	jmp	LBB0_18
LBB0_19:
	leaq	L_.str.4(%rip), %rdi
	xorl	%eax, %eax
	callq	_pr_debug
	movq	_HSA_CAP_DOORBELL_TYPE_1_0@GOTPCREL(%rip), %rax
	jmp	LBB0_18
LBB0_3:
	movq	-56(%rbp), %rdi
	leaq	-48(%rbp), %rsi
	movl	%r12d, %edx
	callq	_kfd_parse_crat_table
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	movl	%eax, %r15d
	leaq	L_.str.2(%rip), %rdi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	_pr_err
	jmp	LBB0_39
LBB0_17:
	movq	_HSA_CAP_DOORBELL_TYPE_PRE_1_0@GOTPCREL(%rip), %rax
LBB0_18:
	movl	(%rax), %eax
	movq	_HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	orl	%eax, 4(%rbx)
LBB0_22:
	movq	64(%rbx), %rax
	movq	8(%rax), %rcx
	cmpq	$0, 8(%rcx)
	movq	_HSA_CAP_ATS_PRESENT@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	je	LBB0_24
## %bb.23:
	orl	%edx, 4(%rbx)
	cmpl	$141, (%rcx)
	jne	LBB0_27
LBB0_26:
	movl	-68(%rbp), %ecx
	imull	-72(%rbp), %ecx
	movl	%ecx, 8(%rbx)
	movl	$10, 12(%rbx)
LBB0_27:
	movq	(%rax), %rdi
	callq	_amdgpu_ras_get_context
	testq	%rax, %rax
	je	LBB0_37
## %bb.28:
	movq	%rax, %r12
	movl	(%rax), %r13d
	movq	_AMDGPU_RAS_BLOCK__SDMA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	testl	%r13d, %eax
	jne	LBB0_31
## %bb.29:
	movl	(%r12), %r13d
	movq	_AMDGPU_RAS_BLOCK__GFX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	testl	%r13d, %eax
	je	LBB0_30
LBB0_31:
	movq	_HSA_CAP_SRAM_EDCSUPPORTED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_32:
	orl	%eax, 4(%rbx)
	movl	(%r12), %r13d
	movq	_AMDGPU_RAS_BLOCK__UMC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	andl	%r13d, %eax
	je	LBB0_34
## %bb.33:
	movq	_HSA_CAP_MEM_EDCSUPPORTED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_34:
	orl	4(%rbx), %eax
	movl	(%r12), %ecx
	testl	%ecx, %ecx
	je	LBB0_36
## %bb.35:
	movq	_HSA_CAP_RASEVENTNOTIFY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_36:
	orl	%eax, %ecx
	movl	%ecx, 4(%rbx)
LBB0_37:
	xorl	%eax, %eax
	callq	_kfd_debug_print_topology
	testl	%r15d, %r15d
	jne	LBB0_39
## %bb.38:
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_kfd_notify_gpu_change
	xorl	%r15d, %r15d
LBB0_39:
	movq	-56(%rbp), %rdi
	callq	_kfd_destroy_crat_image
LBB0_40:
	movl	%r15d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_24:
	notl	%edx
	andl	%edx, 4(%rbx)
	cmpl	$141, (%rcx)
	je	LBB0_26
	jmp	LBB0_27
LBB0_30:
	xorl	%eax, %eax
	jmp	LBB0_32
LBB0_5:
	movq	_topology_lock@GOTPCREL(%rip), %rbx
	movq	%rbx, %rdi
	callq	_down_write
	movq	_topology_device_list@GOTPCREL(%rip), %rsi
	leaq	-48(%rbp), %rdi
	callq	_kfd_topology_update_device_list
	xorl	%eax, %eax
	callq	_kfd_topology_update_sysfs
	movl	%eax, %r15d
	movq	%rbx, %rdi
	callq	_up_write
	testl	%r15d, %r15d
	je	LBB0_6
## %bb.7:
	leaq	L_.str.3(%rip), %rdi
	movq	%r14, %rsi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	_pr_err
	jmp	LBB0_8
LBB0_21:
	leaq	L_.str.5(%rip), %rsi
	movl	$1, %edi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_WARN
	jmp	LBB0_22
LBB0_6:
	movq	_sys_props@GOTPCREL(%rip), %rax
	incl	(%rax)
LBB0_8:
	movq	%r13, %rdi
	callq	_kfd_assign_gpu
	movq	%rax, %rbx
	xorl	%edi, %edi
	testq	%rax, %rax
	sete	%dil
	callq	_WARN_ON
	testq	%rax, %rax
	je	LBB0_10
## %bb.9:
	movq	_ENODEV@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
	jmp	LBB0_39
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Adding new GPU (ID: 0x%x) to topology\n"

	.comm	_topology_crat_proximity_domain,4,2 ## @topology_crat_proximity_domain
	.comm	_COMPUTE_UNIT_GPU,4,2           ## @COMPUTE_UNIT_GPU
L_.str.1:                               ## @.str.1
	.asciz	"Error creating VCRAT for GPU (ID: 0x%x)\n"

L_.str.2:                               ## @.str.2
	.asciz	"Error parsing VCRAT for GPU (ID: 0x%x)\n"

	.comm	_topology_lock,4,2              ## @topology_lock
	.comm	_topology_device_list,4,2       ## @topology_device_list
	.comm	_sys_props,4,2                  ## @sys_props
L_.str.3:                               ## @.str.3
	.asciz	"Failed to update GPU (ID: 0x%x) to sysfs topology. res=%d\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_KFD_TOPOLOGY_PUBLIC_NAME_SIZE,4,2 ## @KFD_TOPOLOGY_PUBLIC_NAME_SIZE
	.comm	_hws_gws_support,8,3            ## @hws_gws_support
	.comm	_KFD_SCHED_POLICY_NO_HWS,8,3    ## @KFD_SCHED_POLICY_NO_HWS
	.comm	_HSA_CAP_DOORBELL_TYPE_PRE_1_0,4,2 ## @HSA_CAP_DOORBELL_TYPE_PRE_1_0
	.comm	_HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT,4,2 ## @HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT
	.comm	_HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK,4,2 ## @HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK
L_.str.4:                               ## @.str.4
	.asciz	"Adding doorbell packet type capability\n"

	.comm	_HSA_CAP_DOORBELL_TYPE_1_0,4,2  ## @HSA_CAP_DOORBELL_TYPE_1_0
	.comm	_HSA_CAP_DOORBELL_TYPE_2_0,4,2  ## @HSA_CAP_DOORBELL_TYPE_2_0
L_.str.5:                               ## @.str.5
	.asciz	"Unexpected ASIC family %u"

	.comm	_HSA_CAP_ATS_PRESENT,4,2        ## @HSA_CAP_ATS_PRESENT
	.comm	_AMDGPU_RAS_BLOCK__SDMA,4,2     ## @AMDGPU_RAS_BLOCK__SDMA
	.comm	_AMDGPU_RAS_BLOCK__GFX,4,2      ## @AMDGPU_RAS_BLOCK__GFX
	.comm	_HSA_CAP_SRAM_EDCSUPPORTED,4,2  ## @HSA_CAP_SRAM_EDCSUPPORTED
	.comm	_AMDGPU_RAS_BLOCK__UMC,4,2      ## @AMDGPU_RAS_BLOCK__UMC
	.comm	_HSA_CAP_MEM_EDCSUPPORTED,4,2   ## @HSA_CAP_MEM_EDCSUPPORTED
	.comm	_HSA_CAP_RASEVENTNOTIFY,4,2     ## @HSA_CAP_RASEVENTNOTIFY
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_kfd_topology_add_device        ; -- Begin function kfd_topology_add_device
	.p2align	2
_kfd_topology_add_device:               ; @kfd_topology_add_device
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x0
	stp	xzr, xzr, [sp, #8]
	add	x0, sp, #24
	bl	_INIT_LIST_HEAD
	mov	x0, x22
	bl	_kfd_generate_gpu_id
	mov	x19, x0
	str	x0, [sp]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_debug
Lloh2:
	adrp	x0, _topology_crat_proximity_domain@GOTPAGE
Lloh3:
	ldr	x0, [x0, _topology_crat_proximity_domain@GOTPAGEOFF]
	bl	_atomic_inc_return
	mov	x23, x0
	mov	x0, x22
	bl	_kfd_assign_gpu
	cbz	x0, LBB0_5
; %bb.1:
	mov	x21, x0
	mov	w20, #0
LBB0_2:
	str	x19, [x21, #72]
	str	x19, [x22, #24]
	ldr	x8, [x21, #64]
	ldr	x0, [x8]
	add	x1, sp, #32
	bl	_amdgpu_amdkfd_get_cu_info
	ldr	w0, [x21, #56]
	ldr	x8, [x22]
	ldr	w1, [x8, #8]
Lloh4:
	adrp	x8, _KFD_TOPOLOGY_PUBLIC_NAME_SIZE@GOTPAGE
Lloh5:
	ldr	x8, [x8, _KFD_TOPOLOGY_PUBLIC_NAME_SIZE@GOTPAGEOFF]
Lloh6:
	ldr	w2, [x8]
	bl	_strncpy
	ldr	w8, [sp, #40]
	str	w8, [x21, #52]
	ldr	x0, [x22, #16]
	ldr	d0, [x0]
	stur	d0, [x21, #44]
	bl	_pci_dev_id
	str	w0, [x21, #40]
	ldr	x8, [x21, #64]
	ldr	x0, [x8]
	bl	_amdgpu_amdkfd_get_max_engine_clock_in_mhz
	str	w0, [x21, #36]
	mov	w0, #0
	bl	_cpufreq_quick_get_max
	mov	w8, #19923
	movk	w8, #4194, lsl #16
	smull	x8, w0, w8
	lsr	x9, x8, #63
	asr	x8, x8, #38
	add	w8, w8, w9
	str	w8, [x21]
	ldr	x8, [x22]
	ldr	d0, [x22, #8]
	ldr	d1, [x8]
	mov.d	v1[1], v0[0]
	stur	q1, [x21, #20]
Lloh7:
	adrp	x8, _hws_gws_support@GOTPAGE
Lloh8:
	ldr	x8, [x8, _hws_gws_support@GOTPAGEOFF]
Lloh9:
	ldr	x8, [x8]
	cbz	x8, LBB0_4
; %bb.3:
	ldr	x8, [x21, #64]
	ldr	x9, [x8, #16]
	ldr	x9, [x9]
Lloh10:
	adrp	x10, _KFD_SCHED_POLICY_NO_HWS@GOTPAGE
Lloh11:
	ldr	x10, [x10, _KFD_SCHED_POLICY_NO_HWS@GOTPAGEOFF]
Lloh12:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_7
LBB0_4:
	mov	w0, #0
	b	LBB0_8
LBB0_5:
Lloh13:
	adrp	x8, _COMPUTE_UNIT_GPU@GOTPAGE
Lloh14:
	ldr	x8, [x8, _COMPUTE_UNIT_GPU@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	add	x0, sp, #16
	add	x1, sp, #8
	mov	x3, x22
	mov	x4, x23
	bl	_kfd_create_crat_image_virtual
	cbz	w0, LBB0_13
; %bb.6:
	mov	x20, x0
Lloh16:
	adrp	x0, l_.str.1@PAGE
Lloh17:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	x1, x19
	bl	_pr_err
	b	LBB0_30
LBB0_7:
	ldr	x0, [x8]
	bl	_amdgpu_amdkfd_get_num_gws
LBB0_8:
	str	w0, [x21, #16]
	mov	x0, x21
	bl	_kfd_fill_mem_clk_max_info
	mov	x0, x21
	bl	_kfd_fill_iolink_non_crat_info
	ldr	x8, [x21, #64]
	ldr	x8, [x8, #8]
	ldr	w2, [x8]
	sub	w8, w2, #128
	cmp	w8, #14
	b.hi	LBB0_34
; %bb.9:
	mov	w9, #1
	lsl	w8, w9, w8
	mov	w9, #12737
	tst	w8, w9
	b.ne	LBB0_12
; %bb.10:
	mov	w9, #16942
	tst	w8, w9
	b.eq	LBB0_15
; %bb.11:
Lloh18:
	adrp	x8, _HSA_CAP_DOORBELL_TYPE_2_0@GOTPAGE
Lloh19:
	ldr	x8, [x8, _HSA_CAP_DOORBELL_TYPE_2_0@GOTPAGEOFF]
	b	LBB0_16
LBB0_12:
Lloh20:
	adrp	x0, l_.str.4@PAGE
Lloh21:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_pr_debug
Lloh22:
	adrp	x8, _HSA_CAP_DOORBELL_TYPE_1_0@GOTPAGE
Lloh23:
	ldr	x8, [x8, _HSA_CAP_DOORBELL_TYPE_1_0@GOTPAGEOFF]
	b	LBB0_16
LBB0_13:
	ldr	x0, [sp, #16]
	add	x1, sp, #24
	mov	x2, x23
	bl	_kfd_parse_crat_table
	cbz	w0, LBB0_32
; %bb.14:
	mov	x20, x0
Lloh24:
	adrp	x0, l_.str.2@PAGE
Lloh25:
	add	x0, x0, l_.str.2@PAGEOFF
	mov	x1, x19
	bl	_pr_err
	b	LBB0_29
LBB0_15:
Lloh26:
	adrp	x8, _HSA_CAP_DOORBELL_TYPE_PRE_1_0@GOTPAGE
Lloh27:
	ldr	x8, [x8, _HSA_CAP_DOORBELL_TYPE_PRE_1_0@GOTPAGEOFF]
LBB0_16:
	ldr	w8, [x8]
Lloh28:
	adrp	x9, _HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT@GOTPAGE
Lloh29:
	ldr	x9, [x9, _HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
Lloh31:
	adrp	x10, _HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK@GOTPAGE
Lloh32:
	ldr	x10, [x10, _HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK@GOTPAGEOFF]
	lsl	w8, w8, w9
Lloh33:
	ldr	w9, [x10]
	and	w8, w8, w9
	ldr	w9, [x21, #4]
	orr	w8, w9, w8
	str	w8, [x21, #4]
LBB0_17:
	ldr	x8, [x21, #64]
	ldr	x9, [x8, #8]
	ldr	x11, [x9, #8]
Lloh34:
	adrp	x10, _HSA_CAP_ATS_PRESENT@GOTPAGE
Lloh35:
	ldr	x10, [x10, _HSA_CAP_ATS_PRESENT@GOTPAGEOFF]
Lloh36:
	ldr	w10, [x10]
	cbz	x11, LBB0_19
; %bb.18:
	ldr	w11, [x21, #4]
	orr	w10, w11, w10
	b	LBB0_20
LBB0_19:
	ldr	w11, [x21, #4]
	bic	w10, w11, w10
LBB0_20:
	str	w10, [x21, #4]
	ldr	w9, [x9]
	cmp	w9, #141
	b.ne	LBB0_22
; %bb.21:
	ldp	w9, w10, [sp, #32]
	mul	w9, w10, w9
	mov	w10, #10
	stp	w9, w10, [x21, #8]
LBB0_22:
	ldr	x0, [x8]
	bl	_amdgpu_ras_get_context
	cbz	x0, LBB0_27
; %bb.23:
	mov	x22, x0
	ldr	w23, [x0]
Lloh37:
	adrp	x8, _AMDGPU_RAS_BLOCK__SDMA@GOTPAGE
Lloh38:
	ldr	x8, [x8, _AMDGPU_RAS_BLOCK__SDMA@GOTPAGEOFF]
Lloh39:
	ldr	w0, [x8]
	bl	_BIT
	tst	w0, w23
	b.ne	LBB0_25
; %bb.24:
	ldr	w23, [x22]
Lloh40:
	adrp	x8, _AMDGPU_RAS_BLOCK__GFX@GOTPAGE
Lloh41:
	ldr	x8, [x8, _AMDGPU_RAS_BLOCK__GFX@GOTPAGEOFF]
Lloh42:
	ldr	w0, [x8]
	bl	_BIT
	tst	w0, w23
	b.eq	LBB0_31
LBB0_25:
Lloh43:
	adrp	x8, _HSA_CAP_SRAM_EDCSUPPORTED@GOTPAGE
Lloh44:
	ldr	x8, [x8, _HSA_CAP_SRAM_EDCSUPPORTED@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
LBB0_26:
	ldr	w9, [x21, #4]
	orr	w8, w9, w8
	str	w8, [x21, #4]
	ldr	w23, [x22]
Lloh46:
	adrp	x8, _AMDGPU_RAS_BLOCK__UMC@GOTPAGE
Lloh47:
	ldr	x8, [x8, _AMDGPU_RAS_BLOCK__UMC@GOTPAGEOFF]
Lloh48:
	ldr	w0, [x8]
	bl	_BIT
Lloh49:
	adrp	x8, _HSA_CAP_MEM_EDCSUPPORTED@GOTPAGE
Lloh50:
	ldr	x8, [x8, _HSA_CAP_MEM_EDCSUPPORTED@GOTPAGEOFF]
Lloh51:
	ldr	w8, [x8]
	tst	w0, w23
	csel	w8, wzr, w8, eq
	ldr	w9, [x21, #4]
	orr	w8, w8, w9
Lloh52:
	adrp	x9, _HSA_CAP_RASEVENTNOTIFY@GOTPAGE
Lloh53:
	ldr	x9, [x9, _HSA_CAP_RASEVENTNOTIFY@GOTPAGEOFF]
	ldr	w10, [x22]
Lloh54:
	ldr	w9, [x9]
	cmp	w10, #0
	csel	w9, wzr, w9, eq
	orr	w8, w9, w8
	str	w8, [x21, #4]
LBB0_27:
	bl	_kfd_debug_print_topology
	cbnz	w20, LBB0_29
; %bb.28:
	mov	x0, x19
	mov	w1, #1
	bl	_kfd_notify_gpu_change
LBB0_29:
	ldr	x0, [sp, #16]
	bl	_kfd_destroy_crat_image
LBB0_30:
	mov	x0, x20
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_31:
	mov	w8, #0
	b	LBB0_26
LBB0_32:
Lloh55:
	adrp	x21, _topology_lock@GOTPAGE
Lloh56:
	ldr	x21, [x21, _topology_lock@GOTPAGEOFF]
	mov	x0, x21
	bl	_down_write
Lloh57:
	adrp	x1, _topology_device_list@GOTPAGE
Lloh58:
	ldr	x1, [x1, _topology_device_list@GOTPAGEOFF]
	add	x0, sp, #24
	bl	_kfd_topology_update_device_list
	bl	_kfd_topology_update_sysfs
	mov	x20, x0
	mov	x0, x21
	bl	_up_write
	cbz	w20, LBB0_35
; %bb.33:
	str	x20, [sp]
Lloh59:
	adrp	x0, l_.str.3@PAGE
Lloh60:
	add	x0, x0, l_.str.3@PAGEOFF
	mov	x1, x19
	bl	_pr_err
	b	LBB0_36
LBB0_34:
Lloh61:
	adrp	x1, l_.str.5@PAGE
Lloh62:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	w0, #1
	bl	_WARN
	b	LBB0_17
LBB0_35:
Lloh63:
	adrp	x8, _sys_props@GOTPAGE
Lloh64:
	ldr	x8, [x8, _sys_props@GOTPAGEOFF]
	ldr	w9, [x8]
	add	w9, w9, #1
	str	w9, [x8]
LBB0_36:
	mov	x0, x22
	bl	_kfd_assign_gpu
	mov	x21, x0
	cmp	x0, #0
	cset	w0, eq
	bl	_WARN_ON
	cbz	x0, LBB0_2
; %bb.37:
Lloh65:
	adrp	x8, _ENODEV@GOTPAGE
Lloh66:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh67:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_29
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpAdd	Lloh59, Lloh60
	.loh AdrpAdd	Lloh61, Lloh62
	.loh AdrpLdrGot	Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Adding new GPU (ID: 0x%x) to topology\n"

	.comm	_topology_crat_proximity_domain,4,2 ; @topology_crat_proximity_domain
	.comm	_COMPUTE_UNIT_GPU,4,2           ; @COMPUTE_UNIT_GPU
l_.str.1:                               ; @.str.1
	.asciz	"Error creating VCRAT for GPU (ID: 0x%x)\n"

l_.str.2:                               ; @.str.2
	.asciz	"Error parsing VCRAT for GPU (ID: 0x%x)\n"

	.comm	_topology_lock,4,2              ; @topology_lock
	.comm	_topology_device_list,4,2       ; @topology_device_list
	.comm	_sys_props,4,2                  ; @sys_props
l_.str.3:                               ; @.str.3
	.asciz	"Failed to update GPU (ID: 0x%x) to sysfs topology. res=%d\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_KFD_TOPOLOGY_PUBLIC_NAME_SIZE,4,2 ; @KFD_TOPOLOGY_PUBLIC_NAME_SIZE
	.comm	_hws_gws_support,8,3            ; @hws_gws_support
	.comm	_KFD_SCHED_POLICY_NO_HWS,8,3    ; @KFD_SCHED_POLICY_NO_HWS
	.comm	_HSA_CAP_DOORBELL_TYPE_PRE_1_0,4,2 ; @HSA_CAP_DOORBELL_TYPE_PRE_1_0
	.comm	_HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT,4,2 ; @HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT
	.comm	_HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK,4,2 ; @HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK
l_.str.4:                               ; @.str.4
	.asciz	"Adding doorbell packet type capability\n"

	.comm	_HSA_CAP_DOORBELL_TYPE_1_0,4,2  ; @HSA_CAP_DOORBELL_TYPE_1_0
	.comm	_HSA_CAP_DOORBELL_TYPE_2_0,4,2  ; @HSA_CAP_DOORBELL_TYPE_2_0
l_.str.5:                               ; @.str.5
	.asciz	"Unexpected ASIC family %u"

	.comm	_HSA_CAP_ATS_PRESENT,4,2        ; @HSA_CAP_ATS_PRESENT
	.comm	_AMDGPU_RAS_BLOCK__SDMA,4,2     ; @AMDGPU_RAS_BLOCK__SDMA
	.comm	_AMDGPU_RAS_BLOCK__GFX,4,2      ; @AMDGPU_RAS_BLOCK__GFX
	.comm	_HSA_CAP_SRAM_EDCSUPPORTED,4,2  ; @HSA_CAP_SRAM_EDCSUPPORTED
	.comm	_AMDGPU_RAS_BLOCK__UMC,4,2      ; @AMDGPU_RAS_BLOCK__UMC
	.comm	_HSA_CAP_MEM_EDCSUPPORTED,4,2   ; @HSA_CAP_MEM_EDCSUPPORTED
	.comm	_HSA_CAP_RASEVENTNOTIFY,4,2     ; @HSA_CAP_RASEVENTNOTIFY
.subsections_via_symbols
