	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_dp_link_training_channel_equalization
_intel_dp_link_training_channel_equalization: ## @intel_dp_link_training_channel_equalization
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -32(%rbp)
	movq	_DP_LINK_STATUS_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	shlq	$2, %rax
	callq	____chkstk_darwin
	addq	$15, %rax
	andq	$-16, %rax
	subq	%rax, %rsp
	movq	%rsp, %r14
	movq	%r15, %rdi
	callq	_intel_dp_training_pattern
	movq	_DP_TRAINING_PATTERN_4@GOTPCREL(%rip), %rcx
	xorl	%esi, %esi
	cmpl	(%rcx), %eax
	je	LBB0_2
## %bb.1:
	movq	_DP_LINK_SCRAMBLING_DISABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
LBB0_2:
	orl	%eax, %esi
	movq	%r15, %rdi
	callq	_intel_dp_set_link_train
	testl	%eax, %eax
	je	LBB0_34
## %bb.3:
	movl	4(%r15), %edi
	callq	_drm_dp_link_train_channel_eq_delay
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_dp_get_link_status
	testl	%eax, %eax
	je	LBB0_4
## %bb.6:
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_drm_dp_clock_recovery_ok
	testl	%eax, %eax
	je	LBB0_7
## %bb.8:
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_drm_dp_channel_eq_ok
	testq	%rax, %rax
	je	LBB0_10
LBB0_9:
	leaq	L_.str.3(%rip), %rdi
	callq	_DRM_DEBUG_KMS
	movl	$1, %ebx
	jmp	LBB0_31
LBB0_34:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_ERROR
	xorl	%ebx, %ebx
	jmp	LBB0_32
LBB0_10:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_get_adjust_train
	movq	%r15, %rdi
	callq	_intel_dp_update_link_train
	testl	%eax, %eax
	je	LBB0_11
## %bb.12:
	movl	4(%r15), %edi
	callq	_drm_dp_link_train_channel_eq_delay
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_dp_get_link_status
	testl	%eax, %eax
	je	LBB0_4
## %bb.13:
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_drm_dp_clock_recovery_ok
	testl	%eax, %eax
	je	LBB0_7
## %bb.14:
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_drm_dp_channel_eq_ok
	testq	%rax, %rax
	jne	LBB0_9
## %bb.15:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_get_adjust_train
	movq	%r15, %rdi
	callq	_intel_dp_update_link_train
	testl	%eax, %eax
	je	LBB0_11
## %bb.16:
	movl	4(%r15), %edi
	callq	_drm_dp_link_train_channel_eq_delay
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_dp_get_link_status
	testl	%eax, %eax
	je	LBB0_4
## %bb.17:
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_drm_dp_clock_recovery_ok
	testl	%eax, %eax
	je	LBB0_7
## %bb.18:
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_drm_dp_channel_eq_ok
	testq	%rax, %rax
	jne	LBB0_9
## %bb.19:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_get_adjust_train
	movq	%r15, %rdi
	callq	_intel_dp_update_link_train
	testl	%eax, %eax
	je	LBB0_11
## %bb.20:
	movl	4(%r15), %edi
	callq	_drm_dp_link_train_channel_eq_delay
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_dp_get_link_status
	testl	%eax, %eax
	je	LBB0_4
## %bb.21:
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_drm_dp_clock_recovery_ok
	testl	%eax, %eax
	je	LBB0_7
## %bb.22:
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_drm_dp_channel_eq_ok
	testq	%rax, %rax
	jne	LBB0_9
## %bb.23:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_get_adjust_train
	movq	%r15, %rdi
	callq	_intel_dp_update_link_train
	testl	%eax, %eax
	je	LBB0_11
## %bb.24:
	movl	4(%r15), %edi
	callq	_drm_dp_link_train_channel_eq_delay
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_dp_get_link_status
	testl	%eax, %eax
	je	LBB0_4
## %bb.25:
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_drm_dp_clock_recovery_ok
	testl	%eax, %eax
	je	LBB0_7
## %bb.26:
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_drm_dp_channel_eq_ok
	testq	%rax, %rax
	jne	LBB0_9
## %bb.27:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_get_adjust_train
	movq	%r15, %rdi
	callq	_intel_dp_update_link_train
	testl	%eax, %eax
	je	LBB0_11
## %bb.28:
	movq	%r14, %rdi
	callq	_intel_dp_dump_link_status
	leaq	L_.str.5(%rip), %rdi
	jmp	LBB0_29
LBB0_4:
	leaq	L_.str.1(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_30
LBB0_7:
	movq	%r14, %rdi
	callq	_intel_dp_dump_link_status
	leaq	L_.str.2(%rip), %rdi
LBB0_29:
	callq	_DRM_DEBUG_KMS
LBB0_30:
	xorl	%ebx, %ebx
LBB0_31:
	movq	%r15, %rdi
	callq	_intel_dp_set_idle_link_train
LBB0_32:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-32(%rbp), %rax
	jne	LBB0_35
## %bb.33:
	movl	%ebx, %eax
	leaq	-24(%rbp), %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_11:
	leaq	L_.str.4(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_30
LBB0_35:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.comm	_DP_LINK_STATUS_SIZE,4,2        ## @DP_LINK_STATUS_SIZE
	.comm	_DP_TRAINING_PATTERN_4,4,2      ## @DP_TRAINING_PATTERN_4
	.comm	_DP_LINK_SCRAMBLING_DISABLE,4,2 ## @DP_LINK_SCRAMBLING_DISABLE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to start channel equalization\n"

L_.str.1:                               ## @.str.1
	.asciz	"failed to get link status\n"

L_.str.2:                               ## @.str.2
	.asciz	"Clock recovery check failed, cannot continue channel equalization\n"

L_.str.3:                               ## @.str.3
	.asciz	"Channel EQ done. DP Training successful\n"

L_.str.4:                               ## @.str.4
	.asciz	"failed to update link training\n"

L_.str.5:                               ## @.str.5
	.asciz	"Channel equalization failed 5 times\n"

	.no_dead_strip	_intel_dp_link_training_channel_equalization
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_dp_link_training_channel_equalization
_intel_dp_link_training_channel_equalization: ; @intel_dp_link_training_channel_equalization
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	sub	sp, sp, #16
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	stur	x8, [x29, #-24]
Lloh3:
	adrp	x8, _DP_LINK_STATUS_SIZE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DP_LINK_STATUS_SIZE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	lsl	x8, x8, #2
	mov	x9, x8
Lloh6:
	adrp	x16, ___chkstk_darwin@GOTPAGE
Lloh7:
	ldr	x16, [x16, ___chkstk_darwin@GOTPAGEOFF]
	blr	x16
	mov	x9, sp
	add	x8, x8, #15
	and	x8, x8, #0x7fffffff0
	sub	x20, x9, x8
	mov	sp, x20
	bl	_intel_dp_training_pattern
Lloh8:
	adrp	x8, _DP_TRAINING_PATTERN_4@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DP_TRAINING_PATTERN_4@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
Lloh11:
	adrp	x9, _DP_LINK_SCRAMBLING_DISABLE@GOTPAGE
Lloh12:
	ldr	x9, [x9, _DP_LINK_SCRAMBLING_DISABLE@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	cmp	w0, w8
	csel	w8, wzr, w9, eq
	orr	w1, w8, w0
	mov	x0, x19
	bl	_intel_dp_set_link_train
	cbz	w0, LBB0_5
; %bb.1:
	ldr	w0, [x19, #4]
	bl	_drm_dp_link_train_channel_eq_delay
	mov	x0, x19
	mov	x1, x20
	bl	_intel_dp_get_link_status
	cbz	w0, LBB0_24
; %bb.2:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_drm_dp_clock_recovery_ok
	cbz	w0, LBB0_25
; %bb.3:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_drm_dp_channel_eq_ok
	cbz	x0, LBB0_6
LBB0_4:
Lloh14:
	adrp	x0, l_.str.3@PAGE
Lloh15:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_DEBUG_KMS
	mov	w20, #1
	b	LBB0_28
LBB0_5:
Lloh16:
	adrp	x0, l_.str@PAGE
Lloh17:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
	mov	w20, #0
	b	LBB0_29
LBB0_6:
	mov	x0, x19
	mov	x1, x20
	bl	_intel_get_adjust_train
	mov	x0, x19
	bl	_intel_dp_update_link_train
	cbz	w0, LBB0_31
; %bb.7:
	ldr	w0, [x19, #4]
	bl	_drm_dp_link_train_channel_eq_delay
	mov	x0, x19
	mov	x1, x20
	bl	_intel_dp_get_link_status
	cbz	w0, LBB0_24
; %bb.8:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_drm_dp_clock_recovery_ok
	cbz	w0, LBB0_25
; %bb.9:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_drm_dp_channel_eq_ok
	cbnz	x0, LBB0_4
; %bb.10:
	mov	x0, x19
	mov	x1, x20
	bl	_intel_get_adjust_train
	mov	x0, x19
	bl	_intel_dp_update_link_train
	cbz	w0, LBB0_31
; %bb.11:
	ldr	w0, [x19, #4]
	bl	_drm_dp_link_train_channel_eq_delay
	mov	x0, x19
	mov	x1, x20
	bl	_intel_dp_get_link_status
	cbz	w0, LBB0_24
; %bb.12:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_drm_dp_clock_recovery_ok
	cbz	w0, LBB0_25
; %bb.13:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_drm_dp_channel_eq_ok
	cbnz	x0, LBB0_4
; %bb.14:
	mov	x0, x19
	mov	x1, x20
	bl	_intel_get_adjust_train
	mov	x0, x19
	bl	_intel_dp_update_link_train
	cbz	w0, LBB0_31
; %bb.15:
	ldr	w0, [x19, #4]
	bl	_drm_dp_link_train_channel_eq_delay
	mov	x0, x19
	mov	x1, x20
	bl	_intel_dp_get_link_status
	cbz	w0, LBB0_24
; %bb.16:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_drm_dp_clock_recovery_ok
	cbz	w0, LBB0_25
; %bb.17:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_drm_dp_channel_eq_ok
	cbnz	x0, LBB0_4
; %bb.18:
	mov	x0, x19
	mov	x1, x20
	bl	_intel_get_adjust_train
	mov	x0, x19
	bl	_intel_dp_update_link_train
	cbz	w0, LBB0_31
; %bb.19:
	ldr	w0, [x19, #4]
	bl	_drm_dp_link_train_channel_eq_delay
	mov	x0, x19
	mov	x1, x20
	bl	_intel_dp_get_link_status
	cbz	w0, LBB0_24
; %bb.20:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_drm_dp_clock_recovery_ok
	cbz	w0, LBB0_25
; %bb.21:
	ldr	w1, [x19]
	mov	x0, x20
	bl	_drm_dp_channel_eq_ok
	cbnz	x0, LBB0_4
; %bb.22:
	mov	x0, x19
	mov	x1, x20
	bl	_intel_get_adjust_train
	mov	x0, x19
	bl	_intel_dp_update_link_train
	cbz	w0, LBB0_31
; %bb.23:
	mov	x0, x20
	bl	_intel_dp_dump_link_status
Lloh18:
	adrp	x0, l_.str.5@PAGE
Lloh19:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_26
LBB0_24:
Lloh20:
	adrp	x0, l_.str.1@PAGE
Lloh21:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_27
LBB0_25:
	mov	x0, x20
	bl	_intel_dp_dump_link_status
Lloh22:
	adrp	x0, l_.str.2@PAGE
Lloh23:
	add	x0, x0, l_.str.2@PAGEOFF
LBB0_26:
	bl	_DRM_DEBUG_KMS
LBB0_27:
	mov	w20, #0
LBB0_28:
	mov	x0, x19
	bl	_intel_dp_set_idle_link_train
LBB0_29:
	ldur	x8, [x29, #-24]
Lloh24:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh25:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh26:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_32
; %bb.30:
	mov	x0, x20
	sub	sp, x29, #16
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_31:
Lloh27:
	adrp	x0, l_.str.4@PAGE
Lloh28:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_27
LBB0_32:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpAdd	Lloh27, Lloh28
	.cfi_endproc
                                        ; -- End function
	.comm	_DP_LINK_STATUS_SIZE,4,2        ; @DP_LINK_STATUS_SIZE
	.comm	_DP_TRAINING_PATTERN_4,4,2      ; @DP_TRAINING_PATTERN_4
	.comm	_DP_LINK_SCRAMBLING_DISABLE,4,2 ; @DP_LINK_SCRAMBLING_DISABLE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to start channel equalization\n"

l_.str.1:                               ; @.str.1
	.asciz	"failed to get link status\n"

l_.str.2:                               ; @.str.2
	.asciz	"Clock recovery check failed, cannot continue channel equalization\n"

l_.str.3:                               ; @.str.3
	.asciz	"Channel EQ done. DP Training successful\n"

l_.str.4:                               ; @.str.4
	.asciz	"failed to update link training\n"

l_.str.5:                               ; @.str.5
	.asciz	"Channel equalization failed 5 times\n"

	.no_dead_strip	_intel_dp_link_training_channel_equalization
.subsections_via_symbols
