	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_uvd_send_msg
_amdgpu_uvd_send_msg:                   ## @amdgpu_uvd_send_msg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, -96(%rbp)                 ## 8-byte Spill
	movl	%edx, -84(%rbp)                 ## 4-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %r15
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	movq	%rsi, -104(%rbp)
	movq	8(%rdi), %r13
	movq	$0, -80(%rbp)
	movq	_UVD_BASE_SI@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, -60(%rbp)
	movq	%rsi, %rdi
	callq	_amdgpu_bo_kunmap
	movq	%r12, %rdi
	callq	_amdgpu_bo_unpin
	movq	8(%r15), %rax
	cmpl	$0, 20(%rax)
	je	LBB0_1
LBB0_2:
	leaq	-72(%rbp), %rdx
	movq	%r13, %rdi
	movl	$64, %esi
	callq	_amdgpu_job_alloc_with_ib
	movq	%rax, %r14
	testq	%rax, %rax
	jne	LBB0_15
## %bb.3:
	movq	(%r13), %rax
	movq	_CHIP_VEGA10@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_5
## %bb.4:
	movl	(%r15), %eax
	incl	%eax
	movq	8(%r13), %rcx
	movq	_UVD_HWIP@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	(%rcx,%rdx,8), %rcx
	movq	(%rcx), %rdx
	movl	4(%rdx), %edx
	movl	%edx, -56(%rbp)
	movq	8(%rcx), %rcx
	movl	4(%rcx), %ecx
	movl	%ecx, -52(%rbp)
	movl	-60(%rbp,%rax,4), %ebx
LBB0_5:
	movq	%r13, -112(%rbp)                ## 8-byte Spill
	movl	%ebx, %r13d
	movq	_UVD_GPCOM_VCPU_DATA0@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	%r13, %rdi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rax, -128(%rbp)                ## 8-byte Spill
	movq	_UVD_GPCOM_VCPU_DATA1@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	%r13, %rdi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rax, -120(%rbp)                ## 8-byte Spill
	movq	_UVD_GPCOM_VCPU_CMD@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	%r13, %rdi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rax, %r14
	movq	_UVD_NO_OP@GOTPCREL(%rip), %rax
	addq	(%rax), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rax, %rbx
	movq	-72(%rbp), %rax
	movq	8(%rax), %r13
	movq	%r12, %rdi
	callq	_amdgpu_bo_gpu_offset
	movq	(%r13), %rcx
	movq	-128(%rbp), %rdx                ## 8-byte Reload
	movl	%edx, (%rcx)
	movl	%eax, 4(%rcx)
	movq	-120(%rbp), %rax                ## 8-byte Reload
	movl	%eax, 8(%rcx)
	movl	%r14d, 16(%rcx)
	movl	$0, 20(%rcx)
	movl	%ebx, 24(%rcx)
	movl	$0, 28(%rcx)
	movl	%ebx, 32(%rcx)
	movl	$0, 36(%rcx)
	movl	%ebx, 40(%rcx)
	movl	$0, 44(%rcx)
	movl	%ebx, 48(%rcx)
	movl	$0, 52(%rcx)
	movl	%ebx, 56(%rcx)
	movl	$0, 60(%rcx)
	movl	$16, 8(%r13)
	cmpl	$0, -84(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_8
## %bb.6:
	movl	(%r12), %ebx
	movl	$10, %edi
	callq	_msecs_to_jiffies
	xorl	%r14d, %r14d
	movl	%ebx, %edi
	movl	$1, %esi
	xorl	%edx, %edx
	movl	%eax, %ecx
	callq	_dma_resv_wait_timeout_rcu
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rcx
	subq	(%rcx), %r14
	testq	%rax, %rax
	cmovneq	%rax, %r14
	testq	%r14, %r14
	movq	-96(%rbp), %r13                 ## 8-byte Reload
	js	LBB0_14
## %bb.7:
	movq	-72(%rbp), %rdi
	leaq	-80(%rbp), %rdx
	movq	%r15, %rsi
	callq	_amdgpu_job_submit_direct
	jmp	LBB0_10
LBB0_1:
	movq	$1, -72(%rbp)
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_amdgpu_bo_placement_from_domain
	movq	%r12, %rdi
	callq	_amdgpu_uvd_force_into_uvd_segment
	leaq	4(%r12), %rsi
	leaq	-72(%rbp), %rdx
	movq	%r12, %rdi
	callq	_ttm_bo_validate
	movq	%rax, %r14
	testq	%rax, %rax
	jne	LBB0_15
	jmp	LBB0_2
LBB0_8:
	movq	-72(%rbp), %rsi
	movl	(%r12), %edx
	movq	_AMDGPU_FENCE_OWNER_UNDEFINED@GOTPCREL(%rip), %r15
	movl	(%r15), %ecx
	movq	-112(%rbp), %rbx                ## 8-byte Reload
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	_amdgpu_sync_resv
	movq	%rax, %r14
	testq	%rax, %rax
	movq	-96(%rbp), %r13                 ## 8-byte Reload
	jne	LBB0_14
## %bb.9:
	movq	-72(%rbp), %rdi
	addq	$16, %rbx
	movl	(%r15), %edx
	leaq	-80(%rbp), %rcx
	movq	%rbx, %rsi
	callq	_amdgpu_job_submit
LBB0_10:
	movq	%rax, %r14
	testq	%rax, %rax
	je	LBB0_11
LBB0_14:
	movq	-72(%rbp), %rdi
	callq	_amdgpu_job_free
LBB0_15:
	movq	%r12, %rdi
	callq	_amdgpu_bo_unreserve
	leaq	-104(%rbp), %rdi
	callq	_amdgpu_bo_unref
LBB0_16:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_18
## %bb.17:
	movl	%r14d, %eax
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_11:
	movq	-80(%rbp), %rsi
	xorl	%r14d, %r14d
	movq	%r12, %rdi
	xorl	%edx, %edx
	callq	_amdgpu_bo_fence
	movq	%r12, %rdi
	callq	_amdgpu_bo_unreserve
	leaq	-104(%rbp), %rdi
	callq	_amdgpu_bo_unref
	testq	%r13, %r13
	je	LBB0_13
## %bb.12:
	movq	-80(%rbp), %rdi
	callq	_dma_fence_get
	movq	%rax, (%r13)
LBB0_13:
	movq	-80(%rbp), %rdi
	callq	_dma_fence_put
	jmp	LBB0_16
LBB0_18:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.comm	_UVD_BASE_SI,4,2                ## @UVD_BASE_SI
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ## @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_CHIP_VEGA10,8,3                ## @CHIP_VEGA10
	.comm	_UVD_HWIP,8,3                   ## @UVD_HWIP
	.comm	_UVD_GPCOM_VCPU_DATA0,8,3       ## @UVD_GPCOM_VCPU_DATA0
	.comm	_UVD_GPCOM_VCPU_DATA1,8,3       ## @UVD_GPCOM_VCPU_DATA1
	.comm	_UVD_GPCOM_VCPU_CMD,8,3         ## @UVD_GPCOM_VCPU_CMD
	.comm	_UVD_NO_OP,8,3                  ## @UVD_NO_OP
	.comm	_ETIMEDOUT,8,3                  ## @ETIMEDOUT
	.comm	_AMDGPU_FENCE_OWNER_UNDEFINED,4,2 ## @AMDGPU_FENCE_OWNER_UNDEFINED
	.no_dead_strip	_amdgpu_uvd_send_msg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_uvd_send_msg
_amdgpu_uvd_send_msg:                   ; @amdgpu_uvd_send_msg
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x3
	mov	x23, x2
	mov	x20, x1
	mov	x21, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #40]
	stp	xzr, x1, [sp, #8]
	ldr	x22, [x0, #8]
Lloh3:
	adrp	x8, _UVD_BASE_SI@GOTPAGE
Lloh4:
	ldr	x8, [x8, _UVD_BASE_SI@GOTPAGEOFF]
Lloh5:
	ldr	w25, [x8]
	str	w25, [sp, #28]
	mov	x0, x1
	bl	_amdgpu_bo_kunmap
	mov	x0, x20
	bl	_amdgpu_bo_unpin
	ldr	x8, [x21, #8]
	ldr	w8, [x8, #20]
	cbz	w8, LBB0_7
LBB0_1:
	mov	x2, sp
	mov	x0, x22
	mov	w1, #64
	bl	_amdgpu_job_alloc_with_ib
	mov	x24, x0
	cbnz	x0, LBB0_11
; %bb.2:
	ldr	x8, [x22]
Lloh6:
	adrp	x9, _CHIP_VEGA10@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CHIP_VEGA10@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_4
; %bb.3:
	ldr	w8, [x21]
	add	w8, w8, #1
	ldr	x9, [x22, #8]
Lloh9:
	adrp	x10, _UVD_HWIP@GOTPAGE
Lloh10:
	ldr	x10, [x10, _UVD_HWIP@GOTPAGEOFF]
Lloh11:
	ldr	x10, [x10]
	ldr	x9, [x9, x10, lsl #3]
	ldp	x10, x9, [x9]
	ldr	w10, [x10, #4]
	ldr	w9, [x9, #4]
	stp	w10, w9, [sp, #32]
	add	x9, sp, #28
	ldr	w25, [x9, w8, uxtw #2]
LBB0_4:
	mov	w27, w25
Lloh12:
	adrp	x8, _UVD_GPCOM_VCPU_DATA0@GOTPAGE
Lloh13:
	ldr	x8, [x8, _UVD_GPCOM_VCPU_DATA0@GOTPAGEOFF]
Lloh14:
	ldr	x8, [x8]
	add	x0, x8, x27
	mov	w1, #0
	bl	_PACKET0
	mov	x24, x0
Lloh15:
	adrp	x8, _UVD_GPCOM_VCPU_DATA1@GOTPAGE
Lloh16:
	ldr	x8, [x8, _UVD_GPCOM_VCPU_DATA1@GOTPAGEOFF]
Lloh17:
	ldr	x8, [x8]
	add	x0, x8, x27
	mov	w1, #0
	bl	_PACKET0
	mov	x25, x0
Lloh18:
	adrp	x8, _UVD_GPCOM_VCPU_CMD@GOTPAGE
Lloh19:
	ldr	x8, [x8, _UVD_GPCOM_VCPU_CMD@GOTPAGEOFF]
Lloh20:
	ldr	x8, [x8]
	add	x0, x8, x27
	mov	w1, #0
	bl	_PACKET0
	mov	x26, x0
Lloh21:
	adrp	x8, _UVD_NO_OP@GOTPAGE
Lloh22:
	ldr	x8, [x8, _UVD_NO_OP@GOTPAGEOFF]
Lloh23:
	ldr	x8, [x8]
	add	x0, x8, x27
	mov	w1, #0
	bl	_PACKET0
	mov	x27, x0
	ldr	x8, [sp]
	ldr	x28, [x8, #8]
	mov	x0, x20
	bl	_amdgpu_bo_gpu_offset
	ldr	x8, [x28]
	stp	w24, w0, [x8]
	str	w25, [x8, #8]
	stp	w26, wzr, [x8, #16]
	stp	w27, wzr, [x8, #24]
	stp	w27, wzr, [x8, #32]
	stp	w27, wzr, [x8, #40]
	stp	w27, wzr, [x8, #48]
	stp	w27, wzr, [x8, #56]
	mov	w8, #16
	str	w8, [x28, #8]
	cbz	w23, LBB0_8
; %bb.5:
	ldr	w22, [x20]
	mov	w0, #10
	bl	_msecs_to_jiffies
	mov	x3, x0
	mov	x0, x22
	mov	w1, #1
	mov	w2, #0
	bl	_dma_resv_wait_timeout_rcu
Lloh24:
	adrp	x8, _ETIMEDOUT@GOTPAGE
Lloh25:
	ldr	x8, [x8, _ETIMEDOUT@GOTPAGEOFF]
Lloh26:
	ldr	x8, [x8]
	cmp	x0, #0
	csneg	x24, x0, x8, ne
	tbnz	x24, #63, LBB0_10
; %bb.6:
	ldr	x0, [sp]
	add	x2, sp, #8
	mov	x1, x21
	bl	_amdgpu_job_submit_direct
	mov	x24, x0
	cbnz	x0, LBB0_10
	b	LBB0_14
LBB0_7:
	mov	w8, #1
	str	x8, [sp]
Lloh27:
	adrp	x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGE
Lloh28:
	ldr	x8, [x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_amdgpu_bo_placement_from_domain
	mov	x0, x20
	bl	_amdgpu_uvd_force_into_uvd_segment
	add	x1, x20, #4
	mov	x2, sp
	mov	x0, x20
	bl	_ttm_bo_validate
	mov	x24, x0
	cbnz	x0, LBB0_11
	b	LBB0_1
LBB0_8:
	ldr	x1, [sp]
	ldr	w2, [x20]
Lloh30:
	adrp	x21, _AMDGPU_FENCE_OWNER_UNDEFINED@GOTPAGE
Lloh31:
	ldr	x21, [x21, _AMDGPU_FENCE_OWNER_UNDEFINED@GOTPAGEOFF]
	ldr	w3, [x21]
	mov	x0, x22
	mov	w4, #0
	bl	_amdgpu_sync_resv
	mov	x24, x0
	cbnz	x0, LBB0_10
; %bb.9:
	ldr	x0, [sp]
	add	x1, x22, #16
	ldr	w2, [x21]
	add	x3, sp, #8
	bl	_amdgpu_job_submit
	mov	x24, x0
	cbz	x0, LBB0_14
LBB0_10:
	ldr	x0, [sp]
	bl	_amdgpu_job_free
LBB0_11:
	mov	x0, x20
	bl	_amdgpu_bo_unreserve
	add	x0, sp, #16
	bl	_amdgpu_bo_unref
LBB0_12:
	ldr	x8, [sp, #40]
Lloh32:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh33:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh34:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_17
; %bb.13:
	mov	x0, x24
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
LBB0_14:
	ldr	x1, [sp, #8]
	mov	x0, x20
	mov	w2, #0
	bl	_amdgpu_bo_fence
	mov	x0, x20
	bl	_amdgpu_bo_unreserve
	add	x0, sp, #16
	bl	_amdgpu_bo_unref
	cbz	x19, LBB0_16
; %bb.15:
	ldr	x0, [sp, #8]
	bl	_dma_fence_get
	str	x0, [x19]
LBB0_16:
	ldr	x0, [sp, #8]
	bl	_dma_fence_put
	mov	w24, #0
	b	LBB0_12
LBB0_17:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.cfi_endproc
                                        ; -- End function
	.comm	_UVD_BASE_SI,4,2                ; @UVD_BASE_SI
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ; @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_CHIP_VEGA10,8,3                ; @CHIP_VEGA10
	.comm	_UVD_HWIP,8,3                   ; @UVD_HWIP
	.comm	_UVD_GPCOM_VCPU_DATA0,8,3       ; @UVD_GPCOM_VCPU_DATA0
	.comm	_UVD_GPCOM_VCPU_DATA1,8,3       ; @UVD_GPCOM_VCPU_DATA1
	.comm	_UVD_GPCOM_VCPU_CMD,8,3         ; @UVD_GPCOM_VCPU_CMD
	.comm	_UVD_NO_OP,8,3                  ; @UVD_NO_OP
	.comm	_ETIMEDOUT,8,3                  ; @ETIMEDOUT
	.comm	_AMDGPU_FENCE_OWNER_UNDEFINED,4,2 ; @AMDGPU_FENCE_OWNER_UNDEFINED
	.no_dead_strip	_amdgpu_uvd_send_msg
.subsections_via_symbols
