	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdma_v3_0_gfx_stop
_sdma_v3_0_gfx_stop:                    ## @sdma_v3_0_gfx_stop
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	8(%rdi), %rbx
	movq	16(%rdi), %rax
	cmpq	%rbx, %rax
	je	LBB0_2
## %bb.1:
	leaq	4(%rbx), %rcx
	cmpq	%rcx, %rax
	jne	LBB0_3
LBB0_2:
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ttm_set_buffer_funcs_status
LBB0_3:
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	cmpl	$0, (%r15)
	jle	LBB0_6
## %bb.4:
	xorl	%ebx, %ebx
	movq	_mmSDMA0_GFX_RB_CNTL@GOTPCREL(%rip), %r12
	movq	_sdma_offsets@GOTPCREL(%rip), %r13
	movq	_mmSDMA0_GFX_IB_CNTL@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r13), %rax
	movq	(%rax,%rbx,8), %rdi
	addq	(%r12), %rdi
	callq	_RREG32
	movq	_SDMA0_GFX_RB_CNTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_RB_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movq	(%r13), %rcx
	movq	(%rcx,%rbx,8), %rdi
	addq	(%r12), %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	(%r13), %rax
	movq	(%rax,%rbx,8), %rdi
	addq	(%r14), %rdi
	callq	_RREG32
	movq	_SDMA0_GFX_IB_CNTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_IB_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movq	(%r13), %rcx
	movq	(%rcx,%rbx,8), %rdi
	addq	(%r14), %rdi
	movl	%eax, %esi
	callq	_WREG32
	incq	%rbx
	movslq	(%r15), %rax
	cmpq	%rax, %rbx
	jl	LBB0_5
LBB0_6:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	$0, (%rax)
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_mmSDMA0_GFX_RB_CNTL,8,3        ## @mmSDMA0_GFX_RB_CNTL
	.comm	_sdma_offsets,8,3               ## @sdma_offsets
	.comm	_SDMA0_GFX_RB_CNTL,4,2          ## @SDMA0_GFX_RB_CNTL
	.comm	_RB_ENABLE,4,2                  ## @RB_ENABLE
	.comm	_mmSDMA0_GFX_IB_CNTL,8,3        ## @mmSDMA0_GFX_IB_CNTL
	.comm	_SDMA0_GFX_IB_CNTL,4,2          ## @SDMA0_GFX_IB_CNTL
	.comm	_IB_ENABLE,4,2                  ## @IB_ENABLE
	.no_dead_strip	_sdma_v3_0_gfx_stop
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdma_v3_0_gfx_stop
_sdma_v3_0_gfx_stop:                    ; @sdma_v3_0_gfx_stop
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldp	x10, x8, [x0, #8]
	add	x9, x10, #4
	str	x10, [sp, #8]                   ; 8-byte Folded Spill
	cmp	x8, x10
	ccmp	x8, x9, #4, ne
	b.ne	LBB0_2
; %bb.1:
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ttm_set_buffer_funcs_status
LBB0_2:
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_5
; %bb.3:
	mov	x21, #0
Lloh0:
	adrp	x22, _mmSDMA0_GFX_RB_CNTL@GOTPAGE
Lloh1:
	ldr	x22, [x22, _mmSDMA0_GFX_RB_CNTL@GOTPAGEOFF]
Lloh2:
	adrp	x23, _sdma_offsets@GOTPAGE
Lloh3:
	ldr	x23, [x23, _sdma_offsets@GOTPAGEOFF]
Lloh4:
	adrp	x24, _SDMA0_GFX_RB_CNTL@GOTPAGE
Lloh5:
	ldr	x24, [x24, _SDMA0_GFX_RB_CNTL@GOTPAGEOFF]
Lloh6:
	adrp	x25, _RB_ENABLE@GOTPAGE
Lloh7:
	ldr	x25, [x25, _RB_ENABLE@GOTPAGEOFF]
Lloh8:
	adrp	x26, _mmSDMA0_GFX_IB_CNTL@GOTPAGE
Lloh9:
	ldr	x26, [x26, _mmSDMA0_GFX_IB_CNTL@GOTPAGEOFF]
Lloh10:
	adrp	x27, _SDMA0_GFX_IB_CNTL@GOTPAGE
Lloh11:
	ldr	x27, [x27, _SDMA0_GFX_IB_CNTL@GOTPAGEOFF]
Lloh12:
	adrp	x28, _IB_ENABLE@GOTPAGE
Lloh13:
	ldr	x28, [x28, _IB_ENABLE@GOTPAGEOFF]
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x22]
	ldr	x9, [x23]
	lsl	x20, x21, #3
	ldr	x9, [x9, x20]
	add	x0, x9, x8
	bl	_RREG32
	ldr	w1, [x24]
	ldr	w2, [x25]
	mov	w3, #0
	bl	_REG_SET_FIELD
	mov	x1, x0
	ldr	x8, [x22]
	ldr	x9, [x23]
	ldr	x9, [x9, x20]
	add	x0, x9, x8
	bl	_WREG32
	ldr	x8, [x26]
	ldr	x9, [x23]
	ldr	x9, [x9, x20]
	add	x0, x9, x8
	bl	_RREG32
	ldr	w1, [x27]
	ldr	w2, [x28]
	mov	w3, #0
	bl	_REG_SET_FIELD
	mov	x1, x0
	ldr	x8, [x26]
	ldr	x9, [x23]
	ldr	x9, [x9, x20]
	add	x0, x9, x8
	bl	_WREG32
	add	x21, x21, #1
	ldrsw	x8, [x19]
	cmp	x21, x8
	b.lt	LBB0_4
LBB0_5:
	ldr	x8, [sp, #8]                    ; 8-byte Folded Reload
	str	xzr, [x8]
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_mmSDMA0_GFX_RB_CNTL,8,3        ; @mmSDMA0_GFX_RB_CNTL
	.comm	_sdma_offsets,8,3               ; @sdma_offsets
	.comm	_SDMA0_GFX_RB_CNTL,4,2          ; @SDMA0_GFX_RB_CNTL
	.comm	_RB_ENABLE,4,2                  ; @RB_ENABLE
	.comm	_mmSDMA0_GFX_IB_CNTL,8,3        ; @mmSDMA0_GFX_IB_CNTL
	.comm	_SDMA0_GFX_IB_CNTL,4,2          ; @SDMA0_GFX_IB_CNTL
	.comm	_IB_ENABLE,4,2                  ; @IB_ENABLE
	.no_dead_strip	_sdma_v3_0_gfx_stop
.subsections_via_symbols
