	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_pm_compute_clocks       ## -- Begin function amdgpu_pm_compute_clocks
	.p2align	4, 0x90
_amdgpu_pm_compute_clocks:              ## @amdgpu_pm_compute_clocks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$0, 36(%rdi)
	je	LBB0_17
## %bb.1:
	movq	%rdi, %r15
	cmpq	$0, 72(%rdi)
	je	LBB0_3
## %bb.2:
	movq	%r15, %rdi
	callq	_amdgpu_display_bandwidth_update
LBB0_3:
	movq	_AMDGPU_MAX_RINGS@GOTPCREL(%rip), %r14
	movl	(%r14), %eax
	testl	%eax, %eax
	jle	LBB0_9
## %bb.4:
	xorl	%ebx, %ebx
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_8:                                 ##   in Loop: Header=BB0_5 Depth=1
	incq	%rbx
	movslq	%eax, %rcx
	cmpq	%rcx, %rbx
	jge	LBB0_9
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	64(%r15), %rcx
	movq	(%rcx,%rbx,8), %rdi
	testq	%rdi, %rdi
	je	LBB0_8
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	cmpq	$0, (%rdi)
	je	LBB0_8
## %bb.7:                               ##   in Loop: Header=BB0_5 Depth=1
	callq	_amdgpu_fence_wait_empty
	movl	(%r14), %eax
	jmp	LBB0_8
LBB0_9:
	movq	%r15, %rdi
	callq	_is_support_sw_smu
	testq	%rax, %rax
	je	LBB0_10
## %bb.18:
	movl	56(%r15), %esi
	addq	$56, %r15
	movq	_AMD_PP_TASK_DISPLAY_CONFIG_CHANGE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_smu_handle_task                ## TAILCALL
LBB0_17:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	movq	48(%r15), %rax
	cmpq	$0, 8(%rax)
	je	LBB0_16
## %bb.11:
	movq	%r15, %rdi
	callq	_amdgpu_device_has_dc_support
	testl	%eax, %eax
	jne	LBB0_15
## %bb.12:
	movq	%r15, %rdi
	callq	_mutex_lock
	movq	%r15, %rdi
	callq	_amdgpu_dpm_get_active_displays
	movl	32(%r15), %eax
	movl	%eax, 24(%r15)
	movq	%r15, %rdi
	callq	_amdgpu_dpm_get_vrefresh
	movl	%eax, 8(%r15)
	movq	%r15, %rdi
	callq	_amdgpu_dpm_get_vblank_time
	xorl	%ecx, %ecx
	cmpl	$121, 8(%r15)
	cmovlq	%rax, %rcx
	movq	%rcx, 16(%r15)
	movq	48(%r15), %rax
	movq	(%rax), %rax
	testq	%rax, %rax
	je	LBB0_14
## %bb.13:
	leaq	8(%r15), %rsi
	movl	40(%r15), %edi
	callq	*%rax
LBB0_14:
	movq	%r15, %rdi
	callq	_mutex_unlock
LBB0_15:
	movq	_AMD_PP_TASK_DISPLAY_CONFIG_CHANGE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_dpm_dispatch_task       ## TAILCALL
LBB0_16:
	movq	%r15, %rdi
	callq	_mutex_lock
	movq	%r15, %rdi
	callq	_amdgpu_dpm_get_active_displays
	movq	%r15, %rdi
	callq	_amdgpu_dpm_change_power_state_locked
	movq	%r15, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mutex_unlock                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_MAX_RINGS,4,2           ## @AMDGPU_MAX_RINGS
	.comm	_AMD_PP_TASK_DISPLAY_CONFIG_CHANGE,4,2 ## @AMD_PP_TASK_DISPLAY_CONFIG_CHANGE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_pm_compute_clocks       ; -- Begin function amdgpu_pm_compute_clocks
	.p2align	2
_amdgpu_pm_compute_clocks:              ; @amdgpu_pm_compute_clocks
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	w8, [x0, #36]
	cbz	w8, LBB0_11
; %bb.1:
	mov	x19, x0
	ldr	x8, [x0, #72]
	cbz	x8, LBB0_3
; %bb.2:
	mov	x0, x19
	bl	_amdgpu_display_bandwidth_update
LBB0_3:
Lloh0:
	adrp	x20, _AMDGPU_MAX_RINGS@GOTPAGE
Lloh1:
	ldr	x20, [x20, _AMDGPU_MAX_RINGS@GOTPAGEOFF]
	ldr	w8, [x20]
	cmp	w8, #1
	b.lt	LBB0_9
; %bb.4:
	mov	x21, #0
	b	LBB0_6
LBB0_5:                                 ;   in Loop: Header=BB0_6 Depth=1
	add	x21, x21, #1
	cmp	x21, w8, sxtw
	b.ge	LBB0_9
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x19, #64]
	ldr	x0, [x9, x21, lsl #3]
	cbz	x0, LBB0_5
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	ldr	x9, [x0]
	cbz	x9, LBB0_5
; %bb.8:                                ;   in Loop: Header=BB0_6 Depth=1
	bl	_amdgpu_fence_wait_empty
	ldr	w8, [x20]
	b	LBB0_5
LBB0_9:
	mov	x0, x19
	bl	_is_support_sw_smu
	cbz	x0, LBB0_12
; %bb.10:
	ldr	w1, [x19, #56]!
Lloh2:
	adrp	x8, _AMD_PP_TASK_DISPLAY_CONFIG_CHANGE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _AMD_PP_TASK_DISPLAY_CONFIG_CHANGE@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_smu_handle_task
LBB0_11:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_12:
	ldr	x8, [x19, #48]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_18
; %bb.13:
	mov	x0, x19
	bl	_amdgpu_device_has_dc_support
	cbnz	w0, LBB0_17
; %bb.14:
	mov	x0, x19
	bl	_mutex_lock
	mov	x0, x19
	bl	_amdgpu_dpm_get_active_displays
	ldr	w8, [x19, #32]
	str	w8, [x19, #24]
	mov	x0, x19
	bl	_amdgpu_dpm_get_vrefresh
	mov	x20, x19
	str	w0, [x20, #8]!
	mov	x0, x19
	bl	_amdgpu_dpm_get_vblank_time
	ldr	w8, [x20]
	cmp	w8, #120
	csel	x8, xzr, x0, gt
	str	x8, [x19, #16]
	ldr	x8, [x19, #48]
	ldr	x8, [x8]
	cbz	x8, LBB0_16
; %bb.15:
	ldr	w0, [x19, #40]
	mov	x1, x20
	blr	x8
LBB0_16:
	mov	x0, x19
	bl	_mutex_unlock
LBB0_17:
Lloh5:
	adrp	x8, _AMD_PP_TASK_DISPLAY_CONFIG_CHANGE@GOTPAGE
Lloh6:
	ldr	x8, [x8, _AMD_PP_TASK_DISPLAY_CONFIG_CHANGE@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_amdgpu_dpm_dispatch_task
LBB0_18:
	mov	x0, x19
	bl	_mutex_lock
	mov	x0, x19
	bl	_amdgpu_dpm_get_active_displays
	mov	x0, x19
	bl	_amdgpu_dpm_change_power_state_locked
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_mutex_unlock
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_MAX_RINGS,4,2           ; @AMDGPU_MAX_RINGS
	.comm	_AMD_PP_TASK_DISPLAY_CONFIG_CHANGE,4,2 ; @AMD_PP_TASK_DISPLAY_CONFIG_CHANGE
.subsections_via_symbols
