	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function combios_parse_pll_table
_combios_parse_pll_table:               ## @combios_parse_pll_table
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	testq	%rsi, %rsi
	je	LBB0_22
## %bb.1:
	movq	%rsi, %r12
	movq	%rsi, %rdi
	callq	_RBIOS8
	testl	%eax, %eax
	je	LBB0_22
## %bb.2:
	movq	_RADEON_CLK_PWRMGT_CNTL@GOTPCREL(%rip), %r13
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_3 Depth=1
	callq	_RBIOS32
	addq	$5, %r12
	movl	%r15d, %edi
	movl	%eax, %esi
LBB0_6:                                 ##   in Loop: Header=BB0_3 Depth=1
	callq	_WREG32_PLL
	movq	%r12, %r14
LBB0_21:                                ##   in Loop: Header=BB0_3 Depth=1
	movq	%r14, %rdi
	callq	_RBIOS8
	movq	%r14, %r12
	testl	%eax, %eax
	je	LBB0_22
LBB0_3:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_16 Depth 2
                                        ##     Child Loop BB0_13 Depth 2
	movq	%r12, %rdi
	callq	_RBIOS8
	movl	%eax, %ebx
	shrl	$6, %ebx
	andl	$3, %ebx
	movq	%r12, %rdi
	callq	_RBIOS8
	movl	%eax, %r15d
	andl	$63, %r15d
	leaq	1(%r12), %r14
	leal	-2(%rbx), %eax
	cmpl	$2, %eax
	jae	LBB0_4
## %bb.8:                               ##   in Loop: Header=BB0_3 Depth=1
	decl	%r15d
	cmpl	$4, %r15d
	ja	LBB0_21
## %bb.9:                               ##   in Loop: Header=BB0_3 Depth=1
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%r15,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_10:                                ##   in Loop: Header=BB0_3 Depth=1
	movl	$150, %edi
	callq	_udelay
	jmp	LBB0_21
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_3 Depth=1
	movq	%r14, %rdi
	cmpl	$1, %ebx
	jne	LBB0_5
## %bb.7:                               ##   in Loop: Header=BB0_3 Depth=1
	callq	_RBIOS8
                                        ## kill: def $eax killed $eax def $rax
	leal	(,%rax,8), %r14d
	leaq	2(%r12), %rdi
	callq	_RBIOS8
	movl	%r14d, %ecx
	shll	%cl, %eax
	movl	$255, %ebx
	shll	%cl, %ebx
	notl	%ebx
	orl	%eax, %ebx
	leaq	3(%r12), %rdi
	callq	_RBIOS8
	movl	%eax, %r13d
	movl	%r14d, %ecx
	shll	%cl, %r13d
	addq	$4, %r12
	movl	%r15d, %edi
	callq	_RREG32_PLL
	andl	%eax, %ebx
	orl	%r13d, %ebx
	movq	_RADEON_CLK_PWRMGT_CNTL@GOTPCREL(%rip), %r13
	movl	%r15d, %edi
	movl	%ebx, %esi
	jmp	LBB0_6
LBB0_11:                                ##   in Loop: Header=BB0_3 Depth=1
	movl	$1, %edi
	jmp	LBB0_20
LBB0_12:                                ##   in Loop: Header=BB0_3 Depth=1
	movl	$-1001, %ebx                    ## imm = 0xFC17
	movq	_RADEON_MC_BUSY@GOTPCREL(%rip), %r15
	.p2align	4, 0x90
LBB0_13:                                ##   Parent Loop BB0_3 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	incl	%ebx
	je	LBB0_21
## %bb.14:                              ##   in Loop: Header=BB0_13 Depth=2
	movl	(%r13), %edi
	callq	_RREG32_PLL
	testl	%eax, (%r15)
	jne	LBB0_13
	jmp	LBB0_21
LBB0_15:                                ##   in Loop: Header=BB0_3 Depth=1
	movl	$-1001, %ebx                    ## imm = 0xFC17
	movq	_RADEON_DLL_READY@GOTPCREL(%rip), %r15
	.p2align	4, 0x90
LBB0_16:                                ##   Parent Loop BB0_3 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	incl	%ebx
	je	LBB0_21
## %bb.17:                              ##   in Loop: Header=BB0_16 Depth=2
	movl	(%r13), %edi
	callq	_RREG32_PLL
	testl	%eax, (%r15)
	je	LBB0_16
	jmp	LBB0_21
LBB0_18:                                ##   in Loop: Header=BB0_3 Depth=1
	movl	(%r13), %edi
	callq	_RREG32_PLL
	movq	_RADEON_CG_NO1_DEBUG_0@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%eax, %ecx
	je	LBB0_21
## %bb.19:                              ##   in Loop: Header=BB0_3 Depth=1
	movl	(%r13), %edi
	notl	%ecx
	andl	%ecx, %eax
	movl	%eax, %esi
	callq	_WREG32_PLL
	movl	$10, %edi
LBB0_20:                                ##   in Loop: Header=BB0_3 Depth=1
	callq	_mdelay
	jmp	LBB0_21
LBB0_22:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_12, LBB0_12-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
LJTI0_0:
	.long	L0_0_set_10
	.long	L0_0_set_11
	.long	L0_0_set_12
	.long	L0_0_set_15
	.long	L0_0_set_18
	.end_data_region
                                        ## -- End function
	.comm	_RADEON_CLK_PWRMGT_CNTL,4,2     ## @RADEON_CLK_PWRMGT_CNTL
	.comm	_RADEON_MC_BUSY,4,2             ## @RADEON_MC_BUSY
	.comm	_RADEON_DLL_READY,4,2           ## @RADEON_DLL_READY
	.comm	_RADEON_CG_NO1_DEBUG_0,4,2      ## @RADEON_CG_NO1_DEBUG_0
	.comm	_RADEON_MCLK_CNTL,4,2           ## @RADEON_MCLK_CNTL
	.no_dead_strip	_combios_parse_pll_table
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function combios_parse_pll_table
_combios_parse_pll_table:               ; @combios_parse_pll_table
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	cbz	x1, LBB0_22
; %bb.1:
	mov	x20, x1
	mov	x0, x1
	bl	_RBIOS8
	cbz	w0, LBB0_22
; %bb.2:
Lloh0:
	adrp	x22, lJTI0_0@PAGE
Lloh1:
	add	x22, x22, lJTI0_0@PAGEOFF
Lloh2:
	adrp	x23, _RADEON_CLK_PWRMGT_CNTL@GOTPAGE
Lloh3:
	ldr	x23, [x23, _RADEON_CLK_PWRMGT_CNTL@GOTPAGEOFF]
Lloh4:
	adrp	x24, _RADEON_MC_BUSY@GOTPAGE
Lloh5:
	ldr	x24, [x24, _RADEON_MC_BUSY@GOTPAGEOFF]
Lloh6:
	adrp	x25, _RADEON_DLL_READY@GOTPAGE
Lloh7:
	ldr	x25, [x25, _RADEON_DLL_READY@GOTPAGEOFF]
	mov	w26, #255
	b	LBB0_6
LBB0_3:                                 ;   in Loop: Header=BB0_6 Depth=1
	bl	_RBIOS32
	mov	x1, x0
	add	x19, x20, #5
LBB0_4:                                 ;   in Loop: Header=BB0_6 Depth=1
	mov	x0, x21
	bl	_WREG32_PLL
LBB0_5:                                 ;   in Loop: Header=BB0_6 Depth=1
	mov	x0, x19
	bl	_RBIOS8
	mov	x20, x19
	cbz	w0, LBB0_22
LBB0_6:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_17 Depth 2
                                        ;     Child Loop BB0_14 Depth 2
	mov	x0, x20
	bl	_RBIOS8
	ubfx	w28, w0, #6, #2
	mov	x0, x20
	bl	_RBIOS8
	and	w21, w0, #0x3f
	add	x19, x20, #1
	sub	w8, w28, #2
	cmp	w8, #2
	b.hs	LBB0_10
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	sub	w8, w21, #1
	cmp	w8, #4
	b.hi	LBB0_5
; %bb.8:                                ;   in Loop: Header=BB0_6 Depth=1
	adr	x9, LBB0_9
	ldrb	w10, [x22, x8]
	add	x9, x9, x10, lsl #2
	br	x9
LBB0_9:                                 ;   in Loop: Header=BB0_6 Depth=1
	mov	w0, #150
	bl	_udelay
	b	LBB0_5
LBB0_10:                                ;   in Loop: Header=BB0_6 Depth=1
	mov	x0, x19
	cmp	w28, #1
	b.ne	LBB0_3
; %bb.11:                               ;   in Loop: Header=BB0_6 Depth=1
	bl	_RBIOS8
	lsl	w19, w0, #3
	add	x0, x20, #2
	bl	_RBIOS8
	lsl	w8, w0, w19
	lsl	w9, w26, w19
	orn	w28, w8, w9
	add	x0, x20, #3
	bl	_RBIOS8
	lsl	w27, w0, w19
	add	x19, x20, #4
	mov	x0, x21
	bl	_RREG32_PLL
	and	w8, w0, w28
	orr	w1, w8, w27
	b	LBB0_4
LBB0_12:                                ;   in Loop: Header=BB0_6 Depth=1
	mov	w0, #1
	b	LBB0_21
LBB0_13:                                ;   in Loop: Header=BB0_6 Depth=1
	mov	w20, #-1001
LBB0_14:                                ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	adds	w20, w20, #1
	b.hs	LBB0_5
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=2
	ldr	w0, [x23]
	bl	_RREG32_PLL
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_14
	b	LBB0_5
LBB0_16:                                ;   in Loop: Header=BB0_6 Depth=1
	mov	w20, #-1001
LBB0_17:                                ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	adds	w20, w20, #1
	b.hs	LBB0_5
; %bb.18:                               ;   in Loop: Header=BB0_17 Depth=2
	ldr	w0, [x23]
	bl	_RREG32_PLL
	ldr	w8, [x25]
	tst	w8, w0
	b.eq	LBB0_17
	b	LBB0_5
LBB0_19:                                ;   in Loop: Header=BB0_6 Depth=1
	ldr	w0, [x23]
	bl	_RREG32_PLL
Lloh8:
	adrp	x8, _RADEON_CG_NO1_DEBUG_0@GOTPAGE
Lloh9:
	ldr	x8, [x8, _RADEON_CG_NO1_DEBUG_0@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x8]
	tst	w9, w0
	b.eq	LBB0_5
; %bb.20:                               ;   in Loop: Header=BB0_6 Depth=1
	ldr	w8, [x23]
	bic	w1, w0, w9
	mov	x0, x8
	bl	_WREG32_PLL
	mov	w0, #10
LBB0_21:                                ;   in Loop: Header=BB0_6 Depth=1
	bl	_mdelay
	b	LBB0_5
LBB0_22:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_9-LBB0_9)>>2
	.byte	(LBB0_12-LBB0_9)>>2
	.byte	(LBB0_13-LBB0_9)>>2
	.byte	(LBB0_16-LBB0_9)>>2
	.byte	(LBB0_19-LBB0_9)>>2
                                        ; -- End function
	.comm	_RADEON_CLK_PWRMGT_CNTL,4,2     ; @RADEON_CLK_PWRMGT_CNTL
	.comm	_RADEON_MC_BUSY,4,2             ; @RADEON_MC_BUSY
	.comm	_RADEON_DLL_READY,4,2           ; @RADEON_DLL_READY
	.comm	_RADEON_CG_NO1_DEBUG_0,4,2      ; @RADEON_CG_NO1_DEBUG_0
	.comm	_RADEON_MCLK_CNTL,4,2           ; @RADEON_MCLK_CNTL
	.no_dead_strip	_combios_parse_pll_table
.subsections_via_symbols
