	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smu8_load_mec_firmware
_smu8_load_mec_firmware:                ## @smu8_load_mec_firmware
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	$0, -40(%rbp)
	testq	%rdi, %rdi
	je	LBB0_2
## %bb.1:
	movq	%rdi, %r14
	movq	(%rdi), %rdi
	testq	%rdi, %rdi
	je	LBB0_2
## %bb.3:
	movq	_CGS_UCODE_ID_CP_MEC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-40(%rbp), %rdx
	callq	_cgs_get_firmware_info
	testl	%eax, %eax
	je	LBB0_4
LBB0_2:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_5:
	movl	%ebx, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	(%r14), %rdi
	movq	_mmCP_MEC_CNTL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_cgs_read_register
	movq	_CP_MEC_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_MEC_ME1_HALT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	$1, %ecx
	callq	_PHM_SET_FIELD
	movl	(%rbx), %esi
	movq	_MEC_ME2_HALT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	$1, %ecx
	callq	_PHM_SET_FIELD
	movq	(%r14), %rdi
	movl	(%r15), %esi
	movl	%eax, %edx
	callq	_cgs_write_register
	movq	(%r14), %rdi
	movq	_mmCP_CPC_IC_BASE_CNTL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_cgs_read_register
	movq	_CP_CPC_IC_BASE_CNTL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_VMID@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	xorl	%ebx, %ebx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_PHM_SET_FIELD
	movl	(%r12), %esi
	movq	_ATC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_PHM_SET_FIELD
	movl	(%r12), %esi
	movq	_CACHE_POLICY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_PHM_SET_FIELD
	movl	(%r12), %esi
	movq	_MTYPE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	$1, %ecx
	callq	_PHM_SET_FIELD
	movq	(%r14), %rdi
	movl	(%r15), %esi
	movl	%eax, %edx
	callq	_cgs_write_register
	movl	-40(%rbp), %edi
	callq	_lower_32_bits
	movl	%eax, %r15d
	movq	_CP_CPC_IC_BASE_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_IC_BASE_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_PHM_FIELD_MASK
	andl	%eax, %r15d
	movq	(%r14), %rdi
	movq	_mmCP_CPC_IC_BASE_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edx
	callq	_cgs_write_register
	movl	-40(%rbp), %edi
	callq	_upper_32_bits
	movl	%eax, %r15d
	movq	_CP_CPC_IC_BASE_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_IC_BASE_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_PHM_FIELD_MASK
	andl	%eax, %r15d
	movq	(%r14), %rdi
	movq	_mmCP_CPC_IC_BASE_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edx
	callq	_cgs_write_register
	jmp	LBB0_5
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_CGS_UCODE_ID_CP_MEC,4,2        ## @CGS_UCODE_ID_CP_MEC
	.comm	_mmCP_MEC_CNTL,4,2              ## @mmCP_MEC_CNTL
	.comm	_CP_MEC_CNTL,4,2                ## @CP_MEC_CNTL
	.comm	_MEC_ME1_HALT,4,2               ## @MEC_ME1_HALT
	.comm	_MEC_ME2_HALT,4,2               ## @MEC_ME2_HALT
	.comm	_mmCP_CPC_IC_BASE_CNTL,4,2      ## @mmCP_CPC_IC_BASE_CNTL
	.comm	_CP_CPC_IC_BASE_CNTL,4,2        ## @CP_CPC_IC_BASE_CNTL
	.comm	_VMID,4,2                       ## @VMID
	.comm	_ATC,4,2                        ## @ATC
	.comm	_CACHE_POLICY,4,2               ## @CACHE_POLICY
	.comm	_MTYPE,4,2                      ## @MTYPE
	.comm	_CP_CPC_IC_BASE_LO,4,2          ## @CP_CPC_IC_BASE_LO
	.comm	_IC_BASE_LO,4,2                 ## @IC_BASE_LO
	.comm	_mmCP_CPC_IC_BASE_LO,4,2        ## @mmCP_CPC_IC_BASE_LO
	.comm	_CP_CPC_IC_BASE_HI,4,2          ## @CP_CPC_IC_BASE_HI
	.comm	_IC_BASE_HI,4,2                 ## @IC_BASE_HI
	.comm	_mmCP_CPC_IC_BASE_HI,4,2        ## @mmCP_CPC_IC_BASE_HI
	.no_dead_strip	_smu8_load_mec_firmware
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smu8_load_mec_firmware
_smu8_load_mec_firmware:                ; @smu8_load_mec_firmware
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	str	xzr, [sp, #8]
	cbz	x0, LBB0_3
; %bb.1:
	mov	x19, x0
	ldr	x0, [x0]
	cbz	x0, LBB0_3
; %bb.2:
Lloh0:
	adrp	x8, _CGS_UCODE_ID_CP_MEC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CGS_UCODE_ID_CP_MEC@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #8
	bl	_cgs_get_firmware_info
	cbz	w0, LBB0_5
LBB0_3:
Lloh3:
	adrp	x8, _EINVAL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_4:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_5:
	ldr	x0, [x19]
Lloh6:
	adrp	x20, _mmCP_MEC_CNTL@GOTPAGE
Lloh7:
	ldr	x20, [x20, _mmCP_MEC_CNTL@GOTPAGEOFF]
	ldr	w1, [x20]
	bl	_cgs_read_register
Lloh8:
	adrp	x21, _CP_MEC_CNTL@GOTPAGE
Lloh9:
	ldr	x21, [x21, _CP_MEC_CNTL@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh10:
	adrp	x8, _MEC_ME1_HALT@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MEC_ME1_HALT@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
	mov	w3, #1
	bl	_PHM_SET_FIELD
	ldr	w1, [x21]
Lloh13:
	adrp	x8, _MEC_ME2_HALT@GOTPAGE
Lloh14:
	ldr	x8, [x8, _MEC_ME2_HALT@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	mov	w3, #1
	bl	_PHM_SET_FIELD
	mov	x2, x0
	ldr	x0, [x19]
	ldr	w1, [x20]
	bl	_cgs_write_register
	ldr	x0, [x19]
Lloh16:
	adrp	x20, _mmCP_CPC_IC_BASE_CNTL@GOTPAGE
Lloh17:
	ldr	x20, [x20, _mmCP_CPC_IC_BASE_CNTL@GOTPAGEOFF]
	ldr	w1, [x20]
	bl	_cgs_read_register
Lloh18:
	adrp	x21, _CP_CPC_IC_BASE_CNTL@GOTPAGE
Lloh19:
	ldr	x21, [x21, _CP_CPC_IC_BASE_CNTL@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh20:
	adrp	x8, _VMID@GOTPAGE
Lloh21:
	ldr	x8, [x8, _VMID@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_PHM_SET_FIELD
	ldr	w1, [x21]
Lloh23:
	adrp	x8, _ATC@GOTPAGE
Lloh24:
	ldr	x8, [x8, _ATC@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_PHM_SET_FIELD
	ldr	w1, [x21]
Lloh26:
	adrp	x8, _CACHE_POLICY@GOTPAGE
Lloh27:
	ldr	x8, [x8, _CACHE_POLICY@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_PHM_SET_FIELD
	ldr	w1, [x21]
Lloh29:
	adrp	x8, _MTYPE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _MTYPE@GOTPAGEOFF]
Lloh31:
	ldr	w2, [x8]
	mov	w3, #1
	bl	_PHM_SET_FIELD
	mov	x2, x0
	ldr	x0, [x19]
	ldr	w1, [x20]
	bl	_cgs_write_register
	ldr	w0, [sp, #8]
	bl	_lower_32_bits
	mov	x20, x0
Lloh32:
	adrp	x8, _CP_CPC_IC_BASE_LO@GOTPAGE
Lloh33:
	ldr	x8, [x8, _CP_CPC_IC_BASE_LO@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
Lloh35:
	adrp	x8, _IC_BASE_LO@GOTPAGE
Lloh36:
	ldr	x8, [x8, _IC_BASE_LO@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	bl	_PHM_FIELD_MASK
	and	w2, w0, w20
	ldr	x0, [x19]
Lloh38:
	adrp	x8, _mmCP_CPC_IC_BASE_LO@GOTPAGE
Lloh39:
	ldr	x8, [x8, _mmCP_CPC_IC_BASE_LO@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	bl	_cgs_write_register
	ldr	w0, [sp, #8]
	bl	_upper_32_bits
	mov	x20, x0
Lloh41:
	adrp	x8, _CP_CPC_IC_BASE_HI@GOTPAGE
Lloh42:
	ldr	x8, [x8, _CP_CPC_IC_BASE_HI@GOTPAGEOFF]
Lloh43:
	ldr	w0, [x8]
Lloh44:
	adrp	x8, _IC_BASE_HI@GOTPAGE
Lloh45:
	ldr	x8, [x8, _IC_BASE_HI@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
	bl	_PHM_FIELD_MASK
	and	w2, w0, w20
	ldr	x0, [x19]
Lloh47:
	adrp	x8, _mmCP_CPC_IC_BASE_HI@GOTPAGE
Lloh48:
	ldr	x8, [x8, _mmCP_CPC_IC_BASE_HI@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	bl	_cgs_write_register
	mov	w0, #0
	b	LBB0_4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_CGS_UCODE_ID_CP_MEC,4,2        ; @CGS_UCODE_ID_CP_MEC
	.comm	_mmCP_MEC_CNTL,4,2              ; @mmCP_MEC_CNTL
	.comm	_CP_MEC_CNTL,4,2                ; @CP_MEC_CNTL
	.comm	_MEC_ME1_HALT,4,2               ; @MEC_ME1_HALT
	.comm	_MEC_ME2_HALT,4,2               ; @MEC_ME2_HALT
	.comm	_mmCP_CPC_IC_BASE_CNTL,4,2      ; @mmCP_CPC_IC_BASE_CNTL
	.comm	_CP_CPC_IC_BASE_CNTL,4,2        ; @CP_CPC_IC_BASE_CNTL
	.comm	_VMID,4,2                       ; @VMID
	.comm	_ATC,4,2                        ; @ATC
	.comm	_CACHE_POLICY,4,2               ; @CACHE_POLICY
	.comm	_MTYPE,4,2                      ; @MTYPE
	.comm	_CP_CPC_IC_BASE_LO,4,2          ; @CP_CPC_IC_BASE_LO
	.comm	_IC_BASE_LO,4,2                 ; @IC_BASE_LO
	.comm	_mmCP_CPC_IC_BASE_LO,4,2        ; @mmCP_CPC_IC_BASE_LO
	.comm	_CP_CPC_IC_BASE_HI,4,2          ; @CP_CPC_IC_BASE_HI
	.comm	_IC_BASE_HI,4,2                 ; @IC_BASE_HI
	.comm	_mmCP_CPC_IC_BASE_HI,4,2        ; @mmCP_CPC_IC_BASE_HI
	.no_dead_strip	_smu8_load_mec_firmware
.subsections_via_symbols
