	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bxt_init_clock_gating
_bxt_init_clock_gating:                 ## @bxt_init_clock_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	callq	_gen9_init_clock_gating
	movq	_GEN8_UCGCTL6@GOTPCREL(%rip), %r14
	movl	(%r14), %ebx
	movl	%ebx, %edi
	callq	_I915_READ
	movq	_GEN8_SDEUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movl	(%r14), %ebx
	movl	%ebx, %edi
	callq	_I915_READ
	movq	_GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	_GEN9_CLKGATE_DIS_0@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_I915_READ
	movq	_PWM1_GATING_DIS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_PWM2_GATING_DIS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	_RM_TIMEOUT@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$950, %edi                      ## imm = 0x3B6
	callq	_MMIO_TIMEOUT_US
	movl	%ebx, %edi
	movl	%eax, %esi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_I915_WRITE                     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_GEN8_UCGCTL6,4,2               ## @GEN8_UCGCTL6
	.comm	_GEN8_SDEUNIT_CLOCK_GATE_DISABLE,4,2 ## @GEN8_SDEUNIT_CLOCK_GATE_DISABLE
	.comm	_GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ,4,2 ## @GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ
	.comm	_GEN9_CLKGATE_DIS_0,4,2         ## @GEN9_CLKGATE_DIS_0
	.comm	_PWM1_GATING_DIS,4,2            ## @PWM1_GATING_DIS
	.comm	_PWM2_GATING_DIS,4,2            ## @PWM2_GATING_DIS
	.comm	_RM_TIMEOUT,4,2                 ## @RM_TIMEOUT
	.no_dead_strip	_bxt_init_clock_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bxt_init_clock_gating
_bxt_init_clock_gating:                 ; @bxt_init_clock_gating
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_gen9_init_clock_gating
Lloh0:
	adrp	x20, _GEN8_UCGCTL6@GOTPAGE
Lloh1:
	ldr	x20, [x20, _GEN8_UCGCTL6@GOTPAGEOFF]
	ldr	w19, [x20]
	mov	x0, x19
	bl	_I915_READ
Lloh2:
	adrp	x8, _GEN8_SDEUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _GEN8_SDEUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	orr	w1, w8, w0
	mov	x0, x19
	bl	_I915_WRITE
	ldr	w19, [x20]
	mov	x0, x19
	bl	_I915_READ
Lloh5:
	adrp	x8, _GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ@GOTPAGE
Lloh6:
	ldr	x8, [x8, _GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	orr	w1, w8, w0
	mov	x0, x19
	bl	_I915_WRITE
Lloh8:
	adrp	x8, _GEN9_CLKGATE_DIS_0@GOTPAGE
Lloh9:
	ldr	x8, [x8, _GEN9_CLKGATE_DIS_0@GOTPAGEOFF]
Lloh10:
	ldr	w19, [x8]
	mov	x0, x19
	bl	_I915_READ
Lloh11:
	adrp	x8, _PWM1_GATING_DIS@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PWM1_GATING_DIS@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	orr	w8, w8, w0
Lloh14:
	adrp	x9, _PWM2_GATING_DIS@GOTPAGE
Lloh15:
	ldr	x9, [x9, _PWM2_GATING_DIS@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	orr	w1, w8, w9
	mov	x0, x19
	bl	_I915_WRITE
Lloh17:
	adrp	x8, _RM_TIMEOUT@GOTPAGE
Lloh18:
	ldr	x8, [x8, _RM_TIMEOUT@GOTPAGEOFF]
Lloh19:
	ldr	w19, [x8]
	mov	w0, #950
	bl	_MMIO_TIMEOUT_US
	mov	x1, x0
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_I915_WRITE
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_GEN8_UCGCTL6,4,2               ; @GEN8_UCGCTL6
	.comm	_GEN8_SDEUNIT_CLOCK_GATE_DISABLE,4,2 ; @GEN8_SDEUNIT_CLOCK_GATE_DISABLE
	.comm	_GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ,4,2 ; @GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ
	.comm	_GEN9_CLKGATE_DIS_0,4,2         ; @GEN9_CLKGATE_DIS_0
	.comm	_PWM1_GATING_DIS,4,2            ; @PWM1_GATING_DIS
	.comm	_PWM2_GATING_DIS,4,2            ; @PWM2_GATING_DIS
	.comm	_RM_TIMEOUT,4,2                 ; @RM_TIMEOUT
	.no_dead_strip	_bxt_init_clock_gating
.subsections_via_symbols
