	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_i2c_pre_xfer
_amdgpu_i2c_pre_xfer:                   ## @amdgpu_i2c_pre_xfer
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	callq	_i2c_get_adapdata
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_mutex_lock
	cmpq	$0, 56(%rbx)
	je	LBB0_2
## %bb.1:
	movl	36(%rbx), %edi
	callq	_RREG32
	andl	$-65537, %eax                   ## imm = 0xFFFEFFFF
	movl	36(%rbx), %edi
	movl	%eax, %esi
	callq	_WREG32
LBB0_2:
	movl	52(%rbx), %edi
	callq	_RREG32
	movl	8(%rbx), %esi
	movl	52(%rbx), %edi
	notl	%esi
	andl	%eax, %esi
	callq	_WREG32
	movl	48(%rbx), %edi
	callq	_RREG32
	movl	12(%rbx), %esi
	movl	48(%rbx), %edi
	notl	%esi
	andl	%eax, %esi
	callq	_WREG32
	movl	44(%rbx), %edi
	callq	_RREG32
	movl	16(%rbx), %esi
	movl	44(%rbx), %edi
	notl	%esi
	andl	%eax, %esi
	callq	_WREG32
	movl	40(%rbx), %edi
	callq	_RREG32
	movl	20(%rbx), %esi
	movl	40(%rbx), %edi
	notl	%esi
	andl	%eax, %esi
	callq	_WREG32
	movl	36(%rbx), %edi
	callq	_RREG32
	orl	24(%rbx), %eax
	movl	36(%rbx), %edi
	movl	%eax, %esi
	callq	_WREG32
	movl	36(%rbx), %edi
	callq	_RREG32
	movl	32(%rbx), %edi
	callq	_RREG32
	orl	28(%rbx), %eax
	movl	32(%rbx), %edi
	movl	%eax, %esi
	callq	_WREG32
	movl	32(%rbx), %edi
	callq	_RREG32
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_amdgpu_i2c_pre_xfer
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_i2c_pre_xfer
_amdgpu_i2c_pre_xfer:                   ; @amdgpu_i2c_pre_xfer
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_i2c_get_adapdata
	mov	x19, x0
	bl	_mutex_lock
	ldr	x8, [x19, #56]
	cbz	x8, LBB0_2
; %bb.1:
	ldr	w0, [x19, #36]
	bl	_RREG32
	and	w1, w0, #0xfffeffff
	ldr	w0, [x19, #36]
	bl	_WREG32
LBB0_2:
	ldr	w0, [x19, #52]
	bl	_RREG32
	ldr	w8, [x19, #8]
	bic	w1, w0, w8
	ldr	w0, [x19, #52]
	bl	_WREG32
	ldr	w0, [x19, #48]
	bl	_RREG32
	ldr	w8, [x19, #12]
	bic	w1, w0, w8
	ldr	w0, [x19, #48]
	bl	_WREG32
	ldr	w0, [x19, #44]
	bl	_RREG32
	ldr	w8, [x19, #16]
	bic	w1, w0, w8
	ldr	w0, [x19, #44]
	bl	_WREG32
	ldr	w0, [x19, #40]
	bl	_RREG32
	ldr	w8, [x19, #20]
	bic	w1, w0, w8
	ldr	w0, [x19, #40]
	bl	_WREG32
	ldr	w0, [x19, #36]
	bl	_RREG32
	ldr	w8, [x19, #24]
	orr	w1, w8, w0
	ldr	w0, [x19, #36]
	bl	_WREG32
	ldr	w0, [x19, #36]
	bl	_RREG32
	ldr	w0, [x19, #32]
	bl	_RREG32
	ldp	w9, w8, [x19, #28]
	orr	w1, w9, w0
	mov	x0, x8
	bl	_WREG32
	ldr	w0, [x19, #32]
	bl	_RREG32
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_amdgpu_i2c_pre_xfer
.subsections_via_symbols
