	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mmhub_v1_0_gart_disable        ## -- Begin function mmhub_v1_0_gart_disable
	.p2align	4, 0x90
_mmhub_v1_0_gart_disable:               ## @mmhub_v1_0_gart_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_MMHUB@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	movq	_mmVM_CONTEXT0_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$2, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$3, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$4, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$5, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$6, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$7, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$8, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$9, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$10, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$11, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$12, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$13, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$14, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	$15, %ecx
	xorl	%r8d, %r8d
	callq	_WREG32_SOC15_OFFSET
	movl	(%r15), %edi
	movq	_mmMC_VM_MX_L1_TLB_CNTL@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_MC_VM_MX_L1_TLB_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_ENABLE_L1_TLB@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%rbx), %esi
	movq	_ENABLE_ADVANCED_DRIVER_MODEL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r15), %edi
	movl	(%r12), %edx
	xorl	%esi, %esi
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movq	%r14, %rdi
	callq	_amdgpu_sriov_vf
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movl	(%r15), %edi
	movq	_mmVM_L2_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_VM_L2_CNTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_ENABLE_L2_CACHE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r15), %edi
	movl	(%rbx), %edx
	xorl	%esi, %esi
	movl	%eax, %ecx
	callq	_WREG32_SOC15
	movl	(%r15), %edi
	movq	_mmVM_L2_CNTL3@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32_SOC15                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MMHUB,4,2                      ## @MMHUB
	.comm	_mmVM_CONTEXT0_CNTL,4,2         ## @mmVM_CONTEXT0_CNTL
	.comm	_mmMC_VM_MX_L1_TLB_CNTL,4,2     ## @mmMC_VM_MX_L1_TLB_CNTL
	.comm	_MC_VM_MX_L1_TLB_CNTL,4,2       ## @MC_VM_MX_L1_TLB_CNTL
	.comm	_ENABLE_L1_TLB,4,2              ## @ENABLE_L1_TLB
	.comm	_ENABLE_ADVANCED_DRIVER_MODEL,4,2 ## @ENABLE_ADVANCED_DRIVER_MODEL
	.comm	_mmVM_L2_CNTL,4,2               ## @mmVM_L2_CNTL
	.comm	_VM_L2_CNTL,4,2                 ## @VM_L2_CNTL
	.comm	_ENABLE_L2_CACHE,4,2            ## @ENABLE_L2_CACHE
	.comm	_mmVM_L2_CNTL3,4,2              ## @mmVM_L2_CNTL3
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mmhub_v1_0_gart_disable        ; -- Begin function mmhub_v1_0_gart_disable
	.p2align	2
_mmhub_v1_0_gart_disable:               ; @mmhub_v1_0_gart_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x20, _MMHUB@GOTPAGE
Lloh1:
	ldr	x20, [x20, _MMHUB@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh2:
	adrp	x21, _mmVM_CONTEXT0_CNTL@GOTPAGE
Lloh3:
	ldr	x21, [x21, _mmVM_CONTEXT0_CNTL@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #0
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #1
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #2
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #3
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #4
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #5
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #6
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #7
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #8
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #9
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #10
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #11
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #12
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #13
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #14
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	mov	w3, #15
	mov	w4, #0
	bl	_WREG32_SOC15_OFFSET
	ldr	w0, [x20]
Lloh4:
	adrp	x21, _mmMC_VM_MX_L1_TLB_CNTL@GOTPAGE
Lloh5:
	ldr	x21, [x21, _mmMC_VM_MX_L1_TLB_CNTL@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh6:
	adrp	x22, _MC_VM_MX_L1_TLB_CNTL@GOTPAGE
Lloh7:
	ldr	x22, [x22, _MC_VM_MX_L1_TLB_CNTL@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh8:
	adrp	x8, _ENABLE_L1_TLB@GOTPAGE
Lloh9:
	ldr	x8, [x8, _ENABLE_L1_TLB@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x22]
Lloh11:
	adrp	x8, _ENABLE_ADVANCED_DRIVER_MODEL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _ENABLE_ADVANCED_DRIVER_MODEL@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	mov	x3, x0
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	bl	_WREG32_SOC15
	mov	x0, x19
	bl	_amdgpu_sriov_vf
	cbz	w0, LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_2:
	ldr	w0, [x20]
Lloh14:
	adrp	x19, _mmVM_L2_CNTL@GOTPAGE
Lloh15:
	ldr	x19, [x19, _mmVM_L2_CNTL@GOTPAGEOFF]
	ldr	w2, [x19]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh16:
	adrp	x8, _VM_L2_CNTL@GOTPAGE
Lloh17:
	ldr	x8, [x8, _VM_L2_CNTL@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
Lloh19:
	adrp	x8, _ENABLE_L2_CACHE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _ENABLE_L2_CACHE@GOTPAGEOFF]
Lloh21:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	mov	x3, x0
	ldr	w0, [x20]
	ldr	w2, [x19]
	mov	w1, #0
	bl	_WREG32_SOC15
Lloh22:
	adrp	x8, _mmVM_L2_CNTL3@GOTPAGE
Lloh23:
	ldr	x8, [x8, _mmVM_L2_CNTL3@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh24:
	ldr	w2, [x8]
	mov	w1, #0
	mov	w3, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32_SOC15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.cfi_endproc
                                        ; -- End function
	.comm	_MMHUB,4,2                      ; @MMHUB
	.comm	_mmVM_CONTEXT0_CNTL,4,2         ; @mmVM_CONTEXT0_CNTL
	.comm	_mmMC_VM_MX_L1_TLB_CNTL,4,2     ; @mmMC_VM_MX_L1_TLB_CNTL
	.comm	_MC_VM_MX_L1_TLB_CNTL,4,2       ; @MC_VM_MX_L1_TLB_CNTL
	.comm	_ENABLE_L1_TLB,4,2              ; @ENABLE_L1_TLB
	.comm	_ENABLE_ADVANCED_DRIVER_MODEL,4,2 ; @ENABLE_ADVANCED_DRIVER_MODEL
	.comm	_mmVM_L2_CNTL,4,2               ; @mmVM_L2_CNTL
	.comm	_VM_L2_CNTL,4,2                 ; @VM_L2_CNTL
	.comm	_ENABLE_L2_CACHE,4,2            ; @ENABLE_L2_CACHE
	.comm	_mmVM_L2_CNTL3,4,2              ; @mmVM_L2_CNTL3
.subsections_via_symbols
