	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rs400_mc_init
_rs400_mc_init:                         ## @rs400_mc_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	callq	_rs400_gart_adjust_size
	movq	%rbx, %rdi
	callq	_radeon_combios_sideport_present
	movl	%eax, 24(%rbx)
	movabsq	$549755813889, %rax             ## imm = 0x8000000001
	movq	%rax, (%rbx)
	movq	%rbx, %rdi
	callq	_r100_vram_init_sizes
	movq	_RADEON_NB_TOM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	shll	$16, %eax
	movq	%rbx, %rdi
	movq	%rbx, %rsi
	movl	%eax, %edx
	callq	_radeon_vram_location
	movq	8(%rbx), %rax
	decq	%rax
	movq	%rax, 16(%rbx)
	movq	%rbx, %rdi
	movq	%rbx, %rsi
	callq	_radeon_gtt_location
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_radeon_update_bandwidth_info   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_NB_TOM,4,2              ## @RADEON_NB_TOM
	.no_dead_strip	_rs400_mc_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function rs400_mc_init
lCPI0_0:
	.long	1                               ; 0x1
	.long	128                             ; 0x80
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_rs400_mc_init:                         ; @rs400_mc_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_rs400_gart_adjust_size
	mov	x0, x19
	bl	_radeon_combios_sideport_present
	str	w0, [x19, #24]
Lloh0:
	adrp	x8, lCPI0_0@PAGE
Lloh1:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	str	d0, [x19]
	mov	x0, x19
	bl	_r100_vram_init_sizes
Lloh2:
	adrp	x8, _RADEON_NB_TOM@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RADEON_NB_TOM@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	bl	_RREG32
	lsl	w2, w0, #16
	mov	x0, x19
	mov	x1, x19
	bl	_radeon_vram_location
	ldr	x8, [x19, #8]
	sub	x8, x8, #1
	str	x8, [x19, #16]
	mov	x0, x19
	mov	x1, x19
	bl	_radeon_gtt_location
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_radeon_update_bandwidth_info
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdr	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_NB_TOM,4,2              ; @RADEON_NB_TOM
	.no_dead_strip	_rs400_mc_init
.subsections_via_symbols
