	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function inno_hdmi_reset
_inno_hdmi_reset:                       ## @inno_hdmi_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_HDMI_SYS_CTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_m_RST_DIGITAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_v_NOT_RST_DIGITAL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	callq	_hdmi_modb
	movl	$100, %edi
	callq	_udelay
	movl	(%r14), %esi
	movq	_m_RST_ANALOG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_v_NOT_RST_ANALOG@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_hdmi_modb
	movl	$100, %edi
	callq	_udelay
	movq	_m_REG_CLK_INV@GOTPCREL(%rip), %rax
	movq	_m_REG_CLK_SOURCE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_m_POWER@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_m_INT_POL@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_v_REG_CLK_INV@GOTPCREL(%rip), %rax
	movq	_v_REG_CLK_SOURCE_SYS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_v_PWR_ON@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_v_INT_POL_HIGH@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_hdmi_modb
	movq	_NORMAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_inno_hdmi_set_pwr_mode         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_HDMI_SYS_CTRL,4,2              ## @HDMI_SYS_CTRL
	.comm	_m_RST_DIGITAL,4,2              ## @m_RST_DIGITAL
	.comm	_v_NOT_RST_DIGITAL,4,2          ## @v_NOT_RST_DIGITAL
	.comm	_m_RST_ANALOG,4,2               ## @m_RST_ANALOG
	.comm	_v_NOT_RST_ANALOG,4,2           ## @v_NOT_RST_ANALOG
	.comm	_m_REG_CLK_INV,4,2              ## @m_REG_CLK_INV
	.comm	_m_REG_CLK_SOURCE,4,2           ## @m_REG_CLK_SOURCE
	.comm	_m_POWER,4,2                    ## @m_POWER
	.comm	_m_INT_POL,4,2                  ## @m_INT_POL
	.comm	_v_REG_CLK_INV,4,2              ## @v_REG_CLK_INV
	.comm	_v_REG_CLK_SOURCE_SYS,4,2       ## @v_REG_CLK_SOURCE_SYS
	.comm	_v_PWR_ON,4,2                   ## @v_PWR_ON
	.comm	_v_INT_POL_HIGH,4,2             ## @v_INT_POL_HIGH
	.comm	_NORMAL,4,2                     ## @NORMAL
	.no_dead_strip	_inno_hdmi_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function inno_hdmi_reset
_inno_hdmi_reset:                       ; @inno_hdmi_reset
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x20, _HDMI_SYS_CTRL@GOTPAGE
Lloh1:
	ldr	x20, [x20, _HDMI_SYS_CTRL@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x8, _m_RST_DIGITAL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _m_RST_DIGITAL@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
Lloh5:
	adrp	x8, _v_NOT_RST_DIGITAL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _v_NOT_RST_DIGITAL@GOTPAGEOFF]
Lloh7:
	ldr	w3, [x8]
	bl	_hdmi_modb
	mov	w0, #100
	bl	_udelay
	ldr	w1, [x20]
Lloh8:
	adrp	x8, _m_RST_ANALOG@GOTPAGE
Lloh9:
	ldr	x8, [x8, _m_RST_ANALOG@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
Lloh11:
	adrp	x8, _v_NOT_RST_ANALOG@GOTPAGE
Lloh12:
	ldr	x8, [x8, _v_NOT_RST_ANALOG@GOTPAGEOFF]
Lloh13:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_hdmi_modb
	mov	w0, #100
	bl	_udelay
Lloh14:
	adrp	x8, _m_REG_CLK_INV@GOTPAGE
Lloh15:
	ldr	x8, [x8, _m_REG_CLK_INV@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	adrp	x9, _m_REG_CLK_SOURCE@GOTPAGE
Lloh18:
	ldr	x9, [x9, _m_REG_CLK_SOURCE@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh20:
	adrp	x9, _m_POWER@GOTPAGE
Lloh21:
	ldr	x9, [x9, _m_POWER@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh23:
	adrp	x9, _m_INT_POL@GOTPAGE
Lloh24:
	ldr	x9, [x9, _m_INT_POL@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	orr	w2, w8, w9
Lloh26:
	adrp	x8, _v_REG_CLK_INV@GOTPAGE
Lloh27:
	ldr	x8, [x8, _v_REG_CLK_INV@GOTPAGEOFF]
Lloh28:
	adrp	x9, _v_REG_CLK_SOURCE_SYS@GOTPAGE
Lloh29:
	ldr	x9, [x9, _v_REG_CLK_SOURCE_SYS@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
Lloh31:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh32:
	adrp	x9, _v_PWR_ON@GOTPAGE
Lloh33:
	ldr	x9, [x9, _v_PWR_ON@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh35:
	adrp	x9, _v_INT_POL_HIGH@GOTPAGE
Lloh36:
	ldr	x9, [x9, _v_INT_POL_HIGH@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
	orr	w3, w8, w9
	ldr	w1, [x20]
	mov	x0, x19
	bl	_hdmi_modb
Lloh38:
	adrp	x8, _NORMAL@GOTPAGE
Lloh39:
	ldr	x8, [x8, _NORMAL@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_inno_hdmi_set_pwr_mode
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh30
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_HDMI_SYS_CTRL,4,2              ; @HDMI_SYS_CTRL
	.comm	_m_RST_DIGITAL,4,2              ; @m_RST_DIGITAL
	.comm	_v_NOT_RST_DIGITAL,4,2          ; @v_NOT_RST_DIGITAL
	.comm	_m_RST_ANALOG,4,2               ; @m_RST_ANALOG
	.comm	_v_NOT_RST_ANALOG,4,2           ; @v_NOT_RST_ANALOG
	.comm	_m_REG_CLK_INV,4,2              ; @m_REG_CLK_INV
	.comm	_m_REG_CLK_SOURCE,4,2           ; @m_REG_CLK_SOURCE
	.comm	_m_POWER,4,2                    ; @m_POWER
	.comm	_m_INT_POL,4,2                  ; @m_INT_POL
	.comm	_v_REG_CLK_INV,4,2              ; @v_REG_CLK_INV
	.comm	_v_REG_CLK_SOURCE_SYS,4,2       ; @v_REG_CLK_SOURCE_SYS
	.comm	_v_PWR_ON,4,2                   ; @v_PWR_ON
	.comm	_v_INT_POL_HIGH,4,2             ; @v_INT_POL_HIGH
	.comm	_NORMAL,4,2                     ; @NORMAL
	.no_dead_strip	_inno_hdmi_reset
.subsections_via_symbols
