	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vega10_get_clock_by_type_with_voltage
_vega10_get_clock_by_type_with_voltage: ## @vega10_get_clock_by_type_with_voltage
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	.cfi_offset %rbx, -24
                                        ## kill: def $esi killed $esi def $rsi
	addl	$-128, %esi
	cmpl	$4, %esi
	ja	LBB0_1
## %bb.2:
	movq	(%rdi), %rax
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rsi,4), %rsi
	addq	%rcx, %rsi
	jmpq	*%rsi
LBB0_6:
	leaq	16(%rax), %rcx
	jmp	LBB0_8
LBB0_1:
	movl	$-1, %eax
	jmp	LBB0_17
LBB0_7:
	leaq	8(%rax), %rcx
	jmp	LBB0_8
LBB0_3:
	leaq	40(%rax), %rcx
	jmp	LBB0_8
LBB0_5:
	leaq	24(%rax), %rcx
	jmp	LBB0_8
LBB0_4:
	leaq	32(%rax), %rcx
LBB0_8:
	movq	(%rcx), %rcx
	movq	(%rcx), %r9
	testq	%r9, %r9
	je	LBB0_16
## %bb.9:
	movq	8(%rcx), %rdi
	movq	8(%rdx), %rsi
	movq	(%rax), %rax
	movq	(%rax), %r11
	movl	(%rdx), %r8d
	cmpq	$1, %r9
	jne	LBB0_11
## %bb.10:
	xorl	%eax, %eax
	jmp	LBB0_13
LBB0_11:
	movq	%r9, %r10
	andq	$-2, %r10
	movl	$24, %ecx
	xorl	%eax, %eax
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movl	-24(%rdi,%rcx), %ebx
	addl	%ebx, %ebx
	leal	(%rbx,%rbx,4), %ebx
	movl	%ebx, -24(%rsi,%rcx)
	movq	-16(%rdi,%rcx), %rbx
	movq	(%r11,%rbx,8), %rbx
	movq	%rbx, -16(%rsi,%rcx)
	movl	-8(%rdi,%rcx), %ebx
	addl	%ebx, %ebx
	leal	(%rbx,%rbx,4), %ebx
	movl	%ebx, -8(%rsi,%rcx)
	movq	(%rdi,%rcx), %rbx
	movq	(%r11,%rbx,8), %rbx
	movq	%rbx, (%rsi,%rcx)
	addq	$2, %rax
	addq	$32, %rcx
	cmpq	%rax, %r10
	jne	LBB0_12
LBB0_13:
	testb	$1, %r9b
	je	LBB0_15
## %bb.14:
	shlq	$4, %rax
	movl	(%rdi,%rax), %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	movl	%ecx, (%rsi,%rax)
	movq	8(%rdi,%rax), %rcx
	movq	(%r11,%rcx,8), %rcx
	movq	%rcx, 8(%rsi,%rax)
LBB0_15:
	addl	%r9d, %r8d
	movl	%r8d, (%rdx)
LBB0_16:
	xorl	%eax, %eax
LBB0_17:
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
LJTI0_0:
	.long	L0_0_set_6
	.long	L0_0_set_7
	.long	L0_0_set_3
	.long	L0_0_set_5
	.long	L0_0_set_4
	.end_data_region
                                        ## -- End function
	.no_dead_strip	_vega10_get_clock_by_type_with_voltage
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vega10_get_clock_by_type_with_voltage
_vega10_get_clock_by_type_with_voltage: ; @vega10_get_clock_by_type_with_voltage
	.cfi_startproc
; %bb.0:
	sub	w8, w1, #128
	cmp	w8, #4
	b.hi	LBB0_3
; %bb.1:
	ldr	x9, [x0]
Lloh0:
	adrp	x10, lJTI0_0@PAGE
Lloh1:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_2
	ldrb	w12, [x10, x8]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_2:
	add	x8, x9, #16
	b	LBB0_8
LBB0_3:
	mov	w0, #-1
	ret
LBB0_4:
	add	x8, x9, #8
	b	LBB0_8
LBB0_5:
	add	x8, x9, #40
	b	LBB0_8
LBB0_6:
	add	x8, x9, #24
	b	LBB0_8
LBB0_7:
	add	x8, x9, #32
LBB0_8:
	ldr	x10, [x8]
	ldr	x8, [x10]
	cbz	x8, LBB0_11
; %bb.9:
	ldr	x12, [x10, #8]
	ldr	x11, [x2, #8]
	ldr	x9, [x9]
	ldr	x9, [x9]
	ldr	w10, [x2]
	cmp	x8, #1
	b.ne	LBB0_12
; %bb.10:
	mov	x13, #0
	b	LBB0_15
LBB0_11:
	mov	w0, #0
	ret
LBB0_12:
	and	x13, x8, #0xfffffffffffffffe
	add	x14, x12, #16
	add	x15, x11, #16
	mov	x16, x13
LBB0_13:                                ; =>This Inner Loop Header: Depth=1
	ldur	w17, [x14, #-16]
	ldr	w0, [x14]
	add	w17, w17, w17, lsl #2
	lsl	w17, w17, #1
	add	w0, w0, w0, lsl #2
	lsl	w0, w0, #1
	stur	w17, [x15, #-16]
	ldur	x17, [x14, #-8]
	ldr	x1, [x14, #8]
	ldr	x17, [x9, x17, lsl #3]
	ldr	x1, [x9, x1, lsl #3]
	str	w0, [x15]
	stur	x17, [x15, #-8]
	str	x1, [x15, #8]
	add	x14, x14, #32
	add	x15, x15, #32
	subs	x16, x16, #2
	b.ne	LBB0_13
; %bb.14:
	cmp	x8, x13
	b.eq	LBB0_17
LBB0_15:
	sub	x14, x8, x13
	lsl	x13, x13, #4
	add	x12, x12, x13
	add	x12, x12, #8
	add	x11, x11, x13
	add	x11, x11, #8
LBB0_16:                                ; =>This Inner Loop Header: Depth=1
	ldur	w13, [x12, #-8]
	add	w13, w13, w13, lsl #2
	lsl	w13, w13, #1
	stur	w13, [x11, #-8]
	ldr	x13, [x12], #16
	ldr	x13, [x9, x13, lsl #3]
	str	x13, [x11], #16
	subs	x14, x14, #1
	b.ne	LBB0_16
LBB0_17:
	mov	w0, #0
	add	w8, w10, w8
	str	w8, [x2]
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_7-LBB0_2)>>2
                                        ; -- End function
	.no_dead_strip	_vega10_get_clock_by_type_with_voltage
.subsections_via_symbols
