	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v7_0_sw_init
_gfx_v7_0_sw_init:                      ## @gfx_v7_0_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	xorl	%eax, %eax
	cmpl	$129, (%rdi)
	sete	%al
	incl	%eax
	movl	%eax, 16(%rdi)
	movabsq	$34359738372, %rax              ## imm = 0x800000004
	movq	%rax, 20(%rdi)
	movq	_AMDGPU_IRQ_CLIENTID_LEGACY@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	28(%rdi), %r14
	movl	$181, %edx
	movq	%r14, %rcx
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_30
## %bb.1:
	movl	(%r15), %esi
	leaq	52(%r13), %rcx
	movq	%r13, %rdi
	movl	$184, %edx
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_30
## %bb.2:
	movl	(%r15), %esi
	leaq	48(%r13), %rcx
	movq	%r13, %rdi
	movl	$185, %edx
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_30
## %bb.3:
	movq	%r13, %rdi
	callq	_gfx_v7_0_scratch_init
	movq	%r13, %rdi
	callq	_gfx_v7_0_init_microcode
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_30
LBB0_5:
	movq	40(%r13), %rax
	movq	%r13, %rdi
	callq	*(%rax)
	testl	%eax, %eax
	je	LBB0_7
## %bb.6:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_30
LBB0_7:
	movq	%r13, %rdi
	callq	_gfx_v7_0_mec_init
	testl	%eax, %eax
	je	LBB0_9
## %bb.8:
	movl	%eax, %ebx
	leaq	L_.str.2(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_30
LBB0_9:
	cmpl	$0, 8(%r13)
	jle	LBB0_13
## %bb.10:
	xorl	%r12d, %r12d
	xorl	%r15d, %r15d
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	movq	32(%r13), %rax
	leaq	(%rax,%r12), %rbx
	movq	$0, 8(%rax,%r12)
	movl	(%rax,%r12), %edi
	leaq	L_.str.3(%rip), %rsi
	callq	_sprintf
	movq	_AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%r13, %rdi
	movq	%rbx, %rsi
	movl	$1024, %edx                     ## imm = 0x400
	movq	%r14, %rcx
	callq	_amdgpu_ring_init
	testl	%eax, %eax
	jne	LBB0_29
## %bb.12:                              ##   in Loop: Header=BB0_11 Depth=1
	incq	%r15
	movslq	8(%r13), %rax
	addq	$16, %r12
	cmpq	%rax, %r15
	jl	LBB0_11
LBB0_13:
	movl	16(%r13), %ecx
	testl	%ecx, %ecx
	jle	LBB0_27
## %bb.14:
	movl	24(%r13), %eax
	xorl	%r14d, %r14d
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
LBB0_15:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_19 Depth 2
                                        ##       Child Loop BB0_22 Depth 3
	testl	%eax, %eax
	jle	LBB0_26
## %bb.16:                              ##   in Loop: Header=BB0_15 Depth=1
	movl	20(%r13), %ecx
	xorl	%ebx, %ebx
	jmp	LBB0_19
LBB0_17:                                ##   in Loop: Header=BB0_19 Depth=2
	movl	24(%r13), %eax
LBB0_18:                                ##   in Loop: Header=BB0_19 Depth=2
	incl	%ebx
	cmpl	%eax, %ebx
	jge	LBB0_25
LBB0_19:                                ##   Parent Loop BB0_15 Depth=1
                                        ## =>  This Loop Header: Depth=2
                                        ##       Child Loop BB0_22 Depth 3
	testl	%ecx, %ecx
	jle	LBB0_18
## %bb.20:                              ##   in Loop: Header=BB0_19 Depth=2
	xorl	%r15d, %r15d
	jmp	LBB0_22
LBB0_21:                                ##   in Loop: Header=BB0_22 Depth=3
	incl	%r15d
	movl	20(%r13), %ecx
	cmpl	%ecx, %r15d
	jge	LBB0_17
LBB0_22:                                ##   Parent Loop BB0_15 Depth=1
                                        ##     Parent Loop BB0_19 Depth=2
                                        ## =>    This Inner Loop Header: Depth=3
	movq	%r13, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%r15d, %edx
	movl	%ebx, %ecx
	callq	_amdgpu_gfx_is_mec_queue_enabled
	testl	%eax, %eax
	je	LBB0_21
## %bb.23:                              ##   in Loop: Header=BB0_22 Depth=3
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	movl	%r15d, %ecx
	movl	%ebx, %r12d
	movl	%ebx, %r8d
	callq	_gfx_v7_0_compute_ring_init
	testl	%eax, %eax
	jne	LBB0_29
## %bb.24:                              ##   in Loop: Header=BB0_22 Depth=3
	incl	%r14d
	movl	%r12d, %ebx
	jmp	LBB0_21
LBB0_25:                                ##   in Loop: Header=BB0_15 Depth=1
	movl	16(%r13), %ecx
LBB0_26:                                ##   in Loop: Header=BB0_15 Depth=1
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	incl	%edx
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	cmpl	%ecx, %edx
	jl	LBB0_15
LBB0_27:
	movl	$32768, 12(%r13)                ## imm = 0x8000
	movq	%r13, %rdi
	callq	_gfx_v7_0_gpu_early_init
	xorl	%ebx, %ebx
	jmp	LBB0_30
LBB0_29:
	movl	%eax, %ebx
LBB0_30:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ## @AMDGPU_IRQ_CLIENTID_LEGACY
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to load gfx firmware!\n"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to init rlc BOs!\n"

L_.str.2:                               ## @.str.2
	.asciz	"Failed to init MEC BOs!\n"

L_.str.3:                               ## @.str.3
	.asciz	"gfx"

	.comm	_AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP,4,2 ## @AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP
	.no_dead_strip	_gfx_v7_0_sw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function gfx_v7_0_sw_init
lCPI0_0:
	.long	4                               ; 0x4
	.long	8                               ; 0x8
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_gfx_v7_0_sw_init:                      ; @gfx_v7_0_sw_init
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	w8, [x0]
	cmp	w8, #129
	mov	w8, #1
	cinc	w8, w8, eq
	str	w8, [x0, #16]
Lloh0:
	adrp	x8, lCPI0_0@PAGE
Lloh1:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	stur	d0, [x0, #20]
Lloh2:
	adrp	x21, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGE
Lloh3:
	ldr	x21, [x21, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x20, x0, #28
	mov	w2, #181
	mov	x3, x20
	bl	_amdgpu_irq_add_id
	mov	x23, x0
	cbnz	w0, LBB0_29
; %bb.1:
	ldr	w1, [x21]
	add	x3, x19, #52
	mov	x0, x19
	mov	w2, #184
	bl	_amdgpu_irq_add_id
	mov	x23, x0
	cbnz	w0, LBB0_29
; %bb.2:
	ldr	w1, [x21]
	add	x3, x19, #48
	mov	x0, x19
	mov	w2, #185
	bl	_amdgpu_irq_add_id
	mov	x23, x0
	cbnz	w0, LBB0_29
; %bb.3:
	mov	x0, x19
	bl	_gfx_v7_0_scratch_init
	mov	x0, x19
	bl	_gfx_v7_0_init_microcode
	cbz	w0, LBB0_5
; %bb.4:
	mov	x23, x0
Lloh4:
	adrp	x0, l_.str@PAGE
Lloh5:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_29
LBB0_5:
	ldr	x8, [x19, #40]
	ldr	x8, [x8]
	mov	x0, x19
	blr	x8
	cbz	w0, LBB0_7
; %bb.6:
	mov	x23, x0
Lloh6:
	adrp	x0, l_.str.1@PAGE
Lloh7:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_29
LBB0_7:
	mov	x0, x19
	bl	_gfx_v7_0_mec_init
	cbz	w0, LBB0_9
; %bb.8:
	mov	x23, x0
Lloh8:
	adrp	x0, l_.str.2@PAGE
Lloh9:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_29
LBB0_9:
	ldr	w8, [x19, #8]
	cmp	w8, #1
	b.lt	LBB0_13
; %bb.10:
	mov	x24, #0
	mov	x25, #0
Lloh10:
	adrp	x26, _AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP@GOTPAGE
Lloh11:
	ldr	x26, [x26, _AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP@GOTPAGEOFF]
Lloh12:
	adrp	x21, l_.str.3@PAGE
Lloh13:
	add	x21, x21, l_.str.3@PAGEOFF
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #32]
	add	x22, x8, x24
	str	xzr, [x22, #8]
	ldr	w0, [x22]
	mov	x1, x21
	bl	_sprintf
	ldr	w4, [x26]
	mov	x0, x19
	mov	x1, x22
	mov	w2, #1024
	mov	x3, x20
	bl	_amdgpu_ring_init
	cbnz	w0, LBB0_28
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=1
	add	x25, x25, #1
	ldrsw	x8, [x19, #8]
	add	x24, x24, #16
	cmp	x25, x8
	b.lt	LBB0_11
LBB0_13:
	ldr	w9, [x19, #16]
	cmp	w9, #1
	b.lt	LBB0_27
; %bb.14:
	mov	w20, #0
	mov	w21, #0
	ldr	w8, [x19, #24]
LBB0_15:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_19 Depth 2
                                        ;       Child Loop BB0_22 Depth 3
	cmp	w8, #1
	b.lt	LBB0_26
; %bb.16:                               ;   in Loop: Header=BB0_15 Depth=1
	mov	w22, #0
	ldr	w9, [x19, #20]
	b	LBB0_19
LBB0_17:                                ;   in Loop: Header=BB0_19 Depth=2
	ldr	w8, [x19, #24]
LBB0_18:                                ;   in Loop: Header=BB0_19 Depth=2
	add	w22, w22, #1
	cmp	w22, w8
	b.ge	LBB0_25
LBB0_19:                                ;   Parent Loop BB0_15 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_22 Depth 3
	cmp	w9, #1
	b.lt	LBB0_18
; %bb.20:                               ;   in Loop: Header=BB0_19 Depth=2
	mov	w24, #0
	b	LBB0_22
LBB0_21:                                ;   in Loop: Header=BB0_22 Depth=3
	add	w24, w24, #1
	ldr	w9, [x19, #20]
	cmp	w24, w9
	b.ge	LBB0_17
LBB0_22:                                ;   Parent Loop BB0_15 Depth=1
                                        ;     Parent Loop BB0_19 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	mov	x0, x19
	mov	x1, x21
	mov	x2, x24
	mov	x3, x22
	bl	_amdgpu_gfx_is_mec_queue_enabled
	cbz	w0, LBB0_21
; %bb.23:                               ;   in Loop: Header=BB0_22 Depth=3
	mov	x0, x19
	mov	x1, x20
	mov	x2, x21
	mov	x3, x24
	mov	x4, x22
	bl	_gfx_v7_0_compute_ring_init
	cbnz	w0, LBB0_28
; %bb.24:                               ;   in Loop: Header=BB0_22 Depth=3
	add	w20, w20, #1
	b	LBB0_21
LBB0_25:                                ;   in Loop: Header=BB0_15 Depth=1
	ldr	w9, [x19, #16]
LBB0_26:                                ;   in Loop: Header=BB0_15 Depth=1
	add	w21, w21, #1
	cmp	w21, w9
	b.lt	LBB0_15
LBB0_27:
	mov	w8, #32768
	str	w8, [x19, #12]
	mov	x0, x19
	bl	_gfx_v7_0_gpu_early_init
	mov	w23, #0
	b	LBB0_29
LBB0_28:
	mov	x23, x0
LBB0_29:
	mov	x0, x23
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdr	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ; @AMDGPU_IRQ_CLIENTID_LEGACY
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to load gfx firmware!\n"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to init rlc BOs!\n"

l_.str.2:                               ; @.str.2
	.asciz	"Failed to init MEC BOs!\n"

l_.str.3:                               ; @.str.3
	.asciz	"gfx"

	.comm	_AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP,4,2 ; @AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP
	.no_dead_strip	_gfx_v7_0_sw_init
.subsections_via_symbols
