	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_dma_resume                ## -- Begin function r600_dma_resume
	.p2align	4, 0x90
_r600_dma_resume:                       ## @r600_dma_resume
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	40(%rdi), %rbx
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %r13
	shlq	$4, %r13
	movq	_DMA_SEM_INCOMPLETE_TIMER_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	_WREG32
	movq	_DMA_SEM_WAIT_FAIL_TIMER_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movl	(%rbx,%r13), %eax
	leal	3(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$2, %edi
	callq	_order_base_2
	movl	%eax, %ebx
	addl	%eax, %ebx
	movq	_DMA_RB_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_WREG32
	movq	_DMA_RB_RPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_DMA_RB_WPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_DMA_RB_RPTR_ADDR_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_R600_WB_DMA_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	24(%r14), %edi
	callq	_upper_32_bits
	movzbl	%al, %esi
	movl	%r15d, %edi
	callq	_WREG32
	movq	_DMA_RB_RPTR_ADDR_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_R600_WB_DMA_RPTR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	24(%r14), %esi
	andl	$-4, %esi
	callq	_WREG32
	cmpq	$0, 32(%r14)
	je	LBB0_2
## %bb.1:
	movq	_DMA_RPTR_WRITEBACK_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
LBB0_2:
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	leaq	(%rcx,%r13), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	orl	%ebx, %r12d
	movq	_DMA_RB_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	4(%rcx,%r13), %esi
	sarl	$8, %esi
	callq	_WREG32
	movq	_DMA_IB_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DMA_IB_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_WREG32
	movq	_DMA_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_RREG32
	movq	_CTXEMPTY_INT_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%rbx), %edi
	callq	_WREG32
	movq	(%r14), %rax
	movq	_CHIP_RV770@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_4
## %bb.3:
	movq	_DMA_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_WREG32
LBB0_4:
	movq	-48(%rbp), %r15                 ## 8-byte Reload
	movl	$0, 8(%r15,%r13)
	movq	_DMA_RB_WPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_DMA_RB_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DMA_RB_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movl	%r12d, %esi
	callq	_WREG32
	movl	$1, 12(%r15,%r13)
	movq	_R600_RING_TYPE_DMA_INDEX@GOTPCREL(%rip), %r12
	movq	(%r12), %rsi
	movq	%r14, %rdi
	movq	-56(%rbp), %rdx                 ## 8-byte Reload
	callq	_radeon_ring_test
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:
	leaq	(%r15,%r13), %rax
	addq	$12, %rax
	movl	$0, (%rax)
	jmp	LBB0_8
LBB0_6:
	movq	16(%r14), %rax
	movq	(%rax), %rax
	cmpq	(%r12), %rax
	jne	LBB0_8
## %bb.7:
	movl	8(%r14), %esi
	movq	%r14, %rdi
	callq	_radeon_ttm_set_active_vram_size
LBB0_8:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ## @R600_RING_TYPE_DMA_INDEX
	.comm	_DMA_SEM_INCOMPLETE_TIMER_CNTL,4,2 ## @DMA_SEM_INCOMPLETE_TIMER_CNTL
	.comm	_DMA_SEM_WAIT_FAIL_TIMER_CNTL,4,2 ## @DMA_SEM_WAIT_FAIL_TIMER_CNTL
	.comm	_DMA_RB_CNTL,4,2                ## @DMA_RB_CNTL
	.comm	_DMA_RB_RPTR,4,2                ## @DMA_RB_RPTR
	.comm	_DMA_RB_WPTR,4,2                ## @DMA_RB_WPTR
	.comm	_DMA_RB_RPTR_ADDR_HI,4,2        ## @DMA_RB_RPTR_ADDR_HI
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ## @R600_WB_DMA_RPTR_OFFSET
	.comm	_DMA_RB_RPTR_ADDR_LO,4,2        ## @DMA_RB_RPTR_ADDR_LO
	.comm	_DMA_RPTR_WRITEBACK_ENABLE,4,2  ## @DMA_RPTR_WRITEBACK_ENABLE
	.comm	_DMA_RB_BASE,4,2                ## @DMA_RB_BASE
	.comm	_DMA_IB_ENABLE,4,2              ## @DMA_IB_ENABLE
	.comm	_DMA_IB_CNTL,4,2                ## @DMA_IB_CNTL
	.comm	_DMA_CNTL,4,2                   ## @DMA_CNTL
	.comm	_CTXEMPTY_INT_ENABLE,4,2        ## @CTXEMPTY_INT_ENABLE
	.comm	_CHIP_RV770,8,3                 ## @CHIP_RV770
	.comm	_DMA_MODE,4,2                   ## @DMA_MODE
	.comm	_DMA_RB_ENABLE,4,2              ## @DMA_RB_ENABLE
	.comm	_DMA_IB_SWAP_ENABLE,4,2         ## @DMA_IB_SWAP_ENABLE
	.comm	_DMA_RB_SWAP_ENABLE,4,2         ## @DMA_RB_SWAP_ENABLE
	.comm	_DMA_RPTR_WRITEBACK_SWAP_ENABLE,4,2 ## @DMA_RPTR_WRITEBACK_SWAP_ENABLE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_dma_resume                ; -- Begin function r600_dma_resume
	.p2align	2
_r600_dma_resume:                       ; @r600_dma_resume
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	x8, [x0, #40]
Lloh0:
	adrp	x23, _R600_RING_TYPE_DMA_INDEX@GOTPAGE
Lloh1:
	ldr	x23, [x23, _R600_RING_TYPE_DMA_INDEX@GOTPAGEOFF]
	ldr	x9, [x23]
	add	x24, x8, x9, lsl #4
	mov	x20, x24
Lloh2:
	adrp	x8, _DMA_SEM_INCOMPLETE_TIMER_CNTL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DMA_SEM_INCOMPLETE_TIMER_CNTL@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh5:
	adrp	x8, _DMA_SEM_WAIT_FAIL_TIMER_CNTL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _DMA_SEM_WAIT_FAIL_TIMER_CNTL@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
	ldr	w8, [x24]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w0, w8, #2
	bl	_order_base_2
	lsl	w21, w0, #1
Lloh8:
	adrp	x25, _DMA_RB_CNTL@GOTPAGE
Lloh9:
	ldr	x25, [x25, _DMA_RB_CNTL@GOTPAGEOFF]
	ldr	w0, [x25]
	mov	x1, x21
	bl	_WREG32
Lloh10:
	adrp	x8, _DMA_RB_RPTR@GOTPAGE
Lloh11:
	ldr	x8, [x8, _DMA_RB_RPTR@GOTPAGEOFF]
Lloh12:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh13:
	adrp	x26, _DMA_RB_WPTR@GOTPAGE
Lloh14:
	ldr	x26, [x26, _DMA_RB_WPTR@GOTPAGEOFF]
	ldr	w0, [x26]
	mov	w1, #0
	bl	_WREG32
Lloh15:
	adrp	x8, _DMA_RB_RPTR_ADDR_HI@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DMA_RB_RPTR_ADDR_HI@GOTPAGEOFF]
Lloh17:
	ldr	w22, [x8]
	ldr	w8, [x19, #24]
Lloh18:
	adrp	x27, _R600_WB_DMA_RPTR_OFFSET@GOTPAGE
Lloh19:
	ldr	x27, [x27, _R600_WB_DMA_RPTR_OFFSET@GOTPAGEOFF]
	ldr	w9, [x27]
	add	w0, w9, w8
	bl	_upper_32_bits
	and	w1, w0, #0xff
	mov	x0, x22
	bl	_WREG32
Lloh20:
	adrp	x8, _DMA_RB_RPTR_ADDR_LO@GOTPAGE
Lloh21:
	ldr	x8, [x8, _DMA_RB_RPTR_ADDR_LO@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	ldr	w8, [x19, #24]
	ldr	w9, [x27]
	add	w8, w9, w8
	and	w1, w8, #0xfffffffc
	bl	_WREG32
	ldr	x8, [x19, #32]
Lloh23:
	adrp	x9, _DMA_RPTR_WRITEBACK_ENABLE@GOTPAGE
Lloh24:
	ldr	x9, [x9, _DMA_RPTR_WRITEBACK_ENABLE@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	cmp	x8, #0
	csel	w8, wzr, w9, eq
	orr	w21, w8, w21
Lloh26:
	adrp	x8, _DMA_RB_BASE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _DMA_RB_BASE@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
	ldr	w8, [x24, #4]
	asr	w1, w8, #8
	bl	_WREG32
Lloh29:
	adrp	x8, _DMA_IB_ENABLE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _DMA_IB_ENABLE@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
Lloh32:
	adrp	x8, _DMA_IB_CNTL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _DMA_IB_CNTL@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
	bl	_WREG32
Lloh35:
	adrp	x22, _DMA_CNTL@GOTPAGE
Lloh36:
	ldr	x22, [x22, _DMA_CNTL@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_RREG32
Lloh37:
	adrp	x8, _CTXEMPTY_INT_ENABLE@GOTPAGE
Lloh38:
	ldr	x8, [x8, _CTXEMPTY_INT_ENABLE@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w0, [x22]
	bl	_WREG32
	ldr	x8, [x19]
Lloh40:
	adrp	x9, _CHIP_RV770@GOTPAGE
Lloh41:
	ldr	x9, [x9, _CHIP_RV770@GOTPAGEOFF]
Lloh42:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_2
; %bb.1:
Lloh43:
	adrp	x8, _DMA_MODE@GOTPAGE
Lloh44:
	ldr	x8, [x8, _DMA_MODE@GOTPAGEOFF]
Lloh45:
	ldr	w0, [x8]
	mov	w1, #1
	bl	_WREG32
LBB0_2:
	str	wzr, [x24, #8]
	ldr	w0, [x26]
	mov	w1, #0
	bl	_WREG32
	ldr	w0, [x25]
Lloh46:
	adrp	x8, _DMA_RB_ENABLE@GOTPAGE
Lloh47:
	ldr	x8, [x8, _DMA_RB_ENABLE@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
	orr	w1, w21, w8
	bl	_WREG32
	mov	w8, #1
	str	w8, [x24, #12]!
	ldr	x1, [x23]
	mov	x0, x19
	mov	x2, x20
	bl	_radeon_ring_test
	mov	x20, x0
	cbz	w0, LBB0_4
; %bb.3:
	str	wzr, [x24]
	b	LBB0_6
LBB0_4:
	ldr	x8, [x19, #16]
	ldr	x8, [x8]
	ldr	x9, [x23]
	cmp	x8, x9
	b.ne	LBB0_6
; %bb.5:
	ldr	w1, [x19, #8]
	mov	x0, x19
	bl	_radeon_ttm_set_active_vram_size
LBB0_6:
	mov	x0, x20
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.cfi_endproc
                                        ; -- End function
	.comm	_R600_RING_TYPE_DMA_INDEX,8,3   ; @R600_RING_TYPE_DMA_INDEX
	.comm	_DMA_SEM_INCOMPLETE_TIMER_CNTL,4,2 ; @DMA_SEM_INCOMPLETE_TIMER_CNTL
	.comm	_DMA_SEM_WAIT_FAIL_TIMER_CNTL,4,2 ; @DMA_SEM_WAIT_FAIL_TIMER_CNTL
	.comm	_DMA_RB_CNTL,4,2                ; @DMA_RB_CNTL
	.comm	_DMA_RB_RPTR,4,2                ; @DMA_RB_RPTR
	.comm	_DMA_RB_WPTR,4,2                ; @DMA_RB_WPTR
	.comm	_DMA_RB_RPTR_ADDR_HI,4,2        ; @DMA_RB_RPTR_ADDR_HI
	.comm	_R600_WB_DMA_RPTR_OFFSET,4,2    ; @R600_WB_DMA_RPTR_OFFSET
	.comm	_DMA_RB_RPTR_ADDR_LO,4,2        ; @DMA_RB_RPTR_ADDR_LO
	.comm	_DMA_RPTR_WRITEBACK_ENABLE,4,2  ; @DMA_RPTR_WRITEBACK_ENABLE
	.comm	_DMA_RB_BASE,4,2                ; @DMA_RB_BASE
	.comm	_DMA_IB_ENABLE,4,2              ; @DMA_IB_ENABLE
	.comm	_DMA_IB_CNTL,4,2                ; @DMA_IB_CNTL
	.comm	_DMA_CNTL,4,2                   ; @DMA_CNTL
	.comm	_CTXEMPTY_INT_ENABLE,4,2        ; @CTXEMPTY_INT_ENABLE
	.comm	_CHIP_RV770,8,3                 ; @CHIP_RV770
	.comm	_DMA_MODE,4,2                   ; @DMA_MODE
	.comm	_DMA_RB_ENABLE,4,2              ; @DMA_RB_ENABLE
	.comm	_DMA_IB_SWAP_ENABLE,4,2         ; @DMA_IB_SWAP_ENABLE
	.comm	_DMA_RB_SWAP_ENABLE,4,2         ; @DMA_RB_SWAP_ENABLE
	.comm	_DMA_RPTR_WRITEBACK_SWAP_ENABLE,4,2 ; @DMA_RPTR_WRITEBACK_SWAP_ENABLE
.subsections_via_symbols
