	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_get_pp_od_clk_voltage
_amdgpu_get_pp_od_clk_voltage:          ## @amdgpu_get_pp_od_clk_voltage
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	callq	_dev_get_drvdata
	movq	(%rax), %r15
	movq	%r15, %rdi
	callq	_is_support_sw_smu
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	addq	$8, %r15
	movq	_SMU_OD_SCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movq	%r14, %rdx
	callq	_smu_print_clk_levels
	movq	_SMU_OD_MCLK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movslq	%eax, %rbx
	leaq	(%r14,%rbx), %rdx
	movq	%r15, %rdi
	callq	_smu_print_clk_levels
	addl	%eax, %ebx
	movq	_SMU_OD_VDDC_CURVE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movslq	%ebx, %rbx
	leaq	(%r14,%rbx), %rdx
	movq	%r15, %rdi
	callq	_smu_print_clk_levels
	addl	%eax, %ebx
	movq	_SMU_OD_RANGE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movslq	%ebx, %rbx
	addq	%rbx, %r14
	movq	%r15, %rdi
	movq	%r14, %rdx
	callq	_smu_print_clk_levels
	jmp	LBB0_4
LBB0_2:
	movq	(%r15), %rax
	cmpq	$0, (%rax)
	je	LBB0_5
## %bb.3:
	movq	_OD_SCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movq	%r14, %rdx
	callq	_amdgpu_dpm_print_clock_levels
	movq	_OD_MCLK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movslq	%eax, %rbx
	leaq	(%r14,%rbx), %rdx
	movq	%r15, %rdi
	callq	_amdgpu_dpm_print_clock_levels
	addl	%eax, %ebx
	movq	_OD_VDDC_CURVE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movslq	%ebx, %rbx
	leaq	(%r14,%rbx), %rdx
	movq	%r15, %rdi
	callq	_amdgpu_dpm_print_clock_levels
	addl	%eax, %ebx
	movq	_OD_RANGE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movslq	%ebx, %rbx
	addq	%rbx, %r14
	movq	%r15, %rdi
	movq	%r14, %rdx
	callq	_amdgpu_dpm_print_clock_levels
LBB0_4:
	addl	%eax, %ebx
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	L_.str(%rip), %rdx
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_snprintf                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SMU_OD_SCLK,4,2                ## @SMU_OD_SCLK
	.comm	_SMU_OD_MCLK,4,2                ## @SMU_OD_MCLK
	.comm	_SMU_OD_VDDC_CURVE,4,2          ## @SMU_OD_VDDC_CURVE
	.comm	_SMU_OD_RANGE,4,2               ## @SMU_OD_RANGE
	.comm	_OD_SCLK,4,2                    ## @OD_SCLK
	.comm	_OD_MCLK,4,2                    ## @OD_MCLK
	.comm	_OD_VDDC_CURVE,4,2              ## @OD_VDDC_CURVE
	.comm	_OD_RANGE,4,2                   ## @OD_RANGE
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\n"

	.no_dead_strip	_amdgpu_get_pp_od_clk_voltage
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_get_pp_od_clk_voltage
_amdgpu_get_pp_od_clk_voltage:          ; @amdgpu_get_pp_od_clk_voltage
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	bl	_dev_get_drvdata
	ldr	x20, [x0]
	mov	x0, x20
	bl	_is_support_sw_smu
	cbz	x0, LBB0_2
; %bb.1:
	add	x20, x20, #8
Lloh0:
	adrp	x8, _SMU_OD_SCLK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SMU_OD_SCLK@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x20
	mov	x2, x19
	bl	_smu_print_clk_levels
                                        ; kill: def $w0 killed $w0 def $x0
Lloh3:
	adrp	x8, _SMU_OD_MCLK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SMU_OD_MCLK@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	sxtw	x21, w0
	add	x2, x19, x21
	mov	x0, x20
	bl	_smu_print_clk_levels
	add	x21, x21, w0, sxtw
Lloh6:
	adrp	x8, _SMU_OD_VDDC_CURVE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SMU_OD_VDDC_CURVE@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	add	x2, x19, x21
	mov	x0, x20
	bl	_smu_print_clk_levels
	add	w21, w0, w21
Lloh9:
	adrp	x8, _SMU_OD_RANGE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SMU_OD_RANGE@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	add	x2, x19, w21, sxtw
	mov	x0, x20
	bl	_smu_print_clk_levels
	b	LBB0_4
LBB0_2:
	ldr	x8, [x20]
	ldr	x8, [x8]
	cbz	x8, LBB0_5
; %bb.3:
Lloh12:
	adrp	x8, _OD_SCLK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _OD_SCLK@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x20
	mov	x2, x19
	bl	_amdgpu_dpm_print_clock_levels
                                        ; kill: def $w0 killed $w0 def $x0
Lloh15:
	adrp	x8, _OD_MCLK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _OD_MCLK@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	sxtw	x21, w0
	add	x2, x19, x21
	mov	x0, x20
	bl	_amdgpu_dpm_print_clock_levels
	add	x21, x21, w0, sxtw
Lloh18:
	adrp	x8, _OD_VDDC_CURVE@GOTPAGE
Lloh19:
	ldr	x8, [x8, _OD_VDDC_CURVE@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	add	x2, x19, x21
	mov	x0, x20
	bl	_amdgpu_dpm_print_clock_levels
	add	w21, w0, w21
Lloh21:
	adrp	x8, _OD_RANGE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _OD_RANGE@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	add	x2, x19, w21, sxtw
	mov	x0, x20
	bl	_amdgpu_dpm_print_clock_levels
LBB0_4:
	add	w0, w0, w21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_5:
Lloh24:
	adrp	x8, _PAGE_SIZE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PAGE_SIZE@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
Lloh27:
	adrp	x2, l_.str@PAGE
Lloh28:
	add	x2, x2, l_.str@PAGEOFF
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_snprintf
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpAdd	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_SMU_OD_SCLK,4,2                ; @SMU_OD_SCLK
	.comm	_SMU_OD_MCLK,4,2                ; @SMU_OD_MCLK
	.comm	_SMU_OD_VDDC_CURVE,4,2          ; @SMU_OD_VDDC_CURVE
	.comm	_SMU_OD_RANGE,4,2               ; @SMU_OD_RANGE
	.comm	_OD_SCLK,4,2                    ; @OD_SCLK
	.comm	_OD_MCLK,4,2                    ; @OD_MCLK
	.comm	_OD_VDDC_CURVE,4,2              ; @OD_VDDC_CURVE
	.comm	_OD_RANGE,4,2                   ; @OD_RANGE
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\n"

	.no_dead_strip	_amdgpu_get_pp_od_clk_voltage
.subsections_via_symbols
