	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cik_gpu_pci_config_reset
_cik_gpu_pci_config_reset:              ## @cik_gpu_pci_config_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movl	$0, -48(%rbp)
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
	movl	24(%rdi), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_info
	movq	_AMD_IS_APU@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	testl	%eax, (%r12)
	je	LBB0_2
## %bb.1:
	leaq	-48(%rbp), %rsi
	movq	%r12, %rdi
	callq	_kv_save_regs_for_reset
LBB0_2:
	movl	20(%r12), %edi
	callq	_pci_clear_master
	movq	%r12, %rdi
	callq	_amdgpu_device_pci_config_reset
	movl	$100, %edi
	callq	_udelay
	cmpq	$0, 8(%r12)
	jle	LBB0_7
## %bb.3:
	xorl	%ebx, %ebx
	movq	_mmCONFIG_MEMSIZE@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r13), %edi
	callq	_RREG32
	cmpl	$-1, %eax
	jne	LBB0_5
## %bb.6:                               ##   in Loop: Header=BB0_4 Depth=1
	movl	$1, %edi
	callq	_udelay
	incq	%rbx
	cmpq	8(%r12), %rbx
	jl	LBB0_4
	jmp	LBB0_7
LBB0_5:
	movl	20(%r12), %edi
	callq	_pci_set_master
	movl	$1, 16(%r12)
	xorl	%r14d, %r14d
LBB0_7:
	movl	(%r15), %eax
	testl	%eax, (%r12)
	je	LBB0_9
## %bb.8:
	leaq	-48(%rbp), %rsi
	movq	%r12, %rdi
	callq	_kv_restore_regs_for_reset
LBB0_9:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"GPU pci config reset\n"

	.comm	_AMD_IS_APU,4,2                 ## @AMD_IS_APU
	.comm	_mmCONFIG_MEMSIZE,4,2           ## @mmCONFIG_MEMSIZE
	.no_dead_strip	_cik_gpu_pci_config_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cik_gpu_pci_config_reset
_cik_gpu_pci_config_reset:              ; @cik_gpu_pci_config_reset
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	str	wzr, [sp, #8]
Lloh0:
	adrp	x8, _EINVAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	neg	w20, w8
	ldr	w0, [x0, #24]
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_info
	ldr	w8, [x19]
Lloh5:
	adrp	x21, _AMD_IS_APU@GOTPAGE
Lloh6:
	ldr	x21, [x21, _AMD_IS_APU@GOTPAGEOFF]
	ldr	w9, [x21]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	add	x1, sp, #8
	mov	x0, x19
	bl	_kv_save_regs_for_reset
LBB0_2:
	ldr	w0, [x19, #20]
	bl	_pci_clear_master
	mov	x0, x19
	bl	_amdgpu_device_pci_config_reset
	mov	w0, #100
	bl	_udelay
	ldr	x8, [x19, #8]
	cmp	x8, #1
	b.lt	LBB0_7
; %bb.3:
	mov	x22, #0
Lloh7:
	adrp	x23, _mmCONFIG_MEMSIZE@GOTPAGE
Lloh8:
	ldr	x23, [x23, _mmCONFIG_MEMSIZE@GOTPAGEOFF]
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x23]
	bl	_RREG32
	cmn	w0, #1
	b.ne	LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	w0, #1
	bl	_udelay
	add	x22, x22, #1
	ldr	x8, [x19, #8]
	cmp	x22, x8
	b.lt	LBB0_4
	b	LBB0_7
LBB0_6:
	ldr	w0, [x19, #20]
	bl	_pci_set_master
	mov	w20, #0
	mov	w8, #1
	str	w8, [x19, #16]
LBB0_7:
	ldr	w8, [x19]
	ldr	w9, [x21]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.8:
	add	x1, sp, #8
	mov	x0, x19
	bl	_kv_restore_regs_for_reset
LBB0_9:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"GPU pci config reset\n"

	.comm	_AMD_IS_APU,4,2                 ; @AMD_IS_APU
	.comm	_mmCONFIG_MEMSIZE,4,2           ; @mmCONFIG_MEMSIZE
	.no_dead_strip	_cik_gpu_pci_config_reset
.subsections_via_symbols
