	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pr_error_to_mgr_status
_pr_error_to_mgr_status:                ## @pr_error_to_mgr_status
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_FME_PR_ERR_OPERATION_ERR@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	andl	%edi, %ecx
	je	LBB0_2
## %bb.1:
	movq	_FPGA_MGR_STATUS_OPERATION_ERR@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
LBB0_2:
	movq	_FME_PR_ERR_CRC_ERR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%edi, %eax
	je	LBB0_4
## %bb.3:
	movq	_FPGA_MGR_STATUS_CRC_ERR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_4:
	movq	_FME_PR_ERR_INCOMPATIBLE_BS@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	andl	%edi, %edx
	je	LBB0_6
## %bb.5:
	movq	_FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
LBB0_6:
	orl	%ecx, %eax
	movq	_FME_PR_ERR_PROTOCOL_ERR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%edi, %ecx
	je	LBB0_8
## %bb.7:
	movq	_FPGA_MGR_STATUS_IP_PROTOCOL_ERR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_8:
	orl	%ecx, %edx
	orl	%edx, %eax
	movq	_FME_PR_ERR_FIFO_OVERFLOW@GOTPCREL(%rip), %rcx
	andl	(%rcx), %edi
	je	LBB0_10
## %bb.9:
	movq	_FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
LBB0_10:
	orl	%edi, %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_FME_PR_ERR_OPERATION_ERR,4,2   ## @FME_PR_ERR_OPERATION_ERR
	.comm	_FPGA_MGR_STATUS_OPERATION_ERR,4,2 ## @FPGA_MGR_STATUS_OPERATION_ERR
	.comm	_FME_PR_ERR_CRC_ERR,4,2         ## @FME_PR_ERR_CRC_ERR
	.comm	_FPGA_MGR_STATUS_CRC_ERR,4,2    ## @FPGA_MGR_STATUS_CRC_ERR
	.comm	_FME_PR_ERR_INCOMPATIBLE_BS,4,2 ## @FME_PR_ERR_INCOMPATIBLE_BS
	.comm	_FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR,4,2 ## @FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR
	.comm	_FME_PR_ERR_PROTOCOL_ERR,4,2    ## @FME_PR_ERR_PROTOCOL_ERR
	.comm	_FPGA_MGR_STATUS_IP_PROTOCOL_ERR,4,2 ## @FPGA_MGR_STATUS_IP_PROTOCOL_ERR
	.comm	_FME_PR_ERR_FIFO_OVERFLOW,4,2   ## @FME_PR_ERR_FIFO_OVERFLOW
	.comm	_FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR,4,2 ## @FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR
	.no_dead_strip	_pr_error_to_mgr_status
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pr_error_to_mgr_status
_pr_error_to_mgr_status:                ; @pr_error_to_mgr_status
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _FME_PR_ERR_OPERATION_ERR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FME_PR_ERR_OPERATION_ERR@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _FPGA_MGR_STATUS_OPERATION_ERR@GOTPAGE
Lloh4:
	ldr	x9, [x9, _FPGA_MGR_STATUS_OPERATION_ERR@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w8, w0
Lloh6:
	adrp	x8, _FME_PR_ERR_CRC_ERR@GOTPAGE
Lloh7:
	ldr	x8, [x8, _FME_PR_ERR_CRC_ERR@GOTPAGEOFF]
	csel	w9, wzr, w9, eq
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x10, _FPGA_MGR_STATUS_CRC_ERR@GOTPAGE
Lloh10:
	ldr	x10, [x10, _FPGA_MGR_STATUS_CRC_ERR@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	tst	w8, w0
	csel	w8, wzr, w10, eq
	orr	w8, w8, w9
Lloh12:
	adrp	x9, _FME_PR_ERR_INCOMPATIBLE_BS@GOTPAGE
Lloh13:
	ldr	x9, [x9, _FME_PR_ERR_INCOMPATIBLE_BS@GOTPAGEOFF]
Lloh14:
	adrp	x10, _FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR@GOTPAGE
Lloh15:
	ldr	x10, [x10, _FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
Lloh17:
	ldr	w10, [x10]
	tst	w9, w0
	csel	w9, wzr, w10, eq
Lloh18:
	adrp	x10, _FME_PR_ERR_PROTOCOL_ERR@GOTPAGE
Lloh19:
	ldr	x10, [x10, _FME_PR_ERR_PROTOCOL_ERR@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh20:
	ldr	w9, [x10]
Lloh21:
	adrp	x10, _FPGA_MGR_STATUS_IP_PROTOCOL_ERR@GOTPAGE
Lloh22:
	ldr	x10, [x10, _FPGA_MGR_STATUS_IP_PROTOCOL_ERR@GOTPAGEOFF]
Lloh23:
	ldr	w10, [x10]
	tst	w9, w0
	csel	w9, wzr, w10, eq
	orr	w8, w8, w9
Lloh24:
	adrp	x9, _FME_PR_ERR_FIFO_OVERFLOW@GOTPAGE
Lloh25:
	ldr	x9, [x9, _FME_PR_ERR_FIFO_OVERFLOW@GOTPAGEOFF]
Lloh26:
	adrp	x10, _FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR@GOTPAGE
Lloh27:
	ldr	x10, [x10, _FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
Lloh29:
	ldr	w10, [x10]
	tst	w9, w0
	csel	w9, wzr, w10, eq
	orr	w0, w8, w9
	ret
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh28
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh16
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_FME_PR_ERR_OPERATION_ERR,4,2   ; @FME_PR_ERR_OPERATION_ERR
	.comm	_FPGA_MGR_STATUS_OPERATION_ERR,4,2 ; @FPGA_MGR_STATUS_OPERATION_ERR
	.comm	_FME_PR_ERR_CRC_ERR,4,2         ; @FME_PR_ERR_CRC_ERR
	.comm	_FPGA_MGR_STATUS_CRC_ERR,4,2    ; @FPGA_MGR_STATUS_CRC_ERR
	.comm	_FME_PR_ERR_INCOMPATIBLE_BS,4,2 ; @FME_PR_ERR_INCOMPATIBLE_BS
	.comm	_FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR,4,2 ; @FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR
	.comm	_FME_PR_ERR_PROTOCOL_ERR,4,2    ; @FME_PR_ERR_PROTOCOL_ERR
	.comm	_FPGA_MGR_STATUS_IP_PROTOCOL_ERR,4,2 ; @FPGA_MGR_STATUS_IP_PROTOCOL_ERR
	.comm	_FME_PR_ERR_FIFO_OVERFLOW,4,2   ; @FME_PR_ERR_FIFO_OVERFLOW
	.comm	_FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR,4,2 ; @FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR
	.no_dead_strip	_pr_error_to_mgr_status
.subsections_via_symbols
