	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv730_populate_sclk_value      ## -- Begin function rv730_populate_sclk_value
	.p2align	4, 0x90
_rv730_populate_sclk_value:             ## @rv730_populate_sclk_value
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, -80(%rbp)                 ## 8-byte Spill
	movl	%esi, %r12d
	movq	%rdi, %rbx
	callq	_rv770_get_pi
	movq	%rax, %r13
	movl	8(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	12(%r13), %eax
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movl	16(%r13), %eax
	movl	%eax, -108(%rbp)                ## 4-byte Spill
	movl	20(%r13), %eax
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movl	24(%r13), %r15d
	movl	(%rbx), %r14d
	movq	_COMPUTE_ENGINE_PLL_PARAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-96(%rbp), %r8
	movq	%rbx, %rdi
	movl	%r12d, %edx
	xorl	%ecx, %ecx
	callq	_radeon_atom_get_clock_dividers
	testl	%eax, %eax
	jne	LBB0_9
## %bb.1:
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	movq	%r14, -72(%rbp)                 ## 8-byte Spill
	movl	%r12d, -48(%rbp)                ## 4-byte Spill
	movl	-96(%rbp), %edx
	incl	%edx
	cmpq	$0, -88(%rbp)
	movl	%r15d, -52(%rbp)                ## 4-byte Spill
	movl	%eax, -104(%rbp)                ## 4-byte Spill
	movq	%rbx, -128(%rbp)                ## 8-byte Spill
	je	LBB0_2
## %bb.3:
	movl	-92(%rbp), %eax
	movl	%eax, %ecx
	shrl	$4, %ecx
	andl	$15, %ecx
	andl	$15, %eax
	leal	(%rax,%rcx), %r15d
	addl	$2, %r15d
	jmp	LBB0_4
LBB0_2:
	movl	$1, %r15d
LBB0_4:
	movl	-48(%rbp), %eax                 ## 4-byte Reload
	movq	-72(%rbp), %rsi                 ## 8-byte Reload
	movl	%edi, %ebx
	imull	%eax, %r15d
	movl	%r15d, %r14d
	movl	%edx, -100(%rbp)                ## 4-byte Spill
	imull	%edx, %r15d
	shll	$14, %r15d
	movl	%r15d, %edi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_do_div
	movq	_SPLL_DIVEN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, %ecx
	orl	%ebx, %ecx
	notl	%eax
	andl	%ebx, %eax
	cmpq	$0, -88(%rbp)
	cmovnel	%ecx, %eax
	movq	_SPLL_HILEN_MASK@GOTPCREL(%rip), %rcx
	movq	_SPLL_LOLEN_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	movq	_SPLL_REF_DIV_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	-96(%rbp), %edi
	callq	_SPLL_REF_DIV
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	-92(%rbp), %edi
	shrl	$4, %edi
	andl	$15, %edi
	callq	_SPLL_HILEN
	movl	%eax, %r12d
	orl	-44(%rbp), %r12d                ## 4-byte Folded Reload
	movl	-92(%rbp), %edi
	andl	$15, %edi
	callq	_SPLL_LOLEN
	orl	%r12d, %eax
	orl	%ebx, %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_SCLK_MUX_SEL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movl	-60(%rbp), %ebx                 ## 4-byte Reload
	andl	%eax, %ebx
	movl	$2, %edi
	callq	_SCLK_MUX_SEL
	orl	%ebx, %eax
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movq	_SPLL_FB_DIV_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movl	-108(%rbp), %ebx                ## 4-byte Reload
	andl	%eax, %ebx
	movl	%r15d, %edi
	callq	_SPLL_FB_DIV
	movl	%eax, %r12d
	orl	%ebx, %r12d
	movq	_SPLL_DITHEN@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	cmpq	$0, (%r13)
	je	LBB0_5
## %bb.6:
	movq	_ASIC_INTERNAL_ENGINE_SS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-120(%rbp), %rsi
	movq	-128(%rbp), %rdi                ## 8-byte Reload
	movl	%r14d, %ecx
	callq	_radeon_atombios_get_asic_ss_info
	testq	%rax, %rax
	je	LBB0_5
## %bb.7:
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	leal	(%rax,%rax,4), %eax
	movl	-100(%rbp), %ecx                ## 4-byte Reload
	imull	-120(%rbp), %ecx
	cltd
	idivl	%ecx
	movl	%eax, %edi
	imull	-116(%rbp), %r15d
	imull	$10000, %eax, %ecx              ## imm = 0x2710
	movl	%r15d, %eax
	cltd
	idivl	%ecx
	movl	%eax, %r14d
	movq	_CLK_S_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movl	-56(%rbp), %r15d                ## 4-byte Reload
	andl	%eax, %r15d
	callq	_CLK_S
	movl	%eax, %ebx
	orl	%r15d, %ebx
	movq	_SSEN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_CLK_V_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movl	-52(%rbp), %r15d                ## 4-byte Reload
	andl	%eax, %r15d
	movl	%r14d, %edi
	callq	_CLK_V
	orl	%eax, %r15d
	movl	%ebx, %r14d
	movq	-80(%rbp), %rbx                 ## 8-byte Reload
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	jmp	LBB0_8
LBB0_5:
	movq	-80(%rbp), %rbx                 ## 8-byte Reload
	movl	-52(%rbp), %r15d                ## 4-byte Reload
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	movl	-56(%rbp), %r14d                ## 4-byte Reload
LBB0_8:
	movl	-44(%rbp), %r13d                ## 4-byte Reload
	callq	_cpu_to_be32
	movq	%rax, 40(%rbx)
	movl	%r13d, %edi
	callq	_cpu_to_be32
	movq	%rax, 32(%rbx)
	movl	-60(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_be32
	movq	%rax, 24(%rbx)
	movl	%r12d, %edi
	callq	_cpu_to_be32
	movq	%rax, 16(%rbx)
	movl	%r14d, %edi
	callq	_cpu_to_be32
	movq	%rax, 8(%rbx)
	movl	%r15d, %edi
	callq	_cpu_to_be32
	movq	%rax, (%rbx)
	movl	-104(%rbp), %eax                ## 4-byte Reload
LBB0_9:
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ## @COMPUTE_ENGINE_PLL_PARAM
	.comm	_SPLL_DIVEN,4,2                 ## @SPLL_DIVEN
	.comm	_SPLL_HILEN_MASK,4,2            ## @SPLL_HILEN_MASK
	.comm	_SPLL_LOLEN_MASK,4,2            ## @SPLL_LOLEN_MASK
	.comm	_SPLL_REF_DIV_MASK,4,2          ## @SPLL_REF_DIV_MASK
	.comm	_SCLK_MUX_SEL_MASK,4,2          ## @SCLK_MUX_SEL_MASK
	.comm	_SPLL_FB_DIV_MASK,4,2           ## @SPLL_FB_DIV_MASK
	.comm	_SPLL_DITHEN,4,2                ## @SPLL_DITHEN
	.comm	_ASIC_INTERNAL_ENGINE_SS,4,2    ## @ASIC_INTERNAL_ENGINE_SS
	.comm	_CLK_S_MASK,4,2                 ## @CLK_S_MASK
	.comm	_SSEN,4,2                       ## @SSEN
	.comm	_CLK_V_MASK,4,2                 ## @CLK_V_MASK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv730_populate_sclk_value      ; -- Begin function rv730_populate_sclk_value
	.p2align	2
_rv730_populate_sclk_value:             ; @rv730_populate_sclk_value
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #144
	.cfi_def_cfa_offset 144
	stp	x28, x27, [sp, #48]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #64]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #80]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #96]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #112]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #128]            ; 16-byte Folded Spill
	add	x29, sp, #128
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x2
	mov	x19, x1
	mov	x24, x0
	bl	_rv770_get_pi
	mov	x26, x0
	ldp	w27, w23, [x0, #8]
	ldp	w22, w25, [x0, #16]
	ldr	w28, [x0, #24]
	ldr	w20, [x24]
Lloh0:
	adrp	x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x4, sp, #32
	mov	x0, x24
	mov	x2, x19
	mov	w3, #0
	bl	_radeon_atom_get_clock_dividers
	cbnz	w0, LBB0_9
; %bb.1:
	stp	w23, w25, [sp, #12]             ; 8-byte Folded Spill
	ldr	w8, [sp, #32]
	add	w11, w8, #1
	ldr	x8, [sp, #40]
	str	w28, [sp, #20]                  ; 4-byte Folded Spill
	str	w0, [sp, #8]                    ; 4-byte Folded Spill
	cbz	x8, LBB0_3
; %bb.2:
	ldr	w8, [sp, #36]
	ubfx	w9, w8, #4, #4
	and	w8, w8, #0xf
	add	w8, w8, w9
	add	w8, w8, #2
	b	LBB0_4
LBB0_3:
	mov	w8, #1
LBB0_4:
	mov	x25, x20
	mov	x20, x22
	mov	x23, x19
	mul	w8, w8, w19
	stp	w11, w8, [sp]                   ; 8-byte Folded Spill
	mul	w8, w8, w11
	lsl	w28, w8, #14
	mov	x0, x28
	mov	x1, x25
	bl	_do_div
	ldr	x8, [sp, #40]
Lloh3:
	adrp	x9, _SPLL_DIVEN@GOTPAGE
Lloh4:
	ldr	x9, [x9, _SPLL_DIVEN@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w10, w9, w27
	bic	w9, w27, w9
	cmp	x8, #0
Lloh6:
	adrp	x8, _SPLL_HILEN_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SPLL_HILEN_MASK@GOTPAGEOFF]
	csel	w9, w9, w10, eq
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x10, _SPLL_LOLEN_MASK@GOTPAGE
Lloh10:
	ldr	x10, [x10, _SPLL_LOLEN_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	orr	w8, w10, w8
Lloh12:
	adrp	x10, _SPLL_REF_DIV_MASK@GOTPAGE
Lloh13:
	ldr	x10, [x10, _SPLL_REF_DIV_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
	orr	w8, w8, w10
	bic	w27, w9, w8
	ldr	w0, [sp, #32]
	bl	_SPLL_REF_DIV
	orr	w27, w27, w0
	ldr	w8, [sp, #36]
	ubfx	w0, w8, #4, #4
	bl	_SPLL_HILEN
	orr	w27, w27, w0
	ldr	w8, [sp, #36]
	and	w0, w8, #0xf
	bl	_SPLL_LOLEN
	orr	w27, w27, w0
Lloh15:
	adrp	x8, _SCLK_MUX_SEL_MASK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _SCLK_MUX_SEL_MASK@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	ldr	w9, [sp, #12]                   ; 4-byte Folded Reload
	bic	w22, w9, w8
	mov	w0, #2
	bl	_SCLK_MUX_SEL
	orr	w8, w22, w0
	str	w8, [sp, #12]                   ; 4-byte Folded Spill
Lloh18:
	adrp	x8, _SPLL_FB_DIV_MASK@GOTPAGE
Lloh19:
	ldr	x8, [x8, _SPLL_FB_DIV_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	bic	w20, w20, w8
	mov	x0, x28
	bl	_SPLL_FB_DIV
	orr	w8, w20, w0
Lloh21:
	adrp	x9, _SPLL_DITHEN@GOTPAGE
Lloh22:
	ldr	x9, [x9, _SPLL_DITHEN@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	orr	w20, w8, w9
	ldr	x8, [x26]
	mov	x19, x21
	cbz	x8, LBB0_7
; %bb.5:
Lloh24:
	adrp	x8, _ASIC_INTERNAL_ENGINE_SS@GOTPAGE
Lloh25:
	ldr	x8, [x8, _ASIC_INTERNAL_ENGINE_SS@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	add	x1, sp, #24
	mov	x0, x24
	ldr	w3, [sp, #4]                    ; 4-byte Folded Reload
	bl	_radeon_atombios_get_asic_ss_info
	ldr	w22, [sp, #16]                  ; 4-byte Folded Reload
	cbz	x0, LBB0_8
; %bb.6:
	add	w8, w25, w25, lsl #2
	ldp	w9, w10, [sp, #24]
	ldr	w11, [sp]                       ; 4-byte Folded Reload
	mul	w9, w9, w11
	sdiv	w0, w8, w9
	mul	w8, w10, w28
	mov	w9, #10000
	mul	w9, w0, w9
	sdiv	w24, w8, w9
Lloh27:
	adrp	x8, _CLK_S_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _CLK_S_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	mov	x21, x20
	bic	w20, w22, w8
	bl	_CLK_S
	orr	w8, w20, w0
Lloh30:
	adrp	x9, _SSEN@GOTPAGE
Lloh31:
	ldr	x9, [x9, _SSEN@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	orr	w22, w8, w9
Lloh33:
	adrp	x8, _CLK_V_MASK@GOTPAGE
Lloh34:
	ldr	x8, [x8, _CLK_V_MASK@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	ldr	w9, [sp, #20]                   ; 4-byte Folded Reload
	bic	w20, w9, w8
	mov	x0, x24
	bl	_CLK_V
	orr	w8, w20, w0
	mov	x20, x21
	str	w8, [sp, #20]                   ; 4-byte Folded Spill
	b	LBB0_8
LBB0_7:
	ldr	w22, [sp, #16]                  ; 4-byte Folded Reload
LBB0_8:
	mov	x0, x23
	bl	_cpu_to_be32
	str	x0, [x19, #40]
	mov	x0, x27
	bl	_cpu_to_be32
	str	x0, [x19, #32]
	ldr	w0, [sp, #12]                   ; 4-byte Folded Reload
	bl	_cpu_to_be32
	str	x0, [x19, #24]
	mov	x0, x20
	bl	_cpu_to_be32
	str	x0, [x19, #16]
	mov	x0, x22
	bl	_cpu_to_be32
	str	x0, [x19, #8]
	ldr	w0, [sp, #20]                   ; 4-byte Folded Reload
	bl	_cpu_to_be32
	str	x0, [x19]
	ldr	w0, [sp, #8]                    ; 4-byte Folded Reload
LBB0_9:
	ldp	x29, x30, [sp, #128]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #112]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #96]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #80]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #64]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #144
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ; @COMPUTE_ENGINE_PLL_PARAM
	.comm	_SPLL_DIVEN,4,2                 ; @SPLL_DIVEN
	.comm	_SPLL_HILEN_MASK,4,2            ; @SPLL_HILEN_MASK
	.comm	_SPLL_LOLEN_MASK,4,2            ; @SPLL_LOLEN_MASK
	.comm	_SPLL_REF_DIV_MASK,4,2          ; @SPLL_REF_DIV_MASK
	.comm	_SCLK_MUX_SEL_MASK,4,2          ; @SCLK_MUX_SEL_MASK
	.comm	_SPLL_FB_DIV_MASK,4,2           ; @SPLL_FB_DIV_MASK
	.comm	_SPLL_DITHEN,4,2                ; @SPLL_DITHEN
	.comm	_ASIC_INTERNAL_ENGINE_SS,4,2    ; @ASIC_INTERNAL_ENGINE_SS
	.comm	_CLK_S_MASK,4,2                 ; @CLK_S_MASK
	.comm	_SSEN,4,2                       ; @SSEN
	.comm	_CLK_V_MASK,4,2                 ; @CLK_V_MASK
.subsections_via_symbols
