	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function setup_phy
_setup_phy:                             ## @setup_phy
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$120, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %r12
	callq	_get_connector
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_get_kms
	testq	%r14, %r14
	je	LBB0_6
## %bb.1:
	movq	%rax, %r15
	movl	(%r14), %eax
	leal	(%rax,%rax,2), %ecx
	testl	%eax, %eax
	movl	$18, %r14d
	cmovnel	%ecx, %r14d
	cmpl	$18, %r14d
	je	LBB0_2
## %bb.3:
	cmpl	$24, %r14d
	jne	LBB0_7
## %bb.4:
	xorl	%edi, %edi
	callq	_REG_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0
	movl	%eax, %r14d
	movl	$8, %edi
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT0
	movl	%eax, %r12d
	movl	$5, %edi
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT1
	orl	%eax, %r12d
	movl	$4, %edi
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT2
	movl	%eax, %ebx
	movl	$3, -116(%rbp)                  ## 4-byte Folded Spill
	movl	$3, %edi
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT3
	orl	%eax, %ebx
	orl	%r12d, %ebx
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_mdp4_write
	xorl	%edi, %edi
	callq	_REG_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4
	movl	%eax, %r14d
	movl	$2, -88(%rbp)                   ## 4-byte Folded Spill
	movl	$2, %edi
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT4
	movl	%eax, %ebx
	movl	$1, %r12d
	movl	$1, %edi
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT5
	orl	%eax, %ebx
	xorl	%edi, %edi
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT6
	orl	%eax, %ebx
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_mdp4_write
	movq	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE0_EN@GOTPCREL(%rip), %rax
	movq	%rax, -160(%rbp)                ## 8-byte Spill
	movq	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE1_EN@GOTPCREL(%rip), %rax
	movq	%rax, -152(%rbp)                ## 8-byte Spill
	movq	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE2_EN@GOTPCREL(%rip), %rax
	movq	%rax, -136(%rbp)                ## 8-byte Spill
	movq	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE3_EN@GOTPCREL(%rip), %rax
	movq	%rax, -144(%rbp)                ## 8-byte Spill
	movl	$6, -120(%rbp)                  ## 4-byte Folded Spill
	movl	$7, -112(%rbp)                  ## 4-byte Folded Spill
	movl	$14, -108(%rbp)                 ## 4-byte Folded Spill
	movl	$15, -104(%rbp)                 ## 4-byte Folded Spill
	movl	$22, -100(%rbp)                 ## 4-byte Folded Spill
	movl	$23, -96(%rbp)                  ## 4-byte Folded Spill
	movl	$27, -92(%rbp)                  ## 4-byte Folded Spill
	movl	$18, -84(%rbp)                  ## 4-byte Folded Spill
	movl	$19, -80(%rbp)                  ## 4-byte Folded Spill
	movl	$20, -76(%rbp)                  ## 4-byte Folded Spill
	movl	$21, -72(%rbp)                  ## 4-byte Folded Spill
	movl	$24, -68(%rbp)                  ## 4-byte Folded Spill
	movl	$25, %r14d
	movl	$26, -64(%rbp)                  ## 4-byte Folded Spill
	movl	$9, -60(%rbp)                   ## 4-byte Folded Spill
	movl	$10, -56(%rbp)                  ## 4-byte Folded Spill
	movl	$11, -52(%rbp)                  ## 4-byte Folded Spill
	movl	$12, -48(%rbp)                  ## 4-byte Folded Spill
	movl	$13, %ebx
	movl	$16, -44(%rbp)                  ## 4-byte Folded Spill
	movl	$17, %r13d
	jmp	LBB0_5
LBB0_6:
	addq	$120, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	_MDP4_LCDC_LVDS_INTF_CTL_RGB_OUT@GOTPCREL(%rip), %rax
	movq	%rax, -160(%rbp)                ## 8-byte Spill
	movq	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE0_EN@GOTPCREL(%rip), %rax
	movq	%rax, -152(%rbp)                ## 8-byte Spill
	movq	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE1_EN@GOTPCREL(%rip), %rax
	movq	%rax, -136(%rbp)                ## 8-byte Spill
	movq	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE2_EN@GOTPCREL(%rip), %rax
	movq	%rax, -144(%rbp)                ## 8-byte Spill
	movl	$20, -120(%rbp)                 ## 4-byte Folded Spill
	movl	$21, -112(%rbp)                 ## 4-byte Folded Spill
	movl	$22, -108(%rbp)                 ## 4-byte Folded Spill
	movl	$23, -104(%rbp)                 ## 4-byte Folded Spill
	movl	$24, -100(%rbp)                 ## 4-byte Folded Spill
	movl	$25, -96(%rbp)                  ## 4-byte Folded Spill
	movl	$26, -92(%rbp)                  ## 4-byte Folded Spill
	movl	$11, -84(%rbp)                  ## 4-byte Folded Spill
	movl	$12, -80(%rbp)                  ## 4-byte Folded Spill
	movl	$13, -76(%rbp)                  ## 4-byte Folded Spill
	movl	$14, -72(%rbp)                  ## 4-byte Folded Spill
	movl	$15, -68(%rbp)                  ## 4-byte Folded Spill
	movl	$19, -64(%rbp)                  ## 4-byte Folded Spill
	movl	$1, -88(%rbp)                   ## 4-byte Folded Spill
	movl	$2, -60(%rbp)                   ## 4-byte Folded Spill
	movl	$3, -56(%rbp)                   ## 4-byte Folded Spill
	movl	$4, -52(%rbp)                   ## 4-byte Folded Spill
	movl	$5, -48(%rbp)                   ## 4-byte Folded Spill
	movl	$6, %ebx
	movl	$7, -44(%rbp)                   ## 4-byte Folded Spill
	movl	$10, %r13d
	xorl	%r12d, %r12d
	movl	$2, -116(%rbp)                  ## 4-byte Folded Spill
LBB0_5:
	movl	%r12d, -124(%rbp)               ## 4-byte Spill
	movl	%r12d, %edi
	callq	_REG_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0
	movl	%eax, %r12d
	movl	%r13d, %edi
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT0
	movl	%eax, %r13d
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT1
	orl	%eax, %r13d
	movl	%ebx, %edi
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT2
	movl	%eax, %ebx
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT3
	orl	%eax, %ebx
	orl	%r13d, %ebx
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_mdp4_write
	movl	-124(%rbp), %edi                ## 4-byte Reload
	callq	_REG_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4
	movl	%eax, %r12d
	movl	-52(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT4
	movl	%eax, %ebx
	movl	-56(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT5
	orl	%eax, %ebx
	movl	-60(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT6
	orl	%eax, %ebx
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_mdp4_write
	movl	-88(%rbp), %r13d                ## 4-byte Reload
	movl	%r13d, %edi
	callq	_REG_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0
	movl	%eax, %r12d
	movl	-64(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT0
	movl	%eax, %ebx
	movl	%r14d, %edi
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT1
	movl	%eax, %r14d
	movl	-68(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT2
	orl	%eax, %ebx
	movl	-72(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT3
	orl	%eax, %ebx
	orl	%r14d, %ebx
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_mdp4_write
	movl	%r13d, %edi
	callq	_REG_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4
	movl	%eax, %r14d
	movl	-76(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT4
	movl	%eax, %ebx
	movl	-80(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT5
	orl	%eax, %ebx
	movl	-84(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT6
	orl	%eax, %ebx
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_mdp4_write
	movl	-116(%rbp), %r13d               ## 4-byte Reload
	movl	%r13d, %edi
	callq	_REG_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0
	movl	%eax, %r14d
	movl	-92(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT0
	movl	%eax, %r12d
	movl	-96(%rbp), %edi                 ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT1
	orl	%eax, %r12d
	movl	-100(%rbp), %edi                ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT2
	movl	%eax, %ebx
	movl	-104(%rbp), %edi                ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT3
	orl	%eax, %ebx
	orl	%r12d, %ebx
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_mdp4_write
	movl	%r13d, %edi
	callq	_REG_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4
	movl	%eax, %r14d
	movl	-108(%rbp), %edi                ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT4
	movl	%eax, %ebx
	movl	-112(%rbp), %edi                ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT5
	orl	%eax, %ebx
	movl	-120(%rbp), %edi                ## 4-byte Reload
	callq	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT6
	orl	%eax, %ebx
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_mdp4_write
	movq	-136(%rbp), %rax                ## 8-byte Reload
	movl	(%rax), %ebx
	movq	-144(%rbp), %rax                ## 8-byte Reload
	orl	(%rax), %ebx
	movq	-152(%rbp), %rax                ## 8-byte Reload
	orl	(%rax), %ebx
	movq	-160(%rbp), %rax                ## 8-byte Reload
	orl	(%rax), %ebx
	movq	_MDP4_LVDS_PHY_CFG0_CHANNEL0@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	_MDP4_LCDC_LVDS_INTF_CTL_CH1_CLK_LANE_EN@GOTPCREL(%rip), %rax
	movq	_MDP4_LCDC_LVDS_INTF_CTL_MODE_SEL@GOTPCREL(%rip), %rcx
	movq	_MDP4_LCDC_LVDS_INTF_CTL_ENABLE@GOTPCREL(%rip), %rdx
	orl	(%rax), %ebx
	orl	(%rcx), %ebx
	orl	(%rdx), %ebx
	movq	_REG_MDP4_LVDS_PHY_CFG0@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_mdp4_write
	movq	_REG_MDP4_LCDC_LVDS_INTF_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_mdp4_write
	movq	_REG_MDP4_LVDS_PHY_CFG2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	$48, %edx
	callq	_mdp4_write
	xorl	%eax, %eax
	callq	_mb
	movl	$1, %edi
	callq	_udelay
	movq	_MDP4_LVDS_PHY_CFG0_SERIALIZATION_ENBLE@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	addq	$120, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mdp4_write                     ## TAILCALL
LBB0_7:
	movl	(%r12), %edi
	leaq	L_.str(%rip), %rsi
	movl	%r14d, %edx
	addq	$120, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_DRM_DEV_ERROR                  ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE3_EN,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE3_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE2_EN,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE2_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE1_EN,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE1_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE0_EN,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE0_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE3_EN,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE3_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE2_EN,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE2_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE1_EN,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE1_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE0_EN,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE0_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_RGB_OUT,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_RGB_OUT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"unknown bpp: %d\n"

	.comm	_MDP4_LVDS_PHY_CFG0_CHANNEL0,4,2 ## @MDP4_LVDS_PHY_CFG0_CHANNEL0
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH1_CLK_LANE_EN,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_CH1_CLK_LANE_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_MODE_SEL,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_MODE_SEL
	.comm	_MDP4_LVDS_PHY_CFG0_CHANNEL1,4,2 ## @MDP4_LVDS_PHY_CFG0_CHANNEL1
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH2_CLK_LANE_EN,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_CH2_CLK_LANE_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH_SWAP,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_CH_SWAP
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_ENABLE,4,2 ## @MDP4_LCDC_LVDS_INTF_CTL_ENABLE
	.comm	_REG_MDP4_LVDS_PHY_CFG0,4,2     ## @REG_MDP4_LVDS_PHY_CFG0
	.comm	_REG_MDP4_LCDC_LVDS_INTF_CTL,4,2 ## @REG_MDP4_LCDC_LVDS_INTF_CTL
	.comm	_REG_MDP4_LVDS_PHY_CFG2,4,2     ## @REG_MDP4_LVDS_PHY_CFG2
	.comm	_MDP4_LVDS_PHY_CFG0_SERIALIZATION_ENBLE,4,2 ## @MDP4_LVDS_PHY_CFG0_SERIALIZATION_ENBLE
	.no_dead_strip	_setup_phy
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function setup_phy
_setup_phy:                             ; @setup_phy
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #192
	.cfi_def_cfa_offset 192
	stp	x28, x27, [sp, #96]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #112]            ; 16-byte Folded Spill
	stp	x24, x23, [sp, #128]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #144]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #160]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #176]            ; 16-byte Folded Spill
	add	x29, sp, #176
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	x21, [x0]
	bl	_get_connector
	mov	x20, x0
	mov	x0, x19
	bl	_get_kms
	cbz	x20, LBB0_4
; %bb.1:
	mov	x19, x0
	ldr	w8, [x20]
	add	w9, w8, w8, lsl #1
	mov	w10, #18
	cmp	w8, #0
	csel	w22, w10, w9, eq
	cmp	w22, #18
	b.eq	LBB0_5
; %bb.2:
	cmp	w22, #24
	b.ne	LBB0_7
; %bb.3:
	mov	w0, #0
	bl	_REG_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0
	mov	x20, x0
	mov	w0, #8
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT0
	mov	x21, x0
	mov	w0, #5
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT1
	orr	w21, w0, w21
	mov	w0, #4
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT2
	orr	w21, w21, w0
	mov	w8, #3
	str	w8, [sp, #48]                   ; 4-byte Folded Spill
	mov	w0, #3
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT3
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_mdp4_write
	mov	w0, #0
	bl	_REG_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4
	mov	x20, x0
	mov	w8, #2
	str	w8, [sp, #28]                   ; 4-byte Folded Spill
	mov	w0, #2
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT4
	mov	x21, x0
	mov	w24, #1
	mov	w0, #1
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT5
	orr	w21, w0, w21
	mov	w0, #0
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT6
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_mdp4_write
Lloh0:
	adrp	x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE0_EN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE0_EN@GOTPAGEOFF]
	str	x8, [sp, #88]                   ; 8-byte Folded Spill
Lloh2:
	adrp	x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE1_EN@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE1_EN@GOTPAGEOFF]
	str	x8, [sp, #80]                   ; 8-byte Folded Spill
	mov	w9, #6
	mov	w8, #7
	stp	w8, w9, [sp, #56]               ; 8-byte Folded Spill
Lloh4:
	adrp	x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE2_EN@GOTPAGE
Lloh5:
	ldr	x8, [x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE2_EN@GOTPAGEOFF]
	str	x8, [sp, #72]                   ; 8-byte Folded Spill
	mov	w8, #14
	str	w8, [sp, #52]                   ; 4-byte Folded Spill
Lloh6:
	adrp	x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE3_EN@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE3_EN@GOTPAGEOFF]
	str	x8, [sp, #64]                   ; 8-byte Folded Spill
	mov	w9, #15
	mov	w8, #22
	stp	w8, w9, [sp, #40]               ; 8-byte Folded Spill
	mov	w9, #23
	mov	w8, #27
	stp	w8, w9, [sp, #32]               ; 8-byte Folded Spill
	mov	w9, #18
	mov	w8, #19
	stp	w8, w9, [sp, #20]               ; 8-byte Folded Spill
	mov	w9, #20
	mov	w8, #21
	stp	w8, w9, [sp, #12]               ; 8-byte Folded Spill
	mov	w9, #24
	mov	w22, #25
	mov	w8, #26
	stp	w8, w9, [sp, #4]                ; 8-byte Folded Spill
	mov	w8, #9
	str	w8, [sp]                        ; 4-byte Folded Spill
	mov	w25, #10
	mov	w26, #11
	mov	w27, #12
	mov	w23, #13
	mov	w20, #16
	mov	w28, #17
	b	LBB0_6
LBB0_4:
	ldp	x29, x30, [sp, #176]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #160]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #144]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #128]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #112]            ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #96]             ; 16-byte Folded Reload
	add	sp, sp, #192
	ret
LBB0_5:
	mov	w24, #0
Lloh8:
	adrp	x8, _MDP4_LCDC_LVDS_INTF_CTL_RGB_OUT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MDP4_LCDC_LVDS_INTF_CTL_RGB_OUT@GOTPAGEOFF]
	str	x8, [sp, #88]                   ; 8-byte Folded Spill
Lloh10:
	adrp	x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE0_EN@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE0_EN@GOTPAGEOFF]
	str	x8, [sp, #80]                   ; 8-byte Folded Spill
Lloh12:
	adrp	x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE1_EN@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE1_EN@GOTPAGEOFF]
	str	x8, [sp, #72]                   ; 8-byte Folded Spill
	mov	w9, #20
	mov	w8, #21
	stp	w8, w9, [sp, #56]               ; 8-byte Folded Spill
Lloh14:
	adrp	x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE2_EN@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE2_EN@GOTPAGEOFF]
	str	x8, [sp, #64]                   ; 8-byte Folded Spill
	mov	w8, #22
	str	w8, [sp, #52]                   ; 4-byte Folded Spill
	mov	w9, #23
	mov	w8, #24
	stp	w8, w9, [sp, #40]               ; 8-byte Folded Spill
	mov	w9, #25
	mov	w8, #26
	stp	w8, w9, [sp, #32]               ; 8-byte Folded Spill
	mov	w9, #11
	mov	w8, #12
	stp	w8, w9, [sp, #20]               ; 8-byte Folded Spill
	mov	w9, #13
	mov	w8, #14
	stp	w8, w9, [sp, #12]               ; 8-byte Folded Spill
	mov	w9, #15
	mov	w8, #19
	stp	w8, w9, [sp, #4]                ; 8-byte Folded Spill
	mov	w8, #1
	str	w8, [sp, #28]                   ; 4-byte Folded Spill
	mov	w8, #2
	str	w8, [sp]                        ; 4-byte Folded Spill
	mov	w25, #3
	mov	w26, #4
	mov	w27, #5
	mov	w23, #6
	mov	w20, #7
	mov	w28, #10
	mov	w8, #2
	str	w8, [sp, #48]                   ; 4-byte Folded Spill
LBB0_6:
	mov	x0, x24
	bl	_REG_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0
	mov	x21, x0
	mov	x0, x28
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT0
	mov	x28, x0
	mov	x0, x20
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT1
	orr	w20, w0, w28
	mov	x0, x23
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT2
	orr	w20, w20, w0
	mov	x0, x27
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT3
	orr	w2, w20, w0
	mov	x0, x19
	mov	x1, x21
	bl	_mdp4_write
	mov	x0, x24
	bl	_REG_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4
	mov	x20, x0
	mov	x0, x26
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT4
	mov	x21, x0
	mov	x0, x25
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT5
	orr	w21, w0, w21
	ldr	w0, [sp]                        ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT6
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_mdp4_write
	ldr	w23, [sp, #28]                  ; 4-byte Folded Reload
	mov	x0, x23
	bl	_REG_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0
	mov	x20, x0
	ldr	w0, [sp, #4]                    ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT0
	mov	x21, x0
	mov	x0, x22
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT1
	orr	w21, w0, w21
	ldr	w0, [sp, #8]                    ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT2
	orr	w21, w21, w0
	ldr	w0, [sp, #12]                   ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT3
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_mdp4_write
	mov	x0, x23
	bl	_REG_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4
	mov	x20, x0
	ldr	w0, [sp, #16]                   ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT4
	mov	x21, x0
	ldr	w0, [sp, #20]                   ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT5
	orr	w21, w0, w21
	ldr	w0, [sp, #24]                   ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT6
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_mdp4_write
	ldr	w22, [sp, #48]                  ; 4-byte Folded Reload
	mov	x0, x22
	bl	_REG_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0
	mov	x20, x0
	ldr	w0, [sp, #32]                   ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT0
	mov	x21, x0
	ldr	w0, [sp, #36]                   ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT1
	orr	w21, w0, w21
	ldr	w0, [sp, #40]                   ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT2
	orr	w21, w21, w0
	ldr	w0, [sp, #44]                   ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_3_TO_0_BIT3
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_mdp4_write
	mov	x0, x22
	bl	_REG_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4
	mov	x20, x0
	ldr	w0, [sp, #52]                   ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT4
	mov	x21, x0
	ldr	w0, [sp, #56]                   ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT5
	orr	w21, w0, w21
	ldr	w0, [sp, #60]                   ; 4-byte Folded Reload
	bl	_MDP4_LCDC_LVDS_MUX_CTL_6_TO_4_BIT6
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_mdp4_write
	ldp	x8, x9, [sp, #64]               ; 16-byte Folded Reload
	ldr	w8, [x8]
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	x9, [sp, #80]                   ; 8-byte Folded Reload
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	x9, [sp, #88]                   ; 8-byte Folded Reload
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh16:
	adrp	x9, _MDP4_LVDS_PHY_CFG0_CHANNEL0@GOTPAGE
Lloh17:
	ldr	x9, [x9, _MDP4_LVDS_PHY_CFG0_CHANNEL0@GOTPAGEOFF]
Lloh18:
	ldr	w20, [x9]
Lloh19:
	adrp	x9, _MDP4_LCDC_LVDS_INTF_CTL_CH1_CLK_LANE_EN@GOTPAGE
Lloh20:
	ldr	x9, [x9, _MDP4_LCDC_LVDS_INTF_CTL_CH1_CLK_LANE_EN@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
Lloh22:
	adrp	x10, _MDP4_LCDC_LVDS_INTF_CTL_MODE_SEL@GOTPAGE
Lloh23:
	ldr	x10, [x10, _MDP4_LCDC_LVDS_INTF_CTL_MODE_SEL@GOTPAGEOFF]
Lloh24:
	ldr	w10, [x10]
Lloh25:
	adrp	x11, _MDP4_LCDC_LVDS_INTF_CTL_ENABLE@GOTPAGE
Lloh26:
	ldr	x11, [x11, _MDP4_LCDC_LVDS_INTF_CTL_ENABLE@GOTPAGEOFF]
Lloh27:
	ldr	w11, [x11]
	orr	w8, w9, w8
	orr	w8, w8, w10
	orr	w21, w8, w11
Lloh28:
	adrp	x22, _REG_MDP4_LVDS_PHY_CFG0@GOTPAGE
Lloh29:
	ldr	x22, [x22, _REG_MDP4_LVDS_PHY_CFG0@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	mov	x2, x20
	bl	_mdp4_write
Lloh30:
	adrp	x8, _REG_MDP4_LCDC_LVDS_INTF_CTL@GOTPAGE
Lloh31:
	ldr	x8, [x8, _REG_MDP4_LCDC_LVDS_INTF_CTL@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	bl	_mdp4_write
Lloh33:
	adrp	x8, _REG_MDP4_LVDS_PHY_CFG2@GOTPAGE
Lloh34:
	ldr	x8, [x8, _REG_MDP4_LVDS_PHY_CFG2@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #48
	bl	_mdp4_write
	bl	_mb
	mov	w0, #1
	bl	_udelay
Lloh36:
	adrp	x8, _MDP4_LVDS_PHY_CFG0_SERIALIZATION_ENBLE@GOTPAGE
Lloh37:
	ldr	x8, [x8, _MDP4_LVDS_PHY_CFG0_SERIALIZATION_ENBLE@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	orr	w2, w8, w20
	ldr	w1, [x22]
	mov	x0, x19
	ldp	x29, x30, [sp, #176]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #160]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #144]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #128]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #112]            ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #96]             ; 16-byte Folded Reload
	add	sp, sp, #192
	b	_mdp4_write
LBB0_7:
	ldr	w0, [x21]
Lloh39:
	adrp	x1, l_.str@PAGE
Lloh40:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x22
	ldp	x29, x30, [sp, #176]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #160]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #144]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #128]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #112]            ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #96]             ; 16-byte Folded Reload
	add	sp, sp, #192
	b	_DRM_DEV_ERROR
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh39, Lloh40
	.cfi_endproc
                                        ; -- End function
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE3_EN,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE3_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE2_EN,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE2_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE1_EN,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE1_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE0_EN,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_CH2_DATA_LANE0_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE3_EN,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE3_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE2_EN,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE2_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE1_EN,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE1_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE0_EN,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_CH1_DATA_LANE0_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_RGB_OUT,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_RGB_OUT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"unknown bpp: %d\n"

	.comm	_MDP4_LVDS_PHY_CFG0_CHANNEL0,4,2 ; @MDP4_LVDS_PHY_CFG0_CHANNEL0
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH1_CLK_LANE_EN,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_CH1_CLK_LANE_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_MODE_SEL,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_MODE_SEL
	.comm	_MDP4_LVDS_PHY_CFG0_CHANNEL1,4,2 ; @MDP4_LVDS_PHY_CFG0_CHANNEL1
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH2_CLK_LANE_EN,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_CH2_CLK_LANE_EN
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_CH_SWAP,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_CH_SWAP
	.comm	_MDP4_LCDC_LVDS_INTF_CTL_ENABLE,4,2 ; @MDP4_LCDC_LVDS_INTF_CTL_ENABLE
	.comm	_REG_MDP4_LVDS_PHY_CFG0,4,2     ; @REG_MDP4_LVDS_PHY_CFG0
	.comm	_REG_MDP4_LCDC_LVDS_INTF_CTL,4,2 ; @REG_MDP4_LCDC_LVDS_INTF_CTL
	.comm	_REG_MDP4_LVDS_PHY_CFG2,4,2     ; @REG_MDP4_LVDS_PHY_CFG2
	.comm	_MDP4_LVDS_PHY_CFG0_SERIALIZATION_ENBLE,4,2 ; @MDP4_LVDS_PHY_CFG0_SERIALIZATION_ENBLE
	.no_dead_strip	_setup_phy
.subsections_via_symbols
