	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cherryview_sseu_info_init
_cherryview_sseu_info_init:             ## @cherryview_sseu_info_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_RUNTIME_INFO
	movq	%rax, %r15
	movq	_CHV_FUSE_GT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_I915_READ
	movl	%eax, %r14d
	xorl	%edi, %edi
	callq	_BIT
	movl	%eax, 48(%r15)
	movabsq	$8589934593, %rax               ## imm = 0x200000001
	movq	%rax, (%r15)
	movl	$8, 8(%r15)
	movq	_CHV_FGT_DISABLE_SS0@GOTPCREL(%rip), %rax
	testl	%r14d, (%rax)
	jne	LBB0_2
## %bb.1:
	movq	_CHV_FGT_EU_DIS_SS0_R0_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r14d, %eax
	movq	_CHV_FGT_EU_DIS_SS0_R0_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movq	_CHV_FGT_EU_DIS_SS0_R1_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	andl	%r14d, %ebx
	movq	_CHV_FGT_EU_DIS_SS0_R1_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %ebx
	shll	$4, %ebx
	orl	%eax, %ebx
	xorl	%edi, %edi
	callq	_BIT
	movq	40(%r15), %rcx
	orl	%eax, (%rcx)
	notl	%ebx
	movq	%r15, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	movl	%ebx, %ecx
	callq	_sseu_set_eus
LBB0_2:
	movq	_CHV_FGT_DISABLE_SS1@GOTPCREL(%rip), %rax
	testl	%r14d, (%rax)
	jne	LBB0_4
## %bb.3:
	movq	_CHV_FGT_EU_DIS_SS1_R0_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r14d, %eax
	movq	_CHV_FGT_EU_DIS_SS1_R0_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movq	_CHV_FGT_EU_DIS_SS1_R1_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	andl	%r14d, %ebx
	movq	_CHV_FGT_EU_DIS_SS1_R1_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %ebx
	shll	$4, %ebx
	orl	%eax, %ebx
	movl	$1, %edi
	callq	_BIT
	movq	40(%r15), %rcx
	orl	%eax, (%rcx)
	notl	%ebx
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$1, %edx
	movl	%ebx, %ecx
	callq	_sseu_set_eus
LBB0_4:
	movq	%r15, %rdi
	callq	_compute_eu_total
	movl	%eax, 12(%r15)
	movq	%r15, %rdi
	callq	_intel_sseu_subslice_total
	testl	%eax, %eax
	je	LBB0_5
## %bb.6:
	movl	12(%r15), %ebx
	movq	%r15, %rdi
	callq	_intel_sseu_subslice_total
	movl	%eax, %ecx
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	jmp	LBB0_7
LBB0_5:
	xorl	%eax, %eax
LBB0_7:
	movl	%eax, 16(%r15)
	movq	$0, 32(%r15)
	movq	%r15, %rdi
	callq	_intel_sseu_subslice_total
	xorl	%ecx, %ecx
	cmpl	$2, %eax
	setge	%cl
	movl	%ecx, 20(%r15)
	xorl	%eax, %eax
	cmpl	$3, 16(%r15)
	setge	%al
	movl	%eax, 24(%r15)
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHV_FUSE_GT,4,2                ## @CHV_FUSE_GT
	.comm	_CHV_FGT_DISABLE_SS0,4,2        ## @CHV_FGT_DISABLE_SS0
	.comm	_CHV_FGT_EU_DIS_SS0_R0_MASK,4,2 ## @CHV_FGT_EU_DIS_SS0_R0_MASK
	.comm	_CHV_FGT_EU_DIS_SS0_R0_SHIFT,4,2 ## @CHV_FGT_EU_DIS_SS0_R0_SHIFT
	.comm	_CHV_FGT_EU_DIS_SS0_R1_MASK,4,2 ## @CHV_FGT_EU_DIS_SS0_R1_MASK
	.comm	_CHV_FGT_EU_DIS_SS0_R1_SHIFT,4,2 ## @CHV_FGT_EU_DIS_SS0_R1_SHIFT
	.comm	_CHV_FGT_DISABLE_SS1,4,2        ## @CHV_FGT_DISABLE_SS1
	.comm	_CHV_FGT_EU_DIS_SS1_R0_MASK,4,2 ## @CHV_FGT_EU_DIS_SS1_R0_MASK
	.comm	_CHV_FGT_EU_DIS_SS1_R0_SHIFT,4,2 ## @CHV_FGT_EU_DIS_SS1_R0_SHIFT
	.comm	_CHV_FGT_EU_DIS_SS1_R1_MASK,4,2 ## @CHV_FGT_EU_DIS_SS1_R1_MASK
	.comm	_CHV_FGT_EU_DIS_SS1_R1_SHIFT,4,2 ## @CHV_FGT_EU_DIS_SS1_R1_SHIFT
	.no_dead_strip	_cherryview_sseu_info_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function cherryview_sseu_info_init
lCPI0_0:
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_cherryview_sseu_info_init:             ; @cherryview_sseu_info_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_RUNTIME_INFO
	mov	x19, x0
Lloh0:
	adrp	x8, _CHV_FUSE_GT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CHV_FUSE_GT@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_I915_READ
	mov	x20, x0
	mov	w0, #0
	bl	_BIT
	str	w0, [x19, #48]
Lloh3:
	adrp	x8, lCPI0_0@PAGE
Lloh4:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	str	d0, [x19]
	mov	w8, #8
	str	w8, [x19, #8]
Lloh5:
	adrp	x8, _CHV_FGT_DISABLE_SS0@GOTPAGE
Lloh6:
	ldr	x8, [x8, _CHV_FGT_DISABLE_SS0@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	tst	w8, w20
	b.ne	LBB0_2
; %bb.1:
Lloh8:
	adrp	x8, _CHV_FGT_EU_DIS_SS0_R0_MASK@GOTPAGE
Lloh9:
	ldr	x8, [x8, _CHV_FGT_EU_DIS_SS0_R0_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
Lloh11:
	adrp	x9, _CHV_FGT_EU_DIS_SS0_R0_SHIFT@GOTPAGE
Lloh12:
	ldr	x9, [x9, _CHV_FGT_EU_DIS_SS0_R0_SHIFT@GOTPAGEOFF]
	and	w8, w8, w20
Lloh13:
	ldr	w9, [x9]
	asr	w8, w8, w9
Lloh14:
	adrp	x9, _CHV_FGT_EU_DIS_SS0_R1_MASK@GOTPAGE
Lloh15:
	ldr	x9, [x9, _CHV_FGT_EU_DIS_SS0_R1_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	and	w9, w9, w20
Lloh17:
	adrp	x10, _CHV_FGT_EU_DIS_SS0_R1_SHIFT@GOTPAGE
Lloh18:
	ldr	x10, [x10, _CHV_FGT_EU_DIS_SS0_R1_SHIFT@GOTPAGEOFF]
Lloh19:
	ldr	w10, [x10]
	asr	w9, w9, w10
	orr	w21, w8, w9, lsl #4
	mov	w0, #0
	bl	_BIT
	ldr	x8, [x19, #40]
	ldr	w9, [x8]
	orr	w9, w9, w0
	str	w9, [x8]
	mvn	w3, w21
	mov	x0, x19
	mov	w1, #0
	mov	w2, #0
	bl	_sseu_set_eus
LBB0_2:
Lloh20:
	adrp	x8, _CHV_FGT_DISABLE_SS1@GOTPAGE
Lloh21:
	ldr	x8, [x8, _CHV_FGT_DISABLE_SS1@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	tst	w8, w20
	b.ne	LBB0_4
; %bb.3:
Lloh23:
	adrp	x8, _CHV_FGT_EU_DIS_SS1_R0_MASK@GOTPAGE
Lloh24:
	ldr	x8, [x8, _CHV_FGT_EU_DIS_SS1_R0_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
Lloh26:
	adrp	x9, _CHV_FGT_EU_DIS_SS1_R0_SHIFT@GOTPAGE
Lloh27:
	ldr	x9, [x9, _CHV_FGT_EU_DIS_SS1_R0_SHIFT@GOTPAGEOFF]
	and	w8, w8, w20
Lloh28:
	ldr	w9, [x9]
	asr	w8, w8, w9
Lloh29:
	adrp	x9, _CHV_FGT_EU_DIS_SS1_R1_MASK@GOTPAGE
Lloh30:
	ldr	x9, [x9, _CHV_FGT_EU_DIS_SS1_R1_MASK@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	and	w9, w9, w20
Lloh32:
	adrp	x10, _CHV_FGT_EU_DIS_SS1_R1_SHIFT@GOTPAGE
Lloh33:
	ldr	x10, [x10, _CHV_FGT_EU_DIS_SS1_R1_SHIFT@GOTPAGEOFF]
Lloh34:
	ldr	w10, [x10]
	asr	w9, w9, w10
	orr	w20, w8, w9, lsl #4
	mov	w0, #1
	bl	_BIT
	ldr	x8, [x19, #40]
	ldr	w9, [x8]
	orr	w9, w9, w0
	str	w9, [x8]
	mvn	w3, w20
	mov	x0, x19
	mov	w1, #0
	mov	w2, #1
	bl	_sseu_set_eus
LBB0_4:
	mov	x0, x19
	bl	_compute_eu_total
	str	w0, [x19, #12]
	mov	x0, x19
	bl	_intel_sseu_subslice_total
	cbz	w0, LBB0_6
; %bb.5:
	ldr	w20, [x19, #12]
	mov	x0, x19
	bl	_intel_sseu_subslice_total
	sdiv	w8, w20, w0
	b	LBB0_7
LBB0_6:
	mov	w8, #0
LBB0_7:
	str	w8, [x19, #16]
	str	xzr, [x19, #32]
	mov	x0, x19
	bl	_intel_sseu_subslice_total
	cmp	w0, #1
	cset	w8, gt
	ldr	w9, [x19, #16]
	cmp	w9, #2
	cset	w9, gt
	stp	w8, w9, [x19, #20]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdr	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_CHV_FUSE_GT,4,2                ; @CHV_FUSE_GT
	.comm	_CHV_FGT_DISABLE_SS0,4,2        ; @CHV_FGT_DISABLE_SS0
	.comm	_CHV_FGT_EU_DIS_SS0_R0_MASK,4,2 ; @CHV_FGT_EU_DIS_SS0_R0_MASK
	.comm	_CHV_FGT_EU_DIS_SS0_R0_SHIFT,4,2 ; @CHV_FGT_EU_DIS_SS0_R0_SHIFT
	.comm	_CHV_FGT_EU_DIS_SS0_R1_MASK,4,2 ; @CHV_FGT_EU_DIS_SS0_R1_MASK
	.comm	_CHV_FGT_EU_DIS_SS0_R1_SHIFT,4,2 ; @CHV_FGT_EU_DIS_SS0_R1_SHIFT
	.comm	_CHV_FGT_DISABLE_SS1,4,2        ; @CHV_FGT_DISABLE_SS1
	.comm	_CHV_FGT_EU_DIS_SS1_R0_MASK,4,2 ; @CHV_FGT_EU_DIS_SS1_R0_MASK
	.comm	_CHV_FGT_EU_DIS_SS1_R0_SHIFT,4,2 ; @CHV_FGT_EU_DIS_SS1_R0_SHIFT
	.comm	_CHV_FGT_EU_DIS_SS1_R1_MASK,4,2 ; @CHV_FGT_EU_DIS_SS1_R1_MASK
	.comm	_CHV_FGT_EU_DIS_SS1_R1_SHIFT,4,2 ; @CHV_FGT_EU_DIS_SS1_R1_SHIFT
	.no_dead_strip	_cherryview_sseu_info_init
.subsections_via_symbols
