	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_dp_init                  ## -- Begin function intel_dp_init
	.p2align	4, 0x90
_intel_dp_init:                         ## @intel_dp_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movl	%esi, %ebx
	movq	%rdi, %r15
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$104, %edi
	callq	_kzalloc
	testq	%rax, %rax
	je	LBB0_20
## %bb.1:
	movq	%rax, %r12
	xorl	%eax, %eax
	callq	_intel_connector_alloc
	testq	%rax, %rax
	je	LBB0_19
## %bb.2:
	movl	%ebx, -48(%rbp)                 ## 4-byte Spill
	movq	%r12, %rbx
	addq	$100, %rbx
	movq	_DRM_MODE_ENCODER_TMDS@GOTPCREL(%rip), %rcx
	movq	%rax, %r13
	movl	(%rcx), %r14d
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_port_name
	movq	_intel_dp_enc_funcs@GOTPCREL(%rip), %rdx
	leaq	L_.str(%rip), %r8
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %ecx
	movq	%r13, %r14
	movl	%eax, %r9d
	callq	_drm_encoder_init
	testq	%rax, %rax
	je	LBB0_3
LBB0_18:
	movq	%r14, %rdi
	callq	_kfree
LBB0_19:
	movq	%r12, %rdi
	callq	_kfree
LBB0_20:
	xorl	%eax, %eax
LBB0_21:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movq	_intel_dp_hotplug@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 96(%r12)
	movq	_intel_dp_compute_config@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 92(%r12)
	movq	_intel_dp_get_hw_state@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 88(%r12)
	movq	_intel_dp_get_config@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 84(%r12)
	movq	_intel_panel_update_backlight@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 80(%r12)
	movq	_intel_dp_encoder_suspend@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 76(%r12)
	movq	%r15, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_5
## %bb.4:
	movq	_chv_dp_pre_pll_enable@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 68(%r12)
	movq	_chv_pre_enable_dp@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%r12)
	movq	_vlv_enable_dp@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 56(%r12)
	movq	_vlv_disable_dp@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 48(%r12)
	movq	_chv_post_disable_dp@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%r12)
	movq	_chv_dp_post_pll_disable@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 72(%r12)
	movq	%rbx, %r13
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	jmp	LBB0_9
LBB0_5:
	movq	%r15, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	movq	%rbx, %r13
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	je	LBB0_7
## %bb.6:
	movq	_vlv_dp_pre_pll_enable@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 68(%r12)
	movq	_vlv_pre_enable_dp@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%r12)
	movq	_vlv_enable_dp@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 56(%r12)
	movq	_vlv_disable_dp@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 48(%r12)
	movq	_vlv_post_disable_dp@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_7:
	movq	_g4x_pre_enable_dp@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%r12)
	movq	_g4x_enable_dp@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 56(%r12)
	movq	_g4x_disable_dp@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 48(%r12)
	movq	_g4x_post_disable_dp@GOTPCREL(%rip), %rax
LBB0_8:
	movl	(%rax), %eax
	movl	%eax, 40(%r12)
LBB0_9:
	movl	-48(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, 12(%r12)
	movl	$4, (%r12)
	movq	_INTEL_OUTPUT_DP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 36(%r12)
	movl	%ebx, %edi
	callq	_intel_port_to_power_domain
	movl	%eax, 32(%r12)
	movq	%r15, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_13
## %bb.10:
	movq	_PORT_D@GOTPCREL(%rip), %rax
	cmpl	%ebx, (%rax)
	jne	LBB0_12
## %bb.11:
	movl	$4, 16(%r12)
	jmp	LBB0_14
LBB0_13:
	movl	$7, 16(%r12)
	jmp	LBB0_14
LBB0_12:
	movl	$3, 16(%r12)
LBB0_14:
	movq	$0, 24(%r12)
	movl	%ebx, 20(%r12)
	movq	_intel_dp_hpd_pulse@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%r12)
	movq	_PORT_A@GOTPCREL(%rip), %rax
	cmpl	%ebx, (%rax)
	je	LBB0_16
## %bb.15:
	movq	%r12, %rdi
	callq	_intel_infoframe_init
LBB0_16:
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_intel_bios_port_aux_ch
	movl	%eax, 4(%r12)
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_intel_dp_init_connector
	movl	%eax, %ecx
	movl	$1, %eax
	testl	%ecx, %ecx
	jne	LBB0_21
## %bb.17:
	movq	%r13, %rdi
	callq	_drm_encoder_cleanup
	jmp	LBB0_18
	.cfi_endproc
                                        ## -- End function
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_intel_dp_enc_funcs,4,2         ## @intel_dp_enc_funcs
	.comm	_DRM_MODE_ENCODER_TMDS,4,2      ## @DRM_MODE_ENCODER_TMDS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"DP %c"

	.comm	_intel_dp_hotplug,4,2           ## @intel_dp_hotplug
	.comm	_intel_dp_compute_config,4,2    ## @intel_dp_compute_config
	.comm	_intel_dp_get_hw_state,4,2      ## @intel_dp_get_hw_state
	.comm	_intel_dp_get_config,4,2        ## @intel_dp_get_config
	.comm	_intel_panel_update_backlight,4,2 ## @intel_panel_update_backlight
	.comm	_intel_dp_encoder_suspend,4,2   ## @intel_dp_encoder_suspend
	.comm	_chv_dp_pre_pll_enable,4,2      ## @chv_dp_pre_pll_enable
	.comm	_chv_pre_enable_dp,4,2          ## @chv_pre_enable_dp
	.comm	_vlv_enable_dp,8,3              ## @vlv_enable_dp
	.comm	_vlv_disable_dp,8,3             ## @vlv_disable_dp
	.comm	_chv_post_disable_dp,4,2        ## @chv_post_disable_dp
	.comm	_chv_dp_post_pll_disable,4,2    ## @chv_dp_post_pll_disable
	.comm	_vlv_dp_pre_pll_enable,4,2      ## @vlv_dp_pre_pll_enable
	.comm	_vlv_pre_enable_dp,4,2          ## @vlv_pre_enable_dp
	.comm	_vlv_post_disable_dp,4,2        ## @vlv_post_disable_dp
	.comm	_g4x_pre_enable_dp,4,2          ## @g4x_pre_enable_dp
	.comm	_g4x_enable_dp,8,3              ## @g4x_enable_dp
	.comm	_g4x_disable_dp,8,3             ## @g4x_disable_dp
	.comm	_g4x_post_disable_dp,4,2        ## @g4x_post_disable_dp
	.comm	_INTEL_OUTPUT_DP,4,2            ## @INTEL_OUTPUT_DP
	.comm	_PORT_D,4,2                     ## @PORT_D
	.comm	_intel_dp_hpd_pulse,4,2         ## @intel_dp_hpd_pulse
	.comm	_PORT_A,4,2                     ## @PORT_A
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_dp_init                  ; -- Begin function intel_dp_init
	.p2align	2
_intel_dp_init:                         ; @intel_dp_init
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x2
	mov	x24, x1
	mov	x22, x0
Lloh0:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	w0, #104
	bl	_kzalloc
	cbz	x0, LBB0_5
; %bb.1:
	mov	x19, x0
	bl	_intel_connector_alloc
	cbz	x0, LBB0_4
; %bb.2:
	mov	x20, x0
	add	x23, x19, #100
Lloh3:
	adrp	x8, _DRM_MODE_ENCODER_TMDS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DRM_MODE_ENCODER_TMDS@GOTPAGEOFF]
Lloh5:
	ldr	w25, [x8]
	mov	x0, x21
	bl	_port_name
	mov	x5, x0
Lloh6:
	adrp	x2, _intel_dp_enc_funcs@GOTPAGE
Lloh7:
	ldr	x2, [x2, _intel_dp_enc_funcs@GOTPAGEOFF]
Lloh8:
	adrp	x4, l_.str@PAGE
Lloh9:
	add	x4, x4, l_.str@PAGEOFF
	mov	x0, x22
	mov	x1, x23
	mov	x3, x25
	bl	_drm_encoder_init
	cbz	x0, LBB0_6
LBB0_3:
	mov	x0, x20
	bl	_kfree
LBB0_4:
	mov	x0, x19
	bl	_kfree
	mov	w0, #0
LBB0_5:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_6:
Lloh10:
	adrp	x8, _intel_dp_hotplug@GOTPAGE
Lloh11:
	ldr	x8, [x8, _intel_dp_hotplug@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
Lloh13:
	adrp	x9, _intel_dp_compute_config@GOTPAGE
Lloh14:
	ldr	x9, [x9, _intel_dp_compute_config@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #92]
Lloh16:
	adrp	x8, _intel_dp_get_hw_state@GOTPAGE
Lloh17:
	ldr	x8, [x8, _intel_dp_get_hw_state@GOTPAGEOFF]
Lloh18:
	adrp	x9, _intel_dp_get_config@GOTPAGE
Lloh19:
	ldr	x9, [x9, _intel_dp_get_config@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
Lloh21:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #84]
Lloh22:
	adrp	x8, _intel_panel_update_backlight@GOTPAGE
Lloh23:
	ldr	x8, [x8, _intel_panel_update_backlight@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
Lloh25:
	adrp	x9, _intel_dp_encoder_suspend@GOTPAGE
Lloh26:
	ldr	x9, [x9, _intel_dp_encoder_suspend@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #76]
	mov	x0, x22
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_8
; %bb.7:
Lloh28:
	adrp	x8, _chv_dp_pre_pll_enable@GOTPAGE
Lloh29:
	ldr	x8, [x8, _chv_dp_pre_pll_enable@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
Lloh31:
	adrp	x9, _chv_pre_enable_dp@GOTPAGE
Lloh32:
	ldr	x9, [x9, _chv_pre_enable_dp@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #64]
Lloh34:
	adrp	x8, _vlv_enable_dp@GOTPAGE
Lloh35:
	ldr	x8, [x8, _vlv_enable_dp@GOTPAGEOFF]
Lloh36:
	adrp	x9, _vlv_disable_dp@GOTPAGE
Lloh37:
	ldr	x9, [x9, _vlv_disable_dp@GOTPAGEOFF]
Lloh38:
	ldr	x8, [x8]
Lloh39:
	ldr	x9, [x9]
	stp	x9, x8, [x19, #48]
Lloh40:
	adrp	x8, _chv_post_disable_dp@GOTPAGE
Lloh41:
	ldr	x8, [x8, _chv_post_disable_dp@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	str	w8, [x19, #40]
Lloh43:
	adrp	x8, _chv_dp_post_pll_disable@GOTPAGE
Lloh44:
	ldr	x8, [x8, _chv_dp_post_pll_disable@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	str	w8, [x19, #72]
	b	LBB0_12
LBB0_8:
	mov	x0, x22
	bl	_IS_VALLEYVIEW
	cbz	x0, LBB0_10
; %bb.9:
Lloh46:
	adrp	x8, _vlv_dp_pre_pll_enable@GOTPAGE
Lloh47:
	ldr	x8, [x8, _vlv_dp_pre_pll_enable@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
Lloh49:
	adrp	x9, _vlv_pre_enable_dp@GOTPAGE
Lloh50:
	ldr	x9, [x9, _vlv_pre_enable_dp@GOTPAGEOFF]
Lloh51:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #64]
Lloh52:
	adrp	x8, _vlv_enable_dp@GOTPAGE
Lloh53:
	ldr	x8, [x8, _vlv_enable_dp@GOTPAGEOFF]
Lloh54:
	ldr	x8, [x8]
Lloh55:
	adrp	x9, _vlv_disable_dp@GOTPAGE
Lloh56:
	ldr	x9, [x9, _vlv_disable_dp@GOTPAGEOFF]
Lloh57:
	ldr	x9, [x9]
	stp	x9, x8, [x19, #48]
Lloh58:
	adrp	x8, _vlv_post_disable_dp@GOTPAGE
Lloh59:
	ldr	x8, [x8, _vlv_post_disable_dp@GOTPAGEOFF]
	b	LBB0_11
LBB0_10:
Lloh60:
	adrp	x8, _g4x_pre_enable_dp@GOTPAGE
Lloh61:
	ldr	x8, [x8, _g4x_pre_enable_dp@GOTPAGEOFF]
Lloh62:
	ldr	w8, [x8]
	str	w8, [x19, #64]
Lloh63:
	adrp	x8, _g4x_enable_dp@GOTPAGE
Lloh64:
	ldr	x8, [x8, _g4x_enable_dp@GOTPAGEOFF]
Lloh65:
	ldr	x8, [x8]
Lloh66:
	adrp	x9, _g4x_disable_dp@GOTPAGE
Lloh67:
	ldr	x9, [x9, _g4x_disable_dp@GOTPAGEOFF]
Lloh68:
	ldr	x9, [x9]
	stp	x9, x8, [x19, #48]
Lloh69:
	adrp	x8, _g4x_post_disable_dp@GOTPAGE
Lloh70:
	ldr	x8, [x8, _g4x_post_disable_dp@GOTPAGEOFF]
LBB0_11:
	ldr	w8, [x8]
	str	w8, [x19, #40]
LBB0_12:
	str	w24, [x19, #12]
	mov	w8, #4
	str	w8, [x19]
Lloh71:
	adrp	x8, _INTEL_OUTPUT_DP@GOTPAGE
Lloh72:
	ldr	x8, [x8, _INTEL_OUTPUT_DP@GOTPAGEOFF]
Lloh73:
	ldr	w8, [x8]
	str	w8, [x19, #36]
	mov	x0, x21
	bl	_intel_port_to_power_domain
	str	w0, [x19, #32]
	mov	x0, x22
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_15
; %bb.13:
Lloh74:
	adrp	x8, _PORT_D@GOTPAGE
Lloh75:
	ldr	x8, [x8, _PORT_D@GOTPAGEOFF]
Lloh76:
	ldr	w8, [x8]
	cmp	w8, w21
	b.ne	LBB0_16
; %bb.14:
	mov	w8, #4
	b	LBB0_17
LBB0_15:
	mov	w8, #7
	b	LBB0_17
LBB0_16:
	mov	w8, #3
LBB0_17:
	stp	w8, w21, [x19, #16]
	str	xzr, [x19, #24]
Lloh77:
	adrp	x8, _intel_dp_hpd_pulse@GOTPAGE
Lloh78:
	ldr	x8, [x8, _intel_dp_hpd_pulse@GOTPAGEOFF]
Lloh79:
	ldr	w8, [x8]
	str	w8, [x19, #8]
Lloh80:
	adrp	x8, _PORT_A@GOTPAGE
Lloh81:
	ldr	x8, [x8, _PORT_A@GOTPAGEOFF]
Lloh82:
	ldr	w8, [x8]
	cmp	w8, w21
	b.eq	LBB0_19
; %bb.18:
	mov	x0, x19
	bl	_intel_infoframe_init
LBB0_19:
	mov	x0, x22
	mov	x1, x21
	bl	_intel_bios_port_aux_ch
	str	w0, [x19, #4]
	mov	x0, x19
	mov	x1, x20
	bl	_intel_dp_init_connector
	cbz	w0, LBB0_21
; %bb.20:
	mov	w0, #1
	b	LBB0_5
LBB0_21:
	mov	x0, x23
	bl	_drm_encoder_cleanup
	b	LBB0_3
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh20
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh38
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.cfi_endproc
                                        ; -- End function
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_intel_dp_enc_funcs,4,2         ; @intel_dp_enc_funcs
	.comm	_DRM_MODE_ENCODER_TMDS,4,2      ; @DRM_MODE_ENCODER_TMDS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"DP %c"

	.comm	_intel_dp_hotplug,4,2           ; @intel_dp_hotplug
	.comm	_intel_dp_compute_config,4,2    ; @intel_dp_compute_config
	.comm	_intel_dp_get_hw_state,4,2      ; @intel_dp_get_hw_state
	.comm	_intel_dp_get_config,4,2        ; @intel_dp_get_config
	.comm	_intel_panel_update_backlight,4,2 ; @intel_panel_update_backlight
	.comm	_intel_dp_encoder_suspend,4,2   ; @intel_dp_encoder_suspend
	.comm	_chv_dp_pre_pll_enable,4,2      ; @chv_dp_pre_pll_enable
	.comm	_chv_pre_enable_dp,4,2          ; @chv_pre_enable_dp
	.comm	_vlv_enable_dp,8,3              ; @vlv_enable_dp
	.comm	_vlv_disable_dp,8,3             ; @vlv_disable_dp
	.comm	_chv_post_disable_dp,4,2        ; @chv_post_disable_dp
	.comm	_chv_dp_post_pll_disable,4,2    ; @chv_dp_post_pll_disable
	.comm	_vlv_dp_pre_pll_enable,4,2      ; @vlv_dp_pre_pll_enable
	.comm	_vlv_pre_enable_dp,4,2          ; @vlv_pre_enable_dp
	.comm	_vlv_post_disable_dp,4,2        ; @vlv_post_disable_dp
	.comm	_g4x_pre_enable_dp,4,2          ; @g4x_pre_enable_dp
	.comm	_g4x_enable_dp,8,3              ; @g4x_enable_dp
	.comm	_g4x_disable_dp,8,3             ; @g4x_disable_dp
	.comm	_g4x_post_disable_dp,4,2        ; @g4x_post_disable_dp
	.comm	_INTEL_OUTPUT_DP,4,2            ; @INTEL_OUTPUT_DP
	.comm	_PORT_D,4,2                     ; @PORT_D
	.comm	_intel_dp_hpd_pulse,4,2         ; @intel_dp_hpd_pulse
	.comm	_PORT_A,4,2                     ; @PORT_A
.subsections_via_symbols
