	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_vcn_jpeg_set_reg
_amdgpu_vcn_jpeg_set_reg:               ## @amdgpu_vcn_jpeg_set_reg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rdi, %r15
	movq	(%rdi), %r12
	movq	$0, -40(%rbp)
	leaq	-48(%rbp), %rdx
	movq	%r12, %rdi
	movl	$64, %esi
	callq	_amdgpu_job_alloc_with_ib
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_6
## %bb.1:
	movq	-48(%rbp), %rax
	movq	(%rax), %rbx
	movl	(%r12), %edi
	movq	_PACKETJ_TYPE0@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%rbx), %rcx
	movl	%eax, (%rcx)
	movl	$-559038737, 4(%rcx)            ## imm = 0xDEADBEEF
	movq	_PACKETJ_TYPE6@GOTPCREL(%rip), %r12
	movl	(%r12), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%rbx), %rcx
	movl	%eax, 8(%rcx)
	movl	$0, 12(%rcx)
	movl	(%r12), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%rbx), %rcx
	movl	%eax, 16(%rcx)
	movl	$0, 20(%rcx)
	movl	(%r12), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%rbx), %rcx
	movl	%eax, 24(%rcx)
	movl	$0, 28(%rcx)
	movl	(%r12), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%rbx), %rcx
	movl	%eax, 32(%rcx)
	movl	$0, 36(%rcx)
	movl	(%r12), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%rbx), %rcx
	movl	%eax, 40(%rcx)
	movl	$0, 44(%rcx)
	movl	(%r12), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%rbx), %rcx
	movl	%eax, 48(%rcx)
	movl	$0, 52(%rcx)
	movl	(%r12), %ecx
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	(%rbx), %rcx
	movl	%eax, 56(%rcx)
	movl	$0, 60(%rcx)
	movl	$16, 8(%rbx)
	movq	-48(%rbp), %rdi
	leaq	-40(%rbp), %rdx
	movq	%r15, %rsi
	callq	_amdgpu_job_submit_direct
	testl	%eax, %eax
	je	LBB0_2
## %bb.5:
	movl	%eax, %ebx
	movq	-48(%rbp), %rdi
	callq	_amdgpu_job_free
	jmp	LBB0_6
LBB0_2:
	testq	%r14, %r14
	je	LBB0_4
## %bb.3:
	movq	-40(%rbp), %rdi
	callq	_dma_fence_get
	movq	%rax, (%r14)
LBB0_4:
	movq	-40(%rbp), %rdi
	callq	_dma_fence_put
	xorl	%ebx, %ebx
LBB0_6:
	movl	%ebx, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PACKETJ_TYPE0,4,2              ## @PACKETJ_TYPE0
	.comm	_PACKETJ_TYPE6,4,2              ## @PACKETJ_TYPE6
	.no_dead_strip	_amdgpu_vcn_jpeg_set_reg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_vcn_jpeg_set_reg
_amdgpu_vcn_jpeg_set_reg:               ; @amdgpu_vcn_jpeg_set_reg
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x20, x0
	ldr	x21, [x0]
	str	xzr, [sp]
	add	x2, sp, #8
	mov	x0, x21
	mov	w1, #64
	bl	_amdgpu_job_alloc_with_ib
	mov	x22, x0
	cbnz	w0, LBB0_6
; %bb.1:
	ldr	x8, [sp, #8]
	ldr	x22, [x8]
	ldr	w0, [x21]
Lloh0:
	adrp	x8, _PACKETJ_TYPE0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PACKETJ_TYPE0@GOTPAGEOFF]
Lloh2:
	ldr	w3, [x8]
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x22]
	mov	w9, #48879
	movk	w9, #57005, lsl #16
	stp	w0, w9, [x8]
Lloh3:
	adrp	x21, _PACKETJ_TYPE6@GOTPAGE
Lloh4:
	ldr	x21, [x21, _PACKETJ_TYPE6@GOTPAGEOFF]
	ldr	w3, [x21]
	mov	w0, #0
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x22]
	stp	w0, wzr, [x8, #8]
	ldr	w3, [x21]
	mov	w0, #0
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x22]
	stp	w0, wzr, [x8, #16]
	ldr	w3, [x21]
	mov	w0, #0
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x22]
	stp	w0, wzr, [x8, #24]
	ldr	w3, [x21]
	mov	w0, #0
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x22]
	stp	w0, wzr, [x8, #32]
	ldr	w3, [x21]
	mov	w0, #0
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x22]
	stp	w0, wzr, [x8, #40]
	ldr	w3, [x21]
	mov	w0, #0
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x22]
	stp	w0, wzr, [x8, #48]
	ldr	w3, [x21]
	mov	w0, #0
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	ldr	x8, [x22]
	stp	w0, wzr, [x8, #56]
	mov	w8, #16
	str	w8, [x22, #8]
	ldr	x0, [sp, #8]
	mov	x2, sp
	mov	x1, x20
	bl	_amdgpu_job_submit_direct
	cbz	w0, LBB0_3
; %bb.2:
	mov	x22, x0
	ldr	x0, [sp, #8]
	bl	_amdgpu_job_free
	b	LBB0_6
LBB0_3:
	cbz	x19, LBB0_5
; %bb.4:
	ldr	x0, [sp]
	bl	_dma_fence_get
	str	x0, [x19]
LBB0_5:
	ldr	x0, [sp]
	bl	_dma_fence_put
	mov	w22, #0
LBB0_6:
	mov	x0, x22
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PACKETJ_TYPE0,4,2              ; @PACKETJ_TYPE0
	.comm	_PACKETJ_TYPE6,4,2              ; @PACKETJ_TYPE6
	.no_dead_strip	_amdgpu_vcn_jpeg_set_reg
.subsections_via_symbols
