	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_atombios_encoder_setup_dig_encoder ## -- Begin function amdgpu_atombios_encoder_setup_dig_encoder
	.p2align	4, 0x90
_amdgpu_atombios_encoder_setup_dig_encoder: ## @amdgpu_atombios_encoder_setup_dig_encoder
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r12d
	movl	%esi, %r13d
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	(%rax), %rax
	movq	%rax, -144(%rbp)                ## 8-byte Spill
	callq	_to_amdgpu_encoder
	movq	%rax, %r15
	movq	8(%rax), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	callq	_amdgpu_get_connector_for_encoder
	movq	%rax, %r14
	movq	_COMMAND@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIGxEncoderControl@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_GetIndexIntoMasterTable
	movl	%eax, -124(%rbp)                ## 4-byte Spill
	testq	%r14, %r14
	je	LBB0_1
## %bb.2:
	movq	%r14, %rdi
	callq	_to_amdgpu_connector
	movq	8(%rax), %rcx
	movl	(%rcx), %edx
	movl	%edx, -48(%rbp)                 ## 4-byte Spill
	movl	4(%rcx), %ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	jmp	LBB0_3
LBB0_1:
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	movq	_AMDGPU_HPD_NONE@GOTPCREL(%rip), %rax
	movl	$0, -48(%rbp)                   ## 4-byte Folded Spill
LBB0_3:
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	cmpl	$-1, (%rcx)
	je	LBB0_73
## %bb.4:
	movl	(%rax), %r14d
	leaq	-120(%rbp), %rdi
	xorl	%esi, %esi
	movl	$64, %edx
	callq	_memset
	movq	-144(%rbp), %rax                ## 8-byte Reload
	movl	(%rax), %edi
	leaq	-132(%rbp), %rdx
	leaq	-128(%rbp), %rcx
	movl	-124(%rbp), %esi                ## 4-byte Reload
	callq	_amdgpu_atom_parse_cmd_header
	testl	%eax, %eax
	je	LBB0_73
## %bb.5:
	movl	-132(%rbp), %esi
	movl	-128(%rbp), %edx
	cmpl	$1, %esi
	jne	LBB0_70
## %bb.6:
	leal	-1(%rdx), %eax
	cmpl	$4, %eax
	ja	LBB0_69
## %bb.7:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_25:
	movl	%r13d, -116(%rbp)
	movslq	(%r15), %rax
	imulq	$1717986919, %rax, %rdi         ## imm = 0x66666667
	movq	%rdi, %rax
	shrq	$63, %rax
	sarq	$34, %rdi
	addl	%eax, %edi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_cpu_to_le16
	movq	%rax, -80(%rbp)
	cmpl	$133, %r13d
	jne	LBB0_27
## %bb.26:
	movl	%r12d, -120(%rbp)
	movq	-88(%rbp), %rdi
	jmp	LBB0_28
LBB0_70:
	leaq	L_.str.1(%rip), %rdi
LBB0_71:
                                        ## kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_72
LBB0_69:
	leaq	L_.str.1(%rip), %rdi
	movl	$1, %esi
	jmp	LBB0_71
LBB0_8:
	movl	%r13d, -120(%rbp)
	movslq	(%r15), %rax
	imulq	$1717986919, %rax, %rdi         ## imm = 0x66666667
	movq	%rdi, %rax
	shrq	$63, %rax
	sarq	$34, %rdi
	addl	%eax, %edi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_cpu_to_le16
	movq	%rax, -96(%rbp)
	cmpl	$133, %r13d
	jne	LBB0_10
## %bb.9:
	movl	%r12d, -120(%rbp)
	movq	-104(%rbp), %rdi
	jmp	LBB0_11
LBB0_37:
	movl	%r13d, -120(%rbp)
	movslq	(%r15), %rax
	imulq	$1717986919, %rax, %rdi         ## imm = 0x66666667
	movq	%rdi, %rax
	shrq	$63, %rax
	sarq	$34, %rdi
	addl	%eax, %edi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_cpu_to_le16
	movq	%rax, -80(%rbp)
	cmpl	$133, %r13d
	jne	LBB0_39
## %bb.38:
	movl	%r12d, -116(%rbp)
	movq	-88(%rbp), %rdi
	jmp	LBB0_40
LBB0_57:
	leal	-134(%r13), %eax
	cmpl	$8, %eax
	jae	LBB0_58
## %bb.67:
	movl	%r13d, -120(%rbp)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, -116(%rbp)
	jmp	LBB0_72
LBB0_27:
	movq	%rbx, %rdi
	callq	_amdgpu_atombios_encoder_get_encoder_mode
	movq	%rax, %rdi
	movq	%rax, -88(%rbp)
LBB0_28:
	callq	_ENCODER_MODE_IS_DP
	testl	%eax, %eax
	je	LBB0_30
## %bb.29:
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, -112(%rbp)
	jmp	LBB0_33
LBB0_30:
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_amdgpu_dig_monitor_is_duallink
	testl	%eax, %eax
	je	LBB0_32
## %bb.31:
	movl	$8, -112(%rbp)
	jmp	LBB0_33
LBB0_10:
	movq	%rbx, %rdi
	callq	_amdgpu_atombios_encoder_get_encoder_mode
	movq	%rax, %rdi
	movq	%rax, -104(%rbp)
LBB0_11:
	callq	_ENCODER_MODE_IS_DP
	testl	%eax, %eax
	je	LBB0_13
## %bb.12:
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, -116(%rbp)
	jmp	LBB0_16
LBB0_39:
	movq	%rbx, %rdi
	callq	_amdgpu_atombios_encoder_get_encoder_mode
	movq	%rax, %rdi
	movq	%rax, -88(%rbp)
LBB0_40:
	callq	_ENCODER_MODE_IS_DP
	testl	%eax, %eax
	je	LBB0_42
## %bb.41:
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, -112(%rbp)
	jmp	LBB0_45
LBB0_13:
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_amdgpu_dig_monitor_is_duallink
	testl	%eax, %eax
	je	LBB0_15
## %bb.14:
	movl	$8, -116(%rbp)
	jmp	LBB0_16
LBB0_42:
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_amdgpu_dig_monitor_is_duallink
	testl	%eax, %eax
	je	LBB0_44
## %bb.43:
	movl	$8, -112(%rbp)
	jmp	LBB0_45
LBB0_32:
	movl	$4, -112(%rbp)
LBB0_33:
	movq	-88(%rbp), %rdi
	callq	_ENCODER_MODE_IS_DP
	testl	%eax, %eax
	je	LBB0_36
## %bb.34:
	cmpl	$270000, -48(%rbp)              ## 4-byte Folded Reload
                                        ## imm = 0x41EB0
	jne	LBB0_36
## %bb.35:
	movq	_ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -112(%rbp)
LBB0_36:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, -96(%rbp)
	movq	%rbx, %rdi
	callq	_amdgpu_atombios_encoder_get_bpc
	movq	%rax, -104(%rbp)
	jmp	LBB0_72
LBB0_58:
	cmpl	$132, %r13d
	je	LBB0_61
## %bb.59:
	cmpl	$133, %r13d
	jne	LBB0_68
## %bb.60:
	movl	$133, -72(%rbp)
	movl	%r12d, -68(%rbp)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, -64(%rbp)
	jmp	LBB0_72
LBB0_15:
	movl	$4, -116(%rbp)
LBB0_16:
	movq	-104(%rbp), %rdi
	callq	_ENCODER_MODE_IS_DP
	testl	%eax, %eax
	je	LBB0_19
## %bb.17:
	cmpl	$270000, -48(%rbp)              ## 4-byte Folded Reload
                                        ## imm = 0x41EB0
	jne	LBB0_19
## %bb.18:
	movq	_ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, -112(%rbp)
LBB0_19:
	movl	4(%r15), %eax
	addl	$-128, %eax
	cmpl	$3, %eax
	ja	LBB0_21
## %bb.20:
	cltq
	leaq	l_switch.table.amdgpu_atombios_encoder_setup_dig_encoder(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	movl	(%rax), %eax
	movl	%eax, -112(%rbp)
LBB0_21:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	cmpl	$0, 4(%rax)
	je	LBB0_24
## %bb.22:
	movq	_ATOM_ENCODER_CONFIG_LINKB@GOTPCREL(%rip), %rax
	jmp	LBB0_23
LBB0_24:
	movq	_ATOM_ENCODER_CONFIG_LINKA@GOTPCREL(%rip), %rax
LBB0_23:
	movl	(%rax), %eax
	orl	%eax, -112(%rbp)
	jmp	LBB0_72
LBB0_44:
	movl	$4, -112(%rbp)
LBB0_45:
	movq	-88(%rbp), %rdi
	callq	_ENCODER_MODE_IS_DP
	testl	%eax, %eax
	je	LBB0_54
## %bb.46:
	movl	-48(%rbp), %eax                 ## 4-byte Reload
	cmpl	$270000, %eax                   ## imm = 0x41EB0
	je	LBB0_51
## %bb.47:
	cmpl	$540000, %eax                   ## imm = 0x83D60
	je	LBB0_48
## %bb.49:
	cmpl	$324000, %eax                   ## imm = 0x4F1A0
	jne	LBB0_52
## %bb.50:
	movq	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_3_24GHZ@GOTPCREL(%rip), %rax
	jmp	LBB0_53
LBB0_51:
	movq	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ@GOTPCREL(%rip), %rax
	jmp	LBB0_53
LBB0_48:
	movq	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_5_40GHZ@GOTPCREL(%rip), %rax
	jmp	LBB0_53
LBB0_52:
	movq	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_1_62GHZ@GOTPCREL(%rip), %rax
LBB0_53:
	movl	(%rax), %eax
	orl	%eax, -112(%rbp)
LBB0_54:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, -96(%rbp)
	movq	%rbx, %rdi
	callq	_amdgpu_atombios_encoder_get_bpc
	movq	%rax, -104(%rbp)
	movq	_AMDGPU_HPD_NONE@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r14d
	jne	LBB0_56
## %bb.55:
	movl	$0, -108(%rbp)
	jmp	LBB0_72
LBB0_56:
	incl	%r14d
	movl	%r14d, -108(%rbp)
LBB0_72:
	movq	-144(%rbp), %rax                ## 8-byte Reload
	movl	(%rax), %edi
	leaq	-120(%rbp), %rdx
	movl	-124(%rbp), %esi                ## 4-byte Reload
	callq	_amdgpu_atom_execute_table
LBB0_73:
	addq	$104, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_61:
	movl	$132, -112(%rbp)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, -108(%rbp)
	movq	%rbx, %rdi
	callq	_amdgpu_atombios_encoder_get_encoder_mode
	movq	%rax, -80(%rbp)
	movq	%rax, %rdi
	callq	_ENCODER_MODE_IS_DP
	testl	%eax, %eax
	je	LBB0_63
## %bb.62:
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, -104(%rbp)
	jmp	LBB0_66
LBB0_68:
	leaq	L_.str(%rip), %rdi
	movl	%r13d, %esi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_72
LBB0_63:
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_amdgpu_dig_monitor_is_duallink
	testl	%eax, %eax
	je	LBB0_65
## %bb.64:
	movl	$8, -104(%rbp)
	jmp	LBB0_66
LBB0_65:
	movl	$4, -104(%rbp)
LBB0_66:
	movslq	(%r15), %rax
	imulq	$1717986919, %rax, %rdi         ## imm = 0x66666667
	movq	%rdi, %rax
	shrq	$63, %rax
	shrq	$32, %rdi
	sarl	$2, %edi
	addl	%eax, %edi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_cpu_to_le32
	movl	%eax, -88(%rbp)
	movq	%rbx, %rdi
	callq	_amdgpu_atombios_encoder_get_bpc
	movq	%rax, -96(%rbp)
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	movslq	%ecx, %rax
	imulq	$-1688717511, %rax, %rax        ## imm = 0x9B583739
	shrq	$32, %rax
	addl	%ecx, %eax
	movl	%eax, %ecx
	shrl	$31, %ecx
	sarl	$14, %eax
	addl	%ecx, %eax
	movl	%eax, -100(%rbp)
	jmp	LBB0_72
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_25, LBB0_25-LJTI0_0
.set L0_0_set_37, LBB0_37-LJTI0_0
.set L0_0_set_57, LBB0_57-LJTI0_0
LJTI0_0:
	.long	L0_0_set_8
	.long	L0_0_set_25
	.long	L0_0_set_25
	.long	L0_0_set_37
	.long	L0_0_set_57
	.end_data_region
                                        ## -- End function
	.comm	_COMMAND,4,2                    ## @COMMAND
	.comm	_DIGxEncoderControl,4,2         ## @DIGxEncoderControl
	.comm	_AMDGPU_HPD_NONE,4,2            ## @AMDGPU_HPD_NONE
	.comm	_ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ,4,2 ## @ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ
	.comm	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER1,4,2 ## @ATOM_ENCODER_CONFIG_V2_TRANSMITTER1
	.comm	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER2,4,2 ## @ATOM_ENCODER_CONFIG_V2_TRANSMITTER2
	.comm	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER3,4,2 ## @ATOM_ENCODER_CONFIG_V2_TRANSMITTER3
	.comm	_ATOM_ENCODER_CONFIG_LINKB,4,2  ## @ATOM_ENCODER_CONFIG_LINKB
	.comm	_ATOM_ENCODER_CONFIG_LINKA,4,2  ## @ATOM_ENCODER_CONFIG_LINKA
	.comm	_ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ,4,2 ## @ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ
	.comm	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_5_40GHZ,4,2 ## @ATOM_ENCODER_CONFIG_V4_DPLINKRATE_5_40GHZ
	.comm	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_3_24GHZ,4,2 ## @ATOM_ENCODER_CONFIG_V4_DPLINKRATE_3_24GHZ
	.comm	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ,4,2 ## @ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ
	.comm	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_1_62GHZ,4,2 ## @ATOM_ENCODER_CONFIG_V4_DPLINKRATE_1_62GHZ
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Unsupported action 0x%x\n"

L_.str.1:                               ## @.str.1
	.asciz	"Unknown table version %d, %d\n"

	.section	__DATA,__const
	.p2align	3                               ## @switch.table.amdgpu_atombios_encoder_setup_dig_encoder
l_switch.table.amdgpu_atombios_encoder_setup_dig_encoder:
	.quad	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER3
	.quad	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER2
	.quad	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER1
	.quad	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER2

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_atombios_encoder_setup_dig_encoder ; -- Begin function amdgpu_atombios_encoder_setup_dig_encoder
	.p2align	2
_amdgpu_atombios_encoder_setup_dig_encoder: ; @amdgpu_atombios_encoder_setup_dig_encoder
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #192
	.cfi_def_cfa_offset 192
	stp	x28, x27, [sp, #96]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #112]            ; 16-byte Folded Spill
	stp	x24, x23, [sp, #128]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #144]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #160]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #176]            ; 16-byte Folded Spill
	add	x29, sp, #176
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x22, x2
	mov	x23, x1
	mov	x20, x0
	ldr	x8, [x0]
	ldr	x25, [x8]
	bl	_to_amdgpu_encoder
	mov	x21, x0
	ldr	x26, [x0, #8]
	mov	x0, x20
	bl	_amdgpu_get_connector_for_encoder
	mov	x24, x0
Lloh0:
	adrp	x8, _COMMAND@GOTPAGE
Lloh1:
	ldr	x8, [x8, _COMMAND@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _DIGxEncoderControl@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DIGxEncoderControl@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_GetIndexIntoMasterTable
	mov	x19, x0
Lloh6:
	adrp	x28, _AMDGPU_HPD_NONE@GOTPAGE
Lloh7:
	ldr	x28, [x28, _AMDGPU_HPD_NONE@GOTPAGEOFF]
	cbz	x24, LBB0_2
; %bb.1:
	mov	x0, x24
	bl	_to_amdgpu_connector
	ldr	x8, [x0, #8]
	ldp	w9, w27, [x8]
	str	w9, [sp, #20]                   ; 4-byte Folded Spill
	b	LBB0_3
LBB0_2:
	mov	w27, #0
	str	wzr, [sp, #20]                  ; 4-byte Folded Spill
	mov	x0, x28
LBB0_3:
	ldr	w8, [x26]
	cmn	w8, #1
	b.eq	LBB0_68
; %bb.4:
	ldr	w24, [x0]
	add	x0, sp, #32
	mov	w1, #0
	mov	w2, #64
	bl	_memset
	ldr	w0, [x25]
	add	x2, sp, #28
	add	x3, sp, #24
	mov	x1, x19
	bl	_amdgpu_atom_parse_cmd_header
	cbz	w0, LBB0_68
; %bb.5:
	ldp	w8, w1, [sp, #24]
	cmp	w1, #1
	b.ne	LBB0_11
; %bb.6:
	sub	w9, w8, #1
	cmp	w9, #4
	b.hi	LBB0_13
; %bb.7:
Lloh8:
	adrp	x8, lJTI0_0@PAGE
Lloh9:
	add	x8, x8, lJTI0_0@PAGEOFF
	adr	x10, LBB0_8
	ldrb	w11, [x8, x9]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_8:
	str	w23, [sp, #36]
	ldrsw	x8, [x21]
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #34
	add	w0, w8, w9
	bl	_cpu_to_le16
	str	x0, [sp, #72]
	cmp	w23, #133
	b.ne	LBB0_20
; %bb.9:
	str	w22, [sp, #32]
	ldr	x0, [sp, #64]
	bl	_ENCODER_MODE_IS_DP
	cbz	w0, LBB0_21
LBB0_10:
	str	w27, [sp, #40]
	b	LBB0_35
LBB0_11:
                                        ; kill: def $w8 killed $w8 killed $x8 def $x8
	str	x8, [sp]
Lloh10:
	adrp	x0, l_.str.1@PAGE
Lloh11:
	add	x0, x0, l_.str.1@PAGEOFF
LBB0_12:
	bl	_DRM_ERROR
	b	LBB0_67
LBB0_13:
	str	x8, [sp]
Lloh12:
	adrp	x0, l_.str.1@PAGE
Lloh13:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	w1, #1
	b	LBB0_12
LBB0_14:
	str	w23, [sp, #32]
	ldrsw	x8, [x21]
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #34
	add	w0, w8, w9
	bl	_cpu_to_le16
	str	x0, [sp, #56]
	cmp	w23, #133
	b.ne	LBB0_23
; %bb.15:
	str	w22, [sp, #32]
	ldr	x0, [sp, #48]
	b	LBB0_24
LBB0_16:
	str	w23, [sp, #32]
	ldrsw	x8, [x21]
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #34
	add	w0, w8, w9
	bl	_cpu_to_le16
	str	x0, [sp, #72]
	cmp	w23, #133
	b.ne	LBB0_26
; %bb.17:
	str	w22, [sp, #36]
	ldr	x0, [sp, #64]
	b	LBB0_27
LBB0_18:
	sub	w8, w23, #134
	cmp	w8, #8
	b.hs	LBB0_39
; %bb.19:
	str	w23, [sp, #32]
	ldr	w8, [x26]
	str	w8, [sp, #36]
	b	LBB0_67
LBB0_20:
	mov	x0, x20
	bl	_amdgpu_atombios_encoder_get_encoder_mode
	str	x0, [sp, #64]
	bl	_ENCODER_MODE_IS_DP
	cbnz	w0, LBB0_10
LBB0_21:
	ldr	w1, [x21]
	mov	x0, x20
	bl	_amdgpu_dig_monitor_is_duallink
	cbz	w0, LBB0_33
; %bb.22:
	mov	w8, #8
	b	LBB0_34
LBB0_23:
	mov	x0, x20
	bl	_amdgpu_atombios_encoder_get_encoder_mode
	str	x0, [sp, #48]
LBB0_24:
	bl	_ENCODER_MODE_IS_DP
	cbz	w0, LBB0_29
; %bb.25:
	str	w27, [sp, #36]
	b	LBB0_44
LBB0_26:
	mov	x0, x20
	bl	_amdgpu_atombios_encoder_get_encoder_mode
	str	x0, [sp, #64]
LBB0_27:
	bl	_ENCODER_MODE_IS_DP
	cbz	w0, LBB0_31
; %bb.28:
	str	w27, [sp, #40]
	b	LBB0_55
LBB0_29:
	ldr	w1, [x21]
	mov	x0, x20
	bl	_amdgpu_dig_monitor_is_duallink
	cbz	w0, LBB0_42
; %bb.30:
	mov	w8, #8
	b	LBB0_43
LBB0_31:
	ldr	w1, [x21]
	mov	x0, x20
	bl	_amdgpu_dig_monitor_is_duallink
	cbz	w0, LBB0_53
; %bb.32:
	mov	w8, #8
	b	LBB0_54
LBB0_33:
	mov	w8, #4
LBB0_34:
	str	w8, [sp, #40]
LBB0_35:
	ldr	x0, [sp, #64]
	bl	_ENCODER_MODE_IS_DP
	cbz	w0, LBB0_38
; %bb.36:
	mov	w8, #7856
	movk	w8, #4, lsl #16
	ldr	w9, [sp, #20]                   ; 4-byte Folded Reload
	cmp	w9, w8
	b.ne	LBB0_38
; %bb.37:
Lloh14:
	adrp	x8, _ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ@GOTPAGE
Lloh15:
	ldr	x8, [x8, _ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	ldr	w9, [sp, #40]
	orr	w8, w9, w8
	str	w8, [sp, #40]
LBB0_38:
	ldr	w8, [x26]
	str	w8, [sp, #56]
	mov	x0, x20
	bl	_amdgpu_atombios_encoder_get_bpc
	str	x0, [sp, #48]
	b	LBB0_67
LBB0_39:
	cmp	w23, #132
	b.eq	LBB0_69
; %bb.40:
	cmp	w23, #133
	b.ne	LBB0_71
; %bb.41:
	mov	w8, #133
	stp	w8, w22, [sp, #80]
	ldr	w8, [x26]
	str	w8, [sp, #88]
	b	LBB0_67
LBB0_42:
	mov	w8, #4
LBB0_43:
	str	w8, [sp, #36]
LBB0_44:
	ldr	x0, [sp, #48]
	bl	_ENCODER_MODE_IS_DP
	cbz	w0, LBB0_47
; %bb.45:
	mov	w8, #7856
	movk	w8, #4, lsl #16
	ldr	w9, [sp, #20]                   ; 4-byte Folded Reload
	cmp	w9, w8
	b.ne	LBB0_47
; %bb.46:
Lloh17:
	adrp	x8, _ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ@GOTPAGE
Lloh18:
	ldr	x8, [x8, _ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	ldr	w9, [sp, #40]
	orr	w8, w9, w8
	str	w8, [sp, #40]
LBB0_47:
	ldr	w8, [x21, #4]
	sub	w8, w8, #128
	cmp	w8, #3
	b.hi	LBB0_49
; %bb.48:
Lloh20:
	adrp	x9, l_switch.table.amdgpu_atombios_encoder_setup_dig_encoder@PAGE
Lloh21:
	add	x9, x9, l_switch.table.amdgpu_atombios_encoder_setup_dig_encoder@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	ldr	w8, [x8]
	str	w8, [sp, #40]
LBB0_49:
	ldr	w8, [x26, #4]
	cbz	w8, LBB0_51
; %bb.50:
Lloh22:
	adrp	x8, _ATOM_ENCODER_CONFIG_LINKB@GOTPAGE
Lloh23:
	ldr	x8, [x8, _ATOM_ENCODER_CONFIG_LINKB@GOTPAGEOFF]
	b	LBB0_52
LBB0_51:
Lloh24:
	adrp	x8, _ATOM_ENCODER_CONFIG_LINKA@GOTPAGE
Lloh25:
	ldr	x8, [x8, _ATOM_ENCODER_CONFIG_LINKA@GOTPAGEOFF]
LBB0_52:
	ldr	w8, [x8]
	ldr	w9, [sp, #40]
	orr	w8, w9, w8
	str	w8, [sp, #40]
	b	LBB0_67
LBB0_53:
	mov	w8, #4
LBB0_54:
	str	w8, [sp, #40]
LBB0_55:
	ldr	x0, [sp, #64]
	bl	_ENCODER_MODE_IS_DP
	cbz	w0, LBB0_64
; %bb.56:
	mov	w8, #7856
	movk	w8, #4, lsl #16
	ldr	w9, [sp, #20]                   ; 4-byte Folded Reload
	cmp	w9, w8
	b.eq	LBB0_60
; %bb.57:
	mov	w8, #15712
	movk	w8, #8, lsl #16
	cmp	w9, w8
	b.eq	LBB0_61
; %bb.58:
	mov	w8, #61856
	movk	w8, #4, lsl #16
	cmp	w9, w8
	b.ne	LBB0_62
; %bb.59:
Lloh26:
	adrp	x8, _ATOM_ENCODER_CONFIG_V4_DPLINKRATE_3_24GHZ@GOTPAGE
Lloh27:
	ldr	x8, [x8, _ATOM_ENCODER_CONFIG_V4_DPLINKRATE_3_24GHZ@GOTPAGEOFF]
	b	LBB0_63
LBB0_60:
Lloh28:
	adrp	x8, _ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ@GOTPAGE
Lloh29:
	ldr	x8, [x8, _ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ@GOTPAGEOFF]
	b	LBB0_63
LBB0_61:
Lloh30:
	adrp	x8, _ATOM_ENCODER_CONFIG_V4_DPLINKRATE_5_40GHZ@GOTPAGE
Lloh31:
	ldr	x8, [x8, _ATOM_ENCODER_CONFIG_V4_DPLINKRATE_5_40GHZ@GOTPAGEOFF]
	b	LBB0_63
LBB0_62:
Lloh32:
	adrp	x8, _ATOM_ENCODER_CONFIG_V4_DPLINKRATE_1_62GHZ@GOTPAGE
Lloh33:
	ldr	x8, [x8, _ATOM_ENCODER_CONFIG_V4_DPLINKRATE_1_62GHZ@GOTPAGEOFF]
LBB0_63:
	ldr	w8, [x8]
	ldr	w9, [sp, #40]
	orr	w8, w9, w8
	str	w8, [sp, #40]
LBB0_64:
	ldr	w8, [x26]
	str	w8, [sp, #56]
	mov	x0, x20
	bl	_amdgpu_atombios_encoder_get_bpc
	str	x0, [sp, #48]
	ldr	w8, [x28]
	cmp	w24, w8
	b.ne	LBB0_66
; %bb.65:
	str	wzr, [sp, #44]
	b	LBB0_67
LBB0_66:
	add	w8, w24, #1
	str	w8, [sp, #44]
LBB0_67:
	ldr	w0, [x25]
	add	x2, sp, #32
	mov	x1, x19
	bl	_amdgpu_atom_execute_table
LBB0_68:
	ldp	x29, x30, [sp, #176]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #160]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #144]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #128]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #112]            ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #96]             ; 16-byte Folded Reload
	add	sp, sp, #192
	ret
LBB0_69:
	mov	w8, #132
	str	w8, [sp, #40]
	ldr	w8, [x26]
	str	w8, [sp, #44]
	mov	x0, x20
	bl	_amdgpu_atombios_encoder_get_encoder_mode
	str	x0, [sp, #72]
	bl	_ENCODER_MODE_IS_DP
	cbz	w0, LBB0_72
; %bb.70:
	str	w27, [sp, #48]
	b	LBB0_76
LBB0_71:
Lloh34:
	adrp	x0, l_.str@PAGE
Lloh35:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x23
	b	LBB0_12
LBB0_72:
	ldr	w1, [x21]
	mov	x0, x20
	bl	_amdgpu_dig_monitor_is_duallink
	cbz	w0, LBB0_74
; %bb.73:
	mov	w8, #8
	b	LBB0_75
LBB0_74:
	mov	w8, #4
LBB0_75:
	str	w8, [sp, #48]
LBB0_76:
	ldrsw	x8, [x21]
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #32
	lsr	x8, x8, #63
	add	w0, w8, w9, asr #2
	bl	_cpu_to_le32
	str	w0, [sp, #64]
	mov	x0, x20
	bl	_amdgpu_atombios_encoder_get_bpc
	str	x0, [sp, #56]
	mov	w8, #14137
	movk	w8, #39768, lsl #16
	ldr	w9, [sp, #20]                   ; 4-byte Folded Reload
	smull	x8, w9, w8
	lsr	x8, x8, #32
	add	w8, w8, w9
	asr	w9, w8, #14
	add	w8, w9, w8, lsr #31
	str	w8, [sp, #52]
	b	LBB0_67
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpAdd	Lloh34, Lloh35
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_14-LBB0_8)>>2
	.byte	(LBB0_8-LBB0_8)>>2
	.byte	(LBB0_8-LBB0_8)>>2
	.byte	(LBB0_16-LBB0_8)>>2
	.byte	(LBB0_18-LBB0_8)>>2
                                        ; -- End function
	.comm	_COMMAND,4,2                    ; @COMMAND
	.comm	_DIGxEncoderControl,4,2         ; @DIGxEncoderControl
	.comm	_AMDGPU_HPD_NONE,4,2            ; @AMDGPU_HPD_NONE
	.comm	_ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ,4,2 ; @ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ
	.comm	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER1,4,2 ; @ATOM_ENCODER_CONFIG_V2_TRANSMITTER1
	.comm	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER2,4,2 ; @ATOM_ENCODER_CONFIG_V2_TRANSMITTER2
	.comm	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER3,4,2 ; @ATOM_ENCODER_CONFIG_V2_TRANSMITTER3
	.comm	_ATOM_ENCODER_CONFIG_LINKB,4,2  ; @ATOM_ENCODER_CONFIG_LINKB
	.comm	_ATOM_ENCODER_CONFIG_LINKA,4,2  ; @ATOM_ENCODER_CONFIG_LINKA
	.comm	_ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ,4,2 ; @ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ
	.comm	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_5_40GHZ,4,2 ; @ATOM_ENCODER_CONFIG_V4_DPLINKRATE_5_40GHZ
	.comm	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_3_24GHZ,4,2 ; @ATOM_ENCODER_CONFIG_V4_DPLINKRATE_3_24GHZ
	.comm	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ,4,2 ; @ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ
	.comm	_ATOM_ENCODER_CONFIG_V4_DPLINKRATE_1_62GHZ,4,2 ; @ATOM_ENCODER_CONFIG_V4_DPLINKRATE_1_62GHZ
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Unsupported action 0x%x\n"

l_.str.1:                               ; @.str.1
	.asciz	"Unknown table version %d, %d\n"

	.section	__DATA,__const
	.p2align	3                               ; @switch.table.amdgpu_atombios_encoder_setup_dig_encoder
l_switch.table.amdgpu_atombios_encoder_setup_dig_encoder:
	.quad	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER3
	.quad	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER2
	.quad	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER1
	.quad	_ATOM_ENCODER_CONFIG_V2_TRANSMITTER2

.subsections_via_symbols
