	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function _dpu_plane_setup_csc
__dpu_plane_setup_csc:                  ## @_dpu_plane_setup_csc
	.cfi_startproc
## %bb.0:
	testq	%rdi, %rdi
	je	LBB0_1
## %bb.2:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	_DPU_SSPP_CSC_10BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
	andl	(%rbx), %eax
	leaq	__dpu_plane_setup_csc.dpu_csc_YUV2RGB_601L(%rip), %rax
	leaq	__dpu_plane_setup_csc.dpu_csc10_YUV2RGB_601L(%rip), %rcx
	cmoveq	%rax, %rcx
	movq	%rcx, 8(%rbx)
	movl	76288, %edx
	movl	76292, %ecx
	movl	76296, %r8d
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_DPU_DEBUG_PLANE                ## TAILCALL
LBB0_1:
	leaq	L_.str(%rip), %rdi
	jmp	_DPU_ERROR                      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	3                               ## @_dpu_plane_setup_csc.dpu_csc_YUV2RGB_601L
__dpu_plane_setup_csc.dpu_csc_YUV2RGB_601L:
	.quad	76288
	.long	65520                           ## 0xfff0
	.long	65408                           ## 0xff80
	.long	65408                           ## 0xff80
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.space	24
	.long	16                              ## 0x10
	.long	235                             ## 0xeb
	.long	16                              ## 0x10
	.long	0                               ## 0x0
	.long	255                             ## 0xff
	.long	0                               ## 0x0
	.space	36
	.space	4

	.p2align	3                               ## @_dpu_plane_setup_csc.dpu_csc10_YUV2RGB_601L
__dpu_plane_setup_csc.dpu_csc10_YUV2RGB_601L:
	.quad	76288
	.long	65472                           ## 0xffc0
	.long	65024                           ## 0xfe00
	.long	65024                           ## 0xfe00
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.space	24
	.long	64                              ## 0x40
	.long	940                             ## 0x3ac
	.long	64                              ## 0x40
	.long	0                               ## 0x0
	.long	1023                            ## 0x3ff
	.long	0                               ## 0x0
	.space	36
	.space	4

	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"invalid plane\n"

	.comm	_DPU_SSPP_CSC_10BIT,4,2         ## @DPU_SSPP_CSC_10BIT
L_.str.1:                               ## @.str.1
	.asciz	"using 0x%X 0x%X 0x%X...\n"

	.no_dead_strip	__dpu_plane_setup_csc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function _dpu_plane_setup_csc
__dpu_plane_setup_csc:                  ; @_dpu_plane_setup_csc
	.cfi_startproc
; %bb.0:
	cbz	x0, LBB0_2
; %bb.1:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _DPU_SSPP_CSC_10BIT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DPU_SSPP_CSC_10BIT@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_BIT
	ldr	w8, [x19]
Lloh3:
	adrp	x9, __dpu_plane_setup_csc.dpu_csc10_YUV2RGB_601L@PAGE
Lloh4:
	add	x9, x9, __dpu_plane_setup_csc.dpu_csc10_YUV2RGB_601L@PAGEOFF
Lloh5:
	adrp	x10, __dpu_plane_setup_csc.dpu_csc_YUV2RGB_601L@PAGE
Lloh6:
	add	x10, x10, __dpu_plane_setup_csc.dpu_csc_YUV2RGB_601L@PAGEOFF
	tst	w8, w0
	csel	x8, x10, x9, eq
	str	x8, [x19, #8]
	mov	w8, #10752
	movk	w8, #1, lsl #16
	ldp	w2, w3, [x8]
Lloh7:
	adrp	x1, l_.str.1@PAGE
Lloh8:
	add	x1, x1, l_.str.1@PAGEOFF
	ldr	w4, [x8, #8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_DPU_DEBUG_PLANE
LBB0_2:
	.cfi_def_cfa wsp, 0
	.cfi_same_value w30
	.cfi_same_value w29
	.cfi_same_value w19
	.cfi_same_value w20
Lloh9:
	adrp	x0, l_.str@PAGE
Lloh10:
	add	x0, x0, l_.str@PAGEOFF
	b	_DPU_ERROR
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	3                               ; @_dpu_plane_setup_csc.dpu_csc_YUV2RGB_601L
__dpu_plane_setup_csc.dpu_csc_YUV2RGB_601L:
	.quad	76288
	.long	65520                           ; 0xfff0
	.long	65408                           ; 0xff80
	.long	65408                           ; 0xff80
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.space	24
	.long	16                              ; 0x10
	.long	235                             ; 0xeb
	.long	16                              ; 0x10
	.long	0                               ; 0x0
	.long	255                             ; 0xff
	.long	0                               ; 0x0
	.space	36
	.space	4

	.p2align	3                               ; @_dpu_plane_setup_csc.dpu_csc10_YUV2RGB_601L
__dpu_plane_setup_csc.dpu_csc10_YUV2RGB_601L:
	.quad	76288
	.long	65472                           ; 0xffc0
	.long	65024                           ; 0xfe00
	.long	65024                           ; 0xfe00
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.space	24
	.long	64                              ; 0x40
	.long	940                             ; 0x3ac
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.long	1023                            ; 0x3ff
	.long	0                               ; 0x0
	.space	36
	.space	4

	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"invalid plane\n"

	.comm	_DPU_SSPP_CSC_10BIT,4,2         ; @DPU_SSPP_CSC_10BIT
l_.str.1:                               ; @.str.1
	.asciz	"using 0x%X 0x%X 0x%X...\n"

	.no_dead_strip	__dpu_plane_setup_csc
.subsections_via_symbols
