	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_get_config           ## -- Begin function intel_ddi_get_config
	.p2align	4, 0x90
_intel_ddi_get_config:                  ## @intel_ddi_get_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %r14
	movl	8(%rdi), %edi
	callq	_to_i915
	movq	%rax, %r13
	movl	64(%r12), %edi
	callq	_to_intel_crtc
	movq	%rax, %rbx
	movl	(%r12), %r15d
	movl	%r15d, %edi
	callq	_transcoder_is_dsi
	movl	%eax, %edi
	callq	_WARN_ON
	testq	%rax, %rax
	je	LBB0_1
## %bb.31:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movq	%r13, -56(%rbp)                 ## 8-byte Spill
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movl	%r15d, %edi
	callq	_TRANS_DDI_FUNC_CTL
	movl	%eax, %edi
	callq	_I915_READ
	movl	%eax, %r13d
	movq	_TRANS_DDI_PHSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r13d, %eax
	jne	LBB0_2
## %bb.3:
	movq	_DRM_MODE_FLAG_NHSYNC@GOTPCREL(%rip), %rax
	jmp	LBB0_4
LBB0_2:
	movq	_DRM_MODE_FLAG_PHSYNC@GOTPCREL(%rip), %rax
LBB0_4:
	movq	_TRANS_DDI_PVSYNC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%r13d, %ecx
	jne	LBB0_5
## %bb.6:
	movq	_DRM_MODE_FLAG_NVSYNC@GOTPCREL(%rip), %rcx
	jmp	LBB0_7
LBB0_5:
	movq	_DRM_MODE_FLAG_PVSYNC@GOTPCREL(%rip), %rcx
LBB0_7:
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	orl	%ecx, 60(%r12)
	movq	_TRANS_DDI_BPC_MASK@GOTPCREL(%rip), %rcx
	movl	%r13d, %eax
	andl	(%rcx), %eax
	addl	$-133, %eax
	cmpl	$3, %eax
	ja	LBB0_9
## %bb.8:
	cltq
	leaq	L_switch.table.intel_ddi_get_config(%rip), %rcx
	movl	(%rcx,%rax,4), %eax
	movl	%eax, 4(%r12)
LBB0_9:
	movq	_TRANS_DDI_MODE_SELECT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r13d, %eax
	addl	$-128, %eax
	cmpl	$4, %eax
	ja	LBB0_24
## %bb.10:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_11:
	movl	$1, 8(%r12)
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_intel_hdmi_infoframes_enabled
	orl	%eax, 44(%r12)
	je	LBB0_13
## %bb.12:
	movl	$1, 12(%r12)
LBB0_13:
	movq	_TRANS_DDI_HDMI_SCRAMBLING@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_15
## %bb.14:
	movl	$1, 16(%r12)
LBB0_15:
	movq	_TRANS_DDI_HIGH_TMDS_CHAR_RATE@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_17
## %bb.16:
	movl	$1, 20(%r12)
LBB0_17:
	movq	_INTEL_OUTPUT_HDMI@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_BIT
	orl	%eax, 56(%r12)
	movl	$4, 24(%r12)
	jmp	LBB0_24
LBB0_18:
	movq	_INTEL_OUTPUT_ANALOG@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_BIT
	orl	%eax, 56(%r12)
	jmp	LBB0_24
LBB0_21:
	movq	_INTEL_OUTPUT_DP_MST@GOTPCREL(%rip), %rax
	jmp	LBB0_22
LBB0_19:
	movq	(%r14), %rdi
	movq	_INTEL_OUTPUT_EDP@GOTPCREL(%rip), %rax
	cmpq	(%rax), %rdi
	je	LBB0_23
## %bb.20:
	movq	_INTEL_OUTPUT_DP@GOTPCREL(%rip), %rax
LBB0_22:
	movq	(%rax), %rdi
LBB0_23:
	callq	_BIT
	orl	%eax, 56(%r12)
	movq	_DDI_PORT_WIDTH_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r13d, %eax
	movq	_DDI_PORT_WIDTH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	incl	%eax
	movl	%eax, 24(%r12)
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	%r12, %rsi
	callq	_intel_dp_get_m_n
LBB0_24:
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_intel_ddi_is_audio_enabled
	movl	%eax, 52(%r12)
	movq	(%r14), %rax
	movq	_INTEL_OUTPUT_EDP@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_28
## %bb.25:
	movq	(%rbx), %rdx
	testq	%rdx, %rdx
	je	LBB0_28
## %bb.26:
	movslq	4(%r12), %rsi
	cmpq	%rsi, %rdx
	jge	LBB0_28
## %bb.27:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_KMS
	movslq	4(%r12), %rax
	movq	%rax, (%rbx)
LBB0_28:
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_intel_ddi_clock_get
	movq	%rbx, %rdi
	callq	_IS_GEN9_LP
	testq	%rax, %rax
	je	LBB0_30
## %bb.29:
	movq	%r14, %rdi
	callq	_bxt_ddi_phy_get_lane_lat_optim_mask
	movl	%eax, 48(%r12)
LBB0_30:
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_intel_ddi_compute_min_voltage_level
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_intel_hdmi_read_gcp_infoframe
	movq	_HDMI_INFOFRAME_TYPE_AVI@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	28(%r12), %r15
	leaq	40(%r12), %rcx
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_intel_read_infoframe
	movq	_HDMI_INFOFRAME_TYPE_SPD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	36(%r12), %rcx
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_intel_read_infoframe
	movq	_HDMI_INFOFRAME_TYPE_VENDOR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	32(%r12), %rcx
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_intel_read_infoframe
	movq	_HDMI_INFOFRAME_TYPE_DRM@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movq	%r12, %rsi
	movq	%r15, %rcx
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_read_infoframe           ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_17, LBB0_17-LJTI0_0
.set L0_0_set_19, LBB0_19-LJTI0_0
.set L0_0_set_21, LBB0_21-LJTI0_0
LJTI0_0:
	.long	L0_0_set_11
	.long	L0_0_set_18
	.long	L0_0_set_17
	.long	L0_0_set_19
	.long	L0_0_set_21
	.end_data_region
                                        ## -- End function
	.comm	_TRANS_DDI_PHSYNC,4,2           ## @TRANS_DDI_PHSYNC
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ## @DRM_MODE_FLAG_PHSYNC
	.comm	_DRM_MODE_FLAG_NHSYNC,4,2       ## @DRM_MODE_FLAG_NHSYNC
	.comm	_TRANS_DDI_PVSYNC,4,2           ## @TRANS_DDI_PVSYNC
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ## @DRM_MODE_FLAG_PVSYNC
	.comm	_DRM_MODE_FLAG_NVSYNC,4,2       ## @DRM_MODE_FLAG_NVSYNC
	.comm	_TRANS_DDI_BPC_MASK,4,2         ## @TRANS_DDI_BPC_MASK
	.comm	_TRANS_DDI_MODE_SELECT_MASK,4,2 ## @TRANS_DDI_MODE_SELECT_MASK
	.comm	_TRANS_DDI_HDMI_SCRAMBLING,4,2  ## @TRANS_DDI_HDMI_SCRAMBLING
	.comm	_TRANS_DDI_HIGH_TMDS_CHAR_RATE,4,2 ## @TRANS_DDI_HIGH_TMDS_CHAR_RATE
	.comm	_INTEL_OUTPUT_HDMI,8,3          ## @INTEL_OUTPUT_HDMI
	.comm	_INTEL_OUTPUT_ANALOG,8,3        ## @INTEL_OUTPUT_ANALOG
	.comm	_INTEL_OUTPUT_EDP,8,3           ## @INTEL_OUTPUT_EDP
	.comm	_INTEL_OUTPUT_DP,8,3            ## @INTEL_OUTPUT_DP
	.comm	_DDI_PORT_WIDTH_MASK,4,2        ## @DDI_PORT_WIDTH_MASK
	.comm	_DDI_PORT_WIDTH_SHIFT,4,2       ## @DDI_PORT_WIDTH_SHIFT
	.comm	_INTEL_OUTPUT_DP_MST,8,3        ## @INTEL_OUTPUT_DP_MST
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n"

	.comm	_HDMI_INFOFRAME_TYPE_AVI,4,2    ## @HDMI_INFOFRAME_TYPE_AVI
	.comm	_HDMI_INFOFRAME_TYPE_SPD,4,2    ## @HDMI_INFOFRAME_TYPE_SPD
	.comm	_HDMI_INFOFRAME_TYPE_VENDOR,4,2 ## @HDMI_INFOFRAME_TYPE_VENDOR
	.comm	_HDMI_INFOFRAME_TYPE_DRM,4,2    ## @HDMI_INFOFRAME_TYPE_DRM
	.section	__TEXT,__literal16,16byte_literals
	.p2align	2                               ## @switch.table.intel_ddi_get_config
L_switch.table.intel_ddi_get_config:
	.long	24                              ## 0x18
	.long	18                              ## 0x12
	.long	36                              ## 0x24
	.long	30                              ## 0x1e

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_ddi_get_config           ; -- Begin function intel_ddi_get_config
	.p2align	2
_intel_ddi_get_config:                  ; @intel_ddi_get_config
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	mov	x20, x0
	ldr	w0, [x0, #8]
	bl	_to_i915
	mov	x21, x0
	ldr	w0, [x19, #64]
	bl	_to_intel_crtc
	mov	x23, x0
	ldr	w22, [x19]
	mov	x0, x22
	bl	_transcoder_is_dsi
	bl	_WARN_ON
	cbz	x0, LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_2:
	mov	x0, x22
	bl	_TRANS_DDI_FUNC_CTL
	bl	_I915_READ
	mov	x24, x0
Lloh0:
	adrp	x8, _TRANS_DDI_PHSYNC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _TRANS_DDI_PHSYNC@GOTPAGEOFF]
Lloh2:
	adrp	x9, _DRM_MODE_FLAG_NHSYNC@GOTPAGE
Lloh3:
	ldr	x9, [x9, _DRM_MODE_FLAG_NHSYNC@GOTPAGEOFF]
Lloh4:
	adrp	x10, _DRM_MODE_FLAG_PHSYNC@GOTPAGE
Lloh5:
	ldr	x10, [x10, _DRM_MODE_FLAG_PHSYNC@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	tst	w8, w0
	csel	x8, x9, x10, eq
	ldr	w8, [x8]
Lloh7:
	adrp	x9, _TRANS_DDI_PVSYNC@GOTPAGE
Lloh8:
	ldr	x9, [x9, _TRANS_DDI_PVSYNC@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
Lloh10:
	adrp	x10, _DRM_MODE_FLAG_NVSYNC@GOTPAGE
Lloh11:
	ldr	x10, [x10, _DRM_MODE_FLAG_NVSYNC@GOTPAGEOFF]
Lloh12:
	adrp	x11, _DRM_MODE_FLAG_PVSYNC@GOTPAGE
Lloh13:
	ldr	x11, [x11, _DRM_MODE_FLAG_PVSYNC@GOTPAGEOFF]
	tst	w9, w0
	csel	x9, x10, x11, eq
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [x19, #60]
	orr	w8, w8, w9
	str	w8, [x19, #60]
Lloh14:
	adrp	x8, _TRANS_DDI_BPC_MASK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _TRANS_DDI_BPC_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	and	w8, w8, w0
	sub	w8, w8, #133
	cmp	w8, #3
	b.hi	LBB0_4
; %bb.3:
Lloh17:
	adrp	x9, l_switch.table.intel_ddi_get_config@PAGE
Lloh18:
	add	x9, x9, l_switch.table.intel_ddi_get_config@PAGEOFF
	ldr	w8, [x9, w8, sxtw #2]
	str	w8, [x19, #4]
LBB0_4:
Lloh19:
	adrp	x8, _TRANS_DDI_MODE_SELECT_MASK@GOTPAGE
Lloh20:
	ldr	x8, [x8, _TRANS_DDI_MODE_SELECT_MASK@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	and	w8, w8, w24
	sub	w8, w8, #128
Lloh22:
	adrp	x25, _INTEL_OUTPUT_EDP@GOTPAGE
Lloh23:
	ldr	x25, [x25, _INTEL_OUTPUT_EDP@GOTPAGEOFF]
	cmp	w8, #4
	b.hi	LBB0_17
; %bb.5:
Lloh24:
	adrp	x9, lJTI0_0@PAGE
Lloh25:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_6
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_6:
	mov	w23, #1
	str	w23, [x19, #8]
	mov	x0, x20
	mov	x1, x19
	bl	_intel_hdmi_infoframes_enabled
	ldr	w8, [x19, #44]
	orr	w8, w8, w0
	str	w8, [x19, #44]
	cbz	w8, LBB0_8
; %bb.7:
	str	w23, [x19, #12]
LBB0_8:
Lloh26:
	adrp	x8, _TRANS_DDI_HDMI_SCRAMBLING@GOTPAGE
Lloh27:
	ldr	x8, [x8, _TRANS_DDI_HDMI_SCRAMBLING@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	tst	w8, w24
	b.eq	LBB0_10
; %bb.9:
	mov	w8, #1
	str	w8, [x19, #16]
LBB0_10:
Lloh29:
	adrp	x8, _TRANS_DDI_HIGH_TMDS_CHAR_RATE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _TRANS_DDI_HIGH_TMDS_CHAR_RATE@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	tst	w8, w24
	b.eq	LBB0_12
; %bb.11:
	mov	w8, #1
	str	w8, [x19, #20]
LBB0_12:
Lloh32:
	adrp	x8, _INTEL_OUTPUT_HDMI@GOTPAGE
Lloh33:
	ldr	x8, [x8, _INTEL_OUTPUT_HDMI@GOTPAGEOFF]
Lloh34:
	ldr	x0, [x8]
	bl	_BIT
	ldr	w8, [x19, #56]
	orr	w8, w8, w0
	str	w8, [x19, #56]
	mov	w8, #4
	str	w8, [x19, #24]
	b	LBB0_17
LBB0_13:
Lloh35:
	adrp	x8, _INTEL_OUTPUT_ANALOG@GOTPAGE
Lloh36:
	ldr	x8, [x8, _INTEL_OUTPUT_ANALOG@GOTPAGEOFF]
Lloh37:
	ldr	x0, [x8]
	bl	_BIT
	ldr	w8, [x19, #56]
	orr	w8, w8, w0
	str	w8, [x19, #56]
	b	LBB0_17
LBB0_14:
	ldr	x8, [x20]
	ldr	x9, [x25]
Lloh38:
	adrp	x10, _INTEL_OUTPUT_DP@GOTPAGE
Lloh39:
	ldr	x10, [x10, _INTEL_OUTPUT_DP@GOTPAGEOFF]
Lloh40:
	ldr	x10, [x10]
	cmp	x8, x9
	csel	x0, x8, x10, eq
	b	LBB0_16
LBB0_15:
Lloh41:
	adrp	x8, _INTEL_OUTPUT_DP_MST@GOTPAGE
Lloh42:
	ldr	x8, [x8, _INTEL_OUTPUT_DP_MST@GOTPAGEOFF]
Lloh43:
	ldr	x0, [x8]
LBB0_16:
	bl	_BIT
	ldr	w8, [x19, #56]
	orr	w8, w8, w0
	str	w8, [x19, #56]
Lloh44:
	adrp	x8, _DDI_PORT_WIDTH_MASK@GOTPAGE
Lloh45:
	ldr	x8, [x8, _DDI_PORT_WIDTH_MASK@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
	and	w8, w8, w24
Lloh47:
	adrp	x9, _DDI_PORT_WIDTH_SHIFT@GOTPAGE
Lloh48:
	ldr	x9, [x9, _DDI_PORT_WIDTH_SHIFT@GOTPAGEOFF]
Lloh49:
	ldr	w9, [x9]
	asr	w8, w8, w9
	add	w8, w8, #1
	str	w8, [x19, #24]
	mov	x0, x23
	mov	x1, x19
	bl	_intel_dp_get_m_n
LBB0_17:
	mov	x0, x21
	mov	x1, x22
	bl	_intel_ddi_is_audio_enabled
	str	w0, [x19, #52]
	ldr	x8, [x20]
	ldr	x9, [x25]
	cmp	x8, x9
	b.ne	LBB0_21
; %bb.18:
	ldr	x2, [x21]
	cbz	x2, LBB0_21
; %bb.19:
	ldrsw	x1, [x19, #4]
	cmp	x2, x1
	b.ge	LBB0_21
; %bb.20:
Lloh50:
	adrp	x0, l_.str@PAGE
Lloh51:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
	ldrsw	x8, [x19, #4]
	str	x8, [x21]
LBB0_21:
	mov	x0, x20
	mov	x1, x19
	bl	_intel_ddi_clock_get
	mov	x0, x21
	bl	_IS_GEN9_LP
	cbz	x0, LBB0_23
; %bb.22:
	mov	x0, x20
	bl	_bxt_ddi_phy_get_lane_lat_optim_mask
	str	w0, [x19, #48]
LBB0_23:
	mov	x0, x21
	mov	x1, x19
	bl	_intel_ddi_compute_min_voltage_level
	mov	x0, x20
	mov	x1, x19
	bl	_intel_hdmi_read_gcp_infoframe
Lloh52:
	adrp	x8, _HDMI_INFOFRAME_TYPE_AVI@GOTPAGE
Lloh53:
	ldr	x8, [x8, _HDMI_INFOFRAME_TYPE_AVI@GOTPAGEOFF]
Lloh54:
	ldr	w2, [x8]
	add	x21, x19, #28
	add	x3, x19, #40
	mov	x0, x20
	mov	x1, x19
	bl	_intel_read_infoframe
Lloh55:
	adrp	x8, _HDMI_INFOFRAME_TYPE_SPD@GOTPAGE
Lloh56:
	ldr	x8, [x8, _HDMI_INFOFRAME_TYPE_SPD@GOTPAGEOFF]
Lloh57:
	ldr	w2, [x8]
	add	x3, x19, #36
	mov	x0, x20
	mov	x1, x19
	bl	_intel_read_infoframe
Lloh58:
	adrp	x8, _HDMI_INFOFRAME_TYPE_VENDOR@GOTPAGE
Lloh59:
	ldr	x8, [x8, _HDMI_INFOFRAME_TYPE_VENDOR@GOTPAGEOFF]
Lloh60:
	ldr	w2, [x8]
	add	x3, x19, #32
	mov	x0, x20
	mov	x1, x19
	bl	_intel_read_infoframe
Lloh61:
	adrp	x8, _HDMI_INFOFRAME_TYPE_DRM@GOTPAGE
Lloh62:
	ldr	x8, [x8, _HDMI_INFOFRAME_TYPE_DRM@GOTPAGEOFF]
Lloh63:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	x3, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_intel_read_infoframe
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh6
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpAdd	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_6-LBB0_6)>>2
	.byte	(LBB0_13-LBB0_6)>>2
	.byte	(LBB0_12-LBB0_6)>>2
	.byte	(LBB0_14-LBB0_6)>>2
	.byte	(LBB0_15-LBB0_6)>>2
                                        ; -- End function
	.comm	_TRANS_DDI_PHSYNC,4,2           ; @TRANS_DDI_PHSYNC
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ; @DRM_MODE_FLAG_PHSYNC
	.comm	_DRM_MODE_FLAG_NHSYNC,4,2       ; @DRM_MODE_FLAG_NHSYNC
	.comm	_TRANS_DDI_PVSYNC,4,2           ; @TRANS_DDI_PVSYNC
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ; @DRM_MODE_FLAG_PVSYNC
	.comm	_DRM_MODE_FLAG_NVSYNC,4,2       ; @DRM_MODE_FLAG_NVSYNC
	.comm	_TRANS_DDI_BPC_MASK,4,2         ; @TRANS_DDI_BPC_MASK
	.comm	_TRANS_DDI_MODE_SELECT_MASK,4,2 ; @TRANS_DDI_MODE_SELECT_MASK
	.comm	_TRANS_DDI_HDMI_SCRAMBLING,4,2  ; @TRANS_DDI_HDMI_SCRAMBLING
	.comm	_TRANS_DDI_HIGH_TMDS_CHAR_RATE,4,2 ; @TRANS_DDI_HIGH_TMDS_CHAR_RATE
	.comm	_INTEL_OUTPUT_HDMI,8,3          ; @INTEL_OUTPUT_HDMI
	.comm	_INTEL_OUTPUT_ANALOG,8,3        ; @INTEL_OUTPUT_ANALOG
	.comm	_INTEL_OUTPUT_EDP,8,3           ; @INTEL_OUTPUT_EDP
	.comm	_INTEL_OUTPUT_DP,8,3            ; @INTEL_OUTPUT_DP
	.comm	_DDI_PORT_WIDTH_MASK,4,2        ; @DDI_PORT_WIDTH_MASK
	.comm	_DDI_PORT_WIDTH_SHIFT,4,2       ; @DDI_PORT_WIDTH_SHIFT
	.comm	_INTEL_OUTPUT_DP_MST,8,3        ; @INTEL_OUTPUT_DP_MST
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n"

	.comm	_HDMI_INFOFRAME_TYPE_AVI,4,2    ; @HDMI_INFOFRAME_TYPE_AVI
	.comm	_HDMI_INFOFRAME_TYPE_SPD,4,2    ; @HDMI_INFOFRAME_TYPE_SPD
	.comm	_HDMI_INFOFRAME_TYPE_VENDOR,4,2 ; @HDMI_INFOFRAME_TYPE_VENDOR
	.comm	_HDMI_INFOFRAME_TYPE_DRM,4,2    ; @HDMI_INFOFRAME_TYPE_DRM
	.section	__TEXT,__literal16,16byte_literals
	.p2align	2                               ; @switch.table.intel_ddi_get_config
l_switch.table.intel_ddi_get_config:
	.long	24                              ; 0x18
	.long	18                              ; 0x12
	.long	36                              ; 0x24
	.long	30                              ; 0x1e

.subsections_via_symbols
