	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function _intel_dp_set_link_train
__intel_dp_set_link_train:              ## @_intel_dp_set_link_train
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r12d
	movq	%rsi, %r14
	movq	%rdi, %rbx
	callq	_dp_to_i915
	movq	%rax, %r13
	movq	%rbx, %rdi
	callq	_dp_to_dig_port
	movl	(%rax), %r15d
	movl	(%rbx), %edi
	callq	_drm_dp_training_pattern_mask
	movl	%eax, %ebx
	andl	%r12d, %ebx
	je	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
LBB0_2:
	movq	%r13, %rdi
	callq	_HAS_DDI
	testq	%rax, %rax
	je	LBB0_12
## %bb.3:
	movl	%r15d, %edi
	callq	_DP_TP_CTL
	movl	%eax, %edi
	callq	_I915_READ
	movq	_DP_LINK_SCRAMBLING_DISABLE@GOTPCREL(%rip), %rcx
	movq	_DP_TP_CTL_SCRAMBLE_DISABLE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	movl	%edx, %esi
	orl	%eax, %esi
	notl	%edx
	andl	%eax, %edx
	testl	%r12d, (%rcx)
	cmovnel	%esi, %edx
	movq	_DP_TP_CTL_LINK_TRAIN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	notl	%r14d
	andl	%edx, %r14d
	addl	$-128, %ebx
	cmpl	$4, %ebx
	ja	LBB0_11
## %bb.4:
	leaq	LJTI0_0(%rip), %rax
	movslq	(%rax,%rbx,4), %rcx
	addq	%rax, %rcx
	jmpq	*%rcx
LBB0_5:
	movq	_DP_TP_CTL_LINK_TRAIN_NORMAL@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_12:
	movq	%r13, %rdi
	callq	_IS_IVYBRIDGE
	movq	_PORT_A@GOTPCREL(%rip), %rbx
	testq	%rax, %rax
	je	LBB0_14
## %bb.13:
	cmpl	(%rbx), %r15d
	je	LBB0_16
LBB0_14:
	movq	%r13, %rdi
	callq	_HAS_PCH_CPT
	testq	%rax, %rax
	je	LBB0_23
## %bb.15:
	cmpl	(%rbx), %r15d
	je	LBB0_23
LBB0_16:
	movq	_DP_LINK_TRAIN_MASK_CPT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	(%r14), %eax
	movl	%eax, (%r14)
	movq	_DP_TRAINING_PATTERN_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %r12d
	addl	$-128, %r12d
	cmpl	$4, %r12d
	ja	LBB0_30
## %bb.17:
	leaq	LJTI0_2(%rip), %rcx
	movslq	(%rcx,%r12,4), %rdx
	addq	%rcx, %rdx
	jmpq	*%rdx
LBB0_18:
	movq	_DP_LINK_TRAIN_OFF_CPT@GOTPCREL(%rip), %rcx
	jmp	LBB0_19
LBB0_9:
	movq	_DP_TP_CTL_LINK_TRAIN_PAT4@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_8:
	movq	_DP_TP_CTL_LINK_TRAIN_PAT3@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_7:
	movq	_DP_TP_CTL_LINK_TRAIN_PAT2@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_6:
	movq	_DP_TP_CTL_LINK_TRAIN_PAT1@GOTPCREL(%rip), %rax
LBB0_10:
	orl	(%rax), %r14d
LBB0_11:
	movl	%r15d, %edi
	callq	_DP_TP_CTL
	movl	%eax, %edi
	movl	%r14d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_I915_WRITE                     ## TAILCALL
LBB0_23:
	movq	_DP_LINK_TRAIN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	(%r14), %eax
	movl	%eax, (%r14)
	movq	_DP_TRAINING_PATTERN_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %r12d
	addl	$-128, %r12d
	cmpl	$4, %r12d
	ja	LBB0_30
## %bb.24:
	leaq	LJTI0_1(%rip), %rcx
	movslq	(%rcx,%r12,4), %rdx
	addq	%rcx, %rdx
	jmpq	*%rdx
LBB0_25:
	movq	_DP_LINK_TRAIN_OFF@GOTPCREL(%rip), %rcx
	jmp	LBB0_19
LBB0_22:
	leaq	L_.str.1(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movq	_DP_LINK_TRAIN_PAT_2_CPT@GOTPCREL(%rip), %rax
	jmp	LBB0_29
LBB0_21:
	movq	_DP_LINK_TRAIN_PAT_2_CPT@GOTPCREL(%rip), %rcx
	jmp	LBB0_19
LBB0_20:
	movq	_DP_LINK_TRAIN_PAT_1_CPT@GOTPCREL(%rip), %rcx
	jmp	LBB0_19
LBB0_28:
	leaq	L_.str.1(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movq	_DP_LINK_TRAIN_PAT_2@GOTPCREL(%rip), %rax
LBB0_29:
	movl	(%rax), %eax
	orl	%eax, (%r14)
	jmp	LBB0_30
LBB0_27:
	movq	_DP_LINK_TRAIN_PAT_2@GOTPCREL(%rip), %rcx
	jmp	LBB0_19
LBB0_26:
	movq	_DP_LINK_TRAIN_PAT_1@GOTPCREL(%rip), %rcx
LBB0_19:
	orl	(%rcx), %eax
	movl	%eax, (%r14)
LBB0_30:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
LJTI0_0:
	.long	L0_0_set_5
	.long	L0_0_set_9
	.long	L0_0_set_8
	.long	L0_0_set_7
	.long	L0_0_set_6
.set L0_1_set_25, LBB0_25-LJTI0_1
.set L0_1_set_30, LBB0_30-LJTI0_1
.set L0_1_set_28, LBB0_28-LJTI0_1
.set L0_1_set_27, LBB0_27-LJTI0_1
.set L0_1_set_26, LBB0_26-LJTI0_1
LJTI0_1:
	.long	L0_1_set_25
	.long	L0_1_set_30
	.long	L0_1_set_28
	.long	L0_1_set_27
	.long	L0_1_set_26
.set L0_2_set_18, LBB0_18-LJTI0_2
.set L0_2_set_30, LBB0_30-LJTI0_2
.set L0_2_set_22, LBB0_22-LJTI0_2
.set L0_2_set_21, LBB0_21-LJTI0_2
.set L0_2_set_20, LBB0_20-LJTI0_2
LJTI0_2:
	.long	L0_2_set_18
	.long	L0_2_set_30
	.long	L0_2_set_22
	.long	L0_2_set_21
	.long	L0_2_set_20
	.end_data_region
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Using DP training pattern TPS%d\n"

	.comm	_DP_LINK_SCRAMBLING_DISABLE,4,2 ## @DP_LINK_SCRAMBLING_DISABLE
	.comm	_DP_TP_CTL_SCRAMBLE_DISABLE,4,2 ## @DP_TP_CTL_SCRAMBLE_DISABLE
	.comm	_DP_TP_CTL_LINK_TRAIN_MASK,4,2  ## @DP_TP_CTL_LINK_TRAIN_MASK
	.comm	_DP_TP_CTL_LINK_TRAIN_NORMAL,4,2 ## @DP_TP_CTL_LINK_TRAIN_NORMAL
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT1,4,2  ## @DP_TP_CTL_LINK_TRAIN_PAT1
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT2,4,2  ## @DP_TP_CTL_LINK_TRAIN_PAT2
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT3,4,2  ## @DP_TP_CTL_LINK_TRAIN_PAT3
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT4,4,2  ## @DP_TP_CTL_LINK_TRAIN_PAT4
	.comm	_PORT_A,4,2                     ## @PORT_A
	.comm	_DP_LINK_TRAIN_MASK_CPT,4,2     ## @DP_LINK_TRAIN_MASK_CPT
	.comm	_DP_TRAINING_PATTERN_MASK,4,2   ## @DP_TRAINING_PATTERN_MASK
	.comm	_DP_LINK_TRAIN_OFF_CPT,4,2      ## @DP_LINK_TRAIN_OFF_CPT
	.comm	_DP_LINK_TRAIN_PAT_1_CPT,4,2    ## @DP_LINK_TRAIN_PAT_1_CPT
	.comm	_DP_LINK_TRAIN_PAT_2_CPT,4,2    ## @DP_LINK_TRAIN_PAT_2_CPT
L_.str.1:                               ## @.str.1
	.asciz	"TPS3 not supported, using TPS2 instead\n"

	.comm	_DP_LINK_TRAIN_MASK,4,2         ## @DP_LINK_TRAIN_MASK
	.comm	_DP_LINK_TRAIN_OFF,4,2          ## @DP_LINK_TRAIN_OFF
	.comm	_DP_LINK_TRAIN_PAT_1,4,2        ## @DP_LINK_TRAIN_PAT_1
	.comm	_DP_LINK_TRAIN_PAT_2,4,2        ## @DP_LINK_TRAIN_PAT_2
	.no_dead_strip	__intel_dp_set_link_train
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function _intel_dp_set_link_train
__intel_dp_set_link_train:              ; @_intel_dp_set_link_train
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x19, x1
	mov	x23, x0
	bl	_dp_to_i915
	mov	x22, x0
	mov	x0, x23
	bl	_dp_to_dig_port
	ldr	w20, [x0]
	ldr	w0, [x23]
	bl	_drm_dp_training_pattern_mask
	ands	w23, w0, w21
	b.eq	LBB0_2
; %bb.1:
	str	x23, [sp]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
LBB0_2:
	mov	x0, x22
	bl	_HAS_DDI
	cbz	x0, LBB0_6
; %bb.3:
	mov	x0, x20
	bl	_DP_TP_CTL
	bl	_I915_READ
Lloh2:
	adrp	x8, _DP_LINK_SCRAMBLING_DISABLE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DP_LINK_SCRAMBLING_DISABLE@GOTPAGEOFF]
Lloh4:
	adrp	x9, _DP_TP_CTL_SCRAMBLE_DISABLE@GOTPAGE
Lloh5:
	ldr	x9, [x9, _DP_TP_CTL_SCRAMBLE_DISABLE@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
Lloh7:
	ldr	w9, [x9]
	orr	w10, w9, w0
	bic	w9, w0, w9
	tst	w8, w21
	csel	w8, w9, w10, eq
Lloh8:
	adrp	x9, _DP_TP_CTL_LINK_TRAIN_MASK@GOTPAGE
Lloh9:
	ldr	x9, [x9, _DP_TP_CTL_LINK_TRAIN_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	bic	w19, w8, w9
	sub	w8, w23, #128
	cmp	w8, #4
	b.hi	LBB0_18
; %bb.4:
Lloh11:
	adrp	x9, lJTI0_0@PAGE
Lloh12:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_5
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_5:
Lloh13:
	adrp	x8, _DP_TP_CTL_LINK_TRAIN_NORMAL@GOTPAGE
Lloh14:
	ldr	x8, [x8, _DP_TP_CTL_LINK_TRAIN_NORMAL@GOTPAGEOFF]
	b	LBB0_17
LBB0_6:
	mov	x0, x22
	bl	_IS_IVYBRIDGE
Lloh15:
	adrp	x23, _PORT_A@GOTPAGE
Lloh16:
	ldr	x23, [x23, _PORT_A@GOTPAGEOFF]
	cbz	x0, LBB0_8
; %bb.7:
	ldr	w8, [x23]
	cmp	w20, w8
	b.eq	LBB0_10
LBB0_8:
	mov	x0, x22
	bl	_HAS_PCH_CPT
	cbz	x0, LBB0_19
; %bb.9:
	ldr	w8, [x23]
	cmp	w20, w8
	b.eq	LBB0_19
LBB0_10:
Lloh17:
	adrp	x8, _DP_LINK_TRAIN_MASK_CPT@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DP_LINK_TRAIN_MASK_CPT@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	ldr	w9, [x19]
	bic	w8, w9, w8
	str	w8, [x19]
Lloh20:
	adrp	x9, _DP_TRAINING_PATTERN_MASK@GOTPAGE
Lloh21:
	ldr	x9, [x9, _DP_TRAINING_PATTERN_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	and	w9, w9, w21
	sub	w9, w9, #128
	cmp	w9, #4
	b.hi	LBB0_31
; %bb.11:
Lloh23:
	adrp	x10, lJTI0_2@PAGE
Lloh24:
	add	x10, x10, lJTI0_2@PAGEOFF
	adr	x11, LBB0_12
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_12:
Lloh25:
	adrp	x9, _DP_LINK_TRAIN_OFF_CPT@GOTPAGE
Lloh26:
	ldr	x9, [x9, _DP_LINK_TRAIN_OFF_CPT@GOTPAGEOFF]
	b	LBB0_29
LBB0_13:
Lloh27:
	adrp	x8, _DP_TP_CTL_LINK_TRAIN_PAT4@GOTPAGE
Lloh28:
	ldr	x8, [x8, _DP_TP_CTL_LINK_TRAIN_PAT4@GOTPAGEOFF]
	b	LBB0_17
LBB0_14:
Lloh29:
	adrp	x8, _DP_TP_CTL_LINK_TRAIN_PAT3@GOTPAGE
Lloh30:
	ldr	x8, [x8, _DP_TP_CTL_LINK_TRAIN_PAT3@GOTPAGEOFF]
	b	LBB0_17
LBB0_15:
Lloh31:
	adrp	x8, _DP_TP_CTL_LINK_TRAIN_PAT2@GOTPAGE
Lloh32:
	ldr	x8, [x8, _DP_TP_CTL_LINK_TRAIN_PAT2@GOTPAGEOFF]
	b	LBB0_17
LBB0_16:
Lloh33:
	adrp	x8, _DP_TP_CTL_LINK_TRAIN_PAT1@GOTPAGE
Lloh34:
	ldr	x8, [x8, _DP_TP_CTL_LINK_TRAIN_PAT1@GOTPAGEOFF]
LBB0_17:
	ldr	w8, [x8]
	orr	w19, w8, w19
LBB0_18:
	mov	x0, x20
	bl	_DP_TP_CTL
	mov	x1, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_I915_WRITE
LBB0_19:
Lloh35:
	adrp	x8, _DP_LINK_TRAIN_MASK@GOTPAGE
Lloh36:
	ldr	x8, [x8, _DP_LINK_TRAIN_MASK@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	ldr	w9, [x19]
	bic	w8, w9, w8
	str	w8, [x19]
Lloh38:
	adrp	x9, _DP_TRAINING_PATTERN_MASK@GOTPAGE
Lloh39:
	ldr	x9, [x9, _DP_TRAINING_PATTERN_MASK@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	and	w9, w9, w21
	sub	w9, w9, #128
	cmp	w9, #4
	b.hi	LBB0_31
; %bb.20:
Lloh41:
	adrp	x10, lJTI0_1@PAGE
Lloh42:
	add	x10, x10, lJTI0_1@PAGEOFF
	adr	x11, LBB0_21
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_21:
Lloh43:
	adrp	x9, _DP_LINK_TRAIN_OFF@GOTPAGE
Lloh44:
	ldr	x9, [x9, _DP_LINK_TRAIN_OFF@GOTPAGEOFF]
	b	LBB0_29
LBB0_22:
Lloh45:
	adrp	x0, l_.str.1@PAGE
Lloh46:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_DEBUG_KMS
Lloh47:
	adrp	x8, _DP_LINK_TRAIN_PAT_2_CPT@GOTPAGE
Lloh48:
	ldr	x8, [x8, _DP_LINK_TRAIN_PAT_2_CPT@GOTPAGEOFF]
	b	LBB0_26
LBB0_23:
Lloh49:
	adrp	x9, _DP_LINK_TRAIN_PAT_2_CPT@GOTPAGE
Lloh50:
	ldr	x9, [x9, _DP_LINK_TRAIN_PAT_2_CPT@GOTPAGEOFF]
	b	LBB0_29
LBB0_24:
Lloh51:
	adrp	x9, _DP_LINK_TRAIN_PAT_1_CPT@GOTPAGE
Lloh52:
	ldr	x9, [x9, _DP_LINK_TRAIN_PAT_1_CPT@GOTPAGEOFF]
	b	LBB0_29
LBB0_25:
Lloh53:
	adrp	x0, l_.str.1@PAGE
Lloh54:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_DEBUG_KMS
Lloh55:
	adrp	x8, _DP_LINK_TRAIN_PAT_2@GOTPAGE
Lloh56:
	ldr	x8, [x8, _DP_LINK_TRAIN_PAT_2@GOTPAGEOFF]
LBB0_26:
	ldr	w8, [x8]
	ldr	w9, [x19]
	b	LBB0_30
LBB0_27:
Lloh57:
	adrp	x9, _DP_LINK_TRAIN_PAT_2@GOTPAGE
Lloh58:
	ldr	x9, [x9, _DP_LINK_TRAIN_PAT_2@GOTPAGEOFF]
	b	LBB0_29
LBB0_28:
Lloh59:
	adrp	x9, _DP_LINK_TRAIN_PAT_1@GOTPAGE
Lloh60:
	ldr	x9, [x9, _DP_LINK_TRAIN_PAT_1@GOTPAGEOFF]
LBB0_29:
	ldr	w9, [x9]
LBB0_30:
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_31:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh6
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpAdd	Lloh53, Lloh54
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh59, Lloh60
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_5-LBB0_5)>>2
	.byte	(LBB0_13-LBB0_5)>>2
	.byte	(LBB0_14-LBB0_5)>>2
	.byte	(LBB0_15-LBB0_5)>>2
	.byte	(LBB0_16-LBB0_5)>>2
lJTI0_1:
	.byte	(LBB0_21-LBB0_21)>>2
	.byte	(LBB0_31-LBB0_21)>>2
	.byte	(LBB0_25-LBB0_21)>>2
	.byte	(LBB0_27-LBB0_21)>>2
	.byte	(LBB0_28-LBB0_21)>>2
lJTI0_2:
	.byte	(LBB0_12-LBB0_12)>>2
	.byte	(LBB0_31-LBB0_12)>>2
	.byte	(LBB0_22-LBB0_12)>>2
	.byte	(LBB0_23-LBB0_12)>>2
	.byte	(LBB0_24-LBB0_12)>>2
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Using DP training pattern TPS%d\n"

	.comm	_DP_LINK_SCRAMBLING_DISABLE,4,2 ; @DP_LINK_SCRAMBLING_DISABLE
	.comm	_DP_TP_CTL_SCRAMBLE_DISABLE,4,2 ; @DP_TP_CTL_SCRAMBLE_DISABLE
	.comm	_DP_TP_CTL_LINK_TRAIN_MASK,4,2  ; @DP_TP_CTL_LINK_TRAIN_MASK
	.comm	_DP_TP_CTL_LINK_TRAIN_NORMAL,4,2 ; @DP_TP_CTL_LINK_TRAIN_NORMAL
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT1,4,2  ; @DP_TP_CTL_LINK_TRAIN_PAT1
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT2,4,2  ; @DP_TP_CTL_LINK_TRAIN_PAT2
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT3,4,2  ; @DP_TP_CTL_LINK_TRAIN_PAT3
	.comm	_DP_TP_CTL_LINK_TRAIN_PAT4,4,2  ; @DP_TP_CTL_LINK_TRAIN_PAT4
	.comm	_PORT_A,4,2                     ; @PORT_A
	.comm	_DP_LINK_TRAIN_MASK_CPT,4,2     ; @DP_LINK_TRAIN_MASK_CPT
	.comm	_DP_TRAINING_PATTERN_MASK,4,2   ; @DP_TRAINING_PATTERN_MASK
	.comm	_DP_LINK_TRAIN_OFF_CPT,4,2      ; @DP_LINK_TRAIN_OFF_CPT
	.comm	_DP_LINK_TRAIN_PAT_1_CPT,4,2    ; @DP_LINK_TRAIN_PAT_1_CPT
	.comm	_DP_LINK_TRAIN_PAT_2_CPT,4,2    ; @DP_LINK_TRAIN_PAT_2_CPT
l_.str.1:                               ; @.str.1
	.asciz	"TPS3 not supported, using TPS2 instead\n"

	.comm	_DP_LINK_TRAIN_MASK,4,2         ; @DP_LINK_TRAIN_MASK
	.comm	_DP_LINK_TRAIN_OFF,4,2          ; @DP_LINK_TRAIN_OFF
	.comm	_DP_LINK_TRAIN_PAT_1,4,2        ; @DP_LINK_TRAIN_PAT_1
	.comm	_DP_LINK_TRAIN_PAT_2,4,2        ; @DP_LINK_TRAIN_PAT_2
	.no_dead_strip	__intel_dp_set_link_train
.subsections_via_symbols
