	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function thunderx_gpio_irq_set_type
_thunderx_gpio_irq_set_type:            ## @thunderx_gpio_irq_set_type
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %rbx
	callq	_irq_data_get_irq_chip_data
	movq	%rax, %rdi
	callq	_gpiochip_get_data
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	24(%rax), %r12
	movq	%rbx, %rdi
	callq	_irqd_to_hwirq
	movq	%rax, %r14
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_irqd_set_trigger_type
	movq	_GPIO_BIT_CFG_INT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	%r12, -56(%rbp)                 ## 8-byte Spill
	movq	%r14, -48(%rbp)                 ## 8-byte Spill
	orl	(%r12,%r14,8), %r13d
	movq	_IRQ_TYPE_EDGE_BOTH@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_2
## %bb.1:
	movq	_handle_fasteoi_ack_irq@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_irq_set_handler_locked
	movq	_GPIO_BIT_CFG_INT_TYPE@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	jmp	LBB0_3
LBB0_2:
	movq	_handle_fasteoi_mask_irq@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_irq_set_handler_locked
LBB0_3:
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	callq	_raw_spin_lock
	movq	_IRQ_TYPE_EDGE_FALLING@GOTPCREL(%rip), %rax
	movq	_IRQ_TYPE_LEVEL_LOW@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	testl	%r15d, %ecx
	je	LBB0_5
## %bb.4:
	movq	_GPIO_BIT_CFG_PIN_XOR@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movl	4(%r12,%r14,8), %edi
	movl	20(%rbx), %esi
	callq	_set_bit
	jmp	LBB0_6
LBB0_5:
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movl	4(%r12,%r14,8), %edi
	movl	20(%rbx), %esi
	callq	_clear_bit
LBB0_6:
	movl	4(%r12,%r14,8), %edi
	movl	16(%rbx), %esi
	callq	_clear_bit
	movq	%rbx, %r15
	movq	8(%rbx), %rbx
	movl	4(%r12,%r14,8), %edi
	callq	_bit_cfg_reg
	addq	%rax, %rbx
	movl	%r13d, %edi
	movq	%rbx, %rsi
	callq	_writeq
	movq	%r15, %rdi
	callq	_raw_spin_unlock
	movq	_IRQ_SET_MASK_OK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GPIO_BIT_CFG_INT_EN,4,2        ## @GPIO_BIT_CFG_INT_EN
	.comm	_IRQ_TYPE_EDGE_BOTH,4,2         ## @IRQ_TYPE_EDGE_BOTH
	.comm	_handle_fasteoi_ack_irq,4,2     ## @handle_fasteoi_ack_irq
	.comm	_GPIO_BIT_CFG_INT_TYPE,4,2      ## @GPIO_BIT_CFG_INT_TYPE
	.comm	_handle_fasteoi_mask_irq,4,2    ## @handle_fasteoi_mask_irq
	.comm	_IRQ_TYPE_EDGE_FALLING,4,2      ## @IRQ_TYPE_EDGE_FALLING
	.comm	_IRQ_TYPE_LEVEL_LOW,4,2         ## @IRQ_TYPE_LEVEL_LOW
	.comm	_GPIO_BIT_CFG_PIN_XOR,4,2       ## @GPIO_BIT_CFG_PIN_XOR
	.comm	_IRQ_SET_MASK_OK,4,2            ## @IRQ_SET_MASK_OK
	.no_dead_strip	_thunderx_gpio_irq_set_type
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function thunderx_gpio_irq_set_type
_thunderx_gpio_irq_set_type:            ; @thunderx_gpio_irq_set_type
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x1
	mov	x23, x0
	bl	_irq_data_get_irq_chip_data
	bl	_gpiochip_get_data
	mov	x19, x0
	ldr	x24, [x0, #24]
	mov	x0, x23
	bl	_irqd_to_hwirq
	mov	x21, x0
	mov	x0, x23
	mov	x1, x22
	bl	_irqd_set_trigger_type
	lsl	x8, x21, #3
	ldr	w8, [x24, x8]
Lloh0:
	adrp	x9, _GPIO_BIT_CFG_INT_EN@GOTPAGE
Lloh1:
	ldr	x9, [x9, _GPIO_BIT_CFG_INT_EN@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	orr	w20, w9, w8
Lloh3:
	adrp	x8, _IRQ_TYPE_EDGE_BOTH@GOTPAGE
Lloh4:
	ldr	x8, [x8, _IRQ_TYPE_EDGE_BOTH@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_2
; %bb.1:
Lloh6:
	adrp	x8, _handle_fasteoi_ack_irq@GOTPAGE
Lloh7:
	ldr	x8, [x8, _handle_fasteoi_ack_irq@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_irq_set_handler_locked
Lloh9:
	adrp	x8, _GPIO_BIT_CFG_INT_TYPE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _GPIO_BIT_CFG_INT_TYPE@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	orr	w20, w8, w20
	b	LBB0_3
LBB0_2:
Lloh12:
	adrp	x8, _handle_fasteoi_mask_irq@GOTPAGE
Lloh13:
	ldr	x8, [x8, _handle_fasteoi_mask_irq@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x23
	bl	_irq_set_handler_locked
LBB0_3:
	mov	x0, x19
	bl	_raw_spin_lock
Lloh15:
	adrp	x8, _IRQ_TYPE_EDGE_FALLING@GOTPAGE
Lloh16:
	ldr	x8, [x8, _IRQ_TYPE_EDGE_FALLING@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
Lloh18:
	adrp	x9, _IRQ_TYPE_LEVEL_LOW@GOTPAGE
Lloh19:
	ldr	x9, [x9, _IRQ_TYPE_LEVEL_LOW@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w8, w9, w8
	tst	w8, w22
	b.eq	LBB0_5
; %bb.4:
Lloh21:
	adrp	x8, _GPIO_BIT_CFG_PIN_XOR@GOTPAGE
Lloh22:
	ldr	x8, [x8, _GPIO_BIT_CFG_PIN_XOR@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	orr	w20, w8, w20
	add	x8, x24, x21, lsl #3
	ldr	w0, [x8, #4]
	ldr	w1, [x19, #20]
	bl	_set_bit
	b	LBB0_6
LBB0_5:
	add	x8, x24, x21, lsl #3
	ldr	w0, [x8, #4]
	ldr	w1, [x19, #20]
	bl	_clear_bit
LBB0_6:
	add	x21, x24, x21, lsl #3
	ldr	w0, [x21, #4]
	ldr	w1, [x19, #16]
	bl	_clear_bit
	ldr	x22, [x19, #8]
	ldr	w0, [x21, #4]
	bl	_bit_cfg_reg
	add	x1, x0, x22
	mov	x0, x20
	bl	_writeq
	mov	x0, x19
	bl	_raw_spin_unlock
Lloh24:
	adrp	x8, _IRQ_SET_MASK_OK@GOTPAGE
Lloh25:
	ldr	x8, [x8, _IRQ_SET_MASK_OK@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_GPIO_BIT_CFG_INT_EN,4,2        ; @GPIO_BIT_CFG_INT_EN
	.comm	_IRQ_TYPE_EDGE_BOTH,4,2         ; @IRQ_TYPE_EDGE_BOTH
	.comm	_handle_fasteoi_ack_irq,4,2     ; @handle_fasteoi_ack_irq
	.comm	_GPIO_BIT_CFG_INT_TYPE,4,2      ; @GPIO_BIT_CFG_INT_TYPE
	.comm	_handle_fasteoi_mask_irq,4,2    ; @handle_fasteoi_mask_irq
	.comm	_IRQ_TYPE_EDGE_FALLING,4,2      ; @IRQ_TYPE_EDGE_FALLING
	.comm	_IRQ_TYPE_LEVEL_LOW,4,2         ; @IRQ_TYPE_LEVEL_LOW
	.comm	_GPIO_BIT_CFG_PIN_XOR,4,2       ; @GPIO_BIT_CFG_PIN_XOR
	.comm	_IRQ_SET_MASK_OK,4,2            ; @IRQ_SET_MASK_OK
	.no_dead_strip	_thunderx_gpio_irq_set_type
.subsections_via_symbols
