	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_uvd_get_destroy_msg     ## -- Begin function radeon_uvd_get_destroy_msg
	.p2align	4, 0x90
_radeon_uvd_get_destroy_msg:            ## @radeon_uvd_get_destroy_msg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %rbx
	movl	%edx, -48(%rbp)                 ## 4-byte Spill
	movl	%esi, %r13d
	movq	%rdi, %r15
	movl	12(%rdi), %edi
	callq	_radeon_bo_size
	movq	_RADEON_GPU_PAGE_SIZE@GOTPCREL(%rip), %rcx
	movslq	(%rcx), %rcx
	movslq	%eax, %r14
	subq	%rcx, %r14
	movl	8(%r15), %r12d
	addl	%r14d, %r12d
	shlq	$2, %r14
	addq	(%r15), %r14
	movl	12(%r15), %edi
	movl	$1, %esi
	callq	_radeon_bo_reserve
	testl	%eax, %eax
	jne	LBB0_4
## %bb.1:
	movl	%r13d, -44(%rbp)                ## 4-byte Spill
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movl	$3556, %edi                     ## imm = 0xDE4
	callq	_cpu_to_le32
	movl	%eax, (%r14)
	movl	$2, %edi
	callq	_cpu_to_le32
	movl	%eax, 4(%r14)
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_le32
	movl	%eax, 8(%r14)
	xorl	%edi, %edi
	callq	_cpu_to_le32
	movl	%eax, 12(%r14)
	movl	$4, %ebx
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	xorl	%edi, %edi
	callq	_cpu_to_le32
	movl	%eax, (%r14,%rbx,4)
	incq	%rbx
	cmpq	$1024, %rbx                     ## imm = 0x400
	jne	LBB0_2
## %bb.3:
	movq	%r15, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%r12d, %edx
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	callq	_radeon_uvd_send_msg
	movl	%eax, %r14d
	movl	12(%r15), %edi
	callq	_radeon_bo_unreserve
	movl	%r14d, %eax
LBB0_4:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ## @RADEON_GPU_PAGE_SIZE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_radeon_uvd_get_destroy_msg     ; -- Begin function radeon_uvd_get_destroy_msg
	.p2align	2
_radeon_uvd_get_destroy_msg:            ; @radeon_uvd_get_destroy_msg
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x3
	mov	x23, x2
	mov	x21, x1
	mov	x19, x0
	ldr	w0, [x0, #12]
	bl	_radeon_bo_size
	mov	x22, x0
Lloh0:
	adrp	x8, _RADEON_GPU_PAGE_SIZE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_GPU_PAGE_SIZE@GOTPAGEOFF]
Lloh2:
	ldr	w25, [x8]
	ldr	x24, [x19]
	ldp	w26, w0, [x19, #8]
	mov	w1, #1
	bl	_radeon_bo_reserve
	cbnz	w0, LBB0_4
; %bb.1:
	sub	w8, w22, w25
	add	w22, w26, w8
	add	x24, x24, w8, sxtw #2
	mov	w0, #3556
	bl	_cpu_to_le32
	str	w0, [x24]
	mov	w0, #2
	bl	_cpu_to_le32
	str	w0, [x24, #4]
	mov	x0, x23
	bl	_cpu_to_le32
	str	w0, [x24, #8]
	mov	w0, #0
	bl	_cpu_to_le32
	str	w0, [x24, #12]
	mov	w23, #16
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	mov	w0, #0
	bl	_cpu_to_le32
	str	w0, [x24, x23]
	add	x23, x23, #4
	cmp	x23, #1, lsl #12                ; =4096
	b.ne	LBB0_2
; %bb.3:
	mov	x0, x19
	mov	x1, x21
	mov	x2, x22
	mov	x3, x20
	bl	_radeon_uvd_send_msg
	mov	x20, x0
	ldr	w0, [x19, #12]
	bl	_radeon_bo_unreserve
	mov	x0, x20
LBB0_4:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_GPU_PAGE_SIZE,4,2       ; @RADEON_GPU_PAGE_SIZE
.subsections_via_symbols
