	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_engine_clock_entry_set_step_time ## -- Begin function r600_engine_clock_entry_set_step_time
	.p2align	4, 0x90
_r600_engine_clock_entry_set_step_time: ## @r600_engine_clock_entry_set_step_time
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movl	%edx, %edi
	movq	_SCLK_FREQ_SETTING_STEP_0_PART1@GOTPCREL(%rip), %rax
	shll	$3, %esi
	movslq	%esi, %rbx
	addq	(%rax), %rbx
	callq	_STEP_0_SPLL_STEP_TIME
	movq	_STEP_0_SPLL_STEP_TIME_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_WREG32_P                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SCLK_FREQ_SETTING_STEP_0_PART1,8,3 ## @SCLK_FREQ_SETTING_STEP_0_PART1
	.comm	_STEP_0_SPLL_STEP_TIME_MASK,4,2 ## @STEP_0_SPLL_STEP_TIME_MASK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r600_engine_clock_entry_set_step_time ; -- Begin function r600_engine_clock_entry_set_step_time
	.p2align	2
_r600_engine_clock_entry_set_step_time: ; @r600_engine_clock_entry_set_step_time
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x0, x2
Lloh0:
	adrp	x8, _SCLK_FREQ_SETTING_STEP_0_PART1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SCLK_FREQ_SETTING_STEP_0_PART1@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	lsl	w9, w1, #3
	add	x19, x8, w9, sxtw
	bl	_STEP_0_SPLL_STEP_TIME
	mov	x1, x0
Lloh3:
	adrp	x8, _STEP_0_SPLL_STEP_TIME_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _STEP_0_SPLL_STEP_TIME_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_WREG32_P
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SCLK_FREQ_SETTING_STEP_0_PART1,8,3 ; @SCLK_FREQ_SETTING_STEP_0_PART1
	.comm	_STEP_0_SPLL_STEP_TIME_MASK,4,2 ; @STEP_0_SPLL_STEP_TIME_MASK
.subsections_via_symbols
