	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v9_0_sw_init
_gfx_v9_0_sw_init:                      ## @gfx_v9_0_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movl	(%rdi), %eax
	addl	$-128, %eax
	xorl	%ecx, %ecx
	cmpl	$6, %eax
	adcl	$1, %ecx
	movl	%ecx, 24(%rdi)
	movabsq	$34359738372, %rax              ## imm = 0x800000004
	movq	%rax, 28(%rdi)
	movq	_SOC15_IH_CLIENTID_GRBM_CP@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	movq	_GFX_9_0__SRCID__CP_EOP_INTERRUPT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	36(%rdi), %r14
	movq	%r14, %rcx
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_12
## %bb.1:
	movl	(%r13), %esi
	movq	_GFX_9_0__SRCID__CP_PRIV_REG_FAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	68(%r12), %rcx
	movq	%r12, %rdi
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_12
## %bb.2:
	movl	(%r13), %esi
	movq	_GFX_9_0__SRCID__CP_PRIV_INSTR_FAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	64(%r12), %rcx
	movq	%r12, %rdi
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_12
## %bb.3:
	movl	(%r13), %esi
	movq	_GFX_9_0__SRCID__CP_ECC_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	60(%r12), %r15
	movq	%r12, %rdi
	movq	%r15, %rcx
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_12
## %bb.4:
	movl	(%r13), %esi
	movq	_GFX_9_0__SRCID__CP_FUE_ERROR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movq	%r15, %rcx
	callq	_amdgpu_irq_add_id
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_12
## %bb.5:
	movq	_AMDGPU_GFX_NORMAL_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%r12)
	movq	%r12, %rdi
	callq	_gfx_v9_0_scratch_init
	movq	%r12, %rdi
	callq	_gfx_v9_0_init_microcode
	testl	%eax, %eax
	je	LBB0_7
## %bb.6:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_11
LBB0_7:
	movq	48(%r12), %rax
	movq	%r12, %rdi
	callq	*(%rax)
	testl	%eax, %eax
	je	LBB0_9
## %bb.8:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_11
LBB0_9:
	movq	%r12, %rdi
	callq	_gfx_v9_0_mec_init
	testl	%eax, %eax
	je	LBB0_13
## %bb.10:
	movl	%eax, %ebx
	leaq	L_.str.2(%rip), %rdi
LBB0_11:
	callq	_DRM_ERROR
LBB0_12:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_13:
	cmpl	$0, 8(%r12)
	jle	LBB0_20
## %bb.14:
	xorl	%r13d, %r13d
	xorl	%r15d, %r15d
LBB0_15:                                ## =>This Inner Loop Header: Depth=1
	movq	40(%r12), %rbx
	leaq	(%rbx,%r13), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	$0, 16(%rbx,%r13)
	testq	%r15, %r15
	je	LBB0_17
## %bb.16:                              ##   in Loop: Header=BB0_15 Depth=1
	movl	8(%rbx,%r13), %edi
	leaq	L_.str.4(%rip), %rsi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	_sprintf
	jmp	LBB0_18
LBB0_17:                                ##   in Loop: Header=BB0_15 Depth=1
	movl	8(%rbx), %edi
	leaq	L_.str.3(%rip), %rsi
	xorl	%eax, %eax
	callq	_sprintf
LBB0_18:                                ##   in Loop: Header=BB0_15 Depth=1
	movl	$1, (%rbx,%r13)
	movl	72(%r12), %eax
	addl	%eax, %eax
	movl	%eax, 4(%rbx,%r13)
	movq	_AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%r12, %rdi
	movq	-48(%rbp), %rsi                 ## 8-byte Reload
	movl	$1024, %edx                     ## imm = 0x400
	movq	%r14, %rcx
	callq	_amdgpu_ring_init
	testl	%eax, %eax
	jne	LBB0_37
## %bb.19:                              ##   in Loop: Header=BB0_15 Depth=1
	incq	%r15
	movslq	8(%r12), %rax
	addq	$24, %r13
	cmpq	%rax, %r15
	jl	LBB0_15
LBB0_20:
	movl	24(%r12), %ecx
	testl	%ecx, %ecx
	jle	LBB0_34
## %bb.21:
	movl	32(%r12), %eax
	movl	$0, -48(%rbp)                   ## 4-byte Folded Spill
	xorl	%r15d, %r15d
LBB0_22:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_26 Depth 2
                                        ##       Child Loop BB0_30 Depth 3
	testl	%eax, %eax
	jle	LBB0_33
## %bb.23:                              ##   in Loop: Header=BB0_22 Depth=1
	movl	28(%r12), %ecx
	xorl	%ebx, %ebx
	jmp	LBB0_26
LBB0_24:                                ##   in Loop: Header=BB0_26 Depth=2
	movl	32(%r12), %eax
LBB0_25:                                ##   in Loop: Header=BB0_26 Depth=2
	incl	%ebx
	cmpl	%eax, %ebx
	jge	LBB0_32
LBB0_26:                                ##   Parent Loop BB0_22 Depth=1
                                        ## =>  This Loop Header: Depth=2
                                        ##       Child Loop BB0_30 Depth 3
	testl	%ecx, %ecx
	jle	LBB0_25
## %bb.27:                              ##   in Loop: Header=BB0_26 Depth=2
	xorl	%r14d, %r14d
	jmp	LBB0_30
LBB0_28:                                ##   in Loop: Header=BB0_30 Depth=3
	incl	%r15d
	movl	%r13d, %ebx
LBB0_29:                                ##   in Loop: Header=BB0_30 Depth=3
	incl	%r14d
	movl	28(%r12), %ecx
	cmpl	%ecx, %r14d
	jge	LBB0_24
LBB0_30:                                ##   Parent Loop BB0_22 Depth=1
                                        ##     Parent Loop BB0_26 Depth=2
                                        ## =>    This Inner Loop Header: Depth=3
	movq	%r12, %rdi
	movl	-48(%rbp), %esi                 ## 4-byte Reload
	movl	%r14d, %edx
	movl	%ebx, %ecx
	callq	_amdgpu_gfx_is_mec_queue_enabled
	testl	%eax, %eax
	je	LBB0_29
## %bb.31:                              ##   in Loop: Header=BB0_30 Depth=3
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	movl	%r14d, %ecx
	movl	%ebx, %r13d
	movl	%ebx, %r8d
	callq	_gfx_v9_0_compute_ring_init
	testl	%eax, %eax
	je	LBB0_28
	jmp	LBB0_37
LBB0_32:                                ##   in Loop: Header=BB0_22 Depth=1
	movl	24(%r12), %ecx
LBB0_33:                                ##   in Loop: Header=BB0_22 Depth=1
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	incl	%edx
	movl	%edx, -48(%rbp)                 ## 4-byte Spill
	cmpl	%ecx, %edx
	jl	LBB0_22
LBB0_34:
	movq	_GFX9_MEC_HPD_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_amdgpu_gfx_kiq_init
	testl	%eax, %eax
	je	LBB0_38
## %bb.35:
	movl	%eax, %ebx
	leaq	L_.str.5(%rip), %rdi
	jmp	LBB0_11
LBB0_37:
	movl	%eax, %ebx
	jmp	LBB0_12
LBB0_38:
	leaq	16(%r12), %rdx
	leaq	20(%r12), %rsi
	movq	%r12, %rdi
	callq	_amdgpu_gfx_kiq_init_ring
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_12
## %bb.39:
	movq	%r12, %rdi
	movl	$4, %esi
	callq	_amdgpu_gfx_mqd_sw_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_12
## %bb.40:
	movl	$32768, 12(%r12)                ## imm = 0x8000
	movq	%r12, %rdi
	callq	_gfx_v9_0_gpu_early_init
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_12
## %bb.41:
	movq	%r12, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_gfx_v9_0_ngg_init              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SOC15_IH_CLIENTID_GRBM_CP,4,2  ## @SOC15_IH_CLIENTID_GRBM_CP
	.comm	_GFX_9_0__SRCID__CP_EOP_INTERRUPT,4,2 ## @GFX_9_0__SRCID__CP_EOP_INTERRUPT
	.comm	_GFX_9_0__SRCID__CP_PRIV_REG_FAULT,4,2 ## @GFX_9_0__SRCID__CP_PRIV_REG_FAULT
	.comm	_GFX_9_0__SRCID__CP_PRIV_INSTR_FAULT,4,2 ## @GFX_9_0__SRCID__CP_PRIV_INSTR_FAULT
	.comm	_GFX_9_0__SRCID__CP_ECC_ERROR,4,2 ## @GFX_9_0__SRCID__CP_ECC_ERROR
	.comm	_GFX_9_0__SRCID__CP_FUE_ERROR,4,2 ## @GFX_9_0__SRCID__CP_FUE_ERROR
	.comm	_AMDGPU_GFX_NORMAL_MODE,4,2     ## @AMDGPU_GFX_NORMAL_MODE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to load gfx firmware!\n"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to init rlc BOs!\n"

L_.str.2:                               ## @.str.2
	.asciz	"Failed to init MEC BOs!\n"

L_.str.3:                               ## @.str.3
	.asciz	"gfx"

L_.str.4:                               ## @.str.4
	.asciz	"gfx_%d"

	.comm	_AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP,4,2 ## @AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP
	.comm	_GFX9_MEC_HPD_SIZE,4,2          ## @GFX9_MEC_HPD_SIZE
L_.str.5:                               ## @.str.5
	.asciz	"Failed to init KIQ BOs!\n"

	.no_dead_strip	_gfx_v9_0_sw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function gfx_v9_0_sw_init
lCPI0_0:
	.long	4                               ; 0x4
	.long	8                               ; 0x8
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_gfx_v9_0_sw_init:                      ; @gfx_v9_0_sw_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	w8, [x0]
	sub	w8, w8, #128
	cmp	w8, #6
	mov	w8, #1
	cinc	w8, w8, lo
	str	w8, [x0, #24]
Lloh0:
	adrp	x8, lCPI0_0@PAGE
Lloh1:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
Lloh2:
	adrp	x23, _SOC15_IH_CLIENTID_GRBM_CP@GOTPAGE
Lloh3:
	ldr	x23, [x23, _SOC15_IH_CLIENTID_GRBM_CP@GOTPAGEOFF]
	stur	d0, [x0, #28]
	ldr	w1, [x23]
Lloh4:
	adrp	x8, _GFX_9_0__SRCID__CP_EOP_INTERRUPT@GOTPAGE
Lloh5:
	ldr	x8, [x8, _GFX_9_0__SRCID__CP_EOP_INTERRUPT@GOTPAGEOFF]
Lloh6:
	ldr	w2, [x8]
	add	x20, x0, #36
	mov	x3, x20
	bl	_amdgpu_irq_add_id
	mov	x22, x0
	cbnz	w0, LBB0_12
; %bb.1:
	ldr	w1, [x23]
Lloh7:
	adrp	x8, _GFX_9_0__SRCID__CP_PRIV_REG_FAULT@GOTPAGE
Lloh8:
	ldr	x8, [x8, _GFX_9_0__SRCID__CP_PRIV_REG_FAULT@GOTPAGEOFF]
Lloh9:
	ldr	w2, [x8]
	add	x3, x19, #68
	mov	x0, x19
	bl	_amdgpu_irq_add_id
	mov	x22, x0
	cbnz	w0, LBB0_12
; %bb.2:
	ldr	w1, [x23]
Lloh10:
	adrp	x8, _GFX_9_0__SRCID__CP_PRIV_INSTR_FAULT@GOTPAGE
Lloh11:
	ldr	x8, [x8, _GFX_9_0__SRCID__CP_PRIV_INSTR_FAULT@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
	add	x3, x19, #64
	mov	x0, x19
	bl	_amdgpu_irq_add_id
	mov	x22, x0
	cbnz	w0, LBB0_12
; %bb.3:
	ldr	w1, [x23]
Lloh13:
	adrp	x8, _GFX_9_0__SRCID__CP_ECC_ERROR@GOTPAGE
Lloh14:
	ldr	x8, [x8, _GFX_9_0__SRCID__CP_ECC_ERROR@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	add	x21, x19, #60
	mov	x0, x19
	mov	x3, x21
	bl	_amdgpu_irq_add_id
	mov	x22, x0
	cbnz	w0, LBB0_12
; %bb.4:
	ldr	w1, [x23]
Lloh16:
	adrp	x8, _GFX_9_0__SRCID__CP_FUE_ERROR@GOTPAGE
Lloh17:
	ldr	x8, [x8, _GFX_9_0__SRCID__CP_FUE_ERROR@GOTPAGEOFF]
Lloh18:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x3, x21
	bl	_amdgpu_irq_add_id
	mov	x22, x0
	cbnz	w0, LBB0_12
; %bb.5:
Lloh19:
	adrp	x8, _AMDGPU_GFX_NORMAL_MODE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _AMDGPU_GFX_NORMAL_MODE@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	str	w8, [x19, #56]
	mov	x0, x19
	bl	_gfx_v9_0_scratch_init
	mov	x0, x19
	bl	_gfx_v9_0_init_microcode
	cbz	w0, LBB0_7
; %bb.6:
	mov	x22, x0
Lloh22:
	adrp	x0, l_.str@PAGE
Lloh23:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_11
LBB0_7:
	ldr	x8, [x19, #48]
	ldr	x8, [x8]
	mov	x0, x19
	blr	x8
	cbz	w0, LBB0_9
; %bb.8:
	mov	x22, x0
Lloh24:
	adrp	x0, l_.str.1@PAGE
Lloh25:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_11
LBB0_9:
	mov	x0, x19
	bl	_gfx_v9_0_mec_init
	cbz	w0, LBB0_13
; %bb.10:
	mov	x22, x0
Lloh26:
	adrp	x0, l_.str.2@PAGE
Lloh27:
	add	x0, x0, l_.str.2@PAGEOFF
LBB0_11:
	bl	_DRM_ERROR
LBB0_12:
	mov	x0, x22
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_13:
	ldr	w8, [x19, #8]
	cmp	w8, #1
	b.lt	LBB0_20
; %bb.14:
	mov	x24, #0
	mov	x25, #0
Lloh28:
	adrp	x21, l_.str.3@PAGE
Lloh29:
	add	x21, x21, l_.str.3@PAGEOFF
	mov	w26, #1
Lloh30:
	adrp	x27, _AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP@GOTPAGE
Lloh31:
	ldr	x27, [x27, _AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP@GOTPAGEOFF]
Lloh32:
	adrp	x23, l_.str.4@PAGE
Lloh33:
	add	x23, x23, l_.str.4@PAGEOFF
LBB0_15:                                ; =>This Inner Loop Header: Depth=1
	ldr	x28, [x19, #40]
	add	x22, x28, x24
	str	xzr, [x22, #16]
	cbz	x25, LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_15 Depth=1
	ldr	w0, [x22, #8]
	str	x25, [sp]
	mov	x1, x23
	b	LBB0_18
LBB0_17:                                ;   in Loop: Header=BB0_15 Depth=1
	ldr	w0, [x28, #8]
	mov	x1, x21
LBB0_18:                                ;   in Loop: Header=BB0_15 Depth=1
	bl	_sprintf
	add	x8, x28, x24
	ldr	w9, [x19, #72]
	lsl	w9, w9, #1
	stp	w26, w9, [x8]
	ldr	w4, [x27]
	mov	x0, x19
	mov	x1, x22
	mov	w2, #1024
	mov	x3, x20
	bl	_amdgpu_ring_init
	cbnz	w0, LBB0_36
; %bb.19:                               ;   in Loop: Header=BB0_15 Depth=1
	add	x25, x25, #1
	ldrsw	x8, [x19, #8]
	add	x24, x24, #24
	cmp	x25, x8
	b.lt	LBB0_15
LBB0_20:
	ldr	w9, [x19, #24]
	cmp	w9, #1
	b.lt	LBB0_34
; %bb.21:
	mov	w20, #0
	mov	w21, #0
	ldr	w8, [x19, #32]
LBB0_22:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_26 Depth 2
                                        ;       Child Loop BB0_30 Depth 3
	cmp	w8, #1
	b.lt	LBB0_33
; %bb.23:                               ;   in Loop: Header=BB0_22 Depth=1
	mov	w23, #0
	ldr	w9, [x19, #28]
	b	LBB0_26
LBB0_24:                                ;   in Loop: Header=BB0_26 Depth=2
	ldr	w8, [x19, #32]
LBB0_25:                                ;   in Loop: Header=BB0_26 Depth=2
	add	w23, w23, #1
	cmp	w23, w8
	b.ge	LBB0_32
LBB0_26:                                ;   Parent Loop BB0_22 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_30 Depth 3
	cmp	w9, #1
	b.lt	LBB0_25
; %bb.27:                               ;   in Loop: Header=BB0_26 Depth=2
	mov	w24, #0
	b	LBB0_30
LBB0_28:                                ;   in Loop: Header=BB0_30 Depth=3
	add	w21, w21, #1
LBB0_29:                                ;   in Loop: Header=BB0_30 Depth=3
	add	w24, w24, #1
	ldr	w9, [x19, #28]
	cmp	w24, w9
	b.ge	LBB0_24
LBB0_30:                                ;   Parent Loop BB0_22 Depth=1
                                        ;     Parent Loop BB0_26 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	mov	x0, x19
	mov	x1, x20
	mov	x2, x24
	mov	x3, x23
	bl	_amdgpu_gfx_is_mec_queue_enabled
	cbz	w0, LBB0_29
; %bb.31:                               ;   in Loop: Header=BB0_30 Depth=3
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	mov	x3, x24
	mov	x4, x23
	bl	_gfx_v9_0_compute_ring_init
	cbz	w0, LBB0_28
	b	LBB0_36
LBB0_32:                                ;   in Loop: Header=BB0_22 Depth=1
	ldr	w9, [x19, #24]
LBB0_33:                                ;   in Loop: Header=BB0_22 Depth=1
	add	w20, w20, #1
	cmp	w20, w9
	b.lt	LBB0_22
LBB0_34:
Lloh34:
	adrp	x8, _GFX9_MEC_HPD_SIZE@GOTPAGE
Lloh35:
	ldr	x8, [x8, _GFX9_MEC_HPD_SIZE@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_amdgpu_gfx_kiq_init
	cbz	w0, LBB0_37
; %bb.35:
	mov	x22, x0
Lloh37:
	adrp	x0, l_.str.5@PAGE
Lloh38:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_11
LBB0_36:
	mov	x22, x0
	b	LBB0_12
LBB0_37:
	add	x2, x19, #16
	add	x1, x19, #20
	mov	x0, x19
	bl	_amdgpu_gfx_kiq_init_ring
	mov	x22, x0
	cbnz	w0, LBB0_12
; %bb.38:
	mov	x0, x19
	mov	w1, #4
	bl	_amdgpu_gfx_mqd_sw_init
	mov	x22, x0
	cbnz	w0, LBB0_12
; %bb.39:
	mov	w8, #32768
	str	w8, [x19, #12]
	mov	x0, x19
	bl	_gfx_v9_0_gpu_early_init
	mov	x22, x0
	cbnz	w0, LBB0_12
; %bb.40:
	mov	x0, x19
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_gfx_v9_0_ngg_init
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdrp	Lloh0, Lloh4
	.loh AdrpLdr	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpAdd	Lloh37, Lloh38
	.cfi_endproc
                                        ; -- End function
	.comm	_SOC15_IH_CLIENTID_GRBM_CP,4,2  ; @SOC15_IH_CLIENTID_GRBM_CP
	.comm	_GFX_9_0__SRCID__CP_EOP_INTERRUPT,4,2 ; @GFX_9_0__SRCID__CP_EOP_INTERRUPT
	.comm	_GFX_9_0__SRCID__CP_PRIV_REG_FAULT,4,2 ; @GFX_9_0__SRCID__CP_PRIV_REG_FAULT
	.comm	_GFX_9_0__SRCID__CP_PRIV_INSTR_FAULT,4,2 ; @GFX_9_0__SRCID__CP_PRIV_INSTR_FAULT
	.comm	_GFX_9_0__SRCID__CP_ECC_ERROR,4,2 ; @GFX_9_0__SRCID__CP_ECC_ERROR
	.comm	_GFX_9_0__SRCID__CP_FUE_ERROR,4,2 ; @GFX_9_0__SRCID__CP_FUE_ERROR
	.comm	_AMDGPU_GFX_NORMAL_MODE,4,2     ; @AMDGPU_GFX_NORMAL_MODE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to load gfx firmware!\n"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to init rlc BOs!\n"

l_.str.2:                               ; @.str.2
	.asciz	"Failed to init MEC BOs!\n"

l_.str.3:                               ; @.str.3
	.asciz	"gfx"

l_.str.4:                               ; @.str.4
	.asciz	"gfx_%d"

	.comm	_AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP,4,2 ; @AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP
	.comm	_GFX9_MEC_HPD_SIZE,4,2          ; @GFX9_MEC_HPD_SIZE
l_.str.5:                               ; @.str.5
	.asciz	"Failed to init KIQ BOs!\n"

	.no_dead_strip	_gfx_v9_0_sw_init
.subsections_via_symbols
