	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vega10_get_profiling_clk_mask
_vega10_get_profiling_clk_mask:         ## @vega10_get_profiling_clk_mask
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	8(%rdi), %r11
	movq	16(%r11), %r9
	movq	_VEGA10_UMD_PSTATE_GFXCLK_LEVEL@GOTPCREL(%rip), %r10
	movq	(%r10), %rax
	cmpq	%rax, (%r9)
	jbe	LBB0_4
## %bb.1:
	movq	8(%r11), %rbx
	movq	(%rbx), %rbx
	movq	_VEGA10_UMD_PSTATE_SOCCLK_LEVEL@GOTPCREL(%rip), %r15
	cmpq	(%r15), %rbx
	jle	LBB0_4
## %bb.2:
	movq	(%r11), %r12
	movq	(%r12), %rbx
	movq	_VEGA10_UMD_PSTATE_MCLK_LEVEL@GOTPCREL(%rip), %r14
	cmpq	(%r14), %rbx
	jbe	LBB0_4
## %bb.3:
	movq	%rax, (%rdx)
	movq	(%r15), %rax
	movq	%rax, (%r8)
	movq	(%r14), %rax
	movq	%rax, (%rcx)
	movq	8(%r9), %rax
	movq	(%r10), %rbx
	movl	(%rax,%rbx,4), %eax
	movl	%eax, 4(%rdi)
	movq	8(%r12), %rax
	movq	(%r14), %rbx
	movl	(%rax,%rbx,4), %eax
	movl	%eax, (%rdi)
LBB0_4:
	movq	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK@GOTPCREL(%rip), %rax
	cmpl	%esi, (%rax)
	jne	LBB0_6
## %bb.5:
	movq	$0, (%rdx)
	jmp	LBB0_10
LBB0_6:
	movq	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK@GOTPCREL(%rip), %rax
	cmpl	%esi, (%rax)
	jne	LBB0_8
## %bb.7:
	movq	$0, (%rcx)
	jmp	LBB0_10
LBB0_8:
	movq	_AMD_DPM_FORCED_LEVEL_PROFILE_PEAK@GOTPCREL(%rip), %rax
	cmpl	%esi, (%rax)
	jne	LBB0_10
## %bb.9:
	movq	(%r9), %rax
	decq	%rax
	movq	%rax, (%rdx)
	movq	8(%r11), %rax
	movq	(%rax), %rax
	decq	%rax
	movq	%rax, (%r8)
	movq	(%r11), %rax
	movq	(%rax), %rax
	decq	%rax
	movq	%rax, (%rcx)
LBB0_10:
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VEGA10_UMD_PSTATE_GFXCLK_LEVEL,8,3 ## @VEGA10_UMD_PSTATE_GFXCLK_LEVEL
	.comm	_VEGA10_UMD_PSTATE_SOCCLK_LEVEL,8,3 ## @VEGA10_UMD_PSTATE_SOCCLK_LEVEL
	.comm	_VEGA10_UMD_PSTATE_MCLK_LEVEL,8,3 ## @VEGA10_UMD_PSTATE_MCLK_LEVEL
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK,4,2 ## @AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK,4,2 ## @AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_PEAK,4,2 ## @AMD_DPM_FORCED_LEVEL_PROFILE_PEAK
	.no_dead_strip	_vega10_get_profiling_clk_mask
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vega10_get_profiling_clk_mask
_vega10_get_profiling_clk_mask:         ; @vega10_get_profiling_clk_mask
	.cfi_startproc
; %bb.0:
	ldr	x8, [x0, #8]
	ldr	x9, [x8, #16]
	ldr	x12, [x9]
Lloh0:
	adrp	x10, _VEGA10_UMD_PSTATE_GFXCLK_LEVEL@GOTPAGE
Lloh1:
	ldr	x10, [x10, _VEGA10_UMD_PSTATE_GFXCLK_LEVEL@GOTPAGEOFF]
	ldr	x11, [x10]
	cmp	x12, x11
	b.ls	LBB0_4
; %bb.1:
	ldr	x12, [x8, #8]
	ldr	x12, [x12]
Lloh2:
	adrp	x14, _VEGA10_UMD_PSTATE_SOCCLK_LEVEL@GOTPAGE
Lloh3:
	ldr	x14, [x14, _VEGA10_UMD_PSTATE_SOCCLK_LEVEL@GOTPAGEOFF]
	ldr	x13, [x14]
	cmp	x12, x13
	b.le	LBB0_4
; %bb.2:
	ldr	x12, [x8]
	ldr	x15, [x12]
Lloh4:
	adrp	x13, _VEGA10_UMD_PSTATE_MCLK_LEVEL@GOTPAGE
Lloh5:
	ldr	x13, [x13, _VEGA10_UMD_PSTATE_MCLK_LEVEL@GOTPAGEOFF]
	ldr	x16, [x13]
	cmp	x15, x16
	b.ls	LBB0_4
; %bb.3:
	str	x11, [x2]
	ldr	x11, [x14]
	str	x11, [x4]
	ldr	x11, [x13]
	str	x11, [x3]
	ldr	x11, [x9, #8]
	ldr	x10, [x10]
	ldr	w10, [x11, x10, lsl #2]
	ldr	x11, [x12, #8]
	ldr	x12, [x13]
	ldr	w11, [x11, x12, lsl #2]
	stp	w11, w10, [x0]
LBB0_4:
Lloh6:
	adrp	x10, _AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK@GOTPAGE
Lloh7:
	ldr	x10, [x10, _AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
	cmp	w10, w1
	b.ne	LBB0_6
; %bb.5:
	str	xzr, [x2]
	mov	w0, #0
	ret
LBB0_6:
Lloh9:
	adrp	x10, _AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK@GOTPAGE
Lloh10:
	ldr	x10, [x10, _AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	cmp	w10, w1
	b.ne	LBB0_8
; %bb.7:
	str	xzr, [x3]
	mov	w0, #0
	ret
LBB0_8:
Lloh12:
	adrp	x10, _AMD_DPM_FORCED_LEVEL_PROFILE_PEAK@GOTPAGE
Lloh13:
	ldr	x10, [x10, _AMD_DPM_FORCED_LEVEL_PROFILE_PEAK@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
	cmp	w10, w1
	b.ne	LBB0_10
; %bb.9:
	ldr	x9, [x9]
	sub	x9, x9, #1
	str	x9, [x2]
	ldp	x8, x9, [x8]
	ldr	x9, [x9]
	sub	x9, x9, #1
	str	x9, [x4]
	ldr	x8, [x8]
	sub	x8, x8, #1
	str	x8, [x3]
LBB0_10:
	mov	w0, #0
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_VEGA10_UMD_PSTATE_GFXCLK_LEVEL,8,3 ; @VEGA10_UMD_PSTATE_GFXCLK_LEVEL
	.comm	_VEGA10_UMD_PSTATE_SOCCLK_LEVEL,8,3 ; @VEGA10_UMD_PSTATE_SOCCLK_LEVEL
	.comm	_VEGA10_UMD_PSTATE_MCLK_LEVEL,8,3 ; @VEGA10_UMD_PSTATE_MCLK_LEVEL
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK,4,2 ; @AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK,4,2 ; @AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK
	.comm	_AMD_DPM_FORCED_LEVEL_PROFILE_PEAK,4,2 ; @AMD_DPM_FORCED_LEVEL_PROFILE_PEAK
	.no_dead_strip	_vega10_get_profiling_clk_mask
.subsections_via_symbols
