	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_uvd_send_msg
_radeon_uvd_send_msg:                   ## @radeon_uvd_send_msg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r14
	movl	%edx, %r12d
	movq	%rdi, %r15
	leaq	-48(%rbp), %rdx
	xorl	%ecx, %ecx
	movl	$64, %r8d
	callq	_radeon_ib_get
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_4
## %bb.1:
	movq	_UVD_GPCOM_VCPU_DATA0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	-48(%rbp), %rcx
	movl	%eax, (%rcx)
	movl	%r12d, 4(%rcx)
	movq	_UVD_GPCOM_VCPU_DATA1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	-48(%rbp), %rcx
	movl	%eax, 8(%rcx)
	movq	_UVD_GPCOM_VCPU_CMD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	-48(%rbp), %rcx
	movl	%eax, 16(%rcx)
	movl	$0, 20(%rcx)
	movq	_UVD_NO_OP@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	-48(%rbp), %rcx
	movl	%eax, 24(%rcx)
	movl	$0, 28(%rcx)
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	-48(%rbp), %rcx
	movl	%eax, 32(%rcx)
	movl	$0, 36(%rcx)
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	-48(%rbp), %rcx
	movl	%eax, 40(%rcx)
	movl	$0, 44(%rcx)
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	-48(%rbp), %rcx
	movl	%eax, 48(%rcx)
	movl	$0, 52(%rcx)
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	-48(%rbp), %rcx
	movl	%eax, 56(%rcx)
	movl	$0, 60(%rcx)
	movl	$16, -40(%rbp)
	leaq	-48(%rbp), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_radeon_ib_schedule
	movl	%eax, %ebx
	testq	%r14, %r14
	je	LBB0_3
## %bb.2:
	movl	-36(%rbp), %edi
	callq	_radeon_fence_ref
	movq	%rax, (%r14)
LBB0_3:
	leaq	-48(%rbp), %rsi
	movq	%r15, %rdi
	callq	_radeon_ib_free
LBB0_4:
	movl	%ebx, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_UVD_GPCOM_VCPU_DATA0,4,2       ## @UVD_GPCOM_VCPU_DATA0
	.comm	_UVD_GPCOM_VCPU_DATA1,4,2       ## @UVD_GPCOM_VCPU_DATA1
	.comm	_UVD_GPCOM_VCPU_CMD,4,2         ## @UVD_GPCOM_VCPU_CMD
	.comm	_UVD_NO_OP,4,2                  ## @UVD_NO_OP
	.no_dead_strip	_radeon_uvd_send_msg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_uvd_send_msg
_radeon_uvd_send_msg:                   ; @radeon_uvd_send_msg
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x3
	mov	x21, x2
	mov	x19, x0
	mov	x2, sp
	mov	x3, #0
	mov	w4, #64
	bl	_radeon_ib_get
	mov	x22, x0
	cbnz	w0, LBB0_4
; %bb.1:
Lloh0:
	adrp	x8, _UVD_GPCOM_VCPU_DATA0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _UVD_GPCOM_VCPU_DATA0@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [sp]
	stp	w0, w21, [x8]
Lloh3:
	adrp	x8, _UVD_GPCOM_VCPU_DATA1@GOTPAGE
Lloh4:
	ldr	x8, [x8, _UVD_GPCOM_VCPU_DATA1@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [sp]
	str	w0, [x8, #8]
Lloh6:
	adrp	x8, _UVD_GPCOM_VCPU_CMD@GOTPAGE
Lloh7:
	ldr	x8, [x8, _UVD_GPCOM_VCPU_CMD@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [sp]
	stp	w0, wzr, [x8, #16]
Lloh9:
	adrp	x21, _UVD_NO_OP@GOTPAGE
Lloh10:
	ldr	x21, [x21, _UVD_NO_OP@GOTPAGEOFF]
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [sp]
	stp	w0, wzr, [x8, #24]
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [sp]
	stp	w0, wzr, [x8, #32]
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [sp]
	stp	w0, wzr, [x8, #40]
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [sp]
	stp	w0, wzr, [x8, #48]
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET0
	ldr	x8, [sp]
	stp	w0, wzr, [x8, #56]
	mov	w8, #16
	str	w8, [sp, #8]
	mov	x1, sp
	mov	x0, x19
	mov	x2, #0
	mov	w3, #0
	bl	_radeon_ib_schedule
	mov	x22, x0
	cbz	x20, LBB0_3
; %bb.2:
	ldr	w0, [sp, #12]
	bl	_radeon_fence_ref
	str	x0, [x20]
LBB0_3:
	mov	x1, sp
	mov	x0, x19
	bl	_radeon_ib_free
LBB0_4:
	mov	x0, x22
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_UVD_GPCOM_VCPU_DATA0,4,2       ; @UVD_GPCOM_VCPU_DATA0
	.comm	_UVD_GPCOM_VCPU_DATA1,4,2       ; @UVD_GPCOM_VCPU_DATA1
	.comm	_UVD_GPCOM_VCPU_CMD,4,2         ; @UVD_GPCOM_VCPU_CMD
	.comm	_UVD_NO_OP,4,2                  ; @UVD_NO_OP
	.no_dead_strip	_radeon_uvd_send_msg
.subsections_via_symbols
