	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function socfpga_fpga_ops_configure_write
_socfpga_fpga_ops_configure_write:      ## @socfpga_fpga_ops_configure_write
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	testq	%rdx, %rdx
	je	LBB0_3
## %bb.1:
	movq	%rdx, %r12
	movq	%rsi, %rbx
	movq	(%rdi), %r15
	xorl	%r14d, %r14d
	cmpq	$4, %rdx
	jb	LBB0_2
## %bb.4:
	leaq	-4(%r12), %r13
	shrq	$2, %r13
	incq	%r13
	xorl	%r14d, %r14d
	movq	%r13, -48(%rbp)                 ## 8-byte Spill
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r14), %esi
	movq	%r15, %rdi
	callq	_socfpga_fpga_data_writel
	addq	$4, %r14
	decq	%r13
	jne	LBB0_5
## %bb.6:
	subq	%r14, %r12
	xorl	%r14d, %r14d
	movq	-48(%rbp), %rdx                 ## 8-byte Reload
	cmpq	$3, %r12
	ja	LBB0_13
LBB0_8:
	leaq	LJTI0_0(%rip), %rax
	movslq	(%rax,%r12,4), %rcx
	addq	%rax, %rcx
	jmpq	*%rcx
LBB0_12:
	movzbl	(%rbx,%rdx,4), %esi
	jmp	LBB0_11
LBB0_3:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_2:
	xorl	%edx, %edx
	cmpq	$3, %r12
	jbe	LBB0_8
LBB0_13:
	movq	_EFAULT@GOTPCREL(%rip), %rax
LBB0_14:
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
	jmp	LBB0_15
LBB0_10:
	movzwl	(%rbx,%rdx,4), %esi
	jmp	LBB0_11
LBB0_9:
	movl	$16777215, %esi                 ## imm = 0xFFFFFF
	andl	(%rbx,%rdx,4), %esi
LBB0_11:
	movq	%r15, %rdi
	callq	_socfpga_fpga_data_writel
LBB0_15:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_12, LBB0_12-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
LJTI0_0:
	.long	L0_0_set_15
	.long	L0_0_set_12
	.long	L0_0_set_10
	.long	L0_0_set_9
	.end_data_region
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_EFAULT,4,2                     ## @EFAULT
	.no_dead_strip	_socfpga_fpga_ops_configure_write
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function socfpga_fpga_ops_configure_write
_socfpga_fpga_ops_configure_write:      ; @socfpga_fpga_ops_configure_write
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	cbz	x2, LBB0_7
; %bb.1:
	mov	x21, x2
	mov	x20, x1
	ldr	x19, [x0]
	subs	x8, x2, #4
	b.lo	LBB0_8
; %bb.2:
	lsr	x8, x8, #2
	add	x22, x8, #1
	mov	x23, x20
	mov	x24, x22
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x23], #4
	mov	x0, x19
	bl	_socfpga_fpga_data_writel
	sub	x21, x21, #4
	subs	x24, x24, #1
	b.ne	LBB0_3
; %bb.4:
	cmp	x21, #3
	b.hi	LBB0_9
LBB0_5:
	mov	w0, #0
Lloh0:
	adrp	x8, lJTI0_0@PAGE
Lloh1:
	add	x8, x8, lJTI0_0@PAGEOFF
	adr	x9, LBB0_6
	ldrb	w10, [x8, x21]
	add	x9, x9, x10, lsl #2
	br	x9
LBB0_6:
	lsl	x8, x22, #2
	ldrb	w1, [x20, x8]
	b	LBB0_13
LBB0_7:
Lloh2:
	adrp	x8, _EINVAL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_10
LBB0_8:
	mov	x22, #0
	cmp	x21, #3
	b.ls	LBB0_5
LBB0_9:
Lloh4:
	adrp	x8, _EFAULT@GOTPAGE
Lloh5:
	ldr	x8, [x8, _EFAULT@GOTPAGEOFF]
LBB0_10:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_14
LBB0_11:
	lsl	x8, x22, #2
	ldrh	w1, [x20, x8]
	b	LBB0_13
LBB0_12:
	ldr	w8, [x20, x22, lsl #2]
	and	w1, w8, #0xffffff
LBB0_13:
	mov	x0, x19
	bl	_socfpga_fpga_data_writel
	mov	w0, #0
LBB0_14:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh4, Lloh5
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_14-LBB0_6)>>2
	.byte	(LBB0_6-LBB0_6)>>2
	.byte	(LBB0_11-LBB0_6)>>2
	.byte	(LBB0_12-LBB0_6)>>2
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_EFAULT,4,2                     ; @EFAULT
	.no_dead_strip	_socfpga_fpga_ops_configure_write
.subsections_via_symbols
