	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_firmware_info
_amdgpu_firmware_info:                  ## @amdgpu_firmware_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	(%rsi), %eax
	addl	$-128, %eax
	cmpl	$17, %eax
	ja	LBB0_21
## %bb.1:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_2:
	movl	128(%rdx), %eax
	jmp	LBB0_25
LBB0_3:
	movl	140(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	136(%rdx), %eax
	jmp	LBB0_29
LBB0_4:
	movl	132(%rdx), %eax
	jmp	LBB0_25
LBB0_5:
	movl	4(%rsi), %eax
	cmpl	$2, %eax
	jge	LBB0_21
## %bb.6:
	movl	24(%rdx), %ecx
	movl	%ecx, 4(%rdi)
	testl	%eax, %eax
	je	LBB0_28
## %bb.7:
	movl	20(%rdx), %eax
	jmp	LBB0_29
LBB0_8:
	movl	16(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	12(%rdx), %eax
	jmp	LBB0_29
LBB0_9:
	movl	48(%rdx), %eax
	jmp	LBB0_25
LBB0_10:
	movslq	4(%rsi), %rax
	cmpl	32(%rdx), %eax
	jge	LBB0_21
## %bb.11:
	movq	40(%rdx), %rcx
	movl	4(%rcx,%rax,8), %edx
	movl	%edx, 4(%rdi)
	movl	(%rcx,%rax,8), %eax
	jmp	LBB0_29
LBB0_12:
	movl	124(%rdx), %eax
	jmp	LBB0_25
LBB0_13:
	movl	72(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	68(%rdx), %eax
	jmp	LBB0_29
LBB0_14:
	movl	80(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	76(%rdx), %eax
	jmp	LBB0_29
LBB0_15:
	movl	88(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	84(%rdx), %eax
	jmp	LBB0_29
LBB0_16:
	movl	96(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	92(%rdx), %eax
	jmp	LBB0_29
LBB0_17:
	movl	112(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	108(%rdx), %eax
	jmp	LBB0_29
LBB0_18:
	movl	4(%rsi), %eax
	cmpl	$1, %eax
	je	LBB0_27
## %bb.19:
	testl	%eax, %eax
	jne	LBB0_21
## %bb.20:
	movl	64(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	60(%rdx), %eax
	jmp	LBB0_29
LBB0_21:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	popq	%rbp
	retq
LBB0_22:
	movl	120(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	116(%rdx), %eax
	jmp	LBB0_29
LBB0_23:
	movl	104(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	100(%rdx), %eax
	jmp	LBB0_29
LBB0_24:
	movl	(%rdx), %eax
LBB0_25:
	movl	%eax, 4(%rdi)
	movl	$0, (%rdi)
	jmp	LBB0_30
LBB0_26:
	movl	8(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	4(%rdx), %eax
	jmp	LBB0_29
LBB0_27:
	movl	56(%rdx), %eax
	movl	%eax, 4(%rdi)
	movl	52(%rdx), %eax
	jmp	LBB0_29
LBB0_28:
	movl	28(%rdx), %eax
LBB0_29:
	movl	%eax, (%rdi)
LBB0_30:
	xorl	%eax, %eax
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_12, LBB0_12-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_17, LBB0_17-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_22, LBB0_22-LJTI0_0
.set L0_0_set_23, LBB0_23-LJTI0_0
.set L0_0_set_24, LBB0_24-LJTI0_0
.set L0_0_set_26, LBB0_26-LJTI0_0
LJTI0_0:
	.long	L0_0_set_2
	.long	L0_0_set_3
	.long	L0_0_set_4
	.long	L0_0_set_5
	.long	L0_0_set_8
	.long	L0_0_set_9
	.long	L0_0_set_10
	.long	L0_0_set_12
	.long	L0_0_set_13
	.long	L0_0_set_14
	.long	L0_0_set_15
	.long	L0_0_set_16
	.long	L0_0_set_17
	.long	L0_0_set_18
	.long	L0_0_set_22
	.long	L0_0_set_23
	.long	L0_0_set_24
	.long	L0_0_set_26
	.end_data_region
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_amdgpu_firmware_info
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_firmware_info
_amdgpu_firmware_info:                  ; @amdgpu_firmware_info
	.cfi_startproc
; %bb.0:
	ldr	w9, [x1]
	sub	w9, w9, #128
	cmp	w9, #17
	b.hi	LBB0_21
; %bb.1:
	mov	x8, x0
Lloh0:
	adrp	x10, lJTI0_0@PAGE
Lloh1:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_2
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_2:
	mov	w0, #0
	ldr	w9, [x2, #128]
	stp	wzr, w9, [x8]
	ret
LBB0_3:
	mov	w0, #0
	ldr	d0, [x2, #136]
	str	d0, [x8]
	ret
LBB0_4:
	mov	w0, #0
	ldr	w9, [x2, #132]
	stp	wzr, w9, [x8]
	ret
LBB0_5:
	ldr	w9, [x1, #4]
	cmp	w9, #2
	b.ge	LBB0_21
; %bb.6:
	ldr	w10, [x2, #24]
	str	w10, [x8, #4]
	mov	w0, #0
	cbz	w9, LBB0_27
; %bb.7:
	ldr	w9, [x2, #20]
	str	w9, [x8]
	ret
LBB0_8:
	mov	w0, #0
	ldur	d0, [x2, #12]
	str	d0, [x8]
	ret
LBB0_9:
	mov	w0, #0
	ldr	w9, [x2, #48]
	stp	wzr, w9, [x8]
	ret
LBB0_10:
	ldrsw	x9, [x1, #4]
	ldr	w10, [x2, #32]
	cmp	w9, w10
	b.ge	LBB0_21
; %bb.11:
	mov	w0, #0
	ldr	x10, [x2, #40]
	ldr	d0, [x10, x9, lsl #3]
	str	d0, [x8]
	ret
LBB0_12:
	mov	w0, #0
	ldr	w9, [x2, #124]
	stp	wzr, w9, [x8]
	ret
LBB0_13:
	mov	w0, #0
	ldur	d0, [x2, #68]
	str	d0, [x8]
	ret
LBB0_14:
	mov	w0, #0
	ldur	d0, [x2, #76]
	str	d0, [x8]
	ret
LBB0_15:
	mov	w0, #0
	ldur	d0, [x2, #84]
	str	d0, [x8]
	ret
LBB0_16:
	mov	w0, #0
	ldur	d0, [x2, #92]
	str	d0, [x8]
	ret
LBB0_17:
	mov	w0, #0
	ldur	d0, [x2, #108]
	str	d0, [x8]
	ret
LBB0_18:
	ldr	w9, [x1, #4]
	cmp	w9, #1
	b.eq	LBB0_26
; %bb.19:
	cbnz	w9, LBB0_21
; %bb.20:
	mov	w0, #0
	ldur	d0, [x2, #60]
	str	d0, [x8]
	ret
LBB0_21:
Lloh2:
	adrp	x8, _EINVAL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	neg	w0, w8
	ret
LBB0_22:
	mov	w0, #0
	ldur	d0, [x2, #116]
	str	d0, [x8]
	ret
LBB0_23:
	mov	w0, #0
	ldur	d0, [x2, #100]
	str	d0, [x8]
	ret
LBB0_24:
	mov	w0, #0
	ldr	w9, [x2]
	stp	wzr, w9, [x8]
	ret
LBB0_25:
	mov	w0, #0
	ldur	d0, [x2, #4]
	str	d0, [x8]
	ret
LBB0_26:
	mov	w0, #0
	ldur	d0, [x2, #52]
	str	d0, [x8]
	ret
LBB0_27:
	ldr	w9, [x2, #28]
	str	w9, [x8]
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_3-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_8-LBB0_2)>>2
	.byte	(LBB0_9-LBB0_2)>>2
	.byte	(LBB0_10-LBB0_2)>>2
	.byte	(LBB0_12-LBB0_2)>>2
	.byte	(LBB0_13-LBB0_2)>>2
	.byte	(LBB0_14-LBB0_2)>>2
	.byte	(LBB0_15-LBB0_2)>>2
	.byte	(LBB0_16-LBB0_2)>>2
	.byte	(LBB0_17-LBB0_2)>>2
	.byte	(LBB0_18-LBB0_2)>>2
	.byte	(LBB0_22-LBB0_2)>>2
	.byte	(LBB0_23-LBB0_2)>>2
	.byte	(LBB0_24-LBB0_2)>>2
	.byte	(LBB0_25-LBB0_2)>>2
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_amdgpu_firmware_info
.subsections_via_symbols
