	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vi_set_uvd_clock
_vi_set_uvd_clock:                      ## @vi_set_uvd_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r14d
	movl	%edx, %ebx
	movl	%esi, %edx
	movq	%rdi, %r15
	movq	_COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%r13d, %r13d
	leaq	-48(%rbp), %r8
	xorl	%ecx, %ecx
	callq	_amdgpu_atombios_get_clock_dividers
	testl	%eax, %eax
	jne	LBB0_11
## %bb.1:
	movl	%ebx, %edi
	callq	_RREG32_SMC
	movq	_AMD_IS_APU@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	_CG_DCLK_CNTL__DCLK_DIVIDER_MASK@GOTPCREL(%rip), %rcx
	andl	(%r15), %edx
	jne	LBB0_3
## %bb.2:
	movq	_CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r13d
LBB0_3:
	orl	(%rcx), %r13d
	notl	%r13d
	andl	%r13d, %eax
	orl	-48(%rbp), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32_SMC
	movl	$100, %ebx
	movq	_CG_DCLK_STATUS__DCLK_STATUS_MASK@GOTPCREL(%rip), %r13
	jmp	LBB0_6
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_6 Depth=1
	testl	%eax, (%r13)
	jne	LBB0_10
LBB0_5:                                 ##   in Loop: Header=BB0_6 Depth=1
	movl	$10, %edi
	callq	_mdelay
	decl	%ebx
	je	LBB0_9
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movl	%r14d, %edi
	callq	_RREG32_SMC
	movl	(%r12), %ecx
	testl	%ecx, (%r15)
	je	LBB0_4
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=1
	testl	$65536, %eax                    ## imm = 0x10000
	je	LBB0_5
LBB0_10:
	xorl	%eax, %eax
	jmp	LBB0_11
LBB0_9:
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_11:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK,4,2 ## @COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK
	.comm	_AMD_IS_APU,4,2                 ## @AMD_IS_APU
	.comm	_CG_DCLK_CNTL__DCLK_DIVIDER_MASK,4,2 ## @CG_DCLK_CNTL__DCLK_DIVIDER_MASK
	.comm	_CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK,4,2 ## @CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK
	.comm	_CG_DCLK_STATUS__DCLK_STATUS_MASK,4,2 ## @CG_DCLK_STATUS__DCLK_STATUS_MASK
	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
	.no_dead_strip	_vi_set_uvd_clock
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vi_set_uvd_clock
_vi_set_uvd_clock:                      ; @vi_set_uvd_clock
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x3
	mov	x21, x2
	mov	x2, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x4, sp, #8
	mov	w3, #0
	bl	_amdgpu_atombios_get_clock_dividers
	cbnz	w0, LBB0_8
; %bb.1:
	mov	x0, x21
	bl	_RREG32_SMC
	ldr	w8, [x20]
Lloh3:
	adrp	x22, _AMD_IS_APU@GOTPAGE
Lloh4:
	ldr	x22, [x22, _AMD_IS_APU@GOTPAGEOFF]
	ldr	w9, [x22]
Lloh5:
	adrp	x10, _CG_DCLK_CNTL__DCLK_DIVIDER_MASK@GOTPAGE
Lloh6:
	ldr	x10, [x10, _CG_DCLK_CNTL__DCLK_DIVIDER_MASK@GOTPAGEOFF]
Lloh7:
	ldr	w10, [x10]
Lloh8:
	adrp	x11, _CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK@GOTPAGE
Lloh9:
	ldr	x11, [x11, _CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w11, [x11]
	tst	w9, w8
	csel	w8, w11, wzr, eq
	orr	w8, w8, w10
	bic	w8, w0, w8
	ldr	w9, [sp, #8]
	orr	w1, w8, w9
	mov	x0, x21
	bl	_WREG32_SMC
	mov	w21, #100
Lloh11:
	adrp	x23, _CG_DCLK_STATUS__DCLK_STATUS_MASK@GOTPAGE
Lloh12:
	ldr	x23, [x23, _CG_DCLK_STATUS__DCLK_STATUS_MASK@GOTPAGEOFF]
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	w8, [x23]
	tst	w8, w0
	b.ne	LBB0_6
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	mov	w0, #10
	bl	_mdelay
	subs	w21, w21, #1
	b.eq	LBB0_7
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	bl	_RREG32_SMC
	ldr	w8, [x20]
	ldr	w9, [x22]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	tbz	w0, #16, LBB0_3
LBB0_6:
	mov	w0, #0
	b	LBB0_8
LBB0_7:
Lloh13:
	adrp	x8, _ETIMEDOUT@GOTPAGE
Lloh14:
	ldr	x8, [x8, _ETIMEDOUT@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_8:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.cfi_endproc
                                        ; -- End function
	.comm	_COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK,4,2 ; @COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK
	.comm	_AMD_IS_APU,4,2                 ; @AMD_IS_APU
	.comm	_CG_DCLK_CNTL__DCLK_DIVIDER_MASK,4,2 ; @CG_DCLK_CNTL__DCLK_DIVIDER_MASK
	.comm	_CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK,4,2 ; @CG_DCLK_CNTL__DCLK_DIR_CNTL_EN_MASK
	.comm	_CG_DCLK_STATUS__DCLK_STATUS_MASK,4,2 ; @CG_DCLK_STATUS__DCLK_STATUS_MASK
	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
	.no_dead_strip	_vi_set_uvd_clock
.subsections_via_symbols
