	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gen6_set_rps
_gen6_set_rps:                          ## @gen6_set_rps
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r13
	cmpq	%rsi, (%rdi)
	je	LBB0_9
## %bb.1:
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	_gen6_set_rps_thresholds
	movq	%r13, %rdi
	callq	_INTEL_GEN
	cmpl	$9, %eax
	jl	LBB0_4
## %bb.2:
	movq	_GEN6_RPNSWREQ@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	%r14, %rdi
	callq	_GEN9_FREQUENCY
	jmp	LBB0_3
LBB0_4:
	movq	%r13, %rdi
	callq	_IS_HASWELL
	testq	%rax, %rax
	jne	LBB0_6
## %bb.5:
	movq	%r13, %rdi
	callq	_IS_BROADWELL
	testq	%rax, %rax
	je	LBB0_7
LBB0_6:
	movq	_GEN6_RPNSWREQ@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	%r14, %rdi
	callq	_HSW_FREQUENCY
LBB0_3:
	movl	%r15d, %edi
	movl	%eax, %esi
LBB0_8:
	callq	_I915_WRITE
LBB0_9:
	movq	_GEN6_RP_INTERRUPT_LIMITS@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	_intel_rps_limits
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	_GEN6_PMINTRMSK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	_gen6_rps_pm_mask
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	%r14, (%r13)
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	_intel_gpu_freq
	movl	%eax, %edi
	callq	_trace_intel_gpu_freq_change
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_7:
	movq	_GEN6_RPNSWREQ@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	%r14, %rdi
	callq	_GEN6_FREQUENCY
	movl	%eax, %r12d
	xorl	%edi, %edi
	callq	_GEN6_OFFSET
	orl	%eax, %r12d
	movq	_GEN6_AGGRESSIVE_TURBO@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movl	%r15d, %edi
	movl	%r12d, %esi
	jmp	LBB0_8
	.cfi_endproc
                                        ## -- End function
	.comm	_GEN6_RPNSWREQ,4,2              ## @GEN6_RPNSWREQ
	.comm	_GEN6_AGGRESSIVE_TURBO,4,2      ## @GEN6_AGGRESSIVE_TURBO
	.comm	_GEN6_RP_INTERRUPT_LIMITS,4,2   ## @GEN6_RP_INTERRUPT_LIMITS
	.comm	_GEN6_PMINTRMSK,4,2             ## @GEN6_PMINTRMSK
	.no_dead_strip	_gen6_set_rps
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gen6_set_rps
_gen6_set_rps:                          ; @gen6_set_rps
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
	ldr	x8, [x0]
	cmp	x8, x1
	b.eq	LBB0_8
; %bb.1:
	mov	x0, x20
	mov	x1, x19
	bl	_gen6_set_rps_thresholds
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #9
	b.lt	LBB0_3
; %bb.2:
Lloh0:
	adrp	x8, _GEN6_RPNSWREQ@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GEN6_RPNSWREQ@GOTPAGEOFF]
Lloh2:
	ldr	w21, [x8]
	mov	x0, x19
	bl	_GEN9_FREQUENCY
	b	LBB0_6
LBB0_3:
	mov	x0, x20
	bl	_IS_HASWELL
	cbnz	x0, LBB0_5
; %bb.4:
	mov	x0, x20
	bl	_IS_BROADWELL
	cbz	x0, LBB0_9
LBB0_5:
Lloh3:
	adrp	x8, _GEN6_RPNSWREQ@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GEN6_RPNSWREQ@GOTPAGEOFF]
Lloh5:
	ldr	w21, [x8]
	mov	x0, x19
	bl	_HSW_FREQUENCY
LBB0_6:
	mov	x1, x0
LBB0_7:
	mov	x0, x21
	bl	_I915_WRITE
LBB0_8:
Lloh6:
	adrp	x8, _GEN6_RP_INTERRUPT_LIMITS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _GEN6_RP_INTERRUPT_LIMITS@GOTPAGEOFF]
Lloh8:
	ldr	w21, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_intel_rps_limits
	mov	x1, x0
	mov	x0, x21
	bl	_I915_WRITE
Lloh9:
	adrp	x8, _GEN6_PMINTRMSK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _GEN6_PMINTRMSK@GOTPAGEOFF]
Lloh11:
	ldr	w21, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_gen6_rps_pm_mask
	mov	x1, x0
	mov	x0, x21
	bl	_I915_WRITE
	str	x19, [x20]
	mov	x0, x20
	mov	x1, x19
	bl	_intel_gpu_freq
	bl	_trace_intel_gpu_freq_change
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_9:
Lloh12:
	adrp	x8, _GEN6_RPNSWREQ@GOTPAGE
Lloh13:
	ldr	x8, [x8, _GEN6_RPNSWREQ@GOTPAGEOFF]
Lloh14:
	ldr	w21, [x8]
	mov	x0, x19
	bl	_GEN6_FREQUENCY
	mov	x22, x0
	mov	w0, #0
	bl	_GEN6_OFFSET
	orr	w8, w0, w22
Lloh15:
	adrp	x9, _GEN6_AGGRESSIVE_TURBO@GOTPAGE
Lloh16:
	ldr	x9, [x9, _GEN6_AGGRESSIVE_TURBO@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w1, w8, w9
	b	LBB0_7
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_GEN6_RPNSWREQ,4,2              ; @GEN6_RPNSWREQ
	.comm	_GEN6_AGGRESSIVE_TURBO,4,2      ; @GEN6_AGGRESSIVE_TURBO
	.comm	_GEN6_RP_INTERRUPT_LIMITS,4,2   ; @GEN6_RP_INTERRUPT_LIMITS
	.comm	_GEN6_PMINTRMSK,4,2             ; @GEN6_PMINTRMSK
	.no_dead_strip	_gen6_set_rps
.subsections_via_symbols
