	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dw_hdmi_rockchip_mode_valid
_dw_hdmi_rockchip_mode_valid:           ## @dw_hdmi_rockchip_mode_valid
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_rockchip_mpll_cfg@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movslq	(%rsi), %rcx
	imulq	$1000, %rcx, %rcx               ## imm = 0x3E8
	.p2align	4, 0x90
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%rax), %rdx
	cmpq	$-1, %rdx
	je	LBB0_3
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	addq	$8, %rax
	cmpq	%rcx, %rdx
	jne	LBB0_1
LBB0_3:
	cmpq	$-1, %rdx
	jne	LBB0_4
## %bb.5:
	movq	_MODE_BAD@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_4:
	movq	_MODE_OK@GOTPCREL(%rip), %rax
LBB0_6:
	movl	(%rax), %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_rockchip_mpll_cfg,8,3          ## @rockchip_mpll_cfg
	.comm	_MODE_OK,4,2                    ## @MODE_OK
	.comm	_MODE_BAD,4,2                   ## @MODE_BAD
	.no_dead_strip	_dw_hdmi_rockchip_mode_valid
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dw_hdmi_rockchip_mode_valid
_dw_hdmi_rockchip_mode_valid:           ; @dw_hdmi_rockchip_mode_valid
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _rockchip_mpll_cfg@GOTPAGE
Lloh1:
	ldr	x8, [x8, _rockchip_mpll_cfg@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	ldrsw	x9, [x1]
	mov	w10, #1000
	mul	x9, x9, x10
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x10, [x8], #8
	cmn	x10, #1
	ccmp	x10, x9, #4, ne
	b.ne	LBB0_1
; %bb.2:
Lloh3:
	adrp	x8, _MODE_OK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MODE_OK@GOTPAGEOFF]
Lloh5:
	adrp	x9, _MODE_BAD@GOTPAGE
Lloh6:
	ldr	x9, [x9, _MODE_BAD@GOTPAGEOFF]
	cmn	x10, #1
	csel	x8, x9, x8, eq
	ldr	w0, [x8]
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_rockchip_mpll_cfg,8,3          ; @rockchip_mpll_cfg
	.comm	_MODE_OK,4,2                    ; @MODE_OK
	.comm	_MODE_BAD,4,2                   ; @MODE_BAD
	.no_dead_strip	_dw_hdmi_rockchip_mode_valid
.subsections_via_symbols
