	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ivb_init_clock_gating
_ivb_init_clock_gating:                 ## @ivb_init_clock_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_ILK_DSPCLK_GATE_D@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_ILK_VRHUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_I915_WRITE
	movq	__3D_CHICKEN3@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	__3D_CHICKEN_SF_DISABLE_OBJEND_CULL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	_IVB_CHICKEN3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE@GOTPCREL(%rip), %rax
	movq	_CHICKEN3_DGMG_DONE_FIX_DISABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	callq	_I915_WRITE
	movq	%r14, %rdi
	callq	_IS_IVB_GT1
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_GEN7_HALF_SLICE_CHICKEN1@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
LBB0_2:
	movq	_CACHE_MODE_0_GEN7@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_RC_OP_FLUSH_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_DISABLE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	_GEN7_COMMON_SLICE_CHICKEN1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_I915_WRITE
	movq	_GEN7_L3CNTLREG1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_GEN7_WA_FOR_GEN7_L3_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_I915_WRITE
	movq	_GEN7_L3_CHICKEN_MODE_REGISTER@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_GEN7_WA_L3_CHICKEN_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_I915_WRITE
	movq	%r14, %rdi
	callq	_IS_IVB_GT1
	movq	%rax, %r15
	movq	_GEN7_ROW_CHICKEN2@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_DOP_CLOCK_GATING_DISABLE@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	testq	%r15, %r15
	jne	LBB0_4
## %bb.3:
	movq	_GEN7_ROW_CHICKEN2_GT2@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	(%r12), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
LBB0_4:
	movq	_GEN7_L3SQCREG4@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_I915_READ
	movq	_L3SQ_URB_READ_CAM_MATCH_DISABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	%ebx, %edi
	callq	_I915_WRITE
	movq	_GEN6_UCGCTL2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_GEN6_RCZUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_I915_WRITE
	movq	_GEN7_SQ_CHICKEN_MBCUNIT_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_I915_READ
	movq	_GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	%r14, %rdi
	callq	_g4x_disable_trickle_feed
	movq	%r14, %rdi
	callq	_gen7_setup_fixed_func_scheduler
	movq	_CACHE_MODE_1@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_PIXEL_SUBSPAN_COLLECT_OPT_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	_GEN7_GT_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_GEN6_WIZ_HASHING_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_GEN6_WIZ_HASHING_16x4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	__MASKED_FIELD
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	_GEN6_MBCUNIT_SNPCR@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_I915_READ
	movq	_GEN6_MBC_SNPCR_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	_GEN6_MBC_SNPCR_MED@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movl	(%rbx), %edi
	callq	_I915_WRITE
	movq	%r14, %rdi
	callq	_HAS_PCH_NOP
	testl	%eax, %eax
	jne	LBB0_6
## %bb.5:
	movq	%r14, %rdi
	callq	_cpt_init_clock_gating
LBB0_6:
	movq	%r14, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_gen6_check_mch_setup           ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ILK_DSPCLK_GATE_D,4,2          ## @ILK_DSPCLK_GATE_D
	.comm	_ILK_VRHUNIT_CLOCK_GATE_DISABLE,4,2 ## @ILK_VRHUNIT_CLOCK_GATE_DISABLE
	.comm	__3D_CHICKEN3,4,2               ## @_3D_CHICKEN3
	.comm	__3D_CHICKEN_SF_DISABLE_OBJEND_CULL,4,2 ## @_3D_CHICKEN_SF_DISABLE_OBJEND_CULL
	.comm	_IVB_CHICKEN3,4,2               ## @IVB_CHICKEN3
	.comm	_CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE,4,2 ## @CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE
	.comm	_CHICKEN3_DGMG_DONE_FIX_DISABLE,4,2 ## @CHICKEN3_DGMG_DONE_FIX_DISABLE
	.comm	_GEN7_HALF_SLICE_CHICKEN1,4,2   ## @GEN7_HALF_SLICE_CHICKEN1
	.comm	_GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE,4,2 ## @GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE
	.comm	_CACHE_MODE_0_GEN7,4,2          ## @CACHE_MODE_0_GEN7
	.comm	_RC_OP_FLUSH_ENABLE,4,2         ## @RC_OP_FLUSH_ENABLE
	.comm	_GEN7_COMMON_SLICE_CHICKEN1,4,2 ## @GEN7_COMMON_SLICE_CHICKEN1
	.comm	_GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC,4,2 ## @GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC
	.comm	_GEN7_L3CNTLREG1,4,2            ## @GEN7_L3CNTLREG1
	.comm	_GEN7_WA_FOR_GEN7_L3_CONTROL,4,2 ## @GEN7_WA_FOR_GEN7_L3_CONTROL
	.comm	_GEN7_L3_CHICKEN_MODE_REGISTER,4,2 ## @GEN7_L3_CHICKEN_MODE_REGISTER
	.comm	_GEN7_WA_L3_CHICKEN_MODE,4,2    ## @GEN7_WA_L3_CHICKEN_MODE
	.comm	_GEN7_ROW_CHICKEN2,4,2          ## @GEN7_ROW_CHICKEN2
	.comm	_DOP_CLOCK_GATING_DISABLE,4,2   ## @DOP_CLOCK_GATING_DISABLE
	.comm	_GEN7_ROW_CHICKEN2_GT2,4,2      ## @GEN7_ROW_CHICKEN2_GT2
	.comm	_GEN7_L3SQCREG4,4,2             ## @GEN7_L3SQCREG4
	.comm	_L3SQ_URB_READ_CAM_MATCH_DISABLE,4,2 ## @L3SQ_URB_READ_CAM_MATCH_DISABLE
	.comm	_GEN6_UCGCTL2,4,2               ## @GEN6_UCGCTL2
	.comm	_GEN6_RCZUNIT_CLOCK_GATE_DISABLE,4,2 ## @GEN6_RCZUNIT_CLOCK_GATE_DISABLE
	.comm	_GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,4,2 ## @GEN7_SQ_CHICKEN_MBCUNIT_CONFIG
	.comm	_GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB,4,2 ## @GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB
	.comm	_CACHE_MODE_1,4,2               ## @CACHE_MODE_1
	.comm	_PIXEL_SUBSPAN_COLLECT_OPT_DISABLE,4,2 ## @PIXEL_SUBSPAN_COLLECT_OPT_DISABLE
	.comm	_GEN7_GT_MODE,4,2               ## @GEN7_GT_MODE
	.comm	_GEN6_WIZ_HASHING_MASK,4,2      ## @GEN6_WIZ_HASHING_MASK
	.comm	_GEN6_WIZ_HASHING_16x4,4,2      ## @GEN6_WIZ_HASHING_16x4
	.comm	_GEN6_MBCUNIT_SNPCR,4,2         ## @GEN6_MBCUNIT_SNPCR
	.comm	_GEN6_MBC_SNPCR_MASK,4,2        ## @GEN6_MBC_SNPCR_MASK
	.comm	_GEN6_MBC_SNPCR_MED,4,2         ## @GEN6_MBC_SNPCR_MED
	.comm	_HIZ_RAW_STALL_OPT_DISABLE,4,2  ## @HIZ_RAW_STALL_OPT_DISABLE
	.no_dead_strip	_ivb_init_clock_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ivb_init_clock_gating
_ivb_init_clock_gating:                 ; @ivb_init_clock_gating
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _ILK_DSPCLK_GATE_D@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ILK_DSPCLK_GATE_D@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _ILK_VRHUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ILK_VRHUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_I915_WRITE
Lloh6:
	adrp	x8, __3D_CHICKEN3@GOTPAGE
Lloh7:
	ldr	x8, [x8, __3D_CHICKEN3@GOTPAGEOFF]
Lloh8:
	ldr	w20, [x8]
Lloh9:
	adrp	x8, __3D_CHICKEN_SF_DISABLE_OBJEND_CULL@GOTPAGE
Lloh10:
	ldr	x8, [x8, __3D_CHICKEN_SF_DISABLE_OBJEND_CULL@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	__MASKED_BIT_ENABLE
	mov	x1, x0
	mov	x0, x20
	bl	_I915_WRITE
Lloh12:
	adrp	x8, _IVB_CHICKEN3@GOTPAGE
Lloh13:
	ldr	x8, [x8, _IVB_CHICKEN3@GOTPAGEOFF]
Lloh14:
	adrp	x9, _CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE@GOTPAGE
Lloh15:
	ldr	x9, [x9, _CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
Lloh17:
	ldr	w8, [x9]
Lloh18:
	adrp	x9, _CHICKEN3_DGMG_DONE_FIX_DISABLE@GOTPAGE
Lloh19:
	ldr	x9, [x9, _CHICKEN3_DGMG_DONE_FIX_DISABLE@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_I915_WRITE
	mov	x0, x19
	bl	_IS_IVB_GT1
	cbz	x0, LBB0_2
; %bb.1:
Lloh21:
	adrp	x8, _GEN7_HALF_SLICE_CHICKEN1@GOTPAGE
Lloh22:
	ldr	x8, [x8, _GEN7_HALF_SLICE_CHICKEN1@GOTPAGEOFF]
Lloh23:
	ldr	w20, [x8]
Lloh24:
	adrp	x8, _GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE@GOTPAGEOFF]
Lloh26:
	ldr	w0, [x8]
	bl	__MASKED_BIT_ENABLE
	mov	x1, x0
	mov	x0, x20
	bl	_I915_WRITE
LBB0_2:
Lloh27:
	adrp	x8, _CACHE_MODE_0_GEN7@GOTPAGE
Lloh28:
	ldr	x8, [x8, _CACHE_MODE_0_GEN7@GOTPAGEOFF]
Lloh29:
	ldr	w20, [x8]
Lloh30:
	adrp	x8, _RC_OP_FLUSH_ENABLE@GOTPAGE
Lloh31:
	ldr	x8, [x8, _RC_OP_FLUSH_ENABLE@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
	bl	__MASKED_BIT_DISABLE
	mov	x1, x0
	mov	x0, x20
	bl	_I915_WRITE
Lloh33:
	adrp	x8, _GEN7_COMMON_SLICE_CHICKEN1@GOTPAGE
Lloh34:
	ldr	x8, [x8, _GEN7_COMMON_SLICE_CHICKEN1@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
Lloh36:
	adrp	x8, _GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC@GOTPAGE
Lloh37:
	ldr	x8, [x8, _GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	bl	_I915_WRITE
Lloh39:
	adrp	x8, _GEN7_L3CNTLREG1@GOTPAGE
Lloh40:
	ldr	x8, [x8, _GEN7_L3CNTLREG1@GOTPAGEOFF]
Lloh41:
	ldr	w0, [x8]
Lloh42:
	adrp	x8, _GEN7_WA_FOR_GEN7_L3_CONTROL@GOTPAGE
Lloh43:
	ldr	x8, [x8, _GEN7_WA_FOR_GEN7_L3_CONTROL@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
	bl	_I915_WRITE
Lloh45:
	adrp	x8, _GEN7_L3_CHICKEN_MODE_REGISTER@GOTPAGE
Lloh46:
	ldr	x8, [x8, _GEN7_L3_CHICKEN_MODE_REGISTER@GOTPAGEOFF]
Lloh47:
	ldr	w0, [x8]
Lloh48:
	adrp	x8, _GEN7_WA_L3_CHICKEN_MODE@GOTPAGE
Lloh49:
	ldr	x8, [x8, _GEN7_WA_L3_CHICKEN_MODE@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x8]
	bl	_I915_WRITE
	mov	x0, x19
	bl	_IS_IVB_GT1
	mov	x20, x0
Lloh51:
	adrp	x8, _GEN7_ROW_CHICKEN2@GOTPAGE
Lloh52:
	ldr	x8, [x8, _GEN7_ROW_CHICKEN2@GOTPAGEOFF]
Lloh53:
	ldr	w21, [x8]
Lloh54:
	adrp	x22, _DOP_CLOCK_GATING_DISABLE@GOTPAGE
Lloh55:
	ldr	x22, [x22, _DOP_CLOCK_GATING_DISABLE@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	__MASKED_BIT_ENABLE
	mov	x1, x0
	mov	x0, x21
	bl	_I915_WRITE
	cbnz	x20, LBB0_4
; %bb.3:
Lloh56:
	adrp	x8, _GEN7_ROW_CHICKEN2_GT2@GOTPAGE
Lloh57:
	ldr	x8, [x8, _GEN7_ROW_CHICKEN2_GT2@GOTPAGEOFF]
Lloh58:
	ldr	w20, [x8]
	ldr	w0, [x22]
	bl	__MASKED_BIT_ENABLE
	mov	x1, x0
	mov	x0, x20
	bl	_I915_WRITE
LBB0_4:
Lloh59:
	adrp	x8, _GEN7_L3SQCREG4@GOTPAGE
Lloh60:
	ldr	x8, [x8, _GEN7_L3SQCREG4@GOTPAGEOFF]
Lloh61:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_I915_READ
Lloh62:
	adrp	x8, _L3SQ_URB_READ_CAM_MATCH_DISABLE@GOTPAGE
Lloh63:
	ldr	x8, [x8, _L3SQ_URB_READ_CAM_MATCH_DISABLE@GOTPAGEOFF]
Lloh64:
	ldr	w8, [x8]
	bic	w1, w0, w8
	mov	x0, x20
	bl	_I915_WRITE
Lloh65:
	adrp	x8, _GEN6_UCGCTL2@GOTPAGE
Lloh66:
	ldr	x8, [x8, _GEN6_UCGCTL2@GOTPAGEOFF]
Lloh67:
	ldr	w0, [x8]
Lloh68:
	adrp	x8, _GEN6_RCZUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh69:
	ldr	x8, [x8, _GEN6_RCZUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh70:
	ldr	w1, [x8]
	bl	_I915_WRITE
Lloh71:
	adrp	x8, _GEN7_SQ_CHICKEN_MBCUNIT_CONFIG@GOTPAGE
Lloh72:
	ldr	x8, [x8, _GEN7_SQ_CHICKEN_MBCUNIT_CONFIG@GOTPAGEOFF]
Lloh73:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_I915_READ
Lloh74:
	adrp	x8, _GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB@GOTPAGE
Lloh75:
	ldr	x8, [x8, _GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB@GOTPAGEOFF]
Lloh76:
	ldr	w8, [x8]
	orr	w1, w8, w0
	mov	x0, x20
	bl	_I915_WRITE
	mov	x0, x19
	bl	_g4x_disable_trickle_feed
	mov	x0, x19
	bl	_gen7_setup_fixed_func_scheduler
Lloh77:
	adrp	x8, _CACHE_MODE_1@GOTPAGE
Lloh78:
	ldr	x8, [x8, _CACHE_MODE_1@GOTPAGEOFF]
Lloh79:
	ldr	w20, [x8]
Lloh80:
	adrp	x8, _PIXEL_SUBSPAN_COLLECT_OPT_DISABLE@GOTPAGE
Lloh81:
	ldr	x8, [x8, _PIXEL_SUBSPAN_COLLECT_OPT_DISABLE@GOTPAGEOFF]
Lloh82:
	ldr	w0, [x8]
	bl	__MASKED_BIT_ENABLE
	mov	x1, x0
	mov	x0, x20
	bl	_I915_WRITE
Lloh83:
	adrp	x8, _GEN7_GT_MODE@GOTPAGE
Lloh84:
	ldr	x8, [x8, _GEN7_GT_MODE@GOTPAGEOFF]
Lloh85:
	ldr	w20, [x8]
Lloh86:
	adrp	x8, _GEN6_WIZ_HASHING_MASK@GOTPAGE
Lloh87:
	ldr	x8, [x8, _GEN6_WIZ_HASHING_MASK@GOTPAGEOFF]
Lloh88:
	ldr	w0, [x8]
Lloh89:
	adrp	x8, _GEN6_WIZ_HASHING_16x4@GOTPAGE
Lloh90:
	ldr	x8, [x8, _GEN6_WIZ_HASHING_16x4@GOTPAGEOFF]
Lloh91:
	ldr	w1, [x8]
	bl	__MASKED_FIELD
	mov	x1, x0
	mov	x0, x20
	bl	_I915_WRITE
Lloh92:
	adrp	x20, _GEN6_MBCUNIT_SNPCR@GOTPAGE
Lloh93:
	ldr	x20, [x20, _GEN6_MBCUNIT_SNPCR@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	_I915_READ
Lloh94:
	adrp	x8, _GEN6_MBC_SNPCR_MASK@GOTPAGE
Lloh95:
	ldr	x8, [x8, _GEN6_MBC_SNPCR_MASK@GOTPAGEOFF]
Lloh96:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh97:
	adrp	x9, _GEN6_MBC_SNPCR_MED@GOTPAGE
Lloh98:
	ldr	x9, [x9, _GEN6_MBC_SNPCR_MED@GOTPAGEOFF]
Lloh99:
	ldr	w9, [x9]
	orr	w1, w8, w9
	ldr	w0, [x20]
	bl	_I915_WRITE
	mov	x0, x19
	bl	_HAS_PCH_NOP
	cbnz	w0, LBB0_6
; %bb.5:
	mov	x0, x19
	bl	_cpt_init_clock_gating
LBB0_6:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_gen6_check_mch_setup
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh16
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.cfi_endproc
                                        ; -- End function
	.comm	_ILK_DSPCLK_GATE_D,4,2          ; @ILK_DSPCLK_GATE_D
	.comm	_ILK_VRHUNIT_CLOCK_GATE_DISABLE,4,2 ; @ILK_VRHUNIT_CLOCK_GATE_DISABLE
	.comm	__3D_CHICKEN3,4,2               ; @_3D_CHICKEN3
	.comm	__3D_CHICKEN_SF_DISABLE_OBJEND_CULL,4,2 ; @_3D_CHICKEN_SF_DISABLE_OBJEND_CULL
	.comm	_IVB_CHICKEN3,4,2               ; @IVB_CHICKEN3
	.comm	_CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE,4,2 ; @CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE
	.comm	_CHICKEN3_DGMG_DONE_FIX_DISABLE,4,2 ; @CHICKEN3_DGMG_DONE_FIX_DISABLE
	.comm	_GEN7_HALF_SLICE_CHICKEN1,4,2   ; @GEN7_HALF_SLICE_CHICKEN1
	.comm	_GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE,4,2 ; @GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE
	.comm	_CACHE_MODE_0_GEN7,4,2          ; @CACHE_MODE_0_GEN7
	.comm	_RC_OP_FLUSH_ENABLE,4,2         ; @RC_OP_FLUSH_ENABLE
	.comm	_GEN7_COMMON_SLICE_CHICKEN1,4,2 ; @GEN7_COMMON_SLICE_CHICKEN1
	.comm	_GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC,4,2 ; @GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC
	.comm	_GEN7_L3CNTLREG1,4,2            ; @GEN7_L3CNTLREG1
	.comm	_GEN7_WA_FOR_GEN7_L3_CONTROL,4,2 ; @GEN7_WA_FOR_GEN7_L3_CONTROL
	.comm	_GEN7_L3_CHICKEN_MODE_REGISTER,4,2 ; @GEN7_L3_CHICKEN_MODE_REGISTER
	.comm	_GEN7_WA_L3_CHICKEN_MODE,4,2    ; @GEN7_WA_L3_CHICKEN_MODE
	.comm	_GEN7_ROW_CHICKEN2,4,2          ; @GEN7_ROW_CHICKEN2
	.comm	_DOP_CLOCK_GATING_DISABLE,4,2   ; @DOP_CLOCK_GATING_DISABLE
	.comm	_GEN7_ROW_CHICKEN2_GT2,4,2      ; @GEN7_ROW_CHICKEN2_GT2
	.comm	_GEN7_L3SQCREG4,4,2             ; @GEN7_L3SQCREG4
	.comm	_L3SQ_URB_READ_CAM_MATCH_DISABLE,4,2 ; @L3SQ_URB_READ_CAM_MATCH_DISABLE
	.comm	_GEN6_UCGCTL2,4,2               ; @GEN6_UCGCTL2
	.comm	_GEN6_RCZUNIT_CLOCK_GATE_DISABLE,4,2 ; @GEN6_RCZUNIT_CLOCK_GATE_DISABLE
	.comm	_GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,4,2 ; @GEN7_SQ_CHICKEN_MBCUNIT_CONFIG
	.comm	_GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB,4,2 ; @GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB
	.comm	_CACHE_MODE_1,4,2               ; @CACHE_MODE_1
	.comm	_PIXEL_SUBSPAN_COLLECT_OPT_DISABLE,4,2 ; @PIXEL_SUBSPAN_COLLECT_OPT_DISABLE
	.comm	_GEN7_GT_MODE,4,2               ; @GEN7_GT_MODE
	.comm	_GEN6_WIZ_HASHING_MASK,4,2      ; @GEN6_WIZ_HASHING_MASK
	.comm	_GEN6_WIZ_HASHING_16x4,4,2      ; @GEN6_WIZ_HASHING_16x4
	.comm	_GEN6_MBCUNIT_SNPCR,4,2         ; @GEN6_MBCUNIT_SNPCR
	.comm	_GEN6_MBC_SNPCR_MASK,4,2        ; @GEN6_MBC_SNPCR_MASK
	.comm	_GEN6_MBC_SNPCR_MED,4,2         ; @GEN6_MBC_SNPCR_MED
	.comm	_HIZ_RAW_STALL_OPT_DISABLE,4,2  ; @HIZ_RAW_STALL_OPT_DISABLE
	.no_dead_strip	_ivb_init_clock_gating
.subsections_via_symbols
