	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function fsl_dcu_drm_crtc_mode_set_nofb
_fsl_dcu_drm_crtc_mode_set_nofb:        ## @fsl_dcu_drm_crtc_mode_set_nofb
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rbx
	movq	8(%rdi), %rax
	movq	(%rax), %r13
	movl	4(%r13), %edi
	imull	$1000, (%rbx), %esi             ## imm = 0x3E8
	callq	_clk_set_rate
	leaq	-80(%rbp), %rsi
	movq	%rbx, %rdi
	callq	_drm_display_mode_to_videomode
	movq	_DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	$0, %r14d
	andl	8(%r13), %eax
	jne	LBB0_2
## %bb.1:
	movq	_DCU_SYN_POL_INV_PXCK@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
LBB0_2:
	movq	_DISPLAY_FLAGS_HSYNC_LOW@GOTPCREL(%rip), %rax
	movl	-80(%rbp), %ecx
	movl	(%rax), %eax
	andl	%ecx, %eax
	je	LBB0_4
## %bb.3:
	movq	_DCU_SYN_POL_INV_HS_LOW@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_4:
	movl	-48(%rbp), %edi
	movq	_DISPLAY_FLAGS_VSYNC_LOW@GOTPCREL(%rip), %rdx
	andl	(%rdx), %ecx
	je	LBB0_6
## %bb.5:
	movq	_DCU_SYN_POL_INV_VS_LOW@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_6:
	orl	%ecx, %eax
	orl	%eax, %r14d
	movl	(%r13), %r15d
	movq	_DCU_HSYN_PARA@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	callq	_DCU_HSYN_PARA_BP
	movl	%eax, %ebx
	movl	-52(%rbp), %edi
	callq	_DCU_HSYN_PARA_PW
	orl	%eax, %ebx
	movl	-56(%rbp), %edi
	callq	_DCU_HSYN_PARA_FP
	orl	%eax, %ebx
	movl	%r15d, %edi
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_regmap_write
	movl	(%r13), %r15d
	movq	_DCU_VSYN_PARA@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	-60(%rbp), %edi
	callq	_DCU_VSYN_PARA_BP
	movl	%eax, %ebx
	movl	-64(%rbp), %edi
	callq	_DCU_VSYN_PARA_PW
	orl	%eax, %ebx
	movl	-68(%rbp), %edi
	callq	_DCU_VSYN_PARA_FP
	orl	%eax, %ebx
	movl	%r15d, %edi
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_regmap_write
	movl	(%r13), %r15d
	movq	_DCU_DISP_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	-72(%rbp), %edi
	callq	_DCU_DISP_SIZE_DELTA_Y
	movl	%eax, %ebx
	movl	-76(%rbp), %edi
	callq	_DCU_DISP_SIZE_DELTA_X
	orl	%eax, %ebx
	movl	%r15d, %edi
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_regmap_write
	movl	(%r13), %edi
	movq	_DCU_SYN_POL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r14d, %edx
	callq	_regmap_write
	movl	(%r13), %r14d
	movq	_DCU_BGND@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	xorl	%edi, %edi
	callq	_DCU_BGND_R
	movl	%eax, %ebx
	xorl	%edi, %edi
	callq	_DCU_BGND_G
	orl	%eax, %ebx
	xorl	%edi, %edi
	callq	_DCU_BGND_B
	orl	%eax, %ebx
	movl	%r14d, %edi
	movl	%r15d, %esi
	movl	%ebx, %edx
	callq	_regmap_write
	movl	(%r13), %r14d
	movq	_DCU_DCU_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$1, %edi
	callq	_DCU_MODE_BLEND_ITER
	movq	_DCU_MODE_RASTER_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%r14d, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_regmap_write
	movl	(%r13), %r14d
	movq	_DCU_THRESHOLD@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_BF_VS_VAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_DCU_THRESHOLD_LS_BF_VS
	movl	%eax, %ebx
	movq	_BUF_MAX_VAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_DCU_THRESHOLD_OUT_BUF_HIGH
	orl	%eax, %ebx
	movq	_BUF_MIN_VAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_DCU_THRESHOLD_OUT_BUF_LOW
	orl	%eax, %ebx
	movl	%r14d, %edi
	movl	%r15d, %esi
	movl	%ebx, %edx
	callq	_regmap_write
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,4,2 ## @DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE
	.comm	_DCU_SYN_POL_INV_PXCK,4,2       ## @DCU_SYN_POL_INV_PXCK
	.comm	_DISPLAY_FLAGS_HSYNC_LOW,4,2    ## @DISPLAY_FLAGS_HSYNC_LOW
	.comm	_DCU_SYN_POL_INV_HS_LOW,4,2     ## @DCU_SYN_POL_INV_HS_LOW
	.comm	_DISPLAY_FLAGS_VSYNC_LOW,4,2    ## @DISPLAY_FLAGS_VSYNC_LOW
	.comm	_DCU_SYN_POL_INV_VS_LOW,4,2     ## @DCU_SYN_POL_INV_VS_LOW
	.comm	_DCU_HSYN_PARA,4,2              ## @DCU_HSYN_PARA
	.comm	_DCU_VSYN_PARA,4,2              ## @DCU_VSYN_PARA
	.comm	_DCU_DISP_SIZE,4,2              ## @DCU_DISP_SIZE
	.comm	_DCU_SYN_POL,4,2                ## @DCU_SYN_POL
	.comm	_DCU_BGND,4,2                   ## @DCU_BGND
	.comm	_DCU_DCU_MODE,4,2               ## @DCU_DCU_MODE
	.comm	_DCU_MODE_RASTER_EN,4,2         ## @DCU_MODE_RASTER_EN
	.comm	_DCU_THRESHOLD,4,2              ## @DCU_THRESHOLD
	.comm	_BF_VS_VAL,4,2                  ## @BF_VS_VAL
	.comm	_BUF_MAX_VAL,4,2                ## @BUF_MAX_VAL
	.comm	_BUF_MIN_VAL,4,2                ## @BUF_MIN_VAL
	.no_dead_strip	_fsl_dcu_drm_crtc_mode_set_nofb
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function fsl_dcu_drm_crtc_mode_set_nofb
_fsl_dcu_drm_crtc_mode_set_nofb:        ; @fsl_dcu_drm_crtc_mode_set_nofb
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldp	x19, x8, [x0]
	ldr	x23, [x8]
	ldr	w0, [x23, #4]
	ldr	w8, [x19]
	mov	w9, #1000
	mul	w1, w8, w9
	bl	_clk_set_rate
	add	x1, sp, #8
	mov	x0, x19
	bl	_drm_display_mode_to_videomode
	ldr	w8, [x23, #8]
Lloh0:
	adrp	x9, _DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
Lloh3:
	adrp	x10, _DCU_SYN_POL_INV_PXCK@GOTPAGE
Lloh4:
	ldr	x10, [x10, _DCU_SYN_POL_INV_PXCK@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	tst	w9, w8
	csel	w8, w10, wzr, eq
Lloh6:
	adrp	x9, _DISPLAY_FLAGS_HSYNC_LOW@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DISPLAY_FLAGS_HSYNC_LOW@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
Lloh9:
	adrp	x10, _DCU_SYN_POL_INV_HS_LOW@GOTPAGE
Lloh10:
	ldr	x10, [x10, _DCU_SYN_POL_INV_HS_LOW@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	ldr	w11, [sp, #8]
	ldr	w0, [sp, #40]
	tst	w9, w11
	csel	w9, wzr, w10, eq
Lloh12:
	adrp	x10, _DISPLAY_FLAGS_VSYNC_LOW@GOTPAGE
Lloh13:
	ldr	x10, [x10, _DISPLAY_FLAGS_VSYNC_LOW@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh14:
	ldr	w9, [x10]
	tst	w9, w11
Lloh15:
	adrp	x9, _DCU_SYN_POL_INV_VS_LOW@GOTPAGE
Lloh16:
	ldr	x9, [x9, _DCU_SYN_POL_INV_VS_LOW@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	csel	w9, wzr, w9, eq
	orr	w19, w8, w9
	ldr	w20, [x23]
Lloh18:
	adrp	x8, _DCU_HSYN_PARA@GOTPAGE
Lloh19:
	ldr	x8, [x8, _DCU_HSYN_PARA@GOTPAGEOFF]
Lloh20:
	ldr	w21, [x8]
	bl	_DCU_HSYN_PARA_BP
	mov	x22, x0
	ldr	w0, [sp, #36]
	bl	_DCU_HSYN_PARA_PW
	orr	w22, w0, w22
	ldr	w0, [sp, #32]
	bl	_DCU_HSYN_PARA_FP
	orr	w2, w22, w0
	mov	x0, x20
	mov	x1, x21
	bl	_regmap_write
	ldr	w20, [x23]
Lloh21:
	adrp	x8, _DCU_VSYN_PARA@GOTPAGE
Lloh22:
	ldr	x8, [x8, _DCU_VSYN_PARA@GOTPAGEOFF]
Lloh23:
	ldr	w21, [x8]
	ldr	w0, [sp, #28]
	bl	_DCU_VSYN_PARA_BP
	mov	x22, x0
	ldr	w0, [sp, #24]
	bl	_DCU_VSYN_PARA_PW
	orr	w22, w0, w22
	ldr	w0, [sp, #20]
	bl	_DCU_VSYN_PARA_FP
	orr	w2, w22, w0
	mov	x0, x20
	mov	x1, x21
	bl	_regmap_write
	ldr	w20, [x23]
Lloh24:
	adrp	x8, _DCU_DISP_SIZE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DCU_DISP_SIZE@GOTPAGEOFF]
Lloh26:
	ldr	w21, [x8]
	ldr	w0, [sp, #16]
	bl	_DCU_DISP_SIZE_DELTA_Y
	mov	x22, x0
	ldr	w0, [sp, #12]
	bl	_DCU_DISP_SIZE_DELTA_X
	orr	w2, w0, w22
	mov	x0, x20
	mov	x1, x21
	bl	_regmap_write
	ldr	w0, [x23]
Lloh27:
	adrp	x8, _DCU_SYN_POL@GOTPAGE
Lloh28:
	ldr	x8, [x8, _DCU_SYN_POL@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	mov	x2, x19
	bl	_regmap_write
	ldr	w19, [x23]
Lloh30:
	adrp	x8, _DCU_BGND@GOTPAGE
Lloh31:
	ldr	x8, [x8, _DCU_BGND@GOTPAGEOFF]
Lloh32:
	ldr	w20, [x8]
	mov	w0, #0
	bl	_DCU_BGND_R
	mov	x21, x0
	mov	w0, #0
	bl	_DCU_BGND_G
	orr	w21, w0, w21
	mov	w0, #0
	bl	_DCU_BGND_B
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_regmap_write
	ldr	w19, [x23]
Lloh33:
	adrp	x8, _DCU_DCU_MODE@GOTPAGE
Lloh34:
	ldr	x8, [x8, _DCU_DCU_MODE@GOTPAGEOFF]
Lloh35:
	ldr	w20, [x8]
	mov	w0, #1
	bl	_DCU_MODE_BLEND_ITER
Lloh36:
	adrp	x8, _DCU_MODE_RASTER_EN@GOTPAGE
Lloh37:
	ldr	x8, [x8, _DCU_MODE_RASTER_EN@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	orr	w2, w8, w0
	mov	x0, x19
	mov	x1, x20
	bl	_regmap_write
	ldr	w19, [x23]
Lloh39:
	adrp	x8, _DCU_THRESHOLD@GOTPAGE
Lloh40:
	ldr	x8, [x8, _DCU_THRESHOLD@GOTPAGEOFF]
Lloh41:
	ldr	w20, [x8]
Lloh42:
	adrp	x8, _BF_VS_VAL@GOTPAGE
Lloh43:
	ldr	x8, [x8, _BF_VS_VAL@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	bl	_DCU_THRESHOLD_LS_BF_VS
	mov	x21, x0
Lloh45:
	adrp	x8, _BUF_MAX_VAL@GOTPAGE
Lloh46:
	ldr	x8, [x8, _BUF_MAX_VAL@GOTPAGEOFF]
Lloh47:
	ldr	w0, [x8]
	bl	_DCU_THRESHOLD_OUT_BUF_HIGH
	orr	w21, w0, w21
Lloh48:
	adrp	x8, _BUF_MIN_VAL@GOTPAGE
Lloh49:
	ldr	x8, [x8, _BUF_MIN_VAL@GOTPAGEOFF]
Lloh50:
	ldr	w0, [x8]
	bl	_DCU_THRESHOLD_OUT_BUF_LOW
	orr	w2, w21, w0
	mov	x0, x19
	mov	x1, x20
	bl	_regmap_write
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,4,2 ; @DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE
	.comm	_DCU_SYN_POL_INV_PXCK,4,2       ; @DCU_SYN_POL_INV_PXCK
	.comm	_DISPLAY_FLAGS_HSYNC_LOW,4,2    ; @DISPLAY_FLAGS_HSYNC_LOW
	.comm	_DCU_SYN_POL_INV_HS_LOW,4,2     ; @DCU_SYN_POL_INV_HS_LOW
	.comm	_DISPLAY_FLAGS_VSYNC_LOW,4,2    ; @DISPLAY_FLAGS_VSYNC_LOW
	.comm	_DCU_SYN_POL_INV_VS_LOW,4,2     ; @DCU_SYN_POL_INV_VS_LOW
	.comm	_DCU_HSYN_PARA,4,2              ; @DCU_HSYN_PARA
	.comm	_DCU_VSYN_PARA,4,2              ; @DCU_VSYN_PARA
	.comm	_DCU_DISP_SIZE,4,2              ; @DCU_DISP_SIZE
	.comm	_DCU_SYN_POL,4,2                ; @DCU_SYN_POL
	.comm	_DCU_BGND,4,2                   ; @DCU_BGND
	.comm	_DCU_DCU_MODE,4,2               ; @DCU_DCU_MODE
	.comm	_DCU_MODE_RASTER_EN,4,2         ; @DCU_MODE_RASTER_EN
	.comm	_DCU_THRESHOLD,4,2              ; @DCU_THRESHOLD
	.comm	_BF_VS_VAL,4,2                  ; @BF_VS_VAL
	.comm	_BUF_MAX_VAL,4,2                ; @BUF_MAX_VAL
	.comm	_BUF_MIN_VAL,4,2                ; @BUF_MIN_VAL
	.no_dead_strip	_fsl_dcu_drm_crtc_mode_set_nofb
.subsections_via_symbols
