	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nv_init_doorbell_index
_nv_init_doorbell_index:                ## @nv_init_doorbell_index
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_AMDGPU_NAVI10_DOORBELL_KIQ@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 96(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_MEC_RING0@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 92(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_MEC_RING1@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 88(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_MEC_RING2@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 84(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_MEC_RING3@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 80(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_MEC_RING4@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 76(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_MEC_RING5@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 72(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_MEC_RING6@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 68(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_MEC_RING7@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_USERQUEUE_START@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 60(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_USERQUEUE_END@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_GFX_RING0@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 52(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_GFX_RING1@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	40(%rdi), %rcx
	movl	%eax, (%rcx)
	movq	_AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE1@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 4(%rcx)
	movq	_AMDGPU_NAVI10_DOORBELL_IH@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL64_VCN0_1@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL64_VCN2_3@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL64_VCN4_5@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL64_VCN6_7@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL64_FIRST_NON_CP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL64_LAST_NON_CP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rdi)
	movq	_AMDGPU_NAVI10_DOORBELL_MAX_ASSIGNMENT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	addl	%eax, %eax
	movl	%eax, (%rdi)
	movl	$20, 4(%rdi)
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_NAVI10_DOORBELL_KIQ,4,2 ## @AMDGPU_NAVI10_DOORBELL_KIQ
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING0,4,2 ## @AMDGPU_NAVI10_DOORBELL_MEC_RING0
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING1,4,2 ## @AMDGPU_NAVI10_DOORBELL_MEC_RING1
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING2,4,2 ## @AMDGPU_NAVI10_DOORBELL_MEC_RING2
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING3,4,2 ## @AMDGPU_NAVI10_DOORBELL_MEC_RING3
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING4,4,2 ## @AMDGPU_NAVI10_DOORBELL_MEC_RING4
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING5,4,2 ## @AMDGPU_NAVI10_DOORBELL_MEC_RING5
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING6,4,2 ## @AMDGPU_NAVI10_DOORBELL_MEC_RING6
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING7,4,2 ## @AMDGPU_NAVI10_DOORBELL_MEC_RING7
	.comm	_AMDGPU_NAVI10_DOORBELL_USERQUEUE_START,4,2 ## @AMDGPU_NAVI10_DOORBELL_USERQUEUE_START
	.comm	_AMDGPU_NAVI10_DOORBELL_USERQUEUE_END,4,2 ## @AMDGPU_NAVI10_DOORBELL_USERQUEUE_END
	.comm	_AMDGPU_NAVI10_DOORBELL_GFX_RING0,4,2 ## @AMDGPU_NAVI10_DOORBELL_GFX_RING0
	.comm	_AMDGPU_NAVI10_DOORBELL_GFX_RING1,4,2 ## @AMDGPU_NAVI10_DOORBELL_GFX_RING1
	.comm	_AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0,4,2 ## @AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0
	.comm	_AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE1,4,2 ## @AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE1
	.comm	_AMDGPU_NAVI10_DOORBELL_IH,4,2  ## @AMDGPU_NAVI10_DOORBELL_IH
	.comm	_AMDGPU_NAVI10_DOORBELL64_VCN0_1,4,2 ## @AMDGPU_NAVI10_DOORBELL64_VCN0_1
	.comm	_AMDGPU_NAVI10_DOORBELL64_VCN2_3,4,2 ## @AMDGPU_NAVI10_DOORBELL64_VCN2_3
	.comm	_AMDGPU_NAVI10_DOORBELL64_VCN4_5,4,2 ## @AMDGPU_NAVI10_DOORBELL64_VCN4_5
	.comm	_AMDGPU_NAVI10_DOORBELL64_VCN6_7,4,2 ## @AMDGPU_NAVI10_DOORBELL64_VCN6_7
	.comm	_AMDGPU_NAVI10_DOORBELL64_FIRST_NON_CP,4,2 ## @AMDGPU_NAVI10_DOORBELL64_FIRST_NON_CP
	.comm	_AMDGPU_NAVI10_DOORBELL64_LAST_NON_CP,4,2 ## @AMDGPU_NAVI10_DOORBELL64_LAST_NON_CP
	.comm	_AMDGPU_NAVI10_DOORBELL_MAX_ASSIGNMENT,4,2 ## @AMDGPU_NAVI10_DOORBELL_MAX_ASSIGNMENT
	.no_dead_strip	_nv_init_doorbell_index
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nv_init_doorbell_index
_nv_init_doorbell_index:                ; @nv_init_doorbell_index
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL_KIQ@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL_KIQ@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [x0, #96]
Lloh3:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL_MEC_RING0@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL_MEC_RING0@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _AMDGPU_NAVI10_DOORBELL_MEC_RING1@GOTPAGE
Lloh7:
	ldr	x9, [x9, _AMDGPU_NAVI10_DOORBELL_MEC_RING1@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #88]
Lloh9:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL_MEC_RING2@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL_MEC_RING2@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
Lloh12:
	adrp	x9, _AMDGPU_NAVI10_DOORBELL_MEC_RING3@GOTPAGE
Lloh13:
	ldr	x9, [x9, _AMDGPU_NAVI10_DOORBELL_MEC_RING3@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #80]
Lloh15:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL_MEC_RING4@GOTPAGE
Lloh16:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL_MEC_RING4@GOTPAGEOFF]
Lloh17:
	adrp	x9, _AMDGPU_NAVI10_DOORBELL_MEC_RING5@GOTPAGE
Lloh18:
	ldr	x9, [x9, _AMDGPU_NAVI10_DOORBELL_MEC_RING5@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
Lloh20:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #72]
Lloh21:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL_MEC_RING6@GOTPAGE
Lloh22:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL_MEC_RING6@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
Lloh24:
	adrp	x9, _AMDGPU_NAVI10_DOORBELL_MEC_RING7@GOTPAGE
Lloh25:
	ldr	x9, [x9, _AMDGPU_NAVI10_DOORBELL_MEC_RING7@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #64]
Lloh27:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL_USERQUEUE_START@GOTPAGE
Lloh28:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL_USERQUEUE_START@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
Lloh30:
	adrp	x9, _AMDGPU_NAVI10_DOORBELL_USERQUEUE_END@GOTPAGE
Lloh31:
	ldr	x9, [x9, _AMDGPU_NAVI10_DOORBELL_USERQUEUE_END@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #56]
Lloh33:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL_GFX_RING0@GOTPAGE
Lloh34:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL_GFX_RING0@GOTPAGEOFF]
Lloh35:
	adrp	x9, _AMDGPU_NAVI10_DOORBELL_GFX_RING1@GOTPAGE
Lloh36:
	ldr	x9, [x9, _AMDGPU_NAVI10_DOORBELL_GFX_RING1@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
Lloh38:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #48]
Lloh39:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0@GOTPAGE
Lloh40:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	ldr	x9, [x0, #40]
	str	w8, [x9]
Lloh42:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE1@GOTPAGE
Lloh43:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE1@GOTPAGEOFF]
Lloh44:
	ldr	w8, [x8]
	str	w8, [x9, #4]
Lloh45:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL_IH@GOTPAGE
Lloh46:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL_IH@GOTPAGEOFF]
Lloh47:
	ldr	w8, [x8]
Lloh48:
	adrp	x9, _AMDGPU_NAVI10_DOORBELL64_VCN0_1@GOTPAGE
Lloh49:
	ldr	x9, [x9, _AMDGPU_NAVI10_DOORBELL64_VCN0_1@GOTPAGEOFF]
	str	w8, [x0, #32]
Lloh50:
	ldr	w8, [x9]
Lloh51:
	adrp	x9, _AMDGPU_NAVI10_DOORBELL64_VCN2_3@GOTPAGE
Lloh52:
	ldr	x9, [x9, _AMDGPU_NAVI10_DOORBELL64_VCN2_3@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #24]
Lloh54:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL64_VCN4_5@GOTPAGE
Lloh55:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL64_VCN4_5@GOTPAGEOFF]
Lloh56:
	ldr	w8, [x8]
Lloh57:
	adrp	x9, _AMDGPU_NAVI10_DOORBELL64_VCN6_7@GOTPAGE
Lloh58:
	ldr	x9, [x9, _AMDGPU_NAVI10_DOORBELL64_VCN6_7@GOTPAGEOFF]
Lloh59:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #16]
Lloh60:
	adrp	x8, _AMDGPU_NAVI10_DOORBELL64_FIRST_NON_CP@GOTPAGE
Lloh61:
	ldr	x8, [x8, _AMDGPU_NAVI10_DOORBELL64_FIRST_NON_CP@GOTPAGEOFF]
Lloh62:
	ldr	w8, [x8]
Lloh63:
	adrp	x9, _AMDGPU_NAVI10_DOORBELL64_LAST_NON_CP@GOTPAGE
Lloh64:
	ldr	x9, [x9, _AMDGPU_NAVI10_DOORBELL64_LAST_NON_CP@GOTPAGEOFF]
Lloh65:
	ldr	w9, [x9]
Lloh66:
	adrp	x10, _AMDGPU_NAVI10_DOORBELL_MAX_ASSIGNMENT@GOTPAGE
Lloh67:
	ldr	x10, [x10, _AMDGPU_NAVI10_DOORBELL_MAX_ASSIGNMENT@GOTPAGEOFF]
	stp	w9, w8, [x0, #8]
Lloh68:
	ldr	w8, [x10]
	lsl	w8, w8, #1
	mov	w9, #20
	stp	w8, w9, [x0]
	ret
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh37
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh19
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_NAVI10_DOORBELL_KIQ,4,2 ; @AMDGPU_NAVI10_DOORBELL_KIQ
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING0,4,2 ; @AMDGPU_NAVI10_DOORBELL_MEC_RING0
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING1,4,2 ; @AMDGPU_NAVI10_DOORBELL_MEC_RING1
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING2,4,2 ; @AMDGPU_NAVI10_DOORBELL_MEC_RING2
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING3,4,2 ; @AMDGPU_NAVI10_DOORBELL_MEC_RING3
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING4,4,2 ; @AMDGPU_NAVI10_DOORBELL_MEC_RING4
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING5,4,2 ; @AMDGPU_NAVI10_DOORBELL_MEC_RING5
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING6,4,2 ; @AMDGPU_NAVI10_DOORBELL_MEC_RING6
	.comm	_AMDGPU_NAVI10_DOORBELL_MEC_RING7,4,2 ; @AMDGPU_NAVI10_DOORBELL_MEC_RING7
	.comm	_AMDGPU_NAVI10_DOORBELL_USERQUEUE_START,4,2 ; @AMDGPU_NAVI10_DOORBELL_USERQUEUE_START
	.comm	_AMDGPU_NAVI10_DOORBELL_USERQUEUE_END,4,2 ; @AMDGPU_NAVI10_DOORBELL_USERQUEUE_END
	.comm	_AMDGPU_NAVI10_DOORBELL_GFX_RING0,4,2 ; @AMDGPU_NAVI10_DOORBELL_GFX_RING0
	.comm	_AMDGPU_NAVI10_DOORBELL_GFX_RING1,4,2 ; @AMDGPU_NAVI10_DOORBELL_GFX_RING1
	.comm	_AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0,4,2 ; @AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0
	.comm	_AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE1,4,2 ; @AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE1
	.comm	_AMDGPU_NAVI10_DOORBELL_IH,4,2  ; @AMDGPU_NAVI10_DOORBELL_IH
	.comm	_AMDGPU_NAVI10_DOORBELL64_VCN0_1,4,2 ; @AMDGPU_NAVI10_DOORBELL64_VCN0_1
	.comm	_AMDGPU_NAVI10_DOORBELL64_VCN2_3,4,2 ; @AMDGPU_NAVI10_DOORBELL64_VCN2_3
	.comm	_AMDGPU_NAVI10_DOORBELL64_VCN4_5,4,2 ; @AMDGPU_NAVI10_DOORBELL64_VCN4_5
	.comm	_AMDGPU_NAVI10_DOORBELL64_VCN6_7,4,2 ; @AMDGPU_NAVI10_DOORBELL64_VCN6_7
	.comm	_AMDGPU_NAVI10_DOORBELL64_FIRST_NON_CP,4,2 ; @AMDGPU_NAVI10_DOORBELL64_FIRST_NON_CP
	.comm	_AMDGPU_NAVI10_DOORBELL64_LAST_NON_CP,4,2 ; @AMDGPU_NAVI10_DOORBELL64_LAST_NON_CP
	.comm	_AMDGPU_NAVI10_DOORBELL_MAX_ASSIGNMENT,4,2 ; @AMDGPU_NAVI10_DOORBELL_MAX_ASSIGNMENT
	.no_dead_strip	_nv_init_doorbell_index
.subsections_via_symbols
