	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ni_enable_bif_dynamic_pcie_gen2
_ni_enable_bif_dynamic_pcie_gen2:       ## @ni_enable_bif_dynamic_pcie_gen2
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	callq	_rv770_get_pi
	movq	%rax, %r15
	movq	_PCIE_LC_SPEED_CNTL@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	callq	_RREG32_PCIE_PORT
	movl	%eax, %r12d
	movq	_LC_OTHER_SIDE_EVER_SENT_GEN2@GOTPCREL(%rip), %rax
	testl	%r12d, (%rax)
	je	LBB0_9
## %bb.1:
	movq	_LC_OTHER_SIDE_SUPPORTS_GEN2@GOTPCREL(%rip), %rax
	testl	%r12d, (%rax)
	je	LBB0_9
## %bb.2:
	movl	(%r15), %eax
	testl	%r14d, %r14d
	je	LBB0_6
## %bb.3:
	testl	%eax, %eax
	jne	LBB0_5
## %bb.4:
	movq	_CG_BIF_REQ_AND_RSP@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_RREG32
	movq	_CG_CLIENT_REQ_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	notl	%r14d
	andl	%eax, %r14d
	movl	$13, %edi
	callq	_CG_CLIENT_REQ
	orl	%eax, %r14d
	movl	(%rbx), %edi
	movl	%r14d, %esi
	callq	_WREG32
LBB0_5:
	movq	_LC_HW_VOLTAGE_IF_CONTROL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r12d
	movl	$1, %edi
	callq	_LC_HW_VOLTAGE_IF_CONTROL
	movl	%eax, %ebx
	orl	%r12d, %ebx
	movq	_LC_GEN2_EN_STRAP@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_LC_CLR_FAILED_SPD_CHANGE_CNT@GOTPCREL(%rip), %r14
	orl	(%r14), %ebx
	movl	(%r13), %edi
	movl	%ebx, %esi
	callq	_WREG32_PCIE_PORT
	movl	$10, %edi
	callq	_udelay
	movl	(%r14), %r12d
	notl	%r12d
	andl	%ebx, %r12d
	jmp	LBB0_8
LBB0_9:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	testl	%eax, %eax
	jne	LBB0_8
## %bb.7:
	movq	_CG_BIF_REQ_AND_RSP@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	callq	_RREG32
	movq	_CG_CLIENT_REQ_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	$13, %edi
	callq	_CG_CLIENT_REQ
	orl	%eax, %ebx
	movl	(%r14), %edi
	movl	%ebx, %esi
	callq	_WREG32
	movq	_LC_HW_VOLTAGE_IF_CONTROL_MASK@GOTPCREL(%rip), %rax
	movq	_LC_GEN2_EN_STRAP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	notl	%ecx
	andl	%ecx, %r12d
LBB0_8:
	movl	(%r13), %edi
	movl	%r12d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32_PCIE_PORT               ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PCIE_LC_SPEED_CNTL,4,2         ## @PCIE_LC_SPEED_CNTL
	.comm	_LC_OTHER_SIDE_EVER_SENT_GEN2,4,2 ## @LC_OTHER_SIDE_EVER_SENT_GEN2
	.comm	_LC_OTHER_SIDE_SUPPORTS_GEN2,4,2 ## @LC_OTHER_SIDE_SUPPORTS_GEN2
	.comm	_CG_BIF_REQ_AND_RSP,4,2         ## @CG_BIF_REQ_AND_RSP
	.comm	_CG_CLIENT_REQ_MASK,4,2         ## @CG_CLIENT_REQ_MASK
	.comm	_LC_HW_VOLTAGE_IF_CONTROL_MASK,4,2 ## @LC_HW_VOLTAGE_IF_CONTROL_MASK
	.comm	_LC_GEN2_EN_STRAP,4,2           ## @LC_GEN2_EN_STRAP
	.comm	_LC_CLR_FAILED_SPD_CHANGE_CNT,4,2 ## @LC_CLR_FAILED_SPD_CHANGE_CNT
	.no_dead_strip	_ni_enable_bif_dynamic_pcie_gen2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ni_enable_bif_dynamic_pcie_gen2
_ni_enable_bif_dynamic_pcie_gen2:       ; @ni_enable_bif_dynamic_pcie_gen2
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	bl	_rv770_get_pi
	mov	x21, x0
Lloh0:
	adrp	x22, _PCIE_LC_SPEED_CNTL@GOTPAGE
Lloh1:
	ldr	x22, [x22, _PCIE_LC_SPEED_CNTL@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_RREG32_PCIE_PORT
Lloh2:
	adrp	x8, _LC_OTHER_SIDE_EVER_SENT_GEN2@GOTPAGE
Lloh3:
	ldr	x8, [x8, _LC_OTHER_SIDE_EVER_SENT_GEN2@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_7
; %bb.1:
	mov	x19, x0
Lloh5:
	adrp	x8, _LC_OTHER_SIDE_SUPPORTS_GEN2@GOTPAGE
Lloh6:
	ldr	x8, [x8, _LC_OTHER_SIDE_SUPPORTS_GEN2@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_7
; %bb.2:
	ldr	w8, [x21]
	cbz	w20, LBB0_8
; %bb.3:
	cbnz	w8, LBB0_5
; %bb.4:
Lloh8:
	adrp	x20, _CG_BIF_REQ_AND_RSP@GOTPAGE
Lloh9:
	ldr	x20, [x20, _CG_BIF_REQ_AND_RSP@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	_RREG32
Lloh10:
	adrp	x8, _CG_CLIENT_REQ_MASK@GOTPAGE
Lloh11:
	ldr	x8, [x8, _CG_CLIENT_REQ_MASK@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	bic	w21, w0, w8
	mov	w0, #13
	bl	_CG_CLIENT_REQ
	orr	w1, w21, w0
	ldr	w0, [x20]
	bl	_WREG32
LBB0_5:
Lloh13:
	adrp	x8, _LC_HW_VOLTAGE_IF_CONTROL_MASK@GOTPAGE
Lloh14:
	ldr	x8, [x8, _LC_HW_VOLTAGE_IF_CONTROL_MASK@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	bic	w19, w19, w8
	mov	w0, #1
	bl	_LC_HW_VOLTAGE_IF_CONTROL
	orr	w8, w19, w0
Lloh16:
	adrp	x9, _LC_GEN2_EN_STRAP@GOTPAGE
Lloh17:
	ldr	x9, [x9, _LC_GEN2_EN_STRAP@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh19:
	adrp	x20, _LC_CLR_FAILED_SPD_CHANGE_CNT@GOTPAGE
Lloh20:
	ldr	x20, [x20, _LC_CLR_FAILED_SPD_CHANGE_CNT@GOTPAGEOFF]
	ldr	w9, [x20]
	orr	w19, w8, w9
	ldr	w0, [x22]
	mov	x1, x19
	bl	_WREG32_PCIE_PORT
	mov	w0, #10
	bl	_udelay
	ldr	w8, [x20]
LBB0_6:
	bic	w19, w19, w8
	b	LBB0_9
LBB0_7:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_8:
	cbz	w8, LBB0_10
LBB0_9:
	ldr	w0, [x22]
	mov	x1, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32_PCIE_PORT
LBB0_10:
Lloh21:
	adrp	x20, _CG_BIF_REQ_AND_RSP@GOTPAGE
Lloh22:
	ldr	x20, [x20, _CG_BIF_REQ_AND_RSP@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	_RREG32
Lloh23:
	adrp	x8, _CG_CLIENT_REQ_MASK@GOTPAGE
Lloh24:
	ldr	x8, [x8, _CG_CLIENT_REQ_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	bic	w21, w0, w8
	mov	w0, #13
	bl	_CG_CLIENT_REQ
	orr	w1, w21, w0
	ldr	w0, [x20]
	bl	_WREG32
Lloh26:
	adrp	x8, _LC_HW_VOLTAGE_IF_CONTROL_MASK@GOTPAGE
Lloh27:
	ldr	x8, [x8, _LC_HW_VOLTAGE_IF_CONTROL_MASK@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
Lloh29:
	adrp	x9, _LC_GEN2_EN_STRAP@GOTPAGE
Lloh30:
	ldr	x9, [x9, _LC_GEN2_EN_STRAP@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	orr	w8, w9, w8
	b	LBB0_6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.cfi_endproc
                                        ; -- End function
	.comm	_PCIE_LC_SPEED_CNTL,4,2         ; @PCIE_LC_SPEED_CNTL
	.comm	_LC_OTHER_SIDE_EVER_SENT_GEN2,4,2 ; @LC_OTHER_SIDE_EVER_SENT_GEN2
	.comm	_LC_OTHER_SIDE_SUPPORTS_GEN2,4,2 ; @LC_OTHER_SIDE_SUPPORTS_GEN2
	.comm	_CG_BIF_REQ_AND_RSP,4,2         ; @CG_BIF_REQ_AND_RSP
	.comm	_CG_CLIENT_REQ_MASK,4,2         ; @CG_CLIENT_REQ_MASK
	.comm	_LC_HW_VOLTAGE_IF_CONTROL_MASK,4,2 ; @LC_HW_VOLTAGE_IF_CONTROL_MASK
	.comm	_LC_GEN2_EN_STRAP,4,2           ; @LC_GEN2_EN_STRAP
	.comm	_LC_CLR_FAILED_SPD_CHANGE_CNT,4,2 ; @LC_CLR_FAILED_SPD_CHANGE_CNT
	.no_dead_strip	_ni_enable_bif_dynamic_pcie_gen2
.subsections_via_symbols
