	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_hwmgr_early_init               ## -- Begin function hwmgr_early_init
	.p2align	4, 0x90
_hwmgr_early_init:                      ## @hwmgr_early_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	testq	%rdi, %rdi
	je	LBB0_15
## %bb.1:
	movq	%rdi, %rbx
	movq	_AMD_MAX_USEC_TIMEOUT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%rdi)
	movq	_PP_TABLE_V1@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 40(%rdi)
	movq	_AMD_DPM_FORCED_LEVEL_AUTO@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 56(%rdi)
	movq	%rax, 48(%rdi)
	callq	_hwmgr_init_default_caps
	movq	%rbx, %rdi
	callq	_hwmgr_set_user_specify_caps
	movl	$1, (%rbx)
	movq	%rbx, %rdi
	callq	_hwmgr_init_workload_prority
	movl	$0, 4(%rbx)
	movl	$-139, %eax
	addl	8(%rbx), %eax
	cmpl	$4, %eax
	ja	LBB0_15
## %bb.2:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_3:
	movq	_PP_GFXOFF_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 12(%rbx)
	movl	32(%rbx), %eax
	addl	$-128, %eax
	cmpl	$10, %eax
	ja	LBB0_15
## %bb.4:
	leaq	LJTI0_1(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_5:
	movq	_polaris10_smu_funcs@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_6:
	cmpl	$134, 32(%rbx)
	jne	LBB0_15
## %bb.7:
	movl	$0, 16(%rbx)
	movq	_smu10_smu_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 24(%rbx)
	movq	%rbx, %rdi
	callq	_smu10_init_function_pointers
	jmp	LBB0_24
LBB0_8:
	movl	$0, 16(%rbx)
	movq	_smu8_smu_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 24(%rbx)
	movq	_PP_GFXOFF_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 12(%rbx)
	movq	%rbx, %rdi
	callq	_smu8_init_function_pointers
	jmp	LBB0_24
LBB0_9:
	movq	_ci_smu_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 24(%rbx)
	movq	%rbx, %rdi
	callq	_ci_set_asic_special_caps
	movq	_PP_VBI_TIME_SUPPORT_MASK@GOTPCREL(%rip), %rax
	movq	_PP_ENABLE_GFX_CG_THRU_SMU@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_PP_GFXOFF_MASK@GOTPCREL(%rip), %rax
LBB0_10:
	orl	(%rax), %ecx
	notl	%ecx
	andl	%ecx, 12(%rbx)
	movq	_PP_TABLE_V0@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 40(%rbx)
	movl	$0, 16(%rbx)
	jmp	LBB0_23
LBB0_11:
	movl	32(%rbx), %eax
	cmpl	$129, %eax
	je	LBB0_16
## %bb.12:
	cmpl	$130, %eax
	je	LBB0_17
## %bb.13:
	cmpl	$131, %eax
	jne	LBB0_15
## %bb.14:
	movq	_PP_GFXOFF_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 12(%rbx)
	movq	_vega10_smu_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 24(%rbx)
	movq	%rbx, %rdi
	callq	_vega10_hwmgr_init
	jmp	LBB0_24
LBB0_15:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_25
LBB0_16:
	movq	_PP_GFXOFF_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 12(%rbx)
	movq	_vega20_smu_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 24(%rbx)
	movq	%rbx, %rdi
	callq	_vega20_hwmgr_init
	jmp	LBB0_24
LBB0_17:
	movq	_vega12_smu_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 24(%rbx)
	movq	%rbx, %rdi
	callq	_vega12_hwmgr_init
	jmp	LBB0_24
LBB0_18:
	movq	_vegam_smu_funcs@GOTPCREL(%rip), %rax
LBB0_19:
	movq	%rax, 24(%rbx)
	movq	%rbx, %rdi
	callq	_polaris_set_asic_special_caps
	movq	_PP_UVD_HANDSHAKE_MASK@GOTPCREL(%rip), %rax
	jmp	LBB0_22
LBB0_20:
	movq	_iceland_smu_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 24(%rbx)
	movq	%rbx, %rdi
	callq	_topaz_set_asic_special_caps
	movq	_PP_VBI_TIME_SUPPORT_MASK@GOTPCREL(%rip), %rax
	movq	_PP_ENABLE_GFX_CG_THRU_SMU@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	jmp	LBB0_10
LBB0_21:
	movq	_tonga_smu_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 24(%rbx)
	movq	%rbx, %rdi
	callq	_tonga_set_asic_special_caps
	movq	_PP_VBI_TIME_SUPPORT_MASK@GOTPCREL(%rip), %rax
LBB0_22:
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 12(%rbx)
LBB0_23:
	movq	%rbx, %rdi
	callq	_smu7_init_function_pointers
LBB0_24:
	xorl	%eax, %eax
LBB0_25:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
LBB0_26:
	movq	_fiji_smu_funcs@GOTPCREL(%rip), %rax
	movq	%rax, 24(%rbx)
	movq	%rbx, %rdi
	callq	_fiji_set_asic_special_caps
	movq	_PP_VBI_TIME_SUPPORT_MASK@GOTPCREL(%rip), %rax
	movq	_PP_ENABLE_GFX_CG_THRU_SMU@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	notl	%ecx
	andl	%ecx, 12(%rbx)
	jmp	LBB0_23
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
LJTI0_0:
	.long	L0_0_set_3
	.long	L0_0_set_6
	.long	L0_0_set_8
	.long	L0_0_set_9
	.long	L0_0_set_11
.set L0_1_set_18, LBB0_18-LJTI0_1
.set L0_1_set_15, LBB0_15-LJTI0_1
.set L0_1_set_20, LBB0_20-LJTI0_1
.set L0_1_set_21, LBB0_21-LJTI0_1
.set L0_1_set_5, LBB0_5-LJTI0_1
.set L0_1_set_26, LBB0_26-LJTI0_1
LJTI0_1:
	.long	L0_1_set_18
	.long	L0_1_set_15
	.long	L0_1_set_15
	.long	L0_1_set_15
	.long	L0_1_set_20
	.long	L0_1_set_21
	.long	L0_1_set_15
	.long	L0_1_set_5
	.long	L0_1_set_5
	.long	L0_1_set_5
	.long	L0_1_set_26
	.end_data_region
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_AMD_MAX_USEC_TIMEOUT,4,2       ## @AMD_MAX_USEC_TIMEOUT
	.comm	_PP_TABLE_V1,8,3                ## @PP_TABLE_V1
	.comm	_AMD_DPM_FORCED_LEVEL_AUTO,8,3  ## @AMD_DPM_FORCED_LEVEL_AUTO
	.comm	_ci_smu_funcs,4,2               ## @ci_smu_funcs
	.comm	_PP_VBI_TIME_SUPPORT_MASK,4,2   ## @PP_VBI_TIME_SUPPORT_MASK
	.comm	_PP_ENABLE_GFX_CG_THRU_SMU,4,2  ## @PP_ENABLE_GFX_CG_THRU_SMU
	.comm	_PP_GFXOFF_MASK,4,2             ## @PP_GFXOFF_MASK
	.comm	_PP_TABLE_V0,8,3                ## @PP_TABLE_V0
	.comm	_smu8_smu_funcs,4,2             ## @smu8_smu_funcs
	.comm	_iceland_smu_funcs,4,2          ## @iceland_smu_funcs
	.comm	_tonga_smu_funcs,4,2            ## @tonga_smu_funcs
	.comm	_fiji_smu_funcs,4,2             ## @fiji_smu_funcs
	.comm	_polaris10_smu_funcs,4,2        ## @polaris10_smu_funcs
	.comm	_PP_UVD_HANDSHAKE_MASK,4,2      ## @PP_UVD_HANDSHAKE_MASK
	.comm	_vegam_smu_funcs,4,2            ## @vegam_smu_funcs
	.comm	_vega10_smu_funcs,4,2           ## @vega10_smu_funcs
	.comm	_vega12_smu_funcs,4,2           ## @vega12_smu_funcs
	.comm	_vega20_smu_funcs,4,2           ## @vega20_smu_funcs
	.comm	_smu10_smu_funcs,4,2            ## @smu10_smu_funcs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_hwmgr_early_init               ; -- Begin function hwmgr_early_init
	.p2align	2
_hwmgr_early_init:                      ; @hwmgr_early_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	cbz	x0, LBB0_15
; %bb.1:
	mov	x19, x0
Lloh0:
	adrp	x8, _AMD_MAX_USEC_TIMEOUT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMD_MAX_USEC_TIMEOUT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [x0, #64]
Lloh3:
	adrp	x8, _PP_TABLE_V1@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PP_TABLE_V1@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
Lloh6:
	adrp	x9, _AMD_DPM_FORCED_LEVEL_AUTO@GOTPAGE
Lloh7:
	ldr	x9, [x9, _AMD_DPM_FORCED_LEVEL_AUTO@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	stp	x9, x9, [x0, #48]
	str	x8, [x0, #40]
	bl	_hwmgr_init_default_caps
	mov	x0, x19
	bl	_hwmgr_set_user_specify_caps
	mov	w8, #1
	str	w8, [x19]
	mov	x0, x19
	bl	_hwmgr_init_workload_prority
	str	wzr, [x19, #4]
	ldr	w8, [x19, #8]
	sub	w8, w8, #139
	cmp	w8, #4
	b.hi	LBB0_15
; %bb.2:
Lloh9:
	adrp	x9, lJTI0_0@PAGE
Lloh10:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_3
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_3:
Lloh11:
	adrp	x8, _PP_GFXOFF_MASK@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PP_GFXOFF_MASK@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	ldr	w9, [x19, #12]
	bic	w8, w9, w8
	str	w8, [x19, #12]
	ldr	w8, [x19, #32]
	sub	w8, w8, #128
	cmp	w8, #10
	b.hi	LBB0_15
; %bb.4:
Lloh14:
	adrp	x9, lJTI0_1@PAGE
Lloh15:
	add	x9, x9, lJTI0_1@PAGEOFF
	adr	x10, LBB0_5
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_5:
Lloh16:
	adrp	x8, _polaris10_smu_funcs@GOTPAGE
Lloh17:
	ldr	x8, [x8, _polaris10_smu_funcs@GOTPAGEOFF]
	b	LBB0_19
LBB0_6:
	ldr	w8, [x19, #32]
	cmp	w8, #134
	b.ne	LBB0_15
; %bb.7:
	str	wzr, [x19, #16]
Lloh18:
	adrp	x8, _smu10_smu_funcs@GOTPAGE
Lloh19:
	ldr	x8, [x8, _smu10_smu_funcs@GOTPAGEOFF]
	str	x8, [x19, #24]
	mov	x0, x19
	bl	_smu10_init_function_pointers
	b	LBB0_25
LBB0_8:
Lloh20:
	adrp	x8, _smu8_smu_funcs@GOTPAGE
Lloh21:
	ldr	x8, [x8, _smu8_smu_funcs@GOTPAGEOFF]
Lloh22:
	adrp	x9, _PP_GFXOFF_MASK@GOTPAGE
Lloh23:
	ldr	x9, [x9, _PP_GFXOFF_MASK@GOTPAGEOFF]
	str	x8, [x19, #24]
Lloh24:
	ldr	w8, [x9]
	ldr	w9, [x19, #12]
	bic	w8, w9, w8
	stp	w8, wzr, [x19, #12]
	mov	x0, x19
	bl	_smu8_init_function_pointers
	b	LBB0_25
LBB0_9:
Lloh25:
	adrp	x8, _ci_smu_funcs@GOTPAGE
Lloh26:
	ldr	x8, [x8, _ci_smu_funcs@GOTPAGEOFF]
	str	x8, [x19, #24]
	mov	x0, x19
	bl	_ci_set_asic_special_caps
Lloh27:
	adrp	x8, _PP_VBI_TIME_SUPPORT_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _PP_VBI_TIME_SUPPORT_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
Lloh30:
	adrp	x9, _PP_ENABLE_GFX_CG_THRU_SMU@GOTPAGE
Lloh31:
	ldr	x9, [x9, _PP_ENABLE_GFX_CG_THRU_SMU@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh33:
	adrp	x9, _PP_GFXOFF_MASK@GOTPAGE
Lloh34:
	ldr	x9, [x9, _PP_GFXOFF_MASK@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	orr	w8, w8, w9
LBB0_10:
	ldr	w9, [x19, #12]
	bic	w8, w9, w8
Lloh36:
	adrp	x9, _PP_TABLE_V0@GOTPAGE
Lloh37:
	ldr	x9, [x9, _PP_TABLE_V0@GOTPAGEOFF]
Lloh38:
	ldr	x9, [x9]
	str	x9, [x19, #40]
	stp	w8, wzr, [x19, #12]
	b	LBB0_24
LBB0_11:
	ldr	w8, [x19, #32]
	cmp	w8, #129
	b.eq	LBB0_16
; %bb.12:
	cmp	w8, #130
	b.eq	LBB0_17
; %bb.13:
	cmp	w8, #131
	b.ne	LBB0_15
; %bb.14:
Lloh39:
	adrp	x8, _PP_GFXOFF_MASK@GOTPAGE
Lloh40:
	ldr	x8, [x8, _PP_GFXOFF_MASK@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	ldr	w9, [x19, #12]
	bic	w8, w9, w8
	str	w8, [x19, #12]
Lloh42:
	adrp	x8, _vega10_smu_funcs@GOTPAGE
Lloh43:
	ldr	x8, [x8, _vega10_smu_funcs@GOTPAGEOFF]
	str	x8, [x19, #24]
	mov	x0, x19
	bl	_vega10_hwmgr_init
	b	LBB0_25
LBB0_15:
Lloh44:
	adrp	x8, _EINVAL@GOTPAGE
Lloh45:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_26
LBB0_16:
Lloh47:
	adrp	x8, _PP_GFXOFF_MASK@GOTPAGE
Lloh48:
	ldr	x8, [x8, _PP_GFXOFF_MASK@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	ldr	w9, [x19, #12]
	bic	w8, w9, w8
	str	w8, [x19, #12]
Lloh50:
	adrp	x8, _vega20_smu_funcs@GOTPAGE
Lloh51:
	ldr	x8, [x8, _vega20_smu_funcs@GOTPAGEOFF]
	str	x8, [x19, #24]
	mov	x0, x19
	bl	_vega20_hwmgr_init
	b	LBB0_25
LBB0_17:
Lloh52:
	adrp	x8, _vega12_smu_funcs@GOTPAGE
Lloh53:
	ldr	x8, [x8, _vega12_smu_funcs@GOTPAGEOFF]
	str	x8, [x19, #24]
	mov	x0, x19
	bl	_vega12_hwmgr_init
	b	LBB0_25
LBB0_18:
Lloh54:
	adrp	x8, _vegam_smu_funcs@GOTPAGE
Lloh55:
	ldr	x8, [x8, _vegam_smu_funcs@GOTPAGEOFF]
LBB0_19:
	str	x8, [x19, #24]
	mov	x0, x19
	bl	_polaris_set_asic_special_caps
Lloh56:
	adrp	x8, _PP_UVD_HANDSHAKE_MASK@GOTPAGE
Lloh57:
	ldr	x8, [x8, _PP_UVD_HANDSHAKE_MASK@GOTPAGEOFF]
	b	LBB0_22
LBB0_20:
Lloh58:
	adrp	x8, _iceland_smu_funcs@GOTPAGE
Lloh59:
	ldr	x8, [x8, _iceland_smu_funcs@GOTPAGEOFF]
	str	x8, [x19, #24]
	mov	x0, x19
	bl	_topaz_set_asic_special_caps
Lloh60:
	adrp	x8, _PP_VBI_TIME_SUPPORT_MASK@GOTPAGE
Lloh61:
	ldr	x8, [x8, _PP_VBI_TIME_SUPPORT_MASK@GOTPAGEOFF]
Lloh62:
	ldr	w8, [x8]
Lloh63:
	adrp	x9, _PP_ENABLE_GFX_CG_THRU_SMU@GOTPAGE
Lloh64:
	ldr	x9, [x9, _PP_ENABLE_GFX_CG_THRU_SMU@GOTPAGEOFF]
Lloh65:
	ldr	w9, [x9]
	orr	w8, w9, w8
	b	LBB0_10
LBB0_21:
Lloh66:
	adrp	x8, _tonga_smu_funcs@GOTPAGE
Lloh67:
	ldr	x8, [x8, _tonga_smu_funcs@GOTPAGEOFF]
	str	x8, [x19, #24]
	mov	x0, x19
	bl	_tonga_set_asic_special_caps
Lloh68:
	adrp	x8, _PP_VBI_TIME_SUPPORT_MASK@GOTPAGE
Lloh69:
	ldr	x8, [x8, _PP_VBI_TIME_SUPPORT_MASK@GOTPAGEOFF]
LBB0_22:
	ldr	w8, [x8]
LBB0_23:
	ldr	w9, [x19, #12]
	bic	w8, w9, w8
	str	w8, [x19, #12]
LBB0_24:
	mov	x0, x19
	bl	_smu7_init_function_pointers
LBB0_25:
	mov	w0, #0
LBB0_26:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_27:
Lloh70:
	adrp	x8, _fiji_smu_funcs@GOTPAGE
Lloh71:
	ldr	x8, [x8, _fiji_smu_funcs@GOTPAGEOFF]
	str	x8, [x19, #24]
	mov	x0, x19
	bl	_fiji_set_asic_special_caps
Lloh72:
	adrp	x8, _PP_VBI_TIME_SUPPORT_MASK@GOTPAGE
Lloh73:
	ldr	x8, [x8, _PP_VBI_TIME_SUPPORT_MASK@GOTPAGEOFF]
Lloh74:
	adrp	x9, _PP_ENABLE_GFX_CG_THRU_SMU@GOTPAGE
Lloh75:
	ldr	x9, [x9, _PP_ENABLE_GFX_CG_THRU_SMU@GOTPAGEOFF]
Lloh76:
	ldr	w8, [x8]
Lloh77:
	ldr	w9, [x9]
	orr	w8, w9, w8
	b	LBB0_23
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh77
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh76
	.loh AdrpLdrGot	Lloh70, Lloh71
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_6-LBB0_3)>>2
	.byte	(LBB0_8-LBB0_3)>>2
	.byte	(LBB0_9-LBB0_3)>>2
	.byte	(LBB0_11-LBB0_3)>>2
lJTI0_1:
	.byte	(LBB0_18-LBB0_5)>>2
	.byte	(LBB0_15-LBB0_5)>>2
	.byte	(LBB0_15-LBB0_5)>>2
	.byte	(LBB0_15-LBB0_5)>>2
	.byte	(LBB0_20-LBB0_5)>>2
	.byte	(LBB0_21-LBB0_5)>>2
	.byte	(LBB0_15-LBB0_5)>>2
	.byte	(LBB0_5-LBB0_5)>>2
	.byte	(LBB0_5-LBB0_5)>>2
	.byte	(LBB0_5-LBB0_5)>>2
	.byte	(LBB0_27-LBB0_5)>>2
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_AMD_MAX_USEC_TIMEOUT,4,2       ; @AMD_MAX_USEC_TIMEOUT
	.comm	_PP_TABLE_V1,8,3                ; @PP_TABLE_V1
	.comm	_AMD_DPM_FORCED_LEVEL_AUTO,8,3  ; @AMD_DPM_FORCED_LEVEL_AUTO
	.comm	_ci_smu_funcs,4,2               ; @ci_smu_funcs
	.comm	_PP_VBI_TIME_SUPPORT_MASK,4,2   ; @PP_VBI_TIME_SUPPORT_MASK
	.comm	_PP_ENABLE_GFX_CG_THRU_SMU,4,2  ; @PP_ENABLE_GFX_CG_THRU_SMU
	.comm	_PP_GFXOFF_MASK,4,2             ; @PP_GFXOFF_MASK
	.comm	_PP_TABLE_V0,8,3                ; @PP_TABLE_V0
	.comm	_smu8_smu_funcs,4,2             ; @smu8_smu_funcs
	.comm	_iceland_smu_funcs,4,2          ; @iceland_smu_funcs
	.comm	_tonga_smu_funcs,4,2            ; @tonga_smu_funcs
	.comm	_fiji_smu_funcs,4,2             ; @fiji_smu_funcs
	.comm	_polaris10_smu_funcs,4,2        ; @polaris10_smu_funcs
	.comm	_PP_UVD_HANDSHAKE_MASK,4,2      ; @PP_UVD_HANDSHAKE_MASK
	.comm	_vegam_smu_funcs,4,2            ; @vegam_smu_funcs
	.comm	_vega10_smu_funcs,4,2           ; @vega10_smu_funcs
	.comm	_vega12_smu_funcs,4,2           ; @vega12_smu_funcs
	.comm	_vega20_smu_funcs,4,2           ; @vega20_smu_funcs
	.comm	_smu10_smu_funcs,4,2            ; @smu10_smu_funcs
.subsections_via_symbols
