	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rv6xx_output_stepping
_rv6xx_output_stepping:                 ## @rv6xx_output_stepping
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movl	%esi, %r14d
	movq	%rdi, %r13
	callq	_rv6xx_get_pi
	movq	%rax, %r12
	movl	(%r13), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_R600_SPLLSTEPTIME_DFLT@GOTPCREL(%rip), %rax
	movl	(%r12), %esi
	imull	(%rax), %esi
	movq	_R600_SPLLSTEPUNIT_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	callq	_rv6xx_scale_count_given_unit
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$1, %edx
	callq	_r600_engine_clock_entry_enable
	movq	%r13, %rdi
	movl	%r14d, %esi
	xorl	%edx, %edx
	callq	_r600_engine_clock_entry_enable_pulse_skipping
	movl	(%r15), %eax
	cmpl	$1, %eax
	jne	LBB0_2
## %bb.1:
	movq	%r13, %rdi
	movl	%r14d, %esi
	xorl	%edx, %edx
	callq	_r600_engine_clock_entry_enable_post_divider
	jmp	LBB0_3
LBB0_2:
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	movl	%eax, %r15d
	addl	$-2, %r15d
	movl	%r15d, %ecx
	shrl	$31, %ecx
	leal	(%rax,%rcx), %ebx
	addl	$-2, %ebx
	sarl	%ebx
	subl	%ebx, %r15d
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	$1, %edx
	callq	_r600_engine_clock_entry_enable_post_divider
	shll	$4, %r15d
	orl	%ebx, %r15d
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	callq	_r600_engine_clock_entry_set_post_divider
LBB0_3:
	movl	(%r12), %ebx
	movl	4(%r15), %eax
	imull	%ebx, %eax
	cltd
	idivl	-44(%rbp)                       ## 4-byte Folded Reload
	movl	%eax, %r15d
	movb	4(%r12), %cl
	sarl	%cl, %r15d
	decl	%ebx
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_r600_engine_clock_entry_set_reference_divider
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	callq	_r600_engine_clock_entry_set_feedback_divider
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_r600_engine_clock_entry_set_step_time ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_R600_SPLLSTEPTIME_DFLT,4,2     ## @R600_SPLLSTEPTIME_DFLT
	.comm	_R600_SPLLSTEPUNIT_DFLT,4,2     ## @R600_SPLLSTEPUNIT_DFLT
	.no_dead_strip	_rv6xx_output_stepping
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rv6xx_output_stepping
_rv6xx_output_stepping:                 ; @rv6xx_output_stepping
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x2
	mov	x19, x1
	mov	x20, x0
	bl	_rv6xx_get_pi
	mov	x23, x0
	ldr	w24, [x20]
Lloh0:
	adrp	x8, _R600_SPLLSTEPTIME_DFLT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _R600_SPLLSTEPTIME_DFLT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	ldr	w9, [x0]
	mul	w1, w9, w8
Lloh3:
	adrp	x8, _R600_SPLLSTEPUNIT_DFLT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _R600_SPLLSTEPUNIT_DFLT@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_rv6xx_scale_count_given_unit
	mov	x21, x0
	mov	x0, x20
	mov	x1, x19
	mov	w2, #1
	bl	_r600_engine_clock_entry_enable
	mov	x0, x20
	mov	x1, x19
	mov	w2, #0
	bl	_r600_engine_clock_entry_enable_pulse_skipping
	ldr	w9, [x22]
	subs	w8, w9, #1
	b.ne	LBB0_2
; %bb.1:
	mov	x0, x20
	mov	x1, x19
	mov	w2, #0
	bl	_r600_engine_clock_entry_enable_post_divider
	b	LBB0_3
LBB0_2:
	sub	w9, w9, #2
	cmp	w9, #0
	csel	w8, w8, w9, lt
	asr	w25, w8, #1
	sub	w26, w9, w25
	mov	x0, x20
	mov	x1, x19
	mov	w2, #1
	bl	_r600_engine_clock_entry_enable_post_divider
	orr	w2, w25, w26, lsl #4
	mov	x0, x20
	mov	x1, x19
	bl	_r600_engine_clock_entry_set_post_divider
LBB0_3:
	ldr	w8, [x22, #4]
	ldp	w9, w10, [x23]
	mul	w8, w9, w8
	sdiv	w8, w8, w24
	asr	w22, w8, w10
	sub	w2, w9, #1
	mov	x0, x20
	mov	x1, x19
	bl	_r600_engine_clock_entry_set_reference_divider
	mov	x0, x20
	mov	x1, x19
	mov	x2, x22
	bl	_r600_engine_clock_entry_set_feedback_divider
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_r600_engine_clock_entry_set_step_time
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_R600_SPLLSTEPTIME_DFLT,4,2     ; @R600_SPLLSTEPTIME_DFLT
	.comm	_R600_SPLLSTEPUNIT_DFLT,4,2     ; @R600_SPLLSTEPUNIT_DFLT
	.no_dead_strip	_rv6xx_output_stepping
.subsections_via_symbols
