	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v7_0_init_microcode
_gfx_v7_0_init_microcode:               ## @gfx_v7_0_init_microcode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG
	movl	(%r13), %eax
	addl	$-128, %eax
	cmpl	$5, %eax
	jae	LBB0_1
## %bb.2:
	cltq
	leaq	l_reltable.gfx_v7_0_init_microcode(%rip), %rcx
	movslq	(%rcx,%rax,4), %r14
	addq	%rcx, %r14
	jmp	LBB0_3
LBB0_1:
	xorl	%eax, %eax
	callq	_BUG
                                        ## implicit-def: $r14
LBB0_3:
	leaq	L_.str.6(%rip), %rdx
	leaq	-80(%rbp), %r15
	movq	%r15, %rdi
	movl	$30, %esi
	movq	%r14, %rcx
	callq	_snprintf
	leaq	48(%r13), %rbx
	movl	56(%r13), %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_request_firmware
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.4:
	movq	(%rbx), %rdi
	callq	_amdgpu_ucode_validate
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.5:
	leaq	L_.str.7(%rip), %rdx
	leaq	-80(%rbp), %r15
	movq	%r15, %rdi
	movl	$30, %esi
	movq	%r14, %rcx
	callq	_snprintf
	leaq	40(%r13), %rbx
	movl	56(%r13), %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_request_firmware
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.6:
	movq	(%rbx), %rdi
	callq	_amdgpu_ucode_validate
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.7:
	leaq	L_.str.8(%rip), %rdx
	leaq	-80(%rbp), %r15
	movq	%r15, %rdi
	movl	$30, %esi
	movq	%r14, %rcx
	callq	_snprintf
	leaq	32(%r13), %rbx
	movl	56(%r13), %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_request_firmware
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.8:
	movq	(%rbx), %rdi
	callq	_amdgpu_ucode_validate
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.9:
	leaq	L_.str.9(%rip), %rdx
	leaq	-80(%rbp), %r15
	movq	%r15, %rdi
	movl	$30, %esi
	movq	%r14, %rcx
	callq	_snprintf
	leaq	24(%r13), %rbx
	movl	56(%r13), %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_request_firmware
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.10:
	movq	(%rbx), %rdi
	callq	_amdgpu_ucode_validate
	movl	%eax, %r15d
	testl	%eax, %eax
	je	LBB0_11
LBB0_17:
	leaq	L_.str.12(%rip), %rdi
	leaq	-80(%rbp), %rsi
	callq	_pr_err
	movq	48(%r13), %rdi
	callq	_release_firmware
	movq	$0, 48(%r13)
	movq	40(%r13), %rdi
	callq	_release_firmware
	movq	$0, 40(%r13)
	movq	32(%r13), %rdi
	callq	_release_firmware
	movq	$0, 32(%r13)
	movq	24(%r13), %rdi
	callq	_release_firmware
	movq	$0, 24(%r13)
	movq	16(%r13), %rdi
	callq	_release_firmware
	movq	$0, 16(%r13)
	movq	8(%r13), %rdi
	callq	_release_firmware
	movq	$0, 8(%r13)
LBB0_18:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_20
## %bb.19:
	movl	%r15d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_11:
	cmpl	$129, (%r13)
	jne	LBB0_14
## %bb.12:
	leaq	L_.str.10(%rip), %rdx
	leaq	-80(%rbp), %r15
	movq	%r15, %rdi
	movl	$30, %esi
	movq	%r14, %rcx
	callq	_snprintf
	leaq	16(%r13), %rbx
	movl	56(%r13), %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_request_firmware
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.13:
	movq	(%rbx), %rdi
	callq	_amdgpu_ucode_validate
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
LBB0_14:
	leaq	8(%r13), %r12
	leaq	L_.str.11(%rip), %rdx
	leaq	-80(%rbp), %rbx
	movq	%rbx, %rdi
	movl	$30, %esi
	movq	%r14, %rcx
	callq	_snprintf
	movl	56(%r13), %edx
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_request_firmware
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.15:
	movq	(%r12), %rdi
	callq	_amdgpu_ucode_validate
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.16:
	xorl	%r15d, %r15d
	jmp	LBB0_18
LBB0_20:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\n"

L_.str.1:                               ## @.str.1
	.asciz	"bonaire"

L_.str.2:                               ## @.str.2
	.asciz	"hawaii"

L_.str.3:                               ## @.str.3
	.asciz	"kaveri"

L_.str.4:                               ## @.str.4
	.asciz	"kabini"

L_.str.5:                               ## @.str.5
	.asciz	"mullins"

L_.str.6:                               ## @.str.6
	.asciz	"amdgpu/%s_pfp.bin"

L_.str.7:                               ## @.str.7
	.asciz	"amdgpu/%s_me.bin"

L_.str.8:                               ## @.str.8
	.asciz	"amdgpu/%s_ce.bin"

L_.str.9:                               ## @.str.9
	.asciz	"amdgpu/%s_mec.bin"

L_.str.10:                              ## @.str.10
	.asciz	"amdgpu/%s_mec2.bin"

L_.str.11:                              ## @.str.11
	.asciz	"amdgpu/%s_rlc.bin"

L_.str.12:                              ## @.str.12
	.asciz	"gfx7: Failed to load firmware \"%s\"\n"

	.no_dead_strip	_gfx_v7_0_init_microcode
	.section	__TEXT,__const
	.p2align	2                               ## @reltable.gfx_v7_0_init_microcode
l_reltable.gfx_v7_0_init_microcode:
	.long	L_.str.5-l_reltable.gfx_v7_0_init_microcode
	.long	L_.str.3-l_reltable.gfx_v7_0_init_microcode
	.long	L_.str.4-l_reltable.gfx_v7_0_init_microcode
	.long	L_.str.2-l_reltable.gfx_v7_0_init_microcode
	.long	L_.str.1-l_reltable.gfx_v7_0_init_microcode

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v7_0_init_microcode
_gfx_v7_0_init_microcode:               ; @gfx_v7_0_init_microcode
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #40]
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x19]
	sub	w8, w8, #128
	cmp	w8, #5
	b.hs	LBB0_2
; %bb.1:
Lloh5:
	adrp	x9, l_switch.table.gfx_v7_0_init_microcode@PAGE
Lloh6:
	add	x9, x9, l_switch.table.gfx_v7_0_init_microcode@PAGEOFF
	ldr	x20, [x9, w8, sxtw #3]
	b	LBB0_3
LBB0_2:
	bl	_BUG
                                        ; implicit-def: $x20
LBB0_3:
Lloh7:
	adrp	x2, l_.str.6@PAGE
Lloh8:
	add	x2, x2, l_.str.6@PAGEOFF
	add	x0, sp, #10
	mov	w1, #30
	mov	x3, x20
	bl	_snprintf
	add	x22, x19, #48
	ldr	w2, [x19, #56]
	add	x1, sp, #10
	mov	x0, x22
	bl	_request_firmware
	mov	x21, x0
	cbnz	w0, LBB0_11
; %bb.4:
	ldr	x0, [x22]
	bl	_amdgpu_ucode_validate
	mov	x21, x0
	cbnz	w0, LBB0_11
; %bb.5:
Lloh9:
	adrp	x2, l_.str.7@PAGE
Lloh10:
	add	x2, x2, l_.str.7@PAGEOFF
	add	x0, sp, #10
	mov	w1, #30
	mov	x3, x20
	bl	_snprintf
	add	x22, x19, #40
	ldr	w2, [x19, #56]
	add	x1, sp, #10
	mov	x0, x22
	bl	_request_firmware
	mov	x21, x0
	cbnz	w0, LBB0_11
; %bb.6:
	ldr	x0, [x22]
	bl	_amdgpu_ucode_validate
	mov	x21, x0
	cbnz	w0, LBB0_11
; %bb.7:
Lloh11:
	adrp	x2, l_.str.8@PAGE
Lloh12:
	add	x2, x2, l_.str.8@PAGEOFF
	add	x0, sp, #10
	mov	w1, #30
	mov	x3, x20
	bl	_snprintf
	add	x22, x19, #32
	ldr	w2, [x19, #56]
	add	x1, sp, #10
	mov	x0, x22
	bl	_request_firmware
	mov	x21, x0
	cbnz	w0, LBB0_11
; %bb.8:
	ldr	x0, [x22]
	bl	_amdgpu_ucode_validate
	mov	x21, x0
	cbnz	w0, LBB0_11
; %bb.9:
Lloh13:
	adrp	x2, l_.str.9@PAGE
Lloh14:
	add	x2, x2, l_.str.9@PAGEOFF
	add	x0, sp, #10
	mov	w1, #30
	mov	x3, x20
	bl	_snprintf
	add	x22, x19, #24
	ldr	w2, [x19, #56]
	add	x1, sp, #10
	mov	x0, x22
	bl	_request_firmware
	mov	x21, x0
	cbnz	w0, LBB0_11
; %bb.10:
	ldr	x0, [x22]
	bl	_amdgpu_ucode_validate
	mov	x21, x0
	cbz	w0, LBB0_14
LBB0_11:
Lloh15:
	adrp	x0, l_.str.12@PAGE
Lloh16:
	add	x0, x0, l_.str.12@PAGEOFF
	add	x1, sp, #10
	bl	_pr_err
	ldr	x0, [x19, #48]
	bl	_release_firmware
	str	xzr, [x19, #48]
	ldr	x0, [x19, #40]
	bl	_release_firmware
	str	xzr, [x19, #40]
	ldr	x0, [x19, #32]
	bl	_release_firmware
	str	xzr, [x19, #32]
	ldr	x0, [x19, #24]
	bl	_release_firmware
	str	xzr, [x19, #24]
	ldr	x0, [x19, #16]
	bl	_release_firmware
	str	xzr, [x19, #16]
	ldr	x0, [x19, #8]
	bl	_release_firmware
	str	xzr, [x19, #8]
LBB0_12:
	ldr	x8, [sp, #40]
Lloh17:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh18:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh19:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_19
; %bb.13:
	mov	x0, x21
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_14:
	ldr	w8, [x19]
	cmp	w8, #129
	b.ne	LBB0_17
; %bb.15:
Lloh20:
	adrp	x2, l_.str.10@PAGE
Lloh21:
	add	x2, x2, l_.str.10@PAGEOFF
	add	x0, sp, #10
	mov	w1, #30
	mov	x3, x20
	bl	_snprintf
	add	x22, x19, #16
	ldr	w2, [x19, #56]
	add	x1, sp, #10
	mov	x0, x22
	bl	_request_firmware
	mov	x21, x0
	cbnz	w0, LBB0_11
; %bb.16:
	ldr	x0, [x22]
	bl	_amdgpu_ucode_validate
	mov	x21, x0
	cbnz	w0, LBB0_11
LBB0_17:
	add	x8, x19, #8
Lloh22:
	adrp	x2, l_.str.11@PAGE
Lloh23:
	add	x2, x2, l_.str.11@PAGEOFF
	add	x0, sp, #10
	mov	w1, #30
	mov	x3, x20
	mov	x20, x8
	bl	_snprintf
	ldr	w2, [x19, #56]
	add	x1, sp, #10
	mov	x0, x20
	bl	_request_firmware
	mov	x21, x0
	cbnz	w0, LBB0_11
; %bb.18:
	ldr	x0, [x20]
	bl	_amdgpu_ucode_validate
	mov	x21, x0
	cbnz	w0, LBB0_11
	b	LBB0_12
LBB0_19:
	bl	___stack_chk_fail
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\n"

l_.str.1:                               ; @.str.1
	.asciz	"bonaire"

l_.str.2:                               ; @.str.2
	.asciz	"hawaii"

l_.str.3:                               ; @.str.3
	.asciz	"kaveri"

l_.str.4:                               ; @.str.4
	.asciz	"kabini"

l_.str.5:                               ; @.str.5
	.asciz	"mullins"

l_.str.6:                               ; @.str.6
	.asciz	"amdgpu/%s_pfp.bin"

l_.str.7:                               ; @.str.7
	.asciz	"amdgpu/%s_me.bin"

l_.str.8:                               ; @.str.8
	.asciz	"amdgpu/%s_ce.bin"

l_.str.9:                               ; @.str.9
	.asciz	"amdgpu/%s_mec.bin"

l_.str.10:                              ; @.str.10
	.asciz	"amdgpu/%s_mec2.bin"

l_.str.11:                              ; @.str.11
	.asciz	"amdgpu/%s_rlc.bin"

l_.str.12:                              ; @.str.12
	.asciz	"gfx7: Failed to load firmware \"%s\"\n"

	.no_dead_strip	_gfx_v7_0_init_microcode
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.gfx_v7_0_init_microcode
l_switch.table.gfx_v7_0_init_microcode:
	.quad	l_.str.5
	.quad	l_.str.3
	.quad	l_.str.4
	.quad	l_.str.2
	.quad	l_.str.1

.subsections_via_symbols
