	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_atombios_dp_link_train  ## -- Begin function amdgpu_atombios_dp_link_train
	.p2align	4, 0x90
_amdgpu_atombios_dp_link_train:         ## @amdgpu_atombios_dp_link_train
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	(%rax), %r12
	callq	_to_amdgpu_encoder
	cmpq	$0, (%rax)
	je	LBB0_12
## %bb.1:
	movq	%r14, %rdi
	callq	_to_amdgpu_connector
	movq	8(%rax), %r13
	testq	%r13, %r13
	je	LBB0_12
## %bb.2:
	movq	%rax, %r15
	movq	(%r13), %rax
	movq	_CONNECTOR_OBJECT_ID_DISPLAYPORT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_4
## %bb.3:
	movq	_CONNECTOR_OBJECT_ID_eDP@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_12
LBB0_4:
	movq	(%r15), %rdi
	movq	_DP_MAX_LANE_COUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	callq	_drm_dp_dpcd_readb
	cmpl	$1, %eax
	jne	LBB0_7
## %bb.5:
	movq	_DP_TPS3_SUPPORTED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, -44(%rbp)
	je	LBB0_7
## %bb.6:
	movl	$1, -104(%rbp)
	jmp	LBB0_8
LBB0_7:
	movl	$0, -104(%rbp)
LBB0_8:
	movl	16(%r13), %esi
	movq	_DP_RECEIVER_CAP_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_memcpy
	movq	%r12, -64(%rbp)
	movq	%rbx, -72(%rbp)
	movq	%r14, -80(%rbp)
	movl	12(%r13), %eax
	movl	%eax, -84(%rbp)
	movl	8(%r13), %eax
	movl	%eax, -88(%rbp)
	movq	(%r15), %rax
	movq	%rax, -96(%rbp)
	leaq	-104(%rbp), %rdi
	callq	_amdgpu_atombios_dp_link_train_init
	testq	%rax, %rax
	jne	LBB0_11
## %bb.9:
	leaq	-104(%rbp), %rdi
	callq	_amdgpu_atombios_dp_link_train_cr
	testq	%rax, %rax
	jne	LBB0_11
## %bb.10:
	leaq	-104(%rbp), %rdi
	callq	_amdgpu_atombios_dp_link_train_ce
LBB0_11:
	leaq	-104(%rbp), %rdi
	callq	_amdgpu_atombios_dp_link_train_finish
LBB0_12:
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CONNECTOR_OBJECT_ID_DISPLAYPORT,8,3 ## @CONNECTOR_OBJECT_ID_DISPLAYPORT
	.comm	_CONNECTOR_OBJECT_ID_eDP,8,3    ## @CONNECTOR_OBJECT_ID_eDP
	.comm	_DP_MAX_LANE_COUNT,4,2          ## @DP_MAX_LANE_COUNT
	.comm	_DP_TPS3_SUPPORTED,4,2          ## @DP_TPS3_SUPPORTED
	.comm	_DP_RECEIVER_CAP_SIZE,4,2       ## @DP_RECEIVER_CAP_SIZE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_atombios_dp_link_train  ; -- Begin function amdgpu_atombios_dp_link_train
	.p2align	2
_amdgpu_atombios_dp_link_train:         ; @amdgpu_atombios_dp_link_train
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
	ldr	x8, [x0]
	ldr	x22, [x8]
	bl	_to_amdgpu_encoder
	ldr	x8, [x0]
	cbz	x8, LBB0_11
; %bb.1:
	mov	x0, x19
	bl	_to_amdgpu_connector
	ldr	x23, [x0, #8]
	cbz	x23, LBB0_11
; %bb.2:
	ldr	x8, [x23]
Lloh0:
	adrp	x9, _CONNECTOR_OBJECT_ID_DISPLAYPORT@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CONNECTOR_OBJECT_ID_DISPLAYPORT@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
Lloh3:
	adrp	x10, _CONNECTOR_OBJECT_ID_eDP@GOTPAGE
Lloh4:
	ldr	x10, [x10, _CONNECTOR_OBJECT_ID_eDP@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	b.ne	LBB0_11
; %bb.3:
	mov	x21, x0
	ldr	x0, [x0]
Lloh6:
	adrp	x8, _DP_MAX_LANE_COUNT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DP_MAX_LANE_COUNT@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	add	x2, sp, #4
	bl	_drm_dp_dpcd_readb
	cmp	w0, #1
	b.ne	LBB0_6
; %bb.4:
	ldr	w8, [sp, #4]
Lloh9:
	adrp	x9, _DP_TPS3_SUPPORTED@GOTPAGE
Lloh10:
	ldr	x9, [x9, _DP_TPS3_SUPPORTED@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.5:
	mov	w8, #1
	str	w8, [sp, #8]
	b	LBB0_7
LBB0_6:
	str	wzr, [sp, #8]
LBB0_7:
	ldr	w1, [x23, #16]
Lloh12:
	adrp	x8, _DP_RECEIVER_CAP_SIZE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _DP_RECEIVER_CAP_SIZE@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	bl	_memcpy
	stp	x20, x22, [sp, #40]
	str	x19, [sp, #32]
	ldr	d0, [x23, #8]
	str	d0, [sp, #24]
	ldr	x8, [x21]
	str	x8, [sp, #16]
	add	x0, sp, #8
	bl	_amdgpu_atombios_dp_link_train_init
	cbnz	x0, LBB0_10
; %bb.8:
	add	x0, sp, #8
	bl	_amdgpu_atombios_dp_link_train_cr
	cbnz	x0, LBB0_10
; %bb.9:
	add	x0, sp, #8
	bl	_amdgpu_atombios_dp_link_train_ce
LBB0_10:
	add	x0, sp, #8
	bl	_amdgpu_atombios_dp_link_train_finish
LBB0_11:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_CONNECTOR_OBJECT_ID_DISPLAYPORT,8,3 ; @CONNECTOR_OBJECT_ID_DISPLAYPORT
	.comm	_CONNECTOR_OBJECT_ID_eDP,8,3    ; @CONNECTOR_OBJECT_ID_eDP
	.comm	_DP_MAX_LANE_COUNT,4,2          ; @DP_MAX_LANE_COUNT
	.comm	_DP_TPS3_SUPPORTED,4,2          ; @DP_TPS3_SUPPORTED
	.comm	_DP_RECEIVER_CAP_SIZE,4,2       ; @DP_RECEIVER_CAP_SIZE
.subsections_via_symbols
