	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function adv7511_dsi_config_timing_gen
_adv7511_dsi_config_timing_gen:         ## @adv7511_dsi_config_timing_gen
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	40(%rdi), %rax
	movl	4(%rdi), %r15d
	movl	8(%rdi), %r14d
	movl	16(%rdi), %r13d
	subl	%r15d, %r13d
	subl	%r14d, %r15d
	subl	12(%rdi), %r14d
	movl	(%rdi), %edi
	movl	20(%rbx), %r12d
	movl	24(%rbx), %edx
	movl	32(%rbx), %ecx
	subl	%r12d, %ecx
	movl	%ecx, -48(%rbp)                 ## 4-byte Spill
	subl	%edx, %r12d
	subl	28(%rbx), %edx
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movslq	(%rax), %rax
	leaq	l___const.adv7511_dsi_config_timing_gen.clock_div_by_lanes(%rip), %rcx
	movl	-8(%rcx,%rax,4), %edx
	shll	$3, %edx
	movl	$22, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	movl	16(%rbx), %edx
	sarl	$4, %edx
	movl	$40, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	movl	16(%rbx), %eax
	shll	$4, %eax
	movzbl	%al, %edx
	movl	$41, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	movl	%r15d, %edx
	shrl	$4, %edx
	movl	$42, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	shll	$4, %r15d
	movzbl	%r15b, %edx
	movl	$43, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	movl	%r14d, %edx
	shrl	$4, %edx
	movl	$44, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	shll	$4, %r14d
	movzbl	%r14b, %edx
	movl	$45, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	movl	%r13d, %edx
	shrl	$4, %edx
	movl	$46, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	shll	$4, %r13d
	movzbl	%r13b, %edx
	movl	$47, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	movl	32(%rbx), %edx
	sarl	$4, %edx
	movl	$48, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	movl	32(%rbx), %eax
	shll	$4, %eax
	movzbl	%al, %edx
	movl	$49, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	movl	%r12d, %edx
	shrl	$4, %edx
	movl	$50, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	shll	$4, %r12d
	movzbl	%r12b, %edx
	movl	$51, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	movl	%r14d, %edx
	shrl	$4, %edx
	movl	$52, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	shll	$4, %r14d
	movzbl	%r14b, %edx
	movl	$53, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	movl	%r14d, %edx
	shrl	$4, %edx
	movl	$54, %esi
	callq	_regmap_write
	movl	(%rbx), %edi
	shll	$4, %r14d
	movzbl	%r14b, %edx
	movl	$55, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_regmap_write                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	2                               ## @__const.adv7511_dsi_config_timing_gen.clock_div_by_lanes
l___const.adv7511_dsi_config_timing_gen.clock_div_by_lanes:
	.long	6                               ## 0x6
	.long	4                               ## 0x4
	.long	3                               ## 0x3

	.no_dead_strip	_adv7511_dsi_config_timing_gen
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function adv7511_dsi_config_timing_gen
_adv7511_dsi_config_timing_gen:         ; @adv7511_dsi_config_timing_gen
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x8, [x0, #40]
	ldp	w9, w10, [x0, #8]
	ldp	w0, w11, [x0]
	sub	w25, w11, w9
	sub	w24, w9, w10
	ldp	w9, w10, [x19, #16]
	sub	w23, w9, w11
	ldp	w9, w11, [x19, #24]
	sub	w22, w10, w9
	sub	w21, w9, w11
	ldr	w9, [x19, #32]
	sub	w20, w9, w10
	ldrsw	x8, [x8]
Lloh0:
	adrp	x9, l___const.adv7511_dsi_config_timing_gen.clock_div_by_lanes@PAGE
Lloh1:
	add	x9, x9, l___const.adv7511_dsi_config_timing_gen.clock_div_by_lanes@PAGEOFF
	add	x8, x9, x8, lsl #2
	ldur	w8, [x8, #-8]
	lsl	w2, w8, #3
	mov	w1, #22
	bl	_regmap_write
	ldr	w0, [x19]
	ldr	w8, [x19, #16]
	asr	w2, w8, #4
	mov	w1, #40
	bl	_regmap_write
	ldr	w0, [x19]
	ldr	w8, [x19, #16]
	ubfiz	w2, w8, #4, #4
	mov	w1, #41
	bl	_regmap_write
	ldr	w0, [x19]
	lsr	w2, w25, #4
	mov	w1, #42
	bl	_regmap_write
	ldr	w0, [x19]
	ubfiz	w2, w25, #4, #4
	mov	w1, #43
	bl	_regmap_write
	ldr	w0, [x19]
	lsr	w2, w24, #4
	mov	w1, #44
	bl	_regmap_write
	ldr	w0, [x19]
	ubfiz	w2, w24, #4, #4
	mov	w1, #45
	bl	_regmap_write
	ldr	w0, [x19]
	lsr	w2, w23, #4
	mov	w1, #46
	bl	_regmap_write
	ldr	w0, [x19]
	ubfiz	w2, w23, #4, #4
	mov	w1, #47
	bl	_regmap_write
	ldr	w0, [x19]
	ldr	w8, [x19, #32]
	asr	w2, w8, #4
	mov	w1, #48
	bl	_regmap_write
	ldr	w0, [x19]
	ldr	w8, [x19, #32]
	ubfiz	w2, w8, #4, #4
	mov	w1, #49
	bl	_regmap_write
	ldr	w0, [x19]
	lsr	w2, w22, #4
	mov	w1, #50
	bl	_regmap_write
	ldr	w0, [x19]
	ubfiz	w2, w22, #4, #4
	mov	w1, #51
	bl	_regmap_write
	ldr	w0, [x19]
	lsr	w2, w21, #4
	mov	w1, #52
	bl	_regmap_write
	ldr	w0, [x19]
	ubfiz	w2, w21, #4, #4
	mov	w1, #53
	bl	_regmap_write
	ldr	w0, [x19]
	lsr	w2, w20, #4
	mov	w1, #54
	bl	_regmap_write
	ldr	w0, [x19]
	ubfiz	w2, w20, #4, #4
	mov	w1, #55
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_regmap_write
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @__const.adv7511_dsi_config_timing_gen.clock_div_by_lanes
l___const.adv7511_dsi_config_timing_gen.clock_div_by_lanes:
	.long	6                               ; 0x6
	.long	4                               ; 0x4
	.long	3                               ; 0x3

	.no_dead_strip	_adv7511_dsi_config_timing_gen
.subsections_via_symbols
