	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdma_v4_0_hw_init
_sdma_v4_0_hw_init:                     ## @sdma_v4_0_hw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	_CHIP_RAVEN@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_3
## %bb.1:
	movq	8(%rbx), %rcx
	testq	%rcx, %rcx
	je	LBB0_3
## %bb.2:
	cmpq	$0, (%rcx)
	jne	LBB0_4
LBB0_3:
	movq	_CHIP_RENOIR@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
LBB0_4:
	movq	_AMD_IP_BLOCK_TYPE_SDMA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_amdgpu_dpm_set_powergating_by_smu
LBB0_5:
	movq	%rbx, %rdi
	callq	_amdgpu_sriov_vf
	testl	%eax, %eax
	jne	LBB0_7
## %bb.6:
	movq	%rbx, %rdi
	callq	_sdma_v4_0_init_golden_registers
LBB0_7:
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_sdma_v4_0_start                ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_RAVEN,8,3                 ## @CHIP_RAVEN
	.comm	_CHIP_RENOIR,8,3                ## @CHIP_RENOIR
	.comm	_AMD_IP_BLOCK_TYPE_SDMA,4,2     ## @AMD_IP_BLOCK_TYPE_SDMA
	.no_dead_strip	_sdma_v4_0_hw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdma_v4_0_hw_init
_sdma_v4_0_hw_init:                     ; @sdma_v4_0_hw_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _CHIP_RAVEN@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_RAVEN@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.1:
	ldr	x9, [x19, #8]
	cbz	x9, LBB0_3
; %bb.2:
	ldr	x9, [x9]
Lloh3:
	adrp	x10, _CHIP_RENOIR@GOTPAGE
Lloh4:
	ldr	x10, [x10, _CHIP_RENOIR@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
	cmp	x9, #0
	ccmp	x8, x10, #4, eq
	b.eq	LBB0_4
	b	LBB0_5
LBB0_3:
Lloh6:
	adrp	x9, _CHIP_RENOIR@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CHIP_RENOIR@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_5
LBB0_4:
Lloh9:
	adrp	x8, _AMD_IP_BLOCK_TYPE_SDMA@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AMD_IP_BLOCK_TYPE_SDMA@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_amdgpu_dpm_set_powergating_by_smu
LBB0_5:
	mov	x0, x19
	bl	_amdgpu_sriov_vf
	cbnz	w0, LBB0_7
; %bb.6:
	mov	x0, x19
	bl	_sdma_v4_0_init_golden_registers
LBB0_7:
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_sdma_v4_0_start
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_RAVEN,8,3                 ; @CHIP_RAVEN
	.comm	_CHIP_RENOIR,8,3                ; @CHIP_RENOIR
	.comm	_AMD_IP_BLOCK_TYPE_SDMA,4,2     ; @AMD_IP_BLOCK_TYPE_SDMA
	.no_dead_strip	_sdma_v4_0_hw_init
.subsections_via_symbols
