	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function stm32f4_adc_clk_sel
_stm32f4_adc_clk_sel:                   ## @stm32f4_adc_clk_sel
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movl	24(%rsi), %edi
	testl	%edi, %edi
	je	LBB0_1
## %bb.2:
	movq	%rsi, %r15
	callq	_clk_get_rate
	testq	%rax, %rax
	je	LBB0_6
## %bb.3:
	movq	%rax, %r12
	movq	_stm32f4_pclk_div@GOTPCREL(%rip), %r13
	movq	(%r13), %rdi
	callq	_ARRAY_SIZE
	xorl	%ebx, %ebx
	testl	%eax, %eax
	jle	LBB0_12
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r13), %rdi
	movq	(%rdi,%rbx,8), %rcx
	movq	%r12, %rax
	orq	%rcx, %rax
	shrq	$32, %rax
	je	LBB0_5
## %bb.9:                               ##   in Loop: Header=BB0_4 Depth=1
	movq	%r12, %rax
	xorl	%edx, %edx
	divq	%rcx
	jmp	LBB0_10
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_4 Depth=1
	movl	%r12d, %eax
	xorl	%edx, %edx
	divl	%ecx
                                        ## kill: def $eax killed $eax def $rax
LBB0_10:                                ##   in Loop: Header=BB0_4 Depth=1
	movq	16(%r15), %rcx
	cmpq	(%rcx), %rax
	jbe	LBB0_12
## %bb.11:                              ##   in Loop: Header=BB0_4 Depth=1
	incq	%rbx
	callq	_ARRAY_SIZE
	cltq
	cmpq	%rax, %rbx
	jl	LBB0_4
LBB0_12:
	movq	(%r13), %rdi
	callq	_ARRAY_SIZE
	cmpl	%eax, %ebx
	jge	LBB0_13
## %bb.14:
	movq	(%r13), %rax
	movl	%ebx, %ecx
	movq	(%rax,%rcx,8), %rcx
	movq	%r12, %rax
	orq	%rcx, %rax
	shrq	$32, %rax
	je	LBB0_15
## %bb.16:
	movq	%r12, %rax
	xorl	%edx, %edx
	divq	%rcx
	jmp	LBB0_17
LBB0_1:
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_err
	movq	_ENOENT@GOTPCREL(%rip), %rcx
	jmp	LBB0_8
LBB0_6:
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_7
LBB0_13:
	leaq	L_.str.2(%rip), %rsi
LBB0_7:
	movq	%r14, %rdi
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rcx
LBB0_8:
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_18:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_15:
	movl	%r12d, %eax
	xorl	%edx, %edx
	divl	%ecx
                                        ## kill: def $eax killed $eax def $rax
LBB0_17:
	movq	%rax, (%r15)
	movq	_STM32F4_ADC_CCR@GOTPCREL(%rip), %r12
	movq	(%r12), %rdi
	addq	8(%r15), %rdi
	callq	_readl_relaxed
	movq	_STM32F4_ADC_ADCPRE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movq	_STM32F4_ADC_ADCPRE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %ebx
	orl	%edx, %ebx
	movq	(%r12), %rsi
	addq	8(%r15), %rsi
	movl	%ebx, %edi
	callq	_writel_relaxed
	movq	(%r15), %rax
	shrq	$3, %rax
	movabsq	$2361183241434822607, %rcx      ## imm = 0x20C49BA5E353F7CF
	mulq	%rcx
	shrq	$4, %rdx
	leaq	L_.str.3(%rip), %rsi
	movq	%r14, %rdi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_dev_dbg
	xorl	%eax, %eax
	jmp	LBB0_18
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"No 'adc' clock found\n"

	.comm	_ENOENT,4,2                     ## @ENOENT
L_.str.1:                               ## @.str.1
	.asciz	"Invalid clock rate: 0\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_stm32f4_pclk_div,8,3           ## @stm32f4_pclk_div
L_.str.2:                               ## @.str.2
	.asciz	"adc clk selection failed\n"

	.comm	_STM32F4_ADC_CCR,8,3            ## @STM32F4_ADC_CCR
	.comm	_STM32F4_ADC_ADCPRE_MASK,4,2    ## @STM32F4_ADC_ADCPRE_MASK
	.comm	_STM32F4_ADC_ADCPRE_SHIFT,4,2   ## @STM32F4_ADC_ADCPRE_SHIFT
L_.str.3:                               ## @.str.3
	.asciz	"Using analog clock source at %ld kHz\n"

	.no_dead_strip	_stm32f4_adc_clk_sel
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function stm32f4_adc_clk_sel
_stm32f4_adc_clk_sel:                   ; @stm32f4_adc_clk_sel
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	w0, [x1, #24]
	cbz	w0, LBB0_6
; %bb.1:
	mov	x20, x1
	bl	_clk_get_rate
	cbz	x0, LBB0_7
; %bb.2:
	mov	x21, x0
Lloh0:
	adrp	x23, _stm32f4_pclk_div@GOTPAGE
Lloh1:
	ldr	x23, [x23, _stm32f4_pclk_div@GOTPAGEOFF]
	ldr	x0, [x23]
	bl	_ARRAY_SIZE
	cmp	w0, #1
	b.lt	LBB0_8
; %bb.3:
	mov	x22, #0
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x0, [x23]
	ldr	x8, [x0, x22, lsl #3]
	udiv	x8, x21, x8
	ldr	x9, [x20, #16]
	ldr	x9, [x9]
	cmp	x8, x9
	b.ls	LBB0_9
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	add	x22, x22, #1
	bl	_ARRAY_SIZE
	cmp	x22, w0, sxtw
	b.lt	LBB0_4
	b	LBB0_9
LBB0_6:
Lloh2:
	adrp	x1, l_.str@PAGE
Lloh3:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_dev_err
Lloh4:
	adrp	x8, _ENOENT@GOTPAGE
Lloh5:
	ldr	x8, [x8, _ENOENT@GOTPAGEOFF]
	b	LBB0_13
LBB0_7:
Lloh6:
	adrp	x1, l_.str.1@PAGE
Lloh7:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_12
LBB0_8:
	mov	w22, #0
LBB0_9:
	ldr	x0, [x23]
	bl	_ARRAY_SIZE
	cmp	w22, w0
	b.ge	LBB0_11
; %bb.10:
	ldr	x8, [x23]
	ldr	x8, [x8, w22, uxtw #3]
	udiv	x8, x21, x8
	str	x8, [x20]
	ldr	x8, [x20, #8]
Lloh8:
	adrp	x21, _STM32F4_ADC_CCR@GOTPAGE
Lloh9:
	ldr	x21, [x21, _STM32F4_ADC_CCR@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl_relaxed
Lloh10:
	adrp	x8, _STM32F4_ADC_ADCPRE_MASK@GOTPAGE
Lloh11:
	ldr	x8, [x8, _STM32F4_ADC_ADCPRE_MASK@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh13:
	adrp	x9, _STM32F4_ADC_ADCPRE_SHIFT@GOTPAGE
Lloh14:
	ldr	x9, [x9, _STM32F4_ADC_ADCPRE_SHIFT@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	lsl	w9, w22, w9
	orr	w0, w9, w8
	ldr	x8, [x20, #8]
	ldr	x9, [x21]
	add	x1, x9, x8
	bl	_writel_relaxed
	ldr	x8, [x20]
	lsr	x8, x8, #3
	mov	x9, #63439
	movk	x9, #58195, lsl #16
	movk	x9, #39845, lsl #32
	movk	x9, #8388, lsl #48
	umulh	x8, x8, x9
	lsr	x2, x8, #4
Lloh16:
	adrp	x1, l_.str.3@PAGE
Lloh17:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
                                        ; kill: def $w2 killed $w2 killed $x2
	bl	_dev_dbg
	mov	w0, #0
	b	LBB0_14
LBB0_11:
Lloh18:
	adrp	x1, l_.str.2@PAGE
Lloh19:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_12:
	mov	x0, x19
	bl	_dev_err
Lloh20:
	adrp	x8, _EINVAL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
LBB0_13:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_14:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"No 'adc' clock found\n"

	.comm	_ENOENT,4,2                     ; @ENOENT
l_.str.1:                               ; @.str.1
	.asciz	"Invalid clock rate: 0\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_stm32f4_pclk_div,8,3           ; @stm32f4_pclk_div
l_.str.2:                               ; @.str.2
	.asciz	"adc clk selection failed\n"

	.comm	_STM32F4_ADC_CCR,8,3            ; @STM32F4_ADC_CCR
	.comm	_STM32F4_ADC_ADCPRE_MASK,4,2    ; @STM32F4_ADC_ADCPRE_MASK
	.comm	_STM32F4_ADC_ADCPRE_SHIFT,4,2   ; @STM32F4_ADC_ADCPRE_SHIFT
l_.str.3:                               ; @.str.3
	.asciz	"Using analog clock source at %ld kHz\n"

	.no_dead_strip	_stm32f4_adc_clk_sel
.subsections_via_symbols
