	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_dp_training_pattern
_intel_dp_training_pattern:             ## @intel_dp_training_pattern
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_intel_dp_source_supports_hbr3
	movl	%eax, %r15d
	movl	4(%rbx), %edi
	callq	_drm_dp_tps4_supported
	movl	%eax, %r14d
	testl	%r15d, %r15d
	je	LBB0_3
## %bb.1:
	testl	%r14d, %r14d
	je	LBB0_3
## %bb.2:
	movq	_DP_TRAINING_PATTERN_4@GOTPCREL(%rip), %r12
	jmp	LBB0_16
LBB0_3:
	cmpl	$810000, (%rbx)                 ## imm = 0xC5C10
	jne	LBB0_8
## %bb.4:
	testl	%r15d, %r15d
	je	LBB0_5
## %bb.6:
	testl	%r14d, %r14d
	je	LBB0_7
LBB0_8:
	movq	%rbx, %rdi
	callq	_intel_dp_source_supports_hbr2
	movl	%eax, %r15d
	movl	4(%rbx), %edi
	callq	_drm_dp_tps3_supported
	movl	%eax, %r14d
	testl	%r15d, %r15d
	je	LBB0_11
## %bb.9:
	testl	%r14d, %r14d
	je	LBB0_11
## %bb.10:
	movq	_DP_TRAINING_PATTERN_3@GOTPCREL(%rip), %r12
	jmp	LBB0_16
LBB0_11:
	movq	_DP_TRAINING_PATTERN_2@GOTPCREL(%rip), %r12
	cmpl	$540000, (%rbx)                 ## imm = 0x83D60
	jl	LBB0_16
## %bb.12:
	testl	%r15d, %r15d
	jne	LBB0_14
## %bb.13:
	leaq	L_.str.2(%rip), %rdi
	callq	_DRM_DEBUG_KMS
LBB0_14:
	testl	%r14d, %r14d
	jne	LBB0_16
## %bb.15:
	leaq	L_.str.3(%rip), %rdi
	callq	_DRM_DEBUG_KMS
LBB0_16:
	movl	(%r12), %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_KMS
	testl	%r14d, %r14d
	jne	LBB0_8
LBB0_7:
	leaq	L_.str.1(%rip), %rdi
	callq	_DRM_DEBUG_KMS
	jmp	LBB0_8
	.cfi_endproc
                                        ## -- End function
	.comm	_DP_TRAINING_PATTERN_4,4,2      ## @DP_TRAINING_PATTERN_4
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"8.1 Gbps link rate without source HBR3/TPS4 support\n"

L_.str.1:                               ## @.str.1
	.asciz	"8.1 Gbps link rate without sink TPS4 support\n"

	.comm	_DP_TRAINING_PATTERN_3,4,2      ## @DP_TRAINING_PATTERN_3
L_.str.2:                               ## @.str.2
	.asciz	">=5.4/6.48 Gbps link rate without source HBR2/TPS3 support\n"

L_.str.3:                               ## @.str.3
	.asciz	">=5.4/6.48 Gbps link rate without sink TPS3 support\n"

	.comm	_DP_TRAINING_PATTERN_2,4,2      ## @DP_TRAINING_PATTERN_2
	.no_dead_strip	_intel_dp_training_pattern
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_dp_training_pattern
_intel_dp_training_pattern:             ; @intel_dp_training_pattern
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_intel_dp_source_supports_hbr3
	mov	x21, x0
	ldr	w0, [x19, #4]
	bl	_drm_dp_tps4_supported
	mov	x20, x0
	cbz	w21, LBB0_3
; %bb.1:
	cbz	w20, LBB0_3
; %bb.2:
Lloh0:
	adrp	x8, _DP_TRAINING_PATTERN_4@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DP_TRAINING_PATTERN_4@GOTPAGEOFF]
	b	LBB0_15
LBB0_3:
	ldr	w8, [x19]
	sub	w8, w8, #197, lsl #12           ; =806912
	cmp	w8, #3088
	b.ne	LBB0_6
; %bb.4:
	cbz	w21, LBB0_16
; %bb.5:
	cbz	w20, LBB0_17
LBB0_6:
	mov	x0, x19
	bl	_intel_dp_source_supports_hbr2
	mov	x21, x0
	ldr	w0, [x19, #4]
	bl	_drm_dp_tps3_supported
	mov	x20, x0
	cbz	w21, LBB0_9
; %bb.7:
	cbz	w20, LBB0_9
; %bb.8:
Lloh2:
	adrp	x8, _DP_TRAINING_PATTERN_3@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DP_TRAINING_PATTERN_3@GOTPAGEOFF]
	b	LBB0_15
LBB0_9:
	ldr	w8, [x19]
	mov	w9, #15712
	movk	w9, #8, lsl #16
	cmp	w8, w9
	b.lt	LBB0_14
; %bb.10:
	cbnz	w21, LBB0_12
; %bb.11:
Lloh4:
	adrp	x0, l_.str.2@PAGE
Lloh5:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_DEBUG_KMS
LBB0_12:
	cbnz	w20, LBB0_14
; %bb.13:
Lloh6:
	adrp	x0, l_.str.3@PAGE
Lloh7:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_DEBUG_KMS
LBB0_14:
Lloh8:
	adrp	x8, _DP_TRAINING_PATTERN_2@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DP_TRAINING_PATTERN_2@GOTPAGEOFF]
LBB0_15:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_16:
Lloh10:
	adrp	x0, l_.str@PAGE
Lloh11:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
	cbnz	w20, LBB0_6
LBB0_17:
Lloh12:
	adrp	x0, l_.str.1@PAGE
Lloh13:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_DEBUG_KMS
	b	LBB0_6
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_DP_TRAINING_PATTERN_4,4,2      ; @DP_TRAINING_PATTERN_4
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"8.1 Gbps link rate without source HBR3/TPS4 support\n"

l_.str.1:                               ; @.str.1
	.asciz	"8.1 Gbps link rate without sink TPS4 support\n"

	.comm	_DP_TRAINING_PATTERN_3,4,2      ; @DP_TRAINING_PATTERN_3
l_.str.2:                               ; @.str.2
	.asciz	">=5.4/6.48 Gbps link rate without source HBR2/TPS3 support\n"

l_.str.3:                               ; @.str.3
	.asciz	">=5.4/6.48 Gbps link rate without sink TPS3 support\n"

	.comm	_DP_TRAINING_PATTERN_2,4,2      ; @DP_TRAINING_PATTERN_2
	.no_dead_strip	_intel_dp_training_pattern
.subsections_via_symbols
