	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v8_0_send_serdes_cmd
_gfx_v8_0_send_serdes_cmd:              ## @gfx_v8_0_send_serdes_cmd
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movl	%esi, %ebx
	movq	%rdi, %r15
	movl	$-1, %esi
	movl	$-1, %edx
	movl	$-1, %ecx
	callq	_gfx_v8_0_select_se_sh
	movq	_mmRLC_SERDES_WR_CU_MASTER_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$-1, %esi
	callq	_WREG32
	movq	_mmRLC_SERDES_WR_NONCU_MASTER_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$-1, %esi
	callq	_WREG32
	movq	_mmRLC_SERDES_WR_CTRL@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_RREG32
	movq	_RLC_SERDES_WR_CTRL__WRITE_COMMAND_MASK@GOTPCREL(%rip), %rdx
	movq	_RLC_SERDES_WR_CTRL__READ_COMMAND_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rdx), %ecx
	movq	_RLC_SERDES_WR_CTRL__P1_SELECT_MASK@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	movq	_RLC_SERDES_WR_CTRL__P2_SELECT_MASK@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	movq	(%r15), %rdx
	movq	_RLC_SERDES_WR_CTRL__RDDATA_RESET_MASK@GOTPCREL(%rip), %rsi
	orl	(%rsi), %ecx
	movq	_CHIP_STONEY@GOTPCREL(%rip), %r8
	movq	_RLC_SERDES_WR_CTRL__POWER_DOWN_MASK@GOTPCREL(%rip), %rsi
	orl	(%rsi), %ecx
	movq	_RLC_SERDES_WR_CTRL__POWER_UP_MASK@GOTPCREL(%rip), %rsi
	orl	(%rsi), %ecx
	movq	_RLC_SERDES_WR_CTRL__SHORT_FORMAT_MASK@GOTPCREL(%rip), %rsi
	orl	(%rsi), %ecx
	movq	_RLC_SERDES_WR_CTRL__BPM_DATA_MASK@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	orl	%ecx, %esi
	movq	_RLC_SERDES_WR_CTRL__REG_ADDR_MASK@GOTPCREL(%rip), %rdi
	orl	(%rdi), %esi
	cmpq	(%r8), %rdx
	cmovel	%ecx, %esi
	movq	_RLC_SERDES_WR_CTRL__SRBM_OVERRIDE_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	_RLC_SERDES_WR_CTRL__RSVD_BPM_ADDR_MASK@GOTPCREL(%rip), %rax
	movq	_RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r14d
	movq	_RLC_SERDES_WR_CTRL__REG_ADDR__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %ebx
	orl	%r14d, %ebx
	movq	_RLC_SERDES_WR_CTRL__BPM_ADDR__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$255, %edx
	shll	%cl, %edx
	orl	%ebx, %edx
	orl	(%rax), %esi
	orl	%edx, %esi
	movl	(%r12), %edi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_mmRLC_SERDES_WR_CU_MASTER_MASK,4,2 ## @mmRLC_SERDES_WR_CU_MASTER_MASK
	.comm	_mmRLC_SERDES_WR_NONCU_MASTER_MASK,4,2 ## @mmRLC_SERDES_WR_NONCU_MASTER_MASK
	.comm	_mmRLC_SERDES_WR_CTRL,4,2       ## @mmRLC_SERDES_WR_CTRL
	.comm	_CHIP_STONEY,8,3                ## @CHIP_STONEY
	.comm	_RLC_SERDES_WR_CTRL__WRITE_COMMAND_MASK,4,2 ## @RLC_SERDES_WR_CTRL__WRITE_COMMAND_MASK
	.comm	_RLC_SERDES_WR_CTRL__READ_COMMAND_MASK,4,2 ## @RLC_SERDES_WR_CTRL__READ_COMMAND_MASK
	.comm	_RLC_SERDES_WR_CTRL__P1_SELECT_MASK,4,2 ## @RLC_SERDES_WR_CTRL__P1_SELECT_MASK
	.comm	_RLC_SERDES_WR_CTRL__P2_SELECT_MASK,4,2 ## @RLC_SERDES_WR_CTRL__P2_SELECT_MASK
	.comm	_RLC_SERDES_WR_CTRL__RDDATA_RESET_MASK,4,2 ## @RLC_SERDES_WR_CTRL__RDDATA_RESET_MASK
	.comm	_RLC_SERDES_WR_CTRL__POWER_DOWN_MASK,4,2 ## @RLC_SERDES_WR_CTRL__POWER_DOWN_MASK
	.comm	_RLC_SERDES_WR_CTRL__POWER_UP_MASK,4,2 ## @RLC_SERDES_WR_CTRL__POWER_UP_MASK
	.comm	_RLC_SERDES_WR_CTRL__SHORT_FORMAT_MASK,4,2 ## @RLC_SERDES_WR_CTRL__SHORT_FORMAT_MASK
	.comm	_RLC_SERDES_WR_CTRL__SRBM_OVERRIDE_MASK,4,2 ## @RLC_SERDES_WR_CTRL__SRBM_OVERRIDE_MASK
	.comm	_RLC_SERDES_WR_CTRL__BPM_DATA_MASK,4,2 ## @RLC_SERDES_WR_CTRL__BPM_DATA_MASK
	.comm	_RLC_SERDES_WR_CTRL__REG_ADDR_MASK,4,2 ## @RLC_SERDES_WR_CTRL__REG_ADDR_MASK
	.comm	_RLC_SERDES_WR_CTRL__RSVD_BPM_ADDR_MASK,4,2 ## @RLC_SERDES_WR_CTRL__RSVD_BPM_ADDR_MASK
	.comm	_RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT,4,2 ## @RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT
	.comm	_RLC_SERDES_WR_CTRL__REG_ADDR__SHIFT,4,2 ## @RLC_SERDES_WR_CTRL__REG_ADDR__SHIFT
	.comm	_RLC_SERDES_WR_CTRL__BPM_ADDR__SHIFT,4,2 ## @RLC_SERDES_WR_CTRL__BPM_ADDR__SHIFT
	.no_dead_strip	_gfx_v8_0_send_serdes_cmd
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v8_0_send_serdes_cmd
_gfx_v8_0_send_serdes_cmd:              ; @gfx_v8_0_send_serdes_cmd
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x19, x1
	mov	x21, x0
	mov	w1, #-1
	mov	w2, #-1
	mov	w3, #-1
	bl	_gfx_v8_0_select_se_sh
Lloh0:
	adrp	x8, _mmRLC_SERDES_WR_CU_MASTER_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _mmRLC_SERDES_WR_CU_MASTER_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	w1, #-1
	bl	_WREG32
Lloh3:
	adrp	x8, _mmRLC_SERDES_WR_NONCU_MASTER_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _mmRLC_SERDES_WR_NONCU_MASTER_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	w1, #-1
	bl	_WREG32
Lloh6:
	adrp	x22, _mmRLC_SERDES_WR_CTRL@GOTPAGE
Lloh7:
	ldr	x22, [x22, _mmRLC_SERDES_WR_CTRL@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_RREG32
	ldr	x8, [x21]
Lloh8:
	adrp	x9, _CHIP_STONEY@GOTPAGE
Lloh9:
	ldr	x9, [x9, _CHIP_STONEY@GOTPAGEOFF]
Lloh10:
	ldr	x9, [x9]
Lloh11:
	adrp	x10, _RLC_SERDES_WR_CTRL__WRITE_COMMAND_MASK@GOTPAGE
Lloh12:
	ldr	x10, [x10, _RLC_SERDES_WR_CTRL__WRITE_COMMAND_MASK@GOTPAGEOFF]
Lloh13:
	ldr	w10, [x10]
Lloh14:
	adrp	x11, _RLC_SERDES_WR_CTRL__READ_COMMAND_MASK@GOTPAGE
Lloh15:
	ldr	x11, [x11, _RLC_SERDES_WR_CTRL__READ_COMMAND_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w11, [x11]
	orr	w10, w11, w10
Lloh17:
	adrp	x11, _RLC_SERDES_WR_CTRL__P1_SELECT_MASK@GOTPAGE
Lloh18:
	ldr	x11, [x11, _RLC_SERDES_WR_CTRL__P1_SELECT_MASK@GOTPAGEOFF]
Lloh19:
	ldr	w11, [x11]
	orr	w10, w10, w11
Lloh20:
	adrp	x11, _RLC_SERDES_WR_CTRL__P2_SELECT_MASK@GOTPAGE
Lloh21:
	ldr	x11, [x11, _RLC_SERDES_WR_CTRL__P2_SELECT_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w11, [x11]
	orr	w10, w10, w11
Lloh23:
	adrp	x11, _RLC_SERDES_WR_CTRL__RDDATA_RESET_MASK@GOTPAGE
Lloh24:
	ldr	x11, [x11, _RLC_SERDES_WR_CTRL__RDDATA_RESET_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w11, [x11]
	orr	w10, w10, w11
Lloh26:
	adrp	x11, _RLC_SERDES_WR_CTRL__POWER_DOWN_MASK@GOTPAGE
Lloh27:
	ldr	x11, [x11, _RLC_SERDES_WR_CTRL__POWER_DOWN_MASK@GOTPAGEOFF]
Lloh28:
	ldr	w11, [x11]
	orr	w10, w10, w11
Lloh29:
	adrp	x11, _RLC_SERDES_WR_CTRL__POWER_UP_MASK@GOTPAGE
Lloh30:
	ldr	x11, [x11, _RLC_SERDES_WR_CTRL__POWER_UP_MASK@GOTPAGEOFF]
Lloh31:
	ldr	w11, [x11]
	orr	w10, w10, w11
Lloh32:
	adrp	x11, _RLC_SERDES_WR_CTRL__SHORT_FORMAT_MASK@GOTPAGE
Lloh33:
	ldr	x11, [x11, _RLC_SERDES_WR_CTRL__SHORT_FORMAT_MASK@GOTPAGEOFF]
Lloh34:
	ldr	w11, [x11]
	orr	w10, w10, w11
Lloh35:
	adrp	x11, _RLC_SERDES_WR_CTRL__BPM_DATA_MASK@GOTPAGE
Lloh36:
	ldr	x11, [x11, _RLC_SERDES_WR_CTRL__BPM_DATA_MASK@GOTPAGEOFF]
Lloh37:
	ldr	w11, [x11]
	orr	w11, w10, w11
Lloh38:
	adrp	x12, _RLC_SERDES_WR_CTRL__REG_ADDR_MASK@GOTPAGE
Lloh39:
	ldr	x12, [x12, _RLC_SERDES_WR_CTRL__REG_ADDR_MASK@GOTPAGEOFF]
Lloh40:
	ldr	w12, [x12]
	orr	w11, w11, w12
	cmp	x8, x9
	csel	w8, w10, w11, eq
Lloh41:
	adrp	x9, _RLC_SERDES_WR_CTRL__SRBM_OVERRIDE_MASK@GOTPAGE
Lloh42:
	ldr	x9, [x9, _RLC_SERDES_WR_CTRL__SRBM_OVERRIDE_MASK@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	orr	w8, w8, w9
	bic	w8, w0, w8
Lloh44:
	adrp	x9, _RLC_SERDES_WR_CTRL__RSVD_BPM_ADDR_MASK@GOTPAGE
Lloh45:
	ldr	x9, [x9, _RLC_SERDES_WR_CTRL__RSVD_BPM_ADDR_MASK@GOTPAGEOFF]
Lloh46:
	ldr	w9, [x9]
Lloh47:
	adrp	x10, _RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT@GOTPAGE
Lloh48:
	ldr	x10, [x10, _RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT@GOTPAGEOFF]
Lloh49:
	ldr	w10, [x10]
	lsl	w10, w20, w10
Lloh50:
	adrp	x11, _RLC_SERDES_WR_CTRL__REG_ADDR__SHIFT@GOTPAGE
Lloh51:
	ldr	x11, [x11, _RLC_SERDES_WR_CTRL__REG_ADDR__SHIFT@GOTPAGEOFF]
Lloh52:
	ldr	w11, [x11]
	lsl	w11, w19, w11
Lloh53:
	adrp	x12, _RLC_SERDES_WR_CTRL__BPM_ADDR__SHIFT@GOTPAGE
Lloh54:
	ldr	x12, [x12, _RLC_SERDES_WR_CTRL__BPM_ADDR__SHIFT@GOTPAGEOFF]
Lloh55:
	ldr	w12, [x12]
	mov	w13, #255
	lsl	w12, w13, w12
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w8, w8, w11
	orr	w1, w8, w12
	ldr	w0, [x22]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_mmRLC_SERDES_WR_CU_MASTER_MASK,4,2 ; @mmRLC_SERDES_WR_CU_MASTER_MASK
	.comm	_mmRLC_SERDES_WR_NONCU_MASTER_MASK,4,2 ; @mmRLC_SERDES_WR_NONCU_MASTER_MASK
	.comm	_mmRLC_SERDES_WR_CTRL,4,2       ; @mmRLC_SERDES_WR_CTRL
	.comm	_CHIP_STONEY,8,3                ; @CHIP_STONEY
	.comm	_RLC_SERDES_WR_CTRL__WRITE_COMMAND_MASK,4,2 ; @RLC_SERDES_WR_CTRL__WRITE_COMMAND_MASK
	.comm	_RLC_SERDES_WR_CTRL__READ_COMMAND_MASK,4,2 ; @RLC_SERDES_WR_CTRL__READ_COMMAND_MASK
	.comm	_RLC_SERDES_WR_CTRL__P1_SELECT_MASK,4,2 ; @RLC_SERDES_WR_CTRL__P1_SELECT_MASK
	.comm	_RLC_SERDES_WR_CTRL__P2_SELECT_MASK,4,2 ; @RLC_SERDES_WR_CTRL__P2_SELECT_MASK
	.comm	_RLC_SERDES_WR_CTRL__RDDATA_RESET_MASK,4,2 ; @RLC_SERDES_WR_CTRL__RDDATA_RESET_MASK
	.comm	_RLC_SERDES_WR_CTRL__POWER_DOWN_MASK,4,2 ; @RLC_SERDES_WR_CTRL__POWER_DOWN_MASK
	.comm	_RLC_SERDES_WR_CTRL__POWER_UP_MASK,4,2 ; @RLC_SERDES_WR_CTRL__POWER_UP_MASK
	.comm	_RLC_SERDES_WR_CTRL__SHORT_FORMAT_MASK,4,2 ; @RLC_SERDES_WR_CTRL__SHORT_FORMAT_MASK
	.comm	_RLC_SERDES_WR_CTRL__SRBM_OVERRIDE_MASK,4,2 ; @RLC_SERDES_WR_CTRL__SRBM_OVERRIDE_MASK
	.comm	_RLC_SERDES_WR_CTRL__BPM_DATA_MASK,4,2 ; @RLC_SERDES_WR_CTRL__BPM_DATA_MASK
	.comm	_RLC_SERDES_WR_CTRL__REG_ADDR_MASK,4,2 ; @RLC_SERDES_WR_CTRL__REG_ADDR_MASK
	.comm	_RLC_SERDES_WR_CTRL__RSVD_BPM_ADDR_MASK,4,2 ; @RLC_SERDES_WR_CTRL__RSVD_BPM_ADDR_MASK
	.comm	_RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT,4,2 ; @RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT
	.comm	_RLC_SERDES_WR_CTRL__REG_ADDR__SHIFT,4,2 ; @RLC_SERDES_WR_CTRL__REG_ADDR__SHIFT
	.comm	_RLC_SERDES_WR_CTRL__BPM_ADDR__SHIFT,4,2 ; @RLC_SERDES_WR_CTRL__BPM_ADDR__SHIFT
	.no_dead_strip	_gfx_v8_0_send_serdes_cmd
.subsections_via_symbols
