	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function i2c_dw_xfer_init
_i2c_dw_xfer_init:                      ## @i2c_dw_xfer_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %r15
	callq	___i2c_dw_disable
	movq	_DW_IC_CON@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_dw_readl
	movq	(%rbx), %rdx
	movq	_I2C_M_TEN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	movq	_DW_IC_CON_10BITADDR_MASTER@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	(%r15,%rdx,8), %r14d
	je	LBB0_1
## %bb.2:
	orl	%ecx, %eax
	movq	_DW_IC_TAR_10BITADDR_MASTER@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	jmp	LBB0_3
LBB0_1:
	notl	%ecx
	andl	%ecx, %eax
LBB0_3:
	movl	(%r12), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_dw_writel
	movq	(%rbx), %rax
	orl	4(%r15,%rax,8), %r14d
	movq	_DW_IC_TAR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_dw_writel
	movq	%rbx, %rdi
	callq	_i2c_dw_disable_int
	movq	%rbx, %rdi
	callq	___i2c_dw_enable
	movq	_DW_IC_ENABLE_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_dw_readl
	movq	_DW_IC_CLR_INTR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_dw_readl
	movq	_DW_IC_INTR_MASTER_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DW_IC_INTR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dw_writel                      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DW_IC_CON,4,2                  ## @DW_IC_CON
	.comm	_I2C_M_TEN,4,2                  ## @I2C_M_TEN
	.comm	_DW_IC_CON_10BITADDR_MASTER,4,2 ## @DW_IC_CON_10BITADDR_MASTER
	.comm	_DW_IC_TAR_10BITADDR_MASTER,4,2 ## @DW_IC_TAR_10BITADDR_MASTER
	.comm	_DW_IC_TAR,4,2                  ## @DW_IC_TAR
	.comm	_DW_IC_ENABLE_STATUS,4,2        ## @DW_IC_ENABLE_STATUS
	.comm	_DW_IC_CLR_INTR,4,2             ## @DW_IC_CLR_INTR
	.comm	_DW_IC_INTR_MASTER_MASK,4,2     ## @DW_IC_INTR_MASTER_MASK
	.comm	_DW_IC_INTR_MASK,4,2            ## @DW_IC_INTR_MASK
	.no_dead_strip	_i2c_dw_xfer_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function i2c_dw_xfer_init
_i2c_dw_xfer_init:                      ; @i2c_dw_xfer_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0, #8]
	bl	___i2c_dw_disable
Lloh0:
	adrp	x21, _DW_IC_CON@GOTPAGE
Lloh1:
	ldr	x21, [x21, _DW_IC_CON@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_dw_readl
	ldr	x8, [x19]
	lsl	x8, x8, #3
	ldr	w8, [x20, x8]
Lloh2:
	adrp	x9, _I2C_M_TEN@GOTPAGE
Lloh3:
	ldr	x9, [x9, _I2C_M_TEN@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
Lloh5:
	adrp	x10, _DW_IC_CON_10BITADDR_MASTER@GOTPAGE
Lloh6:
	ldr	x10, [x10, _DW_IC_CON_10BITADDR_MASTER@GOTPAGEOFF]
Lloh7:
	ldr	w10, [x10]
	orr	w11, w10, w0
Lloh8:
	adrp	x12, _DW_IC_TAR_10BITADDR_MASTER@GOTPAGE
Lloh9:
	ldr	x12, [x12, _DW_IC_TAR_10BITADDR_MASTER@GOTPAGEOFF]
Lloh10:
	ldr	w12, [x12]
	bic	w10, w0, w10
	tst	w9, w8
	csel	w1, w10, w11, eq
	csel	w22, wzr, w12, eq
	ldr	w2, [x21]
	mov	x0, x19
	bl	_dw_writel
	ldr	x8, [x19]
	add	x8, x20, x8, lsl #3
	ldr	w8, [x8, #4]
	orr	w1, w8, w22
Lloh11:
	adrp	x8, _DW_IC_TAR@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DW_IC_TAR@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_dw_writel
	mov	x0, x19
	bl	_i2c_dw_disable_int
	mov	x0, x19
	bl	___i2c_dw_enable
Lloh14:
	adrp	x8, _DW_IC_ENABLE_STATUS@GOTPAGE
Lloh15:
	ldr	x8, [x8, _DW_IC_ENABLE_STATUS@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_dw_readl
Lloh17:
	adrp	x8, _DW_IC_CLR_INTR@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DW_IC_CLR_INTR@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_dw_readl
Lloh20:
	adrp	x8, _DW_IC_INTR_MASTER_MASK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _DW_IC_INTR_MASTER_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
Lloh23:
	adrp	x8, _DW_IC_INTR_MASK@GOTPAGE
Lloh24:
	ldr	x8, [x8, _DW_IC_INTR_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_dw_writel
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_DW_IC_CON,4,2                  ; @DW_IC_CON
	.comm	_I2C_M_TEN,4,2                  ; @I2C_M_TEN
	.comm	_DW_IC_CON_10BITADDR_MASTER,4,2 ; @DW_IC_CON_10BITADDR_MASTER
	.comm	_DW_IC_TAR_10BITADDR_MASTER,4,2 ; @DW_IC_TAR_10BITADDR_MASTER
	.comm	_DW_IC_TAR,4,2                  ; @DW_IC_TAR
	.comm	_DW_IC_ENABLE_STATUS,4,2        ; @DW_IC_ENABLE_STATUS
	.comm	_DW_IC_CLR_INTR,4,2             ; @DW_IC_CLR_INTR
	.comm	_DW_IC_INTR_MASTER_MASK,4,2     ; @DW_IC_INTR_MASTER_MASK
	.comm	_DW_IC_INTR_MASK,4,2            ; @DW_IC_INTR_MASK
	.no_dead_strip	_i2c_dw_xfer_init
.subsections_via_symbols
