	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_uvd_v1_0_start                 ## -- Begin function uvd_v1_0_start
	.p2align	4, 0x90
_uvd_v1_0_start:                        ## @uvd_v1_0_start
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %r15
	movq	_R600_RING_TYPE_UVD_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	_UVD_CGC_GATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	_WREG32
	movq	_UVD_MASTINT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	movl	$-3, %edx
	callq	_WREG32_P
	movq	_UVD_LMI_CTRL2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$256, %esi                      ## imm = 0x100
	movl	$-257, %edx                     ## imm = 0xFEFF
	callq	_WREG32_P
	movq	_UVD_RB_ARB_CTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movl	$8, %esi
	movl	$-9, %edx
	callq	_WREG32_P
	movl	$1, %edi
	callq	_mdelay
	movq	_LMI_SOFT_RESET@GOTPCREL(%rip), %rax
	movq	_VCPU_SOFT_RESET@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	orl	(%rax), %esi
	movq	_LBSI_SOFT_RESET@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_RBC_SOFT_RESET@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_CSM_SOFT_RESET@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_CXW_SOFT_RESET@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_UVD_SOFT_RESET@GOTPCREL(%rip), %rbx
	movq	_TAP_SOFT_RESET@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movl	(%rbx), %edi
	movq	_LMI_UMC_SOFT_RESET@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	callq	_WREG32
	movl	$5, %edi
	callq	_mdelay
	movq	_SRBM_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_SOFT_RESET_UVD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	xorl	%esi, %esi
	callq	_WREG32_P
	movl	$5, %edi
	callq	_mdelay
	movq	_UVD_LMI_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$3154752, %esi                  ## imm = 0x302340
	callq	_WREG32
	movq	_UVD_LMI_SWAP_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_UVD_MP_SWAP_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_UVD_MPC_SET_MUXA0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$67903552, %esi                 ## imm = 0x40C2040
	callq	_WREG32
	movq	_UVD_MPC_SET_MUXA1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_UVD_MPC_SET_MUXB0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$67903552, %esi                 ## imm = 0x40C2040
	callq	_WREG32
	movq	_UVD_MPC_SET_MUXB1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_UVD_MPC_SET_ALU@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_UVD_MPC_SET_MUX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$136, %esi
	callq	_WREG32
	movl	(%rbx), %edi
	movl	(%r13), %esi
	callq	_WREG32
	movl	$5, %edi
	callq	_mdelay
	movq	_UVD_VCPU_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$512, %esi                      ## imm = 0x200
	callq	_WREG32
	movq	_UVD_LMI_CTRL2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	movl	$-257, %edx                     ## imm = 0xFEFF
	callq	_WREG32_P
	movl	(%r14), %edi
	xorl	%esi, %esi
	movl	$-9, %edx
	callq	_WREG32_P
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movl	$10, %edi
	callq	_mdelay
	movq	_UVD_STATUS@GOTPCREL(%rip), %r13
	leaq	L_.str(%rip), %rbx
LBB0_1:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_2 Depth 2
	movl	$100, %r14d
	.p2align	4, 0x90
LBB0_2:                                 ##   Parent Loop BB0_1 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movl	(%r13), %edi
	callq	_RREG32
	testb	$2, %al
	jne	LBB0_6
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=2
	movl	$10, %edi
	callq	_mdelay
	decl	%r14d
	jne	LBB0_2
## %bb.4:                               ##   in Loop: Header=BB0_1 Depth=1
	movq	%rbx, %rdi
	callq	_DRM_ERROR
	movq	_UVD_SOFT_RESET@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_VCPU_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%esi, %edx
	notl	%edx
	callq	_WREG32_P
	movl	$10, %edi
	callq	_mdelay
	movl	(%r14), %edi
	movq	_VCPU_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	xorl	%esi, %esi
	callq	_WREG32_P
	movl	$10, %edi
	callq	_mdelay
	incl	%r12d
	cmpl	$10, %r12d
	jne	LBB0_1
## %bb.5:
	leaq	L_.str.1(%rip), %rdi
	callq	_DRM_ERROR
	movl	$-1, %r14d
	jmp	LBB0_7
LBB0_6:
	movq	_UVD_MASTINT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$6, %esi
	movl	$-7, %edx
	callq	_WREG32_P
	movq	_UVD_RBC_RB_CNTL@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movl	$285278465, %esi                ## imm = 0x11010101
	callq	_WREG32
	movq	_UVD_RBC_RB_WPTR_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	_WREG32
	movq	_UVD_LMI_EXT40_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	leaq	(%rax,%rax,2), %rbx
	movl	(%r15,%rbx,4), %edi
	callq	_upper_32_bits
	orl	$-2147024896, %eax              ## imm = 0x80070000
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_UVD_RBC_RB_RPTR@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movl	(%r13), %edi
	callq	_RREG32
	movl	%eax, 4(%r15,%rbx,4)
	movq	_UVD_RBC_RB_WPTR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_UVD_RBC_RB_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r15,%rbx,4), %esi
	callq	_WREG32
	movl	8(%r15,%rbx,4), %edi
	callq	_order_base_2
	orl	$256, %eax                      ## imm = 0x100
	movl	(%r12), %edi
	movl	%eax, %esi
	movl	$-73504, %edx                   ## imm = 0xFFFEE0E0
	callq	_WREG32_P
LBB0_7:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_R600_RING_TYPE_UVD_INDEX,8,3   ## @R600_RING_TYPE_UVD_INDEX
	.comm	_UVD_CGC_GATE,4,2               ## @UVD_CGC_GATE
	.comm	_UVD_MASTINT_EN,4,2             ## @UVD_MASTINT_EN
	.comm	_UVD_LMI_CTRL2,4,2              ## @UVD_LMI_CTRL2
	.comm	_UVD_RB_ARB_CTRL,4,2            ## @UVD_RB_ARB_CTRL
	.comm	_UVD_SOFT_RESET,4,2             ## @UVD_SOFT_RESET
	.comm	_LMI_SOFT_RESET,4,2             ## @LMI_SOFT_RESET
	.comm	_VCPU_SOFT_RESET,4,2            ## @VCPU_SOFT_RESET
	.comm	_LBSI_SOFT_RESET,4,2            ## @LBSI_SOFT_RESET
	.comm	_RBC_SOFT_RESET,4,2             ## @RBC_SOFT_RESET
	.comm	_CSM_SOFT_RESET,4,2             ## @CSM_SOFT_RESET
	.comm	_CXW_SOFT_RESET,4,2             ## @CXW_SOFT_RESET
	.comm	_TAP_SOFT_RESET,4,2             ## @TAP_SOFT_RESET
	.comm	_LMI_UMC_SOFT_RESET,4,2         ## @LMI_UMC_SOFT_RESET
	.comm	_SRBM_SOFT_RESET,4,2            ## @SRBM_SOFT_RESET
	.comm	_SOFT_RESET_UVD,4,2             ## @SOFT_RESET_UVD
	.comm	_UVD_LMI_CTRL,4,2               ## @UVD_LMI_CTRL
	.comm	_UVD_LMI_SWAP_CNTL,4,2          ## @UVD_LMI_SWAP_CNTL
	.comm	_UVD_MP_SWAP_CNTL,4,2           ## @UVD_MP_SWAP_CNTL
	.comm	_UVD_MPC_SET_MUXA0,4,2          ## @UVD_MPC_SET_MUXA0
	.comm	_UVD_MPC_SET_MUXA1,4,2          ## @UVD_MPC_SET_MUXA1
	.comm	_UVD_MPC_SET_MUXB0,4,2          ## @UVD_MPC_SET_MUXB0
	.comm	_UVD_MPC_SET_MUXB1,4,2          ## @UVD_MPC_SET_MUXB1
	.comm	_UVD_MPC_SET_ALU,4,2            ## @UVD_MPC_SET_ALU
	.comm	_UVD_MPC_SET_MUX,4,2            ## @UVD_MPC_SET_MUX
	.comm	_UVD_VCPU_CNTL,4,2              ## @UVD_VCPU_CNTL
	.comm	_UVD_STATUS,4,2                 ## @UVD_STATUS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"UVD not responding, trying to reset the VCPU!!!\n"

L_.str.1:                               ## @.str.1
	.asciz	"UVD not responding, giving up!!!\n"

	.comm	_UVD_RBC_RB_CNTL,4,2            ## @UVD_RBC_RB_CNTL
	.comm	_UVD_RBC_RB_WPTR_CNTL,4,2       ## @UVD_RBC_RB_WPTR_CNTL
	.comm	_UVD_LMI_EXT40_ADDR,4,2         ## @UVD_LMI_EXT40_ADDR
	.comm	_UVD_RBC_RB_RPTR,4,2            ## @UVD_RBC_RB_RPTR
	.comm	_UVD_RBC_RB_WPTR,4,2            ## @UVD_RBC_RB_WPTR
	.comm	_UVD_RBC_RB_BASE,4,2            ## @UVD_RBC_RB_BASE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_uvd_v1_0_start                 ; -- Begin function uvd_v1_0_start
	.p2align	2
_uvd_v1_0_start:                        ; @uvd_v1_0_start
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	x20, [x0]
Lloh0:
	adrp	x8, _R600_RING_TYPE_UVD_INDEX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _R600_RING_TYPE_UVD_INDEX@GOTPAGEOFF]
Lloh2:
	ldr	x21, [x8]
Lloh3:
	adrp	x8, _UVD_CGC_GATE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _UVD_CGC_GATE@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh6:
	adrp	x22, _UVD_MASTINT_EN@GOTPAGE
Lloh7:
	ldr	x22, [x22, _UVD_MASTINT_EN@GOTPAGEOFF]
	ldr	w0, [x22]
	mov	w1, #0
	mov	w2, #-3
	bl	_WREG32_P
Lloh8:
	adrp	x19, _UVD_LMI_CTRL2@GOTPAGE
Lloh9:
	ldr	x19, [x19, _UVD_LMI_CTRL2@GOTPAGEOFF]
	ldr	w0, [x19]
	mov	w1, #256
	mov	w2, #-257
	bl	_WREG32_P
Lloh10:
	adrp	x25, _UVD_RB_ARB_CTRL@GOTPAGE
Lloh11:
	ldr	x25, [x25, _UVD_RB_ARB_CTRL@GOTPAGEOFF]
	ldr	w0, [x25]
	mov	w1, #8
	mov	w2, #-9
	bl	_WREG32_P
	mov	w0, #1
	bl	_mdelay
Lloh12:
	adrp	x23, _UVD_SOFT_RESET@GOTPAGE
Lloh13:
	ldr	x23, [x23, _UVD_SOFT_RESET@GOTPAGEOFF]
Lloh14:
	adrp	x8, _LMI_SOFT_RESET@GOTPAGE
Lloh15:
	ldr	x8, [x8, _LMI_SOFT_RESET@GOTPAGEOFF]
	ldr	w0, [x23]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	adrp	x24, _VCPU_SOFT_RESET@GOTPAGE
Lloh18:
	ldr	x24, [x24, _VCPU_SOFT_RESET@GOTPAGEOFF]
	ldr	w9, [x24]
	orr	w8, w9, w8
Lloh19:
	adrp	x9, _LBSI_SOFT_RESET@GOTPAGE
Lloh20:
	ldr	x9, [x9, _LBSI_SOFT_RESET@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh22:
	adrp	x9, _RBC_SOFT_RESET@GOTPAGE
Lloh23:
	ldr	x9, [x9, _RBC_SOFT_RESET@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh25:
	adrp	x9, _CSM_SOFT_RESET@GOTPAGE
Lloh26:
	ldr	x9, [x9, _CSM_SOFT_RESET@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh28:
	adrp	x9, _CXW_SOFT_RESET@GOTPAGE
Lloh29:
	ldr	x9, [x9, _CXW_SOFT_RESET@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh31:
	adrp	x9, _TAP_SOFT_RESET@GOTPAGE
Lloh32:
	ldr	x9, [x9, _TAP_SOFT_RESET@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh34:
	adrp	x9, _LMI_UMC_SOFT_RESET@GOTPAGE
Lloh35:
	ldr	x9, [x9, _LMI_UMC_SOFT_RESET@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	orr	w1, w8, w9
	bl	_WREG32
	mov	w0, #5
	bl	_mdelay
Lloh37:
	adrp	x8, _SRBM_SOFT_RESET@GOTPAGE
Lloh38:
	ldr	x8, [x8, _SRBM_SOFT_RESET@GOTPAGEOFF]
Lloh39:
	ldr	w0, [x8]
Lloh40:
	adrp	x8, _SOFT_RESET_UVD@GOTPAGE
Lloh41:
	ldr	x8, [x8, _SOFT_RESET_UVD@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	w1, #0
	bl	_WREG32_P
	mov	w0, #5
	bl	_mdelay
Lloh43:
	adrp	x8, _UVD_LMI_CTRL@GOTPAGE
Lloh44:
	ldr	x8, [x8, _UVD_LMI_CTRL@GOTPAGEOFF]
Lloh45:
	ldr	w0, [x8]
	mov	w1, #9024
	movk	w1, #48, lsl #16
	bl	_WREG32
Lloh46:
	adrp	x8, _UVD_LMI_SWAP_CNTL@GOTPAGE
Lloh47:
	ldr	x8, [x8, _UVD_LMI_SWAP_CNTL@GOTPAGEOFF]
Lloh48:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh49:
	adrp	x8, _UVD_MP_SWAP_CNTL@GOTPAGE
Lloh50:
	ldr	x8, [x8, _UVD_MP_SWAP_CNTL@GOTPAGEOFF]
Lloh51:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh52:
	adrp	x8, _UVD_MPC_SET_MUXA0@GOTPAGE
Lloh53:
	ldr	x8, [x8, _UVD_MPC_SET_MUXA0@GOTPAGEOFF]
Lloh54:
	ldr	w0, [x8]
	mov	w1, #8256
	movk	w1, #1036, lsl #16
	bl	_WREG32
Lloh55:
	adrp	x8, _UVD_MPC_SET_MUXA1@GOTPAGE
Lloh56:
	ldr	x8, [x8, _UVD_MPC_SET_MUXA1@GOTPAGEOFF]
Lloh57:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh58:
	adrp	x8, _UVD_MPC_SET_MUXB0@GOTPAGE
Lloh59:
	ldr	x8, [x8, _UVD_MPC_SET_MUXB0@GOTPAGEOFF]
Lloh60:
	ldr	w0, [x8]
	mov	w1, #8256
	movk	w1, #1036, lsl #16
	bl	_WREG32
Lloh61:
	adrp	x8, _UVD_MPC_SET_MUXB1@GOTPAGE
Lloh62:
	ldr	x8, [x8, _UVD_MPC_SET_MUXB1@GOTPAGEOFF]
Lloh63:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh64:
	adrp	x8, _UVD_MPC_SET_ALU@GOTPAGE
Lloh65:
	ldr	x8, [x8, _UVD_MPC_SET_ALU@GOTPAGEOFF]
Lloh66:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh67:
	adrp	x8, _UVD_MPC_SET_MUX@GOTPAGE
Lloh68:
	ldr	x8, [x8, _UVD_MPC_SET_MUX@GOTPAGEOFF]
Lloh69:
	ldr	w0, [x8]
	mov	w1, #136
	bl	_WREG32
	ldr	w0, [x23]
	ldr	w1, [x24]
	bl	_WREG32
	mov	w0, #5
	bl	_mdelay
Lloh70:
	adrp	x8, _UVD_VCPU_CNTL@GOTPAGE
Lloh71:
	ldr	x8, [x8, _UVD_VCPU_CNTL@GOTPAGEOFF]
Lloh72:
	ldr	w0, [x8]
	mov	w1, #512
	bl	_WREG32
	ldr	w0, [x19]
	mov	w1, #0
	mov	w2, #-257
	bl	_WREG32_P
	ldr	w0, [x25]
	mov	w1, #0
	mov	w2, #-9
	bl	_WREG32_P
	ldr	w0, [x23]
	mov	w1, #0
	bl	_WREG32
	mov	w0, #10
	bl	_mdelay
	mov	w25, #0
Lloh73:
	adrp	x26, _UVD_STATUS@GOTPAGE
Lloh74:
	ldr	x26, [x26, _UVD_STATUS@GOTPAGEOFF]
Lloh75:
	adrp	x19, l_.str@PAGE
Lloh76:
	add	x19, x19, l_.str@PAGEOFF
LBB0_1:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_2 Depth 2
	mov	w27, #100
LBB0_2:                                 ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	w0, [x26]
	bl	_RREG32
	tbnz	w0, #1, LBB0_6
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=2
	mov	w0, #10
	bl	_mdelay
	subs	w27, w27, #1
	b.ne	LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_1 Depth=1
	mov	x0, x19
	bl	_DRM_ERROR
	ldr	w0, [x23]
	ldr	w1, [x24]
	mvn	w2, w1
	bl	_WREG32_P
	mov	w0, #10
	bl	_mdelay
	ldr	w0, [x23]
	ldr	w8, [x24]
	mvn	w2, w8
	mov	w1, #0
	bl	_WREG32_P
	mov	w0, #10
	bl	_mdelay
	add	w25, w25, #1
	cmp	w25, #10
	b.ne	LBB0_1
; %bb.5:
Lloh77:
	adrp	x0, l_.str.1@PAGE
Lloh78:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_ERROR
	mov	w0, #-1
	b	LBB0_7
LBB0_6:
	ldr	w0, [x22]
	mov	w1, #6
	mov	w2, #-7
	bl	_WREG32_P
Lloh79:
	adrp	x22, _UVD_RBC_RB_CNTL@GOTPAGE
Lloh80:
	ldr	x22, [x22, _UVD_RBC_RB_CNTL@GOTPAGEOFF]
	ldr	w0, [x22]
	mov	w1, #257
	movk	w1, #4353, lsl #16
	bl	_WREG32
Lloh81:
	adrp	x8, _UVD_RBC_RB_WPTR_CNTL@GOTPAGE
Lloh82:
	ldr	x8, [x8, _UVD_RBC_RB_WPTR_CNTL@GOTPAGEOFF]
Lloh83:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh84:
	adrp	x8, _UVD_LMI_EXT40_ADDR@GOTPAGE
Lloh85:
	ldr	x8, [x8, _UVD_LMI_EXT40_ADDR@GOTPAGEOFF]
Lloh86:
	ldr	w19, [x8]
	mov	w8, #12
	madd	x20, x21, x8, x20
	ldr	w0, [x20]
	bl	_upper_32_bits
	mov	w8, #-2147024896
	orr	w1, w0, w8
	mov	x0, x19
	bl	_WREG32
Lloh87:
	adrp	x19, _UVD_RBC_RB_RPTR@GOTPAGE
Lloh88:
	ldr	x19, [x19, _UVD_RBC_RB_RPTR@GOTPAGEOFF]
	ldr	w0, [x19]
	mov	w1, #0
	bl	_WREG32
	ldr	w0, [x19]
	bl	_RREG32
	mov	x1, x0
	str	w1, [x20, #4]
Lloh89:
	adrp	x8, _UVD_RBC_RB_WPTR@GOTPAGE
Lloh90:
	ldr	x8, [x8, _UVD_RBC_RB_WPTR@GOTPAGEOFF]
Lloh91:
	ldr	w0, [x8]
                                        ; kill: def $w1 killed $w1 killed $x1
	bl	_WREG32
Lloh92:
	adrp	x8, _UVD_RBC_RB_BASE@GOTPAGE
Lloh93:
	ldr	x8, [x8, _UVD_RBC_RB_BASE@GOTPAGEOFF]
Lloh94:
	ldr	w0, [x8]
	ldr	w1, [x20]
	bl	_WREG32
	ldr	w0, [x20, #8]
	bl	_order_base_2
	orr	w1, w0, #0x100
	ldr	w0, [x22]
	mov	w2, #57568
	movk	w2, #65534, lsl #16
	bl	_WREG32_P
	mov	w0, #0
LBB0_7:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGot	Lloh79, Lloh80
	.cfi_endproc
                                        ; -- End function
	.comm	_R600_RING_TYPE_UVD_INDEX,8,3   ; @R600_RING_TYPE_UVD_INDEX
	.comm	_UVD_CGC_GATE,4,2               ; @UVD_CGC_GATE
	.comm	_UVD_MASTINT_EN,4,2             ; @UVD_MASTINT_EN
	.comm	_UVD_LMI_CTRL2,4,2              ; @UVD_LMI_CTRL2
	.comm	_UVD_RB_ARB_CTRL,4,2            ; @UVD_RB_ARB_CTRL
	.comm	_UVD_SOFT_RESET,4,2             ; @UVD_SOFT_RESET
	.comm	_LMI_SOFT_RESET,4,2             ; @LMI_SOFT_RESET
	.comm	_VCPU_SOFT_RESET,4,2            ; @VCPU_SOFT_RESET
	.comm	_LBSI_SOFT_RESET,4,2            ; @LBSI_SOFT_RESET
	.comm	_RBC_SOFT_RESET,4,2             ; @RBC_SOFT_RESET
	.comm	_CSM_SOFT_RESET,4,2             ; @CSM_SOFT_RESET
	.comm	_CXW_SOFT_RESET,4,2             ; @CXW_SOFT_RESET
	.comm	_TAP_SOFT_RESET,4,2             ; @TAP_SOFT_RESET
	.comm	_LMI_UMC_SOFT_RESET,4,2         ; @LMI_UMC_SOFT_RESET
	.comm	_SRBM_SOFT_RESET,4,2            ; @SRBM_SOFT_RESET
	.comm	_SOFT_RESET_UVD,4,2             ; @SOFT_RESET_UVD
	.comm	_UVD_LMI_CTRL,4,2               ; @UVD_LMI_CTRL
	.comm	_UVD_LMI_SWAP_CNTL,4,2          ; @UVD_LMI_SWAP_CNTL
	.comm	_UVD_MP_SWAP_CNTL,4,2           ; @UVD_MP_SWAP_CNTL
	.comm	_UVD_MPC_SET_MUXA0,4,2          ; @UVD_MPC_SET_MUXA0
	.comm	_UVD_MPC_SET_MUXA1,4,2          ; @UVD_MPC_SET_MUXA1
	.comm	_UVD_MPC_SET_MUXB0,4,2          ; @UVD_MPC_SET_MUXB0
	.comm	_UVD_MPC_SET_MUXB1,4,2          ; @UVD_MPC_SET_MUXB1
	.comm	_UVD_MPC_SET_ALU,4,2            ; @UVD_MPC_SET_ALU
	.comm	_UVD_MPC_SET_MUX,4,2            ; @UVD_MPC_SET_MUX
	.comm	_UVD_VCPU_CNTL,4,2              ; @UVD_VCPU_CNTL
	.comm	_UVD_STATUS,4,2                 ; @UVD_STATUS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"UVD not responding, trying to reset the VCPU!!!\n"

l_.str.1:                               ; @.str.1
	.asciz	"UVD not responding, giving up!!!\n"

	.comm	_UVD_RBC_RB_CNTL,4,2            ; @UVD_RBC_RB_CNTL
	.comm	_UVD_RBC_RB_WPTR_CNTL,4,2       ; @UVD_RBC_RB_WPTR_CNTL
	.comm	_UVD_LMI_EXT40_ADDR,4,2         ; @UVD_LMI_EXT40_ADDR
	.comm	_UVD_RBC_RB_RPTR,4,2            ; @UVD_RBC_RB_RPTR
	.comm	_UVD_RBC_RB_WPTR,4,2            ; @UVD_RBC_RB_WPTR
	.comm	_UVD_RBC_RB_BASE,4,2            ; @UVD_RBC_RB_BASE
.subsections_via_symbols
