	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_vm_update_flags
_amdgpu_vm_update_flags:                ## @amdgpu_vm_update_flags
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, %r14d
	movl	%ecx, %r12d
	movq	%rsi, %r13
	movq	%rdi, %r15
	movl	24(%rbp), %eax
	movl	16(%rbp), %r9d
	movl	%r8d, -44(%rbp)
	movq	_AMDGPU_VM_PTB@GOTPCREL(%rip), %rcx
	cmpl	%edx, (%rcx)
	jne	LBB0_1
## %bb.2:
	movq	8(%r15), %rcx
	movq	(%rcx), %rcx
	movq	_CHIP_VEGA10@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jl	LBB0_6
## %bb.3:
	movq	_AMDGPU_PTE_VALID@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_6
## %bb.4:
	movq	_AMDGPU_PTE_PRT@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_6
## %bb.5:
	movq	_AMDGPU_PTE_EXECUTABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, 24(%rbp)
	jmp	LBB0_6
LBB0_1:
	movq	_AMDGPU_PDE_PTE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, 24(%rbp)
	movq	8(%r15), %rdi
	leaq	-44(%rbp), %rax
	leaq	24(%rbp), %rcx
	movl	%edx, %esi
	movq	%rax, %rdx
	movl	%r9d, %ebx
	callq	_amdgpu_gmc_get_vm_pde
	movl	%ebx, %r9d
	movl	-44(%rbp), %r8d
	movl	24(%rbp), %eax
LBB0_6:
	movq	(%r15), %rcx
	movq	(%rcx), %rbx
	movl	%eax, (%rsp)
	movq	%r15, %rdi
	movq	%r13, %rsi
	movl	%r12d, %edx
	movl	%r8d, %ecx
	movl	%r14d, %r8d
	callq	*(%rbx)
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_VM_PTB,4,2              ## @AMDGPU_VM_PTB
	.comm	_AMDGPU_PDE_PTE,4,2             ## @AMDGPU_PDE_PTE
	.comm	_CHIP_VEGA10,8,3                ## @CHIP_VEGA10
	.comm	_AMDGPU_PTE_VALID,4,2           ## @AMDGPU_PTE_VALID
	.comm	_AMDGPU_PTE_PRT,4,2             ## @AMDGPU_PTE_PRT
	.comm	_AMDGPU_PTE_EXECUTABLE,4,2      ## @AMDGPU_PTE_EXECUTABLE
	.no_dead_strip	_amdgpu_vm_update_flags
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_vm_update_flags
_amdgpu_vm_update_flags:                ; @amdgpu_vm_update_flags
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x6
	mov	x20, x5
	mov	x21, x3
	mov	x22, x1
	mov	x23, x0
	stp	w7, w4, [sp, #8]
Lloh0:
	adrp	x9, _AMDGPU_VM_PTB@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMDGPU_VM_PTB@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	cmp	w9, w2
	b.ne	LBB0_5
; %bb.1:
	ldr	x8, [x23, #8]
	ldr	x8, [x8]
Lloh3:
	adrp	x9, _CHIP_VEGA10@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CHIP_VEGA10@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_6
; %bb.2:
Lloh6:
	adrp	x8, _AMDGPU_PTE_VALID@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AMDGPU_PTE_VALID@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	tst	w8, w7
	b.ne	LBB0_6
; %bb.3:
Lloh9:
	adrp	x8, _AMDGPU_PTE_PRT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AMDGPU_PTE_PRT@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	tst	w8, w7
	b.ne	LBB0_6
; %bb.4:
Lloh12:
	adrp	x8, _AMDGPU_PTE_EXECUTABLE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AMDGPU_PTE_EXECUTABLE@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	orr	w7, w8, w7
	str	w7, [sp, #8]
	b	LBB0_6
LBB0_5:
	mov	x8, x2
Lloh15:
	adrp	x9, _AMDGPU_PDE_PTE@GOTPAGE
Lloh16:
	ldr	x9, [x9, _AMDGPU_PDE_PTE@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w9, w9, w7
	str	w9, [sp, #8]
	ldr	x0, [x23, #8]
	add	x2, sp, #12
	add	x3, sp, #8
	mov	x1, x8
	bl	_amdgpu_gmc_get_vm_pde
	ldp	w7, w4, [sp, #8]
LBB0_6:
	ldr	x8, [x23]
	ldr	x8, [x8]
	ldr	x8, [x8]
	mov	x0, x23
	mov	x1, x22
	mov	x2, x21
	mov	x3, x4
	mov	x4, x20
	mov	x5, x19
	mov	x6, x7
	blr	x8
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_VM_PTB,4,2              ; @AMDGPU_VM_PTB
	.comm	_AMDGPU_PDE_PTE,4,2             ; @AMDGPU_PDE_PTE
	.comm	_CHIP_VEGA10,8,3                ; @CHIP_VEGA10
	.comm	_AMDGPU_PTE_VALID,4,2           ; @AMDGPU_PTE_VALID
	.comm	_AMDGPU_PTE_PRT,4,2             ; @AMDGPU_PTE_PRT
	.comm	_AMDGPU_PTE_EXECUTABLE,4,2      ; @AMDGPU_PTE_EXECUTABLE
	.no_dead_strip	_amdgpu_vm_update_flags
.subsections_via_symbols
