	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v9_0_init_always_on_cu_mask
_gfx_v9_0_init_always_on_cu_mask:       ## @gfx_v9_0_init_always_on_cu_mask
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_AMD_IS_APU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	$4, %ecx
	movq	%rcx, -64(%rbp)                 ## 8-byte Spill
	testl	%eax, (%rdi)
	jne	LBB0_2
## %bb.1:
	movq	8(%rdi), %rax
	movq	_CHIP_VEGA12@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	cmpq	(%rcx), %rax
	setne	%dl
	leaq	8(,%rdx,4), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
LBB0_2:
	leaq	16(%rdi), %rax
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	movq	%rax, %rdi
	callq	_mutex_lock
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	24(%rdi), %rcx
	testq	%rcx, %rcx
	jle	LBB0_18
## %bb.3:
	movq	32(%rdi), %rax
	xorl	%esi, %esi
	jmp	LBB0_4
	.p2align	4, 0x90
LBB0_16:                                ##   in Loop: Header=BB0_4 Depth=1
	movq	24(%rdi), %rcx
LBB0_17:                                ##   in Loop: Header=BB0_4 Depth=1
	incq	%rsi
	cmpq	%rcx, %rsi
	jge	LBB0_18
LBB0_4:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_6 Depth 2
                                        ##       Child Loop BB0_9 Depth 3
	testq	%rax, %rax
	jle	LBB0_17
## %bb.5:                               ##   in Loop: Header=BB0_4 Depth=1
	xorl	%r13d, %r13d
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	jmp	LBB0_6
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_6 Depth=2
	xorl	%ebx, %ebx
LBB0_15:                                ##   in Loop: Header=BB0_6 Depth=2
	movq	_GC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmRLC_LB_ALWAYS_ACTIVE_CU_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	movq	%rbx, %rcx
	callq	_WREG32_SOC15
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	56(%rdi), %rax
	movq	(%rax,%rsi,8), %rax
	movq	%rbx, (%rax,%r13,8)
	incq	%r13
	movq	32(%rdi), %rax
	cmpq	%rax, %r13
	jge	LBB0_16
LBB0_6:                                 ##   Parent Loop BB0_4 Depth=1
                                        ## =>  This Loop Header: Depth=2
                                        ##       Child Loop BB0_9 Depth 3
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
                                        ## kill: def $esi killed $esi killed $rsi
	movl	%r13d, %edx
	movl	$-1, %ecx
	callq	_gfx_v9_0_select_se_sh
	movq	-48(%rbp), %rdx                 ## 8-byte Reload
	movq	40(%rdx), %rax
	testq	%rax, %rax
	jle	LBB0_7
## %bb.8:                               ##   in Loop: Header=BB0_6 Depth=2
	movl	$1, %r14d
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	jmp	LBB0_9
	.p2align	4, 0x90
LBB0_12:                                ##   in Loop: Header=BB0_9 Depth=3
	cmpq	-64(%rbp), %r15                 ## 8-byte Folded Reload
	jge	LBB0_15
## %bb.13:                              ##   in Loop: Header=BB0_9 Depth=3
	orq	%r14, %rbx
	incq	%r15
	movq	40(%rdx), %rax
LBB0_14:                                ##   in Loop: Header=BB0_9 Depth=3
	addq	%r14, %r14
	incq	%r12
	cmpq	%rax, %r12
	jge	LBB0_15
LBB0_9:                                 ##   Parent Loop BB0_4 Depth=1
                                        ##     Parent Loop BB0_6 Depth=2
                                        ## =>    This Inner Loop Header: Depth=3
	movq	48(%rdx), %rcx
	movq	(%rcx,%rsi,8), %rcx
	testq	%r14, (%rcx,%r13,8)
	je	LBB0_14
## %bb.10:                              ##   in Loop: Header=BB0_9 Depth=3
	cmpq	$2, %r15
	jne	LBB0_12
## %bb.11:                              ##   in Loop: Header=BB0_9 Depth=3
	movq	_GC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmRLC_PG_ALWAYS_ON_CU_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	movq	%rbx, %rcx
	callq	_WREG32_SOC15
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	movq	-48(%rbp), %rdx                 ## 8-byte Reload
	jmp	LBB0_12
LBB0_18:
	movl	$-1, %esi
	movl	$-1, %edx
	movl	$-1, %ecx
	callq	_gfx_v9_0_select_se_sh
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mutex_unlock                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_IS_APU,4,2                 ## @AMD_IS_APU
	.comm	_CHIP_VEGA12,8,3                ## @CHIP_VEGA12
	.comm	_GC,4,2                         ## @GC
	.comm	_mmRLC_PG_ALWAYS_ON_CU_MASK,4,2 ## @mmRLC_PG_ALWAYS_ON_CU_MASK
	.comm	_mmRLC_LB_ALWAYS_ACTIVE_CU_MASK,4,2 ## @mmRLC_LB_ALWAYS_ACTIVE_CU_MASK
	.no_dead_strip	_gfx_v9_0_init_always_on_cu_mask
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v9_0_init_always_on_cu_mask
_gfx_v9_0_init_always_on_cu_mask:       ; @gfx_v9_0_init_always_on_cu_mask
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _AMD_IS_APU@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMD_IS_APU@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	mov	w24, #4
	b	LBB0_3
LBB0_2:
Lloh3:
	adrp	x8, _CHIP_VEGA12@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CHIP_VEGA12@GOTPAGEOFF]
	ldr	x9, [x19, #8]
Lloh5:
	ldr	x8, [x8]
	mov	w10, #12
	mov	w11, #8
	cmp	x9, x8
	csel	x24, x11, x10, eq
LBB0_3:
	add	x0, x19, #16
	str	x0, [sp, #8]                    ; 8-byte Folded Spill
	bl	_mutex_lock
	ldr	x9, [x19, #24]
	cmp	x9, #1
	b.lt	LBB0_19
; %bb.4:
	mov	x21, #0
	ldr	x8, [x19, #32]
Lloh6:
	adrp	x25, _GC@GOTPAGE
Lloh7:
	ldr	x25, [x25, _GC@GOTPAGEOFF]
Lloh8:
	adrp	x26, _mmRLC_PG_ALWAYS_ON_CU_MASK@GOTPAGE
Lloh9:
	ldr	x26, [x26, _mmRLC_PG_ALWAYS_ON_CU_MASK@GOTPAGEOFF]
	b	LBB0_7
LBB0_5:                                 ;   in Loop: Header=BB0_7 Depth=1
	ldr	x9, [x19, #24]
LBB0_6:                                 ;   in Loop: Header=BB0_7 Depth=1
	add	x21, x21, #1
	cmp	x21, x9
	b.ge	LBB0_19
LBB0_7:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_11 Depth 2
                                        ;       Child Loop BB0_16 Depth 3
	cmp	x8, #1
	b.lt	LBB0_6
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	mov	x22, #0
	b	LBB0_11
LBB0_9:                                 ;   in Loop: Header=BB0_11 Depth=2
	mov	x23, #0
LBB0_10:                                ;   in Loop: Header=BB0_11 Depth=2
	ldr	w0, [x25]
Lloh10:
	adrp	x8, _mmRLC_LB_ALWAYS_ACTIVE_CU_MASK@GOTPAGE
Lloh11:
	ldr	x8, [x8, _mmRLC_LB_ALWAYS_ACTIVE_CU_MASK@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
	mov	w1, #0
	mov	x3, x23
	bl	_WREG32_SOC15
	ldr	x8, [x19, #56]
	ldr	x8, [x8, x21, lsl #3]
	str	x23, [x8, x22, lsl #3]
	add	x22, x22, #1
	ldr	x8, [x19, #32]
	cmp	x22, x8
	b.ge	LBB0_5
LBB0_11:                                ;   Parent Loop BB0_7 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_16 Depth 3
	mov	x0, x19
	mov	x1, x21
	mov	x2, x22
	mov	w3, #-1
	bl	_gfx_v9_0_select_se_sh
	ldr	x8, [x19, #40]
	cmp	x8, #1
	b.lt	LBB0_9
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=2
	mov	x28, #0
	mov	x23, #0
	mov	x20, #0
	mov	w27, #1
	b	LBB0_16
LBB0_13:                                ;   in Loop: Header=BB0_16 Depth=3
	cmp	x28, x24
	b.ge	LBB0_10
; %bb.14:                               ;   in Loop: Header=BB0_16 Depth=3
	orr	x23, x23, x27
	add	x28, x28, #1
	ldr	x8, [x19, #40]
LBB0_15:                                ;   in Loop: Header=BB0_16 Depth=3
	lsl	x27, x27, #1
	add	x20, x20, #1
	cmp	x20, x8
	b.ge	LBB0_10
LBB0_16:                                ;   Parent Loop BB0_7 Depth=1
                                        ;     Parent Loop BB0_11 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	ldr	x9, [x19, #48]
	ldr	x9, [x9, x21, lsl #3]
	ldr	x9, [x9, x22, lsl #3]
	tst	x9, x27
	b.eq	LBB0_15
; %bb.17:                               ;   in Loop: Header=BB0_16 Depth=3
	cmp	x28, #2
	b.ne	LBB0_13
; %bb.18:                               ;   in Loop: Header=BB0_16 Depth=3
	ldr	w0, [x25]
	ldr	w2, [x26]
	mov	w1, #0
	mov	x3, x23
	bl	_WREG32_SOC15
	b	LBB0_13
LBB0_19:
	mov	x0, x19
	mov	w1, #-1
	mov	w2, #-1
	mov	w3, #-1
	bl	_gfx_v9_0_select_se_sh
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_mutex_unlock
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_IS_APU,4,2                 ; @AMD_IS_APU
	.comm	_CHIP_VEGA12,8,3                ; @CHIP_VEGA12
	.comm	_GC,4,2                         ; @GC
	.comm	_mmRLC_PG_ALWAYS_ON_CU_MASK,4,2 ; @mmRLC_PG_ALWAYS_ON_CU_MASK
	.comm	_mmRLC_LB_ALWAYS_ACTIVE_CU_MASK,4,2 ; @mmRLC_LB_ALWAYS_ACTIVE_CU_MASK
	.no_dead_strip	_gfx_v9_0_init_always_on_cu_mask
.subsections_via_symbols
