	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_gfx_is_multipipe_capable
_amdgpu_gfx_is_multipipe_capable:       ## @amdgpu_gfx_is_multipipe_capable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	_amdgpu_compute_multipipe@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	cmpl	$-1, %esi
	je	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_INFO
	cmpl	$1, (%rbx)
	sete	%al
	jmp	LBB0_5
LBB0_2:
	movq	(%rdi), %rax
	movq	_CHIP_POLARIS11@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_4
## %bb.3:
	xorl	%eax, %eax
	jmp	LBB0_5
LBB0_4:
	cmpl	$2, 8(%rdi)
	setge	%al
LBB0_5:
	movzbl	%al, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_amdgpu_compute_multipipe,4,2   ## @amdgpu_compute_multipipe
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"amdgpu: forcing compute pipe policy %d\n"

	.comm	_CHIP_POLARIS11,8,3             ## @CHIP_POLARIS11
	.no_dead_strip	_amdgpu_gfx_is_multipipe_capable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_gfx_is_multipipe_capable
_amdgpu_gfx_is_multipipe_capable:       ; @amdgpu_gfx_is_multipipe_capable
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x19, _amdgpu_compute_multipipe@GOTPAGE
Lloh1:
	ldr	x19, [x19, _amdgpu_compute_multipipe@GOTPAGEOFF]
	ldr	w1, [x19]
	cmn	w1, #1
	b.eq	LBB0_2
; %bb.1:
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_INFO
	ldr	w8, [x19]
	cmp	w8, #1
	cset	w0, eq
	b	LBB0_5
LBB0_2:
	ldr	x8, [x0]
Lloh4:
	adrp	x9, _CHIP_POLARIS11@GOTPAGE
Lloh5:
	ldr	x9, [x9, _CHIP_POLARIS11@GOTPAGEOFF]
Lloh6:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_4
; %bb.3:
	mov	w0, #0
	b	LBB0_5
LBB0_4:
	ldr	w8, [x0, #8]
	cmp	w8, #1
	cset	w0, gt
LBB0_5:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_amdgpu_compute_multipipe,4,2   ; @amdgpu_compute_multipipe
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"amdgpu: forcing compute pipe policy %d\n"

	.comm	_CHIP_POLARIS11,8,3             ; @CHIP_POLARIS11
	.no_dead_strip	_amdgpu_gfx_is_multipipe_capable
.subsections_via_symbols
