	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sumo_set_uvd_clock_before_set_eng_clock
_sumo_set_uvd_clock_before_set_eng_clock: ## @sumo_set_uvd_clock_before_set_eng_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movq	%rsi, %rdi
	callq	_sumo_get_ps
	movq	%rax, %r12
	movq	%r14, %rdi
	callq	_sumo_get_ps
	movq	(%rbx), %rcx
	cmpq	(%r14), %rcx
	jne	LBB0_2
## %bb.1:
	movq	8(%rbx), %rcx
	cmpq	8(%r14), %rcx
	je	LBB0_3
LBB0_2:
	movq	8(%r12), %rcx
	movslq	(%r12), %rdx
	movq	-8(%rcx,%rdx,8), %rcx
	movq	8(%rax), %rdx
	movslq	(%rax), %rax
	cmpq	-8(%rdx,%rax,8), %rcx
	jge	LBB0_3
## %bb.4:
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_sumo_setup_uvd_clocks          ## TAILCALL
LBB0_3:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_sumo_set_uvd_clock_before_set_eng_clock
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sumo_set_uvd_clock_before_set_eng_clock
_sumo_set_uvd_clock_before_set_eng_clock: ; @sumo_set_uvd_clock_before_set_eng_clock
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	mov	x0, x1
	bl	_sumo_get_ps
	mov	x22, x0
	mov	x0, x19
	bl	_sumo_get_ps
	ldr	x8, [x20]
	ldr	x9, [x19]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	ldr	x8, [x20, #8]
	ldr	x9, [x19, #8]
	cmp	x8, x9
	b.eq	LBB0_4
LBB0_2:
	ldr	x8, [x22, #8]
	ldrsw	x9, [x22]
	add	x8, x8, x9, lsl #3
	ldur	x8, [x8, #-8]
	ldr	x9, [x0, #8]
	ldrsw	x10, [x0]
	add	x9, x9, x10, lsl #3
	ldur	x9, [x9, #-8]
	cmp	x8, x9
	b.ge	LBB0_4
; %bb.3:
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_sumo_setup_uvd_clocks
LBB0_4:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_sumo_set_uvd_clock_before_set_eng_clock
.subsections_via_symbols
