	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdma_v3_0_gfx_resume
_sdma_v3_0_gfx_resume:                  ## @sdma_v3_0_gfx_resume
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	cmpl	$0, 8(%rdi)
	jle	LBB0_11
## %bb.1:
	leaq	36(%r14), %rax
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	xorl	%r13d, %r13d
	movq	_mmSDMA0_GFX_VIRTUAL_ADDR@GOTPCREL(%rip), %r12
	movq	%r14, -64(%rbp)                 ## 8-byte Spill
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	(%rbx), %rax
	movl	%edi, %r14d
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_GFX_RB_WPTR@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movl	%r14d, %edi
	movl	$1, %ecx
LBB0_10:                                ##   in Loop: Header=BB0_2 Depth=1
	movq	_mmSDMA0_GFX_VIRTUAL_ADDR@GOTPCREL(%rip), %r12
	movq	_SDMA0_GFX_RB_WPTR_POLL_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_REG_SET_FIELD
	movq	(%rbx), %rcx
	movq	(%rcx,%r13,8), %rdi
	movq	_mmSDMA0_GFX_RB_WPTR_POLL_CNTL@GOTPCREL(%rip), %rcx
	addq	(%rcx), %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_SDMA0_GFX_RB_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RB_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	movl	$1, %ecx
	callq	_REG_SET_FIELD
	movq	(%rbx), %rcx
	movq	(%rcx,%r13,8), %rdi
	movq	_mmSDMA0_GFX_RB_CNTL@GOTPCREL(%rip), %rcx
	addq	(%rcx), %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	(%rbx), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_GFX_IB_CNTL@GOTPCREL(%rip), %r14
	addq	(%r14), %rdi
	callq	_RREG32
	movq	_SDMA0_GFX_IB_CNTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_IB_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	$1, %ecx
	callq	_REG_SET_FIELD
	movq	(%rbx), %rcx
	movq	(%rcx,%r13,8), %rdi
	addq	(%r14), %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	-72(%rbp), %rcx                 ## 8-byte Reload
	movl	$1, 20(%rax,%rcx)
	incq	%r13
	movq	-64(%rbp), %r14                 ## 8-byte Reload
	movslq	8(%r14), %rax
	cmpq	%rax, %r13
	jge	LBB0_11
LBB0_2:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_3 Depth 2
	movq	%r13, -96(%rbp)                 ## 8-byte Spill
	movq	%r14, %r15
	movq	16(%r14), %r14
	leaq	(,%r13,2), %rbx
	addq	%r13, %rbx
	shlq	$4, %rbx
	leaq	(%r14,%rbx), %rdi
	movq	%rdi, -104(%rbp)                ## 8-byte Spill
	callq	_amdgpu_ring_clear_ring
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movslq	(%r14,%rbx), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	-88(%rbp), %rdi                 ## 8-byte Reload
	callq	_mutex_lock
	xorl	%ebx, %ebx
	movq	%r15, %r13
	.p2align	4, 0x90
LBB0_3:                                 ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	%r13, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	movl	%ebx, %r8d
	callq	_vi_srbm_select
	movq	_sdma_offsets@GOTPCREL(%rip), %r14
	movq	(%r14), %rax
	movq	-96(%rbp), %r15                 ## 8-byte Reload
	movq	(%rax,%r15,8), %rdi
	addq	(%r12), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	(%r14), %rax
	movq	(%rax,%r15,8), %rdi
	movq	_mmSDMA0_GFX_APE1_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	incl	%ebx
	cmpl	$16, %ebx
	jne	LBB0_3
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	shlq	$2, -48(%rbp)                   ## 8-byte Folded Spill
	movq	%r13, %rdi
	movq	%r13, %rbx
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_vi_srbm_select
	movq	-88(%rbp), %rdi                 ## 8-byte Reload
	callq	_mutex_unlock
	movq	_sdma_offsets@GOTPCREL(%rip), %r15
	movq	(%r15), %rax
	movq	-96(%rbp), %r13                 ## 8-byte Reload
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_TILING_CONFIG@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	movl	32(%rbx), %esi
	andl	$112, %esi
	callq	_WREG32
	movq	(%r15), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	-72(%rbp), %r14                 ## 8-byte Reload
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	4(%rax,%r14), %eax
	leal	3(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$2, %edi
	callq	_order_base_2
	movl	%eax, %ebx
	movq	(%r15), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_GFX_RB_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	callq	_RREG32
	movq	_SDMA0_GFX_RB_CNTL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_RB_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	%eax, %esi
	movl	%eax, -76(%rbp)                 ## 4-byte Spill
	movq	(%r15), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_GFX_RB_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	callq	_WREG32
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	$0, 40(%rax,%r14)
	movq	(%r15), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_GFX_RB_RPTR@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	-104(%rbp), %rdi                ## 8-byte Reload
	callq	_sdma_v3_0_ring_set_wptr
	movq	(%r15), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_GFX_IB_RPTR@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	(%r15), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_GFX_IB_OFFSET@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	(%r15), %rax
	movq	(%rax,%r13,8), %rbx
	movq	_mmSDMA0_GFX_RB_RPTR_ADDR_HI@GOTPCREL(%rip), %rax
	addq	(%rax), %rbx
	movq	-64(%rbp), %r14                 ## 8-byte Reload
	movq	24(%r14), %rdi
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	addq	%r12, %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	(%r15), %rax
	movq	(%rax,%r13,8), %rbx
	movq	_mmSDMA0_GFX_RB_RPTR_ADDR_LO@GOTPCREL(%rip), %rax
	addq	(%rax), %rbx
	addq	24(%r14), %r12
	movq	%r12, %rdi
	callq	_lower_32_bits
	andl	$-4, %eax
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_SDMA0_GFX_RB_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RPTR_WRITEBACK_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	-76(%rbp), %edi                 ## 4-byte Reload
	movl	$1, %ecx
	callq	_REG_SET_FIELD
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	(%r15), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_GFX_RB_BASE@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	movl	8(%r14,%rbx), %esi
	sarl	$8, %esi
	callq	_WREG32
	movq	(%r15), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_GFX_RB_BASE_HI@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	callq	_WREG32
	movq	%r15, %r12
	movq	(%r15), %rax
	movq	%rbx, %r15
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_GFX_DOORBELL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	callq	_RREG32
	cmpq	$0, 32(%r14,%rbx)
	movq	_SDMA0_GFX_DOORBELL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	je	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_OFFSET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	12(%r14,%r15), %ecx
	movl	%eax, %edi
	callq	_REG_SET_FIELD
	movl	(%rbx), %esi
	movq	_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	movl	$1, %ecx
	jmp	LBB0_7
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	xorl	%ecx, %ecx
LBB0_7:                                 ##   in Loop: Header=BB0_2 Depth=1
	callq	_REG_SET_FIELD
	movq	(%r12), %rcx
	movq	(%rcx,%r13,8), %rdi
	movq	_mmSDMA0_GFX_DOORBELL@GOTPCREL(%rip), %rcx
	addq	(%rcx), %rdi
	movl	%eax, %esi
	callq	_WREG32
	movslq	16(%r14,%r15), %rbx
	shlq	$2, %rbx
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	addq	24(%rax), %rbx
	movq	(%r12), %rax
	movq	(%rax,%r13,8), %r12
	movq	_mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO@GOTPCREL(%rip), %rax
	addq	(%rax), %r12
	movq	%rbx, %rdi
	callq	_lower_32_bits
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_sdma_offsets@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rax
	movq	(%rax,%r13,8), %r12
	movq	_mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI@GOTPCREL(%rip), %rax
	addq	(%rax), %r12
	movq	%rbx, %rdi
	movq	%rcx, %rbx
	callq	_upper_32_bits
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	(%rbx), %rax
	movq	(%rax,%r13,8), %rdi
	movq	_mmSDMA0_GFX_RB_WPTR_POLL_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	callq	_RREG32
	movl	%eax, %edi
	cmpq	$0, 24(%r14,%r15)
	jne	LBB0_9
## %bb.8:                               ##   in Loop: Header=BB0_2 Depth=1
	xorl	%ecx, %ecx
	jmp	LBB0_10
LBB0_11:
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_sdma_v3_0_enable
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_sdma_v3_0_ctx_switch_enable
	cmpl	$0, 8(%r14)
	jle	LBB0_17
## %bb.12:
	xorl	%r15d, %r15d
	xorl	%r12d, %r12d
	jmp	LBB0_13
	.p2align	4, 0x90
LBB0_16:                                ##   in Loop: Header=BB0_13 Depth=1
	incq	%r12
	movslq	8(%r14), %rax
	addq	$48, %r15
	cmpq	%rax, %r12
	jge	LBB0_17
LBB0_13:                                ## =>This Inner Loop Header: Depth=1
	movq	16(%r14), %rbx
	addq	%r15, %rbx
	movq	%rbx, %rdi
	callq	_amdgpu_ring_test_helper
	testl	%eax, %eax
	jne	LBB0_18
## %bb.14:                              ##   in Loop: Header=BB0_13 Depth=1
	cmpq	(%r14), %rbx
	jne	LBB0_16
## %bb.15:                              ##   in Loop: Header=BB0_13 Depth=1
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_amdgpu_ttm_set_buffer_funcs_status
	jmp	LBB0_16
LBB0_17:
	xorl	%eax, %eax
LBB0_18:
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_mmSDMA0_GFX_VIRTUAL_ADDR,8,3   ## @mmSDMA0_GFX_VIRTUAL_ADDR
	.comm	_sdma_offsets,8,3               ## @sdma_offsets
	.comm	_mmSDMA0_GFX_APE1_CNTL,8,3      ## @mmSDMA0_GFX_APE1_CNTL
	.comm	_mmSDMA0_TILING_CONFIG,8,3      ## @mmSDMA0_TILING_CONFIG
	.comm	_mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL,8,3 ## @mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL
	.comm	_mmSDMA0_GFX_RB_CNTL,8,3        ## @mmSDMA0_GFX_RB_CNTL
	.comm	_SDMA0_GFX_RB_CNTL,4,2          ## @SDMA0_GFX_RB_CNTL
	.comm	_RB_SIZE,4,2                    ## @RB_SIZE
	.comm	_mmSDMA0_GFX_RB_RPTR,8,3        ## @mmSDMA0_GFX_RB_RPTR
	.comm	_mmSDMA0_GFX_IB_RPTR,8,3        ## @mmSDMA0_GFX_IB_RPTR
	.comm	_mmSDMA0_GFX_IB_OFFSET,8,3      ## @mmSDMA0_GFX_IB_OFFSET
	.comm	_mmSDMA0_GFX_RB_RPTR_ADDR_HI,8,3 ## @mmSDMA0_GFX_RB_RPTR_ADDR_HI
	.comm	_mmSDMA0_GFX_RB_RPTR_ADDR_LO,8,3 ## @mmSDMA0_GFX_RB_RPTR_ADDR_LO
	.comm	_RPTR_WRITEBACK_ENABLE,4,2      ## @RPTR_WRITEBACK_ENABLE
	.comm	_mmSDMA0_GFX_RB_BASE,8,3        ## @mmSDMA0_GFX_RB_BASE
	.comm	_mmSDMA0_GFX_RB_BASE_HI,8,3     ## @mmSDMA0_GFX_RB_BASE_HI
	.comm	_mmSDMA0_GFX_DOORBELL,8,3       ## @mmSDMA0_GFX_DOORBELL
	.comm	_SDMA0_GFX_DOORBELL,4,2         ## @SDMA0_GFX_DOORBELL
	.comm	_OFFSET,4,2                     ## @OFFSET
	.comm	_ENABLE,4,2                     ## @ENABLE
	.comm	_mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO,8,3 ## @mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO
	.comm	_mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI,8,3 ## @mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI
	.comm	_mmSDMA0_GFX_RB_WPTR_POLL_CNTL,8,3 ## @mmSDMA0_GFX_RB_WPTR_POLL_CNTL
	.comm	_mmSDMA0_GFX_RB_WPTR,8,3        ## @mmSDMA0_GFX_RB_WPTR
	.comm	_SDMA0_GFX_RB_WPTR_POLL_CNTL,4,2 ## @SDMA0_GFX_RB_WPTR_POLL_CNTL
	.comm	_RB_ENABLE,4,2                  ## @RB_ENABLE
	.comm	_mmSDMA0_GFX_IB_CNTL,8,3        ## @mmSDMA0_GFX_IB_CNTL
	.comm	_SDMA0_GFX_IB_CNTL,4,2          ## @SDMA0_GFX_IB_CNTL
	.comm	_IB_ENABLE,4,2                  ## @IB_ENABLE
	.comm	_IB_SWAP_ENABLE,4,2             ## @IB_SWAP_ENABLE
	.comm	_RB_SWAP_ENABLE,4,2             ## @RB_SWAP_ENABLE
	.comm	_RPTR_WRITEBACK_SWAP_ENABLE,4,2 ## @RPTR_WRITEBACK_SWAP_ENABLE
	.no_dead_strip	_sdma_v3_0_gfx_resume
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdma_v3_0_gfx_resume
_sdma_v3_0_gfx_resume:                  ; @sdma_v3_0_gfx_resume
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	w8, [x0, #8]
	cmp	w8, #1
	b.lt	LBB0_11
; %bb.1:
	mov	x24, #0
Lloh0:
	adrp	x25, _mmSDMA0_GFX_VIRTUAL_ADDR@GOTPAGE
Lloh1:
	ldr	x25, [x25, _mmSDMA0_GFX_VIRTUAL_ADDR@GOTPAGEOFF]
Lloh2:
	adrp	x26, _sdma_offsets@GOTPAGE
Lloh3:
	ldr	x26, [x26, _sdma_offsets@GOTPAGEOFF]
	add	x23, x19, #36
Lloh4:
	adrp	x27, _mmSDMA0_GFX_APE1_CNTL@GOTPAGE
Lloh5:
	ldr	x27, [x27, _mmSDMA0_GFX_APE1_CNTL@GOTPAGEOFF]
	mov	w9, #48
	str	x23, [sp, #8]                   ; 8-byte Folded Spill
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
Lloh6:
	adrp	x8, _mmSDMA0_GFX_RB_WPTR@GOTPAGE
Lloh7:
	ldr	x8, [x8, _mmSDMA0_GFX_RB_WPTR@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x24, lsl #3]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	mov	w3, #1
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	x23, [sp, #8]                   ; 8-byte Folded Reload
Lloh9:
	adrp	x8, _SDMA0_GFX_RB_WPTR_POLL_CNTL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SDMA0_GFX_RB_WPTR_POLL_CNTL@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
Lloh12:
	adrp	x8, _ENABLE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ENABLE@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x22
	bl	_REG_SET_FIELD
	mov	x1, x0
Lloh15:
	adrp	x8, _mmSDMA0_GFX_RB_WPTR_POLL_CNTL@GOTPAGE
Lloh16:
	ldr	x8, [x8, _mmSDMA0_GFX_RB_WPTR_POLL_CNTL@GOTPAGEOFF]
Lloh17:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_WREG32
Lloh18:
	adrp	x8, _SDMA0_GFX_RB_CNTL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _SDMA0_GFX_RB_CNTL@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
Lloh21:
	adrp	x8, _RB_ENABLE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RB_ENABLE@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x21
	mov	w3, #1
	bl	_REG_SET_FIELD
	mov	x1, x0
Lloh24:
	adrp	x8, _mmSDMA0_GFX_RB_CNTL@GOTPAGE
Lloh25:
	ldr	x8, [x8, _mmSDMA0_GFX_RB_CNTL@GOTPAGEOFF]
Lloh26:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_WREG32
Lloh27:
	adrp	x20, _mmSDMA0_GFX_IB_CNTL@GOTPAGE
Lloh28:
	ldr	x20, [x20, _mmSDMA0_GFX_IB_CNTL@GOTPAGEOFF]
	ldr	x8, [x20]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_RREG32
Lloh29:
	adrp	x8, _SDMA0_GFX_IB_CNTL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _SDMA0_GFX_IB_CNTL@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
Lloh32:
	adrp	x8, _IB_ENABLE@GOTPAGE
Lloh33:
	ldr	x8, [x8, _IB_ENABLE@GOTPAGEOFF]
Lloh34:
	ldr	w2, [x8]
	mov	w3, #1
	bl	_REG_SET_FIELD
	mov	x1, x0
	ldr	x8, [x20]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_WREG32
	mov	w9, #48
	ldr	x8, [sp, #24]                   ; 8-byte Folded Reload
	madd	x8, x24, x9, x8
	mov	w10, #1
	str	w10, [x8, #20]
	add	x24, x24, #1
	ldrsw	x8, [x19, #8]
	cmp	x24, x8
	b.ge	LBB0_11
LBB0_4:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	ldr	x8, [x19, #16]
	str	x8, [sp, #24]                   ; 8-byte Folded Spill
	madd	x21, x24, x9, x8
	mov	x0, x21
	bl	_amdgpu_ring_clear_ring
	ldrsw	x20, [x21]
	mov	x0, x23
	bl	_mutex_lock
	mov	w22, #0
LBB0_5:                                 ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	mov	x0, x19
	mov	w1, #0
	mov	w2, #0
	mov	w3, #0
	mov	x4, x22
	bl	_vi_srbm_select
	ldr	x8, [x25]
	ldr	x9, [x26]
	lsl	x28, x24, #3
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	ldr	x8, [x27]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	add	w22, w22, #1
	cmp	w22, #16
	b.ne	LBB0_5
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	lsl	x8, x20, #2
	str	x8, [sp, #16]                   ; 8-byte Folded Spill
	mov	x0, x19
	mov	w1, #0
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	bl	_vi_srbm_select
	mov	x0, x23
	bl	_mutex_unlock
Lloh35:
	adrp	x8, _mmSDMA0_TILING_CONFIG@GOTPAGE
Lloh36:
	ldr	x8, [x8, _mmSDMA0_TILING_CONFIG@GOTPAGEOFF]
Lloh37:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	ldr	w8, [x19, #32]
	and	w1, w8, #0x70
	bl	_WREG32
Lloh38:
	adrp	x8, _mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL@GOTPAGE
Lloh39:
	ldr	x8, [x8, _mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL@GOTPAGEOFF]
Lloh40:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	mov	w9, #48
	ldr	x8, [sp, #24]                   ; 8-byte Folded Reload
	madd	x23, x24, x9, x8
	ldr	w8, [x23, #4]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w0, w8, #2
	bl	_order_base_2
	mov	x22, x0
Lloh41:
	adrp	x20, _mmSDMA0_GFX_RB_CNTL@GOTPAGE
Lloh42:
	ldr	x20, [x20, _mmSDMA0_GFX_RB_CNTL@GOTPAGEOFF]
	ldr	x8, [x20]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_RREG32
Lloh43:
	adrp	x8, _SDMA0_GFX_RB_CNTL@GOTPAGE
Lloh44:
	ldr	x8, [x8, _SDMA0_GFX_RB_CNTL@GOTPAGEOFF]
Lloh45:
	ldr	w1, [x8]
Lloh46:
	adrp	x8, _RB_SIZE@GOTPAGE
Lloh47:
	ldr	x8, [x8, _RB_SIZE@GOTPAGEOFF]
Lloh48:
	ldr	w2, [x8]
	mov	x3, x22
	bl	_REG_SET_FIELD
	mov	x22, x0
	ldr	x8, [x20]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	x1, x22
	bl	_WREG32
	str	xzr, [x23, #40]
Lloh49:
	adrp	x8, _mmSDMA0_GFX_RB_RPTR@GOTPAGE
Lloh50:
	ldr	x8, [x8, _mmSDMA0_GFX_RB_RPTR@GOTPAGEOFF]
Lloh51:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	mov	x0, x21
	bl	_sdma_v3_0_ring_set_wptr
Lloh52:
	adrp	x8, _mmSDMA0_GFX_IB_RPTR@GOTPAGE
Lloh53:
	ldr	x8, [x8, _mmSDMA0_GFX_IB_RPTR@GOTPAGEOFF]
Lloh54:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh55:
	adrp	x8, _mmSDMA0_GFX_IB_OFFSET@GOTPAGE
Lloh56:
	ldr	x8, [x8, _mmSDMA0_GFX_IB_OFFSET@GOTPAGEOFF]
Lloh57:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh58:
	adrp	x8, _mmSDMA0_GFX_RB_RPTR_ADDR_HI@GOTPAGE
Lloh59:
	ldr	x8, [x8, _mmSDMA0_GFX_RB_RPTR_ADDR_HI@GOTPAGEOFF]
Lloh60:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x21, x9, x8
	ldr	x8, [x19, #24]
	ldr	x20, [sp, #16]                  ; 8-byte Folded Reload
	add	x0, x8, x20
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x21
	bl	_WREG32
Lloh61:
	adrp	x8, _mmSDMA0_GFX_RB_RPTR_ADDR_LO@GOTPAGE
Lloh62:
	ldr	x8, [x8, _mmSDMA0_GFX_RB_RPTR_ADDR_LO@GOTPAGEOFF]
Lloh63:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x21, x9, x8
	ldr	x8, [x19, #24]
	add	x0, x8, x20
	bl	_lower_32_bits
	and	w1, w0, #0xfffffffc
	mov	x0, x21
	bl	_WREG32
Lloh64:
	adrp	x8, _SDMA0_GFX_RB_CNTL@GOTPAGE
Lloh65:
	ldr	x8, [x8, _SDMA0_GFX_RB_CNTL@GOTPAGEOFF]
Lloh66:
	ldr	w1, [x8]
Lloh67:
	adrp	x8, _RPTR_WRITEBACK_ENABLE@GOTPAGE
Lloh68:
	ldr	x8, [x8, _RPTR_WRITEBACK_ENABLE@GOTPAGEOFF]
Lloh69:
	ldr	w2, [x8]
	mov	x0, x22
	mov	w3, #1
	bl	_REG_SET_FIELD
	mov	x21, x0
Lloh70:
	adrp	x8, _mmSDMA0_GFX_RB_BASE@GOTPAGE
Lloh71:
	ldr	x8, [x8, _mmSDMA0_GFX_RB_BASE@GOTPAGEOFF]
Lloh72:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	ldr	w8, [x23, #8]
	asr	w1, w8, #8
	bl	_WREG32
Lloh73:
	adrp	x8, _mmSDMA0_GFX_RB_BASE_HI@GOTPAGE
Lloh74:
	ldr	x8, [x8, _mmSDMA0_GFX_RB_BASE_HI@GOTPAGEOFF]
Lloh75:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_WREG32
Lloh76:
	adrp	x8, _mmSDMA0_GFX_DOORBELL@GOTPAGE
Lloh77:
	ldr	x8, [x8, _mmSDMA0_GFX_DOORBELL@GOTPAGEOFF]
Lloh78:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_RREG32
	ldr	x8, [x23, #32]
Lloh79:
	adrp	x20, _SDMA0_GFX_DOORBELL@GOTPAGE
Lloh80:
	ldr	x20, [x20, _SDMA0_GFX_DOORBELL@GOTPAGEOFF]
	ldr	w1, [x20]
	cbz	x8, LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
Lloh81:
	adrp	x8, _OFFSET@GOTPAGE
Lloh82:
	ldr	x8, [x8, _OFFSET@GOTPAGEOFF]
Lloh83:
	ldr	w2, [x8]
	ldr	x22, [sp, #24]                  ; 8-byte Folded Reload
	mov	w8, #48
	madd	x8, x24, x8, x22
	ldr	w3, [x8, #12]
	bl	_REG_SET_FIELD
	ldr	w1, [x20]
Lloh84:
	adrp	x8, _ENABLE@GOTPAGE
Lloh85:
	ldr	x8, [x8, _ENABLE@GOTPAGEOFF]
Lloh86:
	ldr	w2, [x8]
	mov	w3, #1
	bl	_REG_SET_FIELD
	mov	x1, x0
	mov	x20, x22
	b	LBB0_9
LBB0_8:                                 ;   in Loop: Header=BB0_4 Depth=1
Lloh87:
	adrp	x8, _ENABLE@GOTPAGE
Lloh88:
	ldr	x8, [x8, _ENABLE@GOTPAGEOFF]
Lloh89:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	mov	x1, x0
	ldr	x20, [sp, #24]                  ; 8-byte Folded Reload
LBB0_9:                                 ;   in Loop: Header=BB0_4 Depth=1
Lloh90:
	adrp	x8, _mmSDMA0_GFX_DOORBELL@GOTPAGE
Lloh91:
	ldr	x8, [x8, _mmSDMA0_GFX_DOORBELL@GOTPAGEOFF]
Lloh92:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_WREG32
	ldr	x8, [x19, #24]
	mov	w9, #48
	madd	x20, x24, x9, x20
	ldrsw	x9, [x20, #16]
	add	x22, x8, x9, lsl #2
Lloh93:
	adrp	x8, _mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO@GOTPAGE
Lloh94:
	ldr	x8, [x8, _mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO@GOTPAGEOFF]
Lloh95:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x23, x9, x8
	mov	x0, x22
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh96:
	adrp	x8, _mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI@GOTPAGE
Lloh97:
	ldr	x8, [x8, _mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI@GOTPAGEOFF]
Lloh98:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x23, x9, x8
	mov	x0, x22
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh99:
	adrp	x8, _mmSDMA0_GFX_RB_WPTR_POLL_CNTL@GOTPAGE
Lloh100:
	ldr	x8, [x8, _mmSDMA0_GFX_RB_WPTR_POLL_CNTL@GOTPAGEOFF]
Lloh101:
	ldr	x8, [x8]
	ldr	x9, [x26]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_RREG32
	mov	x22, x0
	ldr	x8, [x20, #24]
	cbnz	x8, LBB0_2
; %bb.10:                               ;   in Loop: Header=BB0_4 Depth=1
	mov	w3, #0
	b	LBB0_3
LBB0_11:
	mov	x0, x19
	mov	w1, #1
	bl	_sdma_v3_0_enable
	mov	x0, x19
	mov	w1, #1
	bl	_sdma_v3_0_ctx_switch_enable
	ldr	w8, [x19, #8]
	cmp	w8, #1
	b.lt	LBB0_17
; %bb.12:
	mov	x21, #0
	mov	x22, #0
	b	LBB0_14
LBB0_13:                                ;   in Loop: Header=BB0_14 Depth=1
	add	x22, x22, #1
	ldrsw	x8, [x19, #8]
	add	x21, x21, #48
	cmp	x22, x8
	b.ge	LBB0_17
LBB0_14:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #16]
	add	x20, x8, x21
	mov	x0, x20
	bl	_amdgpu_ring_test_helper
	cbnz	w0, LBB0_18
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=1
	ldr	x8, [x19]
	cmp	x20, x8
	b.ne	LBB0_13
; %bb.16:                               ;   in Loop: Header=BB0_14 Depth=1
	mov	x0, x19
	mov	w1, #1
	bl	_amdgpu_ttm_set_buffer_funcs_status
	b	LBB0_13
LBB0_17:
	mov	w0, #0
LBB0_18:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.cfi_endproc
                                        ; -- End function
	.comm	_mmSDMA0_GFX_VIRTUAL_ADDR,8,3   ; @mmSDMA0_GFX_VIRTUAL_ADDR
	.comm	_sdma_offsets,8,3               ; @sdma_offsets
	.comm	_mmSDMA0_GFX_APE1_CNTL,8,3      ; @mmSDMA0_GFX_APE1_CNTL
	.comm	_mmSDMA0_TILING_CONFIG,8,3      ; @mmSDMA0_TILING_CONFIG
	.comm	_mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL,8,3 ; @mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL
	.comm	_mmSDMA0_GFX_RB_CNTL,8,3        ; @mmSDMA0_GFX_RB_CNTL
	.comm	_SDMA0_GFX_RB_CNTL,4,2          ; @SDMA0_GFX_RB_CNTL
	.comm	_RB_SIZE,4,2                    ; @RB_SIZE
	.comm	_mmSDMA0_GFX_RB_RPTR,8,3        ; @mmSDMA0_GFX_RB_RPTR
	.comm	_mmSDMA0_GFX_IB_RPTR,8,3        ; @mmSDMA0_GFX_IB_RPTR
	.comm	_mmSDMA0_GFX_IB_OFFSET,8,3      ; @mmSDMA0_GFX_IB_OFFSET
	.comm	_mmSDMA0_GFX_RB_RPTR_ADDR_HI,8,3 ; @mmSDMA0_GFX_RB_RPTR_ADDR_HI
	.comm	_mmSDMA0_GFX_RB_RPTR_ADDR_LO,8,3 ; @mmSDMA0_GFX_RB_RPTR_ADDR_LO
	.comm	_RPTR_WRITEBACK_ENABLE,4,2      ; @RPTR_WRITEBACK_ENABLE
	.comm	_mmSDMA0_GFX_RB_BASE,8,3        ; @mmSDMA0_GFX_RB_BASE
	.comm	_mmSDMA0_GFX_RB_BASE_HI,8,3     ; @mmSDMA0_GFX_RB_BASE_HI
	.comm	_mmSDMA0_GFX_DOORBELL,8,3       ; @mmSDMA0_GFX_DOORBELL
	.comm	_SDMA0_GFX_DOORBELL,4,2         ; @SDMA0_GFX_DOORBELL
	.comm	_OFFSET,4,2                     ; @OFFSET
	.comm	_ENABLE,4,2                     ; @ENABLE
	.comm	_mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO,8,3 ; @mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO
	.comm	_mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI,8,3 ; @mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI
	.comm	_mmSDMA0_GFX_RB_WPTR_POLL_CNTL,8,3 ; @mmSDMA0_GFX_RB_WPTR_POLL_CNTL
	.comm	_mmSDMA0_GFX_RB_WPTR,8,3        ; @mmSDMA0_GFX_RB_WPTR
	.comm	_SDMA0_GFX_RB_WPTR_POLL_CNTL,4,2 ; @SDMA0_GFX_RB_WPTR_POLL_CNTL
	.comm	_RB_ENABLE,4,2                  ; @RB_ENABLE
	.comm	_mmSDMA0_GFX_IB_CNTL,8,3        ; @mmSDMA0_GFX_IB_CNTL
	.comm	_SDMA0_GFX_IB_CNTL,4,2          ; @SDMA0_GFX_IB_CNTL
	.comm	_IB_ENABLE,4,2                  ; @IB_ENABLE
	.comm	_IB_SWAP_ENABLE,4,2             ; @IB_SWAP_ENABLE
	.comm	_RB_SWAP_ENABLE,4,2             ; @RB_SWAP_ENABLE
	.comm	_RPTR_WRITEBACK_SWAP_ENABLE,4,2 ; @RPTR_WRITEBACK_SWAP_ENABLE
	.no_dead_strip	_sdma_v3_0_gfx_resume
.subsections_via_symbols
