	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dpu_hw_sspp_setup_sourceaddress
_dpu_hw_sspp_setup_sourceaddress:       ## @dpu_hw_sspp_setup_sourceaddress
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r15d
	movq	%rsi, %r12
	movq	%rdi, %r14
	movq	_DPU_SSPP_SRC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-48(%rbp), %rdx
	callq	__sspp_subblk_offset
	testq	%rax, %rax
	jne	LBB0_9
## %bb.1:
	movq	_DPU_SSPP_RECT_SOLO@GOTPCREL(%rip), %rax
	cmpl	%r15d, (%rax)
	jne	LBB0_5
## %bb.2:
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	testl	%eax, %eax
	jle	LBB0_9
## %bb.3:
	xorl	%ebx, %ebx
	movq	_SSPP_SRC0_ADDR@GOTPCREL(%rip), %r15
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	-48(%rbp), %rsi
	addq	(%r15), %rsi
	addq	%rbx, %rsi
	movq	(%r12), %rax
	movl	(%rax,%rbx), %edx
	movq	%r14, %rdi
	callq	_DPU_REG_WRITE
	incq	%r13
	movq	(%r12), %rdi
	callq	_ARRAY_SIZE
	cltq
	addq	$4, %rbx
	cmpq	%rax, %r13
	jl	LBB0_4
	jmp	LBB0_9
LBB0_5:
	movq	_DPU_SSPP_RECT_0@GOTPCREL(%rip), %rax
	cmpl	%r15d, (%rax)
	jne	LBB0_7
## %bb.6:
	movq	_SSPP_SRC0_ADDR@GOTPCREL(%rip), %rax
	movq	-48(%rbp), %rsi
	addq	(%rax), %rsi
	movq	(%r12), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_DPU_REG_WRITE
	movq	_SSPP_SRC2_ADDR@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_7:
	movq	_SSPP_SRC1_ADDR@GOTPCREL(%rip), %rax
	movq	-48(%rbp), %rsi
	addq	(%rax), %rsi
	movq	(%r12), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_DPU_REG_WRITE
	movq	_SSPP_SRC3_ADDR@GOTPCREL(%rip), %rax
LBB0_8:
	movq	-48(%rbp), %rsi
	addq	(%rax), %rsi
	movq	(%r12), %rax
	movl	8(%rax), %edx
	movq	%r14, %rdi
	callq	_DPU_REG_WRITE
LBB0_9:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DPU_SSPP_SRC,4,2               ## @DPU_SSPP_SRC
	.comm	_DPU_SSPP_RECT_SOLO,4,2         ## @DPU_SSPP_RECT_SOLO
	.comm	_SSPP_SRC0_ADDR,8,3             ## @SSPP_SRC0_ADDR
	.comm	_DPU_SSPP_RECT_0,4,2            ## @DPU_SSPP_RECT_0
	.comm	_SSPP_SRC2_ADDR,8,3             ## @SSPP_SRC2_ADDR
	.comm	_SSPP_SRC1_ADDR,8,3             ## @SSPP_SRC1_ADDR
	.comm	_SSPP_SRC3_ADDR,8,3             ## @SSPP_SRC3_ADDR
	.no_dead_strip	_dpu_hw_sspp_setup_sourceaddress
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dpu_hw_sspp_setup_sourceaddress
_dpu_hw_sspp_setup_sourceaddress:       ; @dpu_hw_sspp_setup_sourceaddress
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _DPU_SSPP_SRC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DPU_SSPP_SRC@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #8
	bl	__sspp_subblk_offset
	cbnz	x0, LBB0_9
; %bb.1:
Lloh3:
	adrp	x8, _DPU_SSPP_RECT_SOLO@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DPU_SSPP_RECT_SOLO@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w8, w21
	b.ne	LBB0_5
; %bb.2:
	ldr	x0, [x20]
	bl	_ARRAY_SIZE
	cmp	w0, #1
	b.lt	LBB0_9
; %bb.3:
	mov	x21, #0
	mov	x22, #0
Lloh6:
	adrp	x23, _SSPP_SRC0_ADDR@GOTPAGE
Lloh7:
	ldr	x23, [x23, _SSPP_SRC0_ADDR@GOTPAGEOFF]
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x23]
	ldr	x9, [sp, #8]
	add	x8, x9, x8
	add	x1, x21, x8
	ldr	x8, [x20]
	ldr	w2, [x8, x21]
	mov	x0, x19
	bl	_DPU_REG_WRITE
	add	x22, x22, #1
	ldr	x0, [x20]
	bl	_ARRAY_SIZE
	add	x21, x21, #4
	cmp	x22, w0, sxtw
	b.lt	LBB0_4
	b	LBB0_9
LBB0_5:
Lloh8:
	adrp	x8, _DPU_SSPP_RECT_0@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DPU_SSPP_RECT_0@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	cmp	w8, w21
	b.ne	LBB0_7
; %bb.6:
Lloh11:
	adrp	x8, _SSPP_SRC0_ADDR@GOTPAGE
Lloh12:
	ldr	x8, [x8, _SSPP_SRC0_ADDR@GOTPAGEOFF]
Lloh13:
	ldr	x8, [x8]
	ldr	x9, [sp, #8]
	add	x1, x9, x8
	ldr	x8, [x20]
	ldr	w2, [x8]
	mov	x0, x19
	bl	_DPU_REG_WRITE
Lloh14:
	adrp	x8, _SSPP_SRC2_ADDR@GOTPAGE
Lloh15:
	ldr	x8, [x8, _SSPP_SRC2_ADDR@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:
Lloh16:
	adrp	x8, _SSPP_SRC1_ADDR@GOTPAGE
Lloh17:
	ldr	x8, [x8, _SSPP_SRC1_ADDR@GOTPAGEOFF]
Lloh18:
	ldr	x8, [x8]
	ldr	x9, [sp, #8]
	add	x1, x9, x8
	ldr	x8, [x20]
	ldr	w2, [x8]
	mov	x0, x19
	bl	_DPU_REG_WRITE
Lloh19:
	adrp	x8, _SSPP_SRC3_ADDR@GOTPAGE
Lloh20:
	ldr	x8, [x8, _SSPP_SRC3_ADDR@GOTPAGEOFF]
LBB0_8:
	ldr	x8, [x8]
	ldr	x9, [sp, #8]
	add	x1, x9, x8
	ldr	x8, [x20]
	ldr	w2, [x8, #8]
	mov	x0, x19
	bl	_DPU_REG_WRITE
LBB0_9:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.comm	_DPU_SSPP_SRC,4,2               ; @DPU_SSPP_SRC
	.comm	_DPU_SSPP_RECT_SOLO,4,2         ; @DPU_SSPP_RECT_SOLO
	.comm	_SSPP_SRC0_ADDR,8,3             ; @SSPP_SRC0_ADDR
	.comm	_DPU_SSPP_RECT_0,4,2            ; @DPU_SSPP_RECT_0
	.comm	_SSPP_SRC2_ADDR,8,3             ; @SSPP_SRC2_ADDR
	.comm	_SSPP_SRC1_ADDR,8,3             ; @SSPP_SRC1_ADDR
	.comm	_SSPP_SRC3_ADDR,8,3             ; @SSPP_SRC3_ADDR
	.no_dead_strip	_dpu_hw_sspp_setup_sourceaddress
.subsections_via_symbols
