	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function fill_iram_v_2_2
LCPI0_0:
	.long	179                             ## 0xb3
	.long	168                             ## 0xa8
	.long	152                             ## 0x98
	.long	104                             ## 0x68
LCPI0_1:
	.long	32                              ## 0x20
	.long	32                              ## 0x20
	.long	32                              ## 0x20
	.long	32                              ## 0x20
LCPI0_2:
	.long	255                             ## 0xff
	.long	255                             ## 0xff
	.long	255                             ## 0xff
	.long	192                             ## 0xc0
LCPI0_3:
	.long	153                             ## 0x99
	.long	153                             ## 0x99
	.long	144                             ## 0x90
	.long	128                             ## 0x80
LCPI0_4:
	.long	101                             ## 0x65
	.long	101                             ## 0x65
	.long	101                             ## 0x65
	.long	101                             ## 0x65
	.section	__TEXT,__text,regular,pure_instructions
	.globl	_fill_iram_v_2_2
	.p2align	4, 0x90
_fill_iram_v_2_2:                       ## @fill_iram_v_2_2
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movl	$0, (%rdi)
	movq	8(%rdi), %rax
	movaps	LCPI0_0(%rip), %xmm0            ## xmm0 = [179,168,152,104]
	movups	%xmm0, (%rax)
	movq	_min_reduction_table_v_2_2@GOTPCREL(%rip), %r8
	movq	(%r8), %rdx
	movq	_abm_config@GOTPCREL(%rip), %rsi
	movq	(%rsi), %rdi
	movl	%r14d, %eax
	movq	(%rdi,%rax,8), %rdi
	movq	(%rdi), %rdi
	movq	(%rdx,%rdi,8), %rdx
	movq	88(%rbx), %rdi
	movq	(%rdi), %rdi
	movq	%rdx, (%rdi)
	movq	(%r8), %rdx
	movq	(%rsi), %rdi
	movq	(%rdi,%rax,8), %rdi
	movq	(%rdi), %rdi
	movq	(%rdx,%rdi,8), %rdx
	movq	88(%rbx), %rdi
	movq	8(%rdi), %rdi
	movq	%rdx, (%rdi)
	movq	(%r8), %rdx
	movq	(%rsi), %rdi
	movq	(%rdi,%rax,8), %rdi
	movq	(%rdi), %rdi
	movq	(%rdx,%rdi,8), %rdx
	movq	88(%rbx), %rdi
	movq	16(%rdi), %rdi
	movq	%rdx, (%rdi)
	movq	(%r8), %rdx
	movq	(%rsi), %rdi
	movq	(%rdi,%rax,8), %rdi
	movq	(%rdi), %rdi
	movq	(%rdx,%rdi,8), %rdx
	movq	88(%rbx), %rdi
	movq	24(%rdi), %rdi
	movq	%rdx, (%rdi)
	movq	(%r8), %rdx
	movq	(%rsi), %rdi
	movq	(%rdi,%rax,8), %rdi
	movq	(%rdi), %rdi
	movq	(%rdx,%rdi,8), %rdx
	movq	88(%rbx), %rdi
	movq	32(%rdi), %rdi
	movq	%rdx, (%rdi)
	movq	_max_reduction_table_v_2_2@GOTPCREL(%rip), %r9
	movq	(%r9), %rdx
	movq	(%rsi), %rcx
	movq	(%rcx,%rax,8), %rcx
	movq	(%rcx), %rcx
	movq	(%rdx,%rcx,8), %rcx
	movq	80(%rbx), %rdx
	movq	(%rdx), %rdx
	movq	%rcx, (%rdx)
	movq	(%r9), %rcx
	movq	(%rsi), %rdx
	movq	(%rdx,%rax,8), %rdx
	movq	(%rdx), %rdx
	movq	(%rcx,%rdx,8), %rcx
	movq	80(%rbx), %rdx
	movq	8(%rdx), %rdx
	movq	%rcx, (%rdx)
	movq	(%r9), %rcx
	movq	(%rsi), %rdx
	movq	(%rdx,%rax,8), %rdx
	movq	(%rdx), %rdx
	movq	(%rcx,%rdx,8), %rcx
	movq	80(%rbx), %rdx
	movq	16(%rdx), %rdx
	movq	%rcx, (%rdx)
	movq	(%r9), %rcx
	movq	(%rsi), %rdx
	movq	(%rdx,%rax,8), %rdx
	movq	(%rdx), %rdx
	movq	(%rcx,%rdx,8), %rcx
	movq	80(%rbx), %rdx
	movq	24(%rdx), %rdx
	movq	%rcx, (%rdx)
	movq	(%r9), %rcx
	movq	(%rsi), %rdx
	movq	(%rdx,%rax,8), %rdx
	movq	(%rdx), %rdx
	movq	(%rcx,%rdx,8), %rcx
	movq	80(%rbx), %rdx
	movq	32(%rdx), %rdx
	movq	%rcx, (%rdx)
	movq	(%r8), %rdx
	movq	(%rsi), %rcx
	movq	(%rcx,%rax,8), %rsi
	movq	8(%rsi), %rsi
	movq	(%rdx,%rsi,8), %rsi
	movq	88(%rbx), %rdi
	movq	(%rdi), %rdi
	movq	%rsi, 8(%rdi)
	movq	(%rcx,%rax,8), %rsi
	movq	8(%rsi), %rsi
	movq	(%rdx,%rsi,8), %rsi
	movq	88(%rbx), %rdi
	movq	8(%rdi), %rdi
	movq	%rsi, 8(%rdi)
	movq	(%rcx,%rax,8), %rsi
	movq	8(%rsi), %rsi
	movq	(%rdx,%rsi,8), %rsi
	movq	88(%rbx), %rdi
	movq	16(%rdi), %rdi
	movq	%rsi, 8(%rdi)
	movq	(%rcx,%rax,8), %rsi
	movq	8(%rsi), %rsi
	movq	(%rdx,%rsi,8), %rsi
	movq	88(%rbx), %rdi
	movq	24(%rdi), %rdi
	movq	%rsi, 8(%rdi)
	movq	(%rcx,%rax,8), %rsi
	movq	8(%rsi), %rsi
	movq	(%rdx,%rsi,8), %rsi
	movq	88(%rbx), %rdi
	movq	32(%rdi), %rdi
	movq	%rsi, 8(%rdi)
	movq	(%r9), %rsi
	movq	(%rcx,%rax,8), %rdi
	movq	8(%rdi), %rdi
	movq	(%rsi,%rdi,8), %r8
	movq	80(%rbx), %rdi
	movq	(%rdi), %rdi
	movq	%r8, 8(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	8(%rdi), %rdi
	movq	(%rsi,%rdi,8), %r8
	movq	80(%rbx), %rdi
	movq	8(%rdi), %rdi
	movq	%r8, 8(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	8(%rdi), %rdi
	movq	(%rsi,%rdi,8), %r8
	movq	80(%rbx), %rdi
	movq	16(%rdi), %rdi
	movq	%r8, 8(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	8(%rdi), %rdi
	movq	(%rsi,%rdi,8), %r8
	movq	80(%rbx), %rdi
	movq	24(%rdi), %rdi
	movq	%r8, 8(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	8(%rdi), %rdi
	movq	(%rsi,%rdi,8), %r8
	movq	80(%rbx), %rdi
	movq	32(%rdi), %rdi
	movq	%r8, 8(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	16(%rdi), %rdi
	movq	(%rdx,%rdi,8), %r8
	movq	88(%rbx), %rdi
	movq	(%rdi), %rdi
	movq	%r8, 16(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	16(%rdi), %rdi
	movq	(%rdx,%rdi,8), %r8
	movq	88(%rbx), %rdi
	movq	8(%rdi), %rdi
	movq	%r8, 16(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	16(%rdi), %rdi
	movq	(%rdx,%rdi,8), %r8
	movq	88(%rbx), %rdi
	movq	16(%rdi), %rdi
	movq	%r8, 16(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	16(%rdi), %rdi
	movq	(%rdx,%rdi,8), %r8
	movq	88(%rbx), %rdi
	movq	24(%rdi), %rdi
	movq	%r8, 16(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	16(%rdi), %rdi
	movq	(%rdx,%rdi,8), %r8
	movq	88(%rbx), %rdi
	movq	32(%rdi), %rdi
	movq	%r8, 16(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	16(%rdi), %rdi
	movq	(%rsi,%rdi,8), %r8
	movq	80(%rbx), %rdi
	movq	(%rdi), %rdi
	movq	%r8, 16(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	16(%rdi), %rdi
	movq	(%rsi,%rdi,8), %r8
	movq	80(%rbx), %rdi
	movq	8(%rdi), %rdi
	movq	%r8, 16(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	16(%rdi), %rdi
	movq	(%rsi,%rdi,8), %r8
	movq	80(%rbx), %rdi
	movq	16(%rdi), %rdi
	movq	%r8, 16(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	16(%rdi), %rdi
	movq	(%rsi,%rdi,8), %r8
	movq	80(%rbx), %rdi
	movq	24(%rdi), %rdi
	movq	%r8, 16(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	16(%rdi), %rdi
	movq	(%rsi,%rdi,8), %r8
	movq	80(%rbx), %rdi
	movq	32(%rdi), %rdi
	movq	%r8, 16(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	24(%rdi), %rdi
	movq	(%rdx,%rdi,8), %r8
	movq	88(%rbx), %rdi
	movq	(%rdi), %rdi
	movq	%r8, 24(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	24(%rdi), %rdi
	movq	(%rdx,%rdi,8), %r8
	movq	88(%rbx), %rdi
	movq	8(%rdi), %rdi
	movq	%r8, 24(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	24(%rdi), %rdi
	movq	(%rdx,%rdi,8), %r8
	movq	88(%rbx), %rdi
	movq	16(%rdi), %rdi
	movq	%r8, 24(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	24(%rdi), %rdi
	movq	(%rdx,%rdi,8), %r8
	movq	88(%rbx), %rdi
	movq	24(%rdi), %rdi
	movq	%r8, 24(%rdi)
	movq	(%rcx,%rax,8), %rdi
	movq	24(%rdi), %rdi
	movq	(%rdx,%rdi,8), %rdx
	movq	88(%rbx), %rdi
	movq	32(%rdi), %rdi
	movq	%rdx, 24(%rdi)
	movq	(%rcx,%rax,8), %rdx
	movq	24(%rdx), %rdx
	movq	(%rsi,%rdx,8), %rdx
	movq	80(%rbx), %rdi
	movq	(%rdi), %rdi
	movq	%rdx, 24(%rdi)
	movq	(%rcx,%rax,8), %rdx
	movq	24(%rdx), %rdx
	movq	(%rsi,%rdx,8), %rdx
	movq	80(%rbx), %rdi
	movq	8(%rdi), %rdi
	movq	%rdx, 24(%rdi)
	movq	(%rcx,%rax,8), %rdx
	movq	24(%rdx), %rdx
	movq	(%rsi,%rdx,8), %rdx
	movq	80(%rbx), %rdi
	movq	16(%rdi), %rdi
	movq	%rdx, 24(%rdi)
	movq	(%rcx,%rax,8), %rdx
	movq	24(%rdx), %rdx
	movq	(%rsi,%rdx,8), %rdx
	movq	80(%rbx), %rdi
	movq	24(%rdi), %rdi
	movq	%rdx, 24(%rdi)
	movq	(%rcx,%rax,8), %rax
	movq	24(%rax), %rax
	movq	(%rsi,%rax,8), %rax
	movq	80(%rbx), %rcx
	movq	32(%rcx), %rcx
	movq	%rax, 24(%rcx)
	movq	16(%rbx), %rax
	movq	(%rax), %rcx
	movaps	LCPI0_1(%rip), %xmm0            ## xmm0 = [32,32,32,32]
	movups	%xmm0, (%rcx)
	movq	8(%rax), %rcx
	movups	%xmm0, (%rcx)
	movq	16(%rax), %rcx
	movups	%xmm0, (%rcx)
	movq	24(%rax), %rcx
	movups	%xmm0, (%rcx)
	movq	32(%rax), %rax
	movups	%xmm0, (%rax)
	movq	24(%rbx), %rax
	movq	(%rax), %rcx
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rcx)
	movq	8(%rax), %rcx
	movups	%xmm0, (%rcx)
	movq	16(%rax), %rcx
	movups	%xmm0, (%rcx)
	movq	24(%rax), %rcx
	movups	%xmm0, (%rcx)
	movq	32(%rax), %rax
	movups	%xmm0, (%rax)
	movq	32(%rbx), %rax
	movaps	LCPI0_2(%rip), %xmm0            ## xmm0 = [255,255,255,192]
	movups	%xmm0, (%rax)
	movq	40(%rbx), %rax
	movaps	LCPI0_3(%rip), %xmm0            ## xmm0 = [153,153,144,128]
	movups	%xmm0, (%rax)
	movq	48(%rbx), %rax
	movaps	LCPI0_4(%rip), %xmm0            ## xmm0 = [101,101,101,101]
	movups	%xmm0, (%rax)
	movl	$101, 16(%rax)
	movl	$4732, %edi                     ## imm = 0x127C
	callq	_cpu_to_be16
	movq	72(%rbx), %rcx
	movq	%rax, (%rcx)
	movl	$5403, %edi                     ## imm = 0x151B
	callq	_cpu_to_be16
	movq	72(%rbx), %rcx
	movq	%rax, 8(%rcx)
	movl	$6101, %edi                     ## imm = 0x17D5
	callq	_cpu_to_be16
	movq	72(%rbx), %rcx
	movq	%rax, 16(%rcx)
	movl	$6742, %edi                     ## imm = 0x1A56
	callq	_cpu_to_be16
	movq	72(%rbx), %rcx
	movq	%rax, 24(%rcx)
	movl	$7299, %edi                     ## imm = 0x1C83
	callq	_cpu_to_be16
	movq	72(%rbx), %rcx
	movq	%rax, 32(%rcx)
	movl	$7794, %edi                     ## imm = 0x1E72
	callq	_cpu_to_be16
	movq	72(%rbx), %rcx
	movq	%rax, 40(%rcx)
	movl	$8432, %edi                     ## imm = 0x20F0
	callq	_cpu_to_be16
	movq	72(%rbx), %rcx
	movq	%rax, 48(%rcx)
	movl	$9003, %edi                     ## imm = 0x232B
	callq	_cpu_to_be16
	movq	72(%rbx), %rcx
	movq	%rax, 56(%rcx)
	movl	$10649, %edi                    ## imm = 0x2999
	callq	_cpu_to_be16
	movq	64(%rbx), %rcx
	movq	%rax, (%rcx)
	movl	$14745, %edi                    ## imm = 0x3999
	callq	_cpu_to_be16
	movq	64(%rbx), %rcx
	movq	%rax, 8(%rcx)
	movl	$18022, %edi                    ## imm = 0x4666
	callq	_cpu_to_be16
	movq	64(%rbx), %rcx
	movq	%rax, 16(%rcx)
	movl	$22937, %edi                    ## imm = 0x5999
	callq	_cpu_to_be16
	movq	64(%rbx), %rcx
	movq	%rax, 24(%rcx)
	movl	$25395, %edi                    ## imm = 0x6333
	callq	_cpu_to_be16
	movq	64(%rbx), %rcx
	movq	%rax, 32(%rcx)
	movl	$30720, %edi                    ## imm = 0x7800
	callq	_cpu_to_be16
	movq	64(%rbx), %rcx
	movq	%rax, 40(%rcx)
	movl	$35840, %edi                    ## imm = 0x8C00
	callq	_cpu_to_be16
	movq	64(%rbx), %rcx
	movq	%rax, 48(%rcx)
	movl	$40960, %edi                    ## imm = 0xA000
	callq	_cpu_to_be16
	movq	64(%rbx), %rcx
	movq	%rax, 56(%rcx)
	movl	$13833, %edi                    ## imm = 0x3609
	callq	_cpu_to_be16
	movq	56(%rbx), %rcx
	movq	%rax, (%rcx)
	movl	$11770, %edi                    ## imm = 0x2DFA
	callq	_cpu_to_be16
	movq	56(%rbx), %rcx
	movq	%rax, 8(%rcx)
	movl	$10218, %edi                    ## imm = 0x27EA
	callq	_cpu_to_be16
	movq	56(%rbx), %rcx
	movq	%rax, 16(%rcx)
	movl	$9053, %edi                     ## imm = 0x235D
	callq	_cpu_to_be16
	movq	56(%rbx), %rcx
	movq	%rax, 24(%rcx)
	movl	$8258, %edi                     ## imm = 0x2042
	callq	_cpu_to_be16
	movq	56(%rbx), %rcx
	movq	%rax, 32(%rcx)
	movl	$7619, %edi                     ## imm = 0x1DC3
	callq	_cpu_to_be16
	movq	56(%rbx), %rcx
	movq	%rax, 40(%rcx)
	movl	$6938, %edi                     ## imm = 0x1B1A
	callq	_cpu_to_be16
	movq	56(%rbx), %rcx
	movq	%rax, 48(%rcx)
	movl	$6416, %edi                     ## imm = 0x1910
	callq	_cpu_to_be16
	movq	56(%rbx), %rcx
	movq	%rax, 56(%rcx)
	movl	%r14d, %edi
	movq	%rbx, %rsi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_fill_backlight_transform_table_v_2_2 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_min_reduction_table_v_2_2,8,3  ## @min_reduction_table_v_2_2
	.comm	_abm_config,8,3                 ## @abm_config
	.comm	_max_reduction_table_v_2_2,8,3  ## @max_reduction_table_v_2_2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ; -- Begin function fill_iram_v_2_2
lCPI0_0:
	.long	179                             ; 0xb3
	.long	168                             ; 0xa8
	.long	152                             ; 0x98
	.long	104                             ; 0x68
lCPI0_1:
	.long	255                             ; 0xff
	.long	255                             ; 0xff
	.long	255                             ; 0xff
	.long	192                             ; 0xc0
lCPI0_2:
	.long	153                             ; 0x99
	.long	153                             ; 0x99
	.long	144                             ; 0x90
	.long	128                             ; 0x80
	.section	__TEXT,__text,regular,pure_instructions
	.globl	_fill_iram_v_2_2
	.p2align	2
_fill_iram_v_2_2:                       ; @fill_iram_v_2_2
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x10, _min_reduction_table_v_2_2@GOTPAGE
Lloh1:
	ldr	x10, [x10, _min_reduction_table_v_2_2@GOTPAGEOFF]
	ldr	x8, [x0, #8]
	ldr	x11, [x10]
Lloh2:
	adrp	x12, _abm_config@GOTPAGE
Lloh3:
	ldr	x12, [x12, _abm_config@GOTPAGEOFF]
	ldr	x13, [x12]
	and	x20, x1, #0xffffffff
	lsl	x9, x20, #3
	ldr	x13, [x13, x9]
	ldr	x13, [x13]
	ldr	x11, [x11, x13, lsl #3]
	ldr	x13, [x0, #88]
	ldr	x13, [x13]
	str	x11, [x13]
	ldr	x11, [x12]
	ldr	x11, [x11, x9]
	ldr	x13, [x10]
	ldr	x11, [x11]
	ldr	x11, [x13, x11, lsl #3]
	ldr	x13, [x0, #88]
	ldr	x13, [x13, #8]
	str	x11, [x13]
	ldr	x11, [x10]
	ldr	x13, [x12]
	ldr	x13, [x13, x9]
	ldr	x13, [x13]
	ldr	x11, [x11, x13, lsl #3]
	ldr	x13, [x0, #88]
	ldr	x13, [x13, #16]
	str	x11, [x13]
	ldr	x11, [x10]
	ldr	x13, [x12]
	ldr	x13, [x13, x9]
	ldr	x13, [x13]
	ldr	x11, [x11, x13, lsl #3]
	ldr	x13, [x0, #88]
	ldr	x13, [x13, #24]
	str	x11, [x13]
	ldr	x11, [x12]
	ldr	x11, [x11, x9]
	ldr	x13, [x10]
	ldr	x11, [x11]
	ldr	x11, [x13, x11, lsl #3]
	ldr	x13, [x0, #88]
	ldr	x13, [x13, #32]
	str	x11, [x13]
Lloh4:
	adrp	x13, _max_reduction_table_v_2_2@GOTPAGE
Lloh5:
	ldr	x13, [x13, _max_reduction_table_v_2_2@GOTPAGEOFF]
	ldr	x11, [x12]
	ldr	x11, [x11, x9]
	ldr	x14, [x13]
	ldr	x11, [x11]
	ldr	x11, [x14, x11, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14]
	str	x11, [x14]
	ldr	x11, [x13]
	ldr	x14, [x12]
	ldr	x14, [x14, x9]
	ldr	x14, [x14]
	ldr	x11, [x11, x14, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #8]
	str	x11, [x14]
	ldr	x11, [x13]
	ldr	x14, [x12]
	ldr	x14, [x14, x9]
	ldr	x14, [x14]
	ldr	x11, [x11, x14, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #16]
	str	x11, [x14]
	ldr	x11, [x12]
	ldr	x11, [x11, x9]
	ldr	x14, [x13]
	ldr	x11, [x11]
	ldr	x11, [x14, x11, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #24]
	str	x11, [x14]
	ldr	x11, [x13]
	ldr	x14, [x12]
	ldr	x14, [x14, x9]
	ldr	x14, [x14]
	ldr	x11, [x11, x14, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #32]
	str	x11, [x14]
	ldr	x11, [x10]
	ldr	x10, [x12]
	ldr	x12, [x10, x9]
	ldr	x12, [x12, #8]
	ldr	x12, [x11, x12, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14]
	str	x12, [x14, #8]
	ldr	x12, [x10, x9]
	ldr	x12, [x12, #8]
	ldr	x12, [x11, x12, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14, #8]
	str	x12, [x14, #8]
	ldr	x12, [x10, x9]
	ldr	x12, [x12, #8]
	ldr	x12, [x11, x12, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14, #16]
	str	x12, [x14, #8]
	ldr	x12, [x10, x9]
	ldr	x12, [x12, #8]
	ldr	x12, [x11, x12, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14, #24]
	str	x12, [x14, #8]
	ldr	x12, [x10, x9]
	ldr	x12, [x12, #8]
	ldr	x12, [x11, x12, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14, #32]
	str	x12, [x14, #8]
	ldr	x14, [x10, x9]
	ldr	x12, [x13]
	ldr	x13, [x14, #8]
	ldr	x13, [x12, x13, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14]
	str	x13, [x14, #8]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #8]
	ldr	x13, [x12, x13, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #8]
	str	x13, [x14, #8]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #8]
	ldr	x13, [x12, x13, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #16]
	str	x13, [x14, #8]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #8]
	ldr	x13, [x12, x13, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #24]
	str	x13, [x14, #8]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #8]
	ldr	x13, [x12, x13, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #32]
	str	x13, [x14, #8]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #16]
	ldr	x13, [x11, x13, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14]
	str	x13, [x14, #16]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #16]
	ldr	x13, [x11, x13, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14, #8]
	str	x13, [x14, #16]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #16]
	ldr	x13, [x11, x13, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14, #16]
	str	x13, [x14, #16]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #16]
	ldr	x13, [x11, x13, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14, #24]
	str	x13, [x14, #16]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #16]
	ldr	x13, [x11, x13, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14, #32]
	str	x13, [x14, #16]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #16]
	ldr	x13, [x12, x13, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14]
	str	x13, [x14, #16]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #16]
	ldr	x13, [x12, x13, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #8]
	str	x13, [x14, #16]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #16]
	ldr	x13, [x12, x13, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #16]
	str	x13, [x14, #16]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #16]
	ldr	x13, [x12, x13, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #24]
	str	x13, [x14, #16]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #16]
	ldr	x13, [x12, x13, lsl #3]
	ldr	x14, [x0, #80]
	ldr	x14, [x14, #32]
	str	x13, [x14, #16]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #24]
	ldr	x13, [x11, x13, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14]
	str	x13, [x14, #24]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #24]
	ldr	x13, [x11, x13, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14, #8]
	str	x13, [x14, #24]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #24]
	ldr	x13, [x11, x13, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14, #16]
	str	x13, [x14, #24]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #24]
	ldr	x13, [x11, x13, lsl #3]
	ldr	x14, [x0, #88]
	ldr	x14, [x14, #24]
	str	x13, [x14, #24]
	ldr	x13, [x10, x9]
	ldr	x13, [x13, #24]
	ldr	x11, [x11, x13, lsl #3]
	ldr	x13, [x0, #88]
	ldr	x13, [x13, #32]
	str	x11, [x13, #24]
	ldr	x11, [x10, x9]
	ldr	x11, [x11, #24]
	ldr	x11, [x12, x11, lsl #3]
	ldr	x13, [x0, #80]
	ldr	x13, [x13]
	str	x11, [x13, #24]
	ldr	x11, [x10, x9]
	ldr	x11, [x11, #24]
	ldr	x11, [x12, x11, lsl #3]
	str	wzr, [x0]
	ldr	x13, [x0, #80]
	ldr	x13, [x13, #8]
	str	x11, [x13, #24]
	ldr	x11, [x10, x9]
	ldr	x11, [x11, #24]
	ldr	x11, [x12, x11, lsl #3]
	ldr	x13, [x0, #80]
	ldr	x13, [x13, #16]
	str	x11, [x13, #24]
	ldr	x11, [x10, x9]
	ldr	x11, [x11, #24]
	ldr	x11, [x12, x11, lsl #3]
Lloh6:
	adrp	x13, lCPI0_0@PAGE
Lloh7:
	ldr	q0, [x13, lCPI0_0@PAGEOFF]
	ldr	x13, [x0, #80]
	ldr	x13, [x13, #24]
	str	x11, [x13, #24]
	ldr	x9, [x10, x9]
	str	q0, [x8]
	ldr	x8, [x9, #24]
	ldr	x8, [x12, x8, lsl #3]
	ldr	x9, [x0, #80]
	ldr	x9, [x9, #32]
	str	x8, [x9, #24]
	movi.4s	v0, #32
	ldp	x8, x9, [x0, #16]
	ldp	x10, x11, [x8]
	str	q0, [x10]
	str	q0, [x11]
	ldp	x10, x11, [x8, #16]
	str	q0, [x10]
	str	q0, [x11]
	ldr	x8, [x8, #32]
	str	q0, [x8]
	ldr	x8, [x9]
	stp	xzr, xzr, [x8]
	ldr	x8, [x9, #8]
	stp	xzr, xzr, [x8]
	ldr	x8, [x9, #16]
	stp	xzr, xzr, [x8]
	ldr	x8, [x9, #24]
	stp	xzr, xzr, [x8]
	ldr	x8, [x9, #32]
	stp	xzr, xzr, [x8]
Lloh8:
	adrp	x8, lCPI0_1@PAGE
Lloh9:
	ldr	q0, [x8, lCPI0_1@PAGEOFF]
	ldp	x8, x9, [x0, #32]
	str	q0, [x8]
Lloh10:
	adrp	x8, lCPI0_2@PAGE
Lloh11:
	ldr	q0, [x8, lCPI0_2@PAGEOFF]
	str	q0, [x9]
	ldr	x8, [x0, #48]
	movi.4s	v0, #101
	str	q0, [x8]
	mov	w9, #101
	str	w9, [x8, #16]
	mov	w0, #4732
	bl	_cpu_to_be16
	ldr	x8, [x19, #72]
	str	x0, [x8]
	mov	w0, #5403
	bl	_cpu_to_be16
	ldr	x8, [x19, #72]
	str	x0, [x8, #8]
	mov	w0, #6101
	bl	_cpu_to_be16
	ldr	x8, [x19, #72]
	str	x0, [x8, #16]
	mov	w0, #6742
	bl	_cpu_to_be16
	ldr	x8, [x19, #72]
	str	x0, [x8, #24]
	mov	w0, #7299
	bl	_cpu_to_be16
	ldr	x8, [x19, #72]
	str	x0, [x8, #32]
	mov	w0, #7794
	bl	_cpu_to_be16
	ldr	x8, [x19, #72]
	str	x0, [x8, #40]
	mov	w0, #8432
	bl	_cpu_to_be16
	ldr	x8, [x19, #72]
	str	x0, [x8, #48]
	mov	w0, #9003
	bl	_cpu_to_be16
	ldr	x8, [x19, #72]
	str	x0, [x8, #56]
	mov	w0, #10649
	bl	_cpu_to_be16
	ldr	x8, [x19, #64]
	str	x0, [x8]
	mov	w0, #14745
	bl	_cpu_to_be16
	ldr	x8, [x19, #64]
	str	x0, [x8, #8]
	mov	w0, #18022
	bl	_cpu_to_be16
	ldr	x8, [x19, #64]
	str	x0, [x8, #16]
	mov	w0, #22937
	bl	_cpu_to_be16
	ldr	x8, [x19, #64]
	str	x0, [x8, #24]
	mov	w0, #25395
	bl	_cpu_to_be16
	ldr	x8, [x19, #64]
	str	x0, [x8, #32]
	mov	w0, #30720
	bl	_cpu_to_be16
	ldr	x8, [x19, #64]
	str	x0, [x8, #40]
	mov	w0, #35840
	bl	_cpu_to_be16
	ldr	x8, [x19, #64]
	str	x0, [x8, #48]
	mov	w0, #40960
	bl	_cpu_to_be16
	ldr	x8, [x19, #64]
	str	x0, [x8, #56]
	mov	w0, #13833
	bl	_cpu_to_be16
	ldr	x8, [x19, #56]
	str	x0, [x8]
	mov	w0, #11770
	bl	_cpu_to_be16
	ldr	x8, [x19, #56]
	str	x0, [x8, #8]
	mov	w0, #10218
	bl	_cpu_to_be16
	ldr	x8, [x19, #56]
	str	x0, [x8, #16]
	mov	w0, #9053
	bl	_cpu_to_be16
	ldr	x8, [x19, #56]
	str	x0, [x8, #24]
	mov	w0, #8258
	bl	_cpu_to_be16
	ldr	x8, [x19, #56]
	str	x0, [x8, #32]
	mov	w0, #7619
	bl	_cpu_to_be16
	ldr	x8, [x19, #56]
	str	x0, [x8, #40]
	mov	w0, #6938
	bl	_cpu_to_be16
	ldr	x8, [x19, #56]
	str	x0, [x8, #48]
	mov	w0, #6416
	bl	_cpu_to_be16
	ldr	x8, [x19, #56]
	str	x0, [x8, #56]
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_fill_backlight_transform_table_v_2_2
	.loh AdrpLdr	Lloh10, Lloh11
	.loh AdrpLdr	Lloh8, Lloh9
	.loh AdrpLdr	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_min_reduction_table_v_2_2,8,3  ; @min_reduction_table_v_2_2
	.comm	_abm_config,8,3                 ; @abm_config
	.comm	_max_reduction_table_v_2_2,8,3  ; @max_reduction_table_v_2_2
.subsections_via_symbols
