	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_i830_enable_pipe               ## -- Begin function i830_enable_pipe
	.p2align	4, 0x90
_i830_enable_pipe:                      ## @i830_enable_pipe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	callq	_intel_get_crtc_for_pipe
	movq	%rax, %r14
	movups	l___const.i830_enable_pipe.clock+12(%rip), %xmm0
	movups	%xmm0, -68(%rbp)
	movups	l___const.i830_enable_pipe.clock(%rip), %xmm0
	movaps	%xmm0, -80(%rbp)
	leaq	-80(%rbp), %rbx
	movl	$48000, %edi                    ## imm = 0xBB80
	movq	%rbx, %rsi
	callq	_i9xx_calc_dpll_params
	xorl	%edi, %edi
	cmpl	$25154, %eax                    ## imm = 0x6242
	setne	%dil
	callq	_WARN_ON
	movl	%r15d, %edi
	callq	_pipe_name
	movl	-60(%rbp), %ecx
	movl	-56(%rbp), %edx
	leaq	L_.str(%rip), %rdi
	movl	%eax, %esi
	callq	_DRM_DEBUG_KMS
	movq	%rbx, %rdi
	callq	_i9xx_dpll_compute_fp
	movl	-72(%rbp), %ebx
	addl	$-2, %ebx
	movq	_DPLL_FPA01_P1_POST_DIV_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %ebx
	movq	_DPLL_DVO_2X_MODE@GOTPCREL(%rip), %rcx
	movq	_DPLL_VGA_MODE_DIS@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	orl	(%rcx), %edx
	orl	%edx, %ebx
	movq	_PLL_P2_DIVIDE_BY_4@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movq	_PLL_REF_INPUT_DREFCLK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	movl	%eax, %r12d
	movq	_DPLL_VCO_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	%r15d, %edi
	callq	_FP0
	movl	%eax, %edi
	movl	%r12d, %esi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_FP1
	movl	%eax, %edi
	movl	%r12d, %esi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_HTOTAL
	movl	%eax, %edi
	movl	$52363903, %esi                 ## imm = 0x31F027F
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_HBLANK
	movl	%eax, %edi
	movl	$52363903, %esi                 ## imm = 0x31F027F
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_HSYNC
	movl	%eax, %edi
	movl	$49218191, %esi                 ## imm = 0x2EF028F
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_VTOTAL
	movl	%eax, %edi
	movl	$34341343, %esi                 ## imm = 0x20C01DF
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_VBLANK
	movl	%eax, %edi
	movl	$34341343, %esi                 ## imm = 0x20C01DF
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_VSYNC
	movl	%eax, %edi
	movl	$32178665, %esi                 ## imm = 0x1EB01E9
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_PIPESRC
	movl	%eax, %edi
	movl	$41877983, %esi                 ## imm = 0x27F01DF
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_DPLL
	movl	(%r13), %esi
	notl	%esi
	andl	%ebx, %esi
	movl	%eax, %edi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_DPLL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_DPLL
	movl	%eax, %edi
	callq	_POSTING_READ
	movl	$150, %edi
	callq	_udelay
	movl	%r15d, %edi
	callq	_DPLL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_DPLL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_DPLL
	movl	%eax, %edi
	callq	_POSTING_READ
	movl	$150, %edi
	callq	_udelay
	movl	%r15d, %edi
	callq	_DPLL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_DPLL
	movl	%eax, %edi
	callq	_POSTING_READ
	movl	$150, %edi
	callq	_udelay
	movl	%r15d, %edi
	callq	_DPLL
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_DPLL
	movl	%eax, %edi
	callq	_POSTING_READ
	movl	$150, %edi
	callq	_udelay
	movl	%r15d, %edi
	callq	_PIPECONF
	movq	_PIPECONF_ENABLE@GOTPCREL(%rip), %rcx
	movq	_PIPECONF_PROGRESSIVE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	orl	(%rcx), %esi
	movl	%eax, %edi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_PIPECONF
	movl	%eax, %edi
	callq	_POSTING_READ
	movq	%r14, %rdi
	callq	_intel_wait_for_pipe_scanline_moving
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	2                               ## @__const.i830_enable_pipe.clock
l___const.i830_enable_pipe.clock:
	.long	18                              ## 0x12
	.long	7                               ## 0x7
	.long	13                              ## 0xd
	.long	4                               ## 0x4
	.long	2                               ## 0x2
	.long	0                               ## 0x0
	.long	0                               ## 0x0

	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"enabling pipe %c due to force quirk (vco=%d dot=%d)\n"

	.comm	_DPLL_DVO_2X_MODE,4,2           ## @DPLL_DVO_2X_MODE
	.comm	_DPLL_VGA_MODE_DIS,4,2          ## @DPLL_VGA_MODE_DIS
	.comm	_DPLL_FPA01_P1_POST_DIV_SHIFT,4,2 ## @DPLL_FPA01_P1_POST_DIV_SHIFT
	.comm	_PLL_P2_DIVIDE_BY_4,4,2         ## @PLL_P2_DIVIDE_BY_4
	.comm	_PLL_REF_INPUT_DREFCLK,4,2      ## @PLL_REF_INPUT_DREFCLK
	.comm	_DPLL_VCO_ENABLE,4,2            ## @DPLL_VCO_ENABLE
	.comm	_PIPECONF_ENABLE,4,2            ## @PIPECONF_ENABLE
	.comm	_PIPECONF_PROGRESSIVE,4,2       ## @PIPECONF_PROGRESSIVE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_i830_enable_pipe               ; -- Begin function i830_enable_pipe
	.p2align	2
_i830_enable_pipe:                      ; @i830_enable_pipe
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	bl	_intel_get_crtc_for_pipe
	mov	x19, x0
Lloh0:
	adrp	x8, l___const.i830_enable_pipe.clock@PAGE
Lloh1:
	add	x8, x8, l___const.i830_enable_pipe.clock@PAGEOFF
	ldr	q0, [x8]
	str	q0, [sp]
	ldur	q0, [x8, #12]
	stur	q0, [sp, #12]
	mov	x1, sp
	mov	w0, #48000
	bl	_i9xx_calc_dpll_params
	mov	w8, #25154
	cmp	w0, w8
	cset	w0, ne
	bl	_WARN_ON
	mov	x0, x20
	bl	_pipe_name
	mov	x1, x0
	ldp	w3, w2, [sp, #20]
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
	mov	x0, sp
	bl	_i9xx_dpll_compute_fp
	mov	x22, x0
Lloh4:
	adrp	x8, _DPLL_DVO_2X_MODE@GOTPAGE
Lloh5:
	ldr	x8, [x8, _DPLL_DVO_2X_MODE@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
Lloh7:
	adrp	x23, _DPLL_VGA_MODE_DIS@GOTPAGE
Lloh8:
	ldr	x23, [x23, _DPLL_VGA_MODE_DIS@GOTPAGEOFF]
	ldr	w9, [x23]
	orr	w8, w9, w8
	ldr	w9, [sp, #8]
	sub	w9, w9, #2
Lloh9:
	adrp	x10, _DPLL_FPA01_P1_POST_DIV_SHIFT@GOTPAGE
Lloh10:
	ldr	x10, [x10, _DPLL_FPA01_P1_POST_DIV_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w8, w9
Lloh12:
	adrp	x9, _PLL_P2_DIVIDE_BY_4@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PLL_P2_DIVIDE_BY_4@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh15:
	adrp	x9, _PLL_REF_INPUT_DREFCLK@GOTPAGE
Lloh16:
	ldr	x9, [x9, _PLL_REF_INPUT_DREFCLK@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh18:
	adrp	x9, _DPLL_VCO_ENABLE@GOTPAGE
Lloh19:
	ldr	x9, [x9, _DPLL_VCO_ENABLE@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w21, w8, w9
	mov	x0, x20
	bl	_FP0
	mov	x1, x22
	bl	_I915_WRITE
	mov	x0, x20
	bl	_FP1
	mov	x1, x22
	bl	_I915_WRITE
	mov	x0, x20
	bl	_HTOTAL
	mov	w1, #639
	movk	w1, #799, lsl #16
	bl	_I915_WRITE
	mov	x0, x20
	bl	_HBLANK
	mov	w1, #639
	movk	w1, #799, lsl #16
	bl	_I915_WRITE
	mov	x0, x20
	bl	_HSYNC
	mov	w1, #655
	movk	w1, #751, lsl #16
	bl	_I915_WRITE
	mov	x0, x20
	bl	_VTOTAL
	mov	w22, #479
	movk	w22, #524, lsl #16
	mov	w1, #479
	movk	w1, #524, lsl #16
	bl	_I915_WRITE
	mov	x0, x20
	bl	_VBLANK
	mov	w1, #479
	movk	w1, #524, lsl #16
	bl	_I915_WRITE
	mov	x0, x20
	bl	_VSYNC
	mov	w1, #489
	movk	w1, #491, lsl #16
	bl	_I915_WRITE
	mov	x0, x20
	bl	_PIPESRC
	mov	w8, #7536640
	orr	w1, w22, w8
	bl	_I915_WRITE
	mov	x0, x20
	bl	_DPLL
	ldr	w8, [x23]
	bic	w1, w21, w8
	bl	_I915_WRITE
	mov	x0, x20
	bl	_DPLL
	mov	x1, x21
	bl	_I915_WRITE
	mov	x0, x20
	bl	_DPLL
	bl	_POSTING_READ
	mov	w0, #150
	bl	_udelay
	mov	x0, x20
	bl	_DPLL
	mov	x1, x21
	bl	_I915_WRITE
	mov	x0, x20
	bl	_DPLL
	mov	x1, x21
	bl	_I915_WRITE
	mov	x0, x20
	bl	_DPLL
	bl	_POSTING_READ
	mov	w0, #150
	bl	_udelay
	mov	x0, x20
	bl	_DPLL
	mov	x1, x21
	bl	_I915_WRITE
	mov	x0, x20
	bl	_DPLL
	bl	_POSTING_READ
	mov	w0, #150
	bl	_udelay
	mov	x0, x20
	bl	_DPLL
	mov	x1, x21
	bl	_I915_WRITE
	mov	x0, x20
	bl	_DPLL
	bl	_POSTING_READ
	mov	w0, #150
	bl	_udelay
	mov	x0, x20
	bl	_PIPECONF
Lloh21:
	adrp	x8, _PIPECONF_ENABLE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PIPECONF_ENABLE@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
Lloh24:
	adrp	x9, _PIPECONF_PROGRESSIVE@GOTPAGE
Lloh25:
	ldr	x9, [x9, _PIPECONF_PROGRESSIVE@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_I915_WRITE
	mov	x0, x20
	bl	_PIPECONF
	bl	_POSTING_READ
	mov	x0, x19
	bl	_intel_wait_for_pipe_scanline_moving
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @__const.i830_enable_pipe.clock
l___const.i830_enable_pipe.clock:
	.long	18                              ; 0x12
	.long	7                               ; 0x7
	.long	13                              ; 0xd
	.long	4                               ; 0x4
	.long	2                               ; 0x2
	.long	0                               ; 0x0
	.long	0                               ; 0x0

	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"enabling pipe %c due to force quirk (vco=%d dot=%d)\n"

	.comm	_DPLL_DVO_2X_MODE,4,2           ; @DPLL_DVO_2X_MODE
	.comm	_DPLL_VGA_MODE_DIS,4,2          ; @DPLL_VGA_MODE_DIS
	.comm	_DPLL_FPA01_P1_POST_DIV_SHIFT,4,2 ; @DPLL_FPA01_P1_POST_DIV_SHIFT
	.comm	_PLL_P2_DIVIDE_BY_4,4,2         ; @PLL_P2_DIVIDE_BY_4
	.comm	_PLL_REF_INPUT_DREFCLK,4,2      ; @PLL_REF_INPUT_DREFCLK
	.comm	_DPLL_VCO_ENABLE,4,2            ; @DPLL_VCO_ENABLE
	.comm	_PIPECONF_ENABLE,4,2            ; @PIPECONF_ENABLE
	.comm	_PIPECONF_PROGRESSIVE,4,2       ; @PIPECONF_PROGRESSIVE
.subsections_via_symbols
