	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dump_mmu_fault
_dump_mmu_fault:                        ## @dump_mmu_fault
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	_ETNA_SEC_NONE@GOTPCREL(%rip), %r12
	cmpq	(%r12), %rax
	jne	LBB0_1
## %bb.2:
	movq	_VIVS_MMUv2_STATUS@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_VIVS_MMUv2_SEC_STATUS@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_gpu_read
	movl	%eax, %r14d
	movl	8(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_err_ratelimited
	movq	_VIVS_MMUv2_STATUS_EXCEPTION0__MASK@GOTPCREL(%rip), %r13
	movl	(%r13), %eax
	testl	%r14d, %eax
	je	LBB0_8
## %bb.4:
	movq	(%rbx), %rax
	cmpq	(%r12), %rax
	jne	LBB0_6
## %bb.5:
	xorl	%edi, %edi
	callq	_VIVS_MMUv2_EXCEPTION_ADDR
	movl	%eax, %esi
	jmp	LBB0_7
LBB0_6:
	movq	_VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_7:
	movl	8(%rbx), %r15d
	movq	%rbx, %rdi
	callq	_gpu_read
	leaq	L_.str.1(%rip), %rsi
	movl	%r15d, %edi
	xorl	%edx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_dev_err_ratelimited
	movl	(%r13), %eax
LBB0_8:
	movl	%eax, %ecx
	shll	$4, %ecx
	testl	%r14d, %ecx
	je	LBB0_13
## %bb.9:
	movq	(%rbx), %rax
	cmpq	(%r12), %rax
	jne	LBB0_10
## %bb.11:
	movl	$1, %edi
	callq	_VIVS_MMUv2_EXCEPTION_ADDR
	movl	%eax, %esi
	jmp	LBB0_12
LBB0_10:
	movq	_VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_12:
	movl	8(%rbx), %r15d
	movq	%rbx, %rdi
	callq	_gpu_read
	leaq	L_.str.1(%rip), %rsi
	movl	%r15d, %edi
	movl	$1, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_dev_err_ratelimited
	movl	(%r13), %eax
LBB0_13:
	movl	%eax, %ecx
	shll	$8, %ecx
	testl	%r14d, %ecx
	je	LBB0_18
## %bb.14:
	movq	(%rbx), %rax
	cmpq	(%r12), %rax
	jne	LBB0_15
## %bb.16:
	movl	$2, %edi
	callq	_VIVS_MMUv2_EXCEPTION_ADDR
	movl	%eax, %esi
	jmp	LBB0_17
LBB0_15:
	movq	_VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_17:
	movl	8(%rbx), %r15d
	movq	%rbx, %rdi
	callq	_gpu_read
	leaq	L_.str.1(%rip), %rsi
	movl	%r15d, %edi
	movl	$2, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_dev_err_ratelimited
	movl	(%r13), %eax
LBB0_18:
	shll	$12, %eax
	testl	%r14d, %eax
	je	LBB0_23
## %bb.19:
	movq	(%rbx), %rax
	cmpq	(%r12), %rax
	jne	LBB0_20
## %bb.21:
	movl	$3, %edi
	callq	_VIVS_MMUv2_EXCEPTION_ADDR
	movl	%eax, %esi
	jmp	LBB0_22
LBB0_23:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_20:
	movq	_VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_22:
	movl	8(%rbx), %r14d
	movq	%rbx, %rdi
	callq	_gpu_read
	leaq	L_.str.1(%rip), %rsi
	movl	%r14d, %edi
	movl	$3, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_err_ratelimited            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ETNA_SEC_NONE,8,3              ## @ETNA_SEC_NONE
	.comm	_VIVS_MMUv2_STATUS,4,2          ## @VIVS_MMUv2_STATUS
	.comm	_VIVS_MMUv2_SEC_STATUS,4,2      ## @VIVS_MMUv2_SEC_STATUS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"MMU fault status 0x%08x\n"

	.comm	_VIVS_MMUv2_STATUS_EXCEPTION0__MASK,4,2 ## @VIVS_MMUv2_STATUS_EXCEPTION0__MASK
	.comm	_VIVS_MMUv2_SEC_EXCEPTION_ADDR,4,2 ## @VIVS_MMUv2_SEC_EXCEPTION_ADDR
L_.str.1:                               ## @.str.1
	.asciz	"MMU %d fault addr 0x%08x\n"

	.no_dead_strip	_dump_mmu_fault
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dump_mmu_fault
_dump_mmu_fault:                        ; @dump_mmu_fault
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x22, _ETNA_SEC_NONE@GOTPAGE
Lloh1:
	ldr	x22, [x22, _ETNA_SEC_NONE@GOTPAGEOFF]
Lloh2:
	adrp	x9, _VIVS_MMUv2_STATUS@GOTPAGE
Lloh3:
	ldr	x9, [x9, _VIVS_MMUv2_STATUS@GOTPAGEOFF]
	ldr	x10, [x22]
Lloh4:
	adrp	x11, _VIVS_MMUv2_SEC_STATUS@GOTPAGE
Lloh5:
	ldr	x11, [x11, _VIVS_MMUv2_SEC_STATUS@GOTPAGEOFF]
	cmp	x8, x10
	csel	x8, x9, x11, eq
	ldr	w1, [x8]
	bl	_gpu_read
	mov	x20, x0
	ldr	w0, [x19, #8]
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x20
	bl	_dev_err_ratelimited
Lloh8:
	adrp	x23, _VIVS_MMUv2_STATUS_EXCEPTION0__MASK@GOTPAGE
Lloh9:
	ldr	x23, [x23, _VIVS_MMUv2_STATUS_EXCEPTION0__MASK@GOTPAGEOFF]
	ldr	w8, [x23]
	tst	w8, w20
	b.eq	LBB0_5
; %bb.1:
	ldr	x8, [x19]
	ldr	x9, [x22]
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.2:
	mov	w0, #0
	bl	_VIVS_MMUv2_EXCEPTION_ADDR
	mov	x1, x0
	b	LBB0_4
LBB0_3:
Lloh10:
	adrp	x8, _VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPAGE
Lloh11:
	ldr	x8, [x8, _VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
LBB0_4:
	ldr	w21, [x19, #8]
	mov	x0, x19
	bl	_gpu_read
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh13:
	adrp	x1, l_.str.1@PAGE
Lloh14:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x21
	mov	w2, #0
	bl	_dev_err_ratelimited
	ldr	w8, [x23]
LBB0_5:
	tst	w20, w8, lsl #4
	b.eq	LBB0_10
; %bb.6:
	ldr	x8, [x19]
	ldr	x9, [x22]
	cmp	x8, x9
	b.ne	LBB0_8
; %bb.7:
	mov	w0, #1
	bl	_VIVS_MMUv2_EXCEPTION_ADDR
	mov	x1, x0
	b	LBB0_9
LBB0_8:
Lloh15:
	adrp	x8, _VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPAGE
Lloh16:
	ldr	x8, [x8, _VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
LBB0_9:
	ldr	w21, [x19, #8]
	mov	x0, x19
	bl	_gpu_read
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh18:
	adrp	x1, l_.str.1@PAGE
Lloh19:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x21
	mov	w2, #1
	bl	_dev_err_ratelimited
	ldr	w8, [x23]
LBB0_10:
	tst	w20, w8, lsl #8
	b.eq	LBB0_15
; %bb.11:
	ldr	x8, [x19]
	ldr	x9, [x22]
	cmp	x8, x9
	b.ne	LBB0_13
; %bb.12:
	mov	w0, #2
	bl	_VIVS_MMUv2_EXCEPTION_ADDR
	mov	x1, x0
	b	LBB0_14
LBB0_13:
Lloh20:
	adrp	x8, _VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPAGE
Lloh21:
	ldr	x8, [x8, _VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
LBB0_14:
	ldr	w21, [x19, #8]
	mov	x0, x19
	bl	_gpu_read
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh23:
	adrp	x1, l_.str.1@PAGE
Lloh24:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x21
	mov	w2, #2
	bl	_dev_err_ratelimited
	ldr	w8, [x23]
LBB0_15:
	tst	w20, w8, lsl #12
	b.eq	LBB0_20
; %bb.16:
	ldr	x8, [x19]
	ldr	x9, [x22]
	cmp	x8, x9
	b.ne	LBB0_18
; %bb.17:
	mov	w0, #3
	bl	_VIVS_MMUv2_EXCEPTION_ADDR
	mov	x1, x0
	b	LBB0_19
LBB0_18:
Lloh25:
	adrp	x8, _VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPAGE
Lloh26:
	ldr	x8, [x8, _VIVS_MMUv2_SEC_EXCEPTION_ADDR@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
LBB0_19:
	ldr	w20, [x19, #8]
	mov	x0, x19
	bl	_gpu_read
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh28:
	adrp	x1, l_.str.1@PAGE
Lloh29:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x20
	mov	w2, #3
	bl	_dev_err_ratelimited
LBB0_20:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpAdd	Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_ETNA_SEC_NONE,8,3              ; @ETNA_SEC_NONE
	.comm	_VIVS_MMUv2_STATUS,4,2          ; @VIVS_MMUv2_STATUS
	.comm	_VIVS_MMUv2_SEC_STATUS,4,2      ; @VIVS_MMUv2_SEC_STATUS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"MMU fault status 0x%08x\n"

	.comm	_VIVS_MMUv2_STATUS_EXCEPTION0__MASK,4,2 ; @VIVS_MMUv2_STATUS_EXCEPTION0__MASK
	.comm	_VIVS_MMUv2_SEC_EXCEPTION_ADDR,4,2 ; @VIVS_MMUv2_SEC_EXCEPTION_ADDR
l_.str.1:                               ; @.str.1
	.asciz	"MMU %d fault addr 0x%08x\n"

	.no_dead_strip	_dump_mmu_fault
.subsections_via_symbols
