	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_of_gpiochip_add                ## -- Begin function of_gpiochip_add
	.p2align	4, 0x90
_of_gpiochip_add:                       ## @of_gpiochip_add
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	xorl	%eax, %eax
	cmpl	$0, 4(%rdi)
	je	LBB0_11
## %bb.1:
	movq	%rdi, %rbx
	cmpq	$0, 16(%rdi)
	je	LBB0_3
## %bb.2:
	movl	(%rbx), %eax
	jmp	LBB0_4
LBB0_3:
	movl	$2, (%rbx)
	movq	_of_gpio_simple_xlate@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 16(%rbx)
	movl	$2, %eax
LBB0_4:
	movq	_MAX_PHANDLE_ARGS@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jle	LBB0_6
## %bb.5:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_11
LBB0_6:
	movq	%rbx, %rdi
	callq	_of_gpiochip_init_valid_mask
	movq	%rbx, %rdi
	callq	_of_gpiochip_add_pin_range
	testl	%eax, %eax
	jne	LBB0_11
## %bb.7:
	cmpl	$0, 8(%rbx)
	jne	LBB0_9
## %bb.8:
	movl	4(%rbx), %edi
	callq	_of_fwnode_handle
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_devprop_gpiochip_set_names
LBB0_9:
	movl	4(%rbx), %edi
	callq	_of_node_get
	movq	%rbx, %rdi
	callq	_of_gpiochip_scan_gpios
	movl	%eax, %r14d
	movl	$0, %eax
	testl	%r14d, %r14d
	je	LBB0_11
## %bb.10:
	movl	4(%rbx), %edi
	callq	_of_node_put
	movq	%rbx, %rdi
	callq	_gpiochip_remove_pin_ranges
	movl	%r14d, %eax
LBB0_11:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_of_gpio_simple_xlate,8,3       ## @of_gpio_simple_xlate
	.comm	_MAX_PHANDLE_ARGS,4,2           ## @MAX_PHANDLE_ARGS
	.comm	_EINVAL,4,2                     ## @EINVAL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_of_gpiochip_add                ; -- Begin function of_gpiochip_add
	.p2align	2
_of_gpiochip_add:                       ; @of_gpiochip_add
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	w8, [x0, #4]
	cbz	w8, LBB0_3
; %bb.1:
	mov	x19, x0
	ldr	x8, [x0, #16]
	cbz	x8, LBB0_4
; %bb.2:
	ldr	w8, [x19]
	b	LBB0_5
LBB0_3:
	mov	w20, #0
	b	LBB0_12
LBB0_4:
	mov	w8, #2
	str	w8, [x19]
Lloh0:
	adrp	x9, _of_gpio_simple_xlate@GOTPAGE
Lloh1:
	ldr	x9, [x9, _of_gpio_simple_xlate@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	str	x9, [x19, #16]
LBB0_5:
Lloh3:
	adrp	x9, _MAX_PHANDLE_ARGS@GOTPAGE
Lloh4:
	ldr	x9, [x9, _MAX_PHANDLE_ARGS@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	cmp	w8, w9
	b.le	LBB0_7
; %bb.6:
Lloh6:
	adrp	x8, _EINVAL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_12
LBB0_7:
	mov	x0, x19
	bl	_of_gpiochip_init_valid_mask
	mov	x0, x19
	bl	_of_gpiochip_add_pin_range
	mov	x20, x0
	cbnz	w0, LBB0_12
; %bb.8:
	ldr	w8, [x19, #8]
	cbnz	w8, LBB0_10
; %bb.9:
	ldr	w0, [x19, #4]
	bl	_of_fwnode_handle
	mov	x1, x0
	mov	x0, x19
	bl	_devprop_gpiochip_set_names
LBB0_10:
	ldr	w0, [x19, #4]
	bl	_of_node_get
	mov	x0, x19
	bl	_of_gpiochip_scan_gpios
	mov	x20, x0
	cbz	w0, LBB0_12
; %bb.11:
	ldr	w0, [x19, #4]
	bl	_of_node_put
	mov	x0, x19
	bl	_gpiochip_remove_pin_ranges
LBB0_12:
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_of_gpio_simple_xlate,8,3       ; @of_gpio_simple_xlate
	.comm	_MAX_PHANDLE_ARGS,4,2           ; @MAX_PHANDLE_ARGS
	.comm	_EINVAL,4,2                     ; @EINVAL
.subsections_via_symbols
