	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_atombios_get_clock_dividers ## -- Begin function amdgpu_atombios_get_clock_dividers
	.p2align	4, 0x90
_amdgpu_atombios_get_clock_dividers:    ## @amdgpu_atombios_get_clock_dividers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%r8, %r14
	movl	%ecx, -92(%rbp)                 ## 4-byte Spill
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movl	%esi, %ebx
	movq	%rdi, %r13
	movq	_COMMAND@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_ComputeMemoryEnginePLL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_GetIndexIntoMasterTable
	movl	%eax, %r15d
	leaq	-88(%rbp), %rdi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	movl	$40, %edx
	callq	_memset
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$200, %edx
	callq	_memset
	movl	(%r13), %edi
	leaq	-100(%rbp), %rdx
	leaq	-96(%rbp), %rcx
	movl	%r15d, %esi
	callq	_amdgpu_atom_parse_cmd_header
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movl	-96(%rbp), %eax
	addl	$-2, %eax
	cmpl	$4, %eax
	ja	LBB0_12
## %bb.3:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_4:
	movq	_COMPUTE_ENGINE_PLL_PARAM@GOTPCREL(%rip), %rax
	cmpl	%ebx, (%rax)
	jne	LBB0_6
## %bb.5:
	shll	$24, %ebx
	orl	-44(%rbp), %ebx                 ## 4-byte Folded Reload
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, -64(%rbp)
	jmp	LBB0_9
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_13
LBB0_6:
	movl	4(%r13), %eax
	movq	_CHIP_TAHITI@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jge	LBB0_12
## %bb.7:
	shll	$24, %ebx
	orl	-44(%rbp), %ebx                 ## 4-byte Folded Reload
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, -64(%rbp)
	cmpl	$0, -92(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_9
## %bb.8:
	movq	_ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -68(%rbp)
LBB0_9:
	movl	(%r13), %edi
	leaq	-88(%rbp), %rdx
	movl	%r15d, %esi
	callq	_amdgpu_atom_execute_table
	movl	-72(%rbp), %eax
	movl	%eax, 76(%r14)
	movl	-88(%rbp), %eax
	movq	_ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	setne	%dl
	movl	%edx, (%r14)
	movq	_ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	andl	(%rcx), %eax
	sete	%dl
	movl	%edx, 4(%r14)
	movl	-76(%rbp), %edi
	callq	_le16_to_cpu
	movq	%rax, 96(%r14)
	movl	-80(%rbp), %edi
	callq	_le16_to_cpu
	movq	%rax, 88(%r14)
	movl	-84(%rbp), %eax
	movl	%eax, 80(%r14)
	movq	_ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	andl	-88(%rbp), %eax
	setne	%cl
	movl	%ecx, 8(%r14)
	xorl	%r12d, %r12d
	jmp	LBB0_14
LBB0_12:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r12d, %r12d
LBB0_13:
	subl	(%rax), %r12d
LBB0_14:
	movl	%r12d, %eax
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_le32
	movq	%rax, -88(%rbp)
	movl	(%r13), %edi
	leaq	-88(%rbp), %rdx
	movl	%r15d, %esi
	callq	_amdgpu_atom_execute_table
	movl	-80(%rbp), %eax
	movl	%eax, 76(%r14)
	movl	%eax, 56(%r14)
	movq	-88(%rbp), %rdi
	callq	_le32_to_cpu
	movq	%rax, 64(%r14)
	xorl	%r12d, %r12d
	jmp	LBB0_14
LBB0_11:
	movl	%ebx, -88(%rbp)
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_le32
	movq	%rax, -80(%rbp)
	movl	(%r13), %edi
	leaq	-88(%rbp), %rdx
	movl	%r15d, %esi
	callq	_amdgpu_atom_execute_table
	movl	-56(%rbp), %edi
	callq	_le16_to_cpu
	movq	%rax, 96(%r14)
	movl	-60(%rbp), %edi
	callq	_le16_to_cpu
	movq	%rax, 88(%r14)
	movl	-64(%rbp), %eax
	movl	%eax, 80(%r14)
	movl	-68(%rbp), %eax
	movl	%eax, 76(%r14)
	movl	-72(%rbp), %eax
	movl	%eax, 72(%r14)
	movq	-80(%rbp), %rdi
	callq	_le32_to_cpu
	movq	%rax, 64(%r14)
	movl	-88(%rbp), %eax
	movl	%eax, 56(%r14)
	xorl	%r12d, %r12d
	jmp	LBB0_14
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
LJTI0_0:
	.long	L0_0_set_4
	.long	L0_0_set_4
	.long	L0_0_set_10
	.long	L0_0_set_4
	.long	L0_0_set_11
	.end_data_region
                                        ## -- End function
	.comm	_COMMAND,4,2                    ## @COMMAND
	.comm	_ComputeMemoryEnginePLL,4,2     ## @ComputeMemoryEnginePLL
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ## @COMPUTE_ENGINE_PLL_PARAM
	.comm	_ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN,4,2 ## @ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN
	.comm	_ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE,4,2 ## @ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE
	.comm	_ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE,4,2 ## @ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE
	.comm	_CHIP_TAHITI,4,2                ## @CHIP_TAHITI
	.comm	_ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN,4,2 ## @ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_atombios_get_clock_dividers ; -- Begin function amdgpu_atombios_get_clock_dividers
	.p2align	2
_amdgpu_atombios_get_clock_dividers:    ; @amdgpu_atombios_get_clock_dividers
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x4
	mov	x22, x3
	mov	x23, x2
	mov	x24, x1
	mov	x21, x0
Lloh0:
	adrp	x8, _COMMAND@GOTPAGE
Lloh1:
	ldr	x8, [x8, _COMMAND@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _ComputeMemoryEnginePLL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ComputeMemoryEnginePLL@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_GetIndexIntoMasterTable
	mov	x20, x0
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #40
	bl	_memset
	mov	x0, x19
	mov	w1, #0
	mov	w2, #200
	bl	_memset
	ldr	w0, [x21]
	add	x2, sp, #4
	mov	x3, sp
	mov	x1, x20
	bl	_amdgpu_atom_parse_cmd_header
	cbz	w0, LBB0_9
; %bb.1:
	ldr	w8, [sp]
	sub	w8, w8, #2
	cmp	w8, #4
	b.hi	LBB0_9
; %bb.2:
Lloh6:
	adrp	x9, lJTI0_0@PAGE
Lloh7:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_3
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_3:
Lloh8:
	adrp	x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGE
Lloh9:
	ldr	x8, [x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	cmp	w8, w24
	b.ne	LBB0_5
; %bb.4:
	orr	w0, w23, w24, lsl #24
	bl	_cpu_to_le32
	str	x0, [sp, #32]
	b	LBB0_8
LBB0_5:
	ldr	w8, [x21, #4]
Lloh11:
	adrp	x9, _CHIP_TAHITI@GOTPAGE
Lloh12:
	ldr	x9, [x9, _CHIP_TAHITI@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ge	LBB0_9
; %bb.6:
	orr	w0, w23, w24, lsl #24
	bl	_cpu_to_le32
	str	x0, [sp, #32]
	cbz	w22, LBB0_8
; %bb.7:
Lloh14:
	adrp	x8, _ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN@GOTPAGE
Lloh15:
	ldr	x8, [x8, _ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	str	w8, [sp, #28]
LBB0_8:
	ldr	w0, [x21]
	add	x2, sp, #8
	mov	x1, x20
	bl	_amdgpu_atom_execute_table
	ldp	w0, w8, [sp, #20]
	str	w8, [x19, #76]
Lloh17:
	adrp	x8, _ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN@GOTPAGE
Lloh18:
	ldr	x8, [x8, _ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	ldr	w9, [sp, #8]
	tst	w8, w9
	cset	w8, ne
	str	w8, [x19]
Lloh20:
	adrp	x8, _ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	tst	w8, w9
	cset	w8, eq
	str	w8, [x19, #4]
	bl	_le16_to_cpu
	str	x0, [x19, #96]
	ldr	w0, [sp, #16]
	bl	_le16_to_cpu
	mov	x8, x0
	mov	w0, #0
	str	x8, [x19, #88]
	ldp	w9, w8, [sp, #8]
	str	w8, [x19, #80]
Lloh23:
	adrp	x8, _ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	tst	w8, w9
	cset	w8, ne
	str	w8, [x19, #8]
	b	LBB0_10
LBB0_9:
Lloh26:
	adrp	x8, _EINVAL@GOTPAGE
Lloh27:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_10:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_11:
	mov	x0, x23
	bl	_cpu_to_le32
	str	x0, [sp, #8]
	ldr	w0, [x21]
	add	x2, sp, #8
	mov	x1, x20
	bl	_amdgpu_atom_execute_table
	ldr	w8, [sp, #16]
	str	w8, [x19, #76]
	str	w8, [x19, #56]
	ldr	x0, [sp, #8]
	bl	_le32_to_cpu
	mov	x8, x0
	mov	w0, #0
	str	x8, [x19, #64]
	b	LBB0_10
LBB0_12:
	str	w24, [sp, #8]
	mov	x0, x23
	bl	_cpu_to_le32
	str	x0, [sp, #16]
	ldr	w0, [x21]
	add	x2, sp, #8
	mov	x1, x20
	bl	_amdgpu_atom_execute_table
	ldr	w0, [sp, #40]
	bl	_le16_to_cpu
	str	x0, [x19, #96]
	ldr	w0, [sp, #36]
	bl	_le16_to_cpu
	str	x0, [x19, #88]
	ldr	w8, [sp, #32]
	str	w8, [x19, #80]
	ldr	d0, [sp, #24]
	str	d0, [x19, #72]
	ldr	x0, [sp, #16]
	bl	_le32_to_cpu
	mov	x8, x0
	mov	w0, #0
	str	x8, [x19, #64]
	ldr	w8, [sp, #8]
	str	w8, [x19, #56]
	b	LBB0_10
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_11-LBB0_3)>>2
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_12-LBB0_3)>>2
                                        ; -- End function
	.comm	_COMMAND,4,2                    ; @COMMAND
	.comm	_ComputeMemoryEnginePLL,4,2     ; @ComputeMemoryEnginePLL
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ; @COMPUTE_ENGINE_PLL_PARAM
	.comm	_ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN,4,2 ; @ATOM_PLL_CNTL_FLAG_PLL_POST_DIV_EN
	.comm	_ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE,4,2 ; @ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE
	.comm	_ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE,4,2 ; @ATOM_PLL_CNTL_FLAG_MPLL_VCO_MODE
	.comm	_CHIP_TAHITI,4,2                ; @CHIP_TAHITI
	.comm	_ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN,4,2 ; @ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN
.subsections_via_symbols
