	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pl111_display_enable
_pl111_display_enable:                  ## @pl111_display_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	(%rdi), %rax
	movq	%rdi, -80(%rbp)                 ## 8-byte Spill
	movq	8(%rdi), %r15
	movq	8(%r15), %rbx
	movq	(%rax), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	48(%rbx), %rax
	movq	%rax, -96(%rbp)                 ## 8-byte Spill
	movq	40(%rbx), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movl	36(%rbx), %edi
	imull	$1000, (%rsi), %esi             ## imm = 0x3E8
	callq	_clk_set_rate
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	movl	(%r15), %edi
	imull	$1000, (%r14), %edx             ## imm = 0x3E8
	leaq	L_.str(%rip), %rsi
	movl	%eax, %ecx
	callq	_dev_err
LBB0_2:
	movq	%r15, -88(%rbp)                 ## 8-byte Spill
	movl	36(%rbx), %edi
	callq	_clk_prepare_enable
	movl	4(%r14), %eax
	movl	8(%r14), %edi
	leal	15(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$4, %ecx
	movl	12(%r14), %edx
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
                                        ## kill: def $eax killed $eax killed $rax
	notl	%eax
	addl	%edx, %eax
	notl	%edx
	addl	%edi, %edx
	notl	%edi
	addl	16(%r14), %edi
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movl	20(%r14), %r15d
	movl	24(%r14), %esi
	movl	28(%r14), %ebx
	movl	%ebx, %r13d
	notl	%r13d
	addl	%esi, %r13d
	subl	%r15d, %ebx
	decl	%r15d
	movl	32(%r14), %r12d
	subl	%esi, %r12d
	leal	-4(,%rcx,4), %ecx
	shll	$8, %edx
	shll	$16, %eax
	orl	%edx, %eax
	orl	%ecx, %eax
	shll	$24, %edi
	orl	%eax, %edi
	movq	_CLCD_TIM0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	addq	16(%rax), %rsi
	callq	_writel
	shll	$10, %r13d
	shll	$16, %ebx
	orl	%r15d, %ebx
	movq	-72(%rbp), %r15                 ## 8-byte Reload
	orl	%r13d, %ebx
	shll	$24, %r12d
	orl	%ebx, %r12d
	movq	_CLCD_TIM1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	16(%r15), %rsi
	movl	%r12d, %edi
	callq	_writel
	leaq	32(%r15), %r12
	movq	%r12, %rdi
	callq	_spin_lock
	movq	_CLCD_TIM2@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	addq	16(%r15), %rdi
	callq	_readl
	movq	_TIM2_BCD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_TIM2_PCD_LO_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%edx, %ecx
	movq	_TIM2_PCD_HI_MASK@GOTPCREL(%rip), %rsi
	orl	(%rsi), %ecx
	andl	%eax, %ecx
	movq	(%r15), %rsi
	xorl	%eax, %eax
	cmpq	$0, 32(%rsi)
	cmovnel	%edx, %eax
	movl	36(%r14), %edx
	movq	_DRM_MODE_FLAG_NHSYNC@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	andl	%edx, %esi
	je	LBB0_4
## %bb.3:
	movq	_TIM2_IHS@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
LBB0_4:
	orl	%esi, %ecx
	movq	_DRM_MODE_FLAG_NVSYNC@GOTPCREL(%rip), %rsi
	andl	(%rsi), %edx
	movq	-96(%rbp), %rdi                 ## 8-byte Reload
	je	LBB0_6
## %bb.5:
	movq	_TIM2_IVS@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
LBB0_6:
	orl	%edx, %ecx
	orl	%ecx, %eax
	movb	$1, %r14b
	testq	%rdi, %rdi
	je	LBB0_15
## %bb.7:
	movq	_DRM_BUS_FLAG_DE_LOW@GOTPCREL(%rip), %rcx
	movl	(%rdi), %edx
	movl	(%rcx), %ecx
	andl	%edx, %ecx
	je	LBB0_9
## %bb.8:
	movq	_TIM2_IOE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_9:
	movl	4(%rdi), %esi
	orl	%eax, %ecx
	movq	_DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE@GOTPCREL(%rip), %rax
	andl	(%rax), %edx
	je	LBB0_11
## %bb.10:
	movq	_TIM2_IPC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
LBB0_11:
	orl	%edx, %ecx
	cmpl	$1, %esi
	jne	LBB0_14
## %bb.12:
	movq	8(%rdi), %rax
	movq	(%rax), %rax
	movq	_MEDIA_BUS_FMT_Y8_1X8@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rax
	jne	LBB0_14
## %bb.13:
	movq	_TIM2_ACB_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	xorl	%r14d, %r14d
LBB0_14:
	movl	%ecx, %eax
LBB0_15:
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	testq	%rcx, %rcx
	je	LBB0_19
## %bb.16:
	movq	(%rcx), %rcx
	testq	%rcx, %rcx
	je	LBB0_19
## %bb.17:
	cmpl	$3000, (%rcx)                   ## imm = 0xBB8
	jl	LBB0_19
## %bb.18:
	movq	_TIM2_IPC@GOTPCREL(%rip), %rcx
	xorl	(%rcx), %eax
LBB0_19:
	shll	$16, %edi
	addl	$-65536, %edi                   ## imm = 0xFFFF0000
	orl	%eax, %edi
	movq	(%rbx), %rsi
	addq	16(%r15), %rsi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_writel
	movq	%r12, %rdi
	callq	_spin_unlock
	movq	_CLCD_TIM3@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	16(%r15), %rsi
	xorl	%edi, %edi
	callq	_writel
	movq	_CNTL_LCDEN@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	testb	%r14b, %r14b
	je	LBB0_21
## %bb.20:
	movq	_CNTL_LCDTFT@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	$1, %edi
	callq	_CNTL_LCDVCOMP
	orl	%eax, %ebx
	jmp	LBB0_22
LBB0_21:
	movq	_CNTL_LCDMONO8@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
LBB0_22:
	movq	-64(%rbp), %r12                 ## 8-byte Reload
	movq	(%r15), %rax
	movq	16(%rax), %rcx
	xorl	%r14d, %r14d
	testq	%rcx, %rcx
	je	LBB0_24
## %bb.23:
	movq	_CNTL_ST_CDWID_24@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r14d
LBB0_24:
	orl	%ebx, %r14d
	movq	(%r12), %rdx
	movl	(%rdx), %edx
	leal	-128(%rdx), %esi
	cmpl	$15, %esi
	ja	LBB0_39
## %bb.25:
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%rsi,4), %rsi
	addq	%rdx, %rsi
	jmpq	*%rsi
LBB0_26:
	movq	_CNTL_LCDBPP24@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	testq	%rcx, %rcx
	je	LBB0_33
LBB0_55:
	orl	%edx, %r14d
	jmp	LBB0_48
LBB0_28:
	movq	_CNTL_LCDBPP16_444@GOTPCREL(%rip), %rdx
	orl	(%rdx), %r14d
	testq	%rcx, %rcx
	je	LBB0_38
## %bb.29:
	movq	_CNTL_ST_1XBPP_444@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r14d
	jmp	LBB0_48
LBB0_30:
	movq	_CNTL_LCDBPP16@GOTPCREL(%rip), %rdx
	orl	(%rdx), %r14d
	testq	%rcx, %rcx
	je	LBB0_38
## %bb.31:
	movq	_CNTL_ST_1XBPP_5551@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r14d
	jmp	LBB0_48
LBB0_32:
	movq	_CNTL_LCDBPP24@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	testq	%rcx, %rcx
	je	LBB0_55
LBB0_33:
	movq	_CNTL_BGR@GOTPCREL(%rip), %rcx
	orl	%r14d, %edx
	orl	(%rcx), %edx
	movl	%edx, %r14d
	jmp	LBB0_48
LBB0_34:
	movq	_CNTL_LCDBPP16_444@GOTPCREL(%rip), %rdx
	orl	(%rdx), %r14d
	testq	%rcx, %rcx
	je	LBB0_48
## %bb.35:
	movq	_CNTL_ST_1XBPP_444@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_36:
	movq	_CNTL_LCDBPP16@GOTPCREL(%rip), %rdx
	orl	(%rdx), %r14d
	testq	%rcx, %rcx
	je	LBB0_48
## %bb.37:
	movq	_CNTL_ST_1XBPP_5551@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_38:
	movq	_CNTL_BGR@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r14d
	jmp	LBB0_48
LBB0_39:
	leaq	L_.str.1(%rip), %rsi
	movl	$1, %edi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_WARN_ONCE
	movq	(%r15), %rax
	jmp	LBB0_48
LBB0_40:
	testq	%rcx, %rcx
	je	LBB0_59
## %bb.41:
	movq	_CNTL_ST_LCDBPP24_PACKED@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r14d
	jmp	LBB0_48
LBB0_42:
	cmpl	$0, 24(%rax)
	je	LBB0_57
## %bb.43:
	movq	_CNTL_LCDBPP16@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_44:
	testq	%rcx, %rcx
	je	LBB0_59
## %bb.45:
	movq	_CNTL_ST_LCDBPP24_PACKED@GOTPCREL(%rip), %rcx
LBB0_46:
	movq	_CNTL_BGR@GOTPCREL(%rip), %rdx
LBB0_47:
	orl	(%rcx), %r14d
	orl	(%rdx), %r14d
LBB0_48:
	movq	_CNTL_BGR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	xorl	%ebx, %ebx
	cmpq	$1, 8(%rax)
	notl	%ecx
	sbbl	%ebx, %ebx
	orl	%ecx, %ebx
	andl	%r14d, %ebx
	movq	8(%r15), %rsi
	addq	16(%r15), %rsi
	movl	%ebx, %edi
	callq	_writel
	movl	$20, %edi
	callq	_msleep
	movq	24(%r15), %rax
	testq	%rax, %rax
	je	LBB0_50
## %bb.49:
	movq	(%r12), %rcx
	movl	(%rcx), %esi
	movq	-88(%rbp), %rdi                 ## 8-byte Reload
	callq	*%rax
LBB0_50:
	movq	_CNTL_LCDPWR@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	8(%r15), %rsi
	addq	16(%r15), %rsi
	movl	%ebx, %edi
	callq	_writel
	movq	(%r15), %rax
	cmpl	$0, (%rax)
	je	LBB0_52
## %bb.51:
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_52:
	movq	-80(%rbp), %rdi                 ## 8-byte Reload
	addq	$8, %rdi
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_drm_crtc_vblank_on             ## TAILCALL
LBB0_53:
	cmpl	$0, 24(%rax)
	je	LBB0_60
## %bb.54:
	movq	_CNTL_LCDBPP16@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r14d
	jmp	LBB0_48
LBB0_59:
	movl	%ebx, %r14d
	jmp	LBB0_48
LBB0_57:
	testq	%rcx, %rcx
	je	LBB0_62
## %bb.58:
	movq	_CNTL_LCDBPP16@GOTPCREL(%rip), %rcx
	movq	_CNTL_ST_1XBPP_565@GOTPCREL(%rip), %rdx
	jmp	LBB0_47
LBB0_60:
	testq	%rcx, %rcx
	je	LBB0_63
## %bb.61:
	movq	_CNTL_LCDBPP16@GOTPCREL(%rip), %rcx
	movq	_CNTL_ST_1XBPP_565@GOTPCREL(%rip), %rdx
	movq	_CNTL_BGR@GOTPCREL(%rip), %rsi
	orl	(%rcx), %r14d
	orl	(%rdx), %r14d
	orl	(%rsi), %r14d
	jmp	LBB0_48
LBB0_62:
	movq	_CNTL_LCDBPP16_565@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_63:
	movq	_CNTL_LCDBPP16_565@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r14d
	jmp	LBB0_48
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_26, LBB0_26-LJTI0_0
.set L0_0_set_28, LBB0_28-LJTI0_0
.set L0_0_set_30, LBB0_30-LJTI0_0
.set L0_0_set_32, LBB0_32-LJTI0_0
.set L0_0_set_34, LBB0_34-LJTI0_0
.set L0_0_set_36, LBB0_36-LJTI0_0
.set L0_0_set_40, LBB0_40-LJTI0_0
.set L0_0_set_42, LBB0_42-LJTI0_0
.set L0_0_set_44, LBB0_44-LJTI0_0
.set L0_0_set_53, LBB0_53-LJTI0_0
LJTI0_0:
	.long	L0_0_set_26
	.long	L0_0_set_28
	.long	L0_0_set_30
	.long	L0_0_set_32
	.long	L0_0_set_34
	.long	L0_0_set_36
	.long	L0_0_set_40
	.long	L0_0_set_42
	.long	L0_0_set_44
	.long	L0_0_set_53
	.long	L0_0_set_26
	.long	L0_0_set_28
	.long	L0_0_set_30
	.long	L0_0_set_32
	.long	L0_0_set_34
	.long	L0_0_set_36
	.end_data_region
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to set pixel clock rate to %d: %d\n"

	.comm	_CLCD_TIM0,8,3                  ## @CLCD_TIM0
	.comm	_CLCD_TIM1,8,3                  ## @CLCD_TIM1
	.comm	_CLCD_TIM2,8,3                  ## @CLCD_TIM2
	.comm	_TIM2_BCD,4,2                   ## @TIM2_BCD
	.comm	_TIM2_PCD_LO_MASK,4,2           ## @TIM2_PCD_LO_MASK
	.comm	_TIM2_PCD_HI_MASK,4,2           ## @TIM2_PCD_HI_MASK
	.comm	_DRM_MODE_FLAG_NHSYNC,4,2       ## @DRM_MODE_FLAG_NHSYNC
	.comm	_TIM2_IHS,4,2                   ## @TIM2_IHS
	.comm	_DRM_MODE_FLAG_NVSYNC,4,2       ## @DRM_MODE_FLAG_NVSYNC
	.comm	_TIM2_IVS,4,2                   ## @TIM2_IVS
	.comm	_DRM_BUS_FLAG_DE_LOW,4,2        ## @DRM_BUS_FLAG_DE_LOW
	.comm	_TIM2_IOE,4,2                   ## @TIM2_IOE
	.comm	_DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,4,2 ## @DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE
	.comm	_TIM2_IPC,4,2                   ## @TIM2_IPC
	.comm	_MEDIA_BUS_FMT_Y8_1X8,8,3       ## @MEDIA_BUS_FMT_Y8_1X8
	.comm	_TIM2_ACB_MASK,4,2              ## @TIM2_ACB_MASK
	.comm	_CLCD_TIM3,8,3                  ## @CLCD_TIM3
	.comm	_CNTL_LCDEN,4,2                 ## @CNTL_LCDEN
	.comm	_CNTL_LCDMONO8,4,2              ## @CNTL_LCDMONO8
	.comm	_CNTL_LCDTFT,4,2                ## @CNTL_LCDTFT
	.comm	_CNTL_ST_CDWID_24,4,2           ## @CNTL_ST_CDWID_24
	.comm	_CNTL_ST_LCDBPP24_PACKED,4,2    ## @CNTL_ST_LCDBPP24_PACKED
	.comm	_CNTL_BGR,4,2                   ## @CNTL_BGR
	.comm	_CNTL_LCDBPP24,4,2              ## @CNTL_LCDBPP24
	.comm	_CNTL_LCDBPP16,4,2              ## @CNTL_LCDBPP16
	.comm	_CNTL_ST_1XBPP_565,4,2          ## @CNTL_ST_1XBPP_565
	.comm	_CNTL_LCDBPP16_565,4,2          ## @CNTL_LCDBPP16_565
	.comm	_CNTL_ST_1XBPP_5551,4,2         ## @CNTL_ST_1XBPP_5551
	.comm	_CNTL_LCDBPP16_444,4,2          ## @CNTL_LCDBPP16_444
	.comm	_CNTL_ST_1XBPP_444,4,2          ## @CNTL_ST_1XBPP_444
L_.str.1:                               ## @.str.1
	.asciz	"Unknown FB format 0x%08x\n"

	.comm	_CNTL_LCDPWR,4,2                ## @CNTL_LCDPWR
	.no_dead_strip	_pl111_display_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pl111_display_enable
_pl111_display_enable:                  ; @pl111_display_enable
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x22, x1
	ldr	x8, [x0]
	ldr	x19, [x0, #8]!
	str	x0, [sp]                        ; 8-byte Folded Spill
	ldr	x23, [x19, #8]
	ldr	x20, [x8]
	ldp	x25, x27, [x23, #40]
	ldr	w0, [x23, #36]
	ldr	w8, [x1]
	mov	w21, #1000
	mul	w1, w8, w21
	bl	_clk_set_rate
	cbz	w0, LBB0_2
; %bb.1:
	mov	x3, x0
	ldr	w0, [x19]
	ldr	w8, [x22]
	mul	w2, w8, w21
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
LBB0_2:
	str	x19, [sp, #8]                   ; 8-byte Folded Spill
	ldr	w0, [x23, #36]
	bl	_clk_prepare_enable
	ldp	w26, w8, [x22, #4]
	add	w9, w26, #15
	cmp	w26, #0
	csel	w9, w9, w26, lt
	asr	w9, w9, #4
	ldp	w10, w11, [x22, #12]
	mvn	w12, w10
	add	w12, w8, w12
	mvn	w13, w26
	add	w10, w10, w13
	mvn	w8, w8
	add	w8, w11, w8
	ldp	w11, w13, [x22, #20]
	sub	w21, w11, #1
	ldp	w14, w15, [x22, #28]
	sub	w28, w14, w11
	mvn	w11, w14
	add	w24, w13, w11
	sub	w19, w15, w13
	lsl	w9, w9, #2
	sub	w9, w9, #4
	orr	w9, w9, w12, lsl #8
	orr	w9, w9, w10, lsl #16
	orr	w0, w9, w8, lsl #24
	ldr	x8, [x23, #16]
Lloh2:
	adrp	x9, _CLCD_TIM0@GOTPAGE
Lloh3:
	ldr	x9, [x9, _CLCD_TIM0@GOTPAGEOFF]
Lloh4:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	orr	w8, w21, w24, lsl #10
	orr	w8, w8, w28, lsl #16
	orr	w0, w8, w19, lsl #24
	ldr	x8, [x23, #16]
Lloh5:
	adrp	x9, _CLCD_TIM1@GOTPAGE
Lloh6:
	ldr	x9, [x9, _CLCD_TIM1@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	add	x21, x23, #32
	mov	x0, x21
	bl	_spin_lock
	ldr	x8, [x23, #16]
Lloh8:
	adrp	x28, _CLCD_TIM2@GOTPAGE
Lloh9:
	ldr	x28, [x28, _CLCD_TIM2@GOTPAGEOFF]
	ldr	x9, [x28]
	add	x0, x9, x8
	bl	_readl
Lloh10:
	adrp	x8, _TIM2_BCD@GOTPAGE
Lloh11:
	ldr	x8, [x8, _TIM2_BCD@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
Lloh13:
	adrp	x9, _TIM2_PCD_LO_MASK@GOTPAGE
Lloh14:
	ldr	x9, [x9, _TIM2_PCD_LO_MASK@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	orr	w9, w9, w8
Lloh16:
	adrp	x10, _TIM2_PCD_HI_MASK@GOTPAGE
Lloh17:
	ldr	x10, [x10, _TIM2_PCD_HI_MASK@GOTPAGEOFF]
Lloh18:
	ldr	w10, [x10]
	orr	w9, w9, w10
	and	w9, w9, w0
	ldr	x10, [x23]
	ldr	x10, [x10, #32]
	cmp	x10, #0
	csel	w8, wzr, w8, eq
	orr	w8, w8, w9
	ldr	w9, [x22, #36]
Lloh19:
	adrp	x10, _DRM_MODE_FLAG_NHSYNC@GOTPAGE
Lloh20:
	ldr	x10, [x10, _DRM_MODE_FLAG_NHSYNC@GOTPAGEOFF]
Lloh21:
	ldr	w10, [x10]
Lloh22:
	adrp	x11, _TIM2_IHS@GOTPAGE
Lloh23:
	ldr	x11, [x11, _TIM2_IHS@GOTPAGEOFF]
Lloh24:
	ldr	w11, [x11]
	tst	w10, w9
	csel	w10, wzr, w11, eq
	orr	w8, w8, w10
Lloh25:
	adrp	x10, _DRM_MODE_FLAG_NVSYNC@GOTPAGE
Lloh26:
	ldr	x10, [x10, _DRM_MODE_FLAG_NVSYNC@GOTPAGEOFF]
Lloh27:
	ldr	w10, [x10]
Lloh28:
	adrp	x11, _TIM2_IVS@GOTPAGE
Lloh29:
	ldr	x11, [x11, _TIM2_IVS@GOTPAGEOFF]
Lloh30:
	ldr	w11, [x11]
	tst	w10, w9
	csel	w9, wzr, w11, eq
	orr	w8, w8, w9
	cbz	x27, LBB0_6
; %bb.3:
Lloh31:
	adrp	x9, _DRM_BUS_FLAG_DE_LOW@GOTPAGE
Lloh32:
	ldr	x9, [x9, _DRM_BUS_FLAG_DE_LOW@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	ldp	w10, w11, [x27]
	tst	w9, w10
Lloh34:
	adrp	x9, _TIM2_IOE@GOTPAGE
Lloh35:
	ldr	x9, [x9, _TIM2_IOE@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	csel	w9, wzr, w9, eq
	orr	w8, w9, w8
Lloh37:
	adrp	x9, _DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE@GOTPAGE
Lloh38:
	ldr	x9, [x9, _DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE@GOTPAGEOFF]
Lloh39:
	ldr	w9, [x9]
	tst	w9, w10
Lloh40:
	adrp	x9, _TIM2_IPC@GOTPAGE
Lloh41:
	ldr	x9, [x9, _TIM2_IPC@GOTPAGEOFF]
Lloh42:
	ldr	w9, [x9]
	csel	w9, wzr, w9, eq
	orr	w8, w8, w9
	cmp	w11, #1
	b.ne	LBB0_6
; %bb.4:
	ldr	x9, [x27, #8]
	ldr	x9, [x9]
Lloh43:
	adrp	x10, _MEDIA_BUS_FMT_Y8_1X8@GOTPAGE
Lloh44:
	ldr	x10, [x10, _MEDIA_BUS_FMT_Y8_1X8@GOTPAGEOFF]
Lloh45:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_6
; %bb.5:
	mov	w22, #0
Lloh46:
	adrp	x9, _TIM2_ACB_MASK@GOTPAGE
Lloh47:
	ldr	x9, [x9, _TIM2_ACB_MASK@GOTPAGEOFF]
Lloh48:
	ldr	w9, [x9]
	orr	w8, w9, w8
	cbnz	x25, LBB0_7
	b	LBB0_10
LBB0_6:
	mov	w22, #1
	cbz	x25, LBB0_10
LBB0_7:
	ldr	x9, [x25]
	cbz	x9, LBB0_10
; %bb.8:
	ldr	w9, [x9]
	cmp	w9, #3000
	b.lt	LBB0_10
; %bb.9:
Lloh49:
	adrp	x9, _TIM2_IPC@GOTPAGE
Lloh50:
	ldr	x9, [x9, _TIM2_IPC@GOTPAGEOFF]
Lloh51:
	ldr	w9, [x9]
	eor	w8, w9, w8
LBB0_10:
	lsl	w9, w26, #16
	sub	w9, w9, #16, lsl #12            ; =65536
	orr	w0, w8, w9
	ldr	x8, [x23, #16]
	ldr	x9, [x28]
	add	x1, x9, x8
	bl	_writel
	mov	x0, x21
	bl	_spin_unlock
	ldr	x8, [x23, #16]
Lloh52:
	adrp	x9, _CLCD_TIM3@GOTPAGE
Lloh53:
	ldr	x9, [x9, _CLCD_TIM3@GOTPAGEOFF]
Lloh54:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	w0, #0
	bl	_writel
Lloh55:
	adrp	x8, _CNTL_LCDEN@GOTPAGE
Lloh56:
	ldr	x8, [x8, _CNTL_LCDEN@GOTPAGEOFF]
Lloh57:
	ldr	w8, [x8]
	tbz	w22, #0, LBB0_12
; %bb.11:
Lloh58:
	adrp	x9, _CNTL_LCDTFT@GOTPAGE
Lloh59:
	ldr	x9, [x9, _CNTL_LCDTFT@GOTPAGEOFF]
Lloh60:
	ldr	w9, [x9]
	orr	w19, w9, w8
	mov	w0, #1
	bl	_CNTL_LCDVCOMP
	orr	w9, w19, w0
	b	LBB0_13
LBB0_12:
Lloh61:
	adrp	x9, _CNTL_LCDMONO8@GOTPAGE
Lloh62:
	ldr	x9, [x9, _CNTL_LCDMONO8@GOTPAGEOFF]
Lloh63:
	ldr	w9, [x9]
	orr	w9, w9, w8
LBB0_13:
	ldr	x8, [x23]
	ldr	x10, [x8, #16]
Lloh64:
	adrp	x11, _CNTL_ST_CDWID_24@GOTPAGE
Lloh65:
	ldr	x11, [x11, _CNTL_ST_CDWID_24@GOTPAGEOFF]
Lloh66:
	ldr	w11, [x11]
	cmp	x10, #0
	csel	w11, wzr, w11, eq
	orr	w22, w11, w9
	ldr	x11, [x20]
	ldr	w2, [x11]
	sub	w11, w2, #128
Lloh67:
	adrp	x21, _CNTL_BGR@GOTPAGE
Lloh68:
	ldr	x21, [x21, _CNTL_BGR@GOTPAGEOFF]
	cmp	w11, #15
	b.hi	LBB0_28
; %bb.14:
Lloh69:
	adrp	x12, lJTI0_0@PAGE
Lloh70:
	add	x12, x12, lJTI0_0@PAGEOFF
	adr	x13, LBB0_15
	ldrb	w14, [x12, x11]
	add	x13, x13, x14, lsl #2
	br	x13
LBB0_15:
Lloh71:
	adrp	x9, _CNTL_LCDBPP24@GOTPAGE
Lloh72:
	ldr	x9, [x9, _CNTL_LCDBPP24@GOTPAGEOFF]
Lloh73:
	ldr	w9, [x9]
	cbnz	x10, LBB0_41
	b	LBB0_36
LBB0_16:
Lloh74:
	adrp	x9, _CNTL_LCDBPP16_444@GOTPAGE
Lloh75:
	ldr	x9, [x9, _CNTL_LCDBPP16_444@GOTPAGEOFF]
Lloh76:
	ldr	w9, [x9]
	orr	w9, w9, w22
	cbz	x10, LBB0_27
; %bb.17:
Lloh77:
	adrp	x10, _CNTL_ST_1XBPP_444@GOTPAGE
Lloh78:
	ldr	x10, [x10, _CNTL_ST_1XBPP_444@GOTPAGEOFF]
	b	LBB0_20
LBB0_18:
Lloh79:
	adrp	x9, _CNTL_LCDBPP16@GOTPAGE
Lloh80:
	ldr	x9, [x9, _CNTL_LCDBPP16@GOTPAGEOFF]
Lloh81:
	ldr	w9, [x9]
	orr	w9, w9, w22
	cbz	x10, LBB0_27
; %bb.19:
Lloh82:
	adrp	x10, _CNTL_ST_1XBPP_5551@GOTPAGE
Lloh83:
	ldr	x10, [x10, _CNTL_ST_1XBPP_5551@GOTPAGEOFF]
LBB0_20:
	ldr	w10, [x10]
	orr	w9, w10, w9
	b	LBB0_42
LBB0_21:
Lloh84:
	adrp	x9, _CNTL_LCDBPP24@GOTPAGE
Lloh85:
	ldr	x9, [x9, _CNTL_LCDBPP24@GOTPAGEOFF]
Lloh86:
	ldr	w9, [x9]
	cbnz	x10, LBB0_36
	b	LBB0_41
LBB0_22:
Lloh87:
	adrp	x9, _CNTL_LCDBPP16_444@GOTPAGE
Lloh88:
	ldr	x9, [x9, _CNTL_LCDBPP16_444@GOTPAGEOFF]
Lloh89:
	ldr	w9, [x9]
	orr	w9, w9, w22
	cbz	x10, LBB0_42
; %bb.23:
Lloh90:
	adrp	x10, _CNTL_ST_1XBPP_444@GOTPAGE
Lloh91:
	ldr	x10, [x10, _CNTL_ST_1XBPP_444@GOTPAGEOFF]
	b	LBB0_26
LBB0_24:
Lloh92:
	adrp	x9, _CNTL_LCDBPP16@GOTPAGE
Lloh93:
	ldr	x9, [x9, _CNTL_LCDBPP16@GOTPAGEOFF]
Lloh94:
	ldr	w9, [x9]
	orr	w9, w9, w22
	cbz	x10, LBB0_42
; %bb.25:
Lloh95:
	adrp	x10, _CNTL_ST_1XBPP_5551@GOTPAGE
Lloh96:
	ldr	x10, [x10, _CNTL_ST_1XBPP_5551@GOTPAGEOFF]
LBB0_26:
	ldr	w10, [x10]
	ldr	w11, [x21]
	orr	w9, w10, w9
	orr	w9, w9, w11
	b	LBB0_42
LBB0_27:
	ldr	w10, [x21]
	orr	w9, w10, w9
	b	LBB0_42
LBB0_28:
Lloh97:
	adrp	x1, l_.str.1@PAGE
Lloh98:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	w0, #1
	bl	_WARN_ONCE
	ldr	x8, [x23]
	mov	x9, x22
	b	LBB0_42
LBB0_29:
	cbz	x10, LBB0_42
; %bb.30:
Lloh99:
	adrp	x9, _CNTL_ST_LCDBPP24_PACKED@GOTPAGE
Lloh100:
	ldr	x9, [x9, _CNTL_ST_LCDBPP24_PACKED@GOTPAGEOFF]
	b	LBB0_40
LBB0_31:
	ldr	w9, [x8, #24]
	cbz	w9, LBB0_47
; %bb.32:
Lloh101:
	adrp	x9, _CNTL_LCDBPP16@GOTPAGE
Lloh102:
	ldr	x9, [x9, _CNTL_LCDBPP16@GOTPAGEOFF]
	b	LBB0_35
LBB0_33:
	cbz	x10, LBB0_42
; %bb.34:
Lloh103:
	adrp	x9, _CNTL_ST_LCDBPP24_PACKED@GOTPAGE
Lloh104:
	ldr	x9, [x9, _CNTL_ST_LCDBPP24_PACKED@GOTPAGEOFF]
LBB0_35:
	ldr	w9, [x9]
LBB0_36:
	ldr	w10, [x21]
LBB0_37:
	orr	w9, w9, w22
	orr	w9, w9, w10
	b	LBB0_42
LBB0_38:
	ldr	w9, [x8, #24]
	cbz	w9, LBB0_49
; %bb.39:
Lloh105:
	adrp	x9, _CNTL_LCDBPP16@GOTPAGE
Lloh106:
	ldr	x9, [x9, _CNTL_LCDBPP16@GOTPAGEOFF]
LBB0_40:
	ldr	w9, [x9]
LBB0_41:
	orr	w9, w9, w22
LBB0_42:
	ldr	x8, [x8, #8]
	ldr	w10, [x21]
	cmp	x8, #0
	mov	w8, #-1
	csinv	w8, w8, w10, eq
	and	w21, w8, w9
	ldp	x9, x8, [x23, #8]
	add	x1, x9, x8
	mov	x0, x21
	bl	_writel
	mov	w0, #20
	bl	_msleep
	ldr	x8, [x23, #24]
	cbz	x8, LBB0_44
; %bb.43:
	ldr	x9, [x20]
	ldr	w1, [x9]
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
	blr	x8
LBB0_44:
Lloh107:
	adrp	x8, _CNTL_LCDPWR@GOTPAGE
Lloh108:
	ldr	x8, [x8, _CNTL_LCDPWR@GOTPAGEOFF]
Lloh109:
	ldr	w8, [x8]
	orr	w0, w8, w21
	ldp	x9, x8, [x23, #8]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x23]
	ldr	w8, [x8]
	cbz	w8, LBB0_46
; %bb.45:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_46:
	ldr	x0, [sp]                        ; 8-byte Folded Reload
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_drm_crtc_vblank_on
LBB0_47:
	cbz	x10, LBB0_51
; %bb.48:
Lloh110:
	adrp	x9, _CNTL_LCDBPP16@GOTPAGE
Lloh111:
	ldr	x9, [x9, _CNTL_LCDBPP16@GOTPAGEOFF]
Lloh112:
	ldr	w9, [x9]
Lloh113:
	adrp	x10, _CNTL_ST_1XBPP_565@GOTPAGE
Lloh114:
	ldr	x10, [x10, _CNTL_ST_1XBPP_565@GOTPAGEOFF]
Lloh115:
	ldr	w10, [x10]
	b	LBB0_37
LBB0_49:
	cbz	x10, LBB0_52
; %bb.50:
Lloh116:
	adrp	x9, _CNTL_LCDBPP16@GOTPAGE
Lloh117:
	ldr	x9, [x9, _CNTL_LCDBPP16@GOTPAGEOFF]
Lloh118:
	adrp	x10, _CNTL_ST_1XBPP_565@GOTPAGE
Lloh119:
	ldr	x10, [x10, _CNTL_ST_1XBPP_565@GOTPAGEOFF]
Lloh120:
	ldr	w9, [x9]
Lloh121:
	ldr	w10, [x10]
	ldr	w11, [x21]
	orr	w9, w9, w22
	orr	w9, w9, w10
	orr	w9, w9, w11
	b	LBB0_42
LBB0_51:
Lloh122:
	adrp	x9, _CNTL_LCDBPP16_565@GOTPAGE
Lloh123:
	ldr	x9, [x9, _CNTL_LCDBPP16_565@GOTPAGEOFF]
	b	LBB0_35
LBB0_52:
Lloh124:
	adrp	x9, _CNTL_LCDBPP16_565@GOTPAGE
Lloh125:
	ldr	x9, [x9, _CNTL_LCDBPP16_565@GOTPAGEOFF]
	b	LBB0_40
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpAdd	Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGot	Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGot	Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGot	Lloh95, Lloh96
	.loh AdrpAdd	Lloh97, Lloh98
	.loh AdrpLdrGot	Lloh99, Lloh100
	.loh AdrpLdrGot	Lloh101, Lloh102
	.loh AdrpLdrGot	Lloh103, Lloh104
	.loh AdrpLdrGot	Lloh105, Lloh106
	.loh AdrpLdrGotLdr	Lloh107, Lloh108, Lloh109
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh110, Lloh111, Lloh112
	.loh AdrpLdrGotLdr	Lloh118, Lloh119, Lloh121
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh120
	.loh AdrpLdrGot	Lloh122, Lloh123
	.loh AdrpLdrGot	Lloh124, Lloh125
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_15-LBB0_15)>>2
	.byte	(LBB0_16-LBB0_15)>>2
	.byte	(LBB0_18-LBB0_15)>>2
	.byte	(LBB0_21-LBB0_15)>>2
	.byte	(LBB0_22-LBB0_15)>>2
	.byte	(LBB0_24-LBB0_15)>>2
	.byte	(LBB0_29-LBB0_15)>>2
	.byte	(LBB0_31-LBB0_15)>>2
	.byte	(LBB0_33-LBB0_15)>>2
	.byte	(LBB0_38-LBB0_15)>>2
	.byte	(LBB0_15-LBB0_15)>>2
	.byte	(LBB0_16-LBB0_15)>>2
	.byte	(LBB0_18-LBB0_15)>>2
	.byte	(LBB0_21-LBB0_15)>>2
	.byte	(LBB0_22-LBB0_15)>>2
	.byte	(LBB0_24-LBB0_15)>>2
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to set pixel clock rate to %d: %d\n"

	.comm	_CLCD_TIM0,8,3                  ; @CLCD_TIM0
	.comm	_CLCD_TIM1,8,3                  ; @CLCD_TIM1
	.comm	_CLCD_TIM2,8,3                  ; @CLCD_TIM2
	.comm	_TIM2_BCD,4,2                   ; @TIM2_BCD
	.comm	_TIM2_PCD_LO_MASK,4,2           ; @TIM2_PCD_LO_MASK
	.comm	_TIM2_PCD_HI_MASK,4,2           ; @TIM2_PCD_HI_MASK
	.comm	_DRM_MODE_FLAG_NHSYNC,4,2       ; @DRM_MODE_FLAG_NHSYNC
	.comm	_TIM2_IHS,4,2                   ; @TIM2_IHS
	.comm	_DRM_MODE_FLAG_NVSYNC,4,2       ; @DRM_MODE_FLAG_NVSYNC
	.comm	_TIM2_IVS,4,2                   ; @TIM2_IVS
	.comm	_DRM_BUS_FLAG_DE_LOW,4,2        ; @DRM_BUS_FLAG_DE_LOW
	.comm	_TIM2_IOE,4,2                   ; @TIM2_IOE
	.comm	_DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,4,2 ; @DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE
	.comm	_TIM2_IPC,4,2                   ; @TIM2_IPC
	.comm	_MEDIA_BUS_FMT_Y8_1X8,8,3       ; @MEDIA_BUS_FMT_Y8_1X8
	.comm	_TIM2_ACB_MASK,4,2              ; @TIM2_ACB_MASK
	.comm	_CLCD_TIM3,8,3                  ; @CLCD_TIM3
	.comm	_CNTL_LCDEN,4,2                 ; @CNTL_LCDEN
	.comm	_CNTL_LCDMONO8,4,2              ; @CNTL_LCDMONO8
	.comm	_CNTL_LCDTFT,4,2                ; @CNTL_LCDTFT
	.comm	_CNTL_ST_CDWID_24,4,2           ; @CNTL_ST_CDWID_24
	.comm	_CNTL_ST_LCDBPP24_PACKED,4,2    ; @CNTL_ST_LCDBPP24_PACKED
	.comm	_CNTL_BGR,4,2                   ; @CNTL_BGR
	.comm	_CNTL_LCDBPP24,4,2              ; @CNTL_LCDBPP24
	.comm	_CNTL_LCDBPP16,4,2              ; @CNTL_LCDBPP16
	.comm	_CNTL_ST_1XBPP_565,4,2          ; @CNTL_ST_1XBPP_565
	.comm	_CNTL_LCDBPP16_565,4,2          ; @CNTL_LCDBPP16_565
	.comm	_CNTL_ST_1XBPP_5551,4,2         ; @CNTL_ST_1XBPP_5551
	.comm	_CNTL_LCDBPP16_444,4,2          ; @CNTL_LCDBPP16_444
	.comm	_CNTL_ST_1XBPP_444,4,2          ; @CNTL_ST_1XBPP_444
l_.str.1:                               ; @.str.1
	.asciz	"Unknown FB format 0x%08x\n"

	.comm	_CNTL_LCDPWR,4,2                ; @CNTL_LCDPWR
	.no_dead_strip	_pl111_display_enable
.subsections_via_symbols
