	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gmc_v8_0_tonga_mc_load_microcode
_gmc_v8_0_tonga_mc_load_microcode:      ## @gmc_v8_0_tonga_mc_load_microcode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_amdgpu_sriov_bios
	xorl	%ecx, %ecx
	testq	%rax, %rax
	jne	LBB0_20
## %bb.1:
	movq	16(%rbx), %rax
	testq	%rax, %rax
	je	LBB0_2
## %bb.3:
	movq	(%rax), %r14
	movq	%r14, %rdi
	callq	_amdgpu_ucode_print_mc_hdr
	movl	8(%r14), %edi
	callq	_le32_to_cpu
	movl	%eax, 8(%rbx)
	movl	16(%r14), %edi
	movq	%r14, %r15
	callq	_le32_to_cpu
                                        ## kill: def $eax killed $eax def $rax
	leal	7(%rax), %r14d
	testl	%eax, %eax
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	cmovnsl	%eax, %r14d
	movq	16(%rbx), %rax
	movq	%rbx, %r12
	movq	(%rax), %r13
	movq	%r15, -48(%rbp)                 ## 8-byte Spill
	movl	12(%r15), %edi
	callq	_le32_to_cpu
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	4(%r15), %edi
	callq	_le32_to_cpu
	movl	%eax, %ebx
	leal	3(%rbx), %r15d
	testl	%eax, %eax
	cmovnsl	%eax, %r15d
	movq	%r12, -80(%rbp)                 ## 8-byte Spill
	movq	16(%r12), %rax
	movq	(%rax), %r12
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edi
	callq	_le32_to_cpu
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_mmMC_SEQ_SUP_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	_MC_SEQ_SUP_CNTL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_RUN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	%eax, %edi
	callq	_REG_GET_FIELD
	testq	%rax, %rax
	je	LBB0_4
LBB0_19:
	xorl	%ecx, %ecx
	jmp	LBB0_20
LBB0_2:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ecx, %ecx
	subl	(%rax), %ecx
LBB0_20:
	movl	%ecx, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	%rbx, -64(%rbp)                 ## 8-byte Spill
	movq	_mmMC_SEQ_SUP_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movl	$8, %esi
	callq	_WREG32
	movl	(%rbx), %edi
	movl	$16, %esi
	callq	_WREG32
	cmpl	$8, -72(%rbp)                   ## 4-byte Folded Reload
	jl	LBB0_7
## %bb.5:
	sarl	$3, %r14d
	addl	-52(%rbp), %r13d                ## 4-byte Folded Reload
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	_mmMC_SEQ_IO_DEBUG_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%r13d, %edi
	callq	_le32_to_cpup
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmMC_SEQ_IO_DEBUG_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	leal	4(%r13), %edi
	callq	_le32_to_cpup
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	addl	$8, %r13d
	decl	%r14d
	jne	LBB0_6
LBB0_7:
	cmpl	$4, -64(%rbp)                   ## 4-byte Folded Reload
	jl	LBB0_10
## %bb.8:
	movslq	-48(%rbp), %rax                 ## 4-byte Folded Reload
	addq	%rax, %r12
	sarl	$2, %r15d
	movq	_mmMC_SEQ_SUP_PGM@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %ebx
	movl	%r12d, %edi
	callq	_le32_to_cpup
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	addl	$4, %r12d
	decl	%r15d
	jne	LBB0_9
LBB0_10:
	movq	_mmMC_SEQ_SUP_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movl	$8, %esi
	callq	_WREG32
	movl	(%rbx), %edi
	movl	$4, %esi
	callq	_WREG32
	movl	(%rbx), %edi
	movl	$1, %esi
	callq	_WREG32
	movq	-80(%rbp), %r13                 ## 8-byte Reload
	cmpl	$0, (%r13)
	movl	$0, %ecx
	jle	LBB0_20
## %bb.11:
	xorl	%ebx, %ebx
	movq	_mmMC_SEQ_TRAIN_WAKEUP_CNTL@GOTPCREL(%rip), %r14
	movq	_MC_SEQ_TRAIN_WAKEUP_CNTL@GOTPCREL(%rip), %r15
	movq	_TRAIN_DONE_D0@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %edi
	callq	_RREG32
	movl	(%r15), %esi
	movl	(%r12), %edx
	movl	%eax, %edi
	callq	_REG_GET_FIELD
	testq	%rax, %rax
	jne	LBB0_13
## %bb.14:                              ##   in Loop: Header=BB0_12 Depth=1
	movl	$1, %edi
	callq	_udelay
	incl	%ebx
	movl	(%r13), %eax
	cmpl	%eax, %ebx
	jl	LBB0_12
	jmp	LBB0_15
LBB0_13:
	movl	(%r13), %eax
LBB0_15:
	testl	%eax, %eax
	jle	LBB0_19
## %bb.16:
	movq	_TRAIN_DONE_D1@GOTPCREL(%rip), %r12
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_17:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %edi
	callq	_RREG32
	movl	(%r15), %esi
	movl	(%r12), %edx
	movl	%eax, %edi
	callq	_REG_GET_FIELD
	testq	%rax, %rax
	jne	LBB0_19
## %bb.18:                              ##   in Loop: Header=BB0_17 Depth=1
	movl	$1, %edi
	callq	_udelay
	incl	%ebx
	cmpl	(%r13), %ebx
	jl	LBB0_17
	jmp	LBB0_19
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_mmMC_SEQ_SUP_CNTL,4,2          ## @mmMC_SEQ_SUP_CNTL
	.comm	_MC_SEQ_SUP_CNTL,4,2            ## @MC_SEQ_SUP_CNTL
	.comm	_RUN,4,2                        ## @RUN
	.comm	_mmMC_SEQ_IO_DEBUG_INDEX,4,2    ## @mmMC_SEQ_IO_DEBUG_INDEX
	.comm	_mmMC_SEQ_IO_DEBUG_DATA,4,2     ## @mmMC_SEQ_IO_DEBUG_DATA
	.comm	_mmMC_SEQ_SUP_PGM,4,2           ## @mmMC_SEQ_SUP_PGM
	.comm	_mmMC_SEQ_TRAIN_WAKEUP_CNTL,4,2 ## @mmMC_SEQ_TRAIN_WAKEUP_CNTL
	.comm	_MC_SEQ_TRAIN_WAKEUP_CNTL,4,2   ## @MC_SEQ_TRAIN_WAKEUP_CNTL
	.comm	_TRAIN_DONE_D0,4,2              ## @TRAIN_DONE_D0
	.comm	_TRAIN_DONE_D1,4,2              ## @TRAIN_DONE_D1
	.no_dead_strip	_gmc_v8_0_tonga_mc_load_microcode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gmc_v8_0_tonga_mc_load_microcode
_gmc_v8_0_tonga_mc_load_microcode:      ; @gmc_v8_0_tonga_mc_load_microcode
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	bl	_amdgpu_sriov_bios
	cbz	x0, LBB0_3
LBB0_1:
	mov	w0, #0
LBB0_2:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_3:
	ldr	x8, [x19, #16]
	cbz	x8, LBB0_16
; %bb.4:
	ldr	x21, [x8]
	mov	x0, x21
	bl	_amdgpu_ucode_print_mc_hdr
	ldr	w0, [x21, #8]
	bl	_le32_to_cpu
	str	w0, [x19, #8]
	ldr	w0, [x21, #16]
	bl	_le32_to_cpu
	mov	x22, x0
	add	w8, w0, #7
	cmp	w0, #0
	csel	w28, w8, w0, lt
	ldr	x8, [x19, #16]
	ldr	x27, [x8]
	ldr	w0, [x21, #12]
	bl	_le32_to_cpu
	mov	x23, x0
	ldr	w0, [x21, #4]
	bl	_le32_to_cpu
	mov	x20, x0
	add	w8, w0, #3
	cmp	w0, #0
	csel	w26, w8, w0, lt
	ldr	x8, [x19, #16]
	ldr	x25, [x8]
	ldr	w0, [x21]
	bl	_le32_to_cpu
	mov	x21, x0
Lloh0:
	adrp	x24, _mmMC_SEQ_SUP_CNTL@GOTPAGE
Lloh1:
	ldr	x24, [x24, _mmMC_SEQ_SUP_CNTL@GOTPAGEOFF]
	ldr	w0, [x24]
	bl	_RREG32
Lloh2:
	adrp	x8, _MC_SEQ_SUP_CNTL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MC_SEQ_SUP_CNTL@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
Lloh5:
	adrp	x8, _RUN@GOTPAGE
Lloh6:
	ldr	x8, [x8, _RUN@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	bl	_REG_GET_FIELD
	cbnz	x0, LBB0_1
; %bb.5:
	str	x25, [sp, #8]                   ; 8-byte Folded Spill
	ldr	w0, [x24]
	mov	w1, #8
	bl	_WREG32
	ldr	w0, [x24]
	mov	w1, #16
	bl	_WREG32
	cmp	w22, #8
	b.lt	LBB0_8
; %bb.6:
	asr	w28, w28, #3
	add	w22, w27, w23
Lloh8:
	adrp	x27, _mmMC_SEQ_IO_DEBUG_INDEX@GOTPAGE
Lloh9:
	ldr	x27, [x27, _mmMC_SEQ_IO_DEBUG_INDEX@GOTPAGEOFF]
Lloh10:
	adrp	x25, _mmMC_SEQ_IO_DEBUG_DATA@GOTPAGE
Lloh11:
	ldr	x25, [x25, _mmMC_SEQ_IO_DEBUG_DATA@GOTPAGEOFF]
LBB0_7:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w23, [x27]
	mov	x0, x22
	bl	_le32_to_cpup
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
	ldr	w23, [x25]
	add	w0, w22, #4
	bl	_le32_to_cpup
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
	add	w22, w22, #8
	subs	w28, w28, #1
	b.ne	LBB0_7
LBB0_8:
	cmp	w20, #4
	b.lt	LBB0_11
; %bb.9:
	asr	w22, w26, #2
Lloh12:
	adrp	x23, _mmMC_SEQ_SUP_PGM@GOTPAGE
Lloh13:
	ldr	x23, [x23, _mmMC_SEQ_SUP_PGM@GOTPAGEOFF]
	ldr	x8, [sp, #8]                    ; 8-byte Folded Reload
	add	x20, x8, w21, sxtw
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	ldr	w21, [x23]
	mov	x0, x20
	bl	_le32_to_cpup
	mov	x1, x0
	mov	x0, x21
	bl	_WREG32
	add	w20, w20, #4
	subs	w22, w22, #1
	b.ne	LBB0_10
LBB0_11:
	ldr	w0, [x24]
	mov	w1, #8
	bl	_WREG32
	ldr	w0, [x24]
	mov	w1, #4
	bl	_WREG32
	ldr	w0, [x24]
	mov	w1, #1
	bl	_WREG32
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_1
; %bb.12:
	mov	w22, #0
Lloh14:
	adrp	x20, _mmMC_SEQ_TRAIN_WAKEUP_CNTL@GOTPAGE
Lloh15:
	ldr	x20, [x20, _mmMC_SEQ_TRAIN_WAKEUP_CNTL@GOTPAGEOFF]
Lloh16:
	adrp	x21, _MC_SEQ_TRAIN_WAKEUP_CNTL@GOTPAGE
Lloh17:
	ldr	x21, [x21, _MC_SEQ_TRAIN_WAKEUP_CNTL@GOTPAGEOFF]
Lloh18:
	adrp	x23, _TRAIN_DONE_D0@GOTPAGE
Lloh19:
	ldr	x23, [x23, _TRAIN_DONE_D0@GOTPAGEOFF]
LBB0_13:                                ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x20]
	bl	_RREG32
	ldr	w1, [x21]
	ldr	w2, [x23]
	bl	_REG_GET_FIELD
	cbnz	x0, LBB0_17
; %bb.14:                               ;   in Loop: Header=BB0_13 Depth=1
	mov	w0, #1
	bl	_udelay
	add	w22, w22, #1
	ldr	w8, [x19]
	cmp	w22, w8
	b.lt	LBB0_13
; %bb.15:
	cmp	w8, #1
	b.ge	LBB0_18
	b	LBB0_1
LBB0_16:
Lloh20:
	adrp	x8, _EINVAL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_2
LBB0_17:
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_1
LBB0_18:
	mov	w22, #0
Lloh23:
	adrp	x23, _TRAIN_DONE_D1@GOTPAGE
Lloh24:
	ldr	x23, [x23, _TRAIN_DONE_D1@GOTPAGEOFF]
LBB0_19:                                ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x20]
	bl	_RREG32
	ldr	w1, [x21]
	ldr	w2, [x23]
	bl	_REG_GET_FIELD
	cbnz	x0, LBB0_1
; %bb.20:                               ;   in Loop: Header=BB0_19 Depth=1
	mov	w0, #1
	bl	_udelay
	mov	w0, #0
	add	w22, w22, #1
	ldr	w8, [x19]
	cmp	w22, w8
	b.lt	LBB0_19
	b	LBB0_2
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_mmMC_SEQ_SUP_CNTL,4,2          ; @mmMC_SEQ_SUP_CNTL
	.comm	_MC_SEQ_SUP_CNTL,4,2            ; @MC_SEQ_SUP_CNTL
	.comm	_RUN,4,2                        ; @RUN
	.comm	_mmMC_SEQ_IO_DEBUG_INDEX,4,2    ; @mmMC_SEQ_IO_DEBUG_INDEX
	.comm	_mmMC_SEQ_IO_DEBUG_DATA,4,2     ; @mmMC_SEQ_IO_DEBUG_DATA
	.comm	_mmMC_SEQ_SUP_PGM,4,2           ; @mmMC_SEQ_SUP_PGM
	.comm	_mmMC_SEQ_TRAIN_WAKEUP_CNTL,4,2 ; @mmMC_SEQ_TRAIN_WAKEUP_CNTL
	.comm	_MC_SEQ_TRAIN_WAKEUP_CNTL,4,2   ; @MC_SEQ_TRAIN_WAKEUP_CNTL
	.comm	_TRAIN_DONE_D0,4,2              ; @TRAIN_DONE_D0
	.comm	_TRAIN_DONE_D1,4,2              ; @TRAIN_DONE_D1
	.no_dead_strip	_gmc_v8_0_tonga_mc_load_microcode
.subsections_via_symbols
