	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_kgd_gfx_v9_invalidate_tlbs     ## -- Begin function kgd_gfx_v9_invalidate_tlbs
	.p2align	4, 0x90
_kgd_gfx_v9_invalidate_tlbs:            ## @kgd_gfx_v9_invalidate_tlbs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpq	$0, 24(%rdi)
	je	LBB0_2
## %bb.1:
	movq	_EIO@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
LBB0_15:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movl	%esi, %r15d
	movq	%rdi, %r12
	cmpq	$0, 16(%rdi)
	je	LBB0_3
## %bb.4:
	movq	(%r12), %rax
	movq	_CHIP_VEGA20@GOTPCREL(%rip), %rcx
	xorl	%r14d, %r14d
	cmpq	(%rcx), %rax
	sete	%r14b
	addl	%r14d, %r14d
	cmpq	$0, 32(%r12)
	je	LBB0_6
LBB0_16:
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%r14d, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_invalidate_tlbs_with_kiq       ## TAILCALL
LBB0_3:
	xorl	%r14d, %r14d
	cmpq	$0, 32(%r12)
	jne	LBB0_16
LBB0_6:
	xorl	%ebx, %ebx
	jmp	LBB0_7
	.p2align	4, 0x90
LBB0_13:                                ##   in Loop: Header=BB0_7 Depth=1
	incl	%ebx
	cmpl	$16, %ebx
	je	LBB0_14
LBB0_7:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_amdgpu_amdkfd_is_kfd_vmid
	testl	%eax, %eax
	je	LBB0_13
## %bb.8:                               ##   in Loop: Header=BB0_7 Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_kgd_gfx_v9_get_atc_vmid_pasid_mapping_valid
	testq	%rax, %rax
	je	LBB0_13
## %bb.9:                               ##   in Loop: Header=BB0_7 Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_kgd_gfx_v9_get_atc_vmid_pasid_mapping_pasid
	cmpl	%r15d, %eax
	jne	LBB0_13
## %bb.10:
	cmpl	$0, 8(%r12)
	jle	LBB0_14
## %bb.11:
	xorl	%r15d, %r15d
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	%ebx, %esi
	movl	%r13d, %edx
	movl	%r14d, %ecx
	callq	_amdgpu_gmc_flush_gpu_tlb
	incl	%r13d
	cmpl	8(%r12), %r13d
	jl	LBB0_12
	jmp	LBB0_15
LBB0_14:
	xorl	%r15d, %r15d
	jmp	LBB0_15
	.cfi_endproc
                                        ## -- End function
	.comm	_EIO,4,2                        ## @EIO
	.comm	_CHIP_VEGA20,8,3                ## @CHIP_VEGA20
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_kgd_gfx_v9_invalidate_tlbs     ; -- Begin function kgd_gfx_v9_invalidate_tlbs
	.p2align	2
_kgd_gfx_v9_invalidate_tlbs:            ; @kgd_gfx_v9_invalidate_tlbs
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x8, [x0, #24]
	cbz	x8, LBB0_3
; %bb.1:
Lloh0:
	adrp	x8, _EIO@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_3:
	mov	x21, x1
	mov	x19, x0
	ldr	x8, [x0, #16]
	cbz	x8, LBB0_6
; %bb.4:
	ldr	x8, [x19]
Lloh3:
	adrp	x9, _CHIP_VEGA20@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CHIP_VEGA20@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	cmp	x8, x9
	cset	w8, eq
	lsl	w20, w8, #1
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_7
LBB0_5:
	mov	x0, x19
	mov	x1, x21
	mov	x2, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_invalidate_tlbs_with_kiq
LBB0_6:
	mov	w20, #0
	ldr	x8, [x19, #32]
	cbnz	x8, LBB0_5
LBB0_7:
	mov	w22, #0
	b	LBB0_9
LBB0_8:                                 ;   in Loop: Header=BB0_9 Depth=1
	add	w22, w22, #1
	cmp	w22, #16
	b.eq	LBB0_15
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x22
	bl	_amdgpu_amdkfd_is_kfd_vmid
	cbz	w0, LBB0_8
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	mov	x0, x19
	mov	x1, x22
	bl	_kgd_gfx_v9_get_atc_vmid_pasid_mapping_valid
	cbz	x0, LBB0_8
; %bb.11:                               ;   in Loop: Header=BB0_9 Depth=1
	mov	x0, x19
	mov	x1, x22
	bl	_kgd_gfx_v9_get_atc_vmid_pasid_mapping_pasid
	cmp	w0, w21
	b.ne	LBB0_8
; %bb.12:
	ldr	w8, [x19, #8]
	cmp	w8, #1
	b.lt	LBB0_15
; %bb.13:
	mov	w21, #0
LBB0_14:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x22
	mov	x2, x21
	mov	x3, x20
	bl	_amdgpu_gmc_flush_gpu_tlb
	add	w21, w21, #1
	ldr	w8, [x19, #8]
	cmp	w21, w8
	b.lt	LBB0_14
LBB0_15:
	mov	w0, #0
	b	LBB0_2
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_EIO,4,2                        ; @EIO
	.comm	_CHIP_VEGA20,8,3                ; @CHIP_VEGA20
.subsections_via_symbols
