	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hsw_ddi_spll_disable
_hsw_ddi_spll_disable:                  ## @hsw_ddi_spll_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	(%rsi), %rax
	movl	(%rax), %r14d
	movq	_SPLL_CTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_I915_READ
	movl	(%rbx), %edi
	movq	_SPLL_PLL_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	callq	_I915_WRITE
	movl	(%rbx), %edi
	callq	_POSTING_READ
	movl	(%r15), %ebx
	movl	%r14d, %edi
	callq	_BIT
	testl	%ebx, %eax
	je	LBB0_1
## %bb.2:
	movq	%r15, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_init_pch_refclk          ## TAILCALL
LBB0_1:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SPLL_CTL,4,2                   ## @SPLL_CTL
	.comm	_SPLL_PLL_ENABLE,4,2            ## @SPLL_PLL_ENABLE
	.no_dead_strip	_hsw_ddi_spll_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hsw_ddi_spll_disable
_hsw_ddi_spll_disable:                  ; @hsw_ddi_spll_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x1]
	ldr	w20, [x8]
Lloh0:
	adrp	x21, _SPLL_CTL@GOTPAGE
Lloh1:
	ldr	x21, [x21, _SPLL_CTL@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_I915_READ
	ldr	w8, [x21]
Lloh2:
	adrp	x9, _SPLL_PLL_ENABLE@GOTPAGE
Lloh3:
	ldr	x9, [x9, _SPLL_PLL_ENABLE@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	bic	w1, w0, w9
	mov	x0, x8
	bl	_I915_WRITE
	ldr	w0, [x21]
	bl	_POSTING_READ
	ldr	w21, [x19]
	mov	x0, x20
	bl	_BIT
	tst	w0, w21
	b.eq	LBB0_2
; %bb.1:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_intel_init_pch_refclk
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_SPLL_CTL,4,2                   ; @SPLL_CTL
	.comm	_SPLL_PLL_ENABLE,4,2            ; @SPLL_PLL_ENABLE
	.no_dead_strip	_hsw_ddi_spll_disable
.subsections_via_symbols
