	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv515_clock_startup            ## -- Begin function rv515_clock_startup
	.p2align	4, 0x90
_rv515_clock_startup:                   ## @rv515_clock_startup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	_radeon_dynclks@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	decl	%eax
	cmpl	$-3, %eax
	ja	LBB0_2
## %bb.1:
	movl	$1, %esi
	callq	_radeon_atom_set_clock_gating
LBB0_2:
	movq	_R_00000F_CP_DYN_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_RREG32_PLL
	movl	%eax, %ebx
	movl	$1, %edi
	callq	_S_00000F_CP_FORCEON
	orl	%eax, %ebx
	movl	%r14d, %edi
	movl	%ebx, %esi
	callq	_WREG32_PLL
	movq	_R_000011_E2_DYN_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_RREG32_PLL
	movl	%eax, %ebx
	movl	$1, %edi
	callq	_S_000011_E2_FORCEON
	orl	%eax, %ebx
	movl	%r14d, %edi
	movl	%ebx, %esi
	callq	_WREG32_PLL
	movq	_R_000013_IDCT_DYN_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%r14d, %edi
	callq	_RREG32_PLL
	movl	%eax, %ebx
	movl	$1, %edi
	callq	_S_000013_IDCT_FORCEON
	orl	%eax, %ebx
	movl	%r14d, %edi
	movl	%ebx, %esi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_WREG32_PLL                     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_radeon_dynclks,4,2             ## @radeon_dynclks
	.comm	_R_00000F_CP_DYN_CNTL,4,2       ## @R_00000F_CP_DYN_CNTL
	.comm	_R_000011_E2_DYN_CNTL,4,2       ## @R_000011_E2_DYN_CNTL
	.comm	_R_000013_IDCT_DYN_CNTL,4,2     ## @R_000013_IDCT_DYN_CNTL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rv515_clock_startup            ; -- Begin function rv515_clock_startup
	.p2align	2
_rv515_clock_startup:                   ; @rv515_clock_startup
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x8, _radeon_dynclks@GOTPAGE
Lloh1:
	ldr	x8, [x8, _radeon_dynclks@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	sub	w8, w8, #1
	cmn	w8, #3
	b.hi	LBB0_2
; %bb.1:
	mov	w1, #1
	bl	_radeon_atom_set_clock_gating
LBB0_2:
Lloh3:
	adrp	x8, _R_00000F_CP_DYN_CNTL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _R_00000F_CP_DYN_CNTL@GOTPAGEOFF]
Lloh5:
	ldr	w19, [x8]
	mov	x0, x19
	bl	_RREG32_PLL
	mov	x20, x0
	mov	w0, #1
	bl	_S_00000F_CP_FORCEON
	orr	w1, w0, w20
	mov	x0, x19
	bl	_WREG32_PLL
Lloh6:
	adrp	x8, _R_000011_E2_DYN_CNTL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _R_000011_E2_DYN_CNTL@GOTPAGEOFF]
Lloh8:
	ldr	w19, [x8]
	mov	x0, x19
	bl	_RREG32_PLL
	mov	x20, x0
	mov	w0, #1
	bl	_S_000011_E2_FORCEON
	orr	w1, w0, w20
	mov	x0, x19
	bl	_WREG32_PLL
Lloh9:
	adrp	x8, _R_000013_IDCT_DYN_CNTL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _R_000013_IDCT_DYN_CNTL@GOTPAGEOFF]
Lloh11:
	ldr	w19, [x8]
	mov	x0, x19
	bl	_RREG32_PLL
	mov	x20, x0
	mov	w0, #1
	bl	_S_000013_IDCT_FORCEON
	orr	w1, w0, w20
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_WREG32_PLL
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_radeon_dynclks,4,2             ; @radeon_dynclks
	.comm	_R_00000F_CP_DYN_CNTL,4,2       ; @R_00000F_CP_DYN_CNTL
	.comm	_R_000011_E2_DYN_CNTL,4,2       ; @R_000011_E2_DYN_CNTL
	.comm	_R_000013_IDCT_DYN_CNTL,4,2     ; @R_000013_IDCT_DYN_CNTL
.subsections_via_symbols
