	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_vm_sdma_prepare
_amdgpu_vm_sdma_prepare:                ## @amdgpu_vm_sdma_prepare
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	24(%rdi), %rax
	movq	(%rax), %r13
	movq	_AMDGPU_VM_SDMA_MIN_NUM_DW@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	16(%rdi), %edi
	leal	(,%r12,4), %esi
	leaq	8(%rbx), %rdx
	callq	_amdgpu_job_alloc_with_ib
	testl	%eax, %eax
	jne	LBB0_4
## %bb.1:
	movl	16(%rbx), %edi
	movq	8(%rbx), %rsi
	movq	%r15, %rdx
	xorl	%ecx, %ecx
	callq	_amdgpu_sync_fence
	testl	%eax, %eax
	jne	LBB0_4
## %bb.2:
	movl	16(%rbx), %edi
	movq	8(%rbx), %rsi
	movl	(%r13), %edx
	movq	%r14, %rcx
	xorl	%r8d, %r8d
	callq	_amdgpu_sync_resv
	testl	%eax, %eax
	jne	LBB0_4
## %bb.3:
	movl	%r12d, (%rbx)
	xorl	%eax, %eax
LBB0_4:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_VM_SDMA_MIN_NUM_DW,4,2  ## @AMDGPU_VM_SDMA_MIN_NUM_DW
	.no_dead_strip	_amdgpu_vm_sdma_prepare
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_vm_sdma_prepare
_amdgpu_vm_sdma_prepare:                ; @amdgpu_vm_sdma_prepare
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
	ldr	x8, [x0, #24]
	ldr	x23, [x8]
Lloh0:
	adrp	x8, _AMDGPU_VM_SDMA_MIN_NUM_DW@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_VM_SDMA_MIN_NUM_DW@GOTPAGEOFF]
Lloh2:
	ldr	w22, [x8]
	ldr	w0, [x0, #16]
	lsl	w1, w22, #2
	add	x2, x19, #8
	bl	_amdgpu_job_alloc_with_ib
	cbnz	w0, LBB0_4
; %bb.1:
	ldr	w0, [x19, #16]
	ldr	x1, [x19, #8]
	mov	x2, x21
	mov	w3, #0
	bl	_amdgpu_sync_fence
	cbnz	w0, LBB0_4
; %bb.2:
	ldr	w0, [x19, #16]
	ldr	x1, [x19, #8]
	ldr	w2, [x23]
	mov	x3, x20
	mov	w4, #0
	bl	_amdgpu_sync_resv
	cbnz	w0, LBB0_4
; %bb.3:
	str	w22, [x19]
LBB0_4:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_VM_SDMA_MIN_NUM_DW,4,2  ; @AMDGPU_VM_SDMA_MIN_NUM_DW
	.no_dead_strip	_amdgpu_vm_sdma_prepare
.subsections_via_symbols
