	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_legacy_atom_fixup
_radeon_legacy_atom_fixup:              ## @radeon_legacy_atom_fixup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	callq	_to_radeon_crtc
	movl	(%rax), %eax
	cmpl	$1, %eax
	je	LBB0_4
## %bb.1:
	testl	%eax, %eax
	jne	LBB0_5
## %bb.2:
	movq	_RADEON_DISP_MERGE_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_RREG32
	movq	_RADEON_DISP_RGB_OFFSET_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%rbx), %edi
	jmp	LBB0_3
LBB0_4:
	movq	_RADEON_DISP2_MERGE_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_RREG32
	movq	_RADEON_DISP2_RGB_OFFSET_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%rbx), %edi
	callq	_WREG32
	movq	_RADEON_FP_H2_SYNC_STRT_WID@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_RADEON_CRTC2_H_SYNC_STRT_WID@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_RADEON_FP_V2_SYNC_STRT_WID@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_RADEON_CRTC2_V_SYNC_STRT_WID@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%ebx, %edi
	movl	%eax, %esi
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_DISP_MERGE_CNTL,4,2     ## @RADEON_DISP_MERGE_CNTL
	.comm	_RADEON_DISP_RGB_OFFSET_EN,4,2  ## @RADEON_DISP_RGB_OFFSET_EN
	.comm	_RADEON_DISP2_MERGE_CNTL,4,2    ## @RADEON_DISP2_MERGE_CNTL
	.comm	_RADEON_DISP2_RGB_OFFSET_EN,4,2 ## @RADEON_DISP2_RGB_OFFSET_EN
	.comm	_RADEON_FP_H2_SYNC_STRT_WID,4,2 ## @RADEON_FP_H2_SYNC_STRT_WID
	.comm	_RADEON_CRTC2_H_SYNC_STRT_WID,4,2 ## @RADEON_CRTC2_H_SYNC_STRT_WID
	.comm	_RADEON_FP_V2_SYNC_STRT_WID,4,2 ## @RADEON_FP_V2_SYNC_STRT_WID
	.comm	_RADEON_CRTC2_V_SYNC_STRT_WID,4,2 ## @RADEON_CRTC2_V_SYNC_STRT_WID
	.no_dead_strip	_radeon_legacy_atom_fixup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_legacy_atom_fixup
_radeon_legacy_atom_fixup:              ; @radeon_legacy_atom_fixup
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_to_radeon_crtc
	ldr	w8, [x0]
	cmp	w8, #1
	b.eq	LBB0_3
; %bb.1:
	cbnz	w8, LBB0_5
; %bb.2:
Lloh0:
	adrp	x19, _RADEON_DISP_MERGE_CNTL@GOTPAGE
Lloh1:
	ldr	x19, [x19, _RADEON_DISP_MERGE_CNTL@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_RREG32
Lloh2:
	adrp	x8, _RADEON_DISP_RGB_OFFSET_EN@GOTPAGE
Lloh3:
	ldr	x8, [x8, _RADEON_DISP_RGB_OFFSET_EN@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w0, [x19]
	b	LBB0_4
LBB0_3:
Lloh5:
	adrp	x19, _RADEON_DISP2_MERGE_CNTL@GOTPAGE
Lloh6:
	ldr	x19, [x19, _RADEON_DISP2_MERGE_CNTL@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_RREG32
Lloh7:
	adrp	x8, _RADEON_DISP2_RGB_OFFSET_EN@GOTPAGE
Lloh8:
	ldr	x8, [x8, _RADEON_DISP2_RGB_OFFSET_EN@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w0, [x19]
	bl	_WREG32
Lloh10:
	adrp	x8, _RADEON_FP_H2_SYNC_STRT_WID@GOTPAGE
Lloh11:
	ldr	x8, [x8, _RADEON_FP_H2_SYNC_STRT_WID@GOTPAGEOFF]
Lloh12:
	ldr	w19, [x8]
Lloh13:
	adrp	x8, _RADEON_CRTC2_H_SYNC_STRT_WID@GOTPAGE
Lloh14:
	ldr	x8, [x8, _RADEON_CRTC2_H_SYNC_STRT_WID@GOTPAGEOFF]
Lloh15:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x19
	bl	_WREG32
Lloh16:
	adrp	x8, _RADEON_FP_V2_SYNC_STRT_WID@GOTPAGE
Lloh17:
	ldr	x8, [x8, _RADEON_FP_V2_SYNC_STRT_WID@GOTPAGEOFF]
Lloh18:
	ldr	w19, [x8]
Lloh19:
	adrp	x8, _RADEON_CRTC2_V_SYNC_STRT_WID@GOTPAGE
Lloh20:
	ldr	x8, [x8, _RADEON_CRTC2_V_SYNC_STRT_WID@GOTPAGEOFF]
Lloh21:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x1, x0
	mov	x0, x19
LBB0_4:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_WREG32
LBB0_5:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_DISP_MERGE_CNTL,4,2     ; @RADEON_DISP_MERGE_CNTL
	.comm	_RADEON_DISP_RGB_OFFSET_EN,4,2  ; @RADEON_DISP_RGB_OFFSET_EN
	.comm	_RADEON_DISP2_MERGE_CNTL,4,2    ; @RADEON_DISP2_MERGE_CNTL
	.comm	_RADEON_DISP2_RGB_OFFSET_EN,4,2 ; @RADEON_DISP2_RGB_OFFSET_EN
	.comm	_RADEON_FP_H2_SYNC_STRT_WID,4,2 ; @RADEON_FP_H2_SYNC_STRT_WID
	.comm	_RADEON_CRTC2_H_SYNC_STRT_WID,4,2 ; @RADEON_CRTC2_H_SYNC_STRT_WID
	.comm	_RADEON_FP_V2_SYNC_STRT_WID,4,2 ; @RADEON_FP_V2_SYNC_STRT_WID
	.comm	_RADEON_CRTC2_V_SYNC_STRT_WID,4,2 ; @RADEON_CRTC2_V_SYNC_STRT_WID
	.no_dead_strip	_radeon_legacy_atom_fixup
.subsections_via_symbols
