	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_rgb_encoder_enable
_tegra_rgb_encoder_enable:              ## @tegra_rgb_encoder_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_encoder_to_output
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	_to_rgb
	movq	%rax, %r12
	movq	(%r14), %rdi
	testq	%rdi, %rdi
	je	LBB0_2
## %bb.1:
	callq	_drm_panel_prepare
LBB0_2:
	movl	(%r12), %r15d
	movq	_rgb_enable@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movl	%r15d, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_tegra_dc_write_regs
	movq	_DE_SELECT_ACTIVE@GOTPCREL(%rip), %rax
	movq	_DE_CONTROL_NORMAL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movl	(%r12), %edi
	movq	_DC_DISP_DATA_ENABLE_OPTIONS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_tegra_dc_writel
	movl	(%r12), %ebx
	movl	$1, %edi
	callq	_DC_COM_PIN_OUTPUT_POLARITY
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_tegra_dc_readl
	movq	_LVS_OUTPUT_POLARITY_LOW@GOTPCREL(%rip), %rcx
	movq	_LHS_OUTPUT_POLARITY_LOW@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	orl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	(%r12), %r15d
	movl	$1, %edi
	callq	_DC_COM_PIN_OUTPUT_POLARITY
	movl	%r15d, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_tegra_dc_writel
	movq	_DISP_DATA_FORMAT_DF1P1C@GOTPCREL(%rip), %rax
	movq	_DISP_ALIGNMENT_MSB@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_DISP_ORDER_RED_BLUE@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movl	(%r12), %edi
	movq	_DC_DISP_DISP_INTERFACE_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_tegra_dc_writel
	movq	_SC0_H_QUALIFIER_NONE@GOTPCREL(%rip), %rax
	movq	_SC1_H_QUALIFIER_NONE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movl	(%r12), %edi
	movq	_DC_DISP_SHIFT_CLOCK_OPTIONS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_tegra_dc_writel
	movl	(%r12), %edi
	callq	_tegra_dc_commit
	movq	(%r14), %rdi
	testq	%rdi, %rdi
	je	LBB0_3
## %bb.4:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_drm_panel_enable               ## TAILCALL
LBB0_3:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_rgb_enable,4,2                 ## @rgb_enable
	.comm	_DE_SELECT_ACTIVE,4,2           ## @DE_SELECT_ACTIVE
	.comm	_DE_CONTROL_NORMAL,4,2          ## @DE_CONTROL_NORMAL
	.comm	_DC_DISP_DATA_ENABLE_OPTIONS,4,2 ## @DC_DISP_DATA_ENABLE_OPTIONS
	.comm	_LVS_OUTPUT_POLARITY_LOW,4,2    ## @LVS_OUTPUT_POLARITY_LOW
	.comm	_LHS_OUTPUT_POLARITY_LOW,4,2    ## @LHS_OUTPUT_POLARITY_LOW
	.comm	_DISP_DATA_FORMAT_DF1P1C,4,2    ## @DISP_DATA_FORMAT_DF1P1C
	.comm	_DISP_ALIGNMENT_MSB,4,2         ## @DISP_ALIGNMENT_MSB
	.comm	_DISP_ORDER_RED_BLUE,4,2        ## @DISP_ORDER_RED_BLUE
	.comm	_DC_DISP_DISP_INTERFACE_CONTROL,4,2 ## @DC_DISP_DISP_INTERFACE_CONTROL
	.comm	_SC0_H_QUALIFIER_NONE,4,2       ## @SC0_H_QUALIFIER_NONE
	.comm	_SC1_H_QUALIFIER_NONE,4,2       ## @SC1_H_QUALIFIER_NONE
	.comm	_DC_DISP_SHIFT_CLOCK_OPTIONS,4,2 ## @DC_DISP_SHIFT_CLOCK_OPTIONS
	.no_dead_strip	_tegra_rgb_encoder_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_rgb_encoder_enable
_tegra_rgb_encoder_enable:              ; @tegra_rgb_encoder_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_encoder_to_output
	mov	x19, x0
	bl	_to_rgb
	mov	x20, x0
	ldr	x0, [x19]
	cbz	x0, LBB0_2
; %bb.1:
	bl	_drm_panel_prepare
LBB0_2:
	ldr	w21, [x20]
Lloh0:
	adrp	x8, _rgb_enable@GOTPAGE
Lloh1:
	ldr	x8, [x8, _rgb_enable@GOTPAGEOFF]
Lloh2:
	ldr	w22, [x8]
	mov	x0, x22
	bl	_ARRAY_SIZE
	mov	x2, x0
	mov	x0, x21
	mov	x1, x22
	bl	_tegra_dc_write_regs
Lloh3:
	adrp	x8, _DE_SELECT_ACTIVE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DE_SELECT_ACTIVE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _DE_CONTROL_NORMAL@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DE_CONTROL_NORMAL@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w1, w9, w8
	ldr	w0, [x20]
Lloh9:
	adrp	x8, _DC_DISP_DATA_ENABLE_OPTIONS@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DC_DISP_DATA_ENABLE_OPTIONS@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	bl	_tegra_dc_writel
	ldr	w21, [x20]
	mov	w0, #1
	bl	_DC_COM_PIN_OUTPUT_POLARITY
	mov	x1, x0
	mov	x0, x21
	bl	_tegra_dc_readl
Lloh12:
	adrp	x8, _LVS_OUTPUT_POLARITY_LOW@GOTPAGE
Lloh13:
	ldr	x8, [x8, _LVS_OUTPUT_POLARITY_LOW@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
Lloh15:
	adrp	x9, _LHS_OUTPUT_POLARITY_LOW@GOTPAGE
Lloh16:
	ldr	x9, [x9, _LHS_OUTPUT_POLARITY_LOW@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w21, w0, w8
	ldr	w22, [x20]
	mov	w0, #1
	bl	_DC_COM_PIN_OUTPUT_POLARITY
	mov	x2, x0
	mov	x0, x22
	mov	x1, x21
	bl	_tegra_dc_writel
Lloh18:
	adrp	x8, _DISP_DATA_FORMAT_DF1P1C@GOTPAGE
Lloh19:
	ldr	x8, [x8, _DISP_DATA_FORMAT_DF1P1C@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
Lloh21:
	adrp	x9, _DISP_ALIGNMENT_MSB@GOTPAGE
Lloh22:
	ldr	x9, [x9, _DISP_ALIGNMENT_MSB@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh24:
	adrp	x9, _DISP_ORDER_RED_BLUE@GOTPAGE
Lloh25:
	ldr	x9, [x9, _DISP_ORDER_RED_BLUE@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	orr	w1, w8, w9
	ldr	w0, [x20]
Lloh27:
	adrp	x8, _DC_DISP_DISP_INTERFACE_CONTROL@GOTPAGE
Lloh28:
	ldr	x8, [x8, _DC_DISP_DISP_INTERFACE_CONTROL@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	bl	_tegra_dc_writel
Lloh30:
	adrp	x8, _SC0_H_QUALIFIER_NONE@GOTPAGE
Lloh31:
	ldr	x8, [x8, _SC0_H_QUALIFIER_NONE@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
Lloh33:
	adrp	x9, _SC1_H_QUALIFIER_NONE@GOTPAGE
Lloh34:
	ldr	x9, [x9, _SC1_H_QUALIFIER_NONE@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	orr	w1, w9, w8
	ldr	w0, [x20]
Lloh36:
	adrp	x8, _DC_DISP_SHIFT_CLOCK_OPTIONS@GOTPAGE
Lloh37:
	ldr	x8, [x8, _DC_DISP_SHIFT_CLOCK_OPTIONS@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	bl	_tegra_dc_writel
	ldr	w0, [x20]
	bl	_tegra_dc_commit
	ldr	x0, [x19]
	cbz	x0, LBB0_4
; %bb.3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_drm_panel_enable
LBB0_4:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_rgb_enable,4,2                 ; @rgb_enable
	.comm	_DE_SELECT_ACTIVE,4,2           ; @DE_SELECT_ACTIVE
	.comm	_DE_CONTROL_NORMAL,4,2          ; @DE_CONTROL_NORMAL
	.comm	_DC_DISP_DATA_ENABLE_OPTIONS,4,2 ; @DC_DISP_DATA_ENABLE_OPTIONS
	.comm	_LVS_OUTPUT_POLARITY_LOW,4,2    ; @LVS_OUTPUT_POLARITY_LOW
	.comm	_LHS_OUTPUT_POLARITY_LOW,4,2    ; @LHS_OUTPUT_POLARITY_LOW
	.comm	_DISP_DATA_FORMAT_DF1P1C,4,2    ; @DISP_DATA_FORMAT_DF1P1C
	.comm	_DISP_ALIGNMENT_MSB,4,2         ; @DISP_ALIGNMENT_MSB
	.comm	_DISP_ORDER_RED_BLUE,4,2        ; @DISP_ORDER_RED_BLUE
	.comm	_DC_DISP_DISP_INTERFACE_CONTROL,4,2 ; @DC_DISP_DISP_INTERFACE_CONTROL
	.comm	_SC0_H_QUALIFIER_NONE,4,2       ; @SC0_H_QUALIFIER_NONE
	.comm	_SC1_H_QUALIFIER_NONE,4,2       ; @SC1_H_QUALIFIER_NONE
	.comm	_DC_DISP_SHIFT_CLOCK_OPTIONS,4,2 ; @DC_DISP_SHIFT_CLOCK_OPTIONS
	.no_dead_strip	_tegra_rgb_encoder_enable
.subsections_via_symbols
