	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function itg3200_write_raw
_itg3200_write_raw:                     ## @itg3200_write_raw
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpq	$128, %r8
	jne	LBB0_6
## %bb.1:
	movl	%edx, %r15d
	testl	%edx, %edx
	je	LBB0_6
## %bb.2:
	testl	%ecx, %ecx
	jne	LBB0_6
## %bb.3:
	movq	%rdi, %r14
	callq	_mutex_lock
	movq	_ITG3200_REG_DLPF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-28(%rbp), %rdx
	movq	%r14, %rdi
	callq	_itg3200_read_reg_8
	testl	%eax, %eax
	jne	LBB0_4
## %bb.5:
	movq	_ITG3200_DLPF_CFG_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-28(%rbp), %eax
	movl	$8000, %ecx                     ## imm = 0x1F40
	movl	$1000, %eax                     ## imm = 0x3E8
	cmovel	%ecx, %eax
	xorl	%edx, %edx
	divl	%r15d
                                        ## kill: def $eax killed $eax def $rax
	leal	-1(%rax), %edx
	movl	%edx, -28(%rbp)
	movq	_ITG3200_REG_SAMPLE_RATE_DIV@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_itg3200_write_reg_8
LBB0_4:
	movl	%eax, %ebx
	movq	%r14, %rdi
	callq	_mutex_unlock
	jmp	LBB0_7
LBB0_6:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_7:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_ITG3200_REG_DLPF,4,2           ## @ITG3200_REG_DLPF
	.comm	_ITG3200_DLPF_CFG_MASK,4,2      ## @ITG3200_DLPF_CFG_MASK
	.comm	_ITG3200_REG_SAMPLE_RATE_DIV,4,2 ## @ITG3200_REG_SAMPLE_RATE_DIV
	.no_dead_strip	_itg3200_write_raw
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function itg3200_write_raw
_itg3200_write_raw:                     ; @itg3200_write_raw
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	cmp	x4, #128
	b.ne	LBB0_6
; %bb.1:
	mov	x20, x2
	cbz	w2, LBB0_6
; %bb.2:
	cbnz	w3, LBB0_6
; %bb.3:
	mov	x19, x0
	bl	_mutex_lock
Lloh0:
	adrp	x8, _ITG3200_REG_DLPF@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ITG3200_REG_DLPF@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #12
	mov	x0, x19
	bl	_itg3200_read_reg_8
	cbnz	w0, LBB0_5
; %bb.4:
Lloh3:
	adrp	x8, _ITG3200_DLPF_CFG_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ITG3200_DLPF_CFG_MASK@GOTPAGEOFF]
	ldr	w9, [sp, #12]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w9
	mov	w8, #1000
	mov	w9, #8000
	csel	w8, w9, w8, eq
	udiv	w8, w8, w20
	sub	w2, w8, #1
	str	w2, [sp, #12]
Lloh6:
	adrp	x8, _ITG3200_REG_SAMPLE_RATE_DIV@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ITG3200_REG_SAMPLE_RATE_DIV@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_itg3200_write_reg_8
LBB0_5:
	mov	x21, x0
	mov	x0, x19
	bl	_mutex_unlock
	b	LBB0_7
LBB0_6:
Lloh9:
	adrp	x8, _EINVAL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_7:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_ITG3200_REG_DLPF,4,2           ; @ITG3200_REG_DLPF
	.comm	_ITG3200_DLPF_CFG_MASK,4,2      ; @ITG3200_DLPF_CFG_MASK
	.comm	_ITG3200_REG_SAMPLE_RATE_DIV,4,2 ; @ITG3200_REG_SAMPLE_RATE_DIV
	.no_dead_strip	_itg3200_write_raw
.subsections_via_symbols
