	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v9_0_ring_emit_reg_write_reg_wait
_gfx_v9_0_ring_emit_reg_write_reg_wait: ## @gfx_v9_0_ring_emit_reg_write_reg_wait
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	%r8d, %r11d
	movl	%ecx, %r10d
	movl	%edx, %r9d
	movl	%esi, %r8d
	movq	(%rdi), %rcx
	movq	8(%rdi), %rsi
	movq	(%rcx), %rcx
	movq	_AMDGPU_RING_TYPE_GFX@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %rcx
	setne	%al
	cmpl	$0, (%rsi,%rax,4)
	je	LBB0_2
## %bb.1:
	xorl	%esi, %esi
	cmpq	%rdx, %rcx
	sete	%sil
	subq	$8, %rsp
	xorl	%edx, %edx
	movl	$1, %ecx
	pushq	$32
	pushq	%r11
	pushq	%r10
	callq	_gfx_v9_0_wait_reg_mem
	addq	$32, %rsp
	popq	%rbp
	retq
LBB0_2:
	movl	%r8d, %esi
	movl	%r9d, %edx
	movl	%r10d, %ecx
	movl	%r11d, %r8d
	popq	%rbp
	jmp	_amdgpu_ring_emit_reg_write_reg_wait_helper ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_RING_TYPE_GFX,8,3       ## @AMDGPU_RING_TYPE_GFX
	.no_dead_strip	_gfx_v9_0_ring_emit_reg_write_reg_wait
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v9_0_ring_emit_reg_write_reg_wait
_gfx_v9_0_ring_emit_reg_write_reg_wait: ; @gfx_v9_0_ring_emit_reg_write_reg_wait
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #32
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	mov	x7, x4
	mov	x6, x3
	mov	x5, x2
	mov	x4, x1
	ldp	x8, x10, [x0]
Lloh0:
	adrp	x9, _AMDGPU_RING_TYPE_GFX@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMDGPU_RING_TYPE_GFX@GOTPAGEOFF]
	ldr	x8, [x8]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	cset	w11, ne
	ldr	w10, [x10, w11, uxtw #2]
	cbz	w10, LBB0_2
; %bb.1:
	cmp	x8, x9
	cset	w1, eq
	mov	w8, #32
	str	w8, [sp]
	mov	w2, #0
	mov	w3, #1
	bl	_gfx_v9_0_wait_reg_mem
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #32
	ret
LBB0_2:
	mov	x1, x4
	mov	x2, x5
	mov	x3, x6
	mov	x4, x7
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #32
	b	_amdgpu_ring_emit_reg_write_reg_wait_helper
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_RING_TYPE_GFX,8,3       ; @AMDGPU_RING_TYPE_GFX
	.no_dead_strip	_gfx_v9_0_ring_emit_reg_write_reg_wait
.subsections_via_symbols
