	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mixer_disable_vblank
_mixer_disable_vblank:                  ## @mixer_disable_vblank
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	(%rdi), %rbx
	movq	_MXR_BIT_VSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rbx, %rsi
	callq	___clear_bit
	movq	_MXR_BIT_POWERED@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rbx, %rsi
	callq	_test_bit
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movq	_MXR_INT_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MXR_INT_CLEAR_VSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	$-1, %edx
	callq	_mixer_reg_writemask
	movq	_MXR_INT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MXR_INT_EN_VSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_mixer_reg_writemask            ## TAILCALL
LBB0_1:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MXR_BIT_VSYNC,4,2              ## @MXR_BIT_VSYNC
	.comm	_MXR_BIT_POWERED,4,2            ## @MXR_BIT_POWERED
	.comm	_MXR_INT_STATUS,4,2             ## @MXR_INT_STATUS
	.comm	_MXR_INT_CLEAR_VSYNC,4,2        ## @MXR_INT_CLEAR_VSYNC
	.comm	_MXR_INT_EN,4,2                 ## @MXR_INT_EN
	.comm	_MXR_INT_EN_VSYNC,4,2           ## @MXR_INT_EN_VSYNC
	.no_dead_strip	_mixer_disable_vblank
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mixer_disable_vblank
_mixer_disable_vblank:                  ; @mixer_disable_vblank
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	x19, [x0]
Lloh0:
	adrp	x8, _MXR_BIT_VSYNC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MXR_BIT_VSYNC@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	x1, x19
	bl	___clear_bit
Lloh3:
	adrp	x8, _MXR_BIT_POWERED@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MXR_BIT_POWERED@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_test_bit
	cbz	w0, LBB0_2
; %bb.1:
Lloh6:
	adrp	x8, _MXR_INT_STATUS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MXR_INT_STATUS@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
Lloh9:
	adrp	x8, _MXR_INT_CLEAR_VSYNC@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MXR_INT_CLEAR_VSYNC@GOTPAGEOFF]
Lloh11:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w2, #-1
	bl	_mixer_reg_writemask
Lloh12:
	adrp	x8, _MXR_INT_EN@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MXR_INT_EN@GOTPAGEOFF]
Lloh14:
	adrp	x9, _MXR_INT_EN_VSYNC@GOTPAGE
Lloh15:
	ldr	x9, [x9, _MXR_INT_EN_VSYNC@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
Lloh17:
	ldr	w3, [x9]
	mov	x0, x19
	mov	w2, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_mixer_reg_writemask
LBB0_2:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh16
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_MXR_BIT_VSYNC,4,2              ; @MXR_BIT_VSYNC
	.comm	_MXR_BIT_POWERED,4,2            ; @MXR_BIT_POWERED
	.comm	_MXR_INT_STATUS,4,2             ; @MXR_INT_STATUS
	.comm	_MXR_INT_CLEAR_VSYNC,4,2        ; @MXR_INT_CLEAR_VSYNC
	.comm	_MXR_INT_EN,4,2                 ; @MXR_INT_EN
	.comm	_MXR_INT_EN_VSYNC,4,2           ; @MXR_INT_EN_VSYNC
	.no_dead_strip	_mixer_disable_vblank
.subsections_via_symbols
