	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_convert_power_level_to_smc
_si_convert_power_level_to_smc:         ## @si_convert_power_level_to_smc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	callq	_rv770_get_pi
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	_evergreen_get_pi
	movq	%rax, %r13
	movq	%rbx, %rdi
	callq	_si_get_pi
	cmpq	$0, 32(%r13)
	je	LBB0_2
## %bb.1:
	movq	(%rax), %rdx
	movq	_RADEON_PCIE_GEN_INVALID@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rdx
	jne	LBB0_3
LBB0_2:
	movq	24(%r15), %rdx
LBB0_3:
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	%rdx, 40(%r14)
	movl	8(%r15), %esi
	leaq	32(%r14), %rdx
	movq	%rbx, %rdi
	callq	_si_populate_sclk_value
	testl	%eax, %eax
	jne	LBB0_31
## %bb.4:
	movl	$0, 28(%r14)
	movq	(%r12), %rax
	testq	%rax, %rax
	je	LBB0_10
## %bb.5:
	cmpq	%rax, (%r15)
	jg	LBB0_10
## %bb.6:
	cmpl	$0, 28(%r13)
	je	LBB0_7
LBB0_10:
	cmpq	$0, 16(%r12)
	movq	(%r15), %rsi
	je	LBB0_19
## %bb.11:
	cmpq	8(%r12), %rsi
	jle	LBB0_13
## %bb.12:
	movq	_SISLANDS_SMC_MC_EDC_RD_FLAG@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 28(%r14)
LBB0_13:
	cmpq	(%r13), %rsi
	jle	LBB0_15
## %bb.14:
	movq	_SISLANDS_SMC_MC_EDC_WR_FLAG@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 28(%r14)
LBB0_15:
	movq	%rbx, %rdi
	callq	_si_get_strobe_mode_settings
	movl	%eax, (%r14)
	movq	_SISLANDS_SMC_STROBE_ENABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_16
## %bb.17:
	movq	(%r15), %rdi
	movl	$1, %esi
	callq	_si_get_mclk_frequency_ratio
	movl	%eax, %r12d
	movq	_MC_SEQ_MISC7@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	shrl	$16, %eax
	andl	$15, %eax
	cmpl	%eax, %r12d
	jge	LBB0_20
## %bb.18:
	movq	_MC_SEQ_MISC6@GOTPCREL(%rip), %rax
	jmp	LBB0_21
LBB0_19:
	movq	%rbx, %rdi
	callq	_si_get_strobe_mode_settings
	movl	%eax, (%r14)
LBB0_20:
	movq	_MC_SEQ_MISC5@GOTPCREL(%rip), %rax
LBB0_21:
	movl	(%rax), %edi
	callq	_RREG32
	movl	%eax, %r9d
	shrl	%r9d
	andl	$1, %r9d
	jmp	LBB0_22
LBB0_16:
	xorl	%r9d, %r9d
LBB0_22:
	movl	8(%r15), %esi
	movq	(%r15), %rdx
	leaq	24(%r14), %rcx
	movq	_SISLANDS_SMC_STROBE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%r8d, %r8d
	andl	(%r14), %eax
	setne	%r8b
	movq	%rbx, %rdi
	callq	_si_populate_mclk_value
	testl	%eax, %eax
	jne	LBB0_31
## %bb.23:
	leaq	24(%r13), %rsi
	movl	12(%r15), %edx
	leaq	12(%r14), %r12
	movq	%rbx, %rdi
	movq	%r12, %rcx
	callq	_si_populate_voltage_value
	testl	%eax, %eax
	jne	LBB0_31
## %bb.24:
	leaq	-44(%rbp), %rdx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_si_get_std_voltage_value
	testl	%eax, %eax
	jne	LBB0_31
## %bb.25:
	movl	-44(%rbp), %esi
	movl	12(%r14), %edx
	leaq	20(%r14), %rcx
	movq	%rbx, %rdi
	callq	_si_populate_std_voltage_value
	testl	%eax, %eax
	je	LBB0_26
LBB0_31:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_7:
	movq	_DPG_PIPE_STUTTER_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movq	_STUTTER_ENABLE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_10
## %bb.8:
	cmpl	$2, (%rbx)
	jg	LBB0_10
## %bb.9:
	movq	_SISLANDS_SMC_MC_STUTTER_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 28(%r14)
	jmp	LBB0_10
LBB0_26:
	cmpq	$0, 16(%r13)
	je	LBB0_28
## %bb.27:
	addq	$8, %r13
	movl	16(%r15), %edx
	leaq	16(%r14), %rcx
	movq	%rbx, %rdi
	movq	%r13, %rsi
	callq	_si_populate_voltage_value
	testl	%eax, %eax
	jne	LBB0_31
LBB0_28:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	cmpq	$0, 16(%rax)
	je	LBB0_30
## %bb.29:
	leaq	4(%rbx), %rsi
	movl	12(%r15), %edx
	movl	8(%r15), %ecx
	movq	(%r15), %r8
	movq	%rbx, %rdi
	movq	%r12, %r9
	callq	_si_populate_phase_shedding_value
	testl	%eax, %eax
	jne	LBB0_31
LBB0_30:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	8(%rax), %eax
	movl	%eax, 8(%r14)
	movq	(%r15), %rsi
	addq	$4, %r14
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_si_populate_mvdd_value
	jmp	LBB0_31
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_PCIE_GEN_INVALID,8,3    ## @RADEON_PCIE_GEN_INVALID
	.comm	_DPG_PIPE_STUTTER_CONTROL,4,2   ## @DPG_PIPE_STUTTER_CONTROL
	.comm	_STUTTER_ENABLE,4,2             ## @STUTTER_ENABLE
	.comm	_SISLANDS_SMC_MC_STUTTER_EN,4,2 ## @SISLANDS_SMC_MC_STUTTER_EN
	.comm	_SISLANDS_SMC_MC_PG_EN,4,2      ## @SISLANDS_SMC_MC_PG_EN
	.comm	_SISLANDS_SMC_MC_EDC_RD_FLAG,4,2 ## @SISLANDS_SMC_MC_EDC_RD_FLAG
	.comm	_SISLANDS_SMC_MC_EDC_WR_FLAG,4,2 ## @SISLANDS_SMC_MC_EDC_WR_FLAG
	.comm	_SISLANDS_SMC_STROBE_ENABLE,4,2 ## @SISLANDS_SMC_STROBE_ENABLE
	.comm	_MC_SEQ_MISC7,4,2               ## @MC_SEQ_MISC7
	.comm	_MC_SEQ_MISC5,4,2               ## @MC_SEQ_MISC5
	.comm	_MC_SEQ_MISC6,4,2               ## @MC_SEQ_MISC6
	.no_dead_strip	_si_convert_power_level_to_smc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_convert_power_level_to_smc
_si_convert_power_level_to_smc:         ; @si_convert_power_level_to_smc
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	bl	_rv770_get_pi
	mov	x24, x0
	mov	x0, x19
	bl	_evergreen_get_pi
	mov	x23, x0
	mov	x0, x19
	bl	_si_get_pi
	mov	x22, x0
	ldr	x8, [x23, #32]
	cbz	x8, LBB0_2
; %bb.1:
	ldr	x8, [x22]
Lloh0:
	adrp	x9, _RADEON_PCIE_GEN_INVALID@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_PCIE_GEN_INVALID@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_3
LBB0_2:
	ldr	x8, [x21, #24]
LBB0_3:
	str	x8, [x20, #40]
	ldr	w1, [x21, #8]
	add	x2, x20, #32
	mov	x0, x19
	bl	_si_populate_sclk_value
	cbnz	w0, LBB0_21
; %bb.4:
	str	wzr, [x20, #28]
	ldr	x8, [x24]
	cbz	x8, LBB0_7
; %bb.5:
	ldr	x9, [x21]
	cmp	x9, x8
	b.gt	LBB0_7
; %bb.6:
	ldr	w8, [x23, #28]
	cbz	w8, LBB0_22
LBB0_7:
	ldr	x8, [x24, #16]
	ldr	x1, [x21]
Lloh3:
	adrp	x25, _SISLANDS_SMC_STROBE_ENABLE@GOTPAGE
Lloh4:
	ldr	x25, [x25, _SISLANDS_SMC_STROBE_ENABLE@GOTPAGEOFF]
	cbz	x8, LBB0_14
; %bb.8:
	ldr	x8, [x24, #8]
	cmp	x1, x8
	b.le	LBB0_10
; %bb.9:
Lloh5:
	adrp	x8, _SISLANDS_SMC_MC_EDC_RD_FLAG@GOTPAGE
Lloh6:
	ldr	x8, [x8, _SISLANDS_SMC_MC_EDC_RD_FLAG@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	ldr	w9, [x20, #28]
	orr	w8, w9, w8
	str	w8, [x20, #28]
LBB0_10:
	ldr	x8, [x23]
	cmp	x1, x8
	b.le	LBB0_12
; %bb.11:
Lloh8:
	adrp	x8, _SISLANDS_SMC_MC_EDC_WR_FLAG@GOTPAGE
Lloh9:
	ldr	x8, [x8, _SISLANDS_SMC_MC_EDC_WR_FLAG@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	ldr	w9, [x20, #28]
	orr	w8, w9, w8
	str	w8, [x20, #28]
LBB0_12:
	mov	x0, x19
	bl	_si_get_strobe_mode_settings
	str	w0, [x20]
	ldr	w8, [x25]
	tst	w8, w0
	b.eq	LBB0_16
; %bb.13:
	ldr	x0, [x21]
	mov	w1, #1
	bl	_si_get_mclk_frequency_ratio
	mov	x24, x0
Lloh11:
	adrp	x8, _MC_SEQ_MISC7@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MC_SEQ_MISC7@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	bl	_RREG32
	ubfx	w8, w0, #16, #4
Lloh14:
	adrp	x9, _MC_SEQ_MISC5@GOTPAGE
Lloh15:
	ldr	x9, [x9, _MC_SEQ_MISC5@GOTPAGEOFF]
Lloh16:
	adrp	x10, _MC_SEQ_MISC6@GOTPAGE
Lloh17:
	ldr	x10, [x10, _MC_SEQ_MISC6@GOTPAGEOFF]
	cmp	w24, w8
	csel	x8, x10, x9, lt
	b	LBB0_15
LBB0_14:
	mov	x0, x19
	bl	_si_get_strobe_mode_settings
	str	w0, [x20]
Lloh18:
	adrp	x8, _MC_SEQ_MISC5@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MC_SEQ_MISC5@GOTPAGEOFF]
LBB0_15:
	ldr	w0, [x8]
	bl	_RREG32
	ubfx	w5, w0, #1, #1
	b	LBB0_17
LBB0_16:
	mov	w5, #0
LBB0_17:
	ldr	w1, [x21, #8]
	ldr	x2, [x21]
	mov	x3, x20
	ldr	w8, [x3], #24
	ldr	w9, [x25]
	tst	w9, w8
	cset	w4, ne
	mov	x0, x19
	bl	_si_populate_mclk_value
	cbnz	w0, LBB0_21
; %bb.18:
	add	x1, x23, #24
	ldr	w2, [x21, #12]
	add	x24, x20, #12
	mov	x0, x19
	mov	x3, x24
	bl	_si_populate_voltage_value
	cbnz	w0, LBB0_21
; %bb.19:
	add	x2, sp, #12
	mov	x0, x19
	mov	x1, x24
	bl	_si_get_std_voltage_value
	cbnz	w0, LBB0_21
; %bb.20:
	ldr	w1, [sp, #12]
	ldr	w2, [x20, #12]
	add	x3, x20, #20
	mov	x0, x19
	bl	_si_populate_std_voltage_value
	cbz	w0, LBB0_25
LBB0_21:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_22:
Lloh20:
	adrp	x8, _DPG_PIPE_STUTTER_CONTROL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _DPG_PIPE_STUTTER_CONTROL@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	bl	_RREG32
Lloh23:
	adrp	x8, _STUTTER_ENABLE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _STUTTER_ENABLE@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_7
; %bb.23:
	ldr	w8, [x19]
	cmp	w8, #2
	b.gt	LBB0_7
; %bb.24:
Lloh26:
	adrp	x8, _SISLANDS_SMC_MC_STUTTER_EN@GOTPAGE
Lloh27:
	ldr	x8, [x8, _SISLANDS_SMC_MC_STUTTER_EN@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	ldr	w9, [x20, #28]
	orr	w8, w9, w8
	str	w8, [x20, #28]
	b	LBB0_7
LBB0_25:
	ldr	x8, [x23, #16]
	cbz	x8, LBB0_27
; %bb.26:
	add	x1, x23, #8
	ldr	w2, [x21, #16]
	add	x3, x20, #16
	mov	x0, x19
	bl	_si_populate_voltage_value
	cbnz	w0, LBB0_21
LBB0_27:
	ldr	x8, [x22, #16]
	cbz	x8, LBB0_29
; %bb.28:
	add	x1, x19, #4
	ldp	w3, w2, [x21, #8]
	ldr	x4, [x21]
	mov	x0, x19
	mov	x5, x24
	bl	_si_populate_phase_shedding_value
	cbnz	w0, LBB0_21
LBB0_29:
	ldr	w8, [x22, #8]
	str	w8, [x20, #8]
	ldr	x1, [x21]
	add	x2, x20, #4
	mov	x0, x19
	bl	_si_populate_mvdd_value
	b	LBB0_21
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_PCIE_GEN_INVALID,8,3    ; @RADEON_PCIE_GEN_INVALID
	.comm	_DPG_PIPE_STUTTER_CONTROL,4,2   ; @DPG_PIPE_STUTTER_CONTROL
	.comm	_STUTTER_ENABLE,4,2             ; @STUTTER_ENABLE
	.comm	_SISLANDS_SMC_MC_STUTTER_EN,4,2 ; @SISLANDS_SMC_MC_STUTTER_EN
	.comm	_SISLANDS_SMC_MC_PG_EN,4,2      ; @SISLANDS_SMC_MC_PG_EN
	.comm	_SISLANDS_SMC_MC_EDC_RD_FLAG,4,2 ; @SISLANDS_SMC_MC_EDC_RD_FLAG
	.comm	_SISLANDS_SMC_MC_EDC_WR_FLAG,4,2 ; @SISLANDS_SMC_MC_EDC_WR_FLAG
	.comm	_SISLANDS_SMC_STROBE_ENABLE,4,2 ; @SISLANDS_SMC_STROBE_ENABLE
	.comm	_MC_SEQ_MISC7,4,2               ; @MC_SEQ_MISC7
	.comm	_MC_SEQ_MISC5,4,2               ; @MC_SEQ_MISC5
	.comm	_MC_SEQ_MISC6,4,2               ; @MC_SEQ_MISC6
	.no_dead_strip	_si_convert_power_level_to_smc
.subsections_via_symbols
