	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function inv_mpu6050_init_config
_inv_mpu6050_init_config:               ## @inv_mpu6050_init_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	callq	_iio_priv
	movq	%rax, %r14
	movq	%rax, %rdi
	movl	$1, %esi
	callq	_inv_mpu6050_set_power_itg
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_8
## %bb.1:
	movq	_INV_MPU6050_FSR_2000DPS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_INV_MPU6050_GYRO_CONFIG_FSR_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edx
	movl	32(%r14), %edi
	movq	24(%r14), %rax
	movl	12(%rax), %esi
	callq	_regmap_write
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_7
## %bb.2:
	movq	_INV_MPU6050_FILTER_20HZ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_inv_mpu6050_set_lpf_regs
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_7
## %bb.3:
	movq	_INV_MPU6050_INIT_FIFO_RATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_INV_MPU6050_FIFO_RATE_TO_DIVIDER
	movl	32(%r14), %edi
	movq	24(%r14), %rcx
	movl	8(%rcx), %esi
	movl	%eax, %edx
	callq	_regmap_write
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_7
## %bb.4:
	movq	_INV_MPU6050_FS_02G@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_INV_MPU6050_ACCL_CONFIG_FSR_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edx
	movl	32(%r14), %edi
	movq	24(%r14), %rax
	movl	4(%rax), %esi
	callq	_regmap_write
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_5
LBB0_7:
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_inv_mpu6050_set_power_itg
LBB0_8:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_5:
	movl	32(%r14), %edi
	movq	24(%r14), %rax
	movl	(%rax), %esi
	movl	(%r14), %edx
	callq	_regmap_write
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_8
## %bb.6:
	movq	%r14, %rdi
	addq	$20, %rdi
	movq	_hw_info@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	8(%r14), %rcx
	movl	(%rax,%rcx,4), %esi
	movl	$4, %edx
	callq	_memcpy
	movq	_NSEC_PER_MSEC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%r14)
	movq	%r14, %rdi
	xorl	%esi, %esi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_inv_mpu6050_set_power_itg      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_INV_MPU6050_FSR_2000DPS,4,2    ## @INV_MPU6050_FSR_2000DPS
	.comm	_INV_MPU6050_GYRO_CONFIG_FSR_SHIFT,4,2 ## @INV_MPU6050_GYRO_CONFIG_FSR_SHIFT
	.comm	_INV_MPU6050_FILTER_20HZ,4,2    ## @INV_MPU6050_FILTER_20HZ
	.comm	_INV_MPU6050_INIT_FIFO_RATE,4,2 ## @INV_MPU6050_INIT_FIFO_RATE
	.comm	_INV_MPU6050_FS_02G,4,2         ## @INV_MPU6050_FS_02G
	.comm	_INV_MPU6050_ACCL_CONFIG_FSR_SHIFT,4,2 ## @INV_MPU6050_ACCL_CONFIG_FSR_SHIFT
	.comm	_hw_info,8,3                    ## @hw_info
	.comm	_NSEC_PER_MSEC,4,2              ## @NSEC_PER_MSEC
	.no_dead_strip	_inv_mpu6050_init_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function inv_mpu6050_init_config
_inv_mpu6050_init_config:               ; @inv_mpu6050_init_config
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_iio_priv
	mov	x19, x0
	mov	w1, #1
	bl	_inv_mpu6050_set_power_itg
	mov	x20, x0
	cbnz	w0, LBB0_6
; %bb.1:
Lloh0:
	adrp	x8, _INV_MPU6050_FSR_2000DPS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INV_MPU6050_FSR_2000DPS@GOTPAGEOFF]
Lloh2:
	adrp	x9, _INV_MPU6050_GYRO_CONFIG_FSR_SHIFT@GOTPAGE
Lloh3:
	ldr	x9, [x9, _INV_MPU6050_GYRO_CONFIG_FSR_SHIFT@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	ldr	w9, [x9]
	lsl	w2, w8, w9
	ldr	w0, [x19, #32]
	ldr	x8, [x19, #24]
	ldr	w1, [x8, #12]
	bl	_regmap_write
	mov	x20, x0
	cbnz	w0, LBB0_5
; %bb.2:
Lloh6:
	adrp	x8, _INV_MPU6050_FILTER_20HZ@GOTPAGE
Lloh7:
	ldr	x8, [x8, _INV_MPU6050_FILTER_20HZ@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_inv_mpu6050_set_lpf_regs
	mov	x20, x0
	cbnz	w0, LBB0_5
; %bb.3:
Lloh9:
	adrp	x8, _INV_MPU6050_INIT_FIFO_RATE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _INV_MPU6050_INIT_FIFO_RATE@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	_INV_MPU6050_FIFO_RATE_TO_DIVIDER
	mov	x2, x0
	ldr	w0, [x19, #32]
	ldr	x8, [x19, #24]
	ldr	w1, [x8, #8]
	bl	_regmap_write
	mov	x20, x0
	cbnz	w0, LBB0_5
; %bb.4:
Lloh12:
	adrp	x8, _INV_MPU6050_FS_02G@GOTPAGE
Lloh13:
	ldr	x8, [x8, _INV_MPU6050_FS_02G@GOTPAGEOFF]
Lloh14:
	adrp	x9, _INV_MPU6050_ACCL_CONFIG_FSR_SHIFT@GOTPAGE
Lloh15:
	ldr	x9, [x9, _INV_MPU6050_ACCL_CONFIG_FSR_SHIFT@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	ldr	w9, [x9]
	lsl	w2, w8, w9
	ldr	w0, [x19, #32]
	ldr	x8, [x19, #24]
	ldr	w1, [x8, #4]
	bl	_regmap_write
	mov	x20, x0
	cbz	w0, LBB0_7
LBB0_5:
	mov	x0, x19
	mov	w1, #0
	bl	_inv_mpu6050_set_power_itg
LBB0_6:
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_7:
	ldr	w0, [x19, #32]
	ldr	x8, [x19, #24]
	ldr	w1, [x8]
	ldr	w2, [x19]
	bl	_regmap_write
	mov	x20, x0
	cbnz	w0, LBB0_6
; %bb.8:
	add	x0, x19, #20
Lloh18:
	adrp	x8, _hw_info@GOTPAGE
Lloh19:
	ldr	x8, [x8, _hw_info@GOTPAGEOFF]
Lloh20:
	ldr	x8, [x8]
	ldr	x9, [x19, #8]
	ldr	w1, [x8, x9, lsl #2]
	mov	w2, #4
	bl	_memcpy
Lloh21:
	adrp	x8, _NSEC_PER_MSEC@GOTPAGE
Lloh22:
	ldr	x8, [x8, _NSEC_PER_MSEC@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	str	w8, [x19, #16]
	mov	x0, x19
	mov	w1, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_inv_mpu6050_set_power_itg
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh16
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.comm	_INV_MPU6050_FSR_2000DPS,4,2    ; @INV_MPU6050_FSR_2000DPS
	.comm	_INV_MPU6050_GYRO_CONFIG_FSR_SHIFT,4,2 ; @INV_MPU6050_GYRO_CONFIG_FSR_SHIFT
	.comm	_INV_MPU6050_FILTER_20HZ,4,2    ; @INV_MPU6050_FILTER_20HZ
	.comm	_INV_MPU6050_INIT_FIFO_RATE,4,2 ; @INV_MPU6050_INIT_FIFO_RATE
	.comm	_INV_MPU6050_FS_02G,4,2         ; @INV_MPU6050_FS_02G
	.comm	_INV_MPU6050_ACCL_CONFIG_FSR_SHIFT,4,2 ; @INV_MPU6050_ACCL_CONFIG_FSR_SHIFT
	.comm	_hw_info,8,3                    ; @hw_info
	.comm	_NSEC_PER_MSEC,4,2              ; @NSEC_PER_MSEC
	.no_dead_strip	_inv_mpu6050_init_config
.subsections_via_symbols
