	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ci_request_link_speed_change_before_state_change
_ci_request_link_speed_change_before_state_change: ## @ci_request_link_speed_change_before_state_change
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r12
	movq	%rsi, %r15
	movq	%rdi, %r14
	callq	_ci_get_pi
	movq	%rax, %rbx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_ci_get_maximum_link_speed
	movl	%eax, %r15d
	movq	(%rbx), %rax
	movq	_RADEON_PCIE_GEN_INVALID@GOTPCREL(%rip), %r13
	movq	(%r13), %rcx
	cmpq	%rcx, %rax
	jne	LBB0_2
## %bb.1:
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_ci_get_maximum_link_speed
                                        ## kill: def $eax killed $eax def $rax
	movq	(%r13), %rcx
LBB0_2:
	movq	%rcx, (%rbx)
	movl	$0, 8(%rbx)
	cmpl	%eax, %r15d
	jbe	LBB0_4
## %bb.3:
	movq	%r14, %rdi
	callq	_ci_get_current_pcie_speed
	cltq
	movq	%rax, (%rbx)
	jmp	LBB0_6
LBB0_4:
	jae	LBB0_6
## %bb.5:
	movl	$1, 8(%rbx)
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_PCIE_GEN_INVALID,8,3    ## @RADEON_PCIE_GEN_INVALID
	.comm	_PCIE_PERF_REQ_PECI_GEN2,4,2    ## @PCIE_PERF_REQ_PECI_GEN2
	.comm	_PCIE_PERF_REQ_PECI_GEN3,4,2    ## @PCIE_PERF_REQ_PECI_GEN3
	.no_dead_strip	_ci_request_link_speed_change_before_state_change
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ci_request_link_speed_change_before_state_change
_ci_request_link_speed_change_before_state_change: ; @ci_request_link_speed_change_before_state_change
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x2
	mov	x21, x1
	mov	x20, x0
	bl	_ci_get_pi
	mov	x19, x0
	mov	x0, x20
	mov	x1, x21
	bl	_ci_get_maximum_link_speed
	mov	x21, x0
	ldr	x0, [x19]
Lloh0:
	adrp	x23, _RADEON_PCIE_GEN_INVALID@GOTPAGE
Lloh1:
	ldr	x23, [x23, _RADEON_PCIE_GEN_INVALID@GOTPAGEOFF]
	ldr	x8, [x23]
	cmp	x0, x8
	b.ne	LBB0_2
; %bb.1:
	mov	x0, x20
	mov	x1, x22
	bl	_ci_get_maximum_link_speed
                                        ; kill: def $w0 killed $w0 def $x0
	ldr	x8, [x23]
LBB0_2:
	str	x8, [x19]
	str	wzr, [x19, #8]
	cmp	w21, w0
	b.ls	LBB0_4
; %bb.3:
	mov	x0, x20
	bl	_ci_get_current_pcie_speed
                                        ; kill: def $w0 killed $w0 def $x0
	sxtw	x8, w0
	str	x8, [x19]
	b	LBB0_6
LBB0_4:
	b.hs	LBB0_6
; %bb.5:
	mov	w8, #1
	str	w8, [x19, #8]
LBB0_6:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_PCIE_GEN_INVALID,8,3    ; @RADEON_PCIE_GEN_INVALID
	.comm	_PCIE_PERF_REQ_PECI_GEN2,4,2    ; @PCIE_PERF_REQ_PECI_GEN2
	.comm	_PCIE_PERF_REQ_PECI_GEN3,4,2    ; @PCIE_PERF_REQ_PECI_GEN3
	.no_dead_strip	_ci_request_link_speed_change_before_state_change
.subsections_via_symbols
