	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_v11_0_hw_init
_dce_v11_0_hw_init:                     ## @dce_v11_0_hw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_dce_v11_0_init_golden_registers
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_dce_v11_0_set_vga_render_state
	movq	%r14, %rdi
	callq	_amdgpu_atombios_crtc_powergate_init
	movq	%r14, %rdi
	callq	_amdgpu_atombios_encoder_init_dig
	movq	(%r14), %rax
	movq	_CHIP_POLARIS10@GOTPCREL(%rip), %rcx
	movl	24(%r14), %esi
	cmpq	(%rcx), %rax
	je	LBB0_4
## %bb.1:
	movq	_CHIP_POLARIS11@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_4
## %bb.2:
	movq	_CHIP_POLARIS12@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_4
## %bb.3:
	movq	_CHIP_VEGAM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_4
## %bb.5:
	movq	%r14, %rdi
	callq	_amdgpu_atombios_crtc_set_disp_eng_pll
	jmp	LBB0_6
LBB0_4:
	movq	_DCE_CLOCK_TYPE_DISPCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_ATOM_GCK_DFS@GOTPCREL(%rip), %rbx
	movl	(%rbx), %ecx
	movq	%r14, %rdi
	callq	_amdgpu_atombios_crtc_set_dce_clock
	movq	_DCE_CLOCK_TYPE_DPREFCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%rbx), %ecx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_atombios_crtc_set_dce_clock
LBB0_6:
	movq	%r14, %rdi
	callq	_dce_v11_0_hpd_init
	cmpl	$0, 8(%r14)
	jle	LBB0_9
## %bb.7:
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movq	16(%r14), %rsi
	addq	%r15, %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_dce_v11_0_audio_enable
	incq	%rbx
	movslq	8(%r14), %rax
	addq	$4, %r15
	cmpq	%rax, %rbx
	jl	LBB0_8
LBB0_9:
	movq	%r14, %rdi
	callq	_dce_v11_0_pageflip_interrupt_init
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_POLARIS10,8,3             ## @CHIP_POLARIS10
	.comm	_CHIP_POLARIS11,8,3             ## @CHIP_POLARIS11
	.comm	_CHIP_POLARIS12,8,3             ## @CHIP_POLARIS12
	.comm	_CHIP_VEGAM,8,3                 ## @CHIP_VEGAM
	.comm	_DCE_CLOCK_TYPE_DISPCLK,4,2     ## @DCE_CLOCK_TYPE_DISPCLK
	.comm	_ATOM_GCK_DFS,4,2               ## @ATOM_GCK_DFS
	.comm	_DCE_CLOCK_TYPE_DPREFCLK,4,2    ## @DCE_CLOCK_TYPE_DPREFCLK
	.no_dead_strip	_dce_v11_0_hw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_v11_0_hw_init
_dce_v11_0_hw_init:                     ; @dce_v11_0_hw_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_dce_v11_0_init_golden_registers
	mov	x0, x19
	mov	w1, #0
	bl	_dce_v11_0_set_vga_render_state
	mov	x0, x19
	bl	_amdgpu_atombios_crtc_powergate_init
	mov	x0, x19
	bl	_amdgpu_atombios_encoder_init_dig
	ldr	x8, [x19]
Lloh0:
	adrp	x9, _CHIP_POLARIS10@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_POLARIS10@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
Lloh3:
	adrp	x10, _CHIP_POLARIS11@GOTPAGE
Lloh4:
	ldr	x10, [x10, _CHIP_POLARIS11@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
Lloh6:
	adrp	x11, _CHIP_POLARIS12@GOTPAGE
Lloh7:
	ldr	x11, [x11, _CHIP_POLARIS12@GOTPAGEOFF]
Lloh8:
	ldr	x11, [x11]
Lloh9:
	adrp	x12, _CHIP_VEGAM@GOTPAGE
Lloh10:
	ldr	x12, [x12, _CHIP_VEGAM@GOTPAGEOFF]
Lloh11:
	ldr	x12, [x12]
	ldr	w1, [x19, #24]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	ccmp	x8, x11, #4, ne
	ccmp	x8, x12, #4, ne
	b.ne	LBB0_2
; %bb.1:
Lloh12:
	adrp	x8, _DCE_CLOCK_TYPE_DISPCLK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _DCE_CLOCK_TYPE_DISPCLK@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
Lloh15:
	adrp	x20, _ATOM_GCK_DFS@GOTPAGE
Lloh16:
	ldr	x20, [x20, _ATOM_GCK_DFS@GOTPAGEOFF]
	ldr	w3, [x20]
	mov	x0, x19
	bl	_amdgpu_atombios_crtc_set_dce_clock
Lloh17:
	adrp	x8, _DCE_CLOCK_TYPE_DPREFCLK@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DCE_CLOCK_TYPE_DPREFCLK@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	ldr	w3, [x20]
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_atombios_crtc_set_dce_clock
	b	LBB0_3
LBB0_2:
	mov	x0, x19
	bl	_amdgpu_atombios_crtc_set_disp_eng_pll
LBB0_3:
	mov	x0, x19
	bl	_dce_v11_0_hpd_init
	ldr	w8, [x19, #8]
	cmp	w8, #1
	b.lt	LBB0_6
; %bb.4:
	mov	x20, #0
	mov	x21, #0
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #16]
	add	x1, x8, x20
	mov	x0, x19
	mov	w2, #0
	bl	_dce_v11_0_audio_enable
	add	x21, x21, #1
	ldrsw	x8, [x19, #8]
	add	x20, x20, #4
	cmp	x21, x8
	b.lt	LBB0_5
LBB0_6:
	mov	x0, x19
	bl	_dce_v11_0_pageflip_interrupt_init
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_POLARIS10,8,3             ; @CHIP_POLARIS10
	.comm	_CHIP_POLARIS11,8,3             ; @CHIP_POLARIS11
	.comm	_CHIP_POLARIS12,8,3             ; @CHIP_POLARIS12
	.comm	_CHIP_VEGAM,8,3                 ; @CHIP_VEGAM
	.comm	_DCE_CLOCK_TYPE_DISPCLK,4,2     ; @DCE_CLOCK_TYPE_DISPCLK
	.comm	_ATOM_GCK_DFS,4,2               ; @ATOM_GCK_DFS
	.comm	_DCE_CLOCK_TYPE_DPREFCLK,4,2    ; @DCE_CLOCK_TYPE_DPREFCLK
	.no_dead_strip	_dce_v11_0_hw_init
.subsections_via_symbols
