	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function psp_np_fw_load
_psp_np_fw_load:                        ## @psp_np_fw_load
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	8(%rdi), %r15
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	cmpq	$0, (%rdi)
	je	LBB0_3
## %bb.1:
	movq	16(%r15), %rsi
	movq	_AMDGPU_UCODE_ID_SMC@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	shlq	$4, %rax
	cmpl	$0, 8(%rsi,%rax)
	je	LBB0_3
## %bb.2:
	addq	%rax, %rsi
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_psp_execute_np_fw_load
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	LBB0_31
LBB0_3:
	cmpl	$0, 8(%r15)
	jle	LBB0_30
## %bb.4:
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_5 Depth=1
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_psp_smu_reload_quirk
	testq	%rax, %rax
	je	LBB0_8
	.p2align	4, 0x90
LBB0_29:                                ##   in Loop: Header=BB0_5 Depth=1
	incq	%r13
	movslq	8(%r15), %rax
	addq	$16, %rbx
	cmpq	%rax, %r13
	jge	LBB0_30
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	16(%r15), %r14
	cmpl	$0, 8(%r14,%rbx)
	je	LBB0_29
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movq	(%r14,%rbx), %rax
	movq	_AMDGPU_UCODE_ID_SMC@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_7
LBB0_9:                                 ##   in Loop: Header=BB0_5 Depth=1
	movq	%r15, %rdi
	callq	_amdgpu_sriov_vf
	testq	%rax, %rax
	je	LBB0_19
## %bb.10:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	(%r14,%rbx), %rax
	movq	_AMDGPU_UCODE_ID_SDMA0@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
## %bb.11:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	_AMDGPU_UCODE_ID_SDMA1@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
## %bb.12:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	_AMDGPU_UCODE_ID_SDMA2@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
## %bb.13:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	_AMDGPU_UCODE_ID_SDMA3@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
## %bb.14:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	_AMDGPU_UCODE_ID_SDMA4@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
## %bb.15:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	_AMDGPU_UCODE_ID_SDMA5@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
## %bb.16:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	_AMDGPU_UCODE_ID_SDMA6@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
## %bb.17:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	_AMDGPU_UCODE_ID_SDMA7@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
## %bb.18:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	_AMDGPU_UCODE_ID_RLC_G@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
LBB0_19:                                ##   in Loop: Header=BB0_5 Depth=1
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	cmpq	$0, (%rax)
	je	LBB0_22
## %bb.20:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	(%r14,%rbx), %rax
	movq	_AMDGPU_UCODE_ID_CP_MEC1_JT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
## %bb.21:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	_AMDGPU_UCODE_ID_CP_MEC2_JT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
LBB0_22:                                ##   in Loop: Header=BB0_5 Depth=1
	movq	(%r15), %rax
	movq	_CHIP_RENOIR@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_24
## %bb.23:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	(%r14,%rbx), %rax
	movq	_AMDGPU_UCODE_ID_CP_MEC2_JT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_29
LBB0_24:                                ##   in Loop: Header=BB0_5 Depth=1
	leaq	(%r14,%rbx), %rsi
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	movq	%r12, %rdi
	callq	_psp_print_fw_hdr
	movq	%r12, %rdi
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	callq	_psp_execute_np_fw_load
	testl	%eax, %eax
	jne	LBB0_25
## %bb.26:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	(%r14,%rbx), %rax
	movq	_AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_29
## %bb.27:                              ##   in Loop: Header=BB0_5 Depth=1
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_psp_rlc_autoload
	testl	%eax, %eax
	je	LBB0_29
	jmp	LBB0_28
LBB0_8:                                 ##   in Loop: Header=BB0_5 Depth=1
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	cmpq	$0, (%rax)
	jne	LBB0_29
	jmp	LBB0_9
LBB0_30:
	xorl	%r12d, %r12d
LBB0_31:
	movl	%r12d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_25:
	movl	%eax, %r12d
	jmp	LBB0_31
LBB0_28:
	movl	%eax, %r12d
	leaq	L_.str(%rip), %rdi
	callq	_DRM_ERROR
	jmp	LBB0_31
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_UCODE_ID_SMC,8,3        ## @AMDGPU_UCODE_ID_SMC
	.comm	_AMDGPU_UCODE_ID_SDMA0,8,3      ## @AMDGPU_UCODE_ID_SDMA0
	.comm	_AMDGPU_UCODE_ID_SDMA1,8,3      ## @AMDGPU_UCODE_ID_SDMA1
	.comm	_AMDGPU_UCODE_ID_SDMA2,8,3      ## @AMDGPU_UCODE_ID_SDMA2
	.comm	_AMDGPU_UCODE_ID_SDMA3,8,3      ## @AMDGPU_UCODE_ID_SDMA3
	.comm	_AMDGPU_UCODE_ID_SDMA4,8,3      ## @AMDGPU_UCODE_ID_SDMA4
	.comm	_AMDGPU_UCODE_ID_SDMA5,8,3      ## @AMDGPU_UCODE_ID_SDMA5
	.comm	_AMDGPU_UCODE_ID_SDMA6,8,3      ## @AMDGPU_UCODE_ID_SDMA6
	.comm	_AMDGPU_UCODE_ID_SDMA7,8,3      ## @AMDGPU_UCODE_ID_SDMA7
	.comm	_AMDGPU_UCODE_ID_RLC_G,8,3      ## @AMDGPU_UCODE_ID_RLC_G
	.comm	_AMDGPU_UCODE_ID_CP_MEC1_JT,8,3 ## @AMDGPU_UCODE_ID_CP_MEC1_JT
	.comm	_AMDGPU_UCODE_ID_CP_MEC2_JT,8,3 ## @AMDGPU_UCODE_ID_CP_MEC2_JT
	.comm	_CHIP_RENOIR,8,3                ## @CHIP_RENOIR
	.comm	_AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM,8,3 ## @AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to start rlc autoload\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_psp_np_fw_load
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function psp_np_fw_load
_psp_np_fw_load:                        ; @psp_np_fw_load
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldp	x8, x20, [x0]
Lloh0:
	adrp	x22, _AMDGPU_UCODE_ID_SMC@GOTPAGE
Lloh1:
	ldr	x22, [x22, _AMDGPU_UCODE_ID_SMC@GOTPAGEOFF]
	cbz	x8, LBB0_3
; %bb.1:
	ldr	x8, [x20, #16]
	ldr	x9, [x22]
	add	x1, x8, x9, lsl #4
	ldr	w8, [x1, #8]
	cbz	w8, LBB0_3
; %bb.2:
	mov	x0, x19
	bl	_psp_execute_np_fw_load
	mov	x21, x0
	cbnz	w0, LBB0_28
LBB0_3:
	ldr	w8, [x20, #8]
	cmp	w8, #1
	b.lt	LBB0_27
; %bb.4:
	mov	x23, #0
	mov	x24, #0
Lloh2:
	adrp	x26, _AMDGPU_UCODE_ID_CP_MEC2_JT@GOTPAGE
Lloh3:
	ldr	x26, [x26, _AMDGPU_UCODE_ID_CP_MEC2_JT@GOTPAGEOFF]
Lloh4:
	adrp	x27, _AMDGPU_UCODE_ID_SDMA3@GOTPAGE
Lloh5:
	ldr	x27, [x27, _AMDGPU_UCODE_ID_SDMA3@GOTPAGEOFF]
Lloh6:
	adrp	x28, _AMDGPU_UCODE_ID_SDMA4@GOTPAGE
Lloh7:
	ldr	x28, [x28, _AMDGPU_UCODE_ID_SDMA4@GOTPAGEOFF]
	b	LBB0_7
LBB0_5:                                 ;   in Loop: Header=BB0_7 Depth=1
	mov	x0, x19
	bl	_psp_smu_reload_quirk
	cbz	x0, LBB0_26
LBB0_6:                                 ;   in Loop: Header=BB0_7 Depth=1
	add	x24, x24, #1
	ldrsw	x8, [x20, #8]
	add	x23, x23, #16
	cmp	x24, x8
	b.ge	LBB0_27
LBB0_7:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x25, [x20, #16]
	add	x21, x25, x23
	ldr	w8, [x21, #8]
	cbz	w8, LBB0_6
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	ldr	x8, [x25, x23]
	ldr	x9, [x22]
	cmp	x8, x9
	b.eq	LBB0_5
LBB0_9:                                 ;   in Loop: Header=BB0_7 Depth=1
	mov	x0, x20
	bl	_amdgpu_sriov_vf
	cbz	x0, LBB0_19
; %bb.10:                               ;   in Loop: Header=BB0_7 Depth=1
	ldr	x8, [x25, x23]
Lloh8:
	adrp	x9, _AMDGPU_UCODE_ID_SDMA0@GOTPAGE
Lloh9:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_SDMA0@GOTPAGEOFF]
Lloh10:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_6
; %bb.11:                               ;   in Loop: Header=BB0_7 Depth=1
Lloh11:
	adrp	x9, _AMDGPU_UCODE_ID_SDMA1@GOTPAGE
Lloh12:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_SDMA1@GOTPAGEOFF]
Lloh13:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_6
; %bb.12:                               ;   in Loop: Header=BB0_7 Depth=1
Lloh14:
	adrp	x9, _AMDGPU_UCODE_ID_SDMA2@GOTPAGE
Lloh15:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_SDMA2@GOTPAGEOFF]
Lloh16:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_6
; %bb.13:                               ;   in Loop: Header=BB0_7 Depth=1
	ldr	x9, [x27]
	cmp	x8, x9
	b.eq	LBB0_6
; %bb.14:                               ;   in Loop: Header=BB0_7 Depth=1
	ldr	x9, [x28]
	cmp	x8, x9
	b.eq	LBB0_6
; %bb.15:                               ;   in Loop: Header=BB0_7 Depth=1
Lloh17:
	adrp	x9, _AMDGPU_UCODE_ID_SDMA5@GOTPAGE
Lloh18:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_SDMA5@GOTPAGEOFF]
Lloh19:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_6
; %bb.16:                               ;   in Loop: Header=BB0_7 Depth=1
Lloh20:
	adrp	x9, _AMDGPU_UCODE_ID_SDMA6@GOTPAGE
Lloh21:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_SDMA6@GOTPAGEOFF]
Lloh22:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_6
; %bb.17:                               ;   in Loop: Header=BB0_7 Depth=1
Lloh23:
	adrp	x9, _AMDGPU_UCODE_ID_SDMA7@GOTPAGE
Lloh24:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_SDMA7@GOTPAGEOFF]
Lloh25:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_6
; %bb.18:                               ;   in Loop: Header=BB0_7 Depth=1
Lloh26:
	adrp	x9, _AMDGPU_UCODE_ID_RLC_G@GOTPAGE
Lloh27:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_RLC_G@GOTPAGEOFF]
Lloh28:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_6
LBB0_19:                                ;   in Loop: Header=BB0_7 Depth=1
	ldr	x8, [x19]
	cbz	x8, LBB0_21
; %bb.20:                               ;   in Loop: Header=BB0_7 Depth=1
	ldr	x8, [x25, x23]
Lloh29:
	adrp	x9, _AMDGPU_UCODE_ID_CP_MEC1_JT@GOTPAGE
Lloh30:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_CP_MEC1_JT@GOTPAGEOFF]
Lloh31:
	ldr	x9, [x9]
	ldr	x10, [x26]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	b.eq	LBB0_6
LBB0_21:                                ;   in Loop: Header=BB0_7 Depth=1
	ldr	x8, [x20]
Lloh32:
	adrp	x9, _CHIP_RENOIR@GOTPAGE
Lloh33:
	ldr	x9, [x9, _CHIP_RENOIR@GOTPAGEOFF]
Lloh34:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_23
; %bb.22:                               ;   in Loop: Header=BB0_7 Depth=1
	ldr	x8, [x25, x23]
	ldr	x9, [x26]
	cmp	x8, x9
	b.eq	LBB0_6
LBB0_23:                                ;   in Loop: Header=BB0_7 Depth=1
	mov	x0, x19
	mov	x1, x21
	bl	_psp_print_fw_hdr
	mov	x0, x19
	mov	x1, x21
	bl	_psp_execute_np_fw_load
	cbnz	w0, LBB0_29
; %bb.24:                               ;   in Loop: Header=BB0_7 Depth=1
	ldr	x8, [x25, x23]
Lloh35:
	adrp	x9, _AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM@GOTPAGE
Lloh36:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM@GOTPAGEOFF]
Lloh37:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_6
; %bb.25:                               ;   in Loop: Header=BB0_7 Depth=1
	mov	x0, x19
	bl	_psp_rlc_autoload
	cbz	w0, LBB0_6
	b	LBB0_30
LBB0_26:                                ;   in Loop: Header=BB0_7 Depth=1
	ldr	x8, [x19]
	cbnz	x8, LBB0_6
	b	LBB0_9
LBB0_27:
	mov	w21, #0
LBB0_28:
	mov	x0, x21
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_29:
	mov	x21, x0
	b	LBB0_28
LBB0_30:
	mov	x21, x0
Lloh38:
	adrp	x0, l_.str@PAGE
Lloh39:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_28
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpAdd	Lloh38, Lloh39
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_UCODE_ID_SMC,8,3        ; @AMDGPU_UCODE_ID_SMC
	.comm	_AMDGPU_UCODE_ID_SDMA0,8,3      ; @AMDGPU_UCODE_ID_SDMA0
	.comm	_AMDGPU_UCODE_ID_SDMA1,8,3      ; @AMDGPU_UCODE_ID_SDMA1
	.comm	_AMDGPU_UCODE_ID_SDMA2,8,3      ; @AMDGPU_UCODE_ID_SDMA2
	.comm	_AMDGPU_UCODE_ID_SDMA3,8,3      ; @AMDGPU_UCODE_ID_SDMA3
	.comm	_AMDGPU_UCODE_ID_SDMA4,8,3      ; @AMDGPU_UCODE_ID_SDMA4
	.comm	_AMDGPU_UCODE_ID_SDMA5,8,3      ; @AMDGPU_UCODE_ID_SDMA5
	.comm	_AMDGPU_UCODE_ID_SDMA6,8,3      ; @AMDGPU_UCODE_ID_SDMA6
	.comm	_AMDGPU_UCODE_ID_SDMA7,8,3      ; @AMDGPU_UCODE_ID_SDMA7
	.comm	_AMDGPU_UCODE_ID_RLC_G,8,3      ; @AMDGPU_UCODE_ID_RLC_G
	.comm	_AMDGPU_UCODE_ID_CP_MEC1_JT,8,3 ; @AMDGPU_UCODE_ID_CP_MEC1_JT
	.comm	_AMDGPU_UCODE_ID_CP_MEC2_JT,8,3 ; @AMDGPU_UCODE_ID_CP_MEC2_JT
	.comm	_CHIP_RENOIR,8,3                ; @CHIP_RENOIR
	.comm	_AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM,8,3 ; @AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to start rlc autoload\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_psp_np_fw_load
.subsections_via_symbols
