	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function __vmw_svga_disable
___vmw_svga_disable:                    ## @__vmw_svga_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	callq	_spin_lock
	movq	8(%rbx), %rax
	movq	_TTM_PL_VRAM@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	cmpl	$0, (%rax,%rcx,4)
	je	LBB0_2
## %bb.1:
	movl	$0, (%rax,%rcx,4)
	movq	_SVGA_REG_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SVGA_REG_ENABLE_HIDE@GOTPCREL(%rip), %rax
	movq	_SVGA_REG_ENABLE_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_vmw_write
LBB0_2:
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_spin_unlock                    ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_TTM_PL_VRAM,8,3                ## @TTM_PL_VRAM
	.comm	_SVGA_REG_ENABLE,4,2            ## @SVGA_REG_ENABLE
	.comm	_SVGA_REG_ENABLE_HIDE,4,2       ## @SVGA_REG_ENABLE_HIDE
	.comm	_SVGA_REG_ENABLE_ENABLE,4,2     ## @SVGA_REG_ENABLE_ENABLE
	.no_dead_strip	___vmw_svga_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function __vmw_svga_disable
___vmw_svga_disable:                    ; @__vmw_svga_disable
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_spin_lock
	ldr	x8, [x19, #8]
Lloh0:
	adrp	x9, _TTM_PL_VRAM@GOTPAGE
Lloh1:
	ldr	x9, [x9, _TTM_PL_VRAM@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	ldr	w10, [x8, x9, lsl #2]
	cbz	w10, LBB0_2
; %bb.1:
	str	wzr, [x8, x9, lsl #2]
Lloh3:
	adrp	x8, _SVGA_REG_ENABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SVGA_REG_ENABLE@GOTPAGEOFF]
Lloh5:
	adrp	x9, _SVGA_REG_ENABLE_HIDE@GOTPAGE
Lloh6:
	ldr	x9, [x9, _SVGA_REG_ENABLE_HIDE@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
Lloh8:
	ldr	w8, [x9]
Lloh9:
	adrp	x9, _SVGA_REG_ENABLE_ENABLE@GOTPAGE
Lloh10:
	ldr	x9, [x9, _SVGA_REG_ENABLE_ENABLE@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_vmw_write
LBB0_2:
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_spin_unlock
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_TTM_PL_VRAM,8,3                ; @TTM_PL_VRAM
	.comm	_SVGA_REG_ENABLE,4,2            ; @SVGA_REG_ENABLE
	.comm	_SVGA_REG_ENABLE_HIDE,4,2       ; @SVGA_REG_ENABLE_HIDE
	.comm	_SVGA_REG_ENABLE_ENABLE,4,2     ; @SVGA_REG_ENABLE_ENABLE
	.no_dead_strip	___vmw_svga_disable
.subsections_via_symbols
