	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ipu_di_config_clock
_ipu_di_config_clock:                   ## @ipu_di_config_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	(%rsi), %eax
	movq	_IPU_DI_CLKMODE_EXT@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_2
## %bb.1:
	movq	8(%rbx), %r13
	movq	_IPU_DI_CLKMODE_SYNC@GOTPCREL(%rip), %rcx
	movl	$16, %r15d
	testl	%eax, (%rcx)
	jne	LBB0_9
	jmp	LBB0_7
LBB0_2:
	movq	16(%rbx), %rdi
	callq	_clk_get_rate
	movl	%eax, %r13d
	movl	%eax, %edi
	movl	4(%r14), %esi
	callq	_DIV_ROUND_CLOSEST
	movl	%eax, %edi
	movl	$1, %esi
	movl	$255, %edx
	callq	_clamp
	movl	%eax, %r15d
	xorl	%r12d, %r12d
	movl	%r13d, %eax
	xorl	%edx, %edx
	divl	%r15d
	movl	%eax, %ecx
	movslq	4(%r14), %rax
	imulq	$274877907, %rax, %rsi          ## imm = 0x10624DD3
	movq	%rsi, %rax
	shrq	$63, %rax
	sarq	$38, %rsi
	addl	%eax, %esi
	movslq	%esi, %rax
	cmpq	%rax, %rcx
	jb	LBB0_4
## %bb.3:
	movl	%ecx, %eax
	xorl	%edx, %edx
	divl	%esi
	movl	%eax, %r12d
LBB0_4:
	movq	24(%rbx), %rax
	movl	(%rax), %edi
	leal	-1000(%r12), %eax
	cltq
	imulq	$1717986919, %rax, %r8          ## imm = 0x66666667
	movq	%r8, %rax
	shrq	$63, %rax
	sarq	$34, %r8
	addl	%eax, %r8d
	movl	$3435973837, %eax               ## imm = 0xCCCCCCCD
	imulq	%r12, %rax
	shrq	$35, %rax
	addl	%eax, %eax
	leal	(%rax,%rax,4), %eax
	movl	%r12d, %r9d
	subl	%eax, %r9d
	leaq	L_.str(%rip), %rsi
	movl	%ecx, %edx
	movl	%r15d, %ecx
                                        ## kill: def $r8d killed $r8d killed $r8
	xorl	%eax, %eax
	callq	_dev_dbg
	leal	-990(%r12), %eax
	cmpl	$19, %eax
	ja	LBB0_6
## %bb.5:
	movq	16(%rbx), %r13
	jmp	LBB0_8
LBB0_6:
	movq	8(%rbx), %r13
LBB0_7:
	movl	4(%r14), %esi
	movq	%r13, %rdi
	callq	_clk_set_rate
	movq	%r13, %rdi
	callq	_clk_get_rate
	movl	%eax, %edi
	movl	4(%r14), %esi
	callq	_DIV_ROUND_CLOSEST
	movl	%eax, %edi
	movl	$1, %esi
	movl	$255, %edx
	callq	_clamp
	movl	%eax, %r15d
LBB0_8:
	shll	$4, %r15d
LBB0_9:
	movq	%r13, (%rbx)
	movq	_DI_BS_CLKGEN0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_ipu_di_write
	movl	%r15d, %esi
	shll	$12, %esi
	movq	_DI_BS_CLKGEN1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_ipu_di_write
	movq	_DI_GENERAL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_ipu_di_read
	movq	_DI_GEN_DI_CLK_EXT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%esi, %ecx
	notl	%ecx
	andl	%eax, %ecx
	orl	%eax, %esi
	cmpq	8(%rbx), %r13
	cmovnel	%ecx, %esi
	shrl	$4, %r15d
	movl	(%r12), %edx
	movq	%rbx, %rdi
	callq	_ipu_di_write
	movq	16(%rbx), %rdi
	movq	24(%rbx), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	4(%r14), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	callq	_clk_get_rate
	movl	%eax, %r12d
	movq	8(%rbx), %rdi
	callq	_clk_get_rate
	movl	%eax, %r14d
	cmpq	8(%rbx), %r13
	leaq	L_.str.2(%rip), %rax
	leaq	L_.str.3(%rip), %r13
	cmoveq	%rax, %r13
	movq	(%rbx), %rdi
	callq	_clk_get_rate
	xorl	%edx, %edx
	divl	%r15d
	movl	%eax, (%rsp)
	leaq	L_.str.1(%rip), %rsi
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	movl	%r12d, %ecx
	movl	%r14d, %r8d
	movq	%r13, %r9
	xorl	%eax, %eax
	callq	_dev_dbg
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_IPU_DI_CLKMODE_EXT,4,2         ## @IPU_DI_CLKMODE_EXT
	.comm	_IPU_DI_CLKMODE_SYNC,4,2        ## @IPU_DI_CLKMODE_SYNC
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"  IPU clock can give %lu with divider %u, error %d.%u%%\n"

	.comm	_DI_BS_CLKGEN0,4,2              ## @DI_BS_CLKGEN0
	.comm	_DI_BS_CLKGEN1,4,2              ## @DI_BS_CLKGEN1
	.comm	_DI_GENERAL,4,2                 ## @DI_GENERAL
	.comm	_DI_GEN_DI_CLK_EXT,4,2          ## @DI_GEN_DI_CLK_EXT
L_.str.1:                               ## @.str.1
	.asciz	"Want %luHz IPU %luHz DI %luHz using %s, %luHz\n"

L_.str.2:                               ## @.str.2
	.asciz	"DI"

L_.str.3:                               ## @.str.3
	.asciz	"IPU"

	.no_dead_strip	_ipu_di_config_clock
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ipu_di_config_clock
_ipu_di_config_clock:                   ; @ipu_di_config_clock
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x1
	mov	x19, x0
	ldr	w8, [x1]
Lloh0:
	adrp	x9, _IPU_DI_CLKMODE_EXT@GOTPAGE
Lloh1:
	ldr	x9, [x9, _IPU_DI_CLKMODE_EXT@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.1:
	ldr	x21, [x19, #8]
Lloh3:
	adrp	x9, _IPU_DI_CLKMODE_SYNC@GOTPAGE
Lloh4:
	ldr	x9, [x9, _IPU_DI_CLKMODE_SYNC@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_5
; %bb.2:
	mov	w22, #16
	b	LBB0_8
LBB0_3:
	ldr	x0, [x19, #16]
	bl	_clk_get_rate
	mov	x21, x0
	mov	w0, w0
	ldr	w1, [x20, #4]
	bl	_DIV_ROUND_CLOSEST
	mov	w1, #1
	mov	w2, #255
	bl	_clamp
	mov	x22, x0
	udiv	w2, w21, w0
	ldrsw	x8, [x20, #4]
	mov	w9, #19923
	movk	w9, #4194, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #38
	add	w8, w8, w9
	sxtw	x8, w8
	udiv	x21, x2, x8
	ldr	x8, [x19, #24]
	ldr	w0, [x8]
	sub	w8, w21, #1000
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	smull	x8, w8, w9
	lsr	x9, x8, #63
	asr	x8, x8, #34
	add	w4, w8, w9
	mov	w8, #52429
	movk	w8, #52428, lsl #16
	mul	x8, x21, x8
	lsr	x8, x8, #35
	mov	w9, #10
	msub	w8, w8, w9, w21
Lloh6:
	adrp	x1, l_.str@PAGE
Lloh7:
	add	x1, x1, l_.str@PAGEOFF
	str	x8, [sp]
                                        ; kill: def $w2 killed $w2 killed $x2
	mov	x3, x22
	bl	_dev_dbg
	sub	w8, w21, #990
	cmp	w8, #19
	b.hi	LBB0_6
; %bb.4:
	ldr	x21, [x19, #16]
	b	LBB0_7
LBB0_5:
	ldr	w1, [x20, #4]
	mov	x0, x21
	bl	_clk_set_rate
	mov	x0, x21
	bl	_clk_get_rate
	mov	w0, w0
	ldr	w1, [x20, #4]
	bl	_DIV_ROUND_CLOSEST
	mov	w1, #1
	mov	w2, #255
	bl	_clamp
	lsl	w22, w0, #4
	b	LBB0_8
LBB0_6:
	ldr	x21, [x19, #8]
	ldr	w1, [x20, #4]
	mov	x0, x21
	bl	_clk_set_rate
	mov	x0, x21
	bl	_clk_get_rate
	mov	w0, w0
	ldr	w1, [x20, #4]
	bl	_DIV_ROUND_CLOSEST
	mov	w1, #1
	mov	w2, #255
	bl	_clamp
	mov	x22, x0
LBB0_7:
	lsl	w22, w22, #4
LBB0_8:
	str	x21, [x19]
Lloh8:
	adrp	x8, _DI_BS_CLKGEN0@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DI_BS_CLKGEN0@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x22
	bl	_ipu_di_write
	lsl	w1, w22, #12
Lloh11:
	adrp	x8, _DI_BS_CLKGEN1@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DI_BS_CLKGEN1@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ipu_di_write
Lloh14:
	adrp	x23, _DI_GENERAL@GOTPAGE
Lloh15:
	ldr	x23, [x23, _DI_GENERAL@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	bl	_ipu_di_read
Lloh16:
	adrp	x8, _DI_GEN_DI_CLK_EXT@GOTPAGE
Lloh17:
	ldr	x8, [x8, _DI_GEN_DI_CLK_EXT@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	bic	w9, w0, w8
	ldr	x10, [x19, #8]
	orr	w8, w8, w0
	cmp	x21, x10
	csel	w1, w8, w9, eq
	lsr	w25, w22, #4
	ldr	w2, [x23]
	mov	x0, x19
	bl	_ipu_di_write
	ldp	x0, x8, [x19, #16]
	ldr	w22, [x8]
	ldr	w20, [x20, #4]
	bl	_clk_get_rate
	mov	x23, x0
	ldr	x0, [x19, #8]
	bl	_clk_get_rate
	mov	x24, x0
Lloh19:
	adrp	x8, l_.str.3@PAGE
Lloh20:
	add	x8, x8, l_.str.3@PAGEOFF
Lloh21:
	adrp	x9, l_.str.2@PAGE
Lloh22:
	add	x9, x9, l_.str.2@PAGEOFF
	ldp	x0, x10, [x19]
	cmp	x21, x10
	csel	x19, x9, x8, eq
	bl	_clk_get_rate
	udiv	w8, w0, w25
Lloh23:
	adrp	x1, l_.str.1@PAGE
Lloh24:
	add	x1, x1, l_.str.1@PAGEOFF
	stp	x19, x8, [sp]
	mov	x0, x22
	mov	x2, x20
	mov	x3, x23
	mov	x4, x24
	bl	_dev_dbg
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_IPU_DI_CLKMODE_EXT,4,2         ; @IPU_DI_CLKMODE_EXT
	.comm	_IPU_DI_CLKMODE_SYNC,4,2        ; @IPU_DI_CLKMODE_SYNC
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"  IPU clock can give %lu with divider %u, error %d.%u%%\n"

	.comm	_DI_BS_CLKGEN0,4,2              ; @DI_BS_CLKGEN0
	.comm	_DI_BS_CLKGEN1,4,2              ; @DI_BS_CLKGEN1
	.comm	_DI_GENERAL,4,2                 ; @DI_GENERAL
	.comm	_DI_GEN_DI_CLK_EXT,4,2          ; @DI_GEN_DI_CLK_EXT
l_.str.1:                               ; @.str.1
	.asciz	"Want %luHz IPU %luHz DI %luHz using %s, %luHz\n"

l_.str.2:                               ; @.str.2
	.asciz	"DI"

l_.str.3:                               ; @.str.3
	.asciz	"IPU"

	.no_dead_strip	_ipu_di_config_clock
.subsections_via_symbols
