	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vtg_set_mode
_vtg_set_mode:                          ## @vtg_set_mode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r12
	movq	%rdx, %r13
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movq	%rdi, %r15
	movl	(%rcx), %edi
	movq	_VTG_CLKLN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%r15), %rsi
	callq	_writel
	movl	4(%r12), %edi
	addl	%edi, %edi
	movq	_VTG_HLFLN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%r15), %rsi
	callq	_writel
	movq	(%r15), %rdi
	movq	%r12, %rsi
	callq	_vtg_set_output_window
	movq	_VTG_SYNC_ID_HDMI@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%rax,%rax,4), %rax
	leaq	-20(,%rax,4), %rdi
	addq	%r13, %rdi
	movq	_HDMI_DELAY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdx
	callq	_vtg_set_hsync_vsync_pos
	movq	_VTG_SYNC_ID_HDDCS@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%rax,%rax,4), %rax
	leaq	-20(,%rax,4), %rdi
	addq	%r13, %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	callq	_vtg_set_hsync_vsync_pos
	movq	_VTG_SYNC_ID_HDF@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%rax,%rax,4), %rax
	leaq	-20(,%rax,4), %rdi
	addq	%r13, %rdi
	movq	_AWG_DELAY_HD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdx
	callq	_vtg_set_hsync_vsync_pos
	movq	_VTG_SYNC_ID_DVO@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	leaq	(%rax,%rax,4), %rax
	leaq	-20(,%rax,4), %rdi
	addq	%r13, %rdi
	movq	_DVO_DELAY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdx
	callq	_vtg_set_hsync_vsync_pos
	movq	_VTG_MAX_SYNC_OUTPUT@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	je	LBB0_3
## %bb.1:
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r13,%rbx), %edi
	movq	%r13, %r12
	movq	%r15, %r13
	movq	_vtg_regs_offs@GOTPCREL(%rip), %r15
	movq	(%r15), %rax
	movq	32(%rax,%rbx,2), %rsi
	addq	(%r13), %rsi
	callq	_writel
	movl	4(%r12,%rbx), %edi
	movq	(%r15), %rax
	movq	24(%rax,%rbx,2), %rsi
	addq	(%r13), %rsi
	callq	_writel
	movl	8(%r12,%rbx), %edi
	movq	(%r15), %rax
	movq	16(%rax,%rbx,2), %rsi
	addq	(%r13), %rsi
	callq	_writel
	movl	12(%r12,%rbx), %edi
	movq	(%r15), %rax
	movq	8(%rax,%rbx,2), %rsi
	addq	(%r13), %rsi
	callq	_writel
	movl	16(%r12,%rbx), %edi
	movq	(%r15), %rax
	movq	%r13, %r15
	movq	%r12, %r13
	movq	(%rax,%rbx,2), %rsi
	addq	(%r15), %rsi
	callq	_writel
	movq	_VTG_MAX_SYNC_OUTPUT@GOTPCREL(%rip), %rax
	incq	%r14
	movl	(%rax), %eax
	addq	$20, %rbx
	cmpq	%rax, %r14
	jb	LBB0_2
LBB0_3:
	movq	_VTG_MODE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%r15), %rsi
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_writel                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VTG_CLKLN,8,3                  ## @VTG_CLKLN
	.comm	_VTG_HLFLN,8,3                  ## @VTG_HLFLN
	.comm	_VTG_SYNC_ID_HDMI,4,2           ## @VTG_SYNC_ID_HDMI
	.comm	_HDMI_DELAY,4,2                 ## @HDMI_DELAY
	.comm	_VTG_SYNC_ID_HDDCS,4,2          ## @VTG_SYNC_ID_HDDCS
	.comm	_VTG_SYNC_ID_HDF,4,2            ## @VTG_SYNC_ID_HDF
	.comm	_AWG_DELAY_HD,4,2               ## @AWG_DELAY_HD
	.comm	_VTG_SYNC_ID_DVO,4,2            ## @VTG_SYNC_ID_DVO
	.comm	_DVO_DELAY,4,2                  ## @DVO_DELAY
	.comm	_VTG_MAX_SYNC_OUTPUT,4,2        ## @VTG_MAX_SYNC_OUTPUT
	.comm	_vtg_regs_offs,8,3              ## @vtg_regs_offs
	.comm	_VTG_MODE,8,3                   ## @VTG_MODE
	.no_dead_strip	_vtg_set_mode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vtg_set_mode
_vtg_set_mode:                          ; @vtg_set_mode
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x3
	mov	x21, x2
	mov	x19, x1
	mov	x20, x0
	ldr	w0, [x3]
	ldr	x8, [x20]
Lloh0:
	adrp	x9, _VTG_CLKLN@GOTPAGE
Lloh1:
	ldr	x9, [x9, _VTG_CLKLN@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	w8, [x22, #4]
	lsl	w0, w8, #1
	ldr	x8, [x20]
Lloh3:
	adrp	x9, _VTG_HLFLN@GOTPAGE
Lloh4:
	ldr	x9, [x9, _VTG_HLFLN@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	x0, [x20]
	mov	x1, x22
	bl	_vtg_set_output_window
Lloh6:
	adrp	x8, _VTG_SYNC_ID_HDMI@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VTG_SYNC_ID_HDMI@GOTPAGEOFF]
Lloh8:
	ldrsw	x8, [x8]
	mov	w23, #20
	madd	x8, x8, x23, x21
	sub	x0, x8, #20
Lloh9:
	adrp	x8, _HDMI_DELAY@GOTPAGE
Lloh10:
	ldr	x8, [x8, _HDMI_DELAY@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x2, x22
	bl	_vtg_set_hsync_vsync_pos
Lloh12:
	adrp	x8, _VTG_SYNC_ID_HDDCS@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VTG_SYNC_ID_HDDCS@GOTPAGEOFF]
Lloh14:
	ldrsw	x8, [x8]
	madd	x8, x8, x23, x21
	sub	x0, x8, #20
	mov	w1, #0
	mov	x2, x22
	bl	_vtg_set_hsync_vsync_pos
Lloh15:
	adrp	x8, _VTG_SYNC_ID_HDF@GOTPAGE
Lloh16:
	ldr	x8, [x8, _VTG_SYNC_ID_HDF@GOTPAGEOFF]
Lloh17:
	ldrsw	x8, [x8]
	madd	x8, x8, x23, x21
	sub	x0, x8, #20
Lloh18:
	adrp	x8, _AWG_DELAY_HD@GOTPAGE
Lloh19:
	ldr	x8, [x8, _AWG_DELAY_HD@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x2, x22
	bl	_vtg_set_hsync_vsync_pos
Lloh21:
	adrp	x8, _VTG_SYNC_ID_DVO@GOTPAGE
Lloh22:
	ldr	x8, [x8, _VTG_SYNC_ID_DVO@GOTPAGEOFF]
Lloh23:
	ldrsw	x8, [x8]
	madd	x8, x8, x23, x21
	sub	x0, x8, #20
Lloh24:
	adrp	x8, _DVO_DELAY@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DVO_DELAY@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x2, x22
	bl	_vtg_set_hsync_vsync_pos
Lloh27:
	adrp	x22, _VTG_MAX_SYNC_OUTPUT@GOTPAGE
Lloh28:
	ldr	x22, [x22, _VTG_MAX_SYNC_OUTPUT@GOTPAGEOFF]
	ldr	w8, [x22]
	cbz	w8, LBB0_3
; %bb.1:
	mov	x23, #0
	mov	x24, #0
	add	x21, x21, #8
Lloh29:
	adrp	x25, _vtg_regs_offs@GOTPAGE
Lloh30:
	ldr	x25, [x25, _vtg_regs_offs@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldur	w0, [x21, #-8]
	ldr	x8, [x20]
	ldr	x9, [x25]
	add	x9, x9, x23
	ldr	x9, [x9, #32]
	add	x1, x9, x8
	bl	_writel
	ldur	w0, [x21, #-4]
	ldr	x8, [x20]
	ldr	x9, [x25]
	add	x9, x9, x23
	ldr	x9, [x9, #24]
	add	x1, x9, x8
	bl	_writel
	ldr	w0, [x21]
	ldr	x8, [x20]
	ldr	x9, [x25]
	add	x9, x9, x23
	ldr	x9, [x9, #16]
	add	x1, x9, x8
	bl	_writel
	ldr	w0, [x21, #4]
	ldr	x8, [x20]
	ldr	x9, [x25]
	add	x9, x9, x23
	ldr	x9, [x9, #8]
	add	x1, x9, x8
	bl	_writel
	ldr	w0, [x21, #8]
	ldr	x8, [x20]
	ldr	x9, [x25]
	ldr	x9, [x9, x23]
	add	x1, x9, x8
	bl	_writel
	add	x24, x24, #1
	ldr	w8, [x22]
	add	x23, x23, #40
	add	x21, x21, #20
	cmp	x24, x8
	b.lo	LBB0_2
LBB0_3:
	ldr	x8, [x20]
Lloh31:
	adrp	x9, _VTG_MODE@GOTPAGE
Lloh32:
	ldr	x9, [x9, _VTG_MODE@GOTPAGEOFF]
Lloh33:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_writel
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.cfi_endproc
                                        ; -- End function
	.comm	_VTG_CLKLN,8,3                  ; @VTG_CLKLN
	.comm	_VTG_HLFLN,8,3                  ; @VTG_HLFLN
	.comm	_VTG_SYNC_ID_HDMI,4,2           ; @VTG_SYNC_ID_HDMI
	.comm	_HDMI_DELAY,4,2                 ; @HDMI_DELAY
	.comm	_VTG_SYNC_ID_HDDCS,4,2          ; @VTG_SYNC_ID_HDDCS
	.comm	_VTG_SYNC_ID_HDF,4,2            ; @VTG_SYNC_ID_HDF
	.comm	_AWG_DELAY_HD,4,2               ; @AWG_DELAY_HD
	.comm	_VTG_SYNC_ID_DVO,4,2            ; @VTG_SYNC_ID_DVO
	.comm	_DVO_DELAY,4,2                  ; @DVO_DELAY
	.comm	_VTG_MAX_SYNC_OUTPUT,4,2        ; @VTG_MAX_SYNC_OUTPUT
	.comm	_vtg_regs_offs,8,3              ; @vtg_regs_offs
	.comm	_VTG_MODE,8,3                   ; @VTG_MODE
	.no_dead_strip	_vtg_set_mode
.subsections_via_symbols
