	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vega20_set_default_dpm_table
_vega20_set_default_dpm_table:          ## @vega20_set_default_dpm_table
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	40(%rdi), %r14
	movq	_SMU_FEATURE_DPM_SOCCLK_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_smu_feature_is_enabled
	testq	%rax, %rax
	je	LBB0_3
## %bb.1:
	leaq	160(%r14), %rsi
	movq	_PPCLK_SOCCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_4
## %bb.2:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_45
LBB0_3:
	movl	$1, 160(%r14)
	movslq	(%r15), %rax
	imulq	$1374389535, %rax, %rax         ## imm = 0x51EB851F
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$37, %rax
	addl	%ecx, %eax
	movq	168(%r14), %rcx
	movl	%eax, (%rcx)
LBB0_4:
	leaq	164(%r14), %rdi
	callq	_vega20_init_single_dpm_state
	movq	_SMU_FEATURE_DPM_GFXCLK_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_smu_feature_is_enabled
	testq	%rax, %rax
	je	LBB0_7
## %bb.5:
	leaq	144(%r14), %rsi
	movq	_PPCLK_GFXCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_8
## %bb.6:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_45
LBB0_7:
	movl	$1, 144(%r14)
	movslq	4(%r15), %rax
	imulq	$1374389535, %rax, %rax         ## imm = 0x51EB851F
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$37, %rax
	addl	%ecx, %eax
	movq	152(%r14), %rcx
	movl	%eax, (%rcx)
LBB0_8:
	leaq	148(%r14), %rdi
	callq	_vega20_init_single_dpm_state
	movq	_SMU_FEATURE_DPM_UCLK_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_smu_feature_is_enabled
	testq	%rax, %rax
	je	LBB0_11
## %bb.9:
	leaq	128(%r14), %rsi
	movq	_PPCLK_UCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_12
## %bb.10:
	movl	%eax, %ebx
	leaq	L_.str.2(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_45
LBB0_11:
	movl	$1, 128(%r14)
	movslq	8(%r15), %rax
	imulq	$1374389535, %rax, %rax         ## imm = 0x51EB851F
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$37, %rax
	addl	%ecx, %eax
	movq	136(%r14), %rcx
	movl	%eax, (%rcx)
LBB0_12:
	leaq	132(%r14), %rdi
	callq	_vega20_init_single_dpm_state
	movq	_SMU_FEATURE_DPM_VCE_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_smu_feature_is_enabled
	testq	%rax, %rax
	je	LBB0_15
## %bb.13:
	leaq	112(%r14), %rsi
	movq	_PPCLK_ECLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_16
## %bb.14:
	movl	%eax, %ebx
	leaq	L_.str.3(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_45
LBB0_15:
	movl	$1, 112(%r14)
	movslq	12(%r15), %rax
	imulq	$1374389535, %rax, %rax         ## imm = 0x51EB851F
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$37, %rax
	addl	%ecx, %eax
	movq	120(%r14), %rcx
	movl	%eax, (%rcx)
LBB0_16:
	leaq	116(%r14), %rdi
	callq	_vega20_init_single_dpm_state
	movq	_SMU_FEATURE_DPM_UVD_BIT@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_smu_feature_is_enabled
	testq	%rax, %rax
	je	LBB0_19
## %bb.17:
	leaq	96(%r14), %rsi
	movq	_PPCLK_VCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_20
## %bb.18:
	movl	%eax, %ebx
	leaq	L_.str.4(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_45
LBB0_19:
	movl	$1, 96(%r14)
	movslq	16(%r15), %rax
	imulq	$1374389535, %rax, %rax         ## imm = 0x51EB851F
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$37, %rax
	addl	%ecx, %eax
	movq	104(%r14), %rcx
	movl	%eax, (%rcx)
LBB0_20:
	leaq	100(%r14), %rdi
	callq	_vega20_init_single_dpm_state
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_smu_feature_is_enabled
	testq	%rax, %rax
	je	LBB0_23
## %bb.21:
	leaq	80(%r14), %rsi
	movq	_PPCLK_DCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_24
## %bb.22:
	movl	%eax, %ebx
	leaq	L_.str.5(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_45
LBB0_23:
	movl	$1, 80(%r14)
	movslq	20(%r15), %rax
	imulq	$1374389535, %rax, %rax         ## imm = 0x51EB851F
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$37, %rax
	addl	%ecx, %eax
	movq	88(%r14), %rcx
	movl	%eax, (%rcx)
LBB0_24:
	leaq	84(%r14), %rdi
	callq	_vega20_init_single_dpm_state
	movq	_SMU_FEATURE_DPM_DCEFCLK_BIT@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_smu_feature_is_enabled
	testq	%rax, %rax
	je	LBB0_27
## %bb.25:
	leaq	64(%r14), %rsi
	movq	_PPCLK_DCEFCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_28
## %bb.26:
	movl	%eax, %ebx
	leaq	L_.str.6(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_45
LBB0_27:
	movl	$1, 64(%r14)
	movslq	24(%r15), %rax
	imulq	$1374389535, %rax, %rax         ## imm = 0x51EB851F
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$37, %rax
	addl	%ecx, %eax
	movq	72(%r14), %rcx
	movl	%eax, (%rcx)
LBB0_28:
	leaq	68(%r14), %rdi
	callq	_vega20_init_single_dpm_state
	leaq	48(%r14), %rbx
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_smu_feature_is_enabled
	testq	%rax, %rax
	je	LBB0_31
## %bb.29:
	movq	_PPCLK_PIXCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_32
## %bb.30:
	movl	%eax, %ebx
	leaq	L_.str.7(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_45
LBB0_31:
	movl	$0, (%rbx)
LBB0_32:
	leaq	52(%r14), %rdi
	callq	_vega20_init_single_dpm_state
	leaq	32(%r14), %rbx
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_smu_feature_is_enabled
	testq	%rax, %rax
	je	LBB0_35
## %bb.33:
	movq	_PPCLK_DISPCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_36
## %bb.34:
	movl	%eax, %ebx
	leaq	L_.str.8(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_45
LBB0_35:
	movl	$0, (%rbx)
LBB0_36:
	leaq	36(%r14), %rdi
	callq	_vega20_init_single_dpm_state
	leaq	16(%r14), %rbx
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_smu_feature_is_enabled
	testq	%rax, %rax
	je	LBB0_39
## %bb.37:
	movq	_PPCLK_PHYCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_40
## %bb.38:
	movl	%eax, %ebx
	leaq	L_.str.9(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_45
LBB0_39:
	movl	$0, (%rbx)
LBB0_40:
	leaq	20(%r14), %rdi
	callq	_vega20_init_single_dpm_state
	movq	_FEATURE_DPM_FCLK_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_smu_feature_is_enabled
	testq	%rax, %rax
	je	LBB0_43
## %bb.41:
	movq	_PPCLK_FCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_vega20_set_single_dpm_table
	testl	%eax, %eax
	je	LBB0_44
## %bb.42:
	movl	%eax, %ebx
	leaq	L_.str.10(%rip), %rdi
	callq	_pr_err
	jmp	LBB0_45
LBB0_43:
	movl	$0, (%r14)
LBB0_44:
	leaq	4(%r14), %rdi
	callq	_vega20_init_single_dpm_state
	movl	32(%r15), %edi
	movq	%r14, %rsi
	movl	$176, %edx
	callq	_memcpy
	xorl	%ebx, %ebx
LBB0_45:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SMU_FEATURE_DPM_SOCCLK_BIT,4,2 ## @SMU_FEATURE_DPM_SOCCLK_BIT
	.comm	_PPCLK_SOCCLK,4,2               ## @PPCLK_SOCCLK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"[SetupDefaultDpmTable] failed to get socclk dpm levels!"

	.comm	_SMU_FEATURE_DPM_GFXCLK_BIT,4,2 ## @SMU_FEATURE_DPM_GFXCLK_BIT
	.comm	_PPCLK_GFXCLK,4,2               ## @PPCLK_GFXCLK
L_.str.1:                               ## @.str.1
	.asciz	"[SetupDefaultDpmTable] failed to get gfxclk dpm levels!"

	.comm	_SMU_FEATURE_DPM_UCLK_BIT,4,2   ## @SMU_FEATURE_DPM_UCLK_BIT
	.comm	_PPCLK_UCLK,4,2                 ## @PPCLK_UCLK
L_.str.2:                               ## @.str.2
	.asciz	"[SetupDefaultDpmTable] failed to get memclk dpm levels!"

	.comm	_SMU_FEATURE_DPM_VCE_BIT,4,2    ## @SMU_FEATURE_DPM_VCE_BIT
	.comm	_PPCLK_ECLK,4,2                 ## @PPCLK_ECLK
L_.str.3:                               ## @.str.3
	.asciz	"[SetupDefaultDpmTable] failed to get eclk dpm levels!"

	.comm	_SMU_FEATURE_DPM_UVD_BIT,4,2    ## @SMU_FEATURE_DPM_UVD_BIT
	.comm	_PPCLK_VCLK,4,2                 ## @PPCLK_VCLK
L_.str.4:                               ## @.str.4
	.asciz	"[SetupDefaultDpmTable] failed to get vclk dpm levels!"

	.comm	_PPCLK_DCLK,4,2                 ## @PPCLK_DCLK
L_.str.5:                               ## @.str.5
	.asciz	"[SetupDefaultDpmTable] failed to get dclk dpm levels!"

	.comm	_SMU_FEATURE_DPM_DCEFCLK_BIT,4,2 ## @SMU_FEATURE_DPM_DCEFCLK_BIT
	.comm	_PPCLK_DCEFCLK,4,2              ## @PPCLK_DCEFCLK
L_.str.6:                               ## @.str.6
	.asciz	"[SetupDefaultDpmTable] failed to get dcefclk dpm levels!"

	.comm	_PPCLK_PIXCLK,4,2               ## @PPCLK_PIXCLK
L_.str.7:                               ## @.str.7
	.asciz	"[SetupDefaultDpmTable] failed to get pixclk dpm levels!"

	.comm	_PPCLK_DISPCLK,4,2              ## @PPCLK_DISPCLK
L_.str.8:                               ## @.str.8
	.asciz	"[SetupDefaultDpmTable] failed to get dispclk dpm levels!"

	.comm	_PPCLK_PHYCLK,4,2               ## @PPCLK_PHYCLK
L_.str.9:                               ## @.str.9
	.asciz	"[SetupDefaultDpmTable] failed to get phyclk dpm levels!"

	.comm	_FEATURE_DPM_FCLK_BIT,4,2       ## @FEATURE_DPM_FCLK_BIT
	.comm	_PPCLK_FCLK,4,2                 ## @PPCLK_FCLK
L_.str.10:                              ## @.str.10
	.asciz	"[SetupDefaultDpmTable] failed to get fclk dpm levels!"

	.no_dead_strip	_vega20_set_default_dpm_table
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vega20_set_default_dpm_table
_vega20_set_default_dpm_table:          ; @vega20_set_default_dpm_table
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	ldr	x19, [x0, #40]
Lloh0:
	adrp	x8, _SMU_FEATURE_DPM_SOCCLK_BIT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SMU_FEATURE_DPM_SOCCLK_BIT@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_smu_feature_is_enabled
	cbz	x0, LBB0_3
; %bb.1:
	add	x1, x19, #160
Lloh3:
	adrp	x8, _PPCLK_SOCCLK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PPCLK_SOCCLK@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_4
; %bb.2:
	mov	x21, x0
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_err
	b	LBB0_45
LBB0_3:
	mov	w8, #1
	str	w8, [x19, #160]
	ldrsw	x8, [x20]
	mov	w9, #34079
	movk	w9, #20971, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #37
	add	w8, w8, w9
	ldr	x9, [x19, #168]
	str	w8, [x9]
LBB0_4:
	add	x0, x19, #164
	bl	_vega20_init_single_dpm_state
Lloh8:
	adrp	x8, _SMU_FEATURE_DPM_GFXCLK_BIT@GOTPAGE
Lloh9:
	ldr	x8, [x8, _SMU_FEATURE_DPM_GFXCLK_BIT@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_smu_feature_is_enabled
	cbz	x0, LBB0_7
; %bb.5:
	add	x1, x19, #144
Lloh11:
	adrp	x8, _PPCLK_GFXCLK@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PPCLK_GFXCLK@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_8
; %bb.6:
	mov	x21, x0
Lloh14:
	adrp	x0, l_.str.1@PAGE
Lloh15:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_pr_err
	b	LBB0_45
LBB0_7:
	mov	w8, #1
	str	w8, [x19, #144]
	ldrsw	x8, [x20, #4]
	mov	w9, #34079
	movk	w9, #20971, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #37
	add	w8, w8, w9
	ldr	x9, [x19, #152]
	str	w8, [x9]
LBB0_8:
	add	x0, x19, #148
	bl	_vega20_init_single_dpm_state
Lloh16:
	adrp	x8, _SMU_FEATURE_DPM_UCLK_BIT@GOTPAGE
Lloh17:
	ldr	x8, [x8, _SMU_FEATURE_DPM_UCLK_BIT@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_smu_feature_is_enabled
	cbz	x0, LBB0_11
; %bb.9:
	add	x1, x19, #128
Lloh19:
	adrp	x8, _PPCLK_UCLK@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PPCLK_UCLK@GOTPAGEOFF]
Lloh21:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_12
; %bb.10:
	mov	x21, x0
Lloh22:
	adrp	x0, l_.str.2@PAGE
Lloh23:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_pr_err
	b	LBB0_45
LBB0_11:
	mov	w8, #1
	str	w8, [x19, #128]
	ldrsw	x8, [x20, #8]
	mov	w9, #34079
	movk	w9, #20971, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #37
	add	w8, w8, w9
	ldr	x9, [x19, #136]
	str	w8, [x9]
LBB0_12:
	add	x0, x19, #132
	bl	_vega20_init_single_dpm_state
Lloh24:
	adrp	x8, _SMU_FEATURE_DPM_VCE_BIT@GOTPAGE
Lloh25:
	ldr	x8, [x8, _SMU_FEATURE_DPM_VCE_BIT@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_smu_feature_is_enabled
	cbz	x0, LBB0_15
; %bb.13:
	add	x1, x19, #112
Lloh27:
	adrp	x8, _PPCLK_ECLK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _PPCLK_ECLK@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_16
; %bb.14:
	mov	x21, x0
Lloh30:
	adrp	x0, l_.str.3@PAGE
Lloh31:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_pr_err
	b	LBB0_45
LBB0_15:
	mov	w8, #1
	str	w8, [x19, #112]
	ldrsw	x8, [x20, #12]
	mov	w9, #34079
	movk	w9, #20971, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #37
	add	w8, w8, w9
	ldr	x9, [x19, #120]
	str	w8, [x9]
LBB0_16:
	add	x0, x19, #116
	bl	_vega20_init_single_dpm_state
Lloh32:
	adrp	x22, _SMU_FEATURE_DPM_UVD_BIT@GOTPAGE
Lloh33:
	ldr	x22, [x22, _SMU_FEATURE_DPM_UVD_BIT@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x20
	bl	_smu_feature_is_enabled
	cbz	x0, LBB0_19
; %bb.17:
	add	x1, x19, #96
Lloh34:
	adrp	x8, _PPCLK_VCLK@GOTPAGE
Lloh35:
	ldr	x8, [x8, _PPCLK_VCLK@GOTPAGEOFF]
Lloh36:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_20
; %bb.18:
	mov	x21, x0
Lloh37:
	adrp	x0, l_.str.4@PAGE
Lloh38:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_pr_err
	b	LBB0_45
LBB0_19:
	mov	w8, #1
	str	w8, [x19, #96]
	ldrsw	x8, [x20, #16]
	mov	w9, #34079
	movk	w9, #20971, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #37
	add	w8, w8, w9
	ldr	x9, [x19, #104]
	str	w8, [x9]
LBB0_20:
	add	x0, x19, #100
	bl	_vega20_init_single_dpm_state
	ldr	w1, [x22]
	mov	x0, x20
	bl	_smu_feature_is_enabled
	cbz	x0, LBB0_23
; %bb.21:
	add	x1, x19, #80
Lloh39:
	adrp	x8, _PPCLK_DCLK@GOTPAGE
Lloh40:
	ldr	x8, [x8, _PPCLK_DCLK@GOTPAGEOFF]
Lloh41:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_24
; %bb.22:
	mov	x21, x0
Lloh42:
	adrp	x0, l_.str.5@PAGE
Lloh43:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_pr_err
	b	LBB0_45
LBB0_23:
	mov	w8, #1
	str	w8, [x19, #80]
	ldrsw	x8, [x20, #20]
	mov	w9, #34079
	movk	w9, #20971, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #37
	add	w8, w8, w9
	ldr	x9, [x19, #88]
	str	w8, [x9]
LBB0_24:
	add	x0, x19, #84
	bl	_vega20_init_single_dpm_state
Lloh44:
	adrp	x22, _SMU_FEATURE_DPM_DCEFCLK_BIT@GOTPAGE
Lloh45:
	ldr	x22, [x22, _SMU_FEATURE_DPM_DCEFCLK_BIT@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x20
	bl	_smu_feature_is_enabled
	cbz	x0, LBB0_27
; %bb.25:
	add	x1, x19, #64
Lloh46:
	adrp	x8, _PPCLK_DCEFCLK@GOTPAGE
Lloh47:
	ldr	x8, [x8, _PPCLK_DCEFCLK@GOTPAGEOFF]
Lloh48:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_28
; %bb.26:
	mov	x21, x0
Lloh49:
	adrp	x0, l_.str.6@PAGE
Lloh50:
	add	x0, x0, l_.str.6@PAGEOFF
	bl	_pr_err
	b	LBB0_45
LBB0_27:
	mov	w8, #1
	str	w8, [x19, #64]
	ldrsw	x8, [x20, #24]
	mov	w9, #34079
	movk	w9, #20971, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #37
	add	w8, w8, w9
	ldr	x9, [x19, #72]
	str	w8, [x9]
LBB0_28:
	add	x0, x19, #68
	bl	_vega20_init_single_dpm_state
	add	x21, x19, #48
	ldr	w1, [x22]
	mov	x0, x20
	bl	_smu_feature_is_enabled
	cbz	x0, LBB0_31
; %bb.29:
Lloh51:
	adrp	x8, _PPCLK_PIXCLK@GOTPAGE
Lloh52:
	ldr	x8, [x8, _PPCLK_PIXCLK@GOTPAGEOFF]
Lloh53:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x21
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_32
; %bb.30:
	mov	x21, x0
Lloh54:
	adrp	x0, l_.str.7@PAGE
Lloh55:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	_pr_err
	b	LBB0_45
LBB0_31:
	str	wzr, [x21]
LBB0_32:
	add	x0, x19, #52
	bl	_vega20_init_single_dpm_state
	add	x21, x19, #32
	ldr	w1, [x22]
	mov	x0, x20
	bl	_smu_feature_is_enabled
	cbz	x0, LBB0_35
; %bb.33:
Lloh56:
	adrp	x8, _PPCLK_DISPCLK@GOTPAGE
Lloh57:
	ldr	x8, [x8, _PPCLK_DISPCLK@GOTPAGEOFF]
Lloh58:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x21
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_36
; %bb.34:
	mov	x21, x0
Lloh59:
	adrp	x0, l_.str.8@PAGE
Lloh60:
	add	x0, x0, l_.str.8@PAGEOFF
	bl	_pr_err
	b	LBB0_45
LBB0_35:
	str	wzr, [x21]
LBB0_36:
	add	x0, x19, #36
	bl	_vega20_init_single_dpm_state
	add	x21, x19, #16
	ldr	w1, [x22]
	mov	x0, x20
	bl	_smu_feature_is_enabled
	cbz	x0, LBB0_39
; %bb.37:
Lloh61:
	adrp	x8, _PPCLK_PHYCLK@GOTPAGE
Lloh62:
	ldr	x8, [x8, _PPCLK_PHYCLK@GOTPAGEOFF]
Lloh63:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x21
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_40
; %bb.38:
	mov	x21, x0
Lloh64:
	adrp	x0, l_.str.9@PAGE
Lloh65:
	add	x0, x0, l_.str.9@PAGEOFF
	bl	_pr_err
	b	LBB0_45
LBB0_39:
	str	wzr, [x21]
LBB0_40:
	add	x0, x19, #20
	bl	_vega20_init_single_dpm_state
Lloh66:
	adrp	x8, _FEATURE_DPM_FCLK_BIT@GOTPAGE
Lloh67:
	ldr	x8, [x8, _FEATURE_DPM_FCLK_BIT@GOTPAGEOFF]
Lloh68:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_smu_feature_is_enabled
	cbz	x0, LBB0_43
; %bb.41:
Lloh69:
	adrp	x8, _PPCLK_FCLK@GOTPAGE
Lloh70:
	ldr	x8, [x8, _PPCLK_FCLK@GOTPAGEOFF]
Lloh71:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x1, x19
	bl	_vega20_set_single_dpm_table
	cbz	w0, LBB0_44
; %bb.42:
	mov	x21, x0
Lloh72:
	adrp	x0, l_.str.10@PAGE
Lloh73:
	add	x0, x0, l_.str.10@PAGEOFF
	bl	_pr_err
	b	LBB0_45
LBB0_43:
	str	wzr, [x19]
LBB0_44:
	add	x0, x19, #4
	bl	_vega20_init_single_dpm_state
	ldr	w0, [x20, #32]
	mov	x1, x19
	mov	w2, #176
	bl	_memcpy
	mov	w21, #0
LBB0_45:
	mov	x0, x21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpAdd	Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpAdd	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpAdd	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpAdd	Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpAdd	Lloh72, Lloh73
	.cfi_endproc
                                        ; -- End function
	.comm	_SMU_FEATURE_DPM_SOCCLK_BIT,4,2 ; @SMU_FEATURE_DPM_SOCCLK_BIT
	.comm	_PPCLK_SOCCLK,4,2               ; @PPCLK_SOCCLK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"[SetupDefaultDpmTable] failed to get socclk dpm levels!"

	.comm	_SMU_FEATURE_DPM_GFXCLK_BIT,4,2 ; @SMU_FEATURE_DPM_GFXCLK_BIT
	.comm	_PPCLK_GFXCLK,4,2               ; @PPCLK_GFXCLK
l_.str.1:                               ; @.str.1
	.asciz	"[SetupDefaultDpmTable] failed to get gfxclk dpm levels!"

	.comm	_SMU_FEATURE_DPM_UCLK_BIT,4,2   ; @SMU_FEATURE_DPM_UCLK_BIT
	.comm	_PPCLK_UCLK,4,2                 ; @PPCLK_UCLK
l_.str.2:                               ; @.str.2
	.asciz	"[SetupDefaultDpmTable] failed to get memclk dpm levels!"

	.comm	_SMU_FEATURE_DPM_VCE_BIT,4,2    ; @SMU_FEATURE_DPM_VCE_BIT
	.comm	_PPCLK_ECLK,4,2                 ; @PPCLK_ECLK
l_.str.3:                               ; @.str.3
	.asciz	"[SetupDefaultDpmTable] failed to get eclk dpm levels!"

	.comm	_SMU_FEATURE_DPM_UVD_BIT,4,2    ; @SMU_FEATURE_DPM_UVD_BIT
	.comm	_PPCLK_VCLK,4,2                 ; @PPCLK_VCLK
l_.str.4:                               ; @.str.4
	.asciz	"[SetupDefaultDpmTable] failed to get vclk dpm levels!"

	.comm	_PPCLK_DCLK,4,2                 ; @PPCLK_DCLK
l_.str.5:                               ; @.str.5
	.asciz	"[SetupDefaultDpmTable] failed to get dclk dpm levels!"

	.comm	_SMU_FEATURE_DPM_DCEFCLK_BIT,4,2 ; @SMU_FEATURE_DPM_DCEFCLK_BIT
	.comm	_PPCLK_DCEFCLK,4,2              ; @PPCLK_DCEFCLK
l_.str.6:                               ; @.str.6
	.asciz	"[SetupDefaultDpmTable] failed to get dcefclk dpm levels!"

	.comm	_PPCLK_PIXCLK,4,2               ; @PPCLK_PIXCLK
l_.str.7:                               ; @.str.7
	.asciz	"[SetupDefaultDpmTable] failed to get pixclk dpm levels!"

	.comm	_PPCLK_DISPCLK,4,2              ; @PPCLK_DISPCLK
l_.str.8:                               ; @.str.8
	.asciz	"[SetupDefaultDpmTable] failed to get dispclk dpm levels!"

	.comm	_PPCLK_PHYCLK,4,2               ; @PPCLK_PHYCLK
l_.str.9:                               ; @.str.9
	.asciz	"[SetupDefaultDpmTable] failed to get phyclk dpm levels!"

	.comm	_FEATURE_DPM_FCLK_BIT,4,2       ; @FEATURE_DPM_FCLK_BIT
	.comm	_PPCLK_FCLK,4,2                 ; @PPCLK_FCLK
l_.str.10:                              ; @.str.10
	.asciz	"[SetupDefaultDpmTable] failed to get fclk dpm levels!"

	.no_dead_strip	_vega20_set_default_dpm_table
.subsections_via_symbols
