	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hifn_reset_dma
_hifn_reset_dma:                        ## @hifn_reset_dma
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	callq	_hifn_stop_device
	movq	_HIFN_1_DMA_CNFG@GOTPCREL(%rip), %r12
	movq	_HIFN_DMACNFG_MSTRESET@GOTPCREL(%rip), %r15
	movq	_HIFN_DMACNFG_DMARESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	orl	(%r15), %edx
	movl	(%r12), %esi
	movq	_HIFN_DMACNFG_MODE@GOTPCREL(%rip), %r13
	orl	(%r13), %edx
	movq	%rbx, %rdi
	callq	_hifn_write_1
	movl	$1, %edi
	callq	_mdelay
	movl	(%r12), %esi
	movl	(%r13), %edx
	testl	%r14d, %r14d
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_hifn_write_1
	movl	$1, %edi
	callq	_mdelay
	jmp	LBB0_3
LBB0_2:
	orl	(%r15), %edx
	movq	%rbx, %rdi
	callq	_hifn_write_1
	movq	%rbx, %rdi
	callq	_hifn_reset_puc
LBB0_3:
	movl	(%r12), %esi
	movq	_HIFN_DMACNFG_DMARESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	orl	(%r15), %edx
	orl	(%r13), %edx
	movq	%rbx, %rdi
	callq	_hifn_write_1
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_hifn_reset_puc                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_HIFN_1_DMA_CNFG,4,2            ## @HIFN_1_DMA_CNFG
	.comm	_HIFN_DMACNFG_MSTRESET,4,2      ## @HIFN_DMACNFG_MSTRESET
	.comm	_HIFN_DMACNFG_DMARESET,4,2      ## @HIFN_DMACNFG_DMARESET
	.comm	_HIFN_DMACNFG_MODE,4,2          ## @HIFN_DMACNFG_MODE
	.no_dead_strip	_hifn_reset_dma
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hifn_reset_dma
_hifn_reset_dma:                        ; @hifn_reset_dma
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
	bl	_hifn_stop_device
Lloh0:
	adrp	x21, _HIFN_1_DMA_CNFG@GOTPAGE
Lloh1:
	ldr	x21, [x21, _HIFN_1_DMA_CNFG@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh2:
	adrp	x22, _HIFN_DMACNFG_MSTRESET@GOTPAGE
Lloh3:
	ldr	x22, [x22, _HIFN_DMACNFG_MSTRESET@GOTPAGEOFF]
	ldr	w8, [x22]
Lloh4:
	adrp	x23, _HIFN_DMACNFG_DMARESET@GOTPAGE
Lloh5:
	ldr	x23, [x23, _HIFN_DMACNFG_DMARESET@GOTPAGEOFF]
	ldr	w9, [x23]
	orr	w8, w9, w8
Lloh6:
	adrp	x24, _HIFN_DMACNFG_MODE@GOTPAGE
Lloh7:
	ldr	x24, [x24, _HIFN_DMACNFG_MODE@GOTPAGEOFF]
	ldr	w9, [x24]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_hifn_write_1
	mov	w0, #1
	bl	_mdelay
	ldr	w1, [x21]
	ldr	w2, [x24]
	cbz	w20, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_hifn_write_1
	mov	w0, #1
	bl	_mdelay
	b	LBB0_3
LBB0_2:
	ldr	w8, [x22]
	orr	w2, w8, w2
	mov	x0, x19
	bl	_hifn_write_1
	mov	x0, x19
	bl	_hifn_reset_puc
LBB0_3:
	ldr	w1, [x21]
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	ldr	w9, [x24]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_hifn_write_1
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_hifn_reset_puc
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_HIFN_1_DMA_CNFG,4,2            ; @HIFN_1_DMA_CNFG
	.comm	_HIFN_DMACNFG_MSTRESET,4,2      ; @HIFN_DMACNFG_MSTRESET
	.comm	_HIFN_DMACNFG_DMARESET,4,2      ; @HIFN_DMACNFG_DMARESET
	.comm	_HIFN_DMACNFG_MODE,4,2          ; @HIFN_DMACNFG_MODE
	.no_dead_strip	_hifn_reset_dma
.subsections_via_symbols
