	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dsi_omap5_mux_pads
_dsi_omap5_mux_pads:                    ## @dsi_omap5_mux_pads
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	%esi, %eax
	movl	(%rdi), %ecx
	testl	%ecx, %ecx
	je	LBB0_1
## %bb.2:
	cmpl	$1, %ecx
	jne	LBB0_5
## %bb.3:
	movq	_OMAP5_DSI2_LANEENABLE_SHIFT@GOTPCREL(%rip), %rcx
	jmp	LBB0_4
LBB0_1:
	movq	_OMAP5_DSI1_LANEENABLE_SHIFT@GOTPCREL(%rip), %rcx
LBB0_4:
	movb	(%rcx), %cl
	movl	4(%rdi), %edi
	movq	_OMAP5_DSIPHY_SYSCON_OFFSET@GOTPCREL(%rip), %rsi
	movq	_OMAP5_DSI_LANEENABLE_MASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	shll	%cl, %edx
	movl	(%rsi), %esi
	shll	%cl, %eax
	movl	%eax, %ecx
	popq	%rbp
	jmp	_regmap_update_bits             ## TAILCALL
LBB0_5:
	movq	_ENODEV@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_OMAP5_DSI1_LANEENABLE_SHIFT,4,2 ## @OMAP5_DSI1_LANEENABLE_SHIFT
	.comm	_OMAP5_DSI2_LANEENABLE_SHIFT,4,2 ## @OMAP5_DSI2_LANEENABLE_SHIFT
	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_OMAP5_DSIPHY_SYSCON_OFFSET,4,2 ## @OMAP5_DSIPHY_SYSCON_OFFSET
	.comm	_OMAP5_DSI_LANEENABLE_MASK,4,2  ## @OMAP5_DSI_LANEENABLE_MASK
	.no_dead_strip	_dsi_omap5_mux_pads
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dsi_omap5_mux_pads
_dsi_omap5_mux_pads:                    ; @dsi_omap5_mux_pads
	.cfi_startproc
; %bb.0:
	ldr	w8, [x0]
	cbz	w8, LBB0_3
; %bb.1:
	cmp	w8, #1
	b.ne	LBB0_5
; %bb.2:
Lloh0:
	adrp	x8, _OMAP5_DSI2_LANEENABLE_SHIFT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _OMAP5_DSI2_LANEENABLE_SHIFT@GOTPAGEOFF]
	b	LBB0_4
LBB0_3:
Lloh2:
	adrp	x8, _OMAP5_DSI1_LANEENABLE_SHIFT@GOTPAGE
Lloh3:
	ldr	x8, [x8, _OMAP5_DSI1_LANEENABLE_SHIFT@GOTPAGEOFF]
LBB0_4:
	ldr	w9, [x8]
	ldr	w0, [x0, #4]
Lloh4:
	adrp	x8, _OMAP5_DSIPHY_SYSCON_OFFSET@GOTPAGE
Lloh5:
	ldr	x8, [x8, _OMAP5_DSIPHY_SYSCON_OFFSET@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
Lloh7:
	adrp	x10, _OMAP5_DSI_LANEENABLE_MASK@GOTPAGE
Lloh8:
	ldr	x10, [x10, _OMAP5_DSI_LANEENABLE_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w10, [x10]
	lsl	w2, w10, w9
	lsl	w3, w1, w9
	mov	x1, x8
	b	_regmap_update_bits
LBB0_5:
Lloh10:
	adrp	x8, _ENODEV@GOTPAGE
Lloh11:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	neg	w0, w8
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_OMAP5_DSI1_LANEENABLE_SHIFT,4,2 ; @OMAP5_DSI1_LANEENABLE_SHIFT
	.comm	_OMAP5_DSI2_LANEENABLE_SHIFT,4,2 ; @OMAP5_DSI2_LANEENABLE_SHIFT
	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_OMAP5_DSIPHY_SYSCON_OFFSET,4,2 ; @OMAP5_DSIPHY_SYSCON_OFFSET
	.comm	_OMAP5_DSI_LANEENABLE_MASK,4,2  ; @OMAP5_DSI_LANEENABLE_MASK
	.no_dead_strip	_dsi_omap5_mux_pads
.subsections_via_symbols
