	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mtk_i2c_init_hw
_mtk_i2c_init_hw:                       ## @mtk_i2c_init_hw
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_I2C_SOFT_RST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_OFFSET_SOFTRESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_mtk_i2c_writew
	cmpq	$0, 40(%rbx)
	jne	LBB0_1
## %bb.2:
	movq	_I2C_IO_CONFIG_OPEN_DRAIN@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_I2C_IO_CONFIG_PUSH_PULL@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %esi
	movq	_OFFSET_IO_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_i2c_writew
	movq	24(%rbx), %rax
	cmpq	$0, 24(%rax)
	je	LBB0_5
## %bb.4:
	movq	_I2C_DCM_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_OFFSET_DCM_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_i2c_writew
	movq	24(%rbx), %rax
LBB0_5:
	cmpq	$0, 16(%rax)
	je	LBB0_7
## %bb.6:
	movq	_I2C_DEFAULT_CLK_DIV@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	decl	%esi
	movq	_OFFSET_CLOCK_DIV@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_i2c_writew
LBB0_7:
	movl	(%rbx), %esi
	movq	_OFFSET_TIMING@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_i2c_writew
	movl	4(%rbx), %esi
	movq	_OFFSET_HS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_i2c_writew
	movq	24(%rbx), %rax
	cmpq	$0, 8(%rax)
	je	LBB0_9
## %bb.8:
	movl	8(%rbx), %esi
	movq	_OFFSET_LTIMING@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_i2c_writew
LBB0_9:
	cmpq	$0, 32(%rbx)
	je	LBB0_11
## %bb.10:
	movq	_I2C_CONTROL_WRAPPER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_OFFSET_PATH_DIR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_i2c_writew
LBB0_11:
	movq	_I2C_CONTROL_ACKERR_DET_EN@GOTPCREL(%rip), %rax
	movq	_I2C_CONTROL_CLK_EXT_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_I2C_CONTROL_DMA_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	24(%rbx), %rax
	movq	_I2C_CONTROL_DMAACK_EN@GOTPCREL(%rip), %rdx
	movq	_I2C_CONTROL_ASYNC_MODE@GOTPCREL(%rip), %rsi
	movl	(%rsi), %edi
	orl	(%rdx), %edi
	xorl	%esi, %esi
	cmpq	$0, (%rax)
	cmovnel	%edi, %esi
	orl	%ecx, %esi
	movq	_OFFSET_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_i2c_writew
	movq	_I2C_DELAY_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_OFFSET_DELAY_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_mtk_i2c_writew
	movq	_I2C_DMA_HARD_RST@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_OFFSET_RST@GOTPCREL(%rip), %r14
	movq	(%r14), %rsi
	addq	16(%rbx), %rsi
	callq	_writel
	movl	$50, %edi
	callq	_udelay
	movq	_I2C_DMA_CLR_FLAG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	(%r14), %rsi
	addq	16(%rbx), %rsi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_writel                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_I2C_SOFT_RST,4,2               ## @I2C_SOFT_RST
	.comm	_OFFSET_SOFTRESET,4,2           ## @OFFSET_SOFTRESET
	.comm	_I2C_IO_CONFIG_PUSH_PULL,4,2    ## @I2C_IO_CONFIG_PUSH_PULL
	.comm	_OFFSET_IO_CONFIG,4,2           ## @OFFSET_IO_CONFIG
	.comm	_I2C_IO_CONFIG_OPEN_DRAIN,4,2   ## @I2C_IO_CONFIG_OPEN_DRAIN
	.comm	_I2C_DCM_DISABLE,4,2            ## @I2C_DCM_DISABLE
	.comm	_OFFSET_DCM_EN,4,2              ## @OFFSET_DCM_EN
	.comm	_I2C_DEFAULT_CLK_DIV,4,2        ## @I2C_DEFAULT_CLK_DIV
	.comm	_OFFSET_CLOCK_DIV,4,2           ## @OFFSET_CLOCK_DIV
	.comm	_OFFSET_TIMING,4,2              ## @OFFSET_TIMING
	.comm	_OFFSET_HS,4,2                  ## @OFFSET_HS
	.comm	_OFFSET_LTIMING,4,2             ## @OFFSET_LTIMING
	.comm	_I2C_CONTROL_WRAPPER,4,2        ## @I2C_CONTROL_WRAPPER
	.comm	_OFFSET_PATH_DIR,4,2            ## @OFFSET_PATH_DIR
	.comm	_I2C_CONTROL_ACKERR_DET_EN,4,2  ## @I2C_CONTROL_ACKERR_DET_EN
	.comm	_I2C_CONTROL_CLK_EXT_EN,4,2     ## @I2C_CONTROL_CLK_EXT_EN
	.comm	_I2C_CONTROL_DMA_EN,4,2         ## @I2C_CONTROL_DMA_EN
	.comm	_I2C_CONTROL_DMAACK_EN,4,2      ## @I2C_CONTROL_DMAACK_EN
	.comm	_I2C_CONTROL_ASYNC_MODE,4,2     ## @I2C_CONTROL_ASYNC_MODE
	.comm	_OFFSET_CONTROL,4,2             ## @OFFSET_CONTROL
	.comm	_I2C_DELAY_LEN,4,2              ## @I2C_DELAY_LEN
	.comm	_OFFSET_DELAY_LEN,4,2           ## @OFFSET_DELAY_LEN
	.comm	_I2C_DMA_HARD_RST,4,2           ## @I2C_DMA_HARD_RST
	.comm	_OFFSET_RST,8,3                 ## @OFFSET_RST
	.comm	_I2C_DMA_CLR_FLAG,4,2           ## @I2C_DMA_CLR_FLAG
	.no_dead_strip	_mtk_i2c_init_hw
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mtk_i2c_init_hw
_mtk_i2c_init_hw:                       ; @mtk_i2c_init_hw
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _I2C_SOFT_RST@GOTPAGE
Lloh1:
	ldr	x8, [x8, _I2C_SOFT_RST@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _OFFSET_SOFTRESET@GOTPAGE
Lloh4:
	ldr	x8, [x8, _OFFSET_SOFTRESET@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	bl	_mtk_i2c_writew
	ldr	x8, [x19, #40]
Lloh6:
	adrp	x9, _I2C_IO_CONFIG_OPEN_DRAIN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _I2C_IO_CONFIG_OPEN_DRAIN@GOTPAGEOFF]
Lloh8:
	adrp	x10, _I2C_IO_CONFIG_PUSH_PULL@GOTPAGE
Lloh9:
	ldr	x10, [x10, _I2C_IO_CONFIG_PUSH_PULL@GOTPAGEOFF]
	cmp	x8, #0
	csel	x8, x9, x10, eq
	ldr	w1, [x8]
Lloh10:
	adrp	x8, _OFFSET_IO_CONFIG@GOTPAGE
Lloh11:
	ldr	x8, [x8, _OFFSET_IO_CONFIG@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_i2c_writew
	ldr	x8, [x19, #24]
	ldr	x9, [x8, #24]
	cbz	x9, LBB0_2
; %bb.1:
Lloh13:
	adrp	x8, _I2C_DCM_DISABLE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _I2C_DCM_DISABLE@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
Lloh16:
	adrp	x8, _OFFSET_DCM_EN@GOTPAGE
Lloh17:
	ldr	x8, [x8, _OFFSET_DCM_EN@GOTPAGEOFF]
Lloh18:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_i2c_writew
	ldr	x8, [x19, #24]
LBB0_2:
	ldr	x8, [x8, #16]
	cbz	x8, LBB0_4
; %bb.3:
Lloh19:
	adrp	x8, _I2C_DEFAULT_CLK_DIV@GOTPAGE
Lloh20:
	ldr	x8, [x8, _I2C_DEFAULT_CLK_DIV@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	sub	w1, w8, #1
Lloh22:
	adrp	x8, _OFFSET_CLOCK_DIV@GOTPAGE
Lloh23:
	ldr	x8, [x8, _OFFSET_CLOCK_DIV@GOTPAGEOFF]
Lloh24:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_i2c_writew
LBB0_4:
	ldr	w1, [x19]
Lloh25:
	adrp	x8, _OFFSET_TIMING@GOTPAGE
Lloh26:
	ldr	x8, [x8, _OFFSET_TIMING@GOTPAGEOFF]
Lloh27:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_i2c_writew
	ldr	w1, [x19, #4]
Lloh28:
	adrp	x8, _OFFSET_HS@GOTPAGE
Lloh29:
	ldr	x8, [x8, _OFFSET_HS@GOTPAGEOFF]
Lloh30:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_i2c_writew
	ldr	x8, [x19, #24]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_6
; %bb.5:
	ldr	w1, [x19, #8]
Lloh31:
	adrp	x8, _OFFSET_LTIMING@GOTPAGE
Lloh32:
	ldr	x8, [x8, _OFFSET_LTIMING@GOTPAGEOFF]
Lloh33:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_i2c_writew
LBB0_6:
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_8
; %bb.7:
Lloh34:
	adrp	x8, _I2C_CONTROL_WRAPPER@GOTPAGE
Lloh35:
	ldr	x8, [x8, _I2C_CONTROL_WRAPPER@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
Lloh37:
	adrp	x8, _OFFSET_PATH_DIR@GOTPAGE
Lloh38:
	ldr	x8, [x8, _OFFSET_PATH_DIR@GOTPAGEOFF]
Lloh39:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_i2c_writew
LBB0_8:
Lloh40:
	adrp	x8, _I2C_CONTROL_ACKERR_DET_EN@GOTPAGE
Lloh41:
	ldr	x8, [x8, _I2C_CONTROL_ACKERR_DET_EN@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
Lloh43:
	adrp	x9, _I2C_CONTROL_CLK_EXT_EN@GOTPAGE
Lloh44:
	ldr	x9, [x9, _I2C_CONTROL_CLK_EXT_EN@GOTPAGEOFF]
Lloh45:
	ldr	w9, [x9]
Lloh46:
	adrp	x10, _I2C_CONTROL_DMA_EN@GOTPAGE
Lloh47:
	ldr	x10, [x10, _I2C_CONTROL_DMA_EN@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh48:
	ldr	w9, [x10]
	orr	w8, w8, w9
	ldr	x9, [x19, #24]
Lloh49:
	adrp	x10, _I2C_CONTROL_DMAACK_EN@GOTPAGE
Lloh50:
	ldr	x10, [x10, _I2C_CONTROL_DMAACK_EN@GOTPAGEOFF]
	ldr	x9, [x9]
Lloh51:
	ldr	w10, [x10]
Lloh52:
	adrp	x11, _I2C_CONTROL_ASYNC_MODE@GOTPAGE
Lloh53:
	ldr	x11, [x11, _I2C_CONTROL_ASYNC_MODE@GOTPAGEOFF]
Lloh54:
	ldr	w11, [x11]
	orr	w10, w11, w10
	cmp	x9, #0
	csel	w9, wzr, w10, eq
	orr	w1, w8, w9
Lloh55:
	adrp	x8, _OFFSET_CONTROL@GOTPAGE
Lloh56:
	ldr	x8, [x8, _OFFSET_CONTROL@GOTPAGEOFF]
Lloh57:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_i2c_writew
Lloh58:
	adrp	x8, _I2C_DELAY_LEN@GOTPAGE
Lloh59:
	ldr	x8, [x8, _I2C_DELAY_LEN@GOTPAGEOFF]
Lloh60:
	ldr	w1, [x8]
Lloh61:
	adrp	x8, _OFFSET_DELAY_LEN@GOTPAGE
Lloh62:
	ldr	x8, [x8, _OFFSET_DELAY_LEN@GOTPAGEOFF]
Lloh63:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_mtk_i2c_writew
Lloh64:
	adrp	x8, _I2C_DMA_HARD_RST@GOTPAGE
Lloh65:
	ldr	x8, [x8, _I2C_DMA_HARD_RST@GOTPAGEOFF]
Lloh66:
	ldr	w0, [x8]
	ldr	x8, [x19, #16]
Lloh67:
	adrp	x20, _OFFSET_RST@GOTPAGE
Lloh68:
	ldr	x20, [x20, _OFFSET_RST@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_writel
	mov	w0, #50
	bl	_udelay
Lloh69:
	adrp	x8, _I2C_DMA_CLR_FLAG@GOTPAGE
Lloh70:
	ldr	x8, [x8, _I2C_DMA_CLR_FLAG@GOTPAGEOFF]
Lloh71:
	ldr	w0, [x8]
	ldr	x8, [x19, #16]
	ldr	x9, [x20]
	add	x1, x9, x8
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_writel
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.cfi_endproc
                                        ; -- End function
	.comm	_I2C_SOFT_RST,4,2               ; @I2C_SOFT_RST
	.comm	_OFFSET_SOFTRESET,4,2           ; @OFFSET_SOFTRESET
	.comm	_I2C_IO_CONFIG_PUSH_PULL,4,2    ; @I2C_IO_CONFIG_PUSH_PULL
	.comm	_OFFSET_IO_CONFIG,4,2           ; @OFFSET_IO_CONFIG
	.comm	_I2C_IO_CONFIG_OPEN_DRAIN,4,2   ; @I2C_IO_CONFIG_OPEN_DRAIN
	.comm	_I2C_DCM_DISABLE,4,2            ; @I2C_DCM_DISABLE
	.comm	_OFFSET_DCM_EN,4,2              ; @OFFSET_DCM_EN
	.comm	_I2C_DEFAULT_CLK_DIV,4,2        ; @I2C_DEFAULT_CLK_DIV
	.comm	_OFFSET_CLOCK_DIV,4,2           ; @OFFSET_CLOCK_DIV
	.comm	_OFFSET_TIMING,4,2              ; @OFFSET_TIMING
	.comm	_OFFSET_HS,4,2                  ; @OFFSET_HS
	.comm	_OFFSET_LTIMING,4,2             ; @OFFSET_LTIMING
	.comm	_I2C_CONTROL_WRAPPER,4,2        ; @I2C_CONTROL_WRAPPER
	.comm	_OFFSET_PATH_DIR,4,2            ; @OFFSET_PATH_DIR
	.comm	_I2C_CONTROL_ACKERR_DET_EN,4,2  ; @I2C_CONTROL_ACKERR_DET_EN
	.comm	_I2C_CONTROL_CLK_EXT_EN,4,2     ; @I2C_CONTROL_CLK_EXT_EN
	.comm	_I2C_CONTROL_DMA_EN,4,2         ; @I2C_CONTROL_DMA_EN
	.comm	_I2C_CONTROL_DMAACK_EN,4,2      ; @I2C_CONTROL_DMAACK_EN
	.comm	_I2C_CONTROL_ASYNC_MODE,4,2     ; @I2C_CONTROL_ASYNC_MODE
	.comm	_OFFSET_CONTROL,4,2             ; @OFFSET_CONTROL
	.comm	_I2C_DELAY_LEN,4,2              ; @I2C_DELAY_LEN
	.comm	_OFFSET_DELAY_LEN,4,2           ; @OFFSET_DELAY_LEN
	.comm	_I2C_DMA_HARD_RST,4,2           ; @I2C_DMA_HARD_RST
	.comm	_OFFSET_RST,8,3                 ; @OFFSET_RST
	.comm	_I2C_DMA_CLR_FLAG,4,2           ; @I2C_DMA_CLR_FLAG
	.no_dead_strip	_mtk_i2c_init_hw
.subsections_via_symbols
