	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rv6xx_program_power_level_medium
_rv6xx_program_power_level_medium:      ## @rv6xx_program_power_level_medium
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_rv6xx_get_pi
	movq	%rax, %r14
	movq	_R600_POWER_LEVEL_MEDIUM@GOTPCREL(%rip), %r15
	movq	(%r15), %rsi
	movl	16(%rax), %edx
	movq	%rbx, %rdi
	callq	_r600_power_level_set_voltage_index
	movq	(%r15), %rsi
	movl	12(%r14), %edx
	movq	%rbx, %rdi
	callq	_r600_power_level_set_mem_clock_index
	movq	(%r15), %rsi
	movl	8(%r14), %edx
	movq	%rbx, %rdi
	callq	_r600_power_level_set_eng_clock_index
	movq	(%r15), %rsi
	movq	_R600_DISPLAY_WATERMARK_LOW@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_r600_power_level_set_watermark_id
	movq	(%r15), %rsi
	movq	(%r14), %rax
	movl	(%rax,%rsi,4), %edx
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_r600_power_level_set_pcie_gen2 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_R600_POWER_LEVEL_MEDIUM,8,3    ## @R600_POWER_LEVEL_MEDIUM
	.comm	_R600_DISPLAY_WATERMARK_LOW,4,2 ## @R600_DISPLAY_WATERMARK_LOW
	.no_dead_strip	_rv6xx_program_power_level_medium
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rv6xx_program_power_level_medium
_rv6xx_program_power_level_medium:      ; @rv6xx_program_power_level_medium
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_rv6xx_get_pi
	mov	x20, x0
Lloh0:
	adrp	x21, _R600_POWER_LEVEL_MEDIUM@GOTPAGE
Lloh1:
	ldr	x21, [x21, _R600_POWER_LEVEL_MEDIUM@GOTPAGEOFF]
	ldr	x1, [x21]
	ldr	w2, [x0, #16]
	mov	x0, x19
	bl	_r600_power_level_set_voltage_index
	ldr	x1, [x21]
	ldr	w2, [x20, #12]
	mov	x0, x19
	bl	_r600_power_level_set_mem_clock_index
	ldr	x1, [x21]
	ldr	w2, [x20, #8]
	mov	x0, x19
	bl	_r600_power_level_set_eng_clock_index
	ldr	x1, [x21]
Lloh2:
	adrp	x8, _R600_DISPLAY_WATERMARK_LOW@GOTPAGE
Lloh3:
	ldr	x8, [x8, _R600_DISPLAY_WATERMARK_LOW@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_r600_power_level_set_watermark_id
	ldr	x1, [x21]
	ldr	x8, [x20]
	ldr	w2, [x8, x1, lsl #2]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_r600_power_level_set_pcie_gen2
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_R600_POWER_LEVEL_MEDIUM,8,3    ; @R600_POWER_LEVEL_MEDIUM
	.comm	_R600_DISPLAY_WATERMARK_LOW,4,2 ; @R600_DISPLAY_WATERMARK_LOW
	.no_dead_strip	_rv6xx_program_power_level_medium
.subsections_via_symbols
