	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vi_get_register_value
_vi_get_register_value:                 ## @vi_get_register_value
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, %ebx
	movq	%rdi, %r14
	testl	%esi, %esi
	je	LBB0_13
## %bb.1:
	movl	%ecx, %r15d
	movl	%edx, %r12d
	xorl	%eax, %eax
	cmpl	$-1, %edx
	movl	%edx, %ecx
	cmovel	%eax, %ecx
	cmpl	$-1, %r15d
	cmovnel	%r15d, %eax
	cmpl	$130, %ebx
	jg	LBB0_5
## %bb.2:
	cmpl	$128, %ebx
	je	LBB0_8
## %bb.3:
	cmpl	$129, %ebx
	jne	LBB0_9
## %bb.4:
	movq	24(%r14), %rdx
	movl	%ecx, %ecx
	movq	(%rdx,%rcx,8), %rcx
	movl	%eax, %eax
	shlq	$4, %rax
	movl	4(%rcx,%rax), %ebx
	jmp	LBB0_21
LBB0_13:
	leal	-130(%rbx), %eax
	cmpl	$50, %eax
	ja	LBB0_19
## %bb.14:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_17:
	addl	$-163, %ebx
	movq	8(%r14), %rax
	movl	(%rax,%rbx,4), %ebx
	jmp	LBB0_21
LBB0_5:
	cmpl	$131, %ebx
	je	LBB0_20
## %bb.6:
	cmpl	$181, %ebx
	jne	LBB0_9
## %bb.7:
	movq	24(%r14), %rdx
	movl	%ecx, %ecx
	movq	(%rdx,%rcx,8), %rcx
	movl	%eax, %eax
	shlq	$4, %rax
	movl	12(%rcx,%rax), %ebx
	jmp	LBB0_21
LBB0_8:
	movq	24(%r14), %rdx
	movl	%ecx, %ecx
	movq	(%rdx,%rcx,8), %rcx
	movl	%eax, %eax
	shlq	$4, %rax
	movl	(%rcx,%rax), %ebx
	jmp	LBB0_21
LBB0_20:
	movq	24(%r14), %rdx
	movl	%ecx, %ecx
	movq	(%rdx,%rcx,8), %rcx
	movl	%eax, %eax
	shlq	$4, %rax
	movl	8(%rcx,%rax), %ebx
	jmp	LBB0_21
LBB0_9:
	leaq	32(%r14), %r13
	movq	%r13, %rdi
	callq	_mutex_lock
	movl	%r15d, %eax
	andl	%r12d, %eax
	cmpl	$-1, %eax
	je	LBB0_10
## %bb.11:
	movq	%r14, %rdi
	movl	%r12d, %esi
	movl	%r15d, %edx
	movl	$-1, %ecx
	callq	_amdgpu_gfx_select_se_sh
	movl	%ebx, %edi
	callq	_RREG32
	movl	%eax, %ebx
	movq	%r14, %rdi
	movl	$-1, %esi
	movl	$-1, %edx
	movl	$-1, %ecx
	callq	_amdgpu_gfx_select_se_sh
	jmp	LBB0_12
LBB0_18:
	addl	$-179, %ebx
	movq	(%r14), %rax
	movl	(%rax,%rbx,4), %ebx
	jmp	LBB0_21
LBB0_10:
	movl	%ebx, %edi
	callq	_RREG32
	movl	%eax, %ebx
LBB0_12:
	movq	%r13, %rdi
	callq	_mutex_unlock
LBB0_21:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_16:
	movl	16(%r14), %ebx
	jmp	LBB0_21
LBB0_19:
	movl	%ebx, %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_RREG32                         ## TAILCALL
LBB0_15:
	movl	20(%r14), %ebx
	jmp	LBB0_21
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_19, LBB0_19-LJTI0_0
.set L0_0_set_17, LBB0_17-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
LJTI0_0:
	.long	L0_0_set_16
	.long	L0_0_set_19
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_17
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_18
	.long	L0_0_set_15
	.end_data_region
                                        ## -- End function
	.no_dead_strip	_vi_get_register_value
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vi_get_register_value
_vi_get_register_value:                 ; @vi_get_register_value
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x4
	mov	x19, x0
	cbz	w1, LBB0_5
; %bb.1:
	mov	x21, x3
	mov	x23, x2
	cmn	w2, #1
	csel	w9, wzr, w2, eq
	cmn	w3, #1
	csel	w8, wzr, w3, eq
	cmp	w20, #130
	b.gt	LBB0_8
; %bb.2:
	cmp	w20, #128
	b.eq	LBB0_11
; %bb.3:
	cmp	w20, #129
	b.ne	LBB0_13
; %bb.4:
	ldr	x10, [x19, #24]
	ldr	x9, [x10, w9, uxtw #3]
	add	x8, x9, w8, uxtw #4
	ldr	w20, [x8, #4]
	b	LBB0_18
LBB0_5:
	sub	w8, w20, #130
	cmp	w8, #50
	b.hi	LBB0_20
; %bb.6:
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_7
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_7:
	sub	w8, w20, #163
	ldr	x9, [x19, #8]
	ldr	w20, [x9, w8, uxtw #2]
	b	LBB0_18
LBB0_8:
	cmp	w20, #131
	b.eq	LBB0_12
; %bb.9:
	cmp	w20, #181
	b.ne	LBB0_13
; %bb.10:
	ldr	x10, [x19, #24]
	ldr	x9, [x10, w9, uxtw #3]
	add	x8, x9, w8, uxtw #4
	ldr	w20, [x8, #12]
	b	LBB0_18
LBB0_11:
	ldr	x10, [x19, #24]
	ldr	x9, [x10, w9, uxtw #3]
	lsl	x8, x8, #4
	ldr	w20, [x9, x8]
	b	LBB0_18
LBB0_12:
	ldr	x10, [x19, #24]
	ldr	x9, [x10, w9, uxtw #3]
	add	x8, x9, w8, uxtw #4
	ldr	w20, [x8, #8]
	b	LBB0_18
LBB0_13:
	add	x22, x19, #32
	mov	x0, x22
	bl	_mutex_lock
	and	w8, w21, w23
	cmn	w8, #1
	b.eq	LBB0_16
; %bb.14:
	mov	x0, x19
	mov	x1, x23
	mov	x2, x21
	mov	w3, #-1
	bl	_amdgpu_gfx_select_se_sh
	mov	x0, x20
	bl	_RREG32
	mov	x20, x0
	mov	x0, x19
	mov	w1, #-1
	mov	w2, #-1
	mov	w3, #-1
	bl	_amdgpu_gfx_select_se_sh
	b	LBB0_17
LBB0_15:
	sub	w8, w20, #179
	ldr	x9, [x19]
	ldr	w20, [x9, w8, uxtw #2]
	b	LBB0_18
LBB0_16:
	mov	x0, x20
	bl	_RREG32
	mov	x20, x0
LBB0_17:
	mov	x0, x22
	bl	_mutex_unlock
LBB0_18:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_19:
	ldr	w20, [x19, #16]
	b	LBB0_18
LBB0_20:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_RREG32
LBB0_21:
	ldr	w20, [x19, #20]
	b	LBB0_18
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_19-LBB0_7)>>2
	.byte	(LBB0_20-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_7-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_15-LBB0_7)>>2
	.byte	(LBB0_21-LBB0_7)>>2
                                        ; -- End function
	.no_dead_strip	_vi_get_register_value
.subsections_via_symbols
