	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cik_gfx_is_lockup              ## -- Begin function cik_gfx_is_lockup
	.p2align	4, 0x90
_cik_gfx_is_lockup:                     ## @cik_gfx_is_lockup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	callq	_cik_gpu_check_soft_reset
	movq	_RADEON_RESET_GFX@GOTPCREL(%rip), %rcx
	movq	_RADEON_RESET_COMPUTE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movq	_RADEON_RESET_CP@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	testl	%eax, %edx
	je	LBB0_1
## %bb.2:
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_radeon_ring_test_lockup        ## TAILCALL
LBB0_1:
	callq	_radeon_ring_lockup_update
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_RESET_GFX,4,2           ## @RADEON_RESET_GFX
	.comm	_RADEON_RESET_COMPUTE,4,2       ## @RADEON_RESET_COMPUTE
	.comm	_RADEON_RESET_CP,4,2            ## @RADEON_RESET_CP
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cik_gfx_is_lockup              ; -- Begin function cik_gfx_is_lockup
	.p2align	2
_cik_gfx_is_lockup:                     ; @cik_gfx_is_lockup
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	mov	x20, x0
	bl	_cik_gpu_check_soft_reset
Lloh0:
	adrp	x8, _RADEON_RESET_GFX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RADEON_RESET_GFX@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _RADEON_RESET_COMPUTE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _RADEON_RESET_COMPUTE@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh6:
	adrp	x9, _RADEON_RESET_CP@GOTPAGE
Lloh7:
	ldr	x9, [x9, _RADEON_RESET_CP@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w8, w9
	tst	w8, w0
	b.eq	LBB0_2
; %bb.1:
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_radeon_ring_test_lockup
LBB0_2:
	mov	x0, x20
	mov	x1, x19
	bl	_radeon_ring_lockup_update
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_RESET_GFX,4,2           ; @RADEON_RESET_GFX
	.comm	_RADEON_RESET_COMPUTE,4,2       ; @RADEON_RESET_COMPUTE
	.comm	_RADEON_RESET_CP,4,2            ; @RADEON_RESET_CP
.subsections_via_symbols
