	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_msi_ok
_radeon_msi_ok:                         ## @radeon_msi_ok
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	(%rdi), %rax
	movq	_CHIP_RV380@GOTPCREL(%rip), %rcx
	xorl	%r14d, %r14d
	cmpq	(%rcx), %rax
	jl	LBB0_18
## %bb.1:
	movq	%rdi, %rbx
	movq	_RADEON_IS_AGP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, 8(%rdi)
	je	LBB0_2
LBB0_18:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_2:
	movq	_CHIP_BONAIRE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_4
## %bb.3:
	movl	24(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_info
	movq	16(%rbx), %rax
	movl	$1, (%rax)
LBB0_4:
	movq	_radeon_msi@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	$1, %eax
	je	LBB0_5
## %bb.6:
	testl	%eax, %eax
	je	LBB0_18
## %bb.7:
	movq	16(%rbx), %rax
	cmpl	$31007, 4(%rax)                 ## imm = 0x791F
	jne	LBB0_14
## %bb.8:
	movl	8(%rax), %ecx
	cmpl	$4136, %ecx                     ## imm = 0x1028
	je	LBB0_12
## %bb.9:
	cmpl	$4219, %ecx                     ## imm = 0x107B
	je	LBB0_13
## %bb.10:
	cmpl	$4156, %ecx                     ## imm = 0x103C
	jne	LBB0_14
## %bb.11:
	movl	$1, %r14d
	cmpl	$12482, 12(%rax)                ## imm = 0x30C2
	je	LBB0_18
	jmp	LBB0_14
LBB0_5:
	movl	%eax, %r14d
	jmp	LBB0_18
LBB0_12:
	movl	12(%rax), %eax
	andl	$-2, %eax
	movl	$1, %r14d
	cmpl	$508, %eax                      ## imm = 0x1FC
	je	LBB0_18
	jmp	LBB0_14
LBB0_13:
	movl	$1, %r14d
	cmpl	$389, 12(%rax)                  ## imm = 0x185
	je	LBB0_18
LBB0_14:
	movq	(%rbx), %rax
	movq	_CHIP_RS690@GOTPCREL(%rip), %rcx
	movl	$1, %r14d
	cmpq	(%rcx), %rax
	je	LBB0_18
## %bb.15:
	movq	_CHIP_RV515@GOTPCREL(%rip), %rcx
	movl	$0, %r14d
	cmpq	(%rcx), %rax
	je	LBB0_18
## %bb.16:
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	$1, %r14d
	testl	%ecx, 8(%rbx)
	je	LBB0_18
## %bb.17:
	movq	_CHIP_PALM@GOTPCREL(%rip), %rcx
	xorl	%r14d, %r14d
	cmpq	(%rcx), %rax
	setge	%r14b
	jmp	LBB0_18
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_RV380,8,3                 ## @CHIP_RV380
	.comm	_RADEON_IS_AGP,4,2              ## @RADEON_IS_AGP
	.comm	_CHIP_BONAIRE,8,3               ## @CHIP_BONAIRE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"radeon: MSI limited to 32-bit\n"

	.comm	_radeon_msi,4,2                 ## @radeon_msi
	.comm	_CHIP_RS690,8,3                 ## @CHIP_RS690
	.comm	_CHIP_RV515,8,3                 ## @CHIP_RV515
	.comm	_RADEON_IS_IGP,4,2              ## @RADEON_IS_IGP
	.comm	_CHIP_PALM,8,3                  ## @CHIP_PALM
	.no_dead_strip	_radeon_msi_ok
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_msi_ok
_radeon_msi_ok:                         ; @radeon_msi_ok
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _CHIP_RV380@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_RV380@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_2
; %bb.1:
	mov	x19, x0
	ldr	w9, [x0, #8]
Lloh3:
	adrp	x10, _RADEON_IS_AGP@GOTPAGE
Lloh4:
	ldr	x10, [x10, _RADEON_IS_AGP@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	tst	w10, w9
	b.eq	LBB0_4
LBB0_2:
	mov	w0, #0
LBB0_3:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_4:
Lloh6:
	adrp	x9, _CHIP_BONAIRE@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CHIP_BONAIRE@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_6
; %bb.5:
	ldr	w0, [x19, #24]
Lloh9:
	adrp	x1, l_.str@PAGE
Lloh10:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_info
	ldr	x8, [x19, #16]
	mov	w9, #1
	str	w9, [x8]
LBB0_6:
Lloh11:
	adrp	x8, _radeon_msi@GOTPAGE
Lloh12:
	ldr	x8, [x8, _radeon_msi@GOTPAGEOFF]
Lloh13:
	ldr	w0, [x8]
	cmp	w0, #1
	b.eq	LBB0_3
; %bb.7:
	cbz	w0, LBB0_3
; %bb.8:
	ldr	x8, [x19, #16]
	ldr	w9, [x8, #4]
	mov	w10, #31007
	cmp	w9, w10
	b.ne	LBB0_15
; %bb.9:
	ldr	w9, [x8, #8]
	mov	w10, #4136
	cmp	w9, w10
	b.eq	LBB0_13
; %bb.10:
	mov	w10, #4219
	cmp	w9, w10
	b.eq	LBB0_14
; %bb.11:
	mov	w10, #4156
	cmp	w9, w10
	b.ne	LBB0_15
; %bb.12:
	ldr	w8, [x8, #12]
	mov	w9, #12482
	cmp	w8, w9
	b.ne	LBB0_15
	b	LBB0_16
LBB0_13:
	ldr	w8, [x8, #12]
	and	w8, w8, #0xfffffffe
	cmp	w8, #508
	b.eq	LBB0_16
	b	LBB0_15
LBB0_14:
	ldr	w8, [x8, #12]
	cmp	w8, #389
	b.eq	LBB0_16
LBB0_15:
	ldr	x8, [x19]
Lloh14:
	adrp	x9, _CHIP_RS690@GOTPAGE
Lloh15:
	ldr	x9, [x9, _CHIP_RS690@GOTPAGEOFF]
Lloh16:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_17
LBB0_16:
	mov	w0, #1
	b	LBB0_3
LBB0_17:
Lloh17:
	adrp	x9, _CHIP_RV515@GOTPAGE
Lloh18:
	ldr	x9, [x9, _CHIP_RV515@GOTPAGEOFF]
Lloh19:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_2
; %bb.18:
	ldr	w9, [x19, #8]
Lloh20:
	adrp	x10, _RADEON_IS_IGP@GOTPAGE
Lloh21:
	ldr	x10, [x10, _RADEON_IS_IGP@GOTPAGEOFF]
Lloh22:
	ldr	w10, [x10]
	tst	w10, w9
	b.eq	LBB0_16
; %bb.19:
Lloh23:
	adrp	x9, _CHIP_PALM@GOTPAGE
Lloh24:
	ldr	x9, [x9, _CHIP_PALM@GOTPAGEOFF]
Lloh25:
	ldr	x9, [x9]
	cmp	x8, x9
	cset	w0, ge
	b	LBB0_3
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_RV380,8,3                 ; @CHIP_RV380
	.comm	_RADEON_IS_AGP,4,2              ; @RADEON_IS_AGP
	.comm	_CHIP_BONAIRE,8,3               ; @CHIP_BONAIRE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"radeon: MSI limited to 32-bit\n"

	.comm	_radeon_msi,4,2                 ; @radeon_msi
	.comm	_CHIP_RS690,8,3                 ; @CHIP_RS690
	.comm	_CHIP_RV515,8,3                 ; @CHIP_RV515
	.comm	_RADEON_IS_IGP,4,2              ; @RADEON_IS_IGP
	.comm	_CHIP_PALM,8,3                  ; @CHIP_PALM
	.no_dead_strip	_radeon_msi_ok
.subsections_via_symbols
