	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function a6xx_gmu_power_config
_a6xx_gmu_power_config:                 ## @a6xx_gmu_power_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_REG_A6XX_GMU_SYS_BUS_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_gmu_write
	movq	_REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$163841024, %edx                ## imm = 0x9C40400
	callq	_gmu_write
	movl	(%rbx), %eax
	cmpl	$128, %eax
	je	LBB0_3
## %bb.1:
	cmpl	$129, %eax
	jne	LBB0_4
## %bb.2:
	movq	_REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_GMU_PWR_COL_HYST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_gmu_write
	movl	(%r14), %esi
	movq	_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE@GOTPCREL(%rip), %rax
	movq	_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_gmu_rmw
LBB0_3:
	movq	_REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_GMU_PWR_COL_HYST@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_gmu_write
	movl	(%r14), %esi
	movq	_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE@GOTPCREL(%rip), %rax
	movq	_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_SPTPRAC_POWER_CONTROL_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_gmu_rmw
LBB0_4:
	movq	_A6XX_GMU_RPMH_CTRL_RPMH_INTERFACE_ENABLE@GOTPCREL(%rip), %rax
	movq	_A6XX_GMU_RPMH_CTRL_LLC_VOTE_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_A6XX_GMU_RPMH_CTRL_DDR_VOTE_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_REG_A6XX_GMU_RPMH_CTRL@GOTPCREL(%rip), %rax
	movq	_A6XX_GMU_RPMH_CTRL_MX_VOTE_ENABLE@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	movl	(%rax), %esi
	movq	_A6XX_GMU_RPMH_CTRL_CX_VOTE_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	%rbx, %rdi
	xorl	%edx, %edx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_gmu_rmw                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_A6XX_GMU_SYS_BUS_CONFIG,4,2 ## @REG_A6XX_GMU_SYS_BUS_CONFIG
	.comm	_REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL,4,2 ## @REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL
	.comm	_REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST,4,2 ## @REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST
	.comm	_GMU_PWR_COL_HYST,4,2           ## @GMU_PWR_COL_HYST
	.comm	_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE,4,2 ## @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE
	.comm	_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE,4,2 ## @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE
	.comm	_REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST,4,2 ## @REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST
	.comm	_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_SPTPRAC_POWER_CONTROL_ENABLE,4,2 ## @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_SPTPRAC_POWER_CONTROL_ENABLE
	.comm	_REG_A6XX_GMU_RPMH_CTRL,4,2     ## @REG_A6XX_GMU_RPMH_CTRL
	.comm	_A6XX_GMU_RPMH_CTRL_RPMH_INTERFACE_ENABLE,4,2 ## @A6XX_GMU_RPMH_CTRL_RPMH_INTERFACE_ENABLE
	.comm	_A6XX_GMU_RPMH_CTRL_LLC_VOTE_ENABLE,4,2 ## @A6XX_GMU_RPMH_CTRL_LLC_VOTE_ENABLE
	.comm	_A6XX_GMU_RPMH_CTRL_DDR_VOTE_ENABLE,4,2 ## @A6XX_GMU_RPMH_CTRL_DDR_VOTE_ENABLE
	.comm	_A6XX_GMU_RPMH_CTRL_MX_VOTE_ENABLE,4,2 ## @A6XX_GMU_RPMH_CTRL_MX_VOTE_ENABLE
	.comm	_A6XX_GMU_RPMH_CTRL_CX_VOTE_ENABLE,4,2 ## @A6XX_GMU_RPMH_CTRL_CX_VOTE_ENABLE
	.comm	_A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE,4,2 ## @A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE
	.no_dead_strip	_a6xx_gmu_power_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function a6xx_gmu_power_config
_a6xx_gmu_power_config:                 ; @a6xx_gmu_power_config
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _REG_A6XX_GMU_SYS_BUS_CONFIG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _REG_A6XX_GMU_SYS_BUS_CONFIG@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	w2, #1
	bl	_gmu_write
Lloh3:
	adrp	x20, _REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL@GOTPAGE
Lloh4:
	ldr	x20, [x20, _REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #1024
	movk	w2, #2500, lsl #16
	bl	_gmu_write
	ldr	w8, [x19]
Lloh5:
	adrp	x22, _GMU_PWR_COL_HYST@GOTPAGE
Lloh6:
	ldr	x22, [x22, _GMU_PWR_COL_HYST@GOTPAGEOFF]
Lloh7:
	adrp	x21, _A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE@GOTPAGE
Lloh8:
	ldr	x21, [x21, _A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE@GOTPAGEOFF]
	cmp	w8, #128
	b.eq	LBB0_3
; %bb.1:
	cmp	w8, #129
	b.ne	LBB0_4
; %bb.2:
Lloh9:
	adrp	x8, _REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST@GOTPAGE
Lloh10:
	ldr	x8, [x8, _REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	w2, [x22]
	mov	x0, x19
	bl	_gmu_write
	ldr	w1, [x20]
	ldr	w8, [x21]
Lloh12:
	adrp	x9, _A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE@GOTPAGE
Lloh13:
	ldr	x9, [x9, _A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w3, w9, w8
	mov	x0, x19
	mov	w2, #0
	bl	_gmu_rmw
LBB0_3:
Lloh15:
	adrp	x8, _REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST@GOTPAGE
Lloh16:
	ldr	x8, [x8, _REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	ldr	w2, [x22]
	mov	x0, x19
	bl	_gmu_write
	ldr	w1, [x20]
	ldr	w8, [x21]
Lloh18:
	adrp	x9, _A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_SPTPRAC_POWER_CONTROL_ENABLE@GOTPAGE
Lloh19:
	ldr	x9, [x9, _A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_SPTPRAC_POWER_CONTROL_ENABLE@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w3, w9, w8
	mov	x0, x19
	mov	w2, #0
	bl	_gmu_rmw
LBB0_4:
Lloh21:
	adrp	x8, _REG_A6XX_GMU_RPMH_CTRL@GOTPAGE
Lloh22:
	ldr	x8, [x8, _REG_A6XX_GMU_RPMH_CTRL@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
Lloh24:
	adrp	x8, _A6XX_GMU_RPMH_CTRL_RPMH_INTERFACE_ENABLE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _A6XX_GMU_RPMH_CTRL_RPMH_INTERFACE_ENABLE@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
Lloh27:
	adrp	x9, _A6XX_GMU_RPMH_CTRL_LLC_VOTE_ENABLE@GOTPAGE
Lloh28:
	ldr	x9, [x9, _A6XX_GMU_RPMH_CTRL_LLC_VOTE_ENABLE@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh30:
	adrp	x9, _A6XX_GMU_RPMH_CTRL_DDR_VOTE_ENABLE@GOTPAGE
Lloh31:
	ldr	x9, [x9, _A6XX_GMU_RPMH_CTRL_DDR_VOTE_ENABLE@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh33:
	adrp	x9, _A6XX_GMU_RPMH_CTRL_MX_VOTE_ENABLE@GOTPAGE
Lloh34:
	ldr	x9, [x9, _A6XX_GMU_RPMH_CTRL_MX_VOTE_ENABLE@GOTPAGEOFF]
Lloh35:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh36:
	adrp	x9, _A6XX_GMU_RPMH_CTRL_CX_VOTE_ENABLE@GOTPAGE
Lloh37:
	ldr	x9, [x9, _A6XX_GMU_RPMH_CTRL_CX_VOTE_ENABLE@GOTPAGEOFF]
Lloh38:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh39:
	adrp	x9, _A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE@GOTPAGE
Lloh40:
	ldr	x9, [x9, _A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	orr	w3, w8, w9
	mov	x0, x19
	mov	w2, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_gmu_rmw
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_A6XX_GMU_SYS_BUS_CONFIG,4,2 ; @REG_A6XX_GMU_SYS_BUS_CONFIG
	.comm	_REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL,4,2 ; @REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL
	.comm	_REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST,4,2 ; @REG_A6XX_GMU_PWR_COL_INTER_FRAME_HYST
	.comm	_GMU_PWR_COL_HYST,4,2           ; @GMU_PWR_COL_HYST
	.comm	_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE,4,2 ; @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE
	.comm	_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE,4,2 ; @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE
	.comm	_REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST,4,2 ; @REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST
	.comm	_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_SPTPRAC_POWER_CONTROL_ENABLE,4,2 ; @A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_SPTPRAC_POWER_CONTROL_ENABLE
	.comm	_REG_A6XX_GMU_RPMH_CTRL,4,2     ; @REG_A6XX_GMU_RPMH_CTRL
	.comm	_A6XX_GMU_RPMH_CTRL_RPMH_INTERFACE_ENABLE,4,2 ; @A6XX_GMU_RPMH_CTRL_RPMH_INTERFACE_ENABLE
	.comm	_A6XX_GMU_RPMH_CTRL_LLC_VOTE_ENABLE,4,2 ; @A6XX_GMU_RPMH_CTRL_LLC_VOTE_ENABLE
	.comm	_A6XX_GMU_RPMH_CTRL_DDR_VOTE_ENABLE,4,2 ; @A6XX_GMU_RPMH_CTRL_DDR_VOTE_ENABLE
	.comm	_A6XX_GMU_RPMH_CTRL_MX_VOTE_ENABLE,4,2 ; @A6XX_GMU_RPMH_CTRL_MX_VOTE_ENABLE
	.comm	_A6XX_GMU_RPMH_CTRL_CX_VOTE_ENABLE,4,2 ; @A6XX_GMU_RPMH_CTRL_CX_VOTE_ENABLE
	.comm	_A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE,4,2 ; @A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE
	.no_dead_strip	_a6xx_gmu_power_config
.subsections_via_symbols
