	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gmc_v7_0_enable_bif_mgls
_gmc_v7_0_enable_bif_mgls:              ## @gmc_v7_0_enable_bif_mgls
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r15
	movq	_ixPCIE_CNTL2@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_RREG32_PCIE
	movq	%rax, %r14
	testl	%ebx, %ebx
	je	LBB0_2
## %bb.1:
	movq	_AMD_CG_SUPPORT_BIF_LS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	$1, %ebx
	testl	%eax, (%r15)
	jne	LBB0_3
LBB0_2:
	xorl	%ebx, %ebx
LBB0_3:
	movq	_PCIE_CNTL2@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_SLV_MEM_LS_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r15), %esi
	movq	_MST_MEM_LS_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r15), %esi
	movq	_REPLAY_MEM_LS_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r15), %esi
	movq	_SLV_MEM_AGGRESSIVE_LS_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	movl	%ebx, %ecx
	callq	_REG_SET_FIELD
	cmpq	%rax, %r14
	jne	LBB0_5
## %bb.4:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	movl	(%r12), %edi
	movq	%rax, %rsi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32_PCIE                    ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ixPCIE_CNTL2,4,2               ## @ixPCIE_CNTL2
	.comm	_AMD_CG_SUPPORT_BIF_LS,4,2      ## @AMD_CG_SUPPORT_BIF_LS
	.comm	_PCIE_CNTL2,4,2                 ## @PCIE_CNTL2
	.comm	_SLV_MEM_LS_EN,4,2              ## @SLV_MEM_LS_EN
	.comm	_MST_MEM_LS_EN,4,2              ## @MST_MEM_LS_EN
	.comm	_REPLAY_MEM_LS_EN,4,2           ## @REPLAY_MEM_LS_EN
	.comm	_SLV_MEM_AGGRESSIVE_LS_EN,4,2   ## @SLV_MEM_AGGRESSIVE_LS_EN
	.no_dead_strip	_gmc_v7_0_enable_bif_mgls
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gmc_v7_0_enable_bif_mgls
_gmc_v7_0_enable_bif_mgls:              ; @gmc_v7_0_enable_bif_mgls
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x1
	mov	x20, x0
Lloh0:
	adrp	x22, _ixPCIE_CNTL2@GOTPAGE
Lloh1:
	ldr	x22, [x22, _ixPCIE_CNTL2@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_RREG32_PCIE
	mov	x19, x0
	cbz	w21, LBB0_3
; %bb.1:
	ldr	w8, [x20]
Lloh2:
	adrp	x9, _AMD_CG_SUPPORT_BIF_LS@GOTPAGE
Lloh3:
	ldr	x9, [x9, _AMD_CG_SUPPORT_BIF_LS@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.2:
	mov	w20, #1
	b	LBB0_4
LBB0_3:
	mov	w20, #0
LBB0_4:
Lloh5:
	adrp	x21, _PCIE_CNTL2@GOTPAGE
Lloh6:
	ldr	x21, [x21, _PCIE_CNTL2@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh7:
	adrp	x8, _SLV_MEM_LS_EN@GOTPAGE
Lloh8:
	ldr	x8, [x8, _SLV_MEM_LS_EN@GOTPAGEOFF]
Lloh9:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x3, x20
	bl	_REG_SET_FIELD
	ldr	w1, [x21]
Lloh10:
	adrp	x8, _MST_MEM_LS_EN@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MST_MEM_LS_EN@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
	mov	x3, x20
	bl	_REG_SET_FIELD
	ldr	w1, [x21]
Lloh13:
	adrp	x8, _REPLAY_MEM_LS_EN@GOTPAGE
Lloh14:
	ldr	x8, [x8, _REPLAY_MEM_LS_EN@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	mov	x3, x20
	bl	_REG_SET_FIELD
	ldr	w1, [x21]
Lloh16:
	adrp	x8, _SLV_MEM_AGGRESSIVE_LS_EN@GOTPAGE
Lloh17:
	ldr	x8, [x8, _SLV_MEM_AGGRESSIVE_LS_EN@GOTPAGEOFF]
Lloh18:
	ldr	w2, [x8]
	mov	x3, x20
	bl	_REG_SET_FIELD
	cmp	x19, x0
	b.ne	LBB0_6
; %bb.5:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_6:
	mov	x1, x0
	ldr	w0, [x22]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32_PCIE
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_ixPCIE_CNTL2,4,2               ; @ixPCIE_CNTL2
	.comm	_AMD_CG_SUPPORT_BIF_LS,4,2      ; @AMD_CG_SUPPORT_BIF_LS
	.comm	_PCIE_CNTL2,4,2                 ; @PCIE_CNTL2
	.comm	_SLV_MEM_LS_EN,4,2              ; @SLV_MEM_LS_EN
	.comm	_MST_MEM_LS_EN,4,2              ; @MST_MEM_LS_EN
	.comm	_REPLAY_MEM_LS_EN,4,2           ; @REPLAY_MEM_LS_EN
	.comm	_SLV_MEM_AGGRESSIVE_LS_EN,4,2   ; @SLV_MEM_AGGRESSIVE_LS_EN
	.no_dead_strip	_gmc_v7_0_enable_bif_mgls
.subsections_via_symbols
