	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_g12a_crtc_enable_osd1
_meson_g12a_crtc_enable_osd1:           ## @meson_g12a_crtc_enable_osd1
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movl	20(%rdi), %r14d
	movq	(%rdi), %r15
	movq	_VIU_OSD_BLEND_DIN0_SCOPE_H@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %r15
	movl	%r14d, %edi
	movq	%r15, %rsi
	callq	_writel_relaxed
	movl	16(%rbx), %r14d
	movq	(%rbx), %r15
	movq	_VIU_OSD_BLEND_DIN0_SCOPE_V@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %r15
	movl	%r14d, %edi
	movq	%r15, %rsi
	callq	_writel_relaxed
	movl	12(%rbx), %r14d
	movq	(%rbx), %r15
	movq	_VIU_OSD_BLEND_BLEND0_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %r15
	movl	%r14d, %edi
	movq	%r15, %rsi
	callq	_writel_relaxed
	movl	8(%rbx), %r14d
	movq	(%rbx), %r15
	movq	_VIU_OSD_BLEND_BLEND1_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %r15
	movl	%r14d, %edi
	movq	%r15, %rsi
	callq	_writel_relaxed
	movq	(%rbx), %rbx
	movq	_OSD1_BLEND_SRC_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	$768, %edi                      ## imm = 0x300
	movl	$768, %esi                      ## imm = 0x300
	movq	%rbx, %rdx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_writel_bits_relaxed            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VIU_OSD_BLEND_DIN0_SCOPE_H,4,2 ## @VIU_OSD_BLEND_DIN0_SCOPE_H
	.comm	_VIU_OSD_BLEND_DIN0_SCOPE_V,4,2 ## @VIU_OSD_BLEND_DIN0_SCOPE_V
	.comm	_VIU_OSD_BLEND_BLEND0_SIZE,4,2  ## @VIU_OSD_BLEND_BLEND0_SIZE
	.comm	_VIU_OSD_BLEND_BLEND1_SIZE,4,2  ## @VIU_OSD_BLEND_BLEND1_SIZE
	.comm	_OSD1_BLEND_SRC_CTRL,4,2        ## @OSD1_BLEND_SRC_CTRL
	.no_dead_strip	_meson_g12a_crtc_enable_osd1
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_g12a_crtc_enable_osd1
_meson_g12a_crtc_enable_osd1:           ; @meson_g12a_crtc_enable_osd1
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w20, [x0, #20]
	ldr	x21, [x0]
Lloh0:
	adrp	x8, _VIU_OSD_BLEND_DIN0_SCOPE_H@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VIU_OSD_BLEND_DIN0_SCOPE_H@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x21
	mov	x0, x20
	bl	_writel_relaxed
	ldr	w20, [x19, #16]
	ldr	x21, [x19]
Lloh3:
	adrp	x8, _VIU_OSD_BLEND_DIN0_SCOPE_V@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VIU_OSD_BLEND_DIN0_SCOPE_V@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x21
	mov	x0, x20
	bl	_writel_relaxed
	ldr	w20, [x19, #12]
	ldr	x21, [x19]
Lloh6:
	adrp	x8, _VIU_OSD_BLEND_BLEND0_SIZE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VIU_OSD_BLEND_BLEND0_SIZE@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x21
	mov	x0, x20
	bl	_writel_relaxed
	ldr	w20, [x19, #8]
	ldr	x21, [x19]
Lloh9:
	adrp	x8, _VIU_OSD_BLEND_BLEND1_SIZE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _VIU_OSD_BLEND_BLEND1_SIZE@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	__REG
	add	x1, x0, x21
	mov	x0, x20
	bl	_writel_relaxed
	ldr	x19, [x19]
Lloh12:
	adrp	x8, _OSD1_BLEND_SRC_CTRL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _OSD1_BLEND_SRC_CTRL@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	bl	__REG
	add	x2, x0, x19
	mov	w0, #768
	mov	w1, #768
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_writel_bits_relaxed
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_VIU_OSD_BLEND_DIN0_SCOPE_H,4,2 ; @VIU_OSD_BLEND_DIN0_SCOPE_H
	.comm	_VIU_OSD_BLEND_DIN0_SCOPE_V,4,2 ; @VIU_OSD_BLEND_DIN0_SCOPE_V
	.comm	_VIU_OSD_BLEND_BLEND0_SIZE,4,2  ; @VIU_OSD_BLEND_BLEND0_SIZE
	.comm	_VIU_OSD_BLEND_BLEND1_SIZE,4,2  ; @VIU_OSD_BLEND_BLEND1_SIZE
	.comm	_OSD1_BLEND_SRC_CTRL,4,2        ; @OSD1_BLEND_SRC_CTRL
	.no_dead_strip	_meson_g12a_crtc_enable_osd1
.subsections_via_symbols
