	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function radeon_dpm_change_power_state_locked
_radeon_dpm_change_power_state_locked:  ## @radeon_dpm_change_power_state_locked
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_radeon_dpm_single_display
	cmpl	$0, 120(%r14)
	je	LBB0_14
## %bb.1:
	movl	%eax, %ebx
	movq	24(%r14), %rax
	movq	32(%r14), %rsi
	cmpq	%rsi, %rax
	jne	LBB0_2
LBB0_5:
	movq	%rax, %rsi
	jmp	LBB0_6
LBB0_2:
	cmpq	$0, 88(%r14)
	jne	LBB0_6
## %bb.3:
	cmpl	$0, 112(%r14)
	je	LBB0_4
LBB0_6:
	movq	%r14, %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_radeon_dpm_pick_power_state
	testq	%rax, %rax
	je	LBB0_14
## %bb.7:
	movq	%rax, %r13
	movq	%rax, 96(%r14)
	cmpq	%rax, 104(%r14)
	jne	LBB0_18
## %bb.8:
	movq	(%r13), %rax
	cmpq	40(%r14), %rax
	jne	LBB0_18
## %bb.9:
	cmpl	%ebx, 48(%r14)
	jne	LBB0_18
## %bb.10:
	movq	(%r14), %rax
	movq	_CHIP_BARTS@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jl	LBB0_12
## %bb.11:
	movq	_RADEON_IS_IGP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%r14)
	je	LBB0_15
LBB0_12:
	movq	56(%r14), %rax
	cmpq	64(%r14), %rax
	je	LBB0_14
LBB0_13:
	movq	%r14, %rdi
	callq	_radeon_bandwidth_update
	movq	%r14, %rdi
	callq	_radeon_dpm_display_configuration_changed
	movq	56(%r14), %rax
	movq	%rax, 64(%r14)
	movl	76(%r14), %eax
	movl	%eax, 72(%r14)
LBB0_14:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	%rax, 32(%r14)
	jmp	LBB0_5
LBB0_15:
	movq	56(%r14), %rax
	cmpq	64(%r14), %rax
	je	LBB0_14
## %bb.16:
	cmpl	$2, 72(%r14)
	jl	LBB0_18
## %bb.17:
	cmpl	$2, 76(%r14)
	jge	LBB0_13
LBB0_18:
	movq	_radeon_dpm@GOTPCREL(%rip), %rax
	cmpl	$1, (%rax)
	jne	LBB0_20
## %bb.19:
	leaq	L_.str(%rip), %rdi
	callq	_printk
	movq	104(%r14), %rsi
	movq	%r14, %rdi
	callq	_radeon_dpm_print_power_state
	leaq	L_.str.1(%rip), %rdi
	callq	_printk
	movq	96(%r14), %rsi
	movq	%r14, %rdi
	callq	_radeon_dpm_print_power_state
LBB0_20:
	leaq	16(%r14), %r15
	movq	%r15, %rdi
	callq	_down_write
	leaq	128(%r14), %r12
	movq	%r12, %rdi
	callq	_mutex_lock
	movq	40(%r14), %rax
	movq	%rax, (%r13)
	movq	%r14, %rdi
	callq	_radeon_dpm_pre_set_power_state
	testl	%eax, %eax
	je	LBB0_21
LBB0_30:
	movq	%r12, %rdi
	callq	_mutex_unlock
	movq	%r15, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_up_write                       ## TAILCALL
LBB0_21:
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	movq	%r14, %rdi
	callq	_radeon_bandwidth_update
	movq	%r14, %rdi
	callq	_radeon_dpm_display_configuration_changed
	movq	_RADEON_NUM_RINGS@GOTPCREL(%rip), %r13
	movl	(%r13), %eax
	testl	%eax, %eax
	jle	LBB0_26
## %bb.22:
	xorl	%ebx, %ebx
	jmp	LBB0_23
	.p2align	4, 0x90
LBB0_25:                                ##   in Loop: Header=BB0_23 Depth=1
	incq	%rbx
	movslq	%eax, %rcx
	cmpq	%rcx, %rbx
	jge	LBB0_26
LBB0_23:                                ## =>This Inner Loop Header: Depth=1
	movq	144(%r14), %rcx
	cmpq	$0, (%rcx,%rbx,8)
	je	LBB0_25
## %bb.24:                              ##   in Loop: Header=BB0_23 Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_radeon_fence_wait_empty
	movl	(%r13), %eax
	jmp	LBB0_25
LBB0_26:
	movq	%r14, %rdi
	callq	_radeon_dpm_set_power_state
	movq	96(%r14), %rax
	movq	%rax, 104(%r14)
	movq	%r14, %rdi
	callq	_radeon_dpm_post_set_power_state
	movq	56(%r14), %rax
	movq	%rax, 64(%r14)
	movl	76(%r14), %eax
	movl	%eax, 72(%r14)
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, 48(%r14)
	movq	136(%r14), %rax
	cmpq	$0, (%rax)
	je	LBB0_30
## %bb.27:
	cmpq	$0, 88(%r14)
	movl	80(%r14), %ebx
	je	LBB0_29
## %bb.28:
	movq	_RADEON_DPM_FORCED_LEVEL_LOW@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_radeon_dpm_force_performance_level
	movl	%ebx, 80(%r14)
	jmp	LBB0_30
LBB0_29:
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_radeon_dpm_force_performance_level
	jmp	LBB0_30
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_BARTS,8,3                 ## @CHIP_BARTS
	.comm	_RADEON_IS_IGP,4,2              ## @RADEON_IS_IGP
	.comm	_radeon_dpm,4,2                 ## @radeon_dpm
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"switching from power state:\n"

L_.str.1:                               ## @.str.1
	.asciz	"switching to power state:\n"

	.comm	_RADEON_NUM_RINGS,4,2           ## @RADEON_NUM_RINGS
	.comm	_RADEON_DPM_FORCED_LEVEL_LOW,4,2 ## @RADEON_DPM_FORCED_LEVEL_LOW
	.no_dead_strip	_radeon_dpm_change_power_state_locked
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function radeon_dpm_change_power_state_locked
_radeon_dpm_change_power_state_locked:  ; @radeon_dpm_change_power_state_locked
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	bl	_radeon_dpm_single_display
	ldr	w8, [x19, #120]
	cbz	w8, LBB0_13
; %bb.1:
	mov	x20, x0
	ldp	x8, x1, [x19, #24]
	cmp	x8, x1
	b.ne	LBB0_3
LBB0_2:
	mov	x1, x8
	b	LBB0_5
LBB0_3:
	ldr	x9, [x19, #88]
	cbnz	x9, LBB0_5
; %bb.4:
	ldr	w9, [x19, #112]
	cbz	w9, LBB0_14
LBB0_5:
	mov	x0, x19
                                        ; kill: def $w1 killed $w1 killed $x1
	bl	_radeon_dpm_pick_power_state
	cbz	x0, LBB0_13
; %bb.6:
	mov	x23, x0
	str	x0, [x19, #96]
	ldr	x8, [x19, #104]
	cmp	x8, x0
	b.ne	LBB0_18
; %bb.7:
	ldr	x8, [x23]
	ldr	x9, [x19, #40]
	cmp	x8, x9
	b.ne	LBB0_18
; %bb.8:
	ldr	w8, [x19, #48]
	cmp	w8, w20
	b.ne	LBB0_18
; %bb.9:
	ldr	x8, [x19]
Lloh0:
	adrp	x9, _CHIP_BARTS@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_BARTS@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.lt	LBB0_11
; %bb.10:
	ldr	w8, [x19, #8]
Lloh3:
	adrp	x9, _RADEON_IS_IGP@GOTPAGE
Lloh4:
	ldr	x9, [x9, _RADEON_IS_IGP@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_15
LBB0_11:
	ldp	x8, x9, [x19, #56]
	cmp	x8, x9
	b.eq	LBB0_13
LBB0_12:
	mov	x0, x19
	bl	_radeon_bandwidth_update
	mov	x0, x19
	bl	_radeon_dpm_display_configuration_changed
	ldr	x8, [x19, #56]
	str	x8, [x19, #64]
	ldr	w8, [x19, #76]
	str	w8, [x19, #72]
LBB0_13:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_14:
	str	x8, [x19, #32]
	b	LBB0_2
LBB0_15:
	ldp	x8, x9, [x19, #56]
	cmp	x8, x9
	b.eq	LBB0_13
; %bb.16:
	ldr	w8, [x19, #72]
	cmp	w8, #2
	b.lt	LBB0_18
; %bb.17:
	ldr	w8, [x19, #76]
	cmp	w8, #2
	b.ge	LBB0_12
LBB0_18:
Lloh6:
	adrp	x8, _radeon_dpm@GOTPAGE
Lloh7:
	ldr	x8, [x8, _radeon_dpm@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	w8, #1
	b.ne	LBB0_20
; %bb.19:
Lloh9:
	adrp	x0, l_.str@PAGE
Lloh10:
	add	x0, x0, l_.str@PAGEOFF
	bl	_printk
	ldr	x1, [x19, #104]
	mov	x0, x19
	bl	_radeon_dpm_print_power_state
Lloh11:
	adrp	x0, l_.str.1@PAGE
Lloh12:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_printk
	ldr	x1, [x19, #96]
	mov	x0, x19
	bl	_radeon_dpm_print_power_state
LBB0_20:
	add	x21, x19, #16
	mov	x0, x21
	bl	_down_write
	add	x22, x19, #128
	mov	x0, x22
	bl	_mutex_lock
	ldr	x8, [x19, #40]
	str	x8, [x23]
	mov	x0, x19
	bl	_radeon_dpm_pre_set_power_state
	cbz	w0, LBB0_22
LBB0_21:
	mov	x0, x22
	bl	_mutex_unlock
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_up_write
LBB0_22:
	mov	x0, x19
	bl	_radeon_bandwidth_update
	mov	x0, x19
	bl	_radeon_dpm_display_configuration_changed
Lloh13:
	adrp	x24, _RADEON_NUM_RINGS@GOTPAGE
Lloh14:
	ldr	x24, [x24, _RADEON_NUM_RINGS@GOTPAGEOFF]
	ldr	w8, [x24]
	cmp	w8, #1
	b.lt	LBB0_27
; %bb.23:
	mov	x23, #0
	b	LBB0_25
LBB0_24:                                ;   in Loop: Header=BB0_25 Depth=1
	add	x23, x23, #1
	cmp	x23, w8, sxtw
	b.ge	LBB0_27
LBB0_25:                                ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x19, #144]
	ldr	x9, [x9, x23, lsl #3]
	cbz	x9, LBB0_24
; %bb.26:                               ;   in Loop: Header=BB0_25 Depth=1
	mov	x0, x19
	mov	x1, x23
	bl	_radeon_fence_wait_empty
	ldr	w8, [x24]
	b	LBB0_24
LBB0_27:
	mov	x0, x19
	bl	_radeon_dpm_set_power_state
	ldr	x8, [x19, #96]
	str	x8, [x19, #104]
	mov	x0, x19
	bl	_radeon_dpm_post_set_power_state
	ldr	x8, [x19, #56]
	str	x8, [x19, #64]
	ldr	w8, [x19, #76]
	str	w8, [x19, #72]
	str	w20, [x19, #48]
	ldr	x8, [x19, #136]
	ldr	x8, [x8]
	cbz	x8, LBB0_21
; %bb.28:
	ldr	x8, [x19, #88]
	ldr	w20, [x19, #80]
	cbz	x8, LBB0_30
; %bb.29:
Lloh15:
	adrp	x8, _RADEON_DPM_FORCED_LEVEL_LOW@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RADEON_DPM_FORCED_LEVEL_LOW@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_radeon_dpm_force_performance_level
	str	w20, [x19, #80]
	b	LBB0_21
LBB0_30:
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_dpm_force_performance_level
	b	LBB0_21
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_BARTS,8,3                 ; @CHIP_BARTS
	.comm	_RADEON_IS_IGP,4,2              ; @RADEON_IS_IGP
	.comm	_radeon_dpm,4,2                 ; @radeon_dpm
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"switching from power state:\n"

l_.str.1:                               ; @.str.1
	.asciz	"switching to power state:\n"

	.comm	_RADEON_NUM_RINGS,4,2           ; @RADEON_NUM_RINGS
	.comm	_RADEON_DPM_FORCED_LEVEL_LOW,4,2 ; @RADEON_DPM_FORCED_LEVEL_LOW
	.no_dead_strip	_radeon_dpm_change_power_state_locked
.subsections_via_symbols
