	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rs780_set_engine_clock_ssc
_rs780_set_engine_clock_ssc:            ## @rs780_set_engine_clock_ssc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	_FVTHROT_FB_US_REG0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTFBUSREG0_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_FB_US_REG1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTFBUSREG1_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_FB_DS_REG0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTFBDSREG0_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_FB_DS_REG1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RS780_FVTHROTFBDSREG1_DFLT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_FVTHROT_FBDIV_REG1@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	$1, %edi
	callq	_MAX_FEEDBACK_STEP
	movq	_MAX_FEEDBACK_STEP_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movl	%ebx, %edi
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_WREG32_P                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_FVTHROT_FB_US_REG0,4,2         ## @FVTHROT_FB_US_REG0
	.comm	_RS780_FVTHROTFBUSREG0_DFLT,4,2 ## @RS780_FVTHROTFBUSREG0_DFLT
	.comm	_FVTHROT_FB_US_REG1,4,2         ## @FVTHROT_FB_US_REG1
	.comm	_RS780_FVTHROTFBUSREG1_DFLT,4,2 ## @RS780_FVTHROTFBUSREG1_DFLT
	.comm	_FVTHROT_FB_DS_REG0,4,2         ## @FVTHROT_FB_DS_REG0
	.comm	_RS780_FVTHROTFBDSREG0_DFLT,4,2 ## @RS780_FVTHROTFBDSREG0_DFLT
	.comm	_FVTHROT_FB_DS_REG1,4,2         ## @FVTHROT_FB_DS_REG1
	.comm	_RS780_FVTHROTFBDSREG1_DFLT,4,2 ## @RS780_FVTHROTFBDSREG1_DFLT
	.comm	_FVTHROT_FBDIV_REG1,4,2         ## @FVTHROT_FBDIV_REG1
	.comm	_MAX_FEEDBACK_STEP_MASK,4,2     ## @MAX_FEEDBACK_STEP_MASK
	.no_dead_strip	_rs780_set_engine_clock_ssc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rs780_set_engine_clock_ssc
_rs780_set_engine_clock_ssc:            ; @rs780_set_engine_clock_ssc
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x8, _FVTHROT_FB_US_REG0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FVTHROT_FB_US_REG0@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _RS780_FVTHROTFBUSREG0_DFLT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RS780_FVTHROTFBUSREG0_DFLT@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_WREG32
Lloh6:
	adrp	x8, _FVTHROT_FB_US_REG1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _FVTHROT_FB_US_REG1@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
Lloh9:
	adrp	x8, _RS780_FVTHROTFBUSREG1_DFLT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RS780_FVTHROTFBUSREG1_DFLT@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	bl	_WREG32
Lloh12:
	adrp	x8, _FVTHROT_FB_DS_REG0@GOTPAGE
Lloh13:
	ldr	x8, [x8, _FVTHROT_FB_DS_REG0@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
Lloh15:
	adrp	x8, _RS780_FVTHROTFBDSREG0_DFLT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RS780_FVTHROTFBDSREG0_DFLT@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	bl	_WREG32
Lloh18:
	adrp	x8, _FVTHROT_FB_DS_REG1@GOTPAGE
Lloh19:
	ldr	x8, [x8, _FVTHROT_FB_DS_REG1@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
Lloh21:
	adrp	x8, _RS780_FVTHROTFBDSREG1_DFLT@GOTPAGE
Lloh22:
	ldr	x8, [x8, _RS780_FVTHROTFBDSREG1_DFLT@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	bl	_WREG32
Lloh24:
	adrp	x8, _FVTHROT_FBDIV_REG1@GOTPAGE
Lloh25:
	ldr	x8, [x8, _FVTHROT_FBDIV_REG1@GOTPAGEOFF]
Lloh26:
	ldr	w19, [x8]
	mov	w0, #1
	bl	_MAX_FEEDBACK_STEP
	mov	x1, x0
Lloh27:
	adrp	x8, _MAX_FEEDBACK_STEP_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _MAX_FEEDBACK_STEP_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_WREG32_P
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_FVTHROT_FB_US_REG0,4,2         ; @FVTHROT_FB_US_REG0
	.comm	_RS780_FVTHROTFBUSREG0_DFLT,4,2 ; @RS780_FVTHROTFBUSREG0_DFLT
	.comm	_FVTHROT_FB_US_REG1,4,2         ; @FVTHROT_FB_US_REG1
	.comm	_RS780_FVTHROTFBUSREG1_DFLT,4,2 ; @RS780_FVTHROTFBUSREG1_DFLT
	.comm	_FVTHROT_FB_DS_REG0,4,2         ; @FVTHROT_FB_DS_REG0
	.comm	_RS780_FVTHROTFBDSREG0_DFLT,4,2 ; @RS780_FVTHROTFBDSREG0_DFLT
	.comm	_FVTHROT_FB_DS_REG1,4,2         ; @FVTHROT_FB_DS_REG1
	.comm	_RS780_FVTHROTFBDSREG1_DFLT,4,2 ; @RS780_FVTHROTFBDSREG1_DFLT
	.comm	_FVTHROT_FBDIV_REG1,4,2         ; @FVTHROT_FBDIV_REG1
	.comm	_MAX_FEEDBACK_STEP_MASK,4,2     ; @MAX_FEEDBACK_STEP_MASK
	.no_dead_strip	_rs780_set_engine_clock_ssc
.subsections_via_symbols
