	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v8_0_ring_set_priority_compute
_gfx_v8_0_ring_set_priority_compute:    ## @gfx_v8_0_ring_set_priority_compute
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rax
	movq	(%rax), %rax
	movq	_AMDGPU_RING_TYPE_COMPUTE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_1
## %bb.2:
	movq	%rdi, %rbx
	movq	_DRM_SCHED_PRIORITY_HIGH_HW@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	cmpl	%esi, (%rax)
	sete	%r14b
	movq	8(%rdi), %r15
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_gfx_v8_0_hqd_set_priority
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_gfx_v8_0_pipe_reserve_resources ## TAILCALL
LBB0_1:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DRM_SCHED_PRIORITY_HIGH_HW,4,2 ## @DRM_SCHED_PRIORITY_HIGH_HW
	.comm	_AMDGPU_RING_TYPE_COMPUTE,8,3   ## @AMDGPU_RING_TYPE_COMPUTE
	.no_dead_strip	_gfx_v8_0_ring_set_priority_compute
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v8_0_ring_set_priority_compute
_gfx_v8_0_ring_set_priority_compute:    ; @gfx_v8_0_ring_set_priority_compute
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x8, [x0]
	ldr	x8, [x8]
Lloh0:
	adrp	x9, _AMDGPU_RING_TYPE_COMPUTE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMDGPU_RING_TYPE_COMPUTE@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	mov	x19, x0
Lloh3:
	adrp	x8, _DRM_SCHED_PRIORITY_HIGH_HW@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DRM_SCHED_PRIORITY_HIGH_HW@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w8, w1
	cset	w20, eq
	ldr	x21, [x0, #8]
	mov	x0, x21
	mov	x1, x19
	mov	x2, x20
	bl	_gfx_v8_0_hqd_set_priority
	mov	x0, x21
	mov	x1, x19
	mov	x2, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_gfx_v8_0_pipe_reserve_resources
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_DRM_SCHED_PRIORITY_HIGH_HW,4,2 ; @DRM_SCHED_PRIORITY_HIGH_HW
	.comm	_AMDGPU_RING_TYPE_COMPUTE,8,3   ; @AMDGPU_RING_TYPE_COMPUTE
	.no_dead_strip	_gfx_v8_0_ring_set_priority_compute
.subsections_via_symbols
