	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v10_0_gfx_init_queue
_gfx_v10_0_gfx_init_queue:              ## @gfx_v10_0_gfx_init_queue
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	24(%rdi), %r14
	movq	32(%rdi), %r15
	cmpq	$0, 16(%r15)
	je	LBB0_1
## %bb.4:
	movq	8(%r15), %rax
	movq	_AMDGPU_MAX_GFX_RINGS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	(%rax,%rcx,8), %rsi
	testq	%rsi, %rsi
	je	LBB0_6
## %bb.5:
	movq	%r14, %rdi
	movl	$4, %edx
	callq	_memcpy
LBB0_6:
	movq	$0, 16(%rbx)
	jmp	LBB0_7
LBB0_1:
	cmpl	$0, 24(%r15)
	je	LBB0_2
LBB0_7:
	movq	%rbx, %rdi
	callq	_amdgpu_ring_clear_ring
LBB0_8:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movq	%r15, %rdi
	callq	_mutex_lock
	movl	8(%rbx), %esi
	movl	(%rbx), %ecx
	movl	4(%rbx), %edx
	movq	%r15, %rdi
	xorl	%r8d, %r8d
	callq	_nv_grbm_select
	movq	%rbx, %rdi
	callq	_gfx_v10_0_gfx_mqd_init
	movq	%r15, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_nv_grbm_select
	movq	%r15, %rdi
	callq	_mutex_unlock
	movq	8(%r15), %rax
	movq	_AMDGPU_MAX_GFX_RINGS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	(%rax,%rcx,8), %rdi
	testq	%rdi, %rdi
	je	LBB0_8
## %bb.3:
	movq	%r14, %rsi
	movl	$4, %edx
	callq	_memcpy
	jmp	LBB0_8
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_MAX_GFX_RINGS,8,3       ## @AMDGPU_MAX_GFX_RINGS
	.no_dead_strip	_gfx_v10_0_gfx_init_queue
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v10_0_gfx_init_queue
_gfx_v10_0_gfx_init_queue:              ; @gfx_v10_0_gfx_init_queue
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	ldp	x19, x21, [x0, #24]
	ldr	x8, [x21, #16]
	cbz	x8, LBB0_4
; %bb.1:
	ldr	x8, [x21, #8]
Lloh0:
	adrp	x9, _AMDGPU_MAX_GFX_RINGS@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMDGPU_MAX_GFX_RINGS@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	ldr	x1, [x8, x9, lsl #3]
	cbz	x1, LBB0_3
; %bb.2:
	mov	x0, x19
	mov	w2, #4
	bl	_memcpy
LBB0_3:
	str	xzr, [x20, #16]
	b	LBB0_5
LBB0_4:
	ldr	w8, [x21, #24]
	cbz	w8, LBB0_7
LBB0_5:
	mov	x0, x20
	bl	_amdgpu_ring_clear_ring
LBB0_6:
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_7:
	mov	x0, x19
	mov	w1, #0
	mov	w2, #4
	bl	_memset
	mov	x0, x21
	bl	_mutex_lock
	ldp	w2, w1, [x20, #4]
	ldr	w3, [x20]
	mov	x0, x21
	mov	w4, #0
	bl	_nv_grbm_select
	mov	x0, x20
	bl	_gfx_v10_0_gfx_mqd_init
	mov	x0, x21
	mov	w1, #0
	mov	w2, #0
	mov	w3, #0
	mov	w4, #0
	bl	_nv_grbm_select
	mov	x0, x21
	bl	_mutex_unlock
	ldr	x8, [x21, #8]
Lloh3:
	adrp	x9, _AMDGPU_MAX_GFX_RINGS@GOTPAGE
Lloh4:
	ldr	x9, [x9, _AMDGPU_MAX_GFX_RINGS@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	ldr	x0, [x8, x9, lsl #3]
	cbz	x0, LBB0_6
; %bb.8:
	mov	x1, x19
	mov	w2, #4
	bl	_memcpy
	b	LBB0_6
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_MAX_GFX_RINGS,8,3       ; @AMDGPU_MAX_GFX_RINGS
	.no_dead_strip	_gfx_v10_0_gfx_init_queue
.subsections_via_symbols
