	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_set_mc_special_registers
_si_set_mc_special_registers:           ## @si_set_mc_special_registers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r13
	movq	(%rsi), %r12
	testq	%r12, %r12
	jle	LBB0_40
## %bb.1:
	movq	%rdi, %r15
	xorl	%r14d, %r14d
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_38:                                ##   in Loop: Header=BB0_2 Depth=1
	incq	%r12
LBB0_39:                                ##   in Loop: Header=BB0_2 Depth=1
	incq	%r14
	cmpq	(%r13), %r14
	jge	LBB0_40
LBB0_2:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_10 Depth 2
                                        ##     Child Loop BB0_16 Depth 2
                                        ##     Child Loop BB0_26 Depth 2
                                        ##     Child Loop BB0_29 Depth 2
                                        ##     Child Loop BB0_35 Depth 2
	movq	_SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r12
	jge	LBB0_3
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	24(%r13), %rax
	movq	%r14, %rcx
	shlq	$4, %rcx
	movl	(%rax,%rcx), %eax
	cmpl	$128, %eax
	je	LBB0_31
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	cmpl	$129, %eax
	jne	LBB0_39
## %bb.6:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_MC_PMG_CMD_EMRS@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	callq	_RREG32
	movl	(%rbx), %ecx
	movq	24(%r13), %rdx
	movq	%r12, %rsi
	shlq	$4, %rsi
	movl	%ecx, (%rdx,%rsi)
	movq	_MC_SEQ_PMG_CMD_EMRS_LP@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, 8(%rdx,%rsi)
	movq	8(%r13), %r8
	testq	%r8, %r8
	jle	LBB0_13
## %bb.7:                               ##   in Loop: Header=BB0_2 Depth=1
	andl	$-65536, %eax                   ## imm = 0xFFFF0000
	movq	16(%r13), %rdx
	cmpq	$1, %r8
	jne	LBB0_9
## %bb.8:                               ##   in Loop: Header=BB0_2 Depth=1
	xorl	%esi, %esi
	jmp	LBB0_11
	.p2align	4, 0x90
LBB0_31:                                ##   in Loop: Header=BB0_2 Depth=1
	movq	_MC_PMG_CMD_MRS1@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rdi
	callq	_RREG32
	movl	(%rbx), %ecx
	movq	24(%r13), %rdx
	movq	%r12, %rsi
	shlq	$4, %rsi
	movl	%ecx, (%rdx,%rsi)
	movq	_MC_SEQ_PMG_CMD_MRS1_LP@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, 8(%rdx,%rsi)
	movq	8(%r13), %r8
	testq	%r8, %r8
	jle	LBB0_38
## %bb.32:                              ##   in Loop: Header=BB0_2 Depth=1
	andl	$-65536, %eax                   ## imm = 0xFFFF0000
	movq	16(%r13), %rdx
	cmpq	$1, %r8
	jne	LBB0_34
## %bb.33:                              ##   in Loop: Header=BB0_2 Depth=1
	xorl	%esi, %esi
	jmp	LBB0_36
LBB0_9:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	%r8, %r9
	andq	$-2, %r9
	xorl	%esi, %esi
	.p2align	4, 0x90
LBB0_10:                                ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	(%rdx,%rsi,8), %rcx
	movzwl	2(%rcx,%r14,4), %edi
	orl	%eax, %edi
	movl	%edi, (%rcx,%r12,4)
	movq	8(%rdx,%rsi,8), %rcx
	movzwl	2(%rcx,%r14,4), %edi
	orl	%eax, %edi
	movl	%edi, (%rcx,%r12,4)
	addq	$2, %rsi
	cmpq	%rsi, %r9
	jne	LBB0_10
LBB0_11:                                ##   in Loop: Header=BB0_2 Depth=1
	testb	$1, %r8b
	je	LBB0_13
## %bb.12:                              ##   in Loop: Header=BB0_2 Depth=1
	movq	(%rdx,%rsi,8), %rcx
	movzwl	2(%rcx,%r14,4), %edx
	orl	%eax, %edx
	movl	%edx, (%rcx,%r12,4)
LBB0_13:                                ##   in Loop: Header=BB0_2 Depth=1
	movq	%r13, %rbx
	leaq	1(%r12), %r13
	movq	_SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r13
	jge	LBB0_3
## %bb.14:                              ##   in Loop: Header=BB0_2 Depth=1
	movq	_MC_PMG_CMD_MRS@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	callq	_RREG32
	movq	_MC_PMG_CMD_MRS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	24(%rbx), %r8
	shlq	$4, %r13
	movl	%ecx, (%r8,%r13)
	movq	_MC_SEQ_PMG_CMD_MRS_LP@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, 8(%r8,%r13)
	movq	%rbx, %r13
	movq	8(%rbx), %r9
	testq	%r9, %r9
	movq	_AMDGPU_VRAM_TYPE_GDDR5@GOTPCREL(%rip), %r10
	jle	LBB0_19
## %bb.15:                              ##   in Loop: Header=BB0_2 Depth=1
	andl	$-65536, %eax                   ## imm = 0xFFFF0000
	movq	16(%r13), %rsi
	xorl	%edi, %edi
	jmp	LBB0_16
	.p2align	4, 0x90
LBB0_18:                                ##   in Loop: Header=BB0_16 Depth=2
	incq	%rdi
	cmpq	%rdi, %r9
	je	LBB0_19
LBB0_16:                                ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	(%rsi,%rdi,8), %rdx
	movzwl	(%rdx,%r14,4), %ecx
	orl	%eax, %ecx
	movl	%ecx, 4(%rdx,%r12,4)
	movl	(%r15), %ebx
	cmpl	(%r10), %ebx
	je	LBB0_18
## %bb.17:                              ##   in Loop: Header=BB0_16 Depth=2
	orl	$256, %ecx                      ## imm = 0x100
	movl	%ecx, 4(%rdx,%r12,4)
	jmp	LBB0_18
	.p2align	4, 0x90
LBB0_19:                                ##   in Loop: Header=BB0_2 Depth=1
	leaq	2(%r12), %rax
	movl	(%r15), %ecx
	cmpl	(%r10), %ecx
	jne	LBB0_21
## %bb.20:                              ##   in Loop: Header=BB0_2 Depth=1
	movq	%rax, %r12
	jmp	LBB0_39
LBB0_21:                                ##   in Loop: Header=BB0_2 Depth=1
	movq	_SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_3
## %bb.22:                              ##   in Loop: Header=BB0_2 Depth=1
	shlq	$4, %rax
	movq	_MC_PMG_AUTO_CMD@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	%ecx, (%r8,%rax)
	movq	%rcx, 8(%r8,%rax)
	testq	%r9, %r9
	jle	LBB0_30
## %bb.23:                              ##   in Loop: Header=BB0_2 Depth=1
	movq	16(%r13), %rdx
	leaq	-1(%r9), %rcx
	movl	%r9d, %eax
	andl	$3, %eax
	cmpq	$3, %rcx
	jae	LBB0_25
## %bb.24:                              ##   in Loop: Header=BB0_2 Depth=1
	xorl	%esi, %esi
	jmp	LBB0_27
LBB0_34:                                ##   in Loop: Header=BB0_2 Depth=1
	movq	%r8, %rdi
	andq	$-2, %rdi
	xorl	%esi, %esi
	.p2align	4, 0x90
LBB0_35:                                ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	(%rdx,%rsi,8), %rbx
	movzwl	(%rbx,%r14,4), %ecx
	orl	%eax, %ecx
	movl	%ecx, (%rbx,%r12,4)
	movq	8(%rdx,%rsi,8), %rcx
	movzwl	(%rcx,%r14,4), %ebx
	orl	%eax, %ebx
	movl	%ebx, (%rcx,%r12,4)
	addq	$2, %rsi
	cmpq	%rsi, %rdi
	jne	LBB0_35
LBB0_36:                                ##   in Loop: Header=BB0_2 Depth=1
	testb	$1, %r8b
	je	LBB0_38
## %bb.37:                              ##   in Loop: Header=BB0_2 Depth=1
	movq	(%rdx,%rsi,8), %rcx
	movzwl	(%rcx,%r14,4), %edx
	orl	%eax, %edx
	movl	%edx, (%rcx,%r12,4)
	jmp	LBB0_38
LBB0_25:                                ##   in Loop: Header=BB0_2 Depth=1
	andq	$-4, %r9
	xorl	%esi, %esi
	.p2align	4, 0x90
LBB0_26:                                ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	(%rdx,%rsi,8), %rcx
	movzwl	2(%rcx,%r14,4), %edi
	movl	%edi, 8(%rcx,%r12,4)
	movq	8(%rdx,%rsi,8), %rcx
	movzwl	2(%rcx,%r14,4), %edi
	movl	%edi, 8(%rcx,%r12,4)
	movq	16(%rdx,%rsi,8), %rcx
	movzwl	2(%rcx,%r14,4), %edi
	movl	%edi, 8(%rcx,%r12,4)
	movq	24(%rdx,%rsi,8), %rcx
	movzwl	2(%rcx,%r14,4), %edi
	movl	%edi, 8(%rcx,%r12,4)
	addq	$4, %rsi
	cmpq	%rsi, %r9
	jne	LBB0_26
LBB0_27:                                ##   in Loop: Header=BB0_2 Depth=1
	testq	%rax, %rax
	je	LBB0_30
## %bb.28:                              ##   in Loop: Header=BB0_2 Depth=1
	leaq	(%rdx,%rsi,8), %rcx
	xorl	%edx, %edx
	.p2align	4, 0x90
LBB0_29:                                ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	(%rcx,%rdx,8), %rsi
	movzwl	2(%rsi,%r14,4), %edi
	movl	%edi, 8(%rsi,%r12,4)
	incq	%rdx
	cmpq	%rdx, %rax
	jne	LBB0_29
LBB0_30:                                ##   in Loop: Header=BB0_2 Depth=1
	addq	$3, %r12
	jmp	LBB0_39
LBB0_40:
	movq	%r12, (%r13)
	xorl	%eax, %eax
	jmp	LBB0_41
LBB0_3:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_41:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE,8,3 ## @SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_MC_PMG_CMD_EMRS,8,3            ## @MC_PMG_CMD_EMRS
	.comm	_MC_SEQ_PMG_CMD_EMRS_LP,8,3     ## @MC_SEQ_PMG_CMD_EMRS_LP
	.comm	_MC_PMG_CMD_MRS,8,3             ## @MC_PMG_CMD_MRS
	.comm	_MC_SEQ_PMG_CMD_MRS_LP,8,3      ## @MC_SEQ_PMG_CMD_MRS_LP
	.comm	_AMDGPU_VRAM_TYPE_GDDR5,4,2     ## @AMDGPU_VRAM_TYPE_GDDR5
	.comm	_MC_PMG_AUTO_CMD,8,3            ## @MC_PMG_AUTO_CMD
	.comm	_MC_PMG_CMD_MRS1,8,3            ## @MC_PMG_CMD_MRS1
	.comm	_MC_SEQ_PMG_CMD_MRS1_LP,8,3     ## @MC_SEQ_PMG_CMD_MRS1_LP
	.no_dead_strip	_si_set_mc_special_registers
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_set_mc_special_registers
_si_set_mc_special_registers:           ; @si_set_mc_special_registers
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x1
	ldr	x21, [x1]
	cmp	x21, #1
	b.lt	LBB0_26
; %bb.1:
	mov	x20, x0
	mov	x22, #0
Lloh0:
	adrp	x23, _SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE@GOTPAGE
Lloh1:
	ldr	x23, [x23, _SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE@GOTPAGEOFF]
Lloh2:
	adrp	x26, _MC_PMG_CMD_EMRS@GOTPAGE
Lloh3:
	ldr	x26, [x26, _MC_PMG_CMD_EMRS@GOTPAGEOFF]
Lloh4:
	adrp	x25, _AMDGPU_VRAM_TYPE_GDDR5@GOTPAGE
Lloh5:
	ldr	x25, [x25, _AMDGPU_VRAM_TYPE_GDDR5@GOTPAGEOFF]
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	mov	x21, x10
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	x22, x22, #1
	ldr	x8, [x19]
	cmp	x22, x8
	b.ge	LBB0_26
LBB0_4:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_9 Depth 2
                                        ;     Child Loop BB0_14 Depth 2
                                        ;     Child Loop BB0_24 Depth 2
                                        ;     Child Loop BB0_18 Depth 2
	ldr	x8, [x23]
	cmp	x21, x8
	b.ge	LBB0_27
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	x8, [x19, #24]
	lsl	x9, x22, #4
	ldr	w8, [x8, x9]
	lsl	x27, x22, #2
	cmp	w8, #128
	b.eq	LBB0_16
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	cmp	w8, #129
	b.ne	LBB0_3
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	x0, [x26]
	bl	_RREG32
	ldr	x8, [x26]
	ldr	x9, [x19, #24]
	add	x9, x9, x21, lsl #4
	str	w8, [x9]
Lloh6:
	adrp	x8, _MC_SEQ_PMG_CMD_EMRS_LP@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MC_SEQ_PMG_CMD_EMRS_LP@GOTPAGEOFF]
Lloh8:
	ldr	x8, [x8]
	str	x8, [x9, #8]
	ldr	x8, [x19, #8]
	cmp	x8, #1
	b.lt	LBB0_10
; %bb.8:                                ;   in Loop: Header=BB0_4 Depth=1
	and	w9, w0, #0xffff0000
	ldr	x10, [x19, #16]
LBB0_9:                                 ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	x11, [x10], #8
	add	x12, x11, x22, lsl #2
	ldrh	w12, [x12, #2]
	orr	w12, w12, w9
	str	w12, [x11, x21, lsl #2]
	subs	x8, x8, #1
	b.ne	LBB0_9
LBB0_10:                                ;   in Loop: Header=BB0_4 Depth=1
	add	x28, x21, #1
	ldr	x8, [x23]
	cmp	x28, x8
	b.ge	LBB0_27
; %bb.11:                               ;   in Loop: Header=BB0_4 Depth=1
Lloh9:
	adrp	x24, _MC_PMG_CMD_MRS@GOTPAGE
Lloh10:
	ldr	x24, [x24, _MC_PMG_CMD_MRS@GOTPAGEOFF]
	ldr	x0, [x24]
	bl	_RREG32
	ldr	x8, [x24]
	ldr	x9, [x19, #24]
	add	x10, x9, x28, lsl #4
	str	w8, [x10]
Lloh11:
	adrp	x8, _MC_SEQ_PMG_CMD_MRS_LP@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MC_SEQ_PMG_CMD_MRS_LP@GOTPAGEOFF]
Lloh13:
	ldr	x8, [x8]
	str	x8, [x10, #8]
	ldr	x8, [x19, #8]
	cmp	x8, #1
	b.lt	LBB0_20
; %bb.12:                               ;   in Loop: Header=BB0_4 Depth=1
	and	w10, w0, #0xffff0000
	ldr	x11, [x19, #16]
	mov	x12, x8
	b	LBB0_14
LBB0_13:                                ;   in Loop: Header=BB0_14 Depth=2
	add	x11, x11, #8
	subs	x12, x12, #1
	b.eq	LBB0_20
LBB0_14:                                ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	x13, [x11]
	ldrh	w14, [x13, x27]
	orr	w14, w14, w10
	str	w14, [x13, x28, lsl #2]
	ldr	w15, [x20]
	ldr	w16, [x25]
	cmp	w15, w16
	b.eq	LBB0_13
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=2
	orr	w14, w14, #0x100
	str	w14, [x13, x28, lsl #2]
	b	LBB0_13
LBB0_16:                                ;   in Loop: Header=BB0_4 Depth=1
Lloh14:
	adrp	x24, _MC_PMG_CMD_MRS1@GOTPAGE
Lloh15:
	ldr	x24, [x24, _MC_PMG_CMD_MRS1@GOTPAGEOFF]
	ldr	x0, [x24]
	bl	_RREG32
	ldr	x8, [x24]
	ldr	x9, [x19, #24]
	add	x9, x9, x21, lsl #4
	str	w8, [x9]
Lloh16:
	adrp	x8, _MC_SEQ_PMG_CMD_MRS1_LP@GOTPAGE
Lloh17:
	ldr	x8, [x8, _MC_SEQ_PMG_CMD_MRS1_LP@GOTPAGEOFF]
Lloh18:
	ldr	x8, [x8]
	str	x8, [x9, #8]
	ldr	x8, [x19, #8]
	cmp	x8, #1
	b.lt	LBB0_19
; %bb.17:                               ;   in Loop: Header=BB0_4 Depth=1
	and	w9, w0, #0xffff0000
	ldr	x10, [x19, #16]
LBB0_18:                                ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	x11, [x10], #8
	ldrh	w12, [x11, x27]
	orr	w12, w12, w9
	str	w12, [x11, x21, lsl #2]
	subs	x8, x8, #1
	b.ne	LBB0_18
LBB0_19:                                ;   in Loop: Header=BB0_4 Depth=1
	add	x21, x21, #1
	b	LBB0_3
LBB0_20:                                ;   in Loop: Header=BB0_4 Depth=1
	add	x10, x21, #2
	ldr	w11, [x20]
	ldr	w12, [x25]
	cmp	w11, w12
	b.eq	LBB0_2
; %bb.21:                               ;   in Loop: Header=BB0_4 Depth=1
	ldr	x11, [x23]
	cmp	x10, x11
	b.ge	LBB0_27
; %bb.22:                               ;   in Loop: Header=BB0_4 Depth=1
Lloh19:
	adrp	x11, _MC_PMG_AUTO_CMD@GOTPAGE
Lloh20:
	ldr	x11, [x11, _MC_PMG_AUTO_CMD@GOTPAGEOFF]
Lloh21:
	ldr	x11, [x11]
	add	x9, x9, x10, lsl #4
	str	w11, [x9]
	str	x11, [x9, #8]
	cmp	x8, #1
	b.lt	LBB0_25
; %bb.23:                               ;   in Loop: Header=BB0_4 Depth=1
	ldr	x9, [x19, #16]
LBB0_24:                                ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	x11, [x9], #8
	add	x12, x11, x22, lsl #2
	ldrh	w12, [x12, #2]
	str	w12, [x11, x10, lsl #2]
	subs	x8, x8, #1
	b.ne	LBB0_24
LBB0_25:                                ;   in Loop: Header=BB0_4 Depth=1
	add	x21, x21, #3
	b	LBB0_3
LBB0_26:
	mov	w0, #0
	str	x21, [x19]
	b	LBB0_28
LBB0_27:
Lloh22:
	adrp	x8, _EINVAL@GOTPAGE
Lloh23:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_28:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.comm	_SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE,8,3 ; @SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_MC_PMG_CMD_EMRS,8,3            ; @MC_PMG_CMD_EMRS
	.comm	_MC_SEQ_PMG_CMD_EMRS_LP,8,3     ; @MC_SEQ_PMG_CMD_EMRS_LP
	.comm	_MC_PMG_CMD_MRS,8,3             ; @MC_PMG_CMD_MRS
	.comm	_MC_SEQ_PMG_CMD_MRS_LP,8,3      ; @MC_SEQ_PMG_CMD_MRS_LP
	.comm	_AMDGPU_VRAM_TYPE_GDDR5,4,2     ; @AMDGPU_VRAM_TYPE_GDDR5
	.comm	_MC_PMG_AUTO_CMD,8,3            ; @MC_PMG_AUTO_CMD
	.comm	_MC_PMG_CMD_MRS1,8,3            ; @MC_PMG_CMD_MRS1
	.comm	_MC_SEQ_PMG_CMD_MRS1_LP,8,3     ; @MC_SEQ_PMG_CMD_MRS1_LP
	.no_dead_strip	_si_set_mc_special_registers
.subsections_via_symbols
