	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_panel_mode_fixup        ## -- Begin function amdgpu_panel_mode_fixup
	.p2align	4, 0x90
_amdgpu_panel_mode_fixup:               ## @amdgpu_panel_mode_fixup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	callq	_to_amdgpu_encoder
	movq	%rax, %r14
	movl	(%rax), %r13d
	movl	4(%rax), %eax
	subl	%eax, %r13d
	movl	8(%r14), %edx
	movl	12(%r14), %ecx
	subl	%ecx, %edx
	movq	%rdx, %r8
	movq	%rdx, -56(%rbp)                 ## 8-byte Spill
	movl	16(%r14), %r12d
	movl	20(%r14), %r15d
	movl	24(%r14), %edx
	subl	%r12d, %edx
	movl	%edx, %esi
	movl	%edx, -48(%rbp)                 ## 4-byte Spill
	subl	%eax, %r12d
	movl	28(%r14), %edx
	subl	%r15d, %edx
	movl	%edx, %edi
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	subl	%ecx, %r15d
	movl	68(%r14), %edx
	movl	%edx, 68(%rbx)
	movl	64(%r14), %edx
	movl	%edx, 64(%rbx)
	movl	%eax, 4(%rbx)
	movl	%ecx, 12(%rbx)
	movl	4(%r14), %eax
	leal	(%rax,%r13), %ecx
	movl	%ecx, (%rbx)
	addl	%r12d, %eax
	movl	%eax, 16(%rbx)
	addl	%esi, %eax
	movl	%eax, 24(%rbx)
	movl	12(%r14), %eax
	leal	(%rax,%r8), %ecx
	movl	%ecx, 8(%rbx)
	addl	%r15d, %eax
	movl	%eax, 20(%rbx)
	addl	%edi, %eax
	movl	%eax, 28(%rbx)
	movq	_CRTC_INTERLACE_HALVE_V@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_drm_mode_set_crtcinfo
	movl	4(%r14), %eax
	movl	%eax, 32(%rbx)
	movl	12(%r14), %ecx
	movl	%ecx, 36(%rbx)
	addl	%eax, %r13d
	movl	%r13d, 40(%rbx)
	addl	%eax, %r12d
	movl	%r12d, 44(%rbx)
	addl	-48(%rbp), %r12d                ## 4-byte Folded Reload
	movl	%r12d, 48(%rbx)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	addl	%ecx, %eax
	movl	%eax, 52(%rbx)
	addl	%ecx, %r15d
	movl	%r15d, 56(%rbx)
	addl	-44(%rbp), %r15d                ## 4-byte Folded Reload
	movl	%r15d, 60(%rbx)
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CRTC_INTERLACE_HALVE_V,4,2     ## @CRTC_INTERLACE_HALVE_V
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_panel_mode_fixup        ; -- Begin function amdgpu_panel_mode_fixup
	.p2align	2
_amdgpu_panel_mode_fixup:               ; @amdgpu_panel_mode_fixup
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	bl	_to_amdgpu_encoder
	mov	x20, x0
	ldp	w8, w9, [x0]
	ldp	w10, w11, [x0, #8]
	ldp	w12, w13, [x0, #16]
	ldp	w14, w15, [x0, #24]
	ldr	d0, [x0, #64]
	str	d0, [x19, #64]
	str	w11, [x19, #12]
	ldr	w16, [x0, #12]
	sub	w21, w10, w11
	add	w10, w16, w21
	str	w9, [x19, #4]
	ldr	w17, [x0, #4]
	sub	w22, w8, w9
	add	w8, w17, w22
	str	w8, [x19]
	str	w10, [x19, #8]
	sub	w23, w12, w9
	add	w8, w17, w23
	sub	w24, w14, w12
	add	w9, w8, w24
	sub	w25, w13, w11
	add	w10, w16, w25
	stp	w8, w10, [x19, #16]
	sub	w26, w15, w13
	add	w8, w10, w26
	stp	w9, w8, [x19, #24]
Lloh0:
	adrp	x8, _CRTC_INTERLACE_HALVE_V@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CRTC_INTERLACE_HALVE_V@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_drm_mode_set_crtcinfo
	ldr	w8, [x20, #4]
	ldr	w9, [x20, #12]
	stp	w8, w9, [x19, #32]
	add	w10, w8, w22
	add	w8, w8, w23
	add	w11, w8, w24
	stp	w10, w8, [x19, #40]
	add	w8, w9, w21
	stp	w11, w8, [x19, #48]
	add	w8, w9, w25
	add	w9, w8, w26
	stp	w8, w9, [x19, #56]
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CRTC_INTERLACE_HALVE_V,4,2     ; @CRTC_INTERLACE_HALVE_V
.subsections_via_symbols
