	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_dm_crtc_configure_crc_source ## -- Begin function amdgpu_dm_crtc_configure_crc_source
	.p2align	4, 0x90
_amdgpu_dm_crtc_configure_crc_source:   ## @amdgpu_dm_crtc_configure_crc_source
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ebx
	movq	(%rdi), %rax
	movq	(%rax), %r14
	movq	(%rsi), %r15
	movl	%edx, %edi
	callq	_amdgpu_dm_is_valid_crc_source
	testq	%r15, %r15
	je	LBB0_1
## %bb.2:
	movl	%eax, %r12d
	movq	%r14, %rdi
	callq	_mutex_lock
	movl	%ebx, %edi
	callq	_dm_is_crc_source_crtc
	testq	%rax, %rax
	je	LBB0_5
## %bb.3:
	movq	(%r15), %rax
	movl	(%rax), %edi
	movq	%r15, %rsi
	movl	%r12d, %edx
	movl	%r12d, %ecx
	callq	_dc_stream_configure_crc
	testl	%eax, %eax
	je	LBB0_4
LBB0_5:
	movl	%ebx, %edi
	callq	_dm_need_crc_dither
	testl	%eax, %eax
	je	LBB0_6
## %bb.7:
	movq	_DITHER_OPTION_DEFAULT@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_1:
	xorl	%ebx, %ebx
	jmp	LBB0_10
LBB0_6:
	movq	_DITHER_OPTION_TRUN8@GOTPCREL(%rip), %rax
LBB0_8:
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_dc_stream_set_dither_option
	xorl	%ebx, %ebx
	jmp	LBB0_9
LBB0_4:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_9:
	movq	%r14, %rdi
	callq	_mutex_unlock
LBB0_10:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_DITHER_OPTION_TRUN8,4,2        ## @DITHER_OPTION_TRUN8
	.comm	_DITHER_OPTION_DEFAULT,4,2      ## @DITHER_OPTION_DEFAULT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_dm_crtc_configure_crc_source ; -- Begin function amdgpu_dm_crtc_configure_crc_source
	.p2align	2
_amdgpu_dm_crtc_configure_crc_source:   ; @amdgpu_dm_crtc_configure_crc_source
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x2
	ldr	x8, [x0]
	ldr	x19, [x8]
	ldr	x20, [x1]
	mov	x0, x2
	bl	_amdgpu_dm_is_valid_crc_source
	cbz	x20, LBB0_9
; %bb.1:
	mov	x22, x0
	mov	x0, x19
	bl	_mutex_lock
	mov	x0, x21
	bl	_dm_is_crc_source_crtc
	cbz	x0, LBB0_3
; %bb.2:
	ldr	x8, [x20]
	ldr	w0, [x8]
	mov	x1, x20
	mov	x2, x22
	mov	x3, x22
	bl	_dc_stream_configure_crc
	cbz	w0, LBB0_7
LBB0_3:
	mov	x0, x21
	bl	_dm_need_crc_dither
	cbz	w0, LBB0_5
; %bb.4:
Lloh0:
	adrp	x8, _DITHER_OPTION_DEFAULT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DITHER_OPTION_DEFAULT@GOTPAGEOFF]
	b	LBB0_6
LBB0_5:
Lloh2:
	adrp	x8, _DITHER_OPTION_TRUN8@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DITHER_OPTION_TRUN8@GOTPAGEOFF]
LBB0_6:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_dc_stream_set_dither_option
	mov	w20, #0
	b	LBB0_8
LBB0_7:
Lloh4:
	adrp	x8, _EINVAL@GOTPAGE
Lloh5:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	neg	w20, w8
LBB0_8:
	mov	x0, x19
	bl	_mutex_unlock
LBB0_9:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_DITHER_OPTION_TRUN8,4,2        ; @DITHER_OPTION_TRUN8
	.comm	_DITHER_OPTION_DEFAULT,4,2      ; @DITHER_OPTION_DEFAULT
.subsections_via_symbols
