	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_get_pp_num_states
_amdgpu_get_pp_num_states:              ## @amdgpu_get_pp_num_states
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	callq	_dev_get_drvdata
	movq	(%rax), %rbx
	movq	%rbx, %rdi
	callq	_is_support_sw_smu
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	addq	$8, %rbx
	leaq	-56(%rbp), %rsi
	movq	%rbx, %rdi
	callq	_smu_get_power_num_states
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	LBB0_11
	jmp	LBB0_4
LBB0_2:
	movq	(%rbx), %rax
	cmpq	$0, (%rax)
	je	LBB0_4
## %bb.3:
	leaq	-56(%rbp), %rsi
	movq	%rbx, %rdi
	callq	_amdgpu_dpm_get_pp_num_states
LBB0_4:
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-56(%rbp), %ecx
	leaq	L_.str(%rip), %rdx
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_snprintf
	movl	%eax, %r12d
	cmpl	$0, -56(%rbp)
	jle	LBB0_11
## %bb.5:
	leaq	L_.str.2(%rip), %r13
	leaq	L_.str.1(%rip), %r15
	xorl	%ebx, %ebx
	jmp	LBB0_6
	.p2align	4, 0x90
LBB0_10:                                ##   in Loop: Header=BB0_6 Depth=1
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdx
	movl	%ebx, %ecx
	xorl	%eax, %eax
	callq	_snprintf
	addl	%eax, %r12d
	incq	%rbx
	movslq	-56(%rbp), %rax
	cmpq	%rax, %rbx
	jge	LBB0_11
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movslq	%r12d, %rdi
	addq	%r14, %rdi
	movq	-48(%rbp), %rax
	movq	(%rax,%rbx,8), %rax
	movq	%r13, %r8
	movq	_POWER_STATE_TYPE_INTERNAL_BOOT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_10
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=1
	leaq	L_.str.3(%rip), %r8
	movq	_POWER_STATE_TYPE_BATTERY@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_10
## %bb.8:                               ##   in Loop: Header=BB0_6 Depth=1
	leaq	L_.str.4(%rip), %r8
	movq	_POWER_STATE_TYPE_BALANCED@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_10
## %bb.9:                               ##   in Loop: Header=BB0_6 Depth=1
	movq	_POWER_STATE_TYPE_PERFORMANCE@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	leaq	L_.str.6(%rip), %r8
	leaq	L_.str.5(%rip), %rax
	cmoveq	%rax, %r8
	jmp	LBB0_10
LBB0_11:
	movl	%r12d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"states: %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"%d %s\n"

	.comm	_POWER_STATE_TYPE_INTERNAL_BOOT,8,3 ## @POWER_STATE_TYPE_INTERNAL_BOOT
L_.str.2:                               ## @.str.2
	.asciz	"boot"

	.comm	_POWER_STATE_TYPE_BATTERY,8,3   ## @POWER_STATE_TYPE_BATTERY
L_.str.3:                               ## @.str.3
	.asciz	"battery"

	.comm	_POWER_STATE_TYPE_BALANCED,8,3  ## @POWER_STATE_TYPE_BALANCED
L_.str.4:                               ## @.str.4
	.asciz	"balanced"

	.comm	_POWER_STATE_TYPE_PERFORMANCE,8,3 ## @POWER_STATE_TYPE_PERFORMANCE
L_.str.5:                               ## @.str.5
	.asciz	"performance"

L_.str.6:                               ## @.str.6
	.asciz	"default"

	.no_dead_strip	_amdgpu_get_pp_num_states
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_get_pp_num_states
_amdgpu_get_pp_num_states:              ; @amdgpu_get_pp_num_states
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x2
	bl	_dev_get_drvdata
	ldr	x20, [x0]
	mov	x0, x20
	bl	_is_support_sw_smu
	cbz	x0, LBB0_2
; %bb.1:
	add	x0, x20, #8
	add	x1, sp, #16
	bl	_smu_get_power_num_states
	mov	x20, x0
	cbnz	w0, LBB0_11
	b	LBB0_4
LBB0_2:
	ldr	x8, [x20]
	ldr	x8, [x8]
	cbz	x8, LBB0_4
; %bb.3:
	add	x1, sp, #16
	mov	x0, x20
	bl	_amdgpu_dpm_get_pp_num_states
LBB0_4:
Lloh0:
	adrp	x23, _PAGE_SIZE@GOTPAGE
Lloh1:
	ldr	x23, [x23, _PAGE_SIZE@GOTPAGEOFF]
	ldr	w1, [x23]
	ldr	w3, [sp, #16]
Lloh2:
	adrp	x2, l_.str@PAGE
Lloh3:
	add	x2, x2, l_.str@PAGEOFF
	mov	x0, x19
	bl	_snprintf
	mov	x20, x0
	ldr	w8, [sp, #16]
	cmp	w8, #1
	b.lt	LBB0_11
; %bb.5:
	mov	x21, #0
Lloh4:
	adrp	x24, _POWER_STATE_TYPE_INTERNAL_BOOT@GOTPAGE
Lloh5:
	ldr	x24, [x24, _POWER_STATE_TYPE_INTERNAL_BOOT@GOTPAGEOFF]
Lloh6:
	adrp	x25, l_.str.2@PAGE
Lloh7:
	add	x25, x25, l_.str.2@PAGEOFF
Lloh8:
	adrp	x22, l_.str.1@PAGE
Lloh9:
	add	x22, x22, l_.str.1@PAGEOFF
Lloh10:
	adrp	x26, _POWER_STATE_TYPE_BATTERY@GOTPAGE
Lloh11:
	ldr	x26, [x26, _POWER_STATE_TYPE_BATTERY@GOTPAGEOFF]
Lloh12:
	adrp	x27, l_.str.3@PAGE
Lloh13:
	add	x27, x27, l_.str.3@PAGEOFF
Lloh14:
	adrp	x28, l_.str.4@PAGE
Lloh15:
	add	x28, x28, l_.str.4@PAGEOFF
	b	LBB0_7
LBB0_6:                                 ;   in Loop: Header=BB0_7 Depth=1
	add	x0, x19, w20, sxtw
	ldr	w1, [x23]
	str	x9, [sp]
	mov	x2, x22
	mov	x3, x21
	bl	_snprintf
	add	w20, w0, w20
	add	x21, x21, #1
	ldrsw	x8, [sp, #16]
	cmp	x21, x8
	b.ge	LBB0_11
LBB0_7:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [sp, #24]
	ldr	x8, [x8, x21, lsl #3]
	ldr	x10, [x24]
	mov	x9, x25
	cmp	x8, x10
	b.eq	LBB0_6
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	ldr	x10, [x26]
	mov	x9, x27
	cmp	x8, x10
	b.eq	LBB0_6
; %bb.9:                                ;   in Loop: Header=BB0_7 Depth=1
Lloh16:
	adrp	x9, _POWER_STATE_TYPE_BALANCED@GOTPAGE
Lloh17:
	ldr	x9, [x9, _POWER_STATE_TYPE_BALANCED@GOTPAGEOFF]
Lloh18:
	ldr	x10, [x9]
	mov	x9, x28
	cmp	x8, x10
	b.eq	LBB0_6
; %bb.10:                               ;   in Loop: Header=BB0_7 Depth=1
Lloh19:
	adrp	x9, _POWER_STATE_TYPE_PERFORMANCE@GOTPAGE
Lloh20:
	ldr	x9, [x9, _POWER_STATE_TYPE_PERFORMANCE@GOTPAGEOFF]
Lloh21:
	ldr	x9, [x9]
	cmp	x8, x9
Lloh22:
	adrp	x8, l_.str.6@PAGE
Lloh23:
	add	x8, x8, l_.str.6@PAGEOFF
Lloh24:
	adrp	x9, l_.str.5@PAGE
Lloh25:
	add	x9, x9, l_.str.5@PAGEOFF
	csel	x9, x9, x8, eq
	b	LBB0_6
LBB0_11:
	mov	x0, x20
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"states: %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"%d %s\n"

	.comm	_POWER_STATE_TYPE_INTERNAL_BOOT,8,3 ; @POWER_STATE_TYPE_INTERNAL_BOOT
l_.str.2:                               ; @.str.2
	.asciz	"boot"

	.comm	_POWER_STATE_TYPE_BATTERY,8,3   ; @POWER_STATE_TYPE_BATTERY
l_.str.3:                               ; @.str.3
	.asciz	"battery"

	.comm	_POWER_STATE_TYPE_BALANCED,8,3  ; @POWER_STATE_TYPE_BALANCED
l_.str.4:                               ; @.str.4
	.asciz	"balanced"

	.comm	_POWER_STATE_TYPE_PERFORMANCE,8,3 ; @POWER_STATE_TYPE_PERFORMANCE
l_.str.5:                               ; @.str.5
	.asciz	"performance"

l_.str.6:                               ; @.str.6
	.asciz	"default"

	.no_dead_strip	_amdgpu_get_pp_num_states
.subsections_via_symbols
