	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_v8_0_line_buffer_adjust
_dce_v8_0_line_buffer_adjust:           ## @dce_v8_0_line_buffer_adjust
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r12
	movl	(%rsi), %r14d
	shll	$3, %r14d
	xorl	%r13d, %r13d
	movl	$1, %eax
	movl	$3840, %esi                     ## imm = 0xF00
	testq	%rdx, %rdx
	movq	%rdx, -64(%rbp)                 ## 8-byte Spill
	je	LBB0_8
## %bb.1:
	cmpq	$0, 8(%rbx)
	je	LBB0_8
## %bb.2:
	movl	(%rdx), %ecx
	movl	$2, %r13d
	cmpl	$1920, %ecx                     ## imm = 0x780
	jl	LBB0_8
## %bb.3:
	cmpl	$2560, %ecx                     ## imm = 0xA00
	jae	LBB0_5
## %bb.4:
	movl	$2, %eax
	movl	$5120, %esi                     ## imm = 0x1400
	movl	$2, %r13d
	jmp	LBB0_8
LBB0_5:
	cmpl	$4096, %ecx                     ## imm = 0x1000
	jb	LBB0_7
## %bb.6:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_KMS
LBB0_7:
	movq	_AMD_IS_APU@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%ecx, %ecx
	testl	%eax, (%r12)
	sete	%cl
	leal	(%rcx,%rcx), %r13d
	addl	$2, %r13d
	xorl	%eax, %eax
	movl	$8192, %esi                     ## imm = 0x2000
LBB0_8:
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movq	_mmLB_MEMORY_CTRL@GOTPCREL(%rip), %rcx
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movl	4(%rbx), %edi
	addl	(%rcx), %edi
	movq	_LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$1712, %esi                     ## imm = 0x6B0
	shll	%cl, %esi
	orl	%eax, %esi
	callq	_WREG32
	movq	_mmPIPE0_DMIF_BUFFER_CONTROL@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	addl	%r14d, %edi
	movq	_PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r13d
	movl	%r13d, %esi
	callq	_WREG32
	cmpl	$0, 4(%r12)
	jle	LBB0_12
## %bb.9:
	xorl	%ebx, %ebx
	movq	_PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATION_COMPLETED_MASK@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_10:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r15), %edi
	addl	%r14d, %edi
	callq	_RREG32
	testl	%eax, (%r13)
	jne	LBB0_12
## %bb.11:                              ##   in Loop: Header=BB0_10 Depth=1
	movl	$1, %edi
	callq	_udelay
	incl	%ebx
	cmpl	4(%r12), %ebx
	jl	LBB0_10
LBB0_12:
	xorl	%edx, %edx
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	cmpq	$0, 8(%rcx)
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	cmovel	%edx, %eax
	cmpq	$0, -64(%rbp)                   ## 8-byte Folded Reload
	cmovel	%edx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_IS_APU,4,2                 ## @AMD_IS_APU
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Mode too big for LB!\n"

	.comm	_mmLB_MEMORY_CTRL,4,2           ## @mmLB_MEMORY_CTRL
	.comm	_LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT,4,2 ## @LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
	.comm	_LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT,4,2 ## @LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
	.comm	_mmPIPE0_DMIF_BUFFER_CONTROL,4,2 ## @mmPIPE0_DMIF_BUFFER_CONTROL
	.comm	_PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT,4,2 ## @PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT
	.comm	_PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATION_COMPLETED_MASK,4,2 ## @PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATION_COMPLETED_MASK
	.no_dead_strip	_dce_v8_0_line_buffer_adjust
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_v8_0_line_buffer_adjust
_dce_v8_0_line_buffer_adjust:           ; @dce_v8_0_line_buffer_adjust
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	mov	w24, #0
	ldr	w8, [x1]
	lsl	w22, w8, #3
	mov	w8, #1
	mov	w23, #3840
	cbz	x2, LBB0_9
; %bb.1:
	ldr	x9, [x20, #8]
	cbz	x9, LBB0_9
; %bb.2:
	ldr	w8, [x19]
	cmp	w8, #1920
	b.ge	LBB0_4
; %bb.3:
	mov	w24, #2
	mov	w8, #1
	mov	w23, #3840
	b	LBB0_9
LBB0_4:
	cmp	w8, #2560
	b.hs	LBB0_6
; %bb.5:
	mov	w8, #2
	mov	w23, #5120
	mov	w24, #2
	b	LBB0_9
LBB0_6:
	cmp	w8, #1, lsl #12                 ; =4096
	b.lo	LBB0_8
; %bb.7:
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
LBB0_8:
	mov	w8, #0
	ldr	w9, [x21]
Lloh2:
	adrp	x10, _AMD_IS_APU@GOTPAGE
Lloh3:
	ldr	x10, [x10, _AMD_IS_APU@GOTPAGEOFF]
Lloh4:
	ldr	w10, [x10]
	tst	w10, w9
	mov	w9, #2
	mov	w10, #4
	csel	w24, w10, w9, eq
	mov	w23, #8192
LBB0_9:
Lloh5:
	adrp	x9, _mmLB_MEMORY_CTRL@GOTPAGE
Lloh6:
	ldr	x9, [x9, _mmLB_MEMORY_CTRL@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	ldr	w10, [x20, #4]
	add	w0, w10, w9
Lloh8:
	adrp	x9, _LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT@GOTPAGE
Lloh9:
	ldr	x9, [x9, _LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh11:
	adrp	x9, _LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT@GOTPAGE
Lloh12:
	ldr	x9, [x9, _LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	mov	w10, #1712
	lsl	w9, w10, w9
	orr	w1, w9, w8
	bl	_WREG32
Lloh14:
	adrp	x25, _mmPIPE0_DMIF_BUFFER_CONTROL@GOTPAGE
Lloh15:
	ldr	x25, [x25, _mmPIPE0_DMIF_BUFFER_CONTROL@GOTPAGEOFF]
	ldr	w8, [x25]
	add	w0, w8, w22
Lloh16:
	adrp	x8, _PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	lsl	w1, w24, w8
	bl	_WREG32
	ldr	w8, [x21, #4]
	cmp	w8, #1
	b.lt	LBB0_13
; %bb.10:
	mov	w24, #0
Lloh19:
	adrp	x26, _PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATION_COMPLETED_MASK@GOTPAGE
Lloh20:
	ldr	x26, [x26, _PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATION_COMPLETED_MASK@GOTPAGEOFF]
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x25]
	add	w0, w8, w22
	bl	_RREG32
	ldr	w8, [x26]
	tst	w8, w0
	b.ne	LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=1
	mov	w0, #1
	bl	_udelay
	add	w24, w24, #1
	ldr	w8, [x21, #4]
	cmp	w24, w8
	b.lt	LBB0_11
LBB0_13:
	ldr	x8, [x20, #8]
	cmp	x8, #0
	ccmp	x19, #0, #4, ne
	csel	w0, w23, wzr, ne
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_IS_APU,4,2                 ; @AMD_IS_APU
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Mode too big for LB!\n"

	.comm	_mmLB_MEMORY_CTRL,4,2           ; @mmLB_MEMORY_CTRL
	.comm	_LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT,4,2 ; @LB_MEMORY_CTRL__LB_MEMORY_CONFIG__SHIFT
	.comm	_LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT,4,2 ; @LB_MEMORY_CTRL__LB_MEMORY_SIZE__SHIFT
	.comm	_mmPIPE0_DMIF_BUFFER_CONTROL,4,2 ; @mmPIPE0_DMIF_BUFFER_CONTROL
	.comm	_PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT,4,2 ; @PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT
	.comm	_PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATION_COMPLETED_MASK,4,2 ; @PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATION_COMPLETED_MASK
	.no_dead_strip	_dce_v8_0_line_buffer_adjust
.subsections_via_symbols
