	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function link_detect_sink
_link_detect_sink:                      ## @link_detect_sink
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %rbx
	movq	16(%rdi), %rax
	movl	(%rax), %edi
	movl	(%rbx), %esi
	callq	_get_basic_signal_type
	movl	%eax, %r14d
	movl	(%rbx), %eax
	cmpl	$129, %eax
	je	LBB0_3
## %bb.1:
	cmpl	$128, %eax
	jne	LBB0_6
## %bb.2:
	movq	8(%rbx), %rax
	movq	(%rax), %rax
	cmpl	$0, (%rax)
	je	LBB0_5
	jmp	LBB0_6
LBB0_3:
	movq	_DETECT_REASON_HPDRX@GOTPCREL(%rip), %rax
	cmpl	%r15d, (%rax)
	je	LBB0_6
## %bb.4:
	movq	%rbx, %rdi
	callq	_dm_helpers_is_dp_sink_present
	testl	%eax, %eax
	jne	LBB0_6
LBB0_5:
	movq	_SIGNAL_TYPE_DVI_SINGLE_LINK@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
LBB0_6:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CONNECTOR_ID_PCIE,4,2          ## @CONNECTOR_ID_PCIE
	.comm	_SIGNAL_TYPE_DVI_SINGLE_LINK,4,2 ## @SIGNAL_TYPE_DVI_SINGLE_LINK
	.comm	_DETECT_REASON_HPDRX,4,2        ## @DETECT_REASON_HPDRX
	.no_dead_strip	_link_detect_sink
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function link_detect_sink
_link_detect_sink:                      ; @link_detect_sink
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x1
	mov	x20, x0
	ldr	x8, [x0, #16]
	ldr	w0, [x8]
	ldr	w1, [x20]
	bl	_get_basic_signal_type
	mov	x19, x0
	ldr	w8, [x20]
	cmp	w8, #129
	b.eq	LBB0_3
; %bb.1:
	cmp	w8, #128
	b.ne	LBB0_5
; %bb.2:
	ldr	x8, [x20, #8]
	ldr	x8, [x8]
	ldr	w8, [x8]
Lloh0:
	adrp	x9, _SIGNAL_TYPE_DVI_SINGLE_LINK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _SIGNAL_TYPE_DVI_SINGLE_LINK@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	cmp	w8, #0
	csel	w19, w9, w19, eq
	b	LBB0_5
LBB0_3:
Lloh3:
	adrp	x8, _DETECT_REASON_HPDRX@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DETECT_REASON_HPDRX@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w8, w21
	b.eq	LBB0_5
; %bb.4:
	mov	x0, x20
	bl	_dm_helpers_is_dp_sink_present
Lloh6:
	adrp	x8, _SIGNAL_TYPE_DVI_SINGLE_LINK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SIGNAL_TYPE_DVI_SINGLE_LINK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	w0, #0
	csel	w19, w8, w19, eq
LBB0_5:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_CONNECTOR_ID_PCIE,4,2          ; @CONNECTOR_ID_PCIE
	.comm	_SIGNAL_TYPE_DVI_SINGLE_LINK,4,2 ; @SIGNAL_TYPE_DVI_SINGLE_LINK
	.comm	_DETECT_REASON_HPDRX,4,2        ; @DETECT_REASON_HPDRX
	.no_dead_strip	_link_detect_sink
.subsections_via_symbols
