	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdi_display_enable
_sdi_display_enable:                    ## @sdi_display_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	callq	_dssdev_to_sdi
	movq	%rax, %rbx
	movl	(%rax), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	jne	LBB0_9
## %bb.1:
	movq	8(%rbx), %rax
	movl	(%rax), %edi
	callq	_dispc_runtime_get
	testl	%eax, %eax
	jne	LBB0_8
## %bb.2:
	movl	28(%rbx), %esi
	leaq	-32(%rbp), %rdx
	leaq	-24(%rbp), %rcx
	movq	%rbx, %rdi
	callq	_sdi_calc_clock_div
	testl	%eax, %eax
	jne	LBB0_7
## %bb.3:
	movl	-24(%rbp), %eax
	movl	%eax, 24(%rbx)
	movq	8(%rbx), %rdi
	movq	-32(%rbp), %rsi
	callq	_dss_set_fck_rate
	testl	%eax, %eax
	jne	LBB0_7
## %bb.4:
	leaq	24(%rbx), %r14
	movq	%rbx, %rdi
	callq	_sdi_config_lcd_manager
	movq	8(%rbx), %rax
	movl	(%rax), %edi
	movl	16(%rbx), %esi
	movq	%r14, %rdx
	callq	_dispc_mgr_set_clock_div
	movq	8(%rbx), %rdi
	movl	20(%rbx), %esi
	callq	_dss_sdi_init
	movq	8(%rbx), %rdi
	callq	_dss_sdi_enable
	testl	%eax, %eax
	jne	LBB0_7
## %bb.5:
	movq	%rbx, %r14
	addq	$16, %r14
	movl	$2, %edi
	callq	_mdelay
	movq	%r14, %rdi
	callq	_dss_mgr_enable
	testl	%eax, %eax
	je	LBB0_9
## %bb.6:
	movq	8(%rbx), %rdi
	callq	_dss_sdi_disable
LBB0_7:
	movq	8(%rbx), %rax
	movl	(%rax), %edi
	callq	_dispc_runtime_put
LBB0_8:
	movl	(%rbx), %edi
	callq	_regulator_disable
LBB0_9:
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_sdi_display_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdi_display_enable
_sdi_display_enable:                    ; @sdi_display_enable
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_dssdev_to_sdi
	mov	x19, x0
	ldr	w0, [x0]
	bl	_regulator_enable
	cbnz	w0, LBB0_9
; %bb.1:
	ldr	x8, [x19, #8]
	ldr	w0, [x8]
	bl	_dispc_runtime_get
	cbnz	w0, LBB0_8
; %bb.2:
	ldr	w1, [x19, #28]
	mov	x2, sp
	add	x3, sp, #8
	mov	x0, x19
	bl	_sdi_calc_clock_div
	cbnz	w0, LBB0_7
; %bb.3:
	ldr	w8, [sp, #8]
	mov	x21, x19
	str	w8, [x21, #24]!
	ldur	x0, [x21, #-16]
	ldr	x1, [sp]
	bl	_dss_set_fck_rate
	cbnz	w0, LBB0_7
; %bb.4:
	mov	x0, x19
	bl	_sdi_config_lcd_manager
	mov	x20, x19
	ldr	w1, [x20, #16]!
	ldur	x8, [x20, #-8]
	ldr	w0, [x8]
	mov	x2, x21
	bl	_dispc_mgr_set_clock_div
	ldur	x0, [x20, #-8]
	ldr	w1, [x20, #4]
	bl	_dss_sdi_init
	ldur	x0, [x20, #-8]
	bl	_dss_sdi_enable
	cbnz	w0, LBB0_7
; %bb.5:
	mov	w0, #2
	bl	_mdelay
	mov	x0, x20
	bl	_dss_mgr_enable
	cbz	w0, LBB0_9
; %bb.6:
	ldr	x0, [x19, #8]
	bl	_dss_sdi_disable
LBB0_7:
	ldr	x8, [x19, #8]
	ldr	w0, [x8]
	bl	_dispc_runtime_put
LBB0_8:
	ldr	w0, [x19]
	bl	_regulator_disable
LBB0_9:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_sdi_display_enable
.subsections_via_symbols
