	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_uvd_v1_0_stop                  ## -- Begin function uvd_v1_0_stop
	.p2align	4, 0x90
_uvd_v1_0_stop:                         ## @uvd_v1_0_stop
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	_UVD_RBC_RB_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$285278465, %esi                ## imm = 0x11010101
	callq	_WREG32
	movq	_UVD_LMI_CTRL2@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movl	$256, %esi                      ## imm = 0x100
	movl	$-257, %edx                     ## imm = 0xFEFF
	callq	_WREG32_P
	movq	_UVD_RB_ARB_CTRL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movl	$8, %esi
	movl	$-9, %edx
	callq	_WREG32_P
	movl	$1, %edi
	callq	_mdelay
	movq	_UVD_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_VCPU_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movl	$5, %edi
	callq	_mdelay
	movq	_UVD_VCPU_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movl	(%r14), %edi
	xorl	%esi, %esi
	movl	$-257, %edx                     ## imm = 0xFEFF
	callq	_WREG32_P
	movl	(%rbx), %edi
	xorl	%esi, %esi
	movl	$-9, %edx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_WREG32_P                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_UVD_RBC_RB_CNTL,4,2            ## @UVD_RBC_RB_CNTL
	.comm	_UVD_LMI_CTRL2,4,2              ## @UVD_LMI_CTRL2
	.comm	_UVD_RB_ARB_CTRL,4,2            ## @UVD_RB_ARB_CTRL
	.comm	_UVD_SOFT_RESET,4,2             ## @UVD_SOFT_RESET
	.comm	_VCPU_SOFT_RESET,4,2            ## @VCPU_SOFT_RESET
	.comm	_UVD_VCPU_CNTL,4,2              ## @UVD_VCPU_CNTL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_uvd_v1_0_stop                  ; -- Begin function uvd_v1_0_stop
	.p2align	2
_uvd_v1_0_stop:                         ; @uvd_v1_0_stop
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x8, _UVD_RBC_RB_CNTL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _UVD_RBC_RB_CNTL@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	w1, #257
	movk	w1, #4353, lsl #16
	bl	_WREG32
Lloh3:
	adrp	x19, _UVD_LMI_CTRL2@GOTPAGE
Lloh4:
	ldr	x19, [x19, _UVD_LMI_CTRL2@GOTPAGEOFF]
	ldr	w0, [x19]
	mov	w1, #256
	mov	w2, #-257
	bl	_WREG32_P
Lloh5:
	adrp	x20, _UVD_RB_ARB_CTRL@GOTPAGE
Lloh6:
	ldr	x20, [x20, _UVD_RB_ARB_CTRL@GOTPAGEOFF]
	ldr	w0, [x20]
	mov	w1, #8
	mov	w2, #-9
	bl	_WREG32_P
	mov	w0, #1
	bl	_mdelay
Lloh7:
	adrp	x8, _UVD_SOFT_RESET@GOTPAGE
Lloh8:
	ldr	x8, [x8, _UVD_SOFT_RESET@GOTPAGEOFF]
Lloh9:
	ldr	w0, [x8]
Lloh10:
	adrp	x8, _VCPU_SOFT_RESET@GOTPAGE
Lloh11:
	ldr	x8, [x8, _VCPU_SOFT_RESET@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	bl	_WREG32
	mov	w0, #5
	bl	_mdelay
Lloh13:
	adrp	x8, _UVD_VCPU_CNTL@GOTPAGE
Lloh14:
	ldr	x8, [x8, _UVD_VCPU_CNTL@GOTPAGEOFF]
Lloh15:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
	ldr	w0, [x19]
	mov	w1, #0
	mov	w2, #-257
	bl	_WREG32_P
	ldr	w0, [x20]
	mov	w1, #0
	mov	w2, #-9
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_WREG32_P
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_UVD_RBC_RB_CNTL,4,2            ; @UVD_RBC_RB_CNTL
	.comm	_UVD_LMI_CTRL2,4,2              ; @UVD_LMI_CTRL2
	.comm	_UVD_RB_ARB_CTRL,4,2            ; @UVD_RB_ARB_CTRL
	.comm	_UVD_SOFT_RESET,4,2             ; @UVD_SOFT_RESET
	.comm	_VCPU_SOFT_RESET,4,2            ; @VCPU_SOFT_RESET
	.comm	_UVD_VCPU_CNTL,4,2              ; @UVD_VCPU_CNTL
.subsections_via_symbols
