	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function zynqmp_fpga_ops_state
_zynqmp_fpga_ops_state:                 ## @zynqmp_fpga_ops_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	xorl	%eax, %eax
	callq	_zynqmp_pm_get_eemi_ops
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_IS_ERR_OR_NULL
	movq	_FPGA_MGR_STATE_UNKNOWN@GOTPCREL(%rip), %rcx
	testq	%rax, %rax
	je	LBB0_1
LBB0_5:
	movl	(%rcx), %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
LBB0_1:
	movq	(%rbx), %rax
	testq	%rax, %rax
	je	LBB0_5
## %bb.2:
	leaq	-12(%rbp), %rdi
	callq	*%rax
	movq	_IXR_FPGA_DONE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, -12(%rbp)
	jne	LBB0_3
## %bb.4:
	movq	_FPGA_MGR_STATE_UNKNOWN@GOTPCREL(%rip), %rcx
	jmp	LBB0_5
LBB0_3:
	movq	_FPGA_MGR_STATE_OPERATING@GOTPCREL(%rip), %rcx
	jmp	LBB0_5
	.cfi_endproc
                                        ## -- End function
	.comm	_FPGA_MGR_STATE_UNKNOWN,4,2     ## @FPGA_MGR_STATE_UNKNOWN
	.comm	_IXR_FPGA_DONE_MASK,4,2         ## @IXR_FPGA_DONE_MASK
	.comm	_FPGA_MGR_STATE_OPERATING,4,2   ## @FPGA_MGR_STATE_OPERATING
	.no_dead_strip	_zynqmp_fpga_ops_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function zynqmp_fpga_ops_state
_zynqmp_fpga_ops_state:                 ; @zynqmp_fpga_ops_state
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_zynqmp_pm_get_eemi_ops
	mov	x19, x0
	bl	_IS_ERR_OR_NULL
	cbz	x0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x19, _FPGA_MGR_STATE_UNKNOWN@GOTPAGE
Lloh1:
	ldr	x19, [x19, _FPGA_MGR_STATE_UNKNOWN@GOTPAGEOFF]
	b	LBB0_4
LBB0_2:
	ldr	x8, [x19]
Lloh2:
	adrp	x19, _FPGA_MGR_STATE_UNKNOWN@GOTPAGE
Lloh3:
	ldr	x19, [x19, _FPGA_MGR_STATE_UNKNOWN@GOTPAGEOFF]
	cbz	x8, LBB0_4
; %bb.3:
	add	x0, sp, #12
	blr	x8
Lloh4:
	adrp	x8, _IXR_FPGA_DONE_MASK@GOTPAGE
Lloh5:
	ldr	x8, [x8, _IXR_FPGA_DONE_MASK@GOTPAGEOFF]
	ldr	w9, [sp, #12]
Lloh6:
	ldr	w8, [x8]
Lloh7:
	adrp	x10, _FPGA_MGR_STATE_OPERATING@GOTPAGE
Lloh8:
	ldr	x10, [x10, _FPGA_MGR_STATE_OPERATING@GOTPAGEOFF]
	tst	w8, w9
	csel	x19, x19, x10, eq
LBB0_4:
	ldr	w0, [x19]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.cfi_endproc
                                        ; -- End function
	.comm	_FPGA_MGR_STATE_UNKNOWN,4,2     ; @FPGA_MGR_STATE_UNKNOWN
	.comm	_IXR_FPGA_DONE_MASK,4,2         ; @IXR_FPGA_DONE_MASK
	.comm	_FPGA_MGR_STATE_OPERATING,4,2   ; @FPGA_MGR_STATE_OPERATING
	.no_dead_strip	_zynqmp_fpga_ops_state
.subsections_via_symbols
