	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_gvt_reset_vgpu_locked    ## -- Begin function intel_gvt_reset_vgpu_locked
	.p2align	4, 0x90
_intel_gvt_reset_vgpu_locked:           ## @intel_gvt_reset_vgpu_locked
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r15
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movq	32(%rdi), %r13
	movq	_ALL_ENGINES@GOTPCREL(%rip), %rax
	movq	%rdx, %r12
	testl	%esi, %esi
	je	LBB0_2
## %bb.1:
	movq	(%rax), %r12
LBB0_2:
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_gvt_dbg_core
	movl	8(%rbx), %esi
	leaq	L_.str.1(%rip), %rdi
	movl	%r14d, %edx
	movq	%r15, %rcx
	xorl	%eax, %eax
	callq	_gvt_dbg_core
	movq	%r12, 16(%rbx)
	movq	%rbx, %rdi
	callq	_intel_vgpu_stop_schedule
	cmpq	$0, (%r13)
	jne	LBB0_4
## %bb.3:
	leaq	24(%rbx), %r13
	movq	%r13, %rdi
	callq	_mutex_unlock
	movq	%rbx, %rdi
	callq	_intel_gvt_wait_vgpu_idle
	movq	%r13, %rdi
	callq	_mutex_lock
LBB0_4:
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_intel_vgpu_reset_submission
	movq	_ALL_ENGINES@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	testl	%r14d, %r14d
	jne	LBB0_6
## %bb.5:
	cmpq	%r15, %rsi
	jne	LBB0_9
LBB0_6:
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_intel_vgpu_select_submission_ops
	movq	%rbx, %rdi
	callq	_intel_vgpu_invalidate_ppgtt
	movq	%rbx, %rdi
	testl	%r14d, %r14d
	je	LBB0_8
## %bb.7:
	callq	_intel_vgpu_reset_gtt
	movq	%rbx, %rdi
	callq	_intel_vgpu_reset_resource
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_intel_vgpu_reset_mmio
	movq	%rbx, %rdi
	callq	_populate_pvinfo_page
	movq	%rbx, %rdi
	callq	_intel_vgpu_reset_display
	movq	%rbx, %rdi
	callq	_intel_vgpu_reset_cfg_space
	movq	$0, (%rbx)
	jmp	LBB0_9
LBB0_8:
	xorl	%esi, %esi
	callq	_intel_vgpu_reset_mmio
	movq	%rbx, %rdi
	callq	_populate_pvinfo_page
	movq	%rbx, %rdi
	callq	_intel_vgpu_reset_display
LBB0_9:
	movq	$0, 16(%rbx)
	movl	8(%rbx), %esi
	leaq	L_.str.2(%rip), %rdi
	xorl	%eax, %eax
	callq	_gvt_dbg_core
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_gvt_dbg_core                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ALL_ENGINES,8,3                ## @ALL_ENGINES
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"------------------------------------------\n"

L_.str.1:                               ## @.str.1
	.asciz	"resseting vgpu%d, dmlr %d, engine_mask %08x\n"

L_.str.2:                               ## @.str.2
	.asciz	"reset vgpu%d done\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_gvt_reset_vgpu_locked    ; -- Begin function intel_gvt_reset_vgpu_locked
	.p2align	2
_intel_gvt_reset_vgpu_locked:           ; @intel_gvt_reset_vgpu_locked
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
	ldr	x23, [x0, #32]
Lloh0:
	adrp	x24, _ALL_ENGINES@GOTPAGE
Lloh1:
	ldr	x24, [x24, _ALL_ENGINES@GOTPAGEOFF]
	ldr	x8, [x24]
	cmp	w1, #0
	csel	x22, x8, x2, ne
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	bl	_gvt_dbg_core
	ldr	w8, [x19, #8]
	stp	x20, x21, [sp, #8]
	str	x8, [sp]
Lloh4:
	adrp	x0, l_.str.1@PAGE
Lloh5:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_gvt_dbg_core
	str	x22, [x19, #16]
	mov	x0, x19
	bl	_intel_vgpu_stop_schedule
	ldr	x8, [x23]
	cbnz	x8, LBB0_2
; %bb.1:
	add	x23, x19, #24
	mov	x0, x23
	bl	_mutex_unlock
	mov	x0, x19
	bl	_intel_gvt_wait_vgpu_idle
	mov	x0, x23
	bl	_mutex_lock
LBB0_2:
	mov	x0, x19
	mov	x1, x22
	bl	_intel_vgpu_reset_submission
	ldr	x1, [x24]
	cbnz	w20, LBB0_4
; %bb.3:
	cmp	x1, x21
	b.ne	LBB0_7
LBB0_4:
	mov	x0, x19
	mov	w2, #0
	bl	_intel_vgpu_select_submission_ops
	mov	x0, x19
	bl	_intel_vgpu_invalidate_ppgtt
	mov	x0, x19
	cbz	w20, LBB0_6
; %bb.5:
	bl	_intel_vgpu_reset_gtt
	mov	x0, x19
	bl	_intel_vgpu_reset_resource
	mov	x0, x19
	mov	x1, x20
	bl	_intel_vgpu_reset_mmio
	mov	x0, x19
	bl	_populate_pvinfo_page
	mov	x0, x19
	bl	_intel_vgpu_reset_display
	mov	x0, x19
	bl	_intel_vgpu_reset_cfg_space
	str	xzr, [x19]
	b	LBB0_7
LBB0_6:
	mov	w1, #0
	bl	_intel_vgpu_reset_mmio
	mov	x0, x19
	bl	_populate_pvinfo_page
	mov	x0, x19
	bl	_intel_vgpu_reset_display
LBB0_7:
	str	xzr, [x19, #16]
	ldr	w8, [x19, #8]
	str	x8, [sp]
Lloh6:
	adrp	x0, l_.str.2@PAGE
Lloh7:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_gvt_dbg_core
Lloh8:
	adrp	x0, l_.str@PAGE
Lloh9:
	add	x0, x0, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #96
	b	_gvt_dbg_core
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_ALL_ENGINES,8,3                ; @ALL_ENGINES
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"------------------------------------------\n"

l_.str.1:                               ; @.str.1
	.asciz	"resseting vgpu%d, dmlr %d, engine_mask %08x\n"

l_.str.2:                               ; @.str.2
	.asciz	"reset vgpu%d done\n"

.subsections_via_symbols
