	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_populate_mclk_value
_si_populate_mclk_value:                ## @si_populate_mclk_value
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$136, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, -100(%rbp)                ## 4-byte Spill
	movl	%r8d, %ebx
	movq	%rcx, -128(%rbp)                ## 8-byte Spill
	movl	%edx, %r13d
	movq	%rdi, %r14
	callq	_rv770_get_pi
	movq	%rax, -120(%rbp)                ## 8-byte Spill
	movq	%r14, %rdi
	callq	_si_get_pi
	movl	(%rax), %ecx
	movl	%ecx, -108(%rbp)                ## 4-byte Spill
	movl	4(%rax), %ecx
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	movl	8(%rax), %ecx
	movl	%ecx, -60(%rbp)                 ## 4-byte Spill
	movl	12(%rax), %ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movl	16(%rax), %ecx
	movl	%ecx, -56(%rbp)                 ## 4-byte Spill
	movl	20(%rax), %ecx
	movl	%ecx, -88(%rbp)                 ## 4-byte Spill
	movl	24(%rax), %ecx
	movl	%ecx, -104(%rbp)                ## 4-byte Spill
	movl	28(%rax), %r15d
	movl	32(%rax), %r12d
	leaq	-168(%rbp), %rcx
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	%ebx, %edx
	callq	_amdgpu_atombios_get_memory_pll_dividers
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_13
## %bb.1:
	movl	%r13d, -72(%rbp)                ## 4-byte Spill
	movl	%r15d, -76(%rbp)                ## 4-byte Spill
	movl	%ebx, -68(%rbp)                 ## 4-byte Spill
	movl	%r12d, -80(%rbp)                ## 4-byte Spill
	movq	_BWCTRL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movl	%eax, -96(%rbp)                 ## 4-byte Spill
	movl	-144(%rbp), %edi
	callq	_BWCTRL
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	movq	_CLKF_MASK@GOTPCREL(%rip), %rax
	movq	_CLKFRAC_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r12d
	orl	(%rax), %r12d
	movq	_VCO_MODE_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	notl	%r12d
	movl	-148(%rbp), %edi
	callq	_CLKF
	movl	%eax, %r15d
	movl	-152(%rbp), %edi
	callq	_CLKFRAC
	movl	%eax, %ebx
	movl	-156(%rbp), %edi
	callq	_VCO_MODE
	movl	%eax, -92(%rbp)                 ## 4-byte Spill
	orl	%r15d, %ebx
	movl	%ebx, -84(%rbp)                 ## 4-byte Spill
	movq	_YCLK_POST_DIV_MASK@GOTPCREL(%rip), %rbx
	movl	(%rbx), %r13d
	notl	%r13d
	movl	-164(%rbp), %edi
	callq	_YCLK_POST_DIV
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	(%r14), %rax
	movq	_AMDGPU_VRAM_TYPE_GDDR5@GOTPCREL(%rip), %r9
	cmpq	(%r9), %rax
	movq	%r14, %r8
	jne	LBB0_2
## %bb.3:
	movq	_YCLK_SEL_MASK@GOTPCREL(%rip), %rax
	movl	(%rbx), %ecx
	orl	(%rax), %ecx
	notl	%ecx
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	andl	%ecx, %ebx
	movl	-160(%rbp), %edi
	movq	%r8, %r14
	movq	%r9, %r15
	callq	_YCLK_SEL
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	-164(%rbp), %edi
	callq	_YCLK_POST_DIV
	movq	%r15, %r9
	movq	%r14, %r8
	orl	-44(%rbp), %eax                 ## 4-byte Folded Reload
	orl	%eax, %ebx
	movl	%ebx, %eax
	movq	-128(%rbp), %r15                ## 8-byte Reload
	jmp	LBB0_4
LBB0_2:
	movq	-128(%rbp), %r15                ## 8-byte Reload
	movl	-44(%rbp), %eax                 ## 4-byte Reload
LBB0_4:
	movl	-88(%rbp), %r14d                ## 4-byte Reload
	movl	-52(%rbp), %ecx                 ## 4-byte Reload
	movl	-60(%rbp), %edx                 ## 4-byte Reload
	movl	-56(%rbp), %esi                 ## 4-byte Reload
	movq	-120(%rbp), %rbx                ## 8-byte Reload
	andl	-96(%rbp), %esi                 ## 4-byte Folded Reload
	andl	%r12d, %r14d
	movl	-84(%rbp), %edi                 ## 4-byte Reload
	orl	-92(%rbp), %edi                 ## 4-byte Folded Reload
	andl	%r13d, %edx
	cmpq	$0, (%rbx)
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	je	LBB0_5
## %bb.6:
	movl	%edi, -84(%rbp)                 ## 4-byte Spill
	movl	%esi, -56(%rbp)                 ## 4-byte Spill
	movl	%edx, -60(%rbp)                 ## 4-byte Spill
	movq	(%r8), %rax
	cmpq	(%r9), %rax
	sete	%cl
	incb	%cl
	movl	-72(%rbp), %ebx                 ## 4-byte Reload
	shll	%cl, %ebx
	movl	8(%r8), %r12d
	movq	_ASIC_INTERNAL_MEMORY_SS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-136(%rbp), %rsi
	movq	%r8, %rdi
	movl	%ebx, %ecx
	callq	_amdgpu_atombios_get_asic_ss_info
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:
	movl	%ebx, %eax
	cltd
	idivl	%r12d
	movl	%eax, %ecx
	imull	%eax, %ecx
	leal	(%r12,%r12,4), %eax
	movl	-136(%rbp), %esi
	cltd
	idivl	%esi
	movl	%r14d, %r13d
	movl	%eax, %r14d
	imull	-132(%rbp), %esi
	imull	$131, %esi, %eax
	cltq
	imulq	$1374389535, %rax, %rax         ## imm = 0x51EB851F
	movq	%rax, %rdx
	shrq	$63, %rdx
	sarq	$37, %rax
	addl	%edx, %eax
	imull	%ecx, %eax
                                        ## kill: def $eax killed $eax killed $rax
	cltd
	idivl	%ebx
	movq	_CLKV_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	movl	-76(%rbp), %ebx                 ## 4-byte Reload
	andl	%ecx, %ebx
	movl	%eax, %edi
	callq	_CLKV
	orl	%eax, %ebx
	movl	%ebx, -76(%rbp)                 ## 4-byte Spill
	movq	_CLKS_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movl	-80(%rbp), %ebx                 ## 4-byte Reload
	andl	%eax, %ebx
	movl	%r14d, %edi
	movl	%r13d, %r14d
	callq	_CLKS
	orl	%eax, %ebx
	movl	%ebx, -80(%rbp)                 ## 4-byte Spill
LBB0_8:
	movl	-68(%rbp), %ebx                 ## 4-byte Reload
	movl	-64(%rbp), %r12d                ## 4-byte Reload
	movl	-52(%rbp), %ecx                 ## 4-byte Reload
	movl	-48(%rbp), %eax                 ## 4-byte Reload
	movl	-60(%rbp), %edx                 ## 4-byte Reload
	movl	-56(%rbp), %esi                 ## 4-byte Reload
	movl	-84(%rbp), %edi                 ## 4-byte Reload
	jmp	LBB0_9
LBB0_5:
	movl	-68(%rbp), %ebx                 ## 4-byte Reload
	movl	-64(%rbp), %r12d                ## 4-byte Reload
	movl	-48(%rbp), %eax                 ## 4-byte Reload
LBB0_9:
	orl	%esi, %r12d
	orl	%edi, %r14d
	movl	%r14d, %r13d
	orl	%edx, %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_DLL_SPEED_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %ecx
	movl	-168(%rbp), %edi
	movl	%ecx, %r14d
	callq	_DLL_SPEED
	orl	%r14d, %eax
	movq	_MRDCK0_PDNB@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	movq	_MRDCK1_PDNB@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	cmpl	$0, -100(%rbp)                  ## 4-byte Folded Reload
	je	LBB0_11
## %bb.10:
	orl	%eax, %r14d
	orl	%ecx, %r14d
	jmp	LBB0_12
LBB0_11:
	orl	%r14d, %ecx
	notl	%ecx
	andl	%ecx, %eax
	movl	%eax, %r14d
LBB0_12:
	movl	-72(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_be32
	movq	%rax, 72(%r15)
	movl	%r12d, %edi
	callq	_cpu_to_be32
	movq	%rax, 64(%r15)
	movl	%r13d, %edi
	callq	_cpu_to_be32
	movq	%rax, 56(%r15)
	movl	-104(%rbp), %edi                ## 4-byte Reload
	callq	_cpu_to_be32
	movq	%rax, 48(%r15)
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_be32
	movq	%rax, 40(%r15)
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_be32
	movq	%rax, 32(%r15)
	movl	%r14d, %edi
	callq	_cpu_to_be32
	movq	%rax, 24(%r15)
	movl	-108(%rbp), %edi                ## 4-byte Reload
	callq	_cpu_to_be32
	movq	%rax, 16(%r15)
	movl	-76(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_be32
	movq	%rax, 8(%r15)
	movl	-80(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_be32
	movq	%rax, (%r15)
LBB0_13:
	movl	%ebx, %eax
	addq	$136, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BWCTRL_MASK,4,2                ## @BWCTRL_MASK
	.comm	_CLKF_MASK,4,2                  ## @CLKF_MASK
	.comm	_CLKFRAC_MASK,4,2               ## @CLKFRAC_MASK
	.comm	_VCO_MODE_MASK,4,2              ## @VCO_MODE_MASK
	.comm	_YCLK_POST_DIV_MASK,4,2         ## @YCLK_POST_DIV_MASK
	.comm	_AMDGPU_VRAM_TYPE_GDDR5,8,3     ## @AMDGPU_VRAM_TYPE_GDDR5
	.comm	_YCLK_SEL_MASK,4,2              ## @YCLK_SEL_MASK
	.comm	_ASIC_INTERNAL_MEMORY_SS,4,2    ## @ASIC_INTERNAL_MEMORY_SS
	.comm	_CLKV_MASK,4,2                  ## @CLKV_MASK
	.comm	_CLKS_MASK,4,2                  ## @CLKS_MASK
	.comm	_DLL_SPEED_MASK,4,2             ## @DLL_SPEED_MASK
	.comm	_MRDCK0_PDNB,4,2                ## @MRDCK0_PDNB
	.comm	_MRDCK1_PDNB,4,2                ## @MRDCK1_PDNB
	.no_dead_strip	_si_populate_mclk_value
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_populate_mclk_value
_si_populate_mclk_value:                ; @si_populate_mclk_value
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #208
	.cfi_def_cfa_offset 208
	stp	x28, x27, [sp, #112]            ; 16-byte Folded Spill
	stp	x26, x25, [sp, #128]            ; 16-byte Folded Spill
	stp	x24, x23, [sp, #144]            ; 16-byte Folded Spill
	stp	x22, x21, [sp, #160]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #176]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #192]            ; 16-byte Folded Spill
	add	x29, sp, #192
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	str	w5, [sp, #48]                   ; 4-byte Folded Spill
	mov	x20, x4
	str	x3, [sp, #64]                   ; 8-byte Folded Spill
	mov	x23, x2
	mov	x28, x0
	bl	_rv770_get_pi
	mov	x25, x0
	mov	x0, x28
	bl	_si_get_pi
	ldp	w22, w19, [x0]
	ldr	w9, [x0, #8]
	ldp	w8, w27, [x0, #12]
	stp	w9, w8, [sp, #56]               ; 8-byte Folded Spill
	ldp	w8, w26, [x0, #20]
	str	w8, [sp, #52]                   ; 4-byte Folded Spill
	ldp	w21, w24, [x0, #28]
	add	x3, sp, #80
	mov	x0, x28
	mov	x1, x23
	mov	x2, x20
	bl	_amdgpu_atombios_get_memory_pll_dividers
	mov	x20, x0
	cbnz	w0, LBB0_8
; %bb.1:
	str	x25, [sp, #8]                   ; 8-byte Folded Spill
	stp	w19, w23, [sp, #24]             ; 8-byte Folded Spill
	ldr	w19, [sp, #48]                  ; 4-byte Folded Reload
	stp	w26, w21, [sp, #32]             ; 8-byte Folded Spill
	stp	w24, w22, [sp, #40]             ; 8-byte Folded Spill
Lloh0:
	adrp	x8, _BWCTRL_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _BWCTRL_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	bic	w27, w27, w8
	ldr	w0, [sp, #104]
	bl	_BWCTRL
Lloh3:
	adrp	x8, _CLKF_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CLKF_MASK@GOTPAGEOFF]
	orr	w9, w0, w27
	str	w9, [sp, #20]                   ; 4-byte Folded Spill
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _CLKFRAC_MASK@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CLKFRAC_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh9:
	adrp	x9, _VCO_MODE_MASK@GOTPAGE
Lloh10:
	ldr	x9, [x9, _VCO_MODE_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [sp, #52]                   ; 4-byte Folded Reload
	bic	w22, w9, w8
	ldr	w0, [sp, #100]
	bl	_CLKF
	mov	x25, x0
	ldr	w0, [sp, #96]
	bl	_CLKFRAC
	mov	x27, x0
	ldr	w0, [sp, #92]
	bl	_VCO_MODE
	orr	w8, w22, w25
	orr	w8, w8, w27
	orr	w8, w8, w0
	str	w8, [sp, #52]                   ; 4-byte Folded Spill
Lloh12:
	adrp	x25, _YCLK_POST_DIV_MASK@GOTPAGE
Lloh13:
	ldr	x25, [x25, _YCLK_POST_DIV_MASK@GOTPAGEOFF]
	ldr	w8, [x25]
	ldr	w9, [sp, #56]                   ; 4-byte Folded Reload
	bic	w22, w9, w8
	ldr	w0, [sp, #84]
	bl	_YCLK_POST_DIV
	orr	w8, w0, w22
	str	w8, [sp, #56]                   ; 4-byte Folded Spill
	ldr	x8, [x28]
Lloh14:
	adrp	x23, _AMDGPU_VRAM_TYPE_GDDR5@GOTPAGE
Lloh15:
	ldr	x23, [x23, _AMDGPU_VRAM_TYPE_GDDR5@GOTPAGEOFF]
	ldr	x9, [x23]
	cmp	x8, x9
	ldr	w24, [sp, #60]                  ; 4-byte Folded Reload
	b.ne	LBB0_3
; %bb.2:
Lloh16:
	adrp	x8, _YCLK_SEL_MASK@GOTPAGE
Lloh17:
	ldr	x8, [x8, _YCLK_SEL_MASK@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	ldr	w9, [x25]
	orr	w8, w9, w8
	bic	w22, w24, w8
	ldr	w0, [sp, #88]
	bl	_YCLK_SEL
	mov	x24, x0
	ldr	w0, [sp, #84]
	bl	_YCLK_POST_DIV
	orr	w8, w22, w24
	orr	w24, w8, w0
LBB0_3:
	ldr	x8, [sp, #8]                    ; 8-byte Folded Reload
	ldr	x8, [x8]
	ldp	w27, w26, [sp, #28]             ; 8-byte Folded Reload
	cbz	x8, LBB0_6
; %bb.4:
	ldr	w25, [x28, #8]
	ldr	x8, [x28]
	ldr	x9, [x23]
	cmp	x8, x9
	mov	w8, #1
	cinc	w8, w8, eq
	lsl	w21, w27, w8
Lloh19:
	adrp	x8, _ASIC_INTERNAL_MEMORY_SS@GOTPAGE
Lloh20:
	ldr	x8, [x8, _ASIC_INTERNAL_MEMORY_SS@GOTPAGEOFF]
Lloh21:
	ldr	w2, [x8]
	add	x1, sp, #72
	mov	x0, x28
	mov	x3, x21
	bl	_amdgpu_atombios_get_asic_ss_info
	ldp	w22, w23, [sp, #36]             ; 8-byte Folded Reload
	cbz	x0, LBB0_7
; %bb.5:
	sdiv	w8, w21, w25
	mul	w8, w8, w8
	add	w9, w25, w25, lsl #2
	ldp	w10, w11, [sp, #72]
	sdiv	w25, w9, w10
	mul	w9, w10, w11
	mov	w10, #131
	mul	w9, w9, w10
	mov	w10, #34079
	movk	w10, #20971, lsl #16
	smull	x9, w9, w10
	lsr	x10, x9, #63
	asr	x9, x9, #37
	add	w9, w9, w10
	mul	w8, w8, w9
Lloh22:
	adrp	x9, _CLKV_MASK@GOTPAGE
Lloh23:
	ldr	x9, [x9, _CLKV_MASK@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	bic	w22, w22, w9
	sdiv	w0, w8, w21
	bl	_CLKV
	orr	w22, w22, w0
Lloh25:
	adrp	x8, _CLKS_MASK@GOTPAGE
Lloh26:
	ldr	x8, [x8, _CLKS_MASK@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	bic	w21, w23, w8
	mov	x0, x25
	bl	_CLKS
	orr	w23, w21, w0
	b	LBB0_7
LBB0_6:
	ldp	w22, w23, [sp, #36]             ; 8-byte Folded Reload
LBB0_7:
	ldr	x25, [sp, #64]                  ; 8-byte Folded Reload
	ldr	w9, [sp, #24]                   ; 4-byte Folded Reload
Lloh28:
	adrp	x8, _DLL_SPEED_MASK@GOTPAGE
Lloh29:
	ldr	x8, [x8, _DLL_SPEED_MASK@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	bic	w21, w9, w8
	ldr	w0, [sp, #80]
	bl	_DLL_SPEED
	orr	w8, w0, w21
Lloh31:
	adrp	x9, _MRDCK0_PDNB@GOTPAGE
Lloh32:
	ldr	x9, [x9, _MRDCK0_PDNB@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
Lloh34:
	adrp	x10, _MRDCK1_PDNB@GOTPAGE
Lloh35:
	ldr	x10, [x10, _MRDCK1_PDNB@GOTPAGEOFF]
Lloh36:
	ldr	w10, [x10]
	orr	w11, w10, w9
	bic	w11, w8, w11
	orr	w8, w9, w8
	orr	w8, w8, w10
	cmp	w19, #0
	csel	w21, w11, w8, eq
	mov	x0, x27
	bl	_cpu_to_be32
	str	x0, [x25, #72]
	ldr	w0, [sp, #20]                   ; 4-byte Folded Reload
	bl	_cpu_to_be32
	str	x0, [x25, #64]
	ldr	w0, [sp, #52]                   ; 4-byte Folded Reload
	bl	_cpu_to_be32
	str	x0, [x25, #56]
	mov	x0, x26
	bl	_cpu_to_be32
	str	x0, [x25, #48]
	ldr	w0, [sp, #56]                   ; 4-byte Folded Reload
	bl	_cpu_to_be32
	str	x0, [x25, #40]
	mov	x0, x24
	bl	_cpu_to_be32
	str	x0, [x25, #32]
	mov	x0, x21
	bl	_cpu_to_be32
	str	x0, [x25, #24]
	ldr	w0, [sp, #44]                   ; 4-byte Folded Reload
	bl	_cpu_to_be32
	str	x0, [x25, #16]
	mov	x0, x22
	bl	_cpu_to_be32
	str	x0, [x25, #8]
	mov	x0, x23
	bl	_cpu_to_be32
	str	x0, [x25]
LBB0_8:
	mov	x0, x20
	ldp	x29, x30, [sp, #192]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #176]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #160]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #144]            ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #128]            ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #112]            ; 16-byte Folded Reload
	add	sp, sp, #208
	ret
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.cfi_endproc
                                        ; -- End function
	.comm	_BWCTRL_MASK,4,2                ; @BWCTRL_MASK
	.comm	_CLKF_MASK,4,2                  ; @CLKF_MASK
	.comm	_CLKFRAC_MASK,4,2               ; @CLKFRAC_MASK
	.comm	_VCO_MODE_MASK,4,2              ; @VCO_MODE_MASK
	.comm	_YCLK_POST_DIV_MASK,4,2         ; @YCLK_POST_DIV_MASK
	.comm	_AMDGPU_VRAM_TYPE_GDDR5,8,3     ; @AMDGPU_VRAM_TYPE_GDDR5
	.comm	_YCLK_SEL_MASK,4,2              ; @YCLK_SEL_MASK
	.comm	_ASIC_INTERNAL_MEMORY_SS,4,2    ; @ASIC_INTERNAL_MEMORY_SS
	.comm	_CLKV_MASK,4,2                  ; @CLKV_MASK
	.comm	_CLKS_MASK,4,2                  ; @CLKS_MASK
	.comm	_DLL_SPEED_MASK,4,2             ; @DLL_SPEED_MASK
	.comm	_MRDCK0_PDNB,4,2                ; @MRDCK0_PDNB
	.comm	_MRDCK1_PDNB,4,2                ; @MRDCK1_PDNB
	.no_dead_strip	_si_populate_mclk_value
.subsections_via_symbols
