	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amd64_inject_write_store
_amd64_inject_write_store:              ## @amd64_inject_write_store
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r14
	movq	%rdx, %rbx
	callq	_to_mci
	movq	(%rax), %r13
	leaq	-64(%rbp), %rdx
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_kstrtoul
	testl	%eax, %eax
	js	LBB0_1
## %bb.2:
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movq	_F10_NB_ARRAY_DRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	4(%r13), %edi
	callq	_SET_NB_ARRAY_ADDR
	movl	%eax, %r12d
	orl	%ebx, %r12d
	movl	(%r13), %edi
	movq	_F10_NB_ARRAY_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r12d, %edx
	callq	_amd64_write_pci_cfg
	movl	4(%r13), %edi
	callq	_SET_NB_DRAM_INJECTION_WRITE
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rdi
	callq	_pr_notice_once
	movq	_disable_caches@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	movl	$1, %edx
	callq	_on_each_cpu
	movl	(%r13), %edi
	movq	_F10_NB_ARRAY_DATA@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movl	%ebx, -48(%rbp)                 ## 4-byte Spill
	movl	%ebx, %edx
	callq	_amd64_write_pci_cfg
	movl	(%r13), %edi
	movl	(%r14), %esi
	leaq	-44(%rbp), %rdx
	callq	_amd64_read_pci_cfg
	movq	_F10_NB_ARR_ECC_WR_REQ@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	testl	%eax, -44(%rbp)
	je	LBB0_5
## %bb.3:
	leaq	-44(%rbp), %rbx
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	xorl	%eax, %eax
	callq	_cpu_relax
	movl	(%r13), %edi
	movl	(%r14), %esi
	movq	%rbx, %rdx
	callq	_amd64_read_pci_cfg
	movl	(%r15), %eax
	testl	%eax, -44(%rbp)
	jne	LBB0_4
LBB0_5:
	movq	_enable_caches@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	movl	$1, %edx
	callq	_on_each_cpu
	leaq	L_.str.1(%rip), %rsi
	xorl	%edi, %edi
	movl	%r12d, %edx
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	callq	_edac_dbg
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	jmp	LBB0_6
LBB0_1:
                                        ## kill: def $eax killed $eax def $rax
LBB0_6:
                                        ## kill: def $eax killed $eax killed $rax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_F10_NB_ARRAY_DRAM,4,2          ## @F10_NB_ARRAY_DRAM
	.comm	_F10_NB_ARRAY_ADDR,4,2          ## @F10_NB_ARRAY_ADDR
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Don't forget to decrease MCE polling interval in\n/sys/bus/machinecheck/devices/machinecheck<CPUNUM>/check_interval\nso that you can get the error report faster.\n"

	.comm	_disable_caches,4,2             ## @disable_caches
	.comm	_F10_NB_ARRAY_DATA,4,2          ## @F10_NB_ARRAY_DATA
	.comm	_F10_NB_ARR_ECC_WR_REQ,4,2      ## @F10_NB_ARR_ECC_WR_REQ
	.comm	_enable_caches,4,2              ## @enable_caches
L_.str.1:                               ## @.str.1
	.asciz	"section=0x%x word_bits=0x%x\n"

	.no_dead_strip	_amd64_inject_write_store
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amd64_inject_write_store
_amd64_inject_write_store:              ; @amd64_inject_write_store
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x3
	mov	x20, x2
	bl	_to_mci
	ldr	x22, [x0]
	mov	x2, sp
	mov	x0, x20
	mov	w1, #10
	bl	_kstrtoul
	tbnz	w0, #31, LBB0_5
; %bb.1:
Lloh0:
	adrp	x8, _F10_NB_ARRAY_DRAM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _F10_NB_ARRAY_DRAM@GOTPAGEOFF]
Lloh2:
	ldr	w20, [x8]
	ldr	w0, [x22, #4]
	bl	_SET_NB_ARRAY_ADDR
	orr	w20, w0, w20
	ldr	w0, [x22]
Lloh3:
	adrp	x8, _F10_NB_ARRAY_ADDR@GOTPAGE
Lloh4:
	ldr	x8, [x8, _F10_NB_ARRAY_ADDR@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x2, x20
	bl	_amd64_write_pci_cfg
	ldr	w0, [x22, #4]
	bl	_SET_NB_DRAM_INJECTION_WRITE
	mov	x21, x0
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_notice_once
Lloh8:
	adrp	x8, _disable_caches@GOTPAGE
Lloh9:
	ldr	x8, [x8, _disable_caches@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	mov	x1, #0
	mov	w2, #1
	bl	_on_each_cpu
	ldr	w0, [x22]
Lloh11:
	adrp	x23, _F10_NB_ARRAY_DATA@GOTPAGE
Lloh12:
	ldr	x23, [x23, _F10_NB_ARRAY_DATA@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x2, x21
	bl	_amd64_write_pci_cfg
	ldr	w0, [x22]
	ldr	w1, [x23]
	add	x2, sp, #12
	bl	_amd64_read_pci_cfg
	ldr	w8, [sp, #12]
Lloh13:
	adrp	x24, _F10_NB_ARR_ECC_WR_REQ@GOTPAGE
Lloh14:
	ldr	x24, [x24, _F10_NB_ARR_ECC_WR_REQ@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w9, [x24]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	bl	_cpu_relax
	ldr	w0, [x22]
	ldr	w1, [x23]
	add	x2, sp, #12
	bl	_amd64_read_pci_cfg
	ldr	w8, [sp, #12]
	b	LBB0_2
LBB0_4:
Lloh15:
	adrp	x8, _enable_caches@GOTPAGE
Lloh16:
	ldr	x8, [x8, _enable_caches@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	mov	x1, #0
	mov	w2, #1
	bl	_on_each_cpu
Lloh18:
	adrp	x1, l_.str.1@PAGE
Lloh19:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	w0, #0
	mov	x2, x20
	mov	x3, x21
	bl	_edac_dbg
	b	LBB0_6
LBB0_5:
	mov	x19, x0
LBB0_6:
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_F10_NB_ARRAY_DRAM,4,2          ; @F10_NB_ARRAY_DRAM
	.comm	_F10_NB_ARRAY_ADDR,4,2          ; @F10_NB_ARRAY_ADDR
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Don't forget to decrease MCE polling interval in\n/sys/bus/machinecheck/devices/machinecheck<CPUNUM>/check_interval\nso that you can get the error report faster.\n"

	.comm	_disable_caches,4,2             ; @disable_caches
	.comm	_F10_NB_ARRAY_DATA,4,2          ; @F10_NB_ARRAY_DATA
	.comm	_F10_NB_ARR_ECC_WR_REQ,4,2      ; @F10_NB_ARR_ECC_WR_REQ
	.comm	_enable_caches,4,2              ; @enable_caches
l_.str.1:                               ; @.str.1
	.asciz	"section=0x%x word_bits=0x%x\n"

	.no_dead_strip	_amd64_inject_write_store
.subsections_via_symbols
