	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function edp_ctrl_link_enable
_edp_ctrl_link_enable:                  ## @edp_ctrl_link_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	testl	%esi, %esi
	je	LBB0_2
## %bb.1:
	movq	_EDP_CLK_MASK_LINK_CHAN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_edp_clk_enable
	movl	(%rbx), %edi
	movl	8(%rbx), %edx
	movl	$1, %esi
	callq	_msm_edp_phy_lane_power_ctrl
	movl	(%rbx), %edi
	callq	_msm_edp_phy_vm_pe_init
	xorl	%eax, %eax
	callq	_wmb
	movl	(%rbx), %edi
	callq	_msm_edp_phy_ready
	movq	%rbx, %rdi
	callq	_edp_config_ctrl
	movl	4(%rbx), %esi
	leaq	-16(%rbp), %rdx
	leaq	-12(%rbp), %rcx
	movq	%rbx, %rdi
	callq	_msm_edp_ctrl_pixel_clock_valid
	movl	-16(%rbp), %esi
	movl	-12(%rbp), %edx
	movq	%rbx, %rdi
	callq	_edp_sw_mvid_nvid
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_edp_mainlink_ctrl
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
LBB0_2:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_edp_mainlink_ctrl
	movl	(%rbx), %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_msm_edp_phy_lane_power_ctrl
	movq	_EDP_CLK_MASK_LINK_CHAN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_edp_clk_disable                ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_EDP_CLK_MASK_LINK_CHAN,4,2     ## @EDP_CLK_MASK_LINK_CHAN
	.no_dead_strip	_edp_ctrl_link_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function edp_ctrl_link_enable
_edp_ctrl_link_enable:                  ; @edp_ctrl_link_enable
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	cbz	w1, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _EDP_CLK_MASK_LINK_CHAN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EDP_CLK_MASK_LINK_CHAN@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_edp_clk_enable
	ldr	w0, [x19]
	ldr	w2, [x19, #8]
	mov	w1, #1
	bl	_msm_edp_phy_lane_power_ctrl
	ldr	w0, [x19]
	bl	_msm_edp_phy_vm_pe_init
	bl	_wmb
	ldr	w0, [x19]
	bl	_msm_edp_phy_ready
	mov	x0, x19
	bl	_edp_config_ctrl
	ldr	w1, [x19, #4]
	add	x2, sp, #12
	add	x3, sp, #8
	mov	x0, x19
	bl	_msm_edp_ctrl_pixel_clock_valid
	ldp	w2, w1, [sp, #8]
	mov	x0, x19
	bl	_edp_sw_mvid_nvid
	mov	x0, x19
	mov	w1, #1
	bl	_edp_mainlink_ctrl
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
LBB0_2:
	mov	x0, x19
	bl	_edp_mainlink_ctrl
	ldr	w0, [x19]
	mov	w1, #0
	mov	w2, #0
	bl	_msm_edp_phy_lane_power_ctrl
Lloh3:
	adrp	x8, _EDP_CLK_MASK_LINK_CHAN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EDP_CLK_MASK_LINK_CHAN@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	b	_edp_clk_disable
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_EDP_CLK_MASK_LINK_CHAN,4,2     ; @EDP_CLK_MASK_LINK_CHAN
	.no_dead_strip	_edp_ctrl_link_enable
.subsections_via_symbols
