	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function umc_v6_1_disable_umc_index_mode
_umc_v6_1_disable_umc_index_mode:       ## @umc_v6_1_disable_umc_index_mode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_RSMU@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_RSMU_UMC_INDEX_MODE_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	xorl	%esi, %esi
	xorl	%r8d, %r8d
	popq	%rbp
	jmp	_WREG32_FIELD15                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RSMU,4,2                       ## @RSMU
	.comm	_RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU,4,2 ## @RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU
	.comm	_RSMU_UMC_INDEX_MODE_EN,4,2     ## @RSMU_UMC_INDEX_MODE_EN
	.no_dead_strip	_umc_v6_1_disable_umc_index_mode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function umc_v6_1_disable_umc_index_mode
_umc_v6_1_disable_umc_index_mode:       ; @umc_v6_1_disable_umc_index_mode
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _RSMU@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RSMU@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
Lloh6:
	adrp	x8, _RSMU_UMC_INDEX_MODE_EN@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RSMU_UMC_INDEX_MODE_EN@GOTPAGEOFF]
Lloh8:
	ldr	w3, [x8]
	mov	w1, #0
	mov	w4, #0
	b	_WREG32_FIELD15
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RSMU,4,2                       ; @RSMU
	.comm	_RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU,4,2 ; @RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU
	.comm	_RSMU_UMC_INDEX_MODE_EN,4,2     ; @RSMU_UMC_INDEX_MODE_EN
	.no_dead_strip	_umc_v6_1_disable_umc_index_mode
.subsections_via_symbols
