	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vmid_mgr_init           ## -- Begin function amdgpu_vmid_mgr_init
	.p2align	4, 0x90
_amdgpu_vmid_mgr_init:                  ## @amdgpu_vmid_mgr_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_AMDGPU_MAX_VMHUBS@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	je	LBB0_6
## %bb.1:
	xorl	%r12d, %r12d
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%r12
	movq	_AMDGPU_MAX_VMHUBS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpq	%rax, %r12
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	jae	LBB0_6
LBB0_2:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_4 Depth 2
	movq	(%rdi), %r14
	leaq	(%r12,%r12,2), %rbx
	leaq	(%r14,%rbx,8), %rdi
	addq	$20, %rdi
	callq	_mutex_init
	leaq	(%r14,%rbx,8), %r15
	addq	$4, %r15
	movq	%r15, %rdi
	callq	_INIT_LIST_HEAD
	leaq	(%r14,%rbx,8), %rdi
	addq	$16, %rdi
	xorl	%esi, %esi
	callq	_atomic_set
	cmpl	$2, (%r14,%rbx,8)
	jb	LBB0_5
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	leaq	(%r14,%rbx,8), %r13
	movl	$1, %ebx
	movl	$12, %r14d
	.p2align	4, 0x90
LBB0_4:                                 ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_amdgpu_vmid_reset
	movq	8(%r13), %rdi
	addq	%r14, %rdi
	callq	_amdgpu_sync_create
	movq	8(%r13), %rax
	leaq	(%rax,%r14), %rdi
	addq	$-4, %rdi
	movq	%r15, %rsi
	callq	_list_add_tail
	incq	%rbx
	movl	(%r13), %eax
	addq	$8, %r14
	cmpq	%rax, %rbx
	jb	LBB0_4
	jmp	LBB0_5
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_MAX_VMHUBS,4,2          ## @AMDGPU_MAX_VMHUBS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vmid_mgr_init           ; -- Begin function amdgpu_vmid_mgr_init
	.p2align	2
_amdgpu_vmid_mgr_init:                  ; @amdgpu_vmid_mgr_init
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
Lloh0:
	adrp	x23, _AMDGPU_MAX_VMHUBS@GOTPAGE
Lloh1:
	ldr	x23, [x23, _AMDGPU_MAX_VMHUBS@GOTPAGEOFF]
	ldr	w8, [x23]
	cbz	w8, LBB0_6
; %bb.1:
	mov	x19, x0
	mov	x20, #0
	mov	w24, #24
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x20, x20, #1
	ldr	w8, [x23]
	cmp	x20, x8
	b.hs	LBB0_6
LBB0_3:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	ldr	x22, [x19]
	madd	x25, x20, x24, x22
	add	x0, x25, #20
	bl	_mutex_init
	add	x21, x25, #4
	mov	x0, x21
	bl	_INIT_LIST_HEAD
	add	x0, x25, #16
	mov	w1, #0
	bl	_atomic_set
	ldr	w8, [x25]
	cmp	w8, #2
	b.lo	LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	madd	x8, x20, x24, x22
	add	x26, x8, #8
	mov	w27, #12
	mov	w22, #1
LBB0_5:                                 ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	mov	x0, x19
	mov	x1, x20
	mov	x2, x22
	bl	_amdgpu_vmid_reset
	ldr	x8, [x26]
	add	x0, x8, x27
	bl	_amdgpu_sync_create
	ldr	x8, [x26]
	add	x8, x8, x27
	sub	x0, x8, #4
	mov	x1, x21
	bl	_list_add_tail
	add	x22, x22, #1
	ldr	w8, [x25]
	add	x27, x27, #8
	cmp	x22, x8
	b.lo	LBB0_5
	b	LBB0_2
LBB0_6:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_MAX_VMHUBS,4,2          ; @AMDGPU_MAX_VMHUBS
.subsections_via_symbols
