	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function uvd_v5_0_ring_insert_nop
_uvd_v5_0_ring_insert_nop:              ## @uvd_v5_0_ring_insert_nop
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %r15
	movl	%esi, %eax
	andl	$1, %eax
	testb	$1, (%rdi)
	movl	$1, %edi
	cmovel	%eax, %edi
	callq	_WARN_ON
	cmpl	$2, %r14d
	jl	LBB0_3
## %bb.1:
	movl	%r14d, %ebx
	shrl	$31, %ebx
	addl	%r14d, %ebx
	sarl	%ebx
	movq	_mmUVD_NO_OP@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	decl	%ebx
	jne	LBB0_2
LBB0_3:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_mmUVD_NO_OP,4,2                ## @mmUVD_NO_OP
	.no_dead_strip	_uvd_v5_0_ring_insert_nop
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function uvd_v5_0_ring_insert_nop
_uvd_v5_0_ring_insert_nop:              ; @uvd_v5_0_ring_insert_nop
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	ldr	w8, [x0]
	and	w9, w1, #0x1
	tst	w8, #0x1
	csinc	w0, w9, wzr, eq
	bl	_WARN_ON
	cmp	w20, #0
	cinc	w8, w20, lt
	cmp	w20, #2
	b.lt	LBB0_3
; %bb.1:
	asr	w20, w8, #1
Lloh0:
	adrp	x21, _mmUVD_NO_OP@GOTPAGE
Lloh1:
	ldr	x21, [x21, _mmUVD_NO_OP@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	subs	w20, w20, #1
	b.ne	LBB0_2
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_mmUVD_NO_OP,4,2                ; @mmUVD_NO_OP
	.no_dead_strip	_uvd_v5_0_ring_insert_nop
.subsections_via_symbols
