	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hdlcd_crtc_mode_set_nofb
_hdlcd_crtc_mode_set_nofb:              ## @hdlcd_crtc_mode_set_nofb
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_crtc_to_hdlcd_priv
	movq	%rax, %r13
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movq	(%rbx), %rbx
	movq	_HDLCD_POLARITY_DATAEN@GOTPCREL(%rip), %rax
	movq	_HDLCD_POLARITY_DATA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movl	32(%rbx), %eax
	movq	_DRM_MODE_FLAG_PHSYNC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	je	LBB0_2
## %bb.1:
	movq	_HDLCD_POLARITY_HSYNC@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_2:
	orl	%ecx, %edx
	movl	(%rbx), %r14d
	movl	4(%rbx), %r15d
	movl	12(%rbx), %r12d
	movl	16(%rbx), %ecx
	movl	%ecx, -64(%rbp)                 ## 4-byte Spill
	movl	20(%rbx), %ecx
	movl	%ecx, -56(%rbp)                 ## 4-byte Spill
	movl	28(%rbx), %edi
	movq	_DRM_MODE_FLAG_PVSYNC@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	je	LBB0_4
## %bb.3:
	movq	_HDLCD_POLARITY_VSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_4:
	orl	%eax, %edx
	movl	%edx, -60(%rbp)                 ## 4-byte Spill
	movq	_HDLCD_BUS_MAX_OUTSTAND@GOTPCREL(%rip), %rax
	movq	_HDLCD_BUS_BURST_16@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_HDLCD_REG_BUS_OPTIONS@GOTPCREL(%rip), %rax
	movl	%r12d, -44(%rbp)                ## 4-byte Spill
	notl	%r12d
	addl	8(%rbx), %r12d
	movl	(%rax), %esi
	movl	%edi, %eax
	notl	%eax
	addl	24(%rbx), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	%edi, -52(%rbp)                 ## 4-byte Spill
	movq	%r13, %rdi
	callq	_hdlcd_write
	movq	_HDLCD_REG_V_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%rbx), %edx
	decl	%edx
	movq	%r13, %rdi
	callq	_hdlcd_write
	movq	_HDLCD_REG_V_BACK_PORCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r12d, %edx
	callq	_hdlcd_write
	movq	_HDLCD_REG_V_FRONT_PORCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	notl	%r15d
	addl	%r14d, %r15d
	movq	%r13, %rdi
	movl	%r15d, %edx
	callq	_hdlcd_write
	movq	_HDLCD_REG_V_SYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	notl	%r14d
	addl	-44(%rbp), %r14d                ## 4-byte Folded Reload
	movq	%r13, %rdi
	movl	%r14d, %edx
	movq	%rbx, %r14
	callq	_hdlcd_write
	movq	_HDLCD_REG_H_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	20(%rbx), %edx
	decl	%edx
	movq	%r13, %rdi
	callq	_hdlcd_write
	movq	_HDLCD_REG_H_BACK_PORCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	callq	_hdlcd_write
	movq	_HDLCD_REG_H_FRONT_PORCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	notl	%edx
	movl	-64(%rbp), %ebx                 ## 4-byte Reload
	addl	%ebx, %edx
	movq	%r13, %rdi
	callq	_hdlcd_write
	movq	_HDLCD_REG_H_SYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	notl	%ebx
	addl	-52(%rbp), %ebx                 ## 4-byte Folded Reload
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_hdlcd_write
	movq	_HDLCD_REG_POLARITIES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	-60(%rbp), %edx                 ## 4-byte Reload
	callq	_hdlcd_write
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	callq	_hdlcd_set_pxl_fmt
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	movl	(%r13), %edi
	imull	$1000, 36(%r14), %esi           ## imm = 0x3E8
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_clk_set_rate                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_HDLCD_POLARITY_DATAEN,4,2      ## @HDLCD_POLARITY_DATAEN
	.comm	_HDLCD_POLARITY_DATA,4,2        ## @HDLCD_POLARITY_DATA
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ## @DRM_MODE_FLAG_PHSYNC
	.comm	_HDLCD_POLARITY_HSYNC,4,2       ## @HDLCD_POLARITY_HSYNC
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ## @DRM_MODE_FLAG_PVSYNC
	.comm	_HDLCD_POLARITY_VSYNC,4,2       ## @HDLCD_POLARITY_VSYNC
	.comm	_HDLCD_REG_BUS_OPTIONS,4,2      ## @HDLCD_REG_BUS_OPTIONS
	.comm	_HDLCD_BUS_MAX_OUTSTAND,4,2     ## @HDLCD_BUS_MAX_OUTSTAND
	.comm	_HDLCD_BUS_BURST_16,4,2         ## @HDLCD_BUS_BURST_16
	.comm	_HDLCD_REG_V_DATA,4,2           ## @HDLCD_REG_V_DATA
	.comm	_HDLCD_REG_V_BACK_PORCH,4,2     ## @HDLCD_REG_V_BACK_PORCH
	.comm	_HDLCD_REG_V_FRONT_PORCH,4,2    ## @HDLCD_REG_V_FRONT_PORCH
	.comm	_HDLCD_REG_V_SYNC,4,2           ## @HDLCD_REG_V_SYNC
	.comm	_HDLCD_REG_H_DATA,4,2           ## @HDLCD_REG_H_DATA
	.comm	_HDLCD_REG_H_BACK_PORCH,4,2     ## @HDLCD_REG_H_BACK_PORCH
	.comm	_HDLCD_REG_H_FRONT_PORCH,4,2    ## @HDLCD_REG_H_FRONT_PORCH
	.comm	_HDLCD_REG_H_SYNC,4,2           ## @HDLCD_REG_H_SYNC
	.comm	_HDLCD_REG_POLARITIES,4,2       ## @HDLCD_REG_POLARITIES
	.no_dead_strip	_hdlcd_crtc_mode_set_nofb
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hdlcd_crtc_mode_set_nofb
_hdlcd_crtc_mode_set_nofb:              ; @hdlcd_crtc_mode_set_nofb
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x0
	bl	_crtc_to_hdlcd_priv
	mov	x19, x0
	ldr	x22, [x20]
	ldp	w27, w25, [x22]
	ldp	w21, w28, [x22, #8]
	ldp	w23, w8, [x22, #16]
	str	w8, [sp, #12]                   ; 4-byte Folded Spill
	ldp	w26, w24, [x22, #24]
Lloh0:
	adrp	x8, _HDLCD_POLARITY_DATAEN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _HDLCD_POLARITY_DATAEN@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _HDLCD_POLARITY_DATA@GOTPAGE
Lloh4:
	ldr	x9, [x9, _HDLCD_POLARITY_DATA@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [x22, #32]
Lloh6:
	adrp	x10, _DRM_MODE_FLAG_PHSYNC@GOTPAGE
Lloh7:
	ldr	x10, [x10, _DRM_MODE_FLAG_PHSYNC@GOTPAGEOFF]
Lloh8:
	adrp	x11, _HDLCD_POLARITY_HSYNC@GOTPAGE
Lloh9:
	ldr	x11, [x11, _HDLCD_POLARITY_HSYNC@GOTPAGEOFF]
Lloh10:
	ldr	w10, [x10]
Lloh11:
	ldr	w11, [x11]
	tst	w10, w9
	csel	w10, wzr, w11, eq
Lloh12:
	adrp	x11, _DRM_MODE_FLAG_PVSYNC@GOTPAGE
Lloh13:
	ldr	x11, [x11, _DRM_MODE_FLAG_PVSYNC@GOTPAGEOFF]
	orr	w8, w8, w10
Lloh14:
	ldr	w10, [x11]
Lloh15:
	adrp	x11, _HDLCD_POLARITY_VSYNC@GOTPAGE
Lloh16:
	ldr	x11, [x11, _HDLCD_POLARITY_VSYNC@GOTPAGEOFF]
Lloh17:
	ldr	w11, [x11]
	tst	w10, w9
	csel	w9, wzr, w11, eq
	orr	w8, w8, w9
	str	w8, [sp, #8]                    ; 4-byte Folded Spill
Lloh18:
	adrp	x8, _HDLCD_REG_BUS_OPTIONS@GOTPAGE
Lloh19:
	ldr	x8, [x8, _HDLCD_REG_BUS_OPTIONS@GOTPAGEOFF]
Lloh20:
	adrp	x9, _HDLCD_BUS_MAX_OUTSTAND@GOTPAGE
Lloh21:
	ldr	x9, [x9, _HDLCD_BUS_MAX_OUTSTAND@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
Lloh23:
	adrp	x10, _HDLCD_BUS_BURST_16@GOTPAGE
Lloh24:
	ldr	x10, [x10, _HDLCD_BUS_BURST_16@GOTPAGEOFF]
Lloh25:
	ldr	w10, [x10]
	orr	w2, w10, w9
Lloh26:
	ldr	w1, [x8]
	bl	_hdlcd_write
Lloh27:
	adrp	x8, _HDLCD_REG_V_DATA@GOTPAGE
Lloh28:
	ldr	x8, [x8, _HDLCD_REG_V_DATA@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
	ldr	w8, [x22, #4]
	sub	w2, w8, #1
	mov	x0, x19
	bl	_hdlcd_write
Lloh30:
	adrp	x8, _HDLCD_REG_V_BACK_PORCH@GOTPAGE
Lloh31:
	ldr	x8, [x8, _HDLCD_REG_V_BACK_PORCH@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	mvn	w8, w28
	add	w2, w21, w8
	mov	x0, x19
	bl	_hdlcd_write
Lloh33:
	adrp	x8, _HDLCD_REG_V_FRONT_PORCH@GOTPAGE
Lloh34:
	ldr	x8, [x8, _HDLCD_REG_V_FRONT_PORCH@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
	mvn	w8, w25
	add	w2, w27, w8
	mov	x0, x19
	bl	_hdlcd_write
Lloh36:
	adrp	x8, _HDLCD_REG_V_SYNC@GOTPAGE
Lloh37:
	ldr	x8, [x8, _HDLCD_REG_V_SYNC@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mvn	w8, w27
	add	w2, w28, w8
	mov	x0, x19
	bl	_hdlcd_write
Lloh39:
	adrp	x8, _HDLCD_REG_H_DATA@GOTPAGE
Lloh40:
	ldr	x8, [x8, _HDLCD_REG_H_DATA@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
	ldr	w8, [x22, #20]
	sub	w2, w8, #1
	mov	x0, x19
	bl	_hdlcd_write
Lloh42:
	adrp	x8, _HDLCD_REG_H_BACK_PORCH@GOTPAGE
Lloh43:
	ldr	x8, [x8, _HDLCD_REG_H_BACK_PORCH@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
	mvn	w8, w24
	add	w2, w26, w8
	mov	x0, x19
	bl	_hdlcd_write
Lloh45:
	adrp	x8, _HDLCD_REG_H_FRONT_PORCH@GOTPAGE
Lloh46:
	ldr	x8, [x8, _HDLCD_REG_H_FRONT_PORCH@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	ldr	w8, [sp, #12]                   ; 4-byte Folded Reload
	mvn	w8, w8
	add	w2, w23, w8
	mov	x0, x19
	bl	_hdlcd_write
Lloh48:
	adrp	x8, _HDLCD_REG_H_SYNC@GOTPAGE
Lloh49:
	ldr	x8, [x8, _HDLCD_REG_H_SYNC@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x8]
	mvn	w8, w23
	add	w2, w24, w8
	mov	x0, x19
	bl	_hdlcd_write
Lloh51:
	adrp	x8, _HDLCD_REG_POLARITIES@GOTPAGE
Lloh52:
	ldr	x8, [x8, _HDLCD_REG_POLARITIES@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	mov	x0, x19
	ldr	w2, [sp, #8]                    ; 4-byte Folded Reload
	bl	_hdlcd_write
	mov	x0, x20
	bl	_hdlcd_set_pxl_fmt
	cbz	w0, LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_2:
	ldr	w0, [x19]
	ldr	w8, [x22, #36]
	mov	w9, #1000
	mul	w1, w8, w9
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_clk_set_rate
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh26
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh10
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_HDLCD_POLARITY_DATAEN,4,2      ; @HDLCD_POLARITY_DATAEN
	.comm	_HDLCD_POLARITY_DATA,4,2        ; @HDLCD_POLARITY_DATA
	.comm	_DRM_MODE_FLAG_PHSYNC,4,2       ; @DRM_MODE_FLAG_PHSYNC
	.comm	_HDLCD_POLARITY_HSYNC,4,2       ; @HDLCD_POLARITY_HSYNC
	.comm	_DRM_MODE_FLAG_PVSYNC,4,2       ; @DRM_MODE_FLAG_PVSYNC
	.comm	_HDLCD_POLARITY_VSYNC,4,2       ; @HDLCD_POLARITY_VSYNC
	.comm	_HDLCD_REG_BUS_OPTIONS,4,2      ; @HDLCD_REG_BUS_OPTIONS
	.comm	_HDLCD_BUS_MAX_OUTSTAND,4,2     ; @HDLCD_BUS_MAX_OUTSTAND
	.comm	_HDLCD_BUS_BURST_16,4,2         ; @HDLCD_BUS_BURST_16
	.comm	_HDLCD_REG_V_DATA,4,2           ; @HDLCD_REG_V_DATA
	.comm	_HDLCD_REG_V_BACK_PORCH,4,2     ; @HDLCD_REG_V_BACK_PORCH
	.comm	_HDLCD_REG_V_FRONT_PORCH,4,2    ; @HDLCD_REG_V_FRONT_PORCH
	.comm	_HDLCD_REG_V_SYNC,4,2           ; @HDLCD_REG_V_SYNC
	.comm	_HDLCD_REG_H_DATA,4,2           ; @HDLCD_REG_H_DATA
	.comm	_HDLCD_REG_H_BACK_PORCH,4,2     ; @HDLCD_REG_H_BACK_PORCH
	.comm	_HDLCD_REG_H_FRONT_PORCH,4,2    ; @HDLCD_REG_H_FRONT_PORCH
	.comm	_HDLCD_REG_H_SYNC,4,2           ; @HDLCD_REG_H_SYNC
	.comm	_HDLCD_REG_POLARITIES,4,2       ; @HDLCD_REG_POLARITIES
	.no_dead_strip	_hdlcd_crtc_mode_set_nofb
.subsections_via_symbols
