	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function a4xx_pm_resume
_a4xx_pm_resume:                        ## @a4xx_pm_resume
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_to_adreno_gpu
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	_msm_gpu_pm_resume
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_4
## %bb.1:
	movq	%r15, %rdi
	callq	_adreno_is_a430
	xorl	%r14d, %r14d
	testq	%rax, %rax
	je	LBB0_4
## %bb.2:
	movq	_REG_A4XX_RBBM_POWER_CNTL_IP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$7831552, %edx                  ## imm = 0x778000
	callq	_gpu_write
	movq	_REG_A4XX_RBBM_POWER_STATUS@GOTPCREL(%rip), %r15
	movq	_A4XX_RBBM_POWER_CNTL_IP_SP_TP_PWR_ON@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movl	$5, %edi
	callq	_udelay
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_gpu_read
	testl	%eax, (%r12)
	je	LBB0_3
LBB0_4:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_A4XX_RBBM_POWER_CNTL_IP,4,2 ## @REG_A4XX_RBBM_POWER_CNTL_IP
	.comm	_REG_A4XX_RBBM_POWER_STATUS,4,2 ## @REG_A4XX_RBBM_POWER_STATUS
	.comm	_A4XX_RBBM_POWER_CNTL_IP_SP_TP_PWR_ON,4,2 ## @A4XX_RBBM_POWER_CNTL_IP_SP_TP_PWR_ON
	.no_dead_strip	_a4xx_pm_resume
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function a4xx_pm_resume
_a4xx_pm_resume:                        ; @a4xx_pm_resume
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_to_adreno_gpu
	mov	x20, x0
	mov	x0, x19
	bl	_msm_gpu_pm_resume
	cbnz	w0, LBB0_5
; %bb.1:
	mov	x0, x20
	bl	_adreno_is_a430
	cbz	x0, LBB0_5
; %bb.2:
Lloh0:
	adrp	x8, _REG_A4XX_RBBM_POWER_CNTL_IP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _REG_A4XX_RBBM_POWER_CNTL_IP@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #32768
	movk	w2, #119, lsl #16
	bl	_gpu_write
Lloh3:
	adrp	x20, _REG_A4XX_RBBM_POWER_STATUS@GOTPAGE
Lloh4:
	ldr	x20, [x20, _REG_A4XX_RBBM_POWER_STATUS@GOTPAGEOFF]
Lloh5:
	adrp	x21, _A4XX_RBBM_POWER_CNTL_IP_SP_TP_PWR_ON@GOTPAGE
Lloh6:
	ldr	x21, [x21, _A4XX_RBBM_POWER_CNTL_IP_SP_TP_PWR_ON@GOTPAGEOFF]
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	mov	w0, #5
	bl	_udelay
	ldr	w1, [x20]
	mov	x0, x19
	bl	_gpu_read
	ldr	w8, [x21]
	tst	w8, w0
	b.eq	LBB0_3
; %bb.4:
	mov	w0, #0
LBB0_5:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_A4XX_RBBM_POWER_CNTL_IP,4,2 ; @REG_A4XX_RBBM_POWER_CNTL_IP
	.comm	_REG_A4XX_RBBM_POWER_STATUS,4,2 ; @REG_A4XX_RBBM_POWER_STATUS
	.comm	_A4XX_RBBM_POWER_CNTL_IP_SP_TP_PWR_ON,4,2 ; @A4XX_RBBM_POWER_CNTL_IP_SP_TP_PWR_ON
	.no_dead_strip	_a4xx_pm_resume
.subsections_via_symbols
