	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_dp_pre_emphasis_max      ## -- Begin function intel_dp_pre_emphasis_max
	.p2align	4, 0x90
_intel_dp_pre_emphasis_max:             ## @intel_dp_pre_emphasis_max
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	callq	_dp_to_i915
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	_dp_to_dig_port
	movq	%rax, %rbx
	movl	(%rax), %r12d
	movq	%r15, %rdi
	callq	_HAS_DDI
	testq	%rax, %rax
	je	LBB0_1
## %bb.17:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_ddi_dp_pre_emphasis_max  ## TAILCALL
LBB0_1:
	movq	%r15, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	jne	LBB0_3
## %bb.2:
	movq	%r15, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_7
LBB0_3:
	movq	_DP_TRAIN_VOLTAGE_SWING_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %r14d
	cmpl	$129, %r14d
	je	LBB0_15
## %bb.4:
	cmpl	$130, %r14d
	je	LBB0_14
## %bb.5:
	cmpl	$131, %r14d
	jne	LBB0_11
## %bb.6:
	movq	_DP_TRAIN_PRE_EMPH_LEVEL_3@GOTPCREL(%rip), %rax
	jmp	LBB0_16
LBB0_7:
	movq	%r15, %rdi
	callq	_IS_IVYBRIDGE
	movq	_DP_TRAIN_VOLTAGE_SWING_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %r14d
	testq	%rax, %rax
	je	LBB0_12
## %bb.8:
	movq	_PORT_A@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r12d
	jne	LBB0_12
## %bb.9:
	leal	-129(%r14), %eax
	cmpl	$2, %eax
	jae	LBB0_10
	jmp	LBB0_15
LBB0_12:
	cmpl	$129, %r14d
	je	LBB0_15
## %bb.13:
	cmpl	$130, %r14d
	je	LBB0_14
LBB0_10:
	cmpl	$131, %r14d
	jne	LBB0_11
LBB0_14:
	movq	_DP_TRAIN_PRE_EMPH_LEVEL_2@GOTPCREL(%rip), %rax
	jmp	LBB0_16
LBB0_15:
	movq	_DP_TRAIN_PRE_EMPH_LEVEL_1@GOTPCREL(%rip), %rax
	jmp	LBB0_16
LBB0_11:
	movq	_DP_TRAIN_PRE_EMPH_LEVEL_0@GOTPCREL(%rip), %rax
LBB0_16:
	movl	(%rax), %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DP_TRAIN_VOLTAGE_SWING_MASK,4,2 ## @DP_TRAIN_VOLTAGE_SWING_MASK
	.comm	_DP_TRAIN_PRE_EMPH_LEVEL_3,4,2  ## @DP_TRAIN_PRE_EMPH_LEVEL_3
	.comm	_DP_TRAIN_PRE_EMPH_LEVEL_2,4,2  ## @DP_TRAIN_PRE_EMPH_LEVEL_2
	.comm	_DP_TRAIN_PRE_EMPH_LEVEL_1,4,2  ## @DP_TRAIN_PRE_EMPH_LEVEL_1
	.comm	_DP_TRAIN_PRE_EMPH_LEVEL_0,4,2  ## @DP_TRAIN_PRE_EMPH_LEVEL_0
	.comm	_PORT_A,4,2                     ## @PORT_A
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_dp_pre_emphasis_max      ; -- Begin function intel_dp_pre_emphasis_max
	.p2align	2
_intel_dp_pre_emphasis_max:             ; @intel_dp_pre_emphasis_max
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x21, x0
	bl	_dp_to_i915
	mov	x20, x0
	mov	x0, x21
	bl	_dp_to_dig_port
	mov	x21, x0
	ldr	w22, [x0]
	mov	x0, x20
	bl	_HAS_DDI
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x21
	mov	x1, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_intel_ddi_dp_pre_emphasis_max
LBB0_2:
	mov	x0, x20
	bl	_IS_VALLEYVIEW
	cbnz	x0, LBB0_4
; %bb.3:
	mov	x0, x20
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_8
LBB0_4:
Lloh0:
	adrp	x8, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	and	w8, w8, w19
	cmp	w8, #129
	b.eq	LBB0_15
; %bb.5:
	cmp	w8, #130
	b.eq	LBB0_14
; %bb.6:
	cmp	w8, #131
	b.ne	LBB0_16
; %bb.7:
Lloh3:
	adrp	x8, _DP_TRAIN_PRE_EMPH_LEVEL_3@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DP_TRAIN_PRE_EMPH_LEVEL_3@GOTPAGEOFF]
	b	LBB0_17
LBB0_8:
	mov	x0, x20
	bl	_IS_IVYBRIDGE
Lloh5:
	adrp	x8, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGE
Lloh6:
	ldr	x8, [x8, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	and	w8, w8, w19
	cbz	x0, LBB0_11
; %bb.9:
Lloh8:
	adrp	x9, _PORT_A@GOTPAGE
Lloh9:
	ldr	x9, [x9, _PORT_A@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	cmp	w22, w9
	b.ne	LBB0_11
; %bb.10:
	sub	w9, w8, #129
	cmp	w9, #2
	b.hs	LBB0_13
	b	LBB0_15
LBB0_11:
	cmp	w8, #129
	b.eq	LBB0_15
; %bb.12:
	cmp	w8, #130
	b.eq	LBB0_14
LBB0_13:
	cmp	w8, #131
	b.ne	LBB0_16
LBB0_14:
Lloh11:
	adrp	x8, _DP_TRAIN_PRE_EMPH_LEVEL_2@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DP_TRAIN_PRE_EMPH_LEVEL_2@GOTPAGEOFF]
	b	LBB0_17
LBB0_15:
Lloh13:
	adrp	x8, _DP_TRAIN_PRE_EMPH_LEVEL_1@GOTPAGE
Lloh14:
	ldr	x8, [x8, _DP_TRAIN_PRE_EMPH_LEVEL_1@GOTPAGEOFF]
	b	LBB0_17
LBB0_16:
Lloh15:
	adrp	x8, _DP_TRAIN_PRE_EMPH_LEVEL_0@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DP_TRAIN_PRE_EMPH_LEVEL_0@GOTPAGEOFF]
LBB0_17:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_DP_TRAIN_VOLTAGE_SWING_MASK,4,2 ; @DP_TRAIN_VOLTAGE_SWING_MASK
	.comm	_DP_TRAIN_PRE_EMPH_LEVEL_3,4,2  ; @DP_TRAIN_PRE_EMPH_LEVEL_3
	.comm	_DP_TRAIN_PRE_EMPH_LEVEL_2,4,2  ; @DP_TRAIN_PRE_EMPH_LEVEL_2
	.comm	_DP_TRAIN_PRE_EMPH_LEVEL_1,4,2  ; @DP_TRAIN_PRE_EMPH_LEVEL_1
	.comm	_DP_TRAIN_PRE_EMPH_LEVEL_0,4,2  ; @DP_TRAIN_PRE_EMPH_LEVEL_0
	.comm	_PORT_A,4,2                     ; @PORT_A
.subsections_via_symbols
