	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_dcn_find_dcfclk_suits_all      ## -- Begin function dcn_find_dcfclk_suits_all
	.p2align	4, 0x90
_dcn_find_dcfclk_suits_all:             ## @dcn_find_dcfclk_suits_all
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	_DM_PP_CLOCK_TYPE_DISPLAY_CLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	16(%rbx), %edx
	callq	_dcn_find_normalized_clock_vdd_Level
	movl	%eax, %r15d
	movq	_DM_PP_CLOCK_TYPE_DISPLAYPHYCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	12(%rbx), %edx
	movq	%r14, %rdi
	callq	_dcn_find_normalized_clock_vdd_Level
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_dcn_bw_max
	movl	%eax, %r15d
	movq	_DM_PP_CLOCK_TYPE_DPPCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	8(%rbx), %edx
	movq	%r14, %rdi
	callq	_dcn_find_normalized_clock_vdd_Level
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_dcn_bw_max
	movl	%eax, %r15d
	movq	_DM_PP_CLOCK_TYPE_MEMORY_CLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%rbx), %edx
	movq	%r14, %rdi
	callq	_dcn_find_normalized_clock_vdd_Level
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_dcn_bw_max
	movl	%eax, %r15d
	movq	_DM_PP_CLOCK_TYPE_DCFCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	movq	%r14, %rdi
	callq	_dcn_find_normalized_clock_vdd_Level
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_dcn_bw_max
	movq	_dcn_bw_v_max0p91@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_2
## %bb.1:
	xorl	%eax, %eax
	callq	_BREAK_TO_DEBUGGER
	movq	(%r14), %rcx
	jmp	LBB0_9
LBB0_2:
	movq	_dcn_bw_v_max0p9@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_4
## %bb.3:
	movq	(%r14), %rcx
	jmp	LBB0_9
LBB0_4:
	movq	_dcn_bw_v_nom0p8@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_6
## %bb.5:
	movq	(%r14), %rcx
	addq	$4, %rcx
	jmp	LBB0_9
LBB0_6:
	movq	_dcn_bw_v_mid0p72@GOTPCREL(%rip), %rdx
	movq	(%r14), %rcx
	cmpl	(%rdx), %eax
	jne	LBB0_8
## %bb.7:
	addq	$8, %rcx
	jmp	LBB0_9
LBB0_8:
	addq	$12, %rcx
LBB0_9:
	imull	$1000, (%rcx), %ebx             ## imm = 0x3E8
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %esi
	callq	_DC_LOG_BANDWIDTH_CALCS
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DM_PP_CLOCK_TYPE_DISPLAY_CLK,4,2 ## @DM_PP_CLOCK_TYPE_DISPLAY_CLK
	.comm	_DM_PP_CLOCK_TYPE_DISPLAYPHYCLK,4,2 ## @DM_PP_CLOCK_TYPE_DISPLAYPHYCLK
	.comm	_DM_PP_CLOCK_TYPE_DPPCLK,4,2    ## @DM_PP_CLOCK_TYPE_DPPCLK
	.comm	_DM_PP_CLOCK_TYPE_MEMORY_CLK,4,2 ## @DM_PP_CLOCK_TYPE_MEMORY_CLK
	.comm	_DM_PP_CLOCK_TYPE_DCFCLK,4,2    ## @DM_PP_CLOCK_TYPE_DCFCLK
	.comm	_dcn_bw_v_max0p91,4,2           ## @dcn_bw_v_max0p91
	.comm	_dcn_bw_v_max0p9,4,2            ## @dcn_bw_v_max0p9
	.comm	_dcn_bw_v_nom0p8,4,2            ## @dcn_bw_v_nom0p8
	.comm	_dcn_bw_v_mid0p72,4,2           ## @dcn_bw_v_mid0p72
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\tdcf_clk for voltage = %d\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_dcn_find_dcfclk_suits_all      ; -- Begin function dcn_find_dcfclk_suits_all
	.p2align	2
_dcn_find_dcfclk_suits_all:             ; @dcn_find_dcfclk_suits_all
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _DM_PP_CLOCK_TYPE_DISPLAY_CLK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DM_PP_CLOCK_TYPE_DISPLAY_CLK@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	ldr	w2, [x20, #16]
	bl	_dcn_find_normalized_clock_vdd_Level
	mov	x21, x0
Lloh3:
	adrp	x8, _DM_PP_CLOCK_TYPE_DISPLAYPHYCLK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DM_PP_CLOCK_TYPE_DISPLAYPHYCLK@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	w2, [x20, #12]
	mov	x0, x19
	bl	_dcn_find_normalized_clock_vdd_Level
	mov	x1, x0
	mov	x0, x21
	bl	_dcn_bw_max
	mov	x21, x0
Lloh6:
	adrp	x8, _DM_PP_CLOCK_TYPE_DPPCLK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DM_PP_CLOCK_TYPE_DPPCLK@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	ldr	w2, [x20, #8]
	mov	x0, x19
	bl	_dcn_find_normalized_clock_vdd_Level
	mov	x1, x0
	mov	x0, x21
	bl	_dcn_bw_max
	mov	x21, x0
Lloh9:
	adrp	x8, _DM_PP_CLOCK_TYPE_MEMORY_CLK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DM_PP_CLOCK_TYPE_MEMORY_CLK@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	w2, [x20, #4]
	mov	x0, x19
	bl	_dcn_find_normalized_clock_vdd_Level
	mov	x1, x0
	mov	x0, x21
	bl	_dcn_bw_max
	mov	x21, x0
Lloh12:
	adrp	x8, _DM_PP_CLOCK_TYPE_DCFCLK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _DM_PP_CLOCK_TYPE_DCFCLK@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_dcn_find_normalized_clock_vdd_Level
	mov	x1, x0
	mov	x0, x21
	bl	_dcn_bw_max
Lloh15:
	adrp	x8, _dcn_bw_v_max0p91@GOTPAGE
Lloh16:
	ldr	x8, [x8, _dcn_bw_v_max0p91@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	cmp	w0, w8
	b.ne	LBB0_2
; %bb.1:
	bl	_BREAK_TO_DEBUGGER
	ldr	x8, [x19]
	b	LBB0_9
LBB0_2:
Lloh18:
	adrp	x8, _dcn_bw_v_max0p9@GOTPAGE
Lloh19:
	ldr	x8, [x8, _dcn_bw_v_max0p9@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	cmp	w0, w8
	b.ne	LBB0_4
; %bb.3:
	ldr	x8, [x19]
	b	LBB0_9
LBB0_4:
Lloh21:
	adrp	x8, _dcn_bw_v_nom0p8@GOTPAGE
Lloh22:
	ldr	x8, [x8, _dcn_bw_v_nom0p8@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	cmp	w0, w8
	b.ne	LBB0_6
; %bb.5:
	ldr	x8, [x19]
	add	x8, x8, #4
	b	LBB0_9
LBB0_6:
Lloh24:
	adrp	x8, _dcn_bw_v_mid0p72@GOTPAGE
Lloh25:
	ldr	x8, [x8, _dcn_bw_v_mid0p72@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x8]
	ldr	x8, [x19]
	cmp	w0, w9
	b.ne	LBB0_8
; %bb.7:
	add	x8, x8, #8
	b	LBB0_9
LBB0_8:
	add	x8, x8, #12
LBB0_9:
	ldr	w8, [x8]
	mov	w9, #1000
	mul	w19, w8, w9
Lloh27:
	adrp	x0, l_.str@PAGE
Lloh28:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x19
	bl	_DC_LOG_BANDWIDTH_CALCS
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpAdd	Lloh27, Lloh28
	.cfi_endproc
                                        ; -- End function
	.comm	_DM_PP_CLOCK_TYPE_DISPLAY_CLK,4,2 ; @DM_PP_CLOCK_TYPE_DISPLAY_CLK
	.comm	_DM_PP_CLOCK_TYPE_DISPLAYPHYCLK,4,2 ; @DM_PP_CLOCK_TYPE_DISPLAYPHYCLK
	.comm	_DM_PP_CLOCK_TYPE_DPPCLK,4,2    ; @DM_PP_CLOCK_TYPE_DPPCLK
	.comm	_DM_PP_CLOCK_TYPE_MEMORY_CLK,4,2 ; @DM_PP_CLOCK_TYPE_MEMORY_CLK
	.comm	_DM_PP_CLOCK_TYPE_DCFCLK,4,2    ; @DM_PP_CLOCK_TYPE_DCFCLK
	.comm	_dcn_bw_v_max0p91,4,2           ; @dcn_bw_v_max0p91
	.comm	_dcn_bw_v_max0p9,4,2            ; @dcn_bw_v_max0p9
	.comm	_dcn_bw_v_nom0p8,4,2            ; @dcn_bw_v_nom0p8
	.comm	_dcn_bw_v_mid0p72,4,2           ; @dcn_bw_v_mid0p72
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\tdcf_clk for voltage = %d\n"

.subsections_via_symbols
