	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_atombios_get_memory_pll_dividers ## -- Begin function amdgpu_atombios_get_memory_pll_dividers
	.p2align	4, 0x90
_amdgpu_atombios_get_memory_pll_dividers: ## @amdgpu_atombios_get_memory_pll_dividers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r14
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movl	%esi, %r13d
	movq	%rdi, %r12
	movq	_COMMAND@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_ComputeMemoryClockParam@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_GetIndexIntoMasterTable
	movl	%eax, %ebx
	leaq	-136(%rbp), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	movl	$80, %edx
	callq	_memset
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$80, %edx
	callq	_memset
	movl	(%r12), %edi
	leaq	-52(%rbp), %rdx
	leaq	-48(%rbp), %rcx
	movl	%ebx, %esi
	callq	_amdgpu_atom_parse_cmd_header
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	cmpl	$2, -52(%rbp)
	jne	LBB0_7
## %bb.3:
	cmpl	$1, -48(%rbp)
	jne	LBB0_7
## %bb.4:
	movl	%r13d, %edi
	callq	_cpu_to_le32
	movl	%eax, -60(%rbp)
	movl	$0, -64(%rbp)
	cmpl	$0, -44(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_6
## %bb.5:
	movq	_MPLL_INPUT_FLAG_STROBE_MODE_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -64(%rbp)
LBB0_6:
	movl	(%r12), %edi
	leaq	-136(%rbp), %rdx
	movl	%ebx, %esi
	callq	_amdgpu_atom_execute_table
	movl	-88(%rbp), %edi
	callq	_le16_to_cpu
	movq	%rax, 64(%r14)
	movl	-92(%rbp), %edi
	callq	_le16_to_cpu
	movq	%rax, 56(%r14)
	movl	-100(%rbp), %eax
	movl	%eax, 40(%r14)
	movl	-108(%rbp), %eax
	movl	%eax, 32(%r14)
	movl	-116(%rbp), %eax
	movl	%eax, 24(%r14)
	movl	-132(%rbp), %eax
	movq	_MPLL_CNTL_FLAG_VCO_MODE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	movl	%ecx, (%r14)
	movq	_MPLL_CNTL_FLAG_BYPASS_DQ_PLL@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	setne	%dl
	movl	%edx, 8(%r14)
	movq	_MPLL_CNTL_FLAG_QDR_ENABLE@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	setne	%dl
	movl	%edx, 12(%r14)
	movq	_MPLL_CNTL_FLAG_AD_HALF_RATE@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	andl	(%rcx), %eax
	setne	%dl
	movl	%edx, 16(%r14)
	xorl	%r15d, %r15d
	jmp	LBB0_9
LBB0_7:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	jmp	LBB0_8
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_8:
	subl	(%rax), %r15d
LBB0_9:
	movl	%r15d, %eax
	addq	$104, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_COMMAND,4,2                    ## @COMMAND
	.comm	_ComputeMemoryClockParam,4,2    ## @ComputeMemoryClockParam
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_MPLL_INPUT_FLAG_STROBE_MODE_EN,4,2 ## @MPLL_INPUT_FLAG_STROBE_MODE_EN
	.comm	_MPLL_CNTL_FLAG_VCO_MODE_MASK,4,2 ## @MPLL_CNTL_FLAG_VCO_MODE_MASK
	.comm	_MPLL_CNTL_FLAG_BYPASS_DQ_PLL,4,2 ## @MPLL_CNTL_FLAG_BYPASS_DQ_PLL
	.comm	_MPLL_CNTL_FLAG_QDR_ENABLE,4,2  ## @MPLL_CNTL_FLAG_QDR_ENABLE
	.comm	_MPLL_CNTL_FLAG_AD_HALF_RATE,4,2 ## @MPLL_CNTL_FLAG_AD_HALF_RATE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_atombios_get_memory_pll_dividers ; -- Begin function amdgpu_atombios_get_memory_pll_dividers
	.p2align	2
_amdgpu_atombios_get_memory_pll_dividers: ; @amdgpu_atombios_get_memory_pll_dividers
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #160
	.cfi_def_cfa_offset 160
	stp	x24, x23, [sp, #96]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #112]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #128]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #144]            ; 16-byte Folded Spill
	add	x29, sp, #144
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x3
	mov	x22, x2
	mov	x23, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _COMMAND@GOTPAGE
Lloh1:
	ldr	x8, [x8, _COMMAND@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _ComputeMemoryClockParam@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ComputeMemoryClockParam@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_GetIndexIntoMasterTable
	mov	x21, x0
	add	x0, sp, #16
	mov	w1, #0
	mov	w2, #80
	bl	_memset
	mov	x0, x19
	mov	w1, #0
	mov	w2, #80
	bl	_memset
	ldr	w0, [x20]
	add	x2, sp, #12
	add	x3, sp, #8
	mov	x1, x21
	bl	_amdgpu_atom_parse_cmd_header
	cbz	w0, LBB0_6
; %bb.1:
	ldr	w8, [sp, #12]
	cmp	w8, #2
	b.ne	LBB0_6
; %bb.2:
	ldr	w8, [sp, #8]
	cmp	w8, #1
	b.ne	LBB0_6
; %bb.3:
	mov	x0, x23
	bl	_cpu_to_le32
	stp	wzr, w0, [sp, #88]
	cbz	w22, LBB0_5
; %bb.4:
Lloh6:
	adrp	x8, _MPLL_INPUT_FLAG_STROBE_MODE_EN@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MPLL_INPUT_FLAG_STROBE_MODE_EN@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	str	w8, [sp, #88]
LBB0_5:
	ldr	w0, [x20]
	add	x2, sp, #16
	mov	x1, x21
	bl	_amdgpu_atom_execute_table
	ldr	w0, [sp, #64]
	bl	_le16_to_cpu
	str	x0, [x19, #64]
	ldr	w0, [sp, #60]
	bl	_le16_to_cpu
	mov	x8, x0
	mov	w0, #0
	str	x8, [x19, #56]
	ldr	w8, [sp, #36]
	ldr	w9, [sp, #20]
Lloh9:
	adrp	x10, _MPLL_CNTL_FLAG_VCO_MODE_MASK@GOTPAGE
Lloh10:
	ldr	x10, [x10, _MPLL_CNTL_FLAG_VCO_MODE_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	and	w10, w10, w9
	str	w10, [x19]
Lloh12:
	adrp	x10, _MPLL_CNTL_FLAG_BYPASS_DQ_PLL@GOTPAGE
Lloh13:
	ldr	x10, [x10, _MPLL_CNTL_FLAG_BYPASS_DQ_PLL@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
	tst	w10, w9
	cset	w10, ne
Lloh15:
	adrp	x11, _MPLL_CNTL_FLAG_QDR_ENABLE@GOTPAGE
Lloh16:
	ldr	x11, [x11, _MPLL_CNTL_FLAG_QDR_ENABLE@GOTPAGEOFF]
Lloh17:
	ldr	w11, [x11]
	tst	w11, w9
Lloh18:
	adrp	x11, _MPLL_CNTL_FLAG_AD_HALF_RATE@GOTPAGE
Lloh19:
	ldr	x11, [x11, _MPLL_CNTL_FLAG_AD_HALF_RATE@GOTPAGEOFF]
	cset	w12, ne
Lloh20:
	ldr	w11, [x11]
	tst	w11, w9
	ldr	w9, [sp, #52]
	ldr	w11, [sp, #44]
	str	w9, [x19, #40]
	str	w11, [x19, #32]
	str	w8, [x19, #24]
	stp	w10, w12, [x19, #8]
	cset	w8, ne
	str	w8, [x19, #16]
	b	LBB0_7
LBB0_6:
Lloh21:
	adrp	x8, _EINVAL@GOTPAGE
Lloh22:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_7:
	ldp	x29, x30, [sp, #144]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #128]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #112]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #96]             ; 16-byte Folded Reload
	add	sp, sp, #160
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_COMMAND,4,2                    ; @COMMAND
	.comm	_ComputeMemoryClockParam,4,2    ; @ComputeMemoryClockParam
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_MPLL_INPUT_FLAG_STROBE_MODE_EN,4,2 ; @MPLL_INPUT_FLAG_STROBE_MODE_EN
	.comm	_MPLL_CNTL_FLAG_VCO_MODE_MASK,4,2 ; @MPLL_CNTL_FLAG_VCO_MODE_MASK
	.comm	_MPLL_CNTL_FLAG_BYPASS_DQ_PLL,4,2 ; @MPLL_CNTL_FLAG_BYPASS_DQ_PLL
	.comm	_MPLL_CNTL_FLAG_QDR_ENABLE,4,2  ; @MPLL_CNTL_FLAG_QDR_ENABLE
	.comm	_MPLL_CNTL_FLAG_AD_HALF_RATE,4,2 ; @MPLL_CNTL_FLAG_AD_HALF_RATE
.subsections_via_symbols
