	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_pps_get_registers
_intel_pps_get_registers:               ## @intel_pps_get_registers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %rbx
	callq	_dp_to_i915
	movq	%rax, %r14
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	$20, %edx
	callq	_memset
	movq	%r14, %rdi
	callq	_IS_GEN9_LP
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_bxt_power_sequencer_idx
	jmp	LBB0_6
LBB0_2:
	movq	%r14, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	jne	LBB0_5
## %bb.3:
	movq	%r14, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_4
LBB0_5:
	movq	%rbx, %rdi
	callq	_vlv_power_sequencer_pipe
LBB0_6:
	movl	%eax, %ebx
LBB0_7:
	movl	%ebx, %edi
	callq	_PP_CONTROL
	movl	%eax, 16(%r15)
	movl	%ebx, %edi
	callq	_PP_STATUS
	movl	%eax, 12(%r15)
	movl	%ebx, %edi
	callq	_PP_ON_DELAYS
	movl	%eax, 8(%r15)
	movl	%ebx, %edi
	callq	_PP_OFF_DELAYS
	movl	%eax, 4(%r15)
	movq	%r14, %rdi
	callq	_IS_GEN9_LP
	testq	%rax, %rax
	jne	LBB0_9
## %bb.8:
	movq	%r14, %rdi
	callq	_INTEL_PCH_TYPE
	movq	_PCH_CNP@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_9
## %bb.10:
	movl	%ebx, %edi
	callq	_PP_DIVISOR
	jmp	LBB0_11
LBB0_9:
	movq	_INVALID_MMIO_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_11:
	movl	%eax, (%r15)
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	xorl	%ebx, %ebx
	jmp	LBB0_7
	.cfi_endproc
                                        ## -- End function
	.comm	_PCH_CNP,8,3                    ## @PCH_CNP
	.comm	_INVALID_MMIO_REG,4,2           ## @INVALID_MMIO_REG
	.no_dead_strip	_intel_pps_get_registers
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_pps_get_registers
_intel_pps_get_registers:               ; @intel_pps_get_registers
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x21, x0
	bl	_dp_to_i915
	mov	x20, x0
	mov	x0, x19
	mov	w1, #0
	mov	w2, #20
	bl	_memset
	mov	x0, x20
	bl	_IS_GEN9_LP
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x21
	bl	_bxt_power_sequencer_idx
	b	LBB0_5
LBB0_2:
	mov	x0, x20
	bl	_IS_VALLEYVIEW
	cbnz	x0, LBB0_4
; %bb.3:
	mov	x0, x20
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_11
LBB0_4:
	mov	x0, x21
	bl	_vlv_power_sequencer_pipe
LBB0_5:
	mov	x21, x0
LBB0_6:
	mov	x0, x21
	bl	_PP_CONTROL
	str	w0, [x19, #16]
	mov	x0, x21
	bl	_PP_STATUS
	str	w0, [x19, #12]
	mov	x0, x21
	bl	_PP_ON_DELAYS
	str	w0, [x19, #8]
	mov	x0, x21
	bl	_PP_OFF_DELAYS
	str	w0, [x19, #4]
	mov	x0, x20
	bl	_IS_GEN9_LP
	cbnz	x0, LBB0_9
; %bb.7:
	mov	x0, x20
	bl	_INTEL_PCH_TYPE
Lloh0:
	adrp	x8, _PCH_CNP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCH_CNP@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ge	LBB0_9
; %bb.8:
	mov	x0, x21
	bl	_PP_DIVISOR
	b	LBB0_10
LBB0_9:
Lloh3:
	adrp	x8, _INVALID_MMIO_REG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _INVALID_MMIO_REG@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
LBB0_10:
	str	w0, [x19]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_11:
	mov	w21, #0
	b	LBB0_6
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_PCH_CNP,8,3                    ; @PCH_CNP
	.comm	_INVALID_MMIO_REG,4,2           ; @INVALID_MMIO_REG
	.no_dead_strip	_intel_pps_get_registers
.subsections_via_symbols
