	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function _setup_layer_ops
__setup_layer_ops:                      ## @_setup_layer_ops
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	%rsi, -16(%rbp)
	movq	_DPU_SSPP_SRC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-16(%rbp), %rsi
	callq	_test_bit
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_dpu_hw_sspp_setup_format@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%rbx)
	movq	_dpu_hw_sspp_setup_rects@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 44(%rbx)
	movq	_dpu_hw_sspp_setup_sourceaddress@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rbx)
	movq	_dpu_hw_sspp_setup_solidfill@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 36(%rbx)
	movq	_dpu_hw_sspp_setup_pe_config@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rbx)
LBB0_2:
	movq	_DPU_SSPP_QOS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-16(%rbp), %rsi
	callq	_test_bit
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	_dpu_hw_sspp_setup_danger_safe_lut@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%rbx)
	movq	_dpu_hw_sspp_setup_creq_lut@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rbx)
	movq	_dpu_hw_sspp_setup_qos_ctrl@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%rbx)
LBB0_4:
	movq	_DPU_SSPP_CSC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-16(%rbp), %rsi
	callq	_test_bit
	testq	%rax, %rax
	jne	LBB0_6
## %bb.5:
	movq	_DPU_SSPP_CSC_10BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-16(%rbp), %rsi
	callq	_test_bit
	testq	%rax, %rax
	je	LBB0_7
LBB0_6:
	movq	_dpu_hw_sspp_setup_csc@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rbx)
LBB0_7:
	movq	_DPU_SSPP_SMART_DMA_V1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	56(%rbx), %rsi
	callq	_test_bit
	testq	%rax, %rax
	jne	LBB0_9
## %bb.8:
	movq	_DPU_SSPP_SMART_DMA_V2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	56(%rbx), %rsi
	callq	_test_bit
	testq	%rax, %rax
	je	LBB0_10
LBB0_9:
	movq	_dpu_hw_sspp_setup_multirect@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%rbx)
LBB0_10:
	movq	_DPU_SSPP_SCALER_QSEED3@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-16(%rbp), %rsi
	callq	_test_bit
	testq	%rax, %rax
	je	LBB0_12
## %bb.11:
	movq	__dpu_hw_sspp_setup_scaler3@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rbx)
	movq	__dpu_hw_sspp_get_scaler3_ver@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 4(%rbx)
LBB0_12:
	movq	_DPU_SSPP_CDP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-16(%rbp), %rsi
	callq	_test_bit
	testq	%rax, %rax
	je	LBB0_14
## %bb.13:
	movq	_dpu_hw_sspp_setup_cdp@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%rbx)
LBB0_14:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DPU_SSPP_SRC,4,2               ## @DPU_SSPP_SRC
	.comm	_dpu_hw_sspp_setup_format,4,2   ## @dpu_hw_sspp_setup_format
	.comm	_dpu_hw_sspp_setup_rects,4,2    ## @dpu_hw_sspp_setup_rects
	.comm	_dpu_hw_sspp_setup_sourceaddress,4,2 ## @dpu_hw_sspp_setup_sourceaddress
	.comm	_dpu_hw_sspp_setup_solidfill,4,2 ## @dpu_hw_sspp_setup_solidfill
	.comm	_dpu_hw_sspp_setup_pe_config,4,2 ## @dpu_hw_sspp_setup_pe_config
	.comm	_DPU_SSPP_QOS,4,2               ## @DPU_SSPP_QOS
	.comm	_dpu_hw_sspp_setup_danger_safe_lut,4,2 ## @dpu_hw_sspp_setup_danger_safe_lut
	.comm	_dpu_hw_sspp_setup_creq_lut,4,2 ## @dpu_hw_sspp_setup_creq_lut
	.comm	_dpu_hw_sspp_setup_qos_ctrl,4,2 ## @dpu_hw_sspp_setup_qos_ctrl
	.comm	_DPU_SSPP_CSC,4,2               ## @DPU_SSPP_CSC
	.comm	_DPU_SSPP_CSC_10BIT,4,2         ## @DPU_SSPP_CSC_10BIT
	.comm	_dpu_hw_sspp_setup_csc,4,2      ## @dpu_hw_sspp_setup_csc
	.comm	_DPU_SSPP_SMART_DMA_V1,4,2      ## @DPU_SSPP_SMART_DMA_V1
	.comm	_DPU_SSPP_SMART_DMA_V2,4,2      ## @DPU_SSPP_SMART_DMA_V2
	.comm	_dpu_hw_sspp_setup_multirect,4,2 ## @dpu_hw_sspp_setup_multirect
	.comm	_DPU_SSPP_SCALER_QSEED3,4,2     ## @DPU_SSPP_SCALER_QSEED3
	.comm	__dpu_hw_sspp_setup_scaler3,4,2 ## @_dpu_hw_sspp_setup_scaler3
	.comm	__dpu_hw_sspp_get_scaler3_ver,4,2 ## @_dpu_hw_sspp_get_scaler3_ver
	.comm	_DPU_SSPP_CDP,4,2               ## @DPU_SSPP_CDP
	.comm	_dpu_hw_sspp_setup_cdp,4,2      ## @dpu_hw_sspp_setup_cdp
	.no_dead_strip	__setup_layer_ops
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function _setup_layer_ops
__setup_layer_ops:                      ; @_setup_layer_ops
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	str	x1, [sp, #8]
Lloh0:
	adrp	x8, _DPU_SSPP_SRC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DPU_SSPP_SRC@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	add	x1, sp, #8
	bl	_test_bit
	cbz	x0, LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _dpu_hw_sspp_setup_format@GOTPAGE
Lloh4:
	ldr	x8, [x8, _dpu_hw_sspp_setup_format@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	str	w8, [x19, #48]
Lloh6:
	adrp	x8, _dpu_hw_sspp_setup_rects@GOTPAGE
Lloh7:
	ldr	x8, [x8, _dpu_hw_sspp_setup_rects@GOTPAGEOFF]
Lloh8:
	adrp	x9, _dpu_hw_sspp_setup_sourceaddress@GOTPAGE
Lloh9:
	ldr	x9, [x9, _dpu_hw_sspp_setup_sourceaddress@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
Lloh11:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #40]
Lloh12:
	adrp	x8, _dpu_hw_sspp_setup_solidfill@GOTPAGE
Lloh13:
	ldr	x8, [x8, _dpu_hw_sspp_setup_solidfill@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
Lloh15:
	adrp	x9, _dpu_hw_sspp_setup_pe_config@GOTPAGE
Lloh16:
	ldr	x9, [x9, _dpu_hw_sspp_setup_pe_config@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #32]
LBB0_2:
Lloh18:
	adrp	x8, _DPU_SSPP_QOS@GOTPAGE
Lloh19:
	ldr	x8, [x8, _DPU_SSPP_QOS@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	add	x1, sp, #8
	bl	_test_bit
	cbz	x0, LBB0_4
; %bb.3:
Lloh21:
	adrp	x8, _dpu_hw_sspp_setup_danger_safe_lut@GOTPAGE
Lloh22:
	ldr	x8, [x8, _dpu_hw_sspp_setup_danger_safe_lut@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	str	w8, [x19, #28]
Lloh24:
	adrp	x8, _dpu_hw_sspp_setup_creq_lut@GOTPAGE
Lloh25:
	ldr	x8, [x8, _dpu_hw_sspp_setup_creq_lut@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
Lloh27:
	adrp	x9, _dpu_hw_sspp_setup_qos_ctrl@GOTPAGE
Lloh28:
	ldr	x9, [x9, _dpu_hw_sspp_setup_qos_ctrl@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #20]
LBB0_4:
Lloh30:
	adrp	x8, _DPU_SSPP_CSC@GOTPAGE
Lloh31:
	ldr	x8, [x8, _DPU_SSPP_CSC@GOTPAGEOFF]
Lloh32:
	ldr	w0, [x8]
	add	x1, sp, #8
	bl	_test_bit
	cbnz	x0, LBB0_6
; %bb.5:
Lloh33:
	adrp	x8, _DPU_SSPP_CSC_10BIT@GOTPAGE
Lloh34:
	ldr	x8, [x8, _DPU_SSPP_CSC_10BIT@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
	add	x1, sp, #8
	bl	_test_bit
	cbz	x0, LBB0_7
LBB0_6:
Lloh36:
	adrp	x8, _dpu_hw_sspp_setup_csc@GOTPAGE
Lloh37:
	ldr	x8, [x8, _dpu_hw_sspp_setup_csc@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	str	w8, [x19, #16]
LBB0_7:
Lloh39:
	adrp	x8, _DPU_SSPP_SMART_DMA_V1@GOTPAGE
Lloh40:
	ldr	x8, [x8, _DPU_SSPP_SMART_DMA_V1@GOTPAGEOFF]
Lloh41:
	ldr	w0, [x8]
	ldr	x1, [x19, #56]
	bl	_test_bit
	cbnz	x0, LBB0_9
; %bb.8:
Lloh42:
	adrp	x8, _DPU_SSPP_SMART_DMA_V2@GOTPAGE
Lloh43:
	ldr	x8, [x8, _DPU_SSPP_SMART_DMA_V2@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	ldr	x1, [x19, #56]
	bl	_test_bit
	cbz	x0, LBB0_10
LBB0_9:
Lloh45:
	adrp	x8, _dpu_hw_sspp_setup_multirect@GOTPAGE
Lloh46:
	ldr	x8, [x8, _dpu_hw_sspp_setup_multirect@GOTPAGEOFF]
Lloh47:
	ldr	w8, [x8]
	str	w8, [x19, #12]
LBB0_10:
Lloh48:
	adrp	x8, _DPU_SSPP_SCALER_QSEED3@GOTPAGE
Lloh49:
	ldr	x8, [x8, _DPU_SSPP_SCALER_QSEED3@GOTPAGEOFF]
Lloh50:
	ldr	w0, [x8]
	add	x1, sp, #8
	bl	_test_bit
	cbz	x0, LBB0_12
; %bb.11:
Lloh51:
	adrp	x8, __dpu_hw_sspp_setup_scaler3@GOTPAGE
Lloh52:
	ldr	x8, [x8, __dpu_hw_sspp_setup_scaler3@GOTPAGEOFF]
Lloh53:
	ldr	w8, [x8]
Lloh54:
	adrp	x9, __dpu_hw_sspp_get_scaler3_ver@GOTPAGE
Lloh55:
	ldr	x9, [x9, __dpu_hw_sspp_get_scaler3_ver@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #4]
LBB0_12:
Lloh57:
	adrp	x8, _DPU_SSPP_CDP@GOTPAGE
Lloh58:
	ldr	x8, [x8, _DPU_SSPP_CDP@GOTPAGEOFF]
Lloh59:
	ldr	w0, [x8]
	add	x1, sp, #8
	bl	_test_bit
	cbz	x0, LBB0_14
; %bb.13:
Lloh60:
	adrp	x8, _dpu_hw_sspp_setup_cdp@GOTPAGE
Lloh61:
	ldr	x8, [x8, _dpu_hw_sspp_setup_cdp@GOTPAGEOFF]
Lloh62:
	ldr	w8, [x8]
	str	w8, [x19]
LBB0_14:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh10
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.cfi_endproc
                                        ; -- End function
	.comm	_DPU_SSPP_SRC,4,2               ; @DPU_SSPP_SRC
	.comm	_dpu_hw_sspp_setup_format,4,2   ; @dpu_hw_sspp_setup_format
	.comm	_dpu_hw_sspp_setup_rects,4,2    ; @dpu_hw_sspp_setup_rects
	.comm	_dpu_hw_sspp_setup_sourceaddress,4,2 ; @dpu_hw_sspp_setup_sourceaddress
	.comm	_dpu_hw_sspp_setup_solidfill,4,2 ; @dpu_hw_sspp_setup_solidfill
	.comm	_dpu_hw_sspp_setup_pe_config,4,2 ; @dpu_hw_sspp_setup_pe_config
	.comm	_DPU_SSPP_QOS,4,2               ; @DPU_SSPP_QOS
	.comm	_dpu_hw_sspp_setup_danger_safe_lut,4,2 ; @dpu_hw_sspp_setup_danger_safe_lut
	.comm	_dpu_hw_sspp_setup_creq_lut,4,2 ; @dpu_hw_sspp_setup_creq_lut
	.comm	_dpu_hw_sspp_setup_qos_ctrl,4,2 ; @dpu_hw_sspp_setup_qos_ctrl
	.comm	_DPU_SSPP_CSC,4,2               ; @DPU_SSPP_CSC
	.comm	_DPU_SSPP_CSC_10BIT,4,2         ; @DPU_SSPP_CSC_10BIT
	.comm	_dpu_hw_sspp_setup_csc,4,2      ; @dpu_hw_sspp_setup_csc
	.comm	_DPU_SSPP_SMART_DMA_V1,4,2      ; @DPU_SSPP_SMART_DMA_V1
	.comm	_DPU_SSPP_SMART_DMA_V2,4,2      ; @DPU_SSPP_SMART_DMA_V2
	.comm	_dpu_hw_sspp_setup_multirect,4,2 ; @dpu_hw_sspp_setup_multirect
	.comm	_DPU_SSPP_SCALER_QSEED3,4,2     ; @DPU_SSPP_SCALER_QSEED3
	.comm	__dpu_hw_sspp_setup_scaler3,4,2 ; @_dpu_hw_sspp_setup_scaler3
	.comm	__dpu_hw_sspp_get_scaler3_ver,4,2 ; @_dpu_hw_sspp_get_scaler3_ver
	.comm	_DPU_SSPP_CDP,4,2               ; @DPU_SSPP_CDP
	.comm	_dpu_hw_sspp_setup_cdp,4,2      ; @dpu_hw_sspp_setup_cdp
	.no_dead_strip	__setup_layer_ops
.subsections_via_symbols
