	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_power_domains_init_hw    ## -- Begin function intel_power_domains_init_hw
	.p2align	4, 0x90
_intel_power_domains_init_hw:           ## @intel_power_domains_init_hw
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movl	$1, (%rdi)
	callq	_INTEL_GEN
	movq	%rbx, %rdi
	cmpl	$11, %eax
	jl	LBB0_2
## %bb.1:
	movl	%r14d, %esi
	callq	_icl_display_core_init
	jmp	LBB0_18
LBB0_2:
	callq	_IS_CANNONLAKE
	movq	%rbx, %rdi
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movl	%r14d, %esi
	callq	_cnl_display_core_init
	jmp	LBB0_18
LBB0_4:
	callq	_IS_GEN9_BC
	movq	%rbx, %rdi
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	movl	%r14d, %esi
	callq	_skl_display_core_init
	jmp	LBB0_18
LBB0_6:
	callq	_IS_GEN9_LP
	movq	%rbx, %rdi
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:
	movl	%r14d, %esi
	callq	_bxt_display_core_init
	jmp	LBB0_18
LBB0_8:
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_11
## %bb.9:
	leaq	8(%rbx), %r14
	movq	%r14, %rdi
	callq	_mutex_lock
	movq	%rbx, %rdi
	callq	_chv_phy_control_init
	movq	%r14, %rdi
	callq	_mutex_unlock
	jmp	LBB0_10
LBB0_11:
	movq	%rbx, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	je	LBB0_13
## %bb.12:
	leaq	8(%rbx), %r14
	movq	%r14, %rdi
	callq	_mutex_lock
	movq	%rbx, %rdi
	callq	_vlv_cmnlane_wa
	movq	%r14, %rdi
	callq	_mutex_unlock
	movq	%rbx, %rdi
	callq	_assert_ved_power_gated
LBB0_10:
	movq	%rbx, %rdi
	callq	_assert_isp_power_gated
LBB0_18:
	movq	_POWER_DOMAIN_INIT@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_intel_display_power_get
	movl	%eax, 4(%rbx)
	movq	_i915_modparams@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	jne	LBB0_20
## %bb.19:
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_intel_display_power_get
LBB0_20:
	movq	%rbx, %rdi
	callq	_intel_power_domains_sync_hw
	movl	$0, (%rbx)
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_13:
	movq	%rbx, %rdi
	callq	_IS_BROADWELL
	testq	%rax, %rax
	jne	LBB0_15
## %bb.14:
	movq	%rbx, %rdi
	callq	_IS_HASWELL
	testq	%rax, %rax
	je	LBB0_16
LBB0_15:
	movq	%rbx, %rdi
	callq	_hsw_assert_cdclk
LBB0_17:
	movq	%rbx, %rdi
	callq	_HAS_PCH_NOP
	xorl	%esi, %esi
	testl	%eax, %eax
	sete	%sil
	movq	%rbx, %rdi
	callq	_intel_pch_reset_handshake
	jmp	LBB0_18
LBB0_16:
	movq	%rbx, %rdi
	callq	_IS_IVYBRIDGE
	testq	%rax, %rax
	jne	LBB0_17
	jmp	LBB0_18
	.cfi_endproc
                                        ## -- End function
	.comm	_POWER_DOMAIN_INIT,4,2          ## @POWER_DOMAIN_INIT
	.comm	_i915_modparams,4,2             ## @i915_modparams
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_power_domains_init_hw    ; -- Begin function intel_power_domains_init_hw
	.p2align	2
_intel_power_domains_init_hw:           ; @intel_power_domains_init_hw
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x1
	mov	x19, x0
	mov	w8, #1
	str	w8, [x0]
	bl	_INTEL_GEN
	cmp	w0, #11
	b.lt	LBB0_2
; %bb.1:
	mov	x0, x19
	mov	x1, x20
	bl	_icl_display_core_init
	b	LBB0_13
LBB0_2:
	mov	x0, x19
	bl	_IS_CANNONLAKE
	cbz	x0, LBB0_4
; %bb.3:
	mov	x0, x19
	mov	x1, x20
	bl	_cnl_display_core_init
	b	LBB0_13
LBB0_4:
	mov	x0, x19
	bl	_IS_GEN9_BC
	cbz	x0, LBB0_6
; %bb.5:
	mov	x0, x19
	mov	x1, x20
	bl	_skl_display_core_init
	b	LBB0_13
LBB0_6:
	mov	x0, x19
	bl	_IS_GEN9_LP
	cbz	x0, LBB0_8
; %bb.7:
	mov	x0, x19
	mov	x1, x20
	bl	_bxt_display_core_init
	b	LBB0_13
LBB0_8:
	mov	x0, x19
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_10
; %bb.9:
	add	x20, x19, #8
	mov	x0, x20
	bl	_mutex_lock
	mov	x0, x19
	bl	_chv_phy_control_init
	mov	x0, x20
	bl	_mutex_unlock
	b	LBB0_12
LBB0_10:
	mov	x0, x19
	bl	_IS_VALLEYVIEW
	cbz	x0, LBB0_16
; %bb.11:
	add	x20, x19, #8
	mov	x0, x20
	bl	_mutex_lock
	mov	x0, x19
	bl	_vlv_cmnlane_wa
	mov	x0, x20
	bl	_mutex_unlock
	mov	x0, x19
	bl	_assert_ved_power_gated
LBB0_12:
	mov	x0, x19
	bl	_assert_isp_power_gated
LBB0_13:
Lloh0:
	adrp	x20, _POWER_DOMAIN_INIT@GOTPAGE
Lloh1:
	ldr	x20, [x20, _POWER_DOMAIN_INIT@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_intel_display_power_get
	str	w0, [x19, #4]
Lloh2:
	adrp	x8, _i915_modparams@GOTPAGE
Lloh3:
	ldr	x8, [x8, _i915_modparams@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	cbnz	w8, LBB0_15
; %bb.14:
	ldr	w1, [x20]
	mov	x0, x19
	bl	_intel_display_power_get
LBB0_15:
	mov	x0, x19
	bl	_intel_power_domains_sync_hw
	str	wzr, [x19]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_16:
	mov	x0, x19
	bl	_IS_BROADWELL
	cbnz	x0, LBB0_18
; %bb.17:
	mov	x0, x19
	bl	_IS_HASWELL
	cbz	x0, LBB0_20
LBB0_18:
	mov	x0, x19
	bl	_hsw_assert_cdclk
LBB0_19:
	mov	x0, x19
	bl	_HAS_PCH_NOP
	cmp	w0, #0
	cset	w1, eq
	mov	x0, x19
	bl	_intel_pch_reset_handshake
	b	LBB0_13
LBB0_20:
	mov	x0, x19
	bl	_IS_IVYBRIDGE
	cbnz	x0, LBB0_19
	b	LBB0_13
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_POWER_DOMAIN_INIT,4,2          ; @POWER_DOMAIN_INIT
	.comm	_i915_modparams,4,2             ; @i915_modparams
.subsections_via_symbols
