	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ipu_di_init_sync_panel         ## -- Begin function ipu_di_init_sync_panel
	.p2align	4, 0x90
_ipu_di_init_sync_panel:                ## @ipu_di_init_sync_panel
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	16(%rdi), %rax
	movl	(%rax), %edi
	movl	(%r15), %edx
	movl	32(%rsi), %ecx
	movl	44(%rsi), %r8d
	leaq	L_.str(%rip), %rsi
	callq	_dev_dbg
	movq	16(%r15), %rax
	movl	(%rax), %r12d
	movl	8(%r15), %edi
	callq	_clk_get_rate
	movl	%eax, %ebx
	movl	4(%r15), %edi
	callq	_clk_get_rate
	movl	40(%r14), %r8d
	leaq	L_.str.1(%rip), %rsi
	movl	%r12d, %edi
	movl	%ebx, %edx
	movl	%eax, %ecx
	callq	_dev_dbg
	movq	_di_mutex@GOTPCREL(%rip), %rdi
	callq	_mutex_lock
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_ipu_di_config_clock
	movq	_DI_BS_CLKGEN0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_ipu_di_read
	shrl	$4, %eax
	movzbl	%al, %r12d
	movl	%r12d, %esi
	shll	$16, %esi
	movq	_DI_BS_CLKGEN1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_ipu_di_write
	movq	_SYNC_WAVE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	leal	-1(%r12), %ecx
	movq	%r15, %rdi
	movl	%ecx, %edx
	callq	_ipu_di_data_wave_config
	movl	(%rbx), %esi
	movq	_DI_PIN15@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leal	(%r12,%r12), %r9d
	movq	%r15, %rdi
	movl	$3, %ecx
	xorl	%r8d, %r8d
	callq	_ipu_di_data_pin_config
	movq	_DI_GENERAL@GOTPCREL(%rip), %rax
	movq	%rax, %r13
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_ipu_di_read
	movl	%eax, %ebx
	movq	_DI_GEN_DI_CLK_EXT@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movq	_DI_GEN_DI_VSYNC_EXT@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_DISPLAY_FLAGS_INTERLACED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 36(%r14)
	je	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_ipu_di_sync_config_interlaced
	orl	$268435456, %ebx                ## imm = 0x10000000
	movl	$2, %r12d
	jmp	LBB0_6
LBB0_2:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%r12d, %edx
	callq	_ipu_di_sync_config_noninterlaced
	movl	$2, %r12d
	cmpl	$1, (%r15)
	jne	LBB0_6
## %bb.3:
	cmpl	$2, (%r14)
	jne	LBB0_5
## %bb.4:
	cmpl	$3, 4(%r14)
	je	LBB0_6
LBB0_5:
	movl	$5, %r12d
LBB0_6:
	movl	36(%r14), %eax
	movq	_DISPLAY_FLAGS_HSYNC_HIGH@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_8
## %bb.7:
	movl	(%r14), %edi
	callq	_ipu_di_gen_polarity
	orl	%eax, %ebx
	movl	36(%r14), %eax
LBB0_8:
	movq	_DISPLAY_FLAGS_VSYNC_HIGH@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_10
## %bb.9:
	movl	4(%r14), %edi
	callq	_ipu_di_gen_polarity
	orl	%eax, %ebx
LBB0_10:
	movq	%r13, %rcx
	xorl	%r13d, %r13d
	cmpq	$0, 24(%r14)
	movl	$0, %esi
	je	LBB0_12
## %bb.11:
	movq	_DI_GEN_POLARITY_DISP_CLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_12:
	orl	%ebx, %esi
	movl	(%rcx), %edx
	movq	%r15, %rdi
	callq	_ipu_di_write
	movq	_DI_VSYNC_SEL_OFFSET@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r12d
	orl	$2, %r12d
	movq	_DI_SYNC_AS_GEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_ipu_di_write
	movq	_DI_POL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_ipu_di_read
	movq	_DI_POL_DRDY_DATA_POLARITY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_DI_POL_DRDY_POLARITY_15@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, %edx
	orl	%esi, %edx
	notl	%edx
	andl	%eax, %edx
	cmpq	$0, 16(%r14)
	cmovel	%r13d, %ecx
	cmpq	$0, 8(%r14)
	cmovel	%r13d, %esi
	orl	%ecx, %esi
	orl	%edx, %esi
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_ipu_di_write
	movq	_di_mutex@GOTPCREL(%rip), %rdi
	callq	_mutex_unlock
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"disp %d: panel size = %d x %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"Clocks: IPU %luHz DI %luHz Needed %luHz\n"

	.comm	_di_mutex,4,2                   ## @di_mutex
	.comm	_DI_BS_CLKGEN0,4,2              ## @DI_BS_CLKGEN0
	.comm	_DI_BS_CLKGEN1,4,2              ## @DI_BS_CLKGEN1
	.comm	_SYNC_WAVE,4,2                  ## @SYNC_WAVE
	.comm	_DI_PIN15,4,2                   ## @DI_PIN15
	.comm	_DI_GENERAL,4,2                 ## @DI_GENERAL
	.comm	_DI_GEN_DI_CLK_EXT,4,2          ## @DI_GEN_DI_CLK_EXT
	.comm	_DI_GEN_DI_VSYNC_EXT,4,2        ## @DI_GEN_DI_VSYNC_EXT
	.comm	_DISPLAY_FLAGS_INTERLACED,4,2   ## @DISPLAY_FLAGS_INTERLACED
	.comm	_DISPLAY_FLAGS_HSYNC_HIGH,4,2   ## @DISPLAY_FLAGS_HSYNC_HIGH
	.comm	_DISPLAY_FLAGS_VSYNC_HIGH,4,2   ## @DISPLAY_FLAGS_VSYNC_HIGH
	.comm	_DI_GEN_POLARITY_DISP_CLK,4,2   ## @DI_GEN_POLARITY_DISP_CLK
	.comm	_DI_VSYNC_SEL_OFFSET,4,2        ## @DI_VSYNC_SEL_OFFSET
	.comm	_DI_SYNC_AS_GEN,4,2             ## @DI_SYNC_AS_GEN
	.comm	_DI_POL,4,2                     ## @DI_POL
	.comm	_DI_POL_DRDY_DATA_POLARITY,4,2  ## @DI_POL_DRDY_DATA_POLARITY
	.comm	_DI_POL_DRDY_POLARITY_15,4,2    ## @DI_POL_DRDY_POLARITY_15
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ipu_di_init_sync_panel         ; -- Begin function ipu_di_init_sync_panel
	.p2align	2
_ipu_di_init_sync_panel:                ; @ipu_di_init_sync_panel
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
	ldr	x8, [x0, #16]
	ldr	w0, [x8]
	ldr	w2, [x19]
	ldr	w3, [x1, #32]
	ldr	w4, [x1, #44]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_dbg
	ldr	x8, [x19, #16]
	ldr	w21, [x8]
	ldr	w0, [x19, #8]
	bl	_clk_get_rate
	mov	x22, x0
	ldr	w0, [x19, #4]
	bl	_clk_get_rate
	mov	x3, x0
	ldr	w4, [x20, #40]
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x21
	mov	x2, x22
	bl	_dev_dbg
Lloh4:
	adrp	x0, _di_mutex@GOTPAGE
Lloh5:
	ldr	x0, [x0, _di_mutex@GOTPAGEOFF]
	bl	_mutex_lock
	mov	x0, x19
	mov	x1, x20
	bl	_ipu_di_config_clock
Lloh6:
	adrp	x8, _DI_BS_CLKGEN0@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DI_BS_CLKGEN0@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_ipu_di_read
	ubfx	w21, w0, #4, #8
	lsl	w1, w21, #16
Lloh9:
	adrp	x8, _DI_BS_CLKGEN1@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DI_BS_CLKGEN1@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ipu_di_write
Lloh12:
	adrp	x22, _SYNC_WAVE@GOTPAGE
Lloh13:
	ldr	x22, [x22, _SYNC_WAVE@GOTPAGEOFF]
	ldr	w1, [x22]
	sub	w2, w21, #1
	mov	x0, x19
	mov	x3, x2
	bl	_ipu_di_data_wave_config
	ldr	w1, [x22]
Lloh14:
	adrp	x8, _DI_PIN15@GOTPAGE
Lloh15:
	ldr	x8, [x8, _DI_PIN15@GOTPAGEOFF]
Lloh16:
	ldr	w2, [x8]
	lsl	w5, w21, #1
	mov	x0, x19
	mov	w3, #3
	mov	w4, #0
	bl	_ipu_di_data_pin_config
Lloh17:
	adrp	x22, _DI_GENERAL@GOTPAGE
Lloh18:
	ldr	x22, [x22, _DI_GENERAL@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_ipu_di_read
Lloh19:
	adrp	x8, _DI_GEN_DI_CLK_EXT@GOTPAGE
Lloh20:
	ldr	x8, [x8, _DI_GEN_DI_CLK_EXT@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh22:
	adrp	x9, _DI_GEN_DI_VSYNC_EXT@GOTPAGE
Lloh23:
	ldr	x9, [x9, _DI_GEN_DI_VSYNC_EXT@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	orr	w23, w8, w9
	ldr	w8, [x20, #36]
Lloh25:
	adrp	x9, _DISPLAY_FLAGS_INTERLACED@GOTPAGE
Lloh26:
	ldr	x9, [x9, _DISPLAY_FLAGS_INTERLACED@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	mov	x0, x19
	mov	x1, x20
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	bl	_ipu_di_sync_config_interlaced
	orr	w23, w23, #0x10000000
	mov	w21, #2
	b	LBB0_7
LBB0_2:
	mov	x2, x21
	bl	_ipu_di_sync_config_noninterlaced
	ldr	w8, [x19]
	cmp	w8, #1
	b.ne	LBB0_5
; %bb.3:
	ldr	w8, [x20]
	cmp	w8, #2
	b.ne	LBB0_6
; %bb.4:
	ldr	w8, [x20, #4]
	cmp	w8, #3
	b.ne	LBB0_6
LBB0_5:
	mov	w21, #2
	b	LBB0_7
LBB0_6:
	mov	w21, #5
LBB0_7:
	ldr	w8, [x20, #36]
Lloh28:
	adrp	x9, _DISPLAY_FLAGS_HSYNC_HIGH@GOTPAGE
Lloh29:
	ldr	x9, [x9, _DISPLAY_FLAGS_HSYNC_HIGH@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.8:
	ldr	w0, [x20]
	bl	_ipu_di_gen_polarity
	orr	w23, w0, w23
	ldr	w8, [x20, #36]
LBB0_9:
Lloh31:
	adrp	x9, _DISPLAY_FLAGS_VSYNC_HIGH@GOTPAGE
Lloh32:
	ldr	x9, [x9, _DISPLAY_FLAGS_VSYNC_HIGH@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_11
; %bb.10:
	ldr	w0, [x20, #4]
	bl	_ipu_di_gen_polarity
	orr	w23, w0, w23
LBB0_11:
Lloh34:
	adrp	x8, _DI_GEN_POLARITY_DISP_CLK@GOTPAGE
Lloh35:
	ldr	x8, [x8, _DI_GEN_POLARITY_DISP_CLK@GOTPAGEOFF]
	ldr	x9, [x20, #24]
Lloh36:
	ldr	w8, [x8]
	cmp	x9, #0
	csel	w8, wzr, w8, eq
	orr	w1, w8, w23
	ldr	w2, [x22]
	mov	x0, x19
	bl	_ipu_di_write
Lloh37:
	adrp	x8, _DI_VSYNC_SEL_OFFSET@GOTPAGE
Lloh38:
	ldr	x8, [x8, _DI_VSYNC_SEL_OFFSET@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	lsl	w8, w21, w8
	orr	w1, w8, #0x2
Lloh40:
	adrp	x8, _DI_SYNC_AS_GEN@GOTPAGE
Lloh41:
	ldr	x8, [x8, _DI_SYNC_AS_GEN@GOTPAGEOFF]
Lloh42:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_ipu_di_write
Lloh43:
	adrp	x21, _DI_POL@GOTPAGE
Lloh44:
	ldr	x21, [x21, _DI_POL@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_ipu_di_read
Lloh45:
	adrp	x8, _DI_POL_DRDY_DATA_POLARITY@GOTPAGE
Lloh46:
	ldr	x8, [x8, _DI_POL_DRDY_DATA_POLARITY@GOTPAGEOFF]
Lloh47:
	ldr	w8, [x8]
Lloh48:
	adrp	x9, _DI_POL_DRDY_POLARITY_15@GOTPAGE
Lloh49:
	ldr	x9, [x9, _DI_POL_DRDY_POLARITY_15@GOTPAGEOFF]
Lloh50:
	ldr	w9, [x9]
	orr	w10, w9, w8
	bic	w10, w0, w10
	ldp	x12, x11, [x20, #8]
	cmp	x11, #0
	csel	w9, wzr, w9, eq
	orr	w9, w9, w10
	cmp	x12, #0
	csel	w8, wzr, w8, eq
	orr	w1, w9, w8
	ldr	w2, [x21]
	mov	x0, x19
	bl	_ipu_di_write
Lloh51:
	adrp	x0, _di_mutex@GOTPAGE
Lloh52:
	ldr	x0, [x0, _di_mutex@GOTPAGEOFF]
	bl	_mutex_unlock
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"disp %d: panel size = %d x %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"Clocks: IPU %luHz DI %luHz Needed %luHz\n"

	.comm	_di_mutex,4,2                   ; @di_mutex
	.comm	_DI_BS_CLKGEN0,4,2              ; @DI_BS_CLKGEN0
	.comm	_DI_BS_CLKGEN1,4,2              ; @DI_BS_CLKGEN1
	.comm	_SYNC_WAVE,4,2                  ; @SYNC_WAVE
	.comm	_DI_PIN15,4,2                   ; @DI_PIN15
	.comm	_DI_GENERAL,4,2                 ; @DI_GENERAL
	.comm	_DI_GEN_DI_CLK_EXT,4,2          ; @DI_GEN_DI_CLK_EXT
	.comm	_DI_GEN_DI_VSYNC_EXT,4,2        ; @DI_GEN_DI_VSYNC_EXT
	.comm	_DISPLAY_FLAGS_INTERLACED,4,2   ; @DISPLAY_FLAGS_INTERLACED
	.comm	_DISPLAY_FLAGS_HSYNC_HIGH,4,2   ; @DISPLAY_FLAGS_HSYNC_HIGH
	.comm	_DISPLAY_FLAGS_VSYNC_HIGH,4,2   ; @DISPLAY_FLAGS_VSYNC_HIGH
	.comm	_DI_GEN_POLARITY_DISP_CLK,4,2   ; @DI_GEN_POLARITY_DISP_CLK
	.comm	_DI_VSYNC_SEL_OFFSET,4,2        ; @DI_VSYNC_SEL_OFFSET
	.comm	_DI_SYNC_AS_GEN,4,2             ; @DI_SYNC_AS_GEN
	.comm	_DI_POL,4,2                     ; @DI_POL
	.comm	_DI_POL_DRDY_DATA_POLARITY,4,2  ; @DI_POL_DRDY_DATA_POLARITY
	.comm	_DI_POL_DRDY_POLARITY_15,4,2    ; @DI_POL_DRDY_POLARITY_15
.subsections_via_symbols
