	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ni_mc_load_microcode           ## -- Begin function ni_mc_load_microcode
	.p2align	4, 0x90
_ni_mc_load_microcode:                  ## @ni_mc_load_microcode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpq	$0, 8(%rdi)
	je	LBB0_1
## %bb.2:
	movl	(%rdi), %eax
	addl	$-128, %eax
	cmpl	$3, %eax
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	ja	LBB0_3
## %bb.4:
	cltq
	leaq	l_switch.table.ni_mc_load_microcode(%rip), %rcx
	movq	(%rcx,%rax,8), %r15
	leaq	l_switch.table.ni_mc_load_microcode.1(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	jmp	LBB0_5
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%edx, %edx
	subl	(%rax), %edx
	jmp	LBB0_18
LBB0_3:
	movq	_BTC_MC_UCODE_SIZE@GOTPCREL(%rip), %rax
	movq	_caicos_io_mc_regs@GOTPCREL(%rip), %r15
LBB0_5:
	movq	_BTC_IO_MC_REGS_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	movl	(%rax), %r13d
	movq	_MC_SEQ_MISC0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%eax, %r12d
	movq	_MC_SEQ_MISC0_GDDR5_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %r12d
	movq	_MC_SEQ_MISC0_GDDR5_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r12d
	movq	_MC_SEQ_SUP_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_RREG32
	movq	_MC_SEQ_MISC0_GDDR5_VALUE@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	cmpl	(%rcx), %r12d
	jne	LBB0_18
## %bb.6:
	movq	_RUN_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	jne	LBB0_18
## %bb.7:
	movl	(%rbx), %edi
	movl	$8, %esi
	callq	_WREG32
	movl	(%rbx), %edi
	movl	$16, %esi
	callq	_WREG32
	testl	%r14d, %r14d
	jle	LBB0_10
## %bb.8:
	addq	%r14, %r14
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	movq	_MC_SEQ_IO_DEBUG_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rbx, %rax
	sarq	$30, %rax
	movl	(%r15,%rax), %esi
	callq	_WREG32
	movq	_MC_SEQ_IO_DEBUG_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leal	1(%r12), %eax
	cltq
	movl	(%r15,%rax,4), %esi
	callq	_WREG32
	addq	$2, %r12
	movabsq	$8589934592, %rax               ## imm = 0x200000000
	addq	%rax, %rbx
	cmpq	%r12, %r14
	jne	LBB0_9
LBB0_10:
	testl	%r13d, %r13d
	jle	LBB0_13
## %bb.11:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	8(%rax), %rax
	movl	(%rax), %ebx
	movq	_MC_SEQ_SUP_PGM@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %r12d
	movl	%ebx, %edi
	callq	_be32_to_cpup
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_WREG32
	addl	$4, %ebx
	decl	%r13d
	jne	LBB0_12
LBB0_13:
	movq	_MC_SEQ_SUP_CNTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movl	$8, %esi
	callq	_WREG32
	movl	(%rbx), %edi
	movl	$4, %esi
	callq	_WREG32
	movl	(%rbx), %edi
	movl	$1, %esi
	callq	_WREG32
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	cmpl	$0, 4(%r12)
	movl	$0, %edx
	jle	LBB0_18
## %bb.14:
	movq	_MC_IO_PAD_CNTL_D0@GOTPCREL(%rip), %r14
	movq	_MEM_FALL_OUT_CMD@GOTPCREL(%rip), %r15
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_15:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r14), %edi
	callq	_RREG32
	testl	%eax, (%r15)
	jne	LBB0_17
## %bb.16:                              ##   in Loop: Header=BB0_15 Depth=1
	movl	$1, %edi
	callq	_udelay
	incl	%ebx
	cmpl	4(%r12), %ebx
	jl	LBB0_15
LBB0_17:
	xorl	%edx, %edx
LBB0_18:
	movl	%edx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_barts_io_mc_regs,4,2           ## @barts_io_mc_regs
	.comm	_BTC_MC_UCODE_SIZE,4,2          ## @BTC_MC_UCODE_SIZE
	.comm	_BTC_IO_MC_REGS_SIZE,4,2        ## @BTC_IO_MC_REGS_SIZE
	.comm	_turks_io_mc_regs,4,2           ## @turks_io_mc_regs
	.comm	_caicos_io_mc_regs,4,2          ## @caicos_io_mc_regs
	.comm	_cayman_io_mc_regs,4,2          ## @cayman_io_mc_regs
	.comm	_CAYMAN_MC_UCODE_SIZE,4,2       ## @CAYMAN_MC_UCODE_SIZE
	.comm	_MC_SEQ_MISC0,4,2               ## @MC_SEQ_MISC0
	.comm	_MC_SEQ_MISC0_GDDR5_MASK,4,2    ## @MC_SEQ_MISC0_GDDR5_MASK
	.comm	_MC_SEQ_MISC0_GDDR5_SHIFT,4,2   ## @MC_SEQ_MISC0_GDDR5_SHIFT
	.comm	_MC_SEQ_SUP_CNTL,4,2            ## @MC_SEQ_SUP_CNTL
	.comm	_RUN_MASK,4,2                   ## @RUN_MASK
	.comm	_MC_SEQ_MISC0_GDDR5_VALUE,4,2   ## @MC_SEQ_MISC0_GDDR5_VALUE
	.comm	_MC_SHARED_BLACKOUT_CNTL,4,2    ## @MC_SHARED_BLACKOUT_CNTL
	.comm	_MC_SEQ_IO_DEBUG_INDEX,4,2      ## @MC_SEQ_IO_DEBUG_INDEX
	.comm	_MC_SEQ_IO_DEBUG_DATA,4,2       ## @MC_SEQ_IO_DEBUG_DATA
	.comm	_MC_SEQ_SUP_PGM,4,2             ## @MC_SEQ_SUP_PGM
	.comm	_MC_IO_PAD_CNTL_D0,4,2          ## @MC_IO_PAD_CNTL_D0
	.comm	_MEM_FALL_OUT_CMD,4,2           ## @MEM_FALL_OUT_CMD
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.ni_mc_load_microcode
l_switch.table.ni_mc_load_microcode:
	.quad	_turks_io_mc_regs
	.quad	_cayman_io_mc_regs
	.quad	_caicos_io_mc_regs
	.quad	_barts_io_mc_regs

	.p2align	3                               ## @switch.table.ni_mc_load_microcode.1
l_switch.table.ni_mc_load_microcode.1:
	.quad	_BTC_MC_UCODE_SIZE
	.quad	_CAYMAN_MC_UCODE_SIZE
	.quad	_BTC_MC_UCODE_SIZE
	.quad	_BTC_MC_UCODE_SIZE

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ni_mc_load_microcode           ; -- Begin function ni_mc_load_microcode
	.p2align	2
_ni_mc_load_microcode:                  ; @ni_mc_load_microcode
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	x8, [x0, #8]
	cbz	x8, LBB0_3
; %bb.1:
	mov	x19, x0
	ldr	w8, [x0]
	sub	w8, w8, #128
	cmp	w8, #3
	b.hi	LBB0_4
; %bb.2:
	sbfiz	x8, x8, #3, #32
Lloh0:
	adrp	x9, l_switch.table.ni_mc_load_microcode@PAGE
Lloh1:
	add	x9, x9, l_switch.table.ni_mc_load_microcode@PAGEOFF
	ldr	x20, [x9, x8]
Lloh2:
	adrp	x9, l_switch.table.ni_mc_load_microcode.1@PAGE
Lloh3:
	add	x9, x9, l_switch.table.ni_mc_load_microcode.1@PAGEOFF
	ldr	x8, [x9, x8]
	b	LBB0_5
LBB0_3:
Lloh4:
	adrp	x8, _EINVAL@GOTPAGE
Lloh5:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_17
LBB0_4:
Lloh7:
	adrp	x8, _BTC_MC_UCODE_SIZE@GOTPAGE
Lloh8:
	ldr	x8, [x8, _BTC_MC_UCODE_SIZE@GOTPAGEOFF]
Lloh9:
	adrp	x20, _caicos_io_mc_regs@GOTPAGE
Lloh10:
	ldr	x20, [x20, _caicos_io_mc_regs@GOTPAGEOFF]
LBB0_5:
Lloh11:
	adrp	x9, _BTC_IO_MC_REGS_SIZE@GOTPAGE
Lloh12:
	ldr	x9, [x9, _BTC_IO_MC_REGS_SIZE@GOTPAGEOFF]
Lloh13:
	ldr	w21, [x9]
	ldr	w22, [x8]
Lloh14:
	adrp	x8, _MC_SEQ_MISC0@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MC_SEQ_MISC0@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
	bl	_RREG32
Lloh17:
	adrp	x8, _MC_SEQ_MISC0_GDDR5_MASK@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MC_SEQ_MISC0_GDDR5_MASK@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
Lloh20:
	adrp	x9, _MC_SEQ_MISC0_GDDR5_SHIFT@GOTPAGE
Lloh21:
	ldr	x9, [x9, _MC_SEQ_MISC0_GDDR5_SHIFT@GOTPAGEOFF]
	and	w8, w8, w0
Lloh22:
	ldr	w9, [x9]
	asr	w24, w8, w9
Lloh23:
	adrp	x23, _MC_SEQ_SUP_CNTL@GOTPAGE
Lloh24:
	ldr	x23, [x23, _MC_SEQ_SUP_CNTL@GOTPAGEOFF]
	ldr	w0, [x23]
	bl	_RREG32
Lloh25:
	adrp	x8, _RUN_MASK@GOTPAGE
Lloh26:
	ldr	x8, [x8, _RUN_MASK@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh28:
	adrp	x9, _MC_SEQ_MISC0_GDDR5_VALUE@GOTPAGE
Lloh29:
	ldr	x9, [x9, _MC_SEQ_MISC0_GDDR5_VALUE@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	cmp	w24, w9
	ccmp	w8, #0, #0, eq
	b.ne	LBB0_16
; %bb.6:
	ldr	w0, [x23]
	mov	w1, #8
	bl	_WREG32
	ldr	w0, [x23]
	mov	w1, #16
	bl	_WREG32
	cmp	w21, #1
	b.lt	LBB0_9
; %bb.7:
	mov	x24, #0
	mov	x25, #0
	lsl	x21, x21, #1
Lloh31:
	adrp	x26, _MC_SEQ_IO_DEBUG_INDEX@GOTPAGE
Lloh32:
	ldr	x26, [x26, _MC_SEQ_IO_DEBUG_INDEX@GOTPAGEOFF]
Lloh33:
	adrp	x27, _MC_SEQ_IO_DEBUG_DATA@GOTPAGE
Lloh34:
	ldr	x27, [x27, _MC_SEQ_IO_DEBUG_DATA@GOTPAGEOFF]
	mov	x28, #8589934592
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x26]
	asr	x8, x24, #30
	ldr	w1, [x20, x8]
	bl	_WREG32
	ldr	w0, [x27]
	add	w8, w25, #1
	ldr	w1, [x20, w8, sxtw #2]
	bl	_WREG32
	add	x25, x25, #2
	add	x24, x24, x28
	cmp	x21, x25
	b.ne	LBB0_8
LBB0_9:
	cmp	w22, #1
	b.lt	LBB0_12
; %bb.10:
	ldr	x8, [x19, #8]
	ldr	w20, [x8]
Lloh35:
	adrp	x24, _MC_SEQ_SUP_PGM@GOTPAGE
Lloh36:
	ldr	x24, [x24, _MC_SEQ_SUP_PGM@GOTPAGEOFF]
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	ldr	w21, [x24]
	mov	x0, x20
	bl	_be32_to_cpup
	mov	x1, x0
	mov	x0, x21
	bl	_WREG32
	add	w20, w20, #4
	subs	w22, w22, #1
	b.ne	LBB0_11
LBB0_12:
	ldr	w0, [x23]
	mov	w1, #8
	bl	_WREG32
	ldr	w0, [x23]
	mov	w1, #4
	bl	_WREG32
	ldr	w0, [x23]
	mov	w1, #1
	bl	_WREG32
	ldr	w8, [x19, #4]
	cmp	w8, #1
	b.lt	LBB0_16
; %bb.13:
	mov	w20, #0
Lloh37:
	adrp	x21, _MC_IO_PAD_CNTL_D0@GOTPAGE
Lloh38:
	ldr	x21, [x21, _MC_IO_PAD_CNTL_D0@GOTPAGEOFF]
Lloh39:
	adrp	x22, _MEM_FALL_OUT_CMD@GOTPAGE
Lloh40:
	ldr	x22, [x22, _MEM_FALL_OUT_CMD@GOTPAGEOFF]
LBB0_14:                                ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x21]
	bl	_RREG32
	ldr	w8, [x22]
	tst	w8, w0
	b.ne	LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=1
	mov	w0, #1
	bl	_udelay
	add	w20, w20, #1
	ldr	w8, [x19, #4]
	cmp	w20, w8
	b.lt	LBB0_14
LBB0_16:
	mov	w0, #0
LBB0_17:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh37, Lloh38
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_barts_io_mc_regs,4,2           ; @barts_io_mc_regs
	.comm	_BTC_MC_UCODE_SIZE,4,2          ; @BTC_MC_UCODE_SIZE
	.comm	_BTC_IO_MC_REGS_SIZE,4,2        ; @BTC_IO_MC_REGS_SIZE
	.comm	_turks_io_mc_regs,4,2           ; @turks_io_mc_regs
	.comm	_caicos_io_mc_regs,4,2          ; @caicos_io_mc_regs
	.comm	_cayman_io_mc_regs,4,2          ; @cayman_io_mc_regs
	.comm	_CAYMAN_MC_UCODE_SIZE,4,2       ; @CAYMAN_MC_UCODE_SIZE
	.comm	_MC_SEQ_MISC0,4,2               ; @MC_SEQ_MISC0
	.comm	_MC_SEQ_MISC0_GDDR5_MASK,4,2    ; @MC_SEQ_MISC0_GDDR5_MASK
	.comm	_MC_SEQ_MISC0_GDDR5_SHIFT,4,2   ; @MC_SEQ_MISC0_GDDR5_SHIFT
	.comm	_MC_SEQ_SUP_CNTL,4,2            ; @MC_SEQ_SUP_CNTL
	.comm	_RUN_MASK,4,2                   ; @RUN_MASK
	.comm	_MC_SEQ_MISC0_GDDR5_VALUE,4,2   ; @MC_SEQ_MISC0_GDDR5_VALUE
	.comm	_MC_SHARED_BLACKOUT_CNTL,4,2    ; @MC_SHARED_BLACKOUT_CNTL
	.comm	_MC_SEQ_IO_DEBUG_INDEX,4,2      ; @MC_SEQ_IO_DEBUG_INDEX
	.comm	_MC_SEQ_IO_DEBUG_DATA,4,2       ; @MC_SEQ_IO_DEBUG_DATA
	.comm	_MC_SEQ_SUP_PGM,4,2             ; @MC_SEQ_SUP_PGM
	.comm	_MC_IO_PAD_CNTL_D0,4,2          ; @MC_IO_PAD_CNTL_D0
	.comm	_MEM_FALL_OUT_CMD,4,2           ; @MEM_FALL_OUT_CMD
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.ni_mc_load_microcode
l_switch.table.ni_mc_load_microcode:
	.quad	_turks_io_mc_regs
	.quad	_cayman_io_mc_regs
	.quad	_caicos_io_mc_regs
	.quad	_barts_io_mc_regs

	.p2align	3                               ; @switch.table.ni_mc_load_microcode.1
l_switch.table.ni_mc_load_microcode.1:
	.quad	_BTC_MC_UCODE_SIZE
	.quad	_CAYMAN_MC_UCODE_SIZE
	.quad	_BTC_MC_UCODE_SIZE
	.quad	_BTC_MC_UCODE_SIZE

.subsections_via_symbols
