	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function uvd_v7_0_stop
_uvd_v7_0_stop:                         ## @uvd_v7_0_stop
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdi), %eax
	testl	%eax, %eax
	jle	LBB0_5
## %bb.1:
	movq	%rdi, %r14
	xorl	%ebx, %ebx
	movq	_UVD@GOTPCREL(%rip), %r15
	movq	_mmUVD_LMI_CTRL2@GOTPCREL(%rip), %r13
	movq	_UVD_LMI_CTRL2__STALL_ARB_UMC_MASK@GOTPCREL(%rip), %r12
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	incl	%ebx
	cmpl	%eax, %ebx
	jge	LBB0_5
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	4(%r14), %ecx
	btl	%ebx, %ecx
	jb	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	(%r15), %edi
	movq	_mmUVD_RBC_RB_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%ebx, %esi
	movl	$285278465, %ecx                ## imm = 0x11010101
	callq	_WREG32_SOC15
	movl	(%r15), %edi
	movl	(%r13), %edx
	movl	%ebx, %esi
	callq	_SOC15_REG_OFFSET
	movl	(%r12), %esi
	movl	%esi, %edx
	notl	%edx
	movl	%eax, %edi
	callq	_WREG32_P
	movl	$1, %edi
	callq	_mdelay
	movl	(%r15), %edi
	movq	_mmUVD_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ebx, %esi
	callq	_WREG32_SOC15
	movl	$5, %edi
	callq	_mdelay
	movl	(%r15), %edi
	movq	_mmUVD_VCPU_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%ebx, %esi
	xorl	%ecx, %ecx
	callq	_WREG32_SOC15
	movl	(%r15), %edi
	movl	(%r13), %edx
	movl	%ebx, %esi
	callq	_SOC15_REG_OFFSET
	movl	(%r12), %edx
	notl	%edx
	movl	%eax, %edi
	xorl	%esi, %esi
	callq	_WREG32_P
	movl	(%r14), %eax
	jmp	LBB0_4
LBB0_5:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_UVD,4,2                        ## @UVD
	.comm	_mmUVD_RBC_RB_CNTL,4,2          ## @mmUVD_RBC_RB_CNTL
	.comm	_mmUVD_LMI_CTRL2,4,2            ## @mmUVD_LMI_CTRL2
	.comm	_UVD_LMI_CTRL2__STALL_ARB_UMC_MASK,4,2 ## @UVD_LMI_CTRL2__STALL_ARB_UMC_MASK
	.comm	_mmUVD_SOFT_RESET,4,2           ## @mmUVD_SOFT_RESET
	.comm	_UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK,4,2 ## @UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK
	.comm	_mmUVD_VCPU_CNTL,4,2            ## @mmUVD_VCPU_CNTL
	.no_dead_strip	_uvd_v7_0_stop
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function uvd_v7_0_stop
_uvd_v7_0_stop:                         ; @uvd_v7_0_stop
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0]
	cmp	w8, #1
	b.lt	LBB0_5
; %bb.1:
	mov	x19, x0
	mov	w20, #0
Lloh0:
	adrp	x21, _UVD@GOTPAGE
Lloh1:
	ldr	x21, [x21, _UVD@GOTPAGEOFF]
Lloh2:
	adrp	x22, _mmUVD_RBC_RB_CNTL@GOTPAGE
Lloh3:
	ldr	x22, [x22, _mmUVD_RBC_RB_CNTL@GOTPAGEOFF]
Lloh4:
	adrp	x23, _mmUVD_LMI_CTRL2@GOTPAGE
Lloh5:
	ldr	x23, [x23, _mmUVD_LMI_CTRL2@GOTPAGEOFF]
Lloh6:
	adrp	x24, _UVD_LMI_CTRL2__STALL_ARB_UMC_MASK@GOTPAGE
Lloh7:
	ldr	x24, [x24, _UVD_LMI_CTRL2__STALL_ARB_UMC_MASK@GOTPAGEOFF]
Lloh8:
	adrp	x25, _mmUVD_SOFT_RESET@GOTPAGE
Lloh9:
	ldr	x25, [x25, _mmUVD_SOFT_RESET@GOTPAGEOFF]
Lloh10:
	adrp	x26, _UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK@GOTPAGE
Lloh11:
	ldr	x26, [x26, _UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK@GOTPAGEOFF]
Lloh12:
	adrp	x27, _mmUVD_VCPU_CNTL@GOTPAGE
Lloh13:
	ldr	x27, [x27, _mmUVD_VCPU_CNTL@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	w20, w20, #1
	cmp	w20, w8
	b.ge	LBB0_5
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w9, [x19, #4]
	lsr	w9, w9, w20
	tbnz	w9, #0, LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w0, [x21]
	ldr	w2, [x22]
	mov	x1, x20
	mov	w3, #257
	movk	w3, #4353, lsl #16
	bl	_WREG32_SOC15
	ldr	w0, [x21]
	ldr	w2, [x23]
	mov	x1, x20
	bl	_SOC15_REG_OFFSET
	ldr	w1, [x24]
	mvn	w2, w1
	bl	_WREG32_P
	mov	w0, #1
	bl	_mdelay
	ldr	w0, [x21]
	ldr	w2, [x25]
	ldr	w3, [x26]
	mov	x1, x20
	bl	_WREG32_SOC15
	mov	w0, #5
	bl	_mdelay
	ldr	w0, [x21]
	ldr	w2, [x27]
	mov	x1, x20
	mov	w3, #0
	bl	_WREG32_SOC15
	ldr	w0, [x21]
	ldr	w2, [x23]
	mov	x1, x20
	bl	_SOC15_REG_OFFSET
	ldr	w8, [x24]
	mvn	w2, w8
	mov	w1, #0
	bl	_WREG32_P
	ldr	w8, [x19]
	b	LBB0_2
LBB0_5:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_UVD,4,2                        ; @UVD
	.comm	_mmUVD_RBC_RB_CNTL,4,2          ; @mmUVD_RBC_RB_CNTL
	.comm	_mmUVD_LMI_CTRL2,4,2            ; @mmUVD_LMI_CTRL2
	.comm	_UVD_LMI_CTRL2__STALL_ARB_UMC_MASK,4,2 ; @UVD_LMI_CTRL2__STALL_ARB_UMC_MASK
	.comm	_mmUVD_SOFT_RESET,4,2           ; @mmUVD_SOFT_RESET
	.comm	_UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK,4,2 ; @UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK
	.comm	_mmUVD_VCPU_CNTL,4,2            ; @mmUVD_VCPU_CNTL
	.no_dead_strip	_uvd_v7_0_stop
.subsections_via_symbols
