	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vega20_print_clk_levels
_vega20_print_clk_levels:               ## @vega20_print_clk_levels
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, -56(%rbp)                 ## 8-byte Spill
                                        ## kill: def $esi killed $esi def $rsi
	xorl	%r13d, %r13d
	addl	$-128, %esi
	cmpl	$9, %esi
	ja	LBB0_69
## %bb.1:
	movq	%rdi, %r12
	movq	(%rdi), %rbx
	movq	8(%rdi), %r15
	movq	24(%rdi), %r14
	leaq	LJTI0_0(%rip), %rax
	movslq	(%rax,%rsi,4), %rcx
	addq	%rax, %rcx
	jmpq	*%rcx
LBB0_15:
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	movl	$128, %esi
	callq	_smu_get_current_clk_freq
	testl	%eax, %eax
	je	LBB0_17
## %bb.16:
	movl	%eax, %ebx
	leaq	L_.str.7(%rip), %rdi
	jmp	LBB0_4
LBB0_2:
	movq	_SMU_GFXCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	callq	_smu_get_current_clk_freq
	testl	%eax, %eax
	je	LBB0_5
## %bb.3:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_4
LBB0_31:
	movq	16(%r12), %r15
	movq	_smnPCIE_LC_SPEED_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_PCIE
	movq	_PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movl	%eax, -76(%rbp)                 ## 4-byte Spill
	movq	_smnPCIE_LC_LINK_WIDTH_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32_PCIE
	movl	%eax, %r12d
	movq	_PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %r12d
	movq	_PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarl	%cl, %r12d
	movq	_NUM_LINK_LEVELS@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	jle	LBB0_69
## %bb.32:
	leaq	L_.str.3(%rip), %rbx
	xorl	%r14d, %r14d
	xorl	%r13d, %r13d
	jmp	LBB0_33
	.p2align	4, 0x90
LBB0_38:                                ##   in Loop: Header=BB0_33 Depth=1
	movslq	%esi, %rsi
	movq	%rbx, %r9
	leaq	l_reltable.vega20_print_clk_levels.42(%rip), %rbx
	movslq	(%rbx,%rsi,4), %r8
	addq	%rbx, %r8
	movq	%r9, %rbx
LBB0_39:                                ##   in Loop: Header=BB0_33 Depth=1
	movq	16(%r15), %rsi
	movl	(%rsi,%r14,4), %r9d
	xorl	-76(%rbp), %eax                 ## 4-byte Folded Reload
	xorl	%r12d, %edx
	orl	%eax, %edx
	movq	%r10, %rax
	cmoveq	%rbx, %rax
	movq	%rax, (%rsp)
	leaq	L_.str.12(%rip), %rsi
	movl	%r14d, %edx
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r13d
	incq	%r14
	movq	_NUM_LINK_LEVELS@GOTPCREL(%rip), %rax
	movslq	(%rax), %rax
	cmpq	%rax, %r14
	jge	LBB0_69
LBB0_33:                                ## =>This Inner Loop Header: Depth=1
	movq	(%r15), %rax
	movslq	(%rax,%r14,4), %rax
	cmpq	$3, %rax
	jae	LBB0_34
## %bb.35:                              ##   in Loop: Header=BB0_33 Depth=1
	leaq	l_reltable.vega20_print_clk_levels(%rip), %rdx
	movslq	(%rdx,%rax,4), %rcx
	addq	%rdx, %rcx
	leaq	L_.str.4(%rip), %r10
	jmp	LBB0_36
	.p2align	4, 0x90
LBB0_34:                                ##   in Loop: Header=BB0_33 Depth=1
	cmpl	$3, %eax
	leaq	L_.str.4(%rip), %r10
	movq	%r10, %rcx
	leaq	L_.str.16(%rip), %rdx
	cmoveq	%rdx, %rcx
LBB0_36:                                ##   in Loop: Header=BB0_33 Depth=1
	movslq	%r13d, %rdi
	addq	-56(%rbp), %rdi                 ## 8-byte Folded Reload
	movq	8(%r15), %rdx
	movl	(%rdx,%r14,4), %edx
	leal	-1(%rdx), %esi
	cmpl	$5, %esi
	jb	LBB0_38
## %bb.37:                              ##   in Loop: Header=BB0_33 Depth=1
	cmpl	$6, %edx
	movq	%r10, %r8
	leaq	L_.str.22(%rip), %rsi
	cmoveq	%rsi, %r8
	jmp	LBB0_39
LBB0_46:
	movq	(%rbx), %rax
	movq	_OD8_SETTING_GFXCLK_FREQ1@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, 8(%rax,%rcx,4)
	je	LBB0_69
## %bb.47:
	movq	_OD8_SETTING_GFXCLK_FREQ2@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, 8(%rax,%rcx,4)
	je	LBB0_69
## %bb.48:
	movq	_OD8_SETTING_GFXCLK_FREQ3@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, 8(%rax,%rcx,4)
	je	LBB0_69
## %bb.49:
	movq	_OD8_SETTING_GFXCLK_VOLTAGE1@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, 8(%rax,%rcx,4)
	je	LBB0_69
## %bb.50:
	movq	_OD8_SETTING_GFXCLK_VOLTAGE2@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, 8(%rax,%rcx,4)
	je	LBB0_69
## %bb.51:
	movq	_OD8_SETTING_GFXCLK_VOLTAGE3@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, 8(%rax,%rcx,4)
	je	LBB0_69
## %bb.52:
	leaq	L_.str.23(%rip), %rsi
	leaq	L_.str.28(%rip), %rdx
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	_sprintf
	movslq	%eax, %r15
	leaq	(%r12,%r15), %rdi
	movl	12(%r14), %ecx
	movl	16(%r14), %eax
	movq	_VOLTAGE_SCALE@GOTPCREL(%rip), %rbx
	cltd
	idivl	(%rbx)
	leaq	L_.str.29(%rip), %rsi
	movl	%ecx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r15d
	movslq	%r15d, %r15
	leaq	(%r12,%r15), %rdi
	movl	20(%r14), %ecx
	movl	24(%r14), %eax
	cltd
	idivl	(%rbx)
	leaq	L_.str.30(%rip), %rsi
	movl	%ecx, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r15d
	movslq	%r15d, %r13
	addq	%r13, %r12
	movl	28(%r14), %ecx
	movl	32(%r14), %eax
	cltd
	idivl	(%rbx)
	leaq	L_.str.31(%rip), %rsi
	movq	%r12, %rdi
	movl	%ecx, %edx
	movl	%eax, %ecx
	jmp	LBB0_67
LBB0_40:
	movq	(%rbx), %rax
	movq	_OD8_SETTING_GFXCLK_FMIN@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, 8(%rax,%rcx,4)
	je	LBB0_69
## %bb.41:
	movq	_OD8_SETTING_GFXCLK_FMAX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, 8(%rax,%rcx,4)
	je	LBB0_69
## %bb.42:
	leaq	L_.str.23(%rip), %rsi
	leaq	L_.str.24(%rip), %rdx
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	_sprintf
	movslq	%eax, %rbx
	leaq	(%r15,%rbx), %rdi
	movl	(%r14), %edx
	leaq	L_.str.25(%rip), %rsi
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %ebx
	movslq	%ebx, %r13
	addq	%r13, %r15
	movl	4(%r14), %edx
	leaq	L_.str.26(%rip), %rsi
	movq	%r15, %rdi
	jmp	LBB0_45
LBB0_53:
	leaq	L_.str.23(%rip), %rsi
	leaq	L_.str.32(%rip), %rdx
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	xorl	%eax, %eax
	callq	_sprintf
	movl	%eax, %r13d
	movq	(%rbx), %rcx
	movq	_OD8_SETTING_GFXCLK_FMIN@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	leaq	(%rax,%rax,2), %rax
	cmpl	$0, 8(%rcx,%rax,4)
	je	LBB0_56
## %bb.54:
	movq	_OD8_SETTING_GFXCLK_FMAX@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(%rdx,%rdx,2), %rsi
	cmpl	$0, 8(%rcx,%rsi,4)
	je	LBB0_56
## %bb.55:
	movslq	%r13d, %rdi
	addq	-56(%rbp), %rdi                 ## 8-byte Folded Reload
	movl	(%rcx,%rax,4), %edx
	movl	4(%rcx,%rsi,4), %ecx
	leaq	L_.str.33(%rip), %rsi
	xorl	%eax, %eax
	callq	_sprintf
	addl	%r13d, %eax
	movq	(%rbx), %rcx
	movl	%eax, %r13d
LBB0_56:
	movq	_OD8_SETTING_UCLK_FMAX@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	leaq	(%rax,%rax,2), %rax
	cmpl	$0, 8(%rcx,%rax,4)
	je	LBB0_60
## %bb.57:
	leaq	-72(%rbp), %rsi
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	_vega20_get_clk_table
	testl	%eax, %eax
	je	LBB0_59
## %bb.58:
	movl	%eax, %r14d
	leaq	L_.str.6(%rip), %rdi
	callq	_pr_err
	movl	%r14d, %r13d
	jmp	LBB0_69
LBB0_43:
	movq	(%rbx), %rax
	movq	_OD8_SETTING_UCLK_FMAX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	cmpl	$0, 8(%rax,%rcx,4)
	je	LBB0_69
## %bb.44:
	leaq	L_.str.23(%rip), %rsi
	leaq	L_.str.27(%rip), %rdx
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	_sprintf
	movslq	%eax, %r13
	addq	%r13, %rbx
	movl	8(%r14), %edx
	leaq	L_.str.26(%rip), %rsi
	movq	%rbx, %rdi
LBB0_45:
	xorl	%eax, %eax
	callq	_sprintf
LBB0_68:
	addl	%eax, %r13d
	jmp	LBB0_69
LBB0_9:
	movq	_SMU_UCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	callq	_smu_get_current_clk_freq
	testl	%eax, %eax
	je	LBB0_11
## %bb.10:
	movl	%eax, %ebx
	leaq	L_.str.5(%rip), %rdi
	jmp	LBB0_4
LBB0_21:
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	movl	$136, %esi
	callq	_smu_get_current_clk_freq
	testl	%eax, %eax
	je	LBB0_22
## %bb.73:
	movl	%eax, %ebx
	leaq	L_.str.9(%rip), %rdi
	jmp	LBB0_4
LBB0_25:
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	movl	$137, %esi
	callq	_smu_get_current_clk_freq
	testl	%eax, %eax
	je	LBB0_27
## %bb.26:
	movl	%eax, %ebx
	leaq	L_.str.10(%rip), %rdi
	jmp	LBB0_4
LBB0_17:
	addq	$48, %r15
	leaq	-72(%rbp), %rsi
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	_vega20_get_clk_table
	testl	%eax, %eax
	je	LBB0_18
## %bb.72:
	movl	%eax, %ebx
	leaq	L_.str.8(%rip), %rdi
	jmp	LBB0_4
LBB0_5:
	addq	$64, %r15
	leaq	-72(%rbp), %rsi
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	_vega20_get_clk_table
	testl	%eax, %eax
	je	LBB0_6
## %bb.70:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_4
LBB0_11:
	leaq	-72(%rbp), %rsi
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	_vega20_get_clk_table
	testl	%eax, %eax
	je	LBB0_12
## %bb.71:
	movl	%eax, %ebx
	leaq	L_.str.6(%rip), %rdi
	jmp	LBB0_4
LBB0_22:
	cmpl	$0, 32(%r15)
	jle	LBB0_69
## %bb.23:
	leaq	L_.str.4(%rip), %r12
	leaq	L_.str.2(%rip), %r14
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_24:                                ## =>This Inner Loop Header: Depth=1
	movslq	%r13d, %r13
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	leaq	(%rax,%r13), %rdi
	movq	40(%r15), %rax
	movl	(%rax,%rbx,4), %ecx
	movslq	-44(%rbp), %rax
	imulq	$1374389535, %rax, %rax         ## imm = 0x51EB851F
	movq	%rax, %rdx
	shrq	$63, %rdx
	sarq	$37, %rax
	addl	%edx, %eax
	cmpl	%eax, %ecx
	movq	%r12, %r8
	leaq	L_.str.3(%rip), %rax
	cmoveq	%rax, %r8
	movq	%r14, %rsi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r13d
	incq	%rbx
	movslq	32(%r15), %rax
	cmpq	%rax, %rbx
	jl	LBB0_24
	jmp	LBB0_69
LBB0_27:
	addq	$16, %r15
	leaq	-72(%rbp), %rsi
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	_vega20_get_clk_table
	testl	%eax, %eax
	je	LBB0_28
## %bb.74:
	movl	%eax, %ebx
	leaq	L_.str.11(%rip), %rdi
LBB0_4:
	callq	_pr_err
	movl	%ebx, %r13d
LBB0_69:
	movl	%r13d, %eax
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_59:
	movslq	%r13d, %r13
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	leaq	(%rax,%r13), %rdi
	movq	-64(%rbp), %rax
	movslq	(%rax), %rax
	imulq	$274877907, %rax, %rdx          ## imm = 0x10624DD3
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$38, %rdx
	addl	%eax, %edx
	movq	(%rbx), %rax
	movq	_OD8_SETTING_UCLK_FMAX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movl	4(%rax,%rcx,4), %ecx
	leaq	L_.str.34(%rip), %rsi
                                        ## kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r13d
	movq	(%rbx), %rcx
LBB0_60:
	movq	_OD8_SETTING_GFXCLK_FREQ1@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	leaq	(%rax,%rax,2), %rax
	cmpl	$0, 8(%rcx,%rax,4)
	je	LBB0_69
## %bb.61:
	movq	_OD8_SETTING_GFXCLK_FREQ2@GOTPCREL(%rip), %r15
	movq	(%r15), %rdx
	leaq	(%rdx,%rdx,2), %rdx
	cmpl	$0, 8(%rcx,%rdx,4)
	je	LBB0_69
## %bb.62:
	movq	_OD8_SETTING_GFXCLK_FREQ3@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(%rdx,%rdx,2), %rdx
	cmpl	$0, 8(%rcx,%rdx,4)
	je	LBB0_69
## %bb.63:
	movq	_OD8_SETTING_GFXCLK_VOLTAGE1@GOTPCREL(%rip), %r12
	movq	(%r12), %rdx
	leaq	(%rdx,%rdx,2), %rdx
	cmpl	$0, 8(%rcx,%rdx,4)
	je	LBB0_69
## %bb.64:
	movq	_OD8_SETTING_GFXCLK_VOLTAGE2@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(%rdx,%rdx,2), %rdx
	cmpl	$0, 8(%rcx,%rdx,4)
	je	LBB0_69
## %bb.65:
	movq	_OD8_SETTING_GFXCLK_VOLTAGE3@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	leaq	(%rdx,%rdx,2), %rdx
	cmpl	$0, 8(%rcx,%rdx,4)
	je	LBB0_69
## %bb.66:
	movslq	%r13d, %r14
	movq	-56(%rbp), %r13                 ## 8-byte Reload
	leaq	(%r14,%r13), %rdi
	movl	(%rcx,%rax,4), %edx
	movl	4(%rcx,%rax,4), %ecx
	leaq	L_.str.35(%rip), %rsi
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r14d
	movslq	%r14d, %r14
	leaq	(%r14,%r13), %rdi
	movq	(%rbx), %rax
	movq	(%r12), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movl	(%rax,%rcx,4), %edx
	movl	4(%rax,%rcx,4), %ecx
	leaq	L_.str.36(%rip), %rsi
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r14d
	movslq	%r14d, %r14
	leaq	(%r14,%r13), %rdi
	movq	(%rbx), %rax
	movq	(%r15), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movl	(%rax,%rcx,4), %edx
	movl	4(%rax,%rcx,4), %ecx
	leaq	L_.str.37(%rip), %rsi
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r14d
	movslq	%r14d, %r14
	leaq	(%r14,%r13), %rdi
	movq	(%rbx), %rax
	movq	_OD8_SETTING_GFXCLK_VOLTAGE2@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movl	(%rax,%rcx,4), %edx
	movl	4(%rax,%rcx,4), %ecx
	leaq	L_.str.38(%rip), %rsi
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r14d
	movslq	%r14d, %r14
	leaq	(%r14,%r13), %rdi
	movq	%r13, %r15
	movq	(%rbx), %rax
	movq	_OD8_SETTING_GFXCLK_FREQ3@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movl	(%rax,%rcx,4), %edx
	movl	4(%rax,%rcx,4), %ecx
	leaq	L_.str.39(%rip), %rsi
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r14d
	movslq	%r14d, %r13
	movq	%r15, %rdi
	addq	%r13, %rdi
	movq	(%rbx), %rax
	movq	_OD8_SETTING_GFXCLK_VOLTAGE3@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movl	(%rax,%rcx,4), %edx
	movl	4(%rax,%rcx,4), %ecx
	leaq	L_.str.40(%rip), %rsi
LBB0_67:
	xorl	%eax, %eax
	callq	_sprintf
	jmp	LBB0_68
LBB0_18:
	cmpl	$0, -72(%rbp)
	jle	LBB0_69
## %bb.19:
	leaq	L_.str.3(%rip), %r12
	leaq	L_.str.4(%rip), %rbx
	leaq	L_.str.2(%rip), %r14
	xorl	%r15d, %r15d
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_20:                                ## =>This Inner Loop Header: Depth=1
	movslq	%r13d, %r13
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	leaq	(%rax,%r13), %rdi
	movq	-64(%rbp), %rax
	movslq	(%rax,%r15,4), %rax
	imulq	$274877907, %rax, %rcx          ## imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	movl	-44(%rbp), %edx
	addl	%edx, %edx
	leal	(%rdx,%rdx,4), %edx
	cmpl	%edx, %eax
	movq	%rbx, %r8
	cmoveq	%r12, %r8
	movq	%r14, %rsi
	movl	%r15d, %edx
                                        ## kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r13d
	incq	%r15
	movslq	-72(%rbp), %rax
	cmpq	%rax, %r15
	jl	LBB0_20
	jmp	LBB0_69
LBB0_6:
	cmpl	$0, -72(%rbp)
	jle	LBB0_69
## %bb.7:
	leaq	L_.str.3(%rip), %r12
	leaq	L_.str.4(%rip), %rbx
	leaq	L_.str.2(%rip), %r14
	xorl	%r15d, %r15d
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movslq	%r13d, %r13
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	leaq	(%rax,%r13), %rdi
	movq	-64(%rbp), %rax
	movslq	(%rax,%r15,4), %rax
	imulq	$274877907, %rax, %rcx          ## imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	movl	-44(%rbp), %edx
	addl	%edx, %edx
	leal	(%rdx,%rdx,4), %edx
	cmpl	%edx, %eax
	movq	%rbx, %r8
	cmoveq	%r12, %r8
	movq	%r14, %rsi
	movl	%r15d, %edx
                                        ## kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r13d
	incq	%r15
	movslq	-72(%rbp), %rax
	cmpq	%rax, %r15
	jl	LBB0_8
	jmp	LBB0_69
LBB0_12:
	cmpl	$0, -72(%rbp)
	jle	LBB0_69
## %bb.13:
	leaq	L_.str.3(%rip), %r12
	leaq	L_.str.4(%rip), %rbx
	leaq	L_.str.2(%rip), %r14
	xorl	%r15d, %r15d
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_14:                                ## =>This Inner Loop Header: Depth=1
	movslq	%r13d, %r13
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	leaq	(%rax,%r13), %rdi
	movq	-64(%rbp), %rax
	movslq	(%rax,%r15,4), %rax
	imulq	$274877907, %rax, %rcx          ## imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	movl	-44(%rbp), %edx
	addl	%edx, %edx
	leal	(%rdx,%rdx,4), %edx
	cmpl	%edx, %eax
	movq	%rbx, %r8
	cmoveq	%r12, %r8
	movq	%r14, %rsi
	movl	%r15d, %edx
                                        ## kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r13d
	incq	%r15
	movslq	-72(%rbp), %rax
	cmpq	%rax, %r15
	jl	LBB0_14
	jmp	LBB0_69
LBB0_28:
	cmpl	$0, -72(%rbp)
	jle	LBB0_69
## %bb.29:
	leaq	L_.str.3(%rip), %r12
	leaq	L_.str.4(%rip), %rbx
	leaq	L_.str.2(%rip), %r14
	xorl	%r15d, %r15d
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_30:                                ## =>This Inner Loop Header: Depth=1
	movslq	%r13d, %r13
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	leaq	(%rax,%r13), %rdi
	movq	-64(%rbp), %rax
	movslq	(%rax,%r15,4), %rax
	imulq	$274877907, %rax, %rcx          ## imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	movl	-44(%rbp), %edx
	addl	%edx, %edx
	leal	(%rdx,%rdx,4), %edx
	cmpl	%edx, %eax
	movq	%rbx, %r8
	cmoveq	%r12, %r8
	movq	%r14, %rsi
	movl	%r15d, %edx
                                        ## kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	callq	_sprintf
	addl	%eax, %r13d
	incq	%r15
	movslq	-72(%rbp), %rax
	cmpq	%rax, %r15
	jl	LBB0_30
	jmp	LBB0_69
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_31, LBB0_31-LJTI0_0
.set L0_0_set_46, LBB0_46-LJTI0_0
.set L0_0_set_40, LBB0_40-LJTI0_0
.set L0_0_set_53, LBB0_53-LJTI0_0
.set L0_0_set_43, LBB0_43-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_21, LBB0_21-LJTI0_0
.set L0_0_set_25, LBB0_25-LJTI0_0
LJTI0_0:
	.long	L0_0_set_15
	.long	L0_0_set_2
	.long	L0_0_set_31
	.long	L0_0_set_46
	.long	L0_0_set_40
	.long	L0_0_set_53
	.long	L0_0_set_43
	.long	L0_0_set_9
	.long	L0_0_set_21
	.long	L0_0_set_25
	.end_data_region
                                        ## -- End function
	.comm	_SMU_GFXCLK,4,2                 ## @SMU_GFXCLK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Attempt to get current gfx clk Failed!"

L_.str.1:                               ## @.str.1
	.asciz	"Attempt to get gfx clk levels Failed!"

L_.str.2:                               ## @.str.2
	.asciz	"%d: %uMhz %s\n"

L_.str.3:                               ## @.str.3
	.asciz	"*"

L_.str.4:                               ## @.str.4
	.space	1

	.comm	_SMU_UCLK,4,2                   ## @SMU_UCLK
L_.str.5:                               ## @.str.5
	.asciz	"Attempt to get current mclk Failed!"

L_.str.6:                               ## @.str.6
	.asciz	"Attempt to get memory clk levels Failed!"

L_.str.7:                               ## @.str.7
	.asciz	"Attempt to get current socclk Failed!"

L_.str.8:                               ## @.str.8
	.asciz	"Attempt to get socclk levels Failed!"

L_.str.9:                               ## @.str.9
	.asciz	"Attempt to get current fclk Failed!"

L_.str.10:                              ## @.str.10
	.asciz	"Attempt to get current dcefclk Failed!"

L_.str.11:                              ## @.str.11
	.asciz	"Attempt to get dcefclk levels Failed!"

	.comm	_smnPCIE_LC_SPEED_CNTL,4,2      ## @smnPCIE_LC_SPEED_CNTL
	.comm	_PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK,4,2 ## @PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK
	.comm	_PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT,4,2 ## @PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT
	.comm	_smnPCIE_LC_LINK_WIDTH_CNTL,4,2 ## @smnPCIE_LC_LINK_WIDTH_CNTL
	.comm	_PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK,4,2 ## @PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK
	.comm	_PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT,4,2 ## @PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT
	.comm	_NUM_LINK_LEVELS,4,2            ## @NUM_LINK_LEVELS
L_.str.12:                              ## @.str.12
	.asciz	"%d: %s %s %dMhz %s\n"

L_.str.13:                              ## @.str.13
	.asciz	"2.5GT/s,"

L_.str.14:                              ## @.str.14
	.asciz	"5.0GT/s,"

L_.str.15:                              ## @.str.15
	.asciz	"8.0GT/s,"

L_.str.16:                              ## @.str.16
	.asciz	"16.0GT/s,"

L_.str.17:                              ## @.str.17
	.asciz	"x1"

L_.str.18:                              ## @.str.18
	.asciz	"x2"

L_.str.19:                              ## @.str.19
	.asciz	"x4"

L_.str.20:                              ## @.str.20
	.asciz	"x8"

L_.str.21:                              ## @.str.21
	.asciz	"x12"

L_.str.22:                              ## @.str.22
	.asciz	"x16"

	.comm	_OD8_SETTING_GFXCLK_FMIN,8,3    ## @OD8_SETTING_GFXCLK_FMIN
	.comm	_OD8_SETTING_GFXCLK_FMAX,8,3    ## @OD8_SETTING_GFXCLK_FMAX
L_.str.23:                              ## @.str.23
	.asciz	"%s:\n"

L_.str.24:                              ## @.str.24
	.asciz	"OD_SCLK"

L_.str.25:                              ## @.str.25
	.asciz	"0: %10uMhz\n"

L_.str.26:                              ## @.str.26
	.asciz	"1: %10uMhz\n"

	.comm	_OD8_SETTING_UCLK_FMAX,8,3      ## @OD8_SETTING_UCLK_FMAX
L_.str.27:                              ## @.str.27
	.asciz	"OD_MCLK"

	.comm	_OD8_SETTING_GFXCLK_FREQ1,8,3   ## @OD8_SETTING_GFXCLK_FREQ1
	.comm	_OD8_SETTING_GFXCLK_FREQ2,8,3   ## @OD8_SETTING_GFXCLK_FREQ2
	.comm	_OD8_SETTING_GFXCLK_FREQ3,8,3   ## @OD8_SETTING_GFXCLK_FREQ3
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE1,8,3 ## @OD8_SETTING_GFXCLK_VOLTAGE1
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE2,8,3 ## @OD8_SETTING_GFXCLK_VOLTAGE2
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE3,8,3 ## @OD8_SETTING_GFXCLK_VOLTAGE3
L_.str.28:                              ## @.str.28
	.asciz	"OD_VDDC_CURVE"

L_.str.29:                              ## @.str.29
	.asciz	"0: %10uMhz %10dmV\n"

	.comm	_VOLTAGE_SCALE,4,2              ## @VOLTAGE_SCALE
L_.str.30:                              ## @.str.30
	.asciz	"1: %10uMhz %10dmV\n"

L_.str.31:                              ## @.str.31
	.asciz	"2: %10uMhz %10dmV\n"

L_.str.32:                              ## @.str.32
	.asciz	"OD_RANGE"

L_.str.33:                              ## @.str.33
	.asciz	"SCLK: %7uMhz %10uMhz\n"

L_.str.34:                              ## @.str.34
	.asciz	"MCLK: %7uMhz %10uMhz\n"

L_.str.35:                              ## @.str.35
	.asciz	"VDDC_CURVE_SCLK[0]: %7uMhz %10uMhz\n"

L_.str.36:                              ## @.str.36
	.asciz	"VDDC_CURVE_VOLT[0]: %7dmV %11dmV\n"

L_.str.37:                              ## @.str.37
	.asciz	"VDDC_CURVE_SCLK[1]: %7uMhz %10uMhz\n"

L_.str.38:                              ## @.str.38
	.asciz	"VDDC_CURVE_VOLT[1]: %7dmV %11dmV\n"

L_.str.39:                              ## @.str.39
	.asciz	"VDDC_CURVE_SCLK[2]: %7uMhz %10uMhz\n"

L_.str.40:                              ## @.str.40
	.asciz	"VDDC_CURVE_VOLT[2]: %7dmV %11dmV\n"

	.no_dead_strip	_vega20_print_clk_levels
	.section	__TEXT,__const
	.p2align	2                               ## @reltable.vega20_print_clk_levels
l_reltable.vega20_print_clk_levels:
	.long	L_.str.13-l_reltable.vega20_print_clk_levels
	.long	L_.str.14-l_reltable.vega20_print_clk_levels
	.long	L_.str.15-l_reltable.vega20_print_clk_levels

	.p2align	2                               ## @reltable.vega20_print_clk_levels.42
l_reltable.vega20_print_clk_levels.42:
	.long	L_.str.17-l_reltable.vega20_print_clk_levels.42
	.long	L_.str.18-l_reltable.vega20_print_clk_levels.42
	.long	L_.str.19-l_reltable.vega20_print_clk_levels.42
	.long	L_.str.20-l_reltable.vega20_print_clk_levels.42
	.long	L_.str.21-l_reltable.vega20_print_clk_levels.42

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vega20_print_clk_levels
_vega20_print_clk_levels:               ; @vega20_print_clk_levels
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #160
	.cfi_def_cfa_offset 160
	stp	x28, x27, [sp, #64]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #80]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #96]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #112]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #128]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #144]            ; 16-byte Folded Spill
	add	x29, sp, #144
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	sub	w8, w1, #128
	cmp	w8, #9
	b.hi	LBB0_71
; %bb.1:
	mov	x19, x2
	mov	x22, x0
	ldr	x24, [x0, #24]
	ldp	x23, x21, [x0]
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrh	w11, [x9, x8, lsl #1]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
	add	x2, sp, #60
	mov	x0, x22
	mov	w1, #128
	bl	_smu_get_current_clk_freq
	cbz	w0, LBB0_40
; %bb.3:
	mov	x20, x0
Lloh2:
	adrp	x0, l_.str.7@PAGE
Lloh3:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	_pr_err
	b	LBB0_72
LBB0_4:
Lloh4:
	adrp	x8, _SMU_GFXCLK@GOTPAGE
Lloh5:
	ldr	x8, [x8, _SMU_GFXCLK@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
	add	x2, sp, #60
	mov	x0, x22
	bl	_smu_get_current_clk_freq
	cbz	w0, LBB0_42
; %bb.5:
	mov	x20, x0
Lloh7:
	adrp	x0, l_.str@PAGE
Lloh8:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_err
	b	LBB0_72
LBB0_6:
	ldr	x22, [x22, #16]
Lloh9:
	adrp	x8, _smnPCIE_LC_SPEED_CNTL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _smnPCIE_LC_SPEED_CNTL@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	_RREG32_PCIE
	mov	x21, x0
Lloh12:
	adrp	x8, _PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w26, [x8]
Lloh15:
	adrp	x8, _PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT@GOTPAGEOFF]
Lloh17:
	ldr	w25, [x8]
Lloh18:
	adrp	x8, _smnPCIE_LC_LINK_WIDTH_CNTL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _smnPCIE_LC_LINK_WIDTH_CNTL@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	bl	_RREG32_PCIE
Lloh21:
	adrp	x23, _NUM_LINK_LEVELS@GOTPAGE
Lloh22:
	ldr	x23, [x23, _NUM_LINK_LEVELS@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	w8, #1
	b.lt	LBB0_71
; %bb.7:
	mov	x24, #0
	mov	w20, #0
	and	w8, w26, w21
	asr	w25, w8, w25
Lloh23:
	adrp	x8, _PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh26:
	adrp	x9, _PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT@GOTPAGE
Lloh27:
	ldr	x9, [x9, _PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	asr	w26, w8, w9
Lloh29:
	adrp	x27, l_.str.4@PAGE
Lloh30:
	add	x27, x27, l_.str.4@PAGEOFF
Lloh31:
	adrp	x28, l_.str.3@PAGE
Lloh32:
	add	x28, x28, l_.str.3@PAGEOFF
Lloh33:
	adrp	x21, l_.str.12@PAGE
Lloh34:
	add	x21, x21, l_.str.12@PAGEOFF
	b	LBB0_10
LBB0_8:                                 ;   in Loop: Header=BB0_10 Depth=1
Lloh35:
	adrp	x12, l_switch.table.vega20_print_clk_levels.41@PAGE
Lloh36:
	add	x12, x12, l_switch.table.vega20_print_clk_levels.41@PAGEOFF
	ldr	x10, [x12, w10, sxtw #3]
LBB0_9:                                 ;   in Loop: Header=BB0_10 Depth=1
	add	x0, x19, w20, sxtw
	ldr	x12, [x22, #16]
	cmp	w26, w11
	ccmp	w25, w8, #0, eq
	csel	x8, x28, x27, eq
	ldr	w11, [x12, x24, lsl #2]
	stp	x11, x8, [sp, #24]
	stp	x9, x10, [sp, #8]
	str	x24, [sp]
	mov	x1, x21
	bl	_sprintf
	add	w20, w0, w20
	add	x24, x24, #1
	ldrsw	x8, [x23]
	cmp	x24, x8
	b.ge	LBB0_72
LBB0_10:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x22]
	ldrsw	x8, [x8, x24, lsl #2]
	cmp	w8, #3
	b.hs	LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_10 Depth=1
Lloh37:
	adrp	x9, l_switch.table.vega20_print_clk_levels@PAGE
Lloh38:
	add	x9, x9, l_switch.table.vega20_print_clk_levels@PAGEOFF
	ldr	x9, [x9, x8, lsl #3]
	b	LBB0_13
LBB0_12:                                ;   in Loop: Header=BB0_10 Depth=1
	cmp	w8, #3
Lloh39:
	adrp	x9, l_.str.16@PAGE
Lloh40:
	add	x9, x9, l_.str.16@PAGEOFF
	csel	x9, x9, x27, eq
LBB0_13:                                ;   in Loop: Header=BB0_10 Depth=1
	ldr	x10, [x22, #8]
	ldr	w11, [x10, x24, lsl #2]
	sub	w10, w11, #1
	cmp	w10, #5
	b.lo	LBB0_8
; %bb.14:                               ;   in Loop: Header=BB0_10 Depth=1
	cmp	w11, #6
Lloh41:
	adrp	x10, l_.str.22@PAGE
Lloh42:
	add	x10, x10, l_.str.22@PAGEOFF
	csel	x10, x10, x27, eq
	b	LBB0_9
LBB0_15:
	ldr	x8, [x23]
Lloh43:
	adrp	x9, _OD8_SETTING_GFXCLK_FREQ1@GOTPAGE
Lloh44:
	ldr	x9, [x9, _OD8_SETTING_GFXCLK_FREQ1@GOTPAGEOFF]
Lloh45:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x9, x9, x10, x8
	ldr	w9, [x9, #8]
	cbz	w9, LBB0_71
; %bb.16:
Lloh46:
	adrp	x9, _OD8_SETTING_GFXCLK_FREQ2@GOTPAGE
Lloh47:
	ldr	x9, [x9, _OD8_SETTING_GFXCLK_FREQ2@GOTPAGEOFF]
Lloh48:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x9, x9, x10, x8
	ldr	w9, [x9, #8]
	cbz	w9, LBB0_71
; %bb.17:
Lloh49:
	adrp	x9, _OD8_SETTING_GFXCLK_FREQ3@GOTPAGE
Lloh50:
	ldr	x9, [x9, _OD8_SETTING_GFXCLK_FREQ3@GOTPAGEOFF]
Lloh51:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x9, x9, x10, x8
	ldr	w9, [x9, #8]
	cbz	w9, LBB0_71
; %bb.18:
Lloh52:
	adrp	x9, _OD8_SETTING_GFXCLK_VOLTAGE1@GOTPAGE
Lloh53:
	ldr	x9, [x9, _OD8_SETTING_GFXCLK_VOLTAGE1@GOTPAGEOFF]
Lloh54:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x9, x9, x10, x8
	ldr	w9, [x9, #8]
	cbz	w9, LBB0_71
; %bb.19:
Lloh55:
	adrp	x9, _OD8_SETTING_GFXCLK_VOLTAGE2@GOTPAGE
Lloh56:
	ldr	x9, [x9, _OD8_SETTING_GFXCLK_VOLTAGE2@GOTPAGEOFF]
Lloh57:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x9, x9, x10, x8
	ldr	w9, [x9, #8]
	cbz	w9, LBB0_71
; %bb.20:
Lloh58:
	adrp	x9, _OD8_SETTING_GFXCLK_VOLTAGE3@GOTPAGE
Lloh59:
	ldr	x9, [x9, _OD8_SETTING_GFXCLK_VOLTAGE3@GOTPAGEOFF]
Lloh60:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x8, x9, x10, x8
	ldr	w8, [x8, #8]
	cbz	w8, LBB0_71
; %bb.21:
Lloh61:
	adrp	x8, l_.str.28@PAGE
Lloh62:
	add	x8, x8, l_.str.28@PAGEOFF
	str	x8, [sp]
Lloh63:
	adrp	x1, l_.str.23@PAGE
Lloh64:
	add	x1, x1, l_.str.23@PAGEOFF
	mov	x0, x19
	bl	_sprintf
                                        ; kill: def $w0 killed $w0 def $x0
	sxtw	x20, w0
	add	x0, x19, x20
Lloh65:
	adrp	x21, _VOLTAGE_SCALE@GOTPAGE
Lloh66:
	ldr	x21, [x21, _VOLTAGE_SCALE@GOTPAGEOFF]
	ldr	w8, [x21]
	ldp	w10, w9, [x24, #12]
	sdiv	w8, w9, w8
	stp	x10, x8, [sp]
Lloh67:
	adrp	x1, l_.str.29@PAGE
Lloh68:
	add	x1, x1, l_.str.29@PAGEOFF
	bl	_sprintf
	add	x20, x20, w0, sxtw
	add	x0, x19, x20
	ldr	w8, [x21]
	ldp	w10, w9, [x24, #20]
	sdiv	w8, w9, w8
	stp	x10, x8, [sp]
Lloh69:
	adrp	x1, l_.str.30@PAGE
Lloh70:
	add	x1, x1, l_.str.30@PAGEOFF
	bl	_sprintf
	add	w20, w0, w20
	add	x0, x19, w20, sxtw
	ldr	w8, [x21]
	ldp	w10, w9, [x24, #28]
	sdiv	w8, w9, w8
	stp	x10, x8, [sp]
Lloh71:
	adrp	x1, l_.str.31@PAGE
Lloh72:
	add	x1, x1, l_.str.31@PAGEOFF
	b	LBB0_33
LBB0_22:
	ldr	x8, [x23]
Lloh73:
	adrp	x9, _OD8_SETTING_GFXCLK_FMIN@GOTPAGE
Lloh74:
	ldr	x9, [x9, _OD8_SETTING_GFXCLK_FMIN@GOTPAGEOFF]
Lloh75:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x9, x9, x10, x8
	ldr	w9, [x9, #8]
	cbz	w9, LBB0_71
; %bb.23:
Lloh76:
	adrp	x9, _OD8_SETTING_GFXCLK_FMAX@GOTPAGE
Lloh77:
	ldr	x9, [x9, _OD8_SETTING_GFXCLK_FMAX@GOTPAGEOFF]
Lloh78:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x8, x9, x10, x8
	ldr	w8, [x8, #8]
	cbz	w8, LBB0_71
; %bb.24:
Lloh79:
	adrp	x8, l_.str.24@PAGE
Lloh80:
	add	x8, x8, l_.str.24@PAGEOFF
	str	x8, [sp]
Lloh81:
	adrp	x1, l_.str.23@PAGE
Lloh82:
	add	x1, x1, l_.str.23@PAGEOFF
	mov	x0, x19
	bl	_sprintf
                                        ; kill: def $w0 killed $w0 def $x0
	sxtw	x20, w0
	add	x0, x19, x20
	ldr	w8, [x24]
	str	x8, [sp]
Lloh83:
	adrp	x1, l_.str.25@PAGE
Lloh84:
	add	x1, x1, l_.str.25@PAGEOFF
	bl	_sprintf
	add	x20, x20, w0, sxtw
	add	x0, x19, x20
	ldr	w8, [x24, #4]
	str	x8, [sp]
Lloh85:
	adrp	x1, l_.str.26@PAGE
Lloh86:
	add	x1, x1, l_.str.26@PAGEOFF
	bl	_sprintf
	add	w20, w0, w20
	b	LBB0_72
LBB0_25:
Lloh87:
	adrp	x8, l_.str.32@PAGE
Lloh88:
	add	x8, x8, l_.str.32@PAGEOFF
	str	x8, [sp]
Lloh89:
	adrp	x1, l_.str.23@PAGE
Lloh90:
	add	x1, x1, l_.str.23@PAGEOFF
	mov	x0, x19
	bl	_sprintf
	mov	x20, x0
	ldr	x8, [x23]
Lloh91:
	adrp	x9, _OD8_SETTING_GFXCLK_FMIN@GOTPAGE
Lloh92:
	ldr	x9, [x9, _OD8_SETTING_GFXCLK_FMIN@GOTPAGEOFF]
Lloh93:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x10, x9, x10, x8
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_28
; %bb.26:
Lloh94:
	adrp	x10, _OD8_SETTING_GFXCLK_FMAX@GOTPAGE
Lloh95:
	ldr	x10, [x10, _OD8_SETTING_GFXCLK_FMAX@GOTPAGEOFF]
Lloh96:
	ldr	x10, [x10]
	mov	w11, #12
	madd	x11, x10, x11, x8
	ldr	w11, [x11, #8]
	cbz	w11, LBB0_28
; %bb.27:
	add	x0, x19, w20, sxtw
	mov	w11, #12
	mul	x9, x9, x11
	madd	x10, x10, x11, x8
	ldr	w8, [x8, x9]
	ldr	w9, [x10, #4]
	stp	x8, x9, [sp]
Lloh97:
	adrp	x1, l_.str.33@PAGE
Lloh98:
	add	x1, x1, l_.str.33@PAGEOFF
	bl	_sprintf
	add	w20, w0, w20
	ldr	x8, [x23]
LBB0_28:
Lloh99:
	adrp	x24, _OD8_SETTING_UCLK_FMAX@GOTPAGE
Lloh100:
	ldr	x24, [x24, _OD8_SETTING_UCLK_FMAX@GOTPAGEOFF]
	ldr	x9, [x24]
	mov	w10, #12
	madd	x9, x9, x10, x8
	ldr	w9, [x9, #8]
	cbz	w9, LBB0_52
; %bb.29:
	add	x1, sp, #40
	mov	x0, x22
	mov	x2, x21
	bl	_vega20_get_clk_table
	cbz	w0, LBB0_51
; %bb.30:
	mov	x21, x0
Lloh101:
	adrp	x0, l_.str.6@PAGE
Lloh102:
	add	x0, x0, l_.str.6@PAGEOFF
	bl	_pr_err
	mov	x20, x21
	b	LBB0_72
LBB0_31:
	ldr	x8, [x23]
Lloh103:
	adrp	x9, _OD8_SETTING_UCLK_FMAX@GOTPAGE
Lloh104:
	ldr	x9, [x9, _OD8_SETTING_UCLK_FMAX@GOTPAGEOFF]
Lloh105:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x8, x9, x10, x8
	ldr	w8, [x8, #8]
	cbz	w8, LBB0_71
; %bb.32:
Lloh106:
	adrp	x8, l_.str.27@PAGE
Lloh107:
	add	x8, x8, l_.str.27@PAGEOFF
	str	x8, [sp]
Lloh108:
	adrp	x1, l_.str.23@PAGE
Lloh109:
	add	x1, x1, l_.str.23@PAGEOFF
	mov	x0, x19
	bl	_sprintf
	mov	x20, x0
	add	x0, x19, w0, sxtw
	ldr	w8, [x24, #8]
	str	x8, [sp]
Lloh110:
	adrp	x1, l_.str.26@PAGE
Lloh111:
	add	x1, x1, l_.str.26@PAGEOFF
LBB0_33:
	bl	_sprintf
	add	w20, w0, w20
	b	LBB0_72
LBB0_34:
Lloh112:
	adrp	x8, _SMU_UCLK@GOTPAGE
Lloh113:
	ldr	x8, [x8, _SMU_UCLK@GOTPAGEOFF]
Lloh114:
	ldr	w1, [x8]
	add	x2, sp, #60
	mov	x0, x22
	bl	_smu_get_current_clk_freq
	cbz	w0, LBB0_44
; %bb.35:
	mov	x20, x0
Lloh115:
	adrp	x0, l_.str.5@PAGE
Lloh116:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_pr_err
	b	LBB0_72
LBB0_36:
	add	x2, sp, #60
	mov	x0, x22
	mov	w1, #136
	bl	_smu_get_current_clk_freq
	cbz	w0, LBB0_46
; %bb.37:
	mov	x20, x0
Lloh117:
	adrp	x0, l_.str.9@PAGE
Lloh118:
	add	x0, x0, l_.str.9@PAGEOFF
	bl	_pr_err
	b	LBB0_72
LBB0_38:
	add	x2, sp, #60
	mov	x0, x22
	mov	w1, #137
	bl	_smu_get_current_clk_freq
	cbz	w0, LBB0_49
; %bb.39:
	mov	x20, x0
Lloh119:
	adrp	x0, l_.str.10@PAGE
Lloh120:
	add	x0, x0, l_.str.10@PAGEOFF
	bl	_pr_err
	b	LBB0_72
LBB0_40:
	add	x2, x21, #48
	add	x1, sp, #40
	mov	x0, x22
	bl	_vega20_get_clk_table
	cbz	w0, LBB0_59
; %bb.41:
	mov	x20, x0
Lloh121:
	adrp	x0, l_.str.8@PAGE
Lloh122:
	add	x0, x0, l_.str.8@PAGEOFF
	bl	_pr_err
	b	LBB0_72
LBB0_42:
	add	x2, x21, #64
	add	x1, sp, #40
	mov	x0, x22
	bl	_vega20_get_clk_table
	cbz	w0, LBB0_62
; %bb.43:
	mov	x20, x0
Lloh123:
	adrp	x0, l_.str.1@PAGE
Lloh124:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_pr_err
	b	LBB0_72
LBB0_44:
	add	x1, sp, #40
	mov	x0, x22
	mov	x2, x21
	bl	_vega20_get_clk_table
	cbz	w0, LBB0_65
; %bb.45:
	mov	x20, x0
Lloh125:
	adrp	x0, l_.str.6@PAGE
Lloh126:
	add	x0, x0, l_.str.6@PAGEOFF
	bl	_pr_err
	b	LBB0_72
LBB0_46:
	ldr	w8, [x21, #32]
	cmp	w8, #1
	b.lt	LBB0_71
; %bb.47:
	mov	x23, #0
	mov	w20, #0
	mov	w24, #34079
	movk	w24, #20971, lsl #16
Lloh127:
	adrp	x25, l_.str.4@PAGE
Lloh128:
	add	x25, x25, l_.str.4@PAGEOFF
Lloh129:
	adrp	x26, l_.str.3@PAGE
Lloh130:
	add	x26, x26, l_.str.3@PAGEOFF
Lloh131:
	adrp	x22, l_.str.2@PAGE
Lloh132:
	add	x22, x22, l_.str.2@PAGEOFF
LBB0_48:                                ; =>This Inner Loop Header: Depth=1
	add	x0, x19, w20, sxtw
	ldr	x8, [x21, #40]
	ldr	w8, [x8, x23, lsl #2]
	ldrsw	x9, [sp, #60]
	mul	x9, x9, x24
	lsr	x10, x9, #32
	lsr	x9, x9, #63
	add	w9, w9, w10, asr #5
	cmp	w8, w9
	csel	x9, x26, x25, eq
	stp	x23, x8, [sp]
	str	x9, [sp, #16]
	mov	x1, x22
	bl	_sprintf
	add	w20, w0, w20
	add	x23, x23, #1
	ldrsw	x8, [x21, #32]
	cmp	x23, x8
	b.lt	LBB0_48
	b	LBB0_72
LBB0_49:
	add	x2, x21, #16
	add	x1, sp, #40
	mov	x0, x22
	bl	_vega20_get_clk_table
	cbz	w0, LBB0_68
; %bb.50:
	mov	x20, x0
Lloh133:
	adrp	x0, l_.str.11@PAGE
Lloh134:
	add	x0, x0, l_.str.11@PAGEOFF
	bl	_pr_err
	b	LBB0_72
LBB0_51:
	add	x0, x19, w20, sxtw
	ldr	x8, [sp, #48]
	ldrsw	x8, [x8]
	mov	w9, #19923
	movk	w9, #4194, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #38
	add	w8, w8, w9
	ldr	x9, [x23]
	ldr	x10, [x24]
	mov	w11, #12
	madd	x9, x10, x11, x9
	ldr	w9, [x9, #4]
	stp	x8, x9, [sp]
Lloh135:
	adrp	x1, l_.str.34@PAGE
Lloh136:
	add	x1, x1, l_.str.34@PAGEOFF
	bl	_sprintf
	add	w20, w0, w20
	ldr	x8, [x23]
LBB0_52:
Lloh137:
	adrp	x9, _OD8_SETTING_GFXCLK_FREQ1@GOTPAGE
Lloh138:
	ldr	x9, [x9, _OD8_SETTING_GFXCLK_FREQ1@GOTPAGEOFF]
Lloh139:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x10, x9, x10, x8
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_72
; %bb.53:
Lloh140:
	adrp	x24, _OD8_SETTING_GFXCLK_FREQ2@GOTPAGE
Lloh141:
	ldr	x24, [x24, _OD8_SETTING_GFXCLK_FREQ2@GOTPAGEOFF]
	ldr	x10, [x24]
	mov	w11, #12
	madd	x10, x10, x11, x8
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_72
; %bb.54:
Lloh142:
	adrp	x21, _OD8_SETTING_GFXCLK_FREQ3@GOTPAGE
Lloh143:
	ldr	x21, [x21, _OD8_SETTING_GFXCLK_FREQ3@GOTPAGEOFF]
	ldr	x10, [x21]
	mov	w11, #12
	madd	x10, x10, x11, x8
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_72
; %bb.55:
Lloh144:
	adrp	x26, _OD8_SETTING_GFXCLK_VOLTAGE1@GOTPAGE
Lloh145:
	ldr	x26, [x26, _OD8_SETTING_GFXCLK_VOLTAGE1@GOTPAGEOFF]
	ldr	x10, [x26]
	mov	w11, #12
	madd	x10, x10, x11, x8
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_72
; %bb.56:
Lloh146:
	adrp	x25, _OD8_SETTING_GFXCLK_VOLTAGE2@GOTPAGE
Lloh147:
	ldr	x25, [x25, _OD8_SETTING_GFXCLK_VOLTAGE2@GOTPAGEOFF]
	ldr	x10, [x25]
	mov	w11, #12
	madd	x10, x10, x11, x8
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_72
; %bb.57:
Lloh148:
	adrp	x22, _OD8_SETTING_GFXCLK_VOLTAGE3@GOTPAGE
Lloh149:
	ldr	x22, [x22, _OD8_SETTING_GFXCLK_VOLTAGE3@GOTPAGEOFF]
	ldr	x10, [x22]
	mov	w11, #12
	madd	x10, x10, x11, x8
	ldr	w10, [x10, #8]
	cbz	w10, LBB0_72
; %bb.58:
	sxtw	x27, w20
	add	x0, x19, x27
	mov	w20, #12
	madd	x8, x9, x20, x8
	ldp	w9, w8, [x8]
	stp	x9, x8, [sp]
Lloh150:
	adrp	x1, l_.str.35@PAGE
Lloh151:
	add	x1, x1, l_.str.35@PAGEOFF
	bl	_sprintf
	add	x27, x27, w0, sxtw
	add	x0, x19, x27
	ldr	x8, [x23]
	ldr	x9, [x26]
	madd	x8, x9, x20, x8
	ldp	w9, w8, [x8]
	stp	x9, x8, [sp]
Lloh152:
	adrp	x1, l_.str.36@PAGE
Lloh153:
	add	x1, x1, l_.str.36@PAGEOFF
	bl	_sprintf
	add	w26, w0, w27
	add	x0, x19, w26, sxtw
	ldr	x8, [x23]
	ldr	x9, [x24]
	madd	x8, x9, x20, x8
	ldp	w9, w8, [x8]
	stp	x9, x8, [sp]
Lloh154:
	adrp	x1, l_.str.37@PAGE
Lloh155:
	add	x1, x1, l_.str.37@PAGEOFF
	bl	_sprintf
	add	w24, w0, w26
	add	x0, x19, w24, sxtw
	ldr	x8, [x23]
	ldr	x9, [x25]
	madd	x8, x9, x20, x8
	ldp	w9, w8, [x8]
	stp	x9, x8, [sp]
Lloh156:
	adrp	x1, l_.str.38@PAGE
Lloh157:
	add	x1, x1, l_.str.38@PAGEOFF
	bl	_sprintf
	add	w24, w0, w24
	add	x0, x19, w24, sxtw
	ldr	x8, [x23]
	ldr	x9, [x21]
	madd	x8, x9, x20, x8
	ldp	w9, w8, [x8]
	stp	x9, x8, [sp]
Lloh158:
	adrp	x1, l_.str.39@PAGE
Lloh159:
	add	x1, x1, l_.str.39@PAGEOFF
	bl	_sprintf
	add	w21, w0, w24
	add	x0, x19, w21, sxtw
	ldr	x8, [x23]
	ldr	x9, [x22]
	madd	x8, x9, x20, x8
	ldp	w9, w8, [x8]
	stp	x9, x8, [sp]
Lloh160:
	adrp	x1, l_.str.40@PAGE
Lloh161:
	add	x1, x1, l_.str.40@PAGEOFF
	bl	_sprintf
	add	w20, w0, w21
	b	LBB0_72
LBB0_59:
	ldr	w8, [sp, #40]
	cmp	w8, #1
	b.lt	LBB0_71
; %bb.60:
	mov	x22, #0
	mov	w20, #0
	mov	w23, #19923
	movk	w23, #4194, lsl #16
Lloh162:
	adrp	x24, l_.str.4@PAGE
Lloh163:
	add	x24, x24, l_.str.4@PAGEOFF
Lloh164:
	adrp	x25, l_.str.3@PAGE
Lloh165:
	add	x25, x25, l_.str.3@PAGEOFF
Lloh166:
	adrp	x21, l_.str.2@PAGE
Lloh167:
	add	x21, x21, l_.str.2@PAGEOFF
LBB0_61:                                ; =>This Inner Loop Header: Depth=1
	add	x0, x19, w20, sxtw
	ldr	x8, [sp, #48]
	ldrsw	x8, [x8, x22, lsl #2]
	mul	x9, x8, x23
	lsr	x10, x9, #63
	asr	x9, x9, #38
	add	w9, w9, w10
	ldr	w10, [sp, #60]
	add	w10, w10, w10, lsl #2
	cmp	w8, w10, lsl #1
	csel	x8, x25, x24, eq
	stp	x9, x8, [sp, #8]
	str	x22, [sp]
	mov	x1, x21
	bl	_sprintf
	add	w20, w0, w20
	add	x22, x22, #1
	ldrsw	x8, [sp, #40]
	cmp	x22, x8
	b.lt	LBB0_61
	b	LBB0_72
LBB0_62:
	ldr	w8, [sp, #40]
	cmp	w8, #1
	b.lt	LBB0_71
; %bb.63:
	mov	x22, #0
	mov	w20, #0
	mov	w23, #19923
	movk	w23, #4194, lsl #16
Lloh168:
	adrp	x24, l_.str.4@PAGE
Lloh169:
	add	x24, x24, l_.str.4@PAGEOFF
Lloh170:
	adrp	x25, l_.str.3@PAGE
Lloh171:
	add	x25, x25, l_.str.3@PAGEOFF
Lloh172:
	adrp	x21, l_.str.2@PAGE
Lloh173:
	add	x21, x21, l_.str.2@PAGEOFF
LBB0_64:                                ; =>This Inner Loop Header: Depth=1
	add	x0, x19, w20, sxtw
	ldr	x8, [sp, #48]
	ldrsw	x8, [x8, x22, lsl #2]
	mul	x9, x8, x23
	lsr	x10, x9, #63
	asr	x9, x9, #38
	add	w9, w9, w10
	ldr	w10, [sp, #60]
	add	w10, w10, w10, lsl #2
	cmp	w8, w10, lsl #1
	csel	x8, x25, x24, eq
	stp	x9, x8, [sp, #8]
	str	x22, [sp]
	mov	x1, x21
	bl	_sprintf
	add	w20, w0, w20
	add	x22, x22, #1
	ldrsw	x8, [sp, #40]
	cmp	x22, x8
	b.lt	LBB0_64
	b	LBB0_72
LBB0_65:
	ldr	w8, [sp, #40]
	cmp	w8, #1
	b.lt	LBB0_71
; %bb.66:
	mov	x22, #0
	mov	w20, #0
	mov	w23, #19923
	movk	w23, #4194, lsl #16
Lloh174:
	adrp	x24, l_.str.4@PAGE
Lloh175:
	add	x24, x24, l_.str.4@PAGEOFF
Lloh176:
	adrp	x25, l_.str.3@PAGE
Lloh177:
	add	x25, x25, l_.str.3@PAGEOFF
Lloh178:
	adrp	x21, l_.str.2@PAGE
Lloh179:
	add	x21, x21, l_.str.2@PAGEOFF
LBB0_67:                                ; =>This Inner Loop Header: Depth=1
	add	x0, x19, w20, sxtw
	ldr	x8, [sp, #48]
	ldrsw	x8, [x8, x22, lsl #2]
	mul	x9, x8, x23
	lsr	x10, x9, #63
	asr	x9, x9, #38
	add	w9, w9, w10
	ldr	w10, [sp, #60]
	add	w10, w10, w10, lsl #2
	cmp	w8, w10, lsl #1
	csel	x8, x25, x24, eq
	stp	x9, x8, [sp, #8]
	str	x22, [sp]
	mov	x1, x21
	bl	_sprintf
	add	w20, w0, w20
	add	x22, x22, #1
	ldrsw	x8, [sp, #40]
	cmp	x22, x8
	b.lt	LBB0_67
	b	LBB0_72
LBB0_68:
	ldr	w8, [sp, #40]
	cmp	w8, #1
	b.lt	LBB0_71
; %bb.69:
	mov	x22, #0
	mov	w20, #0
	mov	w23, #19923
	movk	w23, #4194, lsl #16
Lloh180:
	adrp	x24, l_.str.4@PAGE
Lloh181:
	add	x24, x24, l_.str.4@PAGEOFF
Lloh182:
	adrp	x25, l_.str.3@PAGE
Lloh183:
	add	x25, x25, l_.str.3@PAGEOFF
Lloh184:
	adrp	x21, l_.str.2@PAGE
Lloh185:
	add	x21, x21, l_.str.2@PAGEOFF
LBB0_70:                                ; =>This Inner Loop Header: Depth=1
	add	x0, x19, w20, sxtw
	ldr	x8, [sp, #48]
	ldrsw	x8, [x8, x22, lsl #2]
	mul	x9, x8, x23
	lsr	x10, x9, #63
	asr	x9, x9, #38
	add	w9, w9, w10
	ldr	w10, [sp, #60]
	add	w10, w10, w10, lsl #2
	cmp	w8, w10, lsl #1
	csel	x8, x25, x24, eq
	stp	x9, x8, [sp, #8]
	str	x22, [sp]
	mov	x1, x21
	bl	_sprintf
	add	w20, w0, w20
	add	x22, x22, #1
	ldrsw	x8, [sp, #40]
	cmp	x22, x8
	b.lt	LBB0_70
	b	LBB0_72
LBB0_71:
	mov	w20, #0
LBB0_72:
	mov	x0, x20
	ldp	x29, x30, [sp, #144]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #128]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #112]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #96]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #80]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #160
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpAdd	Lloh31, Lloh32
	.loh AdrpAdd	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpAdd	Lloh39, Lloh40
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpAdd	Lloh71, Lloh72
	.loh AdrpAdd	Lloh69, Lloh70
	.loh AdrpAdd	Lloh67, Lloh68
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpAdd	Lloh63, Lloh64
	.loh AdrpAdd	Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpAdd	Lloh85, Lloh86
	.loh AdrpAdd	Lloh83, Lloh84
	.loh AdrpAdd	Lloh81, Lloh82
	.loh AdrpAdd	Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpAdd	Lloh89, Lloh90
	.loh AdrpAdd	Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpAdd	Lloh97, Lloh98
	.loh AdrpLdrGot	Lloh99, Lloh100
	.loh AdrpAdd	Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpAdd	Lloh110, Lloh111
	.loh AdrpAdd	Lloh108, Lloh109
	.loh AdrpAdd	Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh112, Lloh113, Lloh114
	.loh AdrpAdd	Lloh115, Lloh116
	.loh AdrpAdd	Lloh117, Lloh118
	.loh AdrpAdd	Lloh119, Lloh120
	.loh AdrpAdd	Lloh121, Lloh122
	.loh AdrpAdd	Lloh123, Lloh124
	.loh AdrpAdd	Lloh125, Lloh126
	.loh AdrpAdd	Lloh131, Lloh132
	.loh AdrpAdd	Lloh129, Lloh130
	.loh AdrpAdd	Lloh127, Lloh128
	.loh AdrpAdd	Lloh133, Lloh134
	.loh AdrpAdd	Lloh135, Lloh136
	.loh AdrpLdrGotLdr	Lloh137, Lloh138, Lloh139
	.loh AdrpLdrGot	Lloh140, Lloh141
	.loh AdrpLdrGot	Lloh142, Lloh143
	.loh AdrpLdrGot	Lloh144, Lloh145
	.loh AdrpLdrGot	Lloh146, Lloh147
	.loh AdrpLdrGot	Lloh148, Lloh149
	.loh AdrpAdd	Lloh160, Lloh161
	.loh AdrpAdd	Lloh158, Lloh159
	.loh AdrpAdd	Lloh156, Lloh157
	.loh AdrpAdd	Lloh154, Lloh155
	.loh AdrpAdd	Lloh152, Lloh153
	.loh AdrpAdd	Lloh150, Lloh151
	.loh AdrpAdd	Lloh166, Lloh167
	.loh AdrpAdd	Lloh164, Lloh165
	.loh AdrpAdd	Lloh162, Lloh163
	.loh AdrpAdd	Lloh172, Lloh173
	.loh AdrpAdd	Lloh170, Lloh171
	.loh AdrpAdd	Lloh168, Lloh169
	.loh AdrpAdd	Lloh178, Lloh179
	.loh AdrpAdd	Lloh176, Lloh177
	.loh AdrpAdd	Lloh174, Lloh175
	.loh AdrpAdd	Lloh184, Lloh185
	.loh AdrpAdd	Lloh182, Lloh183
	.loh AdrpAdd	Lloh180, Lloh181
	.cfi_endproc
	.section	__TEXT,__const
	.p2align	1
lJTI0_0:
	.short	(LBB0_2-LBB0_2)>>2
	.short	(LBB0_4-LBB0_2)>>2
	.short	(LBB0_6-LBB0_2)>>2
	.short	(LBB0_15-LBB0_2)>>2
	.short	(LBB0_22-LBB0_2)>>2
	.short	(LBB0_25-LBB0_2)>>2
	.short	(LBB0_31-LBB0_2)>>2
	.short	(LBB0_34-LBB0_2)>>2
	.short	(LBB0_36-LBB0_2)>>2
	.short	(LBB0_38-LBB0_2)>>2
                                        ; -- End function
	.comm	_SMU_GFXCLK,4,2                 ; @SMU_GFXCLK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Attempt to get current gfx clk Failed!"

l_.str.1:                               ; @.str.1
	.asciz	"Attempt to get gfx clk levels Failed!"

l_.str.2:                               ; @.str.2
	.asciz	"%d: %uMhz %s\n"

l_.str.3:                               ; @.str.3
	.asciz	"*"

l_.str.4:                               ; @.str.4
	.space	1

	.comm	_SMU_UCLK,4,2                   ; @SMU_UCLK
l_.str.5:                               ; @.str.5
	.asciz	"Attempt to get current mclk Failed!"

l_.str.6:                               ; @.str.6
	.asciz	"Attempt to get memory clk levels Failed!"

l_.str.7:                               ; @.str.7
	.asciz	"Attempt to get current socclk Failed!"

l_.str.8:                               ; @.str.8
	.asciz	"Attempt to get socclk levels Failed!"

l_.str.9:                               ; @.str.9
	.asciz	"Attempt to get current fclk Failed!"

l_.str.10:                              ; @.str.10
	.asciz	"Attempt to get current dcefclk Failed!"

l_.str.11:                              ; @.str.11
	.asciz	"Attempt to get dcefclk levels Failed!"

	.comm	_smnPCIE_LC_SPEED_CNTL,4,2      ; @smnPCIE_LC_SPEED_CNTL
	.comm	_PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK,4,2 ; @PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK
	.comm	_PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT,4,2 ; @PSWUSP0_PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT
	.comm	_smnPCIE_LC_LINK_WIDTH_CNTL,4,2 ; @smnPCIE_LC_LINK_WIDTH_CNTL
	.comm	_PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK,4,2 ; @PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK
	.comm	_PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT,4,2 ; @PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT
	.comm	_NUM_LINK_LEVELS,4,2            ; @NUM_LINK_LEVELS
l_.str.12:                              ; @.str.12
	.asciz	"%d: %s %s %dMhz %s\n"

l_.str.13:                              ; @.str.13
	.asciz	"2.5GT/s,"

l_.str.14:                              ; @.str.14
	.asciz	"5.0GT/s,"

l_.str.15:                              ; @.str.15
	.asciz	"8.0GT/s,"

l_.str.16:                              ; @.str.16
	.asciz	"16.0GT/s,"

l_.str.17:                              ; @.str.17
	.asciz	"x1"

l_.str.18:                              ; @.str.18
	.asciz	"x2"

l_.str.19:                              ; @.str.19
	.asciz	"x4"

l_.str.20:                              ; @.str.20
	.asciz	"x8"

l_.str.21:                              ; @.str.21
	.asciz	"x12"

l_.str.22:                              ; @.str.22
	.asciz	"x16"

	.comm	_OD8_SETTING_GFXCLK_FMIN,8,3    ; @OD8_SETTING_GFXCLK_FMIN
	.comm	_OD8_SETTING_GFXCLK_FMAX,8,3    ; @OD8_SETTING_GFXCLK_FMAX
l_.str.23:                              ; @.str.23
	.asciz	"%s:\n"

l_.str.24:                              ; @.str.24
	.asciz	"OD_SCLK"

l_.str.25:                              ; @.str.25
	.asciz	"0: %10uMhz\n"

l_.str.26:                              ; @.str.26
	.asciz	"1: %10uMhz\n"

	.comm	_OD8_SETTING_UCLK_FMAX,8,3      ; @OD8_SETTING_UCLK_FMAX
l_.str.27:                              ; @.str.27
	.asciz	"OD_MCLK"

	.comm	_OD8_SETTING_GFXCLK_FREQ1,8,3   ; @OD8_SETTING_GFXCLK_FREQ1
	.comm	_OD8_SETTING_GFXCLK_FREQ2,8,3   ; @OD8_SETTING_GFXCLK_FREQ2
	.comm	_OD8_SETTING_GFXCLK_FREQ3,8,3   ; @OD8_SETTING_GFXCLK_FREQ3
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE1,8,3 ; @OD8_SETTING_GFXCLK_VOLTAGE1
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE2,8,3 ; @OD8_SETTING_GFXCLK_VOLTAGE2
	.comm	_OD8_SETTING_GFXCLK_VOLTAGE3,8,3 ; @OD8_SETTING_GFXCLK_VOLTAGE3
l_.str.28:                              ; @.str.28
	.asciz	"OD_VDDC_CURVE"

l_.str.29:                              ; @.str.29
	.asciz	"0: %10uMhz %10dmV\n"

	.comm	_VOLTAGE_SCALE,4,2              ; @VOLTAGE_SCALE
l_.str.30:                              ; @.str.30
	.asciz	"1: %10uMhz %10dmV\n"

l_.str.31:                              ; @.str.31
	.asciz	"2: %10uMhz %10dmV\n"

l_.str.32:                              ; @.str.32
	.asciz	"OD_RANGE"

l_.str.33:                              ; @.str.33
	.asciz	"SCLK: %7uMhz %10uMhz\n"

l_.str.34:                              ; @.str.34
	.asciz	"MCLK: %7uMhz %10uMhz\n"

l_.str.35:                              ; @.str.35
	.asciz	"VDDC_CURVE_SCLK[0]: %7uMhz %10uMhz\n"

l_.str.36:                              ; @.str.36
	.asciz	"VDDC_CURVE_VOLT[0]: %7dmV %11dmV\n"

l_.str.37:                              ; @.str.37
	.asciz	"VDDC_CURVE_SCLK[1]: %7uMhz %10uMhz\n"

l_.str.38:                              ; @.str.38
	.asciz	"VDDC_CURVE_VOLT[1]: %7dmV %11dmV\n"

l_.str.39:                              ; @.str.39
	.asciz	"VDDC_CURVE_SCLK[2]: %7uMhz %10uMhz\n"

l_.str.40:                              ; @.str.40
	.asciz	"VDDC_CURVE_VOLT[2]: %7dmV %11dmV\n"

	.no_dead_strip	_vega20_print_clk_levels
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.vega20_print_clk_levels
l_switch.table.vega20_print_clk_levels:
	.quad	l_.str.13
	.quad	l_.str.14
	.quad	l_.str.15

	.p2align	3                               ; @switch.table.vega20_print_clk_levels.41
l_switch.table.vega20_print_clk_levels.41:
	.quad	l_.str.17
	.quad	l_.str.18
	.quad	l_.str.19
	.quad	l_.str.20
	.quad	l_.str.21

.subsections_via_symbols
