	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mtk_hdmi_hw_aud_set_mclk
_mtk_hdmi_hw_aud_set_mclk:              ## @mtk_hdmi_hw_aud_set_mclk
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r14
	movq	_GRL_CFG5@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_mtk_hdmi_read
	movq	_CFG5_CD_RATIO_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	addl	$-128, %ebx
	cmpl	$4, %ebx
	ja	LBB0_1
## %bb.2:
	movslq	%ebx, %rcx
	leaq	l_switch.table.mtk_hdmi_hw_aud_set_mclk(%rip), %rsi
	movq	(%rsi,%rcx,8), %rcx
	jmp	LBB0_3
LBB0_1:
	movq	_CFG5_FS256@GOTPCREL(%rip), %rcx
LBB0_3:
	andl	%eax, %edx
	orl	(%rcx), %edx
	movl	(%r15), %esi
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mtk_hdmi_write                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_GRL_CFG5,4,2                   ## @GRL_CFG5
	.comm	_CFG5_CD_RATIO_MASK,4,2         ## @CFG5_CD_RATIO_MASK
	.comm	_CFG5_FS128,4,2                 ## @CFG5_FS128
	.comm	_CFG5_FS256,4,2                 ## @CFG5_FS256
	.comm	_CFG5_FS384,4,2                 ## @CFG5_FS384
	.comm	_CFG5_FS512,4,2                 ## @CFG5_FS512
	.comm	_CFG5_FS768,4,2                 ## @CFG5_FS768
	.no_dead_strip	_mtk_hdmi_hw_aud_set_mclk
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.mtk_hdmi_hw_aud_set_mclk
l_switch.table.mtk_hdmi_hw_aud_set_mclk:
	.quad	_CFG5_FS768
	.quad	_CFG5_FS512
	.quad	_CFG5_FS384
	.quad	_CFG5_FS256
	.quad	_CFG5_FS128

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mtk_hdmi_hw_aud_set_mclk
_mtk_hdmi_hw_aud_set_mclk:              ; @mtk_hdmi_hw_aud_set_mclk
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x21, _GRL_CFG5@GOTPAGE
Lloh1:
	ldr	x21, [x21, _GRL_CFG5@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_mtk_hdmi_read
Lloh2:
	adrp	x8, _CFG5_CD_RATIO_MASK@GOTPAGE
Lloh3:
	ldr	x8, [x8, _CFG5_CD_RATIO_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	sub	w9, w20, #128
	cmp	w9, #4
	b.hi	LBB0_2
; %bb.1:
Lloh5:
	adrp	x10, l_switch.table.mtk_hdmi_hw_aud_set_mclk@PAGE
Lloh6:
	add	x10, x10, l_switch.table.mtk_hdmi_hw_aud_set_mclk@PAGEOFF
	ldr	x9, [x10, w9, sxtw #3]
	b	LBB0_3
LBB0_2:
Lloh7:
	adrp	x9, _CFG5_FS256@GOTPAGE
Lloh8:
	ldr	x9, [x9, _CFG5_FS256@GOTPAGEOFF]
LBB0_3:
	and	w8, w8, w0
	ldr	w9, [x9]
	orr	w2, w9, w8
	ldr	w1, [x21]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_mtk_hdmi_write
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_GRL_CFG5,4,2                   ; @GRL_CFG5
	.comm	_CFG5_CD_RATIO_MASK,4,2         ; @CFG5_CD_RATIO_MASK
	.comm	_CFG5_FS128,4,2                 ; @CFG5_FS128
	.comm	_CFG5_FS256,4,2                 ; @CFG5_FS256
	.comm	_CFG5_FS384,4,2                 ; @CFG5_FS384
	.comm	_CFG5_FS512,4,2                 ; @CFG5_FS512
	.comm	_CFG5_FS768,4,2                 ; @CFG5_FS768
	.no_dead_strip	_mtk_hdmi_hw_aud_set_mclk
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.mtk_hdmi_hw_aud_set_mclk
l_switch.table.mtk_hdmi_hw_aud_set_mclk:
	.quad	_CFG5_FS768
	.quad	_CFG5_FS512
	.quad	_CFG5_FS384
	.quad	_CFG5_FS256
	.quad	_CFG5_FS128

.subsections_via_symbols
