	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_construct_voltage_tables
_si_construct_voltage_tables:           ## @si_construct_voltage_tables
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	callq	_rv770_get_pi
	movq	%rax, %r15
	movq	%r13, %rdi
	callq	_evergreen_get_pi
	movq	%rax, %r12
	movq	%r13, %rdi
	callq	_si_get_pi
	movq	%rax, %rcx
	cmpq	$0, 8(%r15)
	je	LBB0_4
## %bb.1:
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	%rcx, -56(%rbp)                 ## 8-byte Spill
	movq	_VOLTAGE_TYPE_VDDC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_VOLTAGE_OBJ_GPIO_LUT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	16(%r12), %r14
	movq	%r13, %rdi
	movq	%r14, %rcx
	callq	_amdgpu_atombios_get_voltage_table
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_26
## %bb.2:
	movq	_SISLANDS_MAX_NO_VREG_STEPS@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	cmpq	%rsi, (%r14)
	jle	LBB0_6
## %bb.3:
	movq	%r13, %rdi
	movq	%r14, %rdx
	callq	_si_trim_voltage_table_to_fit_state_table
	jmp	LBB0_6
LBB0_4:
	cmpq	$0, 32(%rcx)
	je	LBB0_17
## %bb.5:
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	%rcx, -56(%rbp)                 ## 8-byte Spill
	leaq	4(%r13), %rsi
	leaq	16(%r12), %rdx
	movq	%r13, %rdi
	callq	_si_get_svi2_voltage_table
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_26
LBB0_6:
	cmpq	$0, 8(%r12)
	je	LBB0_10
## %bb.7:
	movq	_VOLTAGE_TYPE_VDDCI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_VOLTAGE_OBJ_GPIO_LUT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	movq	%r12, %rcx
	callq	_amdgpu_atombios_get_voltage_table
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_26
## %bb.8:
	movq	_SISLANDS_MAX_NO_VREG_STEPS@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	cmpq	%rsi, (%r12)
	jle	LBB0_10
## %bb.9:
	movq	%r13, %rdi
	movq	%r12, %rdx
	callq	_si_trim_voltage_table_to_fit_state_table
LBB0_10:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	cmpq	$0, 24(%rax)
	je	LBB0_12
## %bb.11:
	movq	%r13, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	_si_get_svi2_voltage_table
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_26
LBB0_12:
	cmpl	$0, (%r15)
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	je	LBB0_20
## %bb.13:
	movq	_VOLTAGE_TYPE_MVDDC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_VOLTAGE_OBJ_GPIO_LUT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	leaq	16(%rax), %r12
	movq	%r13, %rdi
	movq	%r12, %rcx
	callq	_amdgpu_atombios_get_voltage_table
	testl	%eax, %eax
	je	LBB0_15
## %bb.14:
	movl	%eax, %ebx
	movl	$0, (%r15)
	jmp	LBB0_26
LBB0_15:
	movq	(%r12), %rax
	testq	%rax, %rax
	je	LBB0_16
## %bb.18:
	movq	_SISLANDS_MAX_NO_VREG_STEPS@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	cmpq	%rsi, %rax
	jle	LBB0_20
## %bb.19:
	movq	%r13, %rdi
	movq	%r12, %rdx
	callq	_si_trim_voltage_table_to_fit_state_table
LBB0_20:
	xorl	%ebx, %ebx
	cmpl	$0, (%r14)
	je	LBB0_26
## %bb.21:
	movq	_VOLTAGE_TYPE_VDDC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_VOLTAGE_OBJ_PHASE_LUT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	addq	$8, %rcx
	movq	%r13, %rdi
	movq	%rcx, %r15
	callq	_amdgpu_atombios_get_voltage_table
	testl	%eax, %eax
	je	LBB0_23
## %bb.22:
	movl	$0, (%r14)
LBB0_23:
	movq	(%r15), %rax
	testq	%rax, %rax
	je	LBB0_25
## %bb.24:
	movq	_SISLANDS_MAX_NO_VREG_STEPS@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jle	LBB0_26
LBB0_25:
	movl	$0, (%r14)
	jmp	LBB0_26
LBB0_16:
	movl	$0, (%r15)
LBB0_17:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_26:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VOLTAGE_TYPE_VDDC,4,2          ## @VOLTAGE_TYPE_VDDC
	.comm	_VOLTAGE_OBJ_GPIO_LUT,4,2       ## @VOLTAGE_OBJ_GPIO_LUT
	.comm	_SISLANDS_MAX_NO_VREG_STEPS,8,3 ## @SISLANDS_MAX_NO_VREG_STEPS
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_VOLTAGE_TYPE_VDDCI,4,2         ## @VOLTAGE_TYPE_VDDCI
	.comm	_VOLTAGE_TYPE_MVDDC,4,2         ## @VOLTAGE_TYPE_MVDDC
	.comm	_VOLTAGE_OBJ_PHASE_LUT,4,2      ## @VOLTAGE_OBJ_PHASE_LUT
	.no_dead_strip	_si_construct_voltage_tables
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_construct_voltage_tables
_si_construct_voltage_tables:           ; @si_construct_voltage_tables
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x0
	bl	_rv770_get_pi
	mov	x21, x0
	mov	x0, x20
	bl	_evergreen_get_pi
	mov	x22, x0
	mov	x0, x20
	bl	_si_get_pi
	mov	x19, x0
	ldr	x8, [x21, #8]
	cbz	x8, LBB0_4
; %bb.1:
Lloh0:
	adrp	x8, _VOLTAGE_TYPE_VDDC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VOLTAGE_TYPE_VDDC@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _VOLTAGE_OBJ_GPIO_LUT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VOLTAGE_OBJ_GPIO_LUT@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	add	x23, x22, #16
	mov	x0, x20
	mov	x3, x23
	bl	_amdgpu_atombios_get_voltage_table
	cbnz	w0, LBB0_27
; %bb.2:
	ldr	x8, [x23]
Lloh6:
	adrp	x9, _SISLANDS_MAX_NO_VREG_STEPS@GOTPAGE
Lloh7:
	ldr	x9, [x9, _SISLANDS_MAX_NO_VREG_STEPS@GOTPAGEOFF]
Lloh8:
	ldr	x1, [x9]
	cmp	x8, x1
	b.le	LBB0_6
; %bb.3:
	mov	x0, x20
	mov	x2, x23
	bl	_si_trim_voltage_table_to_fit_state_table
	b	LBB0_6
LBB0_4:
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_26
; %bb.5:
	add	x1, x20, #4
	add	x2, x22, #16
	mov	x0, x20
	bl	_si_get_svi2_voltage_table
	cbnz	w0, LBB0_27
LBB0_6:
	ldr	x8, [x22, #8]
	cbz	x8, LBB0_10
; %bb.7:
Lloh9:
	adrp	x8, _VOLTAGE_TYPE_VDDCI@GOTPAGE
Lloh10:
	ldr	x8, [x8, _VOLTAGE_TYPE_VDDCI@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
Lloh12:
	adrp	x8, _VOLTAGE_OBJ_GPIO_LUT@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VOLTAGE_OBJ_GPIO_LUT@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x20
	mov	x3, x22
	bl	_amdgpu_atombios_get_voltage_table
	cbnz	w0, LBB0_27
; %bb.8:
	ldr	x8, [x22]
Lloh15:
	adrp	x9, _SISLANDS_MAX_NO_VREG_STEPS@GOTPAGE
Lloh16:
	ldr	x9, [x9, _SISLANDS_MAX_NO_VREG_STEPS@GOTPAGEOFF]
Lloh17:
	ldr	x1, [x9]
	cmp	x8, x1
	b.le	LBB0_10
; %bb.9:
	mov	x0, x20
	mov	x2, x22
	bl	_si_trim_voltage_table_to_fit_state_table
LBB0_10:
	ldr	x8, [x19, #24]
	cbz	x8, LBB0_12
; %bb.11:
	mov	x0, x20
	mov	x1, x20
	mov	x2, x22
	bl	_si_get_svi2_voltage_table
	cbnz	w0, LBB0_27
LBB0_12:
	ldr	w8, [x21]
	cbz	w8, LBB0_18
; %bb.13:
Lloh18:
	adrp	x8, _VOLTAGE_TYPE_MVDDC@GOTPAGE
Lloh19:
	ldr	x8, [x8, _VOLTAGE_TYPE_MVDDC@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
Lloh21:
	adrp	x8, _VOLTAGE_OBJ_GPIO_LUT@GOTPAGE
Lloh22:
	ldr	x8, [x8, _VOLTAGE_OBJ_GPIO_LUT@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	add	x22, x19, #16
	mov	x0, x20
	mov	x3, x22
	bl	_amdgpu_atombios_get_voltage_table
	cbz	w0, LBB0_15
; %bb.14:
	str	wzr, [x21]
	b	LBB0_27
LBB0_15:
	ldr	x8, [x22]
	cbz	x8, LBB0_25
; %bb.16:
Lloh24:
	adrp	x9, _SISLANDS_MAX_NO_VREG_STEPS@GOTPAGE
Lloh25:
	ldr	x9, [x9, _SISLANDS_MAX_NO_VREG_STEPS@GOTPAGEOFF]
Lloh26:
	ldr	x1, [x9]
	cmp	x8, x1
	b.le	LBB0_18
; %bb.17:
	mov	x0, x20
	mov	x2, x22
	bl	_si_trim_voltage_table_to_fit_state_table
LBB0_18:
	ldr	w8, [x19]
	cbz	w8, LBB0_23
; %bb.19:
Lloh27:
	adrp	x8, _VOLTAGE_TYPE_VDDC@GOTPAGE
Lloh28:
	ldr	x8, [x8, _VOLTAGE_TYPE_VDDC@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
Lloh30:
	adrp	x8, _VOLTAGE_OBJ_PHASE_LUT@GOTPAGE
Lloh31:
	ldr	x8, [x8, _VOLTAGE_OBJ_PHASE_LUT@GOTPAGEOFF]
Lloh32:
	ldr	w2, [x8]
	add	x21, x19, #8
	mov	x0, x20
	mov	x3, x21
	bl	_amdgpu_atombios_get_voltage_table
	cbz	w0, LBB0_21
; %bb.20:
	str	wzr, [x19]
LBB0_21:
	ldr	x8, [x21]
	cbz	x8, LBB0_24
; %bb.22:
Lloh33:
	adrp	x9, _SISLANDS_MAX_NO_VREG_STEPS@GOTPAGE
Lloh34:
	ldr	x9, [x9, _SISLANDS_MAX_NO_VREG_STEPS@GOTPAGEOFF]
Lloh35:
	ldr	x9, [x9]
	cmp	x8, x9
	b.gt	LBB0_24
LBB0_23:
	mov	w0, #0
	b	LBB0_27
LBB0_24:
	mov	w0, #0
	str	wzr, [x19]
	b	LBB0_27
LBB0_25:
	str	wzr, [x21]
LBB0_26:
Lloh36:
	adrp	x8, _EINVAL@GOTPAGE
Lloh37:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_27:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.cfi_endproc
                                        ; -- End function
	.comm	_VOLTAGE_TYPE_VDDC,4,2          ; @VOLTAGE_TYPE_VDDC
	.comm	_VOLTAGE_OBJ_GPIO_LUT,4,2       ; @VOLTAGE_OBJ_GPIO_LUT
	.comm	_SISLANDS_MAX_NO_VREG_STEPS,8,3 ; @SISLANDS_MAX_NO_VREG_STEPS
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_VOLTAGE_TYPE_VDDCI,4,2         ; @VOLTAGE_TYPE_VDDCI
	.comm	_VOLTAGE_TYPE_MVDDC,4,2         ; @VOLTAGE_TYPE_MVDDC
	.comm	_VOLTAGE_OBJ_PHASE_LUT,4,2      ; @VOLTAGE_OBJ_PHASE_LUT
	.no_dead_strip	_si_construct_voltage_tables
.subsections_via_symbols
