	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_dma_start
_si_dma_start:                          ## @si_dma_start
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$0, 16(%rdi)
	jle	LBB0_6
## %bb.1:
	movq	%rdi, %r13
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%r15
	movslq	16(%r13), %rax
	addq	$24, %r14
	cmpq	%rax, %r15
	jge	LBB0_6
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	24(%r13), %r13
	leaq	(%r14,%r13), %rcx
	movq	%rcx, -64(%rbp)                 ## 8-byte Spill
	movq	_sdma_offsets@GOTPCREL(%rip), %r12
	movq	(%r12), %rax
	movq	(%rax,%r15,8), %rdi
	movq	_DMA_SEM_INCOMPLETE_TIMER_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	(%r12), %rax
	movq	(%rax,%r15,8), %rdi
	movq	_DMA_SEM_WAIT_FAIL_TIMER_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movl	(%r13,%r14), %eax
	movq	%r13, -56(%rbp)                 ## 8-byte Spill
	leal	3(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$2, %edi
	callq	_order_base_2
                                        ## kill: def $eax killed $eax def $rax
	leal	(%rax,%rax), %r12d
	movq	_sdma_offsets@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rax
	movq	(%rax,%r15,8), %rdi
	movq	_DMA_RB_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	movl	%r12d, %esi
	callq	_WREG32
	movq	(%rbx), %rax
	movq	(%rax,%r15,8), %rdi
	movq	_DMA_RB_RPTR@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	(%rbx), %rax
	movq	(%rax,%r15,8), %rdi
	movq	_DMA_RB_WPTR@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movslq	4(%r13,%r14), %rbx
	shlq	$2, %rbx
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	addq	8(%rax), %rbx
	movq	_sdma_offsets@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%rax,%r15,8), %r13
	movq	_DMA_RB_RPTR_ADDR_LO@GOTPCREL(%rip), %rax
	addq	(%rax), %r13
	movq	%rbx, %rdi
	callq	_lower_32_bits
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_sdma_offsets@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%rax,%r15,8), %r13
	movq	_DMA_RB_RPTR_ADDR_HI@GOTPCREL(%rip), %rax
	addq	(%rax), %r13
	movq	%rbx, %rdi
	callq	_upper_32_bits
	movzbl	%al, %esi
	movq	%r13, %rdi
	callq	_WREG32
	movq	_DMA_RPTR_WRITEBACK_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movq	_sdma_offsets@GOTPCREL(%rip), %r13
	movq	(%r13), %rax
	movq	(%rax,%r15,8), %rdi
	movq	_DMA_RB_BASE@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movl	8(%rbx,%r14), %esi
	sarl	$8, %esi
	callq	_WREG32
	movq	_CMD_VMID_FORCE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DMA_IB_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	(%r13), %rax
	movq	(%rax,%r15,8), %rdi
	movq	_DMA_IB_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	callq	_WREG32
	movq	(%r13), %rax
	movq	(%rax,%r15,8), %rdi
	movq	_DMA_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	callq	_RREG32
	movq	_CTXEMPTY_INT_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	(%r13), %rax
	movq	(%rax,%r15,8), %rdi
	movq	_DMA_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	callq	_WREG32
	movq	$0, 16(%rbx,%r14)
	movq	(%r13), %rax
	movq	(%rax,%r15,8), %rbx
	movq	_DMA_RB_WPTR@GOTPCREL(%rip), %rax
	addq	(%rax), %rbx
	xorl	%edi, %edi
	callq	_lower_32_bits
                                        ## kill: def $eax killed $eax def $rax
	leal	(,%rax,4), %esi
	movq	%rbx, %rdi
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	callq	_WREG32
	movq	(%r13), %rax
	movq	(%rax,%r15,8), %rdi
	movq	_DMA_RB_CNTL@GOTPCREL(%rip), %rax
	addq	(%rax), %rdi
	movq	_DMA_RB_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movl	%r12d, %esi
	callq	_WREG32
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	$1, 12(%rax,%r14)
	movq	%rbx, %rdi
	callq	_amdgpu_ring_test_helper
	testl	%eax, %eax
	jne	LBB0_7
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	cmpq	(%r13), %rbx
	jne	LBB0_5
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	callq	_amdgpu_ttm_set_buffer_funcs_status
	jmp	LBB0_5
LBB0_6:
	xorl	%eax, %eax
LBB0_7:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DMA_SEM_INCOMPLETE_TIMER_CNTL,8,3 ## @DMA_SEM_INCOMPLETE_TIMER_CNTL
	.comm	_sdma_offsets,8,3               ## @sdma_offsets
	.comm	_DMA_SEM_WAIT_FAIL_TIMER_CNTL,8,3 ## @DMA_SEM_WAIT_FAIL_TIMER_CNTL
	.comm	_DMA_RB_CNTL,8,3                ## @DMA_RB_CNTL
	.comm	_DMA_RB_RPTR,8,3                ## @DMA_RB_RPTR
	.comm	_DMA_RB_WPTR,8,3                ## @DMA_RB_WPTR
	.comm	_DMA_RB_RPTR_ADDR_LO,8,3        ## @DMA_RB_RPTR_ADDR_LO
	.comm	_DMA_RB_RPTR_ADDR_HI,8,3        ## @DMA_RB_RPTR_ADDR_HI
	.comm	_DMA_RPTR_WRITEBACK_ENABLE,4,2  ## @DMA_RPTR_WRITEBACK_ENABLE
	.comm	_DMA_RB_BASE,8,3                ## @DMA_RB_BASE
	.comm	_DMA_IB_ENABLE,4,2              ## @DMA_IB_ENABLE
	.comm	_CMD_VMID_FORCE,4,2             ## @CMD_VMID_FORCE
	.comm	_DMA_IB_CNTL,8,3                ## @DMA_IB_CNTL
	.comm	_DMA_CNTL,8,3                   ## @DMA_CNTL
	.comm	_CTXEMPTY_INT_ENABLE,4,2        ## @CTXEMPTY_INT_ENABLE
	.comm	_DMA_RB_ENABLE,4,2              ## @DMA_RB_ENABLE
	.comm	_DMA_IB_SWAP_ENABLE,4,2         ## @DMA_IB_SWAP_ENABLE
	.comm	_DMA_RB_SWAP_ENABLE,4,2         ## @DMA_RB_SWAP_ENABLE
	.comm	_DMA_RPTR_WRITEBACK_SWAP_ENABLE,4,2 ## @DMA_RPTR_WRITEBACK_SWAP_ENABLE
	.no_dead_strip	_si_dma_start
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_dma_start
_si_dma_start:                          ; @si_dma_start
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w8, [x0, #16]
	cmp	w8, #1
	b.lt	LBB0_6
; %bb.1:
	mov	x19, x0
	mov	x24, #0
	mov	x25, #0
Lloh0:
	adrp	x27, _sdma_offsets@GOTPAGE
Lloh1:
	ldr	x27, [x27, _sdma_offsets@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x25, x25, #1
	ldrsw	x8, [x19, #16]
	add	x24, x24, #24
	cmp	x25, x8
	b.ge	LBB0_6
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #24]
	add	x20, x8, x24
Lloh2:
	adrp	x8, _DMA_SEM_INCOMPLETE_TIMER_CNTL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DMA_SEM_INCOMPLETE_TIMER_CNTL@GOTPAGEOFF]
Lloh4:
	ldr	x8, [x8]
	ldr	x9, [x27]
	lsl	x28, x25, #3
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh5:
	adrp	x8, _DMA_SEM_WAIT_FAIL_TIMER_CNTL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _DMA_SEM_WAIT_FAIL_TIMER_CNTL@GOTPAGEOFF]
Lloh7:
	ldr	x8, [x8]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	ldr	w8, [x20]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w0, w8, #2
	bl	_order_base_2
	lsl	w21, w0, #1
Lloh8:
	adrp	x26, _DMA_RB_CNTL@GOTPAGE
Lloh9:
	ldr	x26, [x26, _DMA_RB_CNTL@GOTPAGEOFF]
Lloh10:
	ldr	x8, [x26]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	x1, x21
	bl	_WREG32
Lloh11:
	adrp	x8, _DMA_RB_RPTR@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DMA_RB_RPTR@GOTPAGEOFF]
Lloh13:
	ldr	x8, [x8]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh14:
	adrp	x26, _DMA_RB_WPTR@GOTPAGE
Lloh15:
	ldr	x26, [x26, _DMA_RB_WPTR@GOTPAGEOFF]
	ldr	x8, [x26]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	ldr	x8, [x19, #8]
	ldrsw	x9, [x20, #4]
	add	x22, x8, x9, lsl #2
Lloh16:
	adrp	x8, _DMA_RB_RPTR_ADDR_LO@GOTPAGE
Lloh17:
	ldr	x8, [x8, _DMA_RB_RPTR_ADDR_LO@GOTPAGEOFF]
Lloh18:
	ldr	x8, [x8]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x23, x9, x8
	mov	x0, x22
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x23
	bl	_WREG32
Lloh19:
	adrp	x8, _DMA_RB_RPTR_ADDR_HI@GOTPAGE
Lloh20:
	ldr	x8, [x8, _DMA_RB_RPTR_ADDR_HI@GOTPAGEOFF]
Lloh21:
	ldr	x8, [x8]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x23, x9, x8
	mov	x0, x22
	bl	_upper_32_bits
	and	w1, w0, #0xff
	mov	x0, x23
	bl	_WREG32
Lloh22:
	adrp	x8, _DMA_RPTR_WRITEBACK_ENABLE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _DMA_RPTR_WRITEBACK_ENABLE@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	orr	w22, w8, w21
Lloh25:
	adrp	x8, _DMA_RB_BASE@GOTPAGE
Lloh26:
	ldr	x8, [x8, _DMA_RB_BASE@GOTPAGEOFF]
Lloh27:
	ldr	x8, [x8]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	ldr	w8, [x20, #8]
	asr	w1, w8, #8
	bl	_WREG32
Lloh28:
	adrp	x8, _DMA_IB_ENABLE@GOTPAGE
Lloh29:
	ldr	x8, [x8, _DMA_IB_ENABLE@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
Lloh31:
	adrp	x9, _CMD_VMID_FORCE@GOTPAGE
Lloh32:
	ldr	x9, [x9, _CMD_VMID_FORCE@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	orr	w1, w9, w8
Lloh34:
	adrp	x8, _DMA_IB_CNTL@GOTPAGE
Lloh35:
	ldr	x8, [x8, _DMA_IB_CNTL@GOTPAGEOFF]
Lloh36:
	ldr	x8, [x8]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_WREG32
Lloh37:
	adrp	x21, _DMA_CNTL@GOTPAGE
Lloh38:
	ldr	x21, [x21, _DMA_CNTL@GOTPAGEOFF]
	ldr	x8, [x21]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_RREG32
Lloh39:
	adrp	x8, _CTXEMPTY_INT_ENABLE@GOTPAGE
Lloh40:
	ldr	x8, [x8, _CTXEMPTY_INT_ENABLE@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	x8, [x21]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
	bl	_WREG32
	str	xzr, [x20, #16]
	ldr	x8, [x26]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x21, x9, x8
	mov	x0, #0
	bl	_lower_32_bits
	lsl	w1, w0, #2
	mov	x0, x21
	bl	_WREG32
Lloh42:
	adrp	x8, _DMA_RB_CNTL@GOTPAGE
Lloh43:
	ldr	x8, [x8, _DMA_RB_CNTL@GOTPAGEOFF]
Lloh44:
	ldr	x8, [x8]
	ldr	x9, [x27]
	ldr	x9, [x9, x28]
	add	x0, x9, x8
Lloh45:
	adrp	x8, _DMA_RB_ENABLE@GOTPAGE
Lloh46:
	ldr	x8, [x8, _DMA_RB_ENABLE@GOTPAGEOFF]
Lloh47:
	ldr	w8, [x8]
	orr	w1, w22, w8
	bl	_WREG32
	mov	w8, #1
	str	w8, [x20, #12]
	mov	x0, x20
	bl	_amdgpu_ring_test_helper
	cbnz	w0, LBB0_7
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	x8, [x19]
	cmp	x20, x8
	b.ne	LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	mov	x0, x19
	mov	w1, #1
	bl	_amdgpu_ttm_set_buffer_funcs_status
	b	LBB0_2
LBB0_6:
	mov	w0, #0
LBB0_7:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_DMA_SEM_INCOMPLETE_TIMER_CNTL,8,3 ; @DMA_SEM_INCOMPLETE_TIMER_CNTL
	.comm	_sdma_offsets,8,3               ; @sdma_offsets
	.comm	_DMA_SEM_WAIT_FAIL_TIMER_CNTL,8,3 ; @DMA_SEM_WAIT_FAIL_TIMER_CNTL
	.comm	_DMA_RB_CNTL,8,3                ; @DMA_RB_CNTL
	.comm	_DMA_RB_RPTR,8,3                ; @DMA_RB_RPTR
	.comm	_DMA_RB_WPTR,8,3                ; @DMA_RB_WPTR
	.comm	_DMA_RB_RPTR_ADDR_LO,8,3        ; @DMA_RB_RPTR_ADDR_LO
	.comm	_DMA_RB_RPTR_ADDR_HI,8,3        ; @DMA_RB_RPTR_ADDR_HI
	.comm	_DMA_RPTR_WRITEBACK_ENABLE,4,2  ; @DMA_RPTR_WRITEBACK_ENABLE
	.comm	_DMA_RB_BASE,8,3                ; @DMA_RB_BASE
	.comm	_DMA_IB_ENABLE,4,2              ; @DMA_IB_ENABLE
	.comm	_CMD_VMID_FORCE,4,2             ; @CMD_VMID_FORCE
	.comm	_DMA_IB_CNTL,8,3                ; @DMA_IB_CNTL
	.comm	_DMA_CNTL,8,3                   ; @DMA_CNTL
	.comm	_CTXEMPTY_INT_ENABLE,4,2        ; @CTXEMPTY_INT_ENABLE
	.comm	_DMA_RB_ENABLE,4,2              ; @DMA_RB_ENABLE
	.comm	_DMA_IB_SWAP_ENABLE,4,2         ; @DMA_IB_SWAP_ENABLE
	.comm	_DMA_RB_SWAP_ENABLE,4,2         ; @DMA_RB_SWAP_ENABLE
	.comm	_DMA_RPTR_WRITEBACK_SWAP_ENABLE,4,2 ; @DMA_RPTR_WRITEBACK_SWAP_ENABLE
	.no_dead_strip	_si_dma_start
.subsections_via_symbols
