	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smu7_force_clock_level
_smu7_force_clock_level:                ## @smu7_force_clock_level
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	testq	%rdx, %rdx
	je	LBB0_1
## %bb.2:
	movq	%rdx, %rbx
	movq	%rdi, %r14
	movq	(%rdi), %rax
	xorl	%r15d, %r15d
	cmpl	$130, %esi
	je	LBB0_8
## %bb.3:
	cmpl	$129, %esi
	je	LBB0_10
## %bb.4:
	cmpl	$128, %esi
	jne	LBB0_15
## %bb.5:
	cmpl	$0, 36(%rax)
	jne	LBB0_15
## %bb.6:
	movq	_PPSMC_MSG_SCLKDPM_SetEnabledMask@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	andq	8(%rax), %rbx
	jmp	LBB0_7
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
	jmp	LBB0_15
LBB0_8:
	cmpl	$0, 32(%rax)
	jne	LBB0_15
## %bb.9:
	movq	_PPSMC_MSG_MCLKDPM_SetEnabledMask@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	andq	16(%rax), %rbx
LBB0_7:
	movq	%r14, %rdi
	movq	%rbx, %rdx
LBB0_14:
	callq	_smum_send_msg_to_smc_with_parameter
	jmp	LBB0_15
LBB0_10:
	cmpl	$0, (%rax)
	jne	LBB0_15
## %bb.11:
	andq	24(%rax), %rbx
	movq	%rbx, %rdi
	callq	_fls
	bsfq	%rbx, %rcx
	incl	%ecx
	xorl	%r15d, %r15d
	testq	%rbx, %rbx
	cmovel	%r15d, %ecx
	cmpl	%ecx, %eax
	jne	LBB0_12
## %bb.13:
	movq	_PPSMC_MSG_PCIeDPM_ForceLevel@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	%rbx, %rdi
	callq	_fls
	decl	%eax
	movslq	%eax, %rdx
	movq	%r14, %rdi
	movl	%r12d, %esi
	jmp	LBB0_14
LBB0_12:
	movq	_PPSMC_MSG_PCIeDPM_UnForceLevel@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_smum_send_msg_to_smc
LBB0_15:
	movl	%r15d, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_PPSMC_MSG_SCLKDPM_SetEnabledMask,4,2 ## @PPSMC_MSG_SCLKDPM_SetEnabledMask
	.comm	_PPSMC_MSG_MCLKDPM_SetEnabledMask,4,2 ## @PPSMC_MSG_MCLKDPM_SetEnabledMask
	.comm	_PPSMC_MSG_PCIeDPM_UnForceLevel,4,2 ## @PPSMC_MSG_PCIeDPM_UnForceLevel
	.comm	_PPSMC_MSG_PCIeDPM_ForceLevel,4,2 ## @PPSMC_MSG_PCIeDPM_ForceLevel
	.no_dead_strip	_smu7_force_clock_level
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smu7_force_clock_level
_smu7_force_clock_level:                ; @smu7_force_clock_level
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	cbz	x2, LBB0_6
; %bb.1:
	mov	x19, x0
	ldr	x8, [x0]
	cmp	w1, #130
	b.eq	LBB0_7
; %bb.2:
	cmp	w1, #129
	b.eq	LBB0_11
; %bb.3:
	cmp	w1, #128
	b.ne	LBB0_15
; %bb.4:
	ldr	w9, [x8, #36]
	cbnz	w9, LBB0_15
; %bb.5:
Lloh0:
	adrp	x9, _PPSMC_MSG_SCLKDPM_SetEnabledMask@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PPSMC_MSG_SCLKDPM_SetEnabledMask@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x9]
	ldr	x8, [x8, #8]
	b	LBB0_9
LBB0_6:
Lloh3:
	adrp	x8, _EINVAL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_16
LBB0_7:
	ldr	w9, [x8, #32]
	cbnz	w9, LBB0_15
; %bb.8:
Lloh6:
	adrp	x9, _PPSMC_MSG_MCLKDPM_SetEnabledMask@GOTPAGE
Lloh7:
	ldr	x9, [x9, _PPSMC_MSG_MCLKDPM_SetEnabledMask@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x9]
	ldr	x8, [x8, #16]
LBB0_9:
	and	x2, x8, x2
	mov	x0, x19
LBB0_10:
	bl	_smum_send_msg_to_smc_with_parameter
	b	LBB0_15
LBB0_11:
	ldr	w9, [x8]
	cbnz	w9, LBB0_15
; %bb.12:
	ldr	x8, [x8, #24]
	and	x20, x8, x2
	mov	x0, x20
	bl	_fls
	rbit	x8, x20
	clz	x8, x8
	cmp	x20, #0
	csinc	w8, wzr, w8, eq
	cmp	w0, w8
	b.ne	LBB0_14
; %bb.13:
Lloh9:
	adrp	x8, _PPSMC_MSG_PCIeDPM_ForceLevel@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PPSMC_MSG_PCIeDPM_ForceLevel@GOTPAGEOFF]
Lloh11:
	ldr	w21, [x8]
	mov	x0, x20
	bl	_fls
	sub	w8, w0, #1
	sxtw	x2, w8
	mov	x0, x19
	mov	x1, x21
	b	LBB0_10
LBB0_14:
Lloh12:
	adrp	x8, _PPSMC_MSG_PCIeDPM_UnForceLevel@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PPSMC_MSG_PCIeDPM_UnForceLevel@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_smum_send_msg_to_smc
LBB0_15:
	mov	w0, #0
LBB0_16:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_PPSMC_MSG_SCLKDPM_SetEnabledMask,4,2 ; @PPSMC_MSG_SCLKDPM_SetEnabledMask
	.comm	_PPSMC_MSG_MCLKDPM_SetEnabledMask,4,2 ; @PPSMC_MSG_MCLKDPM_SetEnabledMask
	.comm	_PPSMC_MSG_PCIeDPM_UnForceLevel,4,2 ; @PPSMC_MSG_PCIeDPM_UnForceLevel
	.comm	_PPSMC_MSG_PCIeDPM_ForceLevel,4,2 ; @PPSMC_MSG_PCIeDPM_ForceLevel
	.no_dead_strip	_smu7_force_clock_level
.subsections_via_symbols
