	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_uvd_cs_pass2
_amdgpu_uvd_cs_pass2:                   ## @amdgpu_uvd_cs_pass2
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_amdgpu_uvd_get_addr_from_ctx
	movq	%rax, %rbx
	movq	16(%r14), %rdi
	leaq	-56(%rbp), %rdx
	leaq	-72(%rbp), %rcx
	movq	%rax, %rsi
	callq	_amdgpu_cs_find_mapping
	testl	%eax, %eax
	je	LBB0_3
## %bb.1:
	movl	%eax, %r13d
	leaq	L_.str(%rip), %rdi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_2
LBB0_3:
	movq	-56(%rbp), %rdi
	callq	_amdgpu_bo_gpu_offset
	movq	%rax, %r12
	movq	-72(%rbp), %rax
	movq	(%rax), %r15
	movq	8(%rax), %rax
	subq	%rax, %r15
	incq	%r15
	movq	_AMDGPU_GPU_PAGE_SIZE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	imulq	%rcx, %r15
	addq	%r12, %r15
	imulq	%rax, %rcx
	subq	%rcx, %rbx
	movq	%rbx, -64(%rbp)                 ## 8-byte Spill
	addq	%rbx, %r12
	movq	16(%r14), %r13
	movl	28(%r14), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	36(%r14), %ebx
	movq	%r12, %rdi
	callq	_lower_32_bits
	movq	%r13, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%ebx, %edx
	movl	%eax, %ecx
	callq	_amdgpu_set_ib_value
	movq	16(%r14), %rbx
	movl	28(%r14), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	32(%r14), %r13d
	movq	%r12, %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%r13d, %edx
	movl	%eax, %ecx
	callq	_amdgpu_set_ib_value
	movq	16(%r14), %rdi
	movl	28(%r14), %esi
	movl	24(%r14), %edx
	callq	_amdgpu_get_ib_value
	movl	%eax, %esi
	sarl	%esi
	cmpl	$7, %eax
	jg	LBB0_8
## %bb.4:
	movq	%r15, %rdx
	subq	%r12, %rdx
	movq	(%r14), %rcx
	movslq	%esi, %rdi
	movq	(%rcx,%rdi,8), %rcx
	cmpq	%rcx, %rdx
	jge	LBB0_14
## %bb.5:
	leaq	L_.str.1(%rip), %rdi
	xorl	%r13d, %r13d
LBB0_6:
                                        ## kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_7
LBB0_8:
	cmpl	$256, %esi                      ## imm = 0x100
	je	LBB0_14
## %bb.9:
	cmpl	$516, %esi                      ## imm = 0x204
	je	LBB0_14
## %bb.10:
	cmpl	$518, %esi                      ## imm = 0x206
	jne	LBB0_13
## %bb.11:
	movq	%r15, %rdx
	subq	%r12, %rdx
	movq	(%r14), %rcx
	movq	32(%rcx), %rcx
	cmpq	%rcx, %rdx
	jge	LBB0_14
## %bb.12:
	leaq	L_.str.1(%rip), %rdi
	xorl	%r13d, %r13d
	movl	$518, %esi                      ## imm = 0x206
	jmp	LBB0_6
LBB0_14:
	movq	16(%r14), %rcx
	movq	(%rcx), %rcx
	cmpl	$0, 8(%rcx)
	movq	-64(%rbp), %rdx                 ## 8-byte Reload
	je	LBB0_15
LBB0_22:
	cmpl	$1, %eax
	ja	LBB0_25
## %bb.23:
	movl	$1, 8(%r14)
	movq	-56(%rbp), %rsi
	movq	%r14, %rdi
	callq	_amdgpu_uvd_cs_msg
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	LBB0_2
	jmp	LBB0_24
LBB0_15:
	movq	%r12, %rbx
	sarq	$28, %rbx
	leaq	-1(%r15), %rdi
	sarq	$28, %rdi
	cmpq	%rdi, %rbx
	jne	LBB0_16
## %bb.18:
	cmpl	$2, %eax
	jb	LBB0_20
## %bb.19:
	cmpl	$3, %esi
	je	LBB0_20
LBB0_25:
	cmpl	$0, 8(%r14)
	je	LBB0_26
LBB0_24:
	xorl	%r13d, %r13d
	jmp	LBB0_2
LBB0_13:
	leaq	L_.str.2(%rip), %rdi
	xorl	%r13d, %r13d
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_7
LBB0_16:
	leaq	L_.str.3(%rip), %rdi
	jmp	LBB0_17
LBB0_26:
	leaq	L_.str.5(%rip), %rdi
	xorl	%r13d, %r13d
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_7
LBB0_20:
	movq	(%rcx), %rcx
	movl	(%rcx), %ecx
	sarl	$28, %ecx
	movslq	%ecx, %rcx
	cmpq	%rcx, %rbx
	je	LBB0_22
## %bb.21:
	leaq	L_.str.4(%rip), %rdi
LBB0_17:
	xorl	%r13d, %r13d
	movq	%r12, %rsi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	_DRM_ERROR
LBB0_7:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %r13d
LBB0_2:
	movl	%r13d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Can't find BO for addr 0x%08Lx\n"

	.comm	_AMDGPU_GPU_PAGE_SIZE,8,3       ## @AMDGPU_GPU_PAGE_SIZE
L_.str.1:                               ## @.str.1
	.asciz	"buffer (%d) to small (%d / %d)!\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
L_.str.2:                               ## @.str.2
	.asciz	"invalid UVD command %X!\n"

L_.str.3:                               ## @.str.3
	.asciz	"reloc %LX-%LX crossing 256MB boundary!\n"

L_.str.4:                               ## @.str.4
	.asciz	"msg/fb buffer %LX-%LX out of 256MB segment!\n"

L_.str.5:                               ## @.str.5
	.asciz	"Message needed before other commands are send!\n"

	.no_dead_strip	_amdgpu_uvd_cs_pass2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_uvd_cs_pass2
_amdgpu_uvd_cs_pass2:                   ; @amdgpu_uvd_cs_pass2
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	bl	_amdgpu_uvd_get_addr_from_ctx
	mov	x21, x0
	ldr	x0, [x19, #16]
	add	x2, sp, #32
	add	x3, sp, #40
	mov	x1, x21
	bl	_amdgpu_cs_find_mapping
	cbz	w0, LBB0_2
; %bb.1:
	mov	x20, x0
	str	x21, [sp]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_25
LBB0_2:
	ldr	x0, [sp, #32]
	bl	_amdgpu_bo_gpu_offset
	ldr	x8, [sp, #40]
	ldp	x9, x8, [x8]
	sub	x9, x9, x8
Lloh2:
	adrp	x10, _AMDGPU_GPU_PAGE_SIZE@GOTPAGE
Lloh3:
	ldr	x10, [x10, _AMDGPU_GPU_PAGE_SIZE@GOTPAGEOFF]
Lloh4:
	ldr	x10, [x10]
	madd	x9, x10, x9, x10
	add	x25, x9, x0
	msub	x20, x10, x8, x21
	add	x21, x20, x0
	ldr	x22, [x19, #16]
	ldr	w23, [x19, #28]
	ldr	w24, [x19, #36]
	mov	x0, x21
	bl	_lower_32_bits
	mov	x3, x0
	mov	x0, x22
	mov	x1, x23
	mov	x2, x24
	bl	_amdgpu_set_ib_value
	ldr	x22, [x19, #16]
	ldp	w23, w24, [x19, #28]
	mov	x0, x21
	bl	_upper_32_bits
	mov	x3, x0
	mov	x0, x22
	mov	x1, x23
	mov	x2, x24
	bl	_amdgpu_set_ib_value
	ldr	x0, [x19, #16]
	ldp	w2, w1, [x19, #24]
	bl	_amdgpu_get_ib_value
	asr	w8, w0, #1
	cmp	w0, #7
	b.gt	LBB0_6
; %bb.3:
	ldr	x9, [x19]
	ldr	x10, [x9, w8, sxtw #3]
	sub	x9, x25, x21
	cmp	x9, x10
	b.ge	LBB0_11
; %bb.4:
	str	x10, [sp, #16]
LBB0_5:
	stp	x8, x9, [sp]
Lloh5:
	adrp	x0, l_.str.1@PAGE
Lloh6:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_24
LBB0_6:
	cmp	w8, #256
	b.eq	LBB0_11
; %bb.7:
	cmp	w8, #516
	b.eq	LBB0_11
; %bb.8:
	cmp	w8, #518
	b.ne	LBB0_19
; %bb.9:
	ldr	x9, [x19]
	ldr	x10, [x9, #32]
	sub	x9, x25, x21
	cmp	x9, x10
	b.ge	LBB0_11
; %bb.10:
	str	x10, [sp, #16]
	mov	w8, #518
	b	LBB0_5
LBB0_11:
	ldr	x9, [x19, #16]
	ldr	x9, [x9]
	ldr	w10, [x9, #8]
	cbz	w10, LBB0_14
LBB0_12:
	cmp	w0, #1
	b.hi	LBB0_17
; %bb.13:
	mov	w8, #1
	str	w8, [x19, #8]
	ldr	x1, [sp, #32]
	mov	x0, x19
	mov	x2, x20
	bl	_amdgpu_uvd_cs_msg
	mov	x20, x0
	cbnz	w0, LBB0_25
	b	LBB0_18
LBB0_14:
	asr	x10, x21, #28
	sub	x11, x25, #1
	cmp	x10, x11, asr #28
	b.ne	LBB0_20
; %bb.15:
	cmp	w0, #2
	b.lo	LBB0_22
; %bb.16:
	cmp	w8, #3
	b.eq	LBB0_22
LBB0_17:
	ldr	w8, [x19, #8]
	cbz	w8, LBB0_21
LBB0_18:
	mov	w20, #0
	b	LBB0_25
LBB0_19:
                                        ; kill: def $w8 killed $w8 killed $x8 def $x8
	str	x8, [sp]
Lloh7:
	adrp	x0, l_.str.2@PAGE
Lloh8:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_24
LBB0_20:
	stp	x21, x25, [sp]
Lloh9:
	adrp	x0, l_.str.3@PAGE
Lloh10:
	add	x0, x0, l_.str.3@PAGEOFF
	b	LBB0_24
LBB0_21:
Lloh11:
	adrp	x0, l_.str.5@PAGE
Lloh12:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_24
LBB0_22:
	ldr	x8, [x9]
	ldr	w8, [x8]
	asr	w8, w8, #28
	cmp	x10, w8, sxtw
	b.eq	LBB0_12
; %bb.23:
	stp	x21, x25, [sp]
Lloh13:
	adrp	x0, l_.str.4@PAGE
Lloh14:
	add	x0, x0, l_.str.4@PAGEOFF
LBB0_24:
	bl	_DRM_ERROR
Lloh15:
	adrp	x8, _EINVAL@GOTPAGE
Lloh16:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	neg	w20, w8
LBB0_25:
	mov	x0, x20
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Can't find BO for addr 0x%08Lx\n"

	.comm	_AMDGPU_GPU_PAGE_SIZE,8,3       ; @AMDGPU_GPU_PAGE_SIZE
l_.str.1:                               ; @.str.1
	.asciz	"buffer (%d) to small (%d / %d)!\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
l_.str.2:                               ; @.str.2
	.asciz	"invalid UVD command %X!\n"

l_.str.3:                               ; @.str.3
	.asciz	"reloc %LX-%LX crossing 256MB boundary!\n"

l_.str.4:                               ; @.str.4
	.asciz	"msg/fb buffer %LX-%LX out of 256MB segment!\n"

l_.str.5:                               ; @.str.5
	.asciz	"Message needed before other commands are send!\n"

	.no_dead_strip	_amdgpu_uvd_cs_pass2
.subsections_via_symbols
