	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_device_program_register_sequence ## -- Begin function amdgpu_device_program_register_sequence
	.p2align	4, 0x90
_amdgpu_device_program_register_sequence: ## @amdgpu_device_program_register_sequence
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	imull	$-1431655765, %edx, %eax        ## imm = 0xAAAAAAAB
	addl	$715827882, %eax                ## imm = 0x2AAAAAAA
	cmpl	$1431655764, %eax               ## imm = 0x55555554
	ja	LBB0_8
## %bb.1:
	cmpl	$0, -44(%rbp)                   ## 4-byte Folded Reload
	jle	LBB0_8
## %bb.2:
	movq	%rsi, %r12
	xorl	%r15d, %r15d
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_3 Depth=1
	orl	%ecx, %ebx
LBB0_7:                                 ##   in Loop: Header=BB0_3 Depth=1
	movl	%r13d, %edi
	movl	%ebx, %esi
	callq	_WREG32
	addq	$3, %r15
	cmpl	-44(%rbp), %r15d                ## 4-byte Folded Reload
	jge	LBB0_8
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r12,%r15,4), %r13d
	movl	4(%r12,%r15,4), %r14d
	movl	8(%r12,%r15,4), %ebx
	cmpl	$-1, %r14d
	je	LBB0_7
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	movl	%r13d, %edi
	callq	_RREG32
	movl	%r14d, %ecx
	notl	%ecx
	andl	%eax, %ecx
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rax
	movq	_AMDGPU_FAMILY_AI@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rax
	jl	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_3 Depth=1
	andl	%r14d, %ebx
	jmp	LBB0_6
LBB0_8:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_FAMILY_AI,8,3           ## @AMDGPU_FAMILY_AI
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_device_program_register_sequence ; -- Begin function amdgpu_device_program_register_sequence
	.p2align	2
_amdgpu_device_program_register_sequence: ; @amdgpu_device_program_register_sequence
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	w8, #43691
	movk	w8, #43690, lsl #16
	mov	w9, #43690
	movk	w9, #10922, lsl #16
	madd	w8, w2, w8, w9
	mov	w9, #21844
	movk	w9, #21845, lsl #16
	cmp	w8, w9
	ccmp	w2, #1, #8, ls
	b.ge	LBB0_2
LBB0_1:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_2:
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	mov	x24, #0
Lloh0:
	adrp	x25, _AMDGPU_FAMILY_AI@GOTPAGE
Lloh1:
	ldr	x25, [x25, _AMDGPU_FAMILY_AI@GOTPAGEOFF]
	b	LBB0_4
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x22
	mov	x1, x23
	bl	_WREG32
	add	x24, x24, #3
	cmp	w24, w19
	b.ge	LBB0_1
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	add	x8, x20, x24, lsl #2
	ldp	w22, w26, [x8]
	ldr	w23, [x8, #8]
	cmn	w26, #1
	b.eq	LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x22
	bl	_RREG32
	bic	w8, w0, w26
	ldr	x9, [x21]
	ldr	x10, [x25]
	cmp	x9, x10
	orr	w9, w8, w23
	and	w10, w23, w26
	orr	w8, w8, w10
	csel	w23, w9, w8, lt
	b	LBB0_3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_FAMILY_AI,8,3           ; @AMDGPU_FAMILY_AI
.subsections_via_symbols
