	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_populate_smc_voltage_tables
_si_populate_smc_voltage_tables:        ## @si_populate_smc_voltage_tables
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r13
	movq	%rdi, %rbx
	callq	_rv770_get_pi
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_evergreen_get_pi
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	_si_get_pi
	movq	%rax, %r15
	cmpq	$0, 80(%rax)
	je	LBB0_4
## %bb.1:
	movq	_SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r15), %edx
	movq	%rbx, %rdi
	callq	_si_write_smc_soft_register
	movq	_SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r15), %edx
	movq	%rbx, %rdi
	callq	_si_write_smc_soft_register
	movq	_SI_SMC_SOFT_REGISTER_svi_rework_plat_type@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
LBB0_2:
	callq	_si_write_smc_soft_register
LBB0_3:
	xorl	%eax, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	%r13, -48(%rbp)                 ## 8-byte Spill
	cmpq	$0, 32(%r12)
	je	LBB0_10
## %bb.5:
	movq	%r12, %rsi
	addq	$32, %rsi
	movq	%rbx, %rdi
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	movq	%r13, %rdx
	callq	_si_populate_smc_voltage_table
	movl	48(%r12), %edi
	callq	_cpu_to_be32
	movq	16(%r13), %rcx
	movq	_SISLANDS_SMC_VOLTAGEMASK_VDDC@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	%rax, (%rcx,%rdx,8)
	movq	32(%r12), %rax
	testq	%rax, %rax
	je	LBB0_10
## %bb.6:
	movq	(%r14), %rcx
	movq	56(%r12), %rsi
	xorl	%edx, %edx
	.p2align	4, 0x90
LBB0_7:                                 ## =>This Inner Loop Header: Depth=1
	cmpq	(%rsi,%rdx,8), %rcx
	jle	LBB0_9
## %bb.8:                               ##   in Loop: Header=BB0_7 Depth=1
	incq	%rdx
	cmpq	%rdx, %rax
	jne	LBB0_7
	jmp	LBB0_10
LBB0_9:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	%rdx, (%rax)
LBB0_10:
	cmpq	$0, (%r12)
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	je	LBB0_12
## %bb.11:
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	callq	_si_populate_smc_voltage_table
	movl	16(%r12), %edi
	callq	_cpu_to_be32
	movq	16(%r14), %rcx
	movq	_SISLANDS_SMC_VOLTAGEMASK_VDDCI@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	%rax, (%rcx,%rdx,8)
LBB0_12:
	cmpq	$0, 48(%r15)
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	je	LBB0_14
## %bb.13:
	leaq	48(%r12), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_si_populate_smc_voltage_table
	movl	64(%r15), %edi
	callq	_cpu_to_be32
	movq	16(%r14), %rcx
	movq	_SISLANDS_SMC_VOLTAGEMASK_MVDD@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	%rax, (%rcx,%rdx,8)
LBB0_14:
	cmpl	$0, 8(%r15)
	je	LBB0_3
## %bb.15:
	addq	$16, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movq	%rbx, %rdx
	callq	_si_validate_phase_shedding_tables
	testq	%rax, %rax
	je	LBB0_17
## %bb.16:
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	callq	_si_populate_smc_voltage_table
	movl	32(%r15), %edi
	callq	_cpu_to_be32
	movq	8(%r14), %rcx
	movq	_SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	%rax, (%rcx,%rdx,8)
	movq	_SI_SMC_SOFT_REGISTER_phase_shedding_delay@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	24(%r15), %edx
	movq	%rbx, %rdi
	jmp	LBB0_2
LBB0_17:
	movl	$0, 8(%r15)
	jmp	LBB0_3
	.cfi_endproc
                                        ## -- End function
	.comm	_SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc,4,2 ## @SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc
	.comm	_SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd,4,2 ## @SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd
	.comm	_SI_SMC_SOFT_REGISTER_svi_rework_plat_type,4,2 ## @SI_SMC_SOFT_REGISTER_svi_rework_plat_type
	.comm	_SISLANDS_SMC_VOLTAGEMASK_VDDC,8,3 ## @SISLANDS_SMC_VOLTAGEMASK_VDDC
	.comm	_SISLANDS_SMC_VOLTAGEMASK_VDDCI,8,3 ## @SISLANDS_SMC_VOLTAGEMASK_VDDCI
	.comm	_SISLANDS_SMC_VOLTAGEMASK_MVDD,8,3 ## @SISLANDS_SMC_VOLTAGEMASK_MVDD
	.comm	_SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING,8,3 ## @SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING
	.comm	_SI_SMC_SOFT_REGISTER_phase_shedding_delay,4,2 ## @SI_SMC_SOFT_REGISTER_phase_shedding_delay
	.no_dead_strip	_si_populate_smc_voltage_tables
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_populate_smc_voltage_tables
_si_populate_smc_voltage_tables:        ; @si_populate_smc_voltage_tables
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x1
	mov	x19, x0
	bl	_rv770_get_pi
	mov	x23, x0
	mov	x0, x19
	bl	_evergreen_get_pi
	mov	x22, x0
	mov	x0, x19
	bl	_si_get_pi
	mov	x20, x0
	ldr	x8, [x0, #80]
	cbz	x8, LBB0_4
; %bb.1:
Lloh0:
	adrp	x8, _SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_si_write_smc_soft_register
Lloh3:
	adrp	x8, _SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	w2, [x20, #4]
	mov	x0, x19
	bl	_si_write_smc_soft_register
Lloh6:
	adrp	x8, _SI_SMC_SOFT_REGISTER_svi_rework_plat_type@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SI_SMC_SOFT_REGISTER_svi_rework_plat_type@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
LBB0_2:
	bl	_si_write_smc_soft_register
LBB0_3:
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_4:
	mov	x1, x22
	ldr	x8, [x1, #32]!
	cbz	x8, LBB0_10
; %bb.5:
	mov	x0, x19
	mov	x2, x21
	bl	_si_populate_smc_voltage_table
	ldr	w0, [x22, #48]
	bl	_cpu_to_be32
	ldr	x8, [x21, #16]
Lloh9:
	adrp	x9, _SISLANDS_SMC_VOLTAGEMASK_VDDC@GOTPAGE
Lloh10:
	ldr	x9, [x9, _SISLANDS_SMC_VOLTAGEMASK_VDDC@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	str	x0, [x8, x9, lsl #3]
	ldr	x8, [x22, #32]
	cbz	x8, LBB0_10
; %bb.6:
	mov	x9, #0
	ldr	x10, [x23]
	ldr	x11, [x22, #56]
LBB0_7:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x12, [x11, x9, lsl #3]
	cmp	x10, x12
	b.le	LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	add	x9, x9, #1
	cmp	x8, x9
	b.ne	LBB0_7
	b	LBB0_10
LBB0_9:
	str	x9, [x21]
LBB0_10:
	ldr	x8, [x22]
	cbz	x8, LBB0_12
; %bb.11:
	mov	x0, x19
	mov	x1, x22
	mov	x2, x21
	bl	_si_populate_smc_voltage_table
	ldr	w0, [x22, #16]
	bl	_cpu_to_be32
	ldr	x8, [x21, #16]
Lloh12:
	adrp	x9, _SISLANDS_SMC_VOLTAGEMASK_VDDCI@GOTPAGE
Lloh13:
	ldr	x9, [x9, _SISLANDS_SMC_VOLTAGEMASK_VDDCI@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	str	x0, [x8, x9, lsl #3]
LBB0_12:
	mov	x1, x20
	ldr	x8, [x1, #48]!
	cbz	x8, LBB0_14
; %bb.13:
	mov	x0, x19
	mov	x2, x21
	bl	_si_populate_smc_voltage_table
	ldr	w0, [x20, #64]
	bl	_cpu_to_be32
	ldr	x8, [x21, #16]
Lloh15:
	adrp	x9, _SISLANDS_SMC_VOLTAGEMASK_MVDD@GOTPAGE
Lloh16:
	ldr	x9, [x9, _SISLANDS_SMC_VOLTAGEMASK_MVDD@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
	str	x0, [x8, x9, lsl #3]
LBB0_14:
	ldr	w8, [x20, #8]
	cbz	w8, LBB0_3
; %bb.15:
	add	x22, x20, #16
	mov	x0, x19
	mov	x1, x22
	mov	x2, x19
	bl	_si_validate_phase_shedding_tables
	cbz	x0, LBB0_17
; %bb.16:
	mov	x0, x19
	mov	x1, x22
	mov	x2, x21
	bl	_si_populate_smc_voltage_table
	ldr	w0, [x20, #32]
	bl	_cpu_to_be32
	ldr	x8, [x21, #8]
Lloh18:
	adrp	x9, _SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING@GOTPAGE
Lloh19:
	ldr	x9, [x9, _SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING@GOTPAGEOFF]
Lloh20:
	ldr	x9, [x9]
	str	x0, [x8, x9, lsl #3]
Lloh21:
	adrp	x8, _SI_SMC_SOFT_REGISTER_phase_shedding_delay@GOTPAGE
Lloh22:
	ldr	x8, [x8, _SI_SMC_SOFT_REGISTER_phase_shedding_delay@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	ldr	w2, [x20, #24]
	mov	x0, x19
	b	LBB0_2
LBB0_17:
	str	wzr, [x20, #8]
	b	LBB0_3
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.comm	_SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc,4,2 ; @SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc
	.comm	_SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd,4,2 ; @SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd
	.comm	_SI_SMC_SOFT_REGISTER_svi_rework_plat_type,4,2 ; @SI_SMC_SOFT_REGISTER_svi_rework_plat_type
	.comm	_SISLANDS_SMC_VOLTAGEMASK_VDDC,8,3 ; @SISLANDS_SMC_VOLTAGEMASK_VDDC
	.comm	_SISLANDS_SMC_VOLTAGEMASK_VDDCI,8,3 ; @SISLANDS_SMC_VOLTAGEMASK_VDDCI
	.comm	_SISLANDS_SMC_VOLTAGEMASK_MVDD,8,3 ; @SISLANDS_SMC_VOLTAGEMASK_MVDD
	.comm	_SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING,8,3 ; @SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING
	.comm	_SI_SMC_SOFT_REGISTER_phase_shedding_delay,4,2 ; @SI_SMC_SOFT_REGISTER_phase_shedding_delay
	.no_dead_strip	_si_populate_smc_voltage_tables
.subsections_via_symbols
