	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hws_pga_write
_hws_pga_write:                         ## @hws_pga_write
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %ebx
	movl	%esi, %r15d
	movq	%rdi, %r12
	movl	(%rdx), %r14d
	movl	%r14d, -44(%rbp)
	movl	16(%rdi), %edi
	callq	_intel_gvt_render_mmio_to_ring_id
	movl	%eax, %r13d
	movq	_I915_GTT_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	%r14d, %esi
	callq	_intel_gvt_ggtt_validate_range
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	testl	%r13d, %r13d
	sets	%al
	movq	_I915_NUM_ENGINES@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %r13d
	setge	%cl
	orb	%al, %cl
	movzbl	%cl, %edi
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_5
## %bb.3:
	leaq	L_.str.1(%rip), %rdi
	xorl	%ebx, %ebx
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	_gvt_vgpu_err
	jmp	LBB0_4
LBB0_1:
	leaq	L_.str(%rip), %rdi
	xorl	%ebx, %ebx
	movl	%r15d, %esi
	movl	%r14d, %edx
	xorl	%eax, %eax
	callq	_gvt_vgpu_err
LBB0_4:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_6
LBB0_5:
	movq	8(%r12), %rax
	movslq	%r13d, %rcx
	movl	%r14d, (%rax,%rcx,4)
	movl	(%r12), %esi
	movl	-44(%rbp), %edx
	leaq	L_.str.2(%rip), %rdi
	movl	%r15d, %ecx
	callq	_gvt_dbg_mmio
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	movl	%r15d, %esi
	movl	%ebx, %ecx
	callq	_intel_vgpu_default_mmio_write
	movl	%eax, %ebx
LBB0_6:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_I915_GTT_PAGE_SIZE,4,2         ## @I915_GTT_PAGE_SIZE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"write invalid HWSP address, reg:0x%x, value:0x%x\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_I915_NUM_ENGINES,4,2           ## @I915_NUM_ENGINES
L_.str.1:                               ## @.str.1
	.asciz	"access unknown hardware status page register:0x%x\n"

L_.str.2:                               ## @.str.2
	.asciz	"VM(%d) write: 0x%x to HWSP: 0x%x\n"

	.no_dead_strip	_hws_pga_write
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hws_pga_write
_hws_pga_write:                         ; @hws_pga_write
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x3
	mov	x19, x1
	mov	x21, x0
	ldr	w22, [x2]
	str	w22, [sp, #12]
	ldr	w0, [x0, #16]
	bl	_intel_gvt_render_mmio_to_ring_id
	mov	x23, x0
Lloh0:
	adrp	x8, _I915_GTT_PAGE_SIZE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _I915_GTT_PAGE_SIZE@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	x0, x21
	mov	x1, x22
	bl	_intel_gvt_ggtt_validate_range
	cbz	w0, LBB0_3
; %bb.1:
	cmp	w23, #0
Lloh3:
	adrp	x8, _I915_NUM_ENGINES@GOTPAGE
Lloh4:
	ldr	x8, [x8, _I915_NUM_ENGINES@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	ccmp	w23, w8, #0, ge
	cset	w0, ge
	bl	_unlikely
	cbz	x0, LBB0_5
; %bb.2:
Lloh6:
	adrp	x0, l_.str.1@PAGE
Lloh7:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_4
LBB0_3:
	str	x22, [sp]
Lloh8:
	adrp	x0, l_.str@PAGE
Lloh9:
	add	x0, x0, l_.str@PAGEOFF
LBB0_4:
	mov	x1, x19
	bl	_gvt_vgpu_err
Lloh10:
	adrp	x8, _EINVAL@GOTPAGE
Lloh11:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_6
LBB0_5:
	ldr	x8, [x21, #8]
	str	w22, [x8, w23, sxtw #2]
	ldr	w1, [x21]
	ldr	w2, [sp, #12]
Lloh13:
	adrp	x0, l_.str.2@PAGE
Lloh14:
	add	x0, x0, l_.str.2@PAGEOFF
	mov	x3, x19
	bl	_gvt_dbg_mmio
	add	x2, sp, #12
	mov	x0, x21
	mov	x1, x19
	mov	x3, x20
	bl	_intel_vgpu_default_mmio_write
LBB0_6:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_I915_GTT_PAGE_SIZE,4,2         ; @I915_GTT_PAGE_SIZE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"write invalid HWSP address, reg:0x%x, value:0x%x\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_I915_NUM_ENGINES,4,2           ; @I915_NUM_ENGINES
l_.str.1:                               ; @.str.1
	.asciz	"access unknown hardware status page register:0x%x\n"

l_.str.2:                               ; @.str.2
	.asciz	"VM(%d) write: 0x%x to HWSP: 0x%x\n"

	.no_dead_strip	_hws_pga_write
.subsections_via_symbols
