	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ironlake_fdi_pll_enable
_ironlake_fdi_pll_enable:               ## @ironlake_fdi_pll_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movl	4(%rdi), %edi
	callq	_to_intel_crtc
	movq	%rax, %rbx
	movl	4(%rax), %edi
	callq	_to_i915
	movl	(%rbx), %r14d
	movl	%r14d, %edi
	callq	_FDI_RX_CTL
	movl	%eax, %r15d
	movl	%eax, %edi
	callq	_I915_READ
	movq	_FDI_DP_PORT_WIDTH_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	andl	$-458753, %ebx                  ## imm = 0xFFF8FFFF
	movl	(%r12), %edi
	callq	_FDI_DP_PORT_WIDTH
	orl	%eax, %ebx
	movl	%r14d, %edi
	callq	_PIPECONF
	movl	%eax, %edi
	callq	_I915_READ
	movq	_PIPECONF_BPC_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	shll	$11, %eax
	movq	_FDI_RX_PLL_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %ebx
	orl	%eax, %ebx
	movl	%r15d, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_POSTING_READ
	movl	$200, %edi
	callq	_udelay
	movl	%r15d, %edi
	callq	_I915_READ
	movq	_FDI_PCDCLK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_POSTING_READ
	movl	$200, %edi
	callq	_udelay
	movl	%r14d, %edi
	callq	_FDI_TX_CTL
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	_I915_READ
	movq	_FDI_TX_PLL_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	testl	%eax, %esi
	je	LBB0_2
## %bb.1:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	orl	%eax, %esi
	movl	%ebx, %edi
	callq	_I915_WRITE
	movl	%ebx, %edi
	callq	_POSTING_READ
	movl	$100, %edi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_udelay                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_FDI_DP_PORT_WIDTH_MASK,4,2     ## @FDI_DP_PORT_WIDTH_MASK
	.comm	_PIPECONF_BPC_MASK,4,2          ## @PIPECONF_BPC_MASK
	.comm	_FDI_RX_PLL_ENABLE,4,2          ## @FDI_RX_PLL_ENABLE
	.comm	_FDI_PCDCLK,4,2                 ## @FDI_PCDCLK
	.comm	_FDI_TX_PLL_ENABLE,4,2          ## @FDI_TX_PLL_ENABLE
	.no_dead_strip	_ironlake_fdi_pll_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ironlake_fdi_pll_enable
_ironlake_fdi_pll_enable:               ; @ironlake_fdi_pll_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x0
	ldr	w0, [x0, #4]
	bl	_to_intel_crtc
	mov	x19, x0
	ldr	w0, [x0, #4]
	bl	_to_i915
	ldr	w19, [x19]
	mov	x0, x19
	bl	_FDI_RX_CTL
	mov	x20, x0
	bl	_I915_READ
Lloh0:
	adrp	x8, _FDI_DP_PORT_WIDTH_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FDI_DP_PORT_WIDTH_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	bic	w8, w0, w8
	and	w22, w8, #0xfff8ffff
	ldr	w0, [x21]
	bl	_FDI_DP_PORT_WIDTH
	orr	w21, w22, w0
	mov	x0, x19
	bl	_PIPECONF
	bl	_I915_READ
Lloh3:
	adrp	x8, _PIPECONF_BPC_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PIPECONF_BPC_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh6:
	adrp	x9, _FDI_RX_PLL_ENABLE@GOTPAGE
Lloh7:
	ldr	x9, [x9, _FDI_RX_PLL_ENABLE@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w9, w21, w9
	orr	w1, w9, w8, lsl #11
	mov	x0, x20
	bl	_I915_WRITE
	mov	x0, x20
	bl	_POSTING_READ
	mov	w0, #200
	bl	_udelay
	mov	x0, x20
	bl	_I915_READ
Lloh9:
	adrp	x8, _FDI_PCDCLK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _FDI_PCDCLK@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	orr	w1, w8, w0
	mov	x0, x20
	bl	_I915_WRITE
	mov	x0, x20
	bl	_POSTING_READ
	mov	w0, #200
	bl	_udelay
	mov	x0, x19
	bl	_FDI_TX_CTL
	mov	x19, x0
	bl	_I915_READ
Lloh12:
	adrp	x8, _FDI_TX_PLL_ENABLE@GOTPAGE
Lloh13:
	ldr	x8, [x8, _FDI_TX_PLL_ENABLE@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_2:
	orr	w1, w8, w0
	mov	x0, x19
	bl	_I915_WRITE
	mov	x0, x19
	bl	_POSTING_READ
	mov	w0, #100
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_udelay
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_FDI_DP_PORT_WIDTH_MASK,4,2     ; @FDI_DP_PORT_WIDTH_MASK
	.comm	_PIPECONF_BPC_MASK,4,2          ; @PIPECONF_BPC_MASK
	.comm	_FDI_RX_PLL_ENABLE,4,2          ; @FDI_RX_PLL_ENABLE
	.comm	_FDI_PCDCLK,4,2                 ; @FDI_PCDCLK
	.comm	_FDI_TX_PLL_ENABLE,4,2          ; @FDI_TX_PLL_ENABLE
	.no_dead_strip	_ironlake_fdi_pll_enable
.subsections_via_symbols
