	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vce_v3_0_stop
_vce_v3_0_stop:                         ## @vce_v3_0_stop
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	leaq	8(%rdi), %r14
	movq	%r14, %rdi
	callq	_mutex_lock
	movl	12(%rbx), %eax
	testb	$1, %al
	jne	LBB0_5
## %bb.1:
	movq	_mmGRBM_GFX_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	xorl	%edi, %edi
	callq	_GET_VCE_INSTANCE
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	(%rbx), %rax
	movq	_CHIP_STONEY@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_2
## %bb.3:
	movq	_VCE_VCPU_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_CLK_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_WREG32_FIELD
	jmp	LBB0_4
LBB0_2:
	movq	_mmVCE_VCPU_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	movl	$-2097154, %edx                 ## imm = 0xFFDFFFFE
	callq	_WREG32_P
LBB0_4:
	movq	_VCE_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_ECPU_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_WREG32_FIELD
	movq	_mmVCE_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movl	12(%rbx), %eax
LBB0_5:
	testb	$2, %al
	jne	LBB0_10
## %bb.6:
	movq	_mmGRBM_GFX_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	$1, %edi
	callq	_GET_VCE_INSTANCE
	movl	%r15d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	(%rbx), %rax
	movq	_CHIP_STONEY@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_7
## %bb.8:
	movq	_VCE_VCPU_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_CLK_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_WREG32_FIELD
	jmp	LBB0_9
LBB0_7:
	movq	_mmVCE_VCPU_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	movl	$-2097154, %edx                 ## imm = 0xFFDFFFFE
	callq	_WREG32_P
LBB0_9:
	movq	_VCE_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_ECPU_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_WREG32_FIELD
	movq	_mmVCE_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
LBB0_10:
	movq	_mmGRBM_GFX_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmGRBM_GFX_INDEX_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	%r14, %rdi
	callq	_mutex_unlock
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_mmGRBM_GFX_INDEX,4,2           ## @mmGRBM_GFX_INDEX
	.comm	_CHIP_STONEY,8,3                ## @CHIP_STONEY
	.comm	_mmVCE_VCPU_CNTL,4,2            ## @mmVCE_VCPU_CNTL
	.comm	_VCE_VCPU_CNTL,4,2              ## @VCE_VCPU_CNTL
	.comm	_CLK_EN,4,2                     ## @CLK_EN
	.comm	_VCE_SOFT_RESET,4,2             ## @VCE_SOFT_RESET
	.comm	_ECPU_SOFT_RESET,4,2            ## @ECPU_SOFT_RESET
	.comm	_mmVCE_STATUS,4,2               ## @mmVCE_STATUS
	.comm	_mmGRBM_GFX_INDEX_DEFAULT,4,2   ## @mmGRBM_GFX_INDEX_DEFAULT
	.no_dead_strip	_vce_v3_0_stop
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vce_v3_0_stop
_vce_v3_0_stop:                         ; @vce_v3_0_stop
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x0
	add	x19, x0, #8
	mov	x0, x19
	bl	_mutex_lock
	ldr	w8, [x20, #12]
Lloh0:
	adrp	x22, _mmGRBM_GFX_INDEX@GOTPAGE
Lloh1:
	ldr	x22, [x22, _mmGRBM_GFX_INDEX@GOTPAGEOFF]
Lloh2:
	adrp	x26, _CHIP_STONEY@GOTPAGE
Lloh3:
	ldr	x26, [x26, _CHIP_STONEY@GOTPAGEOFF]
Lloh4:
	adrp	x24, _VCE_SOFT_RESET@GOTPAGE
Lloh5:
	ldr	x24, [x24, _VCE_SOFT_RESET@GOTPAGEOFF]
Lloh6:
	adrp	x25, _ECPU_SOFT_RESET@GOTPAGE
Lloh7:
	ldr	x25, [x25, _ECPU_SOFT_RESET@GOTPAGEOFF]
Lloh8:
	adrp	x23, _mmVCE_STATUS@GOTPAGE
Lloh9:
	ldr	x23, [x23, _mmVCE_STATUS@GOTPAGEOFF]
	tbnz	w8, #0, LBB0_5
; %bb.1:
	ldr	w21, [x22]
	mov	w0, #0
	bl	_GET_VCE_INSTANCE
	mov	x1, x0
	mov	x0, x21
	bl	_WREG32
	ldr	x8, [x20]
	ldr	x9, [x26]
	cmp	x8, x9
	b.ge	LBB0_3
; %bb.2:
Lloh10:
	adrp	x8, _VCE_VCPU_CNTL@GOTPAGE
Lloh11:
	ldr	x8, [x8, _VCE_VCPU_CNTL@GOTPAGEOFF]
Lloh12:
	ldr	w0, [x8]
Lloh13:
	adrp	x8, _CLK_EN@GOTPAGE
Lloh14:
	ldr	x8, [x8, _CLK_EN@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_WREG32_FIELD
	b	LBB0_4
LBB0_3:
Lloh16:
	adrp	x8, _mmVCE_VCPU_CNTL@GOTPAGE
Lloh17:
	ldr	x8, [x8, _mmVCE_VCPU_CNTL@GOTPAGEOFF]
Lloh18:
	ldr	w0, [x8]
	mov	w1, #0
	mov	w2, #65534
	movk	w2, #65503, lsl #16
	bl	_WREG32_P
LBB0_4:
	ldr	w0, [x24]
	ldr	w1, [x25]
	mov	w2, #1
	bl	_WREG32_FIELD
	ldr	w0, [x23]
	mov	w1, #0
	bl	_WREG32
	ldr	w8, [x20, #12]
LBB0_5:
	tbnz	w8, #1, LBB0_10
; %bb.6:
	ldr	w21, [x22]
	mov	w0, #1
	bl	_GET_VCE_INSTANCE
	mov	x1, x0
	mov	x0, x21
	bl	_WREG32
	ldr	x8, [x20]
	ldr	x9, [x26]
	cmp	x8, x9
	b.ge	LBB0_8
; %bb.7:
Lloh19:
	adrp	x8, _VCE_VCPU_CNTL@GOTPAGE
Lloh20:
	ldr	x8, [x8, _VCE_VCPU_CNTL@GOTPAGEOFF]
Lloh21:
	ldr	w0, [x8]
Lloh22:
	adrp	x8, _CLK_EN@GOTPAGE
Lloh23:
	ldr	x8, [x8, _CLK_EN@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_WREG32_FIELD
	b	LBB0_9
LBB0_8:
Lloh25:
	adrp	x8, _mmVCE_VCPU_CNTL@GOTPAGE
Lloh26:
	ldr	x8, [x8, _mmVCE_VCPU_CNTL@GOTPAGEOFF]
Lloh27:
	ldr	w0, [x8]
	mov	w1, #0
	mov	w2, #65534
	movk	w2, #65503, lsl #16
	bl	_WREG32_P
LBB0_9:
	ldr	w0, [x24]
	ldr	w1, [x25]
	mov	w2, #1
	bl	_WREG32_FIELD
	ldr	w0, [x23]
	mov	w1, #0
	bl	_WREG32
LBB0_10:
	ldr	w0, [x22]
Lloh28:
	adrp	x8, _mmGRBM_GFX_INDEX_DEFAULT@GOTPAGE
Lloh29:
	ldr	x8, [x8, _mmGRBM_GFX_INDEX_DEFAULT@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
	bl	_WREG32
	mov	x0, x19
	bl	_mutex_unlock
	mov	w0, #0
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.cfi_endproc
                                        ; -- End function
	.comm	_mmGRBM_GFX_INDEX,4,2           ; @mmGRBM_GFX_INDEX
	.comm	_CHIP_STONEY,8,3                ; @CHIP_STONEY
	.comm	_mmVCE_VCPU_CNTL,4,2            ; @mmVCE_VCPU_CNTL
	.comm	_VCE_VCPU_CNTL,4,2              ; @VCE_VCPU_CNTL
	.comm	_CLK_EN,4,2                     ; @CLK_EN
	.comm	_VCE_SOFT_RESET,4,2             ; @VCE_SOFT_RESET
	.comm	_ECPU_SOFT_RESET,4,2            ; @ECPU_SOFT_RESET
	.comm	_mmVCE_STATUS,4,2               ; @mmVCE_STATUS
	.comm	_mmGRBM_GFX_INDEX_DEFAULT,4,2   ; @mmGRBM_GFX_INDEX_DEFAULT
	.no_dead_strip	_vce_v3_0_stop
.subsections_via_symbols
