	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vcn_v1_0_hw_fini
_vcn_v1_0_hw_fini:                      ## @vcn_v1_0_hw_fini
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %r14
	movq	_AMD_PG_SUPPORT_VCN_DPG@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rdi)
	jne	LBB0_2
## %bb.1:
	movq	_VCN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmUVD_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	testq	%rax, %rax
	je	LBB0_3
LBB0_2:
	movq	_AMD_PG_STATE_GATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_vcn_v1_0_set_powergating_state
LBB0_3:
	movl	$0, (%r14)
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_PG_SUPPORT_VCN_DPG,4,2     ## @AMD_PG_SUPPORT_VCN_DPG
	.comm	_VCN,4,2                        ## @VCN
	.comm	_mmUVD_STATUS,4,2               ## @mmUVD_STATUS
	.comm	_AMD_PG_STATE_GATE,4,2          ## @AMD_PG_STATE_GATE
	.no_dead_strip	_vcn_v1_0_hw_fini
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vcn_v1_0_hw_fini
_vcn_v1_0_hw_fini:                      ; @vcn_v1_0_hw_fini
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x20, [x0, #8]
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _AMD_PG_SUPPORT_VCN_DPG@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMD_PG_SUPPORT_VCN_DPG@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _VCN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VCN@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
Lloh6:
	adrp	x8, _mmUVD_STATUS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _mmUVD_STATUS@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	cbz	x0, LBB0_3
LBB0_2:
Lloh9:
	adrp	x8, _AMD_PG_STATE_GATE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AMD_PG_STATE_GATE@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_vcn_v1_0_set_powergating_state
LBB0_3:
	str	wzr, [x20]
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_PG_SUPPORT_VCN_DPG,4,2     ; @AMD_PG_SUPPORT_VCN_DPG
	.comm	_VCN,4,2                        ; @VCN
	.comm	_mmUVD_STATUS,4,2               ; @mmUVD_STATUS
	.comm	_AMD_PG_STATE_GATE,4,2          ; @AMD_PG_STATE_GATE
	.no_dead_strip	_vcn_v1_0_hw_fini
.subsections_via_symbols
