	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nbio_v7_4_detect_hw_virt
_nbio_v7_4_detect_hw_virt:              ## @nbio_v7_4_detect_hw_virt
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	_NBIO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmRCC_IOV_FUNC_IDENTIFIER@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	testb	$1, %al
	je	LBB0_2
## %bb.1:
	movq	_AMDGPU_SRIOV_CAPS_IS_VF@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, (%rbx)
LBB0_2:
	testl	%eax, %eax
	js	LBB0_3
## %bb.4:
	jne	LBB0_8
## %bb.5:
	xorl	%eax, %eax
	callq	_is_virtual_machine
	testq	%rax, %rax
	je	LBB0_8
## %bb.6:
	movq	_AMDGPU_PASSTHROUGH_MODE@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_3:
	movq	_AMDGPU_SRIOV_CAPS_ENABLE_IOV@GOTPCREL(%rip), %rax
LBB0_7:
	movl	(%rax), %eax
	orl	%eax, (%rbx)
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NBIO,4,2                       ## @NBIO
	.comm	_mmRCC_IOV_FUNC_IDENTIFIER,4,2  ## @mmRCC_IOV_FUNC_IDENTIFIER
	.comm	_AMDGPU_SRIOV_CAPS_IS_VF,4,2    ## @AMDGPU_SRIOV_CAPS_IS_VF
	.comm	_AMDGPU_SRIOV_CAPS_ENABLE_IOV,4,2 ## @AMDGPU_SRIOV_CAPS_ENABLE_IOV
	.comm	_AMDGPU_PASSTHROUGH_MODE,4,2    ## @AMDGPU_PASSTHROUGH_MODE
	.no_dead_strip	_nbio_v7_4_detect_hw_virt
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nbio_v7_4_detect_hw_virt
_nbio_v7_4_detect_hw_virt:              ; @nbio_v7_4_detect_hw_virt
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _NBIO@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NBIO@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x8, _mmRCC_IOV_FUNC_IDENTIFIER@GOTPAGE
Lloh4:
	ldr	x8, [x8, _mmRCC_IOV_FUNC_IDENTIFIER@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	tbz	w0, #0, LBB0_2
; %bb.1:
Lloh6:
	adrp	x8, _AMDGPU_SRIOV_CAPS_IS_VF@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AMDGPU_SRIOV_CAPS_IS_VF@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_2:
	tbnz	w0, #31, LBB0_6
; %bb.3:
	cbnz	w0, LBB0_8
; %bb.4:
	bl	_is_virtual_machine
	cbz	x0, LBB0_8
; %bb.5:
Lloh9:
	adrp	x8, _AMDGPU_PASSTHROUGH_MODE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AMDGPU_PASSTHROUGH_MODE@GOTPAGEOFF]
	b	LBB0_7
LBB0_6:
Lloh11:
	adrp	x8, _AMDGPU_SRIOV_CAPS_ENABLE_IOV@GOTPAGE
Lloh12:
	ldr	x8, [x8, _AMDGPU_SRIOV_CAPS_ENABLE_IOV@GOTPAGEOFF]
LBB0_7:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_8:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_NBIO,4,2                       ; @NBIO
	.comm	_mmRCC_IOV_FUNC_IDENTIFIER,4,2  ; @mmRCC_IOV_FUNC_IDENTIFIER
	.comm	_AMDGPU_SRIOV_CAPS_IS_VF,4,2    ; @AMDGPU_SRIOV_CAPS_IS_VF
	.comm	_AMDGPU_SRIOV_CAPS_ENABLE_IOV,4,2 ; @AMDGPU_SRIOV_CAPS_ENABLE_IOV
	.comm	_AMDGPU_PASSTHROUGH_MODE,4,2    ; @AMDGPU_PASSTHROUGH_MODE
	.no_dead_strip	_nbio_v7_4_detect_hw_virt
.subsections_via_symbols
