	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_meson_viu_osd1_reset           ## -- Begin function meson_viu_osd1_reset
	.p2align	4, 0x90
_meson_viu_osd1_reset:                  ## @meson_viu_osd1_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	(%rdi), %rbx
	movq	_VIU_OSD1_FIFO_CTRL_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movq	%rbx, %rdi
	callq	_readl_relaxed
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	(%r12), %rbx
	movq	_VIU_OSD1_CTRL_STAT2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movq	%rbx, %rdi
	callq	_readl_relaxed
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_VIU_SW_RESET_OSD1@GOTPCREL(%rip), %r14
	movl	(%r14), %r13d
	movq	(%r12), %rbx
	movq	_VIU_SW_RESET@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	%r13d, %edi
	movl	%r13d, %esi
	movq	%rbx, %rdx
	callq	_writel_bits_relaxed
	movl	(%r14), %r13d
	movq	(%r12), %rbx
	movl	(%r15), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	%r13d, %edi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	_writel_bits_relaxed
	movq	(%r12), %rbx
	movq	_VIU_OSD1_FIFO_CTRL_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	movq	%rbx, %rsi
	callq	_writel_relaxed
	movq	(%r12), %rbx
	movq	_VIU_OSD1_CTRL_STAT2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__REG
	addq	%rax, %rbx
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	movq	%rbx, %rsi
	callq	_writel_relaxed
	movq	%r12, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_meson_viu_load_matrix          ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VIU_OSD1_FIFO_CTRL_STAT,4,2    ## @VIU_OSD1_FIFO_CTRL_STAT
	.comm	_VIU_OSD1_CTRL_STAT2,4,2        ## @VIU_OSD1_CTRL_STAT2
	.comm	_VIU_SW_RESET_OSD1,4,2          ## @VIU_SW_RESET_OSD1
	.comm	_VIU_SW_RESET,4,2               ## @VIU_SW_RESET
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_meson_viu_osd1_reset           ; -- Begin function meson_viu_osd1_reset
	.p2align	2
_meson_viu_osd1_reset:                  ; @meson_viu_osd1_reset
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	x20, [x0]
Lloh0:
	adrp	x23, _VIU_OSD1_FIFO_CTRL_STAT@GOTPAGE
Lloh1:
	ldr	x23, [x23, _VIU_OSD1_FIFO_CTRL_STAT@GOTPAGEOFF]
	ldr	w0, [x23]
	bl	__REG
	add	x0, x0, x20
	bl	_readl_relaxed
	mov	x20, x0
	ldr	x21, [x19]
Lloh2:
	adrp	x24, _VIU_OSD1_CTRL_STAT2@GOTPAGE
Lloh3:
	ldr	x24, [x24, _VIU_OSD1_CTRL_STAT2@GOTPAGEOFF]
	ldr	w0, [x24]
	bl	__REG
	add	x0, x0, x21
	bl	_readl_relaxed
	mov	x21, x0
Lloh4:
	adrp	x25, _VIU_SW_RESET_OSD1@GOTPAGE
Lloh5:
	ldr	x25, [x25, _VIU_SW_RESET_OSD1@GOTPAGEOFF]
	ldr	w22, [x25]
	ldr	x26, [x19]
Lloh6:
	adrp	x27, _VIU_SW_RESET@GOTPAGE
Lloh7:
	ldr	x27, [x27, _VIU_SW_RESET@GOTPAGEOFF]
	ldr	w0, [x27]
	bl	__REG
	add	x2, x0, x26
	mov	x0, x22
	mov	x1, x22
	bl	_writel_bits_relaxed
	ldr	w22, [x25]
	ldr	x25, [x19]
	ldr	w0, [x27]
	bl	__REG
	add	x2, x0, x25
	mov	x0, x22
	mov	w1, #0
	bl	_writel_bits_relaxed
	ldr	x22, [x19]
	ldr	w0, [x23]
	bl	__REG
	add	x1, x0, x22
	mov	x0, x20
	bl	_writel_relaxed
	ldr	x20, [x19]
	ldr	w0, [x24]
	bl	__REG
	add	x1, x0, x20
	mov	x0, x21
	bl	_writel_relaxed
	mov	x0, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_meson_viu_load_matrix
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_VIU_OSD1_FIFO_CTRL_STAT,4,2    ; @VIU_OSD1_FIFO_CTRL_STAT
	.comm	_VIU_OSD1_CTRL_STAT2,4,2        ; @VIU_OSD1_CTRL_STAT2
	.comm	_VIU_SW_RESET_OSD1,4,2          ; @VIU_SW_RESET_OSD1
	.comm	_VIU_SW_RESET,4,2               ; @VIU_SW_RESET
.subsections_via_symbols
