	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dpu_hw_pp_setup_te_config
_dpu_hw_pp_setup_te_config:             ## @dpu_hw_pp_setup_te_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	testq	%rdi, %rdi
	je	LBB0_2
## %bb.1:
	movq	%rsi, %rbx
	testq	%rsi, %rsi
	je	LBB0_2
## %bb.3:
	movq	%rdi, %r14
	movl	$19, %edi
	callq	_BIT
	movl	%eax, %r15d
	cmpq	$0, 32(%rbx)
	je	LBB0_5
## %bb.4:
	movl	$20, %edi
	callq	_BIT
	orl	%eax, %r15d
LBB0_5:
	orl	(%rbx), %r15d
	movq	_PP_SYNC_CONFIG_VSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_DPU_REG_WRITE
	movq	_PP_SYNC_CONFIG_HEIGHT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%rbx), %edx
	movq	%r14, %rdi
	callq	_DPU_REG_WRITE
	movq	_PP_VSYNC_INIT_VAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	8(%rbx), %edx
	movq	%r14, %rdi
	callq	_DPU_REG_WRITE
	movq	_PP_RD_PTR_IRQ@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	12(%rbx), %edx
	movq	%r14, %rdi
	callq	_DPU_REG_WRITE
	movq	_PP_START_POS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	16(%rbx), %edx
	movq	%r14, %rdi
	callq	_DPU_REG_WRITE
	movq	_PP_SYNC_THRESH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	20(%rbx), %edx
	shll	$16, %edx
	orl	24(%rbx), %edx
	movq	%r14, %rdi
	callq	_DPU_REG_WRITE
	movq	_PP_SYNC_WRCOUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	16(%rbx), %eax
	movl	24(%rbx), %ecx
	leal	(%rax,%rcx), %edx
	incl	%edx
	movq	%r14, %rdi
	callq	_DPU_REG_WRITE
	xorl	%eax, %eax
	jmp	LBB0_6
LBB0_2:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_PP_SYNC_CONFIG_VSYNC,4,2       ## @PP_SYNC_CONFIG_VSYNC
	.comm	_PP_SYNC_CONFIG_HEIGHT,4,2      ## @PP_SYNC_CONFIG_HEIGHT
	.comm	_PP_VSYNC_INIT_VAL,4,2          ## @PP_VSYNC_INIT_VAL
	.comm	_PP_RD_PTR_IRQ,4,2              ## @PP_RD_PTR_IRQ
	.comm	_PP_START_POS,4,2               ## @PP_START_POS
	.comm	_PP_SYNC_THRESH,4,2             ## @PP_SYNC_THRESH
	.comm	_PP_SYNC_WRCOUNT,4,2            ## @PP_SYNC_WRCOUNT
	.no_dead_strip	_dpu_hw_pp_setup_te_config
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dpu_hw_pp_setup_te_config
_dpu_hw_pp_setup_te_config:             ; @dpu_hw_pp_setup_te_config
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	cbz	x0, LBB0_5
; %bb.1:
	mov	x20, x1
	cbz	x1, LBB0_5
; %bb.2:
	mov	x19, x0
	mov	w0, #19
	bl	_BIT
	mov	x21, x0
	ldr	x8, [x20, #32]
	cbz	x8, LBB0_4
; %bb.3:
	mov	w0, #20
	bl	_BIT
	orr	w21, w0, w21
LBB0_4:
	ldr	w8, [x20]
	orr	w2, w8, w21
Lloh0:
	adrp	x8, _PP_SYNC_CONFIG_VSYNC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PP_SYNC_CONFIG_VSYNC@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_DPU_REG_WRITE
Lloh3:
	adrp	x8, _PP_SYNC_CONFIG_HEIGHT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PP_SYNC_CONFIG_HEIGHT@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	w2, [x20, #4]
	mov	x0, x19
	bl	_DPU_REG_WRITE
Lloh6:
	adrp	x8, _PP_VSYNC_INIT_VAL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PP_VSYNC_INIT_VAL@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	ldr	w2, [x20, #8]
	mov	x0, x19
	bl	_DPU_REG_WRITE
Lloh9:
	adrp	x8, _PP_RD_PTR_IRQ@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PP_RD_PTR_IRQ@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	w2, [x20, #12]
	mov	x0, x19
	bl	_DPU_REG_WRITE
Lloh12:
	adrp	x8, _PP_START_POS@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PP_START_POS@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	w2, [x20, #16]
	mov	x0, x19
	bl	_DPU_REG_WRITE
Lloh15:
	adrp	x8, _PP_SYNC_THRESH@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PP_SYNC_THRESH@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	ldp	w8, w9, [x20, #20]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_DPU_REG_WRITE
Lloh18:
	adrp	x8, _PP_SYNC_WRCOUNT@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PP_SYNC_WRCOUNT@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	ldr	w8, [x20, #16]
	ldr	w9, [x20, #24]
	add	w8, w8, w9
	add	w2, w8, #1
	mov	x0, x19
	bl	_DPU_REG_WRITE
	mov	w0, #0
	b	LBB0_6
LBB0_5:
Lloh21:
	adrp	x8, _EINVAL@GOTPAGE
Lloh22:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_6:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_PP_SYNC_CONFIG_VSYNC,4,2       ; @PP_SYNC_CONFIG_VSYNC
	.comm	_PP_SYNC_CONFIG_HEIGHT,4,2      ; @PP_SYNC_CONFIG_HEIGHT
	.comm	_PP_VSYNC_INIT_VAL,4,2          ; @PP_VSYNC_INIT_VAL
	.comm	_PP_RD_PTR_IRQ,4,2              ; @PP_RD_PTR_IRQ
	.comm	_PP_START_POS,4,2               ; @PP_START_POS
	.comm	_PP_SYNC_THRESH,4,2             ; @PP_SYNC_THRESH
	.comm	_PP_SYNC_WRCOUNT,4,2            ; @PP_SYNC_WRCOUNT
	.no_dead_strip	_dpu_hw_pp_setup_te_config
.subsections_via_symbols
