	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_cgs_get_firmware_info
_amdgpu_cgs_get_firmware_info:          ## @amdgpu_cgs_get_firmware_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movl	%esi, %r15d
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	movq	_CGS_UCODE_ID_SMU@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_CGS_UCODE_ID_SMU_SK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	%esi, %edx
	je	LBB0_11
## %bb.1:
	cmpl	%r15d, %eax
	je	LBB0_11
## %bb.2:
	movq	%rdi, %rbx
	movq	%r14, -96(%rbp)                 ## 8-byte Spill
	movl	%r15d, %esi
	callq	_fw_type_convert
	movq	_adev@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	40(%rcx), %rcx
	movl	%eax, %r14d
	shlq	$5, %r14
	movq	8(%rcx,%r14), %rax
	testq	%rax, %rax
	je	LBB0_10
## %bb.3:
	movq	%rcx, -104(%rbp)                ## 8-byte Spill
	movl	24(%rcx,%r14), %ecx
	movl	%ecx, -84(%rbp)                 ## 4-byte Spill
	movslq	(%rax), %r13
	movl	12(%r13), %edi
	callq	_le32_to_cpu
	movq	_CGS_UCODE_ID_CP_MEC_JT1@GOTPCREL(%rip), %rcx
	cmpl	%r15d, (%rcx)
	movq	%rbx, -112(%rbp)                ## 8-byte Spill
	je	LBB0_6
## %bb.4:
	movq	_CGS_UCODE_ID_CP_MEC_JT2@GOTPCREL(%rip), %rcx
	cmpl	%r15d, (%rcx)
	je	LBB0_6
## %bb.5:
	movl	-84(%rbp), %r12d                ## 4-byte Reload
	jmp	LBB0_7
LBB0_11:
	xorps	%xmm0, %xmm0
	movups	%xmm0, -66(%rbp)
	movaps	%xmm0, -80(%rbp)
	movq	_adev@GOTPCREL(%rip), %r12
	movq	(%r12), %rcx
	cmpq	$0, 16(%rcx)
	je	LBB0_13
## %bb.12:
	movq	%r14, -96(%rbp)                 ## 8-byte Spill
LBB0_107:
	movq	16(%rcx), %rax
	movslq	(%rax), %rbx
	movq	%rbx, %rdi
	callq	_amdgpu_ucode_print_smc_hdr
	movl	8(%rbx), %edi
	callq	_le32_to_cpu
	movq	(%r12), %rcx
	movl	%eax, 8(%rcx)
	movl	4(%rbx), %edi
	callq	_le32_to_cpu
	movl	%eax, %r15d
	movl	12(%rbx), %edi
	callq	_le32_to_cpu
	movslq	%eax, %r14
	movq	(%r12), %rax
	movq	16(%rax), %rax
	movslq	(%rax), %r13
	movl	(%rbx), %edi
	callq	_le32_to_cpu
	cltq
	addq	%r13, %rax
	movq	(%r12), %rcx
	movl	8(%rcx), %ecx
	movq	-96(%rbp), %r12                 ## 8-byte Reload
	movl	%ecx, 4(%r12)
	movl	%r15d, (%r12)
	movq	%r14, 24(%r12)
	movq	%rax, 16(%r12)
	jmp	LBB0_108
LBB0_13:
	movl	(%rcx), %edi
	addl	$-128, %edi
	cmpl	$16, %edi
	ja	LBB0_102
## %bb.14:
	leaq	L_.str(%rip), %rsi
	leaq	LJTI0_0(%rip), %r8
	movslq	(%r8,%rdi,4), %rdi
	addq	%r8, %rdi
	jmpq	*%rdi
LBB0_18:
	movq	56(%rcx), %rcx
	movl	4(%rcx), %eax
	cmpl	$26656, %eax                    ## imm = 0x6820
	je	LBB0_23
## %bb.19:
	cmpl	$26657, %eax                    ## imm = 0x6821
	jne	LBB0_20
## %bb.21:
	movl	(%rcx), %eax
	orl	$4, %eax
	cmpl	$135, %eax
	je	LBB0_26
## %bb.22:
	leaq	L_.str.4(%rip), %rsi
	jmp	LBB0_99
LBB0_10:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_109
LBB0_6:
	movl	12(%r13), %edi
	callq	_le32_to_cpu
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	callq	_ALIGN
	movl	-84(%rbp), %r12d                ## 4-byte Reload
	addl	%eax, %r12d
	movl	16(%r13), %edi
	callq	_le32_to_cpu
	shll	$2, %eax
LBB0_7:
	movq	-104(%rbp), %rcx                ## 8-byte Reload
	movq	16(%rcx,%r14), %rcx
	movq	-96(%rbp), %rbx                 ## 8-byte Reload
	movq	%rcx, 16(%rbx)
	movl	%eax, (%rbx)
	movl	%r12d, 44(%rbx)
	movl	8(%r13), %edi
	callq	_le32_to_cpu
	movl	%eax, 4(%rbx)
	movq	_CGS_UCODE_ID_CP_MEC@GOTPCREL(%rip), %rax
	cmpl	%r15d, (%rax)
	jne	LBB0_9
## %bb.8:
	movl	4(%r13), %edi
	callq	_le32_to_cpu
	shll	$2, %eax
	movl	%eax, (%rbx)
LBB0_9:
	movq	-112(%rbp), %rdi                ## 8-byte Reload
	movl	%r15d, %esi
	callq	_amdgpu_get_firmware_version
	movl	%eax, 40(%rbx)
	movl	(%r13), %edi
	callq	_le32_to_cpu
	cltq
	movq	%rax, 32(%rbx)
LBB0_108:
	xorl	%ebx, %ebx
LBB0_109:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_111
## %bb.110:
	movl	%ebx, %eax
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_102:
	leaq	L_.str.34(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_ERROR
	movq	_EINVAL@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_109
LBB0_93:
	leaq	L_.str.29(%rip), %rsi
	jmp	LBB0_99
LBB0_98:
	leaq	L_.str.33(%rip), %rsi
	jmp	LBB0_99
LBB0_97:
	leaq	L_.str.32(%rip), %rsi
	jmp	LBB0_99
LBB0_94:
	movq	56(%rcx), %rcx
	leaq	L_.str.31(%rip), %rsi
	cmpl	$26751, 4(%rcx)                 ## imm = 0x687F
	jne	LBB0_99
## %bb.95:
	movl	$-192, %eax
	addl	(%rcx), %eax
	cmpl	$4, %eax
	jae	LBB0_99
## %bb.96:
	cltq
	leaq	l_reltable.amdgpu_cgs_get_firmware_info(%rip), %rcx
	movslq	(%rcx,%rax,4), %rsi
	addq	%rcx, %rsi
	jmp	LBB0_99
LBB0_49:
	movq	56(%rcx), %rax
	movl	4(%rax), %ecx
	leaq	L_.str.15(%rip), %rsi
	cmpl	$26887, %ecx                    ## imm = 0x6907
	je	LBB0_56
## %bb.50:
	cmpl	$26880, %ecx                    ## imm = 0x6900
	jne	LBB0_99
## %bb.51:
	movl	(%rax), %eax
	cmpl	$208, %eax
	jg	LBB0_54
## %bb.52:
	cmpl	$129, %eax
	je	LBB0_57
## %bb.53:
	cmpl	$131, %eax
	je	LBB0_57
	jmp	LBB0_99
LBB0_58:
	movq	56(%rcx), %rax
	movl	4(%rax), %ecx
	leaq	L_.str.17(%rip), %rsi
	cmpl	$26936, %ecx                    ## imm = 0x6938
	je	LBB0_60
## %bb.59:
	cmpl	$26937, %ecx                    ## imm = 0x6939
	jne	LBB0_99
LBB0_60:
	cmpl	$241, (%rax)
	jne	LBB0_99
## %bb.61:
	movl	$1, 8(%r14)
	leaq	L_.str.16(%rip), %rsi
	jmp	LBB0_99
LBB0_86:
	movq	56(%rcx), %rax
	movl	4(%rax), %ecx
	leaq	L_.str.28(%rip), %rsi
	cmpl	$27009, %ecx                    ## imm = 0x6981
	je	LBB0_90
## %bb.87:
	cmpl	$27015, %ecx                    ## imm = 0x6987
	jne	LBB0_99
## %bb.88:
	movl	(%rax), %eax
	cmpl	$192, %eax
	je	LBB0_92
## %bb.89:
	cmpl	$195, %eax
	je	LBB0_92
	jmp	LBB0_99
LBB0_63:
	cmpl	%r15d, %edx
	jne	LBB0_73
## %bb.64:
	movq	56(%rcx), %rax
	movl	4(%rax), %ecx
	leaq	L_.str.21(%rip), %rsi
	cmpl	$26623, %ecx                    ## imm = 0x67FF
	je	LBB0_69
## %bb.65:
	cmpl	$26607, %ecx                    ## imm = 0x67EF
	jne	LBB0_99
## %bb.66:
	movl	(%rax), %eax
	cmpl	$224, %eax
	je	LBB0_71
## %bb.67:
	cmpl	$226, %eax
	je	LBB0_72
## %bb.68:
	cmpl	$229, %eax
	je	LBB0_71
	jmp	LBB0_99
LBB0_75:
	cmpl	%r15d, %edx
	jne	LBB0_84
## %bb.76:
	movq	56(%rcx), %rax
	movl	4(%rax), %ecx
	leaq	L_.str.25(%rip), %rsi
	cmpl	$28639, %ecx                    ## imm = 0x6FDF
	je	LBB0_82
## %bb.77:
	cmpl	$26591, %ecx                    ## imm = 0x67DF
	jne	LBB0_99
## %bb.78:
	movl	$-224, %ecx
	addl	(%rax), %ecx
	cmpl	$23, %ecx
	ja	LBB0_99
## %bb.79:
	movl	$32953, %eax                    ## imm = 0x80B9
	btl	%ecx, %eax
	jb	LBB0_83
## %bb.80:
	movl	$8388610, %eax                  ## imm = 0x800002
	btl	%ecx, %eax
	jae	LBB0_99
## %bb.81:
	movl	$1, 8(%r14)
	leaq	L_.str.24(%rip), %rsi
	jmp	LBB0_99
LBB0_15:
	movq	56(%rcx), %rax
	leaq	L_.str.2(%rip), %rsi
	cmpl	$129, (%rax)
	jne	LBB0_99
## %bb.16:
	movl	4(%rax), %eax
	andl	$-2, %eax
	cmpl	$26640, %eax                    ## imm = 0x6810
	jne	LBB0_99
## %bb.17:
	movl	$1, 8(%r14)
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_99
LBB0_27:
	movq	56(%rcx), %rax
	movl	(%rax), %ecx
	leaq	L_.str.6(%rip), %rsi
	cmpl	$131, %ecx
	je	LBB0_31
## %bb.28:
	cmpl	$129, %ecx
	jne	LBB0_99
## %bb.29:
	movl	$-26112, %ecx                   ## imm = 0x9A00
	addl	4(%rax), %ecx
	cmpl	$16, %ecx
	ja	LBB0_99
## %bb.30:
	movl	$65585, %eax                    ## imm = 0x10031
	btl	%ecx, %eax
	jb	LBB0_32
	jmp	LBB0_99
LBB0_46:
	movq	56(%rcx), %rax
	cmpl	$128, (%rax)
	jne	LBB0_47
## %bb.48:
	movl	$1, 8(%r14)
	leaq	L_.str.12(%rip), %rsi
	jmp	LBB0_99
LBB0_33:
	movq	56(%rcx), %rax
	movl	(%rax), %ecx
	leaq	L_.str.9(%rip), %rsi
	cmpl	$195, %ecx
	je	LBB0_40
## %bb.34:
	cmpl	$131, %ecx
	je	LBB0_37
## %bb.35:
	cmpl	$129, %ecx
	jne	LBB0_99
## %bb.36:
	cmpl	$26208, 4(%rax)                 ## imm = 0x6660
	je	LBB0_39
	jmp	LBB0_99
LBB0_62:
	leaq	L_.str.18(%rip), %rsi
	jmp	LBB0_99
LBB0_42:
	movq	56(%rcx), %rax
	movl	(%rax), %ecx
	andl	$-2, %ecx
	cmpl	$128, %ecx
	je	LBB0_45
## %bb.43:
	cmpl	$26207, 4(%rax)                 ## imm = 0x665F
	jne	LBB0_44
LBB0_45:
	movl	$1, 8(%r14)
	leaq	L_.str.10(%rip), %rsi
	jmp	LBB0_99
LBB0_73:
	cmpl	%r15d, %eax
	jne	LBB0_100
## %bb.74:
	leaq	L_.str.22(%rip), %rsi
	jmp	LBB0_99
LBB0_84:
	cmpl	%r15d, %eax
	jne	LBB0_100
## %bb.85:
	leaq	L_.str.26(%rip), %rsi
	jmp	LBB0_99
LBB0_47:
	leaq	L_.str.13(%rip), %rsi
	jmp	LBB0_99
LBB0_23:
	movl	(%rcx), %ecx
	movl	%ecx, %edx
	orl	$2, %edx
	cmpl	$131, %edx
	je	LBB0_26
	jmp	LBB0_24
LBB0_20:
	movl	(%rcx), %ecx
LBB0_24:
	leaq	L_.str.4(%rip), %rsi
	cmpl	$135, %ecx
	jne	LBB0_99
## %bb.25:
	orl	$8, %eax
	cmpl	$26667, %eax                    ## imm = 0x682B
	jne	LBB0_99
LBB0_26:
	movl	$1, 8(%r14)
	leaq	L_.str.3(%rip), %rsi
	jmp	LBB0_99
LBB0_56:
	cmpl	$135, (%rax)
	je	LBB0_57
	jmp	LBB0_99
LBB0_90:
	movl	(%rax), %eax
	cmpl	$16, %eax
	ja	LBB0_99
## %bb.91:
	movl	$65539, %ecx                    ## imm = 0x10003
	btl	%eax, %ecx
	jae	LBB0_99
LBB0_92:
	movl	$1, 8(%r14)
	leaq	L_.str.27(%rip), %rsi
	jmp	LBB0_99
LBB0_31:
	cmpl	$26128, 4(%rax)                 ## imm = 0x6610
	jne	LBB0_99
LBB0_32:
	movl	$1, 8(%r14)
	leaq	L_.str.5(%rip), %rsi
	jmp	LBB0_99
LBB0_40:
	cmpl	$26213, 4(%rax)                 ## imm = 0x6665
	jne	LBB0_99
## %bb.41:
	movl	$1, 8(%r14)
	leaq	L_.str.8(%rip), %rsi
	jmp	LBB0_99
LBB0_37:
	movl	$-26208, %ecx                   ## imm = 0x99A0
	addl	4(%rax), %ecx
	cmpl	$7, %ecx
	ja	LBB0_99
## %bb.38:
	movl	$169, %eax
	btl	%ecx, %eax
	jae	LBB0_99
LBB0_39:
	movl	$1, 8(%r14)
	leaq	L_.str.7(%rip), %rsi
	jmp	LBB0_99
LBB0_44:
	leaq	L_.str.11(%rip), %rsi
	jmp	LBB0_99
LBB0_54:
	cmpl	$209, %eax
	je	LBB0_57
## %bb.55:
	cmpl	$211, %eax
	jne	LBB0_99
LBB0_57:
	movl	$1, 8(%r14)
	leaq	L_.str.14(%rip), %rsi
	jmp	LBB0_99
LBB0_69:
	movl	$-207, %ecx
	addl	(%rax), %ecx
	cmpl	$48, %ecx
	ja	LBB0_99
## %bb.70:
	movabsq	$281479271677953, %rax          ## imm = 0x1000100000001
	btq	%rcx, %rax
	jae	LBB0_99
LBB0_71:
	movl	$1, 8(%r14)
	leaq	L_.str.19(%rip), %rsi
	jmp	LBB0_99
LBB0_82:
	movl	(%rax), %eax
	orl	$16, %eax
	cmpl	$255, %eax
	jne	LBB0_99
LBB0_83:
	movl	$1, 8(%r14)
	leaq	L_.str.23(%rip), %rsi
LBB0_99:
	leaq	-80(%rbp), %rdi
	callq	_strcpy
LBB0_100:
	movq	(%r12), %rdi
	movl	48(%rdi), %edx
	addq	$16, %rdi
	leaq	-80(%rbp), %rsi
	callq	_request_firmware
	testl	%eax, %eax
	je	LBB0_103
## %bb.101:
	movl	%eax, %ebx
	leaq	L_.str.35(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_109
LBB0_103:
	movq	(%r12), %rax
	movq	16(%rax), %rdi
	callq	_amdgpu_ucode_validate
	testl	%eax, %eax
	je	LBB0_105
## %bb.104:
	movl	%eax, %ebx
	leaq	L_.str.36(%rip), %rdi
	leaq	-80(%rbp), %rsi
	xorl	%eax, %eax
	callq	_DRM_ERROR
	movq	(%r12), %rax
	movq	16(%rax), %rdi
	callq	_release_firmware
	movq	(%r12), %rax
	movq	$0, 16(%rax)
	jmp	LBB0_109
LBB0_105:
	movq	(%r12), %rcx
	movq	24(%rcx), %rax
	movq	_AMDGPU_FW_LOAD_PSP@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rax
	movq	%r14, -96(%rbp)                 ## 8-byte Spill
	jne	LBB0_107
## %bb.106:
	movq	40(%rcx), %rax
	movq	_AMDGPU_UCODE_ID_SMC@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	%rdx, %rsi
	shlq	$5, %rsi
	movq	%rdx, (%rax,%rsi)
	movq	16(%rcx), %rcx
	movq	%rcx, 8(%rax,%rsi)
	movslq	(%rcx), %rax
	movl	(%rax), %edi
	callq	_le32_to_cpu
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	callq	_ALIGN
	movq	(%r12), %rcx
	addl	%eax, 32(%rcx)
	jmp	LBB0_107
LBB0_72:
	movl	$1, 8(%r14)
	leaq	L_.str.20(%rip), %rsi
	jmp	LBB0_99
LBB0_111:
	callq	___stack_chk_fail
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_93, LBB0_93-LJTI0_0
.set L0_0_set_98, LBB0_98-LJTI0_0
.set L0_0_set_97, LBB0_97-LJTI0_0
.set L0_0_set_94, LBB0_94-LJTI0_0
.set L0_0_set_49, LBB0_49-LJTI0_0
.set L0_0_set_58, LBB0_58-LJTI0_0
.set L0_0_set_99, LBB0_99-LJTI0_0
.set L0_0_set_86, LBB0_86-LJTI0_0
.set L0_0_set_63, LBB0_63-LJTI0_0
.set L0_0_set_75, LBB0_75-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_27, LBB0_27-LJTI0_0
.set L0_0_set_46, LBB0_46-LJTI0_0
.set L0_0_set_33, LBB0_33-LJTI0_0
.set L0_0_set_62, LBB0_62-LJTI0_0
.set L0_0_set_42, LBB0_42-LJTI0_0
LJTI0_0:
	.long	L0_0_set_18
	.long	L0_0_set_93
	.long	L0_0_set_98
	.long	L0_0_set_97
	.long	L0_0_set_94
	.long	L0_0_set_49
	.long	L0_0_set_58
	.long	L0_0_set_99
	.long	L0_0_set_86
	.long	L0_0_set_63
	.long	L0_0_set_75
	.long	L0_0_set_15
	.long	L0_0_set_27
	.long	L0_0_set_46
	.long	L0_0_set_33
	.long	L0_0_set_62
	.long	L0_0_set_42
	.end_data_region
                                        ## -- End function
	.comm	_CGS_FUNC_ADEV,4,2              ## @CGS_FUNC_ADEV
	.comm	_CGS_UCODE_ID_SMU,4,2           ## @CGS_UCODE_ID_SMU
	.comm	_CGS_UCODE_ID_SMU_SK,4,2        ## @CGS_UCODE_ID_SMU_SK
	.comm	_adev,8,3                       ## @adev
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_CGS_UCODE_ID_CP_MEC_JT1,4,2    ## @CGS_UCODE_ID_CP_MEC_JT1
	.comm	_CGS_UCODE_ID_CP_MEC_JT2,4,2    ## @CGS_UCODE_ID_CP_MEC_JT2
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_CGS_UCODE_ID_CP_MEC,4,2        ## @CGS_UCODE_ID_CP_MEC
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"radeon/tahiti_smc.bin"

L_.str.1:                               ## @.str.1
	.asciz	"radeon/pitcairn_k_smc.bin"

L_.str.2:                               ## @.str.2
	.asciz	"radeon/pitcairn_smc.bin"

L_.str.3:                               ## @.str.3
	.asciz	"radeon/verde_k_smc.bin"

L_.str.4:                               ## @.str.4
	.asciz	"radeon/verde_smc.bin"

L_.str.5:                               ## @.str.5
	.asciz	"radeon/oland_k_smc.bin"

L_.str.6:                               ## @.str.6
	.asciz	"radeon/oland_smc.bin"

L_.str.7:                               ## @.str.7
	.asciz	"radeon/hainan_k_smc.bin"

L_.str.8:                               ## @.str.8
	.asciz	"radeon/banks_k_2_smc.bin"

L_.str.9:                               ## @.str.9
	.asciz	"radeon/hainan_smc.bin"

L_.str.10:                              ## @.str.10
	.asciz	"amdgpu/bonaire_k_smc.bin"

L_.str.11:                              ## @.str.11
	.asciz	"amdgpu/bonaire_smc.bin"

L_.str.12:                              ## @.str.12
	.asciz	"amdgpu/hawaii_k_smc.bin"

L_.str.13:                              ## @.str.13
	.asciz	"amdgpu/hawaii_smc.bin"

L_.str.14:                              ## @.str.14
	.asciz	"amdgpu/topaz_k_smc.bin"

L_.str.15:                              ## @.str.15
	.asciz	"amdgpu/topaz_smc.bin"

L_.str.16:                              ## @.str.16
	.asciz	"amdgpu/tonga_k_smc.bin"

L_.str.17:                              ## @.str.17
	.asciz	"amdgpu/tonga_smc.bin"

L_.str.18:                              ## @.str.18
	.asciz	"amdgpu/fiji_smc.bin"

L_.str.19:                              ## @.str.19
	.asciz	"amdgpu/polaris11_k_smc.bin"

L_.str.20:                              ## @.str.20
	.asciz	"amdgpu/polaris11_k2_smc.bin"

L_.str.21:                              ## @.str.21
	.asciz	"amdgpu/polaris11_smc.bin"

L_.str.22:                              ## @.str.22
	.asciz	"amdgpu/polaris11_smc_sk.bin"

L_.str.23:                              ## @.str.23
	.asciz	"amdgpu/polaris10_k_smc.bin"

L_.str.24:                              ## @.str.24
	.asciz	"amdgpu/polaris10_k2_smc.bin"

L_.str.25:                              ## @.str.25
	.asciz	"amdgpu/polaris10_smc.bin"

L_.str.26:                              ## @.str.26
	.asciz	"amdgpu/polaris10_smc_sk.bin"

L_.str.27:                              ## @.str.27
	.asciz	"amdgpu/polaris12_k_smc.bin"

L_.str.28:                              ## @.str.28
	.asciz	"amdgpu/polaris12_smc.bin"

L_.str.29:                              ## @.str.29
	.asciz	"amdgpu/vegam_smc.bin"

L_.str.30:                              ## @.str.30
	.asciz	"amdgpu/vega10_acg_smc.bin"

L_.str.31:                              ## @.str.31
	.asciz	"amdgpu/vega10_smc.bin"

L_.str.32:                              ## @.str.32
	.asciz	"amdgpu/vega12_smc.bin"

L_.str.33:                              ## @.str.33
	.asciz	"amdgpu/vega20_smc.bin"

L_.str.34:                              ## @.str.34
	.asciz	"SMC firmware not supported\n"

L_.str.35:                              ## @.str.35
	.asciz	"Failed to request firmware\n"

L_.str.36:                              ## @.str.36
	.asciz	"Failed to load firmware \"%s\""

	.comm	_AMDGPU_FW_LOAD_PSP,8,3         ## @AMDGPU_FW_LOAD_PSP
	.comm	_AMDGPU_UCODE_ID_SMC,8,3        ## @AMDGPU_UCODE_ID_SMC
	.no_dead_strip	_amdgpu_cgs_get_firmware_info
	.section	__TEXT,__const
	.p2align	2                               ## @reltable.amdgpu_cgs_get_firmware_info
l_reltable.amdgpu_cgs_get_firmware_info:
	.long	L_.str.30-l_reltable.amdgpu_cgs_get_firmware_info
	.long	L_.str.30-l_reltable.amdgpu_cgs_get_firmware_info
	.long	L_.str.31-l_reltable.amdgpu_cgs_get_firmware_info
	.long	L_.str.30-l_reltable.amdgpu_cgs_get_firmware_info

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_cgs_get_firmware_info
_amdgpu_cgs_get_firmware_info:          ; @amdgpu_cgs_get_firmware_info
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x2
	mov	x20, x1
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #40]
Lloh3:
	adrp	x8, _CGS_UCODE_ID_SMU@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CGS_UCODE_ID_SMU@GOTPAGEOFF]
Lloh5:
	adrp	x9, _CGS_UCODE_ID_SMU_SK@GOTPAGE
Lloh6:
	ldr	x9, [x9, _CGS_UCODE_ID_SMU_SK@GOTPAGEOFF]
Lloh7:
	ldr	w10, [x8]
Lloh8:
	ldr	w9, [x9]
	cmp	w10, w1
	ccmp	w9, w1, #4, ne
Lloh9:
	adrp	x22, _adev@GOTPAGE
Lloh10:
	ldr	x22, [x22, _adev@GOTPAGEOFF]
	b.ne	LBB0_3
; %bb.1:
	stur	xzr, [sp, #30]
	stp	xzr, xzr, [sp, #16]
	str	xzr, [sp, #8]
	ldr	x8, [x22]
	ldr	x11, [x8, #16]
	cbz	x11, LBB0_9
LBB0_2:
	ldr	x8, [x8, #16]
	ldrsw	x20, [x8]
	mov	x0, x20
	bl	_amdgpu_ucode_print_smc_hdr
	ldr	w0, [x20, #8]
	bl	_le32_to_cpu
	ldr	x8, [x22]
	str	w0, [x8, #8]
	ldr	w0, [x20, #4]
	bl	_le32_to_cpu
	mov	x21, x0
	ldr	w0, [x20, #12]
	bl	_le32_to_cpu
                                        ; kill: def $w0 killed $w0 def $x0
	sxtw	x23, w0
	ldr	x8, [x22]
	ldr	x8, [x8, #16]
	ldrsw	x24, [x8]
	ldr	w0, [x20]
	bl	_le32_to_cpu
	mov	w20, #0
	ldr	x8, [x22]
	ldr	w8, [x8, #8]
	add	x9, x24, w0, sxtw
	stp	w21, w8, [x19]
	stp	x9, x23, [x19, #16]
	b	LBB0_106
LBB0_3:
	mov	x21, x0
	mov	x1, x20
	bl	_fw_type_convert
	ldr	x8, [x22]
	ldr	x23, [x8, #40]
	mov	w24, w0
	add	x9, x23, x24, lsl #5
	ldr	x8, [x9, #8]
	cbz	x8, LBB0_15
; %bb.4:
	ldr	w25, [x9, #24]
	ldrsw	x22, [x8]
	ldr	w0, [x22, #12]
	bl	_le32_to_cpu
Lloh11:
	adrp	x8, _CGS_UCODE_ID_CP_MEC_JT1@GOTPAGE
Lloh12:
	ldr	x8, [x8, _CGS_UCODE_ID_CP_MEC_JT1@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
Lloh14:
	adrp	x9, _CGS_UCODE_ID_CP_MEC_JT2@GOTPAGE
Lloh15:
	ldr	x9, [x9, _CGS_UCODE_ID_CP_MEC_JT2@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	cmp	w8, w20
	ccmp	w9, w20, #4, ne
	b.ne	LBB0_6
; %bb.5:
	ldr	w0, [x22, #12]
	bl	_le32_to_cpu
Lloh17:
	adrp	x8, _PAGE_SIZE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _PAGE_SIZE@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	bl	_ALIGN
	add	w25, w25, w0
	ldr	w0, [x22, #16]
	bl	_le32_to_cpu
	lsl	w0, w0, #2
LBB0_6:
	add	x8, x23, x24, lsl #5
	ldr	x8, [x8, #16]
	str	x8, [x19, #16]
	str	w0, [x19]
	str	w25, [x19, #44]
	ldr	w0, [x22, #8]
	bl	_le32_to_cpu
	str	w0, [x19, #4]
Lloh20:
	adrp	x8, _CGS_UCODE_ID_CP_MEC@GOTPAGE
Lloh21:
	ldr	x8, [x8, _CGS_UCODE_ID_CP_MEC@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	cmp	w8, w20
	b.ne	LBB0_8
; %bb.7:
	ldr	w0, [x22, #4]
	bl	_le32_to_cpu
	lsl	w8, w0, #2
	str	w8, [x19]
LBB0_8:
	mov	x0, x21
	mov	x1, x20
	bl	_amdgpu_get_firmware_version
	str	w0, [x19, #40]
	ldr	w0, [x22]
	bl	_le32_to_cpu
                                        ; kill: def $w0 killed $w0 def $x0
	mov	w20, #0
	sxtw	x8, w0
	str	x8, [x19, #32]
	b	LBB0_106
LBB0_9:
	ldr	w11, [x8]
	sub	w11, w11, #128
	cmp	w11, #16
	b.hi	LBB0_14
; %bb.10:
Lloh23:
	adrp	x1, l_.str@PAGE
Lloh24:
	add	x1, x1, l_.str@PAGEOFF
Lloh25:
	adrp	x12, lJTI0_0@PAGE
Lloh26:
	add	x12, x12, lJTI0_0@PAGEOFF
	adr	x13, LBB0_11
	ldrh	w14, [x12, x11, lsl #1]
	add	x13, x13, x14, lsl #2
	br	x13
LBB0_11:
	ldr	x9, [x8, #56]
	ldr	w8, [x9, #4]
	mov	w10, #26656
	cmp	w8, w10
	b.eq	LBB0_75
; %bb.12:
	mov	w10, #26657
	cmp	w8, w10
	b.ne	LBB0_76
; %bb.13:
	ldr	w8, [x9]
	orr	w8, w8, #0x4
	cmp	w8, #135
	b.eq	LBB0_79
	b	LBB0_80
LBB0_14:
Lloh27:
	adrp	x0, l_.str.34@PAGE
Lloh28:
	add	x0, x0, l_.str.34@PAGEOFF
	bl	_DRM_ERROR
LBB0_15:
Lloh29:
	adrp	x8, _EINVAL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_106
LBB0_16:
Lloh32:
	adrp	x1, l_.str.29@PAGE
Lloh33:
	add	x1, x1, l_.str.29@PAGEOFF
	b	LBB0_101
LBB0_17:
Lloh34:
	adrp	x1, l_.str.33@PAGE
Lloh35:
	add	x1, x1, l_.str.33@PAGEOFF
	b	LBB0_101
LBB0_18:
Lloh36:
	adrp	x1, l_.str.32@PAGE
Lloh37:
	add	x1, x1, l_.str.32@PAGEOFF
	b	LBB0_101
LBB0_19:
	ldr	x8, [x8, #56]
	ldr	w9, [x8, #4]
	mov	w10, #26751
	cmp	w9, w10
	b.ne	LBB0_67
; %bb.20:
	ldr	w8, [x8]
	sub	w8, w8, #192
	cmp	w8, #4
	b.hs	LBB0_67
; %bb.21:
Lloh38:
	adrp	x9, l_switch.table.amdgpu_cgs_get_firmware_info@PAGE
Lloh39:
	add	x9, x9, l_switch.table.amdgpu_cgs_get_firmware_info@PAGEOFF
	ldr	x1, [x9, w8, sxtw #3]
	b	LBB0_101
LBB0_22:
	ldr	x8, [x8, #56]
	ldr	w9, [x8, #4]
	mov	w10, #26887
	cmp	w9, w10
	b.eq	LBB0_81
; %bb.23:
	mov	w10, #26880
	cmp	w9, w10
	b.ne	LBB0_82
; %bb.24:
	ldr	w8, [x8]
Lloh40:
	adrp	x1, l_.str.15@PAGE
Lloh41:
	add	x1, x1, l_.str.15@PAGEOFF
	cmp	w8, #208
	b.gt	LBB0_93
; %bb.25:
	cmp	w8, #129
	b.eq	LBB0_95
; %bb.26:
	cmp	w8, #131
	b.eq	LBB0_95
	b	LBB0_101
LBB0_27:
	ldr	x8, [x8, #56]
	ldr	w9, [x8, #4]
	mov	w10, #26936
	cmp	w9, w10
	b.eq	LBB0_29
; %bb.28:
	mov	w10, #26937
	cmp	w9, w10
	b.ne	LBB0_69
LBB0_29:
	ldr	w8, [x8]
	cmp	w8, #241
	b.ne	LBB0_69
; %bb.30:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh42:
	adrp	x1, l_.str.16@PAGE
Lloh43:
	add	x1, x1, l_.str.16@PAGEOFF
	b	LBB0_101
LBB0_31:
	ldr	x8, [x8, #56]
	ldr	w9, [x8, #4]
	mov	w10, #27009
	cmp	w9, w10
	b.eq	LBB0_83
; %bb.32:
	mov	w10, #27015
	cmp	w9, w10
	b.ne	LBB0_35
; %bb.33:
	ldr	w8, [x8]
	cmp	w8, #192
	b.eq	LBB0_84
; %bb.34:
	cmp	w8, #195
	b.eq	LBB0_84
LBB0_35:
Lloh44:
	adrp	x1, l_.str.28@PAGE
Lloh45:
	add	x1, x1, l_.str.28@PAGEOFF
	b	LBB0_101
LBB0_36:
	cmp	w10, w20
	b.ne	LBB0_70
; %bb.37:
	ldr	x8, [x8, #56]
	ldr	w9, [x8, #4]
	mov	w10, #26623
	cmp	w9, w10
	b.eq	LBB0_96
; %bb.38:
	mov	w10, #26607
	cmp	w9, w10
	b.ne	LBB0_42
; %bb.39:
	ldr	w8, [x8]
	cmp	w8, #224
	b.eq	LBB0_97
; %bb.40:
	cmp	w8, #226
	b.eq	LBB0_110
; %bb.41:
	cmp	w8, #229
	b.eq	LBB0_97
LBB0_42:
Lloh46:
	adrp	x1, l_.str.21@PAGE
Lloh47:
	add	x1, x1, l_.str.21@PAGEOFF
	b	LBB0_101
LBB0_43:
	cmp	w10, w20
	b.ne	LBB0_72
; %bb.44:
	ldr	x8, [x8, #56]
	ldr	w9, [x8, #4]
	mov	w10, #28639
	cmp	w9, w10
	b.eq	LBB0_98
; %bb.45:
	mov	w10, #26591
	cmp	w9, w10
	b.ne	LBB0_100
; %bb.46:
	ldr	w8, [x8]
Lloh48:
	adrp	x1, l_.str.25@PAGE
Lloh49:
	add	x1, x1, l_.str.25@PAGEOFF
	sub	w8, w8, #224
	cmp	w8, #23
	b.hi	LBB0_101
; %bb.47:
	mov	w9, #1
	lsl	w8, w9, w8
	mov	w9, #32953
	tst	w8, w9
	b.ne	LBB0_99
; %bb.48:
	mov	w9, #2
	movk	w9, #128, lsl #16
	tst	w8, w9
	b.eq	LBB0_101
; %bb.49:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh50:
	adrp	x1, l_.str.24@PAGE
Lloh51:
	add	x1, x1, l_.str.24@PAGEOFF
	b	LBB0_101
LBB0_50:
	ldr	x8, [x8, #56]
	ldr	w9, [x8]
	cmp	w9, #129
	b.ne	LBB0_68
; %bb.51:
	ldr	w8, [x8, #4]
	mov	w9, #13320
	cmp	w9, w8, lsr #1
	b.ne	LBB0_68
; %bb.52:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh52:
	adrp	x1, l_.str.1@PAGE
Lloh53:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_101
LBB0_53:
	ldr	x8, [x8, #56]
	ldr	w9, [x8]
	cmp	w9, #131
	b.eq	LBB0_85
; %bb.54:
	cmp	w9, #129
	b.ne	LBB0_86
; %bb.55:
	ldr	w8, [x8, #4]
	mov	w9, #-26112
	add	w8, w8, w9
	cmp	w8, #16
	mov	w9, #1
	lsl	w8, w9, w8
	mov	w9, #49
	movk	w9, #1, lsl #16
	and	w8, w8, w9
	ccmp	w8, #0, #4, ls
	b.eq	LBB0_86
LBB0_56:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh54:
	adrp	x1, l_.str.5@PAGE
Lloh55:
	add	x1, x1, l_.str.5@PAGEOFF
	b	LBB0_101
LBB0_57:
	ldr	x8, [x8, #56]
	ldr	w8, [x8]
	cmp	w8, #128
	b.ne	LBB0_74
; %bb.58:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh56:
	adrp	x1, l_.str.12@PAGE
Lloh57:
	add	x1, x1, l_.str.12@PAGEOFF
	b	LBB0_101
LBB0_59:
	ldr	x8, [x8, #56]
	ldr	w9, [x8]
	cmp	w9, #195
	b.eq	LBB0_87
; %bb.60:
	cmp	w9, #131
	b.eq	LBB0_89
; %bb.61:
	cmp	w9, #129
	b.ne	LBB0_91
; %bb.62:
	ldr	w8, [x8, #4]
	mov	w9, #26208
	cmp	w8, w9
	b.eq	LBB0_90
	b	LBB0_91
LBB0_63:
Lloh58:
	adrp	x1, l_.str.18@PAGE
Lloh59:
	add	x1, x1, l_.str.18@PAGEOFF
	b	LBB0_101
LBB0_64:
	ldr	x8, [x8, #56]
	ldr	w9, [x8]
	and	w9, w9, #0xfffffffe
	cmp	w9, #128
	b.eq	LBB0_66
; %bb.65:
	ldr	w8, [x8, #4]
	mov	w9, #26207
	cmp	w8, w9
	b.ne	LBB0_92
LBB0_66:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh60:
	adrp	x1, l_.str.10@PAGE
Lloh61:
	add	x1, x1, l_.str.10@PAGEOFF
	b	LBB0_101
LBB0_67:
Lloh62:
	adrp	x1, l_.str.31@PAGE
Lloh63:
	add	x1, x1, l_.str.31@PAGEOFF
	b	LBB0_101
LBB0_68:
Lloh64:
	adrp	x1, l_.str.2@PAGE
Lloh65:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_101
LBB0_69:
Lloh66:
	adrp	x1, l_.str.17@PAGE
Lloh67:
	add	x1, x1, l_.str.17@PAGEOFF
	b	LBB0_101
LBB0_70:
	cmp	w9, w20
	b.ne	LBB0_102
; %bb.71:
Lloh68:
	adrp	x1, l_.str.22@PAGE
Lloh69:
	add	x1, x1, l_.str.22@PAGEOFF
	b	LBB0_101
LBB0_72:
	cmp	w9, w20
	b.ne	LBB0_102
; %bb.73:
Lloh70:
	adrp	x1, l_.str.26@PAGE
Lloh71:
	add	x1, x1, l_.str.26@PAGEOFF
	b	LBB0_101
LBB0_74:
Lloh72:
	adrp	x1, l_.str.13@PAGE
Lloh73:
	add	x1, x1, l_.str.13@PAGEOFF
	b	LBB0_101
LBB0_75:
	ldr	w9, [x9]
	orr	w10, w9, #0x2
	cmp	w10, #131
	b.eq	LBB0_79
	b	LBB0_77
LBB0_76:
	ldr	w9, [x9]
LBB0_77:
	cmp	w9, #135
	b.ne	LBB0_80
; %bb.78:
	orr	w8, w8, #0x8
	mov	w9, #26667
	cmp	w8, w9
	b.ne	LBB0_80
LBB0_79:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh74:
	adrp	x1, l_.str.3@PAGE
Lloh75:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_101
LBB0_80:
Lloh76:
	adrp	x1, l_.str.4@PAGE
Lloh77:
	add	x1, x1, l_.str.4@PAGEOFF
	b	LBB0_101
LBB0_81:
	ldr	w8, [x8]
	cmp	w8, #135
	b.eq	LBB0_95
LBB0_82:
Lloh78:
	adrp	x1, l_.str.15@PAGE
Lloh79:
	add	x1, x1, l_.str.15@PAGEOFF
	b	LBB0_101
LBB0_83:
	ldr	w8, [x8]
	cmp	w8, #16
	mov	w9, #1
	lsl	w8, w9, w8
	and	w8, w8, #0x1ffff
	and	w8, w8, #0xffff0003
	ccmp	w8, #0, #4, ls
	b.eq	LBB0_35
LBB0_84:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh80:
	adrp	x1, l_.str.27@PAGE
Lloh81:
	add	x1, x1, l_.str.27@PAGEOFF
	b	LBB0_101
LBB0_85:
	ldr	w8, [x8, #4]
	mov	w9, #26128
	cmp	w8, w9
	b.eq	LBB0_56
LBB0_86:
Lloh82:
	adrp	x1, l_.str.6@PAGE
Lloh83:
	add	x1, x1, l_.str.6@PAGEOFF
	b	LBB0_101
LBB0_87:
	ldr	w8, [x8, #4]
	mov	w9, #26213
	cmp	w8, w9
	b.ne	LBB0_91
; %bb.88:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh84:
	adrp	x1, l_.str.8@PAGE
Lloh85:
	add	x1, x1, l_.str.8@PAGEOFF
	b	LBB0_101
LBB0_89:
	ldr	w8, [x8, #4]
	mov	w9, #-26208
	add	w8, w8, w9
	cmp	w8, #7
	mov	w9, #1
	lsl	w8, w9, w8
	mov	w9, #169
	and	w8, w8, w9
	ccmp	w8, #0, #4, ls
	b.eq	LBB0_91
LBB0_90:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh86:
	adrp	x1, l_.str.7@PAGE
Lloh87:
	add	x1, x1, l_.str.7@PAGEOFF
	b	LBB0_101
LBB0_91:
Lloh88:
	adrp	x1, l_.str.9@PAGE
Lloh89:
	add	x1, x1, l_.str.9@PAGEOFF
	b	LBB0_101
LBB0_92:
Lloh90:
	adrp	x1, l_.str.11@PAGE
Lloh91:
	add	x1, x1, l_.str.11@PAGEOFF
	b	LBB0_101
LBB0_93:
	cmp	w8, #209
	b.eq	LBB0_95
; %bb.94:
	cmp	w8, #211
	b.ne	LBB0_101
LBB0_95:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh92:
	adrp	x1, l_.str.14@PAGE
Lloh93:
	add	x1, x1, l_.str.14@PAGEOFF
	b	LBB0_101
LBB0_96:
	ldr	w8, [x8]
	sub	w8, w8, #207
	cmp	w8, #48
	mov	w9, #1
	lsl	x8, x9, x8
	mov	x9, #281479271743489
	movk	x9, #0, lsl #16
	and	x8, x8, x9
	ccmp	x8, #0, #4, ls
	b.eq	LBB0_42
LBB0_97:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh94:
	adrp	x1, l_.str.19@PAGE
Lloh95:
	add	x1, x1, l_.str.19@PAGEOFF
	b	LBB0_101
LBB0_98:
	ldr	w8, [x8]
	orr	w8, w8, #0x10
	cmp	w8, #255
	b.ne	LBB0_100
LBB0_99:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh96:
	adrp	x1, l_.str.23@PAGE
Lloh97:
	add	x1, x1, l_.str.23@PAGEOFF
	b	LBB0_101
LBB0_100:
Lloh98:
	adrp	x1, l_.str.25@PAGE
Lloh99:
	add	x1, x1, l_.str.25@PAGEOFF
LBB0_101:
	add	x0, sp, #8
	bl	_strcpy
LBB0_102:
	ldr	x8, [x22]
	add	x0, x8, #16
	ldr	w2, [x8, #48]
	add	x1, sp, #8
	bl	_request_firmware
	cbz	w0, LBB0_104
; %bb.103:
	mov	x20, x0
Lloh100:
	adrp	x0, l_.str.35@PAGE
Lloh101:
	add	x0, x0, l_.str.35@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_106
LBB0_104:
	ldr	x8, [x22]
	ldr	x0, [x8, #16]
	bl	_amdgpu_ucode_validate
	cbz	w0, LBB0_108
; %bb.105:
	mov	x20, x0
	add	x8, sp, #8
	str	x8, [sp]
Lloh102:
	adrp	x0, l_.str.36@PAGE
Lloh103:
	add	x0, x0, l_.str.36@PAGEOFF
	bl	_DRM_ERROR
	ldr	x8, [x22]
	ldr	x0, [x8, #16]
	bl	_release_firmware
	ldr	x8, [x22]
	str	xzr, [x8, #16]
LBB0_106:
	ldr	x8, [sp, #40]
Lloh104:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh105:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh106:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_111
; %bb.107:
	mov	x0, x20
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_108:
	ldr	x8, [x22]
	ldr	x9, [x8, #24]
Lloh107:
	adrp	x10, _AMDGPU_FW_LOAD_PSP@GOTPAGE
Lloh108:
	ldr	x10, [x10, _AMDGPU_FW_LOAD_PSP@GOTPAGEOFF]
Lloh109:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_2
; %bb.109:
	ldr	x9, [x8, #40]
Lloh110:
	adrp	x10, _AMDGPU_UCODE_ID_SMC@GOTPAGE
Lloh111:
	ldr	x10, [x10, _AMDGPU_UCODE_ID_SMC@GOTPAGEOFF]
Lloh112:
	ldr	x10, [x10]
	add	x9, x9, x10, lsl #5
	str	x10, [x9]
	ldr	x8, [x8, #16]
	str	x8, [x9, #8]
	ldrsw	x8, [x8]
	ldr	w0, [x8]
	bl	_le32_to_cpu
Lloh113:
	adrp	x8, _PAGE_SIZE@GOTPAGE
Lloh114:
	ldr	x8, [x8, _PAGE_SIZE@GOTPAGEOFF]
Lloh115:
	ldr	w1, [x8]
	bl	_ALIGN
	ldr	x8, [x22]
	ldr	w9, [x8, #32]
	add	w9, w9, w0
	str	w9, [x8, #32]
	b	LBB0_2
LBB0_110:
	mov	w8, #1
	str	w8, [x19, #8]
Lloh116:
	adrp	x1, l_.str.20@PAGE
Lloh117:
	add	x1, x1, l_.str.20@PAGEOFF
	b	LBB0_101
LBB0_111:
	bl	___stack_chk_fail
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh25, Lloh26
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpAdd	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpAdd	Lloh40, Lloh41
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpAdd	Lloh44, Lloh45
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpAdd	Lloh50, Lloh51
	.loh AdrpAdd	Lloh52, Lloh53
	.loh AdrpAdd	Lloh54, Lloh55
	.loh AdrpAdd	Lloh56, Lloh57
	.loh AdrpAdd	Lloh58, Lloh59
	.loh AdrpAdd	Lloh60, Lloh61
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpAdd	Lloh64, Lloh65
	.loh AdrpAdd	Lloh66, Lloh67
	.loh AdrpAdd	Lloh68, Lloh69
	.loh AdrpAdd	Lloh70, Lloh71
	.loh AdrpAdd	Lloh72, Lloh73
	.loh AdrpAdd	Lloh74, Lloh75
	.loh AdrpAdd	Lloh76, Lloh77
	.loh AdrpAdd	Lloh78, Lloh79
	.loh AdrpAdd	Lloh80, Lloh81
	.loh AdrpAdd	Lloh82, Lloh83
	.loh AdrpAdd	Lloh84, Lloh85
	.loh AdrpAdd	Lloh86, Lloh87
	.loh AdrpAdd	Lloh88, Lloh89
	.loh AdrpAdd	Lloh90, Lloh91
	.loh AdrpAdd	Lloh92, Lloh93
	.loh AdrpAdd	Lloh94, Lloh95
	.loh AdrpAdd	Lloh96, Lloh97
	.loh AdrpAdd	Lloh98, Lloh99
	.loh AdrpAdd	Lloh100, Lloh101
	.loh AdrpAdd	Lloh102, Lloh103
	.loh AdrpLdrGotLdr	Lloh104, Lloh105, Lloh106
	.loh AdrpLdrGotLdr	Lloh107, Lloh108, Lloh109
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh110, Lloh111, Lloh112
	.loh AdrpAdd	Lloh116, Lloh117
	.cfi_endproc
	.section	__TEXT,__const
	.p2align	1
lJTI0_0:
	.short	(LBB0_11-LBB0_11)>>2
	.short	(LBB0_16-LBB0_11)>>2
	.short	(LBB0_17-LBB0_11)>>2
	.short	(LBB0_18-LBB0_11)>>2
	.short	(LBB0_19-LBB0_11)>>2
	.short	(LBB0_22-LBB0_11)>>2
	.short	(LBB0_27-LBB0_11)>>2
	.short	(LBB0_101-LBB0_11)>>2
	.short	(LBB0_31-LBB0_11)>>2
	.short	(LBB0_36-LBB0_11)>>2
	.short	(LBB0_43-LBB0_11)>>2
	.short	(LBB0_50-LBB0_11)>>2
	.short	(LBB0_53-LBB0_11)>>2
	.short	(LBB0_57-LBB0_11)>>2
	.short	(LBB0_59-LBB0_11)>>2
	.short	(LBB0_63-LBB0_11)>>2
	.short	(LBB0_64-LBB0_11)>>2
                                        ; -- End function
	.comm	_CGS_FUNC_ADEV,4,2              ; @CGS_FUNC_ADEV
	.comm	_CGS_UCODE_ID_SMU,4,2           ; @CGS_UCODE_ID_SMU
	.comm	_CGS_UCODE_ID_SMU_SK,4,2        ; @CGS_UCODE_ID_SMU_SK
	.comm	_adev,8,3                       ; @adev
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_CGS_UCODE_ID_CP_MEC_JT1,4,2    ; @CGS_UCODE_ID_CP_MEC_JT1
	.comm	_CGS_UCODE_ID_CP_MEC_JT2,4,2    ; @CGS_UCODE_ID_CP_MEC_JT2
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_CGS_UCODE_ID_CP_MEC,4,2        ; @CGS_UCODE_ID_CP_MEC
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"radeon/tahiti_smc.bin"

l_.str.1:                               ; @.str.1
	.asciz	"radeon/pitcairn_k_smc.bin"

l_.str.2:                               ; @.str.2
	.asciz	"radeon/pitcairn_smc.bin"

l_.str.3:                               ; @.str.3
	.asciz	"radeon/verde_k_smc.bin"

l_.str.4:                               ; @.str.4
	.asciz	"radeon/verde_smc.bin"

l_.str.5:                               ; @.str.5
	.asciz	"radeon/oland_k_smc.bin"

l_.str.6:                               ; @.str.6
	.asciz	"radeon/oland_smc.bin"

l_.str.7:                               ; @.str.7
	.asciz	"radeon/hainan_k_smc.bin"

l_.str.8:                               ; @.str.8
	.asciz	"radeon/banks_k_2_smc.bin"

l_.str.9:                               ; @.str.9
	.asciz	"radeon/hainan_smc.bin"

l_.str.10:                              ; @.str.10
	.asciz	"amdgpu/bonaire_k_smc.bin"

l_.str.11:                              ; @.str.11
	.asciz	"amdgpu/bonaire_smc.bin"

l_.str.12:                              ; @.str.12
	.asciz	"amdgpu/hawaii_k_smc.bin"

l_.str.13:                              ; @.str.13
	.asciz	"amdgpu/hawaii_smc.bin"

l_.str.14:                              ; @.str.14
	.asciz	"amdgpu/topaz_k_smc.bin"

l_.str.15:                              ; @.str.15
	.asciz	"amdgpu/topaz_smc.bin"

l_.str.16:                              ; @.str.16
	.asciz	"amdgpu/tonga_k_smc.bin"

l_.str.17:                              ; @.str.17
	.asciz	"amdgpu/tonga_smc.bin"

l_.str.18:                              ; @.str.18
	.asciz	"amdgpu/fiji_smc.bin"

l_.str.19:                              ; @.str.19
	.asciz	"amdgpu/polaris11_k_smc.bin"

l_.str.20:                              ; @.str.20
	.asciz	"amdgpu/polaris11_k2_smc.bin"

l_.str.21:                              ; @.str.21
	.asciz	"amdgpu/polaris11_smc.bin"

l_.str.22:                              ; @.str.22
	.asciz	"amdgpu/polaris11_smc_sk.bin"

l_.str.23:                              ; @.str.23
	.asciz	"amdgpu/polaris10_k_smc.bin"

l_.str.24:                              ; @.str.24
	.asciz	"amdgpu/polaris10_k2_smc.bin"

l_.str.25:                              ; @.str.25
	.asciz	"amdgpu/polaris10_smc.bin"

l_.str.26:                              ; @.str.26
	.asciz	"amdgpu/polaris10_smc_sk.bin"

l_.str.27:                              ; @.str.27
	.asciz	"amdgpu/polaris12_k_smc.bin"

l_.str.28:                              ; @.str.28
	.asciz	"amdgpu/polaris12_smc.bin"

l_.str.29:                              ; @.str.29
	.asciz	"amdgpu/vegam_smc.bin"

l_.str.30:                              ; @.str.30
	.asciz	"amdgpu/vega10_acg_smc.bin"

l_.str.31:                              ; @.str.31
	.asciz	"amdgpu/vega10_smc.bin"

l_.str.32:                              ; @.str.32
	.asciz	"amdgpu/vega12_smc.bin"

l_.str.33:                              ; @.str.33
	.asciz	"amdgpu/vega20_smc.bin"

l_.str.34:                              ; @.str.34
	.asciz	"SMC firmware not supported\n"

l_.str.35:                              ; @.str.35
	.asciz	"Failed to request firmware\n"

l_.str.36:                              ; @.str.36
	.asciz	"Failed to load firmware \"%s\""

	.comm	_AMDGPU_FW_LOAD_PSP,8,3         ; @AMDGPU_FW_LOAD_PSP
	.comm	_AMDGPU_UCODE_ID_SMC,8,3        ; @AMDGPU_UCODE_ID_SMC
	.no_dead_strip	_amdgpu_cgs_get_firmware_info
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.amdgpu_cgs_get_firmware_info
l_switch.table.amdgpu_cgs_get_firmware_info:
	.quad	l_.str.30
	.quad	l_.str.30
	.quad	l_.str.31
	.quad	l_.str.30

.subsections_via_symbols
