	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function exynos_ppmu_set_event
_exynos_ppmu_set_event:                 ## @exynos_ppmu_set_event
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	callq	_devfreq_event_get_drvdata
	movq	%rax, %r14
	movq	%r15, %rdi
	callq	_exynos_ppmu_find_ppmu_id
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_10
## %bb.1:
	movl	(%r14), %edi
	movq	_PPMU_CNTENS@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	leaq	-44(%rbp), %rdx
	callq	_regmap_read
	testl	%eax, %eax
	js	LBB0_9
## %bb.2:
	movq	_PPMU_CCNT_MASK@GOTPCREL(%rip), %rax
	movq	_PPMU_ENABLE@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	movl	%ebx, %ecx
	shll	%cl, %edx
	orl	(%rax), %edx
	orl	-44(%rbp), %edx
	movl	%edx, -44(%rbp)
	movl	(%r14), %edi
	movl	(%r12), %esi
	callq	_regmap_write
	testl	%eax, %eax
	js	LBB0_9
## %bb.3:
	movl	(%r14), %r12d
	movl	%ebx, %edi
	callq	_PPMU_BEVTxSEL
	movq	(%r15), %rcx
	movl	(%rcx), %edx
	movl	%r12d, %edi
	movl	%eax, %esi
	callq	_regmap_write
	testl	%eax, %eax
	js	LBB0_9
## %bb.4:
	movl	(%r14), %edi
	movq	_PPMU_PMNC@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-48(%rbp), %rdx
	callq	_regmap_read
	testl	%eax, %eax
	js	LBB0_9
## %bb.5:
	movq	_PPMU_PMNC_ENABLE_MASK@GOTPCREL(%rip), %rcx
	movq	_PPMU_PMNC_COUNTER_RESET_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	(%rcx), %eax
	movq	_PPMU_PMNC_CC_RESET_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	notl	%eax
	andl	-48(%rbp), %eax
	movl	(%r13), %edx
	movq	_PPMU_PMNC_ENABLE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%edx, %esi
	shll	%cl, %esi
	movq	_PPMU_PMNC_COUNTER_RESET_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%edx, %edi
	shll	%cl, %edi
	orl	%esi, %edi
	movq	_PPMU_PMNC_CC_RESET_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%edi, %edx
	orl	%eax, %edx
	movl	%edx, -48(%rbp)
	movl	(%r14), %edi
	movl	(%r15), %esi
	callq	_regmap_write
	movl	%eax, %ebx
	sarl	$31, %ebx
	andl	%eax, %ebx
	jmp	LBB0_10
LBB0_9:
	movl	%eax, %ebx
LBB0_10:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PPMU_CNTENS,4,2                ## @PPMU_CNTENS
	.comm	_PPMU_CCNT_MASK,4,2             ## @PPMU_CCNT_MASK
	.comm	_PPMU_ENABLE,4,2                ## @PPMU_ENABLE
	.comm	_PPMU_PMNC,4,2                  ## @PPMU_PMNC
	.comm	_PPMU_PMNC_ENABLE_MASK,4,2      ## @PPMU_PMNC_ENABLE_MASK
	.comm	_PPMU_PMNC_COUNTER_RESET_MASK,4,2 ## @PPMU_PMNC_COUNTER_RESET_MASK
	.comm	_PPMU_PMNC_CC_RESET_MASK,4,2    ## @PPMU_PMNC_CC_RESET_MASK
	.comm	_PPMU_PMNC_ENABLE_SHIFT,4,2     ## @PPMU_PMNC_ENABLE_SHIFT
	.comm	_PPMU_PMNC_COUNTER_RESET_SHIFT,4,2 ## @PPMU_PMNC_COUNTER_RESET_SHIFT
	.comm	_PPMU_PMNC_CC_RESET_SHIFT,4,2   ## @PPMU_PMNC_CC_RESET_SHIFT
	.no_dead_strip	_exynos_ppmu_set_event
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function exynos_ppmu_set_event
_exynos_ppmu_set_event:                 ; @exynos_ppmu_set_event
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x0
	bl	_devfreq_event_get_drvdata
	mov	x19, x0
	mov	x0, x21
	bl	_exynos_ppmu_find_ppmu_id
	mov	x20, x0
	tbnz	w0, #31, LBB0_7
; %bb.1:
	ldr	w0, [x19]
Lloh0:
	adrp	x22, _PPMU_CNTENS@GOTPAGE
Lloh1:
	ldr	x22, [x22, _PPMU_CNTENS@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x2, sp, #8
	bl	_regmap_read
	tbnz	w0, #31, LBB0_6
; %bb.2:
Lloh2:
	adrp	x8, _PPMU_CCNT_MASK@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PPMU_CCNT_MASK@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x23, _PPMU_ENABLE@GOTPAGE
Lloh6:
	ldr	x23, [x23, _PPMU_ENABLE@GOTPAGEOFF]
	ldr	w9, [x23]
	lsl	w9, w9, w20
	orr	w8, w9, w8
	ldr	w9, [sp, #8]
	orr	w2, w8, w9
	str	w2, [sp, #8]
	ldr	w0, [x19]
	ldr	w1, [x22]
	bl	_regmap_write
	tbnz	w0, #31, LBB0_6
; %bb.3:
	ldr	w22, [x19]
	mov	x0, x20
	bl	_PPMU_BEVTxSEL
	mov	x1, x0
	ldr	x8, [x21]
	ldr	w2, [x8]
	mov	x0, x22
	bl	_regmap_write
	tbnz	w0, #31, LBB0_6
; %bb.4:
	ldr	w0, [x19]
Lloh7:
	adrp	x21, _PPMU_PMNC@GOTPAGE
Lloh8:
	ldr	x21, [x21, _PPMU_PMNC@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #12
	bl	_regmap_read
	tbnz	w0, #31, LBB0_6
; %bb.5:
Lloh9:
	adrp	x8, _PPMU_PMNC_ENABLE_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PPMU_PMNC_ENABLE_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
Lloh12:
	adrp	x9, _PPMU_PMNC_COUNTER_RESET_MASK@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PPMU_PMNC_COUNTER_RESET_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
Lloh15:
	adrp	x10, _PPMU_PMNC_CC_RESET_MASK@GOTPAGE
Lloh16:
	ldr	x10, [x10, _PPMU_PMNC_CC_RESET_MASK@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh17:
	ldr	w9, [x10]
	orr	w8, w8, w9
	ldr	w9, [sp, #12]
	bic	w8, w9, w8
	ldr	w9, [x23]
Lloh18:
	adrp	x10, _PPMU_PMNC_ENABLE_SHIFT@GOTPAGE
Lloh19:
	ldr	x10, [x10, _PPMU_PMNC_ENABLE_SHIFT@GOTPAGEOFF]
Lloh20:
	ldr	w10, [x10]
	lsl	w10, w9, w10
Lloh21:
	adrp	x11, _PPMU_PMNC_COUNTER_RESET_SHIFT@GOTPAGE
Lloh22:
	ldr	x11, [x11, _PPMU_PMNC_COUNTER_RESET_SHIFT@GOTPAGEOFF]
	orr	w8, w10, w8
Lloh23:
	ldr	w10, [x11]
	lsl	w10, w9, w10
	orr	w8, w10, w8
Lloh24:
	adrp	x10, _PPMU_PMNC_CC_RESET_SHIFT@GOTPAGE
Lloh25:
	ldr	x10, [x10, _PPMU_PMNC_CC_RESET_SHIFT@GOTPAGEOFF]
Lloh26:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w2, w9, w8
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x21]
	bl	_regmap_write
	cmp	w0, #0
	csel	w20, w0, wzr, lt
	b	LBB0_7
LBB0_6:
	mov	x20, x0
LBB0_7:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_PPMU_CNTENS,4,2                ; @PPMU_CNTENS
	.comm	_PPMU_CCNT_MASK,4,2             ; @PPMU_CCNT_MASK
	.comm	_PPMU_ENABLE,4,2                ; @PPMU_ENABLE
	.comm	_PPMU_PMNC,4,2                  ; @PPMU_PMNC
	.comm	_PPMU_PMNC_ENABLE_MASK,4,2      ; @PPMU_PMNC_ENABLE_MASK
	.comm	_PPMU_PMNC_COUNTER_RESET_MASK,4,2 ; @PPMU_PMNC_COUNTER_RESET_MASK
	.comm	_PPMU_PMNC_CC_RESET_MASK,4,2    ; @PPMU_PMNC_CC_RESET_MASK
	.comm	_PPMU_PMNC_ENABLE_SHIFT,4,2     ; @PPMU_PMNC_ENABLE_SHIFT
	.comm	_PPMU_PMNC_COUNTER_RESET_SHIFT,4,2 ; @PPMU_PMNC_COUNTER_RESET_SHIFT
	.comm	_PPMU_PMNC_CC_RESET_SHIFT,4,2   ; @PPMU_PMNC_CC_RESET_SHIFT
	.no_dead_strip	_exynos_ppmu_set_event
.subsections_via_symbols
