	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_smu7_init                      ## -- Begin function smu7_init
	.p2align	4, 0x90
_smu7_init:                             ## @smu7_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	24(%rdi), %r15
	movl	$4096, (%r15)                   ## imm = 0x1000
	movq	8(%rdi), %rdi
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	12(%r15), %rbx
	leaq	8(%r15), %r12
	leaq	4(%r15), %r13
	movq	%r13, (%rsp)
	movl	$4096, %esi                     ## imm = 0x1000
	movq	%rbx, %r8
	movq	%r12, %r9
	callq	_amdgpu_bo_create_kernel
	testl	%eax, %eax
	je	LBB0_2
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_8:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rcx
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rax
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	xorl	%ebx, %ebx
	cmpl	$0, 16(%r14)
	je	LBB0_8
## %bb.3:
	movl	$819200, 16(%r15)               ## imm = 0xC8000
	movq	8(%r14), %rdi
	movl	(%rax), %edx
	movl	(%rcx), %ecx
	leaq	28(%r15), %r8
	leaq	24(%r15), %r9
	addq	$20, %r15
	movq	%r15, (%rsp)
	movl	$819200, %esi                   ## imm = 0xC8000
	callq	_amdgpu_bo_create_kernel
	testl	%eax, %eax
	je	LBB0_5
## %bb.4:
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	%r12, %rsi
	movq	%r13, %rdx
	callq	_amdgpu_bo_free_kernel
	jmp	LBB0_1
LBB0_5:
	movq	%r14, %rdi
	callq	_smum_is_hw_avfs_present
	testq	%rax, %rax
	je	LBB0_8
## %bb.6:
	movq	_PP_AVFS_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r14)
	je	LBB0_8
## %bb.7:
	movl	$1, 4(%r14)
	jmp	LBB0_8
	.cfi_endproc
                                        ## -- End function
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ## @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_PP_AVFS_MASK,4,2               ## @PP_AVFS_MASK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_smu7_init                      ; -- Begin function smu7_init
	.p2align	2
_smu7_init:                             ; @smu7_init
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x23, [x0, #24]
	mov	w8, #4096
	mov	x20, x23
	str	w8, [x20], #4
	ldr	x0, [x0, #8]
Lloh0:
	adrp	x24, _PAGE_SIZE@GOTPAGE
Lloh1:
	ldr	x24, [x24, _PAGE_SIZE@GOTPAGEOFF]
	ldr	w2, [x24]
Lloh2:
	adrp	x25, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGE
Lloh3:
	ldr	x25, [x25, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGEOFF]
	ldr	w3, [x25]
	add	x21, x23, #12
	add	x22, x23, #8
	mov	w1, #4096
	mov	x4, x21
	mov	x5, x22
	mov	x6, x20
	bl	_amdgpu_bo_create_kernel
	cbz	w0, LBB0_3
LBB0_1:
Lloh4:
	adrp	x8, _EINVAL@GOTPAGE
Lloh5:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_2:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_3:
	ldr	w8, [x19, #16]
	cbz	w8, LBB0_9
; %bb.4:
	mov	w8, #32768
	movk	w8, #12, lsl #16
	str	w8, [x23, #16]
	ldr	x0, [x19, #8]
	ldr	w2, [x24]
	ldr	w3, [x25]
	add	x4, x23, #28
	add	x5, x23, #24
	add	x6, x23, #20
	mov	w1, #32768
	movk	w1, #12, lsl #16
	bl	_amdgpu_bo_create_kernel
	cbz	w0, LBB0_6
; %bb.5:
	mov	x0, x21
	mov	x1, x22
	mov	x2, x20
	bl	_amdgpu_bo_free_kernel
	b	LBB0_1
LBB0_6:
	mov	x0, x19
	bl	_smum_is_hw_avfs_present
	cbz	x0, LBB0_2
; %bb.7:
	ldr	w8, [x19]
Lloh7:
	adrp	x9, _PP_AVFS_MASK@GOTPAGE
Lloh8:
	ldr	x9, [x9, _PP_AVFS_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.8:
	mov	w0, #0
	mov	w8, #1
	str	w8, [x19, #4]
	b	LBB0_2
LBB0_9:
	mov	w0, #0
	b	LBB0_2
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ; @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_PP_AVFS_MASK,4,2               ; @PP_AVFS_MASK
.subsections_via_symbols
