	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_vgpu_stop_schedule       ## -- Begin function intel_vgpu_stop_schedule
	.p2align	4, 0x90
_intel_vgpu_stop_schedule:              ## @intel_vgpu_stop_schedule
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	16(%rdi), %rax
	cmpl	$0, (%rax)
	je	LBB0_11
## %bb.1:
	movq	%rdi, %r12
	movq	(%rdi), %r13
	movq	8(%r13), %rbx
	movl	8(%rdi), %esi
	leaq	L_.str(%rip), %rdi
	callq	_gvt_dbg_core
	movq	(%r12), %rdi
	callq	_mutex_lock
	movq	48(%r13), %rax
	movq	%r12, %rdi
	callq	*(%rax)
	cmpq	%r12, 40(%r13)
	je	LBB0_2
## %bb.3:
	cmpq	%r12, 32(%r13)
	je	LBB0_4
LBB0_5:
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	callq	_intel_runtime_pm_get
	leaq	20(%r13), %r15
	movq	%r15, %rdi
	callq	_spin_lock_bh
	movq	_I915_NUM_ENGINES@GOTPCREL(%rip), %r14
	movl	(%r14), %eax
	testl	%eax, %eax
	jle	LBB0_10
## %bb.6:
	xorl	%ebx, %ebx
	jmp	LBB0_7
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_7 Depth=1
	incq	%rbx
	movslq	%eax, %rcx
	cmpq	%rcx, %rbx
	jge	LBB0_10
LBB0_7:                                 ## =>This Inner Loop Header: Depth=1
	movq	24(%r13), %rcx
	cmpq	%r12, (%rcx,%rbx,8)
	jne	LBB0_9
## %bb.8:                               ##   in Loop: Header=BB0_7 Depth=1
	movq	%r12, %rdi
	xorl	%esi, %esi
	movl	%ebx, %edx
	callq	_intel_gvt_switch_mmio
	movq	24(%r13), %rax
	movq	$0, (%rax,%rbx,8)
	movl	(%r14), %eax
	jmp	LBB0_9
LBB0_10:
	movq	%r15, %rdi
	callq	_spin_unlock_bh
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_intel_runtime_pm_put_unchecked
	movq	(%r12), %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mutex_unlock                   ## TAILCALL
LBB0_11:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	$0, 40(%r13)
	cmpq	%r12, 32(%r13)
	jne	LBB0_5
LBB0_4:
	movl	$1, 16(%r13)
	movq	$0, 32(%r13)
	jmp	LBB0_5
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"vgpu%d: stop schedule\n"

	.comm	_I915_NUM_ENGINES,4,2           ## @I915_NUM_ENGINES
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_vgpu_stop_schedule       ; -- Begin function intel_vgpu_stop_schedule
	.p2align	2
_intel_vgpu_stop_schedule:              ; @intel_vgpu_stop_schedule
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	x8, [x0, #16]
	ldr	w8, [x8]
	cbz	w8, LBB0_11
; %bb.1:
	mov	x19, x0
	ldr	x23, [x0]
	ldr	x20, [x23, #8]
	ldr	w1, [x0, #8]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_gvt_dbg_core
	ldr	x0, [x19]
	bl	_mutex_lock
	ldr	x8, [x23, #48]
	ldr	x8, [x8]
	mov	x0, x19
	blr	x8
	ldr	x8, [x23, #40]
	cmp	x8, x19
	b.ne	LBB0_3
; %bb.2:
	str	xzr, [x23, #40]
LBB0_3:
	ldr	x8, [x23, #32]
	cmp	x8, x19
	b.ne	LBB0_5
; %bb.4:
	mov	w8, #1
	str	w8, [x23, #16]
	str	xzr, [x23, #32]
LBB0_5:
	mov	x0, x20
	bl	_intel_runtime_pm_get
	add	x21, x23, #20
	mov	x0, x21
	bl	_spin_lock_bh
Lloh2:
	adrp	x24, _I915_NUM_ENGINES@GOTPAGE
Lloh3:
	ldr	x24, [x24, _I915_NUM_ENGINES@GOTPAGEOFF]
	ldr	w8, [x24]
	cmp	w8, #1
	b.lt	LBB0_10
; %bb.6:
	mov	x22, #0
	b	LBB0_8
LBB0_7:                                 ;   in Loop: Header=BB0_8 Depth=1
	add	x22, x22, #1
	cmp	x22, w8, sxtw
	b.ge	LBB0_10
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x23, #24]
	ldr	x9, [x9, x22, lsl #3]
	cmp	x9, x19
	b.ne	LBB0_7
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=1
	mov	x0, x19
	mov	x1, #0
	mov	x2, x22
	bl	_intel_gvt_switch_mmio
	ldr	x8, [x23, #24]
	str	xzr, [x8, x22, lsl #3]
	ldr	w8, [x24]
	b	LBB0_7
LBB0_10:
	mov	x0, x21
	bl	_spin_unlock_bh
	mov	x0, x20
	bl	_intel_runtime_pm_put_unchecked
	ldr	x0, [x19]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_mutex_unlock
LBB0_11:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"vgpu%d: stop schedule\n"

	.comm	_I915_NUM_ENGINES,4,2           ; @I915_NUM_ENGINES
.subsections_via_symbols
