	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function i9xx_get_pipe_config
_i9xx_get_pipe_config:                  ## @i9xx_get_pipe_config
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	8(%rdi), %edi
	callq	_to_i915
	movq	%rax, %r14
	movq	(%r13), %rdi
	callq	_POWER_DOMAIN_PIPE
	movl	%eax, %ebx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_intel_display_power_get_if_enabled
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	movq	_INTEL_OUTPUT_FORMAT_RGB@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 72(%r12)
	movq	(%r13), %rdi
	movl	%edi, (%r12)
	movq	$0, 64(%r12)
	callq	_PIPECONF
	movl	%eax, %edi
	callq	_I915_READ
	movq	%rax, %r15
	movq	_PIPECONF_ENABLE@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_3
## %bb.4:
	movq	%r14, %rdi
	callq	_IS_G4X
	testq	%rax, %rax
	jne	LBB0_7
## %bb.5:
	movq	%r14, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	jne	LBB0_7
## %bb.6:
	movq	%r14, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_9
LBB0_7:
	movq	_PIPECONF_BPC_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r15d, %eax
	addl	$-128, %eax
	cmpl	$2, %eax
	ja	LBB0_9
## %bb.8:
	cltq
	leaq	l_switch.table.i9xx_get_pipe_config(%rip), %rcx
	movl	(%rcx,%rax,4), %eax
	movl	%eax, 4(%r12)
LBB0_9:
	movq	%r14, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	jne	LBB0_11
## %bb.10:
	movq	%r14, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_13
LBB0_11:
	movq	_PIPECONF_COLOR_RANGE_SELECT@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_13
## %bb.12:
	movl	$1, 8(%r12)
LBB0_13:
	movq	_PIPECONF_GAMMA_MODE_MASK_I9XX@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r15d, %eax
	movq	_PIPECONF_GAMMA_MODE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	movl	%eax, 12(%r12)
	movq	%r14, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_15
## %bb.14:
	movq	(%r13), %rdi
	callq	_CGM_PIPE_MODE
	movl	%eax, %edi
	callq	_I915_READ
	movq	%rax, 56(%r12)
LBB0_15:
	movq	%r12, %rdi
	callq	_i9xx_get_pipe_color_config
	movq	%r12, %rdi
	callq	_intel_color_get_config
	movq	%r14, %rdi
	callq	_INTEL_GEN
	cmpl	$3, %eax
	jg	LBB0_17
## %bb.16:
	movq	_PIPECONF_DOUBLE_WIDE@GOTPCREL(%rip), %rax
	andl	(%rax), %r15d
	movl	%r15d, 16(%r12)
LBB0_17:
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	_intel_get_pipe_timings
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	_intel_get_pipe_src_size
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	_i9xx_get_pfit_config
	movq	%r14, %rdi
	callq	_INTEL_GEN
	movq	%r14, %rdi
	cmpl	$4, %eax
	jl	LBB0_23
## %bb.18:
	callq	_IS_CHERRYVIEW
	movq	(%r13), %rdi
	testq	%rax, %rax
	je	LBB0_21
## %bb.19:
	movq	_PIPE_A@GOTPCREL(%rip), %rax
	cmpq	(%rax), %rdi
	je	LBB0_21
## %bb.20:
	movq	(%r14), %rax
	movl	(%rax,%rdi,4), %eax
	jmp	LBB0_22
LBB0_1:
	xorl	%ebx, %ebx
	jmp	LBB0_41
LBB0_3:
	xorl	%ebx, %ebx
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	jmp	LBB0_40
LBB0_23:
	callq	_IS_I945G
	testq	%rax, %rax
	jne	LBB0_27
## %bb.24:
	movq	%r14, %rdi
	callq	_IS_I945GM
	testq	%rax, %rax
	jne	LBB0_27
## %bb.25:
	movq	%r14, %rdi
	callq	_IS_G33
	testq	%rax, %rax
	jne	LBB0_27
## %bb.26:
	movq	%r14, %rdi
	callq	_IS_PINEVIEW
	testq	%rax, %rax
	je	LBB0_28
LBB0_27:
	movq	(%r13), %rdi
	callq	_DPLL
	movl	%eax, %edi
	callq	_I915_READ
	movq	_SDVO_MULTIPLIER_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_SDVO_MULTIPLIER_SHIFT_HIRES@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %eax
	incl	%eax
	movl	%eax, 20(%r12)
LBB0_29:
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	jmp	LBB0_30
LBB0_21:
	callq	_DPLL_MD
	movl	%eax, %edi
	callq	_I915_READ
LBB0_22:
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	movq	_DPLL_MD_UDI_MULTIPLIER_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	%eax, %edx
	movq	_DPLL_MD_UDI_MULTIPLIER_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %edx
	incl	%edx
	movl	%edx, 20(%r12)
	movl	%eax, 32(%r12)
LBB0_30:
	movq	(%r13), %rdi
	callq	_DPLL
	movl	%eax, %edi
	callq	_I915_READ
	movl	%eax, 36(%r12)
	movq	%r14, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	jne	LBB0_33
## %bb.31:
	movq	%r14, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_32
LBB0_33:
	movq	_DPLL_LOCK_VLV@GOTPCREL(%rip), %rax
	movq	_DPLL_PORTC_READY_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_DPLL_PORTB_READY_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	notl	%ecx
	andl	%ecx, 36(%r12)
LBB0_34:
	movq	%r14, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_36
## %bb.35:
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	_chv_crtc_clock_get
	jmp	LBB0_39
LBB0_36:
	movq	%r14, %rdi
	callq	_IS_VALLEYVIEW
	movq	%r13, %rdi
	movq	%r12, %rsi
	testq	%rax, %rax
	je	LBB0_38
## %bb.37:
	callq	_vlv_crtc_clock_get
	jmp	LBB0_39
LBB0_32:
	movq	(%r13), %rdi
	callq	_FP0
	movl	%eax, %edi
	callq	_I915_READ
	movq	%rax, 48(%r12)
	movq	(%r13), %rdi
	callq	_FP1
	movl	%eax, %edi
	callq	_I915_READ
	movq	%rax, 40(%r12)
	jmp	LBB0_34
LBB0_38:
	callq	_i9xx_crtc_clock_get
LBB0_39:
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	movl	24(%r12), %eax
	cltd
	idivl	20(%r12)
	movl	%eax, 28(%r12)
	movl	$1, %ebx
LBB0_40:
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%ecx, %edx
	callq	_intel_display_power_put
LBB0_41:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_28:
	movl	$1, 20(%r12)
	jmp	LBB0_29
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_OUTPUT_FORMAT_RGB,4,2    ## @INTEL_OUTPUT_FORMAT_RGB
	.comm	_PIPECONF_ENABLE,4,2            ## @PIPECONF_ENABLE
	.comm	_PIPECONF_BPC_MASK,4,2          ## @PIPECONF_BPC_MASK
	.comm	_PIPECONF_COLOR_RANGE_SELECT,4,2 ## @PIPECONF_COLOR_RANGE_SELECT
	.comm	_PIPECONF_GAMMA_MODE_MASK_I9XX,4,2 ## @PIPECONF_GAMMA_MODE_MASK_I9XX
	.comm	_PIPECONF_GAMMA_MODE_SHIFT,4,2  ## @PIPECONF_GAMMA_MODE_SHIFT
	.comm	_PIPECONF_DOUBLE_WIDE,4,2       ## @PIPECONF_DOUBLE_WIDE
	.comm	_PIPE_A,8,3                     ## @PIPE_A
	.comm	_DPLL_MD_UDI_MULTIPLIER_MASK,4,2 ## @DPLL_MD_UDI_MULTIPLIER_MASK
	.comm	_DPLL_MD_UDI_MULTIPLIER_SHIFT,4,2 ## @DPLL_MD_UDI_MULTIPLIER_SHIFT
	.comm	_SDVO_MULTIPLIER_MASK,4,2       ## @SDVO_MULTIPLIER_MASK
	.comm	_SDVO_MULTIPLIER_SHIFT_HIRES,4,2 ## @SDVO_MULTIPLIER_SHIFT_HIRES
	.comm	_DPLL_LOCK_VLV,4,2              ## @DPLL_LOCK_VLV
	.comm	_DPLL_PORTC_READY_MASK,4,2      ## @DPLL_PORTC_READY_MASK
	.comm	_DPLL_PORTB_READY_MASK,4,2      ## @DPLL_PORTB_READY_MASK
	.no_dead_strip	_i9xx_get_pipe_config
	.section	__TEXT,__const
	.p2align	2                               ## @switch.table.i9xx_get_pipe_config
l_switch.table.i9xx_get_pipe_config:
	.long	24                              ## 0x18
	.long	18                              ## 0x12
	.long	30                              ## 0x1e

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function i9xx_get_pipe_config
_i9xx_get_pipe_config:                  ; @i9xx_get_pipe_config
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x23, x0
	ldr	w0, [x0, #8]
	bl	_to_i915
	mov	x19, x0
	ldr	x0, [x23]
	bl	_POWER_DOMAIN_PIPE
	mov	x21, x0
	mov	x0, x19
	mov	x1, x21
	bl	_intel_display_power_get_if_enabled
	cbz	w0, LBB0_19
; %bb.1:
	mov	x22, x0
Lloh0:
	adrp	x8, _INTEL_OUTPUT_FORMAT_RGB@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_OUTPUT_FORMAT_RGB@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [x20, #72]
	ldr	x0, [x23]
	str	w0, [x20]
	str	xzr, [x20, #64]
	bl	_PIPECONF
	bl	_I915_READ
	mov	x24, x0
Lloh3:
	adrp	x8, _PIPECONF_ENABLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PIPECONF_ENABLE@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w24
	b.eq	LBB0_20
; %bb.2:
	mov	x0, x19
	bl	_IS_G4X
	cbnz	x0, LBB0_5
; %bb.3:
	mov	x0, x19
	bl	_IS_VALLEYVIEW
	cbnz	x0, LBB0_5
; %bb.4:
	mov	x0, x19
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_7
LBB0_5:
Lloh6:
	adrp	x8, _PIPECONF_BPC_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PIPECONF_BPC_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	and	w8, w8, w24
	sub	w8, w8, #128
	cmp	w8, #2
	b.hi	LBB0_7
; %bb.6:
Lloh9:
	adrp	x9, l_switch.table.i9xx_get_pipe_config@PAGE
Lloh10:
	add	x9, x9, l_switch.table.i9xx_get_pipe_config@PAGEOFF
	ldr	w8, [x9, w8, sxtw #2]
	str	w8, [x20, #4]
LBB0_7:
	mov	x0, x19
	bl	_IS_VALLEYVIEW
	cbnz	x0, LBB0_9
; %bb.8:
	mov	x0, x19
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_11
LBB0_9:
Lloh11:
	adrp	x8, _PIPECONF_COLOR_RANGE_SELECT@GOTPAGE
Lloh12:
	ldr	x8, [x8, _PIPECONF_COLOR_RANGE_SELECT@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	tst	w8, w24
	b.eq	LBB0_11
; %bb.10:
	mov	w8, #1
	str	w8, [x20, #8]
LBB0_11:
Lloh14:
	adrp	x8, _PIPECONF_GAMMA_MODE_MASK_I9XX@GOTPAGE
Lloh15:
	ldr	x8, [x8, _PIPECONF_GAMMA_MODE_MASK_I9XX@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	and	w8, w8, w24
Lloh17:
	adrp	x9, _PIPECONF_GAMMA_MODE_SHIFT@GOTPAGE
Lloh18:
	ldr	x9, [x9, _PIPECONF_GAMMA_MODE_SHIFT@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	asr	w8, w8, w9
	str	w8, [x20, #12]
	mov	x0, x19
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_13
; %bb.12:
	ldr	x0, [x23]
	bl	_CGM_PIPE_MODE
	bl	_I915_READ
	str	x0, [x20, #56]
LBB0_13:
	mov	x0, x20
	bl	_i9xx_get_pipe_color_config
	mov	x0, x20
	bl	_intel_color_get_config
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #3
	b.gt	LBB0_15
; %bb.14:
Lloh20:
	adrp	x8, _PIPECONF_DOUBLE_WIDE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _PIPECONF_DOUBLE_WIDE@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	and	w8, w8, w24
	str	w8, [x20, #16]
LBB0_15:
	mov	x0, x23
	mov	x1, x20
	bl	_intel_get_pipe_timings
	mov	x0, x23
	mov	x1, x20
	bl	_intel_get_pipe_src_size
	mov	x0, x23
	mov	x1, x20
	bl	_i9xx_get_pfit_config
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #4
	b.lt	LBB0_21
; %bb.16:
	mov	x0, x19
	bl	_IS_CHERRYVIEW
	mov	x8, x0
	ldr	x0, [x23]
	cbz	x8, LBB0_27
; %bb.17:
Lloh23:
	adrp	x8, _PIPE_A@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PIPE_A@GOTPAGEOFF]
Lloh25:
	ldr	x8, [x8]
	cmp	x0, x8
	b.eq	LBB0_27
; %bb.18:
	ldr	x8, [x19]
	ldr	w0, [x8, x0, lsl #2]
	b	LBB0_28
LBB0_19:
	mov	w20, #0
	b	LBB0_40
LBB0_20:
	mov	w20, #0
	b	LBB0_39
LBB0_21:
	mov	x0, x19
	bl	_IS_I945G
	cbnz	x0, LBB0_25
; %bb.22:
	mov	x0, x19
	bl	_IS_I945GM
	cbnz	x0, LBB0_25
; %bb.23:
	mov	x0, x19
	bl	_IS_G33
	cbnz	x0, LBB0_25
; %bb.24:
	mov	x0, x19
	bl	_IS_PINEVIEW
	cbz	x0, LBB0_41
LBB0_25:
	ldr	x0, [x23]
	bl	_DPLL
	bl	_I915_READ
Lloh26:
	adrp	x8, _SDVO_MULTIPLIER_MASK@GOTPAGE
Lloh27:
	ldr	x8, [x8, _SDVO_MULTIPLIER_MASK@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh29:
	adrp	x9, _SDVO_MULTIPLIER_SHIFT_HIRES@GOTPAGE
Lloh30:
	ldr	x9, [x9, _SDVO_MULTIPLIER_SHIFT_HIRES@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	asr	w8, w8, w9
	add	w8, w8, #1
LBB0_26:
	str	w8, [x20, #20]
	b	LBB0_29
LBB0_27:
	bl	_DPLL_MD
	bl	_I915_READ
LBB0_28:
Lloh32:
	adrp	x8, _DPLL_MD_UDI_MULTIPLIER_MASK@GOTPAGE
Lloh33:
	ldr	x8, [x8, _DPLL_MD_UDI_MULTIPLIER_MASK@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
Lloh35:
	adrp	x9, _DPLL_MD_UDI_MULTIPLIER_SHIFT@GOTPAGE
Lloh36:
	ldr	x9, [x9, _DPLL_MD_UDI_MULTIPLIER_SHIFT@GOTPAGEOFF]
	and	w8, w8, w0
Lloh37:
	ldr	w9, [x9]
	asr	w8, w8, w9
	add	w8, w8, #1
	str	w8, [x20, #20]
	str	w0, [x20, #32]
LBB0_29:
	ldr	x0, [x23]
	bl	_DPLL
	bl	_I915_READ
	str	w0, [x20, #36]
	mov	x0, x19
	bl	_IS_VALLEYVIEW
	cbnz	x0, LBB0_31
; %bb.30:
	mov	x0, x19
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_36
LBB0_31:
Lloh38:
	adrp	x8, _DPLL_LOCK_VLV@GOTPAGE
Lloh39:
	ldr	x8, [x8, _DPLL_LOCK_VLV@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
Lloh41:
	adrp	x9, _DPLL_PORTC_READY_MASK@GOTPAGE
Lloh42:
	ldr	x9, [x9, _DPLL_PORTC_READY_MASK@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
Lloh44:
	adrp	x10, _DPLL_PORTB_READY_MASK@GOTPAGE
Lloh45:
	ldr	x10, [x10, _DPLL_PORTB_READY_MASK@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh46:
	ldr	w9, [x10]
	orr	w8, w8, w9
	ldr	w9, [x20, #36]
	bic	w8, w9, w8
	str	w8, [x20, #36]
LBB0_32:
	mov	x0, x19
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_34
; %bb.33:
	mov	x0, x23
	mov	x1, x20
	bl	_chv_crtc_clock_get
	b	LBB0_38
LBB0_34:
	mov	x0, x19
	bl	_IS_VALLEYVIEW
	cbz	x0, LBB0_37
; %bb.35:
	mov	x0, x23
	mov	x1, x20
	bl	_vlv_crtc_clock_get
	b	LBB0_38
LBB0_36:
	ldr	x0, [x23]
	bl	_FP0
	bl	_I915_READ
	str	x0, [x20, #48]
	ldr	x0, [x23]
	bl	_FP1
	bl	_I915_READ
	str	x0, [x20, #40]
	b	LBB0_32
LBB0_37:
	mov	x0, x23
	mov	x1, x20
	bl	_i9xx_crtc_clock_get
LBB0_38:
	ldp	w9, w8, [x20, #20]
	sdiv	w8, w8, w9
	str	w8, [x20, #28]
	mov	w20, #1
LBB0_39:
	mov	x0, x19
	mov	x1, x21
	mov	x2, x22
	bl	_intel_display_power_put
LBB0_40:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_41:
	mov	w8, #1
	b	LBB0_26
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_OUTPUT_FORMAT_RGB,4,2    ; @INTEL_OUTPUT_FORMAT_RGB
	.comm	_PIPECONF_ENABLE,4,2            ; @PIPECONF_ENABLE
	.comm	_PIPECONF_BPC_MASK,4,2          ; @PIPECONF_BPC_MASK
	.comm	_PIPECONF_COLOR_RANGE_SELECT,4,2 ; @PIPECONF_COLOR_RANGE_SELECT
	.comm	_PIPECONF_GAMMA_MODE_MASK_I9XX,4,2 ; @PIPECONF_GAMMA_MODE_MASK_I9XX
	.comm	_PIPECONF_GAMMA_MODE_SHIFT,4,2  ; @PIPECONF_GAMMA_MODE_SHIFT
	.comm	_PIPECONF_DOUBLE_WIDE,4,2       ; @PIPECONF_DOUBLE_WIDE
	.comm	_PIPE_A,8,3                     ; @PIPE_A
	.comm	_DPLL_MD_UDI_MULTIPLIER_MASK,4,2 ; @DPLL_MD_UDI_MULTIPLIER_MASK
	.comm	_DPLL_MD_UDI_MULTIPLIER_SHIFT,4,2 ; @DPLL_MD_UDI_MULTIPLIER_SHIFT
	.comm	_SDVO_MULTIPLIER_MASK,4,2       ; @SDVO_MULTIPLIER_MASK
	.comm	_SDVO_MULTIPLIER_SHIFT_HIRES,4,2 ; @SDVO_MULTIPLIER_SHIFT_HIRES
	.comm	_DPLL_LOCK_VLV,4,2              ; @DPLL_LOCK_VLV
	.comm	_DPLL_PORTC_READY_MASK,4,2      ; @DPLL_PORTC_READY_MASK
	.comm	_DPLL_PORTB_READY_MASK,4,2      ; @DPLL_PORTB_READY_MASK
	.no_dead_strip	_i9xx_get_pipe_config
	.section	__TEXT,__const
	.p2align	2                               ; @switch.table.i9xx_get_pipe_config
l_switch.table.i9xx_get_pipe_config:
	.long	24                              ; 0x18
	.long	18                              ; 0x12
	.long	30                              ; 0x1e

.subsections_via_symbols
