	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function emit_tile
_emit_tile:                             ## @emit_tile
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, -52(%rbp)                 ## 4-byte Spill
	movl	%r8d, -56(%rbp)                 ## 4-byte Spill
	movl	%ecx, %ebx
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %r13
	movq	8(%rdi), %r12
	movq	(%r12), %r14
	cmpq	$0, 40(%rsi)
	movl	%ecx, -48(%rbp)                 ## 4-byte Spill
	je	LBB0_5
## %bb.1:
	movq	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 52(%r12)
	je	LBB0_3
## %bb.2:
	leaq	52(%r12), %rbx
	movq	_VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rcl_u8
	movq	40(%r15), %rsi
	movq	%r13, %rdi
	movq	%rbx, %rdx
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	movl	%ebx, %r8d
	callq	_vc4_full_res_offset
	movl	%eax, %esi
	movq	_VC4_LOADSTORE_FULL_RES_DISABLE_ZS@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	jmp	LBB0_4
LBB0_3:
	movq	_VC4_PACKET_LOAD_TILE_BUFFER_GENERAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rcl_u8
	movl	56(%r12), %esi
	movq	%r15, %rdi
	callq	_rcl_u16
	movq	40(%r15), %rax
	movl	60(%r12), %esi
	addl	(%rax), %esi
LBB0_4:
	movq	%r15, %rdi
	callq	_rcl_u32
LBB0_5:
	cmpq	$0, 32(%r15)
	je	LBB0_12
## %bb.6:
	cmpq	$0, 40(%r15)
	je	LBB0_8
## %bb.7:
	movq	%r15, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%ebx, %edx
	callq	_vc4_tile_coordinates
	movq	%r15, %rdi
	callq	_vc4_store_before_load
LBB0_8:
	movq	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 40(%r12)
	je	LBB0_10
## %bb.9:
	leaq	40(%r12), %rbx
	movq	_VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rcl_u8
	movq	32(%r15), %rsi
	movq	%r13, %rdi
	movq	%rbx, %rdx
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	movl	%ebx, %r8d
	callq	_vc4_full_res_offset
	movl	%eax, %esi
	movq	_VC4_LOADSTORE_FULL_RES_DISABLE_COLOR@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	jmp	LBB0_11
LBB0_10:
	movq	_VC4_PACKET_LOAD_TILE_BUFFER_GENERAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rcl_u8
	movl	44(%r12), %esi
	movq	%r15, %rdi
	callq	_rcl_u16
	movq	32(%r15), %rax
	movl	48(%r12), %esi
	addl	(%rax), %esi
LBB0_11:
	movq	%r15, %rdi
	callq	_rcl_u32
LBB0_12:
	movq	%r15, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%ebx, %edx
	callq	_vc4_tile_coordinates
	cmpl	$0, -56(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_15
## %bb.13:
	testq	%r14, %r14
	je	LBB0_15
## %bb.14:
	movq	_VC4_PACKET_WAIT_ON_SEMAPHORE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rcl_u8
LBB0_15:
	testq	%r14, %r14
	je	LBB0_17
## %bb.16:
	movq	_VC4_PACKET_BRANCH_TO_SUB_LIST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rcl_u8
	movl	4(%r13), %esi
	imull	%ebx, %esi
	addl	-44(%rbp), %esi                 ## 4-byte Folded Reload
	shll	$5, %esi
	addl	(%r13), %esi
	movq	%r15, %rdi
	callq	_rcl_u32
LBB0_17:
	cmpq	$0, 16(%r15)
	je	LBB0_24
## %bb.18:
	cmpq	$0, 8(%r15)
	jne	LBB0_20
## %bb.19:
	cmpq	$0, (%r15)
	je	LBB0_54
LBB0_20:
	movq	_VC4_LOADSTORE_FULL_RES_DISABLE_ZS@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
LBB0_21:
	movq	_VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL@GOTPCREL(%rip), %rax
LBB0_22:
	orl	(%rax), %r14d
LBB0_23:
	movq	_VC4_PACKET_STORE_FULL_RES_TILE_BUFFER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rcl_u8
	movq	16(%r15), %rsi
	leaq	28(%r12), %rdx
	movq	%r13, %rdi
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	movl	%ebx, %r8d
	callq	_vc4_full_res_offset
	orl	%eax, %r14d
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_rcl_u32
LBB0_24:
	cmpq	$0, 8(%r15)
	je	LBB0_35
## %bb.25:
	cmpq	$0, (%r15)
	je	LBB0_27
## %bb.26:
	xorl	%ebx, %ebx
	jmp	LBB0_28
LBB0_27:
	cmpq	$0, 24(%r15)
	sete	%bl
LBB0_28:
	movq	_VC4_LOADSTORE_FULL_RES_DISABLE_COLOR@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	cmpq	$0, 16(%r15)
	je	LBB0_30
## %bb.29:
	movq	%r15, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	callq	_vc4_tile_coordinates
LBB0_30:
	testb	%bl, %bl
	je	LBB0_33
## %bb.31:
	cmpl	$0, -52(%rbp)                   ## 4-byte Folded Reload
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	je	LBB0_34
## %bb.32:
	movq	_VC4_LOADSTORE_FULL_RES_EOF@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	jmp	LBB0_34
LBB0_33:
	movq	_VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
LBB0_34:
	movq	_VC4_PACKET_STORE_FULL_RES_TILE_BUFFER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rcl_u8
	movq	8(%r15), %rsi
	leaq	16(%r12), %rdx
	movq	%r13, %rdi
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	movl	%ebx, %r8d
	callq	_vc4_full_res_offset
	orl	%eax, %r14d
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_rcl_u32
LBB0_35:
	cmpq	$0, (%r15)
	je	LBB0_44
## %bb.36:
	movq	24(%r15), %r14
	cmpq	$0, 16(%r15)
	jne	LBB0_38
## %bb.37:
	cmpq	$0, 8(%r15)
	je	LBB0_39
LBB0_38:
	movq	%r15, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%ebx, %edx
	callq	_vc4_tile_coordinates
LBB0_39:
	movq	_VC4_PACKET_STORE_TILE_BUFFER_GENERAL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_rcl_u8
	xorl	%ebx, %ebx
	movl	$0, %esi
	testq	%r14, %r14
	je	LBB0_41
## %bb.40:
	movq	_VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
LBB0_41:
	orl	8(%r12), %esi
	movq	%r15, %rdi
	callq	_rcl_u16
	movq	(%r15), %rcx
	movl	12(%r12), %eax
	testq	%r14, %r14
	jne	LBB0_43
## %bb.42:
	movq	_VC4_LOADSTORE_TILE_BUFFER_EOF@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
LBB0_43:
	addl	(%rcx), %eax
	movl	-52(%rbp), %ecx                 ## 4-byte Reload
	testl	%ecx, %ecx
	cmovel	%ecx, %ebx
	orl	%eax, %ebx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_rcl_u32
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
LBB0_44:
	cmpq	$0, 24(%r15)
	je	LBB0_51
## %bb.45:
	cmpq	$0, 16(%r15)
	jne	LBB0_48
## %bb.46:
	cmpq	$0, 8(%r15)
	jne	LBB0_48
## %bb.47:
	cmpq	$0, (%r15)
	je	LBB0_49
LBB0_48:
	movq	%r15, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%ebx, %edx
	callq	_vc4_tile_coordinates
LBB0_49:
	cmpl	$0, -52(%rbp)                   ## 4-byte Folded Reload
	jne	LBB0_52
## %bb.50:
	movq	_VC4_PACKET_STORE_MS_TILE_BUFFER@GOTPCREL(%rip), %rax
	jmp	LBB0_53
LBB0_51:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_52:
	movq	_VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF@GOTPCREL(%rip), %rax
LBB0_53:
	movl	(%rax), %esi
	movq	%r15, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_rcl_u8                         ## TAILCALL
LBB0_54:
	cmpq	$0, 24(%r15)
	movq	_VC4_LOADSTORE_FULL_RES_DISABLE_ZS@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	jne	LBB0_21
## %bb.56:
	cmpl	$0, -52(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_23
## %bb.57:
	movq	_VC4_LOADSTORE_FULL_RES_EOF@GOTPCREL(%rip), %rax
	jmp	LBB0_22
	.cfi_endproc
                                        ## -- End function
	.comm	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES,4,2 ## @VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES
	.comm	_VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER,4,2 ## @VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER
	.comm	_VC4_LOADSTORE_FULL_RES_DISABLE_ZS,4,2 ## @VC4_LOADSTORE_FULL_RES_DISABLE_ZS
	.comm	_VC4_PACKET_LOAD_TILE_BUFFER_GENERAL,4,2 ## @VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
	.comm	_VC4_LOADSTORE_FULL_RES_DISABLE_COLOR,4,2 ## @VC4_LOADSTORE_FULL_RES_DISABLE_COLOR
	.comm	_VC4_PACKET_WAIT_ON_SEMAPHORE,4,2 ## @VC4_PACKET_WAIT_ON_SEMAPHORE
	.comm	_VC4_PACKET_BRANCH_TO_SUB_LIST,4,2 ## @VC4_PACKET_BRANCH_TO_SUB_LIST
	.comm	_VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL,4,2 ## @VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL
	.comm	_VC4_LOADSTORE_FULL_RES_EOF,4,2 ## @VC4_LOADSTORE_FULL_RES_EOF
	.comm	_VC4_PACKET_STORE_FULL_RES_TILE_BUFFER,4,2 ## @VC4_PACKET_STORE_FULL_RES_TILE_BUFFER
	.comm	_VC4_PACKET_STORE_TILE_BUFFER_GENERAL,4,2 ## @VC4_PACKET_STORE_TILE_BUFFER_GENERAL
	.comm	_VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR,4,2 ## @VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR
	.comm	_VC4_LOADSTORE_TILE_BUFFER_EOF,4,2 ## @VC4_LOADSTORE_TILE_BUFFER_EOF
	.comm	_VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF,4,2 ## @VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF
	.comm	_VC4_PACKET_STORE_MS_TILE_BUFFER,4,2 ## @VC4_PACKET_STORE_MS_TILE_BUFFER
	.no_dead_strip	_emit_tile
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function emit_tile
_emit_tile:                             ; @emit_tile
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x5
	mov	x24, x4
	mov	x21, x3
	mov	x22, x2
	mov	x20, x1
	mov	x23, x0
	ldr	x26, [x0, #8]
	ldr	x28, [x26]
	ldr	x8, [x1, #40]
Lloh0:
	adrp	x27, _VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPAGE
Lloh1:
	ldr	x27, [x27, _VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPAGEOFF]
	cbz	x8, LBB0_5
; %bb.1:
	mov	x25, x26
	ldr	w8, [x25, #52]!
	ldr	w9, [x27]
	tst	w9, w8
	b.eq	LBB0_3
; %bb.2:
Lloh2:
	adrp	x8, _VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER@GOTPAGE
Lloh3:
	ldr	x8, [x8, _VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rcl_u8
	ldr	x1, [x20, #40]
	mov	x0, x23
	mov	x2, x25
	mov	x3, x22
	mov	x4, x21
	bl	_vc4_full_res_offset
Lloh5:
	adrp	x8, _VC4_LOADSTORE_FULL_RES_DISABLE_ZS@GOTPAGE
Lloh6:
	ldr	x8, [x8, _VC4_LOADSTORE_FULL_RES_DISABLE_ZS@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	orr	w1, w8, w0
	b	LBB0_4
LBB0_3:
Lloh8:
	adrp	x8, _VC4_PACKET_LOAD_TILE_BUFFER_GENERAL@GOTPAGE
Lloh9:
	ldr	x8, [x8, _VC4_PACKET_LOAD_TILE_BUFFER_GENERAL@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rcl_u8
	ldr	w1, [x26, #56]
	mov	x0, x20
	bl	_rcl_u16
	ldr	x8, [x20, #40]
	ldr	w8, [x8]
	ldr	w9, [x26, #60]
	add	w1, w9, w8
LBB0_4:
	mov	x0, x20
	bl	_rcl_u32
LBB0_5:
	ldr	x8, [x20, #32]
	cbz	x8, LBB0_12
; %bb.6:
	ldr	x8, [x20, #40]
	cbz	x8, LBB0_8
; %bb.7:
	mov	x0, x20
	mov	x1, x22
	mov	x2, x21
	bl	_vc4_tile_coordinates
	mov	x0, x20
	bl	_vc4_store_before_load
LBB0_8:
	mov	x25, x26
	ldr	w8, [x25, #40]!
	ldr	w9, [x27]
	tst	w9, w8
	b.eq	LBB0_10
; %bb.9:
Lloh11:
	adrp	x8, _VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER@GOTPAGE
Lloh12:
	ldr	x8, [x8, _VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rcl_u8
	ldr	x1, [x20, #32]
	mov	x0, x23
	mov	x2, x25
	mov	x3, x22
	mov	x4, x21
	bl	_vc4_full_res_offset
Lloh14:
	adrp	x8, _VC4_LOADSTORE_FULL_RES_DISABLE_COLOR@GOTPAGE
Lloh15:
	ldr	x8, [x8, _VC4_LOADSTORE_FULL_RES_DISABLE_COLOR@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	orr	w1, w8, w0
	b	LBB0_11
LBB0_10:
Lloh17:
	adrp	x8, _VC4_PACKET_LOAD_TILE_BUFFER_GENERAL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _VC4_PACKET_LOAD_TILE_BUFFER_GENERAL@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rcl_u8
	ldr	w1, [x26, #44]
	mov	x0, x20
	bl	_rcl_u16
	ldr	x8, [x20, #32]
	ldr	w8, [x8]
	ldr	w9, [x26, #48]
	add	w1, w9, w8
LBB0_11:
	mov	x0, x20
	bl	_rcl_u32
LBB0_12:
	mov	x0, x20
	mov	x1, x22
	mov	x2, x21
	bl	_vc4_tile_coordinates
	cbz	w24, LBB0_15
; %bb.13:
	cbz	x28, LBB0_15
; %bb.14:
Lloh20:
	adrp	x8, _VC4_PACKET_WAIT_ON_SEMAPHORE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _VC4_PACKET_WAIT_ON_SEMAPHORE@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rcl_u8
LBB0_15:
	cbz	x28, LBB0_17
; %bb.16:
Lloh23:
	adrp	x8, _VC4_PACKET_BRANCH_TO_SUB_LIST@GOTPAGE
Lloh24:
	ldr	x8, [x8, _VC4_PACKET_BRANCH_TO_SUB_LIST@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rcl_u8
	ldp	w8, w9, [x23]
	madd	w9, w9, w21, w22
	add	w1, w8, w9, lsl #5
	mov	x0, x20
	bl	_rcl_u32
LBB0_17:
	ldr	x8, [x20, #16]
Lloh26:
	adrp	x24, _VC4_PACKET_STORE_FULL_RES_TILE_BUFFER@GOTPAGE
Lloh27:
	ldr	x24, [x24, _VC4_PACKET_STORE_FULL_RES_TILE_BUFFER@GOTPAGEOFF]
	cbz	x8, LBB0_24
; %bb.18:
	ldr	x8, [x20, #8]
	cbnz	x8, LBB0_20
; %bb.19:
	ldr	x8, [x20]
	cbz	x8, LBB0_48
LBB0_20:
Lloh28:
	adrp	x8, _VC4_LOADSTORE_FULL_RES_DISABLE_ZS@GOTPAGE
Lloh29:
	ldr	x8, [x8, _VC4_LOADSTORE_FULL_RES_DISABLE_ZS@GOTPAGEOFF]
Lloh30:
	ldr	w25, [x8]
LBB0_21:
Lloh31:
	adrp	x8, _VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL@GOTPAGE
Lloh32:
	ldr	x8, [x8, _VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL@GOTPAGEOFF]
LBB0_22:
	ldr	w8, [x8]
	orr	w25, w8, w25
LBB0_23:
	ldr	w1, [x24]
	mov	x0, x20
	bl	_rcl_u8
	ldr	x1, [x20, #16]
	add	x2, x26, #28
	mov	x0, x23
	mov	x3, x22
	mov	x4, x21
	bl	_vc4_full_res_offset
	orr	w1, w0, w25
	mov	x0, x20
	bl	_rcl_u32
LBB0_24:
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_36
; %bb.25:
	ldr	x8, [x20]
	cbz	x8, LBB0_27
; %bb.26:
	mov	w27, #0
	b	LBB0_28
LBB0_27:
	ldr	x8, [x20, #24]
	cmp	x8, #0
	cset	w27, eq
LBB0_28:
Lloh33:
	adrp	x8, _VC4_LOADSTORE_FULL_RES_DISABLE_COLOR@GOTPAGE
Lloh34:
	ldr	x8, [x8, _VC4_LOADSTORE_FULL_RES_DISABLE_COLOR@GOTPAGEOFF]
Lloh35:
	ldr	w25, [x8]
	ldr	x8, [x20, #16]
	cbz	x8, LBB0_30
; %bb.29:
	mov	x0, x20
	mov	x1, x22
	mov	x2, x21
	bl	_vc4_tile_coordinates
LBB0_30:
	tbz	w27, #0, LBB0_33
; %bb.31:
	cbz	w19, LBB0_35
; %bb.32:
Lloh36:
	adrp	x8, _VC4_LOADSTORE_FULL_RES_EOF@GOTPAGE
Lloh37:
	ldr	x8, [x8, _VC4_LOADSTORE_FULL_RES_EOF@GOTPAGEOFF]
	b	LBB0_34
LBB0_33:
Lloh38:
	adrp	x8, _VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL@GOTPAGE
Lloh39:
	ldr	x8, [x8, _VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL@GOTPAGEOFF]
LBB0_34:
	ldr	w8, [x8]
	orr	w25, w8, w25
LBB0_35:
	ldr	w1, [x24]
	mov	x0, x20
	bl	_rcl_u8
	ldr	x1, [x20, #8]
	add	x2, x26, #16
	mov	x0, x23
	mov	x3, x22
	mov	x4, x21
	bl	_vc4_full_res_offset
	orr	w1, w0, w25
	mov	x0, x20
	bl	_rcl_u32
LBB0_36:
	ldr	x8, [x20]
	cbz	x8, LBB0_41
; %bb.37:
	ldp	x8, x23, [x20, #16]
	cbnz	x8, LBB0_39
; %bb.38:
	ldr	x8, [x20, #8]
	cbz	x8, LBB0_40
LBB0_39:
	mov	x0, x20
	mov	x1, x22
	mov	x2, x21
	bl	_vc4_tile_coordinates
LBB0_40:
Lloh40:
	adrp	x8, _VC4_PACKET_STORE_TILE_BUFFER_GENERAL@GOTPAGE
Lloh41:
	ldr	x8, [x8, _VC4_PACKET_STORE_TILE_BUFFER_GENERAL@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_rcl_u8
	cmp	x23, #0
	ldr	w8, [x26, #8]
Lloh43:
	adrp	x9, _VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR@GOTPAGE
Lloh44:
	ldr	x9, [x9, _VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR@GOTPAGEOFF]
Lloh45:
	ldr	w9, [x9]
	csel	w9, wzr, w9, eq
	orr	w1, w9, w8
	mov	x0, x20
	bl	_rcl_u16
	cmp	x23, #0
	ldr	x8, [x20]
	ldr	w8, [x8]
	ldr	w9, [x26, #12]
	ccmp	w19, #0, #4, eq
Lloh46:
	adrp	x10, _VC4_LOADSTORE_TILE_BUFFER_EOF@GOTPAGE
Lloh47:
	ldr	x10, [x10, _VC4_LOADSTORE_TILE_BUFFER_EOF@GOTPAGEOFF]
Lloh48:
	ldr	w10, [x10]
	csel	w10, w10, wzr, ne
	add	w8, w9, w8
	orr	w1, w10, w8
	mov	x0, x20
	bl	_rcl_u32
LBB0_41:
	ldr	x8, [x20, #24]
	cbz	x8, LBB0_47
; %bb.42:
	ldr	x8, [x20, #16]
	cbnz	x8, LBB0_45
; %bb.43:
	ldr	x8, [x20, #8]
	cbnz	x8, LBB0_45
; %bb.44:
	ldr	x8, [x20]
	cbz	x8, LBB0_46
LBB0_45:
	mov	x0, x20
	mov	x1, x22
	mov	x2, x21
	bl	_vc4_tile_coordinates
LBB0_46:
Lloh49:
	adrp	x8, _VC4_PACKET_STORE_MS_TILE_BUFFER@GOTPAGE
Lloh50:
	ldr	x8, [x8, _VC4_PACKET_STORE_MS_TILE_BUFFER@GOTPAGEOFF]
Lloh51:
	adrp	x9, _VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF@GOTPAGE
Lloh52:
	ldr	x9, [x9, _VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF@GOTPAGEOFF]
	cmp	w19, #0
	csel	x8, x8, x9, eq
	ldr	w1, [x8]
	mov	x0, x20
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_rcl_u8
LBB0_47:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_48:
	ldr	x8, [x20, #24]
Lloh53:
	adrp	x9, _VC4_LOADSTORE_FULL_RES_DISABLE_ZS@GOTPAGE
Lloh54:
	ldr	x9, [x9, _VC4_LOADSTORE_FULL_RES_DISABLE_ZS@GOTPAGEOFF]
Lloh55:
	ldr	w25, [x9]
	cbnz	x8, LBB0_21
; %bb.49:
	cbz	w19, LBB0_23
; %bb.50:
Lloh56:
	adrp	x8, _VC4_LOADSTORE_FULL_RES_EOF@GOTPAGE
Lloh57:
	ldr	x8, [x8, _VC4_LOADSTORE_FULL_RES_EOF@GOTPAGEOFF]
	b	LBB0_22
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh56, Lloh57
	.cfi_endproc
                                        ; -- End function
	.comm	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES,4,2 ; @VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES
	.comm	_VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER,4,2 ; @VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER
	.comm	_VC4_LOADSTORE_FULL_RES_DISABLE_ZS,4,2 ; @VC4_LOADSTORE_FULL_RES_DISABLE_ZS
	.comm	_VC4_PACKET_LOAD_TILE_BUFFER_GENERAL,4,2 ; @VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
	.comm	_VC4_LOADSTORE_FULL_RES_DISABLE_COLOR,4,2 ; @VC4_LOADSTORE_FULL_RES_DISABLE_COLOR
	.comm	_VC4_PACKET_WAIT_ON_SEMAPHORE,4,2 ; @VC4_PACKET_WAIT_ON_SEMAPHORE
	.comm	_VC4_PACKET_BRANCH_TO_SUB_LIST,4,2 ; @VC4_PACKET_BRANCH_TO_SUB_LIST
	.comm	_VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL,4,2 ; @VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL
	.comm	_VC4_LOADSTORE_FULL_RES_EOF,4,2 ; @VC4_LOADSTORE_FULL_RES_EOF
	.comm	_VC4_PACKET_STORE_FULL_RES_TILE_BUFFER,4,2 ; @VC4_PACKET_STORE_FULL_RES_TILE_BUFFER
	.comm	_VC4_PACKET_STORE_TILE_BUFFER_GENERAL,4,2 ; @VC4_PACKET_STORE_TILE_BUFFER_GENERAL
	.comm	_VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR,4,2 ; @VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR
	.comm	_VC4_LOADSTORE_TILE_BUFFER_EOF,4,2 ; @VC4_LOADSTORE_TILE_BUFFER_EOF
	.comm	_VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF,4,2 ; @VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF
	.comm	_VC4_PACKET_STORE_MS_TILE_BUFFER,4,2 ; @VC4_PACKET_STORE_MS_TILE_BUFFER
	.no_dead_strip	_emit_tile
.subsections_via_symbols
