	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_dp_set_source_rates
_intel_dp_set_source_rates:             ## @intel_dp_set_source_rates
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	callq	_dp_to_dig_port
	movq	%rax, %rbx
	movl	8(%rax), %edi
	callq	_to_i915
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	(%rbx), %rcx
	movl	$1, %edi
	cmpq	$0, (%r15)
	jne	LBB0_2
## %bb.1:
	xorl	%edi, %edi
	cmpl	$0, 8(%r15)
	setne	%dil
LBB0_2:
	movl	(%rax,%rcx,4), %ebx
	callq	_WARN_ON
	movq	%r14, %rdi
	callq	_INTEL_GEN
	cmpl	$10, %eax
	jl	LBB0_5
## %bb.3:
	leaq	_intel_dp_set_source_rates.cnl_rates(%rip), %r13
	movq	%r13, %rdi
	callq	_ARRAY_SIZE
	movl	%eax, %r12d
	movq	%r14, %rdi
	movl	$10, %esi
	callq	_IS_GEN
	movq	%r15, %rdi
	testq	%rax, %rax
	je	LBB0_15
## %bb.4:
	callq	_cnl_max_source_rate
	jmp	LBB0_16
LBB0_5:
	movq	%r14, %rdi
	callq	_IS_GEN9_LP
	testq	%rax, %rax
	je	LBB0_7
## %bb.6:
	leaq	_intel_dp_set_source_rates.bxt_rates(%rip), %r13
	jmp	LBB0_13
LBB0_15:
	callq	_icl_max_source_rate
LBB0_16:
	testl	%ebx, %ebx
	setne	%cl
	testl	%eax, %eax
	je	LBB0_14
## %bb.17:
	testl	%ebx, %ebx
	je	LBB0_14
## %bb.18:
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_min
	leaq	_intel_dp_set_source_rates.cnl_rates(%rip), %r13
	testl	%eax, %eax
	jne	LBB0_20
	jmp	LBB0_21
LBB0_7:
	movq	%r14, %rdi
	callq	_IS_GEN9_BC
	testq	%rax, %rax
	je	LBB0_9
## %bb.8:
	leaq	_intel_dp_set_source_rates.skl_rates(%rip), %r13
	jmp	LBB0_13
LBB0_9:
	movq	%r14, %rdi
	callq	_IS_HASWELL
	testq	%rax, %rax
	je	LBB0_12
## %bb.10:
	movq	%r14, %rdi
	callq	_IS_HSW_ULX
	testl	%eax, %eax
	je	LBB0_11
LBB0_12:
	movq	%r14, %rdi
	callq	_IS_BROADWELL
	testq	%rax, %rax
	leaq	_intel_dp_set_source_rates.g4x_rates(%rip), %rax
	leaq	_intel_dp_set_source_rates.hsw_rates(%rip), %r13
	cmoveq	%rax, %r13
	jmp	LBB0_13
LBB0_11:
	leaq	_intel_dp_set_source_rates.hsw_rates(%rip), %r13
LBB0_13:
	movq	%r13, %rdi
	callq	_ARRAY_SIZE
	movl	%eax, %r12d
	testl	%ebx, %ebx
	setne	%cl
	xorl	%eax, %eax
LBB0_14:
	testb	%cl, %cl
	cmovnel	%ebx, %eax
	testl	%eax, %eax
	je	LBB0_21
LBB0_20:
	movq	%r13, %rdi
	movl	%r12d, %esi
	movl	%eax, %edx
	callq	_intel_dp_rate_limit_len
	movl	%eax, %r12d
LBB0_21:
	movq	%r13, (%r15)
	movl	%r12d, 8(%r15)
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	4                               ## @intel_dp_set_source_rates.cnl_rates
_intel_dp_set_source_rates.cnl_rates:
	.long	162000                          ## 0x278d0
	.long	216000                          ## 0x34bc0
	.long	270000                          ## 0x41eb0
	.long	324000                          ## 0x4f1a0
	.long	432000                          ## 0x69780
	.long	540000                          ## 0x83d60
	.long	648000                          ## 0x9e340
	.long	810000                          ## 0xc5c10

	.p2align	4                               ## @intel_dp_set_source_rates.bxt_rates
_intel_dp_set_source_rates.bxt_rates:
	.long	162000                          ## 0x278d0
	.long	216000                          ## 0x34bc0
	.long	243000                          ## 0x3b538
	.long	270000                          ## 0x41eb0
	.long	324000                          ## 0x4f1a0
	.long	432000                          ## 0x69780
	.long	540000                          ## 0x83d60

	.p2align	4                               ## @intel_dp_set_source_rates.skl_rates
_intel_dp_set_source_rates.skl_rates:
	.long	162000                          ## 0x278d0
	.long	216000                          ## 0x34bc0
	.long	270000                          ## 0x41eb0
	.long	324000                          ## 0x4f1a0
	.long	432000                          ## 0x69780
	.long	540000                          ## 0x83d60

	.p2align	2                               ## @intel_dp_set_source_rates.hsw_rates
_intel_dp_set_source_rates.hsw_rates:
	.long	162000                          ## 0x278d0
	.long	270000                          ## 0x41eb0
	.long	540000                          ## 0x83d60

	.p2align	2                               ## @intel_dp_set_source_rates.g4x_rates
_intel_dp_set_source_rates.g4x_rates:
	.long	162000                          ## 0x278d0
	.long	270000                          ## 0x41eb0

	.no_dead_strip	_intel_dp_set_source_rates
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_dp_set_source_rates
_intel_dp_set_source_rates:             ; @intel_dp_set_source_rates
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_dp_to_dig_port
	mov	x20, x0
	ldr	w0, [x0, #8]
	bl	_to_i915
	mov	x22, x0
	ldr	x8, [x0]
	ldr	x9, [x20]
	ldr	x10, [x19]
	cbz	x10, LBB0_2
; %bb.1:
	mov	w0, #1
	b	LBB0_3
LBB0_2:
	ldr	w10, [x19, #8]
	cmp	w10, #0
	cset	w0, ne
LBB0_3:
	ldr	w20, [x8, x9, lsl #2]
	bl	_WARN_ON
	mov	x0, x22
	bl	_INTEL_GEN
	cmp	w0, #10
	b.lt	LBB0_6
; %bb.4:
Lloh0:
	adrp	x0, _intel_dp_set_source_rates.cnl_rates@PAGE
Lloh1:
	add	x0, x0, _intel_dp_set_source_rates.cnl_rates@PAGEOFF
	bl	_ARRAY_SIZE
	mov	x21, x0
	mov	x0, x22
	mov	w1, #10
	bl	_IS_GEN
	cbz	x0, LBB0_8
; %bb.5:
	mov	x0, x19
	bl	_cnl_max_source_rate
	b	LBB0_9
LBB0_6:
	mov	x0, x22
	bl	_IS_GEN9_LP
	cbz	x0, LBB0_12
; %bb.7:
Lloh2:
	adrp	x22, _intel_dp_set_source_rates.bxt_rates@PAGE
Lloh3:
	add	x22, x22, _intel_dp_set_source_rates.bxt_rates@PAGEOFF
	b	LBB0_18
LBB0_8:
	mov	x0, x19
	bl	_icl_max_source_rate
LBB0_9:
	cmp	w20, #0
	cset	w8, ne
Lloh4:
	adrp	x22, _intel_dp_set_source_rates.cnl_rates@PAGE
Lloh5:
	add	x22, x22, _intel_dp_set_source_rates.cnl_rates@PAGEOFF
	cbz	w0, LBB0_19
; %bb.10:
	cbz	w20, LBB0_19
; %bb.11:
	mov	x1, x20
	bl	_min
	mov	x2, x0
Lloh6:
	adrp	x22, _intel_dp_set_source_rates.cnl_rates@PAGE
Lloh7:
	add	x22, x22, _intel_dp_set_source_rates.cnl_rates@PAGEOFF
	cbnz	w2, LBB0_20
	b	LBB0_21
LBB0_12:
	mov	x0, x22
	bl	_IS_GEN9_BC
	cbz	x0, LBB0_14
; %bb.13:
Lloh8:
	adrp	x22, _intel_dp_set_source_rates.skl_rates@PAGE
Lloh9:
	add	x22, x22, _intel_dp_set_source_rates.skl_rates@PAGEOFF
	b	LBB0_18
LBB0_14:
	mov	x0, x22
	bl	_IS_HASWELL
	cbz	x0, LBB0_16
; %bb.15:
	mov	x0, x22
	bl	_IS_HSW_ULX
	cbz	w0, LBB0_17
LBB0_16:
Lloh10:
	adrp	x21, _intel_dp_set_source_rates.hsw_rates@PAGE
Lloh11:
	add	x21, x21, _intel_dp_set_source_rates.hsw_rates@PAGEOFF
	mov	x0, x22
	bl	_IS_BROADWELL
Lloh12:
	adrp	x8, _intel_dp_set_source_rates.g4x_rates@PAGE
Lloh13:
	add	x8, x8, _intel_dp_set_source_rates.g4x_rates@PAGEOFF
	cmp	x0, #0
	csel	x22, x8, x21, eq
	b	LBB0_18
LBB0_17:
Lloh14:
	adrp	x22, _intel_dp_set_source_rates.hsw_rates@PAGE
Lloh15:
	add	x22, x22, _intel_dp_set_source_rates.hsw_rates@PAGEOFF
LBB0_18:
	mov	x0, x22
	bl	_ARRAY_SIZE
	mov	x21, x0
	mov	w0, #0
	cmp	w20, #0
	cset	w8, ne
LBB0_19:
	cmp	w8, #0
	csel	w2, w20, w0, ne
	cbz	w2, LBB0_21
LBB0_20:
	mov	x0, x22
	mov	x1, x21
	bl	_intel_dp_rate_limit_len
	mov	x21, x0
LBB0_21:
	str	x22, [x19]
	str	w21, [x19, #8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh14, Lloh15
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @intel_dp_set_source_rates.cnl_rates
_intel_dp_set_source_rates.cnl_rates:
	.long	162000                          ; 0x278d0
	.long	216000                          ; 0x34bc0
	.long	270000                          ; 0x41eb0
	.long	324000                          ; 0x4f1a0
	.long	432000                          ; 0x69780
	.long	540000                          ; 0x83d60
	.long	648000                          ; 0x9e340
	.long	810000                          ; 0xc5c10

	.p2align	2                               ; @intel_dp_set_source_rates.bxt_rates
_intel_dp_set_source_rates.bxt_rates:
	.long	162000                          ; 0x278d0
	.long	216000                          ; 0x34bc0
	.long	243000                          ; 0x3b538
	.long	270000                          ; 0x41eb0
	.long	324000                          ; 0x4f1a0
	.long	432000                          ; 0x69780
	.long	540000                          ; 0x83d60

	.p2align	2                               ; @intel_dp_set_source_rates.skl_rates
_intel_dp_set_source_rates.skl_rates:
	.long	162000                          ; 0x278d0
	.long	216000                          ; 0x34bc0
	.long	270000                          ; 0x41eb0
	.long	324000                          ; 0x4f1a0
	.long	432000                          ; 0x69780
	.long	540000                          ; 0x83d60

	.p2align	2                               ; @intel_dp_set_source_rates.hsw_rates
_intel_dp_set_source_rates.hsw_rates:
	.long	162000                          ; 0x278d0
	.long	270000                          ; 0x41eb0
	.long	540000                          ; 0x83d60

	.p2align	2                               ; @intel_dp_set_source_rates.g4x_rates
_intel_dp_set_source_rates.g4x_rates:
	.long	162000                          ; 0x278d0
	.long	270000                          ; 0x41eb0

	.no_dead_strip	_intel_dp_set_source_rates
.subsections_via_symbols
