	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function get_freesync_config_for_crtc
_get_freesync_config_for_crtc:          ## @get_freesync_config_for_crtc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movl	8(%rsi), %edi
	callq	_to_amdgpu_dm_connector
	movq	%rax, %r14
	leaq	40(%rbx), %rdi
	callq	_drm_mode_vrefresh
	cmpq	$0, (%r15)
	je	LBB0_7
## %bb.1:
	movl	(%r14), %r9d
	cmpl	%r9d, %eax
	jge	LBB0_2
LBB0_7:
	movl	$0, (%rbx)
	xorl	%r10d, %r10d
	xorl	%edi, %edi
	xorl	%esi, %esi
	xorl	%edx, %edx
LBB0_8:
	movl	%edx, 4(%rbx)
	movl	%esi, 8(%rbx)
	movl	%edi, 12(%rbx)
	movl	%edi, 16(%rbx)
	movl	%r10d, 20(%rbx)
	movl	$0, 24(%rbx)
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movl	4(%r14), %r8d
	xorl	%r10d, %r10d
	xorl	%ecx, %ecx
	movl	$0, %edi
	movl	$0, %esi
	movl	$0, %edx
	cmpl	%r8d, %eax
	setle	%cl
	movl	%ecx, (%rbx)
	jg	LBB0_8
## %bb.3:
	movq	48(%rbx), %rax
	movl	$1, (%rax)
	cmpq	$0, 32(%rbx)
	jne	LBB0_4
## %bb.5:
	movq	_VRR_STATE_INACTIVE@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_4:
	movq	_VRR_STATE_ACTIVE_VARIABLE@GOTPCREL(%rip), %rax
LBB0_6:
	movl	(%rax), %r10d
	imull	$1000000, %r9d, %edx            ## imm = 0xF4240
	imull	$1000000, %r8d, %esi            ## imm = 0xF4240
	movl	$1, %edi
	jmp	LBB0_8
	.cfi_endproc
                                        ## -- End function
	.comm	_VRR_STATE_ACTIVE_VARIABLE,4,2  ## @VRR_STATE_ACTIVE_VARIABLE
	.comm	_VRR_STATE_INACTIVE,4,2         ## @VRR_STATE_INACTIVE
	.no_dead_strip	_get_freesync_config_for_crtc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function get_freesync_config_for_crtc
_get_freesync_config_for_crtc:          ; @get_freesync_config_for_crtc
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x1
	mov	x19, x0
	ldr	w0, [x1, #8]
	bl	_to_amdgpu_dm_connector
	mov	x20, x0
	add	x0, x19, #40
	bl	_drm_mode_vrefresh
	ldr	x8, [x21]
	cbz	x8, LBB0_3
; %bb.1:
	ldr	w10, [x20]
	cmp	w0, w10
	b.ge	LBB0_6
; %bb.2:
	mov	w9, #0
	mov	w8, #0
	b	LBB0_4
LBB0_3:
	mov	w9, #0
LBB0_4:
	mov	w10, #0
	mov	w11, #0
	str	wzr, [x19]
LBB0_5:
	stp	w11, w10, [x19, #4]
	stp	w8, w8, [x19, #12]
	stp	w9, wzr, [x19, #20]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_6:
	ldr	w12, [x20, #4]
	cmp	w0, w12
	cset	w8, le
	str	w8, [x19]
	b.gt	LBB0_8
; %bb.7:
	ldr	x9, [x19, #48]
	mov	w8, #1
	str	w8, [x9]
	ldr	x9, [x19, #32]
Lloh0:
	adrp	x11, _VRR_STATE_ACTIVE_VARIABLE@GOTPAGE
Lloh1:
	ldr	x11, [x11, _VRR_STATE_ACTIVE_VARIABLE@GOTPAGEOFF]
Lloh2:
	adrp	x13, _VRR_STATE_INACTIVE@GOTPAGE
Lloh3:
	ldr	x13, [x13, _VRR_STATE_INACTIVE@GOTPAGEOFF]
	cmp	x9, #0
	csel	x9, x13, x11, eq
	ldr	w9, [x9]
	mov	w13, #16960
	movk	w13, #15, lsl #16
	mul	w11, w10, w13
	mul	w10, w12, w13
	b	LBB0_5
LBB0_8:
	mov	w9, #0
	mov	w8, #0
	mov	w10, #0
	mov	w11, #0
	b	LBB0_5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_VRR_STATE_ACTIVE_VARIABLE,4,2  ; @VRR_STATE_ACTIVE_VARIABLE
	.comm	_VRR_STATE_INACTIVE,4,2         ; @VRR_STATE_INACTIVE
	.no_dead_strip	_get_freesync_config_for_crtc
.subsections_via_symbols
