	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_gem_userptr_ioctl       ## -- Begin function amdgpu_gem_userptr_ioctl
	.p2align	4, 0x90
_amdgpu_gem_userptr_ioctl:              ## @amdgpu_gem_userptr_ioctl
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	$1, -64(%rbp)
	movq	(%rdi), %rbx
	movl	(%rsi), %edi
	callq	_untagged_addr
	movl	%eax, (%r12)
	orl	4(%r12), %eax
	movl	%eax, %edi
	callq	_offset_in_page
	testq	%rax, %rax
	jne	LBB0_1
## %bb.3:
	movl	8(%r12), %eax
	movq	_AMDGPU_GEM_USERPTR_READONLY@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	_AMDGPU_GEM_USERPTR_ANONONLY@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	orl	%ecx, %esi
	movq	_AMDGPU_GEM_USERPTR_VALIDATE@GOTPCREL(%rip), %rdx
	orl	(%rdx), %esi
	movq	_AMDGPU_GEM_USERPTR_REGISTER@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	orl	%edx, %esi
	notl	%esi
	testl	%esi, %eax
	je	LBB0_4
LBB0_1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_2:
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_20:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	orl	%edx, %ecx
	testl	%eax, %ecx
	jne	LBB0_6
## %bb.5:
	movq	_EACCES@GOTPCREL(%rip), %rax
	jmp	LBB0_2
LBB0_6:
	movl	4(%r12), %esi
	movq	_AMDGPU_GEM_DOMAIN_CPU@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_ttm_bo_type_device@GOTPCREL(%rip), %rax
	movl	(%rax), %r9d
	leaq	-48(%rbp), %rax
	movq	%rbx, %rdi
	xorl	%edx, %edx
	xorl	%r8d, %r8d
	pushq	%rax
	pushq	$0
	callq	_amdgpu_gem_object_create
	addq	$16, %rsp
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_20
## %bb.7:
	movq	-48(%rbp), %rdi
	callq	_gem_to_amdgpu_bo
	movq	%rax, %r13
	movq	_AMDGPU_GEM_DOMAIN_GTT@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 24(%r13)
	movq	%rax, 16(%r13)
	movq	(%r13), %rdi
	movl	(%r12), %esi
	movl	8(%r12), %edx
	callq	_amdgpu_ttm_tt_set_userptr
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_8
LBB0_19:
	movq	-48(%rbp), %rdi
	callq	_drm_gem_object_put_unlocked
	jmp	LBB0_20
LBB0_8:
	movl	8(%r12), %eax
	testl	%eax, (%r15)
	je	LBB0_11
## %bb.9:
	movl	(%r12), %esi
	movq	%r13, %rdi
	callq	_amdgpu_mn_register
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_19
## %bb.10:
	movl	8(%r12), %eax
LBB0_11:
	movq	_AMDGPU_GEM_USERPTR_VALIDATE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_15
## %bb.12:
	movq	(%r13), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_amdgpu_ttm_tt_get_user_pages
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_19
## %bb.13:
	movq	%r13, %rdi
	movl	$1, %esi
	callq	_amdgpu_bo_reserve
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_17
## %bb.14:
	movq	_AMDGPU_GEM_DOMAIN_GTT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r13, %rdi
	callq	_amdgpu_bo_placement_from_domain
	movq	%r13, %rsi
	addq	$8, %rsi
	leaq	-64(%rbp), %rdx
	movq	%r13, %rdi
	callq	_ttm_bo_validate
	movl	%eax, %ebx
	movq	%r13, %rdi
	callq	_amdgpu_bo_unreserve
	testl	%ebx, %ebx
	jne	LBB0_17
LBB0_15:
	movq	-48(%rbp), %rsi
	leaq	-52(%rbp), %rdx
	movq	%r14, %rdi
	callq	_drm_gem_handle_create
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_17
## %bb.16:
	movl	-52(%rbp), %eax
	movl	%eax, 12(%r12)
	xorl	%ebx, %ebx
LBB0_17:
	movq	_AMDGPU_GEM_USERPTR_VALIDATE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%r12)
	je	LBB0_19
## %bb.18:
	movq	(%r13), %rdi
	callq	_amdgpu_ttm_tt_get_user_pages_done
	jmp	LBB0_19
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_AMDGPU_GEM_USERPTR_READONLY,4,2 ## @AMDGPU_GEM_USERPTR_READONLY
	.comm	_AMDGPU_GEM_USERPTR_ANONONLY,4,2 ## @AMDGPU_GEM_USERPTR_ANONONLY
	.comm	_AMDGPU_GEM_USERPTR_VALIDATE,4,2 ## @AMDGPU_GEM_USERPTR_VALIDATE
	.comm	_AMDGPU_GEM_USERPTR_REGISTER,4,2 ## @AMDGPU_GEM_USERPTR_REGISTER
	.comm	_EACCES,4,2                     ## @EACCES
	.comm	_AMDGPU_GEM_DOMAIN_CPU,4,2      ## @AMDGPU_GEM_DOMAIN_CPU
	.comm	_ttm_bo_type_device,4,2         ## @ttm_bo_type_device
	.comm	_AMDGPU_GEM_DOMAIN_GTT,8,3      ## @AMDGPU_GEM_DOMAIN_GTT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_gem_userptr_ioctl       ; -- Begin function amdgpu_gem_userptr_ioctl
	.p2align	2
_amdgpu_gem_userptr_ioctl:              ; @amdgpu_gem_userptr_ioctl
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x2
	mov	x19, x1
	mov	w8, #1
	str	x8, [sp, #24]
	ldr	x21, [x0]
	ldr	w0, [x1]
	bl	_untagged_addr
	str	w0, [x19]
	ldr	w8, [x19, #4]
	orr	w0, w8, w0
	bl	_offset_in_page
	cbnz	x0, LBB0_2
; %bb.1:
	ldr	w8, [x19, #8]
Lloh0:
	adrp	x9, _AMDGPU_GEM_USERPTR_READONLY@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMDGPU_GEM_USERPTR_READONLY@GOTPAGEOFF]
Lloh2:
	adrp	x10, _AMDGPU_GEM_USERPTR_ANONONLY@GOTPAGE
Lloh3:
	ldr	x10, [x10, _AMDGPU_GEM_USERPTR_ANONONLY@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
Lloh5:
	ldr	w10, [x10]
	orr	w10, w10, w9
Lloh6:
	adrp	x23, _AMDGPU_GEM_USERPTR_VALIDATE@GOTPAGE
Lloh7:
	ldr	x23, [x23, _AMDGPU_GEM_USERPTR_VALIDATE@GOTPAGEOFF]
	ldr	w11, [x23]
	orr	w11, w10, w11
Lloh8:
	adrp	x25, _AMDGPU_GEM_USERPTR_REGISTER@GOTPAGE
Lloh9:
	ldr	x25, [x25, _AMDGPU_GEM_USERPTR_REGISTER@GOTPAGEOFF]
	ldr	w10, [x25]
	orr	w11, w11, w10
	bics	wzr, w8, w11
	b.eq	LBB0_5
LBB0_2:
Lloh10:
	adrp	x8, _EINVAL@GOTPAGE
Lloh11:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
LBB0_3:
	ldr	w8, [x8]
	neg	w22, w8
LBB0_4:
	mov	x0, x22
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_5:
	orr	w9, w9, w10
	tst	w9, w8
	b.ne	LBB0_7
; %bb.6:
Lloh12:
	adrp	x8, _EACCES@GOTPAGE
Lloh13:
	ldr	x8, [x8, _EACCES@GOTPAGEOFF]
	b	LBB0_3
LBB0_7:
	ldr	w1, [x19, #4]
Lloh14:
	adrp	x8, _AMDGPU_GEM_DOMAIN_CPU@GOTPAGE
Lloh15:
	ldr	x8, [x8, _AMDGPU_GEM_DOMAIN_CPU@GOTPAGEOFF]
Lloh16:
	ldr	w3, [x8]
Lloh17:
	adrp	x8, _ttm_bo_type_device@GOTPAGE
Lloh18:
	ldr	x8, [x8, _ttm_bo_type_device@GOTPAGEOFF]
Lloh19:
	ldr	w5, [x8]
	add	x7, sp, #16
	mov	x0, x21
	mov	w2, #0
	mov	w4, #0
	mov	x6, #0
	bl	_amdgpu_gem_object_create
	mov	x22, x0
	cbnz	w0, LBB0_4
; %bb.8:
	ldr	x0, [sp, #16]
	bl	_gem_to_amdgpu_bo
	mov	x21, x0
Lloh20:
	adrp	x24, _AMDGPU_GEM_DOMAIN_GTT@GOTPAGE
Lloh21:
	ldr	x24, [x24, _AMDGPU_GEM_DOMAIN_GTT@GOTPAGEOFF]
	ldr	x8, [x24]
	stp	x8, x8, [x0, #16]
	ldr	x0, [x0]
	ldr	w1, [x19]
	ldr	w2, [x19, #8]
	bl	_amdgpu_ttm_tt_set_userptr
	mov	x22, x0
	cbz	w0, LBB0_10
LBB0_9:
	ldr	x0, [sp, #16]
	bl	_drm_gem_object_put_unlocked
	b	LBB0_4
LBB0_10:
	ldr	w8, [x19, #8]
	ldr	w9, [x25]
	tst	w9, w8
	b.eq	LBB0_13
; %bb.11:
	ldr	w1, [x19]
	mov	x0, x21
	bl	_amdgpu_mn_register
	mov	x22, x0
	cbnz	w0, LBB0_9
; %bb.12:
	ldr	w8, [x19, #8]
LBB0_13:
	ldr	w9, [x23]
	tst	w9, w8
	b.eq	LBB0_17
; %bb.14:
	ldr	x8, [x21]
	ldr	w1, [x8]
	mov	x0, x21
	bl	_amdgpu_ttm_tt_get_user_pages
	mov	x22, x0
	cbnz	w0, LBB0_9
; %bb.15:
	mov	x0, x21
	mov	w1, #1
	bl	_amdgpu_bo_reserve
	mov	x22, x0
	cbnz	w0, LBB0_19
; %bb.16:
	ldr	x1, [x24]
	mov	x0, x21
	bl	_amdgpu_bo_placement_from_domain
	add	x1, x21, #8
	add	x2, sp, #24
	mov	x0, x21
	bl	_ttm_bo_validate
	mov	x22, x0
	mov	x0, x21
	bl	_amdgpu_bo_unreserve
	cbnz	w22, LBB0_19
LBB0_17:
	ldr	x1, [sp, #16]
	add	x2, sp, #12
	mov	x0, x20
	bl	_drm_gem_handle_create
	mov	x22, x0
	cbnz	w0, LBB0_19
; %bb.18:
	ldr	w8, [sp, #12]
	str	w8, [x19, #12]
LBB0_19:
	ldr	w8, [x19, #8]
	ldr	w9, [x23]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.20:
	ldr	x0, [x21]
	bl	_amdgpu_ttm_tt_get_user_pages_done
	b	LBB0_9
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_AMDGPU_GEM_USERPTR_READONLY,4,2 ; @AMDGPU_GEM_USERPTR_READONLY
	.comm	_AMDGPU_GEM_USERPTR_ANONONLY,4,2 ; @AMDGPU_GEM_USERPTR_ANONONLY
	.comm	_AMDGPU_GEM_USERPTR_VALIDATE,4,2 ; @AMDGPU_GEM_USERPTR_VALIDATE
	.comm	_AMDGPU_GEM_USERPTR_REGISTER,4,2 ; @AMDGPU_GEM_USERPTR_REGISTER
	.comm	_EACCES,4,2                     ; @EACCES
	.comm	_AMDGPU_GEM_DOMAIN_CPU,4,2      ; @AMDGPU_GEM_DOMAIN_CPU
	.comm	_ttm_bo_type_device,4,2         ; @ttm_bo_type_device
	.comm	_AMDGPU_GEM_DOMAIN_GTT,8,3      ; @AMDGPU_GEM_DOMAIN_GTT
.subsections_via_symbols
