	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mdfld_mipi_set_video_timing
_mdfld_mipi_set_video_timing:           ## @mdfld_mipi_set_video_timing
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$32, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %r14d
	movq	8(%rdi), %rbx
	movl	(%rdi), %ecx
	movl	4(%rdi), %edx
	leaq	-48(%rbp), %rsi
	movq	%rbx, %rdi
	callq	_mdfld_dsi_dpi_timing_calculation
	movl	%r14d, %edi
	callq	_MIPI_DPI_RESOLUTION_REG
	movl	(%rbx), %esi
	shll	$16, %esi
	orl	4(%rbx), %esi
	movl	%eax, %edi
	callq	_REG_WRITE
	movl	%r14d, %edi
	callq	_MIPI_HSYNC_COUNT_REG
	movq	_DSI_DPI_TIMING_MASK@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	andl	-48(%rbp), %esi
	movl	%eax, %edi
	callq	_REG_WRITE
	movl	%r14d, %edi
	callq	_MIPI_HBP_COUNT_REG
	movl	(%rbx), %esi
	andl	-44(%rbp), %esi
	movl	%eax, %edi
	callq	_REG_WRITE
	movl	%r14d, %edi
	callq	_MIPI_HFP_COUNT_REG
	movl	(%rbx), %esi
	andl	-40(%rbp), %esi
	movl	%eax, %edi
	callq	_REG_WRITE
	movl	%r14d, %edi
	callq	_MIPI_HACTIVE_COUNT_REG
	movl	(%rbx), %esi
	andl	-36(%rbp), %esi
	movl	%eax, %edi
	callq	_REG_WRITE
	movl	%r14d, %edi
	callq	_MIPI_VSYNC_COUNT_REG
	movl	(%rbx), %esi
	andl	-32(%rbp), %esi
	movl	%eax, %edi
	callq	_REG_WRITE
	movl	%r14d, %edi
	callq	_MIPI_VBP_COUNT_REG
	movl	(%rbx), %esi
	andl	-28(%rbp), %esi
	movl	%eax, %edi
	callq	_REG_WRITE
	movl	%r14d, %edi
	callq	_MIPI_VFP_COUNT_REG
	movl	(%rbx), %esi
	andl	-24(%rbp), %esi
	movl	%eax, %edi
	callq	_REG_WRITE
	addq	$32, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DSI_DPI_TIMING_MASK,4,2        ## @DSI_DPI_TIMING_MASK
	.no_dead_strip	_mdfld_mipi_set_video_timing
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mdfld_mipi_set_video_timing
_mdfld_mipi_set_video_timing:           ; @mdfld_mipi_set_video_timing
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	ldr	x20, [x0, #8]
	ldp	w3, w2, [x0]
	mov	x1, sp
	mov	x0, x20
	bl	_mdfld_dsi_dpi_timing_calculation
	mov	x0, x19
	bl	_MIPI_DPI_RESOLUTION_REG
	ldp	w8, w9, [x20]
	orr	w1, w9, w8, lsl #16
	bl	_REG_WRITE
	mov	x0, x19
	bl	_MIPI_HSYNC_COUNT_REG
	ldr	w8, [sp]
Lloh0:
	adrp	x20, _DSI_DPI_TIMING_MASK@GOTPAGE
Lloh1:
	ldr	x20, [x20, _DSI_DPI_TIMING_MASK@GOTPAGEOFF]
	ldr	w9, [x20]
	and	w1, w9, w8
	bl	_REG_WRITE
	mov	x0, x19
	bl	_MIPI_HBP_COUNT_REG
	ldr	w8, [sp, #4]
	ldr	w9, [x20]
	and	w1, w9, w8
	bl	_REG_WRITE
	mov	x0, x19
	bl	_MIPI_HFP_COUNT_REG
	ldr	w8, [sp, #8]
	ldr	w9, [x20]
	and	w1, w9, w8
	bl	_REG_WRITE
	mov	x0, x19
	bl	_MIPI_HACTIVE_COUNT_REG
	ldr	w8, [sp, #12]
	ldr	w9, [x20]
	and	w1, w9, w8
	bl	_REG_WRITE
	mov	x0, x19
	bl	_MIPI_VSYNC_COUNT_REG
	ldr	w8, [sp, #16]
	ldr	w9, [x20]
	and	w1, w9, w8
	bl	_REG_WRITE
	mov	x0, x19
	bl	_MIPI_VBP_COUNT_REG
	ldr	w8, [sp, #20]
	ldr	w9, [x20]
	and	w1, w9, w8
	bl	_REG_WRITE
	mov	x0, x19
	bl	_MIPI_VFP_COUNT_REG
	ldr	w8, [sp, #24]
	ldr	w9, [x20]
	and	w1, w9, w8
	bl	_REG_WRITE
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_DSI_DPI_TIMING_MASK,4,2        ; @DSI_DPI_TIMING_MASK
	.no_dead_strip	_mdfld_mipi_set_video_timing
.subsections_via_symbols
