	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_cs_bo_validate
_amdgpu_cs_bo_validate:                 ## @amdgpu_cs_bo_validate
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	movl	32(%rsi), %edi
	callq	_amdgpu_ttm_adev
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movl	$1, -80(%rbp)
	xorps	%xmm0, %xmm0
	movups	%xmm0, -76(%rbp)
	movl	28(%rbx), %eax
	movl	%eax, -60(%rbp)
	xorl	%r14d, %r14d
	cmpq	$0, 40(%rbx)
	jne	LBB0_13
## %bb.1:
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movq	(%rcx), %rax
	cmpq	8(%rcx), %rax
	jge	LBB0_6
## %bb.2:
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	_amdgpu_gmc_vram_full_visible
	testl	%eax, %eax
	je	LBB0_3
LBB0_5:
	leaq	8(%rbx), %rax
	jmp	LBB0_7
LBB0_3:
	movq	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_5
## %bb.4:
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movq	16(%rcx), %rax
	cmpq	24(%rcx), %rax
	jl	LBB0_5
LBB0_6:
	leaq	16(%rbx), %rax
LBB0_7:
	leaq	28(%rbx), %r12
	movq	(%rax), %r15
	leaq	24(%rbx), %r13
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_amdgpu_bo_placement_from_domain
	movq	%r12, %rdi
	movq	%r13, %rsi
	leaq	-80(%rbp), %rdx
	callq	_ttm_bo_validate
	movl	%eax, %r14d
	movq	-72(%rbp), %rax
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	addq	%rax, (%rcx)
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	_amdgpu_gmc_vram_full_visible
	testl	%eax, %eax
	jne	LBB0_11
## %bb.9:                               ##   in Loop: Header=BB0_8 Depth=1
	movq	%rbx, %rdi
	callq	_amdgpu_bo_in_cpu_visible_vram
	testq	%rax, %rax
	je	LBB0_11
## %bb.10:                              ##   in Loop: Header=BB0_8 Depth=1
	movq	-72(%rbp), %rax
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	addq	%rax, 16(%rcx)
LBB0_11:                                ##   in Loop: Header=BB0_8 Depth=1
	xorl	%edi, %edi
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	addl	%r14d, %eax
	sete	%dil
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_13
## %bb.12:                              ##   in Loop: Header=BB0_8 Depth=1
	movq	16(%rbx), %rax
	cmpq	%rax, %r15
	movq	%rax, %r15
	jne	LBB0_8
LBB0_13:
	movl	%r14d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,4,2 ## @AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.no_dead_strip	_amdgpu_cs_bo_validate
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_cs_bo_validate
_amdgpu_cs_bo_validate:                 ; @amdgpu_cs_bo_validate
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	mov	x20, x0
	ldr	w0, [x1, #32]
	bl	_amdgpu_ttm_adev
	mov	x22, x19
	ldr	w8, [x22, #28]!
	mov	w9, #1
	str	w9, [sp, #8]
	stur	xzr, [sp, #20]
	stur	xzr, [sp, #12]
	str	w8, [sp, #28]
	ldur	x8, [x22, #12]
	cbz	x8, LBB0_2
; %bb.1:
	mov	w25, #0
	b	LBB0_14
LBB0_2:
	mov	x21, x0
	ldp	x8, x9, [x20]
	cmp	x8, x9
	b.ge	LBB0_5
; %bb.3:
	mov	x0, x21
	bl	_amdgpu_gmc_vram_full_visible
	cbz	w0, LBB0_6
LBB0_4:
	add	x8, x19, #8
	b	LBB0_8
LBB0_5:
	add	x8, x19, #16
	b	LBB0_8
LBB0_6:
	ldr	w8, [x19]
Lloh0:
	adrp	x9, _AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPAGE
Lloh1:
	ldr	x9, [x9, _AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.7:
	ldp	x8, x9, [x20, #16]
	add	x10, x19, #16
	add	x11, x19, #8
	cmp	x8, x9
	csel	x8, x10, x11, ge
LBB0_8:
	ldr	x23, [x8]
	add	x24, x19, #24
Lloh3:
	adrp	x26, _ENOMEM@GOTPAGE
Lloh4:
	ldr	x26, [x26, _ENOMEM@GOTPAGEOFF]
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x23
	bl	_amdgpu_bo_placement_from_domain
	add	x2, sp, #8
	mov	x0, x22
	mov	x1, x24
	bl	_ttm_bo_validate
	mov	x25, x0
	ldr	x8, [sp, #16]
	ldr	x9, [x20]
	add	x8, x9, x8
	str	x8, [x20]
	mov	x0, x21
	bl	_amdgpu_gmc_vram_full_visible
	cbnz	w0, LBB0_12
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	mov	x0, x19
	bl	_amdgpu_bo_in_cpu_visible_vram
	cbz	x0, LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_9 Depth=1
	ldr	x8, [sp, #16]
	ldr	x9, [x20, #16]
	add	x8, x9, x8
	str	x8, [x20, #16]
LBB0_12:                                ;   in Loop: Header=BB0_9 Depth=1
	ldr	w8, [x26]
	cmn	w25, w8
	cset	w0, eq
	bl	_unlikely
	cbz	x0, LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_9 Depth=1
	ldr	x8, [x19, #16]
	cmp	x23, x8
	mov	x23, x8
	b.ne	LBB0_9
LBB0_14:
	mov	x0, x25
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,4,2 ; @AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.no_dead_strip	_amdgpu_cs_bo_validate
.subsections_via_symbols
