	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v10_0_rlc_enable_srm
_gfx_v10_0_rlc_enable_srm:              ## @gfx_v10_0_rlc_enable_srm
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_GC@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_mmRLC_SRM_CNTL@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movl	%eax, %edi
	callq	_RREG32
	movl	%eax, %ebx
	movq	_RLC_SRM_CNTL__AUTO_INCR_ADDR_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_RLC_SRM_CNTL__SRM_ENABLE_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	(%r14), %edi
	movl	(%r15), %edx
	xorl	%esi, %esi
	callq	_SOC15_REG_OFFSET
	movl	%eax, %edi
	movl	%ebx, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_GC,4,2                         ## @GC
	.comm	_mmRLC_SRM_CNTL,4,2             ## @mmRLC_SRM_CNTL
	.comm	_RLC_SRM_CNTL__AUTO_INCR_ADDR_MASK,4,2 ## @RLC_SRM_CNTL__AUTO_INCR_ADDR_MASK
	.comm	_RLC_SRM_CNTL__SRM_ENABLE_MASK,4,2 ## @RLC_SRM_CNTL__SRM_ENABLE_MASK
	.no_dead_strip	_gfx_v10_0_rlc_enable_srm
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v10_0_rlc_enable_srm
_gfx_v10_0_rlc_enable_srm:              ; @gfx_v10_0_rlc_enable_srm
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
Lloh0:
	adrp	x20, _GC@GOTPAGE
Lloh1:
	ldr	x20, [x20, _GC@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh2:
	adrp	x21, _mmRLC_SRM_CNTL@GOTPAGE
Lloh3:
	ldr	x21, [x21, _mmRLC_SRM_CNTL@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	bl	_RREG32
Lloh4:
	adrp	x8, _RLC_SRM_CNTL__AUTO_INCR_ADDR_MASK@GOTPAGE
Lloh5:
	ldr	x8, [x8, _RLC_SRM_CNTL__AUTO_INCR_ADDR_MASK@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	orr	w8, w8, w0
Lloh7:
	adrp	x9, _RLC_SRM_CNTL__SRM_ENABLE_MASK@GOTPAGE
Lloh8:
	ldr	x9, [x9, _RLC_SRM_CNTL__SRM_ENABLE_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
	orr	w19, w8, w9
	ldr	w0, [x20]
	ldr	w2, [x21]
	mov	w1, #0
	bl	_SOC15_REG_OFFSET
	mov	x1, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_GC,4,2                         ; @GC
	.comm	_mmRLC_SRM_CNTL,4,2             ; @mmRLC_SRM_CNTL
	.comm	_RLC_SRM_CNTL__AUTO_INCR_ADDR_MASK,4,2 ; @RLC_SRM_CNTL__AUTO_INCR_ADDR_MASK
	.comm	_RLC_SRM_CNTL__SRM_ENABLE_MASK,4,2 ; @RLC_SRM_CNTL__SRM_ENABLE_MASK
	.no_dead_strip	_gfx_v10_0_rlc_enable_srm
.subsections_via_symbols
