	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nv50_gr_construct_mmio_ddata
_nv50_gr_construct_mmio_ddata:          ## @nv50_gr_construct_mmio_ddata
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %r12
	movl	(%rdi), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$2, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	cmpl	$148, (%r12)
	jl	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_2:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$256, %edx                      ## imm = 0x100
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$2, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4194303, %edx                  ## imm = 0x3FFFFF
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$8191, %edx                     ## imm = 0x1FFF
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movl	(%r12), %edi
	callq	_IS_NVA3F
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_4:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$7, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$7, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	cmpl	$80, (%r12)
	jne	LBB0_6
## %bb.5:
	movq	%rbx, %rdi
	movl	$4, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$10, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$64, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$2, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$256, %edx                      ## imm = 0x100
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$256, %edx                      ## imm = 0x100
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_6:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$2, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$256, %edx                      ## imm = 0x100
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$2, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$256, %edx                      ## imm = 0x100
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$256, %edx                      ## imm = 0x100
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$2, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$256, %edx                      ## imm = 0x100
	callq	_dd_emit
	cmpl	$80, (%r12)
	jne	LBB0_8
## %bb.7:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$2, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$3, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_8:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$112, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$128, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movl	(%r12), %edi
	callq	_IS_NVA3F
	movq	%rax, %r14
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	testq	%r14, %r14
	je	LBB0_10
## %bb.9:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_10:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$12, %edx
	callq	_dd_emit
	cmpl	$80, (%r12)
	je	LBB0_12
## %bb.11:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_12:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$8, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$20, %edx
	callq	_dd_emit
	movl	(%r12), %r14d
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	cmpl	$80, %r14d
	je	LBB0_14
## %bb.13:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$41, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$39, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$38, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$8, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$39, %edx
	callq	_dd_emit
LBB0_14:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$2, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$3, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$5, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$6, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$7, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$8, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$8, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$207, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$7, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	xorl	%esi, %esi
	cmpl	$80, (%r12)
	sete	%sil
	xorl	$3, %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$128, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_dd_emit
	movl	(%r12), %edi
	callq	_IS_NVA3F
	testq	%rax, %rax
	je	LBB0_16
## %bb.15:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$3, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_16:
	cmpl	$80, (%r12)
	je	LBB0_18
## %bb.17:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$3, %edx
	callq	_dd_emit
LBB0_18:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	cmpl	$80, (%r12)
	je	LBB0_20
## %bb.19:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_20:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$18, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$16, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$12, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$2, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_dd_emit
	cmpl	$160, (%r12)
	jl	LBB0_22
## %bb.21:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_22:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4194303, %edx                  ## imm = 0x3FFFFF
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$8191, %edx                     ## imm = 0x1FFF
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	cmpl	$80, (%r12)
	je	LBB0_25
## %bb.23:
	movq	%rbx, %rdi
	movl	$8, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	cmpl	$160, (%r12)
	jl	LBB0_25
## %bb.24:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$2, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_25:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$20, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movl	(%r12), %edi
	callq	_IS_NVA3F
	testq	%rax, %rax
	je	LBB0_27
## %bb.26:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_27:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$2, %edx
	callq	_dd_emit
	cmpl	$160, (%r12)
	jl	LBB0_29
## %bb.28:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_29:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	cmpl	$160, (%r12)
	jl	LBB0_31
## %bb.30:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
LBB0_31:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$2, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4096, %edx                     ## imm = 0x1000
	callq	_dd_emit
	cmpl	$80, (%r12)
	je	LBB0_33
## %bb.32:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$3584, %edx                     ## imm = 0xE00
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$4096, %edx                     ## imm = 0x1000
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$7680, %edx                     ## imm = 0x1E00
	callq	_dd_emit
LBB0_33:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$512, %edx                      ## imm = 0x200
	callq	_dd_emit
	movl	(%r12), %edi
	callq	_IS_NVA3F
	testq	%rax, %rax
	je	LBB0_35
## %bb.34:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$512, %edx                      ## imm = 0x200
	callq	_dd_emit
LBB0_35:
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%r12, -56(%rbp)                 ## 8-byte Spill
	movl	(%r12), %r14d
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	cmpl	$160, %r14d
	jge	LBB0_37
## %bb.36:
	xorl	%r12d, %r12d
	movl	$1, %r15d
	movl	$128, %r13d
	movl	$112, %r14d
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	jmp	LBB0_38
LBB0_37:
	movl	$1, %r12d
	movl	$240, %r15d
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$240, %edx
	callq	_dd_emit
	movl	$9, -44(%rbp)                   ## 4-byte Folded Spill
	xorl	%r13d, %r13d
	movl	$255, %r14d
LBB0_38:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	%r14d, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	%r13d, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	%r12d, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	%r15d, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	%r14d, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	%r13d, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$207, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$207, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$2, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$207, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$207, %edx
	callq	_dd_emit
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_dd_emit
	movl	(%rbx), %r14d
	movl	-48(%rbp), %eax                 ## 4-byte Reload
	subl	%eax, %r14d
	movl	%eax, (%rbx)
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edi
	callq	_IS_NVA3F
	testq	%rax, %rax
	movl	$4215808, %eax                  ## imm = 0x405400
	movl	$4212736, %esi                  ## imm = 0x404800
	cmovel	%eax, %esi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_cp_ctx                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_nv50_gr_construct_mmio_ddata
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nv50_gr_construct_mmio_ddata
_nv50_gr_construct_mmio_ddata:          ; @nv50_gr_construct_mmio_ddata
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x25, [x0, #8]
	ldr	w26, [x0]
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #2
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #148
	b.lt	LBB0_2
; %bb.1:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_2:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #256
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #2
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4194303
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #8191
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	ldr	w0, [x25]
	bl	_IS_NVA3F
	cbz	x0, LBB0_4
; %bb.3:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_4:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #7
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #7
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #80
	b.ne	LBB0_6
; %bb.5:
	mov	x0, x19
	mov	w1, #4
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #10
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #64
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #2
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #256
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #256
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_6:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #2
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #256
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #2
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #256
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #256
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #2
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #256
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #80
	b.ne	LBB0_8
; %bb.7:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #2
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #3
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_8:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #112
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #128
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	ldr	w0, [x25]
	bl	_IS_NVA3F
	mov	x20, x0
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	cbz	x20, LBB0_10
; %bb.9:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_10:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #12
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #80
	b.eq	LBB0_12
; %bb.11:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_12:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #8
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #20
	bl	_dd_emit
	ldr	w20, [x25]
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	cmp	w20, #80
	b.eq	LBB0_14
; %bb.13:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #41
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #39
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #38
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #8
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #39
	bl	_dd_emit
LBB0_14:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	w20, #2
	mov	x0, x19
	mov	w1, #1
	mov	w2, #2
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #3
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #5
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #6
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #7
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #8
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #8
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #207
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #7
	mov	w2, #0
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #80
	cinc	w1, w20, ne
	mov	x0, x19
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #128
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_dd_emit
	ldr	w0, [x25]
	bl	_IS_NVA3F
	cbz	x0, LBB0_16
; %bb.15:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #3
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_16:
	ldr	w8, [x25]
	cmp	w8, #80
	b.eq	LBB0_18
; %bb.17:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #3
	bl	_dd_emit
LBB0_18:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #80
	b.eq	LBB0_20
; %bb.19:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_20:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #18
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #16
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #12
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #2
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #160
	b.lt	LBB0_22
; %bb.21:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_22:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4194303
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #8191
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #80
	b.eq	LBB0_25
; %bb.23:
	mov	x0, x19
	mov	w1, #8
	mov	w2, #0
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #160
	b.lt	LBB0_25
; %bb.24:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #2
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_25:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #20
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	ldr	w0, [x25]
	bl	_IS_NVA3F
	cbz	x0, LBB0_27
; %bb.26:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_27:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #2
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #160
	b.lt	LBB0_29
; %bb.28:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_29:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #160
	b.lt	LBB0_31
; %bb.30:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
LBB0_31:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #2
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4096
	bl	_dd_emit
	ldr	w8, [x25]
	cmp	w8, #80
	b.eq	LBB0_33
; %bb.32:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #3584
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #4096
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #7680
	bl	_dd_emit
LBB0_33:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #512
	bl	_dd_emit
	ldr	w0, [x25]
	bl	_IS_NVA3F
	cbz	x0, LBB0_35
; %bb.34:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #512
	bl	_dd_emit
LBB0_35:
	mov	w20, #1
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	ldr	w21, [x25]
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	cmp	w21, #160
	b.ge	LBB0_37
; %bb.36:
	mov	w23, #0
	mov	w21, #0
	mov	w22, #128
	mov	w24, #112
	b	LBB0_38
LBB0_37:
	mov	w23, #1
	mov	w20, #240
	mov	x0, x19
	mov	w1, #1
	mov	w2, #240
	bl	_dd_emit
	mov	w22, #0
	mov	w21, #9
	mov	w24, #255
LBB0_38:
	mov	x0, x19
	mov	w1, #1
	mov	x2, x24
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	x2, x22
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	x2, x23
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	x2, x20
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	x2, x24
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	x2, x22
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	x2, x21
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #207
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #207
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #2
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #207
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #207
	bl	_dd_emit
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_dd_emit
	ldr	w8, [x19]
	sub	w20, w8, w26
	str	w26, [x19]
	ldr	w0, [x25]
	bl	_IS_NVA3F
	mov	w8, #18432
	movk	w8, #64, lsl #16
	add	w9, w8, #3072
	cmp	x0, #0
	csel	w1, w9, w8, eq
	mov	x0, x19
	mov	x2, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_cp_ctx
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_nv50_gr_construct_mmio_ddata
.subsections_via_symbols
