	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_connector_add_common_modes
_amdgpu_connector_add_common_modes:     ## @amdgpu_connector_add_common_modes
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	movq	(%rdi), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	callq	_to_amdgpu_encoder
	movq	%rax, %r12
	movq	$-7, %rbx
	movq	_ATOM_DEVICE_TV_SUPPORT@GOTPCREL(%rip), %r13
	movq	_ATOM_DEVICE_LCD_SUPPORT@GOTPCREL(%rip), %r14
	leaq	_amdgpu_connector_add_common_modes.common_modes(%rip), %r15
	jmp	LBB0_1
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_1 Depth=1
	movl	60(%r15,%rbx,8), %edx
LBB0_10:                                ##   in Loop: Header=BB0_1 Depth=1
	movl	$0, (%rsp)
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movl	$60, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	_drm_cvt_mode
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%rax, %rsi
	callq	_drm_mode_probed_add
LBB0_11:                                ##   in Loop: Header=BB0_1 Depth=1
	incq	%rbx
	cmpq	$10, %rbx
	je	LBB0_12
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %eax
	testl	%eax, (%r13)
	je	LBB0_4
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	leaq	2(%rbx), %rcx
	cmpq	$12, %rcx
	jb	LBB0_11
## %bb.3:                               ##   in Loop: Header=BB0_1 Depth=1
	cmpq	$10, %rbx
	jb	LBB0_11
LBB0_4:                                 ##   in Loop: Header=BB0_1 Depth=1
	movl	56(%r15,%rbx,8), %esi
	testl	%eax, (%r14)
	je	LBB0_5
## %bb.6:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	4(%r12), %eax
	cmpl	%eax, %esi
	jg	LBB0_11
## %bb.7:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	60(%r15,%rbx,8), %edx
	movl	8(%r12), %ecx
	cmpl	%ecx, %edx
	jg	LBB0_11
## %bb.8:                               ##   in Loop: Header=BB0_1 Depth=1
	cmpl	%eax, %esi
	jne	LBB0_10
## %bb.9:                               ##   in Loop: Header=BB0_1 Depth=1
	cmpl	%ecx, %edx
	je	LBB0_11
	jmp	LBB0_10
LBB0_12:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	4                               ## @amdgpu_connector_add_common_modes.common_modes
_amdgpu_connector_add_common_modes.common_modes:
	.long	640                             ## 0x280
	.long	480                             ## 0x1e0
	.long	720                             ## 0x2d0
	.long	480                             ## 0x1e0
	.long	800                             ## 0x320
	.long	600                             ## 0x258
	.long	848                             ## 0x350
	.long	480                             ## 0x1e0
	.long	1024                            ## 0x400
	.long	768                             ## 0x300
	.long	1152                            ## 0x480
	.long	768                             ## 0x300
	.long	1280                            ## 0x500
	.long	720                             ## 0x2d0
	.long	1280                            ## 0x500
	.long	800                             ## 0x320
	.long	1280                            ## 0x500
	.long	854                             ## 0x356
	.long	1280                            ## 0x500
	.long	960                             ## 0x3c0
	.long	1280                            ## 0x500
	.long	1024                            ## 0x400
	.long	1440                            ## 0x5a0
	.long	900                             ## 0x384
	.long	1400                            ## 0x578
	.long	1050                            ## 0x41a
	.long	1680                            ## 0x690
	.long	1050                            ## 0x41a
	.long	1600                            ## 0x640
	.long	1200                            ## 0x4b0
	.long	1920                            ## 0x780
	.long	1080                            ## 0x438
	.long	1920                            ## 0x780
	.long	1200                            ## 0x4b0

	.comm	_ATOM_DEVICE_TV_SUPPORT,4,2     ## @ATOM_DEVICE_TV_SUPPORT
	.comm	_ATOM_DEVICE_LCD_SUPPORT,4,2    ## @ATOM_DEVICE_LCD_SUPPORT
	.no_dead_strip	_amdgpu_connector_add_common_modes
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_connector_add_common_modes
_amdgpu_connector_add_common_modes:     ; @amdgpu_connector_add_common_modes
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	ldr	x20, [x0]
	bl	_to_amdgpu_encoder
	mov	x21, x0
	mov	x22, #-7
Lloh0:
	adrp	x23, _ATOM_DEVICE_TV_SUPPORT@GOTPAGE
Lloh1:
	ldr	x23, [x23, _ATOM_DEVICE_TV_SUPPORT@GOTPAGEOFF]
Lloh2:
	adrp	x24, _ATOM_DEVICE_LCD_SUPPORT@GOTPAGE
Lloh3:
	ldr	x24, [x24, _ATOM_DEVICE_LCD_SUPPORT@GOTPAGEOFF]
Lloh4:
	adrp	x25, _amdgpu_connector_add_common_modes.common_modes@PAGE+4
Lloh5:
	add	x25, x25, _amdgpu_connector_add_common_modes.common_modes@PAGEOFF+4
	b	LBB0_4
LBB0_1:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	w2, [x25]
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	mov	x0, x20
	mov	w3, #60
	mov	w4, #0
	mov	w5, #0
	mov	w6, #0
	bl	_drm_cvt_mode
	mov	x1, x0
	mov	x0, x19
	bl	_drm_mode_probed_add
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	x25, x25, #8
	add	x22, x22, #1
	cmp	x22, #10
	b.eq	LBB0_12
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x21]
	ldr	w9, [x23]
	tst	w9, w8
	b.eq	LBB0_7
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	add	x9, x22, #2
	cmp	x9, #12
	b.lo	LBB0_3
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	cmp	x22, #10
	b.lo	LBB0_3
LBB0_7:                                 ;   in Loop: Header=BB0_4 Depth=1
	ldr	w9, [x24]
	ldur	w1, [x25, #-4]
	tst	w9, w8
	b.eq	LBB0_1
; %bb.8:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w8, [x21, #4]
	cmp	w1, w8
	b.gt	LBB0_3
; %bb.9:                                ;   in Loop: Header=BB0_4 Depth=1
	ldr	w2, [x25]
	ldr	w9, [x21, #8]
	cmp	w2, w9
	b.gt	LBB0_3
; %bb.10:                               ;   in Loop: Header=BB0_4 Depth=1
	cmp	w1, w8
	b.ne	LBB0_2
; %bb.11:                               ;   in Loop: Header=BB0_4 Depth=1
	cmp	w2, w9
	b.eq	LBB0_3
	b	LBB0_2
LBB0_12:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @amdgpu_connector_add_common_modes.common_modes
_amdgpu_connector_add_common_modes.common_modes:
	.long	640                             ; 0x280
	.long	480                             ; 0x1e0
	.long	720                             ; 0x2d0
	.long	480                             ; 0x1e0
	.long	800                             ; 0x320
	.long	600                             ; 0x258
	.long	848                             ; 0x350
	.long	480                             ; 0x1e0
	.long	1024                            ; 0x400
	.long	768                             ; 0x300
	.long	1152                            ; 0x480
	.long	768                             ; 0x300
	.long	1280                            ; 0x500
	.long	720                             ; 0x2d0
	.long	1280                            ; 0x500
	.long	800                             ; 0x320
	.long	1280                            ; 0x500
	.long	854                             ; 0x356
	.long	1280                            ; 0x500
	.long	960                             ; 0x3c0
	.long	1280                            ; 0x500
	.long	1024                            ; 0x400
	.long	1440                            ; 0x5a0
	.long	900                             ; 0x384
	.long	1400                            ; 0x578
	.long	1050                            ; 0x41a
	.long	1680                            ; 0x690
	.long	1050                            ; 0x41a
	.long	1600                            ; 0x640
	.long	1200                            ; 0x4b0
	.long	1920                            ; 0x780
	.long	1080                            ; 0x438
	.long	1920                            ; 0x780
	.long	1200                            ; 0x4b0

	.comm	_ATOM_DEVICE_TV_SUPPORT,4,2     ; @ATOM_DEVICE_TV_SUPPORT
	.comm	_ATOM_DEVICE_LCD_SUPPORT,4,2    ; @ATOM_DEVICE_LCD_SUPPORT
	.no_dead_strip	_amdgpu_connector_add_common_modes
.subsections_via_symbols
