	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function inv_mpu6050_set_enable
_inv_mpu6050_set_enable:                ## @inv_mpu6050_set_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r15
	callq	_iio_priv
	movq	%rax, %r12
	testl	%ebx, %ebx
	je	LBB0_9
## %bb.1:
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_inv_mpu6050_set_power_itg
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_20
## %bb.2:
	movq	%r15, %rdi
	callq	_inv_scan_query
	movl	$0, (%r12)
	cmpq	$0, 8(%r12)
	je	LBB0_5
## %bb.3:
	movq	_INV_MPU6050_BIT_PWR_GYRO_STBY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_inv_mpu6050_switch_engine
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_19
## %bb.4:
	movl	$1, (%r12)
LBB0_5:
	cmpq	$0, 16(%r12)
	je	LBB0_7
## %bb.6:
	movq	_INV_MPU6050_BIT_PWR_ACCL_STBY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_inv_mpu6050_switch_engine
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_17
LBB0_7:
	movq	%r15, %rdi
	callq	_inv_reset_fifo
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_15
## %bb.8:
	xorl	%ebx, %ebx
	jmp	LBB0_20
LBB0_9:
	movl	40(%r12), %edi
	movq	32(%r12), %rax
	movl	8(%rax), %esi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_15
## %bb.10:
	movl	40(%r12), %edi
	movq	32(%r12), %rax
	movl	4(%rax), %esi
	xorl	%edx, %edx
	callq	_regmap_write
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_15
## %bb.11:
	movl	40(%r12), %edi
	movq	32(%r12), %rax
	movl	(%rax), %esi
	movl	24(%r12), %edx
	callq	_regmap_write
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_15
## %bb.12:
	movq	_INV_MPU6050_BIT_PWR_ACCL_STBY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_inv_mpu6050_switch_engine
	movl	%eax, %r14d
	testl	%eax, %eax
	je	LBB0_13
LBB0_15:
	cmpq	$0, 16(%r12)
	je	LBB0_17
## %bb.16:
	movq	_INV_MPU6050_BIT_PWR_ACCL_STBY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_inv_mpu6050_switch_engine
LBB0_17:
	cmpq	$0, 8(%r12)
	je	LBB0_19
## %bb.18:
	movq	_INV_MPU6050_BIT_PWR_GYRO_STBY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_inv_mpu6050_switch_engine
LBB0_19:
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_inv_mpu6050_set_power_itg
	movl	%r14d, %ebx
LBB0_20:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_13:
	movq	_INV_MPU6050_BIT_PWR_GYRO_STBY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ebx, %ebx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_inv_mpu6050_switch_engine
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_17
## %bb.14:
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_inv_mpu6050_set_power_itg
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_19
	jmp	LBB0_20
	.cfi_endproc
                                        ## -- End function
	.comm	_INV_MPU6050_BIT_PWR_GYRO_STBY,4,2 ## @INV_MPU6050_BIT_PWR_GYRO_STBY
	.comm	_INV_MPU6050_BIT_PWR_ACCL_STBY,4,2 ## @INV_MPU6050_BIT_PWR_ACCL_STBY
	.no_dead_strip	_inv_mpu6050_set_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function inv_mpu6050_set_enable
_inv_mpu6050_set_enable:                ; @inv_mpu6050_set_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x21, x0
	bl	_iio_priv
	mov	x19, x0
	cbz	w20, LBB0_8
; %bb.1:
	mov	x0, x19
	mov	w1, #1
	bl	_inv_mpu6050_set_power_itg
	mov	x20, x0
	cbnz	w0, LBB0_17
; %bb.2:
	mov	x0, x21
	bl	_inv_scan_query
	str	wzr, [x19]
	ldr	x8, [x19, #8]
	cbz	x8, LBB0_5
; %bb.3:
Lloh0:
	adrp	x8, _INV_MPU6050_BIT_PWR_GYRO_STBY@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INV_MPU6050_BIT_PWR_GYRO_STBY@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	w22, #1
	mov	x0, x19
	mov	w1, #1
	bl	_inv_mpu6050_switch_engine
	mov	x20, x0
	cbnz	w0, LBB0_16
; %bb.4:
	str	w22, [x19]
LBB0_5:
	ldr	x8, [x19, #16]
	cbz	x8, LBB0_7
; %bb.6:
Lloh3:
	adrp	x8, _INV_MPU6050_BIT_PWR_ACCL_STBY@GOTPAGE
Lloh4:
	ldr	x8, [x8, _INV_MPU6050_BIT_PWR_ACCL_STBY@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #1
	bl	_inv_mpu6050_switch_engine
	mov	x20, x0
	cbnz	w0, LBB0_14
LBB0_7:
	mov	x0, x21
	bl	_inv_reset_fifo
	mov	x20, x0
	cbnz	w0, LBB0_12
	b	LBB0_17
LBB0_8:
	ldr	w0, [x19, #40]
	ldr	x8, [x19, #32]
	ldr	w1, [x8, #8]
	mov	w2, #0
	bl	_regmap_write
	mov	x20, x0
	cbnz	w0, LBB0_12
; %bb.9:
	ldr	w0, [x19, #40]
	ldr	x8, [x19, #32]
	ldr	w1, [x8, #4]
	mov	w2, #0
	bl	_regmap_write
	mov	x20, x0
	cbnz	w0, LBB0_12
; %bb.10:
	ldr	w0, [x19, #40]
	ldr	x8, [x19, #32]
	ldr	w1, [x8]
	ldr	w2, [x19, #24]
	bl	_regmap_write
	mov	x20, x0
	cbnz	w0, LBB0_12
; %bb.11:
Lloh6:
	adrp	x8, _INV_MPU6050_BIT_PWR_ACCL_STBY@GOTPAGE
Lloh7:
	ldr	x8, [x8, _INV_MPU6050_BIT_PWR_ACCL_STBY@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_inv_mpu6050_switch_engine
	mov	x20, x0
	cbz	w0, LBB0_18
LBB0_12:
	ldr	x8, [x19, #16]
	cbz	x8, LBB0_14
; %bb.13:
Lloh9:
	adrp	x8, _INV_MPU6050_BIT_PWR_ACCL_STBY@GOTPAGE
Lloh10:
	ldr	x8, [x8, _INV_MPU6050_BIT_PWR_ACCL_STBY@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_inv_mpu6050_switch_engine
LBB0_14:
	ldr	x8, [x19, #8]
	cbz	x8, LBB0_16
; %bb.15:
Lloh12:
	adrp	x8, _INV_MPU6050_BIT_PWR_GYRO_STBY@GOTPAGE
Lloh13:
	ldr	x8, [x8, _INV_MPU6050_BIT_PWR_GYRO_STBY@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_inv_mpu6050_switch_engine
LBB0_16:
	mov	x0, x19
	mov	w1, #0
	bl	_inv_mpu6050_set_power_itg
LBB0_17:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_18:
Lloh15:
	adrp	x8, _INV_MPU6050_BIT_PWR_GYRO_STBY@GOTPAGE
Lloh16:
	ldr	x8, [x8, _INV_MPU6050_BIT_PWR_GYRO_STBY@GOTPAGEOFF]
Lloh17:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_inv_mpu6050_switch_engine
	mov	x20, x0
	cbnz	w0, LBB0_14
; %bb.19:
	mov	x0, x19
	mov	w1, #0
	bl	_inv_mpu6050_set_power_itg
	mov	x20, x0
	cbnz	w0, LBB0_16
	b	LBB0_17
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_INV_MPU6050_BIT_PWR_GYRO_STBY,4,2 ; @INV_MPU6050_BIT_PWR_GYRO_STBY
	.comm	_INV_MPU6050_BIT_PWR_ACCL_STBY,4,2 ; @INV_MPU6050_BIT_PWR_ACCL_STBY
	.no_dead_strip	_inv_mpu6050_set_enable
.subsections_via_symbols
