	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v8_0_kiq_kcq_enable
_gfx_v8_0_kiq_kcq_enable:               ## @gfx_v8_0_kiq_kcq_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	leaq	28(%rdi), %r15
	movq	_AMDGPU_MAX_COMPUTE_QUEUES@GOTPCREL(%rip), %r14
	cmpl	$0, (%r14)
	jle	LBB0_1
## %bb.2:
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_3 Depth=1
	btsq	%rbx, %r12
LBB0_7:                                 ##   in Loop: Header=BB0_3 Depth=1
	incq	%rbx
	movslq	(%r14), %rax
	cmpq	%rax, %rbx
	jge	LBB0_8
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movl	24(%r13), %esi
	movl	%ebx, %edi
	callq	_test_bit
	testl	%eax, %eax
	je	LBB0_7
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	xorl	%edi, %edi
	cmpq	$64, %rbx
	setae	%dil
	callq	_WARN_ON
	testq	%rax, %rax
	je	LBB0_6
## %bb.5:
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %esi
	callq	_DRM_ERROR
	jmp	LBB0_8
LBB0_1:
	xorl	%r12d, %r12d
LBB0_8:
	movl	8(%r13), %eax
	leal	8(,%rax,8), %esi
	movq	%r15, %rdi
	callq	_amdgpu_ring_alloc
	testl	%eax, %eax
	je	LBB0_10
## %bb.9:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
	movl	%eax, %esi
	callq	_DRM_ERROR
	jmp	LBB0_14
LBB0_10:
	movq	_PACKET3_SET_RESOURCES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$6, %esi
	callq	_PACKET3
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r12, %rdi
	callq	_lower_32_bits
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r12, %rdi
	callq	_upper_32_bits
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	cmpl	$0, 8(%r13)
	jle	LBB0_13
## %bb.11:
	movl	$20, %r14d
	xorl	%ecx, %ecx
	movq	%r13, -48(%rbp)                 ## 8-byte Spill
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movq	%rcx, -64(%rbp)                 ## 8-byte Spill
	movq	%r13, %rbx
	movq	16(%r13), %r12
	movl	(%r12,%r14), %edi
	callq	_amdgpu_bo_gpu_offset
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movslq	-20(%r12,%r14), %r13
	shlq	$2, %r13
	addq	(%rbx), %r13
	movq	_PACKET3_MAP_QUEUES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$5, %esi
	callq	_PACKET3
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	$1, %edi
	callq	_PACKET3_MAP_QUEUES_NUM_QUEUES
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	-4(%r12,%r14), %edi
	callq	_PACKET3_MAP_QUEUES_DOORBELL_OFFSET
	movq	%r15, %rbx
	movl	%eax, %r15d
	movl	-8(%r12,%r14), %edi
	callq	_PACKET3_MAP_QUEUES_QUEUE
	orl	%eax, %r15d
	movl	-12(%r12,%r14), %edi
	callq	_PACKET3_MAP_QUEUES_PIPE
	orl	%eax, %r15d
	xorl	%edi, %edi
	cmpl	$1, -16(%r12,%r14)
	setne	%dil
	callq	_PACKET3_MAP_QUEUES_ME
	orl	%eax, %r15d
	movq	%rbx, %rdi
	movl	%r15d, %esi
	movq	%rbx, %r15
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	callq	_amdgpu_ring_write
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	callq	_lower_32_bits
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%rbx, %rdi
	callq	_upper_32_bits
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	callq	_lower_32_bits
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	callq	_upper_32_bits
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
	incq	%rcx
	movq	%r12, %r13
	movslq	8(%r12), %rax
	addq	$24, %r14
	cmpq	%rax, %rcx
	jl	LBB0_12
LBB0_13:
	movq	%r15, %rdi
	callq	_amdgpu_ring_commit
	xorl	%ebx, %ebx
LBB0_14:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_MAX_COMPUTE_QUEUES,4,2  ## @AMDGPU_MAX_COMPUTE_QUEUES
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Invalid KCQ enabled: %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to lock KIQ (%d).\n"

	.comm	_PACKET3_SET_RESOURCES,4,2      ## @PACKET3_SET_RESOURCES
	.comm	_PACKET3_MAP_QUEUES,4,2         ## @PACKET3_MAP_QUEUES
	.no_dead_strip	_gfx_v8_0_kiq_kcq_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v8_0_kiq_kcq_enable
_gfx_v8_0_kiq_kcq_enable:               ; @gfx_v8_0_kiq_kcq_enable
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x0
	add	x19, x0, #28
Lloh0:
	adrp	x23, _AMDGPU_MAX_COMPUTE_QUEUES@GOTPAGE
Lloh1:
	ldr	x23, [x23, _AMDGPU_MAX_COMPUTE_QUEUES@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.1:
	mov	x22, #0
	mov	x21, #0
	mov	w24, #1
	b	LBB0_4
LBB0_2:                                 ;   in Loop: Header=BB0_4 Depth=1
	lsl	x8, x24, x22
	orr	x21, x8, x21
LBB0_3:                                 ;   in Loop: Header=BB0_4 Depth=1
	add	x22, x22, #1
	ldrsw	x8, [x23]
	cmp	x22, x8
	b.ge	LBB0_8
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x20, #24]
	mov	x0, x22
	bl	_test_bit
	cbz	w0, LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	cmp	x22, #63
	cset	w0, hi
	bl	_WARN_ON
	cbz	x0, LBB0_2
; %bb.6:
Lloh2:
	adrp	x0, l_.str@PAGE
Lloh3:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x22
	bl	_DRM_ERROR
	b	LBB0_8
LBB0_7:
	mov	x21, #0
LBB0_8:
	ldr	w8, [x20, #8]
	lsl	w8, w8, #3
	add	w1, w8, #8
	mov	x0, x19
	bl	_amdgpu_ring_alloc
	cbz	w0, LBB0_10
; %bb.9:
	mov	x22, x0
Lloh4:
	adrp	x0, l_.str.1@PAGE
Lloh5:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	x1, x22
	bl	_DRM_ERROR
	b	LBB0_14
LBB0_10:
Lloh6:
	adrp	x8, _PACKET3_SET_RESOURCES@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PACKET3_SET_RESOURCES@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	mov	w1, #6
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x21
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x21
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	ldr	w8, [x20, #8]
	cmp	w8, #1
	b.lt	LBB0_13
; %bb.11:
	mov	x24, #0
	mov	x25, #0
Lloh9:
	adrp	x26, _PACKET3_MAP_QUEUES@GOTPAGE
Lloh10:
	ldr	x26, [x26, _PACKET3_MAP_QUEUES@GOTPAGEOFF]
LBB0_12:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x20, #16]
	add	x27, x8, x24
	ldr	w0, [x27, #20]
	bl	_amdgpu_bo_gpu_offset
	mov	x22, x0
	ldr	x8, [x20]
	ldrsw	x9, [x27]
	add	x21, x8, x9, lsl #2
	ldr	w0, [x26]
	mov	w1, #5
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	w0, #1
	bl	_PACKET3_MAP_QUEUES_NUM_QUEUES
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w0, [x27, #16]
	bl	_PACKET3_MAP_QUEUES_DOORBELL_OFFSET
	mov	x23, x0
	ldr	w0, [x27, #12]
	bl	_PACKET3_MAP_QUEUES_QUEUE
	orr	w23, w0, w23
	ldr	w0, [x27, #8]
	bl	_PACKET3_MAP_QUEUES_PIPE
	orr	w23, w23, w0
	ldr	w8, [x27, #4]
	cmp	w8, #1
	cset	w0, ne
	bl	_PACKET3_MAP_QUEUES_ME
	orr	w1, w23, w0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x22
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x22
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x21
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x21
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	add	x25, x25, #1
	ldrsw	x8, [x20, #8]
	add	x24, x24, #24
	cmp	x25, x8
	b.lt	LBB0_12
LBB0_13:
	mov	x0, x19
	bl	_amdgpu_ring_commit
	mov	w22, #0
LBB0_14:
	mov	x0, x22
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_MAX_COMPUTE_QUEUES,4,2  ; @AMDGPU_MAX_COMPUTE_QUEUES
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Invalid KCQ enabled: %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to lock KIQ (%d).\n"

	.comm	_PACKET3_SET_RESOURCES,4,2      ; @PACKET3_SET_RESOURCES
	.comm	_PACKET3_MAP_QUEUES,4,2         ; @PACKET3_MAP_QUEUES
	.no_dead_strip	_gfx_v8_0_kiq_kcq_enable
.subsections_via_symbols
