	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_dp_drrs_init
_intel_dp_drrs_init:                    ## @intel_dp_drrs_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	movl	(%rdi), %edi
	callq	_to_i915
	movq	%rax, %rbx
	leaq	16(%rax), %rdi
	movq	_intel_edp_drrs_downclock_work@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_INIT_DELAYED_WORK
	leaq	12(%rbx), %rdi
	callq	_mutex_init
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$7, %eax
	jge	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_7
LBB0_2:
	movq	24(%rbx), %rax
	movq	_SEAMLESS_DRRS_SUPPORT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_5
## %bb.3:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_intel_panel_edid_downclock_mode
	testq	%rax, %rax
	je	LBB0_6
## %bb.4:
	movq	%rax, %r14
	movq	24(%rbx), %rax
	movq	%rax, (%rbx)
	movq	_DRRS_HIGH_RR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rbx)
	leaq	L_.str.3(%rip), %rdi
	jmp	LBB0_8
LBB0_5:
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_7
LBB0_6:
	leaq	L_.str.2(%rip), %rdi
LBB0_7:
	xorl	%r14d, %r14d
LBB0_8:
	callq	_DRM_DEBUG_KMS
	movq	%r14, %rax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_intel_edp_drrs_downclock_work,4,2 ## @intel_edp_drrs_downclock_work
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"DRRS supported for Gen7 and above\n"

	.comm	_SEAMLESS_DRRS_SUPPORT,8,3      ## @SEAMLESS_DRRS_SUPPORT
L_.str.1:                               ## @.str.1
	.asciz	"VBT doesn't support DRRS\n"

L_.str.2:                               ## @.str.2
	.asciz	"Downclock mode is not found. DRRS not supported\n"

	.comm	_DRRS_HIGH_RR,4,2               ## @DRRS_HIGH_RR
L_.str.3:                               ## @.str.3
	.asciz	"seamless DRRS supported for eDP panel.\n"

	.no_dead_strip	_intel_dp_drrs_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_dp_drrs_init
_intel_dp_drrs_init:                    ; @intel_dp_drrs_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x21, x0
	ldr	w0, [x0]
	bl	_to_i915
	mov	x20, x0
	add	x0, x0, #16
Lloh0:
	adrp	x8, _intel_edp_drrs_downclock_work@GOTPAGE
Lloh1:
	ldr	x8, [x8, _intel_edp_drrs_downclock_work@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_INIT_DELAYED_WORK
	add	x0, x20, #12
	bl	_mutex_init
	mov	x0, x20
	bl	_INTEL_GEN
	cmp	w0, #7
	b.ge	LBB0_2
; %bb.1:
	mov	x19, #0
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_7
LBB0_2:
	ldr	x8, [x20, #24]
Lloh5:
	adrp	x9, _SEAMLESS_DRRS_SUPPORT@GOTPAGE
Lloh6:
	ldr	x9, [x9, _SEAMLESS_DRRS_SUPPORT@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_5
; %bb.3:
	mov	x0, x21
	mov	x1, x19
	bl	_intel_panel_edid_downclock_mode
	mov	x19, x0
	cbz	x0, LBB0_6
; %bb.4:
	ldr	x8, [x20, #24]
	str	x8, [x20]
Lloh8:
	adrp	x8, _DRRS_HIGH_RR@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DRRS_HIGH_RR@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	str	w8, [x20, #8]
Lloh11:
	adrp	x0, l_.str.3@PAGE
Lloh12:
	add	x0, x0, l_.str.3@PAGEOFF
	b	LBB0_7
LBB0_5:
	mov	x19, #0
Lloh13:
	adrp	x0, l_.str.1@PAGE
Lloh14:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_7
LBB0_6:
Lloh15:
	adrp	x0, l_.str.2@PAGE
Lloh16:
	add	x0, x0, l_.str.2@PAGEOFF
LBB0_7:
	bl	_DRM_DEBUG_KMS
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_intel_edp_drrs_downclock_work,4,2 ; @intel_edp_drrs_downclock_work
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"DRRS supported for Gen7 and above\n"

	.comm	_SEAMLESS_DRRS_SUPPORT,8,3      ; @SEAMLESS_DRRS_SUPPORT
l_.str.1:                               ; @.str.1
	.asciz	"VBT doesn't support DRRS\n"

l_.str.2:                               ; @.str.2
	.asciz	"Downclock mode is not found. DRRS not supported\n"

	.comm	_DRRS_HIGH_RR,4,2               ; @DRRS_HIGH_RR
l_.str.3:                               ; @.str.3
	.asciz	"seamless DRRS supported for eDP panel.\n"

	.no_dead_strip	_intel_dp_drrs_init
.subsections_via_symbols
