	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vce_v2_0_sw_init
_vce_v2_0_sw_init:                      ## @vce_v2_0_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	_AMDGPU_IRQ_CLIENTID_LEGACY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	4(%rdi), %r14
	movl	$167, %edx
	movq	%r14, %rcx
	callq	_amdgpu_irq_add_id
	testl	%eax, %eax
	jne	LBB0_7
## %bb.1:
	movq	_VCE_V2_0_FW_SIZE@GOTPCREL(%rip), %rax
	movq	_VCE_V2_0_STACK_SIZE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%rax), %rsi
	movq	_VCE_V2_0_DATA_SIZE@GOTPCREL(%rip), %rax
	addq	(%rax), %rsi
	movq	%r12, %rdi
	callq	_amdgpu_vce_sw_init
	testl	%eax, %eax
	jne	LBB0_7
## %bb.2:
	movq	%r12, %rdi
	callq	_amdgpu_vce_resume
	testl	%eax, %eax
	je	LBB0_3
LBB0_7:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	cmpl	$0, (%r12)
	jle	LBB0_8
## %bb.4:
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%r12), %r13
	movl	(%r13,%rbx,4), %edi
	addq	%r15, %r13
	leaq	L_.str(%rip), %rsi
	movl	%ebx, %edx
	callq	_sprintf
	movq	%r12, %rdi
	movq	%r13, %rsi
	movl	$512, %edx                      ## imm = 0x200
	movq	%r14, %rcx
	xorl	%r8d, %r8d
	callq	_amdgpu_ring_init
	testl	%eax, %eax
	jne	LBB0_7
## %bb.5:                               ##   in Loop: Header=BB0_6 Depth=1
	incq	%rbx
	movslq	(%r12), %rax
	addq	$4, %r15
	cmpq	%rax, %rbx
	jl	LBB0_6
LBB0_8:
	movq	%r12, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_vce_entity_init         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ## @AMDGPU_IRQ_CLIENTID_LEGACY
	.comm	_VCE_V2_0_FW_SIZE,8,3           ## @VCE_V2_0_FW_SIZE
	.comm	_VCE_V2_0_STACK_SIZE,8,3        ## @VCE_V2_0_STACK_SIZE
	.comm	_VCE_V2_0_DATA_SIZE,8,3         ## @VCE_V2_0_DATA_SIZE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"vce%d"

	.no_dead_strip	_vce_v2_0_sw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vce_v2_0_sw_init
_vce_v2_0_sw_init:                      ; @vce_v2_0_sw_init
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x8, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x20, x0, #4
	mov	w2, #167
	mov	x3, x20
	bl	_amdgpu_irq_add_id
	cbnz	w0, LBB0_3
; %bb.1:
Lloh3:
	adrp	x8, _VCE_V2_0_FW_SIZE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VCE_V2_0_FW_SIZE@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
Lloh6:
	adrp	x9, _VCE_V2_0_STACK_SIZE@GOTPAGE
Lloh7:
	ldr	x9, [x9, _VCE_V2_0_STACK_SIZE@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
Lloh9:
	adrp	x10, _VCE_V2_0_DATA_SIZE@GOTPAGE
Lloh10:
	ldr	x10, [x10, _VCE_V2_0_DATA_SIZE@GOTPAGEOFF]
Lloh11:
	ldr	x10, [x10]
	add	x8, x9, x8
	add	x1, x8, x10
	mov	x0, x19
	bl	_amdgpu_vce_sw_init
	cbnz	w0, LBB0_3
; %bb.2:
	mov	x0, x19
	bl	_amdgpu_vce_resume
	cbz	w0, LBB0_4
LBB0_3:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_4:
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_8
; %bb.5:
	mov	x24, #0
	mov	x21, #0
Lloh12:
	adrp	x22, l_.str@PAGE
Lloh13:
	add	x22, x22, l_.str@PAGEOFF
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #8]
	add	x23, x8, x24
	ldr	w0, [x8, x21, lsl #2]
	mov	x1, x22
	mov	x2, x21
	bl	_sprintf
	mov	x0, x19
	mov	x1, x23
	mov	w2, #512
	mov	x3, x20
	mov	w4, #0
	bl	_amdgpu_ring_init
	cbnz	w0, LBB0_3
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	add	x21, x21, #1
	ldrsw	x8, [x19]
	add	x24, x24, #4
	cmp	x21, x8
	b.lt	LBB0_6
LBB0_8:
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_amdgpu_vce_entity_init
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ; @AMDGPU_IRQ_CLIENTID_LEGACY
	.comm	_VCE_V2_0_FW_SIZE,8,3           ; @VCE_V2_0_FW_SIZE
	.comm	_VCE_V2_0_STACK_SIZE,8,3        ; @VCE_V2_0_STACK_SIZE
	.comm	_VCE_V2_0_DATA_SIZE,8,3         ; @VCE_V2_0_DATA_SIZE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"vce%d"

	.no_dead_strip	_vce_v2_0_sw_init
.subsections_via_symbols
