	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v9_0_ngg_init
_gfx_v9_0_ngg_init:                     ## @gfx_v9_0_ngg_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	_amdgpu_ngg@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	cmpl	$0, (%rax)
	je	LBB0_12
## %bb.1:
	movq	%rdi, %r14
	cmpl	$1, (%rdi)
	je	LBB0_12
## %bb.2:
	movl	$20, %edi
	movl	$64, %esi
	callq	_ALIGN
	movq	%rax, 24(%r14)
	subl	%eax, 36(%r14)
	movq	_GC@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movq	_mmGDS_VMID0_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	%rax, 16(%r14)
	movl	(%rbx), %edi
	movq	_mmGDS_VMID0_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	addq	%rax, 16(%r14)
	movq	_NGG_PRIM@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	shlq	$2, %rsi
	addq	8(%r14), %rsi
	movq	_amdgpu_prim_buf_per_se@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r14, %rdi
	movl	$65536, %ecx                    ## imm = 0x10000
	callq	_gfx_v9_0_ngg_create_buf
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_11
LBB0_4:
	movq	_NGG_POS@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	shlq	$2, %rsi
	addq	8(%r14), %rsi
	movq	_amdgpu_pos_buf_per_se@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r14, %rdi
	movl	$262144, %ecx                   ## imm = 0x40000
	callq	_gfx_v9_0_ngg_create_buf
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_11
LBB0_6:
	movq	_NGG_CNTL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	shlq	$2, %rsi
	addq	8(%r14), %rsi
	movq	_amdgpu_cntl_sb_buf_per_se@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r14, %rdi
	movl	$256, %ecx                      ## imm = 0x100
	callq	_gfx_v9_0_ngg_create_buf
	testl	%eax, %eax
	je	LBB0_8
## %bb.7:
	movl	%eax, %ebx
	leaq	L_.str.2(%rip), %rsi
	jmp	LBB0_11
LBB0_8:
	movq	_amdgpu_param_buf_per_se@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	testq	%rdx, %rdx
	jle	LBB0_13
## %bb.9:
	movq	_NGG_PARAM@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	shlq	$2, %rsi
	addq	8(%r14), %rsi
	movq	%r14, %rdi
	movl	$524288, %ecx                   ## imm = 0x80000
	callq	_gfx_v9_0_ngg_create_buf
	testl	%eax, %eax
	je	LBB0_13
## %bb.10:
	movl	%eax, %ebx
	leaq	L_.str.3(%rip), %rsi
LBB0_11:
	movl	32(%r14), %edi
	callq	_dev_err
	movq	%r14, %rdi
	callq	_gfx_v9_0_ngg_fini
LBB0_12:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_13:
	movl	$1, (%r14)
	xorl	%ebx, %ebx
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.comm	_amdgpu_ngg,4,2                 ## @amdgpu_ngg
	.comm	_GC,4,2                         ## @GC
	.comm	_mmGDS_VMID0_BASE,4,2           ## @mmGDS_VMID0_BASE
	.comm	_mmGDS_VMID0_SIZE,4,2           ## @mmGDS_VMID0_SIZE
	.comm	_NGG_PRIM,8,3                   ## @NGG_PRIM
	.comm	_amdgpu_prim_buf_per_se,8,3     ## @amdgpu_prim_buf_per_se
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to create Primitive Buffer\n"

	.comm	_NGG_POS,8,3                    ## @NGG_POS
	.comm	_amdgpu_pos_buf_per_se,8,3      ## @amdgpu_pos_buf_per_se
L_.str.1:                               ## @.str.1
	.asciz	"Failed to create Position Buffer\n"

	.comm	_NGG_CNTL,8,3                   ## @NGG_CNTL
	.comm	_amdgpu_cntl_sb_buf_per_se,8,3  ## @amdgpu_cntl_sb_buf_per_se
L_.str.2:                               ## @.str.2
	.asciz	"Failed to create Control Sideband Buffer\n"

	.comm	_amdgpu_param_buf_per_se,8,3    ## @amdgpu_param_buf_per_se
	.comm	_NGG_PARAM,8,3                  ## @NGG_PARAM
L_.str.3:                               ## @.str.3
	.asciz	"Failed to create Parameter Cache\n"

	.no_dead_strip	_gfx_v9_0_ngg_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v9_0_ngg_init
_gfx_v9_0_ngg_init:                     ; @gfx_v9_0_ngg_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x8, _amdgpu_ngg@GOTPAGE
Lloh1:
	ldr	x8, [x8, _amdgpu_ngg@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cbz	w8, LBB0_2
; %bb.1:
	mov	x19, x0
	ldr	w8, [x0]
	cmp	w8, #1
	b.ne	LBB0_3
LBB0_2:
	mov	w20, #0
	b	LBB0_13
LBB0_3:
	mov	w0, #20
	mov	w1, #64
	bl	_ALIGN
	str	x0, [x19, #24]
	ldr	w8, [x19, #36]
	sub	w8, w8, w0
	str	w8, [x19, #36]
Lloh3:
	adrp	x20, _GC@GOTPAGE
Lloh4:
	ldr	x20, [x20, _GC@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh5:
	adrp	x8, _mmGDS_VMID0_BASE@GOTPAGE
Lloh6:
	ldr	x8, [x8, _mmGDS_VMID0_BASE@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	str	x0, [x19, #16]
	ldr	w0, [x20]
Lloh8:
	adrp	x8, _mmGDS_VMID0_SIZE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _mmGDS_VMID0_SIZE@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	ldp	x9, x8, [x19, #8]
	add	x8, x8, x0
Lloh11:
	adrp	x10, _NGG_PRIM@GOTPAGE
Lloh12:
	ldr	x10, [x10, _NGG_PRIM@GOTPAGEOFF]
	str	x8, [x19, #16]
Lloh13:
	ldr	x8, [x10]
	add	x1, x9, x8, lsl #2
Lloh14:
	adrp	x8, _amdgpu_prim_buf_per_se@GOTPAGE
Lloh15:
	ldr	x8, [x8, _amdgpu_prim_buf_per_se@GOTPAGEOFF]
Lloh16:
	ldr	x2, [x8]
	mov	x0, x19
	mov	w3, #65536
	bl	_gfx_v9_0_ngg_create_buf
	cbz	w0, LBB0_5
; %bb.4:
	mov	x20, x0
Lloh17:
	adrp	x1, l_.str@PAGE
Lloh18:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_12
LBB0_5:
Lloh19:
	adrp	x8, _NGG_POS@GOTPAGE
Lloh20:
	ldr	x8, [x8, _NGG_POS@GOTPAGEOFF]
	ldr	x9, [x19, #8]
Lloh21:
	ldr	x8, [x8]
	add	x1, x9, x8, lsl #2
Lloh22:
	adrp	x8, _amdgpu_pos_buf_per_se@GOTPAGE
Lloh23:
	ldr	x8, [x8, _amdgpu_pos_buf_per_se@GOTPAGEOFF]
Lloh24:
	ldr	x2, [x8]
	mov	x0, x19
	mov	w3, #262144
	bl	_gfx_v9_0_ngg_create_buf
	cbz	w0, LBB0_7
; %bb.6:
	mov	x20, x0
Lloh25:
	adrp	x1, l_.str.1@PAGE
Lloh26:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_12
LBB0_7:
Lloh27:
	adrp	x8, _NGG_CNTL@GOTPAGE
Lloh28:
	ldr	x8, [x8, _NGG_CNTL@GOTPAGEOFF]
	ldr	x9, [x19, #8]
Lloh29:
	ldr	x8, [x8]
	add	x1, x9, x8, lsl #2
Lloh30:
	adrp	x8, _amdgpu_cntl_sb_buf_per_se@GOTPAGE
Lloh31:
	ldr	x8, [x8, _amdgpu_cntl_sb_buf_per_se@GOTPAGEOFF]
Lloh32:
	ldr	x2, [x8]
	mov	x0, x19
	mov	w3, #256
	bl	_gfx_v9_0_ngg_create_buf
	cbz	w0, LBB0_9
; %bb.8:
	mov	x20, x0
Lloh33:
	adrp	x1, l_.str.2@PAGE
Lloh34:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_12
LBB0_9:
Lloh35:
	adrp	x8, _amdgpu_param_buf_per_se@GOTPAGE
Lloh36:
	ldr	x8, [x8, _amdgpu_param_buf_per_se@GOTPAGEOFF]
Lloh37:
	ldr	x2, [x8]
	cmp	x2, #1
	b.lt	LBB0_14
; %bb.10:
	ldr	x8, [x19, #8]
Lloh38:
	adrp	x9, _NGG_PARAM@GOTPAGE
Lloh39:
	ldr	x9, [x9, _NGG_PARAM@GOTPAGEOFF]
Lloh40:
	ldr	x9, [x9]
	add	x1, x8, x9, lsl #2
	mov	x0, x19
	mov	w3, #524288
	bl	_gfx_v9_0_ngg_create_buf
	cbz	w0, LBB0_14
; %bb.11:
	mov	x20, x0
Lloh41:
	adrp	x1, l_.str.3@PAGE
Lloh42:
	add	x1, x1, l_.str.3@PAGEOFF
LBB0_12:
	ldr	w0, [x19, #32]
	bl	_dev_err
	mov	x0, x19
	bl	_gfx_v9_0_ngg_fini
LBB0_13:
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_14:
	mov	w20, #0
	mov	w8, #1
	str	w8, [x19]
	b	LBB0_13
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpAdd	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpAdd	Lloh41, Lloh42
	.cfi_endproc
                                        ; -- End function
	.comm	_amdgpu_ngg,4,2                 ; @amdgpu_ngg
	.comm	_GC,4,2                         ; @GC
	.comm	_mmGDS_VMID0_BASE,4,2           ; @mmGDS_VMID0_BASE
	.comm	_mmGDS_VMID0_SIZE,4,2           ; @mmGDS_VMID0_SIZE
	.comm	_NGG_PRIM,8,3                   ; @NGG_PRIM
	.comm	_amdgpu_prim_buf_per_se,8,3     ; @amdgpu_prim_buf_per_se
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to create Primitive Buffer\n"

	.comm	_NGG_POS,8,3                    ; @NGG_POS
	.comm	_amdgpu_pos_buf_per_se,8,3      ; @amdgpu_pos_buf_per_se
l_.str.1:                               ; @.str.1
	.asciz	"Failed to create Position Buffer\n"

	.comm	_NGG_CNTL,8,3                   ; @NGG_CNTL
	.comm	_amdgpu_cntl_sb_buf_per_se,8,3  ; @amdgpu_cntl_sb_buf_per_se
l_.str.2:                               ; @.str.2
	.asciz	"Failed to create Control Sideband Buffer\n"

	.comm	_amdgpu_param_buf_per_se,8,3    ; @amdgpu_param_buf_per_se
	.comm	_NGG_PARAM,8,3                  ; @NGG_PARAM
l_.str.3:                               ; @.str.3
	.asciz	"Failed to create Parameter Cache\n"

	.no_dead_strip	_gfx_v9_0_ngg_init
.subsections_via_symbols
