	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vce_get_destroy_msg     ## -- Begin function amdgpu_vce_get_destroy_msg
	.p2align	4, 0x90
_amdgpu_vce_get_destroy_msg:            ## @amdgpu_vce_get_destroy_msg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r12
	movl	%edx, %r15d
	movl	%esi, %r14d
	movq	%rdi, %r13
	movq	$0, -48(%rbp)
	movq	(%rdi), %rdi
	leaq	-64(%rbp), %rdx
	movl	$4096, %esi                     ## imm = 0x1000
	callq	_amdgpu_job_alloc_with_ib
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_11
## %bb.1:
	movq	%r12, -56(%rbp)                 ## 8-byte Spill
	movq	-64(%rbp), %r12
	movq	(%r12), %rcx
	movq	8(%rcx), %rax
	movl	$1, (%rcx)
	movl	$12, (%rax)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	$1, (%rax,%rdx,4)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	%r14d, (%rax,%rdx,4)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	$32, (%rax,%rdx,4)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	$2, (%rax,%rdx,4)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	$-1, (%rax,%rdx,4)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	$1, (%rax,%rdx,4)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	$0, (%rax,%rdx,4)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	$0, (%rax,%rdx,4)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	$-1, (%rax,%rdx,4)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	$0, (%rax,%rdx,4)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	$8, (%rax,%rdx,4)
	movslq	(%rcx), %rdx
	leal	1(%rdx), %esi
	movl	%esi, (%rcx)
	movl	$33554433, (%rax,%rdx,4)        ## imm = 0x2000001
	movl	(%rcx), %ecx
	cmpq	$1023, %rcx                     ## imm = 0x3FF
	ja	LBB0_3
## %bb.2:
	leaq	(%rax,%rcx,4), %rdi
	movl	$1023, %eax                     ## imm = 0x3FF
	subl	%ecx, %eax
	leaq	4(,%rax,4), %rsi
	callq	___bzero
LBB0_3:
	testl	%r15d, %r15d
	je	LBB0_5
## %bb.4:
	leaq	-48(%rbp), %rdx
	movq	%r12, %rdi
	movq	%r13, %rsi
	callq	_amdgpu_job_submit_direct
	jmp	LBB0_6
LBB0_5:
	movq	(%r13), %rsi
	movq	_AMDGPU_FENCE_OWNER_UNDEFINED@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-48(%rbp), %rcx
	movq	%r12, %rdi
	callq	_amdgpu_job_submit
LBB0_6:
	movl	%eax, %ebx
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	testl	%eax, %eax
	je	LBB0_7
## %bb.10:
	movq	-64(%rbp), %rdi
	callq	_amdgpu_job_free
	jmp	LBB0_11
LBB0_7:
	testq	%r14, %r14
	je	LBB0_9
## %bb.8:
	movq	-48(%rbp), %rdi
	callq	_dma_fence_get
	movq	%rax, (%r14)
LBB0_9:
	movq	-48(%rbp), %rdi
	callq	_dma_fence_put
	xorl	%ebx, %ebx
LBB0_11:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_FENCE_OWNER_UNDEFINED,4,2 ## @AMDGPU_FENCE_OWNER_UNDEFINED
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vce_get_destroy_msg     ; -- Begin function amdgpu_vce_get_destroy_msg
	.p2align	2
_amdgpu_vce_get_destroy_msg:            ; @amdgpu_vce_get_destroy_msg
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x3
	mov	x21, x2
	mov	x23, x1
	mov	x20, x0
	str	xzr, [sp]
	ldr	x0, [x0]
	add	x2, sp, #8
	mov	w1, #4096
	bl	_amdgpu_job_alloc_with_ib
	mov	x22, x0
	cbnz	w0, LBB0_10
; %bb.1:
	ldr	x22, [sp, #8]
	ldr	x9, [x22]
	ldr	x8, [x9, #8]
	mov	w10, #1
	str	w10, [x9]
	mov	w11, #12
	str	w11, [x8]
	ldrsw	x11, [x9]
	add	w12, w11, #1
	str	w12, [x9]
	str	w10, [x8, x11, lsl #2]
	ldrsw	x11, [x9]
	add	w12, w11, #1
	str	w12, [x9]
	str	w23, [x8, x11, lsl #2]
	ldrsw	x11, [x9]
	add	w12, w11, #1
	str	w12, [x9]
	mov	w12, #32
	str	w12, [x8, x11, lsl #2]
	ldrsw	x11, [x9]
	add	w12, w11, #1
	str	w12, [x9]
	mov	w12, #2
	str	w12, [x8, x11, lsl #2]
	ldrsw	x11, [x9]
	add	w12, w11, #1
	str	w12, [x9]
	mov	w12, #-1
	str	w12, [x8, x11, lsl #2]
	ldrsw	x11, [x9]
	add	w13, w11, #1
	str	w13, [x9]
	str	w10, [x8, x11, lsl #2]
	ldrsw	x10, [x9]
	add	w11, w10, #1
	str	w11, [x9]
	str	wzr, [x8, x10, lsl #2]
	ldrsw	x10, [x9]
	add	w11, w10, #1
	str	w11, [x9]
	str	wzr, [x8, x10, lsl #2]
	ldrsw	x10, [x9]
	add	w11, w10, #1
	str	w11, [x9]
	str	w12, [x8, x10, lsl #2]
	ldrsw	x10, [x9]
	add	w11, w10, #1
	str	w11, [x9]
	str	wzr, [x8, x10, lsl #2]
	ldrsw	x10, [x9]
	add	w11, w10, #1
	str	w11, [x9]
	mov	w11, #8
	str	w11, [x8, x10, lsl #2]
	ldrsw	x10, [x9]
	add	w11, w10, #1
	str	w11, [x9]
	mov	w11, #1
	movk	w11, #512, lsl #16
	str	w11, [x8, x10, lsl #2]
	ldr	w9, [x9]
	cmp	w9, #1023
	b.hi	LBB0_3
; %bb.2:
	add	x0, x8, x9, lsl #2
	mov	w8, #1023
	sub	w8, w8, w9
	lsl	x8, x8, #2
	add	x1, x8, #4
	bl	_bzero
LBB0_3:
	cbz	w21, LBB0_6
; %bb.4:
	mov	x2, sp
	mov	x0, x22
	mov	x1, x20
	bl	_amdgpu_job_submit_direct
	mov	x22, x0
	cbz	w0, LBB0_7
LBB0_5:
	ldr	x0, [sp, #8]
	bl	_amdgpu_job_free
	b	LBB0_10
LBB0_6:
	ldr	x1, [x20]
Lloh0:
	adrp	x8, _AMDGPU_FENCE_OWNER_UNDEFINED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_FENCE_OWNER_UNDEFINED@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	x3, sp
	mov	x0, x22
	bl	_amdgpu_job_submit
	mov	x22, x0
	cbnz	w0, LBB0_5
LBB0_7:
	cbz	x19, LBB0_9
; %bb.8:
	ldr	x0, [sp]
	bl	_dma_fence_get
	str	x0, [x19]
LBB0_9:
	ldr	x0, [sp]
	bl	_dma_fence_put
	mov	w22, #0
LBB0_10:
	mov	x0, x22
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_FENCE_OWNER_UNDEFINED,4,2 ; @AMDGPU_FENCE_OWNER_UNDEFINED
.subsections_via_symbols
