	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v7_0_ring_emit_fence_gfx
_gfx_v7_0_ring_emit_fence_gfx:          ## @gfx_v7_0_ring_emit_fence_gfx
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	_AMDGPU_FENCE_FLAG_64BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%ecx, %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_AMDGPU_FENCE_FLAG_INT@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	andl	(%rax), %ecx
	movl	%edx, %r12d
	movl	%esi, %r13d
	movq	%rdi, %r14
	setne	%r15b
	movq	_PACKET3_EVENT_WRITE_EOP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$4, %esi
	callq	_PACKET3
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	_EOP_TCL1_ACTION_EN@GOTPCREL(%rip), %rax
	movq	_EOP_TC_ACTION_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	_CACHE_FLUSH_AND_INV_TS_EVENT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVENT_TYPE
	orl	%eax, %ebx
	movl	$5, %edi
	callq	_EVENT_INDEX
	orl	%eax, %ebx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_amdgpu_ring_write
	movl	%r13d, %ebx
	movl	%r13d, -44(%rbp)                ## 4-byte Spill
	andl	$-4, %r13d
	movq	%r14, %rdi
	movl	%r13d, %esi
	callq	_amdgpu_ring_write
	movl	%ebx, %edi
	callq	_upper_32_bits
	movzwl	%ax, %ebx
	movl	$1, %edi
	callq	_DATA_SEL
	orl	%eax, %ebx
	xorl	%edi, %edi
	callq	_INT_SEL
	orl	%eax, %ebx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_amdgpu_ring_write
	leal	-1(%r12), %ebx
	movl	%ebx, %edi
	callq	_lower_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	%ebx, %edi
	callq	_upper_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	_PACKET3_EVENT_WRITE_EOP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$4, %esi
	callq	_PACKET3
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	_EOP_TC_ACTION_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_EOP_TCL1_ACTION_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	_CACHE_FLUSH_AND_INV_TS_EVENT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_EVENT_TYPE
	orl	%eax, %ebx
	movl	$5, %edi
	callq	_EVENT_INDEX
	orl	%eax, %ebx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_amdgpu_ring_write
	movq	%r14, %rdi
	movl	%r13d, %esi
	callq	_amdgpu_ring_write
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_upper_32_bits
	movzwl	%ax, %ebx
	cmpl	$1, -48(%rbp)                   ## 4-byte Folded Reload
	movl	$2, %edi
	sbbl	$0, %edi
	callq	_DATA_SEL
	orl	%eax, %ebx
	addl	%r15d, %r15d
	movl	%r15d, %edi
	callq	_INT_SEL
	orl	%eax, %ebx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_amdgpu_ring_write
	movl	%r12d, %edi
	callq	_lower_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	%r12d, %edi
	callq	_upper_32_bits
	movq	%r14, %rdi
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_FENCE_FLAG_64BIT,4,2    ## @AMDGPU_FENCE_FLAG_64BIT
	.comm	_AMDGPU_FENCE_FLAG_INT,4,2      ## @AMDGPU_FENCE_FLAG_INT
	.comm	_PACKET3_EVENT_WRITE_EOP,4,2    ## @PACKET3_EVENT_WRITE_EOP
	.comm	_EOP_TCL1_ACTION_EN,4,2         ## @EOP_TCL1_ACTION_EN
	.comm	_EOP_TC_ACTION_EN,4,2           ## @EOP_TC_ACTION_EN
	.comm	_CACHE_FLUSH_AND_INV_TS_EVENT,4,2 ## @CACHE_FLUSH_AND_INV_TS_EVENT
	.no_dead_strip	_gfx_v7_0_ring_emit_fence_gfx
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v7_0_ring_emit_fence_gfx
_gfx_v7_0_ring_emit_fence_gfx:          ; @gfx_v7_0_ring_emit_fence_gfx
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x3
	mov	x20, x2
	mov	x22, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _AMDGPU_FENCE_FLAG_64BIT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_FENCE_FLAG_64BIT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [sp, #8]                    ; 4-byte Folded Spill
Lloh3:
	adrp	x8, _AMDGPU_FENCE_FLAG_INT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AMDGPU_FENCE_FLAG_INT@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	tst	w8, w3
	cset	w8, ne
	str	w8, [sp, #12]                   ; 4-byte Folded Spill
Lloh6:
	adrp	x27, _PACKET3_EVENT_WRITE_EOP@GOTPAGE
Lloh7:
	ldr	x27, [x27, _PACKET3_EVENT_WRITE_EOP@GOTPAGEOFF]
	ldr	w0, [x27]
	mov	w1, #4
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
Lloh8:
	adrp	x28, _EOP_TCL1_ACTION_EN@GOTPAGE
Lloh9:
	ldr	x28, [x28, _EOP_TCL1_ACTION_EN@GOTPAGEOFF]
Lloh10:
	adrp	x25, _EOP_TC_ACTION_EN@GOTPAGE
Lloh11:
	ldr	x25, [x25, _EOP_TC_ACTION_EN@GOTPAGEOFF]
	ldr	w8, [x28]
	ldr	w9, [x25]
	orr	w23, w9, w8
Lloh12:
	adrp	x26, _CACHE_FLUSH_AND_INV_TS_EVENT@GOTPAGE
Lloh13:
	ldr	x26, [x26, _CACHE_FLUSH_AND_INV_TS_EVENT@GOTPAGEOFF]
	ldr	w0, [x26]
	bl	_EVENT_TYPE
	orr	w23, w23, w0
	mov	w0, #5
	bl	_EVENT_INDEX
	orr	w1, w23, w0
	mov	x0, x19
	bl	_amdgpu_ring_write
	and	w23, w22, #0xfffffffc
	mov	x0, x19
	mov	x1, x23
	bl	_amdgpu_ring_write
	mov	x0, x22
	bl	_upper_32_bits
	and	w24, w0, #0xffff
	mov	w0, #1
	bl	_DATA_SEL
	orr	w24, w24, w0
	mov	w0, #0
	bl	_INT_SEL
	orr	w1, w24, w0
	mov	x0, x19
	bl	_amdgpu_ring_write
	sub	w24, w20, #1
	mov	x0, x24
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x24
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w0, [x27]
	mov	w1, #4
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w8, [x28]
	ldr	w9, [x25]
	orr	w24, w9, w8
	ldr	w0, [x26]
	bl	_EVENT_TYPE
	orr	w24, w24, w0
	mov	w0, #5
	bl	_EVENT_INDEX
	orr	w1, w24, w0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	x1, x23
	bl	_amdgpu_ring_write
	mov	x0, x22
	bl	_upper_32_bits
	and	w22, w0, #0xffff
	ldr	w8, [sp, #8]                    ; 4-byte Folded Reload
	tst	w8, w21
	mov	w8, #1
	cinc	w0, w8, ne
	bl	_DATA_SEL
	orr	w21, w22, w0
	ldr	w8, [sp, #12]                   ; 4-byte Folded Reload
	lsl	w0, w8, #1
	bl	_INT_SEL
	orr	w1, w21, w0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x20
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x20
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_amdgpu_ring_write
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_FENCE_FLAG_64BIT,4,2    ; @AMDGPU_FENCE_FLAG_64BIT
	.comm	_AMDGPU_FENCE_FLAG_INT,4,2      ; @AMDGPU_FENCE_FLAG_INT
	.comm	_PACKET3_EVENT_WRITE_EOP,4,2    ; @PACKET3_EVENT_WRITE_EOP
	.comm	_EOP_TCL1_ACTION_EN,4,2         ; @EOP_TCL1_ACTION_EN
	.comm	_EOP_TC_ACTION_EN,4,2           ; @EOP_TC_ACTION_EN
	.comm	_CACHE_FLUSH_AND_INV_TS_EVENT,4,2 ; @CACHE_FLUSH_AND_INV_TS_EVENT
	.no_dead_strip	_gfx_v7_0_ring_emit_fence_gfx
.subsections_via_symbols
