	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function socfpga_fpga_reset
_socfpga_fpga_reset:                    ## @socfpga_fpga_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rbx
	movq	%rbx, %rdi
	callq	_socfpga_fpga_cfg_mode_set
	testl	%eax, %eax
	jne	LBB0_4
## %bb.1:
	movq	_SOCFPGA_FPGMGR_CTL_OFST@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_SOCFPGA_FPGMGR_CTL_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_socfpga_fpga_set_bitsl
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_socfpga_fpga_readl
	movq	%rax, %r14
	movq	_SOCFPGA_FPGMGR_CTL_NCFGPULL@GOTPCREL(%rip), %r13
	orq	(%r13), %r14
	movl	(%r12), %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_socfpga_fpga_writel
	movq	_SOCFPGA_FPGMGR_STAT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_socfpga_fpga_wait_for_state
	movq	%rax, %r15
	movq	(%r13), %rdx
	notq	%rdx
	andq	%r14, %rdx
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_socfpga_fpga_writel
	testq	%r15, %r15
	je	LBB0_2
## %bb.3:
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_4
LBB0_2:
	xorl	%eax, %eax
LBB0_4:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SOCFPGA_FPGMGR_CTL_OFST,4,2    ## @SOCFPGA_FPGMGR_CTL_OFST
	.comm	_SOCFPGA_FPGMGR_CTL_EN,4,2      ## @SOCFPGA_FPGMGR_CTL_EN
	.comm	_SOCFPGA_FPGMGR_CTL_NCFGPULL,8,3 ## @SOCFPGA_FPGMGR_CTL_NCFGPULL
	.comm	_SOCFPGA_FPGMGR_STAT_RESET,4,2  ## @SOCFPGA_FPGMGR_STAT_RESET
	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
	.no_dead_strip	_socfpga_fpga_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function socfpga_fpga_reset
_socfpga_fpga_reset:                    ; @socfpga_fpga_reset
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	x19, [x0]
	mov	x0, x19
	bl	_socfpga_fpga_cfg_mode_set
	cbnz	w0, LBB0_4
; %bb.1:
Lloh0:
	adrp	x22, _SOCFPGA_FPGMGR_CTL_OFST@GOTPAGE
Lloh1:
	ldr	x22, [x22, _SOCFPGA_FPGMGR_CTL_OFST@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh2:
	adrp	x8, _SOCFPGA_FPGMGR_CTL_EN@GOTPAGE
Lloh3:
	ldr	x8, [x8, _SOCFPGA_FPGMGR_CTL_EN@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_socfpga_fpga_set_bitsl
	ldr	w1, [x22]
	mov	x0, x19
	bl	_socfpga_fpga_readl
Lloh5:
	adrp	x23, _SOCFPGA_FPGMGR_CTL_NCFGPULL@GOTPAGE
Lloh6:
	ldr	x23, [x23, _SOCFPGA_FPGMGR_CTL_NCFGPULL@GOTPAGEOFF]
	ldr	x8, [x23]
	orr	x20, x8, x0
	ldr	w1, [x22]
	mov	x0, x19
	mov	x2, x20
	bl	_socfpga_fpga_writel
Lloh7:
	adrp	x8, _SOCFPGA_FPGMGR_STAT_RESET@GOTPAGE
Lloh8:
	ldr	x8, [x8, _SOCFPGA_FPGMGR_STAT_RESET@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_socfpga_fpga_wait_for_state
	mov	x21, x0
	ldr	x8, [x23]
	bic	x2, x20, x8
	ldr	w1, [x22]
	mov	x0, x19
	bl	_socfpga_fpga_writel
	cbz	x21, LBB0_3
; %bb.2:
Lloh10:
	adrp	x8, _ETIMEDOUT@GOTPAGE
Lloh11:
	ldr	x8, [x8, _ETIMEDOUT@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_4
LBB0_3:
	mov	w0, #0
LBB0_4:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_SOCFPGA_FPGMGR_CTL_OFST,4,2    ; @SOCFPGA_FPGMGR_CTL_OFST
	.comm	_SOCFPGA_FPGMGR_CTL_EN,4,2      ; @SOCFPGA_FPGMGR_CTL_EN
	.comm	_SOCFPGA_FPGMGR_CTL_NCFGPULL,8,3 ; @SOCFPGA_FPGMGR_CTL_NCFGPULL
	.comm	_SOCFPGA_FPGMGR_STAT_RESET,4,2  ; @SOCFPGA_FPGMGR_STAT_RESET
	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
	.no_dead_strip	_socfpga_fpga_reset
.subsections_via_symbols
