	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mvebu_gpioreg_level_mask
_mvebu_gpioreg_level_mask:              ## @mvebu_gpioreg_level_mask
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdi), %eax
	addl	$-128, %eax
	cmpl	$3, %eax
	ja	LBB0_3
## %bb.1:
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_2:
	movq	16(%rbx), %rax
	movq	%rax, (%r15)
	movq	_GPIO_LEVEL_MASK_OFF@GOTPCREL(%rip), %rax
	movl	4(%rbx), %ecx
	addl	(%rax), %ecx
	movl	%ecx, (%r14)
	jmp	LBB0_7
LBB0_3:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_BUG                            ## TAILCALL
LBB0_4:
	xorl	%eax, %eax
	callq	_smp_processor_id
	movq	16(%rbx), %rcx
	movq	%rcx, (%r15)
	movl	%eax, %edi
	callq	_GPIO_LEVEL_MASK_MV78200_OFF
	jmp	LBB0_6
LBB0_5:
	xorl	%eax, %eax
	callq	_smp_processor_id
	movq	8(%rbx), %rcx
	movq	%rcx, (%r15)
	movl	%eax, %edi
	callq	_GPIO_LEVEL_MASK_ARMADAXP_OFF
LBB0_6:
	movl	%eax, (%r14)
LBB0_7:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
LJTI0_0:
	.long	L0_0_set_2
	.long	L0_0_set_4
	.long	L0_0_set_5
	.long	L0_0_set_2
	.end_data_region
                                        ## -- End function
	.comm	_GPIO_LEVEL_MASK_OFF,4,2        ## @GPIO_LEVEL_MASK_OFF
	.no_dead_strip	_mvebu_gpioreg_level_mask
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mvebu_gpioreg_level_mask
_mvebu_gpioreg_level_mask:              ; @mvebu_gpioreg_level_mask
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	w8, [x0]
	sub	w8, w8, #128
	cmp	w8, #3
	b.hi	LBB0_3
; %bb.1:
	mov	x19, x2
	mov	x21, x1
	mov	x20, x0
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
	ldr	x8, [x20, #16]
	str	x8, [x21]
Lloh2:
	adrp	x8, _GPIO_LEVEL_MASK_OFF@GOTPAGE
Lloh3:
	ldr	x8, [x8, _GPIO_LEVEL_MASK_OFF@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	ldr	w9, [x20, #4]
	add	w8, w9, w8
	str	w8, [x19]
	b	LBB0_7
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_BUG
LBB0_4:
	bl	_smp_processor_id
	ldr	x8, [x20, #16]
	str	x8, [x21]
	bl	_GPIO_LEVEL_MASK_MV78200_OFF
	b	LBB0_6
LBB0_5:
	bl	_smp_processor_id
	ldr	x8, [x20, #8]
	str	x8, [x21]
	bl	_GPIO_LEVEL_MASK_ARMADAXP_OFF
LBB0_6:
	str	w0, [x19]
LBB0_7:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_2-LBB0_2)>>2
                                        ; -- End function
	.comm	_GPIO_LEVEL_MASK_OFF,4,2        ; @GPIO_LEVEL_MASK_OFF
	.no_dead_strip	_mvebu_gpioreg_level_mask
.subsections_via_symbols
