	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_psr_enable_sink
_intel_psr_enable_sink:                 ## @intel_psr_enable_sink
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_dp_to_i915
	movq	_DP_PSR_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	cmpq	$0, 8(%rax)
	je	LBB0_2
## %bb.1:
	movq	_DP_RECEIVER_ALPM_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DP_ALPM_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_drm_dp_dpcd_writeb
	movq	_DP_PSR_ENABLE_PSR2@GOTPCREL(%rip), %rax
	movq	_DP_PSR_IRQ_HPD_WITH_CRC_ERRORS@GOTPCREL(%rip), %rcx
	orl	(%rax), %ebx
	orl	(%rcx), %ebx
	movl	%ebx, %r15d
	jmp	LBB0_6
LBB0_2:
	xorl	%r15d, %r15d
	cmpq	$0, (%rax)
	je	LBB0_4
## %bb.3:
	movq	_DP_PSR_MAIN_LINK_ACTIVE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
LBB0_4:
	orl	%ebx, %r15d
	movq	%rax, %rdi
	callq	_INTEL_GEN
	cmpl	$8, %eax
	jl	LBB0_6
## %bb.5:
	movq	_DP_PSR_CRC_VERIFICATION@GOTPCREL(%rip), %rax
	orl	(%rax), %r15d
LBB0_6:
	movq	_DP_PSR_EN_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	callq	_drm_dp_dpcd_writeb
	movq	_DP_SET_POWER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DP_SET_POWER_D0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_drm_dp_dpcd_writeb             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DP_PSR_ENABLE,4,2              ## @DP_PSR_ENABLE
	.comm	_DP_RECEIVER_ALPM_CONFIG,4,2    ## @DP_RECEIVER_ALPM_CONFIG
	.comm	_DP_ALPM_ENABLE,4,2             ## @DP_ALPM_ENABLE
	.comm	_DP_PSR_ENABLE_PSR2,4,2         ## @DP_PSR_ENABLE_PSR2
	.comm	_DP_PSR_IRQ_HPD_WITH_CRC_ERRORS,4,2 ## @DP_PSR_IRQ_HPD_WITH_CRC_ERRORS
	.comm	_DP_PSR_MAIN_LINK_ACTIVE,4,2    ## @DP_PSR_MAIN_LINK_ACTIVE
	.comm	_DP_PSR_CRC_VERIFICATION,4,2    ## @DP_PSR_CRC_VERIFICATION
	.comm	_DP_PSR_EN_CFG,4,2              ## @DP_PSR_EN_CFG
	.comm	_DP_SET_POWER,4,2               ## @DP_SET_POWER
	.comm	_DP_SET_POWER_D0,4,2            ## @DP_SET_POWER_D0
	.no_dead_strip	_intel_psr_enable_sink
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_psr_enable_sink
_intel_psr_enable_sink:                 ; @intel_psr_enable_sink
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_dp_to_i915
Lloh0:
	adrp	x8, _DP_PSR_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DP_PSR_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w20, [x8]
	ldr	x8, [x0, #8]
	cbz	x8, LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _DP_RECEIVER_ALPM_CONFIG@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DP_RECEIVER_ALPM_CONFIG@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
Lloh6:
	adrp	x8, _DP_ALPM_ENABLE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DP_ALPM_ENABLE@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_drm_dp_dpcd_writeb
Lloh9:
	adrp	x8, _DP_PSR_ENABLE_PSR2@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DP_PSR_ENABLE_PSR2@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
Lloh12:
	adrp	x9, _DP_PSR_IRQ_HPD_WITH_CRC_ERRORS@GOTPAGE
Lloh13:
	ldr	x9, [x9, _DP_PSR_IRQ_HPD_WITH_CRC_ERRORS@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w8, w20
	orr	w20, w8, w9
	b	LBB0_4
LBB0_2:
	ldr	x8, [x0]
Lloh15:
	adrp	x9, _DP_PSR_MAIN_LINK_ACTIVE@GOTPAGE
Lloh16:
	ldr	x9, [x9, _DP_PSR_MAIN_LINK_ACTIVE@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	cmp	x8, #0
	csel	w8, wzr, w9, eq
	orr	w20, w8, w20
	bl	_INTEL_GEN
	cmp	w0, #8
	b.lt	LBB0_4
; %bb.3:
Lloh18:
	adrp	x8, _DP_PSR_CRC_VERIFICATION@GOTPAGE
Lloh19:
	ldr	x8, [x8, _DP_PSR_CRC_VERIFICATION@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	orr	w20, w8, w20
LBB0_4:
Lloh21:
	adrp	x8, _DP_PSR_EN_CFG@GOTPAGE
Lloh22:
	ldr	x8, [x8, _DP_PSR_EN_CFG@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_drm_dp_dpcd_writeb
Lloh24:
	adrp	x8, _DP_SET_POWER@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DP_SET_POWER@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
Lloh27:
	adrp	x8, _DP_SET_POWER_D0@GOTPAGE
Lloh28:
	ldr	x8, [x8, _DP_SET_POWER_D0@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_drm_dp_dpcd_writeb
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_DP_PSR_ENABLE,4,2              ; @DP_PSR_ENABLE
	.comm	_DP_RECEIVER_ALPM_CONFIG,4,2    ; @DP_RECEIVER_ALPM_CONFIG
	.comm	_DP_ALPM_ENABLE,4,2             ; @DP_ALPM_ENABLE
	.comm	_DP_PSR_ENABLE_PSR2,4,2         ; @DP_PSR_ENABLE_PSR2
	.comm	_DP_PSR_IRQ_HPD_WITH_CRC_ERRORS,4,2 ; @DP_PSR_IRQ_HPD_WITH_CRC_ERRORS
	.comm	_DP_PSR_MAIN_LINK_ACTIVE,4,2    ; @DP_PSR_MAIN_LINK_ACTIVE
	.comm	_DP_PSR_CRC_VERIFICATION,4,2    ; @DP_PSR_CRC_VERIFICATION
	.comm	_DP_PSR_EN_CFG,4,2              ; @DP_PSR_EN_CFG
	.comm	_DP_SET_POWER,4,2               ; @DP_SET_POWER
	.comm	_DP_SET_POWER_D0,4,2            ; @DP_SET_POWER_D0
	.no_dead_strip	_intel_psr_enable_sink
.subsections_via_symbols
