	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_avivo_program_fmt              ## -- Begin function avivo_program_fmt
	.p2align	4, 0x90
_avivo_program_fmt:                     ## @avivo_program_fmt
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_to_radeon_encoder
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_radeon_get_connector_for_encoder
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_to_radeon_connector
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	_radeon_get_monitor_bpc
	jmp	LBB0_3
LBB0_1:
	xorl	%eax, %eax
	movq	_RADEON_FMT_DITHER_DISABLE@GOTPCREL(%rip), %r15
LBB0_3:
	movq	_ATOM_DEVICE_LCD_SUPPORT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%r14)
	je	LBB0_4
LBB0_15:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	testl	%eax, %eax
	je	LBB0_15
## %bb.5:
	movl	(%r15), %ecx
	cmpl	$8, %eax
	je	LBB0_10
## %bb.6:
	xorl	%esi, %esi
	cmpl	$6, %eax
	jne	LBB0_14
## %bb.7:
	movq	_RADEON_FMT_DITHER_ENABLE@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ecx
	jne	LBB0_9
## %bb.8:
	movq	_AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	jmp	LBB0_14
LBB0_10:
	movq	_RADEON_FMT_DITHER_ENABLE@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ecx
	jne	LBB0_12
## %bb.11:
	movq	_AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN@GOTPCREL(%rip), %rax
	movq	_AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH@GOTPCREL(%rip), %rcx
	jmp	LBB0_13
LBB0_9:
	movq	_AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	jmp	LBB0_14
LBB0_12:
	movq	_AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN@GOTPCREL(%rip), %rax
	movq	_AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH@GOTPCREL(%rip), %rcx
LBB0_13:
	movl	(%rcx), %esi
	orl	(%rax), %esi
LBB0_14:
	movl	4(%r14), %eax
	addl	$-128, %eax
	cmpl	$3, %eax
	ja	LBB0_15
## %bb.16:
	cltq
	leaq	l_switch.table.avivo_program_fmt(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	movl	(%rax), %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_FMT_DITHER_DISABLE,4,2  ## @RADEON_FMT_DITHER_DISABLE
	.comm	_ATOM_DEVICE_LCD_SUPPORT,4,2    ## @ATOM_DEVICE_LCD_SUPPORT
	.comm	_RADEON_FMT_DITHER_ENABLE,4,2   ## @RADEON_FMT_DITHER_ENABLE
	.comm	_AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN,4,2 ## @AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN
	.comm	_AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN,4,2 ## @AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN
	.comm	_AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH,4,2 ## @AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH
	.comm	_AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH,4,2 ## @AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH
	.comm	_AVIVO_TMDSA_BIT_DEPTH_CONTROL,4,2 ## @AVIVO_TMDSA_BIT_DEPTH_CONTROL
	.comm	_AVIVO_LVTMA_BIT_DEPTH_CONTROL,4,2 ## @AVIVO_LVTMA_BIT_DEPTH_CONTROL
	.comm	_AVIVO_DVOA_BIT_DEPTH_CONTROL,4,2 ## @AVIVO_DVOA_BIT_DEPTH_CONTROL
	.comm	_AVIVO_DDIA_BIT_DEPTH_CONTROL,4,2 ## @AVIVO_DDIA_BIT_DEPTH_CONTROL
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.avivo_program_fmt
l_switch.table.avivo_program_fmt:
	.quad	_AVIVO_LVTMA_BIT_DEPTH_CONTROL
	.quad	_AVIVO_TMDSA_BIT_DEPTH_CONTROL
	.quad	_AVIVO_DVOA_BIT_DEPTH_CONTROL
	.quad	_AVIVO_DDIA_BIT_DEPTH_CONTROL

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_avivo_program_fmt              ; -- Begin function avivo_program_fmt
	.p2align	2
_avivo_program_fmt:                     ; @avivo_program_fmt
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	bl	_to_radeon_encoder
	mov	x19, x0
	mov	x0, x20
	bl	_radeon_get_connector_for_encoder
	cbz	x0, LBB0_2
; %bb.1:
	mov	x21, x0
	bl	_to_radeon_connector
	mov	x20, x0
	mov	x0, x21
	bl	_radeon_get_monitor_bpc
	b	LBB0_3
LBB0_2:
Lloh0:
	adrp	x20, _RADEON_FMT_DITHER_DISABLE@GOTPAGE
Lloh1:
	ldr	x20, [x20, _RADEON_FMT_DITHER_DISABLE@GOTPAGEOFF]
LBB0_3:
	ldr	w8, [x19]
Lloh2:
	adrp	x9, _ATOM_DEVICE_LCD_SUPPORT@GOTPAGE
Lloh3:
	ldr	x9, [x9, _ATOM_DEVICE_LCD_SUPPORT@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	and	w8, w9, w8
	cmp	w8, #0
	ccmp	w0, #0, #4, eq
	b.ne	LBB0_5
LBB0_4:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_5:
	ldr	w8, [x20]
	cmp	w0, #8
	b.eq	LBB0_9
; %bb.6:
	cmp	w0, #6
	b.ne	LBB0_11
; %bb.7:
Lloh5:
	adrp	x9, _RADEON_FMT_DITHER_ENABLE@GOTPAGE
Lloh6:
	ldr	x9, [x9, _RADEON_FMT_DITHER_ENABLE@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_12
; %bb.8:
Lloh8:
	adrp	x8, _AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN@GOTPAGE
Lloh9:
	ldr	x8, [x8, _AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	b	LBB0_15
LBB0_9:
Lloh11:
	adrp	x9, _RADEON_FMT_DITHER_ENABLE@GOTPAGE
Lloh12:
	ldr	x9, [x9, _RADEON_FMT_DITHER_ENABLE@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_13
; %bb.10:
Lloh14:
	adrp	x8, _AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN@GOTPAGE
Lloh15:
	ldr	x8, [x8, _AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	adrp	x9, _AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH@GOTPAGE
Lloh18:
	ldr	x9, [x9, _AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH@GOTPAGEOFF]
	b	LBB0_14
LBB0_11:
	mov	w1, #0
	b	LBB0_15
LBB0_12:
Lloh19:
	adrp	x8, _AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN@GOTPAGE
Lloh20:
	ldr	x8, [x8, _AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	b	LBB0_15
LBB0_13:
Lloh22:
	adrp	x8, _AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN@GOTPAGE
Lloh23:
	ldr	x8, [x8, _AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
Lloh25:
	adrp	x9, _AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH@GOTPAGE
Lloh26:
	ldr	x9, [x9, _AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH@GOTPAGEOFF]
LBB0_14:
	ldr	w9, [x9]
	orr	w1, w9, w8
LBB0_15:
	ldr	w8, [x19, #4]
	sub	w8, w8, #128
	cmp	w8, #3
	b.hi	LBB0_4
; %bb.16:
Lloh27:
	adrp	x9, l_switch.table.avivo_program_fmt@PAGE
Lloh28:
	add	x9, x9, l_switch.table.avivo_program_fmt@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpAdd	Lloh27, Lloh28
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_FMT_DITHER_DISABLE,4,2  ; @RADEON_FMT_DITHER_DISABLE
	.comm	_ATOM_DEVICE_LCD_SUPPORT,4,2    ; @ATOM_DEVICE_LCD_SUPPORT
	.comm	_RADEON_FMT_DITHER_ENABLE,4,2   ; @RADEON_FMT_DITHER_ENABLE
	.comm	_AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN,4,2 ; @AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN
	.comm	_AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN,4,2 ; @AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN
	.comm	_AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH,4,2 ; @AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH
	.comm	_AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH,4,2 ; @AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH
	.comm	_AVIVO_TMDSA_BIT_DEPTH_CONTROL,4,2 ; @AVIVO_TMDSA_BIT_DEPTH_CONTROL
	.comm	_AVIVO_LVTMA_BIT_DEPTH_CONTROL,4,2 ; @AVIVO_LVTMA_BIT_DEPTH_CONTROL
	.comm	_AVIVO_DVOA_BIT_DEPTH_CONTROL,4,2 ; @AVIVO_DVOA_BIT_DEPTH_CONTROL
	.comm	_AVIVO_DDIA_BIT_DEPTH_CONTROL,4,2 ; @AVIVO_DDIA_BIT_DEPTH_CONTROL
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.avivo_program_fmt
l_switch.table.avivo_program_fmt:
	.quad	_AVIVO_LVTMA_BIT_DEPTH_CONTROL
	.quad	_AVIVO_TMDSA_BIT_DEPTH_CONTROL
	.quad	_AVIVO_DVOA_BIT_DEPTH_CONTROL
	.quad	_AVIVO_DDIA_BIT_DEPTH_CONTROL

.subsections_via_symbols
