	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v10_0_compute_mqd_init
_gfx_v10_0_compute_mqd_init:            ## @gfx_v10_0_compute_mqd_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movq	48(%rdi), %r15
	movq	56(%rdi), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movabsq	$7519406080, %rax               ## imm = 0x1C0310800
	movq	%rax, (%r15)
	pcmpeqd	%xmm0, %xmm0
	movdqu	%xmm0, 8(%r15)
	movl	$3, 24(%r15)
	movl	(%rdi), %edi
	sarl	$8, %edi
	movl	%edi, 28(%r15)
	callq	_upper_32_bits
	movl	%eax, 32(%r15)
	movq	_GC@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_mmCP_HQD_EOP_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	%rax, %r14
	movq	_CP_HQD_EOP_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_EOP_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_GFX10_MEC_HPD_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	leal	3(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$2, %edi
	callq	_order_base_2
                                        ## kill: def $eax killed $eax def $rax
	leal	-1(%rax), %ecx
	movq	%r14, %rdi
	movq	_GC@GOTPCREL(%rip), %r14
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_REG_SET_FIELD
	movq	%rax, 152(%r15)
	movl	(%r14), %edi
	movq	_mmCP_HQD_PQ_DOORBELL_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	cmpq	$0, 40(%r13)
	movq	_CP_HQD_PQ_DOORBELL_CONTROL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	je	LBB0_2
## %bb.1:
	movq	_DOORBELL_OFFSET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	4(%r13), %ecx
	movq	%rax, %rdi
	callq	_REG_SET_FIELD
	movl	(%rbx), %esi
	movq	_DOORBELL_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	movl	$1, %ecx
	callq	_REG_SET_FIELD
	movl	(%rbx), %esi
	movq	_DOORBELL_SOURCE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%rbx), %esi
	movq	_DOORBELL_HIT@GOTPCREL(%rip), %rcx
	jmp	LBB0_3
LBB0_2:
	movq	_DOORBELL_EN@GOTPCREL(%rip), %rcx
LBB0_3:
	movl	(%rcx), %edx
	movq	%rax, %rdi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movq	%rax, 104(%r15)
	movq	$0, 32(%r13)
	movq	$0, 96(%r15)
	pxor	%xmm0, %xmm0
	movdqu	%xmm0, 128(%r15)
	movq	$0, 144(%r15)
	movl	8(%r13), %edi
	movl	%edi, %eax
	andl	$-4, %eax
	movl	%eax, 36(%r15)
	callq	_upper_32_bits
	movl	%eax, 40(%r15)
	movl	(%r14), %edi
	movq	_mmCP_MQD_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_CP_MQD_CONTROL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_VMID@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movq	%rax, 120(%r15)
	movl	12(%r13), %edi
	sarl	$8, %edi
	movl	%edi, 44(%r15)
	callq	_upper_32_bits
	movl	%eax, 48(%r15)
	movl	(%r14), %edi
	movq	_mmCP_HQD_PQ_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	%rax, %r12
	movq	%r13, -48(%rbp)                 ## 8-byte Spill
	movq	_CP_HQD_PQ_CONTROL@GOTPCREL(%rip), %r14
	movl	(%r14), %r13d
	movq	_QUEUE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	16(%rax), %eax
	leal	3(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$2, %edi
	callq	_order_base_2
                                        ## kill: def $eax killed $eax def $rax
	leal	-1(%rax), %ecx
	movq	%r12, %rdi
	movl	%r13d, %esi
	movl	%ebx, %edx
	callq	_REG_SET_FIELD
	movq	%rax, %r13
	movl	(%r14), %r12d
	movq	_RPTR_BLOCK_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_AMDGPU_GPU_PAGE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	leal	3(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$2, %edi
	callq	_order_base_2
                                        ## kill: def $eax killed $eax def $rax
	shll	$8, %eax
	leal	-256(%rax), %ecx
	movq	%r13, %rdi
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_UNORD_DISPATCH@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_TUNNEL_DISPATCH@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	_PRIV_STATE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	movl	$1, %ecx
	callq	_REG_SET_FIELD
	movl	(%r14), %esi
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movq	_KMD_QUEUE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	movl	$1, %ecx
	callq	_REG_SET_FIELD
	movq	%rax, 112(%r15)
	movl	20(%r14), %edi
	shll	$2, %edi
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	addl	(%rbx), %edi
	movl	%edi, %eax
	andl	$-4, %eax
	movl	%eax, 52(%r15)
	callq	_upper_32_bits
	movzwl	%ax, %eax
	movl	%eax, 56(%r15)
	movl	24(%r14), %edi
	shll	$2, %edi
	addl	(%rbx), %edi
	movl	%edi, %eax
	andl	$-4, %eax
	movl	%eax, 60(%r15)
	callq	_upper_32_bits
	movzwl	%ax, %eax
	movl	%eax, 64(%r15)
	cmpq	$0, 40(%r14)
	je	LBB0_4
## %bb.5:
	movq	_GC@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_mmCP_HQD_PQ_DOORBELL_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_CP_HQD_PQ_DOORBELL_CONTROL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_DOORBELL_OFFSET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movl	4(%r14), %ecx
	movq	%rax, %rdi
	callq	_REG_SET_FIELD
	movl	(%rbx), %esi
	movq	_DOORBELL_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	movl	$1, %ecx
	callq	_REG_SET_FIELD
	movl	(%rbx), %esi
	movq	_DOORBELL_SOURCE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movl	(%rbx), %esi
	movq	_DOORBELL_HIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	xorl	%ecx, %ecx
	callq	_REG_SET_FIELD
	movq	%r12, %rbx
	jmp	LBB0_6
LBB0_4:
	movq	_GC@GOTPCREL(%rip), %rbx
	xorl	%eax, %eax
LBB0_6:
	movq	%rax, 104(%r15)
	movq	$0, 32(%r14)
	movl	(%rbx), %edi
	movq	_mmCP_HQD_PQ_RPTR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	%rax, 96(%r15)
	movq	$0, 88(%r15)
	movl	(%rbx), %edi
	movq	_mmCP_HQD_PERSISTENT_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_CP_HQD_PERSISTENT_STATE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_PRELOAD_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	movl	$83, %ecx
	callq	_REG_SET_FIELD
	movq	%rax, 80(%r15)
	movl	(%rbx), %edi
	movq	_mmCP_HQD_IB_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%esi, %esi
	callq	_RREG32_SOC15
	movq	_CP_HQD_IB_CONTROL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_MIN_IB_AVAIL_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rax, %rdi
	movl	$3, %ecx
	callq	_REG_SET_FIELD
	movq	%rax, 72(%r15)
	movl	$1, 68(%r15)
	xorl	%eax, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GC,4,2                         ## @GC
	.comm	_mmCP_HQD_EOP_CONTROL,4,2       ## @mmCP_HQD_EOP_CONTROL
	.comm	_CP_HQD_EOP_CONTROL,4,2         ## @CP_HQD_EOP_CONTROL
	.comm	_EOP_SIZE,4,2                   ## @EOP_SIZE
	.comm	_GFX10_MEC_HPD_SIZE,4,2         ## @GFX10_MEC_HPD_SIZE
	.comm	_mmCP_HQD_PQ_DOORBELL_CONTROL,4,2 ## @mmCP_HQD_PQ_DOORBELL_CONTROL
	.comm	_CP_HQD_PQ_DOORBELL_CONTROL,4,2 ## @CP_HQD_PQ_DOORBELL_CONTROL
	.comm	_DOORBELL_OFFSET,4,2            ## @DOORBELL_OFFSET
	.comm	_DOORBELL_EN,4,2                ## @DOORBELL_EN
	.comm	_DOORBELL_SOURCE,4,2            ## @DOORBELL_SOURCE
	.comm	_DOORBELL_HIT,4,2               ## @DOORBELL_HIT
	.comm	_mmCP_MQD_CONTROL,4,2           ## @mmCP_MQD_CONTROL
	.comm	_CP_MQD_CONTROL,4,2             ## @CP_MQD_CONTROL
	.comm	_VMID,4,2                       ## @VMID
	.comm	_mmCP_HQD_PQ_CONTROL,4,2        ## @mmCP_HQD_PQ_CONTROL
	.comm	_CP_HQD_PQ_CONTROL,4,2          ## @CP_HQD_PQ_CONTROL
	.comm	_QUEUE_SIZE,4,2                 ## @QUEUE_SIZE
	.comm	_RPTR_BLOCK_SIZE,4,2            ## @RPTR_BLOCK_SIZE
	.comm	_AMDGPU_GPU_PAGE_SIZE,4,2       ## @AMDGPU_GPU_PAGE_SIZE
	.comm	_UNORD_DISPATCH,4,2             ## @UNORD_DISPATCH
	.comm	_TUNNEL_DISPATCH,4,2            ## @TUNNEL_DISPATCH
	.comm	_PRIV_STATE,4,2                 ## @PRIV_STATE
	.comm	_KMD_QUEUE,4,2                  ## @KMD_QUEUE
	.comm	_mmCP_HQD_PQ_RPTR,4,2           ## @mmCP_HQD_PQ_RPTR
	.comm	_mmCP_HQD_PERSISTENT_STATE,4,2  ## @mmCP_HQD_PERSISTENT_STATE
	.comm	_CP_HQD_PERSISTENT_STATE,4,2    ## @CP_HQD_PERSISTENT_STATE
	.comm	_PRELOAD_SIZE,4,2               ## @PRELOAD_SIZE
	.comm	_mmCP_HQD_IB_CONTROL,4,2        ## @mmCP_HQD_IB_CONTROL
	.comm	_CP_HQD_IB_CONTROL,4,2          ## @CP_HQD_IB_CONTROL
	.comm	_MIN_IB_AVAIL_SIZE,4,2          ## @MIN_IB_AVAIL_SIZE
	.comm	_ENDIAN_SWAP,4,2                ## @ENDIAN_SWAP
	.no_dead_strip	_gfx_v10_0_compute_mqd_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function gfx_v10_0_compute_mqd_init
lCPI0_0:
	.long	3224438784                      ; 0xc0310800
	.long	1                               ; 0x1
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_gfx_v10_0_compute_mqd_init:            ; @gfx_v10_0_compute_mqd_init
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldp	x23, x25, [x0, #48]
Lloh0:
	adrp	x8, lCPI0_0@PAGE
Lloh1:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	str	d0, [x23]
	mov	x8, #-1
	stp	x8, x8, [x23, #8]
	mov	w8, #3
	ldr	w9, [x0]
	asr	w0, w9, #8
	stp	w8, w0, [x23, #24]
	bl	_upper_32_bits
	str	w0, [x23, #32]
Lloh2:
	adrp	x24, _GC@GOTPAGE
Lloh3:
	ldr	x24, [x24, _GC@GOTPAGEOFF]
	ldr	w0, [x24]
Lloh4:
	adrp	x8, _mmCP_HQD_EOP_CONTROL@GOTPAGE
Lloh5:
	ldr	x8, [x8, _mmCP_HQD_EOP_CONTROL@GOTPAGEOFF]
Lloh6:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	mov	x20, x0
Lloh7:
	adrp	x8, _CP_HQD_EOP_CONTROL@GOTPAGE
Lloh8:
	ldr	x8, [x8, _CP_HQD_EOP_CONTROL@GOTPAGEOFF]
Lloh9:
	ldr	w21, [x8]
Lloh10:
	adrp	x8, _EOP_SIZE@GOTPAGE
Lloh11:
	ldr	x8, [x8, _EOP_SIZE@GOTPAGEOFF]
Lloh12:
	adrp	x9, _GFX10_MEC_HPD_SIZE@GOTPAGE
Lloh13:
	ldr	x9, [x9, _GFX10_MEC_HPD_SIZE@GOTPAGEOFF]
Lloh14:
	ldr	w22, [x8]
Lloh15:
	ldr	w8, [x9]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w0, w8, #2
	bl	_order_base_2
	sub	w3, w0, #1
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	bl	_REG_SET_FIELD
	str	x0, [x23, #152]
	ldr	w0, [x24]
Lloh16:
	adrp	x8, _mmCP_HQD_PQ_DOORBELL_CONTROL@GOTPAGE
Lloh17:
	ldr	x8, [x8, _mmCP_HQD_PQ_DOORBELL_CONTROL@GOTPAGEOFF]
Lloh18:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	ldr	x8, [x19, #40]
Lloh19:
	adrp	x26, _CP_HQD_PQ_DOORBELL_CONTROL@GOTPAGE
Lloh20:
	ldr	x26, [x26, _CP_HQD_PQ_DOORBELL_CONTROL@GOTPAGEOFF]
	ldr	w1, [x26]
Lloh21:
	adrp	x9, _DOORBELL_OFFSET@GOTPAGE
Lloh22:
	ldr	x9, [x9, _DOORBELL_OFFSET@GOTPAGEOFF]
Lloh23:
	adrp	x22, _DOORBELL_EN@GOTPAGE
Lloh24:
	ldr	x22, [x22, _DOORBELL_EN@GOTPAGEOFF]
Lloh25:
	adrp	x21, _DOORBELL_SOURCE@GOTPAGE
Lloh26:
	ldr	x21, [x21, _DOORBELL_SOURCE@GOTPAGEOFF]
Lloh27:
	adrp	x20, _DOORBELL_HIT@GOTPAGE
Lloh28:
	ldr	x20, [x20, _DOORBELL_HIT@GOTPAGEOFF]
	cbz	x8, LBB0_2
; %bb.1:
	ldr	w2, [x9]
	ldr	w3, [x19, #4]
	bl	_REG_SET_FIELD
	ldr	w1, [x26]
	ldr	w2, [x22]
	mov	w3, #1
	bl	_REG_SET_FIELD
	ldr	w1, [x26]
	ldr	w2, [x21]
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x26]
	mov	x28, x20
	ldr	w2, [x20]
	b	LBB0_3
LBB0_2:
	mov	x28, x20
	ldr	w2, [x22]
LBB0_3:
	mov	w3, #0
	bl	_REG_SET_FIELD
	str	xzr, [x19, #32]
	stp	xzr, x0, [x23, #96]
	stp	xzr, xzr, [x23, #136]
	str	xzr, [x23, #128]
	ldr	w0, [x19, #8]
	and	w8, w0, #0xfffffffc
	str	w8, [x23, #36]
	bl	_upper_32_bits
	str	w0, [x23, #40]
	ldr	w0, [x24]
Lloh29:
	adrp	x8, _mmCP_MQD_CONTROL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _mmCP_MQD_CONTROL@GOTPAGEOFF]
Lloh31:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh32:
	adrp	x8, _CP_MQD_CONTROL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _CP_MQD_CONTROL@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
Lloh35:
	adrp	x8, _VMID@GOTPAGE
Lloh36:
	ldr	x8, [x8, _VMID@GOTPAGEOFF]
Lloh37:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	str	x0, [x23, #120]
	ldr	w8, [x19, #12]
	asr	w0, w8, #8
	str	w0, [x23, #44]
	bl	_upper_32_bits
	str	w0, [x23, #48]
	ldr	w0, [x24]
Lloh38:
	adrp	x8, _mmCP_HQD_PQ_CONTROL@GOTPAGE
Lloh39:
	ldr	x8, [x8, _mmCP_HQD_PQ_CONTROL@GOTPAGEOFF]
Lloh40:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	mov	x20, x0
Lloh41:
	adrp	x27, _CP_HQD_PQ_CONTROL@GOTPAGE
Lloh42:
	ldr	x27, [x27, _CP_HQD_PQ_CONTROL@GOTPAGEOFF]
	ldr	w21, [x27]
Lloh43:
	adrp	x8, _QUEUE_SIZE@GOTPAGE
Lloh44:
	ldr	x8, [x8, _QUEUE_SIZE@GOTPAGEOFF]
Lloh45:
	ldr	w22, [x8]
	ldr	w8, [x19, #16]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w0, w8, #2
	bl	_order_base_2
	sub	w3, w0, #1
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	bl	_REG_SET_FIELD
	mov	x20, x0
	ldr	w21, [x27]
Lloh46:
	adrp	x8, _RPTR_BLOCK_SIZE@GOTPAGE
Lloh47:
	ldr	x8, [x8, _RPTR_BLOCK_SIZE@GOTPAGEOFF]
Lloh48:
	adrp	x9, _AMDGPU_GPU_PAGE_SIZE@GOTPAGE
Lloh49:
	ldr	x9, [x9, _AMDGPU_GPU_PAGE_SIZE@GOTPAGEOFF]
Lloh50:
	ldr	w22, [x8]
Lloh51:
	ldr	w8, [x9]
	add	w9, w8, #3
	cmp	w8, #0
	csel	w8, w9, w8, lt
	asr	w0, w8, #2
	bl	_order_base_2
	lsl	w8, w0, #8
	sub	w3, w8, #256
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	bl	_REG_SET_FIELD
	ldr	w1, [x27]
Lloh52:
	adrp	x8, _UNORD_DISPATCH@GOTPAGE
Lloh53:
	ldr	x8, [x8, _UNORD_DISPATCH@GOTPAGEOFF]
Lloh54:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x27]
Lloh55:
	adrp	x8, _TUNNEL_DISPATCH@GOTPAGE
Lloh56:
	ldr	x8, [x8, _TUNNEL_DISPATCH@GOTPAGEOFF]
Lloh57:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x27]
Lloh58:
	adrp	x8, _PRIV_STATE@GOTPAGE
Lloh59:
	ldr	x8, [x8, _PRIV_STATE@GOTPAGEOFF]
Lloh60:
	ldr	w2, [x8]
	mov	w20, #1
	mov	w3, #1
	bl	_REG_SET_FIELD
	ldr	w1, [x27]
Lloh61:
	adrp	x8, _KMD_QUEUE@GOTPAGE
Lloh62:
	ldr	x8, [x8, _KMD_QUEUE@GOTPAGEOFF]
Lloh63:
	ldr	w2, [x8]
	mov	w3, #1
	bl	_REG_SET_FIELD
	str	x0, [x23, #112]
	ldr	w8, [x25]
	ldr	w9, [x19, #20]
	add	w0, w8, w9, lsl #2
	and	w8, w0, #0xfffffffc
	str	w8, [x23, #52]
	bl	_upper_32_bits
	and	w8, w0, #0xffff
	ldr	w9, [x25]
	ldr	w10, [x19, #24]
	add	w0, w9, w10, lsl #2
	and	w9, w0, #0xfffffffc
	stp	w8, w9, [x23, #56]
	bl	_upper_32_bits
	and	w8, w0, #0xffff
	str	w8, [x23, #64]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_5
; %bb.4:
	ldr	w0, [x24]
Lloh64:
	adrp	x8, _mmCP_HQD_PQ_DOORBELL_CONTROL@GOTPAGE
Lloh65:
	ldr	x8, [x8, _mmCP_HQD_PQ_DOORBELL_CONTROL@GOTPAGEOFF]
Lloh66:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	ldr	w1, [x26]
Lloh67:
	adrp	x8, _DOORBELL_OFFSET@GOTPAGE
Lloh68:
	ldr	x8, [x8, _DOORBELL_OFFSET@GOTPAGEOFF]
Lloh69:
	ldr	w2, [x8]
	ldr	w3, [x19, #4]
	bl	_REG_SET_FIELD
	ldr	w1, [x26]
Lloh70:
	adrp	x8, _DOORBELL_EN@GOTPAGE
Lloh71:
	ldr	x8, [x8, _DOORBELL_EN@GOTPAGEOFF]
Lloh72:
	ldr	w2, [x8]
	mov	w3, #1
	bl	_REG_SET_FIELD
	ldr	w1, [x26]
Lloh73:
	adrp	x8, _DOORBELL_SOURCE@GOTPAGE
Lloh74:
	ldr	x8, [x8, _DOORBELL_SOURCE@GOTPAGEOFF]
Lloh75:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_REG_SET_FIELD
	ldr	w1, [x26]
	ldr	w2, [x28]
	mov	w3, #0
	bl	_REG_SET_FIELD
	b	LBB0_6
LBB0_5:
	mov	x0, #0
LBB0_6:
	str	x0, [x23, #104]
	str	xzr, [x19, #32]
	ldr	w0, [x24]
Lloh76:
	adrp	x8, _mmCP_HQD_PQ_RPTR@GOTPAGE
Lloh77:
	ldr	x8, [x8, _mmCP_HQD_PQ_RPTR@GOTPAGEOFF]
Lloh78:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
	stp	xzr, x0, [x23, #88]
	ldr	w0, [x24]
Lloh79:
	adrp	x8, _mmCP_HQD_PERSISTENT_STATE@GOTPAGE
Lloh80:
	ldr	x8, [x8, _mmCP_HQD_PERSISTENT_STATE@GOTPAGEOFF]
Lloh81:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh82:
	adrp	x8, _CP_HQD_PERSISTENT_STATE@GOTPAGE
Lloh83:
	ldr	x8, [x8, _CP_HQD_PERSISTENT_STATE@GOTPAGEOFF]
Lloh84:
	ldr	w1, [x8]
Lloh85:
	adrp	x8, _PRELOAD_SIZE@GOTPAGE
Lloh86:
	ldr	x8, [x8, _PRELOAD_SIZE@GOTPAGEOFF]
Lloh87:
	ldr	w2, [x8]
	mov	w3, #83
	bl	_REG_SET_FIELD
	str	x0, [x23, #80]
	ldr	w0, [x24]
Lloh88:
	adrp	x8, _mmCP_HQD_IB_CONTROL@GOTPAGE
Lloh89:
	ldr	x8, [x8, _mmCP_HQD_IB_CONTROL@GOTPAGEOFF]
Lloh90:
	ldr	w2, [x8]
	mov	w1, #0
	bl	_RREG32_SOC15
Lloh91:
	adrp	x8, _CP_HQD_IB_CONTROL@GOTPAGE
Lloh92:
	ldr	x8, [x8, _CP_HQD_IB_CONTROL@GOTPAGEOFF]
Lloh93:
	ldr	w1, [x8]
Lloh94:
	adrp	x8, _MIN_IB_AVAIL_SIZE@GOTPAGE
Lloh95:
	ldr	x8, [x8, _MIN_IB_AVAIL_SIZE@GOTPAGEOFF]
Lloh96:
	ldr	w2, [x8]
	mov	w3, #3
	bl	_REG_SET_FIELD
	str	x0, [x23, #72]
	str	w20, [x23, #68]
	mov	w0, #0
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh14
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdr	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh50
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.cfi_endproc
                                        ; -- End function
	.comm	_GC,4,2                         ; @GC
	.comm	_mmCP_HQD_EOP_CONTROL,4,2       ; @mmCP_HQD_EOP_CONTROL
	.comm	_CP_HQD_EOP_CONTROL,4,2         ; @CP_HQD_EOP_CONTROL
	.comm	_EOP_SIZE,4,2                   ; @EOP_SIZE
	.comm	_GFX10_MEC_HPD_SIZE,4,2         ; @GFX10_MEC_HPD_SIZE
	.comm	_mmCP_HQD_PQ_DOORBELL_CONTROL,4,2 ; @mmCP_HQD_PQ_DOORBELL_CONTROL
	.comm	_CP_HQD_PQ_DOORBELL_CONTROL,4,2 ; @CP_HQD_PQ_DOORBELL_CONTROL
	.comm	_DOORBELL_OFFSET,4,2            ; @DOORBELL_OFFSET
	.comm	_DOORBELL_EN,4,2                ; @DOORBELL_EN
	.comm	_DOORBELL_SOURCE,4,2            ; @DOORBELL_SOURCE
	.comm	_DOORBELL_HIT,4,2               ; @DOORBELL_HIT
	.comm	_mmCP_MQD_CONTROL,4,2           ; @mmCP_MQD_CONTROL
	.comm	_CP_MQD_CONTROL,4,2             ; @CP_MQD_CONTROL
	.comm	_VMID,4,2                       ; @VMID
	.comm	_mmCP_HQD_PQ_CONTROL,4,2        ; @mmCP_HQD_PQ_CONTROL
	.comm	_CP_HQD_PQ_CONTROL,4,2          ; @CP_HQD_PQ_CONTROL
	.comm	_QUEUE_SIZE,4,2                 ; @QUEUE_SIZE
	.comm	_RPTR_BLOCK_SIZE,4,2            ; @RPTR_BLOCK_SIZE
	.comm	_AMDGPU_GPU_PAGE_SIZE,4,2       ; @AMDGPU_GPU_PAGE_SIZE
	.comm	_UNORD_DISPATCH,4,2             ; @UNORD_DISPATCH
	.comm	_TUNNEL_DISPATCH,4,2            ; @TUNNEL_DISPATCH
	.comm	_PRIV_STATE,4,2                 ; @PRIV_STATE
	.comm	_KMD_QUEUE,4,2                  ; @KMD_QUEUE
	.comm	_mmCP_HQD_PQ_RPTR,4,2           ; @mmCP_HQD_PQ_RPTR
	.comm	_mmCP_HQD_PERSISTENT_STATE,4,2  ; @mmCP_HQD_PERSISTENT_STATE
	.comm	_CP_HQD_PERSISTENT_STATE,4,2    ; @CP_HQD_PERSISTENT_STATE
	.comm	_PRELOAD_SIZE,4,2               ; @PRELOAD_SIZE
	.comm	_mmCP_HQD_IB_CONTROL,4,2        ; @mmCP_HQD_IB_CONTROL
	.comm	_CP_HQD_IB_CONTROL,4,2          ; @CP_HQD_IB_CONTROL
	.comm	_MIN_IB_AVAIL_SIZE,4,2          ; @MIN_IB_AVAIL_SIZE
	.comm	_ENDIAN_SWAP,4,2                ; @ENDIAN_SWAP
	.no_dead_strip	_gfx_v10_0_compute_mqd_init
.subsections_via_symbols
