	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_dp_link_training_clock_recovery
_intel_dp_link_training_clock_recovery: ## @intel_dp_link_training_clock_recovery
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	movq	40(%rdi), %rax
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	*%rax
LBB0_2:
	movl	32(%rbx), %esi
	leaq	-60(%rbp), %rdx
	leaq	-64(%rbp), %rcx
	movq	%rbx, %rdi
	callq	_intel_dp_compute_rate
	movl	-60(%rbp), %esi
	testl	%esi, %esi
	je	LBB0_4
## %bb.3:
	leaq	L_.str(%rip), %rdi
	jmp	LBB0_5
LBB0_4:
	movl	-64(%rbp), %esi
	leaq	L_.str.1(%rip), %rdi
LBB0_5:
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movl	-60(%rbp), %eax
	movl	%eax, -56(%rbp)
	movq	%rbx, %rax
	movl	(%rbx), %ebx
	movl	%ebx, -52(%rbp)
	movq	%rax, %r14
	movq	8(%rax), %rdi
	callq	_drm_dp_enhanced_frame_cap
	testq	%rax, %rax
	je	LBB0_7
## %bb.6:
	movq	_DP_LANE_COUNT_ENHANCED_FRAME_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	%ebx, -52(%rbp)
LBB0_7:
	movq	%r14, %rbx
	addq	$28, %r14
	movq	_DP_LINK_BW_SET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-56(%rbp), %rdx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	_drm_dp_dpcd_write
	cmpl	$0, -60(%rbp)
	jne	LBB0_9
## %bb.8:
	movq	_DP_LINK_RATE_SET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-64(%rbp), %rdx
	movq	%r14, %rdi
	movl	$1, %ecx
	callq	_drm_dp_dpcd_write
LBB0_9:
	movl	$0, -56(%rbp)
	movq	_DP_SET_ANSI_8B10B@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)
	movq	_DP_DOWNSPREAD_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-56(%rbp), %rdx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	_drm_dp_dpcd_write
	movq	_DP_PORT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 24(%rbx)
	movq	_DP_TRAINING_PATTERN_1@GOTPCREL(%rip), %rax
	movq	_DP_LINK_SCRAMBLING_DISABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_intel_dp_reset_link_train
	testl	%eax, %eax
	je	LBB0_10
## %bb.11:
	movq	8(%rbx), %rax
	movq	_DP_DPCD_REV@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	(%rax,%rcx,8), %rax
	movq	_DP_DPCD_REV_14@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movl	$80, %eax
	movl	$10, %ecx
	cmovll	%eax, %ecx
	xorl	%r12d, %r12d
	movl	%ecx, -68(%rbp)                 ## 4-byte Spill
	movl	$1, %r13d
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movl	%ecx, -72(%rbp)                 ## 4-byte Spill
	movq	%rsp, %r14
	movq	_DP_LINK_STATUS_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	shlq	$2, %rax
	callq	____chkstk_darwin
	addq	$15, %rax
	andq	$-16, %rax
	subq	%rax, %rsp
	movq	%rsp, %r15
	movq	8(%rbx), %rdi
	callq	_drm_dp_link_train_clock_recovery_delay
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_intel_dp_get_link_status
	testl	%eax, %eax
	je	LBB0_13
## %bb.14:                              ##   in Loop: Header=BB0_12 Depth=1
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_drm_dp_clock_recovery_ok
	testq	%rax, %rax
	jne	LBB0_15
## %bb.16:                              ##   in Loop: Header=BB0_12 Depth=1
	cmpl	$5, %r13d
	je	LBB0_17
## %bb.19:                              ##   in Loop: Header=BB0_12 Depth=1
	testl	%r12d, %r12d
	jne	LBB0_20
## %bb.21:                              ##   in Loop: Header=BB0_12 Depth=1
	movq	%r14, -80(%rbp)                 ## 8-byte Spill
	movq	16(%rbx), %rax
	movl	(%rax), %r12d
	movq	%rbx, %r14
	movq	_DP_TRAIN_VOLTAGE_SWING_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_intel_get_adjust_train
	movq	%r14, %rdi
	callq	_intel_dp_update_link_train
	testl	%eax, %eax
	je	LBB0_22
## %bb.23:                              ##   in Loop: Header=BB0_12 Depth=1
	andl	%r12d, %ebx
	movq	16(%r14), %rax
	movq	_DP_TRAIN_VOLTAGE_SWING_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	(%rax), %ecx
	incl	%r13d
	cmpl	%ebx, %ecx
	movl	$1, %eax
	cmovnel	%eax, %r13d
	movq	%r14, %rdi
	callq	_intel_dp_link_max_vswing_reached
	xorl	%r12d, %r12d
	testq	%rax, %rax
	setne	%r12b
	movq	-80(%rbp), %rsp                 ## 8-byte Reload
	movl	-72(%rbp), %ecx                 ## 4-byte Reload
	decl	%ecx
	movq	%r14, %rbx
	jne	LBB0_12
## %bb.24:
	leaq	L_.str.8(%rip), %rdi
	xorl	%ebx, %ebx
	movl	-68(%rbp), %esi                 ## 4-byte Reload
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_25
LBB0_10:
	leaq	L_.str.2(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_ERROR
	jmp	LBB0_25
LBB0_13:
	leaq	L_.str.3(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_ERROR
	movq	%r14, %rsp
	jmp	LBB0_25
LBB0_15:
	leaq	L_.str.4(%rip), %rdi
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movl	$1, %ebx
	movq	%r14, %rsp
	jmp	LBB0_25
LBB0_17:
	leaq	L_.str.5(%rip), %rdi
	jmp	LBB0_18
LBB0_20:
	leaq	L_.str.6(%rip), %rdi
LBB0_18:
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_DEBUG_KMS
	movq	%r14, %rsp
	jmp	LBB0_25
LBB0_22:
	leaq	L_.str.7(%rip), %rdi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_DRM_ERROR
	movq	-80(%rbp), %rsp                 ## 8-byte Reload
LBB0_25:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_27
## %bb.26:
	movl	%ebx, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_27:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Using LINK_BW_SET value %02x\n"

L_.str.1:                               ## @.str.1
	.asciz	"Using LINK_RATE_SET value %02x\n"

	.comm	_DP_LANE_COUNT_ENHANCED_FRAME_EN,4,2 ## @DP_LANE_COUNT_ENHANCED_FRAME_EN
	.comm	_DP_LINK_BW_SET,4,2             ## @DP_LINK_BW_SET
	.comm	_DP_LINK_RATE_SET,4,2           ## @DP_LINK_RATE_SET
	.comm	_DP_SET_ANSI_8B10B,4,2          ## @DP_SET_ANSI_8B10B
	.comm	_DP_DOWNSPREAD_CTRL,4,2         ## @DP_DOWNSPREAD_CTRL
	.comm	_DP_PORT_EN,4,2                 ## @DP_PORT_EN
	.comm	_DP_TRAINING_PATTERN_1,4,2      ## @DP_TRAINING_PATTERN_1
	.comm	_DP_LINK_SCRAMBLING_DISABLE,4,2 ## @DP_LINK_SCRAMBLING_DISABLE
L_.str.2:                               ## @.str.2
	.asciz	"failed to enable link training\n"

	.comm	_DP_DPCD_REV,8,3                ## @DP_DPCD_REV
	.comm	_DP_DPCD_REV_14,8,3             ## @DP_DPCD_REV_14
	.comm	_DP_LINK_STATUS_SIZE,4,2        ## @DP_LINK_STATUS_SIZE
L_.str.3:                               ## @.str.3
	.asciz	"failed to get link status\n"

L_.str.4:                               ## @.str.4
	.asciz	"clock recovery OK\n"

L_.str.5:                               ## @.str.5
	.asciz	"Same voltage tried 5 times\n"

L_.str.6:                               ## @.str.6
	.asciz	"Max Voltage Swing reached\n"

	.comm	_DP_TRAIN_VOLTAGE_SWING_MASK,4,2 ## @DP_TRAIN_VOLTAGE_SWING_MASK
L_.str.7:                               ## @.str.7
	.asciz	"failed to update link training\n"

L_.str.8:                               ## @.str.8
	.asciz	"Failed clock recovery %d times, giving up!\n"

	.no_dead_strip	_intel_dp_link_training_clock_recovery
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_dp_link_training_clock_recovery
_intel_dp_link_training_clock_recovery: ; @intel_dp_link_training_clock_recovery
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	sub	sp, sp, #32
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	stur	x8, [x29, #-88]
	ldr	x8, [x0, #40]
	cbz	x8, LBB0_2
; %bb.1:
	mov	x0, x19
	blr	x8
LBB0_2:
	ldr	w1, [x19, #32]
	sub	x2, x29, #100
	sub	x3, x29, #104
	mov	x0, x19
	bl	_intel_dp_compute_rate
	ldur	w8, [x29, #-100]
	cbz	w8, LBB0_4
; %bb.3:
	str	x8, [sp, #-16]!
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	b	LBB0_5
LBB0_4:
	ldur	w8, [x29, #-104]
	str	x8, [sp, #-16]!
Lloh5:
	adrp	x0, l_.str.1@PAGE
Lloh6:
	add	x0, x0, l_.str.1@PAGEOFF
LBB0_5:
	bl	_DRM_DEBUG_KMS
	add	sp, sp, #16
	ldur	w8, [x29, #-100]
	ldr	w20, [x19]
	stp	w8, w20, [x29, #-96]
	ldr	x0, [x19, #8]
	bl	_drm_dp_enhanced_frame_cap
	cbz	x0, LBB0_7
; %bb.6:
Lloh7:
	adrp	x8, _DP_LANE_COUNT_ENHANCED_FRAME_EN@GOTPAGE
Lloh8:
	ldr	x8, [x8, _DP_LANE_COUNT_ENHANCED_FRAME_EN@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	orr	w8, w20, w8
	stur	w8, [x29, #-92]
LBB0_7:
	add	x20, x19, #28
Lloh10:
	adrp	x8, _DP_LINK_BW_SET@GOTPAGE
Lloh11:
	ldr	x8, [x8, _DP_LINK_BW_SET@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	sub	x2, x29, #96
	mov	x0, x20
	mov	w3, #2
	bl	_drm_dp_dpcd_write
	ldur	w8, [x29, #-100]
	cbnz	w8, LBB0_9
; %bb.8:
Lloh13:
	adrp	x8, _DP_LINK_RATE_SET@GOTPAGE
Lloh14:
	ldr	x8, [x8, _DP_LINK_RATE_SET@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	sub	x2, x29, #104
	mov	x0, x20
	mov	w3, #1
	bl	_drm_dp_dpcd_write
LBB0_9:
Lloh16:
	adrp	x8, _DP_SET_ANSI_8B10B@GOTPAGE
Lloh17:
	ldr	x8, [x8, _DP_SET_ANSI_8B10B@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	stp	wzr, w8, [x29, #-96]
Lloh19:
	adrp	x8, _DP_DOWNSPREAD_CTRL@GOTPAGE
Lloh20:
	ldr	x8, [x8, _DP_DOWNSPREAD_CTRL@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	sub	x2, x29, #96
	mov	x0, x20
	mov	w3, #2
	bl	_drm_dp_dpcd_write
Lloh22:
	adrp	x8, _DP_PORT_EN@GOTPAGE
Lloh23:
	ldr	x8, [x8, _DP_PORT_EN@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	ldr	w9, [x19, #24]
	orr	w8, w9, w8
Lloh25:
	adrp	x9, _DP_TRAINING_PATTERN_1@GOTPAGE
Lloh26:
	ldr	x9, [x9, _DP_TRAINING_PATTERN_1@GOTPAGEOFF]
	str	w8, [x19, #24]
Lloh27:
	ldr	w8, [x9]
Lloh28:
	adrp	x9, _DP_LINK_SCRAMBLING_DISABLE@GOTPAGE
Lloh29:
	ldr	x9, [x9, _DP_LINK_SCRAMBLING_DISABLE@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	orr	w1, w9, w8
	mov	x0, x19
	bl	_intel_dp_reset_link_train
	cbz	w0, LBB0_18
; %bb.10:
	mov	w28, #0
Lloh31:
	adrp	x8, _DP_DPCD_REV@GOTPAGE
Lloh32:
	ldr	x8, [x8, _DP_DPCD_REV@GOTPAGEOFF]
	ldr	x9, [x19, #8]
Lloh33:
	ldr	x8, [x8]
	ldr	x8, [x9, x8, lsl #3]
Lloh34:
	adrp	x9, _DP_DPCD_REV_14@GOTPAGE
Lloh35:
	ldr	x9, [x9, _DP_DPCD_REV_14@GOTPAGEOFF]
Lloh36:
	ldr	x9, [x9]
	cmp	x8, x9
	mov	w8, #10
	mov	w9, #80
	csel	w8, w9, w8, lt
	mov	w23, #1
Lloh37:
	adrp	x24, _DP_LINK_STATUS_SIZE@GOTPAGE
Lloh38:
	ldr	x24, [x24, _DP_LINK_STATUS_SIZE@GOTPAGEOFF]
Lloh39:
	adrp	x25, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGE
Lloh40:
	ldr	x25, [x25, _DP_TRAIN_VOLTAGE_SWING_MASK@GOTPAGEOFF]
	stur	x8, [x29, #-112]                ; 8-byte Folded Spill
	mov	x26, x8
	mov	w27, #1
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	mov	x21, sp
	ldr	w8, [x24]
	lsl	x8, x8, #2
	mov	x9, x8
Lloh41:
	adrp	x16, ___chkstk_darwin@GOTPAGE
Lloh42:
	ldr	x16, [x16, ___chkstk_darwin@GOTPAGEOFF]
	blr	x16
	mov	x9, sp
	add	x8, x8, #15
	and	x8, x8, #0x7fffffff0
	sub	x20, x9, x8
	mov	sp, x20
	ldr	x0, [x19, #8]
	bl	_drm_dp_link_train_clock_recovery_delay
	mov	x0, x19
	mov	x1, x20
	bl	_intel_dp_get_link_status
	cbz	w0, LBB0_19
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=1
	ldr	w1, [x19]
	mov	x0, x20
	bl	_drm_dp_clock_recovery_ok
	cbnz	x0, LBB0_20
; %bb.13:                               ;   in Loop: Header=BB0_11 Depth=1
	cmp	w27, #5
	b.eq	LBB0_21
; %bb.14:                               ;   in Loop: Header=BB0_11 Depth=1
	cbnz	w28, LBB0_22
; %bb.15:                               ;   in Loop: Header=BB0_11 Depth=1
	ldr	x8, [x19, #16]
	ldr	w28, [x8]
	ldr	w22, [x25]
	mov	x0, x19
	mov	x1, x20
	bl	_intel_get_adjust_train
	mov	x0, x19
	bl	_intel_dp_update_link_train
	cbz	w0, LBB0_24
; %bb.16:                               ;   in Loop: Header=BB0_11 Depth=1
	and	w8, w22, w28
	ldr	x9, [x19, #16]
	ldr	w9, [x9]
	ldr	w10, [x25]
	and	w9, w10, w9
	cmp	w9, w8
	csinc	w27, w23, w27, ne
	mov	x0, x19
	bl	_intel_dp_link_max_vswing_reached
	cmp	x0, #0
	cset	w28, ne
	mov	sp, x21
	subs	w26, w26, #1
	b.ne	LBB0_11
; %bb.17:
	ldur	x8, [x29, #-112]                ; 8-byte Folded Reload
	str	x8, [sp, #-16]!
Lloh43:
	adrp	x0, l_.str.8@PAGE
Lloh44:
	add	x0, x0, l_.str.8@PAGEOFF
	bl	_DRM_ERROR
	add	sp, sp, #16
	b	LBB0_27
LBB0_18:
Lloh45:
	adrp	x0, l_.str.2@PAGE
Lloh46:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_27
LBB0_19:
Lloh47:
	adrp	x0, l_.str.3@PAGE
Lloh48:
	add	x0, x0, l_.str.3@PAGEOFF
	b	LBB0_25
LBB0_20:
Lloh49:
	adrp	x0, l_.str.4@PAGE
Lloh50:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_DRM_DEBUG_KMS
	mov	w0, #1
	mov	sp, x21
	b	LBB0_28
LBB0_21:
Lloh51:
	adrp	x0, l_.str.5@PAGE
Lloh52:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_23
LBB0_22:
Lloh53:
	adrp	x0, l_.str.6@PAGE
Lloh54:
	add	x0, x0, l_.str.6@PAGEOFF
LBB0_23:
	bl	_DRM_DEBUG_KMS
	b	LBB0_26
LBB0_24:
Lloh55:
	adrp	x0, l_.str.7@PAGE
Lloh56:
	add	x0, x0, l_.str.7@PAGEOFF
LBB0_25:
	bl	_DRM_ERROR
LBB0_26:
	mov	sp, x21
LBB0_27:
	mov	w0, #0
LBB0_28:
	ldur	x8, [x29, #-88]
Lloh57:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh58:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh59:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_30
; %bb.29:
	sub	sp, x29, #80
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_30:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpAdd	Lloh43, Lloh44
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpAdd	Lloh47, Lloh48
	.loh AdrpAdd	Lloh49, Lloh50
	.loh AdrpAdd	Lloh51, Lloh52
	.loh AdrpAdd	Lloh53, Lloh54
	.loh AdrpAdd	Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Using LINK_BW_SET value %02x\n"

l_.str.1:                               ; @.str.1
	.asciz	"Using LINK_RATE_SET value %02x\n"

	.comm	_DP_LANE_COUNT_ENHANCED_FRAME_EN,4,2 ; @DP_LANE_COUNT_ENHANCED_FRAME_EN
	.comm	_DP_LINK_BW_SET,4,2             ; @DP_LINK_BW_SET
	.comm	_DP_LINK_RATE_SET,4,2           ; @DP_LINK_RATE_SET
	.comm	_DP_SET_ANSI_8B10B,4,2          ; @DP_SET_ANSI_8B10B
	.comm	_DP_DOWNSPREAD_CTRL,4,2         ; @DP_DOWNSPREAD_CTRL
	.comm	_DP_PORT_EN,4,2                 ; @DP_PORT_EN
	.comm	_DP_TRAINING_PATTERN_1,4,2      ; @DP_TRAINING_PATTERN_1
	.comm	_DP_LINK_SCRAMBLING_DISABLE,4,2 ; @DP_LINK_SCRAMBLING_DISABLE
l_.str.2:                               ; @.str.2
	.asciz	"failed to enable link training\n"

	.comm	_DP_DPCD_REV,8,3                ; @DP_DPCD_REV
	.comm	_DP_DPCD_REV_14,8,3             ; @DP_DPCD_REV_14
	.comm	_DP_LINK_STATUS_SIZE,4,2        ; @DP_LINK_STATUS_SIZE
l_.str.3:                               ; @.str.3
	.asciz	"failed to get link status\n"

l_.str.4:                               ; @.str.4
	.asciz	"clock recovery OK\n"

l_.str.5:                               ; @.str.5
	.asciz	"Same voltage tried 5 times\n"

l_.str.6:                               ; @.str.6
	.asciz	"Max Voltage Swing reached\n"

	.comm	_DP_TRAIN_VOLTAGE_SWING_MASK,4,2 ; @DP_TRAIN_VOLTAGE_SWING_MASK
l_.str.7:                               ; @.str.7
	.asciz	"failed to update link training\n"

l_.str.8:                               ; @.str.8
	.asciz	"Failed clock recovery %d times, giving up!\n"

	.no_dead_strip	_intel_dp_link_training_clock_recovery
.subsections_via_symbols
