	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_smu7_powergate_uvd             ## -- Begin function smu7_powergate_uvd
	.p2align	4, 0x90
_smu7_powergate_uvd:                    ## @smu7_powergate_uvd
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %rax
	movl	%esi, (%rax)
	testl	%esi, %esi
	je	LBB0_2
## %bb.1:
	movl	(%rbx), %edi
	movq	_AMD_IP_BLOCK_TYPE_UVD@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_AMD_PG_STATE_GATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_amdgpu_device_ip_set_powergating_state
	movl	(%rbx), %edi
	movl	(%r14), %esi
	movq	_AMD_CG_STATE_GATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_amdgpu_device_ip_set_clockgating_state
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_smu7_update_uvd_dpm
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_smu7_powerdown_uvd             ## TAILCALL
LBB0_2:
	movq	%rbx, %rdi
	callq	_smu7_powerup_uvd
	movl	(%rbx), %edi
	movq	_AMD_IP_BLOCK_TYPE_UVD@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_AMD_CG_STATE_UNGATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_amdgpu_device_ip_set_clockgating_state
	movl	(%rbx), %edi
	movl	(%r14), %esi
	movq	_AMD_PG_STATE_UNGATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_amdgpu_device_ip_set_powergating_state
	movq	%rbx, %rdi
	xorl	%esi, %esi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_smu7_update_uvd_dpm            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_IP_BLOCK_TYPE_UVD,4,2      ## @AMD_IP_BLOCK_TYPE_UVD
	.comm	_AMD_PG_STATE_GATE,4,2          ## @AMD_PG_STATE_GATE
	.comm	_AMD_CG_STATE_GATE,4,2          ## @AMD_CG_STATE_GATE
	.comm	_AMD_CG_STATE_UNGATE,4,2        ## @AMD_CG_STATE_UNGATE
	.comm	_AMD_PG_STATE_UNGATE,4,2        ## @AMD_PG_STATE_UNGATE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_smu7_powergate_uvd             ; -- Begin function smu7_powergate_uvd
	.p2align	2
_smu7_powergate_uvd:                    ; @smu7_powergate_uvd
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0, #8]
	str	w1, [x8]
	cbz	w1, LBB0_2
; %bb.1:
	ldr	w0, [x19]
Lloh0:
	adrp	x20, _AMD_IP_BLOCK_TYPE_UVD@GOTPAGE
Lloh1:
	ldr	x20, [x20, _AMD_IP_BLOCK_TYPE_UVD@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x8, _AMD_PG_STATE_GATE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _AMD_PG_STATE_GATE@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	bl	_amdgpu_device_ip_set_powergating_state
	ldr	w0, [x19]
	ldr	w1, [x20]
Lloh5:
	adrp	x8, _AMD_CG_STATE_GATE@GOTPAGE
Lloh6:
	ldr	x8, [x8, _AMD_CG_STATE_GATE@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	bl	_amdgpu_device_ip_set_clockgating_state
	mov	x0, x19
	mov	w1, #1
	bl	_smu7_update_uvd_dpm
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_smu7_powerdown_uvd
LBB0_2:
	mov	x0, x19
	bl	_smu7_powerup_uvd
	ldr	w0, [x19]
Lloh8:
	adrp	x20, _AMD_IP_BLOCK_TYPE_UVD@GOTPAGE
Lloh9:
	ldr	x20, [x20, _AMD_IP_BLOCK_TYPE_UVD@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh10:
	adrp	x8, _AMD_CG_STATE_UNGATE@GOTPAGE
Lloh11:
	ldr	x8, [x8, _AMD_CG_STATE_UNGATE@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
	bl	_amdgpu_device_ip_set_clockgating_state
	ldr	w0, [x19]
	ldr	w1, [x20]
Lloh13:
	adrp	x8, _AMD_PG_STATE_UNGATE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _AMD_PG_STATE_UNGATE@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	bl	_amdgpu_device_ip_set_powergating_state
	mov	x0, x19
	mov	w1, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_smu7_update_uvd_dpm
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_IP_BLOCK_TYPE_UVD,4,2      ; @AMD_IP_BLOCK_TYPE_UVD
	.comm	_AMD_PG_STATE_GATE,4,2          ; @AMD_PG_STATE_GATE
	.comm	_AMD_CG_STATE_GATE,4,2          ; @AMD_CG_STATE_GATE
	.comm	_AMD_CG_STATE_UNGATE,4,2        ; @AMD_CG_STATE_UNGATE
	.comm	_AMD_PG_STATE_UNGATE,4,2        ; @AMD_PG_STATE_UNGATE
.subsections_via_symbols
