	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdma_v4_0_hw_fini
_sdma_v4_0_hw_fini:                     ## @sdma_v4_0_hw_fini
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	callq	_amdgpu_sriov_vf
	testq	%rax, %rax
	jne	LBB0_9
## %bb.1:
	cmpl	$0, 16(%r15)
	jle	LBB0_4
## %bb.2:
	leaq	20(%r15), %r14
	xorl	%ebx, %ebx
	movq	_AMDGPU_SDMA_IRQ_INSTANCE0@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r12), %rdx
	addq	%rbx, %rdx
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_amdgpu_irq_put
	incq	%rbx
	movslq	16(%r15), %rax
	cmpq	%rax, %rbx
	jl	LBB0_3
LBB0_4:
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_sdma_v4_0_ctx_switch_enable
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_sdma_v4_0_enable
	movq	(%r15), %rax
	movq	_CHIP_RAVEN@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_7
## %bb.5:
	movq	8(%r15), %rcx
	testq	%rcx, %rcx
	je	LBB0_7
## %bb.6:
	cmpq	$0, (%rcx)
	jne	LBB0_8
LBB0_7:
	movq	_CHIP_RENOIR@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_9
LBB0_8:
	movq	_AMD_IP_BLOCK_TYPE_SDMA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_amdgpu_dpm_set_powergating_by_smu
LBB0_9:
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_SDMA_IRQ_INSTANCE0,8,3  ## @AMDGPU_SDMA_IRQ_INSTANCE0
	.comm	_CHIP_RAVEN,8,3                 ## @CHIP_RAVEN
	.comm	_CHIP_RENOIR,8,3                ## @CHIP_RENOIR
	.comm	_AMD_IP_BLOCK_TYPE_SDMA,4,2     ## @AMD_IP_BLOCK_TYPE_SDMA
	.no_dead_strip	_sdma_v4_0_hw_fini
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdma_v4_0_hw_fini
_sdma_v4_0_hw_fini:                     ; @sdma_v4_0_hw_fini
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_amdgpu_sriov_vf
	cbnz	x0, LBB0_9
; %bb.1:
	ldr	w8, [x19, #16]
	cmp	w8, #1
	b.lt	LBB0_4
; %bb.2:
	mov	x21, #0
	add	x20, x19, #20
Lloh0:
	adrp	x22, _AMDGPU_SDMA_IRQ_INSTANCE0@GOTPAGE
Lloh1:
	ldr	x22, [x22, _AMDGPU_SDMA_IRQ_INSTANCE0@GOTPAGEOFF]
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x22]
	add	x2, x21, x8
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_irq_put
	add	x21, x21, #1
	ldrsw	x8, [x19, #16]
	cmp	x21, x8
	b.lt	LBB0_3
LBB0_4:
	mov	x0, x19
	mov	w1, #0
	bl	_sdma_v4_0_ctx_switch_enable
	mov	x0, x19
	mov	w1, #0
	bl	_sdma_v4_0_enable
	ldr	x8, [x19]
Lloh2:
	adrp	x9, _CHIP_RAVEN@GOTPAGE
Lloh3:
	ldr	x9, [x9, _CHIP_RAVEN@GOTPAGEOFF]
Lloh4:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_7
; %bb.5:
	ldr	x9, [x19, #8]
	cbz	x9, LBB0_7
; %bb.6:
	ldr	x9, [x9]
Lloh5:
	adrp	x10, _CHIP_RENOIR@GOTPAGE
Lloh6:
	ldr	x10, [x10, _CHIP_RENOIR@GOTPAGEOFF]
Lloh7:
	ldr	x10, [x10]
	cmp	x9, #0
	ccmp	x8, x10, #4, eq
	b.eq	LBB0_8
	b	LBB0_9
LBB0_7:
Lloh8:
	adrp	x9, _CHIP_RENOIR@GOTPAGE
Lloh9:
	ldr	x9, [x9, _CHIP_RENOIR@GOTPAGEOFF]
Lloh10:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_9
LBB0_8:
Lloh11:
	adrp	x8, _AMD_IP_BLOCK_TYPE_SDMA@GOTPAGE
Lloh12:
	ldr	x8, [x8, _AMD_IP_BLOCK_TYPE_SDMA@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	bl	_amdgpu_dpm_set_powergating_by_smu
LBB0_9:
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_SDMA_IRQ_INSTANCE0,8,3  ; @AMDGPU_SDMA_IRQ_INSTANCE0
	.comm	_CHIP_RAVEN,8,3                 ; @CHIP_RAVEN
	.comm	_CHIP_RENOIR,8,3                ; @CHIP_RENOIR
	.comm	_AMD_IP_BLOCK_TYPE_SDMA,4,2     ; @AMD_IP_BLOCK_TYPE_SDMA
	.no_dead_strip	_sdma_v4_0_hw_fini
.subsections_via_symbols
