	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dm_parse_crc_source
_dm_parse_crc_source:                   ## @dm_parse_crc_source
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	_AMDGPU_DM_PIPE_CRC_SOURCE_NONE@GOTPCREL(%rip), %r14
	testq	%rdi, %rdi
	je	LBB0_11
## %bb.1:
	movq	%rdi, %rbx
	leaq	L_.str(%rip), %rsi
	callq	_strcmp
	testl	%eax, %eax
	je	LBB0_11
## %bb.2:
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	callq	_strcmp
	movq	_AMDGPU_DM_PIPE_CRC_SOURCE_CRTC@GOTPCREL(%rip), %r14
	testl	%eax, %eax
	je	LBB0_11
## %bb.3:
	leaq	L_.str.2(%rip), %rsi
	movq	%rbx, %rdi
	callq	_strcmp
	testl	%eax, %eax
	je	LBB0_11
## %bb.4:
	leaq	L_.str.3(%rip), %rsi
	movq	%rbx, %rdi
	callq	_strcmp
	testl	%eax, %eax
	je	LBB0_5
## %bb.6:
	leaq	L_.str.4(%rip), %rsi
	movq	%rbx, %rdi
	callq	_strcmp
	testl	%eax, %eax
	je	LBB0_7
## %bb.8:
	leaq	L_.str.5(%rip), %rsi
	movq	%rbx, %rdi
	callq	_strcmp
	testl	%eax, %eax
	jne	LBB0_9
## %bb.10:
	movq	_AMDGPU_DM_PIPE_CRC_SOURCE_DPRX_DITHER@GOTPCREL(%rip), %r14
	jmp	LBB0_11
LBB0_5:
	movq	_AMDGPU_DM_PIPE_CRC_SOURCE_DPRX@GOTPCREL(%rip), %r14
	jmp	LBB0_11
LBB0_7:
	movq	_AMDGPU_DM_PIPE_CRC_SOURCE_CRTC_DITHER@GOTPCREL(%rip), %r14
	jmp	LBB0_11
LBB0_9:
	movq	_AMDGPU_DM_PIPE_CRC_SOURCE_INVALID@GOTPCREL(%rip), %r14
LBB0_11:
	movl	(%r14), %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"none"

	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_NONE,4,2 ## @AMDGPU_DM_PIPE_CRC_SOURCE_NONE
L_.str.1:                               ## @.str.1
	.asciz	"auto"

L_.str.2:                               ## @.str.2
	.asciz	"crtc"

	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_CRTC,4,2 ## @AMDGPU_DM_PIPE_CRC_SOURCE_CRTC
L_.str.3:                               ## @.str.3
	.asciz	"dprx"

	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_DPRX,4,2 ## @AMDGPU_DM_PIPE_CRC_SOURCE_DPRX
L_.str.4:                               ## @.str.4
	.asciz	"crtc dither"

	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_CRTC_DITHER,4,2 ## @AMDGPU_DM_PIPE_CRC_SOURCE_CRTC_DITHER
L_.str.5:                               ## @.str.5
	.asciz	"dprx dither"

	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_DPRX_DITHER,4,2 ## @AMDGPU_DM_PIPE_CRC_SOURCE_DPRX_DITHER
	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_INVALID,4,2 ## @AMDGPU_DM_PIPE_CRC_SOURCE_INVALID
	.no_dead_strip	_dm_parse_crc_source
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dm_parse_crc_source
_dm_parse_crc_source:                   ; @dm_parse_crc_source
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	cbz	x0, LBB0_7
; %bb.1:
	mov	x19, x0
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_strcmp
	cbz	w0, LBB0_7
; %bb.2:
Lloh2:
	adrp	x1, l_.str.1@PAGE
Lloh3:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_strcmp
	cbz	w0, LBB0_8
; %bb.3:
Lloh4:
	adrp	x1, l_.str.2@PAGE
Lloh5:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_strcmp
	cbz	w0, LBB0_8
; %bb.4:
Lloh6:
	adrp	x1, l_.str.3@PAGE
Lloh7:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
	bl	_strcmp
	cbz	w0, LBB0_10
; %bb.5:
Lloh8:
	adrp	x1, l_.str.4@PAGE
Lloh9:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_strcmp
	cbz	w0, LBB0_11
; %bb.6:
Lloh10:
	adrp	x1, l_.str.5@PAGE
Lloh11:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x19
	bl	_strcmp
Lloh12:
	adrp	x8, _AMDGPU_DM_PIPE_CRC_SOURCE_INVALID@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AMDGPU_DM_PIPE_CRC_SOURCE_INVALID@GOTPAGEOFF]
Lloh14:
	adrp	x9, _AMDGPU_DM_PIPE_CRC_SOURCE_DPRX_DITHER@GOTPAGE
Lloh15:
	ldr	x9, [x9, _AMDGPU_DM_PIPE_CRC_SOURCE_DPRX_DITHER@GOTPAGEOFF]
	cmp	w0, #0
	csel	x8, x9, x8, eq
	b	LBB0_9
LBB0_7:
Lloh16:
	adrp	x8, _AMDGPU_DM_PIPE_CRC_SOURCE_NONE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _AMDGPU_DM_PIPE_CRC_SOURCE_NONE@GOTPAGEOFF]
	b	LBB0_9
LBB0_8:
Lloh18:
	adrp	x8, _AMDGPU_DM_PIPE_CRC_SOURCE_CRTC@GOTPAGE
Lloh19:
	ldr	x8, [x8, _AMDGPU_DM_PIPE_CRC_SOURCE_CRTC@GOTPAGEOFF]
LBB0_9:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_10:
Lloh20:
	adrp	x8, _AMDGPU_DM_PIPE_CRC_SOURCE_DPRX@GOTPAGE
Lloh21:
	ldr	x8, [x8, _AMDGPU_DM_PIPE_CRC_SOURCE_DPRX@GOTPAGEOFF]
	b	LBB0_9
LBB0_11:
Lloh22:
	adrp	x8, _AMDGPU_DM_PIPE_CRC_SOURCE_CRTC_DITHER@GOTPAGE
Lloh23:
	ldr	x8, [x8, _AMDGPU_DM_PIPE_CRC_SOURCE_CRTC_DITHER@GOTPAGEOFF]
	b	LBB0_9
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"none"

	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_NONE,4,2 ; @AMDGPU_DM_PIPE_CRC_SOURCE_NONE
l_.str.1:                               ; @.str.1
	.asciz	"auto"

l_.str.2:                               ; @.str.2
	.asciz	"crtc"

	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_CRTC,4,2 ; @AMDGPU_DM_PIPE_CRC_SOURCE_CRTC
l_.str.3:                               ; @.str.3
	.asciz	"dprx"

	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_DPRX,4,2 ; @AMDGPU_DM_PIPE_CRC_SOURCE_DPRX
l_.str.4:                               ; @.str.4
	.asciz	"crtc dither"

	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_CRTC_DITHER,4,2 ; @AMDGPU_DM_PIPE_CRC_SOURCE_CRTC_DITHER
l_.str.5:                               ; @.str.5
	.asciz	"dprx dither"

	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_DPRX_DITHER,4,2 ; @AMDGPU_DM_PIPE_CRC_SOURCE_DPRX_DITHER
	.comm	_AMDGPU_DM_PIPE_CRC_SOURCE_INVALID,4,2 ; @AMDGPU_DM_PIPE_CRC_SOURCE_INVALID
	.no_dead_strip	_dm_parse_crc_source
.subsections_via_symbols
