	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mga_g200ev_set_plls
_mga_g200ev_set_plls:                   ## @mga_g200ev_set_plls
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	xorl	%r15d, %r15d
	movl	$-1, %r12d
	movl	$16, %r11d
	xorl	%r13d, %r13d
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	jmp	LBB0_1
	.p2align	4, 0x90
LBB0_8:                                 ##   in Loop: Header=BB0_1 Depth=1
	movq	%r8, %r11
	testq	%r8, %r8
	je	LBB0_9
LBB0_1:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_3 Depth 2
                                        ##       Child Loop BB0_4 Depth 3
	movq	%r11, %rax
	imulq	%rsi, %rax
	addq	$-550001, %rax                  ## imm = 0xFFF79B8F
	leaq	-1(%r11), %r8
	cmpq	$-400001, %rax                  ## imm = 0xFFF9E57F
	jb	LBB0_8
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	$1, %r9d
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_3 Depth=2
	incl	%r9d
	cmpl	$257, %r9d                      ## imm = 0x101
	je	LBB0_8
LBB0_3:                                 ##   Parent Loop BB0_1 Depth=1
                                        ## =>  This Loop Header: Depth=2
                                        ##       Child Loop BB0_4 Depth 3
	imull	$50000, %r9d, %ecx              ## imm = 0xC350
	leal	-1(%r9), %r10d
	xorl	%ebx, %ebx
	movl	%r11d, %edi
	jmp	LBB0_4
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_4 Depth=3
	incl	%ebx
	addl	%r11d, %edi
	cmpl	$16, %ebx
	je	LBB0_7
LBB0_4:                                 ##   Parent Loop BB0_1 Depth=1
                                        ##     Parent Loop BB0_3 Depth=2
                                        ## =>    This Inner Loop Header: Depth=3
	movl	%ecx, %eax
	xorl	%edx, %edx
	divl	%edi
                                        ## kill: def $eax killed $eax def $rax
	movl	%esi, %r14d
	subl	%eax, %r14d
	movl	%eax, %edx
	subl	%esi, %edx
	cmpq	%rsi, %rax
	cmovlel	%r14d, %edx
	cmpl	%r12d, %edx
	jae	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_4 Depth=3
	movl	%r8d, %eax
	movl	%r8d, -44(%rbp)                 ## 4-byte Spill
	movl	%ebx, %r13d
	movl	%r10d, %r15d
	movl	%edx, %r12d
	jmp	LBB0_6
LBB0_9:
	movq	_DAC_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rax, %rbx
	movq	_MGA1064_PIX_CLK_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rax, %r14
	callq	_WREG8
	movq	_DAC_DATA@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_RREG8
	movq	_MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r12), %edi
	movl	%eax, %esi
	callq	_WREG8
	movq	_MGAREG_MEM_MISC_READ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG8
	orl	$12, %eax
	movq	_MGAREG_MEM_MISC_WRITE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%eax, %esi
	callq	_WREG8
	movl	(%rbx), %edi
	movq	_MGA1064_PIX_PLL_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	movl	(%r12), %edi
	andl	$-65, %eax
	movl	%eax, %esi
	callq	_WREG8
	movl	(%rbx), %edi
	movl	(%r14), %esi
	movq	%r14, %rbx
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	movq	_MGA1064_PIX_CLK_CTL_CLK_POW_DOWN@GOTPCREL(%rip), %r14
	orl	(%r14), %eax
	movl	(%r12), %edi
	movl	%eax, %esi
	callq	_WREG8
	movq	_MGA1064_EV_PIX_PLLC_M@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r13d, %esi
	callq	_WREG_DAC
	movq	_MGA1064_EV_PIX_PLLC_N@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	callq	_WREG_DAC
	movq	_MGA1064_EV_PIX_PLLC_P@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG_DAC
	movl	$50, %edi
	callq	_udelay
	movq	_DAC_INDEX@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	movl	(%rbx), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	movl	(%r14), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r12), %edi
	callq	_WREG8
	movl	$500, %edi                      ## imm = 0x1F4
	callq	_udelay
	movl	(%r15), %edi
	movl	(%rbx), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	movq	_MGA1064_PIX_CLK_CTL_SEL_MSK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	_MGA1064_PIX_CLK_CTL_SEL_PLL@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movl	(%r12), %edi
	callq	_WREG8
	movl	(%r15), %edi
	movq	_MGA1064_PIX_PLL_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	movl	(%r12), %edi
	orl	$64, %eax
	movl	%eax, %esi
	callq	_WREG8
	movq	_MGAREG_MEM_MISC_READ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG8
	orl	$12, %eax
	movq	_MGAREG_MEM_MISC_WRITE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%eax, %esi
	callq	_WREG8
	movl	(%r15), %edi
	movl	(%rbx), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	movq	_MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r12), %edi
	callq	_WREG8
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DAC_INDEX,4,2                  ## @DAC_INDEX
	.comm	_MGA1064_PIX_CLK_CTL,4,2        ## @MGA1064_PIX_CLK_CTL
	.comm	_DAC_DATA,4,2                   ## @DAC_DATA
	.comm	_MGA1064_PIX_CLK_CTL_CLK_DIS,4,2 ## @MGA1064_PIX_CLK_CTL_CLK_DIS
	.comm	_MGAREG_MEM_MISC_READ,4,2       ## @MGAREG_MEM_MISC_READ
	.comm	_MGAREG_MEM_MISC_WRITE,4,2      ## @MGAREG_MEM_MISC_WRITE
	.comm	_MGA1064_PIX_PLL_STAT,4,2       ## @MGA1064_PIX_PLL_STAT
	.comm	_MGA1064_PIX_CLK_CTL_CLK_POW_DOWN,4,2 ## @MGA1064_PIX_CLK_CTL_CLK_POW_DOWN
	.comm	_MGA1064_EV_PIX_PLLC_M,4,2      ## @MGA1064_EV_PIX_PLLC_M
	.comm	_MGA1064_EV_PIX_PLLC_N,4,2      ## @MGA1064_EV_PIX_PLLC_N
	.comm	_MGA1064_EV_PIX_PLLC_P,4,2      ## @MGA1064_EV_PIX_PLLC_P
	.comm	_MGA1064_PIX_CLK_CTL_SEL_MSK,4,2 ## @MGA1064_PIX_CLK_CTL_SEL_MSK
	.comm	_MGA1064_PIX_CLK_CTL_SEL_PLL,4,2 ## @MGA1064_PIX_CLK_CTL_SEL_PLL
	.no_dead_strip	_mga_g200ev_set_plls
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mga_g200ev_set_plls
_mga_g200ev_set_plls:                   ; @mga_g200ev_set_plls
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	w20, #0
	mov	w21, #0
	mov	w19, #0
	mov	w10, #-1
	mov	w12, #16
	mov	x8, #-25713
	movk	x8, #65527, lsl #16
	mov	x9, #-6785
	movk	x9, #65529, lsl #16
	mov	w11, #50000
	b	LBB0_2
LBB0_1:                                 ;   in Loop: Header=BB0_2 Depth=1
	mov	x12, x13
	cbz	x13, LBB0_9
LBB0_2:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;       Child Loop BB0_7 Depth 3
	madd	x14, x12, x1, x8
	sub	x13, x12, #1
	cmp	x14, x9
	b.lo	LBB0_1
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	w14, #1
	b	LBB0_5
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=2
	add	w14, w14, #1
	cmp	w14, #257
	b.eq	LBB0_1
LBB0_5:                                 ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_7 Depth 3
	mov	w15, #0
	mul	w16, w14, w11
	sub	w17, w14, #1
	mov	x0, x12
	b	LBB0_7
LBB0_6:                                 ;   in Loop: Header=BB0_7 Depth=3
	add	w15, w15, #1
	add	w0, w0, w12
	cmp	w15, #16
	b.eq	LBB0_4
LBB0_7:                                 ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	udiv	w2, w16, w0
	sub	w3, w2, w1
	sub	w4, w1, w2
	cmp	x2, x1
	csel	w2, w3, w4, gt
	cmp	w2, w10
	b.hs	LBB0_6
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=3
	mov	x19, x13
	mov	x21, x15
	mov	x20, x17
	mov	x10, x2
	b	LBB0_6
LBB0_9:
Lloh0:
	adrp	x23, _DAC_INDEX@GOTPAGE
Lloh1:
	ldr	x23, [x23, _DAC_INDEX@GOTPAGEOFF]
	ldr	w0, [x23]
Lloh2:
	adrp	x24, _MGA1064_PIX_CLK_CTL@GOTPAGE
Lloh3:
	ldr	x24, [x24, _MGA1064_PIX_CLK_CTL@GOTPAGEOFF]
	ldr	w1, [x24]
	bl	_WREG8
Lloh4:
	adrp	x22, _DAC_DATA@GOTPAGE
Lloh5:
	ldr	x22, [x22, _DAC_DATA@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_RREG8
Lloh6:
	adrp	x8, _MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w0, [x22]
	bl	_WREG8
Lloh9:
	adrp	x26, _MGAREG_MEM_MISC_READ@GOTPAGE
Lloh10:
	ldr	x26, [x26, _MGAREG_MEM_MISC_READ@GOTPAGEOFF]
	ldr	w0, [x26]
	bl	_RREG8
	orr	w1, w0, #0xc
Lloh11:
	adrp	x27, _MGAREG_MEM_MISC_WRITE@GOTPAGE
Lloh12:
	ldr	x27, [x27, _MGAREG_MEM_MISC_WRITE@GOTPAGEOFF]
	ldr	w0, [x27]
	bl	_WREG8
	ldr	w0, [x23]
Lloh13:
	adrp	x28, _MGA1064_PIX_PLL_STAT@GOTPAGE
Lloh14:
	ldr	x28, [x28, _MGA1064_PIX_PLL_STAT@GOTPAGEOFF]
	ldr	w1, [x28]
	bl	_WREG8
	ldr	w0, [x22]
	bl	_RREG8
	ldr	w8, [x22]
	and	w1, w0, #0xffffffbf
	mov	x0, x8
	bl	_WREG8
	ldr	w0, [x23]
	ldr	w1, [x24]
	bl	_WREG8
	ldr	w0, [x22]
	bl	_RREG8
Lloh15:
	adrp	x25, _MGA1064_PIX_CLK_CTL_CLK_POW_DOWN@GOTPAGE
Lloh16:
	ldr	x25, [x25, _MGA1064_PIX_CLK_CTL_CLK_POW_DOWN@GOTPAGEOFF]
	ldr	w8, [x25]
	orr	w1, w8, w0
	ldr	w0, [x22]
	bl	_WREG8
Lloh17:
	adrp	x8, _MGA1064_EV_PIX_PLLC_M@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MGA1064_EV_PIX_PLLC_M@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x8]
	mov	x1, x21
	bl	_WREG_DAC
Lloh20:
	adrp	x8, _MGA1064_EV_PIX_PLLC_N@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MGA1064_EV_PIX_PLLC_N@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_WREG_DAC
Lloh23:
	adrp	x8, _MGA1064_EV_PIX_PLLC_P@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MGA1064_EV_PIX_PLLC_P@GOTPAGEOFF]
Lloh25:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_WREG_DAC
	mov	w0, #50
	bl	_udelay
	ldr	w0, [x23]
	ldr	w1, [x24]
	bl	_WREG8
	ldr	w0, [x22]
	bl	_RREG8
	ldr	w8, [x25]
	bic	w1, w0, w8
	ldr	w0, [x22]
	bl	_WREG8
	mov	w0, #500
	bl	_udelay
	ldr	w0, [x23]
	ldr	w1, [x24]
	bl	_WREG8
	ldr	w0, [x22]
	bl	_RREG8
Lloh26:
	adrp	x8, _MGA1064_PIX_CLK_CTL_SEL_MSK@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MGA1064_PIX_CLK_CTL_SEL_MSK@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh29:
	adrp	x9, _MGA1064_PIX_CLK_CTL_SEL_PLL@GOTPAGE
Lloh30:
	ldr	x9, [x9, _MGA1064_PIX_CLK_CTL_SEL_PLL@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	orr	w1, w8, w9
	ldr	w0, [x22]
	bl	_WREG8
	ldr	w0, [x23]
	ldr	w1, [x28]
	bl	_WREG8
	ldr	w0, [x22]
	bl	_RREG8
	ldr	w8, [x22]
	orr	w1, w0, #0x40
	mov	x0, x8
	bl	_WREG8
	ldr	w0, [x26]
	bl	_RREG8
	orr	w1, w0, #0xc
	ldr	w0, [x27]
	bl	_WREG8
	ldr	w0, [x23]
	ldr	w1, [x24]
	bl	_WREG8
	ldr	w0, [x22]
	bl	_RREG8
Lloh32:
	adrp	x8, _MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPAGE
Lloh33:
	ldr	x8, [x8, _MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w0, [x22]
	bl	_WREG8
	mov	w0, #0
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_DAC_INDEX,4,2                  ; @DAC_INDEX
	.comm	_MGA1064_PIX_CLK_CTL,4,2        ; @MGA1064_PIX_CLK_CTL
	.comm	_DAC_DATA,4,2                   ; @DAC_DATA
	.comm	_MGA1064_PIX_CLK_CTL_CLK_DIS,4,2 ; @MGA1064_PIX_CLK_CTL_CLK_DIS
	.comm	_MGAREG_MEM_MISC_READ,4,2       ; @MGAREG_MEM_MISC_READ
	.comm	_MGAREG_MEM_MISC_WRITE,4,2      ; @MGAREG_MEM_MISC_WRITE
	.comm	_MGA1064_PIX_PLL_STAT,4,2       ; @MGA1064_PIX_PLL_STAT
	.comm	_MGA1064_PIX_CLK_CTL_CLK_POW_DOWN,4,2 ; @MGA1064_PIX_CLK_CTL_CLK_POW_DOWN
	.comm	_MGA1064_EV_PIX_PLLC_M,4,2      ; @MGA1064_EV_PIX_PLLC_M
	.comm	_MGA1064_EV_PIX_PLLC_N,4,2      ; @MGA1064_EV_PIX_PLLC_N
	.comm	_MGA1064_EV_PIX_PLLC_P,4,2      ; @MGA1064_EV_PIX_PLLC_P
	.comm	_MGA1064_PIX_CLK_CTL_SEL_MSK,4,2 ; @MGA1064_PIX_CLK_CTL_SEL_MSK
	.comm	_MGA1064_PIX_CLK_CTL_SEL_PLL,4,2 ; @MGA1064_PIX_CLK_CTL_SEL_PLL
	.no_dead_strip	_mga_g200ev_set_plls
.subsections_via_symbols
