	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_bo_release_notify       ## -- Begin function amdgpu_bo_release_notify
	.p2align	4, 0x90
_amdgpu_bo_release_notify:              ## @amdgpu_bo_release_notify
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	$0, -24(%rbp)
	callq	_amdgpu_bo_is_amdgpu_bo
	testl	%eax, %eax
	je	LBB0_9
## %bb.1:
	movq	%rbx, %rdi
	callq	_ttm_to_amdgpu_bo
	movq	%rax, %r14
	cmpq	$0, 8(%rax)
	je	LBB0_3
## %bb.2:
	movq	%r14, %rdi
	callq	_amdgpu_amdkfd_unreserve_memory_limit
LBB0_3:
	movq	8(%rbx), %rax
	movq	_TTM_PL_VRAM@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_9
## %bb.4:
	cmpl	$0, 16(%rbx)
	je	LBB0_9
## %bb.5:
	movq	_AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r14)
	je	LBB0_9
## %bb.6:
	movl	(%rbx), %edi
	xorl	%esi, %esi
	callq	_dma_resv_lock
	movq	_AMDGPU_POISON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	leaq	-24(%rbp), %rcx
	movq	%r14, %rdi
	callq	_amdgpu_fill_buffer
	movl	%eax, %edi
	callq	_WARN_ON
	testl	%eax, %eax
	jne	LBB0_8
## %bb.7:
	movq	-24(%rbp), %rsi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_amdgpu_bo_fence
	movq	-24(%rbp), %rdi
	callq	_dma_fence_put
LBB0_8:
	movl	(%rbx), %edi
	callq	_dma_resv_unlock
LBB0_9:
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TTM_PL_VRAM,8,3                ## @TTM_PL_VRAM
	.comm	_AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE,4,2 ## @AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE
	.comm	_AMDGPU_POISON,4,2              ## @AMDGPU_POISON
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_bo_release_notify       ; -- Begin function amdgpu_bo_release_notify
	.p2align	2
_amdgpu_bo_release_notify:              ; @amdgpu_bo_release_notify
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	str	xzr, [sp, #8]
	bl	_amdgpu_bo_is_amdgpu_bo
	cbz	w0, LBB0_9
; %bb.1:
	mov	x0, x19
	bl	_ttm_to_amdgpu_bo
	mov	x20, x0
	ldr	x8, [x0, #8]
	cbz	x8, LBB0_3
; %bb.2:
	mov	x0, x20
	bl	_amdgpu_amdkfd_unreserve_memory_limit
LBB0_3:
	ldr	x8, [x19, #8]
Lloh0:
	adrp	x9, _TTM_PL_VRAM@GOTPAGE
Lloh1:
	ldr	x9, [x9, _TTM_PL_VRAM@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_9
; %bb.4:
	ldr	w8, [x19, #16]
	cbz	w8, LBB0_9
; %bb.5:
	ldr	w8, [x20]
Lloh3:
	adrp	x9, _AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_9
; %bb.6:
	ldr	w0, [x19]
	mov	x1, #0
	bl	_dma_resv_lock
Lloh6:
	adrp	x8, _AMDGPU_POISON@GOTPAGE
Lloh7:
	ldr	x8, [x8, _AMDGPU_POISON@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	ldr	w2, [x19]
	add	x3, sp, #8
	mov	x0, x20
	bl	_amdgpu_fill_buffer
	bl	_WARN_ON
	cbnz	w0, LBB0_8
; %bb.7:
	ldr	x1, [sp, #8]
	mov	x0, x20
	mov	w2, #0
	bl	_amdgpu_bo_fence
	ldr	x0, [sp, #8]
	bl	_dma_fence_put
LBB0_8:
	ldr	w0, [x19]
	bl	_dma_resv_unlock
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_TTM_PL_VRAM,8,3                ; @TTM_PL_VRAM
	.comm	_AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE,4,2 ; @AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE
	.comm	_AMDGPU_POISON,4,2              ; @AMDGPU_POISON
.subsections_via_symbols
