	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v6_0_cp_gfx_start
_gfx_v6_0_cp_gfx_start:                 ## @gfx_v6_0_cp_gfx_start
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	16(%rdi), %r13
	movq	%r13, %rdi
	movl	$11, %esi
	callq	_amdgpu_ring_alloc
	testl	%eax, %eax
	jne	LBB0_1
## %bb.2:
	movq	_PACKET3_ME_INITIALIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$5, %esi
	callq	_PACKET3
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	movl	$1, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movl	8(%r15), %esi
	decl	%esi
	movq	%r13, %rdi
	callq	_amdgpu_ring_write
	movl	$1, %edi
	callq	_PACKET3_ME_INITIALIZE_DEVICE_ID
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	_PACKET3_SET_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$2, %esi
	callq	_PACKET3
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	_CE_PARTITION_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_PACKET3_BASE_INDEX
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	movl	$49152, %esi                    ## imm = 0xC000
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	movl	$57344, %esi                    ## imm = 0xE000
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	callq	_amdgpu_ring_commit
	movq	%r15, %rdi
	movl	$1, %esi
	callq	_gfx_v6_0_cp_gfx_enable
	movq	%r15, %rdi
	callq	_gfx_v6_0_get_csb_size
                                        ## kill: def $eax killed $eax def $rax
	leal	10(%rax), %esi
	movq	%r13, %rdi
	callq	_amdgpu_ring_alloc
	testl	%eax, %eax
	je	LBB0_3
LBB0_1:
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rdi
	movl	%eax, %esi
	callq	_DRM_ERROR
LBB0_13:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movq	_PACKET3_PREAMBLE_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	_PACKET3_PREAMBLE_BEGIN_CLEAR_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_amdgpu_ring_write
	movq	(%r15), %r15
	movq	8(%r15), %rbx
	testq	%rbx, %rbx
	je	LBB0_12
## %bb.4:
	movq	_SECT_CONTEXT@GOTPCREL(%rip), %r12
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_11:                                ##   in Loop: Header=BB0_5 Depth=1
	movq	24(%r15), %rbx
	addq	$16, %r15
	testq	%rbx, %rbx
	je	LBB0_12
LBB0_5:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_6 Depth 2
                                        ##       Child Loop BB0_9 Depth 3
	cmpq	$0, (%rbx)
	jne	LBB0_6
	jmp	LBB0_11
	.p2align	4, 0x90
LBB0_10:                                ##   in Loop: Header=BB0_6 Depth=2
	cmpq	$0, 16(%rbx)
	leaq	16(%rbx), %rbx
	je	LBB0_11
LBB0_6:                                 ##   Parent Loop BB0_5 Depth=1
                                        ## =>  This Loop Header: Depth=2
                                        ##       Child Loop BB0_9 Depth 3
	movq	(%r15), %rax
	cmpq	(%r12), %rax
	jne	LBB0_10
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=2
	movq	_PACKET3_SET_CONTEXT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	8(%rbx), %esi
	callq	_PACKET3
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movl	12(%rbx), %esi
	movq	_PACKET3_SET_CONTEXT_REG_START@GOTPCREL(%rip), %rax
	subl	(%rax), %esi
	movq	%r13, %rdi
	callq	_amdgpu_ring_write
	cmpl	$0, 8(%rbx)
	jle	LBB0_10
## %bb.8:                               ##   in Loop: Header=BB0_6 Depth=2
	xorl	%r14d, %r14d
	.p2align	4, 0x90
LBB0_9:                                 ##   Parent Loop BB0_5 Depth=1
                                        ##     Parent Loop BB0_6 Depth=2
                                        ## =>    This Inner Loop Header: Depth=3
	movq	(%rbx), %rax
	movl	(%rax,%r14,4), %esi
	movq	%r13, %rdi
	callq	_amdgpu_ring_write
	incq	%r14
	movslq	8(%rbx), %rax
	cmpq	%rax, %r14
	jl	LBB0_9
	jmp	LBB0_10
LBB0_12:
	movq	_PACKET3_PREAMBLE_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	_PACKET3_PREAMBLE_END_CLEAR_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_amdgpu_ring_write
	movq	_PACKET3_CLEAR_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ring_write
	movq	_PACKET3_SET_CONTEXT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$2, %esi
	callq	_PACKET3
	movq	%r13, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	movl	$790, %esi                      ## imm = 0x316
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	movl	$14, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	movl	$16, %esi
	callq	_amdgpu_ring_write
	movq	%r13, %rdi
	callq	_amdgpu_ring_commit
	xorl	%ebx, %ebx
	jmp	LBB0_13
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"amdgpu: cp failed to lock ring (%d).\n"

	.comm	_PACKET3_ME_INITIALIZE,4,2      ## @PACKET3_ME_INITIALIZE
	.comm	_PACKET3_SET_BASE,4,2           ## @PACKET3_SET_BASE
	.comm	_CE_PARTITION_BASE,4,2          ## @CE_PARTITION_BASE
	.comm	_PACKET3_PREAMBLE_CNTL,4,2      ## @PACKET3_PREAMBLE_CNTL
	.comm	_PACKET3_PREAMBLE_BEGIN_CLEAR_STATE,4,2 ## @PACKET3_PREAMBLE_BEGIN_CLEAR_STATE
	.comm	_SECT_CONTEXT,8,3               ## @SECT_CONTEXT
	.comm	_PACKET3_SET_CONTEXT_REG,4,2    ## @PACKET3_SET_CONTEXT_REG
	.comm	_PACKET3_SET_CONTEXT_REG_START,4,2 ## @PACKET3_SET_CONTEXT_REG_START
	.comm	_PACKET3_PREAMBLE_END_CLEAR_STATE,4,2 ## @PACKET3_PREAMBLE_END_CLEAR_STATE
	.comm	_PACKET3_CLEAR_STATE,4,2        ## @PACKET3_CLEAR_STATE
	.no_dead_strip	_gfx_v6_0_cp_gfx_start
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v6_0_cp_gfx_start
_gfx_v6_0_cp_gfx_start:                 ; @gfx_v6_0_cp_gfx_start
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x0
	ldr	x19, [x0, #16]
	mov	x0, x19
	mov	w1, #11
	bl	_amdgpu_ring_alloc
	cbnz	w0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _PACKET3_ME_INITIALIZE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PACKET3_ME_INITIALIZE@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	w1, #5
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #1
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	ldr	w8, [x20, #8]
	sub	w1, w8, #1
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	w0, #1
	bl	_PACKET3_ME_INITIALIZE_DEVICE_ID
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
Lloh3:
	adrp	x8, _PACKET3_SET_BASE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PACKET3_SET_BASE@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	mov	w1, #2
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
Lloh6:
	adrp	x8, _CE_PARTITION_BASE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _CE_PARTITION_BASE@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	bl	_PACKET3_BASE_INDEX
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #49152
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #57344
	bl	_amdgpu_ring_write
	mov	x0, x19
	bl	_amdgpu_ring_commit
	mov	x0, x20
	mov	w1, #1
	bl	_gfx_v6_0_cp_gfx_enable
	mov	x0, x20
	bl	_gfx_v6_0_get_csb_size
	add	w1, w0, #10
	mov	x0, x19
	bl	_amdgpu_ring_alloc
	cbz	w0, LBB0_4
LBB0_2:
	mov	x21, x0
Lloh9:
	adrp	x0, l_.str@PAGE
Lloh10:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x21
	bl	_DRM_ERROR
LBB0_3:
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_4:
Lloh11:
	adrp	x21, _PACKET3_PREAMBLE_CNTL@GOTPAGE
Lloh12:
	ldr	x21, [x21, _PACKET3_PREAMBLE_CNTL@GOTPAGEOFF]
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
Lloh13:
	adrp	x8, _PACKET3_PREAMBLE_BEGIN_CLEAR_STATE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PACKET3_PREAMBLE_BEGIN_CLEAR_STATE@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	x22, [x20]
	ldr	x23, [x22, #8]
Lloh16:
	adrp	x20, _PACKET3_SET_CONTEXT_REG@GOTPAGE
Lloh17:
	ldr	x20, [x20, _PACKET3_SET_CONTEXT_REG@GOTPAGEOFF]
	cbz	x23, LBB0_13
; %bb.5:
Lloh18:
	adrp	x24, _SECT_CONTEXT@GOTPAGE
Lloh19:
	ldr	x24, [x24, _SECT_CONTEXT@GOTPAGEOFF]
Lloh20:
	adrp	x25, _PACKET3_SET_CONTEXT_REG_START@GOTPAGE
Lloh21:
	ldr	x25, [x25, _PACKET3_SET_CONTEXT_REG_START@GOTPAGEOFF]
	b	LBB0_7
LBB0_6:                                 ;   in Loop: Header=BB0_7 Depth=1
	ldr	x23, [x22, #24]
	add	x22, x22, #16
	cbz	x23, LBB0_13
LBB0_7:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_9 Depth 2
                                        ;       Child Loop BB0_12 Depth 3
	ldr	x8, [x23]
	cbnz	x8, LBB0_9
	b	LBB0_6
LBB0_8:                                 ;   in Loop: Header=BB0_9 Depth=2
	ldr	x8, [x23, #16]!
	cbz	x8, LBB0_6
LBB0_9:                                 ;   Parent Loop BB0_7 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_12 Depth 3
	ldr	x8, [x22]
	ldr	x9, [x24]
	cmp	x8, x9
	b.ne	LBB0_8
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=2
	ldr	w0, [x20]
	ldr	w1, [x23, #8]
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w8, [x23, #12]
	ldr	w9, [x25]
	sub	w1, w8, w9
	mov	x0, x19
	bl	_amdgpu_ring_write
	ldr	w8, [x23, #8]
	cmp	w8, #1
	b.lt	LBB0_8
; %bb.11:                               ;   in Loop: Header=BB0_9 Depth=2
	mov	x26, #0
LBB0_12:                                ;   Parent Loop BB0_7 Depth=1
                                        ;     Parent Loop BB0_9 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	ldr	x8, [x23]
	ldr	w1, [x8, x26, lsl #2]
	mov	x0, x19
	bl	_amdgpu_ring_write
	add	x26, x26, #1
	ldrsw	x8, [x23, #8]
	cmp	x26, x8
	b.lt	LBB0_12
	b	LBB0_8
LBB0_13:
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
Lloh22:
	adrp	x8, _PACKET3_PREAMBLE_END_CLEAR_STATE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _PACKET3_PREAMBLE_END_CLEAR_STATE@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_amdgpu_ring_write
Lloh25:
	adrp	x8, _PACKET3_CLEAR_STATE@GOTPAGE
Lloh26:
	ldr	x8, [x8, _PACKET3_CLEAR_STATE@GOTPAGEOFF]
Lloh27:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_amdgpu_ring_write
	ldr	w0, [x20]
	mov	w1, #2
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #790
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #14
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #16
	bl	_amdgpu_ring_write
	mov	x0, x19
	bl	_amdgpu_ring_commit
	mov	w21, #0
	b	LBB0_3
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"amdgpu: cp failed to lock ring (%d).\n"

	.comm	_PACKET3_ME_INITIALIZE,4,2      ; @PACKET3_ME_INITIALIZE
	.comm	_PACKET3_SET_BASE,4,2           ; @PACKET3_SET_BASE
	.comm	_CE_PARTITION_BASE,4,2          ; @CE_PARTITION_BASE
	.comm	_PACKET3_PREAMBLE_CNTL,4,2      ; @PACKET3_PREAMBLE_CNTL
	.comm	_PACKET3_PREAMBLE_BEGIN_CLEAR_STATE,4,2 ; @PACKET3_PREAMBLE_BEGIN_CLEAR_STATE
	.comm	_SECT_CONTEXT,8,3               ; @SECT_CONTEXT
	.comm	_PACKET3_SET_CONTEXT_REG,4,2    ; @PACKET3_SET_CONTEXT_REG
	.comm	_PACKET3_SET_CONTEXT_REG_START,4,2 ; @PACKET3_SET_CONTEXT_REG_START
	.comm	_PACKET3_PREAMBLE_END_CLEAR_STATE,4,2 ; @PACKET3_PREAMBLE_END_CLEAR_STATE
	.comm	_PACKET3_CLEAR_STATE,4,2        ; @PACKET3_CLEAR_STATE
	.no_dead_strip	_gfx_v6_0_cp_gfx_start
.subsections_via_symbols
