	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vcn_v2_0_jpeg_ring_insert_end  ## -- Begin function vcn_v2_0_jpeg_ring_insert_end
	.p2align	4, 0x90
_vcn_v2_0_jpeg_ring_insert_end:         ## @vcn_v2_0_jpeg_ring_insert_end
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_PACKETJ_TYPE0@GOTPCREL(%rip), %r14
	movl	(%r14), %ecx
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%rbx, %rdi
	movl	$429572, %esi                   ## imm = 0x68E04
	callq	_amdgpu_ring_write
	movq	_JRBC_DEC_EXTERNAL_REG_WRITE_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r14), %ecx
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_PACKETJ
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_amdgpu_ring_write
	movq	%rbx, %rdi
	movl	$65536, %esi                    ## imm = 0x10000
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_amdgpu_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,4,2 ## @mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET
	.comm	_PACKETJ_TYPE0,4,2              ## @PACKETJ_TYPE0
	.comm	_JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,4,2 ## @JRBC_DEC_EXTERNAL_REG_WRITE_ADDR
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_vcn_v2_0_jpeg_ring_insert_end  ; -- Begin function vcn_v2_0_jpeg_ring_insert_end
	.p2align	2
_vcn_v2_0_jpeg_ring_insert_end:         ; @vcn_v2_0_jpeg_ring_insert_end
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET@GOTPAGE
Lloh1:
	ldr	x8, [x8, _mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x20, _PACKETJ_TYPE0@GOTPAGE
Lloh4:
	ldr	x20, [x20, _PACKETJ_TYPE0@GOTPAGEOFF]
	ldr	w3, [x20]
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #36356
	movk	w1, #6, lsl #16
	bl	_amdgpu_ring_write
Lloh5:
	adrp	x8, _JRBC_DEC_EXTERNAL_REG_WRITE_ADDR@GOTPAGE
Lloh6:
	ldr	x8, [x8, _JRBC_DEC_EXTERNAL_REG_WRITE_ADDR@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	ldr	w3, [x20]
	mov	w1, #0
	mov	w2, #0
	bl	_PACKETJ
	mov	x1, x0
	mov	x0, x19
	bl	_amdgpu_ring_write
	mov	x0, x19
	mov	w1, #65536
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_amdgpu_ring_write
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,4,2 ; @mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET
	.comm	_PACKETJ_TYPE0,4,2              ; @PACKETJ_TYPE0
	.comm	_JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,4,2 ; @JRBC_DEC_EXTERNAL_REG_WRITE_ADDR
.subsections_via_symbols
