	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cik_cp_gfx_start
_cik_cp_gfx_start:                      ## @cik_cp_gfx_start
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_RADEON_RING_TYPE_GFX_INDEX@GOTPCREL(%rip), %rax
	movq	(%rax), %rbx
	shlq	$2, %rbx
	addq	8(%rdi), %rbx
	movq	_CP_MAX_CONTEXT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r14), %esi
	decl	%esi
	callq	_WREG32
	movq	_CP_ENDIAN_SWAP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_CP_DEVICE_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_WREG32
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_cik_cp_gfx_enable
	movq	_cik_default_size@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	addl	$17, %edx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_radeon_ring_lock
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	movl	%eax, %r15d
	leaq	L_.str(%rip), %rdi
	movl	%eax, %esi
	callq	_DRM_ERROR
	jmp	LBB0_6
LBB0_2:
	movq	%r14, -48(%rbp)                 ## 8-byte Spill
	movq	_PACKET3_SET_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$2, %esi
	callq	_PACKET3
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_CE_PARTITION_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_PACKET3_BASE_INDEX
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	$32768, %esi                    ## imm = 0x8000
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	$32768, %esi                    ## imm = 0x8000
	callq	_radeon_ring_write
	movq	_PACKET3_PREAMBLE_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_PACKET3_PREAMBLE_BEGIN_CLEAR_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	movq	_PACKET3_CONTEXT_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_PACKET3
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	$-2147483648, %esi              ## imm = 0x80000000
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	$-2147483648, %esi              ## imm = 0x80000000
	callq	_radeon_ring_write
	cmpl	$0, (%r12)
	jle	LBB0_5
## %bb.3:
	xorl	%r13d, %r13d
	movq	_cik_default_state@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r14), %rax
	movl	(%rax,%r13,4), %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	incq	%r13
	movslq	(%r12), %rax
	cmpq	%rax, %r13
	jl	LBB0_4
LBB0_5:
	movq	_PACKET3_PREAMBLE_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	_PACKET3_PREAMBLE_END_CLEAR_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	movq	_PACKET3_CLEAR_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_PACKET3
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movq	_PACKET3_SET_CONTEXT_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$2, %esi
	callq	_PACKET3
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	$790, %esi                      ## imm = 0x316
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	$14, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	$16, %esi
	callq	_radeon_ring_write
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	_radeon_ring_unlock_commit
LBB0_6:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ## @RADEON_RING_TYPE_GFX_INDEX
	.comm	_CP_MAX_CONTEXT,4,2             ## @CP_MAX_CONTEXT
	.comm	_CP_ENDIAN_SWAP,4,2             ## @CP_ENDIAN_SWAP
	.comm	_CP_DEVICE_ID,4,2               ## @CP_DEVICE_ID
	.comm	_cik_default_size,4,2           ## @cik_default_size
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"radeon: cp failed to lock ring (%d).\n"

	.comm	_PACKET3_SET_BASE,4,2           ## @PACKET3_SET_BASE
	.comm	_CE_PARTITION_BASE,4,2          ## @CE_PARTITION_BASE
	.comm	_PACKET3_PREAMBLE_CNTL,4,2      ## @PACKET3_PREAMBLE_CNTL
	.comm	_PACKET3_PREAMBLE_BEGIN_CLEAR_STATE,4,2 ## @PACKET3_PREAMBLE_BEGIN_CLEAR_STATE
	.comm	_PACKET3_CONTEXT_CONTROL,4,2    ## @PACKET3_CONTEXT_CONTROL
	.comm	_cik_default_state,8,3          ## @cik_default_state
	.comm	_PACKET3_PREAMBLE_END_CLEAR_STATE,4,2 ## @PACKET3_PREAMBLE_END_CLEAR_STATE
	.comm	_PACKET3_CLEAR_STATE,4,2        ## @PACKET3_CLEAR_STATE
	.comm	_PACKET3_SET_CONTEXT_REG,4,2    ## @PACKET3_SET_CONTEXT_REG
	.no_dead_strip	_cik_cp_gfx_start
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cik_cp_gfx_start
_cik_cp_gfx_start:                      ; @cik_cp_gfx_start
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	x8, [x0, #8]
Lloh0:
	adrp	x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_RING_TYPE_GFX_INDEX@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x20, x8, x9, lsl #2
Lloh3:
	adrp	x8, _CP_MAX_CONTEXT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CP_MAX_CONTEXT@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	ldr	w8, [x19]
	sub	w1, w8, #1
	bl	_WREG32
Lloh6:
	adrp	x8, _CP_ENDIAN_SWAP@GOTPAGE
Lloh7:
	ldr	x8, [x8, _CP_ENDIAN_SWAP@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh9:
	adrp	x8, _CP_DEVICE_ID@GOTPAGE
Lloh10:
	ldr	x8, [x8, _CP_DEVICE_ID@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	mov	w1, #1
	bl	_WREG32
	mov	x0, x19
	mov	w1, #1
	bl	_cik_cp_gfx_enable
Lloh12:
	adrp	x22, _cik_default_size@GOTPAGE
Lloh13:
	ldr	x22, [x22, _cik_default_size@GOTPAGEOFF]
	ldr	w8, [x22]
	add	w2, w8, #17
	mov	x0, x19
	mov	x1, x20
	bl	_radeon_ring_lock
	cbz	w0, LBB0_2
; %bb.1:
	mov	x21, x0
Lloh14:
	adrp	x0, l_.str@PAGE
Lloh15:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x21
	bl	_DRM_ERROR
	b	LBB0_6
LBB0_2:
Lloh16:
	adrp	x8, _PACKET3_SET_BASE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PACKET3_SET_BASE@GOTPAGEOFF]
Lloh18:
	ldr	w0, [x8]
	mov	w1, #2
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
Lloh19:
	adrp	x8, _CE_PARTITION_BASE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _CE_PARTITION_BASE@GOTPAGEOFF]
Lloh21:
	ldr	w0, [x8]
	bl	_PACKET3_BASE_INDEX
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #32768
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #32768
	bl	_radeon_ring_write
Lloh22:
	adrp	x21, _PACKET3_PREAMBLE_CNTL@GOTPAGE
Lloh23:
	ldr	x21, [x21, _PACKET3_PREAMBLE_CNTL@GOTPAGEOFF]
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
Lloh24:
	adrp	x8, _PACKET3_PREAMBLE_BEGIN_CLEAR_STATE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PACKET3_PREAMBLE_BEGIN_CLEAR_STATE@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_radeon_ring_write
Lloh27:
	adrp	x8, _PACKET3_CONTEXT_CONTROL@GOTPAGE
Lloh28:
	ldr	x8, [x8, _PACKET3_CONTEXT_CONTROL@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
	mov	w1, #1
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #-2147483648
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #-2147483648
	bl	_radeon_ring_write
	ldr	w8, [x22]
	cmp	w8, #1
	b.lt	LBB0_5
; %bb.3:
	mov	x23, #0
Lloh30:
	adrp	x24, _cik_default_state@GOTPAGE
Lloh31:
	ldr	x24, [x24, _cik_default_state@GOTPAGEOFF]
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x24]
	ldr	w1, [x8, x23, lsl #2]
	mov	x0, x20
	bl	_radeon_ring_write
	add	x23, x23, #1
	ldrsw	x8, [x22]
	cmp	x23, x8
	b.lt	LBB0_4
LBB0_5:
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
Lloh32:
	adrp	x8, _PACKET3_PREAMBLE_END_CLEAR_STATE@GOTPAGE
Lloh33:
	ldr	x8, [x8, _PACKET3_PREAMBLE_END_CLEAR_STATE@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_radeon_ring_write
Lloh35:
	adrp	x8, _PACKET3_CLEAR_STATE@GOTPAGE
Lloh36:
	ldr	x8, [x8, _PACKET3_CLEAR_STATE@GOTPAGEOFF]
Lloh37:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #0
	bl	_radeon_ring_write
Lloh38:
	adrp	x8, _PACKET3_SET_CONTEXT_REG@GOTPAGE
Lloh39:
	ldr	x8, [x8, _PACKET3_SET_CONTEXT_REG@GOTPAGEOFF]
Lloh40:
	ldr	w0, [x8]
	mov	w1, #2
	bl	_PACKET3
	mov	x1, x0
	mov	x0, x20
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #790
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #14
	bl	_radeon_ring_write
	mov	x0, x20
	mov	w1, #16
	bl	_radeon_ring_write
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	bl	_radeon_ring_unlock_commit
	mov	w21, #0
LBB0_6:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_RING_TYPE_GFX_INDEX,8,3 ; @RADEON_RING_TYPE_GFX_INDEX
	.comm	_CP_MAX_CONTEXT,4,2             ; @CP_MAX_CONTEXT
	.comm	_CP_ENDIAN_SWAP,4,2             ; @CP_ENDIAN_SWAP
	.comm	_CP_DEVICE_ID,4,2               ; @CP_DEVICE_ID
	.comm	_cik_default_size,4,2           ; @cik_default_size
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"radeon: cp failed to lock ring (%d).\n"

	.comm	_PACKET3_SET_BASE,4,2           ; @PACKET3_SET_BASE
	.comm	_CE_PARTITION_BASE,4,2          ; @CE_PARTITION_BASE
	.comm	_PACKET3_PREAMBLE_CNTL,4,2      ; @PACKET3_PREAMBLE_CNTL
	.comm	_PACKET3_PREAMBLE_BEGIN_CLEAR_STATE,4,2 ; @PACKET3_PREAMBLE_BEGIN_CLEAR_STATE
	.comm	_PACKET3_CONTEXT_CONTROL,4,2    ; @PACKET3_CONTEXT_CONTROL
	.comm	_cik_default_state,8,3          ; @cik_default_state
	.comm	_PACKET3_PREAMBLE_END_CLEAR_STATE,4,2 ; @PACKET3_PREAMBLE_END_CLEAR_STATE
	.comm	_PACKET3_CLEAR_STATE,4,2        ; @PACKET3_CLEAR_STATE
	.comm	_PACKET3_SET_CONTEXT_REG,4,2    ; @PACKET3_SET_CONTEXT_REG
	.no_dead_strip	_cik_cp_gfx_start
.subsections_via_symbols
