	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function hdmi_set_refclk
_hdmi_set_refclk:                       ## @hdmi_set_refclk
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	(%rdi), %edi
	testl	%edi, %edi
	je	LBB0_1
## %bb.2:
	movq	_EXYNOS5433_SYSREG_DISP_HDMI_PHY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_SYSREG_HDMI_REFCLK_INT_CLK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	xorl	%ecx, %ecx
	negl	%esi
	sbbl	%ecx, %ecx
	movl	%eax, %esi
	popq	%rbp
	jmp	_regmap_update_bits             ## TAILCALL
LBB0_1:
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EXYNOS5433_SYSREG_DISP_HDMI_PHY,4,2 ## @EXYNOS5433_SYSREG_DISP_HDMI_PHY
	.comm	_SYSREG_HDMI_REFCLK_INT_CLK,4,2 ## @SYSREG_HDMI_REFCLK_INT_CLK
	.no_dead_strip	_hdmi_set_refclk
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function hdmi_set_refclk
_hdmi_set_refclk:                       ; @hdmi_set_refclk
	.cfi_startproc
; %bb.0:
	ldr	w0, [x0]
	cbz	w0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _EXYNOS5433_SYSREG_DISP_HDMI_PHY@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EXYNOS5433_SYSREG_DISP_HDMI_PHY@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _SYSREG_HDMI_REFCLK_INT_CLK@GOTPAGE
Lloh4:
	ldr	x9, [x9, _SYSREG_HDMI_REFCLK_INT_CLK@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x9]
	cmp	w1, #0
	csetm	w3, ne
	mov	x1, x8
	b	_regmap_update_bits
LBB0_2:
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_EXYNOS5433_SYSREG_DISP_HDMI_PHY,4,2 ; @EXYNOS5433_SYSREG_DISP_HDMI_PHY
	.comm	_SYSREG_HDMI_REFCLK_INT_CLK,4,2 ; @SYSREG_HDMI_REFCLK_INT_CLK
	.no_dead_strip	_hdmi_set_refclk
.subsections_via_symbols
