	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sumo_set_uvd_clock
_sumo_set_uvd_clock:                    ## @sumo_set_uvd_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r15d
	movl	%edx, %r14d
	movl	%esi, %edx
	movq	_COMPUTE_ENGINE_PLL_PARAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-32(%rbp), %r8
	xorl	%ecx, %ecx
	callq	_radeon_atom_get_clock_dividers
	testl	%eax, %eax
	jne	LBB0_6
## %bb.1:
	movl	-32(%rbp), %esi
	movq	_DCLK_DIR_CNTL_EN@GOTPCREL(%rip), %rax
	movq	_DCLK_DIVIDER_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	notl	%edx
	movl	%r14d, %edi
	callq	_WREG32_P
	movl	$100, %ebx
	movq	_DCLK_STATUS@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movl	%r15d, %edi
	callq	_RREG32
	testl	%eax, (%r14)
	jne	LBB0_3
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	$10, %edi
	callq	_mdelay
	decl	%ebx
	jne	LBB0_2
## %bb.5:
	movq	_ETIMEDOUT@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_6
LBB0_3:
	xorl	%eax, %eax
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ## @COMPUTE_ENGINE_PLL_PARAM
	.comm	_DCLK_DIR_CNTL_EN,4,2           ## @DCLK_DIR_CNTL_EN
	.comm	_DCLK_DIVIDER_MASK,4,2          ## @DCLK_DIVIDER_MASK
	.comm	_DCLK_STATUS,4,2                ## @DCLK_STATUS
	.comm	_ETIMEDOUT,4,2                  ## @ETIMEDOUT
	.no_dead_strip	_sumo_set_uvd_clock
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sumo_set_uvd_clock
_sumo_set_uvd_clock:                    ; @sumo_set_uvd_clock
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x3
	mov	x20, x2
	mov	x2, x1
Lloh0:
	adrp	x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGE
Lloh1:
	ldr	x8, [x8, _COMPUTE_ENGINE_PLL_PARAM@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x4, sp, #8
	mov	w3, #0
	bl	_radeon_atom_get_clock_dividers
	cbnz	w0, LBB0_6
; %bb.1:
	ldr	w1, [sp, #8]
Lloh3:
	adrp	x8, _DCLK_DIR_CNTL_EN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DCLK_DIR_CNTL_EN@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _DCLK_DIVIDER_MASK@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DCLK_DIVIDER_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
	mvn	w2, w8
	mov	x0, x20
	bl	_WREG32_P
	mov	w20, #100
Lloh9:
	adrp	x21, _DCLK_STATUS@GOTPAGE
Lloh10:
	ldr	x21, [x21, _DCLK_STATUS@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	bl	_RREG32
	ldr	w8, [x21]
	tst	w8, w0
	b.ne	LBB0_5
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	mov	w0, #10
	bl	_mdelay
	subs	w20, w20, #1
	b.ne	LBB0_2
; %bb.4:
Lloh11:
	adrp	x8, _ETIMEDOUT@GOTPAGE
Lloh12:
	ldr	x8, [x8, _ETIMEDOUT@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_6
LBB0_5:
	mov	w0, #0
LBB0_6:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_COMPUTE_ENGINE_PLL_PARAM,4,2   ; @COMPUTE_ENGINE_PLL_PARAM
	.comm	_DCLK_DIR_CNTL_EN,4,2           ; @DCLK_DIR_CNTL_EN
	.comm	_DCLK_DIVIDER_MASK,4,2          ; @DCLK_DIVIDER_MASK
	.comm	_DCLK_STATUS,4,2                ; @DCLK_STATUS
	.comm	_ETIMEDOUT,4,2                  ; @ETIMEDOUT
	.no_dead_strip	_sumo_set_uvd_clock
.subsections_via_symbols
