	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function _dpu_plane_atomic_disable
__dpu_plane_atomic_disable:             ## @_dpu_plane_atomic_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_to_dpu_plane
	movq	%rax, %r14
	movq	(%rbx), %rdi
	callq	_to_dpu_plane_state
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	_DRMID
	movl	%eax, %r12d
	movq	%rbx, %rdi
	callq	_is_dpu_plane_virtual
	movl	4(%r15), %edx
	movl	%r12d, %edi
	movq	%rax, %rsi
	callq	_trace_dpu_plane_disable
	movl	$1, (%r15)
	movq	%rbx, %rdi
	callq	_is_dpu_plane_virtual
	testq	%rax, %rax
	je	LBB0_3
## %bb.1:
	movq	(%r14), %rdi
	testq	%rdi, %rdi
	je	LBB0_3
## %bb.2:
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	LBB0_3
## %bb.4:
	movq	_DPU_SSPP_RECT_SOLO@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	_DPU_SSPP_MULTIRECT_NONE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmpq	*%rax                           ## TAILCALL
LBB0_3:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DPU_SSPP_RECT_SOLO,4,2         ## @DPU_SSPP_RECT_SOLO
	.comm	_DPU_SSPP_MULTIRECT_NONE,4,2    ## @DPU_SSPP_MULTIRECT_NONE
	.no_dead_strip	__dpu_plane_atomic_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function _dpu_plane_atomic_disable
__dpu_plane_atomic_disable:             ; @_dpu_plane_atomic_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	bl	_to_dpu_plane
	mov	x19, x0
	ldr	x0, [x20]
	bl	_to_dpu_plane_state
	mov	x21, x0
	mov	x0, x20
	bl	_DRMID
	mov	x22, x0
	mov	x0, x20
	bl	_is_dpu_plane_virtual
	mov	x1, x0
	ldr	w2, [x21, #4]
	mov	x0, x22
	bl	_trace_dpu_plane_disable
	mov	w8, #1
	str	w8, [x21]
	mov	x0, x20
	bl	_is_dpu_plane_virtual
	cbz	x0, LBB0_4
; %bb.1:
	ldr	x0, [x19]
	cbz	x0, LBB0_4
; %bb.2:
	ldr	x3, [x0]
	cbz	x3, LBB0_4
; %bb.3:
Lloh0:
	adrp	x8, _DPU_SSPP_RECT_SOLO@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DPU_SSPP_RECT_SOLO@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _DPU_SSPP_MULTIRECT_NONE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DPU_SSPP_MULTIRECT_NONE@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	br	x3
LBB0_4:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_DPU_SSPP_RECT_SOLO,4,2         ; @DPU_SSPP_RECT_SOLO
	.comm	_DPU_SSPP_MULTIRECT_NONE,4,2    ; @DPU_SSPP_MULTIRECT_NONE
	.no_dead_strip	__dpu_plane_atomic_disable
.subsections_via_symbols
