	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vc4_rcl_surface_setup
_vc4_rcl_surface_setup:                 ## @vc4_rcl_surface_setup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	movq	%rdx, %rbx
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	(%rdx), %edi
	movq	_VC4_LOADSTORE_TILE_BUFFER_TILING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_GET_FIELD
	movq	%rax, %r14
	movl	(%rbx), %edi
	movq	_VC4_LOADSTORE_TILE_BUFFER_BUFFER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_GET_FIELD
	movq	%rax, %r15
	movl	(%rbx), %edi
	movq	_VC4_LOADSTORE_TILE_BUFFER_FORMAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_VC4_GET_FIELD
	movq	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	testl	%ecx, 4(%rbx)
	je	LBB0_6
## %bb.1:
	leaq	L_.str(%rip), %rdi
LBB0_2:
	xorl	%r12d, %r12d
	xorl	%eax, %eax
	callq	_DRM_DEBUG
LBB0_3:
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_4:
	subl	(%rax), %r12d
LBB0_5:
	movl	%r12d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	movq	%r12, -48(%rbp)                 ## 8-byte Spill
	movl	12(%rbx), %esi
	xorl	%r12d, %r12d
	cmpl	$-1, %esi
	je	LBB0_5
## %bb.7:
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	%r13, %rdi
	callq	_vc4_use_bo
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movq	%rax, (%rcx)
	testq	%rax, %rax
	je	LBB0_32
## %bb.8:
	cmpl	$0, -52(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_10
## %bb.9:
	movq	16(%r13), %rcx
	movslq	8(%r13), %rdx
	leal	1(%rdx), %esi
	movl	%esi, 8(%r13)
	movq	%rax, (%rcx,%rdx,8)
LBB0_10:
	movq	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 4(%rbx)
	je	LBB0_14
## %bb.11:
	movq	(%r13), %rax
	addq	$8, %rax
	cmpq	%rbx, %rax
	je	LBB0_16
## %bb.12:
	cmpl	$0, (%rbx)
	je	LBB0_17
## %bb.13:
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_2
LBB0_14:
	movl	(%rbx), %esi
	movq	_VC4_LOADSTORE_TILE_BUFFER_TILING_MASK@GOTPCREL(%rip), %rax
	movq	_VC4_LOADSTORE_TILE_BUFFER_BUFFER_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	notl	%ecx
	testl	%ecx, %esi
	je	LBB0_18
## %bb.15:
	leaq	L_.str.3(%rip), %rdi
	xorl	%r12d, %r12d
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	jmp	LBB0_3
LBB0_16:
	leaq	L_.str.1(%rip), %rdi
	jmp	LBB0_2
LBB0_17:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rsi
	movq	%r13, %rdi
	movq	%rbx, %rdx
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_vc4_full_res_bounds_check      ## TAILCALL
LBB0_18:
	movq	_VC4_TILING_FORMAT_LT@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r14
	jle	LBB0_20
## %bb.19:
	leaq	L_.str.4(%rip), %rdi
	jmp	LBB0_2
LBB0_20:
	movq	_VC4_LOADSTORE_TILE_BUFFER_ZS@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r15
	jne	LBB0_23
## %bb.21:
	cmpq	$0, -64(%rbp)                   ## 8-byte Folded Reload
	je	LBB0_27
## %bb.22:
	leaq	L_.str.5(%rip), %rdi
	jmp	LBB0_2
LBB0_23:
	movq	_VC4_LOADSTORE_TILE_BUFFER_COLOR@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r15
	movq	-64(%rbp), %rcx                 ## 8-byte Reload
	jne	LBB0_26
## %bb.24:
	leaq	-128(%rcx), %rax
	cmpq	$3, %rax
	jae	LBB0_30
## %bb.25:
	leaq	l_switch.table.vc4_rcl_surface_setup(%rip), %rax
	movl	-512(%rax,%rcx,4), %eax
	jmp	LBB0_28
LBB0_26:
	leaq	L_.str.7(%rip), %rdi
	xorl	%r12d, %r12d
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_DRM_DEBUG
	jmp	LBB0_3
LBB0_27:
	movl	$4, %eax
LBB0_28:
	movl	8(%rbx), %edx
	testb	$15, %dl
	je	LBB0_31
## %bb.29:
	leaq	L_.str.8(%rip), %rdi
	jmp	LBB0_2
LBB0_30:
	leaq	L_.str.6(%rip), %rdi
	jmp	LBB0_2
LBB0_31:
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movq	(%rcx), %rsi
	movq	(%r13), %rcx
	movl	(%rcx), %r9d
	movl	4(%rcx), %r8d
	movl	%eax, (%rsp)
	movq	%r13, %rdi
	movq	%r14, %rcx
	callq	_vc4_check_tex_size
	testl	%eax, %eax
	jne	LBB0_5
LBB0_32:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r12d, %r12d
	jmp	LBB0_4
	.cfi_endproc
                                        ## -- End function
	.comm	_VC4_LOADSTORE_TILE_BUFFER_TILING,4,2 ## @VC4_LOADSTORE_TILE_BUFFER_TILING
	.comm	_VC4_LOADSTORE_TILE_BUFFER_BUFFER,4,2 ## @VC4_LOADSTORE_TILE_BUFFER_BUFFER
	.comm	_VC4_LOADSTORE_TILE_BUFFER_FORMAT,4,2 ## @VC4_LOADSTORE_TILE_BUFFER_FORMAT
	.comm	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES,4,2 ## @VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Extra flags set\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
L_.str.1:                               ## @.str.1
	.asciz	"general zs write may not be a full-res.\n"

L_.str.2:                               ## @.str.2
	.asciz	"load/store general bits set with full res load/store.\n"

	.comm	_VC4_LOADSTORE_TILE_BUFFER_TILING_MASK,4,2 ## @VC4_LOADSTORE_TILE_BUFFER_TILING_MASK
	.comm	_VC4_LOADSTORE_TILE_BUFFER_BUFFER_MASK,4,2 ## @VC4_LOADSTORE_TILE_BUFFER_BUFFER_MASK
	.comm	_VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK,4,2 ## @VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK
L_.str.3:                               ## @.str.3
	.asciz	"Unknown bits in load/store: 0x%04x\n"

	.comm	_VC4_TILING_FORMAT_LT,8,3       ## @VC4_TILING_FORMAT_LT
L_.str.4:                               ## @.str.4
	.asciz	"Bad tiling format\n"

	.comm	_VC4_LOADSTORE_TILE_BUFFER_ZS,8,3 ## @VC4_LOADSTORE_TILE_BUFFER_ZS
L_.str.5:                               ## @.str.5
	.asciz	"No color format should be set for ZS\n"

	.comm	_VC4_LOADSTORE_TILE_BUFFER_COLOR,8,3 ## @VC4_LOADSTORE_TILE_BUFFER_COLOR
L_.str.6:                               ## @.str.6
	.asciz	"Bad tile buffer format\n"

L_.str.7:                               ## @.str.7
	.asciz	"Bad load/store buffer %d.\n"

L_.str.8:                               ## @.str.8
	.asciz	"load/store buffer must be 16b aligned.\n"

	.no_dead_strip	_vc4_rcl_surface_setup
	.section	__TEXT,__const
	.p2align	2                               ## @switch.table.vc4_rcl_surface_setup
l_switch.table.vc4_rcl_surface_setup:
	.long	4                               ## 0x4
	.long	2                               ## 0x2
	.long	2                               ## 0x2

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vc4_rcl_surface_setup
_vc4_rcl_surface_setup:                 ; @vc4_rcl_surface_setup
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x25, x3
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
	ldr	w0, [x2]
Lloh0:
	adrp	x8, _VC4_LOADSTORE_TILE_BUFFER_TILING@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VC4_LOADSTORE_TILE_BUFFER_TILING@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_VC4_GET_FIELD
	mov	x22, x0
	ldr	w0, [x21]
Lloh3:
	adrp	x8, _VC4_LOADSTORE_TILE_BUFFER_BUFFER@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VC4_LOADSTORE_TILE_BUFFER_BUFFER@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_VC4_GET_FIELD
	mov	x23, x0
	ldr	w0, [x21]
Lloh6:
	adrp	x8, _VC4_LOADSTORE_TILE_BUFFER_FORMAT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _VC4_LOADSTORE_TILE_BUFFER_FORMAT@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	bl	_VC4_GET_FIELD
	ldr	w8, [x21, #4]
Lloh9:
	adrp	x26, _VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPAGE
Lloh10:
	ldr	x26, [x26, _VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES@GOTPAGEOFF]
	ldr	w9, [x26]
	bics	wzr, w8, w9
	b.eq	LBB0_5
; %bb.1:
Lloh11:
	adrp	x0, l_.str@PAGE
Lloh12:
	add	x0, x0, l_.str@PAGEOFF
LBB0_2:
	bl	_DRM_DEBUG
LBB0_3:
Lloh13:
	adrp	x8, _EINVAL@GOTPAGE
Lloh14:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_4:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_5:
	ldr	w1, [x21, #12]
	cmn	w1, #1
	b.eq	LBB0_31
; %bb.6:
	mov	x24, x0
	mov	x0, x19
	bl	_vc4_use_bo
	str	x0, [x20]
	cbz	x0, LBB0_3
; %bb.7:
	cbz	w25, LBB0_9
; %bb.8:
	ldr	x8, [x19, #16]
	ldrsw	x9, [x19, #8]
	add	w10, w9, #1
	str	w10, [x19, #8]
	str	x0, [x8, x9, lsl #3]
LBB0_9:
	ldr	w8, [x21, #4]
	ldr	w9, [x26]
	tst	w9, w8
	b.eq	LBB0_13
; %bb.10:
	ldr	x8, [x19]
	add	x8, x8, #8
	cmp	x8, x21
	b.eq	LBB0_15
; %bb.11:
	ldr	w8, [x21]
	cbz	w8, LBB0_16
; %bb.12:
Lloh16:
	adrp	x0, l_.str.2@PAGE
Lloh17:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_2
LBB0_13:
	ldr	w8, [x21]
Lloh18:
	adrp	x9, _VC4_LOADSTORE_TILE_BUFFER_TILING_MASK@GOTPAGE
Lloh19:
	ldr	x9, [x9, _VC4_LOADSTORE_TILE_BUFFER_TILING_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
Lloh21:
	adrp	x10, _VC4_LOADSTORE_TILE_BUFFER_BUFFER_MASK@GOTPAGE
Lloh22:
	ldr	x10, [x10, _VC4_LOADSTORE_TILE_BUFFER_BUFFER_MASK@GOTPAGEOFF]
Lloh23:
	ldr	w10, [x10]
	orr	w9, w10, w9
Lloh24:
	adrp	x10, _VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK@GOTPAGE
Lloh25:
	ldr	x10, [x10, _VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK@GOTPAGEOFF]
Lloh26:
	ldr	w10, [x10]
	orr	w9, w9, w10
	bics	wzr, w8, w9
	b.eq	LBB0_17
; %bb.14:
	str	x8, [sp]
Lloh27:
	adrp	x0, l_.str.3@PAGE
Lloh28:
	add	x0, x0, l_.str.3@PAGEOFF
	b	LBB0_2
LBB0_15:
Lloh29:
	adrp	x0, l_.str.1@PAGE
Lloh30:
	add	x0, x0, l_.str.1@PAGEOFF
	b	LBB0_2
LBB0_16:
	ldr	x1, [x20]
	mov	x0, x19
	mov	x2, x21
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	b	_vc4_full_res_bounds_check
LBB0_17:
Lloh31:
	adrp	x8, _VC4_TILING_FORMAT_LT@GOTPAGE
Lloh32:
	ldr	x8, [x8, _VC4_TILING_FORMAT_LT@GOTPAGEOFF]
Lloh33:
	ldr	x8, [x8]
	cmp	x22, x8
	b.le	LBB0_19
; %bb.18:
Lloh34:
	adrp	x0, l_.str.4@PAGE
Lloh35:
	add	x0, x0, l_.str.4@PAGEOFF
	b	LBB0_2
LBB0_19:
Lloh36:
	adrp	x8, _VC4_LOADSTORE_TILE_BUFFER_ZS@GOTPAGE
Lloh37:
	ldr	x8, [x8, _VC4_LOADSTORE_TILE_BUFFER_ZS@GOTPAGEOFF]
Lloh38:
	ldr	x8, [x8]
	cmp	x23, x8
	b.ne	LBB0_22
; %bb.20:
	cbz	x24, LBB0_26
; %bb.21:
Lloh39:
	adrp	x0, l_.str.5@PAGE
Lloh40:
	add	x0, x0, l_.str.5@PAGEOFF
	b	LBB0_2
LBB0_22:
Lloh41:
	adrp	x8, _VC4_LOADSTORE_TILE_BUFFER_COLOR@GOTPAGE
Lloh42:
	ldr	x8, [x8, _VC4_LOADSTORE_TILE_BUFFER_COLOR@GOTPAGEOFF]
Lloh43:
	ldr	x8, [x8]
	cmp	x23, x8
	b.ne	LBB0_25
; %bb.23:
	sub	x8, x24, #128
	cmp	x8, #3
	b.hs	LBB0_29
; %bb.24:
Lloh44:
	adrp	x9, l_switch.table.vc4_rcl_surface_setup@PAGE
Lloh45:
	add	x9, x9, l_switch.table.vc4_rcl_surface_setup@PAGEOFF
	ldr	w6, [x9, x8, lsl #2]
	b	LBB0_27
LBB0_25:
	str	x23, [sp]
Lloh46:
	adrp	x0, l_.str.7@PAGE
Lloh47:
	add	x0, x0, l_.str.7@PAGEOFF
	b	LBB0_2
LBB0_26:
	mov	w6, #4
LBB0_27:
	ldr	w2, [x21, #8]
	tst	w2, #0xf
	b.eq	LBB0_30
; %bb.28:
Lloh48:
	adrp	x0, l_.str.8@PAGE
Lloh49:
	add	x0, x0, l_.str.8@PAGEOFF
	b	LBB0_2
LBB0_29:
Lloh50:
	adrp	x0, l_.str.6@PAGE
Lloh51:
	add	x0, x0, l_.str.6@PAGEOFF
	b	LBB0_2
LBB0_30:
	ldr	x1, [x20]
	ldr	x8, [x19]
	ldp	w5, w4, [x8]
	mov	x0, x19
	mov	x3, x22
	bl	_vc4_check_tex_size
	cbz	w0, LBB0_3
LBB0_31:
	mov	w0, #0
	b	LBB0_4
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh27, Lloh28
	.loh AdrpAdd	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpAdd	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpAdd	Lloh44, Lloh45
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpAdd	Lloh50, Lloh51
	.cfi_endproc
                                        ; -- End function
	.comm	_VC4_LOADSTORE_TILE_BUFFER_TILING,4,2 ; @VC4_LOADSTORE_TILE_BUFFER_TILING
	.comm	_VC4_LOADSTORE_TILE_BUFFER_BUFFER,4,2 ; @VC4_LOADSTORE_TILE_BUFFER_BUFFER
	.comm	_VC4_LOADSTORE_TILE_BUFFER_FORMAT,4,2 ; @VC4_LOADSTORE_TILE_BUFFER_FORMAT
	.comm	_VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES,4,2 ; @VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Extra flags set\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
l_.str.1:                               ; @.str.1
	.asciz	"general zs write may not be a full-res.\n"

l_.str.2:                               ; @.str.2
	.asciz	"load/store general bits set with full res load/store.\n"

	.comm	_VC4_LOADSTORE_TILE_BUFFER_TILING_MASK,4,2 ; @VC4_LOADSTORE_TILE_BUFFER_TILING_MASK
	.comm	_VC4_LOADSTORE_TILE_BUFFER_BUFFER_MASK,4,2 ; @VC4_LOADSTORE_TILE_BUFFER_BUFFER_MASK
	.comm	_VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK,4,2 ; @VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK
l_.str.3:                               ; @.str.3
	.asciz	"Unknown bits in load/store: 0x%04x\n"

	.comm	_VC4_TILING_FORMAT_LT,8,3       ; @VC4_TILING_FORMAT_LT
l_.str.4:                               ; @.str.4
	.asciz	"Bad tiling format\n"

	.comm	_VC4_LOADSTORE_TILE_BUFFER_ZS,8,3 ; @VC4_LOADSTORE_TILE_BUFFER_ZS
l_.str.5:                               ; @.str.5
	.asciz	"No color format should be set for ZS\n"

	.comm	_VC4_LOADSTORE_TILE_BUFFER_COLOR,8,3 ; @VC4_LOADSTORE_TILE_BUFFER_COLOR
l_.str.6:                               ; @.str.6
	.asciz	"Bad tile buffer format\n"

l_.str.7:                               ; @.str.7
	.asciz	"Bad load/store buffer %d.\n"

l_.str.8:                               ; @.str.8
	.asciz	"load/store buffer must be 16b aligned.\n"

	.no_dead_strip	_vc4_rcl_surface_setup
	.section	__TEXT,__const
	.p2align	2                               ; @switch.table.vc4_rcl_surface_setup
l_switch.table.vc4_rcl_surface_setup:
	.long	4                               ; 0x4
	.long	2                               ; 0x2
	.long	2                               ; 0x2

.subsections_via_symbols
