	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function si_get_vce_clock_voltage
_si_get_vce_clock_voltage:              ## @si_get_vce_clock_voltage
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rcx, %r14
	xorl	%eax, %eax
	movq	%rdx, %rcx
	orq	%rsi, %rcx
	je	LBB0_9
## %bb.1:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testq	%rdi, %rdi
	je	LBB0_10
## %bb.2:
	movq	(%rdi), %r8
	movl	$0, %ebx
	testq	%r8, %r8
	je	LBB0_16
## %bb.3:
	jle	LBB0_11
## %bb.4:
	movq	8(%rdi), %rax
	addq	$16, %rax
	movq	%r8, %rbx
	jmp	LBB0_6
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_6 Depth=1
	addq	$24, %rax
	decq	%rbx
	je	LBB0_11
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	cmpq	%rsi, -16(%rax)
	jl	LBB0_5
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=1
	cmpq	%rdx, -8(%rax)
	jl	LBB0_5
## %bb.8:
	movl	(%rax), %esi
	movl	%esi, (%r14)
	jmp	LBB0_14
LBB0_9:
	xorl	%ebx, %ebx
	jmp	LBB0_16
LBB0_10:
                                        ## implicit-def: $r8
LBB0_11:
	testl	%ecx, %ecx
	je	LBB0_13
## %bb.12:
	negl	%ecx
	movq	8(%rdi), %rax
	leaq	(%r8,%r8,2), %rdx
	movl	-8(%rax,%rdx,8), %esi
	movl	%esi, (%r14)
	movl	%ecx, %ebx
	jmp	LBB0_15
LBB0_13:
	movl	(%r14), %esi
LBB0_14:
	xorl	%ebx, %ebx
LBB0_15:
	callq	_si_get_lower_of_leakage_and_vce_voltage
LBB0_16:
	movl	%eax, (%r14)
	movl	%ebx, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_si_get_vce_clock_voltage
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function si_get_vce_clock_voltage
_si_get_vce_clock_voltage:              ; @si_get_vce_clock_voltage
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x3
	orr	x8, x2, x1
	cbz	x8, LBB0_9
; %bb.1:
Lloh0:
	adrp	x8, _EINVAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x8]
	cbz	x0, LBB0_10
; %bb.2:
	ldr	x8, [x0]
	cbz	x8, LBB0_9
; %bb.3:
	cmp	x8, #1
	b.lt	LBB0_11
; %bb.4:
	ldr	x10, [x0, #8]
	add	x10, x10, #16
	mov	x11, x8
	b	LBB0_6
LBB0_5:                                 ;   in Loop: Header=BB0_6 Depth=1
	add	x10, x10, #24
	subs	x11, x11, #1
	b.eq	LBB0_11
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldur	x12, [x10, #-16]
	cmp	x12, x1
	b.lt	LBB0_5
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	ldur	x12, [x10, #-8]
	cmp	x12, x2
	b.lt	LBB0_5
; %bb.8:
	mov	w20, #0
	ldr	w1, [x10]
	b	LBB0_13
LBB0_9:
	mov	w0, #0
	mov	w20, #0
	b	LBB0_16
LBB0_10:
                                        ; implicit-def: $x8
LBB0_11:
	cbz	w9, LBB0_14
; %bb.12:
	neg	w20, w9
	ldr	x9, [x0, #8]
	mov	w10, #24
	madd	x8, x8, x10, x9
	ldur	w1, [x8, #-8]
LBB0_13:
	str	w1, [x19]
	b	LBB0_15
LBB0_14:
	mov	w20, #0
	ldr	w1, [x19]
LBB0_15:
	bl	_si_get_lower_of_leakage_and_vce_voltage
LBB0_16:
	str	w0, [x19]
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_si_get_vce_clock_voltage
.subsections_via_symbols
