	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function i965_write_fence_reg
_i965_write_fence_reg:                  ## @i965_write_fence_reg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r12
	movq	(%rdi), %rdi
	callq	_INTEL_GEN
	movl	8(%r12), %edi
	cmpl	$6, %eax
	jl	LBB0_2
## %bb.1:
	callq	_FENCE_REG_GEN6_LO
	movl	%eax, %r14d
	movl	8(%r12), %edi
	callq	_FENCE_REG_GEN6_HI
	jmp	LBB0_3
LBB0_2:
	callq	_FENCE_REG_965_LO
	movl	%eax, %r14d
	movl	8(%r12), %edi
	callq	_FENCE_REG_965_HI
LBB0_3:
	movl	%eax, %r15d
	testq	%rbx, %rbx
	je	LBB0_4
## %bb.5:
	movl	%r15d, -44(%rbp)                ## 4-byte Spill
	movl	4(%rbx), %edi
	callq	_i915_gem_object_get_stride
	movl	%eax, %r13d
	movq	%rbx, %rdi
	callq	_i915_vma_is_map_and_fenceable
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	callq	_GEM_BUG_ON
	movl	8(%rbx), %edi
	movq	_I965_FENCE_PAGE@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_IS_ALIGNED
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	callq	_GEM_BUG_ON
	movl	(%rbx), %edi
	movl	(%r15), %esi
	callq	_IS_ALIGNED
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	callq	_GEM_BUG_ON
	movl	%r13d, %edi
	movl	$128, %esi
	callq	_IS_ALIGNED
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	callq	_GEM_BUG_ON
	movl	4(%rbx), %edi
	callq	_i915_gem_object_get_tiling
	movq	_I915_TILING_Y@GOTPCREL(%rip), %rcx
	movl	$-1, %r13d
	cmpq	(%rcx), %rax
	jne	LBB0_7
## %bb.6:
	movq	_I965_FENCE_TILING_Y_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_BIT
LBB0_7:
	movl	-44(%rbp), %r15d                ## 4-byte Reload
	jmp	LBB0_8
LBB0_4:
	xorl	%r13d, %r13d
LBB0_8:
	movq	_pipelined@GOTPCREL(%rip), %rax
	cmpl	$0, (%rax)
	je	LBB0_10
## %bb.9:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	movq	(%r12), %rbx
	movq	%rbx, %rdi
	movl	%r14d, %esi
	xorl	%edx, %edx
	callq	_intel_uncore_write_fw
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_intel_uncore_posting_read_fw
	movl	%r13d, %edi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_intel_uncore_write_fw
	movl	%r13d, %edi
	callq	_lower_32_bits
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_intel_uncore_write_fw
	movq	%rbx, %rdi
	movl	%r14d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_uncore_posting_read_fw   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_GEN6_FENCE_PITCH_SHIFT,4,2     ## @GEN6_FENCE_PITCH_SHIFT
	.comm	_I965_FENCE_PITCH_SHIFT,4,2     ## @I965_FENCE_PITCH_SHIFT
	.comm	_I965_FENCE_PAGE,4,2            ## @I965_FENCE_PAGE
	.comm	_I915_TILING_Y,8,3              ## @I915_TILING_Y
	.comm	_I965_FENCE_TILING_Y_SHIFT,4,2  ## @I965_FENCE_TILING_Y_SHIFT
	.comm	_I965_FENCE_REG_VALID,4,2       ## @I965_FENCE_REG_VALID
	.comm	_pipelined,4,2                  ## @pipelined
	.no_dead_strip	_i965_write_fence_reg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function i965_write_fence_reg
_i965_write_fence_reg:                  ; @i965_write_fence_reg
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x1
	mov	x20, x0
	ldr	x0, [x0]
	bl	_INTEL_GEN
	mov	x8, x0
	ldr	w0, [x20, #8]
	cmp	w8, #6
	b.lt	LBB0_2
; %bb.1:
	bl	_FENCE_REG_GEN6_LO
	mov	x19, x0
	ldr	w0, [x20, #8]
	bl	_FENCE_REG_GEN6_HI
	mov	x21, x0
	cbnz	x22, LBB0_3
	b	LBB0_6
LBB0_2:
	bl	_FENCE_REG_965_LO
	mov	x19, x0
	ldr	w0, [x20, #8]
	bl	_FENCE_REG_965_HI
	mov	x21, x0
	cbz	x22, LBB0_6
LBB0_3:
	ldr	w0, [x22, #4]
	bl	_i915_gem_object_get_stride
	mov	x23, x0
	mov	x0, x22
	bl	_i915_vma_is_map_and_fenceable
	cmp	w0, #0
	cset	w0, eq
	bl	_GEM_BUG_ON
	ldr	w0, [x22, #8]
Lloh0:
	adrp	x24, _I965_FENCE_PAGE@GOTPAGE
Lloh1:
	ldr	x24, [x24, _I965_FENCE_PAGE@GOTPAGEOFF]
	ldr	w1, [x24]
	bl	_IS_ALIGNED
	cmp	w0, #0
	cset	w0, eq
	bl	_GEM_BUG_ON
	ldr	w0, [x22]
	ldr	w1, [x24]
	bl	_IS_ALIGNED
	cmp	w0, #0
	cset	w0, eq
	bl	_GEM_BUG_ON
	mov	x0, x23
	mov	w1, #128
	bl	_IS_ALIGNED
	cmp	w0, #0
	cset	w0, eq
	bl	_GEM_BUG_ON
	ldr	w0, [x22, #4]
	bl	_i915_gem_object_get_tiling
Lloh2:
	adrp	x8, _I915_TILING_Y@GOTPAGE
Lloh3:
	ldr	x8, [x8, _I915_TILING_Y@GOTPAGEOFF]
Lloh4:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_5
; %bb.4:
Lloh5:
	adrp	x8, _I965_FENCE_TILING_Y_SHIFT@GOTPAGE
Lloh6:
	ldr	x8, [x8, _I965_FENCE_TILING_Y_SHIFT@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	bl	_BIT
LBB0_5:
	mov	w22, #-1
LBB0_6:
Lloh8:
	adrp	x8, _pipelined@GOTPAGE
Lloh9:
	ldr	x8, [x8, _pipelined@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	cbz	w8, LBB0_8
; %bb.7:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_8:
	ldr	x20, [x20]
	mov	x0, x20
	mov	x1, x19
	mov	w2, #0
	bl	_intel_uncore_write_fw
	mov	x0, x20
	mov	x1, x19
	bl	_intel_uncore_posting_read_fw
	mov	x0, x22
	bl	_upper_32_bits
	mov	x2, x0
	mov	x0, x20
	mov	x1, x21
	bl	_intel_uncore_write_fw
	mov	x0, x22
	bl	_lower_32_bits
	mov	x2, x0
	mov	x0, x20
	mov	x1, x19
	bl	_intel_uncore_write_fw
	mov	x0, x20
	mov	x1, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_intel_uncore_posting_read_fw
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.comm	_GEN6_FENCE_PITCH_SHIFT,4,2     ; @GEN6_FENCE_PITCH_SHIFT
	.comm	_I965_FENCE_PITCH_SHIFT,4,2     ; @I965_FENCE_PITCH_SHIFT
	.comm	_I965_FENCE_PAGE,4,2            ; @I965_FENCE_PAGE
	.comm	_I915_TILING_Y,8,3              ; @I915_TILING_Y
	.comm	_I965_FENCE_TILING_Y_SHIFT,4,2  ; @I965_FENCE_TILING_Y_SHIFT
	.comm	_I965_FENCE_REG_VALID,4,2       ; @I965_FENCE_REG_VALID
	.comm	_pipelined,4,2                  ; @pipelined
	.no_dead_strip	_i965_write_fence_reg
.subsections_via_symbols
