	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vm_init                 ## -- Begin function amdgpu_vm_init
	.p2align	4, 0x90
_amdgpu_vm_init:                        ## @amdgpu_vm_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
                                        ## kill: def $ecx killed $ecx def $rcx
	movl	%edx, %r13d
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movq	_RB_ROOT_CACHED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 88(%rsi)
	movq	_AMDGPU_MAX_VMHUBS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	testl	%edx, %edx
	jle	LBB0_7
## %bb.1:
	leaq	-1(%rdx), %rsi
	movl	%edx, %eax
	andl	$3, %eax
	cmpq	$3, %rsi
	jae	LBB0_3
## %bb.2:
	xorl	%edi, %edi
	jmp	LBB0_5
LBB0_3:
	andl	$-4, %edx
	xorl	%edi, %edi
	.p2align	4, 0x90
LBB0_4:                                 ## =>This Inner Loop Header: Depth=1
	movq	80(%rbx), %rsi
	movq	$0, (%rsi,%rdi,8)
	movq	80(%rbx), %rsi
	movq	$0, 8(%rsi,%rdi,8)
	movq	80(%rbx), %rsi
	movq	$0, 16(%rsi,%rdi,8)
	movq	80(%rbx), %rsi
	movq	$0, 24(%rsi,%rdi,8)
	addq	$4, %rdi
	cmpq	%rdi, %rdx
	jne	LBB0_4
LBB0_5:
	testq	%rax, %rax
	je	LBB0_7
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	80(%rbx), %rdx
	movq	$0, (%rdx,%rdi,8)
	incq	%rdi
	decq	%rax
	jne	LBB0_6
LBB0_7:
	movq	%rcx, -64(%rbp)                 ## 8-byte Spill
	leaq	72(%rbx), %rdi
	callq	_INIT_LIST_HEAD
	leaq	68(%rbx), %rdi
	callq	_INIT_LIST_HEAD
	leaq	64(%rbx), %rdi
	callq	_INIT_LIST_HEAD
	leaq	60(%rbx), %rdi
	callq	_INIT_LIST_HEAD
	leaq	56(%rbx), %rdi
	callq	_INIT_LIST_HEAD
	leaq	52(%rbx), %rdi
	callq	_spin_lock_init
	leaq	48(%rbx), %rdi
	callq	_INIT_LIST_HEAD
	leaq	12(%rbx), %r12
	movl	24(%r15), %edx
	movl	28(%r15), %esi
	movq	%r12, %rdi
	xorl	%ecx, %ecx
	callq	_drm_sched_entity_init
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_31
## %bb.8:
	movl	$0, (%rbx)
	movq	_AMDGPU_VM_CONTEXT_COMPUTE@GOTPCREL(%rip), %r14
	movl	8(%r15), %ecx
	cmpl	%r13d, (%r14)
	jne	LBB0_11
## %bb.9:
	movq	_AMDGPU_VM_USE_CPU_FOR_COMPUTE@GOTPCREL(%rip), %rdx
	xorl	%eax, %eax
	andl	(%rdx), %ecx
	setne	%al
	movl	%eax, 4(%rbx)
	movq	(%r15), %rcx
	movq	_CHIP_RAVEN@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jne	LBB0_12
## %bb.10:
	movl	$1, (%rbx)
	jmp	LBB0_12
LBB0_11:
	movq	_AMDGPU_VM_USE_CPU_FOR_GFX@GOTPCREL(%rip), %rdx
	xorl	%eax, %eax
	andl	(%rdx), %ecx
	setne	%al
	movl	%eax, 4(%rbx)
LBB0_12:
	testl	%eax, %eax
	leaq	L_.str.2(%rip), %rax
	leaq	L_.str.1(%rip), %rsi
	cmoveq	%rax, %rsi
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_DRIVER
	cmpl	$0, 4(%rbx)
	je	LBB0_13
## %bb.14:
	leaq	32(%r15), %rdi
	callq	_amdgpu_gmc_vram_full_visible
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	jmp	LBB0_15
LBB0_13:
	xorl	%edi, %edi
LBB0_15:
	leaq	L_.str.3(%rip), %rsi
	callq	_WARN_ONCE
	cmpl	$0, 4(%rbx)
	jne	LBB0_16
## %bb.17:
	movq	_amdgpu_vm_sdma_funcs@GOTPCREL(%rip), %rax
	jmp	LBB0_18
LBB0_16:
	movq	_amdgpu_vm_cpu_funcs@GOTPCREL(%rip), %rax
LBB0_18:
	movq	%rax, 40(%rbx)
	movq	$0, 32(%rbx)
	movl	20(%r15), %edx
	leaq	-48(%rbp), %rcx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_amdgpu_vm_bo_param
	cmpl	%r13d, (%r14)
	jne	LBB0_20
## %bb.19:
	movq	_AMDGPU_GEM_CREATE_SHADOW@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, -48(%rbp)
LBB0_20:
	leaq	-48(%rbp), %rsi
	leaq	-56(%rbp), %rdx
	movq	%r15, %rdi
	callq	_amdgpu_bo_create
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_30
## %bb.21:
	movq	-56(%rbp), %rdi
	movl	$1, %esi
	callq	_amdgpu_bo_reserve
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_29
## %bb.22:
	movq	-56(%rbp), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_dma_resv_reserve_shared
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_28
## %bb.23:
	leaq	16(%rbx), %r13
	movq	-56(%rbp), %rdx
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	_amdgpu_vm_bo_base_init
	movq	-56(%rbp), %rdx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_amdgpu_vm_clear_bo
	movl	%eax, %r14d
	testl	%eax, %eax
	je	LBB0_24
LBB0_28:
	movq	16(%rbx), %rdi
	callq	_amdgpu_bo_unreserve
LBB0_29:
	leaq	16(%rbx), %r15
	movq	16(%rbx), %rdi
	callq	_amdgpu_bo_unref
	movq	%r15, %rdi
	callq	_amdgpu_bo_unref
	movq	$0, 16(%rbx)
LBB0_30:
	movq	%r12, %rdi
	callq	_drm_sched_entity_destroy
LBB0_31:
	movl	%r14d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_24:
	movq	(%r13), %rdi
	callq	_amdgpu_bo_unreserve
	movq	-64(%rbp), %r14                 ## 8-byte Reload
	testl	%r14d, %r14d
	je	LBB0_27
## %bb.25:
	leaq	12(%r15), %r13
	movq	%r13, %rdi
	callq	_spin_lock_irqsave
	addq	$16, %r15
	leal	1(%r14), %ecx
	movq	_GFP_ATOMIC@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_idr_alloc
	movq	%r14, %r15
	movl	%eax, %r14d
	movq	%r13, %rdi
	callq	_spin_unlock_irqrestore
	testl	%r14d, %r14d
	js	LBB0_29
## %bb.26:
	movl	%r15d, 8(%rbx)
LBB0_27:
	movl	24(%rbx), %edi
	callq	_INIT_KFIFO
	xorl	%r14d, %r14d
	jmp	LBB0_31
	.cfi_endproc
                                        ## -- End function
	.comm	_RB_ROOT_CACHED,4,2             ## @RB_ROOT_CACHED
	.comm	_AMDGPU_MAX_VMHUBS,4,2          ## @AMDGPU_MAX_VMHUBS
	.comm	_AMDGPU_VM_CONTEXT_COMPUTE,4,2  ## @AMDGPU_VM_CONTEXT_COMPUTE
	.comm	_AMDGPU_VM_USE_CPU_FOR_COMPUTE,4,2 ## @AMDGPU_VM_USE_CPU_FOR_COMPUTE
	.comm	_CHIP_RAVEN,8,3                 ## @CHIP_RAVEN
	.comm	_AMDGPU_VM_USE_CPU_FOR_GFX,4,2  ## @AMDGPU_VM_USE_CPU_FOR_GFX
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"VM update mode is %s\n"

L_.str.1:                               ## @.str.1
	.asciz	"CPU"

L_.str.2:                               ## @.str.2
	.asciz	"SDMA"

L_.str.3:                               ## @.str.3
	.asciz	"CPU update of VM recommended only for large BAR system\n"

	.comm	_amdgpu_vm_cpu_funcs,4,2        ## @amdgpu_vm_cpu_funcs
	.comm	_amdgpu_vm_sdma_funcs,4,2       ## @amdgpu_vm_sdma_funcs
	.comm	_AMDGPU_GEM_CREATE_SHADOW,4,2   ## @AMDGPU_GEM_CREATE_SHADOW
	.comm	_GFP_ATOMIC,4,2                 ## @GFP_ATOMIC
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_vm_init                 ; -- Begin function amdgpu_vm_init
	.p2align	2
_amdgpu_vm_init:                        ; @amdgpu_vm_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x3
	mov	x23, x2
	mov	x19, x1
	mov	x21, x0
Lloh0:
	adrp	x8, _RB_ROOT_CACHED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RB_ROOT_CACHED@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	str	w8, [x1, #88]
Lloh3:
	adrp	x8, _AMDGPU_MAX_VMHUBS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AMDGPU_MAX_VMHUBS@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x8, #0
	lsl	x9, x9, #3
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x10, [x19, #80]
	str	xzr, [x10, x8]
	add	x8, x8, #8
	cmp	x9, x8
	b.ne	LBB0_2
LBB0_3:
	add	x0, x19, #72
	bl	_INIT_LIST_HEAD
	add	x0, x19, #68
	bl	_INIT_LIST_HEAD
	add	x0, x19, #64
	bl	_INIT_LIST_HEAD
	add	x0, x19, #60
	bl	_INIT_LIST_HEAD
	add	x0, x19, #56
	bl	_INIT_LIST_HEAD
	add	x0, x19, #52
	bl	_spin_lock_init
	add	x0, x19, #48
	bl	_INIT_LIST_HEAD
	add	x22, x19, #12
	ldp	w2, w1, [x21, #24]
	mov	x0, x22
	mov	x3, #0
	bl	_drm_sched_entity_init
	mov	x24, x0
	cbnz	w0, LBB0_20
; %bb.4:
	str	wzr, [x19]
Lloh6:
	adrp	x24, _AMDGPU_VM_CONTEXT_COMPUTE@GOTPAGE
Lloh7:
	ldr	x24, [x24, _AMDGPU_VM_CONTEXT_COMPUTE@GOTPAGEOFF]
	ldr	w9, [x24]
	ldr	w8, [x21, #8]
	cmp	w9, w23
	b.ne	LBB0_7
; %bb.5:
Lloh8:
	adrp	x9, _AMDGPU_VM_USE_CPU_FOR_COMPUTE@GOTPAGE
Lloh9:
	ldr	x9, [x9, _AMDGPU_VM_USE_CPU_FOR_COMPUTE@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w8, ne
	str	w8, [x19, #4]
	ldr	x9, [x21]
Lloh11:
	adrp	x10, _CHIP_RAVEN@GOTPAGE
Lloh12:
	ldr	x10, [x10, _CHIP_RAVEN@GOTPAGEOFF]
Lloh13:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_8
; %bb.6:
	mov	w9, #1
	str	w9, [x19]
	b	LBB0_8
LBB0_7:
Lloh14:
	adrp	x9, _AMDGPU_VM_USE_CPU_FOR_GFX@GOTPAGE
Lloh15:
	ldr	x9, [x9, _AMDGPU_VM_USE_CPU_FOR_GFX@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	tst	w9, w8
	cset	w8, ne
	str	w8, [x19, #4]
LBB0_8:
Lloh17:
	adrp	x9, l_.str.1@PAGE
Lloh18:
	add	x9, x9, l_.str.1@PAGEOFF
Lloh19:
	adrp	x10, l_.str.2@PAGE
Lloh20:
	add	x10, x10, l_.str.2@PAGEOFF
	cmp	w8, #0
	csel	x1, x10, x9, eq
Lloh21:
	adrp	x0, l_.str@PAGE
Lloh22:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
	ldr	w8, [x19, #4]
	cbz	w8, LBB0_10
; %bb.9:
	add	x0, x21, #32
	bl	_amdgpu_gmc_vram_full_visible
	cmp	w0, #0
	cset	w0, eq
	b	LBB0_11
LBB0_10:
	mov	w0, #0
LBB0_11:
Lloh23:
	adrp	x1, l_.str.3@PAGE
Lloh24:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_WARN_ONCE
Lloh25:
	adrp	x8, _amdgpu_vm_cpu_funcs@GOTPAGE
Lloh26:
	ldr	x8, [x8, _amdgpu_vm_cpu_funcs@GOTPAGEOFF]
Lloh27:
	adrp	x9, _amdgpu_vm_sdma_funcs@GOTPAGE
Lloh28:
	ldr	x9, [x9, _amdgpu_vm_sdma_funcs@GOTPAGEOFF]
	ldr	w10, [x19, #4]
	cmp	w10, #0
	csel	x8, x9, x8, eq
	stp	xzr, x8, [x19, #32]
	ldr	w2, [x21, #20]
	add	x3, sp, #8
	mov	x0, x21
	mov	x1, x19
	bl	_amdgpu_vm_bo_param
	ldr	w8, [x24]
	cmp	w8, w23
	b.ne	LBB0_13
; %bb.12:
Lloh29:
	adrp	x8, _AMDGPU_GEM_CREATE_SHADOW@GOTPAGE
Lloh30:
	ldr	x8, [x8, _AMDGPU_GEM_CREATE_SHADOW@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	ldr	w9, [sp, #8]
	bic	w8, w9, w8
	str	w8, [sp, #8]
LBB0_13:
	add	x1, sp, #8
	mov	x2, sp
	mov	x0, x21
	bl	_amdgpu_bo_create
	mov	x24, x0
	cbnz	w0, LBB0_19
; %bb.14:
	ldr	x0, [sp]
	mov	w1, #1
	bl	_amdgpu_bo_reserve
	mov	x24, x0
	cbnz	w0, LBB0_18
; %bb.15:
	ldr	x8, [sp]
	ldr	w0, [x8]
	mov	w1, #1
	bl	_dma_resv_reserve_shared
	mov	x24, x0
	cbnz	w0, LBB0_17
; %bb.16:
	add	x23, x19, #16
	ldr	x2, [sp]
	mov	x0, x23
	mov	x1, x19
	bl	_amdgpu_vm_bo_base_init
	ldr	x2, [sp]
	mov	x0, x21
	mov	x1, x19
	bl	_amdgpu_vm_clear_bo
	mov	x24, x0
	cbz	w0, LBB0_21
LBB0_17:
	ldr	x0, [x19, #16]
	bl	_amdgpu_bo_unreserve
LBB0_18:
	ldr	x0, [x19, #16]!
	bl	_amdgpu_bo_unref
	mov	x0, x19
	bl	_amdgpu_bo_unref
	str	xzr, [x19]
LBB0_19:
	mov	x0, x22
	bl	_drm_sched_entity_destroy
LBB0_20:
	mov	x0, x24
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_21:
	ldr	x0, [x23]
	bl	_amdgpu_bo_unreserve
	cbz	w20, LBB0_24
; %bb.22:
	add	x23, x21, #12
	mov	x0, x23
	bl	_spin_lock_irqsave
	add	x0, x21, #16
	add	w3, w20, #1
Lloh32:
	adrp	x8, _GFP_ATOMIC@GOTPAGE
Lloh33:
	ldr	x8, [x8, _GFP_ATOMIC@GOTPAGEOFF]
Lloh34:
	ldr	w4, [x8]
	mov	x1, x19
	mov	x2, x20
	bl	_idr_alloc
	mov	x24, x0
	mov	x0, x23
	bl	_spin_unlock_irqrestore
	tbnz	w24, #31, LBB0_18
; %bb.23:
	str	w20, [x19, #8]
LBB0_24:
	ldr	w0, [x19, #24]
	bl	_INIT_KFIFO
	mov	w24, #0
	b	LBB0_20
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpAdd	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.cfi_endproc
                                        ; -- End function
	.comm	_RB_ROOT_CACHED,4,2             ; @RB_ROOT_CACHED
	.comm	_AMDGPU_MAX_VMHUBS,4,2          ; @AMDGPU_MAX_VMHUBS
	.comm	_AMDGPU_VM_CONTEXT_COMPUTE,4,2  ; @AMDGPU_VM_CONTEXT_COMPUTE
	.comm	_AMDGPU_VM_USE_CPU_FOR_COMPUTE,4,2 ; @AMDGPU_VM_USE_CPU_FOR_COMPUTE
	.comm	_CHIP_RAVEN,8,3                 ; @CHIP_RAVEN
	.comm	_AMDGPU_VM_USE_CPU_FOR_GFX,4,2  ; @AMDGPU_VM_USE_CPU_FOR_GFX
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"VM update mode is %s\n"

l_.str.1:                               ; @.str.1
	.asciz	"CPU"

l_.str.2:                               ; @.str.2
	.asciz	"SDMA"

l_.str.3:                               ; @.str.3
	.asciz	"CPU update of VM recommended only for large BAR system\n"

	.comm	_amdgpu_vm_cpu_funcs,4,2        ; @amdgpu_vm_cpu_funcs
	.comm	_amdgpu_vm_sdma_funcs,4,2       ; @amdgpu_vm_sdma_funcs
	.comm	_AMDGPU_GEM_CREATE_SHADOW,4,2   ; @AMDGPU_GEM_CREATE_SHADOW
	.comm	_GFP_ATOMIC,4,2                 ; @GFP_ATOMIC
.subsections_via_symbols
