	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cnl_ddi_clock_get
_cnl_ddi_clock_get:                     ## @cnl_ddi_clock_get
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rsi, %r14
	movl	(%rdi), %edi
	callq	_to_i915
	movl	4(%r14), %ebx
	movq	_DPLL_CFGCR0_HDMI_MODE@GOTPCREL(%rip), %rcx
	testl	%ebx, (%rcx)
	je	LBB0_2
## %bb.1:
	leaq	4(%r14), %rsi
	movq	%rax, %rdi
	callq	_cnl_calc_wrpll_link
	movl	%eax, %ebx
	jmp	LBB0_5
LBB0_2:
	movq	_DPLL_CFGCR0_LINK_RATE_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	leal	-128(%rbx), %eax
	cmpl	$8, %eax
	jae	LBB0_3
## %bb.4:
	cltq
	leaq	l_switch.table.cnl_ddi_clock_get(%rip), %rcx
	movl	(%rcx,%rax,4), %ebx
	jmp	LBB0_5
LBB0_3:
	leaq	L_.str(%rip), %rsi
	movl	$1, %edi
	callq	_WARN
	addl	%ebx, %ebx
LBB0_5:
	movl	%ebx, (%r14)
	movq	%r14, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_ddi_dotclock_get               ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DPLL_CFGCR0_HDMI_MODE,4,2      ## @DPLL_CFGCR0_HDMI_MODE
	.comm	_DPLL_CFGCR0_LINK_RATE_MASK,4,2 ## @DPLL_CFGCR0_LINK_RATE_MASK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Unsupported link rate\n"

	.no_dead_strip	_cnl_ddi_clock_get
	.section	__TEXT,__const
	.p2align	2                               ## @switch.table.cnl_ddi_clock_get
l_switch.table.cnl_ddi_clock_get:
	.long	162000                          ## 0x278d0
	.long	810000                          ## 0xc5c10
	.long	648000                          ## 0x9e340
	.long	540000                          ## 0x83d60
	.long	432000                          ## 0x69780
	.long	324000                          ## 0x4f1a0
	.long	270000                          ## 0x41eb0
	.long	216000                          ## 0x34bc0

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cnl_ddi_clock_get
_cnl_ddi_clock_get:                     ; @cnl_ddi_clock_get
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
	ldr	w0, [x0]
	bl	_to_i915
	mov	x1, x19
	ldr	w8, [x1, #4]!
Lloh0:
	adrp	x9, _DPLL_CFGCR0_HDMI_MODE@GOTPAGE
Lloh1:
	ldr	x9, [x9, _DPLL_CFGCR0_HDMI_MODE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	bl	_cnl_calc_wrpll_link
	b	LBB0_5
LBB0_2:
Lloh3:
	adrp	x9, _DPLL_CFGCR0_LINK_RATE_MASK@GOTPAGE
Lloh4:
	ldr	x9, [x9, _DPLL_CFGCR0_LINK_RATE_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	and	w20, w9, w8
	sub	w8, w20, #128
	cmp	w8, #8
	b.hs	LBB0_4
; %bb.3:
Lloh6:
	adrp	x9, l_switch.table.cnl_ddi_clock_get@PAGE
Lloh7:
	add	x9, x9, l_switch.table.cnl_ddi_clock_get@PAGEOFF
	ldr	w0, [x9, w8, sxtw #2]
	b	LBB0_5
LBB0_4:
Lloh8:
	adrp	x1, l_.str@PAGE
Lloh9:
	add	x1, x1, l_.str@PAGEOFF
	mov	w0, #1
	bl	_WARN
	lsl	w0, w20, #1
LBB0_5:
	str	w0, [x19]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_ddi_dotclock_get
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_DPLL_CFGCR0_HDMI_MODE,4,2      ; @DPLL_CFGCR0_HDMI_MODE
	.comm	_DPLL_CFGCR0_LINK_RATE_MASK,4,2 ; @DPLL_CFGCR0_LINK_RATE_MASK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Unsupported link rate\n"

	.no_dead_strip	_cnl_ddi_clock_get
	.section	__TEXT,__const
	.p2align	2                               ; @switch.table.cnl_ddi_clock_get
l_switch.table.cnl_ddi_clock_get:
	.long	162000                          ; 0x278d0
	.long	810000                          ; 0xc5c10
	.long	648000                          ; 0x9e340
	.long	540000                          ; 0x83d60
	.long	432000                          ; 0x69780
	.long	324000                          ; 0x4f1a0
	.long	270000                          ; 0x41eb0
	.long	216000                          ; 0x34bc0

.subsections_via_symbols
