	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mga_g200wb_set_plls
_mga_g200wb_set_plls:                   ## @mga_g200wb_set_plls
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rax
	movq	_G200_EW3@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_1
## %bb.10:
	movl	$-1, %edi
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	movl	$1, %ecx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
	jmp	LBB0_11
	.p2align	4, 0x90
LBB0_21:                                ##   in Loop: Header=BB0_11 Depth=1
	incq	%rcx
	cmpq	$8, %rcx
	je	LBB0_22
LBB0_11:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_12 Depth 2
                                        ##       Child Loop BB0_15 Depth 3
                                        ##         Child Loop BB0_16 Depth 4
	movq	%rcx, %rax
	imulq	%rsi, %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movl	$1, %r10d
	movq	%rcx, -56(%rbp)                 ## 8-byte Spill
	jmp	LBB0_12
	.p2align	4, 0x90
LBB0_20:                                ##   in Loop: Header=BB0_12 Depth=2
	incq	%r10
	cmpq	$8, %r10
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	je	LBB0_21
LBB0_12:                                ##   Parent Loop BB0_11 Depth=1
                                        ## =>  This Loop Header: Depth=2
                                        ##       Child Loop BB0_15 Depth 3
                                        ##         Child Loop BB0_16 Depth 4
	cmpq	%r10, %rcx
	jb	LBB0_20
## %bb.13:                              ##   in Loop: Header=BB0_12 Depth=2
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	imulq	%r10, %rax
	addq	$-800001, %rax                  ## imm = 0xFFF3CAFF
	cmpq	$-400001, %rax                  ## imm = 0xFFF9E57F
	jb	LBB0_20
## %bb.14:                              ##   in Loop: Header=BB0_12 Depth=2
	movl	%r10d, %r11d
	imull	%ecx, %r11d
	leal	(,%r10,8), %r12d
	orl	%ecx, %r12d
	movl	$1, %r9d
	jmp	LBB0_15
	.p2align	4, 0x90
LBB0_19:                                ##   in Loop: Header=BB0_15 Depth=3
	incl	%r9d
	cmpl	$26, %r9d
	je	LBB0_20
LBB0_15:                                ##   Parent Loop BB0_11 Depth=1
                                        ##     Parent Loop BB0_12 Depth=2
                                        ## =>    This Loop Header: Depth=3
                                        ##         Child Loop BB0_16 Depth 4
	movl	%r9d, %ebx
	imull	%r11d, %ebx
	movl	$32, %r13d
	movl	$800000, %ecx                   ## imm = 0xC3500
	jmp	LBB0_16
	.p2align	4, 0x90
LBB0_18:                                ##   in Loop: Header=BB0_16 Depth=4
	incl	%r13d
	addl	$25000, %ecx                    ## imm = 0x61A8
	cmpl	$51200000, %ecx                 ## imm = 0x30D4000
	je	LBB0_19
LBB0_16:                                ##   Parent Loop BB0_11 Depth=1
                                        ##     Parent Loop BB0_12 Depth=2
                                        ##       Parent Loop BB0_15 Depth=3
                                        ## =>      This Inner Loop Header: Depth=4
	movl	%ecx, %eax
	xorl	%edx, %edx
	divl	%ebx
                                        ## kill: def $eax killed $eax def $rax
	movl	%esi, %r8d
	subl	%eax, %r8d
	movl	%eax, %edx
	subl	%esi, %edx
	cmpq	%rsi, %rax
	cmovlel	%r8d, %edx
	cmpl	%edi, %edx
	jae	LBB0_18
## %bb.17:                              ##   in Loop: Header=BB0_16 Depth=4
	movl	%r13d, %r14d
	shrl	%r14d
	andl	$128, %r14d
	orl	%r9d, %r14d
	movzbl	%r13b, %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	%r13d, %r15d
	shrl	$3, %r15d
	andl	$192, %r15d
	orl	%r12d, %r15d
	movl	%edx, %edi
	jmp	LBB0_18
LBB0_1:
	movl	$-1, %r12d
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	movl	$1, %r8d
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%r8
	cmpq	$9, %r8
	je	LBB0_22
LBB0_2:                                 ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_4 Depth 2
                                        ##       Child Loop BB0_5 Depth 3
	movq	%r8, %rax
	imulq	%rsi, %rax
	addq	$-550001, %rax                  ## imm = 0xFFF79B8F
	cmpq	$-400001, %rax                  ## imm = 0xFFF9E57F
	jb	LBB0_9
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	leal	-1(%r8), %r10d
	movl	$1, %r9d
	jmp	LBB0_4
	.p2align	4, 0x90
LBB0_8:                                 ##   in Loop: Header=BB0_4 Depth=2
	incl	%r9d
	cmpl	$17, %r9d
	je	LBB0_9
LBB0_4:                                 ##   Parent Loop BB0_2 Depth=1
                                        ## =>  This Loop Header: Depth=2
                                        ##       Child Loop BB0_5 Depth 3
	movl	%r9d, %r13d
	imull	%r8d, %r13d
	leal	-1(%r9), %r11d
	movl	$48000, %ecx                    ## imm = 0xBB80
	xorl	%edi, %edi
	jmp	LBB0_5
	.p2align	4, 0x90
LBB0_7:                                 ##   in Loop: Header=BB0_5 Depth=3
	addl	$48000, %ecx                    ## imm = 0xBB80
	incl	%edi
	cmpl	$7248000, %ecx                  ## imm = 0x6E9880
	je	LBB0_8
LBB0_5:                                 ##   Parent Loop BB0_2 Depth=1
                                        ##     Parent Loop BB0_4 Depth=2
                                        ## =>    This Inner Loop Header: Depth=3
	movl	%ecx, %eax
	xorl	%edx, %edx
	divl	%r13d
                                        ## kill: def $eax killed $eax def $rax
	movl	%esi, %ebx
	subl	%eax, %ebx
	movl	%eax, %edx
	subl	%esi, %edx
	cmpq	%rsi, %rax
	cmovlel	%ebx, %edx
	cmpl	%r12d, %edx
	jae	LBB0_7
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=3
	movl	%edi, %r14d
	shrl	%r14d
	andl	$128, %r14d
	orl	%r11d, %r14d
	movl	%edx, %r12d
	movl	%r10d, %r15d
	movl	%edi, -44(%rbp)                 ## 4-byte Spill
	jmp	LBB0_7
LBB0_22:
	xorl	%eax, %eax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
LBB0_23:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_27 Depth 2
	cmpl	$0, -56(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_26
## %bb.24:                              ##   in Loop: Header=BB0_23 Depth=1
	movq	_MGAREG_CRTC_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$30, %esi
	callq	_WREG8
	movq	_MGAREG_CRTC_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG8
	cmpl	$254, %eax
	jg	LBB0_26
## %bb.25:                              ##   in Loop: Header=BB0_23 Depth=1
	movq	_MGAREG_CRTC_DATA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	incl	%eax
	movl	%eax, %esi
	callq	_WREG8
LBB0_26:                                ##   in Loop: Header=BB0_23 Depth=1
	movq	_DAC_INDEX@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	movq	_MGA1064_PIX_CLK_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG8
	movq	_DAC_DATA@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_RREG8
	movq	_MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r12), %edi
	movl	%eax, %esi
	callq	_WREG8
	movl	(%r13), %edi
	movq	_MGA1064_REMHEADCTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	movq	_MGA1064_REMHEADCTL_CLKDIS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%r12), %edi
	movl	%eax, %esi
	callq	_WREG8
	movq	_MGAREG_MEM_MISC_READ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG8
	orl	$12, %eax
	movq	_MGAREG_MEM_MISC_WRITE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%eax, %esi
	callq	_WREG8
	movl	(%r13), %edi
	movq	_MGA1064_PIX_CLK_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	movq	_MGA1064_PIX_CLK_CTL_CLK_POW_DOWN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	orl	$128, %eax
	movl	(%r12), %edi
	movl	%eax, %esi
	callq	_WREG8
	movl	$500, %edi                      ## imm = 0x1F4
	callq	_udelay
	movl	(%r13), %edi
	movq	_MGA1064_VREF_CTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	andl	$-5, %eax
	movl	(%r12), %edi
	movl	%eax, %esi
	callq	_WREG8
	movl	$50, %edi
	callq	_udelay
	movq	_MGA1064_WB_PIX_PLLC_N@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG_DAC
	movq	_MGA1064_WB_PIX_PLLC_M@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	callq	_WREG_DAC
	movq	_MGA1064_WB_PIX_PLLC_P@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	callq	_WREG_DAC
	movl	$50, %edi
	callq	_udelay
	movl	(%r13), %edi
	movl	(%rbx), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	orl	$4, %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_WREG_DAC
	movl	$500, %edi                      ## imm = 0x1F4
	callq	_udelay
	movl	(%r13), %edi
	movq	_MGA1064_PIX_CLK_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	movq	_MGA1064_PIX_CLK_CTL_SEL_MSK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	_MGA1064_PIX_CLK_CTL_SEL_PLL@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movl	(%r12), %edi
	callq	_WREG8
	movl	(%r13), %edi
	movq	_MGA1064_REMHEADCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	movq	_MGA1064_REMHEADCTL_CLKSL_MSK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	_MGA1064_REMHEADCTL_CLKSL_PLL@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movl	(%r12), %edi
	callq	_WREG8
	movq	_MGAREG_SEQ_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$1, %esi
	callq	_WREG8
	movq	_MGAREG_SEQ_DATA@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_RREG8
	andl	$-9, %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_WREG8
	movl	(%r13), %edi
	movq	_MGA1064_PIX_CLK_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG8
	movl	(%r12), %edi
	callq	_RREG8
	movq	_MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%r12), %edi
	callq	_WREG8
	movq	_MGAREG_VCOUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG8
	movl	%eax, %r12d
	movl	$-1, %ebx
	.p2align	4, 0x90
LBB0_27:                                ##   Parent Loop BB0_23 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	_MGAREG_VCOUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG8
	xorl	%r13d, %r13d
	cmpl	%r12d, %eax
	jl	LBB0_29
## %bb.28:                              ##   in Loop: Header=BB0_27 Depth=2
	movl	%r12d, %r13d
LBB0_29:                                ##   in Loop: Header=BB0_27 Depth=2
	subl	%r13d, %eax
	cmpl	$2, %eax
	jg	LBB0_32
## %bb.30:                              ##   in Loop: Header=BB0_27 Depth=2
	movl	$5, %edi
	callq	_udelay
	incl	%ebx
	movl	%r13d, %r12d
	cmpl	$29, %ebx
	jb	LBB0_27
## %bb.31:                              ##   in Loop: Header=BB0_23 Depth=1
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	leal	1(%rcx), %eax
	cmpl	$32, %ecx
                                        ## kill: def $eax killed $eax def $rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	jb	LBB0_23
LBB0_32:
	movq	_DAC_INDEX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MGA1064_REMHEADCTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	callq	_WREG8
	movq	_DAC_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG8
	movq	_MGA1064_REMHEADCTL_CLKDIS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%rbx), %edi
	callq	_WREG_DAC
	xorl	%eax, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_G200_EW3,8,3                   ## @G200_EW3
	.comm	_MGAREG_CRTC_INDEX,4,2          ## @MGAREG_CRTC_INDEX
	.comm	_MGAREG_CRTC_DATA,4,2           ## @MGAREG_CRTC_DATA
	.comm	_DAC_INDEX,4,2                  ## @DAC_INDEX
	.comm	_MGA1064_PIX_CLK_CTL,4,2        ## @MGA1064_PIX_CLK_CTL
	.comm	_DAC_DATA,4,2                   ## @DAC_DATA
	.comm	_MGA1064_PIX_CLK_CTL_CLK_DIS,4,2 ## @MGA1064_PIX_CLK_CTL_CLK_DIS
	.comm	_MGA1064_REMHEADCTL,4,2         ## @MGA1064_REMHEADCTL
	.comm	_MGA1064_REMHEADCTL_CLKDIS,4,2  ## @MGA1064_REMHEADCTL_CLKDIS
	.comm	_MGAREG_MEM_MISC_READ,4,2       ## @MGAREG_MEM_MISC_READ
	.comm	_MGAREG_MEM_MISC_WRITE,4,2      ## @MGAREG_MEM_MISC_WRITE
	.comm	_MGA1064_PIX_CLK_CTL_CLK_POW_DOWN,4,2 ## @MGA1064_PIX_CLK_CTL_CLK_POW_DOWN
	.comm	_MGA1064_VREF_CTL,4,2           ## @MGA1064_VREF_CTL
	.comm	_MGA1064_WB_PIX_PLLC_N,4,2      ## @MGA1064_WB_PIX_PLLC_N
	.comm	_MGA1064_WB_PIX_PLLC_M,4,2      ## @MGA1064_WB_PIX_PLLC_M
	.comm	_MGA1064_WB_PIX_PLLC_P,4,2      ## @MGA1064_WB_PIX_PLLC_P
	.comm	_MGA1064_PIX_CLK_CTL_SEL_MSK,4,2 ## @MGA1064_PIX_CLK_CTL_SEL_MSK
	.comm	_MGA1064_PIX_CLK_CTL_SEL_PLL,4,2 ## @MGA1064_PIX_CLK_CTL_SEL_PLL
	.comm	_MGA1064_REMHEADCTL_CLKSL_MSK,4,2 ## @MGA1064_REMHEADCTL_CLKSL_MSK
	.comm	_MGA1064_REMHEADCTL_CLKSL_PLL,4,2 ## @MGA1064_REMHEADCTL_CLKSL_PLL
	.comm	_MGAREG_SEQ_INDEX,4,2           ## @MGAREG_SEQ_INDEX
	.comm	_MGAREG_SEQ_DATA,4,2            ## @MGAREG_SEQ_DATA
	.comm	_MGAREG_VCOUNT,4,2              ## @MGAREG_VCOUNT
	.no_dead_strip	_mga_g200wb_set_plls
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mga_g200wb_set_plls
_mga_g200wb_set_plls:                   ; @mga_g200wb_set_plls
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x8, #-6785
	movk	x8, #65529, lsl #16
	ldr	x9, [x0]
Lloh0:
	adrp	x10, _G200_EW3@GOTPAGE
Lloh1:
	ldr	x10, [x10, _G200_EW3@GOTPAGEOFF]
Lloh2:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_13
; %bb.1:
	mov	w20, #0
	mov	w19, #0
	mov	w21, #0
	mov	w12, #-1
	mov	w9, #1
	mov	x10, #-13569
	movk	x10, #65523, lsl #16
	mov	w11, #25000
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x9, x9, #1
	cmp	x9, #8
	b.eq	LBB0_22
LBB0_3:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;       Child Loop BB0_9 Depth 3
                                        ;         Child Loop BB0_11 Depth 4
	mul	x13, x9, x1
	mov	w14, #1
	b	LBB0_5
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=2
	add	x14, x14, #1
	cmp	x14, #8
	b.eq	LBB0_2
LBB0_5:                                 ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_9 Depth 3
                                        ;         Child Loop BB0_11 Depth 4
	cmp	x9, x14
	b.lo	LBB0_4
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=2
	madd	x15, x13, x14, x10
	cmp	x15, x8
	b.lo	LBB0_4
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=2
	mul	w15, w14, w9
	orr	w16, w9, w14, lsl #3
	mov	w17, #1
	b	LBB0_9
LBB0_8:                                 ;   in Loop: Header=BB0_9 Depth=3
	add	w17, w17, #1
	cmp	w17, #26
	b.eq	LBB0_4
LBB0_9:                                 ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_5 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_11 Depth 4
	mul	w0, w17, w15
	mov	w2, #32
	mov	w3, #13568
	movk	w3, #12, lsl #16
	b	LBB0_11
LBB0_10:                                ;   in Loop: Header=BB0_11 Depth=4
	add	w2, w2, #1
	add	w3, w3, w11
	cmp	w2, #2048
	b.eq	LBB0_8
LBB0_11:                                ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_5 Depth=2
                                        ;       Parent Loop BB0_9 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	udiv	w4, w3, w0
	sub	w5, w4, w1
	sub	w6, w1, w4
	cmp	x4, x1
	csel	w4, w5, w6, gt
	cmp	w4, w12
	b.hs	LBB0_10
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=4
	lsr	w12, w2, #1
	and	w12, w12, #0x80
	orr	w19, w12, w17
	and	w20, w2, #0xff
	lsr	w12, w2, #3
	and	w12, w12, #0xc0
	orr	w21, w16, w12
	mov	x12, x4
	b	LBB0_10
LBB0_13:
	mov	w20, #0
	mov	w19, #0
	mov	w21, #0
	mov	w11, #-1
	mov	w9, #1
	mov	x10, #-25713
	movk	x10, #65527, lsl #16
	mov	w12, #48000
	b	LBB0_15
LBB0_14:                                ;   in Loop: Header=BB0_15 Depth=1
	add	x9, x9, #1
	cmp	x9, #9
	b.eq	LBB0_22
LBB0_15:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_18 Depth 2
                                        ;       Child Loop BB0_20 Depth 3
	madd	x13, x9, x1, x10
	cmp	x13, x8
	b.lo	LBB0_14
; %bb.16:                               ;   in Loop: Header=BB0_15 Depth=1
	sub	w13, w9, #1
	mov	w14, #1
	b	LBB0_18
LBB0_17:                                ;   in Loop: Header=BB0_18 Depth=2
	add	w14, w14, #1
	cmp	w14, #17
	b.eq	LBB0_14
LBB0_18:                                ;   Parent Loop BB0_15 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_20 Depth 3
	mov	w15, #0
	mul	w16, w14, w9
	sub	w17, w14, #1
	mov	w0, #48000
	b	LBB0_20
LBB0_19:                                ;   in Loop: Header=BB0_20 Depth=3
	add	w15, w15, #1
	add	w0, w0, w12
	cmp	w15, #150
	b.eq	LBB0_17
LBB0_20:                                ;   Parent Loop BB0_15 Depth=1
                                        ;     Parent Loop BB0_18 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	udiv	w2, w0, w16
	sub	w3, w2, w1
	sub	w4, w1, w2
	cmp	x2, x1
	csel	w2, w3, w4, gt
	cmp	w2, w11
	b.hs	LBB0_19
; %bb.21:                               ;   in Loop: Header=BB0_20 Depth=3
	lsr	w11, w15, #1
	and	w11, w11, #0x80
	orr	w19, w11, w17
	mov	x11, x2
	mov	x21, x13
	mov	x20, x15
	b	LBB0_19
LBB0_22:
	mov	w26, #0
Lloh3:
	adrp	x27, _DAC_INDEX@GOTPAGE
Lloh4:
	ldr	x27, [x27, _DAC_INDEX@GOTPAGEOFF]
Lloh5:
	adrp	x25, _DAC_DATA@GOTPAGE
Lloh6:
	ldr	x25, [x25, _DAC_DATA@GOTPAGEOFF]
Lloh7:
	adrp	x23, _MGAREG_VCOUNT@GOTPAGE
Lloh8:
	ldr	x23, [x23, _MGAREG_VCOUNT@GOTPAGEOFF]
LBB0_23:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_27 Depth 2
	cbz	w26, LBB0_26
; %bb.24:                               ;   in Loop: Header=BB0_23 Depth=1
Lloh9:
	adrp	x8, _MGAREG_CRTC_INDEX@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MGAREG_CRTC_INDEX@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	mov	w1, #30
	bl	_WREG8
Lloh12:
	adrp	x8, _MGAREG_CRTC_DATA@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MGAREG_CRTC_DATA@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	bl	_RREG8
	cmp	w0, #254
	b.gt	LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_23 Depth=1
Lloh15:
	adrp	x8, _MGAREG_CRTC_DATA@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MGAREG_CRTC_DATA@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	add	w1, w0, #1
	mov	x0, x8
	bl	_WREG8
LBB0_26:                                ;   in Loop: Header=BB0_23 Depth=1
	ldr	w0, [x27]
Lloh18:
	adrp	x8, _MGA1064_PIX_CLK_CTL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MGA1064_PIX_CLK_CTL@GOTPAGEOFF]
	ldr	w1, [x8]
	mov	x28, x8
	bl	_WREG8
	ldr	w0, [x25]
	bl	_RREG8
Lloh20:
	adrp	x24, _MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPAGE
Lloh21:
	ldr	x24, [x24, _MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x24]
	orr	w1, w8, w0
	ldr	w0, [x25]
	bl	_WREG8
	ldr	w0, [x27]
Lloh23:
	adrp	x22, _MGA1064_REMHEADCTL@GOTPAGE
Lloh24:
	ldr	x22, [x22, _MGA1064_REMHEADCTL@GOTPAGEOFF]
	ldr	w1, [x22]
	bl	_WREG8
	ldr	w0, [x25]
	bl	_RREG8
Lloh25:
	adrp	x8, _MGA1064_REMHEADCTL_CLKDIS@GOTPAGE
Lloh26:
	ldr	x8, [x8, _MGA1064_REMHEADCTL_CLKDIS@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	orr	w1, w8, w0
	ldr	w0, [x25]
	bl	_WREG8
Lloh28:
	adrp	x8, _MGAREG_MEM_MISC_READ@GOTPAGE
Lloh29:
	ldr	x8, [x8, _MGAREG_MEM_MISC_READ@GOTPAGEOFF]
Lloh30:
	ldr	w0, [x8]
	bl	_RREG8
	orr	w1, w0, #0xc
Lloh31:
	adrp	x8, _MGAREG_MEM_MISC_WRITE@GOTPAGE
Lloh32:
	ldr	x8, [x8, _MGAREG_MEM_MISC_WRITE@GOTPAGEOFF]
Lloh33:
	ldr	w0, [x8]
	bl	_WREG8
	ldr	w0, [x27]
	ldr	w1, [x28]
	mov	x24, x28
	bl	_WREG8
	ldr	w0, [x25]
	bl	_RREG8
Lloh34:
	adrp	x8, _MGA1064_PIX_CLK_CTL_CLK_POW_DOWN@GOTPAGE
Lloh35:
	ldr	x8, [x8, _MGA1064_PIX_CLK_CTL_CLK_POW_DOWN@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
	orr	w8, w0, w8
	orr	w1, w8, #0x80
	ldr	w0, [x25]
	bl	_WREG8
	mov	w0, #500
	bl	_udelay
	ldr	w0, [x27]
Lloh37:
	adrp	x28, _MGA1064_VREF_CTL@GOTPAGE
Lloh38:
	ldr	x28, [x28, _MGA1064_VREF_CTL@GOTPAGEOFF]
	ldr	w1, [x28]
	bl	_WREG8
	ldr	w0, [x25]
	bl	_RREG8
	and	w1, w0, #0xfffffffb
	ldr	w0, [x25]
	bl	_WREG8
	mov	w0, #50
	bl	_udelay
Lloh39:
	adrp	x8, _MGA1064_WB_PIX_PLLC_N@GOTPAGE
Lloh40:
	ldr	x8, [x8, _MGA1064_WB_PIX_PLLC_N@GOTPAGEOFF]
Lloh41:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_WREG_DAC
Lloh42:
	adrp	x8, _MGA1064_WB_PIX_PLLC_M@GOTPAGE
Lloh43:
	ldr	x8, [x8, _MGA1064_WB_PIX_PLLC_M@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_WREG_DAC
Lloh45:
	adrp	x8, _MGA1064_WB_PIX_PLLC_P@GOTPAGE
Lloh46:
	ldr	x8, [x8, _MGA1064_WB_PIX_PLLC_P@GOTPAGEOFF]
Lloh47:
	ldr	w0, [x8]
	mov	x1, x21
	bl	_WREG_DAC
	mov	w0, #50
	bl	_udelay
	ldr	w0, [x27]
	ldr	w1, [x28]
	bl	_WREG8
	ldr	w0, [x25]
	bl	_RREG8
	orr	w1, w0, #0x4
	ldr	w0, [x28]
	bl	_WREG_DAC
	mov	w0, #500
	bl	_udelay
	ldr	w0, [x27]
	ldr	w1, [x24]
	bl	_WREG8
	ldr	w0, [x25]
	bl	_RREG8
Lloh48:
	adrp	x8, _MGA1064_PIX_CLK_CTL_SEL_MSK@GOTPAGE
Lloh49:
	ldr	x8, [x8, _MGA1064_PIX_CLK_CTL_SEL_MSK@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh51:
	adrp	x9, _MGA1064_PIX_CLK_CTL_SEL_PLL@GOTPAGE
Lloh52:
	ldr	x9, [x9, _MGA1064_PIX_CLK_CTL_SEL_PLL@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	orr	w1, w8, w9
	ldr	w0, [x25]
	bl	_WREG8
	ldr	w0, [x27]
	ldr	w1, [x22]
	bl	_WREG8
	ldr	w0, [x25]
	bl	_RREG8
Lloh54:
	adrp	x8, _MGA1064_REMHEADCTL_CLKSL_MSK@GOTPAGE
Lloh55:
	ldr	x8, [x8, _MGA1064_REMHEADCTL_CLKSL_MSK@GOTPAGEOFF]
Lloh56:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh57:
	adrp	x9, _MGA1064_REMHEADCTL_CLKSL_PLL@GOTPAGE
Lloh58:
	ldr	x9, [x9, _MGA1064_REMHEADCTL_CLKSL_PLL@GOTPAGEOFF]
Lloh59:
	ldr	w9, [x9]
	orr	w1, w8, w9
	ldr	w0, [x25]
	bl	_WREG8
Lloh60:
	adrp	x8, _MGAREG_SEQ_INDEX@GOTPAGE
Lloh61:
	ldr	x8, [x8, _MGAREG_SEQ_INDEX@GOTPAGEOFF]
Lloh62:
	ldr	w0, [x8]
	mov	w1, #1
	bl	_WREG8
Lloh63:
	adrp	x22, _MGAREG_SEQ_DATA@GOTPAGE
Lloh64:
	ldr	x22, [x22, _MGAREG_SEQ_DATA@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_RREG8
	and	w1, w0, #0xfffffff7
	ldr	w0, [x22]
	bl	_WREG8
	ldr	w0, [x27]
	ldr	w1, [x24]
	bl	_WREG8
	ldr	w0, [x25]
	bl	_RREG8
Lloh65:
	adrp	x8, _MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPAGE
Lloh66:
	ldr	x8, [x8, _MGA1064_PIX_CLK_CTL_CLK_DIS@GOTPAGEOFF]
Lloh67:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w0, [x25]
	bl	_WREG8
	ldr	w0, [x23]
	bl	_RREG8
	mov	x22, x0
	mov	w24, #-1
LBB0_27:                                ;   Parent Loop BB0_23 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	w0, [x23]
	bl	_RREG8
	cmp	w0, w22
	csel	w22, wzr, w22, lt
	sub	w8, w0, w22
	cmp	w8, #2
	b.gt	LBB0_30
; %bb.28:                               ;   in Loop: Header=BB0_27 Depth=2
	mov	w0, #5
	bl	_udelay
	add	w24, w24, #1
	cmp	w24, #29
	b.lo	LBB0_27
; %bb.29:                               ;   in Loop: Header=BB0_23 Depth=1
	add	w8, w26, #1
	cmp	w26, #32
	mov	x26, x8
	b.lo	LBB0_23
LBB0_30:
	ldr	w0, [x27]
Lloh68:
	adrp	x19, _MGA1064_REMHEADCTL@GOTPAGE
Lloh69:
	ldr	x19, [x19, _MGA1064_REMHEADCTL@GOTPAGEOFF]
	ldr	w1, [x19]
	bl	_WREG8
	ldr	w0, [x25]
	bl	_RREG8
Lloh70:
	adrp	x8, _MGA1064_REMHEADCTL_CLKDIS@GOTPAGE
Lloh71:
	ldr	x8, [x8, _MGA1064_REMHEADCTL_CLKDIS@GOTPAGEOFF]
Lloh72:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w0, [x19]
	bl	_WREG_DAC
	mov	w0, #0
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGot	Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGot	Lloh68, Lloh69
	.cfi_endproc
                                        ; -- End function
	.comm	_G200_EW3,8,3                   ; @G200_EW3
	.comm	_MGAREG_CRTC_INDEX,4,2          ; @MGAREG_CRTC_INDEX
	.comm	_MGAREG_CRTC_DATA,4,2           ; @MGAREG_CRTC_DATA
	.comm	_DAC_INDEX,4,2                  ; @DAC_INDEX
	.comm	_MGA1064_PIX_CLK_CTL,4,2        ; @MGA1064_PIX_CLK_CTL
	.comm	_DAC_DATA,4,2                   ; @DAC_DATA
	.comm	_MGA1064_PIX_CLK_CTL_CLK_DIS,4,2 ; @MGA1064_PIX_CLK_CTL_CLK_DIS
	.comm	_MGA1064_REMHEADCTL,4,2         ; @MGA1064_REMHEADCTL
	.comm	_MGA1064_REMHEADCTL_CLKDIS,4,2  ; @MGA1064_REMHEADCTL_CLKDIS
	.comm	_MGAREG_MEM_MISC_READ,4,2       ; @MGAREG_MEM_MISC_READ
	.comm	_MGAREG_MEM_MISC_WRITE,4,2      ; @MGAREG_MEM_MISC_WRITE
	.comm	_MGA1064_PIX_CLK_CTL_CLK_POW_DOWN,4,2 ; @MGA1064_PIX_CLK_CTL_CLK_POW_DOWN
	.comm	_MGA1064_VREF_CTL,4,2           ; @MGA1064_VREF_CTL
	.comm	_MGA1064_WB_PIX_PLLC_N,4,2      ; @MGA1064_WB_PIX_PLLC_N
	.comm	_MGA1064_WB_PIX_PLLC_M,4,2      ; @MGA1064_WB_PIX_PLLC_M
	.comm	_MGA1064_WB_PIX_PLLC_P,4,2      ; @MGA1064_WB_PIX_PLLC_P
	.comm	_MGA1064_PIX_CLK_CTL_SEL_MSK,4,2 ; @MGA1064_PIX_CLK_CTL_SEL_MSK
	.comm	_MGA1064_PIX_CLK_CTL_SEL_PLL,4,2 ; @MGA1064_PIX_CLK_CTL_SEL_PLL
	.comm	_MGA1064_REMHEADCTL_CLKSL_MSK,4,2 ; @MGA1064_REMHEADCTL_CLKSL_MSK
	.comm	_MGA1064_REMHEADCTL_CLKSL_PLL,4,2 ; @MGA1064_REMHEADCTL_CLKSL_PLL
	.comm	_MGAREG_SEQ_INDEX,4,2           ; @MGAREG_SEQ_INDEX
	.comm	_MGAREG_SEQ_DATA,4,2            ; @MGAREG_SEQ_DATA
	.comm	_MGAREG_VCOUNT,4,2              ; @MGAREG_VCOUNT
	.no_dead_strip	_mga_g200wb_set_plls
.subsections_via_symbols
