	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smu7_set_power_state_tasks
_smu7_set_power_state_tasks:            ## @smu7_set_power_state_tasks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	8(%rdi), %r12
	callq	_smu7_find_dpm_states_clocks_in_dpm_table
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	leaq	L_.str(%rip), %rsi
	movl	%eax, %edx
	callq	_PP_ASSERT_WITH_CODE
	movl	(%r15), %edi
	movq	_PHM_PlatformCaps_PCIEPerformanceRequest@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	callq	_phm_cap_enabled
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_smu7_request_link_speed_change_before_state_change
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	leaq	L_.str.1(%rip), %rsi
	movl	%eax, %edx
	callq	_PP_ASSERT_WITH_CODE
LBB0_2:
	movq	%r15, %rdi
	callq	_smu7_freeze_sclk_mclk_dpm
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	leaq	L_.str.2(%rip), %rsi
	movl	%eax, %edx
	callq	_PP_ASSERT_WITH_CODE
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_smu7_populate_and_upload_sclk_mclk_dpm_levels
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	leaq	L_.str.3(%rip), %rsi
	movl	%eax, %edx
	callq	_PP_ASSERT_WITH_CODE
	movq	%r15, %rdi
	callq	_smu7_update_avfs
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	leaq	L_.str.4(%rip), %rsi
	movl	%eax, %edx
	callq	_PP_ASSERT_WITH_CODE
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_smu7_generate_dpm_level_enable_mask
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	leaq	L_.str.5(%rip), %rsi
	movl	%eax, %edx
	callq	_PP_ASSERT_WITH_CODE
	movq	%r15, %rdi
	callq	_smum_update_sclk_threshold
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	leaq	L_.str.6(%rip), %rsi
	movl	%eax, %edx
	callq	_PP_ASSERT_WITH_CODE
	movq	%r15, %rdi
	callq	_smu7_notify_smc_display
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	leaq	L_.str.7(%rip), %rsi
	movl	%eax, %edx
	callq	_PP_ASSERT_WITH_CODE
	movq	%r15, %rdi
	callq	_smu7_unfreeze_sclk_mclk_dpm
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	leaq	L_.str.8(%rip), %rsi
	movl	%eax, %edx
	callq	_PP_ASSERT_WITH_CODE
	movq	%r15, %rdi
	callq	_smu7_upload_dpm_level_enable_mask
	movl	%eax, %ebx
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	leaq	L_.str.9(%rip), %rsi
	movl	%eax, %edx
	callq	_PP_ASSERT_WITH_CODE
	movl	(%r15), %edi
	movl	(%r13), %esi
	callq	_phm_cap_enabled
	testq	%rax, %rax
	je	LBB0_4
## %bb.3:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_smu7_notify_link_speed_change_after_state_change
	movl	%eax, %ebx
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	leaq	L_.str.10(%rip), %rsi
	movl	%eax, %edx
	callq	_PP_ASSERT_WITH_CODE
LBB0_4:
	movl	$0, (%r12)
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to find DPM states clocks in DPM table!"

	.comm	_PHM_PlatformCaps_PCIEPerformanceRequest,4,2 ## @PHM_PlatformCaps_PCIEPerformanceRequest
L_.str.1:                               ## @.str.1
	.asciz	"Failed to request link speed change before state change!"

L_.str.2:                               ## @.str.2
	.asciz	"Failed to freeze SCLK MCLK DPM!"

L_.str.3:                               ## @.str.3
	.asciz	"Failed to populate and upload SCLK MCLK DPM levels!"

L_.str.4:                               ## @.str.4
	.asciz	"Failed to update avfs voltages!"

L_.str.5:                               ## @.str.5
	.asciz	"Failed to generate DPM level enabled mask!"

L_.str.6:                               ## @.str.6
	.asciz	"Failed to update SCLK threshold!"

L_.str.7:                               ## @.str.7
	.asciz	"Failed to notify smc display settings!"

L_.str.8:                               ## @.str.8
	.asciz	"Failed to unfreeze SCLK MCLK DPM!"

L_.str.9:                               ## @.str.9
	.asciz	"Failed to upload DPM level enabled mask!"

L_.str.10:                              ## @.str.10
	.asciz	"Failed to notify link speed change after state change!"

	.no_dead_strip	_smu7_set_power_state_tasks
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smu7_set_power_state_tasks
_smu7_set_power_state_tasks:            ; @smu7_set_power_state_tasks
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
	ldr	x22, [x0, #8]
	bl	_smu7_find_dpm_states_clocks_in_dpm_table
	mov	x2, x0
	cmp	w0, #0
	cset	w0, eq
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_PP_ASSERT_WITH_CODE
	ldr	w0, [x20]
Lloh2:
	adrp	x23, _PHM_PlatformCaps_PCIEPerformanceRequest@GOTPAGE
Lloh3:
	ldr	x23, [x23, _PHM_PlatformCaps_PCIEPerformanceRequest@GOTPAGEOFF]
	ldr	w1, [x23]
	bl	_phm_cap_enabled
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x20
	mov	x1, x19
	bl	_smu7_request_link_speed_change_before_state_change
	mov	x2, x0
	cmp	w0, #0
	cset	w0, eq
Lloh4:
	adrp	x1, l_.str.1@PAGE
Lloh5:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_PP_ASSERT_WITH_CODE
LBB0_2:
	mov	x0, x20
	bl	_smu7_freeze_sclk_mclk_dpm
	mov	x2, x0
	cmp	w0, #0
	cset	w0, eq
Lloh6:
	adrp	x1, l_.str.2@PAGE
Lloh7:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_PP_ASSERT_WITH_CODE
	mov	x0, x20
	mov	x1, x19
	bl	_smu7_populate_and_upload_sclk_mclk_dpm_levels
	mov	x2, x0
	cmp	w0, #0
	cset	w0, eq
Lloh8:
	adrp	x1, l_.str.3@PAGE
Lloh9:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_PP_ASSERT_WITH_CODE
	mov	x0, x20
	bl	_smu7_update_avfs
	mov	x2, x0
	cmp	w0, #0
	cset	w0, eq
Lloh10:
	adrp	x1, l_.str.4@PAGE
Lloh11:
	add	x1, x1, l_.str.4@PAGEOFF
	bl	_PP_ASSERT_WITH_CODE
	mov	x0, x20
	mov	x1, x19
	bl	_smu7_generate_dpm_level_enable_mask
	mov	x2, x0
	cmp	w0, #0
	cset	w0, eq
Lloh12:
	adrp	x1, l_.str.5@PAGE
Lloh13:
	add	x1, x1, l_.str.5@PAGEOFF
	bl	_PP_ASSERT_WITH_CODE
	mov	x0, x20
	bl	_smum_update_sclk_threshold
	mov	x2, x0
	cmp	w0, #0
	cset	w0, eq
Lloh14:
	adrp	x1, l_.str.6@PAGE
Lloh15:
	add	x1, x1, l_.str.6@PAGEOFF
	bl	_PP_ASSERT_WITH_CODE
	mov	x0, x20
	bl	_smu7_notify_smc_display
	mov	x2, x0
	cmp	w0, #0
	cset	w0, eq
Lloh16:
	adrp	x1, l_.str.7@PAGE
Lloh17:
	add	x1, x1, l_.str.7@PAGEOFF
	bl	_PP_ASSERT_WITH_CODE
	mov	x0, x20
	bl	_smu7_unfreeze_sclk_mclk_dpm
	mov	x2, x0
	cmp	w0, #0
	cset	w0, eq
Lloh18:
	adrp	x1, l_.str.8@PAGE
Lloh19:
	add	x1, x1, l_.str.8@PAGEOFF
	bl	_PP_ASSERT_WITH_CODE
	mov	x0, x20
	bl	_smu7_upload_dpm_level_enable_mask
	mov	x21, x0
	cmp	w0, #0
	cset	w0, eq
Lloh20:
	adrp	x1, l_.str.9@PAGE
Lloh21:
	add	x1, x1, l_.str.9@PAGEOFF
	mov	x2, x21
	bl	_PP_ASSERT_WITH_CODE
	ldr	w0, [x20]
	ldr	w1, [x23]
	bl	_phm_cap_enabled
	cbz	x0, LBB0_4
; %bb.3:
	mov	x0, x20
	mov	x1, x19
	bl	_smu7_notify_link_speed_change_after_state_change
	mov	x21, x0
	cmp	w0, #0
	cset	w0, eq
Lloh22:
	adrp	x1, l_.str.10@PAGE
Lloh23:
	add	x1, x1, l_.str.10@PAGEOFF
	mov	x2, x21
	bl	_PP_ASSERT_WITH_CODE
LBB0_4:
	str	wzr, [x22]
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpAdd	Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to find DPM states clocks in DPM table!"

	.comm	_PHM_PlatformCaps_PCIEPerformanceRequest,4,2 ; @PHM_PlatformCaps_PCIEPerformanceRequest
l_.str.1:                               ; @.str.1
	.asciz	"Failed to request link speed change before state change!"

l_.str.2:                               ; @.str.2
	.asciz	"Failed to freeze SCLK MCLK DPM!"

l_.str.3:                               ; @.str.3
	.asciz	"Failed to populate and upload SCLK MCLK DPM levels!"

l_.str.4:                               ; @.str.4
	.asciz	"Failed to update avfs voltages!"

l_.str.5:                               ; @.str.5
	.asciz	"Failed to generate DPM level enabled mask!"

l_.str.6:                               ; @.str.6
	.asciz	"Failed to update SCLK threshold!"

l_.str.7:                               ; @.str.7
	.asciz	"Failed to notify smc display settings!"

l_.str.8:                               ; @.str.8
	.asciz	"Failed to unfreeze SCLK MCLK DPM!"

l_.str.9:                               ; @.str.9
	.asciz	"Failed to upload DPM level enabled mask!"

l_.str.10:                              ; @.str.10
	.asciz	"Failed to notify link speed change after state change!"

	.no_dead_strip	_smu7_set_power_state_tasks
.subsections_via_symbols
