	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_uvd_v1_0_fence_emit            ## -- Begin function uvd_v1_0_fence_emit
	.p2align	4, 0x90
_uvd_v1_0_fence_emit:                   ## @uvd_v1_0_fence_emit
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	(%rsi), %rax
	leaq	(,%rax,4), %rbx
	addq	8(%rdi), %rbx
	movq	(%rdi), %rcx
	movl	(%rcx,%rax,4), %r15d
	movq	_UVD_GPCOM_VCPU_DATA0@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_radeon_ring_write
	movq	_UVD_GPCOM_VCPU_DATA1@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movl	8(%r14), %esi
	movq	%rbx, %rdi
	callq	_radeon_ring_write
	movq	_UVD_GPCOM_VCPU_CMD@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movl	(%r12), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movl	(%r15), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_radeon_ring_write
	movl	(%r14), %edi
	xorl	%esi, %esi
	callq	_PACKET0
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_radeon_ring_write
	movq	%rbx, %rdi
	movl	$2, %esi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_radeon_ring_write              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_UVD_GPCOM_VCPU_DATA0,4,2       ## @UVD_GPCOM_VCPU_DATA0
	.comm	_UVD_GPCOM_VCPU_DATA1,4,2       ## @UVD_GPCOM_VCPU_DATA1
	.comm	_UVD_GPCOM_VCPU_CMD,4,2         ## @UVD_GPCOM_VCPU_CMD
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_uvd_v1_0_fence_emit            ; -- Begin function uvd_v1_0_fence_emit
	.p2align	2
_uvd_v1_0_fence_emit:                   ; @uvd_v1_0_fence_emit
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	ldr	x8, [x1]
	lsl	x8, x8, #2
	ldp	x10, x9, [x0]
	add	x19, x9, x8
	ldr	w21, [x10, x8]
Lloh0:
	adrp	x22, _UVD_GPCOM_VCPU_DATA0@GOTPAGE
Lloh1:
	ldr	x22, [x22, _UVD_GPCOM_VCPU_DATA0@GOTPAGEOFF]
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
	mov	x0, x19
	mov	x1, x21
	bl	_radeon_ring_write
Lloh2:
	adrp	x21, _UVD_GPCOM_VCPU_DATA1@GOTPAGE
Lloh3:
	ldr	x21, [x21, _UVD_GPCOM_VCPU_DATA1@GOTPAGEOFF]
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
	ldr	w1, [x20, #8]
	mov	x0, x19
	bl	_radeon_ring_write
Lloh4:
	adrp	x20, _UVD_GPCOM_VCPU_CMD@GOTPAGE
Lloh5:
	ldr	x20, [x20, _UVD_GPCOM_VCPU_CMD@GOTPAGEOFF]
	ldr	w0, [x20]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	ldr	w0, [x22]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	ldr	w0, [x21]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #0
	bl	_radeon_ring_write
	ldr	w0, [x20]
	mov	w1, #0
	bl	_PACKET0
	mov	x1, x0
	mov	x0, x19
	bl	_radeon_ring_write
	mov	x0, x19
	mov	w1, #2
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_radeon_ring_write
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_UVD_GPCOM_VCPU_DATA0,4,2       ; @UVD_GPCOM_VCPU_DATA0
	.comm	_UVD_GPCOM_VCPU_DATA1,4,2       ; @UVD_GPCOM_VCPU_DATA1
	.comm	_UVD_GPCOM_VCPU_CMD,4,2         ; @UVD_GPCOM_VCPU_CMD
.subsections_via_symbols
