	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_connector_set_property
_amdgpu_connector_set_property:         ## @amdgpu_connector_set_property
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r14d
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movq	16(%rdi), %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	8(%rax), %r13
	cmpq	%rsi, 48(%r13)
	je	LBB0_1
LBB0_5:
	cmpq	%rbx, 40(%r13)
	je	LBB0_6
LBB0_9:
	cmpq	%rbx, 32(%r13)
	je	LBB0_10
LBB0_13:
	cmpq	%rbx, 24(%r13)
	je	LBB0_14
LBB0_17:
	cmpq	%rbx, 16(%r13)
	je	LBB0_18
LBB0_21:
	cmpq	%rbx, 8(%r13)
	je	LBB0_22
LBB0_25:
	cmpq	%rbx, (%r13)
	jne	LBB0_27
## %bb.26:
	movq	%r15, %rdi
	callq	_to_amdgpu_connector
	xorl	%ecx, %ecx
	testl	%r14d, %r14d
	setne	%cl
	movl	%ecx, 8(%rax)
LBB0_27:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	cmpq	%rbx, (%rax)
	jne	LBB0_37
## %bb.28:
	movq	8(%r15), %rdi
	testq	%rdi, %rdi
	jne	LBB0_30
## %bb.29:
	movq	(%r15), %rax
	movq	%r15, %rdi
	callq	*(%rax)
	movq	%rax, %rdi
LBB0_30:
	callq	_to_amdgpu_encoder
	addl	$-129, %r14d
	cmpl	$2, %r14d
	ja	LBB0_31
## %bb.32:
	movslq	%r14d, %rcx
	leaq	l_switch.table.amdgpu_connector_set_property(%rip), %rdx
	movq	(%rdx,%rcx,8), %rcx
	jmp	LBB0_33
LBB0_1:
	movq	_DRM_MODE_ENCODER_TMDS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_amdgpu_connector_find_encoder
	testq	%rax, %rax
	je	LBB0_37
## %bb.2:
	movq	%rax, %rdi
	callq	_to_amdgpu_encoder
	movq	32(%rax), %rcx
	testq	%rcx, %rcx
	je	LBB0_37
## %bb.3:
	xorl	%edx, %edx
	testl	%r14d, %r14d
	setne	%dl
	cmpl	%edx, (%rcx)
	je	LBB0_5
## %bb.4:
	movl	%edx, (%rcx)
	addq	$16, %rax
	movq	%rax, %rdi
	callq	_amdgpu_connector_property_change_mode
	jmp	LBB0_5
LBB0_6:
	movq	%r15, %rdi
	callq	_to_amdgpu_connector
	movq	%rax, %r12
	movq	_DRM_MODE_ENCODER_TMDS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_amdgpu_connector_find_encoder
	testq	%rax, %rax
	je	LBB0_37
## %bb.7:
	movq	%rax, %rdi
	callq	_to_amdgpu_encoder
	cmpl	%r14d, (%r12)
	je	LBB0_9
## %bb.8:
	movl	%r14d, (%r12)
	addq	$16, %rax
	movq	%rax, %rdi
	callq	_amdgpu_connector_property_change_mode
	jmp	LBB0_9
LBB0_10:
	movq	%r15, %rdi
	callq	_to_amdgpu_connector
	movq	%rax, %r12
	movq	_DRM_MODE_ENCODER_TMDS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_amdgpu_connector_find_encoder
	testq	%rax, %rax
	je	LBB0_37
## %bb.11:
	movq	%rax, %rdi
	callq	_to_amdgpu_encoder
	cmpl	%r14d, 4(%r12)
	je	LBB0_13
## %bb.12:
	movl	%r14d, 4(%r12)
	addq	$16, %rax
	movq	%rax, %rdi
	callq	_amdgpu_connector_property_change_mode
	jmp	LBB0_13
LBB0_14:
	movq	_DRM_MODE_ENCODER_TMDS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_amdgpu_connector_find_encoder
	testq	%rax, %rax
	je	LBB0_37
## %bb.15:
	movq	%rax, %rdi
	callq	_to_amdgpu_encoder
	cmpl	%r14d, (%rax)
	je	LBB0_17
## %bb.16:
	movl	%r14d, (%rax)
	addq	$16, %rax
	movq	%rax, %rdi
	callq	_amdgpu_connector_property_change_mode
	jmp	LBB0_17
LBB0_18:
	movq	_DRM_MODE_ENCODER_TMDS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_amdgpu_connector_find_encoder
	testq	%rax, %rax
	je	LBB0_37
## %bb.19:
	movq	%rax, %rdi
	callq	_to_amdgpu_encoder
	cmpl	%r14d, 4(%rax)
	je	LBB0_21
## %bb.20:
	movl	%r14d, 4(%rax)
	addq	$16, %rax
	movq	%rax, %rdi
	callq	_amdgpu_connector_property_change_mode
	jmp	LBB0_21
LBB0_22:
	movq	_DRM_MODE_ENCODER_TMDS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_amdgpu_connector_find_encoder
	testq	%rax, %rax
	je	LBB0_37
## %bb.23:
	movq	%rax, %rdi
	callq	_to_amdgpu_encoder
	cmpl	%r14d, 8(%rax)
	je	LBB0_25
## %bb.24:
	movl	%r14d, 8(%rax)
	addq	$16, %rax
	movq	%rax, %rdi
	callq	_amdgpu_connector_property_change_mode
	jmp	LBB0_25
LBB0_31:
	movq	_RMX_OFF@GOTPCREL(%rip), %rcx
LBB0_33:
	movl	(%rcx), %ecx
	cmpl	%ecx, 12(%rax)
	je	LBB0_37
## %bb.34:
	cmpl	$128, %ecx
	je	LBB0_36
## %bb.35:
	cmpq	$0, 24(%rax)
	je	LBB0_37
LBB0_36:
	movl	%ecx, 12(%rax)
	addq	$16, %rax
	movq	%rax, %rdi
	callq	_amdgpu_connector_property_change_mode
LBB0_37:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DRM_MODE_ENCODER_TMDS,4,2      ## @DRM_MODE_ENCODER_TMDS
	.comm	_RMX_OFF,4,2                    ## @RMX_OFF
	.comm	_RMX_CENTER,4,2                 ## @RMX_CENTER
	.comm	_RMX_ASPECT,4,2                 ## @RMX_ASPECT
	.comm	_RMX_FULL,4,2                   ## @RMX_FULL
	.no_dead_strip	_amdgpu_connector_set_property
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.amdgpu_connector_set_property
l_switch.table.amdgpu_connector_set_property:
	.quad	_RMX_FULL
	.quad	_RMX_CENTER
	.quad	_RMX_ASPECT

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_connector_set_property
_amdgpu_connector_set_property:         ; @amdgpu_connector_set_property
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x21, x1
	mov	x20, x0
	ldr	x23, [x0, #16]
	ldr	x24, [x23, #8]
	ldr	x8, [x24, #48]
	cmp	x8, x1
	b.eq	LBB0_13
LBB0_1:
	ldr	x8, [x24, #40]
	cmp	x8, x21
	b.eq	LBB0_17
LBB0_2:
	ldr	x8, [x24, #32]
	cmp	x8, x21
	b.eq	LBB0_20
LBB0_3:
	ldr	x8, [x24, #24]
	cmp	x8, x21
	b.eq	LBB0_23
LBB0_4:
	ldr	x8, [x24, #16]
	cmp	x8, x21
	b.eq	LBB0_26
LBB0_5:
	ldr	x8, [x24, #8]
	cmp	x8, x21
	b.eq	LBB0_29
LBB0_6:
	ldr	x8, [x24]
	cmp	x8, x21
	b.ne	LBB0_8
; %bb.7:
	mov	x0, x20
	bl	_to_amdgpu_connector
	cmp	w19, #0
	cset	w8, ne
	str	w8, [x0, #8]
LBB0_8:
	ldr	x8, [x23]
	cmp	x8, x21
	b.ne	LBB0_37
; %bb.9:
	ldr	x0, [x20, #8]
	cbnz	x0, LBB0_11
; %bb.10:
	ldr	x8, [x20]
	ldr	x8, [x8]
	mov	x0, x20
	blr	x8
LBB0_11:
	bl	_to_amdgpu_encoder
	sub	w8, w19, #129
	cmp	w8, #2
	b.hi	LBB0_32
; %bb.12:
Lloh0:
	adrp	x9, l_switch.table.amdgpu_connector_set_property@PAGE
Lloh1:
	add	x9, x9, l_switch.table.amdgpu_connector_set_property@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	b	LBB0_33
LBB0_13:
Lloh2:
	adrp	x8, _DRM_MODE_ENCODER_TMDS@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DRM_MODE_ENCODER_TMDS@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_amdgpu_connector_find_encoder
	cbz	x0, LBB0_37
; %bb.14:
	bl	_to_amdgpu_encoder
	ldr	x8, [x0, #32]
	cbz	x8, LBB0_37
; %bb.15:
	cmp	w19, #0
	cset	w9, ne
	ldr	w10, [x8]
	cmp	w10, w9
	b.eq	LBB0_1
; %bb.16:
	str	w9, [x8]
	add	x0, x0, #16
	bl	_amdgpu_connector_property_change_mode
	b	LBB0_1
LBB0_17:
	mov	x0, x20
	bl	_to_amdgpu_connector
	mov	x22, x0
Lloh5:
	adrp	x8, _DRM_MODE_ENCODER_TMDS@GOTPAGE
Lloh6:
	ldr	x8, [x8, _DRM_MODE_ENCODER_TMDS@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_amdgpu_connector_find_encoder
	cbz	x0, LBB0_37
; %bb.18:
	bl	_to_amdgpu_encoder
	ldr	w8, [x22]
	cmp	w8, w19
	b.eq	LBB0_2
; %bb.19:
	str	w19, [x22]
	add	x0, x0, #16
	bl	_amdgpu_connector_property_change_mode
	b	LBB0_2
LBB0_20:
	mov	x0, x20
	bl	_to_amdgpu_connector
	mov	x22, x0
Lloh8:
	adrp	x8, _DRM_MODE_ENCODER_TMDS@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DRM_MODE_ENCODER_TMDS@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_amdgpu_connector_find_encoder
	cbz	x0, LBB0_37
; %bb.21:
	bl	_to_amdgpu_encoder
	ldr	w8, [x22, #4]
	cmp	w8, w19
	b.eq	LBB0_3
; %bb.22:
	str	w19, [x22, #4]
	add	x0, x0, #16
	bl	_amdgpu_connector_property_change_mode
	b	LBB0_3
LBB0_23:
Lloh11:
	adrp	x8, _DRM_MODE_ENCODER_TMDS@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DRM_MODE_ENCODER_TMDS@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_amdgpu_connector_find_encoder
	cbz	x0, LBB0_37
; %bb.24:
	bl	_to_amdgpu_encoder
	ldr	w8, [x0]
	cmp	w8, w19
	b.eq	LBB0_4
; %bb.25:
	str	w19, [x0], #16
	bl	_amdgpu_connector_property_change_mode
	b	LBB0_4
LBB0_26:
Lloh14:
	adrp	x8, _DRM_MODE_ENCODER_TMDS@GOTPAGE
Lloh15:
	ldr	x8, [x8, _DRM_MODE_ENCODER_TMDS@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_amdgpu_connector_find_encoder
	cbz	x0, LBB0_37
; %bb.27:
	bl	_to_amdgpu_encoder
	ldr	w8, [x0, #4]
	cmp	w8, w19
	b.eq	LBB0_5
; %bb.28:
	str	w19, [x0, #4]
	add	x0, x0, #16
	bl	_amdgpu_connector_property_change_mode
	b	LBB0_5
LBB0_29:
Lloh17:
	adrp	x8, _DRM_MODE_ENCODER_TMDS@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DRM_MODE_ENCODER_TMDS@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_amdgpu_connector_find_encoder
	cbz	x0, LBB0_37
; %bb.30:
	bl	_to_amdgpu_encoder
	ldr	w8, [x0, #8]
	cmp	w8, w19
	b.eq	LBB0_6
; %bb.31:
	str	w19, [x0, #8]
	add	x0, x0, #16
	bl	_amdgpu_connector_property_change_mode
	b	LBB0_6
LBB0_32:
Lloh20:
	adrp	x8, _RMX_OFF@GOTPAGE
Lloh21:
	ldr	x8, [x8, _RMX_OFF@GOTPAGEOFF]
LBB0_33:
	ldr	w8, [x8]
	ldr	w9, [x0, #12]
	cmp	w9, w8
	b.eq	LBB0_37
; %bb.34:
	cmp	w8, #128
	b.eq	LBB0_36
; %bb.35:
	ldr	x9, [x0, #24]
	cbz	x9, LBB0_37
LBB0_36:
	str	w8, [x0, #12]
	add	x0, x0, #16
	bl	_amdgpu_connector_property_change_mode
LBB0_37:
	mov	w0, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.cfi_endproc
                                        ; -- End function
	.comm	_DRM_MODE_ENCODER_TMDS,4,2      ; @DRM_MODE_ENCODER_TMDS
	.comm	_RMX_OFF,4,2                    ; @RMX_OFF
	.comm	_RMX_CENTER,4,2                 ; @RMX_CENTER
	.comm	_RMX_ASPECT,4,2                 ; @RMX_ASPECT
	.comm	_RMX_FULL,4,2                   ; @RMX_FULL
	.no_dead_strip	_amdgpu_connector_set_property
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.amdgpu_connector_set_property
l_switch.table.amdgpu_connector_set_property:
	.quad	_RMX_FULL
	.quad	_RMX_CENTER
	.quad	_RMX_ASPECT

.subsections_via_symbols
