	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_set_surface_reg           ## -- Begin function r100_set_surface_reg
	.p2align	4, 0x90
_r100_set_surface_reg:                  ## @r100_set_surface_reg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
                                        ## kill: def $r9d killed $r9d def $r9
	movl	%r8d, %r14d
	movl	%ecx, %eax
	movl	%edx, %r12d
	movq	(%rdi), %r10
	movq	_CHIP_RS200@GOTPCREL(%rip), %rdi
	cmpq	(%rdi), %r10
	jle	LBB0_1
## %bb.6:
	movq	_CHIP_RV280@GOTPCREL(%rip), %rdx
	movq	_RADEON_TILING_MACRO@GOTPCREL(%rip), %rdi
	movl	(%rdi), %r8d
	cmpq	(%rdx), %r10
	jle	LBB0_7
## %bb.11:
	andl	%r12d, %r8d
	je	LBB0_13
## %bb.12:
	movq	_R300_SURF_TILE_MACRO@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r8d
LBB0_13:
	movq	_RADEON_TILING_MICRO@GOTPCREL(%rip), %rdx
	testl	%r12d, (%rdx)
	je	LBB0_16
## %bb.14:
	movq	_R300_SURF_TILE_MICRO@GOTPCREL(%rip), %rdx
	jmp	LBB0_15
LBB0_1:
	movq	_RADEON_TILING_MACRO@GOTPCREL(%rip), %rdi
	movl	(%rdi), %ebx
	movq	_RADEON_TILING_MICRO@GOTPCREL(%rip), %rdi
	movl	(%rdi), %edi
	orl	%ebx, %edi
	movl	%edi, %edx
	andl	%r12d, %edx
	xorl	%r8d, %r8d
	cmpl	%edi, %edx
	jne	LBB0_3
## %bb.2:
	movq	_RADEON_SURF_TILE_COLOR_BOTH@GOTPCREL(%rip), %rdi
	movl	(%rdi), %r8d
LBB0_3:
	andl	%r12d, %ebx
	je	LBB0_5
## %bb.4:
	movq	_RADEON_SURF_TILE_COLOR_MACRO@GOTPCREL(%rip), %rdi
	movl	(%rdi), %ebx
LBB0_5:
	orl	%ebx, %r8d
	testl	%edx, %edx
	cmovel	%edx, %eax
	jmp	LBB0_16
LBB0_7:
	andl	%r12d, %r8d
	je	LBB0_9
## %bb.8:
	movq	_R200_SURF_TILE_COLOR_MACRO@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r8d
LBB0_9:
	movq	_RADEON_TILING_MICRO@GOTPCREL(%rip), %rdx
	testl	%r12d, (%rdx)
	je	LBB0_16
## %bb.10:
	movq	_R200_SURF_TILE_COLOR_MICRO@GOTPCREL(%rip), %rdx
LBB0_15:
	orl	(%rdx), %r8d
LBB0_16:
	movq	_RADEON_TILING_SWAP_16BIT@GOTPCREL(%rip), %r11
	movq	_RADEON_SURF_AP1_SWP_16BPP@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edi
	movq	_RADEON_TILING_SWAP_32BIT@GOTPCREL(%rip), %r15
	movq	_CHIP_R300@GOTPCREL(%rip), %rbx
	xorl	%edx, %edx
	cmpq	(%rbx), %r10
	movq	_RADEON_SURF_AP1_SWP_32BPP@GOTPCREL(%rip), %rbx
	movl	(%rbx), %ebx
	setl	%dl
	leal	8(,%rdx,8), %ecx
	cltd
	idivl	%ecx
	movl	(%r15), %ecx
	andl	%r12d, %ecx
	andl	(%r11), %r12d
	movq	_RADEON_SURF_AP0_SWP_16BPP@GOTPCREL(%rip), %rdx
	orl	(%rdx), %edi
	testl	%r12d, %r12d
	cmovel	%r12d, %edi
	movq	_RADEON_SURF_AP0_SWP_32BPP@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ebx
	testl	%ecx, %ecx
	cmovel	%ecx, %ebx
	orl	%r8d, %ebx
	orl	%edi, %ebx
	orl	%eax, %ebx
	movl	%esi, %r12d
	shll	$4, %r12d
	leal	(%r14,%r9), %r15d
	decl	%r15d
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %edx
	movl	%r14d, %ecx
	movl	%r15d, %r8d
	callq	_DRM_DEBUG_KMS
	movq	_RADEON_SURFACE0_INFO@GOTPCREL(%rip), %rax
	movslq	%r12d, %r12
	movq	(%rax), %rdi
	addq	%r12, %rdi
	movl	%ebx, %esi
	callq	_WREG32
	movq	_RADEON_SURFACE0_LOWER_BOUND@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	%r12, %rdi
	movl	%r14d, %esi
	callq	_WREG32
	movq	_RADEON_SURFACE0_UPPER_BOUND@GOTPCREL(%rip), %rax
	addq	(%rax), %r12
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_WREG32
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CHIP_RS200,8,3                 ## @CHIP_RS200
	.comm	_RADEON_TILING_MACRO,4,2        ## @RADEON_TILING_MACRO
	.comm	_RADEON_TILING_MICRO,4,2        ## @RADEON_TILING_MICRO
	.comm	_RADEON_SURF_TILE_COLOR_BOTH,4,2 ## @RADEON_SURF_TILE_COLOR_BOTH
	.comm	_RADEON_SURF_TILE_COLOR_MACRO,4,2 ## @RADEON_SURF_TILE_COLOR_MACRO
	.comm	_CHIP_RV280,8,3                 ## @CHIP_RV280
	.comm	_R200_SURF_TILE_COLOR_MACRO,4,2 ## @R200_SURF_TILE_COLOR_MACRO
	.comm	_R200_SURF_TILE_COLOR_MICRO,4,2 ## @R200_SURF_TILE_COLOR_MICRO
	.comm	_R300_SURF_TILE_MACRO,4,2       ## @R300_SURF_TILE_MACRO
	.comm	_R300_SURF_TILE_MICRO,4,2       ## @R300_SURF_TILE_MICRO
	.comm	_RADEON_TILING_SWAP_16BIT,4,2   ## @RADEON_TILING_SWAP_16BIT
	.comm	_RADEON_SURF_AP0_SWP_16BPP,4,2  ## @RADEON_SURF_AP0_SWP_16BPP
	.comm	_RADEON_SURF_AP1_SWP_16BPP,4,2  ## @RADEON_SURF_AP1_SWP_16BPP
	.comm	_RADEON_TILING_SWAP_32BIT,4,2   ## @RADEON_TILING_SWAP_32BIT
	.comm	_RADEON_SURF_AP0_SWP_32BPP,4,2  ## @RADEON_SURF_AP0_SWP_32BPP
	.comm	_RADEON_SURF_AP1_SWP_32BPP,4,2  ## @RADEON_SURF_AP1_SWP_32BPP
	.comm	_CHIP_R300,8,3                  ## @CHIP_R300
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"writing surface %d %d %x %x\n"

	.comm	_RADEON_SURFACE0_INFO,8,3       ## @RADEON_SURFACE0_INFO
	.comm	_RADEON_SURFACE0_LOWER_BOUND,8,3 ## @RADEON_SURFACE0_LOWER_BOUND
	.comm	_RADEON_SURFACE0_UPPER_BOUND,8,3 ## @RADEON_SURFACE0_UPPER_BOUND
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_set_surface_reg           ; -- Begin function r100_set_surface_reg
	.p2align	2
_r100_set_surface_reg:                  ; @r100_set_surface_reg
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x4
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _CHIP_RS200@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CHIP_RS200@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.le	LBB0_4
; %bb.1:
Lloh3:
	adrp	x9, _CHIP_RV280@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CHIP_RV280@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x9]
Lloh6:
	adrp	x9, _RADEON_TILING_MACRO@GOTPAGE
Lloh7:
	ldr	x9, [x9, _RADEON_TILING_MACRO@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	and	w9, w9, w2
	cmp	x8, x10
	b.le	LBB0_5
; %bb.2:
Lloh9:
	adrp	x10, _R300_SURF_TILE_MACRO@GOTPAGE
Lloh10:
	ldr	x10, [x10, _R300_SURF_TILE_MACRO@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	cmp	w9, #0
	csel	w9, wzr, w10, eq
Lloh12:
	adrp	x10, _RADEON_TILING_MICRO@GOTPAGE
Lloh13:
	ldr	x10, [x10, _RADEON_TILING_MICRO@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
	tst	w10, w2
	b.eq	LBB0_9
; %bb.3:
Lloh15:
	adrp	x10, _R300_SURF_TILE_MICRO@GOTPAGE
Lloh16:
	ldr	x10, [x10, _R300_SURF_TILE_MICRO@GOTPAGEOFF]
	b	LBB0_7
LBB0_4:
Lloh17:
	adrp	x9, _RADEON_TILING_MACRO@GOTPAGE
Lloh18:
	ldr	x9, [x9, _RADEON_TILING_MACRO@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
Lloh20:
	adrp	x10, _RADEON_TILING_MICRO@GOTPAGE
Lloh21:
	ldr	x10, [x10, _RADEON_TILING_MICRO@GOTPAGEOFF]
Lloh22:
	ldr	w10, [x10]
Lloh23:
	adrp	x11, _RADEON_SURF_TILE_COLOR_BOTH@GOTPAGE
Lloh24:
	ldr	x11, [x11, _RADEON_SURF_TILE_COLOR_BOTH@GOTPAGEOFF]
	orr	w10, w10, w9
Lloh25:
	ldr	w11, [x11]
	ands	w12, w10, w2
	csel	w3, wzr, w3, eq
Lloh26:
	adrp	x13, _RADEON_SURF_TILE_COLOR_MACRO@GOTPAGE
Lloh27:
	ldr	x13, [x13, _RADEON_SURF_TILE_COLOR_MACRO@GOTPAGEOFF]
Lloh28:
	ldr	w13, [x13]
	cmp	w12, w10
	csel	w10, w11, wzr, eq
	tst	w9, w2
	csel	w9, wzr, w13, eq
	b	LBB0_8
LBB0_5:
Lloh29:
	adrp	x10, _R200_SURF_TILE_COLOR_MACRO@GOTPAGE
Lloh30:
	ldr	x10, [x10, _R200_SURF_TILE_COLOR_MACRO@GOTPAGEOFF]
Lloh31:
	ldr	w10, [x10]
	cmp	w9, #0
	csel	w9, wzr, w10, eq
Lloh32:
	adrp	x10, _RADEON_TILING_MICRO@GOTPAGE
Lloh33:
	ldr	x10, [x10, _RADEON_TILING_MICRO@GOTPAGEOFF]
Lloh34:
	ldr	w10, [x10]
	tst	w10, w2
	b.eq	LBB0_9
; %bb.6:
Lloh35:
	adrp	x10, _R200_SURF_TILE_COLOR_MICRO@GOTPAGE
Lloh36:
	ldr	x10, [x10, _R200_SURF_TILE_COLOR_MICRO@GOTPAGEOFF]
LBB0_7:
	ldr	w10, [x10]
LBB0_8:
	orr	w9, w10, w9
LBB0_9:
Lloh37:
	adrp	x10, _RADEON_TILING_SWAP_16BIT@GOTPAGE
Lloh38:
	ldr	x10, [x10, _RADEON_TILING_SWAP_16BIT@GOTPAGEOFF]
Lloh39:
	ldr	w10, [x10]
Lloh40:
	adrp	x11, _RADEON_SURF_AP0_SWP_16BPP@GOTPAGE
Lloh41:
	ldr	x11, [x11, _RADEON_SURF_AP0_SWP_16BPP@GOTPAGEOFF]
Lloh42:
	ldr	w11, [x11]
Lloh43:
	adrp	x12, _RADEON_SURF_AP1_SWP_16BPP@GOTPAGE
Lloh44:
	ldr	x12, [x12, _RADEON_SURF_AP1_SWP_16BPP@GOTPAGEOFF]
Lloh45:
	ldr	w12, [x12]
Lloh46:
	adrp	x13, _RADEON_TILING_SWAP_32BIT@GOTPAGE
Lloh47:
	ldr	x13, [x13, _RADEON_TILING_SWAP_32BIT@GOTPAGEOFF]
Lloh48:
	ldr	w13, [x13]
Lloh49:
	adrp	x14, _RADEON_SURF_AP0_SWP_32BPP@GOTPAGE
Lloh50:
	ldr	x14, [x14, _RADEON_SURF_AP0_SWP_32BPP@GOTPAGEOFF]
Lloh51:
	ldr	w14, [x14]
Lloh52:
	adrp	x15, _RADEON_SURF_AP1_SWP_32BPP@GOTPAGE
Lloh53:
	ldr	x15, [x15, _RADEON_SURF_AP1_SWP_32BPP@GOTPAGEOFF]
Lloh54:
	ldr	w15, [x15]
Lloh55:
	adrp	x16, _CHIP_R300@GOTPAGE
Lloh56:
	ldr	x16, [x16, _CHIP_R300@GOTPAGEOFF]
Lloh57:
	ldr	x16, [x16]
	cmp	x8, x16
	mov	w8, #8
	mov	w16, #16
	csel	w8, w16, w8, lt
	sdiv	w8, w3, w8
	orr	w11, w12, w11
	tst	w10, w2
	csel	w10, wzr, w11, eq
	orr	w9, w10, w9
	orr	w10, w15, w14
	tst	w13, w2
	csel	w10, wzr, w10, eq
	orr	w9, w9, w10
	orr	w20, w9, w8
	lsl	w22, w1, #4
	add	w8, w19, w5
	sub	w21, w8, #1
Lloh58:
	adrp	x0, l_.str@PAGE
Lloh59:
	add	x0, x0, l_.str@PAGEOFF
	mov	x2, x20
	mov	x3, x19
	mov	x4, x21
	bl	_DRM_DEBUG_KMS
Lloh60:
	adrp	x8, _RADEON_SURFACE0_INFO@GOTPAGE
Lloh61:
	ldr	x8, [x8, _RADEON_SURFACE0_INFO@GOTPAGEOFF]
Lloh62:
	ldr	x8, [x8]
	sxtw	x22, w22
	add	x0, x8, x22
	mov	x1, x20
	bl	_WREG32
Lloh63:
	adrp	x8, _RADEON_SURFACE0_LOWER_BOUND@GOTPAGE
Lloh64:
	ldr	x8, [x8, _RADEON_SURFACE0_LOWER_BOUND@GOTPAGEOFF]
Lloh65:
	ldr	x8, [x8]
	add	x0, x8, x22
	mov	x1, x19
	bl	_WREG32
Lloh66:
	adrp	x8, _RADEON_SURFACE0_UPPER_BOUND@GOTPAGE
Lloh67:
	ldr	x8, [x8, _RADEON_SURFACE0_UPPER_BOUND@GOTPAGEOFF]
Lloh68:
	ldr	x8, [x8]
	add	x0, x8, x22
	mov	x1, x21
	bl	_WREG32
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpAdd	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.cfi_endproc
                                        ; -- End function
	.comm	_CHIP_RS200,8,3                 ; @CHIP_RS200
	.comm	_RADEON_TILING_MACRO,4,2        ; @RADEON_TILING_MACRO
	.comm	_RADEON_TILING_MICRO,4,2        ; @RADEON_TILING_MICRO
	.comm	_RADEON_SURF_TILE_COLOR_BOTH,4,2 ; @RADEON_SURF_TILE_COLOR_BOTH
	.comm	_RADEON_SURF_TILE_COLOR_MACRO,4,2 ; @RADEON_SURF_TILE_COLOR_MACRO
	.comm	_CHIP_RV280,8,3                 ; @CHIP_RV280
	.comm	_R200_SURF_TILE_COLOR_MACRO,4,2 ; @R200_SURF_TILE_COLOR_MACRO
	.comm	_R200_SURF_TILE_COLOR_MICRO,4,2 ; @R200_SURF_TILE_COLOR_MICRO
	.comm	_R300_SURF_TILE_MACRO,4,2       ; @R300_SURF_TILE_MACRO
	.comm	_R300_SURF_TILE_MICRO,4,2       ; @R300_SURF_TILE_MICRO
	.comm	_RADEON_TILING_SWAP_16BIT,4,2   ; @RADEON_TILING_SWAP_16BIT
	.comm	_RADEON_SURF_AP0_SWP_16BPP,4,2  ; @RADEON_SURF_AP0_SWP_16BPP
	.comm	_RADEON_SURF_AP1_SWP_16BPP,4,2  ; @RADEON_SURF_AP1_SWP_16BPP
	.comm	_RADEON_TILING_SWAP_32BIT,4,2   ; @RADEON_TILING_SWAP_32BIT
	.comm	_RADEON_SURF_AP0_SWP_32BPP,4,2  ; @RADEON_SURF_AP0_SWP_32BPP
	.comm	_RADEON_SURF_AP1_SWP_32BPP,4,2  ; @RADEON_SURF_AP1_SWP_32BPP
	.comm	_CHIP_R300,8,3                  ; @CHIP_R300
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"writing surface %d %d %x %x\n"

	.comm	_RADEON_SURFACE0_INFO,8,3       ; @RADEON_SURFACE0_INFO
	.comm	_RADEON_SURFACE0_LOWER_BOUND,8,3 ; @RADEON_SURFACE0_LOWER_BOUND
	.comm	_RADEON_SURFACE0_UPPER_BOUND,8,3 ; @RADEON_SURFACE0_UPPER_BOUND
.subsections_via_symbols
