	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	___intel_display_power_put_async ## -- Begin function __intel_display_power_put_async
	.p2align	4, 0x90
___intel_display_power_put_async:       ## @__intel_display_power_put_async
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movl	%esi, %r13d
	movq	%rdi, %rbx
	leaq	8(%rdi), %r15
	callq	_intel_runtime_pm_get_raw
	movq	%rax, -56(%rbp)
	leaq	16(%rbx), %r12
	movq	%r12, %rdi
	callq	_mutex_lock
	movq	8(%rbx), %rax
	movl	%r13d, %ecx
	movl	(%rax,%rcx,4), %eax
	cmpl	$2, %eax
	jl	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	movl	%r13d, %esi
	callq	___intel_display_power_put_domain
	jmp	LBB0_6
LBB0_2:
	movq	%r14, -48(%rbp)                 ## 8-byte Spill
	xorl	%edi, %edi
	cmpl	$1, %eax
	setne	%dil
	callq	_WARN_ON
	movq	32(%rbx), %r14
	movl	%r13d, %edi
	callq	_BIT_ULL
	movq	24(%rbx), %rcx
	testq	%r14, %r14
	je	LBB0_4
## %bb.3:
	orl	%eax, 4(%rcx)
	jmp	LBB0_5
LBB0_4:
	orl	%eax, (%rcx)
	leaq	-56(%rbp), %rdi
	callq	_fetch_and_zero
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_queue_async_put_domains_work
LBB0_5:
	movq	-48(%rbp), %r14                 ## 8-byte Reload
LBB0_6:
	movq	%r15, %rdi
	callq	_verify_async_put_domains_state
	movq	%r12, %rdi
	callq	_mutex_unlock
	movq	-56(%rbp), %rsi
	testq	%rsi, %rsi
	je	LBB0_8
## %bb.7:
	movq	%rbx, %rdi
	callq	_intel_runtime_pm_put_raw
LBB0_8:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_intel_runtime_pm_put
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	___intel_display_power_put_async ; -- Begin function __intel_display_power_put_async
	.p2align	2
___intel_display_power_put_async:       ; @__intel_display_power_put_async
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x23, x1
	mov	x20, x0
	bl	_intel_runtime_pm_get_raw
	str	x0, [sp, #8]
	add	x21, x20, #16
	mov	x0, x21
	bl	_mutex_lock
	mov	x22, x20
	ldr	x8, [x22, #8]!
	ldr	w8, [x8, w23, uxtw #2]
	cmp	w8, #2
	b.lt	LBB0_2
; %bb.1:
	mov	x0, x20
	mov	x1, x23
	bl	___intel_display_power_put_domain
	b	LBB0_5
LBB0_2:
	cmp	w8, #1
	cset	w0, ne
	bl	_WARN_ON
	ldr	x24, [x20, #32]
	mov	x0, x23
	bl	_BIT_ULL
	ldr	x8, [x20, #24]
	cbz	x24, LBB0_4
; %bb.3:
	ldr	w9, [x8, #4]
	orr	w9, w9, w0
	str	w9, [x8, #4]
	b	LBB0_5
LBB0_4:
	ldr	w9, [x8]
	orr	w9, w9, w0
	str	w9, [x8]
	add	x0, sp, #8
	bl	_fetch_and_zero
	mov	x1, x0
	mov	x0, x22
	bl	_queue_async_put_domains_work
LBB0_5:
	mov	x0, x22
	bl	_verify_async_put_domains_state
	mov	x0, x21
	bl	_mutex_unlock
	ldr	x1, [sp, #8]
	cbz	x1, LBB0_7
; %bb.6:
	mov	x0, x20
	bl	_intel_runtime_pm_put_raw
LBB0_7:
	mov	x0, x20
	mov	x1, x19
	bl	_intel_runtime_pm_put
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.cfi_endproc
                                        ; -- End function
.subsections_via_symbols
