	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_vm_bo_split_mapping
_amdgpu_vm_bo_split_mapping:            ## @amdgpu_vm_bo_split_mapping
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$72, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, -96(%rbp)                 ## 8-byte Spill
	movb	8(%rdi), %cl
	movl	$1, %eax
	shlq	%cl, %rax
	movq	%rax, -72(%rbp)                 ## 8-byte Spill
	movq	%rdx, -56(%rbp)                 ## 8-byte Spill
	movq	%rsi, -80(%rbp)                 ## 8-byte Spill
	movq	%r8, -64(%rbp)                  ## 8-byte Spill
	movq	8(%r8), %rax
	movq	_AMDGPU_PTE_READABLE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, %rsi
	andq	%rax, %rsi
	notq	%rcx
	xorl	%edx, %edx
	negq	%rsi
	movl	$0, %esi
	sbbq	%rsi, %rsi
	orq	%rcx, %rsi
	movq	_AMDGPU_PTE_WRITEABLE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rbx
	movq	%rbx, %rcx
	andq	%rax, %rcx
	notq	%rbx
	negq	%rcx
	sbbq	%rdx, %rdx
	orq	%rbx, %rdx
	movq	_AMDGPU_PTE_EXECUTABLE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rbx
	movq	%rbx, %rcx
	notq	%rcx
	andq	%r9, %rcx
	andq	%rsi, %rcx
	andq	%rdx, %rcx
	andq	%rax, %rbx
	orq	%rcx, %rbx
	movq	%rdi, -88(%rbp)                 ## 8-byte Spill
	movq	(%rdi), %rdx
	movq	_CHIP_NAVI10@GOTPCREL(%rip), %rsi
	movq	(%rsi), %rsi
	cmpq	%rsi, %rdx
	jge	LBB0_1
## %bb.2:
	movq	_AMDGPU_PTE_MTYPE_VG10_MASK@GOTPCREL(%rip), %rdi
	jmp	LBB0_3
LBB0_1:
	movq	_AMDGPU_PTE_MTYPE_NV10_MASK@GOTPCREL(%rip), %rdi
LBB0_3:
	movq	24(%rbp), %r14
	movq	%rax, %rcx
	xorq	%rbx, %rcx
	andq	(%rdi), %rcx
	xorq	%rbx, %rcx
	movq	%rcx, -48(%rbp)                 ## 8-byte Spill
	movq	_AMDGPU_PTE_PRT@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	testq	%rax, %rcx
	je	LBB0_8
## %bb.4:
	movq	_CHIP_VEGA10@GOTPCREL(%rip), %rax
	cmpq	(%rax), %rdx
	jl	LBB0_8
## %bb.5:
	orq	-48(%rbp), %rcx                 ## 8-byte Folded Reload
	cmpq	%rsi, %rdx
	jl	LBB0_7
## %bb.6:
	movq	_AMDGPU_PTE_SNOOPED@GOTPCREL(%rip), %rax
	orq	(%rax), %rcx
	movq	_AMDGPU_PTE_LOG@GOTPCREL(%rip), %rax
	orq	(%rax), %rcx
	movq	_AMDGPU_PTE_SYSTEM@GOTPCREL(%rip), %rax
	orq	(%rax), %rcx
LBB0_7:
	movq	_AMDGPU_PTE_VALID@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	notq	%rax
	andq	%rcx, %rax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
LBB0_8:
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	movq	(%rbx), %r15
	movq	%rbx, %rdi
	callq	_trace_amdgpu_vm_bo_update
	movq	16(%rbx), %r12
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	sarq	%cl, %r12
	testq	%r14, %r14
	je	LBB0_9
## %bb.10:
	movq	%r14, %rbx
	movq	(%r14), %rax
	cmpq	%rax, %r12
	jl	LBB0_13
	.p2align	4, 0x90
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	subq	%rax, %r12
	movq	16(%rbx), %rax
	addq	$16, %rbx
	cmpq	%rax, %r12
	jge	LBB0_11
	jmp	LBB0_13
LBB0_9:
	xorl	%ebx, %ebx
	jmp	LBB0_13
	.p2align	4, 0x90
LBB0_37:                                ##   in Loop: Header=BB0_13 Depth=1
	xorl	%eax, %eax
	cmpq	%r12, (%rbx)
	sete	%al
	movl	$0, %ecx
	cmoveq	%rcx, %r12
	shlq	$4, %rax
	addq	%rax, %rbx
LBB0_38:                                ##   in Loop: Header=BB0_13 Depth=1
	movq	%r14, %r15
	incq	%r15
	xorl	%edi, %edi
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	cmpq	24(%rax), %r14
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_39
LBB0_13:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_22 Depth 2
	testq	%rbx, %rbx
	movq	%rbx, -112(%rbp)                ## 8-byte Spill
	je	LBB0_15
## %bb.14:                              ##   in Loop: Header=BB0_13 Depth=1
	movq	%rbx, %rax
	movq	8(%rbx), %rbx
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %rbx
	movq	(%rax), %rsi
	subq	%r12, %rsi
	movq	_AMDGPU_GPU_PAGES_IN_CPU_PAGE@GOTPCREL(%rip), %rax
	imulq	(%rax), %rsi
	jmp	LBB0_16
	.p2align	4, 0x90
LBB0_15:                                ##   in Loop: Header=BB0_13 Depth=1
	movq	_S64_MAX@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	xorl	%ebx, %ebx
LBB0_16:                                ##   in Loop: Header=BB0_13 Depth=1
	cmpq	$0, -56(%rbp)                   ## 8-byte Folded Reload
	movq	%r12, -104(%rbp)                ## 8-byte Spill
	je	LBB0_28
## %bb.17:                              ##   in Loop: Header=BB0_13 Depth=1
	movq	_AMDGPU_GPU_PAGES_IN_CPU_PAGE@GOTPCREL(%rip), %rax
	movq	(%rax), %r8
	movq	%rsi, %rax
	orq	%r8, %rax
	shrq	$32, %rax
	je	LBB0_18
## %bb.19:                              ##   in Loop: Header=BB0_13 Depth=1
	movq	%rsi, %rax
	cqto
	idivq	%r8
	jmp	LBB0_20
	.p2align	4, 0x90
LBB0_28:                                ##   in Loop: Header=BB0_13 Depth=1
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	_AMDGPU_PTE_VALID@GOTPCREL(%rip), %rcx
	testq	%rax, (%rcx)
	je	LBB0_30
## %bb.29:                              ##   in Loop: Header=BB0_13 Depth=1
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shlq	%cl, %r12
	movq	16(%rbp), %rcx
	addq	16(%rcx), %rbx
	addq	%r12, %rbx
LBB0_30:                                ##   in Loop: Header=BB0_13 Depth=1
	xorl	%r12d, %r12d
	jmp	LBB0_31
	.p2align	4, 0x90
LBB0_18:                                ##   in Loop: Header=BB0_13 Depth=1
	movl	%esi, %eax
	xorl	%edx, %edx
	divl	%r8d
                                        ## kill: def $eax killed $eax def $rax
LBB0_20:                                ##   in Loop: Header=BB0_13 Depth=1
	movl	$1, %edx
	cmpq	$2, %rax
	jl	LBB0_25
## %bb.21:                              ##   in Loop: Header=BB0_13 Depth=1
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rdi
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	leaq	(%rcx,%r12,8), %rbx
	movl	$1, %edx
	.p2align	4, 0x90
LBB0_22:                                ##   Parent Loop BB0_13 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	-8(%rbx,%rdx,8), %rcx
	addq	%rdi, %rcx
	cmpq	%rcx, (%rbx,%rdx,8)
	jne	LBB0_25
## %bb.23:                              ##   in Loop: Header=BB0_22 Depth=2
	incq	%rdx
	cmpq	%rdx, %rax
	jne	LBB0_22
## %bb.24:                              ##   in Loop: Header=BB0_13 Depth=1
	movq	%rax, %rdx
LBB0_25:                                ##   in Loop: Header=BB0_13 Depth=1
	cmpq	-72(%rbp), %rdx                 ## 8-byte Folded Reload
	jae	LBB0_27
## %bb.26:                              ##   in Loop: Header=BB0_13 Depth=1
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movq	%r12, %rbx
	shlq	%cl, %rbx
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	jmp	LBB0_31
	.p2align	4, 0x90
LBB0_27:                                ##   in Loop: Header=BB0_13 Depth=1
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax,%r12,8), %rbx
	imulq	%rdx, %r8
	xorl	%r12d, %r12d
	movq	%r8, %rsi
LBB0_31:                                ##   in Loop: Header=BB0_13 Depth=1
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movq	24(%rax), %rdi
	addq	%r15, %rsi
	decq	%rsi
	callq	_min
	movq	%rax, %r14
	subq	$8, %rsp
	movq	-88(%rbp), %rdi                 ## 8-byte Reload
	movq	-80(%rbp), %rsi                 ## 8-byte Reload
	movq	%r12, %rdx
	movq	-96(%rbp), %rcx                 ## 8-byte Reload
	movq	%r15, %r8
	movq	%rax, %r9
	pushq	32(%rbp)
	pushq	%rbx
	pushq	-48(%rbp)                       ## 8-byte Folded Reload
	callq	_amdgpu_vm_bo_update_mapping
	addq	$32, %rsp
	movl	%eax, %r13d
	testl	%eax, %eax
	movq	-112(%rbp), %rbx                ## 8-byte Reload
	movq	-104(%rbp), %rsi                ## 8-byte Reload
	jne	LBB0_39
## %bb.32:                              ##   in Loop: Header=BB0_13 Depth=1
	movq	%r14, %rax
	subq	%r15, %rax
	incq	%rax
	movq	_AMDGPU_GPU_PAGES_IN_CPU_PAGE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rax, %rdx
	orq	%rcx, %rdx
	shrq	$32, %rdx
	je	LBB0_33
## %bb.34:                              ##   in Loop: Header=BB0_13 Depth=1
	cqto
	idivq	%rcx
	movq	%rax, %r12
	jmp	LBB0_35
	.p2align	4, 0x90
LBB0_33:                                ##   in Loop: Header=BB0_13 Depth=1
                                        ## kill: def $eax killed $eax killed $rax
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r12d
LBB0_35:                                ##   in Loop: Header=BB0_13 Depth=1
	addq	%rsi, %r12
	testq	%rbx, %rbx
	jne	LBB0_37
## %bb.36:                              ##   in Loop: Header=BB0_13 Depth=1
	xorl	%ebx, %ebx
	jmp	LBB0_38
LBB0_39:
	movl	%r13d, %eax
	addq	$72, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_PTE_READABLE,8,3        ## @AMDGPU_PTE_READABLE
	.comm	_AMDGPU_PTE_WRITEABLE,8,3       ## @AMDGPU_PTE_WRITEABLE
	.comm	_AMDGPU_PTE_EXECUTABLE,8,3      ## @AMDGPU_PTE_EXECUTABLE
	.comm	_CHIP_NAVI10,8,3                ## @CHIP_NAVI10
	.comm	_AMDGPU_PTE_MTYPE_NV10_MASK,8,3 ## @AMDGPU_PTE_MTYPE_NV10_MASK
	.comm	_AMDGPU_PTE_MTYPE_VG10_MASK,8,3 ## @AMDGPU_PTE_MTYPE_VG10_MASK
	.comm	_AMDGPU_PTE_PRT,8,3             ## @AMDGPU_PTE_PRT
	.comm	_CHIP_VEGA10,8,3                ## @CHIP_VEGA10
	.comm	_AMDGPU_PTE_SNOOPED,8,3         ## @AMDGPU_PTE_SNOOPED
	.comm	_AMDGPU_PTE_LOG,8,3             ## @AMDGPU_PTE_LOG
	.comm	_AMDGPU_PTE_SYSTEM,8,3          ## @AMDGPU_PTE_SYSTEM
	.comm	_AMDGPU_PTE_VALID,8,3           ## @AMDGPU_PTE_VALID
	.comm	_PAGE_SHIFT,8,3                 ## @PAGE_SHIFT
	.comm	_AMDGPU_GPU_PAGES_IN_CPU_PAGE,8,3 ## @AMDGPU_GPU_PAGES_IN_CPU_PAGE
	.comm	_S64_MAX,8,3                    ## @S64_MAX
	.comm	_PAGE_SIZE,8,3                  ## @PAGE_SIZE
	.no_dead_strip	_amdgpu_vm_bo_split_mapping
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_vm_bo_split_mapping
_amdgpu_vm_bo_split_mapping:            ; @amdgpu_vm_bo_split_mapping
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #160
	.cfi_def_cfa_offset 160
	stp	x28, x27, [sp, #64]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #80]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #96]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #112]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #128]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #144]            ; 16-byte Folded Spill
	add	x29, sp, #144
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x25, x7
	str	x6, [sp, #16]                   ; 8-byte Folded Spill
	mov	x20, x4
	stp	x1, x3, [sp, #48]               ; 16-byte Folded Spill
	mov	x21, x2
	ldr	w19, [x0, #8]
	mov	w22, #1
	ldr	x11, [x4, #8]
Lloh0:
	adrp	x8, _AMDGPU_PTE_READABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_PTE_READABLE@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	tst	x8, x11
	mov	x9, #-1
	csinv	x8, x9, x8, ne
Lloh3:
	adrp	x10, _AMDGPU_PTE_WRITEABLE@GOTPAGE
Lloh4:
	ldr	x10, [x10, _AMDGPU_PTE_WRITEABLE@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
	tst	x10, x11
	csinv	x9, x9, x10, ne
Lloh6:
	adrp	x10, _AMDGPU_PTE_EXECUTABLE@GOTPAGE
Lloh7:
	ldr	x10, [x10, _AMDGPU_PTE_EXECUTABLE@GOTPAGEOFF]
Lloh8:
	ldr	x10, [x10]
	bic	x12, x5, x10
	and	x8, x12, x8
	and	x8, x8, x9
	and	x9, x10, x11
	orr	x10, x8, x9
	str	x0, [sp, #40]                   ; 8-byte Folded Spill
	ldr	x8, [x0]
Lloh9:
	adrp	x9, _CHIP_NAVI10@GOTPAGE
Lloh10:
	ldr	x9, [x9, _CHIP_NAVI10@GOTPAGEOFF]
Lloh11:
	adrp	x12, _AMDGPU_PTE_MTYPE_VG10_MASK@GOTPAGE
Lloh12:
	ldr	x12, [x12, _AMDGPU_PTE_MTYPE_VG10_MASK@GOTPAGEOFF]
Lloh13:
	adrp	x13, _AMDGPU_PTE_MTYPE_NV10_MASK@GOTPAGE
Lloh14:
	ldr	x13, [x13, _AMDGPU_PTE_MTYPE_NV10_MASK@GOTPAGEOFF]
Lloh15:
	ldr	x9, [x9]
	cmp	x8, x9
	csel	x12, x12, x13, lt
	ldr	x12, [x12]
	bic	x10, x10, x12
	and	x12, x12, x11
	orr	x26, x10, x12
Lloh16:
	adrp	x10, _AMDGPU_PTE_PRT@GOTPAGE
Lloh17:
	ldr	x10, [x10, _AMDGPU_PTE_PRT@GOTPAGEOFF]
Lloh18:
	ldr	x10, [x10]
Lloh19:
	adrp	x12, _CHIP_VEGA10@GOTPAGE
Lloh20:
	ldr	x12, [x12, _CHIP_VEGA10@GOTPAGEOFF]
	and	x11, x10, x11
Lloh21:
	ldr	x12, [x12]
	cmp	x11, #0
	ccmp	x8, x12, #8, ne
	b.lt	LBB0_4
; %bb.1:
	orr	x10, x10, x26
	cmp	x8, x9
	b.lt	LBB0_3
; %bb.2:
Lloh22:
	adrp	x8, _AMDGPU_PTE_SNOOPED@GOTPAGE
Lloh23:
	ldr	x8, [x8, _AMDGPU_PTE_SNOOPED@GOTPAGEOFF]
Lloh24:
	ldr	x8, [x8]
	orr	x8, x8, x10
Lloh25:
	adrp	x9, _AMDGPU_PTE_LOG@GOTPAGE
Lloh26:
	ldr	x9, [x9, _AMDGPU_PTE_LOG@GOTPAGEOFF]
Lloh27:
	ldr	x9, [x9]
	orr	x8, x8, x9
Lloh28:
	adrp	x9, _AMDGPU_PTE_SYSTEM@GOTPAGE
Lloh29:
	ldr	x9, [x9, _AMDGPU_PTE_SYSTEM@GOTPAGEOFF]
Lloh30:
	ldr	x9, [x9]
	orr	x10, x8, x9
LBB0_3:
Lloh31:
	adrp	x8, _AMDGPU_PTE_VALID@GOTPAGE
Lloh32:
	ldr	x8, [x8, _AMDGPU_PTE_VALID@GOTPAGEOFF]
Lloh33:
	ldr	x8, [x8]
	bic	x26, x10, x8
LBB0_4:
	ldr	x27, [x20]
	mov	x0, x20
	bl	_trace_amdgpu_vm_bo_update
	ldr	x8, [x20, #16]
Lloh34:
	adrp	x9, _PAGE_SHIFT@GOTPAGE
Lloh35:
	ldr	x9, [x9, _PAGE_SHIFT@GOTPAGEOFF]
Lloh36:
	ldr	x9, [x9]
	asr	x23, x8, x9
	cbz	x25, LBB0_7
; %bb.5:
	ldr	x8, [x25]
	cmp	x23, x8
	b.lt	LBB0_7
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	sub	x23, x23, x8
	ldr	x8, [x25, #16]!
	cmp	x23, x8
	b.ge	LBB0_6
LBB0_7:
	ldr	x9, [x29, #16]
	lsl	x8, x22, x19
	stp	x8, x9, [sp, #24]               ; 16-byte Folded Spill
Lloh37:
	adrp	x24, _AMDGPU_GPU_PAGES_IN_CPU_PAGE@GOTPAGE
Lloh38:
	ldr	x24, [x24, _AMDGPU_GPU_PAGES_IN_CPU_PAGE@GOTPAGEOFF]
	b	LBB0_9
LBB0_8:                                 ;   in Loop: Header=BB0_9 Depth=1
	add	x27, x19, #1
	ldr	x8, [x20, #24]
	cmp	x19, x8
	cset	w0, ne
	bl	_unlikely
	cbz	x0, LBB0_27
LBB0_9:                                 ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_13 Depth 2
	cbz	x25, LBB0_15
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
Lloh39:
	adrp	x8, _PAGE_SHIFT@GOTPAGE
Lloh40:
	ldr	x8, [x8, _PAGE_SHIFT@GOTPAGEOFF]
Lloh41:
	ldr	x8, [x8]
	ldp	x10, x9, [x25]
	lsl	x28, x9, x8
	sub	x8, x10, x23
	ldr	x9, [x24]
	mul	x8, x8, x9
	cbz	x21, LBB0_16
LBB0_11:                                ;   in Loop: Header=BB0_9 Depth=1
	ldr	x9, [x24]
	sdiv	x10, x8, x9
	cmp	x10, #2
	b.lt	LBB0_18
; %bb.12:                               ;   in Loop: Header=BB0_9 Depth=1
	mov	x11, #0
Lloh42:
	adrp	x12, _PAGE_SIZE@GOTPAGE
Lloh43:
	ldr	x12, [x12, _PAGE_SIZE@GOTPAGEOFF]
Lloh44:
	ldr	x12, [x12]
	sub	x13, x10, #1
	add	x14, x21, x23, lsl #3
LBB0_13:                                ;   Parent Loop BB0_9 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	add	x15, x14, x11, lsl #3
	ldp	x15, x16, [x15]
	add	x15, x12, x15
	cmp	x16, x15
	b.ne	LBB0_19
; %bb.14:                               ;   in Loop: Header=BB0_13 Depth=2
	add	x11, x11, #1
	cmp	x13, x11
	b.ne	LBB0_13
	b	LBB0_20
LBB0_15:                                ;   in Loop: Header=BB0_9 Depth=1
	mov	x28, #0
Lloh45:
	adrp	x8, _S64_MAX@GOTPAGE
Lloh46:
	ldr	x8, [x8, _S64_MAX@GOTPAGEOFF]
Lloh47:
	ldr	x8, [x8]
	cbnz	x21, LBB0_11
LBB0_16:                                ;   in Loop: Header=BB0_9 Depth=1
Lloh48:
	adrp	x9, _AMDGPU_PTE_VALID@GOTPAGE
Lloh49:
	ldr	x9, [x9, _AMDGPU_PTE_VALID@GOTPAGEOFF]
Lloh50:
	ldr	x9, [x9]
	tst	x9, x26
	b.eq	LBB0_23
; %bb.17:                               ;   in Loop: Header=BB0_9 Depth=1
	mov	x22, #0
	ldr	x9, [sp, #16]                   ; 8-byte Folded Reload
	ldr	x9, [x9, #16]
Lloh51:
	adrp	x10, _PAGE_SHIFT@GOTPAGE
Lloh52:
	ldr	x10, [x10, _PAGE_SHIFT@GOTPAGEOFF]
Lloh53:
	ldr	x10, [x10]
	lsl	x10, x23, x10
	add	x9, x9, x28
	add	x28, x9, x10
	b	LBB0_24
LBB0_18:                                ;   in Loop: Header=BB0_9 Depth=1
	mov	w10, #1
	b	LBB0_20
LBB0_19:                                ;   in Loop: Header=BB0_9 Depth=1
	add	x10, x11, #1
LBB0_20:                                ;   in Loop: Header=BB0_9 Depth=1
	ldr	x11, [sp, #24]                  ; 8-byte Folded Reload
	cmp	x10, x11
	b.hs	LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_9 Depth=1
Lloh54:
	adrp	x9, _PAGE_SHIFT@GOTPAGE
Lloh55:
	ldr	x9, [x9, _PAGE_SHIFT@GOTPAGEOFF]
Lloh56:
	ldr	x9, [x9]
	lsl	x28, x23, x9
	mov	x22, x21
	b	LBB0_24
LBB0_22:                                ;   in Loop: Header=BB0_9 Depth=1
	mov	x22, #0
	ldr	x28, [x21, x23, lsl #3]
	mul	x8, x9, x10
	b	LBB0_24
LBB0_23:                                ;   in Loop: Header=BB0_9 Depth=1
	mov	x22, #0
LBB0_24:                                ;   in Loop: Header=BB0_9 Depth=1
	ldr	x0, [x20, #24]
	add	x8, x27, x8
	sub	x1, x8, #1
	bl	_min
	mov	x19, x0
	ldp	x8, x0, [sp, #32]               ; 16-byte Folded Reload
	str	x8, [sp]
	ldp	x1, x3, [sp, #48]               ; 16-byte Folded Reload
	mov	x2, x22
	mov	x4, x27
	mov	x5, x19
	mov	x6, x26
	mov	x7, x28
	bl	_amdgpu_vm_bo_update_mapping
	mov	x28, x0
	cbnz	w0, LBB0_27
; %bb.25:                               ;   in Loop: Header=BB0_9 Depth=1
	sub	x8, x19, x27
	add	x8, x8, #1
	ldr	x9, [x24]
	sdiv	x8, x8, x9
	add	x23, x8, x23
	cbz	x25, LBB0_8
; %bb.26:                               ;   in Loop: Header=BB0_9 Depth=1
	ldr	x8, [x25]
	cmp	x8, x23
	csel	x23, xzr, x23, eq
	cset	w8, eq
	add	x25, x25, w8, uxtw #4
	b	LBB0_8
LBB0_27:
	mov	x0, x28
	ldp	x29, x30, [sp, #144]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #128]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #112]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #96]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #80]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #160
	ret
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh15
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_PTE_READABLE,8,3        ; @AMDGPU_PTE_READABLE
	.comm	_AMDGPU_PTE_WRITEABLE,8,3       ; @AMDGPU_PTE_WRITEABLE
	.comm	_AMDGPU_PTE_EXECUTABLE,8,3      ; @AMDGPU_PTE_EXECUTABLE
	.comm	_CHIP_NAVI10,8,3                ; @CHIP_NAVI10
	.comm	_AMDGPU_PTE_MTYPE_NV10_MASK,8,3 ; @AMDGPU_PTE_MTYPE_NV10_MASK
	.comm	_AMDGPU_PTE_MTYPE_VG10_MASK,8,3 ; @AMDGPU_PTE_MTYPE_VG10_MASK
	.comm	_AMDGPU_PTE_PRT,8,3             ; @AMDGPU_PTE_PRT
	.comm	_CHIP_VEGA10,8,3                ; @CHIP_VEGA10
	.comm	_AMDGPU_PTE_SNOOPED,8,3         ; @AMDGPU_PTE_SNOOPED
	.comm	_AMDGPU_PTE_LOG,8,3             ; @AMDGPU_PTE_LOG
	.comm	_AMDGPU_PTE_SYSTEM,8,3          ; @AMDGPU_PTE_SYSTEM
	.comm	_AMDGPU_PTE_VALID,8,3           ; @AMDGPU_PTE_VALID
	.comm	_PAGE_SHIFT,8,3                 ; @PAGE_SHIFT
	.comm	_AMDGPU_GPU_PAGES_IN_CPU_PAGE,8,3 ; @AMDGPU_GPU_PAGES_IN_CPU_PAGE
	.comm	_S64_MAX,8,3                    ; @S64_MAX
	.comm	_PAGE_SIZE,8,3                  ; @PAGE_SIZE
	.no_dead_strip	_amdgpu_vm_bo_split_mapping
.subsections_via_symbols
