	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cdv_disable_intel_clock_gating
_cdv_disable_intel_clock_gating:        ## @cdv_disable_intel_clock_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	_DSPCLK_GATE_D@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_REG_READ
	movq	_DPUNIT_PIPEB_GATE_DISABLE@GOTPCREL(%rip), %rcx
	movq	_DPUNIT_PIPEA_GATE_DISABLE@GOTPCREL(%rip), %rdx
	movq	_DPCUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rsi
	movq	_DPLSUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rdi
	movq	_DPOUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %r8
	orl	(%rcx), %eax
	orl	(%rdx), %eax
	orl	(%rsi), %eax
	orl	(%rdi), %eax
	orl	(%r8), %eax
	movq	_DPIOUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edi
	movl	%eax, %esi
	callq	_REG_WRITE
	movl	$500, %edi                      ## imm = 0x1F4
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_udelay                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_DSPCLK_GATE_D,4,2              ## @DSPCLK_GATE_D
	.comm	_DPUNIT_PIPEB_GATE_DISABLE,4,2  ## @DPUNIT_PIPEB_GATE_DISABLE
	.comm	_DPUNIT_PIPEA_GATE_DISABLE,4,2  ## @DPUNIT_PIPEA_GATE_DISABLE
	.comm	_DPCUNIT_CLOCK_GATE_DISABLE,4,2 ## @DPCUNIT_CLOCK_GATE_DISABLE
	.comm	_DPLSUNIT_CLOCK_GATE_DISABLE,4,2 ## @DPLSUNIT_CLOCK_GATE_DISABLE
	.comm	_DPOUNIT_CLOCK_GATE_DISABLE,4,2 ## @DPOUNIT_CLOCK_GATE_DISABLE
	.comm	_DPIOUNIT_CLOCK_GATE_DISABLE,4,2 ## @DPIOUNIT_CLOCK_GATE_DISABLE
	.no_dead_strip	_cdv_disable_intel_clock_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cdv_disable_intel_clock_gating
_cdv_disable_intel_clock_gating:        ; @cdv_disable_intel_clock_gating
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x19, _DSPCLK_GATE_D@GOTPAGE
Lloh1:
	ldr	x19, [x19, _DSPCLK_GATE_D@GOTPAGEOFF]
	ldr	w0, [x19]
	bl	_REG_READ
Lloh2:
	adrp	x8, _DPUNIT_PIPEB_GATE_DISABLE@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DPUNIT_PIPEB_GATE_DISABLE@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
Lloh5:
	adrp	x9, _DPUNIT_PIPEA_GATE_DISABLE@GOTPAGE
Lloh6:
	ldr	x9, [x9, _DPUNIT_PIPEA_GATE_DISABLE@GOTPAGEOFF]
Lloh7:
	adrp	x10, _DPCUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh8:
	ldr	x10, [x10, _DPCUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
Lloh10:
	ldr	w10, [x10]
Lloh11:
	adrp	x11, _DPLSUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh12:
	ldr	x11, [x11, _DPLSUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh13:
	adrp	x12, _DPOUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh14:
	ldr	x12, [x12, _DPOUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh15:
	ldr	w11, [x11]
Lloh16:
	ldr	w12, [x12]
Lloh17:
	adrp	x13, _DPIOUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh18:
	ldr	x13, [x13, _DPIOUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh19:
	ldr	w13, [x13]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w8, w8, w11
	orr	w8, w8, w12
	orr	w1, w8, w13
	ldr	w0, [x19]
	bl	_REG_WRITE
	mov	w0, #500
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_udelay
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh15
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh9
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_DSPCLK_GATE_D,4,2              ; @DSPCLK_GATE_D
	.comm	_DPUNIT_PIPEB_GATE_DISABLE,4,2  ; @DPUNIT_PIPEB_GATE_DISABLE
	.comm	_DPUNIT_PIPEA_GATE_DISABLE,4,2  ; @DPUNIT_PIPEA_GATE_DISABLE
	.comm	_DPCUNIT_CLOCK_GATE_DISABLE,4,2 ; @DPCUNIT_CLOCK_GATE_DISABLE
	.comm	_DPLSUNIT_CLOCK_GATE_DISABLE,4,2 ; @DPLSUNIT_CLOCK_GATE_DISABLE
	.comm	_DPOUNIT_CLOCK_GATE_DISABLE,4,2 ; @DPOUNIT_CLOCK_GATE_DISABLE
	.comm	_DPIOUNIT_CLOCK_GATE_DISABLE,4,2 ; @DPIOUNIT_CLOCK_GATE_DISABLE
	.no_dead_strip	_cdv_disable_intel_clock_gating
.subsections_via_symbols
