	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ilk_init_clock_gating
_ilk_init_clock_gating:                 ## @ilk_init_clock_gating
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_ILK_VRHUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	_ILK_DPFCRUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_ILK_DPFCUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_ILK_DPFDUNIT_CLOCK_GATE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_PCH_3DCGDIS0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_MARIUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rax
	movq	_SVSMUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	callq	_I915_WRITE
	movq	_PCH_3DCGDIS1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_VFMUNIT_CLOCK_GATE_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_I915_WRITE
	movq	_ILK_DISPLAY_CHICKEN2@GOTPCREL(%rip), %r12
	movl	(%r12), %ebx
	movl	%ebx, %edi
	callq	_I915_READ
	movq	_ILK_DPARB_GATE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_ILK_VSDPFD_FULL@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	_ILK_DPARBUNIT_CLOCK_GATE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_DISP_ARB_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_I915_READ
	movq	_DISP_FBC_WM_DIS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	%r14, %rdi
	callq	_IS_IRONLAKE_M
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_ILK_DISPLAY_CHICKEN1@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_I915_READ
	movq	_ILK_FBCQ_DIS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movl	(%r12), %ebx
	movl	%ebx, %edi
	callq	_I915_READ
	movq	_ILK_DPARB_GATE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
LBB0_2:
	orl	-52(%rbp), %r15d                ## 4-byte Folded Reload
	orl	-48(%rbp), %r15d                ## 4-byte Folded Reload
	orl	-44(%rbp), %r15d                ## 4-byte Folded Reload
	orl	%r13d, %r15d
	movq	_ILK_DSPCLK_GATE_D@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r15d, %esi
	callq	_I915_WRITE
	movl	(%r12), %ebx
	movl	%ebx, %edi
	callq	_I915_READ
	movq	_ILK_ELPIN_409_SELECT@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	__3D_CHICKEN2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	__3D_CHICKEN2_WM_READ_PIPELINED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, %esi
	shll	$16, %esi
	orl	%eax, %esi
	callq	_I915_WRITE
	movq	_CACHE_MODE_0@GOTPCREL(%rip), %r15
	movl	(%r15), %ebx
	movq	_CM0_PIPELINED_RENDER_FLUSH_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_ENABLE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movl	(%r15), %ebx
	movq	_RC_OP_FLUSH_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	__MASKED_BIT_DISABLE
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_I915_WRITE
	movq	%r14, %rdi
	callq	_g4x_disable_trickle_feed
	movq	%r14, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ibx_init_clock_gating          ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ILK_VRHUNIT_CLOCK_GATE_DISABLE,4,2 ## @ILK_VRHUNIT_CLOCK_GATE_DISABLE
	.comm	_ILK_DPFCRUNIT_CLOCK_GATE_DISABLE,4,2 ## @ILK_DPFCRUNIT_CLOCK_GATE_DISABLE
	.comm	_ILK_DPFCUNIT_CLOCK_GATE_DISABLE,4,2 ## @ILK_DPFCUNIT_CLOCK_GATE_DISABLE
	.comm	_ILK_DPFDUNIT_CLOCK_GATE_ENABLE,4,2 ## @ILK_DPFDUNIT_CLOCK_GATE_ENABLE
	.comm	_PCH_3DCGDIS0,4,2               ## @PCH_3DCGDIS0
	.comm	_MARIUNIT_CLOCK_GATE_DISABLE,4,2 ## @MARIUNIT_CLOCK_GATE_DISABLE
	.comm	_SVSMUNIT_CLOCK_GATE_DISABLE,4,2 ## @SVSMUNIT_CLOCK_GATE_DISABLE
	.comm	_PCH_3DCGDIS1,4,2               ## @PCH_3DCGDIS1
	.comm	_VFMUNIT_CLOCK_GATE_DISABLE,4,2 ## @VFMUNIT_CLOCK_GATE_DISABLE
	.comm	_ILK_DISPLAY_CHICKEN2,4,2       ## @ILK_DISPLAY_CHICKEN2
	.comm	_ILK_DPARB_GATE,4,2             ## @ILK_DPARB_GATE
	.comm	_ILK_VSDPFD_FULL,4,2            ## @ILK_VSDPFD_FULL
	.comm	_ILK_DPARBUNIT_CLOCK_GATE_ENABLE,4,2 ## @ILK_DPARBUNIT_CLOCK_GATE_ENABLE
	.comm	_DISP_ARB_CTL,4,2               ## @DISP_ARB_CTL
	.comm	_DISP_FBC_WM_DIS,4,2            ## @DISP_FBC_WM_DIS
	.comm	_ILK_DISPLAY_CHICKEN1,4,2       ## @ILK_DISPLAY_CHICKEN1
	.comm	_ILK_FBCQ_DIS,4,2               ## @ILK_FBCQ_DIS
	.comm	_ILK_DSPCLK_GATE_D,4,2          ## @ILK_DSPCLK_GATE_D
	.comm	_ILK_ELPIN_409_SELECT,4,2       ## @ILK_ELPIN_409_SELECT
	.comm	__3D_CHICKEN2,4,2               ## @_3D_CHICKEN2
	.comm	__3D_CHICKEN2_WM_READ_PIPELINED,4,2 ## @_3D_CHICKEN2_WM_READ_PIPELINED
	.comm	_CACHE_MODE_0,4,2               ## @CACHE_MODE_0
	.comm	_CM0_PIPELINED_RENDER_FLUSH_DISABLE,4,2 ## @CM0_PIPELINED_RENDER_FLUSH_DISABLE
	.comm	_RC_OP_FLUSH_ENABLE,4,2         ## @RC_OP_FLUSH_ENABLE
	.no_dead_strip	_ilk_init_clock_gating
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ilk_init_clock_gating
_ilk_init_clock_gating:                 ; @ilk_init_clock_gating
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x8, _ILK_VRHUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ILK_VRHUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh2:
	adrp	x9, _ILK_DPFCRUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh3:
	ldr	x9, [x9, _ILK_DPFCRUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh4:
	ldr	w21, [x8]
Lloh5:
	ldr	w22, [x9]
Lloh6:
	adrp	x8, _ILK_DPFCUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ILK_DPFCUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh8:
	adrp	x9, _ILK_DPFDUNIT_CLOCK_GATE_ENABLE@GOTPAGE
Lloh9:
	ldr	x9, [x9, _ILK_DPFDUNIT_CLOCK_GATE_ENABLE@GOTPAGEOFF]
Lloh10:
	ldr	w24, [x8]
Lloh11:
	ldr	w23, [x9]
Lloh12:
	adrp	x8, _PCH_3DCGDIS0@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCH_3DCGDIS0@GOTPAGEOFF]
Lloh14:
	adrp	x9, _MARIUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh15:
	ldr	x9, [x9, _MARIUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh16:
	ldr	w0, [x8]
Lloh17:
	ldr	w8, [x9]
Lloh18:
	adrp	x9, _SVSMUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh19:
	ldr	x9, [x9, _SVSMUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_I915_WRITE
Lloh21:
	adrp	x8, _PCH_3DCGDIS1@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PCH_3DCGDIS1@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
Lloh24:
	adrp	x8, _VFMUNIT_CLOCK_GATE_DISABLE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _VFMUNIT_CLOCK_GATE_DISABLE@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	bl	_I915_WRITE
Lloh27:
	adrp	x25, _ILK_DISPLAY_CHICKEN2@GOTPAGE
Lloh28:
	ldr	x25, [x25, _ILK_DISPLAY_CHICKEN2@GOTPAGEOFF]
	ldr	w20, [x25]
	mov	x0, x20
	bl	_I915_READ
Lloh29:
	adrp	x26, _ILK_DPARB_GATE@GOTPAGE
Lloh30:
	ldr	x26, [x26, _ILK_DPARB_GATE@GOTPAGEOFF]
	ldr	w8, [x26]
	orr	w8, w8, w0
Lloh31:
	adrp	x9, _ILK_VSDPFD_FULL@GOTPAGE
Lloh32:
	ldr	x9, [x9, _ILK_VSDPFD_FULL@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	orr	w1, w8, w9
	mov	x0, x20
	bl	_I915_WRITE
Lloh34:
	adrp	x8, _ILK_DPARBUNIT_CLOCK_GATE_ENABLE@GOTPAGE
Lloh35:
	ldr	x8, [x8, _ILK_DPARBUNIT_CLOCK_GATE_ENABLE@GOTPAGEOFF]
Lloh36:
	ldr	w27, [x8]
Lloh37:
	adrp	x8, _DISP_ARB_CTL@GOTPAGE
Lloh38:
	ldr	x8, [x8, _DISP_ARB_CTL@GOTPAGEOFF]
Lloh39:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_I915_READ
Lloh40:
	adrp	x8, _DISP_FBC_WM_DIS@GOTPAGE
Lloh41:
	ldr	x8, [x8, _DISP_FBC_WM_DIS@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	orr	w1, w8, w0
	mov	x0, x20
	bl	_I915_WRITE
	mov	x0, x19
	bl	_IS_IRONLAKE_M
	cbz	x0, LBB0_2
; %bb.1:
Lloh43:
	adrp	x8, _ILK_DISPLAY_CHICKEN1@GOTPAGE
Lloh44:
	ldr	x8, [x8, _ILK_DISPLAY_CHICKEN1@GOTPAGEOFF]
Lloh45:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_I915_READ
Lloh46:
	adrp	x8, _ILK_FBCQ_DIS@GOTPAGE
Lloh47:
	ldr	x8, [x8, _ILK_FBCQ_DIS@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
	orr	w1, w8, w0
	mov	x0, x20
	bl	_I915_WRITE
	ldr	w20, [x25]
	mov	x0, x20
	bl	_I915_READ
	ldr	w8, [x26]
	orr	w1, w8, w0
	mov	x0, x20
	bl	_I915_WRITE
LBB0_2:
	orr	w8, w22, w21
	orr	w8, w8, w24
	orr	w8, w8, w23
	orr	w1, w8, w27
Lloh49:
	adrp	x8, _ILK_DSPCLK_GATE_D@GOTPAGE
Lloh50:
	ldr	x8, [x8, _ILK_DSPCLK_GATE_D@GOTPAGEOFF]
Lloh51:
	ldr	w0, [x8]
	bl	_I915_WRITE
	ldr	w20, [x25]
	mov	x0, x20
	bl	_I915_READ
Lloh52:
	adrp	x8, _ILK_ELPIN_409_SELECT@GOTPAGE
Lloh53:
	ldr	x8, [x8, _ILK_ELPIN_409_SELECT@GOTPAGEOFF]
Lloh54:
	ldr	w8, [x8]
	orr	w1, w8, w0
	mov	x0, x20
	bl	_I915_WRITE
Lloh55:
	adrp	x8, __3D_CHICKEN2@GOTPAGE
Lloh56:
	ldr	x8, [x8, __3D_CHICKEN2@GOTPAGEOFF]
Lloh57:
	ldr	w0, [x8]
Lloh58:
	adrp	x8, __3D_CHICKEN2_WM_READ_PIPELINED@GOTPAGE
Lloh59:
	ldr	x8, [x8, __3D_CHICKEN2_WM_READ_PIPELINED@GOTPAGEOFF]
Lloh60:
	ldr	w8, [x8]
	orr	w1, w8, w8, lsl #16
	bl	_I915_WRITE
Lloh61:
	adrp	x21, _CACHE_MODE_0@GOTPAGE
Lloh62:
	ldr	x21, [x21, _CACHE_MODE_0@GOTPAGEOFF]
	ldr	w20, [x21]
Lloh63:
	adrp	x8, _CM0_PIPELINED_RENDER_FLUSH_DISABLE@GOTPAGE
Lloh64:
	ldr	x8, [x8, _CM0_PIPELINED_RENDER_FLUSH_DISABLE@GOTPAGEOFF]
Lloh65:
	ldr	w0, [x8]
	bl	__MASKED_BIT_ENABLE
	mov	x1, x0
	mov	x0, x20
	bl	_I915_WRITE
	ldr	w20, [x21]
Lloh66:
	adrp	x8, _RC_OP_FLUSH_ENABLE@GOTPAGE
Lloh67:
	ldr	x8, [x8, _RC_OP_FLUSH_ENABLE@GOTPAGEOFF]
Lloh68:
	ldr	w0, [x8]
	bl	__MASKED_BIT_DISABLE
	mov	x1, x0
	mov	x0, x20
	bl	_I915_WRITE
	mov	x0, x19
	bl	_g4x_disable_trickle_feed
	mov	x0, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_ibx_init_clock_gating
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh16
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh10
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh4
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.cfi_endproc
                                        ; -- End function
	.comm	_ILK_VRHUNIT_CLOCK_GATE_DISABLE,4,2 ; @ILK_VRHUNIT_CLOCK_GATE_DISABLE
	.comm	_ILK_DPFCRUNIT_CLOCK_GATE_DISABLE,4,2 ; @ILK_DPFCRUNIT_CLOCK_GATE_DISABLE
	.comm	_ILK_DPFCUNIT_CLOCK_GATE_DISABLE,4,2 ; @ILK_DPFCUNIT_CLOCK_GATE_DISABLE
	.comm	_ILK_DPFDUNIT_CLOCK_GATE_ENABLE,4,2 ; @ILK_DPFDUNIT_CLOCK_GATE_ENABLE
	.comm	_PCH_3DCGDIS0,4,2               ; @PCH_3DCGDIS0
	.comm	_MARIUNIT_CLOCK_GATE_DISABLE,4,2 ; @MARIUNIT_CLOCK_GATE_DISABLE
	.comm	_SVSMUNIT_CLOCK_GATE_DISABLE,4,2 ; @SVSMUNIT_CLOCK_GATE_DISABLE
	.comm	_PCH_3DCGDIS1,4,2               ; @PCH_3DCGDIS1
	.comm	_VFMUNIT_CLOCK_GATE_DISABLE,4,2 ; @VFMUNIT_CLOCK_GATE_DISABLE
	.comm	_ILK_DISPLAY_CHICKEN2,4,2       ; @ILK_DISPLAY_CHICKEN2
	.comm	_ILK_DPARB_GATE,4,2             ; @ILK_DPARB_GATE
	.comm	_ILK_VSDPFD_FULL,4,2            ; @ILK_VSDPFD_FULL
	.comm	_ILK_DPARBUNIT_CLOCK_GATE_ENABLE,4,2 ; @ILK_DPARBUNIT_CLOCK_GATE_ENABLE
	.comm	_DISP_ARB_CTL,4,2               ; @DISP_ARB_CTL
	.comm	_DISP_FBC_WM_DIS,4,2            ; @DISP_FBC_WM_DIS
	.comm	_ILK_DISPLAY_CHICKEN1,4,2       ; @ILK_DISPLAY_CHICKEN1
	.comm	_ILK_FBCQ_DIS,4,2               ; @ILK_FBCQ_DIS
	.comm	_ILK_DSPCLK_GATE_D,4,2          ; @ILK_DSPCLK_GATE_D
	.comm	_ILK_ELPIN_409_SELECT,4,2       ; @ILK_ELPIN_409_SELECT
	.comm	__3D_CHICKEN2,4,2               ; @_3D_CHICKEN2
	.comm	__3D_CHICKEN2_WM_READ_PIPELINED,4,2 ; @_3D_CHICKEN2_WM_READ_PIPELINED
	.comm	_CACHE_MODE_0,4,2               ; @CACHE_MODE_0
	.comm	_CM0_PIPELINED_RENDER_FLUSH_DISABLE,4,2 ; @CM0_PIPELINED_RENDER_FLUSH_DISABLE
	.comm	_RC_OP_FLUSH_ENABLE,4,2         ; @RC_OP_FLUSH_ENABLE
	.no_dead_strip	_ilk_init_clock_gating
.subsections_via_symbols
