	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rcar_lvds_enable
_rcar_lvds_enable:                      ## @rcar_lvds_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_bridge_to_rcar_lvds
	movq	%rax, %r15
	movl	48(%rax), %edi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	js	LBB0_27
## %bb.1:
	cmpq	$0, 40(%r15)
	je	LBB0_4
## %bb.2:
	movq	32(%r15), %rdi
	testq	%rdi, %rdi
	je	LBB0_4
## %bb.3:
	movq	(%rdi), %rax
	callq	*(%rax)
LBB0_4:
	movq	_LVDCTRCR_CTR3SEL_ZERO@GOTPCREL(%rip), %rax
	movq	_LVDCTRCR_CTR2SEL_DISP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_LVDCTRCR@GOTPCREL(%rip), %rax
	movq	_LVDCTRCR_CTR1SEL_VSYNC@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_LVDCTRCR_CTR0SEL_HSYNC@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r15, %rdi
	callq	_rcar_lvds_write
	movq	16(%r15), %rax
	movq	_RCAR_LVDS_QUIRK_LANES@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	andl	(%rax), %ecx
	sete	%r12b
	setne	%r13b
	xorl	%r14d, %r14d
	xorl	%edi, %edi
	xorl	%esi, %esi
	callq	_LVDCHCR_CHSEL_CH
	movl	%eax, %ebx
	leal	1(%r13,%r13), %esi
	addl	%r12d, %r12d
	incl	%r12d
	movl	$1, %edi
	callq	_LVDCHCR_CHSEL_CH
	movl	%eax, %r13d
	movl	$2, %edi
	movl	$2, %esi
	callq	_LVDCHCR_CHSEL_CH
	orl	%eax, %ebx
	orl	%r13d, %ebx
	movl	$3, %edi
	movl	%r12d, %esi
	callq	_LVDCHCR_CHSEL_CH
	orl	%eax, %ebx
	movq	_LVDCHCR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_rcar_lvds_write
	movq	16(%r15), %rax
	movq	_RCAR_LVDS_QUIRK_DUAL_LINK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rax)
	je	LBB0_8
## %bb.5:
	movq	_LVDSTRIPE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	cmpq	$0, 40(%r15)
	je	LBB0_7
## %bb.6:
	movq	_LVDSTRIPE_ST_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
LBB0_7:
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_rcar_lvds_write
LBB0_8:
	cmpq	$0, 40(%r15)
	je	LBB0_10
## %bb.9:
	cmpq	$0, 32(%r15)
	je	LBB0_11
LBB0_10:
	movq	16(%r15), %rax
	imull	$1000, 52(%r15), %esi           ## imm = 0x3E8
	movq	%r15, %rdi
	callq	*8(%rax)
LBB0_11:
	movl	(%r15), %r14d
	movq	_LVDCR0_LVMD_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r14d
	movq	24(%r15), %rax
	testq	%rax, %rax
	je	LBB0_14
## %bb.12:
	movl	(%rax), %edi
	callq	_drm_crtc_index
	cmpl	$2, %eax
	jne	LBB0_14
## %bb.13:
	movq	_LVDCR0_DUSEL@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
LBB0_14:
	movq	_LVDCR0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_rcar_lvds_write
	movq	_LVDCR1@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movl	$3, %edi
	callq	_LVDCR1_CHSTBY
	movl	%eax, %r13d
	movl	$2, %edi
	callq	_LVDCR1_CHSTBY
	orl	%eax, %r13d
	movl	$1, %edi
	callq	_LVDCR1_CHSTBY
	movl	%eax, %ebx
	xorl	%edi, %edi
	callq	_LVDCR1_CHSTBY
	orl	%eax, %ebx
	orl	%r13d, %ebx
	movq	_LVDCR1_CLKSTBY@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%ebx, %edx
	callq	_rcar_lvds_write
	movq	16(%r15), %rax
	cmpl	$2, 4(%rax)
	jg	LBB0_15
## %bb.16:
	movq	_LVDCR0_BEN@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movq	_LVDCR0_LVEN@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movq	_LVDCR0@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_rcar_lvds_write
	movq	16(%r15), %rax
	jmp	LBB0_17
LBB0_15:
	movq	_LVDCR0@GOTPCREL(%rip), %rbx
LBB0_17:
	movl	(%rax), %eax
	movq	_RCAR_LVDS_QUIRK_EXT_PLL@GOTPCREL(%rip), %r12
	testl	%eax, (%r12)
	jne	LBB0_19
## %bb.18:
	movq	_LVDCR0_PLLON@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_rcar_lvds_write
	movq	16(%r15), %rax
	movl	(%rax), %eax
LBB0_19:
	movq	_RCAR_LVDS_QUIRK_PWD@GOTPCREL(%rip), %r13
	testl	%eax, (%r13)
	je	LBB0_21
## %bb.20:
	movq	_LVDCR0_PWD@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_rcar_lvds_write
	movq	16(%r15), %rax
	movl	(%rax), %eax
LBB0_21:
	movq	_RCAR_LVDS_QUIRK_GEN3_LVEN@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_24
## %bb.22:
	movq	_LVDCR0_LVEN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %r14d
	testl	%eax, (%r13)
	je	LBB0_23
LBB0_24:
	testl	%eax, (%r12)
	jne	LBB0_26
LBB0_25:
	movl	$100, %edi
	movl	$150, %esi
	callq	_usleep_range
LBB0_26:
	movq	_LVDCR0_LVRES@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_rcar_lvds_write
	movq	8(%r15), %rdi
	testq	%rdi, %rdi
	je	LBB0_27
## %bb.28:
	callq	_drm_panel_prepare
	movq	8(%r15), %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_drm_panel_enable               ## TAILCALL
LBB0_27:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_23:
	movl	(%rbx), %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	callq	_rcar_lvds_write
	movq	16(%r15), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	jne	LBB0_26
	jmp	LBB0_25
	.cfi_endproc
                                        ## -- End function
	.comm	_LVDCTRCR,4,2                   ## @LVDCTRCR
	.comm	_LVDCTRCR_CTR3SEL_ZERO,4,2      ## @LVDCTRCR_CTR3SEL_ZERO
	.comm	_LVDCTRCR_CTR2SEL_DISP,4,2      ## @LVDCTRCR_CTR2SEL_DISP
	.comm	_LVDCTRCR_CTR1SEL_VSYNC,4,2     ## @LVDCTRCR_CTR1SEL_VSYNC
	.comm	_LVDCTRCR_CTR0SEL_HSYNC,4,2     ## @LVDCTRCR_CTR0SEL_HSYNC
	.comm	_RCAR_LVDS_QUIRK_LANES,4,2      ## @RCAR_LVDS_QUIRK_LANES
	.comm	_LVDCHCR,4,2                    ## @LVDCHCR
	.comm	_RCAR_LVDS_QUIRK_DUAL_LINK,4,2  ## @RCAR_LVDS_QUIRK_DUAL_LINK
	.comm	_LVDSTRIPE,4,2                  ## @LVDSTRIPE
	.comm	_LVDSTRIPE_ST_ON,4,2            ## @LVDSTRIPE_ST_ON
	.comm	_LVDCR0_LVMD_SHIFT,4,2          ## @LVDCR0_LVMD_SHIFT
	.comm	_LVDCR0_DUSEL,4,2               ## @LVDCR0_DUSEL
	.comm	_LVDCR0,4,2                     ## @LVDCR0
	.comm	_LVDCR1,4,2                     ## @LVDCR1
	.comm	_LVDCR1_CLKSTBY,4,2             ## @LVDCR1_CLKSTBY
	.comm	_LVDCR0_BEN,4,2                 ## @LVDCR0_BEN
	.comm	_LVDCR0_LVEN,4,2                ## @LVDCR0_LVEN
	.comm	_RCAR_LVDS_QUIRK_EXT_PLL,4,2    ## @RCAR_LVDS_QUIRK_EXT_PLL
	.comm	_LVDCR0_PLLON,4,2               ## @LVDCR0_PLLON
	.comm	_RCAR_LVDS_QUIRK_PWD,4,2        ## @RCAR_LVDS_QUIRK_PWD
	.comm	_LVDCR0_PWD,4,2                 ## @LVDCR0_PWD
	.comm	_RCAR_LVDS_QUIRK_GEN3_LVEN,4,2  ## @RCAR_LVDS_QUIRK_GEN3_LVEN
	.comm	_LVDCR0_LVRES,4,2               ## @LVDCR0_LVRES
	.no_dead_strip	_rcar_lvds_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rcar_lvds_enable
_rcar_lvds_enable:                      ; @rcar_lvds_enable
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	bl	_bridge_to_rcar_lvds
	mov	x19, x0
	ldr	w0, [x0, #48]
	bl	_clk_prepare_enable
	tbnz	w0, #31, LBB0_25
; %bb.1:
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_4
; %bb.2:
	ldr	x0, [x19, #32]
	cbz	x0, LBB0_4
; %bb.3:
	ldr	x8, [x0]
	ldr	x8, [x8]
	blr	x8
LBB0_4:
Lloh0:
	adrp	x8, _LVDCTRCR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _LVDCTRCR@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _LVDCTRCR_CTR3SEL_ZERO@GOTPAGE
Lloh4:
	ldr	x8, [x8, _LVDCTRCR_CTR3SEL_ZERO@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _LVDCTRCR_CTR2SEL_DISP@GOTPAGE
Lloh7:
	ldr	x9, [x9, _LVDCTRCR_CTR2SEL_DISP@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh9:
	adrp	x9, _LVDCTRCR_CTR1SEL_VSYNC@GOTPAGE
Lloh10:
	ldr	x9, [x9, _LVDCTRCR_CTR1SEL_VSYNC@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh12:
	adrp	x9, _LVDCTRCR_CTR0SEL_HSYNC@GOTPAGE
Lloh13:
	ldr	x9, [x9, _LVDCTRCR_CTR0SEL_HSYNC@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_rcar_lvds_write
	ldr	x8, [x19, #16]
	ldr	w21, [x8]
Lloh15:
	adrp	x8, _RCAR_LVDS_QUIRK_LANES@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RCAR_LVDS_QUIRK_LANES@GOTPAGEOFF]
Lloh17:
	ldr	w22, [x8]
	mov	w0, #0
	mov	w1, #0
	bl	_LVDCHCR_CHSEL_CH
	mov	x20, x0
	tst	w22, w21
	mov	w8, #3
	csinc	w1, w8, wzr, ne
	csinc	w21, w8, wzr, eq
	mov	w0, #1
	bl	_LVDCHCR_CHSEL_CH
	orr	w20, w0, w20
	mov	w0, #2
	mov	w1, #2
	bl	_LVDCHCR_CHSEL_CH
	orr	w20, w20, w0
	mov	w0, #3
	mov	x1, x21
	bl	_LVDCHCR_CHSEL_CH
	orr	w2, w20, w0
Lloh18:
	adrp	x8, _LVDCHCR@GOTPAGE
Lloh19:
	ldr	x8, [x8, _LVDCHCR@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_rcar_lvds_write
	ldr	x8, [x19, #16]
	ldr	w8, [x8]
Lloh21:
	adrp	x9, _RCAR_LVDS_QUIRK_DUAL_LINK@GOTPAGE
Lloh22:
	ldr	x9, [x9, _RCAR_LVDS_QUIRK_DUAL_LINK@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_6
; %bb.5:
Lloh24:
	adrp	x8, _LVDSTRIPE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _LVDSTRIPE@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	ldr	x8, [x19, #40]
Lloh27:
	adrp	x9, _LVDSTRIPE_ST_ON@GOTPAGE
Lloh28:
	ldr	x9, [x9, _LVDSTRIPE_ST_ON@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	cmp	x8, #0
	csel	w2, wzr, w9, eq
	mov	x0, x19
	bl	_rcar_lvds_write
LBB0_6:
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_8
; %bb.7:
	ldr	x8, [x19, #32]
	cbz	x8, LBB0_9
LBB0_8:
	ldr	x8, [x19, #16]
	ldr	x8, [x8, #8]
	ldr	w9, [x19, #52]
	mov	w10, #1000
	mul	w1, w9, w10
	mov	x0, x19
	blr	x8
LBB0_9:
	ldr	w8, [x19]
Lloh30:
	adrp	x9, _LVDCR0_LVMD_SHIFT@GOTPAGE
Lloh31:
	ldr	x9, [x9, _LVDCR0_LVMD_SHIFT@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	lsl	w20, w8, w9
	ldr	x8, [x19, #24]
	cbz	x8, LBB0_12
; %bb.10:
	ldr	w0, [x8]
	bl	_drm_crtc_index
	cmp	w0, #2
	b.ne	LBB0_12
; %bb.11:
Lloh33:
	adrp	x8, _LVDCR0_DUSEL@GOTPAGE
Lloh34:
	ldr	x8, [x8, _LVDCR0_DUSEL@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	orr	w20, w8, w20
LBB0_12:
Lloh36:
	adrp	x23, _LVDCR0@GOTPAGE
Lloh37:
	ldr	x23, [x23, _LVDCR0@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	mov	x2, x20
	bl	_rcar_lvds_write
Lloh38:
	adrp	x8, _LVDCR1@GOTPAGE
Lloh39:
	ldr	x8, [x8, _LVDCR1@GOTPAGEOFF]
Lloh40:
	ldr	w21, [x8]
	mov	w0, #3
	bl	_LVDCR1_CHSTBY
	mov	x22, x0
	mov	w0, #2
	bl	_LVDCR1_CHSTBY
	orr	w22, w0, w22
	mov	w0, #1
	bl	_LVDCR1_CHSTBY
	orr	w22, w22, w0
	mov	w0, #0
	bl	_LVDCR1_CHSTBY
	orr	w8, w22, w0
Lloh41:
	adrp	x9, _LVDCR1_CLKSTBY@GOTPAGE
Lloh42:
	ldr	x9, [x9, _LVDCR1_CLKSTBY@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	mov	x1, x21
	bl	_rcar_lvds_write
	ldr	x8, [x19, #16]
	ldr	w9, [x8, #4]
Lloh44:
	adrp	x22, _LVDCR0_LVEN@GOTPAGE
Lloh45:
	ldr	x22, [x22, _LVDCR0_LVEN@GOTPAGEOFF]
	cmp	w9, #2
	b.gt	LBB0_14
; %bb.13:
Lloh46:
	adrp	x8, _LVDCR0_BEN@GOTPAGE
Lloh47:
	ldr	x8, [x8, _LVDCR0_BEN@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
	ldr	w9, [x22]
	orr	w8, w8, w20
	orr	w20, w8, w9
	ldr	w1, [x23]
	mov	x0, x19
	mov	x2, x20
	bl	_rcar_lvds_write
	ldr	x8, [x19, #16]
LBB0_14:
	ldr	w8, [x8]
Lloh49:
	adrp	x21, _RCAR_LVDS_QUIRK_EXT_PLL@GOTPAGE
Lloh50:
	ldr	x21, [x21, _RCAR_LVDS_QUIRK_EXT_PLL@GOTPAGEOFF]
	ldr	w9, [x21]
	tst	w9, w8
	b.ne	LBB0_16
; %bb.15:
Lloh51:
	adrp	x8, _LVDCR0_PLLON@GOTPAGE
Lloh52:
	ldr	x8, [x8, _LVDCR0_PLLON@GOTPAGEOFF]
Lloh53:
	ldr	w8, [x8]
	orr	w20, w8, w20
	ldr	w1, [x23]
	mov	x0, x19
	mov	x2, x20
	bl	_rcar_lvds_write
	ldr	x8, [x19, #16]
	ldr	w8, [x8]
LBB0_16:
Lloh54:
	adrp	x24, _RCAR_LVDS_QUIRK_PWD@GOTPAGE
Lloh55:
	ldr	x24, [x24, _RCAR_LVDS_QUIRK_PWD@GOTPAGEOFF]
	ldr	w9, [x24]
	tst	w9, w8
	b.eq	LBB0_18
; %bb.17:
Lloh56:
	adrp	x8, _LVDCR0_PWD@GOTPAGE
Lloh57:
	ldr	x8, [x8, _LVDCR0_PWD@GOTPAGEOFF]
Lloh58:
	ldr	w8, [x8]
	orr	w20, w8, w20
	ldr	w1, [x23]
	mov	x0, x19
	mov	x2, x20
	bl	_rcar_lvds_write
	ldr	x8, [x19, #16]
	ldr	w8, [x8]
LBB0_18:
Lloh59:
	adrp	x9, _RCAR_LVDS_QUIRK_GEN3_LVEN@GOTPAGE
Lloh60:
	ldr	x9, [x9, _RCAR_LVDS_QUIRK_GEN3_LVEN@GOTPAGEOFF]
Lloh61:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_21
; %bb.19:
	ldr	w9, [x22]
	orr	w20, w9, w20
	ldr	w9, [x24]
	tst	w9, w8
	b.ne	LBB0_21
; %bb.20:
	ldr	w1, [x23]
	mov	x0, x19
	mov	x2, x20
	bl	_rcar_lvds_write
	ldr	x8, [x19, #16]
	ldr	w8, [x8]
LBB0_21:
	ldr	w9, [x21]
	tst	w9, w8
	b.ne	LBB0_23
; %bb.22:
	mov	w0, #100
	mov	w1, #150
	bl	_usleep_range
LBB0_23:
Lloh62:
	adrp	x8, _LVDCR0_LVRES@GOTPAGE
Lloh63:
	ldr	x8, [x8, _LVDCR0_LVRES@GOTPAGEOFF]
Lloh64:
	ldr	w8, [x8]
	orr	w2, w8, w20
	ldr	w1, [x23]
	mov	x0, x19
	bl	_rcar_lvds_write
	ldr	x0, [x19, #8]
	cbz	x0, LBB0_25
; %bb.24:
	bl	_drm_panel_prepare
	ldr	x0, [x19, #8]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_drm_panel_enable
LBB0_25:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.cfi_endproc
                                        ; -- End function
	.comm	_LVDCTRCR,4,2                   ; @LVDCTRCR
	.comm	_LVDCTRCR_CTR3SEL_ZERO,4,2      ; @LVDCTRCR_CTR3SEL_ZERO
	.comm	_LVDCTRCR_CTR2SEL_DISP,4,2      ; @LVDCTRCR_CTR2SEL_DISP
	.comm	_LVDCTRCR_CTR1SEL_VSYNC,4,2     ; @LVDCTRCR_CTR1SEL_VSYNC
	.comm	_LVDCTRCR_CTR0SEL_HSYNC,4,2     ; @LVDCTRCR_CTR0SEL_HSYNC
	.comm	_RCAR_LVDS_QUIRK_LANES,4,2      ; @RCAR_LVDS_QUIRK_LANES
	.comm	_LVDCHCR,4,2                    ; @LVDCHCR
	.comm	_RCAR_LVDS_QUIRK_DUAL_LINK,4,2  ; @RCAR_LVDS_QUIRK_DUAL_LINK
	.comm	_LVDSTRIPE,4,2                  ; @LVDSTRIPE
	.comm	_LVDSTRIPE_ST_ON,4,2            ; @LVDSTRIPE_ST_ON
	.comm	_LVDCR0_LVMD_SHIFT,4,2          ; @LVDCR0_LVMD_SHIFT
	.comm	_LVDCR0_DUSEL,4,2               ; @LVDCR0_DUSEL
	.comm	_LVDCR0,4,2                     ; @LVDCR0
	.comm	_LVDCR1,4,2                     ; @LVDCR1
	.comm	_LVDCR1_CLKSTBY,4,2             ; @LVDCR1_CLKSTBY
	.comm	_LVDCR0_BEN,4,2                 ; @LVDCR0_BEN
	.comm	_LVDCR0_LVEN,4,2                ; @LVDCR0_LVEN
	.comm	_RCAR_LVDS_QUIRK_EXT_PLL,4,2    ; @RCAR_LVDS_QUIRK_EXT_PLL
	.comm	_LVDCR0_PLLON,4,2               ; @LVDCR0_PLLON
	.comm	_RCAR_LVDS_QUIRK_PWD,4,2        ; @RCAR_LVDS_QUIRK_PWD
	.comm	_LVDCR0_PWD,4,2                 ; @LVDCR0_PWD
	.comm	_RCAR_LVDS_QUIRK_GEN3_LVEN,4,2  ; @RCAR_LVDS_QUIRK_GEN3_LVEN
	.comm	_LVDCR0_LVRES,4,2               ; @LVDCR0_LVRES
	.no_dead_strip	_rcar_lvds_enable
.subsections_via_symbols
