	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function a6xx_gmu_check_idle_level
_a6xx_gmu_check_idle_level:             ## @a6xx_gmu_check_idle_level
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movl	(%rdi), %ebx
	movq	_GMU_IDLE_STATE_SPTP@GOTPCREL(%rip), %rax
	movq	_GMU_IDLE_STATE_IFPC@GOTPCREL(%rip), %r15
	cmpl	(%rax), %ebx
	jne	LBB0_2
## %bb.1:
	movl	(%r15), %ebx
LBB0_2:
	movq	_REG_A6XX_GPU_GMU_CX_GMU_RPMH_POWER_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_gmu_read
	cmpl	%ebx, %eax
	jne	LBB0_5
## %bb.3:
	movl	(%r12), %eax
	movl	$1, %r14d
	cmpl	(%r15), %eax
	jne	LBB0_6
## %bb.4:
	movq	%r12, %rdi
	callq	_a6xx_gmu_gx_is_on
	testl	%eax, %eax
	je	LBB0_6
LBB0_5:
	xorl	%r14d, %r14d
LBB0_6:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GMU_IDLE_STATE_SPTP,4,2        ## @GMU_IDLE_STATE_SPTP
	.comm	_GMU_IDLE_STATE_IFPC,4,2        ## @GMU_IDLE_STATE_IFPC
	.comm	_REG_A6XX_GPU_GMU_CX_GMU_RPMH_POWER_STATE,4,2 ## @REG_A6XX_GPU_GMU_CX_GMU_RPMH_POWER_STATE
	.no_dead_strip	_a6xx_gmu_check_idle_level
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function a6xx_gmu_check_idle_level
_a6xx_gmu_check_idle_level:             ; @a6xx_gmu_check_idle_level
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _GMU_IDLE_STATE_SPTP@GOTPAGE
Lloh1:
	ldr	x9, [x9, _GMU_IDLE_STATE_SPTP@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
Lloh3:
	adrp	x20, _GMU_IDLE_STATE_IFPC@GOTPAGE
Lloh4:
	ldr	x20, [x20, _GMU_IDLE_STATE_IFPC@GOTPAGEOFF]
	ldr	w10, [x20]
	cmp	w8, w9
	csel	w21, w10, w8, eq
Lloh5:
	adrp	x8, _REG_A6XX_GPU_GMU_CX_GMU_RPMH_POWER_STATE@GOTPAGE
Lloh6:
	ldr	x8, [x8, _REG_A6XX_GPU_GMU_CX_GMU_RPMH_POWER_STATE@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	bl	_gmu_read
	cmp	w0, w21
	b.ne	LBB0_3
; %bb.1:
	ldr	w8, [x19]
	ldr	w9, [x20]
	cmp	w8, w9
	b.ne	LBB0_4
; %bb.2:
	mov	x0, x19
	bl	_a6xx_gmu_gx_is_on
	cbz	w0, LBB0_4
LBB0_3:
	mov	w0, #0
	b	LBB0_5
LBB0_4:
	mov	w0, #1
LBB0_5:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_GMU_IDLE_STATE_SPTP,4,2        ; @GMU_IDLE_STATE_SPTP
	.comm	_GMU_IDLE_STATE_IFPC,4,2        ; @GMU_IDLE_STATE_IFPC
	.comm	_REG_A6XX_GPU_GMU_CX_GMU_RPMH_POWER_STATE,4,2 ; @REG_A6XX_GPU_GMU_CX_GMU_RPMH_POWER_STATE
	.no_dead_strip	_a6xx_gmu_check_idle_level
.subsections_via_symbols
