	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_venc_cvbs_encoder_disable
_meson_venc_cvbs_encoder_disable:       ## @meson_venc_cvbs_encoder_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_encoder_to_meson_venc_cvbs
	movq	(%rax), %r14
	movq	_VPU_COMPATIBLE_G12A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_meson_vpu_is_compatible
	xorl	%ebx, %ebx
	testq	%rax, %rax
	movq	_HHI_VDAC_CNTL0_G12A@GOTPCREL(%rip), %rax
	cmoveq	_HHI_VDAC_CNTL0@GOTPCREL(%rip), %rax
	sete	%bl
	movl	(%r14), %edi
	movl	(%rax), %esi
	movq	_HHI_VDAC_CNTL1_G12A@GOTPCREL(%rip), %r15
	cmoveq	_HHI_VDAC_CNTL1@GOTPCREL(%rip), %r15
	shll	$3, %ebx
	xorl	%edx, %edx
	callq	_regmap_write
	movl	(%r14), %edi
	movl	(%r15), %esi
	movl	%ebx, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_regmap_write                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VPU_COMPATIBLE_G12A,4,2        ## @VPU_COMPATIBLE_G12A
	.comm	_HHI_VDAC_CNTL0_G12A,4,2        ## @HHI_VDAC_CNTL0_G12A
	.comm	_HHI_VDAC_CNTL1_G12A,4,2        ## @HHI_VDAC_CNTL1_G12A
	.comm	_HHI_VDAC_CNTL0,4,2             ## @HHI_VDAC_CNTL0
	.comm	_HHI_VDAC_CNTL1,4,2             ## @HHI_VDAC_CNTL1
	.no_dead_strip	_meson_venc_cvbs_encoder_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_venc_cvbs_encoder_disable
_meson_venc_cvbs_encoder_disable:       ; @meson_venc_cvbs_encoder_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	bl	_encoder_to_meson_venc_cvbs
	ldr	x19, [x0]
Lloh0:
	adrp	x8, _VPU_COMPATIBLE_G12A@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VPU_COMPATIBLE_G12A@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_meson_vpu_is_compatible
Lloh3:
	adrp	x8, _HHI_VDAC_CNTL0@GOTPAGE
Lloh4:
	ldr	x8, [x8, _HHI_VDAC_CNTL0@GOTPAGEOFF]
Lloh5:
	adrp	x9, _HHI_VDAC_CNTL0_G12A@GOTPAGE
Lloh6:
	ldr	x9, [x9, _HHI_VDAC_CNTL0_G12A@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x8, x9, eq
	cset	w9, eq
	ldr	w0, [x19]
	lsl	w20, w9, #3
	ldr	w1, [x8]
Lloh7:
	adrp	x8, _HHI_VDAC_CNTL1@GOTPAGE
Lloh8:
	ldr	x8, [x8, _HHI_VDAC_CNTL1@GOTPAGEOFF]
Lloh9:
	adrp	x9, _HHI_VDAC_CNTL1_G12A@GOTPAGE
Lloh10:
	ldr	x9, [x9, _HHI_VDAC_CNTL1_G12A@GOTPAGEOFF]
	csel	x21, x8, x9, eq
	mov	w2, #0
	bl	_regmap_write
	ldr	w0, [x19]
	ldr	w1, [x21]
	mov	x2, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_regmap_write
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_VPU_COMPATIBLE_G12A,4,2        ; @VPU_COMPATIBLE_G12A
	.comm	_HHI_VDAC_CNTL0_G12A,4,2        ; @HHI_VDAC_CNTL0_G12A
	.comm	_HHI_VDAC_CNTL1_G12A,4,2        ; @HHI_VDAC_CNTL1_G12A
	.comm	_HHI_VDAC_CNTL0,4,2             ; @HHI_VDAC_CNTL0
	.comm	_HHI_VDAC_CNTL1,4,2             ; @HHI_VDAC_CNTL1
	.no_dead_strip	_meson_venc_cvbs_encoder_disable
.subsections_via_symbols
