	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function zynq_fpga_has_sync
_zynq_fpga_has_sync:                    ## @zynq_fpga_has_sync
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	xorl	%eax, %eax
	cmpq	$4, %rsi
	jb	LBB0_8
## %bb.1:
	addq	$12, %rdi
	jmp	LBB0_3
	.p2align	4, 0x90
LBB0_2:                                 ##   in Loop: Header=BB0_3 Depth=1
	addq	$-4, %rsi
	addq	$16, %rdi
	cmpq	$3, %rsi
	jbe	LBB0_8
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	cmpl	$102, -12(%rdi)
	jne	LBB0_2
## %bb.4:                               ##   in Loop: Header=BB0_3 Depth=1
	cmpl	$85, -8(%rdi)
	jne	LBB0_2
## %bb.5:                               ##   in Loop: Header=BB0_3 Depth=1
	cmpl	$153, -4(%rdi)
	jne	LBB0_2
## %bb.6:                               ##   in Loop: Header=BB0_3 Depth=1
	cmpl	$170, (%rdi)
	jne	LBB0_2
## %bb.7:
	movl	$1, %eax
LBB0_8:
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_zynq_fpga_has_sync
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function zynq_fpga_has_sync
_zynq_fpga_has_sync:                    ; @zynq_fpga_has_sync
	.cfi_startproc
; %bb.0:
	cmp	x1, #4
	b.lo	LBB0_8
; %bb.1:
	add	x8, x0, #8
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	sub	x1, x1, #4
	add	x8, x8, #16
	cmp	x1, #3
	b.ls	LBB0_8
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldur	w9, [x8, #-8]
	cmp	w9, #102
	b.ne	LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	ldur	w9, [x8, #-4]
	cmp	w9, #85
	b.ne	LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w9, [x8]
	cmp	w9, #153
	b.ne	LBB0_2
; %bb.6:                                ;   in Loop: Header=BB0_3 Depth=1
	ldr	w9, [x8, #4]
	cmp	w9, #170
	b.ne	LBB0_2
; %bb.7:
	mov	w0, #1
	ret
LBB0_8:
	mov	w0, #0
	ret
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_zynq_fpga_has_sync
.subsections_via_symbols
