	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_v6_0_crtc_do_set_base
_dce_v6_0_crtc_do_set_base:             ## @dce_v6_0_crtc_do_set_base
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, %r13d
	movl	%ecx, -76(%rbp)                 ## 4-byte Spill
	movl	%edx, -80(%rbp)                 ## 4-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %rbx
	callq	_to_amdgpu_crtc
	movq	%rax, %r14
	movq	16(%rbx), %rax
	movq	(%rax), %r12
	movq	_GRPH_ENDIAN_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_ENDIAN_SWAP
	movq	%r15, %rcx
	movl	%r13d, -64(%rbp)                ## 4-byte Spill
	testl	%r13d, %r13d
	jne	LBB0_3
## %bb.1:
	movq	(%rbx), %rcx
	movq	(%rcx), %rcx
	testq	%rcx, %rcx
	je	LBB0_2
LBB0_3:
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movq	%r15, -136(%rbp)                ## 8-byte Spill
	movq	16(%rcx), %rax
	movq	(%rax), %rdi
	movq	%rcx, %r13
	callq	_gem_to_amdgpu_bo
	movq	%rax, %r15
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_bo_reserve
	movl	%eax, %ebx
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_36
## %bb.4:
	movq	%r13, -88(%rbp)                 ## 8-byte Spill
	cmpl	$0, -64(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_5
LBB0_8:
	movq	%r15, %rdi
	callq	_amdgpu_bo_gpu_offset
	movq	%rax, %rbx
	leaq	-56(%rbp), %rsi
	movq	%r15, %rdi
	callq	_amdgpu_bo_get_tiling_flags
	movq	%r15, %rdi
	callq	_amdgpu_bo_unreserve
	movq	-88(%rbp), %rax                 ## 8-byte Reload
	movq	24(%rax), %rax
	movl	(%rax), %edi
	leal	-128(%rdi), %eax
	cmpl	$15, %eax
	ja	LBB0_24
## %bb.9:
	movq	%rbx, -120(%rbp)                ## 8-byte Spill
	movq	%r12, -128(%rbp)                ## 8-byte Spill
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_17:
	movq	_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_GRPH_FORMAT_ARGB8888@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_2:
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG_KMS
	jmp	LBB0_35
LBB0_5:
	movq	_AMDGPU_GEM_DOMAIN_VRAM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_amdgpu_bo_pin
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	je	LBB0_8
## %bb.6:
	movq	%r15, %rdi
	callq	_amdgpu_bo_unreserve
LBB0_7:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_36
LBB0_13:
	movq	_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_GRPH_FORMAT_ARGB4444@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_18:
	movq	_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_GRPH_FORMAT_ARGB2101010@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_14:
	movq	_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_GRPH_FORMAT_ARGB1555@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_23:
	movq	_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_GRPH_FORMAT_ARGB8888@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_FORMAT
	movl	%eax, %r13d
	orl	%ebx, %r13d
	movq	_GRPH_RED_SEL_B@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_RED_CROSSBAR
	movl	%eax, %ebx
	movq	_GRPH_BLUE_SEL_R@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_BLUE_CROSSBAR
	orl	%ebx, %eax
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	jmp	LBB0_12
LBB0_15:
	movq	_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_GRPH_FORMAT_BGRA5551@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_22:
	movq	_GRPH_DEPTH_32BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_GRPH_FORMAT_BGRA1010102@GOTPCREL(%rip), %rax
LBB0_19:
	movl	(%rax), %edi
	callq	_GRPH_FORMAT
	movl	%eax, %r13d
	orl	%ebx, %r13d
	movl	$0, -44(%rbp)                   ## 4-byte Folded Spill
	jmp	LBB0_20
LBB0_24:
	leaq	-144(%rbp), %rsi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_drm_get_format_name
	leaq	L_.str.1(%rip), %rdi
	movl	%eax, %esi
	callq	_DRM_ERROR
	jmp	LBB0_7
LBB0_16:
	movq	_GRPH_DEPTH_16BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_GRPH_FORMAT_ARGB565@GOTPCREL(%rip), %rax
	jmp	LBB0_11
LBB0_10:
	movq	_GRPH_DEPTH_8BPP@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_DEPTH
	movl	%eax, %ebx
	movq	_GRPH_FORMAT_INDEXED@GOTPCREL(%rip), %rax
LBB0_11:
	movl	(%rax), %edi
	callq	_GRPH_FORMAT
	movl	%eax, %r13d
	orl	%ebx, %r13d
LBB0_12:
	movb	$1, %al
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
LBB0_20:
	movq	-56(%rbp), %rdi
	movq	_ARRAY_MODE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	callq	_AMDGPU_TILING_GET
	movq	_ARRAY_2D_TILED_THIN1@GOTPCREL(%rip), %rcx
	movq	-56(%rbp), %rdi
	cmpq	(%rcx), %rax
	je	LBB0_21
## %bb.25:
	movl	(%rbx), %esi
	callq	_AMDGPU_TILING_GET
	movq	_ARRAY_1D_TILED_THIN1@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_27
## %bb.26:
	movq	_GRPH_ARRAY_1D_TILED_THIN1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_ARRAY_MODE
	orl	%eax, %r13d
	jmp	LBB0_27
LBB0_21:
	movq	_BANK_WIDTH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movq	%rax, -112(%rbp)                ## 8-byte Spill
	movq	-56(%rbp), %rdi
	movq	_BANK_HEIGHT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movq	%rax, -104(%rbp)                ## 8-byte Spill
	movq	-56(%rbp), %rdi
	movq	_MACRO_TILE_ASPECT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movq	%rax, -96(%rbp)                 ## 8-byte Spill
	movq	-56(%rbp), %rdi
	movq	_TILE_SPLIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movq	%rax, %rbx
	movq	-56(%rbp), %rdi
	movq	_NUM_BANKS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movl	%eax, %edi
	callq	_GRPH_NUM_BANKS
	movl	%eax, %r15d
	orl	%r13d, %r15d
	movq	_GRPH_ARRAY_2D_TILED_THIN1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_GRPH_ARRAY_MODE
	movl	%eax, %r12d
	movl	%ebx, %edi
	callq	_GRPH_TILE_SPLIT
	movl	%eax, %ebx
	orl	%r12d, %ebx
	orl	%r15d, %ebx
	movq	-112(%rbp), %rdi                ## 8-byte Reload
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_GRPH_BANK_WIDTH
	movl	%eax, %r12d
	movq	-104(%rbp), %rdi                ## 8-byte Reload
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_GRPH_BANK_HEIGHT
	movl	%eax, %r15d
	orl	%r12d, %r15d
	movq	-96(%rbp), %rdi                 ## 8-byte Reload
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_GRPH_MACRO_TILE_ASPECT
	movl	%eax, %r13d
	orl	%r15d, %r13d
	orl	%ebx, %r13d
LBB0_27:
	movq	-56(%rbp), %rdi
	movq	_PIPE_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_AMDGPU_TILING_GET
	movl	%eax, %edi
	callq	_GRPH_PIPE_CONFIG
	orl	%eax, %r13d
	xorl	%r15d, %r15d
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	xorl	%esi, %esi
	callq	_dce_v6_0_vga_enable
	movq	_mmGRPH_FLIP_CONTROL@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movq	(%r14), %rbx
	addq	(%rax), %rbx
	movq	-120(%rbp), %r12                ## 8-byte Reload
	movq	%r12, %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPCREL(%rip), %rax
	movq	(%r14), %rbx
	addq	(%rax), %rbx
	movq	%r12, %rdi
	callq	_upper_32_bits
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmGRPH_PRIMARY_SURFACE_ADDRESS@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	movq	_GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	andl	%r12d, %esi
	callq	_WREG32
	movq	_mmGRPH_SECONDARY_SURFACE_ADDRESS@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	andl	(%rbx), %r12d
	movl	%r12d, %esi
	callq	_WREG32
	movq	_mmGRPH_CONTROL@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	movl	%r13d, %esi
	callq	_WREG32
	movq	_mmGRPH_SWAP_CNTL@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	movl	-60(%rbp), %esi                 ## 4-byte Reload
	callq	_WREG32
	movq	_mmGRPH_LUT_10BIT_BYPASS@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	movq	_GRPH_LUT_10BIT_BYPASS__GRPH_LUT_10BIT_BYPASS_EN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
	testb	%bl, %bl
	cmovel	%edx, %r15d
	notl	%edx
	movl	%r15d, %esi
	callq	_WREG32_P
	testb	%bl, %bl
	jne	LBB0_29
## %bb.28:
	leaq	L_.str.2(%rip), %rdi
	callq	_DRM_DEBUG_KMS
LBB0_29:
	movq	_mmGRPH_SURFACE_OFFSET_X@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmGRPH_SURFACE_OFFSET_Y@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmGRPH_X_START@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmGRPH_Y_START@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmGRPH_X_END@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	movq	-88(%rbp), %r13                 ## 8-byte Reload
	movl	(%r13), %esi
	callq	_WREG32
	movq	_mmGRPH_Y_END@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	movl	4(%r13), %esi
	callq	_WREG32
	movq	8(%r13), %rax
	movq	24(%r13), %rcx
	movl	(%rax), %eax
	movq	8(%rcx), %rcx
	cltd
	idivl	(%rcx)
	movq	_mmGRPH_PITCH@GOTPCREL(%rip), %rcx
	movq	(%r14), %rdi
	addq	(%rcx), %rdi
	movl	%eax, %esi
	callq	_WREG32
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_dce_v6_0_grph_enable
	movq	_mmDESKTOP_HEIGHT@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	movl	4(%r13), %esi
	callq	_WREG32
	movq	_mmVIEWPORT_START@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	movl	-76(%rbp), %eax                 ## 4-byte Reload
	andl	$-2, %eax
	movl	-80(%rbp), %esi                 ## 4-byte Reload
	andl	$-4, %esi
	shll	$16, %esi
	orl	%eax, %esi
	callq	_WREG32
	movl	8(%rbx), %esi
	movl	12(%rbx), %eax
	incl	%eax
	andl	$-2, %eax
	movq	_mmVIEWPORT_SIZE@GOTPCREL(%rip), %rcx
	movq	(%r14), %rdi
	addq	(%rcx), %rdi
	shll	$16, %esi
	orl	%eax, %esi
	callq	_WREG32
	movq	_mmMASTER_UPDATE_MODE@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	callq	_WREG32
	movq	-136(%rbp), %rcx                ## 8-byte Reload
	testq	%rcx, %rcx
	movq	-128(%rbp), %r15                ## 8-byte Reload
	je	LBB0_34
## %bb.30:
	cmpl	$0, -64(%rbp)                   ## 4-byte Folded Reload
	jne	LBB0_34
## %bb.31:
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	movq	(%rax), %rax
	cmpq	%rcx, (%rax)
	je	LBB0_34
## %bb.32:
	movq	16(%rcx), %rax
	movq	(%rax), %rdi
	callq	_gem_to_amdgpu_bo
	movq	%rax, %r14
	movq	%rax, %rdi
	movl	$1, %esi
	callq	_amdgpu_bo_reserve
	movl	%eax, %ebx
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	callq	_unlikely
	testq	%rax, %rax
	jne	LBB0_36
## %bb.33:
	movq	%r14, %rdi
	callq	_amdgpu_bo_unpin
	movq	%r14, %rdi
	callq	_amdgpu_bo_unreserve
LBB0_34:
	movq	%r15, %rdi
	callq	_dce_v6_0_bandwidth_update
LBB0_35:
	xorl	%ebx, %ebx
LBB0_36:
	movl	%ebx, %eax
	addq	$104, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_17, LBB0_17-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_18, LBB0_18-LJTI0_0
.set L0_0_set_14, LBB0_14-LJTI0_0
.set L0_0_set_23, LBB0_23-LJTI0_0
.set L0_0_set_16, LBB0_16-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
.set L0_0_set_22, LBB0_22-LJTI0_0
LJTI0_0:
	.long	L0_0_set_17
	.long	L0_0_set_13
	.long	L0_0_set_18
	.long	L0_0_set_14
	.long	L0_0_set_23
	.long	L0_0_set_16
	.long	L0_0_set_10
	.long	L0_0_set_15
	.long	L0_0_set_22
	.long	L0_0_set_15
	.long	L0_0_set_22
	.long	L0_0_set_17
	.long	L0_0_set_13
	.long	L0_0_set_18
	.long	L0_0_set_14
	.long	L0_0_set_23
	.end_data_region
                                        ## -- End function
	.comm	_GRPH_ENDIAN_NONE,4,2           ## @GRPH_ENDIAN_NONE
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"No FB bound\n"

	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ## @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_GRPH_DEPTH_8BPP,4,2            ## @GRPH_DEPTH_8BPP
	.comm	_GRPH_FORMAT_INDEXED,4,2        ## @GRPH_FORMAT_INDEXED
	.comm	_GRPH_DEPTH_16BPP,4,2           ## @GRPH_DEPTH_16BPP
	.comm	_GRPH_FORMAT_ARGB4444,4,2       ## @GRPH_FORMAT_ARGB4444
	.comm	_GRPH_FORMAT_ARGB1555,4,2       ## @GRPH_FORMAT_ARGB1555
	.comm	_GRPH_FORMAT_BGRA5551,4,2       ## @GRPH_FORMAT_BGRA5551
	.comm	_GRPH_FORMAT_ARGB565,4,2        ## @GRPH_FORMAT_ARGB565
	.comm	_GRPH_DEPTH_32BPP,4,2           ## @GRPH_DEPTH_32BPP
	.comm	_GRPH_FORMAT_ARGB8888,4,2       ## @GRPH_FORMAT_ARGB8888
	.comm	_GRPH_FORMAT_ARGB2101010,4,2    ## @GRPH_FORMAT_ARGB2101010
	.comm	_GRPH_FORMAT_BGRA1010102,4,2    ## @GRPH_FORMAT_BGRA1010102
	.comm	_GRPH_RED_SEL_B,4,2             ## @GRPH_RED_SEL_B
	.comm	_GRPH_BLUE_SEL_R,4,2            ## @GRPH_BLUE_SEL_R
L_.str.1:                               ## @.str.1
	.asciz	"Unsupported screen format %s\n"

	.comm	_ARRAY_MODE,4,2                 ## @ARRAY_MODE
	.comm	_ARRAY_2D_TILED_THIN1,8,3       ## @ARRAY_2D_TILED_THIN1
	.comm	_BANK_WIDTH,4,2                 ## @BANK_WIDTH
	.comm	_BANK_HEIGHT,4,2                ## @BANK_HEIGHT
	.comm	_MACRO_TILE_ASPECT,4,2          ## @MACRO_TILE_ASPECT
	.comm	_TILE_SPLIT,4,2                 ## @TILE_SPLIT
	.comm	_NUM_BANKS,4,2                  ## @NUM_BANKS
	.comm	_GRPH_ARRAY_2D_TILED_THIN1,4,2  ## @GRPH_ARRAY_2D_TILED_THIN1
	.comm	_ARRAY_1D_TILED_THIN1,8,3       ## @ARRAY_1D_TILED_THIN1
	.comm	_GRPH_ARRAY_1D_TILED_THIN1,4,2  ## @GRPH_ARRAY_1D_TILED_THIN1
	.comm	_PIPE_CONFIG,4,2                ## @PIPE_CONFIG
	.comm	_mmGRPH_FLIP_CONTROL,8,3        ## @mmGRPH_FLIP_CONTROL
	.comm	_mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH,8,3 ## @mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH
	.comm	_mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH,8,3 ## @mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH
	.comm	_mmGRPH_PRIMARY_SURFACE_ADDRESS,8,3 ## @mmGRPH_PRIMARY_SURFACE_ADDRESS
	.comm	_GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK,4,2 ## @GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK
	.comm	_mmGRPH_SECONDARY_SURFACE_ADDRESS,8,3 ## @mmGRPH_SECONDARY_SURFACE_ADDRESS
	.comm	_mmGRPH_CONTROL,8,3             ## @mmGRPH_CONTROL
	.comm	_mmGRPH_SWAP_CNTL,8,3           ## @mmGRPH_SWAP_CNTL
	.comm	_mmGRPH_LUT_10BIT_BYPASS,8,3    ## @mmGRPH_LUT_10BIT_BYPASS
	.comm	_GRPH_LUT_10BIT_BYPASS__GRPH_LUT_10BIT_BYPASS_EN_MASK,4,2 ## @GRPH_LUT_10BIT_BYPASS__GRPH_LUT_10BIT_BYPASS_EN_MASK
L_.str.2:                               ## @.str.2
	.asciz	"Bypassing hardware LUT due to 10 bit fb scanout.\n"

	.comm	_mmGRPH_SURFACE_OFFSET_X,8,3    ## @mmGRPH_SURFACE_OFFSET_X
	.comm	_mmGRPH_SURFACE_OFFSET_Y,8,3    ## @mmGRPH_SURFACE_OFFSET_Y
	.comm	_mmGRPH_X_START,8,3             ## @mmGRPH_X_START
	.comm	_mmGRPH_Y_START,8,3             ## @mmGRPH_Y_START
	.comm	_mmGRPH_X_END,8,3               ## @mmGRPH_X_END
	.comm	_mmGRPH_Y_END,8,3               ## @mmGRPH_Y_END
	.comm	_mmGRPH_PITCH,8,3               ## @mmGRPH_PITCH
	.comm	_mmDESKTOP_HEIGHT,8,3           ## @mmDESKTOP_HEIGHT
	.comm	_mmVIEWPORT_START,8,3           ## @mmVIEWPORT_START
	.comm	_mmVIEWPORT_SIZE,8,3            ## @mmVIEWPORT_SIZE
	.comm	_mmMASTER_UPDATE_MODE,8,3       ## @mmMASTER_UPDATE_MODE
	.comm	_GRPH_ENDIAN_8IN16,4,2          ## @GRPH_ENDIAN_8IN16
	.comm	_GRPH_ENDIAN_8IN32,4,2          ## @GRPH_ENDIAN_8IN32
	.no_dead_strip	_dce_v6_0_crtc_do_set_base
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_v6_0_crtc_do_set_base
_dce_v6_0_crtc_do_set_base:             ; @dce_v6_0_crtc_do_set_base
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #160
	.cfi_def_cfa_offset 160
	stp	x28, x27, [sp, #64]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #80]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #96]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #112]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #128]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #144]            ; 16-byte Folded Spill
	add	x29, sp, #144
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x4
	mov	x19, x3
	mov	x28, x2
	mov	x24, x1
	mov	x22, x0
	bl	_to_amdgpu_crtc
	mov	x23, x0
	ldr	x8, [x22, #16]
	ldr	x25, [x8]
Lloh0:
	adrp	x8, _GRPH_ENDIAN_NONE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GRPH_ENDIAN_NONE@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_GRPH_ENDIAN_SWAP
	mov	x26, x0
	mov	x20, x24
	cbnz	w21, LBB0_2
; %bb.1:
	ldr	x8, [x22]
	ldr	x20, [x8]
	cbz	x20, LBB0_7
LBB0_2:
	str	w19, [sp, #44]                  ; 4-byte Folded Spill
	ldr	x8, [x20, #16]
	ldr	x0, [x8]
	bl	_gem_to_amdgpu_bo
	mov	x19, x0
	mov	w1, #0
	bl	_amdgpu_bo_reserve
	mov	x27, x0
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbnz	x0, LBB0_36
; %bb.3:
	cbz	w21, LBB0_8
LBB0_4:
	mov	x0, x19
	bl	_amdgpu_bo_gpu_offset
	mov	x27, x0
	add	x1, sp, #56
	mov	x0, x19
	bl	_amdgpu_bo_get_tiling_flags
	mov	x0, x19
	bl	_amdgpu_bo_unreserve
	ldr	x8, [x20, #24]
	ldr	w0, [x8]
	sub	w8, w0, #128
	cmp	w8, #15
	b.hi	LBB0_18
; %bb.5:
	str	x25, [sp, #32]                  ; 8-byte Folded Spill
Lloh3:
	adrp	x9, lJTI0_0@PAGE
Lloh4:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_6
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_6:
Lloh5:
	adrp	x8, _GRPH_DEPTH_32BPP@GOTPAGE
Lloh6:
	ldr	x8, [x8, _GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh7:
	ldr	w0, [x8]
	bl	_GRPH_DEPTH
	mov	x19, x0
Lloh8:
	adrp	x8, _GRPH_FORMAT_ARGB8888@GOTPAGE
Lloh9:
	ldr	x8, [x8, _GRPH_FORMAT_ARGB8888@GOTPAGEOFF]
	b	LBB0_21
LBB0_7:
Lloh10:
	adrp	x0, l_.str@PAGE
Lloh11:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG_KMS
	b	LBB0_35
LBB0_8:
Lloh12:
	adrp	x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AMDGPU_GEM_DOMAIN_VRAM@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_amdgpu_bo_pin
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbz	x0, LBB0_4
; %bb.9:
	mov	x0, x19
	bl	_amdgpu_bo_unreserve
LBB0_10:
Lloh15:
	adrp	x8, _EINVAL@GOTPAGE
Lloh16:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	neg	w27, w8
	b	LBB0_36
LBB0_11:
Lloh18:
	adrp	x8, _GRPH_DEPTH_16BPP@GOTPAGE
Lloh19:
	ldr	x8, [x8, _GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	bl	_GRPH_DEPTH
	mov	x19, x0
Lloh21:
	adrp	x8, _GRPH_FORMAT_ARGB4444@GOTPAGE
Lloh22:
	ldr	x8, [x8, _GRPH_FORMAT_ARGB4444@GOTPAGEOFF]
	b	LBB0_21
LBB0_12:
Lloh23:
	adrp	x8, _GRPH_DEPTH_32BPP@GOTPAGE
Lloh24:
	ldr	x8, [x8, _GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh25:
	ldr	w0, [x8]
	bl	_GRPH_DEPTH
	mov	x19, x0
Lloh26:
	adrp	x8, _GRPH_FORMAT_ARGB2101010@GOTPAGE
Lloh27:
	ldr	x8, [x8, _GRPH_FORMAT_ARGB2101010@GOTPAGEOFF]
	b	LBB0_17
LBB0_13:
Lloh28:
	adrp	x8, _GRPH_DEPTH_16BPP@GOTPAGE
Lloh29:
	ldr	x8, [x8, _GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh30:
	ldr	w0, [x8]
	bl	_GRPH_DEPTH
	mov	x19, x0
Lloh31:
	adrp	x8, _GRPH_FORMAT_ARGB1555@GOTPAGE
Lloh32:
	ldr	x8, [x8, _GRPH_FORMAT_ARGB1555@GOTPAGEOFF]
	b	LBB0_21
LBB0_14:
Lloh33:
	adrp	x8, _GRPH_DEPTH_32BPP@GOTPAGE
Lloh34:
	ldr	x8, [x8, _GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
	bl	_GRPH_DEPTH
	mov	x19, x0
Lloh36:
	adrp	x8, _GRPH_FORMAT_ARGB8888@GOTPAGE
Lloh37:
	ldr	x8, [x8, _GRPH_FORMAT_ARGB8888@GOTPAGEOFF]
Lloh38:
	ldr	w0, [x8]
	bl	_GRPH_FORMAT
	orr	w19, w0, w19
Lloh39:
	adrp	x8, _GRPH_RED_SEL_B@GOTPAGE
Lloh40:
	ldr	x8, [x8, _GRPH_RED_SEL_B@GOTPAGEOFF]
Lloh41:
	ldr	w0, [x8]
	bl	_GRPH_RED_CROSSBAR
	mov	x25, x0
Lloh42:
	adrp	x8, _GRPH_BLUE_SEL_R@GOTPAGE
Lloh43:
	ldr	x8, [x8, _GRPH_BLUE_SEL_R@GOTPAGEOFF]
Lloh44:
	ldr	w0, [x8]
	bl	_GRPH_BLUE_CROSSBAR
	orr	w26, w0, w25
	b	LBB0_22
LBB0_15:
Lloh45:
	adrp	x8, _GRPH_DEPTH_16BPP@GOTPAGE
Lloh46:
	ldr	x8, [x8, _GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh47:
	ldr	w0, [x8]
	bl	_GRPH_DEPTH
	mov	x19, x0
Lloh48:
	adrp	x8, _GRPH_FORMAT_BGRA5551@GOTPAGE
Lloh49:
	ldr	x8, [x8, _GRPH_FORMAT_BGRA5551@GOTPAGEOFF]
	b	LBB0_21
LBB0_16:
Lloh50:
	adrp	x8, _GRPH_DEPTH_32BPP@GOTPAGE
Lloh51:
	ldr	x8, [x8, _GRPH_DEPTH_32BPP@GOTPAGEOFF]
Lloh52:
	ldr	w0, [x8]
	bl	_GRPH_DEPTH
	mov	x19, x0
Lloh53:
	adrp	x8, _GRPH_FORMAT_BGRA1010102@GOTPAGE
Lloh54:
	ldr	x8, [x8, _GRPH_FORMAT_BGRA1010102@GOTPAGEOFF]
LBB0_17:
	ldr	w0, [x8]
	bl	_GRPH_FORMAT
	str	wzr, [sp, #24]                  ; 4-byte Folded Spill
	orr	w19, w0, w19
	b	LBB0_23
LBB0_18:
	add	x1, sp, #48
	bl	_drm_get_format_name
	mov	x1, x0
Lloh55:
	adrp	x0, l_.str.1@PAGE
Lloh56:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_10
LBB0_19:
Lloh57:
	adrp	x8, _GRPH_DEPTH_16BPP@GOTPAGE
Lloh58:
	ldr	x8, [x8, _GRPH_DEPTH_16BPP@GOTPAGEOFF]
Lloh59:
	ldr	w0, [x8]
	bl	_GRPH_DEPTH
	mov	x19, x0
Lloh60:
	adrp	x8, _GRPH_FORMAT_ARGB565@GOTPAGE
Lloh61:
	ldr	x8, [x8, _GRPH_FORMAT_ARGB565@GOTPAGEOFF]
	b	LBB0_21
LBB0_20:
Lloh62:
	adrp	x8, _GRPH_DEPTH_8BPP@GOTPAGE
Lloh63:
	ldr	x8, [x8, _GRPH_DEPTH_8BPP@GOTPAGEOFF]
Lloh64:
	ldr	w0, [x8]
	bl	_GRPH_DEPTH
	mov	x19, x0
Lloh65:
	adrp	x8, _GRPH_FORMAT_INDEXED@GOTPAGE
Lloh66:
	ldr	x8, [x8, _GRPH_FORMAT_INDEXED@GOTPAGEOFF]
LBB0_21:
	ldr	w0, [x8]
	bl	_GRPH_FORMAT
	orr	w19, w0, w19
LBB0_22:
	mov	w8, #1
	str	w8, [sp, #24]                   ; 4-byte Folded Spill
LBB0_23:
	ldr	x0, [sp, #56]
Lloh67:
	adrp	x25, _ARRAY_MODE@GOTPAGE
Lloh68:
	ldr	x25, [x25, _ARRAY_MODE@GOTPAGEOFF]
	ldr	w1, [x25]
	bl	_AMDGPU_TILING_GET
	mov	x8, x0
Lloh69:
	adrp	x9, _ARRAY_2D_TILED_THIN1@GOTPAGE
Lloh70:
	ldr	x9, [x9, _ARRAY_2D_TILED_THIN1@GOTPAGEOFF]
Lloh71:
	ldr	x9, [x9]
	ldr	x0, [sp, #56]
	cmp	x8, x9
	str	w28, [sp, #28]                  ; 4-byte Folded Spill
	b.eq	LBB0_26
; %bb.24:
	ldr	w1, [x25]
	bl	_AMDGPU_TILING_GET
Lloh72:
	adrp	x8, _ARRAY_1D_TILED_THIN1@GOTPAGE
Lloh73:
	ldr	x8, [x8, _ARRAY_1D_TILED_THIN1@GOTPAGEOFF]
Lloh74:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_27
; %bb.25:
Lloh75:
	adrp	x8, _GRPH_ARRAY_1D_TILED_THIN1@GOTPAGE
Lloh76:
	ldr	x8, [x8, _GRPH_ARRAY_1D_TILED_THIN1@GOTPAGEOFF]
Lloh77:
	ldr	w0, [x8]
	bl	_GRPH_ARRAY_MODE
	orr	w19, w0, w19
	b	LBB0_27
LBB0_26:
Lloh78:
	adrp	x8, _BANK_WIDTH@GOTPAGE
Lloh79:
	ldr	x8, [x8, _BANK_WIDTH@GOTPAGEOFF]
Lloh80:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
	str	x0, [sp, #16]                   ; 8-byte Folded Spill
	ldr	x0, [sp, #56]
Lloh81:
	adrp	x8, _BANK_HEIGHT@GOTPAGE
Lloh82:
	ldr	x8, [x8, _BANK_HEIGHT@GOTPAGEOFF]
Lloh83:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
	str	x0, [sp, #8]                    ; 8-byte Folded Spill
	ldr	x0, [sp, #56]
Lloh84:
	adrp	x8, _MACRO_TILE_ASPECT@GOTPAGE
Lloh85:
	ldr	x8, [x8, _MACRO_TILE_ASPECT@GOTPAGEOFF]
Lloh86:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
	mov	x28, x0
	ldr	x0, [sp, #56]
Lloh87:
	adrp	x8, _TILE_SPLIT@GOTPAGE
Lloh88:
	ldr	x8, [x8, _TILE_SPLIT@GOTPAGEOFF]
Lloh89:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
	mov	x25, x0
	ldr	x0, [sp, #56]
Lloh90:
	adrp	x8, _NUM_BANKS@GOTPAGE
Lloh91:
	ldr	x8, [x8, _NUM_BANKS@GOTPAGEOFF]
Lloh92:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
                                        ; kill: def $w0 killed $w0 killed $x0
	bl	_GRPH_NUM_BANKS
	orr	w19, w0, w19
Lloh93:
	adrp	x8, _GRPH_ARRAY_2D_TILED_THIN1@GOTPAGE
Lloh94:
	ldr	x8, [x8, _GRPH_ARRAY_2D_TILED_THIN1@GOTPAGEOFF]
Lloh95:
	ldr	w0, [x8]
	bl	_GRPH_ARRAY_MODE
	orr	w19, w19, w0
	mov	x0, x25
	bl	_GRPH_TILE_SPLIT
	orr	w19, w19, w0
	ldr	x0, [sp, #16]                   ; 8-byte Folded Reload
                                        ; kill: def $w0 killed $w0 killed $x0
	bl	_GRPH_BANK_WIDTH
	orr	w19, w19, w0
	ldr	x0, [sp, #8]                    ; 8-byte Folded Reload
                                        ; kill: def $w0 killed $w0 killed $x0
	bl	_GRPH_BANK_HEIGHT
	orr	w19, w19, w0
	mov	x0, x28
	bl	_GRPH_MACRO_TILE_ASPECT
	orr	w19, w19, w0
LBB0_27:
	ldr	x25, [sp, #32]                  ; 8-byte Folded Reload
	ldr	x0, [sp, #56]
Lloh96:
	adrp	x8, _PIPE_CONFIG@GOTPAGE
Lloh97:
	ldr	x8, [x8, _PIPE_CONFIG@GOTPAGEOFF]
Lloh98:
	ldr	w1, [x8]
	bl	_AMDGPU_TILING_GET
                                        ; kill: def $w0 killed $w0 killed $x0
	bl	_GRPH_PIPE_CONFIG
	orr	w28, w0, w19
	mov	x0, x22
	mov	w1, #0
	bl	_dce_v6_0_vga_enable
Lloh99:
	adrp	x8, _mmGRPH_FLIP_CONTROL@GOTPAGE
Lloh100:
	ldr	x8, [x8, _mmGRPH_FLIP_CONTROL@GOTPAGEOFF]
Lloh101:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh102:
	adrp	x8, _mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh103:
	ldr	x8, [x8, _mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
Lloh104:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x19, x9, x8
	mov	x0, x27
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_WREG32
Lloh105:
	adrp	x8, _mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPAGE
Lloh106:
	ldr	x8, [x8, _mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH@GOTPAGEOFF]
Lloh107:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x19, x9, x8
	mov	x0, x27
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x19
	bl	_WREG32
Lloh108:
	adrp	x8, _mmGRPH_PRIMARY_SURFACE_ADDRESS@GOTPAGE
Lloh109:
	ldr	x8, [x8, _mmGRPH_PRIMARY_SURFACE_ADDRESS@GOTPAGEOFF]
Lloh110:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
Lloh111:
	adrp	x19, _GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK@GOTPAGE
Lloh112:
	ldr	x19, [x19, _GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK@GOTPAGEOFF]
	ldr	w8, [x19]
	and	w1, w8, w27
	bl	_WREG32
Lloh113:
	adrp	x8, _mmGRPH_SECONDARY_SURFACE_ADDRESS@GOTPAGE
Lloh114:
	ldr	x8, [x8, _mmGRPH_SECONDARY_SURFACE_ADDRESS@GOTPAGEOFF]
Lloh115:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	ldr	w8, [x19]
	and	w1, w8, w27
	bl	_WREG32
Lloh116:
	adrp	x8, _mmGRPH_CONTROL@GOTPAGE
Lloh117:
	ldr	x8, [x8, _mmGRPH_CONTROL@GOTPAGEOFF]
Lloh118:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	x1, x28
	bl	_WREG32
Lloh119:
	adrp	x8, _mmGRPH_SWAP_CNTL@GOTPAGE
Lloh120:
	ldr	x8, [x8, _mmGRPH_SWAP_CNTL@GOTPAGEOFF]
Lloh121:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	x1, x26
	bl	_WREG32
Lloh122:
	adrp	x8, _mmGRPH_LUT_10BIT_BYPASS@GOTPAGE
Lloh123:
	ldr	x8, [x8, _mmGRPH_LUT_10BIT_BYPASS@GOTPAGEOFF]
Lloh124:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
Lloh125:
	adrp	x8, _GRPH_LUT_10BIT_BYPASS__GRPH_LUT_10BIT_BYPASS_EN_MASK@GOTPAGE
Lloh126:
	ldr	x8, [x8, _GRPH_LUT_10BIT_BYPASS__GRPH_LUT_10BIT_BYPASS_EN_MASK@GOTPAGEOFF]
Lloh127:
	ldr	w8, [x8]
	ldr	w19, [sp, #24]                  ; 4-byte Folded Reload
	cmp	w19, #0
	csel	w1, wzr, w8, ne
	mvn	w2, w8
	bl	_WREG32_P
	tbnz	w19, #0, LBB0_29
; %bb.28:
Lloh128:
	adrp	x0, l_.str.2@PAGE
Lloh129:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_DRM_DEBUG_KMS
LBB0_29:
Lloh130:
	adrp	x8, _mmGRPH_SURFACE_OFFSET_X@GOTPAGE
Lloh131:
	ldr	x8, [x8, _mmGRPH_SURFACE_OFFSET_X@GOTPAGEOFF]
Lloh132:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh133:
	adrp	x8, _mmGRPH_SURFACE_OFFSET_Y@GOTPAGE
Lloh134:
	ldr	x8, [x8, _mmGRPH_SURFACE_OFFSET_Y@GOTPAGEOFF]
Lloh135:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh136:
	adrp	x8, _mmGRPH_X_START@GOTPAGE
Lloh137:
	ldr	x8, [x8, _mmGRPH_X_START@GOTPAGEOFF]
Lloh138:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh139:
	adrp	x8, _mmGRPH_Y_START@GOTPAGE
Lloh140:
	ldr	x8, [x8, _mmGRPH_Y_START@GOTPAGEOFF]
Lloh141:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
Lloh142:
	adrp	x8, _mmGRPH_X_END@GOTPAGE
Lloh143:
	ldr	x8, [x8, _mmGRPH_X_END@GOTPAGEOFF]
Lloh144:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	ldr	w1, [x20]
	bl	_WREG32
Lloh145:
	adrp	x8, _mmGRPH_Y_END@GOTPAGE
Lloh146:
	ldr	x8, [x8, _mmGRPH_Y_END@GOTPAGEOFF]
Lloh147:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	ldr	w1, [x20, #4]
	bl	_WREG32
	ldr	x8, [x20, #8]
	ldr	w8, [x8]
	ldr	x9, [x20, #24]
	ldr	x9, [x9, #8]
	ldr	w9, [x9]
	sdiv	w1, w8, w9
Lloh148:
	adrp	x8, _mmGRPH_PITCH@GOTPAGE
Lloh149:
	ldr	x8, [x8, _mmGRPH_PITCH@GOTPAGEOFF]
Lloh150:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	bl	_WREG32
	mov	x0, x22
	mov	w1, #1
	bl	_dce_v6_0_grph_enable
Lloh151:
	adrp	x8, _mmDESKTOP_HEIGHT@GOTPAGE
Lloh152:
	ldr	x8, [x8, _mmDESKTOP_HEIGHT@GOTPAGEOFF]
Lloh153:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	ldr	w1, [x20, #4]
	bl	_WREG32
	ldr	w8, [sp, #44]                   ; 4-byte Folded Reload
	and	w8, w8, #0xfffffffe
Lloh154:
	adrp	x9, _mmVIEWPORT_START@GOTPAGE
Lloh155:
	ldr	x9, [x9, _mmVIEWPORT_START@GOTPAGEOFF]
Lloh156:
	ldr	x9, [x9]
	ldr	x10, [x23]
	add	x0, x10, x9
	ldr	w9, [sp, #28]                   ; 4-byte Folded Reload
	lsl	w9, w9, #16
	and	w9, w9, #0xfffc0000
	orr	w1, w9, w8
	bl	_WREG32
	ldp	w8, w9, [x22, #8]
	add	w9, w9, #1
	and	w9, w9, #0xfffffffe
Lloh157:
	adrp	x10, _mmVIEWPORT_SIZE@GOTPAGE
Lloh158:
	ldr	x10, [x10, _mmVIEWPORT_SIZE@GOTPAGEOFF]
Lloh159:
	ldr	x10, [x10]
	ldr	x11, [x23]
	add	x0, x11, x10
	orr	w1, w9, w8, lsl #16
	bl	_WREG32
Lloh160:
	adrp	x8, _mmMASTER_UPDATE_MODE@GOTPAGE
Lloh161:
	ldr	x8, [x8, _mmMASTER_UPDATE_MODE@GOTPAGEOFF]
Lloh162:
	ldr	x8, [x8]
	ldr	x9, [x23]
	add	x0, x9, x8
	mov	w1, #0
	bl	_WREG32
	cbz	x24, LBB0_34
; %bb.30:
	cbnz	w21, LBB0_34
; %bb.31:
	ldr	x8, [x22]
	ldr	x8, [x8]
	cmp	x8, x24
	b.eq	LBB0_34
; %bb.32:
	ldr	x8, [x24, #16]
	ldr	x0, [x8]
	bl	_gem_to_amdgpu_bo
	mov	x19, x0
	mov	w1, #1
	bl	_amdgpu_bo_reserve
	mov	x27, x0
	cmp	w0, #0
	cset	w0, ne
	bl	_unlikely
	cbnz	x0, LBB0_36
; %bb.33:
	mov	x0, x19
	bl	_amdgpu_bo_unpin
	mov	x0, x19
	bl	_amdgpu_bo_unreserve
LBB0_34:
	mov	x0, x25
	bl	_dce_v6_0_bandwidth_update
LBB0_35:
	mov	w27, #0
LBB0_36:
	mov	x0, x27
	ldp	x29, x30, [sp, #144]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #128]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #112]            ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #96]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #80]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #160
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpAdd	Lloh55, Lloh56
	.loh AdrpLdrGot	Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpLdrGotLdr	Lloh87, Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh125, Lloh126, Lloh127
	.loh AdrpLdrGotLdr	Lloh122, Lloh123, Lloh124
	.loh AdrpLdrGotLdr	Lloh119, Lloh120, Lloh121
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGot	Lloh111, Lloh112
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGotLdr	Lloh96, Lloh97, Lloh98
	.loh AdrpAdd	Lloh128, Lloh129
	.loh AdrpLdrGotLdr	Lloh160, Lloh161, Lloh162
	.loh AdrpLdrGotLdr	Lloh157, Lloh158, Lloh159
	.loh AdrpLdrGotLdr	Lloh154, Lloh155, Lloh156
	.loh AdrpLdrGotLdr	Lloh151, Lloh152, Lloh153
	.loh AdrpLdrGotLdr	Lloh148, Lloh149, Lloh150
	.loh AdrpLdrGotLdr	Lloh145, Lloh146, Lloh147
	.loh AdrpLdrGotLdr	Lloh142, Lloh143, Lloh144
	.loh AdrpLdrGotLdr	Lloh139, Lloh140, Lloh141
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.loh AdrpLdrGotLdr	Lloh133, Lloh134, Lloh135
	.loh AdrpLdrGotLdr	Lloh130, Lloh131, Lloh132
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_6-LBB0_6)>>2
	.byte	(LBB0_11-LBB0_6)>>2
	.byte	(LBB0_12-LBB0_6)>>2
	.byte	(LBB0_13-LBB0_6)>>2
	.byte	(LBB0_14-LBB0_6)>>2
	.byte	(LBB0_19-LBB0_6)>>2
	.byte	(LBB0_20-LBB0_6)>>2
	.byte	(LBB0_15-LBB0_6)>>2
	.byte	(LBB0_16-LBB0_6)>>2
	.byte	(LBB0_15-LBB0_6)>>2
	.byte	(LBB0_16-LBB0_6)>>2
	.byte	(LBB0_6-LBB0_6)>>2
	.byte	(LBB0_11-LBB0_6)>>2
	.byte	(LBB0_12-LBB0_6)>>2
	.byte	(LBB0_13-LBB0_6)>>2
	.byte	(LBB0_14-LBB0_6)>>2
                                        ; -- End function
	.comm	_GRPH_ENDIAN_NONE,4,2           ; @GRPH_ENDIAN_NONE
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"No FB bound\n"

	.comm	_AMDGPU_GEM_DOMAIN_VRAM,4,2     ; @AMDGPU_GEM_DOMAIN_VRAM
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_GRPH_DEPTH_8BPP,4,2            ; @GRPH_DEPTH_8BPP
	.comm	_GRPH_FORMAT_INDEXED,4,2        ; @GRPH_FORMAT_INDEXED
	.comm	_GRPH_DEPTH_16BPP,4,2           ; @GRPH_DEPTH_16BPP
	.comm	_GRPH_FORMAT_ARGB4444,4,2       ; @GRPH_FORMAT_ARGB4444
	.comm	_GRPH_FORMAT_ARGB1555,4,2       ; @GRPH_FORMAT_ARGB1555
	.comm	_GRPH_FORMAT_BGRA5551,4,2       ; @GRPH_FORMAT_BGRA5551
	.comm	_GRPH_FORMAT_ARGB565,4,2        ; @GRPH_FORMAT_ARGB565
	.comm	_GRPH_DEPTH_32BPP,4,2           ; @GRPH_DEPTH_32BPP
	.comm	_GRPH_FORMAT_ARGB8888,4,2       ; @GRPH_FORMAT_ARGB8888
	.comm	_GRPH_FORMAT_ARGB2101010,4,2    ; @GRPH_FORMAT_ARGB2101010
	.comm	_GRPH_FORMAT_BGRA1010102,4,2    ; @GRPH_FORMAT_BGRA1010102
	.comm	_GRPH_RED_SEL_B,4,2             ; @GRPH_RED_SEL_B
	.comm	_GRPH_BLUE_SEL_R,4,2            ; @GRPH_BLUE_SEL_R
l_.str.1:                               ; @.str.1
	.asciz	"Unsupported screen format %s\n"

	.comm	_ARRAY_MODE,4,2                 ; @ARRAY_MODE
	.comm	_ARRAY_2D_TILED_THIN1,8,3       ; @ARRAY_2D_TILED_THIN1
	.comm	_BANK_WIDTH,4,2                 ; @BANK_WIDTH
	.comm	_BANK_HEIGHT,4,2                ; @BANK_HEIGHT
	.comm	_MACRO_TILE_ASPECT,4,2          ; @MACRO_TILE_ASPECT
	.comm	_TILE_SPLIT,4,2                 ; @TILE_SPLIT
	.comm	_NUM_BANKS,4,2                  ; @NUM_BANKS
	.comm	_GRPH_ARRAY_2D_TILED_THIN1,4,2  ; @GRPH_ARRAY_2D_TILED_THIN1
	.comm	_ARRAY_1D_TILED_THIN1,8,3       ; @ARRAY_1D_TILED_THIN1
	.comm	_GRPH_ARRAY_1D_TILED_THIN1,4,2  ; @GRPH_ARRAY_1D_TILED_THIN1
	.comm	_PIPE_CONFIG,4,2                ; @PIPE_CONFIG
	.comm	_mmGRPH_FLIP_CONTROL,8,3        ; @mmGRPH_FLIP_CONTROL
	.comm	_mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH,8,3 ; @mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH
	.comm	_mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH,8,3 ; @mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH
	.comm	_mmGRPH_PRIMARY_SURFACE_ADDRESS,8,3 ; @mmGRPH_PRIMARY_SURFACE_ADDRESS
	.comm	_GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK,4,2 ; @GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK
	.comm	_mmGRPH_SECONDARY_SURFACE_ADDRESS,8,3 ; @mmGRPH_SECONDARY_SURFACE_ADDRESS
	.comm	_mmGRPH_CONTROL,8,3             ; @mmGRPH_CONTROL
	.comm	_mmGRPH_SWAP_CNTL,8,3           ; @mmGRPH_SWAP_CNTL
	.comm	_mmGRPH_LUT_10BIT_BYPASS,8,3    ; @mmGRPH_LUT_10BIT_BYPASS
	.comm	_GRPH_LUT_10BIT_BYPASS__GRPH_LUT_10BIT_BYPASS_EN_MASK,4,2 ; @GRPH_LUT_10BIT_BYPASS__GRPH_LUT_10BIT_BYPASS_EN_MASK
l_.str.2:                               ; @.str.2
	.asciz	"Bypassing hardware LUT due to 10 bit fb scanout.\n"

	.comm	_mmGRPH_SURFACE_OFFSET_X,8,3    ; @mmGRPH_SURFACE_OFFSET_X
	.comm	_mmGRPH_SURFACE_OFFSET_Y,8,3    ; @mmGRPH_SURFACE_OFFSET_Y
	.comm	_mmGRPH_X_START,8,3             ; @mmGRPH_X_START
	.comm	_mmGRPH_Y_START,8,3             ; @mmGRPH_Y_START
	.comm	_mmGRPH_X_END,8,3               ; @mmGRPH_X_END
	.comm	_mmGRPH_Y_END,8,3               ; @mmGRPH_Y_END
	.comm	_mmGRPH_PITCH,8,3               ; @mmGRPH_PITCH
	.comm	_mmDESKTOP_HEIGHT,8,3           ; @mmDESKTOP_HEIGHT
	.comm	_mmVIEWPORT_START,8,3           ; @mmVIEWPORT_START
	.comm	_mmVIEWPORT_SIZE,8,3            ; @mmVIEWPORT_SIZE
	.comm	_mmMASTER_UPDATE_MODE,8,3       ; @mmMASTER_UPDATE_MODE
	.comm	_GRPH_ENDIAN_8IN16,4,2          ; @GRPH_ENDIAN_8IN16
	.comm	_GRPH_ENDIAN_8IN32,4,2          ; @GRPH_ENDIAN_8IN32
	.no_dead_strip	_dce_v6_0_crtc_do_set_base
.subsections_via_symbols
