	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function amdgpu_set_pp_od_clk_voltage
_amdgpu_set_pp_od_clk_voltage:          ## @amdgpu_set_pp_od_clk_voltage
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$680, %rsp                      ## imm = 0x2A8
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r12
	movq	%rdx, %r13
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	callq	_dev_get_drvdata
	movq	(%rax), %r14
	movb	$0, -690(%rbp)
	movw	$2592, -692(%rbp)               ## imm = 0xA20
	cmpq	$128, %r12
	jb	LBB0_1
LBB0_14:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%r12d, %r12d
	subq	(%rax), %r12
LBB0_26:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_28
## %bb.27:
	movq	%r12, %rax
	addq	$680, %rsp                      ## imm = 0x2A8
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movb	(%r13), %cl
	addb	$-99, %cl
	cmpb	$16, %cl
	ja	LBB0_5
## %bb.2:
	movq	_PP_OD_EDIT_SCLK_VDDC_TABLE@GOTPCREL(%rip), %rax
	movzbl	%cl, %ecx
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%rcx,4), %rcx
	addq	%rdx, %rcx
	jmpq	*%rcx
LBB0_4:
	movq	_PP_OD_COMMIT_DPM_TABLE@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_5:
	leaq	L_.str(%rip), %rsi
	movq	%r13, %rdi
	movl	$2, %edx
	callq	_strncmp
	testl	%eax, %eax
	jne	LBB0_14
## %bb.6:
	movq	_PP_OD_EDIT_VDDC_CURVE@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_7:
	movq	_PP_OD_EDIT_MCLK_VDDC_TABLE@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_3:
	movq	_PP_OD_RESTORE_DEFAULT_TABLE@GOTPCREL(%rip), %rax
LBB0_8:
	movq	(%rax), %rbx
	leaq	1(%r12), %rdx
	leaq	-688(%rbp), %r15
	movq	%r15, %rdi
	movq	%r13, %rsi
	callq	_memcpy
	movq	_PP_OD_EDIT_VDDC_CURVE@GOTPCREL(%rip), %rax
	movq	%rbx, -712(%rbp)                ## 8-byte Spill
	cmpq	(%rax), %rbx
	leaq	-687(%rbp), %rbx
	cmovneq	%r15, %rbx
	incq	%rbx
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	movq	%rbx, -704(%rbp)
	movsbl	(%rbx), %edi
	callq	_isspace
	incq	%rbx
	testq	%rax, %rax
	jne	LBB0_9
## %bb.10:
	cmpb	$0, -1(%rbx)
	je	LBB0_11
## %bb.15:
	xorl	%ebx, %ebx
	leaq	-704(%rbp), %r13
	leaq	-692(%rbp), %r15
	jmp	LBB0_17
	.p2align	4, 0x90
LBB0_16:                                ##   in Loop: Header=BB0_17 Depth=1
	incq	%rbx
	movq	-704(%rbp), %rax
	cmpb	$0, (%rax)
	je	LBB0_12
LBB0_17:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_19 Depth 2
	movq	%r13, %rdi
	movq	%r15, %rsi
	callq	_strsep
	leaq	-560(,%rbx,8), %rdx
	addq	%rbp, %rdx
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	_kstrtol
	testl	%eax, %eax
	jne	LBB0_14
## %bb.18:                              ##   in Loop: Header=BB0_17 Depth=1
	movq	-704(%rbp), %rax
	movsbl	(%rax), %edi
	.p2align	4, 0x90
LBB0_19:                                ##   Parent Loop BB0_17 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	callq	_isspace
	testq	%rax, %rax
	je	LBB0_16
## %bb.20:                              ##   in Loop: Header=BB0_19 Depth=2
	movq	-704(%rbp), %rax
	leaq	1(%rax), %rcx
	movq	%rcx, -704(%rbp)
	movsbl	1(%rax), %edi
	jmp	LBB0_19
LBB0_11:
	xorl	%ebx, %ebx
LBB0_12:
	movq	%r14, %rdi
	callq	_is_support_sw_smu
	testq	%rax, %rax
	je	LBB0_21
## %bb.13:
	addq	$8, %r14
	leaq	-560(%rbp), %rdx
	movq	%r14, %rdi
	movq	-712(%rbp), %rsi                ## 8-byte Reload
	movq	%rbx, %rcx
	callq	_smu_od_edit_dpm_table
	testl	%eax, %eax
	jne	LBB0_14
	jmp	LBB0_26
LBB0_21:
	movq	(%r14), %rax
	cmpq	$0, 8(%rax)
	movq	-712(%rbp), %r15                ## 8-byte Reload
	je	LBB0_23
## %bb.22:
	leaq	-560(%rbp), %rdx
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rbx, %rcx
	callq	_amdgpu_dpm_odn_edit_dpm_table
	testl	%eax, %eax
	jne	LBB0_14
LBB0_23:
	movq	_PP_OD_COMMIT_DPM_TABLE@GOTPCREL(%rip), %rax
	cmpq	(%rax), %r15
	jne	LBB0_26
## %bb.24:
	movq	(%r14), %rax
	cmpq	$0, (%rax)
	je	LBB0_14
## %bb.25:
	movq	_AMD_PP_TASK_READJUST_POWER_STATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_amdgpu_dpm_dispatch_task
	jmp	LBB0_26
LBB0_28:
	callq	___stack_chk_fail
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
LJTI0_0:
	.long	L0_0_set_4
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_7
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_5
	.long	L0_0_set_3
	.long	L0_0_set_8
	.end_data_region
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L___const.amdgpu_set_pp_od_clk_voltage.delimiter: ## @__const.amdgpu_set_pp_od_clk_voltage.delimiter
	.asciz	" \n"

	.comm	_EINVAL,8,3                     ## @EINVAL
	.comm	_PP_OD_EDIT_SCLK_VDDC_TABLE,8,3 ## @PP_OD_EDIT_SCLK_VDDC_TABLE
	.comm	_PP_OD_EDIT_MCLK_VDDC_TABLE,8,3 ## @PP_OD_EDIT_MCLK_VDDC_TABLE
	.comm	_PP_OD_RESTORE_DEFAULT_TABLE,8,3 ## @PP_OD_RESTORE_DEFAULT_TABLE
	.comm	_PP_OD_COMMIT_DPM_TABLE,8,3     ## @PP_OD_COMMIT_DPM_TABLE
L_.str:                                 ## @.str
	.asciz	"vc"

	.comm	_PP_OD_EDIT_VDDC_CURVE,8,3      ## @PP_OD_EDIT_VDDC_CURVE
	.comm	_AMD_PP_TASK_READJUST_POWER_STATE,4,2 ## @AMD_PP_TASK_READJUST_POWER_STATE
	.no_dead_strip	_amdgpu_set_pp_od_clk_voltage
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function amdgpu_set_pp_od_clk_voltage
_amdgpu_set_pp_od_clk_voltage:          ; @amdgpu_set_pp_od_clk_voltage
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	sub	sp, sp, #672
	mov	x19, x3
	mov	x22, x2
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	stur	x8, [x29, #-56]
	bl	_dev_get_drvdata
	ldr	x20, [x0]
	strb	wzr, [sp, #14]
	mov	w8, #2592
	strh	w8, [sp, #12]
	cmp	x19, #128
	b.lo	LBB0_4
LBB0_1:
Lloh3:
	adrp	x8, _EINVAL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	neg	x19, x8
LBB0_2:
	ldur	x8, [x29, #-56]
Lloh6:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh7:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_27
; %bb.3:
	mov	x0, x19
	add	sp, sp, #672
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_4:
	ldrb	w8, [x22]
	sub	w9, w8, #99
	cmp	w9, #16
	b.hi	LBB0_7
; %bb.5:
Lloh9:
	adrp	x8, _PP_OD_EDIT_SCLK_VDDC_TABLE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PP_OD_EDIT_SCLK_VDDC_TABLE@GOTPAGEOFF]
Lloh11:
	adrp	x10, lJTI0_0@PAGE
Lloh12:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_6
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_6:
Lloh13:
	adrp	x8, _PP_OD_COMMIT_DPM_TABLE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PP_OD_COMMIT_DPM_TABLE@GOTPAGEOFF]
	b	LBB0_11
LBB0_7:
Lloh15:
	adrp	x1, l_.str@PAGE
Lloh16:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x22
	mov	w2, #2
	bl	_strncmp
	cbnz	w0, LBB0_1
; %bb.8:
Lloh17:
	adrp	x8, _PP_OD_EDIT_VDDC_CURVE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _PP_OD_EDIT_VDDC_CURVE@GOTPAGEOFF]
	b	LBB0_11
LBB0_9:
Lloh19:
	adrp	x8, _PP_OD_EDIT_MCLK_VDDC_TABLE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PP_OD_EDIT_MCLK_VDDC_TABLE@GOTPAGEOFF]
	b	LBB0_11
LBB0_10:
Lloh21:
	adrp	x8, _PP_OD_RESTORE_DEFAULT_TABLE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PP_OD_RESTORE_DEFAULT_TABLE@GOTPAGEOFF]
LBB0_11:
	ldr	x21, [x8]
	add	x2, x19, #1
	add	x23, sp, #24
	add	x0, sp, #24
	mov	x1, x22
	bl	_memcpy
Lloh23:
	adrp	x8, _PP_OD_EDIT_VDDC_CURVE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PP_OD_EDIT_VDDC_CURVE@GOTPAGEOFF]
Lloh25:
	ldr	x8, [x8]
	cmp	x21, x8
	cinc	x8, x23, eq
	add	x22, x8, #1
LBB0_12:                                ; =>This Inner Loop Header: Depth=1
	str	x22, [sp, #16]
	ldrsb	w0, [x22], #1
	bl	_isspace
	cbnz	x0, LBB0_12
; %bb.13:
	ldurb	w8, [x22, #-1]
	cbz	w8, LBB0_19
; %bb.14:
	mov	x22, #0
	add	x23, sp, #152
	b	LBB0_16
LBB0_15:                                ;   in Loop: Header=BB0_16 Depth=1
	add	x22, x22, #1
	ldr	x8, [sp, #16]
	ldrb	w8, [x8]
	cbz	w8, LBB0_20
LBB0_16:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_18 Depth 2
	add	x0, sp, #16
	add	x1, sp, #12
	bl	_strsep
	add	x2, x23, x22, lsl #3
	mov	w1, #0
	bl	_kstrtol
	cbnz	w0, LBB0_1
; %bb.17:                               ;   in Loop: Header=BB0_16 Depth=1
	ldr	x8, [sp, #16]
	ldrsb	w0, [x8]
	bl	_isspace
	cbz	x0, LBB0_15
LBB0_18:                                ;   Parent Loop BB0_16 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ldr	x8, [sp, #16]
	add	x9, x8, #1
	str	x9, [sp, #16]
	ldrsb	w0, [x8, #1]
	bl	_isspace
	cbnz	x0, LBB0_18
	b	LBB0_15
LBB0_19:
	mov	x22, #0
LBB0_20:
	mov	x0, x20
	bl	_is_support_sw_smu
	cbz	x0, LBB0_22
; %bb.21:
	add	x0, x20, #8
	add	x2, sp, #152
	mov	x1, x21
	mov	x3, x22
	bl	_smu_od_edit_dpm_table
	cbnz	w0, LBB0_1
	b	LBB0_2
LBB0_22:
	ldr	x8, [x20]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_24
; %bb.23:
	add	x2, sp, #152
	mov	x0, x20
	mov	x1, x21
	mov	x3, x22
	bl	_amdgpu_dpm_odn_edit_dpm_table
	cbnz	w0, LBB0_1
LBB0_24:
Lloh26:
	adrp	x8, _PP_OD_COMMIT_DPM_TABLE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _PP_OD_COMMIT_DPM_TABLE@GOTPAGEOFF]
Lloh28:
	ldr	x8, [x8]
	cmp	x21, x8
	b.ne	LBB0_2
; %bb.25:
	ldr	x8, [x20]
	ldr	x8, [x8]
	cbz	x8, LBB0_1
; %bb.26:
Lloh29:
	adrp	x8, _AMD_PP_TASK_READJUST_POWER_STATE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _AMD_PP_TASK_READJUST_POWER_STATE@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	mov	x0, x20
	mov	x2, #0
	bl	_amdgpu_dpm_dispatch_task
	b	LBB0_2
LBB0_27:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_6-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_9-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_7-LBB0_6)>>2
	.byte	(LBB0_10-LBB0_6)>>2
	.byte	(LBB0_11-LBB0_6)>>2
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l___const.amdgpu_set_pp_od_clk_voltage.delimiter: ; @__const.amdgpu_set_pp_od_clk_voltage.delimiter
	.asciz	" \n"

	.comm	_EINVAL,8,3                     ; @EINVAL
	.comm	_PP_OD_EDIT_SCLK_VDDC_TABLE,8,3 ; @PP_OD_EDIT_SCLK_VDDC_TABLE
	.comm	_PP_OD_EDIT_MCLK_VDDC_TABLE,8,3 ; @PP_OD_EDIT_MCLK_VDDC_TABLE
	.comm	_PP_OD_RESTORE_DEFAULT_TABLE,8,3 ; @PP_OD_RESTORE_DEFAULT_TABLE
	.comm	_PP_OD_COMMIT_DPM_TABLE,8,3     ; @PP_OD_COMMIT_DPM_TABLE
l_.str:                                 ; @.str
	.asciz	"vc"

	.comm	_PP_OD_EDIT_VDDC_CURVE,8,3      ; @PP_OD_EDIT_VDDC_CURVE
	.comm	_AMD_PP_TASK_READJUST_POWER_STATE,4,2 ; @AMD_PP_TASK_READJUST_POWER_STATE
	.no_dead_strip	_amdgpu_set_pp_od_clk_voltage
.subsections_via_symbols
