	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function psp_v12_0_init_microcode
_psp_v12_0_init_microcode:              ## @psp_v12_0_init_microcode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -32(%rbp)
	movq	(%rdi), %r15
	leaq	L_.str(%rip), %rdi
	callq	_DRM_DEBUG
	cmpl	$128, (%r15)
	je	LBB0_2
## %bb.1:
	xorl	%eax, %eax
	callq	_BUG
LBB0_2:
	leaq	L_.str.2(%rip), %rdx
	leaq	L_.str.1(%rip), %rcx
	leaq	-64(%rbp), %r14
	movq	%r14, %rdi
	movl	$30, %esi
	callq	_snprintf
	leaq	24(%r15), %rbx
	movl	40(%r15), %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_request_firmware
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_5
## %bb.3:
	movq	(%rbx), %rdi
	callq	_amdgpu_ucode_validate
	movl	%eax, %r14d
	testl	%eax, %eax
	je	LBB0_4
LBB0_5:
	movq	(%rbx), %rdi
	callq	_release_firmware
	movq	$0, (%rbx)
LBB0_6:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-32(%rbp), %rax
	jne	LBB0_8
## %bb.7:
	movl	%r14d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	24(%r15), %rax
	movq	(%rax), %rbx
	movl	8(%rbx), %edi
	callq	_le32_to_cpu
	movl	%eax, 8(%r15)
	movl	12(%rbx), %edi
	callq	_le32_to_cpu
	movl	%eax, 12(%r15)
	movl	4(%rbx), %edi
	callq	_le32_to_cpu
	movl	%eax, 16(%r15)
	movl	(%rbx), %edi
	callq	_le32_to_cpu
	cltq
	leaq	(%rbx,%rax,4), %rax
	movq	%rax, 32(%r15)
	xorl	%r14d, %r14d
	jmp	LBB0_6
LBB0_8:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"\n"

L_.str.1:                               ## @.str.1
	.asciz	"renoir"

L_.str.2:                               ## @.str.2
	.asciz	"amdgpu/%s_asd.bin"

	.no_dead_strip	_psp_v12_0_init_microcode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function psp_v12_0_init_microcode
_psp_v12_0_init_microcode:              ; @psp_v12_0_init_microcode
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #40]
	ldr	x21, [x0]
Lloh3:
	adrp	x0, l_.str@PAGE
Lloh4:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_DEBUG
	ldr	w8, [x21]
	cmp	w8, #128
	b.eq	LBB0_2
; %bb.1:
	bl	_BUG
LBB0_2:
Lloh5:
	adrp	x2, l_.str.2@PAGE
Lloh6:
	add	x2, x2, l_.str.2@PAGEOFF
Lloh7:
	adrp	x3, l_.str.1@PAGE
Lloh8:
	add	x3, x3, l_.str.1@PAGEOFF
	add	x0, sp, #10
	mov	w1, #30
	bl	_snprintf
	add	x20, x21, #24
	ldr	w2, [x21, #40]
	add	x1, sp, #10
	mov	x0, x20
	bl	_request_firmware
	mov	x19, x0
	cbnz	w0, LBB0_4
; %bb.3:
	ldr	x0, [x20]
	bl	_amdgpu_ucode_validate
	mov	x19, x0
	cbz	w0, LBB0_7
LBB0_4:
	ldr	x0, [x20]
	bl	_release_firmware
	str	xzr, [x20]
LBB0_5:
	ldr	x8, [sp, #40]
Lloh9:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh10:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_8
; %bb.6:
	mov	x0, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_7:
	ldr	x8, [x21, #24]
	ldr	x20, [x8]
	ldr	w0, [x20, #8]
	bl	_le32_to_cpu
	str	w0, [x21, #8]
	ldr	w0, [x20, #12]
	bl	_le32_to_cpu
	str	w0, [x21, #12]
	ldr	w0, [x20, #4]
	bl	_le32_to_cpu
	str	w0, [x21, #16]
	ldr	w0, [x20]
	bl	_le32_to_cpu
	add	x8, x20, w0, sxtw #2
	str	x8, [x21, #32]
	b	LBB0_5
LBB0_8:
	bl	___stack_chk_fail
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"\n"

l_.str.1:                               ; @.str.1
	.asciz	"renoir"

l_.str.2:                               ; @.str.2
	.asciz	"amdgpu/%s_asd.bin"

	.no_dead_strip	_psp_v12_0_init_microcode
.subsections_via_symbols
