	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gfx_v9_0_init_cp_gfx_microcode
_gfx_v9_0_init_cp_gfx_microcode:        ## @gfx_v9_0_init_cp_gfx_microcode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$48, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r12
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -40(%rbp)
	leaq	L_.str(%rip), %rdx
	leaq	-80(%rbp), %r14
	movq	%r14, %rdi
	movl	$30, %esi
	movq	%r15, %rcx
	callq	_snprintf
	leaq	16(%r12), %rbx
	movl	72(%r12), %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_request_firmware
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_8
## %bb.1:
	movq	(%rbx), %rdi
	callq	_amdgpu_ucode_validate
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_8
## %bb.2:
	movq	16(%r12), %rax
	movq	(%rax), %rbx
	movl	4(%rbx), %edi
	callq	_le32_to_cpu
	movq	%rax, 64(%r12)
	movl	(%rbx), %edi
	callq	_le32_to_cpu
	movq	%rax, 56(%r12)
	leaq	L_.str.1(%rip), %rdx
	leaq	-80(%rbp), %r14
	movq	%r14, %rdi
	movl	$30, %esi
	movq	%r15, %rcx
	callq	_snprintf
	leaq	8(%r12), %rbx
	movl	72(%r12), %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_request_firmware
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_8
## %bb.3:
	movq	(%rbx), %rdi
	callq	_amdgpu_ucode_validate
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_8
## %bb.4:
	movq	8(%r12), %rax
	movq	(%rax), %rbx
	movl	4(%rbx), %edi
	callq	_le32_to_cpu
	movq	%rax, 48(%r12)
	movl	(%rbx), %edi
	callq	_le32_to_cpu
	movq	%rax, 40(%r12)
	leaq	L_.str.2(%rip), %rdx
	leaq	-80(%rbp), %rbx
	movq	%rbx, %rdi
	movl	$30, %esi
	movq	%r15, %rcx
	callq	_snprintf
	movl	72(%r12), %edx
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_request_firmware
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_8
## %bb.5:
	movq	(%r12), %rdi
	callq	_amdgpu_ucode_validate
	movl	%eax, %r14d
	testl	%eax, %eax
	je	LBB0_6
LBB0_8:
	movl	72(%r12), %edi
	leaq	L_.str.3(%rip), %rsi
	leaq	-80(%rbp), %rdx
	callq	_dev_err
	movq	16(%r12), %rdi
	callq	_release_firmware
	movq	$0, 16(%r12)
	movq	8(%r12), %rdi
	callq	_release_firmware
	movq	$0, 8(%r12)
	movq	(%r12), %rdi
	callq	_release_firmware
	movq	$0, (%r12)
LBB0_9:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-40(%rbp), %rax
	jne	LBB0_11
## %bb.10:
	movl	%r14d, %eax
	addq	$48, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	movq	(%r12), %rax
	movq	(%rax), %rbx
	movl	4(%rbx), %edi
	callq	_le32_to_cpu
	movq	%rax, 32(%r12)
	movl	(%rbx), %edi
	callq	_le32_to_cpu
	movq	%rax, 24(%r12)
	movq	80(%r12), %rax
	movq	_AMDGPU_FW_LOAD_PSP@GOTPCREL(%rip), %rcx
	xorl	%r14d, %r14d
	cmpq	(%rcx), %rax
	jne	LBB0_9
## %bb.7:
	movq	96(%r12), %rax
	movq	_AMDGPU_UCODE_ID_CP_PFP@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, %rdx
	shlq	$4, %rdx
	movq	%rcx, (%rax,%rdx)
	movq	16(%r12), %rcx
	movq	%rcx, 8(%rax,%rdx)
	movq	(%rcx), %rax
	movl	(%rax), %edi
	callq	_le32_to_cpu
	movq	_PAGE_SIZE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%rax, %rdi
	callq	_ALIGN
	addl	%eax, 88(%r12)
	movq	96(%r12), %rax
	movq	_AMDGPU_UCODE_ID_CP_ME@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, %rdx
	shlq	$4, %rdx
	movq	%rcx, (%rax,%rdx)
	movq	8(%r12), %rcx
	movq	%rcx, 8(%rax,%rdx)
	movq	(%rcx), %rax
	movl	(%rax), %edi
	callq	_le32_to_cpu
	movl	(%rbx), %esi
	movq	%rax, %rdi
	callq	_ALIGN
	addl	%eax, 88(%r12)
	movq	96(%r12), %rax
	movq	_AMDGPU_UCODE_ID_CP_CE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, %rdx
	shlq	$4, %rdx
	movq	%rcx, (%rax,%rdx)
	movq	(%r12), %rcx
	movq	%rcx, 8(%rax,%rdx)
	movq	(%rcx), %rax
	movl	(%rax), %edi
	callq	_le32_to_cpu
	movl	(%rbx), %esi
	movq	%rax, %rdi
	callq	_ALIGN
	addl	%eax, 88(%r12)
	jmp	LBB0_9
LBB0_11:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"amdgpu/%s_pfp.bin"

L_.str.1:                               ## @.str.1
	.asciz	"amdgpu/%s_me.bin"

L_.str.2:                               ## @.str.2
	.asciz	"amdgpu/%s_ce.bin"

	.comm	_AMDGPU_FW_LOAD_PSP,8,3         ## @AMDGPU_FW_LOAD_PSP
	.comm	_AMDGPU_UCODE_ID_CP_PFP,8,3     ## @AMDGPU_UCODE_ID_CP_PFP
	.comm	_PAGE_SIZE,4,2                  ## @PAGE_SIZE
	.comm	_AMDGPU_UCODE_ID_CP_ME,8,3      ## @AMDGPU_UCODE_ID_CP_ME
	.comm	_AMDGPU_UCODE_ID_CP_CE,8,3      ## @AMDGPU_UCODE_ID_CP_CE
L_.str.3:                               ## @.str.3
	.asciz	"gfx9: Failed to load firmware \"%s\"\n"

	.no_dead_strip	_gfx_v9_0_init_cp_gfx_microcode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gfx_v9_0_init_cp_gfx_microcode
_gfx_v9_0_init_cp_gfx_microcode:        ; @gfx_v9_0_init_cp_gfx_microcode
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #40]
Lloh3:
	adrp	x2, l_.str@PAGE
Lloh4:
	add	x2, x2, l_.str@PAGEOFF
	add	x0, sp, #10
	mov	w1, #30
	mov	x3, x20
	bl	_snprintf
	add	x22, x19, #16
	ldr	w2, [x19, #72]
	add	x1, sp, #10
	mov	x0, x22
	bl	_request_firmware
	mov	x21, x0
	cbnz	w0, LBB0_6
; %bb.1:
	ldr	x0, [x22]
	bl	_amdgpu_ucode_validate
	mov	x21, x0
	cbnz	w0, LBB0_6
; %bb.2:
	ldr	x8, [x19, #16]
	ldr	x21, [x8]
	ldr	w0, [x21, #4]
	bl	_le32_to_cpu
	str	x0, [x19, #64]
	ldr	w0, [x21]
	bl	_le32_to_cpu
	str	x0, [x19, #56]
Lloh5:
	adrp	x2, l_.str.1@PAGE
Lloh6:
	add	x2, x2, l_.str.1@PAGEOFF
	add	x0, sp, #10
	mov	w1, #30
	mov	x3, x20
	bl	_snprintf
	add	x22, x19, #8
	ldr	w2, [x19, #72]
	add	x1, sp, #10
	mov	x0, x22
	bl	_request_firmware
	mov	x21, x0
	cbnz	w0, LBB0_6
; %bb.3:
	ldr	x0, [x22]
	bl	_amdgpu_ucode_validate
	mov	x21, x0
	cbnz	w0, LBB0_6
; %bb.4:
	ldr	x8, [x19, #8]
	ldr	x21, [x8]
	ldr	w0, [x21, #4]
	bl	_le32_to_cpu
	str	x0, [x19, #48]
	ldr	w0, [x21]
	bl	_le32_to_cpu
	str	x0, [x19, #40]
Lloh7:
	adrp	x2, l_.str.2@PAGE
Lloh8:
	add	x2, x2, l_.str.2@PAGEOFF
	add	x0, sp, #10
	mov	w1, #30
	mov	x3, x20
	bl	_snprintf
	ldr	w2, [x19, #72]
	add	x1, sp, #10
	mov	x0, x19
	bl	_request_firmware
	mov	x21, x0
	cbnz	w0, LBB0_6
; %bb.5:
	ldr	x0, [x19]
	bl	_amdgpu_ucode_validate
	mov	x21, x0
	cbz	w0, LBB0_9
LBB0_6:
	ldr	w0, [x19, #72]
Lloh9:
	adrp	x1, l_.str.3@PAGE
Lloh10:
	add	x1, x1, l_.str.3@PAGEOFF
	add	x2, sp, #10
	bl	_dev_err
	ldr	x0, [x19, #16]
	bl	_release_firmware
	str	xzr, [x19, #16]
	ldr	x0, [x19, #8]
	bl	_release_firmware
	str	xzr, [x19, #8]
	ldr	x0, [x19]
	bl	_release_firmware
	str	xzr, [x19]
LBB0_7:
	ldr	x8, [sp, #40]
Lloh11:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh12:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh13:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_12
; %bb.8:
	mov	x0, x21
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_9:
	ldr	x8, [x19]
	ldr	x20, [x8]
	ldr	w0, [x20, #4]
	bl	_le32_to_cpu
	str	x0, [x19, #32]
	ldr	w0, [x20]
	bl	_le32_to_cpu
	str	x0, [x19, #24]
	ldr	x8, [x19, #80]
Lloh14:
	adrp	x9, _AMDGPU_FW_LOAD_PSP@GOTPAGE
Lloh15:
	ldr	x9, [x9, _AMDGPU_FW_LOAD_PSP@GOTPAGEOFF]
Lloh16:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_11
; %bb.10:
	ldr	x8, [x19, #96]
Lloh17:
	adrp	x9, _AMDGPU_UCODE_ID_CP_PFP@GOTPAGE
Lloh18:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_CP_PFP@GOTPAGEOFF]
Lloh19:
	ldr	x9, [x9]
	add	x8, x8, x9, lsl #4
	str	x9, [x8]
	ldr	x9, [x19, #16]
	str	x9, [x8, #8]
	ldr	x8, [x9]
	ldr	w0, [x8]
	bl	_le32_to_cpu
Lloh20:
	adrp	x20, _PAGE_SIZE@GOTPAGE
Lloh21:
	ldr	x20, [x20, _PAGE_SIZE@GOTPAGEOFF]
	ldr	w1, [x20]
	bl	_ALIGN
	ldr	w8, [x19, #88]
	add	w8, w8, w0
	str	w8, [x19, #88]
	ldr	x8, [x19, #96]
Lloh22:
	adrp	x9, _AMDGPU_UCODE_ID_CP_ME@GOTPAGE
Lloh23:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_CP_ME@GOTPAGEOFF]
Lloh24:
	ldr	x9, [x9]
	add	x8, x8, x9, lsl #4
	str	x9, [x8]
	ldr	x9, [x19, #8]
	str	x9, [x8, #8]
	ldr	x8, [x9]
	ldr	w0, [x8]
	bl	_le32_to_cpu
	ldr	w1, [x20]
	bl	_ALIGN
	ldr	w8, [x19, #88]
	add	w8, w8, w0
	str	w8, [x19, #88]
	ldr	x8, [x19, #96]
Lloh25:
	adrp	x9, _AMDGPU_UCODE_ID_CP_CE@GOTPAGE
Lloh26:
	ldr	x9, [x9, _AMDGPU_UCODE_ID_CP_CE@GOTPAGEOFF]
Lloh27:
	ldr	x9, [x9]
	add	x8, x8, x9, lsl #4
	str	x9, [x8]
	ldr	x9, [x19]
	str	x9, [x8, #8]
	ldr	x8, [x9]
	ldr	w0, [x8]
	bl	_le32_to_cpu
	ldr	w1, [x20]
	bl	_ALIGN
	mov	w21, #0
	ldr	w8, [x19, #88]
	add	w8, w8, w0
	str	w8, [x19, #88]
	b	LBB0_7
LBB0_11:
	mov	w21, #0
	b	LBB0_7
LBB0_12:
	bl	___stack_chk_fail
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"amdgpu/%s_pfp.bin"

l_.str.1:                               ; @.str.1
	.asciz	"amdgpu/%s_me.bin"

l_.str.2:                               ; @.str.2
	.asciz	"amdgpu/%s_ce.bin"

	.comm	_AMDGPU_FW_LOAD_PSP,8,3         ; @AMDGPU_FW_LOAD_PSP
	.comm	_AMDGPU_UCODE_ID_CP_PFP,8,3     ; @AMDGPU_UCODE_ID_CP_PFP
	.comm	_PAGE_SIZE,4,2                  ; @PAGE_SIZE
	.comm	_AMDGPU_UCODE_ID_CP_ME,8,3      ; @AMDGPU_UCODE_ID_CP_ME
	.comm	_AMDGPU_UCODE_ID_CP_CE,8,3      ; @AMDGPU_UCODE_ID_CP_CE
l_.str.3:                               ; @.str.3
	.asciz	"gfx9: Failed to load firmware \"%s\"\n"

	.no_dead_strip	_gfx_v9_0_init_cp_gfx_microcode
.subsections_via_symbols
