	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nct7904_write_temp
_nct7904_write_temp:                    ## @nct7904_write_temp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rcx, %r12
	movl	%edx, %r15d
	movl	%esi, %ebx
	callq	_dev_get_drvdata
	movq	%rax, %r14
	movabsq	$2361183241434822607, %rcx      ## imm = 0x20C49BA5E353F7CF
	movq	%r12, %rax
	imulq	%rcx
	movq	%rdx, %rdi
	shrq	$63, %rdi
	sarq	$7, %rdx
	addq	%rdx, %rdi
	movl	$-128, %esi
	movl	$127, %edx
	callq	_clamp_val
	addl	$-128, %ebx
	cmpl	$4, %ebx
	jae	LBB0_7
## %bb.1:
	movslq	%ebx, %rcx
	cmpl	$4, %r15d
	jne	LBB0_3
## %bb.2:
	leaq	l_switch.table.nct7904_write_temp(%rip), %rdx
	movq	(%rdx,%rcx,8), %rcx
	movl	(%rcx), %edx
	movq	_BANK_1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	jmp	LBB0_5
LBB0_7:
	movq	_EOPNOTSUPP@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movq	_BANK_1@GOTPCREL(%rip), %rdx
	movl	(%rdx), %esi
	jg	LBB0_6
## %bb.4:
	leaq	l_switch.table.nct7904_write_temp.1(%rip), %rdx
	movq	(%rdx,%rcx,8), %rcx
	movl	(%rcx), %ecx
	leal	(%rcx,%r15,8), %edx
	jmp	LBB0_5
LBB0_6:
	leaq	l_switch.table.nct7904_write_temp.2(%rip), %rdx
	movq	(%rdx,%rcx,8), %rcx
	movl	(%rcx), %ecx
	leal	(%rcx,%r15,4), %edx
	addl	$-20, %edx
LBB0_5:
	movq	%r14, %rdi
	movq	%rax, %rcx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_nct7904_write_reg              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_LTD_HV_LL_REG,4,2              ## @LTD_HV_LL_REG
	.comm	_TEMP_CH1_W_REG,4,2             ## @TEMP_CH1_W_REG
	.comm	_DTS_T_CPU1_W_REG,4,2           ## @DTS_T_CPU1_W_REG
	.comm	_LTD_LV_LL_REG,4,2              ## @LTD_LV_LL_REG
	.comm	_TEMP_CH1_WH_REG,4,2            ## @TEMP_CH1_WH_REG
	.comm	_DTS_T_CPU1_WH_REG,4,2          ## @DTS_T_CPU1_WH_REG
	.comm	_LTD_HV_HL_REG,4,2              ## @LTD_HV_HL_REG
	.comm	_TEMP_CH1_C_REG,4,2             ## @TEMP_CH1_C_REG
	.comm	_DTS_T_CPU1_C_REG,4,2           ## @DTS_T_CPU1_C_REG
	.comm	_LTD_LV_HL_REG,4,2              ## @LTD_LV_HL_REG
	.comm	_TEMP_CH1_CH_REG,4,2            ## @TEMP_CH1_CH_REG
	.comm	_DTS_T_CPU1_CH_REG,4,2          ## @DTS_T_CPU1_CH_REG
	.comm	_EOPNOTSUPP,4,2                 ## @EOPNOTSUPP
	.comm	_BANK_1,4,2                     ## @BANK_1
	.no_dead_strip	_nct7904_write_temp
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.nct7904_write_temp
l_switch.table.nct7904_write_temp:
	.quad	_LTD_LV_LL_REG
	.quad	_LTD_HV_LL_REG
	.quad	_LTD_LV_HL_REG
	.quad	_LTD_HV_HL_REG

	.p2align	3                               ## @switch.table.nct7904_write_temp.1
l_switch.table.nct7904_write_temp.1:
	.quad	_TEMP_CH1_WH_REG
	.quad	_TEMP_CH1_W_REG
	.quad	_TEMP_CH1_CH_REG
	.quad	_TEMP_CH1_C_REG

	.p2align	3                               ## @switch.table.nct7904_write_temp.2
l_switch.table.nct7904_write_temp.2:
	.quad	_DTS_T_CPU1_WH_REG
	.quad	_DTS_T_CPU1_W_REG
	.quad	_DTS_T_CPU1_CH_REG
	.quad	_DTS_T_CPU1_C_REG

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nct7904_write_temp
_nct7904_write_temp:                    ; @nct7904_write_temp
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x3
	mov	x20, x2
	mov	x22, x1
	bl	_dev_get_drvdata
	mov	x19, x0
	mov	x8, #63439
	movk	x8, #58195, lsl #16
	movk	x8, #39845, lsl #32
	movk	x8, #8388, lsl #48
	smulh	x8, x21, x8
	asr	x9, x8, #7
	add	x0, x9, x8, lsr #63
	mov	w1, #-128
	mov	w2, #127
	bl	_clamp_val
	sub	w8, w22, #128
	cmp	w8, #4
	b.hs	LBB0_3
; %bb.1:
	mov	x3, x0
	cmp	w20, #4
	b.ne	LBB0_4
; %bb.2:
	sxtw	x8, w8
Lloh0:
	adrp	x9, l_switch.table.nct7904_write_temp@PAGE
Lloh1:
	add	x9, x9, l_switch.table.nct7904_write_temp@PAGEOFF
	ldr	x8, [x9, x8, lsl #3]
Lloh2:
	adrp	x9, _BANK_1@GOTPAGE
Lloh3:
	ldr	x9, [x9, _BANK_1@GOTPAGEOFF]
	ldr	w2, [x8]
Lloh4:
	ldr	w1, [x9]
	b	LBB0_7
LBB0_3:
Lloh5:
	adrp	x8, _EOPNOTSUPP@GOTPAGE
Lloh6:
	ldr	x8, [x8, _EOPNOTSUPP@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	neg	w0, w8
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_4:
	sbfiz	x8, x8, #3, #32
Lloh8:
	adrp	x9, _BANK_1@GOTPAGE
Lloh9:
	ldr	x9, [x9, _BANK_1@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x9]
	cmp	w20, #4
	b.gt	LBB0_6
; %bb.5:
Lloh11:
	adrp	x9, l_switch.table.nct7904_write_temp.1@PAGE
Lloh12:
	add	x9, x9, l_switch.table.nct7904_write_temp.1@PAGEOFF
	ldr	x8, [x9, x8]
	ldr	w8, [x8]
	add	w2, w8, w20, lsl #3
	b	LBB0_7
LBB0_6:
Lloh13:
	adrp	x9, l_switch.table.nct7904_write_temp.2@PAGE
Lloh14:
	add	x9, x9, l_switch.table.nct7904_write_temp.2@PAGEOFF
	ldr	x8, [x9, x8]
	ldr	w8, [x8]
	add	w8, w8, w20, lsl #2
	sub	w2, w8, #20
LBB0_7:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_nct7904_write_reg
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_LTD_HV_LL_REG,4,2              ; @LTD_HV_LL_REG
	.comm	_TEMP_CH1_W_REG,4,2             ; @TEMP_CH1_W_REG
	.comm	_DTS_T_CPU1_W_REG,4,2           ; @DTS_T_CPU1_W_REG
	.comm	_LTD_LV_LL_REG,4,2              ; @LTD_LV_LL_REG
	.comm	_TEMP_CH1_WH_REG,4,2            ; @TEMP_CH1_WH_REG
	.comm	_DTS_T_CPU1_WH_REG,4,2          ; @DTS_T_CPU1_WH_REG
	.comm	_LTD_HV_HL_REG,4,2              ; @LTD_HV_HL_REG
	.comm	_TEMP_CH1_C_REG,4,2             ; @TEMP_CH1_C_REG
	.comm	_DTS_T_CPU1_C_REG,4,2           ; @DTS_T_CPU1_C_REG
	.comm	_LTD_LV_HL_REG,4,2              ; @LTD_LV_HL_REG
	.comm	_TEMP_CH1_CH_REG,4,2            ; @TEMP_CH1_CH_REG
	.comm	_DTS_T_CPU1_CH_REG,4,2          ; @DTS_T_CPU1_CH_REG
	.comm	_EOPNOTSUPP,4,2                 ; @EOPNOTSUPP
	.comm	_BANK_1,4,2                     ; @BANK_1
	.no_dead_strip	_nct7904_write_temp
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.nct7904_write_temp
l_switch.table.nct7904_write_temp:
	.quad	_LTD_LV_LL_REG
	.quad	_LTD_HV_LL_REG
	.quad	_LTD_LV_HL_REG
	.quad	_LTD_HV_HL_REG

	.p2align	3                               ; @switch.table.nct7904_write_temp.1
l_switch.table.nct7904_write_temp.1:
	.quad	_TEMP_CH1_WH_REG
	.quad	_TEMP_CH1_W_REG
	.quad	_TEMP_CH1_CH_REG
	.quad	_TEMP_CH1_C_REG

	.p2align	3                               ; @switch.table.nct7904_write_temp.2
l_switch.table.nct7904_write_temp.2:
	.quad	_DTS_T_CPU1_WH_REG
	.quad	_DTS_T_CPU1_W_REG
	.quad	_DTS_T_CPU1_CH_REG
	.quad	_DTS_T_CPU1_C_REG

.subsections_via_symbols
