	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function analogix_dp_get_adjust_training_lane
_analogix_dp_get_adjust_training_lane:  ## @analogix_dp_get_adjust_training_lane
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	movl	(%rdi), %eax
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	testl	%eax, %eax
	jle	LBB0_7
## %bb.1:
	movq	%rsi, %r15
	xorl	%ebx, %ebx
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	orq	%rcx, %rax
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movq	8(%rcx), %rcx
	movq	%rax, (%rcx,%rbx,8)
	incq	%rbx
	cmpq	%rbx, -48(%rbp)                 ## 8-byte Folded Reload
	je	LBB0_7
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_analogix_dp_get_adjust_request_voltage
	movq	%rax, %r13
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_analogix_dp_get_adjust_request_pre_emphasis
	movq	%rax, %r12
	movq	%r13, %rdi
	callq	_DPCD_VOLTAGE_SWING_SET
	movq	%rax, %r14
	movq	%r12, %rdi
	callq	_DPCD_PRE_EMPHASIS_SET
	orq	%r14, %rax
	movl	$0, %ecx
	movq	_VOLTAGE_LEVEL_3@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %r13
	jne	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_DP_TRAIN_MAX_SWING_REACHED@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	orq	%rcx, %rax
	movl	$0, %ecx
	movq	_PRE_EMPHASIS_LEVEL_3@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %r12
	jne	LBB0_6
## %bb.5:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	_DP_TRAIN_MAX_PRE_EMPHASIS_REACHED@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	jmp	LBB0_6
LBB0_7:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VOLTAGE_LEVEL_3,8,3            ## @VOLTAGE_LEVEL_3
	.comm	_DP_TRAIN_MAX_SWING_REACHED,8,3 ## @DP_TRAIN_MAX_SWING_REACHED
	.comm	_PRE_EMPHASIS_LEVEL_3,8,3       ## @PRE_EMPHASIS_LEVEL_3
	.comm	_DP_TRAIN_MAX_PRE_EMPHASIS_REACHED,8,3 ## @DP_TRAIN_MAX_PRE_EMPHASIS_REACHED
	.no_dead_strip	_analogix_dp_get_adjust_training_lane
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function analogix_dp_get_adjust_training_lane
_analogix_dp_get_adjust_training_lane:  ; @analogix_dp_get_adjust_training_lane
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	ldr	w25, [x0]
	cmp	w25, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x19, x1
	mov	x20, x0
	mov	x21, #0
Lloh0:
	adrp	x27, _DP_TRAIN_MAX_SWING_REACHED@GOTPAGE
Lloh1:
	ldr	x27, [x27, _DP_TRAIN_MAX_SWING_REACHED@GOTPAGEOFF]
Lloh2:
	adrp	x28, _PRE_EMPHASIS_LEVEL_3@GOTPAGE
Lloh3:
	ldr	x28, [x28, _PRE_EMPHASIS_LEVEL_3@GOTPAGEOFF]
Lloh4:
	adrp	x26, _DP_TRAIN_MAX_PRE_EMPHASIS_REACHED@GOTPAGE
Lloh5:
	ldr	x26, [x26, _DP_TRAIN_MAX_PRE_EMPHASIS_REACHED@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x21
	bl	_analogix_dp_get_adjust_request_voltage
	mov	x22, x0
	mov	x0, x19
	mov	x1, x21
	bl	_analogix_dp_get_adjust_request_pre_emphasis
	mov	x23, x0
	mov	x0, x22
	bl	_DPCD_VOLTAGE_SWING_SET
	mov	x24, x0
	mov	x0, x23
	bl	_DPCD_PRE_EMPHASIS_SET
	orr	x8, x0, x24
Lloh6:
	adrp	x9, _VOLTAGE_LEVEL_3@GOTPAGE
Lloh7:
	ldr	x9, [x9, _VOLTAGE_LEVEL_3@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	ldr	x10, [x27]
	cmp	x22, x9
	csel	x9, x10, xzr, eq
	orr	x8, x8, x9
	ldr	x9, [x28]
	ldr	x10, [x26]
	cmp	x23, x9
	csel	x9, x10, xzr, eq
	orr	x8, x8, x9
	ldr	x9, [x20, #8]
	str	x8, [x9, x21, lsl #3]
	add	x21, x21, #1
	cmp	x25, x21
	b.ne	LBB0_2
LBB0_3:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_VOLTAGE_LEVEL_3,8,3            ; @VOLTAGE_LEVEL_3
	.comm	_DP_TRAIN_MAX_SWING_REACHED,8,3 ; @DP_TRAIN_MAX_SWING_REACHED
	.comm	_PRE_EMPHASIS_LEVEL_3,8,3       ; @PRE_EMPHASIS_LEVEL_3
	.comm	_DP_TRAIN_MAX_PRE_EMPHASIS_REACHED,8,3 ; @DP_TRAIN_MAX_PRE_EMPHASIS_REACHED
	.no_dead_strip	_analogix_dp_get_adjust_training_lane
.subsections_via_symbols
