	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_v8_0_program_fmt
_dce_v8_0_program_fmt:                  ## @dce_v8_0_program_fmt
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_to_amdgpu_encoder
	movq	%rax, %r12
	movl	(%rbx), %edi
	callq	_to_amdgpu_crtc
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_amdgpu_get_connector_for_encoder
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_to_amdgpu_connector
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	_amdgpu_connector_get_monitor_bpc
                                        ## kill: def $eax killed $eax def $rax
	jmp	LBB0_3
LBB0_1:
	xorl	%eax, %eax
	movq	_AMDGPU_FMT_DITHER_DISABLE@GOTPCREL(%rip), %r15
LBB0_3:
	movq	_ATOM_DEVICE_LCD_SUPPORT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%r12)
	je	LBB0_4
LBB0_20:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	movq	8(%r12), %rcx
	movq	_ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	je	LBB0_20
## %bb.5:
	movq	_ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	je	LBB0_20
## %bb.6:
	rorl	%eax
	xorl	%esi, %esi
	cmpl	$5, %eax
	ja	LBB0_19
## %bb.7:
	movl	(%r15), %ecx
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%rax,4), %rax
	addq	%rdx, %rax
	jmpq	*%rax
LBB0_8:
	movq	_AMDGPU_FMT_DITHER_ENABLE@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ecx
	jne	LBB0_10
## %bb.9:
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rax
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPCREL(%rip), %rax
	jmp	LBB0_18
LBB0_11:
	movq	_AMDGPU_FMT_DITHER_ENABLE@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ecx
	jne	LBB0_13
## %bb.12:
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rax
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH__SHIFT@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_15:
	movq	_AMDGPU_FMT_DITHER_ENABLE@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ecx
	jne	LBB0_17
## %bb.16:
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rax
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$2, %esi
	shll	%cl, %esi
	orl	%edx, %esi
	jmp	LBB0_19
LBB0_10:
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	jmp	LBB0_19
LBB0_13:
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH__SHIFT@GOTPCREL(%rip), %rax
LBB0_14:
	movb	(%rax), %al
	btsl	%eax, %esi
	jmp	LBB0_19
LBB0_17:
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH__SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$2, %esi
	shll	%cl, %esi
	movq	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPCREL(%rip), %rax
LBB0_18:
	orl	(%rax), %esi
LBB0_19:
	movq	_mmFMT_BIT_DEPTH_CONTROL@GOTPCREL(%rip), %rax
	movq	(%r14), %rdi
	addq	(%rax), %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_20, LBB0_20-LJTI0_0
.set L0_0_set_19, LBB0_19-LJTI0_0
.set L0_0_set_8, LBB0_8-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
LJTI0_0:
	.long	L0_0_set_20
	.long	L0_0_set_19
	.long	L0_0_set_19
	.long	L0_0_set_8
	.long	L0_0_set_11
	.long	L0_0_set_15
	.end_data_region
                                        ## -- End function
	.comm	_AMDGPU_FMT_DITHER_DISABLE,4,2  ## @AMDGPU_FMT_DITHER_DISABLE
	.comm	_ATOM_DEVICE_LCD_SUPPORT,4,2    ## @ATOM_DEVICE_LCD_SUPPORT
	.comm	_ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1,8,3 ## @ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1
	.comm	_ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2,8,3 ## @ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2
	.comm	_AMDGPU_FMT_DITHER_ENABLE,4,2   ## @AMDGPU_FMT_DITHER_ENABLE
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH__SHIFT,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH__SHIFT
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH__SHIFT,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH__SHIFT
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK,4,2 ## @FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK
	.comm	_mmFMT_BIT_DEPTH_CONTROL,8,3    ## @mmFMT_BIT_DEPTH_CONTROL
	.no_dead_strip	_dce_v8_0_program_fmt
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_v8_0_program_fmt
_dce_v8_0_program_fmt:                  ; @dce_v8_0_program_fmt
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x0
	bl	_to_amdgpu_encoder
	mov	x20, x0
	ldr	w0, [x21]
	bl	_to_amdgpu_crtc
	mov	x19, x0
	mov	x0, x21
	bl	_amdgpu_get_connector_for_encoder
	cbz	x0, LBB0_2
; %bb.1:
	mov	x22, x0
	bl	_to_amdgpu_connector
	mov	x21, x0
	mov	x0, x22
	bl	_amdgpu_connector_get_monitor_bpc
	b	LBB0_3
LBB0_2:
Lloh0:
	adrp	x21, _AMDGPU_FMT_DITHER_DISABLE@GOTPAGE
Lloh1:
	ldr	x21, [x21, _AMDGPU_FMT_DITHER_DISABLE@GOTPAGEOFF]
LBB0_3:
	ldr	w8, [x20]
Lloh2:
	adrp	x9, _ATOM_DEVICE_LCD_SUPPORT@GOTPAGE
Lloh3:
	ldr	x9, [x9, _ATOM_DEVICE_LCD_SUPPORT@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_5
; %bb.4:
	ldr	x8, [x20, #8]
Lloh5:
	adrp	x9, _ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1@GOTPAGE
Lloh6:
	ldr	x9, [x9, _ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
Lloh8:
	adrp	x10, _ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2@GOTPAGE
Lloh9:
	ldr	x10, [x10, _ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2@GOTPAGEOFF]
Lloh10:
	ldr	x10, [x10]
	cmp	x8, x9
	ccmp	x8, x10, #4, ne
	b.ne	LBB0_6
LBB0_5:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_6:
	mov	w1, #0
	ror	w9, w0, #1
	cmp	w9, #5
	b.hi	LBB0_19
; %bb.7:
	ldr	w8, [x21]
Lloh11:
	adrp	x10, lJTI0_0@PAGE
Lloh12:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_5
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_8:
Lloh13:
	adrp	x9, _AMDGPU_FMT_DITHER_ENABLE@GOTPAGE
Lloh14:
	ldr	x9, [x9, _AMDGPU_FMT_DITHER_ENABLE@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_15
; %bb.9:
Lloh16:
	adrp	x8, _FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPAGE
Lloh17:
	ldr	x8, [x8, _FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
Lloh19:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPAGE
Lloh20:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh22:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPAGE
Lloh23:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	orr	w1, w8, w9
	b	LBB0_19
LBB0_10:
Lloh25:
	adrp	x9, _AMDGPU_FMT_DITHER_ENABLE@GOTPAGE
Lloh26:
	ldr	x9, [x9, _AMDGPU_FMT_DITHER_ENABLE@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_16
; %bb.11:
Lloh28:
	adrp	x8, _FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPAGE
Lloh29:
	ldr	x8, [x8, _FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
Lloh31:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPAGE
Lloh32:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh34:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK@GOTPAGE
Lloh35:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh37:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPAGE
Lloh38:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPAGEOFF]
Lloh39:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh40:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH__SHIFT@GOTPAGE
Lloh41:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH__SHIFT@GOTPAGEOFF]
Lloh42:
	ldr	w9, [x9]
	mov	w10, #1
	b	LBB0_14
LBB0_12:
Lloh43:
	adrp	x9, _AMDGPU_FMT_DITHER_ENABLE@GOTPAGE
Lloh44:
	ldr	x9, [x9, _AMDGPU_FMT_DITHER_ENABLE@GOTPAGEOFF]
Lloh45:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_17
; %bb.13:
Lloh46:
	adrp	x8, _FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPAGE
Lloh47:
	ldr	x8, [x8, _FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh48:
	ldr	w8, [x8]
Lloh49:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPAGE
Lloh50:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh51:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh52:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK@GOTPAGE
Lloh53:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK@GOTPAGEOFF]
Lloh54:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh55:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPAGE
Lloh56:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK@GOTPAGEOFF]
Lloh57:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh58:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH__SHIFT@GOTPAGE
Lloh59:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH__SHIFT@GOTPAGEOFF]
Lloh60:
	ldr	w9, [x9]
	mov	w10, #2
LBB0_14:
	lsl	w9, w10, w9
	orr	w1, w8, w9
	b	LBB0_19
LBB0_15:
Lloh61:
	adrp	x8, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPAGE
Lloh62:
	ldr	x8, [x8, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPAGEOFF]
Lloh63:
	ldr	w1, [x8]
	b	LBB0_19
LBB0_16:
Lloh64:
	adrp	x8, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPAGE
Lloh65:
	ldr	x8, [x8, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPAGEOFF]
Lloh66:
	ldr	w8, [x8]
Lloh67:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH__SHIFT@GOTPAGE
Lloh68:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH__SHIFT@GOTPAGEOFF]
Lloh69:
	ldr	w9, [x9]
	mov	w10, #1
	b	LBB0_18
LBB0_17:
Lloh70:
	adrp	x8, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPAGE
Lloh71:
	ldr	x8, [x8, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK@GOTPAGEOFF]
Lloh72:
	ldr	w8, [x8]
Lloh73:
	adrp	x9, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH__SHIFT@GOTPAGE
Lloh74:
	ldr	x9, [x9, _FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH__SHIFT@GOTPAGEOFF]
Lloh75:
	ldr	w9, [x9]
	mov	w10, #2
LBB0_18:
	lsl	w9, w10, w9
	orr	w1, w9, w8
LBB0_19:
Lloh76:
	adrp	x8, _mmFMT_BIT_DEPTH_CONTROL@GOTPAGE
Lloh77:
	ldr	x8, [x8, _mmFMT_BIT_DEPTH_CONTROL@GOTPAGEOFF]
Lloh78:
	ldr	x8, [x8]
	ldr	x9, [x19]
	add	x0, x9, x8
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_5-LBB0_5)>>2
	.byte	(LBB0_19-LBB0_5)>>2
	.byte	(LBB0_19-LBB0_5)>>2
	.byte	(LBB0_8-LBB0_5)>>2
	.byte	(LBB0_10-LBB0_5)>>2
	.byte	(LBB0_12-LBB0_5)>>2
                                        ; -- End function
	.comm	_AMDGPU_FMT_DITHER_DISABLE,4,2  ; @AMDGPU_FMT_DITHER_DISABLE
	.comm	_ATOM_DEVICE_LCD_SUPPORT,4,2    ; @ATOM_DEVICE_LCD_SUPPORT
	.comm	_ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1,8,3 ; @ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1
	.comm	_ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2,8,3 ; @ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2
	.comm	_AMDGPU_FMT_DITHER_ENABLE,4,2   ; @AMDGPU_FMT_DITHER_ENABLE
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_FRAME_RANDOM_ENABLE_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_HIGHPASS_RANDOM_ENABLE_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_EN_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH__SHIFT,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_SPATIAL_DITHER_DEPTH__SHIFT
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_EN_MASK
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH__SHIFT,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_TRUNCATE_DEPTH__SHIFT
	.comm	_FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK,4,2 ; @FMT_BIT_DEPTH_CONTROL__FMT_RGB_RANDOM_ENABLE_MASK
	.comm	_mmFMT_BIT_DEPTH_CONTROL,8,3    ; @mmFMT_BIT_DEPTH_CONTROL
	.no_dead_strip	_dce_v8_0_program_fmt
.subsections_via_symbols
