	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_gt_reset                 ## -- Begin function intel_gt_reset
	.p2align	4, 0x90
_intel_gt_reset:                        ## @intel_gt_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movl	%esi, %r15d
	movq	%rdi, %rbx
	leaq	4(%rdi), %r12
	movl	4(%rdi), %esi
	leaq	L_.str(%rip), %rdi
	callq	_GEM_TRACE
	xorl	%eax, %eax
	callq	_might_sleep
	movq	_I915_RESET_BACKOFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%r12, %rsi
	callq	_test_bit
	xorl	%edi, %edi
	testl	%eax, %eax
	sete	%dil
	callq	_GEM_BUG_ON
	movq	%rbx, %rdi
	callq	_mutex_lock
	movq	%rbx, %rdi
	callq	___intel_gt_unset_wedged
	testl	%eax, %eax
	je	LBB0_20
## %bb.1:
	testq	%r14, %r14
	je	LBB0_3
## %bb.2:
	movq	8(%rbx), %rax
	movl	(%rax), %edi
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdx
	callq	_dev_notice
LBB0_3:
	movq	8(%rbx), %rdi
	addq	$4, %rdi
	callq	_atomic_inc
	movq	%rbx, %rdi
	callq	_reset_prepare
	movl	%eax, %r14d
	movq	8(%rbx), %rdi
	callq	_intel_has_gpu_reset
	testl	%eax, %eax
	je	LBB0_4
## %bb.7:
	movq	8(%rbx), %rdi
	callq	_INTEL_INFO
	cmpq	$0, (%rax)
	je	LBB0_9
## %bb.8:
	movq	8(%rbx), %rdi
	callq	_intel_runtime_pm_disable_interrupts
LBB0_9:
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_do_reset
	movq	8(%rbx), %rdi
	testq	%rax, %rax
	je	LBB0_13
## %bb.10:
	movl	(%rdi), %edi
	leaq	L_.str.4(%rip), %rsi
	callq	_dev_err
	jmp	LBB0_11
LBB0_4:
	movq	_i915_modparams@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_6
## %bb.5:
	movq	8(%rbx), %rax
	movl	(%rax), %edi
	leaq	L_.str.2(%rip), %rsi
	callq	_dev_err
	jmp	LBB0_12
LBB0_13:
	callq	_INTEL_INFO
	cmpq	$0, (%rax)
	je	LBB0_15
## %bb.14:
	movq	8(%rbx), %rdi
	callq	_intel_runtime_pm_enable_interrupts
LBB0_15:
	movq	8(%rbx), %rdi
	callq	_intel_overlay_reset
	movq	8(%rbx), %rdi
	callq	_i915_gem_init_hw
	testl	%eax, %eax
	je	LBB0_17
## %bb.16:
	leaq	L_.str.5(%rip), %rdi
	movl	%eax, %esi
	callq	_DRM_ERROR
	jmp	LBB0_11
LBB0_6:
	leaq	L_.str.3(%rip), %rdi
	callq	_DRM_DEBUG_DRIVER
	jmp	LBB0_12
LBB0_17:
	movq	%rbx, %rdi
	callq	_resume
	testl	%eax, %eax
	je	LBB0_18
LBB0_11:
	movq	_TAINT_WARN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_add_taint_for_CI
LBB0_12:
	movq	%rbx, %rdi
	callq	___intel_gt_set_wedged
LBB0_19:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_reset_finish
LBB0_20:
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mutex_unlock                   ## TAILCALL
LBB0_18:
	movq	%rbx, %rdi
	callq	_intel_gt_queue_hangcheck
	jmp	LBB0_19
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"flags=%lx\n"

	.comm	_I915_RESET_BACKOFF,4,2         ## @I915_RESET_BACKOFF
L_.str.1:                               ## @.str.1
	.asciz	"Resetting chip for %s\n"

	.comm	_i915_modparams,8,3             ## @i915_modparams
L_.str.2:                               ## @.str.2
	.asciz	"GPU reset not supported\n"

L_.str.3:                               ## @.str.3
	.asciz	"GPU reset disabled\n"

L_.str.4:                               ## @.str.4
	.asciz	"Failed to reset chip\n"

L_.str.5:                               ## @.str.5
	.asciz	"Failed to initialise HW following reset (%d)\n"

	.comm	_TAINT_WARN,4,2                 ## @TAINT_WARN
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_gt_reset                 ; -- Begin function intel_gt_reset
	.p2align	2
_intel_gt_reset:                        ; @intel_gt_reset
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	mov	x22, x0
	ldr	w1, [x22, #4]!
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_GEM_TRACE
	bl	_might_sleep
Lloh2:
	adrp	x8, _I915_RESET_BACKOFF@GOTPAGE
Lloh3:
	ldr	x8, [x8, _I915_RESET_BACKOFF@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	mov	x1, x22
	bl	_test_bit
	cmp	w0, #0
	cset	w0, eq
	bl	_GEM_BUG_ON
	mov	x0, x19
	bl	_mutex_lock
	mov	x0, x19
	bl	___intel_gt_unset_wedged
	cbz	w0, LBB0_19
; %bb.1:
	cbz	x20, LBB0_3
; %bb.2:
	ldr	x8, [x19, #8]
	ldr	w0, [x8]
Lloh5:
	adrp	x1, l_.str.1@PAGE
Lloh6:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x2, x20
	bl	_dev_notice
LBB0_3:
	ldr	x8, [x19, #8]
	add	x0, x8, #4
	bl	_atomic_inc
	mov	x0, x19
	bl	_reset_prepare
	mov	x20, x0
	ldr	x0, [x19, #8]
	bl	_intel_has_gpu_reset
	cbz	w0, LBB0_8
; %bb.4:
	ldr	x0, [x19, #8]
	bl	_INTEL_INFO
	ldr	x8, [x0]
	cbz	x8, LBB0_6
; %bb.5:
	ldr	x0, [x19, #8]
	bl	_intel_runtime_pm_disable_interrupts
LBB0_6:
	mov	x0, x19
	mov	x1, x21
	bl	_do_reset
	mov	x8, x0
	ldr	x0, [x19, #8]
	cbz	x8, LBB0_10
; %bb.7:
	ldr	w0, [x0]
Lloh7:
	adrp	x1, l_.str.4@PAGE
Lloh8:
	add	x1, x1, l_.str.4@PAGEOFF
	bl	_dev_err
	b	LBB0_16
LBB0_8:
Lloh9:
	adrp	x8, _i915_modparams@GOTPAGE
Lloh10:
	ldr	x8, [x8, _i915_modparams@GOTPAGEOFF]
Lloh11:
	ldr	x8, [x8]
	cbz	x8, LBB0_14
; %bb.9:
	ldr	x8, [x19, #8]
	ldr	w0, [x8]
Lloh12:
	adrp	x1, l_.str.2@PAGE
Lloh13:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_dev_err
	b	LBB0_17
LBB0_10:
	bl	_INTEL_INFO
	ldr	x8, [x0]
	cbz	x8, LBB0_12
; %bb.11:
	ldr	x0, [x19, #8]
	bl	_intel_runtime_pm_enable_interrupts
LBB0_12:
	ldr	x0, [x19, #8]
	bl	_intel_overlay_reset
	ldr	x0, [x19, #8]
	bl	_i915_gem_init_hw
	cbz	w0, LBB0_15
; %bb.13:
	mov	x1, x0
Lloh14:
	adrp	x0, l_.str.5@PAGE
Lloh15:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_DRM_ERROR
	b	LBB0_16
LBB0_14:
Lloh16:
	adrp	x0, l_.str.3@PAGE
Lloh17:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_DRM_DEBUG_DRIVER
	b	LBB0_17
LBB0_15:
	mov	x0, x19
	bl	_resume
	cbz	w0, LBB0_20
LBB0_16:
Lloh18:
	adrp	x8, _TAINT_WARN@GOTPAGE
Lloh19:
	ldr	x8, [x8, _TAINT_WARN@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	bl	_add_taint_for_CI
LBB0_17:
	mov	x0, x19
	bl	___intel_gt_set_wedged
LBB0_18:
	mov	x0, x19
	mov	x1, x20
	bl	_reset_finish
LBB0_19:
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_mutex_unlock
LBB0_20:
	mov	x0, x19
	bl	_intel_gt_queue_hangcheck
	b	LBB0_18
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"flags=%lx\n"

	.comm	_I915_RESET_BACKOFF,4,2         ; @I915_RESET_BACKOFF
l_.str.1:                               ; @.str.1
	.asciz	"Resetting chip for %s\n"

	.comm	_i915_modparams,8,3             ; @i915_modparams
l_.str.2:                               ; @.str.2
	.asciz	"GPU reset not supported\n"

l_.str.3:                               ; @.str.3
	.asciz	"GPU reset disabled\n"

l_.str.4:                               ; @.str.4
	.asciz	"Failed to reset chip\n"

l_.str.5:                               ; @.str.5
	.asciz	"Failed to initialise HW following reset (%d)\n"

	.comm	_TAINT_WARN,4,2                 ; @TAINT_WARN
.subsections_via_symbols
