	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_ras_init                ## -- Begin function amdgpu_ras_init
	.p2align	4, 0x90
_amdgpu_ras_init:                       ## @amdgpu_ras_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	callq	_amdgpu_ras_get_context
	xorl	%r14d, %r14d
	testq	%rax, %rax
	jne	LBB0_13
## %bb.1:
	movq	_AMDGPU_RAS_BLOCK_COUNT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	leal	32(,%rax,4), %edi
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movq	___GFP_ZERO@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	callq	_kmalloc
	testq	%rax, %rax
	je	LBB0_2
## %bb.3:
	movq	%rax, %rbx
	addq	$32, %rax
	movq	%rax, 24(%rbx)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_amdgpu_ras_set_context
	leaq	4(%rbx), %rsi
	movq	%r15, %rdi
	movq	%rbx, %rdx
	callq	_amdgpu_ras_check_supported
	cmpl	$0, 4(%rbx)
	je	LBB0_4
## %bb.5:
	movq	$0, 16(%rbx)
	movq	%rbx, %rdi
	addq	$12, %rdi
	callq	_INIT_LIST_HEAD
	movq	_RAS_DEFAULT_FLAGS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rbx)
	movq	%r15, %rdi
	callq	_amdgpu_ras_recovery_init
	testq	%rax, %rax
	jne	LBB0_11
## %bb.6:
	movq	_AMDGPU_RAS_BLOCK_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_amdgpu_ras_mask@GOTPCREL(%rip), %rcx
	andl	%eax, (%rcx)
	movq	%r15, %rdi
	callq	_amdgpu_ras_fs_init
	testq	%rax, %rax
	je	LBB0_7
## %bb.10:
	movq	%r15, %rdi
	callq	_amdgpu_ras_recovery_fini
LBB0_11:
	xorl	%r14d, %r14d
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ras_set_context
	movq	%rbx, %rdi
	callq	_kfree
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_12
LBB0_2:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
LBB0_12:
	subl	(%rax), %r14d
	jmp	LBB0_13
LBB0_4:
	xorl	%r14d, %r14d
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_amdgpu_ras_set_context
	movq	%rbx, %rdi
	callq	_kfree
LBB0_13:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_7:
	movq	(%r15), %rax
	movq	(%rax), %rax
	testq	%rax, %rax
	je	LBB0_9
## %bb.8:
	movq	%r15, %rdi
	callq	*%rax
LBB0_9:
	movl	(%rbx), %edx
	movl	4(%rbx), %esi
	leaq	L_.str(%rip), %rdi
	callq	_DRM_INFO
	jmp	LBB0_13
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_RAS_BLOCK_COUNT,4,2     ## @AMDGPU_RAS_BLOCK_COUNT
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	___GFP_ZERO,4,2                 ## @__GFP_ZERO
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_RAS_DEFAULT_FLAGS,4,2          ## @RAS_DEFAULT_FLAGS
	.comm	_AMDGPU_RAS_BLOCK_MASK,4,2      ## @AMDGPU_RAS_BLOCK_MASK
	.comm	_amdgpu_ras_mask,4,2            ## @amdgpu_ras_mask
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"RAS INFO: ras initialized successfully, hardware ability[%x] ras_mask[%x]\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amdgpu_ras_init                ; -- Begin function amdgpu_ras_init
	.p2align	2
_amdgpu_ras_init:                       ; @amdgpu_ras_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_amdgpu_ras_get_context
	cbz	x0, LBB0_2
LBB0_1:
	mov	w0, #0
	b	LBB0_10
LBB0_2:
Lloh0:
	adrp	x8, _AMDGPU_RAS_BLOCK_COUNT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMDGPU_RAS_BLOCK_COUNT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	lsl	w8, w8, #2
Lloh3:
	adrp	x9, _GFP_KERNEL@GOTPAGE
Lloh4:
	ldr	x9, [x9, _GFP_KERNEL@GOTPAGEOFF]
	add	w0, w8, #32
Lloh5:
	ldr	w8, [x9]
Lloh6:
	adrp	x9, ___GFP_ZERO@GOTPAGE
Lloh7:
	ldr	x9, [x9, ___GFP_ZERO@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_kmalloc
	cbz	x0, LBB0_8
; %bb.3:
	mov	x20, x0
	add	x8, x0, #32
	str	x8, [x0, #24]
	mov	x0, x19
	mov	x1, x20
	bl	_amdgpu_ras_set_context
	add	x1, x20, #4
	mov	x0, x19
	mov	x2, x20
	bl	_amdgpu_ras_check_supported
	ldr	w8, [x20, #4]
	cbz	w8, LBB0_11
; %bb.4:
	str	xzr, [x20, #16]
	add	x0, x20, #12
	bl	_INIT_LIST_HEAD
Lloh9:
	adrp	x8, _RAS_DEFAULT_FLAGS@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RAS_DEFAULT_FLAGS@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	str	w8, [x20, #8]
	mov	x0, x19
	bl	_amdgpu_ras_recovery_init
	cbnz	x0, LBB0_7
; %bb.5:
Lloh12:
	adrp	x8, _AMDGPU_RAS_BLOCK_MASK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _AMDGPU_RAS_BLOCK_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
Lloh15:
	adrp	x9, _amdgpu_ras_mask@GOTPAGE
Lloh16:
	ldr	x9, [x9, _amdgpu_ras_mask@GOTPAGEOFF]
	ldr	w10, [x9]
	and	w8, w10, w8
	str	w8, [x9]
	mov	x0, x19
	bl	_amdgpu_ras_fs_init
	cbz	x0, LBB0_12
; %bb.6:
	mov	x0, x19
	bl	_amdgpu_ras_recovery_fini
LBB0_7:
	mov	x0, x19
	mov	x1, #0
	bl	_amdgpu_ras_set_context
	mov	x0, x20
	bl	_kfree
Lloh17:
	adrp	x8, _EINVAL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_9
LBB0_8:
Lloh19:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh20:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
LBB0_9:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_10:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_11:
	mov	x0, x19
	mov	x1, #0
	bl	_amdgpu_ras_set_context
	mov	x0, x20
	bl	_kfree
	b	LBB0_1
LBB0_12:
	ldr	x8, [x19]
	ldr	x8, [x8]
	cbz	x8, LBB0_14
; %bb.13:
	mov	x0, x19
	blr	x8
LBB0_14:
	ldp	w2, w1, [x20]
Lloh21:
	adrp	x0, l_.str@PAGE
Lloh22:
	add	x0, x0, l_.str@PAGEOFF
	bl	_DRM_INFO
	b	LBB0_1
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpAdd	Lloh21, Lloh22
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_RAS_BLOCK_COUNT,4,2     ; @AMDGPU_RAS_BLOCK_COUNT
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	___GFP_ZERO,4,2                 ; @__GFP_ZERO
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_RAS_DEFAULT_FLAGS,4,2          ; @RAS_DEFAULT_FLAGS
	.comm	_AMDGPU_RAS_BLOCK_MASK,4,2      ; @AMDGPU_RAS_BLOCK_MASK
	.comm	_amdgpu_ras_mask,4,2            ; @amdgpu_ras_mask
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"RAS INFO: ras initialized successfully, hardware ability[%x] ras_mask[%x]\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
.subsections_via_symbols
