	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function read_subslice_reg
_read_subslice_reg:                     ## @read_subslice_reg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r14d
	movl	%edx, %r15d
	movl	%esi, %ebx
	movq	(%rdi), %r13
	movq	8(%rdi), %rdi
	callq	_INTEL_GEN
	cmpl	$11, %eax
	jl	LBB0_2
## %bb.1:
	movq	_GEN11_MCR_SLICE_MASK@GOTPCREL(%rip), %rax
	movq	_GEN11_MCR_SUBSLICE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r12d
	orl	(%rax), %r12d
	movl	%ebx, %edi
	callq	_GEN11_MCR_SLICE
	movl	%eax, %ebx
	movl	%r15d, %edi
	callq	_GEN11_MCR_SUBSLICE
	jmp	LBB0_3
LBB0_2:
	movq	_GEN8_MCR_SLICE_MASK@GOTPCREL(%rip), %rax
	movq	_GEN8_MCR_SUBSLICE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r12d
	orl	(%rax), %r12d
	movl	%ebx, %edi
	callq	_GEN8_MCR_SLICE
	movl	%eax, %ebx
	movl	%r15d, %edi
	callq	_GEN8_MCR_SUBSLICE
LBB0_3:
	orl	%ebx, %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_FW_REG_READ@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%r13, %rdi
	movl	%r14d, %esi
	callq	_intel_uncore_forcewake_for_reg
	movl	%eax, %ebx
	movq	_GEN8_MCR_SELECTOR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_FW_REG_WRITE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	orl	(%r15), %edx
	movq	%r13, %rdi
	callq	_intel_uncore_forcewake_for_reg
	orl	%eax, %ebx
	movl	%ebx, -52(%rbp)                 ## 4-byte Spill
	movq	%r13, %rdi
	callq	_spin_lock_irq
	movq	%r13, %rdi
	movl	%ebx, %esi
	callq	_intel_uncore_forcewake_get__locked
	movq	_GEN8_MCR_SELECTOR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_intel_uncore_read_fw
	movl	%r14d, -48(%rbp)                ## 4-byte Spill
	movl	%eax, %r14d
	movl	%r12d, %r15d
	notl	%r12d
	movl	%eax, %ebx
	andl	%r12d, %ebx
	orl	-44(%rbp), %ebx                 ## 4-byte Folded Reload
	movq	_GEN8_MCR_SELECTOR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_intel_uncore_write_fw
	movq	%r13, %rdi
	movl	-48(%rbp), %esi                 ## 4-byte Reload
	callq	_intel_uncore_read_fw
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	andl	%r12d, %ebx
	andl	%r15d, %r14d
	orl	%ebx, %r14d
	movq	_GEN8_MCR_SELECTOR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	callq	_intel_uncore_write_fw
	movq	%r13, %rdi
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_intel_uncore_forcewake_put__locked
	movq	%r13, %rdi
	callq	_spin_unlock_irq
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GEN11_MCR_SLICE_MASK,4,2       ## @GEN11_MCR_SLICE_MASK
	.comm	_GEN11_MCR_SUBSLICE_MASK,4,2    ## @GEN11_MCR_SUBSLICE_MASK
	.comm	_GEN8_MCR_SLICE_MASK,4,2        ## @GEN8_MCR_SLICE_MASK
	.comm	_GEN8_MCR_SUBSLICE_MASK,4,2     ## @GEN8_MCR_SUBSLICE_MASK
	.comm	_FW_REG_READ,4,2                ## @FW_REG_READ
	.comm	_GEN8_MCR_SELECTOR,4,2          ## @GEN8_MCR_SELECTOR
	.comm	_FW_REG_WRITE,4,2               ## @FW_REG_WRITE
	.no_dead_strip	_read_subslice_reg
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function read_subslice_reg
_read_subslice_reg:                     ; @read_subslice_reg
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x3
	mov	x21, x2
	mov	x22, x1
	ldp	x19, x8, [x0]
	mov	x0, x8
	bl	_INTEL_GEN
	cmp	w0, #11
	b.lt	LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _GEN11_MCR_SLICE_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GEN11_MCR_SLICE_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _GEN11_MCR_SUBSLICE_MASK@GOTPAGE
Lloh4:
	ldr	x9, [x9, _GEN11_MCR_SUBSLICE_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w24, w9, w8
	mov	x0, x22
	bl	_GEN11_MCR_SLICE
	mov	x22, x0
	mov	x0, x21
	bl	_GEN11_MCR_SUBSLICE
	b	LBB0_3
LBB0_2:
Lloh6:
	adrp	x8, _GEN8_MCR_SLICE_MASK@GOTPAGE
Lloh7:
	ldr	x8, [x8, _GEN8_MCR_SLICE_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x9, _GEN8_MCR_SUBSLICE_MASK@GOTPAGE
Lloh10:
	ldr	x9, [x9, _GEN8_MCR_SUBSLICE_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w24, w9, w8
	mov	x0, x22
	bl	_GEN8_MCR_SLICE
	mov	x22, x0
	mov	x0, x21
	bl	_GEN8_MCR_SUBSLICE
LBB0_3:
	orr	w23, w0, w22
Lloh12:
	adrp	x22, _FW_REG_READ@GOTPAGE
Lloh13:
	ldr	x22, [x22, _FW_REG_READ@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x19
	mov	x1, x20
	bl	_intel_uncore_forcewake_for_reg
	mov	x21, x0
Lloh14:
	adrp	x25, _GEN8_MCR_SELECTOR@GOTPAGE
Lloh15:
	ldr	x25, [x25, _GEN8_MCR_SELECTOR@GOTPAGEOFF]
	ldr	w1, [x25]
	ldr	w8, [x22]
Lloh16:
	adrp	x9, _FW_REG_WRITE@GOTPAGE
Lloh17:
	ldr	x9, [x9, _FW_REG_WRITE@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_intel_uncore_forcewake_for_reg
	orr	w21, w0, w21
	mov	x0, x19
	bl	_spin_lock_irq
	mov	x0, x19
	mov	x1, x21
	bl	_intel_uncore_forcewake_get__locked
	ldr	w1, [x25]
	mov	x0, x19
	bl	_intel_uncore_read_fw
	mov	x22, x0
	bic	w8, w0, w24
	orr	w23, w8, w23
	ldr	w1, [x25]
	mov	x0, x19
	mov	x2, x23
	bl	_intel_uncore_write_fw
	mov	x0, x19
	mov	x1, x20
	bl	_intel_uncore_read_fw
	mov	x20, x0
	bic	w8, w23, w24
	and	w9, w22, w24
	orr	w2, w8, w9
	ldr	w1, [x25]
	mov	x0, x19
	bl	_intel_uncore_write_fw
	mov	x0, x19
	mov	x1, x21
	bl	_intel_uncore_forcewake_put__locked
	mov	x0, x19
	bl	_spin_unlock_irq
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_GEN11_MCR_SLICE_MASK,4,2       ; @GEN11_MCR_SLICE_MASK
	.comm	_GEN11_MCR_SUBSLICE_MASK,4,2    ; @GEN11_MCR_SUBSLICE_MASK
	.comm	_GEN8_MCR_SLICE_MASK,4,2        ; @GEN8_MCR_SLICE_MASK
	.comm	_GEN8_MCR_SUBSLICE_MASK,4,2     ; @GEN8_MCR_SUBSLICE_MASK
	.comm	_FW_REG_READ,4,2                ; @FW_REG_READ
	.comm	_GEN8_MCR_SELECTOR,4,2          ; @GEN8_MCR_SELECTOR
	.comm	_FW_REG_WRITE,4,2               ; @FW_REG_WRITE
	.no_dead_strip	_read_subslice_reg
.subsections_via_symbols
