	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function uvd_v5_0_set_clockgating_state
_uvd_v5_0_set_clockgating_state:        ## @uvd_v5_0_set_clockgating_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %eax
	movq	%rdi, %rbx
	movq	_AMD_CG_STATE_GATE@GOTPCREL(%rip), %rcx
	xorl	%r14d, %r14d
	movl	$0, %esi
	cmpl	%eax, (%rcx)
	jne	LBB0_3
## %bb.1:
	movq	%rbx, %rdi
	callq	_uvd_v5_0_wait_for_idle
	testq	%rax, %rax
	je	LBB0_2
## %bb.5:
	movq	_EBUSY@GOTPCREL(%rip), %rax
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
	jmp	LBB0_4
LBB0_2:
	movl	$1, %esi
LBB0_3:
	movq	%rbx, %rdi
	callq	_uvd_v5_0_enable_clock_gating
	movq	%rbx, %rdi
	callq	_uvd_v5_0_set_sw_clock_gating
LBB0_4:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AMD_CG_STATE_GATE,4,2          ## @AMD_CG_STATE_GATE
	.comm	_EBUSY,4,2                      ## @EBUSY
	.no_dead_strip	_uvd_v5_0_set_clockgating_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function uvd_v5_0_set_clockgating_state
_uvd_v5_0_set_clockgating_state:        ; @uvd_v5_0_set_clockgating_state
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _AMD_CG_STATE_GATE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AMD_CG_STATE_GATE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w1
	b.ne	LBB0_3
; %bb.1:
	mov	x0, x19
	bl	_uvd_v5_0_wait_for_idle
	cbz	x0, LBB0_4
; %bb.2:
Lloh3:
	adrp	x8, _EBUSY@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EBUSY@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_6
LBB0_3:
	mov	w1, #0
	b	LBB0_5
LBB0_4:
	mov	w1, #1
LBB0_5:
	mov	x0, x19
	bl	_uvd_v5_0_enable_clock_gating
	mov	x0, x19
	bl	_uvd_v5_0_set_sw_clock_gating
	mov	w0, #0
LBB0_6:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_AMD_CG_STATE_GATE,4,2          ; @AMD_CG_STATE_GATE
	.comm	_EBUSY,4,2                      ; @EBUSY
	.no_dead_strip	_uvd_v5_0_set_clockgating_state
.subsections_via_symbols
