	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_vgpu_rw
_intel_vgpu_rw:                         ## @intel_vgpu_rw
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, %r12d
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r15
	callq	_mdev_get_drvdata
	movq	%rax, %r13
	movl	(%rbx), %edi
	callq	_VFIO_PCI_OFFSET_TO_INDEX
                                        ## kill: def $eax killed $eax def $rax
	movq	_VFIO_PCI_NUM_REGIONS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	(%r13), %edx
	addl	%ecx, %edx
	cmpl	%edx, %eax
	jae	LBB0_1
## %bb.2:
	leal	-128(%rax), %esi
	cmpl	$8, %esi
	ja	LBB0_8
## %bb.3:
	movq	_VFIO_PCI_OFFSET_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	(%rbx), %edx
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rsi,4), %rsi
	addq	%rcx, %rsi
	jmpq	*%rsi
LBB0_10:
	testl	%eax, %eax
	cltq
	cmoveq	%r14, %rax
	jmp	LBB0_11
LBB0_1:
	leaq	L_.str(%rip), %rdi
	movl	%eax, %esi
	callq	_gvt_vgpu_err
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subq	(%rcx), %rax
LBB0_11:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_8:
	subl	%ecx, %eax
	movq	8(%r13), %rcx
	movq	(%rcx,%rax,8), %rax
	movq	(%rax), %rax
	movq	%r13, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	movl	%r12d, %r8d
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmpq	*%rax                           ## TAILCALL
LBB0_4:
	movq	_intel_gvt_ops@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%r13, %rdi
	movl	%edx, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	testl	%r12d, %r12d
	je	LBB0_9
## %bb.5:
	callq	*(%rax)
	jmp	LBB0_10
LBB0_7:
	movq	%r13, %rdi
	movl	%edx, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movl	%r12d, %r8d
	callq	_intel_vgpu_aperture_rw
	jmp	LBB0_10
LBB0_6:
	movq	_PCI_BASE_ADDRESS_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movq	%r15, %rcx
	movq	%r14, %r8
	movl	%r12d, %r9d
	callq	_intel_vgpu_bar_rw
	jmp	LBB0_10
LBB0_9:
	callq	*8(%rax)
	jmp	LBB0_10
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_4, LBB0_4-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
LJTI0_0:
	.long	L0_0_set_10
	.long	L0_0_set_10
	.long	L0_0_set_4
	.long	L0_0_set_10
	.long	L0_0_set_10
	.long	L0_0_set_10
	.long	L0_0_set_7
	.long	L0_0_set_10
	.long	L0_0_set_6
	.end_data_region
                                        ## -- End function
	.comm	_VFIO_PCI_OFFSET_MASK,4,2       ## @VFIO_PCI_OFFSET_MASK
	.comm	_EINVAL,8,3                     ## @EINVAL
	.comm	_VFIO_PCI_NUM_REGIONS,4,2       ## @VFIO_PCI_NUM_REGIONS
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"invalid index: %u\n"

	.comm	_intel_gvt_ops,8,3              ## @intel_gvt_ops
	.comm	_PCI_BASE_ADDRESS_0,4,2         ## @PCI_BASE_ADDRESS_0
	.no_dead_strip	_intel_vgpu_rw
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_vgpu_rw
_intel_vgpu_rw:                         ; @intel_vgpu_rw
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x4
	mov	x23, x3
	mov	x19, x2
	mov	x20, x1
	bl	_mdev_get_drvdata
	mov	x22, x0
	ldr	w0, [x23]
	bl	_VFIO_PCI_OFFSET_TO_INDEX
	mov	x1, x0
Lloh0:
	adrp	x8, _VFIO_PCI_NUM_REGIONS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VFIO_PCI_NUM_REGIONS@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x8]
	ldr	w8, [x22]
	add	w8, w8, w9
	cmp	w0, w8
	b.hs	LBB0_5
; %bb.1:
	sub	w8, w1, #128
	cmp	w8, #8
	b.hi	LBB0_6
; %bb.2:
	ldr	w9, [x23]
Lloh3:
	adrp	x10, _VFIO_PCI_OFFSET_MASK@GOTPAGE
Lloh4:
	ldr	x10, [x10, _VFIO_PCI_OFFSET_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
Lloh6:
	adrp	x11, _EINVAL@GOTPAGE
Lloh7:
	ldr	x11, [x11, _EINVAL@GOTPAGEOFF]
	and	w2, w10, w9
Lloh8:
	ldr	w9, [x11]
	neg	w0, w9
Lloh9:
	adrp	x9, lJTI0_0@PAGE
Lloh10:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_3
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_3:
Lloh11:
	adrp	x8, _intel_gvt_ops@GOTPAGE
Lloh12:
	ldr	x8, [x8, _intel_gvt_ops@GOTPAGEOFF]
Lloh13:
	ldr	x8, [x8]
	cbz	w21, LBB0_9
; %bb.4:
	ldr	x8, [x8]
	b	LBB0_10
LBB0_5:
Lloh14:
	adrp	x0, l_.str@PAGE
Lloh15:
	add	x0, x0, l_.str@PAGEOFF
	bl	_gvt_vgpu_err
Lloh16:
	adrp	x8, _EINVAL@GOTPAGE
Lloh17:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh18:
	ldr	x8, [x8]
	neg	x0, x8
	b	LBB0_13
LBB0_6:
	sub	w8, w1, w9
	ldr	x9, [x22, #8]
	ldr	x8, [x9, w8, uxtw #3]
	ldr	x5, [x8]
	mov	x0, x22
	mov	x1, x20
	mov	x2, x19
	mov	x3, x23
	mov	x4, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	br	x5
LBB0_7:
	mov	x0, x22
	mov	x1, x2
	mov	x2, x20
	mov	x3, x19
	mov	x4, x21
	bl	_intel_vgpu_aperture_rw
	b	LBB0_11
LBB0_8:
Lloh19:
	adrp	x8, _PCI_BASE_ADDRESS_0@GOTPAGE
Lloh20:
	ldr	x8, [x8, _PCI_BASE_ADDRESS_0@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	mov	x0, x22
	mov	x3, x20
	mov	x4, x19
	mov	x5, x21
	bl	_intel_vgpu_bar_rw
	b	LBB0_11
LBB0_9:
	ldr	x8, [x8, #8]
LBB0_10:
	mov	x0, x22
	mov	x1, x2
	mov	x2, x20
	mov	x3, x19
	blr	x8
LBB0_11:
                                        ; kill: def $w0 killed $w0 def $x0
LBB0_12:
	sxtw	x8, w0
	cmp	w0, #0
	csel	x0, x19, x8, eq
LBB0_13:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_12-LBB0_3)>>2
	.byte	(LBB0_12-LBB0_3)>>2
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_12-LBB0_3)>>2
	.byte	(LBB0_12-LBB0_3)>>2
	.byte	(LBB0_12-LBB0_3)>>2
	.byte	(LBB0_7-LBB0_3)>>2
	.byte	(LBB0_12-LBB0_3)>>2
	.byte	(LBB0_8-LBB0_3)>>2
                                        ; -- End function
	.comm	_VFIO_PCI_OFFSET_MASK,4,2       ; @VFIO_PCI_OFFSET_MASK
	.comm	_EINVAL,8,3                     ; @EINVAL
	.comm	_VFIO_PCI_NUM_REGIONS,4,2       ; @VFIO_PCI_NUM_REGIONS
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"invalid index: %u\n"

	.comm	_intel_gvt_ops,8,3              ; @intel_gvt_ops
	.comm	_PCI_BASE_ADDRESS_0,4,2         ; @PCI_BASE_ADDRESS_0
	.no_dead_strip	_intel_vgpu_rw
.subsections_via_symbols
