	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_vgpu_clean_opregion      ## -- Begin function intel_vgpu_clean_opregion
	.p2align	4, 0x90
_intel_vgpu_clean_opregion:             ## @intel_vgpu_clean_opregion
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movl	(%rdi), %esi
	leaq	L_.str(%rip), %rdi
	callq	_gvt_dbg_core
	movq	%rbx, %rdi
	callq	_vgpu_opregion
	cmpq	$0, (%rax)
	je	LBB0_5
## %bb.1:
	movq	_intel_gvt_host@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_INTEL_GVT_HYPERVISOR_XEN@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_4
## %bb.2:
	movq	%rbx, %rdi
	callq	_vgpu_opregion
	cmpq	$0, 8(%rax)
	je	LBB0_4
## %bb.3:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_map_vgpu_opregion
LBB0_4:
	movq	%rbx, %rdi
	callq	_vgpu_opregion
	movq	(%rax), %r14
	movq	_INTEL_GVT_OPREGION_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_get_order
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_free_pages
	movq	%rbx, %rdi
	callq	_vgpu_opregion
	movq	$0, (%rax)
LBB0_5:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"vgpu%d: clean vgpu opregion\n"

	.comm	_intel_gvt_host,8,3             ## @intel_gvt_host
	.comm	_INTEL_GVT_HYPERVISOR_XEN,8,3   ## @INTEL_GVT_HYPERVISOR_XEN
	.comm	_INTEL_GVT_HYPERVISOR_KVM,8,3   ## @INTEL_GVT_HYPERVISOR_KVM
	.comm	_INTEL_GVT_OPREGION_SIZE,4,2    ## @INTEL_GVT_OPREGION_SIZE
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_vgpu_clean_opregion      ; -- Begin function intel_vgpu_clean_opregion
	.p2align	2
_intel_vgpu_clean_opregion:             ; @intel_vgpu_clean_opregion
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w1, [x0]
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_gvt_dbg_core
	mov	x0, x19
	bl	_vgpu_opregion
	ldr	x8, [x0]
	cbz	x8, LBB0_5
; %bb.1:
Lloh2:
	adrp	x8, _intel_gvt_host@GOTPAGE
Lloh3:
	ldr	x8, [x8, _intel_gvt_host@GOTPAGEOFF]
Lloh4:
	ldr	x8, [x8]
Lloh5:
	adrp	x9, _INTEL_GVT_HYPERVISOR_XEN@GOTPAGE
Lloh6:
	ldr	x9, [x9, _INTEL_GVT_HYPERVISOR_XEN@GOTPAGEOFF]
Lloh7:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_4
; %bb.2:
	mov	x0, x19
	bl	_vgpu_opregion
	ldr	x8, [x0, #8]
	cbz	x8, LBB0_4
; %bb.3:
	mov	x0, x19
	mov	w1, #0
	bl	_map_vgpu_opregion
LBB0_4:
	mov	x0, x19
	bl	_vgpu_opregion
	ldr	x20, [x0]
Lloh8:
	adrp	x8, _INTEL_GVT_OPREGION_SIZE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _INTEL_GVT_OPREGION_SIZE@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
	bl	_get_order
	mov	x1, x0
	mov	x0, x20
	bl	_free_pages
	mov	x0, x19
	bl	_vgpu_opregion
	str	xzr, [x0]
LBB0_5:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"vgpu%d: clean vgpu opregion\n"

	.comm	_intel_gvt_host,8,3             ; @intel_gvt_host
	.comm	_INTEL_GVT_HYPERVISOR_XEN,8,3   ; @INTEL_GVT_HYPERVISOR_XEN
	.comm	_INTEL_GVT_HYPERVISOR_KVM,8,3   ; @INTEL_GVT_HYPERVISOR_KVM
	.comm	_INTEL_GVT_OPREGION_SIZE,4,2    ; @INTEL_GVT_OPREGION_SIZE
.subsections_via_symbols
