	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_clear_surface_reg         ## -- Begin function r100_clear_surface_reg
	.p2align	4, 0x90
_r100_clear_surface_reg:                ## @r100_clear_surface_reg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	shll	$4, %esi
	movq	_RADEON_SURFACE0_INFO@GOTPCREL(%rip), %rax
	movslq	%esi, %rdi
	addq	(%rax), %rdi
	xorl	%esi, %esi
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_RADEON_SURFACE0_INFO,8,3       ## @RADEON_SURFACE0_INFO
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_r100_clear_surface_reg         ; -- Begin function r100_clear_surface_reg
	.p2align	2
_r100_clear_surface_reg:                ; @r100_clear_surface_reg
	.cfi_startproc
; %bb.0:
	lsl	w8, w1, #4
Lloh0:
	adrp	x9, _RADEON_SURFACE0_INFO@GOTPAGE
Lloh1:
	ldr	x9, [x9, _RADEON_SURFACE0_INFO@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x0, x9, w8, sxtw
	mov	w1, #0
	b	_WREG32
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_RADEON_SURFACE0_INFO,8,3       ; @RADEON_SURFACE0_INFO
.subsections_via_symbols
