	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pl111_init_clock_divider
_pl111_init_clock_divider:              ## @pl111_init_clock_divider
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$48, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %r12
	movl	(%rdi), %edi
	leaq	L_.str(%rip), %rsi
	callq	_devm_clk_get
	movq	%rax, %r14
	leaq	L_.str.1(%rip), %rax
	movq	%rax, -72(%rbp)
	leaq	-40(%rbp), %rax
	movq	%rax, -64(%rbp)
	movl	$1, -56(%rbp)
	movq	_CLK_SET_RATE_PARENT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)
	movq	_pl111_clk_div_ops@GOTPCREL(%rip), %rax
	movq	%rax, -48(%rbp)
	movq	%r14, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movl	(%rbx), %edi
	leaq	L_.str.2(%rip), %rsi
	callq	_dev_err
	movq	%r14, %rdi
	callq	_PTR_ERR
	jmp	LBB0_5
LBB0_2:
	leaq	16(%r12), %rdi
	callq	_spin_lock_init
	movq	8(%r12), %rax
	cmpq	$0, (%rax)
	je	LBB0_4
## %bb.3:
	movq	%r14, (%r12)
	xorl	%eax, %eax
	jmp	LBB0_5
LBB0_4:
	leaq	24(%r12), %r15
	movq	%r14, %rdi
	callq	___clk_get_name
	movq	%rax, -40(%rbp)
	leaq	-72(%rbp), %rax
	movq	%rax, 32(%r12)
	movl	(%rbx), %edi
	movq	%r15, %rsi
	callq	_devm_clk_hw_register
	movq	24(%r12), %rcx
	movq	%rcx, (%r12)
LBB0_5:
	addq	$48, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"clcdclk"

L_.str.1:                               ## @.str.1
	.asciz	"pl111_div"

	.comm	_CLK_SET_RATE_PARENT,4,2        ## @CLK_SET_RATE_PARENT
	.comm	_pl111_clk_div_ops,4,2          ## @pl111_clk_div_ops
L_.str.2:                               ## @.str.2
	.asciz	"CLCD: unable to get clcdclk.\n"

	.no_dead_strip	_pl111_init_clock_divider
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pl111_init_clock_divider
_pl111_init_clock_divider:              ; @pl111_init_clock_divider
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x22, [x0, #8]
	ldr	w0, [x0]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_devm_clk_get
	mov	x20, x0
Lloh2:
	adrp	x8, l_.str.1@PAGE
Lloh3:
	add	x8, x8, l_.str.1@PAGEOFF
	add	x9, sp, #40
	stp	x8, x9, [sp, #8]
	mov	w8, #1
Lloh4:
	adrp	x9, _CLK_SET_RATE_PARENT@GOTPAGE
Lloh5:
	ldr	x9, [x9, _CLK_SET_RATE_PARENT@GOTPAGEOFF]
Lloh6:
	ldr	w9, [x9]
	stp	w8, w9, [sp, #24]
Lloh7:
	adrp	x8, _pl111_clk_div_ops@GOTPAGE
Lloh8:
	ldr	x8, [x8, _pl111_clk_div_ops@GOTPAGEOFF]
	str	x8, [sp, #32]
	bl	_IS_ERR
	cbz	x0, LBB0_2
; %bb.1:
	ldr	w0, [x19]
Lloh9:
	adrp	x1, l_.str.2@PAGE
Lloh10:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_dev_err
	mov	x0, x20
	bl	_PTR_ERR
	b	LBB0_5
LBB0_2:
	add	x0, x22, #16
	bl	_spin_lock_init
	ldr	x8, [x22, #8]
	ldr	x8, [x8]
	cbz	x8, LBB0_4
; %bb.3:
	mov	w0, #0
	str	x20, [x22]
	b	LBB0_5
LBB0_4:
	add	x21, x22, #24
	mov	x0, x20
	bl	___clk_get_name
	str	x0, [sp, #40]
	add	x8, sp, #8
	str	x8, [x22, #32]
	ldr	w0, [x19]
	mov	x1, x21
	bl	_devm_clk_hw_register
	ldr	x8, [x22, #24]
	str	x8, [x22]
LBB0_5:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh9, Lloh10
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"clcdclk"

l_.str.1:                               ; @.str.1
	.asciz	"pl111_div"

	.comm	_CLK_SET_RATE_PARENT,4,2        ; @CLK_SET_RATE_PARENT
	.comm	_pl111_clk_div_ops,4,2          ; @pl111_clk_div_ops
l_.str.2:                               ; @.str.2
	.asciz	"CLCD: unable to get clcdclk.\n"

	.no_dead_strip	_pl111_init_clock_divider
.subsections_via_symbols
