	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tilcdc_crtc_set_clk
_tilcdc_crtc_set_clk:                   ## @tilcdc_crtc_set_clk
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movq	8(%rdi), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	8(%rax), %rbx
	callq	_to_tilcdc_crtc
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movslq	(%r12), %rax
	imulq	$1000, %rax, %r15               ## imm = 0x3E8
	movl	4(%rbx), %edi
	leaq	(%r15,%r15), %rsi
	callq	_clk_set_rate
	movl	%eax, %r14d
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	movl	4(%rbx), %edi
	callq	_clk_get_rate
	movq	%rax, %r13
	testl	%r14d, %r14d
	js	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	movq	%r13, %rsi
	callq	_tilcdc_pclk_diff
	movl	$2, %ebx
	cmpl	$6, %eax
	jl	LBB0_6
LBB0_2:
	testq	%r13, %r13
	je	LBB0_8
## %bb.3:
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movq	%r13, %rdi
	movq	%r15, %rsi
	callq	_DIV_ROUND_CLOSEST
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	%eax, %r14d
	imulq	%r15, %r14
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	_tilcdc_pclk_diff
	cmpl	$6, %eax
	jl	LBB0_5
## %bb.4:
	movl	(%rbx), %edi
	leaq	L_.str.1(%rip), %rsi
	movq	%r13, %rdx
	movq	%r14, %rcx
	callq	_dev_warn
LBB0_5:
	movl	-44(%rbp), %ebx                 ## 4-byte Reload
LBB0_6:
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movq	%r13, (%rax)
	movl	(%r12), %edx
	leaq	L_.str.2(%rip), %rdi
	movq	%r13, %rsi
	movl	%ebx, %ecx
	callq	_DBG
	movq	_LCDC_CTRL_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%ebx, %edi
	callq	_LCDC_CLK_DIVISOR
	movq	_LCDC_RASTER_MODE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_tilcdc_write
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	cmpl	$2, (%rax)
	jne	LBB0_7
## %bb.9:
	movq	_LCDC_CLK_ENABLE_REG@GOTPCREL(%rip), %rax
	movq	_LCDC_V2_DMA_CLK_EN@GOTPCREL(%rip), %rcx
	movq	_LCDC_V2_LIDD_CLK_EN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_LCDC_V2_CORE_CLK_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_tilcdc_set                     ## TAILCALL
LBB0_7:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_8:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edi
	leaq	L_.str(%rip), %rsi
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_err                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to set the pixel clock - unable to read current lcdc clock rate\n"

L_.str.1:                               ## @.str.1
	.asciz	"effective pixel clock rate (%luHz) differs from the calculated rate (%luHz)\n"

L_.str.2:                               ## @.str.2
	.asciz	"lcd_clk=%u, mode clock=%d, div=%u"

	.comm	_LCDC_CTRL_REG,4,2              ## @LCDC_CTRL_REG
	.comm	_LCDC_RASTER_MODE,4,2           ## @LCDC_RASTER_MODE
	.comm	_LCDC_CLK_ENABLE_REG,4,2        ## @LCDC_CLK_ENABLE_REG
	.comm	_LCDC_V2_DMA_CLK_EN,4,2         ## @LCDC_V2_DMA_CLK_EN
	.comm	_LCDC_V2_LIDD_CLK_EN,4,2        ## @LCDC_V2_LIDD_CLK_EN
	.comm	_LCDC_V2_CORE_CLK_EN,4,2        ## @LCDC_V2_CORE_CLK_EN
	.no_dead_strip	_tilcdc_crtc_set_clk
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tilcdc_crtc_set_clk
_tilcdc_crtc_set_clk:                   ; @tilcdc_crtc_set_clk
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x0
	ldr	x19, [x0, #8]
	ldr	x25, [x19, #8]
	bl	_to_tilcdc_crtc
	mov	x21, x0
	ldrsw	x8, [x20]
	mov	w9, #1000
	mul	x24, x8, x9
	ldr	w0, [x25, #4]
	lsl	x1, x24, #1
	bl	_clk_set_rate
	mov	x23, x0
	ldr	w0, [x25, #4]
	bl	_clk_get_rate
	mov	x22, x0
	tbnz	w23, #31, LBB0_2
; %bb.1:
	mov	x0, x24
	mov	x1, x22
	bl	_tilcdc_pclk_diff
	cmp	w0, #6
	b.lt	LBB0_5
LBB0_2:
	cbz	x22, LBB0_9
; %bb.3:
	mov	x0, x22
	mov	x1, x24
	bl	_DIV_ROUND_CLOSEST
	mov	x23, x0
	mov	w8, w0
	mul	x24, x8, x24
	mov	x0, x22
	mov	x1, x24
	bl	_tilcdc_pclk_diff
	cmp	w0, #6
	b.lt	LBB0_6
; %bb.4:
	ldr	w0, [x19]
Lloh0:
	adrp	x1, l_.str.1@PAGE
Lloh1:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x2, x22
	mov	x3, x24
	bl	_dev_warn
	b	LBB0_6
LBB0_5:
	mov	w23, #2
LBB0_6:
	str	x22, [x21]
	ldr	w2, [x20]
Lloh2:
	adrp	x0, l_.str.2@PAGE
Lloh3:
	add	x0, x0, l_.str.2@PAGEOFF
	mov	x1, x22
	mov	x3, x23
	bl	_DBG
Lloh4:
	adrp	x8, _LCDC_CTRL_REG@GOTPAGE
Lloh5:
	ldr	x8, [x8, _LCDC_CTRL_REG@GOTPAGEOFF]
Lloh6:
	ldr	w20, [x8]
	mov	x0, x23
	bl	_LCDC_CLK_DIVISOR
Lloh7:
	adrp	x8, _LCDC_RASTER_MODE@GOTPAGE
Lloh8:
	ldr	x8, [x8, _LCDC_RASTER_MODE@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	orr	w2, w8, w0
	mov	x0, x19
	mov	x1, x20
	bl	_tilcdc_write
	ldr	w8, [x25]
	cmp	w8, #2
	b.ne	LBB0_8
; %bb.7:
Lloh10:
	adrp	x8, _LCDC_CLK_ENABLE_REG@GOTPAGE
Lloh11:
	ldr	x8, [x8, _LCDC_CLK_ENABLE_REG@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
Lloh13:
	adrp	x8, _LCDC_V2_DMA_CLK_EN@GOTPAGE
Lloh14:
	ldr	x8, [x8, _LCDC_V2_DMA_CLK_EN@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
Lloh16:
	adrp	x9, _LCDC_V2_LIDD_CLK_EN@GOTPAGE
Lloh17:
	ldr	x9, [x9, _LCDC_V2_LIDD_CLK_EN@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
Lloh19:
	adrp	x10, _LCDC_V2_CORE_CLK_EN@GOTPAGE
Lloh20:
	ldr	x10, [x10, _LCDC_V2_CORE_CLK_EN@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh21:
	ldr	w9, [x10]
	orr	w2, w8, w9
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_tilcdc_set
LBB0_8:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_9:
	ldr	w0, [x19]
Lloh22:
	adrp	x1, l_.str@PAGE
Lloh23:
	add	x1, x1, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_dev_err
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to set the pixel clock - unable to read current lcdc clock rate\n"

l_.str.1:                               ; @.str.1
	.asciz	"effective pixel clock rate (%luHz) differs from the calculated rate (%luHz)\n"

l_.str.2:                               ; @.str.2
	.asciz	"lcd_clk=%u, mode clock=%d, div=%u"

	.comm	_LCDC_CTRL_REG,4,2              ; @LCDC_CTRL_REG
	.comm	_LCDC_RASTER_MODE,4,2           ; @LCDC_RASTER_MODE
	.comm	_LCDC_CLK_ENABLE_REG,4,2        ; @LCDC_CLK_ENABLE_REG
	.comm	_LCDC_V2_DMA_CLK_EN,4,2         ; @LCDC_V2_DMA_CLK_EN
	.comm	_LCDC_V2_LIDD_CLK_EN,4,2        ; @LCDC_V2_LIDD_CLK_EN
	.comm	_LCDC_V2_CORE_CLK_EN,4,2        ; @LCDC_V2_CORE_CLK_EN
	.no_dead_strip	_tilcdc_crtc_set_clk
.subsections_via_symbols
