	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function smu7_read_clock_registers
_smu7_read_clock_registers:             ## @smu7_read_clock_registers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %r14
	movl	(%rdi), %edi
	movq	_CGS_IND_REG__SMC@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_ixCG_SPLL_FUNC_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_cgs_read_ind_register
	movq	%rax, 112(%r14)
	movl	(%rbx), %edi
	movl	(%r15), %esi
	movq	_ixCG_SPLL_FUNC_CNTL_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_cgs_read_ind_register
	movq	%rax, 104(%r14)
	movl	(%rbx), %edi
	movl	(%r15), %esi
	movq	_ixCG_SPLL_FUNC_CNTL_3@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_cgs_read_ind_register
	movq	%rax, 96(%r14)
	movl	(%rbx), %edi
	movl	(%r15), %esi
	movq	_ixCG_SPLL_FUNC_CNTL_4@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_cgs_read_ind_register
	movq	%rax, 88(%r14)
	movl	(%rbx), %edi
	movl	(%r15), %esi
	movq	_ixCG_SPLL_SPREAD_SPECTRUM@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_cgs_read_ind_register
	movq	%rax, 80(%r14)
	movl	(%rbx), %edi
	movl	(%r15), %esi
	movq	_ixCG_SPLL_SPREAD_SPECTRUM_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_cgs_read_ind_register
	movq	%rax, 72(%r14)
	movl	(%rbx), %edi
	movq	_mmDLL_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_cgs_read_register
	movq	%rax, 64(%r14)
	movl	(%rbx), %edi
	movq	_mmMCLK_PWRMGT_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_cgs_read_register
	movq	%rax, 56(%r14)
	movl	(%rbx), %edi
	movq	_mmMPLL_AD_FUNC_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_cgs_read_register
	movq	%rax, 48(%r14)
	movl	(%rbx), %edi
	movq	_mmMPLL_DQ_FUNC_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_cgs_read_register
	movq	%rax, 40(%r14)
	movl	(%rbx), %edi
	movq	_mmMPLL_FUNC_CNTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_cgs_read_register
	movq	%rax, 32(%r14)
	movl	(%rbx), %edi
	movq	_mmMPLL_FUNC_CNTL_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_cgs_read_register
	movq	%rax, 24(%r14)
	movl	(%rbx), %edi
	movq	_mmMPLL_FUNC_CNTL_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_cgs_read_register
	movq	%rax, 16(%r14)
	movl	(%rbx), %edi
	movq	_mmMPLL_SS1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_cgs_read_register
	movq	%rax, 8(%r14)
	movl	(%rbx), %edi
	movq	_mmMPLL_SS2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_cgs_read_register
	movq	%rax, (%r14)
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CGS_IND_REG__SMC,4,2           ## @CGS_IND_REG__SMC
	.comm	_ixCG_SPLL_FUNC_CNTL,4,2        ## @ixCG_SPLL_FUNC_CNTL
	.comm	_ixCG_SPLL_FUNC_CNTL_2,4,2      ## @ixCG_SPLL_FUNC_CNTL_2
	.comm	_ixCG_SPLL_FUNC_CNTL_3,4,2      ## @ixCG_SPLL_FUNC_CNTL_3
	.comm	_ixCG_SPLL_FUNC_CNTL_4,4,2      ## @ixCG_SPLL_FUNC_CNTL_4
	.comm	_ixCG_SPLL_SPREAD_SPECTRUM,4,2  ## @ixCG_SPLL_SPREAD_SPECTRUM
	.comm	_ixCG_SPLL_SPREAD_SPECTRUM_2,4,2 ## @ixCG_SPLL_SPREAD_SPECTRUM_2
	.comm	_mmDLL_CNTL,4,2                 ## @mmDLL_CNTL
	.comm	_mmMCLK_PWRMGT_CNTL,4,2         ## @mmMCLK_PWRMGT_CNTL
	.comm	_mmMPLL_AD_FUNC_CNTL,4,2        ## @mmMPLL_AD_FUNC_CNTL
	.comm	_mmMPLL_DQ_FUNC_CNTL,4,2        ## @mmMPLL_DQ_FUNC_CNTL
	.comm	_mmMPLL_FUNC_CNTL,4,2           ## @mmMPLL_FUNC_CNTL
	.comm	_mmMPLL_FUNC_CNTL_1,4,2         ## @mmMPLL_FUNC_CNTL_1
	.comm	_mmMPLL_FUNC_CNTL_2,4,2         ## @mmMPLL_FUNC_CNTL_2
	.comm	_mmMPLL_SS1,4,2                 ## @mmMPLL_SS1
	.comm	_mmMPLL_SS2,4,2                 ## @mmMPLL_SS2
	.no_dead_strip	_smu7_read_clock_registers
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function smu7_read_clock_registers
_smu7_read_clock_registers:             ; @smu7_read_clock_registers
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0, #8]
	ldr	w0, [x0]
Lloh0:
	adrp	x21, _CGS_IND_REG__SMC@GOTPAGE
Lloh1:
	ldr	x21, [x21, _CGS_IND_REG__SMC@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh2:
	adrp	x8, _ixCG_SPLL_FUNC_CNTL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _ixCG_SPLL_FUNC_CNTL@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	bl	_cgs_read_ind_register
	str	x0, [x20, #112]
	ldr	w0, [x19]
	ldr	w1, [x21]
Lloh5:
	adrp	x8, _ixCG_SPLL_FUNC_CNTL_2@GOTPAGE
Lloh6:
	ldr	x8, [x8, _ixCG_SPLL_FUNC_CNTL_2@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	bl	_cgs_read_ind_register
	str	x0, [x20, #104]
	ldr	w0, [x19]
	ldr	w1, [x21]
Lloh8:
	adrp	x8, _ixCG_SPLL_FUNC_CNTL_3@GOTPAGE
Lloh9:
	ldr	x8, [x8, _ixCG_SPLL_FUNC_CNTL_3@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	bl	_cgs_read_ind_register
	str	x0, [x20, #96]
	ldr	w0, [x19]
	ldr	w1, [x21]
Lloh11:
	adrp	x8, _ixCG_SPLL_FUNC_CNTL_4@GOTPAGE
Lloh12:
	ldr	x8, [x8, _ixCG_SPLL_FUNC_CNTL_4@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	bl	_cgs_read_ind_register
	str	x0, [x20, #88]
	ldr	w0, [x19]
	ldr	w1, [x21]
Lloh14:
	adrp	x8, _ixCG_SPLL_SPREAD_SPECTRUM@GOTPAGE
Lloh15:
	ldr	x8, [x8, _ixCG_SPLL_SPREAD_SPECTRUM@GOTPAGEOFF]
Lloh16:
	ldr	w2, [x8]
	bl	_cgs_read_ind_register
	str	x0, [x20, #80]
	ldr	w0, [x19]
	ldr	w1, [x21]
Lloh17:
	adrp	x8, _ixCG_SPLL_SPREAD_SPECTRUM_2@GOTPAGE
Lloh18:
	ldr	x8, [x8, _ixCG_SPLL_SPREAD_SPECTRUM_2@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	bl	_cgs_read_ind_register
	str	x0, [x20, #72]
	ldr	w0, [x19]
Lloh20:
	adrp	x8, _mmDLL_CNTL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _mmDLL_CNTL@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	bl	_cgs_read_register
	str	x0, [x20, #64]
	ldr	w0, [x19]
Lloh23:
	adrp	x8, _mmMCLK_PWRMGT_CNTL@GOTPAGE
Lloh24:
	ldr	x8, [x8, _mmMCLK_PWRMGT_CNTL@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	bl	_cgs_read_register
	str	x0, [x20, #56]
	ldr	w0, [x19]
Lloh26:
	adrp	x8, _mmMPLL_AD_FUNC_CNTL@GOTPAGE
Lloh27:
	ldr	x8, [x8, _mmMPLL_AD_FUNC_CNTL@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	bl	_cgs_read_register
	str	x0, [x20, #48]
	ldr	w0, [x19]
Lloh29:
	adrp	x8, _mmMPLL_DQ_FUNC_CNTL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _mmMPLL_DQ_FUNC_CNTL@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	bl	_cgs_read_register
	str	x0, [x20, #40]
	ldr	w0, [x19]
Lloh32:
	adrp	x8, _mmMPLL_FUNC_CNTL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _mmMPLL_FUNC_CNTL@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	bl	_cgs_read_register
	str	x0, [x20, #32]
	ldr	w0, [x19]
Lloh35:
	adrp	x8, _mmMPLL_FUNC_CNTL_1@GOTPAGE
Lloh36:
	ldr	x8, [x8, _mmMPLL_FUNC_CNTL_1@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	bl	_cgs_read_register
	str	x0, [x20, #24]
	ldr	w0, [x19]
Lloh38:
	adrp	x8, _mmMPLL_FUNC_CNTL_2@GOTPAGE
Lloh39:
	ldr	x8, [x8, _mmMPLL_FUNC_CNTL_2@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	bl	_cgs_read_register
	str	x0, [x20, #16]
	ldr	w0, [x19]
Lloh41:
	adrp	x8, _mmMPLL_SS1@GOTPAGE
Lloh42:
	ldr	x8, [x8, _mmMPLL_SS1@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
	bl	_cgs_read_register
	str	x0, [x20, #8]
	ldr	w0, [x19]
Lloh44:
	adrp	x8, _mmMPLL_SS2@GOTPAGE
Lloh45:
	ldr	x8, [x8, _mmMPLL_SS2@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
	bl	_cgs_read_register
	str	x0, [x20]
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_CGS_IND_REG__SMC,4,2           ; @CGS_IND_REG__SMC
	.comm	_ixCG_SPLL_FUNC_CNTL,4,2        ; @ixCG_SPLL_FUNC_CNTL
	.comm	_ixCG_SPLL_FUNC_CNTL_2,4,2      ; @ixCG_SPLL_FUNC_CNTL_2
	.comm	_ixCG_SPLL_FUNC_CNTL_3,4,2      ; @ixCG_SPLL_FUNC_CNTL_3
	.comm	_ixCG_SPLL_FUNC_CNTL_4,4,2      ; @ixCG_SPLL_FUNC_CNTL_4
	.comm	_ixCG_SPLL_SPREAD_SPECTRUM,4,2  ; @ixCG_SPLL_SPREAD_SPECTRUM
	.comm	_ixCG_SPLL_SPREAD_SPECTRUM_2,4,2 ; @ixCG_SPLL_SPREAD_SPECTRUM_2
	.comm	_mmDLL_CNTL,4,2                 ; @mmDLL_CNTL
	.comm	_mmMCLK_PWRMGT_CNTL,4,2         ; @mmMCLK_PWRMGT_CNTL
	.comm	_mmMPLL_AD_FUNC_CNTL,4,2        ; @mmMPLL_AD_FUNC_CNTL
	.comm	_mmMPLL_DQ_FUNC_CNTL,4,2        ; @mmMPLL_DQ_FUNC_CNTL
	.comm	_mmMPLL_FUNC_CNTL,4,2           ; @mmMPLL_FUNC_CNTL
	.comm	_mmMPLL_FUNC_CNTL_1,4,2         ; @mmMPLL_FUNC_CNTL_1
	.comm	_mmMPLL_FUNC_CNTL_2,4,2         ; @mmMPLL_FUNC_CNTL_2
	.comm	_mmMPLL_SS1,4,2                 ; @mmMPLL_SS1
	.comm	_mmMPLL_SS2,4,2                 ; @mmMPLL_SS2
	.no_dead_strip	_smu7_read_clock_registers
.subsections_via_symbols
