	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cnl_ddi_dp_set_dpll_hw_state
_cnl_ddi_dp_set_dpll_hw_state:          ## @cnl_ddi_dp_set_dpll_hw_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_DPLL_CFGCR0_SSC_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	(%rdi), %ecx
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	cmpl	$215999, %eax                   ## imm = 0x34BBF
	jg	LBB0_8
## %bb.1:
	cmpl	$134999, %eax                   ## imm = 0x20F57
	jg	LBB0_5
## %bb.2:
	cmpl	$81000, %eax                    ## imm = 0x13C68
	je	LBB0_15
## %bb.3:
	cmpl	$108000, %eax                   ## imm = 0x1A5E0
	jne	LBB0_20
## %bb.4:
	movq	_DPLL_CFGCR0_LINK_RATE_1080@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_8:
	cmpl	$323999, %eax                   ## imm = 0x4F19F
	jg	LBB0_12
## %bb.9:
	cmpl	$216000, %eax                   ## imm = 0x34BC0
	je	LBB0_17
## %bb.10:
	cmpl	$270000, %eax                   ## imm = 0x41EB0
	jne	LBB0_20
## %bb.11:
	movq	_DPLL_CFGCR0_LINK_RATE_2700@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_5:
	cmpl	$135000, %eax                   ## imm = 0x20F58
	je	LBB0_16
## %bb.6:
	cmpl	$162000, %eax                   ## imm = 0x278D0
	jne	LBB0_20
## %bb.7:
	movq	_DPLL_CFGCR0_LINK_RATE_1620@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_12:
	cmpl	$324000, %eax                   ## imm = 0x4F1A0
	je	LBB0_18
## %bb.13:
	cmpl	$405000, %eax                   ## imm = 0x62E08
	jne	LBB0_20
## %bb.14:
	movq	_DPLL_CFGCR0_LINK_RATE_4050@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_15:
	movq	_DPLL_CFGCR0_LINK_RATE_810@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_17:
	movq	_DPLL_CFGCR0_LINK_RATE_2160@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_16:
	movq	_DPLL_CFGCR0_LINK_RATE_1350@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_18:
	movq	_DPLL_CFGCR0_LINK_RATE_3240@GOTPCREL(%rip), %rax
LBB0_19:
	orl	(%rax), %r14d
LBB0_20:
	leaq	4(%rbx), %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movl	%r14d, 4(%rbx)
	movl	$1, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DPLL_CFGCR0_SSC_ENABLE,4,2     ## @DPLL_CFGCR0_SSC_ENABLE
	.comm	_DPLL_CFGCR0_LINK_RATE_810,4,2  ## @DPLL_CFGCR0_LINK_RATE_810
	.comm	_DPLL_CFGCR0_LINK_RATE_1350,4,2 ## @DPLL_CFGCR0_LINK_RATE_1350
	.comm	_DPLL_CFGCR0_LINK_RATE_2700,4,2 ## @DPLL_CFGCR0_LINK_RATE_2700
	.comm	_DPLL_CFGCR0_LINK_RATE_1620,4,2 ## @DPLL_CFGCR0_LINK_RATE_1620
	.comm	_DPLL_CFGCR0_LINK_RATE_1080,4,2 ## @DPLL_CFGCR0_LINK_RATE_1080
	.comm	_DPLL_CFGCR0_LINK_RATE_2160,4,2 ## @DPLL_CFGCR0_LINK_RATE_2160
	.comm	_DPLL_CFGCR0_LINK_RATE_3240,4,2 ## @DPLL_CFGCR0_LINK_RATE_3240
	.comm	_DPLL_CFGCR0_LINK_RATE_4050,4,2 ## @DPLL_CFGCR0_LINK_RATE_4050
	.no_dead_strip	_cnl_ddi_dp_set_dpll_hw_state
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cnl_ddi_dp_set_dpll_hw_state
_cnl_ddi_dp_set_dpll_hw_state:          ; @cnl_ddi_dp_set_dpll_hw_state
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _DPLL_CFGCR0_SSC_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DPLL_CFGCR0_SSC_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w20, [x8]
	ldr	w8, [x0]
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w8, w8, #1
	mov	w9, #19391
	movk	w9, #3, lsl #16
	cmp	w8, w9
	b.gt	LBB0_5
; %bb.1:
	mov	w9, #3927
	movk	w9, #2, lsl #16
	cmp	w8, w9
	b.gt	LBB0_9
; %bb.2:
	mov	w9, #15464
	movk	w9, #1, lsl #16
	cmp	w8, w9
	b.eq	LBB0_15
; %bb.3:
	mov	w9, #42464
	movk	w9, #1, lsl #16
	cmp	w8, w9
	b.ne	LBB0_20
; %bb.4:
Lloh3:
	adrp	x8, _DPLL_CFGCR0_LINK_RATE_1080@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DPLL_CFGCR0_LINK_RATE_1080@GOTPAGEOFF]
	b	LBB0_19
LBB0_5:
	mov	w9, #61855
	movk	w9, #4, lsl #16
	cmp	w8, w9
	b.gt	LBB0_12
; %bb.6:
	mov	w9, #19392
	movk	w9, #3, lsl #16
	cmp	w8, w9
	b.eq	LBB0_16
; %bb.7:
	mov	w9, #7856
	movk	w9, #4, lsl #16
	cmp	w8, w9
	b.ne	LBB0_20
; %bb.8:
Lloh5:
	adrp	x8, _DPLL_CFGCR0_LINK_RATE_2700@GOTPAGE
Lloh6:
	ldr	x8, [x8, _DPLL_CFGCR0_LINK_RATE_2700@GOTPAGEOFF]
	b	LBB0_19
LBB0_9:
	mov	w9, #3928
	movk	w9, #2, lsl #16
	cmp	w8, w9
	b.eq	LBB0_17
; %bb.10:
	mov	w9, #30928
	movk	w9, #2, lsl #16
	cmp	w8, w9
	b.ne	LBB0_20
; %bb.11:
Lloh7:
	adrp	x8, _DPLL_CFGCR0_LINK_RATE_1620@GOTPAGE
Lloh8:
	ldr	x8, [x8, _DPLL_CFGCR0_LINK_RATE_1620@GOTPAGEOFF]
	b	LBB0_19
LBB0_12:
	mov	w9, #61856
	movk	w9, #4, lsl #16
	cmp	w8, w9
	b.eq	LBB0_18
; %bb.13:
	mov	w9, #11784
	movk	w9, #6, lsl #16
	cmp	w8, w9
	b.ne	LBB0_20
; %bb.14:
Lloh9:
	adrp	x8, _DPLL_CFGCR0_LINK_RATE_4050@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DPLL_CFGCR0_LINK_RATE_4050@GOTPAGEOFF]
	b	LBB0_19
LBB0_15:
Lloh11:
	adrp	x8, _DPLL_CFGCR0_LINK_RATE_810@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DPLL_CFGCR0_LINK_RATE_810@GOTPAGEOFF]
	b	LBB0_19
LBB0_16:
Lloh13:
	adrp	x8, _DPLL_CFGCR0_LINK_RATE_2160@GOTPAGE
Lloh14:
	ldr	x8, [x8, _DPLL_CFGCR0_LINK_RATE_2160@GOTPAGEOFF]
	b	LBB0_19
LBB0_17:
Lloh15:
	adrp	x8, _DPLL_CFGCR0_LINK_RATE_1350@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DPLL_CFGCR0_LINK_RATE_1350@GOTPAGEOFF]
	b	LBB0_19
LBB0_18:
Lloh17:
	adrp	x8, _DPLL_CFGCR0_LINK_RATE_3240@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DPLL_CFGCR0_LINK_RATE_3240@GOTPAGEOFF]
LBB0_19:
	ldr	w8, [x8]
	orr	w20, w8, w20
LBB0_20:
	add	x0, x19, #4
	mov	w1, #0
	mov	w2, #4
	bl	_memset
	str	w20, [x19, #4]
	mov	w0, #1
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.comm	_DPLL_CFGCR0_SSC_ENABLE,4,2     ; @DPLL_CFGCR0_SSC_ENABLE
	.comm	_DPLL_CFGCR0_LINK_RATE_810,4,2  ; @DPLL_CFGCR0_LINK_RATE_810
	.comm	_DPLL_CFGCR0_LINK_RATE_1350,4,2 ; @DPLL_CFGCR0_LINK_RATE_1350
	.comm	_DPLL_CFGCR0_LINK_RATE_2700,4,2 ; @DPLL_CFGCR0_LINK_RATE_2700
	.comm	_DPLL_CFGCR0_LINK_RATE_1620,4,2 ; @DPLL_CFGCR0_LINK_RATE_1620
	.comm	_DPLL_CFGCR0_LINK_RATE_1080,4,2 ; @DPLL_CFGCR0_LINK_RATE_1080
	.comm	_DPLL_CFGCR0_LINK_RATE_2160,4,2 ; @DPLL_CFGCR0_LINK_RATE_2160
	.comm	_DPLL_CFGCR0_LINK_RATE_3240,4,2 ; @DPLL_CFGCR0_LINK_RATE_3240
	.comm	_DPLL_CFGCR0_LINK_RATE_4050,4,2 ; @DPLL_CFGCR0_LINK_RATE_4050
	.no_dead_strip	_cnl_ddi_dp_set_dpll_hw_state
.subsections_via_symbols
