	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function btc_apply_state_adjust_rules
_btc_apply_state_adjust_rules:          ## @btc_apply_state_adjust_rules
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	_rv770_get_ps
	movq	%rax, %r12
	cmpl	$1, (%r14)
	jle	LBB0_2
## %bb.1:
	xorl	%r9d, %r9d
	jmp	LBB0_3
LBB0_2:
	movq	%r14, %rdi
	callq	_btc_dpm_vblank_too_short
	testq	%rax, %rax
	sete	%r9b
LBB0_3:
	leaq	64(%r14), %r15
	leaq	16(%r14), %rax
	cmpl	$0, 4(%r14)
	cmoveq	%rax, %r15
	je	LBB0_5
## %bb.4:
	movq	(%r15), %rdx
	movq	8(%r15), %rsi
	jmp	LBB0_29
LBB0_5:
	movq	(%r15), %rdx
	cmpq	%rdx, 8(%r12)
	jle	LBB0_7
## %bb.6:
	movq	%rdx, 8(%r12)
LBB0_7:
	movq	8(%r15), %rsi
	cmpq	%rsi, 16(%r12)
	jle	LBB0_9
## %bb.8:
	movq	%rsi, 16(%r12)
LBB0_9:
	movq	16(%r15), %rax
	cmpq	%rax, 24(%r12)
	jle	LBB0_11
## %bb.10:
	movq	%rax, 24(%r12)
LBB0_11:
	movq	24(%r15), %rcx
	cmpq	%rcx, 32(%r12)
	jg	LBB0_12
## %bb.13:
	cmpq	%rdx, 48(%r12)
	jg	LBB0_14
LBB0_15:
	cmpq	%rsi, 56(%r12)
	jg	LBB0_16
LBB0_17:
	cmpq	%rax, 64(%r12)
	jg	LBB0_18
LBB0_19:
	cmpq	%rcx, 72(%r12)
	jg	LBB0_20
LBB0_21:
	cmpq	%rdx, 88(%r12)
	jg	LBB0_22
LBB0_23:
	cmpq	%rsi, 96(%r12)
	jg	LBB0_24
LBB0_25:
	cmpq	%rax, 104(%r12)
	jg	LBB0_26
LBB0_27:
	cmpq	%rcx, 112(%r12)
	jle	LBB0_29
LBB0_28:
	movq	%rcx, 112(%r12)
LBB0_29:
	leaq	32(%r12), %rax
	leaq	88(%r12), %r8
	leaq	112(%r12), %rdi
	leaq	96(%r12), %rcx
	leaq	8(%r12), %rbx
	movl	%r9d, -64(%rbp)                 ## 4-byte Spill
	testb	%r9b, %r9b
	movq	%rax, -96(%rbp)                 ## 8-byte Spill
	movq	%rdi, -104(%rbp)                ## 8-byte Spill
	cmovneq	%rdi, %rax
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	cmovneq	%r8, %rdi
	movq	(%rax), %r13
	movq	(%rdi), %rax
	movq	%rax, 88(%r12)
	movq	%r13, 112(%r12)
	movq	%r14, %rdi
	movq	%r8, -56(%rbp)                  ## 8-byte Spill
	callq	_btc_skip_blacklist_clocks
	leaq	56(%r12), %rcx
	movq	56(%r12), %rax
	movq	96(%r12), %rdx
	cmpq	%rdx, %rax
	jge	LBB0_31
## %bb.30:
	movq	%rdx, (%rcx)
	movq	%rdx, %rax
LBB0_31:
	leaq	64(%r12), %rdx
	movq	%rdx, -72(%rbp)                 ## 8-byte Spill
	movq	64(%r12), %rdx
	movq	104(%r12), %rsi
	cmpq	%rsi, %rdx
	jge	LBB0_33
## %bb.32:
	movq	-72(%rbp), %rdx                 ## 8-byte Reload
	movq	%rsi, (%rdx)
	movq	%rsi, %rdx
LBB0_33:
	leaq	16(%r12), %rsi
	cmpq	%rax, 16(%r12)
	movq	-96(%rbp), %rdi                 ## 8-byte Reload
	jge	LBB0_35
## %bb.34:
	movq	%rax, (%rsi)
LBB0_35:
	leaq	24(%r12), %rax
	cmpq	%rdx, 24(%r12)
	jge	LBB0_37
## %bb.36:
	movq	%rdx, (%rax)
LBB0_37:
	movq	%rax, -120(%rbp)                ## 8-byte Spill
	leaq	104(%r12), %rax
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	leaq	48(%r12), %rbx
	cmpb	$0, -64(%rbp)                   ## 1-byte Folded Reload
	movq	%rsi, -80(%rbp)                 ## 8-byte Spill
	je	LBB0_38
## %bb.39:
	movq	(%rbx), %rax
	movq	-56(%rbp), %rdx                 ## 8-byte Reload
	movq	(%rdx), %rdx
	cmpq	%rdx, %rax
	jge	LBB0_41
## %bb.40:
	movq	%rdx, (%rbx)
	movq	%rdx, %rax
LBB0_41:
	movq	72(%r12), %r13
	movq	112(%r12), %rdx
	cmpq	%rdx, %r13
	jge	LBB0_43
## %bb.42:
	movq	%rdx, 72(%r12)
	movq	%rdx, %r13
LBB0_43:
	movq	-48(%rbp), %rdx                 ## 8-byte Reload
	cmpq	%rax, (%rdx)
	jge	LBB0_45
## %bb.44:
	movq	-48(%rbp), %rdx                 ## 8-byte Reload
	movq	%rax, (%rdx)
LBB0_45:
	cmpq	%r13, (%rdi)
	jl	LBB0_46
	jmp	LBB0_47
LBB0_38:
	movq	88(%r12), %rax
	movq	8(%r12), %rdx
	movq	48(%r12), %rsi
	cmpq	%rsi, %rax
	cmovgq	%rax, %rsi
	cmpq	%rdx, %rsi
	cmovleq	%rdx, %rsi
	movq	%rsi, 88(%r12)
	movq	%r13, 112(%r12)
	movq	%rsi, 48(%r12)
	movq	%r13, 72(%r12)
	movq	%rsi, 8(%r12)
LBB0_46:
	movq	%r13, (%rdi)
LBB0_47:
	movq	(%r15), %rdx
	movq	8(%r15), %rsi
	movq	%r14, %rdi
	movq	%rbx, %r13
	movq	%rbx, %r8
	callq	_btc_skip_blacklist_clocks
	movq	(%r15), %rdx
	movq	8(%r15), %rsi
	movq	%r14, %rdi
	movq	-80(%rbp), %rcx                 ## 8-byte Reload
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %r8
	callq	_btc_skip_blacklist_clocks
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	-56(%rbp), %rdx                 ## 8-byte Reload
	callq	_btc_adjust_clock_combinations
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	callq	_btc_adjust_clock_combinations
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rbx, %rdx
	callq	_btc_adjust_clock_combinations
	leaq	60(%r14), %rdi
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	movq	96(%r12), %rsi
	movq	16(%r15), %rdx
	movq	-88(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rcx
	callq	_btc_apply_voltage_dependency_rules
	leaq	56(%r14), %r13
	movq	88(%r12), %rsi
	movq	24(%r15), %rdx
	movq	%r13, %rdi
	movq	%r13, -112(%rbp)                ## 8-byte Spill
	movq	-104(%rbp), %rcx                ## 8-byte Reload
	callq	_btc_apply_voltage_dependency_rules
	leaq	52(%r14), %rdi
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	movq	88(%r12), %rsi
	movq	16(%r15), %rdx
	movq	%rbx, %rcx
	callq	_btc_apply_voltage_dependency_rules
	leaq	48(%r14), %rdi
	movq	%rdi, -64(%rbp)                 ## 8-byte Spill
	movq	96(%r14), %rsi
	movq	16(%r15), %rdx
	movq	%rbx, %rcx
	callq	_btc_apply_voltage_dependency_rules
	movq	56(%r12), %rsi
	movq	16(%r15), %rdx
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rcx
	callq	_btc_apply_voltage_dependency_rules
	movq	48(%r12), %rsi
	movq	24(%r15), %rdx
	movq	%r12, %rcx
	addq	$72, %rcx
	movq	%rcx, -80(%rbp)                 ## 8-byte Spill
	movq	%r13, %rdi
	callq	_btc_apply_voltage_dependency_rules
	movq	48(%r12), %rsi
	movq	16(%r15), %rdx
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%rbx, %rcx
	callq	_btc_apply_voltage_dependency_rules
	movq	96(%r14), %rsi
	movq	16(%r15), %rdx
	movq	-64(%rbp), %rdi                 ## 8-byte Reload
	movq	%rbx, %rcx
	callq	_btc_apply_voltage_dependency_rules
	movq	16(%r12), %rsi
	movq	16(%r15), %rdx
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movq	-120(%rbp), %r13                ## 8-byte Reload
	movq	%r13, %rcx
	callq	_btc_apply_voltage_dependency_rules
	movq	8(%r12), %rsi
	movq	24(%r15), %rdx
	movq	-112(%rbp), %rdi                ## 8-byte Reload
	movq	-96(%rbp), %rcx                 ## 8-byte Reload
	callq	_btc_apply_voltage_dependency_rules
	movq	8(%r12), %rsi
	movq	16(%r15), %rdx
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	movq	%r13, %rcx
	callq	_btc_apply_voltage_dependency_rules
	movq	96(%r14), %rsi
	movq	16(%r15), %rdx
	movq	-64(%rbp), %rdi                 ## 8-byte Reload
	movq	%r13, %rcx
	callq	_btc_apply_voltage_dependency_rules
	movq	16(%r15), %rsi
	movq	24(%r15), %rdx
	movq	%r14, %rdi
	movq	-88(%rbp), %rcx                 ## 8-byte Reload
	movq	-104(%rbp), %r8                 ## 8-byte Reload
	callq	_btc_apply_voltage_delta_rules
	movq	16(%r15), %rsi
	movq	24(%r15), %rdx
	movq	%r14, %rdi
	movq	%rbx, %rcx
	movq	-80(%rbp), %r8                  ## 8-byte Reload
	callq	_btc_apply_voltage_delta_rules
	movq	16(%r15), %rsi
	movq	24(%r15), %rdx
	movq	%r14, %rdi
	movq	%r13, %rcx
	movq	-96(%rbp), %r8                  ## 8-byte Reload
	callq	_btc_apply_voltage_delta_rules
	movq	24(%r12), %rax
	movq	32(%r14), %rcx
	cmpq	%rcx, %rax
	jg	LBB0_51
## %bb.48:
	movq	-72(%rbp), %rdx                 ## 8-byte Reload
	cmpq	%rcx, (%rdx)
	jg	LBB0_51
## %bb.49:
	movq	-88(%rbp), %rdx                 ## 8-byte Reload
	movq	(%rdx), %rdx
	cmpq	%rcx, %rdx
	jle	LBB0_50
LBB0_51:
	movl	$0, (%r12)
	movq	104(%r12), %rdx
LBB0_52:
	movq	8(%r14), %rcx
	cmpq	%rcx, %rdx
	jge	LBB0_54
## %bb.53:
	movq	_ATOM_PPLIB_R600_FLAGS_PCIEGEN2@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	notl	%edx
	andl	%edx, 120(%r12)
LBB0_54:
	movq	-72(%rbp), %rdx                 ## 8-byte Reload
	cmpq	%rcx, (%rdx)
	jge	LBB0_56
## %bb.55:
	movq	_ATOM_PPLIB_R600_FLAGS_PCIEGEN2@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	notl	%edx
	andl	%edx, 80(%r12)
LBB0_56:
	cmpq	%rcx, %rax
	jge	LBB0_58
## %bb.57:
	movq	_ATOM_PPLIB_R600_FLAGS_PCIEGEN2@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 40(%r12)
LBB0_58:
	addq	$88, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_12:
	movq	%rcx, 32(%r12)
	cmpq	%rdx, 48(%r12)
	jle	LBB0_15
LBB0_14:
	movq	%rdx, 48(%r12)
	cmpq	%rsi, 56(%r12)
	jle	LBB0_17
LBB0_16:
	movq	%rsi, 56(%r12)
	cmpq	%rax, 64(%r12)
	jle	LBB0_19
LBB0_18:
	movq	%rax, 64(%r12)
	cmpq	%rcx, 72(%r12)
	jle	LBB0_21
LBB0_20:
	movq	%rcx, 72(%r12)
	cmpq	%rdx, 88(%r12)
	jle	LBB0_23
LBB0_22:
	movq	%rdx, 88(%r12)
	cmpq	%rsi, 96(%r12)
	jle	LBB0_25
LBB0_24:
	movq	%rsi, 96(%r12)
	cmpq	%rax, 104(%r12)
	jle	LBB0_27
LBB0_26:
	movq	%rax, 104(%r12)
	cmpq	%rcx, 112(%r12)
	jg	LBB0_28
	jmp	LBB0_29
LBB0_50:
	movl	$1, (%r12)
	jmp	LBB0_52
	.cfi_endproc
                                        ## -- End function
	.comm	_ATOM_PPLIB_R600_FLAGS_PCIEGEN2,4,2 ## @ATOM_PPLIB_R600_FLAGS_PCIEGEN2
	.no_dead_strip	_btc_apply_state_adjust_rules
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function btc_apply_state_adjust_rules
_btc_apply_state_adjust_rules:          ; @btc_apply_state_adjust_rules
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x0
	mov	x0, x1
	bl	_rv770_get_ps
	mov	x19, x0
	ldr	w8, [x20]
	cmp	w8, #1
	b.le	LBB0_2
; %bb.1:
	mov	w26, #0
	b	LBB0_3
LBB0_2:
	mov	x0, x20
	bl	_btc_dpm_vblank_too_short
	cmp	x0, #0
	cset	w26, eq
LBB0_3:
	ldr	w8, [x20, #4]
	add	x9, x20, #64
	add	x10, x20, #16
	cmp	w8, #0
	csel	x21, x10, x9, eq
	cbz	w8, LBB0_5
; %bb.4:
	ldp	x2, x1, [x21]
	b	LBB0_29
LBB0_5:
	ldr	x8, [x19, #8]
	ldr	x2, [x21]
	cmp	x8, x2
	b.le	LBB0_7
; %bb.6:
	str	x2, [x19, #8]
LBB0_7:
	ldr	x8, [x19, #16]
	ldr	x1, [x21, #8]
	cmp	x8, x1
	b.le	LBB0_9
; %bb.8:
	str	x1, [x19, #16]
LBB0_9:
	ldr	x9, [x19, #24]
	ldr	x8, [x21, #16]
	cmp	x9, x8
	b.le	LBB0_11
; %bb.10:
	str	x8, [x19, #24]
LBB0_11:
	ldr	x10, [x19, #32]
	ldr	x9, [x21, #24]
	cmp	x10, x9
	b.le	LBB0_13
; %bb.12:
	str	x9, [x19, #32]
LBB0_13:
	ldr	x10, [x19, #48]
	cmp	x10, x2
	b.le	LBB0_15
; %bb.14:
	str	x2, [x19, #48]
LBB0_15:
	ldr	x10, [x19, #56]
	cmp	x10, x1
	b.le	LBB0_17
; %bb.16:
	str	x1, [x19, #56]
LBB0_17:
	ldr	x10, [x19, #64]
	cmp	x10, x8
	b.le	LBB0_19
; %bb.18:
	str	x8, [x19, #64]
LBB0_19:
	ldr	x10, [x19, #72]
	cmp	x10, x9
	b.le	LBB0_21
; %bb.20:
	str	x9, [x19, #72]
LBB0_21:
	ldr	x10, [x19, #88]
	cmp	x10, x2
	b.le	LBB0_23
; %bb.22:
	str	x2, [x19, #88]
LBB0_23:
	ldr	x10, [x19, #96]
	cmp	x10, x1
	b.le	LBB0_25
; %bb.24:
	str	x1, [x19, #96]
LBB0_25:
	ldr	x10, [x19, #104]
	cmp	x10, x8
	b.le	LBB0_27
; %bb.26:
	str	x8, [x19, #104]
LBB0_27:
	ldr	x8, [x19, #112]
	cmp	x8, x9
	b.le	LBB0_29
; %bb.28:
	str	x9, [x19, #112]
LBB0_29:
	cmp	w26, #0
	mov	w8, #8
	mov	w9, #88
	csel	x8, x9, x8, ne
	mov	w9, #32
	mov	w10, #112
	csel	x9, x10, x9, ne
	add	x3, x19, #96
	ldr	x24, [x19, x9]
	ldr	x8, [x19, x8]
	mov	x27, x19
	str	x8, [x27, #88]!
	mov	x8, x19
	str	x24, [x8, #112]!
	str	x8, [sp, #24]                   ; 8-byte Folded Spill
	mov	x0, x20
	mov	x4, x27
	bl	_btc_skip_blacklist_clocks
	mov	x3, x19
	ldr	x8, [x3, #56]!
	ldr	x9, [x19, #96]
	cmp	x8, x9
	b.ge	LBB0_31
; %bb.30:
	str	x9, [x3]
	mov	x8, x9
LBB0_31:
	mov	x22, x19
	ldr	x9, [x22, #64]!
	ldr	x10, [x22, #40]
	cmp	x9, x10
	b.ge	LBB0_33
; %bb.32:
	str	x10, [x22]
	mov	x9, x10
LBB0_33:
	mov	x23, x19
	ldr	x10, [x23, #16]!
	cmp	x10, x8
	b.ge	LBB0_35
; %bb.34:
	str	x8, [x23]
LBB0_35:
	sub	x10, x3, #24
	sub	x25, x3, #8
	sub	x28, x23, #8
	mov	x11, x19
	ldr	x8, [x11, #24]!
	cmp	x8, x9
	b.ge	LBB0_37
; %bb.36:
	str	x9, [x11]
LBB0_37:
	add	x8, x3, #48
	stp	x11, x8, [sp, #8]               ; 16-byte Folded Spill
	tbz	w26, #0, LBB0_45
; %bb.38:
	ldr	x8, [x25]
	ldr	x9, [x27]
	cmp	x8, x9
	b.ge	LBB0_40
; %bb.39:
	str	x9, [x25]
	mov	x8, x9
LBB0_40:
	ldr	x24, [x19, #72]
	ldr	x9, [x19, #112]
	cmp	x24, x9
	b.ge	LBB0_42
; %bb.41:
	str	x9, [x19, #72]
	mov	x24, x9
LBB0_42:
	ldr	x9, [x28]
	cmp	x9, x8
	b.ge	LBB0_44
; %bb.43:
	str	x8, [x28]
LBB0_44:
	ldr	x8, [x10]
	cmp	x8, x24
	b.lt	LBB0_46
	b	LBB0_47
LBB0_45:
	ldr	x8, [x19, #88]
	ldr	x9, [x19, #48]
	cmp	x8, x9
	csel	x8, x8, x9, gt
	ldr	x9, [x19, #8]
	cmp	x8, x9
	csel	x8, x8, x9, gt
	str	x8, [x19, #88]
	str	x24, [x19, #112]
	str	x8, [x19, #48]
	str	x24, [x19, #72]
	str	x8, [x19, #8]
LBB0_46:
	str	x24, [x10]
LBB0_47:
	ldp	x2, x1, [x21]
	mov	x0, x20
	str	x10, [sp]                       ; 8-byte Folded Spill
	mov	x4, x25
	bl	_btc_skip_blacklist_clocks
	ldp	x2, x1, [x21]
	mov	x0, x20
	mov	x3, x23
	mov	x4, x28
	bl	_btc_skip_blacklist_clocks
	mov	x0, x20
	mov	x1, x21
	mov	x2, x27
	bl	_btc_adjust_clock_combinations
	mov	x0, x20
	mov	x1, x21
	mov	x2, x25
	bl	_btc_adjust_clock_combinations
	mov	x0, x20
	mov	x1, x21
	mov	x2, x28
	bl	_btc_adjust_clock_combinations
	add	x23, x20, #60
	ldr	x1, [x19, #96]
	ldr	x2, [x21, #16]
	mov	x0, x23
	ldr	x26, [sp, #16]                  ; 8-byte Folded Reload
	mov	x3, x26
	bl	_btc_apply_voltage_dependency_rules
	add	x25, x20, #56
	ldr	x1, [x19, #88]
	ldr	x2, [x21, #24]
	mov	x0, x25
	ldr	x3, [sp, #24]                   ; 8-byte Folded Reload
	bl	_btc_apply_voltage_dependency_rules
	add	x28, x20, #52
	ldr	x1, [x19, #88]
	ldr	x2, [x21, #16]
	mov	x0, x28
	mov	x3, x26
	bl	_btc_apply_voltage_dependency_rules
	add	x24, x20, #48
	ldr	x1, [x20, #96]
	ldr	x2, [x21, #16]
	mov	x0, x24
	mov	x3, x26
	bl	_btc_apply_voltage_dependency_rules
	ldr	x1, [x19, #56]
	ldr	x2, [x21, #16]
	mov	x0, x23
	mov	x3, x22
	bl	_btc_apply_voltage_dependency_rules
	ldr	x1, [x19, #48]
	ldr	x2, [x21, #24]
	add	x27, x19, #72
	mov	x0, x25
	mov	x3, x27
	bl	_btc_apply_voltage_dependency_rules
	ldr	x1, [x19, #48]
	ldr	x2, [x21, #16]
	mov	x0, x28
	mov	x3, x22
	bl	_btc_apply_voltage_dependency_rules
	ldr	x1, [x20, #96]
	ldr	x2, [x21, #16]
	mov	x0, x24
	mov	x3, x22
	bl	_btc_apply_voltage_dependency_rules
	ldr	x1, [x19, #16]
	ldr	x2, [x21, #16]
	mov	x0, x23
	ldr	x23, [sp, #8]                   ; 8-byte Folded Reload
	mov	x3, x23
	bl	_btc_apply_voltage_dependency_rules
	ldr	x1, [x19, #8]
	ldr	x2, [x21, #24]
	mov	x0, x25
	ldr	x25, [sp]                       ; 8-byte Folded Reload
	mov	x3, x25
	bl	_btc_apply_voltage_dependency_rules
	ldr	x1, [x19, #8]
	ldr	x2, [x21, #16]
	mov	x0, x28
	mov	x3, x23
	bl	_btc_apply_voltage_dependency_rules
	ldr	x1, [x20, #96]
	ldr	x2, [x21, #16]
	mov	x0, x24
	mov	x3, x23
	bl	_btc_apply_voltage_dependency_rules
	ldp	x1, x2, [x21, #16]
	mov	x0, x20
	mov	x3, x26
	ldr	x4, [sp, #24]                   ; 8-byte Folded Reload
	bl	_btc_apply_voltage_delta_rules
	ldp	x1, x2, [x21, #16]
	mov	x0, x20
	mov	x3, x22
	mov	x4, x27
	bl	_btc_apply_voltage_delta_rules
	ldp	x1, x2, [x21, #16]
	mov	x0, x20
	mov	x3, x23
	mov	x4, x25
	bl	_btc_apply_voltage_delta_rules
	ldr	x8, [x19, #24]
	ldr	x9, [x20, #32]
	cmp	x8, x9
	b.gt	LBB0_50
; %bb.48:
	ldr	x10, [x22]
	cmp	x10, x9
	b.gt	LBB0_50
; %bb.49:
	ldr	x10, [sp, #16]                  ; 8-byte Folded Reload
	ldr	x11, [x10]
	cmp	x11, x9
	b.le	LBB0_58
LBB0_50:
	str	wzr, [x19]
	ldr	x11, [x19, #104]
LBB0_51:
	ldr	x10, [x20, #8]
Lloh0:
	adrp	x9, _ATOM_PPLIB_R600_FLAGS_PCIEGEN2@GOTPAGE
Lloh1:
	ldr	x9, [x9, _ATOM_PPLIB_R600_FLAGS_PCIEGEN2@GOTPAGEOFF]
	cmp	x11, x10
	b.ge	LBB0_53
; %bb.52:
	ldr	w11, [x9]
	ldr	w12, [x19, #120]
	bic	w11, w12, w11
	str	w11, [x19, #120]
LBB0_53:
	ldr	x11, [x22]
	cmp	x11, x10
	b.ge	LBB0_55
; %bb.54:
	ldr	w11, [x9]
	ldr	w12, [x19, #80]
	bic	w11, w12, w11
	str	w11, [x19, #80]
LBB0_55:
	cmp	x8, x10
	b.ge	LBB0_57
; %bb.56:
	ldr	w8, [x9]
	ldr	w9, [x19, #40]
	bic	w8, w9, w8
	str	w8, [x19, #40]
LBB0_57:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_58:
	mov	w9, #1
	str	w9, [x19]
	b	LBB0_51
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_ATOM_PPLIB_R600_FLAGS_PCIEGEN2,4,2 ; @ATOM_PPLIB_R600_FLAGS_PCIEGEN2
	.no_dead_strip	_btc_apply_state_adjust_rules
.subsections_via_symbols
