	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dce_v11_0_vga_enable
_dce_v11_0_vga_enable:                  ## @dce_v11_0_vga_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	callq	_to_amdgpu_crtc
	movq	%rax, %rbx
	movq	_vga_control_regs@GOTPCREL(%rip), %r15
	movq	(%r15), %rax
	movq	(%rbx), %rcx
	movl	(%rax,%rcx,4), %edi
	callq	_RREG32
	testl	%r14d, %r14d
	je	LBB0_3
## %bb.1:
	movq	(%r15), %rcx
	movq	(%rbx), %rdx
	movl	(%rcx,%rdx,4), %edi
	orl	$1, %eax
	jmp	LBB0_2
LBB0_3:
	andl	$-2, %eax
	movq	(%r15), %rcx
	movq	(%rbx), %rdx
	movl	(%rcx,%rdx,4), %edi
LBB0_2:
	movl	%eax, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_vga_control_regs,8,3           ## @vga_control_regs
	.no_dead_strip	_dce_v11_0_vga_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dce_v11_0_vga_enable
_dce_v11_0_vga_enable:                  ; @dce_v11_0_vga_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	bl	_to_amdgpu_crtc
	mov	x19, x0
Lloh0:
	adrp	x21, _vga_control_regs@GOTPAGE
Lloh1:
	ldr	x21, [x21, _vga_control_regs@GOTPAGEOFF]
	ldr	x8, [x21]
	ldr	x9, [x0]
	ldr	w0, [x8, x9, lsl #2]
	bl	_RREG32
	cbz	w20, LBB0_2
; %bb.1:
	ldr	x8, [x21]
	ldr	x9, [x19]
	ldr	w8, [x8, x9, lsl #2]
	orr	w1, w0, #0x1
	mov	x0, x8
	b	LBB0_3
LBB0_2:
	and	w1, w0, #0xfffffffe
	ldr	x8, [x21]
	ldr	x9, [x19]
	ldr	w0, [x8, x9, lsl #2]
LBB0_3:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_WREG32
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_vga_control_regs,8,3           ; @vga_control_regs
	.no_dead_strip	_dce_v11_0_vga_enable
.subsections_via_symbols
