	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_dce112_set_dprefclk            ## -- Begin function dce112_set_dprefclk
	.p2align	4, 0x90
_dce112_set_dprefclk:                   ## @dce112_set_dprefclk
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	8(%rax), %r15
	leaq	-48(%rbp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$24, %edx
	callq	_memset
	movl	$0, -48(%rbp)
	movq	_CLOCK_SOURCE_ID_DFS@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -40(%rbp)
	movq	_DCECLOCK_TYPE_DPREFCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -28(%rbp)
	movq	(%rbx), %rax
	movl	(%rax), %edi
	callq	_ASICREV_IS_VEGA20_P
	testl	%eax, %eax
	sete	%al
	movq	-40(%rbp), %rcx
	movq	_CLOCK_SOURCE_COMBO_DISPLAY_PLL0@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	sete	%cl
	andb	%al, %cl
	movzbl	%cl, %eax
	movl	%eax, -32(%rbp)
	movq	(%r15), %rax
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	*(%rax)
	movl	-48(%rbp), %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CLOCK_SOURCE_ID_DFS,8,3        ## @CLOCK_SOURCE_ID_DFS
	.comm	_DCECLOCK_TYPE_DPREFCLK,4,2     ## @DCECLOCK_TYPE_DPREFCLK
	.comm	_CLOCK_SOURCE_COMBO_DISPLAY_PLL0,8,3 ## @CLOCK_SOURCE_COMBO_DISPLAY_PLL0
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_dce112_set_dprefclk            ; -- Begin function dce112_set_dprefclk
	.p2align	2
_dce112_set_dprefclk:                   ; @dce112_set_dprefclk
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0]
	ldr	x20, [x8, #8]
	add	x0, sp, #8
	mov	w1, #0
	mov	w2, #24
	bl	_memset
	str	wzr, [sp, #8]
Lloh0:
	adrp	x8, _CLOCK_SOURCE_ID_DFS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CLOCK_SOURCE_ID_DFS@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #16]
Lloh3:
	adrp	x8, _DCECLOCK_TYPE_DPREFCLK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DCECLOCK_TYPE_DPREFCLK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	str	w8, [sp, #28]
	ldr	x8, [x19]
	ldr	w0, [x8]
	bl	_ASICREV_IS_VEGA20_P
	cmp	w0, #0
	ldr	x8, [sp, #16]
Lloh6:
	adrp	x9, _CLOCK_SOURCE_COMBO_DISPLAY_PLL0@GOTPAGE
Lloh7:
	ldr	x9, [x9, _CLOCK_SOURCE_COMBO_DISPLAY_PLL0@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	ccmp	x8, x9, #0, eq
	cset	w8, eq
	str	w8, [sp, #24]
	ldr	x8, [x20]
	ldr	x8, [x8]
	add	x1, sp, #8
	mov	x0, x20
	blr	x8
	ldr	w0, [sp, #8]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CLOCK_SOURCE_ID_DFS,8,3        ; @CLOCK_SOURCE_ID_DFS
	.comm	_DCECLOCK_TYPE_DPREFCLK,4,2     ; @DCECLOCK_TYPE_DPREFCLK
	.comm	_CLOCK_SOURCE_COMBO_DISPLAY_PLL0,8,3 ; @CLOCK_SOURCE_COMBO_DISPLAY_PLL0
.subsections_via_symbols
