	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function dce_v10_0_sw_init
LCPI0_0:
	.long	1                               ## 0x1
	.long	16384                           ## 0x4000
	.long	16384                           ## 0x4000
	.long	24                              ## 0x18
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_dce_v10_0_sw_init:                     ## @dce_v10_0_sw_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	leaq	28(%rdi), %r15
	movl	$1, %ebx
	movq	_AMDGPU_IRQ_CLIENTID_LEGACY@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	leal	-1(%rbx), %eax
	cmpl	(%r14), %eax
	jge	LBB0_3
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	(%r12), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	movq	%r15, %rcx
	callq	_amdgpu_irq_add_id
	incl	%ebx
	testl	%eax, %eax
	je	LBB0_1
	jmp	LBB0_17
LBB0_3:
	movq	_VISLANDS30_IV_SRCID_D1_GRPH_PFLIP@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	cmpl	$19, %ebx
	jg	LBB0_7
## %bb.4:
	leaq	24(%r14), %r15
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	movq	%r15, %rcx
	callq	_amdgpu_irq_add_id
	testl	%eax, %eax
	jne	LBB0_17
## %bb.5:                               ##   in Loop: Header=BB0_6 Depth=1
	leal	2(%rbx), %eax
	cmpl	$17, %ebx
	movl	%eax, %ebx
	jle	LBB0_6
LBB0_7:
	movl	(%r12), %esi
	movq	_VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	20(%r14), %rcx
	movq	%r14, %rdi
	callq	_amdgpu_irq_add_id
	testl	%eax, %eax
	jne	LBB0_17
## %bb.8:
	movq	8(%r14), %rax
	movq	_amdgpu_mode_funcs@GOTPCREL(%rip), %rcx
	movq	%rcx, 24(%rax)
	movaps	LCPI0_0(%rip), %xmm0            ## xmm0 = [1,16384,16384,24]
	movups	%xmm0, (%rax)
	movl	$1, 16(%rax)
	movl	16(%r14), %ecx
	movl	%ecx, 20(%rax)
	movq	%r14, %rdi
	callq	_amdgpu_display_modeset_create_props
	testl	%eax, %eax
	je	LBB0_9
LBB0_17:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_9:
	movq	8(%r14), %rax
	movabsq	$70368744194048, %rcx           ## imm = 0x400000004000
	movq	%rcx, 4(%rax)
	cmpl	$0, (%r14)
	jle	LBB0_13
## %bb.10:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_12:                                ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_dce_v10_0_crtc_init
	testl	%eax, %eax
	jne	LBB0_17
## %bb.11:                              ##   in Loop: Header=BB0_12 Depth=1
	incl	%ebx
	cmpl	(%r14), %ebx
	jl	LBB0_12
LBB0_13:
	movq	%r14, %rdi
	callq	_amdgpu_atombios_get_connector_info_from_object_table
	testq	%rax, %rax
	je	LBB0_18
## %bb.14:
	movq	8(%r14), %rdi
	callq	_amdgpu_display_print_display_setup
	movq	%r14, %rdi
	callq	_dce_v10_0_afmt_init
	testl	%eax, %eax
	jne	LBB0_17
## %bb.15:
	movq	%r14, %rdi
	callq	_dce_v10_0_audio_init
	testl	%eax, %eax
	jne	LBB0_17
## %bb.16:
	movq	8(%r14), %rdi
	callq	_drm_kms_helper_poll_init
	movl	$1, 4(%r14)
	xorl	%eax, %eax
	jmp	LBB0_17
LBB0_18:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_17
	.cfi_endproc
                                        ## -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ## @AMDGPU_IRQ_CLIENTID_LEGACY
	.comm	_VISLANDS30_IV_SRCID_D1_GRPH_PFLIP,4,2 ## @VISLANDS30_IV_SRCID_D1_GRPH_PFLIP
	.comm	_VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A,4,2 ## @VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A
	.comm	_amdgpu_mode_funcs,4,2          ## @amdgpu_mode_funcs
	.comm	_EINVAL,4,2                     ## @EINVAL
	.no_dead_strip	_dce_v10_0_sw_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ; -- Begin function dce_v10_0_sw_init
lCPI0_0:
	.long	1                               ; 0x1
	.long	16384                           ; 0x4000
	.long	16384                           ; 0x4000
	.long	24                              ; 0x18
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_dce_v10_0_sw_init:                     ; @dce_v10_0_sw_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	add	x20, x0, #28
	mov	w21, #1
Lloh0:
	adrp	x22, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGE
Lloh1:
	ldr	x22, [x22, _AMDGPU_IRQ_CLIENTID_LEGACY@GOTPAGEOFF]
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
	sub	w8, w21, #1
	ldr	w9, [x19]
	cmp	w8, w9
	b.ge	LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	ldr	w1, [x22]
	mov	x0, x19
	mov	x2, x21
	mov	x3, x20
	bl	_amdgpu_irq_add_id
	add	w21, w21, #1
	cbz	w0, LBB0_1
	b	LBB0_9
LBB0_3:
Lloh2:
	adrp	x8, _VISLANDS30_IV_SRCID_D1_GRPH_PFLIP@GOTPAGE
Lloh3:
	ldr	x8, [x8, _VISLANDS30_IV_SRCID_D1_GRPH_PFLIP@GOTPAGEOFF]
Lloh4:
	ldr	w20, [x8]
	cmp	w20, #19
	b.gt	LBB0_7
; %bb.4:
	add	x21, x19, #24
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x22]
	mov	x0, x19
	mov	x2, x20
	mov	x3, x21
	bl	_amdgpu_irq_add_id
	cbnz	w0, LBB0_9
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	add	w8, w20, #2
	cmp	w20, #17
	mov	x20, x8
	b.le	LBB0_5
LBB0_7:
	ldr	w1, [x22]
Lloh5:
	adrp	x8, _VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A@GOTPAGE
Lloh6:
	ldr	x8, [x8, _VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	add	x3, x19, #20
	mov	x0, x19
	bl	_amdgpu_irq_add_id
	cbnz	w0, LBB0_9
; %bb.8:
	ldr	x8, [x19, #8]
Lloh8:
	adrp	x9, _amdgpu_mode_funcs@GOTPAGE
Lloh9:
	ldr	x9, [x9, _amdgpu_mode_funcs@GOTPAGEOFF]
	str	x9, [x8, #24]
Lloh10:
	adrp	x9, lCPI0_0@PAGE
Lloh11:
	ldr	q0, [x9, lCPI0_0@PAGEOFF]
	str	q0, [x8]
	mov	w9, #1
	ldr	w10, [x19, #16]
	stp	w9, w10, [x8, #16]
	mov	x0, x19
	bl	_amdgpu_display_modeset_create_props
	cbz	w0, LBB0_10
LBB0_9:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_10:
	ldr	x8, [x19, #8]
	movi.2s	v0, #64, lsl #8
	stur	d0, [x8, #4]
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_14
; %bb.11:
	mov	w20, #0
LBB0_12:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x20
	bl	_dce_v10_0_crtc_init
	cbnz	w0, LBB0_9
; %bb.13:                               ;   in Loop: Header=BB0_12 Depth=1
	add	w20, w20, #1
	ldr	w8, [x19]
	cmp	w20, w8
	b.lt	LBB0_12
LBB0_14:
	mov	x0, x19
	bl	_amdgpu_atombios_get_connector_info_from_object_table
	cbz	x0, LBB0_18
; %bb.15:
	ldr	x0, [x19, #8]
	bl	_amdgpu_display_print_display_setup
	mov	x0, x19
	bl	_dce_v10_0_afmt_init
	cbnz	w0, LBB0_9
; %bb.16:
	mov	x0, x19
	bl	_dce_v10_0_audio_init
	cbnz	w0, LBB0_9
; %bb.17:
	ldr	x0, [x19, #8]
	bl	_drm_kms_helper_poll_init
	mov	w0, #0
	mov	w8, #1
	str	w8, [x19, #4]
	b	LBB0_9
LBB0_18:
Lloh12:
	adrp	x8, _EINVAL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_9
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdr	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_AMDGPU_IRQ_CLIENTID_LEGACY,4,2 ; @AMDGPU_IRQ_CLIENTID_LEGACY
	.comm	_VISLANDS30_IV_SRCID_D1_GRPH_PFLIP,4,2 ; @VISLANDS30_IV_SRCID_D1_GRPH_PFLIP
	.comm	_VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A,4,2 ; @VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A
	.comm	_amdgpu_mode_funcs,4,2          ; @amdgpu_mode_funcs
	.comm	_EINVAL,4,2                     ; @EINVAL
	.no_dead_strip	_dce_v10_0_sw_init
.subsections_via_symbols
