	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_crtc_atomic_enable
_tegra_crtc_atomic_enable:              ## @tegra_crtc_atomic_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	movq	%rdi, -64(%rbp)                 ## 8-byte Spill
	callq	_to_dc_state
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	callq	_to_tegra_dc
	movq	%rax, %r15
	movl	16(%rax), %edi
	callq	_pm_runtime_get_sync
	movq	8(%r15), %rdi
	testq	%rdi, %rdi
	je	LBB0_2
## %bb.1:
	callq	_host1x_syncpt_id
	movl	%eax, %r13d
	movq	(%r15), %rax
	cmpq	$0, (%rax)
	movl	$256, %eax                      ## imm = 0x100
	movl	$-2147483648, %r12d             ## imm = 0x80000000
	cmovel	%eax, %r12d
	movq	_SYNCPT_CNTRL_NO_STALL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DC_CMD_GENERAL_INCR_SYNCPT_CNTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
	orl	%r13d, %r12d
	movq	_DC_CMD_CONT_SYNCPT_VSYNC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_tegra_dc_writel
LBB0_2:
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movq	(%r15), %rax
	cmpq	$0, (%rax)
	je	LBB0_4
## %bb.3:
	movq	_DSC_TO_UF_INT@GOTPCREL(%rip), %r14
	movq	_DSC_BBUF_UF_INT@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	orl	(%r14), %esi
	movq	_DSC_RBUF_UF_INT@GOTPCREL(%rip), %r12
	orl	(%r12), %esi
	movq	_DSC_OBUF_UF_INT@GOTPCREL(%rip), %rbx
	orl	(%rbx), %esi
	movq	_DC_CMD_INT_TYPE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
	movl	(%r13), %esi
	orl	(%r14), %esi
	orl	(%r12), %esi
	orl	(%rbx), %esi
	movq	_SD3_BUCKET_WALK_DONE_INT@GOTPCREL(%rip), %r13
	orl	(%r13), %esi
	movq	_HEAD_UF_INT@GOTPCREL(%rip), %rbx
	orl	(%rbx), %esi
	movq	_MSF_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_REG_TMOUT_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_REGION_CRC_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_V_PULSE2_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_V_PULSE3_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_VBLANK_INT@GOTPCREL(%rip), %r12
	orl	(%r12), %esi
	movq	_FRAME_END_INT@GOTPCREL(%rip), %r14
	orl	(%r14), %esi
	movq	_DC_CMD_INT_POLARITY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
	movl	(%rbx), %esi
	orl	(%r13), %esi
	orl	(%r12), %esi
	orl	(%r14), %esi
	movq	_DC_CMD_INT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
	movq	_REG_TMOUT_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	(%rbx), %esi
	orl	(%r14), %esi
	movq	_DC_CMD_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
	movq	_READ_MUX@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DC_CMD_STATE_ACCESS@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_4:
	movq	_WIN_A_UF_INT@GOTPCREL(%rip), %rcx
	movq	_WIN_B_UF_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	(%rcx), %esi
	movq	_WIN_C_UF_INT@GOTPCREL(%rip), %r13
	orl	(%r13), %esi
	movq	_WIN_A_OF_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	%rax, %r12
	movq	_WIN_B_OF_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	%rax, %r14
	movq	_WIN_C_OF_INT@GOTPCREL(%rip), %rbx
	orl	(%rbx), %esi
	movq	_DC_CMD_INT_TYPE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
	movq	_WIN_B_UF_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_WIN_A_UF_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	orl	(%r13), %esi
	orl	(%r12), %esi
	movq	%r12, %r13
	orl	(%r14), %esi
	orl	(%rbx), %esi
	movq	_DC_CMD_INT_POLARITY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
	xorl	%edi, %edi
	callq	_CURSOR_THRESHOLD
	movl	%eax, %r12d
	movl	$32, %edi
	callq	_WINDOW_A_THRESHOLD
	orl	%eax, %r12d
	movl	$32, %edi
	callq	_WINDOW_B_THRESHOLD
	movl	%eax, %ebx
	movl	$32, %edi
	callq	_WINDOW_C_THRESHOLD
	orl	%eax, %ebx
	orl	%r12d, %ebx
	movq	_DC_DISP_DISP_MEM_HIGH_PRIORITY@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_tegra_dc_writel
	xorl	%edi, %edi
	callq	_CURSOR_THRESHOLD
	movl	%eax, %r12d
	movl	$1, %edi
	callq	_WINDOW_A_THRESHOLD
	orl	%eax, %r12d
	movl	$1, %edi
	callq	_WINDOW_B_THRESHOLD
	movl	%eax, %ebx
	movl	$1, %edi
	callq	_WINDOW_C_THRESHOLD
	orl	%eax, %ebx
	orl	%r12d, %ebx
	movq	_DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_tegra_dc_writel
	movq	_VBLANK_INT@GOTPCREL(%rip), %rax
	movq	_WIN_A_UF_INT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_WIN_B_UF_INT@GOTPCREL(%rip), %rbx
	orl	(%rbx), %esi
	movq	_WIN_C_UF_INT@GOTPCREL(%rip), %r12
	orl	(%r12), %esi
	movq	%r13, %r14
	orl	(%r13), %esi
	movq	_WIN_B_OF_INT@GOTPCREL(%rip), %r13
	orl	(%r13), %esi
	movq	_WIN_C_OF_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_DC_CMD_INT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
	movl	(%rbx), %esi
	movq	_WIN_A_UF_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	orl	(%r12), %esi
	orl	(%r14), %esi
	orl	(%r13), %esi
	movq	_WIN_C_OF_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_DC_CMD_INT_MASK@GOTPCREL(%rip), %rax
LBB0_5:
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
	movq	(%r15), %rax
	cmpq	$0, 16(%rax)
	jne	LBB0_6
## %bb.7:
	movq	_DC_DISP_BORDER_COLOR@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_6:
	movq	_DC_DISP_BLEND_BACKGROUND_COLOR@GOTPCREL(%rip), %rax
LBB0_8:
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	movl	(%rax), %edx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_tegra_dc_writel
	movq	%r15, %rdi
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	callq	_tegra_dc_commit_state
	movq	%r15, %rdi
	movq	-64(%rbp), %rsi                 ## 8-byte Reload
	callq	_tegra_dc_set_timings
	movq	(%r15), %rax
	cmpq	$0, 8(%rax)
	je	LBB0_10
## %bb.9:
	movq	_DC_DISP_INTERLACE_CONTROL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_tegra_dc_readl
	movq	_INTERLACE_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
LBB0_10:
	movq	_DC_CMD_DISPLAY_COMMAND@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_tegra_dc_readl
	movq	_DISP_CTRL_MODE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movq	_DISP_CTRL_MODE_C_DISPLAY@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
	movq	(%r15), %rax
	cmpq	$0, (%rax)
	jne	LBB0_12
## %bb.11:
	movq	_DC_CMD_DISPLAY_POWER_CONTROL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_tegra_dc_readl
	movq	_PW0_ENABLE@GOTPCREL(%rip), %rcx
	movq	_PW1_ENABLE@GOTPCREL(%rip), %rdx
	movq	_PW2_ENABLE@GOTPCREL(%rip), %rsi
	movq	_PW3_ENABLE@GOTPCREL(%rip), %rdi
	movq	_PW4_ENABLE@GOTPCREL(%rip), %r8
	movq	_PM0_ENABLE@GOTPCREL(%rip), %r9
	orl	(%rcx), %eax
	orl	(%rdx), %eax
	orl	(%rsi), %eax
	orl	(%rdi), %eax
	orl	(%r8), %eax
	orl	(%r9), %eax
	movq	_PM1_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %edx
	movq	%r15, %rdi
	movl	%eax, %esi
	callq	_tegra_dc_writel
	movq	(%r15), %rax
	cmpq	$0, (%rax)
	je	LBB0_13
LBB0_12:
	movq	_UNDERFLOW_MODE_RED@GOTPCREL(%rip), %rax
	movq	_UNDERFLOW_REPORT_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_DC_COM_RG_UNDERFLOW@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_tegra_dc_writel
LBB0_13:
	movq	%r15, %rdi
	callq	_tegra_dc_commit
	movq	%r14, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_drm_crtc_vblank_on             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SYNCPT_CNTRL_NO_STALL,4,2      ## @SYNCPT_CNTRL_NO_STALL
	.comm	_DC_CMD_GENERAL_INCR_SYNCPT_CNTRL,4,2 ## @DC_CMD_GENERAL_INCR_SYNCPT_CNTRL
	.comm	_DC_CMD_CONT_SYNCPT_VSYNC,4,2   ## @DC_CMD_CONT_SYNCPT_VSYNC
	.comm	_DSC_TO_UF_INT,4,2              ## @DSC_TO_UF_INT
	.comm	_DSC_BBUF_UF_INT,4,2            ## @DSC_BBUF_UF_INT
	.comm	_DSC_RBUF_UF_INT,4,2            ## @DSC_RBUF_UF_INT
	.comm	_DSC_OBUF_UF_INT,4,2            ## @DSC_OBUF_UF_INT
	.comm	_DC_CMD_INT_TYPE,4,2            ## @DC_CMD_INT_TYPE
	.comm	_SD3_BUCKET_WALK_DONE_INT,4,2   ## @SD3_BUCKET_WALK_DONE_INT
	.comm	_HEAD_UF_INT,4,2                ## @HEAD_UF_INT
	.comm	_MSF_INT,4,2                    ## @MSF_INT
	.comm	_REG_TMOUT_INT,4,2              ## @REG_TMOUT_INT
	.comm	_REGION_CRC_INT,4,2             ## @REGION_CRC_INT
	.comm	_V_PULSE2_INT,4,2               ## @V_PULSE2_INT
	.comm	_V_PULSE3_INT,4,2               ## @V_PULSE3_INT
	.comm	_VBLANK_INT,4,2                 ## @VBLANK_INT
	.comm	_FRAME_END_INT,4,2              ## @FRAME_END_INT
	.comm	_DC_CMD_INT_POLARITY,4,2        ## @DC_CMD_INT_POLARITY
	.comm	_DC_CMD_INT_ENABLE,4,2          ## @DC_CMD_INT_ENABLE
	.comm	_DC_CMD_INT_MASK,4,2            ## @DC_CMD_INT_MASK
	.comm	_READ_MUX,4,2                   ## @READ_MUX
	.comm	_DC_CMD_STATE_ACCESS,4,2        ## @DC_CMD_STATE_ACCESS
	.comm	_WIN_A_UF_INT,4,2               ## @WIN_A_UF_INT
	.comm	_WIN_B_UF_INT,4,2               ## @WIN_B_UF_INT
	.comm	_WIN_C_UF_INT,4,2               ## @WIN_C_UF_INT
	.comm	_WIN_A_OF_INT,4,2               ## @WIN_A_OF_INT
	.comm	_WIN_B_OF_INT,4,2               ## @WIN_B_OF_INT
	.comm	_WIN_C_OF_INT,4,2               ## @WIN_C_OF_INT
	.comm	_DC_DISP_DISP_MEM_HIGH_PRIORITY,4,2 ## @DC_DISP_DISP_MEM_HIGH_PRIORITY
	.comm	_DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER,4,2 ## @DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER
	.comm	_DC_DISP_BLEND_BACKGROUND_COLOR,4,2 ## @DC_DISP_BLEND_BACKGROUND_COLOR
	.comm	_DC_DISP_BORDER_COLOR,4,2       ## @DC_DISP_BORDER_COLOR
	.comm	_DC_DISP_INTERLACE_CONTROL,4,2  ## @DC_DISP_INTERLACE_CONTROL
	.comm	_INTERLACE_ENABLE,4,2           ## @INTERLACE_ENABLE
	.comm	_DC_CMD_DISPLAY_COMMAND,4,2     ## @DC_CMD_DISPLAY_COMMAND
	.comm	_DISP_CTRL_MODE_MASK,4,2        ## @DISP_CTRL_MODE_MASK
	.comm	_DISP_CTRL_MODE_C_DISPLAY,4,2   ## @DISP_CTRL_MODE_C_DISPLAY
	.comm	_DC_CMD_DISPLAY_POWER_CONTROL,4,2 ## @DC_CMD_DISPLAY_POWER_CONTROL
	.comm	_PW0_ENABLE,4,2                 ## @PW0_ENABLE
	.comm	_PW1_ENABLE,4,2                 ## @PW1_ENABLE
	.comm	_PW2_ENABLE,4,2                 ## @PW2_ENABLE
	.comm	_PW3_ENABLE,4,2                 ## @PW3_ENABLE
	.comm	_PW4_ENABLE,4,2                 ## @PW4_ENABLE
	.comm	_PM0_ENABLE,4,2                 ## @PM0_ENABLE
	.comm	_PM1_ENABLE,4,2                 ## @PM1_ENABLE
	.comm	_UNDERFLOW_MODE_RED,4,2         ## @UNDERFLOW_MODE_RED
	.comm	_UNDERFLOW_REPORT_ENABLE,4,2    ## @UNDERFLOW_REPORT_ENABLE
	.comm	_DC_COM_RG_UNDERFLOW,4,2        ## @DC_COM_RG_UNDERFLOW
	.no_dead_strip	_tegra_crtc_atomic_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_crtc_atomic_enable
_tegra_crtc_atomic_enable:              ; @tegra_crtc_atomic_enable
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	x21, [x0]
	mov	x0, x21
	bl	_to_dc_state
	mov	x27, x0
	mov	x0, x19
	bl	_to_tegra_dc
	mov	x20, x0
	ldr	w0, [x0, #16]
	bl	_pm_runtime_get_sync
	ldr	x0, [x20, #8]
	cbz	x0, LBB0_2
; %bb.1:
	bl	_host1x_syncpt_id
	mov	x23, x0
	ldr	x8, [x20]
	ldr	x8, [x8]
	cmp	x8, #0
	mov	w8, #-2147483648
	mov	w9, #256
	csel	w22, w9, w8, eq
Lloh0:
	adrp	x8, _SYNCPT_CNTRL_NO_STALL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SYNCPT_CNTRL_NO_STALL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _DC_CMD_GENERAL_INCR_SYNCPT_CNTRL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DC_CMD_GENERAL_INCR_SYNCPT_CNTRL@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
	orr	w1, w22, w23
Lloh6:
	adrp	x8, _DC_CMD_CONT_SYNCPT_VSYNC@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DC_CMD_CONT_SYNCPT_VSYNC@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
LBB0_2:
	ldr	x8, [x20]
	ldr	x8, [x8]
	cbz	x8, LBB0_4
; %bb.3:
Lloh9:
	adrp	x22, _DSC_TO_UF_INT@GOTPAGE
Lloh10:
	ldr	x22, [x22, _DSC_TO_UF_INT@GOTPAGEOFF]
	ldr	w8, [x22]
Lloh11:
	adrp	x23, _DSC_BBUF_UF_INT@GOTPAGE
Lloh12:
	ldr	x23, [x23, _DSC_BBUF_UF_INT@GOTPAGEOFF]
	ldr	w9, [x23]
	orr	w8, w9, w8
Lloh13:
	adrp	x24, _DSC_RBUF_UF_INT@GOTPAGE
Lloh14:
	ldr	x24, [x24, _DSC_RBUF_UF_INT@GOTPAGEOFF]
	ldr	w9, [x24]
Lloh15:
	adrp	x25, _DSC_OBUF_UF_INT@GOTPAGE
Lloh16:
	ldr	x25, [x25, _DSC_OBUF_UF_INT@GOTPAGEOFF]
	orr	w8, w8, w9
	ldr	w9, [x25]
	orr	w1, w8, w9
Lloh17:
	adrp	x8, _DC_CMD_INT_TYPE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DC_CMD_INT_TYPE@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	ldr	w9, [x24]
	orr	w8, w8, w9
	ldr	w9, [x25]
	orr	w8, w8, w9
Lloh20:
	adrp	x22, _SD3_BUCKET_WALK_DONE_INT@GOTPAGE
Lloh21:
	ldr	x22, [x22, _SD3_BUCKET_WALK_DONE_INT@GOTPAGEOFF]
	ldr	w9, [x22]
	orr	w8, w8, w9
Lloh22:
	adrp	x23, _HEAD_UF_INT@GOTPAGE
Lloh23:
	ldr	x23, [x23, _HEAD_UF_INT@GOTPAGEOFF]
	ldr	w9, [x23]
Lloh24:
	adrp	x10, _MSF_INT@GOTPAGE
Lloh25:
	ldr	x10, [x10, _MSF_INT@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh26:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh27:
	adrp	x24, _REG_TMOUT_INT@GOTPAGE
Lloh28:
	ldr	x24, [x24, _REG_TMOUT_INT@GOTPAGEOFF]
	ldr	w9, [x24]
	orr	w8, w8, w9
Lloh29:
	adrp	x9, _REGION_CRC_INT@GOTPAGE
Lloh30:
	ldr	x9, [x9, _REGION_CRC_INT@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
Lloh32:
	adrp	x10, _V_PULSE2_INT@GOTPAGE
Lloh33:
	ldr	x10, [x10, _V_PULSE2_INT@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh34:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh35:
	adrp	x9, _V_PULSE3_INT@GOTPAGE
Lloh36:
	ldr	x9, [x9, _V_PULSE3_INT@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh38:
	adrp	x25, _VBLANK_INT@GOTPAGE
Lloh39:
	ldr	x25, [x25, _VBLANK_INT@GOTPAGEOFF]
	ldr	w9, [x25]
Lloh40:
	adrp	x26, _FRAME_END_INT@GOTPAGE
Lloh41:
	ldr	x26, [x26, _FRAME_END_INT@GOTPAGEOFF]
	orr	w8, w8, w9
	ldr	w9, [x26]
	orr	w1, w8, w9
Lloh42:
	adrp	x8, _DC_CMD_INT_POLARITY@GOTPAGE
Lloh43:
	ldr	x8, [x8, _DC_CMD_INT_POLARITY@GOTPAGEOFF]
Lloh44:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	ldr	w9, [x25]
	orr	w8, w8, w9
	ldr	w9, [x26]
	orr	w1, w8, w9
Lloh45:
	adrp	x8, _DC_CMD_INT_ENABLE@GOTPAGE
Lloh46:
	ldr	x8, [x8, _DC_CMD_INT_ENABLE@GOTPAGEOFF]
Lloh47:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
	ldr	w8, [x23]
	ldr	w9, [x24]
	orr	w8, w9, w8
	ldr	w9, [x26]
	orr	w1, w8, w9
Lloh48:
	adrp	x8, _DC_CMD_INT_MASK@GOTPAGE
Lloh49:
	ldr	x8, [x8, _DC_CMD_INT_MASK@GOTPAGEOFF]
Lloh50:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
Lloh51:
	adrp	x8, _READ_MUX@GOTPAGE
Lloh52:
	ldr	x8, [x8, _READ_MUX@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
Lloh54:
	adrp	x8, _DC_CMD_STATE_ACCESS@GOTPAGE
Lloh55:
	ldr	x8, [x8, _DC_CMD_STATE_ACCESS@GOTPAGEOFF]
	b	LBB0_5
LBB0_4:
Lloh56:
	adrp	x24, _WIN_A_UF_INT@GOTPAGE
Lloh57:
	ldr	x24, [x24, _WIN_A_UF_INT@GOTPAGEOFF]
	ldr	w8, [x24]
Lloh58:
	adrp	x25, _WIN_B_UF_INT@GOTPAGE
Lloh59:
	ldr	x25, [x25, _WIN_B_UF_INT@GOTPAGEOFF]
	ldr	w9, [x25]
Lloh60:
	adrp	x26, _WIN_C_UF_INT@GOTPAGE
Lloh61:
	ldr	x26, [x26, _WIN_C_UF_INT@GOTPAGEOFF]
	orr	w8, w9, w8
	ldr	w9, [x26]
	orr	w8, w8, w9
	str	x27, [sp, #8]                   ; 8-byte Folded Spill
Lloh62:
	adrp	x27, _WIN_A_OF_INT@GOTPAGE
Lloh63:
	ldr	x27, [x27, _WIN_A_OF_INT@GOTPAGEOFF]
	ldr	w9, [x27]
	orr	w8, w8, w9
Lloh64:
	adrp	x28, _WIN_B_OF_INT@GOTPAGE
Lloh65:
	ldr	x28, [x28, _WIN_B_OF_INT@GOTPAGEOFF]
	ldr	w9, [x28]
Lloh66:
	adrp	x22, _WIN_C_OF_INT@GOTPAGE
Lloh67:
	ldr	x22, [x22, _WIN_C_OF_INT@GOTPAGEOFF]
	orr	w8, w8, w9
	ldr	w9, [x22]
	orr	w1, w8, w9
Lloh68:
	adrp	x8, _DC_CMD_INT_TYPE@GOTPAGE
Lloh69:
	ldr	x8, [x8, _DC_CMD_INT_TYPE@GOTPAGEOFF]
Lloh70:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
	ldr	w8, [x24]
	ldr	w9, [x25]
	orr	w8, w9, w8
	ldr	w9, [x26]
	orr	w8, w8, w9
	ldr	w9, [x27]
	orr	w8, w8, w9
	ldr	w9, [x28]
	orr	w8, w8, w9
	ldr	w9, [x22]
	orr	w1, w8, w9
Lloh71:
	adrp	x8, _DC_CMD_INT_POLARITY@GOTPAGE
Lloh72:
	ldr	x8, [x8, _DC_CMD_INT_POLARITY@GOTPAGEOFF]
Lloh73:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
	mov	w0, #0
	bl	_CURSOR_THRESHOLD
	mov	x23, x0
	mov	w0, #32
	bl	_WINDOW_A_THRESHOLD
	orr	w23, w0, w23
	mov	w0, #32
	bl	_WINDOW_B_THRESHOLD
	orr	w23, w23, w0
	mov	w0, #32
	bl	_WINDOW_C_THRESHOLD
	orr	w1, w23, w0
Lloh74:
	adrp	x8, _DC_DISP_DISP_MEM_HIGH_PRIORITY@GOTPAGE
Lloh75:
	ldr	x8, [x8, _DC_DISP_DISP_MEM_HIGH_PRIORITY@GOTPAGEOFF]
Lloh76:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
	mov	w0, #0
	bl	_CURSOR_THRESHOLD
	mov	x23, x0
	mov	w0, #1
	bl	_WINDOW_A_THRESHOLD
	orr	w23, w0, w23
	mov	w0, #1
	bl	_WINDOW_B_THRESHOLD
	orr	w23, w23, w0
	mov	w0, #1
	bl	_WINDOW_C_THRESHOLD
	orr	w1, w23, w0
Lloh77:
	adrp	x8, _DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER@GOTPAGE
Lloh78:
	ldr	x8, [x8, _DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER@GOTPAGEOFF]
Lloh79:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
Lloh80:
	adrp	x8, _VBLANK_INT@GOTPAGE
Lloh81:
	ldr	x8, [x8, _VBLANK_INT@GOTPAGEOFF]
Lloh82:
	ldr	w8, [x8]
	ldr	w9, [x24]
	orr	w8, w9, w8
	ldr	w9, [x25]
	orr	w8, w8, w9
	ldr	w9, [x26]
	orr	w8, w8, w9
	ldr	w9, [x27]
	orr	w8, w8, w9
	ldr	w9, [x28]
	orr	w8, w8, w9
	ldr	w9, [x22]
	orr	w1, w8, w9
Lloh83:
	adrp	x8, _DC_CMD_INT_ENABLE@GOTPAGE
Lloh84:
	ldr	x8, [x8, _DC_CMD_INT_ENABLE@GOTPAGEOFF]
Lloh85:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
	ldr	w8, [x24]
	ldr	w9, [x25]
	orr	w8, w9, w8
	ldr	w9, [x26]
	orr	w8, w8, w9
	ldr	w9, [x27]
	ldr	x27, [sp, #8]                   ; 8-byte Folded Reload
	orr	w8, w8, w9
	ldr	w9, [x28]
	orr	w8, w8, w9
	ldr	w9, [x22]
	orr	w1, w8, w9
Lloh86:
	adrp	x8, _DC_CMD_INT_MASK@GOTPAGE
Lloh87:
	ldr	x8, [x8, _DC_CMD_INT_MASK@GOTPAGEOFF]
LBB0_5:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
	ldr	x8, [x20]
Lloh88:
	adrp	x9, _DC_DISP_BORDER_COLOR@GOTPAGE
Lloh89:
	ldr	x9, [x9, _DC_DISP_BORDER_COLOR@GOTPAGEOFF]
	ldr	x8, [x8, #16]
Lloh90:
	adrp	x10, _DC_DISP_BLEND_BACKGROUND_COLOR@GOTPAGE
Lloh91:
	ldr	x10, [x10, _DC_DISP_BLEND_BACKGROUND_COLOR@GOTPAGEOFF]
	cmp	x8, #0
	csel	x8, x9, x10, eq
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #0
	bl	_tegra_dc_writel
	mov	x0, x20
	mov	x1, x27
	bl	_tegra_dc_commit_state
	mov	x0, x20
	mov	x1, x21
	bl	_tegra_dc_set_timings
	ldr	x8, [x20]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_7
; %bb.6:
Lloh92:
	adrp	x21, _DC_DISP_INTERLACE_CONTROL@GOTPAGE
Lloh93:
	ldr	x21, [x21, _DC_DISP_INTERLACE_CONTROL@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_tegra_dc_readl
Lloh94:
	adrp	x8, _INTERLACE_ENABLE@GOTPAGE
Lloh95:
	ldr	x8, [x8, _INTERLACE_ENABLE@GOTPAGEOFF]
Lloh96:
	ldr	w8, [x8]
	bic	w1, w0, w8
	ldr	w2, [x21]
	mov	x0, x20
	bl	_tegra_dc_writel
LBB0_7:
Lloh97:
	adrp	x21, _DC_CMD_DISPLAY_COMMAND@GOTPAGE
Lloh98:
	ldr	x21, [x21, _DC_CMD_DISPLAY_COMMAND@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_tegra_dc_readl
Lloh99:
	adrp	x8, _DISP_CTRL_MODE_MASK@GOTPAGE
Lloh100:
	ldr	x8, [x8, _DISP_CTRL_MODE_MASK@GOTPAGEOFF]
Lloh101:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh102:
	adrp	x9, _DISP_CTRL_MODE_C_DISPLAY@GOTPAGE
Lloh103:
	ldr	x9, [x9, _DISP_CTRL_MODE_C_DISPLAY@GOTPAGEOFF]
Lloh104:
	ldr	w9, [x9]
	orr	w1, w8, w9
	ldr	w2, [x21]
	mov	x0, x20
	bl	_tegra_dc_writel
	ldr	x8, [x20]
	ldr	x8, [x8]
	cbnz	x8, LBB0_9
; %bb.8:
Lloh105:
	adrp	x21, _DC_CMD_DISPLAY_POWER_CONTROL@GOTPAGE
Lloh106:
	ldr	x21, [x21, _DC_CMD_DISPLAY_POWER_CONTROL@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_tegra_dc_readl
Lloh107:
	adrp	x8, _PW0_ENABLE@GOTPAGE
Lloh108:
	ldr	x8, [x8, _PW0_ENABLE@GOTPAGEOFF]
Lloh109:
	ldr	w8, [x8]
Lloh110:
	adrp	x9, _PW1_ENABLE@GOTPAGE
Lloh111:
	ldr	x9, [x9, _PW1_ENABLE@GOTPAGEOFF]
Lloh112:
	ldr	w9, [x9]
Lloh113:
	adrp	x10, _PW2_ENABLE@GOTPAGE
Lloh114:
	ldr	x10, [x10, _PW2_ENABLE@GOTPAGEOFF]
Lloh115:
	ldr	w10, [x10]
Lloh116:
	adrp	x11, _PW3_ENABLE@GOTPAGE
Lloh117:
	ldr	x11, [x11, _PW3_ENABLE@GOTPAGEOFF]
Lloh118:
	ldr	w11, [x11]
Lloh119:
	adrp	x12, _PW4_ENABLE@GOTPAGE
Lloh120:
	ldr	x12, [x12, _PW4_ENABLE@GOTPAGEOFF]
Lloh121:
	ldr	w12, [x12]
Lloh122:
	adrp	x13, _PM0_ENABLE@GOTPAGE
Lloh123:
	ldr	x13, [x13, _PM0_ENABLE@GOTPAGEOFF]
Lloh124:
	ldr	w13, [x13]
Lloh125:
	adrp	x14, _PM1_ENABLE@GOTPAGE
Lloh126:
	ldr	x14, [x14, _PM1_ENABLE@GOTPAGEOFF]
Lloh127:
	ldr	w14, [x14]
	orr	w8, w8, w0
	orr	w8, w8, w9
	orr	w8, w8, w10
	orr	w8, w8, w11
	orr	w8, w8, w12
	orr	w8, w8, w13
	orr	w1, w8, w14
	ldr	w2, [x21]
	mov	x0, x20
	bl	_tegra_dc_writel
	ldr	x8, [x20]
	ldr	x8, [x8]
	cbz	x8, LBB0_10
LBB0_9:
Lloh128:
	adrp	x8, _UNDERFLOW_MODE_RED@GOTPAGE
Lloh129:
	ldr	x8, [x8, _UNDERFLOW_MODE_RED@GOTPAGEOFF]
Lloh130:
	adrp	x9, _UNDERFLOW_REPORT_ENABLE@GOTPAGE
Lloh131:
	ldr	x9, [x9, _UNDERFLOW_REPORT_ENABLE@GOTPAGEOFF]
Lloh132:
	ldr	w8, [x8]
Lloh133:
	ldr	w9, [x9]
	orr	w1, w9, w8
Lloh134:
	adrp	x8, _DC_COM_RG_UNDERFLOW@GOTPAGE
Lloh135:
	ldr	x8, [x8, _DC_COM_RG_UNDERFLOW@GOTPAGEOFF]
Lloh136:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_tegra_dc_writel
LBB0_10:
	mov	x0, x20
	bl	_tegra_dc_commit
	mov	x0, x19
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_drm_crtc_vblank_on
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh88, Lloh89
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdrGot	Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh125, Lloh126, Lloh127
	.loh AdrpLdrGotLdr	Lloh122, Lloh123, Lloh124
	.loh AdrpLdrGotLdr	Lloh119, Lloh120, Lloh121
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh110, Lloh111, Lloh112
	.loh AdrpLdrGotLdr	Lloh107, Lloh108, Lloh109
	.loh AdrpLdrGot	Lloh105, Lloh106
	.loh AdrpLdrGotLdr	Lloh134, Lloh135, Lloh136
	.loh AdrpLdrGotLdr	Lloh130, Lloh131, Lloh133
	.loh AdrpLdrGotLdr	Lloh128, Lloh129, Lloh132
	.cfi_endproc
                                        ; -- End function
	.comm	_SYNCPT_CNTRL_NO_STALL,4,2      ; @SYNCPT_CNTRL_NO_STALL
	.comm	_DC_CMD_GENERAL_INCR_SYNCPT_CNTRL,4,2 ; @DC_CMD_GENERAL_INCR_SYNCPT_CNTRL
	.comm	_DC_CMD_CONT_SYNCPT_VSYNC,4,2   ; @DC_CMD_CONT_SYNCPT_VSYNC
	.comm	_DSC_TO_UF_INT,4,2              ; @DSC_TO_UF_INT
	.comm	_DSC_BBUF_UF_INT,4,2            ; @DSC_BBUF_UF_INT
	.comm	_DSC_RBUF_UF_INT,4,2            ; @DSC_RBUF_UF_INT
	.comm	_DSC_OBUF_UF_INT,4,2            ; @DSC_OBUF_UF_INT
	.comm	_DC_CMD_INT_TYPE,4,2            ; @DC_CMD_INT_TYPE
	.comm	_SD3_BUCKET_WALK_DONE_INT,4,2   ; @SD3_BUCKET_WALK_DONE_INT
	.comm	_HEAD_UF_INT,4,2                ; @HEAD_UF_INT
	.comm	_MSF_INT,4,2                    ; @MSF_INT
	.comm	_REG_TMOUT_INT,4,2              ; @REG_TMOUT_INT
	.comm	_REGION_CRC_INT,4,2             ; @REGION_CRC_INT
	.comm	_V_PULSE2_INT,4,2               ; @V_PULSE2_INT
	.comm	_V_PULSE3_INT,4,2               ; @V_PULSE3_INT
	.comm	_VBLANK_INT,4,2                 ; @VBLANK_INT
	.comm	_FRAME_END_INT,4,2              ; @FRAME_END_INT
	.comm	_DC_CMD_INT_POLARITY,4,2        ; @DC_CMD_INT_POLARITY
	.comm	_DC_CMD_INT_ENABLE,4,2          ; @DC_CMD_INT_ENABLE
	.comm	_DC_CMD_INT_MASK,4,2            ; @DC_CMD_INT_MASK
	.comm	_READ_MUX,4,2                   ; @READ_MUX
	.comm	_DC_CMD_STATE_ACCESS,4,2        ; @DC_CMD_STATE_ACCESS
	.comm	_WIN_A_UF_INT,4,2               ; @WIN_A_UF_INT
	.comm	_WIN_B_UF_INT,4,2               ; @WIN_B_UF_INT
	.comm	_WIN_C_UF_INT,4,2               ; @WIN_C_UF_INT
	.comm	_WIN_A_OF_INT,4,2               ; @WIN_A_OF_INT
	.comm	_WIN_B_OF_INT,4,2               ; @WIN_B_OF_INT
	.comm	_WIN_C_OF_INT,4,2               ; @WIN_C_OF_INT
	.comm	_DC_DISP_DISP_MEM_HIGH_PRIORITY,4,2 ; @DC_DISP_DISP_MEM_HIGH_PRIORITY
	.comm	_DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER,4,2 ; @DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER
	.comm	_DC_DISP_BLEND_BACKGROUND_COLOR,4,2 ; @DC_DISP_BLEND_BACKGROUND_COLOR
	.comm	_DC_DISP_BORDER_COLOR,4,2       ; @DC_DISP_BORDER_COLOR
	.comm	_DC_DISP_INTERLACE_CONTROL,4,2  ; @DC_DISP_INTERLACE_CONTROL
	.comm	_INTERLACE_ENABLE,4,2           ; @INTERLACE_ENABLE
	.comm	_DC_CMD_DISPLAY_COMMAND,4,2     ; @DC_CMD_DISPLAY_COMMAND
	.comm	_DISP_CTRL_MODE_MASK,4,2        ; @DISP_CTRL_MODE_MASK
	.comm	_DISP_CTRL_MODE_C_DISPLAY,4,2   ; @DISP_CTRL_MODE_C_DISPLAY
	.comm	_DC_CMD_DISPLAY_POWER_CONTROL,4,2 ; @DC_CMD_DISPLAY_POWER_CONTROL
	.comm	_PW0_ENABLE,4,2                 ; @PW0_ENABLE
	.comm	_PW1_ENABLE,4,2                 ; @PW1_ENABLE
	.comm	_PW2_ENABLE,4,2                 ; @PW2_ENABLE
	.comm	_PW3_ENABLE,4,2                 ; @PW3_ENABLE
	.comm	_PW4_ENABLE,4,2                 ; @PW4_ENABLE
	.comm	_PM0_ENABLE,4,2                 ; @PM0_ENABLE
	.comm	_PM1_ENABLE,4,2                 ; @PM1_ENABLE
	.comm	_UNDERFLOW_MODE_RED,4,2         ; @UNDERFLOW_MODE_RED
	.comm	_UNDERFLOW_REPORT_ENABLE,4,2    ; @UNDERFLOW_REPORT_ENABLE
	.comm	_DC_COM_RG_UNDERFLOW,4,2        ; @DC_COM_RG_UNDERFLOW
	.no_dead_strip	_tegra_crtc_atomic_enable
.subsections_via_symbols
