	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_crt_init                 ## -- Begin function intel_crt_init
	.p2align	4, 0x90
_intel_crt_init:                        ## @intel_crt_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_HAS_PCH_SPLIT
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_PCH_ADPA@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_2:
	movq	%r14, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	jne	LBB0_3
## %bb.4:
	movq	_ADPA@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_3:
	movq	_VLV_ADPA@GOTPCREL(%rip), %rax
LBB0_5:
	movl	(%rax), %r15d
	movl	%r15d, %edi
	callq	_I915_READ
	movq	_ADPA_DAC_ENABLE@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	testl	%eax, %esi
	jne	LBB0_8
## %bb.6:
	movl	%eax, %ebx
	orl	%eax, %esi
	movq	_ADPA_HSYNC_CNTL_DISABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_ADPA_VSYNC_CNTL_DISABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movl	%r15d, %edi
	callq	_I915_WRITE
	movl	%r15d, %edi
	callq	_I915_READ
	testl	%eax, (%r12)
	je	LBB0_24
## %bb.7:
	movl	%r15d, %edi
	movl	%ebx, %esi
	callq	_I915_WRITE
LBB0_8:
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$88, %edi
	callq	_kzalloc
	testq	%rax, %rax
	je	LBB0_24
## %bb.9:
	movq	%rax, %rbx
	xorl	%eax, %eax
	callq	_intel_connector_alloc
	testq	%rax, %rax
	je	LBB0_25
## %bb.10:
	movq	%rax, %r12
	movq	%rax, %rsi
	addq	$8, %rsi
	movq	%rax, 80(%rbx)
	leaq	4(%r14), %r13
	movq	_DRM_MODE_CONNECTOR_VGA@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_intel_crt_connector_funcs@GOTPCREL(%rip), %rdx
	movq	%r13, %rdi
	movq	%rsi, -48(%rbp)                 ## 8-byte Spill
	callq	_drm_connector_init
	movq	%rbx, %rsi
	addq	$8, %rsi
	movq	_DRM_MODE_ENCODER_DAC@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_intel_crt_enc_funcs@GOTPCREL(%rip), %rdx
	leaq	L_.str(%rip), %r8
	movq	%r13, %rdi
	movq	%rsi, -56(%rbp)                 ## 8-byte Spill
	callq	_drm_encoder_init
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_intel_connector_attach_encoder
	movq	_INTEL_OUTPUT_ANALOG@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 60(%rbx)
	movq	_INTEL_OUTPUT_DVO@GOTPCREL(%rip), %rax
	movq	_INTEL_OUTPUT_HDMI@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$1, %edx
	shll	%cl, %edx
	movb	(%rax), %al
	movl	$1, %r13d
	btsl	%eax, %edx
	movl	%edx, (%rbx)
	movq	%r14, %rdi
	callq	_IS_I830
	testq	%rax, %rax
	movl	$7, %eax
	cmovnel	%r13d, %eax
	movl	%eax, 4(%rbx)
	movq	%r14, %rdi
	movl	$2, %esi
	callq	_IS_GEN
	xorl	%ecx, %ecx
	testq	%rax, %rax
	sete	%cl
	movl	%ecx, 8(%r12)
	movq	$0, 16(%r12)
	movl	%r15d, 72(%rbx)
	movq	_POWER_DOMAIN_PORT_CRT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%rbx)
	movq	%r14, %rdi
	callq	_I915_HAS_HOTPLUG
	testq	%rax, %rax
	je	LBB0_13
## %bb.11:
	movq	_intel_spurious_crt_detect@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_dmi_check_system
	testl	%eax, %eax
	jne	LBB0_13
## %bb.12:
	movq	_HPD_CRT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 52(%rbx)
	movq	_intel_encoder_hotplug@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%rbx)
LBB0_13:
	movq	%r14, %rdi
	callq	_HAS_DDI
	testq	%rax, %rax
	je	LBB0_15
## %bb.14:
	movq	_PORT_E@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rbx)
	movq	_hsw_crt_get_config@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%rbx)
	movq	_intel_ddi_get_hw_state@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rbx)
	movq	_hsw_crt_compute_config@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rbx)
	movq	_hsw_pre_pll_enable_crt@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 44(%rbx)
	movq	_hsw_pre_enable_crt@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rbx)
	movq	_hsw_enable_crt@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%rbx)
	movq	_hsw_disable_crt@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%rbx)
	movq	_hsw_post_disable_crt@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 36(%rbx)
	jmp	LBB0_19
LBB0_24:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_25:
	movq	%rbx, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_kfree                          ## TAILCALL
LBB0_15:
	movq	%r14, %rdi
	callq	_HAS_PCH_SPLIT
	testq	%rax, %rax
	je	LBB0_17
## %bb.16:
	movq	_pch_crt_compute_config@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_pch_disable_crt@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	_pch_post_disable_crt@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	movl	%edx, 36(%rbx)
	jmp	LBB0_18
LBB0_17:
	movq	_intel_crt_compute_config@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_intel_disable_crt@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_18:
	movl	%eax, 32(%rbx)
	movl	%ecx, 28(%rbx)
	movq	_PORT_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rbx)
	movq	_intel_crt_get_config@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%rbx)
	movq	_intel_crt_get_hw_state@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rbx)
	movq	_intel_enable_crt@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%rbx)
LBB0_19:
	movq	_intel_connector_get_hw_state@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 4(%r12)
	movq	_intel_crt_connector_helper_funcs@GOTPCREL(%rip), %rsi
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	callq	_drm_connector_helper_add
	movq	%r14, %rdi
	callq	_I915_HAS_HOTPLUG
	testq	%rax, %rax
	jne	LBB0_21
## %bb.20:
	movq	_DRM_CONNECTOR_POLL_CONNECT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%r12)
LBB0_21:
	movq	$0, 64(%rbx)
	movq	%r14, %rdi
	callq	_HAS_PCH_LPT
	testq	%rax, %rax
	je	LBB0_23
## %bb.22:
	movq	_FDI_RX_POLARITY_REVERSED_LPT@GOTPCREL(%rip), %rax
	movq	_FDI_RX_LINK_REVERSAL_OVERRIDE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	_PIPE_A@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_FDI_RX_CTL
	movl	%eax, %edi
	callq	_I915_READ
	andl	%ebx, %eax
	movl	%eax, (%r14)
LBB0_23:
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_intel_crt_reset                ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PCH_ADPA,4,2                   ## @PCH_ADPA
	.comm	_VLV_ADPA,4,2                   ## @VLV_ADPA
	.comm	_ADPA,4,2                       ## @ADPA
	.comm	_ADPA_DAC_ENABLE,4,2            ## @ADPA_DAC_ENABLE
	.comm	_ADPA_HSYNC_CNTL_DISABLE,4,2    ## @ADPA_HSYNC_CNTL_DISABLE
	.comm	_ADPA_VSYNC_CNTL_DISABLE,4,2    ## @ADPA_VSYNC_CNTL_DISABLE
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_intel_crt_connector_funcs,4,2  ## @intel_crt_connector_funcs
	.comm	_DRM_MODE_CONNECTOR_VGA,4,2     ## @DRM_MODE_CONNECTOR_VGA
	.comm	_intel_crt_enc_funcs,4,2        ## @intel_crt_enc_funcs
	.comm	_DRM_MODE_ENCODER_DAC,4,2       ## @DRM_MODE_ENCODER_DAC
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"CRT"

	.comm	_INTEL_OUTPUT_ANALOG,4,2        ## @INTEL_OUTPUT_ANALOG
	.comm	_INTEL_OUTPUT_DVO,4,2           ## @INTEL_OUTPUT_DVO
	.comm	_INTEL_OUTPUT_HDMI,4,2          ## @INTEL_OUTPUT_HDMI
	.comm	_POWER_DOMAIN_PORT_CRT,4,2      ## @POWER_DOMAIN_PORT_CRT
	.comm	_intel_spurious_crt_detect,4,2  ## @intel_spurious_crt_detect
	.comm	_HPD_CRT,4,2                    ## @HPD_CRT
	.comm	_intel_encoder_hotplug,4,2      ## @intel_encoder_hotplug
	.comm	_PORT_E,4,2                     ## @PORT_E
	.comm	_hsw_crt_get_config,4,2         ## @hsw_crt_get_config
	.comm	_intel_ddi_get_hw_state,4,2     ## @intel_ddi_get_hw_state
	.comm	_hsw_crt_compute_config,4,2     ## @hsw_crt_compute_config
	.comm	_hsw_pre_pll_enable_crt,4,2     ## @hsw_pre_pll_enable_crt
	.comm	_hsw_pre_enable_crt,4,2         ## @hsw_pre_enable_crt
	.comm	_hsw_enable_crt,4,2             ## @hsw_enable_crt
	.comm	_hsw_disable_crt,4,2            ## @hsw_disable_crt
	.comm	_hsw_post_disable_crt,4,2       ## @hsw_post_disable_crt
	.comm	_pch_crt_compute_config,4,2     ## @pch_crt_compute_config
	.comm	_pch_disable_crt,4,2            ## @pch_disable_crt
	.comm	_pch_post_disable_crt,4,2       ## @pch_post_disable_crt
	.comm	_intel_crt_compute_config,4,2   ## @intel_crt_compute_config
	.comm	_intel_disable_crt,4,2          ## @intel_disable_crt
	.comm	_PORT_NONE,4,2                  ## @PORT_NONE
	.comm	_intel_crt_get_config,4,2       ## @intel_crt_get_config
	.comm	_intel_crt_get_hw_state,4,2     ## @intel_crt_get_hw_state
	.comm	_intel_enable_crt,4,2           ## @intel_enable_crt
	.comm	_intel_connector_get_hw_state,4,2 ## @intel_connector_get_hw_state
	.comm	_intel_crt_connector_helper_funcs,4,2 ## @intel_crt_connector_helper_funcs
	.comm	_DRM_CONNECTOR_POLL_CONNECT,4,2 ## @DRM_CONNECTOR_POLL_CONNECT
	.comm	_FDI_RX_POLARITY_REVERSED_LPT,4,2 ## @FDI_RX_POLARITY_REVERSED_LPT
	.comm	_FDI_RX_LINK_REVERSAL_OVERRIDE,4,2 ## @FDI_RX_LINK_REVERSAL_OVERRIDE
	.comm	_PIPE_A,4,2                     ## @PIPE_A
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_crt_init                 ; -- Begin function intel_crt_init
	.p2align	2
_intel_crt_init:                        ; @intel_crt_init
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	bl	_HAS_PCH_SPLIT
	cbz	x0, LBB0_2
; %bb.1:
Lloh0:
	adrp	x8, _PCH_ADPA@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCH_ADPA@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:
	mov	x0, x19
	bl	_IS_VALLEYVIEW
Lloh2:
	adrp	x8, _VLV_ADPA@GOTPAGE
Lloh3:
	ldr	x8, [x8, _VLV_ADPA@GOTPAGEOFF]
Lloh4:
	adrp	x9, _ADPA@GOTPAGE
Lloh5:
	ldr	x9, [x9, _ADPA@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x9, x8, eq
LBB0_3:
	ldr	w24, [x8]
	mov	x0, x24
	bl	_I915_READ
Lloh6:
	adrp	x21, _ADPA_DAC_ENABLE@GOTPAGE
Lloh7:
	ldr	x21, [x21, _ADPA_DAC_ENABLE@GOTPAGEOFF]
	ldr	w8, [x21]
	tst	w8, w0
	b.ne	LBB0_6
; %bb.4:
	mov	x20, x0
	orr	w8, w8, w0
Lloh8:
	adrp	x9, _ADPA_HSYNC_CNTL_DISABLE@GOTPAGE
Lloh9:
	ldr	x9, [x9, _ADPA_HSYNC_CNTL_DISABLE@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh11:
	adrp	x9, _ADPA_VSYNC_CNTL_DISABLE@GOTPAGE
Lloh12:
	ldr	x9, [x9, _ADPA_VSYNC_CNTL_DISABLE@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	orr	w1, w8, w9
	mov	x0, x24
	bl	_I915_WRITE
	mov	x0, x24
	bl	_I915_READ
	ldr	w8, [x21]
	tst	w8, w0
	b.eq	LBB0_13
; %bb.5:
	mov	x0, x24
	mov	x1, x20
	bl	_I915_WRITE
LBB0_6:
Lloh14:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh15:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	mov	w0, #88
	bl	_kzalloc
	cbz	x0, LBB0_13
; %bb.7:
	mov	x21, x0
	bl	_intel_connector_alloc
	cbz	x0, LBB0_14
; %bb.8:
	mov	x22, x0
	add	x23, x0, #8
	str	x0, [x21, #80]
	add	x25, x19, #4
Lloh17:
	adrp	x8, _DRM_MODE_CONNECTOR_VGA@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DRM_MODE_CONNECTOR_VGA@GOTPAGEOFF]
Lloh19:
	ldr	w3, [x8]
Lloh20:
	adrp	x2, _intel_crt_connector_funcs@GOTPAGE
Lloh21:
	ldr	x2, [x2, _intel_crt_connector_funcs@GOTPAGEOFF]
	mov	x0, x25
	mov	x1, x23
	bl	_drm_connector_init
	add	x20, x21, #8
Lloh22:
	adrp	x8, _DRM_MODE_ENCODER_DAC@GOTPAGE
Lloh23:
	ldr	x8, [x8, _DRM_MODE_ENCODER_DAC@GOTPAGEOFF]
Lloh24:
	ldr	w3, [x8]
Lloh25:
	adrp	x2, _intel_crt_enc_funcs@GOTPAGE
Lloh26:
	ldr	x2, [x2, _intel_crt_enc_funcs@GOTPAGEOFF]
Lloh27:
	adrp	x4, l_.str@PAGE
Lloh28:
	add	x4, x4, l_.str@PAGEOFF
	mov	x0, x25
	mov	x1, x20
	bl	_drm_encoder_init
	mov	x0, x22
	mov	x1, x21
	bl	_intel_connector_attach_encoder
Lloh29:
	adrp	x8, _INTEL_OUTPUT_ANALOG@GOTPAGE
Lloh30:
	ldr	x8, [x8, _INTEL_OUTPUT_ANALOG@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	str	w8, [x21, #60]
Lloh32:
	adrp	x8, _INTEL_OUTPUT_DVO@GOTPAGE
Lloh33:
	ldr	x8, [x8, _INTEL_OUTPUT_DVO@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	mov	w9, #1
	lsl	w8, w9, w8
Lloh35:
	adrp	x10, _INTEL_OUTPUT_HDMI@GOTPAGE
Lloh36:
	ldr	x10, [x10, _INTEL_OUTPUT_HDMI@GOTPAGEOFF]
Lloh37:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
	str	w8, [x21]
	mov	x0, x19
	bl	_IS_I830
	cmp	x0, #0
	mov	w8, #7
	csinc	w8, w8, wzr, eq
	str	w8, [x21, #4]
	mov	x0, x19
	mov	w1, #2
	bl	_IS_GEN
	cmp	x0, #0
	cset	w8, eq
	str	w8, [x22, #8]
	str	xzr, [x22, #16]
	str	w24, [x21, #72]
Lloh38:
	adrp	x8, _POWER_DOMAIN_PORT_CRT@GOTPAGE
Lloh39:
	ldr	x8, [x8, _POWER_DOMAIN_PORT_CRT@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	str	w8, [x21, #56]
	mov	x0, x19
	bl	_I915_HAS_HOTPLUG
	cbz	x0, LBB0_11
; %bb.9:
Lloh41:
	adrp	x8, _intel_spurious_crt_detect@GOTPAGE
Lloh42:
	ldr	x8, [x8, _intel_spurious_crt_detect@GOTPAGEOFF]
Lloh43:
	ldr	w0, [x8]
	bl	_dmi_check_system
	cbnz	w0, LBB0_11
; %bb.10:
Lloh44:
	adrp	x8, _HPD_CRT@GOTPAGE
Lloh45:
	ldr	x8, [x8, _HPD_CRT@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
Lloh47:
	adrp	x9, _intel_encoder_hotplug@GOTPAGE
Lloh48:
	ldr	x9, [x9, _intel_encoder_hotplug@GOTPAGEOFF]
Lloh49:
	ldr	w9, [x9]
	stp	w9, w8, [x21, #48]
LBB0_11:
	mov	x0, x19
	bl	_HAS_DDI
	cbz	x0, LBB0_15
; %bb.12:
Lloh50:
	adrp	x8, _PORT_E@GOTPAGE
Lloh51:
	ldr	x8, [x8, _PORT_E@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
Lloh53:
	adrp	x9, _hsw_crt_get_config@GOTPAGE
Lloh54:
	ldr	x9, [x9, _hsw_crt_get_config@GOTPAGEOFF]
Lloh55:
	ldr	w9, [x9]
	stp	w9, w8, [x21, #20]
Lloh56:
	adrp	x8, _intel_ddi_get_hw_state@GOTPAGE
Lloh57:
	ldr	x8, [x8, _intel_ddi_get_hw_state@GOTPAGEOFF]
Lloh58:
	adrp	x9, _hsw_crt_compute_config@GOTPAGE
Lloh59:
	ldr	x9, [x9, _hsw_crt_compute_config@GOTPAGEOFF]
Lloh60:
	ldr	w8, [x8]
Lloh61:
	ldr	w9, [x9]
Lloh62:
	adrp	x10, _hsw_pre_pll_enable_crt@GOTPAGE
Lloh63:
	ldr	x10, [x10, _hsw_pre_pll_enable_crt@GOTPAGEOFF]
Lloh64:
	ldr	w10, [x10]
	str	w10, [x21, #44]
Lloh65:
	adrp	x10, _hsw_pre_enable_crt@GOTPAGE
Lloh66:
	ldr	x10, [x10, _hsw_pre_enable_crt@GOTPAGEOFF]
Lloh67:
	ldr	w10, [x10]
Lloh68:
	adrp	x11, _hsw_enable_crt@GOTPAGE
Lloh69:
	ldr	x11, [x11, _hsw_enable_crt@GOTPAGEOFF]
Lloh70:
	ldr	w11, [x11]
	stp	w11, w8, [x21, #12]
Lloh71:
	adrp	x8, _hsw_disable_crt@GOTPAGE
Lloh72:
	ldr	x8, [x8, _hsw_disable_crt@GOTPAGEOFF]
Lloh73:
	ldr	w8, [x8]
	stp	w8, w9, [x21, #28]
Lloh74:
	adrp	x8, _hsw_post_disable_crt@GOTPAGE
Lloh75:
	ldr	x8, [x8, _hsw_post_disable_crt@GOTPAGEOFF]
Lloh76:
	ldr	w8, [x8]
	stp	w8, w10, [x21, #36]
	b	LBB0_19
LBB0_13:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
LBB0_14:
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_kfree
LBB0_15:
	mov	x0, x19
	bl	_HAS_PCH_SPLIT
	cbz	x0, LBB0_17
; %bb.16:
Lloh77:
	adrp	x8, _pch_crt_compute_config@GOTPAGE
Lloh78:
	ldr	x8, [x8, _pch_crt_compute_config@GOTPAGEOFF]
Lloh79:
	adrp	x9, _pch_disable_crt@GOTPAGE
Lloh80:
	ldr	x9, [x9, _pch_disable_crt@GOTPAGEOFF]
Lloh81:
	ldr	w8, [x8]
Lloh82:
	ldr	w9, [x9]
Lloh83:
	adrp	x10, _pch_post_disable_crt@GOTPAGE
Lloh84:
	ldr	x10, [x10, _pch_post_disable_crt@GOTPAGEOFF]
Lloh85:
	ldr	w10, [x10]
	str	w10, [x21, #36]
	b	LBB0_18
LBB0_17:
Lloh86:
	adrp	x8, _intel_crt_compute_config@GOTPAGE
Lloh87:
	ldr	x8, [x8, _intel_crt_compute_config@GOTPAGEOFF]
Lloh88:
	ldr	w8, [x8]
Lloh89:
	adrp	x9, _intel_disable_crt@GOTPAGE
Lloh90:
	ldr	x9, [x9, _intel_disable_crt@GOTPAGEOFF]
Lloh91:
	ldr	w9, [x9]
LBB0_18:
	stp	w9, w8, [x21, #28]
Lloh92:
	adrp	x8, _PORT_NONE@GOTPAGE
Lloh93:
	ldr	x8, [x8, _PORT_NONE@GOTPAGEOFF]
Lloh94:
	adrp	x9, _intel_crt_get_config@GOTPAGE
Lloh95:
	ldr	x9, [x9, _intel_crt_get_config@GOTPAGEOFF]
Lloh96:
	ldr	w8, [x8]
Lloh97:
	ldr	w9, [x9]
	stp	w9, w8, [x21, #20]
Lloh98:
	adrp	x8, _intel_crt_get_hw_state@GOTPAGE
Lloh99:
	ldr	x8, [x8, _intel_crt_get_hw_state@GOTPAGEOFF]
Lloh100:
	ldr	w8, [x8]
Lloh101:
	adrp	x9, _intel_enable_crt@GOTPAGE
Lloh102:
	ldr	x9, [x9, _intel_enable_crt@GOTPAGEOFF]
Lloh103:
	ldr	w9, [x9]
	stp	w9, w8, [x21, #12]
LBB0_19:
Lloh104:
	adrp	x8, _intel_connector_get_hw_state@GOTPAGE
Lloh105:
	ldr	x8, [x8, _intel_connector_get_hw_state@GOTPAGEOFF]
Lloh106:
	ldr	w8, [x8]
	str	w8, [x22, #4]
Lloh107:
	adrp	x1, _intel_crt_connector_helper_funcs@GOTPAGE
Lloh108:
	ldr	x1, [x1, _intel_crt_connector_helper_funcs@GOTPAGEOFF]
	mov	x0, x23
	bl	_drm_connector_helper_add
	mov	x0, x19
	bl	_I915_HAS_HOTPLUG
	cbnz	x0, LBB0_21
; %bb.20:
Lloh109:
	adrp	x8, _DRM_CONNECTOR_POLL_CONNECT@GOTPAGE
Lloh110:
	ldr	x8, [x8, _DRM_CONNECTOR_POLL_CONNECT@GOTPAGEOFF]
Lloh111:
	ldr	w8, [x8]
	str	w8, [x22]
LBB0_21:
	str	xzr, [x21, #64]
	mov	x0, x19
	bl	_HAS_PCH_LPT
	cbz	x0, LBB0_23
; %bb.22:
Lloh112:
	adrp	x8, _FDI_RX_POLARITY_REVERSED_LPT@GOTPAGE
Lloh113:
	ldr	x8, [x8, _FDI_RX_POLARITY_REVERSED_LPT@GOTPAGEOFF]
Lloh114:
	adrp	x9, _FDI_RX_LINK_REVERSAL_OVERRIDE@GOTPAGE
Lloh115:
	ldr	x9, [x9, _FDI_RX_LINK_REVERSAL_OVERRIDE@GOTPAGEOFF]
Lloh116:
	ldr	w8, [x8]
Lloh117:
	ldr	w9, [x9]
	orr	w21, w9, w8
Lloh118:
	adrp	x8, _PIPE_A@GOTPAGE
Lloh119:
	ldr	x8, [x8, _PIPE_A@GOTPAGEOFF]
Lloh120:
	ldr	w0, [x8]
	bl	_FDI_RX_CTL
	bl	_I915_READ
	and	w8, w0, w21
	str	w8, [x19]
LBB0_23:
	mov	x0, x20
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_intel_crt_reset
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpAdd	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh60
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh81
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh101, Lloh102, Lloh103
	.loh AdrpLdrGotLdr	Lloh98, Lloh99, Lloh100
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh97
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh96
	.loh AdrpLdrGot	Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh104, Lloh105, Lloh106
	.loh AdrpLdrGotLdr	Lloh109, Lloh110, Lloh111
	.loh AdrpLdrGotLdr	Lloh118, Lloh119, Lloh120
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh117
	.loh AdrpLdrGotLdr	Lloh112, Lloh113, Lloh116
	.cfi_endproc
                                        ; -- End function
	.comm	_PCH_ADPA,4,2                   ; @PCH_ADPA
	.comm	_VLV_ADPA,4,2                   ; @VLV_ADPA
	.comm	_ADPA,4,2                       ; @ADPA
	.comm	_ADPA_DAC_ENABLE,4,2            ; @ADPA_DAC_ENABLE
	.comm	_ADPA_HSYNC_CNTL_DISABLE,4,2    ; @ADPA_HSYNC_CNTL_DISABLE
	.comm	_ADPA_VSYNC_CNTL_DISABLE,4,2    ; @ADPA_VSYNC_CNTL_DISABLE
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_intel_crt_connector_funcs,4,2  ; @intel_crt_connector_funcs
	.comm	_DRM_MODE_CONNECTOR_VGA,4,2     ; @DRM_MODE_CONNECTOR_VGA
	.comm	_intel_crt_enc_funcs,4,2        ; @intel_crt_enc_funcs
	.comm	_DRM_MODE_ENCODER_DAC,4,2       ; @DRM_MODE_ENCODER_DAC
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"CRT"

	.comm	_INTEL_OUTPUT_ANALOG,4,2        ; @INTEL_OUTPUT_ANALOG
	.comm	_INTEL_OUTPUT_DVO,4,2           ; @INTEL_OUTPUT_DVO
	.comm	_INTEL_OUTPUT_HDMI,4,2          ; @INTEL_OUTPUT_HDMI
	.comm	_POWER_DOMAIN_PORT_CRT,4,2      ; @POWER_DOMAIN_PORT_CRT
	.comm	_intel_spurious_crt_detect,4,2  ; @intel_spurious_crt_detect
	.comm	_HPD_CRT,4,2                    ; @HPD_CRT
	.comm	_intel_encoder_hotplug,4,2      ; @intel_encoder_hotplug
	.comm	_PORT_E,4,2                     ; @PORT_E
	.comm	_hsw_crt_get_config,4,2         ; @hsw_crt_get_config
	.comm	_intel_ddi_get_hw_state,4,2     ; @intel_ddi_get_hw_state
	.comm	_hsw_crt_compute_config,4,2     ; @hsw_crt_compute_config
	.comm	_hsw_pre_pll_enable_crt,4,2     ; @hsw_pre_pll_enable_crt
	.comm	_hsw_pre_enable_crt,4,2         ; @hsw_pre_enable_crt
	.comm	_hsw_enable_crt,4,2             ; @hsw_enable_crt
	.comm	_hsw_disable_crt,4,2            ; @hsw_disable_crt
	.comm	_hsw_post_disable_crt,4,2       ; @hsw_post_disable_crt
	.comm	_pch_crt_compute_config,4,2     ; @pch_crt_compute_config
	.comm	_pch_disable_crt,4,2            ; @pch_disable_crt
	.comm	_pch_post_disable_crt,4,2       ; @pch_post_disable_crt
	.comm	_intel_crt_compute_config,4,2   ; @intel_crt_compute_config
	.comm	_intel_disable_crt,4,2          ; @intel_disable_crt
	.comm	_PORT_NONE,4,2                  ; @PORT_NONE
	.comm	_intel_crt_get_config,4,2       ; @intel_crt_get_config
	.comm	_intel_crt_get_hw_state,4,2     ; @intel_crt_get_hw_state
	.comm	_intel_enable_crt,4,2           ; @intel_enable_crt
	.comm	_intel_connector_get_hw_state,4,2 ; @intel_connector_get_hw_state
	.comm	_intel_crt_connector_helper_funcs,4,2 ; @intel_crt_connector_helper_funcs
	.comm	_DRM_CONNECTOR_POLL_CONNECT,4,2 ; @DRM_CONNECTOR_POLL_CONNECT
	.comm	_FDI_RX_POLARITY_REVERSED_LPT,4,2 ; @FDI_RX_POLARITY_REVERSED_LPT
	.comm	_FDI_RX_LINK_REVERSAL_OVERRIDE,4,2 ; @FDI_RX_LINK_REVERSAL_OVERRIDE
	.comm	_PIPE_A,4,2                     ; @PIPE_A
.subsections_via_symbols
