	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function qat_alg_aead_init_dec_session
_qat_alg_aead_init_dec_session:         ## @qat_alg_aead_init_dec_session
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movq	%rdx, %r14
	movl	%esi, -48(%rbp)                 ## 4-byte Spill
	movq	%rdi, %rbx
	callq	_crypto_aead_ctx
	movq	%rax, %r13
	movq	%rbx, %rdi
	callq	_crypto_aead_authsize
	movl	%eax, %r12d
	movq	40(%r13), %rbx
	movl	4(%r13), %edi
	callq	_crypto_shash_digestsize
	movl	%eax, %edi
	movl	$8, %esi
	callq	_roundup
	movslq	%eax, %r15
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_QAT_AES_HW_CONFIG_DEC
	movl	%eax, 8(%rbx,%r15,2)
	movl	4(%rbx,%r15,2), %edi
	movl	(%r14), %edx
	movl	12(%r14), %esi
	callq	_memcpy
	movq	_ICP_QAT_HW_AUTH_MODE1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	(%r13), %esi
	movl	%r12d, -44(%rbp)                ## 4-byte Spill
	movl	%r12d, %edx
	callq	_ICP_QAT_HW_AUTH_CONFIG_BUILD
	movl	%eax, 4(%rbx)
	movl	4(%r13), %edi
	callq	_crypto_shash_blocksize
	movl	%eax, %edi
	callq	_cpu_to_be32
	movl	%eax, (%rbx)
	movl	4(%r14), %ecx
	movl	8(%r14), %edx
	movq	%rbx, %rdi
	movq	%r13, %rsi
	callq	_qat_alg_do_precomputes
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	_EFAULT@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_11
LBB0_2:
	leaq	16(%r13), %r15
	movq	%r13, %rdi
	addq	$20, %rdi
	movl	$1, %esi
	callq	_qat_alg_init_common_hdr
	movq	_ICP_QAT_FW_LA_CMD_HASH_CIPHER@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%r13)
	movl	20(%r13), %edi
	movq	_ICP_QAT_FW_LA_DIGEST_IN_BUFFER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET
	movl	20(%r13), %edi
	movq	_ICP_QAT_FW_LA_NO_RET_AUTH_RES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ICP_QAT_FW_LA_RET_AUTH_SET
	movl	20(%r13), %edi
	movq	_ICP_QAT_FW_LA_CMP_AUTH_RES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ICP_QAT_FW_LA_CMP_AUTH_SET
	movl	4(%r13), %edi
	movl	8(%r13), %eax
	movl	%eax, 32(%r13)
	movl	$0, 28(%r13)
	movl	(%r14), %eax
	sarl	$3, %eax
	movl	%eax, 16(%r13)
	movq	_AES_BLOCK_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	sarl	$3, %eax
	movl	%eax, 20(%r13)
	callq	_crypto_shash_digestsize
	movl	%eax, %edi
	movl	$8, %esi
	callq	_roundup
	addl	%eax, %eax
	cltq
	addq	$4, %rax
	shrq	$3, %rax
	movl	%eax, 24(%r13)
	movq	_ICP_QAT_FW_SLICE_CIPHER@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%r15, %rdi
	callq	_ICP_QAT_FW_COMN_CURR_ID_SET
	movq	_ICP_QAT_FW_SLICE_DRAM_WR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_ICP_QAT_FW_COMN_NEXT_ID_SET
	movq	$0, 48(%r13)
	movq	_ICP_QAT_FW_AUTH_HDR_FLAG_NO_NESTED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%r13)
	movl	-44(%rbp), %r12d                ## 4-byte Reload
	movl	%r12d, 28(%r13)
	movl	%r12d, 32(%r13)
	movl	(%r13), %eax
	cmpl	$128, %eax
	je	LBB0_7
## %bb.3:
	cmpl	$129, %eax
	je	LBB0_6
## %bb.4:
	cmpl	$130, %eax
	jne	LBB0_9
## %bb.5:
	movq	_ICP_QAT_HW_SHA1_STATE1_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$8, %esi
	callq	_round_up
	movl	%eax, 20(%r15)
	movq	_ICP_QAT_HW_SHA1_STATE2_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$8, %esi
	callq	_round_up
	movl	%eax, 24(%r15)
	movq	32(%r15), %rbx
	jmp	LBB0_10
LBB0_7:
	movq	_ICP_QAT_HW_SHA512_STATE1_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%r15)
	movq	_ICP_QAT_HW_SHA512_STATE2_SZ@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_6:
	movq	_ICP_QAT_HW_SHA256_STATE1_SZ@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%r15)
	movq	_ICP_QAT_HW_SHA256_STATE2_SZ@GOTPCREL(%rip), %rax
LBB0_8:
	movl	(%rax), %eax
	movl	%eax, 24(%r15)
LBB0_9:
	xorl	%ebx, %ebx
LBB0_10:
	movl	36(%r13), %edi
	movl	$8, %esi
	callq	_round_up
	cltq
	addq	$4, %rax
	shrq	$3, %rax
	addq	%rbx, %rax
	movq	%rax, 56(%r13)
	movl	%r12d, 16(%r13)
	movq	_ICP_QAT_FW_SLICE_AUTH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_ICP_QAT_FW_COMN_CURR_ID_SET
	movl	(%r14), %esi
	movq	%r15, %rdi
	callq	_ICP_QAT_FW_COMN_NEXT_ID_SET
	xorl	%eax, %eax
LBB0_11:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ICP_QAT_HW_AUTH_MODE1,4,2      ## @ICP_QAT_HW_AUTH_MODE1
	.comm	_EFAULT,4,2                     ## @EFAULT
	.comm	_ICP_QAT_FW_LA_CMD_HASH_CIPHER,4,2 ## @ICP_QAT_FW_LA_CMD_HASH_CIPHER
	.comm	_ICP_QAT_FW_LA_DIGEST_IN_BUFFER,4,2 ## @ICP_QAT_FW_LA_DIGEST_IN_BUFFER
	.comm	_ICP_QAT_FW_LA_NO_RET_AUTH_RES,4,2 ## @ICP_QAT_FW_LA_NO_RET_AUTH_RES
	.comm	_ICP_QAT_FW_LA_CMP_AUTH_RES,4,2 ## @ICP_QAT_FW_LA_CMP_AUTH_RES
	.comm	_AES_BLOCK_SIZE,4,2             ## @AES_BLOCK_SIZE
	.comm	_ICP_QAT_FW_SLICE_CIPHER,4,2    ## @ICP_QAT_FW_SLICE_CIPHER
	.comm	_ICP_QAT_FW_SLICE_DRAM_WR,4,2   ## @ICP_QAT_FW_SLICE_DRAM_WR
	.comm	_ICP_QAT_FW_AUTH_HDR_FLAG_NO_NESTED,4,2 ## @ICP_QAT_FW_AUTH_HDR_FLAG_NO_NESTED
	.comm	_ICP_QAT_HW_SHA1_STATE1_SZ,4,2  ## @ICP_QAT_HW_SHA1_STATE1_SZ
	.comm	_ICP_QAT_HW_SHA1_STATE2_SZ,4,2  ## @ICP_QAT_HW_SHA1_STATE2_SZ
	.comm	_ICP_QAT_HW_SHA256_STATE1_SZ,4,2 ## @ICP_QAT_HW_SHA256_STATE1_SZ
	.comm	_ICP_QAT_HW_SHA256_STATE2_SZ,4,2 ## @ICP_QAT_HW_SHA256_STATE2_SZ
	.comm	_ICP_QAT_HW_SHA512_STATE1_SZ,4,2 ## @ICP_QAT_HW_SHA512_STATE1_SZ
	.comm	_ICP_QAT_HW_SHA512_STATE2_SZ,4,2 ## @ICP_QAT_HW_SHA512_STATE2_SZ
	.comm	_ICP_QAT_FW_SLICE_AUTH,4,2      ## @ICP_QAT_FW_SLICE_AUTH
	.no_dead_strip	_qat_alg_aead_init_dec_session
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function qat_alg_aead_init_dec_session
_qat_alg_aead_init_dec_session:         ; @qat_alg_aead_init_dec_session
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x3
	mov	x22, x2
	mov	x23, x1
	mov	x20, x0
	bl	_crypto_aead_ctx
	mov	x19, x0
	mov	x0, x20
	bl	_crypto_aead_authsize
	mov	x20, x0
	ldr	x24, [x19, #40]
	add	x25, x24, #4
	ldr	w0, [x19, #4]
	bl	_crypto_shash_digestsize
	mov	w1, #8
	bl	_roundup
	add	x25, x25, w0, sxtw #1
	mov	x0, x23
	mov	x1, x21
	bl	_QAT_AES_HW_CONFIG_DEC
	str	w0, [x25, #4]
	ldr	w0, [x25]
	ldr	w1, [x22, #12]
	ldr	w2, [x22]
	bl	_memcpy
Lloh0:
	adrp	x8, _ICP_QAT_HW_AUTH_MODE1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ICP_QAT_HW_AUTH_MODE1@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	ldr	w1, [x19]
	mov	x2, x20
	bl	_ICP_QAT_HW_AUTH_CONFIG_BUILD
	str	w0, [x24, #4]
	ldr	w0, [x19, #4]
	bl	_crypto_shash_blocksize
	bl	_cpu_to_be32
	str	w0, [x24]
	ldp	w3, w2, [x22, #4]
	mov	x0, x24
	mov	x1, x19
	bl	_qat_alg_do_precomputes
	cbz	x0, LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _EFAULT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _EFAULT@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_10
LBB0_2:
	add	x21, x19, #16
	add	x0, x19, #20
	mov	w1, #1
	bl	_qat_alg_init_common_hdr
Lloh6:
	adrp	x8, _ICP_QAT_FW_LA_CMD_HASH_CIPHER@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ICP_QAT_FW_LA_CMD_HASH_CIPHER@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	str	w8, [x19, #24]
	ldr	w0, [x19, #20]
Lloh9:
	adrp	x8, _ICP_QAT_FW_LA_DIGEST_IN_BUFFER@GOTPAGE
Lloh10:
	ldr	x8, [x8, _ICP_QAT_FW_LA_DIGEST_IN_BUFFER@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	bl	_ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET
	ldr	w0, [x19, #20]
Lloh12:
	adrp	x8, _ICP_QAT_FW_LA_NO_RET_AUTH_RES@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ICP_QAT_FW_LA_NO_RET_AUTH_RES@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	bl	_ICP_QAT_FW_LA_RET_AUTH_SET
	ldr	w0, [x19, #20]
Lloh15:
	adrp	x8, _ICP_QAT_FW_LA_CMP_AUTH_RES@GOTPAGE
Lloh16:
	ldr	x8, [x8, _ICP_QAT_FW_LA_CMP_AUTH_RES@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	bl	_ICP_QAT_FW_LA_CMP_AUTH_SET
	ldp	w0, w8, [x19, #4]
	stp	wzr, w8, [x19, #28]
	ldr	w8, [x22]
	asr	w8, w8, #3
Lloh18:
	adrp	x9, _AES_BLOCK_SIZE@GOTPAGE
Lloh19:
	ldr	x9, [x9, _AES_BLOCK_SIZE@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	asr	w9, w9, #3
	stp	w8, w9, [x19, #16]
	bl	_crypto_shash_digestsize
	mov	w1, #8
	bl	_roundup
	lsl	w8, w0, #1
	sxtw	x8, w8
	add	x8, x8, #4
	lsr	x8, x8, #3
	str	w8, [x19, #24]
Lloh21:
	adrp	x22, _ICP_QAT_FW_SLICE_CIPHER@GOTPAGE
Lloh22:
	ldr	x22, [x22, _ICP_QAT_FW_SLICE_CIPHER@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x21
	bl	_ICP_QAT_FW_COMN_CURR_ID_SET
Lloh23:
	adrp	x8, _ICP_QAT_FW_SLICE_DRAM_WR@GOTPAGE
Lloh24:
	ldr	x8, [x8, _ICP_QAT_FW_SLICE_DRAM_WR@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_ICP_QAT_FW_COMN_NEXT_ID_SET
	str	xzr, [x19, #48]
Lloh26:
	adrp	x8, _ICP_QAT_FW_AUTH_HDR_FLAG_NO_NESTED@GOTPAGE
Lloh27:
	ldr	x8, [x8, _ICP_QAT_FW_AUTH_HDR_FLAG_NO_NESTED@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	str	w8, [x19, #64]
	stp	w20, w20, [x19, #28]
	ldr	w8, [x19]
	cmp	w8, #128
	b.eq	LBB0_6
; %bb.3:
	cmp	w8, #129
	b.eq	LBB0_7
; %bb.4:
	mov	x23, #0
	cmp	w8, #130
	b.ne	LBB0_9
; %bb.5:
Lloh29:
	adrp	x8, _ICP_QAT_HW_SHA1_STATE1_SZ@GOTPAGE
Lloh30:
	ldr	x8, [x8, _ICP_QAT_HW_SHA1_STATE1_SZ@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	mov	w1, #8
	bl	_round_up
	str	w0, [x21, #20]
Lloh32:
	adrp	x8, _ICP_QAT_HW_SHA1_STATE2_SZ@GOTPAGE
Lloh33:
	ldr	x8, [x8, _ICP_QAT_HW_SHA1_STATE2_SZ@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
	mov	w1, #8
	bl	_round_up
	str	w0, [x21, #24]
	ldr	x23, [x21, #32]
	b	LBB0_9
LBB0_6:
	mov	x23, #0
Lloh35:
	adrp	x8, _ICP_QAT_HW_SHA512_STATE1_SZ@GOTPAGE
Lloh36:
	ldr	x8, [x8, _ICP_QAT_HW_SHA512_STATE1_SZ@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
Lloh38:
	adrp	x9, _ICP_QAT_HW_SHA512_STATE2_SZ@GOTPAGE
Lloh39:
	ldr	x9, [x9, _ICP_QAT_HW_SHA512_STATE2_SZ@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:
	mov	x23, #0
Lloh40:
	adrp	x8, _ICP_QAT_HW_SHA256_STATE1_SZ@GOTPAGE
Lloh41:
	ldr	x8, [x8, _ICP_QAT_HW_SHA256_STATE1_SZ@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
Lloh43:
	adrp	x9, _ICP_QAT_HW_SHA256_STATE2_SZ@GOTPAGE
Lloh44:
	ldr	x9, [x9, _ICP_QAT_HW_SHA256_STATE2_SZ@GOTPAGEOFF]
LBB0_8:
	ldr	w9, [x9]
	stp	w8, w9, [x21, #20]
LBB0_9:
	ldr	w0, [x19, #36]
	mov	w1, #8
	bl	_round_up
                                        ; kill: def $w0 killed $w0 def $x0
	sxtw	x8, w0
	add	x8, x8, #4
	add	x8, x23, x8, lsr #3
	str	x8, [x19, #56]
	str	w20, [x19, #16]
Lloh45:
	adrp	x8, _ICP_QAT_FW_SLICE_AUTH@GOTPAGE
Lloh46:
	ldr	x8, [x8, _ICP_QAT_FW_SLICE_AUTH@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_ICP_QAT_FW_COMN_CURR_ID_SET
	ldr	w1, [x22]
	mov	x0, x21
	bl	_ICP_QAT_FW_COMN_NEXT_ID_SET
	mov	w0, #0
LBB0_10:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.cfi_endproc
                                        ; -- End function
	.comm	_ICP_QAT_HW_AUTH_MODE1,4,2      ; @ICP_QAT_HW_AUTH_MODE1
	.comm	_EFAULT,4,2                     ; @EFAULT
	.comm	_ICP_QAT_FW_LA_CMD_HASH_CIPHER,4,2 ; @ICP_QAT_FW_LA_CMD_HASH_CIPHER
	.comm	_ICP_QAT_FW_LA_DIGEST_IN_BUFFER,4,2 ; @ICP_QAT_FW_LA_DIGEST_IN_BUFFER
	.comm	_ICP_QAT_FW_LA_NO_RET_AUTH_RES,4,2 ; @ICP_QAT_FW_LA_NO_RET_AUTH_RES
	.comm	_ICP_QAT_FW_LA_CMP_AUTH_RES,4,2 ; @ICP_QAT_FW_LA_CMP_AUTH_RES
	.comm	_AES_BLOCK_SIZE,4,2             ; @AES_BLOCK_SIZE
	.comm	_ICP_QAT_FW_SLICE_CIPHER,4,2    ; @ICP_QAT_FW_SLICE_CIPHER
	.comm	_ICP_QAT_FW_SLICE_DRAM_WR,4,2   ; @ICP_QAT_FW_SLICE_DRAM_WR
	.comm	_ICP_QAT_FW_AUTH_HDR_FLAG_NO_NESTED,4,2 ; @ICP_QAT_FW_AUTH_HDR_FLAG_NO_NESTED
	.comm	_ICP_QAT_HW_SHA1_STATE1_SZ,4,2  ; @ICP_QAT_HW_SHA1_STATE1_SZ
	.comm	_ICP_QAT_HW_SHA1_STATE2_SZ,4,2  ; @ICP_QAT_HW_SHA1_STATE2_SZ
	.comm	_ICP_QAT_HW_SHA256_STATE1_SZ,4,2 ; @ICP_QAT_HW_SHA256_STATE1_SZ
	.comm	_ICP_QAT_HW_SHA256_STATE2_SZ,4,2 ; @ICP_QAT_HW_SHA256_STATE2_SZ
	.comm	_ICP_QAT_HW_SHA512_STATE1_SZ,4,2 ; @ICP_QAT_HW_SHA512_STATE1_SZ
	.comm	_ICP_QAT_HW_SHA512_STATE2_SZ,4,2 ; @ICP_QAT_HW_SHA512_STATE2_SZ
	.comm	_ICP_QAT_FW_SLICE_AUTH,4,2      ; @ICP_QAT_FW_SLICE_AUTH
	.no_dead_strip	_qat_alg_aead_init_dec_session
.subsections_via_symbols
