	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_dp_aux_init
_intel_dp_aux_init:                     ## @intel_dp_aux_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_dp_to_i915
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	_dp_to_dig_port
	movq	%rax, %r14
	movq	%r15, %rdi
	callq	_INTEL_GEN
	cmpl	$8, %eax
	jle	LBB0_2
## %bb.1:
	movq	_skl_aux_data_reg@GOTPCREL(%rip), %rcx
	movq	_skl_aux_ctl_reg@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_2:
	movq	%r15, %rdi
	callq	_HAS_PCH_SPLIT
	testq	%rax, %rax
	movq	_ilk_aux_ctl_reg@GOTPCREL(%rip), %rax
	cmoveq	_g4x_aux_ctl_reg@GOTPCREL(%rip), %rax
	movq	_ilk_aux_data_reg@GOTPCREL(%rip), %rcx
	cmoveq	_g4x_aux_data_reg@GOTPCREL(%rip), %rcx
LBB0_3:
	movl	(%rax), %eax
	movl	%eax, 20(%rbx)
	movl	(%rcx), %eax
	movl	%eax, 16(%rbx)
	movq	%r15, %rdi
	callq	_INTEL_GEN
	cmpl	$8, %eax
	jle	LBB0_5
## %bb.4:
	movq	_skl_get_aux_clock_divider@GOTPCREL(%rip), %r12
	jmp	LBB0_10
LBB0_5:
	movq	%r15, %rdi
	callq	_IS_BROADWELL
	movq	_hsw_get_aux_clock_divider@GOTPCREL(%rip), %r12
	testq	%rax, %rax
	jne	LBB0_10
## %bb.6:
	movq	%r15, %rdi
	callq	_IS_HASWELL
	testq	%rax, %rax
	jne	LBB0_10
## %bb.7:
	movq	%r15, %rdi
	callq	_HAS_PCH_SPLIT
	testq	%rax, %rax
	jne	LBB0_8
## %bb.9:
	movq	_g4x_get_aux_clock_divider@GOTPCREL(%rip), %r12
	jmp	LBB0_10
LBB0_8:
	movq	_ilk_get_aux_clock_divider@GOTPCREL(%rip), %r12
LBB0_10:
	movl	(%r12), %eax
	movl	%eax, 12(%rbx)
	movq	%r15, %rdi
	callq	_INTEL_GEN
	cmpl	$9, %eax
	jl	LBB0_11
## %bb.12:
	movq	_skl_get_aux_send_ctl@GOTPCREL(%rip), %rax
	jmp	LBB0_13
LBB0_11:
	movq	_g4x_get_aux_send_ctl@GOTPCREL(%rip), %rax
LBB0_13:
	movl	(%rax), %eax
	movl	%eax, 8(%rbx)
	movq	%rbx, %rdi
	callq	_drm_dp_aux_init
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	(%r14), %edi
	callq	_port_name
	leaq	L_.str(%rip), %rsi
	movl	%r15d, %edi
	movl	%eax, %edx
	callq	_kasprintf
	movl	%eax, 4(%rbx)
	movq	_intel_dp_aux_transfer@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%rbx)
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_skl_aux_ctl_reg,4,2            ## @skl_aux_ctl_reg
	.comm	_skl_aux_data_reg,4,2           ## @skl_aux_data_reg
	.comm	_ilk_aux_ctl_reg,4,2            ## @ilk_aux_ctl_reg
	.comm	_ilk_aux_data_reg,4,2           ## @ilk_aux_data_reg
	.comm	_g4x_aux_ctl_reg,4,2            ## @g4x_aux_ctl_reg
	.comm	_g4x_aux_data_reg,4,2           ## @g4x_aux_data_reg
	.comm	_skl_get_aux_clock_divider,4,2  ## @skl_get_aux_clock_divider
	.comm	_hsw_get_aux_clock_divider,4,2  ## @hsw_get_aux_clock_divider
	.comm	_ilk_get_aux_clock_divider,4,2  ## @ilk_get_aux_clock_divider
	.comm	_g4x_get_aux_clock_divider,4,2  ## @g4x_get_aux_clock_divider
	.comm	_skl_get_aux_send_ctl,4,2       ## @skl_get_aux_send_ctl
	.comm	_g4x_get_aux_send_ctl,4,2       ## @g4x_get_aux_send_ctl
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"DPDDC-%c"

	.comm	_intel_dp_aux_transfer,4,2      ## @intel_dp_aux_transfer
	.no_dead_strip	_intel_dp_aux_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_dp_aux_init
_intel_dp_aux_init:                     ; @intel_dp_aux_init
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_dp_to_i915
	mov	x21, x0
	mov	x0, x19
	bl	_dp_to_dig_port
	mov	x20, x0
	mov	x0, x21
	bl	_INTEL_GEN
	cmp	w0, #8
	b.le	LBB0_2
; %bb.1:
Lloh0:
	adrp	x9, _skl_aux_data_reg@GOTPAGE
Lloh1:
	ldr	x9, [x9, _skl_aux_data_reg@GOTPAGEOFF]
Lloh2:
	adrp	x8, _skl_aux_ctl_reg@GOTPAGE
Lloh3:
	ldr	x8, [x8, _skl_aux_ctl_reg@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:
	mov	x0, x21
	bl	_HAS_PCH_SPLIT
Lloh4:
	adrp	x8, _ilk_aux_ctl_reg@GOTPAGE
Lloh5:
	ldr	x8, [x8, _ilk_aux_ctl_reg@GOTPAGEOFF]
Lloh6:
	adrp	x9, _g4x_aux_ctl_reg@GOTPAGE
Lloh7:
	ldr	x9, [x9, _g4x_aux_ctl_reg@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x9, x8, eq
Lloh8:
	adrp	x9, _ilk_aux_data_reg@GOTPAGE
Lloh9:
	ldr	x9, [x9, _ilk_aux_data_reg@GOTPAGEOFF]
Lloh10:
	adrp	x10, _g4x_aux_data_reg@GOTPAGE
Lloh11:
	ldr	x10, [x10, _g4x_aux_data_reg@GOTPAGEOFF]
	csel	x9, x10, x9, eq
LBB0_3:
	ldr	w8, [x8]
	ldr	w9, [x9]
	stp	w9, w8, [x19, #16]
	mov	x0, x21
	bl	_INTEL_GEN
	cmp	w0, #8
	b.le	LBB0_5
; %bb.4:
Lloh12:
	adrp	x8, _skl_get_aux_clock_divider@GOTPAGE
Lloh13:
	ldr	x8, [x8, _skl_get_aux_clock_divider@GOTPAGEOFF]
	b	LBB0_8
LBB0_5:
	mov	x0, x21
	bl	_IS_BROADWELL
	cbnz	x0, LBB0_7
; %bb.6:
	mov	x0, x21
	bl	_IS_HASWELL
	cbz	x0, LBB0_9
LBB0_7:
Lloh14:
	adrp	x8, _hsw_get_aux_clock_divider@GOTPAGE
Lloh15:
	ldr	x8, [x8, _hsw_get_aux_clock_divider@GOTPAGEOFF]
LBB0_8:
	ldr	w8, [x8]
	str	w8, [x19, #12]
	mov	x0, x21
	bl	_INTEL_GEN
Lloh16:
	adrp	x8, _skl_get_aux_send_ctl@GOTPAGE
Lloh17:
	ldr	x8, [x8, _skl_get_aux_send_ctl@GOTPAGEOFF]
Lloh18:
	adrp	x9, _g4x_get_aux_send_ctl@GOTPAGE
Lloh19:
	ldr	x9, [x9, _g4x_get_aux_send_ctl@GOTPAGEOFF]
	cmp	w0, #8
	csel	x8, x8, x9, gt
	ldr	w8, [x8]
	str	w8, [x19, #8]
	mov	x0, x19
	bl	_drm_dp_aux_init
Lloh20:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh21:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh22:
	ldr	w21, [x8]
	ldr	w0, [x20]
	bl	_port_name
	mov	x2, x0
Lloh23:
	adrp	x1, l_.str@PAGE
Lloh24:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x21
	bl	_kasprintf
Lloh25:
	adrp	x8, _intel_dp_aux_transfer@GOTPAGE
Lloh26:
	ldr	x8, [x8, _intel_dp_aux_transfer@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	stp	w8, w0, [x19]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_9:
	mov	x0, x21
	bl	_HAS_PCH_SPLIT
Lloh28:
	adrp	x8, _ilk_get_aux_clock_divider@GOTPAGE
Lloh29:
	ldr	x8, [x8, _ilk_get_aux_clock_divider@GOTPAGEOFF]
Lloh30:
	adrp	x9, _g4x_get_aux_clock_divider@GOTPAGE
Lloh31:
	ldr	x9, [x9, _g4x_get_aux_clock_divider@GOTPAGEOFF]
	cmp	x0, #0
	csel	x8, x9, x8, eq
	b	LBB0_8
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_skl_aux_ctl_reg,4,2            ; @skl_aux_ctl_reg
	.comm	_skl_aux_data_reg,4,2           ; @skl_aux_data_reg
	.comm	_ilk_aux_ctl_reg,4,2            ; @ilk_aux_ctl_reg
	.comm	_ilk_aux_data_reg,4,2           ; @ilk_aux_data_reg
	.comm	_g4x_aux_ctl_reg,4,2            ; @g4x_aux_ctl_reg
	.comm	_g4x_aux_data_reg,4,2           ; @g4x_aux_data_reg
	.comm	_skl_get_aux_clock_divider,4,2  ; @skl_get_aux_clock_divider
	.comm	_hsw_get_aux_clock_divider,4,2  ; @hsw_get_aux_clock_divider
	.comm	_ilk_get_aux_clock_divider,4,2  ; @ilk_get_aux_clock_divider
	.comm	_g4x_get_aux_clock_divider,4,2  ; @g4x_get_aux_clock_divider
	.comm	_skl_get_aux_send_ctl,4,2       ; @skl_get_aux_send_ctl
	.comm	_g4x_get_aux_send_ctl,4,2       ; @g4x_get_aux_send_ctl
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"DPDDC-%c"

	.comm	_intel_dp_aux_transfer,4,2      ; @intel_dp_aux_transfer
	.no_dead_strip	_intel_dp_aux_init
.subsections_via_symbols
