	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_irq_init                 ## -- Begin function intel_irq_init
	.p2align	4, 0x90
_intel_irq_init:                        ## @intel_irq_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	callq	_IS_I945GM
	testq	%rax, %rax
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_i945gm_vblank_work_init
LBB0_2:
	movq	%rbx, %rdi
	callq	_intel_hpd_init_work
	leaq	44(%rbx), %rdi
	movq	_gen6_pm_rps_work@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_INIT_WORK
	leaq	32(%rbx), %rdi
	movq	_ivybridge_parity_work@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_INIT_WORK
	movq	_MAX_L3_SLICES@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	testl	%edx, %edx
	jle	LBB0_9
## %bb.3:
	leaq	-1(%rdx), %rcx
	movl	%edx, %eax
	andl	$3, %eax
	cmpq	$3, %rcx
	jae	LBB0_5
## %bb.4:
	xorl	%ecx, %ecx
	jmp	LBB0_7
LBB0_5:
	andl	$-4, %edx
	xorl	%ecx, %ecx
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	24(%rbx), %rsi
	movq	$0, (%rsi,%rcx,8)
	movq	24(%rbx), %rsi
	movq	$0, 8(%rsi,%rcx,8)
	movq	24(%rbx), %rsi
	movq	$0, 16(%rsi,%rcx,8)
	movq	24(%rbx), %rsi
	movq	$0, 24(%rsi,%rcx,8)
	addq	$4, %rcx
	cmpq	%rcx, %rdx
	jne	LBB0_6
LBB0_7:
	testq	%rax, %rax
	je	LBB0_9
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movq	24(%rbx), %rdx
	movq	$0, (%rdx,%rcx,8)
	incq	%rcx
	decq	%rax
	jne	LBB0_8
LBB0_9:
	movq	%rbx, %rdi
	callq	_HAS_GT_UC
	testq	%rax, %rax
	je	LBB0_12
## %bb.10:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$10, %eax
	jg	LBB0_12
## %bb.11:
	movq	_GUC_INTR_GUC2HOST@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	shll	$16, %eax
	movl	%eax, 20(%rbx)
LBB0_12:
	movq	%rbx, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	je	LBB0_14
## %bb.13:
	movq	_GEN6_PM_RP_UP_EI_EXPIRED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	jmp	LBB0_15
LBB0_14:
	movq	_GEN6_PM_RP_UP_THRESHOLD@GOTPCREL(%rip), %rcx
	movq	_GEN6_PM_RP_DOWN_THRESHOLD@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	(%rcx), %eax
	movq	_GEN6_PM_RP_DOWN_TIMEOUT@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
LBB0_15:
	movl	%eax, (%rbx)
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$10, %eax
	jl	LBB0_17
## %bb.16:
	movzwl	2(%rbx), %edi
	shll	$16, %edi
	callq	_GEM_WARN_ON
LBB0_17:
	movl	$0, 40(%rbx)
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$7, %eax
	jg	LBB0_19
## %bb.18:
	movq	_GEN6_PM_RP_UP_EI_EXPIRED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 40(%rbx)
LBB0_19:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$8, %eax
	jl	LBB0_21
## %bb.20:
	movq	_GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 40(%rbx)
LBB0_21:
	movl	$1, 48(%rbx)
	movl	$1, 4(%rbx)
	movq	%rbx, %rdi
	callq	_IS_VALLEYVIEW
	testq	%rax, %rax
	jne	LBB0_23
## %bb.22:
	movq	%rbx, %rdi
	callq	_IS_CHERRYVIEW
	testq	%rax, %rax
	je	LBB0_24
LBB0_23:
	movl	$0, 4(%rbx)
LBB0_24:
	movq	_HPD_STORM_DEFAULT_THRESHOLD@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rbx)
	movq	%rbx, %rdi
	callq	_HAS_DP_MST
	xorl	%ecx, %ecx
	testl	%eax, %eax
	sete	%cl
	movl	%ecx, 12(%rbx)
	movq	%rbx, %rdi
	callq	_HAS_GMCH
	movq	%rbx, %rdi
	testq	%rax, %rax
	je	LBB0_27
## %bb.25:
	callq	_I915_HAS_HOTPLUG
	testq	%rax, %rax
	je	LBB0_37
## %bb.26:
	movq	_i915_hpd_irq_setup@GOTPCREL(%rip), %rax
	jmp	LBB0_36
LBB0_27:
	callq	_HAS_PCH_MCC
	testq	%rax, %rax
	je	LBB0_29
## %bb.28:
	movq	_mcc_hpd_irq_setup@GOTPCREL(%rip), %rax
	jmp	LBB0_36
LBB0_29:
	movq	%rbx, %rdi
	callq	_INTEL_GEN
	cmpl	$10, %eax
	jle	LBB0_31
## %bb.30:
	movq	_gen11_hpd_irq_setup@GOTPCREL(%rip), %rax
	jmp	LBB0_36
LBB0_31:
	movq	%rbx, %rdi
	callq	_IS_GEN9_LP
	testq	%rax, %rax
	je	LBB0_33
## %bb.32:
	movq	_bxt_hpd_irq_setup@GOTPCREL(%rip), %rax
	jmp	LBB0_36
LBB0_33:
	movq	%rbx, %rdi
	callq	_INTEL_PCH_TYPE
	movq	_PCH_SPT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_34
## %bb.35:
	movq	_ilk_hpd_irq_setup@GOTPCREL(%rip), %rax
	jmp	LBB0_36
LBB0_34:
	movq	_spt_hpd_irq_setup@GOTPCREL(%rip), %rax
LBB0_36:
	movl	(%rax), %eax
	movl	%eax, 8(%rbx)
LBB0_37:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_gen6_pm_rps_work,4,2           ## @gen6_pm_rps_work
	.comm	_ivybridge_parity_work,4,2      ## @ivybridge_parity_work
	.comm	_MAX_L3_SLICES,4,2              ## @MAX_L3_SLICES
	.comm	_GUC_INTR_GUC2HOST,4,2          ## @GUC_INTR_GUC2HOST
	.comm	_GEN6_PM_RP_UP_EI_EXPIRED,4,2   ## @GEN6_PM_RP_UP_EI_EXPIRED
	.comm	_GEN6_PM_RP_UP_THRESHOLD,4,2    ## @GEN6_PM_RP_UP_THRESHOLD
	.comm	_GEN6_PM_RP_DOWN_THRESHOLD,4,2  ## @GEN6_PM_RP_DOWN_THRESHOLD
	.comm	_GEN6_PM_RP_DOWN_TIMEOUT,4,2    ## @GEN6_PM_RP_DOWN_TIMEOUT
	.comm	_GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC,4,2 ## @GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC
	.comm	_HPD_STORM_DEFAULT_THRESHOLD,4,2 ## @HPD_STORM_DEFAULT_THRESHOLD
	.comm	_i915_hpd_irq_setup,4,2         ## @i915_hpd_irq_setup
	.comm	_mcc_hpd_irq_setup,4,2          ## @mcc_hpd_irq_setup
	.comm	_gen11_hpd_irq_setup,4,2        ## @gen11_hpd_irq_setup
	.comm	_bxt_hpd_irq_setup,4,2          ## @bxt_hpd_irq_setup
	.comm	_PCH_SPT,8,3                    ## @PCH_SPT
	.comm	_spt_hpd_irq_setup,4,2          ## @spt_hpd_irq_setup
	.comm	_ilk_hpd_irq_setup,4,2          ## @ilk_hpd_irq_setup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_intel_irq_init                 ; -- Begin function intel_irq_init
	.p2align	2
_intel_irq_init:                        ; @intel_irq_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_IS_I945GM
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_i945gm_vblank_work_init
LBB0_2:
	mov	x0, x19
	bl	_intel_hpd_init_work
	add	x0, x19, #44
Lloh0:
	adrp	x8, _gen6_pm_rps_work@GOTPAGE
Lloh1:
	ldr	x8, [x8, _gen6_pm_rps_work@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_INIT_WORK
	add	x0, x19, #32
Lloh3:
	adrp	x8, _ivybridge_parity_work@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ivybridge_parity_work@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_INIT_WORK
Lloh6:
	adrp	x8, _MAX_L3_SLICES@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MAX_L3_SLICES@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_5
; %bb.3:
	mov	x8, #0
	lsl	x9, x9, #3
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x10, [x19, #24]
	str	xzr, [x10, x8]
	add	x8, x8, #8
	cmp	x9, x8
	b.ne	LBB0_4
LBB0_5:
	mov	x0, x19
	bl	_HAS_GT_UC
	cbz	x0, LBB0_8
; %bb.6:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #10
	b.gt	LBB0_8
; %bb.7:
Lloh9:
	adrp	x8, _GUC_INTR_GUC2HOST@GOTPAGE
Lloh10:
	ldr	x8, [x8, _GUC_INTR_GUC2HOST@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	lsl	w8, w8, #16
	str	w8, [x19, #20]
LBB0_8:
	mov	x0, x19
	bl	_IS_VALLEYVIEW
Lloh12:
	adrp	x20, _GEN6_PM_RP_UP_EI_EXPIRED@GOTPAGE
Lloh13:
	ldr	x20, [x20, _GEN6_PM_RP_UP_EI_EXPIRED@GOTPAGEOFF]
	cbz	x0, LBB0_10
; %bb.9:
	ldr	w8, [x20]
	b	LBB0_11
LBB0_10:
Lloh14:
	adrp	x8, _GEN6_PM_RP_UP_THRESHOLD@GOTPAGE
Lloh15:
	ldr	x8, [x8, _GEN6_PM_RP_UP_THRESHOLD@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	adrp	x9, _GEN6_PM_RP_DOWN_THRESHOLD@GOTPAGE
Lloh18:
	ldr	x9, [x9, _GEN6_PM_RP_DOWN_THRESHOLD@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh20:
	adrp	x9, _GEN6_PM_RP_DOWN_TIMEOUT@GOTPAGE
Lloh21:
	ldr	x9, [x9, _GEN6_PM_RP_DOWN_TIMEOUT@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w8, w9
LBB0_11:
	str	w8, [x19]
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #10
	b.lt	LBB0_13
; %bb.12:
	ldrh	w8, [x19, #2]
	lsl	w0, w8, #16
	bl	_GEM_WARN_ON
LBB0_13:
	str	wzr, [x19, #40]
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #7
	b.gt	LBB0_15
; %bb.14:
	ldr	w8, [x20]
	ldr	w9, [x19, #40]
	orr	w8, w9, w8
	str	w8, [x19, #40]
LBB0_15:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #8
	b.lt	LBB0_17
; %bb.16:
Lloh23:
	adrp	x8, _GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC@GOTPAGE
Lloh24:
	ldr	x8, [x8, _GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	ldr	w9, [x19, #40]
	orr	w8, w9, w8
	str	w8, [x19, #40]
LBB0_17:
	mov	w8, #1
	str	w8, [x19, #48]
	str	w8, [x19, #4]
	mov	x0, x19
	bl	_IS_VALLEYVIEW
	cbnz	x0, LBB0_19
; %bb.18:
	mov	x0, x19
	bl	_IS_CHERRYVIEW
	cbz	x0, LBB0_20
LBB0_19:
	str	wzr, [x19, #4]
LBB0_20:
Lloh26:
	adrp	x8, _HPD_STORM_DEFAULT_THRESHOLD@GOTPAGE
Lloh27:
	ldr	x8, [x8, _HPD_STORM_DEFAULT_THRESHOLD@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	str	w8, [x19, #16]
	mov	x0, x19
	bl	_HAS_DP_MST
	cmp	w0, #0
	cset	w8, eq
	str	w8, [x19, #12]
	mov	x0, x19
	bl	_HAS_GMCH
	cbz	x0, LBB0_23
; %bb.21:
	mov	x0, x19
	bl	_I915_HAS_HOTPLUG
	cbz	x0, LBB0_31
; %bb.22:
Lloh29:
	adrp	x8, _i915_hpd_irq_setup@GOTPAGE
Lloh30:
	ldr	x8, [x8, _i915_hpd_irq_setup@GOTPAGEOFF]
	b	LBB0_30
LBB0_23:
	mov	x0, x19
	bl	_HAS_PCH_MCC
	cbz	x0, LBB0_25
; %bb.24:
Lloh31:
	adrp	x8, _mcc_hpd_irq_setup@GOTPAGE
Lloh32:
	ldr	x8, [x8, _mcc_hpd_irq_setup@GOTPAGEOFF]
	b	LBB0_30
LBB0_25:
	mov	x0, x19
	bl	_INTEL_GEN
	cmp	w0, #10
	b.le	LBB0_27
; %bb.26:
Lloh33:
	adrp	x8, _gen11_hpd_irq_setup@GOTPAGE
Lloh34:
	ldr	x8, [x8, _gen11_hpd_irq_setup@GOTPAGEOFF]
	b	LBB0_30
LBB0_27:
	mov	x0, x19
	bl	_IS_GEN9_LP
	cbz	x0, LBB0_29
; %bb.28:
Lloh35:
	adrp	x8, _bxt_hpd_irq_setup@GOTPAGE
Lloh36:
	ldr	x8, [x8, _bxt_hpd_irq_setup@GOTPAGEOFF]
	b	LBB0_30
LBB0_29:
	mov	x0, x19
	bl	_INTEL_PCH_TYPE
Lloh37:
	adrp	x8, _PCH_SPT@GOTPAGE
Lloh38:
	ldr	x8, [x8, _PCH_SPT@GOTPAGEOFF]
Lloh39:
	ldr	x8, [x8]
Lloh40:
	adrp	x9, _spt_hpd_irq_setup@GOTPAGE
Lloh41:
	ldr	x9, [x9, _spt_hpd_irq_setup@GOTPAGEOFF]
Lloh42:
	adrp	x10, _ilk_hpd_irq_setup@GOTPAGE
Lloh43:
	ldr	x10, [x10, _ilk_hpd_irq_setup@GOTPAGEOFF]
	cmp	x0, x8
	csel	x8, x10, x9, lt
LBB0_30:
	ldr	w8, [x8]
	str	w8, [x19, #8]
LBB0_31:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.cfi_endproc
                                        ; -- End function
	.comm	_gen6_pm_rps_work,4,2           ; @gen6_pm_rps_work
	.comm	_ivybridge_parity_work,4,2      ; @ivybridge_parity_work
	.comm	_MAX_L3_SLICES,4,2              ; @MAX_L3_SLICES
	.comm	_GUC_INTR_GUC2HOST,4,2          ; @GUC_INTR_GUC2HOST
	.comm	_GEN6_PM_RP_UP_EI_EXPIRED,4,2   ; @GEN6_PM_RP_UP_EI_EXPIRED
	.comm	_GEN6_PM_RP_UP_THRESHOLD,4,2    ; @GEN6_PM_RP_UP_THRESHOLD
	.comm	_GEN6_PM_RP_DOWN_THRESHOLD,4,2  ; @GEN6_PM_RP_DOWN_THRESHOLD
	.comm	_GEN6_PM_RP_DOWN_TIMEOUT,4,2    ; @GEN6_PM_RP_DOWN_TIMEOUT
	.comm	_GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC,4,2 ; @GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC
	.comm	_HPD_STORM_DEFAULT_THRESHOLD,4,2 ; @HPD_STORM_DEFAULT_THRESHOLD
	.comm	_i915_hpd_irq_setup,4,2         ; @i915_hpd_irq_setup
	.comm	_mcc_hpd_irq_setup,4,2          ; @mcc_hpd_irq_setup
	.comm	_gen11_hpd_irq_setup,4,2        ; @gen11_hpd_irq_setup
	.comm	_bxt_hpd_irq_setup,4,2          ; @bxt_hpd_irq_setup
	.comm	_PCH_SPT,8,3                    ; @PCH_SPT
	.comm	_spt_hpd_irq_setup,4,2          ; @spt_hpd_irq_setup
	.comm	_ilk_hpd_irq_setup,4,2          ; @ilk_hpd_irq_setup
.subsections_via_symbols
