	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rtsx_pci_init_ocp              ## -- Begin function rtsx_pci_init_ocp
	.p2align	4, 0x90
_rtsx_pci_init_ocp:                     ## @rtsx_pci_init_ocp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	24(%rdi), %rax
	movq	(%rax), %rax
	testq	%rax, %rax
	je	LBB0_1
## %bb.3:
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmpq	*%rax                           ## TAILCALL
LBB0_1:
	cmpq	$0, 16(%rbx)
	je	LBB0_2
## %bb.4:
	movl	8(%rbx), %r14d
	movq	_FPDCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_OC_POWER_DOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_rtsx_pci_write_register
	movq	_REG_OCPPARA1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SD_OCP_TIME_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_SD_OCP_TIME_800@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_rtsx_pci_write_register
	movq	_REG_OCPPARA2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SD_OCP_THD_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r14d, %ecx
	callq	_rtsx_pci_write_register
	movq	_REG_OCPGLITCH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SD_OCP_GLITCH_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	(%rbx), %ecx
	movq	%rbx, %rdi
	callq	_rtsx_pci_write_register
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_rtsx_pci_enable_ocp            ## TAILCALL
LBB0_2:
	movq	_FPDCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_OC_POWER_DOWN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%ecx, %edx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_rtsx_pci_write_register        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_FPDCTL,4,2                     ## @FPDCTL
	.comm	_OC_POWER_DOWN,4,2              ## @OC_POWER_DOWN
	.comm	_REG_OCPPARA1,4,2               ## @REG_OCPPARA1
	.comm	_SD_OCP_TIME_MASK,4,2           ## @SD_OCP_TIME_MASK
	.comm	_SD_OCP_TIME_800,4,2            ## @SD_OCP_TIME_800
	.comm	_REG_OCPPARA2,4,2               ## @REG_OCPPARA2
	.comm	_SD_OCP_THD_MASK,4,2            ## @SD_OCP_THD_MASK
	.comm	_REG_OCPGLITCH,4,2              ## @REG_OCPGLITCH
	.comm	_SD_OCP_GLITCH_MASK,4,2         ## @SD_OCP_GLITCH_MASK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_rtsx_pci_init_ocp              ; -- Begin function rtsx_pci_init_ocp
	.p2align	2
_rtsx_pci_init_ocp:                     ; @rtsx_pci_init_ocp
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0, #24]
	ldr	x1, [x8]
	cbz	x1, LBB0_2
; %bb.1:
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	br	x1
LBB0_2:
	ldr	x8, [x19, #16]
	cbz	x8, LBB0_4
; %bb.3:
	ldr	w20, [x19, #8]
Lloh0:
	adrp	x8, _FPDCTL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _FPDCTL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _OC_POWER_DOWN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _OC_POWER_DOWN@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_rtsx_pci_write_register
Lloh6:
	adrp	x8, _REG_OCPPARA1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _REG_OCPPARA1@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
Lloh9:
	adrp	x8, _SD_OCP_TIME_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SD_OCP_TIME_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
Lloh12:
	adrp	x8, _SD_OCP_TIME_800@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SD_OCP_TIME_800@GOTPAGEOFF]
Lloh14:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_rtsx_pci_write_register
Lloh15:
	adrp	x8, _REG_OCPPARA2@GOTPAGE
Lloh16:
	ldr	x8, [x8, _REG_OCPPARA2@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
Lloh18:
	adrp	x8, _SD_OCP_THD_MASK@GOTPAGE
Lloh19:
	ldr	x8, [x8, _SD_OCP_THD_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x3, x20
	bl	_rtsx_pci_write_register
Lloh21:
	adrp	x8, _REG_OCPGLITCH@GOTPAGE
Lloh22:
	ldr	x8, [x8, _REG_OCPGLITCH@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
Lloh24:
	adrp	x8, _SD_OCP_GLITCH_MASK@GOTPAGE
Lloh25:
	ldr	x8, [x8, _SD_OCP_GLITCH_MASK@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	ldr	w3, [x19]
	mov	x0, x19
	bl	_rtsx_pci_write_register
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_rtsx_pci_enable_ocp
LBB0_4:
Lloh27:
	adrp	x8, _FPDCTL@GOTPAGE
Lloh28:
	ldr	x8, [x8, _FPDCTL@GOTPAGEOFF]
Lloh29:
	adrp	x9, _OC_POWER_DOWN@GOTPAGE
Lloh30:
	ldr	x9, [x9, _OC_POWER_DOWN@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
Lloh32:
	ldr	w2, [x9]
	mov	x0, x19
	mov	x3, x2
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_rtsx_pci_write_register
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh31
	.cfi_endproc
                                        ; -- End function
	.comm	_FPDCTL,4,2                     ; @FPDCTL
	.comm	_OC_POWER_DOWN,4,2              ; @OC_POWER_DOWN
	.comm	_REG_OCPPARA1,4,2               ; @REG_OCPPARA1
	.comm	_SD_OCP_TIME_MASK,4,2           ; @SD_OCP_TIME_MASK
	.comm	_SD_OCP_TIME_800,4,2            ; @SD_OCP_TIME_800
	.comm	_REG_OCPPARA2,4,2               ; @REG_OCPPARA2
	.comm	_SD_OCP_THD_MASK,4,2            ; @SD_OCP_THD_MASK
	.comm	_REG_OCPGLITCH,4,2              ; @REG_OCPGLITCH
	.comm	_SD_OCP_GLITCH_MASK,4,2         ; @SD_OCP_GLITCH_MASK
.subsections_via_symbols
