	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_int_mem_test
_bnx2x_int_mem_test:                    ## @bnx2x_int_mem_test
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	callq	_CHIP_REV_IS_FPGA
	movl	$120, %ebx
	testq	%rax, %rax
	jne	LBB0_2
## %bb.1:
	movq	%r15, %rdi
	callq	_CHIP_REV_IS_EMUL
	testq	%rax, %rax
	movl	$1, %eax
	movl	$200, %ebx
	cmovel	%eax, %ebx
LBB0_2:
	movq	_TSDM_REG_ENABLE_IN1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_TCM_REG_PRS_IFEN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_CFC_REG_DEBUG0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_REG_WR
	movq	_NIG_REG_PRS_REQ_IN_EN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_PRS_REG_CFC_SEARCH_INITIAL_CREDIT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	%r15, %rdi
	callq	_bnx2x_lb_pckt
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	imull	$-1000, %ebx, %ebx              ## imm = 0xFC18
	movq	_NIG_REG_STAT2_BRB_OCTET@GOTPCREL(%rip), %r12
	movq	_wb_data@GOTPCREL(%rip), %r14
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	$2, %edx
	callq	_bnx2x_read_dmae
	movq	(%r14), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_bnx2x_sp
	movl	(%rax), %r13d
	cmpl	$16, %r13d
	je	LBB0_4
## %bb.8:                               ##   in Loop: Header=BB0_3 Depth=1
	movl	$10000, %edi                    ## imm = 0x2710
	movl	$20000, %esi                    ## imm = 0x4E20
	callq	_usleep_range
	incl	%ebx
	jne	LBB0_3
## %bb.9:
	leaq	L_.str(%rip), %rdi
	movl	%r13d, %esi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
	movl	$-1, %r14d
	jmp	LBB0_23
LBB0_4:
	imull	$-1000, -48(%rbp), %ebx         ## 4-byte Folded Reload
                                        ## imm = 0xFC18
	.p2align	4, 0x90
LBB0_5:                                 ## =>This Inner Loop Header: Depth=1
	movq	_PRS_REG_NUM_OF_PACKETS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	cmpl	$1, %eax
	je	LBB0_10
## %bb.6:                               ##   in Loop: Header=BB0_5 Depth=1
	movl	%eax, %r13d
	movl	$10000, %edi                    ## imm = 0x2710
	movl	$20000, %esi                    ## imm = 0x4E20
	callq	_usleep_range
	incl	%ebx
	jne	LBB0_5
## %bb.7:
	leaq	L_.str.1(%rip), %rdi
	movl	%r13d, %esi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
	movl	$-2, %r14d
	jmp	LBB0_23
LBB0_10:
	movq	_GRCBASE_MISC@GOTPCREL(%rip), %rbx
	movq	_MISC_REGISTERS_RESET_REG_1_CLEAR@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rbx), %rsi
	movq	%r15, %rdi
	movl	$3, %edx
	callq	_REG_WR
	movl	$50, %edi
	callq	_msleep
	movq	_MISC_REGISTERS_RESET_REG_1_SET@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rbx), %rsi
	movq	%r15, %rdi
	movl	$3, %edx
	callq	_REG_WR
	movl	$50, %edi
	callq	_msleep
	movq	_BLOCK_BRB1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHASE_COMMON@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_bnx2x_init_block
	movq	_BLOCK_PRS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_bnx2x_init_block
	movq	_NETIF_MSG_HW@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str.2(%rip), %rsi
	callq	_DP
	movq	_TSDM_REG_ENABLE_IN1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_TCM_REG_PRS_IFEN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_CFC_REG_DEBUG0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_REG_WR
	movq	_NIG_REG_PRS_REQ_IN_EN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_PRS_REG_CFC_SEARCH_INITIAL_CREDIT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	%r15, %rdi
	callq	_bnx2x_lb_pckt
	movq	%r15, %rdi
	callq	_bnx2x_lb_pckt
	movq	%r15, %rdi
	callq	_bnx2x_lb_pckt
	movq	%r15, %rdi
	callq	_bnx2x_lb_pckt
	movq	%r15, %rdi
	callq	_bnx2x_lb_pckt
	movq	%r15, %rdi
	callq	_bnx2x_lb_pckt
	movq	%r15, %rdi
	callq	_bnx2x_lb_pckt
	movq	%r15, %rdi
	callq	_bnx2x_lb_pckt
	movq	%r15, %rdi
	callq	_bnx2x_lb_pckt
	movq	%r15, %rdi
	callq	_bnx2x_lb_pckt
	imull	$-1000, -48(%rbp), %r13d        ## 4-byte Folded Reload
                                        ## imm = 0xFC18
	.p2align	4, 0x90
LBB0_11:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %esi
	movq	%r15, %rdi
	movl	$2, %edx
	callq	_bnx2x_read_dmae
	movq	(%r14), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_bnx2x_sp
	movl	(%rax), %ebx
	cmpl	$176, %ebx
	je	LBB0_14
## %bb.12:                              ##   in Loop: Header=BB0_11 Depth=1
	movl	$10000, %edi                    ## imm = 0x2710
	movl	$20000, %esi                    ## imm = 0x4E20
	callq	_usleep_range
	incl	%r13d
	jne	LBB0_11
## %bb.13:
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
	movl	$-3, %r14d
	jmp	LBB0_23
LBB0_14:
	movq	_PRS_REG_NUM_OF_PACKETS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	cmpl	$2, %eax
	je	LBB0_16
## %bb.15:
	leaq	L_.str.3(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_16:
	movq	_PRS_REG_CFC_SEARCH_INITIAL_CREDIT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_REG_WR
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	addl	%eax, %eax
	leal	(%rax,%rax,4), %edi
	callq	_msleep
	movq	_PRS_REG_NUM_OF_PACKETS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	cmpl	$3, %eax
	je	LBB0_18
## %bb.17:
	leaq	L_.str.3(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_18:
	movq	_NIG_REG_INGRESS_EOP_LB_FIFO@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movq	_NIG_REG_INGRESS_EOP_LB_EMPTY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	cmpl	$1, %eax
	jne	LBB0_19
## %bb.20:
	movq	_MISC_REGISTERS_RESET_REG_1_CLEAR@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	_GRCBASE_MISC@GOTPCREL(%rip), %rbx
	addq	(%rbx), %rsi
	movq	%r15, %rdi
	movl	$3, %edx
	callq	_REG_WR
	movl	$50, %edi
	callq	_msleep
	movq	_MISC_REGISTERS_RESET_REG_1_SET@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rbx), %rsi
	movq	%r15, %rdi
	movl	$3, %edx
	callq	_REG_WR
	movl	$50, %edi
	callq	_msleep
	movq	_BLOCK_BRB1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHASE_COMMON@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_bnx2x_init_block
	movq	_BLOCK_PRS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edx
	movq	%r15, %rdi
	callq	_bnx2x_init_block
	movq	%r15, %rdi
	callq	_CNIC_SUPPORT
	testl	%eax, %eax
	jne	LBB0_22
## %bb.21:
	movq	_PRS_REG_NIC_MODE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_REG_WR
LBB0_22:
	movq	_TSDM_REG_ENABLE_IN1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	movl	$2147483647, %edx               ## imm = 0x7FFFFFFF
	callq	_REG_WR
	movq	_TCM_REG_PRS_IFEN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_REG_WR
	movq	_CFC_REG_DEBUG0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	xorl	%r14d, %r14d
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_NIG_REG_PRS_REQ_IN_EN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_REG_WR
	movq	_NETIF_MSG_HW@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str.5(%rip), %rsi
	callq	_DP
	jmp	LBB0_23
LBB0_19:
	leaq	L_.str.4(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
	movl	$-4, %r14d
LBB0_23:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TSDM_REG_ENABLE_IN1,8,3        ## @TSDM_REG_ENABLE_IN1
	.comm	_TCM_REG_PRS_IFEN,8,3           ## @TCM_REG_PRS_IFEN
	.comm	_CFC_REG_DEBUG0,8,3             ## @CFC_REG_DEBUG0
	.comm	_NIG_REG_PRS_REQ_IN_EN,8,3      ## @NIG_REG_PRS_REQ_IN_EN
	.comm	_PRS_REG_CFC_SEARCH_INITIAL_CREDIT,8,3 ## @PRS_REG_CFC_SEARCH_INITIAL_CREDIT
	.comm	_NIG_REG_STAT2_BRB_OCTET,4,2    ## @NIG_REG_STAT2_BRB_OCTET
	.comm	_wb_data,8,3                    ## @wb_data
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"NIG timeout  val = 0x%x\n"

	.comm	_PRS_REG_NUM_OF_PACKETS,4,2     ## @PRS_REG_NUM_OF_PACKETS
L_.str.1:                               ## @.str.1
	.asciz	"PRS timeout val = 0x%x\n"

	.comm	_GRCBASE_MISC,8,3               ## @GRCBASE_MISC
	.comm	_MISC_REGISTERS_RESET_REG_1_CLEAR,8,3 ## @MISC_REGISTERS_RESET_REG_1_CLEAR
	.comm	_MISC_REGISTERS_RESET_REG_1_SET,8,3 ## @MISC_REGISTERS_RESET_REG_1_SET
	.comm	_BLOCK_BRB1,4,2                 ## @BLOCK_BRB1
	.comm	_PHASE_COMMON,4,2               ## @PHASE_COMMON
	.comm	_BLOCK_PRS,4,2                  ## @BLOCK_PRS
	.comm	_NETIF_MSG_HW,4,2               ## @NETIF_MSG_HW
L_.str.2:                               ## @.str.2
	.asciz	"part2\n"

L_.str.3:                               ## @.str.3
	.asciz	"PRS timeout  val = 0x%x\n"

	.comm	_NIG_REG_INGRESS_EOP_LB_FIFO,4,2 ## @NIG_REG_INGRESS_EOP_LB_FIFO
	.comm	_NIG_REG_INGRESS_EOP_LB_EMPTY,4,2 ## @NIG_REG_INGRESS_EOP_LB_EMPTY
L_.str.4:                               ## @.str.4
	.asciz	"clear of NIG failed\n"

	.comm	_PRS_REG_NIC_MODE,8,3           ## @PRS_REG_NIC_MODE
L_.str.5:                               ## @.str.5
	.asciz	"done\n"

	.no_dead_strip	_bnx2x_int_mem_test
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_int_mem_test
_bnx2x_int_mem_test:                    ; @bnx2x_int_mem_test
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	bl	_CHIP_REV_IS_FPGA
	cbz	x0, LBB0_2
; %bb.1:
	mov	w25, #120
	b	LBB0_3
LBB0_2:
	mov	x0, x19
	bl	_CHIP_REV_IS_EMUL
	cmp	x0, #0
	mov	w8, #200
	csinc	w25, w8, wzr, ne
LBB0_3:
Lloh0:
	adrp	x8, _TSDM_REG_ENABLE_IN1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _TSDM_REG_ENABLE_IN1@GOTPAGEOFF]
Lloh2:
	ldr	x1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh3:
	adrp	x8, _TCM_REG_PRS_IFEN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _TCM_REG_PRS_IFEN@GOTPAGEOFF]
Lloh5:
	ldr	x1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh6:
	adrp	x23, _CFC_REG_DEBUG0@GOTPAGE
Lloh7:
	ldr	x23, [x23, _CFC_REG_DEBUG0@GOTPAGEOFF]
	ldr	x1, [x23]
	mov	x0, x19
	mov	w2, #1
	bl	_REG_WR
Lloh8:
	adrp	x24, _NIG_REG_PRS_REQ_IN_EN@GOTPAGE
Lloh9:
	ldr	x24, [x24, _NIG_REG_PRS_REQ_IN_EN@GOTPAGEOFF]
	ldr	x1, [x24]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh10:
	adrp	x28, _PRS_REG_CFC_SEARCH_INITIAL_CREDIT@GOTPAGE
Lloh11:
	ldr	x28, [x28, _PRS_REG_CFC_SEARCH_INITIAL_CREDIT@GOTPAGEOFF]
	ldr	x1, [x28]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
	mov	x0, x19
	bl	_bnx2x_lb_pckt
	mov	w8, #-1000
	mul	w20, w25, w8
Lloh12:
	adrp	x26, _NIG_REG_STAT2_BRB_OCTET@GOTPAGE
Lloh13:
	ldr	x26, [x26, _NIG_REG_STAT2_BRB_OCTET@GOTPAGEOFF]
Lloh14:
	adrp	x27, _wb_data@GOTPAGE
Lloh15:
	ldr	x27, [x27, _wb_data@GOTPAGEOFF]
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #2
	bl	_bnx2x_read_dmae
	ldr	x8, [x27]
	ldr	w1, [x8]
	mov	x0, x19
	bl	_bnx2x_sp
	ldr	w21, [x0]
	cmp	w21, #16
	b.eq	LBB0_7
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	mov	w0, #10000
	mov	w1, #20000
	bl	_usleep_range
	adds	w20, w20, #1
	b.lo	LBB0_4
; %bb.6:
	str	x21, [sp]
Lloh16:
	adrp	x0, l_.str@PAGE
Lloh17:
	add	x0, x0, l_.str@PAGEOFF
	bl	_BNX2X_ERR
	mov	w0, #-1
	b	LBB0_24
LBB0_7:
	mov	w8, #-1000
	mul	w22, w25, w8
Lloh18:
	adrp	x21, _PRS_REG_NUM_OF_PACKETS@GOTPAGE
Lloh19:
	ldr	x21, [x21, _PRS_REG_NUM_OF_PACKETS@GOTPAGEOFF]
LBB0_8:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
	cmp	w0, #1
	b.eq	LBB0_11
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=1
	mov	x20, x0
	mov	w0, #10000
	mov	w1, #20000
	bl	_usleep_range
	adds	w22, w22, #1
	b.lo	LBB0_8
; %bb.10:
	str	x20, [sp]
Lloh20:
	adrp	x0, l_.str.1@PAGE
Lloh21:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_BNX2X_ERR
	mov	w0, #-2
	b	LBB0_24
LBB0_11:
Lloh22:
	adrp	x20, _GRCBASE_MISC@GOTPAGE
Lloh23:
	ldr	x20, [x20, _GRCBASE_MISC@GOTPAGEOFF]
	ldr	x8, [x20]
Lloh24:
	adrp	x9, _MISC_REGISTERS_RESET_REG_1_CLEAR@GOTPAGE
Lloh25:
	ldr	x9, [x9, _MISC_REGISTERS_RESET_REG_1_CLEAR@GOTPAGEOFF]
Lloh26:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	x0, x19
	mov	w2, #3
	bl	_REG_WR
	mov	w0, #50
	bl	_msleep
	ldr	x8, [x20]
Lloh27:
	adrp	x9, _MISC_REGISTERS_RESET_REG_1_SET@GOTPAGE
Lloh28:
	ldr	x9, [x9, _MISC_REGISTERS_RESET_REG_1_SET@GOTPAGEOFF]
Lloh29:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	x0, x19
	mov	w2, #3
	bl	_REG_WR
	mov	w0, #50
	bl	_msleep
Lloh30:
	adrp	x8, _BLOCK_BRB1@GOTPAGE
Lloh31:
	ldr	x8, [x8, _BLOCK_BRB1@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
Lloh33:
	adrp	x20, _PHASE_COMMON@GOTPAGE
Lloh34:
	ldr	x20, [x20, _PHASE_COMMON@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_bnx2x_init_block
Lloh35:
	adrp	x8, _BLOCK_PRS@GOTPAGE
Lloh36:
	ldr	x8, [x8, _BLOCK_PRS@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	ldr	w2, [x20]
	mov	x0, x19
	bl	_bnx2x_init_block
Lloh38:
	adrp	x8, _NETIF_MSG_HW@GOTPAGE
Lloh39:
	ldr	x8, [x8, _NETIF_MSG_HW@GOTPAGEOFF]
Lloh40:
	ldr	w0, [x8]
Lloh41:
	adrp	x1, l_.str.2@PAGE
Lloh42:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_DP
Lloh43:
	adrp	x8, _TSDM_REG_ENABLE_IN1@GOTPAGE
Lloh44:
	ldr	x8, [x8, _TSDM_REG_ENABLE_IN1@GOTPAGEOFF]
Lloh45:
	ldr	x1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
Lloh46:
	adrp	x8, _TCM_REG_PRS_IFEN@GOTPAGE
Lloh47:
	ldr	x8, [x8, _TCM_REG_PRS_IFEN@GOTPAGEOFF]
Lloh48:
	ldr	x1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
	ldr	x1, [x23]
	mov	x0, x19
	mov	w2, #1
	bl	_REG_WR
	ldr	x1, [x24]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
	ldr	x1, [x28]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
	mov	x0, x19
	bl	_bnx2x_lb_pckt
	mov	x0, x19
	bl	_bnx2x_lb_pckt
	mov	x0, x19
	bl	_bnx2x_lb_pckt
	mov	x0, x19
	bl	_bnx2x_lb_pckt
	mov	x0, x19
	bl	_bnx2x_lb_pckt
	mov	x0, x19
	bl	_bnx2x_lb_pckt
	mov	x0, x19
	bl	_bnx2x_lb_pckt
	mov	x0, x19
	bl	_bnx2x_lb_pckt
	mov	x0, x19
	bl	_bnx2x_lb_pckt
	mov	x0, x19
	bl	_bnx2x_lb_pckt
	mov	w8, #-1000
	mul	w20, w25, w8
LBB0_12:                                ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #2
	bl	_bnx2x_read_dmae
	ldr	x8, [x27]
	ldr	w1, [x8]
	mov	x0, x19
	bl	_bnx2x_sp
	ldr	w22, [x0]
	cmp	w22, #176
	b.eq	LBB0_15
; %bb.13:                               ;   in Loop: Header=BB0_12 Depth=1
	mov	w0, #10000
	mov	w1, #20000
	bl	_usleep_range
	adds	w20, w20, #1
	b.lo	LBB0_12
; %bb.14:
	str	x22, [sp]
Lloh49:
	adrp	x0, l_.str@PAGE
Lloh50:
	add	x0, x0, l_.str@PAGEOFF
	bl	_BNX2X_ERR
	mov	w0, #-3
	b	LBB0_24
LBB0_15:
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
                                        ; kill: def $w0 killed $w0 def $x0
	cmp	w0, #2
	b.eq	LBB0_17
; %bb.16:
	str	x0, [sp]
Lloh51:
	adrp	x0, l_.str.3@PAGE
Lloh52:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_BNX2X_ERR
LBB0_17:
	ldr	x1, [x28]
	mov	x0, x19
	mov	w2, #1
	bl	_REG_WR
	add	w8, w25, w25, lsl #2
	lsl	w0, w8, #1
	bl	_msleep
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
                                        ; kill: def $w0 killed $w0 def $x0
	cmp	w0, #3
Lloh53:
	adrp	x20, _TSDM_REG_ENABLE_IN1@GOTPAGE
Lloh54:
	ldr	x20, [x20, _TSDM_REG_ENABLE_IN1@GOTPAGEOFF]
Lloh55:
	adrp	x22, _TCM_REG_PRS_IFEN@GOTPAGE
Lloh56:
	ldr	x22, [x22, _TCM_REG_PRS_IFEN@GOTPAGEOFF]
	b.eq	LBB0_19
; %bb.18:
	str	x0, [sp]
Lloh57:
	adrp	x0, l_.str.3@PAGE
Lloh58:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_BNX2X_ERR
LBB0_19:
Lloh59:
	adrp	x21, _NIG_REG_INGRESS_EOP_LB_FIFO@GOTPAGE
Lloh60:
	ldr	x21, [x21, _NIG_REG_INGRESS_EOP_LB_FIFO@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
	ldr	w1, [x21]
	mov	x0, x19
	bl	_REG_RD
Lloh61:
	adrp	x8, _NIG_REG_INGRESS_EOP_LB_EMPTY@GOTPAGE
Lloh62:
	ldr	x8, [x8, _NIG_REG_INGRESS_EOP_LB_EMPTY@GOTPAGEOFF]
Lloh63:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_REG_RD
	cmp	w0, #1
	b.ne	LBB0_23
; %bb.20:
Lloh64:
	adrp	x21, _GRCBASE_MISC@GOTPAGE
Lloh65:
	ldr	x21, [x21, _GRCBASE_MISC@GOTPAGEOFF]
	ldr	x8, [x21]
Lloh66:
	adrp	x9, _MISC_REGISTERS_RESET_REG_1_CLEAR@GOTPAGE
Lloh67:
	ldr	x9, [x9, _MISC_REGISTERS_RESET_REG_1_CLEAR@GOTPAGEOFF]
Lloh68:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	x0, x19
	mov	w2, #3
	bl	_REG_WR
	mov	w0, #50
	bl	_msleep
	ldr	x8, [x21]
Lloh69:
	adrp	x9, _MISC_REGISTERS_RESET_REG_1_SET@GOTPAGE
Lloh70:
	ldr	x9, [x9, _MISC_REGISTERS_RESET_REG_1_SET@GOTPAGEOFF]
Lloh71:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	x0, x19
	mov	w2, #3
	bl	_REG_WR
	mov	w0, #50
	bl	_msleep
Lloh72:
	adrp	x8, _BLOCK_BRB1@GOTPAGE
Lloh73:
	ldr	x8, [x8, _BLOCK_BRB1@GOTPAGEOFF]
Lloh74:
	ldr	w1, [x8]
Lloh75:
	adrp	x21, _PHASE_COMMON@GOTPAGE
Lloh76:
	ldr	x21, [x21, _PHASE_COMMON@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_bnx2x_init_block
Lloh77:
	adrp	x8, _BLOCK_PRS@GOTPAGE
Lloh78:
	ldr	x8, [x8, _BLOCK_PRS@GOTPAGEOFF]
Lloh79:
	ldr	w1, [x8]
	ldr	w2, [x21]
	mov	x0, x19
	bl	_bnx2x_init_block
	mov	x0, x19
	bl	_CNIC_SUPPORT
	cbnz	w0, LBB0_22
; %bb.21:
Lloh80:
	adrp	x8, _PRS_REG_NIC_MODE@GOTPAGE
Lloh81:
	ldr	x8, [x8, _PRS_REG_NIC_MODE@GOTPAGEOFF]
Lloh82:
	ldr	x1, [x8]
	mov	x0, x19
	mov	w2, #1
	bl	_REG_WR
LBB0_22:
	ldr	x1, [x20]
	mov	x0, x19
	mov	w2, #2147483647
	bl	_REG_WR
	ldr	x1, [x22]
	mov	x0, x19
	mov	w2, #1
	bl	_REG_WR
	ldr	x1, [x23]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
	ldr	x1, [x24]
	mov	x0, x19
	mov	w2, #1
	bl	_REG_WR
Lloh83:
	adrp	x8, _NETIF_MSG_HW@GOTPAGE
Lloh84:
	ldr	x8, [x8, _NETIF_MSG_HW@GOTPAGEOFF]
Lloh85:
	ldr	w0, [x8]
Lloh86:
	adrp	x1, l_.str.5@PAGE
Lloh87:
	add	x1, x1, l_.str.5@PAGEOFF
	bl	_DP
	mov	w0, #0
	b	LBB0_24
LBB0_23:
Lloh88:
	adrp	x0, l_.str.4@PAGE
Lloh89:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_BNX2X_ERR
	mov	w0, #-4
LBB0_24:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpAdd	Lloh49, Lloh50
	.loh AdrpAdd	Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpAdd	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGot	Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpAdd	Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpAdd	Lloh88, Lloh89
	.cfi_endproc
                                        ; -- End function
	.comm	_TSDM_REG_ENABLE_IN1,8,3        ; @TSDM_REG_ENABLE_IN1
	.comm	_TCM_REG_PRS_IFEN,8,3           ; @TCM_REG_PRS_IFEN
	.comm	_CFC_REG_DEBUG0,8,3             ; @CFC_REG_DEBUG0
	.comm	_NIG_REG_PRS_REQ_IN_EN,8,3      ; @NIG_REG_PRS_REQ_IN_EN
	.comm	_PRS_REG_CFC_SEARCH_INITIAL_CREDIT,8,3 ; @PRS_REG_CFC_SEARCH_INITIAL_CREDIT
	.comm	_NIG_REG_STAT2_BRB_OCTET,4,2    ; @NIG_REG_STAT2_BRB_OCTET
	.comm	_wb_data,8,3                    ; @wb_data
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"NIG timeout  val = 0x%x\n"

	.comm	_PRS_REG_NUM_OF_PACKETS,4,2     ; @PRS_REG_NUM_OF_PACKETS
l_.str.1:                               ; @.str.1
	.asciz	"PRS timeout val = 0x%x\n"

	.comm	_GRCBASE_MISC,8,3               ; @GRCBASE_MISC
	.comm	_MISC_REGISTERS_RESET_REG_1_CLEAR,8,3 ; @MISC_REGISTERS_RESET_REG_1_CLEAR
	.comm	_MISC_REGISTERS_RESET_REG_1_SET,8,3 ; @MISC_REGISTERS_RESET_REG_1_SET
	.comm	_BLOCK_BRB1,4,2                 ; @BLOCK_BRB1
	.comm	_PHASE_COMMON,4,2               ; @PHASE_COMMON
	.comm	_BLOCK_PRS,4,2                  ; @BLOCK_PRS
	.comm	_NETIF_MSG_HW,4,2               ; @NETIF_MSG_HW
l_.str.2:                               ; @.str.2
	.asciz	"part2\n"

l_.str.3:                               ; @.str.3
	.asciz	"PRS timeout  val = 0x%x\n"

	.comm	_NIG_REG_INGRESS_EOP_LB_FIFO,4,2 ; @NIG_REG_INGRESS_EOP_LB_FIFO
	.comm	_NIG_REG_INGRESS_EOP_LB_EMPTY,4,2 ; @NIG_REG_INGRESS_EOP_LB_EMPTY
l_.str.4:                               ; @.str.4
	.asciz	"clear of NIG failed\n"

	.comm	_PRS_REG_NIC_MODE,8,3           ; @PRS_REG_NIC_MODE
l_.str.5:                               ; @.str.5
	.asciz	"done\n"

	.no_dead_strip	_bnx2x_int_mem_test
.subsections_via_symbols
