	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sd_set_sample_push_timing_sd30
_sd_set_sample_push_timing_sd30:        ## @sd_set_sample_push_timing_sd30
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_SD_CFG1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SD_MODE_SELECT_MASK@GOTPCREL(%rip), %rax
	movq	_SD_ASYNC_FIFO_NOT_RST@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	(%rax), %edx
	orl	%ecx, %edx
	movq	_SD_30_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	callq	_rtsx_pci_write_register
	movq	_CLK_CTL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_CLK_LOW_FREQ@GOTPCREL(%rip), %r15
	movl	(%r15), %ecx
	movq	%rbx, %rdi
	movl	%ecx, %edx
	callq	_rtsx_pci_write_register
	movq	_CARD_CLK_SOURCE@GOTPCREL(%rip), %rax
	movq	_CRC_VAR_CLK0@GOTPCREL(%rip), %rdx
	movq	_SD30_FIX_CLK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rdx), %ecx
	movl	(%rax), %esi
	movq	_SAMPLE_VAR_CLK1@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	$255, %edx
	callq	_rtsx_pci_write_register
	movl	(%r14), %esi
	movl	(%r15), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_rtsx_pci_write_register
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SD_CFG1,4,2                    ## @SD_CFG1
	.comm	_SD_MODE_SELECT_MASK,4,2        ## @SD_MODE_SELECT_MASK
	.comm	_SD_ASYNC_FIFO_NOT_RST,4,2      ## @SD_ASYNC_FIFO_NOT_RST
	.comm	_SD_30_MODE,4,2                 ## @SD_30_MODE
	.comm	_CLK_CTL,4,2                    ## @CLK_CTL
	.comm	_CLK_LOW_FREQ,4,2               ## @CLK_LOW_FREQ
	.comm	_CARD_CLK_SOURCE,4,2            ## @CARD_CLK_SOURCE
	.comm	_CRC_VAR_CLK0,4,2               ## @CRC_VAR_CLK0
	.comm	_SD30_FIX_CLK,4,2               ## @SD30_FIX_CLK
	.comm	_SAMPLE_VAR_CLK1,4,2            ## @SAMPLE_VAR_CLK1
	.no_dead_strip	_sd_set_sample_push_timing_sd30
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sd_set_sample_push_timing_sd30
_sd_set_sample_push_timing_sd30:        ; @sd_set_sample_push_timing_sd30
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x8, _SD_CFG1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SD_CFG1@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _SD_MODE_SELECT_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SD_MODE_SELECT_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _SD_ASYNC_FIFO_NOT_RST@GOTPAGE
Lloh7:
	ldr	x9, [x9, _SD_ASYNC_FIFO_NOT_RST@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w2, w9, w8
Lloh9:
	adrp	x8, _SD_30_MODE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SD_30_MODE@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	orr	w3, w8, w9
	bl	_rtsx_pci_write_register
Lloh12:
	adrp	x20, _CLK_CTL@GOTPAGE
Lloh13:
	ldr	x20, [x20, _CLK_CTL@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh14:
	adrp	x21, _CLK_LOW_FREQ@GOTPAGE
Lloh15:
	ldr	x21, [x21, _CLK_LOW_FREQ@GOTPAGEOFF]
	ldr	w2, [x21]
	mov	x0, x19
	mov	x3, x2
	bl	_rtsx_pci_write_register
Lloh16:
	adrp	x8, _CARD_CLK_SOURCE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _CARD_CLK_SOURCE@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
Lloh19:
	adrp	x8, _CRC_VAR_CLK0@GOTPAGE
Lloh20:
	ldr	x8, [x8, _CRC_VAR_CLK0@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
Lloh22:
	adrp	x9, _SD30_FIX_CLK@GOTPAGE
Lloh23:
	ldr	x9, [x9, _SD30_FIX_CLK@GOTPAGEOFF]
Lloh24:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh25:
	adrp	x9, _SAMPLE_VAR_CLK1@GOTPAGE
Lloh26:
	ldr	x9, [x9, _SAMPLE_VAR_CLK1@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	orr	w3, w8, w9
	mov	x0, x19
	mov	w2, #255
	bl	_rtsx_pci_write_register
	ldr	w1, [x20]
	ldr	w2, [x21]
	mov	x0, x19
	mov	w3, #0
	bl	_rtsx_pci_write_register
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SD_CFG1,4,2                    ; @SD_CFG1
	.comm	_SD_MODE_SELECT_MASK,4,2        ; @SD_MODE_SELECT_MASK
	.comm	_SD_ASYNC_FIFO_NOT_RST,4,2      ; @SD_ASYNC_FIFO_NOT_RST
	.comm	_SD_30_MODE,4,2                 ; @SD_30_MODE
	.comm	_CLK_CTL,4,2                    ; @CLK_CTL
	.comm	_CLK_LOW_FREQ,4,2               ; @CLK_LOW_FREQ
	.comm	_CARD_CLK_SOURCE,4,2            ; @CARD_CLK_SOURCE
	.comm	_CRC_VAR_CLK0,4,2               ; @CRC_VAR_CLK0
	.comm	_SD30_FIX_CLK,4,2               ; @SD30_FIX_CLK
	.comm	_SAMPLE_VAR_CLK1,4,2            ; @SAMPLE_VAR_CLK1
	.no_dead_strip	_sd_set_sample_push_timing_sd30
.subsections_via_symbols
