	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mt9m032_setup_pll
_mt9m032_setup_pll:                     ## @mt9m032_setup_pll
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	addq	$16, %rdi
	callq	_v4l2_get_subdevdata
	movq	%rax, %r14
	movq	8(%r15), %rbx
	movl	4(%rbx), %eax
	movl	%eax, -32(%rbp)
	movl	(%rbx), %eax
	movl	%eax, -36(%rbp)
	leaq	_mt9m032_setup_pll.limits(%rip), %rsi
	leaq	-48(%rbp), %rdx
	movq	%r14, %rdi
	callq	_aptina_pll_calculate
	testl	%eax, %eax
	js	LBB0_7
## %bb.1:
	movl	(%rbx), %eax
	movl	%eax, (%r15)
	movq	_MT9M032_PLL_CONFIG1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MT9M032_PLL_CONFIG1_MUL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	-48(%rbp), %eax
	movl	-44(%rbp), %edx
	shll	%cl, %eax
	decl	%edx
	movq	_MT9M032_PLL_CONFIG1_PREDIV_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %edx
	orl	%eax, %edx
	movq	%r14, %rdi
	callq	_mt9m032_write
	testl	%eax, %eax
	jne	LBB0_7
## %bb.2:
	movq	_MT9P031_PLL_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MT9P031_PLL_CONTROL_PWRON@GOTPCREL(%rip), %rax
	movq	_MT9P031_PLL_CONTROL_USEPLL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	%r14, %rdi
	callq	_mt9m032_write
	testl	%eax, %eax
	jne	LBB0_7
## %bb.3:
	movq	_MT9M032_READ_MODE1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_MT9M032_READ_MODE1_STROBE_START_EXP@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MT9M032_READ_MODE1_STROBE_END_SHUTTER@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	orl	$32768, %edx                    ## imm = 0x8000
	movq	%r14, %rdi
	callq	_mt9m032_write
	testl	%eax, %eax
	jne	LBB0_7
## %bb.4:
	cmpl	$6, -40(%rbp)
	movl	$6, %edx
	jne	LBB0_6
## %bb.5:
	movq	_MT9M032_FORMATTER1_PLL_P1_6@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
LBB0_6:
	movq	_MT9M032_FORMATTER1_PARALLEL@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	orl	$30, %edx
	movq	_MT9M032_FORMATTER1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_mt9m032_write
LBB0_7:
	addq	$24, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	2                               ## @mt9m032_setup_pll.limits
_mt9m032_setup_pll.limits:
	.long	8000000                         ## 0x7a1200
	.long	16500000                        ## 0xfbc520
	.long	2000000                         ## 0x1e8480
	.long	24000000                        ## 0x16e3600
	.long	322000000                       ## 0x13315480
	.long	693000000                       ## 0x294e5740
	.long	99000000                        ## 0x5e69ec0
	.long	1                               ## 0x1
	.long	64                              ## 0x40
	.long	16                              ## 0x10
	.long	255                             ## 0xff
	.long	6                               ## 0x6
	.long	7                               ## 0x7

	.comm	_MT9M032_PLL_CONFIG1,4,2        ## @MT9M032_PLL_CONFIG1
	.comm	_MT9M032_PLL_CONFIG1_MUL_SHIFT,4,2 ## @MT9M032_PLL_CONFIG1_MUL_SHIFT
	.comm	_MT9M032_PLL_CONFIG1_PREDIV_MASK,4,2 ## @MT9M032_PLL_CONFIG1_PREDIV_MASK
	.comm	_MT9P031_PLL_CONTROL,4,2        ## @MT9P031_PLL_CONTROL
	.comm	_MT9P031_PLL_CONTROL_PWRON,4,2  ## @MT9P031_PLL_CONTROL_PWRON
	.comm	_MT9P031_PLL_CONTROL_USEPLL,4,2 ## @MT9P031_PLL_CONTROL_USEPLL
	.comm	_MT9M032_READ_MODE1,4,2         ## @MT9M032_READ_MODE1
	.comm	_MT9M032_READ_MODE1_STROBE_START_EXP,4,2 ## @MT9M032_READ_MODE1_STROBE_START_EXP
	.comm	_MT9M032_READ_MODE1_STROBE_END_SHUTTER,4,2 ## @MT9M032_READ_MODE1_STROBE_END_SHUTTER
	.comm	_MT9M032_FORMATTER1_PLL_P1_6,4,2 ## @MT9M032_FORMATTER1_PLL_P1_6
	.comm	_MT9M032_FORMATTER1_PARALLEL,4,2 ## @MT9M032_FORMATTER1_PARALLEL
	.comm	_MT9M032_FORMATTER1,4,2         ## @MT9M032_FORMATTER1
	.no_dead_strip	_mt9m032_setup_pll
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mt9m032_setup_pll
_mt9m032_setup_pll:                     ; @mt9m032_setup_pll
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	add	x0, x0, #16
	bl	_v4l2_get_subdevdata
	mov	x19, x0
	ldr	x21, [x20, #8]
	ldr	d0, [x21]
	stur	d0, [sp, #20]
Lloh0:
	adrp	x1, _mt9m032_setup_pll.limits@PAGE
Lloh1:
	add	x1, x1, _mt9m032_setup_pll.limits@PAGEOFF
	add	x2, sp, #8
	bl	_aptina_pll_calculate
	tbnz	w0, #31, LBB0_5
; %bb.1:
	ldr	w8, [x21]
	str	w8, [x20]
Lloh2:
	adrp	x8, _MT9M032_PLL_CONFIG1@GOTPAGE
Lloh3:
	ldr	x8, [x8, _MT9M032_PLL_CONFIG1@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
Lloh5:
	adrp	x8, _MT9M032_PLL_CONFIG1_MUL_SHIFT@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MT9M032_PLL_CONFIG1_MUL_SHIFT@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	ldp	w9, w10, [sp, #8]
	lsl	w8, w9, w8
	sub	w9, w10, #1
Lloh8:
	adrp	x10, _MT9M032_PLL_CONFIG1_PREDIV_MASK@GOTPAGE
Lloh9:
	ldr	x10, [x10, _MT9M032_PLL_CONFIG1_PREDIV_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w10, [x10]
	and	w9, w9, w10
	orr	w2, w9, w8
	mov	x0, x19
	bl	_mt9m032_write
	cbnz	w0, LBB0_5
; %bb.2:
Lloh11:
	adrp	x8, _MT9P031_PLL_CONTROL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MT9P031_PLL_CONTROL@GOTPAGEOFF]
Lloh13:
	adrp	x9, _MT9P031_PLL_CONTROL_PWRON@GOTPAGE
Lloh14:
	ldr	x9, [x9, _MT9P031_PLL_CONTROL_PWRON@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
Lloh16:
	ldr	w8, [x9]
Lloh17:
	adrp	x9, _MT9P031_PLL_CONTROL_USEPLL@GOTPAGE
Lloh18:
	ldr	x9, [x9, _MT9P031_PLL_CONTROL_USEPLL@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_mt9m032_write
	cbnz	w0, LBB0_5
; %bb.3:
Lloh20:
	adrp	x8, _MT9M032_READ_MODE1@GOTPAGE
Lloh21:
	ldr	x8, [x8, _MT9M032_READ_MODE1@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
Lloh23:
	adrp	x8, _MT9M032_READ_MODE1_STROBE_START_EXP@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MT9M032_READ_MODE1_STROBE_START_EXP@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
Lloh26:
	adrp	x9, _MT9M032_READ_MODE1_STROBE_END_SHUTTER@GOTPAGE
Lloh27:
	ldr	x9, [x9, _MT9M032_READ_MODE1_STROBE_END_SHUTTER@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	orr	w8, w8, w9
	orr	w2, w8, #0x8000
	mov	x0, x19
	bl	_mt9m032_write
	cbnz	w0, LBB0_5
; %bb.4:
	ldr	w8, [sp, #16]
Lloh29:
	adrp	x9, _MT9M032_FORMATTER1_PLL_P1_6@GOTPAGE
Lloh30:
	ldr	x9, [x9, _MT9M032_FORMATTER1_PLL_P1_6@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	mov	w10, #6
	cmp	w8, #6
	csel	w8, w9, w10, eq
Lloh32:
	adrp	x9, _MT9M032_FORMATTER1_PARALLEL@GOTPAGE
Lloh33:
	ldr	x9, [x9, _MT9M032_FORMATTER1_PARALLEL@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	orr	w8, w9, w8
	orr	w2, w8, #0x1e
Lloh35:
	adrp	x8, _MT9M032_FORMATTER1@GOTPAGE
Lloh36:
	ldr	x8, [x8, _MT9M032_FORMATTER1@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mt9m032_write
LBB0_5:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh15
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @mt9m032_setup_pll.limits
_mt9m032_setup_pll.limits:
	.long	8000000                         ; 0x7a1200
	.long	16500000                        ; 0xfbc520
	.long	2000000                         ; 0x1e8480
	.long	24000000                        ; 0x16e3600
	.long	322000000                       ; 0x13315480
	.long	693000000                       ; 0x294e5740
	.long	99000000                        ; 0x5e69ec0
	.long	1                               ; 0x1
	.long	64                              ; 0x40
	.long	16                              ; 0x10
	.long	255                             ; 0xff
	.long	6                               ; 0x6
	.long	7                               ; 0x7

	.comm	_MT9M032_PLL_CONFIG1,4,2        ; @MT9M032_PLL_CONFIG1
	.comm	_MT9M032_PLL_CONFIG1_MUL_SHIFT,4,2 ; @MT9M032_PLL_CONFIG1_MUL_SHIFT
	.comm	_MT9M032_PLL_CONFIG1_PREDIV_MASK,4,2 ; @MT9M032_PLL_CONFIG1_PREDIV_MASK
	.comm	_MT9P031_PLL_CONTROL,4,2        ; @MT9P031_PLL_CONTROL
	.comm	_MT9P031_PLL_CONTROL_PWRON,4,2  ; @MT9P031_PLL_CONTROL_PWRON
	.comm	_MT9P031_PLL_CONTROL_USEPLL,4,2 ; @MT9P031_PLL_CONTROL_USEPLL
	.comm	_MT9M032_READ_MODE1,4,2         ; @MT9M032_READ_MODE1
	.comm	_MT9M032_READ_MODE1_STROBE_START_EXP,4,2 ; @MT9M032_READ_MODE1_STROBE_START_EXP
	.comm	_MT9M032_READ_MODE1_STROBE_END_SHUTTER,4,2 ; @MT9M032_READ_MODE1_STROBE_END_SHUTTER
	.comm	_MT9M032_FORMATTER1_PLL_P1_6,4,2 ; @MT9M032_FORMATTER1_PLL_P1_6
	.comm	_MT9M032_FORMATTER1_PARALLEL,4,2 ; @MT9M032_FORMATTER1_PARALLEL
	.comm	_MT9M032_FORMATTER1,4,2         ; @MT9M032_FORMATTER1
	.no_dead_strip	_mt9m032_setup_pll
.subsections_via_symbols
