	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function lm3642_control
_lm3642_control:                        ## @lm3642_control
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r13d
	movl	%esi, %r12d
	movq	%rdi, %r14
	movl	(%rdi), %edi
	movq	_REG_FLAG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	32(%r14), %rbx
	movq	%rbx, %rdx
	callq	_regmap_read
	movl	%eax, %r15d
	testl	%eax, %eax
	js	LBB0_1
## %bb.2:
	movq	(%rbx), %rdx
	testq	%rdx, %rdx
	je	LBB0_4
## %bb.3:
	movl	16(%r14), %edi
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_info
LBB0_4:
	testl	%r12d, %r12d
	movl	$129, %eax
	cmovel	%eax, %r13d
	leal	-128(%r13), %eax
	cmpl	$3, %eax
	ja	LBB0_16
## %bb.5:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	jmpq	*%rax
LBB0_6:
	movl	(%r14), %edi
	movq	_REG_I_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_TORCH_I_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_TORCH_I_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edx
	decl	%r12d
	shll	%cl, %r12d
	movl	%r12d, %ecx
	callq	_regmap_update_bits
	movl	%eax, %r15d
	cmpl	$0, 24(%r14)
	je	LBB0_7
## %bb.8:
	movq	_TORCH_PIN_EN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_TORCH_PIN_EN_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r13d
	orl	$128, %r13d
	testl	%r15d, %r15d
	jns	LBB0_17
	jmp	LBB0_14
LBB0_1:
	movl	16(%r14), %edi
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_15
LBB0_12:
	movl	(%r14), %edi
	movq	_REG_I_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_TORCH_I_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_TORCH_I_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edx
	decl	%r12d
	shll	%cl, %r12d
	movl	%r12d, %ecx
	callq	_regmap_update_bits
	movl	%eax, %r15d
	movl	$130, %r13d
	testl	%r15d, %r15d
	jns	LBB0_17
	jmp	LBB0_14
LBB0_9:
	movl	(%r14), %edi
	movq	_REG_I_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_FLASH_I_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_FLASH_I_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edx
	decl	%r12d
	shll	%cl, %r12d
	movl	%r12d, %ecx
	callq	_regmap_update_bits
	movl	%eax, %r15d
	cmpl	$0, 20(%r14)
	je	LBB0_10
## %bb.11:
	movq	_STROBE_PIN_EN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_STROBE_PIN_EN_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r13d
	orl	$131, %r13d
	testl	%r15d, %r15d
	jns	LBB0_17
	jmp	LBB0_14
LBB0_10:
	movl	$131, %r13d
	testl	%r15d, %r15d
	jns	LBB0_17
LBB0_14:
	movl	16(%r14), %edi
	leaq	L_.str.2(%rip), %rsi
LBB0_15:
	callq	_dev_err
LBB0_16:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_7:
	movl	$128, %r13d
	testl	%r15d, %r15d
	js	LBB0_14
LBB0_17:
	movq	_TX_PIN_EN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_TX_PIN_EN_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edx
	xorl	%eax, %eax
	cmpq	$0, 8(%r14)
	cmovnel	%edx, %eax
	orl	%r13d, %eax
	movl	(%r14), %edi
	movq	_REG_ENABLE@GOTPCREL(%rip), %rsi
	movq	_MODE_BITS_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_MODE_BITS_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movl	(%rsi), %esi
	shll	%cl, %eax
	movl	%eax, %ecx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_regmap_update_bits             ## TAILCALL
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_17, LBB0_17-LJTI0_0
.set L0_0_set_12, LBB0_12-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
LJTI0_0:
	.long	L0_0_set_6
	.long	L0_0_set_17
	.long	L0_0_set_12
	.long	L0_0_set_9
	.end_data_region
                                        ## -- End function
	.comm	_REG_FLAG,4,2                   ## @REG_FLAG
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to read REG_FLAG Register\n"

L_.str.1:                               ## @.str.1
	.asciz	"Last FLAG is 0x%x\n"

	.comm	_REG_I_CTRL,4,2                 ## @REG_I_CTRL
	.comm	_TORCH_I_MASK,4,2               ## @TORCH_I_MASK
	.comm	_TORCH_I_SHIFT,4,2              ## @TORCH_I_SHIFT
	.comm	_TORCH_PIN_EN_MASK,4,2          ## @TORCH_PIN_EN_MASK
	.comm	_TORCH_PIN_EN_SHIFT,4,2         ## @TORCH_PIN_EN_SHIFT
	.comm	_FLASH_I_MASK,4,2               ## @FLASH_I_MASK
	.comm	_FLASH_I_SHIFT,4,2              ## @FLASH_I_SHIFT
	.comm	_STROBE_PIN_EN_MASK,4,2         ## @STROBE_PIN_EN_MASK
	.comm	_STROBE_PIN_EN_SHIFT,4,2        ## @STROBE_PIN_EN_SHIFT
L_.str.2:                               ## @.str.2
	.asciz	"Failed to write REG_I_CTRL Register\n"

	.comm	_TX_PIN_EN_MASK,4,2             ## @TX_PIN_EN_MASK
	.comm	_TX_PIN_EN_SHIFT,4,2            ## @TX_PIN_EN_SHIFT
	.comm	_REG_ENABLE,4,2                 ## @REG_ENABLE
	.comm	_MODE_BITS_MASK,4,2             ## @MODE_BITS_MASK
	.comm	_MODE_BITS_SHIFT,4,2            ## @MODE_BITS_SHIFT
	.no_dead_strip	_lm3642_control
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function lm3642_control
_lm3642_control:                        ; @lm3642_control
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x2
	mov	x21, x1
	mov	x19, x0
	mov	x23, x0
	ldr	w0, [x23], #32
Lloh0:
	adrp	x8, _REG_FLAG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _REG_FLAG@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x2, x23
	bl	_regmap_read
	mov	x20, x0
	tbnz	w0, #31, LBB0_7
; %bb.1:
	ldr	x2, [x23]
	cbz	x2, LBB0_3
; %bb.2:
	ldr	w0, [x19, #16]
Lloh3:
	adrp	x1, l_.str.1@PAGE
Lloh4:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_info
LBB0_3:
	mov	w8, #129
	cmp	w21, #0
	csel	w8, w8, w22, eq
	sub	w9, w8, #128
	cmp	w9, #3
	b.hi	LBB0_16
; %bb.4:
Lloh5:
	adrp	x10, lJTI0_0@PAGE
Lloh6:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_5
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_5:
	ldr	w0, [x19]
Lloh7:
	adrp	x8, _REG_I_CTRL@GOTPAGE
Lloh8:
	ldr	x8, [x8, _REG_I_CTRL@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
Lloh10:
	adrp	x8, _TORCH_I_MASK@GOTPAGE
Lloh11:
	ldr	x8, [x8, _TORCH_I_MASK@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
Lloh13:
	adrp	x9, _TORCH_I_SHIFT@GOTPAGE
Lloh14:
	ldr	x9, [x9, _TORCH_I_SHIFT@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	lsl	w2, w8, w9
	sub	w8, w21, #1
	lsl	w3, w8, w9
	bl	_regmap_update_bits
	mov	x20, x0
	ldr	w8, [x19, #24]
	cbz	w8, LBB0_13
; %bb.6:
Lloh16:
	adrp	x8, _TORCH_PIN_EN_MASK@GOTPAGE
Lloh17:
	ldr	x8, [x8, _TORCH_PIN_EN_MASK@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
Lloh19:
	adrp	x9, _TORCH_PIN_EN_SHIFT@GOTPAGE
Lloh20:
	ldr	x9, [x9, _TORCH_PIN_EN_SHIFT@GOTPAGEOFF]
Lloh21:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	orr	w8, w8, #0x80
	tbz	w20, #31, LBB0_12
	b	LBB0_14
LBB0_7:
	ldr	w0, [x19, #16]
Lloh22:
	adrp	x1, l_.str@PAGE
Lloh23:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_15
LBB0_8:
	ldr	w0, [x19]
Lloh24:
	adrp	x8, _REG_I_CTRL@GOTPAGE
Lloh25:
	ldr	x8, [x8, _REG_I_CTRL@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
Lloh27:
	adrp	x8, _TORCH_I_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _TORCH_I_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
Lloh30:
	adrp	x9, _TORCH_I_SHIFT@GOTPAGE
Lloh31:
	ldr	x9, [x9, _TORCH_I_SHIFT@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	lsl	w2, w8, w9
	sub	w8, w21, #1
	lsl	w3, w8, w9
	bl	_regmap_update_bits
	mov	x20, x0
	mov	w8, #130
	tbz	w20, #31, LBB0_12
	b	LBB0_14
LBB0_9:
	ldr	w0, [x19]
Lloh33:
	adrp	x8, _REG_I_CTRL@GOTPAGE
Lloh34:
	ldr	x8, [x8, _REG_I_CTRL@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
Lloh36:
	adrp	x8, _FLASH_I_MASK@GOTPAGE
Lloh37:
	ldr	x8, [x8, _FLASH_I_MASK@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
Lloh39:
	adrp	x9, _FLASH_I_SHIFT@GOTPAGE
Lloh40:
	ldr	x9, [x9, _FLASH_I_SHIFT@GOTPAGEOFF]
Lloh41:
	ldr	w9, [x9]
	lsl	w2, w8, w9
	sub	w8, w21, #1
	lsl	w3, w8, w9
	bl	_regmap_update_bits
	mov	x20, x0
	ldr	w9, [x19, #20]
	mov	w8, #131
	cbz	w9, LBB0_11
; %bb.10:
Lloh42:
	adrp	x9, _STROBE_PIN_EN_MASK@GOTPAGE
Lloh43:
	ldr	x9, [x9, _STROBE_PIN_EN_MASK@GOTPAGEOFF]
Lloh44:
	ldr	w9, [x9]
Lloh45:
	adrp	x10, _STROBE_PIN_EN_SHIFT@GOTPAGE
Lloh46:
	ldr	x10, [x10, _STROBE_PIN_EN_SHIFT@GOTPAGEOFF]
Lloh47:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
LBB0_11:
	tbnz	w20, #31, LBB0_14
LBB0_12:
	ldr	x9, [x19, #8]
Lloh48:
	adrp	x10, _TX_PIN_EN_MASK@GOTPAGE
Lloh49:
	ldr	x10, [x10, _TX_PIN_EN_MASK@GOTPAGEOFF]
Lloh50:
	ldr	w10, [x10]
Lloh51:
	adrp	x11, _TX_PIN_EN_SHIFT@GOTPAGE
Lloh52:
	ldr	x11, [x11, _TX_PIN_EN_SHIFT@GOTPAGEOFF]
Lloh53:
	ldr	w11, [x11]
	lsl	w10, w10, w11
	cmp	x9, #0
	csel	w9, wzr, w10, eq
	orr	w8, w9, w8
	ldr	w0, [x19]
Lloh54:
	adrp	x9, _REG_ENABLE@GOTPAGE
Lloh55:
	ldr	x9, [x9, _REG_ENABLE@GOTPAGEOFF]
Lloh56:
	ldr	w1, [x9]
Lloh57:
	adrp	x9, _MODE_BITS_MASK@GOTPAGE
Lloh58:
	ldr	x9, [x9, _MODE_BITS_MASK@GOTPAGEOFF]
Lloh59:
	ldr	w9, [x9]
Lloh60:
	adrp	x10, _MODE_BITS_SHIFT@GOTPAGE
Lloh61:
	ldr	x10, [x10, _MODE_BITS_SHIFT@GOTPAGEOFF]
Lloh62:
	ldr	w10, [x10]
	lsl	w2, w9, w10
	lsl	w3, w8, w10
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_regmap_update_bits
LBB0_13:
	mov	w8, #128
	tbz	w20, #31, LBB0_12
LBB0_14:
	ldr	w0, [x19, #16]
Lloh63:
	adrp	x1, l_.str.2@PAGE
Lloh64:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_15:
	bl	_dev_err
LBB0_16:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpAdd	Lloh63, Lloh64
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_5-LBB0_5)>>2
	.byte	(LBB0_12-LBB0_5)>>2
	.byte	(LBB0_8-LBB0_5)>>2
	.byte	(LBB0_9-LBB0_5)>>2
                                        ; -- End function
	.comm	_REG_FLAG,4,2                   ; @REG_FLAG
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to read REG_FLAG Register\n"

l_.str.1:                               ; @.str.1
	.asciz	"Last FLAG is 0x%x\n"

	.comm	_REG_I_CTRL,4,2                 ; @REG_I_CTRL
	.comm	_TORCH_I_MASK,4,2               ; @TORCH_I_MASK
	.comm	_TORCH_I_SHIFT,4,2              ; @TORCH_I_SHIFT
	.comm	_TORCH_PIN_EN_MASK,4,2          ; @TORCH_PIN_EN_MASK
	.comm	_TORCH_PIN_EN_SHIFT,4,2         ; @TORCH_PIN_EN_SHIFT
	.comm	_FLASH_I_MASK,4,2               ; @FLASH_I_MASK
	.comm	_FLASH_I_SHIFT,4,2              ; @FLASH_I_SHIFT
	.comm	_STROBE_PIN_EN_MASK,4,2         ; @STROBE_PIN_EN_MASK
	.comm	_STROBE_PIN_EN_SHIFT,4,2        ; @STROBE_PIN_EN_SHIFT
l_.str.2:                               ; @.str.2
	.asciz	"Failed to write REG_I_CTRL Register\n"

	.comm	_TX_PIN_EN_MASK,4,2             ; @TX_PIN_EN_MASK
	.comm	_TX_PIN_EN_SHIFT,4,2            ; @TX_PIN_EN_SHIFT
	.comm	_REG_ENABLE,4,2                 ; @REG_ENABLE
	.comm	_MODE_BITS_MASK,4,2             ; @MODE_BITS_MASK
	.comm	_MODE_BITS_SHIFT,4,2            ; @MODE_BITS_SHIFT
	.no_dead_strip	_lm3642_control
.subsections_via_symbols
