	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function fimc_is_setup_clocks
_fimc_is_setup_clocks:                  ## @fimc_is_setup_clocks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	_ISS_CLK_ACLK200@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edi
	movq	_ISS_CLK_ACLK200_DIV@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %esi
	callq	_clk_set_parent
	testl	%eax, %eax
	js	LBB0_5
## %bb.1:
	movq	(%rbx), %rax
	movq	_ISS_CLK_ACLK400MCUISP@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edi
	movq	_ISS_CLK_ACLK400MCUISP_DIV@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %esi
	callq	_clk_set_parent
	testl	%eax, %eax
	js	LBB0_5
## %bb.2:
	movq	(%rbx), %rax
	movq	_ISS_CLK_ISP_DIV0@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edi
	movq	_ACLK_AXI_FREQUENCY@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	callq	_clk_set_rate
	testl	%eax, %eax
	js	LBB0_5
## %bb.3:
	movq	(%rbx), %rax
	movq	_ISS_CLK_ISP_DIV1@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edi
	movl	(%r14), %esi
	callq	_clk_set_rate
	testl	%eax, %eax
	js	LBB0_5
## %bb.4:
	movq	(%rbx), %rax
	movq	_ISS_CLK_MCUISP_DIV0@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edi
	movq	_ATCLK_MCUISP_FREQUENCY@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	callq	_clk_set_rate
	testl	%eax, %eax
	js	LBB0_5
## %bb.6:
	movq	(%rbx), %rax
	movq	_ISS_CLK_MCUISP_DIV1@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %edi
	movl	(%r14), %esi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_clk_set_rate                   ## TAILCALL
LBB0_5:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ISS_CLK_ACLK200,8,3            ## @ISS_CLK_ACLK200
	.comm	_ISS_CLK_ACLK200_DIV,8,3        ## @ISS_CLK_ACLK200_DIV
	.comm	_ISS_CLK_ACLK400MCUISP,8,3      ## @ISS_CLK_ACLK400MCUISP
	.comm	_ISS_CLK_ACLK400MCUISP_DIV,8,3  ## @ISS_CLK_ACLK400MCUISP_DIV
	.comm	_ISS_CLK_ISP_DIV0,8,3           ## @ISS_CLK_ISP_DIV0
	.comm	_ACLK_AXI_FREQUENCY,4,2         ## @ACLK_AXI_FREQUENCY
	.comm	_ISS_CLK_ISP_DIV1,8,3           ## @ISS_CLK_ISP_DIV1
	.comm	_ISS_CLK_MCUISP_DIV0,8,3        ## @ISS_CLK_MCUISP_DIV0
	.comm	_ATCLK_MCUISP_FREQUENCY,4,2     ## @ATCLK_MCUISP_FREQUENCY
	.comm	_ISS_CLK_MCUISP_DIV1,8,3        ## @ISS_CLK_MCUISP_DIV1
	.no_dead_strip	_fimc_is_setup_clocks
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function fimc_is_setup_clocks
_fimc_is_setup_clocks:                  ; @fimc_is_setup_clocks
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _ISS_CLK_ACLK200@GOTPAGE
Lloh1:
	ldr	x9, [x9, _ISS_CLK_ACLK200@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	ldr	w0, [x8, x9, lsl #2]
Lloh3:
	adrp	x9, _ISS_CLK_ACLK200_DIV@GOTPAGE
Lloh4:
	ldr	x9, [x9, _ISS_CLK_ACLK200_DIV@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	ldr	w1, [x8, x9, lsl #2]
	bl	_clk_set_parent
	tbnz	w0, #31, LBB0_6
; %bb.1:
	ldr	x8, [x19]
Lloh6:
	adrp	x9, _ISS_CLK_ACLK400MCUISP@GOTPAGE
Lloh7:
	ldr	x9, [x9, _ISS_CLK_ACLK400MCUISP@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	ldr	w0, [x8, x9, lsl #2]
Lloh9:
	adrp	x9, _ISS_CLK_ACLK400MCUISP_DIV@GOTPAGE
Lloh10:
	ldr	x9, [x9, _ISS_CLK_ACLK400MCUISP_DIV@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	ldr	w1, [x8, x9, lsl #2]
	bl	_clk_set_parent
	tbnz	w0, #31, LBB0_6
; %bb.2:
	ldr	x8, [x19]
Lloh12:
	adrp	x9, _ISS_CLK_ISP_DIV0@GOTPAGE
Lloh13:
	ldr	x9, [x9, _ISS_CLK_ISP_DIV0@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	ldr	w0, [x8, x9, lsl #2]
Lloh15:
	adrp	x20, _ACLK_AXI_FREQUENCY@GOTPAGE
Lloh16:
	ldr	x20, [x20, _ACLK_AXI_FREQUENCY@GOTPAGEOFF]
	ldr	w1, [x20]
	bl	_clk_set_rate
	tbnz	w0, #31, LBB0_6
; %bb.3:
	ldr	x8, [x19]
Lloh17:
	adrp	x9, _ISS_CLK_ISP_DIV1@GOTPAGE
Lloh18:
	ldr	x9, [x9, _ISS_CLK_ISP_DIV1@GOTPAGEOFF]
Lloh19:
	ldr	x9, [x9]
	ldr	w0, [x8, x9, lsl #2]
	ldr	w1, [x20]
	bl	_clk_set_rate
	tbnz	w0, #31, LBB0_6
; %bb.4:
	ldr	x8, [x19]
Lloh20:
	adrp	x9, _ISS_CLK_MCUISP_DIV0@GOTPAGE
Lloh21:
	ldr	x9, [x9, _ISS_CLK_MCUISP_DIV0@GOTPAGEOFF]
Lloh22:
	ldr	x9, [x9]
	ldr	w0, [x8, x9, lsl #2]
Lloh23:
	adrp	x20, _ATCLK_MCUISP_FREQUENCY@GOTPAGE
Lloh24:
	ldr	x20, [x20, _ATCLK_MCUISP_FREQUENCY@GOTPAGEOFF]
	ldr	w1, [x20]
	bl	_clk_set_rate
	tbnz	w0, #31, LBB0_6
; %bb.5:
	ldr	x8, [x19]
Lloh25:
	adrp	x9, _ISS_CLK_MCUISP_DIV1@GOTPAGE
Lloh26:
	ldr	x9, [x9, _ISS_CLK_MCUISP_DIV1@GOTPAGEOFF]
Lloh27:
	ldr	x9, [x9]
	ldr	w0, [x8, x9, lsl #2]
	ldr	w1, [x20]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_clk_set_rate
LBB0_6:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.cfi_endproc
                                        ; -- End function
	.comm	_ISS_CLK_ACLK200,8,3            ; @ISS_CLK_ACLK200
	.comm	_ISS_CLK_ACLK200_DIV,8,3        ; @ISS_CLK_ACLK200_DIV
	.comm	_ISS_CLK_ACLK400MCUISP,8,3      ; @ISS_CLK_ACLK400MCUISP
	.comm	_ISS_CLK_ACLK400MCUISP_DIV,8,3  ; @ISS_CLK_ACLK400MCUISP_DIV
	.comm	_ISS_CLK_ISP_DIV0,8,3           ; @ISS_CLK_ISP_DIV0
	.comm	_ACLK_AXI_FREQUENCY,4,2         ; @ACLK_AXI_FREQUENCY
	.comm	_ISS_CLK_ISP_DIV1,8,3           ; @ISS_CLK_ISP_DIV1
	.comm	_ISS_CLK_MCUISP_DIV0,8,3        ; @ISS_CLK_MCUISP_DIV0
	.comm	_ATCLK_MCUISP_FREQUENCY,4,2     ; @ATCLK_MCUISP_FREQUENCY
	.comm	_ISS_CLK_MCUISP_DIV1,8,3        ; @ISS_CLK_MCUISP_DIV1
	.no_dead_strip	_fimc_is_setup_clocks
.subsections_via_symbols
