	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amd_iommu_device_info          ## -- Begin function amd_iommu_device_info
	.p2align	4, 0x90
_amd_iommu_device_info:                 ## @amd_iommu_device_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	testq	%rdi, %rdi
	je	LBB0_13
## %bb.1:
	movq	%rsi, %r14
	testq	%rsi, %rsi
	je	LBB0_13
## %bb.2:
	movq	%rdi, %r15
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_amd_iommu_v2_supported
	testl	%eax, %eax
	je	LBB0_14
## %bb.3:
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$16, %edx
	callq	_memset
	xorl	%eax, %eax
	callq	_pci_ats_disabled
	testl	%eax, %eax
	jne	LBB0_6
## %bb.4:
	movq	_PCI_EXT_CAP_ID_ATS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_pci_find_ext_capability
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:
	movq	_AMD_IOMMU_DEVICE_FLAG_ATS_SUP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r14)
LBB0_6:
	movq	_PCI_EXT_CAP_ID_PRI@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_pci_find_ext_capability
	testl	%eax, %eax
	je	LBB0_8
## %bb.7:
	movq	_AMD_IOMMU_DEVICE_FLAG_PRI_SUP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r14)
LBB0_8:
	movq	_PCI_EXT_CAP_ID_PASID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_pci_find_ext_capability
	xorl	%ebx, %ebx
	testl	%eax, %eax
	je	LBB0_16
## %bb.9:
	movq	_amd_iommu_max_glx_val@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	leal	(%rax,%rax,8), %ecx
	addb	$9, %cl
	movl	$1, %edi
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %edi
	movl	$1048576, %esi                  ## imm = 0x100000
	callq	_min
	movq	%rax, %r12
	movq	_AMD_IOMMU_DEVICE_FLAG_PASID_SUP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r14)
	movq	%r15, %rdi
	callq	_pci_max_pasids
	movl	%eax, %edi
	movl	%r12d, %esi
	callq	_min
	movq	%rax, 8(%r14)
	movq	%r15, %rdi
	callq	_pci_pasid_features
	movq	_PCI_PASID_CAP_EXEC@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_11
## %bb.10:
	movq	_AMD_IOMMU_DEVICE_FLAG_EXEC_SUP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	%ecx, (%r14)
LBB0_11:
	movq	_PCI_PASID_CAP_PRIV@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_16
## %bb.12:
	movq	_AMD_IOMMU_DEVICE_FLAG_PRIV_SUP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r14)
	jmp	LBB0_16
LBB0_13:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	jmp	LBB0_15
LBB0_14:
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_15:
	subl	(%rax), %ebx
LBB0_16:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_PCI_EXT_CAP_ID_ATS,4,2         ## @PCI_EXT_CAP_ID_ATS
	.comm	_AMD_IOMMU_DEVICE_FLAG_ATS_SUP,4,2 ## @AMD_IOMMU_DEVICE_FLAG_ATS_SUP
	.comm	_PCI_EXT_CAP_ID_PRI,4,2         ## @PCI_EXT_CAP_ID_PRI
	.comm	_AMD_IOMMU_DEVICE_FLAG_PRI_SUP,4,2 ## @AMD_IOMMU_DEVICE_FLAG_PRI_SUP
	.comm	_PCI_EXT_CAP_ID_PASID,4,2       ## @PCI_EXT_CAP_ID_PASID
	.comm	_amd_iommu_max_glx_val,4,2      ## @amd_iommu_max_glx_val
	.comm	_AMD_IOMMU_DEVICE_FLAG_PASID_SUP,4,2 ## @AMD_IOMMU_DEVICE_FLAG_PASID_SUP
	.comm	_PCI_PASID_CAP_EXEC,4,2         ## @PCI_PASID_CAP_EXEC
	.comm	_AMD_IOMMU_DEVICE_FLAG_EXEC_SUP,4,2 ## @AMD_IOMMU_DEVICE_FLAG_EXEC_SUP
	.comm	_PCI_PASID_CAP_PRIV,4,2         ## @PCI_PASID_CAP_PRIV
	.comm	_AMD_IOMMU_DEVICE_FLAG_PRIV_SUP,4,2 ## @AMD_IOMMU_DEVICE_FLAG_PRIV_SUP
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_amd_iommu_device_info          ; -- Begin function amd_iommu_device_info
	.p2align	2
_amd_iommu_device_info:                 ; @amd_iommu_device_info
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	cbz	x0, LBB0_13
; %bb.1:
	mov	x19, x1
	cbz	x1, LBB0_13
; %bb.2:
	mov	x20, x0
	bl	_amd_iommu_v2_supported
	cbz	w0, LBB0_13
; %bb.3:
	mov	x0, x19
	mov	w1, #0
	mov	w2, #16
	bl	_memset
	bl	_pci_ats_disabled
	cbnz	w0, LBB0_6
; %bb.4:
Lloh0:
	adrp	x8, _PCI_EXT_CAP_ID_ATS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_EXT_CAP_ID_ATS@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_pci_find_ext_capability
	cbz	w0, LBB0_6
; %bb.5:
Lloh3:
	adrp	x8, _AMD_IOMMU_DEVICE_FLAG_ATS_SUP@GOTPAGE
Lloh4:
	ldr	x8, [x8, _AMD_IOMMU_DEVICE_FLAG_ATS_SUP@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_6:
Lloh6:
	adrp	x8, _PCI_EXT_CAP_ID_PRI@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCI_EXT_CAP_ID_PRI@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_pci_find_ext_capability
	cbz	w0, LBB0_8
; %bb.7:
Lloh9:
	adrp	x8, _AMD_IOMMU_DEVICE_FLAG_PRI_SUP@GOTPAGE
Lloh10:
	ldr	x8, [x8, _AMD_IOMMU_DEVICE_FLAG_PRI_SUP@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_8:
Lloh12:
	adrp	x8, _PCI_EXT_CAP_ID_PASID@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCI_EXT_CAP_ID_PASID@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_pci_find_ext_capability
	cbz	w0, LBB0_14
; %bb.9:
Lloh15:
	adrp	x8, _amd_iommu_max_glx_val@GOTPAGE
Lloh16:
	ldr	x8, [x8, _amd_iommu_max_glx_val@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	add	w8, w8, w8, lsl #3
	add	w8, w8, #9
	mov	w9, #1
	lsl	w0, w9, w8
	mov	w1, #1048576
	bl	_min
	mov	x21, x0
Lloh18:
	adrp	x8, _AMD_IOMMU_DEVICE_FLAG_PASID_SUP@GOTPAGE
Lloh19:
	ldr	x8, [x8, _AMD_IOMMU_DEVICE_FLAG_PASID_SUP@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
	mov	x0, x20
	bl	_pci_max_pasids
	mov	x1, x21
	bl	_min
	str	x0, [x19, #8]
	mov	x0, x20
	bl	_pci_pasid_features
Lloh21:
	adrp	x8, _PCI_PASID_CAP_EXEC@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PCI_PASID_CAP_EXEC@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_11
; %bb.10:
Lloh24:
	adrp	x8, _AMD_IOMMU_DEVICE_FLAG_EXEC_SUP@GOTPAGE
Lloh25:
	ldr	x8, [x8, _AMD_IOMMU_DEVICE_FLAG_EXEC_SUP@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
LBB0_11:
Lloh27:
	adrp	x8, _PCI_PASID_CAP_PRIV@GOTPAGE
Lloh28:
	ldr	x8, [x8, _PCI_PASID_CAP_PRIV@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_15
; %bb.12:
	mov	w0, #0
Lloh30:
	adrp	x8, _AMD_IOMMU_DEVICE_FLAG_PRIV_SUP@GOTPAGE
Lloh31:
	ldr	x8, [x8, _AMD_IOMMU_DEVICE_FLAG_PRIV_SUP@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	ldr	w9, [x19]
	orr	w8, w9, w8
	str	w8, [x19]
	b	LBB0_14
LBB0_13:
Lloh33:
	adrp	x8, _EINVAL@GOTPAGE
Lloh34:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_14:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_15:
	mov	w0, #0
	b	LBB0_14
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_PCI_EXT_CAP_ID_ATS,4,2         ; @PCI_EXT_CAP_ID_ATS
	.comm	_AMD_IOMMU_DEVICE_FLAG_ATS_SUP,4,2 ; @AMD_IOMMU_DEVICE_FLAG_ATS_SUP
	.comm	_PCI_EXT_CAP_ID_PRI,4,2         ; @PCI_EXT_CAP_ID_PRI
	.comm	_AMD_IOMMU_DEVICE_FLAG_PRI_SUP,4,2 ; @AMD_IOMMU_DEVICE_FLAG_PRI_SUP
	.comm	_PCI_EXT_CAP_ID_PASID,4,2       ; @PCI_EXT_CAP_ID_PASID
	.comm	_amd_iommu_max_glx_val,4,2      ; @amd_iommu_max_glx_val
	.comm	_AMD_IOMMU_DEVICE_FLAG_PASID_SUP,4,2 ; @AMD_IOMMU_DEVICE_FLAG_PASID_SUP
	.comm	_PCI_PASID_CAP_EXEC,4,2         ; @PCI_PASID_CAP_EXEC
	.comm	_AMD_IOMMU_DEVICE_FLAG_EXEC_SUP,4,2 ; @AMD_IOMMU_DEVICE_FLAG_EXEC_SUP
	.comm	_PCI_PASID_CAP_PRIV,4,2         ; @PCI_PASID_CAP_PRIV
	.comm	_AMD_IOMMU_DEVICE_FLAG_PRIV_SUP,4,2 ; @AMD_IOMMU_DEVICE_FLAG_PRIV_SUP
.subsections_via_symbols
