	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dib3000mb_fe_init
_dib3000mb_fe_init:                     ## @dib3000mb_fe_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	leaq	L_.str(%rip), %rdi
	callq	_deb_info
	movq	_DIB3000MB_REG_POWER_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_POWER_UP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_RESTART@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_RESTART_AGC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_RESET_DEVICE@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movq	_DIB3000MB_RESET_DEVICE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movl	(%rbx), %edi
	movq	_DIB3000MB_RESET_DEVICE_RST@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_CLOCK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_CLOCK_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_ELECT_OUT_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_ELECT_OUT_MODE_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_DDS_FREQ_MSB@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_DDS_FREQ_MSB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_DDS_FREQ_LSB@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_DDS_FREQ_LSB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_dib3000mb_reg_timing_freq@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_dib3000mb_timing_freq@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movl	8(%rax), %esi
	callq	_wr_foreach
	movq	_dib3000mb_reg_impulse_noise@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_dib3000mb_impulse_noise_values@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	_DIB3000MB_IMPNOISE_OFF@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movl	(%rax,%rcx,4), %esi
	callq	_wr_foreach
	movq	_dib3000mb_reg_agc_gain@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_dib3000mb_default_agc_gain@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr_foreach
	movq	_DIB3000MB_REG_PHASE_NOISE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_PHASE_NOISE_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_dib3000mb_reg_phase_noise@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_dib3000mb_default_noise_phase@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr_foreach
	movq	_dib3000mb_reg_lock_duration@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_dib3000mb_default_lock_duration@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr_foreach
	movq	_dib3000mb_reg_agc_bandwidth@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_dib3000mb_agc_bandwidth_low@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr_foreach
	movq	_DIB3000MB_REG_LOCK0_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_LOCK0_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_LOCK1_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_LOCK1_SEARCH_4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_LOCK2_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_LOCK2_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_SEQ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_dib3000_seq@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	8(%rax), %rax
	movq	8(%rax), %rax
	movl	4(%rax), %esi
	callq	_wr
	movq	_dib3000mb_reg_bandwidth@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_dib3000mb_bandwidth_8mhz@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr_foreach
	movq	_DIB3000MB_REG_UNK_68@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_68@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_UNK_69@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_69@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_UNK_71@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_71@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_UNK_77@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_77@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_UNK_78@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_78@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_ISI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_ISI_INHIBIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_UNK_92@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_92@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_UNK_96@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_96@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_UNK_97@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_97@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_UNK_106@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_106@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_UNK_107@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_107@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_UNK_108@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_108@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_UNK_122@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_UNK_122@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_MOBILE_MODE_QAM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_MOBILE_MODE_QAM_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_BERLEN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_BERLEN_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_dib3000mb_reg_filter_coeffs@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_dib3000mb_filter_coeffs@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr_foreach
	movq	_DIB3000MB_REG_MOBILE_ALGO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_MOBILE_ALGO_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_MULTI_DEMOD_MSB@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_MULTI_DEMOD_MSB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_MULTI_DEMOD_LSB@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_MULTI_DEMOD_LSB@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_OUTPUT_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_OUTPUT_MODE_SLAVE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_FIFO_142@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_FIFO_142@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_MPEG2_OUT_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_MPEG2_OUT_MODE_188@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_PID_PARSE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_PID_PARSE_ACTIVATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_FIFO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_FIFO_INHIBIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_FIFO_146@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_FIFO_146@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_FIFO_147@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_FIFO_147@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	movq	_DIB3000MB_REG_DATA_IN_DIVERSITY@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DIB3000MB_DATA_DIVERSITY_IN_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_wr
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"dib3000mb is getting up.\n"

	.comm	_DIB3000MB_REG_POWER_CONTROL,4,2 ## @DIB3000MB_REG_POWER_CONTROL
	.comm	_DIB3000MB_POWER_UP,4,2         ## @DIB3000MB_POWER_UP
	.comm	_DIB3000MB_REG_RESTART,4,2      ## @DIB3000MB_REG_RESTART
	.comm	_DIB3000MB_RESTART_AGC,4,2      ## @DIB3000MB_RESTART_AGC
	.comm	_DIB3000MB_REG_RESET_DEVICE,4,2 ## @DIB3000MB_REG_RESET_DEVICE
	.comm	_DIB3000MB_RESET_DEVICE,4,2     ## @DIB3000MB_RESET_DEVICE
	.comm	_DIB3000MB_RESET_DEVICE_RST,4,2 ## @DIB3000MB_RESET_DEVICE_RST
	.comm	_DIB3000MB_REG_CLOCK,4,2        ## @DIB3000MB_REG_CLOCK
	.comm	_DIB3000MB_CLOCK_DEFAULT,4,2    ## @DIB3000MB_CLOCK_DEFAULT
	.comm	_DIB3000MB_REG_ELECT_OUT_MODE,4,2 ## @DIB3000MB_REG_ELECT_OUT_MODE
	.comm	_DIB3000MB_ELECT_OUT_MODE_ON,4,2 ## @DIB3000MB_ELECT_OUT_MODE_ON
	.comm	_DIB3000MB_REG_DDS_FREQ_MSB,4,2 ## @DIB3000MB_REG_DDS_FREQ_MSB
	.comm	_DIB3000MB_DDS_FREQ_MSB,4,2     ## @DIB3000MB_DDS_FREQ_MSB
	.comm	_DIB3000MB_REG_DDS_FREQ_LSB,4,2 ## @DIB3000MB_REG_DDS_FREQ_LSB
	.comm	_DIB3000MB_DDS_FREQ_LSB,4,2     ## @DIB3000MB_DDS_FREQ_LSB
	.comm	_dib3000mb_reg_timing_freq,4,2  ## @dib3000mb_reg_timing_freq
	.comm	_dib3000mb_timing_freq,8,3      ## @dib3000mb_timing_freq
	.comm	_dib3000mb_reg_impulse_noise,4,2 ## @dib3000mb_reg_impulse_noise
	.comm	_dib3000mb_impulse_noise_values,8,3 ## @dib3000mb_impulse_noise_values
	.comm	_DIB3000MB_IMPNOISE_OFF,8,3     ## @DIB3000MB_IMPNOISE_OFF
	.comm	_dib3000mb_reg_agc_gain,4,2     ## @dib3000mb_reg_agc_gain
	.comm	_dib3000mb_default_agc_gain,4,2 ## @dib3000mb_default_agc_gain
	.comm	_DIB3000MB_REG_PHASE_NOISE,4,2  ## @DIB3000MB_REG_PHASE_NOISE
	.comm	_DIB3000MB_PHASE_NOISE_DEFAULT,4,2 ## @DIB3000MB_PHASE_NOISE_DEFAULT
	.comm	_dib3000mb_reg_phase_noise,4,2  ## @dib3000mb_reg_phase_noise
	.comm	_dib3000mb_default_noise_phase,4,2 ## @dib3000mb_default_noise_phase
	.comm	_dib3000mb_reg_lock_duration,4,2 ## @dib3000mb_reg_lock_duration
	.comm	_dib3000mb_default_lock_duration,4,2 ## @dib3000mb_default_lock_duration
	.comm	_dib3000mb_reg_agc_bandwidth,4,2 ## @dib3000mb_reg_agc_bandwidth
	.comm	_dib3000mb_agc_bandwidth_low,4,2 ## @dib3000mb_agc_bandwidth_low
	.comm	_DIB3000MB_REG_LOCK0_MASK,4,2   ## @DIB3000MB_REG_LOCK0_MASK
	.comm	_DIB3000MB_LOCK0_DEFAULT,4,2    ## @DIB3000MB_LOCK0_DEFAULT
	.comm	_DIB3000MB_REG_LOCK1_MASK,4,2   ## @DIB3000MB_REG_LOCK1_MASK
	.comm	_DIB3000MB_LOCK1_SEARCH_4,4,2   ## @DIB3000MB_LOCK1_SEARCH_4
	.comm	_DIB3000MB_REG_LOCK2_MASK,4,2   ## @DIB3000MB_REG_LOCK2_MASK
	.comm	_DIB3000MB_LOCK2_DEFAULT,4,2    ## @DIB3000MB_LOCK2_DEFAULT
	.comm	_DIB3000MB_REG_SEQ,4,2          ## @DIB3000MB_REG_SEQ
	.comm	_dib3000_seq,8,3                ## @dib3000_seq
	.comm	_dib3000mb_reg_bandwidth,4,2    ## @dib3000mb_reg_bandwidth
	.comm	_dib3000mb_bandwidth_8mhz,4,2   ## @dib3000mb_bandwidth_8mhz
	.comm	_DIB3000MB_REG_UNK_68,4,2       ## @DIB3000MB_REG_UNK_68
	.comm	_DIB3000MB_UNK_68,4,2           ## @DIB3000MB_UNK_68
	.comm	_DIB3000MB_REG_UNK_69,4,2       ## @DIB3000MB_REG_UNK_69
	.comm	_DIB3000MB_UNK_69,4,2           ## @DIB3000MB_UNK_69
	.comm	_DIB3000MB_REG_UNK_71,4,2       ## @DIB3000MB_REG_UNK_71
	.comm	_DIB3000MB_UNK_71,4,2           ## @DIB3000MB_UNK_71
	.comm	_DIB3000MB_REG_UNK_77,4,2       ## @DIB3000MB_REG_UNK_77
	.comm	_DIB3000MB_UNK_77,4,2           ## @DIB3000MB_UNK_77
	.comm	_DIB3000MB_REG_UNK_78,4,2       ## @DIB3000MB_REG_UNK_78
	.comm	_DIB3000MB_UNK_78,4,2           ## @DIB3000MB_UNK_78
	.comm	_DIB3000MB_REG_ISI,4,2          ## @DIB3000MB_REG_ISI
	.comm	_DIB3000MB_ISI_INHIBIT,4,2      ## @DIB3000MB_ISI_INHIBIT
	.comm	_DIB3000MB_REG_UNK_92,4,2       ## @DIB3000MB_REG_UNK_92
	.comm	_DIB3000MB_UNK_92,4,2           ## @DIB3000MB_UNK_92
	.comm	_DIB3000MB_REG_UNK_96,4,2       ## @DIB3000MB_REG_UNK_96
	.comm	_DIB3000MB_UNK_96,4,2           ## @DIB3000MB_UNK_96
	.comm	_DIB3000MB_REG_UNK_97,4,2       ## @DIB3000MB_REG_UNK_97
	.comm	_DIB3000MB_UNK_97,4,2           ## @DIB3000MB_UNK_97
	.comm	_DIB3000MB_REG_UNK_106,4,2      ## @DIB3000MB_REG_UNK_106
	.comm	_DIB3000MB_UNK_106,4,2          ## @DIB3000MB_UNK_106
	.comm	_DIB3000MB_REG_UNK_107,4,2      ## @DIB3000MB_REG_UNK_107
	.comm	_DIB3000MB_UNK_107,4,2          ## @DIB3000MB_UNK_107
	.comm	_DIB3000MB_REG_UNK_108,4,2      ## @DIB3000MB_REG_UNK_108
	.comm	_DIB3000MB_UNK_108,4,2          ## @DIB3000MB_UNK_108
	.comm	_DIB3000MB_REG_UNK_122,4,2      ## @DIB3000MB_REG_UNK_122
	.comm	_DIB3000MB_UNK_122,4,2          ## @DIB3000MB_UNK_122
	.comm	_DIB3000MB_REG_MOBILE_MODE_QAM,4,2 ## @DIB3000MB_REG_MOBILE_MODE_QAM
	.comm	_DIB3000MB_MOBILE_MODE_QAM_OFF,4,2 ## @DIB3000MB_MOBILE_MODE_QAM_OFF
	.comm	_DIB3000MB_REG_BERLEN,4,2       ## @DIB3000MB_REG_BERLEN
	.comm	_DIB3000MB_BERLEN_DEFAULT,4,2   ## @DIB3000MB_BERLEN_DEFAULT
	.comm	_dib3000mb_reg_filter_coeffs,4,2 ## @dib3000mb_reg_filter_coeffs
	.comm	_dib3000mb_filter_coeffs,4,2    ## @dib3000mb_filter_coeffs
	.comm	_DIB3000MB_REG_MOBILE_ALGO,4,2  ## @DIB3000MB_REG_MOBILE_ALGO
	.comm	_DIB3000MB_MOBILE_ALGO_ON,4,2   ## @DIB3000MB_MOBILE_ALGO_ON
	.comm	_DIB3000MB_REG_MULTI_DEMOD_MSB,4,2 ## @DIB3000MB_REG_MULTI_DEMOD_MSB
	.comm	_DIB3000MB_MULTI_DEMOD_MSB,4,2  ## @DIB3000MB_MULTI_DEMOD_MSB
	.comm	_DIB3000MB_REG_MULTI_DEMOD_LSB,4,2 ## @DIB3000MB_REG_MULTI_DEMOD_LSB
	.comm	_DIB3000MB_MULTI_DEMOD_LSB,4,2  ## @DIB3000MB_MULTI_DEMOD_LSB
	.comm	_DIB3000MB_REG_OUTPUT_MODE,4,2  ## @DIB3000MB_REG_OUTPUT_MODE
	.comm	_DIB3000MB_OUTPUT_MODE_SLAVE,4,2 ## @DIB3000MB_OUTPUT_MODE_SLAVE
	.comm	_DIB3000MB_REG_FIFO_142,4,2     ## @DIB3000MB_REG_FIFO_142
	.comm	_DIB3000MB_FIFO_142,4,2         ## @DIB3000MB_FIFO_142
	.comm	_DIB3000MB_REG_MPEG2_OUT_MODE,4,2 ## @DIB3000MB_REG_MPEG2_OUT_MODE
	.comm	_DIB3000MB_MPEG2_OUT_MODE_188,4,2 ## @DIB3000MB_MPEG2_OUT_MODE_188
	.comm	_DIB3000MB_REG_PID_PARSE,4,2    ## @DIB3000MB_REG_PID_PARSE
	.comm	_DIB3000MB_PID_PARSE_ACTIVATE,4,2 ## @DIB3000MB_PID_PARSE_ACTIVATE
	.comm	_DIB3000MB_REG_FIFO,4,2         ## @DIB3000MB_REG_FIFO
	.comm	_DIB3000MB_FIFO_INHIBIT,4,2     ## @DIB3000MB_FIFO_INHIBIT
	.comm	_DIB3000MB_REG_FIFO_146,4,2     ## @DIB3000MB_REG_FIFO_146
	.comm	_DIB3000MB_FIFO_146,4,2         ## @DIB3000MB_FIFO_146
	.comm	_DIB3000MB_REG_FIFO_147,4,2     ## @DIB3000MB_REG_FIFO_147
	.comm	_DIB3000MB_FIFO_147,4,2         ## @DIB3000MB_FIFO_147
	.comm	_DIB3000MB_REG_DATA_IN_DIVERSITY,4,2 ## @DIB3000MB_REG_DATA_IN_DIVERSITY
	.comm	_DIB3000MB_DATA_DIVERSITY_IN_OFF,4,2 ## @DIB3000MB_DATA_DIVERSITY_IN_OFF
	.no_dead_strip	_dib3000mb_fe_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dib3000mb_fe_init
_dib3000mb_fe_init:                     ; @dib3000mb_fe_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
Lloh0:
	adrp	x0, l_.str@PAGE
Lloh1:
	add	x0, x0, l_.str@PAGEOFF
	bl	_deb_info
Lloh2:
	adrp	x8, _DIB3000MB_REG_POWER_CONTROL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DIB3000MB_REG_POWER_CONTROL@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
Lloh5:
	adrp	x8, _DIB3000MB_POWER_UP@GOTPAGE
Lloh6:
	ldr	x8, [x8, _DIB3000MB_POWER_UP@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	bl	_wr
Lloh8:
	adrp	x8, _DIB3000MB_REG_RESTART@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DIB3000MB_REG_RESTART@GOTPAGEOFF]
Lloh10:
	ldr	w0, [x8]
Lloh11:
	adrp	x8, _DIB3000MB_RESTART_AGC@GOTPAGE
Lloh12:
	ldr	x8, [x8, _DIB3000MB_RESTART_AGC@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	bl	_wr
Lloh14:
	adrp	x19, _DIB3000MB_REG_RESET_DEVICE@GOTPAGE
Lloh15:
	ldr	x19, [x19, _DIB3000MB_REG_RESET_DEVICE@GOTPAGEOFF]
	ldr	w0, [x19]
Lloh16:
	adrp	x8, _DIB3000MB_RESET_DEVICE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _DIB3000MB_RESET_DEVICE@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	bl	_wr
	ldr	w0, [x19]
Lloh19:
	adrp	x8, _DIB3000MB_RESET_DEVICE_RST@GOTPAGE
Lloh20:
	ldr	x8, [x8, _DIB3000MB_RESET_DEVICE_RST@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	bl	_wr
Lloh22:
	adrp	x8, _DIB3000MB_REG_CLOCK@GOTPAGE
Lloh23:
	ldr	x8, [x8, _DIB3000MB_REG_CLOCK@GOTPAGEOFF]
Lloh24:
	ldr	w0, [x8]
Lloh25:
	adrp	x8, _DIB3000MB_CLOCK_DEFAULT@GOTPAGE
Lloh26:
	ldr	x8, [x8, _DIB3000MB_CLOCK_DEFAULT@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
	bl	_wr
Lloh28:
	adrp	x8, _DIB3000MB_REG_ELECT_OUT_MODE@GOTPAGE
Lloh29:
	ldr	x8, [x8, _DIB3000MB_REG_ELECT_OUT_MODE@GOTPAGEOFF]
Lloh30:
	ldr	w0, [x8]
Lloh31:
	adrp	x8, _DIB3000MB_ELECT_OUT_MODE_ON@GOTPAGE
Lloh32:
	ldr	x8, [x8, _DIB3000MB_ELECT_OUT_MODE_ON@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	bl	_wr
Lloh34:
	adrp	x8, _DIB3000MB_REG_DDS_FREQ_MSB@GOTPAGE
Lloh35:
	ldr	x8, [x8, _DIB3000MB_REG_DDS_FREQ_MSB@GOTPAGEOFF]
Lloh36:
	ldr	w0, [x8]
Lloh37:
	adrp	x8, _DIB3000MB_DDS_FREQ_MSB@GOTPAGE
Lloh38:
	ldr	x8, [x8, _DIB3000MB_DDS_FREQ_MSB@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	bl	_wr
Lloh40:
	adrp	x8, _DIB3000MB_REG_DDS_FREQ_LSB@GOTPAGE
Lloh41:
	ldr	x8, [x8, _DIB3000MB_REG_DDS_FREQ_LSB@GOTPAGEOFF]
Lloh42:
	ldr	w0, [x8]
Lloh43:
	adrp	x8, _DIB3000MB_DDS_FREQ_LSB@GOTPAGE
Lloh44:
	ldr	x8, [x8, _DIB3000MB_DDS_FREQ_LSB@GOTPAGEOFF]
Lloh45:
	ldr	w1, [x8]
	bl	_wr
Lloh46:
	adrp	x8, _dib3000mb_reg_timing_freq@GOTPAGE
Lloh47:
	ldr	x8, [x8, _dib3000mb_reg_timing_freq@GOTPAGEOFF]
Lloh48:
	ldr	w0, [x8]
Lloh49:
	adrp	x8, _dib3000mb_timing_freq@GOTPAGE
Lloh50:
	ldr	x8, [x8, _dib3000mb_timing_freq@GOTPAGEOFF]
Lloh51:
	ldr	x8, [x8]
	ldr	w1, [x8, #8]
	bl	_wr_foreach
Lloh52:
	adrp	x8, _dib3000mb_reg_impulse_noise@GOTPAGE
Lloh53:
	ldr	x8, [x8, _dib3000mb_reg_impulse_noise@GOTPAGEOFF]
Lloh54:
	ldr	w0, [x8]
Lloh55:
	adrp	x8, _dib3000mb_impulse_noise_values@GOTPAGE
Lloh56:
	ldr	x8, [x8, _dib3000mb_impulse_noise_values@GOTPAGEOFF]
Lloh57:
	ldr	x8, [x8]
Lloh58:
	adrp	x9, _DIB3000MB_IMPNOISE_OFF@GOTPAGE
Lloh59:
	ldr	x9, [x9, _DIB3000MB_IMPNOISE_OFF@GOTPAGEOFF]
Lloh60:
	ldr	x9, [x9]
	ldr	w1, [x8, x9, lsl #2]
	bl	_wr_foreach
Lloh61:
	adrp	x8, _dib3000mb_reg_agc_gain@GOTPAGE
Lloh62:
	ldr	x8, [x8, _dib3000mb_reg_agc_gain@GOTPAGEOFF]
Lloh63:
	ldr	w0, [x8]
Lloh64:
	adrp	x8, _dib3000mb_default_agc_gain@GOTPAGE
Lloh65:
	ldr	x8, [x8, _dib3000mb_default_agc_gain@GOTPAGEOFF]
Lloh66:
	ldr	w1, [x8]
	bl	_wr_foreach
Lloh67:
	adrp	x8, _DIB3000MB_REG_PHASE_NOISE@GOTPAGE
Lloh68:
	ldr	x8, [x8, _DIB3000MB_REG_PHASE_NOISE@GOTPAGEOFF]
Lloh69:
	ldr	w0, [x8]
Lloh70:
	adrp	x8, _DIB3000MB_PHASE_NOISE_DEFAULT@GOTPAGE
Lloh71:
	ldr	x8, [x8, _DIB3000MB_PHASE_NOISE_DEFAULT@GOTPAGEOFF]
Lloh72:
	ldr	w1, [x8]
	bl	_wr
Lloh73:
	adrp	x8, _dib3000mb_reg_phase_noise@GOTPAGE
Lloh74:
	ldr	x8, [x8, _dib3000mb_reg_phase_noise@GOTPAGEOFF]
Lloh75:
	ldr	w0, [x8]
Lloh76:
	adrp	x8, _dib3000mb_default_noise_phase@GOTPAGE
Lloh77:
	ldr	x8, [x8, _dib3000mb_default_noise_phase@GOTPAGEOFF]
Lloh78:
	ldr	w1, [x8]
	bl	_wr_foreach
Lloh79:
	adrp	x8, _dib3000mb_reg_lock_duration@GOTPAGE
Lloh80:
	ldr	x8, [x8, _dib3000mb_reg_lock_duration@GOTPAGEOFF]
Lloh81:
	ldr	w0, [x8]
Lloh82:
	adrp	x8, _dib3000mb_default_lock_duration@GOTPAGE
Lloh83:
	ldr	x8, [x8, _dib3000mb_default_lock_duration@GOTPAGEOFF]
Lloh84:
	ldr	w1, [x8]
	bl	_wr_foreach
Lloh85:
	adrp	x8, _dib3000mb_reg_agc_bandwidth@GOTPAGE
Lloh86:
	ldr	x8, [x8, _dib3000mb_reg_agc_bandwidth@GOTPAGEOFF]
Lloh87:
	ldr	w0, [x8]
Lloh88:
	adrp	x8, _dib3000mb_agc_bandwidth_low@GOTPAGE
Lloh89:
	ldr	x8, [x8, _dib3000mb_agc_bandwidth_low@GOTPAGEOFF]
Lloh90:
	ldr	w1, [x8]
	bl	_wr_foreach
Lloh91:
	adrp	x8, _DIB3000MB_REG_LOCK0_MASK@GOTPAGE
Lloh92:
	ldr	x8, [x8, _DIB3000MB_REG_LOCK0_MASK@GOTPAGEOFF]
Lloh93:
	ldr	w0, [x8]
Lloh94:
	adrp	x8, _DIB3000MB_LOCK0_DEFAULT@GOTPAGE
Lloh95:
	ldr	x8, [x8, _DIB3000MB_LOCK0_DEFAULT@GOTPAGEOFF]
Lloh96:
	ldr	w1, [x8]
	bl	_wr
Lloh97:
	adrp	x8, _DIB3000MB_REG_LOCK1_MASK@GOTPAGE
Lloh98:
	ldr	x8, [x8, _DIB3000MB_REG_LOCK1_MASK@GOTPAGEOFF]
Lloh99:
	ldr	w0, [x8]
Lloh100:
	adrp	x8, _DIB3000MB_LOCK1_SEARCH_4@GOTPAGE
Lloh101:
	ldr	x8, [x8, _DIB3000MB_LOCK1_SEARCH_4@GOTPAGEOFF]
Lloh102:
	ldr	w1, [x8]
	bl	_wr
Lloh103:
	adrp	x8, _DIB3000MB_REG_LOCK2_MASK@GOTPAGE
Lloh104:
	ldr	x8, [x8, _DIB3000MB_REG_LOCK2_MASK@GOTPAGEOFF]
Lloh105:
	ldr	w0, [x8]
Lloh106:
	adrp	x8, _DIB3000MB_LOCK2_DEFAULT@GOTPAGE
Lloh107:
	ldr	x8, [x8, _DIB3000MB_LOCK2_DEFAULT@GOTPAGEOFF]
Lloh108:
	ldr	w1, [x8]
	bl	_wr
Lloh109:
	adrp	x8, _DIB3000MB_REG_SEQ@GOTPAGE
Lloh110:
	ldr	x8, [x8, _DIB3000MB_REG_SEQ@GOTPAGEOFF]
Lloh111:
	ldr	w0, [x8]
Lloh112:
	adrp	x8, _dib3000_seq@GOTPAGE
Lloh113:
	ldr	x8, [x8, _dib3000_seq@GOTPAGEOFF]
Lloh114:
	ldr	x8, [x8]
	ldr	x8, [x8, #8]
	ldr	x8, [x8, #8]
	ldr	w1, [x8, #4]
	bl	_wr
Lloh115:
	adrp	x8, _dib3000mb_reg_bandwidth@GOTPAGE
Lloh116:
	ldr	x8, [x8, _dib3000mb_reg_bandwidth@GOTPAGEOFF]
Lloh117:
	ldr	w0, [x8]
Lloh118:
	adrp	x8, _dib3000mb_bandwidth_8mhz@GOTPAGE
Lloh119:
	ldr	x8, [x8, _dib3000mb_bandwidth_8mhz@GOTPAGEOFF]
Lloh120:
	ldr	w1, [x8]
	bl	_wr_foreach
Lloh121:
	adrp	x8, _DIB3000MB_REG_UNK_68@GOTPAGE
Lloh122:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_68@GOTPAGEOFF]
Lloh123:
	ldr	w0, [x8]
Lloh124:
	adrp	x8, _DIB3000MB_UNK_68@GOTPAGE
Lloh125:
	ldr	x8, [x8, _DIB3000MB_UNK_68@GOTPAGEOFF]
Lloh126:
	ldr	w1, [x8]
	bl	_wr
Lloh127:
	adrp	x8, _DIB3000MB_REG_UNK_69@GOTPAGE
Lloh128:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_69@GOTPAGEOFF]
Lloh129:
	ldr	w0, [x8]
Lloh130:
	adrp	x8, _DIB3000MB_UNK_69@GOTPAGE
Lloh131:
	ldr	x8, [x8, _DIB3000MB_UNK_69@GOTPAGEOFF]
Lloh132:
	ldr	w1, [x8]
	bl	_wr
Lloh133:
	adrp	x8, _DIB3000MB_REG_UNK_71@GOTPAGE
Lloh134:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_71@GOTPAGEOFF]
Lloh135:
	ldr	w0, [x8]
Lloh136:
	adrp	x8, _DIB3000MB_UNK_71@GOTPAGE
Lloh137:
	ldr	x8, [x8, _DIB3000MB_UNK_71@GOTPAGEOFF]
Lloh138:
	ldr	w1, [x8]
	bl	_wr
Lloh139:
	adrp	x8, _DIB3000MB_REG_UNK_77@GOTPAGE
Lloh140:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_77@GOTPAGEOFF]
Lloh141:
	ldr	w0, [x8]
Lloh142:
	adrp	x8, _DIB3000MB_UNK_77@GOTPAGE
Lloh143:
	ldr	x8, [x8, _DIB3000MB_UNK_77@GOTPAGEOFF]
Lloh144:
	ldr	w1, [x8]
	bl	_wr
Lloh145:
	adrp	x8, _DIB3000MB_REG_UNK_78@GOTPAGE
Lloh146:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_78@GOTPAGEOFF]
Lloh147:
	ldr	w0, [x8]
Lloh148:
	adrp	x8, _DIB3000MB_UNK_78@GOTPAGE
Lloh149:
	ldr	x8, [x8, _DIB3000MB_UNK_78@GOTPAGEOFF]
Lloh150:
	ldr	w1, [x8]
	bl	_wr
Lloh151:
	adrp	x8, _DIB3000MB_REG_ISI@GOTPAGE
Lloh152:
	ldr	x8, [x8, _DIB3000MB_REG_ISI@GOTPAGEOFF]
Lloh153:
	ldr	w0, [x8]
Lloh154:
	adrp	x8, _DIB3000MB_ISI_INHIBIT@GOTPAGE
Lloh155:
	ldr	x8, [x8, _DIB3000MB_ISI_INHIBIT@GOTPAGEOFF]
Lloh156:
	ldr	w1, [x8]
	bl	_wr
Lloh157:
	adrp	x8, _DIB3000MB_REG_UNK_92@GOTPAGE
Lloh158:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_92@GOTPAGEOFF]
Lloh159:
	ldr	w0, [x8]
Lloh160:
	adrp	x8, _DIB3000MB_UNK_92@GOTPAGE
Lloh161:
	ldr	x8, [x8, _DIB3000MB_UNK_92@GOTPAGEOFF]
Lloh162:
	ldr	w1, [x8]
	bl	_wr
Lloh163:
	adrp	x8, _DIB3000MB_REG_UNK_96@GOTPAGE
Lloh164:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_96@GOTPAGEOFF]
Lloh165:
	ldr	w0, [x8]
Lloh166:
	adrp	x8, _DIB3000MB_UNK_96@GOTPAGE
Lloh167:
	ldr	x8, [x8, _DIB3000MB_UNK_96@GOTPAGEOFF]
Lloh168:
	ldr	w1, [x8]
	bl	_wr
Lloh169:
	adrp	x8, _DIB3000MB_REG_UNK_97@GOTPAGE
Lloh170:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_97@GOTPAGEOFF]
Lloh171:
	ldr	w0, [x8]
Lloh172:
	adrp	x8, _DIB3000MB_UNK_97@GOTPAGE
Lloh173:
	ldr	x8, [x8, _DIB3000MB_UNK_97@GOTPAGEOFF]
Lloh174:
	ldr	w1, [x8]
	bl	_wr
Lloh175:
	adrp	x8, _DIB3000MB_REG_UNK_106@GOTPAGE
Lloh176:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_106@GOTPAGEOFF]
Lloh177:
	ldr	w0, [x8]
Lloh178:
	adrp	x8, _DIB3000MB_UNK_106@GOTPAGE
Lloh179:
	ldr	x8, [x8, _DIB3000MB_UNK_106@GOTPAGEOFF]
Lloh180:
	ldr	w1, [x8]
	bl	_wr
Lloh181:
	adrp	x8, _DIB3000MB_REG_UNK_107@GOTPAGE
Lloh182:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_107@GOTPAGEOFF]
Lloh183:
	ldr	w0, [x8]
Lloh184:
	adrp	x8, _DIB3000MB_UNK_107@GOTPAGE
Lloh185:
	ldr	x8, [x8, _DIB3000MB_UNK_107@GOTPAGEOFF]
Lloh186:
	ldr	w1, [x8]
	bl	_wr
Lloh187:
	adrp	x8, _DIB3000MB_REG_UNK_108@GOTPAGE
Lloh188:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_108@GOTPAGEOFF]
Lloh189:
	ldr	w0, [x8]
Lloh190:
	adrp	x8, _DIB3000MB_UNK_108@GOTPAGE
Lloh191:
	ldr	x8, [x8, _DIB3000MB_UNK_108@GOTPAGEOFF]
Lloh192:
	ldr	w1, [x8]
	bl	_wr
Lloh193:
	adrp	x8, _DIB3000MB_REG_UNK_122@GOTPAGE
Lloh194:
	ldr	x8, [x8, _DIB3000MB_REG_UNK_122@GOTPAGEOFF]
Lloh195:
	ldr	w0, [x8]
Lloh196:
	adrp	x8, _DIB3000MB_UNK_122@GOTPAGE
Lloh197:
	ldr	x8, [x8, _DIB3000MB_UNK_122@GOTPAGEOFF]
Lloh198:
	ldr	w1, [x8]
	bl	_wr
Lloh199:
	adrp	x8, _DIB3000MB_REG_MOBILE_MODE_QAM@GOTPAGE
Lloh200:
	ldr	x8, [x8, _DIB3000MB_REG_MOBILE_MODE_QAM@GOTPAGEOFF]
Lloh201:
	ldr	w0, [x8]
Lloh202:
	adrp	x8, _DIB3000MB_MOBILE_MODE_QAM_OFF@GOTPAGE
Lloh203:
	ldr	x8, [x8, _DIB3000MB_MOBILE_MODE_QAM_OFF@GOTPAGEOFF]
Lloh204:
	ldr	w1, [x8]
	bl	_wr
Lloh205:
	adrp	x8, _DIB3000MB_REG_BERLEN@GOTPAGE
Lloh206:
	ldr	x8, [x8, _DIB3000MB_REG_BERLEN@GOTPAGEOFF]
Lloh207:
	ldr	w0, [x8]
Lloh208:
	adrp	x8, _DIB3000MB_BERLEN_DEFAULT@GOTPAGE
Lloh209:
	ldr	x8, [x8, _DIB3000MB_BERLEN_DEFAULT@GOTPAGEOFF]
Lloh210:
	ldr	w1, [x8]
	bl	_wr
Lloh211:
	adrp	x8, _dib3000mb_reg_filter_coeffs@GOTPAGE
Lloh212:
	ldr	x8, [x8, _dib3000mb_reg_filter_coeffs@GOTPAGEOFF]
Lloh213:
	ldr	w0, [x8]
Lloh214:
	adrp	x8, _dib3000mb_filter_coeffs@GOTPAGE
Lloh215:
	ldr	x8, [x8, _dib3000mb_filter_coeffs@GOTPAGEOFF]
Lloh216:
	ldr	w1, [x8]
	bl	_wr_foreach
Lloh217:
	adrp	x8, _DIB3000MB_REG_MOBILE_ALGO@GOTPAGE
Lloh218:
	ldr	x8, [x8, _DIB3000MB_REG_MOBILE_ALGO@GOTPAGEOFF]
Lloh219:
	ldr	w0, [x8]
Lloh220:
	adrp	x8, _DIB3000MB_MOBILE_ALGO_ON@GOTPAGE
Lloh221:
	ldr	x8, [x8, _DIB3000MB_MOBILE_ALGO_ON@GOTPAGEOFF]
Lloh222:
	ldr	w1, [x8]
	bl	_wr
Lloh223:
	adrp	x8, _DIB3000MB_REG_MULTI_DEMOD_MSB@GOTPAGE
Lloh224:
	ldr	x8, [x8, _DIB3000MB_REG_MULTI_DEMOD_MSB@GOTPAGEOFF]
Lloh225:
	ldr	w0, [x8]
Lloh226:
	adrp	x8, _DIB3000MB_MULTI_DEMOD_MSB@GOTPAGE
Lloh227:
	ldr	x8, [x8, _DIB3000MB_MULTI_DEMOD_MSB@GOTPAGEOFF]
Lloh228:
	ldr	w1, [x8]
	bl	_wr
Lloh229:
	adrp	x8, _DIB3000MB_REG_MULTI_DEMOD_LSB@GOTPAGE
Lloh230:
	ldr	x8, [x8, _DIB3000MB_REG_MULTI_DEMOD_LSB@GOTPAGEOFF]
Lloh231:
	ldr	w0, [x8]
Lloh232:
	adrp	x8, _DIB3000MB_MULTI_DEMOD_LSB@GOTPAGE
Lloh233:
	ldr	x8, [x8, _DIB3000MB_MULTI_DEMOD_LSB@GOTPAGEOFF]
Lloh234:
	ldr	w1, [x8]
	bl	_wr
Lloh235:
	adrp	x8, _DIB3000MB_REG_OUTPUT_MODE@GOTPAGE
Lloh236:
	ldr	x8, [x8, _DIB3000MB_REG_OUTPUT_MODE@GOTPAGEOFF]
Lloh237:
	ldr	w0, [x8]
Lloh238:
	adrp	x8, _DIB3000MB_OUTPUT_MODE_SLAVE@GOTPAGE
Lloh239:
	ldr	x8, [x8, _DIB3000MB_OUTPUT_MODE_SLAVE@GOTPAGEOFF]
Lloh240:
	ldr	w1, [x8]
	bl	_wr
Lloh241:
	adrp	x8, _DIB3000MB_REG_FIFO_142@GOTPAGE
Lloh242:
	ldr	x8, [x8, _DIB3000MB_REG_FIFO_142@GOTPAGEOFF]
Lloh243:
	ldr	w0, [x8]
Lloh244:
	adrp	x8, _DIB3000MB_FIFO_142@GOTPAGE
Lloh245:
	ldr	x8, [x8, _DIB3000MB_FIFO_142@GOTPAGEOFF]
Lloh246:
	ldr	w1, [x8]
	bl	_wr
Lloh247:
	adrp	x8, _DIB3000MB_REG_MPEG2_OUT_MODE@GOTPAGE
Lloh248:
	ldr	x8, [x8, _DIB3000MB_REG_MPEG2_OUT_MODE@GOTPAGEOFF]
Lloh249:
	ldr	w0, [x8]
Lloh250:
	adrp	x8, _DIB3000MB_MPEG2_OUT_MODE_188@GOTPAGE
Lloh251:
	ldr	x8, [x8, _DIB3000MB_MPEG2_OUT_MODE_188@GOTPAGEOFF]
Lloh252:
	ldr	w1, [x8]
	bl	_wr
Lloh253:
	adrp	x8, _DIB3000MB_REG_PID_PARSE@GOTPAGE
Lloh254:
	ldr	x8, [x8, _DIB3000MB_REG_PID_PARSE@GOTPAGEOFF]
Lloh255:
	ldr	w0, [x8]
Lloh256:
	adrp	x8, _DIB3000MB_PID_PARSE_ACTIVATE@GOTPAGE
Lloh257:
	ldr	x8, [x8, _DIB3000MB_PID_PARSE_ACTIVATE@GOTPAGEOFF]
Lloh258:
	ldr	w1, [x8]
	bl	_wr
Lloh259:
	adrp	x8, _DIB3000MB_REG_FIFO@GOTPAGE
Lloh260:
	ldr	x8, [x8, _DIB3000MB_REG_FIFO@GOTPAGEOFF]
Lloh261:
	ldr	w0, [x8]
Lloh262:
	adrp	x8, _DIB3000MB_FIFO_INHIBIT@GOTPAGE
Lloh263:
	ldr	x8, [x8, _DIB3000MB_FIFO_INHIBIT@GOTPAGEOFF]
Lloh264:
	ldr	w1, [x8]
	bl	_wr
Lloh265:
	adrp	x8, _DIB3000MB_REG_FIFO_146@GOTPAGE
Lloh266:
	ldr	x8, [x8, _DIB3000MB_REG_FIFO_146@GOTPAGEOFF]
Lloh267:
	ldr	w0, [x8]
Lloh268:
	adrp	x8, _DIB3000MB_FIFO_146@GOTPAGE
Lloh269:
	ldr	x8, [x8, _DIB3000MB_FIFO_146@GOTPAGEOFF]
Lloh270:
	ldr	w1, [x8]
	bl	_wr
Lloh271:
	adrp	x8, _DIB3000MB_REG_FIFO_147@GOTPAGE
Lloh272:
	ldr	x8, [x8, _DIB3000MB_REG_FIFO_147@GOTPAGEOFF]
Lloh273:
	ldr	w0, [x8]
Lloh274:
	adrp	x8, _DIB3000MB_FIFO_147@GOTPAGE
Lloh275:
	ldr	x8, [x8, _DIB3000MB_FIFO_147@GOTPAGEOFF]
Lloh276:
	ldr	w1, [x8]
	bl	_wr
Lloh277:
	adrp	x8, _DIB3000MB_REG_DATA_IN_DIVERSITY@GOTPAGE
Lloh278:
	ldr	x8, [x8, _DIB3000MB_REG_DATA_IN_DIVERSITY@GOTPAGEOFF]
Lloh279:
	ldr	w0, [x8]
Lloh280:
	adrp	x8, _DIB3000MB_DATA_DIVERSITY_IN_OFF@GOTPAGE
Lloh281:
	ldr	x8, [x8, _DIB3000MB_DATA_DIVERSITY_IN_OFF@GOTPAGEOFF]
Lloh282:
	ldr	w1, [x8]
	bl	_wr
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh280, Lloh281, Lloh282
	.loh AdrpLdrGotLdr	Lloh277, Lloh278, Lloh279
	.loh AdrpLdrGotLdr	Lloh274, Lloh275, Lloh276
	.loh AdrpLdrGotLdr	Lloh271, Lloh272, Lloh273
	.loh AdrpLdrGotLdr	Lloh268, Lloh269, Lloh270
	.loh AdrpLdrGotLdr	Lloh265, Lloh266, Lloh267
	.loh AdrpLdrGotLdr	Lloh262, Lloh263, Lloh264
	.loh AdrpLdrGotLdr	Lloh259, Lloh260, Lloh261
	.loh AdrpLdrGotLdr	Lloh256, Lloh257, Lloh258
	.loh AdrpLdrGotLdr	Lloh253, Lloh254, Lloh255
	.loh AdrpLdrGotLdr	Lloh250, Lloh251, Lloh252
	.loh AdrpLdrGotLdr	Lloh247, Lloh248, Lloh249
	.loh AdrpLdrGotLdr	Lloh244, Lloh245, Lloh246
	.loh AdrpLdrGotLdr	Lloh241, Lloh242, Lloh243
	.loh AdrpLdrGotLdr	Lloh238, Lloh239, Lloh240
	.loh AdrpLdrGotLdr	Lloh235, Lloh236, Lloh237
	.loh AdrpLdrGotLdr	Lloh232, Lloh233, Lloh234
	.loh AdrpLdrGotLdr	Lloh229, Lloh230, Lloh231
	.loh AdrpLdrGotLdr	Lloh226, Lloh227, Lloh228
	.loh AdrpLdrGotLdr	Lloh223, Lloh224, Lloh225
	.loh AdrpLdrGotLdr	Lloh220, Lloh221, Lloh222
	.loh AdrpLdrGotLdr	Lloh217, Lloh218, Lloh219
	.loh AdrpLdrGotLdr	Lloh214, Lloh215, Lloh216
	.loh AdrpLdrGotLdr	Lloh211, Lloh212, Lloh213
	.loh AdrpLdrGotLdr	Lloh208, Lloh209, Lloh210
	.loh AdrpLdrGotLdr	Lloh205, Lloh206, Lloh207
	.loh AdrpLdrGotLdr	Lloh202, Lloh203, Lloh204
	.loh AdrpLdrGotLdr	Lloh199, Lloh200, Lloh201
	.loh AdrpLdrGotLdr	Lloh196, Lloh197, Lloh198
	.loh AdrpLdrGotLdr	Lloh193, Lloh194, Lloh195
	.loh AdrpLdrGotLdr	Lloh190, Lloh191, Lloh192
	.loh AdrpLdrGotLdr	Lloh187, Lloh188, Lloh189
	.loh AdrpLdrGotLdr	Lloh184, Lloh185, Lloh186
	.loh AdrpLdrGotLdr	Lloh181, Lloh182, Lloh183
	.loh AdrpLdrGotLdr	Lloh178, Lloh179, Lloh180
	.loh AdrpLdrGotLdr	Lloh175, Lloh176, Lloh177
	.loh AdrpLdrGotLdr	Lloh172, Lloh173, Lloh174
	.loh AdrpLdrGotLdr	Lloh169, Lloh170, Lloh171
	.loh AdrpLdrGotLdr	Lloh166, Lloh167, Lloh168
	.loh AdrpLdrGotLdr	Lloh163, Lloh164, Lloh165
	.loh AdrpLdrGotLdr	Lloh160, Lloh161, Lloh162
	.loh AdrpLdrGotLdr	Lloh157, Lloh158, Lloh159
	.loh AdrpLdrGotLdr	Lloh154, Lloh155, Lloh156
	.loh AdrpLdrGotLdr	Lloh151, Lloh152, Lloh153
	.loh AdrpLdrGotLdr	Lloh148, Lloh149, Lloh150
	.loh AdrpLdrGotLdr	Lloh145, Lloh146, Lloh147
	.loh AdrpLdrGotLdr	Lloh142, Lloh143, Lloh144
	.loh AdrpLdrGotLdr	Lloh139, Lloh140, Lloh141
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.loh AdrpLdrGotLdr	Lloh133, Lloh134, Lloh135
	.loh AdrpLdrGotLdr	Lloh130, Lloh131, Lloh132
	.loh AdrpLdrGotLdr	Lloh127, Lloh128, Lloh129
	.loh AdrpLdrGotLdr	Lloh124, Lloh125, Lloh126
	.loh AdrpLdrGotLdr	Lloh121, Lloh122, Lloh123
	.loh AdrpLdrGotLdr	Lloh118, Lloh119, Lloh120
	.loh AdrpLdrGotLdr	Lloh115, Lloh116, Lloh117
	.loh AdrpLdrGotLdr	Lloh112, Lloh113, Lloh114
	.loh AdrpLdrGotLdr	Lloh109, Lloh110, Lloh111
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"dib3000mb is getting up.\n"

	.comm	_DIB3000MB_REG_POWER_CONTROL,4,2 ; @DIB3000MB_REG_POWER_CONTROL
	.comm	_DIB3000MB_POWER_UP,4,2         ; @DIB3000MB_POWER_UP
	.comm	_DIB3000MB_REG_RESTART,4,2      ; @DIB3000MB_REG_RESTART
	.comm	_DIB3000MB_RESTART_AGC,4,2      ; @DIB3000MB_RESTART_AGC
	.comm	_DIB3000MB_REG_RESET_DEVICE,4,2 ; @DIB3000MB_REG_RESET_DEVICE
	.comm	_DIB3000MB_RESET_DEVICE,4,2     ; @DIB3000MB_RESET_DEVICE
	.comm	_DIB3000MB_RESET_DEVICE_RST,4,2 ; @DIB3000MB_RESET_DEVICE_RST
	.comm	_DIB3000MB_REG_CLOCK,4,2        ; @DIB3000MB_REG_CLOCK
	.comm	_DIB3000MB_CLOCK_DEFAULT,4,2    ; @DIB3000MB_CLOCK_DEFAULT
	.comm	_DIB3000MB_REG_ELECT_OUT_MODE,4,2 ; @DIB3000MB_REG_ELECT_OUT_MODE
	.comm	_DIB3000MB_ELECT_OUT_MODE_ON,4,2 ; @DIB3000MB_ELECT_OUT_MODE_ON
	.comm	_DIB3000MB_REG_DDS_FREQ_MSB,4,2 ; @DIB3000MB_REG_DDS_FREQ_MSB
	.comm	_DIB3000MB_DDS_FREQ_MSB,4,2     ; @DIB3000MB_DDS_FREQ_MSB
	.comm	_DIB3000MB_REG_DDS_FREQ_LSB,4,2 ; @DIB3000MB_REG_DDS_FREQ_LSB
	.comm	_DIB3000MB_DDS_FREQ_LSB,4,2     ; @DIB3000MB_DDS_FREQ_LSB
	.comm	_dib3000mb_reg_timing_freq,4,2  ; @dib3000mb_reg_timing_freq
	.comm	_dib3000mb_timing_freq,8,3      ; @dib3000mb_timing_freq
	.comm	_dib3000mb_reg_impulse_noise,4,2 ; @dib3000mb_reg_impulse_noise
	.comm	_dib3000mb_impulse_noise_values,8,3 ; @dib3000mb_impulse_noise_values
	.comm	_DIB3000MB_IMPNOISE_OFF,8,3     ; @DIB3000MB_IMPNOISE_OFF
	.comm	_dib3000mb_reg_agc_gain,4,2     ; @dib3000mb_reg_agc_gain
	.comm	_dib3000mb_default_agc_gain,4,2 ; @dib3000mb_default_agc_gain
	.comm	_DIB3000MB_REG_PHASE_NOISE,4,2  ; @DIB3000MB_REG_PHASE_NOISE
	.comm	_DIB3000MB_PHASE_NOISE_DEFAULT,4,2 ; @DIB3000MB_PHASE_NOISE_DEFAULT
	.comm	_dib3000mb_reg_phase_noise,4,2  ; @dib3000mb_reg_phase_noise
	.comm	_dib3000mb_default_noise_phase,4,2 ; @dib3000mb_default_noise_phase
	.comm	_dib3000mb_reg_lock_duration,4,2 ; @dib3000mb_reg_lock_duration
	.comm	_dib3000mb_default_lock_duration,4,2 ; @dib3000mb_default_lock_duration
	.comm	_dib3000mb_reg_agc_bandwidth,4,2 ; @dib3000mb_reg_agc_bandwidth
	.comm	_dib3000mb_agc_bandwidth_low,4,2 ; @dib3000mb_agc_bandwidth_low
	.comm	_DIB3000MB_REG_LOCK0_MASK,4,2   ; @DIB3000MB_REG_LOCK0_MASK
	.comm	_DIB3000MB_LOCK0_DEFAULT,4,2    ; @DIB3000MB_LOCK0_DEFAULT
	.comm	_DIB3000MB_REG_LOCK1_MASK,4,2   ; @DIB3000MB_REG_LOCK1_MASK
	.comm	_DIB3000MB_LOCK1_SEARCH_4,4,2   ; @DIB3000MB_LOCK1_SEARCH_4
	.comm	_DIB3000MB_REG_LOCK2_MASK,4,2   ; @DIB3000MB_REG_LOCK2_MASK
	.comm	_DIB3000MB_LOCK2_DEFAULT,4,2    ; @DIB3000MB_LOCK2_DEFAULT
	.comm	_DIB3000MB_REG_SEQ,4,2          ; @DIB3000MB_REG_SEQ
	.comm	_dib3000_seq,8,3                ; @dib3000_seq
	.comm	_dib3000mb_reg_bandwidth,4,2    ; @dib3000mb_reg_bandwidth
	.comm	_dib3000mb_bandwidth_8mhz,4,2   ; @dib3000mb_bandwidth_8mhz
	.comm	_DIB3000MB_REG_UNK_68,4,2       ; @DIB3000MB_REG_UNK_68
	.comm	_DIB3000MB_UNK_68,4,2           ; @DIB3000MB_UNK_68
	.comm	_DIB3000MB_REG_UNK_69,4,2       ; @DIB3000MB_REG_UNK_69
	.comm	_DIB3000MB_UNK_69,4,2           ; @DIB3000MB_UNK_69
	.comm	_DIB3000MB_REG_UNK_71,4,2       ; @DIB3000MB_REG_UNK_71
	.comm	_DIB3000MB_UNK_71,4,2           ; @DIB3000MB_UNK_71
	.comm	_DIB3000MB_REG_UNK_77,4,2       ; @DIB3000MB_REG_UNK_77
	.comm	_DIB3000MB_UNK_77,4,2           ; @DIB3000MB_UNK_77
	.comm	_DIB3000MB_REG_UNK_78,4,2       ; @DIB3000MB_REG_UNK_78
	.comm	_DIB3000MB_UNK_78,4,2           ; @DIB3000MB_UNK_78
	.comm	_DIB3000MB_REG_ISI,4,2          ; @DIB3000MB_REG_ISI
	.comm	_DIB3000MB_ISI_INHIBIT,4,2      ; @DIB3000MB_ISI_INHIBIT
	.comm	_DIB3000MB_REG_UNK_92,4,2       ; @DIB3000MB_REG_UNK_92
	.comm	_DIB3000MB_UNK_92,4,2           ; @DIB3000MB_UNK_92
	.comm	_DIB3000MB_REG_UNK_96,4,2       ; @DIB3000MB_REG_UNK_96
	.comm	_DIB3000MB_UNK_96,4,2           ; @DIB3000MB_UNK_96
	.comm	_DIB3000MB_REG_UNK_97,4,2       ; @DIB3000MB_REG_UNK_97
	.comm	_DIB3000MB_UNK_97,4,2           ; @DIB3000MB_UNK_97
	.comm	_DIB3000MB_REG_UNK_106,4,2      ; @DIB3000MB_REG_UNK_106
	.comm	_DIB3000MB_UNK_106,4,2          ; @DIB3000MB_UNK_106
	.comm	_DIB3000MB_REG_UNK_107,4,2      ; @DIB3000MB_REG_UNK_107
	.comm	_DIB3000MB_UNK_107,4,2          ; @DIB3000MB_UNK_107
	.comm	_DIB3000MB_REG_UNK_108,4,2      ; @DIB3000MB_REG_UNK_108
	.comm	_DIB3000MB_UNK_108,4,2          ; @DIB3000MB_UNK_108
	.comm	_DIB3000MB_REG_UNK_122,4,2      ; @DIB3000MB_REG_UNK_122
	.comm	_DIB3000MB_UNK_122,4,2          ; @DIB3000MB_UNK_122
	.comm	_DIB3000MB_REG_MOBILE_MODE_QAM,4,2 ; @DIB3000MB_REG_MOBILE_MODE_QAM
	.comm	_DIB3000MB_MOBILE_MODE_QAM_OFF,4,2 ; @DIB3000MB_MOBILE_MODE_QAM_OFF
	.comm	_DIB3000MB_REG_BERLEN,4,2       ; @DIB3000MB_REG_BERLEN
	.comm	_DIB3000MB_BERLEN_DEFAULT,4,2   ; @DIB3000MB_BERLEN_DEFAULT
	.comm	_dib3000mb_reg_filter_coeffs,4,2 ; @dib3000mb_reg_filter_coeffs
	.comm	_dib3000mb_filter_coeffs,4,2    ; @dib3000mb_filter_coeffs
	.comm	_DIB3000MB_REG_MOBILE_ALGO,4,2  ; @DIB3000MB_REG_MOBILE_ALGO
	.comm	_DIB3000MB_MOBILE_ALGO_ON,4,2   ; @DIB3000MB_MOBILE_ALGO_ON
	.comm	_DIB3000MB_REG_MULTI_DEMOD_MSB,4,2 ; @DIB3000MB_REG_MULTI_DEMOD_MSB
	.comm	_DIB3000MB_MULTI_DEMOD_MSB,4,2  ; @DIB3000MB_MULTI_DEMOD_MSB
	.comm	_DIB3000MB_REG_MULTI_DEMOD_LSB,4,2 ; @DIB3000MB_REG_MULTI_DEMOD_LSB
	.comm	_DIB3000MB_MULTI_DEMOD_LSB,4,2  ; @DIB3000MB_MULTI_DEMOD_LSB
	.comm	_DIB3000MB_REG_OUTPUT_MODE,4,2  ; @DIB3000MB_REG_OUTPUT_MODE
	.comm	_DIB3000MB_OUTPUT_MODE_SLAVE,4,2 ; @DIB3000MB_OUTPUT_MODE_SLAVE
	.comm	_DIB3000MB_REG_FIFO_142,4,2     ; @DIB3000MB_REG_FIFO_142
	.comm	_DIB3000MB_FIFO_142,4,2         ; @DIB3000MB_FIFO_142
	.comm	_DIB3000MB_REG_MPEG2_OUT_MODE,4,2 ; @DIB3000MB_REG_MPEG2_OUT_MODE
	.comm	_DIB3000MB_MPEG2_OUT_MODE_188,4,2 ; @DIB3000MB_MPEG2_OUT_MODE_188
	.comm	_DIB3000MB_REG_PID_PARSE,4,2    ; @DIB3000MB_REG_PID_PARSE
	.comm	_DIB3000MB_PID_PARSE_ACTIVATE,4,2 ; @DIB3000MB_PID_PARSE_ACTIVATE
	.comm	_DIB3000MB_REG_FIFO,4,2         ; @DIB3000MB_REG_FIFO
	.comm	_DIB3000MB_FIFO_INHIBIT,4,2     ; @DIB3000MB_FIFO_INHIBIT
	.comm	_DIB3000MB_REG_FIFO_146,4,2     ; @DIB3000MB_REG_FIFO_146
	.comm	_DIB3000MB_FIFO_146,4,2         ; @DIB3000MB_FIFO_146
	.comm	_DIB3000MB_REG_FIFO_147,4,2     ; @DIB3000MB_REG_FIFO_147
	.comm	_DIB3000MB_FIFO_147,4,2         ; @DIB3000MB_FIFO_147
	.comm	_DIB3000MB_REG_DATA_IN_DIVERSITY,4,2 ; @DIB3000MB_REG_DATA_IN_DIVERSITY
	.comm	_DIB3000MB_DATA_DIVERSITY_IN_OFF,4,2 ; @DIB3000MB_DATA_DIVERSITY_IN_OFF
	.no_dead_strip	_dib3000mb_fe_init
.subsections_via_symbols
