	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ksz8795_port_setup
_ksz8795_port_setup:                    ## @ksz8795_port_setup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r12d
	movq	%rdi, %rbx
	movq	24(%rdi), %r13
	movl	%esi, -44(%rbp)                 ## 4-byte Spill
	movslq	%esi, %r15
	movq	_P_BCAST_STORM_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_PORT_BROADCAST_STORM@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%r15d, %esi
	movl	$1, %r8d
	callq	_ksz_port_cfg
	movq	%rbx, %rdi
	movl	%r15d, %esi
	movl	$4, %edx
	callq	_ksz8795_set_prio_queue
	movq	_P_PRIO_CTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movq	_PORT_DIFFSERV_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	xorl	%r8d, %r8d
	callq	_ksz_port_cfg
	movq	_P_802_1P_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_PORT_802_1P_REMAPPING@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	xorl	%r8d, %r8d
	callq	_ksz_port_cfg
	movl	(%r14), %edx
	movq	_PORT_802_1P_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	movl	$1, %r8d
	callq	_ksz_port_cfg
	testl	%r12d, %r12d
	je	LBB0_8
## %bb.1:
	movq	_REG_PORT_5_CTRL_6@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	leaq	-48(%rbp), %rdx
	movq	%rbx, %rdi
	callq	_ksz_read8
	movq	_PORT_INTERFACE_TYPE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	notl	%esi
	andl	-48(%rbp), %esi
	movq	_PORT_GMII_1GPS_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, %edx
	notl	%edx
	andl	%esi, %edx
	movl	%edx, -48(%rbp)
	movl	(%rbx), %ecx
	cmpl	$130, %ecx
	je	LBB0_5
## %bb.2:
	movq	_SPEED_100@GOTPCREL(%rip), %rsi
	cmpl	$129, %ecx
	je	LBB0_7
## %bb.3:
	cmpl	$128, %ecx
	jne	LBB0_6
## %bb.4:
	movq	_PORT_INTERFACE_RMII@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	%edx, -48(%rbp)
	jmp	LBB0_7
LBB0_8:
	movq	%r15, %r14
	shlq	$5, %r14
	movl	(%r13,%r14), %r12d
	orl	12(%rbx), %r12d
	movl	%r15d, %edi
	callq	_BIT
	orl	%eax, 8(%rbx)
	cmpq	$0, 16(%r13,%r14)
	je	LBB0_9
## %bb.10:
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	movl	%r14d, %edi
	callq	_BIT
	orl	%eax, 16(%rbx)
	jmp	LBB0_11
LBB0_5:
	orl	%esi, %eax
	movq	_PORT_INTERFACE_GMII@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, -48(%rbp)
	movq	_SPEED_1000@GOTPCREL(%rip), %rsi
	movl	%eax, %edx
	jmp	LBB0_7
LBB0_6:
	movq	_PORT_RGMII_ID_IN_ENABLE@GOTPCREL(%rip), %rsi
	movl	(%rsi), %r8d
	movq	_PORT_RGMII_ID_OUT_ENABLE@GOTPCREL(%rip), %rdi
	movl	(%rdi), %r9d
	movl	%r8d, %esi
	orl	%r9d, %esi
	notl	%esi
	andl	%esi, %edx
	movq	_PHY_INTERFACE_MODE_RGMII_RXID@GOTPCREL(%rip), %rsi
	xorl	%edi, %edi
	cmpl	(%rsi), %ecx
	movl	$0, %r11d
	cmovel	%r8d, %r11d
	movq	_PHY_INTERFACE_MODE_RGMII_ID@GOTPCREL(%rip), %r10
	movq	_PHY_INTERFACE_MODE_RGMII_TXID@GOTPCREL(%rip), %rsi
	cmpl	(%rsi), %ecx
	cmovel	%r9d, %edi
	cmpl	(%r10), %ecx
	cmovel	%r8d, %r11d
	cmovel	%r9d, %edi
	orl	%r11d, %edi
	orl	%edx, %edi
	orl	%eax, %edi
	movq	_PORT_INTERFACE_RGMII@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movl	%edi, -48(%rbp)
	movq	_SPEED_1000@GOTPCREL(%rip), %rsi
	movl	%edi, %edx
LBB0_7:
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	movq	(%rsi), %rax
	shlq	$5, %r15
	movq	%rax, 24(%r13,%r15)
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_ksz_write8
	movl	$1, 8(%r13,%r15)
	movl	4(%rbx), %r12d
	movl	12(%rbx), %eax
	movl	%eax, 8(%rbx)
	movl	%eax, 16(%rbx)
LBB0_11:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%r12d, %edx
	callq	_ksz8795_cfg_port_member
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_9:
	movl	-44(%rbp), %r14d                ## 4-byte Reload
	jmp	LBB0_11
	.cfi_endproc
                                        ## -- End function
	.comm	_P_BCAST_STORM_CTRL,4,2         ## @P_BCAST_STORM_CTRL
	.comm	_PORT_BROADCAST_STORM,4,2       ## @PORT_BROADCAST_STORM
	.comm	_P_PRIO_CTRL,4,2                ## @P_PRIO_CTRL
	.comm	_PORT_DIFFSERV_ENABLE,4,2       ## @PORT_DIFFSERV_ENABLE
	.comm	_P_802_1P_CTRL,4,2              ## @P_802_1P_CTRL
	.comm	_PORT_802_1P_REMAPPING,4,2      ## @PORT_802_1P_REMAPPING
	.comm	_PORT_802_1P_ENABLE,4,2         ## @PORT_802_1P_ENABLE
	.comm	_REG_PORT_5_CTRL_6,4,2          ## @REG_PORT_5_CTRL_6
	.comm	_PORT_INTERFACE_TYPE,4,2        ## @PORT_INTERFACE_TYPE
	.comm	_PORT_GMII_1GPS_MODE,4,2        ## @PORT_GMII_1GPS_MODE
	.comm	_SPEED_100,8,3                  ## @SPEED_100
	.comm	_PORT_INTERFACE_RMII,4,2        ## @PORT_INTERFACE_RMII
	.comm	_PORT_INTERFACE_GMII,4,2        ## @PORT_INTERFACE_GMII
	.comm	_SPEED_1000,8,3                 ## @SPEED_1000
	.comm	_PORT_RGMII_ID_IN_ENABLE,4,2    ## @PORT_RGMII_ID_IN_ENABLE
	.comm	_PORT_RGMII_ID_OUT_ENABLE,4,2   ## @PORT_RGMII_ID_OUT_ENABLE
	.comm	_PHY_INTERFACE_MODE_RGMII_ID,4,2 ## @PHY_INTERFACE_MODE_RGMII_ID
	.comm	_PHY_INTERFACE_MODE_RGMII_RXID,4,2 ## @PHY_INTERFACE_MODE_RGMII_RXID
	.comm	_PHY_INTERFACE_MODE_RGMII_TXID,4,2 ## @PHY_INTERFACE_MODE_RGMII_TXID
	.comm	_PORT_INTERFACE_RGMII,4,2       ## @PORT_INTERFACE_RGMII
	.no_dead_strip	_ksz8795_port_setup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ksz8795_port_setup
_ksz8795_port_setup:                    ; @ksz8795_port_setup
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x19, x1
	mov	x20, x0
	ldr	x22, [x0, #24]
	sxtw	x23, w19
Lloh0:
	adrp	x8, _P_BCAST_STORM_CTRL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _P_BCAST_STORM_CTRL@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
Lloh3:
	adrp	x8, _PORT_BROADCAST_STORM@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PORT_BROADCAST_STORM@GOTPAGEOFF]
Lloh5:
	ldr	w3, [x8]
	mov	w4, #1
	bl	_ksz_port_cfg
	mov	x0, x20
	mov	x1, x19
	mov	w2, #4
	bl	_ksz8795_set_prio_queue
Lloh6:
	adrp	x24, _P_PRIO_CTRL@GOTPAGE
Lloh7:
	ldr	x24, [x24, _P_PRIO_CTRL@GOTPAGEOFF]
	ldr	w2, [x24]
Lloh8:
	adrp	x8, _PORT_DIFFSERV_ENABLE@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PORT_DIFFSERV_ENABLE@GOTPAGEOFF]
Lloh10:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w4, #0
	bl	_ksz_port_cfg
Lloh11:
	adrp	x8, _P_802_1P_CTRL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _P_802_1P_CTRL@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
Lloh14:
	adrp	x8, _PORT_802_1P_REMAPPING@GOTPAGE
Lloh15:
	ldr	x8, [x8, _PORT_802_1P_REMAPPING@GOTPAGEOFF]
Lloh16:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w4, #0
	bl	_ksz_port_cfg
	ldr	w2, [x24]
Lloh17:
	adrp	x8, _PORT_802_1P_ENABLE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _PORT_802_1P_ENABLE@GOTPAGEOFF]
Lloh19:
	ldr	w3, [x8]
	mov	x0, x20
	mov	x1, x19
	mov	w4, #1
	bl	_ksz_port_cfg
	cbz	w21, LBB0_6
; %bb.1:
Lloh20:
	adrp	x21, _REG_PORT_5_CTRL_6@GOTPAGE
Lloh21:
	ldr	x21, [x21, _REG_PORT_5_CTRL_6@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #12
	mov	x0, x20
	bl	_ksz_read8
Lloh22:
	adrp	x8, _PORT_INTERFACE_TYPE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _PORT_INTERFACE_TYPE@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	ldr	w9, [sp, #12]
Lloh25:
	adrp	x11, _PORT_GMII_1GPS_MODE@GOTPAGE
Lloh26:
	ldr	x11, [x11, _PORT_GMII_1GPS_MODE@GOTPAGEOFF]
	bic	w10, w9, w8
Lloh27:
	ldr	w8, [x11]
	bic	w2, w10, w8
	str	w2, [sp, #12]
	ldr	w9, [x20]
	cmp	w9, #130
	b.eq	LBB0_8
; %bb.2:
	cmp	w9, #129
	b.eq	LBB0_5
; %bb.3:
	cmp	w9, #128
	b.ne	LBB0_9
; %bb.4:
Lloh28:
	adrp	x8, _PORT_INTERFACE_RMII@GOTPAGE
Lloh29:
	ldr	x8, [x8, _PORT_INTERFACE_RMII@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	orr	w2, w8, w2
	str	w2, [sp, #12]
LBB0_5:
Lloh31:
	adrp	x8, _SPEED_100@GOTPAGE
Lloh32:
	ldr	x8, [x8, _SPEED_100@GOTPAGEOFF]
	b	LBB0_11
LBB0_6:
	ldr	w8, [x20, #12]
	add	x22, x22, x23, lsl #5
	ldr	w9, [x22]
	orr	w21, w9, w8
	mov	x0, x19
	bl	_BIT
	ldr	w8, [x20, #8]
	orr	w8, w8, w0
	str	w8, [x20, #8]
	ldr	x8, [x22, #16]
	cbz	x8, LBB0_13
; %bb.7:
	mov	x0, x19
	bl	_BIT
	ldr	w8, [x20, #16]
	orr	w8, w8, w0
	b	LBB0_12
LBB0_8:
Lloh33:
	adrp	x9, _PORT_INTERFACE_GMII@GOTPAGE
Lloh34:
	ldr	x9, [x9, _PORT_INTERFACE_GMII@GOTPAGEOFF]
	orr	w8, w8, w10
Lloh35:
	ldr	w9, [x9]
	b	LBB0_10
LBB0_9:
Lloh36:
	adrp	x10, _PORT_RGMII_ID_IN_ENABLE@GOTPAGE
Lloh37:
	ldr	x10, [x10, _PORT_RGMII_ID_IN_ENABLE@GOTPAGEOFF]
Lloh38:
	ldr	w10, [x10]
Lloh39:
	adrp	x11, _PORT_RGMII_ID_OUT_ENABLE@GOTPAGE
Lloh40:
	ldr	x11, [x11, _PORT_RGMII_ID_OUT_ENABLE@GOTPAGEOFF]
Lloh41:
	ldr	w11, [x11]
	orr	w12, w10, w11
Lloh42:
	adrp	x13, _PHY_INTERFACE_MODE_RGMII_ID@GOTPAGE
Lloh43:
	ldr	x13, [x13, _PHY_INTERFACE_MODE_RGMII_ID@GOTPAGEOFF]
	bic	w12, w2, w12
Lloh44:
	ldr	w13, [x13]
	cmp	w9, w13
	cset	w13, eq
Lloh45:
	adrp	x14, _PHY_INTERFACE_MODE_RGMII_RXID@GOTPAGE
Lloh46:
	ldr	x14, [x14, _PHY_INTERFACE_MODE_RGMII_RXID@GOTPAGEOFF]
Lloh47:
	ldr	w14, [x14]
	cmp	w9, w14
	cset	w14, eq
	orr	w14, w13, w14
	cmp	w14, #0
	csel	w10, w10, wzr, ne
	orr	w10, w12, w10
Lloh48:
	adrp	x12, _PHY_INTERFACE_MODE_RGMII_TXID@GOTPAGE
Lloh49:
	ldr	x12, [x12, _PHY_INTERFACE_MODE_RGMII_TXID@GOTPAGEOFF]
Lloh50:
	ldr	w12, [x12]
	cmp	w9, w12
	cset	w9, eq
	orr	w9, w13, w9
	cmp	w9, #0
	csel	w9, w11, wzr, ne
	orr	w9, w10, w9
Lloh51:
	adrp	x10, _PORT_INTERFACE_RGMII@GOTPAGE
Lloh52:
	ldr	x10, [x10, _PORT_INTERFACE_RGMII@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh53:
	ldr	w9, [x10]
LBB0_10:
	orr	w2, w9, w8
	str	w2, [sp, #12]
Lloh54:
	adrp	x8, _SPEED_1000@GOTPAGE
Lloh55:
	ldr	x8, [x8, _SPEED_1000@GOTPAGEOFF]
LBB0_11:
	ldr	x8, [x8]
	add	x22, x22, x23, lsl #5
	str	x8, [x22, #24]
	ldr	w1, [x21]
	mov	x0, x20
	bl	_ksz_write8
	mov	w8, #1
	str	w8, [x22, #8]
	ldr	w21, [x20, #4]
	ldr	w8, [x20, #12]
	str	w8, [x20, #8]
LBB0_12:
	str	w8, [x20, #16]
LBB0_13:
	mov	x0, x20
	mov	x1, x19
	mov	x2, x21
	bl	_ksz8795_cfg_port_member
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh54, Lloh55
	.cfi_endproc
                                        ; -- End function
	.comm	_P_BCAST_STORM_CTRL,4,2         ; @P_BCAST_STORM_CTRL
	.comm	_PORT_BROADCAST_STORM,4,2       ; @PORT_BROADCAST_STORM
	.comm	_P_PRIO_CTRL,4,2                ; @P_PRIO_CTRL
	.comm	_PORT_DIFFSERV_ENABLE,4,2       ; @PORT_DIFFSERV_ENABLE
	.comm	_P_802_1P_CTRL,4,2              ; @P_802_1P_CTRL
	.comm	_PORT_802_1P_REMAPPING,4,2      ; @PORT_802_1P_REMAPPING
	.comm	_PORT_802_1P_ENABLE,4,2         ; @PORT_802_1P_ENABLE
	.comm	_REG_PORT_5_CTRL_6,4,2          ; @REG_PORT_5_CTRL_6
	.comm	_PORT_INTERFACE_TYPE,4,2        ; @PORT_INTERFACE_TYPE
	.comm	_PORT_GMII_1GPS_MODE,4,2        ; @PORT_GMII_1GPS_MODE
	.comm	_SPEED_100,8,3                  ; @SPEED_100
	.comm	_PORT_INTERFACE_RMII,4,2        ; @PORT_INTERFACE_RMII
	.comm	_PORT_INTERFACE_GMII,4,2        ; @PORT_INTERFACE_GMII
	.comm	_SPEED_1000,8,3                 ; @SPEED_1000
	.comm	_PORT_RGMII_ID_IN_ENABLE,4,2    ; @PORT_RGMII_ID_IN_ENABLE
	.comm	_PORT_RGMII_ID_OUT_ENABLE,4,2   ; @PORT_RGMII_ID_OUT_ENABLE
	.comm	_PHY_INTERFACE_MODE_RGMII_ID,4,2 ; @PHY_INTERFACE_MODE_RGMII_ID
	.comm	_PHY_INTERFACE_MODE_RGMII_RXID,4,2 ; @PHY_INTERFACE_MODE_RGMII_RXID
	.comm	_PHY_INTERFACE_MODE_RGMII_TXID,4,2 ; @PHY_INTERFACE_MODE_RGMII_TXID
	.comm	_PORT_INTERFACE_RGMII,4,2       ; @PORT_INTERFACE_RGMII
	.no_dead_strip	_ksz8795_port_setup
.subsections_via_symbols
