	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function goya_hw_fini
_goya_hw_fini:                          ## @goya_hw_fini
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %r12
	cmpq	$0, 8(%rdi)
	jne	LBB0_1
## %bb.2:
	movq	_GOYA_RESET_TIMEOUT_MSEC@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_GOYA_PLDM_RESET_TIMEOUT_MSEC@GOTPCREL(%rip), %rax
LBB0_3:
	movq	16(%r12), %r13
	movl	(%rax), %r14d
	testl	%r15d, %r15d
	je	LBB0_4
## %bb.5:
	movq	_DRAM_PHYS_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_goya_set_ddr_bar_base
	movq	%r12, %rdi
	callq	_goya_disable_clk_rlx
	movq	%r12, %rdi
	callq	_goya_set_pll_refclk
	leaq	L_.str(%rip), %rbx
	movq	_RESET_ALL@GOTPCREL(%rip), %rax
	jmp	LBB0_6
LBB0_4:
	leaq	L_.str.1(%rip), %rbx
	movq	_DMA_MME_TPC_RESET@GOTPCREL(%rip), %rax
LBB0_6:
	movq	_mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	(%rax), %esi
	callq	_WREG32
	movl	(%r12), %edi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_dev_info
	movl	%r14d, %edi
	callq	_msleep
	movq	_mmPSOC_GLOBAL_CONF_BTM_FSM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_RREG32
	movl	%eax, %r14d
	movq	_PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK@GOTPCREL(%rip), %rax
	testl	%r14d, (%rax)
	je	LBB0_8
## %bb.7:
	movl	(%r12), %edi
	leaq	L_.str.2(%rip), %rsi
	movl	%r14d, %edx
	xorl	%eax, %eax
	callq	_dev_err
LBB0_8:
	testl	%r15d, %r15d
	je	LBB0_12
## %bb.9:
	movq	_mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$1, %esi
	shll	%cl, %esi
	callq	_WREG32
	movq	_mmPSOC_GLOBAL_CONF_SW_BTM_FSM@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$10, %esi
	shll	%cl, %esi
	callq	_WREG32
	movq	_HW_CAP_CPU@GOTPCREL(%rip), %rcx
	movq	_HW_CAP_CPU_Q@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	(%rcx), %eax
	movq	_HW_CAP_DDR_0@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_HW_CAP_DDR_1@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_HW_CAP_DMA@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_HW_CAP_MME@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_HW_CAP_MMU@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_HW_CAP_TPC_MBIST@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_HW_CAP_GOLDEN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_HW_CAP_TPC@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	notl	%eax
	andl	%eax, (%r13)
	movl	4(%r13), %edi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	cmpq	$0, 8(%r12)
	je	LBB0_10
LBB0_11:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_12:
	movq	_HW_CAP_DMA@GOTPCREL(%rip), %rax
	movq	_HW_CAP_MME@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_HW_CAP_GOLDEN@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_HW_CAP_TPC@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	notl	%ecx
	andl	%ecx, (%r13)
	movq	_mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_GOYA_ASYNC_EVENT_ID_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_WREG32                         ## TAILCALL
LBB0_10:
	movl	(%r12), %edi
	movq	_GOYA_CPU_TIMEOUT_USEC@GOTPCREL(%rip), %rbx
	movslq	(%rbx), %rax
	imulq	$1125899907, %rax, %rdx         ## imm = 0x431BDE83
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$50, %rdx
	addl	%eax, %edx
	leaq	L_.str.3(%rip), %rsi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_dev_info
	movq	_mmPSOC_GLOBAL_CONF_WARM_REBOOT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CPU_BOOT_STATUS_DRAM_RDY@GOTPCREL(%rip), %rax
	xorl	%ecx, %ecx
	cmpl	(%rax), %r14d
	sete	%cl
	movl	(%rbx), %r9d
	movq	%r12, %rdi
	movl	%r14d, %edx
	movl	$10000, %r8d                    ## imm = 0x2710
	callq	_hl_poll_timeout
	testl	%eax, %eax
	je	LBB0_11
## %bb.13:
	movl	(%r12), %edi
	leaq	L_.str.4(%rip), %rsi
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_err                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_GOYA_PLDM_RESET_TIMEOUT_MSEC,4,2 ## @GOYA_PLDM_RESET_TIMEOUT_MSEC
	.comm	_GOYA_RESET_TIMEOUT_MSEC,4,2    ## @GOYA_RESET_TIMEOUT_MSEC
	.comm	_DRAM_PHYS_BASE,4,2             ## @DRAM_PHYS_BASE
	.comm	_mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG,4,2 ## @mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG
	.comm	_RESET_ALL,4,2                  ## @RESET_ALL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Issued HARD reset command, going to wait %dms\n"

	.comm	_DMA_MME_TPC_RESET,4,2          ## @DMA_MME_TPC_RESET
L_.str.1:                               ## @.str.1
	.asciz	"Issued SOFT reset command, going to wait %dms\n"

	.comm	_mmPSOC_GLOBAL_CONF_BTM_FSM,4,2 ## @mmPSOC_GLOBAL_CONF_BTM_FSM
	.comm	_PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK,4,2 ## @PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK
L_.str.2:                               ## @.str.2
	.asciz	"Timeout while waiting for device to reset 0x%x\n"

	.comm	_HW_CAP_DMA,4,2                 ## @HW_CAP_DMA
	.comm	_HW_CAP_MME,4,2                 ## @HW_CAP_MME
	.comm	_HW_CAP_GOLDEN,4,2              ## @HW_CAP_GOLDEN
	.comm	_HW_CAP_TPC,4,2                 ## @HW_CAP_TPC
	.comm	_mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,4,2 ## @mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR
	.comm	_GOYA_ASYNC_EVENT_ID_SOFT_RESET,4,2 ## @GOYA_ASYNC_EVENT_ID_SOFT_RESET
	.comm	_mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START,4,2 ## @mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START
	.comm	_PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_SHIFT,4,2 ## @PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_SHIFT
	.comm	_mmPSOC_GLOBAL_CONF_SW_BTM_FSM,4,2 ## @mmPSOC_GLOBAL_CONF_SW_BTM_FSM
	.comm	_PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_SHIFT,4,2 ## @PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_SHIFT
	.comm	_HW_CAP_CPU,4,2                 ## @HW_CAP_CPU
	.comm	_HW_CAP_CPU_Q,4,2               ## @HW_CAP_CPU_Q
	.comm	_HW_CAP_DDR_0,4,2               ## @HW_CAP_DDR_0
	.comm	_HW_CAP_DDR_1,4,2               ## @HW_CAP_DDR_1
	.comm	_HW_CAP_MMU,4,2                 ## @HW_CAP_MMU
	.comm	_HW_CAP_TPC_MBIST,4,2           ## @HW_CAP_TPC_MBIST
L_.str.3:                               ## @.str.3
	.asciz	"Going to wait up to %ds for CPU boot loader\n"

	.comm	_GOYA_CPU_TIMEOUT_USEC,4,2      ## @GOYA_CPU_TIMEOUT_USEC
	.comm	_mmPSOC_GLOBAL_CONF_WARM_REBOOT,4,2 ## @mmPSOC_GLOBAL_CONF_WARM_REBOOT
	.comm	_CPU_BOOT_STATUS_DRAM_RDY,4,2   ## @CPU_BOOT_STATUS_DRAM_RDY
L_.str.4:                               ## @.str.4
	.asciz	"failed to wait for CPU boot loader\n"

	.no_dead_strip	_goya_hw_fini
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function goya_hw_fini
_goya_hw_fini:                          ; @goya_hw_fini
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _GOYA_RESET_TIMEOUT_MSEC@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GOYA_RESET_TIMEOUT_MSEC@GOTPAGEOFF]
	ldp	x9, x23, [x0, #8]
Lloh2:
	adrp	x10, _GOYA_PLDM_RESET_TIMEOUT_MSEC@GOTPAGE
Lloh3:
	ldr	x10, [x10, _GOYA_PLDM_RESET_TIMEOUT_MSEC@GOTPAGEOFF]
	cmp	x9, #0
	csel	x8, x8, x10, eq
	ldr	w20, [x8]
	cbz	w1, LBB0_2
; %bb.1:
Lloh4:
	adrp	x8, _DRAM_PHYS_BASE@GOTPAGE
Lloh5:
	ldr	x8, [x8, _DRAM_PHYS_BASE@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_goya_set_ddr_bar_base
	mov	x0, x19
	bl	_goya_disable_clk_rlx
	mov	x0, x19
	bl	_goya_set_pll_refclk
Lloh7:
	adrp	x22, l_.str@PAGE
Lloh8:
	add	x22, x22, l_.str@PAGEOFF
Lloh9:
	adrp	x8, _RESET_ALL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _RESET_ALL@GOTPAGEOFF]
	b	LBB0_3
LBB0_2:
Lloh11:
	adrp	x22, l_.str.1@PAGE
Lloh12:
	add	x22, x22, l_.str.1@PAGEOFF
Lloh13:
	adrp	x8, _DMA_MME_TPC_RESET@GOTPAGE
Lloh14:
	ldr	x8, [x8, _DMA_MME_TPC_RESET@GOTPAGEOFF]
LBB0_3:
Lloh15:
	adrp	x9, _mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG@GOTPAGE
Lloh16:
	ldr	x9, [x9, _mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x9]
	ldr	w1, [x8]
	bl	_WREG32
	ldr	w0, [x19]
	mov	x1, x22
	mov	x2, x20
	bl	_dev_info
	mov	x0, x20
	bl	_msleep
Lloh18:
	adrp	x8, _mmPSOC_GLOBAL_CONF_BTM_FSM@GOTPAGE
Lloh19:
	ldr	x8, [x8, _mmPSOC_GLOBAL_CONF_BTM_FSM@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	bl	_RREG32
	mov	x20, x0
Lloh21:
	adrp	x8, _PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_5
; %bb.4:
	ldr	w0, [x19]
	str	x20, [sp]
Lloh24:
	adrp	x1, l_.str.2@PAGE
Lloh25:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_dev_err
LBB0_5:
	cbz	w21, LBB0_8
; %bb.6:
Lloh26:
	adrp	x8, _mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START@GOTPAGE
Lloh27:
	ldr	x8, [x8, _mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
Lloh29:
	adrp	x8, _PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_SHIFT@GOTPAGE
Lloh30:
	ldr	x8, [x8, _PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_SHIFT@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	mov	w9, #1
	lsl	w1, w9, w8
	bl	_WREG32
Lloh32:
	adrp	x8, _mmPSOC_GLOBAL_CONF_SW_BTM_FSM@GOTPAGE
Lloh33:
	ldr	x8, [x8, _mmPSOC_GLOBAL_CONF_SW_BTM_FSM@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
Lloh35:
	adrp	x8, _PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_SHIFT@GOTPAGE
Lloh36:
	ldr	x8, [x8, _PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_SHIFT@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	mov	w9, #10
	lsl	w1, w9, w8
	bl	_WREG32
Lloh38:
	adrp	x8, _HW_CAP_CPU@GOTPAGE
Lloh39:
	ldr	x8, [x8, _HW_CAP_CPU@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
Lloh41:
	adrp	x9, _HW_CAP_CPU_Q@GOTPAGE
Lloh42:
	ldr	x9, [x9, _HW_CAP_CPU_Q@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh44:
	adrp	x9, _HW_CAP_DDR_0@GOTPAGE
Lloh45:
	ldr	x9, [x9, _HW_CAP_DDR_0@GOTPAGEOFF]
Lloh46:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh47:
	adrp	x9, _HW_CAP_DDR_1@GOTPAGE
Lloh48:
	ldr	x9, [x9, _HW_CAP_DDR_1@GOTPAGEOFF]
Lloh49:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh50:
	adrp	x9, _HW_CAP_DMA@GOTPAGE
Lloh51:
	ldr	x9, [x9, _HW_CAP_DMA@GOTPAGEOFF]
Lloh52:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh53:
	adrp	x9, _HW_CAP_MME@GOTPAGE
Lloh54:
	ldr	x9, [x9, _HW_CAP_MME@GOTPAGEOFF]
Lloh55:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh56:
	adrp	x9, _HW_CAP_MMU@GOTPAGE
Lloh57:
	ldr	x9, [x9, _HW_CAP_MMU@GOTPAGEOFF]
Lloh58:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh59:
	adrp	x9, _HW_CAP_TPC_MBIST@GOTPAGE
Lloh60:
	ldr	x9, [x9, _HW_CAP_TPC_MBIST@GOTPAGEOFF]
Lloh61:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh62:
	adrp	x9, _HW_CAP_GOLDEN@GOTPAGE
Lloh63:
	ldr	x9, [x9, _HW_CAP_GOLDEN@GOTPAGEOFF]
Lloh64:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh65:
	adrp	x9, _HW_CAP_TPC@GOTPAGE
Lloh66:
	ldr	x9, [x9, _HW_CAP_TPC@GOTPAGEOFF]
Lloh67:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldp	w9, w0, [x23]
	bic	w8, w9, w8
	str	w8, [x23]
	mov	w1, #0
	mov	w2, #4
	bl	_memset
	ldr	x8, [x19, #8]
	cbz	x8, LBB0_9
LBB0_7:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_8:
Lloh68:
	adrp	x8, _HW_CAP_DMA@GOTPAGE
Lloh69:
	ldr	x8, [x8, _HW_CAP_DMA@GOTPAGEOFF]
Lloh70:
	ldr	w8, [x8]
Lloh71:
	adrp	x9, _HW_CAP_MME@GOTPAGE
Lloh72:
	ldr	x9, [x9, _HW_CAP_MME@GOTPAGEOFF]
Lloh73:
	ldr	w9, [x9]
Lloh74:
	adrp	x10, _HW_CAP_GOLDEN@GOTPAGE
Lloh75:
	ldr	x10, [x10, _HW_CAP_GOLDEN@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh76:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh77:
	adrp	x9, _HW_CAP_TPC@GOTPAGE
Lloh78:
	ldr	x9, [x9, _HW_CAP_TPC@GOTPAGEOFF]
Lloh79:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [x23]
	bic	w8, w9, w8
	str	w8, [x23]
Lloh80:
	adrp	x8, _mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR@GOTPAGE
Lloh81:
	ldr	x8, [x8, _mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR@GOTPAGEOFF]
Lloh82:
	ldr	w0, [x8]
Lloh83:
	adrp	x8, _GOYA_ASYNC_EVENT_ID_SOFT_RESET@GOTPAGE
Lloh84:
	ldr	x8, [x8, _GOYA_ASYNC_EVENT_ID_SOFT_RESET@GOTPAGEOFF]
Lloh85:
	ldr	w1, [x8]
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_WREG32
LBB0_9:
	ldr	w0, [x19]
Lloh86:
	adrp	x21, _GOYA_CPU_TIMEOUT_USEC@GOTPAGE
Lloh87:
	ldr	x21, [x21, _GOYA_CPU_TIMEOUT_USEC@GOTPAGEOFF]
	ldrsw	x8, [x21]
	mov	w9, #56963
	movk	w9, #17179, lsl #16
	mul	x8, x8, x9
	lsr	x9, x8, #63
	asr	x8, x8, #50
	add	w2, w8, w9
Lloh88:
	adrp	x1, l_.str.3@PAGE
Lloh89:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_dev_info
Lloh90:
	adrp	x8, _mmPSOC_GLOBAL_CONF_WARM_REBOOT@GOTPAGE
Lloh91:
	ldr	x8, [x8, _mmPSOC_GLOBAL_CONF_WARM_REBOOT@GOTPAGEOFF]
Lloh92:
	ldr	w1, [x8]
Lloh93:
	adrp	x8, _CPU_BOOT_STATUS_DRAM_RDY@GOTPAGE
Lloh94:
	ldr	x8, [x8, _CPU_BOOT_STATUS_DRAM_RDY@GOTPAGEOFF]
Lloh95:
	ldr	w8, [x8]
	cmp	w20, w8
	cset	w3, eq
	ldr	w5, [x21]
	mov	x0, x19
	mov	x2, x20
	mov	w4, #10000
	bl	_hl_poll_timeout
	cbz	w0, LBB0_7
; %bb.10:
	ldr	w0, [x19]
Lloh96:
	adrp	x1, l_.str.4@PAGE
Lloh97:
	add	x1, x1, l_.str.4@PAGEOFF
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_dev_err
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh93, Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh90, Lloh91, Lloh92
	.loh AdrpAdd	Lloh88, Lloh89
	.loh AdrpLdrGot	Lloh86, Lloh87
	.loh AdrpAdd	Lloh96, Lloh97
	.cfi_endproc
                                        ; -- End function
	.comm	_GOYA_PLDM_RESET_TIMEOUT_MSEC,4,2 ; @GOYA_PLDM_RESET_TIMEOUT_MSEC
	.comm	_GOYA_RESET_TIMEOUT_MSEC,4,2    ; @GOYA_RESET_TIMEOUT_MSEC
	.comm	_DRAM_PHYS_BASE,4,2             ; @DRAM_PHYS_BASE
	.comm	_mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG,4,2 ; @mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG
	.comm	_RESET_ALL,4,2                  ; @RESET_ALL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Issued HARD reset command, going to wait %dms\n"

	.comm	_DMA_MME_TPC_RESET,4,2          ; @DMA_MME_TPC_RESET
l_.str.1:                               ; @.str.1
	.asciz	"Issued SOFT reset command, going to wait %dms\n"

	.comm	_mmPSOC_GLOBAL_CONF_BTM_FSM,4,2 ; @mmPSOC_GLOBAL_CONF_BTM_FSM
	.comm	_PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK,4,2 ; @PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK
l_.str.2:                               ; @.str.2
	.asciz	"Timeout while waiting for device to reset 0x%x\n"

	.comm	_HW_CAP_DMA,4,2                 ; @HW_CAP_DMA
	.comm	_HW_CAP_MME,4,2                 ; @HW_CAP_MME
	.comm	_HW_CAP_GOLDEN,4,2              ; @HW_CAP_GOLDEN
	.comm	_HW_CAP_TPC,4,2                 ; @HW_CAP_TPC
	.comm	_mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,4,2 ; @mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR
	.comm	_GOYA_ASYNC_EVENT_ID_SOFT_RESET,4,2 ; @GOYA_ASYNC_EVENT_ID_SOFT_RESET
	.comm	_mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START,4,2 ; @mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START
	.comm	_PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_SHIFT,4,2 ; @PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_SHIFT
	.comm	_mmPSOC_GLOBAL_CONF_SW_BTM_FSM,4,2 ; @mmPSOC_GLOBAL_CONF_SW_BTM_FSM
	.comm	_PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_SHIFT,4,2 ; @PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_SHIFT
	.comm	_HW_CAP_CPU,4,2                 ; @HW_CAP_CPU
	.comm	_HW_CAP_CPU_Q,4,2               ; @HW_CAP_CPU_Q
	.comm	_HW_CAP_DDR_0,4,2               ; @HW_CAP_DDR_0
	.comm	_HW_CAP_DDR_1,4,2               ; @HW_CAP_DDR_1
	.comm	_HW_CAP_MMU,4,2                 ; @HW_CAP_MMU
	.comm	_HW_CAP_TPC_MBIST,4,2           ; @HW_CAP_TPC_MBIST
l_.str.3:                               ; @.str.3
	.asciz	"Going to wait up to %ds for CPU boot loader\n"

	.comm	_GOYA_CPU_TIMEOUT_USEC,4,2      ; @GOYA_CPU_TIMEOUT_USEC
	.comm	_mmPSOC_GLOBAL_CONF_WARM_REBOOT,4,2 ; @mmPSOC_GLOBAL_CONF_WARM_REBOOT
	.comm	_CPU_BOOT_STATUS_DRAM_RDY,4,2   ; @CPU_BOOT_STATUS_DRAM_RDY
l_.str.4:                               ; @.str.4
	.asciz	"failed to wait for CPU boot loader\n"

	.no_dead_strip	_goya_hw_fini
.subsections_via_symbols
