	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pm8xxx_irq_set_type
_pm8xxx_irq_set_type:                   ## @pm8xxx_irq_set_type
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %rbx
	callq	_irq_data_get_irq_chip_data
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_irqd_to_hwirq
	movl	%eax, %esi
	andl	$7, %eax
	movq	_PM_IRQF_BITS_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_PM_IRQF_MASK_ALL@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	(%r14), %rcx
	movl	%eax, (%rcx,%rsi,4)
	movq	_IRQF_TRIGGER_RISING@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	movq	_IRQF_TRIGGER_FALLING@GOTPCREL(%rip), %r8
	movl	(%r8), %edi
	movl	%edi, %edx
	orl	%ebx, %edx
	testl	%r15d, %edx
	je	LBB0_5
## %bb.1:
	testl	%r15d, %ebx
	je	LBB0_3
## %bb.2:
	movq	_PM_IRQF_MASK_RE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	notl	%edx
	andl	%edx, %eax
	movl	%eax, (%rcx,%rsi,4)
	movl	(%r8), %edi
LBB0_3:
	testl	%r15d, %edi
	jne	LBB0_4
	jmp	LBB0_8
LBB0_5:
	movq	_PM_IRQF_LVL_SEL@GOTPCREL(%rip), %rdx
	orl	(%rdx), %eax
	movl	%eax, (%rcx,%rsi,4)
	movq	_IRQF_TRIGGER_HIGH@GOTPCREL(%rip), %rdx
	testl	%r15d, (%rdx)
	jne	LBB0_6
LBB0_4:
	movq	_PM_IRQF_MASK_FE@GOTPCREL(%rip), %rdx
	jmp	LBB0_7
LBB0_6:
	movq	_PM_IRQF_MASK_RE@GOTPCREL(%rip), %rdx
LBB0_7:
	movl	(%rdx), %edx
	notl	%edx
	andl	%edx, %eax
	movl	%eax, (%rcx,%rsi,4)
LBB0_8:
	shrl	$3, %esi
	movq	_PM_IRQF_CLR@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	%r14, %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	movl	%eax, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_pm8xxx_config_irq              ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PM_IRQF_BITS_SHIFT,4,2         ## @PM_IRQF_BITS_SHIFT
	.comm	_PM_IRQF_MASK_ALL,4,2           ## @PM_IRQF_MASK_ALL
	.comm	_IRQF_TRIGGER_RISING,4,2        ## @IRQF_TRIGGER_RISING
	.comm	_IRQF_TRIGGER_FALLING,4,2       ## @IRQF_TRIGGER_FALLING
	.comm	_PM_IRQF_MASK_RE,4,2            ## @PM_IRQF_MASK_RE
	.comm	_PM_IRQF_MASK_FE,4,2            ## @PM_IRQF_MASK_FE
	.comm	_PM_IRQF_LVL_SEL,4,2            ## @PM_IRQF_LVL_SEL
	.comm	_IRQF_TRIGGER_HIGH,4,2          ## @IRQF_TRIGGER_HIGH
	.comm	_PM_IRQF_CLR,4,2                ## @PM_IRQF_CLR
	.no_dead_strip	_pm8xxx_irq_set_type
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pm8xxx_irq_set_type
_pm8xxx_irq_set_type:                   ; @pm8xxx_irq_set_type
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x21, x0
	bl	_irq_data_get_irq_chip_data
	mov	x19, x0
	mov	x0, x21
	bl	_irqd_to_hwirq
	and	w8, w0, #0x7
Lloh0:
	adrp	x9, _PM_IRQF_BITS_SHIFT@GOTPAGE
Lloh1:
	ldr	x9, [x9, _PM_IRQF_BITS_SHIFT@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	lsl	w8, w8, w9
Lloh3:
	adrp	x9, _PM_IRQF_MASK_ALL@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PM_IRQF_MASK_ALL@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	x10, [x19]
	mov	w9, w0
	str	w8, [x10, w0, uxtw #2]
Lloh6:
	adrp	x11, _IRQF_TRIGGER_RISING@GOTPAGE
Lloh7:
	ldr	x11, [x11, _IRQF_TRIGGER_RISING@GOTPAGEOFF]
Lloh8:
	ldr	w13, [x11]
Lloh9:
	adrp	x12, _IRQF_TRIGGER_FALLING@GOTPAGE
Lloh10:
	ldr	x12, [x12, _IRQF_TRIGGER_FALLING@GOTPAGEOFF]
	ldr	w11, [x12]
	orr	w14, w11, w13
	tst	w14, w20
	b.eq	LBB0_5
; %bb.1:
	tst	w13, w20
	b.eq	LBB0_3
; %bb.2:
Lloh11:
	adrp	x11, _PM_IRQF_MASK_RE@GOTPAGE
Lloh12:
	ldr	x11, [x11, _PM_IRQF_MASK_RE@GOTPAGEOFF]
Lloh13:
	ldr	w11, [x11]
	bic	w8, w8, w11
	str	w8, [x10, x9, lsl #2]
	ldr	w11, [x12]
LBB0_3:
	tst	w11, w20
	b.eq	LBB0_7
; %bb.4:
Lloh14:
	adrp	x11, _PM_IRQF_MASK_FE@GOTPAGE
Lloh15:
	ldr	x11, [x11, _PM_IRQF_MASK_FE@GOTPAGEOFF]
	b	LBB0_6
LBB0_5:
Lloh16:
	adrp	x11, _PM_IRQF_LVL_SEL@GOTPAGE
Lloh17:
	ldr	x11, [x11, _PM_IRQF_LVL_SEL@GOTPAGEOFF]
Lloh18:
	ldr	w11, [x11]
	orr	w8, w11, w8
	str	w8, [x10, x9, lsl #2]
Lloh19:
	adrp	x11, _IRQF_TRIGGER_HIGH@GOTPAGE
Lloh20:
	ldr	x11, [x11, _IRQF_TRIGGER_HIGH@GOTPAGEOFF]
Lloh21:
	ldr	w11, [x11]
Lloh22:
	adrp	x12, _PM_IRQF_MASK_RE@GOTPAGE
Lloh23:
	ldr	x12, [x12, _PM_IRQF_MASK_RE@GOTPAGEOFF]
Lloh24:
	adrp	x13, _PM_IRQF_MASK_FE@GOTPAGE
Lloh25:
	ldr	x13, [x13, _PM_IRQF_MASK_FE@GOTPAGEOFF]
	tst	w11, w20
	csel	x11, x13, x12, eq
LBB0_6:
	ldr	w11, [x11]
	bic	w8, w8, w11
	str	w8, [x10, x9, lsl #2]
LBB0_7:
Lloh26:
	adrp	x10, _PM_IRQF_CLR@GOTPAGE
Lloh27:
	ldr	x10, [x10, _PM_IRQF_CLR@GOTPAGEOFF]
	ubfx	x1, x9, #3, #29
Lloh28:
	ldr	w9, [x10]
	orr	w2, w9, w8
	mov	x0, x19
                                        ; kill: def $w1 killed $w1 killed $x1
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_pm8xxx_config_irq
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.cfi_endproc
                                        ; -- End function
	.comm	_PM_IRQF_BITS_SHIFT,4,2         ; @PM_IRQF_BITS_SHIFT
	.comm	_PM_IRQF_MASK_ALL,4,2           ; @PM_IRQF_MASK_ALL
	.comm	_IRQF_TRIGGER_RISING,4,2        ; @IRQF_TRIGGER_RISING
	.comm	_IRQF_TRIGGER_FALLING,4,2       ; @IRQF_TRIGGER_FALLING
	.comm	_PM_IRQF_MASK_RE,4,2            ; @PM_IRQF_MASK_RE
	.comm	_PM_IRQF_MASK_FE,4,2            ; @PM_IRQF_MASK_FE
	.comm	_PM_IRQF_LVL_SEL,4,2            ; @PM_IRQF_LVL_SEL
	.comm	_IRQF_TRIGGER_HIGH,4,2          ; @IRQF_TRIGGER_HIGH
	.comm	_PM_IRQF_CLR,4,2                ; @PM_IRQF_CLR
	.no_dead_strip	_pm8xxx_irq_set_type
.subsections_via_symbols
