	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function arm_lpae_prot_to_pte
_arm_lpae_prot_to_pte:                  ## @arm_lpae_prot_to_pte
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movl	%esi, %eax
	movq	(%rdi), %rcx
	movq	_ARM_64_LPAE_S1@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	je	LBB0_2
## %bb.1:
	movq	_ARM_32_LPAE_S1@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	je	LBB0_2
## %bb.7:
	movq	_ARM_LPAE_PTE_HAP_FAULT@GOTPCREL(%rip), %rsi
	movq	_IOMMU_READ@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	andl	%eax, %edx
	je	LBB0_9
## %bb.8:
	movq	_ARM_LPAE_PTE_HAP_READ@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
LBB0_9:
	orl	(%rsi), %edx
	movq	_IOMMU_WRITE@GOTPCREL(%rip), %rsi
	testl	%eax, (%rsi)
	je	LBB0_12
## %bb.10:
	movq	_ARM_LPAE_PTE_HAP_WRITE@GOTPCREL(%rip), %rsi
	jmp	LBB0_11
LBB0_2:
	movq	_ARM_LPAE_PTE_nG@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	movq	_IOMMU_WRITE@GOTPCREL(%rip), %rsi
	testl	%eax, (%rsi)
	jne	LBB0_5
## %bb.3:
	movq	_IOMMU_READ@GOTPCREL(%rip), %rsi
	testl	%eax, (%rsi)
	je	LBB0_5
## %bb.4:
	movq	_ARM_LPAE_PTE_AP_RDONLY@GOTPCREL(%rip), %rsi
	orl	(%rsi), %edx
LBB0_5:
	movq	_IOMMU_PRIV@GOTPCREL(%rip), %rsi
	testl	%eax, (%rsi)
	jne	LBB0_12
## %bb.6:
	movq	_ARM_LPAE_PTE_AP_UNPRIV@GOTPCREL(%rip), %rsi
LBB0_11:
	orl	(%rsi), %edx
LBB0_12:
	movq	_ARM_64_LPAE_S2@GOTPCREL(%rip), %rdi
	movq	_IOMMU_MMIO@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	cmpq	(%rdi), %rcx
	je	LBB0_14
## %bb.13:
	movq	_ARM_32_LPAE_S2@GOTPCREL(%rip), %rdi
	cmpq	(%rdi), %rcx
	je	LBB0_14
## %bb.19:
	testl	%eax, %esi
	je	LBB0_21
## %bb.20:
	movq	_ARM_LPAE_MAIR_ATTR_IDX_DEV@GOTPCREL(%rip), %rcx
	jmp	LBB0_25
LBB0_14:
	testl	%eax, %esi
	je	LBB0_16
## %bb.15:
	movq	_ARM_LPAE_PTE_MEMATTR_DEV@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	jmp	LBB0_26
LBB0_21:
	movq	_IOMMU_CACHE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_23
## %bb.22:
	movq	_ARM_LPAE_MAIR_ATTR_IDX_CACHE@GOTPCREL(%rip), %rcx
	jmp	LBB0_25
LBB0_16:
	movq	_IOMMU_CACHE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_18
## %bb.17:
	movq	_ARM_LPAE_PTE_MEMATTR_OIWB@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	jmp	LBB0_26
LBB0_23:
	movq	_IOMMU_QCOM_SYS_CACHE@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_26
## %bb.24:
	movq	_ARM_LPAE_MAIR_ATTR_IDX_INC_OCACHE@GOTPCREL(%rip), %rcx
LBB0_25:
	movl	(%rcx), %esi
	movq	_ARM_LPAE_PTE_ATTRINDX_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	orl	%esi, %edx
LBB0_26:
	movq	_IOMMU_NOEXEC@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	je	LBB0_28
## %bb.27:
	movq	_ARM_LPAE_PTE_XN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_28:
	orl	%edx, %eax
	popq	%rbp
	retq
LBB0_18:
	movq	_ARM_LPAE_PTE_MEMATTR_NC@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	jmp	LBB0_26
	.cfi_endproc
                                        ## -- End function
	.comm	_ARM_64_LPAE_S1,8,3             ## @ARM_64_LPAE_S1
	.comm	_ARM_32_LPAE_S1,8,3             ## @ARM_32_LPAE_S1
	.comm	_ARM_LPAE_PTE_nG,4,2            ## @ARM_LPAE_PTE_nG
	.comm	_IOMMU_WRITE,4,2                ## @IOMMU_WRITE
	.comm	_IOMMU_READ,4,2                 ## @IOMMU_READ
	.comm	_ARM_LPAE_PTE_AP_RDONLY,4,2     ## @ARM_LPAE_PTE_AP_RDONLY
	.comm	_IOMMU_PRIV,4,2                 ## @IOMMU_PRIV
	.comm	_ARM_LPAE_PTE_AP_UNPRIV,4,2     ## @ARM_LPAE_PTE_AP_UNPRIV
	.comm	_ARM_LPAE_PTE_HAP_FAULT,4,2     ## @ARM_LPAE_PTE_HAP_FAULT
	.comm	_ARM_LPAE_PTE_HAP_READ,4,2      ## @ARM_LPAE_PTE_HAP_READ
	.comm	_ARM_LPAE_PTE_HAP_WRITE,4,2     ## @ARM_LPAE_PTE_HAP_WRITE
	.comm	_ARM_64_LPAE_S2,8,3             ## @ARM_64_LPAE_S2
	.comm	_ARM_32_LPAE_S2,8,3             ## @ARM_32_LPAE_S2
	.comm	_IOMMU_MMIO,4,2                 ## @IOMMU_MMIO
	.comm	_ARM_LPAE_PTE_MEMATTR_DEV,4,2   ## @ARM_LPAE_PTE_MEMATTR_DEV
	.comm	_IOMMU_CACHE,4,2                ## @IOMMU_CACHE
	.comm	_ARM_LPAE_PTE_MEMATTR_OIWB,4,2  ## @ARM_LPAE_PTE_MEMATTR_OIWB
	.comm	_ARM_LPAE_PTE_MEMATTR_NC,4,2    ## @ARM_LPAE_PTE_MEMATTR_NC
	.comm	_ARM_LPAE_MAIR_ATTR_IDX_DEV,4,2 ## @ARM_LPAE_MAIR_ATTR_IDX_DEV
	.comm	_ARM_LPAE_PTE_ATTRINDX_SHIFT,4,2 ## @ARM_LPAE_PTE_ATTRINDX_SHIFT
	.comm	_ARM_LPAE_MAIR_ATTR_IDX_CACHE,4,2 ## @ARM_LPAE_MAIR_ATTR_IDX_CACHE
	.comm	_IOMMU_QCOM_SYS_CACHE,4,2       ## @IOMMU_QCOM_SYS_CACHE
	.comm	_ARM_LPAE_MAIR_ATTR_IDX_INC_OCACHE,4,2 ## @ARM_LPAE_MAIR_ATTR_IDX_INC_OCACHE
	.comm	_IOMMU_NOEXEC,4,2               ## @IOMMU_NOEXEC
	.comm	_ARM_LPAE_PTE_XN,4,2            ## @ARM_LPAE_PTE_XN
	.no_dead_strip	_arm_lpae_prot_to_pte
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function arm_lpae_prot_to_pte
_arm_lpae_prot_to_pte:                  ; @arm_lpae_prot_to_pte
	.cfi_startproc
; %bb.0:
	ldr	x9, [x0]
Lloh0:
	adrp	x8, _ARM_64_LPAE_S1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ARM_64_LPAE_S1@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
Lloh3:
	adrp	x10, _ARM_32_LPAE_S1@GOTPAGE
Lloh4:
	ldr	x10, [x10, _ARM_32_LPAE_S1@GOTPAGEOFF]
Lloh5:
	ldr	x10, [x10]
	cmp	x9, x8
	ccmp	x9, x10, #4, ne
	b.ne	LBB0_6
; %bb.1:
Lloh6:
	adrp	x8, _ARM_LPAE_PTE_nG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ARM_LPAE_PTE_nG@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x10, _IOMMU_WRITE@GOTPAGE
Lloh10:
	ldr	x10, [x10, _IOMMU_WRITE@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	tst	w10, w1
	b.ne	LBB0_4
; %bb.2:
Lloh12:
	adrp	x10, _IOMMU_READ@GOTPAGE
Lloh13:
	ldr	x10, [x10, _IOMMU_READ@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
	tst	w10, w1
	b.eq	LBB0_4
; %bb.3:
Lloh15:
	adrp	x10, _ARM_LPAE_PTE_AP_RDONLY@GOTPAGE
Lloh16:
	ldr	x10, [x10, _ARM_LPAE_PTE_AP_RDONLY@GOTPAGEOFF]
Lloh17:
	ldr	w10, [x10]
	orr	w8, w10, w8
LBB0_4:
Lloh18:
	adrp	x10, _IOMMU_PRIV@GOTPAGE
Lloh19:
	ldr	x10, [x10, _IOMMU_PRIV@GOTPAGEOFF]
Lloh20:
	ldr	w10, [x10]
	tst	w10, w1
	b.ne	LBB0_9
; %bb.5:
Lloh21:
	adrp	x10, _ARM_LPAE_PTE_AP_UNPRIV@GOTPAGE
Lloh22:
	ldr	x10, [x10, _ARM_LPAE_PTE_AP_UNPRIV@GOTPAGEOFF]
	b	LBB0_8
LBB0_6:
Lloh23:
	adrp	x8, _ARM_LPAE_PTE_HAP_FAULT@GOTPAGE
Lloh24:
	ldr	x8, [x8, _ARM_LPAE_PTE_HAP_FAULT@GOTPAGEOFF]
Lloh25:
	adrp	x10, _IOMMU_READ@GOTPAGE
Lloh26:
	ldr	x10, [x10, _IOMMU_READ@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
Lloh28:
	ldr	w10, [x10]
Lloh29:
	adrp	x11, _ARM_LPAE_PTE_HAP_READ@GOTPAGE
Lloh30:
	ldr	x11, [x11, _ARM_LPAE_PTE_HAP_READ@GOTPAGEOFF]
Lloh31:
	ldr	w11, [x11]
	tst	w10, w1
	csel	w10, wzr, w11, eq
	orr	w8, w10, w8
Lloh32:
	adrp	x10, _IOMMU_WRITE@GOTPAGE
Lloh33:
	ldr	x10, [x10, _IOMMU_WRITE@GOTPAGEOFF]
Lloh34:
	ldr	w10, [x10]
	tst	w10, w1
	b.eq	LBB0_9
; %bb.7:
Lloh35:
	adrp	x10, _ARM_LPAE_PTE_HAP_WRITE@GOTPAGE
Lloh36:
	ldr	x10, [x10, _ARM_LPAE_PTE_HAP_WRITE@GOTPAGEOFF]
LBB0_8:
	ldr	w10, [x10]
	orr	w8, w10, w8
LBB0_9:
Lloh37:
	adrp	x10, _ARM_64_LPAE_S2@GOTPAGE
Lloh38:
	ldr	x10, [x10, _ARM_64_LPAE_S2@GOTPAGEOFF]
Lloh39:
	ldr	x11, [x10]
Lloh40:
	adrp	x10, _ARM_32_LPAE_S2@GOTPAGE
Lloh41:
	ldr	x10, [x10, _ARM_32_LPAE_S2@GOTPAGEOFF]
Lloh42:
	ldr	x12, [x10]
Lloh43:
	adrp	x10, _IOMMU_MMIO@GOTPAGE
Lloh44:
	ldr	x10, [x10, _IOMMU_MMIO@GOTPAGEOFF]
Lloh45:
	ldr	w10, [x10]
	and	w10, w10, w1
	cmp	x9, x11
	ccmp	x9, x12, #4, ne
	b.ne	LBB0_12
; %bb.10:
	cbz	w10, LBB0_14
; %bb.11:
Lloh46:
	adrp	x9, _ARM_LPAE_PTE_MEMATTR_DEV@GOTPAGE
Lloh47:
	ldr	x9, [x9, _ARM_LPAE_PTE_MEMATTR_DEV@GOTPAGEOFF]
Lloh48:
	ldr	w9, [x9]
	b	LBB0_22
LBB0_12:
	cbz	w10, LBB0_16
; %bb.13:
Lloh49:
	adrp	x9, _ARM_LPAE_MAIR_ATTR_IDX_DEV@GOTPAGE
Lloh50:
	ldr	x9, [x9, _ARM_LPAE_MAIR_ATTR_IDX_DEV@GOTPAGEOFF]
	b	LBB0_21
LBB0_14:
Lloh51:
	adrp	x9, _IOMMU_CACHE@GOTPAGE
Lloh52:
	ldr	x9, [x9, _IOMMU_CACHE@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	tst	w9, w1
	b.eq	LBB0_18
; %bb.15:
Lloh54:
	adrp	x9, _ARM_LPAE_PTE_MEMATTR_OIWB@GOTPAGE
Lloh55:
	ldr	x9, [x9, _ARM_LPAE_PTE_MEMATTR_OIWB@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
	b	LBB0_22
LBB0_16:
Lloh57:
	adrp	x9, _IOMMU_CACHE@GOTPAGE
Lloh58:
	ldr	x9, [x9, _IOMMU_CACHE@GOTPAGEOFF]
Lloh59:
	ldr	w9, [x9]
	tst	w9, w1
	b.eq	LBB0_19
; %bb.17:
Lloh60:
	adrp	x9, _ARM_LPAE_MAIR_ATTR_IDX_CACHE@GOTPAGE
Lloh61:
	ldr	x9, [x9, _ARM_LPAE_MAIR_ATTR_IDX_CACHE@GOTPAGEOFF]
	b	LBB0_21
LBB0_18:
Lloh62:
	adrp	x9, _ARM_LPAE_PTE_MEMATTR_NC@GOTPAGE
Lloh63:
	ldr	x9, [x9, _ARM_LPAE_PTE_MEMATTR_NC@GOTPAGEOFF]
Lloh64:
	ldr	w9, [x9]
	b	LBB0_22
LBB0_19:
Lloh65:
	adrp	x9, _IOMMU_QCOM_SYS_CACHE@GOTPAGE
Lloh66:
	ldr	x9, [x9, _IOMMU_QCOM_SYS_CACHE@GOTPAGEOFF]
Lloh67:
	ldr	w9, [x9]
	tst	w9, w1
	b.eq	LBB0_23
; %bb.20:
Lloh68:
	adrp	x9, _ARM_LPAE_MAIR_ATTR_IDX_INC_OCACHE@GOTPAGE
Lloh69:
	ldr	x9, [x9, _ARM_LPAE_MAIR_ATTR_IDX_INC_OCACHE@GOTPAGEOFF]
LBB0_21:
	ldr	w9, [x9]
Lloh70:
	adrp	x10, _ARM_LPAE_PTE_ATTRINDX_SHIFT@GOTPAGE
Lloh71:
	ldr	x10, [x10, _ARM_LPAE_PTE_ATTRINDX_SHIFT@GOTPAGEOFF]
Lloh72:
	ldr	w10, [x10]
	lsl	w9, w9, w10
LBB0_22:
	orr	w8, w9, w8
LBB0_23:
Lloh73:
	adrp	x9, _IOMMU_NOEXEC@GOTPAGE
Lloh74:
	ldr	x9, [x9, _IOMMU_NOEXEC@GOTPAGEOFF]
Lloh75:
	adrp	x10, _ARM_LPAE_PTE_XN@GOTPAGE
Lloh76:
	ldr	x10, [x10, _ARM_LPAE_PTE_XN@GOTPAGEOFF]
Lloh77:
	ldr	w9, [x9]
Lloh78:
	ldr	w10, [x10]
	tst	w9, w1
	csel	w9, wzr, w10, eq
	orr	w0, w9, w8
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh27
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh77
	.cfi_endproc
                                        ; -- End function
	.comm	_ARM_64_LPAE_S1,8,3             ; @ARM_64_LPAE_S1
	.comm	_ARM_32_LPAE_S1,8,3             ; @ARM_32_LPAE_S1
	.comm	_ARM_LPAE_PTE_nG,4,2            ; @ARM_LPAE_PTE_nG
	.comm	_IOMMU_WRITE,4,2                ; @IOMMU_WRITE
	.comm	_IOMMU_READ,4,2                 ; @IOMMU_READ
	.comm	_ARM_LPAE_PTE_AP_RDONLY,4,2     ; @ARM_LPAE_PTE_AP_RDONLY
	.comm	_IOMMU_PRIV,4,2                 ; @IOMMU_PRIV
	.comm	_ARM_LPAE_PTE_AP_UNPRIV,4,2     ; @ARM_LPAE_PTE_AP_UNPRIV
	.comm	_ARM_LPAE_PTE_HAP_FAULT,4,2     ; @ARM_LPAE_PTE_HAP_FAULT
	.comm	_ARM_LPAE_PTE_HAP_READ,4,2      ; @ARM_LPAE_PTE_HAP_READ
	.comm	_ARM_LPAE_PTE_HAP_WRITE,4,2     ; @ARM_LPAE_PTE_HAP_WRITE
	.comm	_ARM_64_LPAE_S2,8,3             ; @ARM_64_LPAE_S2
	.comm	_ARM_32_LPAE_S2,8,3             ; @ARM_32_LPAE_S2
	.comm	_IOMMU_MMIO,4,2                 ; @IOMMU_MMIO
	.comm	_ARM_LPAE_PTE_MEMATTR_DEV,4,2   ; @ARM_LPAE_PTE_MEMATTR_DEV
	.comm	_IOMMU_CACHE,4,2                ; @IOMMU_CACHE
	.comm	_ARM_LPAE_PTE_MEMATTR_OIWB,4,2  ; @ARM_LPAE_PTE_MEMATTR_OIWB
	.comm	_ARM_LPAE_PTE_MEMATTR_NC,4,2    ; @ARM_LPAE_PTE_MEMATTR_NC
	.comm	_ARM_LPAE_MAIR_ATTR_IDX_DEV,4,2 ; @ARM_LPAE_MAIR_ATTR_IDX_DEV
	.comm	_ARM_LPAE_PTE_ATTRINDX_SHIFT,4,2 ; @ARM_LPAE_PTE_ATTRINDX_SHIFT
	.comm	_ARM_LPAE_MAIR_ATTR_IDX_CACHE,4,2 ; @ARM_LPAE_MAIR_ATTR_IDX_CACHE
	.comm	_IOMMU_QCOM_SYS_CACHE,4,2       ; @IOMMU_QCOM_SYS_CACHE
	.comm	_ARM_LPAE_MAIR_ATTR_IDX_INC_OCACHE,4,2 ; @ARM_LPAE_MAIR_ATTR_IDX_INC_OCACHE
	.comm	_IOMMU_NOEXEC,4,2               ; @IOMMU_NOEXEC
	.comm	_ARM_LPAE_PTE_XN,4,2            ; @ARM_LPAE_PTE_XN
	.no_dead_strip	_arm_lpae_prot_to_pte
.subsections_via_symbols
