	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdhci_pci_o2_fujin2_pci_init
_sdhci_pci_o2_fujin2_pci_init:          ## @sdhci_pci_o2_fujin2_pci_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movl	(%rdi), %edi
	movq	_O2_SD_DEV_CTRL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_11
## %bb.1:
	movl	$-28673, %edx                   ## imm = 0x8FFF
	andl	-28(%rbp), %edx
	movl	%edx, -28(%rbp)
	movl	(%r15), %edi
	movl	(%rbx), %esi
	callq	_pci_write_config_dword
	movl	(%r15), %edi
	movq	_O2_SD_MISC_REG5@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_11
## %bb.2:
	movl	$-527361, %edx                  ## imm = 0xFFF7F3FF
	andl	-28(%rbp), %edx
	orl	$1024, %edx                     ## imm = 0x400
	movl	%edx, -28(%rbp)
	movl	(%r15), %edi
	movl	(%r14), %esi
	callq	_pci_write_config_dword
	movl	(%r15), %edi
	movq	_O2_SD_TEST_REG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_11
## %bb.3:
	movl	-28(%rbp), %edx
	orl	$16, %edx
	movl	%edx, -28(%rbp)
	movl	(%r15), %edi
	movl	(%rbx), %esi
	callq	_pci_write_config_dword
	movl	(%r15), %edi
	movq	_O2_SD_DELAY_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$9362, %edx                     ## imm = 0x2492
	callq	_pci_write_config_dword
	movl	(%r15), %edi
	movq	_O2_SD_LD0_CTRL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_11
## %bb.4:
	movl	$-12289, %edx                   ## imm = 0xCFFF
	andl	-28(%rbp), %edx
	movl	%edx, -28(%rbp)
	movl	(%r15), %edi
	movl	(%rbx), %esi
	callq	_pci_write_config_dword
	movl	(%r15), %edi
	movq	_O2_SD_CAP_REG0@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_11
## %bb.5:
	movl	$-511, %edx                     ## imm = 0xFE01
	andl	-28(%rbp), %edx
	orl	$204, %edx
	movl	%edx, -28(%rbp)
	movl	(%r15), %edi
	movl	(%r14), %esi
	callq	_pci_write_config_dword
	movl	(%r15), %edi
	movq	_O2_SD_TUNING_CTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_11
## %bb.6:
	movl	$-256, %edx
	andl	-28(%rbp), %edx
	orl	$102, %edx
	movl	%edx, -28(%rbp)
	movl	(%r15), %edi
	movl	(%r14), %esi
	callq	_pci_write_config_dword
	movl	(%r15), %edi
	movq	_O2_SD_UHS2_L1_CTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_11
## %bb.7:
	movl	$-253, %edx
	andl	-28(%rbp), %edx
	orl	$132, %edx
	movl	%edx, -28(%rbp)
	movl	(%r15), %edi
	movl	(%r14), %esi
	callq	_pci_write_config_dword
	movl	(%r15), %edi
	movq	_O2_SD_FUNC_REG3@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_11
## %bb.8:
	movl	$-1075838977, %edx              ## imm = 0xBFDFFFFF
	andl	-28(%rbp), %edx
	movl	%edx, -28(%rbp)
	movl	(%r15), %edi
	movl	(%rbx), %esi
	callq	_pci_write_config_dword
	movl	(%r15), %edi
	movq	_O2_SD_CAPS@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_11
## %bb.9:
	movl	$268435455, %edx                ## imm = 0xFFFFFFF
	andl	-28(%rbp), %edx
	orl	$805306368, %edx                ## imm = 0x30000000
	movl	%edx, -28(%rbp)
	movl	(%r15), %edi
	movl	(%r14), %esi
	callq	_pci_write_config_dword
	movl	(%r15), %edi
	movq	_O2_SD_MISC_CTRL4@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_11
## %bb.10:
	movl	$-983041, %edx                  ## imm = 0xFFF0FFFF
	andl	-28(%rbp), %edx
	orl	$524288, %edx                   ## imm = 0x80000
	movl	%edx, -28(%rbp)
	movl	(%r15), %edi
	movl	(%r14), %esi
	callq	_pci_write_config_dword
LBB0_11:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_O2_SD_DEV_CTRL,4,2             ## @O2_SD_DEV_CTRL
	.comm	_O2_SD_MISC_REG5,4,2            ## @O2_SD_MISC_REG5
	.comm	_O2_SD_TEST_REG,4,2             ## @O2_SD_TEST_REG
	.comm	_O2_SD_DELAY_CTRL,4,2           ## @O2_SD_DELAY_CTRL
	.comm	_O2_SD_LD0_CTRL,4,2             ## @O2_SD_LD0_CTRL
	.comm	_O2_SD_CAP_REG0,4,2             ## @O2_SD_CAP_REG0
	.comm	_O2_SD_TUNING_CTRL,4,2          ## @O2_SD_TUNING_CTRL
	.comm	_O2_SD_UHS2_L1_CTRL,4,2         ## @O2_SD_UHS2_L1_CTRL
	.comm	_O2_SD_FUNC_REG3,4,2            ## @O2_SD_FUNC_REG3
	.comm	_O2_SD_CAPS,4,2                 ## @O2_SD_CAPS
	.comm	_O2_SD_MISC_CTRL4,4,2           ## @O2_SD_MISC_CTRL4
	.no_dead_strip	_sdhci_pci_o2_fujin2_pci_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdhci_pci_o2_fujin2_pci_init
_sdhci_pci_o2_fujin2_pci_init:          ; @sdhci_pci_o2_fujin2_pci_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x0]
Lloh0:
	adrp	x20, _O2_SD_DEV_CTRL@GOTPAGE
Lloh1:
	ldr	x20, [x20, _O2_SD_DEV_CTRL@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_11
; %bb.1:
	ldr	w8, [sp, #12]
	and	w2, w8, #0xffff8fff
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_dword
	ldr	w0, [x19]
Lloh2:
	adrp	x20, _O2_SD_MISC_REG5@GOTPAGE
Lloh3:
	ldr	x20, [x20, _O2_SD_MISC_REG5@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_11
; %bb.2:
	ldr	w8, [sp, #12]
	mov	w9, #62463
	movk	w9, #65527, lsl #16
	and	w8, w8, w9
	orr	w2, w8, #0x400
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_dword
	ldr	w0, [x19]
Lloh4:
	adrp	x20, _O2_SD_TEST_REG@GOTPAGE
Lloh5:
	ldr	x20, [x20, _O2_SD_TEST_REG@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_11
; %bb.3:
	ldr	w8, [sp, #12]
	orr	w2, w8, #0x10
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_dword
	ldr	w0, [x19]
Lloh6:
	adrp	x8, _O2_SD_DELAY_CTRL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _O2_SD_DELAY_CTRL@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	w2, #9362
	bl	_pci_write_config_dword
	ldr	w0, [x19]
Lloh9:
	adrp	x20, _O2_SD_LD0_CTRL@GOTPAGE
Lloh10:
	ldr	x20, [x20, _O2_SD_LD0_CTRL@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_11
; %bb.4:
	ldr	w8, [sp, #12]
	and	w2, w8, #0xffffcfff
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_dword
	ldr	w0, [x19]
Lloh11:
	adrp	x21, _O2_SD_CAP_REG0@GOTPAGE
Lloh12:
	ldr	x21, [x21, _O2_SD_CAP_REG0@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_11
; %bb.5:
	ldr	w2, [sp, #12]
	mov	w20, #102
	bfi	w2, w20, #1, #8
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x21]
	bl	_pci_write_config_dword
	ldr	w0, [x19]
Lloh13:
	adrp	x21, _O2_SD_TUNING_CTRL@GOTPAGE
Lloh14:
	ldr	x21, [x21, _O2_SD_TUNING_CTRL@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_11
; %bb.6:
	ldr	w2, [sp, #12]
	bfxil	w2, w20, #0, #8
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x21]
	bl	_pci_write_config_dword
	ldr	w0, [x19]
Lloh15:
	adrp	x20, _O2_SD_UHS2_L1_CTRL@GOTPAGE
Lloh16:
	ldr	x20, [x20, _O2_SD_UHS2_L1_CTRL@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_11
; %bb.7:
	ldr	w2, [sp, #12]
	mov	w8, #33
	bfi	w2, w8, #2, #6
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_dword
	ldr	w0, [x19]
Lloh17:
	adrp	x20, _O2_SD_FUNC_REG3@GOTPAGE
Lloh18:
	ldr	x20, [x20, _O2_SD_FUNC_REG3@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_11
; %bb.8:
	ldr	w8, [sp, #12]
	mov	w9, #-1075838977
	and	w2, w8, w9
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_dword
	ldr	w0, [x19]
Lloh19:
	adrp	x20, _O2_SD_CAPS@GOTPAGE
Lloh20:
	ldr	x20, [x20, _O2_SD_CAPS@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_11
; %bb.9:
	ldr	w8, [sp, #12]
	mov	w2, #805306368
	bfxil	w2, w8, #0, #28
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_dword
	ldr	w0, [x19]
Lloh21:
	adrp	x20, _O2_SD_MISC_CTRL4@GOTPAGE
Lloh22:
	ldr	x20, [x20, _O2_SD_MISC_CTRL4@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_11
; %bb.10:
	ldr	w8, [sp, #12]
	and	w8, w8, #0xfff0ffff
	orr	w2, w8, #0x80000
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_dword
LBB0_11:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh21, Lloh22
	.cfi_endproc
                                        ; -- End function
	.comm	_O2_SD_DEV_CTRL,4,2             ; @O2_SD_DEV_CTRL
	.comm	_O2_SD_MISC_REG5,4,2            ; @O2_SD_MISC_REG5
	.comm	_O2_SD_TEST_REG,4,2             ; @O2_SD_TEST_REG
	.comm	_O2_SD_DELAY_CTRL,4,2           ; @O2_SD_DELAY_CTRL
	.comm	_O2_SD_LD0_CTRL,4,2             ; @O2_SD_LD0_CTRL
	.comm	_O2_SD_CAP_REG0,4,2             ; @O2_SD_CAP_REG0
	.comm	_O2_SD_TUNING_CTRL,4,2          ; @O2_SD_TUNING_CTRL
	.comm	_O2_SD_UHS2_L1_CTRL,4,2         ; @O2_SD_UHS2_L1_CTRL
	.comm	_O2_SD_FUNC_REG3,4,2            ; @O2_SD_FUNC_REG3
	.comm	_O2_SD_CAPS,4,2                 ; @O2_SD_CAPS
	.comm	_O2_SD_MISC_CTRL4,4,2           ; @O2_SD_MISC_CTRL4
	.no_dead_strip	_sdhci_pci_o2_fujin2_pci_init
.subsections_via_symbols
