	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_attn_int_asserted
_bnx2x_attn_int_asserted:               ## @bnx2x_attn_int_asserted
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r12d
	movq	%rdi, %r14
	callq	_BP_PORT
	movl	%eax, %ebx
	testl	%eax, %eax
	movq	_MISC_REG_AEU_MASK_ATTN_FUNC_1@GOTPCREL(%rip), %rax
	cmoveq	_MISC_REG_AEU_MASK_ATTN_FUNC_0@GOTPCREL(%rip), %rax
	movq	_NIG_REG_MASK_INTERRUPT_PORT1@GOTPCREL(%rip), %rcx
	cmoveq	_NIG_REG_MASK_INTERRUPT_PORT0@GOTPCREL(%rip), %rcx
	movl	(%rax), %r13d
	movl	(%rcx), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	%r12d, %r15d
	testl	%r12d, (%r14)
	je	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rdi
	callq	_BNX2X_ERR
LBB0_2:
	movq	_HW_LOCK_RESOURCE_PORT0_ATT_MASK@GOTPCREL(%rip), %rax
	movl	%ebx, -48(%rbp)                 ## 4-byte Spill
	movslq	%ebx, %r12
	movq	(%rax), %rsi
	addq	%r12, %rsi
	movq	%r14, %rdi
	callq	_bnx2x_acquire_hw_lock
	movq	%r14, %rdi
	movl	%r13d, %esi
	callq	_REG_RD
	movl	%r13d, -56(%rbp)                ## 4-byte Spill
	movl	%eax, %r13d
	movq	_NETIF_MSG_HW@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str.1(%rip), %rsi
	movl	$0, -52(%rbp)                   ## 4-byte Folded Spill
	movl	%r13d, %edx
	movl	%r15d, %ebx
	movl	%r15d, %ecx
	xorl	%eax, %eax
	callq	_DP
	notl	%r15d
	orl	$-1024, %r15d                   ## imm = 0xFC00
	andl	%r13d, %r15d
	movl	%ebx, %r13d
	movq	_NETIF_MSG_HW@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	leaq	L_.str.2(%rip), %rsi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	_DP
	movq	%r14, %rdi
	movl	-56(%rbp), %esi                 ## 4-byte Reload
	movl	%r15d, %edx
	callq	_REG_WR
	movq	_HW_LOCK_RESOURCE_PORT0_ATT_MASK@GOTPCREL(%rip), %rax
	addq	(%rax), %r12
	movq	%r14, %rdi
	movq	%r12, %rsi
	movq	%rbx, %r12
	callq	_bnx2x_release_hw_lock
	movl	(%rbx), %edi
	movl	(%r14), %edx
	leaq	L_.str.3(%rip), %rsi
	xorl	%eax, %eax
	callq	_DP
	movl	(%r14), %edx
	orl	%r13d, %edx
	movl	%edx, (%r14)
	movl	(%rbx), %edi
	leaq	L_.str.4(%rip), %rsi
	xorl	%eax, %eax
	callq	_DP
	movq	_ATTN_HARD_WIRED_MASK@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_28
## %bb.3:
	movq	_ATTN_NIG_FOR_FUNC@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	testl	%r13d, (%rax)
	je	LBB0_6
## %bb.4:
	movq	%r14, %rdi
	callq	_bnx2x_acquire_phy_lock
	movq	%r14, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_REG_RD
	testl	%eax, %eax
	je	LBB0_6
## %bb.5:
	movl	%eax, %ebx
	movq	%r14, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	xorl	%edx, %edx
	callq	_REG_WR
	movq	%r14, %rdi
	callq	_bnx2x_link_attn
	movl	%ebx, %r15d
LBB0_6:
	movq	_ATTN_SW_TIMER_4_FUNC@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_8
## %bb.7:
	movl	(%r12), %edi
	leaq	L_.str.5(%rip), %rsi
	xorl	%eax, %eax
	callq	_DP
LBB0_8:
	movq	_GPIO_2_FUNC@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_10
## %bb.9:
	movl	(%r12), %edi
	leaq	L_.str.6(%rip), %rsi
	xorl	%eax, %eax
	callq	_DP
LBB0_10:
	movq	_GPIO_3_FUNC@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_12
## %bb.11:
	movl	(%r12), %edi
	leaq	L_.str.7(%rip), %rsi
	xorl	%eax, %eax
	callq	_DP
LBB0_12:
	movq	_GPIO_4_FUNC@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_14
## %bb.13:
	movl	(%r12), %edi
	leaq	L_.str.8(%rip), %rsi
	xorl	%eax, %eax
	callq	_DP
LBB0_14:
	cmpl	$0, -48(%rbp)                   ## 4-byte Folded Reload
	movl	%r15d, -52(%rbp)                ## 4-byte Spill
	je	LBB0_15
## %bb.21:
	movq	_ATTN_GENERAL_ATTN_4@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_23
## %bb.22:
	movl	(%r12), %edi
	leaq	L_.str.12(%rip), %rsi
	xorl	%eax, %eax
	callq	_DP
	movq	_MISC_REG_AEU_GENERAL_ATTN_4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
LBB0_23:
	movq	_ATTN_GENERAL_ATTN_5@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_25
## %bb.24:
	movl	(%r12), %edi
	leaq	L_.str.13(%rip), %rsi
	xorl	%eax, %eax
	callq	_DP
	movq	_MISC_REG_AEU_GENERAL_ATTN_5@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
LBB0_25:
	movq	_ATTN_GENERAL_ATTN_6@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_28
## %bb.26:
	movq	_MISC_REG_AEU_GENERAL_ATTN_6@GOTPCREL(%rip), %rbx
	leaq	L_.str.14(%rip), %rsi
	jmp	LBB0_27
LBB0_15:
	movq	_ATTN_GENERAL_ATTN_1@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_17
## %bb.16:
	movl	(%r12), %edi
	leaq	L_.str.9(%rip), %rsi
	xorl	%eax, %eax
	callq	_DP
	movq	_MISC_REG_AEU_GENERAL_ATTN_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
LBB0_17:
	movq	_ATTN_GENERAL_ATTN_2@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_19
## %bb.18:
	movl	(%r12), %edi
	leaq	L_.str.10(%rip), %rsi
	xorl	%eax, %eax
	callq	_DP
	movq	_MISC_REG_AEU_GENERAL_ATTN_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
LBB0_19:
	movq	_ATTN_GENERAL_ATTN_3@GOTPCREL(%rip), %rax
	testl	%r13d, (%rax)
	je	LBB0_28
## %bb.20:
	movq	_MISC_REG_AEU_GENERAL_ATTN_3@GOTPCREL(%rip), %rbx
	leaq	L_.str.11(%rip), %rsi
LBB0_27:
	movl	(%r12), %edi
	xorl	%eax, %eax
	callq	_DP
	movl	(%rbx), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
LBB0_28:
	movq	8(%r14), %rax
	movq	_INT_BLOCK_HC@GOTPCREL(%rip), %r15
	cmpq	(%r15), %rax
	jne	LBB0_30
## %bb.29:
	movq	_HC_REG_COMMAND_REG@GOTPCREL(%rip), %rax
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	shll	$5, %ebx
	addl	(%rax), %ebx
	movq	_COMMAND_REG_ATTN_BITS_SET@GOTPCREL(%rip), %rax
	addl	(%rax), %ebx
	leaq	L_.str.16(%rip), %rcx
	jmp	LBB0_31
LBB0_30:
	movq	_BAR_IGU_INTMEM@GOTPCREL(%rip), %rax
	movq	_IGU_CMD_ATTN_BIT_SET_UPPER@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	shll	$3, %ebx
	addl	(%rax), %ebx
	leaq	L_.str.17(%rip), %rcx
LBB0_31:
	movl	(%r12), %edi
	leaq	L_.str.15(%rip), %rsi
	movl	%r13d, %edx
	movl	%ebx, %r8d
	xorl	%eax, %eax
	callq	_DP
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%r13d, %edx
	callq	_REG_WR
	movq	_ATTN_NIG_FOR_FUNC@GOTPCREL(%rip), %r12
	testl	%r13d, (%r12)
	je	LBB0_40
## %bb.32:
	movq	8(%r14), %rax
	cmpq	(%r15), %rax
	je	LBB0_39
## %bb.33:
	xorl	%ebx, %ebx
	movq	_IGU_REG_ATTENTION_ACK_BITS@GOTPCREL(%rip), %r15
	movq	_MAX_IGU_ATTN_ACK_TO@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_34:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_REG_RD
	testl	%eax, (%r12)
	jne	LBB0_36
## %bb.35:                              ##   in Loop: Header=BB0_34 Depth=1
	incl	%ebx
	cmpl	(%r13), %ebx
	jl	LBB0_34
LBB0_36:
	testl	%eax, %eax
	jne	LBB0_38
## %bb.37:
	movq	_NETIF_MSG_HW@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str.18(%rip), %rsi
	xorl	%eax, %eax
	callq	_DP
LBB0_38:
	xorl	%eax, %eax
	callq	_barrier
LBB0_39:
	movq	%r14, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	-52(%rbp), %edx                 ## 4-byte Reload
	callq	_REG_WR
	movq	%r14, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_bnx2x_release_phy_lock         ## TAILCALL
LBB0_40:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MISC_REG_AEU_MASK_ATTN_FUNC_1,4,2 ## @MISC_REG_AEU_MASK_ATTN_FUNC_1
	.comm	_MISC_REG_AEU_MASK_ATTN_FUNC_0,4,2 ## @MISC_REG_AEU_MASK_ATTN_FUNC_0
	.comm	_NIG_REG_MASK_INTERRUPT_PORT1,4,2 ## @NIG_REG_MASK_INTERRUPT_PORT1
	.comm	_NIG_REG_MASK_INTERRUPT_PORT0,4,2 ## @NIG_REG_MASK_INTERRUPT_PORT0
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"IGU ERROR\n"

	.comm	_HW_LOCK_RESOURCE_PORT0_ATT_MASK,8,3 ## @HW_LOCK_RESOURCE_PORT0_ATT_MASK
	.comm	_NETIF_MSG_HW,4,2               ## @NETIF_MSG_HW
L_.str.1:                               ## @.str.1
	.asciz	"aeu_mask %x  newly asserted %x\n"

L_.str.2:                               ## @.str.2
	.asciz	"new mask %x\n"

L_.str.3:                               ## @.str.3
	.asciz	"attn_state %x\n"

L_.str.4:                               ## @.str.4
	.asciz	"new state %x\n"

	.comm	_ATTN_HARD_WIRED_MASK,4,2       ## @ATTN_HARD_WIRED_MASK
	.comm	_ATTN_NIG_FOR_FUNC,4,2          ## @ATTN_NIG_FOR_FUNC
	.comm	_ATTN_SW_TIMER_4_FUNC,4,2       ## @ATTN_SW_TIMER_4_FUNC
L_.str.5:                               ## @.str.5
	.asciz	"ATTN_SW_TIMER_4_FUNC!\n"

	.comm	_GPIO_2_FUNC,4,2                ## @GPIO_2_FUNC
L_.str.6:                               ## @.str.6
	.asciz	"GPIO_2_FUNC!\n"

	.comm	_GPIO_3_FUNC,4,2                ## @GPIO_3_FUNC
L_.str.7:                               ## @.str.7
	.asciz	"GPIO_3_FUNC!\n"

	.comm	_GPIO_4_FUNC,4,2                ## @GPIO_4_FUNC
L_.str.8:                               ## @.str.8
	.asciz	"GPIO_4_FUNC!\n"

	.comm	_ATTN_GENERAL_ATTN_1,4,2        ## @ATTN_GENERAL_ATTN_1
L_.str.9:                               ## @.str.9
	.asciz	"ATTN_GENERAL_ATTN_1!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_1,4,2 ## @MISC_REG_AEU_GENERAL_ATTN_1
	.comm	_ATTN_GENERAL_ATTN_2,4,2        ## @ATTN_GENERAL_ATTN_2
L_.str.10:                              ## @.str.10
	.asciz	"ATTN_GENERAL_ATTN_2!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_2,4,2 ## @MISC_REG_AEU_GENERAL_ATTN_2
	.comm	_ATTN_GENERAL_ATTN_3,4,2        ## @ATTN_GENERAL_ATTN_3
L_.str.11:                              ## @.str.11
	.asciz	"ATTN_GENERAL_ATTN_3!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_3,4,2 ## @MISC_REG_AEU_GENERAL_ATTN_3
	.comm	_ATTN_GENERAL_ATTN_4,4,2        ## @ATTN_GENERAL_ATTN_4
L_.str.12:                              ## @.str.12
	.asciz	"ATTN_GENERAL_ATTN_4!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_4,4,2 ## @MISC_REG_AEU_GENERAL_ATTN_4
	.comm	_ATTN_GENERAL_ATTN_5,4,2        ## @ATTN_GENERAL_ATTN_5
L_.str.13:                              ## @.str.13
	.asciz	"ATTN_GENERAL_ATTN_5!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_5,4,2 ## @MISC_REG_AEU_GENERAL_ATTN_5
	.comm	_ATTN_GENERAL_ATTN_6,4,2        ## @ATTN_GENERAL_ATTN_6
L_.str.14:                              ## @.str.14
	.asciz	"ATTN_GENERAL_ATTN_6!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_6,4,2 ## @MISC_REG_AEU_GENERAL_ATTN_6
	.comm	_INT_BLOCK_HC,8,3               ## @INT_BLOCK_HC
	.comm	_HC_REG_COMMAND_REG,4,2         ## @HC_REG_COMMAND_REG
	.comm	_COMMAND_REG_ATTN_BITS_SET,4,2  ## @COMMAND_REG_ATTN_BITS_SET
	.comm	_BAR_IGU_INTMEM,4,2             ## @BAR_IGU_INTMEM
	.comm	_IGU_CMD_ATTN_BIT_SET_UPPER,4,2 ## @IGU_CMD_ATTN_BIT_SET_UPPER
L_.str.15:                              ## @.str.15
	.asciz	"about to mask 0x%08x at %s addr 0x%x\n"

L_.str.16:                              ## @.str.16
	.asciz	"HC"

L_.str.17:                              ## @.str.17
	.asciz	"IGU"

	.comm	_IGU_REG_ATTENTION_ACK_BITS,4,2 ## @IGU_REG_ATTENTION_ACK_BITS
	.comm	_MAX_IGU_ATTN_ACK_TO,4,2        ## @MAX_IGU_ATTN_ACK_TO
L_.str.18:                              ## @.str.18
	.asciz	"Failed to verify IGU ack on time\n"

	.no_dead_strip	_bnx2x_attn_int_asserted
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_attn_int_asserted
_bnx2x_attn_int_asserted:               ; @bnx2x_attn_int_asserted
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x1
	mov	x19, x0
	bl	_BP_PORT
	mov	x22, x0
Lloh0:
	adrp	x8, _MISC_REG_AEU_MASK_ATTN_FUNC_1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _MISC_REG_AEU_MASK_ATTN_FUNC_1@GOTPAGEOFF]
Lloh2:
	adrp	x9, _MISC_REG_AEU_MASK_ATTN_FUNC_0@GOTPAGE
Lloh3:
	ldr	x9, [x9, _MISC_REG_AEU_MASK_ATTN_FUNC_0@GOTPAGEOFF]
	cmp	w0, #0
	csel	x8, x9, x8, eq
	ldr	w23, [x8]
Lloh4:
	adrp	x8, _NIG_REG_MASK_INTERRUPT_PORT1@GOTPAGE
Lloh5:
	ldr	x8, [x8, _NIG_REG_MASK_INTERRUPT_PORT1@GOTPAGEOFF]
Lloh6:
	adrp	x9, _NIG_REG_MASK_INTERRUPT_PORT0@GOTPAGE
Lloh7:
	ldr	x9, [x9, _NIG_REG_MASK_INTERRUPT_PORT0@GOTPAGEOFF]
	csel	x8, x9, x8, eq
	ldr	w20, [x8]
	ldr	w8, [x19]
	tst	w8, w21
	b.eq	LBB0_2
; %bb.1:
Lloh8:
	adrp	x0, l_.str@PAGE
Lloh9:
	add	x0, x0, l_.str@PAGEOFF
	bl	_BNX2X_ERR
LBB0_2:
Lloh10:
	adrp	x26, _HW_LOCK_RESOURCE_PORT0_ATT_MASK@GOTPAGE
Lloh11:
	ldr	x26, [x26, _HW_LOCK_RESOURCE_PORT0_ATT_MASK@GOTPAGEOFF]
	ldr	x8, [x26]
	sxtw	x27, w22
	add	x1, x8, x27
	mov	x0, x19
	bl	_bnx2x_acquire_hw_lock
	mov	x0, x19
	mov	x1, x23
	bl	_REG_RD
	mov	x24, x0
Lloh12:
	adrp	x25, _NETIF_MSG_HW@GOTPAGE
Lloh13:
	ldr	x25, [x25, _NETIF_MSG_HW@GOTPAGEOFF]
	ldr	w0, [x25]
	stp	x24, x21, [sp]
Lloh14:
	adrp	x1, l_.str.1@PAGE
Lloh15:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_DP
	mvn	w8, w21
	orr	w8, w8, #0xfffffc00
	and	w24, w24, w8
	ldr	w0, [x25]
	str	x24, [sp]
Lloh16:
	adrp	x1, l_.str.2@PAGE
Lloh17:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_DP
	mov	x0, x19
	mov	x1, x23
	mov	x2, x24
	bl	_REG_WR
	ldr	x8, [x26]
	add	x1, x8, x27
	mov	x0, x19
	bl	_bnx2x_release_hw_lock
	ldr	w0, [x25]
	ldr	w8, [x19]
	str	x8, [sp]
Lloh18:
	adrp	x1, l_.str.3@PAGE
Lloh19:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_DP
	ldr	w8, [x19]
	orr	w8, w8, w21
	str	w8, [x19]
	ldr	w0, [x25]
	str	x8, [sp]
Lloh20:
	adrp	x1, l_.str.4@PAGE
Lloh21:
	add	x1, x1, l_.str.4@PAGEOFF
	bl	_DP
Lloh22:
	adrp	x8, _ATTN_HARD_WIRED_MASK@GOTPAGE
Lloh23:
	ldr	x8, [x8, _ATTN_HARD_WIRED_MASK@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
Lloh25:
	adrp	x24, _ATTN_NIG_FOR_FUNC@GOTPAGE
Lloh26:
	ldr	x24, [x24, _ATTN_NIG_FOR_FUNC@GOTPAGEOFF]
	tst	w8, w21
	b.eq	LBB0_6
; %bb.3:
	ldr	w8, [x24]
	tst	w8, w21
	b.eq	LBB0_7
; %bb.4:
	mov	x0, x19
	bl	_bnx2x_acquire_phy_lock
	mov	x0, x19
	mov	x1, x20
	bl	_REG_RD
	mov	x23, x0
	cbz	w0, LBB0_8
; %bb.5:
	mov	x0, x19
	mov	x1, x20
	mov	w2, #0
	bl	_REG_WR
	mov	x0, x19
	bl	_bnx2x_link_attn
	b	LBB0_8
LBB0_6:
	mov	w23, #0
	b	LBB0_30
LBB0_7:
	mov	w23, #0
LBB0_8:
Lloh27:
	adrp	x8, _ATTN_SW_TIMER_4_FUNC@GOTPAGE
Lloh28:
	ldr	x8, [x8, _ATTN_SW_TIMER_4_FUNC@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_10
; %bb.9:
	ldr	w0, [x25]
Lloh30:
	adrp	x1, l_.str.5@PAGE
Lloh31:
	add	x1, x1, l_.str.5@PAGEOFF
	bl	_DP
LBB0_10:
Lloh32:
	adrp	x8, _GPIO_2_FUNC@GOTPAGE
Lloh33:
	ldr	x8, [x8, _GPIO_2_FUNC@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_12
; %bb.11:
	ldr	w0, [x25]
Lloh35:
	adrp	x1, l_.str.6@PAGE
Lloh36:
	add	x1, x1, l_.str.6@PAGEOFF
	bl	_DP
LBB0_12:
Lloh37:
	adrp	x8, _GPIO_3_FUNC@GOTPAGE
Lloh38:
	ldr	x8, [x8, _GPIO_3_FUNC@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_14
; %bb.13:
	ldr	w0, [x25]
Lloh40:
	adrp	x1, l_.str.7@PAGE
Lloh41:
	add	x1, x1, l_.str.7@PAGEOFF
	bl	_DP
LBB0_14:
Lloh42:
	adrp	x8, _GPIO_4_FUNC@GOTPAGE
Lloh43:
	ldr	x8, [x8, _GPIO_4_FUNC@GOTPAGEOFF]
Lloh44:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_16
; %bb.15:
	ldr	w0, [x25]
Lloh45:
	adrp	x1, l_.str.8@PAGE
Lloh46:
	add	x1, x1, l_.str.8@PAGEOFF
	bl	_DP
LBB0_16:
	cbz	w22, LBB0_23
; %bb.17:
Lloh47:
	adrp	x8, _ATTN_GENERAL_ATTN_4@GOTPAGE
Lloh48:
	ldr	x8, [x8, _ATTN_GENERAL_ATTN_4@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_19
; %bb.18:
	ldr	w0, [x25]
Lloh50:
	adrp	x1, l_.str.12@PAGE
Lloh51:
	add	x1, x1, l_.str.12@PAGEOFF
	bl	_DP
Lloh52:
	adrp	x8, _MISC_REG_AEU_GENERAL_ATTN_4@GOTPAGE
Lloh53:
	ldr	x8, [x8, _MISC_REG_AEU_GENERAL_ATTN_4@GOTPAGEOFF]
Lloh54:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
LBB0_19:
Lloh55:
	adrp	x8, _ATTN_GENERAL_ATTN_5@GOTPAGE
Lloh56:
	ldr	x8, [x8, _ATTN_GENERAL_ATTN_5@GOTPAGEOFF]
Lloh57:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_21
; %bb.20:
	ldr	w0, [x25]
Lloh58:
	adrp	x1, l_.str.13@PAGE
Lloh59:
	add	x1, x1, l_.str.13@PAGEOFF
	bl	_DP
Lloh60:
	adrp	x8, _MISC_REG_AEU_GENERAL_ATTN_5@GOTPAGE
Lloh61:
	ldr	x8, [x8, _MISC_REG_AEU_GENERAL_ATTN_5@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
LBB0_21:
Lloh63:
	adrp	x8, _ATTN_GENERAL_ATTN_6@GOTPAGE
Lloh64:
	ldr	x8, [x8, _ATTN_GENERAL_ATTN_6@GOTPAGEOFF]
Lloh65:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_30
; %bb.22:
Lloh66:
	adrp	x26, _MISC_REG_AEU_GENERAL_ATTN_6@GOTPAGE
Lloh67:
	ldr	x26, [x26, _MISC_REG_AEU_GENERAL_ATTN_6@GOTPAGEOFF]
Lloh68:
	adrp	x1, l_.str.14@PAGE
Lloh69:
	add	x1, x1, l_.str.14@PAGEOFF
	b	LBB0_29
LBB0_23:
Lloh70:
	adrp	x8, _ATTN_GENERAL_ATTN_1@GOTPAGE
Lloh71:
	ldr	x8, [x8, _ATTN_GENERAL_ATTN_1@GOTPAGEOFF]
Lloh72:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_25
; %bb.24:
	ldr	w0, [x25]
Lloh73:
	adrp	x1, l_.str.9@PAGE
Lloh74:
	add	x1, x1, l_.str.9@PAGEOFF
	bl	_DP
Lloh75:
	adrp	x8, _MISC_REG_AEU_GENERAL_ATTN_1@GOTPAGE
Lloh76:
	ldr	x8, [x8, _MISC_REG_AEU_GENERAL_ATTN_1@GOTPAGEOFF]
Lloh77:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
LBB0_25:
Lloh78:
	adrp	x8, _ATTN_GENERAL_ATTN_2@GOTPAGE
Lloh79:
	ldr	x8, [x8, _ATTN_GENERAL_ATTN_2@GOTPAGEOFF]
Lloh80:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_27
; %bb.26:
	ldr	w0, [x25]
Lloh81:
	adrp	x1, l_.str.10@PAGE
Lloh82:
	add	x1, x1, l_.str.10@PAGEOFF
	bl	_DP
Lloh83:
	adrp	x8, _MISC_REG_AEU_GENERAL_ATTN_2@GOTPAGE
Lloh84:
	ldr	x8, [x8, _MISC_REG_AEU_GENERAL_ATTN_2@GOTPAGEOFF]
Lloh85:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
LBB0_27:
Lloh86:
	adrp	x8, _ATTN_GENERAL_ATTN_3@GOTPAGE
Lloh87:
	ldr	x8, [x8, _ATTN_GENERAL_ATTN_3@GOTPAGEOFF]
Lloh88:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_30
; %bb.28:
Lloh89:
	adrp	x26, _MISC_REG_AEU_GENERAL_ATTN_3@GOTPAGE
Lloh90:
	ldr	x26, [x26, _MISC_REG_AEU_GENERAL_ATTN_3@GOTPAGEOFF]
Lloh91:
	adrp	x1, l_.str.11@PAGE
Lloh92:
	add	x1, x1, l_.str.11@PAGEOFF
LBB0_29:
	ldr	w0, [x25]
	bl	_DP
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
LBB0_30:
	ldr	x8, [x19, #8]
Lloh93:
	adrp	x26, _INT_BLOCK_HC@GOTPAGE
Lloh94:
	ldr	x26, [x26, _INT_BLOCK_HC@GOTPAGEOFF]
	ldr	x9, [x26]
	cmp	x8, x9
	b.ne	LBB0_32
; %bb.31:
Lloh95:
	adrp	x8, _HC_REG_COMMAND_REG@GOTPAGE
Lloh96:
	ldr	x8, [x8, _HC_REG_COMMAND_REG@GOTPAGEOFF]
Lloh97:
	ldr	w8, [x8]
	add	w8, w8, w22, lsl #5
Lloh98:
	adrp	x9, _COMMAND_REG_ATTN_BITS_SET@GOTPAGE
Lloh99:
	ldr	x9, [x9, _COMMAND_REG_ATTN_BITS_SET@GOTPAGEOFF]
Lloh100:
	ldr	w9, [x9]
	add	w22, w8, w9
Lloh101:
	adrp	x8, l_.str.16@PAGE
Lloh102:
	add	x8, x8, l_.str.16@PAGEOFF
	b	LBB0_33
LBB0_32:
Lloh103:
	adrp	x8, _BAR_IGU_INTMEM@GOTPAGE
Lloh104:
	ldr	x8, [x8, _BAR_IGU_INTMEM@GOTPAGEOFF]
Lloh105:
	ldr	w8, [x8]
Lloh106:
	adrp	x9, _IGU_CMD_ATTN_BIT_SET_UPPER@GOTPAGE
Lloh107:
	ldr	x9, [x9, _IGU_CMD_ATTN_BIT_SET_UPPER@GOTPAGEOFF]
Lloh108:
	ldr	w9, [x9]
	add	w22, w8, w9, lsl #3
Lloh109:
	adrp	x8, l_.str.17@PAGE
Lloh110:
	add	x8, x8, l_.str.17@PAGEOFF
LBB0_33:
	ldr	w0, [x25]
	stp	x8, x22, [sp, #8]
	mov	x9, x21
	str	x9, [sp]
Lloh111:
	adrp	x1, l_.str.15@PAGE
Lloh112:
	add	x1, x1, l_.str.15@PAGEOFF
	bl	_DP
	mov	x0, x19
	mov	x1, x22
	mov	x2, x21
	bl	_REG_WR
	ldr	w8, [x24]
	tst	w8, w21
	b.eq	LBB0_42
; %bb.34:
	ldr	x8, [x19, #8]
	ldr	x9, [x26]
	cmp	x8, x9
	b.eq	LBB0_41
; %bb.35:
	mov	w21, #0
Lloh113:
	adrp	x22, _IGU_REG_ATTENTION_ACK_BITS@GOTPAGE
Lloh114:
	ldr	x22, [x22, _IGU_REG_ATTENTION_ACK_BITS@GOTPAGEOFF]
Lloh115:
	adrp	x26, _MAX_IGU_ATTN_ACK_TO@GOTPAGE
Lloh116:
	ldr	x26, [x26, _MAX_IGU_ATTN_ACK_TO@GOTPAGEOFF]
LBB0_36:                                ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x22]
	mov	x0, x19
	bl	_REG_RD
	ldr	w8, [x24]
	tst	w8, w0
	b.ne	LBB0_38
; %bb.37:                               ;   in Loop: Header=BB0_36 Depth=1
	add	w21, w21, #1
	ldr	w8, [x26]
	cmp	w21, w8
	b.lt	LBB0_36
LBB0_38:
	cbnz	w0, LBB0_40
; %bb.39:
	ldr	w0, [x25]
Lloh117:
	adrp	x1, l_.str.18@PAGE
Lloh118:
	add	x1, x1, l_.str.18@PAGEOFF
	bl	_DP
LBB0_40:
	bl	_barrier
LBB0_41:
	mov	x0, x19
	mov	x1, x20
	mov	x2, x23
	bl	_REG_WR
	mov	x0, x19
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	b	_bnx2x_release_phy_lock
LBB0_42:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpAdd	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpAdd	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpAdd	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpAdd	Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpAdd	Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpAdd	Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpAdd	Lloh91, Lloh92
	.loh AdrpLdrGot	Lloh89, Lloh90
	.loh AdrpLdrGot	Lloh93, Lloh94
	.loh AdrpAdd	Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh98, Lloh99, Lloh100
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh97
	.loh AdrpAdd	Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpAdd	Lloh111, Lloh112
	.loh AdrpLdrGot	Lloh115, Lloh116
	.loh AdrpLdrGot	Lloh113, Lloh114
	.loh AdrpAdd	Lloh117, Lloh118
	.cfi_endproc
                                        ; -- End function
	.comm	_MISC_REG_AEU_MASK_ATTN_FUNC_1,4,2 ; @MISC_REG_AEU_MASK_ATTN_FUNC_1
	.comm	_MISC_REG_AEU_MASK_ATTN_FUNC_0,4,2 ; @MISC_REG_AEU_MASK_ATTN_FUNC_0
	.comm	_NIG_REG_MASK_INTERRUPT_PORT1,4,2 ; @NIG_REG_MASK_INTERRUPT_PORT1
	.comm	_NIG_REG_MASK_INTERRUPT_PORT0,4,2 ; @NIG_REG_MASK_INTERRUPT_PORT0
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"IGU ERROR\n"

	.comm	_HW_LOCK_RESOURCE_PORT0_ATT_MASK,8,3 ; @HW_LOCK_RESOURCE_PORT0_ATT_MASK
	.comm	_NETIF_MSG_HW,4,2               ; @NETIF_MSG_HW
l_.str.1:                               ; @.str.1
	.asciz	"aeu_mask %x  newly asserted %x\n"

l_.str.2:                               ; @.str.2
	.asciz	"new mask %x\n"

l_.str.3:                               ; @.str.3
	.asciz	"attn_state %x\n"

l_.str.4:                               ; @.str.4
	.asciz	"new state %x\n"

	.comm	_ATTN_HARD_WIRED_MASK,4,2       ; @ATTN_HARD_WIRED_MASK
	.comm	_ATTN_NIG_FOR_FUNC,4,2          ; @ATTN_NIG_FOR_FUNC
	.comm	_ATTN_SW_TIMER_4_FUNC,4,2       ; @ATTN_SW_TIMER_4_FUNC
l_.str.5:                               ; @.str.5
	.asciz	"ATTN_SW_TIMER_4_FUNC!\n"

	.comm	_GPIO_2_FUNC,4,2                ; @GPIO_2_FUNC
l_.str.6:                               ; @.str.6
	.asciz	"GPIO_2_FUNC!\n"

	.comm	_GPIO_3_FUNC,4,2                ; @GPIO_3_FUNC
l_.str.7:                               ; @.str.7
	.asciz	"GPIO_3_FUNC!\n"

	.comm	_GPIO_4_FUNC,4,2                ; @GPIO_4_FUNC
l_.str.8:                               ; @.str.8
	.asciz	"GPIO_4_FUNC!\n"

	.comm	_ATTN_GENERAL_ATTN_1,4,2        ; @ATTN_GENERAL_ATTN_1
l_.str.9:                               ; @.str.9
	.asciz	"ATTN_GENERAL_ATTN_1!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_1,4,2 ; @MISC_REG_AEU_GENERAL_ATTN_1
	.comm	_ATTN_GENERAL_ATTN_2,4,2        ; @ATTN_GENERAL_ATTN_2
l_.str.10:                              ; @.str.10
	.asciz	"ATTN_GENERAL_ATTN_2!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_2,4,2 ; @MISC_REG_AEU_GENERAL_ATTN_2
	.comm	_ATTN_GENERAL_ATTN_3,4,2        ; @ATTN_GENERAL_ATTN_3
l_.str.11:                              ; @.str.11
	.asciz	"ATTN_GENERAL_ATTN_3!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_3,4,2 ; @MISC_REG_AEU_GENERAL_ATTN_3
	.comm	_ATTN_GENERAL_ATTN_4,4,2        ; @ATTN_GENERAL_ATTN_4
l_.str.12:                              ; @.str.12
	.asciz	"ATTN_GENERAL_ATTN_4!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_4,4,2 ; @MISC_REG_AEU_GENERAL_ATTN_4
	.comm	_ATTN_GENERAL_ATTN_5,4,2        ; @ATTN_GENERAL_ATTN_5
l_.str.13:                              ; @.str.13
	.asciz	"ATTN_GENERAL_ATTN_5!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_5,4,2 ; @MISC_REG_AEU_GENERAL_ATTN_5
	.comm	_ATTN_GENERAL_ATTN_6,4,2        ; @ATTN_GENERAL_ATTN_6
l_.str.14:                              ; @.str.14
	.asciz	"ATTN_GENERAL_ATTN_6!\n"

	.comm	_MISC_REG_AEU_GENERAL_ATTN_6,4,2 ; @MISC_REG_AEU_GENERAL_ATTN_6
	.comm	_INT_BLOCK_HC,8,3               ; @INT_BLOCK_HC
	.comm	_HC_REG_COMMAND_REG,4,2         ; @HC_REG_COMMAND_REG
	.comm	_COMMAND_REG_ATTN_BITS_SET,4,2  ; @COMMAND_REG_ATTN_BITS_SET
	.comm	_BAR_IGU_INTMEM,4,2             ; @BAR_IGU_INTMEM
	.comm	_IGU_CMD_ATTN_BIT_SET_UPPER,4,2 ; @IGU_CMD_ATTN_BIT_SET_UPPER
l_.str.15:                              ; @.str.15
	.asciz	"about to mask 0x%08x at %s addr 0x%x\n"

l_.str.16:                              ; @.str.16
	.asciz	"HC"

l_.str.17:                              ; @.str.17
	.asciz	"IGU"

	.comm	_IGU_REG_ATTENTION_ACK_BITS,4,2 ; @IGU_REG_ATTENTION_ACK_BITS
	.comm	_MAX_IGU_ATTN_ACK_TO,4,2        ; @MAX_IGU_ATTN_ACK_TO
l_.str.18:                              ; @.str.18
	.asciz	"Failed to verify IGU ack on time\n"

	.no_dead_strip	_bnx2x_attn_int_asserted
.subsections_via_symbols
