	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_mx_mmc_register_clks
_meson_mx_mmc_register_clks:            ## @meson_mx_mmc_register_clks
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	80(%rdi), %rdi
	callq	___clk_get_name
	movq	%rax, -88(%rbp)
	movl	40(%r14), %ebx
	movq	_GFP_KERNEL@GOTPCREL(%rip), %r13
	movl	(%r13), %r15d
	movl	%ebx, %edi
	callq	_dev_name
	leaq	L_.str(%rip), %rdx
	movl	%ebx, %edi
	movl	%r15d, %esi
	movl	%eax, %ecx
	callq	_devm_kasprintf
	movq	%rax, -48(%rbp)
	testq	%rax, %rax
	je	LBB0_1
## %bb.2:
	movq	_clk_fixed_factor_ops@GOTPCREL(%rip), %rax
	movq	%rax, -56(%rbp)
	movq	$0, -64(%rbp)
	leaq	-88(%rbp), %rax
	movq	%rax, -80(%rbp)
	movl	$1, -72(%rbp)
	movabsq	$4294967298, %rax               ## imm = 0x100000002
	movq	%rax, 64(%r14)
	leaq	72(%r14), %rsi
	leaq	-80(%rbp), %r12
	movq	%r12, 72(%r14)
	movl	40(%r14), %edi
	callq	_devm_clk_register
	movq	%rax, 56(%r14)
	movq	%rax, %rdi
	callq	_IS_ERR
	movl	%eax, %edi
	callq	_WARN_ON
	movq	56(%r14), %rdi
	testq	%rax, %rax
	je	LBB0_3
LBB0_7:
	callq	_PTR_ERR
	jmp	LBB0_8
LBB0_3:
	callq	___clk_get_name
	movq	%rax, -96(%rbp)
	movl	40(%r14), %ebx
	movl	(%r13), %r15d
	movl	%ebx, %edi
	callq	_dev_name
	leaq	L_.str.1(%rip), %rdx
	movl	%ebx, %edi
	movl	%r15d, %esi
	movl	%eax, %ecx
	callq	_devm_kasprintf
	movq	%rax, -48(%rbp)
	testq	%rax, %rax
	je	LBB0_1
## %bb.4:
	movq	_clk_divider_ops@GOTPCREL(%rip), %rax
	movq	%rax, -56(%rbp)
	movq	_CLK_SET_RATE_PARENT@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -64(%rbp)
	leaq	-96(%rbp), %rax
	movq	%rax, -80(%rbp)
	movl	$1, -72(%rbp)
	movq	_MESON_MX_SDIO_CONF@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	addq	48(%r14), %rax
	leaq	8(%r14), %rsi
	movq	%rax, 32(%r14)
	movq	_MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%r14)
	movq	_MESON_MX_SDIO_CONF_CMD_CLK_DIV_WIDTH@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%r14)
	movq	%r12, 8(%r14)
	movq	_CLK_DIVIDER_ALLOW_ZERO@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%r14)
	movl	40(%r14), %edi
	callq	_devm_clk_register
	movq	%rax, (%r14)
	movq	%rax, %rdi
	callq	_IS_ERR
	movl	%eax, %edi
	callq	_WARN_ON
	testq	%rax, %rax
	je	LBB0_5
## %bb.6:
	movq	(%r14), %rdi
	jmp	LBB0_7
LBB0_1:
	movq	_ENOMEM@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_8:
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	xorl	%eax, %eax
	jmp	LBB0_8
	.cfi_endproc
                                        ## -- End function
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"%s#fixed_factor"

	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_clk_fixed_factor_ops,4,2       ## @clk_fixed_factor_ops
L_.str.1:                               ## @.str.1
	.asciz	"%s#div"

	.comm	_clk_divider_ops,4,2            ## @clk_divider_ops
	.comm	_CLK_SET_RATE_PARENT,8,3        ## @CLK_SET_RATE_PARENT
	.comm	_MESON_MX_SDIO_CONF,8,3         ## @MESON_MX_SDIO_CONF
	.comm	_MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT,4,2 ## @MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT
	.comm	_MESON_MX_SDIO_CONF_CMD_CLK_DIV_WIDTH,4,2 ## @MESON_MX_SDIO_CONF_CMD_CLK_DIV_WIDTH
	.comm	_CLK_DIVIDER_ALLOW_ZERO,4,2     ## @CLK_DIVIDER_ALLOW_ZERO
	.no_dead_strip	_meson_mx_mmc_register_clks
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function meson_mx_mmc_register_clks
lCPI0_0:
	.long	2                               ; 0x2
	.long	1                               ; 0x1
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_meson_mx_mmc_register_clks:            ; @meson_mx_mmc_register_clks
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x0, [x0, #80]
	bl	___clk_get_name
	str	x0, [sp, #8]
	ldr	w20, [x19, #40]
Lloh0:
	adrp	x22, _GFP_KERNEL@GOTPAGE
Lloh1:
	ldr	x22, [x22, _GFP_KERNEL@GOTPAGEOFF]
	ldr	w21, [x22]
	mov	x0, x20
	bl	_dev_name
	mov	x3, x0
Lloh2:
	adrp	x2, l_.str@PAGE
Lloh3:
	add	x2, x2, l_.str@PAGEOFF
	mov	x0, x20
	mov	x1, x21
	bl	_devm_kasprintf
	str	x0, [sp, #56]
	cbz	x0, LBB0_6
; %bb.1:
Lloh4:
	adrp	x8, _clk_fixed_factor_ops@GOTPAGE
Lloh5:
	ldr	x8, [x8, _clk_fixed_factor_ops@GOTPAGEOFF]
	stp	xzr, x8, [sp, #40]
	add	x8, sp, #8
	str	x8, [sp, #24]
	mov	w8, #1
	str	w8, [sp, #32]
Lloh6:
	adrp	x8, lCPI0_0@PAGE
Lloh7:
	ldr	d0, [x8, lCPI0_0@PAGEOFF]
	add	x8, sp, #24
	mov	x20, x19
	str	x8, [x20, #72]!
	stur	d0, [x20, #-8]
	ldur	w0, [x20, #-32]
	mov	x1, x20
	bl	_devm_clk_register
	stur	x0, [x20, #-16]
	bl	_IS_ERR
	bl	_WARN_ON
	mov	x8, x0
	ldur	x0, [x20, #-16]
	cbnz	x8, LBB0_5
; %bb.2:
	bl	___clk_get_name
	str	x0, [sp, #16]
	ldr	w20, [x19, #40]
	ldr	w21, [x22]
	mov	x0, x20
	bl	_dev_name
	mov	x3, x0
Lloh8:
	adrp	x2, l_.str.1@PAGE
Lloh9:
	add	x2, x2, l_.str.1@PAGEOFF
	mov	x0, x20
	mov	x1, x21
	bl	_devm_kasprintf
	str	x0, [sp, #56]
	cbz	x0, LBB0_6
; %bb.3:
Lloh10:
	adrp	x8, _clk_divider_ops@GOTPAGE
Lloh11:
	ldr	x8, [x8, _clk_divider_ops@GOTPAGEOFF]
Lloh12:
	adrp	x9, _CLK_SET_RATE_PARENT@GOTPAGE
Lloh13:
	ldr	x9, [x9, _CLK_SET_RATE_PARENT@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	stp	x9, x8, [sp, #40]
	add	x8, sp, #16
	str	x8, [sp, #24]
	mov	w8, #1
	str	w8, [sp, #32]
	ldr	x8, [x19, #48]
Lloh15:
	adrp	x9, _MESON_MX_SDIO_CONF@GOTPAGE
Lloh16:
	ldr	x9, [x9, _MESON_MX_SDIO_CONF@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
	add	x8, x9, x8
	str	x8, [x19, #32]
Lloh18:
	adrp	x8, _MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
Lloh21:
	adrp	x9, _MESON_MX_SDIO_CONF_CMD_CLK_DIV_WIDTH@GOTPAGE
Lloh22:
	ldr	x9, [x9, _MESON_MX_SDIO_CONF_CMD_CLK_DIV_WIDTH@GOTPAGEOFF]
	str	w8, [x19, #24]
Lloh23:
	ldr	w8, [x9]
	add	x9, sp, #24
	mov	x1, x19
	str	x9, [x1, #8]!
Lloh24:
	adrp	x9, _CLK_DIVIDER_ALLOW_ZERO@GOTPAGE
Lloh25:
	ldr	x9, [x9, _CLK_DIVIDER_ALLOW_ZERO@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	stp	w9, w8, [x19, #16]
	ldr	w0, [x19, #40]
	bl	_devm_clk_register
	str	x0, [x19]
	bl	_IS_ERR
	bl	_WARN_ON
	cbz	x0, LBB0_7
; %bb.4:
	ldr	x0, [x19]
LBB0_5:
	bl	_PTR_ERR
	b	LBB0_7
LBB0_6:
Lloh27:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh28:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_7:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdr	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"%s#fixed_factor"

	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_clk_fixed_factor_ops,4,2       ; @clk_fixed_factor_ops
l_.str.1:                               ; @.str.1
	.asciz	"%s#div"

	.comm	_clk_divider_ops,4,2            ; @clk_divider_ops
	.comm	_CLK_SET_RATE_PARENT,8,3        ; @CLK_SET_RATE_PARENT
	.comm	_MESON_MX_SDIO_CONF,8,3         ; @MESON_MX_SDIO_CONF
	.comm	_MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT,4,2 ; @MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT
	.comm	_MESON_MX_SDIO_CONF_CMD_CLK_DIV_WIDTH,4,2 ; @MESON_MX_SDIO_CONF_CMD_CLK_DIV_WIDTH
	.comm	_CLK_DIVIDER_ALLOW_ZERO,4,2     ; @CLK_DIVIDER_ALLOW_ZERO
	.no_dead_strip	_meson_mx_mmc_register_clks
.subsections_via_symbols
