	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function set_nat_params
_set_nat_params:                        ## @set_nat_params
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, %r12d
	movl	%r8d, %r13d
	movl	%edx, %r14d
	movq	%rsi, %rbx
	movq	%rdi, %r15
	testl	%ecx, %ecx
	je	LBB0_5
## %bb.1:
	cmpq	$0, 24(%rbx)
	je	LBB0_3
## %bb.2:
	movl	%r12d, -44(%rbp)                ## 4-byte Spill
	movq	_TCB_SND_UNA_RAW_W@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	movl	%r13d, -48(%rbp)                ## 4-byte Spill
	movq	%rax, %r13
	movq	_WORD_MASK@GOTPCREL(%rip), %r12
	movl	(%r12), %r8d
	movq	(%rbx), %rax
	movl	56(%rax), %edx
	shll	$8, %edx
	orl	60(%rax), %edx
	movl	48(%rax), %r9d
	movl	52(%rax), %eax
	shll	$16, %eax
	shll	$24, %r9d
	orl	%eax, %r9d
	orl	%edx, %r9d
	movl	$1, (%rsp)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_set_tcb_field
	movq	(%r13), %rcx
	incq	%rcx
	movl	(%r12), %r8d
	movq	(%rbx), %rax
	movl	40(%rax), %edx
	shll	$8, %edx
	orl	44(%rax), %edx
	movl	32(%rax), %r9d
	movl	36(%rax), %eax
	shll	$16, %eax
	shll	$24, %r9d
	orl	%eax, %r9d
	orl	%edx, %r9d
	movl	$1, (%rsp)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_set_tcb_field
	movq	(%r13), %rcx
	addq	$2, %rcx
	movl	(%r12), %r8d
	movq	(%rbx), %rax
	movl	24(%rax), %edx
	shll	$8, %edx
	orl	28(%rax), %edx
	movl	16(%rax), %r9d
	movl	20(%rax), %eax
	shll	$16, %eax
	shll	$24, %r9d
	orl	%eax, %r9d
	orl	%edx, %r9d
	movl	$1, (%rsp)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_set_tcb_field
	movq	(%r13), %rcx
	movl	-48(%rbp), %r13d                ## 4-byte Reload
	movl	-44(%rbp), %r12d                ## 4-byte Reload
	addq	$3, %rcx
	jmp	LBB0_4
LBB0_3:
	movq	_TCB_RX_FRAG3_LEN_RAW_W@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
LBB0_4:
	movq	_WORD_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	(%rbx), %rax
	movl	8(%rax), %edx
	shll	$8, %edx
	orl	12(%rax), %edx
	movl	(%rax), %r9d
	movl	4(%rax), %eax
	shll	$16, %eax
	shll	$24, %r9d
	orl	%eax, %r9d
	orl	%edx, %r9d
	movl	$1, (%rsp)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_set_tcb_field
LBB0_5:
	testl	%r13d, %r13d
	je	LBB0_10
## %bb.6:
	cmpq	$0, 24(%rbx)
	je	LBB0_8
## %bb.7:
	movq	_TCB_RX_FRAG2_PTR_RAW_W@GOTPCREL(%rip), %r13
	movq	(%r13), %rcx
	movl	%r12d, -44(%rbp)                ## 4-byte Spill
	movq	_WORD_MASK@GOTPCREL(%rip), %r12
	movl	(%r12), %r8d
	movq	8(%rbx), %rax
	movl	56(%rax), %edx
	shll	$8, %edx
	orl	60(%rax), %edx
	movl	48(%rax), %r9d
	movl	52(%rax), %eax
	shll	$16, %eax
	shll	$24, %r9d
	orl	%eax, %r9d
	orl	%edx, %r9d
	movl	$1, (%rsp)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_set_tcb_field
	movq	(%r13), %rcx
	incq	%rcx
	movl	(%r12), %r8d
	movq	8(%rbx), %rax
	movl	40(%rax), %edx
	shll	$8, %edx
	orl	44(%rax), %edx
	movl	32(%rax), %r9d
	movl	36(%rax), %eax
	shll	$16, %eax
	shll	$24, %r9d
	orl	%eax, %r9d
	orl	%edx, %r9d
	movl	$1, (%rsp)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_set_tcb_field
	movq	(%r13), %rcx
	addq	$2, %rcx
	movl	(%r12), %r8d
	movq	8(%rbx), %rax
	movl	24(%rax), %edx
	shll	$8, %edx
	orl	28(%rax), %edx
	movl	16(%rax), %r9d
	movl	20(%rax), %eax
	shll	$16, %eax
	shll	$24, %r9d
	orl	%eax, %r9d
	orl	%edx, %r9d
	movl	$1, (%rsp)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_set_tcb_field
	movq	(%r13), %rcx
	addq	$3, %rcx
	movl	(%r12), %r8d
	movl	-44(%rbp), %r12d                ## 4-byte Reload
	jmp	LBB0_9
LBB0_8:
	movq	_TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	movq	_WORD_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
LBB0_9:
	movq	8(%rbx), %rax
	movl	8(%rax), %edx
	shll	$8, %edx
	orl	12(%rax), %edx
	movl	(%rax), %r9d
	movl	4(%rax), %eax
	shll	$16, %eax
	shll	$24, %r9d
	orl	%eax, %r9d
	orl	%edx, %r9d
	movl	$1, (%rsp)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_set_tcb_field
LBB0_10:
	movl	16(%rbp), %edx
	movq	_TCB_PDU_HDR_LEN_W@GOTPCREL(%rip), %rcx
	movq	_WORD_MASK@GOTPCREL(%rip), %rsi
	xorl	%r9d, %r9d
	movl	$0, %eax
	testl	%r12d, %r12d
	je	LBB0_12
## %bb.11:
	movl	16(%rbx), %eax
LBB0_12:
	movq	(%rcx), %rcx
	movl	(%rsi), %r8d
	testl	%edx, %edx
	je	LBB0_14
## %bb.13:
	movl	20(%rbx), %r9d
	shll	$16, %r9d
LBB0_14:
	orl	%eax, %r9d
	movl	$1, (%rsp)
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	%r14d, %edx
	callq	_set_tcb_field
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TCB_SND_UNA_RAW_W,8,3          ## @TCB_SND_UNA_RAW_W
	.comm	_WORD_MASK,4,2                  ## @WORD_MASK
	.comm	_TCB_RX_FRAG3_LEN_RAW_W,8,3     ## @TCB_RX_FRAG3_LEN_RAW_W
	.comm	_TCB_RX_FRAG2_PTR_RAW_W,8,3     ## @TCB_RX_FRAG2_PTR_RAW_W
	.comm	_TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W,8,3 ## @TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W
	.comm	_TCB_PDU_HDR_LEN_W,8,3          ## @TCB_PDU_HDR_LEN_W
	.no_dead_strip	_set_nat_params
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function set_nat_params
_set_nat_params:                        ; @set_nat_params
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x6
	mov	x23, x5
	mov	x24, x4
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
Lloh0:
	adrp	x25, _WORD_MASK@GOTPAGE
Lloh1:
	ldr	x25, [x25, _WORD_MASK@GOTPAGEOFF]
	cbz	w3, LBB0_5
; %bb.1:
	ldr	x8, [x20, #24]
	cbz	x8, LBB0_3
; %bb.2:
Lloh2:
	adrp	x26, _TCB_SND_UNA_RAW_W@GOTPAGE
Lloh3:
	ldr	x26, [x26, _TCB_SND_UNA_RAW_W@GOTPAGEOFF]
	ldr	x3, [x26]
	ldr	w4, [x25]
	ldr	x8, [x20]
	ldp	w10, w9, [x8, #56]
	orr	w9, w9, w10, lsl #8
	ldp	w8, w10, [x8, #48]
	orr	w9, w9, w10, lsl #16
	orr	w5, w9, w8, lsl #24
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	mov	w6, #1
	bl	_set_tcb_field
	ldr	x8, [x26]
	add	x3, x8, #1
	ldr	w4, [x25]
	ldr	x8, [x20]
	ldp	w10, w9, [x8, #40]
	orr	w9, w9, w10, lsl #8
	ldp	w8, w10, [x8, #32]
	orr	w9, w9, w10, lsl #16
	orr	w5, w9, w8, lsl #24
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	mov	w6, #1
	bl	_set_tcb_field
	ldr	x8, [x26]
	add	x3, x8, #2
	ldr	w4, [x25]
	ldr	x8, [x20]
	ldp	w10, w9, [x8, #24]
	orr	w9, w9, w10, lsl #8
	ldp	w8, w10, [x8, #16]
	orr	w9, w9, w10, lsl #16
	orr	w5, w9, w8, lsl #24
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	mov	w6, #1
	bl	_set_tcb_field
	ldr	x8, [x26]
	add	x3, x8, #3
	b	LBB0_4
LBB0_3:
Lloh4:
	adrp	x8, _TCB_RX_FRAG3_LEN_RAW_W@GOTPAGE
Lloh5:
	ldr	x8, [x8, _TCB_RX_FRAG3_LEN_RAW_W@GOTPAGEOFF]
Lloh6:
	ldr	x3, [x8]
LBB0_4:
	ldr	w4, [x25]
	ldr	x8, [x20]
	ldp	w10, w9, [x8, #8]
	orr	w9, w9, w10, lsl #8
	ldp	w8, w10, [x8]
	orr	w9, w9, w10, lsl #16
	orr	w5, w9, w8, lsl #24
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	mov	w6, #1
	bl	_set_tcb_field
LBB0_5:
	cbz	w24, LBB0_10
; %bb.6:
	ldr	x8, [x20, #24]
	cbz	x8, LBB0_8
; %bb.7:
Lloh7:
	adrp	x24, _TCB_RX_FRAG2_PTR_RAW_W@GOTPAGE
Lloh8:
	ldr	x24, [x24, _TCB_RX_FRAG2_PTR_RAW_W@GOTPAGEOFF]
	ldr	x3, [x24]
	ldr	w4, [x25]
	ldr	x8, [x20, #8]
	ldp	w10, w9, [x8, #56]
	orr	w9, w9, w10, lsl #8
	ldp	w8, w10, [x8, #48]
	orr	w9, w9, w10, lsl #16
	orr	w5, w9, w8, lsl #24
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	mov	w6, #1
	bl	_set_tcb_field
	ldr	x8, [x24]
	add	x3, x8, #1
	ldr	w4, [x25]
	ldr	x8, [x20, #8]
	ldp	w10, w9, [x8, #40]
	orr	w9, w9, w10, lsl #8
	ldp	w8, w10, [x8, #32]
	orr	w9, w9, w10, lsl #16
	orr	w5, w9, w8, lsl #24
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	mov	w6, #1
	bl	_set_tcb_field
	ldr	x8, [x24]
	add	x3, x8, #2
	ldr	w4, [x25]
	ldr	x8, [x20, #8]
	ldp	w10, w9, [x8, #24]
	orr	w9, w9, w10, lsl #8
	ldp	w8, w10, [x8, #16]
	orr	w9, w9, w10, lsl #16
	orr	w5, w9, w8, lsl #24
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	mov	w6, #1
	bl	_set_tcb_field
	ldr	x8, [x24]
	add	x3, x8, #3
	b	LBB0_9
LBB0_8:
Lloh9:
	adrp	x8, _TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W@GOTPAGE
Lloh10:
	ldr	x8, [x8, _TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W@GOTPAGEOFF]
Lloh11:
	ldr	x3, [x8]
LBB0_9:
	ldr	w4, [x25]
	ldr	x8, [x20, #8]
	ldp	w10, w9, [x8, #8]
	orr	w9, w9, w10, lsl #8
	ldp	w8, w10, [x8]
	orr	w9, w9, w10, lsl #16
	orr	w5, w9, w8, lsl #24
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	mov	w6, #1
	bl	_set_tcb_field
LBB0_10:
Lloh12:
	adrp	x8, _TCB_PDU_HDR_LEN_W@GOTPAGE
Lloh13:
	ldr	x8, [x8, _TCB_PDU_HDR_LEN_W@GOTPAGEOFF]
Lloh14:
	ldr	x3, [x8]
	ldr	w4, [x25]
	cbz	w23, LBB0_13
; %bb.11:
	ldr	w8, [x20, #16]
	cbz	w22, LBB0_14
LBB0_12:
	ldr	w9, [x20, #20]
	lsl	w9, w9, #16
	b	LBB0_15
LBB0_13:
	mov	w8, #0
	cbnz	w22, LBB0_12
LBB0_14:
	mov	w9, #0
LBB0_15:
	orr	w5, w9, w8
	mov	x0, x21
	mov	x1, x20
	mov	x2, x19
	mov	w6, #1
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_set_tcb_field
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_TCB_SND_UNA_RAW_W,8,3          ; @TCB_SND_UNA_RAW_W
	.comm	_WORD_MASK,4,2                  ; @WORD_MASK
	.comm	_TCB_RX_FRAG3_LEN_RAW_W,8,3     ; @TCB_RX_FRAG3_LEN_RAW_W
	.comm	_TCB_RX_FRAG2_PTR_RAW_W,8,3     ; @TCB_RX_FRAG2_PTR_RAW_W
	.comm	_TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W,8,3 ; @TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W
	.comm	_TCB_PDU_HDR_LEN_W,8,3          ; @TCB_PDU_HDR_LEN_W
	.no_dead_strip	_set_nat_params
.subsections_via_symbols
