	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_restore_pci_variables          ## -- Begin function restore_pci_variables
	.p2align	4, 0x90
_restore_pci_variables:                 ## @restore_pci_variables
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_PCI_COMMAND@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%rdi), %edi
	movl	36(%r14), %edx
	callq	_pci_write_config_word
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
## %bb.1:
	movq	_PCI_BASE_ADDRESS_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edi
	movl	32(%r14), %edx
	callq	_pci_write_config_dword
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
## %bb.2:
	movq	_PCI_BASE_ADDRESS_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edi
	movl	28(%r14), %edx
	callq	_pci_write_config_dword
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
## %bb.3:
	movq	_PCI_ROM_ADDRESS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edi
	movl	24(%r14), %edx
	callq	_pci_write_config_dword
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
## %bb.4:
	movq	_PCI_EXP_DEVCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edi
	movl	20(%r14), %edx
	callq	_pcie_capability_write_word
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
## %bb.5:
	movq	_PCI_EXP_LNKCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edi
	movl	16(%r14), %edx
	callq	_pcie_capability_write_word
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
## %bb.6:
	movq	_PCI_EXP_DEVCTL2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edi
	movl	12(%r14), %edx
	callq	_pcie_capability_write_word
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
## %bb.7:
	movq	_PCI_CFG_MSIX0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	4(%r14), %edi
	movl	8(%r14), %edx
	callq	_pci_write_config_dword
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_8
LBB0_10:
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	callq	_dd_dev_err
	movl	%ebx, %r15d
LBB0_11:
	movl	%r15d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_8:
	movl	4(%r14), %edi
	movq	_PCI_EXT_CAP_ID_TPH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_pci_find_ext_capability
	xorl	%r15d, %r15d
	testq	%rax, %rax
	je	LBB0_11
## %bb.9:
	movl	(%r14), %edx
	movl	4(%r14), %edi
	movq	_PCIE_CFG_TPH2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_pci_write_config_dword
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
	jmp	LBB0_11
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_COMMAND,4,2                ## @PCI_COMMAND
	.comm	_PCI_BASE_ADDRESS_0,4,2         ## @PCI_BASE_ADDRESS_0
	.comm	_PCI_BASE_ADDRESS_1,4,2         ## @PCI_BASE_ADDRESS_1
	.comm	_PCI_ROM_ADDRESS,4,2            ## @PCI_ROM_ADDRESS
	.comm	_PCI_EXP_DEVCTL,4,2             ## @PCI_EXP_DEVCTL
	.comm	_PCI_EXP_LNKCTL,4,2             ## @PCI_EXP_LNKCTL
	.comm	_PCI_EXP_DEVCTL2,4,2            ## @PCI_EXP_DEVCTL2
	.comm	_PCI_CFG_MSIX0,4,2              ## @PCI_CFG_MSIX0
	.comm	_PCI_EXT_CAP_ID_TPH,4,2         ## @PCI_EXT_CAP_ID_TPH
	.comm	_PCIE_CFG_TPH2,4,2              ## @PCIE_CFG_TPH2
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Unable to write to PCI config\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_restore_pci_variables          ; -- Begin function restore_pci_variables
	.p2align	2
_restore_pci_variables:                 ; @restore_pci_variables
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w0, [x0, #4]
Lloh0:
	adrp	x8, _PCI_COMMAND@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_COMMAND@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	ldr	w2, [x19, #36]
	bl	_pci_write_config_word
	mov	x20, x0
	cbnz	w0, LBB0_8
; %bb.1:
	ldr	w0, [x19, #4]
Lloh3:
	adrp	x8, _PCI_BASE_ADDRESS_0@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_BASE_ADDRESS_0@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	ldr	w2, [x19, #32]
	bl	_pci_write_config_dword
	mov	x20, x0
	cbnz	w0, LBB0_8
; %bb.2:
	ldr	w0, [x19, #4]
Lloh6:
	adrp	x8, _PCI_BASE_ADDRESS_1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCI_BASE_ADDRESS_1@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	ldr	w2, [x19, #28]
	bl	_pci_write_config_dword
	mov	x20, x0
	cbnz	w0, LBB0_8
; %bb.3:
	ldr	w0, [x19, #4]
Lloh9:
	adrp	x8, _PCI_ROM_ADDRESS@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCI_ROM_ADDRESS@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	w2, [x19, #24]
	bl	_pci_write_config_dword
	mov	x20, x0
	cbnz	w0, LBB0_8
; %bb.4:
	ldr	w0, [x19, #4]
Lloh12:
	adrp	x8, _PCI_EXP_DEVCTL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PCI_EXP_DEVCTL@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	ldr	w2, [x19, #20]
	bl	_pcie_capability_write_word
	mov	x20, x0
	cbnz	w0, LBB0_8
; %bb.5:
	ldr	w0, [x19, #4]
Lloh15:
	adrp	x8, _PCI_EXP_LNKCTL@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PCI_EXP_LNKCTL@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	ldr	w2, [x19, #16]
	bl	_pcie_capability_write_word
	mov	x20, x0
	cbnz	w0, LBB0_8
; %bb.6:
	ldr	w0, [x19, #4]
Lloh18:
	adrp	x8, _PCI_EXP_DEVCTL2@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PCI_EXP_DEVCTL2@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	ldr	w2, [x19, #12]
	bl	_pcie_capability_write_word
	mov	x20, x0
	cbnz	w0, LBB0_8
; %bb.7:
Lloh21:
	adrp	x8, _PCI_CFG_MSIX0@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PCI_CFG_MSIX0@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	ldp	w0, w2, [x19, #4]
	bl	_pci_write_config_dword
	mov	x20, x0
	cbz	w0, LBB0_10
LBB0_8:
Lloh24:
	adrp	x1, l_.str@PAGE
Lloh25:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_dd_dev_err
LBB0_9:
	mov	x0, x20
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_10:
	ldr	w0, [x19, #4]
Lloh26:
	adrp	x8, _PCI_EXT_CAP_ID_TPH@GOTPAGE
Lloh27:
	ldr	x8, [x8, _PCI_EXT_CAP_ID_TPH@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	bl	_pci_find_ext_capability
	cbz	x0, LBB0_12
; %bb.11:
Lloh29:
	adrp	x8, _PCIE_CFG_TPH2@GOTPAGE
Lloh30:
	ldr	x8, [x8, _PCIE_CFG_TPH2@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	ldp	w2, w0, [x19]
	bl	_pci_write_config_dword
	mov	x20, x0
	cbnz	w0, LBB0_8
	b	LBB0_9
LBB0_12:
	mov	w20, #0
	b	LBB0_9
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_COMMAND,4,2                ; @PCI_COMMAND
	.comm	_PCI_BASE_ADDRESS_0,4,2         ; @PCI_BASE_ADDRESS_0
	.comm	_PCI_BASE_ADDRESS_1,4,2         ; @PCI_BASE_ADDRESS_1
	.comm	_PCI_ROM_ADDRESS,4,2            ; @PCI_ROM_ADDRESS
	.comm	_PCI_EXP_DEVCTL,4,2             ; @PCI_EXP_DEVCTL
	.comm	_PCI_EXP_LNKCTL,4,2             ; @PCI_EXP_LNKCTL
	.comm	_PCI_EXP_DEVCTL2,4,2            ; @PCI_EXP_DEVCTL2
	.comm	_PCI_CFG_MSIX0,4,2              ; @PCI_CFG_MSIX0
	.comm	_PCI_EXT_CAP_ID_TPH,4,2         ; @PCI_EXT_CAP_ID_TPH
	.comm	_PCIE_CFG_TPH2,4,2              ; @PCIE_CFG_TPH2
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Unable to write to PCI config\n"

.subsections_via_symbols
