	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_smmu_enable
_tegra_smmu_enable:                     ## @tegra_smmu_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movq	%rdi, %r12
	movq	(%rdi), %rax
	cmpl	$0, (%rax)
	je	LBB0_5
## %bb.1:
	movl	$8, %ebx
	xorl	%r14d, %r14d
	movl	%esi, -48(%rbp)                 ## 4-byte Spill
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_4:                                 ##   in Loop: Header=BB0_2 Depth=1
	incq	%r14
	movl	(%rax), %ecx
	addq	$12, %rbx
	cmpq	%rcx, %r14
	jae	LBB0_5
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%rax), %r15
	cmpl	%esi, -8(%r15,%rbx)
	jne	LBB0_4
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movl	-4(%r15,%rbx), %esi
	movq	%r12, %rdi
	callq	_smmu_readl
	movl	%eax, %r13d
	movl	(%r15,%rbx), %edi
	callq	_BIT
	orl	%eax, %r13d
	movl	-4(%r15,%rbx), %edx
	movq	%r12, %rdi
	movl	%r13d, %esi
	callq	_smmu_writel
	movl	-48(%rbp), %esi                 ## 4-byte Reload
	movq	(%r12), %rax
	jmp	LBB0_4
LBB0_5:
	movq	%r12, %rdi
	callq	_tegra_smmu_find_swgroup
	testq	%rax, %rax
	je	LBB0_6
## %bb.7:
	movq	%rax, %r15
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_smmu_readl
	movq	_SMMU_ASID_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_SMMU_ASID_VALUE
	orl	%eax, %ebx
	movq	_SMMU_ASID_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	(%r15), %edx
	movq	%r12, %rdi
	movl	%ebx, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_smmu_writel                    ## TAILCALL
LBB0_6:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SMMU_ASID_MASK,4,2             ## @SMMU_ASID_MASK
	.comm	_SMMU_ASID_ENABLE,4,2           ## @SMMU_ASID_ENABLE
	.no_dead_strip	_tegra_smmu_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_smmu_enable
_tegra_smmu_enable:                     ; @tegra_smmu_enable
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
	ldr	x8, [x0]
	ldr	w9, [x8]
	cbz	w9, LBB0_5
; %bb.1:
	mov	x23, #0
	mov	x24, #0
	b	LBB0_3
LBB0_2:                                 ;   in Loop: Header=BB0_3 Depth=1
	add	x24, x24, #1
	ldr	w9, [x8]
	add	x23, x23, #12
	cmp	x24, x9
	b.hs	LBB0_5
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x8, #8]
	ldr	w10, [x9, x23]
	cmp	w10, w21
	b.ne	LBB0_2
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	add	x25, x9, x23
	ldr	w1, [x25, #4]
	mov	x0, x19
	bl	_smmu_readl
	mov	x22, x0
	ldr	w0, [x25, #8]
	bl	_BIT
	orr	w1, w0, w22
	ldr	w2, [x25, #4]
	mov	x0, x19
	bl	_smmu_writel
	ldr	x8, [x19]
	b	LBB0_2
LBB0_5:
	mov	x0, x19
	mov	x1, x21
	bl	_tegra_smmu_find_swgroup
	cbz	x0, LBB0_7
; %bb.6:
	mov	x21, x0
	ldr	w1, [x0]
	mov	x0, x19
	bl	_smmu_readl
Lloh0:
	adrp	x8, _SMMU_ASID_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SMMU_ASID_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	bic	w22, w0, w8
	mov	x0, x20
	bl	_SMMU_ASID_VALUE
	orr	w8, w22, w0
Lloh3:
	adrp	x9, _SMMU_ASID_ENABLE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _SMMU_ASID_ENABLE@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w1, w8, w9
	ldr	w2, [x21]
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_smmu_writel
LBB0_7:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SMMU_ASID_MASK,4,2             ; @SMMU_ASID_MASK
	.comm	_SMMU_ASID_ENABLE,4,2           ; @SMMU_ASID_ENABLE
	.no_dead_strip	_tegra_smmu_enable
.subsections_via_symbols
