	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_renesas_sdhi_probe             ## -- Begin function renesas_sdhi_probe
	.p2align	4, 0x90
_renesas_sdhi_probe:                    ## @renesas_sdhi_probe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	(%rdi), %r13
	callq	_of_device_get_match_data
	movq	%rax, %r12
	movq	_sdhi_quirks_match@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_soc_device_match
	testq	%rax, %rax
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	je	LBB0_2
## %bb.1:
	movq	(%rax), %rax
	jmp	LBB0_3
LBB0_2:
	xorl	%eax, %eax
LBB0_3:
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	movq	_IORESOURCE_MEM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%r15d, %r15d
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_platform_get_resource
	testq	%rax, %rax
	je	LBB0_7
## %bb.4:
	movq	%rax, %rbx
	movq	%r13, -72(%rbp)                 ## 8-byte Spill
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	$112, %esi
	callq	_devm_kzalloc
	testq	%rax, %rax
	je	LBB0_8
## %bb.5:
	movq	%rax, %r13
	movq	%r12, -56(%rbp)                 ## 8-byte Spill
	movq	%rax, %r12
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_devm_clk_get
	movq	%rax, 48(%r13)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_11
## %bb.6:
	movq	48(%r12), %rdi
	callq	_PTR_ERR
	movl	%eax, %r15d
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	movl	%eax, %edx
	callq	_dev_err
	jmp	LBB0_10
LBB0_7:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_9
LBB0_8:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
LBB0_9:
	subl	(%rax), %r15d
LBB0_10:
	movl	%r15d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_11:
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	callq	_devm_clk_get
	movq	%rax, 40(%r12)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_13
## %bb.12:
	movq	$0, 40(%r12)
LBB0_13:
	addq	$72, %r13
	movq	%r14, %rdi
	callq	_devm_pinctrl_get
	movq	%rax, 16(%r12)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	jne	LBB0_15
## %bb.14:
	movq	16(%r12), %rdi
	movq	_PINCTRL_STATE_DEFAULT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_pinctrl_lookup_state
	movq	%rax, 32(%r12)
	movq	16(%r12), %rdi
	leaq	L_.str.2(%rip), %rsi
	callq	_pinctrl_lookup_state
	movq	%rax, 24(%r12)
LBB0_15:
	movq	%r14, %rdi
	movq	%r13, %rsi
	callq	_tmio_mmc_host_alloc
	movq	%rax, %r15
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_17
## %bb.16:
	movq	%r15, %rdi
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_PTR_ERR                        ## TAILCALL
LBB0_17:
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	testq	%rcx, %rcx
	je	LBB0_19
## %bb.18:
	movl	(%rcx), %eax
	orl	%eax, 72(%r12)
	movl	60(%rcx), %eax
	movl	%eax, 108(%r12)
	movl	56(%rcx), %eax
	orl	%eax, 92(%r12)
	movl	52(%rcx), %eax
	orl	%eax, 96(%r12)
	movl	48(%rcx), %eax
	movl	%eax, 104(%r12)
	movq	8(%rcx), %rax
	movq	%rax, 80(%r12)
	movl	44(%rcx), %eax
	movl	%eax, 100(%r12)
	movl	40(%rcx), %eax
	movl	%eax, 64(%r12)
	movl	16(%rcx), %eax
	movl	%eax, (%r15)
LBB0_19:
	movq	_renesas_sdhi_write16_hook@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 120(%r15)
	movq	_renesas_sdhi_clk_enable@GOTPCREL(%rip), %rax
	movq	%rax, 8(%r15)
	movq	_renesas_sdhi_clk_disable@GOTPCREL(%rip), %rax
	movq	%rax, 112(%r15)
	movq	_renesas_sdhi_set_clock@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 108(%r15)
	movq	_renesas_sdhi_multi_io_quirk@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 104(%r15)
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movq	%rax, 96(%r15)
	movq	-64(%rbp), %rdx                 ## 8-byte Reload
	testq	%rdx, %rdx
	je	LBB0_24
## %bb.20:
	cmpq	$0, 8(%rdx)
	je	LBB0_22
## %bb.21:
	movq	_MMC_CAP2_HS400@GOTPCREL(%rip), %rax
	movq	_MMC_CAP2_HS400_ES@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	notl	%ecx
	movq	16(%r15), %rax
	andl	%ecx, (%rax)
LBB0_22:
	cmpq	$0, (%rdx)
	je	LBB0_24
## %bb.23:
	movq	_TMIO_MMC_HAVE_4TAP_HS400@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r13)
LBB0_24:
	movq	16(%r15), %rdi
	callq	_mmc_can_gpio_ro
	testq	%rax, %rax
	je	LBB0_26
## %bb.25:
	movq	_MMC_CAP2_NO_WRITE_PROTECT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, 96(%r12)
LBB0_26:
	movq	_TMIO_MMC_MIN_RCAR2@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r13)
	je	LBB0_30
## %bb.27:
	movq	_renesas_sdhi_card_busy@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 88(%r15)
	movq	_renesas_sdhi_start_signal_voltage_switch@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 84(%r15)
	movq	_TMIO_STAT_ALWAYS_SET_27@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 80(%r15)
	cmpq	$0, -56(%rbp)                   ## 8-byte Folded Reload
	je	LBB0_30
## %bb.28:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	32(%rax), %rax
	testq	%rax, %rax
	je	LBB0_30
## %bb.29:
	addq	72(%r15), %rax
	movq	%rax, 8(%r12)
	movq	_MMC_CAP_HW_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	16(%r15), %rcx
	orl	%eax, 4(%rcx)
	movq	_renesas_sdhi_hw_reset@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%r15)
LBB0_30:
	cmpl	$0, (%r15)
	jne	LBB0_33
## %bb.31:
	movq	%rbx, %rdi
	callq	_resource_size
	cmpl	$257, %eax                      ## imm = 0x101
	jl	LBB0_33
## %bb.32:
	movl	$1, (%r15)
LBB0_33:
	movq	-72(%rbp), %rcx                 ## 8-byte Reload
	testq	%rcx, %rcx
	je	LBB0_35
## %bb.34:
	movq	32(%rcx), %rax
	movq	%rax, 32(%r13)
	movups	(%rcx), %xmm0
	movups	16(%rcx), %xmm1
	movups	%xmm1, 16(%r13)
	movups	%xmm0, (%r13)
LBB0_35:
	movq	_shdma_chan_filter@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 60(%r12)
	movq	_renesas_sdhi_enable_dma@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%r12)
	movl	$1, 88(%r12)
	movq	_MMC_CAP_MMC_HIGHSPEED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 92(%r12)
	movq	_TMIO_MMC_BLKSZ_2BYTES@GOTPCREL(%rip), %rax
	movl	72(%r12), %ecx
	orl	(%rax), %ecx
	movq	_TMIO_MMC_SDIO_IRQ@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_TMIO_MMC_HAVE_CMD12_CTRL@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_TMIO_MMC_SDIO_STATUS_SETBITS@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	%ecx, 72(%r12)
	movq	%r15, %rdi
	callq	_renesas_sdhi_clk_enable
	movq	%r15, %rbx
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	LBB0_67
## %bb.36:
	movq	_CTL_VERSION@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_sd_ctrl_read16
	movq	_SDHI_VER_GEN2_SDR104@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jge	LBB0_39
## %bb.37:
	movq	_U16_MAX@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	cmpq	%rcx, 80(%r12)
	jle	LBB0_39
## %bb.38:
	movq	%rcx, 80(%r12)
LBB0_39:
	movq	_SDHI_VER_GEN2_SDR50@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_41
## %bb.40:
	movq	_TMIO_MMC_HAVE_CBSY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, (%r13)
LBB0_41:
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	callq	_tmio_mmc_host_probe
	testl	%eax, %eax
	js	LBB0_52
## %bb.42:
	movq	-56(%rbp), %rsi                 ## 8-byte Reload
	testq	%rsi, %rsi
	movq	-48(%rbp), %r15                 ## 8-byte Reload
	je	LBB0_55
## %bb.43:
	cmpq	$0, 32(%rsi)
	je	LBB0_55
## %bb.44:
	movq	16(%r15), %rax
	movq	_MMC_CAP_UHS_SDR104@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, 4(%rax)
	jne	LBB0_46
## %bb.45:
	movq	_MMC_CAP2_HS200_1_8V_SDR@GOTPCREL(%rip), %rcx
	movq	_MMC_CAP2_HS400_1_8V@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	testl	%edx, (%rax)
	je	LBB0_55
LBB0_46:
	movl	20(%rsi), %ecx
	testl	%ecx, %ecx
	jle	LBB0_51
## %bb.47:
	movq	24(%rsi), %rdx
	shlq	$4, %rcx
	xorl	%esi, %esi
LBB0_48:                                ## =>This Inner Loop Header: Depth=1
	movq	(%rdx,%rsi), %rdi
	testq	%rdi, %rdi
	je	LBB0_53
## %bb.49:                              ##   in Loop: Header=BB0_48 Depth=1
	cmpq	8(%rax), %rdi
	je	LBB0_53
## %bb.50:                              ##   in Loop: Header=BB0_48 Depth=1
	addq	$16, %rsi
	cmpq	%rsi, %rcx
	jne	LBB0_48
LBB0_51:
	movq	56(%r15), %rdi
	leaq	L_.str.3(%rip), %rsi
	callq	_dev_warn
	jmp	LBB0_54
LBB0_52:
	movl	%eax, %r15d
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	jmp	LBB0_66
LBB0_53:
	movl	12(%rdx), %eax
	movl	%eax, 4(%r12)
	movl	8(%rdx), %eax
	movl	%eax, (%r12)
LBB0_54:
	movq	_renesas_sdhi_init_tuning@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%r15)
	movq	_renesas_sdhi_prepare_tuning@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 44(%r15)
	movq	_renesas_sdhi_select_tuning@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%r15)
	movq	_renesas_sdhi_check_scc_error@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 36(%r15)
	movq	_renesas_sdhi_prepare_hs400_tuning@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%r15)
	movq	_renesas_sdhi_disable_scc@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 28(%r15)
	movq	_renesas_sdhi_hs400_complete@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%r15)
LBB0_55:
	movq	%r14, %rdi
	callq	_platform_irq_count
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_62
## %bb.56:
	je	LBB0_63
## %bb.57:
	xorl	%r12d, %r12d
LBB0_58:                                ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_platform_get_irq
	movl	%eax, %r15d
	testl	%eax, %eax
	js	LBB0_65
## %bb.59:                              ##   in Loop: Header=BB0_58 Depth=1
	movq	_tmio_mmc_irq@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	%r14, %rdi
	callq	_dev_name
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%r13d, %edx
	xorl	%ecx, %ecx
	movl	%eax, %r8d
	movq	-48(%rbp), %r9                  ## 8-byte Reload
	callq	_devm_request_irq
	testl	%eax, %eax
	jne	LBB0_64
## %bb.60:                              ##   in Loop: Header=BB0_58 Depth=1
	incl	%r12d
	cmpl	%r12d, %ebx
	jne	LBB0_58
## %bb.61:
	movq	-48(%rbp), %r12                 ## 8-byte Reload
	movq	16(%r12), %rdi
	callq	_mmc_hostname
	movl	%eax, %ebx
	movq	_IORESOURCE_MEM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%r15d, %r15d
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_platform_get_resource
	movq	%rax, %rcx
	movq	16(%r12), %rdx
	movabsq	$4835703278458516699, %rax      ## imm = 0x431BDE82D7B634DB
	imulq	8(%rdx)
	movq	(%rcx), %rcx
	movq	%rdx, %r8
	shrq	$63, %r8
	shrq	$18, %rdx
	addl	%edx, %r8d
	leaq	L_.str.4(%rip), %rsi
	movq	%r14, %rdi
	movl	%ebx, %edx
                                        ## kill: def $r8d killed $r8d killed $r8
	callq	_dev_info
	jmp	LBB0_10
LBB0_62:
	movl	%ebx, %r15d
	jmp	LBB0_65
LBB0_63:
	movq	_ENXIO@GOTPCREL(%rip), %rax
	xorl	%r15d, %r15d
	subl	(%rax), %r15d
	jmp	LBB0_65
LBB0_64:
	movl	%eax, %r15d
LBB0_65:
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rdi
	callq	_tmio_mmc_host_remove
LBB0_66:
	movq	%rbx, %rdi
	callq	_renesas_sdhi_clk_disable
LBB0_67:
	movq	%rbx, %rdi
	callq	_tmio_mmc_host_free
	jmp	LBB0_10
	.cfi_endproc
                                        ## -- End function
	.comm	_sdhi_quirks_match,4,2          ## @sdhi_quirks_match
	.comm	_IORESOURCE_MEM,4,2             ## @IORESOURCE_MEM
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"cannot get clock: %d\n"

L_.str.1:                               ## @.str.1
	.asciz	"cd"

	.comm	_PINCTRL_STATE_DEFAULT,8,3      ## @PINCTRL_STATE_DEFAULT
L_.str.2:                               ## @.str.2
	.asciz	"state_uhs"

	.comm	_renesas_sdhi_write16_hook,4,2  ## @renesas_sdhi_write16_hook
	.comm	_renesas_sdhi_set_clock,4,2     ## @renesas_sdhi_set_clock
	.comm	_renesas_sdhi_multi_io_quirk,4,2 ## @renesas_sdhi_multi_io_quirk
	.comm	_MMC_CAP2_HS400,4,2             ## @MMC_CAP2_HS400
	.comm	_MMC_CAP2_HS400_ES,4,2          ## @MMC_CAP2_HS400_ES
	.comm	_TMIO_MMC_HAVE_4TAP_HS400,4,2   ## @TMIO_MMC_HAVE_4TAP_HS400
	.comm	_MMC_CAP2_NO_WRITE_PROTECT,4,2  ## @MMC_CAP2_NO_WRITE_PROTECT
	.comm	_TMIO_MMC_MIN_RCAR2,4,2         ## @TMIO_MMC_MIN_RCAR2
	.comm	_renesas_sdhi_card_busy,4,2     ## @renesas_sdhi_card_busy
	.comm	_renesas_sdhi_start_signal_voltage_switch,4,2 ## @renesas_sdhi_start_signal_voltage_switch
	.comm	_TMIO_STAT_ALWAYS_SET_27,4,2    ## @TMIO_STAT_ALWAYS_SET_27
	.comm	_MMC_CAP_HW_RESET,4,2           ## @MMC_CAP_HW_RESET
	.comm	_renesas_sdhi_hw_reset,4,2      ## @renesas_sdhi_hw_reset
	.comm	_shdma_chan_filter,4,2          ## @shdma_chan_filter
	.comm	_renesas_sdhi_enable_dma,4,2    ## @renesas_sdhi_enable_dma
	.comm	_MMC_CAP_MMC_HIGHSPEED,4,2      ## @MMC_CAP_MMC_HIGHSPEED
	.comm	_TMIO_MMC_BLKSZ_2BYTES,4,2      ## @TMIO_MMC_BLKSZ_2BYTES
	.comm	_TMIO_MMC_SDIO_IRQ,4,2          ## @TMIO_MMC_SDIO_IRQ
	.comm	_TMIO_MMC_HAVE_CMD12_CTRL,4,2   ## @TMIO_MMC_HAVE_CMD12_CTRL
	.comm	_TMIO_MMC_SDIO_STATUS_SETBITS,4,2 ## @TMIO_MMC_SDIO_STATUS_SETBITS
	.comm	_CTL_VERSION,4,2                ## @CTL_VERSION
	.comm	_SDHI_VER_GEN2_SDR104,8,3       ## @SDHI_VER_GEN2_SDR104
	.comm	_U16_MAX,8,3                    ## @U16_MAX
	.comm	_SDHI_VER_GEN2_SDR50,8,3        ## @SDHI_VER_GEN2_SDR50
	.comm	_TMIO_MMC_HAVE_CBSY,4,2         ## @TMIO_MMC_HAVE_CBSY
	.comm	_MMC_CAP_UHS_SDR104,4,2         ## @MMC_CAP_UHS_SDR104
	.comm	_MMC_CAP2_HS200_1_8V_SDR,4,2    ## @MMC_CAP2_HS200_1_8V_SDR
	.comm	_MMC_CAP2_HS400_1_8V,4,2        ## @MMC_CAP2_HS400_1_8V
L_.str.3:                               ## @.str.3
	.asciz	"Unknown clock rate for SDR104\n"

	.comm	_renesas_sdhi_init_tuning,4,2   ## @renesas_sdhi_init_tuning
	.comm	_renesas_sdhi_prepare_tuning,4,2 ## @renesas_sdhi_prepare_tuning
	.comm	_renesas_sdhi_select_tuning,4,2 ## @renesas_sdhi_select_tuning
	.comm	_renesas_sdhi_check_scc_error,4,2 ## @renesas_sdhi_check_scc_error
	.comm	_renesas_sdhi_prepare_hs400_tuning,4,2 ## @renesas_sdhi_prepare_hs400_tuning
	.comm	_renesas_sdhi_disable_scc,4,2   ## @renesas_sdhi_disable_scc
	.comm	_renesas_sdhi_hs400_complete,4,2 ## @renesas_sdhi_hs400_complete
	.comm	_ENXIO,4,2                      ## @ENXIO
	.comm	_tmio_mmc_irq,4,2               ## @tmio_mmc_irq
L_.str.4:                               ## @.str.4
	.asciz	"%s base at 0x%08lx max clock rate %u MHz\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_renesas_sdhi_probe             ; -- Begin function renesas_sdhi_probe
	.p2align	2
_renesas_sdhi_probe:                    ; @renesas_sdhi_probe
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x25, x1
	mov	x19, x0
	ldr	x27, [x0]
	bl	_of_device_get_match_data
	mov	x21, x0
Lloh0:
	adrp	x8, _sdhi_quirks_match@GOTPAGE
Lloh1:
	ldr	x8, [x8, _sdhi_quirks_match@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_soc_device_match
	cbz	x0, LBB0_2
; %bb.1:
	ldr	x28, [x0]
	b	LBB0_3
LBB0_2:
	mov	x28, #0
LBB0_3:
Lloh3:
	adrp	x26, _IORESOURCE_MEM@GOTPAGE
Lloh4:
	ldr	x26, [x26, _IORESOURCE_MEM@GOTPAGEOFF]
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #0
	bl	_platform_get_resource
	cbz	x0, LBB0_7
; %bb.4:
	mov	x24, x0
Lloh5:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #112
	bl	_devm_kzalloc
	cbz	x0, LBB0_8
; %bb.5:
	mov	x22, x0
	mov	x0, x19
	mov	x1, #0
	bl	_devm_clk_get
	str	x0, [x22, #48]
	bl	_IS_ERR
	cbz	x0, LBB0_11
; %bb.6:
	ldr	x0, [x22, #48]
	bl	_PTR_ERR
	mov	x24, x0
Lloh8:
	adrp	x1, l_.str@PAGE
Lloh9:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	mov	x2, x24
	bl	_dev_err
	b	LBB0_10
LBB0_7:
Lloh10:
	adrp	x8, _EINVAL@GOTPAGE
Lloh11:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_9
LBB0_8:
Lloh12:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
LBB0_9:
	ldr	w8, [x8]
	neg	w24, w8
LBB0_10:
	mov	x0, x24
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_11:
Lloh14:
	adrp	x1, l_.str.1@PAGE
Lloh15:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_devm_clk_get
	str	x0, [x22, #40]
	bl	_IS_ERR
	cbz	x0, LBB0_13
; %bb.12:
	str	xzr, [x22, #40]
LBB0_13:
	add	x23, x22, #72
	mov	x0, x19
	bl	_devm_pinctrl_get
	str	x0, [x22, #16]
	bl	_IS_ERR
	cbnz	x0, LBB0_15
; %bb.14:
	ldr	x0, [x22, #16]
Lloh16:
	adrp	x8, _PINCTRL_STATE_DEFAULT@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PINCTRL_STATE_DEFAULT@GOTPAGEOFF]
Lloh18:
	ldr	x1, [x8]
	bl	_pinctrl_lookup_state
	str	x0, [x22, #32]
	ldr	x0, [x22, #16]
Lloh19:
	adrp	x1, l_.str.2@PAGE
Lloh20:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_pinctrl_lookup_state
	str	x0, [x22, #24]
LBB0_15:
	mov	x0, x19
	mov	x1, x23
	bl	_tmio_mmc_host_alloc
	mov	x20, x0
	bl	_IS_ERR
	cbz	x0, LBB0_17
; %bb.16:
	mov	x0, x20
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_PTR_ERR
LBB0_17:
	cbz	x21, LBB0_19
; %bb.18:
	ldr	w8, [x21]
	ldr	w9, [x22, #72]
	orr	w8, w9, w8
	str	w8, [x22, #72]
	ldr	w8, [x21, #60]
	str	w8, [x22, #108]
	ldur	d0, [x21, #52]
	rev64.2s	v0, v0
	ldur	d1, [x22, #92]
	orr.8b	v0, v1, v0
	stur	d0, [x22, #92]
	ldr	w8, [x21, #48]
	ldr	x9, [x21, #8]
	str	x9, [x22, #80]
	ldp	w10, w9, [x21, #40]
	stp	w9, w8, [x22, #100]
	str	w10, [x22, #64]
	ldr	w8, [x21, #16]
	str	w8, [x20]
LBB0_19:
Lloh21:
	adrp	x8, _renesas_sdhi_write16_hook@GOTPAGE
Lloh22:
	ldr	x8, [x8, _renesas_sdhi_write16_hook@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	str	w8, [x20, #120]
Lloh24:
	adrp	x8, _renesas_sdhi_clk_enable@GOTPAGE
Lloh25:
	ldr	x8, [x8, _renesas_sdhi_clk_enable@GOTPAGEOFF]
	str	x8, [x20, #8]
Lloh26:
	adrp	x8, _renesas_sdhi_clk_disable@GOTPAGE
Lloh27:
	ldr	x8, [x8, _renesas_sdhi_clk_disable@GOTPAGEOFF]
	str	x8, [x20, #112]
Lloh28:
	adrp	x8, _renesas_sdhi_set_clock@GOTPAGE
Lloh29:
	ldr	x8, [x8, _renesas_sdhi_set_clock@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
Lloh31:
	adrp	x9, _renesas_sdhi_multi_io_quirk@GOTPAGE
Lloh32:
	ldr	x9, [x9, _renesas_sdhi_multi_io_quirk@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	stp	w9, w8, [x20, #104]
	str	x25, [x20, #96]
	cbz	x28, LBB0_24
; %bb.20:
	ldr	x8, [x28, #8]
	cbz	x8, LBB0_22
; %bb.21:
Lloh34:
	adrp	x8, _MMC_CAP2_HS400@GOTPAGE
Lloh35:
	ldr	x8, [x8, _MMC_CAP2_HS400@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
Lloh37:
	adrp	x9, _MMC_CAP2_HS400_ES@GOTPAGE
Lloh38:
	ldr	x9, [x9, _MMC_CAP2_HS400_ES@GOTPAGEOFF]
Lloh39:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	x9, [x20, #16]
	ldr	w10, [x9]
	bic	w8, w10, w8
	str	w8, [x9]
LBB0_22:
	ldr	x8, [x28]
	cbz	x8, LBB0_24
; %bb.23:
Lloh40:
	adrp	x8, _TMIO_MMC_HAVE_4TAP_HS400@GOTPAGE
Lloh41:
	ldr	x8, [x8, _TMIO_MMC_HAVE_4TAP_HS400@GOTPAGEOFF]
Lloh42:
	ldr	w8, [x8]
	ldr	w9, [x23]
	orr	w8, w9, w8
	str	w8, [x23]
LBB0_24:
	ldr	x0, [x20, #16]
	bl	_mmc_can_gpio_ro
	cbz	x0, LBB0_26
; %bb.25:
Lloh43:
	adrp	x8, _MMC_CAP2_NO_WRITE_PROTECT@GOTPAGE
Lloh44:
	ldr	x8, [x8, _MMC_CAP2_NO_WRITE_PROTECT@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	ldr	w9, [x22, #96]
	bic	w8, w9, w8
	str	w8, [x22, #96]
LBB0_26:
	ldr	w8, [x23]
Lloh46:
	adrp	x9, _TMIO_MMC_MIN_RCAR2@GOTPAGE
Lloh47:
	ldr	x9, [x9, _TMIO_MMC_MIN_RCAR2@GOTPAGEOFF]
Lloh48:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_30
; %bb.27:
Lloh49:
	adrp	x8, _renesas_sdhi_card_busy@GOTPAGE
Lloh50:
	ldr	x8, [x8, _renesas_sdhi_card_busy@GOTPAGEOFF]
Lloh51:
	ldr	w8, [x8]
	str	w8, [x20, #88]
Lloh52:
	adrp	x8, _renesas_sdhi_start_signal_voltage_switch@GOTPAGE
Lloh53:
	ldr	x8, [x8, _renesas_sdhi_start_signal_voltage_switch@GOTPAGEOFF]
Lloh54:
	ldr	w8, [x8]
Lloh55:
	adrp	x9, _TMIO_STAT_ALWAYS_SET_27@GOTPAGE
Lloh56:
	ldr	x9, [x9, _TMIO_STAT_ALWAYS_SET_27@GOTPAGEOFF]
Lloh57:
	ldr	w9, [x9]
	stp	w9, w8, [x20, #80]
	cbz	x21, LBB0_30
; %bb.28:
	ldr	x8, [x21, #32]
	cbz	x8, LBB0_30
; %bb.29:
	ldr	x9, [x20, #72]
	add	x8, x9, x8
	str	x8, [x22, #8]
Lloh58:
	adrp	x8, _MMC_CAP_HW_RESET@GOTPAGE
Lloh59:
	ldr	x8, [x8, _MMC_CAP_HW_RESET@GOTPAGEOFF]
Lloh60:
	ldr	w8, [x8]
	ldr	x9, [x20, #16]
	ldr	w10, [x9, #4]
	orr	w8, w10, w8
	str	w8, [x9, #4]
Lloh61:
	adrp	x8, _renesas_sdhi_hw_reset@GOTPAGE
Lloh62:
	ldr	x8, [x8, _renesas_sdhi_hw_reset@GOTPAGEOFF]
Lloh63:
	ldr	w8, [x8]
	str	w8, [x20, #64]
LBB0_30:
	ldr	w8, [x20]
	cbnz	w8, LBB0_33
; %bb.31:
	mov	x0, x24
	bl	_resource_size
	cmp	w0, #257
	b.lt	LBB0_33
; %bb.32:
	mov	w8, #1
	str	w8, [x20]
LBB0_33:
	cbz	x27, LBB0_35
; %bb.34:
	ldp	q0, q1, [x27]
	ldr	x8, [x27, #32]
	str	x8, [x23, #32]
	stp	q0, q1, [x23]
LBB0_35:
Lloh64:
	adrp	x8, _shdma_chan_filter@GOTPAGE
Lloh65:
	ldr	x8, [x8, _shdma_chan_filter@GOTPAGEOFF]
Lloh66:
	adrp	x9, _renesas_sdhi_enable_dma@GOTPAGE
Lloh67:
	ldr	x9, [x9, _renesas_sdhi_enable_dma@GOTPAGEOFF]
Lloh68:
	ldr	w8, [x8]
Lloh69:
	ldr	w9, [x9]
	stp	w9, w8, [x22, #56]
Lloh70:
	adrp	x8, _MMC_CAP_MMC_HIGHSPEED@GOTPAGE
Lloh71:
	ldr	x8, [x8, _MMC_CAP_MMC_HIGHSPEED@GOTPAGEOFF]
	mov	w9, #1
Lloh72:
	ldr	w8, [x8]
	ldr	w10, [x22, #92]
	orr	w8, w10, w8
	stp	w9, w8, [x22, #88]
Lloh73:
	adrp	x8, _TMIO_MMC_BLKSZ_2BYTES@GOTPAGE
Lloh74:
	ldr	x8, [x8, _TMIO_MMC_BLKSZ_2BYTES@GOTPAGEOFF]
Lloh75:
	ldr	w8, [x8]
	ldr	w9, [x22, #72]
Lloh76:
	adrp	x10, _TMIO_MMC_SDIO_IRQ@GOTPAGE
Lloh77:
	ldr	x10, [x10, _TMIO_MMC_SDIO_IRQ@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh78:
	ldr	w9, [x10]
	orr	w8, w9, w8
Lloh79:
	adrp	x9, _TMIO_MMC_HAVE_CMD12_CTRL@GOTPAGE
Lloh80:
	ldr	x9, [x9, _TMIO_MMC_HAVE_CMD12_CTRL@GOTPAGEOFF]
Lloh81:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh82:
	adrp	x9, _TMIO_MMC_SDIO_STATUS_SETBITS@GOTPAGE
Lloh83:
	ldr	x9, [x9, _TMIO_MMC_SDIO_STATUS_SETBITS@GOTPAGEOFF]
Lloh84:
	ldr	w9, [x9]
	orr	w8, w9, w8
	str	w8, [x22, #72]
	mov	x0, x20
	bl	_renesas_sdhi_clk_enable
	mov	x24, x0
	cbnz	w0, LBB0_67
; %bb.36:
Lloh85:
	adrp	x8, _CTL_VERSION@GOTPAGE
Lloh86:
	ldr	x8, [x8, _CTL_VERSION@GOTPAGEOFF]
Lloh87:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_sd_ctrl_read16
Lloh88:
	adrp	x8, _SDHI_VER_GEN2_SDR104@GOTPAGE
Lloh89:
	ldr	x8, [x8, _SDHI_VER_GEN2_SDR104@GOTPAGEOFF]
Lloh90:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ge	LBB0_39
; %bb.37:
	ldr	x9, [x22, #80]
Lloh91:
	adrp	x8, _U16_MAX@GOTPAGE
Lloh92:
	ldr	x8, [x8, _U16_MAX@GOTPAGEOFF]
Lloh93:
	ldr	x8, [x8]
	cmp	x9, x8
	b.le	LBB0_39
; %bb.38:
	str	x8, [x22, #80]
LBB0_39:
Lloh94:
	adrp	x8, _SDHI_VER_GEN2_SDR50@GOTPAGE
Lloh95:
	ldr	x8, [x8, _SDHI_VER_GEN2_SDR50@GOTPAGEOFF]
Lloh96:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_41
; %bb.40:
Lloh97:
	adrp	x8, _TMIO_MMC_HAVE_CBSY@GOTPAGE
Lloh98:
	ldr	x8, [x8, _TMIO_MMC_HAVE_CBSY@GOTPAGEOFF]
Lloh99:
	ldr	w8, [x8]
	ldr	w9, [x23]
	bic	w8, w9, w8
	str	w8, [x23]
LBB0_41:
	mov	x0, x20
	bl	_tmio_mmc_host_probe
	tbnz	w0, #31, LBB0_52
; %bb.42:
	cbz	x21, LBB0_55
; %bb.43:
	ldr	x8, [x21, #32]
	cbz	x8, LBB0_55
; %bb.44:
	ldr	x8, [x20, #16]
	ldr	w9, [x8, #4]
Lloh100:
	adrp	x10, _MMC_CAP_UHS_SDR104@GOTPAGE
Lloh101:
	ldr	x10, [x10, _MMC_CAP_UHS_SDR104@GOTPAGEOFF]
Lloh102:
	ldr	w10, [x10]
	tst	w10, w9
	b.ne	LBB0_46
; %bb.45:
	ldr	w9, [x8]
Lloh103:
	adrp	x10, _MMC_CAP2_HS200_1_8V_SDR@GOTPAGE
Lloh104:
	ldr	x10, [x10, _MMC_CAP2_HS200_1_8V_SDR@GOTPAGEOFF]
Lloh105:
	ldr	w10, [x10]
Lloh106:
	adrp	x11, _MMC_CAP2_HS400_1_8V@GOTPAGE
Lloh107:
	ldr	x11, [x11, _MMC_CAP2_HS400_1_8V@GOTPAGEOFF]
Lloh108:
	ldr	w11, [x11]
	orr	w10, w11, w10
	tst	w10, w9
	b.eq	LBB0_55
LBB0_46:
	ldr	w9, [x21, #20]
	cmp	w9, #1
	b.lt	LBB0_51
; %bb.47:
	ldr	x10, [x21, #24]
	mov	x11, x10
LBB0_48:                                ; =>This Inner Loop Header: Depth=1
	ldr	x12, [x11]
	cbz	x12, LBB0_53
; %bb.49:                               ;   in Loop: Header=BB0_48 Depth=1
	ldr	x13, [x8, #8]
	cmp	x12, x13
	b.eq	LBB0_53
; %bb.50:                               ;   in Loop: Header=BB0_48 Depth=1
	add	x11, x11, #16
	subs	x9, x9, #1
	b.ne	LBB0_48
LBB0_51:
	ldr	x0, [x20, #56]
Lloh109:
	adrp	x1, l_.str.3@PAGE
Lloh110:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_dev_warn
	b	LBB0_54
LBB0_52:
	mov	x24, x0
	b	LBB0_66
LBB0_53:
	ldr	d0, [x10, #8]
	str	d0, [x22]
LBB0_54:
Lloh111:
	adrp	x8, _renesas_sdhi_init_tuning@GOTPAGE
Lloh112:
	ldr	x8, [x8, _renesas_sdhi_init_tuning@GOTPAGEOFF]
Lloh113:
	ldr	w8, [x8]
	str	w8, [x20, #48]
Lloh114:
	adrp	x8, _renesas_sdhi_prepare_tuning@GOTPAGE
Lloh115:
	ldr	x8, [x8, _renesas_sdhi_prepare_tuning@GOTPAGEOFF]
Lloh116:
	ldr	w8, [x8]
Lloh117:
	adrp	x9, _renesas_sdhi_select_tuning@GOTPAGE
Lloh118:
	ldr	x9, [x9, _renesas_sdhi_select_tuning@GOTPAGEOFF]
Lloh119:
	ldr	w9, [x9]
	stp	w9, w8, [x20, #40]
Lloh120:
	adrp	x8, _renesas_sdhi_check_scc_error@GOTPAGE
Lloh121:
	ldr	x8, [x8, _renesas_sdhi_check_scc_error@GOTPAGEOFF]
Lloh122:
	adrp	x9, _renesas_sdhi_prepare_hs400_tuning@GOTPAGE
Lloh123:
	ldr	x9, [x9, _renesas_sdhi_prepare_hs400_tuning@GOTPAGEOFF]
Lloh124:
	ldr	w8, [x8]
Lloh125:
	ldr	w9, [x9]
	stp	w9, w8, [x20, #32]
Lloh126:
	adrp	x8, _renesas_sdhi_disable_scc@GOTPAGE
Lloh127:
	ldr	x8, [x8, _renesas_sdhi_disable_scc@GOTPAGEOFF]
Lloh128:
	ldr	w8, [x8]
Lloh129:
	adrp	x9, _renesas_sdhi_hs400_complete@GOTPAGE
Lloh130:
	ldr	x9, [x9, _renesas_sdhi_hs400_complete@GOTPAGEOFF]
Lloh131:
	ldr	w9, [x9]
	stp	w9, w8, [x20, #24]
LBB0_55:
	mov	x0, x19
	bl	_platform_irq_count
	mov	x24, x0
	tbnz	w0, #31, LBB0_65
; %bb.56:
	cbz	w24, LBB0_62
; %bb.57:
	mov	w21, #0
Lloh132:
	adrp	x25, _tmio_mmc_irq@GOTPAGE
Lloh133:
	ldr	x25, [x25, _tmio_mmc_irq@GOTPAGEOFF]
LBB0_58:                                ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x21
	bl	_platform_get_irq
	mov	x22, x0
	tbnz	w0, #31, LBB0_63
; %bb.59:                               ;   in Loop: Header=BB0_58 Depth=1
	ldr	w23, [x25]
	mov	x0, x19
	bl	_dev_name
	mov	x4, x0
	mov	x0, x19
	mov	x1, x22
	mov	x2, x23
	mov	w3, #0
	mov	x5, x20
	bl	_devm_request_irq
	cbnz	w0, LBB0_64
; %bb.60:                               ;   in Loop: Header=BB0_58 Depth=1
	add	w21, w21, #1
	cmp	w24, w21
	b.ne	LBB0_58
; %bb.61:
	ldr	x0, [x20, #16]
	bl	_mmc_hostname
	mov	x21, x0
	ldr	w1, [x26]
	mov	x0, x19
	mov	w2, #0
	bl	_platform_get_resource
	ldr	x3, [x0]
	ldr	x8, [x20, #16]
	ldr	x8, [x8, #8]
	mov	x9, #13531
	movk	x9, #55222, lsl #16
	movk	x9, #56962, lsl #32
	movk	x9, #17179, lsl #48
	smulh	x8, x8, x9
	lsr	x9, x8, #63
	lsr	x8, x8, #18
	add	w4, w8, w9
Lloh134:
	adrp	x1, l_.str.4@PAGE
Lloh135:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	mov	x2, x21
	bl	_dev_info
	mov	w24, #0
	b	LBB0_10
LBB0_62:
Lloh136:
	adrp	x8, _ENXIO@GOTPAGE
Lloh137:
	ldr	x8, [x8, _ENXIO@GOTPAGEOFF]
Lloh138:
	ldr	w8, [x8]
	neg	w24, w8
	b	LBB0_65
LBB0_63:
	mov	x24, x22
	b	LBB0_65
LBB0_64:
	mov	x24, x0
LBB0_65:
	mov	x0, x20
	bl	_tmio_mmc_host_remove
LBB0_66:
	mov	x0, x20
	bl	_renesas_sdhi_clk_disable
LBB0_67:
	mov	x0, x20
	bl	_tmio_mmc_host_free
	b	LBB0_10
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh68
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpAdd	Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh129, Lloh130, Lloh131
	.loh AdrpLdrGotLdr	Lloh126, Lloh127, Lloh128
	.loh AdrpLdrGotLdr	Lloh122, Lloh123, Lloh125
	.loh AdrpLdrGotLdr	Lloh120, Lloh121, Lloh124
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGot	Lloh132, Lloh133
	.loh AdrpAdd	Lloh134, Lloh135
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.cfi_endproc
                                        ; -- End function
	.comm	_sdhi_quirks_match,4,2          ; @sdhi_quirks_match
	.comm	_IORESOURCE_MEM,4,2             ; @IORESOURCE_MEM
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"cannot get clock: %d\n"

l_.str.1:                               ; @.str.1
	.asciz	"cd"

	.comm	_PINCTRL_STATE_DEFAULT,8,3      ; @PINCTRL_STATE_DEFAULT
l_.str.2:                               ; @.str.2
	.asciz	"state_uhs"

	.comm	_renesas_sdhi_write16_hook,4,2  ; @renesas_sdhi_write16_hook
	.comm	_renesas_sdhi_set_clock,4,2     ; @renesas_sdhi_set_clock
	.comm	_renesas_sdhi_multi_io_quirk,4,2 ; @renesas_sdhi_multi_io_quirk
	.comm	_MMC_CAP2_HS400,4,2             ; @MMC_CAP2_HS400
	.comm	_MMC_CAP2_HS400_ES,4,2          ; @MMC_CAP2_HS400_ES
	.comm	_TMIO_MMC_HAVE_4TAP_HS400,4,2   ; @TMIO_MMC_HAVE_4TAP_HS400
	.comm	_MMC_CAP2_NO_WRITE_PROTECT,4,2  ; @MMC_CAP2_NO_WRITE_PROTECT
	.comm	_TMIO_MMC_MIN_RCAR2,4,2         ; @TMIO_MMC_MIN_RCAR2
	.comm	_renesas_sdhi_card_busy,4,2     ; @renesas_sdhi_card_busy
	.comm	_renesas_sdhi_start_signal_voltage_switch,4,2 ; @renesas_sdhi_start_signal_voltage_switch
	.comm	_TMIO_STAT_ALWAYS_SET_27,4,2    ; @TMIO_STAT_ALWAYS_SET_27
	.comm	_MMC_CAP_HW_RESET,4,2           ; @MMC_CAP_HW_RESET
	.comm	_renesas_sdhi_hw_reset,4,2      ; @renesas_sdhi_hw_reset
	.comm	_shdma_chan_filter,4,2          ; @shdma_chan_filter
	.comm	_renesas_sdhi_enable_dma,4,2    ; @renesas_sdhi_enable_dma
	.comm	_MMC_CAP_MMC_HIGHSPEED,4,2      ; @MMC_CAP_MMC_HIGHSPEED
	.comm	_TMIO_MMC_BLKSZ_2BYTES,4,2      ; @TMIO_MMC_BLKSZ_2BYTES
	.comm	_TMIO_MMC_SDIO_IRQ,4,2          ; @TMIO_MMC_SDIO_IRQ
	.comm	_TMIO_MMC_HAVE_CMD12_CTRL,4,2   ; @TMIO_MMC_HAVE_CMD12_CTRL
	.comm	_TMIO_MMC_SDIO_STATUS_SETBITS,4,2 ; @TMIO_MMC_SDIO_STATUS_SETBITS
	.comm	_CTL_VERSION,4,2                ; @CTL_VERSION
	.comm	_SDHI_VER_GEN2_SDR104,8,3       ; @SDHI_VER_GEN2_SDR104
	.comm	_U16_MAX,8,3                    ; @U16_MAX
	.comm	_SDHI_VER_GEN2_SDR50,8,3        ; @SDHI_VER_GEN2_SDR50
	.comm	_TMIO_MMC_HAVE_CBSY,4,2         ; @TMIO_MMC_HAVE_CBSY
	.comm	_MMC_CAP_UHS_SDR104,4,2         ; @MMC_CAP_UHS_SDR104
	.comm	_MMC_CAP2_HS200_1_8V_SDR,4,2    ; @MMC_CAP2_HS200_1_8V_SDR
	.comm	_MMC_CAP2_HS400_1_8V,4,2        ; @MMC_CAP2_HS400_1_8V
l_.str.3:                               ; @.str.3
	.asciz	"Unknown clock rate for SDR104\n"

	.comm	_renesas_sdhi_init_tuning,4,2   ; @renesas_sdhi_init_tuning
	.comm	_renesas_sdhi_prepare_tuning,4,2 ; @renesas_sdhi_prepare_tuning
	.comm	_renesas_sdhi_select_tuning,4,2 ; @renesas_sdhi_select_tuning
	.comm	_renesas_sdhi_check_scc_error,4,2 ; @renesas_sdhi_check_scc_error
	.comm	_renesas_sdhi_prepare_hs400_tuning,4,2 ; @renesas_sdhi_prepare_hs400_tuning
	.comm	_renesas_sdhi_disable_scc,4,2   ; @renesas_sdhi_disable_scc
	.comm	_renesas_sdhi_hs400_complete,4,2 ; @renesas_sdhi_hs400_complete
	.comm	_ENXIO,4,2                      ; @ENXIO
	.comm	_tmio_mmc_irq,4,2               ; @tmio_mmc_irq
l_.str.4:                               ; @.str.4
	.asciz	"%s base at 0x%08lx max clock rate %u MHz\n"

.subsections_via_symbols
