	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function __alx_open
___alx_open:                            ## @__alx_open
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %r15
	callq	_alx_enable_msix
	testl	%eax, %eax
	js	LBB0_1
LBB0_2:
	testl	%r14d, %r14d
	jne	LBB0_4
## %bb.3:
	movl	4(%r15), %edi
	callq	_netif_carrier_off
LBB0_4:
	movq	%r15, %rdi
	callq	_alx_alloc_napis
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_11
## %bb.5:
	movq	%r15, %rdi
	callq	_alx_alloc_rings
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_10
## %bb.6:
	movq	%r15, %rdi
	callq	_alx_configure
	movq	%r15, %rdi
	callq	_alx_request_irq
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_7
LBB0_10:
	movq	%r15, %rdi
	callq	_alx_free_rings
	movq	%r15, %rdi
	callq	_alx_free_napis
LBB0_11:
	movl	(%r15), %edi
	callq	_pci_free_irq_vectors
	jmp	LBB0_12
LBB0_1:
	movq	%r15, %rdi
	callq	_alx_init_intr
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_2
LBB0_12:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_7:
	movq	%r15, %rdi
	callq	_alx_reinit_rings
	movl	4(%r15), %edi
	movl	12(%r15), %esi
	callq	_netif_set_real_num_tx_queues
	movl	4(%r15), %edi
	movl	8(%r15), %esi
	callq	_netif_set_real_num_rx_queues
	movq	_ALX_ISR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_ALX_ISR_DIS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	movq	%r15, %rdi
	callq	_alx_write_mem32
	movq	%r15, %rdi
	callq	_alx_irq_enable
	testl	%r14d, %r14d
	jne	LBB0_9
## %bb.8:
	movl	4(%r15), %edi
	callq	_netif_tx_start_all_queues
LBB0_9:
	movq	%r15, %rdi
	callq	_alx_schedule_link_check
	xorl	%ebx, %ebx
	jmp	LBB0_12
	.cfi_endproc
                                        ## -- End function
	.comm	_ALX_ISR,4,2                    ## @ALX_ISR
	.comm	_ALX_ISR_DIS,8,3                ## @ALX_ISR_DIS
	.no_dead_strip	___alx_open
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function __alx_open
___alx_open:                            ; @__alx_open
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	bl	_alx_enable_msix
	tbnz	w0, #31, LBB0_8
LBB0_1:
	cbnz	w20, LBB0_3
; %bb.2:
	ldr	w0, [x19, #4]
	bl	_netif_carrier_off
LBB0_3:
	mov	x0, x19
	bl	_alx_alloc_napis
	mov	x21, x0
	cbnz	w0, LBB0_7
; %bb.4:
	mov	x0, x19
	bl	_alx_alloc_rings
	mov	x21, x0
	cbnz	w0, LBB0_6
; %bb.5:
	mov	x0, x19
	bl	_alx_configure
	mov	x0, x19
	bl	_alx_request_irq
	mov	x21, x0
	cbz	w0, LBB0_10
LBB0_6:
	mov	x0, x19
	bl	_alx_free_rings
	mov	x0, x19
	bl	_alx_free_napis
LBB0_7:
	ldr	w0, [x19]
	bl	_pci_free_irq_vectors
	b	LBB0_9
LBB0_8:
	mov	x0, x19
	bl	_alx_init_intr
	mov	x21, x0
	cbz	w0, LBB0_1
LBB0_9:
	mov	x0, x21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_10:
	mov	x0, x19
	bl	_alx_reinit_rings
	ldr	w0, [x19, #4]
	ldr	w1, [x19, #12]
	bl	_netif_set_real_num_tx_queues
	ldp	w0, w1, [x19, #4]
	bl	_netif_set_real_num_rx_queues
Lloh0:
	adrp	x8, _ALX_ISR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ALX_ISR@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _ALX_ISR_DIS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ALX_ISR_DIS@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	mvn	w2, w8
	mov	x0, x19
	bl	_alx_write_mem32
	mov	x0, x19
	bl	_alx_irq_enable
	cbnz	w20, LBB0_12
; %bb.11:
	ldr	w0, [x19, #4]
	bl	_netif_tx_start_all_queues
LBB0_12:
	mov	x0, x19
	bl	_alx_schedule_link_check
	mov	w21, #0
	b	LBB0_9
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_ALX_ISR,4,2                    ; @ALX_ISR
	.comm	_ALX_ISR_DIS,8,3                ; @ALX_ISR_DIS
	.no_dead_strip	___alx_open
.subsections_via_symbols
