	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mv88e6352_port_link_state      ## -- Begin function mv88e6352_port_link_state
	.p2align	4, 0x90
_mv88e6352_port_link_state:             ## @mv88e6352_port_link_state
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movl	%esi, %r15d
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movslq	%esi, %rdx
	movl	$-132, %ecx
	addl	(%rax,%rdx,4), %ecx
	cmpl	$5, %ecx
	ja	LBB0_14
## %bb.1:
	movq	_PHY_INTERFACE_MODE_1000BASEX@GOTPCREL(%rip), %rax
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%rcx,4), %rcx
	addq	%rdx, %rcx
	jmpq	*%rcx
LBB0_12:
	movq	_PHY_INTERFACE_MODE_XAUI@GOTPCREL(%rip), %rax
	jmp	LBB0_15
LBB0_14:
	movq	_PHY_INTERFACE_MODE_NA@GOTPCREL(%rip), %rax
	jmp	LBB0_15
LBB0_10:
	movq	_PHY_INTERFACE_MODE_SGMII@GOTPCREL(%rip), %rax
	jmp	LBB0_15
LBB0_13:
	movq	_PHY_INTERFACE_MODE_RXAUI@GOTPCREL(%rip), %rax
	jmp	LBB0_15
LBB0_2:
	movq	_MV88E6XXX_PORT_MAC_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-28(%rbp), %rcx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_mv88e6xxx_port_read
	testl	%eax, %eax
	jne	LBB0_28
## %bb.3:
	movl	-28(%rbp), %eax
	movq	_MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK@GOTPCREL(%rip), %rdx
	movq	_MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%eax, (%rdx)
	je	LBB0_7
## %bb.4:
	testl	%eax, %ecx
	jne	LBB0_5
## %bb.6:
	movq	_PHY_INTERFACE_MODE_RGMII_RXID@GOTPCREL(%rip), %rax
	jmp	LBB0_15
LBB0_11:
	movq	_PHY_INTERFACE_MODE_2500BASEX@GOTPCREL(%rip), %rax
LBB0_15:
	movl	(%rax), %eax
	movl	%eax, 20(%r14)
	movq	_MV88E6XXX_PORT_STS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	-28(%rbp), %rcx
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_mv88e6xxx_port_read
	testl	%eax, %eax
	jne	LBB0_28
## %bb.16:
	movl	-28(%rbp), %eax
	movq	_MV88E6XXX_PORT_STS_SPEED_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	%eax, %edx
	addl	$-128, %edx
	cmpl	$3, %edx
	ja	LBB0_24
## %bb.17:
	movq	_SPEED_10@GOTPCREL(%rip), %rcx
	leaq	LJTI0_1(%rip), %rsi
	movslq	(%rsi,%rdx,4), %rdx
	addq	%rsi, %rdx
	jmpq	*%rdx
LBB0_20:
	movq	_MV88E6XXX_PORT_STS_CMODE_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	cmpl	$136, %ecx
	jne	LBB0_21
## %bb.22:
	movq	_SPEED_2500@GOTPCREL(%rip), %rcx
	jmp	LBB0_23
LBB0_19:
	movq	_SPEED_1000@GOTPCREL(%rip), %rcx
	jmp	LBB0_23
LBB0_18:
	movq	_SPEED_100@GOTPCREL(%rip), %rcx
	jmp	LBB0_23
LBB0_21:
	movq	_SPEED_10000@GOTPCREL(%rip), %rcx
LBB0_23:
	movl	(%rcx), %ecx
	movl	%ecx, 16(%r14)
LBB0_24:
	movq	_MV88E6XXX_PORT_STS_DUPLEX@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%eax, %ecx
	jne	LBB0_25
## %bb.26:
	movq	_DUPLEX_HALF@GOTPCREL(%rip), %rcx
	jmp	LBB0_27
LBB0_25:
	movq	_DUPLEX_FULL@GOTPCREL(%rip), %rcx
LBB0_27:
	movl	(%rcx), %ecx
	movl	%ecx, 12(%r14)
	movq	_MV88E6XXX_PORT_STS_LINK@GOTPCREL(%rip), %rcx
	xorl	%edx, %edx
	andl	(%rcx), %eax
	setne	%dl
	movl	%edx, (%r14)
	movl	$1, 4(%r14)
	movl	%edx, 8(%r14)
	xorl	%eax, %eax
LBB0_28:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_7:
	testl	%eax, %ecx
	jne	LBB0_8
## %bb.9:
	movq	_PHY_INTERFACE_MODE_RGMII@GOTPCREL(%rip), %rax
	jmp	LBB0_15
LBB0_5:
	movq	_PHY_INTERFACE_MODE_RGMII_ID@GOTPCREL(%rip), %rax
	jmp	LBB0_15
LBB0_8:
	movq	_PHY_INTERFACE_MODE_RGMII_TXID@GOTPCREL(%rip), %rax
	jmp	LBB0_15
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_12, LBB0_12-LJTI0_0
.set L0_0_set_10, LBB0_10-LJTI0_0
.set L0_0_set_13, LBB0_13-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
.set L0_0_set_11, LBB0_11-LJTI0_0
.set L0_0_set_15, LBB0_15-LJTI0_0
LJTI0_0:
	.long	L0_0_set_12
	.long	L0_0_set_10
	.long	L0_0_set_13
	.long	L0_0_set_2
	.long	L0_0_set_11
	.long	L0_0_set_15
.set L0_1_set_20, LBB0_20-LJTI0_1
.set L0_1_set_19, LBB0_19-LJTI0_1
.set L0_1_set_18, LBB0_18-LJTI0_1
.set L0_1_set_23, LBB0_23-LJTI0_1
LJTI0_1:
	.long	L0_1_set_20
	.long	L0_1_set_19
	.long	L0_1_set_18
	.long	L0_1_set_23
	.end_data_region
                                        ## -- End function
	.comm	_MV88E6XXX_PORT_MAC_CTL,4,2     ## @MV88E6XXX_PORT_MAC_CTL
	.comm	_MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK,4,2 ## @MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK
	.comm	_MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK,4,2 ## @MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK
	.comm	_PHY_INTERFACE_MODE_RGMII_ID,4,2 ## @PHY_INTERFACE_MODE_RGMII_ID
	.comm	_PHY_INTERFACE_MODE_RGMII_RXID,4,2 ## @PHY_INTERFACE_MODE_RGMII_RXID
	.comm	_PHY_INTERFACE_MODE_RGMII_TXID,4,2 ## @PHY_INTERFACE_MODE_RGMII_TXID
	.comm	_PHY_INTERFACE_MODE_RGMII,4,2   ## @PHY_INTERFACE_MODE_RGMII
	.comm	_PHY_INTERFACE_MODE_1000BASEX,4,2 ## @PHY_INTERFACE_MODE_1000BASEX
	.comm	_PHY_INTERFACE_MODE_SGMII,4,2   ## @PHY_INTERFACE_MODE_SGMII
	.comm	_PHY_INTERFACE_MODE_2500BASEX,4,2 ## @PHY_INTERFACE_MODE_2500BASEX
	.comm	_PHY_INTERFACE_MODE_XAUI,4,2    ## @PHY_INTERFACE_MODE_XAUI
	.comm	_PHY_INTERFACE_MODE_RXAUI,4,2   ## @PHY_INTERFACE_MODE_RXAUI
	.comm	_PHY_INTERFACE_MODE_NA,4,2      ## @PHY_INTERFACE_MODE_NA
	.comm	_MV88E6XXX_PORT_STS,4,2         ## @MV88E6XXX_PORT_STS
	.comm	_MV88E6XXX_PORT_STS_SPEED_MASK,4,2 ## @MV88E6XXX_PORT_STS_SPEED_MASK
	.comm	_SPEED_10,4,2                   ## @SPEED_10
	.comm	_SPEED_100,4,2                  ## @SPEED_100
	.comm	_SPEED_1000,4,2                 ## @SPEED_1000
	.comm	_MV88E6XXX_PORT_STS_CMODE_MASK,4,2 ## @MV88E6XXX_PORT_STS_CMODE_MASK
	.comm	_SPEED_2500,4,2                 ## @SPEED_2500
	.comm	_SPEED_10000,4,2                ## @SPEED_10000
	.comm	_MV88E6XXX_PORT_STS_DUPLEX,4,2  ## @MV88E6XXX_PORT_STS_DUPLEX
	.comm	_DUPLEX_FULL,4,2                ## @DUPLEX_FULL
	.comm	_DUPLEX_HALF,4,2                ## @DUPLEX_HALF
	.comm	_MV88E6XXX_PORT_STS_LINK,4,2    ## @MV88E6XXX_PORT_STS_LINK
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_mv88e6352_port_link_state      ; -- Begin function mv88e6352_port_link_state
	.p2align	2
_mv88e6352_port_link_state:             ; @mv88e6352_port_link_state
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	ldr	x8, [x0]
	ldr	w8, [x8, w1, sxtw #2]
	sub	w9, w8, #132
	cmp	w9, #5
	b.hi	LBB0_3
; %bb.1:
Lloh0:
	adrp	x8, _PHY_INTERFACE_MODE_1000BASEX@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PHY_INTERFACE_MODE_1000BASEX@GOTPAGEOFF]
Lloh2:
	adrp	x10, lJTI0_0@PAGE
Lloh3:
	add	x10, x10, lJTI0_0@PAGEOFF
	adr	x11, LBB0_2
	ldrb	w12, [x10, x9]
	add	x11, x11, x12, lsl #2
	br	x11
LBB0_2:
Lloh4:
	adrp	x8, _PHY_INTERFACE_MODE_XAUI@GOTPAGE
Lloh5:
	ldr	x8, [x8, _PHY_INTERFACE_MODE_XAUI@GOTPAGEOFF]
	b	LBB0_12
LBB0_3:
Lloh6:
	adrp	x8, _PHY_INTERFACE_MODE_NA@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PHY_INTERFACE_MODE_NA@GOTPAGEOFF]
	b	LBB0_12
LBB0_4:
Lloh8:
	adrp	x8, _PHY_INTERFACE_MODE_SGMII@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PHY_INTERFACE_MODE_SGMII@GOTPAGEOFF]
	b	LBB0_12
LBB0_5:
Lloh10:
	adrp	x8, _PHY_INTERFACE_MODE_RXAUI@GOTPAGE
Lloh11:
	ldr	x8, [x8, _PHY_INTERFACE_MODE_RXAUI@GOTPAGEOFF]
	b	LBB0_12
LBB0_6:
Lloh12:
	adrp	x8, _MV88E6XXX_PORT_MAC_CTL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MV88E6XXX_PORT_MAC_CTL@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	add	x3, sp, #12
	mov	x0, x21
	mov	x1, x20
	bl	_mv88e6xxx_port_read
	cbnz	w0, LBB0_20
; %bb.7:
	ldr	w9, [sp, #12]
Lloh15:
	adrp	x8, _MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK@GOTPAGEOFF]
Lloh17:
	ldr	w10, [x8]
Lloh18:
	adrp	x8, _MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	and	w8, w8, w9
	tst	w10, w9
	b.eq	LBB0_10
; %bb.8:
Lloh21:
	adrp	x9, _PHY_INTERFACE_MODE_RGMII_ID@GOTPAGE
Lloh22:
	ldr	x9, [x9, _PHY_INTERFACE_MODE_RGMII_ID@GOTPAGEOFF]
Lloh23:
	adrp	x10, _PHY_INTERFACE_MODE_RGMII_RXID@GOTPAGE
Lloh24:
	ldr	x10, [x10, _PHY_INTERFACE_MODE_RGMII_RXID@GOTPAGEOFF]
	b	LBB0_11
LBB0_9:
Lloh25:
	adrp	x8, _PHY_INTERFACE_MODE_2500BASEX@GOTPAGE
Lloh26:
	ldr	x8, [x8, _PHY_INTERFACE_MODE_2500BASEX@GOTPAGEOFF]
	b	LBB0_12
LBB0_10:
Lloh27:
	adrp	x9, _PHY_INTERFACE_MODE_RGMII_TXID@GOTPAGE
Lloh28:
	ldr	x9, [x9, _PHY_INTERFACE_MODE_RGMII_TXID@GOTPAGEOFF]
Lloh29:
	adrp	x10, _PHY_INTERFACE_MODE_RGMII@GOTPAGE
Lloh30:
	ldr	x10, [x10, _PHY_INTERFACE_MODE_RGMII@GOTPAGEOFF]
LBB0_11:
	cmp	w8, #0
	csel	x8, x10, x9, eq
LBB0_12:
	ldr	w8, [x8]
	str	w8, [x19, #20]
Lloh31:
	adrp	x8, _MV88E6XXX_PORT_STS@GOTPAGE
Lloh32:
	ldr	x8, [x8, _MV88E6XXX_PORT_STS@GOTPAGEOFF]
Lloh33:
	ldr	w2, [x8]
	add	x3, sp, #12
	mov	x0, x21
	mov	x1, x20
	bl	_mv88e6xxx_port_read
	cbnz	w0, LBB0_20
; %bb.13:
	ldr	w8, [sp, #12]
Lloh34:
	adrp	x9, _MV88E6XXX_PORT_STS_SPEED_MASK@GOTPAGE
Lloh35:
	ldr	x9, [x9, _MV88E6XXX_PORT_STS_SPEED_MASK@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	and	w9, w9, w8
	sub	w10, w9, #128
	cmp	w10, #3
	b.hi	LBB0_19
; %bb.14:
Lloh37:
	adrp	x9, _SPEED_10@GOTPAGE
Lloh38:
	ldr	x9, [x9, _SPEED_10@GOTPAGEOFF]
Lloh39:
	adrp	x11, lJTI0_1@PAGE
Lloh40:
	add	x11, x11, lJTI0_1@PAGEOFF
	adr	x12, LBB0_15
	ldrb	w13, [x11, x10]
	add	x12, x12, x13, lsl #2
	br	x12
LBB0_15:
Lloh41:
	adrp	x9, _MV88E6XXX_PORT_STS_CMODE_MASK@GOTPAGE
Lloh42:
	ldr	x9, [x9, _MV88E6XXX_PORT_STS_CMODE_MASK@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	and	w9, w9, w8
Lloh44:
	adrp	x10, _SPEED_10000@GOTPAGE
Lloh45:
	ldr	x10, [x10, _SPEED_10000@GOTPAGEOFF]
Lloh46:
	adrp	x11, _SPEED_2500@GOTPAGE
Lloh47:
	ldr	x11, [x11, _SPEED_2500@GOTPAGEOFF]
	cmp	w9, #136
	csel	x9, x11, x10, eq
	b	LBB0_18
LBB0_16:
Lloh48:
	adrp	x9, _SPEED_1000@GOTPAGE
Lloh49:
	ldr	x9, [x9, _SPEED_1000@GOTPAGEOFF]
	b	LBB0_18
LBB0_17:
Lloh50:
	adrp	x9, _SPEED_100@GOTPAGE
Lloh51:
	ldr	x9, [x9, _SPEED_100@GOTPAGEOFF]
LBB0_18:
	ldr	w9, [x9]
	str	w9, [x19, #16]
LBB0_19:
	mov	w0, #0
Lloh52:
	adrp	x9, _MV88E6XXX_PORT_STS_DUPLEX@GOTPAGE
Lloh53:
	ldr	x9, [x9, _MV88E6XXX_PORT_STS_DUPLEX@GOTPAGEOFF]
Lloh54:
	ldr	w9, [x9]
Lloh55:
	adrp	x10, _DUPLEX_FULL@GOTPAGE
Lloh56:
	ldr	x10, [x10, _DUPLEX_FULL@GOTPAGEOFF]
	tst	w9, w8
Lloh57:
	adrp	x9, _DUPLEX_HALF@GOTPAGE
Lloh58:
	ldr	x9, [x9, _DUPLEX_HALF@GOTPAGEOFF]
	csel	x9, x9, x10, eq
	ldr	w9, [x9]
Lloh59:
	adrp	x10, _MV88E6XXX_PORT_STS_LINK@GOTPAGE
Lloh60:
	ldr	x10, [x10, _MV88E6XXX_PORT_STS_LINK@GOTPAGEOFF]
Lloh61:
	ldr	w10, [x10]
	tst	w10, w8
	cset	w8, ne
	mov	w10, #1
	stp	w8, w10, [x19]
	stp	w8, w9, [x19, #8]
LBB0_20:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpAdd	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh57, Lloh58
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_4-LBB0_2)>>2
	.byte	(LBB0_5-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_9-LBB0_2)>>2
	.byte	(LBB0_12-LBB0_2)>>2
lJTI0_1:
	.byte	(LBB0_15-LBB0_15)>>2
	.byte	(LBB0_16-LBB0_15)>>2
	.byte	(LBB0_17-LBB0_15)>>2
	.byte	(LBB0_18-LBB0_15)>>2
                                        ; -- End function
	.comm	_MV88E6XXX_PORT_MAC_CTL,4,2     ; @MV88E6XXX_PORT_MAC_CTL
	.comm	_MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK,4,2 ; @MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK
	.comm	_MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK,4,2 ; @MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK
	.comm	_PHY_INTERFACE_MODE_RGMII_ID,4,2 ; @PHY_INTERFACE_MODE_RGMII_ID
	.comm	_PHY_INTERFACE_MODE_RGMII_RXID,4,2 ; @PHY_INTERFACE_MODE_RGMII_RXID
	.comm	_PHY_INTERFACE_MODE_RGMII_TXID,4,2 ; @PHY_INTERFACE_MODE_RGMII_TXID
	.comm	_PHY_INTERFACE_MODE_RGMII,4,2   ; @PHY_INTERFACE_MODE_RGMII
	.comm	_PHY_INTERFACE_MODE_1000BASEX,4,2 ; @PHY_INTERFACE_MODE_1000BASEX
	.comm	_PHY_INTERFACE_MODE_SGMII,4,2   ; @PHY_INTERFACE_MODE_SGMII
	.comm	_PHY_INTERFACE_MODE_2500BASEX,4,2 ; @PHY_INTERFACE_MODE_2500BASEX
	.comm	_PHY_INTERFACE_MODE_XAUI,4,2    ; @PHY_INTERFACE_MODE_XAUI
	.comm	_PHY_INTERFACE_MODE_RXAUI,4,2   ; @PHY_INTERFACE_MODE_RXAUI
	.comm	_PHY_INTERFACE_MODE_NA,4,2      ; @PHY_INTERFACE_MODE_NA
	.comm	_MV88E6XXX_PORT_STS,4,2         ; @MV88E6XXX_PORT_STS
	.comm	_MV88E6XXX_PORT_STS_SPEED_MASK,4,2 ; @MV88E6XXX_PORT_STS_SPEED_MASK
	.comm	_SPEED_10,4,2                   ; @SPEED_10
	.comm	_SPEED_100,4,2                  ; @SPEED_100
	.comm	_SPEED_1000,4,2                 ; @SPEED_1000
	.comm	_MV88E6XXX_PORT_STS_CMODE_MASK,4,2 ; @MV88E6XXX_PORT_STS_CMODE_MASK
	.comm	_SPEED_2500,4,2                 ; @SPEED_2500
	.comm	_SPEED_10000,4,2                ; @SPEED_10000
	.comm	_MV88E6XXX_PORT_STS_DUPLEX,4,2  ; @MV88E6XXX_PORT_STS_DUPLEX
	.comm	_DUPLEX_FULL,4,2                ; @DUPLEX_FULL
	.comm	_DUPLEX_HALF,4,2                ; @DUPLEX_HALF
	.comm	_MV88E6XXX_PORT_STS_LINK,4,2    ; @MV88E6XXX_PORT_STS_LINK
.subsections_via_symbols
