	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdhci_snps_set_clock
_sdhci_snps_set_clock:                  ## @sdhci_snps_set_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %r13
	movq	_SDHCI_VENDOR_PTR_R@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdhci_readw
	movq	%rax, %r14
	movq	_SDHC_AT_CTRL_R@GOTPCREL(%rip), %r12
	movq	(%r12), %rsi
	addq	%rax, %rsi
	movq	%r13, %rdi
	callq	_sdhci_readl
	movq	_SDHC_SW_TUNE_EN@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	notq	%rsi
	andq	%rax, %rsi
	movq	(%r12), %rdx
	addq	%r14, %rdx
	movq	%r13, %rdi
	callq	_sdhci_writel
	cmpl	$52000000, %r15d                ## imm = 0x3197500
	ja	LBB0_2
## %bb.1:
	movq	%r13, %rdi
	movl	%r15d, %esi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_sdhci_set_clock                ## TAILCALL
LBB0_2:
	movq	_SDHC_GPIO_OUT@GOTPCREL(%rip), %r12
	movq	(%r12), %rsi
	addq	%r14, %rsi
	movq	%r13, %rdi
	callq	_sdhci_readl
	movq	_SDHC_CCLK_MMCM_RST@GOTPCREL(%rip), %rcx
	orq	(%rcx), %rax
	movq	(%r12), %rdx
	addq	%r14, %rdx
	movq	%r13, %rdi
	movq	%rax, %rsi
	callq	_sdhci_writel
	cmpl	$100000000, %r15d               ## imm = 0x5F5E100
	movq	_DIV_REG_200_MHZ@GOTPCREL(%rip), %rax
	cmoveq	_DIV_REG_100_MHZ@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	_SDHC_MMCM_DIV_REG@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	_CLKFBOUT_200_MHZ@GOTPCREL(%rip), %rbx
	cmoveq	_CLKFBOUT_100_MHZ@GOTPCREL(%rip), %rbx
	movq	%r13, %rdi
	callq	_sdhci_writel
	movq	(%rbx), %rsi
	movq	_SDHC_MMCM_CLKFBOUT@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%r13, %rdi
	callq	_sdhci_writel
	movq	(%r12), %rsi
	addq	%r14, %rsi
	movq	%r13, %rdi
	callq	_sdhci_readl
	movq	_SDHC_CCLK_MMCM_RST@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	notq	%rsi
	andq	%rax, %rsi
	addq	(%r12), %r14
	movq	%r13, %rdi
	movq	%r14, %rdx
	callq	_sdhci_writel
	movq	_SDHCI_PROG_CLOCK_MODE@GOTPCREL(%rip), %rax
	movq	_SDHCI_CLOCK_INT_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	_SDHCI_CLOCK_CARD_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %esi
	movq	_SDHCI_CLOCK_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r13, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_sdhci_writew                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SDHCI_VENDOR_PTR_R,4,2         ## @SDHCI_VENDOR_PTR_R
	.comm	_SDHC_AT_CTRL_R,8,3             ## @SDHC_AT_CTRL_R
	.comm	_SDHC_SW_TUNE_EN,8,3            ## @SDHC_SW_TUNE_EN
	.comm	_SDHC_GPIO_OUT,8,3              ## @SDHC_GPIO_OUT
	.comm	_SDHC_CCLK_MMCM_RST,8,3         ## @SDHC_CCLK_MMCM_RST
	.comm	_DIV_REG_100_MHZ,8,3            ## @DIV_REG_100_MHZ
	.comm	_SDHC_MMCM_DIV_REG,8,3          ## @SDHC_MMCM_DIV_REG
	.comm	_CLKFBOUT_100_MHZ,8,3           ## @CLKFBOUT_100_MHZ
	.comm	_SDHC_MMCM_CLKFBOUT,8,3         ## @SDHC_MMCM_CLKFBOUT
	.comm	_DIV_REG_200_MHZ,8,3            ## @DIV_REG_200_MHZ
	.comm	_CLKFBOUT_200_MHZ,8,3           ## @CLKFBOUT_200_MHZ
	.comm	_SDHCI_PROG_CLOCK_MODE,4,2      ## @SDHCI_PROG_CLOCK_MODE
	.comm	_SDHCI_CLOCK_INT_EN,4,2         ## @SDHCI_CLOCK_INT_EN
	.comm	_SDHCI_CLOCK_CARD_EN,4,2        ## @SDHCI_CLOCK_CARD_EN
	.comm	_SDHCI_CLOCK_CONTROL,4,2        ## @SDHCI_CLOCK_CONTROL
	.no_dead_strip	_sdhci_snps_set_clock
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdhci_snps_set_clock
_sdhci_snps_set_clock:                  ; @sdhci_snps_set_clock
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _SDHCI_VENDOR_PTR_R@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SDHCI_VENDOR_PTR_R@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_sdhci_readw
	mov	x20, x0
Lloh3:
	adrp	x22, _SDHC_AT_CTRL_R@GOTPAGE
Lloh4:
	ldr	x22, [x22, _SDHC_AT_CTRL_R@GOTPAGEOFF]
	ldr	x8, [x22]
	add	x1, x8, x0
	mov	x0, x19
	bl	_sdhci_readl
Lloh5:
	adrp	x8, _SDHC_SW_TUNE_EN@GOTPAGE
Lloh6:
	ldr	x8, [x8, _SDHC_SW_TUNE_EN@GOTPAGEOFF]
Lloh7:
	ldr	x8, [x8]
	bic	x1, x0, x8
	ldr	x8, [x22]
	add	x2, x8, x20
	mov	x0, x19
	bl	_sdhci_writel
	mov	w8, #29952
	movk	w8, #793, lsl #16
	cmp	w21, w8
	b.hi	LBB0_2
; %bb.1:
	mov	x0, x19
	mov	x1, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_sdhci_set_clock
LBB0_2:
Lloh8:
	adrp	x22, _SDHC_GPIO_OUT@GOTPAGE
Lloh9:
	ldr	x22, [x22, _SDHC_GPIO_OUT@GOTPAGEOFF]
	ldr	x8, [x22]
	add	x1, x8, x20
	mov	x0, x19
	bl	_sdhci_readl
Lloh10:
	adrp	x23, _SDHC_CCLK_MMCM_RST@GOTPAGE
Lloh11:
	ldr	x23, [x23, _SDHC_CCLK_MMCM_RST@GOTPAGEOFF]
	ldr	x8, [x23]
	orr	x1, x8, x0
	ldr	x8, [x22]
	add	x2, x8, x20
	mov	x0, x19
	bl	_sdhci_writel
Lloh12:
	adrp	x8, _DIV_REG_100_MHZ@GOTPAGE
Lloh13:
	ldr	x8, [x8, _DIV_REG_100_MHZ@GOTPAGEOFF]
Lloh14:
	adrp	x9, _DIV_REG_200_MHZ@GOTPAGE
Lloh15:
	ldr	x9, [x9, _DIV_REG_200_MHZ@GOTPAGEOFF]
	mov	w10, #57600
	movk	w10, #1525, lsl #16
	cmp	w21, w10
	csel	x8, x8, x9, eq
	ldr	x1, [x8]
Lloh16:
	adrp	x8, _SDHC_MMCM_DIV_REG@GOTPAGE
Lloh17:
	ldr	x8, [x8, _SDHC_MMCM_DIV_REG@GOTPAGEOFF]
Lloh18:
	ldr	x2, [x8]
Lloh19:
	adrp	x8, _CLKFBOUT_100_MHZ@GOTPAGE
Lloh20:
	ldr	x8, [x8, _CLKFBOUT_100_MHZ@GOTPAGEOFF]
Lloh21:
	adrp	x9, _CLKFBOUT_200_MHZ@GOTPAGE
Lloh22:
	ldr	x9, [x9, _CLKFBOUT_200_MHZ@GOTPAGEOFF]
	csel	x21, x8, x9, eq
	mov	x0, x19
	bl	_sdhci_writel
	ldr	x1, [x21]
Lloh23:
	adrp	x8, _SDHC_MMCM_CLKFBOUT@GOTPAGE
Lloh24:
	ldr	x8, [x8, _SDHC_MMCM_CLKFBOUT@GOTPAGEOFF]
Lloh25:
	ldr	x2, [x8]
	mov	x0, x19
	bl	_sdhci_writel
	ldr	x8, [x22]
	add	x1, x8, x20
	mov	x0, x19
	bl	_sdhci_readl
	ldr	x8, [x23]
	bic	x1, x0, x8
	ldr	x8, [x22]
	add	x2, x8, x20
	mov	x0, x19
	bl	_sdhci_writel
Lloh26:
	adrp	x8, _SDHCI_PROG_CLOCK_MODE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _SDHCI_PROG_CLOCK_MODE@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
Lloh29:
	adrp	x9, _SDHCI_CLOCK_INT_EN@GOTPAGE
Lloh30:
	ldr	x9, [x9, _SDHCI_CLOCK_INT_EN@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh32:
	adrp	x9, _SDHCI_CLOCK_CARD_EN@GOTPAGE
Lloh33:
	ldr	x9, [x9, _SDHCI_CLOCK_CARD_EN@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	orr	w1, w8, w9
Lloh35:
	adrp	x8, _SDHCI_CLOCK_CONTROL@GOTPAGE
Lloh36:
	ldr	x8, [x8, _SDHCI_CLOCK_CONTROL@GOTPAGEOFF]
Lloh37:
	ldr	w2, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_sdhci_writew
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.cfi_endproc
                                        ; -- End function
	.comm	_SDHCI_VENDOR_PTR_R,4,2         ; @SDHCI_VENDOR_PTR_R
	.comm	_SDHC_AT_CTRL_R,8,3             ; @SDHC_AT_CTRL_R
	.comm	_SDHC_SW_TUNE_EN,8,3            ; @SDHC_SW_TUNE_EN
	.comm	_SDHC_GPIO_OUT,8,3              ; @SDHC_GPIO_OUT
	.comm	_SDHC_CCLK_MMCM_RST,8,3         ; @SDHC_CCLK_MMCM_RST
	.comm	_DIV_REG_100_MHZ,8,3            ; @DIV_REG_100_MHZ
	.comm	_SDHC_MMCM_DIV_REG,8,3          ; @SDHC_MMCM_DIV_REG
	.comm	_CLKFBOUT_100_MHZ,8,3           ; @CLKFBOUT_100_MHZ
	.comm	_SDHC_MMCM_CLKFBOUT,8,3         ; @SDHC_MMCM_CLKFBOUT
	.comm	_DIV_REG_200_MHZ,8,3            ; @DIV_REG_200_MHZ
	.comm	_CLKFBOUT_200_MHZ,8,3           ; @CLKFBOUT_200_MHZ
	.comm	_SDHCI_PROG_CLOCK_MODE,4,2      ; @SDHCI_PROG_CLOCK_MODE
	.comm	_SDHCI_CLOCK_INT_EN,4,2         ; @SDHCI_CLOCK_INT_EN
	.comm	_SDHCI_CLOCK_CARD_EN,4,2        ; @SDHCI_CLOCK_CARD_EN
	.comm	_SDHCI_CLOCK_CONTROL,4,2        ; @SDHCI_CLOCK_CONTROL
	.no_dead_strip	_sdhci_snps_set_clock
.subsections_via_symbols
