	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_configure_ptp
_bnx2x_configure_ptp:                   ## @bnx2x_configure_ptp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	callq	_BP_PORT
	movl	%eax, -68(%rbp)                 ## 4-byte Spill
	testl	%eax, %eax
	movq	_NIG_REG_P1_LLH_PTP_PARAM_MASK@GOTPCREL(%rip), %rax
	cmoveq	_NIG_REG_P0_LLH_PTP_PARAM_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_NIG_REG_P1_LLH_PTP_RULE_MASK@GOTPCREL(%rip), %r14
	cmoveq	_NIG_REG_P0_LLH_PTP_RULE_MASK@GOTPCREL(%rip), %r14
	movq	_NIG_REG_P1_TLLH_PTP_PARAM_MASK@GOTPCREL(%rip), %r12
	cmoveq	_NIG_REG_P0_TLLH_PTP_PARAM_MASK@GOTPCREL(%rip), %r12
	movq	_NIG_REG_P1_TLLH_PTP_RULE_MASK@GOTPCREL(%rip), %r13
	cmoveq	_NIG_REG_P0_TLLH_PTP_RULE_MASK@GOTPCREL(%rip), %r13
	movq	_NIG_REG_P1_LLH_PTP_TO_HOST@GOTPCREL(%rip), %r15
	cmoveq	_NIG_REG_P0_LLH_PTP_TO_HOST@GOTPCREL(%rip), %r15
	movq	_NIG_REG_P1_PTP_EN@GOTPCREL(%rip), %rax
	cmoveq	_NIG_REG_P0_PTP_EN@GOTPCREL(%rip), %rax
	movq	%rax, -80(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	movl	$2047, %edx                     ## imm = 0x7FF
	callq	_REG_WR
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$16383, %edx                    ## imm = 0x3FFF
	callq	_REG_WR
	movl	(%r12), %esi
	movq	%rbx, %rdi
	movl	$2047, %edx                     ## imm = 0x7FF
	callq	_REG_WR
	movl	(%r13), %esi
	movq	%rbx, %rdi
	movl	$16383, %edx                    ## imm = 0x3FFF
	callq	_REG_WR
	movl	(%r15), %esi
	xorl	%r15d, %r15d
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	-80(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$63, %edx
	callq	_REG_WR
	xorps	%xmm0, %xmm0
	movaps	%xmm0, -64(%rbp)
	movq	_NIG_REG_TIMESYNC_GEN_REG@GOTPCREL(%rip), %rax
	movq	_tsgen_ctrl@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%rax), %rsi
	leaq	-64(%rbp), %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	_REG_WR_DMAE
	movq	%rbx, %rdi
	callq	_bnx2x_send_reset_timesync_ramrod
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rdi
	callq	_BNX2X_ERR
	movq	_EFAULT@GOTPCREL(%rip), %rax
	subl	(%rax), %r15d
	jmp	LBB0_3
LBB0_2:
	cmpl	$0, -68(%rbp)                   ## 4-byte Folded Reload
	movq	_NIG_REG_P1_LLH_PTP_HOST_BUF_SEQID@GOTPCREL(%rip), %rax
	cmoveq	_NIG_REG_P0_LLH_PTP_HOST_BUF_SEQID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_NIG_REG_P1_TLLH_PTP_BUF_SEQID@GOTPCREL(%rip), %r14
	cmoveq	_NIG_REG_P0_TLLH_PTP_BUF_SEQID@GOTPCREL(%rip), %r14
	movq	%rbx, %rdi
	movl	$65536, %edx                    ## imm = 0x10000
	callq	_REG_WR
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	$65536, %edx                    ## imm = 0x10000
	callq	_REG_WR
LBB0_3:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_5
## %bb.4:
	movl	%r15d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.comm	_NIG_REG_P1_LLH_PTP_PARAM_MASK,4,2 ## @NIG_REG_P1_LLH_PTP_PARAM_MASK
	.comm	_NIG_REG_P0_LLH_PTP_PARAM_MASK,4,2 ## @NIG_REG_P0_LLH_PTP_PARAM_MASK
	.comm	_NIG_REG_P1_LLH_PTP_RULE_MASK,4,2 ## @NIG_REG_P1_LLH_PTP_RULE_MASK
	.comm	_NIG_REG_P0_LLH_PTP_RULE_MASK,4,2 ## @NIG_REG_P0_LLH_PTP_RULE_MASK
	.comm	_NIG_REG_P1_TLLH_PTP_PARAM_MASK,4,2 ## @NIG_REG_P1_TLLH_PTP_PARAM_MASK
	.comm	_NIG_REG_P0_TLLH_PTP_PARAM_MASK,4,2 ## @NIG_REG_P0_TLLH_PTP_PARAM_MASK
	.comm	_NIG_REG_P1_TLLH_PTP_RULE_MASK,4,2 ## @NIG_REG_P1_TLLH_PTP_RULE_MASK
	.comm	_NIG_REG_P0_TLLH_PTP_RULE_MASK,4,2 ## @NIG_REG_P0_TLLH_PTP_RULE_MASK
	.comm	_NIG_REG_P1_LLH_PTP_TO_HOST,4,2 ## @NIG_REG_P1_LLH_PTP_TO_HOST
	.comm	_NIG_REG_P0_LLH_PTP_TO_HOST,4,2 ## @NIG_REG_P0_LLH_PTP_TO_HOST
	.comm	_NIG_REG_P1_PTP_EN,4,2          ## @NIG_REG_P1_PTP_EN
	.comm	_NIG_REG_P0_PTP_EN,4,2          ## @NIG_REG_P0_PTP_EN
	.comm	_NIG_REG_TIMESYNC_GEN_REG,8,3   ## @NIG_REG_TIMESYNC_GEN_REG
	.comm	_tsgen_ctrl,8,3                 ## @tsgen_ctrl
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to reset PHC drift register\n"

	.comm	_EFAULT,4,2                     ## @EFAULT
	.comm	_NIG_REG_P1_LLH_PTP_HOST_BUF_SEQID,4,2 ## @NIG_REG_P1_LLH_PTP_HOST_BUF_SEQID
	.comm	_NIG_REG_P0_LLH_PTP_HOST_BUF_SEQID,4,2 ## @NIG_REG_P0_LLH_PTP_HOST_BUF_SEQID
	.comm	_NIG_REG_P1_TLLH_PTP_BUF_SEQID,4,2 ## @NIG_REG_P1_TLLH_PTP_BUF_SEQID
	.comm	_NIG_REG_P0_TLLH_PTP_BUF_SEQID,4,2 ## @NIG_REG_P0_TLLH_PTP_BUF_SEQID
	.no_dead_strip	_bnx2x_configure_ptp
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_configure_ptp
_bnx2x_configure_ptp:                   ; @bnx2x_configure_ptp
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #24]
	bl	_BP_PORT
	mov	x20, x0
Lloh3:
	adrp	x8, _NIG_REG_P1_LLH_PTP_PARAM_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _NIG_REG_P1_LLH_PTP_PARAM_MASK@GOTPAGEOFF]
Lloh5:
	adrp	x9, _NIG_REG_P0_LLH_PTP_PARAM_MASK@GOTPAGE
Lloh6:
	ldr	x9, [x9, _NIG_REG_P0_LLH_PTP_PARAM_MASK@GOTPAGEOFF]
	cmp	w0, #0
	csel	x8, x9, x8, eq
	ldr	w1, [x8]
Lloh7:
	adrp	x8, _NIG_REG_P1_LLH_PTP_RULE_MASK@GOTPAGE
Lloh8:
	ldr	x8, [x8, _NIG_REG_P1_LLH_PTP_RULE_MASK@GOTPAGEOFF]
Lloh9:
	adrp	x9, _NIG_REG_P0_LLH_PTP_RULE_MASK@GOTPAGE
Lloh10:
	ldr	x9, [x9, _NIG_REG_P0_LLH_PTP_RULE_MASK@GOTPAGEOFF]
	csel	x21, x9, x8, eq
Lloh11:
	adrp	x8, _NIG_REG_P1_TLLH_PTP_PARAM_MASK@GOTPAGE
Lloh12:
	ldr	x8, [x8, _NIG_REG_P1_TLLH_PTP_PARAM_MASK@GOTPAGEOFF]
Lloh13:
	adrp	x9, _NIG_REG_P0_TLLH_PTP_PARAM_MASK@GOTPAGE
Lloh14:
	ldr	x9, [x9, _NIG_REG_P0_TLLH_PTP_PARAM_MASK@GOTPAGEOFF]
	csel	x22, x9, x8, eq
Lloh15:
	adrp	x8, _NIG_REG_P1_TLLH_PTP_RULE_MASK@GOTPAGE
Lloh16:
	ldr	x8, [x8, _NIG_REG_P1_TLLH_PTP_RULE_MASK@GOTPAGEOFF]
Lloh17:
	adrp	x9, _NIG_REG_P0_TLLH_PTP_RULE_MASK@GOTPAGE
Lloh18:
	ldr	x9, [x9, _NIG_REG_P0_TLLH_PTP_RULE_MASK@GOTPAGEOFF]
Lloh19:
	adrp	x10, _NIG_REG_P1_LLH_PTP_TO_HOST@GOTPAGE
Lloh20:
	ldr	x10, [x10, _NIG_REG_P1_LLH_PTP_TO_HOST@GOTPAGEOFF]
	csel	x23, x9, x8, eq
Lloh21:
	adrp	x8, _NIG_REG_P0_LLH_PTP_TO_HOST@GOTPAGE
Lloh22:
	ldr	x8, [x8, _NIG_REG_P0_LLH_PTP_TO_HOST@GOTPAGEOFF]
	csel	x24, x8, x10, eq
Lloh23:
	adrp	x8, _NIG_REG_P1_PTP_EN@GOTPAGE
Lloh24:
	ldr	x8, [x8, _NIG_REG_P1_PTP_EN@GOTPAGEOFF]
Lloh25:
	adrp	x9, _NIG_REG_P0_PTP_EN@GOTPAGE
Lloh26:
	ldr	x9, [x9, _NIG_REG_P0_PTP_EN@GOTPAGEOFF]
	csel	x25, x9, x8, eq
	mov	x0, x19
	mov	w2, #2047
	bl	_REG_WR
	ldr	w1, [x21]
	mov	x0, x19
	mov	w2, #16383
	bl	_REG_WR
	ldr	w1, [x22]
	mov	x0, x19
	mov	w2, #2047
	bl	_REG_WR
	ldr	w1, [x23]
	mov	x0, x19
	mov	w2, #16383
	bl	_REG_WR
	ldr	w1, [x24]
	mov	x0, x19
	mov	w2, #0
	bl	_REG_WR
	ldr	w1, [x25]
	mov	x0, x19
	mov	w2, #63
	bl	_REG_WR
Lloh27:
	adrp	x8, _NIG_REG_TIMESYNC_GEN_REG@GOTPAGE
Lloh28:
	ldr	x8, [x8, _NIG_REG_TIMESYNC_GEN_REG@GOTPAGEOFF]
	stp	xzr, xzr, [sp, #8]
Lloh29:
	ldr	x8, [x8]
Lloh30:
	adrp	x9, _tsgen_ctrl@GOTPAGE
Lloh31:
	ldr	x9, [x9, _tsgen_ctrl@GOTPAGEOFF]
Lloh32:
	ldr	x9, [x9]
	add	x1, x9, x8
	add	x2, sp, #8
	mov	x0, x19
	mov	w3, #2
	bl	_REG_WR_DMAE
	mov	x0, x19
	bl	_bnx2x_send_reset_timesync_ramrod
	cbz	w0, LBB0_2
; %bb.1:
Lloh33:
	adrp	x0, l_.str@PAGE
Lloh34:
	add	x0, x0, l_.str@PAGEOFF
	bl	_BNX2X_ERR
Lloh35:
	adrp	x8, _EFAULT@GOTPAGE
Lloh36:
	ldr	x8, [x8, _EFAULT@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_3
LBB0_2:
Lloh38:
	adrp	x8, _NIG_REG_P1_LLH_PTP_HOST_BUF_SEQID@GOTPAGE
Lloh39:
	ldr	x8, [x8, _NIG_REG_P1_LLH_PTP_HOST_BUF_SEQID@GOTPAGEOFF]
Lloh40:
	adrp	x9, _NIG_REG_P0_LLH_PTP_HOST_BUF_SEQID@GOTPAGE
Lloh41:
	ldr	x9, [x9, _NIG_REG_P0_LLH_PTP_HOST_BUF_SEQID@GOTPAGEOFF]
	cmp	w20, #0
	csel	x8, x9, x8, eq
	ldr	w1, [x8]
Lloh42:
	adrp	x8, _NIG_REG_P1_TLLH_PTP_BUF_SEQID@GOTPAGE
Lloh43:
	ldr	x8, [x8, _NIG_REG_P1_TLLH_PTP_BUF_SEQID@GOTPAGEOFF]
Lloh44:
	adrp	x9, _NIG_REG_P0_TLLH_PTP_BUF_SEQID@GOTPAGE
Lloh45:
	ldr	x9, [x9, _NIG_REG_P0_TLLH_PTP_BUF_SEQID@GOTPAGEOFF]
	csel	x20, x9, x8, eq
	mov	x0, x19
	mov	w2, #65536
	bl	_REG_WR
	ldr	w1, [x20]
	mov	x0, x19
	mov	w2, #65536
	bl	_REG_WR
	mov	w0, #0
LBB0_3:
	ldr	x8, [sp, #24]
Lloh46:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh47:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh48:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_5
; %bb.4:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_5:
	bl	___stack_chk_fail
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.cfi_endproc
                                        ; -- End function
	.comm	_NIG_REG_P1_LLH_PTP_PARAM_MASK,4,2 ; @NIG_REG_P1_LLH_PTP_PARAM_MASK
	.comm	_NIG_REG_P0_LLH_PTP_PARAM_MASK,4,2 ; @NIG_REG_P0_LLH_PTP_PARAM_MASK
	.comm	_NIG_REG_P1_LLH_PTP_RULE_MASK,4,2 ; @NIG_REG_P1_LLH_PTP_RULE_MASK
	.comm	_NIG_REG_P0_LLH_PTP_RULE_MASK,4,2 ; @NIG_REG_P0_LLH_PTP_RULE_MASK
	.comm	_NIG_REG_P1_TLLH_PTP_PARAM_MASK,4,2 ; @NIG_REG_P1_TLLH_PTP_PARAM_MASK
	.comm	_NIG_REG_P0_TLLH_PTP_PARAM_MASK,4,2 ; @NIG_REG_P0_TLLH_PTP_PARAM_MASK
	.comm	_NIG_REG_P1_TLLH_PTP_RULE_MASK,4,2 ; @NIG_REG_P1_TLLH_PTP_RULE_MASK
	.comm	_NIG_REG_P0_TLLH_PTP_RULE_MASK,4,2 ; @NIG_REG_P0_TLLH_PTP_RULE_MASK
	.comm	_NIG_REG_P1_LLH_PTP_TO_HOST,4,2 ; @NIG_REG_P1_LLH_PTP_TO_HOST
	.comm	_NIG_REG_P0_LLH_PTP_TO_HOST,4,2 ; @NIG_REG_P0_LLH_PTP_TO_HOST
	.comm	_NIG_REG_P1_PTP_EN,4,2          ; @NIG_REG_P1_PTP_EN
	.comm	_NIG_REG_P0_PTP_EN,4,2          ; @NIG_REG_P0_PTP_EN
	.comm	_NIG_REG_TIMESYNC_GEN_REG,8,3   ; @NIG_REG_TIMESYNC_GEN_REG
	.comm	_tsgen_ctrl,8,3                 ; @tsgen_ctrl
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to reset PHC drift register\n"

	.comm	_EFAULT,4,2                     ; @EFAULT
	.comm	_NIG_REG_P1_LLH_PTP_HOST_BUF_SEQID,4,2 ; @NIG_REG_P1_LLH_PTP_HOST_BUF_SEQID
	.comm	_NIG_REG_P0_LLH_PTP_HOST_BUF_SEQID,4,2 ; @NIG_REG_P0_LLH_PTP_HOST_BUF_SEQID
	.comm	_NIG_REG_P1_TLLH_PTP_BUF_SEQID,4,2 ; @NIG_REG_P1_TLLH_PTP_BUF_SEQID
	.comm	_NIG_REG_P0_TLLH_PTP_BUF_SEQID,4,2 ; @NIG_REG_P0_TLLH_PTP_BUF_SEQID
	.no_dead_strip	_bnx2x_configure_ptp
.subsections_via_symbols
