	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gic_init_chip
_gic_init_chip:                         ## @gic_init_chip
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	movq	_gic_chip@GOTPCREL(%rip), %rax
	movups	(%rax), %xmm0
	movups	%xmm0, (%rdi)
	movq	16(%rax), %rax
	movq	%rax, 16(%rdi)
	movq	%rdx, (%rdi)
	movq	%rsi, 24(%rdi)
	testl	%ecx, %ecx
	je	LBB0_2
## %bb.1:
	movq	_gic_eoimode1_mask_irq@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 20(%rdi)
	movq	_gic_eoimode1_eoi_irq@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rdi)
	movq	_gic_irq_set_vcpu_affinity@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%rdi)
LBB0_2:
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_gic_chip,32,3                  ## @gic_chip
	.comm	_gic_eoimode1_mask_irq,4,2      ## @gic_eoimode1_mask_irq
	.comm	_gic_eoimode1_eoi_irq,4,2       ## @gic_eoimode1_eoi_irq
	.comm	_gic_irq_set_vcpu_affinity,4,2  ## @gic_irq_set_vcpu_affinity
	.comm	_gic_data,8,3                   ## @gic_data
	.comm	_gic_set_affinity,4,2           ## @gic_set_affinity
	.no_dead_strip	_gic_init_chip
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gic_init_chip
_gic_init_chip:                         ; @gic_init_chip
	.cfi_startproc
; %bb.0:
Lloh0:
	adrp	x8, _gic_chip@GOTPAGE
Lloh1:
	ldr	x8, [x8, _gic_chip@GOTPAGEOFF]
	ldr	x9, [x8, #16]
	ldr	q0, [x8]
	str	q0, [x0]
	str	x2, [x0]
	stp	x9, x1, [x0, #16]
	cbz	w3, LBB0_2
; %bb.1:
Lloh2:
	adrp	x8, _gic_eoimode1_mask_irq@GOTPAGE
Lloh3:
	ldr	x8, [x8, _gic_eoimode1_mask_irq@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	str	w8, [x0, #20]
Lloh5:
	adrp	x8, _gic_eoimode1_eoi_irq@GOTPAGE
Lloh6:
	ldr	x8, [x8, _gic_eoimode1_eoi_irq@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
Lloh8:
	adrp	x9, _gic_irq_set_vcpu_affinity@GOTPAGE
Lloh9:
	ldr	x9, [x9, _gic_irq_set_vcpu_affinity@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	stp	w9, w8, [x0, #12]
LBB0_2:
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_gic_chip,32,3                  ; @gic_chip
	.comm	_gic_eoimode1_mask_irq,4,2      ; @gic_eoimode1_mask_irq
	.comm	_gic_eoimode1_eoi_irq,4,2       ; @gic_eoimode1_eoi_irq
	.comm	_gic_irq_set_vcpu_affinity,4,2  ; @gic_irq_set_vcpu_affinity
	.comm	_gic_data,8,3                   ; @gic_data
	.comm	_gic_set_affinity,4,2           ; @gic_set_affinity
	.no_dead_strip	_gic_init_chip
.subsections_via_symbols
