	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function goya_debugfs_read32
_goya_debugfs_read32:                   ## @goya_debugfs_read32
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movl	%esi, %ebx
	movq	%rdi, %r15
	movq	_CFG_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	%esi, %eax
	jg	LBB0_4
## %bb.1:
	movq	_CFG_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	addl	%eax, %ecx
	cmpl	%ebx, %ecx
	jle	LBB0_4
## %bb.2:
	subl	%eax, %ebx
	movl	%ebx, %edi
	callq	_RREG32
	jmp	LBB0_3
LBB0_4:
	movq	_SRAM_BASE_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	%ebx, %eax
	jg	LBB0_7
## %bb.5:
	movq	_SRAM_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	addl	%eax, %ecx
	cmpl	%ebx, %ecx
	jle	LBB0_7
## %bb.6:
	movq	(%r15), %rcx
	movq	_SRAM_CFG_BAR_ID@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	subl	%eax, %ebx
	addl	(%rcx,%rdx,4), %ebx
	movl	%ebx, %edi
	callq	_readl
	jmp	LBB0_3
LBB0_7:
	movq	_DRAM_PHYS_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	cmpl	%ebx, %eax
	jg	LBB0_13
## %bb.8:
	movl	8(%r15), %ecx
	addl	%eax, %ecx
	cmpl	%ebx, %ecx
	jle	LBB0_13
## %bb.9:
	xorl	%r13d, %r13d
	subl	12(%r15), %r13d
	andl	%ebx, %r13d
	addl	%eax, %r13d
	movq	%r15, %rdi
	movl	%r13d, %esi
	callq	_goya_set_ddr_bar_base
	movl	%eax, %r12d
	movq	_U64_MAX@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r12d
	jne	LBB0_11
## %bb.10:
	movl	%r12d, %ecx
	jmp	LBB0_12
LBB0_13:
	movq	_HOST_PHYS_BASE@GOTPCREL(%rip), %r15
	cmpl	%ebx, (%r15)
	jg	LBB0_16
## %bb.14:
	movq	_pci_bus_type@GOTPCREL(%rip), %rdi
	callq	_iommu_present
	testl	%eax, %eax
	je	LBB0_15
LBB0_16:
	movq	_EFAULT@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_17
LBB0_11:
	movq	(%r15), %rax
	movq	_DDR_BAR_ID@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	subl	%r13d, %ebx
	addl	(%rax,%rcx,4), %ebx
	movl	%ebx, %edi
	callq	_readl
	movl	%eax, (%r14)
	movq	%r15, %rdi
	movl	%r12d, %esi
	callq	_goya_set_ddr_bar_base
	movl	%eax, %ecx
	movq	_U64_MAX@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
LBB0_12:
	movq	_EIO@GOTPCREL(%rip), %rdx
	xorl	%eax, %eax
	subl	(%rdx), %eax
	cmpl	%r12d, %ecx
	movl	$0, %ecx
	cmovnel	%ecx, %eax
	jmp	LBB0_17
LBB0_15:
	subl	(%r15), %ebx
	movl	%ebx, %edi
	callq	_phys_to_virt
	movl	(%rax), %eax
LBB0_3:
	movl	%eax, (%r14)
	xorl	%eax, %eax
LBB0_17:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CFG_BASE,4,2                   ## @CFG_BASE
	.comm	_CFG_SIZE,4,2                   ## @CFG_SIZE
	.comm	_SRAM_BASE_ADDR,4,2             ## @SRAM_BASE_ADDR
	.comm	_SRAM_SIZE,4,2                  ## @SRAM_SIZE
	.comm	_SRAM_CFG_BAR_ID,8,3            ## @SRAM_CFG_BAR_ID
	.comm	_DRAM_PHYS_BASE,4,2             ## @DRAM_PHYS_BASE
	.comm	_U64_MAX,4,2                    ## @U64_MAX
	.comm	_DDR_BAR_ID,8,3                 ## @DDR_BAR_ID
	.comm	_EIO,4,2                        ## @EIO
	.comm	_HOST_PHYS_BASE,4,2             ## @HOST_PHYS_BASE
	.comm	_pci_bus_type,4,2               ## @pci_bus_type
	.comm	_EFAULT,4,2                     ## @EFAULT
	.no_dead_strip	_goya_debugfs_read32
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function goya_debugfs_read32
_goya_debugfs_read32:                   ; @goya_debugfs_read32
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
Lloh0:
	adrp	x8, _CFG_BASE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CFG_BASE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w1
	b.gt	LBB0_3
; %bb.1:
Lloh3:
	adrp	x9, _CFG_SIZE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CFG_SIZE@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	add	w9, w9, w8
	cmp	w9, w20
	b.le	LBB0_3
; %bb.2:
	sub	w0, w20, w8
	bl	_RREG32
	b	LBB0_6
LBB0_3:
Lloh6:
	adrp	x8, _SRAM_BASE_ADDR@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SRAM_BASE_ADDR@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	w8, w20
	b.gt	LBB0_8
; %bb.4:
Lloh9:
	adrp	x9, _SRAM_SIZE@GOTPAGE
Lloh10:
	ldr	x9, [x9, _SRAM_SIZE@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	add	w9, w9, w8
	cmp	w9, w20
	b.le	LBB0_8
; %bb.5:
Lloh12:
	adrp	x9, _SRAM_CFG_BAR_ID@GOTPAGE
Lloh13:
	ldr	x9, [x9, _SRAM_CFG_BAR_ID@GOTPAGEOFF]
	ldr	x10, [x21]
Lloh14:
	ldr	x9, [x9]
	ldr	w9, [x10, x9, lsl #2]
	sub	w8, w20, w8
	add	w0, w8, w9
	bl	_readl
LBB0_6:
	mov	x8, x0
	mov	w0, #0
LBB0_7:
	str	w8, [x19]
	b	LBB0_17
LBB0_8:
Lloh15:
	adrp	x8, _DRAM_PHYS_BASE@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DRAM_PHYS_BASE@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	cmp	w8, w20
	b.gt	LBB0_12
; %bb.9:
	ldr	w9, [x21, #8]
	add	w9, w9, w8
	cmp	w9, w20
	b.le	LBB0_12
; %bb.10:
	ldr	w9, [x21, #12]
	neg	w9, w9
	and	w9, w9, w20
	add	w23, w9, w8
	mov	x0, x21
	mov	x1, x23
	bl	_goya_set_ddr_bar_base
	mov	x22, x0
Lloh18:
	adrp	x24, _U64_MAX@GOTPAGE
Lloh19:
	ldr	x24, [x24, _U64_MAX@GOTPAGEOFF]
	ldr	w8, [x24]
	cmp	w0, w8
	b.ne	LBB0_15
; %bb.11:
	mov	x0, x22
	b	LBB0_16
LBB0_12:
Lloh20:
	adrp	x21, _HOST_PHYS_BASE@GOTPAGE
Lloh21:
	ldr	x21, [x21, _HOST_PHYS_BASE@GOTPAGEOFF]
	ldr	w8, [x21]
	cmp	w8, w20
	b.gt	LBB0_14
; %bb.13:
Lloh22:
	adrp	x0, _pci_bus_type@GOTPAGE
Lloh23:
	ldr	x0, [x0, _pci_bus_type@GOTPAGEOFF]
	bl	_iommu_present
	cbz	w0, LBB0_18
LBB0_14:
Lloh24:
	adrp	x8, _EFAULT@GOTPAGE
Lloh25:
	ldr	x8, [x8, _EFAULT@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_17
LBB0_15:
Lloh27:
	adrp	x8, _DDR_BAR_ID@GOTPAGE
Lloh28:
	ldr	x8, [x8, _DDR_BAR_ID@GOTPAGEOFF]
	ldr	x9, [x21]
Lloh29:
	ldr	x8, [x8]
	ldr	w8, [x9, x8, lsl #2]
	sub	w9, w20, w23
	add	w0, w9, w8
	bl	_readl
	str	w0, [x19]
	mov	x0, x21
	mov	x1, x22
	bl	_goya_set_ddr_bar_base
	ldr	w22, [x24]
LBB0_16:
Lloh30:
	adrp	x8, _EIO@GOTPAGE
Lloh31:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
Lloh32:
	ldr	w8, [x8]
	cmp	w0, w22
	csneg	w0, wzr, w8, ne
LBB0_17:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_18:
	ldr	w8, [x21]
	sub	w0, w20, w8
	bl	_phys_to_virt
	mov	x8, x0
	mov	w0, #0
	ldr	w8, [x8]
	b	LBB0_7
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.cfi_endproc
                                        ; -- End function
	.comm	_CFG_BASE,4,2                   ; @CFG_BASE
	.comm	_CFG_SIZE,4,2                   ; @CFG_SIZE
	.comm	_SRAM_BASE_ADDR,4,2             ; @SRAM_BASE_ADDR
	.comm	_SRAM_SIZE,4,2                  ; @SRAM_SIZE
	.comm	_SRAM_CFG_BAR_ID,8,3            ; @SRAM_CFG_BAR_ID
	.comm	_DRAM_PHYS_BASE,4,2             ; @DRAM_PHYS_BASE
	.comm	_U64_MAX,4,2                    ; @U64_MAX
	.comm	_DDR_BAR_ID,8,3                 ; @DDR_BAR_ID
	.comm	_EIO,4,2                        ; @EIO
	.comm	_HOST_PHYS_BASE,4,2             ; @HOST_PHYS_BASE
	.comm	_pci_bus_type,4,2               ; @pci_bus_type
	.comm	_EFAULT,4,2                     ; @EFAULT
	.no_dead_strip	_goya_debugfs_read32
.subsections_via_symbols
