	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function arm_smmu_tlb_inv_range_s2
_arm_smmu_tlb_inv_range_s2:             ## @arm_smmu_tlb_inv_range_s2
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r15d
	movq	%rdx, -56(%rbp)                 ## 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movq	16(%r8), %r13
	movq	%r8, -64(%rbp)                  ## 8-byte Spill
	movl	(%r8), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_ARM_SMMU_FEAT_COHERENT_WALK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r13)
	je	LBB0_2
## %bb.1:
	xorl	%eax, %eax
	callq	_wmb
LBB0_2:
	testl	%r15d, %r15d
	jne	LBB0_3
## %bb.4:
	movq	_ARM_SMMU_CB_S2_TLBIIPAS2@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_3:
	movq	_ARM_SMMU_CB_S2_TLBIIPAS2L@GOTPCREL(%rip), %rax
LBB0_5:
	movl	(%rax), %r15d
	shrq	$12, %rbx
	movq	-56(%rbp), %r14                 ## 8-byte Reload
	shrq	$12, %r14
	negq	%r12
	jmp	LBB0_6
	.p2align	4, 0x90
LBB0_8:                                 ##   in Loop: Header=BB0_6 Depth=1
	movq	%r13, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%r15d, %edx
	movq	%rbx, %rcx
	callq	_arm_smmu_cb_write
LBB0_9:                                 ##   in Loop: Header=BB0_6 Depth=1
	addq	%r14, %rbx
	addq	-56(%rbp), %r12                 ## 8-byte Folded Reload
	je	LBB0_10
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movq	8(%rax), %rax
	movq	_ARM_SMMU_CTX_FMT_AARCH64@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_8
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=1
	movq	%r13, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	movl	%r15d, %edx
	movq	%rbx, %rcx
	callq	_arm_smmu_cb_writeq
	jmp	LBB0_9
LBB0_10:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ARM_SMMU_FEAT_COHERENT_WALK,4,2 ## @ARM_SMMU_FEAT_COHERENT_WALK
	.comm	_ARM_SMMU_CB_S2_TLBIIPAS2L,4,2  ## @ARM_SMMU_CB_S2_TLBIIPAS2L
	.comm	_ARM_SMMU_CB_S2_TLBIIPAS2,4,2   ## @ARM_SMMU_CB_S2_TLBIIPAS2
	.comm	_ARM_SMMU_CTX_FMT_AARCH64,8,3   ## @ARM_SMMU_CTX_FMT_AARCH64
	.no_dead_strip	_arm_smmu_tlb_inv_range_s2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function arm_smmu_tlb_inv_range_s2
_arm_smmu_tlb_inv_range_s2:             ; @arm_smmu_tlb_inv_range_s2
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x4
	mov	x23, x3
	mov	x20, x2
	mov	x25, x1
	mov	x24, x0
	ldr	x21, [x4, #16]
	ldr	w22, [x4]
	ldr	w8, [x21]
Lloh0:
	adrp	x9, _ARM_SMMU_FEAT_COHERENT_WALK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _ARM_SMMU_FEAT_COHERENT_WALK@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	bl	_wmb
LBB0_2:
Lloh3:
	adrp	x8, _ARM_SMMU_CB_S2_TLBIIPAS2L@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ARM_SMMU_CB_S2_TLBIIPAS2L@GOTPAGEOFF]
Lloh5:
	adrp	x9, _ARM_SMMU_CB_S2_TLBIIPAS2@GOTPAGE
Lloh6:
	ldr	x9, [x9, _ARM_SMMU_CB_S2_TLBIIPAS2@GOTPAGEOFF]
	cmp	w23, #0
	csel	x8, x9, x8, eq
	ldr	w23, [x8]
	lsr	x24, x24, #12
	lsr	x26, x20, #12
	neg	x25, x25
Lloh7:
	adrp	x27, _ARM_SMMU_CTX_FMT_AARCH64@GOTPAGE
Lloh8:
	ldr	x27, [x27, _ARM_SMMU_CTX_FMT_AARCH64@GOTPAGEOFF]
	b	LBB0_5
LBB0_3:                                 ;   in Loop: Header=BB0_5 Depth=1
	bl	_arm_smmu_cb_write
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
	add	x24, x24, x26
	adds	x25, x25, x20
	b.eq	LBB0_7
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #8]
	ldr	x9, [x27]
	mov	x0, x21
	mov	x1, x22
	mov	x2, x23
	mov	x3, x24
	cmp	x8, x9
	b.ne	LBB0_3
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	bl	_arm_smmu_cb_writeq
	b	LBB0_4
LBB0_7:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_ARM_SMMU_FEAT_COHERENT_WALK,4,2 ; @ARM_SMMU_FEAT_COHERENT_WALK
	.comm	_ARM_SMMU_CB_S2_TLBIIPAS2L,4,2  ; @ARM_SMMU_CB_S2_TLBIIPAS2L
	.comm	_ARM_SMMU_CB_S2_TLBIIPAS2,4,2   ; @ARM_SMMU_CB_S2_TLBIIPAS2
	.comm	_ARM_SMMU_CTX_FMT_AARCH64,8,3   ; @ARM_SMMU_CTX_FMT_AARCH64
	.no_dead_strip	_arm_smmu_tlb_inv_range_s2
.subsections_via_symbols
