	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function DRX_Start
_DRX_Start:                             ## @DRX_Start
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
                                        ## kill: def $esi killed $esi def $rsi
	leal	500(%rsi), %eax
	leal	-500(%rsi), %r13d
	testl	%esi, %esi
	cmovnsl	%eax, %r13d
	movq	(%rdi), %rcx
	movq	_DRXD_STOPPED@GOTPCREL(%rip), %rdx
	movl	$-1, %eax
	cmpq	(%rdx), %rcx
	jne	LBB0_121
## %bb.1:
	movq	%rdi, %rbx
	callq	_ResetECOD
	testl	%eax, %eax
	js	LBB0_121
## %bb.2:
	cmpq	$0, 40(%rbx)
	je	LBB0_3
LBB0_7:
	movq	%rbx, %rdi
	callq	_InitSC
	testl	%eax, %eax
	js	LBB0_121
## %bb.8:
	leaq	84(%rbx), %rsi
	movq	%rbx, %rdi
	callq	_SetCfgIfAgc
	testl	%eax, %eax
	js	LBB0_121
## %bb.9:
	leaq	80(%rbx), %rsi
	movq	%rbx, %rdi
	callq	_SetCfgRfAgc
	testl	%eax, %eax
	js	LBB0_121
## %bb.10:
	movq	48(%rbx), %rcx
	movq	_INVERSION_ON@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	sete	%r15b
	cmpl	$129, 56(%rbx)
	jne	LBB0_11
## %bb.16:
	movq	_SC_RA_RAM_OP_PARAM_MODE_2K@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	cmpq	$0, 40(%rbx)
	je	LBB0_12
## %bb.17:
	movq	_EC_SB_REG_TR_MODE__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_EC_SB_REG_TR_MODE_2K@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%r12d, %r12d
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_14
## %bb.18:
	movl	$65, %edi
	movl	$71, %esi
	movl	$97, %r12d
	jmp	LBB0_19
LBB0_3:
	movq	%rbx, %rdi
	callq	_InitFT
	testl	%eax, %eax
	js	LBB0_121
## %bb.4:
	movq	%rbx, %rdi
	callq	_InitCP
	testl	%eax, %eax
	js	LBB0_121
## %bb.5:
	movq	%rbx, %rdi
	callq	_InitCE
	testl	%eax, %eax
	js	LBB0_121
## %bb.6:
	movq	%rbx, %rdi
	callq	_InitEQ
	testl	%eax, %eax
	jns	LBB0_7
	jmp	LBB0_121
LBB0_11:
	movq	_SC_RA_RAM_OP_PARAM_MODE_8K@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	cmpq	$0, 40(%rbx)
	je	LBB0_12
## %bb.13:
	movq	_EC_SB_REG_TR_MODE__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_EC_SB_REG_TR_MODE_8K@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%r12d, %r12d
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_14
## %bb.15:
	movl	$67, %edi
	movl	$83, %esi
	movl	$99, %r12d
	jmp	LBB0_19
LBB0_12:
	xorl	%r12d, %r12d
LBB0_14:
	xorl	%esi, %esi
	xorl	%edi, %edi
LBB0_19:
	movl	$-137, %ecx
	addl	60(%rbx), %ecx
	cmpl	$3, %ecx
	ja	LBB0_20
## %bb.21:
	movslq	%ecx, %rcx
	leaq	l_switch.table.DRX_Start(%rip), %rdx
	movq	(%rdx,%rcx,8), %rcx
	jmp	LBB0_22
LBB0_20:
	movq	_SC_RA_RAM_OP_PARAM_GUARD_4@GOTPCREL(%rip), %rcx
LBB0_22:
	orl	(%rcx), %r14d
	movl	64(%rbx), %ecx
	cmpl	$134, %ecx
	movl	%r12d, -56(%rbp)                ## 4-byte Spill
	je	LBB0_33
## %bb.23:
	cmpl	$135, %ecx
	je	LBB0_29
## %bb.24:
	cmpl	$136, %ecx
	jne	LBB0_38
## %bb.25:
	movq	_SC_RA_RAM_OP_PARAM_HIER_A1@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r12d
	cmpq	$0, 40(%rbx)
	je	LBB0_34
## %bb.26:
	movl	%edi, -60(%rbp)                 ## 4-byte Spill
	movl	%esi, -64(%rbp)                 ## 4-byte Spill
	movq	_EQ_REG_OT_ALPHA__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.27:
	movq	_EC_SB_REG_ALPHA__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.28:
	movl	%r12d, -52(%rbp)                ## 4-byte Spill
	movb	%r15b, -41(%rbp)                ## 1-byte Spill
	movl	%r14d, -48(%rbp)                ## 4-byte Spill
	movq	_SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE@GOTPCREL(%rip), %r8
	movq	_SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE@GOTPCREL(%rip), %r9
	movq	_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE@GOTPCREL(%rip), %r10
	movq	_SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE@GOTPCREL(%rip), %r11
	movq	_SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE@GOTPCREL(%rip), %r14
	movq	_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE@GOTPCREL(%rip), %rax
	movq	_EQ_TD_TPS_PWR_QAM64_ALPHA1@GOTPCREL(%rip), %rcx
	movq	_EQ_TD_TPS_PWR_QAM16_ALPHA1@GOTPCREL(%rip), %rdi
	movq	_EQ_TD_TPS_PWR_UNKNOWN@GOTPCREL(%rip), %rsi
	jmp	LBB0_42
LBB0_33:
	movq	_SC_RA_RAM_OP_PARAM_HIER_A4@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r12d
	cmpq	$0, 40(%rbx)
	je	LBB0_34
## %bb.35:
	movl	%edi, -60(%rbp)                 ## 4-byte Spill
	movl	%esi, -64(%rbp)                 ## 4-byte Spill
	movq	_EQ_REG_OT_ALPHA__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$3, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.36:
	movq	_EC_SB_REG_ALPHA__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$3, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.37:
	movl	%r12d, -52(%rbp)                ## 4-byte Spill
	movb	%r15b, -41(%rbp)                ## 1-byte Spill
	movl	%r14d, -48(%rbp)                ## 4-byte Spill
	movq	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE@GOTPCREL(%rip), %r8
	movq	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE@GOTPCREL(%rip), %r9
	movq	_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE@GOTPCREL(%rip), %r10
	movq	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE@GOTPCREL(%rip), %r11
	movq	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE@GOTPCREL(%rip), %r14
	movq	_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE@GOTPCREL(%rip), %rax
	movq	_EQ_TD_TPS_PWR_QAM64_ALPHA4@GOTPCREL(%rip), %rcx
	movq	_EQ_TD_TPS_PWR_QAM16_ALPHA4@GOTPCREL(%rip), %rdi
	movq	_EQ_TD_TPS_PWR_UNKNOWN@GOTPCREL(%rip), %rsi
	jmp	LBB0_42
LBB0_29:
	movq	_SC_RA_RAM_OP_PARAM_HIER_A2@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r12d
	cmpq	$0, 40(%rbx)
	je	LBB0_34
## %bb.30:
	movl	%edi, -60(%rbp)                 ## 4-byte Spill
	movl	%esi, -64(%rbp)                 ## 4-byte Spill
	movq	_EQ_REG_OT_ALPHA__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.31:
	movq	_EC_SB_REG_ALPHA__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.32:
	movl	%r12d, -52(%rbp)                ## 4-byte Spill
	movb	%r15b, -41(%rbp)                ## 1-byte Spill
	movl	%r14d, -48(%rbp)                ## 4-byte Spill
	movq	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE@GOTPCREL(%rip), %r8
	movq	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE@GOTPCREL(%rip), %r9
	movq	_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE@GOTPCREL(%rip), %r10
	movq	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE@GOTPCREL(%rip), %r11
	movq	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE@GOTPCREL(%rip), %r14
	movq	_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE@GOTPCREL(%rip), %rax
	movq	_EQ_TD_TPS_PWR_QAM64_ALPHA2@GOTPCREL(%rip), %rcx
	movq	_EQ_TD_TPS_PWR_QAM16_ALPHA2@GOTPCREL(%rip), %rdi
	movq	_EQ_TD_TPS_PWR_UNKNOWN@GOTPCREL(%rip), %rsi
	jmp	LBB0_42
LBB0_38:
	movq	_SC_RA_RAM_OP_PARAM_HIER_NO@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r12d
	cmpq	$0, 40(%rbx)
	je	LBB0_34
## %bb.39:
	movl	%edi, -60(%rbp)                 ## 4-byte Spill
	movl	%esi, -64(%rbp)                 ## 4-byte Spill
	movq	_EQ_REG_OT_ALPHA__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.40:
	movq	_EC_SB_REG_ALPHA__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.41:
	movl	%r12d, -52(%rbp)                ## 4-byte Spill
	movb	%r15b, -41(%rbp)                ## 1-byte Spill
	movl	%r14d, -48(%rbp)                ## 4-byte Spill
	movq	_SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE@GOTPCREL(%rip), %r8
	movq	_SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE@GOTPCREL(%rip), %r9
	movq	_SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE@GOTPCREL(%rip), %r10
	movq	_SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE@GOTPCREL(%rip), %r11
	movq	_SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE@GOTPCREL(%rip), %r14
	movq	_SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE@GOTPCREL(%rip), %rax
	movq	_EQ_TD_TPS_PWR_QAM64_ALPHAN@GOTPCREL(%rip), %rcx
	movq	_EQ_TD_TPS_PWR_QAM16_ALPHAN@GOTPCREL(%rip), %rdi
	movq	_EQ_TD_TPS_PWR_QPSK@GOTPCREL(%rip), %rsi
LBB0_42:
	movl	(%r8), %r8d
	movl	(%r9), %r9d
	movl	(%r10), %edx
	movl	(%r11), %r10d
	movl	(%r14), %r11d
	movl	(%rax), %eax
	movl	%eax, -68(%rbp)                 ## 4-byte Spill
	movl	(%rcx), %r14d
	movl	(%rdi), %r15d
	movl	(%rsi), %r12d
	movl	-64(%rbp), %esi                 ## 4-byte Reload
	movl	-60(%rbp), %edi                 ## 4-byte Reload
	jmp	LBB0_43
LBB0_34:
	movl	%r12d, -52(%rbp)                ## 4-byte Spill
	movb	%r15b, -41(%rbp)                ## 1-byte Spill
	movl	%r14d, -48(%rbp)                ## 4-byte Spill
	xorl	%r8d, %r8d
	movl	$0, %r9d
	movl	$0, %edx
	movl	$0, %r10d
	movl	$0, %r11d
	movl	$0, -68(%rbp)                   ## 4-byte Folded Spill
	movl	$0, %r14d
	movl	$0, %r15d
	movl	$0, %r12d
	testl	%eax, %eax
	js	LBB0_121
LBB0_43:
	movl	68(%rbx), %eax
	cmpl	$130, %eax
	je	LBB0_55
## %bb.44:
	cmpl	$132, %eax
	jne	LBB0_45
## %bb.65:
	movq	_SC_RA_RAM_OP_PARAM_CONST_QAM16@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	cmpq	$0, 40(%rbx)
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	movl	-52(%rbp), %r12d                ## 4-byte Reload
	je	LBB0_75
## %bb.66:
	movl	%r11d, -68(%rbp)                ## 4-byte Spill
	movl	%r9d, -56(%rbp)                 ## 4-byte Spill
	movl	%ecx, -60(%rbp)                 ## 4-byte Spill
	movl	%esi, -64(%rbp)                 ## 4-byte Spill
	movq	_EQ_REG_OT_CONST__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.67:
	movq	_EC_SB_REG_CONST__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_EC_SB_REG_CONST_16QAM@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.68:
	movq	_EC_SB_REG_SCALE_MSB__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$16, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.69:
	movq	_EC_SB_REG_SCALE_BIT2__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$4, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.70:
	movq	_EC_SB_REG_SCALE_LSB__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.71:
	movq	_EQ_REG_TD_TPS_PWR_OFS__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	%r15d, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.72:
	movq	_EQ_REG_SN_CEGAIN__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	-64(%rbp), %edx                 ## 4-byte Reload
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.73:
	movq	_EQ_REG_IS_GAIN_MAN__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	-68(%rbp), %edx                 ## 4-byte Reload
	xorl	%ecx, %ecx
	callq	_Write16
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	testl	%eax, %eax
	jns	LBB0_74
	jmp	LBB0_121
LBB0_55:
	movq	_SC_RA_RAM_OP_PARAM_CONST_QPSK@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	cmpq	$0, 40(%rbx)
	je	LBB0_56
## %bb.57:
	movl	%edx, %r15d
	movl	%ecx, -60(%rbp)                 ## 4-byte Spill
	movq	_EQ_REG_OT_CONST__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	js	LBB0_121
## %bb.58:
	movq	_EC_SB_REG_CONST__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_EC_SB_REG_CONST_QPSK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.59:
	movq	_EC_SB_REG_SCALE_MSB__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$16, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.60:
	movq	_EC_SB_REG_SCALE_BIT2__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.61:
	movq	_EC_SB_REG_SCALE_LSB__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.62:
	movq	_EQ_REG_TD_TPS_PWR_OFS__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	%r12d, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.63:
	movq	_EQ_REG_SN_CEGAIN__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.64:
	movq	_EQ_REG_IS_GAIN_MAN__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	-68(%rbp), %edx                 ## 4-byte Reload
	xorl	%ecx, %ecx
	callq	_Write16
	movl	%r15d, %edx
	testl	%eax, %eax
	movl	-52(%rbp), %r12d                ## 4-byte Reload
	jns	LBB0_74
	jmp	LBB0_121
LBB0_45:
	movq	_SC_RA_RAM_OP_PARAM_CONST_QAM64@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	cmpq	$0, 40(%rbx)
	movl	-52(%rbp), %r12d                ## 4-byte Reload
	je	LBB0_46
## %bb.47:
	movl	%r10d, -64(%rbp)                ## 4-byte Spill
	movl	%r8d, -56(%rbp)                 ## 4-byte Spill
	movl	%ecx, -60(%rbp)                 ## 4-byte Spill
	movl	%edi, %r15d
	movq	_EQ_REG_OT_CONST__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.48:
	movq	_EC_SB_REG_CONST__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_EC_SB_REG_CONST_64QAM@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.49:
	movq	_EC_SB_REG_SCALE_MSB__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$32, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.50:
	movq	_EC_SB_REG_SCALE_BIT2__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$8, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.51:
	movq	_EC_SB_REG_SCALE_LSB__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$2, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.52:
	movq	_EQ_REG_TD_TPS_PWR_OFS__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.53:
	movq	_EQ_REG_SN_CEGAIN__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	%r15d, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.54:
	movq	_EQ_REG_IS_GAIN_MAN__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	-64(%rbp), %edx                 ## 4-byte Reload
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	js	LBB0_121
LBB0_74:
	movq	_EQ_REG_IS_GAIN_EXP__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	movl	-60(%rbp), %ecx                 ## 4-byte Reload
	jns	LBB0_75
	jmp	LBB0_121
LBB0_56:
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	movl	-52(%rbp), %r12d                ## 4-byte Reload
	jmp	LBB0_75
LBB0_46:
	movl	-48(%rbp), %r14d                ## 4-byte Reload
LBB0_75:
	orl	%r12d, %r14d
	orl	%ecx, %r14d
	movq	_SC_RA_RAM_OP_PARAM_PRIO_HI@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movq	_EC_SB_REG_PRIOR__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_EC_SB_REG_PRIOR_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Write16
	movl	$-141, %ecx
	addl	72(%rbx), %ecx
	cmpl	$4, %ecx
	ja	LBB0_79
## %bb.76:
	leaq	LJTI0_0(%rip), %rdx
	movslq	(%rdx,%rcx,4), %rcx
	addq	%rdx, %rcx
	jmpq	*%rcx
LBB0_85:
	movq	_SC_RA_RAM_OP_PARAM_RATE_7_8@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, -56(%rbp)                 ## 4-byte Spill
	cmpq	$0, 40(%rbx)
	je	LBB0_88
## %bb.86:
	movq	_EC_VD_REG_SET_CODERATE_C7_8@GOTPCREL(%rip), %rax
	jmp	LBB0_87
LBB0_83:
	movq	_SC_RA_RAM_OP_PARAM_RATE_5_6@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, -56(%rbp)                 ## 4-byte Spill
	cmpq	$0, 40(%rbx)
	je	LBB0_88
## %bb.84:
	movq	_EC_VD_REG_SET_CODERATE_C5_6@GOTPCREL(%rip), %rax
	jmp	LBB0_87
LBB0_81:
	movq	_SC_RA_RAM_OP_PARAM_RATE_3_4@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, -56(%rbp)                 ## 4-byte Spill
	cmpq	$0, 40(%rbx)
	je	LBB0_88
## %bb.82:
	movq	_EC_VD_REG_SET_CODERATE_C3_4@GOTPCREL(%rip), %rax
	jmp	LBB0_87
LBB0_79:
	movq	_SC_RA_RAM_OP_PARAM_RATE_2_3@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, -56(%rbp)                 ## 4-byte Spill
	cmpq	$0, 40(%rbx)
	je	LBB0_88
## %bb.80:
	movq	_EC_VD_REG_SET_CODERATE_C2_3@GOTPCREL(%rip), %rax
	jmp	LBB0_87
LBB0_77:
	movq	_SC_RA_RAM_OP_PARAM_RATE_1_2@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, -56(%rbp)                 ## 4-byte Spill
	cmpq	$0, 40(%rbx)
	je	LBB0_88
## %bb.78:
	movq	_EC_VD_REG_SET_CODERATE_C1_2@GOTPCREL(%rip), %rax
LBB0_87:
	movq	_EC_VD_REG_SET_CODERATE__A@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Write16
LBB0_88:
	testl	%eax, %eax
	js	LBB0_121
## %bb.89:
	movl	%r14d, %r12d
	movl	76(%rbx), %eax
	cmpl	$6999999, %eax                  ## imm = 0x6ACFBF
	jg	LBB0_93
## %bb.90:
	testl	%eax, %eax
	je	LBB0_96
## %bb.91:
	cmpl	$6000000, %eax                  ## imm = 0x5B8D80
	jne	LBB0_95
## %bb.92:
	movq	_DRXD_BANDWIDTH_6MHZ_IN_HZ@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_FE_AG_REG_IND_DEL__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$71, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	movl	$3847, %r14d                    ## imm = 0xF07
	jmp	LBB0_99
LBB0_93:
	cmpl	$7000000, %eax                  ## imm = 0x6ACFC0
	je	LBB0_98
## %bb.94:
	cmpl	$8000000, %eax                  ## imm = 0x7A1200
	je	LBB0_97
LBB0_95:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%r15d, %r15d
	xorl	%eax, %eax
	subl	(%rcx), %eax
	xorl	%r14d, %r14d
	jmp	LBB0_99
LBB0_96:
	movl	$8000000, 76(%rbx)              ## imm = 0x7A1200
LBB0_97:
	movq	_DRXD_BANDWIDTH_8MHZ_IN_HZ@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_FE_AG_REG_IND_DEL__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%r14d, %r14d
	movq	%rbx, %rdi
	movl	$50, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	jmp	LBB0_99
LBB0_98:
	movq	_DRXD_BANDWIDTH_7MHZ_IN_HZ@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_FE_AG_REG_IND_DEL__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$59, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	movl	$18439, %r14d                   ## imm = 0x4807
LBB0_99:
	testl	%eax, %eax
	js	LBB0_121
## %bb.100:
	movq	_SC_RA_RAM_BAND__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.101:
	movq	_SC_RA_RAM_CONFIG__A@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-72(%rbp), %rdx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Read16
	testl	%eax, %eax
	js	LBB0_121
## %bb.102:
	cmpl	$129, 56(%rbx)
	jne	LBB0_105
## %bb.103:
	cmpl	$139, 60(%rbx)
	jne	LBB0_105
## %bb.104:
	movq	_SC_RA_RAM_CONFIG_SLAVE__M@GOTPCREL(%rip), %rax
	movl	-72(%rbp), %edx
	orl	(%rax), %edx
	jmp	LBB0_106
LBB0_105:
	movq	_SC_RA_RAM_CONFIG_SLAVE__M@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	-72(%rbp), %edx
LBB0_106:
	movl	%edx, -72(%rbp)
	movl	(%r14), %esi
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.107:
	leaq	32(%rbx), %rsi
	movq	%rbx, %rdi
	callq	_SetCfgNoiseCalibration
	testl	%eax, %eax
	js	LBB0_121
## %bb.108:
	movq	8(%rbx), %rax
	movq	_CSCD_INIT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_111
## %bb.109:
	movq	_SC_RA_RAM_SAMPLE_RATE_COUNT__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DRXD_OSCDEV_DO_SCAN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.110:
	movq	_CSCD_SET@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 8(%rbx)
LBB0_111:
	imull	$1000, 16(%rbx), %edi           ## imm = 0x3E8
	movl	$2097152, %esi                  ## imm = 0x200000
	movl	%r15d, %edx
	callq	_MulDiv32
	movl	%eax, %r14d
	addl	$-8388608, %r14d                ## imm = 0xFF800000
	movq	_FE_IF_REG_INCR0__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_FE_IF_REG_INCR0__M@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	%r14d, %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.112:
	movq	_FE_IF_REG_INCR1__A@GOTPCREL(%rip), %rax
	movq	_FE_IF_REG_INCR0__W@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	sarl	%cl, %r14d
	movl	(%rax), %esi
	movq	_FE_IF_REG_INCR1__M@GOTPCREL(%rip), %rax
	andl	(%rax), %r14d
	movq	%rbx, %rdi
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.113:
	movslq	%r13d, %rax
	imulq	$274877907, %rax, %rsi          ## imm = 0x10624DD3
	movq	%rsi, %rax
	shrq	$63, %rax
	sarq	$38, %rsi
	addl	%eax, %esi
	xorl	%edx, %edx
	movb	-41(%rbp), %al                  ## 1-byte Reload
	movb	%al, %dl
	movq	%rbx, %rdi
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_SetFrequencyShift
	movq	_SC_COMM_STATE__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.114:
	movq	_SC_COMM_EXEC__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_121
## %bb.115:
	movq	_SC_RA_RAM_OP_AUTO_MODE__M@GOTPCREL(%rip), %rax
	movq	_SC_RA_RAM_OP_AUTO_GUARD__M@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_SC_RA_RAM_OP_AUTO_CONST__M@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_SC_RA_RAM_OP_AUTO_HIER__M@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	orl	-56(%rbp), %r12d                ## 4-byte Folded Reload
	movq	_SC_RA_RAM_OP_AUTO_RATE__M@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	%r12d, %edx
	callq	_SC_SetPrefParamCommand
	testl	%eax, %eax
	js	LBB0_121
## %bb.116:
	movq	_SC_RA_RAM_PROC_LOCKTRACK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SC_RA_RAM_SW_EVENT_RUN_NMASK__M@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_SC_RA_RAM_LOCKTRACK_MIN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_SC_ProcStartCommand
	testl	%eax, %eax
	js	LBB0_121
## %bb.117:
	movq	%rbx, %rdi
	callq	_StartOC
	testl	%eax, %eax
	js	LBB0_121
## %bb.118:
	movq	24(%rbx), %rcx
	movq	_OM_Default@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	je	LBB0_120
## %bb.119:
	movq	%rbx, %rdi
	callq	_StartDiversity
	testl	%eax, %eax
	js	LBB0_121
LBB0_120:
	movq	_DRXD_STARTED@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, (%rbx)
LBB0_121:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_85, LBB0_85-LJTI0_0
.set L0_0_set_83, LBB0_83-LJTI0_0
.set L0_0_set_81, LBB0_81-LJTI0_0
.set L0_0_set_79, LBB0_79-LJTI0_0
.set L0_0_set_77, LBB0_77-LJTI0_0
LJTI0_0:
	.long	L0_0_set_85
	.long	L0_0_set_83
	.long	L0_0_set_81
	.long	L0_0_set_79
	.long	L0_0_set_77
	.end_data_region
                                        ## -- End function
	.comm	_DRXD_STOPPED,8,3               ## @DRXD_STOPPED
	.comm	_INVERSION_ON,8,3               ## @INVERSION_ON
	.comm	_SC_RA_RAM_OP_AUTO_MODE__M,4,2  ## @SC_RA_RAM_OP_AUTO_MODE__M
	.comm	_SC_RA_RAM_OP_PARAM_MODE_8K,4,2 ## @SC_RA_RAM_OP_PARAM_MODE_8K
	.comm	_EC_SB_REG_TR_MODE__A,4,2       ## @EC_SB_REG_TR_MODE__A
	.comm	_EC_SB_REG_TR_MODE_8K,4,2       ## @EC_SB_REG_TR_MODE_8K
	.comm	_SC_RA_RAM_OP_PARAM_MODE_2K,4,2 ## @SC_RA_RAM_OP_PARAM_MODE_2K
	.comm	_EC_SB_REG_TR_MODE_2K,4,2       ## @EC_SB_REG_TR_MODE_2K
	.comm	_SC_RA_RAM_OP_PARAM_GUARD_4,4,2 ## @SC_RA_RAM_OP_PARAM_GUARD_4
	.comm	_SC_RA_RAM_OP_PARAM_GUARD_8,4,2 ## @SC_RA_RAM_OP_PARAM_GUARD_8
	.comm	_SC_RA_RAM_OP_PARAM_GUARD_16,4,2 ## @SC_RA_RAM_OP_PARAM_GUARD_16
	.comm	_SC_RA_RAM_OP_PARAM_GUARD_32,4,2 ## @SC_RA_RAM_OP_PARAM_GUARD_32
	.comm	_SC_RA_RAM_OP_AUTO_GUARD__M,4,2 ## @SC_RA_RAM_OP_AUTO_GUARD__M
	.comm	_SC_RA_RAM_OP_PARAM_HIER_A1,4,2 ## @SC_RA_RAM_OP_PARAM_HIER_A1
	.comm	_EQ_REG_OT_ALPHA__A,4,2         ## @EQ_REG_OT_ALPHA__A
	.comm	_EC_SB_REG_ALPHA__A,4,2         ## @EC_SB_REG_ALPHA__A
	.comm	_EQ_TD_TPS_PWR_UNKNOWN,4,2      ## @EQ_TD_TPS_PWR_UNKNOWN
	.comm	_EQ_TD_TPS_PWR_QAM16_ALPHA1,4,2 ## @EQ_TD_TPS_PWR_QAM16_ALPHA1
	.comm	_EQ_TD_TPS_PWR_QAM64_ALPHA1,4,2 ## @EQ_TD_TPS_PWR_QAM64_ALPHA1
	.comm	_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE
	.comm	_SC_RA_RAM_OP_PARAM_HIER_A2,4,2 ## @SC_RA_RAM_OP_PARAM_HIER_A2
	.comm	_EQ_TD_TPS_PWR_QAM16_ALPHA2,4,2 ## @EQ_TD_TPS_PWR_QAM16_ALPHA2
	.comm	_EQ_TD_TPS_PWR_QAM64_ALPHA2,4,2 ## @EQ_TD_TPS_PWR_QAM64_ALPHA2
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE
	.comm	_SC_RA_RAM_OP_PARAM_HIER_A4,4,2 ## @SC_RA_RAM_OP_PARAM_HIER_A4
	.comm	_EQ_TD_TPS_PWR_QAM16_ALPHA4,4,2 ## @EQ_TD_TPS_PWR_QAM16_ALPHA4
	.comm	_EQ_TD_TPS_PWR_QAM64_ALPHA4,4,2 ## @EQ_TD_TPS_PWR_QAM64_ALPHA4
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE
	.comm	_SC_RA_RAM_OP_AUTO_HIER__M,4,2  ## @SC_RA_RAM_OP_AUTO_HIER__M
	.comm	_SC_RA_RAM_OP_PARAM_HIER_NO,4,2 ## @SC_RA_RAM_OP_PARAM_HIER_NO
	.comm	_EQ_TD_TPS_PWR_QPSK,4,2         ## @EQ_TD_TPS_PWR_QPSK
	.comm	_EQ_TD_TPS_PWR_QAM16_ALPHAN,4,2 ## @EQ_TD_TPS_PWR_QAM16_ALPHAN
	.comm	_EQ_TD_TPS_PWR_QAM64_ALPHAN,4,2 ## @EQ_TD_TPS_PWR_QAM64_ALPHAN
	.comm	_SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE,4,2 ## @SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE
	.comm	_SC_RA_RAM_OP_AUTO_CONST__M,4,2 ## @SC_RA_RAM_OP_AUTO_CONST__M
	.comm	_SC_RA_RAM_OP_PARAM_CONST_QAM64,4,2 ## @SC_RA_RAM_OP_PARAM_CONST_QAM64
	.comm	_EQ_REG_OT_CONST__A,4,2         ## @EQ_REG_OT_CONST__A
	.comm	_EC_SB_REG_CONST__A,4,2         ## @EC_SB_REG_CONST__A
	.comm	_EC_SB_REG_CONST_64QAM,4,2      ## @EC_SB_REG_CONST_64QAM
	.comm	_EC_SB_REG_SCALE_MSB__A,4,2     ## @EC_SB_REG_SCALE_MSB__A
	.comm	_EC_SB_REG_SCALE_BIT2__A,4,2    ## @EC_SB_REG_SCALE_BIT2__A
	.comm	_EC_SB_REG_SCALE_LSB__A,4,2     ## @EC_SB_REG_SCALE_LSB__A
	.comm	_EQ_REG_TD_TPS_PWR_OFS__A,4,2   ## @EQ_REG_TD_TPS_PWR_OFS__A
	.comm	_EQ_REG_SN_CEGAIN__A,4,2        ## @EQ_REG_SN_CEGAIN__A
	.comm	_EQ_REG_IS_GAIN_MAN__A,4,2      ## @EQ_REG_IS_GAIN_MAN__A
	.comm	_EQ_REG_IS_GAIN_EXP__A,4,2      ## @EQ_REG_IS_GAIN_EXP__A
	.comm	_SC_RA_RAM_OP_PARAM_CONST_QPSK,4,2 ## @SC_RA_RAM_OP_PARAM_CONST_QPSK
	.comm	_EC_SB_REG_CONST_QPSK,4,2       ## @EC_SB_REG_CONST_QPSK
	.comm	_SC_RA_RAM_OP_PARAM_CONST_QAM16,4,2 ## @SC_RA_RAM_OP_PARAM_CONST_QAM16
	.comm	_EC_SB_REG_CONST_16QAM,4,2      ## @EC_SB_REG_CONST_16QAM
	.comm	_SC_RA_RAM_OP_PARAM_PRIO_HI,4,2 ## @SC_RA_RAM_OP_PARAM_PRIO_HI
	.comm	_EC_SB_REG_PRIOR__A,4,2         ## @EC_SB_REG_PRIOR__A
	.comm	_EC_SB_REG_PRIOR_HI,4,2         ## @EC_SB_REG_PRIOR_HI
	.comm	_SC_RA_RAM_OP_PARAM_RATE_1_2,4,2 ## @SC_RA_RAM_OP_PARAM_RATE_1_2
	.comm	_EC_VD_REG_SET_CODERATE__A,4,2  ## @EC_VD_REG_SET_CODERATE__A
	.comm	_EC_VD_REG_SET_CODERATE_C1_2,4,2 ## @EC_VD_REG_SET_CODERATE_C1_2
	.comm	_SC_RA_RAM_OP_AUTO_RATE__M,4,2  ## @SC_RA_RAM_OP_AUTO_RATE__M
	.comm	_SC_RA_RAM_OP_PARAM_RATE_2_3,4,2 ## @SC_RA_RAM_OP_PARAM_RATE_2_3
	.comm	_EC_VD_REG_SET_CODERATE_C2_3,4,2 ## @EC_VD_REG_SET_CODERATE_C2_3
	.comm	_SC_RA_RAM_OP_PARAM_RATE_3_4,4,2 ## @SC_RA_RAM_OP_PARAM_RATE_3_4
	.comm	_EC_VD_REG_SET_CODERATE_C3_4,4,2 ## @EC_VD_REG_SET_CODERATE_C3_4
	.comm	_SC_RA_RAM_OP_PARAM_RATE_5_6,4,2 ## @SC_RA_RAM_OP_PARAM_RATE_5_6
	.comm	_EC_VD_REG_SET_CODERATE_C5_6,4,2 ## @EC_VD_REG_SET_CODERATE_C5_6
	.comm	_SC_RA_RAM_OP_PARAM_RATE_7_8,4,2 ## @SC_RA_RAM_OP_PARAM_RATE_7_8
	.comm	_EC_VD_REG_SET_CODERATE_C7_8,4,2 ## @EC_VD_REG_SET_CODERATE_C7_8
	.comm	_DRXD_BANDWIDTH_8MHZ_IN_HZ,4,2  ## @DRXD_BANDWIDTH_8MHZ_IN_HZ
	.comm	_FE_AG_REG_IND_DEL__A,4,2       ## @FE_AG_REG_IND_DEL__A
	.comm	_DRXD_BANDWIDTH_7MHZ_IN_HZ,4,2  ## @DRXD_BANDWIDTH_7MHZ_IN_HZ
	.comm	_DRXD_BANDWIDTH_6MHZ_IN_HZ,4,2  ## @DRXD_BANDWIDTH_6MHZ_IN_HZ
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_SC_RA_RAM_BAND__A,4,2          ## @SC_RA_RAM_BAND__A
	.comm	_SC_RA_RAM_CONFIG__A,4,2        ## @SC_RA_RAM_CONFIG__A
	.comm	_SC_RA_RAM_CONFIG_SLAVE__M,4,2  ## @SC_RA_RAM_CONFIG_SLAVE__M
	.comm	_CSCD_INIT,8,3                  ## @CSCD_INIT
	.comm	_SC_RA_RAM_SAMPLE_RATE_COUNT__A,4,2 ## @SC_RA_RAM_SAMPLE_RATE_COUNT__A
	.comm	_DRXD_OSCDEV_DO_SCAN,4,2        ## @DRXD_OSCDEV_DO_SCAN
	.comm	_CSCD_SET,8,3                   ## @CSCD_SET
	.comm	_FE_IF_REG_INCR0__A,4,2         ## @FE_IF_REG_INCR0__A
	.comm	_FE_IF_REG_INCR0__M,4,2         ## @FE_IF_REG_INCR0__M
	.comm	_FE_IF_REG_INCR1__A,4,2         ## @FE_IF_REG_INCR1__A
	.comm	_FE_IF_REG_INCR0__W,4,2         ## @FE_IF_REG_INCR0__W
	.comm	_FE_IF_REG_INCR1__M,4,2         ## @FE_IF_REG_INCR1__M
	.comm	_SC_COMM_STATE__A,4,2           ## @SC_COMM_STATE__A
	.comm	_SC_COMM_EXEC__A,4,2            ## @SC_COMM_EXEC__A
	.comm	_SC_RA_RAM_PROC_LOCKTRACK,4,2   ## @SC_RA_RAM_PROC_LOCKTRACK
	.comm	_SC_RA_RAM_SW_EVENT_RUN_NMASK__M,4,2 ## @SC_RA_RAM_SW_EVENT_RUN_NMASK__M
	.comm	_SC_RA_RAM_LOCKTRACK_MIN,4,2    ## @SC_RA_RAM_LOCKTRACK_MIN
	.comm	_OM_Default,8,3                 ## @OM_Default
	.comm	_DRXD_STARTED,8,3               ## @DRXD_STARTED
	.comm	_EC_SB_REG_PRIOR_LO,4,2         ## @EC_SB_REG_PRIOR_LO
	.comm	_SC_RA_RAM_OP_PARAM_PRIO_LO,4,2 ## @SC_RA_RAM_OP_PARAM_PRIO_LO
	.no_dead_strip	_DRX_Start
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.DRX_Start
l_switch.table.DRX_Start:
	.quad	_SC_RA_RAM_OP_PARAM_GUARD_8
	.quad	_SC_RA_RAM_OP_PARAM_GUARD_4
	.quad	_SC_RA_RAM_OP_PARAM_GUARD_32
	.quad	_SC_RA_RAM_OP_PARAM_GUARD_16

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function DRX_Start
_DRX_Start:                             ; @DRX_Start
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	cmp	w1, #0
	mov	w8, #-500
	cneg	w24, w8, ge
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _DRXD_STOPPED@GOTPAGE
Lloh1:
	ldr	x9, [x9, _DRXD_STOPPED@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_9
; %bb.1:
	mov	x20, x1
	mov	x19, x0
	bl	_ResetECOD
	tbnz	w0, #31, LBB0_10
; %bb.2:
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_11
LBB0_3:
	mov	x0, x19
	bl	_InitSC
	tbnz	w0, #31, LBB0_10
; %bb.4:
	add	x1, x19, #84
	mov	x0, x19
	bl	_SetCfgIfAgc
	tbnz	w0, #31, LBB0_10
; %bb.5:
	add	x1, x19, #80
	mov	x0, x19
	bl	_SetCfgRfAgc
	tbnz	w0, #31, LBB0_10
; %bb.6:
Lloh3:
	adrp	x8, _INVERSION_ON@GOTPAGE
Lloh4:
	ldr	x8, [x8, _INVERSION_ON@GOTPAGEOFF]
	ldr	x9, [x19, #48]
Lloh5:
	ldr	x8, [x8]
	cmp	x9, x8
	cset	w22, eq
	ldr	w8, [x19, #56]
	cmp	w8, #129
	b.ne	LBB0_15
; %bb.7:
Lloh6:
	adrp	x8, _SC_RA_RAM_OP_PARAM_MODE_2K@GOTPAGE
Lloh7:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_MODE_2K@GOTPAGEOFF]
Lloh8:
	ldr	w21, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_18
; %bb.8:
Lloh9:
	adrp	x8, _EC_SB_REG_TR_MODE__A@GOTPAGE
Lloh10:
	ldr	x8, [x8, _EC_SB_REG_TR_MODE__A@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
Lloh12:
	adrp	x8, _EC_SB_REG_TR_MODE_2K@GOTPAGE
Lloh13:
	ldr	x8, [x8, _EC_SB_REG_TR_MODE_2K@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	mov	w8, #65
	mov	w9, #71
	mov	w10, #97
	b	LBB0_17
LBB0_9:
	mov	w0, #-1
LBB0_10:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_11:
	mov	x0, x19
	bl	_InitFT
	tbnz	w0, #31, LBB0_10
; %bb.12:
	mov	x0, x19
	bl	_InitCP
	tbnz	w0, #31, LBB0_10
; %bb.13:
	mov	x0, x19
	bl	_InitCE
	tbnz	w0, #31, LBB0_10
; %bb.14:
	mov	x0, x19
	bl	_InitEQ
	tbz	w0, #31, LBB0_3
	b	LBB0_10
LBB0_15:
Lloh15:
	adrp	x8, _SC_RA_RAM_OP_PARAM_MODE_8K@GOTPAGE
Lloh16:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_MODE_8K@GOTPAGEOFF]
Lloh17:
	ldr	w21, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_18
; %bb.16:
Lloh18:
	adrp	x8, _EC_SB_REG_TR_MODE__A@GOTPAGE
Lloh19:
	ldr	x8, [x8, _EC_SB_REG_TR_MODE__A@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
Lloh21:
	adrp	x8, _EC_SB_REG_TR_MODE_8K@GOTPAGE
Lloh22:
	ldr	x8, [x8, _EC_SB_REG_TR_MODE_8K@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	mov	w8, #67
	mov	w9, #83
	mov	w10, #99
LBB0_17:
	tst	w0, #0x80000000
	csel	w27, wzr, w10, ne
	csel	w26, wzr, w9, ne
	csel	w28, wzr, w8, ne
	b	LBB0_19
LBB0_18:
	mov	w27, #0
	mov	w26, #0
	mov	w28, #0
LBB0_19:
	ldr	w8, [x19, #60]
	sub	w8, w8, #137
	cmp	w8, #3
	b.hi	LBB0_21
; %bb.20:
Lloh24:
	adrp	x9, l_switch.table.DRX_Start@PAGE
Lloh25:
	add	x9, x9, l_switch.table.DRX_Start@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	b	LBB0_22
LBB0_21:
Lloh26:
	adrp	x8, _SC_RA_RAM_OP_PARAM_GUARD_4@GOTPAGE
Lloh27:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_GUARD_4@GOTPAGEOFF]
LBB0_22:
	ldr	w23, [x8]
	ldr	w8, [x19, #64]
	cmp	w8, #134
	b.eq	LBB0_29
; %bb.23:
	cmp	w8, #135
	b.eq	LBB0_33
; %bb.24:
	cmp	w8, #136
	b.ne	LBB0_38
; %bb.25:
Lloh28:
	adrp	x8, _SC_RA_RAM_OP_PARAM_HIER_A1@GOTPAGE
Lloh29:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_HIER_A1@GOTPAGEOFF]
Lloh30:
	ldr	w25, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_43
; %bb.26:
Lloh31:
	adrp	x8, _EQ_REG_OT_ALPHA__A@GOTPAGE
Lloh32:
	ldr	x8, [x8, _EQ_REG_OT_ALPHA__A@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.27:
Lloh34:
	adrp	x8, _EC_SB_REG_ALPHA__A@GOTPAGE
Lloh35:
	ldr	x8, [x8, _EC_SB_REG_ALPHA__A@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.28:
	stp	w28, w27, [sp]                  ; 8-byte Folded Spill
	stp	w26, w23, [sp, #8]              ; 8-byte Folded Spill
	stp	w22, w25, [sp, #20]             ; 8-byte Folded Spill
	str	w21, [sp, #16]                  ; 4-byte Folded Spill
Lloh37:
	adrp	x8, _SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE@GOTPAGE
Lloh38:
	ldr	x8, [x8, _SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE@GOTPAGEOFF]
Lloh39:
	adrp	x9, _SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE@GOTPAGE
Lloh40:
	ldr	x9, [x9, _SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE@GOTPAGEOFF]
Lloh41:
	adrp	x10, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE@GOTPAGE
Lloh42:
	ldr	x10, [x10, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE@GOTPAGEOFF]
Lloh43:
	adrp	x11, _SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE@GOTPAGE
Lloh44:
	ldr	x11, [x11, _SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE@GOTPAGEOFF]
Lloh45:
	adrp	x12, _SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE@GOTPAGE
Lloh46:
	ldr	x12, [x12, _SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE@GOTPAGEOFF]
Lloh47:
	adrp	x13, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE@GOTPAGE
Lloh48:
	ldr	x13, [x13, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE@GOTPAGEOFF]
Lloh49:
	adrp	x14, _EQ_TD_TPS_PWR_QAM64_ALPHA1@GOTPAGE
Lloh50:
	ldr	x14, [x14, _EQ_TD_TPS_PWR_QAM64_ALPHA1@GOTPAGEOFF]
Lloh51:
	adrp	x15, _EQ_TD_TPS_PWR_QAM16_ALPHA1@GOTPAGE
Lloh52:
	ldr	x15, [x15, _EQ_TD_TPS_PWR_QAM16_ALPHA1@GOTPAGEOFF]
	b	LBB0_37
LBB0_29:
Lloh53:
	adrp	x8, _SC_RA_RAM_OP_PARAM_HIER_A4@GOTPAGE
Lloh54:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_HIER_A4@GOTPAGEOFF]
Lloh55:
	ldr	w25, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_43
; %bb.30:
Lloh56:
	adrp	x8, _EQ_REG_OT_ALPHA__A@GOTPAGE
Lloh57:
	ldr	x8, [x8, _EQ_REG_OT_ALPHA__A@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #3
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.31:
Lloh59:
	adrp	x8, _EC_SB_REG_ALPHA__A@GOTPAGE
Lloh60:
	ldr	x8, [x8, _EC_SB_REG_ALPHA__A@GOTPAGEOFF]
Lloh61:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #3
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.32:
	stp	w28, w27, [sp]                  ; 8-byte Folded Spill
	stp	w26, w23, [sp, #8]              ; 8-byte Folded Spill
	stp	w22, w25, [sp, #20]             ; 8-byte Folded Spill
	str	w21, [sp, #16]                  ; 4-byte Folded Spill
Lloh62:
	adrp	x8, _SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE@GOTPAGE
Lloh63:
	ldr	x8, [x8, _SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE@GOTPAGEOFF]
Lloh64:
	adrp	x9, _SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE@GOTPAGE
Lloh65:
	ldr	x9, [x9, _SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE@GOTPAGEOFF]
Lloh66:
	adrp	x10, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE@GOTPAGE
Lloh67:
	ldr	x10, [x10, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE@GOTPAGEOFF]
Lloh68:
	adrp	x11, _SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE@GOTPAGE
Lloh69:
	ldr	x11, [x11, _SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE@GOTPAGEOFF]
Lloh70:
	adrp	x12, _SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE@GOTPAGE
Lloh71:
	ldr	x12, [x12, _SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE@GOTPAGEOFF]
Lloh72:
	adrp	x13, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE@GOTPAGE
Lloh73:
	ldr	x13, [x13, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE@GOTPAGEOFF]
Lloh74:
	adrp	x14, _EQ_TD_TPS_PWR_QAM64_ALPHA4@GOTPAGE
Lloh75:
	ldr	x14, [x14, _EQ_TD_TPS_PWR_QAM64_ALPHA4@GOTPAGEOFF]
Lloh76:
	adrp	x15, _EQ_TD_TPS_PWR_QAM16_ALPHA4@GOTPAGE
Lloh77:
	ldr	x15, [x15, _EQ_TD_TPS_PWR_QAM16_ALPHA4@GOTPAGEOFF]
	b	LBB0_37
LBB0_33:
Lloh78:
	adrp	x8, _SC_RA_RAM_OP_PARAM_HIER_A2@GOTPAGE
Lloh79:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_HIER_A2@GOTPAGEOFF]
Lloh80:
	ldr	w25, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_43
; %bb.34:
Lloh81:
	adrp	x8, _EQ_REG_OT_ALPHA__A@GOTPAGE
Lloh82:
	ldr	x8, [x8, _EQ_REG_OT_ALPHA__A@GOTPAGEOFF]
Lloh83:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.35:
Lloh84:
	adrp	x8, _EC_SB_REG_ALPHA__A@GOTPAGE
Lloh85:
	ldr	x8, [x8, _EC_SB_REG_ALPHA__A@GOTPAGEOFF]
Lloh86:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.36:
	stp	w28, w27, [sp]                  ; 8-byte Folded Spill
	stp	w26, w23, [sp, #8]              ; 8-byte Folded Spill
	stp	w22, w25, [sp, #20]             ; 8-byte Folded Spill
	str	w21, [sp, #16]                  ; 4-byte Folded Spill
Lloh87:
	adrp	x8, _SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE@GOTPAGE
Lloh88:
	ldr	x8, [x8, _SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE@GOTPAGEOFF]
Lloh89:
	adrp	x9, _SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE@GOTPAGE
Lloh90:
	ldr	x9, [x9, _SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE@GOTPAGEOFF]
Lloh91:
	adrp	x10, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE@GOTPAGE
Lloh92:
	ldr	x10, [x10, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE@GOTPAGEOFF]
Lloh93:
	adrp	x11, _SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE@GOTPAGE
Lloh94:
	ldr	x11, [x11, _SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE@GOTPAGEOFF]
Lloh95:
	adrp	x12, _SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE@GOTPAGE
Lloh96:
	ldr	x12, [x12, _SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE@GOTPAGEOFF]
Lloh97:
	adrp	x13, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE@GOTPAGE
Lloh98:
	ldr	x13, [x13, _SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE@GOTPAGEOFF]
Lloh99:
	adrp	x14, _EQ_TD_TPS_PWR_QAM64_ALPHA2@GOTPAGE
Lloh100:
	ldr	x14, [x14, _EQ_TD_TPS_PWR_QAM64_ALPHA2@GOTPAGEOFF]
Lloh101:
	adrp	x15, _EQ_TD_TPS_PWR_QAM16_ALPHA2@GOTPAGE
Lloh102:
	ldr	x15, [x15, _EQ_TD_TPS_PWR_QAM16_ALPHA2@GOTPAGEOFF]
LBB0_37:
Lloh103:
	adrp	x16, _EQ_TD_TPS_PWR_UNKNOWN@GOTPAGE
Lloh104:
	ldr	x16, [x16, _EQ_TD_TPS_PWR_UNKNOWN@GOTPAGEOFF]
	b	LBB0_42
LBB0_38:
Lloh105:
	adrp	x8, _SC_RA_RAM_OP_PARAM_HIER_NO@GOTPAGE
Lloh106:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_HIER_NO@GOTPAGEOFF]
Lloh107:
	ldr	w25, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_43
; %bb.39:
Lloh108:
	adrp	x8, _EQ_REG_OT_ALPHA__A@GOTPAGE
Lloh109:
	ldr	x8, [x8, _EQ_REG_OT_ALPHA__A@GOTPAGEOFF]
Lloh110:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.40:
Lloh111:
	adrp	x8, _EC_SB_REG_ALPHA__A@GOTPAGE
Lloh112:
	ldr	x8, [x8, _EC_SB_REG_ALPHA__A@GOTPAGEOFF]
Lloh113:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.41:
	stp	w28, w27, [sp]                  ; 8-byte Folded Spill
	stp	w26, w23, [sp, #8]              ; 8-byte Folded Spill
	stp	w22, w25, [sp, #20]             ; 8-byte Folded Spill
	str	w21, [sp, #16]                  ; 4-byte Folded Spill
Lloh114:
	adrp	x8, _SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE@GOTPAGE
Lloh115:
	ldr	x8, [x8, _SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE@GOTPAGEOFF]
Lloh116:
	adrp	x9, _SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE@GOTPAGE
Lloh117:
	ldr	x9, [x9, _SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE@GOTPAGEOFF]
Lloh118:
	adrp	x10, _SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE@GOTPAGE
Lloh119:
	ldr	x10, [x10, _SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE@GOTPAGEOFF]
Lloh120:
	adrp	x11, _SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE@GOTPAGE
Lloh121:
	ldr	x11, [x11, _SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE@GOTPAGEOFF]
Lloh122:
	adrp	x12, _SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE@GOTPAGE
Lloh123:
	ldr	x12, [x12, _SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE@GOTPAGEOFF]
Lloh124:
	adrp	x13, _SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE@GOTPAGE
Lloh125:
	ldr	x13, [x13, _SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE@GOTPAGEOFF]
Lloh126:
	adrp	x14, _EQ_TD_TPS_PWR_QAM64_ALPHAN@GOTPAGE
Lloh127:
	ldr	x14, [x14, _EQ_TD_TPS_PWR_QAM64_ALPHAN@GOTPAGEOFF]
Lloh128:
	adrp	x15, _EQ_TD_TPS_PWR_QAM16_ALPHAN@GOTPAGE
Lloh129:
	ldr	x15, [x15, _EQ_TD_TPS_PWR_QAM16_ALPHAN@GOTPAGEOFF]
Lloh130:
	adrp	x16, _EQ_TD_TPS_PWR_QPSK@GOTPAGE
Lloh131:
	ldr	x16, [x16, _EQ_TD_TPS_PWR_QPSK@GOTPAGEOFF]
LBB0_42:
	ldr	w17, [x8]
	ldr	w9, [x9]
	ldr	w25, [x10]
	ldr	w26, [x11]
	ldr	w27, [x12]
	ldr	w28, [x13]
	ldr	w21, [x14]
	ldr	w22, [x15]
	ldr	w23, [x16]
	b	LBB0_45
LBB0_43:
	stp	w23, w21, [sp, #12]             ; 8-byte Folded Spill
	str	w22, [sp, #20]                  ; 4-byte Folded Spill
	tbnz	w0, #31, LBB0_10
; %bb.44:
	stp	w28, w27, [sp]                  ; 8-byte Folded Spill
	str	w26, [sp, #8]                   ; 4-byte Folded Spill
	str	w25, [sp, #24]                  ; 4-byte Folded Spill
	mov	w17, #0
	mov	w9, #0
	mov	w25, #0
	mov	w26, #0
	mov	w27, #0
	mov	w28, #0
	mov	w21, #0
	mov	w22, #0
	mov	w23, #0
LBB0_45:
	ldr	w8, [x19, #68]
	cmp	w8, #130
	b.eq	LBB0_56
; %bb.46:
	cmp	w8, #132
	b.ne	LBB0_65
; %bb.47:
Lloh132:
	adrp	x8, _SC_RA_RAM_OP_PARAM_CONST_QAM16@GOTPAGE
Lloh133:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_CONST_QAM16@GOTPAGEOFF]
Lloh134:
	ldr	w21, [x8]
	ldr	x8, [x19, #40]
	ldr	w26, [sp, #24]                  ; 4-byte Folded Reload
	cbz	x8, LBB0_76
; %bb.48:
	mov	x23, x9
Lloh135:
	adrp	x8, _EQ_REG_OT_CONST__A@GOTPAGE
Lloh136:
	ldr	x8, [x8, _EQ_REG_OT_CONST__A@GOTPAGEOFF]
Lloh137:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.49:
Lloh138:
	adrp	x8, _EC_SB_REG_CONST__A@GOTPAGE
Lloh139:
	ldr	x8, [x8, _EC_SB_REG_CONST__A@GOTPAGEOFF]
Lloh140:
	ldr	w1, [x8]
Lloh141:
	adrp	x8, _EC_SB_REG_CONST_16QAM@GOTPAGE
Lloh142:
	ldr	x8, [x8, _EC_SB_REG_CONST_16QAM@GOTPAGEOFF]
Lloh143:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.50:
Lloh144:
	adrp	x8, _EC_SB_REG_SCALE_MSB__A@GOTPAGE
Lloh145:
	ldr	x8, [x8, _EC_SB_REG_SCALE_MSB__A@GOTPAGEOFF]
Lloh146:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #16
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.51:
Lloh147:
	adrp	x8, _EC_SB_REG_SCALE_BIT2__A@GOTPAGE
Lloh148:
	ldr	x8, [x8, _EC_SB_REG_SCALE_BIT2__A@GOTPAGEOFF]
Lloh149:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #4
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.52:
Lloh150:
	adrp	x8, _EC_SB_REG_SCALE_LSB__A@GOTPAGE
Lloh151:
	ldr	x8, [x8, _EC_SB_REG_SCALE_LSB__A@GOTPAGEOFF]
Lloh152:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.53:
Lloh153:
	adrp	x8, _EQ_REG_TD_TPS_PWR_OFS__A@GOTPAGE
Lloh154:
	ldr	x8, [x8, _EQ_REG_TD_TPS_PWR_OFS__A@GOTPAGEOFF]
Lloh155:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x22
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.54:
Lloh156:
	adrp	x8, _EQ_REG_SN_CEGAIN__A@GOTPAGE
Lloh157:
	ldr	x8, [x8, _EQ_REG_SN_CEGAIN__A@GOTPAGEOFF]
Lloh158:
	ldr	w1, [x8]
	mov	x0, x19
	ldr	w2, [sp, #8]                    ; 4-byte Folded Reload
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.55:
Lloh159:
	adrp	x8, _EQ_REG_IS_GAIN_MAN__A@GOTPAGE
Lloh160:
	ldr	x8, [x8, _EQ_REG_IS_GAIN_MAN__A@GOTPAGEOFF]
Lloh161:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x27
	mov	w3, #0
	bl	_Write16
	mov	x2, x23
	mov	x27, x21
	tbz	w0, #31, LBB0_74
	b	LBB0_10
LBB0_56:
Lloh162:
	adrp	x8, _SC_RA_RAM_OP_PARAM_CONST_QPSK@GOTPAGE
Lloh163:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_CONST_QPSK@GOTPAGEOFF]
Lloh164:
	ldr	w27, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_75
; %bb.57:
Lloh165:
	adrp	x8, _EQ_REG_OT_CONST__A@GOTPAGE
Lloh166:
	ldr	x8, [x8, _EQ_REG_OT_CONST__A@GOTPAGEOFF]
Lloh167:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	w3, #0
	bl	_Write16
	ldr	w26, [sp, #24]                  ; 4-byte Folded Reload
	tbnz	w0, #31, LBB0_10
; %bb.58:
Lloh168:
	adrp	x8, _EC_SB_REG_CONST__A@GOTPAGE
Lloh169:
	ldr	x8, [x8, _EC_SB_REG_CONST__A@GOTPAGEOFF]
Lloh170:
	ldr	w1, [x8]
Lloh171:
	adrp	x8, _EC_SB_REG_CONST_QPSK@GOTPAGE
Lloh172:
	ldr	x8, [x8, _EC_SB_REG_CONST_QPSK@GOTPAGEOFF]
Lloh173:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.59:
Lloh174:
	adrp	x8, _EC_SB_REG_SCALE_MSB__A@GOTPAGE
Lloh175:
	ldr	x8, [x8, _EC_SB_REG_SCALE_MSB__A@GOTPAGEOFF]
Lloh176:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #16
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.60:
Lloh177:
	adrp	x8, _EC_SB_REG_SCALE_BIT2__A@GOTPAGE
Lloh178:
	ldr	x8, [x8, _EC_SB_REG_SCALE_BIT2__A@GOTPAGEOFF]
Lloh179:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.61:
Lloh180:
	adrp	x8, _EC_SB_REG_SCALE_LSB__A@GOTPAGE
Lloh181:
	ldr	x8, [x8, _EC_SB_REG_SCALE_LSB__A@GOTPAGEOFF]
Lloh182:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.62:
Lloh183:
	adrp	x8, _EQ_REG_TD_TPS_PWR_OFS__A@GOTPAGE
Lloh184:
	ldr	x8, [x8, _EQ_REG_TD_TPS_PWR_OFS__A@GOTPAGEOFF]
Lloh185:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x23
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.63:
Lloh186:
	adrp	x8, _EQ_REG_SN_CEGAIN__A@GOTPAGE
Lloh187:
	ldr	x8, [x8, _EQ_REG_SN_CEGAIN__A@GOTPAGEOFF]
Lloh188:
	ldr	w1, [x8]
	mov	x0, x19
	ldr	w2, [sp, #4]                    ; 4-byte Folded Reload
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.64:
Lloh189:
	adrp	x8, _EQ_REG_IS_GAIN_MAN__A@GOTPAGE
Lloh190:
	ldr	x8, [x8, _EQ_REG_IS_GAIN_MAN__A@GOTPAGEOFF]
Lloh191:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x28
	mov	w3, #0
	bl	_Write16
	mov	x2, x25
	tbz	w0, #31, LBB0_74
	b	LBB0_10
LBB0_65:
Lloh192:
	adrp	x8, _SC_RA_RAM_OP_PARAM_CONST_QAM64@GOTPAGE
Lloh193:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_CONST_QAM64@GOTPAGEOFF]
Lloh194:
	ldr	w27, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_75
; %bb.66:
	mov	x22, x17
Lloh195:
	adrp	x8, _EQ_REG_OT_CONST__A@GOTPAGE
Lloh196:
	ldr	x8, [x8, _EQ_REG_OT_CONST__A@GOTPAGEOFF]
Lloh197:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.67:
Lloh198:
	adrp	x8, _EC_SB_REG_CONST__A@GOTPAGE
Lloh199:
	ldr	x8, [x8, _EC_SB_REG_CONST__A@GOTPAGEOFF]
Lloh200:
	ldr	w1, [x8]
Lloh201:
	adrp	x8, _EC_SB_REG_CONST_64QAM@GOTPAGE
Lloh202:
	ldr	x8, [x8, _EC_SB_REG_CONST_64QAM@GOTPAGEOFF]
Lloh203:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.68:
Lloh204:
	adrp	x8, _EC_SB_REG_SCALE_MSB__A@GOTPAGE
Lloh205:
	ldr	x8, [x8, _EC_SB_REG_SCALE_MSB__A@GOTPAGEOFF]
Lloh206:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #32
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.69:
Lloh207:
	adrp	x8, _EC_SB_REG_SCALE_BIT2__A@GOTPAGE
Lloh208:
	ldr	x8, [x8, _EC_SB_REG_SCALE_BIT2__A@GOTPAGEOFF]
Lloh209:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #8
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.70:
Lloh210:
	adrp	x8, _EC_SB_REG_SCALE_LSB__A@GOTPAGE
Lloh211:
	ldr	x8, [x8, _EC_SB_REG_SCALE_LSB__A@GOTPAGEOFF]
Lloh212:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #2
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.71:
Lloh213:
	adrp	x8, _EQ_REG_TD_TPS_PWR_OFS__A@GOTPAGE
Lloh214:
	ldr	x8, [x8, _EQ_REG_TD_TPS_PWR_OFS__A@GOTPAGEOFF]
Lloh215:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.72:
Lloh216:
	adrp	x8, _EQ_REG_SN_CEGAIN__A@GOTPAGE
Lloh217:
	ldr	x8, [x8, _EQ_REG_SN_CEGAIN__A@GOTPAGEOFF]
Lloh218:
	ldr	w1, [x8]
	mov	x0, x19
	ldr	w2, [sp]                        ; 4-byte Folded Reload
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.73:
Lloh219:
	adrp	x8, _EQ_REG_IS_GAIN_MAN__A@GOTPAGE
Lloh220:
	ldr	x8, [x8, _EQ_REG_IS_GAIN_MAN__A@GOTPAGEOFF]
Lloh221:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x26
	mov	w3, #0
	bl	_Write16
	ldr	w26, [sp, #24]                  ; 4-byte Folded Reload
	mov	x2, x22
	tbnz	w0, #31, LBB0_10
LBB0_74:
Lloh222:
	adrp	x8, _EQ_REG_IS_GAIN_EXP__A@GOTPAGE
Lloh223:
	ldr	x8, [x8, _EQ_REG_IS_GAIN_EXP__A@GOTPAGEOFF]
Lloh224:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	tbz	w0, #31, LBB0_77
	b	LBB0_10
LBB0_75:
	ldr	w26, [sp, #24]                  ; 4-byte Folded Reload
	b	LBB0_77
LBB0_76:
	mov	x27, x21
LBB0_77:
Lloh225:
	adrp	x8, _SC_RA_RAM_OP_PARAM_PRIO_HI@GOTPAGE
Lloh226:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_PRIO_HI@GOTPAGEOFF]
Lloh227:
	ldr	w21, [x8]
Lloh228:
	adrp	x8, _EC_SB_REG_PRIOR__A@GOTPAGE
Lloh229:
	ldr	x8, [x8, _EC_SB_REG_PRIOR__A@GOTPAGEOFF]
Lloh230:
	ldr	w1, [x8]
Lloh231:
	adrp	x8, _EC_SB_REG_PRIOR_HI@GOTPAGE
Lloh232:
	ldr	x8, [x8, _EC_SB_REG_PRIOR_HI@GOTPAGEOFF]
Lloh233:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	ldr	w8, [x19, #72]
	sub	w8, w8, #141
	cmp	w8, #4
	b.hi	LBB0_85
; %bb.78:
Lloh234:
	adrp	x9, lJTI0_0@PAGE
Lloh235:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_79
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_79:
Lloh236:
	adrp	x8, _SC_RA_RAM_OP_PARAM_RATE_7_8@GOTPAGE
Lloh237:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_RATE_7_8@GOTPAGEOFF]
Lloh238:
	ldr	w23, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_90
; %bb.80:
Lloh239:
	adrp	x8, _EC_VD_REG_SET_CODERATE_C7_8@GOTPAGE
Lloh240:
	ldr	x8, [x8, _EC_VD_REG_SET_CODERATE_C7_8@GOTPAGEOFF]
	b	LBB0_89
LBB0_81:
Lloh241:
	adrp	x8, _SC_RA_RAM_OP_PARAM_RATE_5_6@GOTPAGE
Lloh242:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_RATE_5_6@GOTPAGEOFF]
Lloh243:
	ldr	w23, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_90
; %bb.82:
Lloh244:
	adrp	x8, _EC_VD_REG_SET_CODERATE_C5_6@GOTPAGE
Lloh245:
	ldr	x8, [x8, _EC_VD_REG_SET_CODERATE_C5_6@GOTPAGEOFF]
	b	LBB0_89
LBB0_83:
Lloh246:
	adrp	x8, _SC_RA_RAM_OP_PARAM_RATE_3_4@GOTPAGE
Lloh247:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_RATE_3_4@GOTPAGEOFF]
Lloh248:
	ldr	w23, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_90
; %bb.84:
Lloh249:
	adrp	x8, _EC_VD_REG_SET_CODERATE_C3_4@GOTPAGE
Lloh250:
	ldr	x8, [x8, _EC_VD_REG_SET_CODERATE_C3_4@GOTPAGEOFF]
	b	LBB0_89
LBB0_85:
Lloh251:
	adrp	x8, _SC_RA_RAM_OP_PARAM_RATE_2_3@GOTPAGE
Lloh252:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_RATE_2_3@GOTPAGEOFF]
Lloh253:
	ldr	w23, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_90
; %bb.86:
Lloh254:
	adrp	x8, _EC_VD_REG_SET_CODERATE_C2_3@GOTPAGE
Lloh255:
	ldr	x8, [x8, _EC_VD_REG_SET_CODERATE_C2_3@GOTPAGEOFF]
	b	LBB0_89
LBB0_87:
Lloh256:
	adrp	x8, _SC_RA_RAM_OP_PARAM_RATE_1_2@GOTPAGE
Lloh257:
	ldr	x8, [x8, _SC_RA_RAM_OP_PARAM_RATE_1_2@GOTPAGEOFF]
Lloh258:
	ldr	w23, [x8]
	ldr	x8, [x19, #40]
	cbz	x8, LBB0_90
; %bb.88:
Lloh259:
	adrp	x8, _EC_VD_REG_SET_CODERATE_C1_2@GOTPAGE
Lloh260:
	ldr	x8, [x8, _EC_VD_REG_SET_CODERATE_C1_2@GOTPAGEOFF]
LBB0_89:
Lloh261:
	adrp	x9, _EC_VD_REG_SET_CODERATE__A@GOTPAGE
Lloh262:
	ldr	x9, [x9, _EC_VD_REG_SET_CODERATE__A@GOTPAGEOFF]
Lloh263:
	ldr	w1, [x9]
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
LBB0_90:
	tbnz	w0, #31, LBB0_10
; %bb.91:
	ldr	w8, [x19, #76]
	mov	w9, #53183
	movk	w9, #106, lsl #16
	cmp	w8, w9
	b.gt	LBB0_95
; %bb.92:
	cbz	w8, LBB0_98
; %bb.93:
	mov	w9, #36224
	movk	w9, #91, lsl #16
	cmp	w8, w9
	b.ne	LBB0_97
; %bb.94:
Lloh264:
	adrp	x8, _DRXD_BANDWIDTH_6MHZ_IN_HZ@GOTPAGE
Lloh265:
	ldr	x8, [x8, _DRXD_BANDWIDTH_6MHZ_IN_HZ@GOTPAGEOFF]
Lloh266:
	ldr	w22, [x8]
Lloh267:
	adrp	x8, _FE_AG_REG_IND_DEL__A@GOTPAGE
Lloh268:
	ldr	x8, [x8, _FE_AG_REG_IND_DEL__A@GOTPAGEOFF]
Lloh269:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #71
	mov	w3, #0
	bl	_Write16
	mov	w2, #3847
	b	LBB0_101
LBB0_95:
	mov	w9, #53184
	movk	w9, #106, lsl #16
	cmp	w8, w9
	b.eq	LBB0_100
; %bb.96:
	mov	w9, #4608
	movk	w9, #122, lsl #16
	cmp	w8, w9
	b.eq	LBB0_99
LBB0_97:
	mov	w22, #0
	mov	w2, #0
Lloh270:
	adrp	x8, _EINVAL@GOTPAGE
Lloh271:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh272:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_101
LBB0_98:
	mov	w8, #4608
	movk	w8, #122, lsl #16
	str	w8, [x19, #76]
LBB0_99:
Lloh273:
	adrp	x8, _DRXD_BANDWIDTH_8MHZ_IN_HZ@GOTPAGE
Lloh274:
	ldr	x8, [x8, _DRXD_BANDWIDTH_8MHZ_IN_HZ@GOTPAGEOFF]
Lloh275:
	ldr	w22, [x8]
Lloh276:
	adrp	x8, _FE_AG_REG_IND_DEL__A@GOTPAGE
Lloh277:
	ldr	x8, [x8, _FE_AG_REG_IND_DEL__A@GOTPAGEOFF]
Lloh278:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #50
	mov	w3, #0
	bl	_Write16
	mov	w2, #0
	b	LBB0_101
LBB0_100:
Lloh279:
	adrp	x8, _DRXD_BANDWIDTH_7MHZ_IN_HZ@GOTPAGE
Lloh280:
	ldr	x8, [x8, _DRXD_BANDWIDTH_7MHZ_IN_HZ@GOTPAGEOFF]
Lloh281:
	ldr	w22, [x8]
Lloh282:
	adrp	x8, _FE_AG_REG_IND_DEL__A@GOTPAGE
Lloh283:
	ldr	x8, [x8, _FE_AG_REG_IND_DEL__A@GOTPAGEOFF]
Lloh284:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #59
	mov	w3, #0
	bl	_Write16
	mov	w2, #18439
LBB0_101:
	tbnz	w0, #31, LBB0_10
; %bb.102:
Lloh285:
	adrp	x8, _SC_RA_RAM_BAND__A@GOTPAGE
Lloh286:
	ldr	x8, [x8, _SC_RA_RAM_BAND__A@GOTPAGEOFF]
Lloh287:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.103:
Lloh288:
	adrp	x25, _SC_RA_RAM_CONFIG__A@GOTPAGE
Lloh289:
	ldr	x25, [x25, _SC_RA_RAM_CONFIG__A@GOTPAGEOFF]
	ldr	w1, [x25]
	add	x2, sp, #28
	mov	x0, x19
	mov	w3, #0
	bl	_Read16
	tbnz	w0, #31, LBB0_10
; %bb.104:
	ldr	w8, [x19, #56]
	cmp	w8, #129
	b.ne	LBB0_107
; %bb.105:
	ldr	w8, [x19, #60]
	cmp	w8, #139
	b.ne	LBB0_107
; %bb.106:
Lloh290:
	adrp	x8, _SC_RA_RAM_CONFIG_SLAVE__M@GOTPAGE
Lloh291:
	ldr	x8, [x8, _SC_RA_RAM_CONFIG_SLAVE__M@GOTPAGEOFF]
Lloh292:
	ldr	w8, [x8]
	ldr	w9, [sp, #28]
	orr	w2, w9, w8
	b	LBB0_108
LBB0_107:
Lloh293:
	adrp	x8, _SC_RA_RAM_CONFIG_SLAVE__M@GOTPAGE
Lloh294:
	ldr	x8, [x8, _SC_RA_RAM_CONFIG_SLAVE__M@GOTPAGEOFF]
Lloh295:
	ldr	w8, [x8]
	ldr	w9, [sp, #28]
	bic	w2, w9, w8
LBB0_108:
	str	w2, [sp, #28]
	ldr	w1, [x25]
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.109:
	add	x1, x19, #32
	mov	x0, x19
	bl	_SetCfgNoiseCalibration
	tbnz	w0, #31, LBB0_10
; %bb.110:
	ldr	x8, [x19, #8]
Lloh296:
	adrp	x9, _CSCD_INIT@GOTPAGE
Lloh297:
	ldr	x9, [x9, _CSCD_INIT@GOTPAGEOFF]
Lloh298:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_113
; %bb.111:
Lloh299:
	adrp	x8, _SC_RA_RAM_SAMPLE_RATE_COUNT__A@GOTPAGE
Lloh300:
	ldr	x8, [x8, _SC_RA_RAM_SAMPLE_RATE_COUNT__A@GOTPAGEOFF]
Lloh301:
	ldr	w1, [x8]
Lloh302:
	adrp	x8, _DRXD_OSCDEV_DO_SCAN@GOTPAGE
Lloh303:
	ldr	x8, [x8, _DRXD_OSCDEV_DO_SCAN@GOTPAGEOFF]
Lloh304:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.112:
Lloh305:
	adrp	x8, _CSCD_SET@GOTPAGE
Lloh306:
	ldr	x8, [x8, _CSCD_SET@GOTPAGEOFF]
Lloh307:
	ldr	x8, [x8]
	str	x8, [x19, #8]
LBB0_113:
	ldr	w8, [x19, #16]
	mov	w9, #1000
	mul	w0, w8, w9
	mov	w1, #2097152
	mov	x2, x22
	bl	_MulDiv32
Lloh308:
	adrp	x8, _FE_IF_REG_INCR0__A@GOTPAGE
Lloh309:
	ldr	x8, [x8, _FE_IF_REG_INCR0__A@GOTPAGEOFF]
	sub	w22, w0, #2048, lsl #12         ; =8388608
Lloh310:
	ldr	w1, [x8]
Lloh311:
	adrp	x8, _FE_IF_REG_INCR0__M@GOTPAGE
Lloh312:
	ldr	x8, [x8, _FE_IF_REG_INCR0__M@GOTPAGEOFF]
Lloh313:
	ldr	w8, [x8]
	and	w2, w8, w22
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.114:
Lloh314:
	adrp	x8, _FE_IF_REG_INCR1__A@GOTPAGE
Lloh315:
	ldr	x8, [x8, _FE_IF_REG_INCR1__A@GOTPAGEOFF]
Lloh316:
	ldr	w1, [x8]
Lloh317:
	adrp	x8, _FE_IF_REG_INCR0__W@GOTPAGE
Lloh318:
	ldr	x8, [x8, _FE_IF_REG_INCR0__W@GOTPAGEOFF]
Lloh319:
	ldr	w8, [x8]
	asr	w8, w22, w8
Lloh320:
	adrp	x9, _FE_IF_REG_INCR1__M@GOTPAGE
Lloh321:
	ldr	x9, [x9, _FE_IF_REG_INCR1__M@GOTPAGEOFF]
Lloh322:
	ldr	w9, [x9]
	and	w2, w8, w9
	mov	x0, x19
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.115:
	add	w8, w24, w20
	mov	w9, #19923
	movk	w9, #4194, lsl #16
	smull	x8, w8, w9
	lsr	x9, x8, #63
	asr	x8, x8, #38
	add	w1, w8, w9
	mov	x0, x19
	ldr	w2, [sp, #20]                   ; 4-byte Folded Reload
	bl	_SetFrequencyShift
Lloh323:
	adrp	x8, _SC_COMM_STATE__A@GOTPAGE
Lloh324:
	ldr	x8, [x8, _SC_COMM_STATE__A@GOTPAGEOFF]
Lloh325:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.116:
Lloh326:
	adrp	x8, _SC_COMM_EXEC__A@GOTPAGE
Lloh327:
	ldr	x8, [x8, _SC_COMM_EXEC__A@GOTPAGEOFF]
Lloh328:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_10
; %bb.117:
	ldp	w9, w8, [sp, #12]               ; 8-byte Folded Reload
	orr	w8, w9, w8
	orr	w8, w8, w26
	orr	w8, w8, w27
	orr	w8, w8, w21
Lloh329:
	adrp	x9, _SC_RA_RAM_OP_AUTO_MODE__M@GOTPAGE
Lloh330:
	ldr	x9, [x9, _SC_RA_RAM_OP_AUTO_MODE__M@GOTPAGEOFF]
	orr	w2, w8, w23
Lloh331:
	ldr	w8, [x9]
Lloh332:
	adrp	x9, _SC_RA_RAM_OP_AUTO_GUARD__M@GOTPAGE
Lloh333:
	ldr	x9, [x9, _SC_RA_RAM_OP_AUTO_GUARD__M@GOTPAGEOFF]
Lloh334:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh335:
	adrp	x9, _SC_RA_RAM_OP_AUTO_CONST__M@GOTPAGE
Lloh336:
	ldr	x9, [x9, _SC_RA_RAM_OP_AUTO_CONST__M@GOTPAGEOFF]
Lloh337:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh338:
	adrp	x9, _SC_RA_RAM_OP_AUTO_HIER__M@GOTPAGE
Lloh339:
	ldr	x9, [x9, _SC_RA_RAM_OP_AUTO_HIER__M@GOTPAGEOFF]
Lloh340:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh341:
	adrp	x9, _SC_RA_RAM_OP_AUTO_RATE__M@GOTPAGE
Lloh342:
	ldr	x9, [x9, _SC_RA_RAM_OP_AUTO_RATE__M@GOTPAGEOFF]
Lloh343:
	ldr	w9, [x9]
	orr	w3, w8, w9
	mov	x0, x19
	mov	w1, #0
	bl	_SC_SetPrefParamCommand
	tbnz	w0, #31, LBB0_10
; %bb.118:
Lloh344:
	adrp	x8, _SC_RA_RAM_PROC_LOCKTRACK@GOTPAGE
Lloh345:
	ldr	x8, [x8, _SC_RA_RAM_PROC_LOCKTRACK@GOTPAGEOFF]
Lloh346:
	ldr	w1, [x8]
Lloh347:
	adrp	x8, _SC_RA_RAM_SW_EVENT_RUN_NMASK__M@GOTPAGE
Lloh348:
	ldr	x8, [x8, _SC_RA_RAM_SW_EVENT_RUN_NMASK__M@GOTPAGEOFF]
Lloh349:
	ldr	w2, [x8]
Lloh350:
	adrp	x8, _SC_RA_RAM_LOCKTRACK_MIN@GOTPAGE
Lloh351:
	ldr	x8, [x8, _SC_RA_RAM_LOCKTRACK_MIN@GOTPAGEOFF]
Lloh352:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_SC_ProcStartCommand
	tbnz	w0, #31, LBB0_10
; %bb.119:
	mov	x0, x19
	bl	_StartOC
	tbnz	w0, #31, LBB0_10
; %bb.120:
	ldr	x8, [x19, #24]
Lloh353:
	adrp	x9, _OM_Default@GOTPAGE
Lloh354:
	ldr	x9, [x9, _OM_Default@GOTPAGEOFF]
Lloh355:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_122
; %bb.121:
	mov	x0, x19
	bl	_StartDiversity
	tbnz	w0, #31, LBB0_10
LBB0_122:
Lloh356:
	adrp	x8, _DRXD_STARTED@GOTPAGE
Lloh357:
	ldr	x8, [x8, _DRXD_STARTED@GOTPAGEOFF]
Lloh358:
	ldr	x8, [x8]
	str	x8, [x19]
	b	LBB0_10
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh76, Lloh77
	.loh AdrpLdrGot	Lloh74, Lloh75
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGot	Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGot	Lloh101, Lloh102
	.loh AdrpLdrGot	Lloh99, Lloh100
	.loh AdrpLdrGot	Lloh97, Lloh98
	.loh AdrpLdrGot	Lloh95, Lloh96
	.loh AdrpLdrGot	Lloh93, Lloh94
	.loh AdrpLdrGot	Lloh91, Lloh92
	.loh AdrpLdrGot	Lloh89, Lloh90
	.loh AdrpLdrGot	Lloh87, Lloh88
	.loh AdrpLdrGot	Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGot	Lloh130, Lloh131
	.loh AdrpLdrGot	Lloh128, Lloh129
	.loh AdrpLdrGot	Lloh126, Lloh127
	.loh AdrpLdrGot	Lloh124, Lloh125
	.loh AdrpLdrGot	Lloh122, Lloh123
	.loh AdrpLdrGot	Lloh120, Lloh121
	.loh AdrpLdrGot	Lloh118, Lloh119
	.loh AdrpLdrGot	Lloh116, Lloh117
	.loh AdrpLdrGot	Lloh114, Lloh115
	.loh AdrpLdrGotLdr	Lloh132, Lloh133, Lloh134
	.loh AdrpLdrGotLdr	Lloh135, Lloh136, Lloh137
	.loh AdrpLdrGotLdr	Lloh141, Lloh142, Lloh143
	.loh AdrpLdrGotLdr	Lloh138, Lloh139, Lloh140
	.loh AdrpLdrGotLdr	Lloh144, Lloh145, Lloh146
	.loh AdrpLdrGotLdr	Lloh147, Lloh148, Lloh149
	.loh AdrpLdrGotLdr	Lloh150, Lloh151, Lloh152
	.loh AdrpLdrGotLdr	Lloh153, Lloh154, Lloh155
	.loh AdrpLdrGotLdr	Lloh156, Lloh157, Lloh158
	.loh AdrpLdrGotLdr	Lloh159, Lloh160, Lloh161
	.loh AdrpLdrGotLdr	Lloh162, Lloh163, Lloh164
	.loh AdrpLdrGotLdr	Lloh165, Lloh166, Lloh167
	.loh AdrpLdrGotLdr	Lloh171, Lloh172, Lloh173
	.loh AdrpLdrGotLdr	Lloh168, Lloh169, Lloh170
	.loh AdrpLdrGotLdr	Lloh174, Lloh175, Lloh176
	.loh AdrpLdrGotLdr	Lloh177, Lloh178, Lloh179
	.loh AdrpLdrGotLdr	Lloh180, Lloh181, Lloh182
	.loh AdrpLdrGotLdr	Lloh183, Lloh184, Lloh185
	.loh AdrpLdrGotLdr	Lloh186, Lloh187, Lloh188
	.loh AdrpLdrGotLdr	Lloh189, Lloh190, Lloh191
	.loh AdrpLdrGotLdr	Lloh192, Lloh193, Lloh194
	.loh AdrpLdrGotLdr	Lloh195, Lloh196, Lloh197
	.loh AdrpLdrGotLdr	Lloh201, Lloh202, Lloh203
	.loh AdrpLdrGotLdr	Lloh198, Lloh199, Lloh200
	.loh AdrpLdrGotLdr	Lloh204, Lloh205, Lloh206
	.loh AdrpLdrGotLdr	Lloh207, Lloh208, Lloh209
	.loh AdrpLdrGotLdr	Lloh210, Lloh211, Lloh212
	.loh AdrpLdrGotLdr	Lloh213, Lloh214, Lloh215
	.loh AdrpLdrGotLdr	Lloh216, Lloh217, Lloh218
	.loh AdrpLdrGotLdr	Lloh219, Lloh220, Lloh221
	.loh AdrpLdrGotLdr	Lloh222, Lloh223, Lloh224
	.loh AdrpLdrGotLdr	Lloh231, Lloh232, Lloh233
	.loh AdrpLdrGotLdr	Lloh228, Lloh229, Lloh230
	.loh AdrpLdrGotLdr	Lloh225, Lloh226, Lloh227
	.loh AdrpAdd	Lloh234, Lloh235
	.loh AdrpLdrGotLdr	Lloh236, Lloh237, Lloh238
	.loh AdrpLdrGot	Lloh239, Lloh240
	.loh AdrpLdrGotLdr	Lloh241, Lloh242, Lloh243
	.loh AdrpLdrGot	Lloh244, Lloh245
	.loh AdrpLdrGotLdr	Lloh246, Lloh247, Lloh248
	.loh AdrpLdrGot	Lloh249, Lloh250
	.loh AdrpLdrGotLdr	Lloh251, Lloh252, Lloh253
	.loh AdrpLdrGot	Lloh254, Lloh255
	.loh AdrpLdrGotLdr	Lloh256, Lloh257, Lloh258
	.loh AdrpLdrGot	Lloh259, Lloh260
	.loh AdrpLdrGotLdr	Lloh261, Lloh262, Lloh263
	.loh AdrpLdrGotLdr	Lloh267, Lloh268, Lloh269
	.loh AdrpLdrGotLdr	Lloh264, Lloh265, Lloh266
	.loh AdrpLdrGotLdr	Lloh270, Lloh271, Lloh272
	.loh AdrpLdrGotLdr	Lloh276, Lloh277, Lloh278
	.loh AdrpLdrGotLdr	Lloh273, Lloh274, Lloh275
	.loh AdrpLdrGotLdr	Lloh282, Lloh283, Lloh284
	.loh AdrpLdrGotLdr	Lloh279, Lloh280, Lloh281
	.loh AdrpLdrGotLdr	Lloh285, Lloh286, Lloh287
	.loh AdrpLdrGot	Lloh288, Lloh289
	.loh AdrpLdrGotLdr	Lloh290, Lloh291, Lloh292
	.loh AdrpLdrGotLdr	Lloh293, Lloh294, Lloh295
	.loh AdrpLdrGotLdr	Lloh296, Lloh297, Lloh298
	.loh AdrpLdrGotLdr	Lloh302, Lloh303, Lloh304
	.loh AdrpLdrGotLdr	Lloh299, Lloh300, Lloh301
	.loh AdrpLdrGotLdr	Lloh305, Lloh306, Lloh307
	.loh AdrpLdrGotLdr	Lloh311, Lloh312, Lloh313
	.loh AdrpLdrGotLdr	Lloh308, Lloh309, Lloh310
	.loh AdrpLdrGotLdr	Lloh320, Lloh321, Lloh322
	.loh AdrpLdrGotLdr	Lloh317, Lloh318, Lloh319
	.loh AdrpLdrGotLdr	Lloh314, Lloh315, Lloh316
	.loh AdrpLdrGotLdr	Lloh323, Lloh324, Lloh325
	.loh AdrpLdrGotLdr	Lloh326, Lloh327, Lloh328
	.loh AdrpLdrGotLdr	Lloh341, Lloh342, Lloh343
	.loh AdrpLdrGotLdr	Lloh338, Lloh339, Lloh340
	.loh AdrpLdrGotLdr	Lloh335, Lloh336, Lloh337
	.loh AdrpLdrGotLdr	Lloh332, Lloh333, Lloh334
	.loh AdrpLdrGotLdr	Lloh329, Lloh330, Lloh331
	.loh AdrpLdrGotLdr	Lloh350, Lloh351, Lloh352
	.loh AdrpLdrGotLdr	Lloh347, Lloh348, Lloh349
	.loh AdrpLdrGotLdr	Lloh344, Lloh345, Lloh346
	.loh AdrpLdrGotLdr	Lloh353, Lloh354, Lloh355
	.loh AdrpLdrGotLdr	Lloh356, Lloh357, Lloh358
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_79-LBB0_79)>>2
	.byte	(LBB0_81-LBB0_79)>>2
	.byte	(LBB0_83-LBB0_79)>>2
	.byte	(LBB0_85-LBB0_79)>>2
	.byte	(LBB0_87-LBB0_79)>>2
                                        ; -- End function
	.comm	_DRXD_STOPPED,8,3               ; @DRXD_STOPPED
	.comm	_INVERSION_ON,8,3               ; @INVERSION_ON
	.comm	_SC_RA_RAM_OP_AUTO_MODE__M,4,2  ; @SC_RA_RAM_OP_AUTO_MODE__M
	.comm	_SC_RA_RAM_OP_PARAM_MODE_8K,4,2 ; @SC_RA_RAM_OP_PARAM_MODE_8K
	.comm	_EC_SB_REG_TR_MODE__A,4,2       ; @EC_SB_REG_TR_MODE__A
	.comm	_EC_SB_REG_TR_MODE_8K,4,2       ; @EC_SB_REG_TR_MODE_8K
	.comm	_SC_RA_RAM_OP_PARAM_MODE_2K,4,2 ; @SC_RA_RAM_OP_PARAM_MODE_2K
	.comm	_EC_SB_REG_TR_MODE_2K,4,2       ; @EC_SB_REG_TR_MODE_2K
	.comm	_SC_RA_RAM_OP_PARAM_GUARD_4,4,2 ; @SC_RA_RAM_OP_PARAM_GUARD_4
	.comm	_SC_RA_RAM_OP_PARAM_GUARD_8,4,2 ; @SC_RA_RAM_OP_PARAM_GUARD_8
	.comm	_SC_RA_RAM_OP_PARAM_GUARD_16,4,2 ; @SC_RA_RAM_OP_PARAM_GUARD_16
	.comm	_SC_RA_RAM_OP_PARAM_GUARD_32,4,2 ; @SC_RA_RAM_OP_PARAM_GUARD_32
	.comm	_SC_RA_RAM_OP_AUTO_GUARD__M,4,2 ; @SC_RA_RAM_OP_AUTO_GUARD__M
	.comm	_SC_RA_RAM_OP_PARAM_HIER_A1,4,2 ; @SC_RA_RAM_OP_PARAM_HIER_A1
	.comm	_EQ_REG_OT_ALPHA__A,4,2         ; @EQ_REG_OT_ALPHA__A
	.comm	_EC_SB_REG_ALPHA__A,4,2         ; @EC_SB_REG_ALPHA__A
	.comm	_EQ_TD_TPS_PWR_UNKNOWN,4,2      ; @EQ_TD_TPS_PWR_UNKNOWN
	.comm	_EQ_TD_TPS_PWR_QAM16_ALPHA1,4,2 ; @EQ_TD_TPS_PWR_QAM16_ALPHA1
	.comm	_EQ_TD_TPS_PWR_QAM64_ALPHA1,4,2 ; @EQ_TD_TPS_PWR_QAM64_ALPHA1
	.comm	_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE
	.comm	_SC_RA_RAM_OP_PARAM_HIER_A2,4,2 ; @SC_RA_RAM_OP_PARAM_HIER_A2
	.comm	_EQ_TD_TPS_PWR_QAM16_ALPHA2,4,2 ; @EQ_TD_TPS_PWR_QAM16_ALPHA2
	.comm	_EQ_TD_TPS_PWR_QAM64_ALPHA2,4,2 ; @EQ_TD_TPS_PWR_QAM64_ALPHA2
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE
	.comm	_SC_RA_RAM_OP_PARAM_HIER_A4,4,2 ; @SC_RA_RAM_OP_PARAM_HIER_A4
	.comm	_EQ_TD_TPS_PWR_QAM16_ALPHA4,4,2 ; @EQ_TD_TPS_PWR_QAM16_ALPHA4
	.comm	_EQ_TD_TPS_PWR_QAM64_ALPHA4,4,2 ; @EQ_TD_TPS_PWR_QAM64_ALPHA4
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE
	.comm	_SC_RA_RAM_OP_AUTO_HIER__M,4,2  ; @SC_RA_RAM_OP_AUTO_HIER__M
	.comm	_SC_RA_RAM_OP_PARAM_HIER_NO,4,2 ; @SC_RA_RAM_OP_PARAM_HIER_NO
	.comm	_EQ_TD_TPS_PWR_QPSK,4,2         ; @EQ_TD_TPS_PWR_QPSK
	.comm	_EQ_TD_TPS_PWR_QAM16_ALPHAN,4,2 ; @EQ_TD_TPS_PWR_QAM16_ALPHAN
	.comm	_EQ_TD_TPS_PWR_QAM64_ALPHAN,4,2 ; @EQ_TD_TPS_PWR_QAM64_ALPHAN
	.comm	_SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE
	.comm	_SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE,4,2 ; @SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE
	.comm	_SC_RA_RAM_OP_AUTO_CONST__M,4,2 ; @SC_RA_RAM_OP_AUTO_CONST__M
	.comm	_SC_RA_RAM_OP_PARAM_CONST_QAM64,4,2 ; @SC_RA_RAM_OP_PARAM_CONST_QAM64
	.comm	_EQ_REG_OT_CONST__A,4,2         ; @EQ_REG_OT_CONST__A
	.comm	_EC_SB_REG_CONST__A,4,2         ; @EC_SB_REG_CONST__A
	.comm	_EC_SB_REG_CONST_64QAM,4,2      ; @EC_SB_REG_CONST_64QAM
	.comm	_EC_SB_REG_SCALE_MSB__A,4,2     ; @EC_SB_REG_SCALE_MSB__A
	.comm	_EC_SB_REG_SCALE_BIT2__A,4,2    ; @EC_SB_REG_SCALE_BIT2__A
	.comm	_EC_SB_REG_SCALE_LSB__A,4,2     ; @EC_SB_REG_SCALE_LSB__A
	.comm	_EQ_REG_TD_TPS_PWR_OFS__A,4,2   ; @EQ_REG_TD_TPS_PWR_OFS__A
	.comm	_EQ_REG_SN_CEGAIN__A,4,2        ; @EQ_REG_SN_CEGAIN__A
	.comm	_EQ_REG_IS_GAIN_MAN__A,4,2      ; @EQ_REG_IS_GAIN_MAN__A
	.comm	_EQ_REG_IS_GAIN_EXP__A,4,2      ; @EQ_REG_IS_GAIN_EXP__A
	.comm	_SC_RA_RAM_OP_PARAM_CONST_QPSK,4,2 ; @SC_RA_RAM_OP_PARAM_CONST_QPSK
	.comm	_EC_SB_REG_CONST_QPSK,4,2       ; @EC_SB_REG_CONST_QPSK
	.comm	_SC_RA_RAM_OP_PARAM_CONST_QAM16,4,2 ; @SC_RA_RAM_OP_PARAM_CONST_QAM16
	.comm	_EC_SB_REG_CONST_16QAM,4,2      ; @EC_SB_REG_CONST_16QAM
	.comm	_SC_RA_RAM_OP_PARAM_PRIO_HI,4,2 ; @SC_RA_RAM_OP_PARAM_PRIO_HI
	.comm	_EC_SB_REG_PRIOR__A,4,2         ; @EC_SB_REG_PRIOR__A
	.comm	_EC_SB_REG_PRIOR_HI,4,2         ; @EC_SB_REG_PRIOR_HI
	.comm	_SC_RA_RAM_OP_PARAM_RATE_1_2,4,2 ; @SC_RA_RAM_OP_PARAM_RATE_1_2
	.comm	_EC_VD_REG_SET_CODERATE__A,4,2  ; @EC_VD_REG_SET_CODERATE__A
	.comm	_EC_VD_REG_SET_CODERATE_C1_2,4,2 ; @EC_VD_REG_SET_CODERATE_C1_2
	.comm	_SC_RA_RAM_OP_AUTO_RATE__M,4,2  ; @SC_RA_RAM_OP_AUTO_RATE__M
	.comm	_SC_RA_RAM_OP_PARAM_RATE_2_3,4,2 ; @SC_RA_RAM_OP_PARAM_RATE_2_3
	.comm	_EC_VD_REG_SET_CODERATE_C2_3,4,2 ; @EC_VD_REG_SET_CODERATE_C2_3
	.comm	_SC_RA_RAM_OP_PARAM_RATE_3_4,4,2 ; @SC_RA_RAM_OP_PARAM_RATE_3_4
	.comm	_EC_VD_REG_SET_CODERATE_C3_4,4,2 ; @EC_VD_REG_SET_CODERATE_C3_4
	.comm	_SC_RA_RAM_OP_PARAM_RATE_5_6,4,2 ; @SC_RA_RAM_OP_PARAM_RATE_5_6
	.comm	_EC_VD_REG_SET_CODERATE_C5_6,4,2 ; @EC_VD_REG_SET_CODERATE_C5_6
	.comm	_SC_RA_RAM_OP_PARAM_RATE_7_8,4,2 ; @SC_RA_RAM_OP_PARAM_RATE_7_8
	.comm	_EC_VD_REG_SET_CODERATE_C7_8,4,2 ; @EC_VD_REG_SET_CODERATE_C7_8
	.comm	_DRXD_BANDWIDTH_8MHZ_IN_HZ,4,2  ; @DRXD_BANDWIDTH_8MHZ_IN_HZ
	.comm	_FE_AG_REG_IND_DEL__A,4,2       ; @FE_AG_REG_IND_DEL__A
	.comm	_DRXD_BANDWIDTH_7MHZ_IN_HZ,4,2  ; @DRXD_BANDWIDTH_7MHZ_IN_HZ
	.comm	_DRXD_BANDWIDTH_6MHZ_IN_HZ,4,2  ; @DRXD_BANDWIDTH_6MHZ_IN_HZ
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_SC_RA_RAM_BAND__A,4,2          ; @SC_RA_RAM_BAND__A
	.comm	_SC_RA_RAM_CONFIG__A,4,2        ; @SC_RA_RAM_CONFIG__A
	.comm	_SC_RA_RAM_CONFIG_SLAVE__M,4,2  ; @SC_RA_RAM_CONFIG_SLAVE__M
	.comm	_CSCD_INIT,8,3                  ; @CSCD_INIT
	.comm	_SC_RA_RAM_SAMPLE_RATE_COUNT__A,4,2 ; @SC_RA_RAM_SAMPLE_RATE_COUNT__A
	.comm	_DRXD_OSCDEV_DO_SCAN,4,2        ; @DRXD_OSCDEV_DO_SCAN
	.comm	_CSCD_SET,8,3                   ; @CSCD_SET
	.comm	_FE_IF_REG_INCR0__A,4,2         ; @FE_IF_REG_INCR0__A
	.comm	_FE_IF_REG_INCR0__M,4,2         ; @FE_IF_REG_INCR0__M
	.comm	_FE_IF_REG_INCR1__A,4,2         ; @FE_IF_REG_INCR1__A
	.comm	_FE_IF_REG_INCR0__W,4,2         ; @FE_IF_REG_INCR0__W
	.comm	_FE_IF_REG_INCR1__M,4,2         ; @FE_IF_REG_INCR1__M
	.comm	_SC_COMM_STATE__A,4,2           ; @SC_COMM_STATE__A
	.comm	_SC_COMM_EXEC__A,4,2            ; @SC_COMM_EXEC__A
	.comm	_SC_RA_RAM_PROC_LOCKTRACK,4,2   ; @SC_RA_RAM_PROC_LOCKTRACK
	.comm	_SC_RA_RAM_SW_EVENT_RUN_NMASK__M,4,2 ; @SC_RA_RAM_SW_EVENT_RUN_NMASK__M
	.comm	_SC_RA_RAM_LOCKTRACK_MIN,4,2    ; @SC_RA_RAM_LOCKTRACK_MIN
	.comm	_OM_Default,8,3                 ; @OM_Default
	.comm	_DRXD_STARTED,8,3               ; @DRXD_STARTED
	.comm	_EC_SB_REG_PRIOR_LO,4,2         ; @EC_SB_REG_PRIOR_LO
	.comm	_SC_RA_RAM_OP_PARAM_PRIO_LO,4,2 ; @SC_RA_RAM_OP_PARAM_PRIO_LO
	.no_dead_strip	_DRX_Start
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.DRX_Start
l_switch.table.DRX_Start:
	.quad	_SC_RA_RAM_OP_PARAM_GUARD_8
	.quad	_SC_RA_RAM_OP_PARAM_GUARD_4
	.quad	_SC_RA_RAM_OP_PARAM_GUARD_32
	.quad	_SC_RA_RAM_OP_PARAM_GUARD_16

.subsections_via_symbols
