	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_bnxt_qplib_init_rcfw           ## -- Begin function bnxt_qplib_init_rcfw
	.p2align	4, 0x90
_bnxt_qplib_init_rcfw:                  ## @bnxt_qplib_init_rcfw
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	subq	$376, %rsp                      ## imm = 0x178
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ebx
	movq	%rsi, %r15
	movq	%rdi, %r14
	movq	_INITIALIZE_FW@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	leaq	-216(%rbp), %rsi
	movl	$23, %ecx
	movq	%rsp, %rdi
	rep;movsq (%rsi), %es:(%rdi)
	movl	%eax, %edi
	xorl	%esi, %esi
	callq	_RCFW_CMD_PREP
	movq	_PAGE_SHIFT@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	_RCFW_DBR_BASE_PAGE_SHIFT@GOTPCREL(%rip), %rax
	subq	(%rax), %rdi
	callq	_cpu_to_le16
	movl	%eax, -40(%rbp)
	testl	%ebx, %ebx
	jne	LBB0_3
## %bb.1:
	movq	8(%r14), %rax
	movl	(%rax), %edi
	callq	_bnxt_qplib_is_chip_gen_p5
	testq	%rax, %rax
	jne	LBB0_3
## %bb.2:
	movq	104(%r15), %rdi
	movq	_CMDQ_INITIALIZE_FW_QPC_LVL_SFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movq	%rdi, %rbx
	shlq	%cl, %rbx
	shlq	$3, %rdi
	addq	120(%r15), %rdi
	callq	___get_pbl_pg_idx
	orq	%rbx, %rax
	movq	%rax, -216(%rbp)
	movq	80(%r15), %rdi
	movq	_CMDQ_INITIALIZE_FW_MRW_LVL_SFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movq	%rdi, %rbx
	shlq	%cl, %rbx
	shlq	$3, %rdi
	addq	96(%r15), %rdi
	callq	___get_pbl_pg_idx
	orq	%rbx, %rax
	movq	%rax, -208(%rbp)
	movq	56(%r15), %rdi
	shlq	$3, %rdi
	addq	72(%r15), %rdi
	callq	___get_pbl_pg_idx
	movq	32(%r15), %rdi
	shlq	$3, %rdi
	addq	48(%r15), %rdi
	callq	___get_pbl_pg_idx
	movq	56(%r15), %rdi
	movq	_CMDQ_INITIALIZE_FW_SRQ_LVL_SFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movq	%rdi, %rbx
	shlq	%cl, %rbx
	shlq	$3, %rdi
	addq	72(%r15), %rdi
	callq	___get_pbl_pg_idx
	orq	%rbx, %rax
	movq	%rax, -200(%rbp)
	movq	32(%r15), %rdi
	movq	_CMDQ_INITIALIZE_FW_CQ_LVL_SFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movq	%rdi, %rbx
	shlq	%cl, %rbx
	shlq	$3, %rdi
	addq	48(%r15), %rdi
	callq	___get_pbl_pg_idx
	orq	%rbx, %rax
	movq	%rax, -192(%rbp)
	movq	136(%r15), %rdi
	movq	_CMDQ_INITIALIZE_FW_TIM_LVL_SFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movq	%rdi, %rbx
	shlq	%cl, %rbx
	shlq	$3, %rdi
	addq	144(%r15), %rdi
	callq	___get_pbl_pg_idx
	orq	%rbx, %rax
	movq	%rax, -184(%rbp)
	movq	(%r15), %rdi
	movq	_CMDQ_INITIALIZE_FW_TQM_LVL_SFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movq	%rdi, %rbx
	shlq	%cl, %rbx
	shlq	$3, %rdi
	addq	128(%r15), %rdi
	callq	___get_pbl_pg_idx
	orq	%rbx, %rax
	movq	%rax, -176(%rbp)
	movq	120(%r15), %rax
	movq	_PBL_LVL_0@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le64
	movq	%rax, -48(%rbp)
	movq	96(%r15), %rax
	movq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le64
	movq	%rax, -56(%rbp)
	movq	72(%r15), %rax
	movq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le64
	movq	%rax, -64(%rbp)
	movq	48(%r15), %rax
	movq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le64
	movq	%rax, -72(%rbp)
	movq	144(%r15), %rax
	movq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le64
	movq	%rax, -80(%rbp)
	movq	128(%r15), %rax
	movq	(%rbx), %rcx
	movq	(%rax,%rcx,8), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le64
	movq	%rax, -88(%rbp)
	movl	112(%r15), %edi
	callq	_cpu_to_le32
	movq	%rax, -96(%rbp)
	movl	88(%r15), %edi
	callq	_cpu_to_le32
	movq	%rax, -104(%rbp)
	movl	64(%r15), %edi
	callq	_cpu_to_le32
	movq	%rax, -112(%rbp)
	movl	40(%r15), %edi
	callq	_cpu_to_le32
	movq	%rax, -120(%rbp)
	movl	28(%r15), %edi
	callq	_cpu_to_le32
	movq	%rax, -128(%rbp)
	movl	24(%r15), %edi
	callq	_cpu_to_le32
	movq	%rax, -136(%rbp)
	movl	20(%r15), %edi
	callq	_cpu_to_le32
	movq	%rax, -144(%rbp)
	movl	16(%r15), %edi
	callq	_cpu_to_le32
	movq	%rax, -152(%rbp)
	movl	12(%r15), %edi
	callq	_cpu_to_le32
	movq	%rax, -160(%rbp)
LBB0_3:
	movl	8(%r15), %edi
	callq	_cpu_to_le32
	movq	%rax, -168(%rbp)
	leaq	-216(%rbp), %rsi
	leaq	-32(%rbp), %rdx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_bnxt_qplib_rcfw_send_message
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_5
## %bb.4:
	movq	_FIRMWARE_INITIALIZED_FLAG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%r14, %rsi
	callq	_set_bit
LBB0_5:
	movl	%ebx, %eax
	addq	$376, %rsp                      ## imm = 0x178
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INITIALIZE_FW,4,2              ## @INITIALIZE_FW
	.comm	_PAGE_SHIFT,8,3                 ## @PAGE_SHIFT
	.comm	_RCFW_DBR_BASE_PAGE_SHIFT,8,3   ## @RCFW_DBR_BASE_PAGE_SHIFT
	.comm	_CMDQ_INITIALIZE_FW_QPC_LVL_SFT,8,3 ## @CMDQ_INITIALIZE_FW_QPC_LVL_SFT
	.comm	_CMDQ_INITIALIZE_FW_MRW_LVL_SFT,8,3 ## @CMDQ_INITIALIZE_FW_MRW_LVL_SFT
	.comm	_CMDQ_INITIALIZE_FW_SRQ_LVL_SFT,8,3 ## @CMDQ_INITIALIZE_FW_SRQ_LVL_SFT
	.comm	_CMDQ_INITIALIZE_FW_CQ_LVL_SFT,8,3 ## @CMDQ_INITIALIZE_FW_CQ_LVL_SFT
	.comm	_CMDQ_INITIALIZE_FW_TIM_LVL_SFT,8,3 ## @CMDQ_INITIALIZE_FW_TIM_LVL_SFT
	.comm	_CMDQ_INITIALIZE_FW_TQM_LVL_SFT,8,3 ## @CMDQ_INITIALIZE_FW_TQM_LVL_SFT
	.comm	_PBL_LVL_0,8,3                  ## @PBL_LVL_0
	.comm	_FIRMWARE_INITIALIZED_FLAG,4,2  ## @FIRMWARE_INITIALIZED_FLAG
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_bnxt_qplib_init_rcfw           ; -- Begin function bnxt_qplib_init_rcfw
	.p2align	2
_bnxt_qplib_init_rcfw:                  ; @bnxt_qplib_init_rcfw
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #240
	.cfi_def_cfa_offset 240
	stp	x22, x21, [sp, #192]            ; 16-byte Folded Spill
	stp	x20, x19, [sp, #208]            ; 16-byte Folded Spill
	stp	x29, x30, [sp, #224]            ; 16-byte Folded Spill
	add	x29, sp, #224
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _INITIALIZE_FW@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INITIALIZE_FW@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x0, sp, #8
	mov	x2, #0
	bl	_RCFW_CMD_PREP
Lloh3:
	adrp	x8, _PAGE_SHIFT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PAGE_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
Lloh6:
	adrp	x9, _RCFW_DBR_BASE_PAGE_SHIFT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _RCFW_DBR_BASE_PAGE_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	sub	x0, x8, x9
	bl	_cpu_to_le16
	str	w0, [sp, #184]
	cbnz	w21, LBB0_3
; %bb.1:
	ldr	x8, [x19, #8]
	ldr	w0, [x8]
	bl	_bnxt_qplib_is_chip_gen_p5
	cbnz	x0, LBB0_3
; %bb.2:
	ldr	x8, [x20, #104]
Lloh9:
	adrp	x9, _CMDQ_INITIALIZE_FW_QPC_LVL_SFT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _CMDQ_INITIALIZE_FW_QPC_LVL_SFT@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	lsl	x21, x8, x9
	ldr	x9, [x20, #120]
	add	x0, x9, x8, lsl #3
	bl	___get_pbl_pg_idx
	orr	x8, x0, x21
	str	x8, [sp, #8]
	ldr	x8, [x20, #80]
Lloh12:
	adrp	x9, _CMDQ_INITIALIZE_FW_MRW_LVL_SFT@GOTPAGE
Lloh13:
	ldr	x9, [x9, _CMDQ_INITIALIZE_FW_MRW_LVL_SFT@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	lsl	x21, x8, x9
	ldr	x9, [x20, #96]
	add	x0, x9, x8, lsl #3
	bl	___get_pbl_pg_idx
	orr	x8, x0, x21
	str	x8, [sp, #16]
	ldr	x8, [x20, #56]
	ldr	x9, [x20, #72]
	add	x0, x9, x8, lsl #3
	bl	___get_pbl_pg_idx
	ldr	x8, [x20, #32]
	ldr	x9, [x20, #48]
	add	x0, x9, x8, lsl #3
	bl	___get_pbl_pg_idx
	ldr	x8, [x20, #56]
Lloh15:
	adrp	x9, _CMDQ_INITIALIZE_FW_SRQ_LVL_SFT@GOTPAGE
Lloh16:
	ldr	x9, [x9, _CMDQ_INITIALIZE_FW_SRQ_LVL_SFT@GOTPAGEOFF]
Lloh17:
	ldr	x9, [x9]
	lsl	x21, x8, x9
	ldr	x9, [x20, #72]
	add	x0, x9, x8, lsl #3
	bl	___get_pbl_pg_idx
	orr	x8, x0, x21
	str	x8, [sp, #24]
	ldr	x8, [x20, #32]
Lloh18:
	adrp	x9, _CMDQ_INITIALIZE_FW_CQ_LVL_SFT@GOTPAGE
Lloh19:
	ldr	x9, [x9, _CMDQ_INITIALIZE_FW_CQ_LVL_SFT@GOTPAGEOFF]
Lloh20:
	ldr	x9, [x9]
	lsl	x21, x8, x9
	ldr	x9, [x20, #48]
	add	x0, x9, x8, lsl #3
	bl	___get_pbl_pg_idx
	orr	x8, x0, x21
Lloh21:
	adrp	x9, _CMDQ_INITIALIZE_FW_TIM_LVL_SFT@GOTPAGE
Lloh22:
	ldr	x9, [x9, _CMDQ_INITIALIZE_FW_TIM_LVL_SFT@GOTPAGEOFF]
	str	x8, [sp, #32]
Lloh23:
	ldr	x8, [x9]
	ldp	x9, x10, [x20, #136]
	lsl	x21, x9, x8
	add	x0, x10, x9, lsl #3
	bl	___get_pbl_pg_idx
	orr	x8, x0, x21
	str	x8, [sp, #40]
	ldr	x8, [x20]
Lloh24:
	adrp	x9, _CMDQ_INITIALIZE_FW_TQM_LVL_SFT@GOTPAGE
Lloh25:
	ldr	x9, [x9, _CMDQ_INITIALIZE_FW_TQM_LVL_SFT@GOTPAGEOFF]
Lloh26:
	ldr	x9, [x9]
	lsl	x21, x8, x9
	ldr	x9, [x20, #128]
	add	x0, x9, x8, lsl #3
	bl	___get_pbl_pg_idx
	orr	x8, x0, x21
	str	x8, [sp, #48]
	ldr	x8, [x20, #120]
Lloh27:
	adrp	x21, _PBL_LVL_0@GOTPAGE
Lloh28:
	ldr	x21, [x21, _PBL_LVL_0@GOTPAGEOFF]
	ldr	x9, [x21]
	ldr	x8, [x8, x9, lsl #3]
	ldr	w0, [x8]
	bl	_cpu_to_le64
	str	x0, [sp, #176]
	ldr	x8, [x20, #96]
	ldr	x9, [x21]
	ldr	x8, [x8, x9, lsl #3]
	ldr	w0, [x8]
	bl	_cpu_to_le64
	str	x0, [sp, #168]
	ldr	x8, [x20, #72]
	ldr	x9, [x21]
	ldr	x8, [x8, x9, lsl #3]
	ldr	w0, [x8]
	bl	_cpu_to_le64
	str	x0, [sp, #160]
	ldr	x8, [x20, #48]
	ldr	x9, [x21]
	ldr	x8, [x8, x9, lsl #3]
	ldr	w0, [x8]
	bl	_cpu_to_le64
	str	x0, [sp, #152]
	ldr	x8, [x20, #144]
	ldr	x9, [x21]
	ldr	x8, [x8, x9, lsl #3]
	ldr	w0, [x8]
	bl	_cpu_to_le64
	str	x0, [sp, #144]
	ldr	x8, [x20, #128]
	ldr	x9, [x21]
	ldr	x8, [x8, x9, lsl #3]
	ldr	w0, [x8]
	bl	_cpu_to_le64
	str	x0, [sp, #136]
	ldr	w0, [x20, #112]
	bl	_cpu_to_le32
	str	x0, [sp, #128]
	ldr	w0, [x20, #88]
	bl	_cpu_to_le32
	str	x0, [sp, #120]
	ldr	w0, [x20, #64]
	bl	_cpu_to_le32
	str	x0, [sp, #112]
	ldr	w0, [x20, #40]
	bl	_cpu_to_le32
	str	x0, [sp, #104]
	ldr	w0, [x20, #28]
	bl	_cpu_to_le32
	str	x0, [sp, #96]
	ldr	w0, [x20, #24]
	bl	_cpu_to_le32
	str	x0, [sp, #88]
	ldr	w0, [x20, #20]
	bl	_cpu_to_le32
	str	x0, [sp, #80]
	ldr	w0, [x20, #16]
	bl	_cpu_to_le32
	str	x0, [sp, #72]
	ldr	w0, [x20, #12]
	bl	_cpu_to_le32
	str	x0, [sp, #64]
LBB0_3:
	ldr	w0, [x20, #8]
	bl	_cpu_to_le32
	str	x0, [sp, #56]
	add	x1, sp, #8
	mov	x2, sp
	mov	x0, x19
	mov	x3, #0
	mov	w4, #0
	bl	_bnxt_qplib_rcfw_send_message
	mov	x20, x0
	cbnz	w0, LBB0_5
; %bb.4:
Lloh29:
	adrp	x8, _FIRMWARE_INITIALIZED_FLAG@GOTPAGE
Lloh30:
	ldr	x8, [x8, _FIRMWARE_INITIALIZED_FLAG@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	mov	x1, x19
	bl	_set_bit
LBB0_5:
	mov	x0, x20
	ldp	x29, x30, [sp, #224]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #208]            ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #192]            ; 16-byte Folded Reload
	add	sp, sp, #240
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.comm	_INITIALIZE_FW,4,2              ; @INITIALIZE_FW
	.comm	_PAGE_SHIFT,8,3                 ; @PAGE_SHIFT
	.comm	_RCFW_DBR_BASE_PAGE_SHIFT,8,3   ; @RCFW_DBR_BASE_PAGE_SHIFT
	.comm	_CMDQ_INITIALIZE_FW_QPC_LVL_SFT,8,3 ; @CMDQ_INITIALIZE_FW_QPC_LVL_SFT
	.comm	_CMDQ_INITIALIZE_FW_MRW_LVL_SFT,8,3 ; @CMDQ_INITIALIZE_FW_MRW_LVL_SFT
	.comm	_CMDQ_INITIALIZE_FW_SRQ_LVL_SFT,8,3 ; @CMDQ_INITIALIZE_FW_SRQ_LVL_SFT
	.comm	_CMDQ_INITIALIZE_FW_CQ_LVL_SFT,8,3 ; @CMDQ_INITIALIZE_FW_CQ_LVL_SFT
	.comm	_CMDQ_INITIALIZE_FW_TIM_LVL_SFT,8,3 ; @CMDQ_INITIALIZE_FW_TIM_LVL_SFT
	.comm	_CMDQ_INITIALIZE_FW_TQM_LVL_SFT,8,3 ; @CMDQ_INITIALIZE_FW_TQM_LVL_SFT
	.comm	_PBL_LVL_0,8,3                  ; @PBL_LVL_0
	.comm	_FIRMWARE_INITIALIZED_FLAG,4,2  ; @FIRMWARE_INITIALIZED_FLAG
.subsections_via_symbols
