	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_set_serdes_access
_bnx2x_set_serdes_access:               ## @bnx2x_set_serdes_access
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	testl	%esi, %esi
	jne	LBB0_1
## %bb.2:
	movq	_GRCBASE_EMAC0@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_GRCBASE_EMAC1@GOTPCREL(%rip), %rax
LBB0_3:
	movq	(%rax), %rbx
	movq	_NIG_REG_SERDES0_CTRL_MD_ST@GOTPCREL(%rip), %r12
	shll	$4, %esi
	movslq	%esi, %r15
	movq	(%r12), %rsi
	addq	%r15, %rsi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	_REG_WR
	movq	_EMAC_REG_EMAC_MDIO_COMM@GOTPCREL(%rip), %r13
	movq	(%r13), %rsi
	addq	%rbx, %rsi
	movq	%r14, %rdi
	movl	$610238464, %edx                ## imm = 0x245F8000
	callq	_REG_WR
	movl	$500, %edi                      ## imm = 0x1F4
	callq	_udelay
	addq	(%r13), %rbx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movl	$610074639, %edx                ## imm = 0x245D000F
	callq	_REG_WR
	movl	$500, %edi                      ## imm = 0x1F4
	callq	_udelay
	addq	(%r12), %r15
	movq	%r14, %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_REG_WR                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_GRCBASE_EMAC1,8,3              ## @GRCBASE_EMAC1
	.comm	_GRCBASE_EMAC0,8,3              ## @GRCBASE_EMAC0
	.comm	_NIG_REG_SERDES0_CTRL_MD_ST,8,3 ## @NIG_REG_SERDES0_CTRL_MD_ST
	.comm	_EMAC_REG_EMAC_MDIO_COMM,8,3    ## @EMAC_REG_EMAC_MDIO_COMM
	.no_dead_strip	_bnx2x_set_serdes_access
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_set_serdes_access
_bnx2x_set_serdes_access:               ; @bnx2x_set_serdes_access
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
Lloh0:
	adrp	x8, _GRCBASE_EMAC1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GRCBASE_EMAC1@GOTPAGEOFF]
Lloh2:
	adrp	x9, _GRCBASE_EMAC0@GOTPAGE
Lloh3:
	ldr	x9, [x9, _GRCBASE_EMAC0@GOTPAGEOFF]
	cmp	w1, #0
	csel	x8, x9, x8, eq
	ldr	x20, [x8]
Lloh4:
	adrp	x21, _NIG_REG_SERDES0_CTRL_MD_ST@GOTPAGE
Lloh5:
	ldr	x21, [x21, _NIG_REG_SERDES0_CTRL_MD_ST@GOTPAGEOFF]
	ldr	x8, [x21]
	lsl	w9, w1, #4
	sxtw	x22, w9
	add	x1, x8, x22
	mov	w2, #1
	bl	_REG_WR
Lloh6:
	adrp	x23, _EMAC_REG_EMAC_MDIO_COMM@GOTPAGE
Lloh7:
	ldr	x23, [x23, _EMAC_REG_EMAC_MDIO_COMM@GOTPAGEOFF]
	ldr	x8, [x23]
	add	x1, x8, x20
	mov	x0, x19
	mov	w2, #32768
	movk	w2, #9311, lsl #16
	bl	_REG_WR
	mov	w0, #500
	bl	_udelay
	ldr	x8, [x23]
	add	x1, x8, x20
	mov	x0, x19
	mov	w2, #15
	movk	w2, #9309, lsl #16
	bl	_REG_WR
	mov	w0, #500
	bl	_udelay
	ldr	x8, [x21]
	add	x1, x8, x22
	mov	x0, x19
	mov	w2, #0
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_REG_WR
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_GRCBASE_EMAC1,8,3              ; @GRCBASE_EMAC1
	.comm	_GRCBASE_EMAC0,8,3              ; @GRCBASE_EMAC0
	.comm	_NIG_REG_SERDES0_CTRL_MD_ST,8,3 ; @NIG_REG_SERDES0_CTRL_MD_ST
	.comm	_EMAC_REG_EMAC_MDIO_COMM,8,3    ; @EMAC_REG_EMAC_MDIO_COMM
	.no_dead_strip	_bnx2x_set_serdes_access
.subsections_via_symbols
