	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ivtv_yuv_window_setup
_ivtv_yuv_window_setup:                 ## @ivtv_yuv_window_setup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rsi), %r10
	testq	%r10, %r10
	jns	LBB0_2
## %bb.1:
	movq	$0, (%rsi)
	xorl	%r10d, %r10d
LBB0_2:
	movq	8(%rsi), %rbx
	testq	%rbx, %rbx
	jns	LBB0_4
## %bb.3:
	movq	$0, 8(%rsi)
	xorl	%ebx, %ebx
LBB0_4:
	movl	16(%rsi), %r13d
	movl	20(%rsi), %ecx
	leal	(,%rcx,4), %eax
	movl	%r13d, %edx
	subl	%eax, %edx
	testl	%edx, %edx
	jle	LBB0_6
## %bb.5:
	negl	%eax
	shrl	%edx
	addq	%rdx, %r10
	movq	%r10, (%rsi)
	movl	%eax, %r13d
	negl	%r13d
	movl	%r13d, 16(%rsi)
	movl	$3, %edx
	subl	%eax, %edx
	testl	%r13d, %r13d
	cmovnsl	%r13d, %edx
	sarl	$2, %edx
	movl	%edx, %ecx
	andl	$1, %ecx
	addl	%edx, %ecx
	movl	%ecx, 20(%rsi)
LBB0_6:
	movl	24(%rsi), %r8d
	movl	28(%rsi), %r12d
	movl	%r8d, %eax
	cltd
	idivl	%r12d
	cmpl	$2, %eax
	jl	LBB0_9
## %bb.7:
	movl	$1, 32(%rsi)
	leal	(,%r12,4), %eax
	movl	%r8d, %edx
	subl	%eax, %edx
	testl	%edx, %edx
	jle	LBB0_9
## %bb.8:
	negl	%eax
	shrl	%edx
	addq	%rdx, %rbx
	movq	%rbx, 8(%rsi)
	movl	%eax, %r8d
	negl	%r8d
	movl	%r8d, 24(%rsi)
	movl	$3, %edx
	subl	%eax, %edx
	testl	%r8d, %r8d
	cmovnsl	%r8d, %edx
	sarl	$2, %edx
	movl	%edx, %r12d
	andl	$1, %r12d
	addl	%edx, %r12d
	movl	%r12d, 28(%rsi)
LBB0_9:
	cmpl	$3, %ecx
	jl	LBB0_13
## %bb.10:
	cmpl	$3, %r12d
	jl	LBB0_13
## %bb.11:
	cmpl	$3, %r13d
	jl	LBB0_13
## %bb.12:
	cmpl	$2, %r8d
	jle	LBB0_13
## %bb.14:
	movq	%rdi, -64(%rbp)                 ## 8-byte Spill
	movl	%r8d, %eax
	shll	$16, %eax
	cltd
	idivl	%r12d
	movl	%eax, %r11d
	movl	36(%rsi), %edx
	movl	40(%rsi), %edi
	movl	%edx, %eax
	subl	%edi, %eax
	movl	%edx, -48(%rbp)                 ## 4-byte Spill
	jle	LBB0_16
## %bb.15:
	subl	%eax, %r12d
	imull	%r11d, %eax
	sarl	$16, %eax
	cltq
	addq	%rax, %rbx
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	subl	%eax, %r8d
	xorl	%edi, %edi
	jmp	LBB0_17
LBB0_16:
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	subl	%edx, %edi
LBB0_17:
	movq	%rdi, -80(%rbp)                 ## 8-byte Spill
	leal	(%r12,%rdi), %ebx
	movl	44(%rsi), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	subl	%eax, %ebx
	imull	%ebx, %r11d
	sarl	$16, %r11d
	xorl	%r14d, %r14d
	testl	%ebx, %ebx
	cmovlel	%r14d, %r11d
	movl	48(%rsi), %r15d
	cmovlel	%r14d, %ebx
	movl	%r13d, %eax
	shll	$16, %eax
	cltd
	idivl	%ecx
	movl	52(%rsi), %edx
	movl	%r15d, %r9d
	subl	%edx, %r9d
	movl	%r15d, -52(%rbp)                ## 4-byte Spill
	jle	LBB0_19
## %bb.18:
	subl	%r9d, %ecx
	imull	%eax, %r9d
	sarl	$16, %r9d
	movslq	%r9d, %rdx
	addq	%rdx, %r10
	subl	%edx, %r13d
	jmp	LBB0_20
LBB0_19:
	subl	%r15d, %edx
	movl	%edx, %r14d
LBB0_20:
	movq	-64(%rbp), %rdi                 ## 8-byte Reload
	subl	%r11d, %r8d
	subl	%ebx, %r12d
	leal	(%rcx,%r14), %edx
	movl	56(%rsi), %r11d
	subl	%r11d, %edx
	imull	%edx, %eax
	sarl	$16, %eax
	xorl	%ebx, %ebx
	testl	%edx, %edx
	cmovlel	%ebx, %eax
	cmovlel	%ebx, %edx
	subl	%eax, %r13d
	subl	%edx, %ecx
	cmpq	$0, 8(%rdi)
	movq	-80(%rbp), %r15                 ## 8-byte Reload
	je	LBB0_21
## %bb.22:
	addl	(%rdi), %r14d
	movq	%rdi, %r9
	addl	4(%rdi), %r15d
	jmp	LBB0_23
LBB0_21:
	movq	%rdi, %r9
LBB0_23:
	andl	$-2, %ecx
	andl	$-2, %r14d
	movl	%r14d, 52(%rsi)
	movl	%r10d, %eax
	andl	$1, %eax
	addl	%r13d, %eax
	andq	$-2, %r10
	movq	%r10, (%rsi)
	movl	%eax, %ebx
	andl	$-2, %ebx
	movl	%ebx, 16(%rsi)
	movl	%ecx, 20(%rsi)
	andl	$-2, %r12d
	andl	$-2, %r15d
	movl	%r15d, 40(%rsi)
	movq	-72(%rbp), %rdi                 ## 8-byte Reload
	movl	%edi, %edx
	andl	$1, %edx
	addl	%r8d, %edx
	andq	$-2, %rdi
	movq	%rdi, %r13
	movq	%rdi, 8(%rsi)
	movl	%edx, %r8d
	andl	$-2, %r8d
	movl	%r8d, 24(%rsi)
	movl	%r12d, 28(%rsi)
	leal	3(%rbx), %edi
	testl	%ebx, %ebx
	cmovnsl	%ebx, %edi
	sarl	$2, %edi
	cmpl	%edi, %ecx
	jge	LBB0_25
## %bb.24:
	andl	$-4, %eax
	movl	%eax, 16(%rsi)
	leal	3(%rax), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$2, %edi
	movl	%edi, %ecx
	andl	$1, %ecx
	addl	%edi, %ecx
	movl	%ecx, 20(%rsi)
	movl	%eax, %ebx
LBB0_25:
	leal	3(%r8), %eax
	testl	%r8d, %r8d
	cmovnsl	%r8d, %eax
	sarl	$2, %eax
	cmpl	%eax, %r12d
	jge	LBB0_27
## %bb.26:
	andl	$-4, %edx
	movl	%edx, 24(%rsi)
	leal	3(%rdx), %eax
	testl	%edx, %edx
	cmovnsl	%edx, %eax
	sarl	$2, %eax
	movl	%eax, %r12d
	andl	$1, %r12d
	addl	%eax, %r12d
	movl	%r12d, 28(%rsi)
	movl	%edx, %r8d
LBB0_27:
	cmpl	$3, %ecx
	movl	-52(%rbp), %eax                 ## 4-byte Reload
	jl	LBB0_13
## %bb.28:
	cmpl	$3, %r12d
	jl	LBB0_13
## %bb.29:
	cmpl	$3, %ebx
	jl	LBB0_13
## %bb.30:
	cmpl	$2, %r8d
	jle	LBB0_13
## %bb.31:
	cmpl	%ecx, 36(%r9)
	jne	LBB0_37
## %bb.32:
	cmpl	%ebx, 32(%r9)
	jne	LBB0_37
## %bb.33:
	cmpl	%r14d, 68(%r9)
	jne	LBB0_37
## %bb.34:
	cmpq	%r10, 16(%r9)
	jne	LBB0_37
## %bb.35:
	cmpl	%eax, 64(%r9)
	jne	LBB0_37
## %bb.36:
	xorl	%eax, %eax
	cmpl	%r11d, 72(%r9)
	je	LBB0_38
LBB0_37:
	movq	_IVTV_YUV_UPDATE_HORIZONTAL@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_38:
	cmpl	%r8d, 40(%r9)
	jne	LBB0_47
## %bb.39:
	cmpl	%r12d, 44(%r9)
	jne	LBB0_47
## %bb.40:
	cmpl	%r15d, 56(%r9)
	jne	LBB0_47
## %bb.41:
	cmpq	%r13, 24(%r9)
	jne	LBB0_47
## %bb.42:
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	cmpl	%ecx, 52(%r9)
	jne	LBB0_47
## %bb.43:
	movl	-44(%rbp), %ecx                 ## 4-byte Reload
	cmpl	%ecx, 60(%r9)
	jne	LBB0_47
## %bb.44:
	movq	80(%r9), %rcx
	cmpq	64(%rsi), %rcx
	jne	LBB0_47
## %bb.45:
	movl	48(%r9), %ecx
	cmpl	32(%rsi), %ecx
	jne	LBB0_47
## %bb.46:
	movq	88(%r9), %rcx
	cmpq	72(%rsi), %rcx
	je	LBB0_48
LBB0_47:
	movq	_IVTV_YUV_UPDATE_VERTICAL@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	jmp	LBB0_48
LBB0_13:
	movq	_IVTV_YUV_UPDATE_INVALID@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_48:
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_IVTV_YUV_UPDATE_INVALID,4,2    ## @IVTV_YUV_UPDATE_INVALID
	.comm	_IVTV_YUV_UPDATE_HORIZONTAL,4,2 ## @IVTV_YUV_UPDATE_HORIZONTAL
	.comm	_IVTV_YUV_UPDATE_VERTICAL,4,2   ## @IVTV_YUV_UPDATE_VERTICAL
	.no_dead_strip	_ivtv_yuv_window_setup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ivtv_yuv_window_setup
_ivtv_yuv_window_setup:                 ; @ivtv_yuv_window_setup
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-16]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 16
	.cfi_offset w19, -8
	.cfi_offset w20, -16
	ldr	x8, [x1]
	tbnz	x8, #63, LBB0_29
; %bb.1:
	ldr	x10, [x1, #8]
	tbnz	x10, #63, LBB0_30
LBB0_2:
	ldp	w12, w14, [x1, #16]
	lsl	w9, w14, #2
	sub	w11, w12, w9
	cmp	w11, #1
	b.lt	LBB0_4
; %bb.3:
	lsr	w11, w11, #1
	add	x8, x8, x11
	str	x8, [x1]
	neg	w9, w9
	neg	w12, w9
	mov	w11, #3
	sub	w11, w11, w9
	cmp	w12, #0
	csneg	w9, w11, w9, lt
	asr	w9, w9, #2
	and	w11, w9, #0x1
	add	w14, w11, w9
	stp	w12, w14, [x1, #16]
LBB0_4:
	ldp	w11, w13, [x1, #24]
	sdiv	w9, w11, w13
	cmp	w9, #1
	b.le	LBB0_7
; %bb.5:
	mov	w9, #1
	str	w9, [x1, #32]
	lsl	w9, w13, #2
	sub	w15, w11, w9
	cmp	w15, #1
	b.lt	LBB0_7
; %bb.6:
	lsr	w11, w15, #1
	add	x10, x10, x11
	str	x10, [x1, #8]
	neg	w9, w9
	neg	w11, w9
	mov	w13, #3
	sub	w13, w13, w9
	cmp	w11, #0
	csneg	w9, w13, w9, lt
	asr	w9, w9, #2
	and	w13, w9, #0x1
	add	w13, w13, w9
	stp	w11, w13, [x1, #24]
LBB0_7:
	cmp	w14, #3
	b.lt	LBB0_28
; %bb.8:
	cmp	w13, #3
	b.lt	LBB0_28
; %bb.9:
	cmp	w12, #3
	b.lt	LBB0_28
; %bb.10:
	cmp	w11, #2
	b.le	LBB0_28
; %bb.11:
	lsl	w9, w11, #16
	sdiv	w15, w9, w13
	ldp	w9, w16, [x1, #36]
	sub	w17, w16, w9
	sub	w16, w9, w16
	sub	w2, w13, w16
	mul	w3, w16, w15
	asr	w3, w3, #16
	add	x4, x10, w3, sxtw
	sub	w3, w11, w3
	cmp	w16, #1
	csel	w3, w11, w3, lt
	csel	x16, x10, x4, lt
	csel	w13, w13, w2, lt
	csel	w4, w17, wzr, lt
	ldp	w10, w11, [x1, #44]
	add	w17, w13, w4
	sub	w17, w17, w10
	mul	w15, w17, w15
	asr	w15, w15, #16
	cmp	w17, #0
	csel	w15, w15, wzr, gt
	csel	w17, w17, wzr, gt
	sub	w5, w3, w15
	sub	w15, w13, w17
	lsl	w13, w12, #16
	sdiv	w17, w13, w14
	ldp	w2, w13, [x1, #52]
	sub	w3, w2, w11
	sub	w2, w11, w2
	sub	w6, w14, w2
	mul	w7, w2, w17
	asr	w7, w7, #16
	add	x19, x8, w7, sxtw
	sub	w7, w12, w7
	cmp	w2, #1
	csel	w2, w12, w7, lt
	csel	x12, x8, x19, lt
	csel	w6, w14, w6, lt
	csel	w8, w3, wzr, lt
	add	w14, w6, w8
	sub	w14, w14, w13
	mul	w17, w14, w17
	asr	w17, w17, #16
	cmp	w14, #0
	csel	w17, w17, wzr, gt
	csel	w3, w14, wzr, gt
	sub	w14, w2, w17
	sub	w17, w6, w3
	ldr	x2, [x0, #8]
	cbz	x2, LBB0_13
; %bb.12:
	ldp	w2, w3, [x0]
	add	w8, w2, w8
	add	w4, w3, w4
LBB0_13:
	and	w2, w17, #0xfffffffe
	and	w8, w8, #0xfffffffe
	str	w8, [x1, #52]
	and	w17, w12, #0x1
	add	w6, w17, w14
	and	x17, x12, #0xfffffffffffffffe
	ands	w3, w6, #0xfffffffe
	stp	w3, w2, [x1, #16]
	and	w15, w15, #0xfffffffe
	and	w12, w4, #0xfffffffe
	str	w12, [x1, #40]
	and	w14, w16, #0x1
	add	w4, w14, w5
	and	x14, x16, #0xfffffffffffffffe
	stp	x17, x14, [x1]
	and	w16, w4, #0xfffffffe
	stp	w16, w15, [x1, #24]
	add	w5, w3, #3
	csel	w5, w5, w3, lt
	cmp	w2, w5, asr #2
	b.ge	LBB0_15
; %bb.14:
	ands	w3, w6, #0xfffffffc
	orr	w2, w3, #0x3
	csel	w2, w2, w3, lt
	asr	w2, w2, #2
	and	w5, w2, #0x1
	add	w2, w5, w2
	stp	w3, w2, [x1, #16]
LBB0_15:
	add	w5, w16, #3
	cmp	w16, #0
	csel	w5, w5, w16, lt
	cmp	w15, w5, asr #2
	b.ge	LBB0_17
; %bb.16:
	ands	w16, w4, #0xfffffffc
	orr	w15, w16, #0x3
	csel	w15, w15, w16, lt
	asr	w15, w15, #2
	and	w4, w15, #0x1
	add	w15, w4, w15
	stp	w16, w15, [x1, #24]
LBB0_17:
	cmp	w2, #3
	b.lt	LBB0_28
; %bb.18:
	cmp	w15, #3
	b.lt	LBB0_28
; %bb.19:
	cmp	w3, #3
	b.lt	LBB0_28
; %bb.20:
	cmp	w16, #2
	b.le	LBB0_28
; %bb.21:
	ldr	w4, [x0, #36]
	cmp	w4, w2
	b.ne	LBB0_31
; %bb.22:
	ldr	w2, [x0, #32]
	cmp	w2, w3
	b.ne	LBB0_31
; %bb.23:
	ldr	w2, [x0, #68]
	cmp	w2, w8
	b.ne	LBB0_31
; %bb.24:
	ldr	x8, [x0, #16]
	cmp	x8, x17
	b.ne	LBB0_31
; %bb.25:
	ldr	w8, [x0, #64]
	cmp	w8, w11
	b.ne	LBB0_31
; %bb.26:
	ldr	w8, [x0, #72]
	cmp	w8, w13
	b.ne	LBB0_31
; %bb.27:
	mov	w8, #0
	b	LBB0_32
LBB0_28:
Lloh0:
	adrp	x8, _IVTV_YUV_UPDATE_INVALID@GOTPAGE
Lloh1:
	ldr	x8, [x8, _IVTV_YUV_UPDATE_INVALID@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	b	LBB0_42
LBB0_29:
	mov	x8, #0
	str	xzr, [x1]
	ldr	x10, [x1, #8]
	tbz	x10, #63, LBB0_2
LBB0_30:
	mov	x10, #0
	str	xzr, [x1, #8]
	b	LBB0_2
LBB0_31:
Lloh3:
	adrp	x8, _IVTV_YUV_UPDATE_HORIZONTAL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _IVTV_YUV_UPDATE_HORIZONTAL@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
LBB0_32:
	ldr	w11, [x0, #40]
	cmp	w11, w16
	b.ne	LBB0_41
; %bb.33:
	ldr	w11, [x0, #44]
	cmp	w11, w15
	b.ne	LBB0_41
; %bb.34:
	ldr	w11, [x0, #56]
	cmp	w11, w12
	b.ne	LBB0_41
; %bb.35:
	ldr	x11, [x0, #24]
	cmp	x11, x14
	b.ne	LBB0_41
; %bb.36:
	ldr	w11, [x0, #52]
	cmp	w11, w9
	b.ne	LBB0_41
; %bb.37:
	ldr	w9, [x0, #60]
	cmp	w9, w10
	b.ne	LBB0_41
; %bb.38:
	ldr	x9, [x0, #80]
	ldr	x10, [x1, #64]
	cmp	x9, x10
	b.ne	LBB0_41
; %bb.39:
	ldr	w9, [x0, #48]
	ldr	w10, [x1, #32]
	cmp	w9, w10
	b.ne	LBB0_41
; %bb.40:
	ldr	x9, [x0, #88]
	ldr	x10, [x1, #72]
	cmp	x9, x10
	b.eq	LBB0_42
LBB0_41:
Lloh6:
	adrp	x9, _IVTV_YUV_UPDATE_VERTICAL@GOTPAGE
Lloh7:
	ldr	x9, [x9, _IVTV_YUV_UPDATE_VERTICAL@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
LBB0_42:
	mov	x0, x8
	ldp	x20, x19, [sp], #16             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_IVTV_YUV_UPDATE_INVALID,4,2    ; @IVTV_YUV_UPDATE_INVALID
	.comm	_IVTV_YUV_UPDATE_HORIZONTAL,4,2 ; @IVTV_YUV_UPDATE_HORIZONTAL
	.comm	_IVTV_YUV_UPDATE_VERTICAL,4,2   ; @IVTV_YUV_UPDATE_VERTICAL
	.no_dead_strip	_ivtv_yuv_window_setup
.subsections_via_symbols
