	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_set_umac_rxtx
_bnx2x_set_umac_rxtx:                   ## @bnx2x_set_umac_rxtx
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %rbx
	cmpl	$0, (%rdi)
	jne	LBB0_1
## %bb.2:
	movq	_GRCBASE_UMAC0@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_GRCBASE_UMAC1@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %r12d
	movq	8(%rbx), %r14
	movq	_MISC_REG_RESET_REG_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_REG_RD
	movq	_MISC_REGISTERS_RESET_REG_2_UMAC0@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movb	(%rbx), %cl
	shll	%cl, %edx
	testl	%eax, %edx
	je	LBB0_8
## %bb.4:
	movq	_UMAC_REG_COMMAND_CONFIG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	addl	%r12d, %esi
	movq	%r14, %rdi
	callq	_REG_RD
	movq	_UMAC_COMMAND_CONFIG_REG_TX_ENA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_UMAC_COMMAND_CONFIG_REG_RX_ENA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testq	%r15, %r15
	je	LBB0_6
## %bb.5:
	orl	%eax, %edx
	orl	%ecx, %edx
	jmp	LBB0_7
LBB0_8:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_6:
	orl	%edx, %ecx
	notl	%ecx
	andl	%ecx, %eax
	movl	%eax, %edx
LBB0_7:
	addl	(%rbx), %r12d
	movq	%r14, %rdi
	movl	%r12d, %esi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_REG_WR                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_GRCBASE_UMAC1,4,2              ## @GRCBASE_UMAC1
	.comm	_GRCBASE_UMAC0,4,2              ## @GRCBASE_UMAC0
	.comm	_MISC_REG_RESET_REG_2,4,2       ## @MISC_REG_RESET_REG_2
	.comm	_MISC_REGISTERS_RESET_REG_2_UMAC0,4,2 ## @MISC_REGISTERS_RESET_REG_2_UMAC0
	.comm	_UMAC_REG_COMMAND_CONFIG,4,2    ## @UMAC_REG_COMMAND_CONFIG
	.comm	_UMAC_COMMAND_CONFIG_REG_TX_ENA,4,2 ## @UMAC_COMMAND_CONFIG_REG_TX_ENA
	.comm	_UMAC_COMMAND_CONFIG_REG_RX_ENA,4,2 ## @UMAC_COMMAND_CONFIG_REG_RX_ENA
	.no_dead_strip	_bnx2x_set_umac_rxtx
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_set_umac_rxtx
_bnx2x_set_umac_rxtx:                   ; @bnx2x_set_umac_rxtx
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x21, x0
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _GRCBASE_UMAC1@GOTPAGE
Lloh1:
	ldr	x9, [x9, _GRCBASE_UMAC1@GOTPAGEOFF]
Lloh2:
	adrp	x10, _GRCBASE_UMAC0@GOTPAGE
Lloh3:
	ldr	x10, [x10, _GRCBASE_UMAC0@GOTPAGEOFF]
	cmp	w8, #0
	csel	x8, x10, x9, eq
	ldr	w22, [x8]
	ldr	x20, [x0, #8]
Lloh4:
	adrp	x8, _MISC_REG_RESET_REG_2@GOTPAGE
Lloh5:
	ldr	x8, [x8, _MISC_REG_RESET_REG_2@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_REG_RD
Lloh7:
	adrp	x8, _MISC_REGISTERS_RESET_REG_2_UMAC0@GOTPAGE
Lloh8:
	ldr	x8, [x8, _MISC_REGISTERS_RESET_REG_2_UMAC0@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	ldr	w9, [x21]
	lsl	w8, w8, w9
	tst	w8, w0
	b.eq	LBB0_2
; %bb.1:
Lloh10:
	adrp	x21, _UMAC_REG_COMMAND_CONFIG@GOTPAGE
Lloh11:
	ldr	x21, [x21, _UMAC_REG_COMMAND_CONFIG@GOTPAGEOFF]
	ldr	w8, [x21]
	add	w1, w8, w22
	mov	x0, x20
	bl	_REG_RD
Lloh12:
	adrp	x8, _UMAC_COMMAND_CONFIG_REG_TX_ENA@GOTPAGE
Lloh13:
	ldr	x8, [x8, _UMAC_COMMAND_CONFIG_REG_TX_ENA@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
Lloh15:
	adrp	x9, _UMAC_COMMAND_CONFIG_REG_RX_ENA@GOTPAGE
Lloh16:
	ldr	x9, [x9, _UMAC_COMMAND_CONFIG_REG_RX_ENA@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w10, w9, w8
	bic	w10, w0, w10
	orr	w8, w8, w0
	orr	w8, w8, w9
	cmp	x19, #0
	csel	w2, w10, w8, eq
	ldr	w8, [x21]
	add	w1, w8, w22
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_REG_WR
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_GRCBASE_UMAC1,4,2              ; @GRCBASE_UMAC1
	.comm	_GRCBASE_UMAC0,4,2              ; @GRCBASE_UMAC0
	.comm	_MISC_REG_RESET_REG_2,4,2       ; @MISC_REG_RESET_REG_2
	.comm	_MISC_REGISTERS_RESET_REG_2_UMAC0,4,2 ; @MISC_REGISTERS_RESET_REG_2_UMAC0
	.comm	_UMAC_REG_COMMAND_CONFIG,4,2    ; @UMAC_REG_COMMAND_CONFIG
	.comm	_UMAC_COMMAND_CONFIG_REG_TX_ENA,4,2 ; @UMAC_COMMAND_CONFIG_REG_TX_ENA
	.comm	_UMAC_COMMAND_CONFIG_REG_RX_ENA,4,2 ; @UMAC_COMMAND_CONFIG_REG_RX_ENA
	.no_dead_strip	_bnx2x_set_umac_rxtx
.subsections_via_symbols
