	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_bnx2x_link_reset               ## -- Begin function bnx2x_link_reset
	.p2align	4, 0x90
_bnx2x_link_reset:                      ## @bnx2x_link_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, -56(%rbp)                 ## 4-byte Spill
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movq	24(%rdi), %r15
	movslq	(%rdi), %r12
	movq	_NETIF_MSG_LINK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	L_.str(%rip), %rsi
	movl	%r12d, %edx
	callq	_DP
	movq	$0, 24(%r13)
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_bnx2x_chng_link_count
	movq	24(%r13), %rsi
	movq	%rbx, %rdi
	callq	_bnx2x_update_mng
	movq	_SHMEM_EEE_LP_ADV_STATUS_MASK@GOTPCREL(%rip), %rax
	movq	_SHMEM_EEE_ACTIVE_BIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	notl	%esi
	andl	(%r13), %esi
	movl	%esi, (%r13)
	movq	%rbx, %rdi
	callq	_bnx2x_update_mng_eee
	movq	_NIG_REG_MASK_INTERRUPT_PORT0@GOTPCREL(%rip), %rax
	movq	%r12, %r14
	shlq	$2, %r14
	movq	_NIG_MASK_XGXS0_LINK_STATUS@GOTPCREL(%rip), %rcx
	movq	_NIG_MASK_XGXS0_LINK10G@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movq	(%rax), %rsi
	movq	_NIG_MASK_SERDES0_LINK_STATUS@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	addq	%r14, %rsi
	movq	_NIG_MASK_MI_INT@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r15, %rdi
	callq	_bnx2x_bits_dis
	movq	_NIG_REG_EGRESS_DRAIN0_MODE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r14, -48(%rbp)                 ## 8-byte Spill
	addq	%r14, %rsi
	movq	%r15, %rdi
	movl	$1, %edx
	callq	_REG_WR
	movq	%r15, %rdi
	callq	_CHIP_IS_E3
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	_NIG_REG_BMAC0_OUT_EN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	-48(%rbp), %r14                 ## 8-byte Reload
	addq	%r14, %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_NIG_REG_EGRESS_EMAC0_OUT_EN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	%r14, %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
LBB0_2:
	movq	%r15, %rdi
	callq	_CHIP_IS_E3
	testl	%eax, %eax
	je	LBB0_3
## %bb.4:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_bnx2x_set_xmac_rxtx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_bnx2x_set_umac_rxtx
	jmp	LBB0_5
LBB0_3:
	movl	16(%rbx), %esi
	movq	%r15, %rdi
	movl	%r12d, %edx
	xorl	%ecx, %ecx
	callq	_bnx2x_set_bmac_rx
LBB0_5:
	movq	%r15, %rdi
	callq	_CHIP_IS_E3
	testl	%eax, %eax
	jne	LBB0_7
## %bb.6:
	movq	_NIG_REG_NIG_EMAC0_EN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	-48(%rbp), %rsi                 ## 8-byte Folded Reload
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
LBB0_7:
	movl	$10000, %edi                    ## imm = 0x2710
	movl	$20000, %esi                    ## imm = 0x4E20
	callq	_usleep_range
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_bnx2x_set_mdio_emac_per_phy
	movq	_LED_MODE_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%ecx, %ecx
	callq	_bnx2x_set_led
	cmpl	$0, -56(%rbp)                   ## 4-byte Folded Reload
	je	LBB0_15
## %bb.8:
	movq	_EXT_PHY1@GOTPCREL(%rip), %rax
	movslq	(%rax), %r14
	movl	4(%rbx), %eax
	cmpl	%eax, %r14d
	jge	LBB0_15
## %bb.9:
	movq	%r12, -64(%rbp)                 ## 8-byte Spill
	movq	%r15, -72(%rbp)                 ## 8-byte Spill
	movq	%r13, -56(%rbp)                 ## 8-byte Spill
	movq	8(%rbx), %rsi
	movq	%r14, %r12
	shlq	$4, %r12
	xorl	%r13d, %r13d
	movl	$1, %r15d
	jmp	LBB0_10
	.p2align	4, 0x90
LBB0_12:                                ##   in Loop: Header=BB0_10 Depth=1
	movq	_FLAGS_REARM_LATCH_SIGNAL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%rsi,%r12)
	cmovnel	%r15d, %r13d
	incq	%r14
	movslq	%eax, %rcx
	addq	$16, %r12
	cmpq	%rcx, %r14
	jge	LBB0_13
LBB0_10:                                ## =>This Inner Loop Header: Depth=1
	cmpq	$0, 8(%rsi,%r12)
	je	LBB0_12
## %bb.11:                              ##   in Loop: Header=BB0_10 Depth=1
	addq	%r12, %rsi
	movq	%rbx, %rdi
	callq	_bnx2x_set_aer_mmd
	movq	8(%rbx), %rax
	leaq	(%rax,%r12), %rdi
	movq	%rbx, %rsi
	callq	*8(%rax,%r12)
	movq	8(%rbx), %rsi
	movl	4(%rbx), %eax
	jmp	LBB0_12
LBB0_13:
	testl	%r13d, %r13d
	movq	-56(%rbp), %r13                 ## 8-byte Reload
	movq	-72(%rbp), %r15                 ## 8-byte Reload
	movq	-64(%rbp), %r12                 ## 8-byte Reload
	je	LBB0_15
## %bb.14:
	movq	%r15, %rdi
	movl	%r12d, %esi
	xorl	%edx, %edx
	callq	_bnx2x_rearm_latch_signal
	movq	_NIG_REG_LATCH_BC_0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	-48(%rbp), %rsi                 ## 8-byte Folded Reload
	movq	_NIG_LATCH_BC_ENABLE_MI_INT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$1, %edx
	shll	%cl, %edx
	movq	%r15, %rdi
	callq	_bnx2x_bits_dis
LBB0_15:
	movq	8(%rbx), %rdi
	movq	_INT_PHY@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	shlq	$4, %rcx
	movq	8(%rdi,%rcx), %rax
	testq	%rax, %rax
	je	LBB0_17
## %bb.16:
	addq	%rcx, %rdi
	movq	%rbx, %rsi
	callq	*%rax
LBB0_17:
	movq	%r15, %rdi
	callq	_CHIP_IS_E3
	testl	%eax, %eax
	je	LBB0_18
## %bb.19:
	movl	(%rbx), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_GRCBASE_XMAC1@GOTPCREL(%rip), %rax
	movq	(%rax), %r12
	movq	_GRCBASE_XMAC0@GOTPCREL(%rip), %rax
	movq	(%rax), %r14
	movq	%rbx, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_bnx2x_set_xumac_nig
	movq	_MISC_REG_RESET_REG_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_REG_RD
	movq	_MISC_REGISTERS_RESET_REG_2_XMAC@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_22
## %bb.20:
	cmpl	$0, -48(%rbp)                   ## 4-byte Folded Reload
	cmoveq	%r14, %r12
	movq	_XMAC_REG_CTRL@GOTPCREL(%rip), %rax
	addq	(%rax), %r12
	movq	_XMAC_CTRL_REG_SOFT_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	movq	%r12, %rsi
	jmp	LBB0_21
LBB0_18:
	movq	_GRCBASE_MISC@GOTPCREL(%rip), %rax
	movq	_MISC_REGISTERS_RESET_REG_2_CLEAR@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%rax), %rsi
	movq	_MISC_REGISTERS_RESET_REG_2_RST_BMAC0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	%r12d, %ecx
	shll	%cl, %edx
	movq	%r15, %rdi
	callq	_REG_WR
	movq	_NIG_REG_BMAC0_IN_EN@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	-48(%rbp), %rbx                 ## 8-byte Reload
	addq	%rbx, %rsi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_REG_WR
	movq	_NIG_REG_EMAC0_IN_EN@GOTPCREL(%rip), %rax
	addq	(%rax), %rbx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
LBB0_21:
	callq	_REG_WR
LBB0_22:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 8(%r13)
	xorl	%eax, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NETIF_MSG_LINK,4,2             ## @NETIF_MSG_LINK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Resetting the link of port %d\n"

	.comm	_SHMEM_EEE_LP_ADV_STATUS_MASK,4,2 ## @SHMEM_EEE_LP_ADV_STATUS_MASK
	.comm	_SHMEM_EEE_ACTIVE_BIT,4,2       ## @SHMEM_EEE_ACTIVE_BIT
	.comm	_NIG_REG_MASK_INTERRUPT_PORT0,8,3 ## @NIG_REG_MASK_INTERRUPT_PORT0
	.comm	_NIG_MASK_XGXS0_LINK_STATUS,4,2 ## @NIG_MASK_XGXS0_LINK_STATUS
	.comm	_NIG_MASK_XGXS0_LINK10G,4,2     ## @NIG_MASK_XGXS0_LINK10G
	.comm	_NIG_MASK_SERDES0_LINK_STATUS,4,2 ## @NIG_MASK_SERDES0_LINK_STATUS
	.comm	_NIG_MASK_MI_INT,4,2            ## @NIG_MASK_MI_INT
	.comm	_NIG_REG_EGRESS_DRAIN0_MODE,8,3 ## @NIG_REG_EGRESS_DRAIN0_MODE
	.comm	_NIG_REG_BMAC0_OUT_EN,8,3       ## @NIG_REG_BMAC0_OUT_EN
	.comm	_NIG_REG_EGRESS_EMAC0_OUT_EN,8,3 ## @NIG_REG_EGRESS_EMAC0_OUT_EN
	.comm	_NIG_REG_NIG_EMAC0_EN,8,3       ## @NIG_REG_NIG_EMAC0_EN
	.comm	_LED_MODE_OFF,4,2               ## @LED_MODE_OFF
	.comm	_EXT_PHY1,4,2                   ## @EXT_PHY1
	.comm	_FLAGS_REARM_LATCH_SIGNAL,4,2   ## @FLAGS_REARM_LATCH_SIGNAL
	.comm	_NIG_REG_LATCH_BC_0,8,3         ## @NIG_REG_LATCH_BC_0
	.comm	_NIG_LATCH_BC_ENABLE_MI_INT,4,2 ## @NIG_LATCH_BC_ENABLE_MI_INT
	.comm	_INT_PHY,8,3                    ## @INT_PHY
	.comm	_GRCBASE_MISC,8,3               ## @GRCBASE_MISC
	.comm	_MISC_REGISTERS_RESET_REG_2_CLEAR,8,3 ## @MISC_REGISTERS_RESET_REG_2_CLEAR
	.comm	_MISC_REGISTERS_RESET_REG_2_RST_BMAC0,4,2 ## @MISC_REGISTERS_RESET_REG_2_RST_BMAC0
	.comm	_NIG_REG_BMAC0_IN_EN,8,3        ## @NIG_REG_BMAC0_IN_EN
	.comm	_NIG_REG_EMAC0_IN_EN,8,3        ## @NIG_REG_EMAC0_IN_EN
	.comm	_GRCBASE_XMAC1,8,3              ## @GRCBASE_XMAC1
	.comm	_GRCBASE_XMAC0,8,3              ## @GRCBASE_XMAC0
	.comm	_MISC_REG_RESET_REG_2,4,2       ## @MISC_REG_RESET_REG_2
	.comm	_MISC_REGISTERS_RESET_REG_2_XMAC,4,2 ## @MISC_REGISTERS_RESET_REG_2_XMAC
	.comm	_XMAC_REG_CTRL,8,3              ## @XMAC_REG_CTRL
	.comm	_XMAC_CTRL_REG_SOFT_RESET,4,2   ## @XMAC_CTRL_REG_SOFT_RESET
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_bnx2x_link_reset               ; -- Begin function bnx2x_link_reset
	.p2align	2
_bnx2x_link_reset:                      ; @bnx2x_link_reset
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x23, x2
	mov	x19, x1
	mov	x21, x0
	ldr	x20, [x0, #24]
	ldrsw	x22, [x0]
Lloh0:
	adrp	x8, _NETIF_MSG_LINK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NETIF_MSG_LINK@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x22
	bl	_DP
	str	xzr, [x19, #24]
	mov	x0, x21
	mov	w1, #1
	bl	_bnx2x_chng_link_count
	ldr	x1, [x19, #24]
	mov	x0, x21
	bl	_bnx2x_update_mng
Lloh5:
	adrp	x8, _SHMEM_EEE_LP_ADV_STATUS_MASK@GOTPAGE
Lloh6:
	ldr	x8, [x8, _SHMEM_EEE_LP_ADV_STATUS_MASK@GOTPAGEOFF]
Lloh7:
	adrp	x9, _SHMEM_EEE_ACTIVE_BIT@GOTPAGE
Lloh8:
	ldr	x9, [x9, _SHMEM_EEE_ACTIVE_BIT@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
Lloh10:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ldr	w9, [x19]
	bic	w1, w9, w8
	str	w1, [x19]
	mov	x0, x21
	bl	_bnx2x_update_mng_eee
Lloh11:
	adrp	x8, _NIG_REG_MASK_INTERRUPT_PORT0@GOTPAGE
Lloh12:
	ldr	x8, [x8, _NIG_REG_MASK_INTERRUPT_PORT0@GOTPAGEOFF]
Lloh13:
	ldr	x8, [x8]
	lsl	x24, x22, #2
	add	x1, x8, x24
Lloh14:
	adrp	x8, _NIG_MASK_XGXS0_LINK_STATUS@GOTPAGE
Lloh15:
	ldr	x8, [x8, _NIG_MASK_XGXS0_LINK_STATUS@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	adrp	x9, _NIG_MASK_XGXS0_LINK10G@GOTPAGE
Lloh18:
	ldr	x9, [x9, _NIG_MASK_XGXS0_LINK10G@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh20:
	adrp	x9, _NIG_MASK_SERDES0_LINK_STATUS@GOTPAGE
Lloh21:
	ldr	x9, [x9, _NIG_MASK_SERDES0_LINK_STATUS@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh23:
	adrp	x9, _NIG_MASK_MI_INT@GOTPAGE
Lloh24:
	ldr	x9, [x9, _NIG_MASK_MI_INT@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x20
	bl	_bnx2x_bits_dis
Lloh26:
	adrp	x8, _NIG_REG_EGRESS_DRAIN0_MODE@GOTPAGE
Lloh27:
	ldr	x8, [x8, _NIG_REG_EGRESS_DRAIN0_MODE@GOTPAGEOFF]
Lloh28:
	ldr	x8, [x8]
	add	x1, x8, x24
	mov	x0, x20
	mov	w2, #1
	bl	_REG_WR
	mov	x0, x20
	bl	_CHIP_IS_E3
	cbnz	w0, LBB0_2
; %bb.1:
Lloh29:
	adrp	x8, _NIG_REG_BMAC0_OUT_EN@GOTPAGE
Lloh30:
	ldr	x8, [x8, _NIG_REG_BMAC0_OUT_EN@GOTPAGEOFF]
Lloh31:
	ldr	x8, [x8]
	add	x1, x8, x24
	mov	x0, x20
	mov	w2, #0
	bl	_REG_WR
Lloh32:
	adrp	x8, _NIG_REG_EGRESS_EMAC0_OUT_EN@GOTPAGE
Lloh33:
	ldr	x8, [x8, _NIG_REG_EGRESS_EMAC0_OUT_EN@GOTPAGEOFF]
Lloh34:
	ldr	x8, [x8]
	add	x1, x8, x24
	mov	x0, x20
	mov	w2, #0
	bl	_REG_WR
LBB0_2:
	mov	x0, x20
	bl	_CHIP_IS_E3
	cbz	w0, LBB0_4
; %bb.3:
	mov	x0, x21
	mov	w1, #0
	bl	_bnx2x_set_xmac_rxtx
	mov	x0, x21
	mov	w1, #0
	bl	_bnx2x_set_umac_rxtx
	b	LBB0_5
LBB0_4:
	ldr	w1, [x21, #16]
	mov	x0, x20
	mov	x2, x22
	mov	w3, #0
	bl	_bnx2x_set_bmac_rx
LBB0_5:
	mov	x0, x20
	bl	_CHIP_IS_E3
	cbnz	w0, LBB0_7
; %bb.6:
Lloh35:
	adrp	x8, _NIG_REG_NIG_EMAC0_EN@GOTPAGE
Lloh36:
	ldr	x8, [x8, _NIG_REG_NIG_EMAC0_EN@GOTPAGEOFF]
Lloh37:
	ldr	x8, [x8]
	add	x1, x8, x24
	mov	x0, x20
	mov	w2, #0
	bl	_REG_WR
LBB0_7:
	mov	w0, #10000
	mov	w1, #20000
	bl	_usleep_range
	mov	x0, x20
	mov	x1, x21
	bl	_bnx2x_set_mdio_emac_per_phy
Lloh38:
	adrp	x8, _LED_MODE_OFF@GOTPAGE
Lloh39:
	ldr	x8, [x8, _LED_MODE_OFF@GOTPAGEOFF]
Lloh40:
	ldr	w2, [x8]
	mov	x0, x21
	mov	x1, x19
	mov	w3, #0
	bl	_bnx2x_set_led
	cbz	w23, LBB0_15
; %bb.8:
Lloh41:
	adrp	x8, _EXT_PHY1@GOTPAGE
Lloh42:
	ldr	x8, [x8, _EXT_PHY1@GOTPAGEOFF]
Lloh43:
	ldrsw	x23, [x8]
	ldr	w8, [x21, #4]
	cmp	w23, w8
	b.ge	LBB0_15
; %bb.9:
	mov	w25, #0
	ldr	x9, [x21, #8]
	lsl	x26, x23, #4
Lloh44:
	adrp	x27, _FLAGS_REARM_LATCH_SIGNAL@GOTPAGE
Lloh45:
	ldr	x27, [x27, _FLAGS_REARM_LATCH_SIGNAL@GOTPAGEOFF]
	b	LBB0_11
LBB0_10:                                ;   in Loop: Header=BB0_11 Depth=1
	ldr	w10, [x9, x26]
	ldr	w11, [x27]
	tst	w11, w10
	csinc	w25, w25, wzr, eq
	add	x23, x23, #1
	add	x26, x26, #16
	cmp	x23, w8, sxtw
	b.ge	LBB0_13
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	add	x1, x9, x26
	ldr	x10, [x1, #8]
	cbz	x10, LBB0_10
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=1
	mov	x0, x21
	bl	_bnx2x_set_aer_mmd
	ldr	x8, [x21, #8]
	add	x0, x8, x26
	ldr	x8, [x0, #8]
	mov	x1, x21
	blr	x8
	ldr	x9, [x21, #8]
	ldr	w8, [x21, #4]
	b	LBB0_10
LBB0_13:
	cbz	w25, LBB0_15
; %bb.14:
	mov	x0, x20
	mov	x1, x22
	mov	w2, #0
	bl	_bnx2x_rearm_latch_signal
Lloh46:
	adrp	x8, _NIG_REG_LATCH_BC_0@GOTPAGE
Lloh47:
	ldr	x8, [x8, _NIG_REG_LATCH_BC_0@GOTPAGEOFF]
Lloh48:
	ldr	x8, [x8]
	add	x1, x8, x24
Lloh49:
	adrp	x8, _NIG_LATCH_BC_ENABLE_MI_INT@GOTPAGE
Lloh50:
	ldr	x8, [x8, _NIG_LATCH_BC_ENABLE_MI_INT@GOTPAGEOFF]
Lloh51:
	ldr	w8, [x8]
	mov	w9, #1
	lsl	w2, w9, w8
	mov	x0, x20
	bl	_bnx2x_bits_dis
LBB0_15:
	ldr	x8, [x21, #8]
Lloh52:
	adrp	x9, _INT_PHY@GOTPAGE
Lloh53:
	ldr	x9, [x9, _INT_PHY@GOTPAGEOFF]
Lloh54:
	ldr	x9, [x9]
	add	x0, x8, x9, lsl #4
	ldr	x8, [x0, #8]
	cbz	x8, LBB0_17
; %bb.16:
	mov	x1, x21
	blr	x8
LBB0_17:
	mov	x0, x20
	bl	_CHIP_IS_E3
	cbz	w0, LBB0_20
; %bb.18:
	ldr	w23, [x21]
Lloh55:
	adrp	x8, _GRCBASE_XMAC1@GOTPAGE
Lloh56:
	ldr	x8, [x8, _GRCBASE_XMAC1@GOTPAGEOFF]
Lloh57:
	ldr	x22, [x8]
Lloh58:
	adrp	x8, _GRCBASE_XMAC0@GOTPAGE
Lloh59:
	ldr	x8, [x8, _GRCBASE_XMAC0@GOTPAGEOFF]
Lloh60:
	ldr	x24, [x8]
	mov	x0, x21
	mov	w1, #0
	mov	w2, #0
	bl	_bnx2x_set_xumac_nig
Lloh61:
	adrp	x8, _MISC_REG_RESET_REG_2@GOTPAGE
Lloh62:
	ldr	x8, [x8, _MISC_REG_RESET_REG_2@GOTPAGEOFF]
Lloh63:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_REG_RD
Lloh64:
	adrp	x8, _MISC_REGISTERS_RESET_REG_2_XMAC@GOTPAGE
Lloh65:
	ldr	x8, [x8, _MISC_REGISTERS_RESET_REG_2_XMAC@GOTPAGEOFF]
Lloh66:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_22
; %bb.19:
	cmp	w23, #0
Lloh67:
	adrp	x8, _XMAC_REG_CTRL@GOTPAGE
Lloh68:
	ldr	x8, [x8, _XMAC_REG_CTRL@GOTPAGEOFF]
	csel	x9, x24, x22, eq
Lloh69:
	ldr	x8, [x8]
	add	x1, x8, x9
Lloh70:
	adrp	x8, _XMAC_CTRL_REG_SOFT_RESET@GOTPAGE
Lloh71:
	ldr	x8, [x8, _XMAC_CTRL_REG_SOFT_RESET@GOTPAGEOFF]
Lloh72:
	ldr	w2, [x8]
	mov	x0, x20
	b	LBB0_21
LBB0_20:
Lloh73:
	adrp	x8, _GRCBASE_MISC@GOTPAGE
Lloh74:
	ldr	x8, [x8, _GRCBASE_MISC@GOTPAGEOFF]
Lloh75:
	ldr	x8, [x8]
Lloh76:
	adrp	x9, _MISC_REGISTERS_RESET_REG_2_CLEAR@GOTPAGE
Lloh77:
	ldr	x9, [x9, _MISC_REGISTERS_RESET_REG_2_CLEAR@GOTPAGEOFF]
Lloh78:
	ldr	x9, [x9]
	add	x1, x9, x8
Lloh79:
	adrp	x8, _MISC_REGISTERS_RESET_REG_2_RST_BMAC0@GOTPAGE
Lloh80:
	ldr	x8, [x8, _MISC_REGISTERS_RESET_REG_2_RST_BMAC0@GOTPAGEOFF]
Lloh81:
	ldr	w8, [x8]
	lsl	w2, w8, w22
	mov	x0, x20
	bl	_REG_WR
Lloh82:
	adrp	x8, _NIG_REG_BMAC0_IN_EN@GOTPAGE
Lloh83:
	ldr	x8, [x8, _NIG_REG_BMAC0_IN_EN@GOTPAGEOFF]
Lloh84:
	ldr	x8, [x8]
	add	x1, x8, x24
	mov	x0, x20
	mov	w2, #0
	bl	_REG_WR
Lloh85:
	adrp	x8, _NIG_REG_EMAC0_IN_EN@GOTPAGE
Lloh86:
	ldr	x8, [x8, _NIG_REG_EMAC0_IN_EN@GOTPAGEOFF]
Lloh87:
	ldr	x8, [x8]
	add	x1, x8, x24
	mov	x0, x20
	mov	w2, #0
LBB0_21:
	bl	_REG_WR
LBB0_22:
	stp	xzr, xzr, [x19, #8]
	mov	w0, #0
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh9
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.cfi_endproc
                                        ; -- End function
	.comm	_NETIF_MSG_LINK,4,2             ; @NETIF_MSG_LINK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Resetting the link of port %d\n"

	.comm	_SHMEM_EEE_LP_ADV_STATUS_MASK,4,2 ; @SHMEM_EEE_LP_ADV_STATUS_MASK
	.comm	_SHMEM_EEE_ACTIVE_BIT,4,2       ; @SHMEM_EEE_ACTIVE_BIT
	.comm	_NIG_REG_MASK_INTERRUPT_PORT0,8,3 ; @NIG_REG_MASK_INTERRUPT_PORT0
	.comm	_NIG_MASK_XGXS0_LINK_STATUS,4,2 ; @NIG_MASK_XGXS0_LINK_STATUS
	.comm	_NIG_MASK_XGXS0_LINK10G,4,2     ; @NIG_MASK_XGXS0_LINK10G
	.comm	_NIG_MASK_SERDES0_LINK_STATUS,4,2 ; @NIG_MASK_SERDES0_LINK_STATUS
	.comm	_NIG_MASK_MI_INT,4,2            ; @NIG_MASK_MI_INT
	.comm	_NIG_REG_EGRESS_DRAIN0_MODE,8,3 ; @NIG_REG_EGRESS_DRAIN0_MODE
	.comm	_NIG_REG_BMAC0_OUT_EN,8,3       ; @NIG_REG_BMAC0_OUT_EN
	.comm	_NIG_REG_EGRESS_EMAC0_OUT_EN,8,3 ; @NIG_REG_EGRESS_EMAC0_OUT_EN
	.comm	_NIG_REG_NIG_EMAC0_EN,8,3       ; @NIG_REG_NIG_EMAC0_EN
	.comm	_LED_MODE_OFF,4,2               ; @LED_MODE_OFF
	.comm	_EXT_PHY1,4,2                   ; @EXT_PHY1
	.comm	_FLAGS_REARM_LATCH_SIGNAL,4,2   ; @FLAGS_REARM_LATCH_SIGNAL
	.comm	_NIG_REG_LATCH_BC_0,8,3         ; @NIG_REG_LATCH_BC_0
	.comm	_NIG_LATCH_BC_ENABLE_MI_INT,4,2 ; @NIG_LATCH_BC_ENABLE_MI_INT
	.comm	_INT_PHY,8,3                    ; @INT_PHY
	.comm	_GRCBASE_MISC,8,3               ; @GRCBASE_MISC
	.comm	_MISC_REGISTERS_RESET_REG_2_CLEAR,8,3 ; @MISC_REGISTERS_RESET_REG_2_CLEAR
	.comm	_MISC_REGISTERS_RESET_REG_2_RST_BMAC0,4,2 ; @MISC_REGISTERS_RESET_REG_2_RST_BMAC0
	.comm	_NIG_REG_BMAC0_IN_EN,8,3        ; @NIG_REG_BMAC0_IN_EN
	.comm	_NIG_REG_EMAC0_IN_EN,8,3        ; @NIG_REG_EMAC0_IN_EN
	.comm	_GRCBASE_XMAC1,8,3              ; @GRCBASE_XMAC1
	.comm	_GRCBASE_XMAC0,8,3              ; @GRCBASE_XMAC0
	.comm	_MISC_REG_RESET_REG_2,4,2       ; @MISC_REG_RESET_REG_2
	.comm	_MISC_REGISTERS_RESET_REG_2_XMAC,4,2 ; @MISC_REGISTERS_RESET_REG_2_XMAC
	.comm	_XMAC_REG_CTRL,8,3              ; @XMAC_REG_CTRL
	.comm	_XMAC_CTRL_REG_SOFT_RESET,4,2   ; @XMAC_CTRL_REG_SOFT_RESET
.subsections_via_symbols
