	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_twl6040_set_pll                ## -- Begin function twl6040_set_pll
	.p2align	4, 0x90
_twl6040_set_pll:                       ## @twl6040_set_pll
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r15d
	movl	%edx, %r13d
	movl	%esi, %r12d
	movq	%rdi, %rbx
	leaq	12(%rdi), %r14
	movq	%r14, %rdi
	callq	_mutex_lock
	movq	_TWL6040_REG_HPPLLCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_twl6040_reg_read
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movq	_TWL6040_REG_LPPLLCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_twl6040_reg_read
	movl	%eax, %edx
	movl	(%rbx), %eax
	cmpl	%r12d, %eax
	je	LBB0_2
## %bb.1:
	movq	$0, 4(%rbx)
LBB0_2:
	cmpl	$129, %r12d
	je	LBB0_15
## %bb.3:
	cmpl	$128, %r12d
	jne	LBB0_33
## %bb.4:
	cmpl	%r15d, 4(%rbx)
	je	LBB0_12
## %bb.5:
	cmpl	$19200000, %r15d                ## imm = 0x124F800
	je	LBB0_10
## %bb.6:
	cmpl	$17640000, %r15d                ## imm = 0x10D2A40
	jne	LBB0_8
## %bb.7:
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movq	_TWL6040_LPLLFIN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, %edx
	jmp	LBB0_11
LBB0_15:
	cmpl	$19200000, %r15d                ## imm = 0x124F800
	jne	LBB0_8
## %bb.16:
	cmpl	%r13d, 8(%rbx)
	je	LBB0_30
## %bb.17:
	movq	_TWL6040_MCLK_MSK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	cmpl	$25999999, %r13d                ## imm = 0x18CBA7F
	jg	LBB0_22
## %bb.18:
	cmpl	$12000000, %r13d                ## imm = 0xB71B00
	je	LBB0_26
## %bb.19:
	cmpl	$19200000, %r13d                ## imm = 0x124F800
	jne	LBB0_25
## %bb.20:
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movl	%edx, %r14d
	movl	%r13d, -44(%rbp)                ## 4-byte Spill
	movq	_TWL6040_MCLK_19200KHZ@GOTPCREL(%rip), %rdx
	jmp	LBB0_21
LBB0_33:
	movl	16(%rbx), %edi
	leaq	L_.str.2(%rip), %rsi
	movl	%r12d, %edx
	jmp	LBB0_9
LBB0_8:
	movl	16(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	movl	%r15d, %edx
	jmp	LBB0_9
LBB0_10:
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movq	_TWL6040_LPLLFIN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %edx
LBB0_11:
	movq	_TWL6040_REG_LPPLLCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	%edx, %r14d
	callq	_twl6040_reg_write
	movl	%r14d, %edx
	movl	(%rbx), %eax
	movq	-56(%rbp), %r14                 ## 8-byte Reload
LBB0_12:
	cmpl	$128, %eax
	je	LBB0_30
## %bb.13:
	cmpl	$32768, %r13d                   ## imm = 0x8000
	jne	LBB0_25
## %bb.14:
	movq	_TWL6040_LPLLENA@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_TWL6040_REG_LPPLLCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movq	%r14, %r13
	movl	%edx, %r14d
	callq	_twl6040_reg_write
	movl	$5, %edi
	callq	_mdelay
	movq	_TWL6040_HPLLSEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	%r14d, %edx
	movq	%r13, %r14
	movq	_TWL6040_REG_LPPLLCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_twl6040_reg_write
	movq	_TWL6040_HPLLENA@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movl	-60(%rbp), %edx                 ## 4-byte Reload
	andl	%eax, %edx
	movq	_TWL6040_REG_HPPLLCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_twl6040_reg_write
	movl	20(%rbx), %edi
	callq	_clk_disable_unprepare
	jmp	LBB0_30
LBB0_22:
	cmpl	$26000000, %r13d                ## imm = 0x18CBA80
	je	LBB0_32
## %bb.23:
	cmpl	$38400000, %r13d                ## imm = 0x249F000
	jne	LBB0_25
## %bb.24:
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movl	%edx, %r14d
	movl	%r13d, -44(%rbp)                ## 4-byte Spill
	movq	_TWL6040_MCLK_38400KHZ@GOTPCREL(%rip), %rdx
LBB0_21:
	movq	_TWL6040_HPLLBP@GOTPCREL(%rip), %rsi
	movl	(%rsi), %r13d
	orl	(%rdx), %r13d
	movq	_TWL6040_HPLLENA@GOTPCREL(%rip), %rdx
	jmp	LBB0_27
LBB0_25:
	movl	16(%rbx), %edi
	leaq	L_.str.1(%rip), %rsi
	movl	%r13d, %edx
LBB0_9:
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_31
LBB0_26:
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movl	%edx, %r14d
	movl	%r13d, -44(%rbp)                ## 4-byte Spill
	movq	_TWL6040_HPLLENA@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r13d
	movq	_TWL6040_MCLK_12000KHZ@GOTPCREL(%rip), %rdx
	jmp	LBB0_27
LBB0_32:
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	movl	%edx, %r14d
	movl	%r13d, -44(%rbp)                ## 4-byte Spill
	movq	_TWL6040_HPLLENA@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r13d
	movq	_TWL6040_MCLK_26000KHZ@GOTPCREL(%rip), %rdx
LBB0_27:
	notl	%ecx
	movl	-60(%rbp), %esi                 ## 4-byte Reload
	andl	%ecx, %esi
	orl	(%rdx), %r13d
	orl	%esi, %r13d
	cmpl	$129, %eax
	je	LBB0_29
## %bb.28:
	movl	20(%rbx), %edi
	callq	_clk_prepare_enable
LBB0_29:
	movq	_TWL6040_HPLLSQRENA@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	movq	_TWL6040_REG_HPPLLCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	%r13d, %edx
	callq	_twl6040_reg_write
	movl	$500, %edi                      ## imm = 0x1F4
	movl	$700, %esi                      ## imm = 0x2BC
	callq	_usleep_range
	movq	_TWL6040_HPLLSEL@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	orl	%r14d, %r13d
	movq	_TWL6040_REG_LPPLLCTL@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	%r13d, %edx
	callq	_twl6040_reg_write
	movq	_TWL6040_LPLLENA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	%r13d, %edx
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_twl6040_reg_write
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	movl	%eax, 8(%rbx)
	movq	-56(%rbp), %r14                 ## 8-byte Reload
LBB0_30:
	movl	%r15d, 4(%rbx)
	movl	%r12d, (%rbx)
	xorl	%ebx, %ebx
LBB0_31:
	movq	%r14, %rdi
	callq	_mutex_unlock
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_TWL6040_REG_HPPLLCTL,4,2       ## @TWL6040_REG_HPPLLCTL
	.comm	_TWL6040_REG_LPPLLCTL,4,2       ## @TWL6040_REG_LPPLLCTL
	.comm	_TWL6040_LPLLFIN,4,2            ## @TWL6040_LPLLFIN
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"freq_out %d not supported\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_TWL6040_LPLLENA,4,2            ## @TWL6040_LPLLENA
	.comm	_TWL6040_HPLLSEL,4,2            ## @TWL6040_HPLLSEL
	.comm	_TWL6040_HPLLENA,4,2            ## @TWL6040_HPLLENA
L_.str.1:                               ## @.str.1
	.asciz	"freq_in %d not supported\n"

	.comm	_TWL6040_MCLK_MSK,4,2           ## @TWL6040_MCLK_MSK
	.comm	_TWL6040_MCLK_12000KHZ,4,2      ## @TWL6040_MCLK_12000KHZ
	.comm	_TWL6040_MCLK_19200KHZ,4,2      ## @TWL6040_MCLK_19200KHZ
	.comm	_TWL6040_HPLLBP,4,2             ## @TWL6040_HPLLBP
	.comm	_TWL6040_MCLK_26000KHZ,4,2      ## @TWL6040_MCLK_26000KHZ
	.comm	_TWL6040_MCLK_38400KHZ,4,2      ## @TWL6040_MCLK_38400KHZ
	.comm	_TWL6040_HPLLSQRENA,4,2         ## @TWL6040_HPLLSQRENA
L_.str.2:                               ## @.str.2
	.asciz	"unknown pll id %d\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_twl6040_set_pll                ; -- Begin function twl6040_set_pll
	.p2align	2
_twl6040_set_pll:                       ; @twl6040_set_pll
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x3
	mov	x23, x2
	mov	x21, x1
	mov	x22, x0
	add	x19, x0, #12
	mov	x0, x19
	bl	_mutex_lock
Lloh0:
	adrp	x27, _TWL6040_REG_HPPLLCTL@GOTPAGE
Lloh1:
	ldr	x27, [x27, _TWL6040_REG_HPPLLCTL@GOTPAGEOFF]
	ldr	w1, [x27]
	mov	x0, x22
	bl	_twl6040_reg_read
	mov	x24, x0
Lloh2:
	adrp	x26, _TWL6040_REG_LPPLLCTL@GOTPAGE
Lloh3:
	ldr	x26, [x26, _TWL6040_REG_LPPLLCTL@GOTPAGEOFF]
	ldr	w1, [x26]
	mov	x0, x22
	bl	_twl6040_reg_read
	mov	x25, x0
	ldr	w8, [x22]
	cmp	w8, w21
	b.eq	LBB0_2
; %bb.1:
	stp	wzr, wzr, [x22, #4]
LBB0_2:
	cmp	w21, #129
	b.eq	LBB0_8
; %bb.3:
	cmp	w21, #128
	b.ne	LBB0_14
; %bb.4:
	ldr	w9, [x22, #4]
	cmp	w9, w20
	b.eq	LBB0_18
; %bb.5:
	mov	w8, #63488
	movk	w8, #292, lsl #16
	cmp	w20, w8
	b.eq	LBB0_16
; %bb.6:
	mov	w8, #10816
	movk	w8, #269, lsl #16
	cmp	w20, w8
	b.ne	LBB0_15
; %bb.7:
Lloh4:
	adrp	x8, _TWL6040_LPLLFIN@GOTPAGE
Lloh5:
	ldr	x8, [x8, _TWL6040_LPLLFIN@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	orr	w25, w8, w25
	b	LBB0_17
LBB0_8:
	mov	w9, #63488
	movk	w9, #292, lsl #16
	cmp	w20, w9
	b.ne	LBB0_15
; %bb.9:
	ldr	w9, [x22, #8]
	cmp	w9, w23
	b.eq	LBB0_32
; %bb.10:
Lloh7:
	adrp	x9, _TWL6040_MCLK_MSK@GOTPAGE
Lloh8:
	ldr	x9, [x9, _TWL6040_MCLK_MSK@GOTPAGEOFF]
Lloh9:
	ldr	w9, [x9]
	mov	w10, #47743
	movk	w10, #396, lsl #16
	cmp	w23, w10
	b.gt	LBB0_21
; %bb.11:
	mov	w10, #6912
	movk	w10, #183, lsl #16
	cmp	w23, w10
	b.eq	LBB0_27
; %bb.12:
	mov	w10, #63488
	movk	w10, #292, lsl #16
	cmp	w23, w10
	b.ne	LBB0_25
; %bb.13:
Lloh10:
	adrp	x10, _TWL6040_MCLK_19200KHZ@GOTPAGE
Lloh11:
	ldr	x10, [x10, _TWL6040_MCLK_19200KHZ@GOTPAGEOFF]
	b	LBB0_24
LBB0_14:
	ldr	w0, [x22, #16]
Lloh12:
	adrp	x1, l_.str.2@PAGE
Lloh13:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x2, x21
	b	LBB0_26
LBB0_15:
	ldr	w0, [x22, #16]
Lloh14:
	adrp	x1, l_.str@PAGE
Lloh15:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x20
	b	LBB0_26
LBB0_16:
Lloh16:
	adrp	x8, _TWL6040_LPLLFIN@GOTPAGE
Lloh17:
	ldr	x8, [x8, _TWL6040_LPLLFIN@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	bic	w25, w25, w8
LBB0_17:
	ldr	w1, [x26]
	mov	x0, x22
	mov	x2, x25
	bl	_twl6040_reg_write
	ldr	w8, [x22]
LBB0_18:
	cmp	w8, #128
	b.eq	LBB0_32
; %bb.19:
	cmp	w23, #8, lsl #12                ; =32768
	b.ne	LBB0_25
; %bb.20:
Lloh19:
	adrp	x8, _TWL6040_LPLLENA@GOTPAGE
Lloh20:
	ldr	x8, [x8, _TWL6040_LPLLENA@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	orr	w23, w8, w25
	ldr	w1, [x26]
	mov	x0, x22
	mov	x2, x23
	bl	_twl6040_reg_write
	mov	w0, #5
	bl	_mdelay
Lloh22:
	adrp	x8, _TWL6040_HPLLSEL@GOTPAGE
Lloh23:
	ldr	x8, [x8, _TWL6040_HPLLSEL@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
	bic	w2, w23, w8
	ldr	w1, [x26]
	mov	x0, x22
	bl	_twl6040_reg_write
Lloh25:
	adrp	x8, _TWL6040_HPLLENA@GOTPAGE
Lloh26:
	ldr	x8, [x8, _TWL6040_HPLLENA@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	bic	w2, w24, w8
	ldr	w1, [x27]
	mov	x0, x22
	bl	_twl6040_reg_write
	ldr	w0, [x22, #20]
	bl	_clk_disable_unprepare
	b	LBB0_32
LBB0_21:
	mov	w10, #47744
	movk	w10, #396, lsl #16
	cmp	w23, w10
	b.eq	LBB0_28
; %bb.22:
	mov	w10, #61440
	movk	w10, #585, lsl #16
	cmp	w23, w10
	b.ne	LBB0_25
; %bb.23:
Lloh28:
	adrp	x10, _TWL6040_MCLK_38400KHZ@GOTPAGE
Lloh29:
	ldr	x10, [x10, _TWL6040_MCLK_38400KHZ@GOTPAGEOFF]
LBB0_24:
	ldr	w10, [x10]
Lloh30:
	adrp	x11, _TWL6040_HPLLBP@GOTPAGE
Lloh31:
	ldr	x11, [x11, _TWL6040_HPLLBP@GOTPAGEOFF]
Lloh32:
	ldr	w11, [x11]
	orr	w10, w11, w10
Lloh33:
	adrp	x11, _TWL6040_HPLLENA@GOTPAGE
Lloh34:
	ldr	x11, [x11, _TWL6040_HPLLENA@GOTPAGEOFF]
	b	LBB0_29
LBB0_25:
	ldr	w0, [x22, #16]
Lloh35:
	adrp	x1, l_.str.1@PAGE
Lloh36:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x2, x23
LBB0_26:
	bl	_dev_err
Lloh37:
	adrp	x8, _EINVAL@GOTPAGE
Lloh38:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	neg	w23, w8
	b	LBB0_33
LBB0_27:
Lloh40:
	adrp	x10, _TWL6040_HPLLENA@GOTPAGE
Lloh41:
	ldr	x10, [x10, _TWL6040_HPLLENA@GOTPAGEOFF]
Lloh42:
	ldr	w10, [x10]
Lloh43:
	adrp	x11, _TWL6040_MCLK_12000KHZ@GOTPAGE
Lloh44:
	ldr	x11, [x11, _TWL6040_MCLK_12000KHZ@GOTPAGEOFF]
	b	LBB0_29
LBB0_28:
Lloh45:
	adrp	x10, _TWL6040_HPLLENA@GOTPAGE
Lloh46:
	ldr	x10, [x10, _TWL6040_HPLLENA@GOTPAGEOFF]
Lloh47:
	ldr	w10, [x10]
Lloh48:
	adrp	x11, _TWL6040_MCLK_26000KHZ@GOTPAGE
Lloh49:
	ldr	x11, [x11, _TWL6040_MCLK_26000KHZ@GOTPAGEOFF]
LBB0_29:
	bic	w9, w24, w9
	ldr	w11, [x11]
	orr	w10, w10, w11
	orr	w24, w10, w9
	cmp	w8, #129
	b.eq	LBB0_31
; %bb.30:
	ldr	w0, [x22, #20]
	bl	_clk_prepare_enable
LBB0_31:
Lloh50:
	adrp	x8, _TWL6040_HPLLSQRENA@GOTPAGE
Lloh51:
	ldr	x8, [x8, _TWL6040_HPLLSQRENA@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	orr	w2, w24, w8
	ldr	w1, [x27]
	mov	x0, x22
	bl	_twl6040_reg_write
	mov	w0, #500
	mov	w1, #700
	bl	_usleep_range
Lloh53:
	adrp	x8, _TWL6040_HPLLSEL@GOTPAGE
Lloh54:
	ldr	x8, [x8, _TWL6040_HPLLSEL@GOTPAGEOFF]
Lloh55:
	ldr	w8, [x8]
	orr	w24, w8, w25
	ldr	w1, [x26]
	mov	x0, x22
	mov	x2, x24
	bl	_twl6040_reg_write
Lloh56:
	adrp	x8, _TWL6040_LPLLENA@GOTPAGE
Lloh57:
	ldr	x8, [x8, _TWL6040_LPLLENA@GOTPAGEOFF]
Lloh58:
	ldr	w8, [x8]
	bic	w2, w24, w8
	ldr	w1, [x26]
	mov	x0, x22
	bl	_twl6040_reg_write
	str	w23, [x22, #8]
LBB0_32:
	mov	w23, #0
	stp	w21, w20, [x22]
LBB0_33:
	mov	x0, x19
	bl	_mutex_unlock
	mov	x0, x23
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.cfi_endproc
                                        ; -- End function
	.comm	_TWL6040_REG_HPPLLCTL,4,2       ; @TWL6040_REG_HPPLLCTL
	.comm	_TWL6040_REG_LPPLLCTL,4,2       ; @TWL6040_REG_LPPLLCTL
	.comm	_TWL6040_LPLLFIN,4,2            ; @TWL6040_LPLLFIN
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"freq_out %d not supported\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_TWL6040_LPLLENA,4,2            ; @TWL6040_LPLLENA
	.comm	_TWL6040_HPLLSEL,4,2            ; @TWL6040_HPLLSEL
	.comm	_TWL6040_HPLLENA,4,2            ; @TWL6040_HPLLENA
l_.str.1:                               ; @.str.1
	.asciz	"freq_in %d not supported\n"

	.comm	_TWL6040_MCLK_MSK,4,2           ; @TWL6040_MCLK_MSK
	.comm	_TWL6040_MCLK_12000KHZ,4,2      ; @TWL6040_MCLK_12000KHZ
	.comm	_TWL6040_MCLK_19200KHZ,4,2      ; @TWL6040_MCLK_19200KHZ
	.comm	_TWL6040_HPLLBP,4,2             ; @TWL6040_HPLLBP
	.comm	_TWL6040_MCLK_26000KHZ,4,2      ; @TWL6040_MCLK_26000KHZ
	.comm	_TWL6040_MCLK_38400KHZ,4,2      ; @TWL6040_MCLK_38400KHZ
	.comm	_TWL6040_HPLLSQRENA,4,2         ; @TWL6040_HPLLSQRENA
l_.str.2:                               ; @.str.2
	.asciz	"unknown pll id %d\n"

.subsections_via_symbols
