	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function __bnxt_hwrm_reserve_pf_rings
___bnxt_hwrm_reserve_pf_rings:          ## @__bnxt_hwrm_reserve_pf_rings
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, -48(%rbp)                 ## 4-byte Spill
	movl	%r8d, -44(%rbp)                 ## 4-byte Spill
	movl	%ecx, %r14d
	movl	%edx, %r13d
	movq	%rsi, %rbx
	movq	%rdi, %r12
	movq	_HWRM_FUNC_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movl	$-1, %ecx
	movl	$-1, %r8d
	callq	_bnxt_hwrm_cmd_hdr_init
	movl	$65535, %edi                    ## imm = 0xFFFF
	callq	_cpu_to_le16
	movq	%rax, 72(%rbx)
	movl	%r13d, %r15d
	testl	%r13d, %r13d
	je	LBB0_2
## %bb.1:
	movq	_FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
LBB0_2:
	movl	%r13d, %edi
	callq	_cpu_to_le16
	movq	%rax, 64(%rbx)
	movq	%r12, %rdi
	callq	_BNXT_NEW_RM
	testq	%rax, %rax
	je	LBB0_27
## %bb.3:
	movl	16(%rbp), %edx
	movl	%r14d, %edi
	movl	%r14d, %eax
	testl	%r14d, %r14d
	je	LBB0_5
## %bb.4:
	movq	_FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_5:
	orl	%r15d, %eax
	movl	%edx, %ecx
	testl	%edx, %edx
	je	LBB0_7
## %bb.6:
	movq	_FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_7:
	orl	%ecx, %eax
	movl	24(%rbp), %esi
	movq	_BNXT_FLAG_CHIP_P5@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%ecx, (%r12)
	je	LBB0_15
## %bb.8:
	movl	-48(%rbp), %ecx                 ## 4-byte Reload
	movl	%ecx, %r14d
	testl	%ecx, %ecx
	je	LBB0_10
## %bb.9:
	movq	_FUNC_CFG_REQ_ENABLES_NUM_MSIX@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
LBB0_10:
	xorl	%ecx, %ecx
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	addl	%r13d, %edx
	je	LBB0_12
## %bb.11:
	movq	_FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_12:
	orl	%eax, %r14d
	movl	%edi, %eax
	testl	%edi, %edi
	je	LBB0_14
## %bb.13:
	movq	_FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_14:
	orl	%eax, %ecx
	jmp	LBB0_18
LBB0_15:
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	movl	%edx, %ecx
	testl	%edx, %edx
	je	LBB0_17
## %bb.16:
	movq	_FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_17:
	orl	%eax, %ecx
	movq	_FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS@GOTPCREL(%rip), %rax
	movq	_FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r14d
	orl	(%rax), %r14d
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	testl	%eax, %eax
	cmovel	%eax, %r14d
LBB0_18:
	orl	%ecx, %r14d
	movl	%esi, %r15d
	testl	%esi, %esi
	je	LBB0_20
## %bb.19:
	movq	_FUNC_CFG_REQ_ENABLES_NUM_VNICS@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
LBB0_20:
	callq	_cpu_to_le16
	movq	%rax, 56(%rbx)
	movq	_BNXT_FLAG_CHIP_P5@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	je	LBB0_22
## %bb.21:
	movl	-44(%rbp), %r12d                ## 4-byte Reload
	addl	%r12d, %r13d
	movl	%r13d, %edi
	callq	_cpu_to_le16
	movq	%rax, 40(%rbx)
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_le16
	movq	%rax, 48(%rbx)
	movl	%r12d, %edi
	movl	$64, %esi
	callq	_DIV_ROUND_UP
	movl	%eax, %edi
LBB0_25:
	callq	_cpu_to_le16
	movq	%rax, 24(%rbx)
	jmp	LBB0_26
LBB0_22:
	movl	-48(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_le16
	movq	%rax, 40(%rbx)
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_cpu_to_le16
	movq	%rax, 32(%rbx)
	movl	$1, %edi
	callq	_cpu_to_le16
	movq	%rax, 24(%rbx)
	movq	_BNXT_FLAG_NEW_RSS_CAP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r12)
	je	LBB0_23
LBB0_26:
	orl	%r14d, %r15d
	movl	16(%rbp), %edi
	callq	_cpu_to_le16
	movq	%rax, 16(%rbx)
	movl	24(%rbp), %edi
	callq	_cpu_to_le16
	movq	%rax, 8(%rbx)
LBB0_27:
	movl	%r15d, %edi
	callq	_cpu_to_le32
	movl	%eax, (%rbx)
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_23:
	movq	%r12, %rdi
	callq	_bnxt_rfs_supported
	testq	%rax, %rax
	je	LBB0_26
## %bb.24:
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	incl	%edi
	jmp	LBB0_25
	.cfi_endproc
                                        ## -- End function
	.comm	_HWRM_FUNC_CFG,4,2              ## @HWRM_FUNC_CFG
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS,4,2 ## @FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS,4,2 ## @FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS,4,2 ## @FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS
	.comm	_BNXT_FLAG_CHIP_P5,4,2          ## @BNXT_FLAG_CHIP_P5
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_MSIX,4,2 ## @FUNC_CFG_REQ_ENABLES_NUM_MSIX
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS,4,2 ## @FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS,4,2 ## @FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS,4,2 ## @FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_VNICS,4,2 ## @FUNC_CFG_REQ_ENABLES_NUM_VNICS
	.comm	_BNXT_FLAG_NEW_RSS_CAP,4,2      ## @BNXT_FLAG_NEW_RSS_CAP
	.no_dead_strip	___bnxt_hwrm_reserve_pf_rings
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function __bnxt_hwrm_reserve_pf_rings
___bnxt_hwrm_reserve_pf_rings:          ; @__bnxt_hwrm_reserve_pf_rings
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x7
	mov	x21, x6
	mov	x24, x5
	mov	x22, x4
	mov	x27, x3
	mov	x26, x2
	mov	x19, x1
	mov	x23, x0
Lloh0:
	adrp	x8, _HWRM_FUNC_CFG@GOTPAGE
Lloh1:
	ldr	x8, [x8, _HWRM_FUNC_CFG@GOTPAGEOFF]
Lloh2:
	ldr	w2, [x8]
	mov	w3, #-1
	mov	w4, #-1
	bl	_bnxt_hwrm_cmd_hdr_init
	mov	w0, #65535
	bl	_cpu_to_le16
	str	x0, [x19, #72]
Lloh3:
	adrp	x8, _FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w26, #0
	csel	w25, wzr, w8, eq
	mov	x0, x26
	bl	_cpu_to_le16
	str	x0, [x19, #64]
	mov	x0, x23
	bl	_BNXT_NEW_RM
	cbz	x0, LBB0_9
; %bb.1:
Lloh6:
	adrp	x8, _FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS@GOTPAGE
Lloh7:
	ldr	x8, [x8, _FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	cmp	w27, #0
	csel	w8, wzr, w8, eq
	orr	w8, w8, w25
Lloh9:
	adrp	x9, _FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS@GOTPAGE
Lloh10:
	ldr	x9, [x9, _FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	cmp	w21, #0
	csel	w9, wzr, w9, eq
	orr	w8, w8, w9
	ldr	w9, [x23]
Lloh12:
	adrp	x28, _BNXT_FLAG_CHIP_P5@GOTPAGE
Lloh13:
	ldr	x28, [x28, _BNXT_FLAG_CHIP_P5@GOTPAGEOFF]
	ldr	w10, [x28]
	tst	w10, w9
	b.eq	LBB0_3
; %bb.2:
Lloh14:
	adrp	x9, _FUNC_CFG_REQ_ENABLES_NUM_MSIX@GOTPAGE
Lloh15:
	ldr	x9, [x9, _FUNC_CFG_REQ_ENABLES_NUM_MSIX@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	cmp	w24, #0
	csel	w9, wzr, w9, eq
	orr	w8, w9, w8
Lloh17:
	adrp	x9, _FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS@GOTPAGE
Lloh18:
	ldr	x9, [x9, _FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	cmn	w22, w26
	csel	w9, wzr, w9, eq
	orr	w8, w8, w9
Lloh20:
	adrp	x9, _FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS@GOTPAGE
Lloh21:
	ldr	x9, [x9, _FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	cmp	w27, #0
	b	LBB0_4
LBB0_3:
Lloh23:
	adrp	x9, _FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS@GOTPAGE
Lloh24:
	ldr	x9, [x9, _FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	cmp	w24, #0
	csel	w9, wzr, w9, eq
	orr	w8, w9, w8
Lloh26:
	adrp	x9, _FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS@GOTPAGE
Lloh27:
	ldr	x9, [x9, _FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS@GOTPAGEOFF]
Lloh28:
	adrp	x10, _FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS@GOTPAGE
Lloh29:
	ldr	x10, [x10, _FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
Lloh31:
	ldr	w10, [x10]
	orr	w9, w10, w9
	cmp	w22, #0
LBB0_4:
	csel	w9, wzr, w9, eq
	orr	w8, w8, w9
Lloh32:
	adrp	x9, _FUNC_CFG_REQ_ENABLES_NUM_VNICS@GOTPAGE
Lloh33:
	ldr	x9, [x9, _FUNC_CFG_REQ_ENABLES_NUM_VNICS@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	cmp	w20, #0
	csel	w9, wzr, w9, eq
	orr	w25, w9, w8
	mov	x0, x27
	bl	_cpu_to_le16
	str	x0, [x19, #56]
	ldr	w8, [x23]
	ldr	w9, [x28]
	tst	w9, w8
	b.eq	LBB0_7
; %bb.5:
	add	w0, w22, w26
	bl	_cpu_to_le16
	str	x0, [x19, #40]
	mov	x0, x24
	bl	_cpu_to_le16
	str	x0, [x19, #48]
	mov	x0, x22
	mov	w1, #64
	bl	_DIV_ROUND_UP
LBB0_6:
	bl	_cpu_to_le16
	str	x0, [x19, #24]
	b	LBB0_8
LBB0_7:
	mov	x0, x24
	bl	_cpu_to_le16
	str	x0, [x19, #40]
	mov	x0, x22
	bl	_cpu_to_le16
	str	x0, [x19, #32]
	mov	w0, #1
	bl	_cpu_to_le16
	str	x0, [x19, #24]
	ldr	w8, [x23]
Lloh35:
	adrp	x9, _BNXT_FLAG_NEW_RSS_CAP@GOTPAGE
Lloh36:
	ldr	x9, [x9, _BNXT_FLAG_NEW_RSS_CAP@GOTPAGEOFF]
Lloh37:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_10
LBB0_8:
	mov	x0, x21
	bl	_cpu_to_le16
	str	x0, [x19, #16]
	mov	x0, x20
	bl	_cpu_to_le16
	str	x0, [x19, #8]
LBB0_9:
	mov	x0, x25
	bl	_cpu_to_le32
	str	w0, [x19]
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	ret
LBB0_10:
	mov	x0, x23
	bl	_bnxt_rfs_supported
	cbz	x0, LBB0_8
; %bb.11:
	add	w0, w22, #1
	b	LBB0_6
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh30
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.cfi_endproc
                                        ; -- End function
	.comm	_HWRM_FUNC_CFG,4,2              ; @HWRM_FUNC_CFG
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS,4,2 ; @FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS,4,2 ; @FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS,4,2 ; @FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS
	.comm	_BNXT_FLAG_CHIP_P5,4,2          ; @BNXT_FLAG_CHIP_P5
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_MSIX,4,2 ; @FUNC_CFG_REQ_ENABLES_NUM_MSIX
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS,4,2 ; @FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS,4,2 ; @FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS,4,2 ; @FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS
	.comm	_FUNC_CFG_REQ_ENABLES_NUM_VNICS,4,2 ; @FUNC_CFG_REQ_ENABLES_NUM_VNICS
	.comm	_BNXT_FLAG_NEW_RSS_CAP,4,2      ; @BNXT_FLAG_NEW_RSS_CAP
	.no_dead_strip	___bnxt_hwrm_reserve_pf_rings
.subsections_via_symbols
