	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ConfigureMPEGOutput
_ConfigureMPEGOutput:                   ## @ConfigureMPEGOutput
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	_OM_DVBT_Diversity_Front@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_2
## %bb.1:
	xorl	%r14d, %r14d
	testl	%r15d, %r15d
	movq	_B_EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR@GOTPCREL(%rip), %rax
	cmovnel	(%rax), %r15d
	movq	_EC_OC_REG_OC_MPG_SIO__M@GOTPCREL(%rip), %rax
	cmovel	(%rax), %r14d
	movq	_EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	jmp	LBB0_10
LBB0_2:
	xorl	%r14d, %r14d
	testl	%r15d, %r15d
	jne	LBB0_4
## %bb.3:
	movq	_EC_OC_REG_OC_MPG_SIO__M@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
LBB0_4:
	movl	8(%rbx), %r12d
	cmpq	$0, 24(%rbx)
	je	LBB0_6
## %bb.5:
	movq	_EC_OC_REG_OC_MODE_LOP_PAR_ENA__M@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r12d
	movq	_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_6:
	movq	_EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
	movq	_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE@GOTPCREL(%rip), %rax
LBB0_7:
	movl	(%rax), %r15d
	cmpq	$0, 16(%rbx)
	je	LBB0_9
## %bb.8:
	movq	_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r12d
	jmp	LBB0_10
LBB0_9:
	movq	_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL@GOTPCREL(%rip), %rax
	orl	(%rax), %r12d
LBB0_10:
	movq	_EC_OC_REG_IPR_INV_MPG__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_13
## %bb.11:
	movq	_EC_OC_REG_OC_MODE_LOP__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	%r12d, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_13
## %bb.12:
	movq	_EC_OC_REG_OC_MODE_HIP__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	%r15d, %edx
	xorl	%ecx, %ecx
	callq	_Write16
	testl	%eax, %eax
	js	LBB0_13
## %bb.14:
	movq	_EC_OC_REG_OC_MPG_SIO__A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	xorl	%ecx, %ecx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_Write16                        ## TAILCALL
LBB0_13:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_OM_DVBT_Diversity_Front,8,3    ## @OM_DVBT_Diversity_Front
	.comm	_B_EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR,4,2 ## @B_EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR
	.comm	_EC_OC_REG_OC_MPG_SIO__M,4,2    ## @EC_OC_REG_OC_MPG_SIO__M
	.comm	_EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE,4,2 ## @EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE
	.comm	_EC_OC_REG_OC_MODE_LOP_PAR_ENA__M,4,2 ## @EC_OC_REG_OC_MODE_LOP_PAR_ENA__M
	.comm	_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M,4,2 ## @EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M
	.comm	_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE,4,2 ## @EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE
	.comm	_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE,4,2 ## @EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE
	.comm	_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M,4,2 ## @EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M
	.comm	_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL,4,2 ## @EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL
	.comm	_EC_OC_REG_IPR_INV_MPG__A,4,2   ## @EC_OC_REG_IPR_INV_MPG__A
	.comm	_EC_OC_REG_OC_MODE_LOP__A,4,2   ## @EC_OC_REG_OC_MODE_LOP__A
	.comm	_EC_OC_REG_OC_MODE_HIP__A,4,2   ## @EC_OC_REG_OC_MODE_HIP__A
	.comm	_EC_OC_REG_OC_MPG_SIO__A,4,2    ## @EC_OC_REG_OC_MPG_SIO__A
	.no_dead_strip	_ConfigureMPEGOutput
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ConfigureMPEGOutput
_ConfigureMPEGOutput:                   ; @ConfigureMPEGOutput
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _OM_DVBT_Diversity_Front@GOTPAGE
Lloh1:
	ldr	x9, [x9, _OM_DVBT_Diversity_Front@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
Lloh3:
	adrp	x8, _B_EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR@GOTPAGE
Lloh4:
	ldr	x8, [x8, _B_EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _EC_OC_REG_OC_MPG_SIO__M@GOTPAGE
Lloh7:
	ldr	x9, [x9, _EC_OC_REG_OC_MPG_SIO__M@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	cmp	w1, #0
	csel	w21, wzr, w8, eq
	csel	w20, w9, wzr, eq
Lloh9:
	adrp	x8, _EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE@GOTPAGE
Lloh10:
	ldr	x8, [x8, _EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE@GOTPAGEOFF]
Lloh11:
	ldr	w22, [x8]
	b	LBB0_8
LBB0_2:
	ldr	w8, [x19, #8]
Lloh12:
	adrp	x9, _EC_OC_REG_OC_MPG_SIO__M@GOTPAGE
Lloh13:
	ldr	x9, [x9, _EC_OC_REG_OC_MPG_SIO__M@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	cmp	w1, #0
	csel	w20, w9, wzr, eq
	ldr	x9, [x19, #24]
	cbz	x9, LBB0_4
; %bb.3:
Lloh15:
	adrp	x9, _EC_OC_REG_OC_MODE_LOP_PAR_ENA__M@GOTPAGE
Lloh16:
	ldr	x9, [x9, _EC_OC_REG_OC_MODE_LOP_PAR_ENA__M@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	bic	w8, w8, w9
Lloh18:
	adrp	x9, _EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE@GOTPAGE
Lloh19:
	ldr	x9, [x9, _EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE@GOTPAGEOFF]
	b	LBB0_5
LBB0_4:
Lloh20:
	adrp	x9, _EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE@GOTPAGE
Lloh21:
	ldr	x9, [x9, _EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh23:
	adrp	x9, _EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE@GOTPAGE
Lloh24:
	ldr	x9, [x9, _EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE@GOTPAGEOFF]
LBB0_5:
	ldr	w21, [x9]
	ldr	x9, [x19, #16]
	cbz	x9, LBB0_7
; %bb.6:
Lloh25:
	adrp	x9, _EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M@GOTPAGE
Lloh26:
	ldr	x9, [x9, _EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M@GOTPAGEOFF]
Lloh27:
	ldr	w9, [x9]
	bic	w22, w8, w9
	b	LBB0_8
LBB0_7:
Lloh28:
	adrp	x9, _EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL@GOTPAGE
Lloh29:
	ldr	x9, [x9, _EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	orr	w22, w9, w8
LBB0_8:
Lloh31:
	adrp	x8, _EC_OC_REG_IPR_INV_MPG__A@GOTPAGE
Lloh32:
	ldr	x8, [x8, _EC_OC_REG_IPR_INV_MPG__A@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_12
; %bb.9:
Lloh34:
	adrp	x8, _EC_OC_REG_OC_MODE_LOP__A@GOTPAGE
Lloh35:
	ldr	x8, [x8, _EC_OC_REG_OC_MODE_LOP__A@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x22
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_12
; %bb.10:
Lloh37:
	adrp	x8, _EC_OC_REG_OC_MODE_HIP__A@GOTPAGE
Lloh38:
	ldr	x8, [x8, _EC_OC_REG_OC_MODE_HIP__A@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	mov	w3, #0
	bl	_Write16
	tbnz	w0, #31, LBB0_12
; %bb.11:
Lloh40:
	adrp	x8, _EC_OC_REG_OC_MPG_SIO__A@GOTPAGE
Lloh41:
	ldr	x8, [x8, _EC_OC_REG_OC_MPG_SIO__A@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	mov	w3, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_Write16
LBB0_12:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.cfi_endproc
                                        ; -- End function
	.comm	_OM_DVBT_Diversity_Front,8,3    ; @OM_DVBT_Diversity_Front
	.comm	_B_EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR,4,2 ; @B_EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR
	.comm	_EC_OC_REG_OC_MPG_SIO__M,4,2    ; @EC_OC_REG_OC_MPG_SIO__M
	.comm	_EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE,4,2 ; @EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE
	.comm	_EC_OC_REG_OC_MODE_LOP_PAR_ENA__M,4,2 ; @EC_OC_REG_OC_MODE_LOP_PAR_ENA__M
	.comm	_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M,4,2 ; @EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M
	.comm	_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE,4,2 ; @EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE
	.comm	_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE,4,2 ; @EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE
	.comm	_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M,4,2 ; @EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M
	.comm	_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL,4,2 ; @EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL
	.comm	_EC_OC_REG_IPR_INV_MPG__A,4,2   ; @EC_OC_REG_IPR_INV_MPG__A
	.comm	_EC_OC_REG_OC_MODE_LOP__A,4,2   ; @EC_OC_REG_OC_MODE_LOP__A
	.comm	_EC_OC_REG_OC_MODE_HIP__A,4,2   ; @EC_OC_REG_OC_MODE_HIP__A
	.comm	_EC_OC_REG_OC_MPG_SIO__A,4,2    ; @EC_OC_REG_OC_MPG_SIO__A
	.no_dead_strip	_ConfigureMPEGOutput
.subsections_via_symbols
