	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_msic_probe
_intel_msic_probe:                      ## @intel_msic_probe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_dev_get_platdata
	testq	%rax, %rax
	je	LBB0_3
## %bb.1:
	movq	_INTEL_MSIC_ID0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-28(%rbp), %rsi
	callq	_intel_scu_ipc_ioread8
	testl	%eax, %eax
	je	LBB0_4
## %bb.2:
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_6
LBB0_3:
	leaq	L_.str(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_4:
	movq	_INTEL_MSIC_ID1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	leaq	-32(%rbp), %rsi
	callq	_intel_scu_ipc_ioread8
	testl	%eax, %eax
	je	LBB0_10
## %bb.5:
	leaq	L_.str.2(%rip), %rsi
LBB0_6:
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
LBB0_7:
	movq	_ENXIO@GOTPCREL(%rip), %rax
LBB0_8:
	subl	(%rax), %ebx
LBB0_9:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	movl	-28(%rbp), %edi
	callq	_MSIC_VENDOR
	movq	%rax, %rbx
	movl	-32(%rbp), %edi
	callq	_MSIC_VENDOR
	cmpq	%rax, %rbx
	jne	LBB0_14
## %bb.11:
	movq	_GFP_KERNEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	$24, %esi
	callq	_devm_kzalloc
	testq	%rax, %rax
	je	LBB0_15
## %bb.12:
	movq	%rax, %r15
	movl	-28(%rbp), %edi
	callq	_MSIC_VENDOR
	movq	%rax, (%r15)
	movl	-28(%rbp), %edi
	callq	_MSIC_VERSION
	movl	%eax, 8(%r15)
	movq	%r14, 16(%r15)
	movq	_IORESOURCE_MEM@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_platform_get_resource
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_devm_ioremap_resource
	movl	%eax, 12(%r15)
	movl	%eax, %edi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_16
## %bb.13:
	movl	12(%r15), %edi
	callq	_PTR_ERR
	movl	%eax, %ebx
	jmp	LBB0_9
LBB0_14:
	movl	-28(%rbp), %edx
	movl	-32(%rbp), %ecx
	leaq	L_.str.3(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_7
LBB0_15:
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	jmp	LBB0_8
LBB0_16:
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_platform_set_drvdata
	movq	%r15, %rdi
	callq	_intel_msic_init_devices
	testl	%eax, %eax
	je	LBB0_18
## %bb.17:
	movl	%eax, %ebx
	leaq	L_.str.4(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_9
LBB0_18:
	movl	8(%r15), %edi
	callq	_MSIC_MAJOR
	movl	%eax, %ebx
	movl	8(%r15), %edi
	callq	_MSIC_MINOR
	movq	(%r15), %r8
	leaq	L_.str.5(%rip), %rsi
	movq	%r14, %rdi
	movl	%ebx, %edx
	movl	%eax, %ecx
	callq	_dev_info
	xorl	%ebx, %ebx
	jmp	LBB0_9
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"no platform data passed\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_INTEL_MSIC_ID0,4,2             ## @INTEL_MSIC_ID0
L_.str.1:                               ## @.str.1
	.asciz	"failed to identify the MSIC chip (ID0)\n"

	.comm	_ENXIO,4,2                      ## @ENXIO
	.comm	_INTEL_MSIC_ID1,4,2             ## @INTEL_MSIC_ID1
L_.str.2:                               ## @.str.2
	.asciz	"failed to identify the MSIC chip (ID1)\n"

L_.str.3:                               ## @.str.3
	.asciz	"invalid vendor ID: %x, %x\n"

	.comm	_GFP_KERNEL,4,2                 ## @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_IORESOURCE_MEM,4,2             ## @IORESOURCE_MEM
L_.str.4:                               ## @.str.4
	.asciz	"failed to initialize MSIC devices\n"

L_.str.5:                               ## @.str.5
	.asciz	"Intel MSIC version %c%d (vendor %#x)\n"

	.no_dead_strip	_intel_msic_probe
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_msic_probe
_intel_msic_probe:                      ; @intel_msic_probe
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_dev_get_platdata
	cbz	x0, LBB0_3
; %bb.1:
Lloh0:
	adrp	x8, _INTEL_MSIC_ID0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _INTEL_MSIC_ID0@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	add	x1, sp, #28
	bl	_intel_scu_ipc_ioread8
	cbz	w0, LBB0_4
; %bb.2:
Lloh3:
	adrp	x1, l_.str.1@PAGE
Lloh4:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_11
LBB0_3:
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_dev_err
Lloh7:
	adrp	x8, _EINVAL@GOTPAGE
Lloh8:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_12
LBB0_4:
Lloh9:
	adrp	x8, _INTEL_MSIC_ID1@GOTPAGE
Lloh10:
	ldr	x8, [x8, _INTEL_MSIC_ID1@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	add	x1, sp, #24
	bl	_intel_scu_ipc_ioread8
	cbz	w0, LBB0_6
; %bb.5:
Lloh12:
	adrp	x1, l_.str.2@PAGE
Lloh13:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_11
LBB0_6:
	ldr	w0, [sp, #28]
	bl	_MSIC_VENDOR
	mov	x20, x0
	ldr	w0, [sp, #24]
	bl	_MSIC_VENDOR
	cmp	x20, x0
	b.ne	LBB0_10
; %bb.7:
Lloh14:
	adrp	x8, _GFP_KERNEL@GOTPAGE
Lloh15:
	ldr	x8, [x8, _GFP_KERNEL@GOTPAGEOFF]
Lloh16:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #24
	bl	_devm_kzalloc
	cbz	x0, LBB0_14
; %bb.8:
	mov	x20, x0
	ldr	w0, [sp, #28]
	bl	_MSIC_VENDOR
	str	x0, [x20]
	ldr	w0, [sp, #28]
	bl	_MSIC_VERSION
	str	w0, [x20, #8]
	str	x19, [x20, #16]
Lloh17:
	adrp	x8, _IORESOURCE_MEM@GOTPAGE
Lloh18:
	ldr	x8, [x8, _IORESOURCE_MEM@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #0
	bl	_platform_get_resource
	mov	x1, x0
	mov	x0, x19
	bl	_devm_ioremap_resource
	str	w0, [x20, #12]
	bl	_IS_ERR
	cbz	x0, LBB0_15
; %bb.9:
	ldr	w0, [x20, #12]
	bl	_PTR_ERR
	mov	x21, x0
	b	LBB0_13
LBB0_10:
	ldp	w9, w8, [sp, #24]
	stp	x8, x9, [sp]
Lloh20:
	adrp	x1, l_.str.3@PAGE
Lloh21:
	add	x1, x1, l_.str.3@PAGEOFF
LBB0_11:
	mov	x0, x19
	bl	_dev_err
Lloh22:
	adrp	x8, _ENXIO@GOTPAGE
Lloh23:
	ldr	x8, [x8, _ENXIO@GOTPAGEOFF]
LBB0_12:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_13:
	mov	x0, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
LBB0_14:
Lloh24:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh25:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
	b	LBB0_12
LBB0_15:
	mov	x0, x19
	mov	x1, x20
	bl	_platform_set_drvdata
	mov	x0, x20
	bl	_intel_msic_init_devices
	cbz	w0, LBB0_17
; %bb.16:
	mov	x21, x0
Lloh26:
	adrp	x1, l_.str.4@PAGE
Lloh27:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_dev_err
	b	LBB0_13
LBB0_17:
	ldr	w0, [x20, #8]
	bl	_MSIC_MAJOR
	mov	x21, x0
	ldr	w0, [x20, #8]
	bl	_MSIC_MINOR
	mov	x3, x0
	ldr	x4, [x20]
Lloh28:
	adrp	x1, l_.str.5@PAGE
Lloh29:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x19
	mov	x2, x21
	bl	_dev_info
	mov	w21, #0
	b	LBB0_13
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpAdd	Lloh28, Lloh29
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"no platform data passed\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_INTEL_MSIC_ID0,4,2             ; @INTEL_MSIC_ID0
l_.str.1:                               ; @.str.1
	.asciz	"failed to identify the MSIC chip (ID0)\n"

	.comm	_ENXIO,4,2                      ; @ENXIO
	.comm	_INTEL_MSIC_ID1,4,2             ; @INTEL_MSIC_ID1
l_.str.2:                               ; @.str.2
	.asciz	"failed to identify the MSIC chip (ID1)\n"

l_.str.3:                               ; @.str.3
	.asciz	"invalid vendor ID: %x, %x\n"

	.comm	_GFP_KERNEL,4,2                 ; @GFP_KERNEL
	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_IORESOURCE_MEM,4,2             ; @IORESOURCE_MEM
l_.str.4:                               ; @.str.4
	.asciz	"failed to initialize MSIC devices\n"

l_.str.5:                               ; @.str.5
	.asciz	"Intel MSIC version %c%d (vendor %#x)\n"

	.no_dead_strip	_intel_msic_probe
.subsections_via_symbols
