	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function stw481x_startup
_stw481x_startup:                       ## @stw481x_startup
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	movl	8(%rdi), %edi
	movq	_STW_CONF1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	callq	_regmap_read
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_1
LBB0_9:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movl	-44(%rbp), %r14d
	movq	_STW_CONF1_PDN_VAUX@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movq	_STW_CONF1_IT_WARN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movq	(%r12), %rdi
	movq	_STW_CONF1_V_MONITORING@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	%r14d, %eax
	leaq	L_.str.2(%rip), %rax
	leaq	L_.str.1(%rip), %rdx
	cmoveq	%rax, %rdx
	leaq	L_.str(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_info
	movq	(%r12), %rdi
	movq	_STW_CONF1_MMC_LS_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-44(%rbp), %eax
	leaq	L_.str.5(%rip), %rbx
	leaq	L_.str.4(%rip), %rdx
	cmoveq	%rbx, %rdx
	leaq	L_.str.3(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_info
	movq	_STW_CONF1_PDN_VMMC@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-44(%rbp), %eax
	movq	(%r12), %rdi
	leaq	L_.str.7(%rip), %rdx
	cmovneq	%rbx, %rdx
	leaq	L_.str.6(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_info
	movq	(%r12), %rdi
	leaq	L_.str.8(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_info
	movq	_STW_PC_VCORE_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_stw481x_get_pctl_reg
	movl	%eax, %r13d
	testl	%eax, %eax
	js	LBB0_2
## %bb.3:
	movl	%r15d, -52(%rbp)                ## 4-byte Spill
	movq	_STW_PC_VAUX_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_stw481x_get_pctl_reg
	movl	%eax, %r15d
	testl	%eax, %eax
	js	LBB0_4
## %bb.5:
	movq	_STW_PC_VPLL_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r12, %rdi
	callq	_stw481x_get_pctl_reg
	movl	%eax, %ebx
	testl	%eax, %eax
	js	LBB0_9
## %bb.6:
	andl	$15, %r13d
	movl	%r15d, %eax
	shrl	$4, %eax
	andl	$1, %eax
	shrl	$2, %r15d
	andl	$3, %r15d
	movl	%r14d, -48(%rbp)                ## 4-byte Spill
	movl	%ebx, %r14d
	shrl	%r14d
	andl	$2, %r14d
	orl	%eax, %r14d
	movq	(%r12), %rdi
	movl	%r13d, %eax
	leaq	_stw481x_startup.vcore_val(%rip), %rcx
	movslq	(%rcx,%rax,4), %rcx
	imulq	$1374389535, %rcx, %rdx         ## imm = 0x51EB851F
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$37, %rdx
	addl	%eax, %edx
	imull	$100, %edx, %eax
	subl	%eax, %ecx
	testb	$4, %bl
	leaq	L_.str.10(%rip), %rax
	leaq	L_.str.5(%rip), %r13
	movq	%r13, %r8
	cmoveq	%rax, %r8
	leaq	L_.str.9(%rip), %rsi
                                        ## kill: def $edx killed $edx killed $rdx
                                        ## kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	callq	_dev_info
	movq	(%r12), %rdi
	leaq	_stw481x_startup.vpll_val(%rip), %rax
	movslq	(%rax,%r14,4), %rcx
	movl	-48(%rbp), %r14d                ## 4-byte Reload
	imulq	$1374389535, %rcx, %rdx         ## imm = 0x51EB851F
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$37, %rdx
	addl	%eax, %edx
	imull	$100, %edx, %eax
	subl	%eax, %ecx
	testb	$16, %bl
	movq	%r13, %r8
	leaq	L_.str.10(%rip), %rbx
	cmoveq	%rbx, %r8
	leaq	L_.str.11(%rip), %rsi
                                        ## kill: def $edx killed $edx killed $rdx
                                        ## kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	callq	_dev_info
	leaq	_stw481x_startup.vaux_val(%rip), %rax
	movslq	(%rax,%r15,4), %rcx
	imulq	$1717986919, %rcx, %rdx         ## imm = 0x66666667
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$34, %rdx
	addl	%eax, %edx
	leal	(%rdx,%rdx), %eax
	leal	(%rax,%rax,4), %eax
	subl	%eax, %ecx
	testl	%r14d, -52(%rbp)                ## 4-byte Folded Reload
	movq	(%r12), %rdi
	cmoveq	%rbx, %r13
	leaq	L_.str.12(%rip), %rsi
                                        ## kill: def $edx killed $edx killed $rdx
                                        ## kill: def $ecx killed $ecx killed $rcx
	movq	%r13, %r8
	xorl	%eax, %eax
	callq	_dev_info
	movl	8(%r12), %edi
	movq	_STW_CONF2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	callq	_regmap_read
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_9
## %bb.7:
	testl	%r14d, -56(%rbp)                ## 4-byte Folded Reload
	movq	(%r12), %rdi
	leaq	L_.str.15(%rip), %rax
	leaq	L_.str.14(%rip), %rdx
	cmoveq	%rax, %rdx
	movq	_STW_CONF2_MASK_TWARN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-44(%rbp), %eax
	leaq	L_.str.17(%rip), %rcx
	leaq	L_.str.16(%rip), %rbx
	cmovneq	%rbx, %rcx
	leaq	L_.str.13(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_info
	movq	(%r12), %rdi
	movq	_STW_CONF2_VMMC_EXT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-44(%rbp), %eax
	leaq	L_.str.19(%rip), %rax
	leaq	L_.str.18(%rip), %rdx
	cmoveq	%rax, %rdx
	leaq	L_.str.6(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_info
	movq	_STW_CONF2_MASK_IT_WAKE_UP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-44(%rbp), %eax
	movq	(%r12), %rdi
	leaq	L_.str.21(%rip), %rdx
	cmovneq	%rbx, %rdx
	leaq	L_.str.20(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_info
	movq	_STW_CONF2_GPO1@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-44(%rbp), %eax
	movq	(%r12), %rdi
	leaq	L_.str.23(%rip), %rbx
	movq	%rbx, %rdx
	leaq	L_.str.4(%rip), %r14
	cmoveq	%r14, %rdx
	leaq	L_.str.22(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_info
	movq	(%r12), %rdi
	movq	_STW_CONF2_GPO2@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	-44(%rbp), %eax
	cmoveq	%r14, %rbx
	leaq	L_.str.24(%rip), %rsi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	_dev_info
	movl	8(%r12), %edi
	movq	_STW_VCORE_SLEEP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	callq	_regmap_read
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_9
## %bb.8:
	movl	-44(%rbp), %eax
	andl	$15, %eax
	movq	(%r12), %rdi
	leaq	_stw481x_startup.vcore_val(%rip), %rcx
	movslq	(%rcx,%rax,4), %rcx
	imulq	$1374389535, %rcx, %rdx         ## imm = 0x51EB851F
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$37, %rdx
	addl	%eax, %edx
	imull	$100, %edx, %eax
	subl	%eax, %ecx
	leaq	L_.str.25(%rip), %rsi
                                        ## kill: def $edx killed $edx killed $rdx
                                        ## kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	callq	_dev_info
	xorl	%ebx, %ebx
	jmp	LBB0_9
LBB0_2:
	movl	%r13d, %ebx
	jmp	LBB0_9
LBB0_4:
	movl	%r15d, %ebx
	jmp	LBB0_9
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	4                               ## @stw481x_startup.vcore_val
_stw481x_startup.vcore_val:
	.long	100                             ## 0x64
	.long	105                             ## 0x69
	.long	110                             ## 0x6e
	.long	115                             ## 0x73
	.long	120                             ## 0x78
	.long	122                             ## 0x7a
	.long	124                             ## 0x7c
	.long	126                             ## 0x7e
	.long	128                             ## 0x80
	.long	130                             ## 0x82
	.long	132                             ## 0x84
	.long	134                             ## 0x86
	.long	136                             ## 0x88
	.long	138                             ## 0x8a
	.long	140                             ## 0x8c
	.long	145                             ## 0x91

	.p2align	4                               ## @stw481x_startup.vpll_val
_stw481x_startup.vpll_val:
	.long	105                             ## 0x69
	.long	120                             ## 0x78
	.long	130                             ## 0x82
	.long	180                             ## 0xb4

	.p2align	4                               ## @stw481x_startup.vaux_val
_stw481x_startup.vaux_val:
	.long	15                              ## 0xf
	.long	18                              ## 0x12
	.long	25                              ## 0x19
	.long	28                              ## 0x1c

	.comm	_STW_CONF1,4,2                  ## @STW_CONF1
	.comm	_STW_CONF1_PDN_VAUX,4,2         ## @STW_CONF1_PDN_VAUX
	.comm	_STW_CONF1_IT_WARN,4,2          ## @STW_CONF1_IT_WARN
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"voltages %s\n"

	.comm	_STW_CONF1_V_MONITORING,4,2     ## @STW_CONF1_V_MONITORING
L_.str.1:                               ## @.str.1
	.asciz	"OK"

L_.str.2:                               ## @.str.2
	.asciz	"LOW"

L_.str.3:                               ## @.str.3
	.asciz	"MMC level shifter %s\n"

	.comm	_STW_CONF1_MMC_LS_STATUS,4,2    ## @STW_CONF1_MMC_LS_STATUS
L_.str.4:                               ## @.str.4
	.asciz	"high impedance"

L_.str.5:                               ## @.str.5
	.asciz	"ON"

L_.str.6:                               ## @.str.6
	.asciz	"VMMC: %s\n"

	.comm	_STW_CONF1_PDN_VMMC,4,2         ## @STW_CONF1_PDN_VMMC
L_.str.7:                               ## @.str.7
	.asciz	"disabled"

L_.str.8:                               ## @.str.8
	.asciz	"STw481x power control registers:\n"

	.comm	_STW_PC_VCORE_SEL,4,2           ## @STW_PC_VCORE_SEL
	.comm	_STW_PC_VAUX_SEL,4,2            ## @STW_PC_VAUX_SEL
	.comm	_STW_PC_VPLL_SEL,4,2            ## @STW_PC_VPLL_SEL
L_.str.9:                               ## @.str.9
	.asciz	"VCORE: %u.%uV %s\n"

L_.str.10:                              ## @.str.10
	.asciz	"OFF"

L_.str.11:                              ## @.str.11
	.asciz	"VPLL:  %u.%uV %s\n"

L_.str.12:                              ## @.str.12
	.asciz	"VAUX:  %u.%uV %s\n"

	.comm	_STW_CONF2,4,2                  ## @STW_CONF2
L_.str.13:                              ## @.str.13
	.asciz	"TWARN: %s threshold, %s\n"

L_.str.14:                              ## @.str.14
	.asciz	"below"

L_.str.15:                              ## @.str.15
	.asciz	"above"

	.comm	_STW_CONF2_MASK_TWARN,4,2       ## @STW_CONF2_MASK_TWARN
L_.str.16:                              ## @.str.16
	.asciz	"enabled"

L_.str.17:                              ## @.str.17
	.asciz	"mask through VDDOK"

	.comm	_STW_CONF2_VMMC_EXT,4,2         ## @STW_CONF2_VMMC_EXT
L_.str.18:                              ## @.str.18
	.asciz	"internal"

L_.str.19:                              ## @.str.19
	.asciz	"external"

L_.str.20:                              ## @.str.20
	.asciz	"IT WAKE UP: %s\n"

	.comm	_STW_CONF2_MASK_IT_WAKE_UP,4,2  ## @STW_CONF2_MASK_IT_WAKE_UP
L_.str.21:                              ## @.str.21
	.asciz	"masked"

L_.str.22:                              ## @.str.22
	.asciz	"GPO1: %s\n"

	.comm	_STW_CONF2_GPO1,4,2             ## @STW_CONF2_GPO1
L_.str.23:                              ## @.str.23
	.asciz	"low"

L_.str.24:                              ## @.str.24
	.asciz	"GPO2: %s\n"

	.comm	_STW_CONF2_GPO2,4,2             ## @STW_CONF2_GPO2
	.comm	_STW_VCORE_SLEEP,4,2            ## @STW_VCORE_SLEEP
L_.str.25:                              ## @.str.25
	.asciz	"VCORE SLEEP: %u.%uV\n"

	.no_dead_strip	_stw481x_startup
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function stw481x_startup
_stw481x_startup:                       ; @stw481x_startup
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	ldr	w0, [x0, #8]
Lloh0:
	adrp	x8, _STW_CONF1@GOTPAGE
Lloh1:
	ldr	x8, [x8, _STW_CONF1@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #28
	bl	_regmap_read
	mov	x20, x0
	cbz	w0, LBB0_2
LBB0_1:
	mov	x0, x20
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_2:
	ldr	w24, [sp, #28]
Lloh3:
	adrp	x8, _STW_CONF1_PDN_VAUX@GOTPAGE
Lloh4:
	ldr	x8, [x8, _STW_CONF1_PDN_VAUX@GOTPAGEOFF]
Lloh5:
	adrp	x9, _STW_CONF1_IT_WARN@GOTPAGE
Lloh6:
	ldr	x9, [x9, _STW_CONF1_IT_WARN@GOTPAGEOFF]
Lloh7:
	ldr	w27, [x8]
Lloh8:
	ldr	w25, [x9]
	ldr	x0, [x19]
Lloh9:
	adrp	x8, _STW_CONF1_V_MONITORING@GOTPAGE
Lloh10:
	ldr	x8, [x8, _STW_CONF1_V_MONITORING@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
Lloh12:
	adrp	x9, l_.str.1@PAGE
Lloh13:
	add	x9, x9, l_.str.1@PAGEOFF
Lloh14:
	adrp	x10, l_.str.2@PAGE
Lloh15:
	add	x10, x10, l_.str.2@PAGEOFF
	tst	w8, w24
	csel	x8, x10, x9, eq
	str	x8, [sp]
Lloh16:
	adrp	x1, l_.str@PAGE
Lloh17:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_info
	ldr	x0, [x19]
	ldr	w8, [sp, #28]
Lloh18:
	adrp	x9, _STW_CONF1_MMC_LS_STATUS@GOTPAGE
Lloh19:
	ldr	x9, [x9, _STW_CONF1_MMC_LS_STATUS@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
Lloh21:
	adrp	x10, l_.str.4@PAGE
Lloh22:
	add	x10, x10, l_.str.4@PAGEOFF
Lloh23:
	adrp	x26, l_.str.5@PAGE
Lloh24:
	add	x26, x26, l_.str.5@PAGEOFF
	tst	w9, w8
	csel	x8, x26, x10, eq
	str	x8, [sp]
Lloh25:
	adrp	x1, l_.str.3@PAGE
Lloh26:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_dev_info
	ldr	x0, [x19]
Lloh27:
	adrp	x8, _STW_CONF1_PDN_VMMC@GOTPAGE
Lloh28:
	ldr	x8, [x8, _STW_CONF1_PDN_VMMC@GOTPAGEOFF]
	ldr	w9, [sp, #28]
Lloh29:
	ldr	w8, [x8]
Lloh30:
	adrp	x10, l_.str.7@PAGE
Lloh31:
	add	x10, x10, l_.str.7@PAGEOFF
	tst	w8, w9
	csel	x8, x10, x26, eq
	str	x8, [sp]
Lloh32:
	adrp	x1, l_.str.6@PAGE
Lloh33:
	add	x1, x1, l_.str.6@PAGEOFF
	bl	_dev_info
	ldr	x0, [x19]
Lloh34:
	adrp	x1, l_.str.8@PAGE
Lloh35:
	add	x1, x1, l_.str.8@PAGEOFF
	bl	_dev_info
Lloh36:
	adrp	x8, _STW_PC_VCORE_SEL@GOTPAGE
Lloh37:
	ldr	x8, [x8, _STW_PC_VCORE_SEL@GOTPAGEOFF]
Lloh38:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_stw481x_get_pctl_reg
	mov	x20, x0
	tbnz	w0, #31, LBB0_1
; %bb.3:
Lloh39:
	adrp	x8, _STW_PC_VAUX_SEL@GOTPAGE
Lloh40:
	ldr	x8, [x8, _STW_PC_VAUX_SEL@GOTPAGEOFF]
Lloh41:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_stw481x_get_pctl_reg
	mov	x22, x0
	tbnz	w0, #31, LBB0_8
; %bb.4:
Lloh42:
	adrp	x8, _STW_PC_VPLL_SEL@GOTPAGE
Lloh43:
	ldr	x8, [x8, _STW_PC_VPLL_SEL@GOTPAGEOFF]
Lloh44:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_stw481x_get_pctl_reg
	mov	x21, x0
	tbnz	w0, #31, LBB0_9
; %bb.5:
	and	w8, w27, w24
	str	w8, [sp, #24]                   ; 4-byte Folded Spill
	and	w8, w20, #0xf
	ubfx	w20, w22, #2, #2
	lsr	w9, w21, #1
	and	w28, w9, #0x2
	bfxil	w28, w22, #4, #1
Lloh45:
	adrp	x9, _stw481x_startup.vcore_val@PAGE
Lloh46:
	add	x9, x9, _stw481x_startup.vcore_val@PAGEOFF
	ldr	w8, [x9, w8, uxtw #2]
	ldr	x0, [x19]
	mov	w22, #34079
	movk	w22, #20971, lsl #16
	smull	x9, w8, w22
	lsr	x10, x9, #63
	asr	x9, x9, #37
	add	w9, w9, w10
	mov	w23, #100
	msub	w8, w9, w23, w8
Lloh47:
	adrp	x27, l_.str.10@PAGE
Lloh48:
	add	x27, x27, l_.str.10@PAGEOFF
	tst	w21, #0x4
	csel	x10, x27, x26, eq
	stp	x8, x10, [sp, #8]
	str	x9, [sp]
Lloh49:
	adrp	x1, l_.str.9@PAGE
Lloh50:
	add	x1, x1, l_.str.9@PAGEOFF
	bl	_dev_info
	ldr	x0, [x19]
Lloh51:
	adrp	x8, _stw481x_startup.vpll_val@PAGE
Lloh52:
	add	x8, x8, _stw481x_startup.vpll_val@PAGEOFF
	ldr	w8, [x8, w28, uxtw #2]
	smull	x9, w8, w22
	lsr	x10, x9, #63
	asr	x9, x9, #37
	add	w9, w9, w10
	msub	w8, w9, w23, w8
	tst	w21, #0x10
	csel	x10, x27, x26, eq
	stp	x8, x10, [sp, #8]
	str	x9, [sp]
Lloh53:
	adrp	x1, l_.str.11@PAGE
Lloh54:
	add	x1, x1, l_.str.11@PAGEOFF
	bl	_dev_info
Lloh55:
	adrp	x8, _stw481x_startup.vaux_val@PAGE
Lloh56:
	add	x8, x8, _stw481x_startup.vaux_val@PAGEOFF
	ldr	x0, [x19]
	ldr	w8, [x8, w20, uxtw #2]
	mov	w9, #26215
	movk	w9, #26214, lsl #16
	smull	x9, w8, w9
	lsr	x10, x9, #63
	asr	x9, x9, #34
	add	w9, w9, w10
	mov	w10, #10
	msub	w8, w9, w10, w8
	ldr	w10, [sp, #24]                  ; 4-byte Folded Reload
	cmp	w10, #0
	csel	x10, x27, x26, eq
	stp	x8, x10, [sp, #8]
	str	x9, [sp]
Lloh57:
	adrp	x1, l_.str.12@PAGE
Lloh58:
	add	x1, x1, l_.str.12@PAGEOFF
	bl	_dev_info
	ldr	w0, [x19, #8]
Lloh59:
	adrp	x8, _STW_CONF2@GOTPAGE
Lloh60:
	ldr	x8, [x8, _STW_CONF2@GOTPAGEOFF]
Lloh61:
	ldr	w1, [x8]
	add	x2, sp, #28
	bl	_regmap_read
	mov	x20, x0
	cbnz	w0, LBB0_1
; %bb.6:
	and	w8, w25, w24
	ldr	x0, [x19]
Lloh62:
	adrp	x9, l_.str.14@PAGE
Lloh63:
	add	x9, x9, l_.str.14@PAGEOFF
Lloh64:
	adrp	x10, l_.str.15@PAGE
Lloh65:
	add	x10, x10, l_.str.15@PAGEOFF
	cmp	w8, #0
	csel	x8, x10, x9, eq
	ldr	w9, [sp, #28]
Lloh66:
	adrp	x10, _STW_CONF2_MASK_TWARN@GOTPAGE
Lloh67:
	ldr	x10, [x10, _STW_CONF2_MASK_TWARN@GOTPAGEOFF]
Lloh68:
	ldr	w10, [x10]
Lloh69:
	adrp	x20, l_.str.16@PAGE
Lloh70:
	add	x20, x20, l_.str.16@PAGEOFF
Lloh71:
	adrp	x11, l_.str.17@PAGE
Lloh72:
	add	x11, x11, l_.str.17@PAGEOFF
	tst	w10, w9
	csel	x9, x11, x20, eq
	stp	x8, x9, [sp]
Lloh73:
	adrp	x1, l_.str.13@PAGE
Lloh74:
	add	x1, x1, l_.str.13@PAGEOFF
	bl	_dev_info
	ldr	x0, [x19]
	ldr	w8, [sp, #28]
Lloh75:
	adrp	x9, _STW_CONF2_VMMC_EXT@GOTPAGE
Lloh76:
	ldr	x9, [x9, _STW_CONF2_VMMC_EXT@GOTPAGEOFF]
Lloh77:
	ldr	w9, [x9]
Lloh78:
	adrp	x10, l_.str.18@PAGE
Lloh79:
	add	x10, x10, l_.str.18@PAGEOFF
Lloh80:
	adrp	x11, l_.str.19@PAGE
Lloh81:
	add	x11, x11, l_.str.19@PAGEOFF
	tst	w9, w8
	csel	x8, x11, x10, eq
	str	x8, [sp]
Lloh82:
	adrp	x1, l_.str.6@PAGE
Lloh83:
	add	x1, x1, l_.str.6@PAGEOFF
	bl	_dev_info
	ldr	x0, [x19]
Lloh84:
	adrp	x8, _STW_CONF2_MASK_IT_WAKE_UP@GOTPAGE
Lloh85:
	ldr	x8, [x8, _STW_CONF2_MASK_IT_WAKE_UP@GOTPAGEOFF]
	ldr	w9, [sp, #28]
Lloh86:
	ldr	w8, [x8]
Lloh87:
	adrp	x10, l_.str.21@PAGE
Lloh88:
	add	x10, x10, l_.str.21@PAGEOFF
	tst	w8, w9
	csel	x8, x10, x20, eq
	str	x8, [sp]
Lloh89:
	adrp	x1, l_.str.20@PAGE
Lloh90:
	add	x1, x1, l_.str.20@PAGEOFF
	bl	_dev_info
	ldr	x0, [x19]
Lloh91:
	adrp	x8, _STW_CONF2_GPO1@GOTPAGE
Lloh92:
	ldr	x8, [x8, _STW_CONF2_GPO1@GOTPAGEOFF]
	ldr	w9, [sp, #28]
Lloh93:
	ldr	w8, [x8]
Lloh94:
	adrp	x20, l_.str.23@PAGE
Lloh95:
	add	x20, x20, l_.str.23@PAGEOFF
	tst	w8, w9
Lloh96:
	adrp	x21, l_.str.4@PAGE
Lloh97:
	add	x21, x21, l_.str.4@PAGEOFF
	csel	x8, x21, x20, eq
	str	x8, [sp]
Lloh98:
	adrp	x1, l_.str.22@PAGE
Lloh99:
	add	x1, x1, l_.str.22@PAGEOFF
	bl	_dev_info
	ldr	x0, [x19]
	ldr	w8, [sp, #28]
Lloh100:
	adrp	x9, _STW_CONF2_GPO2@GOTPAGE
Lloh101:
	ldr	x9, [x9, _STW_CONF2_GPO2@GOTPAGEOFF]
Lloh102:
	ldr	w9, [x9]
	tst	w9, w8
	csel	x8, x21, x20, eq
	str	x8, [sp]
Lloh103:
	adrp	x1, l_.str.24@PAGE
Lloh104:
	add	x1, x1, l_.str.24@PAGEOFF
	bl	_dev_info
	ldr	w0, [x19, #8]
Lloh105:
	adrp	x8, _STW_VCORE_SLEEP@GOTPAGE
Lloh106:
	ldr	x8, [x8, _STW_VCORE_SLEEP@GOTPAGEOFF]
Lloh107:
	ldr	w1, [x8]
	add	x2, sp, #28
	bl	_regmap_read
	mov	x20, x0
	cbnz	w0, LBB0_1
; %bb.7:
	ldr	w8, [sp, #28]
	and	x8, x8, #0xf
	ldr	x0, [x19]
Lloh108:
	adrp	x9, _stw481x_startup.vcore_val@PAGE
Lloh109:
	add	x9, x9, _stw481x_startup.vcore_val@PAGEOFF
	ldr	w8, [x9, x8, lsl #2]
	mov	w9, #34079
	movk	w9, #20971, lsl #16
	smull	x9, w8, w9
	lsr	x10, x9, #63
	asr	x9, x9, #37
	add	w9, w9, w10
	mov	w10, #100
	msub	w8, w9, w10, w8
	stp	x9, x8, [sp]
Lloh110:
	adrp	x1, l_.str.25@PAGE
Lloh111:
	add	x1, x1, l_.str.25@PAGEOFF
	bl	_dev_info
	b	LBB0_1
LBB0_8:
	mov	x20, x22
	b	LBB0_1
LBB0_9:
	mov	x20, x21
	b	LBB0_1
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpAdd	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpAdd	Lloh25, Lloh26
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpAdd	Lloh57, Lloh58
	.loh AdrpAdd	Lloh55, Lloh56
	.loh AdrpAdd	Lloh53, Lloh54
	.loh AdrpAdd	Lloh51, Lloh52
	.loh AdrpAdd	Lloh49, Lloh50
	.loh AdrpAdd	Lloh47, Lloh48
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh105, Lloh106, Lloh107
	.loh AdrpAdd	Lloh103, Lloh104
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpAdd	Lloh98, Lloh99
	.loh AdrpAdd	Lloh96, Lloh97
	.loh AdrpAdd	Lloh94, Lloh95
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpAdd	Lloh89, Lloh90
	.loh AdrpAdd	Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpAdd	Lloh82, Lloh83
	.loh AdrpAdd	Lloh80, Lloh81
	.loh AdrpAdd	Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpAdd	Lloh73, Lloh74
	.loh AdrpAdd	Lloh71, Lloh72
	.loh AdrpAdd	Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpAdd	Lloh64, Lloh65
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpAdd	Lloh110, Lloh111
	.loh AdrpAdd	Lloh108, Lloh109
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @stw481x_startup.vcore_val
_stw481x_startup.vcore_val:
	.long	100                             ; 0x64
	.long	105                             ; 0x69
	.long	110                             ; 0x6e
	.long	115                             ; 0x73
	.long	120                             ; 0x78
	.long	122                             ; 0x7a
	.long	124                             ; 0x7c
	.long	126                             ; 0x7e
	.long	128                             ; 0x80
	.long	130                             ; 0x82
	.long	132                             ; 0x84
	.long	134                             ; 0x86
	.long	136                             ; 0x88
	.long	138                             ; 0x8a
	.long	140                             ; 0x8c
	.long	145                             ; 0x91

	.p2align	2                               ; @stw481x_startup.vpll_val
_stw481x_startup.vpll_val:
	.long	105                             ; 0x69
	.long	120                             ; 0x78
	.long	130                             ; 0x82
	.long	180                             ; 0xb4

	.p2align	2                               ; @stw481x_startup.vaux_val
_stw481x_startup.vaux_val:
	.long	15                              ; 0xf
	.long	18                              ; 0x12
	.long	25                              ; 0x19
	.long	28                              ; 0x1c

	.comm	_STW_CONF1,4,2                  ; @STW_CONF1
	.comm	_STW_CONF1_PDN_VAUX,4,2         ; @STW_CONF1_PDN_VAUX
	.comm	_STW_CONF1_IT_WARN,4,2          ; @STW_CONF1_IT_WARN
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"voltages %s\n"

	.comm	_STW_CONF1_V_MONITORING,4,2     ; @STW_CONF1_V_MONITORING
l_.str.1:                               ; @.str.1
	.asciz	"OK"

l_.str.2:                               ; @.str.2
	.asciz	"LOW"

l_.str.3:                               ; @.str.3
	.asciz	"MMC level shifter %s\n"

	.comm	_STW_CONF1_MMC_LS_STATUS,4,2    ; @STW_CONF1_MMC_LS_STATUS
l_.str.4:                               ; @.str.4
	.asciz	"high impedance"

l_.str.5:                               ; @.str.5
	.asciz	"ON"

l_.str.6:                               ; @.str.6
	.asciz	"VMMC: %s\n"

	.comm	_STW_CONF1_PDN_VMMC,4,2         ; @STW_CONF1_PDN_VMMC
l_.str.7:                               ; @.str.7
	.asciz	"disabled"

l_.str.8:                               ; @.str.8
	.asciz	"STw481x power control registers:\n"

	.comm	_STW_PC_VCORE_SEL,4,2           ; @STW_PC_VCORE_SEL
	.comm	_STW_PC_VAUX_SEL,4,2            ; @STW_PC_VAUX_SEL
	.comm	_STW_PC_VPLL_SEL,4,2            ; @STW_PC_VPLL_SEL
l_.str.9:                               ; @.str.9
	.asciz	"VCORE: %u.%uV %s\n"

l_.str.10:                              ; @.str.10
	.asciz	"OFF"

l_.str.11:                              ; @.str.11
	.asciz	"VPLL:  %u.%uV %s\n"

l_.str.12:                              ; @.str.12
	.asciz	"VAUX:  %u.%uV %s\n"

	.comm	_STW_CONF2,4,2                  ; @STW_CONF2
l_.str.13:                              ; @.str.13
	.asciz	"TWARN: %s threshold, %s\n"

l_.str.14:                              ; @.str.14
	.asciz	"below"

l_.str.15:                              ; @.str.15
	.asciz	"above"

	.comm	_STW_CONF2_MASK_TWARN,4,2       ; @STW_CONF2_MASK_TWARN
l_.str.16:                              ; @.str.16
	.asciz	"enabled"

l_.str.17:                              ; @.str.17
	.asciz	"mask through VDDOK"

	.comm	_STW_CONF2_VMMC_EXT,4,2         ; @STW_CONF2_VMMC_EXT
l_.str.18:                              ; @.str.18
	.asciz	"internal"

l_.str.19:                              ; @.str.19
	.asciz	"external"

l_.str.20:                              ; @.str.20
	.asciz	"IT WAKE UP: %s\n"

	.comm	_STW_CONF2_MASK_IT_WAKE_UP,4,2  ; @STW_CONF2_MASK_IT_WAKE_UP
l_.str.21:                              ; @.str.21
	.asciz	"masked"

l_.str.22:                              ; @.str.22
	.asciz	"GPO1: %s\n"

	.comm	_STW_CONF2_GPO1,4,2             ; @STW_CONF2_GPO1
l_.str.23:                              ; @.str.23
	.asciz	"low"

l_.str.24:                              ; @.str.24
	.asciz	"GPO2: %s\n"

	.comm	_STW_CONF2_GPO2,4,2             ; @STW_CONF2_GPO2
	.comm	_STW_VCORE_SLEEP,4,2            ; @STW_VCORE_SLEEP
l_.str.25:                              ; @.str.25
	.asciz	"VCORE SLEEP: %u.%uV\n"

	.no_dead_strip	_stw481x_startup
.subsections_via_symbols
