	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2_reset_chip
_bnx2_reset_chip:                       ## @bnx2_reset_chip
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %r15
	callq	_bnx2_wait_dma_complete
	movq	_BNX2_DRV_MSG_DATA_WAIT0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	orl	%r14d, %esi
	movq	%r15, %rdi
	movl	$1, %edx
	movl	$1, %ecx
	callq	_bnx2_fw_sync
	movq	_BNX2_DRV_RESET_SIGNATURE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BNX2_DRV_RESET_SIGNATURE_MAGIC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_bnx2_shmem_wr
	movq	_BNX2_MISC_ID@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movq	%r15, %rdi
	callq	_BNX2_CHIP
	movq	_BNX2_CHIP_5709@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_4
## %bb.1:
	movq	_BNX2_MISC_COMMAND@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_BNX2_MISC_COMMAND_SW_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_BNX2_WR
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movl	$5, %edi
	callq	_udelay
	movq	_BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA@GOTPCREL(%rip), %rax
	movq	_BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_BNX2_PCICFG_MISC_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_BNX2_WR
	jmp	LBB0_2
LBB0_4:
	movq	_BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ@GOTPCREL(%rip), %r13
	movq	_BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	orl	(%r13), %edx
	movq	_BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_BNX2_PCICFG_MISC_CONFIG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_WR
	movq	%r15, %rdi
	callq	_BNX2_CHIP_ID
	movq	_BNX2_CHIP_ID_5706_A0@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_6
## %bb.5:
	movq	%r15, %rdi
	callq	_BNX2_CHIP_ID
	movq	_BNX2_CHIP_ID_5706_A1@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_7
LBB0_6:
	movl	$20, %edi
	callq	_msleep
LBB0_7:
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movq	_BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY@GOTPCREL(%rip), %r12
	movl	(%r12), %ecx
	orl	(%r13), %ecx
	testl	%eax, %ecx
	je	LBB0_2
## %bb.8:
	movl	$10, %edi
	callq	_udelay
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movl	(%r12), %ecx
	orl	(%r13), %ecx
	testl	%eax, %ecx
	je	LBB0_2
## %bb.9:
	movl	$10, %edi
	callq	_udelay
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movl	(%r12), %ecx
	orl	(%r13), %ecx
	testl	%eax, %ecx
	je	LBB0_2
## %bb.10:
	movl	$10, %edi
	callq	_udelay
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movl	(%r12), %ecx
	orl	(%r13), %ecx
	testl	%eax, %ecx
	je	LBB0_2
## %bb.11:
	movl	$10, %edi
	callq	_udelay
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movl	(%r12), %ecx
	orl	(%r13), %ecx
	testl	%eax, %ecx
	je	LBB0_2
## %bb.12:
	movl	$10, %edi
	callq	_udelay
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movl	(%r12), %ecx
	orl	(%r13), %ecx
	testl	%eax, %ecx
	je	LBB0_2
## %bb.13:
	movl	$10, %edi
	callq	_udelay
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movl	(%r12), %ecx
	orl	(%r13), %ecx
	testl	%eax, %ecx
	je	LBB0_2
## %bb.14:
	movl	$10, %edi
	callq	_udelay
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movl	(%r12), %ecx
	orl	(%r13), %ecx
	testl	%eax, %ecx
	je	LBB0_2
## %bb.15:
	movl	$10, %edi
	callq	_udelay
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movl	(%r12), %ecx
	orl	(%r13), %ecx
	testl	%eax, %ecx
	je	LBB0_2
## %bb.16:
	movl	$10, %edi
	callq	_udelay
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	movl	%eax, %ebx
	movl	(%r12), %eax
	orl	(%r13), %eax
	testl	%ebx, %eax
	je	LBB0_2
## %bb.17:
	movl	$10, %edi
	callq	_udelay
	movl	(%r12), %eax
	orl	(%r13), %eax
	testl	%ebx, %eax
	je	LBB0_2
## %bb.18:
	leaq	L_.str(%rip), %rdi
	callq	_pr_err
	movq	_EBUSY@GOTPCREL(%rip), %rax
	jmp	LBB0_19
LBB0_2:
	movq	_BNX2_PCI_SWAP_DIAG0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_BNX2_RD
	cmpl	$16909060, %eax                 ## imm = 0x1020304
	jne	LBB0_3
## %bb.20:
	movq	_BNX2_DRV_MSG_DATA_WAIT1@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_bnx2_fw_sync
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_28
## %bb.21:
	leaq	16(%r15), %rbx
	movq	%rbx, %rdi
	callq	_spin_lock_bh
	movq	(%r15), %r14
	movq	%r15, %rdi
	callq	_bnx2_init_fw_cap
	movq	_BNX2_PHY_FLAG_REMOTE_PHY_CAP@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%r15)
	je	LBB0_24
## %bb.22:
	cmpq	(%r15), %r14
	je	LBB0_24
## %bb.23:
	movq	%r15, %rdi
	callq	_bnx2_set_default_remote_link
LBB0_24:
	movq	%rbx, %rdi
	callq	_spin_unlock_bh
	movq	%r15, %rdi
	callq	_BNX2_CHIP_ID
	movq	_BNX2_CHIP_ID_5706_A0@GOTPCREL(%rip), %rcx
	xorl	%ebx, %ebx
	cmpq	(%rcx), %rax
	jne	LBB0_26
## %bb.25:
	movq	_BNX2_MISC_VREG_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	$250, %edx
	callq	_BNX2_WR
	movq	%r15, %rdi
	callq	_bnx2_alloc_bad_rbuf
	movl	%eax, %ebx
LBB0_26:
	movq	_BNX2_FLAG_USING_MSIX@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 12(%r15)
	je	LBB0_28
## %bb.27:
	movq	%r15, %rdi
	callq	_bnx2_setup_msix_tbl
	movq	_BNX2_MISC_ECO_HW_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BNX2_MISC_ECO_HW_CTL_LARGE_GRC_TMOUT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r15, %rdi
	callq	_BNX2_WR
	jmp	LBB0_28
LBB0_3:
	leaq	L_.str.1(%rip), %rdi
	callq	_pr_err
	movq	_ENODEV@GOTPCREL(%rip), %rax
LBB0_19:
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_28:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BNX2_DRV_MSG_DATA_WAIT0,4,2    ## @BNX2_DRV_MSG_DATA_WAIT0
	.comm	_BNX2_DRV_RESET_SIGNATURE,4,2   ## @BNX2_DRV_RESET_SIGNATURE
	.comm	_BNX2_DRV_RESET_SIGNATURE_MAGIC,4,2 ## @BNX2_DRV_RESET_SIGNATURE_MAGIC
	.comm	_BNX2_MISC_ID,4,2               ## @BNX2_MISC_ID
	.comm	_BNX2_CHIP_5709,8,3             ## @BNX2_CHIP_5709
	.comm	_BNX2_MISC_COMMAND,4,2          ## @BNX2_MISC_COMMAND
	.comm	_BNX2_MISC_COMMAND_SW_RESET,4,2 ## @BNX2_MISC_COMMAND_SW_RESET
	.comm	_BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA,4,2 ## @BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA
	.comm	_BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP,4,2 ## @BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP
	.comm	_BNX2_PCICFG_MISC_CONFIG,4,2    ## @BNX2_PCICFG_MISC_CONFIG
	.comm	_BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ,4,2 ## @BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ
	.comm	_BNX2_CHIP_ID_5706_A0,8,3       ## @BNX2_CHIP_ID_5706_A0
	.comm	_BNX2_CHIP_ID_5706_A1,8,3       ## @BNX2_CHIP_ID_5706_A1
	.comm	_BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY,4,2 ## @BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Chip reset did not complete\n"

	.comm	_EBUSY,4,2                      ## @EBUSY
	.comm	_BNX2_PCI_SWAP_DIAG0,4,2        ## @BNX2_PCI_SWAP_DIAG0
L_.str.1:                               ## @.str.1
	.asciz	"Chip not in correct endian mode\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_BNX2_DRV_MSG_DATA_WAIT1,4,2    ## @BNX2_DRV_MSG_DATA_WAIT1
	.comm	_BNX2_PHY_FLAG_REMOTE_PHY_CAP,4,2 ## @BNX2_PHY_FLAG_REMOTE_PHY_CAP
	.comm	_BNX2_MISC_VREG_CONTROL,4,2     ## @BNX2_MISC_VREG_CONTROL
	.comm	_BNX2_FLAG_USING_MSIX,4,2       ## @BNX2_FLAG_USING_MSIX
	.comm	_BNX2_MISC_ECO_HW_CTL,4,2       ## @BNX2_MISC_ECO_HW_CTL
	.comm	_BNX2_MISC_ECO_HW_CTL_LARGE_GRC_TMOUT_EN,4,2 ## @BNX2_MISC_ECO_HW_CTL_LARGE_GRC_TMOUT_EN
	.no_dead_strip	_bnx2_reset_chip
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2_reset_chip
_bnx2_reset_chip:                       ; @bnx2_reset_chip
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x19, x0
	bl	_bnx2_wait_dma_complete
Lloh0:
	adrp	x8, _BNX2_DRV_MSG_DATA_WAIT0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _BNX2_DRV_MSG_DATA_WAIT0@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	orr	w1, w8, w20
	mov	x0, x19
	mov	w2, #1
	mov	w3, #1
	bl	_bnx2_fw_sync
Lloh3:
	adrp	x8, _BNX2_DRV_RESET_SIGNATURE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _BNX2_DRV_RESET_SIGNATURE@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
Lloh6:
	adrp	x8, _BNX2_DRV_RESET_SIGNATURE_MAGIC@GOTPAGE
Lloh7:
	ldr	x8, [x8, _BNX2_DRV_RESET_SIGNATURE_MAGIC@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_bnx2_shmem_wr
Lloh9:
	adrp	x8, _BNX2_MISC_ID@GOTPAGE
Lloh10:
	ldr	x8, [x8, _BNX2_MISC_ID@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_BNX2_RD
	mov	x0, x19
	bl	_BNX2_CHIP
Lloh12:
	adrp	x8, _BNX2_CHIP_5709@GOTPAGE
Lloh13:
	ldr	x8, [x8, _BNX2_CHIP_5709@GOTPAGEOFF]
Lloh14:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_2
; %bb.1:
Lloh15:
	adrp	x21, _BNX2_MISC_COMMAND@GOTPAGE
Lloh16:
	ldr	x21, [x21, _BNX2_MISC_COMMAND@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh17:
	adrp	x8, _BNX2_MISC_COMMAND_SW_RESET@GOTPAGE
Lloh18:
	ldr	x8, [x8, _BNX2_MISC_COMMAND_SW_RESET@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_BNX2_WR
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	mov	w0, #5
	bl	_udelay
Lloh20:
	adrp	x8, _BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA@GOTPAGE
Lloh21:
	ldr	x8, [x8, _BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA@GOTPAGEOFF]
Lloh22:
	adrp	x9, _BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP@GOTPAGE
Lloh23:
	ldr	x9, [x9, _BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP@GOTPAGEOFF]
Lloh24:
	ldr	w8, [x8]
Lloh25:
	ldr	w9, [x9]
	orr	w2, w9, w8
Lloh26:
	adrp	x8, _BNX2_PCICFG_MISC_CONFIG@GOTPAGE
Lloh27:
	ldr	x8, [x8, _BNX2_PCICFG_MISC_CONFIG@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_BNX2_WR
	b	LBB0_17
LBB0_2:
Lloh29:
	adrp	x22, _BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ@GOTPAGE
Lloh30:
	ldr	x22, [x22, _BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ@GOTPAGEOFF]
	ldr	w8, [x22]
Lloh31:
	adrp	x9, _BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA@GOTPAGE
Lloh32:
	ldr	x9, [x9, _BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
Lloh34:
	adrp	x10, _BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP@GOTPAGE
Lloh35:
	ldr	x10, [x10, _BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh36:
	ldr	w9, [x10]
	orr	w2, w8, w9
Lloh37:
	adrp	x21, _BNX2_PCICFG_MISC_CONFIG@GOTPAGE
Lloh38:
	ldr	x21, [x21, _BNX2_PCICFG_MISC_CONFIG@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_WR
	mov	x0, x19
	bl	_BNX2_CHIP_ID
Lloh39:
	adrp	x8, _BNX2_CHIP_ID_5706_A0@GOTPAGE
Lloh40:
	ldr	x8, [x8, _BNX2_CHIP_ID_5706_A0@GOTPAGEOFF]
Lloh41:
	ldr	x8, [x8]
	cmp	x0, x8
	b.eq	LBB0_4
; %bb.3:
	mov	x0, x19
	bl	_BNX2_CHIP_ID
Lloh42:
	adrp	x8, _BNX2_CHIP_ID_5706_A1@GOTPAGE
Lloh43:
	ldr	x8, [x8, _BNX2_CHIP_ID_5706_A1@GOTPAGEOFF]
Lloh44:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_5
LBB0_4:
	mov	w0, #20
	bl	_msleep
LBB0_5:
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	ldr	w8, [x22]
Lloh45:
	adrp	x23, _BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY@GOTPAGE
Lloh46:
	ldr	x23, [x23, _BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY@GOTPAGEOFF]
	ldr	w9, [x23]
	orr	w8, w9, w8
	tst	w8, w0
	b.eq	LBB0_17
; %bb.6:
	mov	w0, #10
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	tst	w8, w0
	b.eq	LBB0_17
; %bb.7:
	mov	w0, #10
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	tst	w8, w0
	b.eq	LBB0_17
; %bb.8:
	mov	w0, #10
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	tst	w8, w0
	b.eq	LBB0_17
; %bb.9:
	mov	w0, #10
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	tst	w8, w0
	b.eq	LBB0_17
; %bb.10:
	mov	w0, #10
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	tst	w8, w0
	b.eq	LBB0_17
; %bb.11:
	mov	w0, #10
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	tst	w8, w0
	b.eq	LBB0_17
; %bb.12:
	mov	w0, #10
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	tst	w8, w0
	b.eq	LBB0_17
; %bb.13:
	mov	w0, #10
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	tst	w8, w0
	b.eq	LBB0_17
; %bb.14:
	mov	w0, #10
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	tst	w8, w0
	b.eq	LBB0_17
; %bb.15:
	mov	x21, x0
	mov	w0, #10
	bl	_udelay
	ldr	w8, [x22]
	ldr	w9, [x23]
	orr	w8, w9, w8
	tst	w8, w21
	b.eq	LBB0_17
; %bb.16:
Lloh47:
	adrp	x0, l_.str@PAGE
Lloh48:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_err
Lloh49:
	adrp	x8, _EBUSY@GOTPAGE
Lloh50:
	ldr	x8, [x8, _EBUSY@GOTPAGEOFF]
	b	LBB0_25
LBB0_17:
Lloh51:
	adrp	x8, _BNX2_PCI_SWAP_DIAG0@GOTPAGE
Lloh52:
	ldr	x8, [x8, _BNX2_PCI_SWAP_DIAG0@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_BNX2_RD
	mov	w8, #772
	movk	w8, #258, lsl #16
	cmp	w0, w8
	b.ne	LBB0_24
; %bb.18:
Lloh54:
	adrp	x8, _BNX2_DRV_MSG_DATA_WAIT1@GOTPAGE
Lloh55:
	ldr	x8, [x8, _BNX2_DRV_MSG_DATA_WAIT1@GOTPAGEOFF]
Lloh56:
	ldr	w8, [x8]
	orr	w1, w8, w20
	mov	x0, x19
	mov	w2, #1
	mov	w3, #0
	bl	_bnx2_fw_sync
	mov	x20, x0
	cbnz	w0, LBB0_26
; %bb.19:
	add	x20, x19, #16
	mov	x0, x20
	bl	_spin_lock_bh
	ldr	x21, [x19]
	mov	x0, x19
	bl	_bnx2_init_fw_cap
	ldr	w8, [x19, #8]
Lloh57:
	adrp	x9, _BNX2_PHY_FLAG_REMOTE_PHY_CAP@GOTPAGE
Lloh58:
	ldr	x9, [x9, _BNX2_PHY_FLAG_REMOTE_PHY_CAP@GOTPAGEOFF]
Lloh59:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_22
; %bb.20:
	ldr	x8, [x19]
	cmp	x21, x8
	b.eq	LBB0_22
; %bb.21:
	mov	x0, x19
	bl	_bnx2_set_default_remote_link
LBB0_22:
	mov	x0, x20
	bl	_spin_unlock_bh
	mov	x0, x19
	bl	_BNX2_CHIP_ID
Lloh60:
	adrp	x8, _BNX2_CHIP_ID_5706_A0@GOTPAGE
Lloh61:
	ldr	x8, [x8, _BNX2_CHIP_ID_5706_A0@GOTPAGEOFF]
Lloh62:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_27
; %bb.23:
Lloh63:
	adrp	x8, _BNX2_MISC_VREG_CONTROL@GOTPAGE
Lloh64:
	ldr	x8, [x8, _BNX2_MISC_VREG_CONTROL@GOTPAGEOFF]
Lloh65:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #250
	bl	_BNX2_WR
	mov	x0, x19
	bl	_bnx2_alloc_bad_rbuf
	mov	x20, x0
	b	LBB0_28
LBB0_24:
Lloh66:
	adrp	x0, l_.str.1@PAGE
Lloh67:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_pr_err
Lloh68:
	adrp	x8, _ENODEV@GOTPAGE
Lloh69:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
LBB0_25:
	ldr	w8, [x8]
	neg	w20, w8
LBB0_26:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_27:
	mov	w20, #0
LBB0_28:
	ldr	w8, [x19, #12]
Lloh70:
	adrp	x9, _BNX2_FLAG_USING_MSIX@GOTPAGE
Lloh71:
	ldr	x9, [x9, _BNX2_FLAG_USING_MSIX@GOTPAGEOFF]
Lloh72:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_26
; %bb.29:
	mov	x0, x19
	bl	_bnx2_setup_msix_tbl
Lloh73:
	adrp	x8, _BNX2_MISC_ECO_HW_CTL@GOTPAGE
Lloh74:
	ldr	x8, [x8, _BNX2_MISC_ECO_HW_CTL@GOTPAGEOFF]
Lloh75:
	ldr	w1, [x8]
Lloh76:
	adrp	x8, _BNX2_MISC_ECO_HW_CTL_LARGE_GRC_TMOUT_EN@GOTPAGE
Lloh77:
	ldr	x8, [x8, _BNX2_MISC_ECO_HW_CTL_LARGE_GRC_TMOUT_EN@GOTPAGEOFF]
Lloh78:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_BNX2_WR
	b	LBB0_26
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh24
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGot	Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpAdd	Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpAdd	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.cfi_endproc
                                        ; -- End function
	.comm	_BNX2_DRV_MSG_DATA_WAIT0,4,2    ; @BNX2_DRV_MSG_DATA_WAIT0
	.comm	_BNX2_DRV_RESET_SIGNATURE,4,2   ; @BNX2_DRV_RESET_SIGNATURE
	.comm	_BNX2_DRV_RESET_SIGNATURE_MAGIC,4,2 ; @BNX2_DRV_RESET_SIGNATURE_MAGIC
	.comm	_BNX2_MISC_ID,4,2               ; @BNX2_MISC_ID
	.comm	_BNX2_CHIP_5709,8,3             ; @BNX2_CHIP_5709
	.comm	_BNX2_MISC_COMMAND,4,2          ; @BNX2_MISC_COMMAND
	.comm	_BNX2_MISC_COMMAND_SW_RESET,4,2 ; @BNX2_MISC_COMMAND_SW_RESET
	.comm	_BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA,4,2 ; @BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA
	.comm	_BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP,4,2 ; @BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP
	.comm	_BNX2_PCICFG_MISC_CONFIG,4,2    ; @BNX2_PCICFG_MISC_CONFIG
	.comm	_BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ,4,2 ; @BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ
	.comm	_BNX2_CHIP_ID_5706_A0,8,3       ; @BNX2_CHIP_ID_5706_A0
	.comm	_BNX2_CHIP_ID_5706_A1,8,3       ; @BNX2_CHIP_ID_5706_A1
	.comm	_BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY,4,2 ; @BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Chip reset did not complete\n"

	.comm	_EBUSY,4,2                      ; @EBUSY
	.comm	_BNX2_PCI_SWAP_DIAG0,4,2        ; @BNX2_PCI_SWAP_DIAG0
l_.str.1:                               ; @.str.1
	.asciz	"Chip not in correct endian mode\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_BNX2_DRV_MSG_DATA_WAIT1,4,2    ; @BNX2_DRV_MSG_DATA_WAIT1
	.comm	_BNX2_PHY_FLAG_REMOTE_PHY_CAP,4,2 ; @BNX2_PHY_FLAG_REMOTE_PHY_CAP
	.comm	_BNX2_MISC_VREG_CONTROL,4,2     ; @BNX2_MISC_VREG_CONTROL
	.comm	_BNX2_FLAG_USING_MSIX,4,2       ; @BNX2_FLAG_USING_MSIX
	.comm	_BNX2_MISC_ECO_HW_CTL,4,2       ; @BNX2_MISC_ECO_HW_CTL
	.comm	_BNX2_MISC_ECO_HW_CTL_LARGE_GRC_TMOUT_EN,4,2 ; @BNX2_MISC_ECO_HW_CTL_LARGE_GRC_TMOUT_EN
	.no_dead_strip	_bnx2_reset_chip
.subsections_via_symbols
