	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_nfc_select_chip
_meson_nfc_select_chip:                 ## @meson_nfc_select_chip
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r12d
	movq	%rdi, %rbx
	callq	_to_meson_nand
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_nand_get_controller_data
	testl	%r12d, %r12d
	js	LBB0_10
## %bb.1:
	movq	%rax, %r15
	xorl	%edi, %edi
	cmpl	%r12d, (%r14)
	setle	%dil
	callq	_WARN_ON_ONCE
	testq	%rax, %rax
	je	LBB0_2
LBB0_10:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	32(%r14), %rax
	movl	%r12d, %ecx
	cmpq	$0, (%rax,%rcx,8)
	jne	LBB0_3
## %bb.4:
	movq	_NAND_CE0@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_3:
	movq	_NAND_CE1@GOTPCREL(%rip), %rax
LBB0_5:
	movl	(%rax), %eax
	movl	%eax, 44(%r15)
	movl	%eax, 48(%r15)
	movl	28(%r14), %eax
	movl	%eax, 40(%r15)
	movl	24(%r14), %eax
	movl	%eax, 36(%r15)
	movl	20(%r14), %eax
	movl	%eax, 32(%r15)
	movq	8(%r14), %rsi
	cmpq	%rsi, (%r15)
	je	LBB0_8
## %bb.6:
	movl	28(%r15), %edi
	callq	_clk_set_rate
	testl	%eax, %eax
	je	LBB0_7
## %bb.11:
	movl	24(%r15), %edi
	leaq	L_.str(%rip), %rsi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_err                        ## TAILCALL
LBB0_7:
	movq	8(%r14), %rax
	movq	%rax, (%r15)
LBB0_8:
	movl	16(%r14), %edi
	cmpl	%edi, 8(%r15)
	je	LBB0_10
## %bb.9:
	movq	_NFC_CLK_CYCLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	decl	%eax
	shll	$5, %edi
	orl	%eax, %edi
	movq	_NFC_REG_CFG@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	16(%r15), %rsi
	callq	_writel
	movq	_NFC_REG_CMD@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	16(%r15), %rsi
	movl	$-2147483648, %edi              ## imm = 0x80000000
	callq	_writel
	movl	16(%r14), %eax
	movl	%eax, 8(%r15)
	jmp	LBB0_10
	.cfi_endproc
                                        ## -- End function
	.comm	_NAND_CE1,4,2                   ## @NAND_CE1
	.comm	_NAND_CE0,4,2                   ## @NAND_CE0
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to set clock rate\n"

	.comm	_NFC_CLK_CYCLE,4,2              ## @NFC_CLK_CYCLE
	.comm	_NFC_REG_CFG,8,3                ## @NFC_REG_CFG
	.comm	_NFC_REG_CMD,8,3                ## @NFC_REG_CMD
	.no_dead_strip	_meson_nfc_select_chip
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_nfc_select_chip
_meson_nfc_select_chip:                 ; @meson_nfc_select_chip
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x21, x1
	mov	x20, x0
	bl	_to_meson_nand
	mov	x19, x0
	mov	x0, x20
	bl	_nand_get_controller_data
	tbnz	w21, #31, LBB0_2
; %bb.1:
	mov	x20, x0
	ldr	w8, [x19]
	cmp	w8, w21
	cset	w0, le
	bl	_WARN_ON_ONCE
	cbz	x0, LBB0_3
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_3:
	ldr	x8, [x19, #32]
	ldr	x8, [x8, w21, uxtw #3]
Lloh0:
	adrp	x9, _NAND_CE1@GOTPAGE
Lloh1:
	ldr	x9, [x9, _NAND_CE1@GOTPAGEOFF]
Lloh2:
	adrp	x10, _NAND_CE0@GOTPAGE
Lloh3:
	ldr	x10, [x10, _NAND_CE0@GOTPAGEOFF]
	cmp	x8, #0
	csel	x8, x10, x9, eq
	ldr	w8, [x8]
	str	w8, [x20, #48]
	ldr	w9, [x19, #28]
	stp	w9, w8, [x20, #40]
	ldur	d0, [x19, #20]
	str	d0, [x20, #32]
	ldr	x8, [x20]
	ldr	x1, [x19, #8]
	cmp	x8, x1
	b.eq	LBB0_7
; %bb.4:
	ldr	w0, [x20, #28]
	bl	_clk_set_rate
	cbz	w0, LBB0_6
; %bb.5:
	ldr	w0, [x20, #24]
Lloh4:
	adrp	x1, l_.str@PAGE
Lloh5:
	add	x1, x1, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_dev_err
LBB0_6:
	ldr	x8, [x19, #8]
	str	x8, [x20]
LBB0_7:
	ldr	w9, [x20, #8]
	ldr	w8, [x19, #16]
	cmp	w9, w8
	b.eq	LBB0_2
; %bb.8:
Lloh6:
	adrp	x9, _NFC_CLK_CYCLE@GOTPAGE
Lloh7:
	ldr	x9, [x9, _NFC_CLK_CYCLE@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	sub	w9, w9, #1
	orr	w0, w9, w8, lsl #5
	ldr	x8, [x20, #16]
Lloh9:
	adrp	x9, _NFC_REG_CFG@GOTPAGE
Lloh10:
	ldr	x9, [x9, _NFC_REG_CFG@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	x8, [x20, #16]
Lloh12:
	adrp	x9, _NFC_REG_CMD@GOTPAGE
Lloh13:
	ldr	x9, [x9, _NFC_REG_CMD@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	w0, #-2147483648
	bl	_writel
	ldr	w8, [x19, #16]
	str	w8, [x20, #8]
	b	LBB0_2
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_NAND_CE1,4,2                   ; @NAND_CE1
	.comm	_NAND_CE0,4,2                   ; @NAND_CE0
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to set clock rate\n"

	.comm	_NFC_CLK_CYCLE,4,2              ; @NFC_CLK_CYCLE
	.comm	_NFC_REG_CFG,8,3                ; @NFC_REG_CFG
	.comm	_NFC_REG_CMD,8,3                ; @NFC_REG_CMD
	.no_dead_strip	_meson_nfc_select_chip
.subsections_via_symbols
