	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function saa711x_s_clock_freq
_saa711x_s_clock_freq:                  ## @saa711x_s_clock_freq
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r13
	callq	_to_state
	movq	%rax, %r15
	movl	36(%rax), %edi
	movq	_R_30_AUD_MAST_CLK_CYCLES_PER_FIELD@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	callq	_saa711x_has_reg
	testl	%eax, %eax
	je	LBB0_7
## %bb.1:
	movq	_debug@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	L_.str(%rip), %rcx
	movl	$1, %edi
	movq	%r13, %rdx
	movl	%ebx, %r8d
	callq	_v4l2_dbg
	leal	-48001(%rbx), %eax
	cmpl	$-16002, %eax                   ## imm = 0xC17E
	ja	LBB0_3
## %bb.2:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_8
LBB0_3:
	movq	_V4L2_STD_525_60@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	(%r15), %eax
	movl	$5000, %eax                     ## imm = 0x1388
	movl	$5994, %ecx                     ## imm = 0x176A
	cmovel	%eax, %ecx
	imull	$25600, %ebx, %eax              ## imm = 0x6400
	xorl	%edx, %edx
	divl	%ecx
	movl	%eax, %r12d
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movl	%ebx, %edi
	shll	$31, %edi
	movl	32(%r15), %esi
	movq	%rdi, %r14
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_do_div
	cmpq	$0, 24(%r15)
	je	LBB0_4
## %bb.5:
	movl	4(%r15), %ecx
	imull	%ecx, %r12d
	leal	15(%r12), %edx
	testl	%r12d, %r12d
	cmovnsl	%r12d, %edx
	sarl	$4, %edx
	imull	%ecx, %r14d
	leal	15(%r14), %esi
	testl	%r14d, %r14d
	cmovnsl	%r14d, %esi
	sarl	$4, %esi
	xorl	%eax, %eax
	cmpl	$3, %ecx
	sete	%al
	orl	$2, %eax
	shll	$6, %eax
	movl	%esi, %r14d
	movl	%edx, %ebx
	jmp	LBB0_6
LBB0_4:
	xorl	%eax, %eax
	movq	%r12, %rbx
LBB0_6:
	movl	%eax, %r12d
	orl	$8, %r12d
	cmpq	$0, 16(%r15)
	cmovel	%eax, %r12d
	cmpl	$0, 8(%r15)
	setne	%cl
	shll	%cl, %r14d
	shll	%cl, %ebx
	movq	_R_38_CLK_RATIO_AMXCLK_TO_ASCLK@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r13, %rdi
	movl	$3, %edx
	callq	_saa711x_write
	movq	_R_39_CLK_RATIO_ASCLK_TO_ALRCLK@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movb	8(%r15), %cl
	movl	$16, %edx
	shll	%cl, %edx
	movq	%r13, %rdi
	callq	_saa711x_write
	movq	_R_3A_AUD_CLK_GEN_BASIC_SETUP@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	%r13, %rdi
	movl	%r12d, %edx
	callq	_saa711x_write
	movq	_R_30_AUD_MAST_CLK_CYCLES_PER_FIELD@GOTPCREL(%rip), %r12
	movq	(%r12), %rsi
	movzbl	%bl, %edx
	movq	%r13, %rdi
	callq	_saa711x_write
	movq	(%r12), %rsi
	incq	%rsi
	movzbl	%bh, %edx
	movq	%r13, %rdi
	callq	_saa711x_write
	movq	(%r12), %rsi
	addq	$2, %rsi
	shrl	$16, %ebx
	andl	$3, %ebx
	movq	%r13, %rdi
	movl	%ebx, %edx
	callq	_saa711x_write
	movq	_R_34_AUD_MAST_CLK_NOMINAL_INC@GOTPCREL(%rip), %r12
	movq	(%r12), %rsi
	movq	%r14, %rbx
	movzbl	%bl, %edx
	movq	%r13, %rdi
	callq	_saa711x_write
	movq	(%r12), %rsi
	incq	%rsi
	movzbl	%bh, %edx
	movq	%r13, %rdi
	callq	_saa711x_write
	movq	(%r12), %rsi
	addq	$2, %rsi
	movq	%r14, %rdx
	shrl	$16, %edx
	andl	$63, %edx
	movq	%r13, %rdi
                                        ## kill: def $edx killed $edx killed $rdx
	callq	_saa711x_write
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	%eax, 12(%r15)
LBB0_7:
	xorl	%eax, %eax
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_R_30_AUD_MAST_CLK_CYCLES_PER_FIELD,8,3 ## @R_30_AUD_MAST_CLK_CYCLES_PER_FIELD
	.comm	_debug,4,2                      ## @debug
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"set audio clock freq: %d\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_V4L2_STD_525_60,4,2            ## @V4L2_STD_525_60
	.comm	_R_38_CLK_RATIO_AMXCLK_TO_ASCLK,8,3 ## @R_38_CLK_RATIO_AMXCLK_TO_ASCLK
	.comm	_R_39_CLK_RATIO_ASCLK_TO_ALRCLK,8,3 ## @R_39_CLK_RATIO_ASCLK_TO_ALRCLK
	.comm	_R_3A_AUD_CLK_GEN_BASIC_SETUP,8,3 ## @R_3A_AUD_CLK_GEN_BASIC_SETUP
	.comm	_R_34_AUD_MAST_CLK_NOMINAL_INC,8,3 ## @R_34_AUD_MAST_CLK_NOMINAL_INC
	.no_dead_strip	_saa711x_s_clock_freq
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function saa711x_s_clock_freq
_saa711x_s_clock_freq:                  ; @saa711x_s_clock_freq
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
	mov	x20, x0
	bl	_to_state
	mov	x21, x0
	ldr	w0, [x0, #36]
Lloh0:
	adrp	x24, _R_30_AUD_MAST_CLK_CYCLES_PER_FIELD@GOTPAGE
Lloh1:
	ldr	x24, [x24, _R_30_AUD_MAST_CLK_CYCLES_PER_FIELD@GOTPAGEOFF]
	ldr	x1, [x24]
	bl	_saa711x_has_reg
	cbz	w0, LBB0_6
; %bb.1:
Lloh2:
	adrp	x8, _debug@GOTPAGE
Lloh3:
	ldr	x8, [x8, _debug@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
Lloh5:
	adrp	x3, l_.str@PAGE
Lloh6:
	add	x3, x3, l_.str@PAGEOFF
	mov	w0, #1
	mov	x2, x20
	mov	x4, x19
	bl	_v4l2_dbg
	mov	w8, #-48001
	mov	w9, #-16002
	add	w8, w19, w8
	cmp	w8, w9
	b.hi	LBB0_3
; %bb.2:
Lloh7:
	adrp	x8, _EINVAL@GOTPAGE
Lloh8:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_6
LBB0_3:
	ldr	w8, [x21]
Lloh10:
	adrp	x9, _V4L2_STD_525_60@GOTPAGE
Lloh11:
	ldr	x9, [x9, _V4L2_STD_525_60@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	tst	w9, w8
	mov	w8, #5994
	mov	w9, #5000
	csel	w8, w9, w8, eq
	mov	w9, #25600
	mul	w9, w19, w9
	udiv	w25, w9, w8
	lsl	w22, w19, #31
	ldr	w1, [x21, #32]
	mov	x0, x22
	bl	_do_div
	ldr	x8, [x21, #24]
	cbz	x8, LBB0_5
; %bb.4:
	ldr	w8, [x21, #4]
	mul	w9, w8, w25
	add	w10, w9, #15
	cmp	w9, #0
	csel	w9, w10, w9, lt
	asr	w25, w9, #4
	mul	w9, w8, w22
	add	w10, w9, #15
	cmp	w9, #0
	csel	w9, w10, w9, lt
	asr	w22, w9, #4
	mov	w9, #128
	mov	w10, #192
	cmp	w8, #3
	csel	w8, w10, w9, eq
LBB0_5:
	ldr	x9, [x21, #16]
	orr	w10, w8, #0x8
	cmp	x9, #0
	csel	w23, w8, w10, eq
	ldr	w8, [x21, #8]
	cmp	w8, #0
	cset	w8, ne
	lsl	w22, w22, w8
	lsl	w25, w25, w8
Lloh13:
	adrp	x8, _R_38_CLK_RATIO_AMXCLK_TO_ASCLK@GOTPAGE
Lloh14:
	ldr	x8, [x8, _R_38_CLK_RATIO_AMXCLK_TO_ASCLK@GOTPAGEOFF]
Lloh15:
	ldr	x1, [x8]
	mov	x0, x20
	mov	w2, #3
	bl	_saa711x_write
Lloh16:
	adrp	x8, _R_39_CLK_RATIO_ASCLK_TO_ALRCLK@GOTPAGE
Lloh17:
	ldr	x8, [x8, _R_39_CLK_RATIO_ASCLK_TO_ALRCLK@GOTPAGEOFF]
Lloh18:
	ldr	x1, [x8]
	ldr	w8, [x21, #8]
	mov	w9, #16
	lsl	w2, w9, w8
	mov	x0, x20
	bl	_saa711x_write
Lloh19:
	adrp	x8, _R_3A_AUD_CLK_GEN_BASIC_SETUP@GOTPAGE
Lloh20:
	ldr	x8, [x8, _R_3A_AUD_CLK_GEN_BASIC_SETUP@GOTPAGEOFF]
Lloh21:
	ldr	x1, [x8]
	mov	x0, x20
	mov	x2, x23
	bl	_saa711x_write
	ldr	x1, [x24]
	and	w2, w25, #0xff
	mov	x0, x20
	bl	_saa711x_write
	ldr	x8, [x24]
	add	x1, x8, #1
	ubfx	w2, w25, #8, #8
	mov	x0, x20
	bl	_saa711x_write
	ldr	x8, [x24]
	add	x1, x8, #2
	ubfx	w2, w25, #16, #2
	mov	x0, x20
	bl	_saa711x_write
Lloh22:
	adrp	x23, _R_34_AUD_MAST_CLK_NOMINAL_INC@GOTPAGE
Lloh23:
	ldr	x23, [x23, _R_34_AUD_MAST_CLK_NOMINAL_INC@GOTPAGEOFF]
	ldr	x1, [x23]
	and	w2, w22, #0xff
	mov	x0, x20
	bl	_saa711x_write
	ldr	x8, [x23]
	add	x1, x8, #1
	ubfx	w2, w22, #8, #8
	mov	x0, x20
	bl	_saa711x_write
	ldr	x8, [x23]
	add	x1, x8, #2
	ubfx	w2, w22, #16, #6
	mov	x0, x20
	bl	_saa711x_write
	mov	w0, #0
	str	w19, [x21, #12]
LBB0_6:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.cfi_endproc
                                        ; -- End function
	.comm	_R_30_AUD_MAST_CLK_CYCLES_PER_FIELD,8,3 ; @R_30_AUD_MAST_CLK_CYCLES_PER_FIELD
	.comm	_debug,4,2                      ; @debug
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"set audio clock freq: %d\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_V4L2_STD_525_60,4,2            ; @V4L2_STD_525_60
	.comm	_R_38_CLK_RATIO_AMXCLK_TO_ASCLK,8,3 ; @R_38_CLK_RATIO_AMXCLK_TO_ASCLK
	.comm	_R_39_CLK_RATIO_ASCLK_TO_ALRCLK,8,3 ; @R_39_CLK_RATIO_ASCLK_TO_ALRCLK
	.comm	_R_3A_AUD_CLK_GEN_BASIC_SETUP,8,3 ; @R_3A_AUD_CLK_GEN_BASIC_SETUP
	.comm	_R_34_AUD_MAST_CLK_NOMINAL_INC,8,3 ; @R_34_AUD_MAST_CLK_NOMINAL_INC
	.no_dead_strip	_saa711x_s_clock_freq
.subsections_via_symbols
