	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function atl1_configure
_atl1_configure:                        ## @atl1_configure
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_REG_ISR@GOTPCREL(%rip), %r15
	movq	(%r15), %rsi
	addq	32(%rdi), %rsi
	movl	$-1, %edi
	callq	_iowrite32
	movq	216(%r14), %rax
	movl	16(%rax), %ecx
	movl	24(%rax), %edx
	shll	$24, %ecx
	shll	$16, %edx
	orl	%ecx, %edx
	movl	32(%rax), %edi
	shll	$8, %edi
	orl	%edx, %edi
	orl	40(%rax), %edi
	movq	_REG_MAC_STA_ADDR@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movq	32(%r14), %rax
	movq	216(%r14), %rcx
	movl	(%rcx), %edi
	shll	$8, %edi
	orl	8(%rcx), %edi
	movq	(%rbx), %rcx
	leaq	(%rax,%rcx), %rsi
	addq	$4, %rsi
	callq	_iowrite32
	movl	224(%r14), %edi
	sarl	$31, %edi
	movq	_REG_DESC_BASE_ADDR_HI@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	248(%r14), %edi
	movq	_REG_DESC_RFD_ADDR_LO@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	264(%r14), %edi
	movq	_REG_DESC_RRD_ADDR_LO@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	224(%r14), %edi
	movq	_REG_DESC_TPD_ADDR_LO@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	280(%r14), %edi
	movq	_REG_DESC_CMB_ADDR_LO@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	276(%r14), %edi
	movq	_REG_DESC_SMB_ADDR_LO@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	268(%r14), %edi
	shll	$16, %edi
	addl	256(%r14), %edi
	movq	_REG_DESC_RFD_RRD_RING_SIZE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	228(%r14), %edi
	movq	_REG_DESC_TPD_RING_SIZE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movq	_REG_LOAD_PTR@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	movl	$1, %edi
	callq	_iowrite32
	leaq	232(%r14), %rdi
	callq	_atomic_read
	movl	%eax, %ebx
	movq	_MB_TPD_PROD_INDX_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movq	_MB_TPD_PROD_INDX_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %ebx
	leaq	272(%r14), %rdi
	callq	_atomic_read
	movq	_MB_RRD_CONS_INDX_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_MB_RRD_CONS_INDX_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %ebx
	leaq	252(%r14), %rdi
	callq	_atomic_read
	movq	_MB_RFD_PROD_INDX_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_MB_RFD_PROD_INDX_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %ebx
	movq	_REG_MAILBOX@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	movl	%ebx, %edi
	callq	_iowrite32
	movq	_MAC_IPG_IFG_IPGT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	208(%r14), %eax
	movq	_MAC_IPG_IFG_IPGT_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_MAC_IPG_IFG_MIFG_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	200(%r14), %edx
	movq	_MAC_IPG_IFG_MIFG_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_MAC_IPG_IFG_IPGR1_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	andl	192(%r14), %esi
	movq	_MAC_IPG_IFG_IPGR1_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	movq	_MAC_IPG_IFG_IPGR2_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	andl	184(%r14), %edi
	movq	_MAC_IPG_IFG_IPGR2_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edi
	orl	%eax, %edx
	orl	%esi, %edi
	orl	%edx, %edi
	movq	_REG_MAC_IPG_IFG@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movq	_MAC_HALF_DUPLX_CTRL_LCOL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MAC_HALF_DUPLX_CTRL_RETRY_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	168(%r14), %eax
	movq	_MAC_HALF_DUPLX_CTRL_RETRY_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	andl	176(%r14), %edx
	movq	_MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$10, %esi
	shll	%cl, %esi
	orl	%edx, %eax
	movq	_MAC_HALF_DUPLX_CTRL_JAMIPG_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	andl	160(%r14), %edi
	movq	_MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_MAC_HALF_DUPLX_CTRL_EXC_DEF_EN@GOTPCREL(%rip), %rdx
	shll	%cl, %edi
	orl	(%rdx), %eax
	orl	%esi, %edi
	orl	%eax, %edi
	movq	_REG_MAC_HALF_DUPLX_CTRL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	240(%r14), %edi
	movq	_REG_IRQ_MODU_TIMER_INIT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite16
	movq	_MASTER_CTRL_ITIMER_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_REG_MASTER_CTRL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	236(%r14), %edi
	movq	_REG_CMBDISDMA_TIMER@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite16
	movl	(%r14), %edi
	movq	_REG_MTU@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movq	_RXQ_JMBOSZ_TH_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	152(%r14), %eax
	movq	_RXQ_JMBOSZ_TH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_RXQ_JMBO_LKAH_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	144(%r14), %edx
	movq	_RXQ_JMBO_LKAH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%eax, %edx
	movq	_RXQ_RRD_TIMER_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	136(%r14), %edi
	movq	_RXQ_RRD_TIMER_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edi
	orl	%edx, %edi
	movq	_REG_RXQ_JMBOSZ_RRDTIM@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	4(%r14), %eax
	leal	-36865(%rax), %ecx
	cmpl	$3, %ecx
	jb	LBB0_2
## %bb.1:
	cmpl	$32769, %eax                    ## imm = 0x8001
	jne	LBB0_3
LBB0_2:
	movq	%r14, %rdi
	callq	_set_flow_ctrl_old
	jmp	LBB0_4
LBB0_3:
	movq	%r14, %rdi
	callq	_set_flow_ctrl_new
LBB0_4:
	movq	_TXQ_CTRL_TPD_BURST_NUM_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	128(%r14), %eax
	movq	_TXQ_CTRL_TPD_BURST_NUM_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_TXQ_CTRL_TXF_BURST_NUM_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	120(%r14), %edx
	movq	_TXQ_CTRL_TXF_BURST_NUM_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%eax, %edx
	movq	_TXQ_CTRL_TPD_FETCH_TH_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	112(%r14), %edi
	movq	_TXQ_CTRL_TPD_FETCH_TH_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edi
	orl	%edx, %edi
	movq	_TXQ_CTRL_ENH_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_TXQ_CTRL_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_REG_TXQ_CTRL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movq	_TX_JUMBO_TASK_TH_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	104(%r14), %eax
	movq	_TX_JUMBO_TASK_TH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_TX_TPD_MIN_IPG_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	andl	96(%r14), %edi
	movq	_TX_TPD_MIN_IPG_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edi
	orl	%eax, %edi
	movq	_REG_TX_JUMBO_TASK_TH_TPD_IPG@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movq	_RXQ_CTRL_RFD_BURST_NUM_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	88(%r14), %eax
	movq	_RXQ_CTRL_RFD_BURST_NUM_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_RXQ_CTRL_RRD_BURST_THRESH_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	80(%r14), %edx
	movq	_RXQ_CTRL_RRD_BURST_THRESH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%eax, %edx
	movq	_RXQ_CTRL_RFD_PREF_MIN_IPG_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	72(%r14), %edi
	movq	_RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %edi
	orl	%edx, %edi
	movq	_RXQ_CTRL_CUT_THRU_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_RXQ_CTRL_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_REG_RXQ_CTRL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movq	_DMA_CTRL_DMAR_BURST_LEN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	64(%r14), %eax
	movq	_DMA_CTRL_DMAR_BURST_LEN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_DMA_CTRL_DMAW_BURST_LEN_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	andl	56(%r14), %edi
	movq	_DMA_CTRL_DMAW_BURST_LEN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edi
	orl	%eax, %edi
	movq	_DMA_CTRL_DMAR_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_DMA_CTRL_DMAW_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	orl	48(%r14), %edi
	movq	_atl1_rcb_128@GOTPCREL(%rip), %rax
	movq	(%rax), %rcx
	movl	$0, %eax
	cmpq	8(%r14), %rcx
	jne	LBB0_6
## %bb.5:
	movq	_DMA_CTRL_RCB_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_6:
	orl	%eax, %edi
	movq	_REG_DMA_CTRL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	16(%r14), %eax
	movl	228(%r14), %edi
	cmpl	%edi, %eax
	cmovgl	%eax, %edi
	shll	$16, %edi
	orl	20(%r14), %edi
	movq	_REG_CMB_WRITE_TH@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	40(%r14), %edi
	shll	$16, %edi
	orl	24(%r14), %edi
	movq	_REG_CMB_WRITE_TIMER@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movl	28(%r14), %edi
	movq	_REG_SMB_TIMER@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movq	_CSMB_CTRL_CMB_EN@GOTPCREL(%rip), %rax
	movq	_CSMB_CTRL_SMB_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	orl	(%rax), %edi
	movq	_REG_CSMB_CTRL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	32(%r14), %rsi
	callq	_iowrite32
	movq	(%r15), %rdi
	addq	32(%r14), %rdi
	callq	_ioread32
	movq	_ISR_PHY_LINKDOWN@GOTPCREL(%rip), %rcx
	xorl	%edi, %edi
	andl	(%rcx), %eax
	setne	%dil
	callq	_unlikely
	xorl	%ebx, %ebx
	testq	%rax, %rax
	setne	%bl
	movq	(%r15), %rsi
	addq	32(%r14), %rsi
	movl	$1073741823, %edi               ## imm = 0x3FFFFFFF
	callq	_iowrite32
	movq	(%r15), %rsi
	addq	32(%r14), %rsi
	xorl	%edi, %edi
	callq	_iowrite32
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_ISR,8,3                    ## @REG_ISR
	.comm	_REG_MAC_STA_ADDR,8,3           ## @REG_MAC_STA_ADDR
	.comm	_REG_DESC_BASE_ADDR_HI,8,3      ## @REG_DESC_BASE_ADDR_HI
	.comm	_REG_DESC_RFD_ADDR_LO,8,3       ## @REG_DESC_RFD_ADDR_LO
	.comm	_REG_DESC_RRD_ADDR_LO,8,3       ## @REG_DESC_RRD_ADDR_LO
	.comm	_REG_DESC_TPD_ADDR_LO,8,3       ## @REG_DESC_TPD_ADDR_LO
	.comm	_REG_DESC_CMB_ADDR_LO,8,3       ## @REG_DESC_CMB_ADDR_LO
	.comm	_REG_DESC_SMB_ADDR_LO,8,3       ## @REG_DESC_SMB_ADDR_LO
	.comm	_REG_DESC_RFD_RRD_RING_SIZE,8,3 ## @REG_DESC_RFD_RRD_RING_SIZE
	.comm	_REG_DESC_TPD_RING_SIZE,8,3     ## @REG_DESC_TPD_RING_SIZE
	.comm	_REG_LOAD_PTR,8,3               ## @REG_LOAD_PTR
	.comm	_MB_TPD_PROD_INDX_MASK,4,2      ## @MB_TPD_PROD_INDX_MASK
	.comm	_MB_TPD_PROD_INDX_SHIFT,4,2     ## @MB_TPD_PROD_INDX_SHIFT
	.comm	_MB_RRD_CONS_INDX_MASK,4,2      ## @MB_RRD_CONS_INDX_MASK
	.comm	_MB_RRD_CONS_INDX_SHIFT,4,2     ## @MB_RRD_CONS_INDX_SHIFT
	.comm	_MB_RFD_PROD_INDX_MASK,4,2      ## @MB_RFD_PROD_INDX_MASK
	.comm	_MB_RFD_PROD_INDX_SHIFT,4,2     ## @MB_RFD_PROD_INDX_SHIFT
	.comm	_REG_MAILBOX,8,3                ## @REG_MAILBOX
	.comm	_MAC_IPG_IFG_IPGT_MASK,4,2      ## @MAC_IPG_IFG_IPGT_MASK
	.comm	_MAC_IPG_IFG_IPGT_SHIFT,4,2     ## @MAC_IPG_IFG_IPGT_SHIFT
	.comm	_MAC_IPG_IFG_MIFG_MASK,4,2      ## @MAC_IPG_IFG_MIFG_MASK
	.comm	_MAC_IPG_IFG_MIFG_SHIFT,4,2     ## @MAC_IPG_IFG_MIFG_SHIFT
	.comm	_MAC_IPG_IFG_IPGR1_MASK,4,2     ## @MAC_IPG_IFG_IPGR1_MASK
	.comm	_MAC_IPG_IFG_IPGR1_SHIFT,4,2    ## @MAC_IPG_IFG_IPGR1_SHIFT
	.comm	_MAC_IPG_IFG_IPGR2_MASK,4,2     ## @MAC_IPG_IFG_IPGR2_MASK
	.comm	_MAC_IPG_IFG_IPGR2_SHIFT,4,2    ## @MAC_IPG_IFG_IPGR2_SHIFT
	.comm	_REG_MAC_IPG_IFG,8,3            ## @REG_MAC_IPG_IFG
	.comm	_MAC_HALF_DUPLX_CTRL_LCOL_MASK,4,2 ## @MAC_HALF_DUPLX_CTRL_LCOL_MASK
	.comm	_MAC_HALF_DUPLX_CTRL_RETRY_MASK,4,2 ## @MAC_HALF_DUPLX_CTRL_RETRY_MASK
	.comm	_MAC_HALF_DUPLX_CTRL_RETRY_SHIFT,4,2 ## @MAC_HALF_DUPLX_CTRL_RETRY_SHIFT
	.comm	_MAC_HALF_DUPLX_CTRL_EXC_DEF_EN,4,2 ## @MAC_HALF_DUPLX_CTRL_EXC_DEF_EN
	.comm	_MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT,4,2 ## @MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT
	.comm	_MAC_HALF_DUPLX_CTRL_JAMIPG_MASK,4,2 ## @MAC_HALF_DUPLX_CTRL_JAMIPG_MASK
	.comm	_MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT,4,2 ## @MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT
	.comm	_REG_MAC_HALF_DUPLX_CTRL,8,3    ## @REG_MAC_HALF_DUPLX_CTRL
	.comm	_REG_IRQ_MODU_TIMER_INIT,8,3    ## @REG_IRQ_MODU_TIMER_INIT
	.comm	_MASTER_CTRL_ITIMER_EN,4,2      ## @MASTER_CTRL_ITIMER_EN
	.comm	_REG_MASTER_CTRL,8,3            ## @REG_MASTER_CTRL
	.comm	_REG_CMBDISDMA_TIMER,8,3        ## @REG_CMBDISDMA_TIMER
	.comm	_REG_MTU,8,3                    ## @REG_MTU
	.comm	_RXQ_JMBOSZ_TH_MASK,4,2         ## @RXQ_JMBOSZ_TH_MASK
	.comm	_RXQ_JMBOSZ_TH_SHIFT,4,2        ## @RXQ_JMBOSZ_TH_SHIFT
	.comm	_RXQ_JMBO_LKAH_MASK,4,2         ## @RXQ_JMBO_LKAH_MASK
	.comm	_RXQ_JMBO_LKAH_SHIFT,4,2        ## @RXQ_JMBO_LKAH_SHIFT
	.comm	_RXQ_RRD_TIMER_MASK,4,2         ## @RXQ_RRD_TIMER_MASK
	.comm	_RXQ_RRD_TIMER_SHIFT,4,2        ## @RXQ_RRD_TIMER_SHIFT
	.comm	_REG_RXQ_JMBOSZ_RRDTIM,8,3      ## @REG_RXQ_JMBOSZ_RRDTIM
	.comm	_TXQ_CTRL_TPD_BURST_NUM_MASK,4,2 ## @TXQ_CTRL_TPD_BURST_NUM_MASK
	.comm	_TXQ_CTRL_TPD_BURST_NUM_SHIFT,4,2 ## @TXQ_CTRL_TPD_BURST_NUM_SHIFT
	.comm	_TXQ_CTRL_TXF_BURST_NUM_MASK,4,2 ## @TXQ_CTRL_TXF_BURST_NUM_MASK
	.comm	_TXQ_CTRL_TXF_BURST_NUM_SHIFT,4,2 ## @TXQ_CTRL_TXF_BURST_NUM_SHIFT
	.comm	_TXQ_CTRL_TPD_FETCH_TH_MASK,4,2 ## @TXQ_CTRL_TPD_FETCH_TH_MASK
	.comm	_TXQ_CTRL_TPD_FETCH_TH_SHIFT,4,2 ## @TXQ_CTRL_TPD_FETCH_TH_SHIFT
	.comm	_TXQ_CTRL_ENH_MODE,4,2          ## @TXQ_CTRL_ENH_MODE
	.comm	_TXQ_CTRL_EN,4,2                ## @TXQ_CTRL_EN
	.comm	_REG_TXQ_CTRL,8,3               ## @REG_TXQ_CTRL
	.comm	_TX_JUMBO_TASK_TH_MASK,4,2      ## @TX_JUMBO_TASK_TH_MASK
	.comm	_TX_JUMBO_TASK_TH_SHIFT,4,2     ## @TX_JUMBO_TASK_TH_SHIFT
	.comm	_TX_TPD_MIN_IPG_MASK,4,2        ## @TX_TPD_MIN_IPG_MASK
	.comm	_TX_TPD_MIN_IPG_SHIFT,4,2       ## @TX_TPD_MIN_IPG_SHIFT
	.comm	_REG_TX_JUMBO_TASK_TH_TPD_IPG,8,3 ## @REG_TX_JUMBO_TASK_TH_TPD_IPG
	.comm	_RXQ_CTRL_RFD_BURST_NUM_MASK,4,2 ## @RXQ_CTRL_RFD_BURST_NUM_MASK
	.comm	_RXQ_CTRL_RFD_BURST_NUM_SHIFT,4,2 ## @RXQ_CTRL_RFD_BURST_NUM_SHIFT
	.comm	_RXQ_CTRL_RRD_BURST_THRESH_MASK,4,2 ## @RXQ_CTRL_RRD_BURST_THRESH_MASK
	.comm	_RXQ_CTRL_RRD_BURST_THRESH_SHIFT,4,2 ## @RXQ_CTRL_RRD_BURST_THRESH_SHIFT
	.comm	_RXQ_CTRL_RFD_PREF_MIN_IPG_MASK,4,2 ## @RXQ_CTRL_RFD_PREF_MIN_IPG_MASK
	.comm	_RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT,4,2 ## @RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT
	.comm	_RXQ_CTRL_CUT_THRU_EN,4,2       ## @RXQ_CTRL_CUT_THRU_EN
	.comm	_RXQ_CTRL_EN,4,2                ## @RXQ_CTRL_EN
	.comm	_REG_RXQ_CTRL,8,3               ## @REG_RXQ_CTRL
	.comm	_DMA_CTRL_DMAR_BURST_LEN_MASK,4,2 ## @DMA_CTRL_DMAR_BURST_LEN_MASK
	.comm	_DMA_CTRL_DMAR_BURST_LEN_SHIFT,4,2 ## @DMA_CTRL_DMAR_BURST_LEN_SHIFT
	.comm	_DMA_CTRL_DMAW_BURST_LEN_MASK,4,2 ## @DMA_CTRL_DMAW_BURST_LEN_MASK
	.comm	_DMA_CTRL_DMAW_BURST_LEN_SHIFT,4,2 ## @DMA_CTRL_DMAW_BURST_LEN_SHIFT
	.comm	_DMA_CTRL_DMAR_EN,4,2           ## @DMA_CTRL_DMAR_EN
	.comm	_DMA_CTRL_DMAW_EN,4,2           ## @DMA_CTRL_DMAW_EN
	.comm	_atl1_rcb_128,8,3               ## @atl1_rcb_128
	.comm	_DMA_CTRL_RCB_VALUE,4,2         ## @DMA_CTRL_RCB_VALUE
	.comm	_REG_DMA_CTRL,8,3               ## @REG_DMA_CTRL
	.comm	_REG_CMB_WRITE_TH,8,3           ## @REG_CMB_WRITE_TH
	.comm	_REG_CMB_WRITE_TIMER,8,3        ## @REG_CMB_WRITE_TIMER
	.comm	_REG_SMB_TIMER,8,3              ## @REG_SMB_TIMER
	.comm	_CSMB_CTRL_CMB_EN,4,2           ## @CSMB_CTRL_CMB_EN
	.comm	_CSMB_CTRL_SMB_EN,4,2           ## @CSMB_CTRL_SMB_EN
	.comm	_REG_CSMB_CTRL,8,3              ## @REG_CSMB_CTRL
	.comm	_ISR_PHY_LINKDOWN,4,2           ## @ISR_PHY_LINKDOWN
	.no_dead_strip	_atl1_configure
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function atl1_configure
_atl1_configure:                        ; @atl1_configure
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0, #32]
Lloh0:
	adrp	x21, _REG_ISR@GOTPAGE
Lloh1:
	ldr	x21, [x21, _REG_ISR@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x1, x9, x8
	mov	w0, #-1
	bl	_iowrite32
	ldr	x8, [x19, #216]
	ldr	w9, [x8, #16]
	ldr	w10, [x8, #24]
	lsl	w10, w10, #16
	orr	w9, w10, w9, lsl #24
	ldr	w10, [x8, #32]
	orr	w9, w9, w10, lsl #8
	ldr	w8, [x8, #40]
	orr	w0, w9, w8
	ldr	x8, [x19, #32]
Lloh2:
	adrp	x20, _REG_MAC_STA_ADDR@GOTPAGE
Lloh3:
	ldr	x20, [x20, _REG_MAC_STA_ADDR@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	x8, [x19, #216]
	ldr	w9, [x8]
	ldr	w8, [x8, #8]
	orr	w0, w8, w9, lsl #8
	ldr	x8, [x19, #32]
	ldr	x9, [x20]
	add	x8, x8, x9
	add	x1, x8, #4
	bl	_iowrite32
	ldr	w8, [x19, #224]
	asr	w0, w8, #31
	ldr	x8, [x19, #32]
Lloh4:
	adrp	x9, _REG_DESC_BASE_ADDR_HI@GOTPAGE
Lloh5:
	ldr	x9, [x9, _REG_DESC_BASE_ADDR_HI@GOTPAGEOFF]
Lloh6:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w0, [x19, #248]
	ldr	x8, [x19, #32]
Lloh7:
	adrp	x9, _REG_DESC_RFD_ADDR_LO@GOTPAGE
Lloh8:
	ldr	x9, [x9, _REG_DESC_RFD_ADDR_LO@GOTPAGEOFF]
Lloh9:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w0, [x19, #264]
	ldr	x8, [x19, #32]
Lloh10:
	adrp	x9, _REG_DESC_RRD_ADDR_LO@GOTPAGE
Lloh11:
	ldr	x9, [x9, _REG_DESC_RRD_ADDR_LO@GOTPAGEOFF]
Lloh12:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w0, [x19, #224]
	ldr	x8, [x19, #32]
Lloh13:
	adrp	x9, _REG_DESC_TPD_ADDR_LO@GOTPAGE
Lloh14:
	ldr	x9, [x9, _REG_DESC_TPD_ADDR_LO@GOTPAGEOFF]
Lloh15:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w0, [x19, #280]
	ldr	x8, [x19, #32]
Lloh16:
	adrp	x9, _REG_DESC_CMB_ADDR_LO@GOTPAGE
Lloh17:
	ldr	x9, [x9, _REG_DESC_CMB_ADDR_LO@GOTPAGEOFF]
Lloh18:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w0, [x19, #276]
	ldr	x8, [x19, #32]
Lloh19:
	adrp	x9, _REG_DESC_SMB_ADDR_LO@GOTPAGE
Lloh20:
	ldr	x9, [x9, _REG_DESC_SMB_ADDR_LO@GOTPAGEOFF]
Lloh21:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w8, [x19, #268]
	ldr	w9, [x19, #256]
	add	w0, w9, w8, lsl #16
	ldr	x8, [x19, #32]
Lloh22:
	adrp	x9, _REG_DESC_RFD_RRD_RING_SIZE@GOTPAGE
Lloh23:
	ldr	x9, [x9, _REG_DESC_RFD_RRD_RING_SIZE@GOTPAGEOFF]
Lloh24:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w0, [x19, #228]
	ldr	x8, [x19, #32]
Lloh25:
	adrp	x9, _REG_DESC_TPD_RING_SIZE@GOTPAGE
Lloh26:
	ldr	x9, [x9, _REG_DESC_TPD_RING_SIZE@GOTPAGEOFF]
Lloh27:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	x8, [x19, #32]
Lloh28:
	adrp	x9, _REG_LOAD_PTR@GOTPAGE
Lloh29:
	ldr	x9, [x9, _REG_LOAD_PTR@GOTPAGEOFF]
Lloh30:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	w0, #1
	bl	_iowrite32
	add	x0, x19, #232
	bl	_atomic_read
Lloh31:
	adrp	x8, _MB_TPD_PROD_INDX_MASK@GOTPAGE
Lloh32:
	ldr	x8, [x8, _MB_TPD_PROD_INDX_MASK@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh34:
	adrp	x9, _MB_TPD_PROD_INDX_SHIFT@GOTPAGE
Lloh35:
	ldr	x9, [x9, _MB_TPD_PROD_INDX_SHIFT@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	lsl	w20, w8, w9
	add	x0, x19, #272
	bl	_atomic_read
Lloh37:
	adrp	x8, _MB_RRD_CONS_INDX_MASK@GOTPAGE
Lloh38:
	ldr	x8, [x8, _MB_RRD_CONS_INDX_MASK@GOTPAGEOFF]
Lloh39:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh40:
	adrp	x9, _MB_RRD_CONS_INDX_SHIFT@GOTPAGE
Lloh41:
	ldr	x9, [x9, _MB_RRD_CONS_INDX_SHIFT@GOTPAGEOFF]
Lloh42:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	orr	w20, w8, w20
	add	x0, x19, #252
	bl	_atomic_read
Lloh43:
	adrp	x8, _MB_RFD_PROD_INDX_MASK@GOTPAGE
Lloh44:
	ldr	x8, [x8, _MB_RFD_PROD_INDX_MASK@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh46:
	adrp	x9, _MB_RFD_PROD_INDX_SHIFT@GOTPAGE
Lloh47:
	ldr	x9, [x9, _MB_RFD_PROD_INDX_SHIFT@GOTPAGEOFF]
Lloh48:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	orr	w0, w20, w8
	ldr	x8, [x19, #32]
Lloh49:
	adrp	x9, _REG_MAILBOX@GOTPAGE
Lloh50:
	ldr	x9, [x9, _REG_MAILBOX@GOTPAGEOFF]
Lloh51:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
Lloh52:
	adrp	x8, _MAC_IPG_IFG_IPGT_MASK@GOTPAGE
Lloh53:
	ldr	x8, [x8, _MAC_IPG_IFG_IPGT_MASK@GOTPAGEOFF]
	ldr	w9, [x19, #208]
Lloh54:
	ldr	w8, [x8]
	and	w8, w8, w9
Lloh55:
	adrp	x9, _MAC_IPG_IFG_IPGT_SHIFT@GOTPAGE
Lloh56:
	ldr	x9, [x9, _MAC_IPG_IFG_IPGT_SHIFT@GOTPAGEOFF]
Lloh57:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	ldr	w9, [x19, #200]
Lloh58:
	adrp	x10, _MAC_IPG_IFG_MIFG_MASK@GOTPAGE
Lloh59:
	ldr	x10, [x10, _MAC_IPG_IFG_MIFG_MASK@GOTPAGEOFF]
Lloh60:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh61:
	adrp	x10, _MAC_IPG_IFG_MIFG_SHIFT@GOTPAGE
Lloh62:
	ldr	x10, [x10, _MAC_IPG_IFG_MIFG_SHIFT@GOTPAGEOFF]
Lloh63:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
	ldr	w9, [x19, #192]
Lloh64:
	adrp	x10, _MAC_IPG_IFG_IPGR1_MASK@GOTPAGE
Lloh65:
	ldr	x10, [x10, _MAC_IPG_IFG_IPGR1_MASK@GOTPAGEOFF]
Lloh66:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh67:
	adrp	x10, _MAC_IPG_IFG_IPGR1_SHIFT@GOTPAGE
Lloh68:
	ldr	x10, [x10, _MAC_IPG_IFG_IPGR1_SHIFT@GOTPAGEOFF]
Lloh69:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w8, w9
	ldr	w9, [x19, #184]
Lloh70:
	adrp	x10, _MAC_IPG_IFG_IPGR2_MASK@GOTPAGE
Lloh71:
	ldr	x10, [x10, _MAC_IPG_IFG_IPGR2_MASK@GOTPAGEOFF]
Lloh72:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh73:
	adrp	x10, _MAC_IPG_IFG_IPGR2_SHIFT@GOTPAGE
Lloh74:
	ldr	x10, [x10, _MAC_IPG_IFG_IPGR2_SHIFT@GOTPAGEOFF]
Lloh75:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w0, w8, w9
	ldr	x8, [x19, #32]
Lloh76:
	adrp	x9, _REG_MAC_IPG_IFG@GOTPAGE
Lloh77:
	ldr	x9, [x9, _REG_MAC_IPG_IFG@GOTPAGEOFF]
Lloh78:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w8, [x19, #176]
Lloh79:
	adrp	x9, _MAC_HALF_DUPLX_CTRL_LCOL_MASK@GOTPAGE
Lloh80:
	ldr	x9, [x9, _MAC_HALF_DUPLX_CTRL_LCOL_MASK@GOTPAGEOFF]
Lloh81:
	ldr	w9, [x9]
	and	w8, w9, w8
	ldr	w9, [x19, #168]
Lloh82:
	adrp	x10, _MAC_HALF_DUPLX_CTRL_RETRY_MASK@GOTPAGE
Lloh83:
	ldr	x10, [x10, _MAC_HALF_DUPLX_CTRL_RETRY_MASK@GOTPAGEOFF]
Lloh84:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh85:
	adrp	x10, _MAC_HALF_DUPLX_CTRL_RETRY_SHIFT@GOTPAGE
Lloh86:
	ldr	x10, [x10, _MAC_HALF_DUPLX_CTRL_RETRY_SHIFT@GOTPAGEOFF]
Lloh87:
	ldr	w10, [x10]
	lsl	w9, w9, w10
Lloh88:
	adrp	x10, _MAC_HALF_DUPLX_CTRL_EXC_DEF_EN@GOTPAGE
Lloh89:
	ldr	x10, [x10, _MAC_HALF_DUPLX_CTRL_EXC_DEF_EN@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh90:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh91:
	adrp	x9, _MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT@GOTPAGE
Lloh92:
	ldr	x9, [x9, _MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT@GOTPAGEOFF]
Lloh93:
	ldr	w9, [x9]
	mov	w10, #10
	lsl	w9, w10, w9
	orr	w8, w8, w9
	ldr	w9, [x19, #160]
Lloh94:
	adrp	x10, _MAC_HALF_DUPLX_CTRL_JAMIPG_MASK@GOTPAGE
Lloh95:
	ldr	x10, [x10, _MAC_HALF_DUPLX_CTRL_JAMIPG_MASK@GOTPAGEOFF]
Lloh96:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh97:
	adrp	x10, _MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT@GOTPAGE
Lloh98:
	ldr	x10, [x10, _MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT@GOTPAGEOFF]
Lloh99:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w0, w8, w9
	ldr	x8, [x19, #32]
Lloh100:
	adrp	x9, _REG_MAC_HALF_DUPLX_CTRL@GOTPAGE
Lloh101:
	ldr	x9, [x9, _REG_MAC_HALF_DUPLX_CTRL@GOTPAGEOFF]
Lloh102:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w0, [x19, #240]
	ldr	x8, [x19, #32]
Lloh103:
	adrp	x9, _REG_IRQ_MODU_TIMER_INIT@GOTPAGE
Lloh104:
	ldr	x9, [x9, _REG_IRQ_MODU_TIMER_INIT@GOTPAGEOFF]
Lloh105:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite16
Lloh106:
	adrp	x8, _MASTER_CTRL_ITIMER_EN@GOTPAGE
Lloh107:
	ldr	x8, [x8, _MASTER_CTRL_ITIMER_EN@GOTPAGEOFF]
Lloh108:
	ldr	w0, [x8]
	ldr	x8, [x19, #32]
Lloh109:
	adrp	x9, _REG_MASTER_CTRL@GOTPAGE
Lloh110:
	ldr	x9, [x9, _REG_MASTER_CTRL@GOTPAGEOFF]
Lloh111:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w0, [x19, #236]
	ldr	x8, [x19, #32]
Lloh112:
	adrp	x9, _REG_CMBDISDMA_TIMER@GOTPAGE
Lloh113:
	ldr	x9, [x9, _REG_CMBDISDMA_TIMER@GOTPAGEOFF]
Lloh114:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite16
	ldr	w0, [x19]
	ldr	x8, [x19, #32]
Lloh115:
	adrp	x9, _REG_MTU@GOTPAGE
Lloh116:
	ldr	x9, [x9, _REG_MTU@GOTPAGEOFF]
Lloh117:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w8, [x19, #152]
Lloh118:
	adrp	x9, _RXQ_JMBOSZ_TH_MASK@GOTPAGE
Lloh119:
	ldr	x9, [x9, _RXQ_JMBOSZ_TH_MASK@GOTPAGEOFF]
Lloh120:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh121:
	adrp	x9, _RXQ_JMBOSZ_TH_SHIFT@GOTPAGE
Lloh122:
	ldr	x9, [x9, _RXQ_JMBOSZ_TH_SHIFT@GOTPAGEOFF]
Lloh123:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	ldr	w9, [x19, #144]
Lloh124:
	adrp	x10, _RXQ_JMBO_LKAH_MASK@GOTPAGE
Lloh125:
	ldr	x10, [x10, _RXQ_JMBO_LKAH_MASK@GOTPAGEOFF]
Lloh126:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh127:
	adrp	x10, _RXQ_JMBO_LKAH_SHIFT@GOTPAGE
Lloh128:
	ldr	x10, [x10, _RXQ_JMBO_LKAH_SHIFT@GOTPAGEOFF]
Lloh129:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
	ldr	w9, [x19, #136]
Lloh130:
	adrp	x10, _RXQ_RRD_TIMER_MASK@GOTPAGE
Lloh131:
	ldr	x10, [x10, _RXQ_RRD_TIMER_MASK@GOTPAGEOFF]
Lloh132:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh133:
	adrp	x10, _RXQ_RRD_TIMER_SHIFT@GOTPAGE
Lloh134:
	ldr	x10, [x10, _RXQ_RRD_TIMER_SHIFT@GOTPAGEOFF]
Lloh135:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w0, w8, w9
	ldr	x8, [x19, #32]
Lloh136:
	adrp	x9, _REG_RXQ_JMBOSZ_RRDTIM@GOTPAGE
Lloh137:
	ldr	x9, [x9, _REG_RXQ_JMBOSZ_RRDTIM@GOTPAGEOFF]
Lloh138:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w8, [x19, #4]
	mov	w9, #-36865
	add	w9, w8, w9
	cmp	w9, #3
	b.lo	LBB0_2
; %bb.1:
	mov	w9, #32769
	cmp	w8, w9
	b.ne	LBB0_3
LBB0_2:
	mov	x0, x19
	bl	_set_flow_ctrl_old
	b	LBB0_4
LBB0_3:
	mov	x0, x19
	bl	_set_flow_ctrl_new
LBB0_4:
	ldr	w8, [x19, #128]
Lloh139:
	adrp	x9, _TXQ_CTRL_TPD_BURST_NUM_MASK@GOTPAGE
Lloh140:
	ldr	x9, [x9, _TXQ_CTRL_TPD_BURST_NUM_MASK@GOTPAGEOFF]
Lloh141:
	ldr	w9, [x9]
Lloh142:
	adrp	x10, _TXQ_CTRL_TPD_BURST_NUM_SHIFT@GOTPAGE
Lloh143:
	ldr	x10, [x10, _TXQ_CTRL_TPD_BURST_NUM_SHIFT@GOTPAGEOFF]
	and	w8, w9, w8
Lloh144:
	ldr	w9, [x10]
	lsl	w8, w8, w9
	ldr	w9, [x19, #120]
Lloh145:
	adrp	x10, _TXQ_CTRL_TXF_BURST_NUM_MASK@GOTPAGE
Lloh146:
	ldr	x10, [x10, _TXQ_CTRL_TXF_BURST_NUM_MASK@GOTPAGEOFF]
Lloh147:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh148:
	adrp	x10, _TXQ_CTRL_TXF_BURST_NUM_SHIFT@GOTPAGE
Lloh149:
	ldr	x10, [x10, _TXQ_CTRL_TXF_BURST_NUM_SHIFT@GOTPAGEOFF]
Lloh150:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
	ldr	w9, [x19, #112]
Lloh151:
	adrp	x10, _TXQ_CTRL_TPD_FETCH_TH_MASK@GOTPAGE
Lloh152:
	ldr	x10, [x10, _TXQ_CTRL_TPD_FETCH_TH_MASK@GOTPAGEOFF]
Lloh153:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh154:
	adrp	x10, _TXQ_CTRL_TPD_FETCH_TH_SHIFT@GOTPAGE
Lloh155:
	ldr	x10, [x10, _TXQ_CTRL_TPD_FETCH_TH_SHIFT@GOTPAGEOFF]
Lloh156:
	ldr	w10, [x10]
	lsl	w9, w9, w10
Lloh157:
	adrp	x10, _TXQ_CTRL_ENH_MODE@GOTPAGE
Lloh158:
	ldr	x10, [x10, _TXQ_CTRL_ENH_MODE@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh159:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh160:
	adrp	x9, _TXQ_CTRL_EN@GOTPAGE
Lloh161:
	ldr	x9, [x9, _TXQ_CTRL_EN@GOTPAGEOFF]
Lloh162:
	ldr	w9, [x9]
	orr	w0, w8, w9
	ldr	x8, [x19, #32]
Lloh163:
	adrp	x9, _REG_TXQ_CTRL@GOTPAGE
Lloh164:
	ldr	x9, [x9, _REG_TXQ_CTRL@GOTPAGEOFF]
Lloh165:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w8, [x19, #104]
Lloh166:
	adrp	x9, _TX_JUMBO_TASK_TH_MASK@GOTPAGE
Lloh167:
	ldr	x9, [x9, _TX_JUMBO_TASK_TH_MASK@GOTPAGEOFF]
Lloh168:
	ldr	w9, [x9]
Lloh169:
	adrp	x10, _TX_JUMBO_TASK_TH_SHIFT@GOTPAGE
Lloh170:
	ldr	x10, [x10, _TX_JUMBO_TASK_TH_SHIFT@GOTPAGEOFF]
	and	w8, w9, w8
Lloh171:
	ldr	w9, [x10]
	lsl	w8, w8, w9
	ldr	w9, [x19, #96]
Lloh172:
	adrp	x10, _TX_TPD_MIN_IPG_MASK@GOTPAGE
Lloh173:
	ldr	x10, [x10, _TX_TPD_MIN_IPG_MASK@GOTPAGEOFF]
Lloh174:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh175:
	adrp	x10, _TX_TPD_MIN_IPG_SHIFT@GOTPAGE
Lloh176:
	ldr	x10, [x10, _TX_TPD_MIN_IPG_SHIFT@GOTPAGEOFF]
Lloh177:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w0, w9, w8
	ldr	x8, [x19, #32]
Lloh178:
	adrp	x9, _REG_TX_JUMBO_TASK_TH_TPD_IPG@GOTPAGE
Lloh179:
	ldr	x9, [x9, _REG_TX_JUMBO_TASK_TH_TPD_IPG@GOTPAGEOFF]
Lloh180:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w8, [x19, #88]
Lloh181:
	adrp	x9, _RXQ_CTRL_RFD_BURST_NUM_MASK@GOTPAGE
Lloh182:
	ldr	x9, [x9, _RXQ_CTRL_RFD_BURST_NUM_MASK@GOTPAGEOFF]
Lloh183:
	ldr	w9, [x9]
Lloh184:
	adrp	x10, _RXQ_CTRL_RFD_BURST_NUM_SHIFT@GOTPAGE
Lloh185:
	ldr	x10, [x10, _RXQ_CTRL_RFD_BURST_NUM_SHIFT@GOTPAGEOFF]
	and	w8, w9, w8
Lloh186:
	ldr	w9, [x10]
	lsl	w8, w8, w9
	ldr	w9, [x19, #80]
Lloh187:
	adrp	x10, _RXQ_CTRL_RRD_BURST_THRESH_MASK@GOTPAGE
Lloh188:
	ldr	x10, [x10, _RXQ_CTRL_RRD_BURST_THRESH_MASK@GOTPAGEOFF]
Lloh189:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh190:
	adrp	x10, _RXQ_CTRL_RRD_BURST_THRESH_SHIFT@GOTPAGE
Lloh191:
	ldr	x10, [x10, _RXQ_CTRL_RRD_BURST_THRESH_SHIFT@GOTPAGEOFF]
Lloh192:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
	ldr	w9, [x19, #72]
Lloh193:
	adrp	x10, _RXQ_CTRL_RFD_PREF_MIN_IPG_MASK@GOTPAGE
Lloh194:
	ldr	x10, [x10, _RXQ_CTRL_RFD_PREF_MIN_IPG_MASK@GOTPAGEOFF]
Lloh195:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh196:
	adrp	x10, _RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT@GOTPAGE
Lloh197:
	ldr	x10, [x10, _RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT@GOTPAGEOFF]
Lloh198:
	ldr	w10, [x10]
	lsl	w9, w9, w10
Lloh199:
	adrp	x10, _RXQ_CTRL_CUT_THRU_EN@GOTPAGE
Lloh200:
	ldr	x10, [x10, _RXQ_CTRL_CUT_THRU_EN@GOTPAGEOFF]
	orr	w8, w8, w9
Lloh201:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh202:
	adrp	x9, _RXQ_CTRL_EN@GOTPAGE
Lloh203:
	ldr	x9, [x9, _RXQ_CTRL_EN@GOTPAGEOFF]
Lloh204:
	ldr	w9, [x9]
	orr	w0, w8, w9
	ldr	x8, [x19, #32]
Lloh205:
	adrp	x9, _REG_RXQ_CTRL@GOTPAGE
Lloh206:
	ldr	x9, [x9, _REG_RXQ_CTRL@GOTPAGEOFF]
Lloh207:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
Lloh208:
	adrp	x8, _DMA_CTRL_DMAR_BURST_LEN_MASK@GOTPAGE
Lloh209:
	ldr	x8, [x8, _DMA_CTRL_DMAR_BURST_LEN_MASK@GOTPAGEOFF]
	ldr	w9, [x19, #64]
Lloh210:
	ldr	w8, [x8]
	and	w8, w8, w9
Lloh211:
	adrp	x9, _DMA_CTRL_DMAR_BURST_LEN_SHIFT@GOTPAGE
Lloh212:
	ldr	x9, [x9, _DMA_CTRL_DMAR_BURST_LEN_SHIFT@GOTPAGEOFF]
Lloh213:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	ldr	w9, [x19, #56]
Lloh214:
	adrp	x10, _DMA_CTRL_DMAW_BURST_LEN_MASK@GOTPAGE
Lloh215:
	ldr	x10, [x10, _DMA_CTRL_DMAW_BURST_LEN_MASK@GOTPAGEOFF]
Lloh216:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh217:
	adrp	x10, _DMA_CTRL_DMAW_BURST_LEN_SHIFT@GOTPAGE
Lloh218:
	ldr	x10, [x10, _DMA_CTRL_DMAW_BURST_LEN_SHIFT@GOTPAGEOFF]
Lloh219:
	ldr	w10, [x10]
	lsl	w9, w9, w10
Lloh220:
	adrp	x10, _DMA_CTRL_DMAR_EN@GOTPAGE
Lloh221:
	ldr	x10, [x10, _DMA_CTRL_DMAR_EN@GOTPAGEOFF]
	orr	w8, w9, w8
Lloh222:
	ldr	w9, [x10]
	orr	w8, w8, w9
Lloh223:
	adrp	x9, _DMA_CTRL_DMAW_EN@GOTPAGE
Lloh224:
	ldr	x9, [x9, _DMA_CTRL_DMAW_EN@GOTPAGEOFF]
Lloh225:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [x19, #48]
	orr	w8, w8, w9
Lloh226:
	adrp	x9, _atl1_rcb_128@GOTPAGE
Lloh227:
	ldr	x9, [x9, _atl1_rcb_128@GOTPAGEOFF]
Lloh228:
	ldr	x9, [x9]
	ldr	x10, [x19, #8]
Lloh229:
	adrp	x11, _DMA_CTRL_RCB_VALUE@GOTPAGE
Lloh230:
	ldr	x11, [x11, _DMA_CTRL_RCB_VALUE@GOTPAGEOFF]
Lloh231:
	ldr	w11, [x11]
	cmp	x9, x10
	csel	w9, w11, wzr, eq
	orr	w0, w8, w9
	ldr	x8, [x19, #32]
Lloh232:
	adrp	x9, _REG_DMA_CTRL@GOTPAGE
Lloh233:
	ldr	x9, [x9, _REG_DMA_CTRL@GOTPAGEOFF]
Lloh234:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w8, [x19, #228]
	ldp	w9, w10, [x19, #16]
	cmp	w9, w8
	csel	w8, w9, w8, gt
	orr	w0, w10, w8, lsl #16
	ldr	x8, [x19, #32]
Lloh235:
	adrp	x9, _REG_CMB_WRITE_TH@GOTPAGE
Lloh236:
	ldr	x9, [x9, _REG_CMB_WRITE_TH@GOTPAGEOFF]
Lloh237:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w8, [x19, #24]
	ldr	w9, [x19, #40]
	orr	w0, w8, w9, lsl #16
	ldr	x8, [x19, #32]
Lloh238:
	adrp	x9, _REG_CMB_WRITE_TIMER@GOTPAGE
Lloh239:
	ldr	x9, [x9, _REG_CMB_WRITE_TIMER@GOTPAGEOFF]
Lloh240:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	w0, [x19, #28]
	ldr	x8, [x19, #32]
Lloh241:
	adrp	x9, _REG_SMB_TIMER@GOTPAGE
Lloh242:
	ldr	x9, [x9, _REG_SMB_TIMER@GOTPAGEOFF]
Lloh243:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
Lloh244:
	adrp	x8, _CSMB_CTRL_CMB_EN@GOTPAGE
Lloh245:
	ldr	x8, [x8, _CSMB_CTRL_CMB_EN@GOTPAGEOFF]
Lloh246:
	ldr	w8, [x8]
Lloh247:
	adrp	x9, _CSMB_CTRL_SMB_EN@GOTPAGE
Lloh248:
	ldr	x9, [x9, _CSMB_CTRL_SMB_EN@GOTPAGEOFF]
Lloh249:
	ldr	w9, [x9]
	orr	w0, w9, w8
	ldr	x8, [x19, #32]
Lloh250:
	adrp	x9, _REG_CSMB_CTRL@GOTPAGE
Lloh251:
	ldr	x9, [x9, _REG_CSMB_CTRL@GOTPAGEOFF]
Lloh252:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_iowrite32
	ldr	x8, [x19, #32]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_ioread32
Lloh253:
	adrp	x8, _ISR_PHY_LINKDOWN@GOTPAGE
Lloh254:
	ldr	x8, [x8, _ISR_PHY_LINKDOWN@GOTPAGEOFF]
Lloh255:
	ldr	w8, [x8]
	tst	w8, w0
	cset	w0, ne
	bl	_unlikely
	cmp	x0, #0
	cset	w20, ne
	ldr	x8, [x19, #32]
	ldr	x9, [x21]
	add	x1, x9, x8
	mov	w0, #1073741823
	bl	_iowrite32
	ldr	x8, [x19, #32]
	ldr	x9, [x21]
	add	x1, x9, x8
	mov	w0, #0
	bl	_iowrite32
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh136, Lloh137, Lloh138
	.loh AdrpLdrGotLdr	Lloh133, Lloh134, Lloh135
	.loh AdrpLdrGotLdr	Lloh130, Lloh131, Lloh132
	.loh AdrpLdrGotLdr	Lloh127, Lloh128, Lloh129
	.loh AdrpLdrGotLdr	Lloh124, Lloh125, Lloh126
	.loh AdrpLdrGotLdr	Lloh121, Lloh122, Lloh123
	.loh AdrpLdrGotLdr	Lloh118, Lloh119, Lloh120
	.loh AdrpLdrGotLdr	Lloh115, Lloh116, Lloh117
	.loh AdrpLdrGotLdr	Lloh112, Lloh113, Lloh114
	.loh AdrpLdrGotLdr	Lloh109, Lloh110, Lloh111
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh253, Lloh254, Lloh255
	.loh AdrpLdrGotLdr	Lloh250, Lloh251, Lloh252
	.loh AdrpLdrGotLdr	Lloh247, Lloh248, Lloh249
	.loh AdrpLdrGotLdr	Lloh244, Lloh245, Lloh246
	.loh AdrpLdrGotLdr	Lloh241, Lloh242, Lloh243
	.loh AdrpLdrGotLdr	Lloh238, Lloh239, Lloh240
	.loh AdrpLdrGotLdr	Lloh235, Lloh236, Lloh237
	.loh AdrpLdrGotLdr	Lloh232, Lloh233, Lloh234
	.loh AdrpLdrGotLdr	Lloh229, Lloh230, Lloh231
	.loh AdrpLdrGotLdr	Lloh226, Lloh227, Lloh228
	.loh AdrpLdrGotLdr	Lloh223, Lloh224, Lloh225
	.loh AdrpLdrGotLdr	Lloh220, Lloh221, Lloh222
	.loh AdrpLdrGotLdr	Lloh217, Lloh218, Lloh219
	.loh AdrpLdrGotLdr	Lloh214, Lloh215, Lloh216
	.loh AdrpLdrGotLdr	Lloh211, Lloh212, Lloh213
	.loh AdrpLdrGotLdr	Lloh208, Lloh209, Lloh210
	.loh AdrpLdrGotLdr	Lloh205, Lloh206, Lloh207
	.loh AdrpLdrGotLdr	Lloh202, Lloh203, Lloh204
	.loh AdrpLdrGotLdr	Lloh199, Lloh200, Lloh201
	.loh AdrpLdrGotLdr	Lloh196, Lloh197, Lloh198
	.loh AdrpLdrGotLdr	Lloh193, Lloh194, Lloh195
	.loh AdrpLdrGotLdr	Lloh190, Lloh191, Lloh192
	.loh AdrpLdrGotLdr	Lloh187, Lloh188, Lloh189
	.loh AdrpLdrGotLdr	Lloh184, Lloh185, Lloh186
	.loh AdrpLdrGotLdr	Lloh181, Lloh182, Lloh183
	.loh AdrpLdrGotLdr	Lloh178, Lloh179, Lloh180
	.loh AdrpLdrGotLdr	Lloh175, Lloh176, Lloh177
	.loh AdrpLdrGotLdr	Lloh172, Lloh173, Lloh174
	.loh AdrpLdrGotLdr	Lloh169, Lloh170, Lloh171
	.loh AdrpLdrGotLdr	Lloh166, Lloh167, Lloh168
	.loh AdrpLdrGotLdr	Lloh163, Lloh164, Lloh165
	.loh AdrpLdrGotLdr	Lloh160, Lloh161, Lloh162
	.loh AdrpLdrGotLdr	Lloh157, Lloh158, Lloh159
	.loh AdrpLdrGotLdr	Lloh154, Lloh155, Lloh156
	.loh AdrpLdrGotLdr	Lloh151, Lloh152, Lloh153
	.loh AdrpLdrGotLdr	Lloh148, Lloh149, Lloh150
	.loh AdrpLdrGotLdr	Lloh145, Lloh146, Lloh147
	.loh AdrpLdrGotLdr	Lloh142, Lloh143, Lloh144
	.loh AdrpLdrGotLdr	Lloh139, Lloh140, Lloh141
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_ISR,8,3                    ; @REG_ISR
	.comm	_REG_MAC_STA_ADDR,8,3           ; @REG_MAC_STA_ADDR
	.comm	_REG_DESC_BASE_ADDR_HI,8,3      ; @REG_DESC_BASE_ADDR_HI
	.comm	_REG_DESC_RFD_ADDR_LO,8,3       ; @REG_DESC_RFD_ADDR_LO
	.comm	_REG_DESC_RRD_ADDR_LO,8,3       ; @REG_DESC_RRD_ADDR_LO
	.comm	_REG_DESC_TPD_ADDR_LO,8,3       ; @REG_DESC_TPD_ADDR_LO
	.comm	_REG_DESC_CMB_ADDR_LO,8,3       ; @REG_DESC_CMB_ADDR_LO
	.comm	_REG_DESC_SMB_ADDR_LO,8,3       ; @REG_DESC_SMB_ADDR_LO
	.comm	_REG_DESC_RFD_RRD_RING_SIZE,8,3 ; @REG_DESC_RFD_RRD_RING_SIZE
	.comm	_REG_DESC_TPD_RING_SIZE,8,3     ; @REG_DESC_TPD_RING_SIZE
	.comm	_REG_LOAD_PTR,8,3               ; @REG_LOAD_PTR
	.comm	_MB_TPD_PROD_INDX_MASK,4,2      ; @MB_TPD_PROD_INDX_MASK
	.comm	_MB_TPD_PROD_INDX_SHIFT,4,2     ; @MB_TPD_PROD_INDX_SHIFT
	.comm	_MB_RRD_CONS_INDX_MASK,4,2      ; @MB_RRD_CONS_INDX_MASK
	.comm	_MB_RRD_CONS_INDX_SHIFT,4,2     ; @MB_RRD_CONS_INDX_SHIFT
	.comm	_MB_RFD_PROD_INDX_MASK,4,2      ; @MB_RFD_PROD_INDX_MASK
	.comm	_MB_RFD_PROD_INDX_SHIFT,4,2     ; @MB_RFD_PROD_INDX_SHIFT
	.comm	_REG_MAILBOX,8,3                ; @REG_MAILBOX
	.comm	_MAC_IPG_IFG_IPGT_MASK,4,2      ; @MAC_IPG_IFG_IPGT_MASK
	.comm	_MAC_IPG_IFG_IPGT_SHIFT,4,2     ; @MAC_IPG_IFG_IPGT_SHIFT
	.comm	_MAC_IPG_IFG_MIFG_MASK,4,2      ; @MAC_IPG_IFG_MIFG_MASK
	.comm	_MAC_IPG_IFG_MIFG_SHIFT,4,2     ; @MAC_IPG_IFG_MIFG_SHIFT
	.comm	_MAC_IPG_IFG_IPGR1_MASK,4,2     ; @MAC_IPG_IFG_IPGR1_MASK
	.comm	_MAC_IPG_IFG_IPGR1_SHIFT,4,2    ; @MAC_IPG_IFG_IPGR1_SHIFT
	.comm	_MAC_IPG_IFG_IPGR2_MASK,4,2     ; @MAC_IPG_IFG_IPGR2_MASK
	.comm	_MAC_IPG_IFG_IPGR2_SHIFT,4,2    ; @MAC_IPG_IFG_IPGR2_SHIFT
	.comm	_REG_MAC_IPG_IFG,8,3            ; @REG_MAC_IPG_IFG
	.comm	_MAC_HALF_DUPLX_CTRL_LCOL_MASK,4,2 ; @MAC_HALF_DUPLX_CTRL_LCOL_MASK
	.comm	_MAC_HALF_DUPLX_CTRL_RETRY_MASK,4,2 ; @MAC_HALF_DUPLX_CTRL_RETRY_MASK
	.comm	_MAC_HALF_DUPLX_CTRL_RETRY_SHIFT,4,2 ; @MAC_HALF_DUPLX_CTRL_RETRY_SHIFT
	.comm	_MAC_HALF_DUPLX_CTRL_EXC_DEF_EN,4,2 ; @MAC_HALF_DUPLX_CTRL_EXC_DEF_EN
	.comm	_MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT,4,2 ; @MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT
	.comm	_MAC_HALF_DUPLX_CTRL_JAMIPG_MASK,4,2 ; @MAC_HALF_DUPLX_CTRL_JAMIPG_MASK
	.comm	_MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT,4,2 ; @MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT
	.comm	_REG_MAC_HALF_DUPLX_CTRL,8,3    ; @REG_MAC_HALF_DUPLX_CTRL
	.comm	_REG_IRQ_MODU_TIMER_INIT,8,3    ; @REG_IRQ_MODU_TIMER_INIT
	.comm	_MASTER_CTRL_ITIMER_EN,4,2      ; @MASTER_CTRL_ITIMER_EN
	.comm	_REG_MASTER_CTRL,8,3            ; @REG_MASTER_CTRL
	.comm	_REG_CMBDISDMA_TIMER,8,3        ; @REG_CMBDISDMA_TIMER
	.comm	_REG_MTU,8,3                    ; @REG_MTU
	.comm	_RXQ_JMBOSZ_TH_MASK,4,2         ; @RXQ_JMBOSZ_TH_MASK
	.comm	_RXQ_JMBOSZ_TH_SHIFT,4,2        ; @RXQ_JMBOSZ_TH_SHIFT
	.comm	_RXQ_JMBO_LKAH_MASK,4,2         ; @RXQ_JMBO_LKAH_MASK
	.comm	_RXQ_JMBO_LKAH_SHIFT,4,2        ; @RXQ_JMBO_LKAH_SHIFT
	.comm	_RXQ_RRD_TIMER_MASK,4,2         ; @RXQ_RRD_TIMER_MASK
	.comm	_RXQ_RRD_TIMER_SHIFT,4,2        ; @RXQ_RRD_TIMER_SHIFT
	.comm	_REG_RXQ_JMBOSZ_RRDTIM,8,3      ; @REG_RXQ_JMBOSZ_RRDTIM
	.comm	_TXQ_CTRL_TPD_BURST_NUM_MASK,4,2 ; @TXQ_CTRL_TPD_BURST_NUM_MASK
	.comm	_TXQ_CTRL_TPD_BURST_NUM_SHIFT,4,2 ; @TXQ_CTRL_TPD_BURST_NUM_SHIFT
	.comm	_TXQ_CTRL_TXF_BURST_NUM_MASK,4,2 ; @TXQ_CTRL_TXF_BURST_NUM_MASK
	.comm	_TXQ_CTRL_TXF_BURST_NUM_SHIFT,4,2 ; @TXQ_CTRL_TXF_BURST_NUM_SHIFT
	.comm	_TXQ_CTRL_TPD_FETCH_TH_MASK,4,2 ; @TXQ_CTRL_TPD_FETCH_TH_MASK
	.comm	_TXQ_CTRL_TPD_FETCH_TH_SHIFT,4,2 ; @TXQ_CTRL_TPD_FETCH_TH_SHIFT
	.comm	_TXQ_CTRL_ENH_MODE,4,2          ; @TXQ_CTRL_ENH_MODE
	.comm	_TXQ_CTRL_EN,4,2                ; @TXQ_CTRL_EN
	.comm	_REG_TXQ_CTRL,8,3               ; @REG_TXQ_CTRL
	.comm	_TX_JUMBO_TASK_TH_MASK,4,2      ; @TX_JUMBO_TASK_TH_MASK
	.comm	_TX_JUMBO_TASK_TH_SHIFT,4,2     ; @TX_JUMBO_TASK_TH_SHIFT
	.comm	_TX_TPD_MIN_IPG_MASK,4,2        ; @TX_TPD_MIN_IPG_MASK
	.comm	_TX_TPD_MIN_IPG_SHIFT,4,2       ; @TX_TPD_MIN_IPG_SHIFT
	.comm	_REG_TX_JUMBO_TASK_TH_TPD_IPG,8,3 ; @REG_TX_JUMBO_TASK_TH_TPD_IPG
	.comm	_RXQ_CTRL_RFD_BURST_NUM_MASK,4,2 ; @RXQ_CTRL_RFD_BURST_NUM_MASK
	.comm	_RXQ_CTRL_RFD_BURST_NUM_SHIFT,4,2 ; @RXQ_CTRL_RFD_BURST_NUM_SHIFT
	.comm	_RXQ_CTRL_RRD_BURST_THRESH_MASK,4,2 ; @RXQ_CTRL_RRD_BURST_THRESH_MASK
	.comm	_RXQ_CTRL_RRD_BURST_THRESH_SHIFT,4,2 ; @RXQ_CTRL_RRD_BURST_THRESH_SHIFT
	.comm	_RXQ_CTRL_RFD_PREF_MIN_IPG_MASK,4,2 ; @RXQ_CTRL_RFD_PREF_MIN_IPG_MASK
	.comm	_RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT,4,2 ; @RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT
	.comm	_RXQ_CTRL_CUT_THRU_EN,4,2       ; @RXQ_CTRL_CUT_THRU_EN
	.comm	_RXQ_CTRL_EN,4,2                ; @RXQ_CTRL_EN
	.comm	_REG_RXQ_CTRL,8,3               ; @REG_RXQ_CTRL
	.comm	_DMA_CTRL_DMAR_BURST_LEN_MASK,4,2 ; @DMA_CTRL_DMAR_BURST_LEN_MASK
	.comm	_DMA_CTRL_DMAR_BURST_LEN_SHIFT,4,2 ; @DMA_CTRL_DMAR_BURST_LEN_SHIFT
	.comm	_DMA_CTRL_DMAW_BURST_LEN_MASK,4,2 ; @DMA_CTRL_DMAW_BURST_LEN_MASK
	.comm	_DMA_CTRL_DMAW_BURST_LEN_SHIFT,4,2 ; @DMA_CTRL_DMAW_BURST_LEN_SHIFT
	.comm	_DMA_CTRL_DMAR_EN,4,2           ; @DMA_CTRL_DMAR_EN
	.comm	_DMA_CTRL_DMAW_EN,4,2           ; @DMA_CTRL_DMAW_EN
	.comm	_atl1_rcb_128,8,3               ; @atl1_rcb_128
	.comm	_DMA_CTRL_RCB_VALUE,4,2         ; @DMA_CTRL_RCB_VALUE
	.comm	_REG_DMA_CTRL,8,3               ; @REG_DMA_CTRL
	.comm	_REG_CMB_WRITE_TH,8,3           ; @REG_CMB_WRITE_TH
	.comm	_REG_CMB_WRITE_TIMER,8,3        ; @REG_CMB_WRITE_TIMER
	.comm	_REG_SMB_TIMER,8,3              ; @REG_SMB_TIMER
	.comm	_CSMB_CTRL_CMB_EN,4,2           ; @CSMB_CTRL_CMB_EN
	.comm	_CSMB_CTRL_SMB_EN,4,2           ; @CSMB_CTRL_SMB_EN
	.comm	_REG_CSMB_CTRL,8,3              ; @REG_CSMB_CTRL
	.comm	_ISR_PHY_LINKDOWN,4,2           ; @ISR_PHY_LINKDOWN
	.no_dead_strip	_atl1_configure
.subsections_via_symbols
