	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tg3_get_57780_nvram_info
_tg3_get_57780_nvram_info:              ## @tg3_get_57780_nvram_info
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	_NVRAM_CFG1@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_tr32
	movl	%eax, %r14d
	movq	_NVRAM_CFG1_5752VENDOR_MASK@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	andl	%r14d, %eax
	addl	$-128, %eax
	cmpl	$11, %eax
	ja	LBB0_4
## %bb.1:
	movl	$2300, %ecx                     ## imm = 0x8FC
	btl	%eax, %ecx
	jae	LBB0_2
## %bb.6:
	movq	_JEDEC_ATMEL@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 16(%rbx)
	movq	_NVRAM_BUFFERED@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_tg3_flag_set
	movq	_FLASH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_tg3_flag_set
	movl	(%r15), %eax
	andl	%r14d, %eax
	addl	$-130, %eax
	cmpl	$10, %eax
	jae	LBB0_12
## %bb.7:
	movl	$575, %ecx                      ## imm = 0x23F
	btl	%eax, %ecx
	jae	LBB0_12
## %bb.8:
	cltq
	leaq	l_switch.table.tg3_get_57780_nvram_info(%rip), %rcx
	jmp	LBB0_11
LBB0_2:
	movl	$1792, %ecx                     ## imm = 0x700
	btl	%eax, %ecx
	jae	LBB0_3
## %bb.9:
	movq	_JEDEC_ST@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 16(%rbx)
	movq	_NVRAM_BUFFERED@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_tg3_flag_set
	movq	_FLASH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_tg3_flag_set
	movl	(%r15), %eax
	andl	%r14d, %eax
	addl	$-136, %eax
	cmpl	$3, %eax
	jae	LBB0_12
## %bb.10:
	cltq
	leaq	l_switch.table.tg3_get_57780_nvram_info.1(%rip), %rcx
LBB0_11:
	leaq	(%rcx,%rax,8), %rax
	movq	(%rax), %rax
	movq	(%rax), %rax
	movq	%rax, 8(%rbx)
LBB0_12:
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_tg3_nvram_get_pagesize
	movl	(%rbx), %eax
	cmpl	$264, %eax                      ## imm = 0x108
	je	LBB0_15
## %bb.13:
	cmpl	$528, %eax                      ## imm = 0x210
	jne	LBB0_14
LBB0_15:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_14:
	movq	_NO_NVRAM_ADDR_TRANS@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_3:
	movq	_JEDEC_ATMEL@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, 16(%rbx)
	movq	_NVRAM_BUFFERED@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_tg3_flag_set
	movq	_ATMEL_AT24C512_CHIP_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, (%rbx)
	movq	_NVRAM_CFG1_COMPAT_BYPASS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r14d
	movl	(%r12), %edi
	movl	%r14d, %esi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_tw32                           ## TAILCALL
LBB0_4:
	movq	_NO_NVRAM@GOTPCREL(%rip), %rax
LBB0_5:
	movl	(%rax), %esi
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_tg3_flag_set                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_NVRAM_CFG1,4,2                 ## @NVRAM_CFG1
	.comm	_NVRAM_CFG1_5752VENDOR_MASK,4,2 ## @NVRAM_CFG1_5752VENDOR_MASK
	.comm	_JEDEC_ATMEL,8,3                ## @JEDEC_ATMEL
	.comm	_NVRAM_BUFFERED,4,2             ## @NVRAM_BUFFERED
	.comm	_ATMEL_AT24C512_CHIP_SIZE,4,2   ## @ATMEL_AT24C512_CHIP_SIZE
	.comm	_NVRAM_CFG1_COMPAT_BYPASS,4,2   ## @NVRAM_CFG1_COMPAT_BYPASS
	.comm	_FLASH,4,2                      ## @FLASH
	.comm	_TG3_NVRAM_SIZE_128KB,8,3       ## @TG3_NVRAM_SIZE_128KB
	.comm	_TG3_NVRAM_SIZE_256KB,8,3       ## @TG3_NVRAM_SIZE_256KB
	.comm	_TG3_NVRAM_SIZE_512KB,8,3       ## @TG3_NVRAM_SIZE_512KB
	.comm	_JEDEC_ST,8,3                   ## @JEDEC_ST
	.comm	_NO_NVRAM,4,2                   ## @NO_NVRAM
	.comm	_NO_NVRAM_ADDR_TRANS,4,2        ## @NO_NVRAM_ADDR_TRANS
	.no_dead_strip	_tg3_get_57780_nvram_info
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.tg3_get_57780_nvram_info
l_switch.table.tg3_get_57780_nvram_info:
	.quad	_TG3_NVRAM_SIZE_512KB
	.quad	_TG3_NVRAM_SIZE_512KB
	.quad	_TG3_NVRAM_SIZE_256KB
	.quad	_TG3_NVRAM_SIZE_256KB
	.quad	_TG3_NVRAM_SIZE_128KB
	.quad	_TG3_NVRAM_SIZE_128KB
	.quad	_TG3_NVRAM_SIZE_128KB
	.quad	_TG3_NVRAM_SIZE_128KB
	.quad	_TG3_NVRAM_SIZE_128KB
	.quad	_TG3_NVRAM_SIZE_128KB

	.p2align	3                               ## @switch.table.tg3_get_57780_nvram_info.1
l_switch.table.tg3_get_57780_nvram_info.1:
	.quad	_TG3_NVRAM_SIZE_512KB
	.quad	_TG3_NVRAM_SIZE_256KB
	.quad	_TG3_NVRAM_SIZE_128KB

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tg3_get_57780_nvram_info
_tg3_get_57780_nvram_info:              ; @tg3_get_57780_nvram_info
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
Lloh0:
	adrp	x22, _NVRAM_CFG1@GOTPAGE
Lloh1:
	ldr	x22, [x22, _NVRAM_CFG1@GOTPAGEOFF]
	ldr	w0, [x22]
	bl	_tr32
Lloh2:
	adrp	x21, _NVRAM_CFG1_5752VENDOR_MASK@GOTPAGE
Lloh3:
	ldr	x21, [x21, _NVRAM_CFG1_5752VENDOR_MASK@GOTPAGEOFF]
	ldr	w8, [x21]
	and	w8, w8, w0
	sub	w8, w8, #128
	cmp	w8, #11
	b.hi	LBB0_14
; %bb.1:
	mov	x20, x0
	mov	w9, #1
	lsl	w8, w9, w8
	mov	w9, #2300
	tst	w8, w9
	b.eq	LBB0_5
; %bb.2:
Lloh4:
	adrp	x8, _JEDEC_ATMEL@GOTPAGE
Lloh5:
	ldr	x8, [x8, _JEDEC_ATMEL@GOTPAGEOFF]
Lloh6:
	ldr	x8, [x8]
	str	x8, [x19, #16]
Lloh7:
	adrp	x8, _NVRAM_BUFFERED@GOTPAGE
Lloh8:
	ldr	x8, [x8, _NVRAM_BUFFERED@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_flag_set
Lloh10:
	adrp	x8, _FLASH@GOTPAGE
Lloh11:
	ldr	x8, [x8, _FLASH@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_flag_set
	ldr	w8, [x21]
	and	w8, w8, w20
	sub	w8, w8, #130
	cmp	w8, #10
	b.hs	LBB0_9
; %bb.3:
	mov	w9, #575
	lsr	w9, w9, w8
	tbz	w9, #0, LBB0_9
; %bb.4:
Lloh13:
	adrp	x9, l_switch.table.tg3_get_57780_nvram_info@PAGE
Lloh14:
	add	x9, x9, l_switch.table.tg3_get_57780_nvram_info@PAGEOFF
	add	x8, x9, w8, sxtw #3
	b	LBB0_8
LBB0_5:
	tst	w8, #0x700
	b.eq	LBB0_13
; %bb.6:
Lloh15:
	adrp	x8, _JEDEC_ST@GOTPAGE
Lloh16:
	ldr	x8, [x8, _JEDEC_ST@GOTPAGEOFF]
Lloh17:
	ldr	x8, [x8]
	str	x8, [x19, #16]
Lloh18:
	adrp	x8, _NVRAM_BUFFERED@GOTPAGE
Lloh19:
	ldr	x8, [x8, _NVRAM_BUFFERED@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_flag_set
Lloh21:
	adrp	x8, _FLASH@GOTPAGE
Lloh22:
	ldr	x8, [x8, _FLASH@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_flag_set
	ldr	w8, [x21]
	and	w8, w8, w20
	sub	w8, w8, #136
	cmp	w8, #3
	b.hs	LBB0_9
; %bb.7:
Lloh24:
	adrp	x9, l_switch.table.tg3_get_57780_nvram_info.1@PAGE
Lloh25:
	add	x9, x9, l_switch.table.tg3_get_57780_nvram_info.1@PAGEOFF
	add	x8, x9, w8, sxtw #3
LBB0_8:
	ldr	x8, [x8]
	ldr	x8, [x8]
	str	x8, [x19, #8]
LBB0_9:
	mov	x0, x19
	mov	x1, x20
	bl	_tg3_nvram_get_pagesize
	ldr	w8, [x19]
	cmp	w8, #264
	b.eq	LBB0_11
; %bb.10:
	cmp	w8, #528
	b.ne	LBB0_12
LBB0_11:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_12:
Lloh26:
	adrp	x8, _NO_NVRAM_ADDR_TRANS@GOTPAGE
Lloh27:
	ldr	x8, [x8, _NO_NVRAM_ADDR_TRANS@GOTPAGEOFF]
	b	LBB0_15
LBB0_13:
Lloh28:
	adrp	x8, _JEDEC_ATMEL@GOTPAGE
Lloh29:
	ldr	x8, [x8, _JEDEC_ATMEL@GOTPAGEOFF]
Lloh30:
	ldr	x8, [x8]
	str	x8, [x19, #16]
Lloh31:
	adrp	x8, _NVRAM_BUFFERED@GOTPAGE
Lloh32:
	ldr	x8, [x8, _NVRAM_BUFFERED@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_tg3_flag_set
Lloh34:
	adrp	x8, _ATMEL_AT24C512_CHIP_SIZE@GOTPAGE
Lloh35:
	ldr	x8, [x8, _ATMEL_AT24C512_CHIP_SIZE@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
Lloh37:
	adrp	x9, _NVRAM_CFG1_COMPAT_BYPASS@GOTPAGE
Lloh38:
	ldr	x9, [x9, _NVRAM_CFG1_COMPAT_BYPASS@GOTPAGEOFF]
	str	w8, [x19]
Lloh39:
	ldr	w8, [x9]
	bic	w1, w20, w8
	ldr	w0, [x22]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_tw32
LBB0_14:
Lloh40:
	adrp	x8, _NO_NVRAM@GOTPAGE
Lloh41:
	ldr	x8, [x8, _NO_NVRAM@GOTPAGEOFF]
LBB0_15:
	ldr	w1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_tg3_flag_set
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh40, Lloh41
	.cfi_endproc
                                        ; -- End function
	.comm	_NVRAM_CFG1,4,2                 ; @NVRAM_CFG1
	.comm	_NVRAM_CFG1_5752VENDOR_MASK,4,2 ; @NVRAM_CFG1_5752VENDOR_MASK
	.comm	_JEDEC_ATMEL,8,3                ; @JEDEC_ATMEL
	.comm	_NVRAM_BUFFERED,4,2             ; @NVRAM_BUFFERED
	.comm	_ATMEL_AT24C512_CHIP_SIZE,4,2   ; @ATMEL_AT24C512_CHIP_SIZE
	.comm	_NVRAM_CFG1_COMPAT_BYPASS,4,2   ; @NVRAM_CFG1_COMPAT_BYPASS
	.comm	_FLASH,4,2                      ; @FLASH
	.comm	_TG3_NVRAM_SIZE_128KB,8,3       ; @TG3_NVRAM_SIZE_128KB
	.comm	_TG3_NVRAM_SIZE_256KB,8,3       ; @TG3_NVRAM_SIZE_256KB
	.comm	_TG3_NVRAM_SIZE_512KB,8,3       ; @TG3_NVRAM_SIZE_512KB
	.comm	_JEDEC_ST,8,3                   ; @JEDEC_ST
	.comm	_NO_NVRAM,4,2                   ; @NO_NVRAM
	.comm	_NO_NVRAM_ADDR_TRANS,4,2        ; @NO_NVRAM_ADDR_TRANS
	.no_dead_strip	_tg3_get_57780_nvram_info
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.tg3_get_57780_nvram_info
l_switch.table.tg3_get_57780_nvram_info:
	.quad	_TG3_NVRAM_SIZE_512KB
	.quad	_TG3_NVRAM_SIZE_512KB
	.quad	_TG3_NVRAM_SIZE_256KB
	.quad	_TG3_NVRAM_SIZE_256KB
	.quad	_TG3_NVRAM_SIZE_128KB
	.quad	_TG3_NVRAM_SIZE_128KB
	.quad	_TG3_NVRAM_SIZE_128KB
	.quad	_TG3_NVRAM_SIZE_128KB
	.quad	_TG3_NVRAM_SIZE_128KB
	.quad	_TG3_NVRAM_SIZE_128KB

	.p2align	3                               ; @switch.table.tg3_get_57780_nvram_info.1
l_switch.table.tg3_get_57780_nvram_info.1:
	.quad	_TG3_NVRAM_SIZE_512KB
	.quad	_TG3_NVRAM_SIZE_256KB
	.quad	_TG3_NVRAM_SIZE_128KB

.subsections_via_symbols
