	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gli_set_9750
_gli_set_9750:                          ## @gli_set_9750
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_gl9750_wt_on
	movq	_SDHCI_GLI_9750_DRIVING@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_sdhci_readl
	movl	%eax, %ebx
	movq	_SDHCI_GLI_9750_PLL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_sdhci_readl
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_SDHCI_GLI_9750_SW_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_sdhci_readl
	movl	%eax, %r15d
	movq	_SDHCI_GLI_9750_MISC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_sdhci_readl
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	_SDHCI_GLI_9750_TUNING_PARAMETERS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_sdhci_readl
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	_SDHCI_GLI_9750_TUNING_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_sdhci_readl
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movq	_SDHCI_GLI_9750_DRIVING_1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_SDHCI_GLI_9750_DRIVING_2@GOTPCREL(%rip), %r12
	movl	(%r12), %r13d
	orl	%edi, %r13d
	notl	%r13d
	andl	%ebx, %r13d
	movq	_GLI_9750_DRIVING_1_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	movl	%eax, %ebx
	movl	(%r12), %edi
	movq	_GLI_9750_DRIVING_2_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	orl	%r13d, %ebx
	movq	_SDHCI_GLI_9750_DRIVING@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_sdhci_writel
	movq	_SDHCI_GLI_9750_SW_CTRL_4@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, %ebx
	notl	%ebx
	andl	%r15d, %ebx
	movq	_GLI_9750_SW_CTRL_4_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movq	_SDHCI_GLI_9750_SW_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_sdhci_writel
	movq	_SDHCI_GLI_9750_PLL_TX2_INV@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_SDHCI_GLI_9750_PLL_TX2_DLY@GOTPCREL(%rip), %r15
	movl	(%r15), %ebx
	orl	%edi, %ebx
	notl	%ebx
	andl	-44(%rbp), %ebx                 ## 4-byte Folded Reload
	movq	_GLI_9750_PLL_TX2_INV_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	movl	%eax, %r12d
	movl	(%r15), %edi
	movq	_GLI_9750_PLL_TX2_DLY_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	orl	%eax, %r12d
	orl	%ebx, %r12d
	movl	%r12d, -44(%rbp)                ## 4-byte Spill
	movq	_SDHCI_GLI_9750_MISC_TX1_INV@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_SDHCI_GLI_9750_MISC_RX_INV@GOTPCREL(%rip), %r12
	movl	(%r12), %ebx
	orl	%edi, %ebx
	movq	_SDHCI_GLI_9750_MISC_TX1_DLY@GOTPCREL(%rip), %r13
	orl	(%r13), %ebx
	notl	%ebx
	andl	-48(%rbp), %ebx                 ## 4-byte Folded Reload
	movq	_GLI_9750_MISC_TX1_INV_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	movl	%eax, %r15d
	movl	(%r12), %edi
	movq	_GLI_9750_MISC_RX_INV_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	orl	%eax, %r15d
	movl	(%r13), %edi
	movq	_GLI_9750_MISC_TX1_DLY_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	orl	%eax, %r15d
	orl	%ebx, %r15d
	movq	_SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%edi, %r12d
	notl	%r12d
	andl	-52(%rbp), %r12d                ## 4-byte Folded Reload
	movq	_GLI_9750_TUNING_PARAMETERS_RX_DLY_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	orl	%eax, %r12d
	movq	_SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	orl	%edi, %ebx
	notl	%ebx
	andl	-56(%rbp), %ebx                 ## 4-byte Folded Reload
	movq	_GLI_9750_TUNING_CONTROL_GLITCH_1_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	movl	%eax, %r13d
	movq	_SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_GLI_9750_TUNING_CONTROL_GLITCH_2_VALUE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	orl	%eax, %r13d
	orl	%ebx, %r13d
	movq	_SDHCI_GLI_9750_PLL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_sdhci_writel
	movq	_SDHCI_GLI_9750_MISC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_sdhci_writel
	movq	_SDHCI_HOST_CONTROL2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rax, %rbx
	movq	%r14, %rdi
	callq	_sdhci_readw
	movq	_SDHCI_CTRL_TUNED_CLK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%rbx), %edx
	movq	%r14, %rdi
	callq	_sdhci_writew
	movq	_SDHCI_GLI_9750_TUNING_CONTROL_EN@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	movl	%edi, %r15d
	notl	%r15d
	andl	%r13d, %r15d
	movq	_GLI_9750_TUNING_CONTROL_EN_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	orl	%eax, %r15d
	movq	_SDHCI_GLI_9750_TUNING_CONTROL@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_sdhci_writel
	movq	_SDHCI_GLI_9750_TUNING_PARAMETERS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_sdhci_writel
	movl	(%rbx), %edi
	movl	%edi, %ebx
	notl	%ebx
	andl	%r15d, %ebx
	movq	_GLI_9750_TUNING_CONTROL_EN_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movl	(%r13), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_sdhci_writel
	movq	_SDHCI_HOST_CONTROL2@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_sdhci_readw
	movq	_SDHCI_CTRL_TUNED_CLK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	notl	%esi
	andl	%eax, %esi
	movl	(%rbx), %edx
	movq	%r14, %rdi
	callq	_sdhci_writew
	movq	%r14, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_gl9750_wt_off                  ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SDHCI_GLI_9750_DRIVING,4,2     ## @SDHCI_GLI_9750_DRIVING
	.comm	_SDHCI_GLI_9750_PLL,4,2         ## @SDHCI_GLI_9750_PLL
	.comm	_SDHCI_GLI_9750_SW_CTRL,4,2     ## @SDHCI_GLI_9750_SW_CTRL
	.comm	_SDHCI_GLI_9750_MISC,4,2        ## @SDHCI_GLI_9750_MISC
	.comm	_SDHCI_GLI_9750_TUNING_PARAMETERS,4,2 ## @SDHCI_GLI_9750_TUNING_PARAMETERS
	.comm	_SDHCI_GLI_9750_TUNING_CONTROL,4,2 ## @SDHCI_GLI_9750_TUNING_CONTROL
	.comm	_SDHCI_GLI_9750_DRIVING_1,4,2   ## @SDHCI_GLI_9750_DRIVING_1
	.comm	_SDHCI_GLI_9750_DRIVING_2,4,2   ## @SDHCI_GLI_9750_DRIVING_2
	.comm	_GLI_9750_DRIVING_1_VALUE,4,2   ## @GLI_9750_DRIVING_1_VALUE
	.comm	_GLI_9750_DRIVING_2_VALUE,4,2   ## @GLI_9750_DRIVING_2_VALUE
	.comm	_SDHCI_GLI_9750_SW_CTRL_4,4,2   ## @SDHCI_GLI_9750_SW_CTRL_4
	.comm	_GLI_9750_SW_CTRL_4_VALUE,4,2   ## @GLI_9750_SW_CTRL_4_VALUE
	.comm	_SDHCI_GLI_9750_PLL_TX2_INV,4,2 ## @SDHCI_GLI_9750_PLL_TX2_INV
	.comm	_SDHCI_GLI_9750_PLL_TX2_DLY,4,2 ## @SDHCI_GLI_9750_PLL_TX2_DLY
	.comm	_GLI_9750_PLL_TX2_INV_VALUE,4,2 ## @GLI_9750_PLL_TX2_INV_VALUE
	.comm	_GLI_9750_PLL_TX2_DLY_VALUE,4,2 ## @GLI_9750_PLL_TX2_DLY_VALUE
	.comm	_SDHCI_GLI_9750_MISC_TX1_INV,4,2 ## @SDHCI_GLI_9750_MISC_TX1_INV
	.comm	_SDHCI_GLI_9750_MISC_RX_INV,4,2 ## @SDHCI_GLI_9750_MISC_RX_INV
	.comm	_SDHCI_GLI_9750_MISC_TX1_DLY,4,2 ## @SDHCI_GLI_9750_MISC_TX1_DLY
	.comm	_GLI_9750_MISC_TX1_INV_VALUE,4,2 ## @GLI_9750_MISC_TX1_INV_VALUE
	.comm	_GLI_9750_MISC_RX_INV_VALUE,4,2 ## @GLI_9750_MISC_RX_INV_VALUE
	.comm	_GLI_9750_MISC_TX1_DLY_VALUE,4,2 ## @GLI_9750_MISC_TX1_DLY_VALUE
	.comm	_SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY,4,2 ## @SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY
	.comm	_GLI_9750_TUNING_PARAMETERS_RX_DLY_VALUE,4,2 ## @GLI_9750_TUNING_PARAMETERS_RX_DLY_VALUE
	.comm	_SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1,4,2 ## @SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1
	.comm	_SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2,4,2 ## @SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2
	.comm	_GLI_9750_TUNING_CONTROL_GLITCH_1_VALUE,4,2 ## @GLI_9750_TUNING_CONTROL_GLITCH_1_VALUE
	.comm	_GLI_9750_TUNING_CONTROL_GLITCH_2_VALUE,4,2 ## @GLI_9750_TUNING_CONTROL_GLITCH_2_VALUE
	.comm	_SDHCI_HOST_CONTROL2,4,2        ## @SDHCI_HOST_CONTROL2
	.comm	_SDHCI_CTRL_TUNED_CLK,4,2       ## @SDHCI_CTRL_TUNED_CLK
	.comm	_SDHCI_GLI_9750_TUNING_CONTROL_EN,4,2 ## @SDHCI_GLI_9750_TUNING_CONTROL_EN
	.comm	_GLI_9750_TUNING_CONTROL_EN_ON,4,2 ## @GLI_9750_TUNING_CONTROL_EN_ON
	.comm	_GLI_9750_TUNING_CONTROL_EN_OFF,4,2 ## @GLI_9750_TUNING_CONTROL_EN_OFF
	.no_dead_strip	_gli_set_9750
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gli_set_9750
_gli_set_9750:                          ; @gli_set_9750
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	bl	_gl9750_wt_on
Lloh0:
	adrp	x27, _SDHCI_GLI_9750_DRIVING@GOTPAGE
Lloh1:
	ldr	x27, [x27, _SDHCI_GLI_9750_DRIVING@GOTPAGEOFF]
	ldr	w1, [x27]
	mov	x0, x19
	bl	_sdhci_readl
	mov	x25, x0
Lloh2:
	adrp	x8, _SDHCI_GLI_9750_PLL@GOTPAGE
Lloh3:
	ldr	x8, [x8, _SDHCI_GLI_9750_PLL@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_sdhci_readl
	mov	x23, x0
Lloh5:
	adrp	x28, _SDHCI_GLI_9750_SW_CTRL@GOTPAGE
Lloh6:
	ldr	x28, [x28, _SDHCI_GLI_9750_SW_CTRL@GOTPAGEOFF]
	ldr	w1, [x28]
	mov	x0, x19
	bl	_sdhci_readl
	mov	x24, x0
Lloh7:
	adrp	x8, _SDHCI_GLI_9750_MISC@GOTPAGE
Lloh8:
	ldr	x8, [x8, _SDHCI_GLI_9750_MISC@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_sdhci_readl
	mov	x22, x0
Lloh10:
	adrp	x8, _SDHCI_GLI_9750_TUNING_PARAMETERS@GOTPAGE
Lloh11:
	ldr	x8, [x8, _SDHCI_GLI_9750_TUNING_PARAMETERS@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_sdhci_readl
	mov	x21, x0
Lloh13:
	adrp	x8, _SDHCI_GLI_9750_TUNING_CONTROL@GOTPAGE
Lloh14:
	ldr	x8, [x8, _SDHCI_GLI_9750_TUNING_CONTROL@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_sdhci_readl
	mov	x20, x0
Lloh16:
	adrp	x8, _SDHCI_GLI_9750_DRIVING_1@GOTPAGE
Lloh17:
	ldr	x8, [x8, _SDHCI_GLI_9750_DRIVING_1@GOTPAGEOFF]
Lloh18:
	ldr	w0, [x8]
Lloh19:
	adrp	x26, _SDHCI_GLI_9750_DRIVING_2@GOTPAGE
Lloh20:
	ldr	x26, [x26, _SDHCI_GLI_9750_DRIVING_2@GOTPAGEOFF]
	ldr	w8, [x26]
	orr	w8, w8, w0
	bic	w25, w25, w8
Lloh21:
	adrp	x8, _GLI_9750_DRIVING_1_VALUE@GOTPAGE
Lloh22:
	ldr	x8, [x8, _GLI_9750_DRIVING_1_VALUE@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w25, w25, w0
	ldr	w0, [x26]
Lloh24:
	adrp	x8, _GLI_9750_DRIVING_2_VALUE@GOTPAGE
Lloh25:
	ldr	x8, [x8, _GLI_9750_DRIVING_2_VALUE@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w1, w25, w0
	ldr	w2, [x27]
	mov	x0, x19
	bl	_sdhci_writel
Lloh27:
	adrp	x8, _SDHCI_GLI_9750_SW_CTRL_4@GOTPAGE
Lloh28:
	ldr	x8, [x8, _SDHCI_GLI_9750_SW_CTRL_4@GOTPAGEOFF]
Lloh29:
	ldr	w0, [x8]
	bic	w24, w24, w0
Lloh30:
	adrp	x8, _GLI_9750_SW_CTRL_4_VALUE@GOTPAGE
Lloh31:
	ldr	x8, [x8, _GLI_9750_SW_CTRL_4_VALUE@GOTPAGEOFF]
Lloh32:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w1, w0, w24
	ldr	w2, [x28]
	mov	x0, x19
	bl	_sdhci_writel
Lloh33:
	adrp	x8, _SDHCI_GLI_9750_PLL_TX2_INV@GOTPAGE
Lloh34:
	ldr	x8, [x8, _SDHCI_GLI_9750_PLL_TX2_INV@GOTPAGEOFF]
Lloh35:
	ldr	w0, [x8]
Lloh36:
	adrp	x24, _SDHCI_GLI_9750_PLL_TX2_DLY@GOTPAGE
Lloh37:
	ldr	x24, [x24, _SDHCI_GLI_9750_PLL_TX2_DLY@GOTPAGEOFF]
	ldr	w8, [x24]
	orr	w8, w8, w0
	bic	w23, w23, w8
Lloh38:
	adrp	x8, _GLI_9750_PLL_TX2_INV_VALUE@GOTPAGE
Lloh39:
	ldr	x8, [x8, _GLI_9750_PLL_TX2_INV_VALUE@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w23, w23, w0
	ldr	w0, [x24]
Lloh41:
	adrp	x8, _GLI_9750_PLL_TX2_DLY_VALUE@GOTPAGE
Lloh42:
	ldr	x8, [x8, _GLI_9750_PLL_TX2_DLY_VALUE@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w23, w23, w0
Lloh44:
	adrp	x8, _SDHCI_GLI_9750_MISC_TX1_INV@GOTPAGE
Lloh45:
	ldr	x8, [x8, _SDHCI_GLI_9750_MISC_TX1_INV@GOTPAGEOFF]
Lloh46:
	ldr	w0, [x8]
Lloh47:
	adrp	x24, _SDHCI_GLI_9750_MISC_RX_INV@GOTPAGE
Lloh48:
	ldr	x24, [x24, _SDHCI_GLI_9750_MISC_RX_INV@GOTPAGEOFF]
	ldr	w8, [x24]
	orr	w8, w8, w0
Lloh49:
	adrp	x25, _SDHCI_GLI_9750_MISC_TX1_DLY@GOTPAGE
Lloh50:
	ldr	x25, [x25, _SDHCI_GLI_9750_MISC_TX1_DLY@GOTPAGEOFF]
	ldr	w9, [x25]
	orr	w8, w8, w9
	bic	w22, w22, w8
Lloh51:
	adrp	x8, _GLI_9750_MISC_TX1_INV_VALUE@GOTPAGE
Lloh52:
	ldr	x8, [x8, _GLI_9750_MISC_TX1_INV_VALUE@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w22, w22, w0
	ldr	w0, [x24]
Lloh54:
	adrp	x8, _GLI_9750_MISC_RX_INV_VALUE@GOTPAGE
Lloh55:
	ldr	x8, [x8, _GLI_9750_MISC_RX_INV_VALUE@GOTPAGEOFF]
Lloh56:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w22, w22, w0
	ldr	w0, [x25]
Lloh57:
	adrp	x8, _GLI_9750_MISC_TX1_DLY_VALUE@GOTPAGE
Lloh58:
	ldr	x8, [x8, _GLI_9750_MISC_TX1_DLY_VALUE@GOTPAGEOFF]
Lloh59:
	ldr	w1, [x8]
	bl	_FIELD_PREP
Lloh60:
	adrp	x8, _SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY@GOTPAGE
Lloh61:
	ldr	x8, [x8, _SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY@GOTPAGEOFF]
	orr	w22, w22, w0
Lloh62:
	ldr	w0, [x8]
	bic	w21, w21, w0
Lloh63:
	adrp	x8, _GLI_9750_TUNING_PARAMETERS_RX_DLY_VALUE@GOTPAGE
Lloh64:
	ldr	x8, [x8, _GLI_9750_TUNING_PARAMETERS_RX_DLY_VALUE@GOTPAGEOFF]
Lloh65:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w21, w0, w21
Lloh66:
	adrp	x8, _SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1@GOTPAGE
Lloh67:
	ldr	x8, [x8, _SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1@GOTPAGEOFF]
Lloh68:
	ldr	w0, [x8]
Lloh69:
	adrp	x24, _SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2@GOTPAGE
Lloh70:
	ldr	x24, [x24, _SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2@GOTPAGEOFF]
	ldr	w8, [x24]
	orr	w8, w8, w0
	bic	w20, w20, w8
Lloh71:
	adrp	x8, _GLI_9750_TUNING_CONTROL_GLITCH_1_VALUE@GOTPAGE
Lloh72:
	ldr	x8, [x8, _GLI_9750_TUNING_CONTROL_GLITCH_1_VALUE@GOTPAGEOFF]
Lloh73:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w20, w20, w0
	ldr	w0, [x24]
Lloh74:
	adrp	x8, _GLI_9750_TUNING_CONTROL_GLITCH_2_VALUE@GOTPAGE
Lloh75:
	ldr	x8, [x8, _GLI_9750_TUNING_CONTROL_GLITCH_2_VALUE@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w20, w20, w0
Lloh77:
	adrp	x8, _SDHCI_GLI_9750_PLL@GOTPAGE
Lloh78:
	ldr	x8, [x8, _SDHCI_GLI_9750_PLL@GOTPAGEOFF]
Lloh79:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x23
	bl	_sdhci_writel
Lloh80:
	adrp	x8, _SDHCI_GLI_9750_MISC@GOTPAGE
Lloh81:
	ldr	x8, [x8, _SDHCI_GLI_9750_MISC@GOTPAGEOFF]
Lloh82:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x22
	bl	_sdhci_writel
Lloh83:
	adrp	x22, _SDHCI_HOST_CONTROL2@GOTPAGE
Lloh84:
	ldr	x22, [x22, _SDHCI_HOST_CONTROL2@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_sdhci_readw
Lloh85:
	adrp	x23, _SDHCI_CTRL_TUNED_CLK@GOTPAGE
Lloh86:
	ldr	x23, [x23, _SDHCI_CTRL_TUNED_CLK@GOTPAGEOFF]
	ldr	w8, [x23]
	bic	w1, w0, w8
	ldr	w2, [x22]
	mov	x0, x19
	bl	_sdhci_writew
Lloh87:
	adrp	x24, _SDHCI_GLI_9750_TUNING_CONTROL_EN@GOTPAGE
Lloh88:
	ldr	x24, [x24, _SDHCI_GLI_9750_TUNING_CONTROL_EN@GOTPAGEOFF]
	ldr	w0, [x24]
	bic	w20, w20, w0
Lloh89:
	adrp	x8, _GLI_9750_TUNING_CONTROL_EN_ON@GOTPAGE
Lloh90:
	ldr	x8, [x8, _GLI_9750_TUNING_CONTROL_EN_ON@GOTPAGEOFF]
Lloh91:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w20, w0, w20
Lloh92:
	adrp	x25, _SDHCI_GLI_9750_TUNING_CONTROL@GOTPAGE
Lloh93:
	ldr	x25, [x25, _SDHCI_GLI_9750_TUNING_CONTROL@GOTPAGEOFF]
	ldr	w2, [x25]
	mov	x0, x19
	mov	x1, x20
	bl	_sdhci_writel
Lloh94:
	adrp	x8, _SDHCI_GLI_9750_TUNING_PARAMETERS@GOTPAGE
Lloh95:
	ldr	x8, [x8, _SDHCI_GLI_9750_TUNING_PARAMETERS@GOTPAGEOFF]
Lloh96:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x21
	bl	_sdhci_writel
	ldr	w0, [x24]
	bic	w20, w20, w0
Lloh97:
	adrp	x8, _GLI_9750_TUNING_CONTROL_EN_OFF@GOTPAGE
Lloh98:
	ldr	x8, [x8, _GLI_9750_TUNING_CONTROL_EN_OFF@GOTPAGEOFF]
Lloh99:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	orr	w1, w0, w20
	ldr	w2, [x25]
	mov	x0, x19
	bl	_sdhci_writel
	ldr	w1, [x22]
	mov	x0, x19
	bl	_sdhci_readw
	ldr	w8, [x23]
	bic	w1, w0, w8
	ldr	w2, [x22]
	mov	x0, x19
	bl	_sdhci_writew
	mov	x0, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_gl9750_wt_off
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh87, Lloh88
	.loh AdrpLdrGot	Lloh85, Lloh86
	.loh AdrpLdrGot	Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGot	Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGot	Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_SDHCI_GLI_9750_DRIVING,4,2     ; @SDHCI_GLI_9750_DRIVING
	.comm	_SDHCI_GLI_9750_PLL,4,2         ; @SDHCI_GLI_9750_PLL
	.comm	_SDHCI_GLI_9750_SW_CTRL,4,2     ; @SDHCI_GLI_9750_SW_CTRL
	.comm	_SDHCI_GLI_9750_MISC,4,2        ; @SDHCI_GLI_9750_MISC
	.comm	_SDHCI_GLI_9750_TUNING_PARAMETERS,4,2 ; @SDHCI_GLI_9750_TUNING_PARAMETERS
	.comm	_SDHCI_GLI_9750_TUNING_CONTROL,4,2 ; @SDHCI_GLI_9750_TUNING_CONTROL
	.comm	_SDHCI_GLI_9750_DRIVING_1,4,2   ; @SDHCI_GLI_9750_DRIVING_1
	.comm	_SDHCI_GLI_9750_DRIVING_2,4,2   ; @SDHCI_GLI_9750_DRIVING_2
	.comm	_GLI_9750_DRIVING_1_VALUE,4,2   ; @GLI_9750_DRIVING_1_VALUE
	.comm	_GLI_9750_DRIVING_2_VALUE,4,2   ; @GLI_9750_DRIVING_2_VALUE
	.comm	_SDHCI_GLI_9750_SW_CTRL_4,4,2   ; @SDHCI_GLI_9750_SW_CTRL_4
	.comm	_GLI_9750_SW_CTRL_4_VALUE,4,2   ; @GLI_9750_SW_CTRL_4_VALUE
	.comm	_SDHCI_GLI_9750_PLL_TX2_INV,4,2 ; @SDHCI_GLI_9750_PLL_TX2_INV
	.comm	_SDHCI_GLI_9750_PLL_TX2_DLY,4,2 ; @SDHCI_GLI_9750_PLL_TX2_DLY
	.comm	_GLI_9750_PLL_TX2_INV_VALUE,4,2 ; @GLI_9750_PLL_TX2_INV_VALUE
	.comm	_GLI_9750_PLL_TX2_DLY_VALUE,4,2 ; @GLI_9750_PLL_TX2_DLY_VALUE
	.comm	_SDHCI_GLI_9750_MISC_TX1_INV,4,2 ; @SDHCI_GLI_9750_MISC_TX1_INV
	.comm	_SDHCI_GLI_9750_MISC_RX_INV,4,2 ; @SDHCI_GLI_9750_MISC_RX_INV
	.comm	_SDHCI_GLI_9750_MISC_TX1_DLY,4,2 ; @SDHCI_GLI_9750_MISC_TX1_DLY
	.comm	_GLI_9750_MISC_TX1_INV_VALUE,4,2 ; @GLI_9750_MISC_TX1_INV_VALUE
	.comm	_GLI_9750_MISC_RX_INV_VALUE,4,2 ; @GLI_9750_MISC_RX_INV_VALUE
	.comm	_GLI_9750_MISC_TX1_DLY_VALUE,4,2 ; @GLI_9750_MISC_TX1_DLY_VALUE
	.comm	_SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY,4,2 ; @SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY
	.comm	_GLI_9750_TUNING_PARAMETERS_RX_DLY_VALUE,4,2 ; @GLI_9750_TUNING_PARAMETERS_RX_DLY_VALUE
	.comm	_SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1,4,2 ; @SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1
	.comm	_SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2,4,2 ; @SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2
	.comm	_GLI_9750_TUNING_CONTROL_GLITCH_1_VALUE,4,2 ; @GLI_9750_TUNING_CONTROL_GLITCH_1_VALUE
	.comm	_GLI_9750_TUNING_CONTROL_GLITCH_2_VALUE,4,2 ; @GLI_9750_TUNING_CONTROL_GLITCH_2_VALUE
	.comm	_SDHCI_HOST_CONTROL2,4,2        ; @SDHCI_HOST_CONTROL2
	.comm	_SDHCI_CTRL_TUNED_CLK,4,2       ; @SDHCI_CTRL_TUNED_CLK
	.comm	_SDHCI_GLI_9750_TUNING_CONTROL_EN,4,2 ; @SDHCI_GLI_9750_TUNING_CONTROL_EN
	.comm	_GLI_9750_TUNING_CONTROL_EN_ON,4,2 ; @GLI_9750_TUNING_CONTROL_EN_ON
	.comm	_GLI_9750_TUNING_CONTROL_EN_OFF,4,2 ; @GLI_9750_TUNING_CONTROL_EN_OFF
	.no_dead_strip	_gli_set_9750
.subsections_via_symbols
