	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function jz4740_ecc_reset
_jz4740_ecc_reset:                      ## @jz4740_ecc_reset
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movq	_JZ_REG_NAND_IRQ_STAT@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%rdi), %rsi
	xorl	%edi, %edi
	callq	_writel
	movq	_JZ_REG_NAND_ECC_CTRL@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	(%rbx), %rdi
	callq	_readl
	movq	_JZ_NAND_ECC_CTRL_RESET@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_JZ_NAND_ECC_CTRL_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_JZ_NAND_ECC_CTRL_RS@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	_JZ_NAND_ECC_CTRL_ENCODING@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%edi, %ecx
	orl	%eax, %ecx
	notl	%edi
	andl	%eax, %edi
	testl	%r14d, %r14d
	cmovnel	%ecx, %edi
	movq	(%r15), %rsi
	addq	(%rbx), %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_writel                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_JZ_REG_NAND_IRQ_STAT,8,3       ## @JZ_REG_NAND_IRQ_STAT
	.comm	_JZ_REG_NAND_ECC_CTRL,8,3       ## @JZ_REG_NAND_ECC_CTRL
	.comm	_JZ_NAND_ECC_CTRL_RESET,4,2     ## @JZ_NAND_ECC_CTRL_RESET
	.comm	_JZ_NAND_ECC_CTRL_ENABLE,4,2    ## @JZ_NAND_ECC_CTRL_ENABLE
	.comm	_JZ_NAND_ECC_CTRL_RS,4,2        ## @JZ_NAND_ECC_CTRL_RS
	.comm	_JZ_NAND_ECC_CTRL_ENCODING,4,2  ## @JZ_NAND_ECC_CTRL_ENCODING
	.no_dead_strip	_jz4740_ecc_reset
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function jz4740_ecc_reset
_jz4740_ecc_reset:                      ; @jz4740_ecc_reset
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _JZ_REG_NAND_IRQ_STAT@GOTPAGE
Lloh1:
	ldr	x9, [x9, _JZ_REG_NAND_IRQ_STAT@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	w0, #0
	bl	_writel
	ldr	x8, [x20]
Lloh3:
	adrp	x21, _JZ_REG_NAND_ECC_CTRL@GOTPAGE
Lloh4:
	ldr	x21, [x21, _JZ_REG_NAND_ECC_CTRL@GOTPAGEOFF]
	ldr	x9, [x21]
	add	x0, x9, x8
	bl	_readl
Lloh5:
	adrp	x8, _JZ_NAND_ECC_CTRL_RESET@GOTPAGE
Lloh6:
	ldr	x8, [x8, _JZ_NAND_ECC_CTRL_RESET@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	orr	w8, w8, w0
Lloh8:
	adrp	x9, _JZ_NAND_ECC_CTRL_ENABLE@GOTPAGE
Lloh9:
	ldr	x9, [x9, _JZ_NAND_ECC_CTRL_ENABLE@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh11:
	adrp	x9, _JZ_NAND_ECC_CTRL_RS@GOTPAGE
Lloh12:
	ldr	x9, [x9, _JZ_NAND_ECC_CTRL_RS@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh14:
	adrp	x9, _JZ_NAND_ECC_CTRL_ENCODING@GOTPAGE
Lloh15:
	ldr	x9, [x9, _JZ_NAND_ECC_CTRL_ENCODING@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	orr	w10, w9, w8
	bic	w8, w8, w9
	cmp	w19, #0
	csel	w0, w8, w10, eq
	ldr	x8, [x20]
	ldr	x9, [x21]
	add	x1, x9, x8
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_writel
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_JZ_REG_NAND_IRQ_STAT,8,3       ; @JZ_REG_NAND_IRQ_STAT
	.comm	_JZ_REG_NAND_ECC_CTRL,8,3       ; @JZ_REG_NAND_ECC_CTRL
	.comm	_JZ_NAND_ECC_CTRL_RESET,4,2     ; @JZ_NAND_ECC_CTRL_RESET
	.comm	_JZ_NAND_ECC_CTRL_ENABLE,4,2    ; @JZ_NAND_ECC_CTRL_ENABLE
	.comm	_JZ_NAND_ECC_CTRL_RS,4,2        ; @JZ_NAND_ECC_CTRL_RS
	.comm	_JZ_NAND_ECC_CTRL_ENCODING,4,2  ; @JZ_NAND_ECC_CTRL_ENCODING
	.no_dead_strip	_jz4740_ecc_reset
.subsections_via_symbols
