	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mlx4_init_sl2vl_tbl
_mlx4_init_sl2vl_tbl:                   ## @mlx4_init_sl2vl_tbl
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	16(%rdi), %rax
	cmpl	$0, (%rax)
	jle	LBB0_8
## %bb.1:
	movq	%rdi, %r15
	leaq	8(%rdi), %r14
	movl	$1, %ebx
	xorl	%r13d, %r13d
	movq	_MLX4_PORT_TYPE_ETH@GOTPCREL(%rip), %r12
	jmp	LBB0_2
	.p2align	4, 0x90
LBB0_5:                                 ##   in Loop: Header=BB0_2 Depth=1
	leaq	L_.str(%rip), %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_pr_err
	movq	$0, -48(%rbp)
	xorl	%esi, %esi
LBB0_6:                                 ##   in Loop: Header=BB0_2 Depth=1
	movq	(%r15), %rdi
	addq	%r13, %rdi
	callq	_atomic64_set
	movq	16(%r15), %rax
LBB0_7:                                 ##   in Loop: Header=BB0_2 Depth=1
	leaq	1(%rbx), %rcx
	movslq	(%rax), %rdx
	addq	$4, %r13
	cmpq	%rdx, %rbx
	movq	%rcx, %rbx
	jge	LBB0_8
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%rax), %rcx
	movq	(%rcx,%rbx,8), %rcx
	cmpq	(%r12), %rcx
	je	LBB0_7
## %bb.3:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	leaq	-48(%rbp), %rdx
	callq	_mlx4_ib_query_sl2vl
	testl	%eax, %eax
	jne	LBB0_5
## %bb.4:                               ##   in Loop: Header=BB0_2 Depth=1
	movq	-48(%rbp), %rsi
	jmp	LBB0_6
LBB0_8:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MLX4_PORT_TYPE_ETH,8,3         ## @MLX4_PORT_TYPE_ETH
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Unable to get default sl to vl mapping for port %d.  Using all zeroes (%d)\n"

	.no_dead_strip	_mlx4_init_sl2vl_tbl
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mlx4_init_sl2vl_tbl
_mlx4_init_sl2vl_tbl:                   ; @mlx4_init_sl2vl_tbl
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	x8, [x0, #16]
	ldr	w9, [x8]
	cmp	w9, #1
	b.lt	LBB0_8
; %bb.1:
	mov	x19, x0
	mov	x23, #0
	add	x20, x0, #8
	mov	w21, #1
Lloh0:
	adrp	x24, _MLX4_PORT_TYPE_ETH@GOTPAGE
Lloh1:
	ldr	x24, [x24, _MLX4_PORT_TYPE_ETH@GOTPAGEOFF]
Lloh2:
	adrp	x22, l_.str@PAGE
Lloh3:
	add	x22, x22, l_.str@PAGEOFF
	b	LBB0_5
LBB0_2:                                 ;   in Loop: Header=BB0_5 Depth=1
	mov	x2, x0
	mov	x0, x22
	mov	x1, x21
	bl	_pr_err
	mov	x1, #0
	str	xzr, [sp, #8]
LBB0_3:                                 ;   in Loop: Header=BB0_5 Depth=1
	ldr	x8, [x19]
	add	x0, x8, x23
	bl	_atomic64_set
	ldr	x8, [x19, #16]
LBB0_4:                                 ;   in Loop: Header=BB0_5 Depth=1
	add	x9, x21, #1
	ldrsw	x10, [x8]
	add	x23, x23, #4
	cmp	x21, x10
	mov	x21, x9
	b.ge	LBB0_8
LBB0_5:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x9, [x8, #8]
	ldr	x9, [x9, x21, lsl #3]
	ldr	x10, [x24]
	cmp	x9, x10
	b.eq	LBB0_4
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	add	x2, sp, #8
	mov	x0, x20
	mov	x1, x21
	bl	_mlx4_ib_query_sl2vl
	cbnz	w0, LBB0_2
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=1
	ldr	x1, [sp, #8]
	b	LBB0_3
LBB0_8:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MLX4_PORT_TYPE_ETH,8,3         ; @MLX4_PORT_TYPE_ETH
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Unable to get default sl to vl mapping for port %d.  Using all zeroes (%d)\n"

	.no_dead_strip	_mlx4_init_sl2vl_tbl
.subsections_via_symbols
