	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function msdc_init_hw
_msdc_init_hw:                          ## @msdc_init_hw
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	80(%rdi), %rax
	movl	(%rax), %r14d
	movq	_MSDC_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	(%rbx), %edi
	movq	_MSDC_CFG_MODE@GOTPCREL(%rip), %rax
	movq	_MSDC_CFG_CKPDN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	callq	_sdr_set_bits
	movq	%rbx, %rdi
	callq	_msdc_reset_hw
	movq	_MSDC_INTEN@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	addl	(%rbx), %esi
	xorl	%edi, %edi
	callq	_writel
	movq	_MSDC_INT@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	addl	(%rbx), %edi
	callq	_readl
	movl	(%r12), %esi
	addl	(%rbx), %esi
	movl	%eax, %edi
	callq	_writel
	cmpq	$0, 88(%rbx)
	movl	(%rbx), %edi
	je	LBB0_2
## %bb.1:
	movq	_MSDC_PS@GOTPCREL(%rip), %r12
	addl	(%r12), %edi
	movq	_MSDC_PS_CDDEBOUNCE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DEFAULT_DEBOUNCE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_sdr_set_field
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movq	_MSDC_PS_CDEN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_set_bits
	movl	(%r15), %edi
	addl	(%rbx), %edi
	movq	_MSDC_INTEN_CDSC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_set_bits
	movq	_SDC_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	(%rbx), %edi
	movq	_SDC_CFG_INSWKUP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_set_bits
	jmp	LBB0_3
LBB0_2:
	movq	_SDC_CFG@GOTPCREL(%rip), %rax
	addl	(%rax), %edi
	movq	_SDC_CFG_INSWKUP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_clr_bits
	movq	_MSDC_PS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	(%rbx), %edi
	movq	_MSDC_PS_CDEN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_clr_bits
	movl	(%r15), %edi
	addl	(%rbx), %edi
	movq	_MSDC_INTEN_CDSC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_clr_bits
LBB0_3:
	movl	4(%rbx), %esi
	testl	%esi, %esi
	je	LBB0_5
## %bb.4:
	movq	_EMMC_TOP_CONTROL@GOTPCREL(%rip), %rax
	addl	(%rax), %esi
	xorl	%edi, %edi
	callq	_writel
	movq	_EMMC_TOP_CMD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	4(%rbx), %esi
	jmp	LBB0_6
LBB0_5:
	movl	(%rbx), %esi
	addl	%r14d, %esi
LBB0_6:
	xorl	%edi, %edi
	callq	_writel
	movq	_MSDC_IOCON@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	addl	(%rbx), %esi
	xorl	%edi, %edi
	callq	_writel
	movl	(%r15), %edi
	addl	(%rbx), %edi
	movq	_MSDC_IOCON_DDLSEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_sdr_set_field
	movq	_MSDC_PATCH_BIT@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	addl	(%rbx), %esi
	movl	$1077674054, %edi               ## imm = 0x403C0046
	callq	_writel
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movq	_MSDC_CKGEN_MSDC_DLY_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	callq	_sdr_set_field
	movq	_MSDC_PATCH_BIT1@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	addl	(%rbx), %esi
	movl	$-49015, %edi                   ## imm = 0xFFFF4089
	callq	_writel
	movq	_EMMC50_CFG0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	(%rbx), %edi
	movq	_EMMC50_CFG_CFCSTS_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_set_bits
	movq	80(%rbx), %rax
	cmpq	$0, 48(%rax)
	je	LBB0_8
## %bb.7:
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movq	_MSDC_PATCH_BIT1_STOP_DLY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$3, %edx
	callq	_sdr_set_field
	movq	_SDC_FIFO_CFG@GOTPCREL(%rip), %r13
	movl	(%r13), %edi
	addl	(%rbx), %edi
	movq	_SDC_FIFO_CFG_WRVALIDSEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_clr_bits
	movl	(%r13), %edi
	addl	(%rbx), %edi
	movq	_SDC_FIFO_CFG_RDVALIDSEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_clr_bits
	movq	80(%rbx), %rax
LBB0_8:
	cmpq	$0, 40(%rax)
	je	LBB0_10
## %bb.9:
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movl	$128, %esi
	callq	_sdr_clr_bits
	movq	80(%rbx), %rax
LBB0_10:
	cmpq	$0, 32(%rax)
	je	LBB0_18
## %bb.11:
	movq	_MSDC_PATCH_BIT2@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movq	_MSDC_PB2_RESPWAIT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$3, %edx
	callq	_sdr_set_field
	movq	80(%rbx), %rax
	cmpq	$0, 24(%rax)
	je	LBB0_16
## %bb.12:
	movl	4(%rbx), %edi
	testl	%edi, %edi
	je	LBB0_15
## %bb.13:
	movq	_EMMC_TOP_CONTROL@GOTPCREL(%rip), %rax
	addl	(%rax), %edi
	movq	_SDC_RX_ENH_EN@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_16:
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movq	_MSDC_PB2_RESPSTSENSEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$2, %edx
	callq	_sdr_set_field
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movq	_MSDC_PB2_CRCSTSENSEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$2, %edx
	callq	_sdr_set_field
	jmp	LBB0_17
LBB0_15:
	movq	_SDC_ADV_CFG0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	(%rbx), %edi
	movq	_SDC_RX_ENHANCE_EN@GOTPCREL(%rip), %rax
LBB0_14:
	movl	(%rax), %esi
	callq	_sdr_set_bits
LBB0_17:
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movq	_MSDC_PATCH_BIT2_CFGRESP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_clr_bits
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movq	_MSDC_PATCH_BIT2_CFGCRCSTS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_set_bits
	movq	80(%rbx), %rax
LBB0_18:
	cmpq	$0, 16(%rax)
	je	LBB0_20
## %bb.19:
	movq	_MSDC_PATCH_BIT2@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	(%rbx), %edi
	movq	_MSDC_PB2_SUPPORT_64G@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_set_bits
	movq	80(%rbx), %rax
LBB0_20:
	cmpq	$0, 8(%rax)
	movl	4(%rbx), %edi
	je	LBB0_24
## %bb.21:
	testl	%edi, %edi
	je	LBB0_23
## %bb.22:
	movq	_EMMC_TOP_CONTROL@GOTPCREL(%rip), %r12
	addl	(%r12), %edi
	movq	_PAD_DAT_RD_RXDLY_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_set_bits
	movl	(%r12), %edi
	addl	4(%rbx), %edi
	movq	_DATA_K_VALUE_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_clr_bits
	movq	_EMMC_TOP_CMD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	4(%rbx), %edi
	movq	_PAD_CMD_RD_RXDLY_SEL@GOTPCREL(%rip), %rax
	jmp	LBB0_27
LBB0_24:
	testl	%edi, %edi
	je	LBB0_26
## %bb.25:
	movq	_EMMC_TOP_CONTROL@GOTPCREL(%rip), %rax
	addl	(%rax), %edi
	movq	_PAD_RXDLY_SEL@GOTPCREL(%rip), %rax
	jmp	LBB0_27
LBB0_23:
	movl	(%rbx), %edi
	addl	%r14d, %edi
	movq	_MSDC_PAD_TUNE_RD_SEL@GOTPCREL(%rip), %rax
	movq	_MSDC_PAD_TUNE_CMD_SEL@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	jmp	LBB0_28
LBB0_26:
	movl	(%rbx), %edi
	addl	%r14d, %edi
	movq	_MSDC_PAD_TUNE_RXDLYSEL@GOTPCREL(%rip), %rax
LBB0_27:
	movl	(%rax), %esi
LBB0_28:
	callq	_sdr_set_bits
	movq	_SDC_CFG@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movq	_SDC_CFG_SDIO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_set_bits
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movq	_SDC_CFG_SDIOIDE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_clr_bits
	movq	_SDC_ADV_CFG0@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	(%rbx), %edi
	movq	_SDC_DAT1_IRQ_TRIGGER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_set_bits
	movl	(%r12), %edi
	addl	(%rbx), %edi
	movq	_SDC_CFG_DTOC@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$3, %edx
	callq	_sdr_set_field
	movl	(%r15), %edi
	addl	(%rbx), %edi
	callq	_readl
	movq	%rax, 72(%rbx)
	movl	(%r15), %edi
	addl	(%rbx), %edi
	callq	_readl
	movq	%rax, 40(%rbx)
	movl	4(%rbx), %edi
	testl	%edi, %edi
	je	LBB0_30
## %bb.29:
	movq	_EMMC_TOP_CONTROL@GOTPCREL(%rip), %r14
	addl	(%r14), %edi
	callq	_readl
	movq	%rax, 64(%rbx)
	movq	_EMMC_TOP_CMD@GOTPCREL(%rip), %r15
	movl	(%r15), %edi
	addl	4(%rbx), %edi
	callq	_readl
	movq	%rax, 56(%rbx)
	movl	(%r14), %edi
	addl	4(%rbx), %edi
	callq	_readl
	movq	%rax, 32(%rbx)
	movl	(%r15), %edi
	addl	4(%rbx), %edi
	callq	_readl
	movq	%rax, 24(%rbx)
	jmp	LBB0_31
LBB0_30:
	movl	(%rbx), %edi
	addl	%r14d, %edi
	callq	_readl
	movq	%rax, 48(%rbx)
	addl	(%rbx), %r14d
	movl	%r14d, %edi
	callq	_readl
	movq	%rax, 16(%rbx)
LBB0_31:
	movl	8(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_dbg                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_MSDC_CFG,4,2                   ## @MSDC_CFG
	.comm	_MSDC_CFG_MODE,4,2              ## @MSDC_CFG_MODE
	.comm	_MSDC_CFG_CKPDN,4,2             ## @MSDC_CFG_CKPDN
	.comm	_MSDC_INTEN,4,2                 ## @MSDC_INTEN
	.comm	_MSDC_INT,4,2                   ## @MSDC_INT
	.comm	_MSDC_PS,4,2                    ## @MSDC_PS
	.comm	_MSDC_PS_CDDEBOUNCE,4,2         ## @MSDC_PS_CDDEBOUNCE
	.comm	_DEFAULT_DEBOUNCE,4,2           ## @DEFAULT_DEBOUNCE
	.comm	_MSDC_PS_CDEN,4,2               ## @MSDC_PS_CDEN
	.comm	_MSDC_INTEN_CDSC,4,2            ## @MSDC_INTEN_CDSC
	.comm	_SDC_CFG,4,2                    ## @SDC_CFG
	.comm	_SDC_CFG_INSWKUP,4,2            ## @SDC_CFG_INSWKUP
	.comm	_EMMC_TOP_CONTROL,4,2           ## @EMMC_TOP_CONTROL
	.comm	_EMMC_TOP_CMD,4,2               ## @EMMC_TOP_CMD
	.comm	_MSDC_IOCON,4,2                 ## @MSDC_IOCON
	.comm	_MSDC_IOCON_DDLSEL,4,2          ## @MSDC_IOCON_DDLSEL
	.comm	_MSDC_PATCH_BIT,4,2             ## @MSDC_PATCH_BIT
	.comm	_MSDC_CKGEN_MSDC_DLY_SEL,4,2    ## @MSDC_CKGEN_MSDC_DLY_SEL
	.comm	_MSDC_PATCH_BIT1,4,2            ## @MSDC_PATCH_BIT1
	.comm	_EMMC50_CFG0,4,2                ## @EMMC50_CFG0
	.comm	_EMMC50_CFG_CFCSTS_SEL,4,2      ## @EMMC50_CFG_CFCSTS_SEL
	.comm	_MSDC_PATCH_BIT1_STOP_DLY,4,2   ## @MSDC_PATCH_BIT1_STOP_DLY
	.comm	_SDC_FIFO_CFG,4,2               ## @SDC_FIFO_CFG
	.comm	_SDC_FIFO_CFG_WRVALIDSEL,4,2    ## @SDC_FIFO_CFG_WRVALIDSEL
	.comm	_SDC_FIFO_CFG_RDVALIDSEL,4,2    ## @SDC_FIFO_CFG_RDVALIDSEL
	.comm	_MSDC_PATCH_BIT2,4,2            ## @MSDC_PATCH_BIT2
	.comm	_MSDC_PB2_RESPWAIT,4,2          ## @MSDC_PB2_RESPWAIT
	.comm	_SDC_RX_ENH_EN,4,2              ## @SDC_RX_ENH_EN
	.comm	_SDC_ADV_CFG0,4,2               ## @SDC_ADV_CFG0
	.comm	_SDC_RX_ENHANCE_EN,4,2          ## @SDC_RX_ENHANCE_EN
	.comm	_MSDC_PB2_RESPSTSENSEL,4,2      ## @MSDC_PB2_RESPSTSENSEL
	.comm	_MSDC_PB2_CRCSTSENSEL,4,2       ## @MSDC_PB2_CRCSTSENSEL
	.comm	_MSDC_PATCH_BIT2_CFGRESP,4,2    ## @MSDC_PATCH_BIT2_CFGRESP
	.comm	_MSDC_PATCH_BIT2_CFGCRCSTS,4,2  ## @MSDC_PATCH_BIT2_CFGCRCSTS
	.comm	_MSDC_PB2_SUPPORT_64G,4,2       ## @MSDC_PB2_SUPPORT_64G
	.comm	_PAD_DAT_RD_RXDLY_SEL,4,2       ## @PAD_DAT_RD_RXDLY_SEL
	.comm	_DATA_K_VALUE_SEL,4,2           ## @DATA_K_VALUE_SEL
	.comm	_PAD_CMD_RD_RXDLY_SEL,4,2       ## @PAD_CMD_RD_RXDLY_SEL
	.comm	_MSDC_PAD_TUNE_RD_SEL,4,2       ## @MSDC_PAD_TUNE_RD_SEL
	.comm	_MSDC_PAD_TUNE_CMD_SEL,4,2      ## @MSDC_PAD_TUNE_CMD_SEL
	.comm	_PAD_RXDLY_SEL,4,2              ## @PAD_RXDLY_SEL
	.comm	_MSDC_PAD_TUNE_RXDLYSEL,4,2     ## @MSDC_PAD_TUNE_RXDLYSEL
	.comm	_SDC_CFG_SDIO,4,2               ## @SDC_CFG_SDIO
	.comm	_SDC_CFG_SDIOIDE,4,2            ## @SDC_CFG_SDIOIDE
	.comm	_SDC_DAT1_IRQ_TRIGGER,4,2       ## @SDC_DAT1_IRQ_TRIGGER
	.comm	_SDC_CFG_DTOC,4,2               ## @SDC_CFG_DTOC
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"init hardware done!"

	.no_dead_strip	_msdc_init_hw
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function msdc_init_hw
_msdc_init_hw:                          ; @msdc_init_hw
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x8, [x0, #80]
	ldr	w20, [x8]
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _MSDC_CFG@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MSDC_CFG@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
Lloh3:
	adrp	x10, _MSDC_CFG_MODE@GOTPAGE
Lloh4:
	ldr	x10, [x10, _MSDC_CFG_MODE@GOTPAGEOFF]
	add	w0, w9, w8
Lloh5:
	ldr	w8, [x10]
Lloh6:
	adrp	x9, _MSDC_CFG_CKPDN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _MSDC_CFG_CKPDN@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w1, w9, w8
	bl	_sdr_set_bits
	mov	x0, x19
	bl	_msdc_reset_hw
	ldr	w8, [x19]
Lloh9:
	adrp	x22, _MSDC_INTEN@GOTPAGE
Lloh10:
	ldr	x22, [x22, _MSDC_INTEN@GOTPAGEOFF]
	ldr	w9, [x22]
	add	w1, w9, w8
	mov	w0, #0
	bl	_writel
	ldr	w8, [x19]
Lloh11:
	adrp	x21, _MSDC_INT@GOTPAGE
Lloh12:
	ldr	x21, [x21, _MSDC_INT@GOTPAGEOFF]
	ldr	w9, [x21]
	add	w0, w9, w8
	bl	_readl
	ldr	w8, [x19]
	ldr	w9, [x21]
	add	w1, w9, w8
                                        ; kill: def $w0 killed $w0 killed $x0
	bl	_writel
	ldr	x9, [x19, #88]
	ldr	w8, [x19]
Lloh13:
	adrp	x21, _SDC_CFG@GOTPAGE
Lloh14:
	ldr	x21, [x21, _SDC_CFG@GOTPAGEOFF]
	cbz	x9, LBB0_2
; %bb.1:
Lloh15:
	adrp	x23, _MSDC_PS@GOTPAGE
Lloh16:
	ldr	x23, [x23, _MSDC_PS@GOTPAGEOFF]
	ldr	w9, [x23]
	add	w0, w9, w8
Lloh17:
	adrp	x8, _MSDC_PS_CDDEBOUNCE@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MSDC_PS_CDDEBOUNCE@GOTPAGEOFF]
Lloh19:
	ldr	w1, [x8]
Lloh20:
	adrp	x8, _DEFAULT_DEBOUNCE@GOTPAGE
Lloh21:
	ldr	x8, [x8, _DEFAULT_DEBOUNCE@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	bl	_sdr_set_field
	ldr	w8, [x19]
	ldr	w9, [x23]
	add	w0, w9, w8
Lloh23:
	adrp	x8, _MSDC_PS_CDEN@GOTPAGE
Lloh24:
	ldr	x8, [x8, _MSDC_PS_CDEN@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	bl	_sdr_set_bits
	ldr	w8, [x19]
	ldr	w9, [x22]
	add	w0, w9, w8
Lloh26:
	adrp	x8, _MSDC_INTEN_CDSC@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MSDC_INTEN_CDSC@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	bl	_sdr_set_bits
	ldr	w8, [x19]
	ldr	w9, [x21]
	add	w0, w9, w8
Lloh29:
	adrp	x8, _SDC_CFG_INSWKUP@GOTPAGE
Lloh30:
	ldr	x8, [x8, _SDC_CFG_INSWKUP@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	bl	_sdr_set_bits
	b	LBB0_3
LBB0_2:
	ldr	w9, [x21]
	add	w0, w9, w8
Lloh32:
	adrp	x8, _SDC_CFG_INSWKUP@GOTPAGE
Lloh33:
	ldr	x8, [x8, _SDC_CFG_INSWKUP@GOTPAGEOFF]
Lloh34:
	ldr	w1, [x8]
	bl	_sdr_clr_bits
Lloh35:
	adrp	x8, _MSDC_PS@GOTPAGE
Lloh36:
	ldr	x8, [x8, _MSDC_PS@GOTPAGEOFF]
	ldr	w9, [x19]
Lloh37:
	ldr	w8, [x8]
	add	w0, w8, w9
Lloh38:
	adrp	x8, _MSDC_PS_CDEN@GOTPAGE
Lloh39:
	ldr	x8, [x8, _MSDC_PS_CDEN@GOTPAGEOFF]
Lloh40:
	ldr	w1, [x8]
	bl	_sdr_clr_bits
	ldr	w8, [x19]
	ldr	w9, [x22]
	add	w0, w9, w8
Lloh41:
	adrp	x8, _MSDC_INTEN_CDSC@GOTPAGE
Lloh42:
	ldr	x8, [x8, _MSDC_INTEN_CDSC@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
	bl	_sdr_clr_bits
LBB0_3:
	ldr	w8, [x19, #4]
Lloh44:
	adrp	x23, _EMMC_TOP_CONTROL@GOTPAGE
Lloh45:
	ldr	x23, [x23, _EMMC_TOP_CONTROL@GOTPAGEOFF]
Lloh46:
	adrp	x22, _EMMC_TOP_CMD@GOTPAGE
Lloh47:
	ldr	x22, [x22, _EMMC_TOP_CMD@GOTPAGEOFF]
	cbz	w8, LBB0_5
; %bb.4:
	ldr	w9, [x23]
	add	w1, w9, w8
	mov	w0, #0
	bl	_writel
	ldr	w8, [x19, #4]
	ldr	w9, [x22]
	add	w1, w9, w8
	b	LBB0_6
LBB0_5:
	ldr	w8, [x19]
	add	w1, w8, w20
LBB0_6:
	mov	w0, #0
	bl	_writel
	ldr	w8, [x19]
Lloh48:
	adrp	x24, _MSDC_IOCON@GOTPAGE
Lloh49:
	ldr	x24, [x24, _MSDC_IOCON@GOTPAGEOFF]
	ldr	w9, [x24]
	add	w1, w9, w8
	mov	w0, #0
	bl	_writel
	ldr	w8, [x19]
	ldr	w9, [x24]
	add	w0, w9, w8
Lloh50:
	adrp	x8, _MSDC_IOCON_DDLSEL@GOTPAGE
Lloh51:
	ldr	x8, [x8, _MSDC_IOCON_DDLSEL@GOTPAGEOFF]
Lloh52:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_sdr_set_field
	ldr	w8, [x19]
Lloh53:
	adrp	x25, _MSDC_PATCH_BIT@GOTPAGE
Lloh54:
	ldr	x25, [x25, _MSDC_PATCH_BIT@GOTPAGEOFF]
	ldr	w9, [x25]
	add	w1, w9, w8
	mov	w0, #70
	movk	w0, #16444, lsl #16
	bl	_writel
	ldr	w8, [x19]
	ldr	w9, [x25]
	add	w0, w9, w8
Lloh55:
	adrp	x8, _MSDC_CKGEN_MSDC_DLY_SEL@GOTPAGE
Lloh56:
	ldr	x8, [x8, _MSDC_CKGEN_MSDC_DLY_SEL@GOTPAGEOFF]
Lloh57:
	ldr	w1, [x8]
	mov	w2, #1
	bl	_sdr_set_field
	ldr	w8, [x19]
Lloh58:
	adrp	x25, _MSDC_PATCH_BIT1@GOTPAGE
Lloh59:
	ldr	x25, [x25, _MSDC_PATCH_BIT1@GOTPAGEOFF]
	ldr	w9, [x25]
	add	w1, w9, w8
	mov	w0, #-49015
	bl	_writel
Lloh60:
	adrp	x8, _EMMC50_CFG0@GOTPAGE
Lloh61:
	ldr	x8, [x8, _EMMC50_CFG0@GOTPAGEOFF]
	ldr	w9, [x19]
Lloh62:
	ldr	w8, [x8]
	add	w0, w8, w9
Lloh63:
	adrp	x8, _EMMC50_CFG_CFCSTS_SEL@GOTPAGE
Lloh64:
	ldr	x8, [x8, _EMMC50_CFG_CFCSTS_SEL@GOTPAGEOFF]
Lloh65:
	ldr	w1, [x8]
	bl	_sdr_set_bits
	ldr	x8, [x19, #80]
	ldr	x9, [x8, #48]
	cbz	x9, LBB0_8
; %bb.7:
	ldr	w8, [x19]
	ldr	w9, [x25]
	add	w0, w9, w8
Lloh66:
	adrp	x8, _MSDC_PATCH_BIT1_STOP_DLY@GOTPAGE
Lloh67:
	ldr	x8, [x8, _MSDC_PATCH_BIT1_STOP_DLY@GOTPAGEOFF]
Lloh68:
	ldr	w1, [x8]
	mov	w2, #3
	bl	_sdr_set_field
Lloh69:
	adrp	x26, _SDC_FIFO_CFG@GOTPAGE
Lloh70:
	ldr	x26, [x26, _SDC_FIFO_CFG@GOTPAGEOFF]
	ldr	w8, [x19]
	ldr	w9, [x26]
	add	w0, w9, w8
Lloh71:
	adrp	x8, _SDC_FIFO_CFG_WRVALIDSEL@GOTPAGE
Lloh72:
	ldr	x8, [x8, _SDC_FIFO_CFG_WRVALIDSEL@GOTPAGEOFF]
Lloh73:
	ldr	w1, [x8]
	bl	_sdr_clr_bits
	ldr	w8, [x19]
	ldr	w9, [x26]
	add	w0, w9, w8
Lloh74:
	adrp	x8, _SDC_FIFO_CFG_RDVALIDSEL@GOTPAGE
Lloh75:
	ldr	x8, [x8, _SDC_FIFO_CFG_RDVALIDSEL@GOTPAGEOFF]
Lloh76:
	ldr	w1, [x8]
	bl	_sdr_clr_bits
	ldr	x8, [x19, #80]
LBB0_8:
	ldr	x9, [x8, #40]
	cbz	x9, LBB0_10
; %bb.9:
	ldr	w8, [x19]
	ldr	w9, [x25]
	add	w0, w9, w8
	mov	w1, #128
	bl	_sdr_clr_bits
	ldr	x8, [x19, #80]
LBB0_10:
	ldr	x9, [x8, #32]
Lloh77:
	adrp	x26, _MSDC_PATCH_BIT2@GOTPAGE
Lloh78:
	ldr	x26, [x26, _MSDC_PATCH_BIT2@GOTPAGEOFF]
Lloh79:
	adrp	x25, _SDC_ADV_CFG0@GOTPAGE
Lloh80:
	ldr	x25, [x25, _SDC_ADV_CFG0@GOTPAGEOFF]
	cbz	x9, LBB0_18
; %bb.11:
	ldr	w8, [x19]
	ldr	w9, [x26]
	add	w0, w9, w8
Lloh81:
	adrp	x8, _MSDC_PB2_RESPWAIT@GOTPAGE
Lloh82:
	ldr	x8, [x8, _MSDC_PB2_RESPWAIT@GOTPAGEOFF]
Lloh83:
	ldr	w1, [x8]
	mov	w2, #3
	bl	_sdr_set_field
	ldr	x8, [x19, #80]
	ldr	x8, [x8, #24]
	cbz	x8, LBB0_14
; %bb.12:
	ldr	w8, [x19, #4]
	cbz	w8, LBB0_15
; %bb.13:
	ldr	w9, [x23]
	add	w0, w9, w8
Lloh84:
	adrp	x8, _SDC_RX_ENH_EN@GOTPAGE
Lloh85:
	ldr	x8, [x8, _SDC_RX_ENH_EN@GOTPAGEOFF]
	b	LBB0_16
LBB0_14:
	ldr	w8, [x19]
	ldr	w9, [x26]
	add	w0, w9, w8
Lloh86:
	adrp	x8, _MSDC_PB2_RESPSTSENSEL@GOTPAGE
Lloh87:
	ldr	x8, [x8, _MSDC_PB2_RESPSTSENSEL@GOTPAGEOFF]
Lloh88:
	ldr	w1, [x8]
	mov	w2, #2
	bl	_sdr_set_field
	ldr	w8, [x19]
	ldr	w9, [x26]
	add	w0, w9, w8
Lloh89:
	adrp	x8, _MSDC_PB2_CRCSTSENSEL@GOTPAGE
Lloh90:
	ldr	x8, [x8, _MSDC_PB2_CRCSTSENSEL@GOTPAGEOFF]
Lloh91:
	ldr	w1, [x8]
	mov	w2, #2
	bl	_sdr_set_field
	b	LBB0_17
LBB0_15:
	ldr	w8, [x19]
	ldr	w9, [x25]
	add	w0, w9, w8
Lloh92:
	adrp	x8, _SDC_RX_ENHANCE_EN@GOTPAGE
Lloh93:
	ldr	x8, [x8, _SDC_RX_ENHANCE_EN@GOTPAGEOFF]
LBB0_16:
	ldr	w1, [x8]
	bl	_sdr_set_bits
LBB0_17:
	ldr	w8, [x19]
	ldr	w9, [x26]
	add	w0, w9, w8
Lloh94:
	adrp	x8, _MSDC_PATCH_BIT2_CFGRESP@GOTPAGE
Lloh95:
	ldr	x8, [x8, _MSDC_PATCH_BIT2_CFGRESP@GOTPAGEOFF]
Lloh96:
	ldr	w1, [x8]
	bl	_sdr_clr_bits
	ldr	w8, [x19]
	ldr	w9, [x26]
	add	w0, w9, w8
Lloh97:
	adrp	x8, _MSDC_PATCH_BIT2_CFGCRCSTS@GOTPAGE
Lloh98:
	ldr	x8, [x8, _MSDC_PATCH_BIT2_CFGCRCSTS@GOTPAGEOFF]
Lloh99:
	ldr	w1, [x8]
	bl	_sdr_set_bits
	ldr	x8, [x19, #80]
LBB0_18:
	ldr	x9, [x8, #16]
	cbz	x9, LBB0_20
; %bb.19:
	ldr	w8, [x19]
	ldr	w9, [x26]
	add	w0, w9, w8
Lloh100:
	adrp	x8, _MSDC_PB2_SUPPORT_64G@GOTPAGE
Lloh101:
	ldr	x8, [x8, _MSDC_PB2_SUPPORT_64G@GOTPAGEOFF]
Lloh102:
	ldr	w1, [x8]
	bl	_sdr_set_bits
	ldr	x8, [x19, #80]
LBB0_20:
	ldr	x9, [x8, #8]
	ldr	w8, [x19, #4]
	cbz	x9, LBB0_23
; %bb.21:
	cbz	w8, LBB0_25
; %bb.22:
	ldr	w9, [x23]
	add	w0, w9, w8
Lloh103:
	adrp	x8, _PAD_DAT_RD_RXDLY_SEL@GOTPAGE
Lloh104:
	ldr	x8, [x8, _PAD_DAT_RD_RXDLY_SEL@GOTPAGEOFF]
Lloh105:
	ldr	w1, [x8]
	bl	_sdr_set_bits
	ldr	w8, [x19, #4]
	ldr	w9, [x23]
	add	w0, w9, w8
Lloh106:
	adrp	x8, _DATA_K_VALUE_SEL@GOTPAGE
Lloh107:
	ldr	x8, [x8, _DATA_K_VALUE_SEL@GOTPAGEOFF]
Lloh108:
	ldr	w1, [x8]
	bl	_sdr_clr_bits
	ldr	w8, [x19, #4]
	ldr	w9, [x22]
	add	w0, w9, w8
Lloh109:
	adrp	x8, _PAD_CMD_RD_RXDLY_SEL@GOTPAGE
Lloh110:
	ldr	x8, [x8, _PAD_CMD_RD_RXDLY_SEL@GOTPAGEOFF]
	b	LBB0_27
LBB0_23:
	cbz	w8, LBB0_26
; %bb.24:
	ldr	w9, [x23]
	add	w0, w9, w8
Lloh111:
	adrp	x8, _PAD_RXDLY_SEL@GOTPAGE
Lloh112:
	ldr	x8, [x8, _PAD_RXDLY_SEL@GOTPAGEOFF]
	b	LBB0_27
LBB0_25:
	ldr	w8, [x19]
Lloh113:
	adrp	x9, _MSDC_PAD_TUNE_RD_SEL@GOTPAGE
Lloh114:
	ldr	x9, [x9, _MSDC_PAD_TUNE_RD_SEL@GOTPAGEOFF]
	add	w0, w8, w20
Lloh115:
	ldr	w8, [x9]
Lloh116:
	adrp	x9, _MSDC_PAD_TUNE_CMD_SEL@GOTPAGE
Lloh117:
	ldr	x9, [x9, _MSDC_PAD_TUNE_CMD_SEL@GOTPAGEOFF]
Lloh118:
	ldr	w9, [x9]
	orr	w1, w9, w8
	b	LBB0_28
LBB0_26:
	ldr	w8, [x19]
	add	w0, w8, w20
Lloh119:
	adrp	x8, _MSDC_PAD_TUNE_RXDLYSEL@GOTPAGE
Lloh120:
	ldr	x8, [x8, _MSDC_PAD_TUNE_RXDLYSEL@GOTPAGEOFF]
LBB0_27:
	ldr	w1, [x8]
LBB0_28:
	bl	_sdr_set_bits
	ldr	w8, [x19]
	ldr	w9, [x21]
	add	w0, w9, w8
Lloh121:
	adrp	x8, _SDC_CFG_SDIO@GOTPAGE
Lloh122:
	ldr	x8, [x8, _SDC_CFG_SDIO@GOTPAGEOFF]
Lloh123:
	ldr	w1, [x8]
	bl	_sdr_set_bits
	ldr	w8, [x19]
	ldr	w9, [x21]
	add	w0, w9, w8
Lloh124:
	adrp	x8, _SDC_CFG_SDIOIDE@GOTPAGE
Lloh125:
	ldr	x8, [x8, _SDC_CFG_SDIOIDE@GOTPAGEOFF]
Lloh126:
	ldr	w1, [x8]
	bl	_sdr_clr_bits
	ldr	w8, [x19]
	ldr	w9, [x25]
	add	w0, w9, w8
Lloh127:
	adrp	x8, _SDC_DAT1_IRQ_TRIGGER@GOTPAGE
Lloh128:
	ldr	x8, [x8, _SDC_DAT1_IRQ_TRIGGER@GOTPAGEOFF]
Lloh129:
	ldr	w1, [x8]
	bl	_sdr_set_bits
	ldr	w8, [x19]
	ldr	w9, [x21]
	add	w0, w9, w8
Lloh130:
	adrp	x8, _SDC_CFG_DTOC@GOTPAGE
Lloh131:
	ldr	x8, [x8, _SDC_CFG_DTOC@GOTPAGEOFF]
Lloh132:
	ldr	w1, [x8]
	mov	w2, #3
	bl	_sdr_set_field
	ldr	w8, [x19]
	ldr	w9, [x24]
	add	w0, w9, w8
	bl	_readl
	str	x0, [x19, #72]
	ldr	w8, [x19]
	ldr	w9, [x24]
	add	w0, w9, w8
	bl	_readl
	str	x0, [x19, #40]
	ldr	w8, [x19, #4]
	cbz	w8, LBB0_30
; %bb.29:
	ldr	w9, [x23]
	add	w0, w9, w8
	bl	_readl
	str	x0, [x19, #64]
	ldr	w8, [x19, #4]
	ldr	w9, [x22]
	add	w0, w9, w8
	bl	_readl
	str	x0, [x19, #56]
	ldr	w8, [x19, #4]
	ldr	w9, [x23]
	add	w0, w9, w8
	bl	_readl
	str	x0, [x19, #32]
	ldr	w8, [x19, #4]
	ldr	w9, [x22]
	add	w0, w9, w8
	bl	_readl
	str	x0, [x19, #24]
	b	LBB0_31
LBB0_30:
	ldr	w8, [x19]
	add	w0, w8, w20
	bl	_readl
	str	x0, [x19, #48]
	ldr	w8, [x19]
	add	w0, w8, w20
	bl	_readl
	str	x0, [x19, #16]
LBB0_31:
	ldr	w0, [x19, #8]
Lloh133:
	adrp	x1, l_.str@PAGE
Lloh134:
	add	x1, x1, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_dev_dbg
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGot	Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGot	Lloh79, Lloh80
	.loh AdrpLdrGot	Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGot	Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGot	Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh106, Lloh107, Lloh108
	.loh AdrpLdrGotLdr	Lloh103, Lloh104, Lloh105
	.loh AdrpLdrGot	Lloh111, Lloh112
	.loh AdrpLdrGotLdr	Lloh116, Lloh117, Lloh118
	.loh AdrpLdrGotLdr	Lloh113, Lloh114, Lloh115
	.loh AdrpLdrGot	Lloh119, Lloh120
	.loh AdrpLdrGotLdr	Lloh130, Lloh131, Lloh132
	.loh AdrpLdrGotLdr	Lloh127, Lloh128, Lloh129
	.loh AdrpLdrGotLdr	Lloh124, Lloh125, Lloh126
	.loh AdrpLdrGotLdr	Lloh121, Lloh122, Lloh123
	.loh AdrpAdd	Lloh133, Lloh134
	.cfi_endproc
                                        ; -- End function
	.comm	_MSDC_CFG,4,2                   ; @MSDC_CFG
	.comm	_MSDC_CFG_MODE,4,2              ; @MSDC_CFG_MODE
	.comm	_MSDC_CFG_CKPDN,4,2             ; @MSDC_CFG_CKPDN
	.comm	_MSDC_INTEN,4,2                 ; @MSDC_INTEN
	.comm	_MSDC_INT,4,2                   ; @MSDC_INT
	.comm	_MSDC_PS,4,2                    ; @MSDC_PS
	.comm	_MSDC_PS_CDDEBOUNCE,4,2         ; @MSDC_PS_CDDEBOUNCE
	.comm	_DEFAULT_DEBOUNCE,4,2           ; @DEFAULT_DEBOUNCE
	.comm	_MSDC_PS_CDEN,4,2               ; @MSDC_PS_CDEN
	.comm	_MSDC_INTEN_CDSC,4,2            ; @MSDC_INTEN_CDSC
	.comm	_SDC_CFG,4,2                    ; @SDC_CFG
	.comm	_SDC_CFG_INSWKUP,4,2            ; @SDC_CFG_INSWKUP
	.comm	_EMMC_TOP_CONTROL,4,2           ; @EMMC_TOP_CONTROL
	.comm	_EMMC_TOP_CMD,4,2               ; @EMMC_TOP_CMD
	.comm	_MSDC_IOCON,4,2                 ; @MSDC_IOCON
	.comm	_MSDC_IOCON_DDLSEL,4,2          ; @MSDC_IOCON_DDLSEL
	.comm	_MSDC_PATCH_BIT,4,2             ; @MSDC_PATCH_BIT
	.comm	_MSDC_CKGEN_MSDC_DLY_SEL,4,2    ; @MSDC_CKGEN_MSDC_DLY_SEL
	.comm	_MSDC_PATCH_BIT1,4,2            ; @MSDC_PATCH_BIT1
	.comm	_EMMC50_CFG0,4,2                ; @EMMC50_CFG0
	.comm	_EMMC50_CFG_CFCSTS_SEL,4,2      ; @EMMC50_CFG_CFCSTS_SEL
	.comm	_MSDC_PATCH_BIT1_STOP_DLY,4,2   ; @MSDC_PATCH_BIT1_STOP_DLY
	.comm	_SDC_FIFO_CFG,4,2               ; @SDC_FIFO_CFG
	.comm	_SDC_FIFO_CFG_WRVALIDSEL,4,2    ; @SDC_FIFO_CFG_WRVALIDSEL
	.comm	_SDC_FIFO_CFG_RDVALIDSEL,4,2    ; @SDC_FIFO_CFG_RDVALIDSEL
	.comm	_MSDC_PATCH_BIT2,4,2            ; @MSDC_PATCH_BIT2
	.comm	_MSDC_PB2_RESPWAIT,4,2          ; @MSDC_PB2_RESPWAIT
	.comm	_SDC_RX_ENH_EN,4,2              ; @SDC_RX_ENH_EN
	.comm	_SDC_ADV_CFG0,4,2               ; @SDC_ADV_CFG0
	.comm	_SDC_RX_ENHANCE_EN,4,2          ; @SDC_RX_ENHANCE_EN
	.comm	_MSDC_PB2_RESPSTSENSEL,4,2      ; @MSDC_PB2_RESPSTSENSEL
	.comm	_MSDC_PB2_CRCSTSENSEL,4,2       ; @MSDC_PB2_CRCSTSENSEL
	.comm	_MSDC_PATCH_BIT2_CFGRESP,4,2    ; @MSDC_PATCH_BIT2_CFGRESP
	.comm	_MSDC_PATCH_BIT2_CFGCRCSTS,4,2  ; @MSDC_PATCH_BIT2_CFGCRCSTS
	.comm	_MSDC_PB2_SUPPORT_64G,4,2       ; @MSDC_PB2_SUPPORT_64G
	.comm	_PAD_DAT_RD_RXDLY_SEL,4,2       ; @PAD_DAT_RD_RXDLY_SEL
	.comm	_DATA_K_VALUE_SEL,4,2           ; @DATA_K_VALUE_SEL
	.comm	_PAD_CMD_RD_RXDLY_SEL,4,2       ; @PAD_CMD_RD_RXDLY_SEL
	.comm	_MSDC_PAD_TUNE_RD_SEL,4,2       ; @MSDC_PAD_TUNE_RD_SEL
	.comm	_MSDC_PAD_TUNE_CMD_SEL,4,2      ; @MSDC_PAD_TUNE_CMD_SEL
	.comm	_PAD_RXDLY_SEL,4,2              ; @PAD_RXDLY_SEL
	.comm	_MSDC_PAD_TUNE_RXDLYSEL,4,2     ; @MSDC_PAD_TUNE_RXDLYSEL
	.comm	_SDC_CFG_SDIO,4,2               ; @SDC_CFG_SDIO
	.comm	_SDC_CFG_SDIOIDE,4,2            ; @SDC_CFG_SDIOIDE
	.comm	_SDC_DAT1_IRQ_TRIGGER,4,2       ; @SDC_DAT1_IRQ_TRIGGER
	.comm	_SDC_CFG_DTOC,4,2               ; @SDC_CFG_DTOC
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"init hardware done!"

	.no_dead_strip	_msdc_init_hw
.subsections_via_symbols
