	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function jz4780_nemc_configure_bank
_jz4780_nemc_configure_bank:            ## @jz4780_nemc_configure_bank
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r12
	movl	%esi, %r14d
	movq	%rdi, %r15
	movq	(%rdi), %rbx
	movl	%esi, %edi
	callq	_NEMC_SMCRn
	addq	%rax, %rbx
	movq	%rbx, %rdi
	callq	_readl
	movq	_NEMC_SMCR_SMT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r13d
	notl	%r13d
	andl	%eax, %r13d
	leaq	L_.str(%rip), %rsi
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	callq	_of_property_read_u32
	testq	%rax, %rax
	jne	LBB0_3
## %bb.1:
	movl	-44(%rbp), %edx
	cmpl	$8, %edx
	jne	LBB0_26
## %bb.2:
	movq	_NEMC_SMCR_BW_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r13d
	movq	_NEMC_SMCR_BW_8@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
LBB0_3:
	leaq	L_.str.2(%rip), %rsi
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	callq	_of_property_read_u32
	testq	%rax, %rax
	jne	LBB0_8
## %bb.4:
	movq	_NEMC_SMCR_TAS_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	-44(%rbp), %esi
	movq	%r15, %rdi
	callq	_jz4780_nemc_ns_to_cycles
	movq	16(%r15), %rcx
	cmpl	(%rcx), %eax
	jle	LBB0_7
## %bb.5:
	movl	8(%r15), %edi
	movl	-44(%rbp), %edx
	leaq	L_.str.3(%rip), %rsi
	jmp	LBB0_6
LBB0_26:
	movl	8(%r15), %edi
	leaq	L_.str.1(%rip), %rsi
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_25
LBB0_7:
	notl	%ebx
	andl	%ebx, %r13d
	movq	_NEMC_SMCR_TAS_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %r13d
LBB0_8:
	leaq	L_.str.4(%rip), %rsi
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	callq	_of_property_read_u32
	testq	%rax, %rax
	jne	LBB0_12
## %bb.9:
	movq	_NEMC_SMCR_TAH_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	-44(%rbp), %esi
	movq	%r15, %rdi
	callq	_jz4780_nemc_ns_to_cycles
	movq	16(%r15), %rcx
	cmpl	(%rcx), %eax
	jle	LBB0_11
## %bb.10:
	movl	8(%r15), %edi
	movl	-44(%rbp), %edx
	leaq	L_.str.5(%rip), %rsi
	jmp	LBB0_6
LBB0_11:
	notl	%ebx
	andl	%ebx, %r13d
	movq	_NEMC_SMCR_TAH_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %r13d
LBB0_12:
	leaq	L_.str.6(%rip), %rsi
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	callq	_of_property_read_u32
	testq	%rax, %rax
	jne	LBB0_16
## %bb.13:
	movq	_NEMC_SMCR_TBP_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	-44(%rbp), %esi
	movq	%r15, %rdi
	callq	_jz4780_nemc_ns_to_cycles
	cmpl	$32, %eax
	jl	LBB0_15
## %bb.14:
	movl	8(%r15), %edi
	movl	-44(%rbp), %edx
	leaq	L_.str.7(%rip), %rsi
	jmp	LBB0_6
LBB0_15:
	notl	%ebx
	andl	%ebx, %r13d
	cltq
	leaq	_jz4780_nemc_configure_bank.convert_tBP_tAW(%rip), %rcx
	movl	(%rcx,%rax,4), %eax
	movq	_NEMC_SMCR_TBP_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %r13d
LBB0_16:
	leaq	L_.str.8(%rip), %rsi
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	callq	_of_property_read_u32
	testq	%rax, %rax
	jne	LBB0_20
## %bb.17:
	movq	_NEMC_SMCR_TAW_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	-44(%rbp), %esi
	movq	%r15, %rdi
	callq	_jz4780_nemc_ns_to_cycles
	cmpl	$32, %eax
	jl	LBB0_19
## %bb.18:
	movl	8(%r15), %edi
	movl	-44(%rbp), %edx
	leaq	L_.str.9(%rip), %rsi
	jmp	LBB0_6
LBB0_19:
	notl	%ebx
	andl	%ebx, %r13d
	cltq
	leaq	_jz4780_nemc_configure_bank.convert_tBP_tAW(%rip), %rcx
	movl	(%rcx,%rax,4), %eax
	movq	_NEMC_SMCR_TAW_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %r13d
LBB0_20:
	leaq	L_.str.10(%rip), %rsi
	leaq	-44(%rbp), %rdx
	movq	%r12, %rdi
	callq	_of_property_read_u32
	testq	%rax, %rax
	jne	LBB0_24
## %bb.21:
	movq	_NEMC_SMCR_TSTRV_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	-44(%rbp), %esi
	movq	%r15, %rdi
	callq	_jz4780_nemc_ns_to_cycles
	cmpl	$64, %eax
	jl	LBB0_23
## %bb.22:
	movl	8(%r15), %edi
	movl	-44(%rbp), %edx
	leaq	L_.str.11(%rip), %rsi
LBB0_6:
	xorl	%ebx, %ebx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_25
LBB0_23:
	notl	%ebx
	andl	%ebx, %r13d
	movq	_NEMC_SMCR_TSTRV_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%eax, %r13d
LBB0_24:
	movq	(%r15), %rbx
	movl	%r14d, %edi
	callq	_NEMC_SMCRn
	addq	%rax, %rbx
	movl	%r13d, %edi
	movq	%rbx, %rsi
	callq	_writel
	movl	$1, %ebx
LBB0_25:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__const
	.p2align	4                               ## @jz4780_nemc_configure_bank.convert_tBP_tAW
_jz4780_nemc_configure_bank.convert_tBP_tAW:
	.long	0                               ## 0x0
	.long	1                               ## 0x1
	.long	2                               ## 0x2
	.long	3                               ## 0x3
	.long	4                               ## 0x4
	.long	5                               ## 0x5
	.long	6                               ## 0x6
	.long	7                               ## 0x7
	.long	8                               ## 0x8
	.long	9                               ## 0x9
	.long	10                              ## 0xa
	.long	11                              ## 0xb
	.long	11                              ## 0xb
	.long	12                              ## 0xc
	.long	12                              ## 0xc
	.long	12                              ## 0xc
	.long	13                              ## 0xd
	.long	13                              ## 0xd
	.long	13                              ## 0xd
	.long	13                              ## 0xd
	.long	13                              ## 0xd
	.long	14                              ## 0xe
	.long	14                              ## 0xe
	.long	14                              ## 0xe
	.long	14                              ## 0xe
	.long	14                              ## 0xe
	.long	15                              ## 0xf
	.long	15                              ## 0xf
	.long	15                              ## 0xf
	.long	15                              ## 0xf
	.long	15                              ## 0xf
	.long	15                              ## 0xf

	.comm	_NEMC_SMCR_SMT,4,2              ## @NEMC_SMCR_SMT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"ingenic,nemc-bus-width"

	.comm	_NEMC_SMCR_BW_MASK,4,2          ## @NEMC_SMCR_BW_MASK
	.comm	_NEMC_SMCR_BW_8,4,2             ## @NEMC_SMCR_BW_8
L_.str.1:                               ## @.str.1
	.asciz	"unsupported bus width: %u\n"

L_.str.2:                               ## @.str.2
	.asciz	"ingenic,nemc-tAS"

	.comm	_NEMC_SMCR_TAS_MASK,4,2         ## @NEMC_SMCR_TAS_MASK
L_.str.3:                               ## @.str.3
	.asciz	"tAS %u is too high (%u cycles)\n"

	.comm	_NEMC_SMCR_TAS_SHIFT,4,2        ## @NEMC_SMCR_TAS_SHIFT
L_.str.4:                               ## @.str.4
	.asciz	"ingenic,nemc-tAH"

	.comm	_NEMC_SMCR_TAH_MASK,4,2         ## @NEMC_SMCR_TAH_MASK
L_.str.5:                               ## @.str.5
	.asciz	"tAH %u is too high (%u cycles)\n"

	.comm	_NEMC_SMCR_TAH_SHIFT,4,2        ## @NEMC_SMCR_TAH_SHIFT
L_.str.6:                               ## @.str.6
	.asciz	"ingenic,nemc-tBP"

	.comm	_NEMC_SMCR_TBP_MASK,4,2         ## @NEMC_SMCR_TBP_MASK
L_.str.7:                               ## @.str.7
	.asciz	"tBP %u is too high (%u cycles)\n"

	.comm	_NEMC_SMCR_TBP_SHIFT,4,2        ## @NEMC_SMCR_TBP_SHIFT
L_.str.8:                               ## @.str.8
	.asciz	"ingenic,nemc-tAW"

	.comm	_NEMC_SMCR_TAW_MASK,4,2         ## @NEMC_SMCR_TAW_MASK
L_.str.9:                               ## @.str.9
	.asciz	"tAW %u is too high (%u cycles)\n"

	.comm	_NEMC_SMCR_TAW_SHIFT,4,2        ## @NEMC_SMCR_TAW_SHIFT
L_.str.10:                              ## @.str.10
	.asciz	"ingenic,nemc-tSTRV"

	.comm	_NEMC_SMCR_TSTRV_MASK,4,2       ## @NEMC_SMCR_TSTRV_MASK
L_.str.11:                              ## @.str.11
	.asciz	"tSTRV %u is too high (%u cycles)\n"

	.comm	_NEMC_SMCR_TSTRV_SHIFT,4,2      ## @NEMC_SMCR_TSTRV_SHIFT
	.no_dead_strip	_jz4780_nemc_configure_bank
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function jz4780_nemc_configure_bank
_jz4780_nemc_configure_bank:            ; @jz4780_nemc_configure_bank
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x20, x1
	mov	x19, x0
	ldr	x22, [x0]
	mov	x0, x1
	bl	_NEMC_SMCRn
	add	x0, x0, x22
	bl	_readl
Lloh0:
	adrp	x8, _NEMC_SMCR_SMT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NEMC_SMCR_SMT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	bic	w22, w0, w8
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	add	x2, sp, #12
	mov	x0, x21
	bl	_of_property_read_u32
	cbnz	x0, LBB0_3
; %bb.1:
	ldr	w2, [sp, #12]
	cmp	w2, #8
	b.ne	LBB0_6
; %bb.2:
Lloh5:
	adrp	x8, _NEMC_SMCR_BW_MASK@GOTPAGE
Lloh6:
	ldr	x8, [x8, _NEMC_SMCR_BW_MASK@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	bic	w8, w22, w8
Lloh8:
	adrp	x9, _NEMC_SMCR_BW_8@GOTPAGE
Lloh9:
	ldr	x9, [x9, _NEMC_SMCR_BW_8@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	orr	w22, w8, w9
LBB0_3:
Lloh11:
	adrp	x1, l_.str.2@PAGE
Lloh12:
	add	x1, x1, l_.str.2@PAGEOFF
	add	x2, sp, #12
	mov	x0, x21
	bl	_of_property_read_u32
	cbnz	x0, LBB0_8
; %bb.4:
Lloh13:
	adrp	x8, _NEMC_SMCR_TAS_MASK@GOTPAGE
Lloh14:
	ldr	x8, [x8, _NEMC_SMCR_TAS_MASK@GOTPAGEOFF]
Lloh15:
	ldr	w23, [x8]
	ldr	w1, [sp, #12]
	mov	x0, x19
	bl	_jz4780_nemc_ns_to_cycles
                                        ; kill: def $w0 killed $w0 def $x0
	ldr	x8, [x19, #16]
	ldr	w8, [x8]
	cmp	w0, w8
	b.le	LBB0_7
; %bb.5:
	ldr	w8, [x19, #8]
	ldr	w2, [sp, #12]
	str	x0, [sp]
Lloh16:
	adrp	x1, l_.str.3@PAGE
Lloh17:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_23
LBB0_6:
	ldr	w0, [x19, #8]
Lloh18:
	adrp	x1, l_.str.1@PAGE
Lloh19:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_24
LBB0_7:
	bic	w8, w22, w23
Lloh20:
	adrp	x9, _NEMC_SMCR_TAS_SHIFT@GOTPAGE
Lloh21:
	ldr	x9, [x9, _NEMC_SMCR_TAS_SHIFT@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	lsl	w9, w0, w9
	orr	w22, w9, w8
LBB0_8:
Lloh23:
	adrp	x1, l_.str.4@PAGE
Lloh24:
	add	x1, x1, l_.str.4@PAGEOFF
	add	x2, sp, #12
	mov	x0, x21
	bl	_of_property_read_u32
	cbnz	x0, LBB0_12
; %bb.9:
Lloh25:
	adrp	x8, _NEMC_SMCR_TAH_MASK@GOTPAGE
Lloh26:
	ldr	x8, [x8, _NEMC_SMCR_TAH_MASK@GOTPAGEOFF]
Lloh27:
	ldr	w23, [x8]
	ldr	w1, [sp, #12]
	mov	x0, x19
	bl	_jz4780_nemc_ns_to_cycles
                                        ; kill: def $w0 killed $w0 def $x0
	ldr	x8, [x19, #16]
	ldr	w8, [x8]
	cmp	w0, w8
	b.le	LBB0_11
; %bb.10:
	ldr	w8, [x19, #8]
	ldr	w2, [sp, #12]
	str	x0, [sp]
Lloh28:
	adrp	x1, l_.str.5@PAGE
Lloh29:
	add	x1, x1, l_.str.5@PAGEOFF
	b	LBB0_23
LBB0_11:
	bic	w8, w22, w23
Lloh30:
	adrp	x9, _NEMC_SMCR_TAH_SHIFT@GOTPAGE
Lloh31:
	ldr	x9, [x9, _NEMC_SMCR_TAH_SHIFT@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	lsl	w9, w0, w9
	orr	w22, w9, w8
LBB0_12:
Lloh33:
	adrp	x1, l_.str.6@PAGE
Lloh34:
	add	x1, x1, l_.str.6@PAGEOFF
	add	x2, sp, #12
	mov	x0, x21
	bl	_of_property_read_u32
	cbnz	x0, LBB0_16
; %bb.13:
Lloh35:
	adrp	x8, _NEMC_SMCR_TBP_MASK@GOTPAGE
Lloh36:
	ldr	x8, [x8, _NEMC_SMCR_TBP_MASK@GOTPAGEOFF]
Lloh37:
	ldr	w23, [x8]
	ldr	w1, [sp, #12]
	mov	x0, x19
	bl	_jz4780_nemc_ns_to_cycles
                                        ; kill: def $w0 killed $w0 def $x0
	cmp	w0, #32
	b.lt	LBB0_15
; %bb.14:
	ldr	w8, [x19, #8]
	ldr	w2, [sp, #12]
	str	x0, [sp]
Lloh38:
	adrp	x1, l_.str.7@PAGE
Lloh39:
	add	x1, x1, l_.str.7@PAGEOFF
	b	LBB0_23
LBB0_15:
Lloh40:
	adrp	x8, _jz4780_nemc_configure_bank.convert_tBP_tAW@PAGE
Lloh41:
	add	x8, x8, _jz4780_nemc_configure_bank.convert_tBP_tAW@PAGEOFF
	ldr	w8, [x8, w0, sxtw #2]
	bic	w9, w22, w23
Lloh42:
	adrp	x10, _NEMC_SMCR_TBP_SHIFT@GOTPAGE
Lloh43:
	ldr	x10, [x10, _NEMC_SMCR_TBP_SHIFT@GOTPAGEOFF]
Lloh44:
	ldr	w10, [x10]
	lsl	w8, w8, w10
	orr	w22, w8, w9
LBB0_16:
Lloh45:
	adrp	x1, l_.str.8@PAGE
Lloh46:
	add	x1, x1, l_.str.8@PAGEOFF
	add	x2, sp, #12
	mov	x0, x21
	bl	_of_property_read_u32
	cbnz	x0, LBB0_20
; %bb.17:
Lloh47:
	adrp	x8, _NEMC_SMCR_TAW_MASK@GOTPAGE
Lloh48:
	ldr	x8, [x8, _NEMC_SMCR_TAW_MASK@GOTPAGEOFF]
Lloh49:
	ldr	w23, [x8]
	ldr	w1, [sp, #12]
	mov	x0, x19
	bl	_jz4780_nemc_ns_to_cycles
                                        ; kill: def $w0 killed $w0 def $x0
	cmp	w0, #32
	b.lt	LBB0_19
; %bb.18:
	ldr	w8, [x19, #8]
	ldr	w2, [sp, #12]
	str	x0, [sp]
Lloh50:
	adrp	x1, l_.str.9@PAGE
Lloh51:
	add	x1, x1, l_.str.9@PAGEOFF
	b	LBB0_23
LBB0_19:
Lloh52:
	adrp	x8, _jz4780_nemc_configure_bank.convert_tBP_tAW@PAGE
Lloh53:
	add	x8, x8, _jz4780_nemc_configure_bank.convert_tBP_tAW@PAGEOFF
	ldr	w8, [x8, w0, sxtw #2]
	bic	w9, w22, w23
Lloh54:
	adrp	x10, _NEMC_SMCR_TAW_SHIFT@GOTPAGE
Lloh55:
	ldr	x10, [x10, _NEMC_SMCR_TAW_SHIFT@GOTPAGEOFF]
Lloh56:
	ldr	w10, [x10]
	lsl	w8, w8, w10
	orr	w22, w8, w9
LBB0_20:
Lloh57:
	adrp	x1, l_.str.10@PAGE
Lloh58:
	add	x1, x1, l_.str.10@PAGEOFF
	add	x2, sp, #12
	mov	x0, x21
	bl	_of_property_read_u32
	cbnz	x0, LBB0_26
; %bb.21:
Lloh59:
	adrp	x8, _NEMC_SMCR_TSTRV_MASK@GOTPAGE
Lloh60:
	ldr	x8, [x8, _NEMC_SMCR_TSTRV_MASK@GOTPAGEOFF]
Lloh61:
	ldr	w21, [x8]
	ldr	w1, [sp, #12]
	mov	x0, x19
	bl	_jz4780_nemc_ns_to_cycles
                                        ; kill: def $w0 killed $w0 def $x0
	cmp	w0, #64
	b.lt	LBB0_25
; %bb.22:
	ldr	w8, [x19, #8]
	ldr	w2, [sp, #12]
	str	x0, [sp]
Lloh62:
	adrp	x1, l_.str.11@PAGE
Lloh63:
	add	x1, x1, l_.str.11@PAGEOFF
LBB0_23:
	mov	x0, x8
LBB0_24:
	bl	_dev_err
	mov	w0, #0
	b	LBB0_27
LBB0_25:
	bic	w8, w22, w21
Lloh64:
	adrp	x9, _NEMC_SMCR_TSTRV_SHIFT@GOTPAGE
Lloh65:
	ldr	x9, [x9, _NEMC_SMCR_TSTRV_SHIFT@GOTPAGEOFF]
Lloh66:
	ldr	w9, [x9]
	lsl	w9, w0, w9
	orr	w22, w9, w8
LBB0_26:
	ldr	x19, [x19]
	mov	x0, x20
	bl	_NEMC_SMCRn
	add	x1, x0, x19
	mov	x0, x22
	bl	_writel
	mov	w0, #1
LBB0_27:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpAdd	Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpAdd	Lloh40, Lloh41
	.loh AdrpAdd	Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpAdd	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpAdd	Lloh52, Lloh53
	.loh AdrpAdd	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpAdd	Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__const
	.p2align	2                               ; @jz4780_nemc_configure_bank.convert_tBP_tAW
_jz4780_nemc_configure_bank.convert_tBP_tAW:
	.long	0                               ; 0x0
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.long	3                               ; 0x3
	.long	4                               ; 0x4
	.long	5                               ; 0x5
	.long	6                               ; 0x6
	.long	7                               ; 0x7
	.long	8                               ; 0x8
	.long	9                               ; 0x9
	.long	10                              ; 0xa
	.long	11                              ; 0xb
	.long	11                              ; 0xb
	.long	12                              ; 0xc
	.long	12                              ; 0xc
	.long	12                              ; 0xc
	.long	13                              ; 0xd
	.long	13                              ; 0xd
	.long	13                              ; 0xd
	.long	13                              ; 0xd
	.long	13                              ; 0xd
	.long	14                              ; 0xe
	.long	14                              ; 0xe
	.long	14                              ; 0xe
	.long	14                              ; 0xe
	.long	14                              ; 0xe
	.long	15                              ; 0xf
	.long	15                              ; 0xf
	.long	15                              ; 0xf
	.long	15                              ; 0xf
	.long	15                              ; 0xf
	.long	15                              ; 0xf

	.comm	_NEMC_SMCR_SMT,4,2              ; @NEMC_SMCR_SMT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"ingenic,nemc-bus-width"

	.comm	_NEMC_SMCR_BW_MASK,4,2          ; @NEMC_SMCR_BW_MASK
	.comm	_NEMC_SMCR_BW_8,4,2             ; @NEMC_SMCR_BW_8
l_.str.1:                               ; @.str.1
	.asciz	"unsupported bus width: %u\n"

l_.str.2:                               ; @.str.2
	.asciz	"ingenic,nemc-tAS"

	.comm	_NEMC_SMCR_TAS_MASK,4,2         ; @NEMC_SMCR_TAS_MASK
l_.str.3:                               ; @.str.3
	.asciz	"tAS %u is too high (%u cycles)\n"

	.comm	_NEMC_SMCR_TAS_SHIFT,4,2        ; @NEMC_SMCR_TAS_SHIFT
l_.str.4:                               ; @.str.4
	.asciz	"ingenic,nemc-tAH"

	.comm	_NEMC_SMCR_TAH_MASK,4,2         ; @NEMC_SMCR_TAH_MASK
l_.str.5:                               ; @.str.5
	.asciz	"tAH %u is too high (%u cycles)\n"

	.comm	_NEMC_SMCR_TAH_SHIFT,4,2        ; @NEMC_SMCR_TAH_SHIFT
l_.str.6:                               ; @.str.6
	.asciz	"ingenic,nemc-tBP"

	.comm	_NEMC_SMCR_TBP_MASK,4,2         ; @NEMC_SMCR_TBP_MASK
l_.str.7:                               ; @.str.7
	.asciz	"tBP %u is too high (%u cycles)\n"

	.comm	_NEMC_SMCR_TBP_SHIFT,4,2        ; @NEMC_SMCR_TBP_SHIFT
l_.str.8:                               ; @.str.8
	.asciz	"ingenic,nemc-tAW"

	.comm	_NEMC_SMCR_TAW_MASK,4,2         ; @NEMC_SMCR_TAW_MASK
l_.str.9:                               ; @.str.9
	.asciz	"tAW %u is too high (%u cycles)\n"

	.comm	_NEMC_SMCR_TAW_SHIFT,4,2        ; @NEMC_SMCR_TAW_SHIFT
l_.str.10:                              ; @.str.10
	.asciz	"ingenic,nemc-tSTRV"

	.comm	_NEMC_SMCR_TSTRV_MASK,4,2       ; @NEMC_SMCR_TSTRV_MASK
l_.str.11:                              ; @.str.11
	.asciz	"tSTRV %u is too high (%u cycles)\n"

	.comm	_NEMC_SMCR_TSTRV_SHIFT,4,2      ; @NEMC_SMCR_TSTRV_SHIFT
	.no_dead_strip	_jz4780_nemc_configure_bank
.subsections_via_symbols
