	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ccdc_config_vp
_ccdc_config_vp:                        ## @ccdc_config_vp
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	addq	$8, %rdi
	callq	_to_isp_pipeline
	movq	%rax, %rbx
	movq	%r14, %rdi
	callq	_to_isp_device
	movq	%rax, %r13
	movq	(%rax), %rax
	movq	_ISP_REVISION_15_0@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movl	$64, %eax
	movl	$8, %ecx
	cmovel	%eax, %ecx
	movq	(%r14), %r12
	movq	_CCDC_PAD_SOURCE_VP@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	leaq	(%rax,%rax,2), %r15
	cmpl	$0, 8(%r12,%r15,4)
	je	LBB0_4
## %bb.1:
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movq	%rbx, -64(%rbp)                 ## 8-byte Spill
	movq	(%rbx), %rax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	movq	_ISPCCDC_FMTCFG_VPEN@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	(%r12,%r15,4), %esi
	movq	_ISPCCDC_FMT_HORZ_FMTLNH_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %esi
	movq	_OMAP3_ISP_IOMEM_CCDC@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edx
	movq	_ISPCCDC_FMT_HORZ@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_isp_reg_writel
	movl	4(%r12,%r15,4), %esi
	incl	%esi
	movq	_ISPCCDC_FMT_VERT_FMTLNV_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %esi
	movl	(%rbx), %edx
	movq	_ISPCCDC_FMT_VERT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_isp_reg_writel
	movq	_ISPCCDC_VP_OUT_HORZ_NUM_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	(%r12,%r15,4), %eax
	movl	4(%r12,%r15,4), %esi
	shll	%cl, %eax
	movq	_ISPCCDC_VP_OUT_VERT_NUM_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	orl	%eax, %esi
	movl	(%rbx), %edx
	movq	_ISPCCDC_VP_OUT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	callq	_isp_reg_writel
	movq	(%r14), %rax
	movq	_CCDC_PAD_SINK@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movl	8(%rax,%rcx,4), %edi
	callq	_omap3isp_video_format_info
	movl	(%rax), %eax
	addl	$-8, %eax
	cmpl	$5, %eax
	ja	LBB0_15
## %bb.2:
	leaq	LJTI0_0(%rip), %rcx
	movslq	(%rcx,%rax,4), %rax
	addq	%rcx, %rax
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	jmpq	*%rax
LBB0_3:
	movq	_ISPCCDC_FMTCFG_VPIN_9_0@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_4:
	xorl	%esi, %esi
	jmp	LBB0_19
LBB0_5:
	movq	_ISPCCDC_FMTCFG_VPIN_10_1@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_6:
	movq	_ISPCCDC_FMTCFG_VPIN_11_2@GOTPCREL(%rip), %rax
	jmp	LBB0_8
LBB0_7:
	movq	_ISPCCDC_FMTCFG_VPIN_12_3@GOTPCREL(%rip), %rax
LBB0_8:
	orl	(%rax), %ebx
LBB0_9:
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	cmpq	$0, 16(%rax)
	je	LBB0_11
## %bb.10:
	movl	12(%rax), %esi
	movq	-56(%rbp), %rdi                 ## 8-byte Reload
	callq	_DIV_ROUND_UP
LBB0_17:
	movl	%eax, %edi
LBB0_18:
	movl	-44(%rbp), %edx                 ## 4-byte Reload
                                        ## kill: def $edi killed $edi killed $rdi
	movl	$2, %esi
	callq	_clamp
	movl	%eax, %esi
	addl	$-2, %esi
	movq	_ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %esi
	orl	%ebx, %esi
LBB0_19:
	movq	_OMAP3_ISP_IOMEM_CCDC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_ISPCCDC_FMTCFG@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r13, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_isp_reg_writel                 ## TAILCALL
LBB0_11:
	movslq	8(%rax), %rcx
	testq	%rcx, %rcx
	je	LBB0_14
## %bb.12:
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movq	%rax, %rdx
	orq	%rcx, %rdx
	shrq	$32, %rdx
	je	LBB0_16
## %bb.13:
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %rdi
	jmp	LBB0_18
LBB0_14:
	xorl	%edi, %edi
	jmp	LBB0_18
LBB0_15:
	movl	-48(%rbp), %ebx                 ## 4-byte Reload
	jmp	LBB0_9
LBB0_16:
                                        ## kill: def $eax killed $eax killed $rax
	xorl	%edx, %edx
	divl	%ecx
	jmp	LBB0_17
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_3, LBB0_3-LJTI0_0
.set L0_0_set_9, LBB0_9-LJTI0_0
.set L0_0_set_5, LBB0_5-LJTI0_0
.set L0_0_set_6, LBB0_6-LJTI0_0
.set L0_0_set_7, LBB0_7-LJTI0_0
LJTI0_0:
	.long	L0_0_set_3
	.long	L0_0_set_9
	.long	L0_0_set_3
	.long	L0_0_set_5
	.long	L0_0_set_6
	.long	L0_0_set_7
	.end_data_region
                                        ## -- End function
	.comm	_ISP_REVISION_15_0,8,3          ## @ISP_REVISION_15_0
	.comm	_ISPCCDC_FMTCFG_VPEN,4,2        ## @ISPCCDC_FMTCFG_VPEN
	.comm	_CCDC_PAD_SOURCE_VP,8,3         ## @CCDC_PAD_SOURCE_VP
	.comm	_OMAP3_ISP_IOMEM_CCDC,4,2       ## @OMAP3_ISP_IOMEM_CCDC
	.comm	_ISPCCDC_FMTCFG,4,2             ## @ISPCCDC_FMTCFG
	.comm	_ISPCCDC_FMT_HORZ_FMTSPH_SHIFT,4,2 ## @ISPCCDC_FMT_HORZ_FMTSPH_SHIFT
	.comm	_ISPCCDC_FMT_HORZ_FMTLNH_SHIFT,4,2 ## @ISPCCDC_FMT_HORZ_FMTLNH_SHIFT
	.comm	_ISPCCDC_FMT_HORZ,4,2           ## @ISPCCDC_FMT_HORZ
	.comm	_ISPCCDC_FMT_VERT_FMTSLV_SHIFT,4,2 ## @ISPCCDC_FMT_VERT_FMTSLV_SHIFT
	.comm	_ISPCCDC_FMT_VERT_FMTLNV_SHIFT,4,2 ## @ISPCCDC_FMT_VERT_FMTLNV_SHIFT
	.comm	_ISPCCDC_FMT_VERT,4,2           ## @ISPCCDC_FMT_VERT
	.comm	_ISPCCDC_VP_OUT_HORZ_NUM_SHIFT,4,2 ## @ISPCCDC_VP_OUT_HORZ_NUM_SHIFT
	.comm	_ISPCCDC_VP_OUT_VERT_NUM_SHIFT,4,2 ## @ISPCCDC_VP_OUT_VERT_NUM_SHIFT
	.comm	_ISPCCDC_VP_OUT,4,2             ## @ISPCCDC_VP_OUT
	.comm	_CCDC_PAD_SINK,8,3              ## @CCDC_PAD_SINK
	.comm	_ISPCCDC_FMTCFG_VPIN_9_0,4,2    ## @ISPCCDC_FMTCFG_VPIN_9_0
	.comm	_ISPCCDC_FMTCFG_VPIN_10_1,4,2   ## @ISPCCDC_FMTCFG_VPIN_10_1
	.comm	_ISPCCDC_FMTCFG_VPIN_11_2,4,2   ## @ISPCCDC_FMTCFG_VPIN_11_2
	.comm	_ISPCCDC_FMTCFG_VPIN_12_3,4,2   ## @ISPCCDC_FMTCFG_VPIN_12_3
	.comm	_ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT,4,2 ## @ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT
	.no_dead_strip	_ccdc_config_vp
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ccdc_config_vp
_ccdc_config_vp:                        ; @ccdc_config_vp
	.cfi_startproc
; %bb.0:
	stp	x28, x27, [sp, #-96]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x23, x0
	add	x0, x0, #8
	bl	_to_isp_pipeline
	mov	x21, x0
	mov	x0, x23
	bl	_to_isp_device
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _ISP_REVISION_15_0@GOTPAGE
Lloh1:
	ldr	x9, [x9, _ISP_REVISION_15_0@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	mov	w8, #8
	mov	w9, #64
	csel	w20, w9, w8, eq
	ldr	x8, [x23]
Lloh3:
	adrp	x9, _CCDC_PAD_SOURCE_VP@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CCDC_PAD_SOURCE_VP@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	mov	w10, #12
	madd	x10, x9, x10, x8
	ldr	w10, [x10, #8]
Lloh6:
	adrp	x24, _OMAP3_ISP_IOMEM_CCDC@GOTPAGE
Lloh7:
	ldr	x24, [x24, _OMAP3_ISP_IOMEM_CCDC@GOTPAGEOFF]
	cbz	w10, LBB0_4
; %bb.1:
	ldr	x22, [x21]
Lloh8:
	adrp	x10, _ISPCCDC_FMTCFG_VPEN@GOTPAGE
Lloh9:
	ldr	x10, [x10, _ISPCCDC_FMTCFG_VPEN@GOTPAGEOFF]
Lloh10:
	ldr	w25, [x10]
	mov	w26, #12
	madd	x27, x9, x26, x8
	ldr	w8, [x27]
Lloh11:
	adrp	x9, _ISPCCDC_FMT_HORZ_FMTLNH_SHIFT@GOTPAGE
Lloh12:
	ldr	x9, [x9, _ISPCCDC_FMT_HORZ_FMTLNH_SHIFT@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	lsl	w1, w8, w9
	ldr	w2, [x24]
Lloh14:
	adrp	x8, _ISPCCDC_FMT_HORZ@GOTPAGE
Lloh15:
	ldr	x8, [x8, _ISPCCDC_FMT_HORZ@GOTPAGEOFF]
Lloh16:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_isp_reg_writel
	ldr	w8, [x27, #4]
	add	w8, w8, #1
Lloh17:
	adrp	x9, _ISPCCDC_FMT_VERT_FMTLNV_SHIFT@GOTPAGE
Lloh18:
	ldr	x9, [x9, _ISPCCDC_FMT_VERT_FMTLNV_SHIFT@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	lsl	w1, w8, w9
	ldr	w2, [x24]
Lloh20:
	adrp	x8, _ISPCCDC_FMT_VERT@GOTPAGE
Lloh21:
	ldr	x8, [x8, _ISPCCDC_FMT_VERT@GOTPAGEOFF]
Lloh22:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_isp_reg_writel
Lloh23:
	adrp	x8, _ISPCCDC_VP_OUT_HORZ_NUM_SHIFT@GOTPAGE
Lloh24:
	ldr	x8, [x8, _ISPCCDC_VP_OUT_HORZ_NUM_SHIFT@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	ldp	w9, w10, [x27]
	lsl	w8, w9, w8
Lloh26:
	adrp	x9, _ISPCCDC_VP_OUT_VERT_NUM_SHIFT@GOTPAGE
Lloh27:
	ldr	x9, [x9, _ISPCCDC_VP_OUT_VERT_NUM_SHIFT@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	lsl	w9, w10, w9
	orr	w1, w9, w8
	ldr	w2, [x24]
Lloh29:
	adrp	x8, _ISPCCDC_VP_OUT@GOTPAGE
Lloh30:
	ldr	x8, [x8, _ISPCCDC_VP_OUT@GOTPAGEOFF]
Lloh31:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_isp_reg_writel
	ldr	x8, [x23]
Lloh32:
	adrp	x9, _CCDC_PAD_SINK@GOTPAGE
Lloh33:
	ldr	x9, [x9, _CCDC_PAD_SINK@GOTPAGEOFF]
Lloh34:
	ldr	x9, [x9]
	madd	x8, x9, x26, x8
	ldr	w0, [x8, #8]
	bl	_omap3isp_video_format_info
	ldr	w8, [x0]
	sub	w8, w8, #8
	cmp	w8, #5
	b.hi	LBB0_9
; %bb.2:
Lloh35:
	adrp	x9, lJTI0_0@PAGE
Lloh36:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_3
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_3:
Lloh37:
	adrp	x8, _ISPCCDC_FMTCFG_VPIN_9_0@GOTPAGE
Lloh38:
	ldr	x8, [x8, _ISPCCDC_FMTCFG_VPIN_9_0@GOTPAGEOFF]
	b	LBB0_8
LBB0_4:
	mov	w1, #0
	b	LBB0_15
LBB0_5:
Lloh39:
	adrp	x8, _ISPCCDC_FMTCFG_VPIN_10_1@GOTPAGE
Lloh40:
	ldr	x8, [x8, _ISPCCDC_FMTCFG_VPIN_10_1@GOTPAGEOFF]
	b	LBB0_8
LBB0_6:
Lloh41:
	adrp	x8, _ISPCCDC_FMTCFG_VPIN_11_2@GOTPAGE
Lloh42:
	ldr	x8, [x8, _ISPCCDC_FMTCFG_VPIN_11_2@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:
Lloh43:
	adrp	x8, _ISPCCDC_FMTCFG_VPIN_12_3@GOTPAGE
Lloh44:
	ldr	x8, [x8, _ISPCCDC_FMTCFG_VPIN_12_3@GOTPAGEOFF]
LBB0_8:
	ldr	w8, [x8]
	orr	w25, w8, w25
LBB0_9:
	ldr	x8, [x21, #16]
	cbz	x8, LBB0_11
; %bb.10:
	ldr	w1, [x21, #12]
	mov	x0, x22
	bl	_DIV_ROUND_UP
                                        ; kill: def $w0 killed $w0 def $x0
	b	LBB0_14
LBB0_11:
	ldrsw	x8, [x21, #8]
	cbz	w8, LBB0_13
; %bb.12:
	udiv	x0, x22, x8
	b	LBB0_14
LBB0_13:
	mov	w0, #0
LBB0_14:
                                        ; kill: def $w0 killed $w0 killed $x0
	mov	w1, #2
	mov	x2, x20
	bl	_clamp
	sub	w8, w0, #2
Lloh45:
	adrp	x9, _ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT@GOTPAGE
Lloh46:
	ldr	x9, [x9, _ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT@GOTPAGEOFF]
Lloh47:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	orr	w1, w8, w25
LBB0_15:
Lloh48:
	adrp	x8, _ISPCCDC_FMTCFG@GOTPAGE
Lloh49:
	ldr	x8, [x8, _ISPCCDC_FMTCFG@GOTPAGEOFF]
	ldr	w2, [x24]
Lloh50:
	ldr	w3, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp], #96             ; 16-byte Folded Reload
	b	_isp_reg_writel
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_9-LBB0_3)>>2
	.byte	(LBB0_3-LBB0_3)>>2
	.byte	(LBB0_5-LBB0_3)>>2
	.byte	(LBB0_6-LBB0_3)>>2
	.byte	(LBB0_7-LBB0_3)>>2
                                        ; -- End function
	.comm	_ISP_REVISION_15_0,8,3          ; @ISP_REVISION_15_0
	.comm	_ISPCCDC_FMTCFG_VPEN,4,2        ; @ISPCCDC_FMTCFG_VPEN
	.comm	_CCDC_PAD_SOURCE_VP,8,3         ; @CCDC_PAD_SOURCE_VP
	.comm	_OMAP3_ISP_IOMEM_CCDC,4,2       ; @OMAP3_ISP_IOMEM_CCDC
	.comm	_ISPCCDC_FMTCFG,4,2             ; @ISPCCDC_FMTCFG
	.comm	_ISPCCDC_FMT_HORZ_FMTSPH_SHIFT,4,2 ; @ISPCCDC_FMT_HORZ_FMTSPH_SHIFT
	.comm	_ISPCCDC_FMT_HORZ_FMTLNH_SHIFT,4,2 ; @ISPCCDC_FMT_HORZ_FMTLNH_SHIFT
	.comm	_ISPCCDC_FMT_HORZ,4,2           ; @ISPCCDC_FMT_HORZ
	.comm	_ISPCCDC_FMT_VERT_FMTSLV_SHIFT,4,2 ; @ISPCCDC_FMT_VERT_FMTSLV_SHIFT
	.comm	_ISPCCDC_FMT_VERT_FMTLNV_SHIFT,4,2 ; @ISPCCDC_FMT_VERT_FMTLNV_SHIFT
	.comm	_ISPCCDC_FMT_VERT,4,2           ; @ISPCCDC_FMT_VERT
	.comm	_ISPCCDC_VP_OUT_HORZ_NUM_SHIFT,4,2 ; @ISPCCDC_VP_OUT_HORZ_NUM_SHIFT
	.comm	_ISPCCDC_VP_OUT_VERT_NUM_SHIFT,4,2 ; @ISPCCDC_VP_OUT_VERT_NUM_SHIFT
	.comm	_ISPCCDC_VP_OUT,4,2             ; @ISPCCDC_VP_OUT
	.comm	_CCDC_PAD_SINK,8,3              ; @CCDC_PAD_SINK
	.comm	_ISPCCDC_FMTCFG_VPIN_9_0,4,2    ; @ISPCCDC_FMTCFG_VPIN_9_0
	.comm	_ISPCCDC_FMTCFG_VPIN_10_1,4,2   ; @ISPCCDC_FMTCFG_VPIN_10_1
	.comm	_ISPCCDC_FMTCFG_VPIN_11_2,4,2   ; @ISPCCDC_FMTCFG_VPIN_11_2
	.comm	_ISPCCDC_FMTCFG_VPIN_12_3,4,2   ; @ISPCCDC_FMTCFG_VPIN_12_3
	.comm	_ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT,4,2 ; @ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT
	.no_dead_strip	_ccdc_config_vp
.subsections_via_symbols
