	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function xgene_sgmac_init
_xgene_sgmac_init:                      ## @xgene_sgmac_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	_XGENE_ENET2@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_2
## %bb.1:
	cmpq	$0, 24(%rbx)
	jne	LBB0_3
LBB0_2:
	movq	%rbx, %rdi
	callq	_xgene_sgmac_reset
LBB0_3:
	movq	%rbx, %rdi
	callq	_xgene_sgmii_enable_autoneg
	movq	%rbx, %rdi
	callq	_xgene_sgmac_set_speed
	movq	%rbx, %rdi
	callq	_xgene_sgmac_set_mac_addr
	movq	(%rbx), %rax
	movq	_XGENE_ENET1@GOTPCREL(%rip), %r15
	cmpq	(%r15), %rax
	jne	LBB0_5
## %bb.4:
	movq	_OFFSET_4@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	imull	8(%rbx), %r13d
	movq	_SG_RX_DV_GATE_REG_0_ADDR@GOTPCREL(%rip), %rax
	addl	(%rax), %r13d
	movq	_ENET_SPARE_CFG_REG_ADDR@GOTPCREL(%rip), %rax
	movq	_RSIF_CONFIG_REG_ADDR@GOTPCREL(%rip), %rcx
	movq	_CFG_BYPASS_ADDR@GOTPCREL(%rip), %rdx
	jmp	LBB0_6
LBB0_5:
	movq	_XG_MCX_RX_DV_GATE_REG_0_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_XG_ENET_SPARE_CFG_REG_ADDR@GOTPCREL(%rip), %rax
	movq	_XG_RSIF_CONFIG_REG_ADDR@GOTPCREL(%rip), %rcx
	movq	_XG_CFG_BYPASS_ADDR@GOTPCREL(%rip), %rdx
LBB0_6:
	movl	(%rax), %r14d
	movl	(%rcx), %r12d
	movl	(%rdx), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_xgene_enet_rd_csr
	movq	_MPA_IDLE_WITH_QMI_EMPTY@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movq	%rbx, %rdi
	movl	%r14d, %esi
	movl	%eax, %edx
	callq	_xgene_enet_wr_csr
	movq	_MII_MGMT_CONFIG_ADDR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_xgene_enet_rd_mac
	movl	%eax, -44(%rbp)
	leaq	-44(%rbp), %rdi
	movl	$7, %esi
	callq	_MGMT_CLOCK_SEL_SET
	movl	(%r14), %esi
	movl	-44(%rbp), %edx
	movq	%rbx, %rdi
	callq	_xgene_enet_wr_mac
	movq	%rbx, %rdi
	movl	%r12d, %esi
	callq	_xgene_enet_rd_csr
	movq	_CFG_RSIF_FPBUFF_TIMEOUT_EN@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%eax, -44(%rbp)
	movq	%rbx, %rdi
	movl	%r12d, %esi
	movl	%eax, %edx
	callq	_xgene_enet_wr_csr
	movq	(%rbx), %rax
	cmpq	(%r15), %rax
	jne	LBB0_7
## %bb.8:
	movq	_CSR_MULTI_DPF0_ADDR@GOTPCREL(%rip), %rax
	jmp	LBB0_9
LBB0_7:
	movq	_XG_MCX_MULTI_DPF0_ADDR@GOTPCREL(%rip), %rax
LBB0_9:
	movl	(%rax), %r14d
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_xgene_enet_rd_mcx_csr
	movq	_DEF_QUANTA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	shll	$16, %ecx
	movzwl	%ax, %edx
	orl	%ecx, %edx
	movl	%edx, -44(%rbp)
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_xgene_enet_wr_mcx_csr
	movq	(%rbx), %rax
	cmpq	(%r15), %rax
	je	LBB0_11
## %bb.10:
	movq	_XG_MCX_MULTI_DPF1_ADDR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_xgene_enet_rd_mcx_csr
	movq	_NORM_PAUSE_OPCODE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	shll	$16, %ecx
	movzwl	%ax, %edx
	orl	%ecx, %edx
	movl	%edx, -44(%rbp)
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_xgene_enet_wr_mcx_csr
	movq	(%rbx), %rax
	cmpq	(%r15), %rax
	jne	LBB0_15
LBB0_11:
	movl	%r13d, -48(%rbp)                ## 4-byte Spill
	movq	_RXBUF_PAUSE_THRESH@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_RXBUF_PAUSE_OFF_THRESH@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	%rbx, %rdi
	movl	%r13d, %esi
	callq	_xgene_enet_rd_csr
	movl	%eax, %r15d
	movq	%rbx, %rdi
	movl	%r12d, %esi
	callq	_xgene_enet_rd_csr
	movl	%eax, %r14d
	testb	$1, 8(%rbx)
	jne	LBB0_13
## %bb.12:
	andl	$-65536, %r15d                  ## imm = 0xFFFF0000
	movq	_DEF_PAUSE_THRES@GOTPCREL(%rip), %rax
	orl	(%rax), %r15d
	andl	$-65536, %r14d                  ## imm = 0xFFFF0000
	movq	_DEF_PAUSE_OFF_THRES@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	jmp	LBB0_14
LBB0_13:
	movzwl	%r15w, %eax
	movq	_DEF_PAUSE_THRES@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r15d
	shll	$16, %r15d
	orl	%eax, %r15d
	movzwl	%r14w, %eax
	movq	_DEF_PAUSE_OFF_THRES@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r14d
	shll	$16, %r14d
	orl	%eax, %r14d
LBB0_14:
	movq	%rbx, %rdi
	movl	%r13d, %esi
	movl	%r15d, %edx
	callq	_xgene_enet_wr_csr
	movq	%rbx, %rdi
	movl	%r12d, %esi
	movl	%r14d, %edx
	callq	_xgene_enet_wr_csr
	movl	-48(%rbp), %r13d                ## 4-byte Reload
	jmp	LBB0_16
LBB0_15:
	movq	_XG_RXBUF_PAUSE_THRESH@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DEF_PAUSE_OFF_THRES@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	shll	$16, %edx
	movq	_DEF_PAUSE_THRES@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	%edx, -44(%rbp)
	movq	%rbx, %rdi
	callq	_xgene_enet_wr_csr
LBB0_16:
	movl	16(%rbx), %esi
	movq	%rbx, %rdi
	callq	_xgene_sgmac_flowctl_tx
	movl	12(%rbx), %esi
	movq	%rbx, %rdi
	callq	_xgene_sgmac_flowctl_rx
	movq	_XG_ENET_SPARE_CFG_REG_1_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$132, %edx
	callq	_xgene_enet_wr_csr
	movq	_RESUME_TX@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	-52(%rbp), %esi                 ## 4-byte Reload
	callq	_xgene_enet_wr_csr
	movq	_RESUME_RX0@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	%r13d, %esi
	callq	_xgene_enet_wr_mcx_csr
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_XGENE_ENET2,8,3                ## @XGENE_ENET2
	.comm	_XGENE_ENET1,8,3                ## @XGENE_ENET1
	.comm	_ENET_SPARE_CFG_REG_ADDR,4,2    ## @ENET_SPARE_CFG_REG_ADDR
	.comm	_RSIF_CONFIG_REG_ADDR,4,2       ## @RSIF_CONFIG_REG_ADDR
	.comm	_CFG_BYPASS_ADDR,4,2            ## @CFG_BYPASS_ADDR
	.comm	_OFFSET_4,4,2                   ## @OFFSET_4
	.comm	_SG_RX_DV_GATE_REG_0_ADDR,4,2   ## @SG_RX_DV_GATE_REG_0_ADDR
	.comm	_XG_ENET_SPARE_CFG_REG_ADDR,4,2 ## @XG_ENET_SPARE_CFG_REG_ADDR
	.comm	_XG_RSIF_CONFIG_REG_ADDR,4,2    ## @XG_RSIF_CONFIG_REG_ADDR
	.comm	_XG_CFG_BYPASS_ADDR,4,2         ## @XG_CFG_BYPASS_ADDR
	.comm	_XG_MCX_RX_DV_GATE_REG_0_ADDR,4,2 ## @XG_MCX_RX_DV_GATE_REG_0_ADDR
	.comm	_MPA_IDLE_WITH_QMI_EMPTY,4,2    ## @MPA_IDLE_WITH_QMI_EMPTY
	.comm	_MII_MGMT_CONFIG_ADDR,4,2       ## @MII_MGMT_CONFIG_ADDR
	.comm	_CFG_RSIF_FPBUFF_TIMEOUT_EN,4,2 ## @CFG_RSIF_FPBUFF_TIMEOUT_EN
	.comm	_CSR_MULTI_DPF0_ADDR,4,2        ## @CSR_MULTI_DPF0_ADDR
	.comm	_XG_MCX_MULTI_DPF0_ADDR,4,2     ## @XG_MCX_MULTI_DPF0_ADDR
	.comm	_DEF_QUANTA,4,2                 ## @DEF_QUANTA
	.comm	_XG_MCX_MULTI_DPF1_ADDR,4,2     ## @XG_MCX_MULTI_DPF1_ADDR
	.comm	_NORM_PAUSE_OPCODE,4,2          ## @NORM_PAUSE_OPCODE
	.comm	_RXBUF_PAUSE_THRESH,4,2         ## @RXBUF_PAUSE_THRESH
	.comm	_XG_RXBUF_PAUSE_THRESH,4,2      ## @XG_RXBUF_PAUSE_THRESH
	.comm	_RXBUF_PAUSE_OFF_THRESH,4,2     ## @RXBUF_PAUSE_OFF_THRESH
	.comm	_DEF_PAUSE_THRES,4,2            ## @DEF_PAUSE_THRES
	.comm	_DEF_PAUSE_OFF_THRES,4,2        ## @DEF_PAUSE_OFF_THRES
	.comm	_XG_ENET_SPARE_CFG_REG_1_ADDR,4,2 ## @XG_ENET_SPARE_CFG_REG_1_ADDR
	.comm	_RESUME_TX,4,2                  ## @RESUME_TX
	.comm	_RESUME_RX0,4,2                 ## @RESUME_RX0
	.no_dead_strip	_xgene_sgmac_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function xgene_sgmac_init
_xgene_sgmac_init:                      ; @xgene_sgmac_init
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _XGENE_ENET2@GOTPAGE
Lloh1:
	ldr	x9, [x9, _XGENE_ENET2@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	ldr	x8, [x19, #24]
	cbnz	x8, LBB0_3
LBB0_2:
	mov	x0, x19
	bl	_xgene_sgmac_reset
LBB0_3:
	mov	x0, x19
	bl	_xgene_sgmii_enable_autoneg
	mov	x0, x19
	bl	_xgene_sgmac_set_speed
	mov	x0, x19
	bl	_xgene_sgmac_set_mac_addr
	ldr	x8, [x19]
Lloh3:
	adrp	x24, _XGENE_ENET1@GOTPAGE
Lloh4:
	ldr	x24, [x24, _XGENE_ENET1@GOTPAGEOFF]
	ldr	x9, [x24]
	cmp	x8, x9
	b.ne	LBB0_5
; %bb.4:
Lloh5:
	adrp	x8, _OFFSET_4@GOTPAGE
Lloh6:
	ldr	x8, [x8, _OFFSET_4@GOTPAGEOFF]
	ldr	w9, [x19, #8]
Lloh7:
	ldr	w8, [x8]
Lloh8:
	adrp	x10, _SG_RX_DV_GATE_REG_0_ADDR@GOTPAGE
Lloh9:
	ldr	x10, [x10, _SG_RX_DV_GATE_REG_0_ADDR@GOTPAGEOFF]
Lloh10:
	ldr	w10, [x10]
	madd	w20, w8, w9, w10
Lloh11:
	adrp	x8, _ENET_SPARE_CFG_REG_ADDR@GOTPAGE
Lloh12:
	ldr	x8, [x8, _ENET_SPARE_CFG_REG_ADDR@GOTPAGEOFF]
Lloh13:
	adrp	x9, _RSIF_CONFIG_REG_ADDR@GOTPAGE
Lloh14:
	ldr	x9, [x9, _RSIF_CONFIG_REG_ADDR@GOTPAGEOFF]
Lloh15:
	adrp	x10, _CFG_BYPASS_ADDR@GOTPAGE
Lloh16:
	ldr	x10, [x10, _CFG_BYPASS_ADDR@GOTPAGEOFF]
	b	LBB0_6
LBB0_5:
Lloh17:
	adrp	x8, _XG_MCX_RX_DV_GATE_REG_0_ADDR@GOTPAGE
Lloh18:
	ldr	x8, [x8, _XG_MCX_RX_DV_GATE_REG_0_ADDR@GOTPAGEOFF]
Lloh19:
	ldr	w20, [x8]
Lloh20:
	adrp	x8, _XG_ENET_SPARE_CFG_REG_ADDR@GOTPAGE
Lloh21:
	ldr	x8, [x8, _XG_ENET_SPARE_CFG_REG_ADDR@GOTPAGEOFF]
Lloh22:
	adrp	x9, _XG_RSIF_CONFIG_REG_ADDR@GOTPAGE
Lloh23:
	ldr	x9, [x9, _XG_RSIF_CONFIG_REG_ADDR@GOTPAGEOFF]
Lloh24:
	adrp	x10, _XG_CFG_BYPASS_ADDR@GOTPAGE
Lloh25:
	ldr	x10, [x10, _XG_CFG_BYPASS_ADDR@GOTPAGEOFF]
LBB0_6:
	ldr	w22, [x8]
	ldr	w23, [x9]
	ldr	w21, [x10]
	mov	x0, x19
	mov	x1, x22
	bl	_xgene_enet_rd_csr
Lloh26:
	adrp	x8, _MPA_IDLE_WITH_QMI_EMPTY@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MPA_IDLE_WITH_QMI_EMPTY@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	orr	w2, w8, w0
	mov	x0, x19
	mov	x1, x22
	bl	_xgene_enet_wr_csr
Lloh29:
	adrp	x22, _MII_MGMT_CONFIG_ADDR@GOTPAGE
Lloh30:
	ldr	x22, [x22, _MII_MGMT_CONFIG_ADDR@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_xgene_enet_rd_mac
	str	w0, [sp, #12]
	add	x0, sp, #12
	mov	w1, #7
	bl	_MGMT_CLOCK_SEL_SET
	ldr	w1, [x22]
	ldr	w2, [sp, #12]
	mov	x0, x19
	bl	_xgene_enet_wr_mac
	mov	x0, x19
	mov	x1, x23
	bl	_xgene_enet_rd_csr
Lloh31:
	adrp	x8, _CFG_RSIF_FPBUFF_TIMEOUT_EN@GOTPAGE
Lloh32:
	ldr	x8, [x8, _CFG_RSIF_FPBUFF_TIMEOUT_EN@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
	orr	w2, w8, w0
	str	w2, [sp, #12]
	mov	x0, x19
	mov	x1, x23
	bl	_xgene_enet_wr_csr
	ldr	x8, [x19]
Lloh34:
	adrp	x9, _CSR_MULTI_DPF0_ADDR@GOTPAGE
Lloh35:
	ldr	x9, [x9, _CSR_MULTI_DPF0_ADDR@GOTPAGEOFF]
	ldr	x10, [x24]
Lloh36:
	adrp	x11, _XG_MCX_MULTI_DPF0_ADDR@GOTPAGE
Lloh37:
	ldr	x11, [x11, _XG_MCX_MULTI_DPF0_ADDR@GOTPAGEOFF]
	cmp	x8, x10
	csel	x8, x9, x11, eq
	ldr	w22, [x8]
	mov	x0, x19
	mov	x1, x22
	bl	_xgene_enet_rd_mcx_csr
	mov	x2, x0
Lloh38:
	adrp	x8, _DEF_QUANTA@GOTPAGE
Lloh39:
	ldr	x8, [x8, _DEF_QUANTA@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	bfi	w2, w8, #16, #16
	str	w2, [sp, #12]
	mov	x0, x19
	mov	x1, x22
	bl	_xgene_enet_wr_mcx_csr
	ldr	x8, [x19]
	ldr	x9, [x24]
	cmp	x8, x9
	b.eq	LBB0_8
; %bb.7:
Lloh41:
	adrp	x22, _XG_MCX_MULTI_DPF1_ADDR@GOTPAGE
Lloh42:
	ldr	x22, [x22, _XG_MCX_MULTI_DPF1_ADDR@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_xgene_enet_rd_mcx_csr
	mov	x2, x0
Lloh43:
	adrp	x8, _NORM_PAUSE_OPCODE@GOTPAGE
Lloh44:
	ldr	x8, [x8, _NORM_PAUSE_OPCODE@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	bfi	w2, w8, #16, #16
	str	w2, [sp, #12]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_xgene_enet_wr_mcx_csr
	ldr	x8, [x19]
	ldr	x9, [x24]
	cmp	x8, x9
	b.ne	LBB0_12
LBB0_8:
Lloh46:
	adrp	x8, _RXBUF_PAUSE_THRESH@GOTPAGE
Lloh47:
	ldr	x8, [x8, _RXBUF_PAUSE_THRESH@GOTPAGEOFF]
Lloh48:
	ldr	w23, [x8]
Lloh49:
	adrp	x8, _RXBUF_PAUSE_OFF_THRESH@GOTPAGE
Lloh50:
	ldr	x8, [x8, _RXBUF_PAUSE_OFF_THRESH@GOTPAGEOFF]
Lloh51:
	ldr	w22, [x8]
	mov	x0, x19
	mov	x1, x23
	bl	_xgene_enet_rd_csr
	mov	x24, x0
	mov	x0, x19
	mov	x1, x22
	bl	_xgene_enet_rd_csr
	mov	x25, x0
	ldrb	w8, [x19, #8]
	tbnz	w8, #0, LBB0_10
; %bb.9:
	and	w8, w24, #0xffff0000
Lloh52:
	adrp	x9, _DEF_PAUSE_THRES@GOTPAGE
Lloh53:
	ldr	x9, [x9, _DEF_PAUSE_THRES@GOTPAGEOFF]
Lloh54:
	ldr	w9, [x9]
	orr	w24, w9, w8
	and	w8, w25, #0xffff0000
Lloh55:
	adrp	x9, _DEF_PAUSE_OFF_THRES@GOTPAGE
Lloh56:
	ldr	x9, [x9, _DEF_PAUSE_OFF_THRES@GOTPAGEOFF]
Lloh57:
	ldr	w9, [x9]
	orr	w25, w9, w8
	b	LBB0_11
LBB0_10:
Lloh58:
	adrp	x8, _DEF_PAUSE_THRES@GOTPAGE
Lloh59:
	ldr	x8, [x8, _DEF_PAUSE_THRES@GOTPAGEOFF]
Lloh60:
	ldr	w8, [x8]
	bfi	w24, w8, #16, #16
Lloh61:
	adrp	x8, _DEF_PAUSE_OFF_THRES@GOTPAGE
Lloh62:
	ldr	x8, [x8, _DEF_PAUSE_OFF_THRES@GOTPAGEOFF]
Lloh63:
	ldr	w8, [x8]
	bfi	w25, w8, #16, #16
LBB0_11:
	mov	x0, x19
	mov	x1, x23
	mov	x2, x24
	bl	_xgene_enet_wr_csr
	mov	x0, x19
	mov	x1, x22
	mov	x2, x25
	b	LBB0_13
LBB0_12:
Lloh64:
	adrp	x8, _XG_RXBUF_PAUSE_THRESH@GOTPAGE
Lloh65:
	ldr	x8, [x8, _XG_RXBUF_PAUSE_THRESH@GOTPAGEOFF]
Lloh66:
	ldr	w1, [x8]
Lloh67:
	adrp	x8, _DEF_PAUSE_OFF_THRES@GOTPAGE
Lloh68:
	ldr	x8, [x8, _DEF_PAUSE_OFF_THRES@GOTPAGEOFF]
Lloh69:
	ldr	w8, [x8]
Lloh70:
	adrp	x9, _DEF_PAUSE_THRES@GOTPAGE
Lloh71:
	ldr	x9, [x9, _DEF_PAUSE_THRES@GOTPAGEOFF]
Lloh72:
	ldr	w9, [x9]
	orr	w2, w9, w8, lsl #16
	str	w2, [sp, #12]
	mov	x0, x19
LBB0_13:
	bl	_xgene_enet_wr_csr
	ldr	w1, [x19, #16]
	mov	x0, x19
	bl	_xgene_sgmac_flowctl_tx
	ldr	w1, [x19, #12]
	mov	x0, x19
	bl	_xgene_sgmac_flowctl_rx
Lloh73:
	adrp	x8, _XG_ENET_SPARE_CFG_REG_1_ADDR@GOTPAGE
Lloh74:
	ldr	x8, [x8, _XG_ENET_SPARE_CFG_REG_1_ADDR@GOTPAGEOFF]
Lloh75:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #132
	bl	_xgene_enet_wr_csr
Lloh76:
	adrp	x8, _RESUME_TX@GOTPAGE
Lloh77:
	ldr	x8, [x8, _RESUME_TX@GOTPAGEOFF]
Lloh78:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x21
	bl	_xgene_enet_wr_csr
Lloh79:
	adrp	x8, _RESUME_RX0@GOTPAGE
Lloh80:
	ldr	x8, [x8, _RESUME_RX0@GOTPAGEOFF]
Lloh81:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_xgene_enet_wr_mcx_csr
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh55, Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGotLdr	Lloh58, Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh79, Lloh80, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.cfi_endproc
                                        ; -- End function
	.comm	_XGENE_ENET2,8,3                ; @XGENE_ENET2
	.comm	_XGENE_ENET1,8,3                ; @XGENE_ENET1
	.comm	_ENET_SPARE_CFG_REG_ADDR,4,2    ; @ENET_SPARE_CFG_REG_ADDR
	.comm	_RSIF_CONFIG_REG_ADDR,4,2       ; @RSIF_CONFIG_REG_ADDR
	.comm	_CFG_BYPASS_ADDR,4,2            ; @CFG_BYPASS_ADDR
	.comm	_OFFSET_4,4,2                   ; @OFFSET_4
	.comm	_SG_RX_DV_GATE_REG_0_ADDR,4,2   ; @SG_RX_DV_GATE_REG_0_ADDR
	.comm	_XG_ENET_SPARE_CFG_REG_ADDR,4,2 ; @XG_ENET_SPARE_CFG_REG_ADDR
	.comm	_XG_RSIF_CONFIG_REG_ADDR,4,2    ; @XG_RSIF_CONFIG_REG_ADDR
	.comm	_XG_CFG_BYPASS_ADDR,4,2         ; @XG_CFG_BYPASS_ADDR
	.comm	_XG_MCX_RX_DV_GATE_REG_0_ADDR,4,2 ; @XG_MCX_RX_DV_GATE_REG_0_ADDR
	.comm	_MPA_IDLE_WITH_QMI_EMPTY,4,2    ; @MPA_IDLE_WITH_QMI_EMPTY
	.comm	_MII_MGMT_CONFIG_ADDR,4,2       ; @MII_MGMT_CONFIG_ADDR
	.comm	_CFG_RSIF_FPBUFF_TIMEOUT_EN,4,2 ; @CFG_RSIF_FPBUFF_TIMEOUT_EN
	.comm	_CSR_MULTI_DPF0_ADDR,4,2        ; @CSR_MULTI_DPF0_ADDR
	.comm	_XG_MCX_MULTI_DPF0_ADDR,4,2     ; @XG_MCX_MULTI_DPF0_ADDR
	.comm	_DEF_QUANTA,4,2                 ; @DEF_QUANTA
	.comm	_XG_MCX_MULTI_DPF1_ADDR,4,2     ; @XG_MCX_MULTI_DPF1_ADDR
	.comm	_NORM_PAUSE_OPCODE,4,2          ; @NORM_PAUSE_OPCODE
	.comm	_RXBUF_PAUSE_THRESH,4,2         ; @RXBUF_PAUSE_THRESH
	.comm	_XG_RXBUF_PAUSE_THRESH,4,2      ; @XG_RXBUF_PAUSE_THRESH
	.comm	_RXBUF_PAUSE_OFF_THRESH,4,2     ; @RXBUF_PAUSE_OFF_THRESH
	.comm	_DEF_PAUSE_THRES,4,2            ; @DEF_PAUSE_THRES
	.comm	_DEF_PAUSE_OFF_THRES,4,2        ; @DEF_PAUSE_OFF_THRES
	.comm	_XG_ENET_SPARE_CFG_REG_1_ADDR,4,2 ; @XG_ENET_SPARE_CFG_REG_1_ADDR
	.comm	_RESUME_TX,4,2                  ; @RESUME_TX
	.comm	_RESUME_RX0,4,2                 ; @RESUME_RX0
	.no_dead_strip	_xgene_sgmac_init
.subsections_via_symbols
