	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ## -- Begin function set_send_length
LCPI0_0:
	.long	4                               ## 0x4
	.long	5                               ## 0x5
	.long	6                               ## 0x6
	.long	7                               ## 0x7
LCPI0_1:
	.long	3                               ## 0x3
	.long	3                               ## 0x3
	.long	3                               ## 0x3
	.long	3                               ## 0x3
LCPI0_2:
	.long	1065353216                      ## 0x3f800000
	.long	1065353216                      ## 0x3f800000
	.long	1065353216                      ## 0x3f800000
	.long	1065353216                      ## 0x3f800000
LCPI0_3:
	.long	4                               ## 0x4
	.long	4                               ## 0x4
	.long	4                               ## 0x4
	.long	4                               ## 0x4
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	4, 0x90
_set_send_length:                       ## @set_send_length
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	8(%rdi), %r13
	movq	%r13, %rdi
	callq	_lrh_max_header_bytes
                                        ## kill: def $eax killed $eax def $rax
	movq	(%r13), %r14
	movl	120(%r14), %edi
	leal	(%rdi,%rax), %r12d
	sarl	$2, %r12d
	movq	_SEND_LEN_CHECK1_LEN_VL15_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %r12d
	movq	_SEND_LEN_CHECK1_LEN_VL15_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r12d
	movq	%rbx, -56(%rbp)                 ## 8-byte Spill
	movl	(%rbx), %r11d
	testl	%r11d, %r11d
	jle	LBB0_1
## %bb.2:
	movq	_SEND_LEN_CHECK0_LEN_VL0_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	(%r14), %edx
	cmpl	%edi, %edx
	cmovgl	%edx, %edi
	addl	%eax, %edx
	sarl	$2, %edx
	andl	%esi, %edx
	cmpl	$1, %r11d
	je	LBB0_11
## %bb.3:
	movq	_SEND_LEN_CHECK0_LEN_VL1_SHIFT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r8d
	movl	8(%r14), %ebx
	cmpl	%edi, %ebx
	cmovgl	%ebx, %edi
	addl	%eax, %ebx
	sarl	$2, %ebx
	andl	%esi, %ebx
	movl	%r8d, %ecx
	shll	%cl, %ebx
	orl	%ebx, %edx
	cmpl	$2, %r11d
	je	LBB0_11
## %bb.4:
	movl	16(%r14), %ebx
	cmpl	%edi, %ebx
	cmovgl	%ebx, %edi
	addl	%eax, %ebx
	sarl	$2, %ebx
	andl	%esi, %ebx
	leal	(%r8,%r8), %ecx
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %ebx
	orl	%ebx, %edx
	cmpl	$3, %r11d
	je	LBB0_11
## %bb.5:
	movl	24(%r14), %ecx
	cmpl	%edi, %ecx
	cmovgl	%ecx, %edi
	addl	%eax, %ecx
	sarl	$2, %ecx
	andl	%ecx, %esi
	leal	(%r8,%r8,2), %ecx
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %esi
	orl	%esi, %edx
	cmpl	$4, %r11d
	je	LBB0_11
## %bb.6:
	movq	_SEND_LEN_CHECK1_LEN_VL4_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r8d
	movq	_SEND_LEN_CHECK1_LEN_VL5_SHIFT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r9d
	leaq	-4(%r11), %r10
	movl	$4, %esi
	cmpq	$5, %r10
	jb	LBB0_10
## %bb.7:
	movl	%r11d, %esi
	andl	$3, %esi
	testq	%rsi, %rsi
	movl	$4, %ecx
	cmoveq	%rcx, %rsi
	subq	%rsi, %r10
	movq	%r10, %rsi
	addq	$4, %rsi
	movd	%r12d, %xmm0
	movd	%edi, %xmm1
	pshufd	$0, %xmm1, %xmm1                ## xmm1 = xmm1[0,0,0,0]
	movd	%eax, %xmm2
	pshufd	$0, %xmm2, %xmm2                ## xmm2 = xmm2[0,0,0,0]
	movd	%r8d, %xmm3
	pshufd	$0, %xmm3, %xmm3                ## xmm3 = xmm3[0,0,0,0]
	movd	%r9d, %xmm4
	pshufd	$0, %xmm4, %xmm4                ## xmm4 = xmm4[0,0,0,0]
	movdqa	LCPI0_0(%rip), %xmm5            ## xmm5 = [4,5,6,7]
	movdqa	LCPI0_1(%rip), %xmm8            ## xmm8 = [3,3,3,3]
	movdqa	LCPI0_2(%rip), %xmm9            ## xmm9 = [1065353216,1065353216,1065353216,1065353216]
	movdqa	LCPI0_3(%rip), %xmm10           ## xmm10 = [4,4,4,4]
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movups	(%r14,%rcx,8), %xmm7
	movups	16(%r14,%rcx,8), %xmm6
	shufps	$136, %xmm6, %xmm7              ## xmm7 = xmm7[0,2],xmm6[0,2]
	pmaxsd	%xmm7, %xmm1
	paddd	%xmm2, %xmm7
	psrad	$2, %xmm7
	pand	%xmm3, %xmm7
	movdqa	%xmm5, %xmm6
	pand	%xmm8, %xmm6
	pmulld	%xmm4, %xmm6
	pslld	$23, %xmm6
	paddd	%xmm9, %xmm6
	cvttps2dq	%xmm6, %xmm6
	pmulld	%xmm7, %xmm6
	por	%xmm6, %xmm0
	paddd	%xmm10, %xmm5
	addq	$4, %rcx
	cmpq	%rcx, %rsi
	jne	LBB0_8
## %bb.9:
	pshufd	$238, %xmm1, %xmm2              ## xmm2 = xmm1[2,3,2,3]
	pmaxsd	%xmm1, %xmm2
	pshufd	$85, %xmm2, %xmm1               ## xmm1 = xmm2[1,1,1,1]
	pmaxsd	%xmm2, %xmm1
	movd	%xmm1, %edi
	pshufd	$238, %xmm0, %xmm1              ## xmm1 = xmm0[2,3,2,3]
	por	%xmm0, %xmm1
	pshufd	$85, %xmm1, %xmm0               ## xmm0 = xmm1[1,1,1,1]
	por	%xmm1, %xmm0
	movd	%xmm0, %r12d
	.p2align	4, 0x90
LBB0_10:                                ## =>This Inner Loop Header: Depth=1
	movl	(%r14,%rsi,8), %ebx
	cmpl	%edi, %ebx
	cmovgl	%ebx, %edi
	addl	%eax, %ebx
	sarl	$2, %ebx
	andl	%r8d, %ebx
	movl	%esi, %ecx
	andl	$3, %ecx
	imull	%r9d, %ecx
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %ebx
	orl	%ebx, %r12d
	incq	%rsi
	cmpq	%rsi, %r11
	jne	LBB0_10
LBB0_11:
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	jmp	LBB0_12
LBB0_1:
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	xorl	%edx, %edx
LBB0_12:
	movq	_SEND_LEN_CHECK0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	callq	_write_csr
	movq	_SEND_LEN_CHECK1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movl	%r12d, %edx
	callq	_write_csr
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	cmpl	$0, (%rax)
	jle	LBB0_18
## %bb.13:
	xorl	%r12d, %r12d
	movq	_INIT_SC_PER_VL@GOTPCREL(%rip), %r14
	jmp	LBB0_14
	.p2align	4, 0x90
LBB0_17:                                ##   in Loop: Header=BB0_14 Depth=1
	incq	%r12
	movq	-56(%rbp), %rax                 ## 8-byte Reload
	movslq	(%rax), %rax
	cmpq	%rax, %r12
	jge	LBB0_18
LBB0_14:                                ## =>This Loop Header: Depth=1
                                        ##     Child Loop BB0_16 Depth 2
	movq	(%r13), %rax
	movl	4(%rax,%r12,8), %edi
	movl	$50, %esi
	callq	_sc_percent_to_threshold
	movl	%eax, %ebx
	movq	(%r13), %rax
	movq	8(%r13), %rcx
	movl	(%rax,%r12,8), %esi
	movl	4(%rax,%r12,8), %edi
	movq	(%rcx), %rax
	movl	(%rax), %edx
	callq	_sc_mtu_to_threshold
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_min
	cmpl	$0, (%r14)
	jle	LBB0_17
## %bb.15:                              ##   in Loop: Header=BB0_14 Depth=1
	movl	%eax, %ebx
	xorl	%r15d, %r15d
	.p2align	4, 0x90
LBB0_16:                                ##   Parent Loop BB0_14 Depth=1
                                        ## =>  This Inner Loop Header: Depth=2
	movq	%r13, %rdi
	movl	%r15d, %esi
	movl	%r12d, %edx
	callq	_pio_select_send_context_vl
	movl	%eax, %edi
	movl	%ebx, %esi
	callq	_sc_set_cr_threshold
	incl	%r15d
	cmpl	(%r14), %r15d
	jl	LBB0_16
	jmp	LBB0_17
LBB0_18:
	movq	(%r13), %rax
	movl	124(%rax), %edi
	movl	$50, %esi
	callq	_sc_percent_to_threshold
	movl	%eax, %ebx
	movq	(%r13), %rax
	movq	8(%r13), %rcx
	movl	120(%rax), %esi
	movl	124(%rax), %edi
	movq	(%rcx), %rax
	movl	(%rax), %edx
	callq	_sc_mtu_to_threshold
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_min
	movq	(%r13), %rcx
	movl	124(%rcx), %edi
	movl	%eax, %esi
	callq	_sc_set_cr_threshold
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	cmpl	$10240, %edi                    ## imm = 0x2800
	jne	LBB0_20
## %bb.19:
	movq	_DCC_CFG_PORT_MTU_CAP_10240@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	jmp	LBB0_21
LBB0_20:
	sarl	$8, %edi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_ilog2
	movl	%eax, %ebx
	incl	%ebx
LBB0_21:
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	movq	8(%r15), %rdi
	movq	_DCC_CFG_PORT_CONFIG@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	callq	_read_csr
	movq	_DCC_CFG_PORT_CONFIG_MTU_CAP_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %ebx
	movq	_DCC_CFG_PORT_CONFIG_MTU_CAP_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_DCC_CFG_PORT_CONFIG_MTU_CAP_SMASK@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	notl	%edx
	shll	%cl, %ebx
	andl	%eax, %edx
	orl	%edx, %ebx
	movq	8(%r15), %rdi
	movl	(%r14), %esi
	movl	%ebx, %edx
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_write_csr                      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SEND_LEN_CHECK1_LEN_VL15_MASK,4,2 ## @SEND_LEN_CHECK1_LEN_VL15_MASK
	.comm	_SEND_LEN_CHECK1_LEN_VL15_SHIFT,4,2 ## @SEND_LEN_CHECK1_LEN_VL15_SHIFT
	.comm	_SEND_LEN_CHECK0_LEN_VL0_MASK,4,2 ## @SEND_LEN_CHECK0_LEN_VL0_MASK
	.comm	_SEND_LEN_CHECK0_LEN_VL1_SHIFT,4,2 ## @SEND_LEN_CHECK0_LEN_VL1_SHIFT
	.comm	_SEND_LEN_CHECK1_LEN_VL4_MASK,4,2 ## @SEND_LEN_CHECK1_LEN_VL4_MASK
	.comm	_SEND_LEN_CHECK1_LEN_VL5_SHIFT,4,2 ## @SEND_LEN_CHECK1_LEN_VL5_SHIFT
	.comm	_SEND_LEN_CHECK0,4,2            ## @SEND_LEN_CHECK0
	.comm	_SEND_LEN_CHECK1,4,2            ## @SEND_LEN_CHECK1
	.comm	_INIT_SC_PER_VL,4,2             ## @INIT_SC_PER_VL
	.comm	_DCC_CFG_PORT_MTU_CAP_10240,4,2 ## @DCC_CFG_PORT_MTU_CAP_10240
	.comm	_DCC_CFG_PORT_CONFIG,4,2        ## @DCC_CFG_PORT_CONFIG
	.comm	_DCC_CFG_PORT_CONFIG_MTU_CAP_SMASK,4,2 ## @DCC_CFG_PORT_CONFIG_MTU_CAP_SMASK
	.comm	_DCC_CFG_PORT_CONFIG_MTU_CAP_MASK,4,2 ## @DCC_CFG_PORT_CONFIG_MTU_CAP_MASK
	.comm	_DCC_CFG_PORT_CONFIG_MTU_CAP_SHIFT,4,2 ## @DCC_CFG_PORT_CONFIG_MTU_CAP_SHIFT
	.no_dead_strip	_set_send_length
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal16,16byte_literals
	.p2align	4                               ; -- Begin function set_send_length
lCPI0_0:
	.long	4                               ; 0x4
	.long	5                               ; 0x5
	.long	6                               ; 0x6
	.long	7                               ; 0x7
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_set_send_length:                       ; @set_send_length
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x20, [x0, #8]
	mov	x0, x20
	bl	_lrh_max_header_bytes
	ldr	x9, [x20]
	ldr	w24, [x9, #120]
	add	w8, w24, w0
Lloh0:
	adrp	x10, _SEND_LEN_CHECK1_LEN_VL15_MASK@GOTPAGE
Lloh1:
	ldr	x10, [x10, _SEND_LEN_CHECK1_LEN_VL15_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w10, [x10]
	and	w8, w10, w8, asr #2
Lloh3:
	adrp	x10, _SEND_LEN_CHECK1_LEN_VL15_SHIFT@GOTPAGE
Lloh4:
	ldr	x10, [x10, _SEND_LEN_CHECK1_LEN_VL15_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w10, [x10]
	lsl	w21, w8, w10
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_7
; %bb.1:
Lloh6:
	adrp	x10, _SEND_LEN_CHECK0_LEN_VL0_MASK@GOTPAGE
Lloh7:
	ldr	x10, [x10, _SEND_LEN_CHECK0_LEN_VL0_MASK@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
	ldr	w11, [x9]
	cmp	w11, w24
	csel	w24, w11, w24, gt
	add	w11, w11, w0
	and	w2, w10, w11, asr #2
	cmp	w8, #1
	b.eq	LBB0_8
; %bb.2:
Lloh9:
	adrp	x11, _SEND_LEN_CHECK0_LEN_VL1_SHIFT@GOTPAGE
Lloh10:
	ldr	x11, [x11, _SEND_LEN_CHECK0_LEN_VL1_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w11, [x11]
	ldr	w12, [x9, #8]
	cmp	w12, w24
	csel	w24, w12, w24, gt
	add	w12, w12, w0
	and	w12, w10, w12, asr #2
	lsl	w12, w12, w11
	orr	w2, w12, w2
	cmp	w8, #2
	b.eq	LBB0_8
; %bb.3:
	ldr	w12, [x9, #16]
	cmp	w12, w24
	csel	w24, w12, w24, gt
	add	w12, w12, w0
	and	w12, w10, w12, asr #2
	lsl	w13, w11, #1
	lsl	w12, w12, w13
	orr	w2, w12, w2
	cmp	w8, #3
	b.eq	LBB0_8
; %bb.4:
	ldr	w12, [x9, #24]
	cmp	w12, w24
	csel	w24, w12, w24, gt
	add	w12, w12, w0
	and	w10, w10, w12, asr #2
	add	w11, w11, w11, lsl #1
	lsl	w10, w10, w11
	orr	w2, w10, w2
	cmp	w8, #4
	b.eq	LBB0_8
; %bb.5:
Lloh12:
	adrp	x10, _SEND_LEN_CHECK1_LEN_VL4_MASK@GOTPAGE
Lloh13:
	ldr	x10, [x10, _SEND_LEN_CHECK1_LEN_VL4_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x10]
Lloh15:
	adrp	x11, _SEND_LEN_CHECK1_LEN_VL5_SHIFT@GOTPAGE
Lloh16:
	ldr	x11, [x11, _SEND_LEN_CHECK1_LEN_VL5_SHIFT@GOTPAGEOFF]
Lloh17:
	ldr	w11, [x11]
	sub	x12, x8, #4
	cmp	x12, #17
	b.hs	LBB0_18
; %bb.6:
	mov	w12, #4
	b	LBB0_21
LBB0_7:
	mov	w2, #0
LBB0_8:
Lloh18:
	adrp	x8, _SEND_LEN_CHECK0@GOTPAGE
Lloh19:
	ldr	x8, [x8, _SEND_LEN_CHECK0@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_write_csr
Lloh21:
	adrp	x8, _SEND_LEN_CHECK1@GOTPAGE
Lloh22:
	ldr	x8, [x8, _SEND_LEN_CHECK1@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x20
	mov	x2, x21
	bl	_write_csr
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_14
; %bb.9:
	mov	x21, #0
Lloh24:
	adrp	x25, _INIT_SC_PER_VL@GOTPAGE
Lloh25:
	ldr	x25, [x25, _INIT_SC_PER_VL@GOTPAGEOFF]
	b	LBB0_11
LBB0_10:                                ;   in Loop: Header=BB0_11 Depth=1
	add	x21, x21, #1
	ldrsw	x8, [x19]
	cmp	x21, x8
	b.ge	LBB0_14
LBB0_11:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_13 Depth 2
	ldr	x8, [x20]
	lsl	x23, x21, #3
	add	x8, x8, x23
	ldr	w0, [x8, #4]
	mov	w1, #50
	bl	_sc_percent_to_threshold
	mov	x22, x0
	ldp	x8, x9, [x20]
	add	x8, x8, x23
	ldp	w1, w0, [x8]
	ldr	x8, [x9]
	ldr	w2, [x8]
	bl	_sc_mtu_to_threshold
	mov	x1, x0
	mov	x0, x22
	bl	_min
	ldr	w8, [x25]
	cmp	w8, #1
	b.lt	LBB0_10
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=1
	mov	x22, x0
	mov	w23, #0
LBB0_13:                                ;   Parent Loop BB0_11 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	mov	x0, x20
	mov	x1, x23
	mov	x2, x21
	bl	_pio_select_send_context_vl
	mov	x1, x22
	bl	_sc_set_cr_threshold
	add	w23, w23, #1
	ldr	w8, [x25]
	cmp	w23, w8
	b.lt	LBB0_13
	b	LBB0_10
LBB0_14:
	ldr	x8, [x20]
	ldr	w0, [x8, #124]
	mov	w1, #50
	bl	_sc_percent_to_threshold
	mov	x21, x0
	ldp	x8, x9, [x20]
	ldp	w1, w0, [x8, #120]
	ldr	x8, [x9]
	ldr	w2, [x8]
	bl	_sc_mtu_to_threshold
	mov	x1, x0
	mov	x0, x21
	bl	_min
	mov	x1, x0
	ldr	x8, [x20]
	ldr	w0, [x8, #124]
	bl	_sc_set_cr_threshold
	mov	w8, #10240
	cmp	w24, w8
	b.ne	LBB0_16
; %bb.15:
Lloh26:
	adrp	x8, _DCC_CFG_PORT_MTU_CAP_10240@GOTPAGE
Lloh27:
	ldr	x8, [x8, _DCC_CFG_PORT_MTU_CAP_10240@GOTPAGEOFF]
Lloh28:
	ldr	w20, [x8]
	b	LBB0_17
LBB0_16:
	asr	w0, w24, #8
	bl	_ilog2
	add	w20, w0, #1
LBB0_17:
	ldr	x0, [x19, #8]
Lloh29:
	adrp	x21, _DCC_CFG_PORT_CONFIG@GOTPAGE
Lloh30:
	ldr	x21, [x21, _DCC_CFG_PORT_CONFIG@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_read_csr
Lloh31:
	adrp	x8, _DCC_CFG_PORT_CONFIG_MTU_CAP_SMASK@GOTPAGE
Lloh32:
	ldr	x8, [x8, _DCC_CFG_PORT_CONFIG_MTU_CAP_SMASK@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh34:
	adrp	x9, _DCC_CFG_PORT_CONFIG_MTU_CAP_MASK@GOTPAGE
Lloh35:
	ldr	x9, [x9, _DCC_CFG_PORT_CONFIG_MTU_CAP_MASK@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	and	w9, w9, w20
Lloh37:
	adrp	x10, _DCC_CFG_PORT_CONFIG_MTU_CAP_SHIFT@GOTPAGE
Lloh38:
	ldr	x10, [x10, _DCC_CFG_PORT_CONFIG_MTU_CAP_SHIFT@GOTPAGEOFF]
Lloh39:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w2, w9, w8
	ldr	x0, [x19, #8]
	ldr	w1, [x21]
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_write_csr
LBB0_18:
	ands	x13, x12, #0xf
	mov	w14, #16
	csel	x13, x14, x13, eq
	sub	x13, x12, x13
	add	x12, x13, #4
	movi.2d	v0, #0000000000000000
	movi.2d	v1, #0000000000000000
	mov.s	v1[0], w21
	dup.4s	v2, w24
	dup.4s	v3, w0
	dup.4s	v4, w10
	dup.4s	v5, w11
Lloh40:
	adrp	x14, lCPI0_0@PAGE
Lloh41:
	ldr	q6, [x14, lCPI0_0@PAGEOFF]
	add	x14, x9, #128
	movi.4s	v17, #3
	movi.4s	v18, #16
	movi.2d	v7, #0000000000000000
	movi.2d	v16, #0000000000000000
	mov.16b	v19, v2
	mov.16b	v20, v2
	mov.16b	v21, v2
LBB0_19:                                ; =>This Inner Loop Header: Depth=1
	sub	x15, x14, #96
	ld2.4s	{ v22, v23 }, [x15]
	sub	x15, x14, #64
	ld2.4s	{ v24, v25 }, [x15]
	sub	x15, x14, #32
	ld2.4s	{ v26, v27 }, [x15]
	ld2.4s	{ v28, v29 }, [x14]
	smax.4s	v2, v22, v2
	smax.4s	v19, v24, v19
	smax.4s	v20, v26, v20
	smax.4s	v21, v28, v21
	add.4s	v22, v22, v3
	add.4s	v23, v24, v3
	add.4s	v24, v26, v3
	add.4s	v25, v28, v3
	sshr.4s	v22, v22, #2
	sshr.4s	v23, v23, #2
	sshr.4s	v24, v24, #2
	sshr.4s	v25, v25, #2
	and.16b	v22, v4, v22
	and.16b	v23, v4, v23
	and.16b	v24, v4, v24
	and.16b	v25, v4, v25
	and.16b	v26, v6, v17
	mul.4s	v26, v5, v26
	ushl.4s	v22, v22, v26
	ushl.4s	v23, v23, v26
	ushl.4s	v24, v24, v26
	ushl.4s	v25, v25, v26
	orr.16b	v1, v22, v1
	orr.16b	v0, v23, v0
	orr.16b	v7, v24, v7
	orr.16b	v16, v25, v16
	add.4s	v6, v6, v18
	add	x14, x14, #128
	subs	x13, x13, #16
	b.ne	LBB0_19
; %bb.20:
	smax.4s	v2, v2, v19
	smax.4s	v2, v2, v20
	smax.4s	v2, v2, v21
	smaxv.4s	s2, v2
	fmov	w24, s2
	orr.16b	v0, v0, v1
	orr.16b	v0, v7, v0
	orr.16b	v0, v16, v0
	ext.16b	v1, v0, v0, #8
	orr.8b	v0, v0, v1
	mov.s	w13, v0[1]
	fmov	w14, s0
	orr	w21, w14, w13
LBB0_21:
	add	x9, x9, x12, lsl #3
LBB0_22:                                ; =>This Inner Loop Header: Depth=1
	ldr	w13, [x9], #8
	cmp	w13, w24
	csel	w24, w13, w24, gt
	add	w13, w13, w0
	and	w13, w10, w13, asr #2
	and	w14, w12, #0x3
	mul	w14, w11, w14
	lsl	w13, w13, w14
	orr	w21, w13, w21
	add	x12, x12, #1
	cmp	x8, x12
	b.ne	LBB0_22
	b	LBB0_8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdr	Lloh40, Lloh41
	.cfi_endproc
                                        ; -- End function
	.comm	_SEND_LEN_CHECK1_LEN_VL15_MASK,4,2 ; @SEND_LEN_CHECK1_LEN_VL15_MASK
	.comm	_SEND_LEN_CHECK1_LEN_VL15_SHIFT,4,2 ; @SEND_LEN_CHECK1_LEN_VL15_SHIFT
	.comm	_SEND_LEN_CHECK0_LEN_VL0_MASK,4,2 ; @SEND_LEN_CHECK0_LEN_VL0_MASK
	.comm	_SEND_LEN_CHECK0_LEN_VL1_SHIFT,4,2 ; @SEND_LEN_CHECK0_LEN_VL1_SHIFT
	.comm	_SEND_LEN_CHECK1_LEN_VL4_MASK,4,2 ; @SEND_LEN_CHECK1_LEN_VL4_MASK
	.comm	_SEND_LEN_CHECK1_LEN_VL5_SHIFT,4,2 ; @SEND_LEN_CHECK1_LEN_VL5_SHIFT
	.comm	_SEND_LEN_CHECK0,4,2            ; @SEND_LEN_CHECK0
	.comm	_SEND_LEN_CHECK1,4,2            ; @SEND_LEN_CHECK1
	.comm	_INIT_SC_PER_VL,4,2             ; @INIT_SC_PER_VL
	.comm	_DCC_CFG_PORT_MTU_CAP_10240,4,2 ; @DCC_CFG_PORT_MTU_CAP_10240
	.comm	_DCC_CFG_PORT_CONFIG,4,2        ; @DCC_CFG_PORT_CONFIG
	.comm	_DCC_CFG_PORT_CONFIG_MTU_CAP_SMASK,4,2 ; @DCC_CFG_PORT_CONFIG_MTU_CAP_SMASK
	.comm	_DCC_CFG_PORT_CONFIG_MTU_CAP_MASK,4,2 ; @DCC_CFG_PORT_CONFIG_MTU_CAP_MASK
	.comm	_DCC_CFG_PORT_CONFIG_MTU_CAP_SHIFT,4,2 ; @DCC_CFG_PORT_CONFIG_MTU_CAP_SHIFT
	.no_dead_strip	_set_send_length
.subsections_via_symbols
