	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_sm501_set_clock                ## -- Begin function sm501_set_clock
	.p2align	4, 0x90
_sm501_set_clock:                       ## @sm501_set_clock
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rbx
	movl	%esi, %r15d
	callq	_dev_get_drvdata
	movq	%rax, %r14
	movq	%rax, %r12
	movq	_SM501_POWER_MODE_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	16(%r14), %rdi
	callq	_smc501_readl
	movq	_SM501_CURRENT_GATE@GOTPCREL(%rip), %r13
	movq	(%r13), %rdi
	addq	16(%r14), %rdi
	callq	_smc501_readl
	movq	_SM501_CURRENT_CLOCK@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	16(%r14), %rdi
	callq	_smc501_readl
	xorl	%eax, %eax
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
	leal	-130(%r15), %eax
	cmpl	$2, %eax
	jb	LBB0_17
## %bb.1:
	cmpl	$128, %r15d
	je	LBB0_16
## %bb.2:
	cmpl	$129, %r15d
	jne	LBB0_3
## %bb.4:
	cmpl	$192, (%r12)
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	jl	LBB0_10
## %bb.5:
	addl	%ebx, %ebx
	leaq	-80(%rbp), %rsi
	movl	%ebx, %edi
	movl	$5, %edx
	callq	_sm501_calc_pll
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	movl	-80(%rbp), %ebx
	movl	-76(%rbp), %eax
	andl	$7, %ebx
	cmpl	$5, %eax
	je	LBB0_8
## %bb.6:
	cmpl	$3, %eax
	jne	LBB0_9
## %bb.7:
	orl	$8, %ebx
	jmp	LBB0_9
LBB0_17:
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	leaq	-80(%rbp), %rsi
	movq	%rbx, %rdi
	movl	$3, %edx
	callq	_sm501_select_clock
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	-80(%rbp), %eax
	andl	$7, %eax
	cmpl	$3, -76(%rbp)
	leal	8(%rax), %ecx
	cmovnel	%eax, %ecx
	leal	16(%rcx), %ebx
	cmpl	$288000000, -60(%rbp)           ## imm = 0x112A8800
	cmovel	%ecx, %ebx
	jmp	LBB0_18
LBB0_16:
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	addq	%rbx, %rbx
	leaq	-80(%rbp), %rsi
	movq	%rbx, %rdi
	movl	$3, %edx
	callq	_sm501_select_clock
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	movl	-80(%rbp), %eax
	andl	$7, %eax
	leal	8(%rax), %ecx
	cmpl	$3, -76(%rbp)
	cmovnel	%eax, %ecx
	cmpl	$288000000, -60(%rbp)           ## imm = 0x112A8800
	leal	16(%rcx), %ebx
	cmovel	%ecx, %ebx
	jmp	LBB0_15
LBB0_3:
	xorl	%r12d, %r12d
	jmp	LBB0_23
LBB0_10:
	addq	%rbx, %rbx
	leaq	-80(%rbp), %rsi
	movq	%rbx, %rdi
	movl	$5, %edx
	callq	_sm501_select_clock
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	movl	-80(%rbp), %eax
	movl	-76(%rbp), %ecx
	andl	$7, %eax
	cmpl	$5, %ecx
	je	LBB0_13
## %bb.11:
	cmpl	$3, %ecx
	jne	LBB0_14
## %bb.12:
	orl	$8, %eax
	jmp	LBB0_14
LBB0_8:
	orl	$16, %ebx
LBB0_9:
	sarl	%ecx
	movl	%ecx, -44(%rbp)                 ## 4-byte Spill
	orl	$64, %ebx
	movl	-72(%rbp), %eax
	movl	-68(%rbp), %ecx
	shll	$15, %eax
	shll	$8, %ecx
	orl	%eax, %ecx
	orl	-64(%rbp), %ecx
	orl	$131072, %ecx                   ## imm = 0x20000
	movq	%rcx, -88(%rbp)                 ## 8-byte Spill
	jmp	LBB0_18
LBB0_13:
	orl	$16, %eax
LBB0_14:
	sarl	%edx
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	cmpl	$288000000, -60(%rbp)           ## imm = 0x112A8800
	leal	32(%rax), %ebx
	cmovel	%eax, %ebx
LBB0_15:
	xorl	%eax, %eax
	movq	%rax, -88(%rbp)                 ## 8-byte Spill
LBB0_18:
	addq	$4, %r14
	movq	%r14, %rdi
	callq	_mutex_lock
	movq	_SM501_POWER_MODE_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	16(%r12), %rdi
	callq	_smc501_readl
	movq	%rax, %r15
	movq	(%r13), %rdi
	addq	16(%r12), %rdi
	callq	_smc501_readl
	movq	%rax, %r13
	movq	_SM501_CURRENT_CLOCK@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	16(%r12), %rdi
	callq	_smc501_readl
	movl	$255, %edx
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	shll	%cl, %edx
                                        ## kill: def $cl killed $cl killed $rcx
	shll	%cl, %ebx
	andl	$3, %r15d
	cmpq	$3, %r15
	jne	LBB0_20
## %bb.19:
	movq	%r14, %rdi
	callq	_mutex_unlock
	movq	$-1, %r12
	jmp	LBB0_23
LBB0_20:
	notl	%edx
	movslq	%edx, %rcx
	andq	%rcx, %rax
	movq	%r13, %rdi
	movslq	%ebx, %r13
	orq	%rax, %r13
	leaq	l_switch.table.sm501_set_clock(%rip), %rax
	movq	(%rax,%r15,8), %rax
	leaq	l_switch.table.sm501_set_clock.1(%rip), %rcx
	movq	%r12, %rbx
	movq	(%rcx,%r15,8), %r12
	leaq	l_switch.table.sm501_set_clock.2(%rip), %rcx
	movq	(%rcx,%r15,8), %r15
	movq	(%rax), %rsi
	addq	16(%rbx), %rsi
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_smc501_writel
	movq	(%r12), %rsi
	addq	16(%rbx), %rsi
	movl	%r13d, %edi
	callq	_smc501_writel
	movq	_SM501_POWER_MODE_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	16(%rbx), %rsi
	movl	%r15d, %edi
	callq	_smc501_writel
	movq	-88(%rbp), %rdi                 ## 8-byte Reload
	testl	%edi, %edi
	je	LBB0_22
## %bb.21:
	movq	_SM501_PROGRAMMABLE_PLL_CONTROL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	16(%rbx), %rsi
                                        ## kill: def $edi killed $edi killed $rdi
	callq	_smc501_writel
LBB0_22:
	movslq	-44(%rbp), %r12                 ## 4-byte Folded Reload
	movq	%rbx, %rdi
	callq	_sm501_sync_regs
	movl	8(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	movq	-56(%rbp), %rdx                 ## 8-byte Reload
	movq	%r13, %rcx
	movq	%r15, %r8
	callq	_dev_dbg
	movq	%rbx, %rdi
	movl	$16, %esi
	callq	_sm501_mdelay
	movq	%r14, %rdi
	callq	_mutex_unlock
	movq	%rbx, %rdi
	callq	_sm501_dump_clk
LBB0_23:
	movq	%r12, %rax
	addq	$56, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SM501_POWER_MODE_CONTROL,8,3   ## @SM501_POWER_MODE_CONTROL
	.comm	_SM501_CURRENT_GATE,8,3         ## @SM501_CURRENT_GATE
	.comm	_SM501_CURRENT_CLOCK,8,3        ## @SM501_CURRENT_CLOCK
	.comm	_SM501_POWER_MODE_0_GATE,8,3    ## @SM501_POWER_MODE_0_GATE
	.comm	_SM501_POWER_MODE_0_CLOCK,8,3   ## @SM501_POWER_MODE_0_CLOCK
	.comm	_SM501_POWER_MODE_1_GATE,8,3    ## @SM501_POWER_MODE_1_GATE
	.comm	_SM501_POWER_MODE_1_CLOCK,8,3   ## @SM501_POWER_MODE_1_CLOCK
	.comm	_SM501_PROGRAMMABLE_PLL_CONTROL,8,3 ## @SM501_PROGRAMMABLE_PLL_CONTROL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"gate %08lx, clock %08lx, mode %08lx\n"

	.section	__DATA,__const
	.p2align	3                               ## @switch.table.sm501_set_clock
l_switch.table.sm501_set_clock:
	.quad	_SM501_POWER_MODE_1_GATE
	.quad	_SM501_POWER_MODE_0_GATE
	.quad	_SM501_POWER_MODE_1_GATE

	.p2align	3                               ## @switch.table.sm501_set_clock.1
l_switch.table.sm501_set_clock.1:
	.quad	_SM501_POWER_MODE_1_CLOCK
	.quad	_SM501_POWER_MODE_0_CLOCK
	.quad	_SM501_POWER_MODE_1_CLOCK

	.section	__TEXT,__const
	.p2align	3                               ## @switch.table.sm501_set_clock.2
l_switch.table.sm501_set_clock.2:
	.quad	1                               ## 0x1
	.quad	0                               ## 0x0
	.quad	1                               ## 0x1

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_sm501_set_clock                ; -- Begin function sm501_set_clock
	.p2align	2
_sm501_set_clock:                       ; @sm501_set_clock
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x21, x2
	mov	x20, x1
	bl	_dev_get_drvdata
	mov	x19, x0
	ldr	x8, [x0, #16]
Lloh0:
	adrp	x26, _SM501_POWER_MODE_CONTROL@GOTPAGE
Lloh1:
	ldr	x26, [x26, _SM501_POWER_MODE_CONTROL@GOTPAGEOFF]
	ldr	x9, [x26]
	add	x0, x9, x8
	bl	_smc501_readl
	ldr	x8, [x19, #16]
Lloh2:
	adrp	x24, _SM501_CURRENT_GATE@GOTPAGE
Lloh3:
	ldr	x24, [x24, _SM501_CURRENT_GATE@GOTPAGEOFF]
	ldr	x9, [x24]
	add	x0, x9, x8
	bl	_smc501_readl
	ldr	x8, [x19, #16]
Lloh4:
	adrp	x27, _SM501_CURRENT_CLOCK@GOTPAGE
Lloh5:
	ldr	x27, [x27, _SM501_CURRENT_CLOCK@GOTPAGEOFF]
	ldr	x9, [x27]
	add	x0, x9, x8
	bl	_smc501_readl
	sub	w8, w20, #130
	cmp	w8, #2
	b.lo	LBB0_7
; %bb.1:
	cmp	w20, #128
	b.eq	LBB0_8
; %bb.2:
	cmp	w20, #129
	b.ne	LBB0_16
; %bb.3:
	ldr	w8, [x19]
	cmp	w8, #192
	b.lt	LBB0_18
; %bb.4:
	lsl	w0, w21, #1
	add	x1, sp, #8
	mov	w2, #5
	bl	_sm501_calc_pll
	cmp	w0, #0
	cinc	w8, w0, lt
	asr	w22, w8, #1
	ldp	w8, w9, [sp, #8]
	and	w8, w8, #0x7
	cmp	w9, #5
	b.eq	LBB0_19
; %bb.5:
	cmp	w9, #3
	b.ne	LBB0_20
; %bb.6:
	orr	w8, w8, #0x8
	b	LBB0_20
LBB0_7:
	add	x1, sp, #8
	mov	x0, x21
	mov	w2, #3
	bl	_sm501_select_clock
	mov	x22, x0
	mov	w21, #0
	b	LBB0_9
LBB0_8:
	lsl	x0, x21, #1
	add	x1, sp, #8
	mov	w2, #3
	bl	_sm501_select_clock
	mov	w21, #0
	cmp	w0, #0
	cinc	w8, w0, lt
	asr	w22, w8, #1
LBB0_9:
	ldp	w8, w9, [sp, #8]
	and	w10, w8, #0x7
	mov	w11, #8
	bfxil	w11, w8, #0, #3
	cmp	w9, #3
	csel	w8, w11, w10, eq
	ldr	w9, [sp, #28]
	orr	w10, w8, #0x10
LBB0_10:
	mov	w11, #34816
	movk	w11, #4394, lsl #16
	cmp	w9, w11
	csel	w28, w8, w10, eq
LBB0_11:
	add	x23, x19, #4
	mov	x0, x23
	bl	_mutex_lock
	ldr	x8, [x19, #16]
	ldr	x9, [x26]
	add	x0, x9, x8
	bl	_smc501_readl
	mov	x25, x0
	ldr	x8, [x19, #16]
	ldr	x9, [x24]
	add	x0, x9, x8
	bl	_smc501_readl
	mov	x24, x0
	ldr	x8, [x19, #16]
	ldr	x9, [x27]
	add	x0, x9, x8
	bl	_smc501_readl
	and	x8, x25, #0x3
	cmp	x8, #3
	b.ne	LBB0_13
; %bb.12:
	mov	x0, x23
	bl	_mutex_unlock
	mov	x20, #-1
	b	LBB0_17
LBB0_13:
	mov	w9, #255
	lsl	w9, w9, w20
	mvn	w9, w9
	sxtw	x9, w9
	and	x9, x0, x9
	lsl	w10, w28, w20
	sxtw	x10, w10
	orr	x25, x9, x10
	lsl	x8, x8, #3
Lloh6:
	adrp	x9, l_switch.table.sm501_set_clock@PAGE
Lloh7:
	add	x9, x9, l_switch.table.sm501_set_clock@PAGEOFF
	ldr	x9, [x9, x8]
Lloh8:
	adrp	x10, l_switch.table.sm501_set_clock.1@PAGE
Lloh9:
	add	x10, x10, l_switch.table.sm501_set_clock.1@PAGEOFF
	ldr	x27, [x10, x8]
Lloh10:
	adrp	x10, l_switch.table.sm501_set_clock.2@PAGE
Lloh11:
	add	x10, x10, l_switch.table.sm501_set_clock.2@PAGEOFF
	sxtw	x20, w22
	ldr	x22, [x10, x8]
	ldr	x8, [x19, #16]
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	x0, x24
	bl	_smc501_writel
	ldr	x8, [x19, #16]
	ldr	x9, [x27]
	add	x1, x9, x8
	mov	x0, x25
	bl	_smc501_writel
	ldr	x8, [x19, #16]
	ldr	x9, [x26]
	add	x1, x9, x8
	mov	x0, x22
	bl	_smc501_writel
	cbz	w21, LBB0_15
; %bb.14:
	ldr	x8, [x19, #16]
Lloh12:
	adrp	x9, _SM501_PROGRAMMABLE_PLL_CONTROL@GOTPAGE
Lloh13:
	ldr	x9, [x9, _SM501_PROGRAMMABLE_PLL_CONTROL@GOTPAGEOFF]
Lloh14:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	x0, x21
	bl	_smc501_writel
LBB0_15:
	mov	x0, x19
	bl	_sm501_sync_regs
	ldr	w0, [x19, #8]
Lloh15:
	adrp	x1, l_.str@PAGE
Lloh16:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x24
	mov	x3, x25
	mov	x4, x22
	bl	_dev_dbg
	mov	x0, x19
	mov	w1, #16
	bl	_sm501_mdelay
	mov	x0, x23
	bl	_mutex_unlock
	mov	x0, x19
	bl	_sm501_dump_clk
	b	LBB0_17
LBB0_16:
	mov	x20, #0
LBB0_17:
	mov	x0, x20
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_18:
	lsl	x0, x21, #1
	add	x1, sp, #8
	mov	w2, #5
	bl	_sm501_select_clock
	mov	w21, #0
	cmp	w0, #0
	cinc	w8, w0, lt
	asr	w22, w8, #1
	ldp	w8, w9, [sp, #8]
	and	w8, w8, #0x7
	orr	w10, w8, #0x10
	orr	w11, w8, #0x8
	cmp	w9, #3
	csel	w8, w8, w11, ne
	cmp	w9, #5
	csel	w8, w10, w8, eq
	ldr	w9, [sp, #28]
	orr	w10, w8, #0x20
	b	LBB0_10
LBB0_19:
	orr	w8, w8, #0x10
LBB0_20:
	orr	w28, w8, #0x40
	ldp	w8, w9, [sp, #16]
	lsl	w8, w8, #15
	ldr	w10, [sp, #24]
	orr	w8, w8, w9, lsl #8
	orr	w8, w8, w10
	orr	w21, w8, #0x20000
	b	LBB0_11
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_SM501_POWER_MODE_CONTROL,8,3   ; @SM501_POWER_MODE_CONTROL
	.comm	_SM501_CURRENT_GATE,8,3         ; @SM501_CURRENT_GATE
	.comm	_SM501_CURRENT_CLOCK,8,3        ; @SM501_CURRENT_CLOCK
	.comm	_SM501_POWER_MODE_0_GATE,8,3    ; @SM501_POWER_MODE_0_GATE
	.comm	_SM501_POWER_MODE_0_CLOCK,8,3   ; @SM501_POWER_MODE_0_CLOCK
	.comm	_SM501_POWER_MODE_1_GATE,8,3    ; @SM501_POWER_MODE_1_GATE
	.comm	_SM501_POWER_MODE_1_CLOCK,8,3   ; @SM501_POWER_MODE_1_CLOCK
	.comm	_SM501_PROGRAMMABLE_PLL_CONTROL,8,3 ; @SM501_PROGRAMMABLE_PLL_CONTROL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"gate %08lx, clock %08lx, mode %08lx\n"

	.section	__DATA,__const
	.p2align	3                               ; @switch.table.sm501_set_clock
l_switch.table.sm501_set_clock:
	.quad	_SM501_POWER_MODE_1_GATE
	.quad	_SM501_POWER_MODE_0_GATE
	.quad	_SM501_POWER_MODE_1_GATE

	.p2align	3                               ; @switch.table.sm501_set_clock.1
l_switch.table.sm501_set_clock.1:
	.quad	_SM501_POWER_MODE_1_CLOCK
	.quad	_SM501_POWER_MODE_0_CLOCK
	.quad	_SM501_POWER_MODE_1_CLOCK

	.section	__TEXT,__const
	.p2align	3                               ; @switch.table.sm501_set_clock.2
l_switch.table.sm501_set_clock.2:
	.quad	1                               ; 0x1
	.quad	0                               ; 0x0
	.quad	1                               ; 0x1

.subsections_via_symbols
