	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function af9005_get_pre_vit_err_bit_count
_af9005_get_pre_vit_err_bit_count:      ## @af9005_get_pre_vit_err_bit_count
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %r12
	movq	(%rdi), %r13
	movl	(%r13), %edi
	movq	_xd_r_fec_vtb_ber_rdy@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_fec_vtb_ber_rdy_pos@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_fec_vtb_ber_rdy_len@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	-44(%rbp), %r8
	callq	_af9005_read_register_bits
	movl	%eax, %ebx
	testl	%eax, %eax
	je	LBB0_1
LBB0_21:
	movl	%ebx, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	cmpl	$0, -44(%rbp)
	je	LBB0_2
## %bb.3:
	movl	(%r13), %edi
	movq	_xd_r_fec_vtb_err_bit_cnt_7_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-52(%rbp), %rdx
	callq	_af9005_read_ofdm_register
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_21
## %bb.4:
	movl	(%r13), %edi
	movq	_xd_r_fec_vtb_err_bit_cnt_15_8@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-48(%rbp), %rdx
	callq	_af9005_read_ofdm_register
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_21
## %bb.5:
	movl	(%r13), %edi
	movq	_xd_r_fec_vtb_err_bit_cnt_23_16@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-60(%rbp), %rdx
	callq	_af9005_read_ofdm_register
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_21
## %bb.6:
	movl	-60(%rbp), %eax
	shll	$16, %eax
	movl	-48(%rbp), %ecx
	shll	$8, %ecx
	addl	%eax, %ecx
	addl	-52(%rbp), %ecx
	movl	%ecx, (%r12)
	movl	(%r13), %edi
	movq	_xd_p_fec_super_frm_unit_7_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-52(%rbp), %rdx
	callq	_af9005_read_ofdm_register
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_21
## %bb.7:
	movl	(%r13), %edi
	movq	_xd_p_fec_super_frm_unit_15_8@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-48(%rbp), %rdx
	callq	_af9005_read_ofdm_register
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_21
## %bb.8:
	movl	-48(%rbp), %r15d
	shll	$8, %r15d
	addl	-52(%rbp), %r15d
	je	LBB0_9
## %bb.10:
	movl	(%r13), %edi
	movq	_xd_g_reg_tpsd_txmod@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_reg_tpsd_txmod_pos@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_reg_tpsd_txmod_len@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	-44(%rbp), %r8
	callq	_af9005_read_register_bits
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_21
## %bb.11:
	movl	-44(%rbp), %eax
	testl	%eax, %eax
	je	LBB0_12
## %bb.13:
	cmpl	$1, %eax
	jne	LBB0_18
## %bb.14:
	movl	$6048, -56(%rbp)                ## 4-byte Folded Spill
                                        ## imm = 0x17A0
	jmp	LBB0_15
LBB0_2:
	leaq	L_.str(%rip), %rdi
	xorl	%eax, %eax
	callq	_deb_info
	movl	$101, %ebx
	jmp	LBB0_21
LBB0_9:
	leaq	L_.str.1(%rip), %rdi
	xorl	%eax, %eax
	callq	_deb_info
	movl	$102, %ebx
	jmp	LBB0_21
LBB0_12:
	movl	$1512, -56(%rbp)                ## 4-byte Folded Spill
                                        ## imm = 0x5E8
LBB0_15:
	movl	(%r13), %edi
	movq	_xd_g_reg_tpsd_const@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_reg_tpsd_const_pos@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_reg_tpsd_const_len@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	-44(%rbp), %r8
	callq	_af9005_read_register_bits
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_21
## %bb.16:
	movl	-44(%rbp), %eax
	cmpl	$3, %eax
	jae	LBB0_17
## %bb.20:
	addl	%eax, %eax
	addl	$2, %eax
	movl	-56(%rbp), %ecx                 ## 4-byte Reload
	imull	%r15d, %ecx
	imull	%eax, %ecx
	imull	$272, %ecx, %ecx                ## imm = 0x110
	movl	%ecx, (%r14)
	movl	(%r12), %esi
	leaq	L_.str.4(%rip), %rdi
	xorl	%ebx, %ebx
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	_deb_info
	jmp	LBB0_21
LBB0_18:
	leaq	L_.str.2(%rip), %rdi
	jmp	LBB0_19
LBB0_17:
	leaq	L_.str.3(%rip), %rdi
LBB0_19:
	callq	_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_21
	.cfi_endproc
                                        ## -- End function
	.comm	_xd_r_fec_vtb_ber_rdy,4,2       ## @xd_r_fec_vtb_ber_rdy
	.comm	_fec_vtb_ber_rdy_pos,4,2        ## @fec_vtb_ber_rdy_pos
	.comm	_fec_vtb_ber_rdy_len,4,2        ## @fec_vtb_ber_rdy_len
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"viterbi counter not ready\n"

	.comm	_xd_r_fec_vtb_err_bit_cnt_7_0,4,2 ## @xd_r_fec_vtb_err_bit_cnt_7_0
	.comm	_xd_r_fec_vtb_err_bit_cnt_15_8,4,2 ## @xd_r_fec_vtb_err_bit_cnt_15_8
	.comm	_xd_r_fec_vtb_err_bit_cnt_23_16,4,2 ## @xd_r_fec_vtb_err_bit_cnt_23_16
	.comm	_xd_p_fec_super_frm_unit_7_0,4,2 ## @xd_p_fec_super_frm_unit_7_0
	.comm	_xd_p_fec_super_frm_unit_15_8,4,2 ## @xd_p_fec_super_frm_unit_15_8
L_.str.1:                               ## @.str.1
	.asciz	"super frame count 0\n"

	.comm	_xd_g_reg_tpsd_txmod,4,2        ## @xd_g_reg_tpsd_txmod
	.comm	_reg_tpsd_txmod_pos,4,2         ## @reg_tpsd_txmod_pos
	.comm	_reg_tpsd_txmod_len,4,2         ## @reg_tpsd_txmod_len
L_.str.2:                               ## @.str.2
	.asciz	"Invalid fft mode"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_xd_g_reg_tpsd_const,4,2        ## @xd_g_reg_tpsd_const
	.comm	_reg_tpsd_const_pos,4,2         ## @reg_tpsd_const_pos
	.comm	_reg_tpsd_const_len,4,2         ## @reg_tpsd_const_len
L_.str.3:                               ## @.str.3
	.asciz	"invalid modulation mode"

L_.str.4:                               ## @.str.4
	.asciz	"PRE err count %d frame count %d bit count %d\n"

	.no_dead_strip	_af9005_get_pre_vit_err_bit_count
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function af9005_get_pre_vit_err_bit_count
_af9005_get_pre_vit_err_bit_count:      ; @af9005_get_pre_vit_err_bit_count
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x2
	mov	x19, x1
	ldr	x21, [x0]
	ldr	w0, [x21]
Lloh0:
	adrp	x8, _xd_r_fec_vtb_ber_rdy@GOTPAGE
Lloh1:
	ldr	x8, [x8, _xd_r_fec_vtb_ber_rdy@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _fec_vtb_ber_rdy_pos@GOTPAGE
Lloh4:
	ldr	x8, [x8, _fec_vtb_ber_rdy_pos@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
Lloh6:
	adrp	x8, _fec_vtb_ber_rdy_len@GOTPAGE
Lloh7:
	ldr	x8, [x8, _fec_vtb_ber_rdy_len@GOTPAGEOFF]
Lloh8:
	ldr	w3, [x8]
	add	x4, sp, #44
	bl	_af9005_read_register_bits
	cbz	w0, LBB0_2
LBB0_1:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_2:
	ldr	w8, [sp, #44]
	cbz	w8, LBB0_13
; %bb.3:
	ldr	w0, [x21]
Lloh9:
	adrp	x8, _xd_r_fec_vtb_err_bit_cnt_7_0@GOTPAGE
Lloh10:
	ldr	x8, [x8, _xd_r_fec_vtb_err_bit_cnt_7_0@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	add	x2, sp, #40
	bl	_af9005_read_ofdm_register
	cbnz	w0, LBB0_1
; %bb.4:
	ldr	w0, [x21]
Lloh12:
	adrp	x8, _xd_r_fec_vtb_err_bit_cnt_15_8@GOTPAGE
Lloh13:
	ldr	x8, [x8, _xd_r_fec_vtb_err_bit_cnt_15_8@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	add	x2, sp, #36
	bl	_af9005_read_ofdm_register
	cbnz	w0, LBB0_1
; %bb.5:
	ldr	w0, [x21]
Lloh15:
	adrp	x8, _xd_r_fec_vtb_err_bit_cnt_23_16@GOTPAGE
Lloh16:
	ldr	x8, [x8, _xd_r_fec_vtb_err_bit_cnt_23_16@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	add	x2, sp, #32
	bl	_af9005_read_ofdm_register
	cbnz	w0, LBB0_1
; %bb.6:
	ldp	w8, w9, [sp, #32]
	lsl	w9, w9, #8
	add	w8, w9, w8, lsl #16
	ldr	w9, [sp, #40]
	add	w8, w8, w9
	str	w8, [x19]
	ldr	w0, [x21]
Lloh18:
	adrp	x8, _xd_p_fec_super_frm_unit_7_0@GOTPAGE
Lloh19:
	ldr	x8, [x8, _xd_p_fec_super_frm_unit_7_0@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	add	x2, sp, #40
	bl	_af9005_read_ofdm_register
	cbnz	w0, LBB0_1
; %bb.7:
	ldr	w0, [x21]
Lloh21:
	adrp	x8, _xd_p_fec_super_frm_unit_15_8@GOTPAGE
Lloh22:
	ldr	x8, [x8, _xd_p_fec_super_frm_unit_15_8@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	add	x2, sp, #36
	bl	_af9005_read_ofdm_register
	cbnz	w0, LBB0_1
; %bb.8:
	ldp	w8, w9, [sp, #36]
	adds	w22, w9, w8, lsl #8
	b.eq	LBB0_14
; %bb.9:
	ldr	w0, [x21]
Lloh24:
	adrp	x8, _xd_g_reg_tpsd_txmod@GOTPAGE
Lloh25:
	ldr	x8, [x8, _xd_g_reg_tpsd_txmod@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
Lloh27:
	adrp	x8, _reg_tpsd_txmod_pos@GOTPAGE
Lloh28:
	ldr	x8, [x8, _reg_tpsd_txmod_pos@GOTPAGEOFF]
Lloh29:
	ldr	w2, [x8]
Lloh30:
	adrp	x8, _reg_tpsd_txmod_len@GOTPAGE
Lloh31:
	ldr	x8, [x8, _reg_tpsd_txmod_len@GOTPAGEOFF]
Lloh32:
	ldr	w3, [x8]
	add	x4, sp, #44
	bl	_af9005_read_register_bits
	cbnz	w0, LBB0_1
; %bb.10:
	ldr	w8, [sp, #44]
	cbz	w8, LBB0_15
; %bb.11:
	cmp	w8, #1
	b.ne	LBB0_19
; %bb.12:
	mov	w23, #6048
	b	LBB0_16
LBB0_13:
Lloh33:
	adrp	x0, l_.str@PAGE
Lloh34:
	add	x0, x0, l_.str@PAGEOFF
	bl	_deb_info
	mov	w0, #101
	b	LBB0_1
LBB0_14:
Lloh35:
	adrp	x0, l_.str.1@PAGE
Lloh36:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_deb_info
	mov	w0, #102
	b	LBB0_1
LBB0_15:
	mov	w23, #1512
LBB0_16:
	ldr	w0, [x21]
Lloh37:
	adrp	x8, _xd_g_reg_tpsd_const@GOTPAGE
Lloh38:
	ldr	x8, [x8, _xd_g_reg_tpsd_const@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
Lloh40:
	adrp	x8, _reg_tpsd_const_pos@GOTPAGE
Lloh41:
	ldr	x8, [x8, _reg_tpsd_const_pos@GOTPAGEOFF]
Lloh42:
	ldr	w2, [x8]
Lloh43:
	adrp	x8, _reg_tpsd_const_len@GOTPAGE
Lloh44:
	ldr	x8, [x8, _reg_tpsd_const_len@GOTPAGEOFF]
Lloh45:
	ldr	w3, [x8]
	add	x4, sp, #44
	bl	_af9005_read_register_bits
	cbnz	w0, LBB0_1
; %bb.17:
	ldr	w8, [sp, #44]
	cmp	w8, #3
	b.hs	LBB0_20
; %bb.18:
	lsl	w8, w8, #1
	add	w8, w8, #2
	mul	w9, w22, w23
	mul	w8, w9, w8
	add	w8, w8, w8, lsl #4
	lsl	w8, w8, #4
	str	w8, [x20]
	ldr	w9, [x19]
	stp	x22, x8, [sp, #8]
	str	x9, [sp]
Lloh46:
	adrp	x0, l_.str.4@PAGE
Lloh47:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_deb_info
	mov	w0, #0
	b	LBB0_1
LBB0_19:
Lloh48:
	adrp	x0, l_.str.2@PAGE
Lloh49:
	add	x0, x0, l_.str.2@PAGEOFF
	b	LBB0_21
LBB0_20:
Lloh50:
	adrp	x0, l_.str.3@PAGE
Lloh51:
	add	x0, x0, l_.str.3@PAGEOFF
LBB0_21:
	bl	_err
Lloh52:
	adrp	x8, _EINVAL@GOTPAGE
Lloh53:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh54:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_1
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpAdd	Lloh33, Lloh34
	.loh AdrpAdd	Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpAdd	Lloh48, Lloh49
	.loh AdrpAdd	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.cfi_endproc
                                        ; -- End function
	.comm	_xd_r_fec_vtb_ber_rdy,4,2       ; @xd_r_fec_vtb_ber_rdy
	.comm	_fec_vtb_ber_rdy_pos,4,2        ; @fec_vtb_ber_rdy_pos
	.comm	_fec_vtb_ber_rdy_len,4,2        ; @fec_vtb_ber_rdy_len
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"viterbi counter not ready\n"

	.comm	_xd_r_fec_vtb_err_bit_cnt_7_0,4,2 ; @xd_r_fec_vtb_err_bit_cnt_7_0
	.comm	_xd_r_fec_vtb_err_bit_cnt_15_8,4,2 ; @xd_r_fec_vtb_err_bit_cnt_15_8
	.comm	_xd_r_fec_vtb_err_bit_cnt_23_16,4,2 ; @xd_r_fec_vtb_err_bit_cnt_23_16
	.comm	_xd_p_fec_super_frm_unit_7_0,4,2 ; @xd_p_fec_super_frm_unit_7_0
	.comm	_xd_p_fec_super_frm_unit_15_8,4,2 ; @xd_p_fec_super_frm_unit_15_8
l_.str.1:                               ; @.str.1
	.asciz	"super frame count 0\n"

	.comm	_xd_g_reg_tpsd_txmod,4,2        ; @xd_g_reg_tpsd_txmod
	.comm	_reg_tpsd_txmod_pos,4,2         ; @reg_tpsd_txmod_pos
	.comm	_reg_tpsd_txmod_len,4,2         ; @reg_tpsd_txmod_len
l_.str.2:                               ; @.str.2
	.asciz	"Invalid fft mode"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_xd_g_reg_tpsd_const,4,2        ; @xd_g_reg_tpsd_const
	.comm	_reg_tpsd_const_pos,4,2         ; @reg_tpsd_const_pos
	.comm	_reg_tpsd_const_len,4,2         ; @reg_tpsd_const_len
l_.str.3:                               ; @.str.3
	.asciz	"invalid modulation mode"

l_.str.4:                               ; @.str.4
	.asciz	"PRE err count %d frame count %d bit count %d\n"

	.no_dead_strip	_af9005_get_pre_vit_err_bit_count
.subsections_via_symbols
