	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function xsdfec_irq_thread
_xsdfec_irq_thread:                     ## @xsdfec_irq_thread
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	_IRQ_HANDLED@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	xorl	%eax, %eax
	cmpl	%edi, (%rsi)
	setne	%al
	movl	%eax, %edi
	callq	_WARN_ON
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_xsdfec_isr_enable
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_xsdfec_ecc_isr_enable
	movq	_XSDFEC_ECC_ISR_ADDR@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%rbx, %rdi
	callq	_xsdfec_regread
	movl	%eax, %r12d
	movq	_XSDFEC_ISR_ADDR@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_xsdfec_regread
	movl	%eax, %r13d
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	(%r14), %esi
	movq	%rbx, %rdi
	movl	%r12d, %edx
	callq	_xsdfec_regwrite
	movl	(%r15), %esi
	movq	%rbx, %rdi
	movl	%r13d, %edx
	callq	_xsdfec_regwrite
	movq	_XSDFEC_ALL_ECC_ISR_MBE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	andl	%r12d, %r15d
	movl	%r15d, %edi
	callq	_hweight32
	movl	%eax, %r14d
	movl	%r12d, -48(%rbp)                ## 4-byte Spill
	movl	%r12d, %edi
	callq	_hweight32
	movl	%eax, %r12d
	movl	%r12d, %r13d
	subl	%r14d, %r13d
	subl	%r14d, %r13d
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	callq	_hweight32
	movl	24(%rbx), %edi
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	%eax, (%rsp)
	leaq	L_.str(%rip), %rsi
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movl	%r12d, %r8d
	movl	%r13d, %r9d
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	24(%rbx), %edi
	movl	48(%rbx), %ecx
	movl	4(%rbx), %edx
	movl	8(%rbx), %r8d
	leaq	L_.str.1(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_dbg
	leaq	32(%rbx), %r15
	movl	28(%rbx), %esi
	movq	%r15, %rdi
	callq	_spin_lock_irqsave
	testl	%r14d, %r14d
	je	LBB0_2
## %bb.1:
	addl	%r14d, 4(%rbx)
LBB0_2:
	testl	%r13d, %r13d
	je	LBB0_4
## %bb.3:
	addl	%r13d, 48(%rbx)
LBB0_4:
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	testl	%esi, %esi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	je	LBB0_6
## %bb.5:
	addl	%esi, 8(%rbx)
LBB0_6:
	movabsq	$4294967297, %rax               ## imm = 0x100000001
	testl	%r14d, %r14d
	movl	-52(%rbp), %r14d                ## 4-byte Reload
	je	LBB0_13
## %bb.7:
	movq	_XSDFEC_ECC_ISR_MBE_MASK@GOTPCREL(%rip), %rcx
	testl	%edx, (%rcx)
	je	LBB0_9
## %bb.8:
	movq	_XSDFEC_NEEDS_RESET@GOTPCREL(%rip), %rcx
	jmp	LBB0_11
LBB0_9:
	movq	_XSDFEC_PL_INIT_ECC_ISR_MBE_MASK@GOTPCREL(%rip), %rcx
	testl	%edx, (%rcx)
	je	LBB0_12
## %bb.10:
	movq	_XSDFEC_PL_RECONFIGURE@GOTPCREL(%rip), %rcx
LBB0_11:
	movq	(%rcx), %rcx
	movq	%rcx, 40(%rbx)
LBB0_12:
	movq	%rax, 12(%rbx)
LBB0_13:
	testl	%r13d, %r13d
	je	LBB0_15
## %bb.14:
	movl	$1, 12(%rbx)
LBB0_15:
	testl	%esi, %esi
	je	LBB0_17
## %bb.16:
	movq	_XSDFEC_NEEDS_RESET@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, 40(%rbx)
	movq	%rax, 12(%rbx)
LBB0_17:
	movl	28(%rbx), %esi
	movq	%r15, %rdi
	callq	_spin_unlock_irqrestore
	movl	24(%rbx), %edi
	movl	12(%rbx), %ecx
	movl	16(%rbx), %edx
	leaq	L_.str.2(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_dbg
	cmpl	$0, 16(%rbx)
	jne	LBB0_19
## %bb.18:
	cmpl	$0, 12(%rbx)
	je	LBB0_20
LBB0_19:
	leaq	20(%rbx), %rdi
	callq	_wake_up_interruptible
LBB0_21:
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_xsdfec_isr_enable
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_xsdfec_ecc_isr_enable
	movl	%r14d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_20:
	movq	_IRQ_NONE@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	jmp	LBB0_21
	.cfi_endproc
                                        ## -- End function
	.comm	_IRQ_HANDLED,4,2                ## @IRQ_HANDLED
	.comm	_XSDFEC_ECC_ISR_ADDR,4,2        ## @XSDFEC_ECC_ISR_ADDR
	.comm	_XSDFEC_ISR_ADDR,4,2            ## @XSDFEC_ISR_ADDR
	.comm	_XSDFEC_ALL_ECC_ISR_MBE_MASK,4,2 ## @XSDFEC_ALL_ECC_ISR_MBE_MASK
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"tmp=%x, uecc=%x, aecc=%x, cecc=%x, isr=%x"

L_.str.1:                               ## @.str.1
	.asciz	"uecc=%x, cecc=%x, isr=%x"

	.comm	_XSDFEC_ECC_ISR_MBE_MASK,4,2    ## @XSDFEC_ECC_ISR_MBE_MASK
	.comm	_XSDFEC_NEEDS_RESET,8,3         ## @XSDFEC_NEEDS_RESET
	.comm	_XSDFEC_PL_INIT_ECC_ISR_MBE_MASK,4,2 ## @XSDFEC_PL_INIT_ECC_ISR_MBE_MASK
	.comm	_XSDFEC_PL_RECONFIGURE,8,3      ## @XSDFEC_PL_RECONFIGURE
L_.str.2:                               ## @.str.2
	.asciz	"state=%x, stats=%x"

	.comm	_IRQ_NONE,4,2                   ## @IRQ_NONE
	.no_dead_strip	_xsdfec_irq_thread
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function xsdfec_irq_thread
_xsdfec_irq_thread:                     ; @xsdfec_irq_thread
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x1
Lloh0:
	adrp	x8, _IRQ_HANDLED@GOTPAGE
Lloh1:
	ldr	x8, [x8, _IRQ_HANDLED@GOTPAGEOFF]
Lloh2:
	ldr	w20, [x8]
	ldr	w8, [x1]
	cmp	w8, w0
	cset	w0, ne
	bl	_WARN_ON
	mov	x0, x19
	mov	w1, #0
	bl	_xsdfec_isr_enable
	mov	x0, x19
	mov	w1, #0
	bl	_xsdfec_ecc_isr_enable
Lloh3:
	adrp	x23, _XSDFEC_ECC_ISR_ADDR@GOTPAGE
Lloh4:
	ldr	x23, [x23, _XSDFEC_ECC_ISR_ADDR@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x19
	bl	_xsdfec_regread
	mov	x21, x0
Lloh5:
	adrp	x24, _XSDFEC_ISR_ADDR@GOTPAGE
Lloh6:
	ldr	x24, [x24, _XSDFEC_ISR_ADDR@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x19
	bl	_xsdfec_regread
	mov	x22, x0
	ldr	w1, [x23]
	mov	x0, x19
	mov	x2, x21
	bl	_xsdfec_regwrite
	ldr	w1, [x24]
	mov	x0, x19
	mov	x2, x22
	bl	_xsdfec_regwrite
Lloh7:
	adrp	x8, _XSDFEC_ALL_ECC_ISR_MBE_MASK@GOTPAGE
Lloh8:
	ldr	x8, [x8, _XSDFEC_ALL_ECC_ISR_MBE_MASK@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	and	w23, w8, w21
	mov	x0, x23
	bl	_hweight32
	mov	x24, x0
	mov	x0, x21
	bl	_hweight32
	mov	x25, x0
	sub	w26, w0, w24, lsl #1
	mov	x0, x22
	bl	_hweight32
	mov	x22, x0
	ldr	w0, [x19, #24]
	stp	x26, x22, [sp, #8]
	str	x25, [sp]
Lloh10:
	adrp	x1, l_.str@PAGE
Lloh11:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x23
	mov	x3, x24
	bl	_dev_dbg
	ldr	w0, [x19, #24]
	ldr	w3, [x19, #48]
	ldp	w2, w8, [x19, #4]
	str	x8, [sp]
Lloh12:
	adrp	x1, l_.str.1@PAGE
Lloh13:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_dbg
	add	x23, x19, #32
	ldr	w1, [x19, #28]
	mov	x0, x23
	bl	_spin_lock_irqsave
	cbz	w24, LBB0_2
; %bb.1:
	ldr	w8, [x19, #4]
	add	w8, w8, w24
	str	w8, [x19, #4]
LBB0_2:
	cbz	w26, LBB0_4
; %bb.3:
	ldr	w8, [x19, #48]
	add	w8, w8, w26
	str	w8, [x19, #48]
LBB0_4:
	cbz	w22, LBB0_6
; %bb.5:
	ldr	w8, [x19, #8]
	add	w8, w8, w22
	str	w8, [x19, #8]
LBB0_6:
	cbz	w24, LBB0_13
; %bb.7:
Lloh14:
	adrp	x8, _XSDFEC_ECC_ISR_MBE_MASK@GOTPAGE
Lloh15:
	ldr	x8, [x8, _XSDFEC_ECC_ISR_MBE_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_9
; %bb.8:
Lloh17:
	adrp	x8, _XSDFEC_NEEDS_RESET@GOTPAGE
Lloh18:
	ldr	x8, [x8, _XSDFEC_NEEDS_RESET@GOTPAGEOFF]
	b	LBB0_11
LBB0_9:
Lloh19:
	adrp	x8, _XSDFEC_PL_INIT_ECC_ISR_MBE_MASK@GOTPAGE
Lloh20:
	ldr	x8, [x8, _XSDFEC_PL_INIT_ECC_ISR_MBE_MASK@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_12
; %bb.10:
Lloh22:
	adrp	x8, _XSDFEC_PL_RECONFIGURE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _XSDFEC_PL_RECONFIGURE@GOTPAGEOFF]
LBB0_11:
	ldr	x8, [x8]
	str	x8, [x19, #40]
LBB0_12:
	movi.2s	v0, #1
	stur	d0, [x19, #12]
LBB0_13:
	cbz	w26, LBB0_15
; %bb.14:
	mov	w8, #1
	str	w8, [x19, #12]
LBB0_15:
	cbz	w22, LBB0_17
; %bb.16:
Lloh24:
	adrp	x8, _XSDFEC_NEEDS_RESET@GOTPAGE
Lloh25:
	ldr	x8, [x8, _XSDFEC_NEEDS_RESET@GOTPAGEOFF]
Lloh26:
	ldr	x8, [x8]
	str	x8, [x19, #40]
	movi.2s	v0, #1
	stur	d0, [x19, #12]
LBB0_17:
	ldr	w1, [x19, #28]
	mov	x0, x23
	bl	_spin_unlock_irqrestore
	ldr	w0, [x19, #24]
	ldp	w3, w2, [x19, #12]
Lloh27:
	adrp	x1, l_.str.2@PAGE
Lloh28:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_dev_dbg
	ldr	w8, [x19, #16]
	cbnz	w8, LBB0_19
; %bb.18:
	ldr	w8, [x19, #12]
	cbz	w8, LBB0_21
LBB0_19:
	add	x0, x19, #20
	bl	_wake_up_interruptible
LBB0_20:
	mov	x0, x19
	mov	w1, #1
	bl	_xsdfec_isr_enable
	mov	x0, x19
	mov	w1, #1
	bl	_xsdfec_ecc_isr_enable
	mov	x0, x20
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_21:
Lloh29:
	adrp	x8, _IRQ_NONE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _IRQ_NONE@GOTPAGEOFF]
Lloh31:
	ldr	w20, [x8]
	b	LBB0_20
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpAdd	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.comm	_IRQ_HANDLED,4,2                ; @IRQ_HANDLED
	.comm	_XSDFEC_ECC_ISR_ADDR,4,2        ; @XSDFEC_ECC_ISR_ADDR
	.comm	_XSDFEC_ISR_ADDR,4,2            ; @XSDFEC_ISR_ADDR
	.comm	_XSDFEC_ALL_ECC_ISR_MBE_MASK,4,2 ; @XSDFEC_ALL_ECC_ISR_MBE_MASK
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"tmp=%x, uecc=%x, aecc=%x, cecc=%x, isr=%x"

l_.str.1:                               ; @.str.1
	.asciz	"uecc=%x, cecc=%x, isr=%x"

	.comm	_XSDFEC_ECC_ISR_MBE_MASK,4,2    ; @XSDFEC_ECC_ISR_MBE_MASK
	.comm	_XSDFEC_NEEDS_RESET,8,3         ; @XSDFEC_NEEDS_RESET
	.comm	_XSDFEC_PL_INIT_ECC_ISR_MBE_MASK,4,2 ; @XSDFEC_PL_INIT_ECC_ISR_MBE_MASK
	.comm	_XSDFEC_PL_RECONFIGURE,8,3      ; @XSDFEC_PL_RECONFIGURE
l_.str.2:                               ; @.str.2
	.asciz	"state=%x, stats=%x"

	.comm	_IRQ_NONE,4,2                   ; @IRQ_NONE
	.no_dead_strip	_xsdfec_irq_thread
.subsections_via_symbols
