	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_speeds                    ## -- Begin function pcie_speeds
	.p2align	4, 0x90
_pcie_speeds:                           ## @pcie_speeds
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	8(%rdi), %rdi
	movq	(%rdi), %rax
	movq	8(%rax), %r15
	callq	_pci_is_pcie
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movl	$1, (%r14)
	movq	8(%r14), %rdi
	movq	_PCI_EXP_LNKCAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-28(%rbp), %rdx
	callq	_pcie_capability_read_dword
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	callq	_dd_dev_err
	jmp	LBB0_10
LBB0_1:
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	callq	_dd_dev_err
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
	jmp	LBB0_10
LBB0_4:
	movq	_PCI_EXP_LNKCAP_SLS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	andl	-28(%rbp), %edx
	movq	_PCI_EXP_LNKCAP_SLS_8_0GB@GOTPCREL(%rip), %rax
	cmpl	(%rax), %edx
	je	LBB0_6
## %bb.5:
	leaq	L_.str.2(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dd_dev_info
	movl	$0, (%r14)
LBB0_6:
	testq	%r15, %r15
	je	LBB0_9
## %bb.7:
	movq	8(%r14), %rax
	movq	(%rax), %rax
	movq	(%rax), %rax
	movq	_PCIE_SPEED_8_0GT@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_9
## %bb.8:
	leaq	L_.str.3(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dd_dev_info
	movl	$0, (%r14)
LBB0_9:
	movq	%r14, %rdi
	callq	_update_lbus_info
	movl	4(%r14), %edx
	leaq	L_.str.4(%rip), %rsi
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	_dd_dev_info
LBB0_10:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Can't find PCI Express capability!\n"

	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_PCI_EXP_LNKCAP,4,2             ## @PCI_EXP_LNKCAP
L_.str.1:                               ## @.str.1
	.asciz	"Unable to read from PCI config\n"

	.comm	_PCI_EXP_LNKCAP_SLS,4,2         ## @PCI_EXP_LNKCAP_SLS
	.comm	_PCI_EXP_LNKCAP_SLS_8_0GB,4,2   ## @PCI_EXP_LNKCAP_SLS_8_0GB
L_.str.2:                               ## @.str.2
	.asciz	"This HFI is not Gen3 capable, max speed 0x%x, need 0x3\n"

	.comm	_PCIE_SPEED_8_0GT,8,3           ## @PCIE_SPEED_8_0GT
L_.str.3:                               ## @.str.3
	.asciz	"Parent PCIe bridge does not support Gen3\n"

L_.str.4:                               ## @.str.4
	.asciz	"%s\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_pcie_speeds                    ; -- Begin function pcie_speeds
	.p2align	2
_pcie_speeds:                           ; @pcie_speeds
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x0, [x0, #8]
	ldr	x8, [x0]
	ldr	x21, [x8, #8]
	bl	_pci_is_pcie
	cbz	w0, LBB0_3
; %bb.1:
	mov	w8, #1
	str	w8, [x19]
	ldr	x0, [x19, #8]
Lloh0:
	adrp	x8, _PCI_EXP_LNKCAP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_EXP_LNKCAP@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #12
	bl	_pcie_capability_read_dword
	cbz	w0, LBB0_4
; %bb.2:
	mov	x20, x0
Lloh3:
	adrp	x1, l_.str.1@PAGE
Lloh4:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_dd_dev_err
	b	LBB0_10
LBB0_3:
Lloh5:
	adrp	x1, l_.str@PAGE
Lloh6:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_dd_dev_err
Lloh7:
	adrp	x8, _EINVAL@GOTPAGE
Lloh8:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_10
LBB0_4:
	ldr	w8, [sp, #12]
Lloh10:
	adrp	x9, _PCI_EXP_LNKCAP_SLS@GOTPAGE
Lloh11:
	ldr	x9, [x9, _PCI_EXP_LNKCAP_SLS@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	and	w8, w9, w8
Lloh13:
	adrp	x9, _PCI_EXP_LNKCAP_SLS_8_0GB@GOTPAGE
Lloh14:
	ldr	x9, [x9, _PCI_EXP_LNKCAP_SLS_8_0GB@GOTPAGEOFF]
Lloh15:
	ldr	w9, [x9]
	cmp	w8, w9
	b.eq	LBB0_6
; %bb.5:
	str	x8, [sp]
Lloh16:
	adrp	x1, l_.str.2@PAGE
Lloh17:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_dd_dev_info
	str	wzr, [x19]
LBB0_6:
	cbz	x21, LBB0_9
; %bb.7:
	ldr	x8, [x19, #8]
	ldr	x8, [x8]
	ldr	x8, [x8]
Lloh18:
	adrp	x9, _PCIE_SPEED_8_0GT@GOTPAGE
Lloh19:
	ldr	x9, [x9, _PCIE_SPEED_8_0GT@GOTPAGEOFF]
Lloh20:
	ldr	x9, [x9]
	cmp	x8, x9
	b.eq	LBB0_9
; %bb.8:
Lloh21:
	adrp	x1, l_.str.3@PAGE
Lloh22:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
	bl	_dd_dev_info
	str	wzr, [x19]
LBB0_9:
	mov	x0, x19
	bl	_update_lbus_info
	ldr	w8, [x19, #4]
	str	x8, [sp]
Lloh23:
	adrp	x1, l_.str.4@PAGE
Lloh24:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_dd_dev_info
	mov	w20, #0
LBB0_10:
	mov	x0, x20
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpAdd	Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Can't find PCI Express capability!\n"

	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_PCI_EXP_LNKCAP,4,2             ; @PCI_EXP_LNKCAP
l_.str.1:                               ; @.str.1
	.asciz	"Unable to read from PCI config\n"

	.comm	_PCI_EXP_LNKCAP_SLS,4,2         ; @PCI_EXP_LNKCAP_SLS
	.comm	_PCI_EXP_LNKCAP_SLS_8_0GB,4,2   ; @PCI_EXP_LNKCAP_SLS_8_0GB
l_.str.2:                               ; @.str.2
	.asciz	"This HFI is not Gen3 capable, max speed 0x%x, need 0x3\n"

	.comm	_PCIE_SPEED_8_0GT,8,3           ; @PCIE_SPEED_8_0GT
l_.str.3:                               ; @.str.3
	.asciz	"Parent PCIe bridge does not support Gen3\n"

l_.str.4:                               ; @.str.4
	.asciz	"%s\n"

.subsections_via_symbols
