	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2_init_chip
_bnx2_init_chip:                        ## @bnx2_init_chip
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	_BNX2_PCICFG_INT_ACK_CMD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BNX2_PCICFG_INT_ACK_CMD_MASK_INT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_BNX2_WR
	movq	_BNX2_DMA_CONFIG_DATA_BYTE_SWAP@GOTPCREL(%rip), %rax
	movq	_BNX2_DMA_CONFIG_DATA_WORD_SWAP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_BNX2_DMA_CONFIG_CNTL_WORD_SWAP@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_DMA_READ_CHANS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	shll	$12, %edx
	movq	_DMA_WRITE_CHANS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	shll	$16, %eax
	orl	%edx, %eax
	orl	%ecx, %eax
	movl	%eax, %ebx
	orl	$2099200, %ebx                  ## imm = 0x200800
	movq	_BNX2_FLAG_PCIX@GOTPCREL(%rip), %r15
	movl	(%r15), %ecx
	testl	%ecx, (%r14)
	je	LBB0_2
## %bb.1:
	orl	$10487808, %eax                 ## imm = 0xA00800
	cmpl	$133, 4(%r14)
	cmovel	%eax, %ebx
LBB0_2:
	movq	%r14, %rdi
	callq	_BNX2_CHIP
	movq	_BNX2_CHIP_5706@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_6
## %bb.3:
	movq	%r14, %rdi
	callq	_BNX2_CHIP_ID
	movq	_BNX2_CHIP_ID_5706_A0@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	je	LBB0_6
## %bb.4:
	movl	(%r15), %eax
	testl	%eax, (%r14)
	jne	LBB0_6
## %bb.5:
	movq	_BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
LBB0_6:
	movq	_BNX2_DMA_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_BNX2_WR
	movq	%r14, %rdi
	callq	_BNX2_CHIP_ID
	movq	_BNX2_CHIP_ID_5706_A0@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_8
## %bb.7:
	movq	_BNX2_TDMA_CONFIG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_BNX2_RD
	movq	_BNX2_TDMA_CONFIG_ONE_DMA@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %esi
	movq	%r14, %rdi
	movl	%eax, %edx
	callq	_BNX2_WR
LBB0_8:
	movl	(%r15), %eax
	testl	%eax, (%r14)
	je	LBB0_10
## %bb.9:
	movl	144(%r14), %edi
	movq	_PCI_X_CMD@GOTPCREL(%rip), %rbx
	movq	(%rbx), %rsi
	addq	136(%r14), %rsi
	leaq	-44(%rbp), %rdx
	callq	_pci_read_config_word
	movl	144(%r14), %edi
	movq	(%rbx), %rsi
	addq	136(%r14), %rsi
	movq	_PCI_X_CMD_ERO@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	notl	%edx
	andl	-44(%rbp), %edx
	callq	_pci_write_config_word
LBB0_10:
	movq	_BNX2_MISC_ENABLE_SET_BITS@GOTPCREL(%rip), %rsi
	movq	_BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE@GOTPCREL(%rip), %rax
	movq	_BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movl	(%rsi), %esi
	movq	_BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	%r14, %rdi
	callq	_BNX2_CHIP
	movq	_BNX2_CHIP_5709@GOTPCREL(%rip), %r12
	cmpq	(%r12), %rax
	jne	LBB0_12
## %bb.11:
	movq	%r14, %rdi
	callq	_bnx2_init_5709_context
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
	jmp	LBB0_13
LBB0_12:
	movq	%r14, %rdi
	callq	_bnx2_init_context
LBB0_13:
	movq	%r14, %rdi
	callq	_bnx2_init_cpus
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_40
## %bb.14:
	movq	%r14, %rdi
	callq	_bnx2_init_nvram
	movq	96(%r14), %rax
	movl	4(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_bnx2_set_mac_addr
	movq	_BNX2_MQ_CONFIG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_BNX2_RD
	movq	_BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movq	_BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	%r14, %rdi
	callq	_BNX2_CHIP
	cmpq	(%r12), %rax
	jne	LBB0_17
## %bb.15:
	movq	_BNX2_MQ_CONFIG_BIN_MQ_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	%r14, %rdi
	callq	_BNX2_CHIP_REV
	movq	_BNX2_CHIP_REV_Ax@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_17
## %bb.16:
	movq	_BNX2_MQ_CONFIG_HALT_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
LBB0_17:
	movl	(%r15), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_BNX2_WR
	movq	_MAX_CID_CNT@GOTPCREL(%rip), %rax
	movq	_MB_KERNEL_CTX_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	imull	(%rax), %ebx
	addl	$65536, %ebx                    ## imm = 0x10000
	movq	_BNX2_MQ_KNL_BYP_WIND_START@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_BNX2_WR
	movq	_BNX2_MQ_KNL_WIND_END@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_BNX2_WR
	movq	_BNX2_PAGE_BITS@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	shll	$24, %edx
	addl	$-134217728, %edx               ## imm = 0xF8000000
	movq	_BNX2_RV2P_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_TBDR_CONFIG@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_BNX2_RD
	movq	_BNX2_TBDR_CONFIG_PAGE_SIZE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	andl	%eax, %ecx
	movl	(%r15), %edx
	shll	$24, %edx
	addl	$-134217664, %edx               ## imm = 0xF8000040
	orl	%ecx, %edx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	8(%r14), %rax
	movl	12(%rax), %ecx
	movq	4(%rax), %xmm0                  ## xmm0 = mem[0],zero
	movq	16(%rax), %xmm1                 ## xmm1 = mem[0],zero
	paddd	%xmm0, %xmm1
	movdqa	%xmm1, %xmm0
	pslld	$16, %xmm0
	addl	(%rax), %ecx
	pslld	$8, %xmm1
	movd	%xmm1, %eax
	pextrd	$1, %xmm0, %edx
	addl	%ecx, %eax
	addl	%eax, %edx
	movq	_BNX2_EMAC_BACKOFF_SEED@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	96(%r14), %rax
	movl	(%rax), %r15d
	movq	_ETH_HLEN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leal	(%rcx,%r15), %eax
	movq	_ETH_FCS_LEN@GOTPCREL(%rip), %rdx
	addl	(%rdx), %eax
	movq	_MAX_ETHERNET_PACKET_SIZE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	addl	%edx, %ecx
	addl	$4, %ecx
	movl	$0, %edx
	cmpl	%ecx, %eax
	jle	LBB0_19
## %bb.18:
	movq	_BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
LBB0_19:
	orl	%eax, %edx
	movq	_BNX2_EMAC_RX_MTU_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_ETH_DATA_LEN@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	cmpl	%ebx, %r15d
	cmovgl	%r15d, %ebx
	movq	_BNX2_RBUF_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	%ebx, %edi
	callq	_BNX2_RBUF_CONFIG_VAL
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_bnx2_reg_wr_ind
	movq	_BNX2_RBUF_CONFIG2@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	%ebx, %edi
	callq	_BNX2_RBUF_CONFIG2_VAL
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_bnx2_reg_wr_ind
	movq	_BNX2_RBUF_CONFIG3@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	%ebx, %edi
	callq	_BNX2_RBUF_CONFIG3_VAL
	movq	%r14, %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	callq	_bnx2_reg_wr_ind
	movq	120(%r14), %rax
	movl	8(%rax), %edi
	movl	128(%r14), %edx
	xorl	%esi, %esi
	callq	_memset
	movq	_BNX2_MAX_MSIX_VEC@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	testl	%edx, %edx
	jle	LBB0_27
## %bb.20:
	movq	120(%r14), %rax
	leaq	-1(%rdx), %rsi
	movl	%edx, %ecx
	andl	$3, %ecx
	cmpq	$3, %rsi
	jae	LBB0_22
## %bb.21:
	xorl	%esi, %esi
	jmp	LBB0_24
LBB0_22:
	andl	$-4, %edx
	leaq	48(%rax), %rdi
	xorl	%esi, %esi
	.p2align	4, 0x90
LBB0_23:                                ## =>This Inner Loop Header: Depth=1
	movq	$0, -48(%rdi)
	movq	$0, -32(%rdi)
	movq	$0, -16(%rdi)
	movq	$0, (%rdi)
	addq	$4, %rsi
	addq	$64, %rdi
	cmpq	%rsi, %rdx
	jne	LBB0_23
LBB0_24:
	testq	%rcx, %rcx
	je	LBB0_27
## %bb.25:
	shlq	$4, %rsi
	addq	%rsi, %rax
	shlq	$4, %rcx
	xorl	%edx, %edx
	.p2align	4, 0x90
LBB0_26:                                ## =>This Inner Loop Header: Depth=1
	movq	$0, (%rax,%rdx)
	addq	$16, %rdx
	cmpq	%rdx, %rcx
	jne	LBB0_26
LBB0_27:
	movl	$65535, 16(%r14)                ## imm = 0xFFFF
	movq	_BNX2_EMAC_ATTENTION_ENA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BNX2_EMAC_ATTENTION_ENA_LINK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_STATUS_ADDR_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	112(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_STATUS_ADDR_H@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_STATISTICS_ADDR_L@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	104(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_STATISTICS_ADDR_H@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_TX_QUICK_CONS_TRIP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	20(%r14), %edx
	shll	$16, %edx
	orl	24(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_RX_QUICK_CONS_TRIP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	28(%r14), %edx
	shll	$16, %edx
	orl	32(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_COMP_PROD_TRIP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	36(%r14), %edx
	shll	$16, %edx
	orl	40(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_TX_TICKS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	44(%r14), %edx
	shll	$16, %edx
	orl	48(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_RX_TICKS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	52(%r14), %edx
	shll	$16, %edx
	orl	56(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_COM_TICKS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	60(%r14), %edx
	shll	$16, %edx
	orl	64(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_CMD_TICKS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	68(%r14), %edx
	shll	$16, %edx
	orl	72(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_FLAG_BROKEN_STATS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	xorl	%edx, %edx
	movq	_BNX2_HC_STATS_TICKS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	testl	%eax, (%r14)
	jne	LBB0_29
## %bb.28:
	movl	76(%r14), %edx
LBB0_29:
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_STAT_COLLECT_TICKS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	$3000, %edx                     ## imm = 0xBB8
	callq	_BNX2_WR
	movq	%r14, %rdi
	callq	_BNX2_CHIP_ID
	movq	_BNX2_CHIP_ID_5706_A1@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_31
## %bb.30:
	movq	_BNX2_HC_CONFIG_COLLECT_STATS@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	jmp	LBB0_32
LBB0_31:
	movq	_BNX2_HC_CONFIG_RX_TMR_MODE@GOTPCREL(%rip), %rax
	movq	_BNX2_HC_CONFIG_TX_TMR_MODE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	orl	(%rax), %ebx
	movq	_BNX2_HC_CONFIG_COLLECT_STATS@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
LBB0_32:
	movl	(%r14), %eax
	movq	_BNX2_FLAG_USING_MSIX@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_34
## %bb.33:
	movq	_BNX2_HC_MSIX_BIT_VECTOR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_BNX2_HC_MSIX_BIT_VECTOR_VAL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_CONFIG_SB_ADDR_INC_128B@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movl	(%r14), %eax
LBB0_34:
	movq	_BNX2_FLAG_ONE_SHOT_MSI@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_BNX2_HC_CONFIG_ONE_SHOT@GOTPCREL(%rip), %rcx
	movq	_BNX2_HC_CONFIG_USE_INT_PARAM@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	testl	%eax, %eax
	cmovel	%eax, %edx
	orl	%ebx, %edx
	movq	_BNX2_HC_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_BNX2_WR
	xorl	%edx, %edx
	cmpl	$25, 56(%r14)
	setl	%dl
	movq	_BNX2_FW_RX_LOW_LATENCY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_bnx2_reg_wr_ind
	cmpl	$2, 80(%r14)
	jl	LBB0_37
## %bb.35:
	movl	$1, %r15d
	movq	_BNX2_HC_RX_QUICK_CONS_TRIP_OFF@GOTPCREL(%rip), %r13
	movq	_BNX2_HC_RX_TICKS_OFF@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_36:                                ## =>This Inner Loop Header: Depth=1
	leal	-1(%r15), %ebx
	movq	_BNX2_HC_SB_CONFIG_SIZE@GOTPCREL(%rip), %rax
	imull	(%rax), %ebx
	movq	_BNX2_HC_SB_CONFIG_1@GOTPCREL(%rip), %rax
	addl	(%rax), %ebx
	movq	_BNX2_HC_SB_CONFIG_1_RX_TMR_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_BNX2_HC_SB_CONFIG_1_TX_TMR_MODE@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_BNX2_HC_SB_CONFIG_1_ONE_SHOT@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_BNX2_WR
	movq	_BNX2_HC_TX_QUICK_CONS_TRIP_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	%ebx, %esi
	movl	20(%r14), %edx
	shll	$16, %edx
	orl	24(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_TX_TICKS_OFF@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	%ebx, %esi
	movl	44(%r14), %edx
	shll	$16, %edx
	orl	48(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movl	(%r13), %esi
	addl	%ebx, %esi
	movl	28(%r14), %edx
	shll	$16, %edx
	orl	32(%r14), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	addl	(%r12), %ebx
	movl	52(%r14), %edx
	shll	$16, %edx
	orl	56(%r14), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_BNX2_WR
	incl	%r15d
	cmpl	80(%r14), %r15d
	jl	LBB0_36
LBB0_37:
	movq	_BNX2_HC_COMMAND@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	_BNX2_HC_COMMAND_CLR_STAT_NOW@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	_BNX2_HC_ATTN_BITS_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_STATUS_ATTN_EVENTS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movq	96(%r14), %rdi
	callq	_bnx2_set_rx_mode
	movq	%r14, %rdi
	callq	_BNX2_CHIP
	movq	_BNX2_CHIP_5709@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_39
## %bb.38:
	movq	_BNX2_MISC_NEW_CORE_CTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_BNX2_RD
	movq	_BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	(%rbx), %esi
	movq	%r14, %rdi
	movl	%eax, %edx
	callq	_BNX2_WR
LBB0_39:
	movq	_BNX2_DRV_MSG_DATA_WAIT2@GOTPCREL(%rip), %rax
	movq	_BNX2_DRV_MSG_CODE_RESET@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	movq	%r14, %rdi
	movl	$1, %edx
	xorl	%ecx, %ecx
	callq	_bnx2_fw_sync
	movl	%eax, %ebx
	movq	_BNX2_MISC_ENABLE_SET_BITS@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_BNX2_MISC_ENABLE_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_BNX2_WR
	movl	(%r12), %esi
	movq	%r14, %rdi
	callq	_BNX2_RD
	movl	$20, %edi
	callq	_udelay
	movl	(%r15), %esi
	movq	%r14, %rdi
	callq	_BNX2_RD
	movq	%rax, 88(%r14)
LBB0_40:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_BNX2_PCICFG_INT_ACK_CMD,4,2    ## @BNX2_PCICFG_INT_ACK_CMD
	.comm	_BNX2_PCICFG_INT_ACK_CMD_MASK_INT,4,2 ## @BNX2_PCICFG_INT_ACK_CMD_MASK_INT
	.comm	_BNX2_DMA_CONFIG_DATA_BYTE_SWAP,4,2 ## @BNX2_DMA_CONFIG_DATA_BYTE_SWAP
	.comm	_BNX2_DMA_CONFIG_DATA_WORD_SWAP,4,2 ## @BNX2_DMA_CONFIG_DATA_WORD_SWAP
	.comm	_BNX2_DMA_CONFIG_CNTL_WORD_SWAP,4,2 ## @BNX2_DMA_CONFIG_CNTL_WORD_SWAP
	.comm	_DMA_READ_CHANS,4,2             ## @DMA_READ_CHANS
	.comm	_DMA_WRITE_CHANS,4,2            ## @DMA_WRITE_CHANS
	.comm	_BNX2_FLAG_PCIX,4,2             ## @BNX2_FLAG_PCIX
	.comm	_BNX2_CHIP_5706,8,3             ## @BNX2_CHIP_5706
	.comm	_BNX2_CHIP_ID_5706_A0,8,3       ## @BNX2_CHIP_ID_5706_A0
	.comm	_BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA,4,2 ## @BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA
	.comm	_BNX2_DMA_CONFIG,4,2            ## @BNX2_DMA_CONFIG
	.comm	_BNX2_TDMA_CONFIG,4,2           ## @BNX2_TDMA_CONFIG
	.comm	_BNX2_TDMA_CONFIG_ONE_DMA,4,2   ## @BNX2_TDMA_CONFIG_ONE_DMA
	.comm	_PCI_X_CMD,8,3                  ## @PCI_X_CMD
	.comm	_PCI_X_CMD_ERO,4,2              ## @PCI_X_CMD_ERO
	.comm	_BNX2_MISC_ENABLE_SET_BITS,4,2  ## @BNX2_MISC_ENABLE_SET_BITS
	.comm	_BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE,4,2 ## @BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE
	.comm	_BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE,4,2 ## @BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE
	.comm	_BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE,4,2 ## @BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE
	.comm	_BNX2_CHIP_5709,8,3             ## @BNX2_CHIP_5709
	.comm	_BNX2_MQ_CONFIG,4,2             ## @BNX2_MQ_CONFIG
	.comm	_BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE,4,2 ## @BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE
	.comm	_BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256,4,2 ## @BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256
	.comm	_BNX2_MQ_CONFIG_BIN_MQ_MODE,4,2 ## @BNX2_MQ_CONFIG_BIN_MQ_MODE
	.comm	_BNX2_CHIP_REV_Ax,8,3           ## @BNX2_CHIP_REV_Ax
	.comm	_BNX2_MQ_CONFIG_HALT_DIS,4,2    ## @BNX2_MQ_CONFIG_HALT_DIS
	.comm	_MAX_CID_CNT,4,2                ## @MAX_CID_CNT
	.comm	_MB_KERNEL_CTX_SIZE,4,2         ## @MB_KERNEL_CTX_SIZE
	.comm	_BNX2_MQ_KNL_BYP_WIND_START,4,2 ## @BNX2_MQ_KNL_BYP_WIND_START
	.comm	_BNX2_MQ_KNL_WIND_END,4,2       ## @BNX2_MQ_KNL_WIND_END
	.comm	_BNX2_PAGE_BITS,4,2             ## @BNX2_PAGE_BITS
	.comm	_BNX2_RV2P_CONFIG,4,2           ## @BNX2_RV2P_CONFIG
	.comm	_BNX2_TBDR_CONFIG,4,2           ## @BNX2_TBDR_CONFIG
	.comm	_BNX2_TBDR_CONFIG_PAGE_SIZE,4,2 ## @BNX2_TBDR_CONFIG_PAGE_SIZE
	.comm	_BNX2_EMAC_BACKOFF_SEED,4,2     ## @BNX2_EMAC_BACKOFF_SEED
	.comm	_ETH_HLEN,4,2                   ## @ETH_HLEN
	.comm	_ETH_FCS_LEN,4,2                ## @ETH_FCS_LEN
	.comm	_MAX_ETHERNET_PACKET_SIZE,4,2   ## @MAX_ETHERNET_PACKET_SIZE
	.comm	_BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA,4,2 ## @BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA
	.comm	_BNX2_EMAC_RX_MTU_SIZE,4,2      ## @BNX2_EMAC_RX_MTU_SIZE
	.comm	_ETH_DATA_LEN,4,2               ## @ETH_DATA_LEN
	.comm	_BNX2_RBUF_CONFIG,4,2           ## @BNX2_RBUF_CONFIG
	.comm	_BNX2_RBUF_CONFIG2,4,2          ## @BNX2_RBUF_CONFIG2
	.comm	_BNX2_RBUF_CONFIG3,4,2          ## @BNX2_RBUF_CONFIG3
	.comm	_BNX2_MAX_MSIX_VEC,4,2          ## @BNX2_MAX_MSIX_VEC
	.comm	_BNX2_EMAC_ATTENTION_ENA,4,2    ## @BNX2_EMAC_ATTENTION_ENA
	.comm	_BNX2_EMAC_ATTENTION_ENA_LINK,4,2 ## @BNX2_EMAC_ATTENTION_ENA_LINK
	.comm	_BNX2_HC_STATUS_ADDR_L,4,2      ## @BNX2_HC_STATUS_ADDR_L
	.comm	_BNX2_HC_STATUS_ADDR_H,4,2      ## @BNX2_HC_STATUS_ADDR_H
	.comm	_BNX2_HC_STATISTICS_ADDR_L,4,2  ## @BNX2_HC_STATISTICS_ADDR_L
	.comm	_BNX2_HC_STATISTICS_ADDR_H,4,2  ## @BNX2_HC_STATISTICS_ADDR_H
	.comm	_BNX2_HC_TX_QUICK_CONS_TRIP,4,2 ## @BNX2_HC_TX_QUICK_CONS_TRIP
	.comm	_BNX2_HC_RX_QUICK_CONS_TRIP,4,2 ## @BNX2_HC_RX_QUICK_CONS_TRIP
	.comm	_BNX2_HC_COMP_PROD_TRIP,4,2     ## @BNX2_HC_COMP_PROD_TRIP
	.comm	_BNX2_HC_TX_TICKS,4,2           ## @BNX2_HC_TX_TICKS
	.comm	_BNX2_HC_RX_TICKS,4,2           ## @BNX2_HC_RX_TICKS
	.comm	_BNX2_HC_COM_TICKS,4,2          ## @BNX2_HC_COM_TICKS
	.comm	_BNX2_HC_CMD_TICKS,4,2          ## @BNX2_HC_CMD_TICKS
	.comm	_BNX2_FLAG_BROKEN_STATS,4,2     ## @BNX2_FLAG_BROKEN_STATS
	.comm	_BNX2_HC_STATS_TICKS,4,2        ## @BNX2_HC_STATS_TICKS
	.comm	_BNX2_HC_STAT_COLLECT_TICKS,4,2 ## @BNX2_HC_STAT_COLLECT_TICKS
	.comm	_BNX2_CHIP_ID_5706_A1,8,3       ## @BNX2_CHIP_ID_5706_A1
	.comm	_BNX2_HC_CONFIG_COLLECT_STATS,4,2 ## @BNX2_HC_CONFIG_COLLECT_STATS
	.comm	_BNX2_HC_CONFIG_RX_TMR_MODE,4,2 ## @BNX2_HC_CONFIG_RX_TMR_MODE
	.comm	_BNX2_HC_CONFIG_TX_TMR_MODE,4,2 ## @BNX2_HC_CONFIG_TX_TMR_MODE
	.comm	_BNX2_FLAG_USING_MSIX,4,2       ## @BNX2_FLAG_USING_MSIX
	.comm	_BNX2_HC_MSIX_BIT_VECTOR,4,2    ## @BNX2_HC_MSIX_BIT_VECTOR
	.comm	_BNX2_HC_MSIX_BIT_VECTOR_VAL,4,2 ## @BNX2_HC_MSIX_BIT_VECTOR_VAL
	.comm	_BNX2_HC_CONFIG_SB_ADDR_INC_128B,4,2 ## @BNX2_HC_CONFIG_SB_ADDR_INC_128B
	.comm	_BNX2_FLAG_ONE_SHOT_MSI,4,2     ## @BNX2_FLAG_ONE_SHOT_MSI
	.comm	_BNX2_HC_CONFIG_ONE_SHOT,4,2    ## @BNX2_HC_CONFIG_ONE_SHOT
	.comm	_BNX2_HC_CONFIG_USE_INT_PARAM,4,2 ## @BNX2_HC_CONFIG_USE_INT_PARAM
	.comm	_BNX2_HC_CONFIG,4,2             ## @BNX2_HC_CONFIG
	.comm	_BNX2_FW_RX_LOW_LATENCY,4,2     ## @BNX2_FW_RX_LOW_LATENCY
	.comm	_BNX2_HC_SB_CONFIG_SIZE,4,2     ## @BNX2_HC_SB_CONFIG_SIZE
	.comm	_BNX2_HC_SB_CONFIG_1,4,2        ## @BNX2_HC_SB_CONFIG_1
	.comm	_BNX2_HC_SB_CONFIG_1_TX_TMR_MODE,4,2 ## @BNX2_HC_SB_CONFIG_1_TX_TMR_MODE
	.comm	_BNX2_HC_SB_CONFIG_1_RX_TMR_MODE,4,2 ## @BNX2_HC_SB_CONFIG_1_RX_TMR_MODE
	.comm	_BNX2_HC_SB_CONFIG_1_ONE_SHOT,4,2 ## @BNX2_HC_SB_CONFIG_1_ONE_SHOT
	.comm	_BNX2_HC_TX_QUICK_CONS_TRIP_OFF,4,2 ## @BNX2_HC_TX_QUICK_CONS_TRIP_OFF
	.comm	_BNX2_HC_TX_TICKS_OFF,4,2       ## @BNX2_HC_TX_TICKS_OFF
	.comm	_BNX2_HC_RX_QUICK_CONS_TRIP_OFF,4,2 ## @BNX2_HC_RX_QUICK_CONS_TRIP_OFF
	.comm	_BNX2_HC_RX_TICKS_OFF,4,2       ## @BNX2_HC_RX_TICKS_OFF
	.comm	_BNX2_HC_COMMAND,4,2            ## @BNX2_HC_COMMAND
	.comm	_BNX2_HC_COMMAND_CLR_STAT_NOW,4,2 ## @BNX2_HC_COMMAND_CLR_STAT_NOW
	.comm	_BNX2_HC_ATTN_BITS_ENABLE,4,2   ## @BNX2_HC_ATTN_BITS_ENABLE
	.comm	_STATUS_ATTN_EVENTS,4,2         ## @STATUS_ATTN_EVENTS
	.comm	_BNX2_MISC_NEW_CORE_CTL,4,2     ## @BNX2_MISC_NEW_CORE_CTL
	.comm	_BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE,4,2 ## @BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE
	.comm	_BNX2_DRV_MSG_DATA_WAIT2,4,2    ## @BNX2_DRV_MSG_DATA_WAIT2
	.comm	_BNX2_DRV_MSG_CODE_RESET,4,2    ## @BNX2_DRV_MSG_CODE_RESET
	.comm	_BNX2_MISC_ENABLE_DEFAULT,4,2   ## @BNX2_MISC_ENABLE_DEFAULT
	.comm	_BNX2_DMA_CONFIG_CNTL_BYTE_SWAP,4,2 ## @BNX2_DMA_CONFIG_CNTL_BYTE_SWAP
	.no_dead_strip	_bnx2_init_chip
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.section	__TEXT,__literal8,8byte_literals
	.p2align	3                               ; -- Begin function bnx2_init_chip
lCPI0_0:
	.long	8                               ; 0x8
	.long	16                              ; 0x10
	.section	__TEXT,__text,regular,pure_instructions
	.p2align	2
_bnx2_init_chip:                        ; @bnx2_init_chip
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	mov	w22, #2048
	movk	w22, #32, lsl #16
Lloh0:
	adrp	x8, _BNX2_PCICFG_INT_ACK_CMD@GOTPAGE
Lloh1:
	ldr	x8, [x8, _BNX2_PCICFG_INT_ACK_CMD@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _BNX2_PCICFG_INT_ACK_CMD_MASK_INT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _BNX2_PCICFG_INT_ACK_CMD_MASK_INT@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	bl	_BNX2_WR
Lloh6:
	adrp	x8, _BNX2_DMA_CONFIG_DATA_BYTE_SWAP@GOTPAGE
Lloh7:
	ldr	x8, [x8, _BNX2_DMA_CONFIG_DATA_BYTE_SWAP@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x9, _BNX2_DMA_CONFIG_DATA_WORD_SWAP@GOTPAGE
Lloh10:
	ldr	x9, [x9, _BNX2_DMA_CONFIG_DATA_WORD_SWAP@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh12:
	adrp	x9, _BNX2_DMA_CONFIG_CNTL_WORD_SWAP@GOTPAGE
Lloh13:
	ldr	x9, [x9, _BNX2_DMA_CONFIG_CNTL_WORD_SWAP@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh15:
	adrp	x9, _DMA_READ_CHANS@GOTPAGE
Lloh16:
	ldr	x9, [x9, _DMA_READ_CHANS@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w8, w8, w9, lsl #12
Lloh18:
	adrp	x9, _DMA_WRITE_CHANS@GOTPAGE
Lloh19:
	ldr	x9, [x9, _DMA_WRITE_CHANS@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w8, w8, w9, lsl #16
	orr	w20, w8, w22
	ldr	w9, [x19]
Lloh21:
	adrp	x21, _BNX2_FLAG_PCIX@GOTPAGE
Lloh22:
	ldr	x21, [x21, _BNX2_FLAG_PCIX@GOTPAGEOFF]
	ldr	w10, [x21]
	tst	w10, w9
	b.eq	LBB0_2
; %bb.1:
	ldr	w9, [x19, #4]
	orr	w8, w22, w8
	orr	w8, w8, #0x800000
	cmp	w9, #133
	csel	w20, w8, w20, eq
LBB0_2:
	mov	x0, x19
	bl	_BNX2_CHIP
Lloh23:
	adrp	x8, _BNX2_CHIP_5706@GOTPAGE
Lloh24:
	ldr	x8, [x8, _BNX2_CHIP_5706@GOTPAGEOFF]
Lloh25:
	ldr	x8, [x8]
Lloh26:
	adrp	x22, _BNX2_CHIP_ID_5706_A0@GOTPAGE
Lloh27:
	ldr	x22, [x22, _BNX2_CHIP_ID_5706_A0@GOTPAGEOFF]
	cmp	x0, x8
	b.ne	LBB0_6
; %bb.3:
	mov	x0, x19
	bl	_BNX2_CHIP_ID
	ldr	x8, [x22]
	cmp	x0, x8
	b.eq	LBB0_6
; %bb.4:
	ldr	w8, [x19]
	ldr	w9, [x21]
	tst	w9, w8
	b.ne	LBB0_6
; %bb.5:
Lloh28:
	adrp	x8, _BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA@GOTPAGE
Lloh29:
	ldr	x8, [x8, _BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	orr	w20, w8, w20
LBB0_6:
Lloh31:
	adrp	x8, _BNX2_DMA_CONFIG@GOTPAGE
Lloh32:
	ldr	x8, [x8, _BNX2_DMA_CONFIG@GOTPAGEOFF]
Lloh33:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_BNX2_WR
	mov	x0, x19
	bl	_BNX2_CHIP_ID
	ldr	x8, [x22]
	cmp	x0, x8
	b.ne	LBB0_8
; %bb.7:
Lloh34:
	adrp	x20, _BNX2_TDMA_CONFIG@GOTPAGE
Lloh35:
	ldr	x20, [x20, _BNX2_TDMA_CONFIG@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_BNX2_RD
Lloh36:
	adrp	x8, _BNX2_TDMA_CONFIG_ONE_DMA@GOTPAGE
Lloh37:
	ldr	x8, [x8, _BNX2_TDMA_CONFIG_ONE_DMA@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	orr	w2, w8, w0
	ldr	w1, [x20]
	mov	x0, x19
	bl	_BNX2_WR
LBB0_8:
	ldr	w8, [x19]
	ldr	w9, [x21]
	tst	w9, w8
	b.eq	LBB0_10
; %bb.9:
	ldr	w0, [x19, #144]
	ldr	x8, [x19, #136]
Lloh39:
	adrp	x20, _PCI_X_CMD@GOTPAGE
Lloh40:
	ldr	x20, [x20, _PCI_X_CMD@GOTPAGEOFF]
	ldr	x9, [x20]
	add	x1, x9, x8
	add	x2, sp, #12
	bl	_pci_read_config_word
	ldr	w0, [x19, #144]
	ldr	x8, [x19, #136]
	ldr	x9, [x20]
	add	x1, x9, x8
	ldr	w8, [sp, #12]
Lloh41:
	adrp	x9, _PCI_X_CMD_ERO@GOTPAGE
Lloh42:
	ldr	x9, [x9, _PCI_X_CMD_ERO@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	bic	w2, w8, w9
	bl	_pci_write_config_word
LBB0_10:
Lloh44:
	adrp	x8, _BNX2_MISC_ENABLE_SET_BITS@GOTPAGE
Lloh45:
	ldr	x8, [x8, _BNX2_MISC_ENABLE_SET_BITS@GOTPAGEOFF]
Lloh46:
	ldr	w1, [x8]
Lloh47:
	adrp	x8, _BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE@GOTPAGE
Lloh48:
	ldr	x8, [x8, _BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
Lloh50:
	adrp	x9, _BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE@GOTPAGE
Lloh51:
	ldr	x9, [x9, _BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE@GOTPAGEOFF]
Lloh52:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh53:
	adrp	x9, _BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE@GOTPAGE
Lloh54:
	ldr	x9, [x9, _BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE@GOTPAGEOFF]
Lloh55:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_BNX2_WR
	mov	x0, x19
	bl	_BNX2_CHIP
Lloh56:
	adrp	x22, _BNX2_CHIP_5709@GOTPAGE
Lloh57:
	ldr	x22, [x22, _BNX2_CHIP_5709@GOTPAGEOFF]
	ldr	x8, [x22]
	cmp	x0, x8
	b.ne	LBB0_12
; %bb.11:
	mov	x0, x19
	bl	_bnx2_init_5709_context
	mov	x20, x0
	cbnz	w0, LBB0_39
	b	LBB0_13
LBB0_12:
	mov	x0, x19
	bl	_bnx2_init_context
LBB0_13:
	mov	x0, x19
	bl	_bnx2_init_cpus
	mov	x20, x0
	cbnz	w0, LBB0_39
; %bb.14:
	mov	x0, x19
	bl	_bnx2_init_nvram
	ldr	x8, [x19, #96]
	ldr	w1, [x8, #4]
	mov	x0, x19
	mov	w2, #0
	bl	_bnx2_set_mac_addr
Lloh58:
	adrp	x21, _BNX2_MQ_CONFIG@GOTPAGE
Lloh59:
	ldr	x21, [x21, _BNX2_MQ_CONFIG@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
Lloh60:
	adrp	x8, _BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE@GOTPAGE
Lloh61:
	ldr	x8, [x8, _BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE@GOTPAGEOFF]
Lloh62:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh63:
	adrp	x9, _BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256@GOTPAGE
Lloh64:
	ldr	x9, [x9, _BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256@GOTPAGEOFF]
Lloh65:
	ldr	w9, [x9]
	orr	w20, w8, w9
	mov	x0, x19
	bl	_BNX2_CHIP
	ldr	x8, [x22]
	cmp	x0, x8
	b.ne	LBB0_17
; %bb.15:
Lloh66:
	adrp	x8, _BNX2_MQ_CONFIG_BIN_MQ_MODE@GOTPAGE
Lloh67:
	ldr	x8, [x8, _BNX2_MQ_CONFIG_BIN_MQ_MODE@GOTPAGEOFF]
Lloh68:
	ldr	w8, [x8]
	orr	w20, w8, w20
	mov	x0, x19
	bl	_BNX2_CHIP_REV
Lloh69:
	adrp	x8, _BNX2_CHIP_REV_Ax@GOTPAGE
Lloh70:
	ldr	x8, [x8, _BNX2_CHIP_REV_Ax@GOTPAGEOFF]
Lloh71:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_17
; %bb.16:
Lloh72:
	adrp	x8, _BNX2_MQ_CONFIG_HALT_DIS@GOTPAGE
Lloh73:
	ldr	x8, [x8, _BNX2_MQ_CONFIG_HALT_DIS@GOTPAGEOFF]
Lloh74:
	ldr	w8, [x8]
	orr	w20, w8, w20
LBB0_17:
	ldr	w1, [x21]
	mov	x0, x19
	mov	x2, x20
	bl	_BNX2_WR
Lloh75:
	adrp	x8, _MAX_CID_CNT@GOTPAGE
Lloh76:
	ldr	x8, [x8, _MAX_CID_CNT@GOTPAGEOFF]
Lloh77:
	ldr	w8, [x8]
Lloh78:
	adrp	x9, _MB_KERNEL_CTX_SIZE@GOTPAGE
Lloh79:
	ldr	x9, [x9, _MB_KERNEL_CTX_SIZE@GOTPAGEOFF]
Lloh80:
	ldr	w9, [x9]
	orr	w10, wzr, #0x10000
	madd	w20, w9, w8, w10
Lloh81:
	adrp	x8, _BNX2_MQ_KNL_BYP_WIND_START@GOTPAGE
Lloh82:
	ldr	x8, [x8, _BNX2_MQ_KNL_BYP_WIND_START@GOTPAGEOFF]
Lloh83:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_BNX2_WR
Lloh84:
	adrp	x8, _BNX2_MQ_KNL_WIND_END@GOTPAGE
Lloh85:
	ldr	x8, [x8, _BNX2_MQ_KNL_WIND_END@GOTPAGEOFF]
Lloh86:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_BNX2_WR
Lloh87:
	adrp	x20, _BNX2_PAGE_BITS@GOTPAGE
Lloh88:
	ldr	x20, [x20, _BNX2_PAGE_BITS@GOTPAGEOFF]
	ldr	w8, [x20]
	mov	w9, #-134217728
	add	w2, w9, w8, lsl #24
Lloh89:
	adrp	x8, _BNX2_RV2P_CONFIG@GOTPAGE
Lloh90:
	ldr	x8, [x8, _BNX2_RV2P_CONFIG@GOTPAGEOFF]
Lloh91:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_BNX2_WR
Lloh92:
	adrp	x21, _BNX2_TBDR_CONFIG@GOTPAGE
Lloh93:
	ldr	x21, [x21, _BNX2_TBDR_CONFIG@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
Lloh94:
	adrp	x8, _BNX2_TBDR_CONFIG_PAGE_SIZE@GOTPAGE
Lloh95:
	ldr	x8, [x8, _BNX2_TBDR_CONFIG_PAGE_SIZE@GOTPAGEOFF]
Lloh96:
	ldr	w8, [x8]
	bic	w8, w0, w8
	ldr	w9, [x20]
	mov	w10, #64
	movk	w10, #63488, lsl #16
	add	w9, w10, w9, lsl #24
	orr	w2, w9, w8
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_WR
	ldr	x8, [x19, #8]
	ldr	w9, [x8]
	ldr	w10, [x8, #12]
	ldur	d0, [x8, #4]
	ldr	d1, [x8, #16]
	add.2s	v0, v1, v0
Lloh97:
	adrp	x8, lCPI0_0@PAGE
Lloh98:
	ldr	d1, [x8, lCPI0_0@PAGEOFF]
	ushl.2s	v0, v0, v1
	mov.s	w8, v0[1]
	fmov	w11, s0
	add	w9, w10, w9
	add	w9, w9, w11
	add	w2, w9, w8
Lloh99:
	adrp	x8, _BNX2_EMAC_BACKOFF_SEED@GOTPAGE
Lloh100:
	ldr	x8, [x8, _BNX2_EMAC_BACKOFF_SEED@GOTPAGEOFF]
Lloh101:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_BNX2_WR
	ldr	x8, [x19, #96]
	ldr	w20, [x8]
Lloh102:
	adrp	x8, _ETH_HLEN@GOTPAGE
Lloh103:
	ldr	x8, [x8, _ETH_HLEN@GOTPAGEOFF]
Lloh104:
	adrp	x9, _ETH_FCS_LEN@GOTPAGE
Lloh105:
	ldr	x9, [x9, _ETH_FCS_LEN@GOTPAGEOFF]
Lloh106:
	ldr	w8, [x8]
Lloh107:
	ldr	w9, [x9]
	add	w10, w8, w20
	add	w9, w10, w9
Lloh108:
	adrp	x10, _MAX_ETHERNET_PACKET_SIZE@GOTPAGE
Lloh109:
	ldr	x10, [x10, _MAX_ETHERNET_PACKET_SIZE@GOTPAGEOFF]
Lloh110:
	ldr	w10, [x10]
	add	w8, w8, w10
	add	w8, w8, #4
Lloh111:
	adrp	x10, _BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA@GOTPAGE
Lloh112:
	ldr	x10, [x10, _BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA@GOTPAGEOFF]
Lloh113:
	ldr	w10, [x10]
	cmp	w9, w8
	csel	w8, w10, wzr, gt
	orr	w2, w8, w9
Lloh114:
	adrp	x8, _BNX2_EMAC_RX_MTU_SIZE@GOTPAGE
Lloh115:
	ldr	x8, [x8, _BNX2_EMAC_RX_MTU_SIZE@GOTPAGEOFF]
Lloh116:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_BNX2_WR
Lloh117:
	adrp	x8, _ETH_DATA_LEN@GOTPAGE
Lloh118:
	ldr	x8, [x8, _ETH_DATA_LEN@GOTPAGEOFF]
Lloh119:
	ldr	w8, [x8]
	cmp	w20, w8
	csel	w20, w20, w8, gt
Lloh120:
	adrp	x8, _BNX2_RBUF_CONFIG@GOTPAGE
Lloh121:
	ldr	x8, [x8, _BNX2_RBUF_CONFIG@GOTPAGEOFF]
Lloh122:
	ldr	w21, [x8]
	mov	x0, x20
	bl	_BNX2_RBUF_CONFIG_VAL
	mov	x2, x0
	mov	x0, x19
	mov	x1, x21
	bl	_bnx2_reg_wr_ind
Lloh123:
	adrp	x8, _BNX2_RBUF_CONFIG2@GOTPAGE
Lloh124:
	ldr	x8, [x8, _BNX2_RBUF_CONFIG2@GOTPAGEOFF]
Lloh125:
	ldr	w21, [x8]
	mov	x0, x20
	bl	_BNX2_RBUF_CONFIG2_VAL
	mov	x2, x0
	mov	x0, x19
	mov	x1, x21
	bl	_bnx2_reg_wr_ind
Lloh126:
	adrp	x8, _BNX2_RBUF_CONFIG3@GOTPAGE
Lloh127:
	ldr	x8, [x8, _BNX2_RBUF_CONFIG3@GOTPAGEOFF]
Lloh128:
	ldr	w21, [x8]
	mov	x0, x20
	bl	_BNX2_RBUF_CONFIG3_VAL
	mov	x2, x0
	mov	x0, x19
	mov	x1, x21
	bl	_bnx2_reg_wr_ind
	ldr	x8, [x19, #120]
	ldr	w0, [x8, #8]
	ldr	w2, [x19, #128]
	mov	w1, #0
	bl	_memset
Lloh129:
	adrp	x8, _BNX2_MAX_MSIX_VEC@GOTPAGE
Lloh130:
	ldr	x8, [x8, _BNX2_MAX_MSIX_VEC@GOTPAGEOFF]
Lloh131:
	ldr	w8, [x8]
	cmp	w8, #1
	b.lt	LBB0_25
; %bb.18:
	ldr	x9, [x19, #120]
	cmp	w8, #4
	b.hs	LBB0_20
; %bb.19:
	mov	x10, #0
	b	LBB0_23
LBB0_20:
	and	x10, x8, #0xfffffffc
	add	x11, x9, #32
	mov	x12, x10
LBB0_21:                                ; =>This Inner Loop Header: Depth=1
	stur	xzr, [x11, #-32]
	stur	xzr, [x11, #-16]
	str	xzr, [x11]
	str	xzr, [x11, #16]
	add	x11, x11, #64
	subs	x12, x12, #4
	b.ne	LBB0_21
; %bb.22:
	cmp	x10, x8
	b.eq	LBB0_25
LBB0_23:
	add	x9, x9, x10, lsl #4
	sub	x8, x8, x10
LBB0_24:                                ; =>This Inner Loop Header: Depth=1
	str	xzr, [x9], #16
	subs	x8, x8, #1
	b.ne	LBB0_24
LBB0_25:
	mov	w8, #65535
	str	w8, [x19, #16]
Lloh132:
	adrp	x8, _BNX2_EMAC_ATTENTION_ENA@GOTPAGE
Lloh133:
	ldr	x8, [x8, _BNX2_EMAC_ATTENTION_ENA@GOTPAGEOFF]
Lloh134:
	ldr	w1, [x8]
Lloh135:
	adrp	x8, _BNX2_EMAC_ATTENTION_ENA_LINK@GOTPAGE
Lloh136:
	ldr	x8, [x8, _BNX2_EMAC_ATTENTION_ENA_LINK@GOTPAGEOFF]
Lloh137:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_BNX2_WR
Lloh138:
	adrp	x8, _BNX2_HC_STATUS_ADDR_L@GOTPAGE
Lloh139:
	ldr	x8, [x8, _BNX2_HC_STATUS_ADDR_L@GOTPAGEOFF]
Lloh140:
	ldr	w1, [x8]
	ldr	w2, [x19, #112]
	mov	x0, x19
	bl	_BNX2_WR
Lloh141:
	adrp	x8, _BNX2_HC_STATUS_ADDR_H@GOTPAGE
Lloh142:
	ldr	x8, [x8, _BNX2_HC_STATUS_ADDR_H@GOTPAGEOFF]
Lloh143:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_BNX2_WR
Lloh144:
	adrp	x8, _BNX2_HC_STATISTICS_ADDR_L@GOTPAGE
Lloh145:
	ldr	x8, [x8, _BNX2_HC_STATISTICS_ADDR_L@GOTPAGEOFF]
Lloh146:
	ldr	w1, [x8]
	ldr	w2, [x19, #104]
	mov	x0, x19
	bl	_BNX2_WR
Lloh147:
	adrp	x8, _BNX2_HC_STATISTICS_ADDR_H@GOTPAGE
Lloh148:
	ldr	x8, [x8, _BNX2_HC_STATISTICS_ADDR_H@GOTPAGEOFF]
Lloh149:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_BNX2_WR
Lloh150:
	adrp	x8, _BNX2_HC_TX_QUICK_CONS_TRIP@GOTPAGE
Lloh151:
	ldr	x8, [x8, _BNX2_HC_TX_QUICK_CONS_TRIP@GOTPAGEOFF]
Lloh152:
	ldr	w1, [x8]
	ldp	w8, w9, [x19, #20]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_BNX2_WR
Lloh153:
	adrp	x8, _BNX2_HC_RX_QUICK_CONS_TRIP@GOTPAGE
Lloh154:
	ldr	x8, [x8, _BNX2_HC_RX_QUICK_CONS_TRIP@GOTPAGEOFF]
Lloh155:
	ldr	w1, [x8]
	ldp	w8, w9, [x19, #28]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_BNX2_WR
Lloh156:
	adrp	x8, _BNX2_HC_COMP_PROD_TRIP@GOTPAGE
Lloh157:
	ldr	x8, [x8, _BNX2_HC_COMP_PROD_TRIP@GOTPAGEOFF]
Lloh158:
	ldr	w1, [x8]
	ldp	w8, w9, [x19, #36]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_BNX2_WR
Lloh159:
	adrp	x8, _BNX2_HC_TX_TICKS@GOTPAGE
Lloh160:
	ldr	x8, [x8, _BNX2_HC_TX_TICKS@GOTPAGEOFF]
Lloh161:
	ldr	w1, [x8]
	ldp	w8, w9, [x19, #44]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_BNX2_WR
Lloh162:
	adrp	x8, _BNX2_HC_RX_TICKS@GOTPAGE
Lloh163:
	ldr	x8, [x8, _BNX2_HC_RX_TICKS@GOTPAGEOFF]
Lloh164:
	ldr	w1, [x8]
	ldp	w8, w9, [x19, #52]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_BNX2_WR
Lloh165:
	adrp	x8, _BNX2_HC_COM_TICKS@GOTPAGE
Lloh166:
	ldr	x8, [x8, _BNX2_HC_COM_TICKS@GOTPAGEOFF]
Lloh167:
	ldr	w1, [x8]
	ldp	w8, w9, [x19, #60]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_BNX2_WR
Lloh168:
	adrp	x8, _BNX2_HC_CMD_TICKS@GOTPAGE
Lloh169:
	ldr	x8, [x8, _BNX2_HC_CMD_TICKS@GOTPAGEOFF]
Lloh170:
	ldr	w1, [x8]
	ldp	w8, w9, [x19, #68]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_BNX2_WR
Lloh171:
	adrp	x8, _BNX2_FLAG_BROKEN_STATS@GOTPAGE
Lloh172:
	ldr	x8, [x8, _BNX2_FLAG_BROKEN_STATS@GOTPAGEOFF]
	ldr	w9, [x19]
Lloh173:
	ldr	w8, [x8]
Lloh174:
	adrp	x10, _BNX2_HC_STATS_TICKS@GOTPAGE
Lloh175:
	ldr	x10, [x10, _BNX2_HC_STATS_TICKS@GOTPAGEOFF]
Lloh176:
	ldr	w1, [x10]
	tst	w8, w9
	b.eq	LBB0_27
; %bb.26:
	mov	w2, #0
	b	LBB0_28
LBB0_27:
	ldr	w2, [x19, #76]
LBB0_28:
	mov	x0, x19
	bl	_BNX2_WR
Lloh177:
	adrp	x8, _BNX2_HC_STAT_COLLECT_TICKS@GOTPAGE
Lloh178:
	ldr	x8, [x8, _BNX2_HC_STAT_COLLECT_TICKS@GOTPAGEOFF]
Lloh179:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #3000
	bl	_BNX2_WR
	mov	x0, x19
	bl	_BNX2_CHIP_ID
Lloh180:
	adrp	x8, _BNX2_CHIP_ID_5706_A1@GOTPAGE
Lloh181:
	ldr	x8, [x8, _BNX2_CHIP_ID_5706_A1@GOTPAGEOFF]
Lloh182:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_30
; %bb.29:
Lloh183:
	adrp	x8, _BNX2_HC_CONFIG_COLLECT_STATS@GOTPAGE
Lloh184:
	ldr	x8, [x8, _BNX2_HC_CONFIG_COLLECT_STATS@GOTPAGEOFF]
Lloh185:
	ldr	w20, [x8]
	b	LBB0_31
LBB0_30:
Lloh186:
	adrp	x8, _BNX2_HC_CONFIG_RX_TMR_MODE@GOTPAGE
Lloh187:
	ldr	x8, [x8, _BNX2_HC_CONFIG_RX_TMR_MODE@GOTPAGEOFF]
Lloh188:
	ldr	w8, [x8]
Lloh189:
	adrp	x9, _BNX2_HC_CONFIG_TX_TMR_MODE@GOTPAGE
Lloh190:
	ldr	x9, [x9, _BNX2_HC_CONFIG_TX_TMR_MODE@GOTPAGEOFF]
Lloh191:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh192:
	adrp	x9, _BNX2_HC_CONFIG_COLLECT_STATS@GOTPAGE
Lloh193:
	ldr	x9, [x9, _BNX2_HC_CONFIG_COLLECT_STATS@GOTPAGEOFF]
Lloh194:
	ldr	w9, [x9]
	orr	w20, w8, w9
LBB0_31:
	ldr	w8, [x19]
Lloh195:
	adrp	x9, _BNX2_FLAG_USING_MSIX@GOTPAGE
Lloh196:
	ldr	x9, [x9, _BNX2_FLAG_USING_MSIX@GOTPAGEOFF]
Lloh197:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_33
; %bb.32:
Lloh198:
	adrp	x8, _BNX2_HC_MSIX_BIT_VECTOR@GOTPAGE
Lloh199:
	ldr	x8, [x8, _BNX2_HC_MSIX_BIT_VECTOR@GOTPAGEOFF]
Lloh200:
	ldr	w1, [x8]
Lloh201:
	adrp	x8, _BNX2_HC_MSIX_BIT_VECTOR_VAL@GOTPAGE
Lloh202:
	ldr	x8, [x8, _BNX2_HC_MSIX_BIT_VECTOR_VAL@GOTPAGEOFF]
Lloh203:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_BNX2_WR
Lloh204:
	adrp	x8, _BNX2_HC_CONFIG_SB_ADDR_INC_128B@GOTPAGE
Lloh205:
	ldr	x8, [x8, _BNX2_HC_CONFIG_SB_ADDR_INC_128B@GOTPAGEOFF]
Lloh206:
	ldr	w8, [x8]
	orr	w20, w8, w20
	ldr	w8, [x19]
LBB0_33:
Lloh207:
	adrp	x9, _BNX2_FLAG_ONE_SHOT_MSI@GOTPAGE
Lloh208:
	ldr	x9, [x9, _BNX2_FLAG_ONE_SHOT_MSI@GOTPAGEOFF]
Lloh209:
	adrp	x10, _BNX2_HC_CONFIG_ONE_SHOT@GOTPAGE
Lloh210:
	ldr	x10, [x10, _BNX2_HC_CONFIG_ONE_SHOT@GOTPAGEOFF]
Lloh211:
	ldr	w9, [x9]
Lloh212:
	ldr	w10, [x10]
Lloh213:
	adrp	x11, _BNX2_HC_CONFIG_USE_INT_PARAM@GOTPAGE
Lloh214:
	ldr	x11, [x11, _BNX2_HC_CONFIG_USE_INT_PARAM@GOTPAGEOFF]
Lloh215:
	ldr	w11, [x11]
	orr	w10, w11, w10
	tst	w9, w8
	csel	w8, wzr, w10, eq
	orr	w2, w8, w20
Lloh216:
	adrp	x8, _BNX2_HC_CONFIG@GOTPAGE
Lloh217:
	ldr	x8, [x8, _BNX2_HC_CONFIG@GOTPAGEOFF]
Lloh218:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_BNX2_WR
	ldr	w8, [x19, #56]
	cmp	w8, #25
	cset	w2, lt
Lloh219:
	adrp	x8, _BNX2_FW_RX_LOW_LATENCY@GOTPAGE
Lloh220:
	ldr	x8, [x8, _BNX2_FW_RX_LOW_LATENCY@GOTPAGEOFF]
Lloh221:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_bnx2_reg_wr_ind
	ldr	w8, [x19, #80]
	cmp	w8, #2
	b.lt	LBB0_36
; %bb.34:
	mov	w21, #1
Lloh222:
	adrp	x26, _BNX2_HC_SB_CONFIG_1_TX_TMR_MODE@GOTPAGE
Lloh223:
	ldr	x26, [x26, _BNX2_HC_SB_CONFIG_1_TX_TMR_MODE@GOTPAGEOFF]
Lloh224:
	adrp	x27, _BNX2_HC_SB_CONFIG_1_RX_TMR_MODE@GOTPAGE
Lloh225:
	ldr	x27, [x27, _BNX2_HC_SB_CONFIG_1_RX_TMR_MODE@GOTPAGEOFF]
Lloh226:
	adrp	x28, _BNX2_HC_SB_CONFIG_1_ONE_SHOT@GOTPAGE
Lloh227:
	ldr	x28, [x28, _BNX2_HC_SB_CONFIG_1_ONE_SHOT@GOTPAGEOFF]
Lloh228:
	adrp	x22, _BNX2_HC_TX_QUICK_CONS_TRIP_OFF@GOTPAGE
Lloh229:
	ldr	x22, [x22, _BNX2_HC_TX_QUICK_CONS_TRIP_OFF@GOTPAGEOFF]
Lloh230:
	adrp	x23, _BNX2_HC_TX_TICKS_OFF@GOTPAGE
Lloh231:
	ldr	x23, [x23, _BNX2_HC_TX_TICKS_OFF@GOTPAGEOFF]
Lloh232:
	adrp	x24, _BNX2_HC_RX_QUICK_CONS_TRIP_OFF@GOTPAGE
Lloh233:
	ldr	x24, [x24, _BNX2_HC_RX_QUICK_CONS_TRIP_OFF@GOTPAGEOFF]
Lloh234:
	adrp	x25, _BNX2_HC_RX_TICKS_OFF@GOTPAGE
Lloh235:
	ldr	x25, [x25, _BNX2_HC_RX_TICKS_OFF@GOTPAGEOFF]
LBB0_35:                                ; =>This Inner Loop Header: Depth=1
	sub	w8, w21, #1
Lloh236:
	adrp	x9, _BNX2_HC_SB_CONFIG_SIZE@GOTPAGE
Lloh237:
	ldr	x9, [x9, _BNX2_HC_SB_CONFIG_SIZE@GOTPAGEOFF]
Lloh238:
	ldr	w9, [x9]
Lloh239:
	adrp	x10, _BNX2_HC_SB_CONFIG_1@GOTPAGE
Lloh240:
	ldr	x10, [x10, _BNX2_HC_SB_CONFIG_1@GOTPAGEOFF]
Lloh241:
	ldr	w10, [x10]
	madd	w20, w9, w8, w10
	ldr	w8, [x26]
	ldr	w9, [x27]
	orr	w8, w9, w8
	ldr	w9, [x28]
	orr	w2, w8, w9
	mov	x0, x19
	mov	x1, x20
	bl	_BNX2_WR
	ldr	w8, [x22]
	add	w1, w8, w20
	ldp	w8, w9, [x19, #20]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_BNX2_WR
	ldr	w8, [x23]
	add	w1, w8, w20
	ldp	w8, w9, [x19, #44]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_BNX2_WR
	ldr	w8, [x24]
	add	w1, w8, w20
	ldp	w8, w9, [x19, #28]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_BNX2_WR
	ldr	w8, [x25]
	add	w1, w8, w20
	ldp	w8, w9, [x19, #52]
	orr	w2, w9, w8, lsl #16
	mov	x0, x19
	bl	_BNX2_WR
	add	w21, w21, #1
	ldr	w8, [x19, #80]
	cmp	w21, w8
	b.lt	LBB0_35
LBB0_36:
Lloh242:
	adrp	x21, _BNX2_HC_COMMAND@GOTPAGE
Lloh243:
	ldr	x21, [x21, _BNX2_HC_COMMAND@GOTPAGEOFF]
	ldr	w1, [x21]
Lloh244:
	adrp	x8, _BNX2_HC_COMMAND_CLR_STAT_NOW@GOTPAGE
Lloh245:
	ldr	x8, [x8, _BNX2_HC_COMMAND_CLR_STAT_NOW@GOTPAGEOFF]
Lloh246:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_BNX2_WR
Lloh247:
	adrp	x8, _BNX2_HC_ATTN_BITS_ENABLE@GOTPAGE
Lloh248:
	ldr	x8, [x8, _BNX2_HC_ATTN_BITS_ENABLE@GOTPAGEOFF]
Lloh249:
	ldr	w1, [x8]
Lloh250:
	adrp	x8, _STATUS_ATTN_EVENTS@GOTPAGE
Lloh251:
	ldr	x8, [x8, _STATUS_ATTN_EVENTS@GOTPAGEOFF]
Lloh252:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_BNX2_WR
	ldr	x0, [x19, #96]
	bl	_bnx2_set_rx_mode
	mov	x0, x19
	bl	_BNX2_CHIP
Lloh253:
	adrp	x8, _BNX2_CHIP_5709@GOTPAGE
Lloh254:
	ldr	x8, [x8, _BNX2_CHIP_5709@GOTPAGEOFF]
Lloh255:
	ldr	x8, [x8]
	cmp	x0, x8
	b.ne	LBB0_38
; %bb.37:
Lloh256:
	adrp	x20, _BNX2_MISC_NEW_CORE_CTL@GOTPAGE
Lloh257:
	ldr	x20, [x20, _BNX2_MISC_NEW_CORE_CTL@GOTPAGEOFF]
	ldr	w1, [x20]
	mov	x0, x19
	bl	_BNX2_RD
Lloh258:
	adrp	x8, _BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE@GOTPAGE
Lloh259:
	ldr	x8, [x8, _BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE@GOTPAGEOFF]
Lloh260:
	ldr	w8, [x8]
	orr	w2, w8, w0
	ldr	w1, [x20]
	mov	x0, x19
	bl	_BNX2_WR
LBB0_38:
Lloh261:
	adrp	x8, _BNX2_DRV_MSG_DATA_WAIT2@GOTPAGE
Lloh262:
	ldr	x8, [x8, _BNX2_DRV_MSG_DATA_WAIT2@GOTPAGEOFF]
Lloh263:
	ldr	w8, [x8]
Lloh264:
	adrp	x9, _BNX2_DRV_MSG_CODE_RESET@GOTPAGE
Lloh265:
	ldr	x9, [x9, _BNX2_DRV_MSG_CODE_RESET@GOTPAGEOFF]
Lloh266:
	ldr	w9, [x9]
	orr	w1, w9, w8
	mov	x0, x19
	mov	w2, #1
	mov	w3, #0
	bl	_bnx2_fw_sync
	mov	x20, x0
Lloh267:
	adrp	x22, _BNX2_MISC_ENABLE_SET_BITS@GOTPAGE
Lloh268:
	ldr	x22, [x22, _BNX2_MISC_ENABLE_SET_BITS@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh269:
	adrp	x8, _BNX2_MISC_ENABLE_DEFAULT@GOTPAGE
Lloh270:
	ldr	x8, [x8, _BNX2_MISC_ENABLE_DEFAULT@GOTPAGEOFF]
Lloh271:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_BNX2_WR
	ldr	w1, [x22]
	mov	x0, x19
	bl	_BNX2_RD
	mov	w0, #20
	bl	_udelay
	ldr	w1, [x21]
	mov	x0, x19
	bl	_BNX2_RD
	str	x0, [x19, #88]
LBB0_39:
	mov	x0, x20
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh72, Lloh73, Lloh74
	.loh AdrpLdrGotLdr	Lloh129, Lloh130, Lloh131
	.loh AdrpLdrGotLdr	Lloh126, Lloh127, Lloh128
	.loh AdrpLdrGotLdr	Lloh123, Lloh124, Lloh125
	.loh AdrpLdrGotLdr	Lloh120, Lloh121, Lloh122
	.loh AdrpLdrGotLdr	Lloh117, Lloh118, Lloh119
	.loh AdrpLdrGotLdr	Lloh114, Lloh115, Lloh116
	.loh AdrpLdrGotLdr	Lloh111, Lloh112, Lloh113
	.loh AdrpLdrGotLdr	Lloh108, Lloh109, Lloh110
	.loh AdrpLdrGotLdr	Lloh104, Lloh105, Lloh107
	.loh AdrpLdrGotLdr	Lloh102, Lloh103, Lloh106
	.loh AdrpLdrGotLdr	Lloh99, Lloh100, Lloh101
	.loh AdrpLdr	Lloh97, Lloh98
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh84, Lloh85, Lloh86
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh75, Lloh76, Lloh77
	.loh AdrpLdrGotLdr	Lloh174, Lloh175, Lloh176
	.loh AdrpLdrGotLdr	Lloh171, Lloh172, Lloh173
	.loh AdrpLdrGotLdr	Lloh168, Lloh169, Lloh170
	.loh AdrpLdrGotLdr	Lloh165, Lloh166, Lloh167
	.loh AdrpLdrGotLdr	Lloh162, Lloh163, Lloh164
	.loh AdrpLdrGotLdr	Lloh159, Lloh160, Lloh161
	.loh AdrpLdrGotLdr	Lloh156, Lloh157, Lloh158
	.loh AdrpLdrGotLdr	Lloh153, Lloh154, Lloh155
	.loh AdrpLdrGotLdr	Lloh150, Lloh151, Lloh152
	.loh AdrpLdrGotLdr	Lloh147, Lloh148, Lloh149
	.loh AdrpLdrGotLdr	Lloh144, Lloh145, Lloh146
	.loh AdrpLdrGotLdr	Lloh141, Lloh142, Lloh143
	.loh AdrpLdrGotLdr	Lloh138, Lloh139, Lloh140
	.loh AdrpLdrGotLdr	Lloh135, Lloh136, Lloh137
	.loh AdrpLdrGotLdr	Lloh132, Lloh133, Lloh134
	.loh AdrpLdrGotLdr	Lloh180, Lloh181, Lloh182
	.loh AdrpLdrGotLdr	Lloh177, Lloh178, Lloh179
	.loh AdrpLdrGotLdr	Lloh183, Lloh184, Lloh185
	.loh AdrpLdrGotLdr	Lloh192, Lloh193, Lloh194
	.loh AdrpLdrGotLdr	Lloh189, Lloh190, Lloh191
	.loh AdrpLdrGotLdr	Lloh186, Lloh187, Lloh188
	.loh AdrpLdrGotLdr	Lloh195, Lloh196, Lloh197
	.loh AdrpLdrGotLdr	Lloh204, Lloh205, Lloh206
	.loh AdrpLdrGotLdr	Lloh201, Lloh202, Lloh203
	.loh AdrpLdrGotLdr	Lloh198, Lloh199, Lloh200
	.loh AdrpLdrGotLdr	Lloh219, Lloh220, Lloh221
	.loh AdrpLdrGotLdr	Lloh216, Lloh217, Lloh218
	.loh AdrpLdrGotLdr	Lloh213, Lloh214, Lloh215
	.loh AdrpLdrGotLdr	Lloh209, Lloh210, Lloh212
	.loh AdrpLdrGotLdr	Lloh207, Lloh208, Lloh211
	.loh AdrpLdrGot	Lloh234, Lloh235
	.loh AdrpLdrGot	Lloh232, Lloh233
	.loh AdrpLdrGot	Lloh230, Lloh231
	.loh AdrpLdrGot	Lloh228, Lloh229
	.loh AdrpLdrGot	Lloh226, Lloh227
	.loh AdrpLdrGot	Lloh224, Lloh225
	.loh AdrpLdrGot	Lloh222, Lloh223
	.loh AdrpLdrGotLdr	Lloh239, Lloh240, Lloh241
	.loh AdrpLdrGotLdr	Lloh236, Lloh237, Lloh238
	.loh AdrpLdrGotLdr	Lloh253, Lloh254, Lloh255
	.loh AdrpLdrGotLdr	Lloh250, Lloh251, Lloh252
	.loh AdrpLdrGotLdr	Lloh247, Lloh248, Lloh249
	.loh AdrpLdrGotLdr	Lloh244, Lloh245, Lloh246
	.loh AdrpLdrGot	Lloh242, Lloh243
	.loh AdrpLdrGotLdr	Lloh258, Lloh259, Lloh260
	.loh AdrpLdrGot	Lloh256, Lloh257
	.loh AdrpLdrGotLdr	Lloh269, Lloh270, Lloh271
	.loh AdrpLdrGot	Lloh267, Lloh268
	.loh AdrpLdrGotLdr	Lloh264, Lloh265, Lloh266
	.loh AdrpLdrGotLdr	Lloh261, Lloh262, Lloh263
	.cfi_endproc
                                        ; -- End function
	.comm	_BNX2_PCICFG_INT_ACK_CMD,4,2    ; @BNX2_PCICFG_INT_ACK_CMD
	.comm	_BNX2_PCICFG_INT_ACK_CMD_MASK_INT,4,2 ; @BNX2_PCICFG_INT_ACK_CMD_MASK_INT
	.comm	_BNX2_DMA_CONFIG_DATA_BYTE_SWAP,4,2 ; @BNX2_DMA_CONFIG_DATA_BYTE_SWAP
	.comm	_BNX2_DMA_CONFIG_DATA_WORD_SWAP,4,2 ; @BNX2_DMA_CONFIG_DATA_WORD_SWAP
	.comm	_BNX2_DMA_CONFIG_CNTL_WORD_SWAP,4,2 ; @BNX2_DMA_CONFIG_CNTL_WORD_SWAP
	.comm	_DMA_READ_CHANS,4,2             ; @DMA_READ_CHANS
	.comm	_DMA_WRITE_CHANS,4,2            ; @DMA_WRITE_CHANS
	.comm	_BNX2_FLAG_PCIX,4,2             ; @BNX2_FLAG_PCIX
	.comm	_BNX2_CHIP_5706,8,3             ; @BNX2_CHIP_5706
	.comm	_BNX2_CHIP_ID_5706_A0,8,3       ; @BNX2_CHIP_ID_5706_A0
	.comm	_BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA,4,2 ; @BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA
	.comm	_BNX2_DMA_CONFIG,4,2            ; @BNX2_DMA_CONFIG
	.comm	_BNX2_TDMA_CONFIG,4,2           ; @BNX2_TDMA_CONFIG
	.comm	_BNX2_TDMA_CONFIG_ONE_DMA,4,2   ; @BNX2_TDMA_CONFIG_ONE_DMA
	.comm	_PCI_X_CMD,8,3                  ; @PCI_X_CMD
	.comm	_PCI_X_CMD_ERO,4,2              ; @PCI_X_CMD_ERO
	.comm	_BNX2_MISC_ENABLE_SET_BITS,4,2  ; @BNX2_MISC_ENABLE_SET_BITS
	.comm	_BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE,4,2 ; @BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE
	.comm	_BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE,4,2 ; @BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE
	.comm	_BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE,4,2 ; @BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE
	.comm	_BNX2_CHIP_5709,8,3             ; @BNX2_CHIP_5709
	.comm	_BNX2_MQ_CONFIG,4,2             ; @BNX2_MQ_CONFIG
	.comm	_BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE,4,2 ; @BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE
	.comm	_BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256,4,2 ; @BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256
	.comm	_BNX2_MQ_CONFIG_BIN_MQ_MODE,4,2 ; @BNX2_MQ_CONFIG_BIN_MQ_MODE
	.comm	_BNX2_CHIP_REV_Ax,8,3           ; @BNX2_CHIP_REV_Ax
	.comm	_BNX2_MQ_CONFIG_HALT_DIS,4,2    ; @BNX2_MQ_CONFIG_HALT_DIS
	.comm	_MAX_CID_CNT,4,2                ; @MAX_CID_CNT
	.comm	_MB_KERNEL_CTX_SIZE,4,2         ; @MB_KERNEL_CTX_SIZE
	.comm	_BNX2_MQ_KNL_BYP_WIND_START,4,2 ; @BNX2_MQ_KNL_BYP_WIND_START
	.comm	_BNX2_MQ_KNL_WIND_END,4,2       ; @BNX2_MQ_KNL_WIND_END
	.comm	_BNX2_PAGE_BITS,4,2             ; @BNX2_PAGE_BITS
	.comm	_BNX2_RV2P_CONFIG,4,2           ; @BNX2_RV2P_CONFIG
	.comm	_BNX2_TBDR_CONFIG,4,2           ; @BNX2_TBDR_CONFIG
	.comm	_BNX2_TBDR_CONFIG_PAGE_SIZE,4,2 ; @BNX2_TBDR_CONFIG_PAGE_SIZE
	.comm	_BNX2_EMAC_BACKOFF_SEED,4,2     ; @BNX2_EMAC_BACKOFF_SEED
	.comm	_ETH_HLEN,4,2                   ; @ETH_HLEN
	.comm	_ETH_FCS_LEN,4,2                ; @ETH_FCS_LEN
	.comm	_MAX_ETHERNET_PACKET_SIZE,4,2   ; @MAX_ETHERNET_PACKET_SIZE
	.comm	_BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA,4,2 ; @BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA
	.comm	_BNX2_EMAC_RX_MTU_SIZE,4,2      ; @BNX2_EMAC_RX_MTU_SIZE
	.comm	_ETH_DATA_LEN,4,2               ; @ETH_DATA_LEN
	.comm	_BNX2_RBUF_CONFIG,4,2           ; @BNX2_RBUF_CONFIG
	.comm	_BNX2_RBUF_CONFIG2,4,2          ; @BNX2_RBUF_CONFIG2
	.comm	_BNX2_RBUF_CONFIG3,4,2          ; @BNX2_RBUF_CONFIG3
	.comm	_BNX2_MAX_MSIX_VEC,4,2          ; @BNX2_MAX_MSIX_VEC
	.comm	_BNX2_EMAC_ATTENTION_ENA,4,2    ; @BNX2_EMAC_ATTENTION_ENA
	.comm	_BNX2_EMAC_ATTENTION_ENA_LINK,4,2 ; @BNX2_EMAC_ATTENTION_ENA_LINK
	.comm	_BNX2_HC_STATUS_ADDR_L,4,2      ; @BNX2_HC_STATUS_ADDR_L
	.comm	_BNX2_HC_STATUS_ADDR_H,4,2      ; @BNX2_HC_STATUS_ADDR_H
	.comm	_BNX2_HC_STATISTICS_ADDR_L,4,2  ; @BNX2_HC_STATISTICS_ADDR_L
	.comm	_BNX2_HC_STATISTICS_ADDR_H,4,2  ; @BNX2_HC_STATISTICS_ADDR_H
	.comm	_BNX2_HC_TX_QUICK_CONS_TRIP,4,2 ; @BNX2_HC_TX_QUICK_CONS_TRIP
	.comm	_BNX2_HC_RX_QUICK_CONS_TRIP,4,2 ; @BNX2_HC_RX_QUICK_CONS_TRIP
	.comm	_BNX2_HC_COMP_PROD_TRIP,4,2     ; @BNX2_HC_COMP_PROD_TRIP
	.comm	_BNX2_HC_TX_TICKS,4,2           ; @BNX2_HC_TX_TICKS
	.comm	_BNX2_HC_RX_TICKS,4,2           ; @BNX2_HC_RX_TICKS
	.comm	_BNX2_HC_COM_TICKS,4,2          ; @BNX2_HC_COM_TICKS
	.comm	_BNX2_HC_CMD_TICKS,4,2          ; @BNX2_HC_CMD_TICKS
	.comm	_BNX2_FLAG_BROKEN_STATS,4,2     ; @BNX2_FLAG_BROKEN_STATS
	.comm	_BNX2_HC_STATS_TICKS,4,2        ; @BNX2_HC_STATS_TICKS
	.comm	_BNX2_HC_STAT_COLLECT_TICKS,4,2 ; @BNX2_HC_STAT_COLLECT_TICKS
	.comm	_BNX2_CHIP_ID_5706_A1,8,3       ; @BNX2_CHIP_ID_5706_A1
	.comm	_BNX2_HC_CONFIG_COLLECT_STATS,4,2 ; @BNX2_HC_CONFIG_COLLECT_STATS
	.comm	_BNX2_HC_CONFIG_RX_TMR_MODE,4,2 ; @BNX2_HC_CONFIG_RX_TMR_MODE
	.comm	_BNX2_HC_CONFIG_TX_TMR_MODE,4,2 ; @BNX2_HC_CONFIG_TX_TMR_MODE
	.comm	_BNX2_FLAG_USING_MSIX,4,2       ; @BNX2_FLAG_USING_MSIX
	.comm	_BNX2_HC_MSIX_BIT_VECTOR,4,2    ; @BNX2_HC_MSIX_BIT_VECTOR
	.comm	_BNX2_HC_MSIX_BIT_VECTOR_VAL,4,2 ; @BNX2_HC_MSIX_BIT_VECTOR_VAL
	.comm	_BNX2_HC_CONFIG_SB_ADDR_INC_128B,4,2 ; @BNX2_HC_CONFIG_SB_ADDR_INC_128B
	.comm	_BNX2_FLAG_ONE_SHOT_MSI,4,2     ; @BNX2_FLAG_ONE_SHOT_MSI
	.comm	_BNX2_HC_CONFIG_ONE_SHOT,4,2    ; @BNX2_HC_CONFIG_ONE_SHOT
	.comm	_BNX2_HC_CONFIG_USE_INT_PARAM,4,2 ; @BNX2_HC_CONFIG_USE_INT_PARAM
	.comm	_BNX2_HC_CONFIG,4,2             ; @BNX2_HC_CONFIG
	.comm	_BNX2_FW_RX_LOW_LATENCY,4,2     ; @BNX2_FW_RX_LOW_LATENCY
	.comm	_BNX2_HC_SB_CONFIG_SIZE,4,2     ; @BNX2_HC_SB_CONFIG_SIZE
	.comm	_BNX2_HC_SB_CONFIG_1,4,2        ; @BNX2_HC_SB_CONFIG_1
	.comm	_BNX2_HC_SB_CONFIG_1_TX_TMR_MODE,4,2 ; @BNX2_HC_SB_CONFIG_1_TX_TMR_MODE
	.comm	_BNX2_HC_SB_CONFIG_1_RX_TMR_MODE,4,2 ; @BNX2_HC_SB_CONFIG_1_RX_TMR_MODE
	.comm	_BNX2_HC_SB_CONFIG_1_ONE_SHOT,4,2 ; @BNX2_HC_SB_CONFIG_1_ONE_SHOT
	.comm	_BNX2_HC_TX_QUICK_CONS_TRIP_OFF,4,2 ; @BNX2_HC_TX_QUICK_CONS_TRIP_OFF
	.comm	_BNX2_HC_TX_TICKS_OFF,4,2       ; @BNX2_HC_TX_TICKS_OFF
	.comm	_BNX2_HC_RX_QUICK_CONS_TRIP_OFF,4,2 ; @BNX2_HC_RX_QUICK_CONS_TRIP_OFF
	.comm	_BNX2_HC_RX_TICKS_OFF,4,2       ; @BNX2_HC_RX_TICKS_OFF
	.comm	_BNX2_HC_COMMAND,4,2            ; @BNX2_HC_COMMAND
	.comm	_BNX2_HC_COMMAND_CLR_STAT_NOW,4,2 ; @BNX2_HC_COMMAND_CLR_STAT_NOW
	.comm	_BNX2_HC_ATTN_BITS_ENABLE,4,2   ; @BNX2_HC_ATTN_BITS_ENABLE
	.comm	_STATUS_ATTN_EVENTS,4,2         ; @STATUS_ATTN_EVENTS
	.comm	_BNX2_MISC_NEW_CORE_CTL,4,2     ; @BNX2_MISC_NEW_CORE_CTL
	.comm	_BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE,4,2 ; @BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE
	.comm	_BNX2_DRV_MSG_DATA_WAIT2,4,2    ; @BNX2_DRV_MSG_DATA_WAIT2
	.comm	_BNX2_DRV_MSG_CODE_RESET,4,2    ; @BNX2_DRV_MSG_CODE_RESET
	.comm	_BNX2_MISC_ENABLE_DEFAULT,4,2   ; @BNX2_MISC_ENABLE_DEFAULT
	.comm	_BNX2_DMA_CONFIG_CNTL_BYTE_SWAP,4,2 ; @BNX2_DMA_CONFIG_CNTL_BYTE_SWAP
	.no_dead_strip	_bnx2_init_chip
.subsections_via_symbols
