	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ezx_pcap_write                 ## -- Begin function ezx_pcap_write
	.p2align	4, 0x90
_ezx_pcap_write:                        ## @ezx_pcap_write
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ebx
	movl	%esi, %r14d
	movq	%rdi, %r15
	callq	_spin_lock_irqsave
	movq	_PCAP_REGISTER_VALUE_MASK@GOTPCREL(%rip), %rax
	andl	(%rax), %ebx
	movq	_PCAP_REGISTER_WRITE_OP_BIT@GOTPCREL(%rip), %rax
	movq	_PCAP_REGISTER_ADDRESS_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r14d
	orl	(%rax), %ebx
	orl	%r14d, %ebx
	movl	%ebx, -28(%rbp)
	leaq	-28(%rbp), %rsi
	movq	%r15, %rdi
	callq	_ezx_pcap_putget
	movl	%eax, %ebx
	movq	%r15, %rdi
	callq	_spin_unlock_irqrestore
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCAP_REGISTER_VALUE_MASK,4,2   ## @PCAP_REGISTER_VALUE_MASK
	.comm	_PCAP_REGISTER_WRITE_OP_BIT,4,2 ## @PCAP_REGISTER_WRITE_OP_BIT
	.comm	_PCAP_REGISTER_ADDRESS_SHIFT,4,2 ## @PCAP_REGISTER_ADDRESS_SHIFT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_ezx_pcap_write                 ; -- Begin function ezx_pcap_write
	.p2align	2
_ezx_pcap_write:                        ; @ezx_pcap_write
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x2
	mov	x20, x1
	mov	x21, x0
	bl	_spin_lock_irqsave
Lloh0:
	adrp	x8, _PCAP_REGISTER_VALUE_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCAP_REGISTER_VALUE_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	and	w8, w8, w19
Lloh3:
	adrp	x9, _PCAP_REGISTER_WRITE_OP_BIT@GOTPAGE
Lloh4:
	ldr	x9, [x9, _PCAP_REGISTER_WRITE_OP_BIT@GOTPAGEOFF]
Lloh5:
	adrp	x10, _PCAP_REGISTER_ADDRESS_SHIFT@GOTPAGE
Lloh6:
	ldr	x10, [x10, _PCAP_REGISTER_ADDRESS_SHIFT@GOTPAGEOFF]
Lloh7:
	ldr	w9, [x9]
Lloh8:
	ldr	w10, [x10]
	lsl	w10, w20, w10
	orr	w8, w9, w8
	orr	w8, w8, w10
	str	w8, [sp, #12]
	add	x1, sp, #12
	mov	x0, x21
	bl	_ezx_pcap_putget
	mov	x19, x0
	mov	x0, x21
	bl	_spin_unlock_irqrestore
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PCAP_REGISTER_VALUE_MASK,4,2   ; @PCAP_REGISTER_VALUE_MASK
	.comm	_PCAP_REGISTER_WRITE_OP_BIT,4,2 ; @PCAP_REGISTER_WRITE_OP_BIT
	.comm	_PCAP_REGISTER_ADDRESS_SHIFT,4,2 ; @PCAP_REGISTER_ADDRESS_SHIFT
.subsections_via_symbols
