	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mt9t112_set_pll_dividers
_mt9t112_set_pll_dividers:              ## @mt9t112_set_pll_dividers
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r9d, %r12d
	movl	%r8d, %r13d
	movl	%ecx, %ebx
	movl	%edx, %r8d
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	movl	40(%rbp), %eax
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	16(%rbp), %r14d
	movl	24(%rbp), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movl	32(%rbp), %r15d
	shll	$8, %r8d
	orl	%esi, %r8d
	movq	%rdi, %rsi
	movl	$16, %edx
	movl	$16383, %ecx                    ## imm = 0x3FFF
	callq	_mt9t112_reg_mask_set
	andl	$15, %r12d
	shll	$8, %r12d
	shll	$4, %r13d
	movzbl	%r13b, %eax
	andl	$15, %ebx
	orl	%eax, %ebx
	orl	%r12d, %ebx
	movq	-56(%rbp), %r12                 ## 8-byte Reload
	movq	%r12, %rsi
	movl	$18, %edx
	movl	$4095, %ecx                     ## imm = 0xFFF
	movl	%ebx, %r8d
	callq	_mt9t112_reg_mask_set
	andl	$15, %r15d
	shll	$8, %r15d
	movl	-44(%rbp), %eax                 ## 4-byte Reload
	shll	$4, %eax
	movzbl	%al, %eax
	andl	$15, %r14d
	orl	%eax, %r14d
	leal	(%r15,%r14), %r8d
	addl	$28672, %r8d                    ## imm = 0x7000
	movq	%r12, %rsi
	movl	$42, %edx
	movl	$32767, %ecx                    ## imm = 0x7FFF
	callq	_mt9t112_reg_mask_set
	movl	-48(%rbp), %r8d                 ## 4-byte Reload
	andl	$15, %r8d
	orl	$4096, %r8d                     ## imm = 0x1000
	movq	%r12, %rsi
	movl	$44, %edx
	movl	$4111, %ecx                     ## imm = 0x100F
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mt9t112_reg_mask_set           ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.no_dead_strip	_mt9t112_set_pll_dividers
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mt9t112_set_pll_dividers
_mt9t112_set_pll_dividers:              ; @mt9t112_set_pll_dividers
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x7
	mov	x20, x6
	mov	x21, x5
	mov	x22, x4
	mov	x23, x3
	mov	x24, x0
	ldp	w26, w25, [x29, #16]
	orr	w4, w1, w2, lsl #8
	mov	x1, x0
	mov	w2, #16
	mov	w3, #16383
	bl	_mt9t112_reg_mask_set
	and	w4, w23, #0xf
	bfi	w4, w22, #4, #4
	bfi	w4, w21, #8, #4
	mov	x1, x24
	mov	w2, #18
	mov	w3, #4095
	bl	_mt9t112_reg_mask_set
	and	w8, w20, #0xf
	bfi	w8, w19, #4, #4
	bfi	w8, w26, #8, #4
	orr	w4, w8, #0x7000
	mov	x1, x24
	mov	w2, #42
	mov	w3, #32767
	bl	_mt9t112_reg_mask_set
	mov	w4, #4096
	bfxil	w4, w25, #0, #4
	mov	x1, x24
	mov	w2, #44
	mov	w3, #4111
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_mt9t112_reg_mask_set
	.cfi_endproc
                                        ; -- End function
	.no_dead_strip	_mt9t112_set_pll_dividers
.subsections_via_symbols
