	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mmc_davinci_set_ios
_mmc_davinci_set_ios:                   ## @mmc_davinci_set_ios
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r15
	callq	_mmc_priv
	movq	%rax, %r14
	movl	(%r15), %edi
	callq	_to_platform_device
	movq	%rax, %r12
	movq	8(%rax), %r13
	movl	(%r14), %edi
	callq	_mmc_dev
	movl	16(%rbx), %edx
	movl	(%rbx), %r8d
	movl	8(%rbx), %ecx
	movl	12(%rbx), %r9d
	leaq	L_.str(%rip), %rsi
	movl	%eax, %edi
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	(%rbx), %eax
	cmpl	$128, %eax
	je	LBB0_5
## %bb.1:
	cmpl	$129, %eax
	jne	LBB0_9
## %bb.2:
	testq	%r13, %r13
	je	LBB0_9
## %bb.3:
	movq	(%r13), %rax
	testq	%rax, %rax
	je	LBB0_9
## %bb.4:
	movl	(%r12), %edi
	xorl	%esi, %esi
	jmp	LBB0_8
LBB0_5:
	testq	%r13, %r13
	je	LBB0_9
## %bb.6:
	movq	(%r13), %rax
	testq	%rax, %rax
	je	LBB0_9
## %bb.7:
	movl	(%r12), %edi
	movl	$1, %esi
LBB0_8:
	callq	*%rax
LBB0_9:
	movl	4(%rbx), %eax
	cmpl	$132, %eax
	je	LBB0_16
## %bb.10:
	cmpl	$131, %eax
	je	LBB0_13
## %bb.11:
	cmpl	$130, %eax
	jne	LBB0_20
## %bb.12:
	movl	(%r14), %edi
	callq	_mmc_dev
	leaq	L_.str.1(%rip), %rsi
	movl	%eax, %edi
	xorl	%eax, %eax
	callq	_dev_dbg
	movq	%r14, %r12
	addq	$8, %r12
	movq	_DAVINCI_MMCCTL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	8(%r14), %rdi
	callq	_readl
	movq	_MMCCTL_WIDTH_4_BIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	notl	%edi
	andl	%eax, %edi
	movq	_MMCCTL_WIDTH_8_BIT@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	jmp	LBB0_19
LBB0_13:
	movl	(%r14), %edi
	callq	_mmc_dev
	leaq	L_.str.2(%rip), %rsi
	movl	%eax, %edi
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	20(%r14), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_MMC_CTLR_VERSION_2@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	%r14, %r12
	addq	$8, %r12
	movq	_DAVINCI_MMCCTL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	8(%r14), %rdi
	callq	_readl
	movl	%eax, %edi
	cmpl	%r13d, -44(%rbp)                ## 4-byte Folded Reload
	jne	LBB0_15
## %bb.14:
	movq	_MMCCTL_WIDTH_8_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %edi
LBB0_15:
	movq	_MMCCTL_WIDTH_4_BIT@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	jmp	LBB0_19
LBB0_16:
	movl	(%r14), %edi
	callq	_mmc_dev
	leaq	L_.str.3(%rip), %rsi
	movl	%eax, %edi
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	20(%r14), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_MMC_CTLR_VERSION_2@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	%r14, %r12
	addq	$8, %r12
	movq	_DAVINCI_MMCCTL@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	addq	8(%r14), %rdi
	callq	_readl
	movl	%eax, %edi
	cmpl	%r13d, -44(%rbp)                ## 4-byte Folded Reload
	jne	LBB0_18
## %bb.17:
	movq	_MMCCTL_WIDTH_8_BIT@GOTPCREL(%rip), %rax
	movq	_MMCCTL_WIDTH_4_BIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	notl	%ecx
	andl	%ecx, %edi
	jmp	LBB0_19
LBB0_18:
	movq	_MMCCTL_WIDTH_4_BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %edi
LBB0_19:
	movq	_DAVINCI_MMCCTL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%r12), %rsi
	callq	_writel
LBB0_20:
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_calculate_clk_divider
	movl	8(%rbx), %eax
	movl	%eax, 16(%r14)
	cmpl	$128, (%rbx)
	jne	LBB0_26
## %bb.21:
	movq	_jiffies@GOTPCREL(%rip), %r15
	movq	(%r15), %r12
	movl	$50, %edi
	callq	_msecs_to_jiffies
	movq	%rax, %rbx
	addq	%r12, %rbx
	movq	_DAVINCI_MMCARGHL@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	8(%r14), %rsi
	xorl	%edi, %edi
	callq	_writel
	movq	_MMCCMD_INITCK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_DAVINCI_MMCCMD@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	8(%r14), %rsi
	callq	_writel
	movq	(%r15), %rdi
	movq	%rbx, %rsi
	callq	_time_before
	testq	%rax, %rax
	je	LBB0_25
## %bb.22:
	movq	_DAVINCI_MMCST0@GOTPCREL(%rip), %r12
	movq	_MMCST0_RSPDNE@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_23:                                ## =>This Inner Loop Header: Depth=1
	movq	(%r12), %rdi
	addq	8(%r14), %rdi
	callq	_readl
	testl	%eax, (%r13)
	jne	LBB0_26
## %bb.24:                              ##   in Loop: Header=BB0_23 Depth=1
	xorl	%eax, %eax
	callq	_cpu_relax
	movq	(%r15), %rdi
	movq	%rbx, %rsi
	callq	_time_before
	testq	%rax, %rax
	jne	LBB0_23
LBB0_25:
	movl	(%r14), %edi
	callq	_mmc_dev
	leaq	L_.str.4(%rip), %rsi
	movl	%eax, %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_warn                       ## TAILCALL
LBB0_26:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"clock %dHz busmode %d powermode %d Vdd %04x\n"

L_.str.1:                               ## @.str.1
	.asciz	"Enabling 8 bit mode\n"

	.comm	_DAVINCI_MMCCTL,8,3             ## @DAVINCI_MMCCTL
	.comm	_MMCCTL_WIDTH_4_BIT,4,2         ## @MMCCTL_WIDTH_4_BIT
	.comm	_MMCCTL_WIDTH_8_BIT,4,2         ## @MMCCTL_WIDTH_8_BIT
L_.str.2:                               ## @.str.2
	.asciz	"Enabling 4 bit mode\n"

	.comm	_MMC_CTLR_VERSION_2,4,2         ## @MMC_CTLR_VERSION_2
L_.str.3:                               ## @.str.3
	.asciz	"Enabling 1 bit mode\n"

	.comm	_jiffies,8,3                    ## @jiffies
	.comm	_DAVINCI_MMCARGHL,8,3           ## @DAVINCI_MMCARGHL
	.comm	_MMCCMD_INITCK,4,2              ## @MMCCMD_INITCK
	.comm	_DAVINCI_MMCCMD,8,3             ## @DAVINCI_MMCCMD
	.comm	_DAVINCI_MMCST0,8,3             ## @DAVINCI_MMCST0
	.comm	_MMCST0_RSPDNE,4,2              ## @MMCST0_RSPDNE
L_.str.4:                               ## @.str.4
	.asciz	"powerup timeout\n"

	.no_dead_strip	_mmc_davinci_set_ios
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mmc_davinci_set_ios
_mmc_davinci_set_ios:                   ; @mmc_davinci_set_ios
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x1
	mov	x21, x0
	bl	_mmc_priv
	mov	x19, x0
	ldr	w0, [x21]
	bl	_to_platform_device
	mov	x22, x0
	ldr	x23, [x0, #8]
	ldr	w0, [x19]
	bl	_mmc_dev
	ldp	w11, w8, [x20, #12]
	ldr	w9, [x20]
	ldr	w10, [x20, #8]
	stp	x9, x11, [sp, #16]
	stp	x8, x10, [sp]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_dbg
	ldr	w8, [x20]
	cmp	w8, #128
	b.eq	LBB0_5
; %bb.1:
	cmp	w8, #129
	b.ne	LBB0_9
; %bb.2:
	cbz	x23, LBB0_9
; %bb.3:
	ldr	x8, [x23]
	cbz	x8, LBB0_9
; %bb.4:
	ldr	w0, [x22]
	mov	w1, #0
	b	LBB0_8
LBB0_5:
	cbz	x23, LBB0_9
; %bb.6:
	ldr	x8, [x23]
	cbz	x8, LBB0_9
; %bb.7:
	ldr	w0, [x22]
	mov	w1, #1
LBB0_8:
	blr	x8
LBB0_9:
	ldr	w8, [x20, #4]
Lloh2:
	adrp	x22, _DAVINCI_MMCCTL@GOTPAGE
Lloh3:
	ldr	x22, [x22, _DAVINCI_MMCCTL@GOTPAGEOFF]
	cmp	w8, #132
	b.eq	LBB0_16
; %bb.10:
	cmp	w8, #131
	b.eq	LBB0_13
; %bb.11:
	cmp	w8, #130
	b.ne	LBB0_22
; %bb.12:
	ldr	w0, [x19]
	bl	_mmc_dev
Lloh4:
	adrp	x1, l_.str.1@PAGE
Lloh5:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_dbg
	mov	x23, x19
	ldr	x8, [x23, #8]!
	ldr	x9, [x22]
	add	x0, x9, x8
	bl	_readl
Lloh6:
	adrp	x8, _MMCCTL_WIDTH_4_BIT@GOTPAGE
Lloh7:
	ldr	x8, [x8, _MMCCTL_WIDTH_4_BIT@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh9:
	adrp	x9, _MMCCTL_WIDTH_8_BIT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _MMCCTL_WIDTH_8_BIT@GOTPAGEOFF]
	b	LBB0_15
LBB0_13:
	ldr	w0, [x19]
	bl	_mmc_dev
Lloh11:
	adrp	x1, l_.str.2@PAGE
Lloh12:
	add	x1, x1, l_.str.2@PAGEOFF
	bl	_dev_dbg
	mov	x23, x19
	ldr	x8, [x23, #8]!
	ldr	w24, [x23, #12]
Lloh13:
	adrp	x9, _MMC_CTLR_VERSION_2@GOTPAGE
Lloh14:
	ldr	x9, [x9, _MMC_CTLR_VERSION_2@GOTPAGEOFF]
Lloh15:
	ldr	w25, [x9]
	ldr	x9, [x22]
	add	x0, x9, x8
	bl	_readl
	cmp	w24, w25
	b.ne	LBB0_18
; %bb.14:
Lloh16:
	adrp	x8, _MMCCTL_WIDTH_8_BIT@GOTPAGE
Lloh17:
	ldr	x8, [x8, _MMCCTL_WIDTH_8_BIT@GOTPAGEOFF]
Lloh18:
	ldr	w8, [x8]
	bic	w8, w0, w8
Lloh19:
	adrp	x9, _MMCCTL_WIDTH_4_BIT@GOTPAGE
Lloh20:
	ldr	x9, [x9, _MMCCTL_WIDTH_4_BIT@GOTPAGEOFF]
LBB0_15:
	ldr	w9, [x9]
	orr	w0, w8, w9
	b	LBB0_21
LBB0_16:
	ldr	w0, [x19]
	bl	_mmc_dev
Lloh21:
	adrp	x1, l_.str.3@PAGE
Lloh22:
	add	x1, x1, l_.str.3@PAGEOFF
	bl	_dev_dbg
	mov	x23, x19
	ldr	x8, [x23, #8]!
	ldr	w24, [x23, #12]
Lloh23:
	adrp	x9, _MMC_CTLR_VERSION_2@GOTPAGE
Lloh24:
	ldr	x9, [x9, _MMC_CTLR_VERSION_2@GOTPAGEOFF]
Lloh25:
	ldr	w25, [x9]
	ldr	x9, [x22]
	add	x0, x9, x8
	bl	_readl
	cmp	w24, w25
	b.ne	LBB0_19
; %bb.17:
Lloh26:
	adrp	x8, _MMCCTL_WIDTH_8_BIT@GOTPAGE
Lloh27:
	ldr	x8, [x8, _MMCCTL_WIDTH_8_BIT@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
Lloh29:
	adrp	x9, _MMCCTL_WIDTH_4_BIT@GOTPAGE
Lloh30:
	ldr	x9, [x9, _MMCCTL_WIDTH_4_BIT@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	orr	w8, w9, w8
	b	LBB0_20
LBB0_18:
Lloh32:
	adrp	x8, _MMCCTL_WIDTH_4_BIT@GOTPAGE
Lloh33:
	ldr	x8, [x8, _MMCCTL_WIDTH_4_BIT@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	orr	w0, w8, w0
	b	LBB0_21
LBB0_19:
Lloh35:
	adrp	x8, _MMCCTL_WIDTH_4_BIT@GOTPAGE
Lloh36:
	ldr	x8, [x8, _MMCCTL_WIDTH_4_BIT@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
LBB0_20:
	bic	w0, w0, w8
LBB0_21:
	ldr	x8, [x23]
	ldr	x9, [x22]
	add	x1, x9, x8
	bl	_writel
LBB0_22:
	mov	x0, x21
	mov	x1, x20
	bl	_calculate_clk_divider
	ldr	w8, [x20, #8]
	str	w8, [x19, #16]
	ldr	w8, [x20]
	cmp	w8, #128
	b.ne	LBB0_28
; %bb.23:
Lloh38:
	adrp	x21, _jiffies@GOTPAGE
Lloh39:
	ldr	x21, [x21, _jiffies@GOTPAGEOFF]
	ldr	x20, [x21]
	mov	w0, #50
	bl	_msecs_to_jiffies
	add	x20, x0, x20
	ldr	x8, [x19, #8]
Lloh40:
	adrp	x9, _DAVINCI_MMCARGHL@GOTPAGE
Lloh41:
	ldr	x9, [x9, _DAVINCI_MMCARGHL@GOTPAGEOFF]
Lloh42:
	ldr	x9, [x9]
	add	x1, x9, x8
	mov	w0, #0
	bl	_writel
Lloh43:
	adrp	x8, _MMCCMD_INITCK@GOTPAGE
Lloh44:
	ldr	x8, [x8, _MMCCMD_INITCK@GOTPAGEOFF]
Lloh45:
	ldr	w0, [x8]
	ldr	x8, [x19, #8]
Lloh46:
	adrp	x9, _DAVINCI_MMCCMD@GOTPAGE
Lloh47:
	ldr	x9, [x9, _DAVINCI_MMCCMD@GOTPAGEOFF]
Lloh48:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel
	ldr	x0, [x21]
	mov	x1, x20
	bl	_time_before
	cbz	x0, LBB0_27
; %bb.24:
Lloh49:
	adrp	x22, _DAVINCI_MMCST0@GOTPAGE
Lloh50:
	ldr	x22, [x22, _DAVINCI_MMCST0@GOTPAGEOFF]
Lloh51:
	adrp	x23, _MMCST0_RSPDNE@GOTPAGE
Lloh52:
	ldr	x23, [x23, _MMCST0_RSPDNE@GOTPAGEOFF]
LBB0_25:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x19, #8]
	ldr	x9, [x22]
	add	x0, x9, x8
	bl	_readl
	ldr	w8, [x23]
	tst	w8, w0
	b.ne	LBB0_28
; %bb.26:                               ;   in Loop: Header=BB0_25 Depth=1
	bl	_cpu_relax
	ldr	x0, [x21]
	mov	x1, x20
	bl	_time_before
	cbnz	x0, LBB0_25
LBB0_27:
	ldr	w0, [x19]
	bl	_mmc_dev
Lloh53:
	adrp	x1, l_.str.4@PAGE
Lloh54:
	add	x1, x1, l_.str.4@PAGEOFF
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_dev_warn
LBB0_28:
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGot	Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpAdd	Lloh53, Lloh54
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"clock %dHz busmode %d powermode %d Vdd %04x\n"

l_.str.1:                               ; @.str.1
	.asciz	"Enabling 8 bit mode\n"

	.comm	_DAVINCI_MMCCTL,8,3             ; @DAVINCI_MMCCTL
	.comm	_MMCCTL_WIDTH_4_BIT,4,2         ; @MMCCTL_WIDTH_4_BIT
	.comm	_MMCCTL_WIDTH_8_BIT,4,2         ; @MMCCTL_WIDTH_8_BIT
l_.str.2:                               ; @.str.2
	.asciz	"Enabling 4 bit mode\n"

	.comm	_MMC_CTLR_VERSION_2,4,2         ; @MMC_CTLR_VERSION_2
l_.str.3:                               ; @.str.3
	.asciz	"Enabling 1 bit mode\n"

	.comm	_jiffies,8,3                    ; @jiffies
	.comm	_DAVINCI_MMCARGHL,8,3           ; @DAVINCI_MMCARGHL
	.comm	_MMCCMD_INITCK,4,2              ; @MMCCMD_INITCK
	.comm	_DAVINCI_MMCCMD,8,3             ; @DAVINCI_MMCCMD
	.comm	_DAVINCI_MMCST0,8,3             ; @DAVINCI_MMCST0
	.comm	_MMCST0_RSPDNE,4,2              ; @MMCST0_RSPDNE
l_.str.4:                               ; @.str.4
	.asciz	"powerup timeout\n"

	.no_dead_strip	_mmc_davinci_set_ios
.subsections_via_symbols
