	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_lio_cn6xxx_setup_global_input_regs ## -- Begin function lio_cn6xxx_setup_global_input_regs
	.p2align	4, 0x90
_lio_cn6xxx_setup_global_input_regs:    ## @lio_cn6xxx_setup_global_input_regs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	_CN6XXX_SLI_PKT_INPUT_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CN6XXX_INPUT_CTL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_octeon_write_csr
	movq	_CN6XXX_SLI_PKT_INSTR_RD_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$-1, %edx
	callq	_octeon_write_csr64
	movq	_CN6XXX_SLI_IN_PCIE_PORT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	imull	$1431655765, (%rbx), %edx       ## imm = 0x55555555
	movq	%rbx, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_octeon_write_csr64             ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CN6XXX_SLI_PKT_INPUT_CONTROL,4,2 ## @CN6XXX_SLI_PKT_INPUT_CONTROL
	.comm	_CN6XXX_INPUT_CTL_MASK,4,2      ## @CN6XXX_INPUT_CTL_MASK
	.comm	_CN6XXX_SLI_PKT_INSTR_RD_SIZE,4,2 ## @CN6XXX_SLI_PKT_INSTR_RD_SIZE
	.comm	_CN6XXX_SLI_IN_PCIE_PORT,4,2    ## @CN6XXX_SLI_IN_PCIE_PORT
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_lio_cn6xxx_setup_global_input_regs ; -- Begin function lio_cn6xxx_setup_global_input_regs
	.p2align	2
_lio_cn6xxx_setup_global_input_regs:    ; @lio_cn6xxx_setup_global_input_regs
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _CN6XXX_SLI_PKT_INPUT_CONTROL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CN6XXX_SLI_PKT_INPUT_CONTROL@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _CN6XXX_INPUT_CTL_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CN6XXX_INPUT_CTL_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	bl	_octeon_write_csr
Lloh6:
	adrp	x8, _CN6XXX_SLI_PKT_INSTR_RD_SIZE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _CN6XXX_SLI_PKT_INSTR_RD_SIZE@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #-1
	bl	_octeon_write_csr64
Lloh9:
	adrp	x8, _CN6XXX_SLI_IN_PCIE_PORT@GOTPAGE
Lloh10:
	ldr	x8, [x8, _CN6XXX_SLI_IN_PCIE_PORT@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	w8, [x19]
	mov	w9, #1431655765
	mul	w2, w8, w9
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_octeon_write_csr64
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_CN6XXX_SLI_PKT_INPUT_CONTROL,4,2 ; @CN6XXX_SLI_PKT_INPUT_CONTROL
	.comm	_CN6XXX_INPUT_CTL_MASK,4,2      ; @CN6XXX_INPUT_CTL_MASK
	.comm	_CN6XXX_SLI_PKT_INSTR_RD_SIZE,4,2 ; @CN6XXX_SLI_PKT_INSTR_RD_SIZE
	.comm	_CN6XXX_SLI_IN_PCIE_PORT,4,2    ; @CN6XXX_SLI_IN_PCIE_PORT
.subsections_via_symbols
