	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_cec_irq_handler
_tegra_cec_irq_handler:                 ## @tegra_cec_irq_handler
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rsi, %rdi
	callq	_dev_get_drvdata
	movq	%rax, %r14
	movq	_TEGRA_CEC_INT_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_cec_read
	movl	%eax, %r15d
	movq	_TEGRA_CEC_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_cec_read
	movq	_IRQ_HANDLED@GOTPCREL(%rip), %r13
	andl	%eax, %r15d
	je	LBB0_28
## %bb.1:
	movl	%eax, %ebx
	movq	_TEGRA_CEC_INT_STAT_TX_REGISTER_UNDERRUN@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_3
## %bb.2:
	leaq	L_.str(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_err
	movq	%r14, %rdi
	callq	_tegra_cec_error_recovery
	movq	_TEGRA_CEC_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %ebx
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_cec_write
	movl	$1, (%r14)
	movq	_CEC_TX_STATUS_ERROR@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_3:
	movq	_TEGRA_CEC_INT_STAT_TX_ARBITRATION_FAILED@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	jne	LBB0_5
## %bb.4:
	movq	_TEGRA_CEC_INT_STAT_TX_BUS_ANOMALY_DETECTED@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_9
LBB0_5:
	movq	%r14, %rdi
	callq	_tegra_cec_error_recovery
	movq	_TEGRA_CEC_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %ebx
	movq	%r14, %rdi
	movl	%ebx, %edx
	callq	_cec_write
	movl	$1, (%r14)
	movq	_TEGRA_CEC_INT_STAT_TX_BUS_ANOMALY_DETECTED@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_8
## %bb.6:
	movq	_CEC_TX_STATUS_LOW_DRIVE@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_8:
	movq	_CEC_TX_STATUS_ARB_LOST@GOTPCREL(%rip), %rax
LBB0_7:
	movl	(%rax), %eax
	movl	%eax, 56(%r14)
LBB0_27:
	movq	_IRQ_WAKE_THREAD@GOTPCREL(%rip), %r13
LBB0_28:
	movl	(%r13), %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_9:
	movq	_TEGRA_CEC_INT_STAT_TX_FRAME_TRANSMITTED@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	testl	%r15d, %edx
	je	LBB0_13
## %bb.10:
	movq	_TEGRA_CEC_INT_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_cec_write
	movq	_TEGRA_CEC_INT_STAT_TX_FRAME_OR_BLOCK_NAKD@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_12
## %bb.11:
	movq	%r14, %rdi
	callq	_tegra_cec_error_recovery
	movl	$1, (%r14)
	movq	_CEC_TX_STATUS_NACK@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_13:
	movq	_TEGRA_CEC_INT_STAT_TX_FRAME_OR_BLOCK_NAKD@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_15
## %bb.14:
	leaq	L_.str.1(%rip), %rsi
	movq	%r12, %rdi
	callq	_dev_warn
LBB0_15:
	movq	_TEGRA_CEC_INT_STAT_TX_REGISTER_EMPTY@GOTPCREL(%rip), %r12
	testl	%r15d, (%r12)
	je	LBB0_20
## %bb.16:
	movq	8(%r14), %rax
	cmpq	16(%r14), %rax
	jne	LBB0_18
## %bb.17:
	movq	_TEGRA_CEC_INT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %ebx
	movq	%r14, %rdi
	movl	%ebx, %edx
	jmp	LBB0_19
LBB0_12:
	movl	$1, (%r14)
	movq	_CEC_TX_STATUS_OK@GOTPCREL(%rip), %rax
	jmp	LBB0_7
LBB0_18:
	movq	_TEGRA_CEC_TX_REGISTER@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movq	24(%r14), %rcx
	leaq	1(%rax), %rdx
	movq	%rdx, 8(%r14)
	movl	(%rcx,%rax,4), %edx
	movq	%r14, %rdi
	callq	_cec_write
	movq	_TEGRA_CEC_INT_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%r12), %edx
	movq	%r14, %rdi
LBB0_19:
	callq	_cec_write
LBB0_20:
	movq	_TEGRA_CEC_INT_STAT_RX_START_BIT_DETECTED@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	testl	%r15d, %edx
	je	LBB0_22
## %bb.21:
	movq	_TEGRA_CEC_INT_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_cec_write
	movl	$0, 32(%r14)
	movq	$0, 40(%r14)
LBB0_22:
	movq	_TEGRA_CEC_INT_STAT_RX_REGISTER_FULL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	testl	%r15d, %edx
	je	LBB0_28
## %bb.23:
	movq	_TEGRA_CEC_INT_STAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_cec_write
	movq	_TEGRA_CEC_RX_REGISTER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_cec_read
	movq	40(%r14), %rcx
	movq	_CEC_MAX_MSG_SIZE@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jge	LBB0_25
## %bb.24:
	movzbl	%al, %edx
	movq	48(%r14), %rsi
	leaq	1(%rcx), %rdi
	movq	%rdi, 40(%r14)
	movl	%edx, (%rsi,%rcx,4)
LBB0_25:
	movq	_TEGRA_CEC_RX_REGISTER_EOM@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_28
## %bb.26:
	movl	$1, 32(%r14)
	jmp	LBB0_27
	.cfi_endproc
                                        ## -- End function
	.comm	_TEGRA_CEC_INT_STAT,4,2         ## @TEGRA_CEC_INT_STAT
	.comm	_TEGRA_CEC_INT_MASK,4,2         ## @TEGRA_CEC_INT_MASK
	.comm	_IRQ_HANDLED,4,2                ## @IRQ_HANDLED
	.comm	_TEGRA_CEC_INT_STAT_TX_REGISTER_UNDERRUN,4,2 ## @TEGRA_CEC_INT_STAT_TX_REGISTER_UNDERRUN
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"TX underrun, interrupt timing issue!\n"

	.comm	_TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY,4,2 ## @TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY
	.comm	_CEC_TX_STATUS_ERROR,4,2        ## @CEC_TX_STATUS_ERROR
	.comm	_IRQ_WAKE_THREAD,4,2            ## @IRQ_WAKE_THREAD
	.comm	_TEGRA_CEC_INT_STAT_TX_ARBITRATION_FAILED,4,2 ## @TEGRA_CEC_INT_STAT_TX_ARBITRATION_FAILED
	.comm	_TEGRA_CEC_INT_STAT_TX_BUS_ANOMALY_DETECTED,4,2 ## @TEGRA_CEC_INT_STAT_TX_BUS_ANOMALY_DETECTED
	.comm	_CEC_TX_STATUS_LOW_DRIVE,4,2    ## @CEC_TX_STATUS_LOW_DRIVE
	.comm	_CEC_TX_STATUS_ARB_LOST,4,2     ## @CEC_TX_STATUS_ARB_LOST
	.comm	_TEGRA_CEC_INT_STAT_TX_FRAME_TRANSMITTED,4,2 ## @TEGRA_CEC_INT_STAT_TX_FRAME_TRANSMITTED
	.comm	_TEGRA_CEC_INT_STAT_TX_FRAME_OR_BLOCK_NAKD,4,2 ## @TEGRA_CEC_INT_STAT_TX_FRAME_OR_BLOCK_NAKD
	.comm	_CEC_TX_STATUS_NACK,4,2         ## @CEC_TX_STATUS_NACK
	.comm	_CEC_TX_STATUS_OK,4,2           ## @CEC_TX_STATUS_OK
L_.str.1:                               ## @.str.1
	.asciz	"TX NAKed on the fly!\n"

	.comm	_TEGRA_CEC_INT_STAT_TX_REGISTER_EMPTY,4,2 ## @TEGRA_CEC_INT_STAT_TX_REGISTER_EMPTY
	.comm	_TEGRA_CEC_TX_REGISTER,4,2      ## @TEGRA_CEC_TX_REGISTER
	.comm	_TEGRA_CEC_INT_STAT_RX_START_BIT_DETECTED,4,2 ## @TEGRA_CEC_INT_STAT_RX_START_BIT_DETECTED
	.comm	_TEGRA_CEC_INT_STAT_RX_REGISTER_FULL,4,2 ## @TEGRA_CEC_INT_STAT_RX_REGISTER_FULL
	.comm	_TEGRA_CEC_RX_REGISTER,4,2      ## @TEGRA_CEC_RX_REGISTER
	.comm	_CEC_MAX_MSG_SIZE,8,3           ## @CEC_MAX_MSG_SIZE
	.comm	_TEGRA_CEC_RX_REGISTER_EOM,4,2  ## @TEGRA_CEC_RX_REGISTER_EOM
	.no_dead_strip	_tegra_cec_irq_handler
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_cec_irq_handler
_tegra_cec_irq_handler:                 ; @tegra_cec_irq_handler
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x21, x1
	mov	x0, x1
	bl	_dev_get_drvdata
	mov	x19, x0
Lloh0:
	adrp	x23, _TEGRA_CEC_INT_STAT@GOTPAGE
Lloh1:
	ldr	x23, [x23, _TEGRA_CEC_INT_STAT@GOTPAGEOFF]
	ldr	w1, [x23]
	bl	_cec_read
	mov	x22, x0
Lloh2:
	adrp	x24, _TEGRA_CEC_INT_MASK@GOTPAGE
Lloh3:
	ldr	x24, [x24, _TEGRA_CEC_INT_MASK@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x19
	bl	_cec_read
	ands	w22, w0, w22
	b.eq	LBB0_28
; %bb.1:
	mov	x20, x0
Lloh4:
	adrp	x8, _TEGRA_CEC_INT_STAT_TX_REGISTER_UNDERRUN@GOTPAGE
Lloh5:
	ldr	x8, [x8, _TEGRA_CEC_INT_STAT_TX_REGISTER_UNDERRUN@GOTPAGEOFF]
Lloh6:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_3
; %bb.2:
Lloh7:
	adrp	x1, l_.str@PAGE
Lloh8:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x21
	bl	_dev_err
	mov	x0, x19
	bl	_tegra_cec_error_recovery
	ldr	w1, [x24]
Lloh9:
	adrp	x8, _TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY@GOTPAGE
Lloh10:
	ldr	x8, [x8, _TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	bic	w2, w20, w8
	mov	x0, x19
	bl	_cec_write
	mov	w8, #1
	str	w8, [x19]
Lloh12:
	adrp	x8, _CEC_TX_STATUS_ERROR@GOTPAGE
Lloh13:
	ldr	x8, [x8, _CEC_TX_STATUS_ERROR@GOTPAGEOFF]
	b	LBB0_8
LBB0_3:
Lloh14:
	adrp	x8, _TEGRA_CEC_INT_STAT_TX_ARBITRATION_FAILED@GOTPAGE
Lloh15:
	ldr	x8, [x8, _TEGRA_CEC_INT_STAT_TX_ARBITRATION_FAILED@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
Lloh17:
	adrp	x25, _TEGRA_CEC_INT_STAT_TX_BUS_ANOMALY_DETECTED@GOTPAGE
Lloh18:
	ldr	x25, [x25, _TEGRA_CEC_INT_STAT_TX_BUS_ANOMALY_DETECTED@GOTPAGEOFF]
	tst	w8, w22
	b.ne	LBB0_5
; %bb.4:
	ldr	w8, [x25]
	tst	w8, w22
	b.eq	LBB0_10
LBB0_5:
	mov	x0, x19
	bl	_tegra_cec_error_recovery
	ldr	w1, [x24]
Lloh19:
	adrp	x8, _TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY@GOTPAGE
Lloh20:
	ldr	x8, [x8, _TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY@GOTPAGEOFF]
Lloh21:
	ldr	w8, [x8]
	bic	w2, w20, w8
	mov	x0, x19
	bl	_cec_write
	mov	w8, #1
	str	w8, [x19]
	ldr	w8, [x25]
	tst	w8, w22
	b.eq	LBB0_7
; %bb.6:
Lloh22:
	adrp	x8, _CEC_TX_STATUS_LOW_DRIVE@GOTPAGE
Lloh23:
	ldr	x8, [x8, _CEC_TX_STATUS_LOW_DRIVE@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:
Lloh24:
	adrp	x8, _CEC_TX_STATUS_ARB_LOST@GOTPAGE
Lloh25:
	ldr	x8, [x8, _CEC_TX_STATUS_ARB_LOST@GOTPAGEOFF]
LBB0_8:
	ldr	w8, [x8]
	str	w8, [x19, #56]
LBB0_9:
Lloh26:
	adrp	x8, _IRQ_WAKE_THREAD@GOTPAGE
Lloh27:
	ldr	x8, [x8, _IRQ_WAKE_THREAD@GOTPAGEOFF]
	b	LBB0_29
LBB0_10:
Lloh28:
	adrp	x8, _TEGRA_CEC_INT_STAT_TX_FRAME_TRANSMITTED@GOTPAGE
Lloh29:
	ldr	x8, [x8, _TEGRA_CEC_INT_STAT_TX_FRAME_TRANSMITTED@GOTPAGEOFF]
Lloh30:
	ldr	w2, [x8]
	tst	w2, w22
	b.eq	LBB0_13
; %bb.11:
	ldr	w1, [x23]
	mov	x0, x19
	bl	_cec_write
Lloh31:
	adrp	x8, _TEGRA_CEC_INT_STAT_TX_FRAME_OR_BLOCK_NAKD@GOTPAGE
Lloh32:
	ldr	x8, [x8, _TEGRA_CEC_INT_STAT_TX_FRAME_OR_BLOCK_NAKD@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_18
; %bb.12:
	mov	x0, x19
	bl	_tegra_cec_error_recovery
	mov	w8, #1
	str	w8, [x19]
Lloh34:
	adrp	x8, _CEC_TX_STATUS_NACK@GOTPAGE
Lloh35:
	ldr	x8, [x8, _CEC_TX_STATUS_NACK@GOTPAGEOFF]
	b	LBB0_8
LBB0_13:
Lloh36:
	adrp	x8, _TEGRA_CEC_INT_STAT_TX_FRAME_OR_BLOCK_NAKD@GOTPAGE
Lloh37:
	ldr	x8, [x8, _TEGRA_CEC_INT_STAT_TX_FRAME_OR_BLOCK_NAKD@GOTPAGEOFF]
Lloh38:
	ldr	w8, [x8]
	tst	w8, w22
	b.eq	LBB0_15
; %bb.14:
Lloh39:
	adrp	x1, l_.str.1@PAGE
Lloh40:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x21
	bl	_dev_warn
LBB0_15:
Lloh41:
	adrp	x21, _TEGRA_CEC_INT_STAT_TX_REGISTER_EMPTY@GOTPAGE
Lloh42:
	ldr	x21, [x21, _TEGRA_CEC_INT_STAT_TX_REGISTER_EMPTY@GOTPAGEOFF]
	ldr	w8, [x21]
	tst	w8, w22
	b.eq	LBB0_21
; %bb.16:
	ldp	x8, x9, [x19, #8]
	cmp	x8, x9
	b.ne	LBB0_19
; %bb.17:
	ldr	w1, [x24]
Lloh43:
	adrp	x8, _TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY@GOTPAGE
Lloh44:
	ldr	x8, [x8, _TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	bic	w2, w20, w8
	b	LBB0_20
LBB0_18:
	mov	w8, #1
	str	w8, [x19]
Lloh46:
	adrp	x8, _CEC_TX_STATUS_OK@GOTPAGE
Lloh47:
	ldr	x8, [x8, _CEC_TX_STATUS_OK@GOTPAGEOFF]
	b	LBB0_8
LBB0_19:
Lloh48:
	adrp	x9, _TEGRA_CEC_TX_REGISTER@GOTPAGE
Lloh49:
	ldr	x9, [x9, _TEGRA_CEC_TX_REGISTER@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x9]
	ldr	x9, [x19, #24]
	add	x10, x8, #1
	str	x10, [x19, #8]
	ldr	w2, [x9, x8, lsl #2]
	mov	x0, x19
	bl	_cec_write
	ldr	w1, [x23]
	ldr	w2, [x21]
LBB0_20:
	mov	x0, x19
	bl	_cec_write
LBB0_21:
Lloh51:
	adrp	x8, _TEGRA_CEC_INT_STAT_RX_START_BIT_DETECTED@GOTPAGE
Lloh52:
	ldr	x8, [x8, _TEGRA_CEC_INT_STAT_RX_START_BIT_DETECTED@GOTPAGEOFF]
Lloh53:
	ldr	w2, [x8]
	tst	w2, w22
	b.eq	LBB0_23
; %bb.22:
	ldr	w1, [x23]
	mov	x0, x19
	bl	_cec_write
	str	wzr, [x19, #32]
	str	xzr, [x19, #40]
LBB0_23:
Lloh54:
	adrp	x8, _TEGRA_CEC_INT_STAT_RX_REGISTER_FULL@GOTPAGE
Lloh55:
	ldr	x8, [x8, _TEGRA_CEC_INT_STAT_RX_REGISTER_FULL@GOTPAGEOFF]
Lloh56:
	ldr	w2, [x8]
	tst	w2, w22
	b.eq	LBB0_28
; %bb.24:
	ldr	w1, [x23]
	mov	x0, x19
	bl	_cec_write
Lloh57:
	adrp	x8, _TEGRA_CEC_RX_REGISTER@GOTPAGE
Lloh58:
	ldr	x8, [x8, _TEGRA_CEC_RX_REGISTER@GOTPAGEOFF]
Lloh59:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_cec_read
	ldr	x8, [x19, #40]
Lloh60:
	adrp	x9, _CEC_MAX_MSG_SIZE@GOTPAGE
Lloh61:
	ldr	x9, [x9, _CEC_MAX_MSG_SIZE@GOTPAGEOFF]
Lloh62:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ge	LBB0_26
; %bb.25:
	and	w9, w0, #0xff
	ldr	x10, [x19, #48]
	add	x11, x8, #1
	str	x11, [x19, #40]
	str	w9, [x10, x8, lsl #2]
LBB0_26:
Lloh63:
	adrp	x8, _TEGRA_CEC_RX_REGISTER_EOM@GOTPAGE
Lloh64:
	ldr	x8, [x8, _TEGRA_CEC_RX_REGISTER_EOM@GOTPAGEOFF]
Lloh65:
	ldr	w8, [x8]
	tst	w8, w0
	b.eq	LBB0_28
; %bb.27:
	mov	w8, #1
	str	w8, [x19, #32]
	b	LBB0_9
LBB0_28:
Lloh66:
	adrp	x8, _IRQ_HANDLED@GOTPAGE
Lloh67:
	ldr	x8, [x8, _IRQ_HANDLED@GOTPAGEOFF]
LBB0_29:
	ldr	w0, [x8]
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpAdd	Lloh39, Lloh40
	.loh AdrpLdrGot	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh66, Lloh67
	.cfi_endproc
                                        ; -- End function
	.comm	_TEGRA_CEC_INT_STAT,4,2         ; @TEGRA_CEC_INT_STAT
	.comm	_TEGRA_CEC_INT_MASK,4,2         ; @TEGRA_CEC_INT_MASK
	.comm	_IRQ_HANDLED,4,2                ; @IRQ_HANDLED
	.comm	_TEGRA_CEC_INT_STAT_TX_REGISTER_UNDERRUN,4,2 ; @TEGRA_CEC_INT_STAT_TX_REGISTER_UNDERRUN
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"TX underrun, interrupt timing issue!\n"

	.comm	_TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY,4,2 ; @TEGRA_CEC_INT_MASK_TX_REGISTER_EMPTY
	.comm	_CEC_TX_STATUS_ERROR,4,2        ; @CEC_TX_STATUS_ERROR
	.comm	_IRQ_WAKE_THREAD,4,2            ; @IRQ_WAKE_THREAD
	.comm	_TEGRA_CEC_INT_STAT_TX_ARBITRATION_FAILED,4,2 ; @TEGRA_CEC_INT_STAT_TX_ARBITRATION_FAILED
	.comm	_TEGRA_CEC_INT_STAT_TX_BUS_ANOMALY_DETECTED,4,2 ; @TEGRA_CEC_INT_STAT_TX_BUS_ANOMALY_DETECTED
	.comm	_CEC_TX_STATUS_LOW_DRIVE,4,2    ; @CEC_TX_STATUS_LOW_DRIVE
	.comm	_CEC_TX_STATUS_ARB_LOST,4,2     ; @CEC_TX_STATUS_ARB_LOST
	.comm	_TEGRA_CEC_INT_STAT_TX_FRAME_TRANSMITTED,4,2 ; @TEGRA_CEC_INT_STAT_TX_FRAME_TRANSMITTED
	.comm	_TEGRA_CEC_INT_STAT_TX_FRAME_OR_BLOCK_NAKD,4,2 ; @TEGRA_CEC_INT_STAT_TX_FRAME_OR_BLOCK_NAKD
	.comm	_CEC_TX_STATUS_NACK,4,2         ; @CEC_TX_STATUS_NACK
	.comm	_CEC_TX_STATUS_OK,4,2           ; @CEC_TX_STATUS_OK
l_.str.1:                               ; @.str.1
	.asciz	"TX NAKed on the fly!\n"

	.comm	_TEGRA_CEC_INT_STAT_TX_REGISTER_EMPTY,4,2 ; @TEGRA_CEC_INT_STAT_TX_REGISTER_EMPTY
	.comm	_TEGRA_CEC_TX_REGISTER,4,2      ; @TEGRA_CEC_TX_REGISTER
	.comm	_TEGRA_CEC_INT_STAT_RX_START_BIT_DETECTED,4,2 ; @TEGRA_CEC_INT_STAT_RX_START_BIT_DETECTED
	.comm	_TEGRA_CEC_INT_STAT_RX_REGISTER_FULL,4,2 ; @TEGRA_CEC_INT_STAT_RX_REGISTER_FULL
	.comm	_TEGRA_CEC_RX_REGISTER,4,2      ; @TEGRA_CEC_RX_REGISTER
	.comm	_CEC_MAX_MSG_SIZE,8,3           ; @CEC_MAX_MSG_SIZE
	.comm	_TEGRA_CEC_RX_REGISTER_EOM,4,2  ; @TEGRA_CEC_RX_REGISTER_EOM
	.no_dead_strip	_tegra_cec_irq_handler
.subsections_via_symbols
