	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nand_davinci_correct_4bit
_nand_davinci_correct_4bit:             ## @nand_davinci_correct_4bit
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %r14
	movq	%rsi, %rbx
	callq	_nand_to_mtd
	movl	%eax, %edi
	callq	_to_davinci_nand
	movq	%rax, %r15
	movl	%r14d, %edi
	andl	$1, %edi
	callq	_WARN_ON
	testq	%rax, %rax
	je	LBB0_3
## %bb.1:
	movq	_EINVAL@GOTPCREL(%rip), %rax
LBB0_2:
	xorl	%r12d, %r12d
	subl	(%rax), %r12d
LBB0_24:
	movl	%r12d, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_3:
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movzwl	(%r14), %eax
	movl	%eax, %ecx
	andl	$1023, %ecx                     ## imm = 0x3FF
	movl	%ecx, -64(%rbp)                 ## 4-byte Spill
	shrl	$10, %eax
	movzwl	2(%r14), %ecx
	movl	%ecx, %edx
	andl	$15, %edx
	shll	$6, %edx
	orl	%eax, %edx
	movl	%edx, -60(%rbp)                 ## 4-byte Spill
	movl	%ecx, %eax
	shrl	$4, %eax
	andl	$1023, %eax                     ## imm = 0x3FF
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	shrl	$14, %ecx
	movzwl	4(%r14), %eax
	movzbl	%al, %edx
	leal	(%rcx,%rdx,4), %ecx
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	shrl	$8, %eax
	movzwl	6(%r14), %ecx
	movl	%ecx, %r12d
	andl	$3, %r12d
	shll	$8, %r12d
	orl	%eax, %r12d
	movl	%ecx, %r13d
	shrl	$2, %r13d
	andl	$1023, %r13d                    ## imm = 0x3FF
	shrl	$12, %ecx
	movzwl	8(%r14), %edx
	movl	%edx, %ebx
	andl	$63, %ebx
	shll	$4, %ebx
	orl	%ecx, %ebx
	shrl	$6, %edx
	movq	_NAND_4BIT_ECC_LOAD_OFFSET@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_writel
	movl	(%r14), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_davinci_nand_writel
	movl	(%r14), %esi
	movq	%r15, %rdi
	movl	%r13d, %edx
	callq	_davinci_nand_writel
	movl	(%r14), %esi
	movq	%r15, %rdi
	movl	%r12d, %edx
	callq	_davinci_nand_writel
	movl	(%r14), %esi
	movq	%r15, %rdi
	movl	-52(%rbp), %edx                 ## 4-byte Reload
	callq	_davinci_nand_writel
	movl	(%r14), %esi
	movq	%r15, %rdi
	movl	-56(%rbp), %edx                 ## 4-byte Reload
	callq	_davinci_nand_writel
	movl	(%r14), %esi
	movq	%r15, %rdi
	movl	-60(%rbp), %edx                 ## 4-byte Reload
	callq	_davinci_nand_writel
	movl	(%r14), %esi
	movq	%r15, %rdi
	movl	-64(%rbp), %edx                 ## 4-byte Reload
	callq	_davinci_nand_writel
	movq	_NANDFSR_OFFSET@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	leaq	-80(%rbp), %rsi
	movq	%r15, %rdi
	callq	_nand_davinci_readecc_4bit
	movdqa	-80(%rbp), %xmm0
	ptest	%xmm0, %xmm0
	je	LBB0_4
## %bb.5:
	movq	_NAND_ERR_ADD1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movq	_NANDFCR_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_davinci_nand_readl
	movl	%eax, %ebx
	movl	$13, %edi
	callq	_BIT
	orl	%eax, %ebx
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%ebx, %edx
	callq	_davinci_nand_writel
	movq	_jiffies@GOTPCREL(%rip), %r13
	movq	(%r13), %rbx
	movl	$100, %edi
	callq	_usecs_to_jiffies
	movq	%rax, %r14
	addq	%rbx, %r14
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movl	%eax, %ebx
	xorl	%eax, %eax
	callq	_cpu_relax
	testl	$3072, %ebx                     ## imm = 0xC00
	jne	LBB0_8
## %bb.7:                               ##   in Loop: Header=BB0_6 Depth=1
	movq	(%r13), %rdi
	movq	%r14, %rsi
	callq	_time_before
	testq	%rax, %rax
	jne	LBB0_6
	jmp	LBB0_8
	.p2align	4, 0x90
LBB0_9:                                 ##   in Loop: Header=BB0_8 Depth=1
	cmpl	$1, %eax
	je	LBB0_12
## %bb.10:                              ##   in Loop: Header=BB0_8 Depth=1
	testl	%eax, %eax
	je	LBB0_11
## %bb.13:                              ##   in Loop: Header=BB0_8 Depth=1
	xorl	%eax, %eax
	callq	_cpu_relax
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	movl	(%r12), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movl	%eax, %r13d
	shrl	$8, %eax
	andl	$15, %eax
	leal	-2(%rax), %ecx
	cmpl	$2, %ecx
	jae	LBB0_9
## %bb.14:
	shrl	$16, %r13d
	andl	$3, %r13d
	movq	_NAND_ERR_ADD1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movl	%eax, %r14d
	movq	_NAND_ERR_ERRVAL1_OFFSET@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	andl	$1023, %r14d                    ## imm = 0x3FF
	xorl	%r12d, %r12d
	cmpl	$8, %r14d
	jb	LBB0_16
## %bb.15:
	movl	$519, %ecx                      ## imm = 0x207
	subl	%r14d, %ecx
	movslq	%ecx, %rcx
	movq	-48(%rbp), %rdx                 ## 8-byte Reload
	xorl	%eax, (%rdx,%rcx,4)
	movl	$1, %r12d
LBB0_16:
	testl	%r13d, %r13d
	je	LBB0_24
## %bb.17:
	movq	_NAND_ERR_ADD1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movl	%eax, %r14d
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	shrl	$16, %r14d
	andl	$1023, %r14d                    ## imm = 0x3FF
	cmpl	$8, %r14d
	jb	LBB0_19
## %bb.18:
	sarl	$16, %eax
	movl	$519, %ecx                      ## imm = 0x207
	subl	%r14d, %ecx
	movslq	%ecx, %rcx
	movq	-48(%rbp), %rdx                 ## 8-byte Reload
	xorl	%eax, (%rdx,%rcx,4)
	incl	%r12d
LBB0_19:
	cmpl	$1, %r13d
	je	LBB0_24
## %bb.20:
	negl	%r13d
	movl	$2, %r14d
	jmp	LBB0_21
	.p2align	4, 0x90
LBB0_23:                                ##   in Loop: Header=BB0_21 Depth=1
	leal	(%r14,%r13), %eax
	incl	%eax
	movl	%r14d, %ecx
	incl	%ecx
	movl	%ecx, %r14d
	cmpl	$1, %eax
	je	LBB0_24
LBB0_21:                                ## =>This Inner Loop Header: Depth=1
	movq	_NAND_ERR_ADD2_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movl	%eax, %ebx
	movq	_NAND_ERR_ERRVAL2_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movl	%ebx, %ecx
	shrl	$16, %ecx
	testb	$1, %r14b
	cmovel	%ebx, %ecx
	andl	$1023, %ecx                     ## imm = 0x3FF
	cmpl	$8, %ecx
	jb	LBB0_23
## %bb.22:                              ##   in Loop: Header=BB0_21 Depth=1
	movl	%eax, %edx
	sarl	$16, %edx
	testb	$1, %r14b
	cmovel	%eax, %edx
	movl	$519, %eax                      ## imm = 0x207
	subl	%ecx, %eax
	cltq
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	xorl	%edx, (%rcx,%rax,4)
	incl	%r12d
	jmp	LBB0_23
LBB0_4:
	xorl	%r12d, %r12d
	jmp	LBB0_24
LBB0_12:
	movq	_NAND_ERR_ERRVAL1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	movq	_EBADMSG@GOTPCREL(%rip), %rax
	jmp	LBB0_2
LBB0_11:
	movq	_NAND_ERR_ERRVAL1_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_davinci_nand_readl
	xorl	%r12d, %r12d
	jmp	LBB0_24
	.cfi_endproc
                                        ## -- End function
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_NAND_4BIT_ECC_LOAD_OFFSET,4,2  ## @NAND_4BIT_ECC_LOAD_OFFSET
	.comm	_NANDFSR_OFFSET,4,2             ## @NANDFSR_OFFSET
	.comm	_NAND_ERR_ADD1_OFFSET,4,2       ## @NAND_ERR_ADD1_OFFSET
	.comm	_NANDFCR_OFFSET,4,2             ## @NANDFCR_OFFSET
	.comm	_jiffies,8,3                    ## @jiffies
	.comm	_NAND_ERR_ERRVAL1_OFFSET,4,2    ## @NAND_ERR_ERRVAL1_OFFSET
	.comm	_EBADMSG,4,2                    ## @EBADMSG
	.comm	_NAND_ERR_ADD2_OFFSET,4,2       ## @NAND_ERR_ADD2_OFFSET
	.comm	_NAND_ERR_ERRVAL2_OFFSET,4,2    ## @NAND_ERR_ERRVAL2_OFFSET
	.no_dead_strip	_nand_davinci_correct_4bit
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nand_davinci_correct_4bit
_nand_davinci_correct_4bit:             ; @nand_davinci_correct_4bit
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x23, x2
	mov	x19, x1
	bl	_nand_to_mtd
	bl	_to_davinci_nand
	mov	x20, x0
	and	w0, w23, #0x1
	bl	_WARN_ON
	cbz	x0, LBB0_4
; %bb.1:
Lloh0:
	adrp	x8, _EINVAL@GOTPAGE
Lloh1:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
LBB0_2:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_3:
	mov	x0, x21
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
LBB0_4:
	ldrh	w8, [x23]
	and	w21, w8, #0x3ff
	lsr	w22, w8, #10
	ldrh	w8, [x23, #2]
	bfi	w22, w8, #6, #4
	ubfx	w24, w8, #4, #10
	lsr	w25, w8, #14
	ldrh	w8, [x23, #4]
	bfi	w25, w8, #2, #8
	lsr	w26, w8, #8
	ldrh	w8, [x23, #6]
	bfi	w26, w8, #8, #2
	ubfx	w27, w8, #2, #10
	lsr	w28, w8, #12
	ldrh	w8, [x23, #8]
	bfi	w28, w8, #4, #6
	lsr	w2, w8, #6
Lloh2:
	adrp	x23, _NAND_4BIT_ECC_LOAD_OFFSET@GOTPAGE
Lloh3:
	ldr	x23, [x23, _NAND_4BIT_ECC_LOAD_OFFSET@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x20
	bl	_davinci_nand_writel
	ldr	w1, [x23]
	mov	x0, x20
	mov	x2, x28
	bl	_davinci_nand_writel
	ldr	w1, [x23]
	mov	x0, x20
	mov	x2, x27
	bl	_davinci_nand_writel
	ldr	w1, [x23]
	mov	x0, x20
	mov	x2, x26
	bl	_davinci_nand_writel
	ldr	w1, [x23]
	mov	x0, x20
	mov	x2, x25
	bl	_davinci_nand_writel
	ldr	w1, [x23]
	mov	x0, x20
	mov	x2, x24
	bl	_davinci_nand_writel
	ldr	w1, [x23]
	mov	x0, x20
	mov	x2, x22
	bl	_davinci_nand_writel
	ldr	w1, [x23]
	mov	x0, x20
	mov	x2, x21
	bl	_davinci_nand_writel
Lloh4:
	adrp	x23, _NANDFSR_OFFSET@GOTPAGE
Lloh5:
	ldr	x23, [x23, _NANDFSR_OFFSET@GOTPAGEOFF]
	ldr	w1, [x23]
	mov	x0, x20
	bl	_davinci_nand_readl
	mov	x1, sp
	mov	x0, x20
	bl	_nand_davinci_readecc_4bit
	ldr	q0, [sp]
	ext.16b	v1, v0, v0, #8
	orr.8b	v0, v0, v1
	mov.s	w8, v0[1]
	fmov	w9, s0
	orr	w8, w9, w8
	cbz	w8, LBB0_14
; %bb.5:
Lloh6:
	adrp	x24, _NAND_ERR_ADD1_OFFSET@GOTPAGE
Lloh7:
	ldr	x24, [x24, _NAND_ERR_ADD1_OFFSET@GOTPAGEOFF]
	ldr	w1, [x24]
	mov	x0, x20
	bl	_davinci_nand_readl
Lloh8:
	adrp	x8, _NANDFCR_OFFSET@GOTPAGE
Lloh9:
	ldr	x8, [x8, _NANDFCR_OFFSET@GOTPAGEOFF]
Lloh10:
	ldr	w21, [x8]
	mov	x0, x20
	mov	x1, x21
	bl	_davinci_nand_readl
	mov	x22, x0
	mov	w0, #13
	bl	_BIT
	orr	w2, w0, w22
	mov	x0, x20
	mov	x1, x21
	bl	_davinci_nand_writel
Lloh11:
	adrp	x25, _jiffies@GOTPAGE
Lloh12:
	ldr	x25, [x25, _jiffies@GOTPAGEOFF]
	ldr	x21, [x25]
	mov	w0, #100
	bl	_usecs_to_jiffies
	add	x21, x0, x21
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x23]
	mov	x0, x20
	bl	_davinci_nand_readl
	mov	x22, x0
	bl	_cpu_relax
	tst	w22, #0xc00
	b.ne	LBB0_11
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	ldr	x0, [x25]
	mov	x1, x21
	bl	_time_before
	cbnz	x0, LBB0_6
	b	LBB0_11
LBB0_8:                                 ;   in Loop: Header=BB0_11 Depth=1
	cmp	w8, #1
	b.eq	LBB0_15
; %bb.9:                                ;   in Loop: Header=BB0_11 Depth=1
	cbz	w8, LBB0_16
; %bb.10:                               ;   in Loop: Header=BB0_11 Depth=1
	bl	_cpu_relax
LBB0_11:                                ; =>This Inner Loop Header: Depth=1
	ldr	w1, [x23]
	mov	x0, x20
	bl	_davinci_nand_readl
	ubfx	w8, w0, #8, #4
	sub	w9, w8, #2
	cmp	w9, #2
	b.hs	LBB0_8
; %bb.12:
	ubfx	w23, w0, #16, #2
	ldr	w1, [x24]
	mov	x0, x20
	bl	_davinci_nand_readl
	mov	x21, x0
Lloh13:
	adrp	x25, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGE
Lloh14:
	ldr	x25, [x25, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGEOFF]
	ldr	w1, [x25]
	mov	x0, x20
	bl	_davinci_nand_readl
	and	w8, w21, #0x3ff
	cmp	w8, #8
	b.lo	LBB0_17
; %bb.13:
	mov	w9, #519
	sub	w8, w9, w8
	sbfiz	x8, x8, #2, #32
	ldr	w9, [x19, x8]
	eor	w9, w9, w0
	str	w9, [x19, x8]
	mov	w21, #1
	cbnz	w23, LBB0_18
	b	LBB0_3
LBB0_14:
	mov	w21, #0
	b	LBB0_3
LBB0_15:
Lloh15:
	adrp	x8, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGE
Lloh16:
	ldr	x8, [x8, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_davinci_nand_readl
Lloh18:
	adrp	x8, _EBADMSG@GOTPAGE
Lloh19:
	ldr	x8, [x8, _EBADMSG@GOTPAGEOFF]
	b	LBB0_2
LBB0_16:
Lloh20:
	adrp	x8, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGE
Lloh21:
	ldr	x8, [x8, _NAND_ERR_ERRVAL1_OFFSET@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_davinci_nand_readl
	mov	w21, #0
	b	LBB0_3
LBB0_17:
	mov	w21, #0
	cbz	w23, LBB0_3
LBB0_18:
	ldr	w1, [x24]
	mov	x0, x20
	bl	_davinci_nand_readl
	mov	x22, x0
	ldr	w1, [x25]
	mov	x0, x20
	bl	_davinci_nand_readl
	ubfx	w8, w22, #16, #10
	cmp	w8, #8
	b.lo	LBB0_20
; %bb.19:
	mov	w9, #519
	sub	w8, w9, w8
	sbfiz	x8, x8, #2, #32
	ldr	w9, [x19, x8]
	eor	w9, w9, w0, asr #16
	str	w9, [x19, x8]
	add	w21, w21, #1
LBB0_20:
	cmp	w23, #1
	b.eq	LBB0_3
; %bb.21:
	mov	w24, #1
Lloh23:
	adrp	x25, _NAND_ERR_ADD2_OFFSET@GOTPAGE
Lloh24:
	ldr	x25, [x25, _NAND_ERR_ADD2_OFFSET@GOTPAGEOFF]
Lloh25:
	adrp	x26, _NAND_ERR_ERRVAL2_OFFSET@GOTPAGE
Lloh26:
	ldr	x26, [x26, _NAND_ERR_ERRVAL2_OFFSET@GOTPAGEOFF]
	mov	w27, #519
	b	LBB0_23
LBB0_22:                                ;   in Loop: Header=BB0_23 Depth=1
	cmp	w23, w24
	b.eq	LBB0_3
LBB0_23:                                ; =>This Inner Loop Header: Depth=1
	add	w24, w24, #1
	ldr	w1, [x25]
	mov	x0, x20
	bl	_davinci_nand_readl
	mov	x22, x0
	ldr	w1, [x26]
	mov	x0, x20
	bl	_davinci_nand_readl
	lsr	w8, w22, #16
	tst	w24, #0x1
	csel	w8, w22, w8, eq
	and	w8, w8, #0x3ff
	cmp	w8, #8
	b.lo	LBB0_22
; %bb.24:                               ;   in Loop: Header=BB0_23 Depth=1
	asr	w9, w0, #16
	tst	w24, #0x1
	csel	w9, w0, w9, eq
	sub	w8, w27, w8
	sbfiz	x8, x8, #2, #32
	ldr	w10, [x19, x8]
	eor	w9, w10, w9
	str	w9, [x19, x8]
	add	w21, w21, #1
	b	LBB0_22
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.cfi_endproc
                                        ; -- End function
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_NAND_4BIT_ECC_LOAD_OFFSET,4,2  ; @NAND_4BIT_ECC_LOAD_OFFSET
	.comm	_NANDFSR_OFFSET,4,2             ; @NANDFSR_OFFSET
	.comm	_NAND_ERR_ADD1_OFFSET,4,2       ; @NAND_ERR_ADD1_OFFSET
	.comm	_NANDFCR_OFFSET,4,2             ; @NANDFCR_OFFSET
	.comm	_jiffies,8,3                    ; @jiffies
	.comm	_NAND_ERR_ERRVAL1_OFFSET,4,2    ; @NAND_ERR_ERRVAL1_OFFSET
	.comm	_EBADMSG,4,2                    ; @EBADMSG
	.comm	_NAND_ERR_ADD2_OFFSET,4,2       ; @NAND_ERR_ADD2_OFFSET
	.comm	_NAND_ERR_ERRVAL2_OFFSET,4,2    ; @NAND_ERR_ERRVAL2_OFFSET
	.no_dead_strip	_nand_davinci_correct_4bit
.subsections_via_symbols
