	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function omap_hsmmc_set_bus_width
_omap_hsmmc_set_bus_width:              ## @omap_hsmmc_set_bus_width
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	8(%rdi), %rbx
	movl	(%rdi), %edi
	movq	_CON@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	callq	_OMAP_HSMMC_READ
	movq	(%rbx), %rcx
	movq	_MMC_TIMING_MMC_DDR52@GOTPCREL(%rip), %r8
	movq	_MMC_TIMING_UHS_DDR50@GOTPCREL(%rip), %rdi
	movq	_DDR@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	movl	%edx, %esi
	orl	%eax, %esi
	notl	%edx
	andl	%eax, %edx
	cmpq	(%rdi), %rcx
	cmovel	%esi, %edx
	cmpq	(%r8), %rcx
	cmovel	%esi, %edx
	movl	8(%rbx), %eax
	cmpl	$130, %eax
	je	LBB0_6
## %bb.1:
	cmpl	$129, %eax
	je	LBB0_5
## %bb.2:
	cmpl	$128, %eax
	jne	LBB0_7
## %bb.3:
	movl	(%r15), %edi
	movl	(%r14), %esi
	movq	_DW8@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	jmp	LBB0_4
LBB0_6:
	movl	(%r15), %edi
	movl	(%r14), %esi
	movq	_DW8@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %edx
	callq	_OMAP_HSMMC_WRITE
	movl	(%r15), %r14d
	movq	_HCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%r14d, %edi
	movl	%ebx, %esi
	callq	_OMAP_HSMMC_READ
	movq	_FOUR_BIT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movl	%r14d, %edi
	movl	%ebx, %esi
	jmp	LBB0_4
LBB0_5:
	movl	(%r15), %edi
	movl	(%r14), %esi
	movq	_DW8@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %edx
	callq	_OMAP_HSMMC_WRITE
	movl	(%r15), %r14d
	movq	_HCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%r14d, %edi
	movl	%ebx, %esi
	callq	_OMAP_HSMMC_READ
	movq	_FOUR_BIT@GOTPCREL(%rip), %rcx
	orl	(%rcx), %eax
	movl	%r14d, %edi
	movl	%ebx, %esi
	movl	%eax, %edx
LBB0_4:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_OMAP_HSMMC_WRITE               ## TAILCALL
LBB0_7:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CON,4,2                        ## @CON
	.comm	_MMC_TIMING_MMC_DDR52,8,3       ## @MMC_TIMING_MMC_DDR52
	.comm	_MMC_TIMING_UHS_DDR50,8,3       ## @MMC_TIMING_UHS_DDR50
	.comm	_DDR,4,2                        ## @DDR
	.comm	_DW8,4,2                        ## @DW8
	.comm	_HCTL,4,2                       ## @HCTL
	.comm	_FOUR_BIT,4,2                   ## @FOUR_BIT
	.no_dead_strip	_omap_hsmmc_set_bus_width
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function omap_hsmmc_set_bus_width
_omap_hsmmc_set_bus_width:              ; @omap_hsmmc_set_bus_width
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x21, [x0, #8]
	ldr	w0, [x0]
Lloh0:
	adrp	x20, _CON@GOTPAGE
Lloh1:
	ldr	x20, [x20, _CON@GOTPAGEOFF]
	ldr	w1, [x20]
	bl	_OMAP_HSMMC_READ
	ldr	x8, [x21]
Lloh2:
	adrp	x9, _MMC_TIMING_MMC_DDR52@GOTPAGE
Lloh3:
	ldr	x9, [x9, _MMC_TIMING_MMC_DDR52@GOTPAGEOFF]
Lloh4:
	adrp	x10, _MMC_TIMING_UHS_DDR50@GOTPAGE
Lloh5:
	ldr	x10, [x10, _MMC_TIMING_UHS_DDR50@GOTPAGEOFF]
Lloh6:
	ldr	x9, [x9]
Lloh7:
	ldr	x10, [x10]
	cmp	x8, x10
	ccmp	x8, x9, #4, ne
Lloh8:
	adrp	x8, _DDR@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DDR@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	orr	w9, w8, w0
	bic	w8, w0, w8
	csel	w8, w9, w8, eq
	ldr	w9, [x21, #8]
	cmp	w9, #130
	b.eq	LBB0_4
; %bb.1:
	cmp	w9, #129
	b.eq	LBB0_5
; %bb.2:
	cmp	w9, #128
	b.ne	LBB0_8
; %bb.3:
	ldr	w0, [x19]
Lloh11:
	adrp	x9, _DW8@GOTPAGE
Lloh12:
	ldr	x9, [x9, _DW8@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh13:
	ldr	w9, [x9]
	orr	w2, w9, w8
	b	LBB0_7
LBB0_4:
	ldr	w0, [x19]
	ldr	w1, [x20]
Lloh14:
	adrp	x9, _DW8@GOTPAGE
Lloh15:
	ldr	x9, [x9, _DW8@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	bic	w2, w8, w9
	bl	_OMAP_HSMMC_WRITE
	ldr	w19, [x19]
Lloh17:
	adrp	x8, _HCTL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _HCTL@GOTPAGEOFF]
Lloh19:
	ldr	w20, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_OMAP_HSMMC_READ
Lloh20:
	adrp	x8, _FOUR_BIT@GOTPAGE
Lloh21:
	ldr	x8, [x8, _FOUR_BIT@GOTPAGEOFF]
Lloh22:
	ldr	w8, [x8]
	bic	w2, w0, w8
	b	LBB0_6
LBB0_5:
	ldr	w0, [x19]
	ldr	w1, [x20]
Lloh23:
	adrp	x9, _DW8@GOTPAGE
Lloh24:
	ldr	x9, [x9, _DW8@GOTPAGEOFF]
Lloh25:
	ldr	w9, [x9]
	bic	w2, w8, w9
	bl	_OMAP_HSMMC_WRITE
	ldr	w19, [x19]
Lloh26:
	adrp	x8, _HCTL@GOTPAGE
Lloh27:
	ldr	x8, [x8, _HCTL@GOTPAGEOFF]
Lloh28:
	ldr	w20, [x8]
	mov	x0, x19
	mov	x1, x20
	bl	_OMAP_HSMMC_READ
Lloh29:
	adrp	x8, _FOUR_BIT@GOTPAGE
Lloh30:
	ldr	x8, [x8, _FOUR_BIT@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	orr	w2, w8, w0
LBB0_6:
	mov	x0, x19
	mov	x1, x20
LBB0_7:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_OMAP_HSMMC_WRITE
LBB0_8:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh6
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.cfi_endproc
                                        ; -- End function
	.comm	_CON,4,2                        ; @CON
	.comm	_MMC_TIMING_MMC_DDR52,8,3       ; @MMC_TIMING_MMC_DDR52
	.comm	_MMC_TIMING_UHS_DDR50,8,3       ; @MMC_TIMING_UHS_DDR50
	.comm	_DDR,4,2                        ; @DDR
	.comm	_DW8,4,2                        ; @DW8
	.comm	_HCTL,4,2                       ; @HCTL
	.comm	_FOUR_BIT,4,2                   ; @FOUR_BIT
	.no_dead_strip	_omap_hsmmc_set_bus_width
.subsections_via_symbols
