	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vfe_bus_connect_wm_to_rdi
_vfe_bus_connect_wm_to_rdi:             ## @vfe_bus_connect_wm_to_rdi
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r13d
	movl	%esi, %r14d
	movq	%rdi, %r15
	movq	_VFE_0_RDI_CFG_x_MIPI_EN_BITS@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	xorl	%edi, %edi
	callq	_VFE_0_RDI_CFG_x
	movq	%r15, %rdi
	movl	%eax, %esi
	movl	%r12d, %edx
	callq	_vfe_reg_set
	movq	_VFE_0_RDI_CFG_x_RDI_EN_BIT@GOTPCREL(%rip), %rax
	leal	(%r13,%r13,2), %ebx
	movq	_VFE_0_RDI_CFG_x_RDI_STREAM_SEL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %ebx
	movq	_VFE_0_RDI_CFG_x_RDI_STREAM_SEL_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %ebx
	orl	(%rax), %ebx
	movl	%r13d, %edi
	callq	_VFE_0_RDI_CFG_x
	movq	%r15, %rdi
	movl	%eax, %esi
	movl	%ebx, %edx
	callq	_vfe_reg_set
	cmpl	$129, %r13d
	jne	LBB0_1
## %bb.2:
	movq	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI1@GOTPCREL(%rip), %rax
	cmpl	$128, %r13d
	je	LBB0_4
	jmp	LBB0_5
LBB0_1:
	movq	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI0@GOTPCREL(%rip), %rax
	cmpl	$128, %r13d
	jne	LBB0_5
LBB0_4:
	movq	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI2@GOTPCREL(%rip), %rax
LBB0_5:
	movl	(%rax), %eax
	movq	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movl	%r14d, %ecx
	andl	$-2147483647, %ecx              ## imm = 0x80000001
	movl	%eax, %ebx
	shll	$16, %ebx
	cmpl	$1, %ecx
	cmovnel	%eax, %ebx
	movl	%r14d, %edi
	callq	_VFE_0_BUS_XBAR_CFG_x
	movq	%r15, %rdi
	movl	%eax, %esi
	movl	%ebx, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_vfe_reg_set                    ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_VFE_0_RDI_CFG_x_MIPI_EN_BITS,4,2 ## @VFE_0_RDI_CFG_x_MIPI_EN_BITS
	.comm	_VFE_0_RDI_CFG_x_RDI_EN_BIT,4,2 ## @VFE_0_RDI_CFG_x_RDI_EN_BIT
	.comm	_VFE_0_RDI_CFG_x_RDI_STREAM_SEL_SHIFT,4,2 ## @VFE_0_RDI_CFG_x_RDI_STREAM_SEL_SHIFT
	.comm	_VFE_0_RDI_CFG_x_RDI_STREAM_SEL_MASK,4,2 ## @VFE_0_RDI_CFG_x_RDI_STREAM_SEL_MASK
	.comm	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI0,4,2 ## @VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI0
	.comm	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_SHIFT,4,2 ## @VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_SHIFT
	.comm	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI1,4,2 ## @VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI1
	.comm	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI2,4,2 ## @VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI2
	.no_dead_strip	_vfe_bus_connect_wm_to_rdi
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vfe_bus_connect_wm_to_rdi
_vfe_bus_connect_wm_to_rdi:             ; @vfe_bus_connect_wm_to_rdi
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x2
	mov	x21, x1
	mov	x19, x0
Lloh0:
	adrp	x8, _VFE_0_RDI_CFG_x_MIPI_EN_BITS@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VFE_0_RDI_CFG_x_MIPI_EN_BITS@GOTPAGEOFF]
Lloh2:
	ldr	w22, [x8]
	mov	w0, #0
	bl	_VFE_0_RDI_CFG_x
	mov	x1, x0
	mov	x0, x19
	mov	x2, x22
	bl	_vfe_reg_set
Lloh3:
	adrp	x8, _VFE_0_RDI_CFG_x_RDI_EN_BIT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _VFE_0_RDI_CFG_x_RDI_EN_BIT@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	add	w9, w20, w20, lsl #1
Lloh6:
	adrp	x10, _VFE_0_RDI_CFG_x_RDI_STREAM_SEL_SHIFT@GOTPAGE
Lloh7:
	ldr	x10, [x10, _VFE_0_RDI_CFG_x_RDI_STREAM_SEL_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
	lsl	w9, w9, w10
Lloh9:
	adrp	x10, _VFE_0_RDI_CFG_x_RDI_STREAM_SEL_MASK@GOTPAGE
Lloh10:
	ldr	x10, [x10, _VFE_0_RDI_CFG_x_RDI_STREAM_SEL_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w10, [x10]
	and	w9, w9, w10
	orr	w22, w9, w8
	mov	x0, x20
	bl	_VFE_0_RDI_CFG_x
	mov	x1, x0
	mov	x0, x19
	mov	x2, x22
	bl	_vfe_reg_set
Lloh12:
	adrp	x8, _VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI2@GOTPAGE
Lloh13:
	ldr	x8, [x8, _VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI2@GOTPAGEOFF]
Lloh14:
	adrp	x9, _VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI1@GOTPAGE
Lloh15:
	ldr	x9, [x9, _VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI1@GOTPAGEOFF]
Lloh16:
	adrp	x10, _VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI0@GOTPAGE
Lloh17:
	ldr	x10, [x10, _VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI0@GOTPAGEOFF]
	cmp	w20, #129
	csel	x9, x9, x10, eq
	cmp	w20, #128
	csel	x8, x8, x9, eq
	ldr	w8, [x8]
Lloh18:
	adrp	x9, _VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_SHIFT@GOTPAGE
Lloh19:
	ldr	x9, [x9, _VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_SHIFT@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	and	w9, w21, #0x80000001
	lsl	w10, w8, #16
	cmp	w9, #1
	csel	w20, w10, w8, eq
	mov	x0, x21
	bl	_VFE_0_BUS_XBAR_CFG_x
	mov	x1, x0
	mov	x0, x19
	mov	x2, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_vfe_reg_set
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh16, Lloh17
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_VFE_0_RDI_CFG_x_MIPI_EN_BITS,4,2 ; @VFE_0_RDI_CFG_x_MIPI_EN_BITS
	.comm	_VFE_0_RDI_CFG_x_RDI_EN_BIT,4,2 ; @VFE_0_RDI_CFG_x_RDI_EN_BIT
	.comm	_VFE_0_RDI_CFG_x_RDI_STREAM_SEL_SHIFT,4,2 ; @VFE_0_RDI_CFG_x_RDI_STREAM_SEL_SHIFT
	.comm	_VFE_0_RDI_CFG_x_RDI_STREAM_SEL_MASK,4,2 ; @VFE_0_RDI_CFG_x_RDI_STREAM_SEL_MASK
	.comm	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI0,4,2 ; @VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI0
	.comm	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_SHIFT,4,2 ; @VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_SHIFT
	.comm	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI1,4,2 ; @VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI1
	.comm	_VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI2,4,2 ; @VFE_0_BUS_XBAR_CFG_x_M_SINGLE_STREAM_SEL_VAL_RDI2
	.no_dead_strip	_vfe_bus_connect_wm_to_rdi
.subsections_via_symbols
