	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function arm_smmu_setup_unique_irqs
_arm_smmu_setup_unique_irqs:            ## @arm_smmu_setup_unique_irqs
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	callq	_arm_smmu_setup_msis
	movl	8(%rbx), %edi
	movl	16(%rbx), %esi
	testl	%esi, %esi
	je	LBB0_3
## %bb.1:
	movq	_arm_smmu_evtq_thread@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_IRQF_ONESHOT@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%rbx, (%rsp)
	leaq	L_.str(%rip), %r9
	xorl	%edx, %edx
	callq	_devm_request_threaded_irq
	testl	%eax, %eax
	jns	LBB0_5
## %bb.2:
	movl	8(%rbx), %edi
	leaq	L_.str.1(%rip), %rsi
	jmp	LBB0_4
LBB0_3:
	leaq	L_.str.2(%rip), %rsi
LBB0_4:
	callq	_dev_warn
LBB0_5:
	movl	(%rbx), %esi
	movl	8(%rbx), %edi
	testl	%esi, %esi
	je	LBB0_8
## %bb.6:
	movq	_arm_smmu_gerror_handler@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leaq	L_.str.3(%rip), %r8
	xorl	%ecx, %ecx
	movq	%rbx, %r9
	callq	_devm_request_irq
	testl	%eax, %eax
	jns	LBB0_10
## %bb.7:
	movl	8(%rbx), %edi
	leaq	L_.str.4(%rip), %rsi
	jmp	LBB0_9
LBB0_8:
	leaq	L_.str.5(%rip), %rsi
LBB0_9:
	callq	_dev_warn
LBB0_10:
	movq	_ARM_SMMU_FEAT_PRI@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 4(%rbx)
	je	LBB0_16
## %bb.11:
	movl	8(%rbx), %edi
	movl	12(%rbx), %esi
	testl	%esi, %esi
	je	LBB0_14
## %bb.12:
	movq	_arm_smmu_priq_thread@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_IRQF_ONESHOT@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%rbx, (%rsp)
	leaq	L_.str.6(%rip), %r9
	xorl	%edx, %edx
	callq	_devm_request_threaded_irq
	testl	%eax, %eax
	js	LBB0_13
LBB0_16:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
LBB0_14:
	leaq	L_.str.8(%rip), %rsi
	jmp	LBB0_15
LBB0_13:
	movl	8(%rbx), %edi
	leaq	L_.str.7(%rip), %rsi
LBB0_15:
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_dev_warn                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_arm_smmu_evtq_thread,4,2       ## @arm_smmu_evtq_thread
	.comm	_IRQF_ONESHOT,4,2               ## @IRQF_ONESHOT
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"arm-smmu-v3-evtq"

L_.str.1:                               ## @.str.1
	.asciz	"failed to enable evtq irq\n"

L_.str.2:                               ## @.str.2
	.asciz	"no evtq irq - events will not be reported!\n"

	.comm	_arm_smmu_gerror_handler,4,2    ## @arm_smmu_gerror_handler
L_.str.3:                               ## @.str.3
	.asciz	"arm-smmu-v3-gerror"

L_.str.4:                               ## @.str.4
	.asciz	"failed to enable gerror irq\n"

L_.str.5:                               ## @.str.5
	.asciz	"no gerr irq - errors will not be reported!\n"

	.comm	_ARM_SMMU_FEAT_PRI,4,2          ## @ARM_SMMU_FEAT_PRI
	.comm	_arm_smmu_priq_thread,4,2       ## @arm_smmu_priq_thread
L_.str.6:                               ## @.str.6
	.asciz	"arm-smmu-v3-priq"

L_.str.7:                               ## @.str.7
	.asciz	"failed to enable priq irq\n"

L_.str.8:                               ## @.str.8
	.asciz	"no priq irq - PRI will be broken\n"

	.no_dead_strip	_arm_smmu_setup_unique_irqs
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function arm_smmu_setup_unique_irqs
_arm_smmu_setup_unique_irqs:            ; @arm_smmu_setup_unique_irqs
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_arm_smmu_setup_msis
	ldr	w1, [x19, #16]
	ldr	w0, [x19, #8]
Lloh0:
	adrp	x20, _IRQF_ONESHOT@GOTPAGE
Lloh1:
	ldr	x20, [x20, _IRQF_ONESHOT@GOTPAGEOFF]
	cbz	w1, LBB0_3
; %bb.1:
Lloh2:
	adrp	x8, _arm_smmu_evtq_thread@GOTPAGE
Lloh3:
	ldr	x8, [x8, _arm_smmu_evtq_thread@GOTPAGEOFF]
Lloh4:
	ldr	w3, [x8]
	ldr	w4, [x20]
Lloh5:
	adrp	x5, l_.str@PAGE
Lloh6:
	add	x5, x5, l_.str@PAGEOFF
	mov	x2, #0
	mov	x6, x19
	bl	_devm_request_threaded_irq
	tbz	w0, #31, LBB0_5
; %bb.2:
	ldr	w0, [x19, #8]
Lloh7:
	adrp	x1, l_.str.1@PAGE
Lloh8:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_4
LBB0_3:
Lloh9:
	adrp	x1, l_.str.2@PAGE
Lloh10:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_4:
	bl	_dev_warn
LBB0_5:
	ldr	w1, [x19]
	ldr	w0, [x19, #8]
	cbz	w1, LBB0_8
; %bb.6:
Lloh11:
	adrp	x8, _arm_smmu_gerror_handler@GOTPAGE
Lloh12:
	ldr	x8, [x8, _arm_smmu_gerror_handler@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
Lloh14:
	adrp	x4, l_.str.3@PAGE
Lloh15:
	add	x4, x4, l_.str.3@PAGEOFF
	mov	w3, #0
	mov	x5, x19
	bl	_devm_request_irq
	tbz	w0, #31, LBB0_10
; %bb.7:
	ldr	w0, [x19, #8]
Lloh16:
	adrp	x1, l_.str.4@PAGE
Lloh17:
	add	x1, x1, l_.str.4@PAGEOFF
	b	LBB0_9
LBB0_8:
Lloh18:
	adrp	x1, l_.str.5@PAGE
Lloh19:
	add	x1, x1, l_.str.5@PAGEOFF
LBB0_9:
	bl	_dev_warn
LBB0_10:
	ldr	w8, [x19, #4]
Lloh20:
	adrp	x9, _ARM_SMMU_FEAT_PRI@GOTPAGE
Lloh21:
	ldr	x9, [x9, _ARM_SMMU_FEAT_PRI@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_13
; %bb.11:
	ldp	w0, w1, [x19, #8]
	cbz	w1, LBB0_14
; %bb.12:
Lloh23:
	adrp	x8, _arm_smmu_priq_thread@GOTPAGE
Lloh24:
	ldr	x8, [x8, _arm_smmu_priq_thread@GOTPAGEOFF]
Lloh25:
	ldr	w3, [x8]
	ldr	w4, [x20]
Lloh26:
	adrp	x5, l_.str.6@PAGE
Lloh27:
	add	x5, x5, l_.str.6@PAGEOFF
	mov	x2, #0
	mov	x6, x19
	bl	_devm_request_threaded_irq
	tbnz	w0, #31, LBB0_15
LBB0_13:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_14:
Lloh28:
	adrp	x1, l_.str.8@PAGE
Lloh29:
	add	x1, x1, l_.str.8@PAGEOFF
	b	LBB0_16
LBB0_15:
	ldr	w0, [x19, #8]
Lloh30:
	adrp	x1, l_.str.7@PAGE
Lloh31:
	add	x1, x1, l_.str.7@PAGEOFF
LBB0_16:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_dev_warn
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpAdd	Lloh7, Lloh8
	.loh AdrpAdd	Lloh9, Lloh10
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpAdd	Lloh28, Lloh29
	.loh AdrpAdd	Lloh30, Lloh31
	.cfi_endproc
                                        ; -- End function
	.comm	_arm_smmu_evtq_thread,4,2       ; @arm_smmu_evtq_thread
	.comm	_IRQF_ONESHOT,4,2               ; @IRQF_ONESHOT
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"arm-smmu-v3-evtq"

l_.str.1:                               ; @.str.1
	.asciz	"failed to enable evtq irq\n"

l_.str.2:                               ; @.str.2
	.asciz	"no evtq irq - events will not be reported!\n"

	.comm	_arm_smmu_gerror_handler,4,2    ; @arm_smmu_gerror_handler
l_.str.3:                               ; @.str.3
	.asciz	"arm-smmu-v3-gerror"

l_.str.4:                               ; @.str.4
	.asciz	"failed to enable gerror irq\n"

l_.str.5:                               ; @.str.5
	.asciz	"no gerr irq - errors will not be reported!\n"

	.comm	_ARM_SMMU_FEAT_PRI,4,2          ; @ARM_SMMU_FEAT_PRI
	.comm	_arm_smmu_priq_thread,4,2       ; @arm_smmu_priq_thread
l_.str.6:                               ; @.str.6
	.asciz	"arm-smmu-v3-priq"

l_.str.7:                               ; @.str.7
	.asciz	"failed to enable priq irq\n"

l_.str.8:                               ; @.str.8
	.asciz	"no priq irq - PRI will be broken\n"

	.no_dead_strip	_arm_smmu_setup_unique_irqs
.subsections_via_symbols
