	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rts5260_extra_init_hw
_rts5260_extra_init_hw:                 ## @rts5260_extra_init_hw
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movl	$64515, %esi                    ## imm = 0xFC03
	movl	$127, %edx
	movl	$7, %ecx
	callq	_rtsx_pci_write_register
	movq	_SSC_DIV_N_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$255, %edx
	movl	$93, %ecx
	callq	_rtsx_pci_write_register
	movq	%rbx, %rdi
	callq	_rts5260_init_from_cfg
	movq	_RTS5260_AUTOLOAD_CFG4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RTS5260_MIMO_DISABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	$255, %edx
	callq	_rtsx_pci_write_register
	movq	_LDO_VCC_CFG0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RTS5260_DVCC_TUNE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_RTS5260_DVCC_33@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_rtsx_pci_write_register
	movq	_PCLK_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PCLK_MODE_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%ecx, %edx
	callq	_rtsx_pci_write_register
	movq	%rbx, %rdi
	callq	_rts5260_init_hw
	cmpq	$0, (%rbx)
	movq	_PETXCFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_FORCE_CLKREQ_DELINK_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	jne	LBB0_1
## %bb.2:
	movq	_FORCE_CLKREQ_HIGH@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_FORCE_CLKREQ_LOW@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_rtsx_pci_write_register
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SSC_DIV_N_0,4,2                ## @SSC_DIV_N_0
	.comm	_RTS5260_AUTOLOAD_CFG4,4,2      ## @RTS5260_AUTOLOAD_CFG4
	.comm	_RTS5260_MIMO_DISABLE,4,2       ## @RTS5260_MIMO_DISABLE
	.comm	_LDO_VCC_CFG0,4,2               ## @LDO_VCC_CFG0
	.comm	_RTS5260_DVCC_TUNE_MASK,4,2     ## @RTS5260_DVCC_TUNE_MASK
	.comm	_RTS5260_DVCC_33,4,2            ## @RTS5260_DVCC_33
	.comm	_PCLK_CTL,4,2                   ## @PCLK_CTL
	.comm	_PCLK_MODE_SEL,4,2              ## @PCLK_MODE_SEL
	.comm	_PETXCFG,4,2                    ## @PETXCFG
	.comm	_FORCE_CLKREQ_DELINK_MASK,4,2   ## @FORCE_CLKREQ_DELINK_MASK
	.comm	_FORCE_CLKREQ_LOW,4,2           ## @FORCE_CLKREQ_LOW
	.comm	_FORCE_CLKREQ_HIGH,4,2          ## @FORCE_CLKREQ_HIGH
	.no_dead_strip	_rts5260_extra_init_hw
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rts5260_extra_init_hw
_rts5260_extra_init_hw:                 ; @rts5260_extra_init_hw
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	mov	w1, #64515
	mov	w2, #127
	mov	w3, #7
	bl	_rtsx_pci_write_register
Lloh0:
	adrp	x8, _SSC_DIV_N_0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SSC_DIV_N_0@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #255
	mov	w3, #93
	bl	_rtsx_pci_write_register
	mov	x0, x19
	bl	_rts5260_init_from_cfg
Lloh3:
	adrp	x8, _RTS5260_AUTOLOAD_CFG4@GOTPAGE
Lloh4:
	ldr	x8, [x8, _RTS5260_AUTOLOAD_CFG4@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
Lloh6:
	adrp	x8, _RTS5260_MIMO_DISABLE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _RTS5260_MIMO_DISABLE@GOTPAGEOFF]
Lloh8:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w2, #255
	bl	_rtsx_pci_write_register
Lloh9:
	adrp	x8, _LDO_VCC_CFG0@GOTPAGE
Lloh10:
	ldr	x8, [x8, _LDO_VCC_CFG0@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
Lloh12:
	adrp	x8, _RTS5260_DVCC_TUNE_MASK@GOTPAGE
Lloh13:
	ldr	x8, [x8, _RTS5260_DVCC_TUNE_MASK@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
Lloh15:
	adrp	x8, _RTS5260_DVCC_33@GOTPAGE
Lloh16:
	ldr	x8, [x8, _RTS5260_DVCC_33@GOTPAGEOFF]
Lloh17:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_rtsx_pci_write_register
Lloh18:
	adrp	x8, _PCLK_CTL@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PCLK_CTL@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
Lloh21:
	adrp	x8, _PCLK_MODE_SEL@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PCLK_MODE_SEL@GOTPAGEOFF]
Lloh23:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x3, x2
	bl	_rtsx_pci_write_register
	mov	x0, x19
	bl	_rts5260_init_hw
Lloh24:
	adrp	x8, _PETXCFG@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PETXCFG@GOTPAGEOFF]
	ldr	x9, [x19]
Lloh26:
	ldr	w1, [x8]
Lloh27:
	adrp	x8, _FORCE_CLKREQ_DELINK_MASK@GOTPAGE
Lloh28:
	ldr	x8, [x8, _FORCE_CLKREQ_DELINK_MASK@GOTPAGEOFF]
Lloh29:
	adrp	x10, _FORCE_CLKREQ_HIGH@GOTPAGE
Lloh30:
	ldr	x10, [x10, _FORCE_CLKREQ_HIGH@GOTPAGEOFF]
Lloh31:
	ldr	w2, [x8]
Lloh32:
	adrp	x8, _FORCE_CLKREQ_LOW@GOTPAGE
Lloh33:
	ldr	x8, [x8, _FORCE_CLKREQ_LOW@GOTPAGEOFF]
	cmp	x9, #0
	csel	x8, x10, x8, eq
	ldr	w3, [x8]
	mov	x0, x19
	bl	_rtsx_pci_write_register
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh31
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SSC_DIV_N_0,4,2                ; @SSC_DIV_N_0
	.comm	_RTS5260_AUTOLOAD_CFG4,4,2      ; @RTS5260_AUTOLOAD_CFG4
	.comm	_RTS5260_MIMO_DISABLE,4,2       ; @RTS5260_MIMO_DISABLE
	.comm	_LDO_VCC_CFG0,4,2               ; @LDO_VCC_CFG0
	.comm	_RTS5260_DVCC_TUNE_MASK,4,2     ; @RTS5260_DVCC_TUNE_MASK
	.comm	_RTS5260_DVCC_33,4,2            ; @RTS5260_DVCC_33
	.comm	_PCLK_CTL,4,2                   ; @PCLK_CTL
	.comm	_PCLK_MODE_SEL,4,2              ; @PCLK_MODE_SEL
	.comm	_PETXCFG,4,2                    ; @PETXCFG
	.comm	_FORCE_CLKREQ_DELINK_MASK,4,2   ; @FORCE_CLKREQ_DELINK_MASK
	.comm	_FORCE_CLKREQ_LOW,4,2           ; @FORCE_CLKREQ_LOW
	.comm	_FORCE_CLKREQ_HIGH,4,2          ; @FORCE_CLKREQ_HIGH
	.no_dead_strip	_rts5260_extra_init_hw
.subsections_via_symbols
