	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_load_pcie_firmware             ## -- Begin function load_pcie_firmware
	.p2align	4, 0x90
_load_pcie_firmware:                    ## @load_pcie_firmware
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	callq	_set_sbus_fast_mode
	movq	_fw_sbus_load@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_7
## %bb.1:
	movq	_SPICO_SBUS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_turn_off_spicos
	movq	_fw_sbus@GOTPCREL(%rip), %r15
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_load_sbus_firmware
	movl	%eax, %ebx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_retry_firmware
	testq	%rax, %rax
	jne	LBB0_2
## %bb.3:
	testl	%ebx, %ebx
	jne	LBB0_9
## %bb.4:
	movq	_fw_pcie_serdes_load@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	jne	LBB0_5
	jmp	LBB0_9
LBB0_7:
	movq	_fw_pcie_serdes_load@GOTPCREL(%rip), %rax
	cmpq	$0, (%rax)
	je	LBB0_8
LBB0_5:
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	callq	_dd_dev_info
	movq	_all_pcie_serdes_broadcast@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_pcie_serdes_broadcast@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	(%r14), %rcx
	movl	(%rax,%rcx,4), %edx
	movq	_pcie_serdes_addrs@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movl	(%rax,%rcx,4), %ecx
	movq	_NUM_PCIE_SERDES@GOTPCREL(%rip), %rax
	movl	(%rax), %r8d
	movq	%r14, %rdi
	callq	_set_serdes_broadcast
	movq	_fw_pcie@GOTPCREL(%rip), %r15
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_load_pcie_serdes_firmware
	movl	%eax, %ebx
	movq	%r14, %rdi
	movl	%eax, %esi
	callq	_retry_firmware
	testq	%rax, %rax
	jne	LBB0_6
	jmp	LBB0_9
LBB0_8:
	xorl	%ebx, %ebx
LBB0_9:
	movq	%r14, %rdi
	callq	_clear_sbus_fast_mode
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_fw_sbus_load,8,3               ## @fw_sbus_load
	.comm	_SPICO_SBUS,4,2                 ## @SPICO_SBUS
	.comm	_fw_sbus,4,2                    ## @fw_sbus
	.comm	_fw_pcie_serdes_load,8,3        ## @fw_pcie_serdes_load
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Setting PCIe SerDes broadcast\n"

	.comm	_all_pcie_serdes_broadcast,4,2  ## @all_pcie_serdes_broadcast
	.comm	_pcie_serdes_broadcast,8,3      ## @pcie_serdes_broadcast
	.comm	_pcie_serdes_addrs,8,3          ## @pcie_serdes_addrs
	.comm	_NUM_PCIE_SERDES,4,2            ## @NUM_PCIE_SERDES
	.comm	_fw_pcie,4,2                    ## @fw_pcie
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_load_pcie_firmware             ; -- Begin function load_pcie_firmware
	.p2align	2
_load_pcie_firmware:                    ; @load_pcie_firmware
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_set_sbus_fast_mode
Lloh0:
	adrp	x8, _fw_sbus_load@GOTPAGE
Lloh1:
	ldr	x8, [x8, _fw_sbus_load@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	cbz	x8, LBB0_4
; %bb.1:
Lloh3:
	adrp	x8, _SPICO_SBUS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SPICO_SBUS@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_turn_off_spicos
Lloh6:
	adrp	x21, _fw_sbus@GOTPAGE
Lloh7:
	ldr	x21, [x21, _fw_sbus@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x21
	bl	_load_sbus_firmware
	mov	x20, x0
	mov	x0, x19
	mov	x1, x20
	bl	_retry_firmware
	cbnz	x0, LBB0_2
; %bb.3:
Lloh8:
	adrp	x8, _fw_pcie_serdes_load@GOTPAGE
Lloh9:
	ldr	x8, [x8, _fw_pcie_serdes_load@GOTPAGEOFF]
Lloh10:
	ldr	x8, [x8]
	cmp	w20, #0
	ccmp	x8, #0, #4, eq
	b.ne	LBB0_5
	b	LBB0_8
LBB0_4:
Lloh11:
	adrp	x8, _fw_pcie_serdes_load@GOTPAGE
Lloh12:
	ldr	x8, [x8, _fw_pcie_serdes_load@GOTPAGEOFF]
Lloh13:
	ldr	x8, [x8]
	cbz	x8, LBB0_7
LBB0_5:
Lloh14:
	adrp	x1, l_.str@PAGE
Lloh15:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_dd_dev_info
Lloh16:
	adrp	x8, _all_pcie_serdes_broadcast@GOTPAGE
Lloh17:
	ldr	x8, [x8, _all_pcie_serdes_broadcast@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
Lloh19:
	adrp	x8, _pcie_serdes_broadcast@GOTPAGE
Lloh20:
	ldr	x8, [x8, _pcie_serdes_broadcast@GOTPAGEOFF]
Lloh21:
	ldr	x8, [x8]
	ldr	x9, [x19]
	lsl	x9, x9, #2
	ldr	w2, [x8, x9]
Lloh22:
	adrp	x8, _pcie_serdes_addrs@GOTPAGE
Lloh23:
	ldr	x8, [x8, _pcie_serdes_addrs@GOTPAGEOFF]
Lloh24:
	ldr	x8, [x8]
	ldr	w3, [x8, x9]
Lloh25:
	adrp	x8, _NUM_PCIE_SERDES@GOTPAGE
Lloh26:
	ldr	x8, [x8, _NUM_PCIE_SERDES@GOTPAGEOFF]
Lloh27:
	ldr	w4, [x8]
	mov	x0, x19
	bl	_set_serdes_broadcast
Lloh28:
	adrp	x21, _fw_pcie@GOTPAGE
Lloh29:
	ldr	x21, [x21, _fw_pcie@GOTPAGEOFF]
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x19
	mov	x1, x21
	bl	_load_pcie_serdes_firmware
	mov	x20, x0
	mov	x0, x19
	mov	x1, x20
	bl	_retry_firmware
	cbnz	x0, LBB0_6
	b	LBB0_8
LBB0_7:
	mov	w20, #0
LBB0_8:
	mov	x0, x19
	bl	_clear_sbus_fast_mode
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh14, Lloh15
	.cfi_endproc
                                        ; -- End function
	.comm	_fw_sbus_load,8,3               ; @fw_sbus_load
	.comm	_SPICO_SBUS,4,2                 ; @SPICO_SBUS
	.comm	_fw_sbus,4,2                    ; @fw_sbus
	.comm	_fw_pcie_serdes_load,8,3        ; @fw_pcie_serdes_load
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Setting PCIe SerDes broadcast\n"

	.comm	_all_pcie_serdes_broadcast,4,2  ; @all_pcie_serdes_broadcast
	.comm	_pcie_serdes_broadcast,8,3      ; @pcie_serdes_broadcast
	.comm	_pcie_serdes_addrs,8,3          ; @pcie_serdes_addrs
	.comm	_NUM_PCIE_SERDES,4,2            ; @NUM_PCIE_SERDES
	.comm	_fw_pcie,4,2                    ; @fw_pcie
.subsections_via_symbols
