	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdhci_arasan_probe
_sdhci_arasan_probe:                    ## @sdhci_arasan_probe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r13
	movq	(%rdi), %r12
	movq	_sdhci_arasan_of_match@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%r12, %rsi
	callq	_of_match_node
	movq	(%rax), %rbx
	movl	4(%rbx), %esi
	movq	%r13, %rdi
	movl	$56, %edx
	callq	_sdhci_pltfm_init
	movq	%rax, %r14
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_1
## %bb.40:
	movq	%r14, %rdi
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_PTR_ERR                        ## TAILCALL
LBB0_1:
	movq	%r14, %rdi
	callq	_sdhci_priv
	movq	%rax, -48(%rbp)                 ## 8-byte Spill
	movq	%rax, %rdi
	callq	_sdhci_pltfm_priv
	movq	%rax, %r15
	movq	%r14, 48(%rax)
	movl	(%rbx), %eax
	movl	%eax, 40(%r15)
	movq	(%r13), %rdi
	leaq	L_.str(%rip), %rsi
	xorl	%edx, %edx
	callq	_of_parse_phandle
	testq	%rax, %rax
	je	LBB0_5
## %bb.2:
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_syscon_node_to_regmap
	movq	%rax, 32(%r15)
	movq	%rbx, %rdi
	callq	_of_node_put
	movq	32(%r15), %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_5
## %bb.3:
	movq	32(%r15), %rdi
	callq	_PTR_ERR
	movl	%eax, %r15d
	movq	_EPROBE_DEFER@GOTPCREL(%rip), %rax
	movl	%r15d, %ecx
	addl	(%rax), %ecx
	je	LBB0_38
## %bb.4:
	leaq	L_.str.1(%rip), %rsi
	movq	%r13, %rdi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_38
LBB0_5:
	leaq	L_.str.2(%rip), %rsi
	movq	%r13, %rdi
	callq	_devm_clk_get
	movq	%rax, 8(%r15)
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_7
## %bb.6:
	leaq	L_.str.3(%rip), %rsi
	movq	%r13, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movq	8(%r15), %rdi
	jmp	LBB0_9
LBB0_7:
	leaq	L_.str.4(%rip), %rsi
	movq	%r13, %rdi
	callq	_devm_clk_get
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	je	LBB0_10
## %bb.8:
	leaq	L_.str.5(%rip), %rsi
	movq	%r13, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movq	%rbx, %rdi
LBB0_9:
	callq	_PTR_ERR
	movl	%eax, %r15d
LBB0_38:
	movq	%r13, %rdi
	callq	_sdhci_pltfm_free
LBB0_39:
	movl	%r15d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_10:
	movq	8(%r15), %rdi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_12
## %bb.11:
	movl	%eax, %r15d
	leaq	L_.str.6(%rip), %rsi
	movq	%r13, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_38
LBB0_12:
	movq	%r15, -56(%rbp)                 ## 8-byte Spill
	movq	%rbx, %rdi
	callq	_clk_prepare_enable
	testl	%eax, %eax
	je	LBB0_14
## %bb.13:
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	leaq	L_.str.7(%rip), %rsi
	movq	%r13, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	jmp	LBB0_37
LBB0_14:
	movq	%rbx, -64(%rbp)                 ## 8-byte Spill
	movq	%r13, %rdi
	callq	_sdhci_get_of_property
	leaq	L_.str.8(%rip), %rsi
	movq	%r12, %rdi
	callq	_of_property_read_bool
	testq	%rax, %rax
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	je	LBB0_16
## %bb.15:
	movq	_SDHCI_ARASAN_QUIRK_FORCE_CDTEST@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 24(%r15)
LBB0_16:
	leaq	L_.str.9(%rip), %rsi
	movq	%r12, %rdi
	callq	_of_property_read_bool
	testq	%rax, %rax
	je	LBB0_18
## %bb.17:
	movq	_SDHCI_ARASAN_QUIRK_CLOCK_UNSTABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, 24(%r15)
LBB0_18:
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movq	-48(%rbp), %rcx                 ## 8-byte Reload
	movq	%rax, (%rcx)
	movq	(%r13), %rdi
	leaq	L_.str.10(%rip), %rsi
	callq	_of_device_is_compatible
	testq	%rax, %rax
	je	LBB0_20
## %bb.19:
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_sdhci_arasan_update_clockmultiplier
LBB0_20:
	movq	%r14, %rdi
	callq	_sdhci_arasan_update_baseclkfreq
	movq	%r15, %rdi
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
	movq	%rbx, %rsi
	movq	%r13, %rdx
	callq	_sdhci_arasan_register_sdclk
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	testl	%eax, %eax
	jne	LBB0_36
## %bb.21:
	movq	(%r14), %rdi
	callq	_mmc_of_parse
	testl	%eax, %eax
	je	LBB0_24
## %bb.22:
	movq	_EPROBE_DEFER@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	addl	%eax, %ecx
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	je	LBB0_35
## %bb.23:
	leaq	L_.str.11(%rip), %rsi
	movq	%r13, %rdi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_err
	jmp	LBB0_35
LBB0_24:
	movq	_ENODEV@GOTPCREL(%rip), %rax
	movq	%r15, %rbx
	xorl	%r15d, %r15d
	xorl	%edi, %edi
	subl	(%rax), %edi
	callq	_ERR_PTR
	movq	%rax, 16(%rbx)
	movq	(%r13), %rdi
	leaq	L_.str.12(%rip), %rsi
	callq	_of_device_is_compatible
	testq	%rax, %rax
	je	LBB0_32
## %bb.25:
	leaq	L_.str.13(%rip), %rsi
	movq	%r13, %rdi
	callq	_devm_phy_get
	movq	%rax, 16(%rbx)
	movq	%rax, %rdi
	callq	_IS_ERR
	movq	16(%rbx), %rdi
	testq	%rax, %rax
	je	LBB0_27
## %bb.26:
	callq	_PTR_ERR
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	leaq	L_.str.14(%rip), %rsi
LBB0_29:
	movq	%r13, %rdi
	xorl	%eax, %eax
	callq	_dev_err
	movq	-56(%rbp), %r15                 ## 8-byte Reload
	jmp	LBB0_35
LBB0_27:
	callq	_phy_init
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	testl	%eax, %eax
	js	LBB0_28
## %bb.30:
	movq	_sdhci_arasan_hs400_enhanced_strobe@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%r14)
	movq	_sdhci_arasan_voltage_switch@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%r14)
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movl	$1, (%rbx)
	movq	_MMC_CAP2_CQE@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	(%r14), %rcx
	orl	%eax, (%rcx)
	leaq	L_.str.16(%rip), %rsi
	movq	%r12, %rdi
	callq	_of_property_read_bool
	testq	%rax, %rax
	jne	LBB0_32
## %bb.31:
	movq	_MMC_CAP2_CQE_DCMD@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	(%r14), %rcx
	orl	%eax, (%rcx)
LBB0_32:
	movq	%rbx, %rdi
	callq	_sdhci_arasan_add_host
	testl	%eax, %eax
	je	LBB0_39
## %bb.33:
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movq	16(%rbx), %rdi
	callq	_IS_ERR
	testq	%rax, %rax
	movq	%rbx, %r15
	jne	LBB0_35
## %bb.34:
	movq	16(%r15), %rdi
	callq	_phy_exit
LBB0_35:
	movq	%r13, %rdi
	callq	_sdhci_arasan_unregister_sdclk
	movq	-64(%rbp), %rbx                 ## 8-byte Reload
LBB0_36:
	movq	%rbx, %rdi
	callq	_clk_disable_unprepare
LBB0_37:
	movq	8(%r15), %rdi
	callq	_clk_disable_unprepare
	movl	-48(%rbp), %r15d                ## 4-byte Reload
	jmp	LBB0_38
LBB0_28:
	leaq	L_.str.15(%rip), %rsi
	jmp	LBB0_29
	.cfi_endproc
                                        ## -- End function
	.comm	_sdhci_arasan_of_match,4,2      ## @sdhci_arasan_of_match
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"arasan,soc-ctl-syscon"

	.comm	_EPROBE_DEFER,4,2               ## @EPROBE_DEFER
L_.str.1:                               ## @.str.1
	.asciz	"Can't get syscon: %d\n"

L_.str.2:                               ## @.str.2
	.asciz	"clk_ahb"

L_.str.3:                               ## @.str.3
	.asciz	"clk_ahb clock not found.\n"

L_.str.4:                               ## @.str.4
	.asciz	"clk_xin"

L_.str.5:                               ## @.str.5
	.asciz	"clk_xin clock not found.\n"

L_.str.6:                               ## @.str.6
	.asciz	"Unable to enable AHB clock.\n"

L_.str.7:                               ## @.str.7
	.asciz	"Unable to enable SD clock.\n"

L_.str.8:                               ## @.str.8
	.asciz	"xlnx,fails-without-test-cd"

	.comm	_SDHCI_ARASAN_QUIRK_FORCE_CDTEST,4,2 ## @SDHCI_ARASAN_QUIRK_FORCE_CDTEST
L_.str.9:                               ## @.str.9
	.asciz	"xlnx,int-clock-stable-broken"

	.comm	_SDHCI_ARASAN_QUIRK_CLOCK_UNSTABLE,4,2 ## @SDHCI_ARASAN_QUIRK_CLOCK_UNSTABLE
L_.str.10:                              ## @.str.10
	.asciz	"rockchip,rk3399-sdhci-5.1"

L_.str.11:                              ## @.str.11
	.asciz	"parsing dt failed (%d)\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
L_.str.12:                              ## @.str.12
	.asciz	"arasan,sdhci-5.1"

L_.str.13:                              ## @.str.13
	.asciz	"phy_arasan"

L_.str.14:                              ## @.str.14
	.asciz	"No phy for arasan,sdhci-5.1.\n"

L_.str.15:                              ## @.str.15
	.asciz	"phy_init err.\n"

	.comm	_sdhci_arasan_hs400_enhanced_strobe,4,2 ## @sdhci_arasan_hs400_enhanced_strobe
	.comm	_sdhci_arasan_voltage_switch,4,2 ## @sdhci_arasan_voltage_switch
	.comm	_MMC_CAP2_CQE,4,2               ## @MMC_CAP2_CQE
L_.str.16:                              ## @.str.16
	.asciz	"disable-cqe-dcmd"

	.comm	_MMC_CAP2_CQE_DCMD,4,2          ## @MMC_CAP2_CQE_DCMD
	.no_dead_strip	_sdhci_arasan_probe
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdhci_arasan_probe
_sdhci_arasan_probe:                    ; @sdhci_arasan_probe
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x22, [x0]
Lloh0:
	adrp	x8, _sdhci_arasan_of_match@GOTPAGE
Lloh1:
	ldr	x8, [x8, _sdhci_arasan_of_match@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	mov	x1, x22
	bl	_of_match_node
	ldr	x21, [x0]
	ldr	w1, [x21, #4]
	mov	x0, x19
	mov	w2, #56
	bl	_sdhci_pltfm_init
	mov	x23, x0
	bl	_IS_ERR
	cbz	x0, LBB0_2
; %bb.1:
	mov	x0, x23
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	b	_PTR_ERR
LBB0_2:
	mov	x0, x23
	bl	_sdhci_priv
	mov	x25, x0
	bl	_sdhci_pltfm_priv
	mov	x20, x0
	str	x23, [x0, #48]
	ldr	w8, [x21]
	str	w8, [x0, #40]
	ldr	x0, [x19]
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	mov	w2, #0
	bl	_of_parse_phandle
	cbz	x0, LBB0_6
; %bb.3:
	mov	x21, x0
	bl	_syscon_node_to_regmap
	str	x0, [x20, #32]
	mov	x0, x21
	bl	_of_node_put
	ldr	x0, [x20, #32]
	bl	_IS_ERR
	cbz	x0, LBB0_6
; %bb.4:
	ldr	x0, [x20, #32]
	bl	_PTR_ERR
	mov	x24, x0
Lloh5:
	adrp	x8, _EPROBE_DEFER@GOTPAGE
Lloh6:
	ldr	x8, [x8, _EPROBE_DEFER@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	cmn	w0, w8
	b.eq	LBB0_14
; %bb.5:
	str	x24, [sp]
Lloh8:
	adrp	x1, l_.str.1@PAGE
Lloh9:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_13
LBB0_6:
Lloh10:
	adrp	x1, l_.str.2@PAGE
Lloh11:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	bl	_devm_clk_get
	str	x0, [x20, #8]
	bl	_IS_ERR
	cbz	x0, LBB0_8
; %bb.7:
Lloh12:
	adrp	x1, l_.str.3@PAGE
Lloh13:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x0, x19
	bl	_dev_err
	ldr	x0, [x20, #8]
	b	LBB0_10
LBB0_8:
Lloh14:
	adrp	x1, l_.str.4@PAGE
Lloh15:
	add	x1, x1, l_.str.4@PAGEOFF
	mov	x0, x19
	bl	_devm_clk_get
	mov	x21, x0
	bl	_IS_ERR
	cbz	x0, LBB0_11
; %bb.9:
Lloh16:
	adrp	x1, l_.str.5@PAGE
Lloh17:
	add	x1, x1, l_.str.5@PAGEOFF
	mov	x0, x19
	bl	_dev_err
	mov	x0, x21
LBB0_10:
	bl	_PTR_ERR
	mov	x24, x0
	b	LBB0_14
LBB0_11:
	ldr	x0, [x20, #8]
	bl	_clk_prepare_enable
	cbz	w0, LBB0_16
; %bb.12:
	mov	x24, x0
Lloh18:
	adrp	x1, l_.str.6@PAGE
Lloh19:
	add	x1, x1, l_.str.6@PAGEOFF
LBB0_13:
	mov	x0, x19
	bl	_dev_err
LBB0_14:
	mov	x0, x19
	bl	_sdhci_pltfm_free
LBB0_15:
	mov	x0, x24
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
LBB0_16:
	mov	x0, x21
	bl	_clk_prepare_enable
	cbz	w0, LBB0_18
; %bb.17:
	mov	x24, x0
Lloh20:
	adrp	x1, l_.str.7@PAGE
Lloh21:
	add	x1, x1, l_.str.7@PAGEOFF
	mov	x0, x19
	bl	_dev_err
	b	LBB0_34
LBB0_18:
	mov	x0, x19
	bl	_sdhci_get_of_property
Lloh22:
	adrp	x1, l_.str.8@PAGE
Lloh23:
	add	x1, x1, l_.str.8@PAGEOFF
	mov	x0, x22
	bl	_of_property_read_bool
	cbz	x0, LBB0_20
; %bb.19:
Lloh24:
	adrp	x8, _SDHCI_ARASAN_QUIRK_FORCE_CDTEST@GOTPAGE
Lloh25:
	ldr	x8, [x8, _SDHCI_ARASAN_QUIRK_FORCE_CDTEST@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
	ldr	w9, [x20, #24]
	orr	w8, w9, w8
	str	w8, [x20, #24]
LBB0_20:
Lloh27:
	adrp	x1, l_.str.9@PAGE
Lloh28:
	add	x1, x1, l_.str.9@PAGEOFF
	mov	x0, x22
	bl	_of_property_read_bool
	cbz	x0, LBB0_22
; %bb.21:
Lloh29:
	adrp	x8, _SDHCI_ARASAN_QUIRK_CLOCK_UNSTABLE@GOTPAGE
Lloh30:
	ldr	x8, [x8, _SDHCI_ARASAN_QUIRK_CLOCK_UNSTABLE@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	ldr	w9, [x20, #24]
	orr	w8, w9, w8
	str	w8, [x20, #24]
LBB0_22:
	str	x21, [x25]
	ldr	x0, [x19]
Lloh32:
	adrp	x1, l_.str.10@PAGE
Lloh33:
	add	x1, x1, l_.str.10@PAGEOFF
	bl	_of_device_is_compatible
	cbz	x0, LBB0_24
; %bb.23:
	mov	x0, x23
	mov	w1, #0
	bl	_sdhci_arasan_update_clockmultiplier
LBB0_24:
	mov	x0, x23
	bl	_sdhci_arasan_update_baseclkfreq
	mov	x0, x20
	mov	x1, x21
	mov	x2, x19
	bl	_sdhci_arasan_register_sdclk
	mov	x24, x0
	cbnz	w0, LBB0_33
; %bb.25:
	ldr	x0, [x23]
	bl	_mmc_of_parse
	cbz	w0, LBB0_28
; %bb.26:
	mov	x24, x0
Lloh34:
	adrp	x8, _EPROBE_DEFER@GOTPAGE
Lloh35:
	ldr	x8, [x8, _EPROBE_DEFER@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
	cmn	w0, w8
	b.eq	LBB0_32
; %bb.27:
	mov	x8, x24
	str	x8, [sp]
Lloh37:
	adrp	x1, l_.str.11@PAGE
Lloh38:
	add	x1, x1, l_.str.11@PAGEOFF
	b	LBB0_31
LBB0_28:
Lloh39:
	adrp	x8, _ENODEV@GOTPAGE
Lloh40:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh41:
	ldr	w8, [x8]
	neg	w0, w8
	bl	_ERR_PTR
	str	x0, [x20, #16]
	ldr	x0, [x19]
Lloh42:
	adrp	x1, l_.str.12@PAGE
Lloh43:
	add	x1, x1, l_.str.12@PAGEOFF
	bl	_of_device_is_compatible
	cbz	x0, LBB0_38
; %bb.29:
Lloh44:
	adrp	x1, l_.str.13@PAGE
Lloh45:
	add	x1, x1, l_.str.13@PAGEOFF
	mov	x0, x19
	bl	_devm_phy_get
	str	x0, [x20, #16]
	bl	_IS_ERR
	mov	x8, x0
	ldr	x0, [x20, #16]
	cbz	x8, LBB0_35
; %bb.30:
	bl	_PTR_ERR
	mov	x24, x0
Lloh46:
	adrp	x1, l_.str.14@PAGE
Lloh47:
	add	x1, x1, l_.str.14@PAGEOFF
LBB0_31:
	mov	x0, x19
	bl	_dev_err
LBB0_32:
	mov	x0, x19
	bl	_sdhci_arasan_unregister_sdclk
LBB0_33:
	mov	x0, x21
	bl	_clk_disable_unprepare
LBB0_34:
	ldr	x0, [x20, #8]
	bl	_clk_disable_unprepare
	b	LBB0_14
LBB0_35:
	bl	_phy_init
	tbnz	w0, #31, LBB0_41
; %bb.36:
Lloh48:
	adrp	x8, _sdhci_arasan_hs400_enhanced_strobe@GOTPAGE
Lloh49:
	ldr	x8, [x8, _sdhci_arasan_hs400_enhanced_strobe@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
Lloh51:
	adrp	x9, _sdhci_arasan_voltage_switch@GOTPAGE
Lloh52:
	ldr	x9, [x9, _sdhci_arasan_voltage_switch@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	stp	w9, w8, [x23, #8]
	mov	w8, #1
Lloh54:
	adrp	x9, _MMC_CAP2_CQE@GOTPAGE
Lloh55:
	ldr	x9, [x9, _MMC_CAP2_CQE@GOTPAGEOFF]
	str	w8, [x20]
Lloh56:
	ldr	w8, [x9]
	ldr	x9, [x23]
	ldr	w10, [x9]
	orr	w8, w10, w8
	str	w8, [x9]
Lloh57:
	adrp	x1, l_.str.16@PAGE
Lloh58:
	add	x1, x1, l_.str.16@PAGEOFF
	mov	x0, x22
	bl	_of_property_read_bool
	cbnz	x0, LBB0_38
; %bb.37:
Lloh59:
	adrp	x8, _MMC_CAP2_CQE_DCMD@GOTPAGE
Lloh60:
	ldr	x8, [x8, _MMC_CAP2_CQE_DCMD@GOTPAGEOFF]
Lloh61:
	ldr	w8, [x8]
	ldr	x9, [x23]
	ldr	w10, [x9]
	orr	w8, w10, w8
	str	w8, [x9]
LBB0_38:
	mov	x0, x20
	bl	_sdhci_arasan_add_host
	mov	x24, x0
	cbz	w0, LBB0_15
; %bb.39:
	ldr	x0, [x20, #16]
	bl	_IS_ERR
	cbnz	x0, LBB0_32
; %bb.40:
	ldr	x0, [x20, #16]
	bl	_phy_exit
	b	LBB0_32
LBB0_41:
	mov	x24, x0
Lloh62:
	adrp	x1, l_.str.15@PAGE
Lloh63:
	add	x1, x1, l_.str.15@PAGEOFF
	b	LBB0_31
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpAdd	Lloh18, Lloh19
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpAdd	Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpAdd	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpAdd	Lloh37, Lloh38
	.loh AdrpAdd	Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpAdd	Lloh44, Lloh45
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpAdd	Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpAdd	Lloh62, Lloh63
	.cfi_endproc
                                        ; -- End function
	.comm	_sdhci_arasan_of_match,4,2      ; @sdhci_arasan_of_match
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"arasan,soc-ctl-syscon"

	.comm	_EPROBE_DEFER,4,2               ; @EPROBE_DEFER
l_.str.1:                               ; @.str.1
	.asciz	"Can't get syscon: %d\n"

l_.str.2:                               ; @.str.2
	.asciz	"clk_ahb"

l_.str.3:                               ; @.str.3
	.asciz	"clk_ahb clock not found.\n"

l_.str.4:                               ; @.str.4
	.asciz	"clk_xin"

l_.str.5:                               ; @.str.5
	.asciz	"clk_xin clock not found.\n"

l_.str.6:                               ; @.str.6
	.asciz	"Unable to enable AHB clock.\n"

l_.str.7:                               ; @.str.7
	.asciz	"Unable to enable SD clock.\n"

l_.str.8:                               ; @.str.8
	.asciz	"xlnx,fails-without-test-cd"

	.comm	_SDHCI_ARASAN_QUIRK_FORCE_CDTEST,4,2 ; @SDHCI_ARASAN_QUIRK_FORCE_CDTEST
l_.str.9:                               ; @.str.9
	.asciz	"xlnx,int-clock-stable-broken"

	.comm	_SDHCI_ARASAN_QUIRK_CLOCK_UNSTABLE,4,2 ; @SDHCI_ARASAN_QUIRK_CLOCK_UNSTABLE
l_.str.10:                              ; @.str.10
	.asciz	"rockchip,rk3399-sdhci-5.1"

l_.str.11:                              ; @.str.11
	.asciz	"parsing dt failed (%d)\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
l_.str.12:                              ; @.str.12
	.asciz	"arasan,sdhci-5.1"

l_.str.13:                              ; @.str.13
	.asciz	"phy_arasan"

l_.str.14:                              ; @.str.14
	.asciz	"No phy for arasan,sdhci-5.1.\n"

l_.str.15:                              ; @.str.15
	.asciz	"phy_init err.\n"

	.comm	_sdhci_arasan_hs400_enhanced_strobe,4,2 ; @sdhci_arasan_hs400_enhanced_strobe
	.comm	_sdhci_arasan_voltage_switch,4,2 ; @sdhci_arasan_voltage_switch
	.comm	_MMC_CAP2_CQE,4,2               ; @MMC_CAP2_CQE
l_.str.16:                              ; @.str.16
	.asciz	"disable-cqe-dcmd"

	.comm	_MMC_CAP2_CQE_DCMD,4,2          ; @MMC_CAP2_CQE_DCMD
	.no_dead_strip	_sdhci_arasan_probe
.subsections_via_symbols
