	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function alx_irq_disable
_alx_irq_disable:                       ## @alx_irq_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	leaq	8(%rdi), %r14
	movq	_ALX_ISR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_ALX_ISR_DIS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_alx_write_mem32
	movq	_ALX_IMR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_alx_write_mem32
	movq	%r14, %rdi
	callq	_alx_post_write
	movq	8(%r15), %rdi
	cmpq	$0, (%rdi)
	je	LBB0_5
## %bb.1:
	cmpl	$0, (%r15)
	jle	LBB0_4
## %bb.2:
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	$1, %edx
	callq	_alx_mask_msix
	movq	8(%r15), %rdi
	movl	%ebx, %esi
	callq	_pci_irq_vector
	movl	%eax, %edi
	callq	_synchronize_irq
	incl	%ebx
	cmpl	(%r15), %ebx
	jl	LBB0_3
LBB0_4:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_5:
	xorl	%esi, %esi
	callq	_pci_irq_vector
	movl	%eax, %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_synchronize_irq                ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ALX_ISR,4,2                    ## @ALX_ISR
	.comm	_ALX_ISR_DIS,4,2                ## @ALX_ISR_DIS
	.comm	_ALX_IMR,4,2                    ## @ALX_IMR
	.no_dead_strip	_alx_irq_disable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function alx_irq_disable
_alx_irq_disable:                       ; @alx_irq_disable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	add	x20, x0, #8
Lloh0:
	adrp	x8, _ALX_ISR@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ALX_ISR@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _ALX_ISR_DIS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ALX_ISR_DIS@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x20
	bl	_alx_write_mem32
Lloh6:
	adrp	x8, _ALX_IMR@GOTPAGE
Lloh7:
	ldr	x8, [x8, _ALX_IMR@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x20
	mov	w2, #0
	bl	_alx_write_mem32
	mov	x0, x20
	bl	_alx_post_write
	ldr	x0, [x19, #8]
	ldr	x8, [x0]
	cbz	x8, LBB0_5
; %bb.1:
	ldr	w8, [x19]
	cmp	w8, #1
	b.lt	LBB0_4
; %bb.2:
	mov	w21, #0
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x20
	mov	x1, x21
	mov	w2, #1
	bl	_alx_mask_msix
	ldr	x0, [x19, #8]
	mov	x1, x21
	bl	_pci_irq_vector
	bl	_synchronize_irq
	add	w21, w21, #1
	ldr	w8, [x19]
	cmp	w21, w8
	b.lt	LBB0_3
LBB0_4:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_5:
	mov	w1, #0
	bl	_pci_irq_vector
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_synchronize_irq
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_ALX_ISR,4,2                    ; @ALX_ISR
	.comm	_ALX_ISR_DIS,4,2                ; @ALX_ISR_DIS
	.comm	_ALX_IMR,4,2                    ; @ALX_IMR
	.no_dead_strip	_alx_irq_disable
.subsections_via_symbols
