	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function msdc_set_mclk
_msdc_set_mclk:                         ## @msdc_set_mclk
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r12
	testl	%edx, %edx
	je	LBB0_43
## %bb.1:
	movl	%edx, %r15d
	movl	%esi, %ebx
	movq	40(%r12), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)                 ## 4-byte Spill
	movq	_MSDC_INTEN@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	addl	4(%r12), %edi
	callq	_readl
	movl	%eax, %r13d
	movl	(%r14), %edi
	addl	4(%r12), %edi
	movl	%eax, %esi
	callq	_sdr_clr_bits
	movq	40(%r12), %rax
	movq	_MSDC_CFG@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	addl	4(%r12), %edi
	cmpl	$8, 4(%rax)
	jne	LBB0_2
## %bb.3:
	movq	_MSDC_CFG_HS400_CK_MODE@GOTPCREL(%rip), %rax
	jmp	LBB0_4
LBB0_43:
	movl	32(%r12), %edi
	leaq	L_.str(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_dbg
	movl	$0, (%r12)
	movq	24(%r12), %rax
	movl	$0, (%rax)
	movq	_MSDC_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	addl	4(%r12), %edi
	movq	_MSDC_CFG_CKPDN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_sdr_clr_bits                   ## TAILCALL
LBB0_2:
	movq	_MSDC_CFG_HS400_CK_MODE_EXTRA@GOTPCREL(%rip), %rax
LBB0_4:
	movl	(%rax), %esi
	callq	_sdr_clr_bits
	movq	_MMC_TIMING_UHS_DDR50@GOTPCREL(%rip), %rax
	movq	_MMC_TIMING_MMC_HS400@GOTPCREL(%rip), %rcx
	movb	(%rcx), %sil
	movl	8(%r12), %edi
	cmpb	%bl, (%rax)
	movl	%ebx, -60(%rbp)                 ## 4-byte Spill
	movl	%r13d, -64(%rbp)                ## 4-byte Spill
	je	LBB0_7
## %bb.5:
	movq	_MMC_TIMING_MMC_DDR52@GOTPCREL(%rip), %rax
	cmpb	%bl, (%rax)
	je	LBB0_7
## %bb.6:
	cmpb	%bl, %sil
	je	LBB0_7
## %bb.17:
	cmpl	%r15d, %edi
	jle	LBB0_18
## %bb.19:
	movl	%edi, %eax
	sarl	%eax
	xorl	%r13d, %r13d
	cmpl	%r15d, %eax
	jle	LBB0_20
## %bb.21:
	leal	(,%r15,4), %ecx
	leal	(%rdi,%r15,4), %eax
	decl	%eax
	cltd
	idivl	%ecx
	movl	%eax, %ebx
	sarl	$2, %edi
	movl	%edi, %eax
	cltd
	idivl	%ebx
	jmp	LBB0_22
LBB0_7:
	movl	%edi, %ecx
	sarl	$2, %ecx
	cmpl	%r15d, %ecx
	jle	LBB0_8
## %bb.9:
	leal	(,%r15,4), %ebx
	leal	(%rdi,%r15,4), %eax
	decl	%eax
	cltd
	idivl	%ebx
	movl	%eax, %ebx
	movl	%ecx, %eax
	cltd
	idivl	%ebx
	sarl	%ebx
	movl	%eax, %ecx
	jmp	LBB0_10
LBB0_18:
	movq	%rdi, -56(%rbp)                 ## 8-byte Spill
	movl	$1, %r13d
	xorl	%ebx, %ebx
	jmp	LBB0_24
LBB0_8:
	xorl	%ebx, %ebx
LBB0_10:
	movl	$2, %r13d
	cmpb	-60(%rbp), %sil                 ## 1-byte Folded Reload
	jne	LBB0_11
## %bb.12:
	sarl	%edi
	movl	$3, %r13d
	cmpl	%r15d, %edi
	jle	LBB0_13
LBB0_11:
	movl	%ecx, %eax
	jmp	LBB0_23
LBB0_20:
	xorl	%ebx, %ebx
LBB0_22:
                                        ## kill: def $eax killed $eax def $rax
LBB0_23:
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
LBB0_24:
	movq	%r15, -72(%rbp)                 ## 8-byte Spill
	movl	(%r14), %edi
	addl	4(%r12), %edi
	movq	_MSDC_CFG_CKPDN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_clr_bits
	movq	96(%r12), %rdi
	testq	%rdi, %rdi
	jne	LBB0_26
## %bb.25:
	movl	92(%r12), %edi
	callq	_clk_get_parent
	movq	%rax, %rdi
LBB0_26:
	leaq	4(%r12), %r15
	callq	_clk_disable_unprepare
	movl	(%r14), %edi
	addl	4(%r12), %edi
	movq	_MSDC_CFG_CKMOD@GOTPCREL(%rip), %rax
	movq	_MSDC_CFG_CKMOD_EXTRA@GOTPCREL(%rip), %rcx
	movq	_MSDC_CFG_CKDIV@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	movq	_MSDC_CFG_CKDIV_EXTRA@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	orl	(%rax), %edx
	orl	(%rcx), %esi
	movq	40(%r12), %rax
	cmpl	$8, 4(%rax)
	setne	%cl
	cmovel	%edx, %esi
	shlb	$2, %cl
	orb	$8, %cl
	shll	%cl, %r13d
	orl	%ebx, %r13d
	movl	%r13d, %edx
	callq	_sdr_set_field
	movq	96(%r12), %rdi
	testq	%rdi, %rdi
	jne	LBB0_28
## %bb.27:
	movl	92(%r12), %edi
	callq	_clk_get_parent
	movq	%rax, %rdi
LBB0_28:
	callq	_clk_prepare_enable
	movl	(%r14), %edi
	addl	(%r15), %edi
	callq	_readl
	movq	_MSDC_CFG_CKSTB@GOTPCREL(%rip), %rbx
	testl	%eax, (%rbx)
	movq	_MSDC_INTEN@GOTPCREL(%rip), %r13
	jne	LBB0_30
	.p2align	4, 0x90
LBB0_29:                                ## =>This Inner Loop Header: Depth=1
	xorl	%eax, %eax
	callq	_cpu_relax
	movl	(%r14), %edi
	addl	(%r15), %edi
	callq	_readl
	testl	%eax, (%rbx)
	je	LBB0_29
LBB0_30:
	movl	(%r14), %edi
	addl	4(%r12), %edi
	movq	_MSDC_CFG_CKPDN@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_sdr_set_bits
	movq	24(%r12), %rax
	movq	-56(%rbp), %rcx                 ## 8-byte Reload
	movl	%ecx, (%rax)
	movq	-72(%rbp), %rax                 ## 8-byte Reload
	movl	%eax, (%r12)
	movl	-60(%rbp), %ebx                 ## 4-byte Reload
	movb	%bl, 12(%r12)
	movl	84(%r12), %edx
	movl	88(%r12), %esi
	movq	%r12, %rdi
	callq	_msdc_set_timeout
	movl	(%r13), %edi
	addl	4(%r12), %edi
	movl	-64(%rbp), %esi                 ## 4-byte Reload
	callq	_sdr_set_bits
	movq	24(%r12), %rax
	cmpl	$52000000, (%rax)               ## imm = 0x3197500
	jg	LBB0_35
## %bb.31:
	movl	80(%r12), %edi
	movq	_MSDC_IOCON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	4(%r12), %esi
	callq	_writel
	movl	16(%r12), %esi
	testl	%esi, %esi
	je	LBB0_34
## %bb.32:
	movl	76(%r12), %edi
	movq	_EMMC_TOP_CONTROL@GOTPCREL(%rip), %rax
	addl	(%rax), %esi
	callq	_writel
	leaq	72(%r12), %rax
	jmp	LBB0_33
LBB0_35:
	movl	64(%r12), %edi
	movq	_MSDC_IOCON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	4(%r12), %esi
	callq	_writel
	movl	60(%r12), %edi
	movq	_PAD_CMD_TUNE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	addl	4(%r12), %esi
	callq	_writel
	movl	16(%r12), %esi
	testl	%esi, %esi
	je	LBB0_37
## %bb.36:
	movl	56(%r12), %edi
	movq	_EMMC_TOP_CONTROL@GOTPCREL(%rip), %rax
	addl	(%rax), %esi
	callq	_writel
	leaq	52(%r12), %rax
LBB0_33:
	movl	16(%r12), %esi
	movq	_EMMC_TOP_CMD@GOTPCREL(%rip), %r15
	jmp	LBB0_39
LBB0_34:
	leaq	68(%r12), %rax
	jmp	LBB0_38
LBB0_37:
	leaq	48(%r12), %rax
LBB0_38:
	movl	-44(%rbp), %esi                 ## 4-byte Reload
LBB0_39:
	movzbl	%bl, %r14d
	movl	(%rax), %edi
	addl	(%r15), %esi
	callq	_writel
	movq	_MMC_TIMING_MMC_HS400@GOTPCREL(%rip), %rax
	cmpb	%bl, (%rax)
	jne	LBB0_42
## %bb.40:
	movq	40(%r12), %rax
	cmpq	$0, 8(%rax)
	je	LBB0_42
## %bb.41:
	movl	-44(%rbp), %edi                 ## 4-byte Reload
	addl	4(%r12), %edi
	movq	_MSDC_PAD_TUNE_CMDRRDLY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	20(%r12), %edx
	callq	_sdr_set_field
LBB0_42:
	movl	32(%r12), %edi
	movq	24(%r12), %rax
	movl	(%rax), %edx
	leaq	L_.str.1(%rip), %rsi
	movl	%r14d, %ecx
	xorl	%eax, %eax
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_dbg                        ## TAILCALL
LBB0_13:
	movq	40(%r12), %rax
	movl	(%r14), %edi
	addl	4(%r12), %edi
	cmpl	$8, 4(%rax)
	jne	LBB0_14
## %bb.15:
	movq	_MSDC_CFG_HS400_CK_MODE@GOTPCREL(%rip), %rax
	jmp	LBB0_16
LBB0_14:
	movq	_MSDC_CFG_HS400_CK_MODE_EXTRA@GOTPCREL(%rip), %rax
LBB0_16:
	movl	(%rax), %esi
	callq	_sdr_set_bits
	movl	8(%r12), %eax
	sarl	%eax
	movq	%rax, -56(%rbp)                 ## 8-byte Spill
	xorl	%ebx, %ebx
	jmp	LBB0_24
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"set mclk to 0\n"

	.comm	_MSDC_CFG,4,2                   ## @MSDC_CFG
	.comm	_MSDC_CFG_CKPDN,4,2             ## @MSDC_CFG_CKPDN
	.comm	_MSDC_INTEN,4,2                 ## @MSDC_INTEN
	.comm	_MSDC_CFG_HS400_CK_MODE,4,2     ## @MSDC_CFG_HS400_CK_MODE
	.comm	_MSDC_CFG_HS400_CK_MODE_EXTRA,4,2 ## @MSDC_CFG_HS400_CK_MODE_EXTRA
	.comm	_MMC_TIMING_UHS_DDR50,1,0       ## @MMC_TIMING_UHS_DDR50
	.comm	_MMC_TIMING_MMC_DDR52,1,0       ## @MMC_TIMING_MMC_DDR52
	.comm	_MMC_TIMING_MMC_HS400,1,0       ## @MMC_TIMING_MMC_HS400
	.comm	_MSDC_CFG_CKMOD,4,2             ## @MSDC_CFG_CKMOD
	.comm	_MSDC_CFG_CKDIV,4,2             ## @MSDC_CFG_CKDIV
	.comm	_MSDC_CFG_CKMOD_EXTRA,4,2       ## @MSDC_CFG_CKMOD_EXTRA
	.comm	_MSDC_CFG_CKDIV_EXTRA,4,2       ## @MSDC_CFG_CKDIV_EXTRA
	.comm	_MSDC_CFG_CKSTB,4,2             ## @MSDC_CFG_CKSTB
	.comm	_MSDC_IOCON,4,2                 ## @MSDC_IOCON
	.comm	_EMMC_TOP_CONTROL,4,2           ## @EMMC_TOP_CONTROL
	.comm	_EMMC_TOP_CMD,4,2               ## @EMMC_TOP_CMD
	.comm	_PAD_CMD_TUNE,4,2               ## @PAD_CMD_TUNE
	.comm	_MSDC_PAD_TUNE_CMDRRDLY,4,2     ## @MSDC_PAD_TUNE_CMDRRDLY
L_.str.1:                               ## @.str.1
	.asciz	"sclk: %d, timing: %d\n"

	.no_dead_strip	_msdc_set_mclk
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function msdc_set_mclk
_msdc_set_mclk:                         ; @msdc_set_mclk
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
	cbz	w2, LBB0_7
; %bb.1:
	mov	x21, x2
	mov	x20, x1
	ldr	x8, [x19, #40]
	ldr	w8, [x8]
	str	w8, [sp, #28]                   ; 4-byte Folded Spill
	mov	x24, x19
	ldr	w8, [x24, #4]!
Lloh0:
	adrp	x23, _MSDC_INTEN@GOTPAGE
Lloh1:
	ldr	x23, [x23, _MSDC_INTEN@GOTPAGEOFF]
	ldr	w9, [x23]
	add	w0, w9, w8
	bl	_readl
	mov	x22, x0
	ldr	w8, [x24]
	ldr	w9, [x23]
	add	w0, w9, w8
	mov	x1, x22
	bl	_sdr_clr_bits
	ldur	x8, [x24, #36]
	ldr	w8, [x8, #4]
	ldr	w9, [x24]
Lloh2:
	adrp	x27, _MSDC_CFG@GOTPAGE
Lloh3:
	ldr	x27, [x27, _MSDC_CFG@GOTPAGEOFF]
	ldr	w10, [x27]
Lloh4:
	adrp	x25, _MSDC_CFG_HS400_CK_MODE@GOTPAGE
Lloh5:
	ldr	x25, [x25, _MSDC_CFG_HS400_CK_MODE@GOTPAGEOFF]
	add	w0, w10, w9
Lloh6:
	adrp	x26, _MSDC_CFG_HS400_CK_MODE_EXTRA@GOTPAGE
Lloh7:
	ldr	x26, [x26, _MSDC_CFG_HS400_CK_MODE_EXTRA@GOTPAGEOFF]
	cmp	w8, #8
	csel	x8, x25, x26, eq
	ldr	w1, [x8]
	bl	_sdr_clr_bits
Lloh8:
	adrp	x8, _MMC_TIMING_UHS_DDR50@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MMC_TIMING_UHS_DDR50@GOTPAGEOFF]
	ldrb	w10, [x8]
Lloh10:
	adrp	x8, _MMC_TIMING_MMC_HS400@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MMC_TIMING_MMC_HS400@GOTPAGEOFF]
	ldrb	w9, [x8]
	ldr	w8, [x24, #4]
	cmp	w10, w20
	b.eq	LBB0_8
; %bb.2:
Lloh12:
	adrp	x10, _MMC_TIMING_MMC_DDR52@GOTPAGE
Lloh13:
	ldr	x10, [x10, _MMC_TIMING_MMC_DDR52@GOTPAGEOFF]
	ldrb	w10, [x10]
	cmp	w10, w20
	b.eq	LBB0_8
; %bb.3:
	cmp	w9, w20
	b.eq	LBB0_8
; %bb.4:
	cmp	w8, w21
	b.le	LBB0_13
; %bb.5:
	asr	w28, w8, #1
	cmp	w28, w21
	b.le	LBB0_14
; %bb.6:
	mov	w26, #0
	lsl	w9, w21, #2
	add	w10, w9, w8
	sub	w10, w10, #1
	sdiv	w23, w10, w9
	asr	w8, w8, #2
	sdiv	w28, w8, w23
	b	LBB0_15
LBB0_7:
	ldr	w0, [x19, #32]
Lloh14:
	adrp	x1, l_.str@PAGE
Lloh15:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_dbg
	str	wzr, [x19]
	ldr	x8, [x19, #24]
	str	wzr, [x8]
	ldr	w8, [x19, #4]
Lloh16:
	adrp	x9, _MSDC_CFG@GOTPAGE
Lloh17:
	ldr	x9, [x9, _MSDC_CFG@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	add	w0, w9, w8
Lloh19:
	adrp	x8, _MSDC_CFG_CKPDN@GOTPAGE
Lloh20:
	ldr	x8, [x8, _MSDC_CFG_CKPDN@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	b	_sdr_clr_bits
LBB0_8:
	asr	w10, w8, #2
	lsl	w11, w21, #2
	add	w12, w11, w8
	sub	w12, w12, #1
	sdiv	w11, w12, w11
	sdiv	w12, w10, w11
	asr	w11, w11, #1
	cmp	w10, w21
	csel	w23, wzr, w11, le
	csel	w28, w10, w12, le
	cmp	w9, w20
	b.ne	LBB0_12
; %bb.9:
	cmp	w21, w8, asr #1
	b.lt	LBB0_11
; %bb.10:
	ldr	x8, [x19, #40]
	ldr	w8, [x8, #4]
	ldr	w9, [x19, #4]
	ldr	w10, [x27]
	add	w0, w10, w9
	cmp	w8, #8
	csel	x8, x25, x26, eq
	ldr	w1, [x8]
	bl	_sdr_set_bits
	mov	w23, #0
	ldr	w8, [x19, #8]
	asr	w28, w8, #1
LBB0_11:
	mov	w26, #3
	b	LBB0_15
LBB0_12:
	mov	w26, #2
	b	LBB0_15
LBB0_13:
	mov	w23, #0
	mov	w26, #1
	mov	x28, x8
	b	LBB0_15
LBB0_14:
	mov	w23, #0
	mov	w26, #0
LBB0_15:
	ldr	w8, [x19, #4]
	ldr	w9, [x27]
	add	w0, w9, w8
Lloh22:
	adrp	x25, _MSDC_CFG_CKPDN@GOTPAGE
Lloh23:
	ldr	x25, [x25, _MSDC_CFG_CKPDN@GOTPAGEOFF]
	ldr	w1, [x25]
	bl	_sdr_clr_bits
	ldr	x0, [x19, #96]
	cbnz	x0, LBB0_17
; %bb.16:
	ldr	w0, [x19, #92]
	bl	_clk_get_parent
LBB0_17:
	bl	_clk_disable_unprepare
	ldr	x8, [x19, #40]
	ldr	w8, [x8, #4]
	mov	w9, #12
	cmp	w8, #8
	csel	w8, w8, w9, eq
	ldr	w9, [x19, #4]
	ldr	w10, [x27]
	add	w0, w10, w9
Lloh24:
	adrp	x9, _MSDC_CFG_CKMOD@GOTPAGE
Lloh25:
	ldr	x9, [x9, _MSDC_CFG_CKMOD@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
Lloh27:
	adrp	x10, _MSDC_CFG_CKMOD_EXTRA@GOTPAGE
Lloh28:
	ldr	x10, [x10, _MSDC_CFG_CKMOD_EXTRA@GOTPAGEOFF]
Lloh29:
	ldr	w10, [x10]
Lloh30:
	adrp	x11, _MSDC_CFG_CKDIV@GOTPAGE
Lloh31:
	ldr	x11, [x11, _MSDC_CFG_CKDIV@GOTPAGEOFF]
Lloh32:
	ldr	w11, [x11]
Lloh33:
	adrp	x12, _MSDC_CFG_CKDIV_EXTRA@GOTPAGE
Lloh34:
	ldr	x12, [x12, _MSDC_CFG_CKDIV_EXTRA@GOTPAGEOFF]
Lloh35:
	ldr	w12, [x12]
	orr	w9, w11, w9
	orr	w10, w12, w10
	csel	w1, w9, w10, eq
	lsl	w8, w26, w8
	orr	w2, w8, w23
	bl	_sdr_set_field
	ldr	x0, [x19, #96]
	cbnz	x0, LBB0_19
; %bb.18:
	ldr	w0, [x19, #92]
	bl	_clk_get_parent
LBB0_19:
	bl	_clk_prepare_enable
	ldr	w8, [x24]
	ldr	w9, [x27]
	add	w0, w9, w8
	bl	_readl
Lloh36:
	adrp	x23, _MSDC_CFG_CKSTB@GOTPAGE
Lloh37:
	ldr	x23, [x23, _MSDC_CFG_CKSTB@GOTPAGEOFF]
LBB0_20:                                ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x23]
	tst	w8, w0
	b.ne	LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_20 Depth=1
	bl	_cpu_relax
	ldr	w8, [x24]
	ldr	w9, [x27]
	add	w0, w9, w8
	bl	_readl
	b	LBB0_20
LBB0_22:
	ldr	w8, [x19, #4]
	ldr	w9, [x27]
	add	w0, w9, w8
	ldr	w1, [x25]
	bl	_sdr_set_bits
	ldr	x8, [x19, #24]
	str	w28, [x8]
	str	w21, [x19]
	strb	w20, [x19, #12]
	ldp	w2, w1, [x19, #84]
	mov	x0, x19
	bl	_msdc_set_timeout
	ldr	w8, [x19, #4]
Lloh38:
	adrp	x9, _MSDC_INTEN@GOTPAGE
Lloh39:
	ldr	x9, [x9, _MSDC_INTEN@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	add	w0, w9, w8
	mov	x1, x22
	bl	_sdr_set_bits
	ldr	x8, [x19, #24]
	ldr	w8, [x8]
	mov	w9, #29952
	movk	w9, #793, lsl #16
	cmp	w8, w9
	b.gt	LBB0_25
; %bb.23:
	ldr	w0, [x19, #80]
	ldr	w8, [x19, #4]
Lloh41:
	adrp	x9, _MSDC_IOCON@GOTPAGE
Lloh42:
	ldr	x9, [x9, _MSDC_IOCON@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	add	w1, w9, w8
	bl	_writel
	ldr	w8, [x19, #16]
	cbz	w8, LBB0_28
; %bb.24:
	ldr	w0, [x19, #76]
Lloh44:
	adrp	x9, _EMMC_TOP_CONTROL@GOTPAGE
Lloh45:
	ldr	x9, [x9, _EMMC_TOP_CONTROL@GOTPAGEOFF]
Lloh46:
	ldr	w9, [x9]
	add	w1, w9, w8
	bl	_writel
	add	x8, x19, #72
	b	LBB0_27
LBB0_25:
	ldr	w0, [x19, #64]
	ldr	w8, [x19, #4]
Lloh47:
	adrp	x9, _MSDC_IOCON@GOTPAGE
Lloh48:
	ldr	x9, [x9, _MSDC_IOCON@GOTPAGEOFF]
Lloh49:
	ldr	w9, [x9]
	add	w1, w9, w8
	bl	_writel
	ldr	w0, [x19, #60]
	ldr	w8, [x19, #4]
Lloh50:
	adrp	x9, _PAD_CMD_TUNE@GOTPAGE
Lloh51:
	ldr	x9, [x9, _PAD_CMD_TUNE@GOTPAGEOFF]
Lloh52:
	ldr	w9, [x9]
	add	w1, w9, w8
	bl	_writel
	ldr	w8, [x19, #16]
	cbz	w8, LBB0_29
; %bb.26:
	ldr	w0, [x19, #56]
Lloh53:
	adrp	x9, _EMMC_TOP_CONTROL@GOTPAGE
Lloh54:
	ldr	x9, [x9, _EMMC_TOP_CONTROL@GOTPAGEOFF]
Lloh55:
	ldr	w9, [x9]
	add	w1, w9, w8
	bl	_writel
	add	x8, x19, #52
LBB0_27:
	ldr	w9, [x19, #16]
Lloh56:
	adrp	x24, _EMMC_TOP_CMD@GOTPAGE
Lloh57:
	ldr	x24, [x24, _EMMC_TOP_CMD@GOTPAGEOFF]
	b	LBB0_31
LBB0_28:
	add	x8, x19, #68
	b	LBB0_30
LBB0_29:
	add	x8, x19, #48
LBB0_30:
	ldr	w9, [sp, #28]                   ; 4-byte Folded Reload
LBB0_31:
	ldr	w0, [x8]
	ldr	w8, [x24]
	add	w1, w8, w9
	bl	_writel
Lloh58:
	adrp	x8, _MMC_TIMING_MMC_HS400@GOTPAGE
Lloh59:
	ldr	x8, [x8, _MMC_TIMING_MMC_HS400@GOTPAGEOFF]
	ldrb	w8, [x8]
	cmp	w8, w20
	b.ne	LBB0_34
; %bb.32:
	ldr	x8, [x19, #40]
	ldr	x8, [x8, #8]
	cbz	x8, LBB0_34
; %bb.33:
	ldr	w8, [x19, #4]
	ldr	w9, [sp, #28]                   ; 4-byte Folded Reload
	add	w0, w8, w9
Lloh60:
	adrp	x8, _MSDC_PAD_TUNE_CMDRRDLY@GOTPAGE
Lloh61:
	ldr	x8, [x8, _MSDC_PAD_TUNE_CMDRRDLY@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x8]
	ldr	w2, [x19, #20]
	bl	_sdr_set_field
LBB0_34:
	ldr	w0, [x19, #32]
	ldr	x8, [x19, #24]
	ldr	w8, [x8]
	stp	x8, x20, [sp]
Lloh63:
	adrp	x1, l_.str.1@PAGE
Lloh64:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_dbg
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpAdd	Lloh63, Lloh64
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"set mclk to 0\n"

	.comm	_MSDC_CFG,4,2                   ; @MSDC_CFG
	.comm	_MSDC_CFG_CKPDN,4,2             ; @MSDC_CFG_CKPDN
	.comm	_MSDC_INTEN,4,2                 ; @MSDC_INTEN
	.comm	_MSDC_CFG_HS400_CK_MODE,4,2     ; @MSDC_CFG_HS400_CK_MODE
	.comm	_MSDC_CFG_HS400_CK_MODE_EXTRA,4,2 ; @MSDC_CFG_HS400_CK_MODE_EXTRA
	.comm	_MMC_TIMING_UHS_DDR50,1,0       ; @MMC_TIMING_UHS_DDR50
	.comm	_MMC_TIMING_MMC_DDR52,1,0       ; @MMC_TIMING_MMC_DDR52
	.comm	_MMC_TIMING_MMC_HS400,1,0       ; @MMC_TIMING_MMC_HS400
	.comm	_MSDC_CFG_CKMOD,4,2             ; @MSDC_CFG_CKMOD
	.comm	_MSDC_CFG_CKDIV,4,2             ; @MSDC_CFG_CKDIV
	.comm	_MSDC_CFG_CKMOD_EXTRA,4,2       ; @MSDC_CFG_CKMOD_EXTRA
	.comm	_MSDC_CFG_CKDIV_EXTRA,4,2       ; @MSDC_CFG_CKDIV_EXTRA
	.comm	_MSDC_CFG_CKSTB,4,2             ; @MSDC_CFG_CKSTB
	.comm	_MSDC_IOCON,4,2                 ; @MSDC_IOCON
	.comm	_EMMC_TOP_CONTROL,4,2           ; @EMMC_TOP_CONTROL
	.comm	_EMMC_TOP_CMD,4,2               ; @EMMC_TOP_CMD
	.comm	_PAD_CMD_TUNE,4,2               ; @PAD_CMD_TUNE
	.comm	_MSDC_PAD_TUNE_CMDRRDLY,4,2     ; @MSDC_PAD_TUNE_CMDRRDLY
l_.str.1:                               ; @.str.1
	.asciz	"sclk: %d, timing: %d\n"

	.no_dead_strip	_msdc_set_mclk
.subsections_via_symbols
