	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rts522a_optimize_phy
_rts522a_optimize_phy:                  ## @rts522a_optimize_phy
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	movq	_RTS522A_PM_CTRL3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_D3_DELINK_MODE_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ebx, %ebx
	xorl	%ecx, %ecx
	callq	_rtsx_pci_write_register
	testl	%eax, %eax
	js	LBB0_1
## %bb.2:
	movq	_IC_VER_A@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	movl	$21034, %esi                    ## imm = 0x522A
	callq	_is_version
	testq	%rax, %rax
	je	LBB0_5
## %bb.3:
	movq	_PHY_RCR2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHY_RCR2_INIT_27S@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_rtsx_pci_write_phy_register
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_5
## %bb.4:
	movq	_PHY_RCR1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHY_RCR1_INIT_27S@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_rtsx_pci_write_phy_register
	movq	_PHY_FLD0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHY_FLD0_INIT_27S@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_rtsx_pci_write_phy_register
	movq	_PHY_FLD3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHY_FLD3_INIT_27S@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_rtsx_pci_write_phy_register
	movq	_PHY_FLD4@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_PHY_FLD4_INIT_27S@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_rtsx_pci_write_phy_register
	xorl	%ebx, %ebx
	jmp	LBB0_5
LBB0_1:
	movl	%eax, %ebx
LBB0_5:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_RTS522A_PM_CTRL3,4,2           ## @RTS522A_PM_CTRL3
	.comm	_D3_DELINK_MODE_EN,4,2          ## @D3_DELINK_MODE_EN
	.comm	_IC_VER_A,4,2                   ## @IC_VER_A
	.comm	_PHY_RCR2,4,2                   ## @PHY_RCR2
	.comm	_PHY_RCR2_INIT_27S,4,2          ## @PHY_RCR2_INIT_27S
	.comm	_PHY_RCR1,4,2                   ## @PHY_RCR1
	.comm	_PHY_RCR1_INIT_27S,4,2          ## @PHY_RCR1_INIT_27S
	.comm	_PHY_FLD0,4,2                   ## @PHY_FLD0
	.comm	_PHY_FLD0_INIT_27S,4,2          ## @PHY_FLD0_INIT_27S
	.comm	_PHY_FLD3,4,2                   ## @PHY_FLD3
	.comm	_PHY_FLD3_INIT_27S,4,2          ## @PHY_FLD3_INIT_27S
	.comm	_PHY_FLD4,4,2                   ## @PHY_FLD4
	.comm	_PHY_FLD4_INIT_27S,4,2          ## @PHY_FLD4_INIT_27S
	.no_dead_strip	_rts522a_optimize_phy
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rts522a_optimize_phy
_rts522a_optimize_phy:                  ; @rts522a_optimize_phy
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _RTS522A_PM_CTRL3@GOTPAGE
Lloh1:
	ldr	x8, [x8, _RTS522A_PM_CTRL3@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _D3_DELINK_MODE_EN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _D3_DELINK_MODE_EN@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_rtsx_pci_write_register
	tbnz	w0, #31, LBB0_4
; %bb.1:
Lloh6:
	adrp	x8, _IC_VER_A@GOTPAGE
Lloh7:
	ldr	x8, [x8, _IC_VER_A@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #21034
	bl	_is_version
	cbz	x0, LBB0_4
; %bb.2:
Lloh9:
	adrp	x8, _PHY_RCR2@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PHY_RCR2@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
Lloh12:
	adrp	x8, _PHY_RCR2_INIT_27S@GOTPAGE
Lloh13:
	ldr	x8, [x8, _PHY_RCR2_INIT_27S@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_rtsx_pci_write_phy_register
	cbnz	w0, LBB0_4
; %bb.3:
Lloh15:
	adrp	x8, _PHY_RCR1@GOTPAGE
Lloh16:
	ldr	x8, [x8, _PHY_RCR1@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
Lloh18:
	adrp	x8, _PHY_RCR1_INIT_27S@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PHY_RCR1_INIT_27S@GOTPAGEOFF]
Lloh20:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_rtsx_pci_write_phy_register
Lloh21:
	adrp	x8, _PHY_FLD0@GOTPAGE
Lloh22:
	ldr	x8, [x8, _PHY_FLD0@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
Lloh24:
	adrp	x8, _PHY_FLD0_INIT_27S@GOTPAGE
Lloh25:
	ldr	x8, [x8, _PHY_FLD0_INIT_27S@GOTPAGEOFF]
Lloh26:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_rtsx_pci_write_phy_register
Lloh27:
	adrp	x8, _PHY_FLD3@GOTPAGE
Lloh28:
	ldr	x8, [x8, _PHY_FLD3@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
Lloh30:
	adrp	x8, _PHY_FLD3_INIT_27S@GOTPAGE
Lloh31:
	ldr	x8, [x8, _PHY_FLD3_INIT_27S@GOTPAGEOFF]
Lloh32:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_rtsx_pci_write_phy_register
Lloh33:
	adrp	x8, _PHY_FLD4@GOTPAGE
Lloh34:
	ldr	x8, [x8, _PHY_FLD4@GOTPAGEOFF]
Lloh35:
	ldr	w1, [x8]
Lloh36:
	adrp	x8, _PHY_FLD4_INIT_27S@GOTPAGE
Lloh37:
	ldr	x8, [x8, _PHY_FLD4_INIT_27S@GOTPAGEOFF]
Lloh38:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_rtsx_pci_write_phy_register
	mov	w0, #0
LBB0_4:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_RTS522A_PM_CTRL3,4,2           ; @RTS522A_PM_CTRL3
	.comm	_D3_DELINK_MODE_EN,4,2          ; @D3_DELINK_MODE_EN
	.comm	_IC_VER_A,4,2                   ; @IC_VER_A
	.comm	_PHY_RCR2,4,2                   ; @PHY_RCR2
	.comm	_PHY_RCR2_INIT_27S,4,2          ; @PHY_RCR2_INIT_27S
	.comm	_PHY_RCR1,4,2                   ; @PHY_RCR1
	.comm	_PHY_RCR1_INIT_27S,4,2          ; @PHY_RCR1_INIT_27S
	.comm	_PHY_FLD0,4,2                   ; @PHY_FLD0
	.comm	_PHY_FLD0_INIT_27S,4,2          ; @PHY_FLD0_INIT_27S
	.comm	_PHY_FLD3,4,2                   ; @PHY_FLD3
	.comm	_PHY_FLD3_INIT_27S,4,2          ; @PHY_FLD3_INIT_27S
	.comm	_PHY_FLD4,4,2                   ; @PHY_FLD4
	.comm	_PHY_FLD4_INIT_27S,4,2          ; @PHY_FLD4_INIT_27S
	.no_dead_strip	_rts522a_optimize_phy
.subsections_via_symbols
