	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ov5640_set_mipi_pclk
_ov5640_set_mipi_pclk:                  ## @ov5640_set_mipi_pclk
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rax
	movq	(%rax), %rcx
	movq	_SCALING@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	je	LBB0_3
## %bb.1:
	movq	8(%rax), %rax
	movq	_OV5640_MODE_720P_1280_720@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_2
LBB0_3:
	movq	_OV5640_MIPI_DIV_SCLK@GOTPCREL(%rip), %rax
	jmp	LBB0_4
LBB0_2:
	movq	_OV5640_MIPI_DIV_PCLK@GOTPCREL(%rip), %rax
LBB0_4:
	movl	(%rax), %r14d
	leaq	-28(%rbp), %rdx
	leaq	-24(%rbp), %rcx
	leaq	-20(%rbp), %r8
	movq	%rbx, %rdi
	callq	_ov5640_calc_sys_clk
	movq	_OV5640_REG_SC_PLL_CTRL0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_OV5640_PLL_CTRL0_MIPI_MODE_8BIT@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	$15, %edx
	callq	_ov5640_mod_reg
	movq	_OV5640_REG_SC_PLL_CTRL1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-20(%rbp), %ecx
	shll	$4, %ecx
	orl	%r14d, %ecx
	movq	%rbx, %rdi
	movl	$255, %edx
	callq	_ov5640_mod_reg
	testl	%eax, %eax
	jne	LBB0_8
## %bb.5:
	movq	_OV5640_REG_SC_PLL_CTRL2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-24(%rbp), %ecx
	movq	%rbx, %rdi
	movl	$255, %edx
	callq	_ov5640_mod_reg
	testl	%eax, %eax
	jne	LBB0_8
## %bb.6:
	movq	_OV5640_REG_SC_PLL_CTRL3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_OV5640_PLL_CTRL3_PLL_ROOT_DIV_2@GOTPCREL(%rip), %rax
	movl	-28(%rbp), %ecx
	orl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	$31, %edx
	callq	_ov5640_mod_reg
	testl	%eax, %eax
	jne	LBB0_8
## %bb.7:
	movq	_OV5640_REG_SYS_ROOT_DIVIDER@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	$48, %edx
	callq	_ov5640_mod_reg
LBB0_8:
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SCALING,8,3                    ## @SCALING
	.comm	_OV5640_MODE_720P_1280_720,8,3  ## @OV5640_MODE_720P_1280_720
	.comm	_OV5640_MIPI_DIV_SCLK,4,2       ## @OV5640_MIPI_DIV_SCLK
	.comm	_OV5640_MIPI_DIV_PCLK,4,2       ## @OV5640_MIPI_DIV_PCLK
	.comm	_OV5640_REG_SC_PLL_CTRL0,4,2    ## @OV5640_REG_SC_PLL_CTRL0
	.comm	_OV5640_PLL_CTRL0_MIPI_MODE_8BIT,4,2 ## @OV5640_PLL_CTRL0_MIPI_MODE_8BIT
	.comm	_OV5640_REG_SC_PLL_CTRL1,4,2    ## @OV5640_REG_SC_PLL_CTRL1
	.comm	_OV5640_REG_SC_PLL_CTRL2,4,2    ## @OV5640_REG_SC_PLL_CTRL2
	.comm	_OV5640_REG_SC_PLL_CTRL3,4,2    ## @OV5640_REG_SC_PLL_CTRL3
	.comm	_OV5640_PLL_CTRL3_PLL_ROOT_DIV_2,4,2 ## @OV5640_PLL_CTRL3_PLL_ROOT_DIV_2
	.comm	_OV5640_REG_SYS_ROOT_DIVIDER,4,2 ## @OV5640_REG_SYS_ROOT_DIVIDER
	.comm	_OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS,4,2 ## @OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS
	.no_dead_strip	_ov5640_set_mipi_pclk
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ov5640_set_mipi_pclk
_ov5640_set_mipi_pclk:                  ; @ov5640_set_mipi_pclk
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x9, [x0]
	ldr	x10, [x9]
Lloh0:
	adrp	x8, _SCALING@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SCALING@GOTPAGEOFF]
Lloh2:
	ldr	x11, [x8]
Lloh3:
	adrp	x8, _OV5640_MIPI_DIV_SCLK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _OV5640_MIPI_DIV_SCLK@GOTPAGEOFF]
	cmp	x10, x11
	b.eq	LBB0_2
; %bb.1:
Lloh5:
	adrp	x10, _OV5640_MODE_720P_1280_720@GOTPAGE
Lloh6:
	ldr	x10, [x10, _OV5640_MODE_720P_1280_720@GOTPAGEOFF]
	ldr	x9, [x9, #8]
Lloh7:
	ldr	x10, [x10]
Lloh8:
	adrp	x11, _OV5640_MIPI_DIV_PCLK@GOTPAGE
Lloh9:
	ldr	x11, [x11, _OV5640_MIPI_DIV_PCLK@GOTPAGEOFF]
	cmp	x9, x10
	csel	x8, x8, x11, eq
LBB0_2:
	ldr	w20, [x8]
	add	x2, sp, #12
	add	x3, sp, #8
	add	x4, sp, #4
	mov	x0, x19
	bl	_ov5640_calc_sys_clk
Lloh10:
	adrp	x8, _OV5640_REG_SC_PLL_CTRL0@GOTPAGE
Lloh11:
	ldr	x8, [x8, _OV5640_REG_SC_PLL_CTRL0@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
Lloh13:
	adrp	x8, _OV5640_PLL_CTRL0_MIPI_MODE_8BIT@GOTPAGE
Lloh14:
	ldr	x8, [x8, _OV5640_PLL_CTRL0_MIPI_MODE_8BIT@GOTPAGEOFF]
Lloh15:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w2, #15
	bl	_ov5640_mod_reg
Lloh16:
	adrp	x8, _OV5640_REG_SC_PLL_CTRL1@GOTPAGE
Lloh17:
	ldr	x8, [x8, _OV5640_REG_SC_PLL_CTRL1@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	ldr	w8, [sp, #4]
	orr	w3, w20, w8, lsl #4
	mov	x0, x19
	mov	w2, #255
	bl	_ov5640_mod_reg
	cbnz	w0, LBB0_6
; %bb.3:
Lloh19:
	adrp	x8, _OV5640_REG_SC_PLL_CTRL2@GOTPAGE
Lloh20:
	ldr	x8, [x8, _OV5640_REG_SC_PLL_CTRL2@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	ldr	w3, [sp, #8]
	mov	x0, x19
	mov	w2, #255
	bl	_ov5640_mod_reg
	cbnz	w0, LBB0_6
; %bb.4:
Lloh22:
	adrp	x8, _OV5640_REG_SC_PLL_CTRL3@GOTPAGE
Lloh23:
	ldr	x8, [x8, _OV5640_REG_SC_PLL_CTRL3@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
Lloh25:
	adrp	x8, _OV5640_PLL_CTRL3_PLL_ROOT_DIV_2@GOTPAGE
Lloh26:
	ldr	x8, [x8, _OV5640_PLL_CTRL3_PLL_ROOT_DIV_2@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
	ldr	w9, [sp, #12]
	orr	w3, w9, w8
	mov	x0, x19
	mov	w2, #31
	bl	_ov5640_mod_reg
	cbnz	w0, LBB0_6
; %bb.5:
Lloh28:
	adrp	x8, _OV5640_REG_SYS_ROOT_DIVIDER@GOTPAGE
Lloh29:
	ldr	x8, [x8, _OV5640_REG_SYS_ROOT_DIVIDER@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
Lloh31:
	adrp	x8, _OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS@GOTPAGE
Lloh32:
	ldr	x8, [x8, _OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS@GOTPAGEOFF]
Lloh33:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w2, #48
	bl	_ov5640_mod_reg
LBB0_6:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.cfi_endproc
                                        ; -- End function
	.comm	_SCALING,8,3                    ; @SCALING
	.comm	_OV5640_MODE_720P_1280_720,8,3  ; @OV5640_MODE_720P_1280_720
	.comm	_OV5640_MIPI_DIV_SCLK,4,2       ; @OV5640_MIPI_DIV_SCLK
	.comm	_OV5640_MIPI_DIV_PCLK,4,2       ; @OV5640_MIPI_DIV_PCLK
	.comm	_OV5640_REG_SC_PLL_CTRL0,4,2    ; @OV5640_REG_SC_PLL_CTRL0
	.comm	_OV5640_PLL_CTRL0_MIPI_MODE_8BIT,4,2 ; @OV5640_PLL_CTRL0_MIPI_MODE_8BIT
	.comm	_OV5640_REG_SC_PLL_CTRL1,4,2    ; @OV5640_REG_SC_PLL_CTRL1
	.comm	_OV5640_REG_SC_PLL_CTRL2,4,2    ; @OV5640_REG_SC_PLL_CTRL2
	.comm	_OV5640_REG_SC_PLL_CTRL3,4,2    ; @OV5640_REG_SC_PLL_CTRL3
	.comm	_OV5640_PLL_CTRL3_PLL_ROOT_DIV_2,4,2 ; @OV5640_PLL_CTRL3_PLL_ROOT_DIV_2
	.comm	_OV5640_REG_SYS_ROOT_DIVIDER,4,2 ; @OV5640_REG_SYS_ROOT_DIVIDER
	.comm	_OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS,4,2 ; @OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS
	.no_dead_strip	_ov5640_set_mipi_pclk
.subsections_via_symbols
