	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cxl_pci_vphb_add               ## -- Begin function cxl_pci_vphb_add
	.p2align	4, 0x90
_cxl_pci_vphb_add:                      ## @cxl_pci_vphb_add
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	xorl	%r14d, %r14d
	cmpl	$0, 16(%rdi)
	je	LBB0_7
## %bb.1:
	movq	%rdi, %r15
	movq	8(%rdi), %rax
	movq	(%rax), %r12
	movq	(%r12), %rdi
	callq	_pcibios_alloc_controller
	testq	%rax, %rax
	je	LBB0_2
## %bb.4:
	movq	%rax, %rbx
	movq	%r12, 48(%rax)
	movq	_cxl_pcie_pci_ops@GOTPCREL(%rip), %rax
	movq	%rax, 40(%rbx)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 24(%rbx)
	movq	%r15, 16(%rbx)
	movq	_cxl_pci_controller_ops@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rbx)
	movq	%rbx, %rdi
	callq	_pcibios_scan_phb
	movq	(%rbx), %rax
	testq	%rax, %rax
	je	LBB0_5
## %bb.6:
	movl	(%rax), %edi
	callq	_to_pci_host_bridge
	movq	_pcibios_free_controller_deferred@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	movl	%eax, %edi
	movq	%rbx, %rdx
	callq	_pci_set_host_bridge_release
	movq	(%rbx), %rdi
	callq	_pcibios_claim_one_bus
	movq	(%rbx), %rdi
	callq	_pci_bus_add_devices
	movq	%rbx, (%r15)
	jmp	LBB0_7
LBB0_2:
	movq	_ENODEV@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_5:
	movq	_ENXIO@GOTPCREL(%rip), %rax
LBB0_3:
	xorl	%r14d, %r14d
	subl	(%rax), %r14d
LBB0_7:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_cxl_pcie_pci_ops,4,2           ## @cxl_pcie_pci_ops
	.comm	_cxl_pci_controller_ops,4,2     ## @cxl_pci_controller_ops
	.comm	_ENXIO,4,2                      ## @ENXIO
	.comm	_pcibios_free_controller_deferred,4,2 ## @pcibios_free_controller_deferred
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cxl_pci_vphb_add               ; -- Begin function cxl_pci_vphb_add
	.p2align	2
_cxl_pci_vphb_add:                      ; @cxl_pci_vphb_add
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	w8, [x0, #16]
	cbz	w8, LBB0_4
; %bb.1:
	mov	x19, x0
	ldr	x8, [x0, #8]
	ldr	x21, [x8]
	ldr	x0, [x21]
	bl	_pcibios_alloc_controller
	cbz	x0, LBB0_5
; %bb.2:
	mov	x20, x0
	str	x21, [x0, #48]
Lloh0:
	adrp	x8, _cxl_pcie_pci_ops@GOTPAGE
Lloh1:
	ldr	x8, [x8, _cxl_pcie_pci_ops@GOTPAGEOFF]
	stp	xzr, x8, [x0, #32]
	stp	x19, xzr, [x0, #16]
Lloh2:
	adrp	x8, _cxl_pci_controller_ops@GOTPAGE
Lloh3:
	ldr	x8, [x8, _cxl_pci_controller_ops@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	str	w8, [x0, #8]
	bl	_pcibios_scan_phb
	ldr	x8, [x20]
	cbz	x8, LBB0_6
; %bb.3:
	ldr	w0, [x8]
	bl	_to_pci_host_bridge
Lloh5:
	adrp	x8, _pcibios_free_controller_deferred@GOTPAGE
Lloh6:
	ldr	x8, [x8, _pcibios_free_controller_deferred@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	mov	x2, x20
	bl	_pci_set_host_bridge_release
	ldr	x0, [x20]
	bl	_pcibios_claim_one_bus
	ldr	x0, [x20]
	bl	_pci_bus_add_devices
	mov	w0, #0
	str	x20, [x19]
	b	LBB0_8
LBB0_4:
	mov	w0, #0
	b	LBB0_8
LBB0_5:
Lloh8:
	adrp	x8, _ENODEV@GOTPAGE
Lloh9:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
	b	LBB0_7
LBB0_6:
Lloh10:
	adrp	x8, _ENXIO@GOTPAGE
Lloh11:
	ldr	x8, [x8, _ENXIO@GOTPAGEOFF]
LBB0_7:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_8:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_cxl_pcie_pci_ops,4,2           ; @cxl_pcie_pci_ops
	.comm	_cxl_pci_controller_ops,4,2     ; @cxl_pci_controller_ops
	.comm	_ENXIO,4,2                      ; @ENXIO
	.comm	_pcibios_free_controller_deferred,4,2 ; @pcibios_free_controller_deferred
.subsections_via_symbols
