	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cx18_init_memory               ## -- Begin function cx18_init_memory
	.p2align	4, 0x90
_cx18_init_memory:                      ## @cx18_init_memory
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movl	$10, %edi
	xorl	%esi, %esi
	callq	_cx18_msleep_timeout
	movq	_CX18_DDR_SOFT_RESET@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movq	%rbx, %rdi
	movl	$65536, %esi                    ## imm = 0x10000
	xorl	%ecx, %ecx
	movl	$65537, %r8d                    ## imm = 0x10001
	callq	_cx18_write_reg_expect
	movl	$10, %edi
	xorl	%esi, %esi
	callq	_cx18_msleep_timeout
	movq	(%rbx), %rax
	movl	(%rax), %esi
	movq	_CX18_DDR_CHIP_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_cx18_write_reg
	movl	$10, %edi
	xorl	%esi, %esi
	callq	_cx18_msleep_timeout
	movq	(%rbx), %rax
	movl	4(%rax), %esi
	movq	_CX18_DDR_REFRESH@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_cx18_write_reg
	movq	(%rbx), %rax
	movl	8(%rax), %esi
	movq	_CX18_DDR_TIMING1@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_cx18_write_reg
	movq	(%rbx), %rax
	movl	12(%rax), %esi
	movq	_CX18_DDR_TIMING2@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_cx18_write_reg
	movl	$10, %edi
	xorl	%esi, %esi
	callq	_cx18_msleep_timeout
	movq	(%rbx), %rax
	movl	16(%rax), %esi
	movq	_CX18_DDR_TUNE_LANE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_cx18_write_reg
	movq	(%rbx), %rax
	movl	20(%rax), %esi
	movq	_CX18_DDR_INITIAL_EMRS@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_cx18_write_reg
	movl	$10, %edi
	xorl	%esi, %esi
	callq	_cx18_msleep_timeout
	movl	(%r14), %edx
	movq	%rbx, %rdi
	movl	$131072, %esi                   ## imm = 0x20000
	xorl	%ecx, %ecx
	movl	$131074, %r8d                   ## imm = 0x20002
	callq	_cx18_write_reg_expect
	movl	$10, %edi
	xorl	%esi, %esi
	callq	_cx18_msleep_timeout
	movq	_CX18_DDR_POWER_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$16, %esi
	callq	_cx18_write_reg
	movq	_CX18_REG_BUS_TIMEOUT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$65537, %esi                    ## imm = 0x10001
	movl	$1, %ecx
	movl	$65537, %r8d                    ## imm = 0x10001
	callq	_cx18_write_reg_expect
	movq	_CX18_DDR_MB_PER_ROW_7@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$72, %esi
	callq	_cx18_write_reg
	movq	_CX18_DDR_BASE_63_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$917504, %esi                   ## imm = 0xE0000
	callq	_cx18_write_reg
	movq	_CX18_WMB_CLIENT02@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$257, %esi                      ## imm = 0x101
	callq	_cx18_write_reg
	movq	_CX18_WMB_CLIENT09@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$257, %esi                      ## imm = 0x101
	callq	_cx18_write_reg
	movq	_CX18_WMB_CLIENT05@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$257, %esi                      ## imm = 0x101
	callq	_cx18_write_reg
	movq	_CX18_WMB_CLIENT06@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$257, %esi                      ## imm = 0x101
	callq	_cx18_write_reg
	movq	_CX18_WMB_CLIENT07@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$257, %esi                      ## imm = 0x101
	callq	_cx18_write_reg
	movq	_CX18_WMB_CLIENT10@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$257, %esi                      ## imm = 0x101
	callq	_cx18_write_reg
	movq	_CX18_WMB_CLIENT12@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$257, %esi                      ## imm = 0x101
	callq	_cx18_write_reg
	movq	_CX18_WMB_CLIENT13@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$257, %esi                      ## imm = 0x101
	callq	_cx18_write_reg
	movq	_CX18_WMB_CLIENT11@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$257, %esi                      ## imm = 0x101
	callq	_cx18_write_reg
	movq	_CX18_WMB_CLIENT14@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	movl	$257, %esi                      ## imm = 0x101
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_cx18_write_reg                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CX18_DDR_SOFT_RESET,4,2        ## @CX18_DDR_SOFT_RESET
	.comm	_CX18_DDR_CHIP_CONFIG,4,2       ## @CX18_DDR_CHIP_CONFIG
	.comm	_CX18_DDR_REFRESH,4,2           ## @CX18_DDR_REFRESH
	.comm	_CX18_DDR_TIMING1,4,2           ## @CX18_DDR_TIMING1
	.comm	_CX18_DDR_TIMING2,4,2           ## @CX18_DDR_TIMING2
	.comm	_CX18_DDR_TUNE_LANE,4,2         ## @CX18_DDR_TUNE_LANE
	.comm	_CX18_DDR_INITIAL_EMRS,4,2      ## @CX18_DDR_INITIAL_EMRS
	.comm	_CX18_DDR_POWER_REG,4,2         ## @CX18_DDR_POWER_REG
	.comm	_CX18_REG_BUS_TIMEOUT_EN,4,2    ## @CX18_REG_BUS_TIMEOUT_EN
	.comm	_CX18_DDR_MB_PER_ROW_7,4,2      ## @CX18_DDR_MB_PER_ROW_7
	.comm	_CX18_DDR_BASE_63_ADDR,4,2      ## @CX18_DDR_BASE_63_ADDR
	.comm	_CX18_WMB_CLIENT02,4,2          ## @CX18_WMB_CLIENT02
	.comm	_CX18_WMB_CLIENT09,4,2          ## @CX18_WMB_CLIENT09
	.comm	_CX18_WMB_CLIENT05,4,2          ## @CX18_WMB_CLIENT05
	.comm	_CX18_WMB_CLIENT06,4,2          ## @CX18_WMB_CLIENT06
	.comm	_CX18_WMB_CLIENT07,4,2          ## @CX18_WMB_CLIENT07
	.comm	_CX18_WMB_CLIENT10,4,2          ## @CX18_WMB_CLIENT10
	.comm	_CX18_WMB_CLIENT12,4,2          ## @CX18_WMB_CLIENT12
	.comm	_CX18_WMB_CLIENT13,4,2          ## @CX18_WMB_CLIENT13
	.comm	_CX18_WMB_CLIENT11,4,2          ## @CX18_WMB_CLIENT11
	.comm	_CX18_WMB_CLIENT14,4,2          ## @CX18_WMB_CLIENT14
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cx18_init_memory               ; -- Begin function cx18_init_memory
	.p2align	2
_cx18_init_memory:                      ; @cx18_init_memory
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	mov	w0, #10
	mov	w1, #0
	bl	_cx18_msleep_timeout
Lloh0:
	adrp	x20, _CX18_DDR_SOFT_RESET@GOTPAGE
Lloh1:
	ldr	x20, [x20, _CX18_DDR_SOFT_RESET@GOTPAGEOFF]
	ldr	w2, [x20]
	mov	x0, x19
	mov	w1, #65536
	mov	w3, #0
	mov	w4, #65537
	bl	_cx18_write_reg_expect
	mov	w0, #10
	mov	w1, #0
	bl	_cx18_msleep_timeout
	ldr	x8, [x19]
	ldr	w1, [x8]
Lloh2:
	adrp	x8, _CX18_DDR_CHIP_CONFIG@GOTPAGE
Lloh3:
	ldr	x8, [x8, _CX18_DDR_CHIP_CONFIG@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_cx18_write_reg
	mov	w0, #10
	mov	w1, #0
	bl	_cx18_msleep_timeout
	ldr	x8, [x19]
	ldr	w1, [x8, #4]
Lloh5:
	adrp	x8, _CX18_DDR_REFRESH@GOTPAGE
Lloh6:
	ldr	x8, [x8, _CX18_DDR_REFRESH@GOTPAGEOFF]
Lloh7:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_cx18_write_reg
	ldr	x8, [x19]
	ldr	w1, [x8, #8]
Lloh8:
	adrp	x8, _CX18_DDR_TIMING1@GOTPAGE
Lloh9:
	ldr	x8, [x8, _CX18_DDR_TIMING1@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_cx18_write_reg
	ldr	x8, [x19]
	ldr	w1, [x8, #12]
Lloh11:
	adrp	x8, _CX18_DDR_TIMING2@GOTPAGE
Lloh12:
	ldr	x8, [x8, _CX18_DDR_TIMING2@GOTPAGEOFF]
Lloh13:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_cx18_write_reg
	mov	w0, #10
	mov	w1, #0
	bl	_cx18_msleep_timeout
	ldr	x8, [x19]
	ldr	w1, [x8, #16]
Lloh14:
	adrp	x8, _CX18_DDR_TUNE_LANE@GOTPAGE
Lloh15:
	ldr	x8, [x8, _CX18_DDR_TUNE_LANE@GOTPAGEOFF]
Lloh16:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_cx18_write_reg
	ldr	x8, [x19]
	ldr	w1, [x8, #20]
Lloh17:
	adrp	x8, _CX18_DDR_INITIAL_EMRS@GOTPAGE
Lloh18:
	ldr	x8, [x8, _CX18_DDR_INITIAL_EMRS@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_cx18_write_reg
	mov	w0, #10
	mov	w1, #0
	bl	_cx18_msleep_timeout
	ldr	w2, [x20]
	mov	x0, x19
	mov	w1, #131072
	mov	w3, #0
	mov	w4, #131074
	bl	_cx18_write_reg_expect
	mov	w0, #10
	mov	w1, #0
	bl	_cx18_msleep_timeout
Lloh20:
	adrp	x8, _CX18_DDR_POWER_REG@GOTPAGE
Lloh21:
	ldr	x8, [x8, _CX18_DDR_POWER_REG@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #16
	bl	_cx18_write_reg
Lloh23:
	adrp	x8, _CX18_REG_BUS_TIMEOUT_EN@GOTPAGE
Lloh24:
	ldr	x8, [x8, _CX18_REG_BUS_TIMEOUT_EN@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #65537
	mov	w3, #1
	mov	w4, #65537
	bl	_cx18_write_reg_expect
Lloh26:
	adrp	x8, _CX18_DDR_MB_PER_ROW_7@GOTPAGE
Lloh27:
	ldr	x8, [x8, _CX18_DDR_MB_PER_ROW_7@GOTPAGEOFF]
Lloh28:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #72
	bl	_cx18_write_reg
Lloh29:
	adrp	x8, _CX18_DDR_BASE_63_ADDR@GOTPAGE
Lloh30:
	ldr	x8, [x8, _CX18_DDR_BASE_63_ADDR@GOTPAGEOFF]
Lloh31:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #917504
	bl	_cx18_write_reg
Lloh32:
	adrp	x8, _CX18_WMB_CLIENT02@GOTPAGE
Lloh33:
	ldr	x8, [x8, _CX18_WMB_CLIENT02@GOTPAGEOFF]
Lloh34:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #257
	bl	_cx18_write_reg
Lloh35:
	adrp	x8, _CX18_WMB_CLIENT09@GOTPAGE
Lloh36:
	ldr	x8, [x8, _CX18_WMB_CLIENT09@GOTPAGEOFF]
Lloh37:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #257
	bl	_cx18_write_reg
Lloh38:
	adrp	x8, _CX18_WMB_CLIENT05@GOTPAGE
Lloh39:
	ldr	x8, [x8, _CX18_WMB_CLIENT05@GOTPAGEOFF]
Lloh40:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #257
	bl	_cx18_write_reg
Lloh41:
	adrp	x8, _CX18_WMB_CLIENT06@GOTPAGE
Lloh42:
	ldr	x8, [x8, _CX18_WMB_CLIENT06@GOTPAGEOFF]
Lloh43:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #257
	bl	_cx18_write_reg
Lloh44:
	adrp	x8, _CX18_WMB_CLIENT07@GOTPAGE
Lloh45:
	ldr	x8, [x8, _CX18_WMB_CLIENT07@GOTPAGEOFF]
Lloh46:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #257
	bl	_cx18_write_reg
Lloh47:
	adrp	x8, _CX18_WMB_CLIENT10@GOTPAGE
Lloh48:
	ldr	x8, [x8, _CX18_WMB_CLIENT10@GOTPAGEOFF]
Lloh49:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #257
	bl	_cx18_write_reg
Lloh50:
	adrp	x8, _CX18_WMB_CLIENT12@GOTPAGE
Lloh51:
	ldr	x8, [x8, _CX18_WMB_CLIENT12@GOTPAGEOFF]
Lloh52:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #257
	bl	_cx18_write_reg
Lloh53:
	adrp	x8, _CX18_WMB_CLIENT13@GOTPAGE
Lloh54:
	ldr	x8, [x8, _CX18_WMB_CLIENT13@GOTPAGEOFF]
Lloh55:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #257
	bl	_cx18_write_reg
Lloh56:
	adrp	x8, _CX18_WMB_CLIENT11@GOTPAGE
Lloh57:
	ldr	x8, [x8, _CX18_WMB_CLIENT11@GOTPAGEOFF]
Lloh58:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #257
	bl	_cx18_write_reg
Lloh59:
	adrp	x8, _CX18_WMB_CLIENT14@GOTPAGE
Lloh60:
	ldr	x8, [x8, _CX18_WMB_CLIENT14@GOTPAGEOFF]
Lloh61:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w1, #257
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_cx18_write_reg
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_CX18_DDR_SOFT_RESET,4,2        ; @CX18_DDR_SOFT_RESET
	.comm	_CX18_DDR_CHIP_CONFIG,4,2       ; @CX18_DDR_CHIP_CONFIG
	.comm	_CX18_DDR_REFRESH,4,2           ; @CX18_DDR_REFRESH
	.comm	_CX18_DDR_TIMING1,4,2           ; @CX18_DDR_TIMING1
	.comm	_CX18_DDR_TIMING2,4,2           ; @CX18_DDR_TIMING2
	.comm	_CX18_DDR_TUNE_LANE,4,2         ; @CX18_DDR_TUNE_LANE
	.comm	_CX18_DDR_INITIAL_EMRS,4,2      ; @CX18_DDR_INITIAL_EMRS
	.comm	_CX18_DDR_POWER_REG,4,2         ; @CX18_DDR_POWER_REG
	.comm	_CX18_REG_BUS_TIMEOUT_EN,4,2    ; @CX18_REG_BUS_TIMEOUT_EN
	.comm	_CX18_DDR_MB_PER_ROW_7,4,2      ; @CX18_DDR_MB_PER_ROW_7
	.comm	_CX18_DDR_BASE_63_ADDR,4,2      ; @CX18_DDR_BASE_63_ADDR
	.comm	_CX18_WMB_CLIENT02,4,2          ; @CX18_WMB_CLIENT02
	.comm	_CX18_WMB_CLIENT09,4,2          ; @CX18_WMB_CLIENT09
	.comm	_CX18_WMB_CLIENT05,4,2          ; @CX18_WMB_CLIENT05
	.comm	_CX18_WMB_CLIENT06,4,2          ; @CX18_WMB_CLIENT06
	.comm	_CX18_WMB_CLIENT07,4,2          ; @CX18_WMB_CLIENT07
	.comm	_CX18_WMB_CLIENT10,4,2          ; @CX18_WMB_CLIENT10
	.comm	_CX18_WMB_CLIENT12,4,2          ; @CX18_WMB_CLIENT12
	.comm	_CX18_WMB_CLIENT13,4,2          ; @CX18_WMB_CLIENT13
	.comm	_CX18_WMB_CLIENT11,4,2          ; @CX18_WMB_CLIENT11
	.comm	_CX18_WMB_CLIENT14,4,2          ; @CX18_WMB_CLIENT14
.subsections_via_symbols
