	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_t4_intr_disable                ## -- Begin function t4_intr_disable
	.p2align	4, 0x90
_t4_intr_disable:                       ## @t4_intr_disable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movl	4(%rdi), %edi
	callq	_pci_channel_offline
	testq	%rax, %rax
	je	LBB0_1
## %bb.5:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_1:
	movq	_PL_WHOAMI_A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_t4_read_reg
	movl	%eax, %r14d
	movl	(%rbx), %edi
	callq	_CHELSIO_CHIP_VERSION
	movq	_CHELSIO_T5@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jle	LBB0_2
## %bb.3:
	movl	%r14d, %edi
	callq	_T6_SOURCEPF_G
	jmp	LBB0_4
LBB0_2:
	movl	%r14d, %edi
	callq	_SOURCEPF_G
LBB0_4:
	movl	%eax, %r14d
	movq	_PL_PF_INT_ENABLE_A@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_MYPF_REG
	movq	%rbx, %rdi
	movl	%eax, %esi
	xorl	%edx, %edx
	callq	_t4_write_reg
	movq	_PL_INT_MAP0_A@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	movl	%r14d, %ecx
	shll	%cl, %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_t4_set_reg_field               ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PL_WHOAMI_A,4,2                ## @PL_WHOAMI_A
	.comm	_CHELSIO_T5,8,3                 ## @CHELSIO_T5
	.comm	_PL_PF_INT_ENABLE_A,4,2         ## @PL_PF_INT_ENABLE_A
	.comm	_PL_INT_MAP0_A,4,2              ## @PL_INT_MAP0_A
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_t4_intr_disable                ; -- Begin function t4_intr_disable
	.p2align	2
_t4_intr_disable:                       ; @t4_intr_disable
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w0, [x0, #4]
	bl	_pci_channel_offline
	cbz	x0, LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_2:
Lloh0:
	adrp	x8, _PL_WHOAMI_A@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PL_WHOAMI_A@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_t4_read_reg
	mov	x20, x0
	ldr	w0, [x19]
	bl	_CHELSIO_CHIP_VERSION
Lloh3:
	adrp	x8, _CHELSIO_T5@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CHELSIO_T5@GOTPAGEOFF]
Lloh5:
	ldr	x8, [x8]
	cmp	x0, x8
	b.le	LBB0_4
; %bb.3:
	mov	x0, x20
	bl	_T6_SOURCEPF_G
	b	LBB0_5
LBB0_4:
	mov	x0, x20
	bl	_SOURCEPF_G
LBB0_5:
	mov	x20, x0
Lloh6:
	adrp	x8, _PL_PF_INT_ENABLE_A@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PL_PF_INT_ENABLE_A@GOTPAGEOFF]
Lloh8:
	ldr	w0, [x8]
	bl	_MYPF_REG
	mov	x1, x0
	mov	x0, x19
	mov	w2, #0
	bl	_t4_write_reg
Lloh9:
	adrp	x8, _PL_INT_MAP0_A@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PL_INT_MAP0_A@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	w8, #1
	lsl	w2, w8, w20
	mov	x0, x19
	mov	w3, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_t4_set_reg_field
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_PL_WHOAMI_A,4,2                ; @PL_WHOAMI_A
	.comm	_CHELSIO_T5,8,3                 ; @CHELSIO_T5
	.comm	_PL_PF_INT_ENABLE_A,4,2         ; @PL_PF_INT_ENABLE_A
	.comm	_PL_INT_MAP0_A,4,2              ; @PL_INT_MAP0_A
.subsections_via_symbols
