	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dw_mci_set_ios
_dw_mci_set_ios:                        ## @dw_mci_set_ios
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	callq	_mmc_priv
	movq	%rax, %rbx
	movq	16(%rax), %rdi
	movl	(%r14), %ecx
	cmpl	$131, %ecx
	jne	LBB0_1
## %bb.2:
	movq	_SDMMC_CTYPE_8BIT@GOTPCREL(%rip), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_SDMMC_CTYPE_1BIT@GOTPCREL(%rip), %rax
LBB0_3:
	movq	32(%rdi), %r12
	cmpl	$132, %ecx
	jne	LBB0_5
## %bb.4:
	movq	_SDMMC_CTYPE_4BIT@GOTPCREL(%rip), %rax
LBB0_5:
	movl	(%rax), %eax
	movl	%eax, 28(%rbx)
	movq	_UHS_REG@GOTPCREL(%rip), %r13
	movl	(%r13), %esi
	callq	_mci_readl
	movq	8(%r14), %rsi
	movq	_MMC_TIMING_MMC_DDR52@GOTPCREL(%rip), %r8
	movq	_MMC_TIMING_UHS_DDR50@GOTPCREL(%rip), %r9
	movq	_MMC_TIMING_MMC_HS400@GOTPCREL(%rip), %rdi
	movb	(%rbx), %cl
	movl	$65536, %edx                    ## imm = 0x10000
	shll	%cl, %edx
	movl	%edx, %ecx
	orl	%eax, %ecx
	notl	%edx
	andl	%eax, %edx
	cmpq	(%rdi), %rsi
	cmovel	%ecx, %edx
	cmpq	(%r9), %rsi
	cmovel	%ecx, %edx
	cmpq	(%r8), %rsi
	cmovel	%ecx, %edx
	movq	16(%rbx), %rdi
	movl	(%r13), %esi
	callq	_mci_writel
	movq	8(%r14), %rax
	movq	16(%rbx), %rdi
	movq	%rax, (%rdi)
	movq	16(%r14), %rax
	movq	%rax, 8(%rbx)
	testq	%r12, %r12
	je	LBB0_8
## %bb.6:
	movq	(%r12), %rax
	testq	%rax, %rax
	je	LBB0_8
## %bb.7:
	movq	%r14, %rsi
	callq	*%rax
LBB0_8:
	movl	24(%r14), %eax
	cmpl	$130, %eax
	je	LBB0_22
## %bb.9:
	cmpl	$129, %eax
	je	LBB0_14
## %bb.10:
	cmpl	$128, %eax
	jne	LBB0_29
## %bb.11:
	movl	4(%r15), %edi
	callq	_IS_ERR
	testl	%eax, %eax
	je	LBB0_12
LBB0_13:
	movq	_DW_MMC_CARD_NEED_INIT@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	%rbx, %rsi
	addq	$24, %rsi
	callq	_set_bit
	movq	16(%rbx), %rdi
	movq	_PWREN@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_mci_readl
	movb	(%rbx), %cl
	btsl	%ecx, %eax
	jmp	LBB0_28
LBB0_22:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_dw_mci_setup_bus
	movl	4(%r15), %edi
	callq	_IS_ERR
	testl	%eax, %eax
	jne	LBB0_24
## %bb.23:
	movl	4(%r15), %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_mmc_regulator_set_ocr
LBB0_24:
	movl	(%r15), %edi
	callq	_IS_ERR
	testl	%eax, %eax
	jne	LBB0_27
## %bb.25:
	movq	16(%rbx), %rax
	cmpl	$0, 8(%rax)
	je	LBB0_27
## %bb.26:
	movl	(%r15), %edi
	callq	_regulator_disable
LBB0_27:
	movq	16(%rbx), %rdi
	movl	$0, 8(%rdi)
	movq	_PWREN@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_mci_readl
	movb	(%rbx), %cl
	btrl	%ecx, %eax
LBB0_28:
	movq	16(%rbx), %rdi
	movl	(%r15), %esi
	movl	%eax, %edx
	callq	_mci_writel
	jmp	LBB0_29
LBB0_14:
	movq	16(%rbx), %rax
	cmpl	$0, 8(%rax)
	jne	LBB0_21
## %bb.15:
	movl	(%r15), %edi
	callq	_IS_ERR
	testl	%eax, %eax
	je	LBB0_16
## %bb.18:
	movq	16(%rbx), %rdi
	jmp	LBB0_19
LBB0_12:
	movl	4(%r15), %esi
	movl	28(%r14), %edx
	movq	%r15, %rdi
	callq	_mmc_regulator_set_ocr
	testl	%eax, %eax
	je	LBB0_13
## %bb.33:
	movq	16(%rbx), %rax
	movl	24(%rax), %edi
	leaq	L_.str(%rip), %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_err                        ## TAILCALL
LBB0_16:
	movl	(%r15), %edi
	callq	_regulator_enable
	movq	16(%rbx), %rdi
	testl	%eax, %eax
	js	LBB0_17
LBB0_19:
	movl	$1, 8(%rdi)
LBB0_20:
	movq	_SDMMC_CTRL_ALL_RESET_FLAGS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_dw_mci_ctrl_reset
LBB0_21:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_dw_mci_setup_bus
LBB0_29:
	movq	16(%rbx), %rax
	movq	16(%rax), %rcx
	movq	_STATE_WAITING_CMD11_DONE@GOTPCREL(%rip), %rdx
	cmpq	(%rdx), %rcx
	jne	LBB0_32
## %bb.30:
	cmpq	$0, 16(%r14)
	je	LBB0_32
## %bb.31:
	movq	_STATE_IDLE@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	%rcx, 16(%rax)
LBB0_32:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_17:
	movl	24(%rdi), %edi
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_err
	movq	16(%rbx), %rdi
	jmp	LBB0_20
	.cfi_endproc
                                        ## -- End function
	.comm	_SDMMC_CTYPE_4BIT,4,2           ## @SDMMC_CTYPE_4BIT
	.comm	_SDMMC_CTYPE_8BIT,4,2           ## @SDMMC_CTYPE_8BIT
	.comm	_SDMMC_CTYPE_1BIT,4,2           ## @SDMMC_CTYPE_1BIT
	.comm	_UHS_REG,4,2                    ## @UHS_REG
	.comm	_MMC_TIMING_MMC_DDR52,8,3       ## @MMC_TIMING_MMC_DDR52
	.comm	_MMC_TIMING_UHS_DDR50,8,3       ## @MMC_TIMING_UHS_DDR50
	.comm	_MMC_TIMING_MMC_HS400,8,3       ## @MMC_TIMING_MMC_HS400
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to enable vmmc regulator\n"

	.comm	_DW_MMC_CARD_NEED_INIT,4,2      ## @DW_MMC_CARD_NEED_INIT
	.comm	_PWREN,4,2                      ## @PWREN
L_.str.1:                               ## @.str.1
	.asciz	"failed to enable vqmmc\n"

	.comm	_SDMMC_CTRL_ALL_RESET_FLAGS,4,2 ## @SDMMC_CTRL_ALL_RESET_FLAGS
	.comm	_STATE_WAITING_CMD11_DONE,8,3   ## @STATE_WAITING_CMD11_DONE
	.comm	_STATE_IDLE,8,3                 ## @STATE_IDLE
	.no_dead_strip	_dw_mci_set_ios
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dw_mci_set_ios
_dw_mci_set_ios:                        ; @dw_mci_set_ios
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x21, x0
	bl	_mmc_priv
	mov	x20, x0
	ldr	x0, [x0, #16]
	ldr	x22, [x0, #32]
Lloh0:
	adrp	x8, _SDMMC_CTYPE_4BIT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SDMMC_CTYPE_4BIT@GOTPAGEOFF]
Lloh2:
	adrp	x9, _SDMMC_CTYPE_8BIT@GOTPAGE
Lloh3:
	ldr	x9, [x9, _SDMMC_CTYPE_8BIT@GOTPAGEOFF]
	ldr	w10, [x19]
Lloh4:
	adrp	x11, _SDMMC_CTYPE_1BIT@GOTPAGE
Lloh5:
	ldr	x11, [x11, _SDMMC_CTYPE_1BIT@GOTPAGEOFF]
	cmp	w10, #131
	csel	x9, x9, x11, eq
	cmp	w10, #132
	csel	x8, x8, x9, eq
	ldr	w8, [x8]
	str	w8, [x20, #28]
Lloh6:
	adrp	x23, _UHS_REG@GOTPAGE
Lloh7:
	ldr	x23, [x23, _UHS_REG@GOTPAGEOFF]
	ldr	w1, [x23]
	bl	_mci_readl
	ldr	x8, [x19, #8]
Lloh8:
	adrp	x9, _MMC_TIMING_MMC_DDR52@GOTPAGE
Lloh9:
	ldr	x9, [x9, _MMC_TIMING_MMC_DDR52@GOTPAGEOFF]
Lloh10:
	ldr	x9, [x9]
Lloh11:
	adrp	x10, _MMC_TIMING_UHS_DDR50@GOTPAGE
Lloh12:
	ldr	x10, [x10, _MMC_TIMING_UHS_DDR50@GOTPAGEOFF]
Lloh13:
	ldr	x10, [x10]
Lloh14:
	adrp	x11, _MMC_TIMING_MMC_HS400@GOTPAGE
Lloh15:
	ldr	x11, [x11, _MMC_TIMING_MMC_HS400@GOTPAGEOFF]
Lloh16:
	ldr	x11, [x11]
	cmp	x8, x11
	ccmp	x8, x10, #4, ne
	ccmp	x8, x9, #4, ne
	ldr	w8, [x20]
	mov	w9, #65536
	lsl	w8, w9, w8
	orr	w9, w8, w0
	bic	w8, w0, w8
	csel	w2, w9, w8, eq
	ldr	x0, [x20, #16]
	ldr	w1, [x23]
	bl	_mci_writel
	ldr	x0, [x20, #16]
	ldp	x8, x9, [x19, #8]
	str	x8, [x0]
	str	x9, [x20, #8]
	cbz	x22, LBB0_3
; %bb.1:
	ldr	x8, [x22]
	cbz	x8, LBB0_3
; %bb.2:
	mov	x1, x19
	blr	x8
LBB0_3:
	ldr	w8, [x19, #24]
	cmp	w8, #130
	b.eq	LBB0_8
; %bb.4:
	cmp	w8, #129
	b.eq	LBB0_15
; %bb.5:
	cmp	w8, #128
	b.ne	LBB0_24
; %bb.6:
	ldr	w0, [x21, #4]
	bl	_IS_ERR
	cbz	w0, LBB0_18
LBB0_7:
Lloh17:
	adrp	x8, _DW_MMC_CARD_NEED_INIT@GOTPAGE
Lloh18:
	ldr	x8, [x8, _DW_MMC_CARD_NEED_INIT@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x8]
	add	x1, x20, #24
	bl	_set_bit
	ldr	x0, [x20, #16]
Lloh20:
	adrp	x21, _PWREN@GOTPAGE
Lloh21:
	ldr	x21, [x21, _PWREN@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_mci_readl
	ldr	w8, [x20]
	mov	w9, #1
	lsl	w8, w9, w8
	orr	w2, w8, w0
	b	LBB0_14
LBB0_8:
	mov	x0, x20
	mov	w1, #0
	bl	_dw_mci_setup_bus
	ldr	w0, [x21, #4]
	bl	_IS_ERR
	cbnz	w0, LBB0_10
; %bb.9:
	ldr	w1, [x21, #4]
	mov	x0, x21
	mov	w2, #0
	bl	_mmc_regulator_set_ocr
LBB0_10:
	ldr	w0, [x21]
	bl	_IS_ERR
	cbnz	w0, LBB0_13
; %bb.11:
	ldr	x8, [x20, #16]
	ldr	w8, [x8, #8]
	cbz	w8, LBB0_13
; %bb.12:
	ldr	w0, [x21]
	bl	_regulator_disable
LBB0_13:
	ldr	x0, [x20, #16]
	str	wzr, [x0, #8]
Lloh22:
	adrp	x21, _PWREN@GOTPAGE
Lloh23:
	ldr	x21, [x21, _PWREN@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_mci_readl
	ldr	w8, [x20]
	mov	w9, #1
	lsl	w8, w9, w8
	bic	w2, w0, w8
LBB0_14:
	ldr	x0, [x20, #16]
	ldr	w1, [x21]
	bl	_mci_writel
	b	LBB0_24
LBB0_15:
	ldr	x8, [x20, #16]
	ldr	w8, [x8, #8]
	cbnz	w8, LBB0_23
; %bb.16:
	ldr	w0, [x21]
	bl	_IS_ERR
	cbz	w0, LBB0_20
; %bb.17:
	ldr	x0, [x20, #16]
	b	LBB0_21
LBB0_18:
	ldr	w1, [x21, #4]
	ldr	w2, [x19, #28]
	mov	x0, x21
	bl	_mmc_regulator_set_ocr
	cbz	w0, LBB0_7
; %bb.19:
	ldr	x8, [x20, #16]
	ldr	w0, [x8, #24]
Lloh24:
	adrp	x1, l_.str@PAGE
Lloh25:
	add	x1, x1, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_dev_err
LBB0_20:
	ldr	w0, [x21]
	bl	_regulator_enable
	mov	x8, x0
	ldr	x0, [x20, #16]
	tbnz	w8, #31, LBB0_28
LBB0_21:
	mov	w8, #1
	str	w8, [x0, #8]
LBB0_22:
Lloh26:
	adrp	x8, _SDMMC_CTRL_ALL_RESET_FLAGS@GOTPAGE
Lloh27:
	ldr	x8, [x8, _SDMMC_CTRL_ALL_RESET_FLAGS@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	bl	_dw_mci_ctrl_reset
LBB0_23:
	mov	x0, x20
	mov	w1, #0
	bl	_dw_mci_setup_bus
LBB0_24:
	ldr	x8, [x20, #16]
	ldr	x9, [x8, #16]
Lloh29:
	adrp	x10, _STATE_WAITING_CMD11_DONE@GOTPAGE
Lloh30:
	ldr	x10, [x10, _STATE_WAITING_CMD11_DONE@GOTPAGEOFF]
Lloh31:
	ldr	x10, [x10]
	cmp	x9, x10
	b.ne	LBB0_27
; %bb.25:
	ldr	x9, [x19, #16]
	cbz	x9, LBB0_27
; %bb.26:
Lloh32:
	adrp	x9, _STATE_IDLE@GOTPAGE
Lloh33:
	ldr	x9, [x9, _STATE_IDLE@GOTPAGEOFF]
Lloh34:
	ldr	x9, [x9]
	str	x9, [x8, #16]
LBB0_27:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_28:
	ldr	w0, [x0, #24]
Lloh35:
	adrp	x1, l_.str.1@PAGE
Lloh36:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_err
	ldr	x0, [x20, #16]
	b	LBB0_22
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpAdd	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpAdd	Lloh35, Lloh36
	.cfi_endproc
                                        ; -- End function
	.comm	_SDMMC_CTYPE_4BIT,4,2           ; @SDMMC_CTYPE_4BIT
	.comm	_SDMMC_CTYPE_8BIT,4,2           ; @SDMMC_CTYPE_8BIT
	.comm	_SDMMC_CTYPE_1BIT,4,2           ; @SDMMC_CTYPE_1BIT
	.comm	_UHS_REG,4,2                    ; @UHS_REG
	.comm	_MMC_TIMING_MMC_DDR52,8,3       ; @MMC_TIMING_MMC_DDR52
	.comm	_MMC_TIMING_UHS_DDR50,8,3       ; @MMC_TIMING_UHS_DDR50
	.comm	_MMC_TIMING_MMC_HS400,8,3       ; @MMC_TIMING_MMC_HS400
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to enable vmmc regulator\n"

	.comm	_DW_MMC_CARD_NEED_INIT,4,2      ; @DW_MMC_CARD_NEED_INIT
	.comm	_PWREN,4,2                      ; @PWREN
l_.str.1:                               ; @.str.1
	.asciz	"failed to enable vqmmc\n"

	.comm	_SDMMC_CTRL_ALL_RESET_FLAGS,4,2 ; @SDMMC_CTRL_ALL_RESET_FLAGS
	.comm	_STATE_WAITING_CMD11_DONE,8,3   ; @STATE_WAITING_CMD11_DONE
	.comm	_STATE_IDLE,8,3                 ; @STATE_IDLE
	.no_dead_strip	_dw_mci_set_ios
.subsections_via_symbols
