	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function exynos_lpass_enable
_exynos_lpass_enable:                   ## @exynos_lpass_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movl	4(%rdi), %edi
	callq	_clk_prepare_enable
	movl	(%rbx), %edi
	movq	_SFR_LPASS_INTR_CA5_MASK@GOTPCREL(%rip), %rax
	movq	_LPASS_INTR_SFR@GOTPCREL(%rip), %r14
	movq	_LPASS_INTR_DMA@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	orl	(%r14), %edx
	movl	(%rax), %esi
	movq	_LPASS_INTR_I2S@GOTPCREL(%rip), %r12
	orl	(%r12), %edx
	callq	_regmap_write
	movl	(%rbx), %edi
	movq	_SFR_LPASS_INTR_CPU_MASK@GOTPCREL(%rip), %rax
	movl	(%r15), %edx
	orl	(%r14), %edx
	orl	(%r12), %edx
	movl	(%rax), %esi
	movq	_LPASS_INTR_UART@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	callq	_regmap_write
	movq	_LPASS_I2S_SW_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_exynos_lpass_core_sw_reset
	movq	_LPASS_DMA_SW_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_exynos_lpass_core_sw_reset
	movq	_LPASS_MEM_SW_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_exynos_lpass_core_sw_reset
	movq	_LPASS_UART_SW_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_exynos_lpass_core_sw_reset     ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_SFR_LPASS_INTR_CA5_MASK,4,2    ## @SFR_LPASS_INTR_CA5_MASK
	.comm	_LPASS_INTR_SFR,4,2             ## @LPASS_INTR_SFR
	.comm	_LPASS_INTR_DMA,4,2             ## @LPASS_INTR_DMA
	.comm	_LPASS_INTR_I2S,4,2             ## @LPASS_INTR_I2S
	.comm	_SFR_LPASS_INTR_CPU_MASK,4,2    ## @SFR_LPASS_INTR_CPU_MASK
	.comm	_LPASS_INTR_UART,4,2            ## @LPASS_INTR_UART
	.comm	_LPASS_I2S_SW_RESET,4,2         ## @LPASS_I2S_SW_RESET
	.comm	_LPASS_DMA_SW_RESET,4,2         ## @LPASS_DMA_SW_RESET
	.comm	_LPASS_MEM_SW_RESET,4,2         ## @LPASS_MEM_SW_RESET
	.comm	_LPASS_UART_SW_RESET,4,2        ## @LPASS_UART_SW_RESET
	.no_dead_strip	_exynos_lpass_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function exynos_lpass_enable
_exynos_lpass_enable:                   ; @exynos_lpass_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x0, #4]
	bl	_clk_prepare_enable
	ldr	w0, [x19]
Lloh0:
	adrp	x8, _SFR_LPASS_INTR_CA5_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SFR_LPASS_INTR_CA5_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x20, _LPASS_INTR_SFR@GOTPAGE
Lloh4:
	ldr	x20, [x20, _LPASS_INTR_SFR@GOTPAGEOFF]
	ldr	w8, [x20]
Lloh5:
	adrp	x21, _LPASS_INTR_DMA@GOTPAGE
Lloh6:
	ldr	x21, [x21, _LPASS_INTR_DMA@GOTPAGEOFF]
	ldr	w9, [x21]
	orr	w8, w9, w8
Lloh7:
	adrp	x22, _LPASS_INTR_I2S@GOTPAGE
Lloh8:
	ldr	x22, [x22, _LPASS_INTR_I2S@GOTPAGEOFF]
	ldr	w9, [x22]
	orr	w2, w8, w9
	bl	_regmap_write
	ldr	w0, [x19]
Lloh9:
	adrp	x8, _SFR_LPASS_INTR_CPU_MASK@GOTPAGE
Lloh10:
	ldr	x8, [x8, _SFR_LPASS_INTR_CPU_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	ldr	w8, [x20]
	ldr	w9, [x21]
	orr	w8, w9, w8
	ldr	w9, [x22]
	orr	w8, w8, w9
Lloh12:
	adrp	x9, _LPASS_INTR_UART@GOTPAGE
Lloh13:
	ldr	x9, [x9, _LPASS_INTR_UART@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w2, w8, w9
	bl	_regmap_write
Lloh15:
	adrp	x8, _LPASS_I2S_SW_RESET@GOTPAGE
Lloh16:
	ldr	x8, [x8, _LPASS_I2S_SW_RESET@GOTPAGEOFF]
Lloh17:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_exynos_lpass_core_sw_reset
Lloh18:
	adrp	x8, _LPASS_DMA_SW_RESET@GOTPAGE
Lloh19:
	ldr	x8, [x8, _LPASS_DMA_SW_RESET@GOTPAGEOFF]
Lloh20:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_exynos_lpass_core_sw_reset
Lloh21:
	adrp	x8, _LPASS_MEM_SW_RESET@GOTPAGE
Lloh22:
	ldr	x8, [x8, _LPASS_MEM_SW_RESET@GOTPAGEOFF]
Lloh23:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_exynos_lpass_core_sw_reset
Lloh24:
	adrp	x8, _LPASS_UART_SW_RESET@GOTPAGE
Lloh25:
	ldr	x8, [x8, _LPASS_UART_SW_RESET@GOTPAGEOFF]
Lloh26:
	ldr	w1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_exynos_lpass_core_sw_reset
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_SFR_LPASS_INTR_CA5_MASK,4,2    ; @SFR_LPASS_INTR_CA5_MASK
	.comm	_LPASS_INTR_SFR,4,2             ; @LPASS_INTR_SFR
	.comm	_LPASS_INTR_DMA,4,2             ; @LPASS_INTR_DMA
	.comm	_LPASS_INTR_I2S,4,2             ; @LPASS_INTR_I2S
	.comm	_SFR_LPASS_INTR_CPU_MASK,4,2    ; @SFR_LPASS_INTR_CPU_MASK
	.comm	_LPASS_INTR_UART,4,2            ; @LPASS_INTR_UART
	.comm	_LPASS_I2S_SW_RESET,4,2         ; @LPASS_I2S_SW_RESET
	.comm	_LPASS_DMA_SW_RESET,4,2         ; @LPASS_DMA_SW_RESET
	.comm	_LPASS_MEM_SW_RESET,4,2         ; @LPASS_MEM_SW_RESET
	.comm	_LPASS_UART_SW_RESET,4,2        ; @LPASS_UART_SW_RESET
	.no_dead_strip	_exynos_lpass_enable
.subsections_via_symbols
