	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_mmc_clk_set
_meson_mmc_clk_set:                     ## @meson_mmc_clk_set
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r12d
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	32(%rdi), %r13
	cmpl	%edx, (%rdi)
	jne	LBB0_2
## %bb.1:
	xorl	%eax, %eax
	cmpq	%r14, 8(%rbx)
	je	LBB0_13
LBB0_2:
	movq	%rbx, %rdi
	callq	_meson_mmc_clk_gate
	movq	$0, 8(%rbx)
	movl	$0, (%r13)
	xorl	%eax, %eax
	testq	%r14, %r14
	je	LBB0_13
## %bb.3:
	movq	%r13, -48(%rbp)                 ## 8-byte Spill
	movq	_SD_EMMC_CFG@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	24(%rbx), %rdi
	callq	_readl
	movl	%eax, %r13d
	movq	_CFG_STOP_CLOCK@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	movq	(%r15), %rsi
	addq	24(%rbx), %rsi
	movl	%r13d, %edi
	callq	_writel
	testl	%r12d, %r12d
	je	LBB0_5
## %bb.4:
	addq	%r14, %r14
	movq	_CFG_DDR@GOTPCREL(%rip), %rax
	orl	(%rax), %r13d
	jmp	LBB0_6
LBB0_5:
	movq	_CFG_DDR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, %r13d
LBB0_6:
	movq	_SD_EMMC_CFG@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	24(%rbx), %rsi
	movl	%r13d, %edi
	callq	_writel
	movl	%r12d, (%rbx)
	movl	20(%rbx), %edi
	movq	%r14, %rsi
	callq	_clk_set_rate
	testl	%eax, %eax
	je	LBB0_8
## %bb.7:
	movl	%eax, %r13d
	movl	16(%rbx), %edi
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdx
	movl	%eax, %ecx
	callq	_dev_err
	movl	%r13d, %eax
	jmp	LBB0_13
LBB0_8:
	movq	%r14, 8(%rbx)
	movl	20(%rbx), %edi
	callq	_clk_get_rate
	movq	-48(%rbp), %r13                 ## 8-byte Reload
	movl	%eax, (%r13)
	testl	%r12d, %r12d
	je	LBB0_10
## %bb.9:
	shrq	8(%rbx)
	sarl	%eax
	movl	%eax, (%r13)
LBB0_10:
	movl	16(%rbx), %edi
	movslq	%eax, %rdx
	leaq	L_.str.1(%rip), %rsi
	callq	_dev_dbg
	movslq	(%r13), %rax
	cmpq	%rax, %r14
	je	LBB0_12
## %bb.11:
	movl	16(%rbx), %edi
	leaq	L_.str.2(%rip), %rsi
	movq	%r14, %rdx
	callq	_dev_dbg
LBB0_12:
	movq	%rbx, %rdi
	callq	_meson_mmc_clk_ungate
	xorl	%eax, %eax
LBB0_13:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SD_EMMC_CFG,8,3                ## @SD_EMMC_CFG
	.comm	_CFG_STOP_CLOCK,4,2             ## @CFG_STOP_CLOCK
	.comm	_CFG_DDR,4,2                    ## @CFG_DDR
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Unable to set cfg_div_clk to %lu. ret=%d\n"

L_.str.1:                               ## @.str.1
	.asciz	"clk rate: %u Hz\n"

L_.str.2:                               ## @.str.2
	.asciz	"requested rate was %lu\n"

	.no_dead_strip	_meson_mmc_clk_set
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_mmc_clk_set
_meson_mmc_clk_set:                     ; @meson_mmc_clk_set
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x19, x1
	mov	x20, x0
	ldr	x23, [x0, #32]
	ldr	w8, [x0]
	cmp	w8, w2
	b.ne	LBB0_2
; %bb.1:
	ldr	x8, [x20, #8]
	cmp	x8, x19
	b.eq	LBB0_13
LBB0_2:
	mov	x0, x20
	bl	_meson_mmc_clk_gate
	str	xzr, [x20, #8]
	str	wzr, [x23]
	cbz	x19, LBB0_13
; %bb.3:
	ldr	x8, [x20, #24]
Lloh0:
	adrp	x24, _SD_EMMC_CFG@GOTPAGE
Lloh1:
	ldr	x24, [x24, _SD_EMMC_CFG@GOTPAGEOFF]
	ldr	x9, [x24]
	add	x0, x9, x8
	bl	_readl
Lloh2:
	adrp	x8, _CFG_STOP_CLOCK@GOTPAGE
Lloh3:
	ldr	x8, [x8, _CFG_STOP_CLOCK@GOTPAGEOFF]
Lloh4:
	ldr	w8, [x8]
	orr	w22, w8, w0
	ldr	x8, [x20, #24]
	ldr	x9, [x24]
	add	x1, x9, x8
	mov	x0, x22
	bl	_writel
	cbz	w21, LBB0_5
; %bb.4:
	lsl	x19, x19, #1
Lloh5:
	adrp	x8, _CFG_DDR@GOTPAGE
Lloh6:
	ldr	x8, [x8, _CFG_DDR@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	orr	w0, w8, w22
	b	LBB0_6
LBB0_5:
Lloh8:
	adrp	x8, _CFG_DDR@GOTPAGE
Lloh9:
	ldr	x8, [x8, _CFG_DDR@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	bic	w0, w22, w8
LBB0_6:
	ldr	x8, [x20, #24]
	ldr	x9, [x24]
	add	x1, x9, x8
	bl	_writel
	str	w21, [x20]
	ldr	w0, [x20, #20]
	mov	x1, x19
	bl	_clk_set_rate
	cbz	w0, LBB0_8
; %bb.7:
	mov	x22, x0
	ldr	w0, [x20, #16]
Lloh11:
	adrp	x1, l_.str@PAGE
Lloh12:
	add	x1, x1, l_.str@PAGEOFF
	mov	x2, x19
	mov	x3, x22
	bl	_dev_err
	b	LBB0_14
LBB0_8:
	str	x19, [x20, #8]
	ldr	w0, [x20, #20]
	bl	_clk_get_rate
                                        ; kill: def $w0 killed $w0 def $x0
	str	w0, [x23]
	cbz	w21, LBB0_10
; %bb.9:
	ldr	x8, [x20, #8]
	lsr	x8, x8, #1
	str	x8, [x20, #8]
	asr	w0, w0, #1
	str	w0, [x23]
LBB0_10:
	ldr	w8, [x20, #16]
	sxtw	x2, w0
Lloh13:
	adrp	x1, l_.str.1@PAGE
Lloh14:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x8
	bl	_dev_dbg
	ldrsw	x8, [x23]
	cmp	x19, x8
	b.eq	LBB0_12
; %bb.11:
	ldr	w0, [x20, #16]
Lloh15:
	adrp	x1, l_.str.2@PAGE
Lloh16:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x2, x19
	bl	_dev_dbg
LBB0_12:
	mov	x0, x20
	bl	_meson_mmc_clk_ungate
LBB0_13:
	mov	w22, #0
LBB0_14:
	mov	x0, x22
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_SD_EMMC_CFG,8,3                ; @SD_EMMC_CFG
	.comm	_CFG_STOP_CLOCK,4,2             ; @CFG_STOP_CLOCK
	.comm	_CFG_DDR,4,2                    ; @CFG_DDR
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Unable to set cfg_div_clk to %lu. ret=%d\n"

l_.str.1:                               ; @.str.1
	.asciz	"clk rate: %u Hz\n"

l_.str.2:                               ; @.str.2
	.asciz	"requested rate was %lu\n"

	.no_dead_strip	_meson_mmc_clk_set
.subsections_via_symbols
