	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function intel_setup_host
_intel_setup_host:                      ## @intel_setup_host
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	callq	_platform_get_drvdata
	movq	%rax, %rbx
	movq	%rax, %rdi
	callq	_sdhci_acpi_priv
	movl	(%rax), %eax
	movq	_INTEL_DSM_HS_CAPS_SDR25@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_2
## %bb.1:
	movq	_MMC_CAP_UHS_SDR25@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	movq	(%rbx), %rdx
	movq	(%rdx), %rdx
	andl	%ecx, (%rdx)
LBB0_2:
	movq	_INTEL_DSM_HS_CAPS_SDR50@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_4
## %bb.3:
	movq	_MMC_CAP_UHS_SDR50@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	movq	(%rbx), %rdx
	movq	(%rdx), %rdx
	andl	%ecx, (%rdx)
LBB0_4:
	movq	_INTEL_DSM_HS_CAPS_DDR50@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_6
## %bb.5:
	movq	_MMC_CAP_UHS_DDR50@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	notl	%ecx
	movq	(%rbx), %rdx
	movq	(%rdx), %rdx
	andl	%ecx, (%rdx)
LBB0_6:
	movq	_INTEL_DSM_HS_CAPS_SDR104@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_8
## %bb.7:
	movq	_MMC_CAP_UHS_SDR104@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	movq	(%rbx), %rcx
	movq	(%rcx), %rcx
	andl	%eax, (%rcx)
LBB0_8:
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_INTEL_DSM_HS_CAPS_SDR25,4,2    ## @INTEL_DSM_HS_CAPS_SDR25
	.comm	_MMC_CAP_UHS_SDR25,4,2          ## @MMC_CAP_UHS_SDR25
	.comm	_INTEL_DSM_HS_CAPS_SDR50,4,2    ## @INTEL_DSM_HS_CAPS_SDR50
	.comm	_MMC_CAP_UHS_SDR50,4,2          ## @MMC_CAP_UHS_SDR50
	.comm	_INTEL_DSM_HS_CAPS_DDR50,4,2    ## @INTEL_DSM_HS_CAPS_DDR50
	.comm	_MMC_CAP_UHS_DDR50,4,2          ## @MMC_CAP_UHS_DDR50
	.comm	_INTEL_DSM_HS_CAPS_SDR104,4,2   ## @INTEL_DSM_HS_CAPS_SDR104
	.comm	_MMC_CAP_UHS_SDR104,4,2         ## @MMC_CAP_UHS_SDR104
	.no_dead_strip	_intel_setup_host
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function intel_setup_host
_intel_setup_host:                      ; @intel_setup_host
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	bl	_platform_get_drvdata
	mov	x19, x0
	bl	_sdhci_acpi_priv
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _INTEL_DSM_HS_CAPS_SDR25@GOTPAGE
Lloh1:
	ldr	x9, [x9, _INTEL_DSM_HS_CAPS_SDR25@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_2
; %bb.1:
Lloh3:
	adrp	x9, _MMC_CAP_UHS_SDR25@GOTPAGE
Lloh4:
	ldr	x9, [x9, _MMC_CAP_UHS_SDR25@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	ldr	x10, [x19]
	ldr	x10, [x10]
	ldr	w11, [x10]
	bic	w9, w11, w9
	str	w9, [x10]
LBB0_2:
Lloh6:
	adrp	x9, _INTEL_DSM_HS_CAPS_SDR50@GOTPAGE
Lloh7:
	ldr	x9, [x9, _INTEL_DSM_HS_CAPS_SDR50@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_4
; %bb.3:
Lloh9:
	adrp	x9, _MMC_CAP_UHS_SDR50@GOTPAGE
Lloh10:
	ldr	x9, [x9, _MMC_CAP_UHS_SDR50@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	ldr	x10, [x19]
	ldr	x10, [x10]
	ldr	w11, [x10]
	bic	w9, w11, w9
	str	w9, [x10]
LBB0_4:
Lloh12:
	adrp	x9, _INTEL_DSM_HS_CAPS_DDR50@GOTPAGE
Lloh13:
	ldr	x9, [x9, _INTEL_DSM_HS_CAPS_DDR50@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_6
; %bb.5:
Lloh15:
	adrp	x9, _MMC_CAP_UHS_DDR50@GOTPAGE
Lloh16:
	ldr	x9, [x9, _MMC_CAP_UHS_DDR50@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	ldr	x10, [x19]
	ldr	x10, [x10]
	ldr	w11, [x10]
	bic	w9, w11, w9
	str	w9, [x10]
LBB0_6:
Lloh18:
	adrp	x9, _INTEL_DSM_HS_CAPS_SDR104@GOTPAGE
Lloh19:
	ldr	x9, [x9, _INTEL_DSM_HS_CAPS_SDR104@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_8
; %bb.7:
Lloh21:
	adrp	x8, _MMC_CAP_UHS_SDR104@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MMC_CAP_UHS_SDR104@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	ldr	x9, [x19]
	ldr	x9, [x9]
	ldr	w10, [x9]
	bic	w8, w10, w8
	str	w8, [x9]
LBB0_8:
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.cfi_endproc
                                        ; -- End function
	.comm	_INTEL_DSM_HS_CAPS_SDR25,4,2    ; @INTEL_DSM_HS_CAPS_SDR25
	.comm	_MMC_CAP_UHS_SDR25,4,2          ; @MMC_CAP_UHS_SDR25
	.comm	_INTEL_DSM_HS_CAPS_SDR50,4,2    ; @INTEL_DSM_HS_CAPS_SDR50
	.comm	_MMC_CAP_UHS_SDR50,4,2          ; @MMC_CAP_UHS_SDR50
	.comm	_INTEL_DSM_HS_CAPS_DDR50,4,2    ; @INTEL_DSM_HS_CAPS_DDR50
	.comm	_MMC_CAP_UHS_DDR50,4,2          ; @MMC_CAP_UHS_DDR50
	.comm	_INTEL_DSM_HS_CAPS_SDR104,4,2   ; @INTEL_DSM_HS_CAPS_SDR104
	.comm	_MMC_CAP_UHS_SDR104,4,2         ; @MMC_CAP_UHS_SDR104
	.no_dead_strip	_intel_setup_host
.subsections_via_symbols
