	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_goya_init_cpu_queues           ## -- Begin function goya_init_cpu_queues
	.p2align	4, 0x90
_goya_init_cpu_queues:                  ## @goya_init_cpu_queues
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	xorl	%ebx, %ebx
	cmpl	$0, 8(%rdi)
	je	LBB0_5
## %bb.1:
	movq	%rdi, %r14
	movq	24(%rdi), %r15
	movq	_HW_CAP_CPU_Q@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%r15)
	jne	LBB0_5
## %bb.2:
	movq	16(%r14), %rbx
	movq	_GOYA_QUEUE_ID_CPU_PQ@GOTPCREL(%rip), %rax
	movq	(%rax), %r12
	movq	_mmCPU_PQ_BASE_ADDR_LOW@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	(%rbx,%r12,4), %edi
	callq	_lower_32_bits
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmCPU_PQ_BASE_ADDR_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	(%rbx,%r12,4), %edi
	callq	_upper_32_bits
	movl	%r13d, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmCPU_EQ_BASE_ADDR_LOW@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	4(%r14), %edi
	callq	_lower_32_bits
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmCPU_EQ_BASE_ADDR_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	4(%r14), %edi
	callq	_upper_32_bits
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmCPU_CQ_BASE_ADDR_LOW@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_VA_CPU_ACCESSIBLE_MEM_ADDR@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_lower_32_bits
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmCPU_CQ_BASE_ADDR_HIGH@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	(%r12), %edi
	callq	_upper_32_bits
	movl	%ebx, %edi
	movl	%eax, %esi
	callq	_WREG32
	movq	_mmCPU_PQ_LENGTH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_HL_QUEUE_SIZE_IN_BYTES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_mmCPU_EQ_LENGTH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_HL_EQ_SIZE_IN_BYTES@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_mmCPU_CQ_LENGTH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_HL_CPU_ACCESSIBLE_MEM_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_mmCPU_EQ_CI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmCPU_IF_PF_PQ_PI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_WREG32
	movq	_mmCPU_PQ_INIT_STATUS@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	movq	_PQ_INIT_STATUS_READY_FOR_CP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movq	_mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_GOYA_ASYNC_EVENT_ID_PI_UPDATE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_WREG32
	movl	(%r12), %esi
	movq	_GOYA_CPU_TIMEOUT_USEC@GOTPCREL(%rip), %rax
	movl	(%rax), %r9d
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	movl	$1000, %r8d                     ## imm = 0x3E8
	callq	_hl_poll_timeout
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	movl	(%r14), %edi
	leaq	L_.str(%rip), %rsi
	callq	_dev_err
	movq	_EIO@GOTPCREL(%rip), %rax
	subl	(%rax), %ebx
	jmp	LBB0_5
LBB0_4:
	movq	_HW_CAP_CPU_Q@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	orl	%eax, (%r15)
LBB0_5:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GOYA_QUEUE_ID_CPU_PQ,8,3       ## @GOYA_QUEUE_ID_CPU_PQ
	.comm	_HW_CAP_CPU_Q,4,2               ## @HW_CAP_CPU_Q
	.comm	_mmCPU_PQ_BASE_ADDR_LOW,4,2     ## @mmCPU_PQ_BASE_ADDR_LOW
	.comm	_mmCPU_PQ_BASE_ADDR_HIGH,4,2    ## @mmCPU_PQ_BASE_ADDR_HIGH
	.comm	_mmCPU_EQ_BASE_ADDR_LOW,4,2     ## @mmCPU_EQ_BASE_ADDR_LOW
	.comm	_mmCPU_EQ_BASE_ADDR_HIGH,4,2    ## @mmCPU_EQ_BASE_ADDR_HIGH
	.comm	_mmCPU_CQ_BASE_ADDR_LOW,4,2     ## @mmCPU_CQ_BASE_ADDR_LOW
	.comm	_VA_CPU_ACCESSIBLE_MEM_ADDR,4,2 ## @VA_CPU_ACCESSIBLE_MEM_ADDR
	.comm	_mmCPU_CQ_BASE_ADDR_HIGH,4,2    ## @mmCPU_CQ_BASE_ADDR_HIGH
	.comm	_mmCPU_PQ_LENGTH,4,2            ## @mmCPU_PQ_LENGTH
	.comm	_HL_QUEUE_SIZE_IN_BYTES,4,2     ## @HL_QUEUE_SIZE_IN_BYTES
	.comm	_mmCPU_EQ_LENGTH,4,2            ## @mmCPU_EQ_LENGTH
	.comm	_HL_EQ_SIZE_IN_BYTES,4,2        ## @HL_EQ_SIZE_IN_BYTES
	.comm	_mmCPU_CQ_LENGTH,4,2            ## @mmCPU_CQ_LENGTH
	.comm	_HL_CPU_ACCESSIBLE_MEM_SIZE,4,2 ## @HL_CPU_ACCESSIBLE_MEM_SIZE
	.comm	_mmCPU_EQ_CI,4,2                ## @mmCPU_EQ_CI
	.comm	_mmCPU_IF_PF_PQ_PI,4,2          ## @mmCPU_IF_PF_PQ_PI
	.comm	_mmCPU_PQ_INIT_STATUS,4,2       ## @mmCPU_PQ_INIT_STATUS
	.comm	_PQ_INIT_STATUS_READY_FOR_CP,4,2 ## @PQ_INIT_STATUS_READY_FOR_CP
	.comm	_mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,4,2 ## @mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR
	.comm	_GOYA_ASYNC_EVENT_ID_PI_UPDATE,4,2 ## @GOYA_ASYNC_EVENT_ID_PI_UPDATE
	.comm	_PQ_INIT_STATUS_READY_FOR_HOST,8,3 ## @PQ_INIT_STATUS_READY_FOR_HOST
	.comm	_GOYA_CPU_TIMEOUT_USEC,4,2      ## @GOYA_CPU_TIMEOUT_USEC
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Failed to setup communication with device CPU\n"

	.comm	_EIO,4,2                        ## @EIO
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_goya_init_cpu_queues           ; -- Begin function goya_init_cpu_queues
	.p2align	2
_goya_init_cpu_queues:                  ; @goya_init_cpu_queues
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	w8, [x0, #8]
	cbz	w8, LBB0_2
; %bb.1:
	mov	x19, x0
	ldr	x21, [x0, #24]
	ldr	w8, [x21]
Lloh0:
	adrp	x22, _HW_CAP_CPU_Q@GOTPAGE
Lloh1:
	ldr	x22, [x22, _HW_CAP_CPU_Q@GOTPAGEOFF]
	ldr	w9, [x22]
	tst	w9, w8
	b.eq	LBB0_4
LBB0_2:
	mov	w0, #0
LBB0_3:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_4:
	ldr	x23, [x19, #16]
Lloh2:
	adrp	x8, _GOYA_QUEUE_ID_CPU_PQ@GOTPAGE
Lloh3:
	ldr	x8, [x8, _GOYA_QUEUE_ID_CPU_PQ@GOTPAGEOFF]
Lloh4:
	ldr	x8, [x8]
Lloh5:
	adrp	x9, _mmCPU_PQ_BASE_ADDR_LOW@GOTPAGE
Lloh6:
	ldr	x9, [x9, _mmCPU_PQ_BASE_ADDR_LOW@GOTPAGEOFF]
Lloh7:
	ldr	w20, [x9]
	lsl	x24, x8, #2
	ldr	w0, [x23, x24]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh8:
	adrp	x8, _mmCPU_PQ_BASE_ADDR_HIGH@GOTPAGE
Lloh9:
	ldr	x8, [x8, _mmCPU_PQ_BASE_ADDR_HIGH@GOTPAGEOFF]
Lloh10:
	ldr	w20, [x8]
	ldr	w0, [x23, x24]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh11:
	adrp	x8, _mmCPU_EQ_BASE_ADDR_LOW@GOTPAGE
Lloh12:
	ldr	x8, [x8, _mmCPU_EQ_BASE_ADDR_LOW@GOTPAGEOFF]
Lloh13:
	ldr	w20, [x8]
	ldr	w0, [x19, #4]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh14:
	adrp	x8, _mmCPU_EQ_BASE_ADDR_HIGH@GOTPAGE
Lloh15:
	ldr	x8, [x8, _mmCPU_EQ_BASE_ADDR_HIGH@GOTPAGEOFF]
Lloh16:
	ldr	w20, [x8]
	ldr	w0, [x19, #4]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh17:
	adrp	x8, _mmCPU_CQ_BASE_ADDR_LOW@GOTPAGE
Lloh18:
	ldr	x8, [x8, _mmCPU_CQ_BASE_ADDR_LOW@GOTPAGEOFF]
Lloh19:
	ldr	w20, [x8]
Lloh20:
	adrp	x23, _VA_CPU_ACCESSIBLE_MEM_ADDR@GOTPAGE
Lloh21:
	ldr	x23, [x23, _VA_CPU_ACCESSIBLE_MEM_ADDR@GOTPAGEOFF]
	ldr	w0, [x23]
	bl	_lower_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh22:
	adrp	x8, _mmCPU_CQ_BASE_ADDR_HIGH@GOTPAGE
Lloh23:
	ldr	x8, [x8, _mmCPU_CQ_BASE_ADDR_HIGH@GOTPAGEOFF]
Lloh24:
	ldr	w20, [x8]
	ldr	w0, [x23]
	bl	_upper_32_bits
	mov	x1, x0
	mov	x0, x20
	bl	_WREG32
Lloh25:
	adrp	x8, _mmCPU_PQ_LENGTH@GOTPAGE
Lloh26:
	ldr	x8, [x8, _mmCPU_PQ_LENGTH@GOTPAGEOFF]
Lloh27:
	ldr	w0, [x8]
Lloh28:
	adrp	x8, _HL_QUEUE_SIZE_IN_BYTES@GOTPAGE
Lloh29:
	ldr	x8, [x8, _HL_QUEUE_SIZE_IN_BYTES@GOTPAGEOFF]
Lloh30:
	ldr	w1, [x8]
	bl	_WREG32
Lloh31:
	adrp	x8, _mmCPU_EQ_LENGTH@GOTPAGE
Lloh32:
	ldr	x8, [x8, _mmCPU_EQ_LENGTH@GOTPAGEOFF]
Lloh33:
	ldr	w0, [x8]
Lloh34:
	adrp	x8, _HL_EQ_SIZE_IN_BYTES@GOTPAGE
Lloh35:
	ldr	x8, [x8, _HL_EQ_SIZE_IN_BYTES@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	bl	_WREG32
Lloh37:
	adrp	x8, _mmCPU_CQ_LENGTH@GOTPAGE
Lloh38:
	ldr	x8, [x8, _mmCPU_CQ_LENGTH@GOTPAGEOFF]
Lloh39:
	ldr	w0, [x8]
Lloh40:
	adrp	x8, _HL_CPU_ACCESSIBLE_MEM_SIZE@GOTPAGE
Lloh41:
	ldr	x8, [x8, _HL_CPU_ACCESSIBLE_MEM_SIZE@GOTPAGEOFF]
Lloh42:
	ldr	w1, [x8]
	bl	_WREG32
Lloh43:
	adrp	x8, _mmCPU_EQ_CI@GOTPAGE
Lloh44:
	ldr	x8, [x8, _mmCPU_EQ_CI@GOTPAGEOFF]
Lloh45:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh46:
	adrp	x8, _mmCPU_IF_PF_PQ_PI@GOTPAGE
Lloh47:
	ldr	x8, [x8, _mmCPU_IF_PF_PQ_PI@GOTPAGEOFF]
Lloh48:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_WREG32
Lloh49:
	adrp	x20, _mmCPU_PQ_INIT_STATUS@GOTPAGE
Lloh50:
	ldr	x20, [x20, _mmCPU_PQ_INIT_STATUS@GOTPAGEOFF]
	ldr	w0, [x20]
Lloh51:
	adrp	x8, _PQ_INIT_STATUS_READY_FOR_CP@GOTPAGE
Lloh52:
	ldr	x8, [x8, _PQ_INIT_STATUS_READY_FOR_CP@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	bl	_WREG32
Lloh54:
	adrp	x8, _mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR@GOTPAGE
Lloh55:
	ldr	x8, [x8, _mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR@GOTPAGEOFF]
Lloh56:
	ldr	w0, [x8]
Lloh57:
	adrp	x8, _GOYA_ASYNC_EVENT_ID_PI_UPDATE@GOTPAGE
Lloh58:
	ldr	x8, [x8, _GOYA_ASYNC_EVENT_ID_PI_UPDATE@GOTPAGEOFF]
Lloh59:
	ldr	w1, [x8]
	bl	_WREG32
	ldr	w1, [x20]
Lloh60:
	adrp	x8, _GOYA_CPU_TIMEOUT_USEC@GOTPAGE
Lloh61:
	ldr	x8, [x8, _GOYA_CPU_TIMEOUT_USEC@GOTPAGEOFF]
Lloh62:
	ldr	w5, [x8]
	mov	x0, x19
	mov	w3, #0
	mov	w4, #1000
	bl	_hl_poll_timeout
	cbz	w0, LBB0_6
; %bb.5:
	ldr	w0, [x19]
Lloh63:
	adrp	x1, l_.str@PAGE
Lloh64:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
Lloh65:
	adrp	x8, _EIO@GOTPAGE
Lloh66:
	ldr	x8, [x8, _EIO@GOTPAGEOFF]
Lloh67:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_3
LBB0_6:
	ldr	w8, [x22]
	ldr	w9, [x21]
	orr	w8, w9, w8
	str	w8, [x21]
	b	LBB0_3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpAdd	Lloh63, Lloh64
	.cfi_endproc
                                        ; -- End function
	.comm	_GOYA_QUEUE_ID_CPU_PQ,8,3       ; @GOYA_QUEUE_ID_CPU_PQ
	.comm	_HW_CAP_CPU_Q,4,2               ; @HW_CAP_CPU_Q
	.comm	_mmCPU_PQ_BASE_ADDR_LOW,4,2     ; @mmCPU_PQ_BASE_ADDR_LOW
	.comm	_mmCPU_PQ_BASE_ADDR_HIGH,4,2    ; @mmCPU_PQ_BASE_ADDR_HIGH
	.comm	_mmCPU_EQ_BASE_ADDR_LOW,4,2     ; @mmCPU_EQ_BASE_ADDR_LOW
	.comm	_mmCPU_EQ_BASE_ADDR_HIGH,4,2    ; @mmCPU_EQ_BASE_ADDR_HIGH
	.comm	_mmCPU_CQ_BASE_ADDR_LOW,4,2     ; @mmCPU_CQ_BASE_ADDR_LOW
	.comm	_VA_CPU_ACCESSIBLE_MEM_ADDR,4,2 ; @VA_CPU_ACCESSIBLE_MEM_ADDR
	.comm	_mmCPU_CQ_BASE_ADDR_HIGH,4,2    ; @mmCPU_CQ_BASE_ADDR_HIGH
	.comm	_mmCPU_PQ_LENGTH,4,2            ; @mmCPU_PQ_LENGTH
	.comm	_HL_QUEUE_SIZE_IN_BYTES,4,2     ; @HL_QUEUE_SIZE_IN_BYTES
	.comm	_mmCPU_EQ_LENGTH,4,2            ; @mmCPU_EQ_LENGTH
	.comm	_HL_EQ_SIZE_IN_BYTES,4,2        ; @HL_EQ_SIZE_IN_BYTES
	.comm	_mmCPU_CQ_LENGTH,4,2            ; @mmCPU_CQ_LENGTH
	.comm	_HL_CPU_ACCESSIBLE_MEM_SIZE,4,2 ; @HL_CPU_ACCESSIBLE_MEM_SIZE
	.comm	_mmCPU_EQ_CI,4,2                ; @mmCPU_EQ_CI
	.comm	_mmCPU_IF_PF_PQ_PI,4,2          ; @mmCPU_IF_PF_PQ_PI
	.comm	_mmCPU_PQ_INIT_STATUS,4,2       ; @mmCPU_PQ_INIT_STATUS
	.comm	_PQ_INIT_STATUS_READY_FOR_CP,4,2 ; @PQ_INIT_STATUS_READY_FOR_CP
	.comm	_mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,4,2 ; @mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR
	.comm	_GOYA_ASYNC_EVENT_ID_PI_UPDATE,4,2 ; @GOYA_ASYNC_EVENT_ID_PI_UPDATE
	.comm	_PQ_INIT_STATUS_READY_FOR_HOST,8,3 ; @PQ_INIT_STATUS_READY_FOR_HOST
	.comm	_GOYA_CPU_TIMEOUT_USEC,4,2      ; @GOYA_CPU_TIMEOUT_USEC
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Failed to setup communication with device CPU\n"

	.comm	_EIO,4,2                        ; @EIO
.subsections_via_symbols
