	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sdio_set_bus_speed_mode
_sdio_set_bus_speed_mode:               ## @sdio_set_bus_speed_mode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	callq	_mmc_host_uhs
	testl	%eax, %eax
	je	LBB0_21
## %bb.1:
	movq	_SDIO_SPEED_SDR12@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_MMC_TIMING_UHS_SDR12@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	(%rbx), %rax
	movl	(%rax), %eax
	movq	_MMC_CAP_UHS_SDR104@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%eax, %ecx
	je	LBB0_4
## %bb.2:
	movq	_SD_MODE_UHS_SDR104@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	testl	%edx, 8(%rbx)
	je	LBB0_4
## %bb.3:
	movq	_SDIO_SPEED_SDR104@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_MMC_TIMING_UHS_SDR104@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	_UHS_SDR104_BUS_SPEED@GOTPCREL(%rip), %rax
	movq	_UHS_SDR104_MAX_DTR@GOTPCREL(%rip), %rcx
	jmp	LBB0_16
LBB0_4:
	movq	_MMC_CAP_UHS_DDR50@GOTPCREL(%rip), %rdx
	testl	%eax, (%rdx)
	je	LBB0_7
## %bb.5:
	movq	_SD_MODE_UHS_DDR50@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	testl	%edx, 8(%rbx)
	je	LBB0_7
## %bb.6:
	movq	_SDIO_SPEED_DDR50@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_MMC_TIMING_UHS_DDR50@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	_UHS_DDR50_BUS_SPEED@GOTPCREL(%rip), %rax
	movq	_UHS_DDR50_MAX_DTR@GOTPCREL(%rip), %rcx
	jmp	LBB0_16
LBB0_7:
	movq	_MMC_CAP_UHS_SDR50@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	testl	%eax, %ecx
	je	LBB0_10
## %bb.8:
	movq	_SD_MODE_UHS_SDR50@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	testl	%edx, 8(%rbx)
	je	LBB0_10
## %bb.9:
	movq	_SDIO_SPEED_SDR50@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_MMC_TIMING_UHS_SDR50@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	_UHS_SDR50_BUS_SPEED@GOTPCREL(%rip), %rax
	movq	_UHS_SDR50_MAX_DTR@GOTPCREL(%rip), %rcx
	jmp	LBB0_16
LBB0_10:
	movq	_MMC_CAP_UHS_SDR25@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	testl	%eax, %ecx
	je	LBB0_13
## %bb.11:
	movq	_SD_MODE_UHS_SDR25@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	testl	%edx, 8(%rbx)
	je	LBB0_13
## %bb.12:
	movq	_SDIO_SPEED_SDR25@GOTPCREL(%rip), %rax
	movl	(%rax), %r12d
	movq	_MMC_TIMING_UHS_SDR25@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	_UHS_SDR25_BUS_SPEED@GOTPCREL(%rip), %rax
	movq	_UHS_SDR25_MAX_DTR@GOTPCREL(%rip), %rcx
	jmp	LBB0_16
LBB0_13:
	movq	_MMC_CAP_UHS_SDR12@GOTPCREL(%rip), %rdx
	orl	(%rdx), %ecx
	testl	%eax, %ecx
	je	LBB0_17
## %bb.14:
	movq	_SD_MODE_UHS_SDR12@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, 8(%rbx)
	je	LBB0_17
## %bb.15:
	movq	_UHS_SDR12_BUS_SPEED@GOTPCREL(%rip), %rax
	movq	_UHS_SDR12_MAX_DTR@GOTPCREL(%rip), %rcx
LBB0_16:
	movl	(%rcx), %ecx
	movl	%ecx, 12(%rbx)
	movl	(%rax), %eax
	movl	%eax, 20(%rbx)
LBB0_17:
	movq	_SDIO_CCCR_SPEED@GOTPCREL(%rip), %r15
	movl	(%r15), %ecx
	leaq	-33(%rbp), %r9
	movq	%rbx, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	xorl	%r8d, %r8d
	callq	_mmc_io_rw_direct
	testl	%eax, %eax
	jne	LBB0_22
## %bb.18:
	movq	_SDIO_SPEED_BSS_MASK@GOTPCREL(%rip), %rax
	movb	(%rax), %al
	notb	%al
	andb	-33(%rbp), %al
	movl	%r12d, %edx
	orb	%al, %dl
	movb	%dl, -33(%rbp)
	movl	(%r15), %ecx
	movzbl	%dl, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	xorl	%edx, %edx
	xorl	%r9d, %r9d
	callq	_mmc_io_rw_direct
	testl	%eax, %eax
	jne	LBB0_22
## %bb.19:
	movl	12(%rbx), %esi
	movl	16(%rbx), %edi
	callq	_min_not_zero
	testl	%r12d, %r12d
	je	LBB0_21
## %bb.20:
	movl	%eax, %r15d
	movq	(%rbx), %rdi
	movl	%r14d, %esi
	callq	_mmc_set_timing
	movq	(%rbx), %rdi
	movl	%r15d, %esi
	callq	_mmc_set_clock
LBB0_21:
	xorl	%eax, %eax
LBB0_22:
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SDIO_SPEED_SDR12,4,2           ## @SDIO_SPEED_SDR12
	.comm	_MMC_TIMING_UHS_SDR12,4,2       ## @MMC_TIMING_UHS_SDR12
	.comm	_MMC_CAP_UHS_SDR104,4,2         ## @MMC_CAP_UHS_SDR104
	.comm	_SD_MODE_UHS_SDR104,4,2         ## @SD_MODE_UHS_SDR104
	.comm	_SDIO_SPEED_SDR104,4,2          ## @SDIO_SPEED_SDR104
	.comm	_MMC_TIMING_UHS_SDR104,4,2      ## @MMC_TIMING_UHS_SDR104
	.comm	_UHS_SDR104_MAX_DTR,4,2         ## @UHS_SDR104_MAX_DTR
	.comm	_UHS_SDR104_BUS_SPEED,4,2       ## @UHS_SDR104_BUS_SPEED
	.comm	_MMC_CAP_UHS_DDR50,4,2          ## @MMC_CAP_UHS_DDR50
	.comm	_SD_MODE_UHS_DDR50,4,2          ## @SD_MODE_UHS_DDR50
	.comm	_SDIO_SPEED_DDR50,4,2           ## @SDIO_SPEED_DDR50
	.comm	_MMC_TIMING_UHS_DDR50,4,2       ## @MMC_TIMING_UHS_DDR50
	.comm	_UHS_DDR50_MAX_DTR,4,2          ## @UHS_DDR50_MAX_DTR
	.comm	_UHS_DDR50_BUS_SPEED,4,2        ## @UHS_DDR50_BUS_SPEED
	.comm	_MMC_CAP_UHS_SDR50,4,2          ## @MMC_CAP_UHS_SDR50
	.comm	_SD_MODE_UHS_SDR50,4,2          ## @SD_MODE_UHS_SDR50
	.comm	_SDIO_SPEED_SDR50,4,2           ## @SDIO_SPEED_SDR50
	.comm	_MMC_TIMING_UHS_SDR50,4,2       ## @MMC_TIMING_UHS_SDR50
	.comm	_UHS_SDR50_MAX_DTR,4,2          ## @UHS_SDR50_MAX_DTR
	.comm	_UHS_SDR50_BUS_SPEED,4,2        ## @UHS_SDR50_BUS_SPEED
	.comm	_MMC_CAP_UHS_SDR25,4,2          ## @MMC_CAP_UHS_SDR25
	.comm	_SD_MODE_UHS_SDR25,4,2          ## @SD_MODE_UHS_SDR25
	.comm	_SDIO_SPEED_SDR25,4,2           ## @SDIO_SPEED_SDR25
	.comm	_MMC_TIMING_UHS_SDR25,4,2       ## @MMC_TIMING_UHS_SDR25
	.comm	_UHS_SDR25_MAX_DTR,4,2          ## @UHS_SDR25_MAX_DTR
	.comm	_UHS_SDR25_BUS_SPEED,4,2        ## @UHS_SDR25_BUS_SPEED
	.comm	_MMC_CAP_UHS_SDR12,4,2          ## @MMC_CAP_UHS_SDR12
	.comm	_SD_MODE_UHS_SDR12,4,2          ## @SD_MODE_UHS_SDR12
	.comm	_UHS_SDR12_MAX_DTR,4,2          ## @UHS_SDR12_MAX_DTR
	.comm	_UHS_SDR12_BUS_SPEED,4,2        ## @UHS_SDR12_BUS_SPEED
	.comm	_SDIO_CCCR_SPEED,4,2            ## @SDIO_CCCR_SPEED
	.comm	_SDIO_SPEED_BSS_MASK,1,0        ## @SDIO_SPEED_BSS_MASK
	.no_dead_strip	_sdio_set_bus_speed_mode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sdio_set_bus_speed_mode
_sdio_set_bus_speed_mode:               ; @sdio_set_bus_speed_mode
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x0, [x0]
	bl	_mmc_host_uhs
	cbz	w0, LBB0_22
; %bb.1:
Lloh0:
	adrp	x8, _SDIO_SPEED_SDR12@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SDIO_SPEED_SDR12@GOTPAGEOFF]
Lloh2:
	ldr	w22, [x8]
Lloh3:
	adrp	x8, _MMC_TIMING_UHS_SDR12@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MMC_TIMING_UHS_SDR12@GOTPAGEOFF]
Lloh5:
	ldr	w20, [x8]
	ldr	x8, [x19]
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _MMC_CAP_UHS_SDR104@GOTPAGE
Lloh7:
	ldr	x9, [x9, _MMC_CAP_UHS_SDR104@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_4
; %bb.2:
	ldr	w10, [x19, #8]
Lloh9:
	adrp	x11, _SD_MODE_UHS_SDR104@GOTPAGE
Lloh10:
	ldr	x11, [x11, _SD_MODE_UHS_SDR104@GOTPAGEOFF]
Lloh11:
	ldr	w11, [x11]
	tst	w11, w10
	b.eq	LBB0_4
; %bb.3:
Lloh12:
	adrp	x8, _SDIO_SPEED_SDR104@GOTPAGE
Lloh13:
	ldr	x8, [x8, _SDIO_SPEED_SDR104@GOTPAGEOFF]
Lloh14:
	adrp	x9, _MMC_TIMING_UHS_SDR104@GOTPAGE
Lloh15:
	ldr	x9, [x9, _MMC_TIMING_UHS_SDR104@GOTPAGEOFF]
Lloh16:
	ldr	w22, [x8]
Lloh17:
	ldr	w20, [x9]
Lloh18:
	adrp	x8, _UHS_SDR104_BUS_SPEED@GOTPAGE
Lloh19:
	ldr	x8, [x8, _UHS_SDR104_BUS_SPEED@GOTPAGEOFF]
Lloh20:
	adrp	x9, _UHS_SDR104_MAX_DTR@GOTPAGE
Lloh21:
	ldr	x9, [x9, _UHS_SDR104_MAX_DTR@GOTPAGEOFF]
	b	LBB0_16
LBB0_4:
Lloh22:
	adrp	x10, _MMC_CAP_UHS_DDR50@GOTPAGE
Lloh23:
	ldr	x10, [x10, _MMC_CAP_UHS_DDR50@GOTPAGEOFF]
Lloh24:
	ldr	w10, [x10]
	tst	w10, w8
	b.eq	LBB0_7
; %bb.5:
	ldr	w10, [x19, #8]
Lloh25:
	adrp	x11, _SD_MODE_UHS_DDR50@GOTPAGE
Lloh26:
	ldr	x11, [x11, _SD_MODE_UHS_DDR50@GOTPAGEOFF]
Lloh27:
	ldr	w11, [x11]
	tst	w11, w10
	b.eq	LBB0_7
; %bb.6:
Lloh28:
	adrp	x8, _SDIO_SPEED_DDR50@GOTPAGE
Lloh29:
	ldr	x8, [x8, _SDIO_SPEED_DDR50@GOTPAGEOFF]
Lloh30:
	adrp	x9, _MMC_TIMING_UHS_DDR50@GOTPAGE
Lloh31:
	ldr	x9, [x9, _MMC_TIMING_UHS_DDR50@GOTPAGEOFF]
Lloh32:
	ldr	w22, [x8]
Lloh33:
	ldr	w20, [x9]
Lloh34:
	adrp	x8, _UHS_DDR50_BUS_SPEED@GOTPAGE
Lloh35:
	ldr	x8, [x8, _UHS_DDR50_BUS_SPEED@GOTPAGEOFF]
Lloh36:
	adrp	x9, _UHS_DDR50_MAX_DTR@GOTPAGE
Lloh37:
	ldr	x9, [x9, _UHS_DDR50_MAX_DTR@GOTPAGEOFF]
	b	LBB0_16
LBB0_7:
Lloh38:
	adrp	x10, _MMC_CAP_UHS_SDR50@GOTPAGE
Lloh39:
	ldr	x10, [x10, _MMC_CAP_UHS_SDR50@GOTPAGEOFF]
Lloh40:
	ldr	w10, [x10]
	orr	w9, w10, w9
	tst	w9, w8
	b.eq	LBB0_10
; %bb.8:
	ldr	w10, [x19, #8]
Lloh41:
	adrp	x11, _SD_MODE_UHS_SDR50@GOTPAGE
Lloh42:
	ldr	x11, [x11, _SD_MODE_UHS_SDR50@GOTPAGEOFF]
Lloh43:
	ldr	w11, [x11]
	tst	w11, w10
	b.eq	LBB0_10
; %bb.9:
Lloh44:
	adrp	x8, _SDIO_SPEED_SDR50@GOTPAGE
Lloh45:
	ldr	x8, [x8, _SDIO_SPEED_SDR50@GOTPAGEOFF]
Lloh46:
	adrp	x9, _MMC_TIMING_UHS_SDR50@GOTPAGE
Lloh47:
	ldr	x9, [x9, _MMC_TIMING_UHS_SDR50@GOTPAGEOFF]
Lloh48:
	ldr	w22, [x8]
Lloh49:
	ldr	w20, [x9]
Lloh50:
	adrp	x8, _UHS_SDR50_BUS_SPEED@GOTPAGE
Lloh51:
	ldr	x8, [x8, _UHS_SDR50_BUS_SPEED@GOTPAGEOFF]
Lloh52:
	adrp	x9, _UHS_SDR50_MAX_DTR@GOTPAGE
Lloh53:
	ldr	x9, [x9, _UHS_SDR50_MAX_DTR@GOTPAGEOFF]
	b	LBB0_16
LBB0_10:
Lloh54:
	adrp	x10, _MMC_CAP_UHS_SDR25@GOTPAGE
Lloh55:
	ldr	x10, [x10, _MMC_CAP_UHS_SDR25@GOTPAGEOFF]
Lloh56:
	ldr	w10, [x10]
	orr	w9, w10, w9
	tst	w9, w8
	b.eq	LBB0_13
; %bb.11:
	ldr	w10, [x19, #8]
Lloh57:
	adrp	x11, _SD_MODE_UHS_SDR25@GOTPAGE
Lloh58:
	ldr	x11, [x11, _SD_MODE_UHS_SDR25@GOTPAGEOFF]
Lloh59:
	ldr	w11, [x11]
	tst	w11, w10
	b.eq	LBB0_13
; %bb.12:
Lloh60:
	adrp	x8, _SDIO_SPEED_SDR25@GOTPAGE
Lloh61:
	ldr	x8, [x8, _SDIO_SPEED_SDR25@GOTPAGEOFF]
Lloh62:
	adrp	x9, _MMC_TIMING_UHS_SDR25@GOTPAGE
Lloh63:
	ldr	x9, [x9, _MMC_TIMING_UHS_SDR25@GOTPAGEOFF]
Lloh64:
	ldr	w22, [x8]
Lloh65:
	ldr	w20, [x9]
Lloh66:
	adrp	x8, _UHS_SDR25_BUS_SPEED@GOTPAGE
Lloh67:
	ldr	x8, [x8, _UHS_SDR25_BUS_SPEED@GOTPAGEOFF]
Lloh68:
	adrp	x9, _UHS_SDR25_MAX_DTR@GOTPAGE
Lloh69:
	ldr	x9, [x9, _UHS_SDR25_MAX_DTR@GOTPAGEOFF]
	b	LBB0_16
LBB0_13:
Lloh70:
	adrp	x10, _MMC_CAP_UHS_SDR12@GOTPAGE
Lloh71:
	ldr	x10, [x10, _MMC_CAP_UHS_SDR12@GOTPAGEOFF]
Lloh72:
	ldr	w10, [x10]
	orr	w9, w10, w9
	tst	w9, w8
	b.eq	LBB0_17
; %bb.14:
	ldr	w8, [x19, #8]
Lloh73:
	adrp	x9, _SD_MODE_UHS_SDR12@GOTPAGE
Lloh74:
	ldr	x9, [x9, _SD_MODE_UHS_SDR12@GOTPAGEOFF]
Lloh75:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_17
; %bb.15:
Lloh76:
	adrp	x8, _UHS_SDR12_BUS_SPEED@GOTPAGE
Lloh77:
	ldr	x8, [x8, _UHS_SDR12_BUS_SPEED@GOTPAGEOFF]
Lloh78:
	adrp	x9, _UHS_SDR12_MAX_DTR@GOTPAGE
Lloh79:
	ldr	x9, [x9, _UHS_SDR12_MAX_DTR@GOTPAGEOFF]
LBB0_16:
	ldr	w9, [x9]
	str	w9, [x19, #12]
	ldr	w8, [x8]
	str	w8, [x19, #20]
LBB0_17:
Lloh80:
	adrp	x21, _SDIO_CCCR_SPEED@GOTPAGE
Lloh81:
	ldr	x21, [x21, _SDIO_CCCR_SPEED@GOTPAGEOFF]
	ldr	w3, [x21]
	add	x5, sp, #15
	mov	x0, x19
	mov	w1, #0
	mov	w2, #0
	mov	w4, #0
	bl	_mmc_io_rw_direct
	cbnz	w0, LBB0_22
; %bb.18:
Lloh82:
	adrp	x8, _SDIO_SPEED_BSS_MASK@GOTPAGE
Lloh83:
	ldr	x8, [x8, _SDIO_SPEED_BSS_MASK@GOTPAGEOFF]
	ldrb	w8, [x8]
	ldrb	w9, [sp, #15]
	bic	w8, w9, w8
	orr	w8, w8, w22
	strb	w8, [sp, #15]
	ldr	w3, [x21]
	and	w4, w8, #0xff
	mov	x0, x19
	mov	w1, #1
	mov	w2, #0
	mov	x5, #0
	bl	_mmc_io_rw_direct
	cbnz	w0, LBB0_22
; %bb.19:
	ldp	w1, w0, [x19, #12]
	bl	_min_not_zero
	cbz	w22, LBB0_21
; %bb.20:
	mov	x21, x0
	ldr	x0, [x19]
	mov	x1, x20
	bl	_mmc_set_timing
	ldr	x0, [x19]
	mov	x1, x21
	bl	_mmc_set_clock
LBB0_21:
	mov	w0, #0
LBB0_22:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh16
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGot	Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh32
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh48
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh64
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGot	Lloh78, Lloh79
	.loh AdrpLdrGot	Lloh76, Lloh77
	.loh AdrpLdrGot	Lloh80, Lloh81
	.loh AdrpLdrGot	Lloh82, Lloh83
	.cfi_endproc
                                        ; -- End function
	.comm	_SDIO_SPEED_SDR12,4,2           ; @SDIO_SPEED_SDR12
	.comm	_MMC_TIMING_UHS_SDR12,4,2       ; @MMC_TIMING_UHS_SDR12
	.comm	_MMC_CAP_UHS_SDR104,4,2         ; @MMC_CAP_UHS_SDR104
	.comm	_SD_MODE_UHS_SDR104,4,2         ; @SD_MODE_UHS_SDR104
	.comm	_SDIO_SPEED_SDR104,4,2          ; @SDIO_SPEED_SDR104
	.comm	_MMC_TIMING_UHS_SDR104,4,2      ; @MMC_TIMING_UHS_SDR104
	.comm	_UHS_SDR104_MAX_DTR,4,2         ; @UHS_SDR104_MAX_DTR
	.comm	_UHS_SDR104_BUS_SPEED,4,2       ; @UHS_SDR104_BUS_SPEED
	.comm	_MMC_CAP_UHS_DDR50,4,2          ; @MMC_CAP_UHS_DDR50
	.comm	_SD_MODE_UHS_DDR50,4,2          ; @SD_MODE_UHS_DDR50
	.comm	_SDIO_SPEED_DDR50,4,2           ; @SDIO_SPEED_DDR50
	.comm	_MMC_TIMING_UHS_DDR50,4,2       ; @MMC_TIMING_UHS_DDR50
	.comm	_UHS_DDR50_MAX_DTR,4,2          ; @UHS_DDR50_MAX_DTR
	.comm	_UHS_DDR50_BUS_SPEED,4,2        ; @UHS_DDR50_BUS_SPEED
	.comm	_MMC_CAP_UHS_SDR50,4,2          ; @MMC_CAP_UHS_SDR50
	.comm	_SD_MODE_UHS_SDR50,4,2          ; @SD_MODE_UHS_SDR50
	.comm	_SDIO_SPEED_SDR50,4,2           ; @SDIO_SPEED_SDR50
	.comm	_MMC_TIMING_UHS_SDR50,4,2       ; @MMC_TIMING_UHS_SDR50
	.comm	_UHS_SDR50_MAX_DTR,4,2          ; @UHS_SDR50_MAX_DTR
	.comm	_UHS_SDR50_BUS_SPEED,4,2        ; @UHS_SDR50_BUS_SPEED
	.comm	_MMC_CAP_UHS_SDR25,4,2          ; @MMC_CAP_UHS_SDR25
	.comm	_SD_MODE_UHS_SDR25,4,2          ; @SD_MODE_UHS_SDR25
	.comm	_SDIO_SPEED_SDR25,4,2           ; @SDIO_SPEED_SDR25
	.comm	_MMC_TIMING_UHS_SDR25,4,2       ; @MMC_TIMING_UHS_SDR25
	.comm	_UHS_SDR25_MAX_DTR,4,2          ; @UHS_SDR25_MAX_DTR
	.comm	_UHS_SDR25_BUS_SPEED,4,2        ; @UHS_SDR25_BUS_SPEED
	.comm	_MMC_CAP_UHS_SDR12,4,2          ; @MMC_CAP_UHS_SDR12
	.comm	_SD_MODE_UHS_SDR12,4,2          ; @SD_MODE_UHS_SDR12
	.comm	_UHS_SDR12_MAX_DTR,4,2          ; @UHS_SDR12_MAX_DTR
	.comm	_UHS_SDR12_BUS_SPEED,4,2        ; @UHS_SDR12_BUS_SPEED
	.comm	_SDIO_CCCR_SPEED,4,2            ; @SDIO_CCCR_SPEED
	.comm	_SDIO_SPEED_BSS_MASK,1,0        ; @SDIO_SPEED_BSS_MASK
	.no_dead_strip	_sdio_set_bus_speed_mode
.subsections_via_symbols
