	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_sdhci_pci_o2_probe             ## -- Begin function sdhci_pci_o2_probe
	.p2align	4, 0x90
_sdhci_pci_o2_probe:                    ## @sdhci_pci_o2_probe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	movl	(%rdi), %ecx
	xorl	%eax, %eax
	addl	$-128, %ecx
	cmpl	$8, %ecx
	ja	LBB0_28
## %bb.1:
	movl	$480, %eax                      ## imm = 0x1E0
	btl	%ecx, %eax
	jb	LBB0_7
## %bb.2:
	movl	$28, %eax
	movq	_O2_SD_LOCK_WP@GOTPCREL(%rip), %r14
	btl	%ecx, %eax
	jae	LBB0_18
## %bb.3:
	movl	(%r14), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_byte
	testl	%eax, %eax
	jne	LBB0_28
## %bb.4:
	movl	-28(%rbp), %edx
	andl	$127, %edx
	movl	%edx, -28(%rbp)
	movq	(%rbx), %rdi
	movl	(%r14), %esi
	callq	_pci_write_config_byte
	movq	(%rbx), %rdi
	cmpl	$132, (%rdi)
	jne	LBB0_12
## %bb.5:
	movq	_O2_SD_FUNC_REG0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-32(%rbp), %rdx
	callq	_pci_read_config_dword
	movl	-32(%rbp), %eax
	shrl	$24, %eax
	movl	%eax, -32(%rbp)
	addl	$-17, %eax
	cmpl	$1, %eax
	ja	LBB0_12
## %bb.6:
	movl	$621805568, -32(%rbp)           ## imm = 0x25100000
	movq	%rbx, %rdi
	movl	$621805568, %esi                ## imm = 0x25100000
	callq	_o2_pci_set_baseclk
	movq	(%rbx), %rdi
	movq	_O2_SD_FUNC_REG4@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-32(%rbp), %rdx
	callq	_pci_read_config_dword
	movq	_O2_SD_FREG4_ENABLE_CLK_SET@GOTPCREL(%rip), %rax
	movl	-32(%rbp), %edx
	orl	(%rax), %edx
	movl	%edx, -32(%rbp)
	movq	(%rbx), %rdi
	movl	(%r14), %esi
	callq	_pci_write_config_dword
	movl	$68, %edx
	movq	_O2_SD_TUNING_CTRL@GOTPCREL(%rip), %r14
	jmp	LBB0_27
LBB0_7:
	movq	_O2_SD_LOCK_WP@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_byte
	testl	%eax, %eax
	jne	LBB0_28
## %bb.8:
	movl	-28(%rbp), %edx
	andl	$127, %edx
	movl	%edx, -28(%rbp)
	movq	(%rbx), %rdi
	movl	(%r14), %esi
	callq	_pci_write_config_byte
	movq	(%rbx), %rdi
	movq	_O2_SD_MULTI_VCC3V@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$8, %edx
	callq	_pci_write_config_byte
	movq	(%rbx), %rdi
	movq	_O2_SD_CLKREQ@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_byte
	testl	%eax, %eax
	jne	LBB0_28
## %bb.9:
	movl	-28(%rbp), %edx
	orl	$32, %edx
	movl	%edx, -28(%rbp)
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	callq	_pci_write_config_byte
	movq	(%rbx), %rdi
	movq	_O2_SD_CAPS@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_byte
	testl	%eax, %eax
	jne	LBB0_28
## %bb.10:
	movl	-28(%rbp), %edx
	orl	$1, %edx
	movl	%edx, -28(%rbp)
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	callq	_pci_write_config_byte
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	movl	$115, %edx
	callq	_pci_write_config_byte
	movq	(%rbx), %rdi
	movq	_O2_SD_ADMA1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$57, %edx
	callq	_pci_write_config_byte
	movq	(%rbx), %rdi
	movq	_O2_SD_ADMA2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$8, %edx
	callq	_pci_write_config_byte
	movq	(%rbx), %rdi
	movq	_O2_SD_INF_MOD@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_byte
	testl	%eax, %eax
	jne	LBB0_28
## %bb.11:
	movl	-28(%rbp), %edx
	orl	$8, %edx
	movl	%edx, -28(%rbp)
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	jmp	LBB0_23
LBB0_18:
	movl	(%r14), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_byte
	testl	%eax, %eax
	jne	LBB0_28
## %bb.19:
	movl	-28(%rbp), %edx
	andl	$127, %edx
	movl	%edx, -28(%rbp)
	movq	(%rbx), %rdi
	movl	(%r14), %esi
	callq	_pci_write_config_byte
	movq	(%rbx), %rdi
	movq	_O2_SD_PLL_SETTING@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-32(%rbp), %rdx
	callq	_pci_read_config_dword
	movl	-32(%rbp), %eax
	movzwl	%ax, %edx
	andl	$-16777216, %eax                ## imm = 0xFF000000
	cmpl	$16777216, %eax                 ## imm = 0x1000000
	jne	LBB0_21
## %bb.20:
	orl	$523501568, %edx                ## imm = 0x1F340000
	jmp	LBB0_22
LBB0_12:
	movq	%rbx, %rdi
	callq	_o2_pci_led_enable
	movq	(%rbx), %rdi
	movq	_O2_SD_CLK_SETTING@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-32(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_28
## %bb.13:
	movl	$-132185857, %edx               ## imm = 0xF81F00FF
	andl	-32(%rbp), %edx
	orl	$132171776, %edx                ## imm = 0x7E0C800
	movl	%edx, -32(%rbp)
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	callq	_pci_write_config_dword
	movq	(%rbx), %rdi
	movq	_O2_SD_CLKREQ@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-32(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_28
## %bb.14:
	movl	-32(%rbp), %edx
	orl	$3, %edx
	movl	%edx, -32(%rbp)
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	callq	_pci_write_config_dword
	movq	(%rbx), %rdi
	movq	_O2_SD_PLL_SETTING@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-32(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_28
## %bb.15:
	movl	$-524224271, %edx               ## imm = 0xE0C0F8F1
	andl	-32(%rbp), %edx
	orl	$405209350, %edx                ## imm = 0x18270106
	movl	%edx, -32(%rbp)
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	callq	_pci_write_config_dword
	movq	(%rbx), %rdi
	movq	_O2_SD_CAP_REG2@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-32(%rbp), %rdx
	callq	_pci_read_config_dword
	testl	%eax, %eax
	jne	LBB0_28
## %bb.16:
	movl	$-225, %edx
	andl	-32(%rbp), %edx
	movl	%edx, -32(%rbp)
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	callq	_pci_write_config_dword
	movq	(%rbx), %rdi
	cmpl	$132, (%rdi)
	jne	LBB0_25
## %bb.17:
	movq	%rbx, %rdi
	callq	_sdhci_pci_o2_fujin2_pci_init
	jmp	LBB0_24
LBB0_21:
	orl	$621805568, %edx                ## imm = 0x25100000
	movl	%edx, -32(%rbp)
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	callq	_pci_write_config_dword
	movq	(%rbx), %rdi
	movq	_O2_SD_FUNC_REG4@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-32(%rbp), %rdx
	callq	_pci_read_config_dword
	movl	$4194304, %edx                  ## imm = 0x400000
	orl	-32(%rbp), %edx
LBB0_22:
	movl	%edx, -32(%rbp)
	movq	(%rbx), %rdi
	movl	(%r15), %esi
	callq	_pci_write_config_dword
	movq	(%rbx), %rdi
	movq	_O2_SD_TUNING_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$85, %edx
LBB0_23:
	callq	_pci_write_config_byte
LBB0_24:
	movq	(%rbx), %rdi
LBB0_25:
	movl	(%r14), %esi
	leaq	-28(%rbp), %rdx
	callq	_pci_read_config_byte
	testl	%eax, %eax
	jne	LBB0_28
## %bb.26:
	movl	$128, %edx
	orl	-28(%rbp), %edx
	movl	%edx, -28(%rbp)
LBB0_27:
	movq	(%rbx), %rdi
	movl	(%r14), %esi
	callq	_pci_write_config_byte
	xorl	%eax, %eax
LBB0_28:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_O2_SD_LOCK_WP,4,2              ## @O2_SD_LOCK_WP
	.comm	_O2_SD_MULTI_VCC3V,4,2          ## @O2_SD_MULTI_VCC3V
	.comm	_O2_SD_CLKREQ,4,2               ## @O2_SD_CLKREQ
	.comm	_O2_SD_CAPS,4,2                 ## @O2_SD_CAPS
	.comm	_O2_SD_ADMA1,4,2                ## @O2_SD_ADMA1
	.comm	_O2_SD_ADMA2,4,2                ## @O2_SD_ADMA2
	.comm	_O2_SD_INF_MOD,4,2              ## @O2_SD_INF_MOD
	.comm	_O2_SD_FUNC_REG0,4,2            ## @O2_SD_FUNC_REG0
	.comm	_O2_SD_FUNC_REG4,4,2            ## @O2_SD_FUNC_REG4
	.comm	_O2_SD_FREG4_ENABLE_CLK_SET,4,2 ## @O2_SD_FREG4_ENABLE_CLK_SET
	.comm	_O2_SD_TUNING_CTRL,4,2          ## @O2_SD_TUNING_CTRL
	.comm	_O2_SD_CLK_SETTING,4,2          ## @O2_SD_CLK_SETTING
	.comm	_O2_SD_PLL_SETTING,4,2          ## @O2_SD_PLL_SETTING
	.comm	_O2_SD_CAP_REG2,4,2             ## @O2_SD_CAP_REG2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_sdhci_pci_o2_probe             ; -- Begin function sdhci_pci_o2_probe
	.p2align	2
_sdhci_pci_o2_probe:                    ; @sdhci_pci_o2_probe
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x0, [x0]
	ldr	w8, [x0]
	sub	w8, w8, #128
	cmp	w8, #8
	b.hi	LBB0_28
; %bb.1:
	mov	w9, #1
	lsl	w8, w9, w8
Lloh0:
	adrp	x20, _O2_SD_LOCK_WP@GOTPAGE
Lloh1:
	ldr	x20, [x20, _O2_SD_LOCK_WP@GOTPAGEOFF]
	tst	w8, #0x1e0
	b.ne	LBB0_7
; %bb.2:
	tst	w8, #0x1c
	b.eq	LBB0_12
; %bb.3:
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_byte
	cbnz	w0, LBB0_29
; %bb.4:
	ldr	w8, [sp, #12]
	and	w2, w8, #0x7f
	str	w2, [sp, #12]
	ldr	x0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_byte
	ldr	x0, [x19]
	ldr	w8, [x0]
	cmp	w8, #132
	b.ne	LBB0_15
; %bb.5:
Lloh2:
	adrp	x8, _O2_SD_FUNC_REG0@GOTPAGE
Lloh3:
	ldr	x8, [x8, _O2_SD_FUNC_REG0@GOTPAGEOFF]
Lloh4:
	ldr	w1, [x8]
	add	x2, sp, #8
	bl	_pci_read_config_dword
	ldr	w8, [sp, #8]
	lsr	w8, w8, #24
	str	w8, [sp, #8]
	sub	w8, w8, #17
	cmp	w8, #1
	b.hi	LBB0_15
; %bb.6:
	mov	w8, #621805568
	str	w8, [sp, #8]
	mov	x0, x19
	mov	w1, #621805568
	bl	_o2_pci_set_baseclk
	ldr	x0, [x19]
Lloh5:
	adrp	x20, _O2_SD_FUNC_REG4@GOTPAGE
Lloh6:
	ldr	x20, [x20, _O2_SD_FUNC_REG4@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #8
	bl	_pci_read_config_dword
Lloh7:
	adrp	x8, _O2_SD_FREG4_ENABLE_CLK_SET@GOTPAGE
Lloh8:
	ldr	x8, [x8, _O2_SD_FREG4_ENABLE_CLK_SET@GOTPAGEOFF]
Lloh9:
	ldr	w8, [x8]
	ldr	w9, [sp, #8]
	orr	w2, w9, w8
	str	w2, [sp, #8]
	ldr	x0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_dword
	mov	w2, #68
Lloh10:
	adrp	x8, _O2_SD_TUNING_CTRL@GOTPAGE
Lloh11:
	ldr	x8, [x8, _O2_SD_TUNING_CTRL@GOTPAGEOFF]
	b	LBB0_27
LBB0_7:
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_byte
	cbnz	w0, LBB0_29
; %bb.8:
	ldr	w8, [sp, #12]
	and	w2, w8, #0x7f
	str	w2, [sp, #12]
	ldr	x0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_byte
	ldr	x0, [x19]
Lloh12:
	adrp	x8, _O2_SD_MULTI_VCC3V@GOTPAGE
Lloh13:
	ldr	x8, [x8, _O2_SD_MULTI_VCC3V@GOTPAGEOFF]
Lloh14:
	ldr	w1, [x8]
	mov	w2, #8
	bl	_pci_write_config_byte
	ldr	x0, [x19]
Lloh15:
	adrp	x21, _O2_SD_CLKREQ@GOTPAGE
Lloh16:
	ldr	x21, [x21, _O2_SD_CLKREQ@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #12
	bl	_pci_read_config_byte
	cbnz	w0, LBB0_29
; %bb.9:
	ldr	w8, [sp, #12]
	orr	w2, w8, #0x20
	str	w2, [sp, #12]
	ldr	x0, [x19]
	ldr	w1, [x21]
	bl	_pci_write_config_byte
	ldr	x0, [x19]
Lloh17:
	adrp	x21, _O2_SD_CAPS@GOTPAGE
Lloh18:
	ldr	x21, [x21, _O2_SD_CAPS@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #12
	bl	_pci_read_config_byte
	cbnz	w0, LBB0_29
; %bb.10:
	ldr	w8, [sp, #12]
	orr	w2, w8, #0x1
	str	w2, [sp, #12]
	ldr	x0, [x19]
	ldr	w1, [x21]
	bl	_pci_write_config_byte
	ldr	x0, [x19]
	ldr	w1, [x21]
	mov	w2, #115
	bl	_pci_write_config_byte
	ldr	x0, [x19]
Lloh19:
	adrp	x8, _O2_SD_ADMA1@GOTPAGE
Lloh20:
	ldr	x8, [x8, _O2_SD_ADMA1@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
	mov	w2, #57
	bl	_pci_write_config_byte
	ldr	x0, [x19]
Lloh22:
	adrp	x8, _O2_SD_ADMA2@GOTPAGE
Lloh23:
	ldr	x8, [x8, _O2_SD_ADMA2@GOTPAGEOFF]
Lloh24:
	ldr	w1, [x8]
	mov	w2, #8
	bl	_pci_write_config_byte
	ldr	x0, [x19]
Lloh25:
	adrp	x21, _O2_SD_INF_MOD@GOTPAGE
Lloh26:
	ldr	x21, [x21, _O2_SD_INF_MOD@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #12
	bl	_pci_read_config_byte
	cbnz	w0, LBB0_29
; %bb.11:
	ldr	w8, [sp, #12]
	orr	w2, w8, #0x8
	str	w2, [sp, #12]
	ldr	x0, [x19]
	ldr	w1, [x21]
	b	LBB0_23
LBB0_12:
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_byte
	cbnz	w0, LBB0_29
; %bb.13:
	ldr	w8, [sp, #12]
	and	w2, w8, #0x7f
	str	w2, [sp, #12]
	ldr	x0, [x19]
	ldr	w1, [x20]
	bl	_pci_write_config_byte
	ldr	x0, [x19]
Lloh27:
	adrp	x21, _O2_SD_PLL_SETTING@GOTPAGE
Lloh28:
	ldr	x21, [x21, _O2_SD_PLL_SETTING@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #8
	bl	_pci_read_config_dword
	ldr	w9, [sp, #8]
	and	w8, w9, #0xffff
	lsr	w9, w9, #24
	cmp	w9, #1
	b.ne	LBB0_21
; %bb.14:
	mov	w9, #523501568
	orr	w2, w8, w9
Lloh29:
	adrp	x21, _O2_SD_PLL_SETTING@GOTPAGE
Lloh30:
	ldr	x21, [x21, _O2_SD_PLL_SETTING@GOTPAGEOFF]
	b	LBB0_22
LBB0_15:
	mov	x0, x19
	bl	_o2_pci_led_enable
	ldr	x0, [x19]
Lloh31:
	adrp	x21, _O2_SD_CLK_SETTING@GOTPAGE
Lloh32:
	ldr	x21, [x21, _O2_SD_CLK_SETTING@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #8
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_29
; %bb.16:
	ldr	w8, [sp, #8]
	and	w8, w8, #0xffff00ff
	mov	w9, #51200
	movk	w9, #2016, lsl #16
	orr	w2, w8, w9
	str	w2, [sp, #8]
	ldr	x0, [x19]
	ldr	w1, [x21]
	bl	_pci_write_config_dword
	ldr	x0, [x19]
Lloh33:
	adrp	x21, _O2_SD_CLKREQ@GOTPAGE
Lloh34:
	ldr	x21, [x21, _O2_SD_CLKREQ@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #8
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_29
; %bb.17:
	ldr	w8, [sp, #8]
	orr	w2, w8, #0x3
	str	w2, [sp, #8]
	ldr	x0, [x19]
	ldr	w1, [x21]
	bl	_pci_write_config_dword
	ldr	x0, [x19]
Lloh35:
	adrp	x21, _O2_SD_PLL_SETTING@GOTPAGE
Lloh36:
	ldr	x21, [x21, _O2_SD_PLL_SETTING@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #8
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_29
; %bb.18:
	ldr	w8, [sp, #8]
	mov	w9, #63729
	movk	w9, #57536, lsl #16
	and	w8, w8, w9
	mov	w9, #262
	movk	w9, #6183, lsl #16
	orr	w2, w8, w9
	str	w2, [sp, #8]
	ldr	x0, [x19]
	ldr	w1, [x21]
	bl	_pci_write_config_dword
	ldr	x0, [x19]
Lloh37:
	adrp	x21, _O2_SD_CAP_REG2@GOTPAGE
Lloh38:
	ldr	x21, [x21, _O2_SD_CAP_REG2@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #8
	bl	_pci_read_config_dword
	cbnz	w0, LBB0_29
; %bb.19:
	ldr	w8, [sp, #8]
	and	w2, w8, #0xffffff1f
	str	w2, [sp, #8]
	ldr	x0, [x19]
	ldr	w1, [x21]
	bl	_pci_write_config_dword
	ldr	x0, [x19]
	ldr	w8, [x0]
	cmp	w8, #132
	b.ne	LBB0_25
; %bb.20:
	mov	x0, x19
	bl	_sdhci_pci_o2_fujin2_pci_init
	b	LBB0_24
LBB0_21:
	mov	w9, #621805568
	orr	w2, w8, w9
	str	w2, [sp, #8]
	ldr	x0, [x19]
	ldr	w1, [x21]
	bl	_pci_write_config_dword
	ldr	x0, [x19]
Lloh39:
	adrp	x21, _O2_SD_FUNC_REG4@GOTPAGE
Lloh40:
	ldr	x21, [x21, _O2_SD_FUNC_REG4@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #8
	bl	_pci_read_config_dword
	ldr	w8, [sp, #8]
	orr	w2, w8, #0x400000
LBB0_22:
	str	w2, [sp, #8]
	ldr	x0, [x19]
	ldr	w1, [x21]
	bl	_pci_write_config_dword
	ldr	x0, [x19]
Lloh41:
	adrp	x8, _O2_SD_TUNING_CTRL@GOTPAGE
Lloh42:
	ldr	x8, [x8, _O2_SD_TUNING_CTRL@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
	mov	w2, #85
LBB0_23:
	bl	_pci_write_config_byte
LBB0_24:
	ldr	x0, [x19]
LBB0_25:
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pci_read_config_byte
	cbnz	w0, LBB0_29
; %bb.26:
	ldr	w8, [sp, #12]
	orr	w2, w8, #0x80
	str	w2, [sp, #12]
Lloh44:
	adrp	x8, _O2_SD_LOCK_WP@GOTPAGE
Lloh45:
	ldr	x8, [x8, _O2_SD_LOCK_WP@GOTPAGEOFF]
LBB0_27:
	ldr	x0, [x19]
	ldr	w1, [x8]
	bl	_pci_write_config_byte
LBB0_28:
	mov	w0, #0
LBB0_29:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh37, Lloh38
	.loh AdrpLdrGot	Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh44, Lloh45
	.cfi_endproc
                                        ; -- End function
	.comm	_O2_SD_LOCK_WP,4,2              ; @O2_SD_LOCK_WP
	.comm	_O2_SD_MULTI_VCC3V,4,2          ; @O2_SD_MULTI_VCC3V
	.comm	_O2_SD_CLKREQ,4,2               ; @O2_SD_CLKREQ
	.comm	_O2_SD_CAPS,4,2                 ; @O2_SD_CAPS
	.comm	_O2_SD_ADMA1,4,2                ; @O2_SD_ADMA1
	.comm	_O2_SD_ADMA2,4,2                ; @O2_SD_ADMA2
	.comm	_O2_SD_INF_MOD,4,2              ; @O2_SD_INF_MOD
	.comm	_O2_SD_FUNC_REG0,4,2            ; @O2_SD_FUNC_REG0
	.comm	_O2_SD_FUNC_REG4,4,2            ; @O2_SD_FUNC_REG4
	.comm	_O2_SD_FREG4_ENABLE_CLK_SET,4,2 ; @O2_SD_FREG4_ENABLE_CLK_SET
	.comm	_O2_SD_TUNING_CTRL,4,2          ; @O2_SD_TUNING_CTRL
	.comm	_O2_SD_CLK_SETTING,4,2          ; @O2_SD_CLK_SETTING
	.comm	_O2_SD_PLL_SETTING,4,2          ; @O2_SD_PLL_SETTING
	.comm	_O2_SD_CAP_REG2,4,2             ; @O2_SD_CAP_REG2
.subsections_via_symbols
