	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cobalt_pcie_status_show        ## -- Begin function cobalt_pcie_status_show
	.p2align	4, 0x90
_cobalt_pcie_status_show:               ## @cobalt_pcie_status_show
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %r14
	movq	(%r14), %rax
	movq	(%rax), %r13
	movq	%r14, %rdi
	callq	_pci_is_pcie
	testl	%eax, %eax
	je	LBB0_3
## %bb.1:
	movq	%r13, %rdi
	callq	_pci_is_pcie
	testl	%eax, %eax
	je	LBB0_3
## %bb.2:
	movq	_PCI_EXP_DEVCAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-44(%rbp), %rdx
	movq	%r14, %rdi
	callq	_pcie_capability_read_dword
	movq	_PCI_EXP_DEVCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-48(%rbp), %rdx
	movq	%r14, %rdi
	callq	_pcie_capability_read_word
	movq	_PCI_EXP_DEVSTA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-52(%rbp), %rbx
	movq	%r14, %rdi
	movq	%rbx, %rdx
	callq	_pcie_capability_read_word
	movl	-44(%rbp), %r15d
	movq	_PCI_EXP_DEVCAP_PAYLOAD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	%r15d, %edi
	callq	_get_payload_size
	leaq	L_.str(%rip), %rdi
	movl	%r15d, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_cobalt_info
	movl	-48(%rbp), %r15d
	movq	_PCI_EXP_DEVCTL_PAYLOAD@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	%r15d, %edi
	sarl	$5, %edi
	callq	_get_payload_size
	movl	%eax, %r12d
	movq	_PCI_EXP_DEVCTL_READRQ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	-48(%rbp), %edi
	sarl	$12, %edi
	callq	_get_payload_size
	leaq	L_.str.1(%rip), %rdi
	movl	%r15d, %esi
	movl	%r12d, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	_cobalt_info
	movl	-52(%rbp), %esi
	leaq	L_.str.2(%rip), %rdi
	xorl	%eax, %eax
	callq	_cobalt_info
	movq	_PCI_EXP_LNKCAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	leaq	-44(%rbp), %rdx
	movq	%rdx, %r15
	callq	_pcie_capability_read_dword
	movq	_PCI_EXP_LNKCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	leaq	-48(%rbp), %rdx
	callq	_pcie_capability_read_word
	movq	_PCI_EXP_LNKSTA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	callq	_pcie_capability_read_word
	movl	-44(%rbp), %ebx
	movl	%ebx, %edi
	callq	_get_link_speed
	movq	_PCI_EXP_LNKCAP_MLW@GOTPCREL(%rip), %r12
	movl	(%r12), %ecx
	andl	-44(%rbp), %ecx
	sarl	$4, %ecx
	leaq	L_.str.3(%rip), %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_cobalt_info
	movl	-48(%rbp), %esi
	leaq	L_.str.4(%rip), %rdi
	xorl	%eax, %eax
	callq	_cobalt_info
	movl	-52(%rbp), %ebx
	movl	%ebx, %edi
	callq	_get_link_speed
	movq	_PCI_EXP_LNKSTA_NLW@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	-52(%rbp), %ecx
	sarl	$4, %ecx
	leaq	L_.str.5(%rip), %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_cobalt_info
	movq	_PCI_EXP_LNKCAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r13, %rdi
	movq	%r15, %rdx
	callq	_pcie_capability_read_dword
	movl	-44(%rbp), %ebx
	movl	%ebx, %edi
	callq	_get_link_speed
	movl	(%r12), %ecx
	andl	-44(%rbp), %ecx
	sarl	$4, %ecx
	leaq	L_.str.6(%rip), %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_cobalt_info
	movq	_PCI_EXP_SLTCAP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	callq	_pcie_capability_read_dword
	movq	_PCI_EXP_SLTCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	leaq	-48(%rbp), %rdx
	callq	_pcie_capability_read_word
	movq	_PCI_EXP_SLTSTA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	leaq	-52(%rbp), %rdx
	callq	_pcie_capability_read_word
	movl	-44(%rbp), %esi
	leaq	L_.str.7(%rip), %rdi
	xorl	%eax, %eax
	callq	_cobalt_info
	movl	-48(%rbp), %esi
	leaq	L_.str.8(%rip), %rdi
	xorl	%eax, %eax
	callq	_cobalt_info
	movl	-52(%rbp), %esi
	leaq	L_.str.9(%rip), %rdi
	xorl	%eax, %eax
	callq	_cobalt_info
LBB0_3:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_EXP_DEVCAP,4,2             ## @PCI_EXP_DEVCAP
	.comm	_PCI_EXP_DEVCTL,4,2             ## @PCI_EXP_DEVCTL
	.comm	_PCI_EXP_DEVSTA,4,2             ## @PCI_EXP_DEVSTA
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"PCIe device capability 0x%08x: Max payload %d\n"

	.comm	_PCI_EXP_DEVCAP_PAYLOAD,4,2     ## @PCI_EXP_DEVCAP_PAYLOAD
L_.str.1:                               ## @.str.1
	.asciz	"PCIe device control 0x%04x: Max payload %d. Max read request %d\n"

	.comm	_PCI_EXP_DEVCTL_PAYLOAD,4,2     ## @PCI_EXP_DEVCTL_PAYLOAD
	.comm	_PCI_EXP_DEVCTL_READRQ,4,2      ## @PCI_EXP_DEVCTL_READRQ
L_.str.2:                               ## @.str.2
	.asciz	"PCIe device status 0x%04x\n"

	.comm	_PCI_EXP_LNKCAP,4,2             ## @PCI_EXP_LNKCAP
	.comm	_PCI_EXP_LNKCTL,4,2             ## @PCI_EXP_LNKCTL
	.comm	_PCI_EXP_LNKSTA,4,2             ## @PCI_EXP_LNKSTA
L_.str.3:                               ## @.str.3
	.asciz	"PCIe link capability 0x%08x: %s per lane and %u lanes\n"

	.comm	_PCI_EXP_LNKCAP_MLW,4,2         ## @PCI_EXP_LNKCAP_MLW
L_.str.4:                               ## @.str.4
	.asciz	"PCIe link control 0x%04x\n"

L_.str.5:                               ## @.str.5
	.asciz	"PCIe link status 0x%04x: %s per lane and %u lanes\n"

	.comm	_PCI_EXP_LNKSTA_NLW,4,2         ## @PCI_EXP_LNKSTA_NLW
L_.str.6:                               ## @.str.6
	.asciz	"PCIe bus link capability 0x%08x: %s per lane and %u lanes\n"

	.comm	_PCI_EXP_SLTCAP,4,2             ## @PCI_EXP_SLTCAP
	.comm	_PCI_EXP_SLTCTL,4,2             ## @PCI_EXP_SLTCTL
	.comm	_PCI_EXP_SLTSTA,4,2             ## @PCI_EXP_SLTSTA
L_.str.7:                               ## @.str.7
	.asciz	"PCIe slot capability 0x%08x\n"

L_.str.8:                               ## @.str.8
	.asciz	"PCIe slot control 0x%04x\n"

L_.str.9:                               ## @.str.9
	.asciz	"PCIe slot status 0x%04x\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_cobalt_pcie_status_show        ; -- Begin function cobalt_pcie_status_show
	.p2align	2
_cobalt_pcie_status_show:               ; @cobalt_pcie_status_show
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	ldr	x19, [x0]
	ldr	x8, [x19]
	ldr	x20, [x8]
	mov	x0, x19
	bl	_pci_is_pcie
	cbz	w0, LBB0_3
; %bb.1:
	mov	x0, x20
	bl	_pci_is_pcie
	cbz	w0, LBB0_3
; %bb.2:
Lloh0:
	adrp	x8, _PCI_EXP_DEVCAP@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_EXP_DEVCAP@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #28
	mov	x0, x19
	bl	_pcie_capability_read_dword
Lloh3:
	adrp	x8, _PCI_EXP_DEVCTL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PCI_EXP_DEVCTL@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	add	x2, sp, #20
	mov	x0, x19
	bl	_pcie_capability_read_word
Lloh6:
	adrp	x8, _PCI_EXP_DEVSTA@GOTPAGE
Lloh7:
	ldr	x8, [x8, _PCI_EXP_DEVSTA@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	add	x2, sp, #24
	mov	x0, x19
	bl	_pcie_capability_read_word
	ldr	w21, [sp, #28]
Lloh9:
	adrp	x8, _PCI_EXP_DEVCAP_PAYLOAD@GOTPAGE
Lloh10:
	ldr	x8, [x8, _PCI_EXP_DEVCAP_PAYLOAD@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	and	w0, w8, w21
	bl	_get_payload_size
                                        ; kill: def $w0 killed $w0 def $x0
	str	x0, [sp]
Lloh12:
	adrp	x0, l_.str@PAGE
Lloh13:
	add	x0, x0, l_.str@PAGEOFF
	mov	x1, x21
	bl	_cobalt_info
	ldr	w21, [sp, #20]
Lloh14:
	adrp	x8, _PCI_EXP_DEVCTL_PAYLOAD@GOTPAGE
Lloh15:
	ldr	x8, [x8, _PCI_EXP_DEVCTL_PAYLOAD@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	and	w8, w8, w21
	asr	w0, w8, #5
	bl	_get_payload_size
	mov	x22, x0
	ldr	w8, [sp, #20]
Lloh17:
	adrp	x9, _PCI_EXP_DEVCTL_READRQ@GOTPAGE
Lloh18:
	ldr	x9, [x9, _PCI_EXP_DEVCTL_READRQ@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	and	w8, w9, w8
	asr	w0, w8, #12
	bl	_get_payload_size
                                        ; kill: def $w0 killed $w0 def $x0
	stp	x22, x0, [sp]
Lloh20:
	adrp	x0, l_.str.1@PAGE
Lloh21:
	add	x0, x0, l_.str.1@PAGEOFF
	mov	x1, x21
	bl	_cobalt_info
	ldr	w1, [sp, #24]
Lloh22:
	adrp	x0, l_.str.2@PAGE
Lloh23:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_cobalt_info
Lloh24:
	adrp	x22, _PCI_EXP_LNKCAP@GOTPAGE
Lloh25:
	ldr	x22, [x22, _PCI_EXP_LNKCAP@GOTPAGEOFF]
	ldr	w1, [x22]
	add	x2, sp, #28
	mov	x0, x19
	bl	_pcie_capability_read_dword
Lloh26:
	adrp	x8, _PCI_EXP_LNKCTL@GOTPAGE
Lloh27:
	ldr	x8, [x8, _PCI_EXP_LNKCTL@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	add	x2, sp, #20
	mov	x0, x19
	bl	_pcie_capability_read_word
Lloh29:
	adrp	x8, _PCI_EXP_LNKSTA@GOTPAGE
Lloh30:
	ldr	x8, [x8, _PCI_EXP_LNKSTA@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	add	x2, sp, #24
	mov	x0, x19
	bl	_pcie_capability_read_word
	ldr	w21, [sp, #28]
	mov	x0, x21
	bl	_get_link_speed
                                        ; kill: def $w0 killed $w0 def $x0
	ldr	w8, [sp, #28]
Lloh32:
	adrp	x23, _PCI_EXP_LNKCAP_MLW@GOTPAGE
Lloh33:
	ldr	x23, [x23, _PCI_EXP_LNKCAP_MLW@GOTPAGEOFF]
	ldr	w9, [x23]
	and	w8, w9, w8
	asr	w8, w8, #4
	stp	x0, x8, [sp]
Lloh34:
	adrp	x0, l_.str.3@PAGE
Lloh35:
	add	x0, x0, l_.str.3@PAGEOFF
	mov	x1, x21
	bl	_cobalt_info
	ldr	w1, [sp, #20]
Lloh36:
	adrp	x0, l_.str.4@PAGE
Lloh37:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_cobalt_info
	ldr	w21, [sp, #24]
	mov	x0, x21
	bl	_get_link_speed
                                        ; kill: def $w0 killed $w0 def $x0
	ldr	w8, [sp, #24]
Lloh38:
	adrp	x9, _PCI_EXP_LNKSTA_NLW@GOTPAGE
Lloh39:
	ldr	x9, [x9, _PCI_EXP_LNKSTA_NLW@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	and	w8, w9, w8
	asr	w8, w8, #4
	stp	x0, x8, [sp]
Lloh41:
	adrp	x0, l_.str.5@PAGE
Lloh42:
	add	x0, x0, l_.str.5@PAGEOFF
	mov	x1, x21
	bl	_cobalt_info
	ldr	w1, [x22]
	add	x2, sp, #28
	mov	x0, x20
	bl	_pcie_capability_read_dword
	ldr	w20, [sp, #28]
	mov	x0, x20
	bl	_get_link_speed
                                        ; kill: def $w0 killed $w0 def $x0
	ldr	w8, [sp, #28]
	ldr	w9, [x23]
	and	w8, w9, w8
	asr	w8, w8, #4
	stp	x0, x8, [sp]
Lloh43:
	adrp	x0, l_.str.6@PAGE
Lloh44:
	add	x0, x0, l_.str.6@PAGEOFF
	mov	x1, x20
	bl	_cobalt_info
Lloh45:
	adrp	x8, _PCI_EXP_SLTCAP@GOTPAGE
Lloh46:
	ldr	x8, [x8, _PCI_EXP_SLTCAP@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	add	x2, sp, #28
	mov	x0, x19
	bl	_pcie_capability_read_dword
Lloh48:
	adrp	x8, _PCI_EXP_SLTCTL@GOTPAGE
Lloh49:
	ldr	x8, [x8, _PCI_EXP_SLTCTL@GOTPAGEOFF]
Lloh50:
	ldr	w1, [x8]
	add	x2, sp, #20
	mov	x0, x19
	bl	_pcie_capability_read_word
Lloh51:
	adrp	x8, _PCI_EXP_SLTSTA@GOTPAGE
Lloh52:
	ldr	x8, [x8, _PCI_EXP_SLTSTA@GOTPAGEOFF]
Lloh53:
	ldr	w1, [x8]
	add	x2, sp, #24
	mov	x0, x19
	bl	_pcie_capability_read_word
	ldr	w1, [sp, #28]
Lloh54:
	adrp	x0, l_.str.7@PAGE
Lloh55:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	_cobalt_info
	ldr	w1, [sp, #20]
Lloh56:
	adrp	x0, l_.str.8@PAGE
Lloh57:
	add	x0, x0, l_.str.8@PAGEOFF
	bl	_cobalt_info
	ldr	w1, [sp, #24]
Lloh58:
	adrp	x0, l_.str.9@PAGE
Lloh59:
	add	x0, x0, l_.str.9@PAGEOFF
	bl	_cobalt_info
LBB0_3:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpAdd	Lloh58, Lloh59
	.loh AdrpAdd	Lloh56, Lloh57
	.loh AdrpAdd	Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpAdd	Lloh43, Lloh44
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpAdd	Lloh34, Lloh35
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpAdd	Lloh22, Lloh23
	.loh AdrpAdd	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_EXP_DEVCAP,4,2             ; @PCI_EXP_DEVCAP
	.comm	_PCI_EXP_DEVCTL,4,2             ; @PCI_EXP_DEVCTL
	.comm	_PCI_EXP_DEVSTA,4,2             ; @PCI_EXP_DEVSTA
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"PCIe device capability 0x%08x: Max payload %d\n"

	.comm	_PCI_EXP_DEVCAP_PAYLOAD,4,2     ; @PCI_EXP_DEVCAP_PAYLOAD
l_.str.1:                               ; @.str.1
	.asciz	"PCIe device control 0x%04x: Max payload %d. Max read request %d\n"

	.comm	_PCI_EXP_DEVCTL_PAYLOAD,4,2     ; @PCI_EXP_DEVCTL_PAYLOAD
	.comm	_PCI_EXP_DEVCTL_READRQ,4,2      ; @PCI_EXP_DEVCTL_READRQ
l_.str.2:                               ; @.str.2
	.asciz	"PCIe device status 0x%04x\n"

	.comm	_PCI_EXP_LNKCAP,4,2             ; @PCI_EXP_LNKCAP
	.comm	_PCI_EXP_LNKCTL,4,2             ; @PCI_EXP_LNKCTL
	.comm	_PCI_EXP_LNKSTA,4,2             ; @PCI_EXP_LNKSTA
l_.str.3:                               ; @.str.3
	.asciz	"PCIe link capability 0x%08x: %s per lane and %u lanes\n"

	.comm	_PCI_EXP_LNKCAP_MLW,4,2         ; @PCI_EXP_LNKCAP_MLW
l_.str.4:                               ; @.str.4
	.asciz	"PCIe link control 0x%04x\n"

l_.str.5:                               ; @.str.5
	.asciz	"PCIe link status 0x%04x: %s per lane and %u lanes\n"

	.comm	_PCI_EXP_LNKSTA_NLW,4,2         ; @PCI_EXP_LNKSTA_NLW
l_.str.6:                               ; @.str.6
	.asciz	"PCIe bus link capability 0x%08x: %s per lane and %u lanes\n"

	.comm	_PCI_EXP_SLTCAP,4,2             ; @PCI_EXP_SLTCAP
	.comm	_PCI_EXP_SLTCTL,4,2             ; @PCI_EXP_SLTCTL
	.comm	_PCI_EXP_SLTSTA,4,2             ; @PCI_EXP_SLTSTA
l_.str.7:                               ; @.str.7
	.asciz	"PCIe slot capability 0x%08x\n"

l_.str.8:                               ; @.str.8
	.asciz	"PCIe slot control 0x%04x\n"

l_.str.9:                               ; @.str.9
	.asciz	"PCIe slot status 0x%04x\n"

.subsections_via_symbols
