	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_qib_pcie_reenable              ## -- Begin function qib_pcie_reenable
	.p2align	4, 0x90
_qib_pcie_reenable:                     ## @qib_pcie_reenable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%ecx, %r14d
	movl	%edx, %r15d
	movl	%esi, %r12d
	movq	%rdi, %rbx
	movq	_PCI_BASE_ADDRESS_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rdi), %edi
	movl	8(%rbx), %edx
	callq	_pci_write_config_dword
	testl	%eax, %eax
	je	LBB0_2
## %bb.1:
	leaq	L_.str(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_qib_dev_err
LBB0_2:
	movq	_PCI_BASE_ADDRESS_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %edi
	movl	4(%rbx), %edx
	callq	_pci_write_config_dword
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	leaq	L_.str.1(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, %edx
	callq	_qib_dev_err
LBB0_4:
	movl	(%rbx), %edi
	movq	_PCI_COMMAND@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r12d, %edx
	callq	_pci_write_config_word
	movl	(%rbx), %edi
	movq	_PCI_INTERRUPT_LINE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r15d, %edx
	callq	_pci_write_config_byte
	movl	(%rbx), %edi
	movq	_PCI_CACHE_LINE_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r14d, %edx
	callq	_pci_write_config_byte
	movl	(%rbx), %edi
	callq	_pci_enable_device
	testl	%eax, %eax
	je	LBB0_5
## %bb.6:
	leaq	L_.str.2(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, %edx
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_qib_dev_err                    ## TAILCALL
LBB0_5:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_BASE_ADDRESS_0,4,2         ## @PCI_BASE_ADDRESS_0
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"rewrite of BAR0 failed: %d\n"

	.comm	_PCI_BASE_ADDRESS_1,4,2         ## @PCI_BASE_ADDRESS_1
L_.str.1:                               ## @.str.1
	.asciz	"rewrite of BAR1 failed: %d\n"

	.comm	_PCI_COMMAND,4,2                ## @PCI_COMMAND
	.comm	_PCI_INTERRUPT_LINE,4,2         ## @PCI_INTERRUPT_LINE
	.comm	_PCI_CACHE_LINE_SIZE,4,2        ## @PCI_CACHE_LINE_SIZE
L_.str.2:                               ## @.str.2
	.asciz	"pci_enable_device failed after reset: %d\n"

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_qib_pcie_reenable              ; -- Begin function qib_pcie_reenable
	.p2align	2
_qib_pcie_reenable:                     ; @qib_pcie_reenable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x3
	mov	x21, x2
	mov	x22, x1
	mov	x19, x0
	ldr	w0, [x0]
Lloh0:
	adrp	x8, _PCI_BASE_ADDRESS_0@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PCI_BASE_ADDRESS_0@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	ldr	w2, [x19, #8]
	bl	_pci_write_config_dword
	cbz	w0, LBB0_2
; %bb.1:
	mov	x2, x0
Lloh3:
	adrp	x1, l_.str@PAGE
Lloh4:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_qib_dev_err
LBB0_2:
Lloh5:
	adrp	x8, _PCI_BASE_ADDRESS_1@GOTPAGE
Lloh6:
	ldr	x8, [x8, _PCI_BASE_ADDRESS_1@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
	ldp	w0, w2, [x19]
	bl	_pci_write_config_dword
	cbz	w0, LBB0_4
; %bb.3:
	mov	x2, x0
Lloh8:
	adrp	x1, l_.str.1@PAGE
Lloh9:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_qib_dev_err
LBB0_4:
	ldr	w0, [x19]
Lloh10:
	adrp	x8, _PCI_COMMAND@GOTPAGE
Lloh11:
	ldr	x8, [x8, _PCI_COMMAND@GOTPAGEOFF]
Lloh12:
	ldr	w1, [x8]
	mov	x2, x22
	bl	_pci_write_config_word
	ldr	w0, [x19]
Lloh13:
	adrp	x8, _PCI_INTERRUPT_LINE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PCI_INTERRUPT_LINE@GOTPAGEOFF]
Lloh15:
	ldr	w1, [x8]
	mov	x2, x21
	bl	_pci_write_config_byte
	ldr	w0, [x19]
Lloh16:
	adrp	x8, _PCI_CACHE_LINE_SIZE@GOTPAGE
Lloh17:
	ldr	x8, [x8, _PCI_CACHE_LINE_SIZE@GOTPAGEOFF]
Lloh18:
	ldr	w1, [x8]
	mov	x2, x20
	bl	_pci_write_config_byte
	ldr	w0, [x19]
	bl	_pci_enable_device
	cbz	w0, LBB0_6
; %bb.5:
	mov	x2, x0
Lloh19:
	adrp	x1, l_.str.2@PAGE
Lloh20:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_qib_dev_err
LBB0_6:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpAdd	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpAdd	Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_BASE_ADDRESS_0,4,2         ; @PCI_BASE_ADDRESS_0
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"rewrite of BAR0 failed: %d\n"

	.comm	_PCI_BASE_ADDRESS_1,4,2         ; @PCI_BASE_ADDRESS_1
l_.str.1:                               ; @.str.1
	.asciz	"rewrite of BAR1 failed: %d\n"

	.comm	_PCI_COMMAND,4,2                ; @PCI_COMMAND
	.comm	_PCI_INTERRUPT_LINE,4,2         ; @PCI_INTERRUPT_LINE
	.comm	_PCI_CACHE_LINE_SIZE,4,2        ; @PCI_CACHE_LINE_SIZE
l_.str.2:                               ; @.str.2
	.asciz	"pci_enable_device failed after reset: %d\n"

.subsections_via_symbols
