	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_attn_int_deasserted4
_bnx2x_attn_int_deasserted4:            ## @bnx2x_attn_int_deasserted4
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %r15d
	movq	%rdi, %r14
	movq	_AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT@GOTPCREL(%rip), %rax
	testl	%esi, (%rax)
	je	LBB0_19
## %bb.1:
	movq	_PGLUE_B_REG_PGLUE_B_INT_STS_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_REG_RD
	movl	%eax, %ebx
	leaq	L_.str(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
	movq	_PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_3
## %bb.2:
	leaq	L_.str.1(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_3:
	movq	_PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_5
## %bb.4:
	leaq	L_.str.2(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_5:
	movq	_PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_7
## %bb.6:
	leaq	L_.str.3(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_7:
	movq	_PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_9
## %bb.8:
	leaq	L_.str.4(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_9:
	movq	_PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_11
## %bb.10:
	leaq	L_.str.5(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_11:
	movq	_PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_13
## %bb.12:
	leaq	L_.str.6(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_13:
	movq	_PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_15
## %bb.14:
	leaq	L_.str.7(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_15:
	movq	_PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_17
## %bb.16:
	leaq	L_.str.8(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_17:
	movq	_PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_19
## %bb.18:
	leaq	L_.str.9(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_19:
	movq	_AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT@GOTPCREL(%rip), %rax
	testl	%r15d, (%rax)
	je	LBB0_32
## %bb.20:
	movq	_ATC_REG_ATC_INT_STS_CLR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_REG_RD
	movl	%eax, %ebx
	leaq	L_.str.10(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
	movq	_ATC_ATC_INT_STS_REG_ADDRESS_ERROR@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_22
## %bb.21:
	leaq	L_.str.11(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_22:
	movq	_ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_24
## %bb.23:
	leaq	L_.str.12(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_24:
	movq	_ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_26
## %bb.25:
	leaq	L_.str.13(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_26:
	movq	_ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_28
## %bb.27:
	leaq	L_.str.14(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_28:
	movq	_ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_30
## %bb.29:
	leaq	L_.str.15(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_30:
	movq	_ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_32
## %bb.31:
	leaq	L_.str.16(%rip), %rdi
	xorl	%eax, %eax
	callq	_BNX2X_ERR
LBB0_32:
	movq	_AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR@GOTPCREL(%rip), %rax
	movq	_AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %esi
	orl	(%rax), %esi
	andl	%r15d, %esi
	je	LBB0_33
## %bb.34:
	leaq	L_.str.17(%rip), %rdi
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_BNX2X_ERR                      ## TAILCALL
LBB0_33:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT,4,2 ## @AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT
	.comm	_PGLUE_B_REG_PGLUE_B_INT_STS_CLR,4,2 ## @PGLUE_B_REG_PGLUE_B_INT_STS_CLR
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"PGLUE hw attention 0x%x\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR,4,2 ## @PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR
L_.str.1:                               ## @.str.1
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR,4,2 ## @PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR
L_.str.2:                               ## @.str.2
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN,4,2 ## @PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN
L_.str.3:                               ## @.str.3
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN,4,2 ## @PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN
L_.str.4:                               ## @.str.4
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN,4,2 ## @PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN
L_.str.5:                               ## @.str.5
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN,4,2 ## @PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN
L_.str.6:                               ## @.str.6
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN,4,2 ## @PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN
L_.str.7:                               ## @.str.7
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN,4,2 ## @PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN
L_.str.8:                               ## @.str.8
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW,4,2 ## @PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW
L_.str.9:                               ## @.str.9
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW\n"

	.comm	_AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT,4,2 ## @AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT
	.comm	_ATC_REG_ATC_INT_STS_CLR,4,2    ## @ATC_REG_ATC_INT_STS_CLR
L_.str.10:                              ## @.str.10
	.asciz	"ATC hw attention 0x%x\n"

	.comm	_ATC_ATC_INT_STS_REG_ADDRESS_ERROR,4,2 ## @ATC_ATC_INT_STS_REG_ADDRESS_ERROR
L_.str.11:                              ## @.str.11
	.asciz	"ATC_ATC_INT_STS_REG_ADDRESS_ERROR\n"

	.comm	_ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND,4,2 ## @ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND
L_.str.12:                              ## @.str.12
	.asciz	"ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND\n"

	.comm	_ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS,4,2 ## @ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS
L_.str.13:                              ## @.str.13
	.asciz	"ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS\n"

	.comm	_ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT,4,2 ## @ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT
L_.str.14:                              ## @.str.14
	.asciz	"ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT\n"

	.comm	_ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR,4,2 ## @ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR
L_.str.15:                              ## @.str.15
	.asciz	"ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR\n"

	.comm	_ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU,4,2 ## @ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU
L_.str.16:                              ## @.str.16
	.asciz	"ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU\n"

	.comm	_AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR,4,2 ## @AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR
	.comm	_AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR,4,2 ## @AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR
L_.str.17:                              ## @.str.17
	.asciz	"FATAL parity attention set4 0x%x\n"

	.no_dead_strip	_bnx2x_attn_int_deasserted4
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_attn_int_deasserted4
_bnx2x_attn_int_deasserted4:            ; @bnx2x_attn_int_deasserted4
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT@GOTPAGE
Lloh1:
	ldr	x8, [x8, _AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	tst	w8, w1
	b.eq	LBB0_19
; %bb.1:
Lloh3:
	adrp	x8, _PGLUE_B_REG_PGLUE_B_INT_STS_CLR@GOTPAGE
Lloh4:
	ldr	x8, [x8, _PGLUE_B_REG_PGLUE_B_INT_STS_CLR@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_REG_RD
	mov	x21, x0
	str	x21, [sp]
Lloh6:
	adrp	x0, l_.str@PAGE
Lloh7:
	add	x0, x0, l_.str@PAGEOFF
	bl	_BNX2X_ERR
Lloh8:
	adrp	x8, _PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR@GOTPAGE
Lloh9:
	ldr	x8, [x8, _PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR@GOTPAGEOFF]
Lloh10:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_3
; %bb.2:
Lloh11:
	adrp	x0, l_.str.1@PAGE
Lloh12:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_BNX2X_ERR
LBB0_3:
Lloh13:
	adrp	x8, _PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR@GOTPAGE
Lloh14:
	ldr	x8, [x8, _PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR@GOTPAGEOFF]
Lloh15:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_5
; %bb.4:
Lloh16:
	adrp	x0, l_.str.2@PAGE
Lloh17:
	add	x0, x0, l_.str.2@PAGEOFF
	bl	_BNX2X_ERR
LBB0_5:
Lloh18:
	adrp	x8, _PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN@GOTPAGE
Lloh19:
	ldr	x8, [x8, _PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_7
; %bb.6:
Lloh21:
	adrp	x0, l_.str.3@PAGE
Lloh22:
	add	x0, x0, l_.str.3@PAGEOFF
	bl	_BNX2X_ERR
LBB0_7:
Lloh23:
	adrp	x8, _PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN@GOTPAGE
Lloh24:
	ldr	x8, [x8, _PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN@GOTPAGEOFF]
Lloh25:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_9
; %bb.8:
Lloh26:
	adrp	x0, l_.str.4@PAGE
Lloh27:
	add	x0, x0, l_.str.4@PAGEOFF
	bl	_BNX2X_ERR
LBB0_9:
Lloh28:
	adrp	x8, _PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN@GOTPAGE
Lloh29:
	ldr	x8, [x8, _PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_11
; %bb.10:
Lloh31:
	adrp	x0, l_.str.5@PAGE
Lloh32:
	add	x0, x0, l_.str.5@PAGEOFF
	bl	_BNX2X_ERR
LBB0_11:
Lloh33:
	adrp	x8, _PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN@GOTPAGE
Lloh34:
	ldr	x8, [x8, _PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_13
; %bb.12:
Lloh36:
	adrp	x0, l_.str.6@PAGE
Lloh37:
	add	x0, x0, l_.str.6@PAGEOFF
	bl	_BNX2X_ERR
LBB0_13:
Lloh38:
	adrp	x8, _PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN@GOTPAGE
Lloh39:
	ldr	x8, [x8, _PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_15
; %bb.14:
Lloh41:
	adrp	x0, l_.str.7@PAGE
Lloh42:
	add	x0, x0, l_.str.7@PAGEOFF
	bl	_BNX2X_ERR
LBB0_15:
Lloh43:
	adrp	x8, _PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN@GOTPAGE
Lloh44:
	ldr	x8, [x8, _PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN@GOTPAGEOFF]
Lloh45:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_17
; %bb.16:
Lloh46:
	adrp	x0, l_.str.8@PAGE
Lloh47:
	add	x0, x0, l_.str.8@PAGEOFF
	bl	_BNX2X_ERR
LBB0_17:
Lloh48:
	adrp	x8, _PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW@GOTPAGE
Lloh49:
	ldr	x8, [x8, _PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
	tst	w8, w21
	b.eq	LBB0_19
; %bb.18:
Lloh51:
	adrp	x0, l_.str.9@PAGE
Lloh52:
	add	x0, x0, l_.str.9@PAGEOFF
	bl	_BNX2X_ERR
LBB0_19:
Lloh53:
	adrp	x8, _AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT@GOTPAGE
Lloh54:
	ldr	x8, [x8, _AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT@GOTPAGEOFF]
Lloh55:
	ldr	w8, [x8]
	tst	w8, w19
	b.eq	LBB0_32
; %bb.20:
Lloh56:
	adrp	x8, _ATC_REG_ATC_INT_STS_CLR@GOTPAGE
Lloh57:
	ldr	x8, [x8, _ATC_REG_ATC_INT_STS_CLR@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
	mov	x0, x20
	bl	_REG_RD
	mov	x20, x0
	str	x20, [sp]
Lloh59:
	adrp	x0, l_.str.10@PAGE
Lloh60:
	add	x0, x0, l_.str.10@PAGEOFF
	bl	_BNX2X_ERR
Lloh61:
	adrp	x8, _ATC_ATC_INT_STS_REG_ADDRESS_ERROR@GOTPAGE
Lloh62:
	ldr	x8, [x8, _ATC_ATC_INT_STS_REG_ADDRESS_ERROR@GOTPAGEOFF]
Lloh63:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_22
; %bb.21:
Lloh64:
	adrp	x0, l_.str.11@PAGE
Lloh65:
	add	x0, x0, l_.str.11@PAGEOFF
	bl	_BNX2X_ERR
LBB0_22:
Lloh66:
	adrp	x8, _ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND@GOTPAGE
Lloh67:
	ldr	x8, [x8, _ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND@GOTPAGEOFF]
Lloh68:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_24
; %bb.23:
Lloh69:
	adrp	x0, l_.str.12@PAGE
Lloh70:
	add	x0, x0, l_.str.12@PAGEOFF
	bl	_BNX2X_ERR
LBB0_24:
Lloh71:
	adrp	x8, _ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS@GOTPAGE
Lloh72:
	ldr	x8, [x8, _ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS@GOTPAGEOFF]
Lloh73:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_26
; %bb.25:
Lloh74:
	adrp	x0, l_.str.13@PAGE
Lloh75:
	add	x0, x0, l_.str.13@PAGEOFF
	bl	_BNX2X_ERR
LBB0_26:
Lloh76:
	adrp	x8, _ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT@GOTPAGE
Lloh77:
	ldr	x8, [x8, _ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT@GOTPAGEOFF]
Lloh78:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_28
; %bb.27:
Lloh79:
	adrp	x0, l_.str.14@PAGE
Lloh80:
	add	x0, x0, l_.str.14@PAGEOFF
	bl	_BNX2X_ERR
LBB0_28:
Lloh81:
	adrp	x8, _ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR@GOTPAGE
Lloh82:
	ldr	x8, [x8, _ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR@GOTPAGEOFF]
Lloh83:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_30
; %bb.29:
Lloh84:
	adrp	x0, l_.str.15@PAGE
Lloh85:
	add	x0, x0, l_.str.15@PAGEOFF
	bl	_BNX2X_ERR
LBB0_30:
Lloh86:
	adrp	x8, _ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU@GOTPAGE
Lloh87:
	ldr	x8, [x8, _ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU@GOTPAGEOFF]
Lloh88:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_32
; %bb.31:
Lloh89:
	adrp	x0, l_.str.16@PAGE
Lloh90:
	add	x0, x0, l_.str.16@PAGEOFF
	bl	_BNX2X_ERR
LBB0_32:
Lloh91:
	adrp	x8, _AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR@GOTPAGE
Lloh92:
	ldr	x8, [x8, _AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR@GOTPAGEOFF]
Lloh93:
	ldr	w8, [x8]
Lloh94:
	adrp	x9, _AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR@GOTPAGE
Lloh95:
	ldr	x9, [x9, _AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR@GOTPAGEOFF]
Lloh96:
	ldr	w9, [x9]
	orr	w8, w9, w8
	ands	w8, w8, w19
	b.eq	LBB0_34
; %bb.33:
	str	x8, [sp]
Lloh97:
	adrp	x0, l_.str.17@PAGE
Lloh98:
	add	x0, x0, l_.str.17@PAGEOFF
	bl	_BNX2X_ERR
LBB0_34:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpAdd	Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpAdd	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpAdd	Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpAdd	Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpAdd	Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpAdd	Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpAdd	Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpAdd	Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpAdd	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpAdd	Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpAdd	Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpAdd	Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh78
	.loh AdrpAdd	Lloh79, Lloh80
	.loh AdrpLdrGotLdr	Lloh81, Lloh82, Lloh83
	.loh AdrpAdd	Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpAdd	Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpAdd	Lloh97, Lloh98
	.cfi_endproc
                                        ; -- End function
	.comm	_AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT,4,2 ; @AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT
	.comm	_PGLUE_B_REG_PGLUE_B_INT_STS_CLR,4,2 ; @PGLUE_B_REG_PGLUE_B_INT_STS_CLR
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"PGLUE hw attention 0x%x\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR,4,2 ; @PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR
l_.str.1:                               ; @.str.1
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR,4,2 ; @PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR
l_.str.2:                               ; @.str.2
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN,4,2 ; @PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN
l_.str.3:                               ; @.str.3
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN,4,2 ; @PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN
l_.str.4:                               ; @.str.4
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN,4,2 ; @PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN
l_.str.5:                               ; @.str.5
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN,4,2 ; @PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN
l_.str.6:                               ; @.str.6
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN,4,2 ; @PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN
l_.str.7:                               ; @.str.7
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN,4,2 ; @PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN
l_.str.8:                               ; @.str.8
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN\n"

	.comm	_PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW,4,2 ; @PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW
l_.str.9:                               ; @.str.9
	.asciz	"PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW\n"

	.comm	_AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT,4,2 ; @AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT
	.comm	_ATC_REG_ATC_INT_STS_CLR,4,2    ; @ATC_REG_ATC_INT_STS_CLR
l_.str.10:                              ; @.str.10
	.asciz	"ATC hw attention 0x%x\n"

	.comm	_ATC_ATC_INT_STS_REG_ADDRESS_ERROR,4,2 ; @ATC_ATC_INT_STS_REG_ADDRESS_ERROR
l_.str.11:                              ; @.str.11
	.asciz	"ATC_ATC_INT_STS_REG_ADDRESS_ERROR\n"

	.comm	_ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND,4,2 ; @ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND
l_.str.12:                              ; @.str.12
	.asciz	"ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND\n"

	.comm	_ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS,4,2 ; @ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS
l_.str.13:                              ; @.str.13
	.asciz	"ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS\n"

	.comm	_ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT,4,2 ; @ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT
l_.str.14:                              ; @.str.14
	.asciz	"ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT\n"

	.comm	_ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR,4,2 ; @ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR
l_.str.15:                              ; @.str.15
	.asciz	"ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR\n"

	.comm	_ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU,4,2 ; @ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU
l_.str.16:                              ; @.str.16
	.asciz	"ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU\n"

	.comm	_AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR,4,2 ; @AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR
	.comm	_AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR,4,2 ; @AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR
l_.str.17:                              ; @.str.17
	.asciz	"FATAL parity attention set4 0x%x\n"

	.no_dead_strip	_bnx2x_attn_int_deasserted4
.subsections_via_symbols
