	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function xtensa_mx_irq_unmask
_xtensa_mx_irq_unmask:                  ## @xtensa_mx_irq_unmask
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	(%rdi), %ecx
	movl	$1, %ebx
	shll	%cl, %ebx
	movq	_XCHAL_INTTYPE_MASK_EXTERN_EDGE@GOTPCREL(%rip), %rax
	movq	_XCHAL_INTTYPE_MASK_EXTERN_LEVEL@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rax), %edx
	btl	%ecx, %edx
	jae	LBB0_3
## %bb.1:
	movl	%ecx, %edi
	callq	_xtensa_get_ext_irq_no
	movq	_HW_IRQ_MX_BASE@GOTPCREL(%rip), %rcx
	subl	(%rcx), %eax
	jae	LBB0_2
LBB0_3:
	movq	_cached_irq_mask@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	callq	___this_cpu_read
	orl	%eax, %ebx
	movl	(%r14), %edi
	movl	%ebx, %esi
	callq	___this_cpu_write
	movq	_intenable@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_xtensa_set_sr                  ## TAILCALL
LBB0_2:
	movl	$1, %edi
	movl	%eax, %ecx
	shll	%cl, %edi
	movq	_MIENGSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_set_er                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_XCHAL_INTTYPE_MASK_EXTERN_EDGE,4,2 ## @XCHAL_INTTYPE_MASK_EXTERN_EDGE
	.comm	_XCHAL_INTTYPE_MASK_EXTERN_LEVEL,4,2 ## @XCHAL_INTTYPE_MASK_EXTERN_LEVEL
	.comm	_HW_IRQ_MX_BASE,4,2             ## @HW_IRQ_MX_BASE
	.comm	_MIENGSET,4,2                   ## @MIENGSET
	.comm	_cached_irq_mask,4,2            ## @cached_irq_mask
	.comm	_intenable,4,2                  ## @intenable
	.no_dead_strip	_xtensa_mx_irq_unmask
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function xtensa_mx_irq_unmask
_xtensa_mx_irq_unmask:                  ; @xtensa_mx_irq_unmask
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	ldr	w0, [x0]
	mov	w8, #1
	lsl	w19, w8, w0
Lloh0:
	adrp	x8, _XCHAL_INTTYPE_MASK_EXTERN_EDGE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _XCHAL_INTTYPE_MASK_EXTERN_EDGE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
Lloh3:
	adrp	x9, _XCHAL_INTTYPE_MASK_EXTERN_LEVEL@GOTPAGE
Lloh4:
	ldr	x9, [x9, _XCHAL_INTTYPE_MASK_EXTERN_LEVEL@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
	tst	w8, w19
	b.eq	LBB0_2
; %bb.1:
                                        ; kill: def $w0 killed $w0 killed $x0
	bl	_xtensa_get_ext_irq_no
Lloh6:
	adrp	x8, _HW_IRQ_MX_BASE@GOTPAGE
Lloh7:
	ldr	x8, [x8, _HW_IRQ_MX_BASE@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	subs	w8, w0, w8
	b.hs	LBB0_3
LBB0_2:
Lloh9:
	adrp	x20, _cached_irq_mask@GOTPAGE
Lloh10:
	ldr	x20, [x20, _cached_irq_mask@GOTPAGEOFF]
	ldr	w0, [x20]
	bl	___this_cpu_read
	orr	w19, w0, w19
	ldr	w0, [x20]
	mov	x1, x19
	bl	___this_cpu_write
Lloh11:
	adrp	x8, _intenable@GOTPAGE
Lloh12:
	ldr	x8, [x8, _intenable@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x19
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_xtensa_set_sr
LBB0_3:
	mov	w9, #1
	lsl	w0, w9, w8
Lloh14:
	adrp	x8, _MIENGSET@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MIENGSET@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_set_er
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_XCHAL_INTTYPE_MASK_EXTERN_EDGE,4,2 ; @XCHAL_INTTYPE_MASK_EXTERN_EDGE
	.comm	_XCHAL_INTTYPE_MASK_EXTERN_LEVEL,4,2 ; @XCHAL_INTTYPE_MASK_EXTERN_LEVEL
	.comm	_HW_IRQ_MX_BASE,4,2             ; @HW_IRQ_MX_BASE
	.comm	_MIENGSET,4,2                   ; @MIENGSET
	.comm	_cached_irq_mask,4,2            ; @cached_irq_mask
	.comm	_intenable,4,2                  ; @intenable
	.no_dead_strip	_xtensa_mx_irq_unmask
.subsections_via_symbols
