	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_fimc_hw_set_input_addr         ## -- Begin function fimc_hw_set_input_addr
	.p2align	4, 0x90
_fimc_hw_set_input_addr:                ## @fimc_hw_set_input_addr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r13
	movq	_FIMC_REG_CIREAL_ISIZE@GOTPCREL(%rip), %rax
	movq	(%rax), %rdi
	movq	%rax, %rbx
	addq	(%r13), %rdi
	callq	_readl
	movl	%eax, %r14d
	movq	_FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS@GOTPCREL(%rip), %rax
	orl	(%rax), %r14d
	movq	(%rbx), %rsi
	addq	(%r13), %rsi
	movl	%r14d, %edi
	callq	_writel
	movl	8(%r15), %r12d
	movq	(%r13), %rbx
	xorl	%edi, %edi
	callq	_FIMC_REG_CIIYSA
	addq	%rax, %rbx
	movl	%r12d, %edi
	movq	%rbx, %rsi
	callq	_writel
	movl	4(%r15), %r12d
	movq	(%r13), %rbx
	xorl	%edi, %edi
	callq	_FIMC_REG_CIICBSA
	addq	%rax, %rbx
	movl	%r12d, %edi
	movq	%rbx, %rsi
	callq	_writel
	movl	(%r15), %r15d
	movq	(%r13), %rbx
	xorl	%edi, %edi
	callq	_FIMC_REG_CIICRSA
	addq	%rax, %rbx
	movl	%r15d, %edi
	movq	%rbx, %rsi
	callq	_writel
	movq	_FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	notl	%edi
	andl	%r14d, %edi
	movq	_FIMC_REG_CIREAL_ISIZE@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	addq	(%r13), %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_writel                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_FIMC_REG_CIREAL_ISIZE,8,3      ## @FIMC_REG_CIREAL_ISIZE
	.comm	_FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS,4,2 ## @FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_fimc_hw_set_input_addr         ; -- Begin function fimc_hw_set_input_addr
	.p2align	2
_fimc_hw_set_input_addr:                ; @fimc_hw_set_input_addr
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x1
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x23, _FIMC_REG_CIREAL_ISIZE@GOTPAGE
Lloh1:
	ldr	x23, [x23, _FIMC_REG_CIREAL_ISIZE@GOTPAGEOFF]
	ldr	x9, [x23]
	add	x0, x9, x8
	bl	_readl
Lloh2:
	adrp	x24, _FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS@GOTPAGE
Lloh3:
	ldr	x24, [x24, _FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS@GOTPAGEOFF]
	ldr	w8, [x24]
	orr	w21, w8, w0
	ldr	x8, [x19]
	ldr	x9, [x23]
	add	x1, x9, x8
	mov	x0, x21
	bl	_writel
	ldr	w22, [x20, #8]
	ldr	x25, [x19]
	mov	w0, #0
	bl	_FIMC_REG_CIIYSA
	add	x1, x0, x25
	mov	x0, x22
	bl	_writel
	ldr	w22, [x20, #4]
	ldr	x25, [x19]
	mov	w0, #0
	bl	_FIMC_REG_CIICBSA
	add	x1, x0, x25
	mov	x0, x22
	bl	_writel
	ldr	w20, [x20]
	ldr	x22, [x19]
	mov	w0, #0
	bl	_FIMC_REG_CIICRSA
	add	x1, x0, x22
	mov	x0, x20
	bl	_writel
	ldr	w8, [x24]
	bic	w0, w21, w8
	ldr	x8, [x19]
	ldr	x9, [x23]
	add	x1, x9, x8
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_writel
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_FIMC_REG_CIREAL_ISIZE,8,3      ; @FIMC_REG_CIREAL_ISIZE
	.comm	_FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS,4,2 ; @FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS
.subsections_via_symbols
