	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function goya_pci_bars_map
_goya_pci_bars_map:                     ## @goya_pci_bars_map
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -16(%rbp)
	movl	l___const.goya_pci_bars_map.is_wc+8(%rip), %eax
	movl	%eax, -24(%rbp)
	movq	l___const.goya_pci_bars_map.is_wc(%rip), %rax
	movq	%rax, -32(%rbp)
	leaq	_goya_pci_bars_map.name(%rip), %rsi
	leaq	-32(%rbp), %rdx
	callq	_hl_pci_bars_map
	testl	%eax, %eax
	jne	LBB0_2
## %bb.1:
	movq	(%rbx), %rcx
	movq	_SRAM_CFG_BAR_ID@GOTPCREL(%rip), %rdx
	movq	(%rdx), %rdx
	movq	_CFG_BASE@GOTPCREL(%rip), %rsi
	movq	(%rsi), %rsi
	addq	(%rcx,%rdx,8), %rsi
	movq	_SRAM_BASE_ADDR@GOTPCREL(%rip), %rcx
	subq	(%rcx), %rsi
	movq	%rsi, 8(%rbx)
LBB0_2:
	movq	___stack_chk_guard@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	cmpq	-16(%rbp), %rcx
	jne	LBB0_4
## %bb.3:
	addq	$24, %rsp
	popq	%rbx
	popq	%rbp
	retq
LBB0_4:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.section	__DATA,__const
	.p2align	4                               ## @goya_pci_bars_map.name
_goya_pci_bars_map.name:
	.quad	L_.str
	.quad	L_.str.1
	.quad	L_.str.2

	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"SRAM_CFG"

L_.str.1:                               ## @.str.1
	.asciz	"MSIX"

L_.str.2:                               ## @.str.2
	.asciz	"DDR"

	.section	__TEXT,__const
	.p2align	2                               ## @__const.goya_pci_bars_map.is_wc
l___const.goya_pci_bars_map.is_wc:
	.long	0                               ## 0x0
	.long	0                               ## 0x0
	.long	1                               ## 0x1

	.comm	_SRAM_CFG_BAR_ID,8,3            ## @SRAM_CFG_BAR_ID
	.comm	_CFG_BASE,8,3                   ## @CFG_BASE
	.comm	_SRAM_BASE_ADDR,8,3             ## @SRAM_BASE_ADDR
	.no_dead_strip	_goya_pci_bars_map
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function goya_pci_bars_map
_goya_pci_bars_map:                     ; @goya_pci_bars_map
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #24]
Lloh3:
	adrp	x8, l___const.goya_pci_bars_map.is_wc@PAGE
Lloh4:
	add	x8, x8, l___const.goya_pci_bars_map.is_wc@PAGEOFF
	ldr	x9, [x8]
	str	x9, [sp, #8]
	ldr	w8, [x8, #8]
	str	w8, [sp, #16]
Lloh5:
	adrp	x1, _goya_pci_bars_map.name@PAGE
Lloh6:
	add	x1, x1, _goya_pci_bars_map.name@PAGEOFF
	add	x2, sp, #8
	bl	_hl_pci_bars_map
	cbnz	w0, LBB0_2
; %bb.1:
	ldr	x8, [x19]
Lloh7:
	adrp	x9, _SRAM_CFG_BAR_ID@GOTPAGE
Lloh8:
	ldr	x9, [x9, _SRAM_CFG_BAR_ID@GOTPAGEOFF]
Lloh9:
	ldr	x9, [x9]
	ldr	x8, [x8, x9, lsl #3]
Lloh10:
	adrp	x9, _CFG_BASE@GOTPAGE
Lloh11:
	ldr	x9, [x9, _CFG_BASE@GOTPAGEOFF]
Lloh12:
	ldr	x9, [x9]
Lloh13:
	adrp	x10, _SRAM_BASE_ADDR@GOTPAGE
Lloh14:
	ldr	x10, [x10, _SRAM_BASE_ADDR@GOTPAGEOFF]
Lloh15:
	ldr	x10, [x10]
	add	x8, x9, x8
	sub	x8, x8, x10
	str	x8, [x19, #8]
LBB0_2:
	ldr	x8, [sp, #24]
Lloh16:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh17:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh18:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_4
; %bb.3:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
LBB0_4:
	bl	___stack_chk_fail
	.loh AdrpAdd	Lloh5, Lloh6
	.loh AdrpAdd	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.cfi_endproc
                                        ; -- End function
	.section	__DATA,__const
	.p2align	3                               ; @goya_pci_bars_map.name
_goya_pci_bars_map.name:
	.quad	l_.str
	.quad	l_.str.1
	.quad	l_.str.2

	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"SRAM_CFG"

l_.str.1:                               ; @.str.1
	.asciz	"MSIX"

l_.str.2:                               ; @.str.2
	.asciz	"DDR"

	.section	__TEXT,__const
	.p2align	2                               ; @__const.goya_pci_bars_map.is_wc
l___const.goya_pci_bars_map.is_wc:
	.long	0                               ; 0x0
	.long	0                               ; 0x0
	.long	1                               ; 0x1

	.comm	_SRAM_CFG_BAR_ID,8,3            ; @SRAM_CFG_BAR_ID
	.comm	_CFG_BASE,8,3                   ; @CFG_BASE
	.comm	_SRAM_BASE_ADDR,8,3             ; @SRAM_BASE_ADDR
	.no_dead_strip	_goya_pci_bars_map
.subsections_via_symbols
