	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_tune_pcie_caps                 ## -- Begin function tune_pcie_caps
	.p2align	4, 0x90
_tune_pcie_caps:                        ## @tune_pcie_caps
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	(%rdi), %rdi
	movq	_PCI_EXP_DEVCTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	leaq	-44(%rbp), %rdx
	callq	_pcie_capability_read_word
	testl	%eax, %eax
	jne	LBB0_4
## %bb.1:
	movq	_PCI_EXP_DEVCTL_EXT_TAG@GOTPCREL(%rip), %r15
	movl	(%r15), %eax
	testl	%eax, -44(%rbp)
	jne	LBB0_4
## %bb.2:
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	callq	_dd_dev_info
	movl	-44(%rbp), %edx
	orl	(%r15), %edx
	movl	%edx, -44(%rbp)
	movq	(%r14), %rdi
	movl	(%rbx), %esi
	callq	_pcie_capability_write_word
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	leaq	L_.str.1(%rip), %rsi
	movq	%r14, %rdi
	callq	_dd_dev_info
LBB0_4:
	movq	(%r14), %rax
	movq	8(%rax), %rax
	movq	(%rax), %r12
	testq	%r12, %r12
	je	LBB0_5
## %bb.7:
	movq	8(%r12), %rdi
	callq	_pci_is_root_bus
	testl	%eax, %eax
	je	LBB0_8
## %bb.9:
	movq	%r12, %rdi
	callq	_pci_is_pcie
	testl	%eax, %eax
	je	LBB0_10
## %bb.11:
	movq	(%r14), %rdi
	callq	_pci_is_pcie
	testl	%eax, %eax
	je	LBB0_12
## %bb.13:
	movl	(%r12), %ebx
	movq	%r12, %rdi
	callq	_pcie_get_mps
	bsfl	%eax, %r15d
	movl	$-1, %eax
	cmovel	%eax, %r15d
	addl	$-7, %r15d
	movq	(%r14), %rdi
	movl	(%rdi), %r13d
	callq	_pcie_get_mps
	bsfl	%eax, %ecx
	movl	$-1, %eax
	cmovel	%eax, %ecx
	addl	$-7, %ecx
	cmpl	%r13d, %ebx
	cmovll	%ebx, %r13d
	movq	_hfi1_pcie_caps@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	andl	$7, %ebx
	cmpl	%ebx, %r13d
	cmovll	%r13d, %ebx
	cmpl	%r15d, %ebx
	jle	LBB0_15
## %bb.14:
	movl	$128, %esi
	movl	%ecx, %r15d
	movl	%ebx, %ecx
	shll	%cl, %esi
	movq	%r12, %rdi
	callq	_pcie_set_mps
	movl	%r15d, %ecx
LBB0_15:
	cmpl	%ecx, %ebx
	jle	LBB0_17
## %bb.16:
	movq	(%r14), %rdi
	movl	$128, %esi
	movl	%ebx, %ecx
	shll	%cl, %esi
	callq	_pcie_set_mps
LBB0_17:
	movq	_hfi1_pcie_caps@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	shrl	$4, %eax
	andl	$7, %eax
	cmpl	$5, %eax
	movl	$5, %ecx
	cmovbl	%eax, %ecx
	movl	$128, %r15d
                                        ## kill: def $cl killed $cl killed $ecx
	shll	%cl, %r15d
	movq	%r12, %rdi
	callq	_pcie_get_readrq
	movl	%eax, %ebx
	movq	(%r14), %rdi
	callq	_pcie_get_readrq
	movl	%eax, %r13d
	cmpl	%ebx, %r15d
	jle	LBB0_19
## %bb.18:
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_pcie_set_readrq
LBB0_19:
	cmpl	%r13d, %r15d
	jle	LBB0_21
## %bb.20:
	movq	(%r14), %rdi
	movl	%r15d, %esi
	callq	_pcie_set_readrq
	jmp	LBB0_21
LBB0_5:
	leaq	L_.str.2(%rip), %rsi
	jmp	LBB0_6
LBB0_8:
	leaq	L_.str.3(%rip), %rsi
	jmp	LBB0_6
LBB0_10:
	leaq	L_.str.4(%rip), %rsi
	jmp	LBB0_6
LBB0_12:
	leaq	L_.str.5(%rip), %rsi
LBB0_6:
	movq	%r14, %rdi
	callq	_dd_dev_info
LBB0_21:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_EXP_DEVCTL,4,2             ## @PCI_EXP_DEVCTL
	.comm	_PCI_EXP_DEVCTL_EXT_TAG,4,2     ## @PCI_EXP_DEVCTL_EXT_TAG
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Enabling PCIe extended tags\n"

L_.str.1:                               ## @.str.1
	.asciz	"Unable to write to PCI config\n"

L_.str.2:                               ## @.str.2
	.asciz	"Parent not found\n"

L_.str.3:                               ## @.str.3
	.asciz	"Parent not root\n"

L_.str.4:                               ## @.str.4
	.asciz	"Parent is not PCI Express capable\n"

L_.str.5:                               ## @.str.5
	.asciz	"PCI device is not PCI Express capable\n"

	.comm	_hfi1_pcie_caps,4,2             ## @hfi1_pcie_caps
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_tune_pcie_caps                 ; -- Begin function tune_pcie_caps
	.p2align	2
_tune_pcie_caps:                        ; @tune_pcie_caps
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x19, x0
	ldr	x0, [x0]
Lloh0:
	adrp	x20, _PCI_EXP_DEVCTL@GOTPAGE
Lloh1:
	ldr	x20, [x20, _PCI_EXP_DEVCTL@GOTPAGEOFF]
	ldr	w1, [x20]
	add	x2, sp, #12
	bl	_pcie_capability_read_word
	cbnz	w0, LBB0_4
; %bb.1:
	ldr	w8, [sp, #12]
Lloh2:
	adrp	x21, _PCI_EXP_DEVCTL_EXT_TAG@GOTPAGE
Lloh3:
	ldr	x21, [x21, _PCI_EXP_DEVCTL_EXT_TAG@GOTPAGEOFF]
	ldr	w9, [x21]
	tst	w9, w8
	b.ne	LBB0_4
; %bb.2:
Lloh4:
	adrp	x1, l_.str@PAGE
Lloh5:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_dd_dev_info
	ldr	w8, [x21]
	ldr	w9, [sp, #12]
	orr	w2, w9, w8
	str	w2, [sp, #12]
	ldr	x0, [x19]
	ldr	w1, [x20]
	bl	_pcie_capability_write_word
	cbz	w0, LBB0_4
; %bb.3:
Lloh6:
	adrp	x1, l_.str.1@PAGE
Lloh7:
	add	x1, x1, l_.str.1@PAGEOFF
	mov	x0, x19
	bl	_dd_dev_info
LBB0_4:
	ldr	x8, [x19]
	ldr	x8, [x8, #8]
	ldr	x20, [x8]
	cbz	x20, LBB0_16
; %bb.5:
	ldr	x0, [x20, #8]
	bl	_pci_is_root_bus
	cbz	w0, LBB0_17
; %bb.6:
	mov	x0, x20
	bl	_pci_is_pcie
	cbz	w0, LBB0_18
; %bb.7:
	ldr	x0, [x19]
	bl	_pci_is_pcie
	cbz	w0, LBB0_19
; %bb.8:
	ldr	w23, [x20]
	mov	x0, x20
	bl	_pcie_get_mps
	rbit	w8, w0
	clz	w8, w8
	sub	w8, w8, #7
	mov	w21, #-8
	cmp	w0, #0
	csel	w24, w21, w8, eq
	ldr	x0, [x19]
	ldr	w25, [x0]
	bl	_pcie_get_mps
	rbit	w8, w0
	clz	w8, w8
	sub	w8, w8, #7
	cmp	w0, #0
	csel	w22, w21, w8, eq
Lloh8:
	adrp	x21, _hfi1_pcie_caps@GOTPAGE
Lloh9:
	ldr	x21, [x21, _hfi1_pcie_caps@GOTPAGEOFF]
	cmp	w23, w25
	csel	w8, w23, w25, lt
	ldr	w9, [x21]
	and	w9, w9, #0x7
	cmp	w8, w9
	csel	w23, w8, w9, lt
	cmp	w23, w24
	b.le	LBB0_10
; %bb.9:
	mov	w8, #128
	lsl	w1, w8, w23
	mov	x0, x20
	bl	_pcie_set_mps
LBB0_10:
	cmp	w23, w22
	b.le	LBB0_12
; %bb.11:
	ldr	x0, [x19]
	mov	w8, #128
	lsl	w1, w8, w23
	bl	_pcie_set_mps
LBB0_12:
	ldr	w8, [x21]
	ubfx	w8, w8, #4, #3
	mov	w9, #5
	cmp	w8, #5
	csel	w8, w8, w9, lo
	mov	w9, #128
	lsl	w21, w9, w8
	mov	x0, x20
	bl	_pcie_get_readrq
	mov	x23, x0
	ldr	x0, [x19]
	bl	_pcie_get_readrq
	mov	x22, x0
	cmp	w21, w23
	b.le	LBB0_14
; %bb.13:
	mov	x0, x20
	mov	x1, x21
	bl	_pcie_set_readrq
LBB0_14:
	cmp	w21, w22
	b.le	LBB0_21
; %bb.15:
	ldr	x0, [x19]
	mov	x1, x21
	bl	_pcie_set_readrq
	b	LBB0_21
LBB0_16:
Lloh10:
	adrp	x1, l_.str.2@PAGE
Lloh11:
	add	x1, x1, l_.str.2@PAGEOFF
	b	LBB0_20
LBB0_17:
Lloh12:
	adrp	x1, l_.str.3@PAGE
Lloh13:
	add	x1, x1, l_.str.3@PAGEOFF
	b	LBB0_20
LBB0_18:
Lloh14:
	adrp	x1, l_.str.4@PAGE
Lloh15:
	add	x1, x1, l_.str.4@PAGEOFF
	b	LBB0_20
LBB0_19:
Lloh16:
	adrp	x1, l_.str.5@PAGE
Lloh17:
	add	x1, x1, l_.str.5@PAGEOFF
LBB0_20:
	mov	x0, x19
	bl	_dd_dev_info
LBB0_21:
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpAdd	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_EXP_DEVCTL,4,2             ; @PCI_EXP_DEVCTL
	.comm	_PCI_EXP_DEVCTL_EXT_TAG,4,2     ; @PCI_EXP_DEVCTL_EXT_TAG
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Enabling PCIe extended tags\n"

l_.str.1:                               ; @.str.1
	.asciz	"Unable to write to PCI config\n"

l_.str.2:                               ; @.str.2
	.asciz	"Parent not found\n"

l_.str.3:                               ; @.str.3
	.asciz	"Parent not root\n"

l_.str.4:                               ; @.str.4
	.asciz	"Parent is not PCI Express capable\n"

l_.str.5:                               ; @.str.5
	.asciz	"PCI device is not PCI Express capable\n"

	.comm	_hfi1_pcie_caps,4,2             ; @hfi1_pcie_caps
.subsections_via_symbols
