	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gru_chiplet_cpu_to_mmr
_gru_chiplet_cpu_to_mmr:                ## @gru_chiplet_cpu_to_mmr
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, -48(%rbp)                 ## 8-byte Spill
	movl	%esi, %ebx
	movl	%edi, %r15d
	movl	%esi, %edi
	callq	_uv_cpu_core_number
	movl	%eax, %r13d
	movq	_UV_MAX_INT_CORES@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movl	%ebx, %edi
	callq	_uv_cpu_socket_number
	movl	%eax, %r12d
	imull	%r14d, %r12d
	addl	%r13d, %r12d
	movq	_GRU_NUM_TFM@GOTPCREL(%rip), %rax
	cmpl	(%rax), %r12d
	jge	LBB0_3
## %bb.1:
	movl	%ebx, %edi
	callq	_uv_cpu_ht_number
	testq	%rax, %rax
	je	LBB0_4
LBB0_3:
	xorl	%r15d, %r15d
LBB0_11:
	movq	%r15, %rax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_4:
	cmpl	$1, %r15d
	je	LBB0_7
## %bb.5:
	testl	%r15d, %r15d
	jne	LBB0_9
## %bb.6:
	movq	_UVH_GR0_TLB_INT0_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_UVH_GR0_TLB_INT1_CONFIG@GOTPCREL(%rip), %rcx
	jmp	LBB0_8
LBB0_7:
	movq	_UVH_GR1_TLB_INT0_CONFIG@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_UVH_GR1_TLB_INT1_CONFIG@GOTPCREL(%rip), %rcx
LBB0_8:
	movl	(%rcx), %ecx
	subl	%eax, %ecx
	imull	%r12d, %ecx
	addl	%eax, %ecx
	movslq	%ecx, %r15
	jmp	LBB0_10
LBB0_9:
	xorl	%r15d, %r15d
	xorl	%eax, %eax
	callq	_BUG
LBB0_10:
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	movl	%r12d, (%rax)
	jmp	LBB0_11
	.cfi_endproc
                                        ## -- End function
	.comm	_UV_MAX_INT_CORES,4,2           ## @UV_MAX_INT_CORES
	.comm	_GRU_NUM_TFM,4,2                ## @GRU_NUM_TFM
	.comm	_UVH_GR0_TLB_INT0_CONFIG,4,2    ## @UVH_GR0_TLB_INT0_CONFIG
	.comm	_UVH_GR0_TLB_INT1_CONFIG,4,2    ## @UVH_GR0_TLB_INT1_CONFIG
	.comm	_UVH_GR1_TLB_INT0_CONFIG,4,2    ## @UVH_GR1_TLB_INT0_CONFIG
	.comm	_UVH_GR1_TLB_INT1_CONFIG,4,2    ## @UVH_GR1_TLB_INT1_CONFIG
	.no_dead_strip	_gru_chiplet_cpu_to_mmr
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gru_chiplet_cpu_to_mmr
_gru_chiplet_cpu_to_mmr:                ; @gru_chiplet_cpu_to_mmr
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x2
	mov	x21, x1
	mov	x20, x0
	mov	x0, x1
	bl	_uv_cpu_core_number
	mov	x22, x0
Lloh0:
	adrp	x8, _UV_MAX_INT_CORES@GOTPAGE
Lloh1:
	ldr	x8, [x8, _UV_MAX_INT_CORES@GOTPAGEOFF]
Lloh2:
	ldr	w23, [x8]
	mov	x0, x21
	bl	_uv_cpu_socket_number
	madd	w22, w0, w23, w22
Lloh3:
	adrp	x8, _GRU_NUM_TFM@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GRU_NUM_TFM@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w22, w8
	b.ge	LBB0_2
; %bb.1:
	mov	x0, x21
	bl	_uv_cpu_ht_number
	cbz	x0, LBB0_4
LBB0_2:
	mov	x0, #0
LBB0_3:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_4:
	cmp	w20, #1
	b.eq	LBB0_7
; %bb.5:
	cbnz	w20, LBB0_9
; %bb.6:
Lloh6:
	adrp	x8, _UVH_GR0_TLB_INT0_CONFIG@GOTPAGE
Lloh7:
	ldr	x8, [x8, _UVH_GR0_TLB_INT0_CONFIG@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
Lloh9:
	adrp	x9, _UVH_GR0_TLB_INT1_CONFIG@GOTPAGE
Lloh10:
	ldr	x9, [x9, _UVH_GR0_TLB_INT1_CONFIG@GOTPAGEOFF]
	b	LBB0_8
LBB0_7:
Lloh11:
	adrp	x8, _UVH_GR1_TLB_INT0_CONFIG@GOTPAGE
Lloh12:
	ldr	x8, [x8, _UVH_GR1_TLB_INT0_CONFIG@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
Lloh14:
	adrp	x9, _UVH_GR1_TLB_INT1_CONFIG@GOTPAGE
Lloh15:
	ldr	x9, [x9, _UVH_GR1_TLB_INT1_CONFIG@GOTPAGEOFF]
LBB0_8:
	ldr	w9, [x9]
	sub	w9, w9, w8
	madd	w8, w9, w22, w8
	sxtw	x0, w8
	b	LBB0_10
LBB0_9:
	bl	_BUG
	mov	x0, #0
LBB0_10:
	str	w22, [x19]
	b	LBB0_3
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_UV_MAX_INT_CORES,4,2           ; @UV_MAX_INT_CORES
	.comm	_GRU_NUM_TFM,4,2                ; @GRU_NUM_TFM
	.comm	_UVH_GR0_TLB_INT0_CONFIG,4,2    ; @UVH_GR0_TLB_INT0_CONFIG
	.comm	_UVH_GR0_TLB_INT1_CONFIG,4,2    ; @UVH_GR0_TLB_INT1_CONFIG
	.comm	_UVH_GR1_TLB_INT0_CONFIG,4,2    ; @UVH_GR1_TLB_INT0_CONFIG
	.comm	_UVH_GR1_TLB_INT1_CONFIG,4,2    ; @UVH_GR1_TLB_INT1_CONFIG
	.no_dead_strip	_gru_chiplet_cpu_to_mmr
.subsections_via_symbols
