	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function socrates_nand_cmd_ctrl
_socrates_nand_cmd_ctrl:                ## @socrates_nand_cmd_ctrl
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%edx, %ebx
	movl	%esi, %r14d
	callq	_nand_get_controller_data
	movq	_NAND_CMD_NONE@GOTPCREL(%rip), %rcx
	cmpl	%r14d, (%rcx)
	jne	LBB0_1
## %bb.7:
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_1:
	movq	_NAND_CLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%ebx, %ecx
	jne	LBB0_2
## %bb.3:
	movq	_FPGA_NAND_CMD_ADDR@GOTPCREL(%rip), %rdx
	jmp	LBB0_4
LBB0_2:
	movq	_FPGA_NAND_CMD_COMMAND@GOTPCREL(%rip), %rdx
LBB0_4:
	movq	_NAND_NCE@GOTPCREL(%rip), %rcx
	andl	(%rcx), %ebx
	je	LBB0_6
## %bb.5:
	movq	_FPGA_NAND_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
LBB0_6:
	movq	_FPGA_NAND_DATA_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movzbl	%r14b, %esi
	shll	%cl, %esi
	orl	(%rdx), %ebx
	orl	%ebx, %esi
	movl	(%rax), %edi
	popq	%rbx
	popq	%r14
	popq	%rbp
	jmp	_out_be32                       ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_NAND_CMD_NONE,4,2              ## @NAND_CMD_NONE
	.comm	_NAND_CLE,4,2                   ## @NAND_CLE
	.comm	_FPGA_NAND_CMD_COMMAND,4,2      ## @FPGA_NAND_CMD_COMMAND
	.comm	_FPGA_NAND_CMD_ADDR,4,2         ## @FPGA_NAND_CMD_ADDR
	.comm	_NAND_NCE,4,2                   ## @NAND_NCE
	.comm	_FPGA_NAND_ENABLE,4,2           ## @FPGA_NAND_ENABLE
	.comm	_FPGA_NAND_DATA_SHIFT,4,2       ## @FPGA_NAND_DATA_SHIFT
	.no_dead_strip	_socrates_nand_cmd_ctrl
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function socrates_nand_cmd_ctrl
_socrates_nand_cmd_ctrl:                ; @socrates_nand_cmd_ctrl
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x20, x2
	mov	x19, x1
	bl	_nand_get_controller_data
Lloh0:
	adrp	x8, _NAND_CMD_NONE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NAND_CMD_NONE@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	cmp	w8, w19
	b.ne	LBB0_2
; %bb.1:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
LBB0_2:
Lloh3:
	adrp	x8, _NAND_CLE@GOTPAGE
Lloh4:
	ldr	x8, [x8, _NAND_CLE@GOTPAGEOFF]
Lloh5:
	adrp	x9, _FPGA_NAND_CMD_ADDR@GOTPAGE
Lloh6:
	ldr	x9, [x9, _FPGA_NAND_CMD_ADDR@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
Lloh8:
	adrp	x10, _FPGA_NAND_CMD_COMMAND@GOTPAGE
Lloh9:
	ldr	x10, [x10, _FPGA_NAND_CMD_COMMAND@GOTPAGEOFF]
	tst	w8, w20
	csel	x8, x9, x10, eq
	ldr	w8, [x8]
Lloh10:
	adrp	x9, _NAND_NCE@GOTPAGE
Lloh11:
	ldr	x9, [x9, _NAND_NCE@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
Lloh13:
	adrp	x10, _FPGA_NAND_ENABLE@GOTPAGE
Lloh14:
	ldr	x10, [x10, _FPGA_NAND_ENABLE@GOTPAGEOFF]
Lloh15:
	ldr	w10, [x10]
	tst	w9, w20
	csel	w9, wzr, w10, eq
	orr	w8, w9, w8
	and	w9, w19, #0xff
Lloh16:
	adrp	x10, _FPGA_NAND_DATA_SHIFT@GOTPAGE
Lloh17:
	ldr	x10, [x10, _FPGA_NAND_DATA_SHIFT@GOTPAGEOFF]
Lloh18:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w1, w8, w9
	ldr	w0, [x0]
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_out_be32
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh7
	.cfi_endproc
                                        ; -- End function
	.comm	_NAND_CMD_NONE,4,2              ; @NAND_CMD_NONE
	.comm	_NAND_CLE,4,2                   ; @NAND_CLE
	.comm	_FPGA_NAND_CMD_COMMAND,4,2      ; @FPGA_NAND_CMD_COMMAND
	.comm	_FPGA_NAND_CMD_ADDR,4,2         ; @FPGA_NAND_CMD_ADDR
	.comm	_NAND_NCE,4,2                   ; @NAND_NCE
	.comm	_FPGA_NAND_ENABLE,4,2           ; @FPGA_NAND_ENABLE
	.comm	_FPGA_NAND_DATA_SHIFT,4,2       ; @FPGA_NAND_DATA_SHIFT
	.no_dead_strip	_socrates_nand_cmd_ctrl
.subsections_via_symbols
