	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function fintek_cir_ldev_init
_fintek_cir_ldev_init:                  ## @fintek_cir_ldev_init
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -24
	movq	%rdi, %rbx
	movl	12(%rdi), %esi
	callq	_fintek_select_logical_dev
	movq	_LOGICAL_DEV_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CIR_CR_DEV_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_fintek_cr_write
	movl	(%rbx), %esi
	sarl	$8, %esi
	movq	_CIR_CR_BASE_ADDR_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_fintek_cr_write
	movzbl	(%rbx), %esi
	movq	_CIR_CR_BASE_ADDR_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_fintek_cr_write
	movl	4(%rbx), %esi
	movq	_CIR_CR_IRQ_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	_fintek_cr_write
	movl	(%rbx), %esi
	movl	4(%rbx), %edx
	movl	8(%rbx), %ecx
	leaq	L_.str(%rip), %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%rbp
	jmp	_fit_dbg                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_LOGICAL_DEV_ENABLE,4,2         ## @LOGICAL_DEV_ENABLE
	.comm	_CIR_CR_DEV_EN,4,2              ## @CIR_CR_DEV_EN
	.comm	_CIR_CR_BASE_ADDR_HI,4,2        ## @CIR_CR_BASE_ADDR_HI
	.comm	_CIR_CR_BASE_ADDR_LO,4,2        ## @CIR_CR_BASE_ADDR_LO
	.comm	_CIR_CR_IRQ_SEL,4,2             ## @CIR_CR_IRQ_SEL
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"CIR initialized, base io address: 0x%lx, irq: %d (len: %d)"

	.no_dead_strip	_fintek_cir_ldev_init
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function fintek_cir_ldev_init
_fintek_cir_ldev_init:                  ; @fintek_cir_ldev_init
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	w1, [x0, #12]
	bl	_fintek_select_logical_dev
Lloh0:
	adrp	x8, _LOGICAL_DEV_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _LOGICAL_DEV_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _CIR_CR_DEV_EN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _CIR_CR_DEV_EN@GOTPAGEOFF]
Lloh5:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_fintek_cr_write
	ldr	w8, [x19]
	asr	w1, w8, #8
Lloh6:
	adrp	x8, _CIR_CR_BASE_ADDR_HI@GOTPAGE
Lloh7:
	ldr	x8, [x8, _CIR_CR_BASE_ADDR_HI@GOTPAGEOFF]
Lloh8:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_fintek_cr_write
	ldrb	w1, [x19]
Lloh9:
	adrp	x8, _CIR_CR_BASE_ADDR_LO@GOTPAGE
Lloh10:
	ldr	x8, [x8, _CIR_CR_BASE_ADDR_LO@GOTPAGEOFF]
Lloh11:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_fintek_cr_write
	ldr	w1, [x19, #4]
Lloh12:
	adrp	x8, _CIR_CR_IRQ_SEL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _CIR_CR_IRQ_SEL@GOTPAGEOFF]
Lloh14:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_fintek_cr_write
	ldp	w1, w2, [x19]
	ldr	w3, [x19, #8]
Lloh15:
	adrp	x0, l_.str@PAGE
Lloh16:
	add	x0, x0, l_.str@PAGEOFF
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	b	_fit_dbg
	.loh AdrpAdd	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_LOGICAL_DEV_ENABLE,4,2         ; @LOGICAL_DEV_ENABLE
	.comm	_CIR_CR_DEV_EN,4,2              ; @CIR_CR_DEV_EN
	.comm	_CIR_CR_BASE_ADDR_HI,4,2        ; @CIR_CR_BASE_ADDR_HI
	.comm	_CIR_CR_BASE_ADDR_LO,4,2        ; @CIR_CR_BASE_ADDR_LO
	.comm	_CIR_CR_IRQ_SEL,4,2             ; @CIR_CR_IRQ_SEL
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"CIR initialized, base io address: 0x%lx, irq: %d (len: %d)"

	.no_dead_strip	_fintek_cir_ldev_init
.subsections_via_symbols
