	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ib_wr_opcode_to_pvrdma
_ib_wr_opcode_to_pvrdma:                ## @ib_wr_opcode_to_pvrdma
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	addl	$-128, %edi
	cmpl	$14, %edi
	ja	LBB0_1
## %bb.2:
	movslq	%edi, %rax
	leaq	l_switch.table.ib_wr_opcode_to_pvrdma(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	jmp	LBB0_3
LBB0_1:
	movq	_PVRDMA_WR_ERROR@GOTPCREL(%rip), %rax
LBB0_3:
	movl	(%rax), %eax
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PVRDMA_WR_RDMA_WRITE,4,2       ## @PVRDMA_WR_RDMA_WRITE
	.comm	_PVRDMA_WR_RDMA_WRITE_WITH_IMM,4,2 ## @PVRDMA_WR_RDMA_WRITE_WITH_IMM
	.comm	_PVRDMA_WR_SEND,4,2             ## @PVRDMA_WR_SEND
	.comm	_PVRDMA_WR_SEND_WITH_IMM,4,2    ## @PVRDMA_WR_SEND_WITH_IMM
	.comm	_PVRDMA_WR_RDMA_READ,4,2        ## @PVRDMA_WR_RDMA_READ
	.comm	_PVRDMA_WR_ATOMIC_CMP_AND_SWP,4,2 ## @PVRDMA_WR_ATOMIC_CMP_AND_SWP
	.comm	_PVRDMA_WR_ATOMIC_FETCH_AND_ADD,4,2 ## @PVRDMA_WR_ATOMIC_FETCH_AND_ADD
	.comm	_PVRDMA_WR_LSO,4,2              ## @PVRDMA_WR_LSO
	.comm	_PVRDMA_WR_SEND_WITH_INV,4,2    ## @PVRDMA_WR_SEND_WITH_INV
	.comm	_PVRDMA_WR_RDMA_READ_WITH_INV,4,2 ## @PVRDMA_WR_RDMA_READ_WITH_INV
	.comm	_PVRDMA_WR_LOCAL_INV,4,2        ## @PVRDMA_WR_LOCAL_INV
	.comm	_PVRDMA_WR_FAST_REG_MR,4,2      ## @PVRDMA_WR_FAST_REG_MR
	.comm	_PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP,4,2 ## @PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP
	.comm	_PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD,4,2 ## @PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD
	.comm	_PVRDMA_WR_REG_SIG_MR,4,2       ## @PVRDMA_WR_REG_SIG_MR
	.comm	_PVRDMA_WR_ERROR,4,2            ## @PVRDMA_WR_ERROR
	.no_dead_strip	_ib_wr_opcode_to_pvrdma
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.ib_wr_opcode_to_pvrdma
l_switch.table.ib_wr_opcode_to_pvrdma:
	.quad	_PVRDMA_WR_SEND_WITH_INV
	.quad	_PVRDMA_WR_SEND_WITH_IMM
	.quad	_PVRDMA_WR_SEND
	.quad	_PVRDMA_WR_REG_SIG_MR
	.quad	_PVRDMA_WR_FAST_REG_MR
	.quad	_PVRDMA_WR_RDMA_WRITE_WITH_IMM
	.quad	_PVRDMA_WR_RDMA_WRITE
	.quad	_PVRDMA_WR_RDMA_READ_WITH_INV
	.quad	_PVRDMA_WR_RDMA_READ
	.quad	_PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD
	.quad	_PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP
	.quad	_PVRDMA_WR_LSO
	.quad	_PVRDMA_WR_LOCAL_INV
	.quad	_PVRDMA_WR_ATOMIC_FETCH_AND_ADD
	.quad	_PVRDMA_WR_ATOMIC_CMP_AND_SWP

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ib_wr_opcode_to_pvrdma
_ib_wr_opcode_to_pvrdma:                ; @ib_wr_opcode_to_pvrdma
	.cfi_startproc
; %bb.0:
	sub	w8, w0, #128
	cmp	w8, #14
	b.hi	LBB0_2
; %bb.1:
Lloh0:
	adrp	x9, l_switch.table.ib_wr_opcode_to_pvrdma@PAGE
Lloh1:
	add	x9, x9, l_switch.table.ib_wr_opcode_to_pvrdma@PAGEOFF
	ldr	x8, [x9, w8, sxtw #3]
	ldr	w0, [x8]
	ret
LBB0_2:
Lloh2:
	adrp	x8, _PVRDMA_WR_ERROR@GOTPAGE
Lloh3:
	ldr	x8, [x8, _PVRDMA_WR_ERROR@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_PVRDMA_WR_RDMA_WRITE,4,2       ; @PVRDMA_WR_RDMA_WRITE
	.comm	_PVRDMA_WR_RDMA_WRITE_WITH_IMM,4,2 ; @PVRDMA_WR_RDMA_WRITE_WITH_IMM
	.comm	_PVRDMA_WR_SEND,4,2             ; @PVRDMA_WR_SEND
	.comm	_PVRDMA_WR_SEND_WITH_IMM,4,2    ; @PVRDMA_WR_SEND_WITH_IMM
	.comm	_PVRDMA_WR_RDMA_READ,4,2        ; @PVRDMA_WR_RDMA_READ
	.comm	_PVRDMA_WR_ATOMIC_CMP_AND_SWP,4,2 ; @PVRDMA_WR_ATOMIC_CMP_AND_SWP
	.comm	_PVRDMA_WR_ATOMIC_FETCH_AND_ADD,4,2 ; @PVRDMA_WR_ATOMIC_FETCH_AND_ADD
	.comm	_PVRDMA_WR_LSO,4,2              ; @PVRDMA_WR_LSO
	.comm	_PVRDMA_WR_SEND_WITH_INV,4,2    ; @PVRDMA_WR_SEND_WITH_INV
	.comm	_PVRDMA_WR_RDMA_READ_WITH_INV,4,2 ; @PVRDMA_WR_RDMA_READ_WITH_INV
	.comm	_PVRDMA_WR_LOCAL_INV,4,2        ; @PVRDMA_WR_LOCAL_INV
	.comm	_PVRDMA_WR_FAST_REG_MR,4,2      ; @PVRDMA_WR_FAST_REG_MR
	.comm	_PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP,4,2 ; @PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP
	.comm	_PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD,4,2 ; @PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD
	.comm	_PVRDMA_WR_REG_SIG_MR,4,2       ; @PVRDMA_WR_REG_SIG_MR
	.comm	_PVRDMA_WR_ERROR,4,2            ; @PVRDMA_WR_ERROR
	.no_dead_strip	_ib_wr_opcode_to_pvrdma
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.ib_wr_opcode_to_pvrdma
l_switch.table.ib_wr_opcode_to_pvrdma:
	.quad	_PVRDMA_WR_SEND_WITH_INV
	.quad	_PVRDMA_WR_SEND_WITH_IMM
	.quad	_PVRDMA_WR_SEND
	.quad	_PVRDMA_WR_REG_SIG_MR
	.quad	_PVRDMA_WR_FAST_REG_MR
	.quad	_PVRDMA_WR_RDMA_WRITE_WITH_IMM
	.quad	_PVRDMA_WR_RDMA_WRITE
	.quad	_PVRDMA_WR_RDMA_READ_WITH_INV
	.quad	_PVRDMA_WR_RDMA_READ
	.quad	_PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD
	.quad	_PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP
	.quad	_PVRDMA_WR_LSO
	.quad	_PVRDMA_WR_LOCAL_INV
	.quad	_PVRDMA_WR_ATOMIC_FETCH_AND_ADD
	.quad	_PVRDMA_WR_ATOMIC_CMP_AND_SWP

.subsections_via_symbols
