	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function set_dsiescclk_rate
_set_dsiescclk_rate:                    ## @set_dsiescclk_rate
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	_PRCMU_TVCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_clock_rate
	movl	%eax, %edi
	movq	%rbx, %rsi
	callq	_clock_divider
	movl	%eax, %r15d
	movq	_PRCM_DSITVCLK_DIV@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	callq	_readl
	movq	_dsiescclk@GOTPCREL(%rip), %r13
	movq	(%r13), %rcx
	movl	(%rcx,%r14,8), %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	%r15d, %edi
	movl	$255, %esi
	callq	_min
	movq	(%r13), %rcx
	movb	4(%rcx,%r14,8), %cl
	shll	%cl, %eax
	orl	%eax, %ebx
	movl	(%r12), %esi
	movl	%ebx, %edi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_writel                         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_PRCMU_TVCLK,4,2                ## @PRCMU_TVCLK
	.comm	_PRCM_DSITVCLK_DIV,4,2          ## @PRCM_DSITVCLK_DIV
	.comm	_dsiescclk,8,3                  ## @dsiescclk
	.no_dead_strip	_set_dsiescclk_rate
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function set_dsiescclk_rate
_set_dsiescclk_rate:                    ; @set_dsiescclk_rate
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x8, _PRCMU_TVCLK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _PRCMU_TVCLK@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_clock_rate
	mov	x1, x19
	bl	_clock_divider
	mov	x19, x0
Lloh3:
	adrp	x21, _PRCM_DSITVCLK_DIV@GOTPAGE
Lloh4:
	ldr	x21, [x21, _PRCM_DSITVCLK_DIV@GOTPAGEOFF]
	ldr	w0, [x21]
	bl	_readl
Lloh5:
	adrp	x22, _dsiescclk@GOTPAGE
Lloh6:
	ldr	x22, [x22, _dsiescclk@GOTPAGEOFF]
	ldr	x8, [x22]
	lsl	x20, x20, #3
	ldr	w8, [x8, x20]
	bic	w23, w0, w8
	mov	x0, x19
	mov	w1, #255
	bl	_min
	ldr	x8, [x22]
	add	x8, x8, x20
	ldr	w8, [x8, #4]
	lsl	w8, w0, w8
	orr	w0, w8, w23
	ldr	w1, [x21]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_writel
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_PRCMU_TVCLK,4,2                ; @PRCMU_TVCLK
	.comm	_PRCM_DSITVCLK_DIV,4,2          ; @PRCM_DSITVCLK_DIV
	.comm	_dsiescclk,8,3                  ; @dsiescclk
	.no_dead_strip	_set_dsiescclk_rate
.subsections_via_symbols
