	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function get_core_cap_flags
_get_core_cap_flags:                    ## @get_core_cap_flags
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %rbx
	callq	_to_mdev
	movq	%rax, %r13
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_mlx5_ib_port_link_layer
	movl	%eax, %ebx
	movl	(%r13), %edi
	movq	_l3_type@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MLX5_CAP_ROCE
	movl	%eax, %r15d
	movl	(%r13), %edi
	movq	_roce_version@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_MLX5_CAP_ROCE
	movl	%eax, %r14d
	movl	(%r13), %edi
	callq	_mlx5_core_mp_enabled
	movl	%eax, %ecx
	xorl	%edx, %edx
	cmpq	$0, (%r12)
	je	LBB0_2
## %bb.1:
	movq	_RDMA_CORE_CAP_IB_GRH_REQUIRED@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
LBB0_2:
	movq	_IB_LINK_LAYER_INFINIBAND@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ebx
	jne	LBB0_4
## %bb.3:
	movq	_RDMA_CORE_PORT_IBA_IB@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	%edx, %eax
	jmp	LBB0_13
LBB0_4:
	xorl	%eax, %eax
	testl	%ecx, %ecx
	jne	LBB0_6
## %bb.5:
	movq	_RDMA_CORE_PORT_RAW_PACKET@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
LBB0_6:
	orl	%edx, %eax
	movq	_MLX5_ROCE_L3_TYPE_IPV4_CAP@GOTPCREL(%rip), %rcx
	testl	%r15d, (%rcx)
	je	LBB0_13
## %bb.7:
	movq	_MLX5_ROCE_L3_TYPE_IPV6_CAP@GOTPCREL(%rip), %rcx
	testl	%r15d, (%rcx)
	je	LBB0_13
## %bb.8:
	movq	_MLX5_ROCE_VERSION_1_CAP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	andl	%r14d, %ecx
	je	LBB0_10
## %bb.9:
	movq	_RDMA_CORE_PORT_IBA_ROCE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
LBB0_10:
	orl	%eax, %ecx
	movq	_MLX5_ROCE_VERSION_2_CAP@GOTPCREL(%rip), %rax
	andl	(%rax), %r14d
	je	LBB0_12
## %bb.11:
	movq	_RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
LBB0_12:
	orl	%r14d, %ecx
	movl	%ecx, %eax
LBB0_13:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_l3_type,4,2                    ## @l3_type
	.comm	_roce_version,4,2               ## @roce_version
	.comm	_RDMA_CORE_CAP_IB_GRH_REQUIRED,4,2 ## @RDMA_CORE_CAP_IB_GRH_REQUIRED
	.comm	_IB_LINK_LAYER_INFINIBAND,4,2   ## @IB_LINK_LAYER_INFINIBAND
	.comm	_RDMA_CORE_PORT_IBA_IB,4,2      ## @RDMA_CORE_PORT_IBA_IB
	.comm	_RDMA_CORE_PORT_RAW_PACKET,4,2  ## @RDMA_CORE_PORT_RAW_PACKET
	.comm	_MLX5_ROCE_L3_TYPE_IPV4_CAP,4,2 ## @MLX5_ROCE_L3_TYPE_IPV4_CAP
	.comm	_MLX5_ROCE_L3_TYPE_IPV6_CAP,4,2 ## @MLX5_ROCE_L3_TYPE_IPV6_CAP
	.comm	_MLX5_ROCE_VERSION_1_CAP,4,2    ## @MLX5_ROCE_VERSION_1_CAP
	.comm	_RDMA_CORE_PORT_IBA_ROCE,4,2    ## @RDMA_CORE_PORT_IBA_ROCE
	.comm	_MLX5_ROCE_VERSION_2_CAP,4,2    ## @MLX5_ROCE_VERSION_2_CAP
	.comm	_RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP,4,2 ## @RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP
	.no_dead_strip	_get_core_cap_flags
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function get_core_cap_flags
_get_core_cap_flags:                    ; @get_core_cap_flags
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x1
	mov	x19, x0
	bl	_to_mdev
	mov	x22, x0
	mov	x0, x19
	mov	w1, #1
	bl	_mlx5_ib_port_link_layer
	mov	x23, x0
	ldr	w0, [x22]
Lloh0:
	adrp	x8, _l3_type@GOTPAGE
Lloh1:
	ldr	x8, [x8, _l3_type@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_MLX5_CAP_ROCE
	mov	x20, x0
	ldr	w0, [x22]
Lloh3:
	adrp	x8, _roce_version@GOTPAGE
Lloh4:
	ldr	x8, [x8, _roce_version@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	bl	_MLX5_CAP_ROCE
	mov	x19, x0
	ldr	w0, [x22]
	bl	_mlx5_core_mp_enabled
	ldr	x8, [x21]
Lloh6:
	adrp	x9, _RDMA_CORE_CAP_IB_GRH_REQUIRED@GOTPAGE
Lloh7:
	ldr	x9, [x9, _RDMA_CORE_CAP_IB_GRH_REQUIRED@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	cmp	x8, #0
	csel	w8, wzr, w9, eq
Lloh9:
	adrp	x9, _IB_LINK_LAYER_INFINIBAND@GOTPAGE
Lloh10:
	ldr	x9, [x9, _IB_LINK_LAYER_INFINIBAND@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	cmp	w23, w9
	b.ne	LBB0_2
; %bb.1:
Lloh12:
	adrp	x9, _RDMA_CORE_PORT_IBA_IB@GOTPAGE
Lloh13:
	ldr	x9, [x9, _RDMA_CORE_PORT_IBA_IB@GOTPAGEOFF]
Lloh14:
	ldr	w9, [x9]
	orr	w0, w9, w8
	b	LBB0_5
LBB0_2:
Lloh15:
	adrp	x9, _RDMA_CORE_PORT_RAW_PACKET@GOTPAGE
Lloh16:
	ldr	x9, [x9, _RDMA_CORE_PORT_RAW_PACKET@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	cmp	w0, #0
	csel	w9, w9, wzr, eq
	orr	w0, w9, w8
Lloh18:
	adrp	x8, _MLX5_ROCE_L3_TYPE_IPV4_CAP@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MLX5_ROCE_L3_TYPE_IPV4_CAP@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_5
; %bb.3:
Lloh21:
	adrp	x8, _MLX5_ROCE_L3_TYPE_IPV6_CAP@GOTPAGE
Lloh22:
	ldr	x8, [x8, _MLX5_ROCE_L3_TYPE_IPV6_CAP@GOTPAGEOFF]
Lloh23:
	ldr	w8, [x8]
	tst	w8, w20
	b.eq	LBB0_5
; %bb.4:
Lloh24:
	adrp	x8, _MLX5_ROCE_VERSION_1_CAP@GOTPAGE
Lloh25:
	ldr	x8, [x8, _MLX5_ROCE_VERSION_1_CAP@GOTPAGEOFF]
Lloh26:
	ldr	w8, [x8]
Lloh27:
	adrp	x9, _RDMA_CORE_PORT_IBA_ROCE@GOTPAGE
Lloh28:
	ldr	x9, [x9, _RDMA_CORE_PORT_IBA_ROCE@GOTPAGEOFF]
Lloh29:
	ldr	w9, [x9]
	tst	w8, w19
	csel	w8, wzr, w9, eq
	orr	w8, w8, w0
Lloh30:
	adrp	x9, _MLX5_ROCE_VERSION_2_CAP@GOTPAGE
Lloh31:
	ldr	x9, [x9, _MLX5_ROCE_VERSION_2_CAP@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
Lloh33:
	adrp	x10, _RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP@GOTPAGE
Lloh34:
	ldr	x10, [x10, _RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP@GOTPAGEOFF]
Lloh35:
	ldr	w10, [x10]
	tst	w9, w19
	csel	w9, wzr, w10, eq
	orr	w0, w8, w9
LBB0_5:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.cfi_endproc
                                        ; -- End function
	.comm	_l3_type,4,2                    ; @l3_type
	.comm	_roce_version,4,2               ; @roce_version
	.comm	_RDMA_CORE_CAP_IB_GRH_REQUIRED,4,2 ; @RDMA_CORE_CAP_IB_GRH_REQUIRED
	.comm	_IB_LINK_LAYER_INFINIBAND,4,2   ; @IB_LINK_LAYER_INFINIBAND
	.comm	_RDMA_CORE_PORT_IBA_IB,4,2      ; @RDMA_CORE_PORT_IBA_IB
	.comm	_RDMA_CORE_PORT_RAW_PACKET,4,2  ; @RDMA_CORE_PORT_RAW_PACKET
	.comm	_MLX5_ROCE_L3_TYPE_IPV4_CAP,4,2 ; @MLX5_ROCE_L3_TYPE_IPV4_CAP
	.comm	_MLX5_ROCE_L3_TYPE_IPV6_CAP,4,2 ; @MLX5_ROCE_L3_TYPE_IPV6_CAP
	.comm	_MLX5_ROCE_VERSION_1_CAP,4,2    ; @MLX5_ROCE_VERSION_1_CAP
	.comm	_RDMA_CORE_PORT_IBA_ROCE,4,2    ; @RDMA_CORE_PORT_IBA_ROCE
	.comm	_MLX5_ROCE_VERSION_2_CAP,4,2    ; @MLX5_ROCE_VERSION_2_CAP
	.comm	_RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP,4,2 ; @RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP
	.no_dead_strip	_get_core_cap_flags
.subsections_via_symbols
