	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function gswip_port_enable
_gswip_port_enable:                     ## @gswip_port_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdx, %rbx
	movl	%esi, %r12d
	movq	%rdi, %r14
	movq	(%rdi), %r15
	callq	_dsa_is_user_port
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movq	%rbx, -48(%rbp)                 ## 8-byte Spill
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_dsa_is_cpu_port
	testl	%eax, %eax
	je	LBB0_3
LBB0_4:
	movq	_GSWIP_BM_PCFG_CNTEN@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movl	%r12d, %edi
	callq	_GSWIP_BM_PCFGp
	movq	%r15, %rdi
	movl	%r13d, %esi
	movl	%eax, %edx
	callq	_gswip_switch_w
	movq	_GSWIP_FDMA_PCTRL_EN@GOTPCREL(%rip), %rax
	movq	_GSWIP_FDMA_PCTRL_VLANMOD_BOTH@GOTPCREL(%rip), %rcx
	movq	%r15, %rbx
	movl	(%rcx), %r15d
	orl	(%rax), %r15d
	movl	%r12d, %edi
	callq	_GSWIP_FDMA_PCTRLp
	xorl	%r13d, %r13d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	%r15d, %edx
	movl	%eax, %ecx
	callq	_gswip_switch_mask
	movq	_GSWIP_SDMA_PCTRL_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %r15d
	movl	%r12d, %edi
	callq	_GSWIP_SDMA_PCTRLp
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	%r15d, %edx
	movq	%rbx, %r15
	movl	%eax, %ecx
	callq	_gswip_switch_mask
	movq	%r14, %rdi
	movl	%r12d, %esi
	callq	_dsa_is_cpu_port
	testl	%eax, %eax
	jne	LBB0_6
## %bb.5:
	movq	_GSWIP_MDIO_PHY_LINK_AUTO@GOTPCREL(%rip), %rax
	movq	_GSWIP_MDIO_PHY_SPEED_AUTO@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_GSWIP_MDIO_PHY_FDUP_AUTO@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_GSWIP_MDIO_PHY_FCONTX_AUTO@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_GSWIP_MDIO_PHY_FCONRX_AUTO@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_GSWIP_MDIO_PHY_ADDR_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	-48(%rbp), %rax                 ## 8-byte Reload
	andl	(%rax), %ebx
	orl	%ecx, %ebx
	movl	%r12d, %edi
	callq	_GSWIP_MDIO_PHYp
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%eax, %edx
	callq	_gswip_mdio_w
	movl	%r12d, %edi
	callq	_BIT
	movq	_GSWIP_MDIO_MDC_CFG0@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	xorl	%r13d, %r13d
	movq	%r15, %rdi
	xorl	%esi, %esi
	movl	%eax, %edx
	callq	_gswip_mdio_mask
	jmp	LBB0_6
LBB0_1:
	xorl	%r13d, %r13d
	jmp	LBB0_6
LBB0_3:
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	$1, %edx
	callq	_gswip_add_single_port_br
	movl	%eax, %r13d
	testl	%eax, %eax
	je	LBB0_4
LBB0_6:
	movl	%r13d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_GSWIP_BM_PCFG_CNTEN,4,2        ## @GSWIP_BM_PCFG_CNTEN
	.comm	_GSWIP_FDMA_PCTRL_EN,4,2        ## @GSWIP_FDMA_PCTRL_EN
	.comm	_GSWIP_FDMA_PCTRL_VLANMOD_BOTH,4,2 ## @GSWIP_FDMA_PCTRL_VLANMOD_BOTH
	.comm	_GSWIP_SDMA_PCTRL_EN,4,2        ## @GSWIP_SDMA_PCTRL_EN
	.comm	_GSWIP_MDIO_PHY_LINK_AUTO,4,2   ## @GSWIP_MDIO_PHY_LINK_AUTO
	.comm	_GSWIP_MDIO_PHY_SPEED_AUTO,4,2  ## @GSWIP_MDIO_PHY_SPEED_AUTO
	.comm	_GSWIP_MDIO_PHY_FDUP_AUTO,4,2   ## @GSWIP_MDIO_PHY_FDUP_AUTO
	.comm	_GSWIP_MDIO_PHY_FCONTX_AUTO,4,2 ## @GSWIP_MDIO_PHY_FCONTX_AUTO
	.comm	_GSWIP_MDIO_PHY_FCONRX_AUTO,4,2 ## @GSWIP_MDIO_PHY_FCONRX_AUTO
	.comm	_GSWIP_MDIO_PHY_ADDR_MASK,4,2   ## @GSWIP_MDIO_PHY_ADDR_MASK
	.comm	_GSWIP_MDIO_MDC_CFG0,4,2        ## @GSWIP_MDIO_MDC_CFG0
	.no_dead_strip	_gswip_port_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function gswip_port_enable
_gswip_port_enable:                     ; @gswip_port_enable
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x2
	mov	x20, x1
	mov	x22, x0
	ldr	x19, [x0]
	bl	_dsa_is_user_port
	cbz	w0, LBB0_5
; %bb.1:
	mov	x0, x22
	mov	x1, x20
	bl	_dsa_is_cpu_port
	cbz	w0, LBB0_4
LBB0_2:
Lloh0:
	adrp	x8, _GSWIP_BM_PCFG_CNTEN@GOTPAGE
Lloh1:
	ldr	x8, [x8, _GSWIP_BM_PCFG_CNTEN@GOTPAGEOFF]
Lloh2:
	ldr	w23, [x8]
	mov	x0, x20
	bl	_GSWIP_BM_PCFGp
	mov	x2, x0
	mov	x0, x19
	mov	x1, x23
	bl	_gswip_switch_w
Lloh3:
	adrp	x8, _GSWIP_FDMA_PCTRL_EN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _GSWIP_FDMA_PCTRL_EN@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _GSWIP_FDMA_PCTRL_VLANMOD_BOTH@GOTPAGE
Lloh7:
	ldr	x9, [x9, _GSWIP_FDMA_PCTRL_VLANMOD_BOTH@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w23, w9, w8
	mov	x0, x20
	bl	_GSWIP_FDMA_PCTRLp
	mov	x3, x0
	mov	x0, x19
	mov	w1, #0
	mov	x2, x23
	bl	_gswip_switch_mask
Lloh9:
	adrp	x8, _GSWIP_SDMA_PCTRL_EN@GOTPAGE
Lloh10:
	ldr	x8, [x8, _GSWIP_SDMA_PCTRL_EN@GOTPAGEOFF]
Lloh11:
	ldr	w23, [x8]
	mov	x0, x20
	bl	_GSWIP_SDMA_PCTRLp
	mov	x3, x0
	mov	x0, x19
	mov	w1, #0
	mov	x2, x23
	bl	_gswip_switch_mask
	mov	x0, x22
	mov	x1, x20
	bl	_dsa_is_cpu_port
	mov	x8, x0
	mov	w0, #0
	cbnz	w8, LBB0_5
; %bb.3:
Lloh12:
	adrp	x8, _GSWIP_MDIO_PHY_LINK_AUTO@GOTPAGE
Lloh13:
	ldr	x8, [x8, _GSWIP_MDIO_PHY_LINK_AUTO@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
Lloh15:
	adrp	x9, _GSWIP_MDIO_PHY_SPEED_AUTO@GOTPAGE
Lloh16:
	ldr	x9, [x9, _GSWIP_MDIO_PHY_SPEED_AUTO@GOTPAGEOFF]
Lloh17:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh18:
	adrp	x9, _GSWIP_MDIO_PHY_FDUP_AUTO@GOTPAGE
Lloh19:
	ldr	x9, [x9, _GSWIP_MDIO_PHY_FDUP_AUTO@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh21:
	adrp	x9, _GSWIP_MDIO_PHY_FCONTX_AUTO@GOTPAGE
Lloh22:
	ldr	x9, [x9, _GSWIP_MDIO_PHY_FCONTX_AUTO@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh24:
	adrp	x9, _GSWIP_MDIO_PHY_FCONRX_AUTO@GOTPAGE
Lloh25:
	ldr	x9, [x9, _GSWIP_MDIO_PHY_FCONRX_AUTO@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	orr	w8, w8, w9
	ldr	w9, [x21]
Lloh27:
	adrp	x10, _GSWIP_MDIO_PHY_ADDR_MASK@GOTPAGE
Lloh28:
	ldr	x10, [x10, _GSWIP_MDIO_PHY_ADDR_MASK@GOTPAGEOFF]
Lloh29:
	ldr	w10, [x10]
	and	w9, w10, w9
	orr	w21, w8, w9
	mov	x0, x20
	bl	_GSWIP_MDIO_PHYp
	mov	x2, x0
	mov	x0, x19
	mov	x1, x21
	bl	_gswip_mdio_w
	mov	x0, x20
	bl	_BIT
	mov	x2, x0
Lloh30:
	adrp	x8, _GSWIP_MDIO_MDC_CFG0@GOTPAGE
Lloh31:
	ldr	x8, [x8, _GSWIP_MDIO_MDC_CFG0@GOTPAGEOFF]
Lloh32:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w1, #0
	bl	_gswip_mdio_mask
	mov	w0, #0
	b	LBB0_5
LBB0_4:
	mov	x0, x19
	mov	x1, x20
	mov	w2, #1
	bl	_gswip_add_single_port_br
	cbz	w0, LBB0_2
LBB0_5:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.cfi_endproc
                                        ; -- End function
	.comm	_GSWIP_BM_PCFG_CNTEN,4,2        ; @GSWIP_BM_PCFG_CNTEN
	.comm	_GSWIP_FDMA_PCTRL_EN,4,2        ; @GSWIP_FDMA_PCTRL_EN
	.comm	_GSWIP_FDMA_PCTRL_VLANMOD_BOTH,4,2 ; @GSWIP_FDMA_PCTRL_VLANMOD_BOTH
	.comm	_GSWIP_SDMA_PCTRL_EN,4,2        ; @GSWIP_SDMA_PCTRL_EN
	.comm	_GSWIP_MDIO_PHY_LINK_AUTO,4,2   ; @GSWIP_MDIO_PHY_LINK_AUTO
	.comm	_GSWIP_MDIO_PHY_SPEED_AUTO,4,2  ; @GSWIP_MDIO_PHY_SPEED_AUTO
	.comm	_GSWIP_MDIO_PHY_FDUP_AUTO,4,2   ; @GSWIP_MDIO_PHY_FDUP_AUTO
	.comm	_GSWIP_MDIO_PHY_FCONTX_AUTO,4,2 ; @GSWIP_MDIO_PHY_FCONTX_AUTO
	.comm	_GSWIP_MDIO_PHY_FCONRX_AUTO,4,2 ; @GSWIP_MDIO_PHY_FCONRX_AUTO
	.comm	_GSWIP_MDIO_PHY_ADDR_MASK,4,2   ; @GSWIP_MDIO_PHY_ADDR_MASK
	.comm	_GSWIP_MDIO_MDC_CFG0,4,2        ; @GSWIP_MDIO_MDC_CFG0
	.no_dead_strip	_gswip_port_enable
.subsections_via_symbols
