	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function arm_smmu_tlb_inv_range_s1
_arm_smmu_tlb_inv_range_s1:             ## @arm_smmu_tlb_inv_range_s1
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	24(%r8), %rbx
	movl	(%r8), %r12d
	movq	_ARM_SMMU_FEAT_COHERENT_WALK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%eax, (%rbx)
	je	LBB0_2
## %bb.1:
	xorl	%eax, %eax
	movq	%rdi, -48(%rbp)                 ## 8-byte Spill
	movq	%rdx, %r14
	movq	%r8, %r13
	movl	%r12d, -52(%rbp)                ## 4-byte Spill
	movl	%ecx, %r12d
	callq	_wmb
	movl	%r12d, %ecx
	movl	-52(%rbp), %r12d                ## 4-byte Reload
	movq	%r13, %r8
	movq	%r14, %rdx
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
LBB0_2:
	testl	%ecx, %ecx
	jne	LBB0_3
## %bb.4:
	movq	_ARM_SMMU_CB_S1_TLBIVA@GOTPCREL(%rip), %rax
	jmp	LBB0_5
LBB0_3:
	movq	_ARM_SMMU_CB_S1_TLBIVAL@GOTPCREL(%rip), %rax
LBB0_5:
	movq	%rbx, %rsi
	movl	(%rax), %r13d
	movq	8(%r8), %rax
	movq	_ARM_SMMU_CTX_FMT_AARCH64@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	movq	%rdx, -64(%rbp)                 ## 8-byte Spill
	jne	LBB0_8
## %bb.6:
	shrq	$12, %rdx
	movq	%rdx, -48(%rbp)                 ## 8-byte Spill
	negq	%r15
                                        ## implicit-def: $r14
	movq	%rsi, %rbx
	.p2align	4, 0x90
LBB0_7:                                 ## =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	%r12d, %esi
	movl	%r13d, %edx
	movq	%r14, %rcx
	callq	_arm_smmu_cb_writeq
	addq	-48(%rbp), %r14                 ## 8-byte Folded Reload
	addq	-64(%rbp), %r15                 ## 8-byte Folded Reload
	jne	LBB0_7
	jmp	LBB0_10
LBB0_8:
	andq	$-4096, %rdi                    ## imm = 0xF000
	orq	16(%r8), %rdi
	xorl	%ebx, %ebx
	movq	%rsi, -48(%rbp)                 ## 8-byte Spill
	movl	%r12d, %r14d
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	leaq	(%rdi,%rbx), %rcx
	movq	%rdi, %r12
	movq	-48(%rbp), %rdi                 ## 8-byte Reload
	movl	%r14d, %esi
	movl	%r13d, %edx
	callq	_arm_smmu_cb_write
	movq	%r12, %rdi
	addq	-64(%rbp), %rbx                 ## 8-byte Folded Reload
	cmpq	%rbx, %r15
	jne	LBB0_9
LBB0_10:
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_ARM_SMMU_FEAT_COHERENT_WALK,4,2 ## @ARM_SMMU_FEAT_COHERENT_WALK
	.comm	_ARM_SMMU_CB_S1_TLBIVAL,4,2     ## @ARM_SMMU_CB_S1_TLBIVAL
	.comm	_ARM_SMMU_CB_S1_TLBIVA,4,2      ## @ARM_SMMU_CB_S1_TLBIVA
	.comm	_ARM_SMMU_CTX_FMT_AARCH64,8,3   ## @ARM_SMMU_CTX_FMT_AARCH64
	.no_dead_strip	_arm_smmu_tlb_inv_range_s1
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function arm_smmu_tlb_inv_range_s1
_arm_smmu_tlb_inv_range_s1:             ; @arm_smmu_tlb_inv_range_s1
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x24, x4
	mov	x22, x3
	mov	x19, x2
	mov	x23, x1
	mov	x25, x0
	ldr	x20, [x4, #24]
	ldr	w21, [x4]
	ldr	w8, [x20]
Lloh0:
	adrp	x9, _ARM_SMMU_FEAT_COHERENT_WALK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _ARM_SMMU_FEAT_COHERENT_WALK@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_2
; %bb.1:
	bl	_wmb
LBB0_2:
Lloh3:
	adrp	x8, _ARM_SMMU_CB_S1_TLBIVAL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _ARM_SMMU_CB_S1_TLBIVAL@GOTPAGEOFF]
Lloh5:
	adrp	x9, _ARM_SMMU_CB_S1_TLBIVA@GOTPAGE
Lloh6:
	ldr	x9, [x9, _ARM_SMMU_CB_S1_TLBIVA@GOTPAGEOFF]
	cmp	w22, #0
	csel	x8, x9, x8, eq
	ldr	w22, [x8]
	ldr	x8, [x24, #8]
Lloh7:
	adrp	x9, _ARM_SMMU_CTX_FMT_AARCH64@GOTPAGE
Lloh8:
	ldr	x9, [x9, _ARM_SMMU_CTX_FMT_AARCH64@GOTPAGEOFF]
Lloh9:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_5
; %bb.3:
	lsr	x24, x19, #12
	neg	x25, x23
                                        ; implicit-def: $x23
LBB0_4:                                 ; =>This Inner Loop Header: Depth=1
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	mov	x3, x23
	bl	_arm_smmu_cb_writeq
	add	x23, x23, x24
	adds	x25, x25, x19
	b.ne	LBB0_4
	b	LBB0_7
LBB0_5:
	mov	x26, #0
	and	x8, x25, #0xfffffffffffff000
	ldr	x9, [x24, #16]
	orr	x24, x9, x8
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	add	x3, x24, x26
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	bl	_arm_smmu_cb_write
	add	x26, x26, x19
	cmp	x23, x26
	b.ne	LBB0_6
LBB0_7:
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.cfi_endproc
                                        ; -- End function
	.comm	_ARM_SMMU_FEAT_COHERENT_WALK,4,2 ; @ARM_SMMU_FEAT_COHERENT_WALK
	.comm	_ARM_SMMU_CB_S1_TLBIVAL,4,2     ; @ARM_SMMU_CB_S1_TLBIVAL
	.comm	_ARM_SMMU_CB_S1_TLBIVA,4,2      ; @ARM_SMMU_CB_S1_TLBIVA
	.comm	_ARM_SMMU_CTX_FMT_AARCH64,8,3   ; @ARM_SMMU_CTX_FMT_AARCH64
	.no_dead_strip	_arm_smmu_tlb_inv_range_s1
.subsections_via_symbols
