	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_alx_reset_pcie                 ## -- Begin function alx_reset_pcie
	.p2align	4, 0x90
_alx_reset_pcie:                        ## @alx_reset_pcie
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_alx_hw_revision
	movl	%eax, %r14d
	movl	(%rbx), %edi
	movq	_PCI_COMMAND@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	leaq	-36(%rbp), %rdx
	callq	_pci_read_config_word
	movl	-36(%rbp), %ecx
	movq	_ALX_PCI_CMD@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_PCI_COMMAND_INTX_DISABLE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	testl	%ecx, %eax
	je	LBB0_2
## %bb.1:
	movl	%edx, %esi
	andl	%ecx, %esi
	je	LBB0_3
LBB0_2:
	orl	%ecx, %eax
	notl	%edx
	andl	%eax, %edx
	movl	%edx, -36(%rbp)
	movl	(%rbx), %edi
	movl	(%r15), %esi
	callq	_pci_write_config_word
LBB0_3:
	movq	_ALX_WOL0@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_alx_read_mem32
	movl	(%r15), %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_alx_write_mem32
	movq	_ALX_PDLL_TRNS1@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_alx_read_mem32
	movl	(%r15), %esi
	movq	_ALX_PDLL_TRNS1_D3PLLOFF_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movq	%rbx, %rdi
	callq	_alx_write_mem32
	movq	_ALX_UE_SVRT@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_alx_read_mem32
	movq	_ALX_UE_SVRT_DLPROTERR@GOTPCREL(%rip), %rcx
	movq	_ALX_UE_SVRT_FCPROTERR@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	notl	%edx
	andl	%eax, %edx
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_alx_write_mem32
	movq	_ALX_MASTER@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	%rbx, %rdi
	callq	_alx_read_mem32
	movl	%eax, %r15d
	movl	%r14d, %edi
	callq	_alx_is_rev_a
	testq	%rax, %rax
	je	LBB0_8
## %bb.4:
	movq	%rbx, %rdi
	callq	_alx_hw_with_cr
	testq	%rax, %rax
	je	LBB0_8
## %bb.5:
	movq	_ALX_MASTER_WAKEN_25M@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_ALX_MASTER_PCLKSEL_SRDS@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	testl	%r15d, %edx
	je	LBB0_7
## %bb.6:
	movl	%eax, %ecx
	andl	%r15d, %ecx
	jne	LBB0_12
LBB0_7:
	movl	(%r12), %esi
	orl	%r15d, %edx
	orl	%eax, %edx
	movq	%rbx, %rdi
	jmp	LBB0_11
LBB0_8:
	movq	_ALX_MASTER_WAKEN_25M@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movq	_ALX_MASTER_PCLKSEL_SRDS@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	testl	%r15d, %eax
	je	LBB0_10
## %bb.9:
	movl	%ecx, %edx
	andl	%r15d, %edx
	je	LBB0_12
LBB0_10:
	movl	(%r12), %esi
	notl	%ecx
	andl	%ecx, %r15d
	orl	%eax, %r15d
	movq	%rbx, %rdi
	movl	%r15d, %edx
LBB0_11:
	callq	_alx_write_mem32
LBB0_12:
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	_alx_enable_aspm
	movl	$10, %edi
	callq	_udelay
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_PCI_COMMAND,4,2                ## @PCI_COMMAND
	.comm	_ALX_PCI_CMD,4,2                ## @ALX_PCI_CMD
	.comm	_PCI_COMMAND_INTX_DISABLE,4,2   ## @PCI_COMMAND_INTX_DISABLE
	.comm	_ALX_WOL0,4,2                   ## @ALX_WOL0
	.comm	_ALX_PDLL_TRNS1,4,2             ## @ALX_PDLL_TRNS1
	.comm	_ALX_PDLL_TRNS1_D3PLLOFF_EN,4,2 ## @ALX_PDLL_TRNS1_D3PLLOFF_EN
	.comm	_ALX_UE_SVRT,4,2                ## @ALX_UE_SVRT
	.comm	_ALX_UE_SVRT_DLPROTERR,4,2      ## @ALX_UE_SVRT_DLPROTERR
	.comm	_ALX_UE_SVRT_FCPROTERR,4,2      ## @ALX_UE_SVRT_FCPROTERR
	.comm	_ALX_MASTER,4,2                 ## @ALX_MASTER
	.comm	_ALX_MASTER_WAKEN_25M,4,2       ## @ALX_MASTER_WAKEN_25M
	.comm	_ALX_MASTER_PCLKSEL_SRDS,4,2    ## @ALX_MASTER_PCLKSEL_SRDS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_alx_reset_pcie                 ; -- Begin function alx_reset_pcie
	.p2align	2
_alx_reset_pcie:                        ; @alx_reset_pcie
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	bl	_alx_hw_revision
	mov	x20, x0
	ldr	w0, [x19]
Lloh0:
	adrp	x21, _PCI_COMMAND@GOTPAGE
Lloh1:
	ldr	x21, [x21, _PCI_COMMAND@GOTPAGEOFF]
	ldr	w1, [x21]
	add	x2, sp, #12
	bl	_pci_read_config_word
	ldr	w8, [sp, #12]
Lloh2:
	adrp	x9, _ALX_PCI_CMD@GOTPAGE
Lloh3:
	ldr	x9, [x9, _ALX_PCI_CMD@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	and	w11, w9, w8
Lloh5:
	adrp	x10, _PCI_COMMAND_INTX_DISABLE@GOTPAGE
Lloh6:
	ldr	x10, [x10, _PCI_COMMAND_INTX_DISABLE@GOTPAGEOFF]
Lloh7:
	ldr	w10, [x10]
	and	w12, w10, w8
	cmp	w11, #0
	ccmp	w12, #0, #0, ne
	b.eq	LBB0_2
; %bb.1:
	orr	w8, w9, w8
	bic	w2, w8, w10
	str	w2, [sp, #12]
	ldr	w0, [x19]
	ldr	w1, [x21]
	bl	_pci_write_config_word
LBB0_2:
Lloh8:
	adrp	x21, _ALX_WOL0@GOTPAGE
Lloh9:
	ldr	x21, [x21, _ALX_WOL0@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_alx_read_mem32
	ldr	w1, [x21]
	mov	x0, x19
	mov	w2, #0
	bl	_alx_write_mem32
Lloh10:
	adrp	x21, _ALX_PDLL_TRNS1@GOTPAGE
Lloh11:
	ldr	x21, [x21, _ALX_PDLL_TRNS1@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_alx_read_mem32
	ldr	w1, [x21]
Lloh12:
	adrp	x8, _ALX_PDLL_TRNS1_D3PLLOFF_EN@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ALX_PDLL_TRNS1_D3PLLOFF_EN@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	bic	w2, w0, w8
	mov	x0, x19
	bl	_alx_write_mem32
Lloh15:
	adrp	x21, _ALX_UE_SVRT@GOTPAGE
Lloh16:
	ldr	x21, [x21, _ALX_UE_SVRT@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_alx_read_mem32
Lloh17:
	adrp	x8, _ALX_UE_SVRT_DLPROTERR@GOTPAGE
Lloh18:
	ldr	x8, [x8, _ALX_UE_SVRT_DLPROTERR@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
Lloh20:
	adrp	x9, _ALX_UE_SVRT_FCPROTERR@GOTPAGE
Lloh21:
	ldr	x9, [x9, _ALX_UE_SVRT_FCPROTERR@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w9, w8
	bic	w2, w0, w8
	ldr	w1, [x21]
	mov	x0, x19
	bl	_alx_write_mem32
Lloh23:
	adrp	x22, _ALX_MASTER@GOTPAGE
Lloh24:
	ldr	x22, [x22, _ALX_MASTER@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x0, x19
	bl	_alx_read_mem32
	mov	x21, x0
	mov	x0, x20
	bl	_alx_is_rev_a
	cbz	x0, LBB0_7
; %bb.3:
	mov	x0, x19
	bl	_alx_hw_with_cr
	cbz	x0, LBB0_7
; %bb.4:
Lloh25:
	adrp	x8, _ALX_MASTER_WAKEN_25M@GOTPAGE
Lloh26:
	ldr	x8, [x8, _ALX_MASTER_WAKEN_25M@GOTPAGEOFF]
Lloh27:
	ldr	w8, [x8]
Lloh28:
	adrp	x9, _ALX_MASTER_PCLKSEL_SRDS@GOTPAGE
Lloh29:
	ldr	x9, [x9, _ALX_MASTER_PCLKSEL_SRDS@GOTPAGEOFF]
Lloh30:
	ldr	w9, [x9]
	tst	w8, w21
	b.eq	LBB0_6
; %bb.5:
	and	w10, w9, w21
	cbnz	w10, LBB0_11
LBB0_6:
	ldr	w1, [x22]
	orr	w8, w8, w21
	orr	w2, w8, w9
	b	LBB0_10
LBB0_7:
Lloh31:
	adrp	x8, _ALX_MASTER_WAKEN_25M@GOTPAGE
Lloh32:
	ldr	x8, [x8, _ALX_MASTER_WAKEN_25M@GOTPAGEOFF]
Lloh33:
	ldr	w8, [x8]
Lloh34:
	adrp	x9, _ALX_MASTER_PCLKSEL_SRDS@GOTPAGE
Lloh35:
	ldr	x9, [x9, _ALX_MASTER_PCLKSEL_SRDS@GOTPAGEOFF]
Lloh36:
	ldr	w9, [x9]
	tst	w8, w21
	b.eq	LBB0_9
; %bb.8:
	and	w10, w9, w21
	cbz	w10, LBB0_11
LBB0_9:
	ldr	w1, [x22]
	bic	w9, w21, w9
	orr	w2, w9, w8
LBB0_10:
	mov	x0, x19
	bl	_alx_write_mem32
LBB0_11:
	mov	x0, x19
	mov	w1, #1
	mov	w2, #1
	bl	_alx_enable_aspm
	mov	w0, #10
	bl	_udelay
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.cfi_endproc
                                        ; -- End function
	.comm	_PCI_COMMAND,4,2                ; @PCI_COMMAND
	.comm	_ALX_PCI_CMD,4,2                ; @ALX_PCI_CMD
	.comm	_PCI_COMMAND_INTX_DISABLE,4,2   ; @PCI_COMMAND_INTX_DISABLE
	.comm	_ALX_WOL0,4,2                   ; @ALX_WOL0
	.comm	_ALX_PDLL_TRNS1,4,2             ; @ALX_PDLL_TRNS1
	.comm	_ALX_PDLL_TRNS1_D3PLLOFF_EN,4,2 ; @ALX_PDLL_TRNS1_D3PLLOFF_EN
	.comm	_ALX_UE_SVRT,4,2                ; @ALX_UE_SVRT
	.comm	_ALX_UE_SVRT_DLPROTERR,4,2      ; @ALX_UE_SVRT_DLPROTERR
	.comm	_ALX_UE_SVRT_FCPROTERR,4,2      ; @ALX_UE_SVRT_FCPROTERR
	.comm	_ALX_MASTER,4,2                 ; @ALX_MASTER
	.comm	_ALX_MASTER_WAKEN_25M,4,2       ; @ALX_MASTER_WAKEN_25M
	.comm	_ALX_MASTER_PCLKSEL_SRDS,4,2    ; @ALX_MASTER_PCLKSEL_SRDS
.subsections_via_symbols
