	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cx23888_ir_tx_s_parameters
_cx23888_ir_tx_s_parameters:            ## @cx23888_ir_tx_s_parameters
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r12
	movq	%rdi, %rbx
	callq	_to_state
	cmpq	$0, 64(%r12)
	je	LBB0_1
## %bb.12:
	movq	%rbx, %rdi
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_cx23888_ir_tx_shutdown         ## TAILCALL
LBB0_1:
	movq	%rax, %r14
	movq	(%r12), %rax
	movq	_V4L2_SUBDEV_IR_MODE_PULSE_WIDTH@GOTPCREL(%rip), %rbx
	cmpq	(%rbx), %rax
	jne	LBB0_2
## %bb.3:
	movq	80(%r14), %r15
	movq	%r14, %rdi
	callq	_mutex_lock
	movq	64(%r12), %rax
	movq	%rax, 72(%r14)
	movq	(%rbx), %rax
	movq	%rax, (%r12)
	movq	%rax, 8(%r14)
	movl	$4, 8(%r12)
	movl	$4, 16(%r14)
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_irqenable_tx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_control_tx_enable
	movl	56(%r12), %esi
	movq	%r15, %rdi
	callq	_control_tx_modulation_enable
	movl	56(%r12), %eax
	movl	%eax, 64(%r14)
	cmpl	$0, 56(%r12)
	je	LBB0_5
## %bb.4:
	movl	52(%r12), %esi
	leaq	-36(%rbp), %rdx
	movq	%r15, %rdi
	callq	_txclk_tx_s_carrier
	movl	%eax, 52(%r12)
	movl	%eax, 60(%r14)
	movl	48(%r12), %esi
	movq	%r15, %rdi
	callq	_cduty_tx_s_duty_cycle
	movl	%eax, 48(%r12)
	movl	%eax, 56(%r14)
	movq	_FIFO_RXTX@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-36(%rbp), %esi
	callq	_pulse_width_count_to_ns
	jmp	LBB0_6
LBB0_2:
	movq	_ENOSYS@GOTPCREL(%rip), %rcx
	xorl	%eax, %eax
	subl	(%rcx), %eax
	jmp	LBB0_11
LBB0_5:
	movq	40(%r12), %rsi
	leaq	-36(%rbp), %rdx
	movq	%r15, %rdi
	callq	_txclk_tx_s_max_pulse_width
LBB0_6:
	movq	%rax, 40(%r12)
	movq	%rax, 48(%r14)
	movq	%r14, %rdi
	addq	$4, %rdi
	movl	-36(%rbp), %esi
	callq	_atomic_set
	movl	-36(%rbp), %edi
	callq	_clock_divider_to_resolution
	movl	%eax, 32(%r12)
	movl	%eax, 40(%r14)
	movq	_TX_FIFO_HALF_EMPTY@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_control_tx_irq_watermark
	movl	28(%r12), %esi
	movq	%r15, %rdi
	callq	_control_tx_polarity_invert
	movl	28(%r12), %eax
	movl	%eax, 36(%r14)
	movl	24(%r12), %esi
	movq	%r15, %rdi
	callq	_control_tx_level_invert
	movl	24(%r12), %eax
	movl	%eax, 32(%r14)
	movq	16(%r12), %rax
	movq	%rax, 24(%r14)
	movl	12(%r12), %eax
	movl	%eax, 20(%r14)
	movl	12(%r12), %esi
	testl	%esi, %esi
	je	LBB0_10
## %bb.7:
	cmpq	$0, 16(%r12)
	je	LBB0_9
## %bb.8:
	movq	_IRQEN_TSE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	callq	_irqenable_tx
	movl	12(%r12), %esi
LBB0_9:
	movq	%r15, %rdi
	callq	_control_tx_enable
LBB0_10:
	movq	%r14, %rdi
	callq	_mutex_unlock
	xorl	%eax, %eax
LBB0_11:
	addq	$16, %rsp
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_V4L2_SUBDEV_IR_MODE_PULSE_WIDTH,8,3 ## @V4L2_SUBDEV_IR_MODE_PULSE_WIDTH
	.comm	_ENOSYS,4,2                     ## @ENOSYS
	.comm	_FIFO_RXTX,4,2                  ## @FIFO_RXTX
	.comm	_TX_FIFO_HALF_EMPTY,4,2         ## @TX_FIFO_HALF_EMPTY
	.comm	_IRQEN_TSE,4,2                  ## @IRQEN_TSE
	.no_dead_strip	_cx23888_ir_tx_s_parameters
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cx23888_ir_tx_s_parameters
_cx23888_ir_tx_s_parameters:            ; @cx23888_ir_tx_s_parameters
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #64
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x21, x0
	bl	_to_state
	ldr	x8, [x20, #64]
	cbz	x8, LBB0_2
; %bb.1:
	mov	x0, x21
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	b	_cx23888_ir_tx_shutdown
LBB0_2:
	ldr	x8, [x20]
Lloh0:
	adrp	x22, _V4L2_SUBDEV_IR_MODE_PULSE_WIDTH@GOTPAGE
Lloh1:
	ldr	x22, [x22, _V4L2_SUBDEV_IR_MODE_PULSE_WIDTH@GOTPAGEOFF]
	ldr	x9, [x22]
	cmp	x8, x9
	b.ne	LBB0_5
; %bb.3:
	mov	x19, x0
	ldr	x21, [x0, #80]
	bl	_mutex_lock
	ldr	x8, [x20, #64]
	str	x8, [x19, #72]
	ldr	x8, [x22]
	str	x8, [x20]
	str	x8, [x19, #8]
	mov	w8, #4
	str	w8, [x20, #8]
	str	w8, [x19, #16]
	mov	x0, x21
	mov	w1, #0
	bl	_irqenable_tx
	mov	x0, x21
	mov	w1, #0
	bl	_control_tx_enable
	ldr	w1, [x20, #56]
	mov	x0, x21
	bl	_control_tx_modulation_enable
	ldr	w8, [x20, #56]
	str	w8, [x19, #64]
	ldr	w8, [x20, #56]
	cbz	w8, LBB0_6
; %bb.4:
	ldr	w1, [x20, #52]
	add	x2, sp, #12
	mov	x0, x21
	bl	_txclk_tx_s_carrier
	str	w0, [x20, #52]
	str	w0, [x19, #60]
	ldr	w1, [x20, #48]
	mov	x0, x21
	bl	_cduty_tx_s_duty_cycle
	str	w0, [x20, #48]
	str	w0, [x19, #56]
Lloh2:
	adrp	x8, _FIFO_RXTX@GOTPAGE
Lloh3:
	ldr	x8, [x8, _FIFO_RXTX@GOTPAGEOFF]
Lloh4:
	ldr	w0, [x8]
	ldr	w1, [sp, #12]
	bl	_pulse_width_count_to_ns
	b	LBB0_7
LBB0_5:
Lloh5:
	adrp	x8, _ENOSYS@GOTPAGE
Lloh6:
	ldr	x8, [x8, _ENOSYS@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
	neg	w0, w8
	b	LBB0_12
LBB0_6:
	ldr	x1, [x20, #40]
	add	x2, sp, #12
	mov	x0, x21
	bl	_txclk_tx_s_max_pulse_width
LBB0_7:
	str	x0, [x20, #40]
	str	x0, [x19, #48]
	add	x0, x19, #4
	ldr	w1, [sp, #12]
	bl	_atomic_set
	ldr	w0, [sp, #12]
	bl	_clock_divider_to_resolution
	str	w0, [x20, #32]
	str	w0, [x19, #40]
Lloh8:
	adrp	x8, _TX_FIFO_HALF_EMPTY@GOTPAGE
Lloh9:
	ldr	x8, [x8, _TX_FIFO_HALF_EMPTY@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_control_tx_irq_watermark
	ldr	w1, [x20, #28]
	mov	x0, x21
	bl	_control_tx_polarity_invert
	ldp	w1, w8, [x20, #24]
	str	w8, [x19, #36]
	mov	x0, x21
	bl	_control_tx_level_invert
	ldr	w8, [x20, #24]
	str	w8, [x19, #32]
	ldr	x8, [x20, #16]
	str	x8, [x19, #24]
	ldr	w8, [x20, #12]
	str	w8, [x19, #20]
	ldr	w1, [x20, #12]
	cbz	w1, LBB0_11
; %bb.8:
	ldr	x8, [x20, #16]
	cbz	x8, LBB0_10
; %bb.9:
Lloh11:
	adrp	x8, _IRQEN_TSE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _IRQEN_TSE@GOTPAGEOFF]
Lloh13:
	ldr	w1, [x8]
	mov	x0, x21
	bl	_irqenable_tx
	ldr	w1, [x20, #12]
LBB0_10:
	mov	x0, x21
	bl	_control_tx_enable
LBB0_11:
	mov	x0, x19
	bl	_mutex_unlock
	mov	w0, #0
LBB0_12:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #64
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.cfi_endproc
                                        ; -- End function
	.comm	_V4L2_SUBDEV_IR_MODE_PULSE_WIDTH,8,3 ; @V4L2_SUBDEV_IR_MODE_PULSE_WIDTH
	.comm	_ENOSYS,4,2                     ; @ENOSYS
	.comm	_FIFO_RXTX,4,2                  ; @FIFO_RXTX
	.comm	_TX_FIFO_HALF_EMPTY,4,2         ; @TX_FIFO_HALF_EMPTY
	.comm	_IRQEN_TSE,4,2                  ; @IRQEN_TSE
	.no_dead_strip	_cx23888_ir_tx_s_parameters
.subsections_via_symbols
