	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function am79c961_init_for_open
_am79c961_init_for_open:                ## @am79c961_init_for_open
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	movq	%rax, -48(%rbp)
	callq	_netdev_priv
	movq	%rax, %rbx
	leaq	-64(%rbp), %rsi
	movq	%r15, %rdi
	callq	_am79c961_get_rx_mode
	movl	%eax, %r12d
	movq	%rbx, -72(%rbp)                 ## 8-byte Spill
	addq	$64, %rbx
	movq	%rbx, %rdi
	callq	_spin_lock_irqsave
	movq	_CSR0_BABL@GOTPCREL(%rip), %rax
	movq	_CSR0_CERR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movq	_CSR0_MISS@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_CSR0_MERR@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	8(%r15), %edi
	movq	_CSR0_TINT@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_CSR0@GOTPCREL(%rip), %rcx
	movq	_CSR0_RINT@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	(%rcx), %esi
	movq	_CSR0_STOP@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	callq	_write_rreg
	movq	%rbx, %rdi
	callq	_spin_unlock_irqrestore
	movl	8(%r15), %edi
	movl	$5, %esi
	movl	$160, %edx
	callq	_write_ireg
	movl	8(%r15), %edi
	movl	$6, %esi
	movl	$129, %edx
	callq	_write_ireg
	movl	8(%r15), %edi
	movl	$7, %esi
	movl	$144, %edx
	callq	_write_ireg
	movl	8(%r15), %edi
	movl	$2, %esi
	xorl	%edx, %edx
	callq	_write_ireg
	movq	_LADRL@GOTPCREL(%rip), %r14
	movslq	(%r14), %rbx
	movq	_LADRH@GOTPCREL(%rip), %r13
	cmpl	(%r13), %ebx
	jle	LBB0_1
LBB0_4:
	movq	_PADRL@GOTPCREL(%rip), %rax
	movl	(%rax), %r13d
	movq	_PADRH@GOTPCREL(%rip), %r14
	cmpl	(%r14), %r13d
	jg	LBB0_7
## %bb.5:
	movq	(%r15), %rbx
	.p2align	4, 0x90
LBB0_6:                                 ## =>This Inner Loop Header: Depth=1
	movl	8(%r15), %edi
	movzwl	(%rbx), %edx
	movl	%r13d, %esi
	callq	_write_rreg
	leal	1(%r13), %eax
	addq	$2, %rbx
	cmpl	(%r14), %r13d
	movl	%eax, %r13d
	jl	LBB0_6
LBB0_7:
	movl	8(%r15), %edi
	movq	_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%r12d, %edx
	callq	_write_rreg
	movl	8(%r15), %edi
	movq	_POLLINT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%ebx, %ebx
	xorl	%edx, %edx
	callq	_write_rreg
	movl	8(%r15), %edi
	movq	_SIZERXR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RX_BUFFERS@GOTPCREL(%rip), %r13
	xorl	%edx, %edx
	subl	(%r13), %edx
	callq	_write_rreg
	movl	8(%r15), %edi
	movq	_SIZETXR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_TX_BUFFERS@GOTPCREL(%rip), %r14
	xorl	%edx, %edx
	subl	(%r14), %edx
	callq	_write_rreg
	movl	(%r14), %eax
	addl	(%r13), %eax
	leal	16(,%rax,8), %r12d
	movq	-72(%rbp), %rcx                 ## 8-byte Reload
	movl	$0, (%rcx)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 48(%rcx)
	cmpl	$0, (%r13)
	jle	LBB0_11
## %bb.8:
	xorl	%r14d, %r14d
	xorl	%ebx, %ebx
	.p2align	4, 0x90
LBB0_9:                                 ## =>This Inner Loop Header: Depth=1
	movq	8(%rcx), %rax
	movl	%r12d, (%rax,%r14,4)
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%r12d, %edx
	callq	_am_writeword
	movq	_RMD_OWN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	leal	2(%rbx), %esi
	movq	%r15, %rdi
	callq	_am_writeword
	leal	4(%rbx), %esi
	movq	%r15, %rdi
	movl	$-1600, %edx                    ## imm = 0xF9C0
	callq	_am_writeword
	leal	6(%rbx), %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_am_writeword
	movq	-72(%rbp), %rcx                 ## 8-byte Reload
	addl	$1600, %r12d                    ## imm = 0x640
	addl	$8, %ebx
	incq	%r14
	movslq	(%r13), %rax
	cmpq	%rax, %r14
	jl	LBB0_9
## %bb.10:
	movq	_TX_BUFFERS@GOTPCREL(%rip), %r14
	xorps	%xmm0, %xmm0
LBB0_11:
	movups	%xmm0, 32(%rcx)
	movl	%ebx, 16(%rcx)
	cmpl	$0, (%r14)
	jle	LBB0_14
## %bb.12:
	xorl	%r13d, %r13d
	.p2align	4, 0x90
LBB0_13:                                ## =>This Inner Loop Header: Depth=1
	movq	24(%rcx), %rax
	movl	%r12d, (%rax,%r13,4)
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%r12d, %edx
	callq	_am_writeword
	movl	%ebx, %esi
	orl	$2, %esi
	movq	_TMD_ENP@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_TMD_STP@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%r15, %rdi
	callq	_am_writeword
	movl	%ebx, %esi
	orl	$4, %esi
	movq	%r15, %rdi
	movl	$61440, %edx                    ## imm = 0xF000
	callq	_am_writeword
	movl	%ebx, %esi
	orl	$6, %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_am_writeword
	movq	-72(%rbp), %rcx                 ## 8-byte Reload
	addl	$1600, %r12d                    ## imm = 0x640
	addl	$8, %ebx
	incq	%r13
	movslq	(%r14), %rax
	cmpq	%rax, %r13
	jl	LBB0_13
LBB0_14:
	movl	8(%r15), %edi
	movq	_BASERXL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rcx), %edx
	movq	%rcx, %rbx
	callq	_write_rreg
	movl	8(%r15), %edi
	movq	_BASERXH@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	xorl	%edx, %edx
	callq	_write_rreg
	movl	8(%r15), %edi
	movq	_BASETXL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	16(%rbx), %edx
	callq	_write_rreg
	movl	8(%r15), %edi
	movl	(%r14), %esi
	xorl	%edx, %edx
	callq	_write_rreg
	movl	8(%r15), %edi
	movq	_CSR0@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_CSR0_STOP@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	callq	_write_rreg
	movl	8(%r15), %edi
	movq	_CSR3@GOTPCREL(%rip), %rax
	movq	_CSR3_IDONM@GOTPCREL(%rip), %rcx
	movq	_CSR3_BABLM@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_CSR3_DXSUFLO@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	callq	_write_rreg
	movq	_CSR4_APAD_XMIT@GOTPCREL(%rip), %rax
	movq	_CSR4_MFCOM@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	movl	8(%r15), %edi
	movq	_CSR4_RCVCCOM@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	_CSR4@GOTPCREL(%rip), %rax
	movq	_CSR4_TXSTRTM@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_CSR4_JABM@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	callq	_write_rreg
	movl	8(%r15), %edi
	movl	(%rbx), %esi
	movq	_CSR0_IENA@GOTPCREL(%rip), %rax
	movq	_CSR0_STRT@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	callq	_write_rreg
	movq	___stack_chk_guard@GOTPCREL(%rip), %rax
	movq	(%rax), %rax
	cmpq	-48(%rbp), %rax
	jne	LBB0_16
## %bb.15:
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_1:
	movl	8(%r15), %edi
	movl	-64(%rbp), %edx
	.p2align	4, 0x90
LBB0_3:                                 ## =>This Inner Loop Header: Depth=1
	movl	%ebx, %esi
	callq	_write_rreg
	cmpl	(%r13), %ebx
	jge	LBB0_4
## %bb.2:                               ##   in Loop: Header=BB0_3 Depth=1
	movslq	(%r14), %rax
	movl	8(%r15), %edi
	shlq	$2, %rax
	negq	%rax
	addq	%rbp, %rax
	addq	$-64, %rax
	movl	4(%rax,%rbx,4), %edx
	incq	%rbx
	jmp	LBB0_3
LBB0_16:
	callq	___stack_chk_fail
	.cfi_endproc
                                        ## -- End function
	.comm	_CSR0,4,2                       ## @CSR0
	.comm	_CSR0_BABL,4,2                  ## @CSR0_BABL
	.comm	_CSR0_CERR,4,2                  ## @CSR0_CERR
	.comm	_CSR0_MISS,4,2                  ## @CSR0_MISS
	.comm	_CSR0_MERR,4,2                  ## @CSR0_MERR
	.comm	_CSR0_TINT,4,2                  ## @CSR0_TINT
	.comm	_CSR0_RINT,4,2                  ## @CSR0_RINT
	.comm	_CSR0_STOP,4,2                  ## @CSR0_STOP
	.comm	_LADRL,4,2                      ## @LADRL
	.comm	_LADRH,4,2                      ## @LADRH
	.comm	_PADRL,4,2                      ## @PADRL
	.comm	_PADRH,4,2                      ## @PADRH
	.comm	_MODE,4,2                       ## @MODE
	.comm	_POLLINT,4,2                    ## @POLLINT
	.comm	_SIZERXR,4,2                    ## @SIZERXR
	.comm	_RX_BUFFERS,4,2                 ## @RX_BUFFERS
	.comm	_SIZETXR,4,2                    ## @SIZETXR
	.comm	_TX_BUFFERS,4,2                 ## @TX_BUFFERS
	.comm	_RMD_OWN,4,2                    ## @RMD_OWN
	.comm	_TMD_STP,4,2                    ## @TMD_STP
	.comm	_TMD_ENP,4,2                    ## @TMD_ENP
	.comm	_BASERXL,4,2                    ## @BASERXL
	.comm	_BASERXH,4,2                    ## @BASERXH
	.comm	_BASETXL,4,2                    ## @BASETXL
	.comm	_CSR3,4,2                       ## @CSR3
	.comm	_CSR3_IDONM,4,2                 ## @CSR3_IDONM
	.comm	_CSR3_BABLM,4,2                 ## @CSR3_BABLM
	.comm	_CSR3_DXSUFLO,4,2               ## @CSR3_DXSUFLO
	.comm	_CSR4,4,2                       ## @CSR4
	.comm	_CSR4_APAD_XMIT,4,2             ## @CSR4_APAD_XMIT
	.comm	_CSR4_MFCOM,4,2                 ## @CSR4_MFCOM
	.comm	_CSR4_RCVCCOM,4,2               ## @CSR4_RCVCCOM
	.comm	_CSR4_TXSTRTM,4,2               ## @CSR4_TXSTRTM
	.comm	_CSR4_JABM,4,2                  ## @CSR4_JABM
	.comm	_CSR0_IENA,4,2                  ## @CSR0_IENA
	.comm	_CSR0_STRT,4,2                  ## @CSR0_STRT
	.no_dead_strip	_am79c961_init_for_open
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function am79c961_init_for_open
_am79c961_init_for_open:                ; @am79c961_init_for_open
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #128
	.cfi_def_cfa_offset 128
	stp	x28, x27, [sp, #32]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #48]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #64]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #80]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #96]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #112]            ; 16-byte Folded Spill
	add	x29, sp, #112
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x0
Lloh0:
	adrp	x8, ___stack_chk_guard@GOTPAGE
Lloh1:
	ldr	x8, [x8, ___stack_chk_guard@GOTPAGEOFF]
Lloh2:
	ldr	x8, [x8]
	str	x8, [sp, #24]
	bl	_netdev_priv
	mov	x20, x0
	add	x1, sp, #8
	mov	x0, x19
	bl	_am79c961_get_rx_mode
	mov	x21, x0
	add	x22, x20, #64
	mov	x0, x22
	bl	_spin_lock_irqsave
	ldr	w0, [x19, #8]
Lloh3:
	adrp	x24, _CSR0@GOTPAGE
Lloh4:
	ldr	x24, [x24, _CSR0@GOTPAGEOFF]
	ldr	w1, [x24]
Lloh5:
	adrp	x8, _CSR0_BABL@GOTPAGE
Lloh6:
	ldr	x8, [x8, _CSR0_BABL@GOTPAGEOFF]
Lloh7:
	ldr	w8, [x8]
Lloh8:
	adrp	x9, _CSR0_CERR@GOTPAGE
Lloh9:
	ldr	x9, [x9, _CSR0_CERR@GOTPAGEOFF]
Lloh10:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh11:
	adrp	x9, _CSR0_MISS@GOTPAGE
Lloh12:
	ldr	x9, [x9, _CSR0_MISS@GOTPAGEOFF]
Lloh13:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh14:
	adrp	x9, _CSR0_MERR@GOTPAGE
Lloh15:
	ldr	x9, [x9, _CSR0_MERR@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh17:
	adrp	x9, _CSR0_TINT@GOTPAGE
Lloh18:
	ldr	x9, [x9, _CSR0_TINT@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh20:
	adrp	x9, _CSR0_RINT@GOTPAGE
Lloh21:
	ldr	x9, [x9, _CSR0_RINT@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh23:
	adrp	x25, _CSR0_STOP@GOTPAGE
Lloh24:
	ldr	x25, [x25, _CSR0_STOP@GOTPAGEOFF]
	ldr	w9, [x25]
	orr	w2, w8, w9
	bl	_write_rreg
	mov	x0, x22
	bl	_spin_unlock_irqrestore
	ldr	w0, [x19, #8]
	mov	w1, #5
	mov	w2, #160
	bl	_write_ireg
	ldr	w0, [x19, #8]
	mov	w1, #6
	mov	w2, #129
	bl	_write_ireg
	ldr	w0, [x19, #8]
	mov	w1, #7
	mov	w2, #144
	bl	_write_ireg
	ldr	w0, [x19, #8]
	mov	w1, #2
	mov	w2, #0
	bl	_write_ireg
Lloh25:
	adrp	x26, _LADRL@GOTPAGE
Lloh26:
	ldr	x26, [x26, _LADRL@GOTPAGEOFF]
	ldrsw	x22, [x26]
Lloh27:
	adrp	x27, _LADRH@GOTPAGE
Lloh28:
	ldr	x27, [x27, _LADRH@GOTPAGEOFF]
	ldr	w8, [x27]
	cmp	w22, w8
	b.gt	LBB0_4
; %bb.1:
	ldr	w0, [x19, #8]
	ldr	w2, [sp, #8]
	mov	x1, x22
	bl	_write_rreg
	ldr	w8, [x27]
	cmp	w22, w8
	b.ge	LBB0_4
; %bb.2:
	add	x8, sp, #8
	add	x28, x8, #4
LBB0_3:                                 ; =>This Inner Loop Header: Depth=1
	add	x23, x22, #1
	ldrsw	x8, [x26]
	ldr	w0, [x19, #8]
	sub	x8, x28, x8, lsl #2
	ldr	w2, [x8, x22, lsl #2]
	mov	x1, x23
	bl	_write_rreg
	ldr	w8, [x27]
	mov	x22, x23
	cmp	w23, w8
	b.lt	LBB0_3
LBB0_4:
Lloh29:
	adrp	x8, _PADRL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _PADRL@GOTPAGEOFF]
Lloh31:
	ldr	w22, [x8]
Lloh32:
	adrp	x23, _PADRH@GOTPAGE
Lloh33:
	ldr	x23, [x23, _PADRH@GOTPAGEOFF]
	ldr	w8, [x23]
	cmp	w22, w8
	b.gt	LBB0_7
; %bb.5:
	ldr	x26, [x19]
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w0, [x19, #8]
	ldrh	w2, [x26], #2
	mov	x1, x22
	bl	_write_rreg
	add	w8, w22, #1
	ldr	w9, [x23]
	cmp	w22, w9
	mov	x22, x8
	b.lt	LBB0_6
LBB0_7:
	ldr	w0, [x19, #8]
Lloh34:
	adrp	x8, _MODE@GOTPAGE
Lloh35:
	ldr	x8, [x8, _MODE@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
	mov	x2, x21
	bl	_write_rreg
	ldr	w0, [x19, #8]
Lloh37:
	adrp	x8, _POLLINT@GOTPAGE
Lloh38:
	ldr	x8, [x8, _POLLINT@GOTPAGEOFF]
Lloh39:
	ldr	w1, [x8]
	mov	w2, #0
	bl	_write_rreg
Lloh40:
	adrp	x8, _SIZERXR@GOTPAGE
Lloh41:
	ldr	x8, [x8, _SIZERXR@GOTPAGEOFF]
	ldr	w0, [x19, #8]
Lloh42:
	ldr	w1, [x8]
Lloh43:
	adrp	x26, _RX_BUFFERS@GOTPAGE
Lloh44:
	ldr	x26, [x26, _RX_BUFFERS@GOTPAGEOFF]
	ldr	w8, [x26]
	neg	w2, w8
	bl	_write_rreg
Lloh45:
	adrp	x8, _SIZETXR@GOTPAGE
Lloh46:
	ldr	x8, [x8, _SIZETXR@GOTPAGEOFF]
	ldr	w0, [x19, #8]
Lloh47:
	ldr	w1, [x8]
Lloh48:
	adrp	x23, _TX_BUFFERS@GOTPAGE
Lloh49:
	ldr	x23, [x23, _TX_BUFFERS@GOTPAGEOFF]
	ldr	w8, [x23]
	neg	w2, w8
	bl	_write_rreg
	ldr	w8, [x26]
	ldr	w9, [x23]
	add	w8, w9, w8
	lsl	w8, w8, #3
	add	w21, w8, #16
	str	wzr, [x20]
	stp	xzr, xzr, [x20, #48]
	ldr	w8, [x26]
	cmp	w8, #1
	b.lt	LBB0_10
; %bb.8:
	mov	x27, #0
	mov	w22, #0
Lloh50:
	adrp	x28, _RMD_OWN@GOTPAGE
Lloh51:
	ldr	x28, [x28, _RMD_OWN@GOTPAGEOFF]
LBB0_9:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x20, #8]
	str	w21, [x8, x27, lsl #2]
	mov	x0, x19
	mov	x1, x22
	mov	x2, x21
	bl	_am_writeword
	ldr	w2, [x28]
	add	w1, w22, #2
	mov	x0, x19
	bl	_am_writeword
	add	w1, w22, #4
	mov	x0, x19
	mov	w2, #-1600
	bl	_am_writeword
	add	w1, w22, #6
	mov	x0, x19
	mov	w2, #0
	bl	_am_writeword
	add	w21, w21, #1600
	add	w22, w22, #8
	add	x27, x27, #1
	ldrsw	x8, [x26]
	cmp	x27, x8
	b.lt	LBB0_9
	b	LBB0_11
LBB0_10:
	mov	w22, #0
LBB0_11:
	stp	xzr, xzr, [x20, #32]
	str	w22, [x20, #16]
	ldr	w8, [x23]
	cmp	w8, #1
	b.lt	LBB0_14
; %bb.12:
	mov	x26, #0
Lloh52:
	adrp	x27, _TMD_STP@GOTPAGE
Lloh53:
	ldr	x27, [x27, _TMD_STP@GOTPAGEOFF]
Lloh54:
	adrp	x28, _TMD_ENP@GOTPAGE
Lloh55:
	ldr	x28, [x28, _TMD_ENP@GOTPAGEOFF]
LBB0_13:                                ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x20, #24]
	str	w21, [x8, x26, lsl #2]
	mov	x0, x19
	mov	x1, x22
	mov	x2, x21
	bl	_am_writeword
	orr	w1, w22, #0x2
	ldr	w8, [x27]
	ldr	w9, [x28]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_am_writeword
	orr	w1, w22, #0x4
	mov	x0, x19
	mov	w2, #61440
	bl	_am_writeword
	orr	w1, w22, #0x6
	mov	x0, x19
	mov	w2, #0
	bl	_am_writeword
	add	w21, w21, #1600
	add	w22, w22, #8
	add	x26, x26, #1
	ldrsw	x8, [x23]
	cmp	x26, x8
	b.lt	LBB0_13
LBB0_14:
	ldr	w0, [x19, #8]
Lloh56:
	adrp	x8, _BASERXL@GOTPAGE
Lloh57:
	ldr	x8, [x8, _BASERXL@GOTPAGEOFF]
Lloh58:
	ldr	w1, [x8]
	ldr	w2, [x20]
	bl	_write_rreg
	ldr	w0, [x19, #8]
Lloh59:
	adrp	x21, _BASERXH@GOTPAGE
Lloh60:
	ldr	x21, [x21, _BASERXH@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	w2, #0
	bl	_write_rreg
	ldr	w0, [x19, #8]
Lloh61:
	adrp	x8, _BASETXL@GOTPAGE
Lloh62:
	ldr	x8, [x8, _BASETXL@GOTPAGEOFF]
Lloh63:
	ldr	w1, [x8]
	ldr	w2, [x20, #16]
	bl	_write_rreg
	ldr	w0, [x19, #8]
	ldr	w1, [x21]
	mov	w2, #0
	bl	_write_rreg
	ldr	w0, [x19, #8]
	ldr	w1, [x24]
	ldr	w2, [x25]
	bl	_write_rreg
	ldr	w0, [x19, #8]
Lloh64:
	adrp	x8, _CSR3@GOTPAGE
Lloh65:
	ldr	x8, [x8, _CSR3@GOTPAGEOFF]
Lloh66:
	ldr	w1, [x8]
Lloh67:
	adrp	x8, _CSR3_IDONM@GOTPAGE
Lloh68:
	ldr	x8, [x8, _CSR3_IDONM@GOTPAGEOFF]
Lloh69:
	ldr	w8, [x8]
Lloh70:
	adrp	x9, _CSR3_BABLM@GOTPAGE
Lloh71:
	ldr	x9, [x9, _CSR3_BABLM@GOTPAGEOFF]
Lloh72:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh73:
	adrp	x9, _CSR3_DXSUFLO@GOTPAGE
Lloh74:
	ldr	x9, [x9, _CSR3_DXSUFLO@GOTPAGEOFF]
Lloh75:
	ldr	w9, [x9]
	orr	w2, w8, w9
	bl	_write_rreg
	ldr	w0, [x19, #8]
Lloh76:
	adrp	x8, _CSR4@GOTPAGE
Lloh77:
	ldr	x8, [x8, _CSR4@GOTPAGEOFF]
Lloh78:
	adrp	x9, _CSR4_APAD_XMIT@GOTPAGE
Lloh79:
	ldr	x9, [x9, _CSR4_APAD_XMIT@GOTPAGEOFF]
Lloh80:
	ldr	w1, [x8]
Lloh81:
	ldr	w8, [x9]
Lloh82:
	adrp	x9, _CSR4_MFCOM@GOTPAGE
Lloh83:
	ldr	x9, [x9, _CSR4_MFCOM@GOTPAGEOFF]
Lloh84:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh85:
	adrp	x9, _CSR4_RCVCCOM@GOTPAGE
Lloh86:
	ldr	x9, [x9, _CSR4_RCVCCOM@GOTPAGEOFF]
Lloh87:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh88:
	adrp	x9, _CSR4_TXSTRTM@GOTPAGE
Lloh89:
	ldr	x9, [x9, _CSR4_TXSTRTM@GOTPAGEOFF]
Lloh90:
	ldr	w9, [x9]
	orr	w8, w8, w9
Lloh91:
	adrp	x9, _CSR4_JABM@GOTPAGE
Lloh92:
	ldr	x9, [x9, _CSR4_JABM@GOTPAGEOFF]
Lloh93:
	ldr	w9, [x9]
	orr	w2, w8, w9
	bl	_write_rreg
	ldr	w0, [x19, #8]
Lloh94:
	adrp	x8, _CSR0_IENA@GOTPAGE
Lloh95:
	ldr	x8, [x8, _CSR0_IENA@GOTPAGEOFF]
	ldr	w1, [x24]
Lloh96:
	ldr	w8, [x8]
Lloh97:
	adrp	x9, _CSR0_STRT@GOTPAGE
Lloh98:
	ldr	x9, [x9, _CSR0_STRT@GOTPAGEOFF]
Lloh99:
	ldr	w9, [x9]
	orr	w2, w9, w8
	bl	_write_rreg
	ldr	x8, [sp, #24]
Lloh100:
	adrp	x9, ___stack_chk_guard@GOTPAGE
Lloh101:
	ldr	x9, [x9, ___stack_chk_guard@GOTPAGEOFF]
Lloh102:
	ldr	x9, [x9]
	cmp	x9, x8
	b.ne	LBB0_16
; %bb.15:
	ldp	x29, x30, [sp, #112]            ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #96]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #80]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #64]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #48]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #32]             ; 16-byte Folded Reload
	add	sp, sp, #128
	ret
LBB0_16:
	bl	___stack_chk_fail
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh100, Lloh101, Lloh102
	.loh AdrpLdrGotLdr	Lloh97, Lloh98, Lloh99
	.loh AdrpLdrGotLdr	Lloh94, Lloh95, Lloh96
	.loh AdrpLdrGotLdr	Lloh91, Lloh92, Lloh93
	.loh AdrpLdrGotLdr	Lloh88, Lloh89, Lloh90
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.loh AdrpLdrGotLdr	Lloh82, Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh78, Lloh79, Lloh81
	.loh AdrpLdrGotLdr	Lloh76, Lloh77, Lloh80
	.loh AdrpLdrGotLdr	Lloh73, Lloh74, Lloh75
	.loh AdrpLdrGotLdr	Lloh70, Lloh71, Lloh72
	.loh AdrpLdrGotLdr	Lloh67, Lloh68, Lloh69
	.loh AdrpLdrGotLdr	Lloh64, Lloh65, Lloh66
	.loh AdrpLdrGotLdr	Lloh61, Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh59, Lloh60
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.cfi_endproc
                                        ; -- End function
	.comm	_CSR0,4,2                       ; @CSR0
	.comm	_CSR0_BABL,4,2                  ; @CSR0_BABL
	.comm	_CSR0_CERR,4,2                  ; @CSR0_CERR
	.comm	_CSR0_MISS,4,2                  ; @CSR0_MISS
	.comm	_CSR0_MERR,4,2                  ; @CSR0_MERR
	.comm	_CSR0_TINT,4,2                  ; @CSR0_TINT
	.comm	_CSR0_RINT,4,2                  ; @CSR0_RINT
	.comm	_CSR0_STOP,4,2                  ; @CSR0_STOP
	.comm	_LADRL,4,2                      ; @LADRL
	.comm	_LADRH,4,2                      ; @LADRH
	.comm	_PADRL,4,2                      ; @PADRL
	.comm	_PADRH,4,2                      ; @PADRH
	.comm	_MODE,4,2                       ; @MODE
	.comm	_POLLINT,4,2                    ; @POLLINT
	.comm	_SIZERXR,4,2                    ; @SIZERXR
	.comm	_RX_BUFFERS,4,2                 ; @RX_BUFFERS
	.comm	_SIZETXR,4,2                    ; @SIZETXR
	.comm	_TX_BUFFERS,4,2                 ; @TX_BUFFERS
	.comm	_RMD_OWN,4,2                    ; @RMD_OWN
	.comm	_TMD_STP,4,2                    ; @TMD_STP
	.comm	_TMD_ENP,4,2                    ; @TMD_ENP
	.comm	_BASERXL,4,2                    ; @BASERXL
	.comm	_BASERXH,4,2                    ; @BASERXH
	.comm	_BASETXL,4,2                    ; @BASETXL
	.comm	_CSR3,4,2                       ; @CSR3
	.comm	_CSR3_IDONM,4,2                 ; @CSR3_IDONM
	.comm	_CSR3_BABLM,4,2                 ; @CSR3_BABLM
	.comm	_CSR3_DXSUFLO,4,2               ; @CSR3_DXSUFLO
	.comm	_CSR4,4,2                       ; @CSR4
	.comm	_CSR4_APAD_XMIT,4,2             ; @CSR4_APAD_XMIT
	.comm	_CSR4_MFCOM,4,2                 ; @CSR4_MFCOM
	.comm	_CSR4_RCVCCOM,4,2               ; @CSR4_RCVCCOM
	.comm	_CSR4_TXSTRTM,4,2               ; @CSR4_TXSTRTM
	.comm	_CSR4_JABM,4,2                  ; @CSR4_JABM
	.comm	_CSR0_IENA,4,2                  ; @CSR0_IENA
	.comm	_CSR0_STRT,4,2                  ; @CSR0_STRT
	.no_dead_strip	_am79c961_init_for_open
.subsections_via_symbols
