	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function nps_enet_hw_enable_control
_nps_enet_hw_enable_control:            ## @nps_enet_hw_enable_control
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	callq	_netdev_priv
	movq	%rax, %r14
	movq	_CFG_2_STAT_EN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	(%r14), %eax
	movq	_NPS_ENET_GE_MAC_CFG_2_STAT_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	_CFG_2_STAT_EN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%eax, %edx
	movl	%edx, (%r14)
	movq	_CFG_2_DISK_DA_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%edx, %eax
	movq	_NPS_ENET_ENABLE@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	_CFG_2_DISK_DA_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%eax, %edx
	movl	%edx, (%r14)
	movq	_CFG_2_DISK_MC_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%edx, %eax
	movl	(%r15), %edx
	movq	_CFG_2_DISK_MC_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%eax, %edx
	movl	%edx, (%r14)
	movq	_NPS_ENET_REG_GE_MAC_CFG_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_nps_enet_reg_set
	movq	_ETH_HLEN@GOTPCREL(%rip), %rcx
	movl	(%rbx), %eax
	addl	(%rcx), %eax
	movq	_ETH_FCS_LEN@GOTPCREL(%rip), %rcx
	addl	(%rcx), %eax
	movq	_NPS_ENET_MAX_FRAME_LENGTH@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jg	LBB0_2
## %bb.1:
	movq	_CFG_3_MAX_LEN_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	notl	%edx
	movq	_CFG_3_MAX_LEN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	andl	4(%r14), %edx
	orl	%edx, %eax
	movl	%eax, 4(%r14)
LBB0_2:
	movl	(%r15), %edx
	movq	_RX_RDY_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%edx, %eax
	shll	%cl, %eax
	movq	_TX_DONE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	orl	%eax, %edx
	movq	_NPS_ENET_REG_BUF_INT_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_nps_enet_reg_set
	movq	%rbx, %rdi
	callq	_nps_enet_set_hw_mac_address
	movl	(%r15), %r15d
	movq	_CFG_0_TX_PAD_EN_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r15d, %r8d
	shll	%cl, %r8d
	movq	_CFG_0_TX_CRC_EN_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r15d, %edx
	shll	%cl, %edx
	movq	_CFG_0_RX_CRC_STRIP_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%r15d, %edi
	shll	%cl, %edi
	movq	_NPS_ENET_GE_MAC_CFG_0_RX_IFG@GOTPCREL(%rip), %rax
	movl	(%rax), %r10d
	movq	_CFG_0_RX_IFG_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r10d
	movq	_NPS_ENET_GE_MAC_CFG_0_TX_IFG@GOTPCREL(%rip), %rcx
	movl	(%rcx), %r9d
	movq	_CFG_0_TX_IFG_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %r9d
	movq	_CFG_0_RX_PR_CHECK_EN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%r15d, %ebx
	shll	%cl, %ebx
	movq	_CFG_0_TX_PR_LEN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN@GOTPCREL(%rip), %rsi
	movl	(%rsi), %esi
	shll	%cl, %esi
	orl	%r8d, %edx
	orl	%edi, %r10d
	movq	_CFG_0_TX_FC_EN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%r15d, %r8d
	shll	%cl, %r8d
	movq	_CFG_0_RX_FC_EN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%r15d, %edi
	shll	%cl, %edi
	orl	%edx, %r10d
	movq	_CFG_0_TX_FC_RETR_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movq	_NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR@GOTPCREL(%rip), %rdx
	movl	(%rdx), %eax
	shll	%cl, %eax
	orl	%r9d, %ebx
	orl	%ebx, %esi
	movq	_CFG_3_CF_DROP_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ebx
	notl	%ebx
	andl	4(%r14), %ebx
	movq	_CFG_3_CF_DROP_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%r15d, %edx
	shll	%cl, %edx
	orl	%r10d, %esi
	orl	%ebx, %edx
	movl	%edx, 4(%r14)
	movq	_CFG_0_RX_EN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	%r15d, %ebx
	shll	%cl, %ebx
	orl	%r8d, %edi
	orl	%edi, %eax
	orl	%eax, %ebx
	movq	_CFG_0_TX_EN_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r15d
	orl	%esi, %ebx
	orl	%ebx, %r15d
	movq	_NPS_ENET_REG_GE_MAC_CFG_3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_nps_enet_reg_set
	movq	_NPS_ENET_REG_GE_MAC_CFG_0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_nps_enet_reg_set               ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_CFG_2_STAT_EN_MASK,4,2         ## @CFG_2_STAT_EN_MASK
	.comm	_NPS_ENET_GE_MAC_CFG_2_STAT_EN,4,2 ## @NPS_ENET_GE_MAC_CFG_2_STAT_EN
	.comm	_CFG_2_STAT_EN_SHIFT,4,2        ## @CFG_2_STAT_EN_SHIFT
	.comm	_CFG_2_DISK_DA_MASK,4,2         ## @CFG_2_DISK_DA_MASK
	.comm	_NPS_ENET_ENABLE,4,2            ## @NPS_ENET_ENABLE
	.comm	_CFG_2_DISK_DA_SHIFT,4,2        ## @CFG_2_DISK_DA_SHIFT
	.comm	_CFG_2_DISK_MC_MASK,4,2         ## @CFG_2_DISK_MC_MASK
	.comm	_CFG_2_DISK_MC_SHIFT,4,2        ## @CFG_2_DISK_MC_SHIFT
	.comm	_NPS_ENET_REG_GE_MAC_CFG_2,4,2  ## @NPS_ENET_REG_GE_MAC_CFG_2
	.comm	_ETH_HLEN,4,2                   ## @ETH_HLEN
	.comm	_ETH_FCS_LEN,4,2                ## @ETH_FCS_LEN
	.comm	_NPS_ENET_MAX_FRAME_LENGTH,4,2  ## @NPS_ENET_MAX_FRAME_LENGTH
	.comm	_CFG_3_MAX_LEN_MASK,4,2         ## @CFG_3_MAX_LEN_MASK
	.comm	_CFG_3_MAX_LEN_SHIFT,4,2        ## @CFG_3_MAX_LEN_SHIFT
	.comm	_RX_RDY_SHIFT,4,2               ## @RX_RDY_SHIFT
	.comm	_TX_DONE_SHIFT,4,2              ## @TX_DONE_SHIFT
	.comm	_NPS_ENET_REG_BUF_INT_ENABLE,4,2 ## @NPS_ENET_REG_BUF_INT_ENABLE
	.comm	_CFG_0_TX_PAD_EN_SHIFT,4,2      ## @CFG_0_TX_PAD_EN_SHIFT
	.comm	_CFG_0_TX_CRC_EN_SHIFT,4,2      ## @CFG_0_TX_CRC_EN_SHIFT
	.comm	_CFG_0_RX_CRC_STRIP_SHIFT,4,2   ## @CFG_0_RX_CRC_STRIP_SHIFT
	.comm	_NPS_ENET_GE_MAC_CFG_0_RX_IFG,4,2 ## @NPS_ENET_GE_MAC_CFG_0_RX_IFG
	.comm	_CFG_0_RX_IFG_SHIFT,4,2         ## @CFG_0_RX_IFG_SHIFT
	.comm	_NPS_ENET_GE_MAC_CFG_0_TX_IFG,4,2 ## @NPS_ENET_GE_MAC_CFG_0_TX_IFG
	.comm	_CFG_0_TX_IFG_SHIFT,4,2         ## @CFG_0_TX_IFG_SHIFT
	.comm	_CFG_0_RX_PR_CHECK_EN_SHIFT,4,2 ## @CFG_0_RX_PR_CHECK_EN_SHIFT
	.comm	_NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN,4,2 ## @NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN
	.comm	_CFG_0_TX_PR_LEN_SHIFT,4,2      ## @CFG_0_TX_PR_LEN_SHIFT
	.comm	_CFG_0_TX_FC_EN_SHIFT,4,2       ## @CFG_0_TX_FC_EN_SHIFT
	.comm	_CFG_0_RX_FC_EN_SHIFT,4,2       ## @CFG_0_RX_FC_EN_SHIFT
	.comm	_NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR,4,2 ## @NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR
	.comm	_CFG_0_TX_FC_RETR_SHIFT,4,2     ## @CFG_0_TX_FC_RETR_SHIFT
	.comm	_CFG_3_CF_DROP_MASK,4,2         ## @CFG_3_CF_DROP_MASK
	.comm	_CFG_3_CF_DROP_SHIFT,4,2        ## @CFG_3_CF_DROP_SHIFT
	.comm	_CFG_0_RX_EN_SHIFT,4,2          ## @CFG_0_RX_EN_SHIFT
	.comm	_CFG_0_TX_EN_SHIFT,4,2          ## @CFG_0_TX_EN_SHIFT
	.comm	_NPS_ENET_REG_GE_MAC_CFG_3,4,2  ## @NPS_ENET_REG_GE_MAC_CFG_3
	.comm	_NPS_ENET_REG_GE_MAC_CFG_0,4,2  ## @NPS_ENET_REG_GE_MAC_CFG_0
	.no_dead_strip	_nps_enet_hw_enable_control
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function nps_enet_hw_enable_control
_nps_enet_hw_enable_control:            ; @nps_enet_hw_enable_control
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	bl	_netdev_priv
	mov	x19, x0
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _CFG_2_STAT_EN_MASK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CFG_2_STAT_EN_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	bic	w8, w8, w9
Lloh3:
	adrp	x9, _NPS_ENET_GE_MAC_CFG_2_STAT_EN@GOTPAGE
Lloh4:
	ldr	x9, [x9, _NPS_ENET_GE_MAC_CFG_2_STAT_EN@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
Lloh6:
	adrp	x10, _CFG_2_STAT_EN_SHIFT@GOTPAGE
Lloh7:
	ldr	x10, [x10, _CFG_2_STAT_EN_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
	str	w8, [x0]
Lloh9:
	adrp	x9, _CFG_2_DISK_DA_MASK@GOTPAGE
Lloh10:
	ldr	x9, [x9, _CFG_2_DISK_DA_MASK@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	bic	w8, w8, w9
Lloh12:
	adrp	x21, _NPS_ENET_ENABLE@GOTPAGE
Lloh13:
	ldr	x21, [x21, _NPS_ENET_ENABLE@GOTPAGEOFF]
	ldr	w9, [x21]
Lloh14:
	adrp	x10, _CFG_2_DISK_DA_SHIFT@GOTPAGE
Lloh15:
	ldr	x10, [x10, _CFG_2_DISK_DA_SHIFT@GOTPAGEOFF]
Lloh16:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w9, w8
	str	w8, [x0]
Lloh17:
	adrp	x9, _CFG_2_DISK_MC_MASK@GOTPAGE
Lloh18:
	ldr	x9, [x9, _CFG_2_DISK_MC_MASK@GOTPAGEOFF]
Lloh19:
	ldr	w9, [x9]
	bic	w8, w8, w9
	ldr	w9, [x21]
Lloh20:
	adrp	x10, _CFG_2_DISK_MC_SHIFT@GOTPAGE
Lloh21:
	ldr	x10, [x10, _CFG_2_DISK_MC_SHIFT@GOTPAGEOFF]
Lloh22:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w2, w9, w8
	str	w2, [x0]
Lloh23:
	adrp	x8, _NPS_ENET_REG_GE_MAC_CFG_2@GOTPAGE
Lloh24:
	ldr	x8, [x8, _NPS_ENET_REG_GE_MAC_CFG_2@GOTPAGEOFF]
Lloh25:
	ldr	w1, [x8]
	bl	_nps_enet_reg_set
Lloh26:
	adrp	x8, _ETH_HLEN@GOTPAGE
Lloh27:
	ldr	x8, [x8, _ETH_HLEN@GOTPAGEOFF]
Lloh28:
	ldr	w8, [x8]
	ldr	w9, [x20]
Lloh29:
	adrp	x10, _ETH_FCS_LEN@GOTPAGE
Lloh30:
	ldr	x10, [x10, _ETH_FCS_LEN@GOTPAGEOFF]
Lloh31:
	ldr	w10, [x10]
	add	w8, w9, w8
	add	w8, w8, w10
Lloh32:
	adrp	x9, _NPS_ENET_MAX_FRAME_LENGTH@GOTPAGE
Lloh33:
	ldr	x9, [x9, _NPS_ENET_MAX_FRAME_LENGTH@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	cmp	w8, w9
	b.gt	LBB0_2
; %bb.1:
	ldr	w9, [x19, #4]
Lloh35:
	adrp	x10, _CFG_3_MAX_LEN_MASK@GOTPAGE
Lloh36:
	ldr	x10, [x10, _CFG_3_MAX_LEN_MASK@GOTPAGEOFF]
Lloh37:
	ldr	w10, [x10]
	bic	w9, w9, w10
Lloh38:
	adrp	x10, _CFG_3_MAX_LEN_SHIFT@GOTPAGE
Lloh39:
	ldr	x10, [x10, _CFG_3_MAX_LEN_SHIFT@GOTPAGEOFF]
Lloh40:
	ldr	w10, [x10]
	lsl	w8, w8, w10
	orr	w8, w8, w9
	str	w8, [x19, #4]
LBB0_2:
	ldr	w8, [x21]
Lloh41:
	adrp	x9, _RX_RDY_SHIFT@GOTPAGE
Lloh42:
	ldr	x9, [x9, _RX_RDY_SHIFT@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	lsl	w9, w8, w9
Lloh44:
	adrp	x10, _TX_DONE_SHIFT@GOTPAGE
Lloh45:
	ldr	x10, [x10, _TX_DONE_SHIFT@GOTPAGEOFF]
Lloh46:
	ldr	w10, [x10]
	lsl	w8, w8, w10
	orr	w2, w8, w9
Lloh47:
	adrp	x8, _NPS_ENET_REG_BUF_INT_ENABLE@GOTPAGE
Lloh48:
	ldr	x8, [x8, _NPS_ENET_REG_BUF_INT_ENABLE@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_nps_enet_reg_set
	mov	x0, x20
	bl	_nps_enet_set_hw_mac_address
Lloh50:
	adrp	x9, _CFG_0_TX_PAD_EN_SHIFT@GOTPAGE
Lloh51:
	ldr	x9, [x9, _CFG_0_TX_PAD_EN_SHIFT@GOTPAGEOFF]
	ldr	w8, [x21]
Lloh52:
	ldr	w9, [x9]
	lsl	w9, w8, w9
Lloh53:
	adrp	x10, _CFG_0_TX_CRC_EN_SHIFT@GOTPAGE
Lloh54:
	ldr	x10, [x10, _CFG_0_TX_CRC_EN_SHIFT@GOTPAGEOFF]
Lloh55:
	ldr	w10, [x10]
	lsl	w10, w8, w10
	orr	w9, w10, w9
Lloh56:
	adrp	x10, _CFG_0_RX_CRC_STRIP_SHIFT@GOTPAGE
Lloh57:
	ldr	x10, [x10, _CFG_0_RX_CRC_STRIP_SHIFT@GOTPAGEOFF]
Lloh58:
	ldr	w10, [x10]
	lsl	w10, w8, w10
	orr	w9, w9, w10
Lloh59:
	adrp	x10, _NPS_ENET_GE_MAC_CFG_0_RX_IFG@GOTPAGE
Lloh60:
	ldr	x10, [x10, _NPS_ENET_GE_MAC_CFG_0_RX_IFG@GOTPAGEOFF]
Lloh61:
	ldr	w10, [x10]
Lloh62:
	adrp	x11, _CFG_0_RX_IFG_SHIFT@GOTPAGE
Lloh63:
	ldr	x11, [x11, _CFG_0_RX_IFG_SHIFT@GOTPAGEOFF]
Lloh64:
	ldr	w11, [x11]
	lsl	w10, w10, w11
	orr	w9, w9, w10
Lloh65:
	adrp	x10, _NPS_ENET_GE_MAC_CFG_0_TX_IFG@GOTPAGE
Lloh66:
	ldr	x10, [x10, _NPS_ENET_GE_MAC_CFG_0_TX_IFG@GOTPAGEOFF]
Lloh67:
	ldr	w10, [x10]
Lloh68:
	adrp	x11, _CFG_0_TX_IFG_SHIFT@GOTPAGE
Lloh69:
	ldr	x11, [x11, _CFG_0_TX_IFG_SHIFT@GOTPAGEOFF]
Lloh70:
	ldr	w11, [x11]
	lsl	w10, w10, w11
Lloh71:
	adrp	x11, _CFG_0_RX_PR_CHECK_EN_SHIFT@GOTPAGE
Lloh72:
	ldr	x11, [x11, _CFG_0_RX_PR_CHECK_EN_SHIFT@GOTPAGEOFF]
	orr	w9, w9, w10
Lloh73:
	ldr	w10, [x11]
	lsl	w10, w8, w10
	orr	w9, w9, w10
Lloh74:
	adrp	x10, _NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN@GOTPAGE
Lloh75:
	ldr	x10, [x10, _NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN@GOTPAGEOFF]
Lloh76:
	ldr	w10, [x10]
Lloh77:
	adrp	x11, _CFG_0_TX_PR_LEN_SHIFT@GOTPAGE
Lloh78:
	ldr	x11, [x11, _CFG_0_TX_PR_LEN_SHIFT@GOTPAGEOFF]
Lloh79:
	ldr	w11, [x11]
	lsl	w10, w10, w11
	orr	w9, w9, w10
Lloh80:
	adrp	x10, _CFG_0_TX_FC_EN_SHIFT@GOTPAGE
Lloh81:
	ldr	x10, [x10, _CFG_0_TX_FC_EN_SHIFT@GOTPAGEOFF]
Lloh82:
	ldr	w10, [x10]
	lsl	w10, w8, w10
Lloh83:
	adrp	x11, _CFG_0_RX_FC_EN_SHIFT@GOTPAGE
Lloh84:
	ldr	x11, [x11, _CFG_0_RX_FC_EN_SHIFT@GOTPAGEOFF]
	orr	w9, w9, w10
Lloh85:
	ldr	w10, [x11]
	lsl	w10, w8, w10
	orr	w9, w9, w10
Lloh86:
	adrp	x10, _NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR@GOTPAGE
Lloh87:
	ldr	x10, [x10, _NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR@GOTPAGEOFF]
Lloh88:
	ldr	w10, [x10]
Lloh89:
	adrp	x11, _CFG_0_TX_FC_RETR_SHIFT@GOTPAGE
Lloh90:
	ldr	x11, [x11, _CFG_0_TX_FC_RETR_SHIFT@GOTPAGEOFF]
Lloh91:
	ldr	w11, [x11]
	lsl	w10, w10, w11
	orr	w9, w9, w10
	ldr	w10, [x19, #4]
Lloh92:
	adrp	x11, _CFG_3_CF_DROP_MASK@GOTPAGE
Lloh93:
	ldr	x11, [x11, _CFG_3_CF_DROP_MASK@GOTPAGEOFF]
Lloh94:
	ldr	w11, [x11]
Lloh95:
	adrp	x12, _CFG_3_CF_DROP_SHIFT@GOTPAGE
Lloh96:
	ldr	x12, [x12, _CFG_3_CF_DROP_SHIFT@GOTPAGEOFF]
	bic	w10, w10, w11
Lloh97:
	ldr	w11, [x12]
	lsl	w11, w8, w11
	orr	w2, w11, w10
Lloh98:
	adrp	x10, _CFG_0_RX_EN_SHIFT@GOTPAGE
Lloh99:
	ldr	x10, [x10, _CFG_0_RX_EN_SHIFT@GOTPAGEOFF]
	str	w2, [x19, #4]
Lloh100:
	ldr	w10, [x10]
	lsl	w10, w8, w10
	orr	w9, w9, w10
Lloh101:
	adrp	x10, _CFG_0_TX_EN_SHIFT@GOTPAGE
Lloh102:
	ldr	x10, [x10, _CFG_0_TX_EN_SHIFT@GOTPAGEOFF]
Lloh103:
	ldr	w10, [x10]
	lsl	w8, w8, w10
	orr	w20, w9, w8
Lloh104:
	adrp	x8, _NPS_ENET_REG_GE_MAC_CFG_3@GOTPAGE
Lloh105:
	ldr	x8, [x8, _NPS_ENET_REG_GE_MAC_CFG_3@GOTPAGEOFF]
Lloh106:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_nps_enet_reg_set
Lloh107:
	adrp	x8, _NPS_ENET_REG_GE_MAC_CFG_0@GOTPAGE
Lloh108:
	ldr	x8, [x8, _NPS_ENET_REG_GE_MAC_CFG_0@GOTPAGEOFF]
Lloh109:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_nps_enet_reg_set
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh107, Lloh108, Lloh109
	.loh AdrpLdrGotLdr	Lloh104, Lloh105, Lloh106
	.loh AdrpLdrGotLdr	Lloh101, Lloh102, Lloh103
	.loh AdrpLdrGotLdr	Lloh98, Lloh99, Lloh100
	.loh AdrpLdrGotLdr	Lloh95, Lloh96, Lloh97
	.loh AdrpLdrGotLdr	Lloh92, Lloh93, Lloh94
	.loh AdrpLdrGotLdr	Lloh89, Lloh90, Lloh91
	.loh AdrpLdrGotLdr	Lloh86, Lloh87, Lloh88
	.loh AdrpLdrGotLdr	Lloh83, Lloh84, Lloh85
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.cfi_endproc
                                        ; -- End function
	.comm	_CFG_2_STAT_EN_MASK,4,2         ; @CFG_2_STAT_EN_MASK
	.comm	_NPS_ENET_GE_MAC_CFG_2_STAT_EN,4,2 ; @NPS_ENET_GE_MAC_CFG_2_STAT_EN
	.comm	_CFG_2_STAT_EN_SHIFT,4,2        ; @CFG_2_STAT_EN_SHIFT
	.comm	_CFG_2_DISK_DA_MASK,4,2         ; @CFG_2_DISK_DA_MASK
	.comm	_NPS_ENET_ENABLE,4,2            ; @NPS_ENET_ENABLE
	.comm	_CFG_2_DISK_DA_SHIFT,4,2        ; @CFG_2_DISK_DA_SHIFT
	.comm	_CFG_2_DISK_MC_MASK,4,2         ; @CFG_2_DISK_MC_MASK
	.comm	_CFG_2_DISK_MC_SHIFT,4,2        ; @CFG_2_DISK_MC_SHIFT
	.comm	_NPS_ENET_REG_GE_MAC_CFG_2,4,2  ; @NPS_ENET_REG_GE_MAC_CFG_2
	.comm	_ETH_HLEN,4,2                   ; @ETH_HLEN
	.comm	_ETH_FCS_LEN,4,2                ; @ETH_FCS_LEN
	.comm	_NPS_ENET_MAX_FRAME_LENGTH,4,2  ; @NPS_ENET_MAX_FRAME_LENGTH
	.comm	_CFG_3_MAX_LEN_MASK,4,2         ; @CFG_3_MAX_LEN_MASK
	.comm	_CFG_3_MAX_LEN_SHIFT,4,2        ; @CFG_3_MAX_LEN_SHIFT
	.comm	_RX_RDY_SHIFT,4,2               ; @RX_RDY_SHIFT
	.comm	_TX_DONE_SHIFT,4,2              ; @TX_DONE_SHIFT
	.comm	_NPS_ENET_REG_BUF_INT_ENABLE,4,2 ; @NPS_ENET_REG_BUF_INT_ENABLE
	.comm	_CFG_0_TX_PAD_EN_SHIFT,4,2      ; @CFG_0_TX_PAD_EN_SHIFT
	.comm	_CFG_0_TX_CRC_EN_SHIFT,4,2      ; @CFG_0_TX_CRC_EN_SHIFT
	.comm	_CFG_0_RX_CRC_STRIP_SHIFT,4,2   ; @CFG_0_RX_CRC_STRIP_SHIFT
	.comm	_NPS_ENET_GE_MAC_CFG_0_RX_IFG,4,2 ; @NPS_ENET_GE_MAC_CFG_0_RX_IFG
	.comm	_CFG_0_RX_IFG_SHIFT,4,2         ; @CFG_0_RX_IFG_SHIFT
	.comm	_NPS_ENET_GE_MAC_CFG_0_TX_IFG,4,2 ; @NPS_ENET_GE_MAC_CFG_0_TX_IFG
	.comm	_CFG_0_TX_IFG_SHIFT,4,2         ; @CFG_0_TX_IFG_SHIFT
	.comm	_CFG_0_RX_PR_CHECK_EN_SHIFT,4,2 ; @CFG_0_RX_PR_CHECK_EN_SHIFT
	.comm	_NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN,4,2 ; @NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN
	.comm	_CFG_0_TX_PR_LEN_SHIFT,4,2      ; @CFG_0_TX_PR_LEN_SHIFT
	.comm	_CFG_0_TX_FC_EN_SHIFT,4,2       ; @CFG_0_TX_FC_EN_SHIFT
	.comm	_CFG_0_RX_FC_EN_SHIFT,4,2       ; @CFG_0_RX_FC_EN_SHIFT
	.comm	_NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR,4,2 ; @NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR
	.comm	_CFG_0_TX_FC_RETR_SHIFT,4,2     ; @CFG_0_TX_FC_RETR_SHIFT
	.comm	_CFG_3_CF_DROP_MASK,4,2         ; @CFG_3_CF_DROP_MASK
	.comm	_CFG_3_CF_DROP_SHIFT,4,2        ; @CFG_3_CF_DROP_SHIFT
	.comm	_CFG_0_RX_EN_SHIFT,4,2          ; @CFG_0_RX_EN_SHIFT
	.comm	_CFG_0_TX_EN_SHIFT,4,2          ; @CFG_0_TX_EN_SHIFT
	.comm	_NPS_ENET_REG_GE_MAC_CFG_3,4,2  ; @NPS_ENET_REG_GE_MAC_CFG_3
	.comm	_NPS_ENET_REG_GE_MAC_CFG_0,4,2  ; @NPS_ENET_REG_GE_MAC_CFG_0
	.no_dead_strip	_nps_enet_hw_enable_control
.subsections_via_symbols
