	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function typhoon_init_interface
_typhoon_init_interface:                ## @typhoon_init_interface
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	56(%rdi), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$4, %edx
	callq	_memset
	movl	(%r15), %ebx
	movq	_indexes@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_shared_offset
	addl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, 184(%r14)
	movl	(%r15), %ebx
	movq	_txLo@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_shared_offset
	addl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, 64(%r14)
	movq	_TXLO_ENTRIES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	shll	$2, %edi
	callq	_cpu_to_le32
	movq	%rax, 176(%r14)
	movl	(%r15), %ebx
	movq	_txHi@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_shared_offset
	addl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, 168(%r14)
	movq	_TXHI_ENTRIES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	shll	$2, %edi
	callq	_cpu_to_le32
	movq	%rax, 160(%r14)
	movl	(%r15), %ebx
	movq	_rxBuff@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_shared_offset
	addl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, 152(%r14)
	movq	_RXFREE_ENTRIES@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	shll	$2, %edi
	callq	_cpu_to_le32
	movq	%rax, 144(%r14)
	movl	(%r15), %ebx
	movq	_rxLo@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_shared_offset
	addl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, 136(%r14)
	movq	_RX_ENTRIES@GOTPCREL(%rip), %r12
	movl	(%r12), %edi
	shll	$2, %edi
	callq	_cpu_to_le32
	movq	%rax, 128(%r14)
	movl	(%r15), %ebx
	movq	_rxHi@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_shared_offset
	addl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, 120(%r14)
	movl	(%r12), %edi
	shll	$2, %edi
	callq	_cpu_to_le32
	movq	%rax, 112(%r14)
	movl	(%r15), %ebx
	movq	_cmd@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_shared_offset
	addl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, 104(%r14)
	movq	_COMMAND_RING_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le32
	movq	%rax, 96(%r14)
	movl	(%r15), %ebx
	movq	_resp@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_shared_offset
	addl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, 88(%r14)
	movq	_RESPONSE_RING_SIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_cpu_to_le32
	movq	%rax, 80(%r14)
	movl	(%r15), %ebx
	movq	_zeroWord@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	callq	_shared_offset
	addl	%eax, %ebx
	movl	%ebx, %edi
	callq	_cpu_to_le32
	movq	%rax, 72(%r14)
	movq	56(%r15), %rax
	leaq	56(%rax), %rcx
	movq	%rcx, 104(%r15)
	movq	48(%rax), %rcx
	movq	%rcx, 48(%r15)
	movq	40(%rax), %rcx
	movq	%rcx, 32(%r15)
	movq	32(%rax), %rcx
	movq	%rcx, 96(%r15)
	movups	16(%rax), %xmm0
	movups	%xmm0, 80(%r15)
	movups	(%rax), %xmm0
	movups	%xmm0, 64(%r15)
	movq	_TYPHOON_REG_TX_LO_READY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%r15)
	movq	_TYPHOON_REG_TX_HI_READY@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%r15)
	movq	64(%r14), %rdi
	callq	_le32_to_cpu
	movl	%eax, 16(%r15)
	movq	_Sleeping@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 12(%r15)
	movq	_TYPHOON_OFFLOAD_IP_CHKSUM@GOTPCREL(%rip), %rax
	movq	_TYPHOON_OFFLOAD_TCP_CHKSUM@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	_TYPHOON_OFFLOAD_UDP_CHKSUM@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_TSO_OFFLOAD_ON@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movq	_TYPHOON_OFFLOAD_VLAN@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	%ecx, 4(%r15)
	addq	$8, %r15
	movq	%r15, %rdi
	callq	_spin_lock_init
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_wmb                            ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_indexes,4,2                    ## @indexes
	.comm	_txLo,4,2                       ## @txLo
	.comm	_TXLO_ENTRIES,4,2               ## @TXLO_ENTRIES
	.comm	_txHi,4,2                       ## @txHi
	.comm	_TXHI_ENTRIES,4,2               ## @TXHI_ENTRIES
	.comm	_rxBuff,4,2                     ## @rxBuff
	.comm	_RXFREE_ENTRIES,4,2             ## @RXFREE_ENTRIES
	.comm	_rxLo,4,2                       ## @rxLo
	.comm	_RX_ENTRIES,4,2                 ## @RX_ENTRIES
	.comm	_rxHi,4,2                       ## @rxHi
	.comm	_cmd,4,2                        ## @cmd
	.comm	_COMMAND_RING_SIZE,4,2          ## @COMMAND_RING_SIZE
	.comm	_resp,4,2                       ## @resp
	.comm	_RESPONSE_RING_SIZE,4,2         ## @RESPONSE_RING_SIZE
	.comm	_zeroWord,4,2                   ## @zeroWord
	.comm	_TYPHOON_REG_TX_LO_READY,4,2    ## @TYPHOON_REG_TX_LO_READY
	.comm	_TYPHOON_REG_TX_HI_READY,4,2    ## @TYPHOON_REG_TX_HI_READY
	.comm	_Sleeping,4,2                   ## @Sleeping
	.comm	_TYPHOON_OFFLOAD_IP_CHKSUM,4,2  ## @TYPHOON_OFFLOAD_IP_CHKSUM
	.comm	_TYPHOON_OFFLOAD_TCP_CHKSUM,4,2 ## @TYPHOON_OFFLOAD_TCP_CHKSUM
	.comm	_TYPHOON_OFFLOAD_UDP_CHKSUM,4,2 ## @TYPHOON_OFFLOAD_UDP_CHKSUM
	.comm	_TSO_OFFLOAD_ON,4,2             ## @TSO_OFFLOAD_ON
	.comm	_TYPHOON_OFFLOAD_VLAN,4,2       ## @TYPHOON_OFFLOAD_VLAN
	.no_dead_strip	_typhoon_init_interface
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function typhoon_init_interface
_typhoon_init_interface:                ; @typhoon_init_interface
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x20, [x0, #56]
	mov	x0, x20
	mov	w1, #0
	mov	w2, #4
	bl	_memset
	ldr	w21, [x19]
Lloh0:
	adrp	x8, _indexes@GOTPAGE
Lloh1:
	ldr	x8, [x8, _indexes@GOTPAGEOFF]
Lloh2:
	ldr	w0, [x8]
	bl	_shared_offset
	add	w0, w0, w21
	bl	_cpu_to_le32
	str	x0, [x20, #184]
	ldr	w21, [x19]
Lloh3:
	adrp	x8, _txLo@GOTPAGE
Lloh4:
	ldr	x8, [x8, _txLo@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	bl	_shared_offset
	add	w0, w0, w21
	bl	_cpu_to_le32
	str	x0, [x20, #64]
Lloh6:
	adrp	x8, _TXLO_ENTRIES@GOTPAGE
Lloh7:
	ldr	x8, [x8, _TXLO_ENTRIES@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	lsl	w0, w8, #2
	bl	_cpu_to_le32
	str	x0, [x20, #176]
	ldr	w21, [x19]
Lloh9:
	adrp	x8, _txHi@GOTPAGE
Lloh10:
	ldr	x8, [x8, _txHi@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	bl	_shared_offset
	add	w0, w0, w21
	bl	_cpu_to_le32
	str	x0, [x20, #168]
Lloh12:
	adrp	x8, _TXHI_ENTRIES@GOTPAGE
Lloh13:
	ldr	x8, [x8, _TXHI_ENTRIES@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	lsl	w0, w8, #2
	bl	_cpu_to_le32
	str	x0, [x20, #160]
	ldr	w21, [x19]
Lloh15:
	adrp	x8, _rxBuff@GOTPAGE
Lloh16:
	ldr	x8, [x8, _rxBuff@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	bl	_shared_offset
	add	w0, w0, w21
	bl	_cpu_to_le32
	str	x0, [x20, #152]
Lloh18:
	adrp	x8, _RXFREE_ENTRIES@GOTPAGE
Lloh19:
	ldr	x8, [x8, _RXFREE_ENTRIES@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	lsl	w0, w8, #2
	bl	_cpu_to_le32
	str	x0, [x20, #144]
	ldr	w21, [x19]
Lloh21:
	adrp	x8, _rxLo@GOTPAGE
Lloh22:
	ldr	x8, [x8, _rxLo@GOTPAGEOFF]
Lloh23:
	ldr	w0, [x8]
	bl	_shared_offset
	add	w0, w0, w21
	bl	_cpu_to_le32
	str	x0, [x20, #136]
Lloh24:
	adrp	x21, _RX_ENTRIES@GOTPAGE
Lloh25:
	ldr	x21, [x21, _RX_ENTRIES@GOTPAGEOFF]
	ldr	w8, [x21]
	lsl	w0, w8, #2
	bl	_cpu_to_le32
	str	x0, [x20, #128]
	ldr	w22, [x19]
Lloh26:
	adrp	x8, _rxHi@GOTPAGE
Lloh27:
	ldr	x8, [x8, _rxHi@GOTPAGEOFF]
Lloh28:
	ldr	w0, [x8]
	bl	_shared_offset
	add	w0, w0, w22
	bl	_cpu_to_le32
	str	x0, [x20, #120]
	ldr	w8, [x21]
	lsl	w0, w8, #2
	bl	_cpu_to_le32
	str	x0, [x20, #112]
	ldr	w21, [x19]
Lloh29:
	adrp	x8, _cmd@GOTPAGE
Lloh30:
	ldr	x8, [x8, _cmd@GOTPAGEOFF]
Lloh31:
	ldr	w0, [x8]
	bl	_shared_offset
	add	w0, w0, w21
	bl	_cpu_to_le32
	str	x0, [x20, #104]
Lloh32:
	adrp	x8, _COMMAND_RING_SIZE@GOTPAGE
Lloh33:
	ldr	x8, [x8, _COMMAND_RING_SIZE@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
	bl	_cpu_to_le32
	str	x0, [x20, #96]
	ldr	w21, [x19]
Lloh35:
	adrp	x8, _resp@GOTPAGE
Lloh36:
	ldr	x8, [x8, _resp@GOTPAGEOFF]
Lloh37:
	ldr	w0, [x8]
	bl	_shared_offset
	add	w0, w0, w21
	bl	_cpu_to_le32
	str	x0, [x20, #88]
Lloh38:
	adrp	x8, _RESPONSE_RING_SIZE@GOTPAGE
Lloh39:
	ldr	x8, [x8, _RESPONSE_RING_SIZE@GOTPAGEOFF]
Lloh40:
	ldr	w0, [x8]
	bl	_cpu_to_le32
	str	x0, [x20, #80]
	ldr	w21, [x19]
Lloh41:
	adrp	x8, _zeroWord@GOTPAGE
Lloh42:
	ldr	x8, [x8, _zeroWord@GOTPAGEOFF]
Lloh43:
	ldr	w0, [x8]
	bl	_shared_offset
	add	w0, w0, w21
	bl	_cpu_to_le32
	str	x0, [x20, #72]
	ldr	x8, [x19, #56]
	ldr	x9, [x8, #48]
	str	x9, [x19, #48]
	ldp	x10, x9, [x8, #32]
	str	x9, [x19, #32]
	add	x9, x8, #56
	stp	x10, x9, [x19, #96]
	ldr	q0, [x8, #16]
	str	q0, [x19, #80]
	ldr	q0, [x8]
	str	q0, [x19, #64]
Lloh44:
	adrp	x8, _TYPHOON_REG_TX_LO_READY@GOTPAGE
Lloh45:
	ldr	x8, [x8, _TYPHOON_REG_TX_LO_READY@GOTPAGEOFF]
Lloh46:
	ldr	w8, [x8]
	str	w8, [x19, #40]
Lloh47:
	adrp	x8, _TYPHOON_REG_TX_HI_READY@GOTPAGE
Lloh48:
	ldr	x8, [x8, _TYPHOON_REG_TX_HI_READY@GOTPAGEOFF]
Lloh49:
	ldr	w8, [x8]
	str	w8, [x19, #24]
	ldr	x0, [x20, #64]
	bl	_le32_to_cpu
Lloh50:
	adrp	x8, _Sleeping@GOTPAGE
Lloh51:
	ldr	x8, [x8, _Sleeping@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
	stp	w8, w0, [x19, #12]
Lloh53:
	adrp	x8, _TYPHOON_OFFLOAD_IP_CHKSUM@GOTPAGE
Lloh54:
	ldr	x8, [x8, _TYPHOON_OFFLOAD_IP_CHKSUM@GOTPAGEOFF]
Lloh55:
	ldr	w8, [x8]
Lloh56:
	adrp	x9, _TYPHOON_OFFLOAD_TCP_CHKSUM@GOTPAGE
Lloh57:
	ldr	x9, [x9, _TYPHOON_OFFLOAD_TCP_CHKSUM@GOTPAGEOFF]
Lloh58:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh59:
	adrp	x9, _TYPHOON_OFFLOAD_UDP_CHKSUM@GOTPAGE
Lloh60:
	ldr	x9, [x9, _TYPHOON_OFFLOAD_UDP_CHKSUM@GOTPAGEOFF]
Lloh61:
	ldr	w9, [x9]
Lloh62:
	adrp	x10, _TSO_OFFLOAD_ON@GOTPAGE
Lloh63:
	ldr	x10, [x10, _TSO_OFFLOAD_ON@GOTPAGEOFF]
Lloh64:
	ldr	w10, [x10]
	orr	w8, w9, w8
	orr	w8, w8, w10
Lloh65:
	adrp	x9, _TYPHOON_OFFLOAD_VLAN@GOTPAGE
Lloh66:
	ldr	x9, [x9, _TYPHOON_OFFLOAD_VLAN@GOTPAGEOFF]
Lloh67:
	ldr	w9, [x9]
	orr	w8, w8, w9
	str	w8, [x19, #4]
	add	x0, x19, #8
	bl	_spin_lock_init
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_wmb
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_indexes,4,2                    ; @indexes
	.comm	_txLo,4,2                       ; @txLo
	.comm	_TXLO_ENTRIES,4,2               ; @TXLO_ENTRIES
	.comm	_txHi,4,2                       ; @txHi
	.comm	_TXHI_ENTRIES,4,2               ; @TXHI_ENTRIES
	.comm	_rxBuff,4,2                     ; @rxBuff
	.comm	_RXFREE_ENTRIES,4,2             ; @RXFREE_ENTRIES
	.comm	_rxLo,4,2                       ; @rxLo
	.comm	_RX_ENTRIES,4,2                 ; @RX_ENTRIES
	.comm	_rxHi,4,2                       ; @rxHi
	.comm	_cmd,4,2                        ; @cmd
	.comm	_COMMAND_RING_SIZE,4,2          ; @COMMAND_RING_SIZE
	.comm	_resp,4,2                       ; @resp
	.comm	_RESPONSE_RING_SIZE,4,2         ; @RESPONSE_RING_SIZE
	.comm	_zeroWord,4,2                   ; @zeroWord
	.comm	_TYPHOON_REG_TX_LO_READY,4,2    ; @TYPHOON_REG_TX_LO_READY
	.comm	_TYPHOON_REG_TX_HI_READY,4,2    ; @TYPHOON_REG_TX_HI_READY
	.comm	_Sleeping,4,2                   ; @Sleeping
	.comm	_TYPHOON_OFFLOAD_IP_CHKSUM,4,2  ; @TYPHOON_OFFLOAD_IP_CHKSUM
	.comm	_TYPHOON_OFFLOAD_TCP_CHKSUM,4,2 ; @TYPHOON_OFFLOAD_TCP_CHKSUM
	.comm	_TYPHOON_OFFLOAD_UDP_CHKSUM,4,2 ; @TYPHOON_OFFLOAD_UDP_CHKSUM
	.comm	_TSO_OFFLOAD_ON,4,2             ; @TSO_OFFLOAD_ON
	.comm	_TYPHOON_OFFLOAD_VLAN,4,2       ; @TYPHOON_OFFLOAD_VLAN
	.no_dead_strip	_typhoon_init_interface
.subsections_via_symbols
