	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vpu_clock_enable
_vpu_clock_enable:                      ## @vpu_clock_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	movl	8(%rdi), %edi
	callq	_clk_enable
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	LBB0_4
## %bb.1:
	movq	%rbx, %rdi
	callq	_mutex_lock
	movl	4(%rbx), %eax
	leal	1(%rax), %ecx
	movl	%ecx, 4(%rbx)
	testl	%eax, %eax
	jne	LBB0_3
## %bb.2:
	movq	_VPU_WDT_REG@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_vpu_cfg_readl
	movl	$2147483648, %esi               ## imm = 0x80000000
	orq	%rax, %rsi
	movl	(%r15), %edx
	movq	%rbx, %rdi
	callq	_vpu_cfg_writel
LBB0_3:
	movq	%rbx, %rdi
	callq	_mutex_unlock
LBB0_4:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_VPU_WDT_REG,4,2                ## @VPU_WDT_REG
	.no_dead_strip	_vpu_clock_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vpu_clock_enable
_vpu_clock_enable:                      ; @vpu_clock_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	w0, [x0, #8]
	bl	_clk_enable
	mov	x20, x0
	cbnz	w0, LBB0_4
; %bb.1:
	mov	x0, x19
	bl	_mutex_lock
	ldr	w8, [x19, #4]
	add	w9, w8, #1
	str	w9, [x19, #4]
	cbnz	w8, LBB0_3
; %bb.2:
Lloh0:
	adrp	x21, _VPU_WDT_REG@GOTPAGE
Lloh1:
	ldr	x21, [x21, _VPU_WDT_REG@GOTPAGEOFF]
	ldr	w1, [x21]
	mov	x0, x19
	bl	_vpu_cfg_readl
	orr	x1, x0, #0x80000000
	ldr	w2, [x21]
	mov	x0, x19
	bl	_vpu_cfg_writel
LBB0_3:
	mov	x0, x19
	bl	_mutex_unlock
LBB0_4:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_VPU_WDT_REG,4,2                ; @VPU_WDT_REG
	.no_dead_strip	_vpu_clock_enable
.subsections_via_symbols
