	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function adjust_lcb_for_fpga_serdes
_adjust_lcb_for_fpga_serdes:            ## @adjust_lcb_for_fpga_serdes
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	(%rdi), %rax
	movq	_ICODE_FPGA_EMULATION@GOTPCREL(%rip), %rcx
	cmpq	(%rcx), %rax
	jne	LBB0_14
## %bb.1:
	movq	%rdi, %rbx
	callq	_is_emulator_s
	testq	%rax, %rax
	je	LBB0_2
LBB0_14:
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_2:
	movq	%rbx, %rdi
	callq	_emulator_rev
	movl	%eax, %r14d
	movq	%rbx, %rdi
	callq	_is_ax
	testl	%eax, %eax
	movl	$45, %eax
	cmovnel	%r14d, %eax
	cmpl	$18, %eax
	jg	LBB0_4
## %bb.3:
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$10, %eax
	shlq	%cl, %rax
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$9, %edx
	shlq	%cl, %rdx
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$9, %r14d
	shlq	%cl, %r14
	orq	%rax, %rdx
	orq	%rdx, %r14
	movq	_DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$6, %r15d
	jmp	LBB0_12
LBB0_4:
	cmpl	$24, %eax
	ja	LBB0_6
## %bb.5:
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$9, %eax
	shlq	%cl, %rax
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$8, %edx
	shlq	%cl, %rdx
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$8, %r14d
	shlq	%cl, %r14
	orq	%rax, %rdx
	orq	%rdx, %r14
	movq	_DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$7, %r15d
	jmp	LBB0_12
LBB0_6:
	cmpl	$26, %eax
	je	LBB0_9
## %bb.7:
	cmpl	$25, %eax
	jne	LBB0_10
## %bb.8:
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$10, %eax
	shlq	%cl, %rax
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$9, %edx
	shlq	%cl, %rdx
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$9, %r14d
	jmp	LBB0_11
LBB0_9:
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$9, %eax
	shlq	%cl, %rax
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$8, %r14d
	movl	$8, %edx
	shlq	%cl, %rdx
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shlq	%cl, %r14
	movq	_DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$7, %r15d
	shlq	%cl, %r15
	orq	%rax, %rdx
	orq	%rdx, %r14
	movq	_DC_LCB_CFG_LN_DCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$1, %edx
	movq	%rbx, %rdi
	callq	_write_csr
	jmp	LBB0_13
LBB0_10:
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$8, %eax
	shlq	%cl, %rax
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$7, %edx
	shlq	%cl, %rdx
	movq	_DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	$7, %r14d
LBB0_11:
	shlq	%cl, %r14
	orq	%rax, %rdx
	orq	%rdx, %r14
	movq	_DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	$3, %r15d
LBB0_12:
	shlq	%cl, %r15
LBB0_13:
	movq	_DC_LCB_CFG_RX_FIFOS_RADR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_write_csr
	movq	_DC_LCB_CFG_IGNORE_LOST_RCLK@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_DC_LCB_CFG_IGNORE_LOST_RCLK_EN_SMASK@GOTPCREL(%rip), %rax
	movq	(%rax), %rdx
	movq	%rbx, %rdi
	callq	_write_csr
	movq	_DC_LCB_CFG_TX_FIFOS_RADR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movq	%r15, %rdx
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_write_csr                      ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ICODE_FPGA_EMULATION,8,3       ## @ICODE_FPGA_EMULATION
	.comm	_DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT,4,2 ## @DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT
	.comm	_DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT,4,2 ## @DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT
	.comm	_DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT,4,2 ## @DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT
	.comm	_DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT,8,3 ## @DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT
	.comm	_DC_LCB_CFG_LN_DCLK,4,2         ## @DC_LCB_CFG_LN_DCLK
	.comm	_DC_LCB_CFG_RX_FIFOS_RADR,4,2   ## @DC_LCB_CFG_RX_FIFOS_RADR
	.comm	_DC_LCB_CFG_IGNORE_LOST_RCLK,4,2 ## @DC_LCB_CFG_IGNORE_LOST_RCLK
	.comm	_DC_LCB_CFG_IGNORE_LOST_RCLK_EN_SMASK,8,3 ## @DC_LCB_CFG_IGNORE_LOST_RCLK_EN_SMASK
	.comm	_DC_LCB_CFG_TX_FIFOS_RADR,4,2   ## @DC_LCB_CFG_TX_FIFOS_RADR
	.no_dead_strip	_adjust_lcb_for_fpga_serdes
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function adjust_lcb_for_fpga_serdes
_adjust_lcb_for_fpga_serdes:            ; @adjust_lcb_for_fpga_serdes
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _ICODE_FPGA_EMULATION@GOTPAGE
Lloh1:
	ldr	x9, [x9, _ICODE_FPGA_EMULATION@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	cmp	x8, x9
	b.ne	LBB0_2
; %bb.1:
	mov	x19, x0
	bl	_is_emulator_s
	cbz	x0, LBB0_3
LBB0_2:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
LBB0_3:
	mov	x0, x19
	bl	_emulator_rev
	mov	x20, x0
	mov	x0, x19
	bl	_is_ax
	mov	w8, #45
	cmp	w0, #0
	csel	w8, w8, w20, eq
	cmp	w8, #18
	b.gt	LBB0_5
; %bb.4:
Lloh3:
	adrp	x8, _DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	mov	w9, #10
	lsl	x8, x9, x8
Lloh6:
	adrp	x9, _DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	mov	w10, #9
	lsl	x9, x10, x9
	orr	x8, x9, x8
Lloh9:
	adrp	x9, _DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGE
Lloh10:
	ldr	x9, [x9, _DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	lsl	x9, x10, x9
	orr	x20, x8, x9
Lloh12:
	adrp	x8, _DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGE
Lloh13:
	ldr	x8, [x8, _DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGEOFF]
Lloh14:
	ldr	x8, [x8]
	mov	w9, #6
	b	LBB0_13
LBB0_5:
	cmp	w8, #24
	b.hi	LBB0_7
; %bb.6:
Lloh15:
	adrp	x8, _DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPAGE
Lloh16:
	ldr	x8, [x8, _DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPAGEOFF]
Lloh17:
	ldr	w8, [x8]
	mov	w9, #9
	lsl	x8, x9, x8
Lloh18:
	adrp	x9, _DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPAGE
Lloh19:
	ldr	x9, [x9, _DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPAGEOFF]
Lloh20:
	ldr	w9, [x9]
	mov	w10, #8
	lsl	x9, x10, x9
	orr	x8, x9, x8
Lloh21:
	adrp	x9, _DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGE
Lloh22:
	ldr	x9, [x9, _DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGEOFF]
Lloh23:
	ldr	w9, [x9]
	lsl	x9, x10, x9
	orr	x20, x8, x9
Lloh24:
	adrp	x8, _DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGE
Lloh25:
	ldr	x8, [x8, _DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGEOFF]
Lloh26:
	ldr	x8, [x8]
	mov	w9, #7
	b	LBB0_13
LBB0_7:
	cmp	w8, #26
	b.eq	LBB0_10
; %bb.8:
	cmp	w8, #25
	b.ne	LBB0_11
; %bb.9:
Lloh27:
	adrp	x8, _DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPAGE
Lloh28:
	ldr	x8, [x8, _DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPAGEOFF]
Lloh29:
	ldr	w8, [x8]
	mov	w9, #10
	lsl	x8, x9, x8
Lloh30:
	adrp	x9, _DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPAGE
Lloh31:
	ldr	x9, [x9, _DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPAGEOFF]
Lloh32:
	ldr	w9, [x9]
	mov	w10, #9
	b	LBB0_12
LBB0_10:
Lloh33:
	adrp	x8, _DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPAGE
Lloh34:
	ldr	x8, [x8, _DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPAGEOFF]
Lloh35:
	ldr	w8, [x8]
	mov	w9, #9
Lloh36:
	adrp	x10, _DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPAGE
Lloh37:
	ldr	x10, [x10, _DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPAGEOFF]
	lsl	x8, x9, x8
Lloh38:
	ldr	w9, [x10]
	mov	w10, #8
	lsl	x9, x10, x9
Lloh39:
	adrp	x11, _DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGE
Lloh40:
	ldr	x11, [x11, _DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGEOFF]
	orr	x8, x9, x8
Lloh41:
	ldr	w9, [x11]
	lsl	x9, x10, x9
	orr	x20, x8, x9
Lloh42:
	adrp	x8, _DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGE
Lloh43:
	ldr	x8, [x8, _DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGEOFF]
Lloh44:
	ldr	x8, [x8]
	mov	w9, #7
	lsl	x21, x9, x8
Lloh45:
	adrp	x8, _DC_LCB_CFG_LN_DCLK@GOTPAGE
Lloh46:
	ldr	x8, [x8, _DC_LCB_CFG_LN_DCLK@GOTPAGEOFF]
Lloh47:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #1
	bl	_write_csr
	b	LBB0_14
LBB0_11:
Lloh48:
	adrp	x8, _DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPAGE
Lloh49:
	ldr	x8, [x8, _DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT@GOTPAGEOFF]
Lloh50:
	ldr	w8, [x8]
	mov	w9, #8
	lsl	x8, x9, x8
Lloh51:
	adrp	x9, _DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPAGE
Lloh52:
	ldr	x9, [x9, _DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT@GOTPAGEOFF]
Lloh53:
	ldr	w9, [x9]
	mov	w10, #7
LBB0_12:
	lsl	x9, x10, x9
	orr	x8, x9, x8
Lloh54:
	adrp	x9, _DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGE
Lloh55:
	ldr	x9, [x9, _DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGEOFF]
Lloh56:
	ldr	w9, [x9]
	lsl	x9, x10, x9
	orr	x20, x8, x9
Lloh57:
	adrp	x8, _DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGE
Lloh58:
	ldr	x8, [x8, _DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT@GOTPAGEOFF]
Lloh59:
	ldr	x8, [x8]
	mov	w9, #3
LBB0_13:
	lsl	x21, x9, x8
LBB0_14:
Lloh60:
	adrp	x8, _DC_LCB_CFG_RX_FIFOS_RADR@GOTPAGE
Lloh61:
	ldr	x8, [x8, _DC_LCB_CFG_RX_FIFOS_RADR@GOTPAGEOFF]
Lloh62:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x20
	bl	_write_csr
Lloh63:
	adrp	x8, _DC_LCB_CFG_IGNORE_LOST_RCLK@GOTPAGE
Lloh64:
	ldr	x8, [x8, _DC_LCB_CFG_IGNORE_LOST_RCLK@GOTPAGEOFF]
Lloh65:
	ldr	w1, [x8]
Lloh66:
	adrp	x8, _DC_LCB_CFG_IGNORE_LOST_RCLK_EN_SMASK@GOTPAGE
Lloh67:
	ldr	x8, [x8, _DC_LCB_CFG_IGNORE_LOST_RCLK_EN_SMASK@GOTPAGEOFF]
Lloh68:
	ldr	x2, [x8]
	mov	x0, x19
	bl	_write_csr
Lloh69:
	adrp	x8, _DC_LCB_CFG_TX_FIFOS_RADR@GOTPAGE
Lloh70:
	ldr	x8, [x8, _DC_LCB_CFG_TX_FIFOS_RADR@GOTPAGEOFF]
Lloh71:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x21
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_write_csr
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGotLdr	Lloh21, Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh45, Lloh46, Lloh47
	.loh AdrpLdrGotLdr	Lloh42, Lloh43, Lloh44
	.loh AdrpLdrGotLdr	Lloh39, Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh36, Lloh37, Lloh38
	.loh AdrpLdrGotLdr	Lloh33, Lloh34, Lloh35
	.loh AdrpLdrGotLdr	Lloh51, Lloh52, Lloh53
	.loh AdrpLdrGotLdr	Lloh48, Lloh49, Lloh50
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh54, Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh69, Lloh70, Lloh71
	.loh AdrpLdrGotLdr	Lloh66, Lloh67, Lloh68
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.cfi_endproc
                                        ; -- End function
	.comm	_ICODE_FPGA_EMULATION,8,3       ; @ICODE_FPGA_EMULATION
	.comm	_DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT,4,2 ; @DC_LCB_CFG_RX_FIFOS_RADR_DO_NOT_JUMP_VAL_SHIFT
	.comm	_DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT,4,2 ; @DC_LCB_CFG_RX_FIFOS_RADR_OK_TO_JUMP_VAL_SHIFT
	.comm	_DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT,4,2 ; @DC_LCB_CFG_RX_FIFOS_RADR_RST_VAL_SHIFT
	.comm	_DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT,8,3 ; @DC_LCB_CFG_TX_FIFOS_RADR_RST_VAL_SHIFT
	.comm	_DC_LCB_CFG_LN_DCLK,4,2         ; @DC_LCB_CFG_LN_DCLK
	.comm	_DC_LCB_CFG_RX_FIFOS_RADR,4,2   ; @DC_LCB_CFG_RX_FIFOS_RADR
	.comm	_DC_LCB_CFG_IGNORE_LOST_RCLK,4,2 ; @DC_LCB_CFG_IGNORE_LOST_RCLK
	.comm	_DC_LCB_CFG_IGNORE_LOST_RCLK_EN_SMASK,8,3 ; @DC_LCB_CFG_IGNORE_LOST_RCLK_EN_SMASK
	.comm	_DC_LCB_CFG_TX_FIFOS_RADR,4,2   ; @DC_LCB_CFG_TX_FIFOS_RADR
	.no_dead_strip	_adjust_lcb_for_fpga_serdes
.subsections_via_symbols
