	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ccdc_config_vdfc
_ccdc_config_vdfc:                      ## @ccdc_config_vdfc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	_CCDC_DFCCTL_GDFCEN_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	(%r15), %edi
	cmpl	$0, 24(%r15)
	je	LBB0_1
## %bb.2:
	movl	4(%r15), %eax
	movq	_CCDC_DFT_TABLE_SIZE@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jle	LBB0_5
## %bb.3:
	movq	_EINVAL@GOTPCREL(%rip), %rcx
	jmp	LBB0_4
LBB0_1:
	movq	_DFCCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	jmp	LBB0_13
LBB0_5:
	movq	_CCDC_DFCCTL_VDFC_DISABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %edi
	movq	_CCDC_DFCCTL_VDFCSL_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	andl	12(%r15), %eax
	movq	_CCDC_DFCCTL_VDFCSL_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	orl	%edi, %eax
	movq	_CCDC_DFCCTL_VDFCUDA_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	andl	16(%r15), %edx
	movq	_CCDC_DFCCTL_VDFCUDA_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edx
	movq	_CCDC_DFCCTL_VDFLSFT_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	andl	20(%r15), %edi
	movq	_CCDC_DFCCTL_VDFLSFT_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edi
	orl	%edx, %edi
	orl	%eax, %edi
	movq	_DFCCTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_regw
	cmpl	$0, 4(%r15)
	jle	LBB0_12
## %bb.6:
	movq	_CCDC_DFCMEMCTL_DFCMARST_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %r14d
	movq	_CCDC_DFCMEMCTL_DFCMARST_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	shll	%cl, %r14d
	xorl	%ebx, %ebx
	movq	_CCDC_DFCMEMCTL_INC_ADDR@GOTPCREL(%rip), %r13
	movq	_DFCMEMCTL@GOTPCREL(%rip), %r12
	.p2align	4, 0x90
LBB0_8:                                 ## =>This Inner Loop Header: Depth=1
	testl	%ebx, %ebx
	je	LBB0_10
## %bb.9:                               ##   in Loop: Header=BB0_8 Depth=1
	movl	(%r13), %r14d
LBB0_10:                                ##   in Loop: Header=BB0_8 Depth=1
	movl	(%r12), %esi
	movl	%r14d, %edi
	callq	_regw
	movl	%ebx, %edi
	movq	%r15, %rsi
	callq	_ccdc_write_dfc_entry
	testq	%rax, %rax
	js	LBB0_11
## %bb.7:                               ##   in Loop: Header=BB0_8 Depth=1
	incl	%ebx
	cmpl	4(%r15), %ebx
	jl	LBB0_8
LBB0_12:
	movq	_CCDC_VDC_DFCVSAT_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	andl	8(%r15), %edi
	movq	_DFCVSAT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_regw
	movq	_DFCCTL@GOTPCREL(%rip), %rbx
	movl	(%rbx), %edi
	callq	_regr
	movq	_CCDC_DFCCTL_VDFCEN_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movq	_CCDC_DFCCTL_VDFCEN_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edi
	orl	%eax, %edi
	movl	(%rbx), %esi
LBB0_13:
	callq	_regw
	xorl	%eax, %eax
	jmp	LBB0_14
LBB0_11:
	movq	_EFAULT@GOTPCREL(%rip), %rcx
LBB0_4:
	xorl	%eax, %eax
	subl	(%rcx), %eax
LBB0_14:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CCDC_DFCCTL_GDFCEN_MASK,4,2    ## @CCDC_DFCCTL_GDFCEN_MASK
	.comm	_DFCCTL,4,2                     ## @DFCCTL
	.comm	_CCDC_DFT_TABLE_SIZE,4,2        ## @CCDC_DFT_TABLE_SIZE
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_CCDC_DFCCTL_VDFC_DISABLE,4,2   ## @CCDC_DFCCTL_VDFC_DISABLE
	.comm	_CCDC_DFCCTL_VDFCSL_MASK,4,2    ## @CCDC_DFCCTL_VDFCSL_MASK
	.comm	_CCDC_DFCCTL_VDFCSL_SHIFT,4,2   ## @CCDC_DFCCTL_VDFCSL_SHIFT
	.comm	_CCDC_DFCCTL_VDFCUDA_MASK,4,2   ## @CCDC_DFCCTL_VDFCUDA_MASK
	.comm	_CCDC_DFCCTL_VDFCUDA_SHIFT,4,2  ## @CCDC_DFCCTL_VDFCUDA_SHIFT
	.comm	_CCDC_DFCCTL_VDFLSFT_MASK,4,2   ## @CCDC_DFCCTL_VDFLSFT_MASK
	.comm	_CCDC_DFCCTL_VDFLSFT_SHIFT,4,2  ## @CCDC_DFCCTL_VDFLSFT_SHIFT
	.comm	_CCDC_DFCMEMCTL_DFCMARST_MASK,4,2 ## @CCDC_DFCMEMCTL_DFCMARST_MASK
	.comm	_CCDC_DFCMEMCTL_DFCMARST_SHIFT,4,2 ## @CCDC_DFCMEMCTL_DFCMARST_SHIFT
	.comm	_CCDC_DFCMEMCTL_INC_ADDR,4,2    ## @CCDC_DFCMEMCTL_INC_ADDR
	.comm	_DFCMEMCTL,4,2                  ## @DFCMEMCTL
	.comm	_EFAULT,4,2                     ## @EFAULT
	.comm	_CCDC_VDC_DFCVSAT_MASK,4,2      ## @CCDC_VDC_DFCVSAT_MASK
	.comm	_DFCVSAT,4,2                    ## @DFCVSAT
	.comm	_CCDC_DFCCTL_VDFCEN_MASK,4,2    ## @CCDC_DFCCTL_VDFCEN_MASK
	.comm	_CCDC_DFCCTL_VDFCEN_SHIFT,4,2   ## @CCDC_DFCCTL_VDFCEN_SHIFT
	.no_dead_strip	_ccdc_config_vdfc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ccdc_config_vdfc
_ccdc_config_vdfc:                      ; @ccdc_config_vdfc
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	ldr	w8, [x0]
Lloh0:
	adrp	x9, _CCDC_DFCCTL_GDFCEN_MASK@GOTPAGE
Lloh1:
	ldr	x9, [x9, _CCDC_DFCCTL_GDFCEN_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x9]
	and	w0, w9, w8
	ldr	w8, [x19, #24]
	cbz	w8, LBB0_3
; %bb.1:
	ldr	w8, [x19, #4]
Lloh3:
	adrp	x9, _CCDC_DFT_TABLE_SIZE@GOTPAGE
Lloh4:
	ldr	x9, [x9, _CCDC_DFT_TABLE_SIZE@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	cmp	w8, w9
	b.le	LBB0_4
; %bb.2:
Lloh6:
	adrp	x8, _EINVAL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
	b	LBB0_11
LBB0_3:
Lloh8:
	adrp	x8, _DFCCTL@GOTPAGE
Lloh9:
	ldr	x8, [x8, _DFCCTL@GOTPAGEOFF]
Lloh10:
	ldr	w1, [x8]
	b	LBB0_9
LBB0_4:
Lloh11:
	adrp	x8, _CCDC_DFCCTL_VDFC_DISABLE@GOTPAGE
Lloh12:
	ldr	x8, [x8, _CCDC_DFCCTL_VDFC_DISABLE@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	orr	w8, w8, w0
Lloh14:
	adrp	x9, _CCDC_DFCCTL_VDFCSL_MASK@GOTPAGE
Lloh15:
	ldr	x9, [x9, _CCDC_DFCCTL_VDFCSL_MASK@GOTPAGEOFF]
Lloh16:
	ldr	w9, [x9]
	ldp	w10, w11, [x19, #12]
	and	w9, w9, w10
Lloh17:
	adrp	x10, _CCDC_DFCCTL_VDFCSL_SHIFT@GOTPAGE
Lloh18:
	ldr	x10, [x10, _CCDC_DFCCTL_VDFCSL_SHIFT@GOTPAGEOFF]
Lloh19:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w8, w9
Lloh20:
	adrp	x9, _CCDC_DFCCTL_VDFCUDA_MASK@GOTPAGE
Lloh21:
	ldr	x9, [x9, _CCDC_DFCCTL_VDFCUDA_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w9, [x9]
	and	w9, w9, w11
Lloh23:
	adrp	x10, _CCDC_DFCCTL_VDFCUDA_SHIFT@GOTPAGE
Lloh24:
	ldr	x10, [x10, _CCDC_DFCCTL_VDFCUDA_SHIFT@GOTPAGEOFF]
Lloh25:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w8, w8, w9
	ldr	w9, [x19, #20]
Lloh26:
	adrp	x10, _CCDC_DFCCTL_VDFLSFT_MASK@GOTPAGE
Lloh27:
	ldr	x10, [x10, _CCDC_DFCCTL_VDFLSFT_MASK@GOTPAGEOFF]
Lloh28:
	ldr	w10, [x10]
	and	w9, w10, w9
Lloh29:
	adrp	x10, _CCDC_DFCCTL_VDFLSFT_SHIFT@GOTPAGE
Lloh30:
	ldr	x10, [x10, _CCDC_DFCCTL_VDFLSFT_SHIFT@GOTPAGEOFF]
Lloh31:
	ldr	w10, [x10]
	lsl	w9, w9, w10
	orr	w0, w8, w9
Lloh32:
	adrp	x22, _DFCCTL@GOTPAGE
Lloh33:
	ldr	x22, [x22, _DFCCTL@GOTPAGEOFF]
	ldr	w1, [x22]
	bl	_regw
	ldr	w8, [x19, #4]
	cmp	w8, #1
	b.lt	LBB0_8
; %bb.5:
	mov	w20, #0
Lloh34:
	adrp	x8, _CCDC_DFCMEMCTL_DFCMARST_MASK@GOTPAGE
Lloh35:
	ldr	x8, [x8, _CCDC_DFCMEMCTL_DFCMARST_MASK@GOTPAGEOFF]
Lloh36:
	ldr	w8, [x8]
Lloh37:
	adrp	x9, _CCDC_DFCMEMCTL_DFCMARST_SHIFT@GOTPAGE
Lloh38:
	ldr	x9, [x9, _CCDC_DFCMEMCTL_DFCMARST_SHIFT@GOTPAGEOFF]
Lloh39:
	ldr	w9, [x9]
	lsl	w21, w8, w9
Lloh40:
	adrp	x23, _CCDC_DFCMEMCTL_INC_ADDR@GOTPAGE
Lloh41:
	ldr	x23, [x23, _CCDC_DFCMEMCTL_INC_ADDR@GOTPAGEOFF]
Lloh42:
	adrp	x24, _DFCMEMCTL@GOTPAGE
Lloh43:
	ldr	x24, [x24, _DFCMEMCTL@GOTPAGEOFF]
LBB0_6:                                 ; =>This Inner Loop Header: Depth=1
	ldr	w8, [x23]
	cmp	w20, #0
	csel	w21, w21, w8, eq
	ldr	w1, [x24]
	mov	x0, x21
	bl	_regw
	mov	x0, x20
	mov	x1, x19
	bl	_ccdc_write_dfc_entry
	tbnz	x0, #63, LBB0_10
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=1
	add	w20, w20, #1
	ldr	w8, [x19, #4]
	cmp	w20, w8
	b.lt	LBB0_6
LBB0_8:
Lloh44:
	adrp	x8, _CCDC_VDC_DFCVSAT_MASK@GOTPAGE
Lloh45:
	ldr	x8, [x8, _CCDC_VDC_DFCVSAT_MASK@GOTPAGEOFF]
	ldr	w9, [x19, #8]
Lloh46:
	ldr	w8, [x8]
	and	w0, w8, w9
Lloh47:
	adrp	x8, _DFCVSAT@GOTPAGE
Lloh48:
	ldr	x8, [x8, _DFCVSAT@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	bl	_regw
	ldr	w0, [x22]
	bl	_regr
Lloh50:
	adrp	x8, _CCDC_DFCCTL_VDFCEN_MASK@GOTPAGE
Lloh51:
	ldr	x8, [x8, _CCDC_DFCCTL_VDFCEN_MASK@GOTPAGEOFF]
Lloh52:
	ldr	w8, [x8]
Lloh53:
	adrp	x9, _CCDC_DFCCTL_VDFCEN_SHIFT@GOTPAGE
Lloh54:
	ldr	x9, [x9, _CCDC_DFCCTL_VDFCEN_SHIFT@GOTPAGEOFF]
Lloh55:
	ldr	w9, [x9]
	lsl	w8, w8, w9
	orr	w0, w8, w0
	ldr	w1, [x22]
LBB0_9:
	bl	_regw
	mov	w0, #0
	b	LBB0_12
LBB0_10:
Lloh56:
	adrp	x8, _EFAULT@GOTPAGE
Lloh57:
	ldr	x8, [x8, _EFAULT@GOTPAGEOFF]
LBB0_11:
	ldr	w8, [x8]
	neg	w0, w8
LBB0_12:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh53, Lloh54, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGot	Lloh56, Lloh57
	.cfi_endproc
                                        ; -- End function
	.comm	_CCDC_DFCCTL_GDFCEN_MASK,4,2    ; @CCDC_DFCCTL_GDFCEN_MASK
	.comm	_DFCCTL,4,2                     ; @DFCCTL
	.comm	_CCDC_DFT_TABLE_SIZE,4,2        ; @CCDC_DFT_TABLE_SIZE
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_CCDC_DFCCTL_VDFC_DISABLE,4,2   ; @CCDC_DFCCTL_VDFC_DISABLE
	.comm	_CCDC_DFCCTL_VDFCSL_MASK,4,2    ; @CCDC_DFCCTL_VDFCSL_MASK
	.comm	_CCDC_DFCCTL_VDFCSL_SHIFT,4,2   ; @CCDC_DFCCTL_VDFCSL_SHIFT
	.comm	_CCDC_DFCCTL_VDFCUDA_MASK,4,2   ; @CCDC_DFCCTL_VDFCUDA_MASK
	.comm	_CCDC_DFCCTL_VDFCUDA_SHIFT,4,2  ; @CCDC_DFCCTL_VDFCUDA_SHIFT
	.comm	_CCDC_DFCCTL_VDFLSFT_MASK,4,2   ; @CCDC_DFCCTL_VDFLSFT_MASK
	.comm	_CCDC_DFCCTL_VDFLSFT_SHIFT,4,2  ; @CCDC_DFCCTL_VDFLSFT_SHIFT
	.comm	_CCDC_DFCMEMCTL_DFCMARST_MASK,4,2 ; @CCDC_DFCMEMCTL_DFCMARST_MASK
	.comm	_CCDC_DFCMEMCTL_DFCMARST_SHIFT,4,2 ; @CCDC_DFCMEMCTL_DFCMARST_SHIFT
	.comm	_CCDC_DFCMEMCTL_INC_ADDR,4,2    ; @CCDC_DFCMEMCTL_INC_ADDR
	.comm	_DFCMEMCTL,4,2                  ; @DFCMEMCTL
	.comm	_EFAULT,4,2                     ; @EFAULT
	.comm	_CCDC_VDC_DFCVSAT_MASK,4,2      ; @CCDC_VDC_DFCVSAT_MASK
	.comm	_DFCVSAT,4,2                    ; @DFCVSAT
	.comm	_CCDC_DFCCTL_VDFCEN_MASK,4,2    ; @CCDC_DFCCTL_VDFCEN_MASK
	.comm	_CCDC_DFCCTL_VDFCEN_SHIFT,4,2   ; @CCDC_DFCCTL_VDFCEN_SHIFT
	.no_dead_strip	_ccdc_config_vdfc
.subsections_via_symbols
