	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_warpcore_set_20G_force_KR2
_bnx2x_warpcore_set_20G_force_KR2:      ## @bnx2x_warpcore_set_20G_force_KR2
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	(%rsi), %r15
	movq	_MDIO_REG_BANK_AER_BLOCK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MDIO_AER_BLOCK_AER_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	xorl	%r8d, %r8d
	callq	_CL22_WR_OVER_CL45
	movq	_MDIO_WC_DEVAD@GOTPCREL(%rip), %r13
	movl	(%r13), %edx
	movq	_MDIO_WC_REG_XGXSBLK0_XGXSCONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	$-8193, %r8d                    ## imm = 0xDFFF
	callq	_bnx2x_cl45_read_and_write
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_bnx2x_set_aer_mmd
	movq	_MDIO_PMA_DEVAD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MDIO_WC_REG_PMD_KR_CONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	$-3, %r8d
	callq	_bnx2x_cl45_read_and_write
	movq	_MDIO_AN_DEVAD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MDIO_AN_REG_CTRL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	xorl	%r8d, %r8d
	callq	_bnx2x_cl45_write
	movl	(%r13), %edx
	movq	_MDIO_WC_REG_CL73_USERB0_CTRL@GOTPCREL(%rip), %r12
	movl	(%r12), %ecx
	leaq	-44(%rbp), %r8
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_bnx2x_cl45_read
	movl	-44(%rbp), %r8d
	andl	$-97, %r8d
	orl	$64, %r8d
	movl	%r8d, -44(%rbp)
	movl	(%r13), %edx
	movl	(%r12), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_bnx2x_cl45_write
	movl	(%r13), %edx
	movq	_MDIO_WC_REG_SERDESDIGITAL_MISC1@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	$31, %r8d
	callq	_bnx2x_cl45_read_or_write
	movl	(%r13), %edx
	movq	_MDIO_WC_REG_DIGITAL4_MISC3@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	$128, %r8d
	callq	_bnx2x_cl45_read_or_write
	movl	(%r13), %edx
	movq	_MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL@GOTPCREL(%rip), %r12
	movl	(%r12), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	leaq	-44(%rbp), %r8
	callq	_bnx2x_cl45_read
	movl	$-49153, %r8d                   ## imm = 0xFFFF3FFF
	andl	-44(%rbp), %r8d
	orl	$32768, %r8d                    ## imm = 0x8000
	movl	%r8d, -44(%rbp)
	movl	(%r13), %edx
	movl	(%r12), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_bnx2x_cl45_write
	movl	(%r13), %edx
	movq	_MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	$33626, %r8d                    ## imm = 0x835A
	callq	_bnx2x_cl45_write
	movq	_MDIO_REG_BANK_AER_BLOCK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MDIO_AER_BLOCK_AER_REG@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	xorl	%r8d, %r8d
	callq	_CL22_WR_OVER_CL45
	movl	(%r13), %edx
	movq	_MDIO_WC_REG_XGXSBLK0_XGXSCONTROL@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	$8192, %r8d                     ## imm = 0x2000
	callq	_bnx2x_cl45_read_or_write
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_bnx2x_set_aer_mmd
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MDIO_REG_BANK_AER_BLOCK,4,2    ## @MDIO_REG_BANK_AER_BLOCK
	.comm	_MDIO_AER_BLOCK_AER_REG,4,2     ## @MDIO_AER_BLOCK_AER_REG
	.comm	_MDIO_WC_DEVAD,4,2              ## @MDIO_WC_DEVAD
	.comm	_MDIO_WC_REG_XGXSBLK0_XGXSCONTROL,4,2 ## @MDIO_WC_REG_XGXSBLK0_XGXSCONTROL
	.comm	_MDIO_PMA_DEVAD,4,2             ## @MDIO_PMA_DEVAD
	.comm	_MDIO_WC_REG_PMD_KR_CONTROL,4,2 ## @MDIO_WC_REG_PMD_KR_CONTROL
	.comm	_MDIO_AN_DEVAD,4,2              ## @MDIO_AN_DEVAD
	.comm	_MDIO_AN_REG_CTRL,4,2           ## @MDIO_AN_REG_CTRL
	.comm	_MDIO_WC_REG_CL73_USERB0_CTRL,4,2 ## @MDIO_WC_REG_CL73_USERB0_CTRL
	.comm	_MDIO_WC_REG_SERDESDIGITAL_MISC1,4,2 ## @MDIO_WC_REG_SERDESDIGITAL_MISC1
	.comm	_MDIO_WC_REG_DIGITAL4_MISC3,4,2 ## @MDIO_WC_REG_DIGITAL4_MISC3
	.comm	_MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL,4,2 ## @MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL
	.comm	_MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP,4,2 ## @MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP
	.no_dead_strip	_bnx2x_warpcore_set_20G_force_KR2
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_warpcore_set_20G_force_KR2
_bnx2x_warpcore_set_20G_force_KR2:      ; @bnx2x_warpcore_set_20G_force_KR2
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x20, x1
	mov	x19, x0
	ldr	x21, [x1]
Lloh0:
	adrp	x22, _MDIO_REG_BANK_AER_BLOCK@GOTPAGE
Lloh1:
	ldr	x22, [x22, _MDIO_REG_BANK_AER_BLOCK@GOTPAGEOFF]
	ldr	w2, [x22]
Lloh2:
	adrp	x23, _MDIO_AER_BLOCK_AER_REG@GOTPAGE
Lloh3:
	ldr	x23, [x23, _MDIO_AER_BLOCK_AER_REG@GOTPAGEOFF]
	ldr	w3, [x23]
	mov	x0, x21
	mov	x1, x19
	mov	w4, #0
	bl	_CL22_WR_OVER_CL45
Lloh4:
	adrp	x24, _MDIO_WC_DEVAD@GOTPAGE
Lloh5:
	ldr	x24, [x24, _MDIO_WC_DEVAD@GOTPAGEOFF]
	ldr	w2, [x24]
Lloh6:
	adrp	x25, _MDIO_WC_REG_XGXSBLK0_XGXSCONTROL@GOTPAGE
Lloh7:
	ldr	x25, [x25, _MDIO_WC_REG_XGXSBLK0_XGXSCONTROL@GOTPAGEOFF]
	ldr	w3, [x25]
	mov	x0, x21
	mov	x1, x19
	mov	w4, #-8193
	bl	_bnx2x_cl45_read_and_write
	mov	x0, x20
	mov	x1, x19
	bl	_bnx2x_set_aer_mmd
Lloh8:
	adrp	x8, _MDIO_PMA_DEVAD@GOTPAGE
Lloh9:
	ldr	x8, [x8, _MDIO_PMA_DEVAD@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
Lloh11:
	adrp	x8, _MDIO_WC_REG_PMD_KR_CONTROL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _MDIO_WC_REG_PMD_KR_CONTROL@GOTPAGEOFF]
Lloh13:
	ldr	w3, [x8]
	mov	x0, x21
	mov	x1, x19
	mov	w4, #-3
	bl	_bnx2x_cl45_read_and_write
Lloh14:
	adrp	x8, _MDIO_AN_DEVAD@GOTPAGE
Lloh15:
	ldr	x8, [x8, _MDIO_AN_DEVAD@GOTPAGEOFF]
Lloh16:
	ldr	w2, [x8]
Lloh17:
	adrp	x8, _MDIO_AN_REG_CTRL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _MDIO_AN_REG_CTRL@GOTPAGEOFF]
Lloh19:
	ldr	w3, [x8]
	mov	x0, x21
	mov	x1, x19
	mov	w4, #0
	bl	_bnx2x_cl45_write
	ldr	w2, [x24]
Lloh20:
	adrp	x26, _MDIO_WC_REG_CL73_USERB0_CTRL@GOTPAGE
Lloh21:
	ldr	x26, [x26, _MDIO_WC_REG_CL73_USERB0_CTRL@GOTPAGEOFF]
	ldr	w3, [x26]
	add	x4, sp, #12
	mov	x0, x21
	mov	x1, x19
	bl	_bnx2x_cl45_read
	ldr	w8, [sp, #12]
	and	w8, w8, #0xffffff9f
	orr	w4, w8, #0x40
	str	w4, [sp, #12]
	ldr	w2, [x24]
	ldr	w3, [x26]
	mov	x0, x21
	mov	x1, x19
	bl	_bnx2x_cl45_write
	ldr	w2, [x24]
Lloh22:
	adrp	x8, _MDIO_WC_REG_SERDESDIGITAL_MISC1@GOTPAGE
Lloh23:
	ldr	x8, [x8, _MDIO_WC_REG_SERDESDIGITAL_MISC1@GOTPAGEOFF]
Lloh24:
	ldr	w3, [x8]
	mov	x0, x21
	mov	x1, x19
	mov	w4, #31
	bl	_bnx2x_cl45_read_or_write
	ldr	w2, [x24]
Lloh25:
	adrp	x8, _MDIO_WC_REG_DIGITAL4_MISC3@GOTPAGE
Lloh26:
	ldr	x8, [x8, _MDIO_WC_REG_DIGITAL4_MISC3@GOTPAGEOFF]
Lloh27:
	ldr	w3, [x8]
	mov	x0, x21
	mov	x1, x19
	mov	w4, #128
	bl	_bnx2x_cl45_read_or_write
	ldr	w2, [x24]
Lloh28:
	adrp	x26, _MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL@GOTPAGE
Lloh29:
	ldr	x26, [x26, _MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL@GOTPAGEOFF]
	ldr	w3, [x26]
	add	x4, sp, #12
	mov	x0, x21
	mov	x1, x19
	bl	_bnx2x_cl45_read
	ldr	w8, [sp, #12]
	and	w8, w8, #0xffff3fff
	orr	w4, w8, #0x8000
	str	w4, [sp, #12]
	ldr	w2, [x24]
	ldr	w3, [x26]
	mov	x0, x21
	mov	x1, x19
	bl	_bnx2x_cl45_write
	ldr	w2, [x24]
Lloh30:
	adrp	x8, _MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP@GOTPAGE
Lloh31:
	ldr	x8, [x8, _MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP@GOTPAGEOFF]
Lloh32:
	ldr	w3, [x8]
	mov	x0, x21
	mov	x1, x19
	mov	w4, #33626
	bl	_bnx2x_cl45_write
	ldr	w2, [x22]
	ldr	w3, [x23]
	mov	x0, x21
	mov	x1, x19
	mov	w4, #0
	bl	_CL22_WR_OVER_CL45
	ldr	w2, [x24]
	ldr	w3, [x25]
	mov	x0, x21
	mov	x1, x19
	mov	w4, #8192
	bl	_bnx2x_cl45_read_or_write
	mov	x0, x20
	mov	x1, x19
	bl	_bnx2x_set_aer_mmd
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGotLdr	Lloh30, Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_MDIO_REG_BANK_AER_BLOCK,4,2    ; @MDIO_REG_BANK_AER_BLOCK
	.comm	_MDIO_AER_BLOCK_AER_REG,4,2     ; @MDIO_AER_BLOCK_AER_REG
	.comm	_MDIO_WC_DEVAD,4,2              ; @MDIO_WC_DEVAD
	.comm	_MDIO_WC_REG_XGXSBLK0_XGXSCONTROL,4,2 ; @MDIO_WC_REG_XGXSBLK0_XGXSCONTROL
	.comm	_MDIO_PMA_DEVAD,4,2             ; @MDIO_PMA_DEVAD
	.comm	_MDIO_WC_REG_PMD_KR_CONTROL,4,2 ; @MDIO_WC_REG_PMD_KR_CONTROL
	.comm	_MDIO_AN_DEVAD,4,2              ; @MDIO_AN_DEVAD
	.comm	_MDIO_AN_REG_CTRL,4,2           ; @MDIO_AN_REG_CTRL
	.comm	_MDIO_WC_REG_CL73_USERB0_CTRL,4,2 ; @MDIO_WC_REG_CL73_USERB0_CTRL
	.comm	_MDIO_WC_REG_SERDESDIGITAL_MISC1,4,2 ; @MDIO_WC_REG_SERDESDIGITAL_MISC1
	.comm	_MDIO_WC_REG_DIGITAL4_MISC3,4,2 ; @MDIO_WC_REG_DIGITAL4_MISC3
	.comm	_MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL,4,2 ; @MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL
	.comm	_MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP,4,2 ; @MDIO_WC_REG_CL72_USERB0_CL72_TX_FIR_TAP
	.no_dead_strip	_bnx2x_warpcore_set_20G_force_KR2
.subsections_via_symbols
