	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ena_com_create_and_store_tx_meta_desc
_ena_com_create_and_store_tx_meta_desc: ## @ena_com_create_and_store_tx_meta_desc
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, %r14
	callq	_get_sq_desc
	movq	%rax, %rbx
	movq	%rax, %rdi
	xorl	%esi, %esi
	movl	$8, %edx
	callq	_memset
	movq	_ENA_ETH_IO_TX_META_DESC_META_DESC_MASK@GOTPCREL(%rip), %rax
	movl	(%rbx), %edx
	orl	(%rax), %edx
	movl	%edx, (%rbx)
	movq	_ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movl	%edx, (%rbx)
	movl	(%r15), %edi
	movq	_ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT@GOTPCREL(%rip), %rax
	movb	(%rax), %cl
	movl	%edi, %r9d
	shll	%cl, %r9d
	movq	_ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %r9d
	orl	4(%rbx), %r9d
	sarl	$10, %edi
	movq	_ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %edi
	movq	_ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %edi
	orl	%edx, %edi
	movl	%edi, (%rbx)
	movq	_ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %edi
	movl	%edi, (%rbx)
	movq	_ENA_ETH_IO_TX_META_DESC_META_STORE_MASK@GOTPCREL(%rip), %r8
	orl	(%r8), %edi
	movl	%edi, (%rbx)
	movl	(%r14), %esi
	movq	_ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %esi
	movq	_ENA_ETH_IO_TX_META_DESC_PHASE_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %esi
	orl	%edi, %esi
	movl	%esi, (%rbx)
	movq	_ENA_ETH_IO_TX_META_DESC_FIRST_MASK@GOTPCREL(%rip), %rcx
	orl	(%rcx), %esi
	movl	%esi, (%rbx)
	movq	_ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	andl	4(%r15), %edi
	movq	_ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	movl	8(%r15), %edx
	shll	%cl, %edx
	movl	12(%r15), %eax
	movq	_ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %edx
	orl	%edi, %edx
	orl	%r9d, %edx
	movq	_ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT@GOTPCREL(%rip), %rcx
	movb	(%rcx), %cl
	shll	%cl, %eax
	movq	_ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	orl	%edx, %eax
	movl	%eax, 4(%rbx)
	orl	(%r8), %esi
	movl	%esi, (%rbx)
	leaq	4(%r14), %rdi
	movq	%r15, %rsi
	movl	$16, %edx
	callq	_memcpy
	movq	%r14, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_ena_com_sq_update_tail         ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_ENA_ETH_IO_TX_META_DESC_META_DESC_MASK,4,2 ## @ENA_ETH_IO_TX_META_DESC_META_DESC_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK,4,2 ## @ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT,4,2 ## @ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT
	.comm	_ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK,4,2 ## @ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT,4,2 ## @ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT
	.comm	_ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK,4,2 ## @ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK,4,2 ## @ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_META_STORE_MASK,4,2 ## @ENA_ETH_IO_TX_META_DESC_META_STORE_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT,4,2 ## @ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT
	.comm	_ENA_ETH_IO_TX_META_DESC_PHASE_MASK,4,2 ## @ENA_ETH_IO_TX_META_DESC_PHASE_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_FIRST_MASK,4,2 ## @ENA_ETH_IO_TX_META_DESC_FIRST_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK,4,2 ## @ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT,4,2 ## @ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT
	.comm	_ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK,4,2 ## @ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT,4,2 ## @ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT
	.comm	_ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK,4,2 ## @ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK
	.no_dead_strip	_ena_com_create_and_store_tx_meta_desc
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ena_com_create_and_store_tx_meta_desc
_ena_com_create_and_store_tx_meta_desc: ; @ena_com_create_and_store_tx_meta_desc
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x1
	mov	x19, x0
	bl	_get_sq_desc
	mov	x21, x0
	mov	w1, #0
	mov	w2, #8
	bl	_memset
Lloh0:
	adrp	x8, _ENA_ETH_IO_TX_META_DESC_META_DESC_MASK@GOTPAGE
Lloh1:
	ldr	x8, [x8, _ENA_ETH_IO_TX_META_DESC_META_DESC_MASK@GOTPAGEOFF]
Lloh2:
	ldr	w8, [x8]
	ldp	w9, w10, [x21]
	orr	w8, w9, w8
	str	w8, [x21]
Lloh3:
	adrp	x9, _ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK@GOTPAGE
Lloh4:
	ldr	x9, [x9, _ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh6:
	adrp	x9, _ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT@GOTPAGE
Lloh7:
	ldr	x9, [x9, _ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT@GOTPAGEOFF]
	str	w8, [x21]
Lloh8:
	ldr	w9, [x9]
Lloh9:
	adrp	x11, _ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK@GOTPAGE
Lloh10:
	ldr	x11, [x11, _ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK@GOTPAGEOFF]
	ldp	w12, w13, [x20]
	lsl	w9, w12, w9
Lloh11:
	ldr	w11, [x11]
	and	w9, w9, w11
	orr	w9, w10, w9
Lloh12:
	adrp	x10, _ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT@GOTPAGE
Lloh13:
	ldr	x10, [x10, _ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT@GOTPAGEOFF]
	asr	w11, w12, #10
Lloh14:
	ldr	w10, [x10]
	lsl	w10, w11, w10
Lloh15:
	adrp	x11, _ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK@GOTPAGE
Lloh16:
	ldr	x11, [x11, _ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK@GOTPAGEOFF]
Lloh17:
	ldr	w11, [x11]
	and	w10, w10, w11
	orr	w8, w10, w8
	str	w8, [x21]
Lloh18:
	adrp	x10, _ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK@GOTPAGE
Lloh19:
	ldr	x10, [x10, _ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK@GOTPAGEOFF]
Lloh20:
	ldr	w10, [x10]
	orr	w8, w8, w10
	str	w8, [x21]
Lloh21:
	adrp	x10, _ENA_ETH_IO_TX_META_DESC_META_STORE_MASK@GOTPAGE
Lloh22:
	ldr	x10, [x10, _ENA_ETH_IO_TX_META_DESC_META_STORE_MASK@GOTPAGEOFF]
	ldr	w11, [x10]
	orr	w8, w11, w8
	str	w8, [x21]
	mov	x0, x19
	ldr	w11, [x0], #4
Lloh23:
	adrp	x12, _ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT@GOTPAGE
Lloh24:
	ldr	x12, [x12, _ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT@GOTPAGEOFF]
Lloh25:
	ldr	w12, [x12]
	lsl	w11, w11, w12
Lloh26:
	adrp	x12, _ENA_ETH_IO_TX_META_DESC_PHASE_MASK@GOTPAGE
Lloh27:
	ldr	x12, [x12, _ENA_ETH_IO_TX_META_DESC_PHASE_MASK@GOTPAGEOFF]
Lloh28:
	ldr	w12, [x12]
	and	w11, w11, w12
	orr	w8, w11, w8
	str	w8, [x21]
Lloh29:
	adrp	x11, _ENA_ETH_IO_TX_META_DESC_FIRST_MASK@GOTPAGE
Lloh30:
	ldr	x11, [x11, _ENA_ETH_IO_TX_META_DESC_FIRST_MASK@GOTPAGEOFF]
Lloh31:
	ldr	w11, [x11]
	orr	w8, w8, w11
	str	w8, [x21]
Lloh32:
	adrp	x11, _ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK@GOTPAGE
Lloh33:
	ldr	x11, [x11, _ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK@GOTPAGEOFF]
Lloh34:
	ldr	w11, [x11]
	and	w11, w11, w13
	orr	w9, w11, w9
Lloh35:
	adrp	x11, _ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT@GOTPAGE
Lloh36:
	ldr	x11, [x11, _ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT@GOTPAGEOFF]
Lloh37:
	ldr	w11, [x11]
	ldp	w12, w13, [x20, #8]
	lsl	w11, w12, w11
Lloh38:
	adrp	x12, _ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK@GOTPAGE
Lloh39:
	ldr	x12, [x12, _ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK@GOTPAGEOFF]
Lloh40:
	ldr	w12, [x12]
	and	w11, w11, w12
Lloh41:
	adrp	x12, _ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT@GOTPAGE
Lloh42:
	ldr	x12, [x12, _ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT@GOTPAGEOFF]
	orr	w9, w11, w9
Lloh43:
	ldr	w11, [x12]
	lsl	w11, w13, w11
Lloh44:
	adrp	x12, _ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK@GOTPAGE
Lloh45:
	ldr	x12, [x12, _ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK@GOTPAGEOFF]
Lloh46:
	ldr	w12, [x12]
	and	w11, w11, w12
	orr	w9, w11, w9
	ldr	w10, [x10]
	orr	w8, w10, w8
	stp	w8, w9, [x21]
	mov	x1, x20
	mov	w2, #16
	bl	_memcpy
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_ena_com_sq_update_tail
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_ENA_ETH_IO_TX_META_DESC_META_DESC_MASK,4,2 ; @ENA_ETH_IO_TX_META_DESC_META_DESC_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK,4,2 ; @ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT,4,2 ; @ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT
	.comm	_ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK,4,2 ; @ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT,4,2 ; @ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT
	.comm	_ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK,4,2 ; @ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK,4,2 ; @ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_META_STORE_MASK,4,2 ; @ENA_ETH_IO_TX_META_DESC_META_STORE_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT,4,2 ; @ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT
	.comm	_ENA_ETH_IO_TX_META_DESC_PHASE_MASK,4,2 ; @ENA_ETH_IO_TX_META_DESC_PHASE_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_FIRST_MASK,4,2 ; @ENA_ETH_IO_TX_META_DESC_FIRST_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK,4,2 ; @ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT,4,2 ; @ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT
	.comm	_ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK,4,2 ; @ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK
	.comm	_ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT,4,2 ; @ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT
	.comm	_ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK,4,2 ; @ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK
	.no_dead_strip	_ena_com_create_and_store_tx_meta_desc
.subsections_via_symbols
