	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function al_fic_register
_al_fic_register:                       ## @al_fic_register
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	_NR_FIC_IRQS@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_irq_generic_chip_ops@GOTPCREL(%rip), %rdx
	movq	%r15, %rcx
	callq	_irq_domain_add_linear
	movl	%eax, (%r15)
	testl	%eax, %eax
	je	LBB0_1
## %bb.2:
	movl	(%rbx), %esi
	movl	12(%r15), %ecx
	movq	_handle_level_irq@GOTPCREL(%rip), %rdx
	movl	(%rdx), %r8d
	movq	_IRQ_GC_INIT_MASK_CACHE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %ebx
	xorl	%r14d, %r14d
	movl	%eax, %edi
	movl	$1, %edx
	xorl	%r9d, %r9d
	pushq	%rbx
	pushq	$0
	callq	_irq_alloc_domain_generic_chips
	addq	$16, %rsp
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	movl	%eax, %ebx
	leaq	L_.str.1(%rip), %rdi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	_pr_err
	movl	(%r15), %edi
	callq	_irq_domain_remove
	movl	%ebx, %r14d
	jmp	LBB0_5
LBB0_1:
	leaq	L_.str(%rip), %rdi
	xorl	%r14d, %r14d
	xorl	%eax, %eax
	callq	_pr_err
	movq	_ENOMEM@GOTPCREL(%rip), %rax
	subl	(%rax), %r14d
	jmp	LBB0_5
LBB0_4:
	movl	(%r15), %edi
	xorl	%esi, %esi
	callq	_irq_get_domain_generic_chip
	movl	8(%r15), %ecx
	movl	%ecx, 16(%rax)
	movq	_AL_FIC_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movq	8(%rax), %rdx
	movl	%ecx, 28(%rdx)
	movq	_AL_FIC_CAUSE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 24(%rdx)
	movq	_irq_gc_mask_set_bit@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 20(%rdx)
	movq	_irq_gc_mask_clr_bit@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 16(%rdx)
	movq	_irq_gc_ack_clr_bit@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 12(%rdx)
	movq	_al_fic_irq_set_type@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 8(%rdx)
	movq	_al_fic_irq_retrigger@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, 4(%rdx)
	movq	_IRQCHIP_SKIP_SET_WAKE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	movl	%ecx, (%rdx)
	movq	%r15, (%rax)
	movl	4(%r15), %edi
	movq	_al_fic_irq_handler@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdx
	callq	_irq_set_chained_handler_and_data
LBB0_5:
	movl	%r14d, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NR_FIC_IRQS,4,2                ## @NR_FIC_IRQS
	.comm	_irq_generic_chip_ops,4,2       ## @irq_generic_chip_ops
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"fail to add irq domain\n"

	.comm	_ENOMEM,4,2                     ## @ENOMEM
	.comm	_handle_level_irq,4,2           ## @handle_level_irq
	.comm	_IRQ_GC_INIT_MASK_CACHE,4,2     ## @IRQ_GC_INIT_MASK_CACHE
L_.str.1:                               ## @.str.1
	.asciz	"fail to allocate generic chip (%d)\n"

	.comm	_AL_FIC_MASK,4,2                ## @AL_FIC_MASK
	.comm	_AL_FIC_CAUSE,4,2               ## @AL_FIC_CAUSE
	.comm	_irq_gc_mask_set_bit,4,2        ## @irq_gc_mask_set_bit
	.comm	_irq_gc_mask_clr_bit,4,2        ## @irq_gc_mask_clr_bit
	.comm	_irq_gc_ack_clr_bit,4,2         ## @irq_gc_ack_clr_bit
	.comm	_al_fic_irq_set_type,4,2        ## @al_fic_irq_set_type
	.comm	_al_fic_irq_retrigger,4,2       ## @al_fic_irq_retrigger
	.comm	_IRQCHIP_SKIP_SET_WAKE,4,2      ## @IRQCHIP_SKIP_SET_WAKE
	.comm	_al_fic_irq_handler,4,2         ## @al_fic_irq_handler
	.no_dead_strip	_al_fic_register
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function al_fic_register
_al_fic_register:                       ; @al_fic_register
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x1
Lloh0:
	adrp	x20, _NR_FIC_IRQS@GOTPAGE
Lloh1:
	ldr	x20, [x20, _NR_FIC_IRQS@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x2, _irq_generic_chip_ops@GOTPAGE
Lloh3:
	ldr	x2, [x2, _irq_generic_chip_ops@GOTPAGEOFF]
	mov	x3, x19
	bl	_irq_domain_add_linear
	str	w0, [x19]
	cbz	w0, LBB0_3
; %bb.1:
	ldr	w1, [x20]
	ldr	w3, [x19, #12]
Lloh4:
	adrp	x8, _handle_level_irq@GOTPAGE
Lloh5:
	ldr	x8, [x8, _handle_level_irq@GOTPAGEOFF]
Lloh6:
	ldr	w4, [x8]
Lloh7:
	adrp	x8, _IRQ_GC_INIT_MASK_CACHE@GOTPAGE
Lloh8:
	ldr	x8, [x8, _IRQ_GC_INIT_MASK_CACHE@GOTPAGEOFF]
Lloh9:
	ldr	w7, [x8]
	mov	w2, #1
	mov	w5, #0
	mov	w6, #0
	bl	_irq_alloc_domain_generic_chips
	mov	x20, x0
	cbz	w0, LBB0_4
; %bb.2:
	str	x20, [sp]
Lloh10:
	adrp	x0, l_.str.1@PAGE
Lloh11:
	add	x0, x0, l_.str.1@PAGEOFF
	bl	_pr_err
	ldr	w0, [x19]
	bl	_irq_domain_remove
	b	LBB0_5
LBB0_3:
Lloh12:
	adrp	x0, l_.str@PAGE
Lloh13:
	add	x0, x0, l_.str@PAGEOFF
	bl	_pr_err
Lloh14:
	adrp	x8, _ENOMEM@GOTPAGE
Lloh15:
	ldr	x8, [x8, _ENOMEM@GOTPAGEOFF]
Lloh16:
	ldr	w8, [x8]
	neg	w20, w8
	b	LBB0_5
LBB0_4:
	ldr	w0, [x19]
	mov	w1, #0
	bl	_irq_get_domain_generic_chip
Lloh17:
	adrp	x8, _AL_FIC_MASK@GOTPAGE
Lloh18:
	ldr	x8, [x8, _AL_FIC_MASK@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	ldr	x9, [x0, #8]
Lloh20:
	adrp	x10, _AL_FIC_CAUSE@GOTPAGE
Lloh21:
	ldr	x10, [x10, _AL_FIC_CAUSE@GOTPAGEOFF]
Lloh22:
	ldr	w10, [x10]
Lloh23:
	adrp	x11, _irq_gc_mask_set_bit@GOTPAGE
Lloh24:
	ldr	x11, [x11, _irq_gc_mask_set_bit@GOTPAGEOFF]
	stp	w10, w8, [x9, #24]
Lloh25:
	ldr	w8, [x11]
Lloh26:
	adrp	x10, _irq_gc_mask_clr_bit@GOTPAGE
Lloh27:
	ldr	x10, [x10, _irq_gc_mask_clr_bit@GOTPAGEOFF]
Lloh28:
	ldr	w10, [x10]
	stp	w10, w8, [x9, #16]
Lloh29:
	adrp	x8, _irq_gc_ack_clr_bit@GOTPAGE
Lloh30:
	ldr	x8, [x8, _irq_gc_ack_clr_bit@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
Lloh32:
	adrp	x10, _al_fic_irq_set_type@GOTPAGE
Lloh33:
	ldr	x10, [x10, _al_fic_irq_set_type@GOTPAGEOFF]
Lloh34:
	ldr	w10, [x10]
	stp	w10, w8, [x9, #8]
Lloh35:
	adrp	x8, _al_fic_irq_retrigger@GOTPAGE
Lloh36:
	ldr	x8, [x8, _al_fic_irq_retrigger@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
Lloh38:
	adrp	x10, _IRQCHIP_SKIP_SET_WAKE@GOTPAGE
Lloh39:
	ldr	x10, [x10, _IRQCHIP_SKIP_SET_WAKE@GOTPAGEOFF]
Lloh40:
	ldr	w10, [x10]
	stp	w10, w8, [x9]
	ldp	w8, w9, [x19, #4]
	str	w9, [x0, #16]
	str	x19, [x0]
Lloh41:
	adrp	x9, _al_fic_irq_handler@GOTPAGE
Lloh42:
	ldr	x9, [x9, _al_fic_irq_handler@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x9]
	mov	x0, x8
	mov	x2, x19
	bl	_irq_set_chained_handler_and_data
LBB0_5:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpAdd	Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_NR_FIC_IRQS,4,2                ; @NR_FIC_IRQS
	.comm	_irq_generic_chip_ops,4,2       ; @irq_generic_chip_ops
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"fail to add irq domain\n"

	.comm	_ENOMEM,4,2                     ; @ENOMEM
	.comm	_handle_level_irq,4,2           ; @handle_level_irq
	.comm	_IRQ_GC_INIT_MASK_CACHE,4,2     ; @IRQ_GC_INIT_MASK_CACHE
l_.str.1:                               ; @.str.1
	.asciz	"fail to allocate generic chip (%d)\n"

	.comm	_AL_FIC_MASK,4,2                ; @AL_FIC_MASK
	.comm	_AL_FIC_CAUSE,4,2               ; @AL_FIC_CAUSE
	.comm	_irq_gc_mask_set_bit,4,2        ; @irq_gc_mask_set_bit
	.comm	_irq_gc_mask_clr_bit,4,2        ; @irq_gc_mask_clr_bit
	.comm	_irq_gc_ack_clr_bit,4,2         ; @irq_gc_ack_clr_bit
	.comm	_al_fic_irq_set_type,4,2        ; @al_fic_irq_set_type
	.comm	_al_fic_irq_retrigger,4,2       ; @al_fic_irq_retrigger
	.comm	_IRQCHIP_SKIP_SET_WAKE,4,2      ; @IRQCHIP_SKIP_SET_WAKE
	.comm	_al_fic_irq_handler,4,2         ; @al_fic_irq_handler
	.no_dead_strip	_al_fic_register
.subsections_via_symbols
