	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function asic3_mmc_enable
_asic3_mmc_enable:                      ## @asic3_mmc_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	(%rdi), %edi
	callq	_dev_get_drvdata
	movq	%rax, %rbx
	movq	_SDHWCTRL@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	movq	_SDCONF@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_ASIC3_OFFSET
	movq	_ASIC3_SDHWCTRL_LEVCD@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$1, %ecx
	callq	_asic3_set_register
	movl	(%r14), %edi
	movl	(%r15), %esi
	callq	_ASIC3_OFFSET
	movq	_ASIC3_SDHWCTRL_LEVWP@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$1, %ecx
	callq	_asic3_set_register
	movl	(%r14), %edi
	movl	(%r15), %esi
	callq	_ASIC3_OFFSET
	movq	_ASIC3_SDHWCTRL_SUSPEND@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	xorl	%ecx, %ecx
	callq	_asic3_set_register
	movl	(%r14), %edi
	movl	(%r15), %esi
	callq	_ASIC3_OFFSET
	movq	_ASIC3_SDHWCTRL_PCLR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	xorl	%ecx, %ecx
	callq	_asic3_set_register
	movq	_ASIC3_CLOCK_EX0@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	shlq	$2, %rsi
	addq	16(%rbx), %rsi
	movq	%rbx, %rdi
	callq	_asic3_clk_enable
	movq	_ASIC3_CLOCK_EX1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	shlq	$2, %rsi
	addq	16(%rbx), %rsi
	movq	%rbx, %rdi
	callq	_asic3_clk_enable
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$5000, %esi                     ## imm = 0x1388
	callq	_usleep_range
	movq	_CLOCK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_SEL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ASIC3_OFFSET
	movq	_CLOCK_SEL_CX@GOTPCREL(%rip), %rcx
	movq	_CLOCK_SEL_SD_HCLK_SEL@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_asic3_write_register
	movq	_ASIC3_CLOCK_SD_HOST@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	shlq	$2, %rsi
	addq	16(%rbx), %rsi
	movq	%rbx, %rdi
	callq	_asic3_clk_enable
	movq	_ASIC3_CLOCK_SD_BUS@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	shlq	$2, %rsi
	addq	16(%rbx), %rsi
	movq	%rbx, %rdi
	callq	_asic3_clk_enable
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$5000, %esi                     ## imm = 0x1388
	callq	_usleep_range
	movq	_EXTCF@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_SELECT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_ASIC3_OFFSET
	movq	_ASIC3_EXTCF_SD_MEM_ENABLE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$1, %ecx
	callq	_asic3_set_register
	movl	(%r14), %edi
	movl	(%r15), %esi
	callq	_ASIC3_OFFSET
	movq	_ASIC3_SDHWCTRL_SDPWR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	movq	%rbx, %rdi
	movl	%eax, %esi
	movl	$1, %ecx
	callq	_asic3_set_register
	movl	$1, %esi
	subq	(%rbx), %rsi
	movl	8(%rbx), %edi
	movq	_ASIC3_SD_CTRL_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	sarl	%edx
	callq	_tmio_core_mmc_enable
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_SDHWCTRL,4,2                   ## @SDHWCTRL
	.comm	_SDCONF,4,2                     ## @SDCONF
	.comm	_ASIC3_SDHWCTRL_LEVCD,4,2       ## @ASIC3_SDHWCTRL_LEVCD
	.comm	_ASIC3_SDHWCTRL_LEVWP,4,2       ## @ASIC3_SDHWCTRL_LEVWP
	.comm	_ASIC3_SDHWCTRL_SUSPEND,4,2     ## @ASIC3_SDHWCTRL_SUSPEND
	.comm	_ASIC3_SDHWCTRL_PCLR,4,2        ## @ASIC3_SDHWCTRL_PCLR
	.comm	_ASIC3_CLOCK_EX0,8,3            ## @ASIC3_CLOCK_EX0
	.comm	_ASIC3_CLOCK_EX1,8,3            ## @ASIC3_CLOCK_EX1
	.comm	_CLOCK,4,2                      ## @CLOCK
	.comm	_SEL,4,2                        ## @SEL
	.comm	_CLOCK_SEL_CX,4,2               ## @CLOCK_SEL_CX
	.comm	_CLOCK_SEL_SD_HCLK_SEL,4,2      ## @CLOCK_SEL_SD_HCLK_SEL
	.comm	_ASIC3_CLOCK_SD_HOST,8,3        ## @ASIC3_CLOCK_SD_HOST
	.comm	_ASIC3_CLOCK_SD_BUS,8,3         ## @ASIC3_CLOCK_SD_BUS
	.comm	_EXTCF,4,2                      ## @EXTCF
	.comm	_SELECT,4,2                     ## @SELECT
	.comm	_ASIC3_EXTCF_SD_MEM_ENABLE,4,2  ## @ASIC3_EXTCF_SD_MEM_ENABLE
	.comm	_ASIC3_SDHWCTRL_SDPWR,4,2       ## @ASIC3_SDHWCTRL_SDPWR
	.comm	_ASIC3_SD_CTRL_BASE,4,2         ## @ASIC3_SD_CTRL_BASE
	.no_dead_strip	_asic3_mmc_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function asic3_mmc_enable
_asic3_mmc_enable:                      ; @asic3_mmc_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	ldr	w0, [x0]
	bl	_dev_get_drvdata
	mov	x19, x0
Lloh0:
	adrp	x21, _SDHWCTRL@GOTPAGE
Lloh1:
	ldr	x21, [x21, _SDHWCTRL@GOTPAGEOFF]
	ldr	w0, [x21]
Lloh2:
	adrp	x22, _SDCONF@GOTPAGE
Lloh3:
	ldr	x22, [x22, _SDCONF@GOTPAGEOFF]
	ldr	w1, [x22]
	bl	_ASIC3_OFFSET
	mov	x1, x0
Lloh4:
	adrp	x8, _ASIC3_SDHWCTRL_LEVCD@GOTPAGE
Lloh5:
	ldr	x8, [x8, _ASIC3_SDHWCTRL_LEVCD@GOTPAGEOFF]
Lloh6:
	ldr	w2, [x8]
	mov	w20, #1
	mov	x0, x19
	mov	w3, #1
	bl	_asic3_set_register
	ldr	w0, [x21]
	ldr	w1, [x22]
	bl	_ASIC3_OFFSET
	mov	x1, x0
Lloh7:
	adrp	x8, _ASIC3_SDHWCTRL_LEVWP@GOTPAGE
Lloh8:
	ldr	x8, [x8, _ASIC3_SDHWCTRL_LEVWP@GOTPAGEOFF]
Lloh9:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #1
	bl	_asic3_set_register
	ldr	w0, [x21]
	ldr	w1, [x22]
	bl	_ASIC3_OFFSET
	mov	x1, x0
Lloh10:
	adrp	x8, _ASIC3_SDHWCTRL_SUSPEND@GOTPAGE
Lloh11:
	ldr	x8, [x8, _ASIC3_SDHWCTRL_SUSPEND@GOTPAGEOFF]
Lloh12:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_asic3_set_register
	ldr	w0, [x21]
	ldr	w1, [x22]
	bl	_ASIC3_OFFSET
	mov	x1, x0
Lloh13:
	adrp	x8, _ASIC3_SDHWCTRL_PCLR@GOTPAGE
Lloh14:
	ldr	x8, [x8, _ASIC3_SDHWCTRL_PCLR@GOTPAGEOFF]
Lloh15:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_asic3_set_register
	ldr	x8, [x19, #16]
Lloh16:
	adrp	x9, _ASIC3_CLOCK_EX0@GOTPAGE
Lloh17:
	ldr	x9, [x9, _ASIC3_CLOCK_EX0@GOTPAGEOFF]
Lloh18:
	ldr	x9, [x9]
	add	x1, x8, x9, lsl #2
	mov	x0, x19
	bl	_asic3_clk_enable
	ldr	x8, [x19, #16]
Lloh19:
	adrp	x9, _ASIC3_CLOCK_EX1@GOTPAGE
Lloh20:
	ldr	x9, [x9, _ASIC3_CLOCK_EX1@GOTPAGEOFF]
Lloh21:
	ldr	x9, [x9]
	add	x1, x8, x9, lsl #2
	mov	x0, x19
	bl	_asic3_clk_enable
	mov	w0, #1000
	mov	w1, #5000
	bl	_usleep_range
Lloh22:
	adrp	x8, _CLOCK@GOTPAGE
Lloh23:
	ldr	x8, [x8, _CLOCK@GOTPAGEOFF]
Lloh24:
	ldr	w0, [x8]
Lloh25:
	adrp	x8, _SEL@GOTPAGE
Lloh26:
	ldr	x8, [x8, _SEL@GOTPAGEOFF]
Lloh27:
	ldr	w1, [x8]
	bl	_ASIC3_OFFSET
	mov	x1, x0
Lloh28:
	adrp	x8, _CLOCK_SEL_CX@GOTPAGE
Lloh29:
	ldr	x8, [x8, _CLOCK_SEL_CX@GOTPAGEOFF]
Lloh30:
	ldr	w8, [x8]
Lloh31:
	adrp	x9, _CLOCK_SEL_SD_HCLK_SEL@GOTPAGE
Lloh32:
	ldr	x9, [x9, _CLOCK_SEL_SD_HCLK_SEL@GOTPAGEOFF]
Lloh33:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	bl	_asic3_write_register
	ldr	x8, [x19, #16]
Lloh34:
	adrp	x9, _ASIC3_CLOCK_SD_HOST@GOTPAGE
Lloh35:
	ldr	x9, [x9, _ASIC3_CLOCK_SD_HOST@GOTPAGEOFF]
Lloh36:
	ldr	x9, [x9]
	add	x1, x8, x9, lsl #2
	mov	x0, x19
	bl	_asic3_clk_enable
	ldr	x8, [x19, #16]
Lloh37:
	adrp	x9, _ASIC3_CLOCK_SD_BUS@GOTPAGE
Lloh38:
	ldr	x9, [x9, _ASIC3_CLOCK_SD_BUS@GOTPAGEOFF]
Lloh39:
	ldr	x9, [x9]
	add	x1, x8, x9, lsl #2
	mov	x0, x19
	bl	_asic3_clk_enable
	mov	w0, #1000
	mov	w1, #5000
	bl	_usleep_range
Lloh40:
	adrp	x8, _EXTCF@GOTPAGE
Lloh41:
	ldr	x8, [x8, _EXTCF@GOTPAGEOFF]
Lloh42:
	ldr	w0, [x8]
Lloh43:
	adrp	x8, _SELECT@GOTPAGE
Lloh44:
	ldr	x8, [x8, _SELECT@GOTPAGEOFF]
Lloh45:
	ldr	w1, [x8]
	bl	_ASIC3_OFFSET
	mov	x1, x0
Lloh46:
	adrp	x8, _ASIC3_EXTCF_SD_MEM_ENABLE@GOTPAGE
Lloh47:
	ldr	x8, [x8, _ASIC3_EXTCF_SD_MEM_ENABLE@GOTPAGEOFF]
Lloh48:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #1
	bl	_asic3_set_register
	ldr	w0, [x21]
	ldr	w1, [x22]
	bl	_ASIC3_OFFSET
	mov	x1, x0
Lloh49:
	adrp	x8, _ASIC3_SDHWCTRL_SDPWR@GOTPAGE
Lloh50:
	ldr	x8, [x8, _ASIC3_SDHWCTRL_SDPWR@GOTPAGEOFF]
Lloh51:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #1
	bl	_asic3_set_register
	ldr	w0, [x19, #8]
	ldr	x8, [x19]
	sub	x1, x20, x8
Lloh52:
	adrp	x8, _ASIC3_SD_CTRL_BASE@GOTPAGE
Lloh53:
	ldr	x8, [x8, _ASIC3_SD_CTRL_BASE@GOTPAGEOFF]
Lloh54:
	ldr	w8, [x8]
	asr	w2, w8, #1
	bl	_tmio_core_mmc_enable
	mov	w0, #0
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh54
	.loh AdrpLdrGotLdr	Lloh49, Lloh50, Lloh51
	.loh AdrpLdrGotLdr	Lloh46, Lloh47, Lloh48
	.loh AdrpLdrGotLdr	Lloh43, Lloh44, Lloh45
	.loh AdrpLdrGotLdr	Lloh40, Lloh41, Lloh42
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh36
	.loh AdrpLdrGotLdr	Lloh31, Lloh32, Lloh33
	.loh AdrpLdrGotLdr	Lloh28, Lloh29, Lloh30
	.loh AdrpLdrGotLdr	Lloh25, Lloh26, Lloh27
	.loh AdrpLdrGotLdr	Lloh22, Lloh23, Lloh24
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_SDHWCTRL,4,2                   ; @SDHWCTRL
	.comm	_SDCONF,4,2                     ; @SDCONF
	.comm	_ASIC3_SDHWCTRL_LEVCD,4,2       ; @ASIC3_SDHWCTRL_LEVCD
	.comm	_ASIC3_SDHWCTRL_LEVWP,4,2       ; @ASIC3_SDHWCTRL_LEVWP
	.comm	_ASIC3_SDHWCTRL_SUSPEND,4,2     ; @ASIC3_SDHWCTRL_SUSPEND
	.comm	_ASIC3_SDHWCTRL_PCLR,4,2        ; @ASIC3_SDHWCTRL_PCLR
	.comm	_ASIC3_CLOCK_EX0,8,3            ; @ASIC3_CLOCK_EX0
	.comm	_ASIC3_CLOCK_EX1,8,3            ; @ASIC3_CLOCK_EX1
	.comm	_CLOCK,4,2                      ; @CLOCK
	.comm	_SEL,4,2                        ; @SEL
	.comm	_CLOCK_SEL_CX,4,2               ; @CLOCK_SEL_CX
	.comm	_CLOCK_SEL_SD_HCLK_SEL,4,2      ; @CLOCK_SEL_SD_HCLK_SEL
	.comm	_ASIC3_CLOCK_SD_HOST,8,3        ; @ASIC3_CLOCK_SD_HOST
	.comm	_ASIC3_CLOCK_SD_BUS,8,3         ; @ASIC3_CLOCK_SD_BUS
	.comm	_EXTCF,4,2                      ; @EXTCF
	.comm	_SELECT,4,2                     ; @SELECT
	.comm	_ASIC3_EXTCF_SD_MEM_ENABLE,4,2  ; @ASIC3_EXTCF_SD_MEM_ENABLE
	.comm	_ASIC3_SDHWCTRL_SDPWR,4,2       ; @ASIC3_SDHWCTRL_SDPWR
	.comm	_ASIC3_SD_CTRL_BASE,4,2         ; @ASIC3_SD_CTRL_BASE
	.no_dead_strip	_asic3_mmc_enable
.subsections_via_symbols
