	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_mmc_set_ios
_meson_mmc_set_ios:                     ## @meson_mmc_set_ios
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %r15
	callq	_mmc_priv
	movq	%rax, %r12
	movl	(%r14), %eax
	cmpl	$128, %eax
	je	LBB0_8
## %bb.1:
	cmpl	$129, %eax
	je	LBB0_10
## %bb.2:
	cmpl	$130, %eax
	jne	LBB0_15
## %bb.3:
	movl	4(%r15), %edi
	callq	_IS_ERR
	testl	%eax, %eax
	jne	LBB0_5
## %bb.4:
	movl	4(%r15), %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_mmc_regulator_set_ocr
LBB0_5:
	movl	(%r15), %edi
	callq	_IS_ERR
	testl	%eax, %eax
	jne	LBB0_15
## %bb.6:
	cmpl	$0, (%r12)
	je	LBB0_15
## %bb.7:
	movl	(%r15), %edi
	callq	_regulator_disable
	movl	$0, (%r12)
	jmp	LBB0_15
LBB0_8:
	movl	4(%r15), %edi
	callq	_IS_ERR
	testl	%eax, %eax
	jne	LBB0_15
## %bb.9:
	movl	4(%r15), %esi
	movl	8(%r14), %edx
	movq	%r15, %rdi
	callq	_mmc_regulator_set_ocr
	jmp	LBB0_15
LBB0_10:
	movl	(%r15), %edi
	callq	_IS_ERR
	testl	%eax, %eax
	jne	LBB0_15
## %bb.11:
	cmpl	$0, (%r12)
	jne	LBB0_15
## %bb.12:
	movl	(%r15), %edi
	callq	_regulator_enable
	testl	%eax, %eax
	js	LBB0_13
## %bb.14:
	movl	$1, (%r12)
	jmp	LBB0_15
LBB0_13:
	movl	4(%r12), %edi
	leaq	L_.str(%rip), %rsi
	xorl	%eax, %eax
	callq	_dev_err
LBB0_15:
	movl	4(%r14), %edx
	leal	-131(%rdx), %eax
	cmpl	$3, %eax
	jae	LBB0_16
## %bb.17:
	cltq
	leaq	l_switch.table.meson_mmc_set_ios(%rip), %rcx
	movq	(%rcx,%rax,8), %rax
	jmp	LBB0_18
LBB0_16:
	movl	4(%r12), %edi
	leaq	L_.str.1(%rip), %rsi
                                        ## kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	_dev_err
	movq	_CFG_BUS_WIDTH_4@GOTPCREL(%rip), %rax
LBB0_18:
	movl	(%rax), %r13d
	movq	_SD_EMMC_CFG@GOTPCREL(%rip), %r15
	movq	(%r15), %rdi
	addq	8(%r12), %rdi
	callq	_readl
	movq	_CFG_BUS_WIDTH_MASK@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edi
	movl	%edi, %ebx
	notl	%ebx
	andl	%eax, %ebx
	movl	%r13d, %esi
	callq	_FIELD_PREP
	movl	%eax, %r13d
	orl	%ebx, %r13d
	movq	(%r15), %rsi
	addq	8(%r12), %rsi
	movl	%r13d, %edi
	callq	_writel
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_meson_mmc_check_resampling
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_meson_mmc_prepare_ios_clock
	testl	%eax, %eax
	je	LBB0_20
## %bb.19:
	movl	4(%r12), %edi
	leaq	L_.str.2(%rip), %rsi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	_dev_err
LBB0_20:
	movl	4(%r12), %edi
	leaq	L_.str.3(%rip), %rsi
	movl	%r13d, %edx
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_dev_dbg                        ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"failed to enable vqmmc regulator\n"

	.comm	_CFG_BUS_WIDTH_1,4,2            ## @CFG_BUS_WIDTH_1
	.comm	_CFG_BUS_WIDTH_4,4,2            ## @CFG_BUS_WIDTH_4
	.comm	_CFG_BUS_WIDTH_8,4,2            ## @CFG_BUS_WIDTH_8
L_.str.1:                               ## @.str.1
	.asciz	"Invalid ios->bus_width: %u.  Setting to 4.\n"

	.comm	_SD_EMMC_CFG,8,3                ## @SD_EMMC_CFG
	.comm	_CFG_BUS_WIDTH_MASK,4,2         ## @CFG_BUS_WIDTH_MASK
L_.str.2:                               ## @.str.2
	.asciz	"Failed to set clock: %d\n,"

L_.str.3:                               ## @.str.3
	.asciz	"SD_EMMC_CFG:  0x%08x\n"

	.no_dead_strip	_meson_mmc_set_ios
	.section	__DATA,__const
	.p2align	3                               ## @switch.table.meson_mmc_set_ios
l_switch.table.meson_mmc_set_ios:
	.quad	_CFG_BUS_WIDTH_8
	.quad	_CFG_BUS_WIDTH_4
	.quad	_CFG_BUS_WIDTH_1

.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_mmc_set_ios
_meson_mmc_set_ios:                     ; @meson_mmc_set_ios
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x1
	mov	x21, x0
	bl	_mmc_priv
	mov	x19, x0
	ldr	w8, [x20]
	cmp	w8, #128
	b.eq	LBB0_8
; %bb.1:
	cmp	w8, #129
	b.eq	LBB0_10
; %bb.2:
	cmp	w8, #130
	b.ne	LBB0_15
; %bb.3:
	ldr	w0, [x21, #4]
	bl	_IS_ERR
	cbnz	w0, LBB0_5
; %bb.4:
	ldr	w1, [x21, #4]
	mov	x0, x21
	mov	w2, #0
	bl	_mmc_regulator_set_ocr
LBB0_5:
	ldr	w0, [x21]
	bl	_IS_ERR
	cbnz	w0, LBB0_15
; %bb.6:
	ldr	w8, [x19]
	cbz	w8, LBB0_15
; %bb.7:
	ldr	w0, [x21]
	bl	_regulator_disable
	str	wzr, [x19]
	b	LBB0_15
LBB0_8:
	ldr	w0, [x21, #4]
	bl	_IS_ERR
	cbnz	w0, LBB0_15
; %bb.9:
	ldr	w1, [x21, #4]
	ldr	w2, [x20, #8]
	mov	x0, x21
	bl	_mmc_regulator_set_ocr
	b	LBB0_15
LBB0_10:
	ldr	w0, [x21]
	bl	_IS_ERR
	cbnz	w0, LBB0_15
; %bb.11:
	ldr	w8, [x19]
	cbnz	w8, LBB0_15
; %bb.12:
	ldr	w0, [x21]
	bl	_regulator_enable
	tbnz	w0, #31, LBB0_14
; %bb.13:
	mov	w8, #1
	str	w8, [x19]
	b	LBB0_15
LBB0_14:
	ldr	w0, [x19, #4]
Lloh0:
	adrp	x1, l_.str@PAGE
Lloh1:
	add	x1, x1, l_.str@PAGEOFF
	bl	_dev_err
LBB0_15:
	ldr	w8, [x20, #4]
	sub	w9, w8, #131
	cmp	w9, #3
	b.hs	LBB0_17
; %bb.16:
Lloh2:
	adrp	x8, l_switch.table.meson_mmc_set_ios@PAGE
Lloh3:
	add	x8, x8, l_switch.table.meson_mmc_set_ios@PAGEOFF
	ldr	x8, [x8, w9, sxtw #3]
	b	LBB0_18
LBB0_17:
	ldr	w0, [x19, #4]
	str	x8, [sp]
Lloh4:
	adrp	x1, l_.str.1@PAGE
Lloh5:
	add	x1, x1, l_.str.1@PAGEOFF
	bl	_dev_err
Lloh6:
	adrp	x8, _CFG_BUS_WIDTH_4@GOTPAGE
Lloh7:
	ldr	x8, [x8, _CFG_BUS_WIDTH_4@GOTPAGEOFF]
LBB0_18:
	ldr	w21, [x8]
	ldr	x8, [x19, #8]
Lloh8:
	adrp	x22, _SD_EMMC_CFG@GOTPAGE
Lloh9:
	ldr	x22, [x22, _SD_EMMC_CFG@GOTPAGEOFF]
	ldr	x9, [x22]
	add	x0, x9, x8
	bl	_readl
Lloh10:
	adrp	x8, _CFG_BUS_WIDTH_MASK@GOTPAGE
Lloh11:
	ldr	x8, [x8, _CFG_BUS_WIDTH_MASK@GOTPAGEOFF]
Lloh12:
	ldr	w8, [x8]
	bic	w23, w0, w8
	mov	x0, x8
	mov	x1, x21
	bl	_FIELD_PREP
	orr	w21, w23, w0
	ldr	x8, [x19, #8]
	ldr	x9, [x22]
	add	x1, x9, x8
	mov	x0, x21
	bl	_writel
	mov	x0, x19
	mov	x1, x20
	bl	_meson_mmc_check_resampling
	mov	x0, x19
	mov	x1, x20
	bl	_meson_mmc_prepare_ios_clock
                                        ; kill: def $w0 killed $w0 def $x0
	cbz	w0, LBB0_20
; %bb.19:
	ldr	w8, [x19, #4]
	str	x0, [sp]
Lloh13:
	adrp	x1, l_.str.2@PAGE
Lloh14:
	add	x1, x1, l_.str.2@PAGEOFF
	mov	x0, x8
	bl	_dev_err
LBB0_20:
	ldr	w0, [x19, #4]
Lloh15:
	adrp	x1, l_.str.3@PAGE
Lloh16:
	add	x1, x1, l_.str.3@PAGEOFF
	mov	x2, x21
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	b	_dev_dbg
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpAdd	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh6, Lloh7
	.loh AdrpAdd	Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpAdd	Lloh13, Lloh14
	.loh AdrpAdd	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"failed to enable vqmmc regulator\n"

	.comm	_CFG_BUS_WIDTH_1,4,2            ; @CFG_BUS_WIDTH_1
	.comm	_CFG_BUS_WIDTH_4,4,2            ; @CFG_BUS_WIDTH_4
	.comm	_CFG_BUS_WIDTH_8,4,2            ; @CFG_BUS_WIDTH_8
l_.str.1:                               ; @.str.1
	.asciz	"Invalid ios->bus_width: %u.  Setting to 4.\n"

	.comm	_SD_EMMC_CFG,8,3                ; @SD_EMMC_CFG
	.comm	_CFG_BUS_WIDTH_MASK,4,2         ; @CFG_BUS_WIDTH_MASK
l_.str.2:                               ; @.str.2
	.asciz	"Failed to set clock: %d\n,"

l_.str.3:                               ; @.str.3
	.asciz	"SD_EMMC_CFG:  0x%08x\n"

	.no_dead_strip	_meson_mmc_set_ios
	.section	__DATA,__const
	.p2align	3                               ; @switch.table.meson_mmc_set_ios
l_switch.table.meson_mmc_set_ios:
	.quad	_CFG_BUS_WIDTH_8
	.quad	_CFG_BUS_WIDTH_4
	.quad	_CFG_BUS_WIDTH_1

.subsections_via_symbols
