	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_verity_is_fec_opt_arg          ## -- Begin function verity_is_fec_opt_arg
	.p2align	4, 0x90
_verity_is_fec_opt_arg:                 ## @verity_is_fec_opt_arg
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_DM_VERITY_OPT_FEC_DEV@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_strcasecmp
	movl	$1, %r14d
	testl	%eax, %eax
	je	LBB0_4
## %bb.1:
	movq	_DM_VERITY_OPT_FEC_BLOCKS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_strcasecmp
	testl	%eax, %eax
	je	LBB0_4
## %bb.2:
	movq	_DM_VERITY_OPT_FEC_START@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_strcasecmp
	testl	%eax, %eax
	je	LBB0_4
## %bb.3:
	movq	_DM_VERITY_OPT_FEC_ROOTS@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	_strcasecmp
	xorl	%r14d, %r14d
	testl	%eax, %eax
	sete	%r14b
LBB0_4:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_DM_VERITY_OPT_FEC_DEV,4,2      ## @DM_VERITY_OPT_FEC_DEV
	.comm	_DM_VERITY_OPT_FEC_BLOCKS,4,2   ## @DM_VERITY_OPT_FEC_BLOCKS
	.comm	_DM_VERITY_OPT_FEC_START,4,2    ## @DM_VERITY_OPT_FEC_START
	.comm	_DM_VERITY_OPT_FEC_ROOTS,4,2    ## @DM_VERITY_OPT_FEC_ROOTS
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_verity_is_fec_opt_arg          ; -- Begin function verity_is_fec_opt_arg
	.p2align	2
_verity_is_fec_opt_arg:                 ; @verity_is_fec_opt_arg
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
Lloh0:
	adrp	x8, _DM_VERITY_OPT_FEC_DEV@GOTPAGE
Lloh1:
	ldr	x8, [x8, _DM_VERITY_OPT_FEC_DEV@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	bl	_strcasecmp
	cbz	w0, LBB0_4
; %bb.1:
Lloh3:
	adrp	x8, _DM_VERITY_OPT_FEC_BLOCKS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _DM_VERITY_OPT_FEC_BLOCKS@GOTPAGEOFF]
Lloh5:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_strcasecmp
	cbz	w0, LBB0_4
; %bb.2:
Lloh6:
	adrp	x8, _DM_VERITY_OPT_FEC_START@GOTPAGE
Lloh7:
	ldr	x8, [x8, _DM_VERITY_OPT_FEC_START@GOTPAGEOFF]
Lloh8:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_strcasecmp
	cbz	w0, LBB0_4
; %bb.3:
Lloh9:
	adrp	x8, _DM_VERITY_OPT_FEC_ROOTS@GOTPAGE
Lloh10:
	ldr	x8, [x8, _DM_VERITY_OPT_FEC_ROOTS@GOTPAGEOFF]
Lloh11:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_strcasecmp
	cmp	w0, #0
	cset	w0, eq
	b	LBB0_5
LBB0_4:
	mov	w0, #1
LBB0_5:
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.cfi_endproc
                                        ; -- End function
	.comm	_DM_VERITY_OPT_FEC_DEV,4,2      ; @DM_VERITY_OPT_FEC_DEV
	.comm	_DM_VERITY_OPT_FEC_BLOCKS,4,2   ; @DM_VERITY_OPT_FEC_BLOCKS
	.comm	_DM_VERITY_OPT_FEC_START,4,2    ; @DM_VERITY_OPT_FEC_START
	.comm	_DM_VERITY_OPT_FEC_ROOTS,4,2    ; @DM_VERITY_OPT_FEC_ROOTS
.subsections_via_symbols
