	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function dw_mci_hs_set_timing
_dw_mci_hs_set_timing:                  ## @dw_mci_hs_set_timing
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %ebx
	movq	%rdi, %r15
	movq	(%rdi), %rax
	movslq	(%rax), %rax
	movq	_hs_timing_cfg@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	movq	(%rcx,%rax,8), %rax
	movslq	%esi, %rcx
	shlq	$4, %rcx
	cmpl	$-1, %edx
	jne	LBB0_2
## %bb.1:
	movl	12(%rax,%rcx), %edx
	addl	8(%rax,%rcx), %edx
	movl	%edx, %ebx
	shrl	$31, %ebx
	addl	%edx, %ebx
	sarl	%ebx
LBB0_2:
	movl	(%rax,%rcx), %edx
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movl	4(%rax,%rcx), %r13d
	xorl	%r12d, %r12d
	cmpl	$128, %esi
	je	LBB0_5
## %bb.3:
	movl	$0, %r14d
	cmpl	$129, %esi
	jne	LBB0_6
## %bb.4:
	movq	_USE_DLY_MIN_SMPL@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ebx
	setge	%al
	movq	_USE_DLY_MAX_SMPL@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %ebx
	setle	%cl
	andb	%al, %cl
	movzbl	%cl, %r12d
LBB0_5:
	movq	_ENABLE_SHIFT_MIN_SMPL@GOTPCREL(%rip), %rax
	cmpl	(%rax), %ebx
	setge	%al
	movq	_ENABLE_SHIFT_MAX_SMPL@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %ebx
	movl	%r12d, %r14d
	setle	%cl
	andb	%al, %cl
	movzbl	%cl, %r12d
LBB0_6:
	movq	_GPIO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	xorl	%edx, %edx
	callq	_mci_writel
	movl	$5, %edi
	movl	$10, %esi
	callq	_usleep_range
	movq	_UHS_REG_EXT_SAMPLE_PHASE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_FIELD_PREP
	movl	%eax, %ebx
	movq	_UHS_REG_EXT_SAMPLE_DLY_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r13d, %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movq	_UHS_REG_EXT_SAMPLE_DRVPHASE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movq	_UHS_REG_EXT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_mci_writel
	movq	_ENABLE_SHIFT@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r15, %rdi
	movl	%r12d, %edx
	callq	_mci_writel
	movq	_GPIO_CLK_DIV_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	_GENCLK_DIV@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_FIELD_PREP
	movl	%eax, %ebx
	movq	_GPIO_USE_SAMPLE_DLY_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r14d, %esi
	callq	_FIELD_PREP
	orl	%eax, %ebx
	movq	_GPIO@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_GPIO_CLK_ENABLE@GOTPCREL(%rip), %rax
	orl	(%rax), %ebx
	movq	%r15, %rdi
	movl	%ebx, %edx
	callq	_mci_writel
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_usleep_range                   ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_hs_timing_cfg,8,3              ## @hs_timing_cfg
	.comm	_USE_DLY_MIN_SMPL,4,2           ## @USE_DLY_MIN_SMPL
	.comm	_USE_DLY_MAX_SMPL,4,2           ## @USE_DLY_MAX_SMPL
	.comm	_ENABLE_SHIFT_MIN_SMPL,4,2      ## @ENABLE_SHIFT_MIN_SMPL
	.comm	_ENABLE_SHIFT_MAX_SMPL,4,2      ## @ENABLE_SHIFT_MAX_SMPL
	.comm	_GPIO,4,2                       ## @GPIO
	.comm	_UHS_REG_EXT_SAMPLE_PHASE_MASK,4,2 ## @UHS_REG_EXT_SAMPLE_PHASE_MASK
	.comm	_UHS_REG_EXT_SAMPLE_DLY_MASK,4,2 ## @UHS_REG_EXT_SAMPLE_DLY_MASK
	.comm	_UHS_REG_EXT_SAMPLE_DRVPHASE_MASK,4,2 ## @UHS_REG_EXT_SAMPLE_DRVPHASE_MASK
	.comm	_UHS_REG_EXT,4,2                ## @UHS_REG_EXT
	.comm	_ENABLE_SHIFT,4,2               ## @ENABLE_SHIFT
	.comm	_GPIO_CLK_DIV_MASK,4,2          ## @GPIO_CLK_DIV_MASK
	.comm	_GENCLK_DIV,4,2                 ## @GENCLK_DIV
	.comm	_GPIO_USE_SAMPLE_DLY_MASK,4,2   ## @GPIO_USE_SAMPLE_DLY_MASK
	.comm	_GPIO_CLK_ENABLE,4,2            ## @GPIO_CLK_ENABLE
	.no_dead_strip	_dw_mci_hs_set_timing
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function dw_mci_hs_set_timing
_dw_mci_hs_set_timing:                  ; @dw_mci_hs_set_timing
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x23, x2
                                        ; kill: def $w1 killed $w1 def $x1
	mov	x19, x0
	ldr	x8, [x0]
	ldrsw	x8, [x8]
Lloh0:
	adrp	x9, _hs_timing_cfg@GOTPAGE
Lloh1:
	ldr	x9, [x9, _hs_timing_cfg@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	ldr	x8, [x9, x8, lsl #3]
	add	x9, x8, w1, sxtw #4
	ldp	w20, w22, [x9]
	cmn	w2, #1
	b.ne	LBB0_2
; %bb.1:
	sxtw	x9, w1
	add	x8, x8, x9, lsl #4
	ldp	w9, w8, [x8, #8]
	add	w8, w8, w9
	cmp	w8, #0
	cinc	w8, w8, lt
	asr	w23, w8, #1
LBB0_2:
	mov	w24, #0
	cmp	w1, #128
	b.eq	LBB0_5
; %bb.3:
	mov	x21, x24
	cmp	w1, #129
	b.ne	LBB0_6
; %bb.4:
Lloh3:
	adrp	x8, _USE_DLY_MIN_SMPL@GOTPAGE
Lloh4:
	ldr	x8, [x8, _USE_DLY_MIN_SMPL@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	cmp	w23, w8
Lloh6:
	adrp	x8, _USE_DLY_MAX_SMPL@GOTPAGE
Lloh7:
	ldr	x8, [x8, _USE_DLY_MAX_SMPL@GOTPAGEOFF]
Lloh8:
	ldr	w8, [x8]
	ccmp	w23, w8, #0, ge
	cset	w24, le
LBB0_5:
	mov	x21, x24
Lloh9:
	adrp	x8, _ENABLE_SHIFT_MIN_SMPL@GOTPAGE
Lloh10:
	ldr	x8, [x8, _ENABLE_SHIFT_MIN_SMPL@GOTPAGEOFF]
Lloh11:
	ldr	w8, [x8]
	cmp	w23, w8
Lloh12:
	adrp	x8, _ENABLE_SHIFT_MAX_SMPL@GOTPAGE
Lloh13:
	ldr	x8, [x8, _ENABLE_SHIFT_MAX_SMPL@GOTPAGEOFF]
Lloh14:
	ldr	w8, [x8]
	ccmp	w23, w8, #0, ge
	cset	w24, le
LBB0_6:
Lloh15:
	adrp	x25, _GPIO@GOTPAGE
Lloh16:
	ldr	x25, [x25, _GPIO@GOTPAGEOFF]
	ldr	w1, [x25]
	mov	x0, x19
	mov	w2, #0
	bl	_mci_writel
	mov	w0, #5
	mov	w1, #10
	bl	_usleep_range
Lloh17:
	adrp	x8, _UHS_REG_EXT_SAMPLE_PHASE_MASK@GOTPAGE
Lloh18:
	ldr	x8, [x8, _UHS_REG_EXT_SAMPLE_PHASE_MASK@GOTPAGEOFF]
Lloh19:
	ldr	w0, [x8]
	mov	x1, x23
	bl	_FIELD_PREP
	mov	x23, x0
Lloh20:
	adrp	x8, _UHS_REG_EXT_SAMPLE_DLY_MASK@GOTPAGE
Lloh21:
	ldr	x8, [x8, _UHS_REG_EXT_SAMPLE_DLY_MASK@GOTPAGEOFF]
Lloh22:
	ldr	w0, [x8]
	mov	x1, x22
	bl	_FIELD_PREP
	orr	w22, w0, w23
Lloh23:
	adrp	x8, _UHS_REG_EXT_SAMPLE_DRVPHASE_MASK@GOTPAGE
Lloh24:
	ldr	x8, [x8, _UHS_REG_EXT_SAMPLE_DRVPHASE_MASK@GOTPAGEOFF]
Lloh25:
	ldr	w0, [x8]
	mov	x1, x20
	bl	_FIELD_PREP
	orr	w2, w22, w0
Lloh26:
	adrp	x8, _UHS_REG_EXT@GOTPAGE
Lloh27:
	ldr	x8, [x8, _UHS_REG_EXT@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_mci_writel
Lloh29:
	adrp	x8, _ENABLE_SHIFT@GOTPAGE
Lloh30:
	ldr	x8, [x8, _ENABLE_SHIFT@GOTPAGEOFF]
Lloh31:
	ldr	w1, [x8]
	mov	x0, x19
	mov	x2, x24
	bl	_mci_writel
Lloh32:
	adrp	x8, _GPIO_CLK_DIV_MASK@GOTPAGE
Lloh33:
	ldr	x8, [x8, _GPIO_CLK_DIV_MASK@GOTPAGEOFF]
Lloh34:
	ldr	w0, [x8]
Lloh35:
	adrp	x8, _GENCLK_DIV@GOTPAGE
Lloh36:
	ldr	x8, [x8, _GENCLK_DIV@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
	bl	_FIELD_PREP
	mov	x20, x0
Lloh38:
	adrp	x8, _GPIO_USE_SAMPLE_DLY_MASK@GOTPAGE
Lloh39:
	ldr	x8, [x8, _GPIO_USE_SAMPLE_DLY_MASK@GOTPAGEOFF]
Lloh40:
	ldr	w0, [x8]
	mov	x1, x21
	bl	_FIELD_PREP
	orr	w8, w0, w20
	ldr	w1, [x25]
Lloh41:
	adrp	x9, _GPIO_CLK_ENABLE@GOTPAGE
Lloh42:
	ldr	x9, [x9, _GPIO_CLK_ENABLE@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	bl	_mci_writel
	mov	w0, #1000
	mov	w1, #2000
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	b	_usleep_range
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGot	Lloh15, Lloh16
	.cfi_endproc
                                        ; -- End function
	.comm	_hs_timing_cfg,8,3              ; @hs_timing_cfg
	.comm	_USE_DLY_MIN_SMPL,4,2           ; @USE_DLY_MIN_SMPL
	.comm	_USE_DLY_MAX_SMPL,4,2           ; @USE_DLY_MAX_SMPL
	.comm	_ENABLE_SHIFT_MIN_SMPL,4,2      ; @ENABLE_SHIFT_MIN_SMPL
	.comm	_ENABLE_SHIFT_MAX_SMPL,4,2      ; @ENABLE_SHIFT_MAX_SMPL
	.comm	_GPIO,4,2                       ; @GPIO
	.comm	_UHS_REG_EXT_SAMPLE_PHASE_MASK,4,2 ; @UHS_REG_EXT_SAMPLE_PHASE_MASK
	.comm	_UHS_REG_EXT_SAMPLE_DLY_MASK,4,2 ; @UHS_REG_EXT_SAMPLE_DLY_MASK
	.comm	_UHS_REG_EXT_SAMPLE_DRVPHASE_MASK,4,2 ; @UHS_REG_EXT_SAMPLE_DRVPHASE_MASK
	.comm	_UHS_REG_EXT,4,2                ; @UHS_REG_EXT
	.comm	_ENABLE_SHIFT,4,2               ; @ENABLE_SHIFT
	.comm	_GPIO_CLK_DIV_MASK,4,2          ; @GPIO_CLK_DIV_MASK
	.comm	_GENCLK_DIV,4,2                 ; @GENCLK_DIV
	.comm	_GPIO_USE_SAMPLE_DLY_MASK,4,2   ; @GPIO_USE_SAMPLE_DLY_MASK
	.comm	_GPIO_CLK_ENABLE,4,2            ; @GPIO_CLK_ENABLE
	.no_dead_strip	_dw_mci_hs_set_timing
.subsections_via_symbols
