	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function cvm_mmc_set_ios
_cvm_mmc_set_ios:                       ## @cvm_mmc_set_ios
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r13
	movq	%rdi, %r12
	callq	_mmc_priv
	movq	%rax, %r14
	movq	16(%rax), %r15
	movq	%r15, %rdi
	callq	*32(%r15)
	movq	%r14, %rdi
	callq	_cvm_mmc_switch_to
	movl	(%r13), %eax
	cmpl	$128, %eax
	je	LBB0_6
## %bb.1:
	cmpl	$130, %eax
	jne	LBB0_11
## %bb.2:
	movq	%r14, %rdi
	callq	_cvm_mmc_reset_bus
	cmpl	$0, 24(%r15)
	je	LBB0_4
## %bb.3:
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	*16(%r15)
	jmp	LBB0_11
LBB0_6:
	cmpl	$0, 24(%r15)
	je	LBB0_8
## %bb.7:
	movq	%r15, %rdi
	movl	$1, %esi
	callq	*16(%r15)
	jmp	LBB0_11
LBB0_4:
	movl	(%r12), %edi
	callq	_IS_ERR
	testl	%eax, %eax
	jne	LBB0_11
## %bb.5:
	movl	(%r12), %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	jmp	LBB0_10
LBB0_8:
	movl	(%r12), %edi
	callq	_IS_ERR
	testl	%eax, %eax
	jne	LBB0_11
## %bb.9:
	movl	(%r12), %esi
	movl	20(%r13), %edx
	movq	%r12, %rdi
LBB0_10:
	callq	_mmc_regulator_set_ocr
LBB0_11:
	movl	4(%r13), %eax
	xorl	%ecx, %ecx
	cmpl	$132, %eax
	sete	%cl
	cmpl	$131, %eax
	movl	$2, %ebx
	cmovnel	%ecx, %ebx
	testl	%eax, %eax
	je	LBB0_13
## %bb.12:
	movq	8(%r13), %rax
	movq	_MMC_TIMING_MMC_DDR52@GOTPCREL(%rip), %rcx
	leal	4(%rbx), %edx
	cmpq	(%rcx), %rax
	cmovnel	%ebx, %edx
	movl	%edx, %ebx
LBB0_13:
	movl	16(%r13), %eax
	cmpl	$52000000, %eax                 ## imm = 0x3197500
	movl	$52000000, %ecx                 ## imm = 0x3197500
	cmovll	%eax, %ecx
	movl	%ecx, (%r14)
	testl	%ecx, %ecx
	movq	%r14, -56(%rbp)                 ## 8-byte Spill
	je	LBB0_14
## %bb.15:
	movl	(%r15), %eax
	addl	%ecx, %eax
	decl	%eax
	addl	%ecx, %ecx
	cltd
	idivl	%ecx
	movl	%eax, %r12d
	jmp	LBB0_16
LBB0_14:
	xorl	%r12d, %r12d
LBB0_16:
	movq	_MIO_EMM_SWITCH_HS_TIMING@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movq	8(%r13), %rax
	movq	_MMC_TIMING_MMC_HS@GOTPCREL(%rip), %rcx
	xorl	%esi, %esi
	cmpq	(%rcx), %rax
	sete	%sil
	callq	_FIELD_PREP
	movl	%eax, %r13d
	movq	_MIO_EMM_SWITCH_BUS_WIDTH@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_FIELD_PREP
	movl	%eax, %ebx
	movq	_MIO_EMM_SWITCH_POWER_CLASS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	$10, %esi
	callq	_FIELD_PREP
	movl	%eax, %r14d
	orl	%ebx, %r14d
	movq	_MIO_EMM_SWITCH_CLK_HI@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r12d, %esi
	callq	_FIELD_PREP
	movl	%eax, %ebx
	orl	%r14d, %ebx
	orl	%r13d, %ebx
	movq	_MIO_EMM_SWITCH_CLK_LO@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	movl	%r12d, %esi
	callq	_FIELD_PREP
	orl	%ebx, %eax
	movl	%eax, -44(%rbp)
	movq	-56(%rbp), %rbx                 ## 8-byte Reload
	movl	8(%rbx), %esi
	leaq	-44(%rbp), %rdi
	callq	_set_bus_id
	movl	-44(%rbp), %esi
	movq	%rbx, %rdi
	callq	_switch_val_changed
	testl	%eax, %eax
	je	LBB0_18
## %bb.17:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_set_wdog
	movl	-44(%rbp), %esi
	movq	%r15, %rdi
	callq	_do_switch
	movl	-44(%rbp), %eax
	movl	%eax, 4(%rbx)
LBB0_18:
	movq	%r15, %rdi
	callq	*8(%r15)
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MMC_TIMING_MMC_DDR52,8,3       ## @MMC_TIMING_MMC_DDR52
	.comm	_MIO_EMM_SWITCH_HS_TIMING,4,2   ## @MIO_EMM_SWITCH_HS_TIMING
	.comm	_MMC_TIMING_MMC_HS,8,3          ## @MMC_TIMING_MMC_HS
	.comm	_MIO_EMM_SWITCH_BUS_WIDTH,4,2   ## @MIO_EMM_SWITCH_BUS_WIDTH
	.comm	_MIO_EMM_SWITCH_POWER_CLASS,4,2 ## @MIO_EMM_SWITCH_POWER_CLASS
	.comm	_MIO_EMM_SWITCH_CLK_HI,4,2      ## @MIO_EMM_SWITCH_CLK_HI
	.comm	_MIO_EMM_SWITCH_CLK_LO,4,2      ## @MIO_EMM_SWITCH_CLK_LO
	.no_dead_strip	_cvm_mmc_set_ios
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function cvm_mmc_set_ios
_cvm_mmc_set_ios:                       ; @cvm_mmc_set_ios
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x21, x1
	mov	x22, x0
	bl	_mmc_priv
	mov	x20, x0
	ldr	x19, [x0, #16]
	ldr	x8, [x19, #32]
	mov	x0, x19
	blr	x8
	mov	x0, x20
	bl	_cvm_mmc_switch_to
	ldr	w8, [x21]
	cmp	w8, #128
	b.eq	LBB0_4
; %bb.1:
	cmp	w8, #130
	b.ne	LBB0_11
; %bb.2:
	mov	x0, x20
	bl	_cvm_mmc_reset_bus
	ldr	w8, [x19, #24]
	cbz	w8, LBB0_6
; %bb.3:
	ldr	x8, [x19, #16]
	mov	x0, x19
	mov	w1, #0
	blr	x8
	b	LBB0_11
LBB0_4:
	ldr	w8, [x19, #24]
	cbz	w8, LBB0_8
; %bb.5:
	ldr	x8, [x19, #16]
	mov	x0, x19
	mov	w1, #1
	blr	x8
	b	LBB0_11
LBB0_6:
	ldr	w0, [x22]
	bl	_IS_ERR
	cbnz	w0, LBB0_11
; %bb.7:
	ldr	w1, [x22]
	mov	x0, x22
	mov	w2, #0
	b	LBB0_10
LBB0_8:
	ldr	w0, [x22]
	bl	_IS_ERR
	cbnz	w0, LBB0_11
; %bb.9:
	ldr	w1, [x22]
	ldr	w2, [x21, #20]
	mov	x0, x22
LBB0_10:
	bl	_mmc_regulator_set_ocr
LBB0_11:
	ldr	w8, [x21, #4]
	cmp	w8, #132
	cset	w9, eq
	mov	w10, #2
	cmp	w8, #131
	csel	w22, w10, w9, eq
	cbz	w8, LBB0_13
; %bb.12:
	ldr	x8, [x21, #8]
Lloh0:
	adrp	x9, _MMC_TIMING_MMC_DDR52@GOTPAGE
Lloh1:
	ldr	x9, [x9, _MMC_TIMING_MMC_DDR52@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	orr	w10, w22, #0x4
	cmp	x8, x9
	csel	w22, w10, w22, eq
LBB0_13:
	ldr	w8, [x21, #16]
	mov	w9, #29952
	movk	w9, #793, lsl #16
	cmp	w8, w9
	csel	w8, w8, w9, lt
	str	w8, [x20]
	cbz	w8, LBB0_15
; %bb.14:
	ldr	w9, [x19]
	add	w9, w8, w9
	sub	w9, w9, #1
	lsl	w8, w8, #1
	sdiv	w23, w9, w8
	b	LBB0_16
LBB0_15:
	mov	w23, #0
LBB0_16:
Lloh3:
	adrp	x8, _MIO_EMM_SWITCH_HS_TIMING@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MIO_EMM_SWITCH_HS_TIMING@GOTPAGEOFF]
Lloh5:
	ldr	w0, [x8]
	ldr	x8, [x21, #8]
Lloh6:
	adrp	x9, _MMC_TIMING_MMC_HS@GOTPAGE
Lloh7:
	ldr	x9, [x9, _MMC_TIMING_MMC_HS@GOTPAGEOFF]
Lloh8:
	ldr	x9, [x9]
	cmp	x8, x9
	cset	w1, eq
	bl	_FIELD_PREP
	mov	x21, x0
Lloh9:
	adrp	x8, _MIO_EMM_SWITCH_BUS_WIDTH@GOTPAGE
Lloh10:
	ldr	x8, [x8, _MIO_EMM_SWITCH_BUS_WIDTH@GOTPAGEOFF]
Lloh11:
	ldr	w0, [x8]
	mov	x1, x22
	bl	_FIELD_PREP
	orr	w21, w0, w21
Lloh12:
	adrp	x8, _MIO_EMM_SWITCH_POWER_CLASS@GOTPAGE
Lloh13:
	ldr	x8, [x8, _MIO_EMM_SWITCH_POWER_CLASS@GOTPAGEOFF]
Lloh14:
	ldr	w0, [x8]
	mov	w1, #10
	bl	_FIELD_PREP
	orr	w21, w21, w0
Lloh15:
	adrp	x8, _MIO_EMM_SWITCH_CLK_HI@GOTPAGE
Lloh16:
	ldr	x8, [x8, _MIO_EMM_SWITCH_CLK_HI@GOTPAGEOFF]
Lloh17:
	ldr	w0, [x8]
	mov	x1, x23
	bl	_FIELD_PREP
	orr	w21, w21, w0
Lloh18:
	adrp	x8, _MIO_EMM_SWITCH_CLK_LO@GOTPAGE
Lloh19:
	ldr	x8, [x8, _MIO_EMM_SWITCH_CLK_LO@GOTPAGEOFF]
Lloh20:
	ldr	w0, [x8]
	mov	x1, x23
	bl	_FIELD_PREP
	orr	w8, w21, w0
	str	w8, [sp, #12]
	ldr	w1, [x20, #8]
	add	x0, sp, #12
	bl	_set_bus_id
	ldr	w1, [sp, #12]
	mov	x0, x20
	bl	_switch_val_changed
	cbz	w0, LBB0_18
; %bb.17:
	mov	x0, x20
	mov	w1, #0
	bl	_set_wdog
	ldr	w1, [sp, #12]
	mov	x0, x19
	bl	_do_switch
	ldr	w8, [sp, #12]
	str	w8, [x20, #4]
LBB0_18:
	ldr	x8, [x19, #8]
	mov	x0, x19
	blr	x8
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.cfi_endproc
                                        ; -- End function
	.comm	_MMC_TIMING_MMC_DDR52,8,3       ; @MMC_TIMING_MMC_DDR52
	.comm	_MIO_EMM_SWITCH_HS_TIMING,4,2   ; @MIO_EMM_SWITCH_HS_TIMING
	.comm	_MMC_TIMING_MMC_HS,8,3          ; @MMC_TIMING_MMC_HS
	.comm	_MIO_EMM_SWITCH_BUS_WIDTH,4,2   ; @MIO_EMM_SWITCH_BUS_WIDTH
	.comm	_MIO_EMM_SWITCH_POWER_CLASS,4,2 ; @MIO_EMM_SWITCH_POWER_CLASS
	.comm	_MIO_EMM_SWITCH_CLK_HI,4,2      ; @MIO_EMM_SWITCH_CLK_HI
	.comm	_MIO_EMM_SWITCH_CLK_LO,4,2      ; @MIO_EMM_SWITCH_CLK_LO
	.no_dead_strip	_cvm_mmc_set_ios
.subsections_via_symbols
