	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function meson_ao_cec_g12a_dualdiv_clk_enable
_meson_ao_cec_g12a_dualdiv_clk_enable:  ## @meson_ao_cec_g12a_dualdiv_clk_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	callq	_hw_to_meson_ao_cec_g12a_dualdiv_clk
	movq	%rax, %r12
	movl	(%rax), %edi
	movq	_CECB_CLK_CNTL_REG0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rax, %rbx
	movq	_CECB_CLK_CNTL_INPUT_EN@GOTPCREL(%rip), %rax
	movq	_CECB_CLK_CNTL_OUTPUT_EN@GOTPCREL(%rip), %rcx
	movl	(%rcx), %edx
	orl	(%rax), %edx
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	movl	(%r12), %r14d
	movl	(%rbx), %r15d
	movq	%rbx, %r13
	movq	_CECB_CLK_CNTL_N1@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	movl	$732, %esi                      ## imm = 0x2DC
	callq	_FIELD_PREP
	movl	%r14d, %edi
	movl	%r15d, %esi
	movl	%ebx, %edx
	movl	%eax, %ecx
	callq	_regmap_update_bits
	movl	(%r12), %r15d
	movl	(%r13), %r14d
	movq	_CECB_CLK_CNTL_N2@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	movl	$731, %esi                      ## imm = 0x2DB
	callq	_FIELD_PREP
	movl	%r15d, %edi
	movl	%r14d, %esi
	movl	%ebx, %edx
	movl	%eax, %ecx
	callq	_regmap_update_bits
	movl	(%r12), %r14d
	movq	_CECB_CLK_CNTL_REG1@GOTPCREL(%rip), %r13
	movl	(%r13), %r15d
	movq	_CECB_CLK_CNTL_M1@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	movl	$7, %esi
	callq	_FIELD_PREP
	movl	%r14d, %edi
	movl	%r15d, %esi
	movl	%ebx, %edx
	movl	%eax, %ecx
	callq	_regmap_update_bits
	movl	(%r12), %r15d
	movl	(%r13), %r14d
	movq	_CECB_CLK_CNTL_M2@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	movl	$10, %esi
	callq	_FIELD_PREP
	movl	%r15d, %edi
	movl	%r14d, %esi
	movl	%ebx, %edx
	movl	%eax, %ecx
	callq	_regmap_update_bits
	movl	(%r12), %edi
	movq	_CECB_CLK_CNTL_REG0@GOTPCREL(%rip), %rbx
	movl	(%rbx), %esi
	movq	_CECB_CLK_CNTL_DUAL_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ecx, %edx
	callq	_regmap_update_bits
	movl	(%r12), %edi
	movl	(%r13), %esi
	movq	_CECB_CLK_CNTL_BYPASS_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	xorl	%ecx, %ecx
	callq	_regmap_update_bits
	movl	(%r12), %edi
	movl	(%rbx), %esi
	movq	_CECB_CLK_CNTL_OUTPUT_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	_CECB_CLK_CNTL_INPUT_EN@GOTPCREL(%rip), %rax
	orl	(%rax), %ecx
	movl	%ecx, %edx
	callq	_regmap_update_bits
	xorl	%eax, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_CECB_CLK_CNTL_REG0,4,2         ## @CECB_CLK_CNTL_REG0
	.comm	_CECB_CLK_CNTL_INPUT_EN,4,2     ## @CECB_CLK_CNTL_INPUT_EN
	.comm	_CECB_CLK_CNTL_OUTPUT_EN,4,2    ## @CECB_CLK_CNTL_OUTPUT_EN
	.comm	_CECB_CLK_CNTL_N1,4,2           ## @CECB_CLK_CNTL_N1
	.comm	_CECB_CLK_CNTL_N2,4,2           ## @CECB_CLK_CNTL_N2
	.comm	_CECB_CLK_CNTL_REG1,4,2         ## @CECB_CLK_CNTL_REG1
	.comm	_CECB_CLK_CNTL_M1,4,2           ## @CECB_CLK_CNTL_M1
	.comm	_CECB_CLK_CNTL_M2,4,2           ## @CECB_CLK_CNTL_M2
	.comm	_CECB_CLK_CNTL_DUAL_EN,4,2      ## @CECB_CLK_CNTL_DUAL_EN
	.comm	_CECB_CLK_CNTL_BYPASS_EN,4,2    ## @CECB_CLK_CNTL_BYPASS_EN
	.no_dead_strip	_meson_ao_cec_g12a_dualdiv_clk_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function meson_ao_cec_g12a_dualdiv_clk_enable
_meson_ao_cec_g12a_dualdiv_clk_enable:  ; @meson_ao_cec_g12a_dualdiv_clk_enable
	.cfi_startproc
; %bb.0:
	stp	x26, x25, [sp, #-80]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	bl	_hw_to_meson_ao_cec_g12a_dualdiv_clk
	mov	x19, x0
	ldr	w0, [x0]
Lloh0:
	adrp	x23, _CECB_CLK_CNTL_REG0@GOTPAGE
Lloh1:
	ldr	x23, [x23, _CECB_CLK_CNTL_REG0@GOTPAGEOFF]
Lloh2:
	adrp	x24, _CECB_CLK_CNTL_INPUT_EN@GOTPAGE
Lloh3:
	ldr	x24, [x24, _CECB_CLK_CNTL_INPUT_EN@GOTPAGEOFF]
	ldr	w1, [x23]
	ldr	w8, [x24]
Lloh4:
	adrp	x25, _CECB_CLK_CNTL_OUTPUT_EN@GOTPAGE
Lloh5:
	ldr	x25, [x25, _CECB_CLK_CNTL_OUTPUT_EN@GOTPAGEOFF]
	ldr	w9, [x25]
	orr	w2, w9, w8
	mov	w3, #0
	bl	_regmap_update_bits
	ldr	w20, [x19]
	ldr	w21, [x23]
Lloh6:
	adrp	x8, _CECB_CLK_CNTL_N1@GOTPAGE
Lloh7:
	ldr	x8, [x8, _CECB_CLK_CNTL_N1@GOTPAGEOFF]
Lloh8:
	ldr	w22, [x8]
	mov	x0, x22
	mov	w1, #732
	bl	_FIELD_PREP
	mov	x3, x0
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	bl	_regmap_update_bits
	ldr	w20, [x19]
	ldr	w21, [x23]
Lloh9:
	adrp	x8, _CECB_CLK_CNTL_N2@GOTPAGE
Lloh10:
	ldr	x8, [x8, _CECB_CLK_CNTL_N2@GOTPAGEOFF]
Lloh11:
	ldr	w22, [x8]
	mov	x0, x22
	mov	w1, #731
	bl	_FIELD_PREP
	mov	x3, x0
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	bl	_regmap_update_bits
	ldr	w20, [x19]
Lloh12:
	adrp	x26, _CECB_CLK_CNTL_REG1@GOTPAGE
Lloh13:
	ldr	x26, [x26, _CECB_CLK_CNTL_REG1@GOTPAGEOFF]
	ldr	w21, [x26]
Lloh14:
	adrp	x8, _CECB_CLK_CNTL_M1@GOTPAGE
Lloh15:
	ldr	x8, [x8, _CECB_CLK_CNTL_M1@GOTPAGEOFF]
Lloh16:
	ldr	w22, [x8]
	mov	x0, x22
	mov	w1, #7
	bl	_FIELD_PREP
	mov	x3, x0
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	bl	_regmap_update_bits
	ldr	w20, [x19]
	ldr	w21, [x26]
Lloh17:
	adrp	x8, _CECB_CLK_CNTL_M2@GOTPAGE
Lloh18:
	ldr	x8, [x8, _CECB_CLK_CNTL_M2@GOTPAGEOFF]
Lloh19:
	ldr	w22, [x8]
	mov	x0, x22
	mov	w1, #10
	bl	_FIELD_PREP
	mov	x3, x0
	mov	x0, x20
	mov	x1, x21
	mov	x2, x22
	bl	_regmap_update_bits
	ldr	w0, [x19]
	ldr	w1, [x23]
Lloh20:
	adrp	x8, _CECB_CLK_CNTL_DUAL_EN@GOTPAGE
Lloh21:
	ldr	x8, [x8, _CECB_CLK_CNTL_DUAL_EN@GOTPAGEOFF]
Lloh22:
	ldr	w2, [x8]
	mov	x3, x2
	bl	_regmap_update_bits
	ldr	w0, [x19]
	ldr	w1, [x26]
Lloh23:
	adrp	x8, _CECB_CLK_CNTL_BYPASS_EN@GOTPAGE
Lloh24:
	ldr	x8, [x8, _CECB_CLK_CNTL_BYPASS_EN@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	w3, #0
	bl	_regmap_update_bits
	ldr	w0, [x19]
	ldr	w1, [x23]
	ldr	w8, [x24]
	ldr	w9, [x25]
	orr	w2, w9, w8
	mov	x3, x2
	bl	_regmap_update_bits
	mov	w0, #0
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp], #80             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGot	Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_CECB_CLK_CNTL_REG0,4,2         ; @CECB_CLK_CNTL_REG0
	.comm	_CECB_CLK_CNTL_INPUT_EN,4,2     ; @CECB_CLK_CNTL_INPUT_EN
	.comm	_CECB_CLK_CNTL_OUTPUT_EN,4,2    ; @CECB_CLK_CNTL_OUTPUT_EN
	.comm	_CECB_CLK_CNTL_N1,4,2           ; @CECB_CLK_CNTL_N1
	.comm	_CECB_CLK_CNTL_N2,4,2           ; @CECB_CLK_CNTL_N2
	.comm	_CECB_CLK_CNTL_REG1,4,2         ; @CECB_CLK_CNTL_REG1
	.comm	_CECB_CLK_CNTL_M1,4,2           ; @CECB_CLK_CNTL_M1
	.comm	_CECB_CLK_CNTL_M2,4,2           ; @CECB_CLK_CNTL_M2
	.comm	_CECB_CLK_CNTL_DUAL_EN,4,2      ; @CECB_CLK_CNTL_DUAL_EN
	.comm	_CECB_CLK_CNTL_BYPASS_EN,4,2    ; @CECB_CLK_CNTL_BYPASS_EN
	.no_dead_strip	_meson_ao_cec_g12a_dualdiv_clk_enable
.subsections_via_symbols
