	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tegra_nand_setup_timing
_tegra_nand_setup_timing:               ## @tegra_nand_setup_timing
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	movq	%rdi, -72(%rbp)                 ## 8-byte Spill
	movl	8(%rdi), %edi
	callq	_clk_get_rate
	cltq
	imulq	$1125899907, %rax, %rsi         ## imm = 0x431BDE83
	movq	%rsi, %rax
	shrq	$63, %rax
	sarq	$50, %rsi
	addl	%eax, %esi
	movl	$1000000, %edi                  ## imm = 0xF4240
                                        ## kill: def $esi killed $esi killed $rsi
	callq	_DIV_ROUND_UP
	movl	%eax, %r12d
	movl	56(%r15), %edi
	movl	48(%r15), %edx
	movl	52(%r15), %esi
	callq	_max3
	movl	%eax, %edi
	movl	%r12d, %esi
	callq	_DIV_ROUND_UP
	movl	%eax, %edi
	movl	$3, %esi
	callq	_OFFSET
	movl	%eax, %edi
	callq	_TIMING_TCR_TAR_TRR
	movl	%eax, -64(%rbp)                 ## 4-byte Spill
	movl	(%r15), %edi
	movl	4(%r15), %esi
	callq	_max
	movl	%eax, %r14d
	movl	8(%r15), %edi
	movl	12(%r15), %esi
	callq	_max
	movl	%r14d, %edi
	movl	%eax, %esi
	callq	_max
	movl	%eax, %edi
	movl	%r12d, %esi
	callq	_DIV_ROUND_UP
	movl	%eax, %edi
	movl	$2, %esi
	callq	_OFFSET
	movl	%eax, %edi
	callq	_TIMING_TCS
	movl	%eax, -60(%rbp)                 ## 4-byte Spill
	movl	16(%r15), %edi
	movl	20(%r15), %esi
	callq	_max
                                        ## kill: def $eax killed $eax def $rax
	leal	6000(%rax), %edi
	movl	%r12d, %esi
	callq	_DIV_ROUND_UP
	movl	%eax, %ebx
	movl	%eax, %edi
	movl	$1, %esi
	callq	_OFFSET
	movl	%eax, %edi
	callq	_TIMING_TRP
	movl	%eax, -56(%rbp)                 ## 4-byte Spill
	movl	%ebx, %edi
	movl	$1, %esi
	callq	_OFFSET
	movl	%eax, %edi
	callq	_TIMING_TRP_RESP
	movl	%eax, %r14d
	movl	24(%r15), %edi
	movl	%r12d, %ebx
	movl	%r12d, %esi
	callq	_DIV_ROUND_UP
	movl	%eax, %edi
	movl	$1, %esi
	callq	_OFFSET
	movl	%eax, %edi
	callq	_TIMING_TWB
	movl	%eax, -52(%rbp)                 ## 4-byte Spill
	movl	28(%r15), %edi
	movl	%r12d, %esi
	callq	_DIV_ROUND_UP
	movl	%eax, %edi
	movl	$1, %esi
	callq	_OFFSET
	movl	%eax, %edi
	callq	_TIMING_TWHR
	movl	%eax, %r12d
	movl	32(%r15), %edi
	movl	%ebx, %esi
	callq	_DIV_ROUND_UP
	movl	%eax, %edi
	movl	$1, %esi
	callq	_OFFSET
	movl	%eax, %edi
	callq	_TIMING_TWH
	movl	%eax, -48(%rbp)                 ## 4-byte Spill
	movl	36(%r15), %edi
	movl	%ebx, %esi
	movl	%ebx, -44(%rbp)                 ## 4-byte Spill
	callq	_DIV_ROUND_UP
	movl	%eax, %edi
	movl	$1, %esi
	callq	_OFFSET
	movl	%eax, %edi
	callq	_TIMING_TWP
	movl	%eax, %r13d
	movl	40(%r15), %edi
	movl	%ebx, %esi
	callq	_DIV_ROUND_UP
	movl	%eax, %edi
	movl	$1, %esi
	callq	_OFFSET
	movl	%eax, %edi
	callq	_TIMING_TRH
	movl	-60(%rbp), %ecx                 ## 4-byte Reload
	orl	-64(%rbp), %ecx                 ## 4-byte Folded Reload
	orl	-56(%rbp), %r14d                ## 4-byte Folded Reload
	orl	%ecx, %r14d
	orl	-52(%rbp), %r12d                ## 4-byte Folded Reload
	orl	-48(%rbp), %r12d                ## 4-byte Folded Reload
	orl	%r14d, %r12d
	orl	%eax, %r13d
	orl	%r12d, %r13d
	movq	_TIMING_1@GOTPCREL(%rip), %rax
	movq	(%rax), %rsi
	movq	-72(%rbp), %rbx                 ## 8-byte Reload
	addq	(%rbx), %rsi
	movl	%r13d, %edi
	callq	_writel_relaxed
	movl	44(%r15), %edi
	movl	-44(%rbp), %esi                 ## 4-byte Reload
	callq	_DIV_ROUND_UP
	movl	%eax, %edi
	movl	$3, %esi
	callq	_OFFSET
	movl	%eax, %edi
	callq	_TIMING_TADL
	movq	_TIMING_2@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rsi
	addq	(%rbx), %rsi
	movl	%eax, %edi
	addq	$40, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_writel_relaxed                 ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_TIMING_1,8,3                   ## @TIMING_1
	.comm	_TIMING_2,8,3                   ## @TIMING_2
	.no_dead_strip	_tegra_nand_setup_timing
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tegra_nand_setup_timing
_tegra_nand_setup_timing:               ; @tegra_nand_setup_timing
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x20, x1
	mov	x19, x0
	ldr	w0, [x0, #8]
	bl	_clk_get_rate
	mov	w8, #56963
	movk	w8, #17179, lsl #16
	smull	x8, w0, w8
	lsr	x9, x8, #32
	lsr	x8, x8, #63
	add	w1, w8, w9, asr #18
	mov	w0, #16960
	movk	w0, #15, lsl #16
	bl	_DIV_ROUND_UP
	mov	x21, x0
	ldp	w1, w0, [x20, #52]
	ldr	w2, [x20, #48]
	bl	_max3
	mov	x1, x21
	bl	_DIV_ROUND_UP
	mov	w1, #3
	bl	_OFFSET
	bl	_TIMING_TCR_TAR_TRR
	str	w0, [sp, #12]                   ; 4-byte Folded Spill
	ldp	w0, w1, [x20]
	bl	_max
	mov	x23, x0
	ldp	w0, w1, [x20, #8]
	bl	_max
	mov	x1, x0
	mov	x0, x23
	bl	_max
	mov	x1, x21
	bl	_DIV_ROUND_UP
	mov	w1, #2
	bl	_OFFSET
	bl	_TIMING_TCS
	mov	x23, x0
	ldp	w0, w1, [x20, #16]
	bl	_max
	mov	w8, #6000
	add	w0, w0, w8
	mov	x1, x21
	bl	_DIV_ROUND_UP
	mov	x25, x0
	mov	w1, #1
	bl	_OFFSET
	bl	_TIMING_TRP
	mov	x24, x0
	mov	x0, x25
	mov	w1, #1
	bl	_OFFSET
	bl	_TIMING_TRP_RESP
	mov	x25, x0
	ldr	w0, [x20, #24]
	mov	x1, x21
	bl	_DIV_ROUND_UP
	mov	w1, #1
	bl	_OFFSET
	bl	_TIMING_TWB
	mov	x26, x0
	ldr	w0, [x20, #28]
	mov	x1, x21
	bl	_DIV_ROUND_UP
	mov	w1, #1
	bl	_OFFSET
	bl	_TIMING_TWHR
	mov	x27, x0
	ldr	w0, [x20, #32]
	mov	x1, x21
	bl	_DIV_ROUND_UP
	mov	w1, #1
	bl	_OFFSET
	bl	_TIMING_TWH
	mov	x28, x0
	ldr	w0, [x20, #36]
	mov	x1, x21
	bl	_DIV_ROUND_UP
	mov	w1, #1
	bl	_OFFSET
	bl	_TIMING_TWP
	mov	x22, x0
	ldr	w0, [x20, #40]
	mov	x1, x21
	bl	_DIV_ROUND_UP
	mov	w1, #1
	bl	_OFFSET
	bl	_TIMING_TRH
	ldr	w8, [sp, #12]                   ; 4-byte Folded Reload
	orr	w8, w23, w8
	orr	w8, w8, w24
	orr	w8, w8, w25
	orr	w8, w8, w26
	orr	w8, w8, w27
	orr	w8, w8, w28
	orr	w8, w8, w22
	orr	w0, w8, w0
	ldr	x8, [x19]
Lloh0:
	adrp	x9, _TIMING_1@GOTPAGE
Lloh1:
	ldr	x9, [x9, _TIMING_1@GOTPAGEOFF]
Lloh2:
	ldr	x9, [x9]
	add	x1, x9, x8
	bl	_writel_relaxed
	ldr	w0, [x20, #44]
	mov	x1, x21
	bl	_DIV_ROUND_UP
	mov	w1, #3
	bl	_OFFSET
	bl	_TIMING_TADL
	ldr	x8, [x19]
Lloh3:
	adrp	x9, _TIMING_2@GOTPAGE
Lloh4:
	ldr	x9, [x9, _TIMING_2@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	add	x1, x9, x8
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	b	_writel_relaxed
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_TIMING_1,8,3                   ; @TIMING_1
	.comm	_TIMING_2,8,3                   ; @TIMING_2
	.no_dead_strip	_tegra_nand_setup_timing
.subsections_via_symbols
