	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function ipoctal_set_termios
_ipoctal_set_termios:                   ## @ipoctal_set_termios
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	movq	8(%rdi), %r14
	movl	(%rdi), %ebx
	movq	%r14, %rdi
	callq	_ipoctal_reset_channel
	movq	_CSIZE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movl	%ecx, %eax
	andl	%ebx, %eax
	cmpl	$132, %eax
	je	LBB0_3
## %bb.1:
	cmpl	$133, %eax
	jne	LBB0_4
## %bb.2:
	movq	_MR1_CHRL_6_BITS@GOTPCREL(%rip), %rax
	movb	(%rax), %r8b
	jmp	LBB0_5
LBB0_3:
	movq	_MR1_CHRL_7_BITS@GOTPCREL(%rip), %rax
	movb	(%rax), %r8b
	jmp	LBB0_5
LBB0_4:
	movq	_MR1_CHRL_8_BITS@GOTPCREL(%rip), %rax
	movb	(%rax), %r8b
	notl	%ecx
	andl	%ebx, %ecx
	orl	$131, %ecx
	movl	%ecx, (%r15)
LBB0_5:
	movq	_PARENB@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	je	LBB0_8
## %bb.6:
	movq	_PARODD@GOTPCREL(%rip), %rax
	movq	_MR1_PARITY_ON@GOTPCREL(%rip), %rcx
	movb	(%rcx), %r12b
	testl	%ebx, (%rax)
	je	LBB0_9
## %bb.7:
	movq	_MR1_PARITY_ODD@GOTPCREL(%rip), %rax
	jmp	LBB0_10
LBB0_8:
	movq	_MR1_PARITY_OFF@GOTPCREL(%rip), %rax
	movb	(%rax), %r12b
	jmp	LBB0_11
LBB0_9:
	movq	_MR1_PARITY_EVEN@GOTPCREL(%rip), %rax
LBB0_10:
	orb	(%rax), %r12b
LBB0_11:
	movq	_CMSPAR@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	notl	%eax
	andl	%eax, (%r15)
	movq	_CSTOPB@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	jne	LBB0_13
## %bb.12:
	movq	_MR2_STOP_BITS_LENGTH_1@GOTPCREL(%rip), %rax
	jmp	LBB0_14
LBB0_13:
	movq	_MR2_STOP_BITS_LENGTH_2@GOTPCREL(%rip), %rax
LBB0_14:
	movb	(%rax), %cl
	movl	(%r14), %eax
	movq	_MR1_RxRTS_CONTROL_OFF@GOTPCREL(%rip), %rdx
	movq	_MR2_CTS_ENABLE_TX_OFF@GOTPCREL(%rip), %rdi
	cmpl	$128, %eax
	je	LBB0_18
## %bb.15:
	movq	_MR2_TxRTS_CONTROL_OFF@GOTPCREL(%rip), %rsi
	cmpl	$129, %eax
	je	LBB0_19
## %bb.16:
	cmpl	$130, %eax
	jne	LBB0_49
## %bb.17:
	movq	_CRTSCTS@GOTPCREL(%rip), %rax
	testl	%ebx, (%rax)
	movq	_MR2_CTS_ENABLE_TX_ON@GOTPCREL(%rip), %rdi
	cmoveq	_MR2_CTS_ENABLE_TX_OFF@GOTPCREL(%rip), %rdi
	movq	_MR1_RxRTS_CONTROL_ON@GOTPCREL(%rip), %rdx
	cmoveq	_MR1_RxRTS_CONTROL_OFF@GOTPCREL(%rip), %rdx
	jmp	LBB0_19
LBB0_18:
	movq	_MR2_TxRTS_CONTROL_ON@GOTPCREL(%rip), %rsi
LBB0_19:
	movb	(%rdi), %r13b
	orb	(%rsi), %r13b
	orb	%r8b, %r12b
	orb	%cl, %r13b
	orb	(%rdx), %r12b
	movq	%r15, %rdi
	callq	_tty_get_baud_rate
	movl	%eax, %ebx
	movq	%r15, %rdi
	movl	%eax, %esi
	movl	%eax, %edx
	callq	_tty_termios_encode_baud_rate
	cmpl	$1799, %ebx                     ## imm = 0x707
	jg	LBB0_25
## %bb.20:
	cmpl	$299, %ebx                      ## imm = 0x12B
	jg	LBB0_30
## %bb.21:
	cmpl	$75, %ebx
	je	LBB0_38
## %bb.22:
	cmpl	$110, %ebx
	je	LBB0_39
## %bb.23:
	cmpl	$150, %ebx
	jne	LBB0_50
## %bb.24:
	movq	_TX_CLK_150@GOTPCREL(%rip), %rax
	movq	_RX_CLK_150@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_25:
	cmpl	$4799, %ebx                     ## imm = 0x12BF
	jg	LBB0_34
## %bb.26:
	cmpl	$1800, %ebx                     ## imm = 0x708
	je	LBB0_40
## %bb.27:
	cmpl	$2000, %ebx                     ## imm = 0x7D0
	je	LBB0_41
## %bb.28:
	cmpl	$2400, %ebx                     ## imm = 0x960
	jne	LBB0_50
## %bb.29:
	movq	_TX_CLK_2400@GOTPCREL(%rip), %rax
	movq	_RX_CLK_2400@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_30:
	cmpl	$300, %ebx                      ## imm = 0x12C
	je	LBB0_42
## %bb.31:
	cmpl	$600, %ebx                      ## imm = 0x258
	je	LBB0_43
## %bb.32:
	cmpl	$1200, %ebx                     ## imm = 0x4B0
	jne	LBB0_50
## %bb.33:
	movq	_TX_CLK_1200@GOTPCREL(%rip), %rax
	movq	_RX_CLK_1200@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_34:
	cmpl	$4800, %ebx                     ## imm = 0x12C0
	je	LBB0_44
## %bb.35:
	cmpl	$9600, %ebx                     ## imm = 0x2580
	je	LBB0_45
## %bb.36:
	cmpl	$19200, %ebx                    ## imm = 0x4B00
	jne	LBB0_50
## %bb.37:
	movq	_TX_CLK_19200@GOTPCREL(%rip), %rax
	movq	_RX_CLK_19200@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_38:
	movq	_TX_CLK_75@GOTPCREL(%rip), %rax
	movq	_RX_CLK_75@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_39:
	movq	_TX_CLK_110@GOTPCREL(%rip), %rax
	movq	_RX_CLK_110@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_40:
	movq	_TX_CLK_1800@GOTPCREL(%rip), %rax
	movq	_RX_CLK_1800@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_41:
	movq	_TX_CLK_2000@GOTPCREL(%rip), %rax
	movq	_RX_CLK_2000@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_42:
	movq	_TX_CLK_300@GOTPCREL(%rip), %rax
	movq	_RX_CLK_300@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_43:
	movq	_TX_CLK_600@GOTPCREL(%rip), %rax
	movq	_RX_CLK_600@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_44:
	movq	_TX_CLK_4800@GOTPCREL(%rip), %rax
	movq	_RX_CLK_4800@GOTPCREL(%rip), %rcx
	jmp	LBB0_46
LBB0_45:
	movq	_TX_CLK_9600@GOTPCREL(%rip), %rax
	movq	_RX_CLK_9600@GOTPCREL(%rip), %rcx
LBB0_46:
	movb	(%rcx), %bl
	orb	(%rax), %bl
LBB0_47:
	movq	_MR1_ERROR_CHAR@GOTPCREL(%rip), %rax
	orb	(%rax), %r12b
	movq	_MR1_RxINT_RxRDY@GOTPCREL(%rip), %rax
	orb	(%rax), %r12b
	movq	8(%r14), %rsi
	addq	$8, %rsi
	movzbl	%r12b, %edi
	callq	_iowrite8
	movq	8(%r14), %rsi
	addq	$8, %rsi
	movzbl	%r13b, %edi
	callq	_iowrite8
	movq	8(%r14), %rsi
	addq	$4, %rsi
	movzbl	%bl, %edi
	callq	_iowrite8
	cmpq	$0, 16(%r14)
	je	LBB0_49
## %bb.48:
	movq	_CR_ENABLE_RX@GOTPCREL(%rip), %rax
	movzbl	(%rax), %edi
	movq	8(%r14), %rsi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_iowrite8                       ## TAILCALL
LBB0_49:
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
LBB0_50:
	movq	_TX_CLK_38400@GOTPCREL(%rip), %rax
	movq	_RX_CLK_38400@GOTPCREL(%rip), %rcx
	movb	(%rcx), %bl
	orb	(%rax), %bl
	movq	%r15, %rdi
	movl	$38400, %esi                    ## imm = 0x9600
	movl	$38400, %edx                    ## imm = 0x9600
	callq	_tty_termios_encode_baud_rate
	jmp	LBB0_47
	.cfi_endproc
                                        ## -- End function
	.comm	_CSIZE,4,2                      ## @CSIZE
	.comm	_MR1_CHRL_6_BITS,1,0            ## @MR1_CHRL_6_BITS
	.comm	_MR1_CHRL_7_BITS,1,0            ## @MR1_CHRL_7_BITS
	.comm	_MR1_CHRL_8_BITS,1,0            ## @MR1_CHRL_8_BITS
	.comm	_PARENB,4,2                     ## @PARENB
	.comm	_PARODD,4,2                     ## @PARODD
	.comm	_MR1_PARITY_ON,1,0              ## @MR1_PARITY_ON
	.comm	_MR1_PARITY_ODD,1,0             ## @MR1_PARITY_ODD
	.comm	_MR1_PARITY_EVEN,1,0            ## @MR1_PARITY_EVEN
	.comm	_MR1_PARITY_OFF,1,0             ## @MR1_PARITY_OFF
	.comm	_CMSPAR,4,2                     ## @CMSPAR
	.comm	_CSTOPB,4,2                     ## @CSTOPB
	.comm	_MR2_STOP_BITS_LENGTH_2,1,0     ## @MR2_STOP_BITS_LENGTH_2
	.comm	_MR2_STOP_BITS_LENGTH_1,1,0     ## @MR2_STOP_BITS_LENGTH_1
	.comm	_CRTSCTS,4,2                    ## @CRTSCTS
	.comm	_MR1_RxRTS_CONTROL_ON,1,0       ## @MR1_RxRTS_CONTROL_ON
	.comm	_MR2_TxRTS_CONTROL_OFF,1,0      ## @MR2_TxRTS_CONTROL_OFF
	.comm	_MR2_CTS_ENABLE_TX_ON,1,0       ## @MR2_CTS_ENABLE_TX_ON
	.comm	_MR1_RxRTS_CONTROL_OFF,1,0      ## @MR1_RxRTS_CONTROL_OFF
	.comm	_MR2_CTS_ENABLE_TX_OFF,1,0      ## @MR2_CTS_ENABLE_TX_OFF
	.comm	_MR2_TxRTS_CONTROL_ON,1,0       ## @MR2_TxRTS_CONTROL_ON
	.comm	_TX_CLK_75,1,0                  ## @TX_CLK_75
	.comm	_RX_CLK_75,1,0                  ## @RX_CLK_75
	.comm	_TX_CLK_110,1,0                 ## @TX_CLK_110
	.comm	_RX_CLK_110,1,0                 ## @RX_CLK_110
	.comm	_TX_CLK_150,1,0                 ## @TX_CLK_150
	.comm	_RX_CLK_150,1,0                 ## @RX_CLK_150
	.comm	_TX_CLK_300,1,0                 ## @TX_CLK_300
	.comm	_RX_CLK_300,1,0                 ## @RX_CLK_300
	.comm	_TX_CLK_600,1,0                 ## @TX_CLK_600
	.comm	_RX_CLK_600,1,0                 ## @RX_CLK_600
	.comm	_TX_CLK_1200,1,0                ## @TX_CLK_1200
	.comm	_RX_CLK_1200,1,0                ## @RX_CLK_1200
	.comm	_TX_CLK_1800,1,0                ## @TX_CLK_1800
	.comm	_RX_CLK_1800,1,0                ## @RX_CLK_1800
	.comm	_TX_CLK_2000,1,0                ## @TX_CLK_2000
	.comm	_RX_CLK_2000,1,0                ## @RX_CLK_2000
	.comm	_TX_CLK_2400,1,0                ## @TX_CLK_2400
	.comm	_RX_CLK_2400,1,0                ## @RX_CLK_2400
	.comm	_TX_CLK_4800,1,0                ## @TX_CLK_4800
	.comm	_RX_CLK_4800,1,0                ## @RX_CLK_4800
	.comm	_TX_CLK_9600,1,0                ## @TX_CLK_9600
	.comm	_RX_CLK_9600,1,0                ## @RX_CLK_9600
	.comm	_TX_CLK_19200,1,0               ## @TX_CLK_19200
	.comm	_RX_CLK_19200,1,0               ## @RX_CLK_19200
	.comm	_TX_CLK_38400,1,0               ## @TX_CLK_38400
	.comm	_RX_CLK_38400,1,0               ## @RX_CLK_38400
	.comm	_MR1_ERROR_CHAR,1,0             ## @MR1_ERROR_CHAR
	.comm	_MR1_RxINT_RxRDY,1,0            ## @MR1_RxINT_RxRDY
	.comm	_CR_ENABLE_RX,1,0               ## @CR_ENABLE_RX
	.no_dead_strip	_ipoctal_set_termios
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function ipoctal_set_termios
_ipoctal_set_termios:                   ; @ipoctal_set_termios
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x20, x0
	ldr	x19, [x0, #8]
	ldr	w21, [x0]
	mov	x0, x19
	bl	_ipoctal_reset_channel
Lloh0:
	adrp	x8, _CSIZE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _CSIZE@GOTPAGEOFF]
Lloh2:
	ldr	w9, [x8]
	and	w8, w9, w21
	cmp	w8, #132
	b.eq	LBB0_3
; %bb.1:
	cmp	w8, #133
	b.ne	LBB0_4
; %bb.2:
Lloh3:
	adrp	x8, _MR1_CHRL_6_BITS@GOTPAGE
Lloh4:
	ldr	x8, [x8, _MR1_CHRL_6_BITS@GOTPAGEOFF]
	ldrb	w8, [x8]
	b	LBB0_5
LBB0_3:
Lloh5:
	adrp	x8, _MR1_CHRL_7_BITS@GOTPAGE
Lloh6:
	ldr	x8, [x8, _MR1_CHRL_7_BITS@GOTPAGEOFF]
	ldrb	w8, [x8]
	b	LBB0_5
LBB0_4:
Lloh7:
	adrp	x8, _MR1_CHRL_8_BITS@GOTPAGE
Lloh8:
	ldr	x8, [x8, _MR1_CHRL_8_BITS@GOTPAGEOFF]
	ldrb	w8, [x8]
	bic	w9, w21, w9
	mov	w10, #131
	orr	w9, w9, w10
	str	w9, [x20]
LBB0_5:
Lloh9:
	adrp	x9, _PARENB@GOTPAGE
Lloh10:
	ldr	x9, [x9, _PARENB@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	tst	w9, w21
	b.eq	LBB0_8
; %bb.6:
Lloh12:
	adrp	x9, _PARODD@GOTPAGE
Lloh13:
	ldr	x9, [x9, _PARODD@GOTPAGEOFF]
Lloh14:
	ldr	w10, [x9]
Lloh15:
	adrp	x9, _MR1_PARITY_ON@GOTPAGE
Lloh16:
	ldr	x9, [x9, _MR1_PARITY_ON@GOTPAGEOFF]
	ldrb	w9, [x9]
	tst	w10, w21
	b.eq	LBB0_9
; %bb.7:
Lloh17:
	adrp	x10, _MR1_PARITY_ODD@GOTPAGE
Lloh18:
	ldr	x10, [x10, _MR1_PARITY_ODD@GOTPAGEOFF]
	b	LBB0_10
LBB0_8:
Lloh19:
	adrp	x9, _MR1_PARITY_OFF@GOTPAGE
Lloh20:
	ldr	x9, [x9, _MR1_PARITY_OFF@GOTPAGEOFF]
	ldrb	w9, [x9]
	b	LBB0_11
LBB0_9:
Lloh21:
	adrp	x10, _MR1_PARITY_EVEN@GOTPAGE
Lloh22:
	ldr	x10, [x10, _MR1_PARITY_EVEN@GOTPAGEOFF]
LBB0_10:
	ldrb	w10, [x10]
	orr	w9, w10, w9
LBB0_11:
Lloh23:
	adrp	x10, _CMSPAR@GOTPAGE
Lloh24:
	ldr	x10, [x10, _CMSPAR@GOTPAGEOFF]
Lloh25:
	ldr	w10, [x10]
	ldr	w11, [x20]
	bic	w10, w11, w10
	str	w10, [x20]
Lloh26:
	adrp	x10, _CSTOPB@GOTPAGE
Lloh27:
	ldr	x10, [x10, _CSTOPB@GOTPAGEOFF]
Lloh28:
	adrp	x11, _MR2_STOP_BITS_LENGTH_1@GOTPAGE
Lloh29:
	ldr	x11, [x11, _MR2_STOP_BITS_LENGTH_1@GOTPAGEOFF]
Lloh30:
	adrp	x12, _MR2_STOP_BITS_LENGTH_2@GOTPAGE
Lloh31:
	ldr	x12, [x12, _MR2_STOP_BITS_LENGTH_2@GOTPAGEOFF]
Lloh32:
	ldr	w10, [x10]
	tst	w10, w21
	csel	x10, x11, x12, eq
	ldrb	w10, [x10]
	ldr	w13, [x19]
Lloh33:
	adrp	x11, _MR1_RxRTS_CONTROL_OFF@GOTPAGE
Lloh34:
	ldr	x11, [x11, _MR1_RxRTS_CONTROL_OFF@GOTPAGEOFF]
	cmp	w13, #128
	b.eq	LBB0_16
; %bb.12:
Lloh35:
	adrp	x12, _MR2_CTS_ENABLE_TX_OFF@GOTPAGE
Lloh36:
	ldr	x12, [x12, _MR2_CTS_ENABLE_TX_OFF@GOTPAGEOFF]
	cmp	w13, #129
	b.eq	LBB0_15
; %bb.13:
	cmp	w13, #130
	b.ne	LBB0_47
; %bb.14:
Lloh37:
	adrp	x13, _CRTSCTS@GOTPAGE
Lloh38:
	ldr	x13, [x13, _CRTSCTS@GOTPAGEOFF]
Lloh39:
	ldr	w13, [x13]
Lloh40:
	adrp	x14, _MR2_CTS_ENABLE_TX_ON@GOTPAGE
Lloh41:
	ldr	x14, [x14, _MR2_CTS_ENABLE_TX_ON@GOTPAGEOFF]
	tst	w13, w21
	csel	x12, x12, x14, eq
Lloh42:
	adrp	x13, _MR1_RxRTS_CONTROL_ON@GOTPAGE
Lloh43:
	ldr	x13, [x13, _MR1_RxRTS_CONTROL_ON@GOTPAGEOFF]
	csel	x11, x11, x13, eq
LBB0_15:
Lloh44:
	adrp	x13, _MR2_TxRTS_CONTROL_OFF@GOTPAGE
Lloh45:
	ldr	x13, [x13, _MR2_TxRTS_CONTROL_OFF@GOTPAGEOFF]
	b	LBB0_17
LBB0_16:
Lloh46:
	adrp	x13, _MR2_TxRTS_CONTROL_ON@GOTPAGE
Lloh47:
	ldr	x13, [x13, _MR2_TxRTS_CONTROL_ON@GOTPAGEOFF]
Lloh48:
	adrp	x12, _MR2_CTS_ENABLE_TX_OFF@GOTPAGE
Lloh49:
	ldr	x12, [x12, _MR2_CTS_ENABLE_TX_OFF@GOTPAGEOFF]
LBB0_17:
	orr	w8, w9, w8
	ldrb	w9, [x13]
	ldrb	w12, [x12]
	orr	w9, w12, w9
	orr	w22, w9, w10
	ldrb	w9, [x11]
	orr	w23, w8, w9
	mov	x0, x20
	bl	_tty_get_baud_rate
	mov	x21, x0
	mov	x0, x20
	mov	x1, x21
	mov	x2, x21
	bl	_tty_termios_encode_baud_rate
	cmp	w21, #1799
	b.gt	LBB0_23
; %bb.18:
	cmp	w21, #299
	b.gt	LBB0_28
; %bb.19:
	cmp	w21, #75
	b.eq	LBB0_36
; %bb.20:
	cmp	w21, #110
	b.eq	LBB0_37
; %bb.21:
	cmp	w21, #150
	b.ne	LBB0_48
; %bb.22:
Lloh50:
	adrp	x8, _TX_CLK_150@GOTPAGE
Lloh51:
	ldr	x8, [x8, _TX_CLK_150@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh52:
	adrp	x9, _RX_CLK_150@GOTPAGE
Lloh53:
	ldr	x9, [x9, _RX_CLK_150@GOTPAGEOFF]
	b	LBB0_44
LBB0_23:
	mov	w8, #4799
	cmp	w21, w8
	b.gt	LBB0_32
; %bb.24:
	cmp	w21, #1800
	b.eq	LBB0_38
; %bb.25:
	cmp	w21, #2000
	b.eq	LBB0_39
; %bb.26:
	cmp	w21, #2400
	b.ne	LBB0_48
; %bb.27:
Lloh54:
	adrp	x8, _TX_CLK_2400@GOTPAGE
Lloh55:
	ldr	x8, [x8, _TX_CLK_2400@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh56:
	adrp	x9, _RX_CLK_2400@GOTPAGE
Lloh57:
	ldr	x9, [x9, _RX_CLK_2400@GOTPAGEOFF]
	b	LBB0_44
LBB0_28:
	cmp	w21, #300
	b.eq	LBB0_40
; %bb.29:
	cmp	w21, #600
	b.eq	LBB0_41
; %bb.30:
	cmp	w21, #1200
	b.ne	LBB0_48
; %bb.31:
Lloh58:
	adrp	x8, _TX_CLK_1200@GOTPAGE
Lloh59:
	ldr	x8, [x8, _TX_CLK_1200@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh60:
	adrp	x9, _RX_CLK_1200@GOTPAGE
Lloh61:
	ldr	x9, [x9, _RX_CLK_1200@GOTPAGEOFF]
	b	LBB0_44
LBB0_32:
	mov	w8, #4800
	cmp	w21, w8
	b.eq	LBB0_42
; %bb.33:
	mov	w8, #9600
	cmp	w21, w8
	b.eq	LBB0_43
; %bb.34:
	mov	w8, #19200
	cmp	w21, w8
	b.ne	LBB0_48
; %bb.35:
Lloh62:
	adrp	x8, _TX_CLK_19200@GOTPAGE
Lloh63:
	ldr	x8, [x8, _TX_CLK_19200@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh64:
	adrp	x9, _RX_CLK_19200@GOTPAGE
Lloh65:
	ldr	x9, [x9, _RX_CLK_19200@GOTPAGEOFF]
	b	LBB0_44
LBB0_36:
Lloh66:
	adrp	x8, _TX_CLK_75@GOTPAGE
Lloh67:
	ldr	x8, [x8, _TX_CLK_75@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh68:
	adrp	x9, _RX_CLK_75@GOTPAGE
Lloh69:
	ldr	x9, [x9, _RX_CLK_75@GOTPAGEOFF]
	b	LBB0_44
LBB0_37:
Lloh70:
	adrp	x8, _TX_CLK_110@GOTPAGE
Lloh71:
	ldr	x8, [x8, _TX_CLK_110@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh72:
	adrp	x9, _RX_CLK_110@GOTPAGE
Lloh73:
	ldr	x9, [x9, _RX_CLK_110@GOTPAGEOFF]
	b	LBB0_44
LBB0_38:
Lloh74:
	adrp	x8, _TX_CLK_1800@GOTPAGE
Lloh75:
	ldr	x8, [x8, _TX_CLK_1800@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh76:
	adrp	x9, _RX_CLK_1800@GOTPAGE
Lloh77:
	ldr	x9, [x9, _RX_CLK_1800@GOTPAGEOFF]
	b	LBB0_44
LBB0_39:
Lloh78:
	adrp	x8, _TX_CLK_2000@GOTPAGE
Lloh79:
	ldr	x8, [x8, _TX_CLK_2000@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh80:
	adrp	x9, _RX_CLK_2000@GOTPAGE
Lloh81:
	ldr	x9, [x9, _RX_CLK_2000@GOTPAGEOFF]
	b	LBB0_44
LBB0_40:
Lloh82:
	adrp	x8, _TX_CLK_300@GOTPAGE
Lloh83:
	ldr	x8, [x8, _TX_CLK_300@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh84:
	adrp	x9, _RX_CLK_300@GOTPAGE
Lloh85:
	ldr	x9, [x9, _RX_CLK_300@GOTPAGEOFF]
	b	LBB0_44
LBB0_41:
Lloh86:
	adrp	x8, _TX_CLK_600@GOTPAGE
Lloh87:
	ldr	x8, [x8, _TX_CLK_600@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh88:
	adrp	x9, _RX_CLK_600@GOTPAGE
Lloh89:
	ldr	x9, [x9, _RX_CLK_600@GOTPAGEOFF]
	b	LBB0_44
LBB0_42:
Lloh90:
	adrp	x8, _TX_CLK_4800@GOTPAGE
Lloh91:
	ldr	x8, [x8, _TX_CLK_4800@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh92:
	adrp	x9, _RX_CLK_4800@GOTPAGE
Lloh93:
	ldr	x9, [x9, _RX_CLK_4800@GOTPAGEOFF]
	b	LBB0_44
LBB0_43:
Lloh94:
	adrp	x8, _TX_CLK_9600@GOTPAGE
Lloh95:
	ldr	x8, [x8, _TX_CLK_9600@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh96:
	adrp	x9, _RX_CLK_9600@GOTPAGE
Lloh97:
	ldr	x9, [x9, _RX_CLK_9600@GOTPAGEOFF]
LBB0_44:
	ldrb	w9, [x9]
	orr	w21, w9, w8
LBB0_45:
Lloh98:
	adrp	x8, _MR1_ERROR_CHAR@GOTPAGE
Lloh99:
	ldr	x8, [x8, _MR1_ERROR_CHAR@GOTPAGEOFF]
	ldrb	w8, [x8]
	and	w9, w23, #0xff
	orr	w8, w9, w8
Lloh100:
	adrp	x9, _MR1_RxINT_RxRDY@GOTPAGE
Lloh101:
	ldr	x9, [x9, _MR1_RxINT_RxRDY@GOTPAGEOFF]
	ldrb	w9, [x9]
	orr	w0, w8, w9
	ldr	x8, [x19, #8]
	add	x1, x8, #8
	bl	_iowrite8
	ldr	x8, [x19, #8]
	add	x1, x8, #8
	and	w0, w22, #0xff
	bl	_iowrite8
	ldr	x8, [x19, #8]
	add	x1, x8, #4
	and	w0, w21, #0xff
	bl	_iowrite8
	ldr	x8, [x19, #16]
	cbz	x8, LBB0_47
; %bb.46:
Lloh102:
	adrp	x8, _CR_ENABLE_RX@GOTPAGE
Lloh103:
	ldr	x8, [x8, _CR_ENABLE_RX@GOTPAGEOFF]
	ldrb	w0, [x8]
	ldr	x1, [x19, #8]
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_iowrite8
LBB0_47:
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	ret
LBB0_48:
Lloh104:
	adrp	x8, _TX_CLK_38400@GOTPAGE
Lloh105:
	ldr	x8, [x8, _TX_CLK_38400@GOTPAGEOFF]
	ldrb	w8, [x8]
Lloh106:
	adrp	x9, _RX_CLK_38400@GOTPAGE
Lloh107:
	ldr	x9, [x9, _RX_CLK_38400@GOTPAGEOFF]
	ldrb	w9, [x9]
	orr	w21, w9, w8
	mov	x0, x20
	mov	w1, #38400
	mov	w2, #38400
	bl	_tty_termios_encode_baud_rate
	b	LBB0_45
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGot	Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGot	Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGot	Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh32
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGot	Lloh35, Lloh36
	.loh AdrpLdrGot	Lloh42, Lloh43
	.loh AdrpLdrGot	Lloh40, Lloh41
	.loh AdrpLdrGotLdr	Lloh37, Lloh38, Lloh39
	.loh AdrpLdrGot	Lloh44, Lloh45
	.loh AdrpLdrGot	Lloh48, Lloh49
	.loh AdrpLdrGot	Lloh46, Lloh47
	.loh AdrpLdrGot	Lloh52, Lloh53
	.loh AdrpLdrGot	Lloh50, Lloh51
	.loh AdrpLdrGot	Lloh56, Lloh57
	.loh AdrpLdrGot	Lloh54, Lloh55
	.loh AdrpLdrGot	Lloh60, Lloh61
	.loh AdrpLdrGot	Lloh58, Lloh59
	.loh AdrpLdrGot	Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh62, Lloh63
	.loh AdrpLdrGot	Lloh68, Lloh69
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGot	Lloh72, Lloh73
	.loh AdrpLdrGot	Lloh70, Lloh71
	.loh AdrpLdrGot	Lloh76, Lloh77
	.loh AdrpLdrGot	Lloh74, Lloh75
	.loh AdrpLdrGot	Lloh80, Lloh81
	.loh AdrpLdrGot	Lloh78, Lloh79
	.loh AdrpLdrGot	Lloh84, Lloh85
	.loh AdrpLdrGot	Lloh82, Lloh83
	.loh AdrpLdrGot	Lloh88, Lloh89
	.loh AdrpLdrGot	Lloh86, Lloh87
	.loh AdrpLdrGot	Lloh92, Lloh93
	.loh AdrpLdrGot	Lloh90, Lloh91
	.loh AdrpLdrGot	Lloh96, Lloh97
	.loh AdrpLdrGot	Lloh94, Lloh95
	.loh AdrpLdrGot	Lloh100, Lloh101
	.loh AdrpLdrGot	Lloh98, Lloh99
	.loh AdrpLdrGot	Lloh102, Lloh103
	.loh AdrpLdrGot	Lloh106, Lloh107
	.loh AdrpLdrGot	Lloh104, Lloh105
	.cfi_endproc
                                        ; -- End function
	.comm	_CSIZE,4,2                      ; @CSIZE
	.comm	_MR1_CHRL_6_BITS,1,0            ; @MR1_CHRL_6_BITS
	.comm	_MR1_CHRL_7_BITS,1,0            ; @MR1_CHRL_7_BITS
	.comm	_MR1_CHRL_8_BITS,1,0            ; @MR1_CHRL_8_BITS
	.comm	_PARENB,4,2                     ; @PARENB
	.comm	_PARODD,4,2                     ; @PARODD
	.comm	_MR1_PARITY_ON,1,0              ; @MR1_PARITY_ON
	.comm	_MR1_PARITY_ODD,1,0             ; @MR1_PARITY_ODD
	.comm	_MR1_PARITY_EVEN,1,0            ; @MR1_PARITY_EVEN
	.comm	_MR1_PARITY_OFF,1,0             ; @MR1_PARITY_OFF
	.comm	_CMSPAR,4,2                     ; @CMSPAR
	.comm	_CSTOPB,4,2                     ; @CSTOPB
	.comm	_MR2_STOP_BITS_LENGTH_2,1,0     ; @MR2_STOP_BITS_LENGTH_2
	.comm	_MR2_STOP_BITS_LENGTH_1,1,0     ; @MR2_STOP_BITS_LENGTH_1
	.comm	_CRTSCTS,4,2                    ; @CRTSCTS
	.comm	_MR1_RxRTS_CONTROL_ON,1,0       ; @MR1_RxRTS_CONTROL_ON
	.comm	_MR2_TxRTS_CONTROL_OFF,1,0      ; @MR2_TxRTS_CONTROL_OFF
	.comm	_MR2_CTS_ENABLE_TX_ON,1,0       ; @MR2_CTS_ENABLE_TX_ON
	.comm	_MR1_RxRTS_CONTROL_OFF,1,0      ; @MR1_RxRTS_CONTROL_OFF
	.comm	_MR2_CTS_ENABLE_TX_OFF,1,0      ; @MR2_CTS_ENABLE_TX_OFF
	.comm	_MR2_TxRTS_CONTROL_ON,1,0       ; @MR2_TxRTS_CONTROL_ON
	.comm	_TX_CLK_75,1,0                  ; @TX_CLK_75
	.comm	_RX_CLK_75,1,0                  ; @RX_CLK_75
	.comm	_TX_CLK_110,1,0                 ; @TX_CLK_110
	.comm	_RX_CLK_110,1,0                 ; @RX_CLK_110
	.comm	_TX_CLK_150,1,0                 ; @TX_CLK_150
	.comm	_RX_CLK_150,1,0                 ; @RX_CLK_150
	.comm	_TX_CLK_300,1,0                 ; @TX_CLK_300
	.comm	_RX_CLK_300,1,0                 ; @RX_CLK_300
	.comm	_TX_CLK_600,1,0                 ; @TX_CLK_600
	.comm	_RX_CLK_600,1,0                 ; @RX_CLK_600
	.comm	_TX_CLK_1200,1,0                ; @TX_CLK_1200
	.comm	_RX_CLK_1200,1,0                ; @RX_CLK_1200
	.comm	_TX_CLK_1800,1,0                ; @TX_CLK_1800
	.comm	_RX_CLK_1800,1,0                ; @RX_CLK_1800
	.comm	_TX_CLK_2000,1,0                ; @TX_CLK_2000
	.comm	_RX_CLK_2000,1,0                ; @RX_CLK_2000
	.comm	_TX_CLK_2400,1,0                ; @TX_CLK_2400
	.comm	_RX_CLK_2400,1,0                ; @RX_CLK_2400
	.comm	_TX_CLK_4800,1,0                ; @TX_CLK_4800
	.comm	_RX_CLK_4800,1,0                ; @RX_CLK_4800
	.comm	_TX_CLK_9600,1,0                ; @TX_CLK_9600
	.comm	_RX_CLK_9600,1,0                ; @RX_CLK_9600
	.comm	_TX_CLK_19200,1,0               ; @TX_CLK_19200
	.comm	_RX_CLK_19200,1,0               ; @RX_CLK_19200
	.comm	_TX_CLK_38400,1,0               ; @TX_CLK_38400
	.comm	_RX_CLK_38400,1,0               ; @RX_CLK_38400
	.comm	_MR1_ERROR_CHAR,1,0             ; @MR1_ERROR_CHAR
	.comm	_MR1_RxINT_RxRDY,1,0            ; @MR1_RxINT_RxRDY
	.comm	_CR_ENABLE_RX,1,0               ; @CR_ENABLE_RX
	.no_dead_strip	_ipoctal_set_termios
.subsections_via_symbols
