	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function rts5260_card_power_on
_rts5260_card_power_on:                 ## @rts5260_card_power_on
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	cmpq	$0, 8(%rdi)
	je	LBB0_2
## %bb.1:
	movq	%rbx, %rdi
	callq	_rtsx_pci_enable_ocp
LBB0_2:
	movq	_LDO_CONFIG2@GOTPCREL(%rip), %r14
	movl	(%r14), %esi
	movq	_DV331812_VDD1@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%ecx, %edx
	callq	_rtsx_pci_write_register
	movq	_LDO_VCC_CFG0@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_RTS5260_DVCC_TUNE_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_RTS5260_DVCC_33@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_rtsx_pci_write_register
	movq	_LDO_VCC_CFG1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_LDO_POW_SDVDD1_MASK@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_LDO_POW_SDVDD1_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	callq	_rtsx_pci_write_register
	movl	(%r14), %esi
	movq	_DV331812_POWERON@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%ecx, %edx
	callq	_rtsx_pci_write_register
	movl	$20, %edi
	callq	_msleep
	movl	(%rbx), %eax
	movq	_EXTRA_CAPS_SD_SDR50@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	jne	LBB0_4
## %bb.3:
	movq	_EXTRA_CAPS_SD_SDR104@GOTPCREL(%rip), %rcx
	testl	%eax, (%rcx)
	je	LBB0_5
LBB0_4:
	movq	%rbx, %rdi
	callq	_sd_set_sample_push_timing_sd30
LBB0_5:
	movq	_SD_CFG1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SD_CLK_DIVIDE_128@GOTPCREL(%rip), %rax
	movq	_SD_20_MODE@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	$255, %edx
	callq	_rtsx_pci_write_register
	movq	_SD_SAMPLE_POINT_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SD20_RX_POS_EDGE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	$255, %edx
	callq	_rtsx_pci_write_register
	movq	_SD_PUSH_POINT_CTL@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	movl	$255, %edx
	xorl	%ecx, %ecx
	callq	_rtsx_pci_write_register
	movq	_CARD_STOP@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SD_STOP@GOTPCREL(%rip), %rax
	movq	_SD_CLR_ERR@GOTPCREL(%rip), %rcx
	movl	(%rcx), %ecx
	orl	(%rax), %ecx
	movq	%rbx, %rdi
	movl	%ecx, %edx
	callq	_rtsx_pci_write_register
	movq	_SD_CFG3@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_SD30_CLK_END_EN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_rtsx_pci_write_register
	movq	_REG_SD_STOP_SDCLK_CFG@GOTPCREL(%rip), %rax
	movq	_SD30_CLK_STOP_CFG_EN@GOTPCREL(%rip), %rcx
	movq	_SD30_CLK_STOP_CFG1@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_SD30_CLK_STOP_CFG0@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_rtsx_pci_write_register
	movq	_REG_PRE_RW_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_EN_INFINITE_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	callq	_rtsx_pci_write_register
	xorl	%eax, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_LDO_CONFIG2,4,2                ## @LDO_CONFIG2
	.comm	_DV331812_VDD1,4,2              ## @DV331812_VDD1
	.comm	_LDO_VCC_CFG0,4,2               ## @LDO_VCC_CFG0
	.comm	_RTS5260_DVCC_TUNE_MASK,4,2     ## @RTS5260_DVCC_TUNE_MASK
	.comm	_RTS5260_DVCC_33,4,2            ## @RTS5260_DVCC_33
	.comm	_LDO_VCC_CFG1,4,2               ## @LDO_VCC_CFG1
	.comm	_LDO_POW_SDVDD1_MASK,4,2        ## @LDO_POW_SDVDD1_MASK
	.comm	_LDO_POW_SDVDD1_ON,4,2          ## @LDO_POW_SDVDD1_ON
	.comm	_DV331812_POWERON,4,2           ## @DV331812_POWERON
	.comm	_EXTRA_CAPS_SD_SDR50,4,2        ## @EXTRA_CAPS_SD_SDR50
	.comm	_EXTRA_CAPS_SD_SDR104,4,2       ## @EXTRA_CAPS_SD_SDR104
	.comm	_SD_CFG1,4,2                    ## @SD_CFG1
	.comm	_SD_CLK_DIVIDE_128,4,2          ## @SD_CLK_DIVIDE_128
	.comm	_SD_20_MODE,4,2                 ## @SD_20_MODE
	.comm	_SD_SAMPLE_POINT_CTL,4,2        ## @SD_SAMPLE_POINT_CTL
	.comm	_SD20_RX_POS_EDGE,4,2           ## @SD20_RX_POS_EDGE
	.comm	_SD_PUSH_POINT_CTL,4,2          ## @SD_PUSH_POINT_CTL
	.comm	_CARD_STOP,4,2                  ## @CARD_STOP
	.comm	_SD_STOP,4,2                    ## @SD_STOP
	.comm	_SD_CLR_ERR,4,2                 ## @SD_CLR_ERR
	.comm	_SD_CFG3,4,2                    ## @SD_CFG3
	.comm	_SD30_CLK_END_EN,4,2            ## @SD30_CLK_END_EN
	.comm	_REG_SD_STOP_SDCLK_CFG,4,2      ## @REG_SD_STOP_SDCLK_CFG
	.comm	_SD30_CLK_STOP_CFG_EN,4,2       ## @SD30_CLK_STOP_CFG_EN
	.comm	_SD30_CLK_STOP_CFG1,4,2         ## @SD30_CLK_STOP_CFG1
	.comm	_SD30_CLK_STOP_CFG0,4,2         ## @SD30_CLK_STOP_CFG0
	.comm	_REG_PRE_RW_MODE,4,2            ## @REG_PRE_RW_MODE
	.comm	_EN_INFINITE_MODE,4,2           ## @EN_INFINITE_MODE
	.no_dead_strip	_rts5260_card_power_on
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function rts5260_card_power_on
_rts5260_card_power_on:                 ; @rts5260_card_power_on
	.cfi_startproc
; %bb.0:
	stp	x20, x19, [sp, #-32]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 32
	stp	x29, x30, [sp, #16]             ; 16-byte Folded Spill
	add	x29, sp, #16
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	ldr	x8, [x0, #8]
	cbz	x8, LBB0_2
; %bb.1:
	mov	x0, x19
	bl	_rtsx_pci_enable_ocp
LBB0_2:
Lloh0:
	adrp	x20, _LDO_CONFIG2@GOTPAGE
Lloh1:
	ldr	x20, [x20, _LDO_CONFIG2@GOTPAGEOFF]
	ldr	w1, [x20]
Lloh2:
	adrp	x8, _DV331812_VDD1@GOTPAGE
Lloh3:
	ldr	x8, [x8, _DV331812_VDD1@GOTPAGEOFF]
Lloh4:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x3, x2
	bl	_rtsx_pci_write_register
Lloh5:
	adrp	x8, _LDO_VCC_CFG0@GOTPAGE
Lloh6:
	ldr	x8, [x8, _LDO_VCC_CFG0@GOTPAGEOFF]
Lloh7:
	ldr	w1, [x8]
Lloh8:
	adrp	x8, _RTS5260_DVCC_TUNE_MASK@GOTPAGE
Lloh9:
	ldr	x8, [x8, _RTS5260_DVCC_TUNE_MASK@GOTPAGEOFF]
Lloh10:
	ldr	w2, [x8]
Lloh11:
	adrp	x8, _RTS5260_DVCC_33@GOTPAGE
Lloh12:
	ldr	x8, [x8, _RTS5260_DVCC_33@GOTPAGEOFF]
Lloh13:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_rtsx_pci_write_register
Lloh14:
	adrp	x8, _LDO_VCC_CFG1@GOTPAGE
Lloh15:
	ldr	x8, [x8, _LDO_VCC_CFG1@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x8]
Lloh17:
	adrp	x8, _LDO_POW_SDVDD1_MASK@GOTPAGE
Lloh18:
	ldr	x8, [x8, _LDO_POW_SDVDD1_MASK@GOTPAGEOFF]
Lloh19:
	ldr	w2, [x8]
Lloh20:
	adrp	x8, _LDO_POW_SDVDD1_ON@GOTPAGE
Lloh21:
	ldr	x8, [x8, _LDO_POW_SDVDD1_ON@GOTPAGEOFF]
Lloh22:
	ldr	w3, [x8]
	mov	x0, x19
	bl	_rtsx_pci_write_register
	ldr	w1, [x20]
Lloh23:
	adrp	x8, _DV331812_POWERON@GOTPAGE
Lloh24:
	ldr	x8, [x8, _DV331812_POWERON@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x8]
	mov	x0, x19
	mov	x3, x2
	bl	_rtsx_pci_write_register
	mov	w0, #20
	bl	_msleep
	ldr	w8, [x19]
Lloh26:
	adrp	x9, _EXTRA_CAPS_SD_SDR50@GOTPAGE
Lloh27:
	ldr	x9, [x9, _EXTRA_CAPS_SD_SDR50@GOTPAGEOFF]
Lloh28:
	ldr	w9, [x9]
	tst	w9, w8
	b.ne	LBB0_4
; %bb.3:
Lloh29:
	adrp	x9, _EXTRA_CAPS_SD_SDR104@GOTPAGE
Lloh30:
	ldr	x9, [x9, _EXTRA_CAPS_SD_SDR104@GOTPAGEOFF]
Lloh31:
	ldr	w9, [x9]
	tst	w9, w8
	b.eq	LBB0_5
LBB0_4:
	mov	x0, x19
	bl	_sd_set_sample_push_timing_sd30
LBB0_5:
Lloh32:
	adrp	x8, _SD_CFG1@GOTPAGE
Lloh33:
	ldr	x8, [x8, _SD_CFG1@GOTPAGEOFF]
Lloh34:
	adrp	x9, _SD_CLK_DIVIDE_128@GOTPAGE
Lloh35:
	ldr	x9, [x9, _SD_CLK_DIVIDE_128@GOTPAGEOFF]
Lloh36:
	ldr	w1, [x8]
Lloh37:
	ldr	w8, [x9]
Lloh38:
	adrp	x9, _SD_20_MODE@GOTPAGE
Lloh39:
	ldr	x9, [x9, _SD_20_MODE@GOTPAGEOFF]
Lloh40:
	ldr	w9, [x9]
	orr	w3, w9, w8
	mov	x0, x19
	mov	w2, #255
	bl	_rtsx_pci_write_register
Lloh41:
	adrp	x8, _SD_SAMPLE_POINT_CTL@GOTPAGE
Lloh42:
	ldr	x8, [x8, _SD_SAMPLE_POINT_CTL@GOTPAGEOFF]
Lloh43:
	ldr	w1, [x8]
Lloh44:
	adrp	x8, _SD20_RX_POS_EDGE@GOTPAGE
Lloh45:
	ldr	x8, [x8, _SD20_RX_POS_EDGE@GOTPAGEOFF]
Lloh46:
	ldr	w3, [x8]
	mov	x0, x19
	mov	w2, #255
	bl	_rtsx_pci_write_register
Lloh47:
	adrp	x8, _SD_PUSH_POINT_CTL@GOTPAGE
Lloh48:
	ldr	x8, [x8, _SD_PUSH_POINT_CTL@GOTPAGEOFF]
Lloh49:
	ldr	w1, [x8]
	mov	x0, x19
	mov	w2, #255
	mov	w3, #0
	bl	_rtsx_pci_write_register
Lloh50:
	adrp	x8, _CARD_STOP@GOTPAGE
Lloh51:
	ldr	x8, [x8, _CARD_STOP@GOTPAGEOFF]
Lloh52:
	adrp	x9, _SD_STOP@GOTPAGE
Lloh53:
	ldr	x9, [x9, _SD_STOP@GOTPAGEOFF]
Lloh54:
	ldr	w1, [x8]
Lloh55:
	ldr	w8, [x9]
Lloh56:
	adrp	x9, _SD_CLR_ERR@GOTPAGE
Lloh57:
	ldr	x9, [x9, _SD_CLR_ERR@GOTPAGEOFF]
Lloh58:
	ldr	w9, [x9]
	orr	w2, w9, w8
	mov	x0, x19
	mov	x3, x2
	bl	_rtsx_pci_write_register
Lloh59:
	adrp	x8, _SD_CFG3@GOTPAGE
Lloh60:
	ldr	x8, [x8, _SD_CFG3@GOTPAGEOFF]
Lloh61:
	ldr	w1, [x8]
Lloh62:
	adrp	x8, _SD30_CLK_END_EN@GOTPAGE
Lloh63:
	ldr	x8, [x8, _SD30_CLK_END_EN@GOTPAGEOFF]
Lloh64:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_rtsx_pci_write_register
Lloh65:
	adrp	x8, _REG_SD_STOP_SDCLK_CFG@GOTPAGE
Lloh66:
	ldr	x8, [x8, _REG_SD_STOP_SDCLK_CFG@GOTPAGEOFF]
Lloh67:
	ldr	w1, [x8]
Lloh68:
	adrp	x8, _SD30_CLK_STOP_CFG_EN@GOTPAGE
Lloh69:
	ldr	x8, [x8, _SD30_CLK_STOP_CFG_EN@GOTPAGEOFF]
Lloh70:
	ldr	w8, [x8]
Lloh71:
	adrp	x9, _SD30_CLK_STOP_CFG1@GOTPAGE
Lloh72:
	ldr	x9, [x9, _SD30_CLK_STOP_CFG1@GOTPAGEOFF]
Lloh73:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh74:
	adrp	x9, _SD30_CLK_STOP_CFG0@GOTPAGE
Lloh75:
	ldr	x9, [x9, _SD30_CLK_STOP_CFG0@GOTPAGEOFF]
Lloh76:
	ldr	w9, [x9]
	orr	w2, w8, w9
	mov	x0, x19
	mov	w3, #0
	bl	_rtsx_pci_write_register
Lloh77:
	adrp	x8, _REG_PRE_RW_MODE@GOTPAGE
Lloh78:
	ldr	x8, [x8, _REG_PRE_RW_MODE@GOTPAGEOFF]
Lloh79:
	ldr	w1, [x8]
Lloh80:
	adrp	x8, _EN_INFINITE_MODE@GOTPAGE
Lloh81:
	ldr	x8, [x8, _EN_INFINITE_MODE@GOTPAGEOFF]
Lloh82:
	ldr	w2, [x8]
	mov	x0, x19
	mov	w3, #0
	bl	_rtsx_pci_write_register
	mov	w0, #0
	ldp	x29, x30, [sp, #16]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp], #32             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh65, Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh62, Lloh63, Lloh64
	.loh AdrpLdrGotLdr	Lloh59, Lloh60, Lloh61
	.loh AdrpLdrGotLdr	Lloh56, Lloh57, Lloh58
	.loh AdrpLdrGotLdr	Lloh52, Lloh53, Lloh55
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh54
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh34, Lloh35, Lloh37
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh36
	.cfi_endproc
                                        ; -- End function
	.comm	_LDO_CONFIG2,4,2                ; @LDO_CONFIG2
	.comm	_DV331812_VDD1,4,2              ; @DV331812_VDD1
	.comm	_LDO_VCC_CFG0,4,2               ; @LDO_VCC_CFG0
	.comm	_RTS5260_DVCC_TUNE_MASK,4,2     ; @RTS5260_DVCC_TUNE_MASK
	.comm	_RTS5260_DVCC_33,4,2            ; @RTS5260_DVCC_33
	.comm	_LDO_VCC_CFG1,4,2               ; @LDO_VCC_CFG1
	.comm	_LDO_POW_SDVDD1_MASK,4,2        ; @LDO_POW_SDVDD1_MASK
	.comm	_LDO_POW_SDVDD1_ON,4,2          ; @LDO_POW_SDVDD1_ON
	.comm	_DV331812_POWERON,4,2           ; @DV331812_POWERON
	.comm	_EXTRA_CAPS_SD_SDR50,4,2        ; @EXTRA_CAPS_SD_SDR50
	.comm	_EXTRA_CAPS_SD_SDR104,4,2       ; @EXTRA_CAPS_SD_SDR104
	.comm	_SD_CFG1,4,2                    ; @SD_CFG1
	.comm	_SD_CLK_DIVIDE_128,4,2          ; @SD_CLK_DIVIDE_128
	.comm	_SD_20_MODE,4,2                 ; @SD_20_MODE
	.comm	_SD_SAMPLE_POINT_CTL,4,2        ; @SD_SAMPLE_POINT_CTL
	.comm	_SD20_RX_POS_EDGE,4,2           ; @SD20_RX_POS_EDGE
	.comm	_SD_PUSH_POINT_CTL,4,2          ; @SD_PUSH_POINT_CTL
	.comm	_CARD_STOP,4,2                  ; @CARD_STOP
	.comm	_SD_STOP,4,2                    ; @SD_STOP
	.comm	_SD_CLR_ERR,4,2                 ; @SD_CLR_ERR
	.comm	_SD_CFG3,4,2                    ; @SD_CFG3
	.comm	_SD30_CLK_END_EN,4,2            ; @SD30_CLK_END_EN
	.comm	_REG_SD_STOP_SDCLK_CFG,4,2      ; @REG_SD_STOP_SDCLK_CFG
	.comm	_SD30_CLK_STOP_CFG_EN,4,2       ; @SD30_CLK_STOP_CFG_EN
	.comm	_SD30_CLK_STOP_CFG1,4,2         ; @SD30_CLK_STOP_CFG1
	.comm	_SD30_CLK_STOP_CFG0,4,2         ; @SD30_CLK_STOP_CFG0
	.comm	_REG_PRE_RW_MODE,4,2            ; @REG_PRE_RW_MODE
	.comm	_EN_INFINITE_MODE,4,2           ; @EN_INFINITE_MODE
	.no_dead_strip	_rts5260_card_power_on
.subsections_via_symbols
