	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function bnx2x_warpcore_set_limiting_mode
_bnx2x_warpcore_set_limiting_mode:      ## @bnx2x_warpcore_set_limiting_mode
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%edx, %r13d
	movq	%rsi, %r15
	movq	%rdi, %rsi
	movl	$0, -44(%rbp)
	movq	_MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	(%rdi), %r14
	movq	%r15, %rdi
	callq	_bnx2x_get_warpcore_lane
	movl	%eax, %r12d
	movq	_MDIO_WC_DEVAD@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	_MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %ecx
	leaq	-44(%rbp), %r8
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_bnx2x_cl45_read
	movl	-44(%rbp), %eax
	leal	-129(%r13), %ecx
	cmpl	$2, %ecx
	jb	LBB0_6
## %bb.1:
	cmpl	$128, %r13d
	je	LBB0_3
## %bb.2:
	cmpl	$131, %r13d
	jne	LBB0_5
LBB0_3:
	movq	_MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC@GOTPCREL(%rip), %rcx
	jmp	LBB0_4
LBB0_6:
	movq	_MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT@GOTPCREL(%rip), %rcx
LBB0_4:
	movl	(%rcx), %ebx
LBB0_5:
	shll	$2, %r12d
	movl	$15, %edx
	movl	%r12d, %ecx
	shll	%cl, %edx
	notl	%edx
	andl	%edx, %eax
	shll	%cl, %ebx
	orl	%eax, %ebx
	movl	%ebx, -44(%rbp)
	movq	_MDIO_WC_DEVAD@GOTPCREL(%rip), %r12
	movl	(%r12), %edx
	movq	_MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE@GOTPCREL(%rip), %r13
	movl	(%r13), %ecx
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	%ebx, %r8d
	callq	_bnx2x_cl45_write
	movl	(%r12), %edx
	movl	(%r13), %ecx
	leaq	-44(%rbp), %r8
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_bnx2x_cl45_read
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	$1, %edx
	callq	_bnx2x_warpcore_reset_lane
	movq	%r14, %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	_bnx2x_warpcore_reset_lane
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT,4,2 ## @MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT
	.comm	_MDIO_WC_DEVAD,4,2              ## @MDIO_WC_DEVAD
	.comm	_MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE,4,2 ## @MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE
	.comm	_MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC,4,2 ## @MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC
	.no_dead_strip	_bnx2x_warpcore_set_limiting_mode
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function bnx2x_warpcore_set_limiting_mode
_bnx2x_warpcore_set_limiting_mode:      ; @bnx2x_warpcore_set_limiting_mode
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #96
	.cfi_def_cfa_offset 96
	stp	x26, x25, [sp, #16]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #32]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #48]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #64]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #80]             ; 16-byte Folded Spill
	add	x29, sp, #80
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	mov	x22, x2
	mov	x19, x1
	mov	x1, x0
	str	wzr, [sp, #12]
Lloh0:
	adrp	x26, _MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT@GOTPAGE
Lloh1:
	ldr	x26, [x26, _MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT@GOTPAGEOFF]
	ldr	w25, [x26]
	ldr	x20, [x0]
	mov	x0, x19
	bl	_bnx2x_get_warpcore_lane
	mov	x21, x0
Lloh2:
	adrp	x23, _MDIO_WC_DEVAD@GOTPAGE
Lloh3:
	ldr	x23, [x23, _MDIO_WC_DEVAD@GOTPAGEOFF]
	ldr	w2, [x23]
Lloh4:
	adrp	x24, _MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE@GOTPAGE
Lloh5:
	ldr	x24, [x24, _MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE@GOTPAGEOFF]
	ldr	w3, [x24]
	add	x4, sp, #12
	mov	x0, x20
	mov	x1, x19
	bl	_bnx2x_cl45_read
	ldr	w8, [sp, #12]
	sub	w9, w22, #129
	cmp	w9, #2
	b.lo	LBB0_4
; %bb.1:
	cmp	w22, #128
	b.eq	LBB0_3
; %bb.2:
	cmp	w22, #131
	b.ne	LBB0_5
LBB0_3:
Lloh6:
	adrp	x9, _MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC@GOTPAGE
Lloh7:
	ldr	x9, [x9, _MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC@GOTPAGEOFF]
Lloh8:
	ldr	w25, [x9]
	b	LBB0_5
LBB0_4:
	ldr	w25, [x26]
LBB0_5:
	lsl	w9, w21, #2
	mov	w10, #15
	lsl	w10, w10, w9
	bic	w8, w8, w10
	lsl	w9, w25, w9
	orr	w4, w9, w8
	str	w4, [sp, #12]
	ldr	w2, [x23]
	ldr	w3, [x24]
	mov	x0, x20
	mov	x1, x19
	bl	_bnx2x_cl45_write
	ldr	w2, [x23]
	ldr	w3, [x24]
	add	x4, sp, #12
	mov	x0, x20
	mov	x1, x19
	bl	_bnx2x_cl45_read
	mov	x0, x20
	mov	x1, x19
	mov	w2, #1
	bl	_bnx2x_warpcore_reset_lane
	mov	x0, x20
	mov	x1, x19
	mov	w2, #0
	bl	_bnx2x_warpcore_reset_lane
	ldp	x29, x30, [sp, #80]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #64]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #48]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #32]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #96
	ret
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.cfi_endproc
                                        ; -- End function
	.comm	_MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT,4,2 ; @MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT
	.comm	_MDIO_WC_DEVAD,4,2              ; @MDIO_WC_DEVAD
	.comm	_MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE,4,2 ; @MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE
	.comm	_MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC,4,2 ; @MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC
	.no_dead_strip	_bnx2x_warpcore_set_limiting_mode
.subsections_via_symbols
