	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function pcie_post_steps
_pcie_post_steps:                       ## @pcie_post_steps
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r15
	callq	_set_sbus_fast_mode
	movq	_NUM_PCIE_SERDES@GOTPCREL(%rip), %r14
	cmpl	$0, (%r14)
	jle	LBB0_3
## %bb.1:
	xorl	%ebx, %ebx
	movq	_pcie_pcs_addrs@GOTPCREL(%rip), %r12
	movq	_WRITE_SBUS_RECEIVER@GOTPCREL(%rip), %r13
	.p2align	4, 0x90
LBB0_2:                                 ## =>This Inner Loop Header: Depth=1
	movq	(%r12), %rax
	movq	(%r15), %rcx
	movq	(%rax,%rcx,8), %rax
	movl	(%rax,%rbx,4), %esi
	movl	(%r13), %ecx
	movq	%r15, %rdi
	movl	$3, %edx
	movl	$139570, %r8d                   ## imm = 0x22132
	callq	_sbus_request
	incq	%rbx
	movslq	(%r14), %rax
	cmpq	%rax, %rbx
	jl	LBB0_2
LBB0_3:
	movq	%r15, %rdi
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_clear_sbus_fast_mode           ## TAILCALL
	.cfi_endproc
                                        ## -- End function
	.comm	_NUM_PCIE_SERDES,4,2            ## @NUM_PCIE_SERDES
	.comm	_pcie_pcs_addrs,8,3             ## @pcie_pcs_addrs
	.comm	_WRITE_SBUS_RECEIVER,4,2        ## @WRITE_SBUS_RECEIVER
	.no_dead_strip	_pcie_post_steps
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function pcie_post_steps
_pcie_post_steps:                       ; @pcie_post_steps
	.cfi_startproc
; %bb.0:
	stp	x24, x23, [sp, #-64]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 64
	stp	x22, x21, [sp, #16]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #32]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #48]             ; 16-byte Folded Spill
	add	x29, sp, #48
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x19, x0
	bl	_set_sbus_fast_mode
Lloh0:
	adrp	x20, _NUM_PCIE_SERDES@GOTPAGE
Lloh1:
	ldr	x20, [x20, _NUM_PCIE_SERDES@GOTPAGEOFF]
	ldr	w8, [x20]
	cmp	w8, #1
	b.lt	LBB0_3
; %bb.1:
	mov	x21, #0
Lloh2:
	adrp	x22, _pcie_pcs_addrs@GOTPAGE
Lloh3:
	ldr	x22, [x22, _pcie_pcs_addrs@GOTPAGEOFF]
Lloh4:
	adrp	x23, _WRITE_SBUS_RECEIVER@GOTPAGE
Lloh5:
	ldr	x23, [x23, _WRITE_SBUS_RECEIVER@GOTPAGEOFF]
LBB0_2:                                 ; =>This Inner Loop Header: Depth=1
	ldr	x8, [x22]
	ldr	x9, [x19]
	ldr	x8, [x8, x9, lsl #3]
	ldr	w1, [x8, x21, lsl #2]
	ldr	w3, [x23]
	mov	x0, x19
	mov	w2, #3
	mov	w4, #8498
	movk	w4, #2, lsl #16
	bl	_sbus_request
	add	x21, x21, #1
	ldrsw	x8, [x20]
	cmp	x21, x8
	b.lt	LBB0_2
LBB0_3:
	mov	x0, x19
	ldp	x29, x30, [sp, #48]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #32]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #16]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp], #64             ; 16-byte Folded Reload
	b	_clear_sbus_fast_mode
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGot	Lloh4, Lloh5
	.loh AdrpLdrGot	Lloh2, Lloh3
	.cfi_endproc
                                        ; -- End function
	.comm	_NUM_PCIE_SERDES,4,2            ; @NUM_PCIE_SERDES
	.comm	_pcie_pcs_addrs,8,3             ; @pcie_pcs_addrs
	.comm	_WRITE_SBUS_RECEIVER,4,2        ; @WRITE_SBUS_RECEIVER
	.no_dead_strip	_pcie_post_steps
.subsections_via_symbols
