	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function sunxi_mmc_set_clk
_sunxi_mmc_set_clk:                     ## @sunxi_mmc_set_clk
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	_REG_GCTRL@GOTPCREL(%rip), %r15
	movl	(%r15), %esi
	callq	_mmc_readl
	movq	(%r14), %rcx
	movq	_MMC_TIMING_UHS_DDR50@GOTPCREL(%rip), %r8
	movq	_MMC_TIMING_MMC_DDR52@GOTPCREL(%rip), %rdi
	movq	_SDXC_DDR_MODE@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	movl	%edx, %esi
	orl	%eax, %esi
	notl	%edx
	andl	%eax, %edx
	cmpq	(%rdi), %rcx
	cmovel	%esi, %edx
	cmpq	(%r8), %rcx
	cmovel	%esi, %edx
	movl	(%r15), %esi
	movq	%rbx, %rdi
	callq	_mmc_writel
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_sunxi_mmc_clk_set_rate
	movl	%eax, (%rbx)
	addq	$8, %rsp
	popq	%rbx
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_GCTRL,4,2                  ## @REG_GCTRL
	.comm	_MMC_TIMING_UHS_DDR50,8,3       ## @MMC_TIMING_UHS_DDR50
	.comm	_MMC_TIMING_MMC_DDR52,8,3       ## @MMC_TIMING_MMC_DDR52
	.comm	_SDXC_DDR_MODE,4,2              ## @SDXC_DDR_MODE
	.no_dead_strip	_sunxi_mmc_set_clk
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function sunxi_mmc_set_clk
_sunxi_mmc_set_clk:                     ; @sunxi_mmc_set_clk
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x1
	mov	x20, x0
Lloh0:
	adrp	x21, _REG_GCTRL@GOTPAGE
Lloh1:
	ldr	x21, [x21, _REG_GCTRL@GOTPAGEOFF]
	ldr	w1, [x21]
	bl	_mmc_readl
	ldr	x8, [x19]
Lloh2:
	adrp	x9, _MMC_TIMING_UHS_DDR50@GOTPAGE
Lloh3:
	ldr	x9, [x9, _MMC_TIMING_UHS_DDR50@GOTPAGEOFF]
Lloh4:
	ldr	x9, [x9]
Lloh5:
	adrp	x10, _MMC_TIMING_MMC_DDR52@GOTPAGE
Lloh6:
	ldr	x10, [x10, _MMC_TIMING_MMC_DDR52@GOTPAGEOFF]
Lloh7:
	ldr	x10, [x10]
	cmp	x8, x10
Lloh8:
	adrp	x10, _SDXC_DDR_MODE@GOTPAGE
Lloh9:
	ldr	x10, [x10, _SDXC_DDR_MODE@GOTPAGEOFF]
	ccmp	x8, x9, #4, ne
Lloh10:
	ldr	w8, [x10]
	orr	w9, w8, w0
	bic	w8, w0, w8
	csel	w2, w9, w8, eq
	ldr	w1, [x21]
	mov	x0, x20
	bl	_mmc_writel
	mov	x0, x20
	mov	x1, x19
	bl	_sunxi_mmc_clk_set_rate
	str	w0, [x20]
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh8, Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGot	Lloh0, Lloh1
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_GCTRL,4,2                  ; @REG_GCTRL
	.comm	_MMC_TIMING_UHS_DDR50,8,3       ; @MMC_TIMING_UHS_DDR50
	.comm	_MMC_TIMING_MMC_DDR52,8,3       ; @MMC_TIMING_MMC_DDR52
	.comm	_SDXC_DDR_MODE,4,2              ; @SDXC_DDR_MODE
	.no_dead_strip	_sunxi_mmc_set_clk
.subsections_via_symbols
