	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function vx855_probe
_vx855_probe:                           ## @vx855_probe
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %r14
	callq	_pci_enable_device
	testl	%eax, %eax
	jne	LBB0_4
## %bb.1:
	movq	_VX855_CFG_PMIO_OFFSET@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leaq	-20(%rbp), %rdx
	movq	%r14, %rdi
	callq	_pci_read_config_word
	movl	-20(%rbp), %eax
	testq	%rax, %rax
	je	LBB0_2
## %bb.3:
	andl	$65408, %eax                    ## imm = 0xFF80
	movl	%eax, -20(%rbp)
	movq	_VX855_PMIO_R_GPI@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rax), %rdx
	movq	_vx855_gpio_resources@GOTPCREL(%rip), %rsi
	movq	(%rsi), %rsi
	movq	%rdx, (%rsi)
	leaq	3(%rcx,%rax), %rcx
	movq	%rcx, 8(%rsi)
	movq	_VX855_PMIO_R_GPO@GOTPCREL(%rip), %rcx
	movq	(%rcx), %rcx
	leaq	(%rcx,%rax), %rdx
	movq	%rdx, 16(%rsi)
	leaq	3(%rcx,%rax), %rax
	movq	%rax, 24(%rsi)
	movq	_vx855_cells@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movl	%ebx, %edi
	callq	_ARRAY_SIZE
	movq	$0, (%rsp)
	movq	%r14, %rdi
	movl	$-1, %esi
	movl	%ebx, %edx
	movl	%eax, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	_mfd_add_devices
LBB0_4:
	movq	_ENODEV@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
LBB0_5:
	negl	%ebx
	movl	%ebx, %eax
	addq	$16, %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
LBB0_2:
	leaq	L_.str(%rip), %rsi
	movq	%r14, %rdi
	callq	_dev_warn
	movq	_ENODEV@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	%r14, %rdi
	callq	_pci_disable_device
	jmp	LBB0_5
	.cfi_endproc
                                        ## -- End function
	.comm	_ENODEV,4,2                     ## @ENODEV
	.comm	_VX855_CFG_PMIO_OFFSET,4,2      ## @VX855_CFG_PMIO_OFFSET
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"BIOS did not assign PMIO base offset?!?\n"

	.comm	_VX855_PMIO_R_GPI,8,3           ## @VX855_PMIO_R_GPI
	.comm	_vx855_gpio_resources,8,3       ## @vx855_gpio_resources
	.comm	_VX855_PMIO_R_GPO,8,3           ## @VX855_PMIO_R_GPO
	.comm	_vx855_cells,4,2                ## @vx855_cells
	.no_dead_strip	_vx855_probe
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function vx855_probe
_vx855_probe:                           ; @vx855_probe
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #48
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	mov	x19, x0
	bl	_pci_enable_device
	cbnz	w0, LBB0_3
; %bb.1:
Lloh0:
	adrp	x8, _VX855_CFG_PMIO_OFFSET@GOTPAGE
Lloh1:
	ldr	x8, [x8, _VX855_CFG_PMIO_OFFSET@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
	add	x2, sp, #12
	mov	x0, x19
	bl	_pci_read_config_word
	ldr	w8, [sp, #12]
	cbz	w8, LBB0_5
; %bb.2:
	and	x8, x8, #0xff80
	str	w8, [sp, #12]
Lloh3:
	adrp	x9, _VX855_PMIO_R_GPI@GOTPAGE
Lloh4:
	ldr	x9, [x9, _VX855_PMIO_R_GPI@GOTPAGEOFF]
Lloh5:
	ldr	x9, [x9]
	add	x9, x9, x8
Lloh6:
	adrp	x10, _vx855_gpio_resources@GOTPAGE
Lloh7:
	ldr	x10, [x10, _vx855_gpio_resources@GOTPAGEOFF]
Lloh8:
	ldr	x10, [x10]
	add	x11, x9, #3
	stp	x9, x11, [x10]
Lloh9:
	adrp	x9, _VX855_PMIO_R_GPO@GOTPAGE
Lloh10:
	ldr	x9, [x9, _VX855_PMIO_R_GPO@GOTPAGEOFF]
Lloh11:
	ldr	x9, [x9]
	add	x8, x9, x8
	add	x9, x8, #3
	stp	x8, x9, [x10, #16]
Lloh12:
	adrp	x8, _vx855_cells@GOTPAGE
Lloh13:
	ldr	x8, [x8, _vx855_cells@GOTPAGEOFF]
Lloh14:
	ldr	w20, [x8]
	mov	x0, x20
	bl	_ARRAY_SIZE
	mov	x3, x0
	mov	x0, x19
	mov	w1, #-1
	mov	x2, x20
	mov	x4, #0
	mov	w5, #0
	mov	x6, #0
	bl	_mfd_add_devices
LBB0_3:
Lloh15:
	adrp	x8, _ENODEV@GOTPAGE
Lloh16:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh17:
	ldr	w20, [x8]
LBB0_4:
	neg	w0, w20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #48
	ret
LBB0_5:
Lloh18:
	adrp	x1, l_.str@PAGE
Lloh19:
	add	x1, x1, l_.str@PAGEOFF
	mov	x0, x19
	bl	_dev_warn
Lloh20:
	adrp	x8, _ENODEV@GOTPAGE
Lloh21:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh22:
	ldr	w20, [x8]
	mov	x0, x19
	bl	_pci_disable_device
	b	LBB0_4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh12, Lloh13, Lloh14
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh15, Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpAdd	Lloh18, Lloh19
	.cfi_endproc
                                        ; -- End function
	.comm	_ENODEV,4,2                     ; @ENODEV
	.comm	_VX855_CFG_PMIO_OFFSET,4,2      ; @VX855_CFG_PMIO_OFFSET
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"BIOS did not assign PMIO base offset?!?\n"

	.comm	_VX855_PMIO_R_GPI,8,3           ; @VX855_PMIO_R_GPI
	.comm	_vx855_gpio_resources,8,3       ; @vx855_gpio_resources
	.comm	_VX855_PMIO_R_GPO,8,3           ; @VX855_PMIO_R_GPO
	.comm	_vx855_cells,4,2                ; @vx855_cells
	.no_dead_strip	_vx855_probe
.subsections_via_symbols
