	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si476x_core_start              ## -- Begin function si476x_core_start
	.p2align	4, 0x90
_si476x_core_start:                     ## @si476x_core_start
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %r14
	movq	16(%rdi), %r12
	testl	%esi, %esi
	je	LBB0_1
## %bb.7:
	movq	(%r12), %rdi
	testq	%rdi, %rdi
	je	LBB0_6
## %bb.8:
	callq	_enable_irq
	jmp	LBB0_9
LBB0_1:
	movl	(%r14), %edi
	callq	_gpio_is_valid
	testq	%rax, %rax
	je	LBB0_3
## %bb.2:
	movl	(%r14), %edi
	movl	$1, %esi
	callq	_gpio_set_value_cansleep
LBB0_3:
	movq	(%r12), %rdi
	testq	%rdi, %rdi
	je	LBB0_5
## %bb.4:
	callq	_enable_irq
LBB0_5:
	movl	$100, %edi
	callq	_udelay
	cmpq	$0, (%r12)
	jne	LBB0_9
LBB0_6:
	leaq	8(%r14), %rdi
	movl	$1, %esi
	callq	_atomic_set
	movq	%r14, %rdi
	callq	_si476x_core_schedule_polling_work
LBB0_9:
	leaq	28(%r14), %rsi
	movq	%r14, %rdi
	callq	_si476x_core_cmd_power_up
	testl	%eax, %eax
	js	LBB0_10
## %bb.12:
	cmpq	$0, (%r12)
	je	LBB0_14
## %bb.13:
	leaq	8(%r14), %rdi
	movl	$1, %esi
	callq	_atomic_set
LBB0_14:
	movq	%r14, %rdi
	callq	_si476x_core_config_pinmux
	testl	%eax, %eax
	js	LBB0_15
## %bb.16:
	xorl	%ebx, %ebx
	cmpq	$0, (%r12)
	je	LBB0_26
## %bb.17:
	movl	24(%r14), %edi
	movq	_SI476X_PROP_INT_CTL_ENABLE@GOTPCREL(%rip), %rax
	movq	_SI476X_RDSIEN@GOTPCREL(%rip), %rcx
	movq	_SI476X_STCIEN@GOTPCREL(%rip), %rdx
	movl	(%rdx), %edx
	orl	(%rcx), %edx
	movl	(%rax), %esi
	movq	_SI476X_CTSIEN@GOTPCREL(%rip), %rax
	orl	(%rax), %edx
	callq	_regmap_write
	testl	%eax, %eax
	jns	LBB0_26
## %bb.18:
	movl	%eax, %r15d
	movq	16(%r14), %rdi
	addq	$8, %rdi
	leaq	L_.str.2(%rip), %rsi
	movl	%eax, %edx
	callq	_dev_err
	movl	%r15d, %ebx
	jmp	LBB0_19
LBB0_10:
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	addq	$8, %rdi
	leaq	L_.str(%rip), %rsi
	jmp	LBB0_11
LBB0_15:
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	addq	$8, %rdi
	leaq	L_.str.1(%rip), %rsi
LBB0_11:
	movl	%ebx, %edx
	callq	_dev_err
LBB0_19:
	movq	_ENODEV@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	addl	%ebx, %eax
	jne	LBB0_21
## %bb.20:
	leaq	8(%r14), %rdi
	xorl	%esi, %esi
	callq	_atomic_set
LBB0_21:
	movq	(%r12), %rdi
	testq	%rdi, %rdi
	je	LBB0_23
## %bb.22:
	callq	_disable_irq
	jmp	LBB0_24
LBB0_23:
	leaq	4(%r14), %rdi
	callq	_cancel_delayed_work_sync
LBB0_24:
	movl	(%r14), %edi
	callq	_gpio_is_valid
	testq	%rax, %rax
	je	LBB0_26
## %bb.25:
	movl	(%r14), %edi
	xorl	%esi, %esi
	callq	_gpio_set_value_cansleep
LBB0_26:
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.section	__TEXT,__cstring,cstring_literals
L_.str:                                 ## @.str
	.asciz	"Power up failure(err = %d)\n"

L_.str.1:                               ## @.str.1
	.asciz	"Failed to configure pinmux(err = %d)\n"

	.comm	_SI476X_PROP_INT_CTL_ENABLE,4,2 ## @SI476X_PROP_INT_CTL_ENABLE
	.comm	_SI476X_RDSIEN,4,2              ## @SI476X_RDSIEN
	.comm	_SI476X_STCIEN,4,2              ## @SI476X_STCIEN
	.comm	_SI476X_CTSIEN,4,2              ## @SI476X_CTSIEN
L_.str.2:                               ## @.str.2
	.asciz	"Failed to configure interrupt sources(err = %d)\n"

	.comm	_ENODEV,4,2                     ## @ENODEV
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.globl	_si476x_core_start              ; -- Begin function si476x_core_start
	.p2align	2
_si476x_core_start:                     ; @si476x_core_start
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x21, [x0, #16]
	cbz	w1, LBB0_3
; %bb.1:
	ldr	x0, [x21]
	cbz	x0, LBB0_8
; %bb.2:
	bl	_enable_irq
	b	LBB0_9
LBB0_3:
	ldr	w0, [x19]
	bl	_gpio_is_valid
	cbz	x0, LBB0_5
; %bb.4:
	ldr	w0, [x19]
	mov	w1, #1
	bl	_gpio_set_value_cansleep
LBB0_5:
	ldr	x0, [x21]
	cbz	x0, LBB0_7
; %bb.6:
	bl	_enable_irq
LBB0_7:
	mov	w0, #100
	bl	_udelay
	ldr	x8, [x21]
	cbnz	x8, LBB0_9
LBB0_8:
	add	x0, x19, #8
	mov	w1, #1
	bl	_atomic_set
	mov	x0, x19
	bl	_si476x_core_schedule_polling_work
LBB0_9:
	add	x1, x19, #28
	mov	x0, x19
	bl	_si476x_core_cmd_power_up
	tbnz	w0, #31, LBB0_16
; %bb.10:
	ldr	x8, [x21]
	cbz	x8, LBB0_12
; %bb.11:
	add	x0, x19, #8
	mov	w1, #1
	bl	_atomic_set
LBB0_12:
	mov	x0, x19
	bl	_si476x_core_config_pinmux
	tbnz	w0, #31, LBB0_17
; %bb.13:
	ldr	x8, [x21]
	cbz	x8, LBB0_15
; %bb.14:
	ldr	w0, [x19, #24]
Lloh0:
	adrp	x8, _SI476X_PROP_INT_CTL_ENABLE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _SI476X_PROP_INT_CTL_ENABLE@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x8]
Lloh3:
	adrp	x8, _SI476X_RDSIEN@GOTPAGE
Lloh4:
	ldr	x8, [x8, _SI476X_RDSIEN@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
Lloh6:
	adrp	x9, _SI476X_STCIEN@GOTPAGE
Lloh7:
	ldr	x9, [x9, _SI476X_STCIEN@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
	orr	w8, w9, w8
Lloh9:
	adrp	x9, _SI476X_CTSIEN@GOTPAGE
Lloh10:
	ldr	x9, [x9, _SI476X_CTSIEN@GOTPAGEOFF]
Lloh11:
	ldr	w9, [x9]
	orr	w2, w8, w9
	bl	_regmap_write
	tbnz	w0, #31, LBB0_18
LBB0_15:
	mov	w20, #0
	b	LBB0_26
LBB0_16:
	mov	x20, x0
	ldr	x8, [x19, #16]
	add	x0, x8, #8
Lloh12:
	adrp	x1, l_.str@PAGE
Lloh13:
	add	x1, x1, l_.str@PAGEOFF
	b	LBB0_19
LBB0_17:
	mov	x20, x0
	ldr	x8, [x19, #16]
	add	x0, x8, #8
Lloh14:
	adrp	x1, l_.str.1@PAGE
Lloh15:
	add	x1, x1, l_.str.1@PAGEOFF
	b	LBB0_19
LBB0_18:
	mov	x20, x0
	ldr	x8, [x19, #16]
	add	x0, x8, #8
Lloh16:
	adrp	x1, l_.str.2@PAGE
Lloh17:
	add	x1, x1, l_.str.2@PAGEOFF
LBB0_19:
	mov	x2, x20
	bl	_dev_err
Lloh18:
	adrp	x8, _ENODEV@GOTPAGE
Lloh19:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh20:
	ldr	w8, [x8]
	cmn	w20, w8
	b.ne	LBB0_21
; %bb.20:
	add	x0, x19, #8
	mov	w1, #0
	bl	_atomic_set
LBB0_21:
	ldr	x0, [x21]
	cbz	x0, LBB0_23
; %bb.22:
	bl	_disable_irq
	b	LBB0_24
LBB0_23:
	add	x0, x19, #4
	bl	_cancel_delayed_work_sync
LBB0_24:
	ldr	w0, [x19]
	bl	_gpio_is_valid
	cbz	x0, LBB0_26
; %bb.25:
	ldr	w0, [x19]
	mov	w1, #0
	bl	_gpio_set_value_cansleep
LBB0_26:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGotLdr	Lloh9, Lloh10, Lloh11
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpAdd	Lloh12, Lloh13
	.loh AdrpAdd	Lloh14, Lloh15
	.loh AdrpAdd	Lloh16, Lloh17
	.loh AdrpLdrGotLdr	Lloh18, Lloh19, Lloh20
	.cfi_endproc
                                        ; -- End function
	.section	__TEXT,__cstring,cstring_literals
l_.str:                                 ; @.str
	.asciz	"Power up failure(err = %d)\n"

l_.str.1:                               ; @.str.1
	.asciz	"Failed to configure pinmux(err = %d)\n"

	.comm	_SI476X_PROP_INT_CTL_ENABLE,4,2 ; @SI476X_PROP_INT_CTL_ENABLE
	.comm	_SI476X_RDSIEN,4,2              ; @SI476X_RDSIEN
	.comm	_SI476X_STCIEN,4,2              ; @SI476X_STCIEN
	.comm	_SI476X_CTSIEN,4,2              ; @SI476X_CTSIEN
l_.str.2:                               ; @.str.2
	.asciz	"Failed to configure interrupt sources(err = %d)\n"

	.comm	_ENODEV,4,2                     ; @ENODEV
.subsections_via_symbols
