	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function tg3_do_test_dma
_tg3_do_test_dma:                       ## @tg3_do_test_dma
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%r8d, %r15d
	movl	%ecx, -52(%rbp)                 ## 4-byte Spill
	movl	%edx, -44(%rbp)                 ## 4-byte Spill
	movq	%rdi, %r12
	movq	_NIC_SRAM_DMA_DESC_POOL_BASE@GOTPCREL(%rip), %rax
	movl	(%rax), %ebx
	movq	_FTQ_RCVBD_COMP_FIFO_ENQDEQ@GOTPCREL(%rip), %r14
	movl	(%r14), %edi
	xorl	%esi, %esi
	callq	_tw32
	movq	_FTQ_RCVDATA_COMP_FIFO_ENQDEQ@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_tw32
	movq	_RDMAC_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_tw32
	movq	_WDMAC_STATUS@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_tw32
	movq	_BUFMGR_MODE@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_tw32
	movq	_FTQ_RESET@GOTPCREL(%rip), %rax
	movl	(%rax), %edi
	xorl	%esi, %esi
	callq	_tw32
	testl	%r15d, %r15d
	movl	$4103, %eax                     ## imm = 0x1007
	movl	$3330, %edx                     ## imm = 0xD02
	movq	_RDMAC_MODE@GOTPCREL(%rip), %rcx
	cmoveq	_WDMAC_MODE@GOTPCREL(%rip), %rcx
	cmovel	%eax, %edx
	movl	%edx, -48(%rbp)                 ## 4-byte Spill
	movl	(%rcx), %edi
	movq	_RDMAC_MODE_ENABLE@GOTPCREL(%rip), %rax
	cmoveq	_WDMAC_MODE_ENABLE@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_FTQ_DMA_HIGH_READ_FIFO_ENQDEQ@GOTPCREL(%rip), %rax
	cmoveq	_FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ@GOTPCREL(%rip), %rax
	movq	%rax, -64(%rbp)                 ## 8-byte Spill
	callq	_tw32_f
	movl	$40, %r13d
	movl	$40, %edi
	callq	_udelay
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_BASE_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	%ebx, %edx
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_BASE_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leal	4(%rbx), %edx
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-44(%rbp), %edx                 ## 4-byte Reload
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_BASE_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leal	8(%rbx), %edx
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$8448, %edx                     ## imm = 0x2100
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_BASE_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leal	12(%rbx), %edx
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-52(%rbp), %edx                 ## 4-byte Reload
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_BASE_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leal	16(%rbx), %edx
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	-48(%rbp), %edx                 ## 4-byte Reload
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_BASE_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	leal	20(%rbx), %edx
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	movq	_TG3PCI_MEM_WIN_DATA@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	$5, %edx
	callq	_pci_write_config_dword
	movl	(%r12), %edi
	xorl	%r12d, %r12d
	movq	_TG3PCI_MEM_WIN_BASE_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	xorl	%edx, %edx
	callq	_pci_write_config_dword
	movq	-64(%rbp), %rax                 ## 8-byte Reload
	movl	(%rax), %edi
	movl	%ebx, %esi
	callq	_tw32
	movq	_ENODEV@GOTPCREL(%rip), %rax
	subl	(%rax), %r12d
	.p2align	4, 0x90
LBB0_1:                                 ## =>This Inner Loop Header: Depth=1
	movq	%r14, %rax
	testl	%r15d, %r15d
	jne	LBB0_3
## %bb.2:                               ##   in Loop: Header=BB0_1 Depth=1
	movq	_FTQ_RCVDATA_COMP_FIFO_ENQDEQ@GOTPCREL(%rip), %rax
LBB0_3:                                 ##   in Loop: Header=BB0_1 Depth=1
	movl	(%rax), %edi
	callq	_tr32
	movzwl	%ax, %eax
	cmpl	%ebx, %eax
	je	LBB0_4
## %bb.5:                               ##   in Loop: Header=BB0_1 Depth=1
	movl	$100, %edi
	callq	_udelay
	decl	%r13d
	jne	LBB0_1
	jmp	LBB0_6
LBB0_4:
	xorl	%r12d, %r12d
LBB0_6:
	movl	%r12d, %eax
	addq	$24, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_NIC_SRAM_DMA_DESC_POOL_BASE,4,2 ## @NIC_SRAM_DMA_DESC_POOL_BASE
	.comm	_FTQ_RCVBD_COMP_FIFO_ENQDEQ,4,2 ## @FTQ_RCVBD_COMP_FIFO_ENQDEQ
	.comm	_FTQ_RCVDATA_COMP_FIFO_ENQDEQ,4,2 ## @FTQ_RCVDATA_COMP_FIFO_ENQDEQ
	.comm	_RDMAC_STATUS,4,2               ## @RDMAC_STATUS
	.comm	_WDMAC_STATUS,4,2               ## @WDMAC_STATUS
	.comm	_BUFMGR_MODE,4,2                ## @BUFMGR_MODE
	.comm	_FTQ_RESET,4,2                  ## @FTQ_RESET
	.comm	_RDMAC_MODE,4,2                 ## @RDMAC_MODE
	.comm	_RDMAC_MODE_ENABLE,4,2          ## @RDMAC_MODE_ENABLE
	.comm	_WDMAC_MODE,4,2                 ## @WDMAC_MODE
	.comm	_WDMAC_MODE_ENABLE,4,2          ## @WDMAC_MODE_ENABLE
	.comm	_TG3PCI_MEM_WIN_BASE_ADDR,4,2   ## @TG3PCI_MEM_WIN_BASE_ADDR
	.comm	_TG3PCI_MEM_WIN_DATA,4,2        ## @TG3PCI_MEM_WIN_DATA
	.comm	_FTQ_DMA_HIGH_READ_FIFO_ENQDEQ,4,2 ## @FTQ_DMA_HIGH_READ_FIFO_ENQDEQ
	.comm	_FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ,4,2 ## @FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ
	.comm	_ENODEV,4,2                     ## @ENODEV
	.no_dead_strip	_tg3_do_test_dma
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function tg3_do_test_dma
_tg3_do_test_dma:                       ; @tg3_do_test_dma
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #112
	.cfi_def_cfa_offset 112
	stp	x28, x27, [sp, #16]             ; 16-byte Folded Spill
	stp	x26, x25, [sp, #32]             ; 16-byte Folded Spill
	stp	x24, x23, [sp, #48]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #64]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #80]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #96]             ; 16-byte Folded Spill
	add	x29, sp, #96
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	.cfi_offset w25, -72
	.cfi_offset w26, -80
	.cfi_offset w27, -88
	.cfi_offset w28, -96
	mov	x19, x4
	str	w3, [sp, #12]                   ; 4-byte Folded Spill
	mov	x24, x2
	mov	x21, x0
Lloh0:
	adrp	x8, _NIC_SRAM_DMA_DESC_POOL_BASE@GOTPAGE
Lloh1:
	ldr	x8, [x8, _NIC_SRAM_DMA_DESC_POOL_BASE@GOTPAGEOFF]
Lloh2:
	ldr	w20, [x8]
Lloh3:
	adrp	x25, _FTQ_RCVBD_COMP_FIFO_ENQDEQ@GOTPAGE
Lloh4:
	ldr	x25, [x25, _FTQ_RCVBD_COMP_FIFO_ENQDEQ@GOTPAGEOFF]
	ldr	w0, [x25]
	mov	w1, #0
	bl	_tw32
Lloh5:
	adrp	x26, _FTQ_RCVDATA_COMP_FIFO_ENQDEQ@GOTPAGE
Lloh6:
	ldr	x26, [x26, _FTQ_RCVDATA_COMP_FIFO_ENQDEQ@GOTPAGEOFF]
	ldr	w0, [x26]
	mov	w1, #0
	bl	_tw32
Lloh7:
	adrp	x8, _RDMAC_STATUS@GOTPAGE
Lloh8:
	ldr	x8, [x8, _RDMAC_STATUS@GOTPAGEOFF]
Lloh9:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_tw32
Lloh10:
	adrp	x8, _WDMAC_STATUS@GOTPAGE
Lloh11:
	ldr	x8, [x8, _WDMAC_STATUS@GOTPAGEOFF]
Lloh12:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_tw32
Lloh13:
	adrp	x8, _BUFMGR_MODE@GOTPAGE
Lloh14:
	ldr	x8, [x8, _BUFMGR_MODE@GOTPAGEOFF]
Lloh15:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_tw32
Lloh16:
	adrp	x8, _FTQ_RESET@GOTPAGE
Lloh17:
	ldr	x8, [x8, _FTQ_RESET@GOTPAGEOFF]
Lloh18:
	ldr	w0, [x8]
	mov	w1, #0
	bl	_tw32
	mov	w8, #3330
	mov	w9, #4103
	cmp	w19, #0
	csel	w23, w9, w8, eq
Lloh19:
	adrp	x8, _WDMAC_MODE@GOTPAGE
Lloh20:
	ldr	x8, [x8, _WDMAC_MODE@GOTPAGEOFF]
Lloh21:
	adrp	x9, _RDMAC_MODE@GOTPAGE
Lloh22:
	ldr	x9, [x9, _RDMAC_MODE@GOTPAGEOFF]
	csel	x8, x8, x9, eq
	ldr	w0, [x8]
Lloh23:
	adrp	x8, _WDMAC_MODE_ENABLE@GOTPAGE
Lloh24:
	ldr	x8, [x8, _WDMAC_MODE_ENABLE@GOTPAGEOFF]
Lloh25:
	adrp	x9, _RDMAC_MODE_ENABLE@GOTPAGE
Lloh26:
	ldr	x9, [x9, _RDMAC_MODE_ENABLE@GOTPAGEOFF]
	csel	x8, x8, x9, eq
	ldr	w1, [x8]
Lloh27:
	adrp	x8, _FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ@GOTPAGE
Lloh28:
	ldr	x8, [x8, _FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ@GOTPAGEOFF]
Lloh29:
	adrp	x9, _FTQ_DMA_HIGH_READ_FIFO_ENQDEQ@GOTPAGE
Lloh30:
	ldr	x9, [x9, _FTQ_DMA_HIGH_READ_FIFO_ENQDEQ@GOTPAGEOFF]
	csel	x8, x8, x9, eq
	str	x8, [sp]                        ; 8-byte Folded Spill
	bl	_tw32_f
	mov	w27, #40
	mov	w0, #40
	bl	_udelay
	ldr	w0, [x21]
Lloh31:
	adrp	x22, _TG3PCI_MEM_WIN_BASE_ADDR@GOTPAGE
Lloh32:
	ldr	x22, [x22, _TG3PCI_MEM_WIN_BASE_ADDR@GOTPAGEOFF]
	ldr	w1, [x22]
	mov	x2, x20
	bl	_pci_write_config_dword
	ldr	w0, [x21]
Lloh33:
	adrp	x28, _TG3PCI_MEM_WIN_DATA@GOTPAGE
Lloh34:
	ldr	x28, [x28, _TG3PCI_MEM_WIN_DATA@GOTPAGEOFF]
	ldr	w1, [x28]
	bl	_pci_write_config_dword
	ldr	w0, [x21]
	ldr	w1, [x22]
	add	w2, w20, #4
	bl	_pci_write_config_dword
	ldr	w0, [x21]
	ldr	w1, [x28]
	mov	x2, x24
	bl	_pci_write_config_dword
	ldr	w0, [x21]
	ldr	w1, [x22]
	add	w2, w20, #8
	bl	_pci_write_config_dword
	ldr	w0, [x21]
	ldr	w1, [x28]
	mov	w2, #8448
	bl	_pci_write_config_dword
	ldr	w0, [x21]
	ldr	w1, [x22]
	add	w2, w20, #12
	bl	_pci_write_config_dword
	ldr	w0, [x21]
	ldr	w1, [x28]
	ldr	w2, [sp, #12]                   ; 4-byte Folded Reload
	bl	_pci_write_config_dword
	ldr	w0, [x21]
	ldr	w1, [x22]
	add	w2, w20, #16
	bl	_pci_write_config_dword
	ldr	w0, [x21]
	ldr	w1, [x28]
	mov	x2, x23
	bl	_pci_write_config_dword
	ldr	w0, [x21]
	ldr	w1, [x22]
	add	w2, w20, #20
	bl	_pci_write_config_dword
	ldr	w0, [x21]
	ldr	w1, [x28]
	mov	w2, #5
	bl	_pci_write_config_dword
	ldr	w0, [x21]
	ldr	w1, [x22]
	mov	w2, #0
	bl	_pci_write_config_dword
	ldr	x8, [sp]                        ; 8-byte Folded Reload
	ldr	w0, [x8]
	mov	x1, x20
	bl	_tw32
Lloh35:
	adrp	x8, _ENODEV@GOTPAGE
Lloh36:
	ldr	x8, [x8, _ENODEV@GOTPAGEOFF]
Lloh37:
	ldr	w8, [x8]
	neg	w21, w8
LBB0_1:                                 ; =>This Inner Loop Header: Depth=1
	cmp	w19, #0
	csel	x8, x26, x25, eq
	ldr	w0, [x8]
	bl	_tr32
	cmp	w20, w0, uxth
	b.eq	LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	mov	w0, #100
	bl	_udelay
	subs	w27, w27, #1
	b.ne	LBB0_1
	b	LBB0_4
LBB0_3:
	mov	w21, #0
LBB0_4:
	mov	x0, x21
	ldp	x29, x30, [sp, #96]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #80]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #64]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #48]             ; 16-byte Folded Reload
	ldp	x26, x25, [sp, #32]             ; 16-byte Folded Reload
	ldp	x28, x27, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #112
	ret
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGot	Lloh33, Lloh34
	.loh AdrpLdrGot	Lloh31, Lloh32
	.loh AdrpLdrGot	Lloh29, Lloh30
	.loh AdrpLdrGot	Lloh27, Lloh28
	.loh AdrpLdrGot	Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh23, Lloh24
	.loh AdrpLdrGot	Lloh21, Lloh22
	.loh AdrpLdrGot	Lloh19, Lloh20
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGot	Lloh5, Lloh6
	.loh AdrpLdrGot	Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.cfi_endproc
                                        ; -- End function
	.comm	_NIC_SRAM_DMA_DESC_POOL_BASE,4,2 ; @NIC_SRAM_DMA_DESC_POOL_BASE
	.comm	_FTQ_RCVBD_COMP_FIFO_ENQDEQ,4,2 ; @FTQ_RCVBD_COMP_FIFO_ENQDEQ
	.comm	_FTQ_RCVDATA_COMP_FIFO_ENQDEQ,4,2 ; @FTQ_RCVDATA_COMP_FIFO_ENQDEQ
	.comm	_RDMAC_STATUS,4,2               ; @RDMAC_STATUS
	.comm	_WDMAC_STATUS,4,2               ; @WDMAC_STATUS
	.comm	_BUFMGR_MODE,4,2                ; @BUFMGR_MODE
	.comm	_FTQ_RESET,4,2                  ; @FTQ_RESET
	.comm	_RDMAC_MODE,4,2                 ; @RDMAC_MODE
	.comm	_RDMAC_MODE_ENABLE,4,2          ; @RDMAC_MODE_ENABLE
	.comm	_WDMAC_MODE,4,2                 ; @WDMAC_MODE
	.comm	_WDMAC_MODE_ENABLE,4,2          ; @WDMAC_MODE_ENABLE
	.comm	_TG3PCI_MEM_WIN_BASE_ADDR,4,2   ; @TG3PCI_MEM_WIN_BASE_ADDR
	.comm	_TG3PCI_MEM_WIN_DATA,4,2        ; @TG3PCI_MEM_WIN_DATA
	.comm	_FTQ_DMA_HIGH_READ_FIFO_ENQDEQ,4,2 ; @FTQ_DMA_HIGH_READ_FIFO_ENQDEQ
	.comm	_FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ,4,2 ; @FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ
	.comm	_ENODEV,4,2                     ; @ENODEV
	.no_dead_strip	_tg3_do_test_dma
.subsections_via_symbols
