	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function plx_pci_check_sja1000
_plx_pci_check_sja1000:                 ## @plx_pci_check_sja1000
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movq	%rdi, %rbx
	movq	_REG_CR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	callq	*(%rdi)
	movq	_REG_CR_BASICCAN_INITIAL_MASK@GOTPCREL(%rip), %rcx
	andl	(%rcx), %eax
	movq	_REG_CR_BASICCAN_INITIAL@GOTPCREL(%rip), %rcx
	xorl	%r14d, %r14d
	cmpl	(%rcx), %eax
	jne	LBB0_3
## %bb.1:
	movq	_SJA1000_SR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	*(%rbx)
	movq	_REG_SR_BASICCAN_INITIAL@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_3
## %bb.2:
	movq	_SJA1000_IR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	*(%rbx)
	movq	_REG_IR_BASICCAN_INITIAL@GOTPCREL(%rip), %rcx
	xorl	%r14d, %r14d
	cmpl	(%rcx), %eax
	sete	%r14b
LBB0_3:
	movq	_SJA1000_CDR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_CDR_PELICAN@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%rbx, %rdi
	callq	*8(%rbx)
	movq	_SJA1000_MOD@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	*(%rbx)
	movq	_REG_MOD_PELICAN_INITIAL@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_6
## %bb.4:
	movq	_SJA1000_SR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	*(%rbx)
	movq	_REG_SR_PELICAN_INITIAL@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_6
## %bb.5:
	movq	_SJA1000_IR@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%rbx, %rdi
	callq	*(%rbx)
	movq	_REG_IR_PELICAN_INITIAL@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	je	LBB0_7
LBB0_6:
	xorl	%r14d, %r14d
LBB0_7:
	movl	%r14d, %eax
	popq	%rbx
	popq	%r14
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_REG_CR,4,2                     ## @REG_CR
	.comm	_REG_CR_BASICCAN_INITIAL_MASK,4,2 ## @REG_CR_BASICCAN_INITIAL_MASK
	.comm	_REG_CR_BASICCAN_INITIAL,4,2    ## @REG_CR_BASICCAN_INITIAL
	.comm	_SJA1000_SR,4,2                 ## @SJA1000_SR
	.comm	_REG_SR_BASICCAN_INITIAL,4,2    ## @REG_SR_BASICCAN_INITIAL
	.comm	_SJA1000_IR,4,2                 ## @SJA1000_IR
	.comm	_REG_IR_BASICCAN_INITIAL,4,2    ## @REG_IR_BASICCAN_INITIAL
	.comm	_SJA1000_CDR,4,2                ## @SJA1000_CDR
	.comm	_CDR_PELICAN,4,2                ## @CDR_PELICAN
	.comm	_SJA1000_MOD,4,2                ## @SJA1000_MOD
	.comm	_REG_MOD_PELICAN_INITIAL,4,2    ## @REG_MOD_PELICAN_INITIAL
	.comm	_REG_SR_PELICAN_INITIAL,4,2     ## @REG_SR_PELICAN_INITIAL
	.comm	_REG_IR_PELICAN_INITIAL,4,2     ## @REG_IR_PELICAN_INITIAL
	.no_dead_strip	_plx_pci_check_sja1000
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function plx_pci_check_sja1000
_plx_pci_check_sja1000:                 ; @plx_pci_check_sja1000
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x19, x0
	ldr	x8, [x0]
Lloh0:
	adrp	x9, _REG_CR@GOTPAGE
Lloh1:
	ldr	x9, [x9, _REG_CR@GOTPAGEOFF]
Lloh2:
	ldr	w1, [x9]
	blr	x8
Lloh3:
	adrp	x8, _REG_CR_BASICCAN_INITIAL_MASK@GOTPAGE
Lloh4:
	ldr	x8, [x8, _REG_CR_BASICCAN_INITIAL_MASK@GOTPAGEOFF]
Lloh5:
	ldr	w8, [x8]
	and	w8, w8, w0
Lloh6:
	adrp	x9, _REG_CR_BASICCAN_INITIAL@GOTPAGE
Lloh7:
	ldr	x9, [x9, _REG_CR_BASICCAN_INITIAL@GOTPAGEOFF]
Lloh8:
	ldr	w9, [x9]
Lloh9:
	adrp	x21, _SJA1000_SR@GOTPAGE
Lloh10:
	ldr	x21, [x21, _SJA1000_SR@GOTPAGEOFF]
	cmp	w8, w9
	b.ne	LBB0_3
; %bb.1:
	ldr	x8, [x19]
	ldr	w1, [x21]
	mov	x0, x19
	blr	x8
Lloh11:
	adrp	x8, _REG_SR_BASICCAN_INITIAL@GOTPAGE
Lloh12:
	ldr	x8, [x8, _REG_SR_BASICCAN_INITIAL@GOTPAGEOFF]
Lloh13:
	ldr	w8, [x8]
	cmp	w0, w8
	b.ne	LBB0_3
; %bb.2:
	ldr	x8, [x19]
Lloh14:
	adrp	x9, _SJA1000_IR@GOTPAGE
Lloh15:
	ldr	x9, [x9, _SJA1000_IR@GOTPAGEOFF]
Lloh16:
	ldr	w1, [x9]
	mov	x0, x19
	blr	x8
Lloh17:
	adrp	x8, _REG_IR_BASICCAN_INITIAL@GOTPAGE
Lloh18:
	ldr	x8, [x8, _REG_IR_BASICCAN_INITIAL@GOTPAGEOFF]
Lloh19:
	ldr	w8, [x8]
	cmp	w0, w8
	cset	w20, eq
	b	LBB0_4
LBB0_3:
	mov	w20, #0
LBB0_4:
	ldr	x8, [x19, #8]
Lloh20:
	adrp	x9, _SJA1000_CDR@GOTPAGE
Lloh21:
	ldr	x9, [x9, _SJA1000_CDR@GOTPAGEOFF]
Lloh22:
	ldr	w1, [x9]
Lloh23:
	adrp	x9, _CDR_PELICAN@GOTPAGE
Lloh24:
	ldr	x9, [x9, _CDR_PELICAN@GOTPAGEOFF]
Lloh25:
	ldr	w2, [x9]
	mov	x0, x19
	blr	x8
	ldr	x8, [x19]
Lloh26:
	adrp	x9, _SJA1000_MOD@GOTPAGE
Lloh27:
	ldr	x9, [x9, _SJA1000_MOD@GOTPAGEOFF]
Lloh28:
	ldr	w1, [x9]
	mov	x0, x19
	blr	x8
Lloh29:
	adrp	x8, _REG_MOD_PELICAN_INITIAL@GOTPAGE
Lloh30:
	ldr	x8, [x8, _REG_MOD_PELICAN_INITIAL@GOTPAGEOFF]
Lloh31:
	ldr	w8, [x8]
	cmp	w0, w8
	b.ne	LBB0_7
; %bb.5:
	ldr	x8, [x19]
	ldr	w1, [x21]
	mov	x0, x19
	blr	x8
Lloh32:
	adrp	x8, _REG_SR_PELICAN_INITIAL@GOTPAGE
Lloh33:
	ldr	x8, [x8, _REG_SR_PELICAN_INITIAL@GOTPAGEOFF]
Lloh34:
	ldr	w8, [x8]
	cmp	w0, w8
	b.ne	LBB0_7
; %bb.6:
	ldr	x8, [x19]
Lloh35:
	adrp	x9, _SJA1000_IR@GOTPAGE
Lloh36:
	ldr	x9, [x9, _SJA1000_IR@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x9]
	mov	x0, x19
	blr	x8
Lloh38:
	adrp	x8, _REG_IR_PELICAN_INITIAL@GOTPAGE
Lloh39:
	ldr	x8, [x8, _REG_IR_PELICAN_INITIAL@GOTPAGEOFF]
Lloh40:
	ldr	w8, [x8]
	cmp	w0, w8
	b.eq	LBB0_8
LBB0_7:
	mov	w20, #0
LBB0_8:
	mov	x0, x20
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh9, Lloh10
	.loh AdrpLdrGotLdr	Lloh6, Lloh7, Lloh8
	.loh AdrpLdrGotLdr	Lloh3, Lloh4, Lloh5
	.loh AdrpLdrGotLdr	Lloh0, Lloh1, Lloh2
	.loh AdrpLdrGotLdr	Lloh11, Lloh12, Lloh13
	.loh AdrpLdrGotLdr	Lloh17, Lloh18, Lloh19
	.loh AdrpLdrGotLdr	Lloh14, Lloh15, Lloh16
	.loh AdrpLdrGotLdr	Lloh29, Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh26, Lloh27, Lloh28
	.loh AdrpLdrGotLdr	Lloh23, Lloh24, Lloh25
	.loh AdrpLdrGotLdr	Lloh20, Lloh21, Lloh22
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.cfi_endproc
                                        ; -- End function
	.comm	_REG_CR,4,2                     ; @REG_CR
	.comm	_REG_CR_BASICCAN_INITIAL_MASK,4,2 ; @REG_CR_BASICCAN_INITIAL_MASK
	.comm	_REG_CR_BASICCAN_INITIAL,4,2    ; @REG_CR_BASICCAN_INITIAL
	.comm	_SJA1000_SR,4,2                 ; @SJA1000_SR
	.comm	_REG_SR_BASICCAN_INITIAL,4,2    ; @REG_SR_BASICCAN_INITIAL
	.comm	_SJA1000_IR,4,2                 ; @SJA1000_IR
	.comm	_REG_IR_BASICCAN_INITIAL,4,2    ; @REG_IR_BASICCAN_INITIAL
	.comm	_SJA1000_CDR,4,2                ; @SJA1000_CDR
	.comm	_CDR_PELICAN,4,2                ; @CDR_PELICAN
	.comm	_SJA1000_MOD,4,2                ; @SJA1000_MOD
	.comm	_REG_MOD_PELICAN_INITIAL,4,2    ; @REG_MOD_PELICAN_INITIAL
	.comm	_REG_SR_PELICAN_INITIAL,4,2     ; @REG_SR_PELICAN_INITIAL
	.comm	_REG_IR_PELICAN_INITIAL,4,2     ; @REG_IR_PELICAN_INITIAL
	.no_dead_strip	_plx_pci_check_sja1000
.subsections_via_symbols
