	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function mt9p031_pll_enable
_mt9p031_pll_enable:                    ## @mt9p031_pll_enable
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rdi, %rbx
	addq	$16, %rdi
	callq	_v4l2_get_subdevdata
	cmpl	$0, 12(%rbx)
	je	LBB0_1
## %bb.2:
	movq	%rax, %r14
	movq	_MT9P031_PLL_CONTROL@GOTPCREL(%rip), %r12
	movl	(%r12), %esi
	movq	_MT9P031_PLL_CONTROL_PWRON@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%rax, %rdi
	callq	_mt9p031_write
	testl	%eax, %eax
	js	LBB0_5
## %bb.3:
	movq	_MT9P031_PLL_CONFIG_1@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	(%rbx), %eax
	movl	4(%rbx), %edx
	shll	$8, %eax
	decl	%edx
	orl	%eax, %edx
	movq	%r14, %rdi
	callq	_mt9p031_write
	testl	%eax, %eax
	js	LBB0_5
## %bb.4:
	movq	_MT9P031_PLL_CONFIG_2@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movl	8(%rbx), %edx
	decl	%edx
	movq	%r14, %rdi
	callq	_mt9p031_write
	testl	%eax, %eax
	js	LBB0_5
## %bb.6:
	movl	$1000, %edi                     ## imm = 0x3E8
	movl	$2000, %esi                     ## imm = 0x7D0
	callq	_usleep_range
	movl	(%r12), %esi
	movq	_MT9P031_PLL_CONTROL_USEPLL@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	orl	(%r15), %edx
	movq	%r14, %rdi
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	jmp	_mt9p031_write                  ## TAILCALL
LBB0_1:
	xorl	%eax, %eax
LBB0_5:
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
                                        ## -- End function
	.comm	_MT9P031_PLL_CONTROL,4,2        ## @MT9P031_PLL_CONTROL
	.comm	_MT9P031_PLL_CONTROL_PWRON,4,2  ## @MT9P031_PLL_CONTROL_PWRON
	.comm	_MT9P031_PLL_CONFIG_1,4,2       ## @MT9P031_PLL_CONFIG_1
	.comm	_MT9P031_PLL_CONFIG_2,4,2       ## @MT9P031_PLL_CONFIG_2
	.comm	_MT9P031_PLL_CONTROL_USEPLL,4,2 ## @MT9P031_PLL_CONTROL_USEPLL
	.no_dead_strip	_mt9p031_pll_enable
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function mt9p031_pll_enable
_mt9p031_pll_enable:                    ; @mt9p031_pll_enable
	.cfi_startproc
; %bb.0:
	stp	x22, x21, [sp, #-48]!           ; 16-byte Folded Spill
	.cfi_def_cfa_offset 48
	stp	x20, x19, [sp, #16]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #32]             ; 16-byte Folded Spill
	add	x29, sp, #32
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	mov	x20, x0
	add	x0, x0, #16
	bl	_v4l2_get_subdevdata
	ldr	w8, [x20, #12]
	cbz	w8, LBB0_5
; %bb.1:
	mov	x19, x0
Lloh0:
	adrp	x22, _MT9P031_PLL_CONTROL@GOTPAGE
Lloh1:
	ldr	x22, [x22, _MT9P031_PLL_CONTROL@GOTPAGEOFF]
	ldr	w1, [x22]
Lloh2:
	adrp	x21, _MT9P031_PLL_CONTROL_PWRON@GOTPAGE
Lloh3:
	ldr	x21, [x21, _MT9P031_PLL_CONTROL_PWRON@GOTPAGEOFF]
	ldr	w2, [x21]
	bl	_mt9p031_write
	tbnz	w0, #31, LBB0_6
; %bb.2:
Lloh4:
	adrp	x8, _MT9P031_PLL_CONFIG_1@GOTPAGE
Lloh5:
	ldr	x8, [x8, _MT9P031_PLL_CONFIG_1@GOTPAGEOFF]
Lloh6:
	ldr	w1, [x8]
	ldp	w8, w9, [x20]
	sub	w9, w9, #1
	orr	w2, w9, w8, lsl #8
	mov	x0, x19
	bl	_mt9p031_write
	tbnz	w0, #31, LBB0_6
; %bb.3:
Lloh7:
	adrp	x8, _MT9P031_PLL_CONFIG_2@GOTPAGE
Lloh8:
	ldr	x8, [x8, _MT9P031_PLL_CONFIG_2@GOTPAGEOFF]
Lloh9:
	ldr	w1, [x8]
	ldr	w8, [x20, #8]
	sub	w2, w8, #1
	mov	x0, x19
	bl	_mt9p031_write
	tbnz	w0, #31, LBB0_6
; %bb.4:
	mov	w0, #1000
	mov	w1, #2000
	bl	_usleep_range
	ldr	w1, [x22]
Lloh10:
	adrp	x8, _MT9P031_PLL_CONTROL_USEPLL@GOTPAGE
Lloh11:
	ldr	x8, [x8, _MT9P031_PLL_CONTROL_USEPLL@GOTPAGEOFF]
	ldr	w9, [x21]
Lloh12:
	ldr	w8, [x8]
	orr	w2, w8, w9
	mov	x0, x19
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	b	_mt9p031_write
LBB0_5:
	mov	w0, #0
LBB0_6:
	ldp	x29, x30, [sp, #32]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #16]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp], #48             ; 16-byte Folded Reload
	ret
	.loh AdrpLdrGot	Lloh2, Lloh3
	.loh AdrpLdrGot	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh4, Lloh5, Lloh6
	.loh AdrpLdrGotLdr	Lloh7, Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.cfi_endproc
                                        ; -- End function
	.comm	_MT9P031_PLL_CONTROL,4,2        ; @MT9P031_PLL_CONTROL
	.comm	_MT9P031_PLL_CONTROL_PWRON,4,2  ; @MT9P031_PLL_CONTROL_PWRON
	.comm	_MT9P031_PLL_CONFIG_1,4,2       ; @MT9P031_PLL_CONFIG_1
	.comm	_MT9P031_PLL_CONFIG_2,4,2       ; @MT9P031_PLL_CONFIG_2
	.comm	_MT9P031_PLL_CONTROL_USEPLL,4,2 ; @MT9P031_PLL_CONTROL_USEPLL
	.no_dead_strip	_mt9p031_pll_enable
.subsections_via_symbols
