	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	4, 0x90                         ## -- Begin function lio_set_phys_id
_lio_set_phys_id:                       ## @lio_set_phys_id
	.cfi_startproc
## %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	%esi, %ebx
	movq	%rdi, %r14
	callq	_GET_LIO
	movq	%rax, %r12
	movq	16(%rax), %r13
	movl	4(%r13), %edi
	movl	8(%r13), %esi
	movl	12(%r13), %edx
	callq	_OCT_FW_VER
	addl	$-128, %ebx
	cmpl	$3, %ebx
	ja	LBB0_37
## %bb.1:
	movl	%eax, %r15d
	leaq	LJTI0_0(%rip), %rax
	movslq	(%rax,%rbx,4), %rcx
	addq	%rax, %rcx
	jmpq	*%rcx
LBB0_12:
	movl	(%r13), %eax
	movq	_OCTEON_CN23XX_PF_VID@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_16
## %bb.13:
	movl	8(%r12), %ecx
	movq	_LIO_PHY_PORT_TP@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	jne	LBB0_16
## %bb.14:
	movl	$1, %edi
	movl	$7, %esi
	movl	$2, %edx
	callq	_OCT_FW_VER
	cmpl	%eax, %r15d
	jle	LBB0_15
## %bb.19:
	movq	_LED_IDENTIFICATION_ON@GOTPCREL(%rip), %rax
	jmp	LBB0_34
LBB0_20:
	movl	(%r13), %eax
	movq	_OCTEON_CN23XX_PF_VID@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_24
## %bb.21:
	movl	8(%r12), %ecx
	movq	_LIO_PHY_PORT_TP@GOTPCREL(%rip), %rdx
	cmpl	(%rdx), %ecx
	jne	LBB0_24
## %bb.22:
	movl	$1, %edi
	movl	$7, %esi
	movl	$2, %edx
	callq	_OCT_FW_VER
	cmpl	%eax, %r15d
	jg	LBB0_33
## %bb.23:
	movl	(%r13), %eax
LBB0_24:
	movq	_OCTEON_CN66XX@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_37
## %bb.25:
	movq	_VITESSE_PHY_GPIO_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_VITESSE_PHY_GPIO_LOW@GOTPCREL(%rip), %rax
	jmp	LBB0_18
LBB0_26:
	movl	(%r13), %eax
	movq	_OCTEON_CN66XX@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_28
## %bb.27:
	movq	_VITESSE_PHY_GPIO_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_VITESSE_PHY_GPIO_DRIVEOFF@GOTPCREL(%rip), %rax
	jmp	LBB0_18
LBB0_2:
	movl	(%r13), %eax
	movq	_OCTEON_CN66XX@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_4
## %bb.3:
	movq	_VITESSE_PHY_GPIO_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_VITESSE_PHY_GPIO_DRIVEON@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_octnet_gpio_access
	movl	$2, %ebx
	jmp	LBB0_36
LBB0_28:
	movq	_OCTEON_CN68XX@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_32
## %bb.29:
	movq	_LIO68XX_LED_CTRL_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rcx
	addq	$4, %rcx
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_octnet_mdio45_access
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_36
## %bb.30:
	movq	_LIO68XX_LED_BEACON_ADDR@GOTPCREL(%rip), %rax
	movl	(%rax), %edx
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r12, %rcx
LBB0_31:
	callq	_octnet_mdio45_access
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_36
	jmp	LBB0_35
LBB0_4:
	movq	_OCTEON_CN68XX@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_9
## %bb.5:
	movq	_LIO68XX_LED_BEACON_ADDR@GOTPCREL(%rip), %r15
	movl	(%r15), %edx
	movq	%r12, %rdi
	xorl	%esi, %esi
	movq	%r12, %rcx
	callq	_octnet_mdio45_access
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_36
## %bb.6:
	movq	_LIO68XX_LED_CTRL_ADDR@GOTPCREL(%rip), %r14
	movl	(%r14), %edx
	movq	%r12, %rcx
	addq	$4, %rcx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	_octnet_mdio45_access
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_36
## %bb.7:
	movq	_LIO68XX_LED_BEACON_CFGON@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)
	movl	(%r15), %edx
	leaq	-44(%rbp), %rcx
	movq	%r12, %rdi
	movl	$1, %esi
	callq	_octnet_mdio45_access
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	LBB0_36
## %bb.8:
	movq	_LIO68XX_LED_CTRL_CFGON@GOTPCREL(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, -44(%rbp)
	movl	(%r14), %edx
	leaq	-44(%rbp), %rcx
	movq	%r12, %rdi
	movl	$1, %esi
	jmp	LBB0_31
LBB0_32:
	movq	_OCTEON_CN23XX_PF_VID@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_37
LBB0_33:
	movq	_LED_IDENTIFICATION_OFF@GOTPCREL(%rip), %rax
LBB0_34:
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_octnet_id_active
	jmp	LBB0_35
LBB0_9:
	movq	_OCTEON_CN23XX_PF_VID@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_37
## %bb.10:
	movq	_LED_IDENTIFICATION_ON@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	%r14, %rdi
	callq	_octnet_id_active
	movl	8(%r12), %eax
	movq	_LIO_PHY_PORT_TP@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_35
## %bb.11:
	movl	$2, %ebx
	movl	$1, %edi
	movl	$7, %esi
	movl	$2, %edx
	callq	_OCT_FW_VER
	cmpl	%eax, %r15d
	jle	LBB0_35
	jmp	LBB0_36
LBB0_15:
	movl	(%r13), %eax
LBB0_16:
	movq	_OCTEON_CN66XX@GOTPCREL(%rip), %rcx
	cmpl	(%rcx), %eax
	jne	LBB0_37
## %bb.17:
	movq	_VITESSE_PHY_GPIO_CFG@GOTPCREL(%rip), %rax
	movl	(%rax), %esi
	movq	_VITESSE_PHY_GPIO_HIGH@GOTPCREL(%rip), %rax
LBB0_18:
	movl	(%rax), %edx
	movq	%r14, %rdi
	callq	_octnet_gpio_access
LBB0_35:
	xorl	%ebx, %ebx
	jmp	LBB0_36
LBB0_37:
	movq	_EINVAL@GOTPCREL(%rip), %rax
	xorl	%ebx, %ebx
	subl	(%rax), %ebx
LBB0_36:
	movl	%ebx, %eax
	addq	$8, %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	retq
	.cfi_endproc
	.p2align	2, 0x90
	.data_region jt32
.set L0_0_set_12, LBB0_12-LJTI0_0
.set L0_0_set_20, LBB0_20-LJTI0_0
.set L0_0_set_26, LBB0_26-LJTI0_0
.set L0_0_set_2, LBB0_2-LJTI0_0
LJTI0_0:
	.long	L0_0_set_12
	.long	L0_0_set_20
	.long	L0_0_set_26
	.long	L0_0_set_2
	.end_data_region
                                        ## -- End function
	.comm	_OCTEON_CN66XX,4,2              ## @OCTEON_CN66XX
	.comm	_VITESSE_PHY_GPIO_CFG,4,2       ## @VITESSE_PHY_GPIO_CFG
	.comm	_VITESSE_PHY_GPIO_DRIVEON,4,2   ## @VITESSE_PHY_GPIO_DRIVEON
	.comm	_OCTEON_CN68XX,4,2              ## @OCTEON_CN68XX
	.comm	_LIO68XX_LED_BEACON_ADDR,4,2    ## @LIO68XX_LED_BEACON_ADDR
	.comm	_LIO68XX_LED_CTRL_ADDR,4,2      ## @LIO68XX_LED_CTRL_ADDR
	.comm	_LIO68XX_LED_BEACON_CFGON,4,2   ## @LIO68XX_LED_BEACON_CFGON
	.comm	_LIO68XX_LED_CTRL_CFGON,4,2     ## @LIO68XX_LED_CTRL_CFGON
	.comm	_OCTEON_CN23XX_PF_VID,4,2       ## @OCTEON_CN23XX_PF_VID
	.comm	_LED_IDENTIFICATION_ON,4,2      ## @LED_IDENTIFICATION_ON
	.comm	_LIO_PHY_PORT_TP,4,2            ## @LIO_PHY_PORT_TP
	.comm	_EINVAL,4,2                     ## @EINVAL
	.comm	_VITESSE_PHY_GPIO_HIGH,4,2      ## @VITESSE_PHY_GPIO_HIGH
	.comm	_LED_IDENTIFICATION_OFF,4,2     ## @LED_IDENTIFICATION_OFF
	.comm	_VITESSE_PHY_GPIO_LOW,4,2       ## @VITESSE_PHY_GPIO_LOW
	.comm	_VITESSE_PHY_GPIO_DRIVEOFF,4,2  ## @VITESSE_PHY_GPIO_DRIVEOFF
	.no_dead_strip	_lio_set_phys_id
.subsections_via_symbols

	.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 13, 0	sdk_version 13, 3
	.p2align	2                               ; -- Begin function lio_set_phys_id
_lio_set_phys_id:                       ; @lio_set_phys_id
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #80
	.cfi_def_cfa_offset 80
	stp	x24, x23, [sp, #16]             ; 16-byte Folded Spill
	stp	x22, x21, [sp, #32]             ; 16-byte Folded Spill
	stp	x20, x19, [sp, #48]             ; 16-byte Folded Spill
	stp	x29, x30, [sp, #64]             ; 16-byte Folded Spill
	add	x29, sp, #64
	.cfi_def_cfa w29, 16
	.cfi_offset w30, -8
	.cfi_offset w29, -16
	.cfi_offset w19, -24
	.cfi_offset w20, -32
	.cfi_offset w21, -40
	.cfi_offset w22, -48
	.cfi_offset w23, -56
	.cfi_offset w24, -64
	mov	x22, x1
	mov	x19, x0
	bl	_GET_LIO
	mov	x20, x0
	ldr	x23, [x0, #16]
	ldp	w0, w1, [x23, #4]
	ldr	w2, [x23, #12]
	bl	_OCT_FW_VER
	sub	w8, w22, #128
	cmp	w8, #3
	b.hi	LBB0_36
; %bb.1:
	mov	x21, x0
Lloh0:
	adrp	x9, lJTI0_0@PAGE
Lloh1:
	add	x9, x9, lJTI0_0@PAGEOFF
	adr	x10, LBB0_2
	ldrb	w11, [x9, x8]
	add	x10, x10, x11, lsl #2
	br	x10
LBB0_2:
	ldr	w8, [x23]
Lloh2:
	adrp	x9, _OCTEON_CN23XX_PF_VID@GOTPAGE
Lloh3:
	ldr	x9, [x9, _OCTEON_CN23XX_PF_VID@GOTPAGEOFF]
Lloh4:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_32
; %bb.3:
	ldr	w9, [x20, #8]
Lloh5:
	adrp	x10, _LIO_PHY_PORT_TP@GOTPAGE
Lloh6:
	ldr	x10, [x10, _LIO_PHY_PORT_TP@GOTPAGEOFF]
Lloh7:
	ldr	w10, [x10]
	cmp	w9, w10
	b.ne	LBB0_32
; %bb.4:
	mov	w0, #1
	mov	w1, #7
	mov	w2, #2
	bl	_OCT_FW_VER
	cmp	w21, w0
	b.le	LBB0_31
; %bb.5:
Lloh8:
	adrp	x8, _LED_IDENTIFICATION_ON@GOTPAGE
Lloh9:
	ldr	x8, [x8, _LED_IDENTIFICATION_ON@GOTPAGEOFF]
	b	LBB0_27
LBB0_6:
	ldr	w8, [x23]
Lloh10:
	adrp	x9, _OCTEON_CN23XX_PF_VID@GOTPAGE
Lloh11:
	ldr	x9, [x9, _OCTEON_CN23XX_PF_VID@GOTPAGEOFF]
Lloh12:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_10
; %bb.7:
	ldr	w9, [x20, #8]
Lloh13:
	adrp	x10, _LIO_PHY_PORT_TP@GOTPAGE
Lloh14:
	ldr	x10, [x10, _LIO_PHY_PORT_TP@GOTPAGEOFF]
Lloh15:
	ldr	w10, [x10]
	cmp	w9, w10
	b.ne	LBB0_10
; %bb.8:
	mov	w0, #1
	mov	w1, #7
	mov	w2, #2
	bl	_OCT_FW_VER
	cmp	w21, w0
	b.gt	LBB0_26
; %bb.9:
	ldr	w8, [x23]
LBB0_10:
Lloh16:
	adrp	x9, _OCTEON_CN66XX@GOTPAGE
Lloh17:
	ldr	x9, [x9, _OCTEON_CN66XX@GOTPAGEOFF]
Lloh18:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_36
; %bb.11:
Lloh19:
	adrp	x8, _VITESSE_PHY_GPIO_CFG@GOTPAGE
Lloh20:
	ldr	x8, [x8, _VITESSE_PHY_GPIO_CFG@GOTPAGEOFF]
Lloh21:
	ldr	w1, [x8]
Lloh22:
	adrp	x8, _VITESSE_PHY_GPIO_LOW@GOTPAGE
Lloh23:
	ldr	x8, [x8, _VITESSE_PHY_GPIO_LOW@GOTPAGEOFF]
	b	LBB0_34
LBB0_12:
	ldr	w8, [x23]
Lloh24:
	adrp	x9, _OCTEON_CN66XX@GOTPAGE
Lloh25:
	ldr	x9, [x9, _OCTEON_CN66XX@GOTPAGEOFF]
Lloh26:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_16
; %bb.13:
Lloh27:
	adrp	x8, _VITESSE_PHY_GPIO_CFG@GOTPAGE
Lloh28:
	ldr	x8, [x8, _VITESSE_PHY_GPIO_CFG@GOTPAGEOFF]
Lloh29:
	ldr	w1, [x8]
Lloh30:
	adrp	x8, _VITESSE_PHY_GPIO_DRIVEOFF@GOTPAGE
Lloh31:
	ldr	x8, [x8, _VITESSE_PHY_GPIO_DRIVEOFF@GOTPAGEOFF]
	b	LBB0_34
LBB0_14:
	ldr	w8, [x23]
Lloh32:
	adrp	x9, _OCTEON_CN66XX@GOTPAGE
Lloh33:
	ldr	x9, [x9, _OCTEON_CN66XX@GOTPAGEOFF]
Lloh34:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_20
; %bb.15:
Lloh35:
	adrp	x8, _VITESSE_PHY_GPIO_CFG@GOTPAGE
Lloh36:
	ldr	x8, [x8, _VITESSE_PHY_GPIO_CFG@GOTPAGEOFF]
Lloh37:
	ldr	w1, [x8]
Lloh38:
	adrp	x8, _VITESSE_PHY_GPIO_DRIVEON@GOTPAGE
Lloh39:
	ldr	x8, [x8, _VITESSE_PHY_GPIO_DRIVEON@GOTPAGEOFF]
Lloh40:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_octnet_gpio_access
	mov	w19, #2
	b	LBB0_37
LBB0_16:
Lloh41:
	adrp	x9, _OCTEON_CN68XX@GOTPAGE
Lloh42:
	ldr	x9, [x9, _OCTEON_CN68XX@GOTPAGEOFF]
Lloh43:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_25
; %bb.17:
Lloh44:
	adrp	x8, _LIO68XX_LED_CTRL_ADDR@GOTPAGE
Lloh45:
	ldr	x8, [x8, _LIO68XX_LED_CTRL_ADDR@GOTPAGEOFF]
Lloh46:
	ldr	w2, [x8]
	add	x3, x20, #4
	mov	x0, x20
	mov	w1, #1
	bl	_octnet_mdio45_access
	mov	x19, x0
	cbnz	w0, LBB0_37
; %bb.18:
Lloh47:
	adrp	x8, _LIO68XX_LED_BEACON_ADDR@GOTPAGE
Lloh48:
	ldr	x8, [x8, _LIO68XX_LED_BEACON_ADDR@GOTPAGEOFF]
Lloh49:
	ldr	w2, [x8]
	mov	x0, x20
	mov	w1, #1
	mov	x3, x20
LBB0_19:
	bl	_octnet_mdio45_access
	mov	x19, x0
	cbnz	w0, LBB0_37
	b	LBB0_35
LBB0_20:
Lloh50:
	adrp	x9, _OCTEON_CN68XX@GOTPAGE
Lloh51:
	ldr	x9, [x9, _OCTEON_CN68XX@GOTPAGEOFF]
Lloh52:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_28
; %bb.21:
Lloh53:
	adrp	x22, _LIO68XX_LED_BEACON_ADDR@GOTPAGE
Lloh54:
	ldr	x22, [x22, _LIO68XX_LED_BEACON_ADDR@GOTPAGEOFF]
	ldr	w2, [x22]
	mov	x0, x20
	mov	w1, #0
	mov	x3, x20
	bl	_octnet_mdio45_access
	mov	x19, x0
	cbnz	w0, LBB0_37
; %bb.22:
Lloh55:
	adrp	x21, _LIO68XX_LED_CTRL_ADDR@GOTPAGE
Lloh56:
	ldr	x21, [x21, _LIO68XX_LED_CTRL_ADDR@GOTPAGEOFF]
	ldr	w2, [x21]
	add	x3, x20, #4
	mov	x0, x20
	mov	w1, #0
	bl	_octnet_mdio45_access
	mov	x19, x0
	cbnz	w0, LBB0_37
; %bb.23:
Lloh57:
	adrp	x8, _LIO68XX_LED_BEACON_CFGON@GOTPAGE
Lloh58:
	ldr	x8, [x8, _LIO68XX_LED_BEACON_CFGON@GOTPAGEOFF]
Lloh59:
	ldr	w8, [x8]
	str	w8, [sp, #12]
	ldr	w2, [x22]
	add	x3, sp, #12
	mov	x0, x20
	mov	w1, #1
	bl	_octnet_mdio45_access
	mov	x19, x0
	cbnz	w0, LBB0_37
; %bb.24:
Lloh60:
	adrp	x8, _LIO68XX_LED_CTRL_CFGON@GOTPAGE
Lloh61:
	ldr	x8, [x8, _LIO68XX_LED_CTRL_CFGON@GOTPAGEOFF]
Lloh62:
	ldr	w8, [x8]
	str	w8, [sp, #12]
	ldr	w2, [x21]
	add	x3, sp, #12
	mov	x0, x20
	mov	w1, #1
	b	LBB0_19
LBB0_25:
Lloh63:
	adrp	x9, _OCTEON_CN23XX_PF_VID@GOTPAGE
Lloh64:
	ldr	x9, [x9, _OCTEON_CN23XX_PF_VID@GOTPAGEOFF]
Lloh65:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_36
LBB0_26:
Lloh66:
	adrp	x8, _LED_IDENTIFICATION_OFF@GOTPAGE
Lloh67:
	ldr	x8, [x8, _LED_IDENTIFICATION_OFF@GOTPAGEOFF]
LBB0_27:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_octnet_id_active
	b	LBB0_35
LBB0_28:
Lloh68:
	adrp	x9, _OCTEON_CN23XX_PF_VID@GOTPAGE
Lloh69:
	ldr	x9, [x9, _OCTEON_CN23XX_PF_VID@GOTPAGEOFF]
Lloh70:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_36
; %bb.29:
Lloh71:
	adrp	x8, _LED_IDENTIFICATION_ON@GOTPAGE
Lloh72:
	ldr	x8, [x8, _LED_IDENTIFICATION_ON@GOTPAGEOFF]
Lloh73:
	ldr	w1, [x8]
	mov	x0, x19
	bl	_octnet_id_active
	ldr	w8, [x20, #8]
Lloh74:
	adrp	x9, _LIO_PHY_PORT_TP@GOTPAGE
Lloh75:
	ldr	x9, [x9, _LIO_PHY_PORT_TP@GOTPAGEOFF]
Lloh76:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_35
; %bb.30:
	mov	w19, #2
	mov	w0, #1
	mov	w1, #7
	mov	w2, #2
	bl	_OCT_FW_VER
	cmp	w21, w0
	b.le	LBB0_35
	b	LBB0_37
LBB0_31:
	ldr	w8, [x23]
LBB0_32:
Lloh77:
	adrp	x9, _OCTEON_CN66XX@GOTPAGE
Lloh78:
	ldr	x9, [x9, _OCTEON_CN66XX@GOTPAGEOFF]
Lloh79:
	ldr	w9, [x9]
	cmp	w8, w9
	b.ne	LBB0_36
; %bb.33:
Lloh80:
	adrp	x8, _VITESSE_PHY_GPIO_CFG@GOTPAGE
Lloh81:
	ldr	x8, [x8, _VITESSE_PHY_GPIO_CFG@GOTPAGEOFF]
Lloh82:
	ldr	w1, [x8]
Lloh83:
	adrp	x8, _VITESSE_PHY_GPIO_HIGH@GOTPAGE
Lloh84:
	ldr	x8, [x8, _VITESSE_PHY_GPIO_HIGH@GOTPAGEOFF]
LBB0_34:
	ldr	w2, [x8]
	mov	x0, x19
	bl	_octnet_gpio_access
LBB0_35:
	mov	w19, #0
	b	LBB0_37
LBB0_36:
Lloh85:
	adrp	x8, _EINVAL@GOTPAGE
Lloh86:
	ldr	x8, [x8, _EINVAL@GOTPAGEOFF]
Lloh87:
	ldr	w8, [x8]
	neg	w19, w8
LBB0_37:
	mov	x0, x19
	ldp	x29, x30, [sp, #64]             ; 16-byte Folded Reload
	ldp	x20, x19, [sp, #48]             ; 16-byte Folded Reload
	ldp	x22, x21, [sp, #32]             ; 16-byte Folded Reload
	ldp	x24, x23, [sp, #16]             ; 16-byte Folded Reload
	add	sp, sp, #80
	ret
	.loh AdrpAdd	Lloh0, Lloh1
	.loh AdrpLdrGotLdr	Lloh2, Lloh3, Lloh4
	.loh AdrpLdrGotLdr	Lloh5, Lloh6, Lloh7
	.loh AdrpLdrGot	Lloh8, Lloh9
	.loh AdrpLdrGotLdr	Lloh10, Lloh11, Lloh12
	.loh AdrpLdrGotLdr	Lloh13, Lloh14, Lloh15
	.loh AdrpLdrGotLdr	Lloh16, Lloh17, Lloh18
	.loh AdrpLdrGot	Lloh22, Lloh23
	.loh AdrpLdrGotLdr	Lloh19, Lloh20, Lloh21
	.loh AdrpLdrGotLdr	Lloh24, Lloh25, Lloh26
	.loh AdrpLdrGot	Lloh30, Lloh31
	.loh AdrpLdrGotLdr	Lloh27, Lloh28, Lloh29
	.loh AdrpLdrGotLdr	Lloh32, Lloh33, Lloh34
	.loh AdrpLdrGotLdr	Lloh38, Lloh39, Lloh40
	.loh AdrpLdrGotLdr	Lloh35, Lloh36, Lloh37
	.loh AdrpLdrGotLdr	Lloh41, Lloh42, Lloh43
	.loh AdrpLdrGotLdr	Lloh44, Lloh45, Lloh46
	.loh AdrpLdrGotLdr	Lloh47, Lloh48, Lloh49
	.loh AdrpLdrGotLdr	Lloh50, Lloh51, Lloh52
	.loh AdrpLdrGot	Lloh53, Lloh54
	.loh AdrpLdrGot	Lloh55, Lloh56
	.loh AdrpLdrGotLdr	Lloh57, Lloh58, Lloh59
	.loh AdrpLdrGotLdr	Lloh60, Lloh61, Lloh62
	.loh AdrpLdrGotLdr	Lloh63, Lloh64, Lloh65
	.loh AdrpLdrGot	Lloh66, Lloh67
	.loh AdrpLdrGotLdr	Lloh68, Lloh69, Lloh70
	.loh AdrpLdrGotLdr	Lloh74, Lloh75, Lloh76
	.loh AdrpLdrGotLdr	Lloh71, Lloh72, Lloh73
	.loh AdrpLdrGotLdr	Lloh77, Lloh78, Lloh79
	.loh AdrpLdrGot	Lloh83, Lloh84
	.loh AdrpLdrGotLdr	Lloh80, Lloh81, Lloh82
	.loh AdrpLdrGotLdr	Lloh85, Lloh86, Lloh87
	.cfi_endproc
	.section	__TEXT,__const
lJTI0_0:
	.byte	(LBB0_2-LBB0_2)>>2
	.byte	(LBB0_6-LBB0_2)>>2
	.byte	(LBB0_12-LBB0_2)>>2
	.byte	(LBB0_14-LBB0_2)>>2
                                        ; -- End function
	.comm	_OCTEON_CN66XX,4,2              ; @OCTEON_CN66XX
	.comm	_VITESSE_PHY_GPIO_CFG,4,2       ; @VITESSE_PHY_GPIO_CFG
	.comm	_VITESSE_PHY_GPIO_DRIVEON,4,2   ; @VITESSE_PHY_GPIO_DRIVEON
	.comm	_OCTEON_CN68XX,4,2              ; @OCTEON_CN68XX
	.comm	_LIO68XX_LED_BEACON_ADDR,4,2    ; @LIO68XX_LED_BEACON_ADDR
	.comm	_LIO68XX_LED_CTRL_ADDR,4,2      ; @LIO68XX_LED_CTRL_ADDR
	.comm	_LIO68XX_LED_BEACON_CFGON,4,2   ; @LIO68XX_LED_BEACON_CFGON
	.comm	_LIO68XX_LED_CTRL_CFGON,4,2     ; @LIO68XX_LED_CTRL_CFGON
	.comm	_OCTEON_CN23XX_PF_VID,4,2       ; @OCTEON_CN23XX_PF_VID
	.comm	_LED_IDENTIFICATION_ON,4,2      ; @LED_IDENTIFICATION_ON
	.comm	_LIO_PHY_PORT_TP,4,2            ; @LIO_PHY_PORT_TP
	.comm	_EINVAL,4,2                     ; @EINVAL
	.comm	_VITESSE_PHY_GPIO_HIGH,4,2      ; @VITESSE_PHY_GPIO_HIGH
	.comm	_LED_IDENTIFICATION_OFF,4,2     ; @LED_IDENTIFICATION_OFF
	.comm	_VITESSE_PHY_GPIO_LOW,4,2       ; @VITESSE_PHY_GPIO_LOW
	.comm	_VITESSE_PHY_GPIO_DRIVEOFF,4,2  ; @VITESSE_PHY_GPIO_DRIVEOFF
	.no_dead_strip	_lio_set_phys_id
.subsections_via_symbols
